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r4680 Wednesday 13th May, 2009 at 02:45:49 UTC by Nathan Woods
Updated to MAME 0.131u1 core; some drivers disabled

[docs]	messnew.txt
[src/build]	file2str.c
[src/emu]	audit.c cheat.c clifront.c config.c cpuexec.c cpuintrf.h debugger.c devintrf.c devintrf.h drawgfx.c drawgfx.h driver.c driver.h emupal.c inptport.c input.c inputseq.c mame.c mconfig.c memory.c memory.h output.c render.c rendfont.c rendlay.c restrack.c restrack.h romload.c romload.h sound.c state.c streams.c tilemap.c timer.c ui.c uiinput.c uimenu.c validity.c video.c video.h
[src/emu/cpu]	drcbec.c drcbex86.c drcfe.c vtlb.c x86log.c
[src/emu/cpu/asap]	asap.c
[src/emu/cpu/cop400]	cop400.c
[src/emu/cpu/cubeqcpu]	cubeqcpu.c
[src/emu/cpu/esrip]	esrip.c
[src/emu/cpu/g65816]	g65816.c g65816.h g65816op.h
[src/emu/cpu/h83002]	h8_16.c h8_8.c h8ops.h
[src/emu/cpu/i386]	i386.c
[src/emu/cpu/i8085]	i8085.c
[src/emu/cpu/i860]	i860.c i860.h i860dec.c
[src/emu/cpu/jaguar]	jaguar.c
[src/emu/cpu/konami]	konami.c konami.h
[src/emu/cpu/m37710]	m37710.c m37710op.h
[src/emu/cpu/m68000]	m68000.h m68kcpu.c
[src/emu/cpu/mb86233]	mb86233.c
[src/emu/cpu/mc68hc11]	mc68hc11.c
[src/emu/cpu/mcs51]	mcs51dasm.c
[src/emu/cpu/mips]	mips3.c psx.c r3000.c
[src/emu/cpu/se3208]	se3208.c
[src/emu/cpu/sh2]	sh2.c sh2comn.c
[src/emu/cpu/sh4]	sh4.c sh4.h sh4comn.c sh4comn.h
[src/emu/cpu/sharc]	sharc.c
[src/emu/cpu/tlcs900]	tlcs900.c
[src/emu/cpu/tms32025]	tms32025.c
[src/emu/cpu/tms34010]	tms34010.c
[src/emu/cpu/z180]	z180.c
[src/emu/cpu/z80]	z80daisy.c
[src/emu/debug]	debugcmt.c debugcon.c debugcpu.c debugvw.c
[src/emu/machine]	6522via.c 6526cia.c 6532riot.c 6821pia.c 6850acia.c 68681.c 74123.c 8237dma.c 8255ppi.c 8257dma.c at28c16.c cdp1852.c eepromdev.c f3853.c i2cmem.c i2cmemdev.c idectrl.c intelfsh.c laserdsc.h latch8.c ldcore.c mc146818.c microtch.c msm6242.c pci.c pic8259.c pit8253.c scsi.c smc91c9x.c timekpr.c wd33c93.c x2212.c x76f041.c x76f100.c z80ctc.c z80dma.c z80pio.c z80sio.c
[src/emu/sound]	aica.c ay8910.c c140.c cdda.c cem3394.c discrete.c dmadac.c es5506.c filter.c ics2115.c k005289.c k051649.c k053260.c k054539.c namco.c psx.c qsound.c samples.c samples.h scsp.c segapcm.c sid.c sidvoice.c sidvoice.h sn76496.c sp0256.c tms5110.c tms5220.c votrax.c wave.c ymf271.c ymf278b.c ymz280b.c
[src/emu/video]	generic.c generic.h mc6845.c poly.c resnet.c s2636.c s2636.h tms34061.c tms9928a.c v9938.c vector.c voodoo.c
[src/ldplayer]	ldplayer.c
[src/mame]	mame.mak mamedriv.c
[src/mame/audio]	8080bw.c amiga.c attckufo.c aztarac.c bzone.c carnival.c cchasm.c cclimber.c cliffhgr.c cyberbal.c dcs.c dkong.c exidy.c exidy440.c fghtbskt.c flower.c galaxian.c geebee.c gomoku.c gottlieb.c harddriv.c irem.c jaguar.c jedi.c leland.c mario.c mcr.c meadows.c n8080.c phoenix.c pleiads.c polepos.c redalert.c redbaron.c segag80r.c segasnd.c seibu.c senjyo.c spacefb.c starwars.c suna8.c tiamc1.c timeplt.c trackfld.c turbo.c warpwarp.c wiping.c
[src/mame/drivers]	20pacgal.c 2mindril.c 40love.c 86lions.c 88games.c acefruit.c acommand.c actfancr.c adp.c aerofgt.c airbustr.c aladbl.c alg.c aliens.c alpha68k.c amspdwy.c angelkds.c aquarium.c arabian.c arcadecl.c arcadia.c argus.c arkanoid.c artmagic.c ashnojoe.c asterix.c asteroid.c astinvad.c astrocde.c astrof.c asuka.c atarig1.c atarig42.c atarigt.c atarigx2.c atarisy1.c atarisy2.c ataxx.c atetris.c aztarac.c backfire.c balsente.c baraduke.c batman.c battlane.c battlera.c battlex.c battlnts.c bbusters.c beaminv.c beathead.c berzerk.c bfcobra.c bfm_sc1.c bfm_sc2.c bfmsys85.c big10.c bigevglf.c bigfghtr.c bingoc.c bishi.c bishjan.c bking.c bladestl.c blktiger.c blockhl.c blockout.c blstroid.c blueprnt.c bmcbowl.c bnstars.c boogwing.c bottom9.c boxer.c brkthru.c btime.c btoads.c bublbobl.c buggychl.c buster.c bwidow.c bwing.c bzone.c cabal.c calchase.c capbowl.c carjmbre.c cave.c cball.c cbuster.c ccastles.c cchasm.c cclimber.c centiped.c chaknpop.c cham24.c champbas.c chanbara.c changela.c cheekyms.c chinagat.c chqflag.c cidelsa.c cinemat.c circus.c circusc.c cischeat.c citycon.c cliffhgr.c cloak.c cloud9.c cninja.c cntsteer.c coinmstr.c cojag.c combatsc.c commando.c compgolf.c contra.c coolpool.c coolridr.c cop01.c cosmic.c cowrace.c cps1.c cps2.c cps3.c crbaloon.c crgolf.c crimfght.c crospang.c crshrace.c crystal.c cshooter.c cubeqst.c cubocd32.c cultures.c cvs.c cyberbal.c cybertnk.c dacholer.c dambustr.c darius.c darkhors.c darkmist.c darkseal.c dassault.c dblewing.c dbz.c dcheese.c dcon.c dday.c ddayjlc.c ddealer.c ddenlovr.c ddragon.c ddragon3.c ddrible.c deadang.c dec0.c dec8.c deco156.c deco32.c deco_mlc.c decocass.c deniam.c deshoros.c destroyr.c dgpix.c dietgo.c discoboy.c diverboy.c djboy.c djmain.c dkong.c dlair.c dogfgt.c dooyong.c dorachan.c dotrikun.c dragrace.c dribling.c drmicro.c dunhuang.c dwarfd.c dynax.c egghunt.c enigma2.c eolith.c eolith16.c epos.c equites.c ertictac.c esd16.c esh.c espial.c esripsys.c exedexes.c exerion.c exidy.c exidy440.c exprraid.c exterm.c exzisus.c f1gp.c fantland.c fastfred.c fastlane.c fcombat.c fcrash.c feversoc.c fgoal.c finalizr.c findout.c firebeat.c firetrap.c firetrk.c fitfight.c flkatck.c flower.c flstory.c flyball.c foodf.c forte2.c fortecar.c freekick.c fromanc2.c fromance.c funkybee.c funkyjet.c funworld.c funybubl.c fuukifg2.c fuukifg3.c gaelco.c gaelco2.c gaelco3d.c gaiden.c galaga.c galastrm.c galaxia.c galaxian.c galaxold.c galivan.c galpani2.c galpani3.c galpanic.c galspnbl.c gamecstl.c gameplan.c gaplus.c gauntlet.c gbusters.c gcpinbal.c genesis.c getrivia.c gijoe.c ginganin.c gladiatr.c glass.c gng.c go2000.c goal92.c goindol.c goldstar.c gomoku.c gotcha.c gottlieb.c gotya.c gpworld.c gradius3.c grchamp.c gridlee.c groundfx.c gstream.c gstriker.c gticlub.c guab.c gumbo.c gunbustr.c gundealr.c halleys.c hanaawas.c hanaroku.c hcastle.c hexa.c hexion.c higemaru.c highvdeo.c himesiki.c hnayayoi.c hng64.c holeland.c homedata.c homerun.c hornet.c hotblock.c hshavoc.c hvyunit.c hyhoo.c hyperspt.c hyprduel.c igs017.c igs_blit.c igs_m027.c igspoker.c ilpag.c imolagp.c inufuku.c iqblock.c irobot.c ironhors.c istellar.c itech32.c itech8.c itgambl2.c itgambl3.c itgamble.c jack.c jackal.c jackie.c jalmah.c jangou.c jantotsu.c jchan.c jedi.c jongkyo.c jpmimpct.c jpmsys5.c jrpacman.c junofrst.c kaneko16.c kangaroo.c karnov.c kchamp.c kingdrby.c kingobox.c kingpin.c kinst.c klax.c kncljoe.c koftball.c koikoi.c konamigq.c konamigv.c konamigx.c konamim2.c kopunch.c ksayakyu.c ksys573.c kungfur.c kyugo.c ladybug.c ladyfrog.c laserbas.c laserbat.c lasso.c lastduel.c lastfght.c legionna.c leland.c lemmings.c lethal.c lethalj.c lgp.c liberate.c limenko.c lkage.c lockon.c looping.c lordgun.c lsasquad.c ltcasino.c luckgrln.c lwings.c m10.c m107.c m14.c* m62.c m63.c m72.c m90.c m92.c macrossp.c macs.c madalien.c madmotor.c magicard.c magmax.c mainevt.c mainsnk.c malzak.c mappy.c marinedt.c mario.c markham.c mastboy.c matmania.c maxaflex.c maygay1b.c maygayv1.c mayumi.c mazerbla.c mcatadv.c meadows.c mediagx.c megadriv.c megadriv.h megaplay.c megasys1.c megatech.c megazone.c merit.c meritm.c metlclsh.c metro.c mexico86.c mgolf.c mhavoc.c micro3d.c midvunit.c midzeus.c mikie.c mil4000.c mirage.c mirax.c missb2.c missile.c mitchell.c mjkjidai.c mjsister.c mlanding.c model1.c model2.c model3.c mogura.c momoko.c moo.c mosaic.c mouser.c mpu4.c mpu4drvr.c mquake.c mrflea.c mrjong.c ms32.c msisaac.c mugsmash.c multfish.c multigam.c munchmo.c mustache.c mwarr.c mystston.c mystwarr.c namcofl.c namcoic.c namcona1.c namconb1.c namcos1.c namcos11.c namcos12.c namcos2.c namcos21.c namcos22.c namcos23.c namcos86.c naomi.c naughtyb.c nbmj8688.c nbmj8891.c nbmj8991.c nbmj9195.c nemesis.c neodrvr.c neogeo.c news.c nightgal.c ninjakd2.c ninjaw.c niyanpai.c nmg5.c nmk16.c norautp.c nova2001.c nwk-tr.c nycaptor.c nyny.c offtwall.c ohmygod.c ojankohs.c olibochu.c omegrace.c oneshot.c onetwo.c opwolf.c orbit.c othldrby.c othunder.c overdriv.c pacland.c pacman.c pandoras.c panicr.c paradise.c parodius.c pasha2.c pass.c pbaction.c pcat_nit.c pcktgal.c pcxt.c pengo.c peplus.c pgm.c phoenix.c pingpong.c pipedrm.c pipeline.c pirates.c pitnrun.c pkscram.c pktgaldx.c plygonet.c pntnpuzl.c pokechmp.c polepos.c policetr.c polyplay.c poolshrk.c pooyan.c popeye.c popper.c powerins.c ppmast93.c prehisle.c progolf.c psikyo.c psikyo4.c psikyosh.c psychic5.c pturn.c puckpkmn.c punchout.c pushman.c qdrmfgp.c qix.c quizdna.c quizo.c quizpani.c quizpun2.c r2dtank.c rabbit.c raiden.c raiden2.c rainbow.c rallyx.c rampart.c rastan.c rcorsair.c re900.c redalert.c redclash.c relief.c renegade.c retofinv.c rmhaihai.c rockrage.c rocnrope.c rohga.c rollerg.c rollrace.c roul.c royalmah.c rpunch.c runaway.c rungun.c safarir.c sandscrp.c sangho.c sauro.c sbasketb.c sbowling.c sbrkout.c sbugger.c scotrsht.c scregg.c seattle.c segac2.c segae.c segae.h segag80r.c segag80v.c segahang.c segaorun.c segas16a.c segas16b.c segas18.c segas24.c segas32.c segaxbd.c segaybd.c seibuspi.c seicross.c senjyo.c seta.c seta2.c sf.c sfbonus.c sfkick.c sg1000a.c shadfrce.c shangha3.c shanghai.c shangkid.c shaolins.c shisen.c shootout.c shougi.c shuuz.c sidearms.c sidepckt.c silkroad.c simpl156.c simpsons.c skimaxx.c* skullxbo.c skyarmy.c skyfox.c skykid.c skylncr.c skyraid.c slapfght.c slapshot.c sliver.c slotcarn.c snesb.c snk.c snk68.c snowbros.c solomon.c sonson.c sothello.c spacefb.c spbactn.c spcforce.c spdodgeb.c speedspn.c spiders.c splash.c spool99.c sprcros2.c sprint2.c sprint4.c sprint8.c spy.c srmp2.c srmp5.c srmp6.c srumbler.c ssf2md.c ssfindo.c sshangha.c ssingles.c sslam.c ssozumo.c sspeedr.c ssv.c st0016.c stactics.c stadhero.c starcrus.c starshp1.c starwars.c statriv2.c strnskil.c stv.c stvinit.c suna16.c suna8.c supbtime.c superchs.c superdq.c superqix.c supertnk.c suprgolf.c suprloco.c suprnova.c suprridr.c suprslam.c surpratk.c system1.c system16.c system18.c tagteam.c tail2nos.c taito_b.c taito_f2.c taito_f3.c taito_h.c taito_l.c taito_o.c* taito_x.c taito_z.c taitoair.c taitogn.c taitojc.c taitosj.c taitowlf.c tank8.c tankbatt.c tankbust.c taotaido.c tatsumi.c tbowl.c tcl.c tecmo.c tecmo16.c tecmosys.c tehkanwc.c tempest.c terracre.c tetrisp2.c thayers.c thedeep.c thepit.c thunderj.c thunderx.c tiamc1.c tickee.c tigeroad.c timelimt.c timeplt.c tmaster.c tmnt.c tnzs.c toaplan1.c toaplan2.c toki.c tomcat.c topshoot.c topspeed.c toratora.c toypop.c tp84.c trackfld.c travrusa.c triplhnt.c trucocl.c trvmadns.c trvquest.c tryout.c tsamurai.c ttchamp.c tubep.c tugboat.c tumbleb.c tumblep.c turbo.c tutankhm.c twin16.c twincobr.c twins.c tx1.c uapce.c ultraman.c ultratnk.c ultrsprt.c undrfire.c upscope.c usgames.c vamphalf.c vaportra.c vastar.c vball.c vcombat.c vegaeo.c vegas.c vendetta.c vicdual.c videopin.c videopkr.c vigilant.c vindictr.c viper.c volfied.c wardner.c warpwarp.c warriorb.c wc90.c wc90b.c wecleman.c welltris.c wgp.c wheelfir.c williams.c wink.c wiping.c witch.c wiz.c wolfpack.c wwfsstar.c wwfwfest.c xain.c xexex.c xmen.c xxmissio.c xybots.c xyonix.c yumefuda.c yunsun16.c yunsung8.c zaccaria.c zaxxon.c zerozone.c zn.c zodiack.c zr107.c
[src/mame/includes]	atari.h espial.h esripsys.h genesis.h gottlieb.h konamipt.h lockon.h lordgun.h* model1.h namcoic.h namcos2.h namcos22.h naomi.h ninjakd2.h nmk16.h pitnrun.h slapfght.h
[src/mame/machine]	ajax.c amiga.c archimds.c arkanoid.c asic65.c asteroid.c atari.c atari_vg.c atarifb.c atarigen.c bagman.c balsente.c beezer.c bigevglf.c bublbobl.c buggychl.c carpolo.c cclimber.c cps2crpt.c cubocd32.c dc.c dec0.c deco102.c deco156.c decocass.c decocrpt.c docastle.c fd1089.c fddebug.c flstory.c galaxold.c harddriv.c irobot.c jackal.c kabuki.c konami1.c konamigx.c konppc.c leland.c lkage.c lsasquad.c mathbox.c mc8123.c mexico86.c mhavoc.c midtunit.c midwunit.c midyunit.c model1.c mw8080bw.c n64.c namco50.c namcond1.c namcos1.c namcos2.c naomi.c naomibd.c nb1413m3.c neoboot.c neocrypt.c neoprot.c nycaptor.c opwolf.c pitnrun.c playch10.c qix.c rainbow.c retofinv.c s16fd.c s24fd.c scramble.c scudsp.c segacrpt.c segaic16.c segas32.c seicop.c simpsons.c slapfght.c slikshot.c snes.c snesdsp1.c starwars.c stfight.c stvcd.c stvprot.c system16.c taitosj.c tatsumi.c ticket.c tnzs.c toaplan1.c twincobr.c tx1.c vertigo.c volfied.c vsnes.c williams.c xevious.c zs01.c
[src/mame/video]	1942.c 20pacgal.c 40love.c aeroboto.c aliens.c amiga.c amigaaga.c arabian.c argus.c arkanoid.c armedf.c astrocde.c atari.c atarigt.c atarimo.c atarirle.c atarisy1.c atarisy2.c attckufo.c balsente.c battlane.c battlera.c beathead.c bfm_adr2.c bfm_dm01.c bigevglf.c bionicc.c blktiger.c blstroid.c btime.c btoads.c bwing.c capbowl.c carpolo.c cave.c cbasebal.c cchasm.c changela.c cidelsa.c cinemat.c circus.c cloak.c cloud9.c combatsc.c commando.c contra.c cps1.c crgolf.c crimfght.c crshrace.c cvs.c darius.c dc.c dcheese.c dec0.c dec8.c deco16ic.c deco32.c deco_mlc.c decocass.c dkong.c dogfgt.c dooyong.c dotrikun.c drmicro.c dynax.c dynduke.c eolith.c equites.c espial.c esripsys.c exedexes.c exerion.c exidy.c exidy440.c exterm.c flstory.c fromanc2.c fromance.c fuukifg3.c gaelco2.c gaelco3d.c gaiden.c galastrm.c galaxian.c galaxold.c galpani2.c gameplan.c genesis.c ginganin.c glass.c gng.c goal92.c goldstar.c gottlieb.c gradius3.c grchamp.c gridlee.c groundfx.c gtia.c gticlub.c gunbustr.c harddriv.c hd63484.c hd63484.h himesiki.c hnayayoi.c hng64.c homedata.c hyprduel.c irobot.c itech32.c jagobj.c jaguar.c jedi.c kan_pand.c kaneko16.c kangaroo.c karnov.c konamiic.c ladyfrog.c lastduel.c legionna.c leland.c lemmings.c lethalj.c liberate.c liberatr.c lockon.c lordgun.c lwings.c m10.c m107.c m3raster.c m58.c m72.c m92.c macrossp.c madalien.c madmotor.c magmax.c malzak.c mario.c matmania.c mayumi.c mcatadv.c mcr68.c megasys1.c megazone.c metlclsh.c metro.c midtunit.c midvunit.c midyunit.c midzeus.c midzeus2.c mitchell.c mjsister.c model1.c model2.c model2rd.c model3.c mole.c mrdo.c mrjong.c munchmo.c mystston.c mystwarr.c n64.c namcofl.c namcona1.c namconb1.c namcos1.c namcos2.c namcos21.c namcos22.c naughtyb.c nbmj8688.c nbmj8891.c nbmj8991.c nbmj9195.c nemesis.c neogeo.c ninjakd2.c ninjaw.c niyanpai.c nmk16.c nycaptor.c ojankohs.c othldrby.c othunder.c pacland.c pastelg.c pgm.c phoenix.c pitnrun.c playch10.c policetr.c popeye.c ppu2c0x.c psikyo.c psikyosh.c psx.c psychic5.c qix.c quasar.c quizdna.c realbrk.c redalert.c rohga.c rpunch.c sauro.c segag80r.c segaic16.c segaic24.c segas18.c segas32.c segasyse.c segaybd.c seibuspi.c seta2.c shadfrce.c sidearms.c simpl156.c simpsons.c skydiver.c skyraid.c slapshot.c spacefb.c spbactn.c speedspn.c splash.c srumbler.c sshangha.c ssv.c st0016.c stactics.c stadhero.c starcrus.c starshp1.c stvvdp1.c stvvdp2.c suna16.c suna8.c superchs.c superqix.c suprnova.c system1.c taito_b.c taito_f2.c taito_f3.c taito_o.c* taitoic.c taitojc.c taitosj.c taotaido.c tatsumi.c tceptor.c tecmo16.c thepit.c thief.c thoop2.c tia.c tiamc1.c tigeroad.c tmnt.c toaplan1.c toaplan2.c toki.c toobin.c tryout.c tubep.c tunhunt.c turbo.c twin16.c twincobr.c tx1.c undrfire.c vdc.c victory.c vigilant.c vindictr.c volfied.c vsnes.c wecleman.c williams.c wolfpack.c xmen.c zaxxon.c
[src/mess]	artworkx.c eventlst.c eventlst.h image.c inputx.c mess.c mess.mak messdriv.c mscommon.c uimess.c
[src/mess/audio]	lynx.c mac.c ted7360.c vic6560.c
[src/mess/devices]	bitbngr.c thomflop.c ti99cart.c
[src/mess/drivers]	a2600.c a7800.c abc80.c abc80x.c adam.c ami1200.c amiga.c amstrad.c apexc.c aquarius.c atari.c atarist.c atom.c avigo.c bbc.c bw2.c c128.c c16.c c64.c c65.c coco.c comquest.c cybiko.c dgn_beta.c einstein.c exelv.c ip22.c kc.c kyocera.c lviv.c lynx.c mbee.c msx.c nc.c newbrain.c oric.c osborne1.c osi.c pcw.c pcw16.c pentagon.c pet.c pmd85.c pp01.c ql.c rt1715.c saturn.c scorpion.c sg1000.c sms.c spc1000.c specpls3.c svi318.c ti85.c timex.c tmc1800.c tmc2000e.c tmc600.c vc4000.c vector06.c vip.c vtech2.c x68k.c z88.c
[src/mess/formats]	csw_cas.c thom_cas.c tzx_cas.c uef_cas.c
[src/mess/includes]	msx_slot.h
[src/mess/machine]	99_usbsm.c a7800.c abcbus.c advision.c aim65.c amigacrt.c amigakbd.c amstrad.c apple1.c apple2.c apple2gs.c apple3.c at45dbxx.c ataricrt.c ay3600.c b2m.c bebox.c c128.c c16.c c64.c c65.c cgenie.c comx35.c electron.c galaxy.c gamecom.c gb.c genesis.c hp48.c i82439tx.c i8271.c kaypro.c kc.c lisa.c llc.c lviv.c lynx.c mc10.c mpc105.c mpc105.h msx.c msx_slot.c mtx.c mz700.c nascom1.c nec765.c nes.c odyssey2.c ondra.c oric.c orion.c osborne1.c partner.c pc.c pc1251.c pc1350.c pc8801.c pc_fdc.c pc_hdc.c pc_turbo.c pce.c pdp1.c pecom.c pet.c pk8020.c pmd85.c primo.c radio86.c smartmed.c sms.c snescart.c special.c sst39vfx.c strata.c svi318.c sym1.c ti85.c ti99_4x.c trs80.c vc1541.c vector06.c vtech1.c vtech2.c wswan.c z1013.c zx.c zx8302.c
[src/mess/osd/winui]	swconfig.c
[src/mess/tools/castool]	stubs.c
[src/mess/video]	733_asr.c abc800.c abc802.c abc806.c advision.c aim65.c apple2.c apple2gs.c apple3.c arcadia.c avigo.c cdp1861.c cdp1862.c cdp1864.c cgenie.c channelf.c coco3.c comx35.c cpschngr.c crt.c crt.h crtc6845.c hd66421.c i82720.c k1ge.c kc.c m6847.c mekd2.c microtan.c newport.c odyssey2.c pc8801.c pc_cga.c pc_ega.c pc_mda.c pc_vga.c pdp1.c pecom.c pocketc.c smsvdp.c special.c spectrum.c ssystem3.c ted7360.c ti85.c tmc600.c tms3556.c tms3556.h tx0.c vc4000.c vdc8563.c vic6560.c vic6567.c x68k.c
[src/osd/windows]	d3d8intf.c d3d9intf.c debugwin.c drawd3d.c drawdd.c drawgdi.c input.c ledutil.c output.c video.c winalloc.c window.c windows.mak winprefix.h
[src/tools]	chdman.c jedutil.c ldresample.c ldverify.c regrep.c romcmp.c src2html.c

src/build/file2str.c

r4679	r4680
80	80	}
81	81
82	82	/* write the initial header */
	83	fprintf(dst, "extern const %s %s[];\n", type, varname);
83	84	fprintf(dst, "const %s %s[] =\n{\n\t", type, varname);
84	85
85	86	/* write out the data */

src/mame/audio/cchasm.c

r4679	r4680
33	33	{
34	34	sound_flags |= 0x40;
35	35	soundlatch4_w(space, offset, data);
36		cpu_set_input_line(space->machine->cpu[0], 1, HOLD_LINE);
	36	cputag_set_input_line(space->machine, "maincpu", 1, HOLD_LINE);
37	37	}
38	38
39	39	WRITE16_HANDLER( cchasm_io_w )
r4679	r4680
52	52	sound_flags |= 0x80;
53	53	soundlatch2_w (space, offset, data);
54	54	z80ctc_trg2_w (ctc, 0, 1);
55		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_NMI, PULSE_LINE);
	55	cputag_set_input_line(space->machine, "audiocpu", INPUT_LINE_NMI, PULSE_LINE);
56	56	break;
57	57	case 2:
58	58	led = data;
r4679	r4680
86	86
87	87	static void ctc_interrupt (const device_config *device, int state)
88	88	{
89		cpu_set_input_line(device->machine->cpu[1], 0, state);
	89	cputag_set_input_line(device->machine, "audiocpu", 0, state);
90	90	}
91	91
92	92	static WRITE8_DEVICE_HANDLER( ctc_timer_1_w )

src/mame/audio/suna8.c

r4679	r4680
51	51	int i, len = memory_region_length(machine, "samples");
52	52	UINT8 *ROM = memory_region(machine, "samples");
53	53
54		samplebuf = auto_malloc(len * sizeof(samplebuf[0]));
	54	samplebuf = auto_alloc_array(machine, INT16, len);
55	55
56	56	for(i=0;i<len;i++)
57	57	samplebuf[i] = (INT8)(ROM[i] ^ 0x80) * 256;

src/mame/audio/spacefb.c

r4679	r4680
38	38	{
39	39	const device_config *samples = devtag_get_device(space->machine, "samples");
40	40
41		cpu_set_input_line(space->machine->cpu[1], 0, (data & 0x02) ? CLEAR_LINE : ASSERT_LINE);
	41	cputag_set_input_line(space->machine, "audiocpu", 0, (data & 0x02) ? CLEAR_LINE : ASSERT_LINE);
42	42
43	43	/* enemy killed */
44	44	if (!(data & 0x01) && (spacefb_sound_latch & 0x01))  sample_start(samples, 0,0,0);

src/mame/audio/warpwarp.c

r4679	r4680
208	208	running_machine *machine = device->machine;
209	209	int i;
210	210
211		decay = (INT16 *) auto_malloc(32768 * sizeof(INT16));
	211	decay = auto_alloc_array(machine, INT16, 32768);
212	212
213	213	for( i = 0; i < 0x8000; i++ )
214	214	decay[0x7fff-i] = (INT16) (0x7fff/exp(1.0*i/4096));

src/mame/audio/jaguar.c

r4679	r4680
191	191
192	192	void jaguar_dsp_suspend(running_machine *machine)
193	193	{
194		cpu_suspend(machine->cpu[2], SUSPEND_REASON_SPIN, 1);
	194	cputag_suspend(machine, "audiocpu", SUSPEND_REASON_SPIN, 1);
195	195	}
196	196
197	197
198	198	void jaguar_dsp_resume(running_machine *machine)
199	199	{
200		cpu_resume(machine->cpu[2], SUSPEND_REASON_SPIN);
	200	cputag_resume(machine, "audiocpu", SUSPEND_REASON_SPIN);
201	201	}
202	202
203	203
r4679	r4680
212	212	{
213	213	if (gpu_irq_state & dsp_regs[JINTCTRL] & 0x1f)
214	214	{
215		cpu_set_input_line(machine->cpu[1], 1, ASSERT_LINE);
	215	cputag_set_input_line(machine, "gpu", 1, ASSERT_LINE);
216	216	jaguar_gpu_resume(machine);
217	217	}
218	218	else
219		cpu_set_input_line(machine->cpu[1], 1, CLEAR_LINE);
	219	cputag_set_input_line(machine, "gpu", 1, CLEAR_LINE);
220	220	}
221	221
222	222
r4679	r4680
270	270	}
271	271
272	272	#if ENABLE_SPEEDUP_HACKS
273		memory_install_write32_handler(cpu_get_address_space(machine->cpu[2], ADDRESS_SPACE_PROGRAM), 0xf1a100, 0xf1a103, 0, 0, dsp_flags_w);
	273	memory_install_write32_handler(cputag_get_address_space(machine, "audiocpu", ADDRESS_SPACE_PROGRAM), 0xf1a100, 0xf1a103, 0, 0, dsp_flags_w);
274	274	#endif
275	275	}
276	276
r4679	r4680
362	362	static WRITE32_HANDLER( dsp_flags_w )
363	363	{
364	364	/* write the data through */
365		jaguardsp_ctrl_w(space->machine->cpu[2], offset, data, mem_mask);
	365	jaguardsp_ctrl_w(cputag_get_cpu(space->machine, "audiocpu"), offset, data, mem_mask);
366	366
367	367	/* if they were clearing the A2S interrupt, see if we are headed for the spin */
368	368	/* loop with R22 != 0; if we are, just start spinning again */
369		if (space->cpu == space->machine->cpu[2] && ACCESSING_BITS_8_15 && (data & 0x400))
	369	if (space->cpu == cputag_get_cpu(space->machine, "audiocpu") && ACCESSING_BITS_8_15 && (data & 0x400))
370	370	{
371	371	/* see if we're going back to the spin loop */
372	372	if (!(data & 0x04000) && cpu_get_reg(space->cpu, JAGUAR_R22) != 0)
r4679	r4680
393	393	static TIMER_CALLBACK( serial_chunky_callback )
394	394	{
395	395	/* assert the A2S IRQ on CPU #2 (DSP) */
396		cpu_set_input_line(machine->cpu[2], 1, ASSERT_LINE);
	396	cputag_set_input_line(machine, "audiocpu", 1, ASSERT_LINE);
397	397	jaguar_dsp_resume(machine);
398	398
399	399	/* fix flaky code in interrupt handler which thwarts our speedup */
r4679	r4680
412	412	static TIMER_CALLBACK( serial_callback )
413	413	{
414	414	/* assert the A2S IRQ on CPU #2 (DSP) */
415		cpu_set_input_line(machine->cpu[2], 1, ASSERT_LINE);
	415	cputag_set_input_line(machine, "audiocpu", 1, ASSERT_LINE);
416	416	jaguar_dsp_resume(machine);
417	417	}
418	418
r4679	r4680
468	468	break;
469	469	}
470	470	}
471
472

src/mame/audio/phoenix.c

r4679	r4680
524	524	int i, j;
525	525	UINT32 shiftreg;
526	526
527		poly18 = (UINT32 *)auto_malloc((1ul << (18-5)) * sizeof(UINT32));
	527	poly18 = auto_alloc_array(machine, UINT32, 1ul << (18-5));
528	528
529	529	shiftreg = 0;
530	530	for( i = 0; i < (1ul << (18-5)); i++ )

src/mame/audio/n8080.c

r4679	r4680
201	201	}
202	202	if (changes & ((1 << 0x2) | (1 << 0x3) | (1 << 0x5)))
203	203	{
204		generic_pulse_irq_line(machine->cpu[1], 0);
	204	generic_pulse_irq_line(cputag_get_cpu(machine, "audiocpu"), 0);
205	205	}
206	206	}
207	207
r4679	r4680
225	225	}
226	226	if (changes & ((1 << 0x2) | (1 << 0x3) | (1 << 0x5)))
227	227	{
228		generic_pulse_irq_line(machine->cpu[1], 0);
	228	generic_pulse_irq_line(cputag_get_cpu(machine, "audiocpu"), 0);
229	229	}
230	230	}
231	231
r4679	r4680
240	240
241	241	if (changes & (1 << 6))
242	242	{
243		generic_pulse_irq_line(machine->cpu[1], 0);
	243	generic_pulse_irq_line(cputag_get_cpu(machine, "audiocpu"), 0);
244	244	}
245	245	}
246	246

src/mame/audio/amiga.c

r4679	r4680
82	82
83	83	static TIMER_CALLBACK( signal_irq )
84	84	{
85		amiga_custom_w(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), REG_INTREQ, 0x8000 | (0x80 << param), 0xffff);
	85	amiga_custom_w(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), REG_INTREQ, 0x8000 | (0x80 << param), 0xffff);
86	86	}
87	87
88	88
r4679	r4680
124	124
125	125	static STREAM_UPDATE( amiga_stream_update )
126	126	{
127		amiga_audio *audio = param;
	127	amiga_audio *audio = (amiga_audio *)param;
128	128	int channum, sampoffs = 0;
129	129
130	130	/* if all DMA off, disable all channels */
r4679	r4680
267	267	int i;
268	268
269	269	/* allocate a new audio state */
270		audio_state = device->token;
	270	audio_state = (amiga_audio *)device->token;
271	271	for (i = 0; i < 4; i++)
272	272	{
273	273	audio_state->channel[i].index = i;

src/mame/audio/timeplt.c

r4679	r4680
110	110	if (timeplt_last_irq_state == 0 && data)
111	111	{
112	112	/* setting bit 0 low then high triggers IRQ on the sound CPU */
113		cpu_set_input_line_and_vector(space->machine->cpu[1],0,HOLD_LINE,0xff);
	113	cputag_set_input_line_and_vector(space->machine, "tpsound", 0, HOLD_LINE, 0xff);
114	114	}
115	115
116	116	timeplt_last_irq_state = data;

src/mame/audio/cyberbal.c

r4679	r4680
63	63	memory_set_bankptr(space->machine, 8, &bank_base[0x1000 * ((data >> 6) & 3)]);
64	64	coin_counter_w(1, (data >> 5) & 1);
65	65	coin_counter_w(0, (data >> 4) & 1);
66		cpu_set_input_line(space->machine->cpu[3], INPUT_LINE_RESET, (data & 0x08) ? CLEAR_LINE : ASSERT_LINE);
	66	cputag_set_input_line(space->machine, "dac", INPUT_LINE_RESET, (data & 0x08) ? CLEAR_LINE : ASSERT_LINE);
67	67	if (!(data & 0x01)) devtag_reset(space->machine, "ym");
68	68	}
69	69
r4679	r4680
97	97
98	98	static void update_sound_68k_interrupts(running_machine *machine)
99	99	{
100		cpu_set_input_line(machine->cpu[3], 6, fast_68k_int ? ASSERT_LINE : CLEAR_LINE);
101		cpu_set_input_line(machine->cpu[3], 2, io_68k_int   ? ASSERT_LINE : CLEAR_LINE);
	100	cputag_set_input_line(machine, "dac", 6, fast_68k_int ? ASSERT_LINE : CLEAR_LINE);
	101	cputag_set_input_line(machine, "dac", 2, io_68k_int   ? ASSERT_LINE : CLEAR_LINE);
102	102	}
103	103
104	104

src/mame/audio/galaxian.c

r4679	r4680
197	197	sample_set_volume(device, CHANNEL_LFO+1, LFO_VOLUME);
198	198	sample_set_volume(device, CHANNEL_LFO+2, LFO_VOLUME);
199	199
200		noisewave = auto_malloc(NOISE_LENGTH * sizeof(INT16));
	200	noisewave = auto_alloc_array(machine, INT16, NOISE_LENGTH);
201	201
202	202	#define SHOOT_SEC 2
203	203	shoot_rate = machine->sample_rate;
204	204	shoot_length = SHOOT_SEC * shoot_rate;
205		shootwave = auto_malloc(shoot_length * sizeof(INT16));
	205	shootwave = auto_alloc_array(machine, INT16, shoot_length);
206	206
207	207	/*
208	208	* The RNG shifter is clocked with RNG_RATE, bit 17 is

src/mame/audio/trackfld.c

r4679	r4680
86	86	if (last == 0 && data)
87	87	{
88	88	/* setting bit 0 low then high triggers IRQ on the sound CPU */
89		cpu_set_input_line_and_vector(space->machine->cpu[1],0,HOLD_LINE,0xff);
	89	cputag_set_input_line_and_vector(space->machine, "audiocpu", 0, HOLD_LINE, 0xff);
90	90	}
91	91
92	92	last = data;

src/mame/audio/turbo.c

r4679	r4680
73	73	WRITE8_DEVICE_HANDLER( turbo_sound_a_w )
74	74	{
75	75	const device_config *samples = devtag_get_device(device->machine, "samples");
76		turbo_state *state = device->machine->driver_data;
	76	turbo_state *state = (turbo_state *)device->machine->driver_data;
77	77	UINT8 diff = data ^ state->sound_state[0];
78	78	state->sound_state[0] = data;
79	79
r4679	r4680
122	122	WRITE8_DEVICE_HANDLER( turbo_sound_b_w )
123	123	{
124	124	const device_config *samples = devtag_get_device(device->machine, "samples");
125		turbo_state *state = device->machine->driver_data;
	125	turbo_state *state = (turbo_state *)device->machine->driver_data;
126	126	UINT8 diff = data ^ state->sound_state[1];
127	127	state->sound_state[1] = data;
128	128
r4679	r4680
145	145	WRITE8_DEVICE_HANDLER( turbo_sound_c_w )
146	146	{
147	147	const device_config *samples = devtag_get_device(device->machine, "samples");
148		turbo_state *state = device->machine->driver_data;
	148	turbo_state *state = (turbo_state *)device->machine->driver_data;
149	149
150	150	/* OSEL1-2 */
151	151	state->turbo_osel = (state->turbo_osel & 1) | ((data & 3) << 1);
r4679	r4680
295	295
296	296	WRITE8_DEVICE_HANDLER( subroc3d_sound_a_w )
297	297	{
298		turbo_state *state = device->machine->driver_data;
	298	turbo_state *state = (turbo_state *)device->machine->driver_data;
299	299	state->sound_state[0] = data;
300	300
301	301	/* DIS0-3 contained in bits 0-3 */
r4679	r4680
326	326	WRITE8_DEVICE_HANDLER( subroc3d_sound_b_w )
327	327	{
328	328	const device_config *samples = devtag_get_device(device->machine, "samples");
329		turbo_state *state = device->machine->driver_data;
	329	turbo_state *state = (turbo_state *)device->machine->driver_data;
330	330	UINT8 diff = data ^ state->sound_state[1];
331	331	state->sound_state[1] = data;
332	332
r4679	r4680
382	382	WRITE8_DEVICE_HANDLER( subroc3d_sound_c_w )
383	383	{
384	384	const device_config *samples = devtag_get_device(device->machine, "samples");
385		turbo_state *state = device->machine->driver_data;
	385	turbo_state *state = (turbo_state *)device->machine->driver_data;
386	386	UINT8 diff = data ^ state->sound_state[2];
387	387	state->sound_state[2] = data;
388	388
r4679	r4680
507	507	WRITE8_DEVICE_HANDLER( buckrog_sound_a_w )
508	508	{
509	509	const device_config *samples = devtag_get_device(device->machine, "samples");
510		turbo_state *state = device->machine->driver_data;
	510	turbo_state *state = (turbo_state *)device->machine->driver_data;
511	511	UINT8 diff = data ^ state->sound_state[0];
512	512	state->sound_state[0] = data;
513	513
r4679	r4680
533	533	WRITE8_DEVICE_HANDLER( buckrog_sound_b_w )
534	534	{
535	535	const device_config *samples = devtag_get_device(device->machine, "samples");
536		turbo_state *state = device->machine->driver_data;
	536	turbo_state *state = (turbo_state *)device->machine->driver_data;
537	537	UINT8 diff = data ^ state->sound_state[1];
538	538	state->sound_state[1] = data;
539	539

src/mame/audio/redbaron.c

r4679	r4680
172	172	{
173	173	int i;
174	174
175		vol_lookup = (INT16 *)auto_malloc(32768 * sizeof(INT16));
	175	vol_lookup = auto_alloc_array(device->machine, INT16, 32768);
176	176	for( i = 0; i < 0x8000; i++ )
177	177	vol_lookup[0x7fff-i] = (INT16) (0x7fff/exp(1.0*i/4096));
178	178

src/mame/audio/senjyo.c

r4679	r4680
76	76	running_machine *machine = device->machine;
77	77	int i;
78	78
79		_single = (INT16 *)auto_malloc(SINGLE_LENGTH*2);
	79	_single = auto_alloc_array(machine, INT16, SINGLE_LENGTH);
80	80
81	81	for (i = 0;i < SINGLE_LENGTH;i++)      /* freq = ctc2 zco / 8 */
82	82	_single[i] = ((i/SINGLE_DIVIDER)&0x01)*127*256;

src/mame/audio/exidy440.c

r4679	r4680
166	166
167	167	/* allocate the sample cache */
168	168	length = memory_region_length(machine, "cvsd") * 16 + MAX_CACHE_ENTRIES * sizeof(sound_cache_entry);
169		sound_cache = auto_malloc(length);
	169	sound_cache = (sound_cache_entry *)auto_alloc_array(machine, UINT8, length);
170	170
171	171	/* determine the hard end of the cache and reset */
172	172	sound_cache_max = (sound_cache_entry *)((UINT8 *)sound_cache + length);
173	173	reset_sound_cache();
174	174
175	175	/* allocate the mixer buffer */
176		mixer_buffer_left = auto_malloc(2 * device->clock * sizeof(INT32));
	176	mixer_buffer_left = auto_alloc_array(machine, INT32, 2 * device->clock);
177	177	mixer_buffer_right = mixer_buffer_left + device->clock;
178	178
179	179	if (SOUND_LOG)
r4679	r4680
339	339	static READ8_HANDLER( sound_command_r )
340	340	{
341	341	/* clear the FIRQ that got us here and acknowledge the read to the main CPU */
342		cpu_set_input_line(space->machine->cpu[1], 1, CLEAR_LINE);
	342	cputag_set_input_line(space->machine, "audiocpu", 1, CLEAR_LINE);
343	343	exidy440_sound_command_ack = 1;
344	344
345	345	return exidy440_sound_command;
r4679	r4680
375	375
376	376	static WRITE8_HANDLER( sound_interrupt_clear_w )
377	377	{
378		cpu_set_input_line(space->machine->cpu[1], 0, CLEAR_LINE);
	378	cputag_set_input_line(space->machine, "audiocpu", 0, CLEAR_LINE);
379	379	}
380	380
381	381
r4679	r4680
774	774	int chunk_start;
775	775
776	776	/* compute the charge, decay, and leak constants */
777		charge = pow(exp(-1), 1.0 / (FILTER_CHARGE_TC * (double)frequency));
778		decay = pow(exp(-1), 1.0 / (FILTER_DECAY_TC * (double)frequency));
779		leak = pow(exp(-1), 1.0 / (INTEGRATOR_LEAK_TC * (double)frequency));
	777	charge = pow(exp(-1.0), 1.0 / (FILTER_CHARGE_TC * (double)frequency));
	778	decay = pow(exp(-1.0), 1.0 / (FILTER_DECAY_TC * (double)frequency));
	779	leak = pow(exp(-1.0), 1.0 / (INTEGRATOR_LEAK_TC * (double)frequency));
780	780
781	781	/* compute the gain */
782	782	gain = SAMPLE_GAIN;

src/mame/audio/bzone.c

r4679	r4680
274	274	{
275	275	int i;
276	276
277		discharge = (INT16 *)auto_malloc(32768 * sizeof(INT16));
	277	discharge = auto_alloc_array(device->machine, INT16, 32768);
278	278	for( i = 0; i < 0x8000; i++ )
279	279	discharge[0x7fff-i] = (INT16) (0x7fff/exp(1.0*i/4096));
280	280

src/mame/audio/cclimber.c

r4679	r4680
18	18	running_machine *machine = device->machine;
19	19	samplebuf = 0;
20	20	if (memory_region(machine, "samples"))
21		samplebuf = auto_malloc(sizeof(*samplebuf)*2*memory_region_length(machine, "samples"));
	21	samplebuf = auto_alloc_array(machine, INT16, 2 * memory_region_length(machine, "samples"));
22	22	}
23	23
24	24

src/mame/audio/mcr.c

r4679	r4680
69	69	/* Chip Squeak Deluxe-specific globals */
70	70	static const device_config *csdeluxe_sound_cpu;
71	71	static UINT8 csdeluxe_status;
72		static const pia6821_interface csdeluxe_pia_intf;
73	72
74	73	/* Turbo Chip Squeak-specific globals */
75	74	static const device_config *turbocs_sound_cpu;
76	75	static UINT8 turbocs_status;
77		static const pia6821_interface turbocs_pia_intf;
78	76
79	77	/* Sounds Good-specific globals */
80	78	static const device_config *soundsgood_sound_cpu;
81	79	static UINT8 soundsgood_status;
82		static const pia6821_interface soundsgood_pia_intf;
83	80
84	81	/* Squawk n' Talk-specific globals */
85	82	static const device_config *squawkntalk_sound_cpu;
86	83	static UINT8 squawkntalk_tms_command;
87	84	static UINT8 squawkntalk_tms_strobes;
88		static const pia6821_interface squawkntalk_pia0_intf;
89		static const pia6821_interface squawkntalk_pia1_intf;
90	85
91	86
92	87

src/mame/audio/cliffhgr.c

r4679	r4680
25	25	8
26	26	};
27	27
	28	DISCRETE_SOUND_EXTERN(cliffhgr);
	29
28	30	DISCRETE_SOUND_START(cliffhgr)
29	31	DISCRETE_INPUT_LOGIC(CLIFF_ENABLE_SND_1)
30	32	DISCRETE_INPUT_LOGIC(CLIFF_ENABLE_SND_2)

src/mame/audio/segasnd.c

r4679	r4680
214	214	speech_latch = data;
215	215
216	216	/* the high bit goes directly to the INT line */
217		cpu_set_input_line(machine->cpu[1], 0, (data & 0x80) ? CLEAR_LINE : ASSERT_LINE);
	217	cputag_set_input_line(machine, "audiocpu", 0, (data & 0x80) ? CLEAR_LINE : ASSERT_LINE);
218	218
219	219	/* a clock on the high bit clocks a 1 into T0 */
220	220	if (!(old & 0x80) && (data & 0x80))
r4679	r4680
650	650	assert(usb.cpu != NULL);
651	651
652	652	/* allocate work RAM */
653		usb.work_ram = auto_malloc(0x400);
	653	usb.work_ram = auto_alloc_array(machine, UINT8, 0x400);
654	654
655	655	/* create a sound stream */
656	656	usb.stream = stream_create(device, 0, 1, SAMPLE_RATE, NULL, usb_stream_update);

src/mame/audio/aztarac.c

r4679	r4680
23	23	soundlatch_w(space, offset, data);
24	24	sound_status ^= 0x21;
25	25	if (sound_status & 0x20)
26		cpu_set_input_line(space->machine->cpu[1], 0, HOLD_LINE);
	26	cputag_set_input_line(space->machine, "audiocpu", 0, HOLD_LINE);
27	27	}
28	28	}
29	29
r4679	r4680
51	51	if (sound_status & 0x10)
52	52	cpu_set_input_line(device,0,HOLD_LINE);
53	53	}
54
55

src/mame/audio/irem.c

r4679	r4680
40	40	if ((data & 0x80) == 0)
41	41	soundlatch_w(space, 0, data & 0x7f);
42	42	else
43		cpu_set_input_line(space->machine->cpu[1], 0, ASSERT_LINE);
	43	cputag_set_input_line(space->machine, "iremsound", 0, ASSERT_LINE);
44	44	}
45	45
46	46
r4679	r4680
152	152
153	153	static WRITE8_HANDLER( sound_irq_ack_w )
154	154	{
155		cpu_set_input_line(space->machine->cpu[1], 0, CLEAR_LINE);
	155	cputag_set_input_line(space->machine, "iremsound", 0, CLEAR_LINE);
156	156	}
157	157
158	158
r4679	r4680
191	191	{
192	192	const device_config *msm2 = devtag_get_device(device->machine, "msm2");
193	193
194		cpu_set_input_line(device->machine->cpu[1], INPUT_LINE_NMI, PULSE_LINE);
	194	cputag_set_input_line(device->machine, "iremsound", INPUT_LINE_NMI, PULSE_LINE);
195	195
196	196	/* the first MSM5205 clocks the second */
197	197	if (msm2 != NULL)
198	198	{
199		msm5205_vclk_w(msm2,1);
200		msm5205_vclk_w(msm2,0);
	199	msm5205_vclk_w(msm2, 1);
	200	msm5205_vclk_w(msm2, 0);
201	201	}
202	202	}
203	203

src/mame/audio/wiping.c

r4679	r4680
52	52
53	53
54	54	/* build a table to divide by the number of voices; gain is specified as gain*16 */
55		static void make_mixer_table(int voices, int gain)
	55	static void make_mixer_table(running_machine *machine, int voices, int gain)
56	56	{
57	57	int count = voices * 128;
58	58	int i;
59	59
60	60	/* allocate memory */
61		mixer_table = auto_malloc(256 * voices * sizeof(INT16));
	61	mixer_table = auto_alloc_array(machine, INT16, 256 * voices);
62	62
63	63	/* find the middle of the table */
64	64	mixer_lookup = mixer_table + (128 * voices);
r4679	r4680
167	167	stream = stream_create(device, 0, 1, samplerate, NULL, wiping_update_mono);
168	168
169	169	/* allocate a pair of buffers to mix into - 1 second's worth should be more than enough */
170		mixer_buffer = auto_malloc(2 * sizeof(short) * samplerate);
	170	mixer_buffer = auto_alloc_array(machine, short, 2 * samplerate);
171	171	mixer_buffer_2 = mixer_buffer + samplerate;
172	172
173	173	/* build the mixer table */
174		make_mixer_table(8, defgain);
	174	make_mixer_table(device->machine, 8, defgain);
175	175
176	176	/* extract globals from the interface */
177	177	num_voices = 8;

src/mame/audio/meadows.c

r4679	r4680
68	68	/* amplitude is a combination of the upper 4 bits of 0c01 */
69	69	/* and bit 4 merged from S2650's flag output */
70	70	amp = ((meadows_0c03 & ENABLE_CTR1) == 0) ? 0 : (meadows_0c01 & 0xf0) >> 1;
71		if( cpu_get_reg(machine->cpu[0], S2650_FO) )
	71	if( cpu_get_reg(cputag_get_cpu(machine, "maincpu"), S2650_FO) )
72	72	amp += 0x80;
73	73	/* calculate frequency for counter #1 */
74	74	/* bit 0..3 of 0c01 are ctr preset */

src/mame/audio/leland.c

r4679	r4680
142	142	dac_stream = stream_create(device, 0, 1, 256*60, NULL, leland_update);
143	143
144	144	/* allocate memory */
145		dac_buffer[0] = auto_malloc(DAC_BUFFER_SIZE);
146		dac_buffer[1] = auto_malloc(DAC_BUFFER_SIZE);
	145	dac_buffer[0] = auto_alloc_array(device->machine, UINT8, DAC_BUFFER_SIZE);
	146	dac_buffer[1] = auto_alloc_array(device->machine, UINT8, DAC_BUFFER_SIZE);
147	147	}
148	148
149	149
r4679	r4680
380	380
381	381	static STREAM_UPDATE( leland_80186_dma_update )
382	382	{
383		const address_space *dmaspace = param;
	383	const address_space *dmaspace = (const address_space *)param;
384	384	stream_sample_t *buffer = outputs[0];
385	385	int i, j;
386	386
r4679	r4680
651	651	if (LOG_INTERRUPTS) logerror("(%f) **** Acknowledged interrupt vector %02X\n", attotime_to_double(timer_get_time(device->machine)), i80186.intr.poll_status & 0x1f);
652	652
653	653	/* clear the interrupt */
654		device_set_info_int(device, CPUINFO_INT_INPUT_STATE + 0, CLEAR_LINE);
	654	cpu_set_info(device, CPUINFO_INT_INPUT_STATE + 0, CLEAR_LINE);
655	655	i80186.intr.pending = 0;
656	656
657	657	/* clear the request and set the in-service bit */
r4679	r4680
759	759	/* generate the appropriate interrupt */
760	760	i80186.intr.poll_status = 0x8000 | new_vector;
761	761	if (!i80186.intr.pending)
762		cpu_set_input_line(machine->cpu[2], 0, ASSERT_LINE);
	762	cputag_set_input_line(machine, "audiocpu", 0, ASSERT_LINE);
763	763	i80186.intr.pending = 1;
764	764	if (LOG_INTERRUPTS) logerror("(%f) **** Requesting interrupt vector %02X\n", attotime_to_double(timer_get_time(machine)), new_vector);
765	765	}
r4679	r4680
1695	1695	}
1696	1696
1697	1697	/* /RESET */
1698		cpu_set_input_line(space->machine->cpu[2], INPUT_LINE_RESET, data & 0x80  ? CLEAR_LINE : ASSERT_LINE);
	1698	cputag_set_input_line(space->machine, "audiocpu", INPUT_LINE_RESET, data & 0x80  ? CLEAR_LINE : ASSERT_LINE);
1699	1699
1700	1700	/* /NMI */
1701	1701	/*  If the master CPU doesn't get a response by the time it's ready to send
1702	1702	the next command, it uses an NMI to force the issue; unfortunately, this
1703	1703	seems to really screw up the sound system. It turns out it's better to
1704	1704	just wait for the original interrupt to occur naturally */
1705		/*  cpu_set_input_line(space->machine->cpu[2], INPUT_LINE_NMI, data & 0x40  ? CLEAR_LINE : ASSERT_LINE);*/
	1705	/*  cputag_set_input_line(space->machine, "audiocpu", INPUT_LINE_NMI, data & 0x40  ? CLEAR_LINE : ASSERT_LINE);*/
1706	1706
1707	1707	/* INT0 */
1708	1708	if (data & 0x20)
r4679	r4680
1777	1777	static TIMER_CALLBACK( delayed_response_r )
1778	1778	{
1779	1779	int checkpc = param;
1780		int pc = cpu_get_reg(machine->cpu[0], Z80_PC);
1781		int oldaf = cpu_get_reg(machine->cpu[0], Z80_AF);
	1780	int pc = cpu_get_reg(cputag_get_cpu(machine, "master"), Z80_PC);
	1781	int oldaf = cpu_get_reg(cputag_get_cpu(machine, "master"), Z80_AF);
1782	1782
1783	1783	/* This is pretty cheesy, but necessary. Since the CPUs run in round-robin order,
1784	1784	synchronizing on the write to this register from the slave side does nothing.
r4679	r4680
1791	1791	if (LOG_COMM) logerror("(Updated sound response latch to %02X)\n", sound_response);
1792	1792
1793	1793	oldaf = (oldaf & 0x00ff) | (sound_response << 8);
1794		cpu_set_reg(machine->cpu[0], Z80_AF, oldaf);
	1794	cpu_set_reg(cputag_get_cpu(machine, "master"), Z80_AF, oldaf);
1795	1795	}
1796	1796	else
1797	1797	logerror("ERROR: delayed_response_r - current PC = %04X, checkPC = %04X\n", pc, checkpc);

src/mame/audio/carnival.c

r4679	r4680
44	44
45	45
46	46	#define   PSG_CLOCK      (3579545 / 3)   /* Hz */
47		#define CPU_MUSIC_ID    (1)             /* music CPU id number */
48	47
49	48
50	49	/* output port 0x01 definitions - sound effect drive outputs */
r4679	r4680
237	236
238	237	if ( bitsGoneHigh & OUT_PORT_2_MUSIC_RESET )
239	238	/* reset output is no longer asserted active low */
240		cpu_set_input_line(space->machine->cpu[CPU_MUSIC_ID], INPUT_LINE_RESET, PULSE_LINE );
	239	cputag_set_input_line(space->machine, "audiocpu", INPUT_LINE_RESET, PULSE_LINE );
241	240	}
242	241
243	242

src/mame/audio/gomoku.c

r4679	r4680
53	53
54	54
55	55	/* build a table to divide by the number of voices; gain is specified as gain*16 */
56		static void make_mixer_table(int voices, int gain)
	56	static void make_mixer_table(running_machine *machine, int voices, int gain)
57	57	{
58	58	int count = voices * 128;
59	59	int i;
60	60
61	61	/* allocate memory */
62		mixer_table = auto_malloc(256 * voices * sizeof(INT16));
	62	mixer_table = auto_alloc_array(machine, INT16, 256 * voices);
63	63
64	64	/* find the middle of the table */
65	65	mixer_lookup = mixer_table + (128 * voices);
r4679	r4680
170	170	stream = stream_create(device, 0, 1, samplerate, NULL, gomoku_update_mono);
171	171
172	172	/* allocate a pair of buffers to mix into - 1 second's worth should be more than enough */
173		mixer_buffer = auto_malloc(2 * sizeof(short) * samplerate);
	173	mixer_buffer = auto_alloc_array(machine, short, 2 * samplerate);
174	174	mixer_buffer_2 = mixer_buffer + samplerate;
175	175
176	176	/* build the mixer table */
177		make_mixer_table(8, defgain);
	177	make_mixer_table(machine, 8, defgain);
178	178
179	179	/* extract globals from the interface */
180	180	num_voices = MAX_VOICES;

src/mame/audio/dkong.c

r4679	r4680
304	304
305	305	static DISCRETE_STEP( dkong_custom_mixer )
306	306	{
307		struct dkong_custom_mixer_context *context = node->context;
	307	struct dkong_custom_mixer_context *context = (struct dkong_custom_mixer_context *)node->context;
308	308
309	309	int      in_1    = (int)DKONG_CUSTOM_IN1;
310	310
r4679	r4680
323	323
324	324	static DISCRETE_RESET( dkong_custom_mixer )
325	325	{
326		struct dkong_custom_mixer_context *context = node->context;
	326	struct dkong_custom_mixer_context *context = (struct dkong_custom_mixer_context *)node->context;
327	327
328	328	/* everything is based on the input to the O.C. inverter */
329	329	/* precalculate current from In1 */
r4679	r4680
975	975
976	976	static SOUND_START( dkong)
977	977	{
978		dkong_state *state = machine->driver_data;
	978	dkong_state *state = (dkong_state *)machine->driver_data;
979	979
980	980	state->snd_rom = memory_region(machine, "soundcpu");
981	981	state->dev_vp2 = devtag_get_device(machine, "virtual_p2");
r4679	r4680
1106	1106
1107	1107	static READ8_DEVICE_HANDLER( dkong_tune_r )
1108	1108	{
1109		dkong_state *state = device->machine->driver_data;
	1109	dkong_state *state = (dkong_state *)device->machine->driver_data;
1110	1110	UINT8 page = latch8_r(state->dev_vp2,0) & 0x47;
1111	1111
1112	1112	if ( page & 0x40 )
r4679	r4680
1135	1135	WRITE8_HANDLER( dkong_audio_irq_w )
1136	1136	{
1137	1137	if (data)
1138		cpu_set_input_line(space->machine->cpu[1], 0, ASSERT_LINE);
	1138	cputag_set_input_line(space->machine, "soundcpu", 0, ASSERT_LINE);
1139	1139	else
1140		cpu_set_input_line(space->machine->cpu[1], 0, CLEAR_LINE);
	1140	cputag_set_input_line(space->machine, "soundcpu", 0, CLEAR_LINE);
1141	1141	}
1142	1142
1143	1143

src/mame/audio/harddriv.c

r4679	r4680
53	53	{
54	54	rombase = (UINT8 *)memory_region(machine, "serialroms");
55	55	romsize = memory_region_length(machine, "serialroms");
56		comram = (UINT16 *)auto_malloc(0x400);
	56	comram = auto_alloc_array(machine, UINT16, 0x400/2);
57	57	last_bio_cycles = 0;
58	58	}
59	59

src/mame/audio/seibu.c

r4679	r4680
105	105	void seibu_sound_decrypt(running_machine *machine,const char *cpu,int length)
106	106	{
107	107	const address_space *space = cputag_get_address_space(machine, cpu, ADDRESS_SPACE_PROGRAM);
108		UINT8 *decrypt = auto_malloc(length);
	108	UINT8 *decrypt = auto_alloc_array(machine, UINT8, length);
109	109	UINT8 *rom = memory_region(machine, cpu);
110	110	int i;
111	111
r4679	r4680
144	144
145	145	static STREAM_UPDATE( seibu_adpcm_callback )
146	146	{
147		seibu_adpcm_state *state = param;
	147	seibu_adpcm_state *state = (seibu_adpcm_state *)param;
148	148	stream_sample_t *dest = outputs[0];
149	149
150	150	while (state->playing && samples > 0)
r4679	r4680
172	172	static DEVICE_START( seibu_adpcm )
173	173	{
174	174	running_machine *machine = device->machine;
175		seibu_adpcm_state *state = device->token;
	175	seibu_adpcm_state *state = (seibu_adpcm_state *)device->token;
176	176
177	177	state->playing = 0;
178	178	state->stream = stream_create(device, 0, 1, device->clock, state, seibu_adpcm_callback);
r4679	r4680
215	215
216	216	WRITE8_DEVICE_HANDLER( seibu_adpcm_adr_w )
217	217	{
218		seibu_adpcm_state *state = device->token;
	218	seibu_adpcm_state *state = (seibu_adpcm_state *)device->token;
219	219
220	220	if (state->stream)
221	221	stream_update(state->stream);
r4679	r4680
232	232
233	233	WRITE8_DEVICE_HANDLER( seibu_adpcm_ctl_w )
234	234	{
235		seibu_adpcm_state *state = device->token;
	235	seibu_adpcm_state *state = (seibu_adpcm_state *)device->token;
236	236
237	237	// sequence is 00 02 01 each time.
238	238	if (state->stream)

src/mame/audio/geebee.c

r4679	r4680
116	116	running_machine *machine = device->machine;
117	117	int i;
118	118
119		decay = (UINT16 *)auto_malloc(32768 * sizeof(INT16));
	119	decay = auto_alloc_array(machine, UINT16, 32768);
120	120
121	121	for( i = 0; i < 0x8000; i++ )
122	122	decay[0x7fff-i] = (INT16) (0x7fff/exp(1.0*i/4096));

src/mame/audio/fghtbskt.c

r4679	r4680
24	24	int i, len = memory_region_length(machine, "samples");
25	25	UINT8 *ROM = memory_region(machine, "samples");
26	26
27		samplebuf = auto_malloc(len * 2);
	27	samplebuf = auto_alloc_array(machine, INT16, len);
28	28
29	29	for(i=0;i<len;i++)
30	30	samplebuf[i] = ((INT8)(ROM[i] ^ 0x80)) * 256;

src/mame/audio/tiamc1.c

r4679	r4680
246	246
247	247	static STREAM_UPDATE( tiamc1_sound_update )
248	248	{
249		int count, o0, o1, o2, len, or = 0;
	249	int count, o0, o1, o2, len, orval = 0;
250	250
251	251	len = samples * CLOCK_DIVIDER;
252	252
r4679	r4680
271	271	o1 = timer8253_get_output(&timer0, 1) ? 1 : 0;
272	272	o2 = timer8253_get_output(&timer0, 2) ? 1 : 0;
273	273
274		or = (or << 1) | (((o0 | o1) ^ 0xff) & o2);
	274	orval = (orval << 1) | (((o0 | o1) ^ 0xff) & o2);
275	275
276	276	if ((count + 1) % CLOCK_DIVIDER == 0) {
277		outputs[0][count / CLOCK_DIVIDER] = or ? 0x2828 : 0;
278		or = 0;
	277	outputs[0][count / CLOCK_DIVIDER] = orval ? 0x2828 : 0;
	278	orval = 0;
279	279	}
280	280	}
281	281	}

src/mame/audio/segag80r.c

r4679	r4680
946	946	D3    = /INT line
947	947	*/
948	948	n7751_command = data & 0x07;
949		cpu_set_input_line(device->machine->cpu[1], 0, ((data & 0x08) == 0) ? ASSERT_LINE : CLEAR_LINE);
	949	cputag_set_input_line(device->machine, "audiocpu", 0, ((data & 0x08) == 0) ? ASSERT_LINE : CLEAR_LINE);
950	950	cpuexec_boost_interleave(device->machine, attotime_zero, ATTOTIME_IN_USEC(100));
951	951	}
952	952

src/mame/audio/pleiads.c

r4679	r4680
459	459	int i, j;
460	460	UINT32 shiftreg;
461	461
462		poly18 = (UINT32 *)auto_malloc((1ul << (18-5)) * sizeof(UINT32));
	462	poly18 = auto_alloc_array(machine, UINT32, 1ul << (18-5));
463	463
464	464	shiftreg = 0;
465	465	for( i = 0; i < (1ul << (18-5)); i++ )

src/mame/audio/flower.c

r4679	r4680
52	52
53	53
54	54	/* build a table to divide by the number of voices; gain is specified as gain*16 */
55		static void make_mixer_table(int voices, int gain)
	55	static void make_mixer_table(running_machine *machine, int voices, int gain)
56	56	{
57	57	int count = voices * 128;
58	58	int i;
59	59
60	60	/* allocate memory */
61		mixer_table = auto_malloc(256 * voices * sizeof(INT16));
	61	mixer_table = auto_alloc_array(machine, INT16, 256 * voices);
62	62
63	63	/* find the middle of the table */
64	64	mixer_lookup = mixer_table + (128 * voices);
r4679	r4680
162	162	stream = stream_create(device, 0, 1, samplerate, 0, flower_update_mono);
163	163
164	164	/* allocate a pair of buffers to mix into - 1 second's worth should be more than enough */
165		mixer_buffer = auto_malloc(2 * sizeof(short) * samplerate);
	165	mixer_buffer = auto_alloc_array(device->machine, short, 2 * samplerate);
166	166	mixer_buffer_2 = mixer_buffer + samplerate;
167	167
168	168	/* build the mixer table */
169		make_mixer_table(8, defgain);
	169	make_mixer_table(machine, 8, defgain);
170	170
171	171	/* extract globals from the interface */
172	172	num_voices = 8;

src/mame/audio/redalert.c

r4679	r4680
43	43	static UINT8 ay8910_latch_1;
44	44	static UINT8 ay8910_latch_2;
45	45
46		static UINT8 ay8910_latch_1;
47	46
48	47
49
50	48	/*************************************
51	49	*
52	50	*  Read Alert analog sounds
r4679	r4680
83	81	/* D7 is also connected to the NMI input of the CPU -
84	82	the NMI is actually toggled by a 74121 */
85	83	if ((data & 0x80) == 0x00)
86		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_NMI, PULSE_LINE);
	84	cputag_set_input_line(space->machine, "audiocpu", INPUT_LINE_NMI, PULSE_LINE);
87	85	}
88	86
89	87
r4679	r4680
166	164	WRITE8_HANDLER( redalert_voice_command_w )
167	165	{
168	166	soundlatch2_w(space, 0, (data & 0x78) >> 3);
169		cpu_set_input_line(space->machine->cpu[2], I8085_RST75_LINE, (~data & 0x80) ? ASSERT_LINE : CLEAR_LINE);
	167	cputag_set_input_line(space->machine, "voice", I8085_RST75_LINE, (~data & 0x80) ? ASSERT_LINE : CLEAR_LINE);
170	168	}
171	169
172	170
r4679	r4680
293	291	{
294	292	/* the byte is connected to port A of the AY8910 */
295	293	soundlatch_w(space, 0, data);
296		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_NMI, PULSE_LINE);
	294	cputag_set_input_line(space->machine, "audiocpu", INPUT_LINE_NMI, PULSE_LINE);
297	295	}
298	296
299	297

src/mame/audio/starwars.c

r4679	r4680
65	65
66	66	static void snd_interrupt(const device_config *device, int state)
67	67	{
68		cpu_set_input_line(device->machine->cpu[1], M6809_IRQ_LINE, state);
	68	cputag_set_input_line(device->machine, "audiocpu", M6809_IRQ_LINE, state);
69	69	}
70	70
71	71
r4679	r4680
148	148	riot6532_porta_in_set(riot, 0x00, 0xc0);
149	149
150	150	/* reset sound CPU here  */
151		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_RESET, PULSE_LINE);
	151	cputag_set_input_line(space->machine, "audiocpu", INPUT_LINE_RESET, PULSE_LINE);
152	152	}

src/mame/audio/mario.c

r4679	r4680
190	190
191	191	static DISCRETE_STEP( mario_custom_run )
192	192	{
193		struct mario_custom_run_context *context = node->context;
	193	struct mario_custom_run_context *context = (struct mario_custom_run_context *)node->context;
194	194
195	195	double   t1   = 0.5 / LS624_F(MARIO_CUSTOM_C1, MARIO_CUSTOM_IN1, RUN_VCO_VOLTAGE);
196	196	double   t2   = 0.5 / LS624_F(MARIO_CUSTOM_C2, MARIO_CUSTOM_IN2, RUN_VCO_VOLTAGE);
r4679	r4680
248	248
249	249	static DISCRETE_RESET( mario_custom_run )
250	250	{
251		struct mario_custom_run_context *context = node->context;
	251	struct mario_custom_run_context *context = (struct mario_custom_run_context *)node->context;
252	252
253	253	context->remain1 = 0.0;
254	254	context->remain2 = 0.0;
r4679	r4680
363	363
364	364	static void set_ea(const address_space *space, int ea)
365	365	{
366		mario_state   *state = space->machine->driver_data;
	366	mario_state   *state = (mario_state *)space->machine->driver_data;
367	367	//printf("ea: %d\n", ea);
368	368	//cputag_set_input_line(machine, "audiocpu", MCS48_INPUT_EA, (ea) ? ASSERT_LINE : CLEAR_LINE);
369	369	if (state->eabank != 0)
r4679	r4680
378	378
379	379	static SOUND_START( mario )
380	380	{
381		mario_state   *state = machine->driver_data;
	381	mario_state   *state = (mario_state *)machine->driver_data;
382	382	const device_config *audiocpu = cputag_get_cpu(machine, "audiocpu");
383	383	#if USE_8039
384	384	UINT8 *SND = memory_region(machine, "audiocpu");
r4679	r4680
390	390	if (audiocpu != NULL && cpu_get_type(audiocpu) != CPU_Z80)
391	391	{
392	392	state->eabank = 1;
393		memory_install_read8_handler(cpu_get_address_space(audiocpu, ADDRESS_SPACE_PROGRAM), 0x000, 0x7ff, 0, 0, SMH_BANK1);
	393	memory_install_read8_handler(cpu_get_address_space(audiocpu, ADDRESS_SPACE_PROGRAM), 0x000, 0x7ff, 0, 0, (read8_space_func)SMH_BANK(1));
394	394	memory_configure_bank(machine, 1, 0, 1, memory_region(machine, "audiocpu"), 0);
395	395	memory_configure_bank(machine, 1, 1, 1, memory_region(machine, "audiocpu") + 0x1000, 0x800);
396	396	}
r4679	r4680
401	401
402	402	static SOUND_RESET( mario )
403	403	{
404		mario_state   *state = machine->driver_data;
405		const address_space *space = cpu_get_address_space(machine->cpu[1], ADDRESS_SPACE_PROGRAM);
	404	mario_state   *state = (mario_state *)machine->driver_data;
	405	const address_space *space = cputag_get_address_space(machine, "audiocpu", ADDRESS_SPACE_PROGRAM);
406	406
407	407	#if USE_8039
408	408	set_ea(machine, 1);
r4679	r4680
480	480
481	481	WRITE8_HANDLER( masao_sh_irqtrigger_w )
482	482	{
483		mario_state   *state = space->machine->driver_data;
	483	mario_state   *state = (mario_state *)space->machine->driver_data;
484	484
485	485	if (state->last == 1 && data == 0)
486	486	{
r4679	r4680
513	513	/* Misc samples */
514	514	WRITE8_HANDLER( mario_sh3_w )
515	515	{
516		mario_state   *state = space->machine->driver_data;
	516	mario_state   *state = (mario_state *)space->machine->driver_data;
517	517
518	518	switch (offset)
519	519	{

src/mame/audio/gottlieb.c

r4679	r4680
96	96
97	97	static void snd_interrupt(const device_config *device, int state)
98	98	{
99		cpu_set_input_line(device->machine->cpu[1], M6502_IRQ_LINE, state);
	99	cputag_set_input_line(device->machine, "audiocpu", M6502_IRQ_LINE, state);
100	100	}
101	101
102	102
r4679	r4680
109	109	static void r6532_portb_w(const device_config *device, UINT8 newdata, UINT8 olddata)
110	110	{
111	111	/* unsure if this is ever used, but the NMI is connected to the RIOT's PB7 */
112		cpu_set_input_line(device->machine->cpu[1], INPUT_LINE_NMI, (newdata & 0x80) ? CLEAR_LINE : ASSERT_LINE);
	112	cputag_set_input_line(device->machine, "audiocpu", INPUT_LINE_NMI, (newdata & 0x80) ? CLEAR_LINE : ASSERT_LINE);
113	113	}
114	114
115	115
r4679	r4680
222	222	/* callback for the timer */
223	223	static TIMER_CALLBACK( gottlieb_nmi_generate )
224	224	{
225		cpu_set_input_line(machine->cpu[1],INPUT_LINE_NMI,PULSE_LINE);
	225	cputag_set_input_line(machine, "audiocpu", INPUT_LINE_NMI, PULSE_LINE);
226	226	}
227	227
228	228

src/mame/audio/dcs.c

r4679	r4680
997	997	/* supports both RAM and ROM variants */
998	998	if (dram_in_mb != 0)
999	999	{
1000		dcs.sounddata = auto_malloc(dram_in_mb << 20);
	1000	dcs.sounddata = auto_alloc_array(machine, UINT16, dram_in_mb << (20-1));
1001	1001	dcs.sounddata_words = (dram_in_mb << 20) / 2;
1002	1002	}
1003	1003	else
r4679	r4680
1010	1010	memory_configure_bank(machine, 20, 0, dcs.sounddata_banks, dcs.sounddata, soundbank_words*2);
1011	1011
1012	1012	/* allocate memory for the SRAM */
1013		dcs_sram = auto_malloc(0x8000*4);
	1013	dcs_sram = auto_alloc_array(machine, UINT16, 0x8000*4/2);
1014	1014
1015	1015	/* create the timers */
1016	1016	dcs.internal_timer = timer_alloc(machine, internal_timer_callback, NULL);
r4679	r4680
1114	1114	/* if SRAM disabled, clean it out */
1115	1115	if (SDRC_SM_EN == 0)
1116	1116	{
1117		memory_install_readwrite32_handler(dcs.program, 0x0800, 0x3fff, 0, 0, SMH_UNMAP, SMH_UNMAP);
1118		memory_install_readwrite16_handler(dcs.data, 0x0800, 0x37ff, 0, 0, SMH_UNMAP, SMH_UNMAP);
	1117	memory_install_readwrite32_handler(dcs.program, 0x0800, 0x3fff, 0, 0, (read32_space_func)SMH_UNMAP, (write32_space_func)SMH_UNMAP);
	1118	memory_install_readwrite16_handler(dcs.data, 0x0800, 0x37ff, 0, 0, (read16_space_func)SMH_UNMAP, (write16_space_func)SMH_UNMAP);
1119	1119	}
1120	1120
1121	1121	/* otherwise, map the SRAM */
1122	1122	else
1123	1123	{
1124	1124	/* first start with a clean program map */
1125		memory_install_readwrite32_handler(dcs.program, 0x0800, 0x3fff, 0, 0, SMH_BANK21, SMH_BANK21);
	1125	memory_install_readwrite32_handler(dcs.program, 0x0800, 0x3fff, 0, 0, (read32_space_func)SMH_BANK(21), (write32_space_func)SMH_BANK(21));
1126	1126	memory_set_bankptr(machine, 21, dcs_sram + 0x4800);
1127	1127
1128	1128	/* set up the data map based on the SRAM banking */
1129	1129	/* map 0: ram from 0800-37ff */
1130	1130	if (SDRC_SM_BK == 0)
1131	1131	{
1132		memory_install_readwrite16_handler(dcs.data, 0x0800, 0x17ff, 0, 0, SMH_BANK22, SMH_BANK22);
1133		memory_install_readwrite16_handler(dcs.data, 0x1800, 0x27ff, 0, 0, SMH_BANK23, SMH_BANK23);
1134		memory_install_readwrite16_handler(dcs.data, 0x2800, 0x37ff, 0, 0, SMH_BANK24,  SMH_BANK24);
	1132	memory_install_readwrite16_handler(dcs.data, 0x0800, 0x17ff, 0, 0, (read16_space_func)SMH_BANK(22), (write16_space_func)SMH_BANK(22));
	1133	memory_install_readwrite16_handler(dcs.data, 0x1800, 0x27ff, 0, 0, (read16_space_func)SMH_BANK(23), (write16_space_func)SMH_BANK(23));
	1134	memory_install_readwrite16_handler(dcs.data, 0x2800, 0x37ff, 0, 0, (read16_space_func)SMH_BANK(24), (write16_space_func)SMH_BANK(24));
1135	1135	memory_set_bankptr(machine, 22, dcs_sram + 0x0000);
1136	1136	memory_set_bankptr(machine, 23, dcs_sram + 0x1000);
1137	1137	memory_set_bankptr(machine, 24, dcs_sram + 0x2000);
r4679	r4680
1140	1140	/* map 1: nothing from 0800-17ff, alternate RAM at 1800-27ff, same RAM at 2800-37ff */
1141	1141	else
1142	1142	{
1143		memory_install_readwrite16_handler(dcs.data, 0x0800, 0x17ff, 0, 0, SMH_UNMAP, SMH_UNMAP);
1144		memory_install_readwrite16_handler(dcs.data, 0x1800, 0x27ff, 0, 0, SMH_BANK23, SMH_BANK23);
1145		memory_install_readwrite16_handler(dcs.data, 0x2800, 0x37ff, 0, 0, SMH_BANK24, SMH_BANK24);
	1143	memory_install_readwrite16_handler(dcs.data, 0x0800, 0x17ff, 0, 0, (read16_space_func)SMH_UNMAP, (write16_space_func)SMH_UNMAP);
	1144	memory_install_readwrite16_handler(dcs.data, 0x1800, 0x27ff, 0, 0, (read16_space_func)SMH_BANK(23), (write16_space_func)SMH_BANK(23));
	1145	memory_install_readwrite16_handler(dcs.data, 0x2800, 0x37ff, 0, 0, (read16_space_func)SMH_BANK(24), (write16_space_func)SMH_BANK(24));
1146	1146	memory_set_bankptr(machine, 23, dcs_sram + 0x3000);
1147	1147	memory_set_bankptr(machine, 24, dcs_sram + 0x2000);
1148	1148	}
r4679	r4680
1153	1153	{
1154	1154	int baseaddr = (SDRC_ROM_ST == 0) ? 0x0000 : (SDRC_ROM_ST == 1) ? 0x3000 : 0x3400;
1155	1155	int pagesize = (SDRC_ROM_SZ == 0 && SDRC_ROM_ST != 0) ? 4096 : 1024;
1156		memory_install_read16_handler(dcs.data, baseaddr, baseaddr + pagesize - 1, 0, 0, SMH_BANK25);
	1156	memory_install_read16_handler(dcs.data, baseaddr, baseaddr + pagesize - 1, 0, 0, (read16_space_func)SMH_BANK(25));
1157	1157	}
1158	1158
1159	1159	/* map the DRAM page as bank 26 */
1160	1160	if (SDRC_DM_ST != 0)
1161	1161	{
1162	1162	int baseaddr = (SDRC_DM_ST == 1) ? 0x0000 : (SDRC_DM_ST == 2) ? 0x3000 : 0x3400;
1163		memory_install_readwrite16_handler(dcs.data, baseaddr, baseaddr + 0x3ff, 0, 0, SMH_BANK26, SMH_BANK26);
	1163	memory_install_readwrite16_handler(dcs.data, baseaddr, baseaddr + 0x3ff, 0, 0, (read16_space_func)SMH_BANK(26), (write16_space_func)SMH_BANK(26));
1164	1164	}
1165	1165
1166	1166	/* update the bank pointers */

src/mame/audio/jedi.c

r4679	r4680
22	22
23	23	static SOUND_START( jedi )
24	24	{
25		jedi_state *state = machine->driver_data;
	25	jedi_state *state = (jedi_state *)machine->driver_data;
26	26
27	27	/* set up save state */
28	28	state_save_register_global(machine, state->audio_latch);
r4679	r4680
40	40
41	41	static SOUND_RESET( jedi )
42	42	{
43		jedi_state *state = machine->driver_data;
	43	jedi_state *state = (jedi_state *)machine->driver_data;
44	44
45	45	/* init globals */
46	46	state->audio_latch = 0;
r4679	r4680
60	60
61	61	static WRITE8_HANDLER( irq_ack_w )
62	62	{
63		cpu_set_input_line(space->machine->cpu[1], M6502_IRQ_LINE, CLEAR_LINE);
	63	cputag_set_input_line(space->machine, "audiocpu", M6502_IRQ_LINE, CLEAR_LINE);
64	64	}
65	65
66	66
r4679	r4680
73	73
74	74	WRITE8_HANDLER( jedi_audio_reset_w )
75	75	{
76		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_RESET, (data & 1) ? CLEAR_LINE : ASSERT_LINE);
	76	cputag_set_input_line(space->machine, "audiocpu", INPUT_LINE_RESET, (data & 1) ? CLEAR_LINE : ASSERT_LINE);
77	77	}
78	78
79	79
80	80	static TIMER_CALLBACK( delayed_audio_latch_w )
81	81	{
82		jedi_state *state = machine->driver_data;
	82	jedi_state *state = (jedi_state *)machine->driver_data;
83	83
84	84	state->audio_latch = param;
85	85	*state->audio_comm_stat |= 0x80;
r4679	r4680
94	94
95	95	static READ8_HANDLER( audio_latch_r )
96	96	{
97		jedi_state *state = space->machine->driver_data;
	97	jedi_state *state = (jedi_state *)space->machine->driver_data;
98	98
99	99	*state->audio_comm_stat &= ~0x80;
100	100	return state->audio_latch;
r4679	r4680
103	103
104	104	CUSTOM_INPUT( jedi_audio_comm_stat_r )
105	105	{
106		jedi_state *state = field->port->machine->driver_data;
	106	jedi_state *state = (jedi_state *)field->port->machine->driver_data;
107	107	return *state->audio_comm_stat >> 6;
108	108	}
109	109
r4679	r4680
117	117
118	118	READ8_HANDLER( jedi_audio_ack_latch_r )
119	119	{
120		jedi_state *state = space->machine->driver_data;
	120	jedi_state *state = (jedi_state *)space->machine->driver_data;
121	121
122	122	*state->audio_comm_stat &= ~0x40;
123	123	return state->audio_ack_latch;
r4679	r4680
126	126
127	127	static WRITE8_HANDLER( audio_ack_latch_w )
128	128	{
129		jedi_state *state = space->machine->driver_data;
	129	jedi_state *state = (jedi_state *)space->machine->driver_data;
130	130
131	131	state->audio_ack_latch = data;
132	132	*state->audio_comm_stat |= 0x40;
r4679	r4680
142	142
143	143	static WRITE8_HANDLER( speech_strobe_w )
144	144	{
145		jedi_state *state = space->machine->driver_data;
	145	jedi_state *state = (jedi_state *)space->machine->driver_data;
146	146	int new_speech_strobe_state = (~offset >> 8) & 1;
147	147
148	148	if ((new_speech_strobe_state != state->speech_strobe_state) && new_speech_strobe_state)

src/mame/audio/attckufo.c

r4679	r4680
219	219	noisesize = NOISE_FREQUENCY_MAX * NOISE_BUFFER_SIZE_SEC;
220	220	noisepos = 0;
221	221	noisesamples = 1;
222		noise = (INT8*) auto_malloc (noisesize * sizeof (noise[0]));
	222	noise = auto_alloc_array(device->machine, INT8, noisesize);
223	223	{
224	224	int noiseshift = 0x7ffff8;
225	225	char data;
r4679	r4680
254	254	tone1pos = tone2pos = tone3pos = 0;
255	255	tone1samples = tone2samples = tone3samples = 1;
256	256
257		tone = (INT16*) auto_malloc (tonesize * sizeof (tone[0]));
	257	tone = auto_alloc_array(device->machine, INT16, tonesize);
258	258
259	259	for (i = 0; i < tonesize; i++)
260	260	{

src/mame/audio/polepos.c

r4679	r4680
62	62	}
63	63
64	64	/* determine the effective clock rate */
65		clock = (cpu_get_clock(device->machine->cpu[0]) / 16) * ((sample_msb + 1) * 64 + sample_lsb + 1) / (64*64);
	65	clock = (cputag_get_clock(device->machine, "maincpu") / 16) * ((sample_msb + 1) * 64 + sample_lsb + 1) / (64*64);
66	66	step = (clock << 12) / OUTPUT_RATE;
67	67
68	68	/* determine the volume */

src/mame/audio/exidy.c

r4679	r4680
114	114	static WRITE_LINE_DEVICE_HANDLER( update_irq_state )
115	115	{
116	116	const device_config *pia = devtag_get_device(device->machine, "pia1");
117		cpu_set_input_line(device->machine->cpu[1], M6502_IRQ_LINE, (pia6821_get_irq_b(pia) | riot_irq_state) ? ASSERT_LINE : CLEAR_LINE);
	117	cputag_set_input_line(device->machine, "audiocpu", M6502_IRQ_LINE, (pia6821_get_irq_b(pia) | riot_irq_state) ? ASSERT_LINE : CLEAR_LINE);
118	118	}
119	119
120	120
r4679	r4680
462	462	static void r6532_porta_w(const device_config *device, UINT8 newdata, UINT8 olddata)
463	463	{
464	464	if (has_mc3417)
465		cpu_set_input_line(device->machine->cpu[2], INPUT_LINE_RESET, (newdata & 0x10) ? CLEAR_LINE : ASSERT_LINE);
	465	cputag_set_input_line(device->machine, "cvsd", INPUT_LINE_RESET, (newdata & 0x10) ? CLEAR_LINE : ASSERT_LINE);
466	466	}
467	467
468	468

src/mame/audio/8080bw.c

r4679	r4680
920	920
921	921	static STATE_POSTLOAD( schaser_reinit_555_time_remain )
922	922	{
923		const address_space *space = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM);
	923	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
924	924	schaser_effect_555_time_remain = double_to_attotime(schaser_effect_555_time_remain_savable);
925	925	schaser_sh_port_2_w(space, 0, port_2_last_extra);
926	926	}
r4679	r4680
943	943
944	944	MACHINE_RESET( schaser )
945	945	{
946		const address_space *space = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM);
	946	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
947	947	schaser_effect_555_is_low = 0;
948	948	timer_adjust_oneshot(schaser_effect_555_timer, attotime_never, 0);
949	949	schaser_sh_port_1_w(space, 0, 0);

src/mame/machine/nycaptor.c

r4679	r4680
56	56	if ((ddrB & 0x02) && (~data & 0x02) && (portB_out & 0x02))
57	57	{
58	58	portA_in = from_main;
59		if (main_sent) cpu_set_input_line(space->machine->cpu[3],0,CLEAR_LINE);
	59	if (main_sent) cputag_set_input_line(space->machine, "mcu", 0, CLEAR_LINE);
60	60	main_sent = 0;
61	61
62	62	}
r4679	r4680
103	103
104	104	from_main = data;
105	105	main_sent = 1;
106		cpu_set_input_line(space->machine->cpu[3],0,ASSERT_LINE);
	106	cputag_set_input_line(space->machine, "mcu", 0, ASSERT_LINE);
107	107	}
108	108
109	109	READ8_HANDLER( nycaptor_mcu_r )

src/mame/machine/rainbow.c

r4679	r4680
821	821
822	822	for (i = 0; i < 8; i++)
823	823	{
824		CRAM[i] = auto_malloc(0x400);
	824	CRAM[i] = auto_alloc_array(machine, UINT8, 0x400);
825	825
826	826	state_save_register_item_pointer(machine, "cchip", NULL, i, CRAM[i], 0x400);
827	827	}

src/mame/machine/scudsp.c

r4679	r4680
318	318	if(LEF) dsp_reg.pc = (data & 0xff);
319	319	if(EXF) dsp_execute_program(space);
320	320	if(EF && (!(stv_scu[40] & 0x0020)))
321		cpu_set_input_line_and_vector(space->machine->cpu[0], 0xa, HOLD_LINE , 0x45);
	321	cputag_set_input_line_and_vector(space->machine, "maincpu", 0xa, HOLD_LINE , 0x45);
322	322	}
323	323
324	324	void dsp_prg_data(UINT32 data)

src/mame/machine/xevious.c

r4679	r4680
45	45
46	46	battles_customio_prev_command = battles_customio_command;
47	47
48		if( battles_customio_command & 0x10 ){
49		if( battles_customio_command_count == 0 ){
50		cpu_set_input_line(machine->cpu[3], INPUT_LINE_NMI, PULSE_LINE);
51		}else{
52		cpu_set_input_line(machine->cpu[0], INPUT_LINE_NMI, PULSE_LINE);
53		cpu_set_input_line(machine->cpu[3], INPUT_LINE_NMI, PULSE_LINE);
	48	if( battles_customio_command & 0x10 )
	49	{
	50	if( battles_customio_command_count == 0 )
	51	{
	52	cputag_set_input_line(machine, "sub3", INPUT_LINE_NMI, PULSE_LINE);
54	53	}
55		}else{
56		cpu_set_input_line(machine->cpu[0], INPUT_LINE_NMI, PULSE_LINE);
57		cpu_set_input_line(machine->cpu[3], INPUT_LINE_NMI, PULSE_LINE);
	54	else
	55	{
	56	cputag_set_input_line(machine, "maincpu", INPUT_LINE_NMI, PULSE_LINE);
	57	cputag_set_input_line(machine, "sub3", INPUT_LINE_NMI, PULSE_LINE);
	58	}
58	59	}
	60	else
	61	{
	62	cputag_set_input_line(machine, "maincpu", INPUT_LINE_NMI, PULSE_LINE);
	63	cputag_set_input_line(machine, "sub3", INPUT_LINE_NMI, PULSE_LINE);
	64	}
59	65	battles_customio_command_count++;
60	66	}
61	67

src/mame/machine/cubocd32.c

r4679	r4680
122	122
123	123	akiko.cdrom_numtracks = cdrom_get_last_track(akiko.cdrom)+3;
124	124
125		akiko.cdrom_toc = (UINT8*)auto_malloc(13*akiko.cdrom_numtracks);
	125	akiko.cdrom_toc = auto_alloc_array(machine, UINT8, 13*akiko.cdrom_numtracks);
126	126	memset( akiko.cdrom_toc, 0, 13*akiko.cdrom_numtracks);
127	127
128	128	p = akiko.cdrom_toc;
r4679	r4680
356	356	if ( akiko.cdrom_status[0] & akiko.cdrom_status[1] )
357	357	{
358	358	if (LOG_AKIKO_CD) logerror( "Akiko CD IRQ\n" );
359		amiga_custom_w(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), REG_INTREQ, 0x8000 | INTENA_PORTS, 0xffff);
	359	amiga_custom_w(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), REG_INTREQ, 0x8000 | INTENA_PORTS, 0xffff);
360	360	}
361	361	}
362	362
r4679	r4680
524	524
525	525	if ( param == 0x05 )
526	526	{
527		const address_space *space = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM);
	527	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
528	528	if (LOG_AKIKO_CD) logerror( "AKIKO: Completing Command %d\n", param );
529	529
530	530	resp[0] = 0x06;

src/mame/machine/fd1089.c

r4679	r4680
125	125
126	126	struct parameters
127	127	{
128		int xor;
	128	int xorval;
129	129	int s7,s6,s5,s4,s3,s2,s1,s0;
130	130	};
131	131
r4679	r4680
257	257	table = rearrange_key(key, opcode);
258	258
259	259	p = &addr_params[table >> 4];
260		val = BITSWAP8(val, p->s7,p->s6,p->s5,p->s4,p->s3,p->s2,p->s1,p->s0) ^ p->xor;
	260	val = BITSWAP8(val, p->s7,p->s6,p->s5,p->s4,p->s3,p->s2,p->s1,p->s0) ^ p->xorval;
261	261
262	262	if (BIT(table,3)) val ^= 0x01;
263	263	if (BIT(table,0)) val ^= 0xb1;
r4679	r4680
296	296
297	297	q = &data_params[family];
298	298
299		val ^= q->xor;
	299	val ^= q->xorval;
300	300	val = BITSWAP8(val, q->s7,q->s6,q->s5,q->s4,q->s3,q->s2,q->s1,q->s0);
301	301
302	302	return val;
r4679	r4680
305	305	static int decode_fd1089b(int val,int key,int opcode)
306	306	{
307	307	int table;
308		int xor;
	308	int xorval;
309	309
310	310	const struct parameters *p;
311	311
r4679	r4680
316	316	table = rearrange_key(key, opcode);
317	317
318	318	p = &addr_params[table >> 4];
319		val = BITSWAP8(val, p->s7,p->s6,p->s5,p->s4,p->s3,p->s2,p->s1,p->s0) ^ p->xor;
	319	val = BITSWAP8(val, p->s7,p->s6,p->s5,p->s4,p->s3,p->s2,p->s1,p->s0) ^ p->xorval;
320	320
321	321	if (BIT(table,3)) val ^= 0x01;
322	322	if (BIT(table,0)) val ^= 0xb1;
r4679	r4680
327	327
328	328	val = basetable_fd1089[val];
329	329
330		xor = 0;
	330	xorval = 0;
331	331	if (opcode == 0)
332	332	{
333		if (BIT(~table,6) & BIT(table,2)) xor ^= 0x01;
334		if (BIT(table,4)) xor ^= 0x01;
	333	if (BIT(~table,6) & BIT(table,2)) xorval ^= 0x01;
	334	if (BIT(table,4)) xorval ^= 0x01;
335	335	}
336	336	else
337	337	{
338		if (BIT(table,6) & BIT(table,2)) xor ^= 0x01;
339		if (BIT(table,5)) xor ^= 0x01;
	338	if (BIT(table,6) & BIT(table,2)) xorval ^= 0x01;
	339	if (BIT(table,5)) xorval ^= 0x01;
340	340	}
341	341
342		val ^= xor;
	342	val ^= xorval;
343	343
344	344	if (BIT(table,2))
345	345	{
r4679	r4680
403	403	UINT16 *rom = (UINT16 *)memory_region(machine, "maincpu");
404	404	int size = memory_region_length(machine, "maincpu");
405	405	int A;
406		decrypted = (UINT16 *)auto_malloc(size);
	406	decrypted = auto_alloc_array(machine, UINT16, size/2);
407	407
408	408	memory_set_decrypted_region(space, 0x000000, size - 1, decrypted);
409	409

src/mame/machine/playch10.c

r4679	r4680
28	28	*************************************/
29	29	MACHINE_RESET( pc10 )
30	30	{
31		const address_space *space = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM);
	31	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
32	32	const device_config *ppu = devtag_get_device(machine, "ppu");
33	33
34	34	/* initialize latches and flip-flops */
r4679	r4680
103	103
104	104	WRITE8_HANDLER( pc10_GAMERES_w )
105	105	{
106		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_RESET, ( data & 1 ) ? CLEAR_LINE : ASSERT_LINE );
	106	cputag_set_input_line(space->machine, "cart", INPUT_LINE_RESET, ( data & 1 ) ? CLEAR_LINE : ASSERT_LINE );
107	107	}
108	108
109	109	WRITE8_HANDLER( pc10_GAMESTOP_w )
110	110	{
111		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_HALT, ( data & 1 ) ? CLEAR_LINE : ASSERT_LINE );
	111	cputag_set_input_line(space->machine, "cart", INPUT_LINE_HALT, ( data & 1 ) ? CLEAR_LINE : ASSERT_LINE );
112	112	}
113	113
114	114	WRITE8_HANDLER( pc10_PPURES_w )
r4679	r4680
441	441	DRIVER_INIT( pcaboard )
442	442	{
443	443	/* switches vrom with writes to the $803e-$8041 area */
444		memory_install_write8_handler(cpu_get_address_space(machine->cpu[1], ADDRESS_SPACE_PROGRAM), 0x8000, 0x8fff, 0, 0, aboard_vrom_switch_w );
	444	memory_install_write8_handler(cputag_get_address_space(machine, "cart", ADDRESS_SPACE_PROGRAM), 0x8000, 0x8fff, 0, 0, aboard_vrom_switch_w );
445	445
446	446	/* common init */
447	447	DRIVER_INIT_CALL(playch10);
r4679	r4680
471	471	memcpy( &prg[0x08000], &prg[0x28000], 0x8000 );
472	472
473	473	/* Roms are banked at $8000 to $bfff */
474		memory_install_write8_handler(cpu_get_address_space(machine->cpu[1], ADDRESS_SPACE_PROGRAM), 0x8000, 0xffff, 0, 0, bboard_rom_switch_w );
	474	memory_install_write8_handler(cputag_get_address_space(machine, "cart", ADDRESS_SPACE_PROGRAM), 0x8000, 0xffff, 0, 0, bboard_rom_switch_w );
475	475
476	476	/* common init */
477	477	DRIVER_INIT_CALL(playch10);
r4679	r4680
493	493	DRIVER_INIT( pccboard )
494	494	{
495	495	/* switches vrom with writes to $6000 */
496		memory_install_write8_handler(cpu_get_address_space(machine->cpu[1], ADDRESS_SPACE_PROGRAM), 0x6000, 0x6000, 0, 0, cboard_vrom_switch_w );
	496	memory_install_write8_handler(cputag_get_address_space(machine, "cart", ADDRESS_SPACE_PROGRAM), 0x6000, 0x6000, 0, 0, cboard_vrom_switch_w );
497	497
498	498	/* common init */
499	499	DRIVER_INIT_CALL(playch10);
r4679	r4680
514	514	mmc1_rom_mask = 0x07;
515	515
516	516	/* MMC mapper at writes to $8000-$ffff */
517		memory_install_write8_handler(cpu_get_address_space(machine->cpu[1], ADDRESS_SPACE_PROGRAM), 0x8000, 0xffff, 0, 0, mmc1_rom_switch_w );
	517	memory_install_write8_handler(cputag_get_address_space(machine, "cart", ADDRESS_SPACE_PROGRAM), 0x8000, 0xffff, 0, 0, mmc1_rom_switch_w );
518	518
519	519	/* common init */
520	520	DRIVER_INIT_CALL(playch10);
r4679	r4680
525	525	DRIVER_INIT( pcdboard_2 )
526	526	{
527	527	/* extra ram at $6000-$7fff */
528		memory_install_readwrite8_handler(cpu_get_address_space(machine->cpu[1], ADDRESS_SPACE_PROGRAM), 0x6000, 0x7fff, 0, 0, SMH_BANK1, SMH_BANK1 );
529		memory_set_bankptr(machine, 1, auto_malloc(0x2000));
	528	memory_install_readwrite8_handler(cputag_get_address_space(machine, "cart", ADDRESS_SPACE_PROGRAM), 0x6000, 0x7fff, 0, 0, (read8_space_func)SMH_BANK(1), (write8_space_func)SMH_BANK(1) );
	529	memory_set_bankptr(machine, 1, auto_alloc_array(machine, UINT8, 0x2000));
530	530
531	531	/* common init */
532	532	DRIVER_INIT_CALL(pcdboard);
r4679	r4680
617	617	memcpy( &prg[0x08000], &prg[0x28000], 0x8000 );
618	618
619	619	/* basically a mapper 9 on a nes */
620		memory_install_write8_handler(cpu_get_address_space(machine->cpu[1], ADDRESS_SPACE_PROGRAM), 0x8000, 0xffff, 0, 0, eboard_rom_switch_w );
	620	memory_install_write8_handler(cputag_get_address_space(machine, "cart", ADDRESS_SPACE_PROGRAM), 0x8000, 0xffff, 0, 0, eboard_rom_switch_w );
621	621
622	622	/* ppu_latch callback */
623	623	ppu_latch = mapper9_latch;
624	624
625	625	/* nvram at $6000-$6fff */
626		memory_install_readwrite8_handler(cpu_get_address_space(machine->cpu[1], ADDRESS_SPACE_PROGRAM), 0x6000, 0x6fff, 0, 0, SMH_BANK1, SMH_BANK1 );
627		memory_set_bankptr(machine, 1, auto_malloc(0x1000));
	626	memory_install_readwrite8_handler(cputag_get_address_space(machine, "cart", ADDRESS_SPACE_PROGRAM), 0x6000, 0x6fff, 0, 0, (read8_space_func)SMH_BANK(1), (write8_space_func)SMH_BANK(1) );
	627	memory_set_bankptr(machine, 1, auto_alloc_array(machine, UINT8, 0x1000));
628	628
629	629	/* common init */
630	630	DRIVER_INIT_CALL(playch10);
r4679	r4680
645	645	mmc1_rom_mask = 0x07;
646	646
647	647	/* MMC mapper at writes to $8000-$ffff */
648		memory_install_write8_handler(cpu_get_address_space(machine->cpu[1], ADDRESS_SPACE_PROGRAM), 0x8000, 0xffff, 0, 0, mmc1_rom_switch_w );
	648	memory_install_write8_handler(cputag_get_address_space(machine, "cart", ADDRESS_SPACE_PROGRAM), 0x8000, 0xffff, 0, 0, mmc1_rom_switch_w );
649	649
650	650	/* common init */
651	651	DRIVER_INIT_CALL(playch10);
r4679	r4680
656	656	DRIVER_INIT( pcfboard_2 )
657	657	{
658	658	/* extra ram at $6000-$6fff */
659		memory_install_readwrite8_handler(cpu_get_address_space(machine->cpu[1], ADDRESS_SPACE_PROGRAM), 0x6000, 0x6fff, 0, 0, SMH_BANK1, SMH_BANK1 );
660		memory_set_bankptr(machine, 1, auto_malloc(0x1000));
	659	memory_install_readwrite8_handler(cputag_get_address_space(machine, "cart", ADDRESS_SPACE_PROGRAM), 0x6000, 0x6fff, 0, 0, (read8_space_func)SMH_BANK(1), (write8_space_func)SMH_BANK(1) );
	660	memory_set_bankptr(machine, 1, auto_alloc_array(machine, UINT8, 0x1000));
661	661
662	662	/* common init */
663	663	DRIVER_INIT_CALL(pcfboard);
r4679	r4680
681	681	if ( --gboard_scanline_counter == -1 )
682	682	{
683	683	gboard_scanline_counter = gboard_scanline_latch;
684		generic_pulse_irq_line(device->machine->cpu[1], 0);
	684	generic_pulse_irq_line(cputag_get_cpu(device->machine, "cart"), 0);
685	685	}
686	686	}
687	687	}
r4679	r4680
831	831	memcpy( &prg[0x0c000], &prg[0x4c000], 0x4000 );
832	832
833	833	/* MMC3 mapper at writes to $8000-$ffff */
834		memory_install_write8_handler(cpu_get_address_space(machine->cpu[1], ADDRESS_SPACE_PROGRAM), 0x8000, 0xffff, 0, 0, gboard_rom_switch_w );
	834	memory_install_write8_handler(cputag_get_address_space(machine, "cart", ADDRESS_SPACE_PROGRAM), 0x8000, 0xffff, 0, 0, gboard_rom_switch_w );
835	835
836	836	/* extra ram at $6000-$7fff */
837		memory_install_readwrite8_handler(cpu_get_address_space(machine->cpu[1], ADDRESS_SPACE_PROGRAM), 0x6000, 0x7fff, 0, 0, SMH_BANK1, SMH_BANK1 );
838		memory_set_bankptr(machine, 1, auto_malloc(0x2000));
	837	memory_install_readwrite8_handler(cputag_get_address_space(machine, "cart", ADDRESS_SPACE_PROGRAM), 0x6000, 0x7fff, 0, 0, (read8_space_func)SMH_BANK(1), (write8_space_func)SMH_BANK(1) );
	838	memory_set_bankptr(machine, 1, auto_alloc_array(machine, UINT8, 0x2000));
839	839
840	840	gboard_banks[0] = 0x1e;
841	841	gboard_banks[1] = 0x1f;
r4679	r4680
883	883	memcpy( &prg[0x08000], &prg[0x10000], 0x8000 );
884	884
885	885	/* Roms are banked at $8000 to $bfff */
886		memory_install_write8_handler(cpu_get_address_space(machine->cpu[1], ADDRESS_SPACE_PROGRAM), 0x8000, 0xffff, 0, 0, iboard_rom_switch_w );
	886	memory_install_write8_handler(cputag_get_address_space(machine, "cart", ADDRESS_SPACE_PROGRAM), 0x8000, 0xffff, 0, 0, iboard_rom_switch_w );
887	887
888	888	/* common init */
889	889	DRIVER_INIT_CALL(playch10);
r4679	r4680
948	948	memcpy( &prg[0x0c000], &prg[0x4c000], 0x4000 );
949	949
950	950	/* Roms are banked at $8000 to $bfff */
951		memory_install_write8_handler(cpu_get_address_space(machine->cpu[1], ADDRESS_SPACE_PROGRAM), 0x8000, 0xffff, 0, 0, hboard_rom_switch_w );
	951	memory_install_write8_handler(cputag_get_address_space(machine, "cart", ADDRESS_SPACE_PROGRAM), 0x8000, 0xffff, 0, 0, hboard_rom_switch_w );
952	952
953	953	/* extra ram at $6000-$7fff */
954		memory_install_readwrite8_handler(cpu_get_address_space(machine->cpu[1], ADDRESS_SPACE_PROGRAM), 0x6000, 0x7fff, 0, 0, SMH_BANK1, SMH_BANK1 );
955		memory_set_bankptr(machine, 1, auto_malloc(0x2000));
	954	memory_install_readwrite8_handler(cputag_get_address_space(machine, "cart", ADDRESS_SPACE_PROGRAM), 0x6000, 0x7fff, 0, 0, (read8_space_func)SMH_BANK(1), (write8_space_func)SMH_BANK(1) );
	955	memory_set_bankptr(machine, 1, auto_alloc_array(machine, UINT8, 0x2000));
956	956
957	957	gboard_banks[0] = 0x1e;
958	958	gboard_banks[1] = 0x1f;
r4679	r4680
980	980	mmc1_rom_mask = 0x0f;
981	981
982	982	/* extra ram at $6000-$7fff */
983		memory_install_readwrite8_handler(cpu_get_address_space(machine->cpu[1], ADDRESS_SPACE_PROGRAM), 0x6000, 0x7fff, 0, 0, SMH_BANK1, SMH_BANK1 );
984		memory_set_bankptr(machine, 1, auto_malloc(0x2000));
	983	memory_install_readwrite8_handler(cputag_get_address_space(machine, "cart", ADDRESS_SPACE_PROGRAM), 0x6000, 0x7fff, 0, 0, (read8_space_func)SMH_BANK(1), (write8_space_func)SMH_BANK(1) );
	984	memory_set_bankptr(machine, 1, auto_alloc_array(machine, UINT8, 0x2000));
985	985
986	986	/* Roms are banked at $8000 to $bfff */
987		memory_install_write8_handler(cpu_get_address_space(machine->cpu[1], ADDRESS_SPACE_PROGRAM), 0x8000, 0xffff, 0, 0, mmc1_rom_switch_w );
	987	memory_install_write8_handler(cputag_get_address_space(machine, "cart", ADDRESS_SPACE_PROGRAM), 0x8000, 0xffff, 0, 0, mmc1_rom_switch_w );
988	988
989	989	/* common init */
990	990	DRIVER_INIT_CALL(playch10);

src/mame/machine/stvprot.c

r4679	r4680
329	329
330	330	void install_standard_protection(running_machine *machine)
331	331	{
332		memory_install_readwrite32_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x4fffff0, 0x4ffffff, 0, 0, a_bus_ctrl_r, a_bus_ctrl_w);
	332	memory_install_readwrite32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x4fffff0, 0x4ffffff, 0, 0, a_bus_ctrl_r, a_bus_ctrl_w);
333	333	}
334	334
335	335	static READ32_HANDLER(astrass_prot_r)
r4679	r4680
363	363	void install_astrass_protection(running_machine *machine)
364	364	{
365	365	ctrl_index = -1;
366		memory_install_readwrite32_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x4fffff0, 0x4ffffff, 0, 0, astrass_prot_r, astrass_prot_w);
	366	memory_install_readwrite32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x4fffff0, 0x4ffffff, 0, 0, astrass_prot_r, astrass_prot_w);
367	367	}
368	368
369	369
r4679	r4680
505	505	{
506	506	/* It uploads 2 tables here, then performs what looks like a number of transfers, setting
507	507	a source address of some kind (scrambled?) and then making many reads from a single address */
508		memory_install_readwrite32_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x37FFFF0, 0x37FFFFF, 0, 0, decathlt_prot_r, decathlt_prot_w);
	508	memory_install_readwrite32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x37FFFF0, 0x37FFFFF, 0, 0, decathlt_prot_r, decathlt_prot_w);
509	509	/* It uploads 2 tables here too, but nothing else, mirror? unused? */
510		//  memory_install_readwrite32_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x27FFFF0, 0x27FFFFF, 0, 0, decathlt_prot_r, decathlt_prot_w);
	510	//  memory_install_readwrite32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x27FFFF0, 0x27FFFFF, 0, 0, decathlt_prot_r, decathlt_prot_w);
511	511	}
512	512
513	513	void stv_register_protection_savestates(running_machine *machine)

src/mame/machine/bublbobl.c

r4679	r4680
24	24	/* bit 3 n.c. */
25	25
26	26	/* bit 4 resets second Z80 */
27		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_RESET, (data & 0x10) ? CLEAR_LINE : ASSERT_LINE);
	27	cputag_set_input_line(space->machine, "slave", INPUT_LINE_RESET, (data & 0x10) ? CLEAR_LINE : ASSERT_LINE);
28	28
29	29	/* bit 5 resets mcu */
30		if (space->machine->cpu[3] != NULL) // only if we have a MCU
31		cpu_set_input_line(space->machine->cpu[3], INPUT_LINE_RESET, (data & 0x20) ? CLEAR_LINE : ASSERT_LINE);
	30	if (cputag_get_cpu(space->machine, "mcu") != NULL) // only if we have a MCU
	31	cputag_set_input_line(space->machine, "mcu", INPUT_LINE_RESET, (data & 0x20) ? CLEAR_LINE : ASSERT_LINE);
32	32
33	33	/* bit 6 enables display */
34	34	bublbobl_video_enable = data & 0x40;
r4679	r4680
55	55
56	56	WRITE8_HANDLER( bublbobl_nmitrigger_w )
57	57	{
58		cpu_set_input_line(space->machine->cpu[1],INPUT_LINE_NMI,PULSE_LINE);
	58	cputag_set_input_line(space->machine, "slave", INPUT_LINE_NMI, PULSE_LINE);
59	59	}
60	60
61	61
r4679	r4680
94	94
95	95	static TIMER_CALLBACK( nmi_callback )
96	96	{
97		if (sound_nmi_enable) cpu_set_input_line(machine->cpu[2],INPUT_LINE_NMI,PULSE_LINE);
	97	if (sound_nmi_enable) cputag_set_input_line(machine, "audiocpu", INPUT_LINE_NMI, PULSE_LINE);
98	98	else pending_nmi = 1;
99	99	}
100	100
r4679	r4680
114	114	sound_nmi_enable = 1;
115	115	if (pending_nmi)
116	116	{
117		cpu_set_input_line(space->machine->cpu[2],INPUT_LINE_NMI,PULSE_LINE);
	117	cputag_set_input_line(space->machine, "audiocpu", INPUT_LINE_NMI, PULSE_LINE);
118	118	pending_nmi = 0;
119	119	}
120	120	}
121	121
122	122	WRITE8_HANDLER(soundcpu_reset_w)
123	123	{
124		cpu_set_input_line(space->machine->cpu[2], INPUT_LINE_RESET, data ? ASSERT_LINE : CLEAR_LINE);
	124	cputag_set_input_line(space->machine, "audiocpu", INPUT_LINE_RESET, data ? ASSERT_LINE : CLEAR_LINE);
125	125	}
126	126
127	127	READ8_HANDLER( sound_status_r )
r4679	r4680
207	207	if ((port1_out & 0x40) && (~data & 0x40))
208	208	{
209	209	//      logerror("triggering IRQ on main CPU\n");
210		cpu_set_input_line_vector(space->machine->cpu[0],0,bublbobl_mcu_sharedram[0]);
211		cpu_set_input_line(space->machine->cpu[0],0,HOLD_LINE);
	210	cpu_set_input_line_vector(cputag_get_cpu(space->machine, "maincpu"), 0, bublbobl_mcu_sharedram[0]);
	211	cputag_set_input_line(space->machine, "maincpu", 0, HOLD_LINE);
212	212	}
213	213
214	214	// bit 7: select read or write shared RAM
r4679	r4680
347	347
348	348	WRITE8_HANDLER( boblbobl_ic43_b_w )
349	349	{
350		static const int xor[4] = { 4, 1, 8, 2 };
	350	static const int xorval[4] = { 4, 1, 8, 2 };
351	351
352	352	//  logerror("%04x: ic43_b_w (offs %d) %02x\n",cpu_get_pc(space->cpu),offset,data);
353		ic43_b = (data >> 4) ^ xor[offset];
	353	ic43_b = (data >> 4) ^ xorval[offset];
354	354	}
355	355
356	356	READ8_HANDLER( boblbobl_ic43_b_r )
r4679	r4680
487	487	/* hack to get random EXTEND letters (who is supposed to do this? 68705? PAL?) */
488	488	bublbobl_mcu_sharedram[0x7c] = mame_rand(space->machine)%6;
489	489
490		cpu_set_input_line_vector(space->machine->cpu[0],0,bublbobl_mcu_sharedram[0]);
491		cpu_set_input_line(space->machine->cpu[0],0,HOLD_LINE);
	490	cpu_set_input_line_vector(cputag_get_cpu(space->machine, "maincpu"), 0, bublbobl_mcu_sharedram[0]);
	491	cputag_set_input_line(space->machine, "maincpu", 0, HOLD_LINE);
492	492	}
493	493	if ((ddrB & 0x40) && (~data & 0x40) && (portB_out & 0x40))
494	494	{

src/mame/machine/s16fd.c

r4679	r4680
109	109	}
110	110
111	111	/* Callback for CMP.L instructions (state change) */
112		static void fd1094_cmp_callback(const device_config *device, UINT32 val, int reg)
	112	static void fd1094_cmp_callback(const device_config *device, UINT32 val, UINT8 reg)
113	113	{
114	114	if (reg == 0 && (val & 0x0000ffff) == 0x0000ffff) // ?
115	115	{
r4679	r4680
150	150	fd1094_setstate_and_decrypt(device->machine, FD1094_STATE_RESET);
151	151	fd1094_kludge_reset_values();
152	152
153		device_set_info_fct(device, CPUINFO_FCT_M68K_CMPILD_CALLBACK, (genf *)fd1094_cmp_callback);
154		device_set_info_fct(device, CPUINFO_FCT_M68K_RTE_CALLBACK, (genf *)fd1094_rte_callback);
	153	m68k_set_cmpild_callback(device, fd1094_cmp_callback);
	154	m68k_set_rte_callback(device, fd1094_rte_callback);
155	155	cpu_set_irq_callback(device, fd1094_int_callback);
156	156
157	157	device_reset(device);
r4679	r4680
210	210
211	211	for (i = 0; i < CACHE_ENTRIES; i++)
212	212	{
213		fd1094_cacheregion[i] = auto_malloc(fd1094_cpuregionsize);
	213	fd1094_cacheregion[i] = auto_alloc_array(machine, UINT16, fd1094_cpuregionsize/2);
214	214	fd1094_cached_states[i] = -1;
215	215	}
216	216	fd1094_current_cacheposition = 0;

src/mame/machine/asic65.c

r4679	r4680
145	145
146	146	void asic65_reset(running_machine *machine, int state)
147	147	{
148		const address_space *space = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM);
	148	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
149	149
150	150	/* rom-based means reset and clear states */
151	151	if (asic65.cpu != NULL)

src/mame/machine/docastle.c

r4679	r4680
81	81
82	82	WRITE8_HANDLER( docastle_nmitrigger_w )
83	83	{
84		cpu_set_input_line(space->machine->cpu[1],INPUT_LINE_NMI,PULSE_LINE);
	84	cputag_set_input_line(space->machine, "slave", INPUT_LINE_NMI, PULSE_LINE);
85	85	}

src/mame/machine/tnzs.c

r4679	r4680
44	44	{
45	45	UINT8 data;
46	46
47		data = upi41_master_r(space->machine->cpu[2], offset & 1);
	47	data = upi41_master_r(cputag_get_cpu(space->machine, "mcu"), offset & 1);
48	48	cpu_yield(space->cpu);
49	49
50	50	//  logerror("PC %04x: read %02x from mcu $c00%01x\n", cpu_get_previouspc(space->cpu), data, offset);
r4679	r4680
56	56	{
57	57	//  logerror("PC %04x: write %02x to mcu $c00%01x\n", cpu_get_previouspc(space->cpu), data, offset);
58	58
59		upi41_master_w(space->machine->cpu[2], offset & 1, data);
	59	upi41_master_w(cputag_get_cpu(space->machine, "mcu"), offset & 1, data);
60	60	}
61	61
62	62
r4679	r4680
521	521	mcu_type = MCU_DRTOPPEL;
522	522
523	523	/* drtoppel writes to the palette RAM area even if it has PROMs! We have to patch it out. */
524		memory_install_write8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xf800, 0xfbff, 0, 0, SMH_NOP);
	524	memory_install_write8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xf800, 0xfbff, 0, 0, (write8_space_func)SMH_NOP);
525	525	}
526	526
527	527	DRIVER_INIT( chukatai )
r4679	r4680
533	533	{
534	534	mcu_type = MCU_TNZS;
535	535	/* we need to install a kludge to avoid problems with a bug in the original code */
536		//  memory_install_write8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xef10, 0xef10, 0, 0, tnzs_sync_kludge_w);
	536	//  memory_install_write8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xef10, 0xef10, 0, 0, tnzs_sync_kludge_w);
537	537	}
538	538
539	539	DRIVER_INIT( tnzsb )
r4679	r4680
541	541	mcu_type = MCU_NONE_TNZSB;
542	542
543	543	/* we need to install a kludge to avoid problems with a bug in the original code */
544		//  memory_install_write8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xef10, 0xef10, 0, 0, tnzs_sync_kludge_w);
	544	//  memory_install_write8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xef10, 0xef10, 0, 0, tnzs_sync_kludge_w);
545	545	}
546	546
547	547	DRIVER_INIT( kabukiz )
r4679	r4680
554	554	mcu_type = MCU_NONE_INSECTX;
555	555
556	556	/* this game has no mcu, replace the handler with plain input port handlers */
557		memory_install_read_port_handler(cpu_get_address_space(machine->cpu[1], ADDRESS_SPACE_PROGRAM), 0xc000, 0xc000, 0, 0, "IN0" );
558		memory_install_read_port_handler(cpu_get_address_space(machine->cpu[1], ADDRESS_SPACE_PROGRAM), 0xc001, 0xc001, 0, 0, "IN1" );
559		memory_install_read_port_handler(cpu_get_address_space(machine->cpu[1], ADDRESS_SPACE_PROGRAM), 0xc002, 0xc002, 0, 0, "IN2" );
	557	memory_install_read_port_handler(cputag_get_address_space(machine, "sub", ADDRESS_SPACE_PROGRAM), 0xc000, 0xc000, 0, 0, "IN0" );
	558	memory_install_read_port_handler(cputag_get_address_space(machine, "sub", ADDRESS_SPACE_PROGRAM), 0xc001, 0xc001, 0, 0, "IN1" );
	559	memory_install_read_port_handler(cputag_get_address_space(machine, "sub", ADDRESS_SPACE_PROGRAM), 0xc002, 0xc002, 0, 0, "IN2" );
560	560	}
561	561
562	562	DRIVER_INIT( kageki )
r4679	r4680
665	665
666	666	/* bit 4 resets the second CPU */
667	667	if (data & 0x10)
668		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_RESET, CLEAR_LINE);
	668	cputag_set_input_line(space->machine, "sub", INPUT_LINE_RESET, CLEAR_LINE);
669	669	else
670		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_RESET, ASSERT_LINE);
	670	cputag_set_input_line(space->machine, "sub", INPUT_LINE_RESET, ASSERT_LINE);
671	671
672	672	/* bits 0-2 select RAM/ROM bank */
673	673	memory_set_bankptr (space->machine, 1, &RAM[0x10000 + 0x4000 * (data & 0x07)]);
r4679	r4680
686	686	/* bit 2 resets the mcu */
687	687	if (data & 0x04)
688	688	{
689		if (space->machine->cpu[2] != NULL && cpu_get_type(space->machine->cpu[2]) == CPU_I8742)
690		cpu_set_input_line(space->machine->cpu[2], INPUT_LINE_RESET, PULSE_LINE);
	689	if (cputag_get_cpu(space->machine, "mcu") != NULL && cpu_get_type(cputag_get_cpu(space->machine, "mcu")) == CPU_I8742)
	690	cputag_set_input_line(space->machine, "mcu", INPUT_LINE_RESET, PULSE_LINE);
691	691	}
692	692	/* Coin count and lockout is handled by the i8742 */
693	693	break;

src/mame/machine/atari.c

r4679	r4680
53	53	logerror("atari interrupt_cb TIMR1\n");
54	54	}
55	55
56		cpu_set_input_line(device->machine->cpu[0], 0, HOLD_LINE);
	56	cputag_set_input_line(device->machine, "maincpu", 0, HOLD_LINE);
57	57	}
58	58
59	59	/**************************************************************
r4679	r4680
108	108	if ( new_mmu & 0x80 )
109	109	{
110	110	logerror("%s MMU SELFTEST RAM\n", machine->gamedrv->name);
111		rbank2 = SMH_NOP;
112		wbank2 = SMH_NOP;
	111	rbank2 = (read8_space_func)SMH_NOP;
	112	wbank2 = (write8_space_func)SMH_NOP;
113	113	}
114	114	else
115	115	{
116	116	logerror("%s MMU SELFTEST ROM\n", machine->gamedrv->name);
117		rbank2 = SMH_BANK2;
118		wbank2 = SMH_UNMAP;
	117	rbank2 = (read8_space_func)SMH_BANK(2);
	118	wbank2 = (write8_space_func)SMH_UNMAP;
119	119	}
120		memory_install_readwrite8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x5000, 0x57ff, 0, 0, rbank2, wbank2);
121		if (rbank2 == SMH_BANK2)
	120	memory_install_readwrite8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x5000, 0x57ff, 0, 0, rbank2, wbank2);
	121	if (rbank2 == (read8_space_func)SMH_BANK(2))
122	122	memory_set_bankptr(machine, 2, memory_region(machine, "maincpu") + 0x5000);
123	123	}
124	124

src/mame/machine/midyunit.c

r4679	r4680
298	298
299	299	case SOUND_CVSD:
300	300	williams_cvsd_init(machine);
301		memory_install_readwrite8_handler(cpu_get_address_space(machine->cpu[1], ADDRESS_SPACE_PROGRAM), prot_start, prot_end, 0, 0, SMH_BANK9, SMH_BANK9);
302		memory_set_bankptr(machine, 9, auto_malloc(0x80));
	301	memory_install_readwrite8_handler(cpu_get_address_space(machine->cpu[1], ADDRESS_SPACE_PROGRAM), prot_start, prot_end, 0, 0, (read8_space_func)SMH_BANK(9), (write8_space_func)SMH_BANK(9));
	302	memory_set_bankptr(machine, 9, auto_alloc_array(machine, UINT8, 0x80));
303	303	break;
304	304
305	305	case SOUND_ADPCM:
306	306	williams_adpcm_init(machine);
307		memory_install_readwrite8_handler(cpu_get_address_space(machine->cpu[1], ADDRESS_SPACE_PROGRAM), prot_start, prot_end, 0, 0, SMH_BANK9, SMH_BANK9);
308		memory_set_bankptr(machine, 9, auto_malloc(0x80));
	307	memory_install_readwrite8_handler(cpu_get_address_space(machine->cpu[1], ADDRESS_SPACE_PROGRAM), prot_start, prot_end, 0, 0, (read8_space_func)SMH_BANK(9), (write8_space_func)SMH_BANK(9));
	308	memory_set_bankptr(machine, 9, auto_alloc_array(machine, UINT8, 0x80));
309	309	break;
310	310
311	311	case SOUND_NARC:
312	312	williams_narc_init(machine);
313		memory_install_readwrite8_handler(cpu_get_address_space(machine->cpu[1], ADDRESS_SPACE_PROGRAM), prot_start, prot_end, 0, 0, SMH_BANK9, SMH_BANK9);
314		memory_set_bankptr(machine, 9, auto_malloc(0x80));
	313	memory_install_readwrite8_handler(cpu_get_address_space(machine->cpu[1], ADDRESS_SPACE_PROGRAM), prot_start, prot_end, 0, 0, (read8_space_func)SMH_BANK(9), (write8_space_func)SMH_BANK(9));
	314	memory_set_bankptr(machine, 9, auto_alloc_array(machine, UINT8, 0x80));
315	315	break;
316	316
317	317	case SOUND_YAWDIM:
r4679	r4680
479	479	init_generic(machine, 6, SOUND_ADPCM, 0xfa8d, 0xfa9c);
480	480
481	481	/* special inputs */
482		memory_install_read16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x01c00000, 0x01c0005f, 0, 0, term2_input_r);
483		memory_install_write16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x01e00000, 0x01e0001f, 0, 0, term2_sound_w);
	482	memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x01c00000, 0x01c0005f, 0, 0, term2_input_r);
	483	memory_install_write16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x01e00000, 0x01e0001f, 0, 0, term2_sound_w);
484	484
485	485	/* HACK: this prevents the freeze on the movies */
486	486	/* until we figure whats causing it, this is better than nothing */
487		t2_hack_mem = memory_install_write16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x010aa0e0, 0x010aa0ff, 0, 0, hack_w);
	487	t2_hack_mem = memory_install_write16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x010aa0e0, 0x010aa0ff, 0, 0, hack_w);
488	488	}
489	489
490	490	DRIVER_INIT( term2 ) { term2_init_common(machine, term2_hack_w); }

src/mame/machine/flstory.c

r4679	r4680
68	68	if ((ddrB & 0x02) && (~data & 0x02) && (portB_out & 0x02))
69	69	{
70	70	portA_in = from_main;
71		if (main_sent) cpu_set_input_line(space->machine->cpu[2],0,CLEAR_LINE);
	71	if (main_sent)
	72	cputag_set_input_line(space->machine, "mcu", 0, CLEAR_LINE);
72	73	main_sent = 0;
73		logerror("read command %02x from main cpu\n",portA_in);
	74	logerror("read command %02x from main cpu\n", portA_in);
74	75	}
75	76	if ((ddrB & 0x04) && (data & 0x04) && (~portB_out & 0x04))
76	77	{
77		logerror("send command %02x to main cpu\n",portA_out);
	78	logerror("send command %02x to main cpu\n", portA_out);
78	79	from_mcu = portA_out;
79	80	mcu_sent = 1;
80	81	}
r4679	r4680
95	96	portC_in = 0;
96	97	if (main_sent) portC_in |= 0x01;
97	98	if (!mcu_sent) portC_in |= 0x02;
98		//logerror("%04x: 68705 port C read %02x\n",cpu_get_pc(space->cpu),portC_in);
	99	//logerror("%04x: 68705 port C read %02x\n", cpu_get_pc(space->cpu), portC_in);
99	100	return (portC_out & ddrC) | (portC_in & ~ddrC);
100	101	}
101	102
102	103	WRITE8_HANDLER( flstory_68705_portC_w )
103	104	{
104		logerror("%04x: 68705 port C write %02x\n",cpu_get_pc(space->cpu),data);
	105	logerror("%04x: 68705 port C write %02x\n", cpu_get_pc(space->cpu), data);
105	106	portC_out = data;
106	107	}
107	108
r4679	r4680
112	113
113	114	WRITE8_HANDLER( flstory_mcu_w )
114	115	{
115		logerror("%04x: mcu_w %02x\n",cpu_get_pc(space->cpu),data);
	116	logerror("%04x: mcu_w %02x\n", cpu_get_pc(space->cpu), data);
116	117	from_main = data;
117	118	main_sent = 1;
118		cpu_set_input_line(space->machine->cpu[2],0,ASSERT_LINE);
	119	cputag_set_input_line(space->machine, "mcu", 0, ASSERT_LINE);
119	120	}
120	121
121	122	READ8_HANDLER( flstory_mcu_r )
122	123	{
123		logerror("%04x: mcu_r %02x\n",cpu_get_pc(space->cpu),from_mcu);
	124	logerror("%04x: mcu_r %02x\n",cpu_get_pc(space->cpu), from_mcu);
124	125	mcu_sent = 0;
125	126	return from_mcu;
126	127	}
r4679	r4680
131	132
132	133	/* bit 0 = when 1, mcu is ready to receive data from main cpu */
133	134	/* bit 1 = when 1, mcu has sent data to the main cpu */
134		//logerror("%04x: mcu_status_r\n",cpu_get_pc(space->cpu));
	135	//logerror("%04x: mcu_status_r\n", cpu_get_pc(space->cpu));
135	136	if (!main_sent) res |= 0x01;
136	137	if (mcu_sent) res |= 0x02;
137	138
r4679	r4680
140	141
141	142	WRITE8_HANDLER( onna34ro_mcu_w )
142	143	{
143		UINT16 score_adr = onna34ro_workram[0x29e]*0x100 + onna34ro_workram[0x29d];
	144	UINT16 score_adr = onna34ro_workram[0x29e] * 0x100 + onna34ro_workram[0x29d];
144	145
145	146	switch (data)
146	147	{

src/mame/machine/naomi.c

r4679	r4680
23	23
24	24	DRIVER_INIT(naomi)
25	25	{
26		memory_install_read64_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xc2ad238, 0xc2ad23f, 0, 0, naomi_bios_idle_skip_r); // rev e bios
	26	memory_install_read64_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xc2ad238, 0xc2ad23f, 0, 0, naomi_bios_idle_skip_r); // rev e bios
27	27	jvsboard_type = JVSBD_DEFAULT;
28	28	}
29	29
	30	DRIVER_INIT(naomi_mp)
	31	{
	32	memory_install_read64_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xc2ad238, 0xc2ad23f, 0, 0, naomi_bios_idle_skip_r); // rev e bios
	33	jvsboard_type = JVSBD_MAHJONG;
	34	}
	35
30	36	static READ64_HANDLER( naomigd_ggxxsla_idle_skip_r )
31	37	{
32	38	if (cpu_get_pc(space->cpu)==0x0c0c9adc)
r4679	r4680
37	43
38	44	DRIVER_INIT( ggxxsla )
39	45	{
40		memory_install_read64_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xc1aae18, 0xc1aae1f, 0, 0, naomigd_ggxxsla_idle_skip_r);
	46	memory_install_read64_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xc1aae18, 0xc1aae1f, 0, 0, naomigd_ggxxsla_idle_skip_r);
41	47	DRIVER_INIT_CALL(naomi);
42	48	}
43	49
r4679	r4680
52	58
53	59	DRIVER_INIT( ggxx )
54	60	{
55		memory_install_read64_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xc1837b8, 0xc1837bf, 0, 0, naomigd_ggxx_idle_skip_r);
	61	memory_install_read64_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xc1837b8, 0xc1837bf, 0, 0, naomigd_ggxx_idle_skip_r);
56	62	DRIVER_INIT_CALL(naomi);
57	63	}
58	64
r4679	r4680
69	75
70	76	DRIVER_INIT( ggxxrl )
71	77	{
72		memory_install_read64_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xc18d6c8, 0xc18d6cf, 0, 0, naomigd_ggxxrl_idle_skip_r);
	78	memory_install_read64_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xc18d6c8, 0xc18d6cf, 0, 0, naomigd_ggxxrl_idle_skip_r);
73	79	DRIVER_INIT_CALL(naomi);
74	80	}

src/mame/machine/segas32.c

r4679	r4680
38	38	int i;
39	39	const address_space *space = cputag_get_address_space(machine, "mcu", ADDRESS_SPACE_PROGRAM);
40	40	UINT8 *rom = memory_region(machine, "mcu");
41		UINT8* decrypted = auto_malloc(0x100000);
42		UINT8* temp = malloc_or_die(0x100000);
	41	UINT8* decrypted = auto_alloc_array(machine, UINT8, 0x100000);
	42	UINT8* temp = alloc_array_or_die(UINT8, 0x100000);
43	43
44	44	// set CPU3 opcode base
45	45	memory_set_decrypted_region(space, 0x00000, 0xfffff, decrypted);

src/mame/machine/slapfght.c

r4679	r4680
11	11	#include "includes/slapfght.h"
12	12
13	13
14		UINT8 *slapfight_dpram;
15		size_t slapfight_dpram_size;
16
17	14	static int slapfight_status;
18	15	static int getstar_sequence_index;
19	16	static int getstar_sh_intenabled;
r4679	r4680
44	41	getstar_sh_intenabled = 0;   /* disable sound cpu interrupts */
45	42
46	43	/* SOUND CPU */
47		cpu_set_input_line(machine->cpu[1], INPUT_LINE_RESET, ASSERT_LINE);
	44	cputag_set_input_line(machine, "audiocpu", INPUT_LINE_RESET, ASSERT_LINE);
48	45
49	46	/* MCU */
50	47	mcu_val = 0;
51	48	}
52	49
53		/* Interrupt handlers cpu & sound */
54
55		WRITE8_HANDLER( slapfight_dpram_w )
56		{
57		slapfight_dpram[offset]=data;
58		}
59
60		READ8_HANDLER( slapfight_dpram_r )
61		{
62		return slapfight_dpram[offset];
63		}
64
65
66
67	50	/* Slapfight CPU input/output ports
68	51
69	52	These ports seem to control memory access
r4679	r4680
73	56	/* Reset and hold sound CPU */
74	57	WRITE8_HANDLER( slapfight_port_00_w )
75	58	{
76		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_RESET, ASSERT_LINE);
	59	cputag_set_input_line(space->machine, "audiocpu", INPUT_LINE_RESET, ASSERT_LINE);
77	60	getstar_sh_intenabled = 0;
78	61	}
79	62
80	63	/* Release reset on sound CPU */
81	64	WRITE8_HANDLER( slapfight_port_01_w )
82	65	{
83		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_RESET, CLEAR_LINE);
	66	cputag_set_input_line(space->machine, "audiocpu", INPUT_LINE_RESET, CLEAR_LINE);
84	67	}
85	68
86	69	/* Disable and clear hardware interrupt */
r4679	r4680
739	722	if ((ddrB & 0x02) && (~data & 0x02) && (portB_out & 0x02))
740	723	{
741	724	portA_in = from_main;
742		if (main_sent) cpu_set_input_line(space->machine->cpu[2],0,CLEAR_LINE);
	725	if (main_sent) cputag_set_input_line(space->machine, "mcu", 0, CLEAR_LINE);
743	726	main_sent = 0;
744	727	}
745	728	if ((ddrB & 0x04) && (data & 0x04) && (~portB_out & 0x04))
r4679	r4680
779	762	{
780	763	from_main = data;
781	764	main_sent = 1;
782		mcu_sent=0;
783		cpu_set_input_line(space->machine->cpu[2],0,ASSERT_LINE);
	765	mcu_sent = 0;
	766	cputag_set_input_line(space->machine, "mcu", 0, ASSERT_LINE);
784	767	}
785	768
786	769	READ8_HANDLER( tigerh_mcu_r )

src/mame/machine/asteroid.c

r4679	r4680
128	128
129	129	WRITE8_HANDLER( astdelux_led_w )
130	130	{
131		set_led_status(offset,(data&0x80)?0:1);
	131	set_led_status(offset, (data & 0x80) ? 0 : 1);
132	132	}
133	133
134	134
135	135	MACHINE_RESET( asteroid )
136	136	{
137		asteroid_bank_switch_w(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM),0,0);
138		avgdvg_reset_w(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM),0,0);
	137	asteroid_bank_switch_w(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0, 0);
	138	avgdvg_reset_w(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0, 0);
139	139	}

src/mame/machine/mhavoc.c

r4679	r4680
44	44	alpha_irq_clock++;
45	45	if ((alpha_irq_clock & 0x0c) == 0x0c)
46	46	{
47		cpu_set_input_line(machine->cpu[0], 0, ASSERT_LINE);
	47	cputag_set_input_line(machine, "alpha", 0, ASSERT_LINE);
48	48	alpha_irq_clock_enable = 0;
49	49	}
50	50	}
r4679	r4680
53	53	if (has_gamma_cpu)
54	54	{
55	55	gamma_irq_clock++;
56		cpu_set_input_line(machine->cpu[1], 0, (gamma_irq_clock & 0x08) ? ASSERT_LINE : CLEAR_LINE);
	56	cputag_set_input_line(machine, "gamma", 0, (gamma_irq_clock & 0x08) ? ASSERT_LINE : CLEAR_LINE);
57	57	}
58	58	}
59	59
r4679	r4680
61	61	WRITE8_HANDLER( mhavoc_alpha_irq_ack_w )
62	62	{
63	63	/* clear the line and reset the clock */
64		cpu_set_input_line(space->machine->cpu[0], 0, CLEAR_LINE);
	64	cputag_set_input_line(space->machine, "alpha", 0, CLEAR_LINE);
65	65	alpha_irq_clock = 0;
66	66	alpha_irq_clock_enable = 1;
67	67	}
r4679	r4680
70	70	WRITE8_HANDLER( mhavoc_gamma_irq_ack_w )
71	71	{
72	72	/* clear the line and reset the clock */
73		cpu_set_input_line(space->machine->cpu[1], 0, CLEAR_LINE);
	73	cputag_set_input_line(space->machine, "gamma", 0, CLEAR_LINE);
74	74	gamma_irq_clock = 0;
75	75	}
76	76
r4679	r4680
84	84
85	85	MACHINE_RESET( mhavoc )
86	86	{
87		const address_space *space = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM);
88		has_gamma_cpu = (machine->cpu[1] != NULL);
	87	const address_space *space = cputag_get_address_space(machine, "alpha", ADDRESS_SPACE_PROGRAM);
	88	has_gamma_cpu = (cputag_get_cpu(machine, "gamma") != NULL);
89	89
90	90	memory_configure_bank(machine, 1, 0, 1, mhavoc_zram0, 0);
91	91	memory_configure_bank(machine, 1, 1, 1, mhavoc_zram1, 0);
r4679	r4680
146	146	alpha_data = param;
147	147
148	148	/* signal with an NMI pulse */
149		cpu_set_input_line(machine->cpu[1], INPUT_LINE_NMI, PULSE_LINE);
	149	cputag_set_input_line(machine, "gamma", INPUT_LINE_NMI, PULSE_LINE);
150	150
151	151	/* the sound CPU needs to reply in 250microseconds (according to Neil Bradley) */
152	152	timer_set(machine, ATTOTIME_IN_USEC(250), NULL, 0, 0);
r4679	r4680
227	227
228	228	CUSTOM_INPUT( mhavoc_bit67_r )
229	229	{
230		const char *tag1 = param;
	230	const char *tag1 = (const char *)param;
231	231	const char *tag2 = tag1 + strlen(tag1) + 1;
232	232	return input_port_read(field->port->machine, player_1 ? tag2 : tag1) & 0x03;
233	233	}
r4679	r4680
271	271	player_1 = (data >> 5) & 1;
272	272
273	273	/* Bit 3 = Gamma reset */
274		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_RESET, (data & 0x08) ? CLEAR_LINE : ASSERT_LINE);
	274	cputag_set_input_line(space->machine, "gamma", INPUT_LINE_RESET, (data & 0x08) ? CLEAR_LINE : ASSERT_LINE);
275	275	if (!(data & 0x08))
276	276	{
277	277	logerror("\t\t\t\t*** resetting gamma processor. ***\n");
r4679	r4680
341	341	{
342	342	/* install the speech support that was only optionally stuffed for use */
343	343	/* in the Return to Vax hack */
344		memory_install_write8_handler(cpu_get_address_space(machine->cpu[1], ADDRESS_SPACE_PROGRAM), 0x5800, 0x5800, 0, 0, mhavocrv_speech_data_w);
345		memory_install_write8_handler(cpu_get_address_space(machine->cpu[1], ADDRESS_SPACE_PROGRAM), 0x5900, 0x5900, 0, 0, mhavocrv_speech_strobe_w);
	344	memory_install_write8_handler(cputag_get_address_space(machine, "gamma", ADDRESS_SPACE_PROGRAM), 0x5800, 0x5800, 0, 0, mhavocrv_speech_data_w);
	345	memory_install_write8_handler(cputag_get_address_space(machine, "gamma", ADDRESS_SPACE_PROGRAM), 0x5900, 0x5900, 0, 0, mhavocrv_speech_strobe_w);
346	346	}

src/mame/machine/decocass.c

r4679	r4680
103	103	decocass_sound_ack |= 0x80;
104	104	/* remove snd cpu data ack bit. i don't see it in the schems, but... */
105	105	decocass_sound_ack &= ~0x40;
106		cpu_set_input_line(space->machine->cpu[1], M6502_IRQ_LINE, ASSERT_LINE);
	106	cputag_set_input_line(space->machine, "audiocpu", M6502_IRQ_LINE, ASSERT_LINE);
107	107	}
108	108
109	109	READ8_HANDLER( decocass_sound_data_r )
r4679	r4680
131	131	{
132	132	UINT8 data = soundlatch_r(space, 0);
133	133	LOG(4,("CPU %s sound command <- $%02x\n", space->cpu->tag, data));
134		cpu_set_input_line(space->machine->cpu[1], M6502_IRQ_LINE, CLEAR_LINE);
	134	cputag_set_input_line(space->machine, "audiocpu", M6502_IRQ_LINE, CLEAR_LINE);
135	135	decocass_sound_ack &= ~0x80;
136	136	return data;
137	137	}
r4679	r4680
140	140	{
141	141	int scanline = param;
142	142	audio_nmi_state = scanline & 8;
143		cpu_set_input_line(timer->machine->cpu[1], INPUT_LINE_NMI, (audio_nmi_enabled && audio_nmi_state) ? ASSERT_LINE : CLEAR_LINE);
	143	cputag_set_input_line(timer->machine, "audiocpu", INPUT_LINE_NMI, (audio_nmi_enabled && audio_nmi_state) ? ASSERT_LINE : CLEAR_LINE);
144	144	}
145	145
146	146	WRITE8_HANDLER( decocass_sound_nmi_enable_w )
147	147	{
148	148	audio_nmi_enabled = 1;
149		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_NMI, (audio_nmi_enabled && audio_nmi_state) ? ASSERT_LINE : CLEAR_LINE);
	149	cputag_set_input_line(space->machine, "audiocpu", INPUT_LINE_NMI, (audio_nmi_enabled && audio_nmi_state) ? ASSERT_LINE : CLEAR_LINE);
150	150	}
151	151
152	152	READ8_HANDLER( decocass_sound_nmi_enable_r )
153	153	{
154	154	audio_nmi_enabled = 1;
155		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_NMI, (audio_nmi_enabled && audio_nmi_state) ? ASSERT_LINE : CLEAR_LINE);
	155	cputag_set_input_line(space->machine, "audiocpu", INPUT_LINE_NMI, (audio_nmi_enabled && audio_nmi_state) ? ASSERT_LINE : CLEAR_LINE);
156	156	return 0xff;
157	157	}
158	158
r4679	r4680
172	172
173	173	WRITE8_HANDLER( decocass_nmi_reset_w )
174	174	{
175		cpu_set_input_line(space->machine->cpu[0], INPUT_LINE_NMI, CLEAR_LINE );
	175	cputag_set_input_line(space->machine, "maincpu", INPUT_LINE_NMI, CLEAR_LINE );
176	176	}
177	177
178	178	WRITE8_HANDLER( decocass_quadrature_decoder_reset_w )
r4679	r4680
246	246	decocass_reset = data;
247	247
248	248	/* CPU #1 active high reset */
249		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_RESET, data & 0x01);
	249	cputag_set_input_line(space->machine, "audiocpu", INPUT_LINE_RESET, data & 0x01);
250	250
251	251	/* on reset also disable audio NMI */
252	252	if (data & 1)
253	253	{
254	254	audio_nmi_enabled = 0;
255		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_NMI, (audio_nmi_enabled && audio_nmi_state) ? ASSERT_LINE : CLEAR_LINE);
	255	cputag_set_input_line(space->machine, "audiocpu", INPUT_LINE_NMI, (audio_nmi_enabled && audio_nmi_state) ? ASSERT_LINE : CLEAR_LINE);
256	256	}
257	257
258	258	/* 8041 active low reset */
259		cpu_set_input_line(space->machine->cpu[2], INPUT_LINE_RESET, (data & 0x08) ^ 0x08);
	259	cputag_set_input_line(space->machine, "mcu", INPUT_LINE_RESET, (data & 0x08) ^ 0x08);
260	260	}
261	261
262	262
r4679	r4680
314	314	if (1 == (offset & 1))
315	315	{
316	316	if (0 == (offset & E5XX_MASK))
317		data = upi41_master_r(space->machine->cpu[2], 1);
	317	data = upi41_master_r(cputag_get_cpu(space->machine, "mcu"), 1);
318	318	else
319	319	data = 0xff;
320	320
r4679	r4680
344	344	}
345	345
346	346	if (0 == (offset & E5XX_MASK))
347		data = upi41_master_r(space->machine->cpu[2], 0);
	347	data = upi41_master_r(cputag_get_cpu(space->machine, "mcu"), 0);
348	348	else
349	349	data = 0xff;
350	350
r4679	r4680
393	393	if (1 == (offset & 1))
394	394	{
395	395	if (0 == (offset & E5XX_MASK))
396		data = upi41_master_r(space->machine->cpu[2], 1);
	396	data = upi41_master_r(cputag_get_cpu(space->machine, "mcu"), 1);
397	397	else
398	398	data = 0xff;
399	399
r4679	r4680
423	423	}
424	424
425	425	if (0 == (offset & E5XX_MASK))
426		data = upi41_master_r(space->machine->cpu[2], 0);
	426	data = upi41_master_r(cputag_get_cpu(space->machine, "mcu"), 0);
427	427	else
428	428	data = 0xff;
429	429
r4679	r4680
472	472	if (1 == (offset & 1))
473	473	{
474	474	if (0 == (offset & E5XX_MASK))
475		data = upi41_master_r(space->machine->cpu[2], 1);
	475	data = upi41_master_r(cputag_get_cpu(space->machine, "mcu"), 1);
476	476	else
477	477	data = 0xff;
478	478
r4679	r4680
502	502	}
503	503
504	504	if (0 == (offset & E5XX_MASK))
505		data = upi41_master_r(space->machine->cpu[2], 0);
	505	data = upi41_master_r(cputag_get_cpu(space->machine, "mcu"), 0);
506	506	else
507	507	data = 0xff;
508	508
r4679	r4680
551	551	if (1 == (offset & 1))
552	552	{
553	553	if (0 == (offset & E5XX_MASK))
554		data = upi41_master_r(space->machine->cpu[2], 1);
	554	data = upi41_master_r(cputag_get_cpu(space->machine, "mcu"), 1);
555	555	else
556	556	data = 0xff;
557	557
r4679	r4680
581	581	}
582	582
583	583	if (0 == (offset & E5XX_MASK))
584		data = upi41_master_r(space->machine->cpu[2], 0);
	584	data = upi41_master_r(cputag_get_cpu(space->machine, "mcu"), 0);
585	585	else
586	586	data = 0xff;
587	587
r4679	r4680
632	632	if (1 == (offset & 1))
633	633	{
634	634	if (0 == (offset & E5XX_MASK))
635		data = upi41_master_r(space->machine->cpu[2], 1);
	635	data = upi41_master_r(cputag_get_cpu(space->machine, "mcu"), 1);
636	636	else
637	637	data = 0xff;
638	638
r4679	r4680
662	662	}
663	663
664	664	if (0 == (offset & E5XX_MASK))
665		data = upi41_master_r(space->machine->cpu[2], 0);
	665	data = upi41_master_r(cputag_get_cpu(space->machine, "mcu"), 0);
666	666	else
667	667	data = 0xff;
668	668
r4679	r4680
725	725	else
726	726	{
727	727	if (0 == (offset & E5XX_MASK))
728		data = upi41_master_r(space->machine->cpu[2], offset);
	728	data = upi41_master_r(cputag_get_cpu(space->machine, "mcu"), offset);
729	729	else
730	730	data = offset & 0xff;
731	731
r4679	r4680
762	762	LOG(3,("PROM:%s D2:%d", type2_xx_latch ? "on" : "off", type2_d2_latch));
763	763	}
764	764	}
765		upi41_master_w(space->machine->cpu[2], offset & 1, data);
	765	upi41_master_w(cputag_get_cpu(space->machine, "mcu"), offset & 1, data);
766	766
767	767	#ifdef MAME_DEBUG
768	768	decocass_fno(offset, data);
r4679	r4680
803	803	{
804	804	if (0 == (offset & E5XX_MASK))
805	805	{
806		data = upi41_master_r(space->machine->cpu[2], 1);
	806	data = upi41_master_r(cputag_get_cpu(space->machine, "mcu"), 1);
807	807	LOG(4,("%10s 6502-PC: %04x decocass_type3_r(%02x): $%02x <- 8041 STATUS\n", attotime_string(timer_get_time(space->machine), 6), cpu_get_previouspc(space->cpu), offset, data));
808	808	}
809	809	else
r4679	r4680
824	824	{
825	825	if (0 == (offset & E5XX_MASK))
826	826	{
827		save = upi41_master_r(space->machine->cpu[2], 0);
	827	save = upi41_master_r(cputag_get_cpu(space->machine, "mcu"), 0);
828	828	switch (type3_swap)
829	829	{
830	830	case TYPE3_SWAP_01:
r4679	r4680
996	996	}
997	997	}
998	998	LOG(3,("%10s 6502-PC: %04x decocass_e5xx_w(%02x): $%02x -> %s\n", attotime_string(timer_get_time(space->machine), 6), cpu_get_previouspc(space->cpu), offset, data, offset & 1 ? "8041-CMND" : "8041-DATA"));
999		upi41_master_w(space->machine->cpu[2], offset, data);
	999	upi41_master_w(cputag_get_cpu(space->machine, "mcu"), offset, data);
1000	1000	}
1001	1001
1002	1002	/***************************************************************************
r4679	r4680
1019	1019	{
1020	1020	if (0 == (offset & E5XX_MASK))
1021	1021	{
1022		data = upi41_master_r(space->machine->cpu[2], 1);
	1022	data = upi41_master_r(cputag_get_cpu(space->machine, "mcu"), 1);
1023	1023	LOG(4,("%10s 6502-PC: %04x decocass_type4_r(%02x): $%02x <- 8041 STATUS\n", attotime_string(timer_get_time(space->machine), 6), cpu_get_previouspc(space->cpu), offset, data));
1024	1024	}
1025	1025	else
r4679	r4680
1042	1042	{
1043	1043	if (0 == (offset & E5XX_MASK))
1044	1044	{
1045		data = upi41_master_r(space->machine->cpu[2], 0);
	1045	data = upi41_master_r(cputag_get_cpu(space->machine, "mcu"), 0);
1046	1046	LOG(3,("%10s 6502-PC: %04x decocass_type4_r(%02x): $%02x '%c' <- open bus (D0 replaced with latch)\n", attotime_string(timer_get_time(space->machine), 6), cpu_get_previouspc(space->cpu), offset, data, (data >= 32) ? data : '.'));
1047	1047	}
1048	1048	else
r4679	r4680
1082	1082	}
1083	1083	}
1084	1084	LOG(3,("%10s 6502-PC: %04x decocass_e5xx_w(%02x): $%02x -> %s\n", attotime_string(timer_get_time(space->machine), 6), cpu_get_previouspc(space->cpu), offset, data, offset & 1 ? "8041-CMND" : "8041-DATA"));
1085		upi41_master_w(space->machine->cpu[2], offset, data);
	1085	upi41_master_w(cputag_get_cpu(space->machine, "mcu"), offset, data);
1086	1086	}
1087	1087
1088	1088	/***************************************************************************
r4679	r4680
1102	1102	{
1103	1103	if (0 == (offset & E5XX_MASK))
1104	1104	{
1105		data = upi41_master_r(space->machine->cpu[2], 1);
	1105	data = upi41_master_r(cputag_get_cpu(space->machine, "mcu"), 1);
1106	1106	LOG(4,("%10s 6502-PC: %04x decocass_type5_r(%02x): $%02x <- 8041 STATUS\n", attotime_string(timer_get_time(space->machine), 6), cpu_get_previouspc(space->cpu), offset, data));
1107	1107	}
1108	1108	else
r4679	r4680
1122	1122	{
1123	1123	if (0 == (offset & E5XX_MASK))
1124	1124	{
1125		data = upi41_master_r(space->machine->cpu[2], 0);
	1125	data = upi41_master_r(cputag_get_cpu(space->machine, "mcu"), 0);
1126	1126	LOG(3,("%10s 6502-PC: %04x decocass_type5_r(%02x): $%02x '%c' <- open bus (D0 replaced with latch)\n", attotime_string(timer_get_time(space->machine), 6), cpu_get_previouspc(space->cpu), offset, data, (data >= 32) ? data : '.'));
1127	1127	}
1128	1128	else
r4679	r4680
1159	1159	}
1160	1160	}
1161	1161	LOG(3,("%10s 6502-PC: %04x decocass_e5xx_w(%02x): $%02x -> %s\n", attotime_string(timer_get_time(space->machine), 6), cpu_get_previouspc(space->cpu), offset, data, offset & 1 ? "8041-CMND" : "8041-DATA"));
1162		upi41_master_w(space->machine->cpu[2], offset, data);
	1162	upi41_master_w(cputag_get_cpu(space->machine, "mcu"), offset, data);
1163	1163	}
1164	1164
1165	1165	/***************************************************************************
r4679	r4680
1178	1178	{
1179	1179	if (0 == (offset & E5XX_MASK))
1180	1180	{
1181		data = upi41_master_r(space->machine->cpu[2], 1);
	1181	data = upi41_master_r(cputag_get_cpu(space->machine, "mcu"), 1);
1182	1182	LOG(4,("%10s 6502-PC: %04x decocass_nodong_r(%02x): $%02x <- 8041 STATUS\n", attotime_string(timer_get_time(space->machine), 6), cpu_get_previouspc(space->cpu), offset, data));
1183	1183	}
1184	1184	else
r4679	r4680
1191	1191	{
1192	1192	if (0 == (offset & E5XX_MASK))
1193	1193	{
1194		data = upi41_master_r(space->machine->cpu[2], 0);
	1194	data = upi41_master_r(cputag_get_cpu(space->machine, "mcu"), 0);
1195	1195	LOG(3,("%10s 6502-PC: %04x decocass_nodong_r(%02x): $%02x '%c' <- open bus (D0 replaced with latch)\n", attotime_string(timer_get_time(space->machine), 6), cpu_get_previouspc(space->cpu), offset, data, (data >= 32) ? data : '.'));
1196	1196	}
1197	1197	else
r4679	r4680
1263	1263	if (0 == (offset & E5XX_MASK))
1264	1264	{
1265	1265	LOG(3,("%10s 6502-PC: %04x decocass_e5xx_w(%02x): $%02x -> %s\n", attotime_string(timer_get_time(space->machine), 6), cpu_get_previouspc(space->cpu), offset, data, offset & 1 ? "8041-CMND" : "8041-DATA"));
1266		upi41_master_w(space->machine->cpu[2], offset & 1, data);
	1266	upi41_master_w(cputag_get_cpu(space->machine, "mcu"), offset & 1, data);
1267	1267	#ifdef MAME_DEBUG
1268	1268	decocass_fno(offset, data);
1269	1269	#endif
r4679	r4680
1996	1996	UINT32 dataclock = tape->clockpos - REGION_BOT_GAP_END_CLOCK;
1997	1997
1998	1998	/* compute the block number */
1999		tape->region = REGION_DATA_BLOCK_0 + dataclock / (TAPE_CLOCKS_PER_BYTE * BYTE_BLOCK_TOTAL);
	1999	tape->region = (tape_region)(REGION_DATA_BLOCK_0 + dataclock / (TAPE_CLOCKS_PER_BYTE * BYTE_BLOCK_TOTAL));
2000	2000	dataclock -= (tape->region - REGION_DATA_BLOCK_0) * TAPE_CLOCKS_PER_BYTE * BYTE_BLOCK_TOTAL;
2001	2001
2002	2002	/* compute the byte within the block */
2003		tape->bytenum = dataclock / TAPE_CLOCKS_PER_BYTE;
	2003	tape->bytenum = (tape_byte)(dataclock / TAPE_CLOCKS_PER_BYTE);
2004	2004	dataclock -= tape->bytenum * TAPE_CLOCKS_PER_BYTE;
2005	2005
2006	2006	/* compute the bit within the byte */

src/mame/machine/twincobr.c

r4679	r4680
72	72	switch (main_ram_seg) {
73	73	case 0x30000:
74	74	case 0x40000:
75		case 0x50000:   mainspace = cpu_get_address_space(space->machine->cpu[0], ADDRESS_SPACE_PROGRAM);
	75	case 0x50000:   mainspace = cputag_get_address_space(space->machine, "maincpu", ADDRESS_SPACE_PROGRAM);
76	76	input_data = memory_read_word(mainspace, main_ram_seg + dsp_addr_w);
77	77	break;
78	78	default:      logerror("DSP PC:%04x Warning !!! IO reading from %08x (port 1)\n",cpu_get_previouspc(space->cpu),main_ram_seg + dsp_addr_w); break;
r4679	r4680
90	90	switch (main_ram_seg) {
91	91	case 0x30000:   if ((dsp_addr_w < 3) && (data == 0)) dsp_execute = 1;
92	92	case 0x40000:
93		case 0x50000:   mainspace = cpu_get_address_space(space->machine->cpu[0], ADDRESS_SPACE_PROGRAM);
	93	case 0x50000:   mainspace = cputag_get_address_space(space->machine, "maincpu", ADDRESS_SPACE_PROGRAM);
94	94	memory_write_word(mainspace, main_ram_seg + dsp_addr_w, data);
95	95	break;
96	96	default:      logerror("DSP PC:%04x Warning !!! IO writing to %08x (port 1)\n",cpu_get_previouspc(space->cpu),main_ram_seg + dsp_addr_w); break;
r4679	r4680
122	122	switch (main_ram_seg) {
123	123	case 0x7000:
124	124	case 0x8000:
125		case 0xa000:   mainspace = cpu_get_address_space(space->machine->cpu[0], ADDRESS_SPACE_PROGRAM);
	125	case 0xa000:   mainspace = cputag_get_address_space(space->machine, "maincpu", ADDRESS_SPACE_PROGRAM);
126	126	input_data =  memory_read_byte(mainspace, main_ram_seg + (dsp_addr_w + 0))
127	127	| (memory_read_byte(mainspace, main_ram_seg + (dsp_addr_w + 1)) << 8);
128	128	break;
r4679	r4680
141	141	switch (main_ram_seg) {
142	142	case 0x7000:   if ((dsp_addr_w < 3) && (data == 0)) dsp_execute = 1;
143	143	case 0x8000:
144		case 0xa000:   mainspace = cpu_get_address_space(space->machine->cpu[0], ADDRESS_SPACE_PROGRAM);
	144	case 0xa000:   mainspace = cputag_get_address_space(space->machine, "maincpu", ADDRESS_SPACE_PROGRAM);
145	145	memory_write_byte(mainspace, main_ram_seg + (dsp_addr_w + 0), (data & 0xff));
146	146	memory_write_byte(mainspace, main_ram_seg + (dsp_addr_w + 1), ((data >> 8) & 0xff));
147	147	break;
r4679	r4680
164	164	if (data == 0) {
165	165	if (dsp_execute) {
166	166	LOG(("Turning the main CPU on\n"));
167		cpu_set_input_line(space->machine->cpu[0], INPUT_LINE_HALT, CLEAR_LINE);
	167	cputag_set_input_line(space->machine, "maincpu", INPUT_LINE_HALT, CLEAR_LINE);
168	168	dsp_execute = 0;
169	169	}
170	170	twincobr_dsp_BIO = ASSERT_LINE;
r4679	r4680
201	201	twincobr_dsp_on = enable;
202	202	if (enable) {
203	203	LOG(("Turning DSP on and main CPU off\n"));
204		cpu_set_input_line(machine->cpu[2], INPUT_LINE_HALT, CLEAR_LINE);
205		cpu_set_input_line(machine->cpu[2], 0, ASSERT_LINE); /* TMS32010 INT */
206		cpu_set_input_line(machine->cpu[0], INPUT_LINE_HALT, ASSERT_LINE);
	204	cputag_set_input_line(machine, "dsp", INPUT_LINE_HALT, CLEAR_LINE);
	205	cputag_set_input_line(machine, "dsp", 0, ASSERT_LINE); /* TMS32010 INT */
	206	cputag_set_input_line(machine, "maincpu", INPUT_LINE_HALT, ASSERT_LINE);
207	207	}
208	208	else {
209	209	LOG(("Turning DSP off\n"));
210		cpu_set_input_line(machine->cpu[2], 0, CLEAR_LINE); /* TMS32010 INT */
211		cpu_set_input_line(machine->cpu[2], INPUT_LINE_HALT, ASSERT_LINE);
	210	cputag_set_input_line(machine, "dsp", 0, CLEAR_LINE); /* TMS32010 INT */
	211	cputag_set_input_line(machine, "dsp", INPUT_LINE_HALT, ASSERT_LINE);
212	212	}
213	213	}
214	214
r4679	r4680
287	287	/****** The following apply to Flying Shark/Wardner only ******/
288	288	case 0x00:   /* This means assert the INT line to the DSP */
289	289	LOG(("Turning DSP on and main CPU off\n"));
290		cpu_set_input_line(space->machine->cpu[2], INPUT_LINE_HALT, CLEAR_LINE);
291		cpu_set_input_line(space->machine->cpu[2], 0, ASSERT_LINE); /* TMS32010 INT */
292		cpu_set_input_line(space->machine->cpu[0], INPUT_LINE_HALT, ASSERT_LINE);
	290	cputag_set_input_line(space->machine, "dsp", INPUT_LINE_HALT, CLEAR_LINE);
	291	cputag_set_input_line(space->machine, "dsp", 0, ASSERT_LINE); /* TMS32010 INT */
	292	cputag_set_input_line(space->machine, "maincpu", INPUT_LINE_HALT, ASSERT_LINE);
293	293	break;
294	294	case 0x01:   /* This means inhibit the INT line to the DSP */
295	295	LOG(("Turning DSP off\n"));
296		cpu_set_input_line(space->machine->cpu[2], 0, CLEAR_LINE); /* TMS32010 INT */
297		cpu_set_input_line(space->machine->cpu[2], INPUT_LINE_HALT, ASSERT_LINE);
	296	cputag_set_input_line(space->machine, "dsp", 0, CLEAR_LINE); /* TMS32010 INT */
	297	cputag_set_input_line(space->machine, "dsp", INPUT_LINE_HALT, ASSERT_LINE);
298	298	break;
299	299	}
300	300	}

src/mame/machine/konppc.c

r4679	r4680
47	47	for (i=0; i < num_boards; i++)
48	48	{
49	49	dsp_comm_ppc[i][0] = 0x00;
50		dsp_shared_ram[i] = auto_malloc(DSP_BANK_SIZE * 2);
	50	dsp_shared_ram[i] = auto_alloc_array(machine, UINT32, DSP_BANK_SIZE * 2/4);
51	51	dsp_shared_ram_bank[i] = 0;
52	52
53	53	dsp_state[i] = 0x80;
r4679	r4680
58	58	nwk_fifo_read_ptr[i] = 0;
59	59	nwk_fifo_write_ptr[i] = 0;
60	60
61		nwk_fifo[i] = auto_malloc(sizeof(UINT32) * 0x800);
62		nwk_ram[i] = auto_malloc(sizeof(UINT32) * 0x2000);
	61	nwk_fifo[i] = auto_alloc_array(machine, UINT32, 0x800);
	62	nwk_ram[i] = auto_alloc_array(machine, UINT32, 0x2000);
63	63
64	64	state_save_register_item_array(machine, "konppc", NULL, i, dsp_comm_ppc[i]);
65	65	state_save_register_item_array(machine, "konppc", NULL, i, dsp_comm_sharc[i]);
r4679	r4680
413	413	int i;
414	414	for (i=0; i < MAX_K033906_CHIPS; i++)
415	415	{
416		K033906_reg[i] = auto_malloc(sizeof(UINT32) * 256);
417		K033906_ram[i] = auto_malloc(sizeof(UINT32) * 32768);
	416	K033906_reg[i] = auto_alloc_array(machine, UINT32, 256);
	417	K033906_ram[i] = auto_alloc_array(machine, UINT32, 32768);
418	418	state_save_register_item_pointer(machine, "K033906", NULL, i, K033906_reg[i], 256);
419	419	state_save_register_item_pointer(machine, "K033906", NULL, i, K033906_ram[i], 32768);
420	420	}

src/mame/machine/atari_vg.c

r4679	r4680
129	129	}
130	130
131	131
132		static DEVICE_SET_INFO( atari_vg_earom )
133		{
134		switch (state)
135		{
136		/* no parameters to set */
137		}
138		}
139
140
141	132	DEVICE_GET_INFO( atari_vg_earom )
142	133	{
143	134	switch (state)
r4679	r4680
148	139	case DEVINFO_INT_CLASS:                     info->i = DEVICE_CLASS_PERIPHERAL;      break;
149	140
150	141	/* --- the following bits of info are returned as pointers to data or functions --- */
151		case DEVINFO_FCT_SET_INFO:                  info->set_info = DEVICE_SET_INFO_NAME(atari_vg_earom); break;
152	142	case DEVINFO_FCT_START:                     info->start = DEVICE_START_NAME(atari_vg_earom);break;
153	143	case DEVINFO_FCT_NVRAM:                     info->nvram = DEVICE_NVRAM_NAME(atari_vg_earom); break;
154	144	case DEVINFO_FCT_STOP:                     /* Nothing */                     break;

src/mame/machine/irobot.c

r4679	r4680
180	180	if (scanline == 224) irvg_vblank=1;
181	181	logerror("SCANLINE CALLBACK %d\n",scanline);
182	182	/* set the IRQ line state based on the 32V line state */
183		cpu_set_input_line(machine->cpu[0], M6809_IRQ_LINE, (scanline & 32) ? ASSERT_LINE : CLEAR_LINE);
	183	cputag_set_input_line(machine, "maincpu", M6809_IRQ_LINE, (scanline & 32) ? ASSERT_LINE : CLEAR_LINE);
184	184
185	185	/* set a callback for the next 32-scanline increment */
186	186	scanline += 32;
r4679	r4680
208	208	/* set an initial timer to go off on scanline 0 */
209	209	timer_set(machine, video_screen_get_time_until_pos(machine->primary_screen, 0, 0), NULL, 0, scanline_callback);
210	210
211		irobot_rom_banksel_w(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM),0,0);
212		irobot_out0_w(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM),0,0);
	211	irobot_rom_banksel_w(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM),0,0);
	212	irobot_out0_w(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM),0,0);
213	213	irobot_combase = comRAM[0];
214	214	irobot_combase_mb = comRAM[1];
215	215	irobot_outx = 0;
r4679	r4680
375	375	int i;
376	376
377	377	/* allocate RAM */
378		mbops = auto_malloc(sizeof(irmb_ops) * 1024);
	378	mbops = auto_alloc_array(machine, irmb_ops, 1024);
379	379
380	380	for (i = 0; i < 1024; i++)
381	381	{
r4679	r4680
457	457	{
458	458	logerror("mb done. ");
459	459	irmb_running = 0;
460		cpu_set_input_line(machine->cpu[0], M6809_FIRQ_LINE, ASSERT_LINE);
	460	cputag_set_input_line(machine, "maincpu", M6809_FIRQ_LINE, ASSERT_LINE);
461	461	}
462	462
463	463
r4679	r4680
861	861	timer_adjust_oneshot(irmb_timer, attotime_mul(ATTOTIME_IN_NSEC(200), icount), 0);
862	862	}
863	863	#else
864		cpu_set_input_line(machine->cpu[0], M6809_FIRQ_LINE, ASSERT_LINE);
	864	cputag_set_input_line(machine, "maincpu", M6809_FIRQ_LINE, ASSERT_LINE);
865	865	#endif
866	866	irmb_running=1;
867	867	}

src/mame/machine/leland.c

r4679	r4680
365	365	MACHINE_START( leland )
366	366	{
367	367	/* allocate extra stuff */
368		battery_ram = auto_malloc(LELAND_BATTERY_RAM_SIZE);
	368	battery_ram = auto_alloc_array(machine, UINT8, LELAND_BATTERY_RAM_SIZE);
369	369
370	370	/* start scanline interrupts going */
371	371	master_int_timer = timer_alloc(machine, leland_interrupt_callback, NULL);
r4679	r4680
409	409	memory_set_bankptr(machine, 3, &slave_base[0x10000]);
410	410
411	411	/* if we have an I80186 CPU, reset it */
412		if (machine->cpu[2] != NULL && cpu_get_type(machine->cpu[2]) == CPU_I80186)
	412	if (cputag_get_cpu(machine, "audiocpu") != NULL && cpu_get_type(cputag_get_cpu(machine, "audiocpu")) == CPU_I80186)
413	413	leland_80186_sound_init();
414	414	}
415	415
r4679	r4680
417	417	MACHINE_START( ataxx )
418	418	{
419	419	/* set the odd data banks */
420		battery_ram = auto_malloc(LELAND_BATTERY_RAM_SIZE);
421		extra_tram = auto_malloc(ATAXX_EXTRA_TRAM_SIZE);
	420	battery_ram = auto_alloc_array(machine, UINT8, LELAND_BATTERY_RAM_SIZE);
	421	extra_tram = auto_alloc_array(machine, UINT8, ATAXX_EXTRA_TRAM_SIZE);
422	422
423	423	/* start scanline interrupts going */
424	424	master_int_timer = timer_alloc(machine, ataxx_interrupt_callback, NULL);
r4679	r4680
474	474
475	475	/* interrupts generated on the VA10 line, which is every */
476	476	/* 16 scanlines starting with scanline #8 */
477		cpu_set_input_line(machine->cpu[0], 0, HOLD_LINE);
	477	cputag_set_input_line(machine, "master", 0, HOLD_LINE);
478	478
479	479	/* set a timer for the next one */
480	480	scanline += 16;
r4679	r4680
489	489	int scanline = param;
490	490
491	491	/* interrupts generated according to the interrupt control register */
492		cpu_set_input_line(machine->cpu[0], 0, HOLD_LINE);
	492	cputag_set_input_line(machine, "master", 0, HOLD_LINE);
493	493
494	494	/* set a timer for the next one */
495	495	timer_adjust_oneshot(master_int_timer, video_screen_get_time_until_pos(machine->primary_screen, scanline, 0), scanline);
r4679	r4680
1158	1158
1159	1159	case 0x01:   /* /GIN1 */
1160	1160	result = input_port_read(space->machine, "IN1");
1161		if (cpu_get_reg(space->machine->cpu[1], Z80_HALT))
	1161	if (cpu_get_reg(cputag_get_cpu(space->machine, "slave"), Z80_HALT))
1162	1162	result ^= 0x01;
1163	1163	break;
1164	1164
1165	1165	case 0x02:   /* /GIN2 */
1166	1166	case 0x12:
1167		cpu_set_input_line(space->machine->cpu[0], INPUT_LINE_NMI, CLEAR_LINE);
	1167	cputag_set_input_line(space->machine, "master", INPUT_LINE_NMI, CLEAR_LINE);
1168	1168	break;
1169	1169
1170	1170	case 0x03:   /* /IGID */
r4679	r4680
1195	1195	switch (offset)
1196	1196	{
1197	1197	case 0x09:   /* /MCONT */
1198		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_RESET, (data & 0x01) ? CLEAR_LINE : ASSERT_LINE);
	1198	cputag_set_input_line(space->machine, "slave", INPUT_LINE_RESET, (data & 0x01) ? CLEAR_LINE : ASSERT_LINE);
1199	1199	wcol_enable = (data & 0x02);
1200		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_NMI, (data & 0x04) ? CLEAR_LINE : ASSERT_LINE);
1201		cpu_set_input_line(space->machine->cpu[1], 0, (data & 0x08) ? CLEAR_LINE : ASSERT_LINE);
	1200	cputag_set_input_line(space->machine, "slave", INPUT_LINE_NMI, (data & 0x04) ? CLEAR_LINE : ASSERT_LINE);
	1201	cputag_set_input_line(space->machine, "slave", 0, (data & 0x08) ? CLEAR_LINE : ASSERT_LINE);
1202	1202
1203	1203	if (LOG_EEPROM) logerror("%04X:EE write %d%d%d\n", cpu_get_pc(space->cpu),
1204	1204	(data >> 6) & 1, (data >> 5) & 1, (data >> 4) & 1);
r4679	r4680
1238	1238
1239	1239	case 0x07:   /* /SLVBLK */
1240	1240	result = input_port_read(space->machine, "IN1");
1241		if (cpu_get_reg(space->machine->cpu[1], Z80_HALT))
	1241	if (cpu_get_reg(cputag_get_cpu(space->machine, "slave"), Z80_HALT))
1242	1242	result ^= 0x01;
1243	1243	break;
1244	1244
r4679	r4680
1270	1270	break;
1271	1271
1272	1272	case 0x05:   /* /SLV0 */
1273		cpu_set_input_line(space->machine->cpu[1], 0, (data & 0x01) ? CLEAR_LINE : ASSERT_LINE);
1274		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_NMI, (data & 0x04) ? CLEAR_LINE : ASSERT_LINE);
1275		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_RESET, (data & 0x10) ? CLEAR_LINE : ASSERT_LINE);
	1273	cputag_set_input_line(space->machine, "slave", 0, (data & 0x01) ? CLEAR_LINE : ASSERT_LINE);
	1274	cputag_set_input_line(space->machine, "slave", INPUT_LINE_NMI, (data & 0x04) ? CLEAR_LINE : ASSERT_LINE);
	1275	cputag_set_input_line(space->machine, "slave", INPUT_LINE_RESET, (data & 0x10) ? CLEAR_LINE : ASSERT_LINE);
1276	1276	break;
1277	1277
1278	1278	case 0x08:   /*  */

src/mame/machine/neoboot.c

r4679	r4680
24	24	int i;
25	25	int cx_size = memory_region_length( machine, "sprites" );
26	26	UINT8 *rom = memory_region( machine, "sprites" );
27		UINT8 *buf = malloc_or_die( cx_size );
	27	UINT8 *buf = alloc_array_or_die(UINT8, cx_size );
28	28
29	29	memcpy( buf, rom, cx_size );
30	30
r4679	r4680
44	44
45	45	if (value == 1)
46	46	{
47		UINT8 *buf = malloc_or_die( sx_size );
	47	UINT8 *buf = alloc_array_or_die(UINT8, sx_size );
48	48	memcpy( buf, rom, sx_size );
49	49
50	50	for( i = 0; i < sx_size; i += 0x10 )
r4679	r4680
72	72	{
73	73	/* the protection chip does some *very* strange things to the rom */
74	74	UINT8 *src = memory_region(machine, "maincpu");
75		UINT8 *dst = malloc_or_die( 0x600000 );
	75	UINT8 *dst = alloc_array_or_die(UINT8, 0x600000 );
76	76	UINT16 *rom = (UINT16 *)memory_region(machine, "maincpu");
77	77	int i;
78	78	static const int sec[] = { 0x3, 0x8, 0x7, 0xC, 0x1, 0xA, 0x6, 0xD };
r4679	r4680
178	178
179	179	void install_kof10th_protection ( running_machine *machine )
180	180	{
181		memory_install_read16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x2fe000, 0x2fffff, 0, 0, kof10th_RAMB_r);
182		memory_install_write16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x200000, 0x23ffff, 0, 0, kof10th_custom_w);
183		memory_install_write16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x240000, 0x2fffff, 0, 0, kof10th_bankswitch_w);
	181	memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x2fe000, 0x2fffff, 0, 0, kof10th_RAMB_r);
	182	memory_install_write16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x200000, 0x23ffff, 0, 0, kof10th_custom_w);
	183	memory_install_write16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x240000, 0x2fffff, 0, 0, kof10th_bankswitch_w);
184	184	}
185	185
186	186	void decrypt_kof10th(running_machine *machine)
187	187	{
188	188	int i, j;
189		UINT8 *dst = malloc_or_die(0x900000);
	189	UINT8 *dst = alloc_array_or_die(UINT8, 0x900000);
190	190	UINT8 *src = memory_region( machine, "maincpu" );
191	191
192	192	memcpy(dst + 0x000000, src + 0x700000, 0x100000); // Correct (Verified in Uni-bios)
r4679	r4680
219	219	UINT8  *src = memory_region(machine, "maincpu");
220	220	UINT16 *buf = (UINT16*)memory_region(machine, "audiocrypt");
221	221	UINT8 *srom = (UINT8*)memory_region(machine, "fixed");
222		UINT8 *sbuf = malloc_or_die(0x20000);
	222	UINT8 *sbuf = alloc_array_or_die(UINT8, 0x20000);
223	223
224		UINT8 *dst = malloc_or_die(0x200000);
	224	UINT8 *dst = alloc_array_or_die(UINT8, 0x200000);
225	225
226	226	memcpy(dst,buf,0x200000);
227	227	memcpy(src+0x000000,dst+0x060000,0x20000);
r4679	r4680
257	257	{
258	258	int i, j, ofst;
259	259	UINT8 *src = memory_region( machine, "maincpu" );
260		UINT8 *dst = malloc_or_die(0x80);
	260	UINT8 *dst = alloc_array_or_die(UINT8, 0x80);
261	261
262	262	for (i = 0; i < 0x800000; i+=0x80)
263	263	{
r4679	r4680
318	318	{ 8, 0, 7, 3, 4, 5, 6, 2, 1 },
319	319	};
320	320
321		UINT8 *dst = malloc_or_die( 0x10000 );
	321	UINT8 *dst = alloc_array_or_die(UINT8, 0x10000 );
322	322
323	323	for ( i = 0; i < size; i+=0x10000 )
324	324	{
r4679	r4680
344	344	int i,j;
345	345
346	346	UINT8 *src = memory_region(machine, "maincpu");
347		UINT8 *dst = malloc_or_die(0x80);
	347	UINT8 *dst = alloc_array_or_die(UINT8, 0x80);
348	348
349	349	memmove(src, src + 0x300000, 0x500000);
350	350
r4679	r4680
367	367	void kf2k2mp2_px_decrypt( running_machine *machine )
368	368	{
369	369	UINT8 *src = memory_region(machine, "maincpu");
370		UINT8 *dst = malloc_or_die(0x600000);
	370	UINT8 *dst = alloc_array_or_die(UINT8, 0x600000);
371	371
372	372	memcpy (dst + 0x000000, src + 0x1C0000, 0x040000);
373	373	memcpy (dst + 0x040000, src + 0x140000, 0x080000);
r4679	r4680
387	387	int i,j;
388	388	int tilesize=128;
389	389
390		UINT8* rom = malloc_or_die(16*tilesize);   // 16 tiles buffer
	390	UINT8* rom = alloc_array_or_die(UINT8, 16*tilesize);   // 16 tiles buffer
391	391	UINT8* realrom = memory_region(machine, "sprites") + start*tilesize;
392	392
393	393	for (i = 0; i < (end-start)/16; i++) {
r4679	r4680
442	442	void decrypt_cthd2003( running_machine *machine )
443	443	{
444	444	UINT8 *romdata = memory_region(machine, "fixed");
445		UINT8 *tmp = malloc_or_die(8*128*128);
	445	UINT8 *tmp = alloc_array_or_die(UINT8, 8*128*128);
446	446
447	447	memcpy(tmp+8*0*128, romdata+8*0*128, 8*32*128);
448	448	memcpy(tmp+8*32*128, romdata+8*64*128, 8*32*128);
r4679	r4680
485	485	UINT16 *mem16 = (UINT16 *)memory_region(machine, "maincpu");
486	486
487	487	/* special ROM banking handler */
488		memory_install_write16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x2ffff0, 0x2fffff, 0, 0, cthd2003_bankswitch_w);
	488	memory_install_write16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x2ffff0, 0x2fffff, 0, 0, cthd2003_bankswitch_w);
489	489
490	490	// theres still a problem on the character select screen but it seems to be related to cpu core timing issues,
491	491	// overclocking the 68k prevents it.
r4679	r4680
527	527	{
528	528	int rom_size = memory_region_length( machine, "fixed" );
529	529	UINT8 *rom = memory_region( machine, "fixed" );
530		UINT8 *buf = malloc_or_die( rom_size );
	530	UINT8 *buf = alloc_array_or_die(UINT8, rom_size );
531	531	int i;
532	532	int ofst;
533	533
r4679	r4680
556	556	void decrypt_ct2k3sp( running_machine *machine )
557	557	{
558	558	UINT8 *romdata = memory_region(machine, "audiocpu")+0x10000;
559		UINT8*tmp = malloc_or_die(8*128*128);
	559	UINT8*tmp = alloc_array_or_die(UINT8, 8*128*128);
560	560	memcpy(tmp+8*0*128, romdata+8*0*128, 8*32*128);
561	561	memcpy(tmp+8*32*128, romdata+8*64*128, 8*32*128);
562	562	memcpy(tmp+8*64*128, romdata+8*32*128, 8*32*128);
r4679	r4680
576	576	void decrypt_ct2k3sa( running_machine *machine )
577	577	{
578	578	UINT8 *romdata = memory_region(machine, "audiocpu")+0x10000;
579		UINT8*tmp = malloc_or_die(8*128*128);
	579	UINT8*tmp = alloc_array_or_die(UINT8, 8*128*128);
580	580	memcpy(tmp+8*0*128, romdata+8*0*128, 8*32*128);
581	581	memcpy(tmp+8*32*128, romdata+8*64*128, 8*32*128);
582	582	memcpy(tmp+8*64*128, romdata+8*32*128, 8*32*128);
r4679	r4680
634	634	void decrypt_kof2k4se_68k( running_machine *machine )
635	635	{
636	636	UINT8 *src = memory_region(machine, "maincpu")+0x100000;
637		UINT8 *dst = malloc_or_die(0x400000);
	637	UINT8 *dst = alloc_array_or_die(UINT8, 0x400000);
638	638	int i;
639	639	static const int sec[] = {0x300000,0x200000,0x100000,0x000000};
640	640	memcpy(dst,src,0x400000);
r4679	r4680
664	664	int i;
665	665	UINT8 *src = memory_region( machine, "maincpu" );
666	666	UINT16 *rom = (UINT16*)memory_region( machine, "maincpu" );
667		UINT8 *dst = malloc_or_die(0x600000);
	667	UINT8 *dst = alloc_array_or_die(UINT8, 0x600000);
668	668
669	669	{
670	670	static const int sec[] = { 0x3, 0x8, 0x7, 0xC, 0x1, 0xA, 0x6, 0xD };
r4679	r4680
729	729	void install_ms5plus_protection(running_machine *machine)
730	730	{
731	731	// special ROM banking handler / additional protection
732		memory_install_readwrite16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM),0x2ffff0, 0x2fffff,0, 0, mslug5_prot_r, ms5plus_bankswitch_w);
	732	memory_install_readwrite16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM),0x2ffff0, 0x2fffff,0, 0, mslug5_prot_r, ms5plus_bankswitch_w);
733	733	}
734	734
735	735
r4679	r4680
744	744	int i;
745	745	int size = memory_region_length( machine, "maincpu" );
746	746	UINT8 *src = memory_region( machine, "maincpu" );
747		UINT8 *dst = malloc_or_die( size );
	747	UINT8 *dst = alloc_array_or_die(UINT8, size );
748	748	int ofst;
749	749	for( i = 0; i < size / 0x100000; i++ ){
750	750	memcpy( &dst[ i * 0x100000 ], &src[ sec[ i ] * 0x100000 ], 0x100000 );
r4679	r4680
773	773	int i;
774	774	int size = memory_region_length( machine, "sprites" );
775	775	UINT8 *src = memory_region( machine, "sprites" );
776		UINT8 *dst = malloc_or_die( size );
	776	UINT8 *dst = alloc_array_or_die(UINT8, size );
777	777	int ofst;
778	778	memcpy( dst, src, size );
779	779	for( i = 0; i < size / 0x80; i++ ){
r4679	r4680
800	800	};
801	801	int size = memory_region_length( machine, "maincpu" );
802	802	UINT8 *src = memory_region( machine, "maincpu" );
803		UINT8 *dst = malloc_or_die( size );
	803	UINT8 *dst = alloc_array_or_die(UINT8, size );
804	804	int i;
805	805	int ofst;
806	806	memcpy( dst, src, size );
r4679	r4680
845	845	};
846	846	int size = memory_region_length( machine, "maincpu" );
847	847	UINT8 *src = memory_region( machine, "maincpu" );
848		UINT8 *dst = malloc_or_die( size );
	848	UINT8 *dst = alloc_array_or_die(UINT8, size );
849	849	memcpy( dst, src, size );
850	850	for( i = 0; i < 6; i++ ){
851	851	memcpy( &src[ i * 0x100000 ], &dst[ sec[ i ] * 0x100000 ], 0x100000 );
r4679	r4680
864	864	};
865	865	int size = memory_region_length( machine, "maincpu" );
866	866	UINT8 *src = memory_region( machine, "maincpu" );
867		UINT8 *dst = malloc_or_die( size );
	867	UINT8 *dst = alloc_array_or_die(UINT8, size );
868	868	int i;
869	869	int ofst;
870	870	memcpy( dst, src, size );
r4679	r4680
961	961
962	962	int rom_size = 0x800000;
963	963	UINT8 *rom = memory_region( machine, "maincpu" );
964		UINT8 *buf = malloc_or_die( rom_size );
	964	UINT8 *buf = alloc_array_or_die(UINT8, rom_size );
965	965	memcpy( buf, rom, rom_size );
966	966
967	967	for( i = 0; i < rom_size / 0x100000; i++ ){
r4679	r4680
972	972
973	973	void kf2k3bl_install_protection(running_machine *machine)
974	974	{
975		memory_install_readwrite16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x2fe000, 0x2fffff, 0, 0, kof2003_r, kof2003_w );
	975	memory_install_readwrite16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x2fe000, 0x2fffff, 0, 0, kof2003_r, kof2003_w );
976	976	}
977	977
978	978
r4679	r4680
981	981
982	982	void kf2k3pl_px_decrypt( running_machine *machine )
983	983	{
984		UINT16*tmp = malloc_or_die(0x100000);
	984	UINT16*tmp = alloc_array_or_die(UINT16, 0x100000/2);
985	985	UINT16*rom = (UINT16*)memory_region( machine, "maincpu" );
986	986	int j;
987	987	int i;
r4679	r4680
1000	1000
1001	1001	void kf2k3pl_install_protection(running_machine *machine)
1002	1002	{
1003		memory_install_readwrite16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x2fe000, 0x2fffff, 0, 0, kof2003_r, kof2003p_w );
	1003	memory_install_readwrite16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x2fe000, 0x2fffff, 0, 0, kof2003_r, kof2003p_w );
1004	1004	}
1005	1005
1006	1006
r4679	r4680
1031	1031
1032	1032	void kf2k3upl_install_protection(running_machine *machine)
1033	1033	{
1034		memory_install_readwrite16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x2fe000, 0x2fffff, 0, 0, kof2003_r, kof2003_w );
	1034	memory_install_readwrite16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x2fe000, 0x2fffff, 0, 0, kof2003_r, kof2003_w );
1035	1035	}
1036	1036
1037	1037
r4679	r4680
1042	1042	{
1043	1043	int px_size = memory_region_length( machine, "maincpu" );
1044	1044	UINT8 *rom = memory_region( machine, "maincpu" );
1045		UINT8 *buf = malloc_or_die( px_size );
	1045	UINT8 *buf = alloc_array_or_die(UINT8, px_size );
1046	1046	int ofst;
1047	1047	int i;
1048	1048
r4679	r4680
1085	1085	{
1086	1086	/* decrypt Z80 */
1087	1087	UINT8 *rom = memory_region( machine, "audiocpu" )+0x10000;
1088		UINT8 *buf = malloc_or_die( 0x20000 );
	1088	UINT8 *buf = alloc_array_or_die(UINT8, 0x20000 );
1089	1089	int i, j=0;
1090	1090	memcpy( buf, rom, 0x20000 );
1091	1091	for( i=0x00000; i<0x20000; i++ )

src/mame/machine/kabuki.c

r4679	r4680
163	163	{
164	164	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
165	165	UINT8 *rom = memory_region(machine, "maincpu");
166		UINT8 *decrypt = auto_malloc(memory_region_length(machine, "maincpu"));
	166	UINT8 *decrypt = auto_alloc_array(machine, UINT8, memory_region_length(machine, "maincpu"));
167	167	int numbanks = (memory_region_length(machine, "maincpu") - 0x10000) / 0x4000;
168	168	int i;
169	169
r4679	r4680
203	203	static void cps1_decode(running_machine *machine,int swap_key1,int swap_key2,int addr_key,int xor_key)
204	204	{
205	205	const address_space *space = cputag_get_address_space(machine, "audiocpu", ADDRESS_SPACE_PROGRAM);
206		UINT8 *decrypt = auto_malloc(0x8000);
	206	UINT8 *decrypt = auto_alloc_array(machine, UINT8, 0x8000);
207	207	UINT8 *rom = memory_region(machine, "audiocpu");
208	208
209	209	memory_set_decrypted_region(space, 0x0000, 0x7fff, decrypt);

src/mame/machine/konamigx.c

r4679	r4680
106	106	cmask = colormask[tilebpp];
107	107
108	108	src_pitch = src_bitmap->rowpixels;
109		src_base = src_bitmap->base;
	109	src_base = (UINT16 *)src_bitmap->base;
110	110
111	111	dst_ptr = dst_base;
112	112	cy = starty;
r4679	r4680
374	374	pal_base  = machine->pens + gfx->color_base + (color % gfx->total_colors) * granularity;
375	375	shd_base  = machine->shadow_table;
376	376
377		dst_ptr   = bitmap->base;
	377	dst_ptr   = (UINT32 *)bitmap->base;
378	378	dst_pitch = bitmap->rowpixels;
379	379	dst_minx  = cliprect->min_x;
380	380	dst_maxx  = cliprect->max_x;
r4679	r4680
1047	1047	gx_primode = 0;
1048	1048
1049	1049	gx_objzbuf = (UINT8 *)priority_bitmap->base;
1050		gx_shdzbuf = auto_malloc(GX_ZBUFSIZE);
1051		gx_objpool = auto_malloc(sizeof(struct GX_OBJ) * (GX_MAX_OBJECTS));
	1050	gx_shdzbuf = auto_alloc_array(machine, UINT8, GX_ZBUFSIZE);
	1051	gx_objpool = auto_alloc_array(machine, struct GX_OBJ, GX_MAX_OBJECTS);
1052	1052
1053	1053	K053247_export_config(&K053247_ram, &K053247_gfx, &K053247_callback, &K053247_dx, &K053247_dy);
1054	1054	K054338_export_config(&K054338_shdRGB);
1055	1055
1056	1056	if (objdma)
1057	1057	{
1058		gx_spriteram = auto_malloc(0x1000);
	1058	gx_spriteram = auto_alloc_array(machine, UINT16, 0x1000/2);
1059	1059	gx_objdma = 1;
1060	1060	}
1061	1061	else
r4679	r4680
2108	2108	void fantjour_dma_install(running_machine *machine)
2109	2109	{
2110	2110	state_save_register_global_array(machine, fantjour_dma);
2111		memory_install_write32_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xdb0000, 0xdb001f, 0, 0, fantjour_dma_w);
	2111	memory_install_write32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xdb0000, 0xdb001f, 0, 0, fantjour_dma_w);
2112	2112	memset(fantjour_dma, 0, sizeof(fantjour_dma));
2113	2113	}
2114	2114

src/mame/machine/toaplan1.c

r4679	r4680
66	66	const address_space *mainspace;
67	67	UINT16 input_data = 0;
68	68	switch (main_ram_seg) {
69		case 0xc00000:   mainspace = cpu_get_address_space(space->machine->cpu[0], ADDRESS_SPACE_PROGRAM);
	69	case 0xc00000:   mainspace = cputag_get_address_space(space->machine, "maincpu", ADDRESS_SPACE_PROGRAM);
70	70	input_data = memory_read_word(mainspace, main_ram_seg + dsp_addr_w);
71	71	break;
72	72	default:      logerror("DSP PC:%04x Warning !!! IO reading from %08x (port 1)\n",cpu_get_previouspc(space->cpu),main_ram_seg + dsp_addr_w);
r4679	r4680
83	83	dsp_execute = 0;
84	84	switch (main_ram_seg) {
85	85	case 0xc00000:   if ((dsp_addr_w < 3) && (data == 0)) dsp_execute = 1;
86		mainspace = cpu_get_address_space(space->machine->cpu[0], ADDRESS_SPACE_PROGRAM);
	86	mainspace = cputag_get_address_space(space->machine, "maincpu", ADDRESS_SPACE_PROGRAM);
87	87	memory_write_word(mainspace, main_ram_seg + dsp_addr_w, data);
88	88	break;
89	89	default:      logerror("DSP PC:%04x Warning !!! IO writing to %08x (port 1)\n",cpu_get_previouspc(space->cpu),main_ram_seg + dsp_addr_w);
r4679	r4680
105	105	if (data == 0) {
106	106	if (dsp_execute) {
107	107	logerror("Turning 68000 on\n");
108		cpu_set_input_line(space->machine->cpu[0], INPUT_LINE_HALT, CLEAR_LINE);
	108	cputag_set_input_line(space->machine, "maincpu", INPUT_LINE_HALT, CLEAR_LINE);
109	109	dsp_execute = 0;
110	110	}
111	111	demonwld_dsp_BIO = ASSERT_LINE;
r4679	r4680
124	124	if (enable)
125	125	{
126	126	logerror("Turning DSP on and 68000 off\n");
127		cpu_set_input_line(machine->cpu[2], INPUT_LINE_HALT, CLEAR_LINE);
128		cpu_set_input_line(machine->cpu[2], 0, ASSERT_LINE); /* TMS32010 INT */
129		cpu_set_input_line(machine->cpu[0], INPUT_LINE_HALT, ASSERT_LINE);
	127	cputag_set_input_line(machine, "dsp", INPUT_LINE_HALT, CLEAR_LINE);
	128	cputag_set_input_line(machine, "dsp", 0, ASSERT_LINE); /* TMS32010 INT */
	129	cputag_set_input_line(machine, "audiocpu", INPUT_LINE_HALT, ASSERT_LINE);
130	130	}
131	131	else
132	132	{
133	133	logerror("Turning DSP off\n");
134		cpu_set_input_line(machine->cpu[2], 0, CLEAR_LINE); /* TMS32010 INT */
135		cpu_set_input_line(machine->cpu[2], INPUT_LINE_HALT, ASSERT_LINE);
	134	cputag_set_input_line(machine, "dsp", 0, CLEAR_LINE); /* TMS32010 INT */
	135	cputag_set_input_line(machine, "dsp", INPUT_LINE_HALT, ASSERT_LINE);
136	136	}
137	137	}
138	138	static STATE_POSTLOAD( demonwld_restore_dsp )
r4679	r4680
231	231
232	232	if (ACCESSING_BITS_0_7 && (data == 0))
233	233	{
234		logerror("PC:%04x  Resetting Sound CPU and Sound chip (%08x)\n",cpu_get_previouspc(space->cpu),data);
	234	logerror("PC:%04x  Resetting Sound CPU and Sound chip (%08x)\n", cpu_get_previouspc(space->cpu), data);
235	235	devtag_reset(space->machine, "ym");
236		if (space->machine->cpu[1] != NULL && cpu_get_type(space->machine->cpu[1]) == CPU_Z80)
237		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_RESET, PULSE_LINE);
	236	if (cputag_get_cpu(space->machine, "audiocpu") != NULL && cpu_get_type(cputag_get_cpu(space->machine, "audiocpu")) == CPU_Z80)
	237	cputag_set_input_line(space->machine, "audiocpu", INPUT_LINE_RESET, PULSE_LINE);
238	238	}
239	239	}
240	240

src/mame/machine/stvcd.c

r4679	r4680
1507	1507	free((void *)curdir);
1508	1508	}
1509	1509
1510		curdir = (direntryT *)malloc_or_die(sizeof(direntryT)*numentries);
	1510	curdir = alloc_array_or_die(direntryT, numentries);
1511	1511	curentry = curdir;
1512	1512	numfiles = numentries;
1513	1513

src/mame/machine/ticket.c

r4679	r4680
161	161	***************************************************************************/
162	162	static TIMER_CALLBACK( ticket_dispenser_toggle )
163	163	{
164		struct ticket_state *dispenser = ptr;
	164	struct ticket_state *dispenser = (struct ticket_state *)ptr;
165	165
166	166	/* If we still have power, keep toggling ticket states. */
167	167	if (dispenser->power)

src/mame/machine/dc.c

r4679	r4680
242	242	}
243	243
244	244	level=dc_compute_interrupt_level(machine);
245		device_set_info_int(machine->cpu[0], CPUINFO_INT_SH4_IRLn_INPUT, 15-level);
	245	sh4_set_irln_input(cputag_get_cpu(machine, "maincpu"), 15-level);
246	246	}
247	247
	248	/******************************************************
	249	JVS init packets
	250	The function packets goes like this:
	251	[0] Function number
	252	[1] Number of "devices"
	253	[2] Parameter of the device
	254	[3] End flag (always zero)
	255	******************************************************/
	256	static int jvs_mux_data;
	257
248	258	static int jvsboard_init(int pos)
249	259	{
250	260	// four bytes for every available function
251		// first function
	261	//1 digital inputs
252	262	maple0x86data2[pos+10]=1;
253		maple0x86data2[pos+11]=2; // number of players
254		maple0x86data2[pos+12]=9+4; // switches per player (27 = mahjong)
	263	if(jvsboard_type == JVSBD_MAHJONG)
	264	{
	265	maple0x86data2[pos+11]=1; // number of players
	266	maple0x86data2[pos+12]=22; // switches per player (27 = mahjong)
	267	jvs_mux_data = 1;
	268	}
	269	else //if JVSBD_DEFAULT
	270	{
	271	maple0x86data2[pos+11]=2; // number of players
	272	maple0x86data2[pos+12]=9+4; // switches per player (27 = mahjong)
	273	}
255	274	maple0x86data2[pos+13]=0;
256		// second function
	275	//2 coin slots
257	276	maple0x86data2[pos+14]=2;
258	277	maple0x86data2[pos+15]=2; // number of coin slots
259	278	maple0x86data2[pos+16]=0;
260	279	maple0x86data2[pos+17]=0;
261		// third function
	280	//3 ad stick
262	281	maple0x86data2[pos+18]=3;
263	282	maple0x86data2[pos+19]=2; // analog channels
264	283	maple0x86data2[pos+20]=8; // bits per channel
265	284	maple0x86data2[pos+21]=0;
266		// no more functions
	285	//4 rotary
267	286	maple0x86data2[pos+22]=0;
	287	//5 keyboard
	288	//6 (touch?) screen
	289	//7 card reader
	290	//8 hopper out
	291	//9 driver out
	292	//10 analog out
	293	//11 character
	294	//12 backup
	295
268	296	maple0x86data2[pos+7]=13+2;
269	297	return 13;
270	298	}
271	299
272		static void jvsboard_indirect_read(running_machine *machine, int pos)
	300	static int jvsboard_indirect_read(running_machine *machine, int pos)
273	301	{
274	302	// report1,jvsbytes repeated for each function
275		// first function
	303	//1 digital inputs
276	304	maple0x86data2[pos+ 9]=1; // report
277	305	maple0x86data2[pos+10]=0; // bits TEST TILT1 TILT2 TILT3 ? ? ? ?
278		maple0x86data2[pos+11]=input_port_read(machine, "IN1"); // bits 1Pstart 1Pservice 1Pup 1Pdown 1Pleft 1Pright 1Ppush1 1Ppush2
279		maple0x86data2[pos+12]=input_port_read(machine, "IN2"); // bits 1Ppush3 1Ppush4 1Ppush5 1Ppush6 1Ppush7 1Ppush8 ...
280		maple0x86data2[pos+13]=input_port_read(machine, "IN3"); // bits 2Pstart 2Pservice 2Pup 2Pdown 2Pleft 2Pright 2Ppush1 2Ppush2
281		maple0x86data2[pos+14]=input_port_read(machine, "IN4"); // bits 2Ppush3 2Ppush4 2Ppush5 2Ppush6 2Ppush7 2Ppush8 ...
282		// second function
	306	if(jvsboard_type == JVSBD_MAHJONG)
	307	{
	308	maple0x86data2[pos+11]=0;
	309	switch(jvs_mux_data)
	310	{
	311	case 0x01: maple0x86data2[pos+12]=input_port_read(machine, "IN1"); break;
	312	case 0x02: maple0x86data2[pos+12]=input_port_read(machine, "IN2"); break;
	313	case 0x04: maple0x86data2[pos+12]=input_port_read(machine, "IN3"); break;
	314	case 0x08: maple0x86data2[pos+12]=input_port_read(machine, "IN4"); break;
	315	case 0x10: maple0x86data2[pos+12]=0; break;
	316	}
	317	maple0x86data2[pos+13]=0;
	318	maple0x86data2[pos+14]=0;
	319
	320	jvs_mux_data<<=1;
	321	if(jvs_mux_data >= 0x20) { jvs_mux_data = 1; }
	322	}
	323	else
	324	{
	325	maple0x86data2[pos+11]=input_port_read(machine, "IN1"); // bits 1Pstart 1Pservice 1Pup 1Pdown 1Pleft 1Pright 1Ppush1 1Ppush2
	326	maple0x86data2[pos+12]=input_port_read(machine, "IN2"); // bits 1Ppush3 1Ppush4 1Ppush5 1Ppush6 1Ppush7 1Ppush8 ...
	327	maple0x86data2[pos+13]=input_port_read(machine, "IN3"); // bits 2Pstart 2Pservice 2Pup 2Pdown 2Pleft 2Pright 2Ppush1 2Ppush2
	328	maple0x86data2[pos+14]=input_port_read(machine, "IN4"); // bits 2Ppush3 2Ppush4 2Ppush5 2Ppush6 2Ppush7 2Ppush8 ...
	329	}
	330	//2 coin slots
283	331	maple0x86data2[pos+15]=1; // report
284	332	maple0x86data2[pos+16]=(dc_coin_counts[0] >> 8) & 0xff; // 1CONDITION, 1SLOT COIN(bit13-8)
285	333	maple0x86data2[pos+17]=dc_coin_counts[0] & 0xff; // 1SLOT COIN(bit7-0)
286	334	maple0x86data2[pos+18]=(dc_coin_counts[1] >> 8) & 0xff; // 2CONDITION, 2SLOT COIN(bit13-8)
287	335	maple0x86data2[pos+19]=dc_coin_counts[1] & 0xff; // 2SLOT COIN(bit7-0)
288		// third function
	336	//3 ad stick
289	337	maple0x86data2[pos+20]=1; // report
290	338	maple0x86data2[pos+21]=0xff; // channel 1 bits 7-0
291	339	maple0x86data2[pos+22]=0; // channel 1
292	340	maple0x86data2[pos+23]=0; // channel 2 bits 7-0
293	341	maple0x86data2[pos+24]=0xff; // channel 2
	342	//4 rotary
	343	maple0x86data2[pos+25]=0;
	344	maple0x86data2[pos+26]=0;
	345	//5 keyboard
	346	//6 (touch?) screen
	347	//7 card reader
	348	//8 hopper out
	349	//9 driver out
	350	//10 analog out
	351	//11 character
	352	//12 backup
	353
	354	maple0x86data2[pos+7]=17+2;
	355	return 17;
294	356	}
295	357
296	358	static int jvsboard_direct_read(running_machine *machine)
r4679	r4680
305	367	maple0x86data2[0x19] = 0x01;
306	368
307	369	/* read the inputs */
	370	//1 digital inputs
308	371	maple0x86data2[0x1a]=1;
309		maple0x86data2[0x1b]=2; //number of players
310		maple0x86data2[0x1c]=input_port_read(machine, "IN1");
311		maple0x86data2[0x1d]=input_port_read(machine, "IN2");
312		maple0x86data2[0x1e]=input_port_read(machine, "IN3");
313		maple0x86data2[0x1f]=input_port_read(machine, "IN4");
	372	if(jvsboard_type == JVSBD_MAHJONG)
	373	maple0x86data2[0x1b]=1; //number of players
	374	else //if JVSBD_DEFAULT
	375	maple0x86data2[0x1b]=2; //number of players
	376	if(jvsboard_type == JVSBD_MAHJONG)
	377	{
	378	maple0x86data2[0x1c]=input_port_read(machine, "IN1");
	379	maple0x86data2[0x1d]=input_port_read(machine, "IN2");
	380	maple0x86data2[0x1e]=input_port_read(machine, "IN3");
	381	maple0x86data2[0x1f]=input_port_read(machine, "IN4");
	382	}
	383	else
	384	{
	385	maple0x86data2[0x1c]=input_port_read(machine, "IN1");
	386	maple0x86data2[0x1d]=input_port_read(machine, "IN2");
	387	maple0x86data2[0x1e]=input_port_read(machine, "IN3");
	388	maple0x86data2[0x1f]=input_port_read(machine, "IN4");
	389	}
	390	//2 coin slots
314	391	maple0x86data2[0x20]=1;
315	392	maple0x86data2[0x21]=(dc_coin_counts[0] >> 8) & 0xff; //coin counter read-back hi byte
316	393	maple0x86data2[0x22]=dc_coin_counts[0] & 0xff; //coin counter read-back lo byte
317	394	maple0x86data2[0x23]=(dc_coin_counts[1] >> 8) & 0xff;
318	395	maple0x86data2[0x24]=dc_coin_counts[1] & 0xff;
	396	//3 ad stick
319	397	maple0x86data2[0x25]=1;
320	398	maple0x86data2[0x26]=1;
321	399	maple0x86data2[0x27]=0;
322	400	maple0x86data2[0x28]=0;
323	401	maple0x86data2[0x29]=0;
	402	//4 rotary
	403	//5 keyboard
	404	//6 (touch?) screen
	405	//7 card reader
	406	//8 hopper out
	407	//9 driver out
	408	//10 analog out
	409	//11 character
	410	//12 backup
324	411	maple0x86data2[0x2a]=0;
325	412	/*0x2b-0x2f rotary inputs */
326	413	//...
r4679	r4680
369	456	ddtdata.direction=0;
370	457	ddtdata.channel=2;
371	458	ddtdata.mode=25; //011001
372		device_set_info_ptr(space->machine->cpu[0],CPUINFO_PTR_SH4_EXTERNAL_DDT_DMA,&ddtdata);
	459	sh4_dma_ddt(cputag_get_cpu(space->machine, "maincpu"),&ddtdata);
373	460	#if DEBUG_SYSCTRL
374	461	if ((address >= 0x11000000) && (address <= 0x11FFFFFF))
375	462	if (dc_sysctrl_regs[SB_LMMODE0])
r4679	r4680
478	565	ddtdata.direction=0;   // 0 source to buffer, 1 buffer to source
479	566	ddtdata.channel= -1;   // not used
480	567	ddtdata.mode= -1;      // copy from/to buffer
481		device_set_info_ptr(space->machine->cpu[0], CPUINFO_PTR_SH4_EXTERNAL_DDT_DMA, &ddtdata);
	568	sh4_dma_ddt(cputag_get_cpu(space->machine, "maincpu"), &ddtdata);
482	569
483	570	maple_regs[reg] = 0;
484	571	endflag=buff[0] & 0x80000000;
r4679	r4680
510	597	ddtdata.direction=0;
511	598	ddtdata.channel= -1;
512	599	ddtdata.mode=-1;
513		device_set_info_ptr(space->machine->cpu[0],CPUINFO_PTR_SH4_EXTERNAL_DDT_DMA,&ddtdata);
	600	sh4_dma_ddt(cputag_get_cpu(space->machine, "maincpu"),&ddtdata);
514	601	chk=0;
515	602	for (a=1;a < length;a++)
516	603	{
r4679	r4680
538	625	ddtdata.direction=0;
539	626	ddtdata.channel= -1;
540	627	ddtdata.mode=-1;
541		device_set_info_ptr(space->machine->cpu[0],CPUINFO_PTR_SH4_EXTERNAL_DDT_DMA,&ddtdata);
	628	sh4_dma_ddt(cputag_get_cpu(space->machine, "maincpu"),&ddtdata);
542	629
543	630	subcommand = buff[0] & 0xff;
544	631	#if DEBUG_MAPLE
r4679	r4680
613	700	case 0xf1: // set address
614	701	break;
615	702	case 0x10:
616		strcpy((char *)(maple0x86data2+0x11+10), "MAME test JVS I/O board"); // name
617		maple0x86data2[pos+7]=24+2;
618		tocopy += 24;
	703	strcpy((char *)(maple0x86data2+0x11+10), "SEGA ENTERPRISES,LTD.\nI/O BD JVS\n837-13551"); // name
	704	maple0x86data2[pos+7]=24+21+2;
	705	tocopy += 24+21;
619	706	break;
620	707	case 0x11:
621	708	maple0x86data2[pos+10]=0x13; // version bcd
r4679	r4680
634	721	break;
635	722	case 0x14:
636	723	{
637		static int dma_bytes;
638		dma_bytes = jvsboard_init(pos);
639		tocopy += dma_bytes;
	724	tocopy += jvsboard_init(pos);
640	725	}
641	726	break;
642	727	case 0x21:
r4679	r4680
739	824	ddtdata.destination=destination;
740	825	ddtdata.buffer=buff;
741	826	ddtdata.direction=1;
742		device_set_info_ptr(space->machine->cpu[0],CPUINFO_PTR_SH4_EXTERNAL_DDT_DMA,&ddtdata);
	827	sh4_dma_ddt(cputag_get_cpu(space->machine, "maincpu"),&ddtdata);
743	828
744	829	if (endflag)
745	830	{
r4679	r4680
770	855
771	856	INPUT_CHANGED( dc_coin_slots_callback )
772	857	{
773		UINT32 *counter = param;
	858	UINT32 *counter = (UINT32 *)param;
774	859
775	860	/* check for a 0 -> 1 transition */
776	861	if (!oldval && newval)
r4679	r4680
861	946	ddtdata.channel= -1;   // not used
862	947	ddtdata.mode= -1;      // copy from/to buffer
863	948	mame_printf_verbose("G1CTRL: transfer %x from ROM %08x to sdram %08x\n", g1bus_regs[SB_GDLEN], dmaoffset, g1bus_regs[SB_GDSTAR]);
864		device_set_info_ptr(space->machine->cpu[0], CPUINFO_PTR_SH4_EXTERNAL_DDT_DMA, &ddtdata);
	949	sh4_dma_ddt(cputag_get_cpu(space->machine, "maincpu"), &ddtdata);
865	950	g1bus_regs[SB_GDST]=0;
866	951	dc_sysctrl_regs[SB_ISTNRM] |= IST_DMA_GDROM;
867	952	dc_update_interrupt_status(space->machine);
r4679	r4680
1052	1137	MACHINE_RESET( dc )
1053	1138	{
1054	1139	/* halt the ARM7 */
1055		cpu_set_input_line(machine->cpu[1], INPUT_LINE_RESET, ASSERT_LINE);
	1140	cputag_set_input_line(machine, "soundcpu", INPUT_LINE_RESET, ASSERT_LINE);
1056	1141
1057	1142	memset(dc_sysctrl_regs, 0, sizeof(dc_sysctrl_regs));
1058	1143	memset(maple_regs, 0, sizeof(maple_regs));
r4679	r4680
1091	1176	if (dat & 1)
1092	1177	{
1093	1178	/* halt the ARM7 */
1094		cpu_set_input_line(device->machine->cpu[1], INPUT_LINE_RESET, ASSERT_LINE);
	1179	cputag_set_input_line(device->machine, "soundcpu", INPUT_LINE_RESET, ASSERT_LINE);
1095	1180	}
1096	1181	else
1097	1182	{
1098	1183	/* it's alive ! */
1099		cpu_set_input_line(device->machine->cpu[1], INPUT_LINE_RESET, CLEAR_LINE);
	1184	cputag_set_input_line(device->machine, "soundcpu", INPUT_LINE_RESET, CLEAR_LINE);
1100	1185	}
1101	1186	}
1102	1187

src/mame/machine/scramble.c

r4679	r4680
20	20	{
21	21	MACHINE_RESET_CALL(galaxold);
22	22
23		if (machine->cpu[1] != NULL)
	23	if (cputag_get_cpu(machine, "audiocpu") != NULL)
24	24	scramble_sh_init(machine);
25	25
26	26	security_2B_counter = 0;
r4679	r4680
71	71	0x2b, 0x2a, 0x28, 0x29, 0x09, 0x08, 0x0a, 0x0b,
72	72	0x0f, 0x0e, 0x0c, 0x0d, 0x2d, 0x2c, 0x2e, 0x2f,
73	73	0x27, 0x26, 0x24, 0x25, 0x05, 0x04, 0x06, 0x07 };
74		UINT8 val = input_port_read(field->port->machine, param);
	74	UINT8 val = input_port_read(field->port->machine, (const char *)param);
75	75
76	76	return remap[val >> 2];
77	77	}
r4679	r4680
86	86
87	87	static READ8_DEVICE_HANDLER( scramble_protection_r )
88	88	{
89		switch (cpu_get_pc(device->machine->cpu[0]))
	89	switch (cpu_get_pc(cputag_get_cpu(device->machine, "maincpu")))
90	90	{
91	91	case 0x00a8: return 0xf0;
92	92	case 0x00be: return 0xb0;
r4679	r4680
234	234
235	235	DRIVER_INIT( scobra )
236	236	{
237		memory_install_write8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xa803, 0xa803, 0, 0, scrambold_background_enable_w);
	237	memory_install_write8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xa803, 0xa803, 0, 0, scrambold_background_enable_w);
238	238	}
239	239
240	240	DRIVER_INIT( atlantis )
241	241	{
242		memory_install_write8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x6803, 0x6803, 0, 0, scrambold_background_enable_w);
	242	memory_install_write8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x6803, 0x6803, 0, 0, scrambold_background_enable_w);
243	243	}
244	244
245	245	DRIVER_INIT( scramble )
r4679	r4680
249	249
250	250	DRIVER_INIT( stratgyx )
251	251	{
252		memory_install_write8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xb000, 0xb000, 0, 0, scrambold_background_green_w);
253		memory_install_write8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xb002, 0xb002, 0, 0, scrambold_background_blue_w);
254		memory_install_write8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xb00a, 0xb00a, 0, 0, scrambold_background_red_w);
	252	memory_install_write8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xb000, 0xb000, 0, 0, scrambold_background_green_w);
	253	memory_install_write8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xb002, 0xb002, 0, 0, scrambold_background_blue_w);
	254	memory_install_write8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xb00a, 0xb00a, 0, 0, scrambold_background_red_w);
255	255	}
256	256
257	257	DRIVER_INIT( tazmani2 )
258	258	{
259		memory_install_write8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xb002, 0xb002, 0, 0, scrambold_background_enable_w);
	259	memory_install_write8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xb002, 0xb002, 0, 0, scrambold_background_enable_w);
260	260	}
261	261
262	262	DRIVER_INIT( ckongs )
r4679	r4680
266	266	DRIVER_INIT( mariner )
267	267	{
268	268	/* extra ROM */
269		memory_install_readwrite8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x5800, 0x67ff, 0, 0, SMH_BANK1, SMH_UNMAP);
	269	memory_install_readwrite8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x5800, 0x67ff, 0, 0, (read8_space_func)SMH_BANK(1), (write8_space_func)SMH_UNMAP);
270	270	memory_set_bankptr(machine, 1, memory_region(machine, "maincpu") + 0x5800);
271	271
272		memory_install_read8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x9008, 0x9008, 0, 0, mariner_protection_2_r);
273		memory_install_read8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xb401, 0xb401, 0, 0, mariner_protection_1_r);
	272	memory_install_read8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x9008, 0x9008, 0, 0, mariner_protection_2_r);
	273	memory_install_read8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xb401, 0xb401, 0, 0, mariner_protection_1_r);
274	274
275	275	/* ??? (it's NOT a background enable) */
276		/*memory_install_write8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x6803, 0x6803, 0, 0, SMH_NOP);*/
	276	/*memory_install_write8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x6803, 0x6803, 0, 0, (write8_space_func)SMH_NOP);*/
277	277	}
278	278
279	279	DRIVER_INIT( frogger )
r4679	r4680
323	323
324	324	for (j = 0; j < 16; j++)
325	325	{
326		offs_t new = BITSWAP8(j,7,6,5,4,2,0,3,1);
	326	offs_t newval = BITSWAP8(j,7,6,5,4,2,0,3,1);
327	327
328		swapbuffer[j] = RAM[i + new];
	328	swapbuffer[j] = RAM[i + newval];
329	329	}
330	330
331	331	memcpy(&RAM[i], swapbuffer, 16);
r4679	r4680
349	349	UINT8 *ROM = memory_region(machine, "maincpu");
350	350
351	351	/* banked ROM */
352		memory_install_read8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x0000, 0x3fff, 0, 0, SMH_BANK1);
	352	memory_install_read8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x0000, 0x3fff, 0, 0, (read8_space_func)SMH_BANK(1));
353	353	memory_configure_bank(machine, 1, 0, 2, &ROM[0x00000], 0x10000);
354	354	cavelon_banksw(machine);
355	355
356	356	/* A15 switches memory banks */
357		memory_install_readwrite8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x8000, 0xffff, 0, 0, cavelon_banksw_r, cavelon_banksw_w);
	357	memory_install_readwrite8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x8000, 0xffff, 0, 0, cavelon_banksw_r, cavelon_banksw_w);
358	358
359		memory_install_write8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x2000, 0x2000, 0, 0, SMH_NOP);   /* ??? */
360		memory_install_write8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x3800, 0x3801, 0, 0, SMH_NOP);  /* looks suspicously like
	359	memory_install_write8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x2000, 0x2000, 0, 0, (write8_space_func)SMH_NOP);   /* ??? */
	360	memory_install_write8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x3800, 0x3801, 0, 0, (write8_space_func)SMH_NOP);  /* looks suspicously like
361	361	an AY8910, but not sure */
362	362	state_save_register_global(machine, cavelon_bank);
363	363	}
r4679	r4680
366	366
367	367	DRIVER_INIT( darkplnt )
368	368	{
369		memory_install_write8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xb00a, 0xb00a, 0, 0, darkplnt_bullet_color_w);
	369	memory_install_write8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xb00a, 0xb00a, 0, 0, darkplnt_bullet_color_w);
370	370	}
371	371
372	372	DRIVER_INIT( mimonkey )
r4679	r4680
402	402	ctr++;
403	403	}
404	404
405		memory_install_write8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xa804, 0xa804, 0, 0, scrambold_background_enable_w);
	405	memory_install_write8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xa804, 0xa804, 0, 0, scrambold_background_enable_w);
406	406	}
407	407
408	408	DRIVER_INIT( mimonsco )
409	409	{
410		memory_install_write8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xa804, 0xa804, 0, 0, scrambold_background_enable_w);
	410	memory_install_write8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xa804, 0xa804, 0, 0, scrambold_background_enable_w);
411	411	}
412	412
413	413	DRIVER_INIT( mimonscr )
414	414	{
415		memory_install_write8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x6804, 0x6804, 0, 0, scrambold_background_enable_w);
	415	memory_install_write8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x6804, 0x6804, 0, 0, scrambold_background_enable_w);
416	416	}
417	417
418	418
r4679	r4680
439	439	RAM = memory_region(machine, "gfx1");
440	440	len = memory_region_length(machine, "gfx1");
441	441
442		scratch = malloc_or_die(len);
	442	scratch = alloc_array_or_die(UINT8, len);
443	443
444	444	memcpy(scratch, RAM, len);
445	445
r4679	r4680
476	476	RAM = memory_region(machine, "gfx1");
477	477	len = memory_region_length(machine, "gfx1");
478	478
479		scratch = malloc_or_die(len);
	479	scratch = alloc_array_or_die(UINT8, len);
480	480
481	481	memcpy(scratch, RAM, len);
482	482
r4679	r4680
512	512	RAM = memory_region(machine, "gfx1");
513	513	len = memory_region_length(machine, "gfx1");
514	514
515		scratch = malloc_or_die(len);
	515	scratch = alloc_array_or_die(UINT8, len);
516	516
517	517	memcpy(scratch, RAM, len);
518	518
r4679	r4680
550	550	RAM = memory_region(machine, "gfx1");
551	551	len = memory_region_length(machine, "gfx1");
552	552
553		scratch = malloc_or_die(len);
	553	scratch = alloc_array_or_die(UINT8, len);
554	554
555	555	memcpy(scratch, RAM, len);
556	556

src/mame/machine/midtunit.c

r4679	r4680
447	447	init_tunit_generic(machine, SOUND_ADPCM);
448	448
449	449	/* protection */
450		memory_install_readwrite16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x1b00000, 0x1b6ffff, 0, 0, mk_prot_r, mk_prot_w);
	450	memory_install_readwrite16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x1b00000, 0x1b6ffff, 0, 0, mk_prot_r, mk_prot_w);
451	451
452	452	/* sound chip protection (hidden RAM) */
453		memory_install_readwrite8_handler(cpu_get_address_space(machine->cpu[1], ADDRESS_SPACE_PROGRAM), 0xfb9c, 0xfbc6, 0, 0, SMH_BANK9, SMH_BANK9);
454		memory_set_bankptr(machine, 9, auto_malloc(0x80));
	453	memory_install_readwrite8_handler(cpu_get_address_space(machine->cpu[1], ADDRESS_SPACE_PROGRAM), 0xfb9c, 0xfbc6, 0, 0, (read8_space_func)SMH_BANK(9), (write8_space_func)SMH_BANK(9));
	454	memory_set_bankptr(machine, 9, auto_alloc_array(machine, UINT8, 0x80));
455	455	}
456	456
457	457	static void init_nbajam_common(running_machine *machine, int te_protection)
r4679	r4680
463	463	if (!te_protection)
464	464	{
465	465	nbajam_prot_table = nbajam_prot_values;
466		memory_install_readwrite16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x1b14020, 0x1b2503f, 0, 0, nbajam_prot_r, nbajam_prot_w);
	466	memory_install_readwrite16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x1b14020, 0x1b2503f, 0, 0, nbajam_prot_r, nbajam_prot_w);
467	467	}
468	468	else
469	469	{
470	470	nbajam_prot_table = nbajamte_prot_values;
471		memory_install_readwrite16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x1b15f40, 0x1b37f5f, 0, 0, nbajam_prot_r, nbajam_prot_w);
472		memory_install_readwrite16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x1b95f40, 0x1bb7f5f, 0, 0, nbajam_prot_r, nbajam_prot_w);
	471	memory_install_readwrite16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x1b15f40, 0x1b37f5f, 0, 0, nbajam_prot_r, nbajam_prot_w);
	472	memory_install_readwrite16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x1b95f40, 0x1bb7f5f, 0, 0, nbajam_prot_r, nbajam_prot_w);
473	473	}
474	474
475	475	/* sound chip protection (hidden RAM) */
476	476	if (!te_protection)
477		memory_install_readwrite8_handler(cpu_get_address_space(machine->cpu[1], ADDRESS_SPACE_PROGRAM), 0xfbaa, 0xfbd4, 0, 0, SMH_BANK9, SMH_BANK9);
	477	memory_install_readwrite8_handler(cpu_get_address_space(machine->cpu[1], ADDRESS_SPACE_PROGRAM), 0xfbaa, 0xfbd4, 0, 0, (read8_space_func)SMH_BANK(9), (write8_space_func)SMH_BANK(9));
478	478	else
479		memory_install_readwrite8_handler(cpu_get_address_space(machine->cpu[1], ADDRESS_SPACE_PROGRAM), 0xfbec, 0xfc16, 0, 0, SMH_BANK9, SMH_BANK9);
480		memory_set_bankptr(machine, 9, auto_malloc(0x80));
	479	memory_install_readwrite8_handler(cpu_get_address_space(machine->cpu[1], ADDRESS_SPACE_PROGRAM), 0xfbec, 0xfc16, 0, 0, (read8_space_func)SMH_BANK(9), (write8_space_func)SMH_BANK(9));
	480	memory_set_bankptr(machine, 9, auto_alloc_array(machine, UINT8, 0x80));
481	481	}
482	482
483	483	DRIVER_INIT( nbajam )
r4679	r4680
496	496	init_tunit_generic(machine, SOUND_ADPCM_LARGE);
497	497
498	498	/* looks like the watchdog needs to be disabled */
499		memory_install_write16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x01d81060, 0x01d8107f, 0, 0, SMH_NOP);
	499	memory_install_write16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x01d81060, 0x01d8107f, 0, 0, (write16_space_func)SMH_NOP);
500	500
501	501	/* protection */
502		memory_install_readwrite16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x1b00000, 0x1bfffff, 0, 0, jdredd_prot_r, jdredd_prot_w);
	502	memory_install_readwrite16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x1b00000, 0x1bfffff, 0, 0, jdredd_prot_r, jdredd_prot_w);
503	503
504	504	/* sound chip protection (hidden RAM) */
505		memory_install_readwrite8_handler(cpu_get_address_space(machine->cpu[1], ADDRESS_SPACE_PROGRAM), 0xfbcf, 0xfbf9, 0, 0, SMH_BANK7, SMH_BANK9);
506		memory_set_bankptr(machine, 9, auto_malloc(0x80));
	505	memory_install_readwrite8_handler(cpu_get_address_space(machine->cpu[1], ADDRESS_SPACE_PROGRAM), 0xfbcf, 0xfbf9, 0, 0, (read8_space_func)SMH_BANK(7), (write8_space_func)SMH_BANK(9));
	506	memory_set_bankptr(machine, 9, auto_alloc_array(machine, UINT8, 0x80));
507	507
508	508	#if ENABLE_ALL_JDREDD_LEVELS
509	509	/* how about the final levels? */
510		jdredd_hack = memory_install_read16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xFFBA7FF0, 0xFFBA7FFf, 0, 0, jdredd_hack_r);
	510	jdredd_hack = memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xFFBA7FF0, 0xFFBA7FFf, 0, 0, jdredd_hack_r);
511	511	#endif
512	512	}
513	513
r4679	r4680
528	528	midtunit_gfx_rom_large = 1;
529	529
530	530	/* protection */
531		memory_install_write16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x00f20c60, 0x00f20c7f, 0, 0, mk2_prot_w);
532		memory_install_write16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x00f42820, 0x00f4283f, 0, 0, mk2_prot_w);
533		memory_install_read16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x01a190e0, 0x01a190ff, 0, 0, mk2_prot_r);
534		memory_install_read16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x01a191c0, 0x01a191df, 0, 0, mk2_prot_shift_r);
535		memory_install_read16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x01a3d0c0, 0x01a3d0ff, 0, 0, mk2_prot_r);
536		memory_install_read16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x01d9d1e0, 0x01d9d1ff, 0, 0, mk2_prot_const_r);
537		memory_install_read16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x01def920, 0x01def93f, 0, 0, mk2_prot_const_r);
	531	memory_install_write16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x00f20c60, 0x00f20c7f, 0, 0, mk2_prot_w);
	532	memory_install_write16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x00f42820, 0x00f4283f, 0, 0, mk2_prot_w);
	533	memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x01a190e0, 0x01a190ff, 0, 0, mk2_prot_r);
	534	memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x01a191c0, 0x01a191df, 0, 0, mk2_prot_shift_r);
	535	memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x01a3d0c0, 0x01a3d0ff, 0, 0, mk2_prot_r);
	536	memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x01d9d1e0, 0x01d9d1ff, 0, 0, mk2_prot_const_r);
	537	memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x01def920, 0x01def93f, 0, 0, mk2_prot_const_r);
538	538	}
539	539
540	540

src/mame/machine/pitnrun.c

r4679	r4680
19	19	{
20	20	zaccept = 1;
21	21	zready = 0;
22		cpu_set_input_line(machine->cpu[2],0,CLEAR_LINE);
	22	cputag_set_input_line(machine, "mcu", 0, CLEAR_LINE);
23	23	}
24	24
25	25	static TIMER_CALLBACK( pitnrun_mcu_real_data_r )
r4679	r4680
36	36	static TIMER_CALLBACK( pitnrun_mcu_real_data_w )
37	37	{
38	38	zready = 1;
39		cpu_set_input_line(machine->cpu[2],0,ASSERT_LINE);
	39	cputag_set_input_line(machine, "mcu", 0, ASSERT_LINE);
40	40	fromz80 = param;
41	41	}
42	42
r4679	r4680
106	106
107	107	WRITE8_HANDLER( pitnrun_68705_portB_w )
108	108	{
109		const address_space *cpu0space = cpu_get_address_space(space->machine->cpu[0], ADDRESS_SPACE_PROGRAM);
	109	const address_space *cpu0space = cputag_get_address_space(space->machine, "maincpu", ADDRESS_SPACE_PROGRAM);
110	110	if (~data & 0x02)
111	111	{
112	112	/* 68705 is going to read data from the Z80 */
113	113	timer_call_after_resynch(space->machine, NULL, 0,pitnrun_mcu_data_real_r);
114		cpu_set_input_line(space->machine->cpu[2],0,CLEAR_LINE);
	114	cputag_set_input_line(space->machine, "mcu",0,CLEAR_LINE);
115	115	portA_in = fromz80;
116	116	}
117	117	if (~data & 0x04)
r4679	r4680
151	151	{
152	152	return (zready << 0) | (zaccept << 1);
153	153	}
154
155
156

src/mame/machine/konami1.c

r4679	r4680
47	47	int size = memory_region_length(machine, cpu);
48	48	int A;
49	49
50		UINT8 *decrypted = auto_malloc(size);
	50	UINT8 *decrypted = auto_alloc_array(machine, UINT8, size);
51	51	memory_set_decrypted_region(space, 0x0000, 0xffff, decrypted);
52	52
53	53	for (A = 0;A < size;A++)

src/mame/machine/carpolo.c

r4679	r4680
89	89
90	90	static void TTL74148_3S_cb(running_machine *machine)
91	91	{
92		cpu_set_input_line(machine->cpu[0], M6502_IRQ_LINE, TTL74148_output_valid_r(TTL74148_3S) ? CLEAR_LINE : ASSERT_LINE);
	92	cputag_set_input_line(machine, "maincpu", M6502_IRQ_LINE, TTL74148_output_valid_r(TTL74148_3S) ? CLEAR_LINE : ASSERT_LINE);
93	93	}
94	94
95	95

src/mame/machine/fddebug.c

r4679	r4680
286	286	static int does_key_work_for_constraints(const UINT16 *base, UINT8 *key);
287	287	static UINT32 reconstruct_base_seed(int keybaseaddr, UINT32 startseed);
288	288
289		static void build_optable(void);
	289	static void build_optable(running_machine *machine);
290	290	static int validate_ea(const address_space *space, UINT32 pc, UINT8 modereg, const UINT8 *parambase, UINT32 flags);
291	291	static int validate_opcode(const address_space *space, UINT32 pc, const UINT8 *opdata, int maxwords);
292	292
r4679	r4680
490	490	assert(coderegion_words == keystatus_words);
491	491
492	492	/* allocate memory for the ignore table */
493		ignorepc = auto_malloc(1 << 23);
494		memset(ignorepc, 0, 1 << 23);
	493	ignorepc = auto_alloc_array_clear(machine, UINT8, 1 << 23);
495	494
496	495	/* allocate memory for the undo buffer */
497		undobuff = auto_malloc(keystatus_words * 2);
	496	undobuff = auto_alloc_array(machine, UINT8, keystatus_words * 2);
498	497	memcpy(undobuff, keystatus, keystatus_words * 2);
499	498
500	499	/* allocate memory for the possible seeds array */
501		possible_seed = auto_malloc(65536 * sizeof(possible_seed[0]));
	500	possible_seed = auto_alloc_array(machine, UINT32, 65536);
502	501
503	502	/* build the opcode table */
504		build_optable();
	503	build_optable(machine);
505	504
506	505	/* set up default constraints */
507	506	constcount = 0;
r4679	r4680
2089	2088	build_optable - build up the opcode table
2090	2089	-----------------------------------------------*/
2091	2090
2092		static void build_optable(void)
	2091	static void build_optable(running_machine *machine)
2093	2092	{
2094	2093	int opnum, inum;
2095	2094
2096	2095	/* allocate and initialize the opcode table */
2097		optable = auto_malloc(65536 * sizeof(optable[0]));
	2096	optable = auto_alloc_array(machine, optable_entry, 65536);
2098	2097	for (opnum = 0; opnum < 65536; opnum++)
2099	2098	{
2100	2099	optable[opnum].flags = OF_INVALID;

src/mame/machine/namcos1.c

r4679	r4680
64	64	static WRITE8_HANDLER( bank15_w ) { (*namcos1_active_bank[14].bank_handler_w)(space, offset + namcos1_active_bank[14].bank_offset, data); }
65	65	static WRITE8_HANDLER( bank16_w ) { (*namcos1_active_bank[15].bank_handler_w)(space, offset + namcos1_active_bank[15].bank_offset, data); }
66	66
67		static const read8_space_func ram_bank_handler_r[16] =
68		{
69		SMH_BANK1 ,SMH_BANK2 ,SMH_BANK3 ,SMH_BANK4 ,
70		SMH_BANK5 ,SMH_BANK6 ,SMH_BANK7 ,SMH_BANK8 ,
71		SMH_BANK9 ,SMH_BANK10,SMH_BANK11,SMH_BANK12,
72		SMH_BANK13,SMH_BANK14,SMH_BANK15,SMH_BANK16
73		};
74
75		static const write8_space_func ram_bank_handler_w[16] =
76		{
77		SMH_BANK1 ,SMH_BANK2 ,SMH_BANK3 ,SMH_BANK4 ,
78		SMH_BANK5 ,SMH_BANK6 ,SMH_BANK7 ,SMH_BANK8 ,
79		SMH_BANK9 ,SMH_BANK10,SMH_BANK11,SMH_BANK12,
80		SMH_BANK13,SMH_BANK14,SMH_BANK15,SMH_BANK16
81		};
82
83	67	static const read8_space_func io_bank_handler_r[16] =
84	68	{
85	69	bank1_r, bank2_r, bank3_r, bank4_r,
r4679	r4680
110	94	static unsigned int key_quotient, key_reminder, key_numerator_high_word;
111	95	static UINT8 key[8];
112	96
	97	// used by faceoff and tankforce 4 player (input multiplex)
	98	static READ8_HANDLER( faceoff_inputs_r );
113	99
114	100	static READ8_HANDLER( no_key_r )
115	101	{
r4679	r4680
601	587	namcos1_reset = data & 1;
602	588	}
603	589
604		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_RESET, (data & 1) ? CLEAR_LINE : ASSERT_LINE);
605		cpu_set_input_line(space->machine->cpu[2], INPUT_LINE_RESET, (data & 1) ? CLEAR_LINE : ASSERT_LINE);
606		cpu_set_input_line(space->machine->cpu[3], INPUT_LINE_RESET, (data & 1) ? CLEAR_LINE : ASSERT_LINE);
	590	cputag_set_input_line(space->machine, "sub", INPUT_LINE_RESET, (data & 1) ? CLEAR_LINE : ASSERT_LINE);
	591	cputag_set_input_line(space->machine, "audiocpu", INPUT_LINE_RESET, (data & 1) ? CLEAR_LINE : ASSERT_LINE);
	592	cputag_set_input_line(space->machine, "mcu", INPUT_LINE_RESET, (data & 1) ? CLEAR_LINE : ASSERT_LINE);
607	593	}
608	594
609	595
r4679	r4680
681	667	/* Main bankswitching routine */
682	668	static void set_bank(running_machine *machine, int banknum, const bankhandler *handler)
683	669	{
684		const address_space *space = cpu_get_address_space(machine->cpu[(banknum >> 3) & 1], ADDRESS_SPACE_PROGRAM);
	670	static const char *const cputags[] = { "maincpu", "sub" };
	671	const address_space *space = cputag_get_address_space(machine, cputags[(banknum >> 3) & 1], ADDRESS_SPACE_PROGRAM);
685	672	int bankstart = (banknum & 7) * 0x2000;
686	673
687	674	/* for BANK handlers , memory direct and OP-code base */
r4679	r4680
692	679	if (!handler->bank_handler_r)
693	680	{
694	681	if (namcos1_active_bank[banknum].bank_handler_r)
695		memory_install_read8_handler(space, bankstart, bankstart + 0x1fff, 0, 0, ram_bank_handler_r[banknum]);
	682	memory_install_read8_handler(space, bankstart, bankstart + 0x1fff, 0, 0, (read8_space_func)SMH_BANK(banknum + 1));
696	683	}
697	684	else
698	685	{
r4679	r4680
706	693	if (!handler->bank_handler_w)
707	694	{
708	695	if (namcos1_active_bank[banknum].bank_handler_w)
709		memory_install_write8_handler(space, bankstart, bankstart + 0x1fff, 0, 0, ram_bank_handler_w[banknum]);
	696	memory_install_write8_handler(space, bankstart, bankstart + 0x1fff, 0, 0, (write8_space_func)SMH_BANK(banknum + 1));
710	697	}
711	698	else
712	699	{
r4679	r4680
748	735	{
749	736	//  logerror("cpu %s: namcos1_bankswitch_w offset %04x data %02x\n", space->cpu->tag, offset, data);
750	737
751		namcos1_bankswitch(space->machine, (space->cpu == space->machine->cpu[0]) ? 0 : 1, offset, data);
	738	namcos1_bankswitch(space->machine, (space->cpu == cputag_get_cpu(space->machine, "maincpu")) ? 0 : 1, offset, data);
752	739	}
753	740
754	741	/* Sub cpu set start bank port */
r4679	r4680
789	776	int i;
790	777
791	778	/**** kludge alert ****/
792		UINT8 *dummyrom = auto_malloc(0x2000);
	779	UINT8 *dummyrom = auto_alloc_array(machine, UINT8, 0x2000);
793	780
794	781	/* when the games want to reset because the test switch has been flipped (or
795	782	because the protection checks failed!) they just set the top bits of bank #7
r4679	r4680
873	860	namcos1_bankswitch(machine, 1, 0x0e01, 0xff);
874	861
875	862	/* reset Cpu 0 and stop all other CPUs */
876		device_reset(machine->cpu[0]);
877		cpu_set_input_line(machine->cpu[1], INPUT_LINE_RESET, ASSERT_LINE);
878		cpu_set_input_line(machine->cpu[2], INPUT_LINE_RESET, ASSERT_LINE);
879		cpu_set_input_line(machine->cpu[3], INPUT_LINE_RESET, ASSERT_LINE);
	863	device_reset(cputag_get_cpu(machine, "maincpu"));
	864	cputag_set_input_line(machine, "sub", INPUT_LINE_RESET, ASSERT_LINE);
	865	cputag_set_input_line(machine, "audiocpu", INPUT_LINE_RESET, ASSERT_LINE);
	866	cputag_set_input_line(machine, "mcu", INPUT_LINE_RESET, ASSERT_LINE);
880	867
881	868	/* mcu patch data clear */
882	869	mcu_patch_data = 0;
r4679	r4680
988	975	key_top4      = specific->key_reg6;
989	976
990	977	/* S1 RAM pointer set */
991		s1ram = auto_malloc(0x8000);
992		namcos1_triram = auto_malloc(0x800);
993		namcos1_paletteram = auto_malloc(0x8000);
	978	s1ram = auto_alloc_array(machine, UINT8, 0x8000);
	979	namcos1_triram = auto_alloc_array(machine, UINT8, 0x800);
	980	namcos1_paletteram = auto_alloc_array(machine, UINT8, 0x8000);
994	981
995	982	/* Register volatile user memory for save state */
996	983	state_save_register_global_pointer(machine, s1ram, 0x8000);
r4679	r4680
1208	1195	namcos1_driver_init(machine, &tankfrce_specific);
1209	1196	}
1210	1197
1211		// Inputs are multiplexed, somehow
1212		static READ8_HANDLER( tankfrc4_input_r )
1213		{
1214	1198
1215		switch (offset)
1216		{
1217		case 0:
1218		return mame_rand(space->machine);
1219	1199
1220		case 1:
1221		return mame_rand(space->machine);
1222
1223		}
1224		return 0x00;
1225
1226		}
1227
1228	1200	DRIVER_INIT( tankfrc4 )
1229	1201	{
1230	1202	static const struct namcos1_specific tankfrce_specific=
r4679	r4680
1233	1205	};
1234	1206	namcos1_driver_init(machine, &tankfrce_specific);
1235	1207
1236		memory_install_read8_handler(cpu_get_address_space(machine->cpu[3], ADDRESS_SPACE_PROGRAM), 0x1400, 0x1401, 0, 0, tankfrc4_input_r);
	1208	memory_install_read8_handler(cputag_get_address_space(machine, "mcu", ADDRESS_SPACE_PROGRAM), 0x1400, 0x1401, 0, 0, faceoff_inputs_r);
1237	1209	}
1238	1210
1239	1211	/*******************************************************************************
r4679	r4680
1324	1296	DRIVER_INIT( quester )
1325	1297	{
1326	1298	namcos1_driver_init(machine, NULL);
1327		memory_install_read8_handler(cpu_get_address_space(machine->cpu[3], ADDRESS_SPACE_PROGRAM), 0x1400, 0x1401, 0, 0, quester_paddle_r);
	1299	memory_install_read8_handler(cputag_get_address_space(machine, "mcu", ADDRESS_SPACE_PROGRAM), 0x1400, 0x1401, 0, 0, quester_paddle_r);
1328	1300	}
1329	1301
1330	1302
r4679	r4680
1413	1385	DRIVER_INIT( berabohm )
1414	1386	{
1415	1387	namcos1_driver_init(machine, NULL);
1416		memory_install_read8_handler(cpu_get_address_space(machine->cpu[3], ADDRESS_SPACE_PROGRAM), 0x1400, 0x1401, 0, 0, berabohm_buttons_r);
	1388	memory_install_read8_handler(cputag_get_address_space(machine, "mcu", ADDRESS_SPACE_PROGRAM), 0x1400, 0x1401, 0, 0, berabohm_buttons_r);
1417	1389	}
1418	1390
1419	1391
r4679	r4680
1483	1455	DRIVER_INIT( faceoff )
1484	1456	{
1485	1457	namcos1_driver_init(machine, NULL);
1486		memory_install_read8_handler(cpu_get_address_space(machine->cpu[3], ADDRESS_SPACE_PROGRAM), 0x1400, 0x1401, 0, 0, faceoff_inputs_r);
	1458	memory_install_read8_handler(cputag_get_address_space(machine, "mcu", ADDRESS_SPACE_PROGRAM), 0x1400, 0x1401, 0, 0, faceoff_inputs_r);
1487	1459	}

src/mame/machine/segaic16.c

r4679	r4680
216	216	if ((oldval ^ chip->regs[offset]) & 3)
217	217	{
218	218	if ((chip->regs[offset] & 3) == 3)
219		fd1094_machine_init(space->machine->cpu[0]);
	219	fd1094_machine_init(chip->cpu);
220	220
221	221	/* fd1094_machine_init calls device_reset on the CPU, so we must do this afterwards */
222	222	cpu_set_input_line(chip->cpu, INPUT_LINE_RESET, (chip->regs[offset] & 3) == 3 ? ASSERT_LINE : CLEAR_LINE);
r4679	r4680
383	383
384	384	if (decrypt)
385	385	{
386		decrypted = fd1094_get_decrypted_base();
	386	decrypted = (UINT8 *)fd1094_get_decrypted_base();
387	387	if (!decrypted)
388		decrypted = fd1089_get_decrypted_base();
	388	decrypted = (UINT8 *)fd1089_get_decrypted_base();
389	389	}
390	390
391	391	memory_configure_bank(machine, banknum, 0, 1, (UINT8 *)chip->cpu->region + region_start, 0);

src/mame/machine/buggychl.c

r4679	r4680
10	10	{
11	11	mcu_sent = 0;
12	12	main_sent = 0;
13		cpu_set_input_line(machine->cpu[2],0,CLEAR_LINE);
	13	cputag_set_input_line(machine, "mcu", 0, CLEAR_LINE);
14	14	}
15	15
16	16
r4679	r4680
70	70
71	71	WRITE8_HANDLER( buggychl_68705_portB_w )
72	72	{
73		logerror("%04x: 68705 port B write %02x\n",cpu_get_pc(space->cpu),data);
	73	logerror("%04x: 68705 port B write %02x\n", cpu_get_pc(space->cpu), data);
74	74
75	75	if ((ddrB & 0x02) && (~data & 0x02) && (portB_out & 0x02))
76	76	{
77	77	portA_in = from_main;
78		if (main_sent) cpu_set_input_line(space->machine->cpu[2],0,CLEAR_LINE);
	78	if (main_sent) cputag_set_input_line(space->machine, "mcu", 0, CLEAR_LINE);
79	79	main_sent = 0;
80		logerror("read command %02x from main cpu\n",portA_in);
	80	logerror("read command %02x from main cpu\n", portA_in);
81	81	}
82	82	if ((ddrB & 0x04) && (data & 0x04) && (~portB_out & 0x04))
83	83	{
84		logerror("send command %02x to main cpu\n",portA_out);
	84	logerror("send command %02x to main cpu\n", portA_out);
85	85	from_mcu = portA_out;
86	86	mcu_sent = 1;
87	87	}
r4679	r4680
111	111	portC_in = 0;
112	112	if (main_sent) portC_in |= 0x01;
113	113	if (!mcu_sent) portC_in |= 0x02;
114		logerror("%04x: 68705 port C read %02x\n",cpu_get_pc(space->cpu),portC_in);
	114	logerror("%04x: 68705 port C read %02x\n", cpu_get_pc(space->cpu), portC_in);
115	115	return (portC_out & ddrC) | (portC_in & ~ddrC);
116	116	}
117	117
118	118	WRITE8_HANDLER( buggychl_68705_portC_w )
119	119	{
120		logerror("%04x: 68705 port C write %02x\n",cpu_get_pc(space->cpu),data);
	120	logerror("%04x: 68705 port C write %02x\n", cpu_get_pc(space->cpu), data);
121	121	portC_out = data;
122	122	}
123	123
r4679	r4680
129	129
130	130	WRITE8_HANDLER( buggychl_mcu_w )
131	131	{
132		logerror("%04x: mcu_w %02x\n",cpu_get_pc(space->cpu),data);
	132	logerror("%04x: mcu_w %02x\n", cpu_get_pc(space->cpu), data);
133	133	from_main = data;
134	134	main_sent = 1;
135		cpu_set_input_line(space->machine->cpu[2],0,ASSERT_LINE);
	135	cputag_set_input_line(space->machine, "mcu", 0, ASSERT_LINE);
136	136	}
137	137
138	138	READ8_HANDLER( buggychl_mcu_r )
139	139	{
140		logerror("%04x: mcu_r %02x\n",cpu_get_pc(space->cpu),from_mcu);
	140	logerror("%04x: mcu_r %02x\n", cpu_get_pc(space->cpu), from_mcu);
141	141	mcu_sent = 0;
142	142	return from_mcu;
143	143	}

src/mame/machine/deco156.c

r4679	r4680
126	126	{
127	127	UINT32 *rom = (UINT32 *)memory_region(machine, "maincpu");
128	128	int length = memory_region_length(machine, "maincpu");
129		UINT32 *buf = malloc_or_die(length);
	129	UINT32 *buf = alloc_array_or_die(UINT32, length/4);
130	130
131	131	memcpy(buf, rom, length);
132	132	decrypt(buf, rom, length);

src/mame/machine/n64.c

r4679	r4680
25	25	{
26	26	mi_interrupt |= interrupt;
27	27
28		cpu_set_input_line(machine->cpu[0], INPUT_LINE_IRQ0, ASSERT_LINE);
	28	cputag_set_input_line(machine, "maincpu", INPUT_LINE_IRQ0, ASSERT_LINE);
29	29	}
30	30	}
31	31
r4679	r4680
35	35
36	36	//if (!mi_interrupt)
37	37	{
38		cpu_set_input_line(machine->cpu[0], INPUT_LINE_IRQ0, CLEAR_LINE);
	38	cputag_set_input_line(machine, "maincpu", INPUT_LINE_IRQ0, CLEAR_LINE);
39	39	}
40	40	}
41	41
r4679	r4680
233	233	return (sp_dma_skip << 20) | (sp_dma_count << 12) | sp_dma_length;
234	234
235	235	case 0x10/4:      // SP_STATUS_REG
236		return cpu_get_reg(space->machine->cpu[1], RSP_SR);
	236	return cpu_get_reg(cputag_get_cpu(space->machine, "rsp"), RSP_SR);
237	237
238	238	case 0x14/4:      // SP_DMA_FULL_REG
239	239	return 0;
r4679	r4680
255	255	return 0;
256	256
257	257	case 0x40000/4:     // PC
258		return cpu_get_reg(space->machine->cpu[1], RSP_PC) & 0x00000fff;
	258	return cpu_get_reg(cputag_get_cpu(space->machine, "rsp"), RSP_PC) & 0x00000fff;
259	259
260	260	default:
261	261	logerror("sp_reg_r: %08X, %08X at %08X\n", offset, mem_mask, cpu_get_pc(space->cpu));
r4679	r4680
303	303	//  cpu_spinuntil_trigger(space->cpu, 6789);
304	304
305	305	// printf( "Clearing RSP_STATUS_HALT\n" );
306		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_HALT, CLEAR_LINE);
307		cpu_set_reg(space->machine->cpu[1], RSP_SR, cpu_get_reg(space->machine->cpu[1], RSP_SR) & ~RSP_STATUS_HALT );
	306	cputag_set_input_line(space->machine, "rsp", INPUT_LINE_HALT, CLEAR_LINE);
	307	cpu_set_reg(cputag_get_cpu(space->machine, "rsp"), RSP_SR, cpu_get_reg(cputag_get_cpu(space->machine, "rsp"), RSP_SR) & ~RSP_STATUS_HALT );
308	308	// RSP_STATUS &= ~RSP_STATUS_HALT;
309	309	//}
310	310	//else
r4679	r4680
315	315	if (data & 0x00000002)      // set halt
316	316	{
317	317	// printf( "Setting RSP_STATUS_HALT\n" );
318		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_HALT, ASSERT_LINE);
319		cpu_set_reg(space->machine->cpu[1], RSP_SR, cpu_get_reg(space->machine->cpu[1], RSP_SR) | RSP_STATUS_HALT );
	318	cputag_set_input_line(space->machine, "rsp", INPUT_LINE_HALT, ASSERT_LINE);
	319	cpu_set_reg(cputag_get_cpu(space->machine, "rsp"), RSP_SR, cpu_get_reg(cputag_get_cpu(space->machine, "rsp"), RSP_SR) | RSP_STATUS_HALT );
320	320	// RSP_STATUS |= RSP_STATUS_HALT;
321	321	}
322	322	if (data & 0x00000004)
323	323	{
324	324	//printf( "Clearing RSP_STATUS_BROKE\n" );
325		cpu_set_reg(space->machine->cpu[1], RSP_SR, cpu_get_reg(space->machine->cpu[1], RSP_SR) & ~RSP_STATUS_BROKE );
	325	cpu_set_reg(cputag_get_cpu(space->machine, "rsp"), RSP_SR, cpu_get_reg(cputag_get_cpu(space->machine, "rsp"), RSP_SR) & ~RSP_STATUS_BROKE );
326	326	// RSP_STATUS &= ~RSP_STATUS_BROKE;     // clear broke
327	327	}
328	328	if (data & 0x00000008)      // clear interrupt
r4679	r4680
336	336	if (data & 0x00000020)
337	337	{
338	338	// printf( "Clearing RSP_STATUS_SSTEP\n" );
339		cpu_set_reg(space->machine->cpu[1], RSP_SR, cpu_get_reg(space->machine->cpu[1], RSP_SR) & ~RSP_STATUS_SSTEP );
	339	cpu_set_reg(cputag_get_cpu(space->machine, "rsp"), RSP_SR, cpu_get_reg(cputag_get_cpu(space->machine, "rsp"), RSP_SR) & ~RSP_STATUS_SSTEP );
340	340	// RSP_STATUS &= ~RSP_STATUS_SSTEP;     // clear single step
341	341	}
342	342	if (data & 0x00000040)
343	343	{
344	344	//printf( "Setting RSP_STATUS_SSTEP\n" );
345		cpu_set_reg(space->machine->cpu[1], RSP_SR, cpu_get_reg(space->machine->cpu[1], RSP_SR) | RSP_STATUS_SSTEP );
346		if( !( cpu_get_reg(space->machine->cpu[1], RSP_SR) & ( RSP_STATUS_BROKE | RSP_STATUS_HALT ) ) )
	345	cpu_set_reg(cputag_get_cpu(space->machine, "rsp"), RSP_SR, cpu_get_reg(cputag_get_cpu(space->machine, "rsp"), RSP_SR) | RSP_STATUS_SSTEP );
	346	if( !( cpu_get_reg(cputag_get_cpu(space->machine, "rsp"), RSP_SR) & ( RSP_STATUS_BROKE | RSP_STATUS_HALT ) ) )
347	347	{
348		cpu_set_reg(space->machine->cpu[1], RSP_STEPCNT, 1 );
	348	cpu_set_reg(cputag_get_cpu(space->machine, "rsp"), RSP_STEPCNT, 1 );
349	349	}
350	350	// RSP_STATUS |= RSP_STATUS_SSTEP;      // set single step
351	351	}
352	352	if (data & 0x00000080)
353	353	{
354		cpu_set_reg(space->machine->cpu[1], RSP_SR, cpu_get_reg(space->machine->cpu[1], RSP_SR) & ~RSP_STATUS_INTR_BREAK );
	354	cpu_set_reg(cputag_get_cpu(space->machine, "rsp"), RSP_SR, cpu_get_reg(cputag_get_cpu(space->machine, "rsp"), RSP_SR) & ~RSP_STATUS_INTR_BREAK );
355	355	// RSP_STATUS &= ~RSP_STATUS_INTR_BREAK;    // clear interrupt on break
356	356	}
357	357	if (data & 0x00000100)
358	358	{
359		cpu_set_reg(space->machine->cpu[1], RSP_SR, cpu_get_reg(space->machine->cpu[1], RSP_SR) | RSP_STATUS_INTR_BREAK );
	359	cpu_set_reg(cputag_get_cpu(space->machine, "rsp"), RSP_SR, cpu_get_reg(cputag_get_cpu(space->machine, "rsp"), RSP_SR) | RSP_STATUS_INTR_BREAK );
360	360	// RSP_STATUS |= RSP_STATUS_INTR_BREAK; // set interrupt on break
361	361	}
362	362	if (data & 0x00000200)
363	363	{
364		cpu_set_reg(space->machine->cpu[1], RSP_SR, cpu_get_reg(space->machine->cpu[1], RSP_SR) & ~RSP_STATUS_SIGNAL0 );
	364	cpu_set_reg(cputag_get_cpu(space->machine, "rsp"), RSP_SR, cpu_get_reg(cputag_get_cpu(space->machine, "rsp"), RSP_SR) & ~RSP_STATUS_SIGNAL0 );
365	365	// RSP_STATUS &= ~RSP_STATUS_SIGNAL0;       // clear signal 0
366	366	}
367	367	if (data & 0x00000400)
368	368	{
369		cpu_set_reg(space->machine->cpu[1], RSP_SR, cpu_get_reg(space->machine->cpu[1], RSP_SR) | RSP_STATUS_SIGNAL0 );
	369	cpu_set_reg(cputag_get_cpu(space->machine, "rsp"), RSP_SR, cpu_get_reg(cputag_get_cpu(space->machine, "rsp"), RSP_SR) | RSP_STATUS_SIGNAL0 );
370	370	// RSP_STATUS |= RSP_STATUS_SIGNAL0;        // set signal 0
371	371	}
372	372	if (data & 0x00000800)
373	373	{
374		cpu_set_reg(space->machine->cpu[1], RSP_SR, cpu_get_reg(space->machine->cpu[1], RSP_SR) & ~RSP_STATUS_SIGNAL1 );
	374	cpu_set_reg(cputag_get_cpu(space->machine, "rsp"), RSP_SR, cpu_get_reg(cputag_get_cpu(space->machine, "rsp"), RSP_SR) & ~RSP_STATUS_SIGNAL1 );
375	375	// RSP_STATUS &= ~RSP_STATUS_SIGNAL1;       // clear signal 1
376	376	}
377	377	if (data & 0x00001000)
378	378	{
379		cpu_set_reg(space->machine->cpu[1], RSP_SR, cpu_get_reg(space->machine->cpu[1], RSP_SR) | RSP_STATUS_SIGNAL1 );
	379	cpu_set_reg(cputag_get_cpu(space->machine, "rsp"), RSP_SR, cpu_get_reg(cputag_get_cpu(space->machine, "rsp"), RSP_SR) | RSP_STATUS_SIGNAL1 );
380	380	// RSP_STATUS |= RSP_STATUS_SIGNAL1;        // set signal 1
381	381	}
382	382	if (data & 0x00002000)
383	383	{
384		cpu_set_reg(space->machine->cpu[1], RSP_SR, cpu_get_reg(space->machine->cpu[1], RSP_SR) & ~RSP_STATUS_SIGNAL2 );
	384	cpu_set_reg(cputag_get_cpu(space->machine, "rsp"), RSP_SR, cpu_get_reg(cputag_get_cpu(space->machine, "rsp"), RSP_SR) & ~RSP_STATUS_SIGNAL2 );
385	385	// RSP_STATUS &= ~RSP_STATUS_SIGNAL2;       // clear signal 2
386	386	}
387	387	if (data & 0x00004000)
388	388	{
389		cpu_set_reg(space->machine->cpu[1], RSP_SR, cpu_get_reg(space->machine->cpu[1], RSP_SR) | RSP_STATUS_SIGNAL2 );
	389	cpu_set_reg(cputag_get_cpu(space->machine, "rsp"), RSP_SR, cpu_get_reg(cputag_get_cpu(space->machine, "rsp"), RSP_SR) | RSP_STATUS_SIGNAL2 );
390	390	// RSP_STATUS |= RSP_STATUS_SIGNAL2;        // set signal 2
391	391	}
392	392	if (data & 0x00008000)
393	393	{
394		cpu_set_reg(space->machine->cpu[1], RSP_SR, cpu_get_reg(space->machine->cpu[1], RSP_SR) & ~RSP_STATUS_SIGNAL3 );
	394	cpu_set_reg(cputag_get_cpu(space->machine, "rsp"), RSP_SR, cpu_get_reg(cputag_get_cpu(space->machine, "rsp"), RSP_SR) & ~RSP_STATUS_SIGNAL3 );
395	395	// RSP_STATUS &= ~RSP_STATUS_SIGNAL3;       // clear signal 3
396	396	}
397	397	if (data & 0x00010000)
398	398	{
399		cpu_set_reg(space->machine->cpu[1], RSP_SR, cpu_get_reg(space->machine->cpu[1], RSP_SR) | RSP_STATUS_SIGNAL3 );
	399	cpu_set_reg(cputag_get_cpu(space->machine, "rsp"), RSP_SR, cpu_get_reg(cputag_get_cpu(space->machine, "rsp"), RSP_SR) | RSP_STATUS_SIGNAL3 );
400	400	// RSP_STATUS |= RSP_STATUS_SIGNAL3;        // set signal 3
401	401	}
402	402	if (data & 0x00020000)
403	403	{
404		cpu_set_reg(space->machine->cpu[1], RSP_SR, cpu_get_reg(space->machine->cpu[1], RSP_SR) & ~RSP_STATUS_SIGNAL4 );
	404	cpu_set_reg(cputag_get_cpu(space->machine, "rsp"), RSP_SR, cpu_get_reg(cputag_get_cpu(space->machine, "rsp"), RSP_SR) & ~RSP_STATUS_SIGNAL4 );
405	405	// RSP_STATUS &= ~RSP_STATUS_SIGNAL4;       // clear signal 4
406	406	}
407	407	if (data & 0x00040000)
408	408	{
409		cpu_set_reg(space->machine->cpu[1], RSP_SR, cpu_get_reg(space->machine->cpu[1], RSP_SR) | RSP_STATUS_SIGNAL4 );
	409	cpu_set_reg(cputag_get_cpu(space->machine, "rsp"), RSP_SR, cpu_get_reg(cputag_get_cpu(space->machine, "rsp"), RSP_SR) | RSP_STATUS_SIGNAL4 );
410	410	// RSP_STATUS |= RSP_STATUS_SIGNAL4;        // set signal 4
411	411	}
412	412	if (data & 0x00080000)
413	413	{
414		cpu_set_reg(space->machine->cpu[1], RSP_SR, cpu_get_reg(space->machine->cpu[1], RSP_SR) & ~RSP_STATUS_SIGNAL5 );
	414	cpu_set_reg(cputag_get_cpu(space->machine, "rsp"), RSP_SR, cpu_get_reg(cputag_get_cpu(space->machine, "rsp"), RSP_SR) & ~RSP_STATUS_SIGNAL5 );
415	415	// RSP_STATUS &= ~RSP_STATUS_SIGNAL5;       // clear signal 5
416	416	}
417	417	if (data & 0x00100000)
418	418	{
419		cpu_set_reg(space->machine->cpu[1], RSP_SR, cpu_get_reg(space->machine->cpu[1], RSP_SR) | RSP_STATUS_SIGNAL5 );
	419	cpu_set_reg(cputag_get_cpu(space->machine, "rsp"), RSP_SR, cpu_get_reg(cputag_get_cpu(space->machine, "rsp"), RSP_SR) | RSP_STATUS_SIGNAL5 );
420	420	// RSP_STATUS |= RSP_STATUS_SIGNAL5;        // set signal 5
421	421	}
422	422	if (data & 0x00200000)
423	423	{
424		cpu_set_reg(space->machine->cpu[1], RSP_SR, cpu_get_reg(space->machine->cpu[1], RSP_SR) & ~RSP_STATUS_SIGNAL6 );
	424	cpu_set_reg(cputag_get_cpu(space->machine, "rsp"), RSP_SR, cpu_get_reg(cputag_get_cpu(space->machine, "rsp"), RSP_SR) & ~RSP_STATUS_SIGNAL6 );
425	425	// RSP_STATUS &= ~RSP_STATUS_SIGNAL6;       // clear signal 6
426	426	}
427	427	if (data & 0x00400000)
428	428	{
429		cpu_set_reg(space->machine->cpu[1], RSP_SR, cpu_get_reg(space->machine->cpu[1], RSP_SR) | RSP_STATUS_SIGNAL6 );
	429	cpu_set_reg(cputag_get_cpu(space->machine, "rsp"), RSP_SR, cpu_get_reg(cputag_get_cpu(space->machine, "rsp"), RSP_SR) | RSP_STATUS_SIGNAL6 );
430	430	// RSP_STATUS |= RSP_STATUS_SIGNAL6;        // set signal 6
431	431	}
432	432	if (data & 0x00800000)
433	433	{
434		cpu_set_reg(space->machine->cpu[1], RSP_SR, cpu_get_reg(space->machine->cpu[1], RSP_SR) & ~RSP_STATUS_SIGNAL7 );
	434	cpu_set_reg(cputag_get_cpu(space->machine, "rsp"), RSP_SR, cpu_get_reg(cputag_get_cpu(space->machine, "rsp"), RSP_SR) & ~RSP_STATUS_SIGNAL7 );
435	435	// RSP_STATUS &= ~RSP_STATUS_SIGNAL7;       // clear signal 7
436	436	}
437	437	if (data & 0x01000000)
438	438	{
439		cpu_set_reg(space->machine->cpu[1], RSP_SR, cpu_get_reg(space->machine->cpu[1], RSP_SR) | RSP_STATUS_SIGNAL7 );
	439	cpu_set_reg(cputag_get_cpu(space->machine, "rsp"), RSP_SR, cpu_get_reg(cputag_get_cpu(space->machine, "rsp"), RSP_SR) | RSP_STATUS_SIGNAL7 );
440	440	// RSP_STATUS |= RSP_STATUS_SIGNAL7;        // set signal 7
441	441	}
442	442	break;
r4679	r4680
458	458	{
459	459	case 0x00/4:        // SP_PC_REG
460	460	//printf( "Setting PC to: %08x\n", 0x04001000 | (data & 0xfff ) );
461		if( device_get_info_int(space->machine->cpu[1], CPUINFO_INT_REGISTER + RSP_NEXTPC) != 0xffffffff )
	461	if( cpu_get_reg(cputag_get_cpu(space->machine, "rsp"), RSP_NEXTPC) != 0xffffffff )
462	462	{
463		device_set_info_int(space->machine->cpu[1], CPUINFO_INT_REGISTER + RSP_NEXTPC, 0x04001000 | (data & 0xfff));
	463	cpu_set_reg(cputag_get_cpu(space->machine, "rsp"), RSP_NEXTPC, 0x04001000 | (data & 0xfff));
464	464	}
465	465	else
466	466	{
467		device_set_info_int(space->machine->cpu[1], CPUINFO_INT_REGISTER + RSP_PC, 0x04001000 | (data & 0xfff));
	467	cpu_set_reg(cputag_get_cpu(space->machine, "rsp"), RSP_PC, 0x04001000 | (data & 0xfff));
468	468	}
469	469	break;
470	470
r4679	r4680
1569	1569
1570	1570	MACHINE_START( n64 )
1571	1571	{
1572		mips3drc_set_options(machine->cpu[0], MIPS3DRC_FASTEST_OPTIONS + MIPS3DRC_STRICT_VERIFY);
	1572	mips3drc_set_options(cputag_get_cpu(machine, "maincpu"), MIPS3DRC_FASTEST_OPTIONS + MIPS3DRC_STRICT_VERIFY);
1573	1573
1574	1574	/* configure fast RAM regions for DRC */
1575		mips3drc_add_fastram(machine->cpu[0], 0x00000000, 0x007fffff, FALSE, rdram);
	1575	mips3drc_add_fastram(cputag_get_cpu(machine, "maincpu"), 0x00000000, 0x007fffff, FALSE, rdram);
1576	1576	}
1577	1577
1578	1578	MACHINE_RESET( n64 )
r4679	r4680
1634	1634	audio_timer = timer_alloc(machine, audio_timer_callback, NULL);
1635	1635	timer_adjust_oneshot(audio_timer, attotime_never, 0);
1636	1636
1637		cpu_set_input_line(machine->cpu[1], INPUT_LINE_HALT, ASSERT_LINE);
	1637	cputag_set_input_line(machine, "rsp", INPUT_LINE_HALT, ASSERT_LINE);
1638	1638
1639	1639	// bootcode differs between CIC-chips, so we can use its checksum to detect the CIC-chip
1640	1640	boot_checksum = 0;

src/mame/machine/stfight.c

r4679	r4680
53	53	UINT8 *rom = memory_region(machine, "maincpu");
54	54	int A;
55	55
56		decrypt = auto_malloc(0x8000);
	56	decrypt = auto_alloc_array(machine, UINT8, 0x8000);
57	57	memory_set_decrypted_region(space, 0x0000, 0x7fff, decrypt);
58	58
59	59	for (A = 0;A < 0x8000;A++)
r4679	r4680
93	93
94	94	MACHINE_RESET( stfight )
95	95	{
96		const address_space *space = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM);
	96	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
97	97	adpcm_data_offs = adpcm_data_end = 0;
98	98	toggle = 0;
99	99	fm_data = 0;
r4679	r4680
123	123	static TIMER_CALLBACK( stfight_interrupt_1 )
124	124	{
125	125	// Do a RST08
126		cpu_set_input_line_and_vector(machine->cpu[0],0,HOLD_LINE,0xcf);
	126	cputag_set_input_line_and_vector(machine, "maincpu", 0, HOLD_LINE, 0xcf);
127	127	}
128	128
129	129	INTERRUPT_GEN( stfight_vb_interrupt )
130	130	{
131	131	// Do a RST10
132		cpu_set_input_line_and_vector(device,0,HOLD_LINE,0xd7);
	132	cpu_set_input_line_and_vector(device, 0, HOLD_LINE, 0xd7);
133	133	timer_set(device->machine, ATTOTIME_IN_HZ(120), NULL, 0, stfight_interrupt_1);
134	134	}
135	135

src/mame/machine/volfied.c

r4679	r4680
486	486
487	487	void volfied_cchip_init(running_machine *machine)
488	488	{
489		cchip_ram=auto_malloc(0x400 * 8);
	489	cchip_ram=auto_alloc_array(machine, UINT8, 0x400 * 8);
490	490
491	491	state_save_register_global(machine, current_bank);
492	492	state_save_register_global(machine, current_cmd);

src/mame/machine/balsente.c

r4679	r4680
16	16
17	17
18	18	/* local prototypes */
19		static void poly17_init(void);
	19	static void poly17_init(running_machine *machine);
20	20	static void counter_set_out(running_machine *machine, int which, int gate);
21	21	static TIMER_CALLBACK( counter_callback );
22	22	static TIMER_CALLBACK( clock_counter_0_ff );
r4679	r4680
103	103
104	104	static TIMER_CALLBACK( irq_off )
105	105	{
106		cpu_set_input_line(machine->cpu[0], M6809_IRQ_LINE, CLEAR_LINE);
	106	cputag_set_input_line(machine, "maincpu", M6809_IRQ_LINE, CLEAR_LINE);
107	107	}
108	108
109	109
r4679	r4680
116	116	timer_adjust_oneshot(scanline_timer, video_screen_get_time_until_pos(machine->primary_screen, param + 64, 0), param + 64);
117	117
118	118	/* IRQ starts on scanline 0, 64, 128, etc. */
119		cpu_set_input_line(machine->cpu[0], M6809_IRQ_LINE, ASSERT_LINE);
	119	cputag_set_input_line(machine, "maincpu", M6809_IRQ_LINE, ASSERT_LINE);
120	120
121	121	/* it will turn off on the next HBLANK */
122	122	timer_set(machine, video_screen_get_time_until_pos(machine->primary_screen, param, BALSENTE_HBSTART), NULL, 0, irq_off);
r4679	r4680
148	148
149	149	MACHINE_RESET( balsente )
150	150	{
151		const address_space *space = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM);
	151	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
152	152	int numbanks, i;
153	153
154	154	/* create the polynomial tables */
155		poly17_init();
	155	poly17_init(machine);
156	156
157	157	/* reset counters; counter 2's gate is tied high */
158	158	memset(counter, 0, sizeof(counter));
r4679	r4680
199	199	memory_configure_bank(machine, 2, 0, numbanks, &memory_region(machine, "maincpu")[0x12000], 0x6000);
200	200	memory_set_bank(space->machine, 1, 0);
201	201	memory_set_bank(space->machine, 2, 0);
202		device_reset(machine->cpu[0]);
	202	device_reset(cputag_get_cpu(machine, "maincpu"));
203	203
204	204	/* start a timer to generate interrupts */
205	205	scanline_timer = timer_alloc(machine, interrupt_timer, NULL);
r4679	r4680
267	267	#define POLY17_SHR   10
268	268	#define POLY17_ADD   0x18000
269	269
270		static void poly17_init(void)
	270	static void poly17_init(running_machine *machine)
271	271	{
272	272	UINT32 i, x = 0;
273	273	UINT8 *p, *r;
274	274
275	275	/* allocate memory */
276		p = poly17 = auto_malloc(POLY17_SIZE + 1);
277		r = rand17 = auto_malloc(POLY17_SIZE + 1);
	276	p = poly17 = auto_alloc_array(machine, UINT8, POLY17_SIZE + 1);
	277	r = rand17 = auto_alloc_array(machine, UINT8, POLY17_SIZE + 1);
278	278
279	279	/* generate the polynomial */
280	280	for (i = 0; i < POLY17_SIZE; i++)
r4679	r4680
475	475	/* apply the change */
476	476	if (new_state && !(m6850_status & 0x80))
477	477	{
478		cpu_set_input_line(machine->cpu[0], M6809_FIRQ_LINE, ASSERT_LINE);
	478	cputag_set_input_line(machine, "maincpu", M6809_FIRQ_LINE, ASSERT_LINE);
479	479	m6850_status |= 0x80;
480	480	}
481	481	else if (!new_state && (m6850_status & 0x80))
482	482	{
483		cpu_set_input_line(machine->cpu[0], M6809_FIRQ_LINE, CLEAR_LINE);
	483	cputag_set_input_line(machine, "maincpu", M6809_FIRQ_LINE, CLEAR_LINE);
484	484	m6850_status &= ~0x80;
485	485	}
486	486
r4679	r4680
493	493	/* apply the change */
494	494	if (new_state && !(m6850_sound_status & 0x80))
495	495	{
496		cpu_set_input_line(machine->cpu[1], INPUT_LINE_NMI, ASSERT_LINE);
	496	cputag_set_input_line(machine, "audiocpu", INPUT_LINE_NMI, ASSERT_LINE);
497	497	m6850_sound_status |= 0x80;
498	498	}
499	499	else if (!new_state && (m6850_sound_status & 0x80))
500	500	{
501		cpu_set_input_line(machine->cpu[1], INPUT_LINE_NMI, CLEAR_LINE);
	501	cputag_set_input_line(machine, "audiocpu", INPUT_LINE_NMI, CLEAR_LINE);
502	502	m6850_sound_status &= ~0x80;
503	503	}
504	504	}
r4679	r4680
784	784	{
785	785	/* OUT on counter 2 is hooked to the /INT line on the Z80 */
786	786	if (which == 2)
787		cpu_set_input_line(machine->cpu[1], 0, out ? ASSERT_LINE : CLEAR_LINE);
	787	cputag_set_input_line(machine, "audiocpu", 0, out ? ASSERT_LINE : CLEAR_LINE);
788	788
789	789	/* OUT on counter 0 is hooked to the GATE line on counter 1 */
790	790	else if (which == 0)

src/mame/machine/deco102.c

r4679	r4680
28	28	{ 12,15,8,13,9,11,14,10, 6,5,4,3,2,1,0,7 }, { 11,12,13,14,15,8,9,10, 4,5,7,1,6,3,2,0 },
29	29	{ 13,8,12,14,11,15,10,9, 7,6,5,4,3,2,1,0 }, { 15,14,13,12,11,10,9,8, 0,6,7,4,3,2,1,5 }
30	30	};
31		int j, xor;
	31	int j, xorval;
32	32	const UINT8 *bs;
33	33
34	34	// calculate bitswap to use
r4679	r4680
39	39	// calculate xor to use
40	40	j = (address ^ select_xor) & 0x0f;
41	41	if (address & 0x40000) j ^= 2;   // boogwing
42		xor = xors[j];
	42	xorval = xors[j];
43	43
44	44	// decrypt
45		return xor ^ BITSWAP16(data,
	45	return xorval ^ BITSWAP16(data,
46	46	bs[0],bs[1],bs[2],bs[3],bs[4],bs[5],bs[6],bs[7],
47	47	bs[8],bs[9],bs[10],bs[11],bs[12],bs[13],bs[14],bs[15]);
48	48	}
r4679	r4680
53	53	const address_space *space = cputag_get_address_space(machine, cputag, ADDRESS_SPACE_PROGRAM);
54	54	UINT16 *rom = (UINT16 *)memory_region(machine, cputag);
55	55	int size = memory_region_length(machine, cputag);
56		UINT16 *opcodes = auto_malloc(size);
57		UINT16 *buf = malloc_or_die(size);
	56	UINT16 *opcodes = auto_alloc_array(machine, UINT16, size / 2);
	57	UINT16 *buf = alloc_array_or_die(UINT16, size / 2);
58	58
59		memcpy(buf,rom,size);
	59	memcpy(buf, rom, size);
60	60
61	61	memory_set_decrypted_region(space, 0, size - 1, opcodes);
62		m68k_set_encrypted_opcode_range(machine->cpu[0],0,size);
	62	m68k_set_encrypted_opcode_range(cputag_get_cpu(machine, cputag), 0, size);
63	63
64		for (i = 0;i < size/2;i++)
	64	for (i = 0; i < size / 2; i++)
65	65	{
66	66	int src;
67	67

src/mame/machine/vsnes.c

r4679	r4680
292	292	DRIVER_INIT( vsnormal )
293	293	{
294	294	/* vrom switching is enabled with bit 2 of $4016 */
295		memory_install_write8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x4016, 0x4016, 0, 0, vsnormal_vrom_banking );
	295	memory_install_write8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x4016, 0x4016, 0, 0, vsnormal_vrom_banking );
296	296	}
297	297
298	298	static WRITE8_HANDLER( ppuRC2C05_protection )
r4679	r4680
323	323	DRIVER_INIT_CALL(vsnormal);
324	324
325	325	/* extra ram at $6000 is enabled with bit 1 of $4016 */
326		memory_install_readwrite8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x6000, 0x7fff, 0, 0, SMH_BANK1, SMH_BANK1 );
327		memory_set_bankptr(machine, 1, auto_malloc(0x2000));
	326	memory_install_readwrite8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x6000, 0x7fff, 0, 0, (read8_space_func)SMH_BANK(1), (write8_space_func)SMH_BANK(1) );
	327	memory_set_bankptr(machine, 1, auto_alloc_array(machine, UINT8, 0x2000));
328	328
329	329	/* now override the vidaccess callback */
330	330	/* we need to remap color tables */
r4679	r4680
390	390	DRIVER_INIT( duckhunt )
391	391	{
392	392	/* vrom switching is enabled with bit 2 of $4016 */
393		memory_install_readwrite8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x4016, 0x4016, 0, 0, gun_in0_r, gun_in0_w );
	393	memory_install_readwrite8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x4016, 0x4016, 0, 0, gun_in0_r, gun_in0_w );
394	394
395	395	/* common init */
396	396	init_vsnes(machine);
r4679	r4680
439	439	memcpy( &prg[0x08000], &prg[0x18000], 0x8000 );
440	440
441	441	/* banking is done with writes to the $8000-$ffff area */
442		memory_install_write8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x8000, 0xffff, 0, 0, goonies_rom_banking );
	442	memory_install_write8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x8000, 0xffff, 0, 0, goonies_rom_banking );
443	443
444	444	/* common init */
445	445	init_vsnes(machine);
r4679	r4680
456	456	memcpy( &prg[0x08000], &prg[0x18000], 0x8000 );
457	457
458	458	/* banking is done with writes to the $8000-$ffff area */
459		memory_install_write8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x8000, 0xffff, 0, 0, goonies_rom_banking );
	459	memory_install_write8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x8000, 0xffff, 0, 0, goonies_rom_banking );
460	460
461	461	/* common init */
462	462	init_vsnes(machine);
r4679	r4680
482	482	{
483	483
484	484	/* vrom switching is enabled with bit 2 of $4016 */
485		memory_install_readwrite8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x4016, 0x4016, 0, 0, gun_in0_r, gun_in0_w );
	485	memory_install_readwrite8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x4016, 0x4016, 0, 0, gun_in0_r, gun_in0_w );
486	486
487	487	/* common init */
488	488	init_vsnes(machine);
r4679	r4680
527	527	memcpy (&prg[0x08000], &prg[0x12000], 0x2000);
528	528
529	529	/* Protection */
530		memory_install_read8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x2002, 0x2002, 0, 0, vsgshoe_security_r );
531		memory_install_write8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x2000, 0x2001, 0, 0, ppuRC2C05_protection );
	530	memory_install_read8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x2002, 0x2002, 0, 0, vsgshoe_security_r );
	531	memory_install_write8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x2000, 0x2001, 0, 0, ppuRC2C05_protection );
532	532
533	533	/* vrom switching is enabled with bit 2 of $4016 */
534		memory_install_readwrite8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x4016, 0x4016, 0, 0, gun_in0_r, vsgshoe_gun_in0_w );
	534	memory_install_readwrite8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x4016, 0x4016, 0, 0, gun_in0_r, vsgshoe_gun_in0_w );
535	535
536	536	/* common init */
537	537	init_vsnes(machine);
r4679	r4680
669	669	memcpy( &prg[0x0c000], &prg[0x1c000], 0x4000 );
670	670
671	671	/* MMC1 mapper at writes to $8000-$ffff */
672		memory_install_write8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x8000, 0xffff, 0, 0, drmario_rom_banking );
	672	memory_install_write8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x8000, 0xffff, 0, 0, drmario_rom_banking );
673	673
674	674	drmario_shiftreg = 0;
675	675	drmario_shiftcount = 0;
r4679	r4680
766	766	memcpy( &prg[0x08000], &prg[0x28000], 0x8000 );
767	767
768	768	/* banking is done with writes to the $8000-$ffff area */
769		memory_install_write8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x8000, 0xffff, 0, 0, castlevania_rom_banking );
	769	memory_install_write8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x8000, 0xffff, 0, 0, castlevania_rom_banking );
770	770
771	771	/* common init */
772	772	init_vsnes(machine);
r4679	r4680
794	794	memcpy( &prg[0x08000], &prg[0x28000], 0x8000 );
795	795
796	796	/* banking is done with writes to the $8000-$ffff area */
797		memory_install_write8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x8000, 0xffff, 0, 0, castlevania_rom_banking );
	797	memory_install_write8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x8000, 0xffff, 0, 0, castlevania_rom_banking );
798	798
799	799	/* tap on the PPU, due to some tricky protection */
800		memory_install_read8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x2002, 0x2002, 0, 0, topgun_security_r );
801		memory_install_write8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x2000, 0x2001, 0, 0, ppuRC2C05_protection );
	800	memory_install_read8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x2002, 0x2002, 0, 0, topgun_security_r );
	801	memory_install_write8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x2000, 0x2001, 0, 0, ppuRC2C05_protection );
802	802
803	803	/* common init */
804	804	init_vsnes(machine);
r4679	r4680
848	848	static void mapper4_irq ( const device_config *device, int scanline, int vblank, int blanked )
849	849	{
850	850	mame_printf_debug("entra\n");
851		if ((scanline < BOTTOM_VISIBLE_SCANLINE) || (scanline == NUM_SCANLINE-1))
	851	if ((scanline < BOTTOM_VISIBLE_SCANLINE) || (scanline == NUM_SCANLINE - 1))
852	852	{
853	853	if ((IRQ_enable) && !blanked)
854	854	{
855	855	if (IRQ_count == 0)
856	856	{
857	857	IRQ_count = IRQ_count_latch;
858		cpu_set_input_line (device->machine->cpu[0], 0, HOLD_LINE);
	858	cputag_set_input_line(device->machine, "maincpu", 0, HOLD_LINE);
859	859	}
860	860	IRQ_count --;
861	861	}
r4679	r4680
979	979	memcpy( &prg[0xe000], &prg[(MMC3_prg_chunks-1) * 0x4000 + 0x12000], 0x2000 );
980	980
981	981	/* MMC3 mapper at writes to $8000-$ffff */
982		memory_install_write8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x8000, 0xffff, 0, 0, mapper4_w );
	982	memory_install_write8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x8000, 0xffff, 0, 0, mapper4_w );
983	983
984	984	/* extra ram at $6000-$7fff */
985		memory_install_readwrite8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x6000, 0x7fff, 0, 0, SMH_BANK1, SMH_BANK1 );
986		memory_set_bankptr(machine, 1, auto_malloc(0x2000));
	985	memory_install_readwrite8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x6000, 0x7fff, 0, 0, (read8_space_func)SMH_BANK(1), (write8_space_func)SMH_BANK(1) );
	986	memory_set_bankptr(machine, 1, auto_alloc_array(machine, UINT8, 0x2000));
987	987
988	988	/* common init */
989	989	init_vsnes(machine);
r4679	r4680
1024	1024	DRIVER_INIT_CALL(MMC3);
1025	1025
1026	1026	/* RBI Base ball hack */
1027		memory_install_read8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x5e00, 0x5e01, 0, 0, rbi_hack_r) ;
	1027	memory_install_read8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x5e00, 0x5e01, 0, 0, rbi_hack_r) ;
1028	1028
1029	1029	remapped_colortable = rp2c04003_colortable;
1030	1030	}
r4679	r4680
1074	1074	DRIVER_INIT_CALL(MMC3);
1075	1075
1076	1076	/* Vs. Super Xevious Protection */
1077		memory_install_read8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x54ff, 0x54ff, 0, 0, supxevs_read_prot_1_r );
1078		memory_install_read8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x5678, 0x5678, 0, 0, supxevs_read_prot_2_r );
1079		memory_install_read8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x578f, 0x578f, 0, 0, supxevs_read_prot_3_r );
1080		memory_install_read8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x5567, 0x5567, 0, 0, supxevs_read_prot_4_r );
	1077	memory_install_read8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x54ff, 0x54ff, 0, 0, supxevs_read_prot_1_r );
	1078	memory_install_read8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x5678, 0x5678, 0, 0, supxevs_read_prot_2_r );
	1079	memory_install_read8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x578f, 0x578f, 0, 0, supxevs_read_prot_3_r );
	1080	memory_install_read8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x5567, 0x5567, 0, 0, supxevs_read_prot_4_r );
1081	1081
1082	1082	remapped_colortable = rp2c04001_colortable;
1083	1083	}
r4679	r4680
1109	1109	DRIVER_INIT_CALL(MMC3);
1110	1110
1111	1111	/* security device at $5e00-$5e01 */
1112		memory_install_read8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x5e00, 0x5e01, 0, 0, tko_security_r );
	1112	memory_install_read8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x5e00, 0x5e01, 0, 0, tko_security_r );
1113	1113
1114	1114	/* now override the vidaccess callback */
1115	1115	/* we need to remap color tables */
r4679	r4680
1123	1123	{
1124	1124	DRIVER_INIT_CALL(MMC3);
1125	1125
1126		memory_install_readwrite8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x4016, 0x4016, 0, 0, gun_in0_r, gun_in0_w );
	1126	memory_install_readwrite8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x4016, 0x4016, 0, 0, gun_in0_r, gun_in0_w );
1127	1127
1128	1128	vsnes_gun_controller = 1;
1129	1129	vsnes_do_vrom_bank = 0;
r4679	r4680
1178	1178	memcpy( &prg[0x08000], &prg[0x10000], 0x4000 );
1179	1179	memcpy( &prg[0x0c000], &prg[0x2c000], 0x4000 );
1180	1180
1181		memory_install_write8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x8000, 0xffff, 0, 0, mapper68_rom_banking );
	1181	memory_install_write8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x8000, 0xffff, 0, 0, mapper68_rom_banking );
1182	1182
1183	1183	init_vsnes(machine);
1184	1184
r4679	r4680
1193	1193	static WRITE8_HANDLER ( set_bnglngby_irq_w )
1194	1194	{
1195	1195	ret = data;
1196		cpu_set_input_line(space->machine->cpu[0], 0, ( data & 2 ) ? ASSERT_LINE : CLEAR_LINE );
	1196	cputag_set_input_line(space->machine, "maincpu", 0, ( data & 2 ) ? ASSERT_LINE : CLEAR_LINE );
1197	1197	/* other values ??? */
1198	1198	/* 0, 4, 84 */
1199	1199	}
r4679	r4680
1205	1205
1206	1206	DRIVER_INIT( bnglngby )
1207	1207	{
1208		memory_install_readwrite8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x0231, 0x0231, 0, 0, set_bnglngby_irq_r, set_bnglngby_irq_w );
	1208	memory_install_readwrite8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x0231, 0x0231, 0, 0, set_bnglngby_irq_r, set_bnglngby_irq_w );
1209	1209
1210	1210	/* extra ram */
1211		memory_install_readwrite8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x6000, 0x7fff, 0, 0, SMH_BANK1, SMH_BANK1 );
1212		memory_set_bankptr(machine, 1, auto_malloc(0x2000));
	1211	memory_install_readwrite8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x6000, 0x7fff, 0, 0, (read8_space_func)SMH_BANK(1), (write8_space_func)SMH_BANK(1) );
	1212	memory_set_bankptr(machine, 1, auto_alloc_array(machine, UINT8, 0x2000));
1213	1213
1214	1214	ret = 0;
1215	1215
r4679	r4680
1238	1238	//Maybe it should be a DOP (double NOP)
1239	1239
1240	1240	/* Protection */
1241		memory_install_read8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x2002, 0x2002, 0, 0, jajamaru_security_r );
1242		memory_install_write8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x2000, 0x2001, 0, 0, ppuRC2C05_protection );
	1241	memory_install_read8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x2002, 0x2002, 0, 0, jajamaru_security_r );
	1242	memory_install_write8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x2000, 0x2001, 0, 0, ppuRC2C05_protection );
1243	1243
1244	1244	/* common init */
1245	1245	init_vsnes(machine);
r4679	r4680
1261	1261	DRIVER_INIT( mightybj )
1262	1262	{
1263	1263	/* Protection */
1264		memory_install_read8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x2002, 0x2002, 0, 0, mightybj_security_r );
1265		memory_install_write8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x2000, 0x2001, 0, 0, ppuRC2C05_protection );
	1264	memory_install_read8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x2002, 0x2002, 0, 0, mightybj_security_r );
	1265	memory_install_write8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x2000, 0x2001, 0, 0, ppuRC2C05_protection );
1266	1266
1267	1267	/* common init */
1268	1268	init_vsnes(machine);
r4679	r4680
1273	1273
1274	1274	static WRITE8_HANDLER( vstennis_vrom_banking )
1275	1275	{
1276		const device_config *other_cpu = (space->cpu == space->machine->cpu[0]) ? space->machine->cpu[1] : space->machine->cpu[0];
	1276	const device_config *other_cpu = (space->cpu == cputag_get_cpu(space->machine, "maincpu")) ? cputag_get_cpu(space->machine, "sub") : cputag_get_cpu(space->machine, "maincpu");
1277	1277	const device_config *ppu1 = devtag_get_device(space->machine, "ppu1");
1278	1278	const device_config *ppu2 = devtag_get_device(space->machine, "ppu2");
1279	1279
1280	1280	/* switch vrom */
1281		ppu2c0x_set_videorom_bank( (space->cpu == space->machine->cpu[0]) ? ppu1 : ppu2, 0, 8, ( data & 4 ) ? 1 : 0, 512 );
	1281	ppu2c0x_set_videorom_bank( (space->cpu == cputag_get_cpu(space->machine, "maincpu")) ? ppu1 : ppu2, 0, 8, ( data & 4 ) ? 1 : 0, 512 );
1282	1282
1283	1283	/* bit 1 ( data & 2 ) triggers irq on the other cpu */
1284	1284	cpu_set_input_line(other_cpu, 0, ( data & 2 ) ? CLEAR_LINE : ASSERT_LINE );
1285	1285
1286	1286	/* move along */
1287		if (space->cpu == space->machine->cpu[0])
	1287	if (space->cpu == cputag_get_cpu(space->machine, "maincpu"))
1288	1288	vsnes_in0_w( space, offset, data );
1289	1289	else
1290	1290	vsnes_in0_1_w( space, offset, data );
r4679	r4680
1295	1295	UINT8 *prg = memory_region( machine, "maincpu" );
1296	1296
1297	1297	/* vrom switching is enabled with bit 2 of $4016 */
1298		memory_install_write8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x4016, 0x4016, 0, 0, vstennis_vrom_banking );
1299		memory_install_write8_handler(cpu_get_address_space(machine->cpu[1], ADDRESS_SPACE_PROGRAM), 0x4016, 0x4016, 0, 0, vstennis_vrom_banking );
	1298	memory_install_write8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x4016, 0x4016, 0, 0, vstennis_vrom_banking );
	1299	memory_install_write8_handler(cputag_get_address_space(machine, "sub", ADDRESS_SPACE_PROGRAM), 0x4016, 0x4016, 0, 0, vstennis_vrom_banking );
1300	1300
1301	1301	/* shared ram at $6000 */
1302		memory_install_readwrite8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x6000, 0x7fff, 0, 0, SMH_BANK1, SMH_BANK1 );
1303		memory_install_readwrite8_handler(cpu_get_address_space(machine->cpu[1], ADDRESS_SPACE_PROGRAM), 0x6000, 0x7fff, 0, 0, SMH_BANK1, SMH_BANK1 );
	1302	memory_install_readwrite8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x6000, 0x7fff, 0, 0, (read8_space_func)SMH_BANK(1), (write8_space_func)SMH_BANK(1) );
	1303	memory_install_readwrite8_handler(cputag_get_address_space(machine, "sub", ADDRESS_SPACE_PROGRAM), 0x6000, 0x7fff, 0, 0, (read8_space_func)SMH_BANK(1), (write8_space_func)SMH_BANK(1) );
1304	1304
1305	1305	memory_set_bankptr(machine, 1, &prg[0x6000]);
1306	1306	}
r4679	r4680
1370	1370	DRIVER_INIT( vstetris )
1371	1371	{
1372	1372	/* extra ram at $6000 is enabled with bit 1 of $4016 */
1373		memory_install_readwrite8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x6000, 0x7fff, 0, 0, SMH_BANK1, SMH_BANK1 );
1374		memory_set_bankptr(machine, 1, auto_malloc(0x2000));
	1373	memory_install_readwrite8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x6000, 0x7fff, 0, 0, (read8_space_func)SMH_BANK(1), (write8_space_func)SMH_BANK(1) );
	1374	memory_set_bankptr(machine, 1, auto_alloc_array(machine, UINT8, 0x2000));
1375	1375
1376	1376	init_vsnes(machine);
1377	1377	DRIVER_INIT_CALL(vsnormal);

src/mame/machine/qix.c

r4679	r4680
226	226
227	227	MACHINE_RESET( qix )
228	228	{
229		qix_state *state = machine->driver_data;
	229	qix_state *state = (qix_state *)machine->driver_data;
230	230
231	231	/* reset the coin counter register */
232	232	state->coinctrl = 0x00;
r4679	r4680
235	235
236	236	MACHINE_START( qixmcu )
237	237	{
238		qix_state *state = machine->driver_data;
	238	qix_state *state = (qix_state *)machine->driver_data;
239	239
240	240	/* set up save states */
241	241	state_save_register_global_array(machine, state->_68705_port_in);
r4679	r4680
347	347
348	348	READ8_DEVICE_HANDLER( qixmcu_coin_r )
349	349	{
350		qix_state *state = device->machine->driver_data;
	350	qix_state *state = (qix_state *)device->machine->driver_data;
351	351
352	352	logerror("6809:qixmcu_coin_r = %02X\n", state->_68705_port_out[0]);
353	353	return state->_68705_port_out[0];
r4679	r4680
356	356
357	357	static WRITE8_DEVICE_HANDLER( qixmcu_coin_w )
358	358	{
359		qix_state *state = device->machine->driver_data;
	359	qix_state *state = (qix_state *)device->machine->driver_data;
360	360
361	361	logerror("6809:qixmcu_coin_w = %02X\n", data);
362	362	/* this is a callback called by pia6821_w(), so I don't need to synchronize */
r4679	r4680
367	367
368	368	static WRITE8_DEVICE_HANDLER( qixmcu_coinctrl_w )
369	369	{
370		qix_state *state = device->machine->driver_data;
	370	qix_state *state = (qix_state *)device->machine->driver_data;
371	371
372	372	/* if (!(data & 0x04)) */
373	373	if (data & 0x04)
r4679	r4680
396	396
397	397	READ8_HANDLER( qix_68705_portA_r )
398	398	{
399		qix_state *state = space->machine->driver_data;
	399	qix_state *state = (qix_state *)space->machine->driver_data;
400	400
401	401	UINT8 ddr = state->_68705_ddr[0];
402	402	UINT8 out = state->_68705_port_out[0];
r4679	r4680
408	408
409	409	READ8_HANDLER( qix_68705_portB_r )
410	410	{
411		qix_state *state = space->machine->driver_data;
	411	qix_state *state = (qix_state *)space->machine->driver_data;
412	412
413	413	UINT8 ddr = state->_68705_ddr[1];
414	414	UINT8 out = state->_68705_port_out[1];
r4679	r4680
419	419
420	420	READ8_HANDLER( qix_68705_portC_r )
421	421	{
422		qix_state *state = space->machine->driver_data;
	422	qix_state *state = (qix_state *)space->machine->driver_data;
423	423
424	424	UINT8 ddr = state->_68705_ddr[2];
425	425	UINT8 out = state->_68705_port_out[2];
r4679	r4680
437	437
438	438	WRITE8_HANDLER( qix_68705_portA_w )
439	439	{
440		qix_state *state = space->machine->driver_data;
	440	qix_state *state = (qix_state *)space->machine->driver_data;
441	441
442	442	logerror("68705:portA_w = %02X\n", data);
443	443	state->_68705_port_out[0] = data;
r4679	r4680
446	446
447	447	WRITE8_HANDLER( qix_68705_portB_w )
448	448	{
449		qix_state *state = space->machine->driver_data;
	449	qix_state *state = (qix_state *)space->machine->driver_data;
450	450
451	451	state->_68705_port_out[1] = data;
452	452	coin_lockout_w(0, (~data >> 6) & 1);
r4679	r4680
456	456
457	457	WRITE8_HANDLER( qix_68705_portC_w )
458	458	{
459		qix_state *state = space->machine->driver_data;
	459	qix_state *state = (qix_state *)space->machine->driver_data;
460	460
461	461	state->_68705_port_out[2] = data;
462	462	}
r4679	r4680
536	536
537	537	static READ8_DEVICE_HANDLER( slither_trak_lr_r )
538	538	{
539		qix_state *state = device->machine->driver_data;
	539	qix_state *state = (qix_state *)device->machine->driver_data;
540	540
541	541	return input_port_read(device->machine, state->flip ? "AN3" : "AN1");
542	542	}
r4679	r4680
544	544
545	545	static READ8_DEVICE_HANDLER( slither_trak_ud_r )
546	546	{
547		qix_state *state = device->machine->driver_data;
	547	qix_state *state = (qix_state *)device->machine->driver_data;
548	548
549	549	return input_port_read(device->machine, state->flip ? "AN2" : "AN0");
550	550	}

src/mame/machine/mexico86.c

r4679	r4680
22	22	*/
23	23	WRITE8_HANDLER( mexico86_f008_w )
24	24	{
25		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_RESET, (data & 4) ? CLEAR_LINE : ASSERT_LINE);
26		if (space->machine->cpu[2] != NULL)
	25	cputag_set_input_line(space->machine, "audiocpu", INPUT_LINE_RESET, (data & 4) ? CLEAR_LINE : ASSERT_LINE);
	26	if (cputag_get_cpu(space->machine, "mcu") != NULL)
27	27	{
28	28	// mexico 86, knight boy
29		cpu_set_input_line(space->machine->cpu[2], INPUT_LINE_RESET, (data & 2) ? CLEAR_LINE : ASSERT_LINE);
	29	cputag_set_input_line(space->machine, "mcu", INPUT_LINE_RESET, (data & 2) ? CLEAR_LINE : ASSERT_LINE);
30	30	}
31	31	else
32	32	{
r4679	r4680
318	318	}
319	319	if ((ddrB & 0x20) && (data & 0x20) && (~portB_out & 0x20))
320	320	{
321		cpu_set_input_line_vector(space->machine->cpu[0],0,mexico86_protection_ram[0]);
322		cpu_set_input_line(space->machine->cpu[0], 0, HOLD_LINE); //AT: HOLD_LINE works better in Z80 interrupt mode 1.
	321	cpu_set_input_line_vector(cputag_get_cpu(space->machine, "maincpu"), 0, mexico86_protection_ram[0]);
	322	cputag_set_input_line(space->machine, "maincpu", 0, HOLD_LINE); //AT: HOLD_LINE works better in Z80 interrupt mode 1.
323	323	}
324	324	if ((ddrB & 0x40) && (~data & 0x40) && (portB_out & 0x40))
325	325	{

src/mame/machine/snes.c

r4679	r4680
81	81	static TIMER_CALLBACK( snes_nmi_tick )
82	82	{
83	83	// pull NMI
84		cpu_set_input_line(machine->cpu[0], G65816_LINE_NMI, HOLD_LINE );
	84	cputag_set_input_line(machine, "maincpu", G65816_LINE_NMI, HOLD_LINE );
85	85
86	86	// don't happen again
87	87	timer_adjust_oneshot(snes_nmi_timer, attotime_never, 0);
r4679	r4680
93	93	// (don't need to switch to the 65816 context, we don't do anything dependant on it)
94	94	snes_latch_counters(machine);
95	95	snes_ram[TIMEUP] = 0x80;   /* Indicate that irq occured */
96		cpu_set_input_line(machine->cpu[0], G65816_LINE_IRQ, HOLD_LINE );
	96	cputag_set_input_line(machine, "maincpu", G65816_LINE_IRQ, HOLD_LINE );
97	97
98	98	// don't happen again
99	99	timer_adjust_oneshot(snes_hirq_timer, attotime_never, 0);
r4679	r4680
107	107	static TIMER_CALLBACK( snes_scanline_tick )
108	108	{
109	109	// make sure we're in the 65816's context since we're messing with the OAM and stuff
110		const address_space *space = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM);
	110	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
111	111
112	112	/* Increase current line - we want to latch on this line during it, not after it */
113	113	snes_ppu.beam.current_vert = video_screen_get_vpos(machine->primary_screen);
r4679	r4680
123	123	snes_ram[TIMEUP] = 0x80;   /* Indicate that irq occured */
124	124	// IRQ latches the counters, do it now
125	125	snes_latch_counters(machine);
126		cpu_set_input_line(machine->cpu[0], G65816_LINE_IRQ, HOLD_LINE );
	126	cputag_set_input_line(machine, "maincpu", G65816_LINE_IRQ, HOLD_LINE );
127	127	}
128	128	}
129	129	/* Horizontal IRQ timer */
r4679	r4680
169	169	if( snes_ram[NMITIMEN] & 0x80 )   /* NMI only signaled if this bit set */
170	170	{
171	171	// NMI goes off about 12 cycles after this (otherwise Chrono Trigger, NFL QB Club, etc. lock up)
172		timer_adjust_oneshot(snes_nmi_timer, cpu_clocks_to_attotime(machine->cpu[0], 12), 0);
	172	timer_adjust_oneshot(snes_nmi_timer, cputag_clocks_to_attotime(machine, "maincpu", 12), 0);
173	173	}
174	174	}
175	175
r4679	r4680
229	229	snes_ram[STAT77] &= 0x3f;      /* Clear Time Over and Range Over bits */
230	230	snes_ram[STAT78] ^= 0x80;      /* Toggle field flag */
231	231
232		cpu_set_input_line(machine->cpu[0], G65816_LINE_NMI, CLEAR_LINE );
	232	cputag_set_input_line(machine, "maincpu", G65816_LINE_NMI, CLEAR_LINE );
233	233	}
234	234
235	235	timer_adjust_oneshot(snes_scanline_timer, attotime_never, 0);
r4679	r4680
239	239	/* This is called at the start of hblank *before* the scanline indicated in current_vert! */
240	240	static TIMER_CALLBACK( snes_hblank_tick )
241	241	{
242		const address_space *cpu0space = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM);
	242	const address_space *cpu0space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
243	243	int nextscan;
244	244
245	245	snes_ppu.beam.current_vert = video_screen_get_vpos(machine->primary_screen);
r4679	r4680
1036	1036	case MEMSEL:   /* Access cycle designation in memory (2) area */
1037	1037	/* FIXME: Need to adjust the speed only during access of banks 0x80+
1038	1038	* Currently we are just increasing it no matter what */
1039		//          cpu_set_clockscale(space->machine->cpu[0], (data & 0x1) ? 1.335820896 : 1.0 );
	1039	//          cpu_set_clockscale(cputag_get_cpu(space->machine, "maincpu"), (data & 0x1) ? 1.335820896 : 1.0 );
1040	1040	#ifdef SNES_DBG_REG_W
1041	1041	if( (data & 0x1) != (snes_ram[MEMSEL] & 0x1) )
1042	1042	mame_printf_debug( "CPU speed: %f Mhz\n", (data & 0x1) ? 3.58 : 2.68 );
r4679	r4680
1519	1519
1520	1520	static void snes_init_ram(running_machine *machine)
1521	1521	{
1522		const address_space *cpu0space = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM);
	1522	const address_space *cpu0space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
1523	1523	int i;
1524	1524
1525	1525	/* Init DSP1 */
r4679	r4680
1631	1631
1632	1632	MACHINE_START( snes )
1633	1633	{
1634		snes_vram = auto_malloc(SNES_VRAM_SIZE);
1635		snes_cgram = auto_malloc(SNES_CGRAM_SIZE);
1636		snes_oam = auto_malloc(SNES_OAM_SIZE);
1637		memory_set_direct_update_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), snes_direct);
1638		memory_set_direct_update_handler(cpu_get_address_space(machine->cpu[1], ADDRESS_SPACE_PROGRAM), spc_direct);
	1634	snes_vram = auto_alloc_array(machine, UINT8, SNES_VRAM_SIZE);
	1635	snes_cgram = auto_alloc_array(machine, UINT16, SNES_CGRAM_SIZE/2);
	1636	snes_oam = auto_alloc_array(machine, UINT16, SNES_OAM_SIZE/2);
	1637	memory_set_direct_update_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), snes_direct);
	1638	memory_set_direct_update_handler(cputag_get_address_space(machine, "soundcpu", ADDRESS_SPACE_PROGRAM), spc_direct);
1639	1639
1640	1640	// power-on sets these registers like this
1641	1641	snes_ram[WRIO] = 0xff;
r4679	r4680
1668	1668	/* for mame we use an init, maybe we will need more for the different games */
1669	1669	DRIVER_INIT( snes )
1670	1670	{
1671		const address_space *space = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM);
	1671	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
1672	1672	UINT16 total_blocks, read_blocks;
1673	1673	UINT8  *rom;
1674	1674
1675	1675	rom = memory_region(machine, "user3");
1676		snes_ram = auto_malloc(0x1000000);
	1676	snes_ram = auto_alloc_array(machine, UINT8, 0x1000000);
1677	1677	memset(snes_ram, 0, 0x1000000);
1678	1678
1679	1679	/* all NSS games seem to use MODE 20 */
r4679	r4680
1734	1734
1735	1735	DRIVER_INIT( snes_hirom )
1736	1736	{
1737		const address_space *space = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM);
	1737	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
1738	1738	UINT16 total_blocks, read_blocks;
1739	1739	UINT8  *rom;
1740	1740
1741	1741	rom = memory_region(machine, "user3");
1742		snes_ram = auto_malloc(0x1000000);
	1742	snes_ram = auto_alloc_array(machine, UINT8, 0x1000000);
1743	1743	memset(snes_ram, 0, 0x1000000);
1744	1744
1745	1745	snes_cart.mode = SNES_MODE_21;

src/mame/machine/mc8123.c

r4679	r4680
377	377	void mc8123_decrypt_rom(running_machine *machine, const char *cpu, const char *keyrgn, int banknum, int numbanks)
378	378	{
379	379	const address_space *space = cputag_get_address_space(machine, cpu, ADDRESS_SPACE_PROGRAM);
380		UINT8 *decrypted1 = auto_malloc(numbanks == 1 ? 0xc000 : 0x8000);
381		UINT8 *decrypted2 = numbanks > 1 ? auto_malloc(0x4000 * numbanks) : decrypted1 + 0x8000;
	380	UINT8 *decrypted1 = auto_alloc_array(machine, UINT8, numbanks == 1 ? 0xc000 : 0x8000);
	381	UINT8 *decrypted2 = numbanks > 1 ? auto_alloc_array(machine, UINT8, 0x4000 * numbanks) : decrypted1 + 0x8000;
382	382	UINT8 *rom = memory_region(machine, cpu);
383	383	UINT8 *key = memory_region(machine, keyrgn);
384	384	int A, bank;

src/mame/machine/taitosj.c

r4679	r4680
44	44
45	45	MACHINE_RESET( taitosj )
46	46	{
47		const address_space *space = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM);
	47	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
48	48	/* set the default ROM bank (many games only have one bank and */
49	49	/* never write to the bank selector register) */
50	50	taitosj_bankswitch_w(space, 0, 0);
r4679	r4680
53	53	zaccept = 1;
54	54	zready = 0;
55	55	busreq = 0;
56		if (machine->cpu[2] != NULL)
57		cpu_set_input_line(machine->cpu[2],0,CLEAR_LINE);
	56	if (cputag_get_cpu(machine, "mcu") != NULL)
	57	cputag_set_input_line(machine, "mcu", 0, CLEAR_LINE);
58	58
59	59	spacecr_prot_value = 0;
60	60	}
r4679	r4680
113	113	static TIMER_CALLBACK( taitosj_mcu_real_data_w )
114	114	{
115	115	zready = 1;
116		cpu_set_input_line(machine->cpu[2],0,ASSERT_LINE);
	116	cputag_set_input_line(machine, "mcu", 0, ASSERT_LINE);
117	117	fromz80 = param;
118	118	}
119	119
r4679	r4680
189	189
190	190	WRITE8_HANDLER( taitosj_68705_portB_w )
191	191	{
192		LOG(("%04x: 68705 port B write %02x\n",cpu_get_pc(space->cpu),data));
	192	LOG(("%04x: 68705 port B write %02x\n", cpu_get_pc(space->cpu), data));
193	193
194	194	if (~data & 0x01)
195	195	{
196		LOG(("%04x: 68705  68INTRQ **NOT SUPPORTED**!\n",cpu_get_pc(space->cpu)));
	196	LOG(("%04x: 68705  68INTRQ **NOT SUPPORTED**!\n", cpu_get_pc(space->cpu)));
197	197	}
198	198	if (~data & 0x02)
199	199	{
200	200	/* 68705 is going to read data from the Z80 */
201		timer_call_after_resynch(space->machine, NULL, 0,taitosj_mcu_data_real_r);
202		cpu_set_input_line(space->machine->cpu[2],0,CLEAR_LINE);
	201	timer_call_after_resynch(space->machine, NULL, 0, taitosj_mcu_data_real_r);
	202	cputag_set_input_line(space->machine, "mcu", 0, CLEAR_LINE);
203	203	portA_in = fromz80;
204		LOG(("%04x: 68705 <- Z80 %02x\n",cpu_get_pc(space->cpu),portA_in));
	204	LOG(("%04x: 68705 <- Z80 %02x\n", cpu_get_pc(space->cpu), portA_in));
205	205	}
206	206	if (~data & 0x08)
207	207	busreq = 1;
r4679	r4680
209	209	busreq = 0;
210	210	if (~data & 0x04)
211	211	{
212		LOG(("%04x: 68705 -> Z80 %02x\n",cpu_get_pc(space->cpu),portA_out));
	212	LOG(("%04x: 68705 -> Z80 %02x\n", cpu_get_pc(space->cpu), portA_out));
213	213
214	214	/* 68705 is writing data for the Z80 */
215		timer_call_after_resynch(space->machine, NULL, portA_out,taitosj_mcu_status_real_w);
	215	timer_call_after_resynch(space->machine, NULL, portA_out, taitosj_mcu_status_real_w);
216	216	}
217	217	if (~data & 0x10)
218	218	{
219		const address_space *cpu0space = cpu_get_address_space(space->machine->cpu[0], ADDRESS_SPACE_PROGRAM);
220		LOG(("%04x: 68705 write %02x to address %04x\n",cpu_get_pc(space->cpu),portA_out,address));
	219	const address_space *cpu0space = cputag_get_address_space(space->machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	220	LOG(("%04x: 68705 write %02x to address %04x\n",cpu_get_pc(space->cpu), portA_out, address));
221	221
222	222	memory_write_byte(cpu0space, address, portA_out);
223	223
r4679	r4680
226	226	}
227	227	if (~data & 0x20)
228	228	{
229		const address_space *cpu0space = cpu_get_address_space(space->machine->cpu[0], ADDRESS_SPACE_PROGRAM);
	229	const address_space *cpu0space = cputag_get_address_space(space->machine, "maincpu", ADDRESS_SPACE_PROGRAM);
230	230	portA_in = memory_read_byte(cpu0space, address);
231		LOG(("%04x: 68705 read %02x from address %04x\n",cpu_get_pc(space->cpu),portA_in,address));
	231	LOG(("%04x: 68705 read %02x from address %04x\n", cpu_get_pc(space->cpu), portA_in, address));
232	232	}
233	233	if (~data & 0x40)
234	234	{
235		LOG(("%04x: 68705 address low %02x\n",cpu_get_pc(space->cpu),portA_out));
	235	LOG(("%04x: 68705 address low %02x\n", cpu_get_pc(space->cpu), portA_out));
236	236	address = (address & 0xff00) | portA_out;
237	237	}
238	238	if (~data & 0x80)
239	239	{
240		LOG(("%04x: 68705 address high %02x\n",cpu_get_pc(space->cpu),portA_out));
	240	LOG(("%04x: 68705 address high %02x\n", cpu_get_pc(space->cpu), portA_out));
241	241	address = (address & 0x00ff) | (portA_out << 8);
242	242	}
243	243	}

src/mame/machine/amiga.c

r4679	r4680
300	300
301	301	MACHINE_RESET( amiga )
302	302	{
303		//  const address_space *space = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM);
304
305	303	/* set m68k reset  function */
306		device_set_info_fct(machine->cpu[0], CPUINFO_FCT_M68K_RESET_CALLBACK, (genf *)amiga_m68k_reset);
	304	m68k_set_reset_callback(cputag_get_cpu(machine, "maincpu"), amiga_m68k_reset);
307	305
308		amiga_m68k_reset(machine->cpu[0]);
	306	amiga_m68k_reset(cputag_get_cpu(machine, "maincpu"));
309	307
310	308	/* call the system-specific callback */
311	309	if (amiga_intf->reset_callback)
r4679	r4680
333	331	if (scanline == 0)
334	332	{
335	333	/* signal VBLANK IRQ */
336		amiga_custom_w(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), REG_INTREQ, 0x8000 | INTENA_VERTB, 0xffff);
	334	amiga_custom_w(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), REG_INTREQ, 0x8000 | INTENA_VERTB, 0xffff);
337	335
338	336	/* clock the first CIA TOD */
339	337	cia_clock_tod(cia_0);
r4679	r4680
379	377	if (CUSTOM_REG(REG_INTENA) & 0x4000)
380	378	{
381	379	/* Serial transmit buffer empty, disk block finished, software interrupts */
382		cpu_set_input_line(machine->cpu[0], 1, ints & 0x0007 ? ASSERT_LINE : CLEAR_LINE);
	380	cputag_set_input_line(machine, "maincpu", 1, ints & 0x0007 ? ASSERT_LINE : CLEAR_LINE);
383	381
384	382	/* I/O ports and timer interrupts */
385		cpu_set_input_line(machine->cpu[0], 2, ints & 0x0008 ? ASSERT_LINE : CLEAR_LINE);
	383	cputag_set_input_line(machine, "maincpu", 2, ints & 0x0008 ? ASSERT_LINE : CLEAR_LINE);
386	384
387	385	/* Copper, VBLANK, blitter interrupts */
388		cpu_set_input_line(machine->cpu[0], 3, ints & 0x0070 ? ASSERT_LINE : CLEAR_LINE);
	386	cputag_set_input_line(machine, "maincpu", 3, ints & 0x0070 ? ASSERT_LINE : CLEAR_LINE);
389	387
390	388	/* Audio interrupts */
391		cpu_set_input_line(machine->cpu[0], 4, ints & 0x0780 ? ASSERT_LINE : CLEAR_LINE);
	389	cputag_set_input_line(machine, "maincpu", 4, ints & 0x0780 ? ASSERT_LINE : CLEAR_LINE);
392	390
393	391	/* Serial receive buffer full, disk sync match */
394		cpu_set_input_line(machine->cpu[0], 5, ints & 0x1800 ? ASSERT_LINE : CLEAR_LINE);
	392	cputag_set_input_line(machine, "maincpu", 5, ints & 0x1800 ? ASSERT_LINE : CLEAR_LINE);
395	393
396	394	/* External interrupts */
397		cpu_set_input_line(machine->cpu[0], 6, ints & 0x2000 ? ASSERT_LINE : CLEAR_LINE);
	395	cputag_set_input_line(machine, "maincpu", 6, ints & 0x2000 ? ASSERT_LINE : CLEAR_LINE);
398	396	}
399	397	else
400	398	{
401		cpu_set_input_line(machine->cpu[0], 1, CLEAR_LINE);
402		cpu_set_input_line(machine->cpu[0], 2, CLEAR_LINE);
403		cpu_set_input_line(machine->cpu[0], 3, CLEAR_LINE);
404		cpu_set_input_line(machine->cpu[0], 4, CLEAR_LINE);
405		cpu_set_input_line(machine->cpu[0], 5, CLEAR_LINE);
406		cpu_set_input_line(machine->cpu[0], 6, CLEAR_LINE);
	399	cputag_set_input_line(machine, "maincpu", 1, CLEAR_LINE);
	400	cputag_set_input_line(machine, "maincpu", 2, CLEAR_LINE);
	401	cputag_set_input_line(machine, "maincpu", 3, CLEAR_LINE);
	402	cputag_set_input_line(machine, "maincpu", 4, CLEAR_LINE);
	403	cputag_set_input_line(machine, "maincpu", 5, CLEAR_LINE);
	404	cputag_set_input_line(machine, "maincpu", 6, CLEAR_LINE);
407	405	}
408	406	}
409	407
r4679	r4680
424	422
425	423	CUSTOM_INPUT( amiga_joystick_convert )
426	424	{
427		UINT8 bits = input_port_read(field->port->machine, param);
	425	UINT8 bits = input_port_read(field->port->machine, (const char *)param);
428	426	int up = (bits >> 0) & 1;
429	427	int down = (bits >> 1) & 1;
430	428	int left = (bits >> 2) & 1;
r4679	r4680
944	942	CUSTOM_REG(REG_DMACON) &= ~0x4000;
945	943
946	944	/* signal an interrupt */
947		amiga_custom_w(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), REG_INTREQ, 0x8000 | INTENA_BLIT, 0xffff);
	945	amiga_custom_w(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), REG_INTREQ, 0x8000 | INTENA_BLIT, 0xffff);
948	946
949	947	/* reset the blitter timer */
950	948	timer_reset( amiga_blitter_timer, attotime_never);
r4679	r4680
1098	1096
1099	1097	void amiga_cia_0_irq(const device_config *device, int state)
1100	1098	{
1101		amiga_custom_w(cpu_get_address_space(device->machine->cpu[0], ADDRESS_SPACE_PROGRAM), REG_INTREQ, (state ? 0x8000 : 0x0000) | INTENA_PORTS, 0xffff);
	1099	amiga_custom_w(cputag_get_address_space(device->machine, "maincpu", ADDRESS_SPACE_PROGRAM), REG_INTREQ, (state ? 0x8000 : 0x0000) | INTENA_PORTS, 0xffff);
1102	1100	}
1103	1101
1104	1102
1105	1103	void amiga_cia_1_irq(const device_config *device, int state)
1106	1104	{
1107		amiga_custom_w(cpu_get_address_space(device->machine->cpu[0], ADDRESS_SPACE_PROGRAM), REG_INTREQ, (state ? 0x8000 : 0x0000) | INTENA_EXTER, 0xffff);
	1105	amiga_custom_w(cputag_get_address_space(device->machine, "maincpu", ADDRESS_SPACE_PROGRAM), REG_INTREQ, (state ? 0x8000 : 0x0000) | INTENA_EXTER, 0xffff);
1108	1106	}
1109	1107
1110	1108
r4679	r4680
1117	1115
1118	1116	static void custom_reset(running_machine *machine)
1119	1117	{
1120		int clock = cpu_get_clock(machine->cpu[0]);
	1118	int clock = cputag_get_clock(machine, "maincpu");
1121	1119	UINT16   vidmode = (clock == AMIGA_68000_NTSC_CLOCK || clock == AMIGA_68EC020_NTSC_CLOCK ) ? 0x1000 : 0x0000; /* NTSC or PAL? */
1122	1120
1123	1121	CUSTOM_REG(REG_DDFSTRT) = 0x18;
r4679	r4680
1260	1258	CUSTOM_REG(REG_SERDATR) |= 0x3000;
1261	1259
1262	1260	/* signal an interrupt */
1263		amiga_custom_w(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), REG_INTREQ, 0x8000 | INTENA_TBE, 0xffff);
	1261	amiga_custom_w(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), REG_INTREQ, 0x8000 | INTENA_TBE, 0xffff);
1264	1262	}
1265	1263
1266	1264
r4679	r4680
1436	1434	CUSTOM_REG(offset) = data;
1437	1435
1438	1436	if ( temp & 0x8000  ) /* if we're generating irq's, delay a bit */
1439		timer_adjust_oneshot( amiga_irq_timer, cpu_clocks_to_attotime( space->machine->cpu[0], AMIGA_IRQ_DELAY_CYCLES ), 0);
	1437	timer_adjust_oneshot( amiga_irq_timer, cputag_clocks_to_attotime(space->machine, "maincpu", AMIGA_IRQ_DELAY_CYCLES ), 0);
1440	1438	else /* if we're clearing irq's, process right away */
1441	1439	update_irqs(space->machine);
1442	1440	break;
r4679	r4680
1511	1509
1512	1510	void amiga_serial_in_w(running_machine *machine, UINT16 data)
1513	1511	{
1514		const address_space *space = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM);
	1512	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
1515	1513	int mask = (CUSTOM_REG(REG_SERPER) & 0x8000) ? 0x1ff : 0xff;
1516	1514
1517	1515	/* copy the data to the low 8 bits of SERDATR and set RBF */
r4679	r4680
1533	1531	attotime amiga_get_serial_char_period(running_machine *machine)
1534	1532	{
1535	1533	UINT32 divisor = (CUSTOM_REG(REG_SERPER) & 0x7fff) + 1;
1536		UINT32 baud = cpu_get_clock(machine->cpu[0]) / 2 / divisor;
	1534	UINT32 baud = cputag_get_clock(machine, "maincpu") / 2 / divisor;
1537	1535	UINT32 numbits = 2 + ((CUSTOM_REG(REG_SERPER) & 0x8000) ? 9 : 8);
1538	1536	return attotime_mul(ATTOTIME_IN_HZ(baud), numbits);
1539	1537	}
r4679	r4680
1555	1553	assert_always((device->size & (device->size - 1)) == 0, "device->size must be power of 2!");
1556	1554
1557	1555	/* allocate memory and link it in at the end of the list */
1558		dev = auto_malloc(sizeof(*dev));
	1556	dev = auto_alloc(machine, autoconfig_device);
1559	1557	dev->next = NULL;
1560	1558	for (d = &autoconfig_list; *d; d = &(*d)->next) ;
1561	1559	*d = dev;

src/mame/machine/vertigo.c

r4679	r4680
77	77	static void update_irq(running_machine *machine)
78	78	{
79	79	if (irq_state < 7)
80		cpu_set_input_line(machine->cpu[0], irq_state ^ 7, CLEAR_LINE);
	80	cputag_set_input_line(machine, "maincpu", irq_state ^ 7, CLEAR_LINE);
81	81
82	82	irq_state = TTL74148_output_r(0);
83	83
84	84	if (irq_state < 7)
85		cpu_set_input_line(machine->cpu[0], irq_state ^ 7, ASSERT_LINE);
	85	cputag_set_input_line(machine, "maincpu", irq_state ^ 7, ASSERT_LINE);
86	86	}
87	87
88	88
r4679	r4680
96	96	static PIT8253_OUTPUT_CHANGED( v_irq4_w )
97	97	{
98	98	update_irq_encoder(device->machine, INPUT_LINE_IRQ4, state);
99		vertigo_vproc(cpu_attotime_to_clocks(device->machine->cpu[0], attotime_sub(timer_get_time(device->machine), irq4_time)), state);
	99	vertigo_vproc(cputag_attotime_to_clocks(device->machine, "maincpu", attotime_sub(timer_get_time(device->machine), irq4_time)), state);
100	100	irq4_time = timer_get_time(device->machine);
101	101	}
102	102
r4679	r4680
104	104	static PIT8253_OUTPUT_CHANGED( v_irq3_w )
105	105	{
106	106	if (state)
107		cpu_set_input_line(device->machine->cpu[1], INPUT_LINE_IRQ0, ASSERT_LINE);
	107	cputag_set_input_line(device->machine, "audiocpu", INPUT_LINE_IRQ0, ASSERT_LINE);
108	108
109	109	update_irq_encoder(device->machine, INPUT_LINE_IRQ3, state);
110	110	}
r4679	r4680
164	164	{
165	165	/* Reset sound cpu */
166	166	if ((data & 2) == 0)
167		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_RESET, ASSERT_LINE);
	167	cputag_set_input_line(space->machine, "audiocpu", INPUT_LINE_RESET, ASSERT_LINE);
168	168	else
169		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_RESET, CLEAR_LINE);
	169	cputag_set_input_line(space->machine, "audiocpu", INPUT_LINE_RESET, CLEAR_LINE);
170	170	}
171	171
172	172
r4679	r4680
174	174	{
175	175	exidy440_sound_command = param;
176	176	exidy440_sound_command_ack = 0;
177		cpu_set_input_line(machine->cpu[1], INPUT_LINE_IRQ1, ASSERT_LINE);
	177	cputag_set_input_line(machine, "audiocpu", INPUT_LINE_IRQ1, ASSERT_LINE);
178	178
179	179	/* It is important that the sound cpu ACKs the sound command
180	180	quickly. Otherwise the main CPU gives up with sound. Boosting

src/mame/machine/lkage.c

r4679	r4680
68	68	if ((ddrB & 0x02) && (~data & 0x02) && (portB_out & 0x02))
69	69	{
70	70	portA_in = from_main;
71		if (main_sent) cpu_set_input_line(space->machine->cpu[2],0,CLEAR_LINE);
	71	if (main_sent) cputag_set_input_line(space->machine, "mcu", 0, CLEAR_LINE);
72	72	main_sent = 0;
73	73	logerror("read command %02x from main cpu\n",portA_in);
74	74	}
r4679	r4680
116	116	logerror("%04x: mcu_w %02x\n",cpu_get_pc(space->cpu),data);
117	117	from_main = data;
118	118	main_sent = 1;
119		cpu_set_input_line(space->machine->cpu[2],0,ASSERT_LINE);
	119	cputag_set_input_line(space->machine, "mcu", 0, ASSERT_LINE);
120	120	}
121	121
122	122	READ8_HANDLER( lkage_mcu_r )

src/mame/machine/neoprot.c

r4679	r4680
104	104	{
105	105	/* the protection involves reading and writing addresses in the */
106	106	/* 0x2xxxxx range. There are several checks all around the code. */
107		memory_install_readwrite16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x200000, 0x2fffff, 0, 0, fatfury2_protection_16_r, fatfury2_protection_16_w);
	107	memory_install_readwrite16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x200000, 0x2fffff, 0, 0, fatfury2_protection_16_r, fatfury2_protection_16_w);
108	108
109	109	state_save_register_global(machine, fatfury2_prot_data);
110	110	}
r4679	r4680
146	146	/* when 0x20aaaa contains 0x0090 (word) then 0x100 (normally the neogeo header) should return 0x00c200fd
147	147	worked out using real hw */
148	148
149		memory_install_write16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x20aaaa, 0x20aaab, 0, 0, kof98_prot_w);
	149	memory_install_write16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x20aaaa, 0x20aaab, 0, 0, kof98_prot_w);
150	150	}
151	151
152	152
r4679	r4680
402	402	{
403	403	state_save_register_global(machine, neogeo_rng);
404	404
405		memory_install_read16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), addr1, addr1 + 1, 0, 0, sma_random_r);
406		memory_install_read16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), addr2, addr2 + 1, 0, 0, sma_random_r);
	405	memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), addr1, addr1 + 1, 0, 0, sma_random_r);
	406	memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), addr2, addr2 + 1, 0, 0, sma_random_r);
407	407	}
408	408
409	409
410	410	void kof99_install_protection(running_machine *machine)
411	411	{
412		memory_install_write16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x2ffff0, 0x2ffff1, 0, 0, kof99_bankswitch_w);
413		memory_install_read16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x2fe446, 0x2fe447, 0, 0, prot_9a37_r);
	412	memory_install_write16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x2ffff0, 0x2ffff1, 0, 0, kof99_bankswitch_w);
	413	memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x2fe446, 0x2fe447, 0, 0, prot_9a37_r);
414	414
415	415	sma_install_random_read_handler(machine, 0x2ffff8, 0x2ffffa);
416	416	}
r4679	r4680
418	418
419	419	void garou_install_protection(running_machine *machine)
420	420	{
421		memory_install_write16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x2fffc0, 0x2fffc1, 0, 0, garou_bankswitch_w);
422		memory_install_read16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x2fe446, 0x2fe447, 0, 0, prot_9a37_r);
	421	memory_install_write16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x2fffc0, 0x2fffc1, 0, 0, garou_bankswitch_w);
	422	memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x2fe446, 0x2fe447, 0, 0, prot_9a37_r);
423	423
424	424	sma_install_random_read_handler(machine, 0x2fffcc, 0x2ffff0);
425	425	}
r4679	r4680
427	427
428	428	void garouo_install_protection(running_machine *machine)
429	429	{
430		memory_install_write16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x2fffc0, 0x2fffc1, 0, 0, garouo_bankswitch_w);
431		memory_install_read16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x2fe446, 0x2fe447, 0, 0, prot_9a37_r);
	430	memory_install_write16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x2fffc0, 0x2fffc1, 0, 0, garouo_bankswitch_w);
	431	memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x2fe446, 0x2fe447, 0, 0, prot_9a37_r);
432	432
433	433	sma_install_random_read_handler(machine, 0x2fffcc, 0x2ffff0);
434	434	}
r4679	r4680
436	436
437	437	void mslug3_install_protection(running_machine *machine)
438	438	{
439		memory_install_write16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x2fffe4, 0x2fffe5, 0, 0, mslug3_bankswitch_w);
440		memory_install_read16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x2fe446, 0x2fe447, 0, 0, prot_9a37_r);
	439	memory_install_write16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x2fffe4, 0x2fffe5, 0, 0, mslug3_bankswitch_w);
	440	memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x2fe446, 0x2fe447, 0, 0, prot_9a37_r);
441	441
442	442	//  sma_install_random_read_handler(machine, 0x2ffff8, 0x2ffffa);
443	443	}
r4679	r4680
445	445
446	446	void kof2000_install_protection(running_machine *machine)
447	447	{
448		memory_install_write16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x2fffec, 0x2fffed, 0, 0, kof2000_bankswitch_w);
449		memory_install_read16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x2fe446, 0x2fe447, 0, 0, prot_9a37_r);
	448	memory_install_write16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x2fffec, 0x2fffed, 0, 0, kof2000_bankswitch_w);
	449	memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x2fe446, 0x2fe447, 0, 0, prot_9a37_r);
450	450
451	451	sma_install_random_read_handler(machine, 0x2fffd8, 0x2fffda);
452	452	}
r4679	r4680
521	521
522	522	void install_pvc_protection( running_machine *machine )
523	523	{
524		pvc_cartridge_ram = auto_malloc(0x2000);
	524	pvc_cartridge_ram = auto_alloc_array(machine, UINT16, 0x2000/2);
525	525	state_save_register_global_pointer(machine, pvc_cartridge_ram, 0x2000 / 2);
526	526
527		memory_install_readwrite16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x2fe000, 0x2fffff, 0, 0, pvc_prot_r, pvc_prot_w);
	527	memory_install_readwrite16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x2fe000, 0x2fffff, 0, 0, pvc_prot_r, pvc_prot_w);
528	528	}

src/mame/machine/atarigen.c

r4679	r4680
321	321
322	322	static TIMER_CALLBACK( scanline_interrupt_callback )
323	323	{
324		const device_config *screen = ptr;
	324	const device_config *screen = (const device_config *)ptr;
325	325	emu_timer *timer = get_scanline_interrupt_timer_for_screen(screen);
326	326
327	327	/* generate the interrupt */
r4679	r4680
556	556	atarigen_slapstic = memory_install_readwrite16_handler(cpu_get_address_space(device, ADDRESS_SPACE_PROGRAM), base, base + 0x7fff, 0, mirror, atarigen_slapstic_r, atarigen_slapstic_w);
557	557
558	558	/* allocate memory for a copy of bank 0 */
559		atarigen_slapstic_bank0 = auto_malloc(0x2000);
	559	atarigen_slapstic_bank0 = auto_alloc_array(device->machine, UINT8, 0x2000);
560	560	memcpy(atarigen_slapstic_bank0, atarigen_slapstic, 0x2000);
561	561
562	562	/* ensure we recopy memory for the bank */
r4679	r4680
984	984
985	985	static TIMER_CALLBACK( scanline_timer_callback )
986	986	{
987		const device_config *screen = ptr;
	987	const device_config *screen = (const device_config *)ptr;
988	988	int scanline = param;
989	989
990	990	/* callback */
r4679	r4680
1049	1049
1050	1050	static TIMER_CALLBACK( atarivc_eof_update )
1051	1051	{
1052		const device_config *screen = ptr;
	1052	const device_config *screen = (const device_config *)ptr;
1053	1053	emu_timer *timer = get_atarivc_eof_update_timer_for_screen(screen);
1054	1054	int i;
1055	1055
r4679	r4680
1584	1584
1585	1585	void atarigen_swap_mem(void *ptr1, void *ptr2, int bytes)
1586	1586	{
1587		UINT8 *p1 = ptr1;
1588		UINT8 *p2 = ptr2;
	1587	UINT8 *p1 = (UINT8 *)ptr1;
	1588	UINT8 *p2 = (UINT8 *)ptr2;
1589	1589	while (bytes--)
1590	1590	{
1591	1591	int temp = *p1;
r4679	r4680
1608	1608	int c, x, y;
1609	1609
1610	1610	/* allocate memory for the assembled data */
1611		srcdata = auto_malloc(gx0->total_elements * gx0->width * gx0->height);
	1611	srcdata = auto_alloc_array(machine, UINT8, gx0->total_elements * gx0->width * gx0->height);
1612	1612
1613	1613	/* loop over elements */
1614	1614	dest = srcdata;

src/mame/machine/zs01.c

r4679	r4680
81	81
82	82	if( data == NULL )
83	83	{
84		data = auto_malloc(
	84	data = auto_alloc_array(machine, UINT8,
85	85	SIZE_RESPONSE_TO_RESET +
86	86	SIZE_KEY +
87	87	SIZE_KEY +
r4679	r4680
90	90
91	91	if( ds2401 == NULL )
92	92	{
93		ds2401 = auto_malloc( SIZE_DATA_BUFFER );
	93	ds2401 = auto_alloc_array(machine, UINT8, SIZE_DATA_BUFFER );
94	94	}
95	95
96	96	c->cs = 0;

src/mame/machine/midwunit.c

r4679	r4680
257	257	{
258	258	/* only signal if not in loopback state */
259	259	if (uart[1] != 0x66)
260		cpu_set_input_line(machine->cpu[0], 1, state ? ASSERT_LINE : CLEAR_LINE);
	260	cputag_set_input_line(machine, "maincpu", 1, state ? ASSERT_LINE : CLEAR_LINE);
261	261	}
262	262
263	263
r4679	r4680
466	466	DRIVER_INIT( umk3 )
467	467	{
468	468	init_mk3_common(machine);
469		umk3_palette = memory_install_write16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x0106a060, 0x0106a09f, 0, 0, umk3_palette_hack_w);
	469	umk3_palette = memory_install_write16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x0106a060, 0x0106a09f, 0, 0, umk3_palette_hack_w);
470	470	}
471	471
472	472	DRIVER_INIT( umk3r11 )
473	473	{
474	474	init_mk3_common(machine);
475		umk3_palette = memory_install_write16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x0106a060, 0x0106a09f, 0, 0, umk3_palette_hack_w);
	475	umk3_palette = memory_install_write16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x0106a060, 0x0106a09f, 0, 0, umk3_palette_hack_w);
476	476	}
477	477
478	478
r4679	r4680
557	557	init_wunit_generic(machine);
558	558
559	559	/* enable I/O shuffling */
560		memory_install_write16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x01800000, 0x0180000f, 0, 0, wwfmania_io_0_w);
	560	memory_install_write16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x01800000, 0x0180000f, 0, 0, wwfmania_io_0_w);
561	561
562	562	/* serial prefixes 430, 528 */
563	563	midway_serial_pic_init(machine, 528);

src/mame/machine/namcos2.c

r4679	r4680
100	100
101	101	MACHINE_START( namcos2 )
102	102	{
103		namcos2_eeprom = auto_malloc(namcos2_eeprom_size);
	103	namcos2_eeprom = auto_alloc_array(machine, UINT8, namcos2_eeprom_size);
104	104	}
105	105
106	106	MACHINE_RESET( namcos2 )

src/mame/machine/namco50.c

r4679	r4680
254	254
255	255	static TIMER_CALLBACK( namco_50xx_irq_clear )
256	256	{
257		const device_config *cpu = ptr;
	257	const device_config *cpu = (const device_config *)ptr;
258	258	cpu_set_input_line(cpu, 0, CLEAR_LINE);
259	259	}
260	260

src/mame/machine/neocrypt.c

r4679	r4680
537	537
538	538	rom_size = memory_region_length(machine, "sprites");
539	539
540		buf = malloc_or_die(rom_size);
	540	buf = alloc_array_or_die(UINT8, rom_size);
541	541
542	542	rom = memory_region(machine, "sprites");
543	543
r4679	r4680
674	674	/* ms5pcb and svcpcb have an additional scramble on top of the standard CMC scrambling */
675	675	void svcpcb_gfx_decrypt(running_machine *machine)
676	676	{
677		static const UINT8 xor[ 4 ] = { 0x34, 0x21, 0xc4, 0xe9 };
	677	static const UINT8 xorval[ 4 ] = { 0x34, 0x21, 0xc4, 0xe9 };
678	678	int i;
679	679	int ofst;
680	680	int rom_size = memory_region_length( machine, "sprites" );
681	681	UINT8 *rom = memory_region( machine, "sprites" );
682		UINT8 *buf = malloc_or_die( rom_size );
	682	UINT8 *buf = alloc_array_or_die(UINT8, rom_size );
683	683
684	684	for( i = 0; i < rom_size; i++ )
685	685	{
686		rom[ i ] ^= xor[ (i % 4) ];
	686	rom[ i ] ^= xorval[ (i % 4) ];
687	687	}
688	688	for( i = 0; i < rom_size; i += 4 )
689	689	{
r4679	r4680
724	724	/* Thanks to Razoola & Halrin for the info */
725	725	void kf2k3pcb_gfx_decrypt(running_machine *machine)
726	726	{
727		static const UINT8 xor[ 4 ] = { 0x34, 0x21, 0xc4, 0xe9 };
	727	static const UINT8 xorval[ 4 ] = { 0x34, 0x21, 0xc4, 0xe9 };
728	728	int i;
729	729	int ofst;
730	730	int rom_size = memory_region_length( machine, "sprites" );
731	731	UINT8 *rom = memory_region( machine, "sprites" );
732		UINT8 *buf = malloc_or_die( rom_size );
	732	UINT8 *buf = alloc_array_or_die(UINT8, rom_size );
733	733
734	734	for ( i = 0; i < rom_size; i++ )
735	735	{
736		rom[ i ] ^= xor[ (i % 4) ];
	736	rom[ i ] ^= xorval[ (i % 4) ];
737	737	}
738	738	for ( i = 0; i < rom_size; i+=4 )
739	739	{
r4679	r4680
891	891	size_t rom_size = 0x80000;
892	892	UINT8* rom2 = memory_region(machine, "audiocpu");
893	893
894		UINT8* buffer = malloc_or_die(rom_size);
	894	UINT8* buffer = alloc_array_or_die(UINT8, rom_size);
895	895
896	896	UINT32 i;
897	897
r4679	r4680
957	957	void kof98_decrypt_68k(running_machine *machine)
958	958	{
959	959	UINT8 *src = memory_region(machine, "maincpu");
960		UINT8 *dst = malloc_or_die(0x200000);
	960	UINT8 *dst = alloc_array_or_die(UINT8, 0x200000);
961	961	int i, j, k;
962	962	static const UINT32 sec[]={0x000000,0x100000,0x000004,0x100004,0x10000a,0x00000a,0x10000e,0x00000e};
963	963	static const UINT32 pos[]={0x000,0x004,0x00a,0x00e};
r4679	r4680
1174	1174	int i;
1175	1175	static const int sec[]={0x100000,0x280000,0x300000,0x180000,0x000000,0x380000,0x200000,0x080000};
1176	1176	UINT8 *src = memory_region(machine, "maincpu")+0x100000;
1177		UINT8 *dst = malloc_or_die(0x400000);
	1177	UINT8 *dst = alloc_array_or_die(UINT8, 0x400000);
1178	1178	memcpy( dst, src, 0x400000 );
1179	1179	for( i=0; i<8; ++i )
1180	1180	{
r4679	r4680
1189	1189	int i;
1190	1190	static const int sec[]={0x100000,0x280000,0x300000,0x180000,0x000000,0x380000,0x200000,0x080000};
1191	1191	UINT8 *src = memory_region(machine, "maincpu")+0x100000;
1192		UINT8 *dst = malloc_or_die(0x400000);
	1192	UINT8 *dst = alloc_array_or_die(UINT8, 0x400000);
1193	1193	memcpy( dst, src, 0x400000);
1194	1194	for( i=0; i<8; ++i )
1195	1195	{
r4679	r4680
1204	1204	int i;
1205	1205	static const int sec[]={0x000000,0x080000,0x700000,0x680000,0x500000,0x180000,0x200000,0x480000,0x300000,0x780000,0x600000,0x280000,0x100000,0x580000,0x400000,0x380000};
1206	1206	UINT8 *src = memory_region(machine, "maincpu");
1207		UINT8 *dst = malloc_or_die(0x800000);
	1207	UINT8 *dst = alloc_array_or_die(UINT8, 0x800000);
1208	1208
1209	1209	memcpy( dst, src, 0x800000 );
1210	1210	for( i=0; i<16; ++i )
r4679	r4680
1220	1220	int i;
1221	1221	static const int sec[]={0x000000,0x080000,0x500000,0x480000,0x600000,0x580000,0x700000,0x280000,0x100000,0x680000,0x400000,0x780000,0x200000,0x380000,0x300000,0x180000};
1222	1222	UINT8 *src = memory_region(machine, "maincpu");
1223		UINT8 *dst = malloc_or_die(0x800000);
	1223	UINT8 *dst = alloc_array_or_die(UINT8, 0x800000);
1224	1224
1225	1225	memcpy( dst, src, 0x800000 );
1226	1226	for( i=0; i<16; ++i )
r4679	r4680
1240	1240	int ofst;
1241	1241	int rom_size = 0x800000;
1242	1242	UINT8 *rom = memory_region( machine, "maincpu" );
1243		UINT8 *buf = malloc_or_die( rom_size );
	1243	UINT8 *buf = alloc_array_or_die(UINT8, rom_size );
1244	1244
1245	1245	for( i = 0; i < 0x100000; i++ )
1246	1246	{
r4679	r4680
1285	1285	int ofst;
1286	1286	int rom_size = 0x800000;
1287	1287	UINT8 *rom = memory_region( machine, "maincpu" );
1288		UINT8 *buf = malloc_or_die( rom_size );
	1288	UINT8 *buf = alloc_array_or_die(UINT8, rom_size );
1289	1289
1290	1290	for( i = 0; i < 0x100000; i++ )
1291	1291	{
r4679	r4680
1329	1329	int ofst;
1330	1330	int rom_size = 0x900000;
1331	1331	UINT8 *rom = memory_region( machine, "maincpu" );
1332		UINT8 *buf = malloc_or_die( rom_size );
	1332	UINT8 *buf = alloc_array_or_die(UINT8, rom_size );
1333	1333
1334	1334	for (i = 0; i < 0x100000; i++)
1335	1335	{
r4679	r4680
1372	1372	int ofst;
1373	1373	int rom_size = 0x900000;
1374	1374	UINT8 *rom = memory_region( machine, "maincpu" );
1375		UINT8 *buf = malloc_or_die( rom_size );
	1375	UINT8 *buf = alloc_array_or_die(UINT8, rom_size );
1376	1376
1377	1377	for (i = 0; i < 0x100000; i++)
1378	1378	{
r4679	r4680
1420	1420	int ofst;
1421	1421	int rom_size = 0x900000;
1422	1422	UINT8 *rom = memory_region( machine, "maincpu" );
1423		UINT8 *buf = malloc_or_die( rom_size );
	1423	UINT8 *buf = alloc_array_or_die(UINT8, rom_size );
1424	1424
1425	1425	for (i = 0; i < 0x100000; i++)
1426	1426	{
r4679	r4680
1475	1475
1476	1476	if( rom != NULL )
1477	1477	{   /* swap address lines on the whole ROMs */
1478		UINT16 *buffer = malloc_or_die((value / 2) * sizeof(UINT16));
	1478	UINT16 *buffer = alloc_array_or_die(UINT16, value / 2);
1479	1479
1480	1480	for( i = 0; i < size / 2; i += ( value / 2 ) )
1481	1481	{
r4679	r4680
1510	1510	{0x4b,0xa4,0x63,0x46,0xf0,0x91,0xea,0x62},
1511	1511	{0x4b,0xa4,0x63,0x46,0xf0,0x91,0xea,0x62}};
1512	1512	UINT8 *src = memory_region(machine, "ym");
1513		UINT8 *buf = malloc_or_die(0x1000000);
	1513	UINT8 *buf = alloc_array_or_die(UINT8, 0x1000000);
1514	1514	int i, j, d;
1515	1515
1516	1516	memcpy(buf,src,0x1000000);
r4679	r4680
1554	1554	0xd3,0xd2,0x5c,0x5d,0x57,0x56,0xd8,0xd9,
1555	1555	};
1556	1556	UINT16*src= (UINT16*)memory_region( machine, "mainbios" );
1557		UINT16*buf= malloc_or_die(0x80000);
	1557	UINT16*buf= alloc_array_or_die(UINT16, 0x80000/2);
1558	1558	int   a,addr;
1559	1559
1560	1560	for (a=0;a<0x80000/2;a++)

src/mame/machine/naomibd.c

r4679	r4680
112	112
113	113	int naomibd_interrupt_callback(const device_config *device, naomibd_interrupt_func callback)
114	114	{
115		naomibd_config *config = device->inline_config;
	115	naomibd_config *config = (naomibd_config *)device->inline_config;
116	116	//naomibd_state *v = get_safe_token(device);
117	117
118	118	config->interrupt = callback;
r4679	r4680
522	522
523	523	static DEVICE_START( naomibd )
524	524	{
525		const naomibd_config *config = device->inline_config;
	525	const naomibd_config *config = (const naomibd_config *)device->inline_config;
526	526	naomibd_state *v = get_safe_token(device);
527	527
528	528	/* validate some basic stuff */
r4679	r4680
618	618	}
619	619
620	620	/*-------------------------------------------------
621		device set info callback
622		-------------------------------------------------*/
623
624		static DEVICE_SET_INFO( naomibd )
625		{
626		switch (state)
627		{
628		/* no parameters to set yet */
629		}
630		}
631
632
633		/*-------------------------------------------------
634	621	device get info callback
635	622	-------------------------------------------------*/
636	623
637	624	DEVICE_GET_INFO( naomibd )
638	625	{
639		const naomibd_config *config = (device != NULL) ? device->inline_config : NULL;
	626	const naomibd_config *config = (device != NULL) ? (const naomibd_config *)device->inline_config : NULL;
640	627	switch (state)
641	628	{
642	629	/* --- the following bits of info are returned as 64-bit signed integers --- */
r4679	r4680
651	638	case DEVINFO_PTR_MEMORY:            info->p = get_safe_token(device)->memory;      break;
652	639
653	640	/* --- the following bits of info are returned as pointers to data or functions --- */
654		case DEVINFO_FCT_SET_INFO:            info->set_info = DEVICE_SET_INFO_NAME(naomibd); break;
655	641	case DEVINFO_FCT_START:               info->start = DEVICE_START_NAME(naomibd);      break;
656	642	case DEVINFO_FCT_STOP:               info->stop = DEVICE_STOP_NAME(naomibd);         break;
657	643	case DEVINFO_FCT_RESET:               info->reset = DEVICE_RESET_NAME(naomibd);      break;

src/mame/machine/tx1.c

r4679	r4680
174	174	if (SN74S516.X == 0)
175	175	{
176	176	mame_printf_debug("%s:SN74S516 tried to divide by zero\n", cpuexec_describe_context(machine));
177		SN74S516.ZW.Z = 0xffff;
	177	SN74S516.ZW.Z = (INT16)0xffff;
178	178	SN74S516.ZW.W = 0xffff;
179	179	SN74S516.ZWfl = 0;
180	180	return;
r4679	r4680
402	402	}
403	403
404	404	math.dbgaddr = math.promaddr;
405		math.dbgpc = cpu_get_previouspc(machine->cpu[1]);
	405	math.dbgpc = cpu_get_previouspc(cputag_get_cpu(machine, "math_cpu"));
406	406	}
407	407
408	408

src/mame/machine/cclimber.c

r4679	r4680
8	8	{
9	9	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
10	10	UINT8 *rom = memory_region(machine, "maincpu");
11		UINT8 *decrypt = auto_malloc(0x10000);
	11	UINT8 *decrypt = auto_alloc_array(machine, UINT8, 0x10000);
12	12	int A;
13	13
14	14	memory_set_decrypted_region(space, 0x0000, 0xffff, decrypt);

src/mame/machine/s24fd.c

r4679	r4680
90	90	}
91	91
92	92	/* Callback for CMP.L instructions (state change) */
93		static void s24_fd1094_cmp_callback(const device_config *device, UINT32 val, int reg)
	93	static void s24_fd1094_cmp_callback(const device_config *device, UINT32 val, UINT8 reg)
94	94	{
95	95	if (reg == 0 && (val & 0x0000ffff) == 0x0000ffff) // ?
96	96	{
r4679	r4680
131	131	s24_fd1094_setstate_and_decrypt(machine, FD1094_STATE_RESET);
132	132	s24_fd1094_kludge_reset_values();
133	133
134		device_set_info_fct(machine->cpu[1], CPUINFO_FCT_M68K_CMPILD_CALLBACK, (genf *)s24_fd1094_cmp_callback);
135		device_set_info_fct(machine->cpu[1], CPUINFO_FCT_M68K_RTE_CALLBACK, (genf *)s24_fd1094_rte_callback);
	134	m68k_set_cmpild_callback(machine->cpu[1], s24_fd1094_cmp_callback);
	135	m68k_set_rte_callback(machine->cpu[1], s24_fd1094_rte_callback);
136	136	cpu_set_irq_callback(machine->cpu[1], s24_fd1094_int_callback);
137	137
138	138	device_reset(machine->cpu[1]);
r4679	r4680
167	167
168	168	for (i=0;i<S16_NUMCACHE;i++)
169	169	{
170		s24_fd1094_cacheregion[i]=auto_malloc(s24_fd1094_cpuregionsize);
	170	s24_fd1094_cacheregion[i]=auto_alloc_array(machine, UINT16, s24_fd1094_cpuregionsize/2);
171	171	}
172	172
173	173	/* flush the cached state array */

src/mame/machine/tatsumi.c

r4679	r4680
46	46
47	47	COMBINE_DATA(&tatsumi_control_word);
48	48
49		if (tatsumi_control_word&0x7f00)
	49	if (tatsumi_control_word & 0x7f00)
50	50	{
51	51	logerror("Unknown control Word: %04x\n",tatsumi_control_word);
52		cpu_set_input_line(space->machine->cpu[3], INPUT_LINE_HALT, CLEAR_LINE); // ?
	52	cputag_set_input_line(space->machine, "sub2", INPUT_LINE_HALT, CLEAR_LINE); // ?
53	53	}
54	54
55		if (tatsumi_control_word&0x10)
56		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_HALT, ASSERT_LINE);
	55	if (tatsumi_control_word & 0x10)
	56	cputag_set_input_line(space->machine, "sub", INPUT_LINE_HALT, ASSERT_LINE);
57	57	else
58		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_HALT, CLEAR_LINE);
	58	cputag_set_input_line(space->machine, "sub", INPUT_LINE_HALT, CLEAR_LINE);
59	59
60		if (tatsumi_control_word&0x80)
61		cpu_set_input_line(space->machine->cpu[2], INPUT_LINE_HALT, ASSERT_LINE);
	60	if (tatsumi_control_word & 0x80)
	61	cputag_set_input_line(space->machine, "audiocpu", INPUT_LINE_HALT, ASSERT_LINE);
62	62	else
63		cpu_set_input_line(space->machine->cpu[2], INPUT_LINE_HALT, CLEAR_LINE);
	63	cputag_set_input_line(space->machine, "audiocpu", INPUT_LINE_HALT, CLEAR_LINE);
64	64
65	65	tatsumi_last_control=tatsumi_control_word;
66	66	}
r4679	r4680
69	69	// D0 = /GRDACC - Allow 68000 access to road pattern RAM
70	70	WRITE16_HANDLER( apache3_z80_ctrl_w )
71	71	{
72		cpu_set_input_line(space->machine->cpu[3], INPUT_LINE_HALT, data & 2 ? ASSERT_LINE : CLEAR_LINE);
	72	cputag_set_input_line(space->machine, "sub2", INPUT_LINE_HALT, data & 2 ? ASSERT_LINE : CLEAR_LINE);
73	73	}
74	74
75	75	READ16_HANDLER( apache3_v30_v20_r )
76	76	{
77		const address_space *targetspace = cpu_get_address_space(space->machine->cpu[2], ADDRESS_SPACE_PROGRAM);
	77	const address_space *targetspace = cputag_get_address_space(space->machine, "audiocpu", ADDRESS_SPACE_PROGRAM);
78	78
79	79	/* Each V20 byte maps to a V30 word */
80		if ((tatsumi_control_word&0xe0)==0xe0)
81		offset+=0xf8000; /* Upper half */
82		else if ((tatsumi_control_word&0xe0)==0xc0)
83		offset+=0xf0000;
84		else if ((tatsumi_control_word&0xe0)==0x80)
85		offset+=0x00000; // main ram
	80	if ((tatsumi_control_word & 0xe0) == 0xe0)
	81	offset += 0xf8000; /* Upper half */
	82	else if ((tatsumi_control_word & 0xe0) == 0xc0)
	83	offset += 0xf0000;
	84	else if ((tatsumi_control_word & 0xe0) == 0x80)
	85	offset += 0x00000; // main ram
86	86	else
87		logerror("%08x: unmapped read z80 rom %08x\n",cpu_get_pc(space->cpu),offset);
	87	logerror("%08x: unmapped read z80 rom %08x\n", cpu_get_pc(space->cpu), offset);
88	88	return 0xff00 | memory_read_byte(targetspace, offset);
89	89	}
90	90
91	91	WRITE16_HANDLER( apache3_v30_v20_w )
92	92	{
93		const address_space *targetspace = cpu_get_address_space(space->machine->cpu[2], ADDRESS_SPACE_PROGRAM);
	93	const address_space *targetspace = cputag_get_address_space(space->machine, "audiocpu", ADDRESS_SPACE_PROGRAM);
94	94
95		if ((tatsumi_control_word&0xe0)!=0x80)
96		logerror("%08x: write unmapped v30 rom %08x\n",cpu_get_pc(space->cpu),offset);
	95	if ((tatsumi_control_word & 0xe0) != 0x80)
	96	logerror("%08x: write unmapped v30 rom %08x\n", cpu_get_pc(space->cpu), offset);
97	97
98	98	/* Only 8 bits of the V30 data bus are connected - ignore writes to the other half */
99	99	if (ACCESSING_BITS_0_7)
100	100	{
101		memory_write_byte(targetspace, offset, data&0xff);
	101	memory_write_byte(targetspace, offset, data & 0xff);
102	102	}
103	103	}
104	104
r4679	r4680
109	109
110	110	WRITE16_HANDLER( apache3_z80_w )
111	111	{
112		apache3_z80_ram[offset]=data&0xff;
	112	apache3_z80_ram[offset] = data & 0xff;
113	113	}
114	114
115	115	READ8_HANDLER( apache3_adc_r )
r4679	r4680
150	150
151	151	READ16_HANDLER( roundup_v30_z80_r )
152	152	{
153		const address_space *targetspace = cpu_get_address_space(space->machine->cpu[2], ADDRESS_SPACE_PROGRAM);
	153	const address_space *targetspace = cputag_get_address_space(space->machine, "audiocpu", ADDRESS_SPACE_PROGRAM);
154	154
155	155	/* Each Z80 byte maps to a V30 word */
156		if (tatsumi_control_word&0x20)
157		offset+=0x8000; /* Upper half */
	156	if (tatsumi_control_word & 0x20)
	157	offset += 0x8000; /* Upper half */
158	158
159	159	return 0xff00 | memory_read_byte(targetspace, offset);
160	160	}
161	161
162	162	WRITE16_HANDLER( roundup_v30_z80_w )
163	163	{
164		const address_space *targetspace = cpu_get_address_space(space->machine->cpu[2], ADDRESS_SPACE_PROGRAM);
	164	const address_space *targetspace = cputag_get_address_space(space->machine, "audiocpu", ADDRESS_SPACE_PROGRAM);
165	165
166	166	/* Only 8 bits of the V30 data bus are connected - ignore writes to the other half */
167	167	if (ACCESSING_BITS_0_7)
168	168	{
169		if (tatsumi_control_word&0x20)
170		offset+=0x8000; /* Upper half of Z80 address space */
	169	if (tatsumi_control_word & 0x20)
	170	offset += 0x8000; /* Upper half of Z80 address space */
171	171
172		memory_write_byte(targetspace, offset, data&0xff);
	172	memory_write_byte(targetspace, offset, data & 0xff);
173	173	}
174	174	}
175	175
r4679	r4680
178	178	{
179	179	COMBINE_DATA(&tatsumi_control_word);
180	180
181		if (tatsumi_control_word&0x10)
182		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_HALT, ASSERT_LINE);
	181	if (tatsumi_control_word & 0x10)
	182	cputag_set_input_line(space->machine, "sub", INPUT_LINE_HALT, ASSERT_LINE);
183	183	else
184		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_HALT, CLEAR_LINE);
	184	cputag_set_input_line(space->machine, "sub", INPUT_LINE_HALT, CLEAR_LINE);
185	185
186		if (tatsumi_control_word&0x4)
187		cpu_set_input_line(space->machine->cpu[2], INPUT_LINE_HALT, ASSERT_LINE);
	186	if (tatsumi_control_word & 0x4)
	187	cputag_set_input_line(space->machine, "audiocpu", INPUT_LINE_HALT, ASSERT_LINE);
188	188	else
189		cpu_set_input_line(space->machine->cpu[2], INPUT_LINE_HALT, CLEAR_LINE);
	189	cputag_set_input_line(space->machine, "audiocpu", INPUT_LINE_HALT, CLEAR_LINE);
190	190
191		//  if (offset==1 && (tatsumi_control_w&0xfeff)!=(last_bank&0xfeff))
192		//      logerror("%08x:  Changed bank to %04x (%d)\n",cpu_get_pc(space->cpu),tatsumi_control_w,offset);
	191	//  if (offset == 1 && (tatsumi_control_w & 0xfeff) != (last_bank & 0xfeff))
	192	//      logerror("%08x:  Changed bank to %04x (%d)\n", cpu_get_pc(space->cpu), tatsumi_control_w,offset);
193	193
194	194	//todo - watchdog
195	195
r4679	r4680
211	211	Changed bank to 0060 (0)
212	212	*/
213	213
214		if ((tatsumi_control_word&0x8)==0 && !(tatsumi_last_control&0x8))
215		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_IRQ4, ASSERT_LINE);
	214	if ((tatsumi_control_word & 0x8) == 0 && !(tatsumi_last_control & 0x8))
	215	cputag_set_input_line(space->machine, "sub", INPUT_LINE_IRQ4, ASSERT_LINE);
216	216	//  if (tatsumi_control_w&0x200)
217	217	//      cpu_set_reset_line(1, CLEAR_LINE);
218	218	//  else
r4679	r4680
223	223	//  if ((tatsumi_control_w&0x200)==0 && (last_bank&0x200)==0x200)
224	224	//      logerror("68k reset\n");
225	225
226		if (tatsumi_control_word==0x3a00) {
	226	if (tatsumi_control_word == 0x3a00)
	227	{
227	228	//      cpu_set_reset_line(1, CLEAR_LINE);
228		//  logerror("68k on\n");
229
	229	//      logerror("68k on\n");
230	230	}
231	231
232		tatsumi_last_control=tatsumi_control_word;
	232	tatsumi_last_control = tatsumi_control_word;
233	233	}
234	234
235	235	WRITE16_HANDLER( roundup5_d0000_w )
236	236	{
237	237	COMBINE_DATA(&roundup5_d0000_ram[offset]);
238		//  logerror("d_68k_d0000_w %06x %04x\n",cpu_get_pc(space->cpu),data);
	238	//  logerror("d_68k_d0000_w %06x %04x\n", cpu_get_pc(space->cpu), data);
239	239	}
240	240
241	241	WRITE16_HANDLER( roundup5_e0000_w )
r4679	r4680
245	245	*/
246	246
247	247	COMBINE_DATA(&roundup5_e0000_ram[offset]);
248		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_IRQ4, CLEAR_LINE); // guess, probably wrong
	248	cputag_set_input_line(space->machine, "sub", INPUT_LINE_IRQ4, CLEAR_LINE); // guess, probably wrong
249	249
250		//  logerror("d_68k_e0000_w %06x %04x\n",cpu_get_pc(space->cpu),data);
	250	//  logerror("d_68k_e0000_w %06x %04x\n", cpu_get_pc(space->cpu), data);
251	251	}
252	252
253	253	/******************************************************************************/
254	254
255	255	READ16_HANDLER(cyclwarr_control_r)
256	256	{
257		//  logerror("%08x:  control_r\n",cpu_get_pc(space->cpu));
	257	//  logerror("%08x:  control_r\n", cpu_get_pc(space->cpu));
258	258	return tatsumi_control_word;
259	259	}
260	260
r4679	r4680
262	262	{
263	263	COMBINE_DATA(&tatsumi_control_word);
264	264
265		//  if ((tatsumi_control_word&0xfe)!=(tatsumi_last_control&0xfe))
266		//      logerror("%08x:  control_w %04x\n",cpu_get_pc(space->cpu),data);
	265	//  if ((tatsumi_control_word&0xfe) != (tatsumi_last_control&0xfe))
	266	//      logerror("%08x:  control_w %04x\n", cpu_get_pc(space->cpu), data);
267	267
268	268	/*
269	269
r4679	r4680
274	274
275	275	*/
276	276
277		if ((tatsumi_control_word&4)==4 && (tatsumi_last_control&4)==0) {
	277	if ((tatsumi_control_word & 4) == 4 && (tatsumi_last_control & 4) == 0)
	278	{
278	279	//      logerror("68k 2 halt\n");
279		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_HALT, ASSERT_LINE);
	280	cputag_set_input_line(space->machine, "sub", INPUT_LINE_HALT, ASSERT_LINE);
280	281	}
281	282
282		if ((tatsumi_control_word&4)==0 && (tatsumi_last_control&4)==4) {
	283	if ((tatsumi_control_word & 4) == 0 && (tatsumi_last_control & 4) == 4)
	284	{
283	285	//      logerror("68k 2 irq go\n");
284		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_HALT, CLEAR_LINE);
	286	cputag_set_input_line(space->machine, "sub", INPUT_LINE_HALT, CLEAR_LINE);
285	287	}
286	288
287	289
288	290	// hack
289		if (cpu_get_pc(space->cpu)==0x2c3c34) {
	291	if (cpu_get_pc(space->cpu) == 0x2c3c34)
	292	{
290	293	//      cpu_set_reset_line(1, CLEAR_LINE);
291		//  logerror("hack 68k2 on\n");
	294	//      logerror("hack 68k2 on\n");
292	295	}
293	296
294		tatsumi_last_control=tatsumi_control_word;
	297	tatsumi_last_control = tatsumi_control_word;
295	298	}
296	299
297	300	/******************************************************************************/

src/mame/machine/arkanoid.c

r4679	r4680
131	131
132	132	CUSTOM_INPUT( arkanoid_input_mux )
133	133	{
134		const char *tag1 = param;
	134	const char *tag1 = (const char *)param;
135	135	const char *tag2 = tag1 + strlen(tag1) + 1;
136	136	return input_port_read(field->port->machine, (arkanoid_paddle_select == 0) ? tag1 : tag2);
137	137	}

src/mame/machine/archimds.c

r4679	r4680
54	54
55	55	if (ioc_regs[6] & mask)
56	56	{
57		cpu_set_input_line(machine->cpu[0], ARM_IRQ_LINE, ASSERT_LINE);
	57	cputag_set_input_line(machine, "maincpu", ARM_IRQ_LINE, ASSERT_LINE);
58	58	}
59	59	}
60	60
r4679	r4680
64	64
65	65	if (ioc_regs[10] & mask)
66	66	{
67		cpu_set_input_line(machine->cpu[0], ARM_IRQ_LINE, PULSE_LINE);
	67	cputag_set_input_line(machine, "maincpu", ARM_IRQ_LINE, PULSE_LINE);
68	68	}
69	69	}
70	70
r4679	r4680
74	74
75	75	if (ioc_regs[14] & mask)
76	76	{
77		cpu_set_input_line(machine->cpu[0], ARM_FIRQ_LINE, PULSE_LINE);
	77	cputag_set_input_line(machine, "maincpu", ARM_FIRQ_LINE, PULSE_LINE);
78	78	}
79	79	}
80	80
r4679	r4680
265	265
266	266	void archimedes_driver_init(running_machine *machine)
267	267	{
268		memory_set_direct_update_handler( cpu_get_address_space( machine->cpu[0], ADDRESS_SPACE_PROGRAM ), a310_setopbase);
	268	memory_set_direct_update_handler( cputag_get_address_space( machine, "maincpu", ADDRESS_SPACE_PROGRAM ), a310_setopbase);
269	269	}
270	270
271	271	static const char *const ioc_regnames[] =
r4679	r4680
382	382	// if that did it, clear the IRQ
383	383	if (ioc_regs[4] == 0)
384	384	{
385		cpu_set_input_line(space->machine->cpu[0], ARM_IRQ_LINE, CLEAR_LINE);
	385	cputag_set_input_line(space->machine, "maincpu", ARM_IRQ_LINE, CLEAR_LINE);
386	386	}
387	387	break;
388	388

src/mame/machine/galaxold.c

r4679	r4680
311	311	offs_t i;
312	312	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
313	313	UINT8 *rom = memory_region(machine, "maincpu");
314		UINT8 *decrypt = auto_malloc(0x8000);
	314	UINT8 *decrypt = auto_alloc_array(machine, UINT8, 0x8000);
315	315
316	316	memory_set_decrypted_region(space, 0x0000, 0x7fff, decrypt);
317	317

src/mame/machine/retofinv.c

r4679	r4680
57	57	if ((ddrB & 0x02) && (~data & 0x02) && (portB_out & 0x02))
58	58	{
59	59	portA_in = from_main;
60		if (main_sent) cpu_set_input_line(space->machine->cpu[3],0,CLEAR_LINE);
	60	if (main_sent) cputag_set_input_line(space->machine, "68705", 0, CLEAR_LINE);
61	61	main_sent = 0;
62	62	//logerror("read command %02x from main cpu\n",portA_in);
63	63	}
r4679	r4680
114	114	logerror("%04x: mcu_w %02x\n",cpu_get_pc(space->cpu),data);
115	115	from_main = data;
116	116	main_sent = 1;
117		cpu_set_input_line(space->machine->cpu[3],0,ASSERT_LINE);
	117	cputag_set_input_line(space->machine, "68705", 0, ASSERT_LINE);
118	118	}
119	119
120	120	READ8_HANDLER( retofinv_mcu_r )

src/mame/machine/slikshot.c

r4679	r4680
506	506
507	507	/* this is a big kludge: only allow a reset if the Z80 is stopped */
508	508	/* at its endpoint; otherwise, we never get a result from the Z80 */
509		if ((data & 0x10) || cpu_get_reg(machine->cpu[2], Z80_PC) == 0x13a)
	509	if ((data & 0x10) || cpu_get_reg(cputag_get_cpu(machine, "sub"), Z80_PC) == 0x13a)
510	510	{
511		cpu_set_input_line(machine->cpu[2], INPUT_LINE_RESET, (data & 0x10) ? CLEAR_LINE : ASSERT_LINE);
	511	cputag_set_input_line(machine, "sub", INPUT_LINE_RESET, (data & 0x10) ? CLEAR_LINE : ASSERT_LINE);
512	512
513	513	/* on the rising edge, make the crosshair visible again */
514	514	if ((data & 0x10) && !(z80_ctrl & 0x10))

src/mame/machine/snesdsp1.c

r4679	r4680
40	40	unsigned int writes;
41	41	};
42	42
43		static const struct DSP1_Command mCommandTable[0x40];
44		static const INT16 DSP1_MaxAZS_Exp[16];
45		static const INT16 DSP1_SinTable[256];
46		static const INT16 DSP1_MulTable[256];
	43
	44	//////////////////////////////////////////////////////////////////
	45
	46	// Data ROM, as logged from a DSP-1B with the 0x1f command;
	47	// it contains the tables and constants used by the commands.
	48	// The tables used are: two shift tables (0x022-0x031 and 0x031-0x040 -this last one
	49	// with an error in 0x03c which has survived to all the DSP-1 revisions-); a inverse
	50	// table (used as initial guess) at 0x065-0x0e4; a square root table (used also
	51	// as initial guess) at 0x0e5-0x115; two sin and cos tables (used as nodes to construct
	52	// a interpolation curve) at, respectively, 0x116-0x197 and 0x196-0x215.
	53	// As a curiosity, in the positions 0x21c-0x31c it's contained a
	54	// 257-points arccos table that, apparently, have been not used anywhere
	55	// (maybe for the MaxAZS_Exp table?).
	56
47	57	static UINT16 DSP1_DataRom[1024];
48	58
49	59	static struct SharedData { // some RAM variables shared between commands
r4679	r4680
121	131
122	132	//////////////////////////////////////////////////////////////////
123	133
	134	// The info on this table follows Overload's docs.
	135
	136	static const struct DSP1_Command mCommandTable[0x40] =
	137	{
	138	{&DSP1_multiply, 2, 1},   //0x00
	139	{&DSP1_attitudeA, 4, 0},    //0x01
	140	{&DSP1_parameter, 7, 4},   //0x02
	141	{&DSP1_subjectiveA, 3, 3},    //0x03
	142	{&DSP1_triangle, 2, 2},   //0x04
	143	{&DSP1_attitudeA, 4, 0},   //0x01
	144	{&DSP1_project, 3, 3},   //0x06
	145	{&DSP1_memoryTest, 1, 1},   //0x0f
	146	{&DSP1_radius, 3, 2},   //0x08
	147	{&DSP1_objectiveA, 3, 3},   //0x0d
	148	{&DSP1_raster, 1, 4},   // 0x0a. This will normally work in continuous mode
	149	{&DSP1_scalarA, 3, 1},   //0x0b
	150	{&DSP1_rotate, 3, 2},   //0x0c
	151	{&DSP1_objectiveA, 3, 3},   //0x0d
	152	{&DSP1_target, 2, 2},   //0x0e
	153	{&DSP1_memoryTest, 1, 1},   //0x0f
	154
	155	{&DSP1_inverse, 2, 2},   //0x10
	156	{&DSP1_attitudeB, 4, 0},   //0x11
	157	{&DSP1_parameter, 7, 4},   //0x02
	158	{&DSP1_subjectiveB, 3, 3},   //0x13
	159	{&DSP1_gyrate, 6, 3},   //0x14
	160	{&DSP1_attitudeB, 4, 0},   //0x11
	161	{&DSP1_project, 3, 3},   //0x06
	162	{&DSP1_memoryDump, 1, 1024},   //0x1f
	163	{&DSP1_range, 4, 1},   //0x18
	164	{&DSP1_objectiveB, 3, 3},   //0x1d
	165	{0, 0, 0},   // 0x1a; the chip freezes
	166	{&DSP1_scalarB, 3, 1},   //0x1b
	167	{&DSP1_polar, 6, 3},   //0x1c
	168	{&DSP1_objectiveB, 3, 3},   //0x1d
	169	{&DSP1_target, 2, 2},   //0x0e
	170	{&DSP1_memoryDump, 1, 1024},   //0x1f
	171
	172	{&DSP1_multiply2, 2, 1},   //0x20
	173	{&DSP1_attitudeC, 4, 0},   //0x21
	174	{&DSP1_parameter, 7, 4},   //0x02
	175	{&DSP1_subjectiveC, 3, 3},   //0x23
	176	{&DSP1_triangle, 2, 2},   //0x04
	177	{&DSP1_attitudeC, 4, 0},   //0x21
	178	{&DSP1_project, 3, 3},   //0x06
	179	{&DSP1_memorySize, 1, 1},    //0x2f
	180	{&DSP1_distance, 3, 1},   //0x28
	181	{&DSP1_objectiveC, 3, 3},   //0x2d
	182	{0, 0, 0},   // 0x1a; the chip freezes
	183	{&DSP1_scalarC, 3, 1},   //0x2b
	184	{&DSP1_rotate, 3, 2},   //0x0c
	185	{&DSP1_objectiveC, 3, 3},   //0x2d
	186	{&DSP1_target, 2, 2},   //0x0e
	187	{&DSP1_memorySize, 1, 1},   //0x2f
	188
	189	{&DSP1_inverse, 2, 2},   //0x10
	190	{&DSP1_attitudeA, 4, 0},   //0x01
	191	{&DSP1_parameter, 7, 4},   //0x02
	192	{&DSP1_subjectiveA, 3, 3},   //0x03
	193	{&DSP1_gyrate, 6, 3},   //0x14
	194	{&DSP1_attitudeA, 4, 0},   //0x01
	195	{&DSP1_project, 3, 3},   //0x06
	196	{&DSP1_memoryDump, 1, 1024},   //0x1f
	197	{&DSP1_range2, 4, 1},   //0x38
	198	{&DSP1_objectiveA, 3, 3},   //0x0d
	199	{0, 0, 0},   // 0x1a; the chip freezes
	200	{&DSP1_scalarA, 3, 1},   //0x0b
	201	{&DSP1_polar, 6, 3},   //0x1c
	202	{&DSP1_objectiveA, 3, 3},   //0x0d
	203	{&DSP1_target, 2, 2},   //0x0e
	204	{&DSP1_memoryDump, 1, 1024},   //0x1f
	205	};
	206
	207	//////////////////////////////////////////////////////////////////
	208
	209	static const INT16 DSP1_MaxAZS_Exp[16] = {
	210	0x38b4, 0x38b7, 0x38ba, 0x38be, 0x38c0, 0x38c4, 0x38c7, 0x38ca,
	211	0x38ce, 0x38d0, 0x38d4, 0x38d7, 0x38da, 0x38dd, 0x38e0, 0x38e4
	212	};
	213
	214	//////////////////////////////////////////////////////////////////
	215
	216	static const INT16 DSP1_SinTable[256] = {
	217	0x0000,  0x0324,  0x0647,  0x096a,  0x0c8b,  0x0fab,  0x12c8,  0x15e2,
	218	0x18f8,  0x1c0b,  0x1f19,  0x2223,  0x2528,  0x2826,  0x2b1f,  0x2e11,
	219	0x30fb,  0x33de,  0x36ba,  0x398c,  0x3c56,  0x3f17,  0x41ce,  0x447a,
	220	0x471c,  0x49b4,  0x4c3f,  0x4ebf,  0x5133,  0x539b,  0x55f5,  0x5842,
	221	0x5a82,  0x5cb4,  0x5ed7,  0x60ec,  0x62f2,  0x64e8,  0x66cf,  0x68a6,
	222	0x6a6d,  0x6c24,  0x6dca,  0x6f5f,  0x70e2,  0x7255,  0x73b5,  0x7504,
	223	0x7641,  0x776c,  0x7884,  0x798a,  0x7a7d,  0x7b5d,  0x7c29,  0x7ce3,
	224	0x7d8a,  0x7e1d,  0x7e9d,  0x7f09,  0x7f62,  0x7fa7,  0x7fd8,  0x7ff6,
	225	0x7fff,  0x7ff6,  0x7fd8,  0x7fa7,  0x7f62,  0x7f09,  0x7e9d,  0x7e1d,
	226	0x7d8a,  0x7ce3,  0x7c29,  0x7b5d,  0x7a7d,  0x798a,  0x7884,  0x776c,
	227	0x7641,  0x7504,  0x73b5,  0x7255,  0x70e2,  0x6f5f,  0x6dca,  0x6c24,
	228	0x6a6d,  0x68a6,  0x66cf,  0x64e8,  0x62f2,  0x60ec,  0x5ed7,  0x5cb4,
	229	0x5a82,  0x5842,  0x55f5,  0x539b,  0x5133,  0x4ebf,  0x4c3f,  0x49b4,
	230	0x471c,  0x447a,  0x41ce,  0x3f17,  0x3c56,  0x398c,  0x36ba,  0x33de,
	231	0x30fb,  0x2e11,  0x2b1f,  0x2826,  0x2528,  0x2223,  0x1f19,  0x1c0b,
	232	0x18f8,  0x15e2,  0x12c8,  0x0fab,  0x0c8b,  0x096a,  0x0647,  0x0324,
	233	-0x0000, -0x0324, -0x0647, -0x096a, -0x0c8b, -0x0fab, -0x12c8, -0x15e2,
	234	-0x18f8, -0x1c0b, -0x1f19, -0x2223, -0x2528, -0x2826, -0x2b1f, -0x2e11,
	235	-0x30fb, -0x33de, -0x36ba, -0x398c, -0x3c56, -0x3f17, -0x41ce, -0x447a,
	236	-0x471c, -0x49b4, -0x4c3f, -0x4ebf, -0x5133, -0x539b, -0x55f5, -0x5842,
	237	-0x5a82, -0x5cb4, -0x5ed7, -0x60ec, -0x62f2, -0x64e8, -0x66cf, -0x68a6,
	238	-0x6a6d, -0x6c24, -0x6dca, -0x6f5f, -0x70e2, -0x7255, -0x73b5, -0x7504,
	239	-0x7641, -0x776c, -0x7884, -0x798a, -0x7a7d, -0x7b5d, -0x7c29, -0x7ce3,
	240	-0x7d8a, -0x7e1d, -0x7e9d, -0x7f09, -0x7f62, -0x7fa7, -0x7fd8, -0x7ff6,
	241	-0x7fff, -0x7ff6, -0x7fd8, -0x7fa7, -0x7f62, -0x7f09, -0x7e9d, -0x7e1d,
	242	-0x7d8a, -0x7ce3, -0x7c29, -0x7b5d, -0x7a7d, -0x798a, -0x7884, -0x776c,
	243	-0x7641, -0x7504, -0x73b5, -0x7255, -0x70e2, -0x6f5f, -0x6dca, -0x6c24,
	244	-0x6a6d, -0x68a6, -0x66cf, -0x64e8, -0x62f2, -0x60ec, -0x5ed7, -0x5cb4,
	245	-0x5a82, -0x5842, -0x55f5, -0x539b, -0x5133, -0x4ebf, -0x4c3f, -0x49b4,
	246	-0x471c, -0x447a, -0x41ce, -0x3f17, -0x3c56, -0x398c, -0x36ba, -0x33de,
	247	-0x30fb, -0x2e11, -0x2b1f, -0x2826, -0x2528, -0x2223, -0x1f19, -0x1c0b,
	248	-0x18f8, -0x15e2, -0x12c8, -0x0fab, -0x0c8b, -0x096a, -0x0647, -0x0324};
	249
	250	//////////////////////////////////////////////////////////////////
	251
	252	// Optimised for Performance
	253	static const INT16 DSP1_MulTable[256] = {
	254	0x0000,  0x0003,  0x0006,  0x0009,  0x000c,  0x000f,  0x0012,  0x0015,
	255	0x0019,  0x001c,  0x001f,  0x0022,  0x0025,  0x0028,  0x002b,  0x002f,
	256	0x0032,  0x0035,  0x0038,  0x003b,  0x003e,  0x0041,  0x0045,  0x0048,
	257	0x004b,  0x004e,  0x0051,  0x0054,  0x0057,  0x005b,  0x005e,  0x0061,
	258	0x0064,  0x0067,  0x006a,  0x006d,  0x0071,  0x0074,  0x0077,  0x007a,
	259	0x007d,  0x0080,  0x0083,  0x0087,  0x008a,  0x008d,  0x0090,  0x0093,
	260	0x0096,  0x0099,  0x009d,  0x00a0,  0x00a3,  0x00a6,  0x00a9,  0x00ac,
	261	0x00af,  0x00b3,  0x00b6,  0x00b9,  0x00bc,  0x00bf,  0x00c2,  0x00c5,
	262	0x00c9,  0x00cc,  0x00cf,  0x00d2,  0x00d5,  0x00d8,  0x00db,  0x00df,
	263	0x00e2,  0x00e5,  0x00e8,  0x00eb,  0x00ee,  0x00f1,  0x00f5,  0x00f8,
	264	0x00fb,  0x00fe,  0x0101,  0x0104,  0x0107,  0x010b,  0x010e,  0x0111,
	265	0x0114,  0x0117,  0x011a,  0x011d,  0x0121,  0x0124,  0x0127,  0x012a,
	266	0x012d,  0x0130,  0x0133,  0x0137,  0x013a,  0x013d,  0x0140,  0x0143,
	267	0x0146,  0x0149,  0x014d,  0x0150,  0x0153,  0x0156,  0x0159,  0x015c,
	268	0x015f,  0x0163,  0x0166,  0x0169,  0x016c,  0x016f,  0x0172,  0x0175,
	269	0x0178,  0x017c,  0x017f,  0x0182,  0x0185,  0x0188,  0x018b,  0x018e,
	270	0x0192,  0x0195,  0x0198,  0x019b,  0x019e,  0x01a1,  0x01a4,  0x01a8,
	271	0x01ab,  0x01ae,  0x01b1,  0x01b4,  0x01b7,  0x01ba,  0x01be,  0x01c1,
	272	0x01c4,  0x01c7,  0x01ca,  0x01cd,  0x01d0,  0x01d4,  0x01d7,  0x01da,
	273	0x01dd,  0x01e0,  0x01e3,  0x01e6,  0x01ea,  0x01ed,  0x01f0,  0x01f3,
	274	0x01f6,  0x01f9,  0x01fc,  0x0200,  0x0203,  0x0206,  0x0209,  0x020c,
	275	0x020f,  0x0212,  0x0216,  0x0219,  0x021c,  0x021f,  0x0222,  0x0225,
	276	0x0228,  0x022c,  0x022f,  0x0232,  0x0235,  0x0238,  0x023b,  0x023e,
	277	0x0242,  0x0245,  0x0248,  0x024b,  0x024e,  0x0251,  0x0254,  0x0258,
	278	0x025b,  0x025e,  0x0261,  0x0264,  0x0267,  0x026a,  0x026e,  0x0271,
	279	0x0274,  0x0277,  0x027a,  0x027d,  0x0280,  0x0284,  0x0287,  0x028a,
	280	0x028d,  0x0290,  0x0293,  0x0296,  0x029a,  0x029d,  0x02a0,  0x02a3,
	281	0x02a6,  0x02a9,  0x02ac,  0x02b0,  0x02b3,  0x02b6,  0x02b9,  0x02bc,
	282	0x02bf,  0x02c2,  0x02c6,  0x02c9,  0x02cc,  0x02cf,  0x02d2,  0x02d5,
	283	0x02d8,  0x02db,  0x02df,  0x02e2,  0x02e5,  0x02e8,  0x02eb,  0x02ee,
	284	0x02f1,  0x02f5,  0x02f8,  0x02fb,  0x02fe,  0x0301,  0x0304,  0x0307,
	285	0x030b,  0x030e,  0x0311,  0x0314,  0x0317,  0x031a,  0x031d,  0x0321};
	286
	287	//////////////////////////////////////////////////////////////////
	288
124	289	static UINT8 DSP1_getSr(void)
125	290	{
126	291	mSrLowByteAccess = ~mSrLowByteAccess;
r4679	r4680
294	459
295	460	//////////////////////////////////////////////////////////////////
296	461
297		// The info on this table follows Overload's docs.
298
299		static const struct DSP1_Command mCommandTable[0x40] =
300		{
301		{&DSP1_multiply, 2, 1},   //0x00
302		{&DSP1_attitudeA, 4, 0},    //0x01
303		{&DSP1_parameter, 7, 4},   //0x02
304		{&DSP1_subjectiveA, 3, 3},    //0x03
305		{&DSP1_triangle, 2, 2},   //0x04
306		{&DSP1_attitudeA, 4, 0},   //0x01
307		{&DSP1_project, 3, 3},   //0x06
308		{&DSP1_memoryTest, 1, 1},   //0x0f
309		{&DSP1_radius, 3, 2},   //0x08
310		{&DSP1_objectiveA, 3, 3},   //0x0d
311		{&DSP1_raster, 1, 4},   // 0x0a. This will normally work in continuous mode
312		{&DSP1_scalarA, 3, 1},   //0x0b
313		{&DSP1_rotate, 3, 2},   //0x0c
314		{&DSP1_objectiveA, 3, 3},   //0x0d
315		{&DSP1_target, 2, 2},   //0x0e
316		{&DSP1_memoryTest, 1, 1},   //0x0f
317
318		{&DSP1_inverse, 2, 2},   //0x10
319		{&DSP1_attitudeB, 4, 0},   //0x11
320		{&DSP1_parameter, 7, 4},   //0x02
321		{&DSP1_subjectiveB, 3, 3},   //0x13
322		{&DSP1_gyrate, 6, 3},   //0x14
323		{&DSP1_attitudeB, 4, 0},   //0x11
324		{&DSP1_project, 3, 3},   //0x06
325		{&DSP1_memoryDump, 1, 1024},   //0x1f
326		{&DSP1_range, 4, 1},   //0x18
327		{&DSP1_objectiveB, 3, 3},   //0x1d
328		{0, 0, 0},   // 0x1a; the chip freezes
329		{&DSP1_scalarB, 3, 1},   //0x1b
330		{&DSP1_polar, 6, 3},   //0x1c
331		{&DSP1_objectiveB, 3, 3},   //0x1d
332		{&DSP1_target, 2, 2},   //0x0e
333		{&DSP1_memoryDump, 1, 1024},   //0x1f
334
335		{&DSP1_multiply2, 2, 1},   //0x20
336		{&DSP1_attitudeC, 4, 0},   //0x21
337		{&DSP1_parameter, 7, 4},   //0x02
338		{&DSP1_subjectiveC, 3, 3},   //0x23
339		{&DSP1_triangle, 2, 2},   //0x04
340		{&DSP1_attitudeC, 4, 0},   //0x21
341		{&DSP1_project, 3, 3},   //0x06
342		{&DSP1_memorySize, 1, 1},    //0x2f
343		{&DSP1_distance, 3, 1},   //0x28
344		{&DSP1_objectiveC, 3, 3},   //0x2d
345		{0, 0, 0},   // 0x1a; the chip freezes
346		{&DSP1_scalarC, 3, 1},   //0x2b
347		{&DSP1_rotate, 3, 2},   //0x0c
348		{&DSP1_objectiveC, 3, 3},   //0x2d
349		{&DSP1_target, 2, 2},   //0x0e
350		{&DSP1_memorySize, 1, 1},   //0x2f
351
352		{&DSP1_inverse, 2, 2},   //0x10
353		{&DSP1_attitudeA, 4, 0},   //0x01
354		{&DSP1_parameter, 7, 4},   //0x02
355		{&DSP1_subjectiveA, 3, 3},   //0x03
356		{&DSP1_gyrate, 6, 3},   //0x14
357		{&DSP1_attitudeA, 4, 0},   //0x01
358		{&DSP1_project, 3, 3},   //0x06
359		{&DSP1_memoryDump, 1, 1024},   //0x1f
360		{&DSP1_range2, 4, 1},   //0x38
361		{&DSP1_objectiveA, 3, 3},   //0x0d
362		{0, 0, 0},   // 0x1a; the chip freezes
363		{&DSP1_scalarA, 3, 1},   //0x0b
364		{&DSP1_polar, 6, 3},   //0x1c
365		{&DSP1_objectiveA, 3, 3},   //0x0d
366		{&DSP1_target, 2, 2},   //0x0e
367		{&DSP1_memoryDump, 1, 1024},   //0x1f
368		};
369
370		//////////////////////////////////////////////////////////////////
371
372	462	static void DSP1_memoryTest(INT16 *input, INT16 *output)
373	463	{
374	464	//   INT16 *Size = &input[0];
r4679	r4680
970	1060
971	1061	//////////////////////////////////////////////////////////////////
972	1062
973		static const INT16 DSP1_MaxAZS_Exp[16] = {
974		0x38b4, 0x38b7, 0x38ba, 0x38be, 0x38c0, 0x38c4, 0x38c7, 0x38ca,
975		0x38ce, 0x38d0, 0x38d4, 0x38d7, 0x38da, 0x38dd, 0x38e0, 0x38e4
976		};
977	1063
978		//////////////////////////////////////////////////////////////////
979
980
981	1064	// Set-up the projection framework. Besides returning some values, it store in RAM some values that
982	1065	// will be used by the other three projection commands (raster, target an project)
983	1066	// Input:
r4679	r4680
1336	1419
1337	1420	if (Angle < 0) {
1338	1421	if (Angle == -32768) return 0;
1339		return -sin(-Angle);
	1422	return -sin((double)-Angle);
1340	1423	}
1341	1424	S = DSP1_SinTable[Angle >> 8] + (DSP1_MulTable[Angle & 0xff] * DSP1_SinTable[0x40 + (Angle >> 8)] >> 15);
1342	1425	if (S > 32767) S = 32767;
r4679	r4680
1533	1616	{
1534	1617	return (C * DSP1_DataRom[0x0031 + E] >> 15);
1535	1618	}
1536
1537		//////////////////////////////////////////////////////////////////
1538
1539		static const INT16 DSP1_SinTable[256] = {
1540		0x0000,  0x0324,  0x0647,  0x096a,  0x0c8b,  0x0fab,  0x12c8,  0x15e2,
1541		0x18f8,  0x1c0b,  0x1f19,  0x2223,  0x2528,  0x2826,  0x2b1f,  0x2e11,
1542		0x30fb,  0x33de,  0x36ba,  0x398c,  0x3c56,  0x3f17,  0x41ce,  0x447a,
1543		0x471c,  0x49b4,  0x4c3f,  0x4ebf,  0x5133,  0x539b,  0x55f5,  0x5842,
1544		0x5a82,  0x5cb4,  0x5ed7,  0x60ec,  0x62f2,  0x64e8,  0x66cf,  0x68a6,
1545		0x6a6d,  0x6c24,  0x6dca,  0x6f5f,  0x70e2,  0x7255,  0x73b5,  0x7504,
1546		0x7641,  0x776c,  0x7884,  0x798a,  0x7a7d,  0x7b5d,  0x7c29,  0x7ce3,
1547		0x7d8a,  0x7e1d,  0x7e9d,  0x7f09,  0x7f62,  0x7fa7,  0x7fd8,  0x7ff6,
1548		0x7fff,  0x7ff6,  0x7fd8,  0x7fa7,  0x7f62,  0x7f09,  0x7e9d,  0x7e1d,
1549		0x7d8a,  0x7ce3,  0x7c29,  0x7b5d,  0x7a7d,  0x798a,  0x7884,  0x776c,
1550		0x7641,  0x7504,  0x73b5,  0x7255,  0x70e2,  0x6f5f,  0x6dca,  0x6c24,
1551		0x6a6d,  0x68a6,  0x66cf,  0x64e8,  0x62f2,  0x60ec,  0x5ed7,  0x5cb4,
1552		0x5a82,  0x5842,  0x55f5,  0x539b,  0x5133,  0x4ebf,  0x4c3f,  0x49b4,
1553		0x471c,  0x447a,  0x41ce,  0x3f17,  0x3c56,  0x398c,  0x36ba,  0x33de,
1554		0x30fb,  0x2e11,  0x2b1f,  0x2826,  0x2528,  0x2223,  0x1f19,  0x1c0b,
1555		0x18f8,  0x15e2,  0x12c8,  0x0fab,  0x0c8b,  0x096a,  0x0647,  0x0324,
1556		-0x0000, -0x0324, -0x0647, -0x096a, -0x0c8b, -0x0fab, -0x12c8, -0x15e2,
1557		-0x18f8, -0x1c0b, -0x1f19, -0x2223, -0x2528, -0x2826, -0x2b1f, -0x2e11,
1558		-0x30fb, -0x33de, -0x36ba, -0x398c, -0x3c56, -0x3f17, -0x41ce, -0x447a,
1559		-0x471c, -0x49b4, -0x4c3f, -0x4ebf, -0x5133, -0x539b, -0x55f5, -0x5842,
1560		-0x5a82, -0x5cb4, -0x5ed7, -0x60ec, -0x62f2, -0x64e8, -0x66cf, -0x68a6,
1561		-0x6a6d, -0x6c24, -0x6dca, -0x6f5f, -0x70e2, -0x7255, -0x73b5, -0x7504,
1562		-0x7641, -0x776c, -0x7884, -0x798a, -0x7a7d, -0x7b5d, -0x7c29, -0x7ce3,
1563		-0x7d8a, -0x7e1d, -0x7e9d, -0x7f09, -0x7f62, -0x7fa7, -0x7fd8, -0x7ff6,
1564		-0x7fff, -0x7ff6, -0x7fd8, -0x7fa7, -0x7f62, -0x7f09, -0x7e9d, -0x7e1d,
1565		-0x7d8a, -0x7ce3, -0x7c29, -0x7b5d, -0x7a7d, -0x798a, -0x7884, -0x776c,
1566		-0x7641, -0x7504, -0x73b5, -0x7255, -0x70e2, -0x6f5f, -0x6dca, -0x6c24,
1567		-0x6a6d, -0x68a6, -0x66cf, -0x64e8, -0x62f2, -0x60ec, -0x5ed7, -0x5cb4,
1568		-0x5a82, -0x5842, -0x55f5, -0x539b, -0x5133, -0x4ebf, -0x4c3f, -0x49b4,
1569		-0x471c, -0x447a, -0x41ce, -0x3f17, -0x3c56, -0x398c, -0x36ba, -0x33de,
1570		-0x30fb, -0x2e11, -0x2b1f, -0x2826, -0x2528, -0x2223, -0x1f19, -0x1c0b,
1571		-0x18f8, -0x15e2, -0x12c8, -0x0fab, -0x0c8b, -0x096a, -0x0647, -0x0324};
1572
1573		//////////////////////////////////////////////////////////////////
1574
1575		// Optimised for Performance
1576		static const INT16 DSP1_MulTable[256] = {
1577		0x0000,  0x0003,  0x0006,  0x0009,  0x000c,  0x000f,  0x0012,  0x0015,
1578		0x0019,  0x001c,  0x001f,  0x0022,  0x0025,  0x0028,  0x002b,  0x002f,
1579		0x0032,  0x0035,  0x0038,  0x003b,  0x003e,  0x0041,  0x0045,  0x0048,
1580		0x004b,  0x004e,  0x0051,  0x0054,  0x0057,  0x005b,  0x005e,  0x0061,
1581		0x0064,  0x0067,  0x006a,  0x006d,  0x0071,  0x0074,  0x0077,  0x007a,
1582		0x007d,  0x0080,  0x0083,  0x0087,  0x008a,  0x008d,  0x0090,  0x0093,
1583		0x0096,  0x0099,  0x009d,  0x00a0,  0x00a3,  0x00a6,  0x00a9,  0x00ac,
1584		0x00af,  0x00b3,  0x00b6,  0x00b9,  0x00bc,  0x00bf,  0x00c2,  0x00c5,
1585		0x00c9,  0x00cc,  0x00cf,  0x00d2,  0x00d5,  0x00d8,  0x00db,  0x00df,
1586		0x00e2,  0x00e5,  0x00e8,  0x00eb,  0x00ee,  0x00f1,  0x00f5,  0x00f8,
1587		0x00fb,  0x00fe,  0x0101,  0x0104,  0x0107,  0x010b,  0x010e,  0x0111,
1588		0x0114,  0x0117,  0x011a,  0x011d,  0x0121,  0x0124,  0x0127,  0x012a,
1589		0x012d,  0x0130,  0x0133,  0x0137,  0x013a,  0x013d,  0x0140,  0x0143,
1590		0x0146,  0x0149,  0x014d,  0x0150,  0x0153,  0x0156,  0x0159,  0x015c,
1591		0x015f,  0x0163,  0x0166,  0x0169,  0x016c,  0x016f,  0x0172,  0x0175,
1592		0x0178,  0x017c,  0x017f,  0x0182,  0x0185,  0x0188,  0x018b,  0x018e,
1593		0x0192,  0x0195,  0x0198,  0x019b,  0x019e,  0x01a1,  0x01a4,  0x01a8,
1594		0x01ab,  0x01ae,  0x01b1,  0x01b4,  0x01b7,  0x01ba,  0x01be,  0x01c1,
1595		0x01c4,  0x01c7,  0x01ca,  0x01cd,  0x01d0,  0x01d4,  0x01d7,  0x01da,
1596		0x01dd,  0x01e0,  0x01e3,  0x01e6,  0x01ea,  0x01ed,  0x01f0,  0x01f3,
1597		0x01f6,  0x01f9,  0x01fc,  0x0200,  0x0203,  0x0206,  0x0209,  0x020c,
1598		0x020f,  0x0212,  0x0216,  0x0219,  0x021c,  0x021f,  0x0222,  0x0225,
1599		0x0228,  0x022c,  0x022f,  0x0232,  0x0235,  0x0238,  0x023b,  0x023e,
1600		0x0242,  0x0245,  0x0248,  0x024b,  0x024e,  0x0251,  0x0254,  0x0258,
1601		0x025b,  0x025e,  0x0261,  0x0264,  0x0267,  0x026a,  0x026e,  0x0271,
1602		0x0274,  0x0277,  0x027a,  0x027d,  0x0280,  0x0284,  0x0287,  0x028a,
1603		0x028d,  0x0290,  0x0293,  0x0296,  0x029a,  0x029d,  0x02a0,  0x02a3,
1604		0x02a6,  0x02a9,  0x02ac,  0x02b0,  0x02b3,  0x02b6,  0x02b9,  0x02bc,
1605		0x02bf,  0x02c2,  0x02c6,  0x02c9,  0x02cc,  0x02cf,  0x02d2,  0x02d5,
1606		0x02d8,  0x02db,  0x02df,  0x02e2,  0x02e5,  0x02e8,  0x02eb,  0x02ee,
1607		0x02f1,  0x02f5,  0x02f8,  0x02fb,  0x02fe,  0x0301,  0x0304,  0x0307,
1608		0x030b,  0x030e,  0x0311,  0x0314,  0x0317,  0x031a,  0x031d,  0x0321};
1609
1610		//////////////////////////////////////////////////////////////////
1611
1612		// Data ROM, as logged from a DSP-1B with the 0x1f command;
1613		// it contains the tables and constants used by the commands.
1614		// The tables used are: two shift tables (0x022-0x031 and 0x031-0x040 -this last one
1615		// with an error in 0x03c which has survived to all the DSP-1 revisions-); a inverse
1616		// table (used as initial guess) at 0x065-0x0e4; a square root table (used also
1617		// as initial guess) at 0x0e5-0x115; two sin and cos tables (used as nodes to construct
1618		// a interpolation curve) at, respectively, 0x116-0x197 and 0x196-0x215.
1619		// As a curiosity, in the positions 0x21c-0x31c it's contained a
1620		// 257-points arccos table that, apparently, have been not used anywhere
1621		// (maybe for the MaxAZS_Exp table?).
1622		static UINT16 DSP1_DataRom[1024];

src/mame/machine/mathbox.c

r4679	r4680
341	341	}
342	342
343	343
344		static DEVICE_SET_INFO( mathbox )
345		{
346		switch (state)
347		{
348		/* no parameters to set */
349		}
350		}
351
352
353	344	DEVICE_GET_INFO( mathbox )
354	345	{
355	346	switch (state)
r4679	r4680
360	351	case DEVINFO_INT_CLASS:                     info->i = DEVICE_CLASS_PERIPHERAL;      break;
361	352
362	353	/* --- the following bits of info are returned as pointers to data or functions --- */
363		case DEVINFO_FCT_SET_INFO:                  info->set_info = DEVICE_SET_INFO_NAME(mathbox); break;
364	354	case DEVINFO_FCT_START:                     info->start = DEVICE_START_NAME(mathbox);break;
365	355	case DEVINFO_FCT_STOP:                     /* Nothing */                     break;
366	356	case DEVINFO_FCT_RESET:                     info->reset = DEVICE_RESET_NAME(mathbox);break;

src/mame/machine/harddriv.c

r4679	r4680
157	157	{
158	158	/* predetermine memory regions */
159	159	sim_memory = (UINT16 *)memory_region(machine, "user1");
160		som_memory = (UINT16 *)auto_malloc(0x8000);
	160	som_memory = auto_alloc_array(machine, UINT16, 0x8000/2);
161	161	sim_memory_size = memory_region_length(machine, "user1") / 2;
162	162	adsp_pgm_memory_word = (UINT16 *)((UINT8 *)hdadsp_pgm_memory + 1);
163	163	}
r4679	r4680
895	895	if (commands)
896	896	{
897	897	INT16 *base = (INT16 *)&som_memory[param * 0x2000];
898		INT16 *end = base + (UINT16)*base++;
899		INT16 *current = base;
900		INT16 *table = base + (UINT16)*current++;
	898	INT16 *end = base + (UINT16)*base;
	899	INT16 *current = base + 1;
	900	INT16 *table = base + 1 + (UINT16)*current++;
901	901
902	902	fprintf(commands, "\n---------------\n");
903	903
r4679	r4680
1199	1199	logerror("%06X:hd68k_ds3_gdata_r(%04X)\n", cpu_get_previouspc(space->cpu), ds3_gdata);
1200	1200
1201	1201	/* attempt to optimize the transfer if conditions are right */
1202		if (space->cpu == space->machine->cpu[0] && pc == hdds3_transfer_pc &&
	1202	if (space->cpu == cputag_get_cpu(space->machine, "maincpu") && pc == hdds3_transfer_pc &&
1203	1203	!(!ds3_g68flag && ds3_g68irqs) && !(ds3_gflag && ds3_gfirqs))
1204	1204	{
1205	1205	UINT32 destaddr = cpu_get_reg(space->cpu, M68K_A1);

src/mame/machine/segacrpt.c

r4679	r4680
241	241	int length = memory_region_length(machine, cputag);
242	242	int cryptlen = MIN(length, 0x8000);
243	243	UINT8 *rom = memory_region(machine, cputag);
244		UINT8 *decrypted = auto_malloc(0xc000);
	244	UINT8 *decrypted = auto_alloc_array(machine, UINT8, 0xc000);
245	245
246	246	memory_set_decrypted_region(space, 0x0000, cryptlen - 1, decrypted);
247	247
248	248	for (A = 0x0000;A < cryptlen;A++)
249	249	{
250		int xor = 0;
	250	int xorval = 0;
251	251
252	252	UINT8 src = rom[A];
253	253
r4679	r4680
260	260	if (src & 0x80)
261	261	{
262	262	col = 3 - col;
263		xor = 0xa8;
	263	xorval = 0xa8;
264	264	}
265	265
266	266	/* decode the opcodes */
267		decrypted[A] = (src & ~0xa8) | (convtable[2*row][col] ^ xor);
	267	decrypted[A] = (src & ~0xa8) | (convtable[2*row][col] ^ xorval);
268	268
269	269	/* decode the data */
270		rom[A] = (src & ~0xa8) | (convtable[2*row+1][col] ^ xor);
	270	rom[A] = (src & ~0xa8) | (convtable[2*row+1][col] ^ xorval);
271	271
272	272	if (convtable[2*row][col] == 0xff)   /* table incomplete! (for development) */
273	273	decrypted[A] = 0xee;
r4679	r4680
462	462	const address_space *space = cputag_get_address_space(machine, cputag, ADDRESS_SPACE_PROGRAM);
463	463	UINT8 *rom = memory_region(machine, regiontag);
464	464	int bankstart;
465		decrypted = auto_malloc(0x6000*3);
	465	decrypted = auto_alloc_array(machine, UINT8, 0x6000*3);
466	466
467	467
468	468	for(bankstart=0;bankstart<0x6000*3;bankstart+=0x6000)
469	469	for (A = 0x0000;A < 0x6000;A++)
470	470	{
471		int xor = 0;
	471	int xorval = 0;
472	472
473	473	UINT8 src = rom[A+bankstart];
474	474
r4679	r4680
481	481	if (src & 0x80)
482	482	{
483	483	col = 3 - col;
484		xor = 0xa8;
	484	xorval = 0xa8;
485	485	}
486	486
487	487	/* decode the opcodes */
488		decrypted[A+bankstart] = (src & ~0xa8) | (convtable[2*row][col] ^ xor);
	488	decrypted[A+bankstart] = (src & ~0xa8) | (convtable[2*row][col] ^ xorval);
489	489
490	490	/* decode the data */
491		rom[A+bankstart] = (src & ~0xa8) | (convtable[2*row+1][col] ^ xor);
	491	rom[A+bankstart] = (src & ~0xa8) | (convtable[2*row+1][col] ^ xorval);
492	492	}
493	493
494	494	memory_configure_bank(machine, 1,0,3, memory_region(machine, regiontag),0x6000);
r4679	r4680
819	819
820	820	const address_space *space = cputag_get_address_space(machine, cputag, ADDRESS_SPACE_PROGRAM);
821	821	UINT8 *rom = memory_region(machine, cputag);
822		decrypted = auto_malloc(0x9000);
	822	decrypted = auto_alloc_array(machine, UINT8, 0x9000);
823	823
824	824	for (A = 0x0000;A < 0x9000;A++)
825	825	{
826		int xor = 0;
	826	int xorval = 0;
827	827
828	828	UINT8 src = rom[A];
829	829
r4679	r4680
836	836	if (src & 0x80)
837	837	{
838	838	col = 3 - col;
839		xor = 0xa8;
	839	xorval = 0xa8;
840	840	}
841	841
842	842	/* special handling for banked area */
r4679	r4680
844	844	row = (A & 1) + (((A >> 4) & 1) << 1) + (((A >> 8) & 1) << 2);
845	845
846	846	/* decode the opcodes */
847		decrypted[A] = (src & ~0xa8) | (convtable[2*row][col] ^ xor);
	847	decrypted[A] = (src & ~0xa8) | (convtable[2*row][col] ^ xorval);
848	848
849	849	/* decode the data */
850		rom[A] = (src & ~0xa8) | (convtable[2*row+1][col] ^ xor);
	850	rom[A] = (src & ~0xa8) | (convtable[2*row+1][col] ^ xorval);
851	851	}
852	852
853	853	memory_configure_bank(machine, 1,0,8, memory_region(machine, cputag)+0x7000,0x0400);
r4679	r4680
1119	1119
1120	1120	const address_space *space = cputag_get_address_space(machine, cputag, ADDRESS_SPACE_PROGRAM);
1121	1121	UINT8 *rom = memory_region(machine, cputag);
1122		UINT8 *decrypted = auto_malloc(0x8000);
	1122	UINT8 *decrypted = auto_alloc_array(machine, UINT8, 0x8000);
1123	1123
1124	1124	memory_set_decrypted_region(space, 0x0000, 0x7fff, decrypted);
1125	1125

src/mame/machine/dec0.c

r4679	r4680
463	463	static TIMER_CALLBACK( i8751_callback )
464	464	{
465	465	/* Signal main cpu microcontroller task is complete */
466		cpu_set_input_line(machine->cpu[0],5,HOLD_LINE);
467		i8751_timer=NULL;
	466	cputag_set_input_line(machine, "maincpu", 5, HOLD_LINE);
	467	i8751_timer = NULL;
468	468
469	469	logerror("i8751:  Timer called!!!\n");
470	470	}
r4679	r4680
473	473	void dec0_i8751_write(running_machine *machine, int data)
474	474	{
475	475	/* Writes to this address cause an IRQ to the i8751 microcontroller */
476		if (GAME==1) hbarrel_i8751_write(data);
477		if (GAME==2) baddudes_i8751_write(machine, data);
478		if (GAME==3) birdtry_i8751_write(machine, data);
	476	if (GAME == 1) hbarrel_i8751_write(data);
	477	if (GAME == 2) baddudes_i8751_write(machine, data);
	478	if (GAME == 3) birdtry_i8751_write(machine, data);
479	479
480		cpu_set_input_line(machine->cpu[0],5,HOLD_LINE);
	480	cputag_set_input_line(machine, "maincpu", 5, HOLD_LINE);
481	481
482	482	/* Simulate the processing time of the i8751, time value is guessed
483	483	if (i8751_timer)
r4679	r4680
525	525
526	526	robocop_shared_ram[offset]=data&0xff;
527	527
528		if (offset==0x7ff) /* A control address - not standard ram */
529		cpu_set_input_line(space->machine->cpu[2],0,HOLD_LINE);
	528	if (offset == 0x7ff) /* A control address - not standard ram */
	529	cputag_set_input_line(space->machine, "sub", 0, HOLD_LINE);
530	530	}
531	531
532	532	/******************************************************************************/
r4679	r4680
537	537	UINT8 *RAM = memory_region(machine, cputag);
538	538
539	539	/* Read each byte, decrypt it */
540		for (i=0x00000; i<0x10000; i++)
541		RAM[i]=(RAM[i] & 0x7e) | ((RAM[i] & 0x1) << 7) | ((RAM[i] & 0x80) >> 7);
	540	for (i = 0x00000; i < 0x10000; i++)
	541	RAM[i] = (RAM[i] & 0x7e) | ((RAM[i] & 0x1) << 7) | ((RAM[i] & 0x80) >> 7);
542	542	}
543	543
544	544	DRIVER_INIT( hippodrm )
545	545	{
546	546	UINT8 *RAM = memory_region(machine, "sub");
547	547
548		memory_install_readwrite16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x180000, 0x180fff, 0, 0, hippodrm_68000_share_r, hippodrm_68000_share_w);
549		memory_install_write16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xffc800, 0xffcfff, 0, 0, sprite_mirror_w);
	548	memory_install_readwrite16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x180000, 0x180fff, 0, 0, hippodrm_68000_share_r, hippodrm_68000_share_w);
	549	memory_install_write16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xffc800, 0xffcfff, 0, 0, sprite_mirror_w);
550	550
551	551	h6280_decrypt(machine, "sub");
552	552
553	553	/* The protection cpu has additional memory mapped protection! */
554		RAM[0x189]=0x60; /* RTS prot area */
555		RAM[0x1af]=0x60; /* RTS prot area */
556		RAM[0x1db]=0x60; /* RTS prot area */
557		RAM[0x21a]=0x60; /* RTS prot area */
	554	RAM[0x189] = 0x60; /* RTS prot area */
	555	RAM[0x1af] = 0x60; /* RTS prot area */
	556	RAM[0x1db] = 0x60; /* RTS prot area */
	557	RAM[0x21a] = 0x60; /* RTS prot area */
558	558	}
559	559
560	560	DRIVER_INIT( slyspy )
r4679	r4680
564	564	h6280_decrypt(machine, "audiocpu");
565	565
566	566	/* Slyspy sound cpu has some protection */
567		RAM[0xf2d]=0xea;
568		RAM[0xf2e]=0xea;
	567	RAM[0xf2d] = 0xea;
	568	RAM[0xf2e] = 0xea;
569	569	}
570	570
571	571	DRIVER_INIT( robocop )
572	572	{
573		memory_install_readwrite16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x180000, 0x180fff, 0, 0, robocop_68000_share_r, robocop_68000_share_w);
	573	memory_install_readwrite16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x180000, 0x180fff, 0, 0, robocop_68000_share_r, robocop_68000_share_w);
574	574	}
575	575
576	576	DRIVER_INIT( baddudes )
577	577	{
578		GAME=2;
	578	GAME = 2;
579	579	}
580	580
581	581	DRIVER_INIT( hbarrel )
582	582	{
583		GAME=1;
	583	GAME = 1;
584	584	{ /* Remove this patch once processing time of i8751 is simulated */
585	585	UINT16 *rom = (UINT16 *)memory_region(machine, "maincpu");
586	586	rom[0xb68/2] = 0x8008;
r4679	r4680
589	589
590	590	DRIVER_INIT( hbarrelw )
591	591	{
592		GAME=1;
	592	GAME = 1;
593	593	{ /* Remove this patch once processing time of i8751 is simulated */
594	594	UINT16 *rom = (UINT16 *)memory_region(machine, "maincpu");
595	595	rom[0xb3e/2] = 0x8008;

src/mame/machine/beezer.c

r4679	r4680
51	51	static WRITE8_DEVICE_HANDLER( b_via_0_pa_w )
52	52	{
53	53	if ((data & 0x08) == 0)
54		cpu_set_input_line(device->machine->cpu[1], INPUT_LINE_RESET, ASSERT_LINE);
	54	cputag_set_input_line(device->machine, "audiocpu", INPUT_LINE_RESET, ASSERT_LINE);
55	55	else
56		cpu_set_input_line(device->machine->cpu[1], INPUT_LINE_RESET, CLEAR_LINE);
	56	cputag_set_input_line(device->machine, "audiocpu", INPUT_LINE_RESET, CLEAR_LINE);
57	57
58	58	if ((data & 0x04) == 0)
59	59	{
r4679	r4680
117	117	else
118	118	{
119	119	UINT8 *rom = memory_region(space->machine, "maincpu") + 0x10000;
120		memory_install_readwrite8_handler(space, 0xc000, 0xcfff, 0, 0, SMH_BANK1, SMH_BANK1);
	120	memory_install_readwrite8_handler(space, 0xc000, 0xcfff, 0, 0, (read8_space_func)SMH_BANK(1), (write8_space_func)SMH_BANK(1));
121	121	memory_set_bankptr(space->machine, 1, rom + (data & 0x07) * 0x2000 + ((data & 0x08) ? 0x1000: 0));
122	122	}
123	123	}
124
125

src/mame/machine/lsasquad.c

r4679	r4680
18	18
19	19	static TIMER_CALLBACK( nmi_callback )
20	20	{
21		if (sound_nmi_enable) cpu_set_input_line(machine->cpu[1],INPUT_LINE_NMI,PULSE_LINE);
	21	if (sound_nmi_enable) cputag_set_input_line(machine, "audiocpu", INPUT_LINE_NMI, PULSE_LINE);
22	22	else pending_nmi = 1;
23	23	}
24	24
r4679	r4680
32	32	sound_nmi_enable = 1;
33	33	if (pending_nmi)
34	34	{
35		cpu_set_input_line(space->machine->cpu[1],INPUT_LINE_NMI,PULSE_LINE);
	35	cputag_set_input_line(space->machine, "audiocpu", INPUT_LINE_NMI, PULSE_LINE);
36	36	pending_nmi = 0;
37	37	}
38	38	}
r4679	r4680
145	145	if ((ddrB & 0x02) && (~data & 0x02) && (portB_out & 0x02))
146	146	{
147	147	portA_in = from_main;
148		if (main_sent) cpu_set_input_line(space->machine->cpu[2],0,CLEAR_LINE);
	148	if (main_sent) cputag_set_input_line(space->machine, "mcu", 0, CLEAR_LINE);
149	149	main_sent = 0;
150	150	//logerror("read command %02x from main cpu\n",portA_in);
151	151	}
r4679	r4680
169	169	//logerror("%04x: mcu_w %02x\n",cpu_get_pc(space->cpu),data);
170	170	from_main = data;
171	171	main_sent = 1;
172		cpu_set_input_line(space->machine->cpu[2],0,ASSERT_LINE);
	172	cputag_set_input_line(space->machine, "mcu", 0, ASSERT_LINE);
173	173	}
174	174
175	175	READ8_HANDLER( lsasquad_mcu_r )

src/mame/machine/williams.c

r4679	r4680
311	311	int combined_state = pia6821_get_irq_a(pia_1) | pia6821_get_irq_b(pia_1);
312	312
313	313	/* IRQ to the main CPU */
314		cpu_set_input_line(device->machine->cpu[0], M6809_IRQ_LINE, combined_state ? ASSERT_LINE : CLEAR_LINE);
	314	cputag_set_input_line(device->machine, "maincpu", M6809_IRQ_LINE, combined_state ? ASSERT_LINE : CLEAR_LINE);
315	315	}
316	316
317	317
318	318	static void williams_main_firq(const device_config *device, int state)
319	319	{
320	320	/* FIRQ to the main CPU */
321		cpu_set_input_line(device->machine->cpu[0], M6809_FIRQ_LINE, state ? ASSERT_LINE : CLEAR_LINE);
	321	cputag_set_input_line(device->machine, "maincpu", M6809_FIRQ_LINE, state ? ASSERT_LINE : CLEAR_LINE);
322	322	}
323	323
324	324
r4679	r4680
328	328	int combined_state = pia6821_get_irq_a(pia_2) | pia6821_get_irq_b(pia_2);
329	329
330	330	/* IRQ to the sound CPU */
331		cpu_set_input_line(device->machine->cpu[1], M6800_IRQ_LINE, combined_state ? ASSERT_LINE : CLEAR_LINE);
	331	cputag_set_input_line(device->machine, "soundcpu", M6800_IRQ_LINE, combined_state ? ASSERT_LINE : CLEAR_LINE);
332	332	}
333	333
334	334
r4679	r4680
346	346	int combined_state = pia6821_get_irq_b(pia_0) | pia6821_get_irq_a(pia_1) | pia6821_get_irq_b(pia_1);
347	347
348	348	/* IRQ to the main CPU */
349		cpu_set_input_line(device->machine->cpu[0], M6809_IRQ_LINE, combined_state ? ASSERT_LINE : CLEAR_LINE);
	349	cputag_set_input_line(device->machine, "maincpu", M6809_IRQ_LINE, combined_state ? ASSERT_LINE : CLEAR_LINE);
350	350	}
351	351
352	352
r4679	r4680
357	357	int combined_state = pia6821_get_irq_a(pia_0) | pia6821_get_irq_b(pia_0) | pia6821_get_irq_a(pia_1) | pia6821_get_irq_b(pia_1);
358	358
359	359	/* IRQ to the main CPU */
360		cpu_set_input_line(device->machine->cpu[0], M6809_IRQ_LINE, combined_state ? ASSERT_LINE : CLEAR_LINE);
	360	cputag_set_input_line(device->machine, "maincpu", M6809_IRQ_LINE, combined_state ? ASSERT_LINE : CLEAR_LINE);
361	361	}
362	362
363	363
r4679	r4680
452	452
453	453	static STATE_POSTLOAD( williams2_postload )
454	454	{
455		const address_space *space = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM);
	455	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
456	456	williams2_bank_select_w(space, 0, vram_bank);
457	457	}
458	458
459	459
460	460	MACHINE_RESET( williams2 )
461	461	{
462		const address_space *space = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM);
	462	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
463	463
464	464	/* configure memory banks */
465	465	memory_configure_bank(machine, 1, 0, 1, williams_videoram, 0);
r4679	r4680
508	508	{
509	509	/* page 0 is video ram */
510	510	case 0:
511		memory_install_read8_handler(space, 0x0000, 0x8fff, 0, 0, SMH_BANK1);
512		memory_install_write8_handler(space, 0x8000, 0x87ff, 0, 0, SMH_BANK4);
	511	memory_install_read8_handler(space, 0x0000, 0x8fff, 0, 0, (read8_space_func)SMH_BANK(1));
	512	memory_install_write8_handler(space, 0x8000, 0x87ff, 0, 0, (write8_space_func)SMH_BANK(4));
513	513	memory_set_bank(space->machine, 1, 0);
514	514	memory_set_bankptr(space->machine, 4, &williams_videoram[0x8000]);
515	515	break;
r4679	r4680
517	517	/* pages 1 and 2 are ROM */
518	518	case 1:
519	519	case 2:
520		memory_install_read8_handler(space, 0x0000, 0x8fff, 0, 0, SMH_BANK1);
521		memory_install_write8_handler(space, 0x8000, 0x87ff, 0, 0, SMH_BANK4);
	520	memory_install_read8_handler(space, 0x0000, 0x8fff, 0, 0, (read8_space_func)(read8_space_func)(read8_space_func)(read8_space_func)(read8_space_func)(read8_space_func)(read8_space_func)(read8_space_func)(read8_space_func)(read8_space_func)(read8_space_func)(read8_space_func)(read8_space_func)(read8_space_func)(read8_space_func)(read8_space_func)(read8_space_func)SMH_BANK(1));
	521	memory_install_write8_handler(space, 0x8000, 0x87ff, 0, 0, (write8_space_func)(write8_space_func)(write8_space_func)(write8_space_func)(write8_space_func)(write8_space_func)(write8_space_func)(write8_space_func)(write8_space_func)(write8_space_func)(write8_space_func)(write8_space_func)(write8_space_func)(write8_space_func)(write8_space_func)(write8_space_func)(write8_space_func)SMH_BANK(4));
522	522	memory_set_bank(space->machine, 1, 1 + ((vram_bank & 6) >> 1));
523	523	memory_set_bankptr(space->machine, 4, &williams_videoram[0x8000]);
524	524	break;
525	525
526	526	/* page 3 accesses palette RAM; the remaining areas are as if page 1 ROM was selected */
527	527	case 3:
528		memory_install_readwrite8_handler(space, 0x8000, 0x87ff, 0, 0, SMH_BANK4, williams2_paletteram_w);
	528	memory_install_readwrite8_handler(space, 0x8000, 0x87ff, 0, 0, (read8_space_func)SMH_BANK(4), williams2_paletteram_w);
529	529	memory_set_bank(space->machine, 1, 1 + ((vram_bank & 4) >> 1));
530	530	memory_set_bankptr(space->machine, 4, paletteram);
531	531	break;
r4679	r4680
587	587
588	588	CUSTOM_INPUT( williams_mux_r )
589	589	{
590		const char *tag = param;
	590	const char *tag = (const char *)param;
591	591
592	592	if (port_select != 0)
593	593	tag += strlen(tag) + 1;
r4679	r4680
730	730
731	731	static STATE_POSTLOAD( defender_postload )
732	732	{
733		const address_space *space = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM);
	733	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
734	734	defender_bank_select_w(space, 0, vram_bank);
735	735	}
736	736
737	737
738	738	MACHINE_RESET( defender )
739	739	{
740		const address_space *space = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM);
	740	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
741	741
742	742	MACHINE_RESET_CALL(williams_common);
743	743
r4679	r4680
777	777	case 7:
778	778	case 8:
779	779	case 9:
780		memory_install_readwrite8_handler(space, 0xc000, 0xcfff, 0, 0, SMH_BANK1, SMH_UNMAP);
	780	memory_install_readwrite8_handler(space, 0xc000, 0xcfff, 0, 0, (read8_space_func)SMH_BANK(1), (write8_space_func)SMH_UNMAP);
781	781	memory_set_bank(space->machine, 1, vram_bank - 1);
782	782	break;
783	783
784	784	/* pages A-F are not connected */
785	785	default:
786		memory_install_readwrite8_handler(space, 0xc000, 0xcfff, 0, 0, SMH_NOP, SMH_NOP);
	786	memory_install_readwrite8_handler(space, 0xc000, 0xcfff, 0, 0, (read8_space_func)SMH_NOP, (write8_space_func)SMH_NOP);
787	787	break;
788	788	}
789	789	}
r4679	r4680
883	883
884	884	static READ8_DEVICE_HANDLER( lottofun_input_port_0_r )
885	885	{
886		const address_space *space = cpu_get_address_space(device->machine->cpu[0], ADDRESS_SPACE_PROGRAM);
	886	const address_space *space = cputag_get_address_space(device->machine, "maincpu", ADDRESS_SPACE_PROGRAM);
887	887
888	888	/* merge in the ticket dispenser status */
889		return input_port_read(device->machine, "IN0") | ticket_dispenser_r(space,offset);
	889	return input_port_read(device->machine, "IN0") | ticket_dispenser_r(space, offset);
890	890	}
891	891
892	892

src/mame/machine/system16.c

r4679	r4680
8	8	UINT16 *sys16_extraram2;
9	9	UINT16 *sys16_extraram3;
10	10
11		static void patch_codeX( UINT16 *mem, offs_t offset, int data ){
	11	static void patch_codeX( UINT16 *mem, offs_t offset, int data )
	12	{
12	13	int aligned_offset = offset&0xfffffe;
13	14	int old_word = mem[aligned_offset/2];
14	15
r4679	r4680
20	21	mem[aligned_offset/2] = data;
21	22	}
22	23
23		void sys16_patch_code( running_machine *machine, const sys16_patch *data, int count ){
	24	void sys16_patch_code( running_machine *machine, const sys16_patch *data, int count )
	25	{
24	26	int i;
25	27	UINT16 *mem = (UINT16 *)memory_region(machine, "maincpu");
26	28	for (i=0; i<count; i++)
r4679	r4680
28	30	}
29	31
30	32
31		MACHINE_RESET( sys16_onetime ){
	33	MACHINE_RESET( sys16_onetime )
	34	{
32	35	sys16_bg1_trans=0;
33	36	sys16_rowscroll_scroll=0;
34	37	sys18_splittab_bg_x=0;
r4679	r4680
55	58
56	59	/* sound */
57	60
58		static void sound_cause_nmi( const device_config *device, int chip ){
	61	static void sound_cause_nmi( const device_config *device, int chip )
	62	{
59	63	/* upd7759 callback */
60		cpu_set_input_line(device->machine->cpu[1], INPUT_LINE_NMI, PULSE_LINE);
	64	cputag_set_input_line(device->machine, "soundcpu", INPUT_LINE_NMI, PULSE_LINE);
61	65	}
62	66
63	67

src/mame/machine/namcond1.c

r4679	r4680
48	48	namcond1_h8_irq5_enabled = 0;
49	49
50	50	// halt the MCU
51		cpu_set_input_line(machine->cpu[1],INPUT_LINE_RESET,ASSERT_LINE);
	51	cputag_set_input_line(machine, "mcu", INPUT_LINE_RESET, ASSERT_LINE);
52	52	}
53	53
54	54	// instance of the shared ram pointer
r4679	r4680
97	97	// this is a kludge until we emulate the h8
98	98	if ((namcond1_h8_irq5_enabled == 0) && (data != 0x0000))
99	99	{
100		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_RESET, CLEAR_LINE);
	100	cputag_set_input_line(space->machine, "mcu", INPUT_LINE_RESET, CLEAR_LINE);
101	101	}
102	102	namcond1_h8_irq5_enabled = ( data != 0x0000 );
103	103	break;

src/mame/machine/cps2crpt.c

r4679	r4680
635	635	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
636	636	UINT16 *rom = (UINT16 *)memory_region(machine, "maincpu");
637	637	int length = memory_region_length(machine, "maincpu");
638		UINT16 *dec = auto_malloc(length);
	638	UINT16 *dec = auto_alloc_array(machine, UINT16, length/2);
639	639	int i;
640	640	UINT32 key1[4];
641	641	struct optimised_sbox sboxes1[4*4];
r4679	r4680
721	721	}
722	722
723	723	memory_set_decrypted_region(space, 0x000000, length - 1, dec);
724		m68k_set_encrypted_opcode_range(machine->cpu[0],0,length);
	724	m68k_set_encrypted_opcode_range(cputag_get_cpu(machine, "maincpu"), 0, length);
725	725	}
726	726
727	727
r4679	r4680
961	961	{ "progearj", { 0x9f7edc56,0x39fb47be }, 0x400000 },   // 0C81 63A1 B8D3  cmpi.l  #$63A1B8D3,D1
962	962	{ "progeara", { 0x658ab128,0xfddc9b5e }, 0x400000 },   // 0C81 63A1 B8D3  cmpi.l  #$63A1B8D3,D1
963	963
964		{ 0 }   // end of table
	964	{ NULL, { 0,0 }, 0 }   // end of table
965	965	};
966	966
967	967

src/mame/machine/decocrpt.c

r4679	r4680
602	602	{
603	603	UINT16 *rom = (UINT16 *)memory_region(machine, rgntag);
604	604	int len = memory_region_length(machine, rgntag)/2;
605		UINT16 *buffer = malloc_or_die(len*2);
	605	UINT16 *buffer = alloc_array_or_die(UINT16, len);
606	606	int i;
607	607
608	608	/* we work on 16-bit words but data is loaded as 8-bit, so swap bytes on LSB machines */

src/mame/machine/opwolf.c

r4679	r4680
695	695	{
696	696	// Simulate time for command to execute (exact timing unknown, this is close)
697	697	current_cmd=0xf5;
698		timer_set(machine, cpu_clocks_to_attotime(machine->cpu[0],80000), NULL, 0, opwolf_timer_callback);
	698	timer_set(machine, cputag_clocks_to_attotime(machine, "maincpu", 80000), NULL, 0, opwolf_timer_callback);
699	699	}
700	700	cchip_last_7a=cchip_ram[0x7a];
701	701
r4679	r4680
720	720
721	721	void opwolf_cchip_init(running_machine *machine)
722	722	{
723		cchip_ram=auto_malloc(0x400 * 8);
	723	cchip_ram=auto_alloc_array(machine, UINT8, 0x400 * 8);
724	724
725	725	state_save_register_global(machine, current_bank);
726	726	state_save_register_global(machine, current_cmd);

src/mame/machine/starwars.c

r4679	r4680
174	174	UINT8 *src = memory_region(machine, "user2");
175	175	int cnt, val;
176	176
177		PROM_STR = auto_malloc(1024 * sizeof(PROM_STR[0]));
178		PROM_MAS = auto_malloc(1024 * sizeof(PROM_MAS[0]));
179		PROM_AM = auto_malloc(1024 * sizeof(PROM_AM[0]));
	177	PROM_STR = auto_alloc_array(machine, UINT8, 1024);
	178	PROM_MAS = auto_alloc_array(machine, UINT8, 1024);
	179	PROM_AM = auto_alloc_array(machine, UINT8, 1024);
180	180
181	181	for (cnt = 0; cnt < 1024; cnt++)
182	182	{

src/mame/machine/nb1413m3.c

r4679	r4680
55	55
56	56	if (nb1413m3_nmi_enable)
57	57	{
58		cpu_set_input_line(machine->cpu[0], INPUT_LINE_NMI, PULSE_LINE);
	58	cputag_set_input_line(machine, "maincpu", INPUT_LINE_NMI, PULSE_LINE);
59	59	nb1413m3_nmi_count++;
60	60	}
61	61

src/mame/machine/atarifb.c

r4679	r4680
125	125
126	126	WRITE8_HANDLER( atarifb_out3_w )
127	127	{
128		int loop = cpu_getiloops(space->machine->cpu[0]);
	128	int loop = cpu_getiloops(cputag_get_cpu(space->machine, "maincpu"));
129	129
130	130	switch (loop)
131	131	{

src/mame/machine/simpsons.c

r4679	r4680
98	98
99	99	READ8_HANDLER( simpsons_sound_interrupt_r )
100	100	{
101		cpu_set_input_line_and_vector(space->machine->cpu[1], 0, HOLD_LINE, 0xff );
	101	cputag_set_input_line_and_vector(space->machine, "audiocpu", 0, HOLD_LINE, 0xff );
102	102	return 0x00;
103	103	}
104	104
r4679	r4680
123	123	{
124	124	UINT8 *RAM = memory_region(machine, "maincpu");
125	125
126		konami_configure_set_lines(machine->cpu[0], simpsons_banking);
	126	konami_configure_set_lines(cputag_get_cpu(machine, "maincpu"), simpsons_banking);
127	127
128	128	paletteram = &RAM[0x88000];
129	129	simpsons_xtraram = &RAM[0x89000];

src/mame/machine/model1.c

r4679	r4680
1923	1923	void model1_tgp_reset(running_machine *machine, int swa)
1924	1924	{
1925	1925	ram_adr = 0;
1926		ram_data = auto_malloc(0x10000*4);
	1926	ram_data = auto_alloc_array(machine, UINT32, 0x10000);
1927	1927	memset(ram_data, 0, 0x10000*4);
1928	1928
1929	1929	fifoout_rpos = 0;
r4679	r4680
1969	1969	static UINT32 copro_fifoin_data[FIFO_SIZE];
1970	1970	static int copro_fifoin_num;
1971	1971
1972		void model1_vr_tgp_reset( void )
	1972	void model1_vr_tgp_reset( running_machine *machine )
1973	1973	{
1974	1974	ram_adr = 0;
1975		ram_data = auto_malloc(0x8000*4);
	1975	ram_data = auto_alloc_array(machine, UINT32, 0x8000);
1976	1976	memset(ram_data, 0, 0x8000*4);
1977	1977
1978	1978	copro_fifoout_rpos = 0;
r4679	r4680
2032	2032	if (copro_fifoout_num == 0)
2033	2033	{
2034	2034	// Reading from empty FIFO causes the v60 to enter wait state
2035		v60_stall(space->machine->cpu[0]);
	2035	v60_stall(cputag_get_cpu(space->machine, "maincpu"));
2036	2036
2037	2037	timer_call_after_resynch(space->machine, NULL, 0, NULL);
2038	2038

src/mame/machine/seicop.c

r4679	r4680
871	871	/*WRONG*/
872	872	case (0x65c/2):
873	873	{
874		soundlatch_w(space,1,data&0xff);
875		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_NMI, PULSE_LINE );
	874	soundlatch_w(space, 1, data & 0xff);
	875	cputag_set_input_line(space->machine, "audiocpu", INPUT_LINE_NMI, PULSE_LINE );
876	876	break;
877	877	}
878	878	/*video regs (not scrollram,something else)*/
r4679	r4680
888	888	/*bootleg sound HW*/
889	889	/*case (0x740/2):
890	890	{
891		soundlatch_w(1,data&0x00ff);
892		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_NMI, PULSE_LINE );
	891	soundlatch_w(space, 1, data & 0x00ff);
	892	cputag_set_input_line(space->machine, "audiocpu", INPUT_LINE_NMI, PULSE_LINE );
893	893	break;
894	894	}*/
895	895	}

src/mame/machine/ajax.c

r4679	r4680
142	142	watchdog_reset_w(space, 0, data);
143	143	else{
144	144	if (firq_enable)   /* Cause interrupt on slave CPU */
145		cpu_set_input_line(space->machine->cpu[1], M6809_FIRQ_LINE, HOLD_LINE);
	145	cputag_set_input_line(space->machine, "sub", M6809_FIRQ_LINE, HOLD_LINE);
146	146	}
147	147	break;
148	148	case 0x01:   /* Cause interrupt on audio CPU */
149		cpu_set_input_line(space->machine->cpu[2], 0, HOLD_LINE);
	149	cputag_set_input_line(space->machine, "audiocpu", 0, HOLD_LINE);
150	150	break;
151	151	case 0x02:   /* Sound command number */
152	152	soundlatch_w(space,offset,data);
r4679	r4680
204	204
205	205	MACHINE_RESET( ajax )
206	206	{
207		const address_space *space = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM);
	207	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
208	208	ajax_bankswitch_w(space, 0, 0);
209	209	ajax_bankswitch_2_w(space, 0, 0);
210	210	}

src/mame/machine/bigevglf.c

r4679	r4680
45	45
46	46	if ((ddrB & 0x02) && (~portB_out & 0x02) && (data & 0x02)) /* positive going transition of the clock */
47	47	{
48		cpu_set_input_line(space->machine->cpu[3],0,CLEAR_LINE);
	48	cputag_set_input_line(space->machine, "mcu", 0, CLEAR_LINE);
49	49	main_sent = 0;
50	50
51	51	}
r4679	r4680
86	86	{
87	87	portA_in = data;
88	88	main_sent = 1;
89		cpu_set_input_line(space->machine->cpu[3],0,ASSERT_LINE);
	89	cputag_set_input_line(space->machine, "mcu", 0, ASSERT_LINE);
90	90	}
91	91
92	92

src/mame/machine/bagman.c

r4679	r4680
212	212	{
213	213	UINT8 line;
214	214
215		line = offset*4;
216		columnvalue[line  ] = data&1;
217		columnvalue[line+1] = 1-(data&1);
	215	line = offset * 4;
	216	columnvalue[line    ] = data & 1;
	217	columnvalue[line + 1] = 1 - (data & 1);
218	218	}
219	219
220	220	MACHINE_RESET( bagman )
221	221	{
222		const address_space *space = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM);
223		bagman_pal16r6_w(space,0,1);   /*pin 2*/
224		bagman_pal16r6_w(space,1,1);   /*pin 3*/
225		bagman_pal16r6_w(space,2,1);   /*pin 4*/
226		bagman_pal16r6_w(space,3,1);   /*pin 5*/
227		bagman_pal16r6_w(space,4,1);   /*pin 6*/
228		bagman_pal16r6_w(space,5,1);   /*pin 7*/
229		bagman_pal16r6_w(space,6,1);   /*pin 8*/
230		bagman_pal16r6_w(space,7,1);   /*pin 9*/
	222	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	223	bagman_pal16r6_w(space, 0, 1);   /*pin 2*/
	224	bagman_pal16r6_w(space, 1, 1);   /*pin 3*/
	225	bagman_pal16r6_w(space, 2, 1);   /*pin 4*/
	226	bagman_pal16r6_w(space, 3, 1);   /*pin 5*/
	227	bagman_pal16r6_w(space, 4, 1);   /*pin 6*/
	228	bagman_pal16r6_w(space, 5, 1);   /*pin 7*/
	229	bagman_pal16r6_w(space, 6, 1);   /*pin 8*/
	230	bagman_pal16r6_w(space, 7, 1);   /*pin 9*/
231	231	update_pal();
232	232	}
233	233
234	234	READ8_HANDLER( bagman_pal16r6_r )
235	235	{
236	236	update_pal();
237		return   (outvalue[6]) + (outvalue[5]<<1) + (outvalue[4]<<2) +
238		(outvalue[3]<<3) + (outvalue[2]<<4) + (outvalue[1]<<5);
	237	return   (outvalue[6]) + (outvalue[5] << 1) + (outvalue[4] << 2) +
	238	(outvalue[3] << 3) + (outvalue[2] << 4) + (outvalue[1] << 5);
239	239
240	240	/* Bagman schematics show that this is right mapping order of PAL outputs to bits.
241	241	** This is the PAL 16R6 shown almost in the middle of the schematics.

src/mame/machine/jackal.c

r4679	r4680
23	23
24	24	// HACK: running at the nominal clock rate, music stops working
25	25	// at the beginning of the game. This fixes it.
26		cpu_set_clockscale(machine->cpu[1], 1.2f);
	26	cpu_set_clockscale(cputag_get_cpu(machine, "slave"), 1.2f);
27	27
28	28	memory_set_bankptr(machine, 1,&rgn[0x4000]);
29	29	jackal_rambank = rgn;

src/mame/machine/mw8080bw.c

r4679	r4680
66	66	int vpos = video_screen_get_vpos(machine->primary_screen);
67	67	UINT8 counter = vpos_to_vysnc_chain_counter(vpos);
68	68	UINT8 vector = 0xc7 | ((counter & 0x40) >> 2) | ((~counter & 0x40) >> 3);
69		cpu_set_input_line_and_vector(machine->cpu[0], 0, HOLD_LINE, vector);
	69	cputag_set_input_line_and_vector(machine, "maincpu", 0, HOLD_LINE, vector);
70	70
71	71	/* set up for next interrupt */
72	72	if (counter == MW8080BW_INT_TRIGGER_COUNT_1)

src/mame/mamedriv.c

r4679	r4680
339	339	DRIVER( ccboot2 )   /* bootleg */
340	340	DRIVER( ckong )      /* (c) 1981 Falcon */
341	341	DRIVER( ckonga )   /* (c) 1981 Falcon */
	342	DRIVER( ckong2j )   /* (c) 1981 Falcon */
342	343	DRIVER( ckongjeu )   /* bootleg */
343	344	DRIVER( ckongo )   /* bootleg */
344	345	DRIVER( ckongalc )   /* bootleg */
r4679	r4680
647	648	DRIVER( xevios )   /* bootleg */
648	649	DRIVER( battles )   /* bootleg */
649	650	DRIVER( sxevious )   /* (c) 1984 */
	651	DRIVER( sxeviousj )   /* (c) 1984 */
650	652	DRIVER( superpac )   /* (c) 1982 */
651	653	DRIVER( superpcm )   /* (c) 1982 Midway */
652	654	DRIVER( pacnpal )   /* (c) 1983 */
r4679	r4680
895	897	DRIVER( motoxgo )   /* (c) 1997 */
896	898	DRIVER( timecrs2 )   /* (c) 1997 */
897	899	DRIVER( timcrs2b )   /* (c) 1997 */
	900	DRIVER( panicprk )   /* (c) 1998 */
898	901	DRIVER( 500gp )      /* (c) 1999 */
899	902	DRIVER( finfurl2 )   /* (c) 1999 */
900	903	DRIVER( finfrl2j )   /* (c) 1999 */
r4679	r4680
1378	1381	DRIVER( andromed )   /* (c) 1979 */
1379	1382	DRIVER( ipminvad )   /* M10 no copyright notice */
1380	1383	DRIVER( ipminva1 )   /* M10 incomplete dump */
	1384	DRIVER( ptrmj )      /* M14 (c) 1979  */
1381	1385	DRIVER( skychut )   /* Irem [1980] */
1382	1386	DRIVER( spacbeam )   /* M15 no copyright notice */
1383	1387	DRIVER( greenber )   /* Irem */
r4679	r4680
1618	1622	DRIVER( pitnruna )   /* PR  (c) 1984 Taito Corporation */
1619	1623	DRIVER( lkage )      /* A54 (c) 1984 Taito Corporation */
1620	1624	DRIVER( lkageo )   /* A54 (c) 1984 Taito Corporation */
	1625	DRIVER( lkageoo )   /* A54 (c) 1984 Taito Corporation */
1621	1626	DRIVER( lkageb )   /* bootleg */
1622	1627	DRIVER( lkageb2 )   /* bootleg */
1623	1628	DRIVER( lkageb3 )   /* bootleg */
r4679	r4680
1904	1909	DRIVER( scia )      /* C09 (c) 1989 Taito Corporation Japan (World) */
1905	1910	DRIVER( scij )      /* C09 (c) 1989 Taito Corporation Japan (World) */
1906	1911	DRIVER( sciu )      /* C09 (c) 1989 Taito America Corporation (US) */
	1912	DRIVER( scin )      /* C09 (c) 1991 Taito Corporation Japan (Negro Torino hack) */
1907	1913	DRIVER( bshark )   /* C34 (c) 1989 Taito America Corporation (US) */
1908	1914	DRIVER( bsharkj )   /* C34 (c) 1989 Taito Corporation (Japan) */
1909	1915	DRIVER( aquajack )   /* B77 (c) 1990 Taito Corporation Japan (World) */
r4679	r4680
2426	2432	DRIVER( 1943 )      /*  6/1987 (c) 1987 (US) */
2427	2433	DRIVER( 1943j )      /*  6/1987 (c) 1987 (Japan) */
2428	2434	DRIVER( blktiger )   /*  8/1987 (c) 1987 (US) */
2429		DRIVER( bktigrb1 )   /* bootleg */
2430		DRIVER( bktigrb2 )   /* bootleg */
	2435	DRIVER( blktigerb1 )/* bootleg */
	2436	DRIVER( blktigerb2 )/* bootleg */
2431	2437	DRIVER( blkdrgon )   /*  8/1987 (c) 1987 (Japan) */
2432		DRIVER( blkdrgnb )   /* bootleg, hacked to say Black Tiger */
	2438	DRIVER( blkdrgonb )   /* bootleg, hacked to say Black Tiger */
2433	2439	DRIVER( sf )      /*  8/1987 (c) 1987 (World) */
2434	2440	DRIVER( sfus )      /*  8/1987 (c) 1987 (US) */
2435	2441	DRIVER( sfjp )      /*  8/1987 (c) 1987 (Japan) */
r4679	r4680
3167	3173	DRIVER( ddr4mj )   /* 2000 - Dance Dance Revolution 4th Mix (G*A33 VER. JAA) */
3168	3174	DRIVER( ddr4ms )   /* 2000 - Dance Dance Revolution Solo 4th Mix (G*A33 VER. ABA) */
3169	3175	DRIVER( ddr4msj )   /* 2000 - Dance Dance Revolution Solo 4th Mix (G*A33 VER. JBA) */
	3176	DRIVER( dsfdr )      /* 2000 - Dancing Stage Featuring Disney's Rave (GCA37JAA) */
3170	3177	DRIVER( ddrusa )   /* 2000 - Dance Dance Revolution USA (G*A44 VER. UAA) */
3171	3178	DRIVER( ddr4mp )   /* 2000 - Dance Dance Revolution 4th Mix Plus (G*A34 VER. JAA) */
3172	3179	DRIVER( ddr4mps )   /* 2000 - Dance Dance Revolution 4th Mix Plus Solo (G*A34 VER. JAA) */
r4679	r4680
4226	4233	DRIVER( mt_mwalk )   /* 40 */
4227	4234	DRIVER( mt_crack )   /* 41 */
4228	4235	/* 42 */
4229		/* 43 */
	4236	DRIVER( mt_shado )   /* 43 */
4230	4237	DRIVER( mt_arrow )   /* 44 */
4231	4238	/* 45 */
4232	4239	/* 46 */
r4679	r4680
4234	4241	DRIVER( mt_wwar )   /* 48 */
4235	4242	DRIVER( mt_bbros )   /* 49 */
4236	4243	/* 50 */
4237		/* 51 */
	4244	DRIVER( mt_srage )   /* 51 */
4238	4245	DRIVER( mt_sonic )   /* 52 */
4239	4246	DRIVER( mt_sonia )   /* ^^ */
4240	4247	DRIVER( mt_fshrk )   /* 53 */
r4679	r4680
4283	4290	/* 1999.05 Taisen Puzzle Kurutto Stone */
4284	4291	/* 1999.06 Ringout 4x4 */
4285	4292	DRIVER( f355bios )   /* 1999.07 F355 Challenge */
	4293	DRIVER( f355 )
4286	4294	DRIVER( shangril )   /* 1999.08 Dengen Tenshi Taisen Janshi Shangri-la */
4287	4295	/* 1999.08 Unou Nouryoku Check Machine Touch de UNO! */
4288	4296	DRIVER( vs2_2k )   /* 1999.08 Virtua Striker 2 version 2000 */
r4679	r4680
4394	4402	DRIVER( undefeat )   /* 2005.10 Under Defeat */
4395	4403	/* 2005.12 Radirgy (Rev. A) */
4396	4404	DRIVER( kurucham )   /* 2006.03 Kurukuru Chameleon */
4397		DRIVER( trgheart )   /* 2006.05 Trigger Heart Exelica */
	4405	/* 2006.05 Trigger Heart Exelica */
4398	4406	/* 2006.07 Touch de Zunou */
4399	4407	/* 2006.08 Senkou no Rondo SP */
4400		DRIVER( jingystm )   /* 2006.09 Jingi Storm */
4401		DRIVER( karous )   /* 2006.11 Karous */
	4408	/* 2006.09 Jingi Storm */
	4409	/* 2006.11 Karous */
4402	4410	/* 2006.12 Guilty Gear XX Accent Core */
4403		DRIVER( meltyb )   /* 2006.12 Melty Blood Act Cadenza ver.B */
4404		DRIVER( takoron )   /* 2006.12.16 Noukone Puzzle Takoron */
4405		DRIVER( meltyba )   /* 2007.03 Melty Blood Act Cadenza ver.B Syuuseiban(ver.B2) */
	4411	/* 2006.12 Melty Blood Act Cadenza ver.B */
	4412	/* 2006.12.16 Noukone Puzzle Takoron */
	4413	/* 2007.03 Melty Blood Act Cadenza ver.B Syuuseiban(ver.B2) */
4406	4414
4407	4415	DRIVER( ngdup23a )   /* DIMM Firmware Updater */
4408	4416	DRIVER( ngdup23c )
r4679	r4680
4529	4537	/* 2005.04 Virtua Striker 4 ver.A */
4530	4538	/* 2005.08 Avalon no Kagi ver.2.5 Kagi Seisen */
4531	4539	/* 2005.12 Mario Kart Arcade Grand Prix */
4532		DRIVER( vs42006 )   /* 2006.05 Virtua Striker 4 ver.2006 */
	4540	/* 2006.05 Virtua Striker 4 ver.2006 */
4533	4541	/* 2007.03 Mario Kart Arcade Grand Prix 2 */
4534	4542
4535	4543	DRIVER( tfupdate )   /* Triforce GDROM Boot Update (GDT-0011) */
r4679	r4680
4695	4703	DRIVER( boomrang )   /* (c) 1983 */
4696	4704	DRIVER( boomrana )   /* (c) 1983 */
4697	4705	DRIVER( kamikcab )   /* (c) 1984 */
	4706	DRIVER( yellowcj )   /* (c) 1984 */
4698	4707	DRIVER( yellowcb )   /* bootleg */
4699	4708	DRIVER( liberate )   /* (c) 1984  Data East Corporation */
4700	4709	DRIVER( dualaslt )   /* (c) 1984  Data East USA (US) */
r4679	r4680
5016	5025	DRIVER( spbactn )   /* 9002 - (c) 1991 Tecmo */
5017	5026	DRIVER( spbactnj )   /* 9002 - (c) 1991 Tecmo */
5018	5027	DRIVER( fstarfrc )   /* (c) 1992 Tecmo */
	5028	DRIVER( fstarfrcj )   /* (c) 1992 Tecmo */
5019	5029	DRIVER( ginkun )   /* (c) 1995 Tecmo */
5020	5030	DRIVER( deroon )   /* (c) 1996 Tecmo */
5021	5031	DRIVER( tkdensho )   /* (c) 1996 Tecmo */
r4679	r4680
5170	5180	DRIVER( aliensu )   /* GX875 (c) 1990 (US) */
5171	5181	DRIVER( aliensj )   /* GX875 (c) 1990 (Japan) */
5172	5182	DRIVER( aliensj2 )   /* GX875 (c) 1990 (Japan) */
	5183	DRIVER( aliensa )   /* GX875 (c) 1990 (Asia) */
5173	5184	DRIVER( suratk )   /* GX911 (c) 1990 (World) */
5174	5185	DRIVER( suratka )   /* GX911 (c) 1990 (Asia) */
5175	5186	DRIVER( suratkj )   /* GX911 (c) 1990 (Japan) */
r4679	r4680
5921	5932	DRIVER( hydrap2 )   /* (proto)          (c) 1990 */
5922	5933	DRIVER( pitfight )   /* 136081           (c) 1990 */
5923	5934	DRIVER( pitfigh6 )   /* 136081           (c) 1990 */
	5935	DRIVER( pitfigh5 )   /* 136081           (c) 1990 */
5924	5936	DRIVER( pitfigh4 )   /* 136081           (c) 1990 */
5925	5937	DRIVER( pitfigh3 )   /* 136081           (c) 1990 */
5926	5938	DRIVER( pitfighj )   /* Japan */
r4679	r4680
6165	6177	DRIVER( karnovr )   /* 0066 (c) 1994 Data East Corporation */
6166	6178	DRIVER( gururin )   /* 0067 (c) 1994 Face */
6167	6179	DRIVER( pspikes2 )   /* 0068 (c) 1994 Video System Co. */
	6180	/* Super Volley '94 was once released in Mar.1994, and recalled. Then released as Power Spikes 2 (with some tweaks). */
6168	6181	DRIVER( fatfury3 )   /* 0069 (c) 1995 SNK */
6169	6182	DRIVER( zupapa )   /* 0070 Zupapa - released in 2001, 1994 prototype probably exists */
6170	6183	/* 0071 Bang Bang Busters (prototype) 1994 Visco */
r4679	r4680
6222	6235	DRIVER( kof96h )   /* 0214 (c) 1996 SNK */
6223	6236	DRIVER( ssideki4 )   /* 0215 (c) 1996 SNK */
6224	6237	DRIVER( kizuna )   /* 0216 (c) 1996 SNK */
	6238	/*  Fu-un Super Tag Battle Special Version (4-player battle available) exists */
6225	6239	DRIVER( ninjamas )   /* 0217 (c) 1996 ADK / SNK */
6226	6240	DRIVER( ragnagrd )   /* 0218 (c) 1996 Saurus */
6227	6241	DRIVER( pgoal )      /* 0219 (c) 1996 Saurus */
r4679	r4680
6346	6360	/* Hyper NeoGeo 64 uses a 3 digit rom code? */
6347	6361
6348	6362	DRIVER( hng64 )
6349		DRIVER( roadedge )    /* 001? Roads Edge / Round Trip RV */
6350		/* 002? Samurai Shodown 64 / Samurai Spirits 64 */
6351		/* 003? Xtreme Rally / Off Beat Racer! */
6352		/* 004? Beast Busters: Second Nightmare */
6353		DRIVER( sams64_2 )   /* 005? Samurai Shodown: Warrior's Rage / Samurai Spirits: Asura Zanmaden */
6354		DRIVER( fatfurwa )   /* 006? Fatal Fury: Wild Ambition / Garou Densetsu: Wild Ambition */
6355		DRIVER( buriki )   /* 007 (c) 1999 SNK */
	6363	DRIVER( roadedge )    /* 001 1997/09/10 Roads Edge / Round Trip RV */
	6364	DRIVER( sams64 )   /* 002 1997/12/19 Samurai Shodown 64 / Samurai Spirits 64 */
	6365	DRIVER( xrally )   /* 003 1998/05/13 Xtreme Rally / Off Beat Racer! */
	6366	DRIVER( bbust2 )   /* 004 1998/09/11 Beast Busters: Second Nightmare */
	6367	DRIVER( sams64_2 )   /* 005 1998/10/16 Samurai Shodown: Warrior's Rage / Samurai Spirits: Asura Zanmaden */
	6368	DRIVER( fatfurwa )   /* 006 1999/01/28 Fatal Fury: Wild Ambition / Garou Densetsu: Wild Ambition */
	6369	DRIVER( buriki )   /* 007 1999/05/21 Buriki One */
6356	6370
6357	6371	/* Alpha Denshi games */
6358	6372	DRIVER( shougi )
r4679	r4680
6461	6475	DRIVER( tstrikea )   /* Game Room  */
6462	6476	DRIVER( ctribe )   /* TA-0028 (c) 1990 (US) */
6463	6477	DRIVER( ctribe1 )   /* TA-0028 (c) 1990 (US) - Set 1? */
	6478	DRIVER( ctribej )   /* TA-0028 (c) 1990 (Japan) */
6464	6479	DRIVER( ctribeb )   /* bootleg */
6465	6480	DRIVER( ctribb2 )   /* bootleg */
6466	6481	DRIVER( blockout )   /* TA-0029 (c) 1989 + California Dreams */
r4679	r4680
6683	6698	DRIVER( crusnwld )   /* (c) 1996 Midway */
6684	6699	DRIVER( crusnw23 )   /* (c) 1996 Midway */
6685	6700	DRIVER( crusnw20 )   /* (c) 1996 Midway */
	6701	DRIVER( crusnw17 )   /* (c) 1996 Midway */
6686	6702	DRIVER( crusnw13 )   /* (c) 1996 Midway */
6687	6703	DRIVER( offroadc )   /* (c) 1997 Midway (v1.40) */
6688	6704	DRIVER( offrodc3 )   /* (c) 1997 Midway (v1.30) */
r4679	r4680
6881	6897	DRIVER( zeroteam )   /* (c) 1993 Seibu Kaihatsu */
6882	6898	DRIVER( zeroteaa )   /* (c) 1993 Seibu Kaihatsu */
6883	6899	DRIVER( zeroteab )   /* (c) 1993 Seibu Kaihatsu */
	6900	DRIVER( zeroteac )   /* (c) 1993 Seibu Kaihatsu */
6884	6901	DRIVER( zerotsel )   /* (c) 1993 Seibu Kaihatsu */
6885	6902	DRIVER( nzerotea )   /* (c) 1993 Seibu Kaihatsu */
6886	6903	DRIVER( xsedae )   /* (c) 1995 Dream Island */
r4679	r4680
6938	6955	DRIVER( cabal )      /* (c) 1988 Tad + Fabtek license */
6939	6956	DRIVER( cabala )   /* (c) 1988 Tad + Fabtek license */
6940	6957	DRIVER( cabalbl )   /* bootleg */
	6958	DRIVER( cabalbl2 )   /* bootleg */
6941	6959	DRIVER( cabalus )   /* (c) 1988 Tad + Fabtek license */
6942	6960	DRIVER( cabalus2 )   /* (c) 1988 Tad + Fabtek license */
6943	6961	DRIVER( toki )      /* (c) 1989 Tad (World) */
r4679	r4680
7229	7247	DRIVER( wrallyb )   /* (c) 1993 - Ref 930217 */
7230	7248	DRIVER( glass )      /* (c) 1993 - Ref 931021 */
7231	7249	DRIVER( glass10 )   /* (c) 1993 - Ref 931021 */
7232		DRIVER( glass10a )   /* (c) 1993 - Ref 931021 */
	7250	DRIVER( glassbrk )   /* (c) 1993 - Ref 931021 shows "Break Edition" on a real PCB */
7233	7251	DRIVER( targeth )   /* (c) 1994 - Ref 940531 */
7234	7252	DRIVER( thoop2 )   /* (c) 1994 - Ref ??? */
7235	7253	DRIVER( aligator )   /* (c) 1994 - Ref 940411 */
r4679	r4680
8063	8081	DRIVER( kinst210 )   /* (c) 1995 Rare */
8064	8082
8065	8083	/* Nihon System games */
	8084	DRIVER( gigas )      /* (c) 1986 Sega */
8066	8085	DRIVER( gigasb )   /* (c) 1986 bootleg */
8067	8086	DRIVER( gigasm2b )   /* (c) 1986 bootleg */
8068	8087	DRIVER( oigas )      /* (c) 1986 bootleg */
r4679	r4680
8592	8611	DRIVER( spitboss )   /* (c) 1988 Merit */
8593	8612	DRIVER( pitbosss )   /* (c) 1990 Merit */
8594	8613	DRIVER( pitbossm )   /* (c) 1994 Merit */
	8614	DRIVER( pbst30 )   /* (c) 1994 Merit */
	8615	DRIVER( pbst30b )   /* (c) 1993 Merit */
8595	8616	DRIVER( megat3 )   /* (c) 1996 Merit */
8596	8617	DRIVER( megat3a )   /* (c) 1996 Merit */
8597	8618	DRIVER( megat3ca )   /* (c) 1996 Merit */
r4679	r4680
8930	8951	DRIVER( paranoia )   /* (c) 1990 Naxat Soft */
8931	8952	DRIVER( vcombat )   /* (c) 1993 VR8 Inc. */
8932	8953	DRIVER( shadfgtr )   /* (c) 1993 DUTECH Inc. */
	8954	DRIVER( skimaxx )   /* (c) 1996 Kyle Hodgetts/ICE */
8933	8955	DRIVER( blackt96 )   /* (c) 1996 D.G.R.M. of Korea */
8934	8956	DRIVER( magictg )   /* (c) 199? Acclaim */
8935	8957	DRIVER( magictga )   /* (c) 199? Acclaim */
r4679	r4680
8964	8986	/* H8/3337 italian gambling games */
8965	8987	DRIVER( ntcash )   /* (c) 1999 unknown */
8966	8988	DRIVER( wizard )   /* (c) 1999 A.A. */
	8989	DRIVER( trstar2k )   /* (c) 1999 A.M. */
8967	8990	DRIVER( laser2k1 )   /* (c) 2001 unknown */
8968	8991	DRIVER( mdrink )   /* (c) 2001 unknown */
8969	8992	DRIVER( te0144 )   /* (c) 2001 unknown */
r4679	r4680
8971	8994	DRIVER( millsun )   /* (c) 200? unknown */
8972	8995	DRIVER( sspac2k1 )   /* (c) 200? unknown */
8973	8996	DRIVER( elvis )      /* (c) 200? unknown */
	8997	DRIVER( sstar )      /* (c) 200? unknown */
8974	8998
8975	8999	/* Intel 8086-based italian gambling games */
8976	9000	DRIVER( newmcard )   /* (c) 19?? unknown */
r4679	r4680
9068	9092	DRIVER( nfb96seb )   /* bootleg */
9069	9093	DRIVER( carb2002 )   /* bootleg */
9070	9094	DRIVER( carb2003 )   /* bootleg */
	9095	DRIVER( nfm )      /* bootleg */
9071	9096
9072	9097	DRIVER( ladylinr )   /* (c) 198? TAB Austria */
9073	9098	DRIVER( kkojnoli )   /* 198? south korean hack */
r4679	r4680
9306	9331	/* Hi-Lo Poker-based */
9307	9332	DRIVER( gtipoker )   /* (c) 1983 GTI Inc */
9308	9333	DRIVER( norautp )   /* (c) 1988? Noraut */
	9334	DRIVER( norautjp )   /* (c) 1988? Noraut */
9309	9335	DRIVER( norautpn )   /* (c) 1990? unknown */
9310	9336
9311	9337	/* Sanki Denshi Kogyo */

src/mame/includes/nmk16.h

r4679	r4680
6	6	extern UINT16 *afega_vram_1, *afega_scroll_1;
7	7
8	8
9		READ16_HANDLER( nmk_bgvideoram_r );
10	9	WRITE16_HANDLER( nmk_bgvideoram_w );
11		READ16_HANDLER( nmk_fgvideoram_r );
12	10	WRITE16_HANDLER( nmk_fgvideoram_w );
13		READ16_HANDLER( nmk_txvideoram_r );
14	11	WRITE16_HANDLER( nmk_txvideoram_w );
15	12	WRITE16_HANDLER( nmk_scroll_w );
16	13	WRITE16_HANDLER( nmk_scroll_2_w );

src/mame/includes/ninjakd2.h

r4679	r4680
20	20
21	21	extern VIDEO_START( ninjakd2 );
22	22	extern VIDEO_START( mnight );
	23	extern VIDEO_START( arkarea );
23	24	extern VIDEO_START( robokid );
24	25	extern VIDEO_START( omegaf );
25	26	extern VIDEO_UPDATE( ninjakd2 );

src/mame/includes/naomi.h

r4679	r4680
13	13	};
14	14
15	15	extern DRIVER_INIT( naomi );
	16	extern DRIVER_INIT( naomi_mp );
	17
16	18	extern DRIVER_INIT( ggxxsla );
17	19	extern DRIVER_INIT( ggxxrl );
18	20	extern DRIVER_INIT( ggxx );

src/mame/includes/esripsys.h

r4679	r4680
16	16	#define CMOS_RAM_SIZE         (2048)
17	17	#define FDT_RAM_SIZE         (2048 * sizeof(UINT16))
18	18
19		enum
20		{
21		ESRIPSYS_GAME_CPU  = 0,
22		ESRIPSYS_FRAME_CPU = 1,
23		ESRIPSYS_VIDEO_CPU = 2,
24		ESRIPSYS_SOUND_CPU = 3,
25		};
26
27	19	/*----------- defined in video/esripsys.c -----------*/
28	20
29	21	extern int esripsys_hblank;

src/mame/includes/namcos2.h

r4679	r4680
207	207	/* MASTER CPU RAM MEMORY                                      */
208	208	/**************************************************************/
209	209
210		#define NAMCOS2_68K_MASTER_RAM_W   SMH_BANK3
211		#define NAMCOS2_68K_MASTER_RAM_R   SMH_BANK3
	210	#define NAMCOS2_68K_MASTER_RAM_W   SMH_BANK(3)
	211	#define NAMCOS2_68K_MASTER_RAM_R   SMH_BANK(3)
212	212
213	213	/**************************************************************/
214	214	/* SLAVE CPU RAM MEMORY                                       */
215	215	/**************************************************************/
216	216
217		#define NAMCOS2_68K_SLAVE_RAM_W    SMH_BANK4
218		#define NAMCOS2_68K_SLAVE_RAM_R    SMH_BANK4
	217	#define NAMCOS2_68K_SLAVE_RAM_W    SMH_BANK(4)
	218	#define NAMCOS2_68K_SLAVE_RAM_R    SMH_BANK(4)
219	219
220	220	/**************************************************************/
221	221	/*                                                            */
222	222	/**************************************************************/
223		#define BANKED_SOUND_ROM_R      SMH_BANK6
	223	#define BANKED_SOUND_ROM_R      SMH_BANK(6)
224	224	#define CPU3_ROM1            6         /* Bank number */
225	225
226	226	/**************************************************************/

src/mame/includes/model1.h

r4679	r4680
19	19
20	20	ADDRESS_MAP_EXTERN( model1_vr_tgp_map, 32 );
21	21
22		void model1_vr_tgp_reset( void );
	22	void model1_vr_tgp_reset( running_machine *machine );
23	23	void model1_tgp_reset(running_machine *machine, int swa);
24	24
25	25

src/mame/includes/lockon.h

r4679	r4680
14	14	#define VBEND            0
15	15	#define VTOTAL            280
16	16
17		enum
18		{
19		MAIN_CPU = 0,
20		GROUND_CPU,
21		OBJECT_CPU,
22		SOUND_CPU
23		};
24
25	17	/*----------- defined in drivers/lockon.c -----------*/
26	18	extern UINT8  lockon_ctrl_reg;
27	19	extern UINT32 lockon_main_inten;

src/mame/includes/atari.h

r4679	r4680
24	24	WRITE8_DEVICE_HANDLER(a600xl_pia_pb_w);
25	25
26	26	/* This is needed in MESS as well for Atari 8bit drivers */
27		void atari_machine_start(running_machine *machine);
	27	void atari_machine_start(running_machine *machine);
28	28
29	29	MACHINE_START( atarixl );
30	30

src/mame/includes/slapfght.h

r4679	r4680
34	34
35	35	MACHINE_RESET( slapfight );
36	36
37		extern UINT8 *slapfight_dpram;
38		extern size_t slapfight_dpram_size;
39		WRITE8_HANDLER( slapfight_dpram_w );
40		READ8_HANDLER( slapfight_dpram_r );
41
42	37	READ8_HANDLER( slapfight_port_00_r );
43	38	WRITE8_HANDLER( slapfight_port_00_w );
44	39	WRITE8_HANDLER( slapfight_port_01_w );

src/mame/includes/namcoic.h

r4679	r4680
121	121	/* C355 Motion Object Emulation */
122	122
123	123	/* for palXOR, supply either 0x0 (normal) or 0xf (palette mapping reversed) */
124		void namco_obj_init( int gfxbank, int palXOR, int (*code2tile)( int code ) );
	124	void namco_obj_init( running_machine *machine, int gfxbank, int palXOR, int (*code2tile)( int code ) );
125	125	void namco_obj_draw(running_machine *machine, bitmap_t *bitmap, const rectangle *cliprect, int pri );
126	126
127	127	WRITE16_HANDLER( namco_obj16_w );

src/mame/includes/lordgun.h

r0	r4680
	1	/***************************************************************************
	2
	3	-= IGS Lord Of Gun =-
	4
	5	*************************************************************************/
	6
	7	/*----------- defined in video/lordgun.c -----------*/
	8
	9	extern UINT16 *lordgun_vram_0, *lordgun_scroll_x_0, *lordgun_scroll_y_0;
	10	extern UINT16 *lordgun_vram_1, *lordgun_scroll_x_1, *lordgun_scroll_y_1;
	11	extern UINT16 *lordgun_vram_2, *lordgun_scroll_x_2, *lordgun_scroll_y_2;
	12	extern UINT16 *lordgun_vram_3, *lordgun_scroll_x_3, *lordgun_scroll_y_3;
	13	extern UINT16 *lordgun_scrollram;
	14	extern int lordgun_whitescreen;
	15
	16	typedef struct _lordgun_gun_data lordgun_gun_data;
	17	struct _lordgun_gun_data
	18	{
	19	int      scr_x,   scr_y;
	20	UINT16   hw_x,   hw_y;
	21	};
	22
	23	extern lordgun_gun_data lordgun_gun[2];
	24
	25
	26	WRITE16_HANDLER( lordgun_vram_0_w );
	27	WRITE16_HANDLER( lordgun_vram_1_w );
	28	WRITE16_HANDLER( lordgun_vram_2_w );
	29	WRITE16_HANDLER( lordgun_vram_3_w );
	30
	31	void lordgun_update_gun(running_machine *machine, int i);
	32
	33	VIDEO_START( lordgun );
	34	VIDEO_UPDATE( lordgun );

src/mame/includes/espial.h

r4679	r4680
7	7	/*----------- defined in drivers/espial.c -----------*/
8	8
9	9	MACHINE_RESET( espial );
	10	MACHINE_START( espial );
10	11
11	12	WRITE8_HANDLER( zodiac_master_interrupt_enable_w );
12	13	INTERRUPT_GEN( zodiac_master_interrupt );

src/mame/includes/pitnrun.h

r4679	r4680
26	26	WRITE8_HANDLER(pitnrun_color_select_w);
27	27	WRITE8_HANDLER( pitnrun_char_bank_select );
28	28	WRITE8_HANDLER( pitnrun_scroll_w );
29		READ8_HANDLER( pitnrun_videoram_r );
30		READ8_HANDLER( pitnrun_videoram2_r );
31	29
32	30	PALETTE_INIT(pitnrun);
33	31	VIDEO_START(pitnrun);

src/mame/includes/gottlieb.h

r4679	r4680
37	37	extern WRITE8_HANDLER( gottlieb_paletteram_w );
38	38
39	39	VIDEO_START( gottlieb );
	40	VIDEO_START( screwloo );
40	41	VIDEO_UPDATE( gottlieb );

src/mame/includes/konamipt.h

r4679	r4680
228	228	PORT_BIT(  0x2000, IP_ACTIVE_LOW, IPT_BUTTON2        ) PORT_PLAYER(player) \
229	229	PORT_BIT(  0x4000, IP_ACTIVE_LOW, button3            ) PORT_PLAYER(player)
230	230
	231	#define KONAMI16_LSB_40_UDLR( player, button3 )   \
	232	PORT_BIT(  0x0001, IP_ACTIVE_LOW, IPT_JOYSTICK_UP    ) PORT_PLAYER(player) \
	233	PORT_BIT(  0x0002, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN  ) PORT_PLAYER(player) \
	234	PORT_BIT(  0x0004, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT  ) PORT_PLAYER(player) \
	235	PORT_BIT(  0x0008, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_PLAYER(player) \
	236	PORT_BIT(  0x0010, IP_ACTIVE_LOW, IPT_BUTTON1        ) PORT_PLAYER(player) \
	237	PORT_BIT(  0x0020, IP_ACTIVE_LOW, IPT_BUTTON2        ) PORT_PLAYER(player) \
	238	PORT_BIT(  0x0040, IP_ACTIVE_LOW, button3            ) PORT_PLAYER(player)
	239
	240	#define KONAMI16_MSB_40_UDLR( player, button3 )   \
	241	PORT_BIT(  0x0100, IP_ACTIVE_LOW, IPT_JOYSTICK_UP    ) PORT_PLAYER(player) \
	242	PORT_BIT(  0x0200, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN  ) PORT_PLAYER(player) \
	243	PORT_BIT(  0x0400, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT  ) PORT_PLAYER(player) \
	244	PORT_BIT(  0x0800, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_PLAYER(player) \
	245	PORT_BIT(  0x1000, IP_ACTIVE_LOW, IPT_BUTTON1        ) PORT_PLAYER(player) \
	246	PORT_BIT(  0x2000, IP_ACTIVE_LOW, IPT_BUTTON2        ) PORT_PLAYER(player) \
	247	PORT_BIT(  0x4000, IP_ACTIVE_LOW, button3            ) PORT_PLAYER(player)
	248
231	249	#define KONAMI16_LSB( player, button3, start )   \
232	250	KONAMI16_LSB_40( player, button3 )         \
233	251	PORT_BIT(  0x0080, IP_ACTIVE_LOW, start )
r4679	r4680
236	254	KONAMI16_MSB_40( player, button3 )         \
237	255	PORT_BIT(  0x8000, IP_ACTIVE_LOW, start )
238	256
	257	#define KONAMI16_LSB_UDLR( player, button3, start )   \
	258	KONAMI16_LSB_40_UDLR( player, button3 )         \
	259	PORT_BIT(  0x0080, IP_ACTIVE_LOW, start )
239	260
	261	#define KONAMI16_MSB_UDLR( player, button3, start )   \
	262	KONAMI16_MSB_40_UDLR( player, button3 )         \
	263	PORT_BIT(  0x8000, IP_ACTIVE_LOW, start )
	264
	265
240	266	/******************** System Inputs (Coin, Start & Service) *******************/
241	267
242	268	#define KONAMI8_SYSTEM_10   \

src/mame/includes/namcos22.h

r4679	r4680
72	72	VIDEO_START( namcos22s );
73	73	VIDEO_UPDATE( namcos22s );
74	74
75		void namcos22_draw_direct_poly( const UINT16 *pSource );
	75	void namcos22_draw_direct_poly( running_machine *machine, const UINT16 *pSource );
76	76	extern UINT32 namcos22_point_rom_r( offs_t offs );
77	77	extern void namcos22_enable_slave_simulation( void );

src/mame/includes/genesis.h

r4679	r4680
1	1	/* Todo, reorganise, cleanup etc.*/
2	2
3		#include "sound/okim6295.h"
4		#include "sound/sn76496.h"
5		#include "sound/2612intf.h"
6		#include "sound/upd7759.h"
7
8	3	/*----------- defined in drivers/megaplay.c -----------*/
9	4
10	5	extern UINT16 *ic36_ram;

src/mame/mame.mak

r4679	r4680
692	692
693	693	$(MAMEOBJ)/irem.a: \
694	694	$(DRIVERS)/m10.o $(VIDEO)/m10.o \
	695	$(DRIVERS)/m14.o \
695	696	$(DRIVERS)/m52.o $(VIDEO)/m52.o \
696	697	$(DRIVERS)/m57.o $(VIDEO)/m57.o \
697	698	$(DRIVERS)/m58.o $(VIDEO)/m58.o \
r4679	r4680
1274	1275	$(DRIVERS)/nycaptor.o $(MACHINE)/nycaptor.o $(VIDEO)/nycaptor.o \
1275	1276	$(DRIVERS)/opwolf.o $(MACHINE)/opwolf.o \
1276	1277	$(DRIVERS)/othunder.o $(VIDEO)/othunder.o \
1277		$(DRIVERS)/parentj.o \
1278	1278	$(DRIVERS)/pitnrun.o $(MACHINE)/pitnrun.o $(VIDEO)/pitnrun.o \
1279	1279	$(DRIVERS)/qix.o $(MACHINE)/qix.o $(AUDIO)/qix.o $(VIDEO)/qix.o \
1280	1280	$(DRIVERS)/rainbow.o $(MACHINE)/rainbow.o \
r4679	r4680
1293	1293	$(DRIVERS)/taito_l.o $(VIDEO)/taito_l.o \
1294	1294	$(DRIVERS)/taito_x.o $(MACHINE)/cchip.o \
1295	1295	$(DRIVERS)/taito_z.o $(VIDEO)/taito_z.o \
	1296	$(DRIVERS)/taito_o.o $(VIDEO)/taito_o.o \
1296	1297	$(DRIVERS)/taitoair.o $(VIDEO)/taitoair.o \
1297	1298	$(DRIVERS)/taitojc.o $(VIDEO)/taitojc.o \
1298	1299	$(DRIVERS)/taitopjc.o $\
r4679	r4680
1575	1576	$(DRIVERS)/rcorsair.o \
1576	1577	$(DRIVERS)/re900.o \
1577	1578	$(DRIVERS)/shangkid.o $(VIDEO)/shangkid.o \
	1579	$(DRIVERS)/skimaxx.o \
1578	1580	$(DRIVERS)/skyarmy.o \
1579	1581	$(DRIVERS)/skylncr.o \
1580	1582	$(DRIVERS)/sliver.o \

src/mame/video/nycaptor.c

r4679	r4680
70	70
71	71	VIDEO_START( nycaptor )
72	72	{
73		nycaptor_spriteram = auto_malloc (160);
	73	nycaptor_spriteram = auto_alloc_array(machine, UINT8, 160);
74	74	bg_tilemap = tilemap_create( machine, get_tile_info,tilemap_scan_rows,8,8,32,32 );
75	75
76	76	tilemap_set_transmask(bg_tilemap,0,0xf800,0x7ff); //split 0
r4679	r4680
78	78	tilemap_set_transmask(bg_tilemap,2,0xfffc,0x0003);//split 2
79	79	tilemap_set_transmask(bg_tilemap,3,0xfff0,0x000f);//split 3
80	80
81		paletteram = auto_malloc(0x200);
82		paletteram_2 = auto_malloc(0x200);
	81	paletteram = auto_alloc_array(machine, UINT8, 0x200);
	82	paletteram_2 = auto_alloc_array(machine, UINT8, 0x200);
83	83	tilemap_set_scroll_cols(bg_tilemap,32);
84	84	}
85	85

src/mame/video/mitchell.c

r4679	r4680
59	59	/*
60	60	OBJ RAM
61	61	*/
62		pang_objram=auto_malloc(pang_videoram_size);
63		memset(pang_objram, 0, pang_videoram_size);
	62	pang_objram=auto_alloc_array_clear(machine, UINT8, pang_videoram_size);
64	63
65	64	/*
66	65	Palette RAM
67	66	*/
68		paletteram = auto_malloc(2*machine->config->total_colors);
69		memset(paletteram, 0, 2*machine->config->total_colors);
	67	paletteram = auto_alloc_array_clear(machine, UINT8, 2*machine->config->total_colors);
70	68	}
71	69
72	70

src/mame/video/blktiger.c

r4679	r4680
71	71
72	72	VIDEO_START( blktiger )
73	73	{
74		scroll_ram = auto_malloc(BGRAM_BANK_SIZE * BGRAM_BANKS);
	74	scroll_ram = auto_alloc_array(machine, UINT8, BGRAM_BANK_SIZE * BGRAM_BANKS);
75	75
76	76	tx_tilemap =    tilemap_create(machine, get_tx_tile_info,tilemap_scan_rows,8,8,32,32);
77	77	bg_tilemap8x4 = tilemap_create(machine, get_bg_tile_info,bg8x4_scan,          16,16,128,64);
r4679	r4680
160	160	coin_counter_w(1,data & 2);
161	161
162	162	/* bit 5 resets the sound CPU */
163		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_RESET, (data & 0x20) ? ASSERT_LINE : CLEAR_LINE);
	163	cputag_set_input_line(space->machine, "audiocpu", INPUT_LINE_RESET, (data & 0x20) ? ASSERT_LINE : CLEAR_LINE);
164	164
165	165	/* bit 6 flips screen */
166	166	flip_screen_set(space->machine, data & 0x40);
r4679	r4680
244	244
245	245	VIDEO_EOF( blktiger )
246	246	{
247		const address_space *space = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM);
	247	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
248	248
249	249	buffer_spriteram_w(space, 0, 0);
250	250	}

src/mame/video/dynduke.c

r4679	r4680
244	244
245	245	VIDEO_EOF( dynduke )
246	246	{
247		const address_space *space = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM);
	247	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
248	248
249		buffer_spriteram16_w(space,0,0,0xffff); // Could be a memory location instead
	249	buffer_spriteram16_w(space, 0, 0, 0xffff); // Could be a memory location instead
250	250	}

src/mame/video/hd63484.c

r4679	r4680
72	72	"RGCPY","RGCPY","RGCPY","RGCPY"    /* Fx */
73	73	};
74	74
75		void HD63484_start(void)
	75	void HD63484_start(running_machine *machine)
76	76	{
77	77	fifo_counter = 0;
78		HD63484_ram = auto_malloc(HD63484_RAM_SIZE * sizeof(*HD63484_ram));
79		memset(HD63484_ram, 0, HD63484_RAM_SIZE * sizeof(*HD63484_ram));
	78	HD63484_ram = auto_alloc_array_clear(machine, UINT16, HD63484_RAM_SIZE);
80	79	}
81	80
82	81	static void doclr16(int opcode,UINT16 fill,int *dst,INT16 _ax,INT16 _ay)

src/mame/video/deco_mlc.c

r4679	r4680
27	27	else
28	28	colour_mask=0x1f;
29	29
30		//  temp_bitmap = auto_bitmap_alloc( 512, 512, BITMAP_FORMAT_RGB32 );
31		mlc_buffered_spriteram = auto_malloc(0x3000);
	30	//  temp_bitmap = auto_bitmap_alloc( machine, 512, 512, BITMAP_FORMAT_RGB32 );
	31	mlc_buffered_spriteram = auto_alloc_array(machine, UINT32, 0x3000/4);
32	32	}
33	33
34	34	#ifdef UNUSED_FUNCTION

src/mame/video/tunhunt.c

r4679	r4680
72	72	We keep track of dirty lines and cache the expanded bitmap.
73	73	With max RLE expansion, bitmap size is 256x64.
74	74	*/
75		tmpbitmap = auto_bitmap_alloc(256, 64, video_screen_get_format(machine->primary_screen));
	75	tmpbitmap = auto_bitmap_alloc(machine, 256, 64, video_screen_get_format(machine->primary_screen));
76	76
77	77	fg_tilemap = tilemap_create(machine, get_fg_tile_info, tilemap_scan_cols, 8, 8, 32, 32);
78	78

src/mame/video/tryout.c

r4679	r4680
175	175	fg_tilemap = tilemap_create(machine, get_fg_tile_info,get_fg_memory_offset,8,8,32,32);
176	176	bg_tilemap = tilemap_create(machine, get_bg_tile_info,get_bg_memory_offset,16,16,64,16);
177	177
178		tryout_vram=auto_malloc(8 * 0x800);
179		tryout_vram_gfx=auto_malloc(0x6000);
	178	tryout_vram=auto_alloc_array(machine, UINT8, 8 * 0x800);
	179	tryout_vram_gfx=auto_alloc_array(machine, UINT8, 0x6000);
180	180
181	181	gfx_element_set_source(machine->gfx[2], tryout_vram_gfx);
182	182

src/mame/video/hd63484.h

r4679	r4680
3	3	extern UINT16 *HD63484_ram;
4	4	extern UINT16 HD63484_reg[256/2];
5	5
6		void HD63484_start(void);
	6	void HD63484_start(running_machine *machine);
7	7
8	8	READ16_HANDLER( HD63484_status_r );
9	9	WRITE16_HANDLER( HD63484_address_w );

src/mame/video/madmotor.c

r4679	r4680
11	11	UINT16 *madmotor_pf1_rowscroll;
12	12	UINT16 *madmotor_pf1_data,*madmotor_pf2_data,*madmotor_pf3_data;
13	13
14		static UINT16 madmotor_pf1_control[16];
15		static UINT16 madmotor_pf2_control[16];
16		static UINT16 madmotor_pf3_control[16];
	14	UINT16 *madmotor_pf1_control;
	15	UINT16 *madmotor_pf2_control;
	16	UINT16 *madmotor_pf3_control;
17	17
18	18	static int flipscreen;
19	19	static tilemap *madmotor_pf1_tilemap,*madmotor_pf2_tilemap,*madmotor_pf3_tilemap,*madmotor_pf3a_tilemap;
r4679	r4680
125	125
126	126	/******************************************************************************/
127	127
128		READ16_HANDLER( madmotor_pf1_data_r )
129		{
130		return madmotor_pf1_data[offset];
131		}
132
133		READ16_HANDLER( madmotor_pf2_data_r )
134		{
135		return madmotor_pf2_data[offset];
136		}
137
138		READ16_HANDLER( madmotor_pf3_data_r )
139		{
140		return madmotor_pf3_data[offset];
141		}
142
143	128	WRITE16_HANDLER( madmotor_pf1_data_w )
144	129	{
145	130	COMBINE_DATA(&madmotor_pf1_data[offset]);
r4679	r4680
163	148	tilemap_mark_tile_dirty(madmotor_pf3a_tilemap,offset);
164	149	}
165	150
166		WRITE16_HANDLER( madmotor_pf1_control_w )
167		{
168		COMBINE_DATA(&madmotor_pf1_control[offset]);
169		}
170
171		WRITE16_HANDLER( madmotor_pf2_control_w )
172		{
173		COMBINE_DATA(&madmotor_pf2_control[offset]);
174		}
175
176		WRITE16_HANDLER( madmotor_pf3_control_w )
177		{
178		COMBINE_DATA(&madmotor_pf3_control[offset]);
179		}
180
181		READ16_HANDLER( madmotor_pf1_rowscroll_r )
182		{
183		return madmotor_pf1_rowscroll[offset];
184		}
185
186		WRITE16_HANDLER( madmotor_pf1_rowscroll_w )
187		{
188		COMBINE_DATA(&madmotor_pf1_rowscroll[offset]);
189		}
190
191	151	/******************************************************************************/
192	152
193	153	static void draw_sprites(running_machine *machine, bitmap_t *bitmap,const rectangle *cliprect,int pri_mask,int pri_val)

src/mame/video/mystston.c

r4679	r4680
47	47
48	48	static TIMER_CALLBACK( interrupt_callback )
49	49	{
50		mystston_state *state = machine->driver_data;
	50	mystston_state *state = (mystston_state *)machine->driver_data;
51	51	int scanline = param;
52	52
53	53	mystston_on_scanline_interrupt(machine);
r4679	r4680
125	125
126	126	WRITE8_HANDLER( mystston_video_control_w )
127	127	{
128		mystston_state *state = space->machine->driver_data;
	128	mystston_state *state = (mystston_state *)space->machine->driver_data;
129	129
130	130	*state->video_control = data;
131	131
r4679	r4680
151	151
152	152	static TILE_GET_INFO( get_bg_tile_info )
153	153	{
154		mystston_state *state = machine->driver_data;
	154	mystston_state *state = (mystston_state *)machine->driver_data;
155	155
156	156	int page = (*state->video_control & 0x04) << 8;
157	157	int code = ((state->bg_videoram[page | 0x200 | tile_index] & 0x01) << 8) | state->bg_videoram[page | tile_index];
r4679	r4680
163	163
164	164	static TILE_GET_INFO( get_fg_tile_info )
165	165	{
166		mystston_state *state = machine->driver_data;
	166	mystston_state *state = (mystston_state *)machine->driver_data;
167	167
168	168	int code = ((state->fg_videoram[0x400 | tile_index] & 0x07) << 8) | state->fg_videoram[tile_index];
169	169	int color = ((*state->video_control & 0x01) << 1) | ((*state->video_control & 0x02) >> 1);
r4679	r4680
219	219
220	220	static VIDEO_START( mystston )
221	221	{
222		mystston_state *state = machine->driver_data;
	222	mystston_state *state = (mystston_state *)machine->driver_data;
223	223
224	224	state->bg_tilemap = tilemap_create(machine, get_bg_tile_info, tilemap_scan_cols_flip_x, 16, 16, 16, 32);
225	225
r4679	r4680
240	240
241	241	static VIDEO_RESET( mystston )
242	242	{
243		mystston_state *state = machine->driver_data;
	243	mystston_state *state = (mystston_state *)machine->driver_data;
244	244
245	245	timer_adjust_oneshot(state->interrupt_timer, video_screen_get_time_until_pos(machine->primary_screen, FIRST_INT_VPOS - 1, INT_HPOS), FIRST_INT_VPOS);
246	246	}
r4679	r4680
255	255
256	256	static VIDEO_UPDATE( mystston )
257	257	{
258		mystston_state *state = screen->machine->driver_data;
	258	mystston_state *state = (mystston_state *)screen->machine->driver_data;
259	259
260	260	int flip = (*state->video_control & 0x80) ^ ((input_port_read(screen->machine, "DSW1") & 0x20) << 2);
261	261

src/mame/video/midyunit.c

r4679	r4680
70	70	static VIDEO_START( common )
71	71	{
72	72	/* allocate memory */
73		midyunit_cmos_ram = auto_malloc(0x2000 * 4);
74		local_videoram = auto_malloc(0x80000);
75		pen_map = auto_malloc(65536 * sizeof(pen_map[0]));
	73	midyunit_cmos_ram = auto_alloc_array(machine, UINT16, (0x2000 * 4)/2);
	74	local_videoram = auto_alloc_array_clear(machine, UINT16, 0x80000/2);
	75	pen_map = auto_alloc_array(machine, pen_t, 65536);
76	76
77		/* we have to erase this since we rely on upper bits being 0 */
78		memset(local_videoram, 0, 0x80000);
79
80	77	/* reset all the globals */
81	78	midyunit_cmos_page = 0;
82	79	autoerase_enable = 0;
r4679	r4680
88	85
89	86	/* register for state saving */
90	87	state_save_register_global(machine, autoerase_enable);
91		state_save_register_global_pointer(machine, local_videoram, 0x80000/sizeof(local_videoram[0]));
92		state_save_register_global_pointer(machine, midyunit_cmos_ram, (0x2000 * 4)/sizeof(midyunit_cmos_ram[0]));
	88	state_save_register_global_pointer(machine, local_videoram, 0x80000/2);
	89	state_save_register_global_pointer(machine, midyunit_cmos_ram, (0x2000 * 4)/2);
93	90	state_save_register_global(machine, videobank_select);
94	91	state_save_register_global_array(machine, dma_register);
95	92	}
r4679	r4680
389	386	static TIMER_CALLBACK( dma_callback )
390	387	{
391	388	dma_register[DMA_COMMAND] &= ~0x8000; /* tell the cpu we're done */
392		cpu_set_input_line(machine->cpu[0], 0, ASSERT_LINE);
	389	cputag_set_input_line(machine, "maincpu", 0, ASSERT_LINE);
393	390	}
394	391
395	392
r4679	r4680
452	449
453	450	/* high bit triggers action */
454	451	command = dma_register[DMA_COMMAND];
455		cpu_set_input_line(space->machine->cpu[0], 0, CLEAR_LINE);
	452	cputag_set_input_line(space->machine, "maincpu", 0, CLEAR_LINE);
456	453	if (!(command & 0x8000))
457	454	return;
458	455

src/mame/video/stvvdp1.c

r4679	r4680
1987	1987
1988	1988	/* not here! this is done every frame drawn even if the cpu isn't running eg in the debugger */
1989	1989	//  if(!(stv_scu[40] & 0x2000)) /*Sprite draw end irq*/
1990		//      cpu_set_input_line_and_vector(machine->cpu[0], 2, HOLD_LINE , 0x4d);
	1990	//      cputag_set_input_line_and_vector(machine, "maincpu", 2, HOLD_LINE , 0x4d);
1991	1991
1992	1992	if (vdp1_sprite_log) logerror ("End of list processing!\n");
1993	1993	}
r4679	r4680
2095	2095
2096	2096	int stv_vdp1_start ( running_machine *machine )
2097	2097	{
2098		stv_vdp1_regs = auto_malloc ( 0x040000 );
2099		stv_vdp1_vram = auto_malloc ( 0x100000 );
2100		stv_vdp1_gfx_decode = auto_malloc( 0x100000 );
	2098	stv_vdp1_regs = auto_alloc_array_clear(machine, UINT32, 0x040000/4 );
	2099	stv_vdp1_vram = auto_alloc_array_clear(machine, UINT32, 0x100000/4 );
	2100	stv_vdp1_gfx_decode = auto_alloc_array(machine, UINT8, 0x100000 );
2101	2101
2102		stv_vdp1_shading_data = auto_malloc( sizeof(struct stv_vdp1_poly_scanline_data) );
	2102	stv_vdp1_shading_data = auto_alloc(machine, struct stv_vdp1_poly_scanline_data);
2103	2103
2104		memset(stv_vdp1_regs, 0, 0x040000);
2105		memset(stv_vdp1_vram, 0, 0x100000);
	2104	stv_framebuffer[0] = auto_alloc_array(machine, UINT16, 1024 * 256 * 2 ); /* *2 is for double interlace */
	2105	stv_framebuffer[1] = auto_alloc_array(machine, UINT16, 1024 * 256 * 2 );
2106	2106
2107		stv_framebuffer[0] = auto_malloc( 1024 * 256 * sizeof(UINT16) * 2 ); /* *2 is for double interlace */
2108		stv_framebuffer[1] = auto_malloc( 1024 * 256 * sizeof(UINT16) * 2 );
	2107	stv_framebuffer_display_lines = auto_alloc_array(machine, UINT16 *, 512);
	2108	stv_framebuffer_draw_lines = auto_alloc_array(machine, UINT16 *, 512);
2109	2109
2110		stv_framebuffer_display_lines = auto_malloc( 512 * sizeof(UINT16*) );
2111		stv_framebuffer_draw_lines = auto_malloc( 512 * sizeof(UINT16*) );
2112
2113	2110	stv_framebuffer_width = stv_framebuffer_height = 0;
2114	2111	stv_framebuffer_mode = -1;
2115	2112	stv_framebuffer_double_interlace = -1;

src/mame/video/nbmj9195.c

r4679	r4680
413	413	int height = video_screen_get_height(machine->primary_screen);
414	414
415	415	nbmj9195_tmpbitmap[0] = video_screen_auto_bitmap_alloc(machine->primary_screen);
416		nbmj9195_videoram[0] = auto_malloc(width * height * sizeof(UINT16));
417		nbmj9195_palette = auto_malloc(0x200 * sizeof(UINT8));
418		nbmj9195_clut[0] = auto_malloc(0x1000 * sizeof(UINT8));
419		memset(nbmj9195_videoram[0], 0x0000, (width * height * sizeof(UINT16)));
	416	nbmj9195_videoram[0] = auto_alloc_array_clear(machine, UINT16, width * height);
	417	nbmj9195_palette = auto_alloc_array(machine, UINT8, 0x200);
	418	nbmj9195_clut[0] = auto_alloc_array(machine, UINT8, 0x1000);
420	419	nbmj9195_scanline[0] = nbmj9195_scanline[1] = SCANLINE_MIN;
421	420	nb19010_busyflag = 1;
422	421	gfxdraw_mode = 0;
r4679	r4680
429	428
430	429	nbmj9195_tmpbitmap[0] = video_screen_auto_bitmap_alloc(machine->primary_screen);
431	430	nbmj9195_tmpbitmap[1] = video_screen_auto_bitmap_alloc(machine->primary_screen);
432		nbmj9195_videoram[0] = auto_malloc(width * height * sizeof(UINT16));
433		nbmj9195_videoram[1] = auto_malloc(width * height * sizeof(UINT16));
434		nbmj9195_palette = auto_malloc(0x200 * sizeof(UINT8));
435		nbmj9195_clut[0] = auto_malloc(0x1000 * sizeof(UINT8));
436		nbmj9195_clut[1] = auto_malloc(0x1000 * sizeof(UINT8));
437		memset(nbmj9195_videoram[0], 0x0000, (width * height * sizeof(UINT16)));
438		memset(nbmj9195_videoram[1], 0x0000, (width * height * sizeof(UINT16)));
	431	nbmj9195_videoram[0] = auto_alloc_array_clear(machine, UINT16, width * height);
	432	nbmj9195_videoram[1] = auto_alloc_array_clear(machine, UINT16, width * height);
	433	nbmj9195_palette = auto_alloc_array(machine, UINT8, 0x200);
	434	nbmj9195_clut[0] = auto_alloc_array(machine, UINT8, 0x1000);
	435	nbmj9195_clut[1] = auto_alloc_array(machine, UINT8, 0x1000);
439	436	nbmj9195_scanline[0] = nbmj9195_scanline[1] = SCANLINE_MIN;
440	437	nb19010_busyflag = 1;
441	438	gfxdraw_mode = 1;
r4679	r4680
448	445
449	446	nbmj9195_tmpbitmap[0] = video_screen_auto_bitmap_alloc(machine->primary_screen);
450	447	nbmj9195_tmpbitmap[1] = video_screen_auto_bitmap_alloc(machine->primary_screen);
451		nbmj9195_videoram[0] = auto_malloc(width * height * sizeof(UINT16));
452		nbmj9195_videoram[1] = auto_malloc(width * height * sizeof(UINT16));
453		nbmj9195_videoworkram[0] = auto_malloc(width * height * sizeof(UINT16));
454		nbmj9195_videoworkram[1] = auto_malloc(width * height * sizeof(UINT16));
455		nbmj9195_nb22090_palette = auto_malloc(0xc00 * sizeof(UINT8));
456		nbmj9195_clut[0] = auto_malloc(0x1000 * sizeof(UINT8));
457		nbmj9195_clut[1] = auto_malloc(0x1000 * sizeof(UINT8));
458		memset(nbmj9195_videoram[0], 0x0000, (width * height * sizeof(UINT16)));
459		memset(nbmj9195_videoram[1], 0x0000, (width * height * sizeof(UINT16)));
460		memset(nbmj9195_videoworkram[0], 0x0000, (width * height * sizeof(UINT16)));
461		memset(nbmj9195_videoworkram[1], 0x0000, (width * height * sizeof(UINT16)));
	448	nbmj9195_videoram[0] = auto_alloc_array_clear(machine, UINT16, width * height);
	449	nbmj9195_videoram[1] = auto_alloc_array_clear(machine, UINT16, width * height);
	450	nbmj9195_videoworkram[0] = auto_alloc_array_clear(machine, UINT16, width * height);
	451	nbmj9195_videoworkram[1] = auto_alloc_array_clear(machine, UINT16, width * height);
	452	nbmj9195_nb22090_palette = auto_alloc_array(machine, UINT8, 0xc00);
	453	nbmj9195_clut[0] = auto_alloc_array(machine, UINT8, 0x1000);
	454	nbmj9195_clut[1] = auto_alloc_array(machine, UINT8, 0x1000);
462	455	nbmj9195_scanline[0] = nbmj9195_scanline[1] = SCANLINE_MIN;
463	456	nb19010_busyflag = 1;
464	457	gfxdraw_mode = 2;

src/mame/video/simpl156.c

r4679	r4680
135	135	VIDEO_START( simpl156 )
136	136	{
137	137	/* allocate the ram as 16-bit (we do it here because the CPU is 32-bit) */
138		deco16_pf1_data = auto_malloc(0x2000);
139		deco16_pf2_data = auto_malloc(0x2000);
140		deco16_pf1_rowscroll = auto_malloc(0x800);
141		deco16_pf2_rowscroll = auto_malloc(0x800);
142		deco16_pf12_control = auto_malloc(0x10);
143		paletteram16 =  auto_malloc(0x1000);
	138	deco16_pf1_data = auto_alloc_array(machine, UINT16, 0x2000/2);
	139	deco16_pf2_data = auto_alloc_array(machine, UINT16, 0x2000/2);
	140	deco16_pf1_rowscroll = auto_alloc_array(machine, UINT16, 0x800/2);
	141	deco16_pf2_rowscroll = auto_alloc_array(machine, UINT16, 0x800/2);
	142	deco16_pf12_control = auto_alloc_array(machine, UINT16, 0x10/2);
	143	paletteram16 =  auto_alloc_array(machine, UINT16, 0x1000/2);
144	144
145	145	/* and register the allocated ram so that save states still work */
146	146	state_save_register_global_pointer(machine, deco16_pf1_data, 0x2000/2);

src/mame/video/twincobr.c

r4679	r4680
120	120
121	121	twincobr_create_tilemaps(machine);
122	122
123		twincobr_txvideoram16 = auto_malloc(twincobr_txvideoram_size*2);
124		memset(twincobr_txvideoram16,0,twincobr_txvideoram_size*2);
	123	twincobr_txvideoram16 = auto_alloc_array_clear(machine, UINT16, twincobr_txvideoram_size);
	124	twincobr_fgvideoram16 = auto_alloc_array_clear(machine, UINT16, twincobr_fgvideoram_size);
	125	twincobr_bgvideoram16 = auto_alloc_array_clear(machine, UINT16, twincobr_bgvideoram_size);
125	126
126		twincobr_fgvideoram16 = auto_malloc(twincobr_fgvideoram_size*2);
127		memset(twincobr_fgvideoram16,0,twincobr_fgvideoram_size*2);
128
129		twincobr_bgvideoram16 = auto_malloc(twincobr_bgvideoram_size*2);
130		memset(twincobr_bgvideoram16,0,twincobr_bgvideoram_size*2);
131
132	127	twincobr_display_on = 0;
133	128	twincobr_display(twincobr_display_on);
134	129
r4679	r4680
514	509
515	510	VIDEO_EOF( toaplan0 )
516	511	{
517		const address_space *space = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM);
	512	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
518	513
519	514	/* Spriteram is always 1 frame ahead, suggesting spriteram buffering.
520	515	There are no CPU output registers that control this so we

src/mame/video/arabian.c

r4679	r4680
172	172	/* allocate a common bitmap to use for both planes */
173	173	/* plane A (top plane with motion objects) is in the upper 4 bits */
174	174	/* plane B (bottom plane with playfield) is in the lower 4 bits */
175		main_bitmap = auto_malloc(BITMAP_WIDTH * BITMAP_HEIGHT);
	175	main_bitmap = auto_alloc_array(machine, UINT8, BITMAP_WIDTH * BITMAP_HEIGHT);
176	176
177	177	/* allocate memory for the converted graphics data */
178		converted_gfx = auto_malloc(0x8000 * 2);
	178	converted_gfx = auto_alloc_array(machine, UINT8, 0x8000 * 2);
179	179
180	180	/*--------------------------------------------------
181	181	transform graphics data into more usable format

src/mame/video/galpani2.c

r4679	r4680
131	131
132	132	VIDEO_START( galpani2 )
133	133	{
134		galpani2_bg15_bitmap  = auto_bitmap_alloc(256*8, 256, BITMAP_FORMAT_INDEXED16);
135		galpani2_bg8_bitmap_0 = auto_bitmap_alloc(512, 256, BITMAP_FORMAT_INDEXED16);
136		galpani2_bg8_bitmap_1 = auto_bitmap_alloc(512, 256, BITMAP_FORMAT_INDEXED16);
	134	galpani2_bg15_bitmap  = auto_bitmap_alloc(machine, 256*8, 256, BITMAP_FORMAT_INDEXED16);
	135	galpani2_bg8_bitmap_0 = auto_bitmap_alloc(machine, 512, 256, BITMAP_FORMAT_INDEXED16);
	136	galpani2_bg8_bitmap_1 = auto_bitmap_alloc(machine, 512, 256, BITMAP_FORMAT_INDEXED16);
137	137
138	138	VIDEO_START_CALL(kaneko16_sprites);
139	139	}
r4679	r4680
151	151	{
152	152	int layers_ctrl = -1;
153	153
154		galpani2_mcu_run(screen->machine);
155
156	154	#ifdef MAME_DEBUG
157	155	if (input_code_pressed(KEYCODE_Z))
158	156	{   int msk = 0;

src/mame/video/taito_o.c

r0	r4680
	1	/***************************************************************************
	2
	3	Based on taito_h.c
	4
	5	***************************************************************************/
	6
	7	#include "driver.h"
	8	#include "taitoic.h"
	9
	10
	11	/* These are hand-tuned values */
	12	static const int zoomy_conv_table[] =
	13	{
	14	/*    +0   +1   +2   +3   +4   +5   +6   +7    +8   +9   +a   +b   +c   +d   +e   +f */
	15	0x00,0x01,0x01,0x02,0x02,0x03,0x04,0x05, 0x06,0x06,0x07,0x08,0x09,0x0a,0x0a,0x0b,   /* 0x00 */
	16	0x0b,0x0c,0x0c,0x0d,0x0e,0x0e,0x0f,0x10, 0x10,0x11,0x12,0x13,0x14,0x15,0x16,0x16,
	17	0x17,0x18,0x19,0x1a,0x1b,0x1c,0x1d,0x1e, 0x1f,0x20,0x21,0x22,0x24,0x25,0x26,0x27,
	18	0x28,0x2a,0x2b,0x2c,0x2e,0x30,0x31,0x32, 0x34,0x36,0x37,0x38,0x3a,0x3c,0x3e,0x3f,
	19
	20	0x40,0x41,0x42,0x42,0x43,0x43,0x44,0x44, 0x45,0x45,0x46,0x46,0x47,0x47,0x48,0x49,   /* 0x40 */
	21	0x4a,0x4a,0x4b,0x4b,0x4c,0x4d,0x4e,0x4f, 0x4f,0x50,0x51,0x51,0x52,0x53,0x54,0x55,
	22	0x56,0x57,0x58,0x59,0x5a,0x5b,0x5c,0x5d, 0x5e,0x5f,0x60,0x61,0x62,0x63,0x64,0x66,
	23	0x67,0x68,0x6a,0x6b,0x6c,0x6e,0x6f,0x71, 0x72,0x74,0x76,0x78,0x80,0x7b,0x7d,0x7f
	24	};
	25
	26	VIDEO_START( parentj )
	27	{
	28	TC0080VCO_vh_start(machine,0,0,1,1,-2);
	29	}
	30
	31
	32	static void parentj_draw_sprites(running_machine *machine, bitmap_t *bitmap, const rectangle *cliprect, int priority)
	33	{
	34	/* Y chain size is 16/32?/64/64? pixels. X chain size
	35	is always 64 pixels. */
	36
	37	static const int size[] = { 1, 2, 4, 4 };
	38	int x0, y0, x, y, dx, dy, ex, ey, zx, zy;
	39	int ysize;
	40	int j, k;
	41	int offs;               /* sprite RAM offset */
	42	int tile_offs;            /* sprite chain offset */
	43	int zoomx, zoomy;         /* zoom value */
	44
	45	for (offs = 0x03f8 / 2 ; offs >= 0 ; offs -= 0x008 / 2)
	46	{
	47	if (offs <  0x01b0 && priority == 0)   continue;
	48	if (offs >= 0x01b0 && priority == 1)   continue;
	49
	50	x0        =  TC0080VCO_spriteram[offs + 1] & 0x3ff;
	51	y0        =  TC0080VCO_spriteram[offs + 0] & 0x3ff;
	52	zoomx     = (TC0080VCO_spriteram[offs + 2] & 0x7f00) >> 8;
	53	zoomy     = (TC0080VCO_spriteram[offs + 2] & 0x007f);
	54	tile_offs = (TC0080VCO_spriteram[offs + 3] & 0x1fff) << 2;
	55	ysize     = size[ ( TC0080VCO_spriteram[ offs ] & 0x0c00 ) >> 10 ];
	56
	57	if (tile_offs)
	58	{
	59	/* Convert zoomy value to real value as zoomx */
	60	zoomy = zoomy_conv_table[zoomy];
	61
	62	if (zoomx < 63)
	63	{
	64	dx = 8 + (zoomx + 2) / 8;
	65	ex = (zoomx + 2) % 8;
	66	zx = ((dx << 1) + ex) << 11;
	67	}
	68	else
	69	{
	70	dx = 16 + (zoomx - 63) / 4;
	71	ex = (zoomx - 63) % 4;
	72	zx = (dx + ex) << 12;
	73	}
	74
	75	if (zoomy < 63)
	76	{
	77	dy = 8 + (zoomy + 2) / 8;
	78	ey = (zoomy + 2) % 8;
	79	zy = ((dy << 1) + ey) << 11;
	80	}
	81	else
	82	{
	83	dy = 16 + (zoomy - 63) / 4;
	84	ey = (zoomy - 63) % 4;
	85	zy = (dy + ey) << 12;
	86	}
	87
	88	if (x0 >= 0x200) x0 -= 0x400;
	89	if (y0 >= 0x200) y0 -= 0x400;
	90
	91	if (TC0080VCO_flipscreen)
	92	{
	93	x0 = 497 - x0;
	94	y0 = 498 - y0;
	95	dx = -dx;
	96	dy = -dy;
	97	}
	98	else
	99	{
	100	x0 += 1;
	101	y0 += 2;
	102	}
	103
	104	y = y0;
	105	for (j = 0 ; j < ysize ; j ++)
	106	{
	107	x = x0;
	108	for (k = 0 ; k < 4 ; k ++)
	109	{
	110	if (tile_offs >= 0x1000)
	111	{
	112	int tile, color, flipx, flipy;
	113
	114	tile  = TC0080VCO_chain_ram_0[tile_offs] & 0x7fff;
	115	color = TC0080VCO_chain_ram_1[tile_offs] & 0x001f;
	116	flipx = TC0080VCO_chain_ram_1[tile_offs] & 0x0040;
	117	flipy = TC0080VCO_chain_ram_1[tile_offs] & 0x0080;
	118
	119	if (TC0080VCO_flipscreen)
	120	{
	121	flipx ^= 0x0040;
	122	flipy ^= 0x0080;
	123	}
	124
	125	drawgfxzoom( bitmap, machine -> gfx[0],
	126	tile,
	127	color,
	128	flipx, flipy,
	129	x, y,
	130	cliprect,
	131	TRANSPARENCY_PEN, 0,
	132	zx, zy
	133	);
	134	}
	135	tile_offs ++;
	136	x += dx;
	137	}
	138	y += dy;
	139	}
	140	}
	141	}
	142	}
	143
	144
	145	VIDEO_UPDATE( parentj )
	146	{
	147	TC0080VCO_tilemap_update(screen->machine);
	148	bitmap_fill(bitmap, cliprect, 0);
	149	TC0080VCO_tilemap_draw(screen->machine,bitmap,cliprect,0,TILEMAP_DRAW_OPAQUE,0);
	150	parentj_draw_sprites(screen->machine,bitmap,cliprect,0);
	151	parentj_draw_sprites(screen->machine,bitmap,cliprect,1);
	152	TC0080VCO_tilemap_draw(screen->machine,bitmap,cliprect,1,0,0);
	153	TC0080VCO_tilemap_draw(screen->machine,bitmap,cliprect,2,0,0);
	154	return 0;
	155	}
	156
	157

src/mame/video/thief.c

r4679	r4680
103	103	VIDEO_START( thief ){
104	104	memset( &thief_coprocessor, 0x00, sizeof(thief_coprocessor) );
105	105
106		videoram = auto_malloc( 0x2000*4*2 );
107		memset( videoram, 0, 0x2000*4*2 );
	106	videoram = auto_alloc_array_clear(machine, UINT8, 0x2000*4*2 );
108	107
109		thief_coprocessor.image_ram = auto_malloc( 0x2000 );
110		thief_coprocessor.context_ram = auto_malloc( 0x400 );
	108	thief_coprocessor.image_ram = auto_alloc_array(machine, UINT8, 0x2000 );
	109	thief_coprocessor.context_ram = auto_alloc_array(machine, UINT8, 0x400 );
111	110	}
112	111
113	112	VIDEO_UPDATE( thief ){

src/mame/video/exterm.c

r4679	r4680
78	78	int x;
79	79
80	80	/* get parameters for the slave CPU */
81		tms34010_get_display_params(screen->machine->cpu[1], &fgparams);
	81	tms34010_get_display_params(cputag_get_cpu(screen->machine, "slave"), &fgparams);
82	82
83	83	/* compute info about the slave vram */
84	84	if (fgparams.enabled && scanline >= fgparams.veblnk && scanline < fgparams.vsblnk && fgparams.heblnk < fgparams.hsblnk)

src/mame/video/policetr.c

r4679	r4680
48	48	srcbitmap_height_mask = (memory_region_length(machine, "gfx1") / SRCBITMAP_WIDTH) - 1;
49	49
50	50	/* the destination bitmap is not directly accessible to the CPU */
51		dstbitmap = auto_malloc(DSTBITMAP_WIDTH * DSTBITMAP_HEIGHT);
	51	dstbitmap = auto_alloc_array(machine, UINT8, DSTBITMAP_WIDTH * DSTBITMAP_HEIGHT);
52	52	}
53	53
54	54
r4679	r4680
245	245
246	246	/* latch 0x50 clears IRQ4 */
247	247	case 0x50:
248		cpu_set_input_line(space->machine->cpu[0], R3000_IRQ4, CLEAR_LINE);
	248	cputag_set_input_line(space->machine, "audiocpu", R3000_IRQ4, CLEAR_LINE);
249	249	break;
250	250
251	251	/* latch 0x60 clears IRQ5 */
252	252	case 0x60:
253		cpu_set_input_line(space->machine->cpu[0], R3000_IRQ5, CLEAR_LINE);
	253	cputag_set_input_line(space->machine, "audiocpu", R3000_IRQ5, CLEAR_LINE);
254	254	break;
255	255
256	256	/* log anything else */

src/mame/video/seibuspi.c

r4679	r4680
494	494	tilemap_set_transparent_pen(mid_layer, 63);
495	495	tilemap_set_transparent_pen(fore_layer, 63);
496	496
497		tilemap_ram = auto_malloc(0x4000);
498		palette_ram = auto_malloc(0x3000);
499		sprite_ram = auto_malloc(0x1000);
500		memset(tilemap_ram, 0, 0x4000);
501		memset(palette_ram, 0, 0x3000);
502		memset(sprite_ram, 0, 0x1000);
	497	tilemap_ram = auto_alloc_array_clear(machine, UINT32, 0x4000/4);
	498	palette_ram = auto_alloc_array_clear(machine, UINT32, 0x3000/4);
	499	sprite_ram = auto_alloc_array_clear(machine, UINT32, 0x1000/4);
503	500
504	501	sprite_bpp = 6;
505	502	sprite_dma_length = 0x1000;
r4679	r4680
663	660	{
664	661	int i;
665	662
666		palette_ram = auto_malloc(0x4000);
667		sprite_ram = auto_malloc(0x2000);
668		memset(palette_ram, 0, 0x4000);
669		memset(sprite_ram, 0, 0x2000);
	663	palette_ram = auto_alloc_array_clear(machine, UINT32, 0x4000/4);
	664	sprite_ram = auto_alloc_array_clear(machine, UINT32, 0x2000/4);
670	665
671	666	sprite_bpp = 8;
672	667	sprite_dma_length = 0x2000;

src/mame/video/sauro.c

r4679	r4680
152	152
153	153	/* Tricky Doc */
154	154
155		WRITE8_HANDLER ( trckydoc_spriteram_mirror_w )
156		{
157		spriteram[offset] = data;
158		}
159
160	155	VIDEO_START( trckydoc )
161	156	{
162	157	bg_tilemap = tilemap_create(machine, get_tile_info_bg, tilemap_scan_cols,

src/mame/video/midtunit.c

r4679	r4680
86	86	VIDEO_START( midtunit )
87	87	{
88	88	/* allocate memory */
89		local_videoram = auto_malloc(0x100000);
	89	local_videoram = auto_alloc_array(machine, UINT16, 0x100000/2);
90	90
91	91	/* reset all the globals */
92	92	gfxbank_offset[0] = 0x000000;
r4679	r4680
593	593	static TIMER_CALLBACK( dma_callback )
594	594	{
595	595	dma_register[DMA_COMMAND] &= ~0x8000; /* tell the cpu we're done */
596		cpu_set_input_line(machine->cpu[0], 0, ASSERT_LINE);
	596	cputag_set_input_line(machine, "maincpu", 0, ASSERT_LINE);
597	597	}
598	598
599	599
r4679	r4680
683	683
684	684	/* high bit triggers action */
685	685	command = dma_register[DMA_COMMAND];
686		cpu_set_input_line(space->machine->cpu[0], 0, CLEAR_LINE);
	686	cputag_set_input_line(space->machine, "maincpu", 0, CLEAR_LINE);
687	687	if (!(command & 0x8000))
688	688	return;
689	689

src/mame/video/carpolo.c

r4679	r4680
162	162	{
163	163	bitmap_format format = video_screen_get_format(machine->primary_screen);
164	164
165		sprite_sprite_collision_bitmap1 = auto_bitmap_alloc(SPRITE_WIDTH*2, SPRITE_HEIGHT*2, format);
166		sprite_sprite_collision_bitmap2 = auto_bitmap_alloc(SPRITE_WIDTH*2, SPRITE_HEIGHT*2, format);
	165	sprite_sprite_collision_bitmap1 = auto_bitmap_alloc(machine, SPRITE_WIDTH*2, SPRITE_HEIGHT*2, format);
	166	sprite_sprite_collision_bitmap2 = auto_bitmap_alloc(machine, SPRITE_WIDTH*2, SPRITE_HEIGHT*2, format);
167	167
168		sprite_goal_collision_bitmap1 = auto_bitmap_alloc(SPRITE_WIDTH+GOAL_WIDTH, SPRITE_HEIGHT+GOAL_HEIGHT, format);
169		sprite_goal_collision_bitmap2 = auto_bitmap_alloc(SPRITE_WIDTH+GOAL_WIDTH, SPRITE_HEIGHT+GOAL_HEIGHT, format);
	168	sprite_goal_collision_bitmap1 = auto_bitmap_alloc(machine, SPRITE_WIDTH+GOAL_WIDTH, SPRITE_HEIGHT+GOAL_HEIGHT, format);
	169	sprite_goal_collision_bitmap2 = auto_bitmap_alloc(machine, SPRITE_WIDTH+GOAL_WIDTH, SPRITE_HEIGHT+GOAL_HEIGHT, format);
170	170
171		sprite_border_collision_bitmap = auto_bitmap_alloc(SPRITE_WIDTH, SPRITE_HEIGHT, format);
	171	sprite_border_collision_bitmap = auto_bitmap_alloc(machine, SPRITE_WIDTH, SPRITE_HEIGHT, format);
172	172
173	173	state_save_register_global_bitmap(machine, sprite_sprite_collision_bitmap1);
174	174	state_save_register_global_bitmap(machine, sprite_sprite_collision_bitmap2);

src/mame/video/drmicro.c

r4679	r4680
112	112
113	113	VIDEO_START( drmicro)
114	114	{
115		drmicro_videoram = auto_malloc(0x1000);
	115	drmicro_videoram = auto_alloc_array(machine, UINT8, 0x1000);
116	116
117	117	drmicro_bg1 = tilemap_create(machine, get_bg1_tile_info, tilemap_scan_rows, 8,8,32,32);
118	118	drmicro_bg2 = tilemap_create(machine, get_bg2_tile_info, tilemap_scan_rows, 8,8,32,32);

src/mame/video/system1.c

r4679	r4680
105	105
106	106	static TILE_GET_INFO( tile_get_info )
107	107	{
108		UINT8 *rambase = param;
	108	const UINT8 *rambase = (const UINT8 *)param;
109	109	UINT32 tiledata = rambase[tile_index*2+0] | (rambase[tile_index*2+1] << 8);
110	110	UINT32 code = ((tiledata >> 4) & 0x800) | (tiledata & 0x7ff);
111	111	UINT32 color = (tiledata >> 5) & 0xff;
r4679	r4680
126	126	int pagenum;
127	127
128	128	/* allocate memory for the collision arrays */
129		mix_collide = auto_malloc(64);
130		memset(mix_collide, 0, 64);
131		sprite_collide = auto_malloc(1024);
132		memset(sprite_collide, 0, 1024);
	129	mix_collide = auto_alloc_array_clear(machine, UINT8, 64);
	130	sprite_collide = auto_alloc_array_clear(machine, UINT8, 1024);
133	131
134	132	/* allocate memory for videoram */
135	133	tilemap_pages = pagecount;
136		videoram = auto_malloc(0x800 * pagecount);
137		memset(videoram, 0, 0x800 * pagecount);
	134	videoram = auto_alloc_array_clear(machine, UINT8, 0x800 * pagecount);
138	135
139	136	/* create the tilemap pages */
140	137	for (pagenum = 0; pagenum < pagecount; pagenum++)
r4679	r4680
145	142	}
146	143
147	144	/* allocate a temporary bitmap for sprite rendering */
148		sprite_bitmap = auto_bitmap_alloc(256, 256, BITMAP_FORMAT_INDEXED16);
	145	sprite_bitmap = auto_bitmap_alloc(machine, 256, 256, BITMAP_FORMAT_INDEXED16);
149	146
150	147	/* register for save stats */
151	148	state_save_register_global(machine, system1_video_mode);

src/mame/video/niyanpai.c

r4679	r4680
382	382	niyanpai_tmpbitmap[0] = video_screen_auto_bitmap_alloc(machine->primary_screen);
383	383	niyanpai_tmpbitmap[1] = video_screen_auto_bitmap_alloc(machine->primary_screen);
384	384	niyanpai_tmpbitmap[2] = video_screen_auto_bitmap_alloc(machine->primary_screen);
385		niyanpai_videoram[0] = auto_malloc(width * height * sizeof(short));
386		niyanpai_videoram[1] = auto_malloc(width * height * sizeof(short));
387		niyanpai_videoram[2] = auto_malloc(width * height * sizeof(short));
388		niyanpai_videoworkram[0] = auto_malloc(width * height * sizeof(short));
389		niyanpai_videoworkram[1] = auto_malloc(width * height * sizeof(short));
390		niyanpai_videoworkram[2] = auto_malloc(width * height * sizeof(short));
391		niyanpai_palette = auto_malloc(0x480 * sizeof(short));
392		niyanpai_clut[0] = auto_malloc(0x1000 * sizeof(char));
393		niyanpai_clut[1] = auto_malloc(0x1000 * sizeof(char));
394		niyanpai_clut[2] = auto_malloc(0x1000 * sizeof(char));
395		memset(niyanpai_videoram[0], 0x0000, (width * height * sizeof(short)));
396		memset(niyanpai_videoram[1], 0x0000, (width * height * sizeof(short)));
397		memset(niyanpai_videoram[2], 0x0000, (width * height * sizeof(short)));
398		memset(niyanpai_videoworkram[0], 0x0000, (width * height * sizeof(short)));
399		memset(niyanpai_videoworkram[1], 0x0000, (width * height * sizeof(short)));
400		memset(niyanpai_videoworkram[2], 0x0000, (width * height * sizeof(short)));
	385	niyanpai_videoram[0] = auto_alloc_array_clear(machine, UINT16, width * height);
	386	niyanpai_videoram[1] = auto_alloc_array_clear(machine, UINT16, width * height);
	387	niyanpai_videoram[2] = auto_alloc_array_clear(machine, UINT16, width * height);
	388	niyanpai_videoworkram[0] = auto_alloc_array_clear(machine, UINT16, width * height);
	389	niyanpai_videoworkram[1] = auto_alloc_array_clear(machine, UINT16, width * height);
	390	niyanpai_videoworkram[2] = auto_alloc_array_clear(machine, UINT16, width * height);
	391	niyanpai_palette = auto_alloc_array(machine, UINT16, 0x480);
	392	niyanpai_clut[0] = auto_alloc_array(machine, UINT8, 0x1000);
	393	niyanpai_clut[1] = auto_alloc_array(machine, UINT8, 0x1000);
	394	niyanpai_clut[2] = auto_alloc_array(machine, UINT8, 0x1000);
401	395	nb19010_busyflag = 1;
402	396	}
403	397

src/mame/video/stvvdp2.c

r4679	r4680
4860	4860	else
4861	4861	{
4862	4862	if ( stv_vdp2_roz_bitmap[iRP-1] == NULL )
4863		stv_vdp2_roz_bitmap[iRP-1] = auto_bitmap_alloc(4096, 4096, video_screen_get_format(machine->primary_screen));
	4863	stv_vdp2_roz_bitmap[iRP-1] = auto_bitmap_alloc(machine, 4096, 4096, video_screen_get_format(machine->primary_screen));
4864	4864
4865	4865	roz_clip_rect.min_x = roz_clip_rect.min_y = 0;
4866	4866	if ( (iRP == 1 && STV_VDP2_RAOVR == 3) ||
r4679	r4680
5256	5256	WRITE32_HANDLER ( stv_vdp2_regs_w )
5257	5257	{
5258	5258	static UINT8 old_crmd;
	5259	static UINT16 old_tvmd;
5259	5260	COMBINE_DATA(&stv_vdp2_regs[offset]);
5260	5261
5261	5262	if(old_crmd != STV_VDP2_CRMD)
r4679	r4680
5263	5264	old_crmd = STV_VDP2_CRMD;
5264	5265	refresh_palette_data(space->machine);
5265	5266	}
	5267	if(old_tvmd != STV_VDP2_TVMD)
	5268	{
	5269	old_tvmd = STV_VDP2_TVMD;
	5270	stv_vdp2_dynamic_res_change(space->machine);
	5271	}
5266	5272	}
5267	5273
5268	5274	static UINT8 get_hblank(running_machine *machine)
r4679	r4680
5383	5389
5384	5390	static int stv_vdp2_start (running_machine *machine)
5385	5391	{
5386		stv_vdp2_regs = auto_malloc ( 0x040000 );
5387		stv_vdp2_vram = auto_malloc ( 0x100000 ); // actually we only need half of it since we don't emulate extra 4mbit ram cart.
5388		stv_vdp2_cram = auto_malloc ( 0x080000 );
5389		stv_vdp2_gfx_decode = auto_malloc ( 0x100000 );
	5392	stv_vdp2_regs = auto_alloc_array_clear(machine, UINT32, 0x040000/4 );
	5393	stv_vdp2_vram = auto_alloc_array_clear(machine, UINT32, 0x100000/4 ); // actually we only need half of it since we don't emulate extra 4mbit ram cart.
	5394	stv_vdp2_cram = auto_alloc_array_clear(machine, UINT32, 0x080000/4 );
	5395	stv_vdp2_gfx_decode = auto_alloc_array(machine, UINT8, 0x100000 );
5390	5396
5391		memset(stv_vdp2_regs, 0, 0x040000);
5392		memset(stv_vdp2_vram, 0, 0x100000);
5393		memset(stv_vdp2_cram, 0, 0x080000);
5394
5395	5397	stv_vdp2_render_rbg0 = 1;
5396	5398	//  machine->gfx[0]->color_granularity=4;
5397	5399	//  machine->gfx[1]->color_granularity=4;
r4679	r4680
6208	6210	VIDEO_UPDATE( stv_vdp2 )
6209	6211	{
6210	6212	static UINT8 pri;
6211		stv_vdp2_dynamic_res_change(screen->machine);
6212
6213	6213	video_update_vdp1(screen->machine);
6214	6214
6215	6215	stv_vdp2_fade_effects(screen->machine);

src/mame/video/exedexes.c

r4679	r4680
243	243
244	244	VIDEO_EOF( exedexes )
245	245	{
246		const address_space *space = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM);
	246	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
247	247
248	248	buffer_spriteram_w(space, 0, 0);
249	249	}

src/mame/video/jedi.c

r4679	r4680
30	30
31	31	static VIDEO_START( jedi )
32	32	{
33		jedi_state *state = machine->driver_data;
	33	jedi_state *state = (jedi_state *)machine->driver_data;
34	34
35	35	/* register for saving */
36	36	state_save_register_global(machine, state->vscroll);
r4679	r4680
110	110
111	111	WRITE8_HANDLER( jedi_vscroll_w )
112	112	{
113		jedi_state *state = space->machine->driver_data;
	113	jedi_state *state = (jedi_state *)space->machine->driver_data;
114	114
115	115	state->vscroll = data | (offset << 8);
116	116	}
r4679	r4680
118	118
119	119	WRITE8_HANDLER( jedi_hscroll_w )
120	120	{
121		jedi_state *state = space->machine->driver_data;
	121	jedi_state *state = (jedi_state *)space->machine->driver_data;
122	122
123	123	state->hscroll = data | (offset << 8);
124	124	}
r4679	r4680
329	329
330	330	static VIDEO_UPDATE( jedi )
331	331	{
332		jedi_state *state = screen->machine->driver_data;
	332	jedi_state *state = (jedi_state *)screen->machine->driver_data;
333	333
334	334	/* if no video, clear it all to black */
335	335	if (*state->video_off & 0x01)

src/mame/video/suprnova.c

r4679	r4680
912	912	skns_tilemap_B = tilemap_create(machine, get_tilemap_B_tile_info,tilemap_scan_rows,16,16,64, 64);
913	913	tilemap_set_transparent_pen(skns_tilemap_B,0);
914	914
915		sprite_bitmap = auto_bitmap_alloc(1024,1024,BITMAP_FORMAT_INDEXED16);
	915	sprite_bitmap = auto_bitmap_alloc(machine,1024,1024,BITMAP_FORMAT_INDEXED16);
916	916
917		tilemap_bitmap_lower = auto_bitmap_alloc(320,240,BITMAP_FORMAT_INDEXED16);
918		tilemap_bitmapflags_lower = auto_bitmap_alloc(320,240,BITMAP_FORMAT_INDEXED8);
	917	tilemap_bitmap_lower = auto_bitmap_alloc(machine,320,240,BITMAP_FORMAT_INDEXED16);
	918	tilemap_bitmapflags_lower = auto_bitmap_alloc(machine,320,240,BITMAP_FORMAT_INDEXED8);
919	919
920		tilemap_bitmap_higher = auto_bitmap_alloc(320,240,BITMAP_FORMAT_INDEXED16);
921		tilemap_bitmapflags_higher = auto_bitmap_alloc(320,240,BITMAP_FORMAT_INDEXED8);
	920	tilemap_bitmap_higher = auto_bitmap_alloc(machine,320,240,BITMAP_FORMAT_INDEXED16);
	921	tilemap_bitmapflags_higher = auto_bitmap_alloc(machine,320,240,BITMAP_FORMAT_INDEXED8);
922	922
923	923	machine->gfx[2]->color_granularity=256;
924	924	machine->gfx[3]->color_granularity=256;

src/mame/video/seta2.c

r4679	r4680
359	359	machine->gfx[4]->color_granularity = 16;
360	360	machine->gfx[5]->color_granularity = 16;
361	361
362		buffered_spriteram16 = auto_malloc(spriteram_size);
	362	buffered_spriteram16 = auto_alloc_array(machine, UINT16, spriteram_size/2);
363	363
364	364	yoffset = 0;
365	365	}

src/mame/video/namcofl.c

r4679	r4680
122	122	VIDEO_START( namcofl )
123	123	{
124	124	namco_tilemap_init( machine, NAMCONB1_TILEGFX, memory_region(machine, NAMCONB1_TILEMASKREGION), TilemapCB );
125		namco_obj_init(NAMCONB1_SPRITEGFX,0x0,FLobjcode2tile);
	125	namco_obj_init(machine,NAMCONB1_SPRITEGFX,0x0,FLobjcode2tile);
126	126	namco_roz_init(machine,NAMCONB1_ROTGFX,NAMCONB1_ROTMASKREGION);
127	127	}

src/mame/video/dynax.c

r4679	r4680
746	746
747	747	VIDEO_START( hanamai )
748	748	{
749		dynax_pixmap[0][0] = auto_malloc(256*256);
750		dynax_pixmap[0][1] = auto_malloc(256*256);
751		dynax_pixmap[1][0] = auto_malloc(256*256);
752		dynax_pixmap[1][1] = auto_malloc(256*256);
753		dynax_pixmap[2][0] = auto_malloc(256*256);
754		dynax_pixmap[2][1] = auto_malloc(256*256);
755		dynax_pixmap[3][0] = auto_malloc(256*256);
756		dynax_pixmap[3][1] = auto_malloc(256*256);
	749	dynax_pixmap[0][0] = auto_alloc_array(machine, UINT8, 256*256);
	750	dynax_pixmap[0][1] = auto_alloc_array(machine, UINT8, 256*256);
	751	dynax_pixmap[1][0] = auto_alloc_array(machine, UINT8, 256*256);
	752	dynax_pixmap[1][1] = auto_alloc_array(machine, UINT8, 256*256);
	753	dynax_pixmap[2][0] = auto_alloc_array(machine, UINT8, 256*256);
	754	dynax_pixmap[2][1] = auto_alloc_array(machine, UINT8, 256*256);
	755	dynax_pixmap[3][0] = auto_alloc_array(machine, UINT8, 256*256);
	756	dynax_pixmap[3][1] = auto_alloc_array(machine, UINT8, 256*256);
757	757
758	758	Video_Reset();
759	759	layer_layout = LAYOUT_HANAMAI;
r4679	r4680
761	761
762	762	VIDEO_START( hnoridur )
763	763	{
764		dynax_pixmap[0][0] = auto_malloc(256*256);
765		dynax_pixmap[0][1] = auto_malloc(256*256);
766		dynax_pixmap[1][0] = auto_malloc(256*256);
767		dynax_pixmap[1][1] = auto_malloc(256*256);
768		dynax_pixmap[2][0] = auto_malloc(256*256);
769		dynax_pixmap[2][1] = auto_malloc(256*256);
770		dynax_pixmap[3][0] = auto_malloc(256*256);
771		dynax_pixmap[3][1] = auto_malloc(256*256);
	764	dynax_pixmap[0][0] = auto_alloc_array(machine, UINT8, 256*256);
	765	dynax_pixmap[0][1] = auto_alloc_array(machine, UINT8, 256*256);
	766	dynax_pixmap[1][0] = auto_alloc_array(machine, UINT8, 256*256);
	767	dynax_pixmap[1][1] = auto_alloc_array(machine, UINT8, 256*256);
	768	dynax_pixmap[2][0] = auto_alloc_array(machine, UINT8, 256*256);
	769	dynax_pixmap[2][1] = auto_alloc_array(machine, UINT8, 256*256);
	770	dynax_pixmap[3][0] = auto_alloc_array(machine, UINT8, 256*256);
	771	dynax_pixmap[3][1] = auto_alloc_array(machine, UINT8, 256*256);
772	772
773	773	Video_Reset();
774	774	layer_layout = LAYOUT_HNORIDUR;
r4679	r4680
784	784
785	785	VIDEO_START( sprtmtch )
786	786	{
787		dynax_pixmap[0][0] = auto_malloc(256*256);
788		dynax_pixmap[0][1] = auto_malloc(256*256);
789		dynax_pixmap[1][0] = auto_malloc(256*256);
790		dynax_pixmap[1][1] = auto_malloc(256*256);
791		dynax_pixmap[2][0] = auto_malloc(256*256);
792		dynax_pixmap[2][1] = auto_malloc(256*256);
	787	dynax_pixmap[0][0] = auto_alloc_array(machine, UINT8, 256*256);
	788	dynax_pixmap[0][1] = auto_alloc_array(machine, UINT8, 256*256);
	789	dynax_pixmap[1][0] = auto_alloc_array(machine, UINT8, 256*256);
	790	dynax_pixmap[1][1] = auto_alloc_array(machine, UINT8, 256*256);
	791	dynax_pixmap[2][0] = auto_alloc_array(machine, UINT8, 256*256);
	792	dynax_pixmap[2][1] = auto_alloc_array(machine, UINT8, 256*256);
793	793
794	794	Video_Reset();
795	795	layer_layout = LAYOUT_DRGPUNCH;
r4679	r4680
797	797
798	798	VIDEO_START( jantouki )
799	799	{
800		dynax_pixmap[0][0] = auto_malloc(256*256);
801		dynax_pixmap[0][1] = auto_malloc(256*256);
802		dynax_pixmap[1][0] = auto_malloc(256*256);
803		dynax_pixmap[1][1] = auto_malloc(256*256);
804		dynax_pixmap[2][0] = auto_malloc(256*256);
805		dynax_pixmap[2][1] = auto_malloc(256*256);
806		dynax_pixmap[3][0] = auto_malloc(256*256);
807		dynax_pixmap[3][1] = auto_malloc(256*256);
808		dynax_pixmap[4][0] = auto_malloc(256*256);
809		dynax_pixmap[4][1] = auto_malloc(256*256);
810		dynax_pixmap[5][0] = auto_malloc(256*256);
811		dynax_pixmap[5][1] = auto_malloc(256*256);
812		dynax_pixmap[6][0] = auto_malloc(256*256);
813		dynax_pixmap[6][1] = auto_malloc(256*256);
814		dynax_pixmap[7][0] = auto_malloc(256*256);
815		dynax_pixmap[7][1] = auto_malloc(256*256);
	800	dynax_pixmap[0][0] = auto_alloc_array(machine, UINT8, 256*256);
	801	dynax_pixmap[0][1] = auto_alloc_array(machine, UINT8, 256*256);
	802	dynax_pixmap[1][0] = auto_alloc_array(machine, UINT8, 256*256);
	803	dynax_pixmap[1][1] = auto_alloc_array(machine, UINT8, 256*256);
	804	dynax_pixmap[2][0] = auto_alloc_array(machine, UINT8, 256*256);
	805	dynax_pixmap[2][1] = auto_alloc_array(machine, UINT8, 256*256);
	806	dynax_pixmap[3][0] = auto_alloc_array(machine, UINT8, 256*256);
	807	dynax_pixmap[3][1] = auto_alloc_array(machine, UINT8, 256*256);
	808	dynax_pixmap[4][0] = auto_alloc_array(machine, UINT8, 256*256);
	809	dynax_pixmap[4][1] = auto_alloc_array(machine, UINT8, 256*256);
	810	dynax_pixmap[5][0] = auto_alloc_array(machine, UINT8, 256*256);
	811	dynax_pixmap[5][1] = auto_alloc_array(machine, UINT8, 256*256);
	812	dynax_pixmap[6][0] = auto_alloc_array(machine, UINT8, 256*256);
	813	dynax_pixmap[6][1] = auto_alloc_array(machine, UINT8, 256*256);
	814	dynax_pixmap[7][0] = auto_alloc_array(machine, UINT8, 256*256);
	815	dynax_pixmap[7][1] = auto_alloc_array(machine, UINT8, 256*256);
816	816
817	817	Video_Reset();
818	818	layer_layout = LAYOUT_JANTOUKI;
r4679	r4680
822	822
823	823	VIDEO_START( mjdialq2 )
824	824	{
825		dynax_pixmap[0][0] = auto_malloc(256*256);
826		dynax_pixmap[1][0] = auto_malloc(256*256);
	825	dynax_pixmap[0][0] = auto_alloc_array(machine, UINT8, 256*256);
	826	dynax_pixmap[1][0] = auto_alloc_array(machine, UINT8, 256*256);
827	827
828	828	Video_Reset();
829	829	layer_layout = LAYOUT_MJDIALQ2;

src/mame/video/contra.c

r4679	r4680
162	162	fg_tilemap = tilemap_create(machine, get_fg_tile_info,tilemap_scan_rows,8,8,32,32);
163	163	tx_tilemap = tilemap_create(machine, get_tx_tile_info,tilemap_scan_rows,     8,8,32,32);
164	164
165		private_spriteram = auto_malloc(0x800);
166		private_spriteram_2 = auto_malloc(0x800);
	165	private_spriteram = auto_alloc_array(machine, UINT8, 0x800);
	166	private_spriteram_2 = auto_alloc_array(machine, UINT8, 0x800);
167	167
168	168	bg_clip = *video_screen_get_visible_area(machine->primary_screen);
169	169	bg_clip.min_x += 40;

src/mame/video/volfied.c

r4679	r4680
13	13
14	14	VIDEO_START( volfied )
15	15	{
16		video_ram = auto_malloc(0x40000 * sizeof (UINT16));
	16	video_ram = auto_alloc_array(machine, UINT16, 0x40000);
17	17
18	18	state_save_register_global_pointer(machine, video_ram, 0x40000);
19	19	state_save_register_global(machine, video_ctrl);

src/mame/video/balsente.c

r4679	r4680
39	39	sprite_bank[1] = memory_region(machine, "gfx1") + 0x10000;
40	40
41	41	/* allocate a local copy of video RAM */
42		local_videoram = auto_malloc(256 * 256);
	42	local_videoram = auto_alloc_array(machine, UINT8, 256 * 256);
43	43
44	44	/* determine sprite size */
45	45	sprite_data = memory_region(machine, "gfx1");

src/mame/video/itech32.c

r4679	r4680
204	204	int i;
205	205
206	206	/* allocate memory */
207		videoram16 = auto_malloc(VRAM_WIDTH * (itech32_vram_height + 16) * 2 * 2);
	207	videoram16 = auto_alloc_array(machine, UINT16, VRAM_WIDTH * (itech32_vram_height + 16) * 2);
208	208	memset(videoram16, 0xff, VRAM_WIDTH * (itech32_vram_height + 16) * 2 * 2);
209	209
210	210	/* videoplane[0] is the foreground; videoplane[1] is the background */

src/mame/video/amiga.c

r4679	r4680
224	224	if (LOG_COPPER)
225	225	logerror("%02X.%02X: Write to %s = %04x\n", last_scanline, xpos / 2, amiga_custom_names[copper_pending_offset & 0xff], copper_pending_data);
226	226
227		amiga_custom_w(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), copper_pending_offset, copper_pending_data, 0xffff);
	227	amiga_custom_w(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), copper_pending_offset, copper_pending_data, 0xffff);
228	228	copper_pending_offset = 0;
229	229	}
230	230

src/mame/video/undrfire.c

r4679	r4680
24	24	{
25	25	int i;
26	26
27		spritelist = auto_malloc(0x4000 * sizeof(*spritelist));
	27	spritelist = auto_alloc_array(machine, struct tempsprite, 0x4000);
28	28
29	29	TC0100SCN_vh_start(machine,1,TC0100SCN_GFX_NUM,50,8,0,0,0,0,0);
30	30	TC0480SCP_vh_start(machine,TC0480SCP_GFX_NUM,0,0x24,0,-1,0,0,0,0);

src/mame/video/malzak.c

r4679	r4680
60	60	int height = video_screen_get_height(machine->primary_screen);
61	61
62	62	/* configure the S2636 chips */
63		//  s2636_0 = s2636_config(malzak_s2636_0_ram, height, width, -8, -16);
64		//  s2636_1 = s2636_config(malzak_s2636_1_ram, height, width, -9, -16);
65		s2636_0 = s2636_config(malzak_s2636_0_ram, height, width,  0, -16);
66		s2636_1 = s2636_config(malzak_s2636_1_ram, height, width,  0, -16);
	63	//  s2636_0 = s2636_config(machine, malzak_s2636_0_ram, height, width, -8, -16);
	64	//  s2636_1 = s2636_config(machine, malzak_s2636_1_ram, height, width, -9, -16);
	65	s2636_0 = s2636_config(machine, malzak_s2636_0_ram, height, width,  0, -16);
	66	s2636_1 = s2636_config(machine, malzak_s2636_1_ram, height, width,  0, -16);
67	67	}
68	68
69	69	VIDEO_UPDATE( malzak )

src/mame/video/deco32.c

r4679	r4680
207	207	Word 2:
208	208	0xf000: Block height
209	209	0x0f00: Block width
210		0x00c0: Unused?
211		0x0020: Priority
	210	0x0080: Unused?
	211	0x0040: Priority
212	212	0x001f: Colour
213	213	Word 3:
214	214	0xffff: Sprite value
r4679	r4680
224	224	if (sy==0x00000108 && !sprite)
225	225	continue; //fix!!!!!
226	226
227		if (spritedata[offs+2]&0x20)
228		prival=0xfffe; // under PF2
	227	if ((spritedata[offs+2]&0x60)==0x00)
	228	{
	229	prival = 0; // above everything
	230	}
	231	else if ((spritedata[offs+2]&0x60)==0x20)
	232	{
	233	prival = 0xfff0; // above the 2nd playfield
	234	}
	235	else if ((spritedata[offs+2]&0x60)==0x40)
	236	{
	237	prival = 0xfffc; // above the 1st playfield
	238	}
229	239	else
230		prival=0; // above everything
	240	{
	241	// never used?
	242	prival = 0xfffe; // under everything
	243	}
231	244
232	245	sx = spritedata[offs+1];
233	246
r4679	r4680
272	285	fx,fy,
273	286	sx + x_mult * (w-x),sy + y_mult * (h-y),
274	287	cliprect,TRANSPARENCY_PEN,0,prival);
	288
	289	// wrap-around y
	290	pdrawgfx(bitmap,machine->gfx[gfxbank],
	291	sprite + y + h * x,
	292	colour,
	293	fx,fy,
	294	sx + x_mult * (w-x),sy + y_mult * (h-y) - 512,
	295	cliprect,TRANSPARENCY_PEN,0,prival);
275	296	}
276	297	}
277	298	}
r4679	r4680
953	974	pf1a_tilemap =tilemap_create(machine, get_pf1a_tile_info,   deco16_scan_rows,16,16,64,32);
954	975	pf2_tilemap = tilemap_create(machine, get_pf2_tile_info,    deco16_scan_rows,16,16,64,32);
955	976	pf3_tilemap = tilemap_create(machine, get_ca_pf3_tile_info, tilemap_scan_rows,16,16,32,32);
956		deco32_raster_display_list=auto_malloc(10 * 256);
	977	deco32_raster_display_list=auto_alloc_array(machine, UINT16, 10 * 256 / 2);
957	978	memset(deco32_raster_display_list, 0, 10 * 256);
958	979
959	980	tilemap_set_transparent_pen(pf1_tilemap,0);
r4679	r4680
973	994	pf3_tilemap = tilemap_create(machine, get_pf3_tile_info, deco16_scan_rows, 16,16,64,32);
974	995	pf4_tilemap = tilemap_create(machine, get_pf4_tile_info, deco16_scan_rows, 16,16,64,32);
975	996	pf1a_tilemap =0;
976		dirty_palette = auto_malloc(4096);
	997	dirty_palette = auto_alloc_array(machine, UINT8, 4096);
977	998
978	999	deco_allocate_sprite_bitmap(machine);
979	1000
r4679	r4680
993	1014	pf3_tilemap = tilemap_create(machine, get_ll_pf3_tile_info, deco16_scan_rows,16,16,64,32);
994	1015	pf4_tilemap = tilemap_create(machine, get_ll_pf4_tile_info, deco16_scan_rows,     16,16,64,32);
995	1016	pf1a_tilemap =tilemap_create(machine, get_pf1a_tile_info,   deco16_scan_rows,16,16,64,32);
996		dirty_palette = auto_malloc(4096);
997		deco32_raster_display_list = auto_malloc(10 * 256);
	1017	dirty_palette = auto_alloc_array(machine, UINT8, 4096);
	1018	deco32_raster_display_list = auto_alloc_array(machine, UINT16, 10 * 256 / 2);
998	1019
999	1020	tilemap_set_transparent_pen(pf1_tilemap,0);
1000	1021	tilemap_set_transparent_pen(pf2_tilemap,0);
r4679	r4680
1015	1036	pf3_tilemap = tilemap_create(machine, get_ll_pf3_tile_info, deco16_scan_rows,16,16,32,32);
1016	1037	pf4_tilemap = tilemap_create(machine, get_ll_pf4_tile_info, deco16_scan_rows,     16,16,32,32);
1017	1038	pf1a_tilemap =tilemap_create(machine, get_pf1a_tile_info,   deco16_scan_rows,16,16,64,32);
1018		dirty_palette = auto_malloc(4096);
1019		deco32_raster_display_list = auto_malloc(10 * 256);
	1039	dirty_palette = auto_alloc_array(machine, UINT8, 4096);
	1040	deco32_raster_display_list = auto_alloc_array(machine, UINT16, 10 * 256 / 2);
1020	1041	memset(deco32_raster_display_list, 0, 10 * 256);
1021	1042
1022	1043	tilemap_set_transparent_pen(pf1_tilemap,0);
r4679	r4680
1040	1061	pf3_tilemap = tilemap_create(machine, get_pf3_tile_info, deco16_scan_rows,16,16,64,32);
1041	1062	pf4_tilemap = tilemap_create(machine, get_pf4_tile_info, deco16_scan_rows,     16,16,64,32);
1042	1063	pf1a_tilemap =0;
1043		dirty_palette = auto_malloc(4096);
	1064	dirty_palette = auto_alloc_array(machine, UINT8, 4096);
1044	1065
1045	1066	width = video_screen_get_width(machine->primary_screen);
1046	1067	height = video_screen_get_height(machine->primary_screen);
1047		sprite0_mix_bitmap=auto_bitmap_alloc(width, height, BITMAP_FORMAT_INDEXED16 );
1048		sprite1_mix_bitmap=auto_bitmap_alloc(width, height, BITMAP_FORMAT_INDEXED16 );
1049		tilemap_alpha_bitmap=auto_bitmap_alloc(width, height, BITMAP_FORMAT_INDEXED16 );
	1068	sprite0_mix_bitmap=auto_bitmap_alloc(machine, width, height, BITMAP_FORMAT_INDEXED16 );
	1069	sprite1_mix_bitmap=auto_bitmap_alloc(machine, width, height, BITMAP_FORMAT_INDEXED16 );
	1070	tilemap_alpha_bitmap=auto_bitmap_alloc(machine, width, height, BITMAP_FORMAT_INDEXED16 );
1050	1071
1051	1072	tilemap_set_transparent_pen(pf1_tilemap,0);
1052	1073	tilemap_set_transparent_pen(pf2_tilemap,0);
r4679	r4680
1242	1263	bitmap_fill(priority_bitmap,cliprect,0);
1243	1264	if ((deco32_pri&1)==0) {
1244	1265	if (pf3_enable)
1245		tilemap_draw(bitmap,cliprect,pf3_tilemap,TILEMAP_DRAW_OPAQUE,0);
	1266	tilemap_draw(bitmap,cliprect,pf3_tilemap,TILEMAP_DRAW_OPAQUE,1);
1246	1267	else
1247	1268	bitmap_fill(bitmap,cliprect,get_black_pen(screen->machine));
1248	1269
1249	1270	if (deco32_raster_display_position)
1250		tilemap_raster_draw(bitmap,cliprect,0,1);
	1271	tilemap_raster_draw(bitmap,cliprect,0,2);
1251	1272	else
1252		tilemap_draw(bitmap,cliprect,pf2_tilemap,0,1);
	1273	tilemap_draw(bitmap,cliprect,pf2_tilemap,0,2);
1253	1274	} else {
1254	1275	if (pf2_enable) {
1255	1276	if (deco32_raster_display_position)
1256		tilemap_raster_draw(bitmap,cliprect,TILEMAP_DRAW_OPAQUE,0);
	1277	tilemap_raster_draw(bitmap,cliprect,TILEMAP_DRAW_OPAQUE,1);
1257	1278	else
1258		tilemap_draw(bitmap,cliprect,pf2_tilemap,0,0);
	1279	tilemap_draw(bitmap,cliprect,pf2_tilemap,0,1);
1259	1280	}
1260	1281	else
1261	1282	bitmap_fill(bitmap,cliprect,get_black_pen(screen->machine));
1262	1283
1263		tilemap_draw(bitmap,cliprect,pf3_tilemap,0,1);
	1284	tilemap_draw(bitmap,cliprect,pf3_tilemap,0,2);
1264	1285	}
1265	1286
1266	1287	/* PF1 can be in 8x8 mode or 16x16 mode */
1267	1288	if (deco32_pf12_control[6]&0x80)
1268		tilemap_draw(bitmap,cliprect,pf1_tilemap,0,2);
	1289	tilemap_draw(bitmap,cliprect,pf1_tilemap,0,4);
1269	1290	else
1270		tilemap_draw(bitmap,cliprect,pf1a_tilemap,0,2);
	1291	tilemap_draw(bitmap,cliprect,pf1a_tilemap,0,4);
1271	1292
1272	1293	captaven_draw_sprites(screen->machine,bitmap,cliprect,buffered_spriteram32,3);
1273	1294

src/mame/video/midzeus.c

r4679	r4680
247	247	int i;
248	248
249	249	/* allocate memory for "wave" RAM */
250		waveram[0] = auto_malloc(WAVERAM0_WIDTH * WAVERAM0_HEIGHT * 8);
251		waveram[1] = auto_malloc(WAVERAM1_WIDTH * WAVERAM1_HEIGHT * 8);
	250	waveram[0] = auto_alloc_array(machine, UINT32, WAVERAM0_WIDTH * WAVERAM0_HEIGHT * 8/4);
	251	waveram[1] = auto_alloc_array(machine, UINT32, WAVERAM1_WIDTH * WAVERAM1_HEIGHT * 8/4);
252	252
253	253	/* initialize a 5-5-5 palette */
254	254	for (i = 0; i < 32768; i++)
r4679	r4680
615	615	// zeusbase[0x46] = ??? = 0x00000000
616	616	// zeusbase[0x4c] = ??? = 0x00808080 (brightness?)
617	617	// zeusbase[0x4e] = ??? = 0x00808080 (brightness?)
618		poly_extra_data *extra = poly_get_extra_data(poly);
	618	poly_extra_data *extra = (poly_extra_data *)poly_get_extra_data(poly);
619	619	poly_vertex vert[4];
620	620
621	621	vert[0].x = (INT16)zeusbase[0x08];
r4679	r4680
655	655	we simply assert immediately if this is enabled. invasn needs this for proper
656	656	operations */
657	657	if (zeusbase[0x80] & 0x02000000)
658		cpu_set_input_line(machine->cpu[0], 2, ASSERT_LINE);
	658	cputag_set_input_line(machine, "maincpu", 2, ASSERT_LINE);
659	659	else
660		cpu_set_input_line(machine->cpu[0], 2, CLEAR_LINE);
	660	cputag_set_input_line(machine, "maincpu", 2, CLEAR_LINE);
661	661	break;
662	662
663	663	case 0x84:
r4679	r4680
700	700	const UINT32 *src;
701	701
702	702	if (zeusbase[0xb6] & 0x80000000)
703		src = waveram1_ptr_from_expanded_addr(zeusbase[0xb4]);
	703	src = (const UINT32 *)waveram1_ptr_from_expanded_addr(zeusbase[0xb4]);
704	704	else
705		src = waveram0_ptr_from_expanded_addr(zeusbase[0xb4]);
	705	src = (const UINT32 *)waveram0_ptr_from_expanded_addr(zeusbase[0xb4]);
706	706
707	707	poly_wait(poly, "vram_read");
708	708	zeusbase[0xb0] = WAVERAM_READ32(src, 0);
r4679	r4680
1201	1201	clipvert[i].y += 0.0005f;
1202	1202	}
1203	1203
1204		extra = poly_get_extra_data(poly);
	1204	extra = (poly_extra_data *)poly_get_extra_data(poly);
1205	1205	extra->solidcolor = zeusbase[0x00] & 0x7fff;
1206	1206	extra->zoffset = zeusbase[0x7e] >> 16;
1207	1207	extra->alpha = zeusbase[0x4e];
r4679	r4680
1223	1223
1224	1224	static void render_poly_4bit(void *dest, INT32 scanline, const poly_extent *extent, const void *extradata, int threadid)
1225	1225	{
1226		const poly_extra_data *extra = extradata;
	1226	const poly_extra_data *extra = (const poly_extra_data *)extradata;
1227	1227	INT32 curz = extent->param[0].start;
1228	1228	INT32 curu = extent->param[1].start;
1229	1229	INT32 curv = extent->param[2].start;
r4679	r4680
1280	1280
1281	1281	static void render_poly_8bit(void *dest, INT32 scanline, const poly_extent *extent, const void *extradata, int threadid)
1282	1282	{
1283		const poly_extra_data *extra = extradata;
	1283	const poly_extra_data *extra = (const poly_extra_data *)extradata;
1284	1284	INT32 curz = extent->param[0].start;
1285	1285	INT32 curu = extent->param[1].start;
1286	1286	INT32 curv = extent->param[2].start;
r4679	r4680
1337	1337
1338	1338	static void render_poly_shade(void *dest, INT32 scanline, const poly_extent *extent, const void *extradata, int threadid)
1339	1339	{
1340		const poly_extra_data *extra = extradata;
	1340	const poly_extra_data *extra = (const poly_extra_data *)extradata;
1341	1341	int x;
1342	1342
1343	1343	for (x = extent->startx; x < extent->stopx; x++)
r4679	r4680
1364	1364
1365	1365	static void render_poly_solid(void *dest, INT32 scanline, const poly_extent *extent, const void *extradata, int threadid)
1366	1366	{
1367		const poly_extra_data *extra = extradata;
	1367	const poly_extra_data *extra = (const poly_extra_data *)extradata;
1368	1368	UINT16 color = extra->solidcolor;
1369	1369	INT32 curz = (INT32)(extent->param[0].start);
1370	1370	INT32 curv = extent->param[2].start;
r4679	r4680
1390	1390
1391	1391	static void render_poly_solid_fixedz(void *dest, INT32 scanline, const poly_extent *extent, const void *extradata, int threadid)
1392	1392	{
1393		const poly_extra_data *extra = extradata;
	1393	const poly_extra_data *extra = (const poly_extra_data *)extradata;
1394	1394	UINT16 color = extra->solidcolor;
1395	1395	UINT16 depth = extra->zoffset;
1396	1396	int x;
r4679	r4680
1427	1427	} recent_entries[100];
1428	1428
1429	1429	UINT32 numoctets = (length_and_base >> 24) + 1;
1430		const UINT32 *ptr = waveram0_ptr_from_block_addr(length_and_base);
	1430	const UINT32 *ptr = (const UINT32 *)waveram0_ptr_from_block_addr(length_and_base);
1431	1431	UINT32 checksum = length_and_base;
1432	1432	int foundit = FALSE;
1433	1433	int i;

src/mame/video/argus.c

r4679	r4680
321	321	tilemap_set_transparent_pen(tx_tilemap,  15);
322	322
323	323	/* dummy RAM for back ground */
324		argus_dummy_bg0ram = auto_malloc(0x800);
	324	argus_dummy_bg0ram = auto_alloc_array(machine, UINT8, 0x800);
325	325
326		jal_blend_table = auto_malloc(0xc00);
	326	jal_blend_table = auto_alloc_array(machine, UINT8, 0xc00);
327	327	}
328	328
329	329	VIDEO_RESET( argus )
r4679	r4680
346	346
347	347	mosaicbitmap = video_screen_auto_bitmap_alloc(machine->primary_screen);
348	348
349		jal_blend_table = auto_malloc(0xc00);
	349	jal_blend_table = auto_alloc_array(machine, UINT8, 0xc00);
350	350	}
351	351
352	352	VIDEO_RESET( valtric )
r4679	r4680
365	365	tilemap_set_transparent_pen(bg1_tilemap, 15);
366	366	tilemap_set_transparent_pen(tx_tilemap,  15);
367	367
368		butasan_pagedram[0] = auto_malloc(0x1000);
369		butasan_pagedram[1] = auto_malloc(0x1000);
	368	butasan_pagedram[0] = auto_alloc_array(machine, UINT8, 0x1000);
	369	butasan_pagedram[1] = auto_alloc_array(machine, UINT8, 0x1000);
370	370
371	371	butasan_bg0ram     = &butasan_pagedram[0][0x000];
372	372	butasan_bg0backram = &butasan_pagedram[0][0x800];
373	373	butasan_txram      = &butasan_pagedram[1][0x000];
374	374	butasan_txbackram  = &butasan_pagedram[1][0x800];
375	375
376		jal_blend_table = auto_malloc(0xc00);
	376	jal_blend_table = auto_alloc_array(machine, UINT8, 0xc00);
377	377	//jal_blend_table = NULL;
378	378	}
379	379

src/mame/video/grchamp.c

r4679	r4680
16	16	{
17	17	static const int resistances[3] = { 100, 270, 470 };
18	18	double rweights[3], gweights[3], bweights[2];
19		grchamp_state *state = machine->driver_data;
	19	grchamp_state *state = (grchamp_state *)machine->driver_data;
20	20	int i;
21	21
22	22	/* compute the color output resistor weights */
r4679	r4680
54	54
55	55	WRITE8_HANDLER( grchamp_left_w )
56	56	{
57		grchamp_state *state = space->machine->driver_data;
	57	grchamp_state *state = (grchamp_state *)space->machine->driver_data;
58	58	state->leftram[offset] = data;
59	59	tilemap_mark_tile_dirty(state->left_tilemap, offset);
60	60	}
61	61
62	62	WRITE8_HANDLER( grchamp_center_w )
63	63	{
64		grchamp_state *state = space->machine->driver_data;
	64	grchamp_state *state = (grchamp_state *)space->machine->driver_data;
65	65	state->centerram[offset] = data;
66	66	tilemap_mark_tile_dirty(state->center_tilemap, offset);
67	67	}
68	68
69	69	WRITE8_HANDLER( grchamp_right_w )
70	70	{
71		grchamp_state *state = space->machine->driver_data;
	71	grchamp_state *state = (grchamp_state *)space->machine->driver_data;
72	72	state->rightram[offset] = data;
73	73	tilemap_mark_tile_dirty(state->right_tilemap, offset);
74	74	}
75	75
76	76	static TILE_GET_INFO( get_text_tile_info )
77	77	{
78		grchamp_state *state = machine->driver_data;
	78	grchamp_state *state = (grchamp_state *)machine->driver_data;
79	79	SET_TILE_INFO(0, state->videoram[tile_index], 0, 0);
80	80	}
81	81
82	82	static TILE_GET_INFO( get_left_tile_info )
83	83	{
84		grchamp_state *state = machine->driver_data;
	84	grchamp_state *state = (grchamp_state *)machine->driver_data;
85	85	SET_TILE_INFO(1, state->leftram[tile_index], 0, 0);
86	86	}
87	87
88	88	static TILE_GET_INFO( get_right_tile_info )
89	89	{
90		grchamp_state *state = machine->driver_data;
	90	grchamp_state *state = (grchamp_state *)machine->driver_data;
91	91	SET_TILE_INFO(2, state->rightram[tile_index], 0, 0);
92	92	}
93	93
94	94	static TILE_GET_INFO( get_center_tile_info )
95	95	{
96		grchamp_state *state = machine->driver_data;
	96	grchamp_state *state = (grchamp_state *)machine->driver_data;
97	97	SET_TILE_INFO(3, state->centerram[tile_index], 0, 0);
98	98	}
99	99
r4679	r4680
105	105
106	106	VIDEO_START( grchamp )
107	107	{
108		grchamp_state *state = machine->driver_data;
	108	grchamp_state *state = (grchamp_state *)machine->driver_data;
109	109
110		state->work_bitmap = auto_bitmap_alloc(32,32,video_screen_get_format(machine->primary_screen));
	110	state->work_bitmap = auto_bitmap_alloc(machine,32,32,video_screen_get_format(machine->primary_screen));
111	111
112	112	/* allocate tilemaps for each of the three sections */
113	113	state->text_tilemap = tilemap_create(machine, get_text_tile_info, tilemap_scan_rows,  8,8, 32,32);
r4679	r4680
368	368	MAKE_RGB(RGB_MAX,RGB_MAX,RGB_MAX)
369	369	};
370	370
371		grchamp_state *state = screen->machine->driver_data;
	371	grchamp_state *state = (grchamp_state *)screen->machine->driver_data;
372	372	const UINT8 *amedata = memory_region(screen->machine, "gfx5");
373	373	const UINT8 *headdata = memory_region(screen->machine, "gfx6");
374	374	const UINT8 *pldata = memory_region(screen->machine, "gfx7");

src/mame/video/gaiden.c

r4679	r4680
92	92	int height = video_screen_get_height(machine->primary_screen);
93	93
94	94	/* set up tile layers */
95		tile_bitmap_bg = auto_bitmap_alloc(width, height, BITMAP_FORMAT_INDEXED16);
96		tile_bitmap_fg = auto_bitmap_alloc(width, height, BITMAP_FORMAT_INDEXED16);
	95	tile_bitmap_bg = auto_bitmap_alloc(machine, width, height, BITMAP_FORMAT_INDEXED16);
	96	tile_bitmap_fg = auto_bitmap_alloc(machine, width, height, BITMAP_FORMAT_INDEXED16);
97	97
98	98	background = tilemap_create(machine, get_bg_tile_info,      tilemap_scan_rows,16,16,64,32);
99	99	foreground = tilemap_create(machine, get_fg_tile_info_raiga,tilemap_scan_rows,16,16,64,32);
r4679	r4680
104	104	tilemap_set_transparent_pen(text_layer,0);
105	105
106	106	/* set up sprites */
107		sprite_bitmap = auto_bitmap_alloc(width, height, BITMAP_FORMAT_INDEXED16);
	107	sprite_bitmap = auto_bitmap_alloc(machine, width, height, BITMAP_FORMAT_INDEXED16);
108	108	}
109	109
110	110	VIDEO_START( drgnbowl )

src/mame/video/zaxxon.c

r4679	r4680
167	167	VIDEO_START( congo )
168	168	{
169	169	/* allocate our own spriteram since it is not accessible by the main CPU */
170		spriteram = auto_malloc(0x100);
	170	spriteram = auto_alloc_array(machine, UINT8, 0x100);
171	171
172	172	/* register for save states */
173	173	state_save_register_global(machine, congo_fg_bank);

src/mame/video/karnov.c

r4679	r4680
205	205	VIDEO_START( karnov )
206	206	{
207	207	/* Allocate bitmaps */
208		bitmap_f = auto_bitmap_alloc(512,512,video_screen_get_format(machine->primary_screen));
	208	bitmap_f = auto_bitmap_alloc(machine,512,512,video_screen_get_format(machine->primary_screen));
209	209
210	210	fix_tilemap=tilemap_create(machine, get_fix_tile_info,tilemap_scan_rows,8,8,32,32);
211	211
r4679	r4680
215	215	VIDEO_START( wndrplnt )
216	216	{
217	217	/* Allocate bitmaps */
218		bitmap_f = auto_bitmap_alloc(512,512,video_screen_get_format(machine->primary_screen));
	218	bitmap_f = auto_bitmap_alloc(machine,512,512,video_screen_get_format(machine->primary_screen));
219	219
220	220	fix_tilemap=tilemap_create(machine, get_fix_tile_info,tilemap_scan_cols,8,8,32,32);
221	221

src/mame/video/lwings.c

r4679	r4680
289	289
290	290	VIDEO_EOF( lwings )
291	291	{
292		const address_space *space = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM);
	292	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
293	293
294		buffer_spriteram_w(space,0,0);
	294	buffer_spriteram_w(space, 0, 0);
295	295	}

src/mame/video/segaybd.c

r4679	r4680
32	32	segaic16_palette_init(0x2000);
33	33
34	34	/* allocate a bitmap for the yboard layer */
35		yboard_bitmap = auto_bitmap_alloc(512, 512, BITMAP_FORMAT_INDEXED16);
	35	yboard_bitmap = auto_bitmap_alloc(machine, 512, 512, BITMAP_FORMAT_INDEXED16);
36	36
37	37	/* initialize the sprites */
38	38	segaic16_sprites_init(machine, 0, SEGAIC16_SPRITES_YBOARD_16B, 0x800, 0);

src/mame/video/speedspn.c

r4679	r4680
20	20
21	21	VIDEO_START(speedspn)
22	22	{
23		speedspn_vidram = auto_malloc(0x1000 * 2);
	23	speedspn_vidram = auto_alloc_array(machine, UINT8, 0x1000 * 2);
24	24	speedspn_tilemap = tilemap_create(machine, get_speedspn_tile_info,tilemap_scan_cols, 8, 8,64,32);
25	25	}
26	26

src/mame/video/amigaaga.c

r4679	r4680
276	276	if (LOG_COPPER)
277	277	logerror("%02X.%02X: Write to %s = %04x\n", last_scanline, xpos / 2, amiga_custom_names[copper_pending_offset & 0xff], copper_pending_data);
278	278
279		amiga_custom_w(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), copper_pending_offset, copper_pending_data, 0xffff);
	279	amiga_custom_w(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), copper_pending_offset, copper_pending_data, 0xffff);
280	280	copper_pending_offset = 0;
281	281	}
282	282

src/mame/video/cloak.c

r4679	r4680
174	174	{
175	175	bg_tilemap = tilemap_create(machine, get_bg_tile_info, tilemap_scan_rows, 8, 8, 32, 32);
176	176
177		bitmap_videoram1 = auto_malloc(256*256);
178		bitmap_videoram2 = auto_malloc(256*256);
179		palette_ram = auto_malloc(NUM_PENS * sizeof(palette_ram[0]));
	177	bitmap_videoram1 = auto_alloc_array(machine, UINT8, 256*256);
	178	bitmap_videoram2 = auto_alloc_array(machine, UINT8, 256*256);
	179	palette_ram = auto_alloc_array(machine, UINT16, NUM_PENS);
180	180
181	181	set_current_bitmap_videoram_pointer();
182	182

src/mame/video/gticlub.c

r4679	r4680
44	44	int i;
45	45	for (i=0; i<MAX_K001006_CHIPS; i++)
46	46	{
47		K001006_pal_ram[i] = auto_malloc(0x800*sizeof(UINT16));
48		memset(K001006_pal_ram[i], 0, 0x800*sizeof(UINT16));
49		K001006_unknown_ram[i] = auto_malloc(0x1000*sizeof(UINT16));
50		memset(K001006_unknown_ram[i], 0, 0x1000*sizeof(UINT16));
	47	K001006_pal_ram[i] = auto_alloc_array_clear(machine, UINT16, 0x800);
	48	K001006_unknown_ram[i] = auto_alloc_array_clear(machine, UINT16, 0x1000);
51	49	K001006_addr[i] = 0;
52	50	K001006_device_sel[i] = 0;
53		K001006_palette[i] = auto_malloc(0x800*sizeof(UINT32));
	51	K001006_palette[i] = auto_alloc_array(machine, UINT32, 0x800);
54	52	memset(K001006_palette[i], 0, 0x800*sizeof(UINT32));
55	53	}
56	54	}
r4679	r4680
208	206
209	207	int width = video_screen_get_width(machine->primary_screen);
210	208	int height = video_screen_get_height(machine->primary_screen);
211		K001005_zbuffer = auto_bitmap_alloc(width, height, BITMAP_FORMAT_INDEXED32);
	209	K001005_zbuffer = auto_bitmap_alloc(machine, width, height, BITMAP_FORMAT_INDEXED32);
212	210
213	211	gfxrom = memory_region(machine, "gfx1");
214	212
215	213	K001005_bitmap[0] = video_screen_auto_bitmap_alloc(machine->primary_screen);
216	214	K001005_bitmap[1] = video_screen_auto_bitmap_alloc(machine->primary_screen);
217	215
218		K001005_texture = auto_malloc(0x800000);
	216	K001005_texture = auto_alloc_array(machine, UINT8, 0x800000);
219	217
220		K001005_ram[0] = auto_malloc(0x140000 * sizeof(UINT16));
221		K001005_ram[1] = auto_malloc(0x140000 * sizeof(UINT16));
	218	K001005_ram[0] = auto_alloc_array(machine, UINT16, 0x140000);
	219	K001005_ram[1] = auto_alloc_array(machine, UINT16, 0x140000);
222	220
223		K001005_fifo = auto_malloc(0x800 * sizeof(UINT32));
	221	K001005_fifo = auto_alloc_array(machine, UINT32, 0x800);
224	222
225		K001005_3d_fifo = auto_malloc(0x10000 * sizeof(UINT32));
	223	K001005_3d_fifo = auto_alloc_array(machine, UINT32, 0x10000);
226	224
227	225	poly = poly_alloc(machine, 4000, sizeof(poly_extra_data), POLYFLAG_ALLOW_QUADS);
228	226	add_exit_callback(machine, K001005_exit);
r4679	r4680
458	456
459	457	static void draw_scanline(void *dest, INT32 scanline, const poly_extent *extent, const void *extradata, int threadid)
460	458	{
461		const poly_extra_data *extra = extradata;
462		bitmap_t *destmap = dest;
	459	const poly_extra_data *extra = (const poly_extra_data *)extradata;
	460	bitmap_t *destmap = (bitmap_t *)dest;
463	461	float z = extent->param[0].start;
464	462	float dz = extent->param[0].dpdx;
465	463	UINT32 *fb = BITMAP_ADDR32(destmap, scanline, 0);
r4679	r4680
486	484
487	485	static void draw_scanline_tex(void *dest, INT32 scanline, const poly_extent *extent, const void *extradata, int threadid)
488	486	{
489		const poly_extra_data *extra = extradata;
490		bitmap_t *destmap = dest;
	487	const poly_extra_data *extra = (const poly_extra_data *)extradata;
	488	bitmap_t *destmap = (bitmap_t *)dest;
491	489	UINT8 *texrom = gfxrom + (extra->texture_page * 0x40000);
492	490	int pal_chip = (extra->texture_palette & 0x8) ? 1 : 0;
493	491	int palette_index = (extra->texture_palette & 0x7) * 256;
r4679	r4680
554	552	{
555	553	if (K001005_3d_fifo[i] == 0x80000003)
556	554	{
557		poly_extra_data *extra = poly_get_extra_data(poly);
	555	poly_extra_data *extra = (poly_extra_data *)poly_get_extra_data(poly);
558	556	poly_vertex v[4];
559	557	int r, g, b, a;
560	558	UINT32 color;
r4679	r4680
607	605	// 0x01: -------- -------- ----x-x- x-x-x-x-    Texture X / 8
608	606	// 0x01: -------- -------- -----x-x -x-x-x-x    Texture Y / 8
609	607
610		poly_extra_data *extra = poly_get_extra_data(poly);
	608	poly_extra_data *extra = (poly_extra_data *)poly_get_extra_data(poly);
611	609	poly_vertex v[4];
612	610	int tx, ty;
613	611	UINT32 color = 0;
r4679	r4680
721	719
722	720	while ((K001005_3d_fifo[index] & 0xffffff00) != 0x80000000 && index < K001005_3d_fifo_ptr)
723	721	{
724		poly_extra_data *extra = poly_get_extra_data(poly);
	722	poly_extra_data *extra = (poly_extra_data *)poly_get_extra_data(poly);
725	723	int new_verts = 0;
726	724
727	725	if (poly_type)
r4679	r4680
806	804	else if (K001005_3d_fifo[i] == 0x80000006 || K001005_3d_fifo[i] == 0x80000026 ||
807	805	K001005_3d_fifo[i] == 0x80000020 || K001005_3d_fifo[i] == 0x80000022)
808	806	{
809		poly_extra_data *extra = poly_get_extra_data(poly);
	807	poly_extra_data *extra = (poly_extra_data *)poly_get_extra_data(poly);
810	808	poly_vertex v[4];
811	809	int r, g, b, a;
812	810	UINT32 color;
r4679	r4680
861	859
862	860	while ((K001005_3d_fifo[index] & 0xffffff00) != 0x80000000 && index < K001005_3d_fifo_ptr)
863	861	{
864		poly_extra_data *extra = poly_get_extra_data(poly);
	862	poly_extra_data *extra = (poly_extra_data *)poly_get_extra_data(poly);
865	863	int new_verts = 0;
866	864
867	865	if (poly_type)

src/mame/video/namcona1.c

r4679	r4680
292	292	tilemap_palette_bank[i] = -1;
293	293	}
294	294
295		shaperam           = auto_malloc( 0x2000*4 );
296		cgram              = auto_malloc( 0x1000*0x40 );
	295	shaperam           = auto_alloc_array(machine, UINT16, 0x2000*4/2 );
	296	cgram              = auto_alloc_array(machine, UINT16, 0x1000*0x40/2 );
297	297
298	298	machine->gfx[0] = gfx_element_alloc( machine, &cg_layout_8bpp, (UINT8 *)cgram, machine->config->total_colors/256, 0 );
299	299	machine->gfx[1] = gfx_element_alloc( machine, &cg_layout_4bpp, (UINT8 *)cgram, machine->config->total_colors/16, 0 );

src/mame/video/armedf.c

r4679	r4680
352	352
353	353	VIDEO_EOF( armedf )
354	354	{
355		const address_space *space = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM);
	355	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
356	356
357	357	buffer_spriteram16_w(space,0,0,0xffff);
358	358	}

src/mame/video/dkong.c

r4679	r4680
201	201
202	202	PALETTE_INIT( dkong2b)
203	203	{
204		dkong_state *state = machine->driver_data;
	204	dkong_state *state = (dkong_state *)machine->driver_data;
205	205	rgb_t   *rgb;
206	206	int i;
207	207
r4679	r4680
230	230
231	231	PALETTE_INIT( dkong4b )
232	232	{
233		dkong_state *state = machine->driver_data;
	233	dkong_state *state = (dkong_state *)machine->driver_data;
234	234	int i;
235	235	int r,g,b;
236	236
r4679	r4680
268	268
269	269	PALETTE_INIT( radarscp )
270	270	{
271		dkong_state *state = machine->driver_data;
	271	dkong_state *state = (dkong_state *)machine->driver_data;
272	272	int i;
273	273	int r,g,b;
274	274
r4679	r4680
332	332
333	333	PALETTE_INIT( radarsc1 )
334	334	{
335		dkong_state *state = machine->driver_data;
	335	dkong_state *state = (dkong_state *)machine->driver_data;
336	336	int i;
337	337	int r,g,b;
338	338
r4679	r4680
432	432
433	433	PALETTE_INIT( dkong3 )
434	434	{
435		dkong_state *state = machine->driver_data;
	435	dkong_state *state = (dkong_state *)machine->driver_data;
436	436	rgb_t   *rgb;
437	437
438	438	rgb = compute_res_net_all(color_prom, &dkong3_decode_info, &dkong3_net_info);
r4679	r4680
447	447
448	448	static TILE_GET_INFO( dkong_bg_tile_info )
449	449	{
450		dkong_state *state = machine->driver_data;
	450	dkong_state *state = (dkong_state *)machine->driver_data;
451	451	int code = state->video_ram[tile_index] + 256 * state->gfx_bank;
452	452	int color = (state->color_codes[tile_index % 32 + 32 * (tile_index / 32 / 4)] & 0x0f) + 0x10 * state->palette_bank;
453	453
r4679	r4680
456	456
457	457	static TILE_GET_INFO( radarsc1_bg_tile_info )
458	458	{
459		dkong_state *state = machine->driver_data;
	459	dkong_state *state = (dkong_state *)machine->driver_data;
460	460	int code = state->video_ram[tile_index] + 256 * state->gfx_bank;
461	461	int color = (state->color_codes[tile_index % 32] & 0x0f);
462	462	color = color | (state->palette_bank<<4);
r4679	r4680
472	472
473	473	WRITE8_HANDLER( dkong_videoram_w )
474	474	{
475		dkong_state *state = space->machine->driver_data;
	475	dkong_state *state = (dkong_state *)space->machine->driver_data;
476	476
477	477	if (state->video_ram[offset] != data)
478	478	{
r4679	r4680
483	483
484	484	WRITE8_HANDLER( dkongjr_gfxbank_w )
485	485	{
486		dkong_state *state = space->machine->driver_data;
	486	dkong_state *state = (dkong_state *)space->machine->driver_data;
487	487
488	488	if (state->gfx_bank != (data & 0x01))
489	489	{
r4679	r4680
494	494
495	495	WRITE8_HANDLER( dkong3_gfxbank_w )
496	496	{
497		dkong_state *state = space->machine->driver_data;
	497	dkong_state *state = (dkong_state *)space->machine->driver_data;
498	498
499	499	if (state->gfx_bank != (~data & 0x01))
500	500	{
r4679	r4680
505	505
506	506	WRITE8_HANDLER( dkong_palettebank_w )
507	507	{
508		dkong_state *state = space->machine->driver_data;
	508	dkong_state *state = (dkong_state *)space->machine->driver_data;
509	509	int newbank;
510	510
511	511	newbank = state->palette_bank;
r4679	r4680
524	524
525	525	WRITE8_HANDLER( radarscp_grid_enable_w )
526	526	{
527		dkong_state *state = space->machine->driver_data;
	527	dkong_state *state = (dkong_state *)space->machine->driver_data;
528	528
529	529	state->grid_on = data & 0x01;
530	530	}
531	531
532	532	WRITE8_HANDLER( radarscp_grid_color_w )
533	533	{
534		dkong_state *state = space->machine->driver_data;
	534	dkong_state *state = (dkong_state *)space->machine->driver_data;
535	535
536	536	state->grid_col = (data & 0x07) ^ 0x07;
537	537	/* popmessage("Gridcol: %d", state->grid_col); */
r4679	r4680
539	539
540	540	WRITE8_HANDLER( dkong_flipscreen_w )
541	541	{
542		dkong_state *state = space->machine->driver_data;
	542	dkong_state *state = (dkong_state *)space->machine->driver_data;
543	543
544	544	state->flip = ~data & 0x01;
545	545	}
546	546
547	547	WRITE8_HANDLER( dkong_spritebank_w )
548	548	{
549		dkong_state *state = space->machine->driver_data;
	549	dkong_state *state = (dkong_state *)space->machine->driver_data;
550	550
551	551	state->sprite_bank = data & 0x01;
552	552	}
r4679	r4680
559	559
560	560	static void draw_sprites(running_machine *machine, bitmap_t *bitmap, const rectangle *cliprect, UINT32 mask_bank, UINT32 shift_bits)
561	561	{
562		dkong_state *state = machine->driver_data;
	562	dkong_state *state = (dkong_state *)machine->driver_data;
563	563	int offs;
564	564	int scanline_vf;   /* buffering scanline including flip */
565	565	int scanline_vfc;        /* line buffering scanline including flip - this is the cached scanline_vf*/
r4679	r4680
691	691
692	692	INLINE double CD4049(running_machine *machine, double x)
693	693	{
694		dkong_state *state = machine->driver_data;
	694	dkong_state *state = (dkong_state *)machine->driver_data;
695	695
696	696	if (x>0)
697	697	return exp(-state->cd4049_a * pow(x,state->cd4049_b));
r4679	r4680
713	713
714	714	static void radarscp_step(running_machine *machine, int line_cnt)
715	715	{
716		dkong_state *state = machine->driver_data;
	716	dkong_state *state = (dkong_state *)machine->driver_data;
717	717	const device_config *dev6h = devtag_get_device(machine, "ls259.6h");
718	718	const device_config *devvp2 = devtag_get_device(machine, "virtual_p2");
719	719
r4679	r4680
839	839
840	840	static void radarscp_scanline(running_machine *machine, int scanline)
841	841	{
842		dkong_state *state = machine->driver_data;
	842	dkong_state *state = (dkong_state *)machine->driver_data;
843	843	const UINT8 *table = state->gfx3;
844	844	int       table_len = state->gfx3_len;
845	845	int          x,y,offset;
r4679	r4680
876	876
877	877	static TIMER_CALLBACK( scanline_callback )
878	878	{
879		dkong_state *state = machine->driver_data;
	879	dkong_state *state = (dkong_state *)machine->driver_data;
880	880	int scanline = param;
881	881
882	882	if ((state->hardware_type == HARDWARE_TRS02) || (state->hardware_type == HARDWARE_TRS01))
r4679	r4680
892	892
893	893	static void check_palette(running_machine *machine)
894	894	{
895		dkong_state *state = machine->driver_data;
	895	dkong_state *state = (dkong_state *)machine->driver_data;
896	896	const input_port_config *port;
897	897	int newset;
898	898
r4679	r4680
921	921
922	922	static VIDEO_START( dkong_base )
923	923	{
924		dkong_state *state = machine->driver_data;
	924	dkong_state *state = (dkong_state *)machine->driver_data;
925	925
926	926	state->cd4049_b = (log(0.0 - log(cd4049_al)) - log(0.0 - log((1.0-cd4049_al))) ) / log(cd4049_vh/cd4049_vl);
927	927	state->cd4049_a = log(0.0 - log(cd4049_al)) - state->cd4049_b * log(cd4049_vh);
r4679	r4680
942	942
943	943	VIDEO_START( dkong )
944	944	{
945		dkong_state *state = machine->driver_data;
	945	dkong_state *state = (dkong_state *)machine->driver_data;
946	946
947	947	VIDEO_START_CALL(dkong_base);
948	948
r4679	r4680
978	978
979	979	VIDEO_UPDATE( dkong )
980	980	{
981		dkong_state *state = screen->machine->driver_data;
	981	dkong_state *state = (dkong_state *)screen->machine->driver_data;
982	982
983	983	tilemap_set_flip(ALL_TILEMAPS, state->flip ? TILEMAP_FLIPX | TILEMAP_FLIPY : 0);
984	984	tilemap_set_scrollx(state->bg_tilemap, 0, state->flip ?  0 : 0);
r4679	r4680
1006	1006
1007	1007	VIDEO_UPDATE( pestplce )
1008	1008	{
1009		dkong_state *state = screen->machine->driver_data;
	1009	dkong_state *state = (dkong_state *)screen->machine->driver_data;
1010	1010	int offs;
1011	1011
1012	1012	tilemap_draw(bitmap, cliprect, state->bg_tilemap, 0, 0);
r4679	r4680
1029	1029
1030	1030	VIDEO_UPDATE( spclforc )
1031	1031	{
1032		dkong_state *state = screen->machine->driver_data;
	1032	dkong_state *state = (dkong_state *)screen->machine->driver_data;
1033	1033
1034	1034	tilemap_draw(bitmap, cliprect, state->bg_tilemap, 0, 0);
1035	1035

src/mame/video/skyraid.c

r4679	r4680
17	17
18	18	VIDEO_START( skyraid )
19	19	{
20		helper = auto_bitmap_alloc(128, 240, video_screen_get_format(machine->primary_screen));
	20	helper = auto_bitmap_alloc(machine, 128, 240, video_screen_get_format(machine->primary_screen));
21	21	}
22	22
23	23

src/mame/video/psx.c

r4679	r4680
293	293	m_debug.b_clear = 1;
294	294	m_debug.n_coord = 0;
295	295	m_debug.n_skip = 0;
296		m_debug.mesh = auto_bitmap_alloc(width, height, BITMAP_FORMAT_INDEXED16 );
	296	m_debug.mesh = auto_bitmap_alloc(machine, width, height, BITMAP_FORMAT_INDEXED16 );
297	297	m_debug.machine = machine;
298	298	}
299	299
r4679	r4680
640	640	m_n_lightgun_y = 0;
641	641
642	642	m_n_vram_size = width * height;
643		m_p_vram = auto_malloc( m_n_vram_size * 2 );
644		memset( m_p_vram, 0x00, m_n_vram_size * 2 );
	643	m_p_vram = auto_alloc_array_clear(machine, UINT16, m_n_vram_size );
645	644
646	645	for( n_line = 0; n_line < 1024; n_line++ )
647	646	{

src/mame/video/metlclsh.c

r4679	r4680
142	142
143	143	VIDEO_START( metlclsh )
144	144	{
145		metlclsh_otherram = auto_malloc(0x800);   // banked ram
	145	metlclsh_otherram = auto_alloc_array(machine, UINT8, 0x800);   // banked ram
146	146
147	147	bg_tilemap = tilemap_create(machine, get_bg_tile_info,metlclsh_bgtilemap_scan,16,16,32,16);
148	148	fg_tilemap = tilemap_create(machine, get_fg_tile_info,tilemap_scan_rows,8,8,32,32);

src/mame/video/aliens.c

r4679	r4680
53	53
54	54	VIDEO_START( aliens )
55	55	{
56		paletteram = auto_malloc(0x400);
	56	paletteram = auto_alloc_array(machine, UINT8, 0x400);
57	57
58	58	layer_colorbase[0] = 0;
59	59	layer_colorbase[1] = 4;

src/mame/video/vdc.c

r4679	r4680
82	82	INTERRUPT_GEN( pce_interrupt )
83	83	{
84	84	/* Draw the last scanline */
85		if ( vce.current_bitmap_line >= 14 && vce.current_bitmap_line < 14 + 242 ) {
	85	if ( vce.current_bitmap_line >= 14 && vce.current_bitmap_line < 14 + 242 )
	86	{
86	87	/* We are in the active display area */
87	88	/* First fill the line with the overscan color */
88	89	draw_overscan_line(vce.current_bitmap_line );
89	90
90	91	/* Check if we need to draw more just the overscan color */
91		if ( vdc[0].current_segment == STATE_VDW ) {
	92	if ( vdc[0].current_segment == STATE_VDW )
	93	{
92	94	/* 0 - no sprite and background pixels drawn
93	95	1 - background pixel drawn
94	96	otherwise is 2 + sprite# */
r4679	r4680
105	107	pce_refresh_line( 0, vdc[0].current_segment_line, 0, drawn, line_buffer);
106	108
107	109	/* Draw VDC #0 sprite layer */
108		if(vdc[0].vdc_data[CR].w & CR_SB) {
	110	if(vdc[0].vdc_data[CR].w & CR_SB)
	111	{
109	112	pce_refresh_sprites(device->machine, 0, vdc[0].current_segment_line, drawn, line_buffer);
110	113	}
111	114	}
112		} else {
	115	}
	116	else
	117	{
113	118	/* We are in one of the blanking areas */
114	119	draw_black_line(device->machine, vce.current_bitmap_line );
115	120	}
r4679	r4680
122	127	INTERRUPT_GEN( sgx_interrupt )
123	128	{
124	129	/* Draw the last scanline */
125		if ( vce.current_bitmap_line >= 14 && vce.current_bitmap_line < 14 + 242 ) {
	130	if ( vce.current_bitmap_line >= 14 && vce.current_bitmap_line < 14 + 242 )
	131	{
126	132	/* We are in the active display area */
127	133	/* First fill the line with the overscan color */
128	134	draw_sgx_overscan_line(vce.current_bitmap_line );
129	135
130	136	/* Check if we need to draw more just the overscan color */
131		if ( vdc[0].current_segment == STATE_VDW ) {
	137	if ( vdc[0].current_segment == STATE_VDW )
	138	{
132	139	/* 0 - no sprite and background pixels drawn
133	140	1 - background pixel drawn
134	141	otherwise is 2 + sprite# */
r4679	r4680
147	154	pce_refresh_line( 0, vdc[0].current_segment_line, 0, drawn[0], temp_buffer[0]);
148	155
149	156	/* Draw VDC #0 sprite layer */
150		if(vdc[0].vdc_data[CR].w & CR_SB) {
	157	if(vdc[0].vdc_data[CR].w & CR_SB)
	158	{
151	159	pce_refresh_sprites(device->machine, 0, vdc[0].current_segment_line, drawn[0], temp_buffer[0]);
152	160	}
153	161
r4679	r4680
155	163	pce_refresh_line( 1, vdc[1].current_segment_line, 1, drawn[1], temp_buffer[1]);
156	164
157	165	/* Draw VDC #1 sprite layer */
158		if ( vdc[1].vdc_data[CR].w & CR_SB ) {
	166	if ( vdc[1].vdc_data[CR].w & CR_SB )
	167	{
159	168	pce_refresh_sprites(device->machine, 1, vdc[1].current_segment_line, drawn[1], temp_buffer[1]);
160	169	}
161	170
162	171	line_buffer = BITMAP_ADDR16( vce.bmp, vce.current_bitmap_line, 86 );
163	172	/* Combine the output of both VDCs */
164		for( i = 0; i < 512; i++ ) {
	173	for( i = 0; i < 512; i++ )
	174	{
165	175	int cur_prio = vpc.prio_map[i];
166	176
167		if ( vpc.vpc_prio[cur_prio].vdc0_enabled ) {
168		if ( vpc.vpc_prio[cur_prio].vdc1_enabled ) {
169		switch( vpc.vpc_prio[cur_prio].prio ) {
	177	if ( vpc.vpc_prio[cur_prio].vdc0_enabled )
	178	{
	179	if ( vpc.vpc_prio[cur_prio].vdc1_enabled )
	180	{
	181	switch( vpc.vpc_prio[cur_prio].prio )
	182	{
170	183	case 0:   /* BG1 SP1 BG0 SP0 */
171		if ( drawn[0][i] ) {
	184	if ( drawn[0][i] )
	185	{
172	186	line_buffer[i] = temp_buffer[0][i];
173		} else if ( drawn[1][i] ) {
	187	}
	188	else if ( drawn[1][i] )
	189	{
174	190	line_buffer[i] = temp_buffer[1][i];
175	191	}
176	192	break;
177	193	case 1:   /* BG1 BG0 SP1 SP0 */
178		if ( drawn[0][i] ) {
179		if ( drawn[0][i] > 1 ) {
	194	if ( drawn[0][i] )
	195	{
	196	if ( drawn[0][i] > 1 )
	197	{
180	198	line_buffer[i] = temp_buffer[0][i];
181		} else {
182		if ( drawn[1][i] > 1 ) {
	199	}
	200	else
	201	{
	202	if ( drawn[1][i] > 1 )
	203	{
183	204	line_buffer[i] = temp_buffer[1][i];
184		} else {
	205	}
	206	else
	207	{
185	208	line_buffer[i] = temp_buffer[0][i];
186	209	}
187	210	}
188		} else if ( drawn[1][i] ) {
	211	}
	212	else if ( drawn[1][i] )
	213	{
189	214	line_buffer[i] = temp_buffer[1][i];
190	215	}
191	216	break;
r4679	r4680
195	220	BG0 + SP0 => SP0
196	221	BG1 + SP0 => BG1
197	222	SP0 + SP1 => SP0 */
198		if ( drawn[0][i] ) {
199		if ( drawn[0][i] > 1 ) {
200		if ( drawn[1][i] == 1 ) {
	223	if ( drawn[0][i] )
	224	{
	225	if ( drawn[0][i] > 1 )
	226	{
	227	if ( drawn[1][i] == 1 )
	228	{
201	229	line_buffer[i] = temp_buffer[1][i];
202		} else {
	230	}
	231	else
	232	{
203	233	line_buffer[i] = temp_buffer[0][i];
204	234	}
205		} else {
	235	}
	236	else
	237	{
206	238	line_buffer[i] = temp_buffer[0][i];
207	239	}
208		} else if ( drawn[1][i] ) {
	240	}
	241	else if ( drawn[1][i] )
	242	{
209	243	line_buffer[i] = temp_buffer[1][i];
210	244	}
211	245	break;
212	246	}
213		} else {
214		if ( drawn[0][i] ) {
	247	}
	248	else
	249	{
	250	if ( drawn[0][i] )
	251	{
215	252	line_buffer[i] = temp_buffer[0][i];
216	253	}
217	254	}
218		} else {
219		if ( vpc.vpc_prio[cur_prio].vdc1_enabled ) {
220		if ( drawn[1][i] ) {
	255	}
	256	else
	257	{
	258	if ( vpc.vpc_prio[cur_prio].vdc1_enabled )
	259	{
	260	if ( drawn[1][i] )
	261	{
221	262	line_buffer[i] = temp_buffer[1][i];
222	263	}
223	264	}
224	265	}
225	266	}
226	267	}
227		} else {
	268	}
	269	else
	270	{
228	271	/* We are in one of the blanking areas */
229	272	draw_black_line(device->machine, vce.current_bitmap_line );
230	273	}
r4679	r4680
235	278	vdc_advance_line(device->machine, 1 );
236	279	}
237	280
238		static void vdc_advance_line(running_machine *machine, int which) {
	281	static void vdc_advance_line(running_machine *machine, int which)
	282	{
239	283	int ret = 0;
240	284
241	285	vdc[which].curline += 1;
242	286	vdc[which].current_segment_line += 1;
243	287	vdc[which].raster_count += 1;
244	288
245		if ( vdc[which].satb_countdown ) {
	289	if ( vdc[which].satb_countdown )
	290	{
246	291	vdc[which].satb_countdown -= 1;
247		if ( vdc[which].satb_countdown == 0 ) {
248		if ( vdc[which].vdc_data[DCR].w & DCR_DSC ) {
	292	if ( vdc[which].satb_countdown == 0 )
	293	{
	294	if ( vdc[which].vdc_data[DCR].w & DCR_DSC )
	295	{
249	296	vdc[which].status |= VDC_DS;   /* set satb done flag */
250	297	ret = 1;
251	298	}
252	299	}
253	300	}
254	301
255		if ( vce.current_bitmap_line == 0 ) {
	302	if ( vce.current_bitmap_line == 0 )
	303	{
256	304	vdc[which].current_segment = STATE_VSW;
257	305	vdc[which].current_segment_line = 0;
258	306	vdc[which].vblank_triggered = 0;
259	307	vdc[which].curline = 0;
260	308	}
261	309
262		if ( STATE_VSW == vdc[which].current_segment && vdc[which].current_segment_line >= ( vdc[which].vdc_data[VPR].b.l & 0x1F ) ) {
	310	if ( STATE_VSW == vdc[which].current_segment && vdc[which].current_segment_line >= ( vdc[which].vdc_data[VPR].b.l & 0x1F ) )
	311	{
263	312	vdc[which].current_segment = STATE_VDS;
264	313	vdc[which].current_segment_line = 0;
265	314	}
266	315
267		if ( STATE_VDS == vdc[which].current_segment && vdc[which].current_segment_line >= vdc[which].vdc_data[VPR].b.h ) {
	316	if ( STATE_VDS == vdc[which].current_segment && vdc[which].current_segment_line >= vdc[which].vdc_data[VPR].b.h )
	317	{
268	318	vdc[which].current_segment = STATE_VDW;
269	319	vdc[which].current_segment_line = 0;
270	320	vdc[which].raster_count = 0x40;
271	321	}
272	322
273		if ( STATE_VDW == vdc[which].current_segment && vdc[which].current_segment_line > ( vdc[which].vdc_data[VDW].w & 0x01FF ) ) {
	323	if ( STATE_VDW == vdc[which].current_segment && vdc[which].current_segment_line > ( vdc[which].vdc_data[VDW].w & 0x01FF ) )
	324	{
274	325	vdc[which].current_segment = STATE_VCR;
275	326	vdc[which].current_segment_line = 0;
276	327
277	328	/* Generate VBlank interrupt, sprite DMA */
278	329	vdc[which].vblank_triggered = 1;
279		if ( vdc[which].vdc_data[CR].w & CR_VR ) {
	330	if ( vdc[which].vdc_data[CR].w & CR_VR )
	331	{
280	332	vdc[which].status |= VDC_VD;
281	333	ret = 1;
282	334	}
283	335
284	336	/* do VRAM > SATB DMA if the enable bit is set or the DVSSR reg. was written to */
285		if( ( vdc[which].vdc_data[DCR].w & DCR_DSR ) || vdc[which].dvssr_write ) {
	337	if( ( vdc[which].vdc_data[DCR].w & DCR_DSR ) || vdc[which].dvssr_write )
	338	{
286	339	int i;
287	340
288	341	vdc[which].dvssr_write = 0;
289	342
290		for( i = 0; i < 256; i++ ) {
	343	for( i = 0; i < 256; i++ )
	344	{
291	345	vdc[which].sprite_ram[i] = ( vdc[which].vram[ ( vdc[which].vdc_data[DVSSR].w << 1 ) + i * 2 + 1 ] << 8 ) | vdc[which].vram[ ( vdc[which].vdc_data[DVSSR].w << 1 ) + i * 2 ];
292	346	}
293	347
294	348	/* generate interrupt if needed */
295		if ( vdc[which].vdc_data[DCR].w & DCR_DSC ) {
	349	if ( vdc[which].vdc_data[DCR].w & DCR_DSC )
	350	{
296	351	vdc[which].satb_countdown = 4;
297	352	}
298	353	}
299	354	}
300	355
301		if ( STATE_VCR == vdc[which].current_segment ) {
302		if ( vdc[which].current_segment_line >= 3 && vdc[which].current_segment_line >= vdc[which].vdc_data[VCR].b.l ) {
	356	if ( STATE_VCR == vdc[which].current_segment )
	357	{
	358	if ( vdc[which].current_segment_line >= 3 && vdc[which].current_segment_line >= vdc[which].vdc_data[VCR].b.l )
	359	{
303	360	vdc[which].current_segment = STATE_VSW;
304	361	vdc[which].current_segment_line = 0;
305	362	vdc[which].curline = 0;
r4679	r4680
307	364	}
308	365
309	366	/* generate interrupt on line compare if necessary */
310		if ( vdc[which].raster_count == vdc[which].vdc_data[RCR].w && vdc[which].vdc_data[CR].w & CR_RC ) {
	367	if ( vdc[which].raster_count == vdc[which].vdc_data[RCR].w && vdc[which].vdc_data[CR].w & CR_RC )
	368	{
311	369	vdc[which].status |= VDC_RR;
312	370	ret = 1;
313	371	}
314	372
315	373	/* handle frame events */
316		if(vdc[which].curline == 261 && ! vdc[which].vblank_triggered ) {
	374	if(vdc[which].curline == 261 && ! vdc[which].vblank_triggered )
	375	{
317	376
318	377	vdc[which].vblank_triggered = 1;
319		if(vdc[which].vdc_data[CR].w & CR_VR) {   /* generate IRQ1 if enabled */
	378	if(vdc[which].vdc_data[CR].w & CR_VR)
	379	{   /* generate IRQ1 if enabled */
320	380	vdc[which].status |= VDC_VD;   /* set vblank flag */
321	381	ret = 1;
322	382	}
323	383
324	384	/* do VRAM > SATB DMA if the enable bit is set or the DVSSR reg. was written to */
325		if ( ( vdc[which].vdc_data[DCR].w & DCR_DSR ) || vdc[which].dvssr_write ) {
	385	if ( ( vdc[which].vdc_data[DCR].w & DCR_DSR ) || vdc[which].dvssr_write )
	386	{
326	387	int i;
327	388
328	389	vdc[which].dvssr_write = 0;
329	390	#ifdef MAME_DEBUG
330	391	assert(((vdc[which].vdc_data[DVSSR].w<<1) + 512) <= 0x10000);
331	392	#endif
332		for( i = 0; i < 256; i++ ) {
	393	for( i = 0; i < 256; i++ )
	394	{
333	395	vdc[which].sprite_ram[i] = ( vdc[which].vram[ ( vdc[which].vdc_data[DVSSR].w << 1 ) + i * 2 + 1 ] << 8 ) | vdc[which].vram[ ( vdc[which].vdc_data[DVSSR].w << 1 ) + i * 2 ];
334	396	}
335	397
336	398	/* generate interrupt if needed */
337		if(vdc[which].vdc_data[DCR].w & DCR_DSC) {
	399	if(vdc[which].vdc_data[DCR].w & DCR_DSC)
	400	{
338	401	vdc[which].satb_countdown = 4;
339	402	}
340	403	}
341	404	}
342	405
343	406	if (ret)
344		cpu_set_input_line(machine->cpu[0], 0, HOLD_LINE);
	407	cputag_set_input_line(machine, "maincpu", 0, HOLD_LINE);
345	408	}
346	409
347	410	VIDEO_START( pce )
r4679	r4680
354	417	memset(&vpc, 0, sizeof(vpc));
355	418
356	419	/* allocate VRAM */
357		vdc[0].vram = auto_malloc(0x10000);
358		vdc[1].vram = auto_malloc(0x10000);
	420	vdc[0].vram = auto_alloc_array(machine, UINT8, 0x10000);
	421	vdc[1].vram = auto_alloc_array(machine, UINT8, 0x10000);
359	422	memset(vdc[0].vram, 0, 0x10000);
360	423	memset(vdc[1].vram, 0, 0x10000);
361	424
r4679	r4680
401	464	line_buffer[i] = color_base + vce.vce_data[0x100].w;
402	465	}
403	466
404		static void draw_sgx_overscan_line(int line) {
	467	static void draw_sgx_overscan_line(int line)
	468	{
405	469	int i;
406	470
407	471	/* Are we in greyscale mode or in color mode? */
r4679	r4680
535	599	static UINT8 vdc_r( running_machine *machine, int which, offs_t offset )
536	600	{
537	601	int temp = 0;
538		switch(offset&3)
	602	switch(offset & 3)
539	603	{
540	604	case 0x00:
541	605	temp = vdc[which].status;
542	606	vdc[which].status &= ~(VDC_VD | VDC_RR | VDC_CR | VDC_OR | VDC_DS);
543		cpu_set_input_line(machine->cpu[0],0,CLEAR_LINE);
	607	cputag_set_input_line(machine, "maincpu", 0, CLEAR_LINE);
544	608	break;
545	609
546	610	case 0x02:
547		temp = vram_read(which, vdc[which].vdc_data[MARR].w*2+0);
	611	temp = vram_read(which, vdc[which].vdc_data[MARR].w * 2 + 0);
548	612	break;
549	613
550	614	case 0x03:
551		temp = vram_read(which, vdc[which].vdc_data[MARR].w*2+1);
552		if ( vdc[which].vdc_register ==VxR ) {
	615	temp = vram_read(which, vdc[which].vdc_data[MARR].w * 2 + 1);
	616	if ( vdc[which].vdc_register == VxR )
	617	{
553	618	vdc[which].vdc_data[MARR].w += vdc[which].inc;
554	619	}
555	620	break;
r4679	r4680
562	627	READ8_HANDLER( vdc_0_r ) {   return vdc_r( space->machine, 0, offset ); }
563	628	READ8_HANDLER( vdc_1_r ) {   return vdc_r( space->machine, 1, offset ); }
564	629
565		PALETTE_INIT( vce ) {
	630	PALETTE_INIT( vce )
	631	{
566	632	int i;
567	633
568		for( i = 0; i < 512; i++ ) {
	634	for( i = 0; i < 512; i++ )
	635	{
569	636	int r = (( i >> 3) & 7) << 5;
570	637	int g = (( i >> 6) & 7) << 5;
571	638	int b = (( i     ) & 7) << 5;
r4679	r4680
701	768	if ( ! ( c & 0x0F ) )
702	769	c &= 0x0F;
703	770
704		if ( phys_x >= 0 && phys_x < vdc[which].physical_width ) {
	771	if ( phys_x >= 0 && phys_x < vdc[which].physical_width )
	772	{
705	773	drawn[ pixel ] = c ? 1 : 0;
706	774	if ( c || ! external_input )
707	775	line_buffer[ pixel ] = color_base + vce.vce_data[c].w;
708	776	pixel++;
709		if ( vdc[which].physical_width != 512 ) {
710		while ( pixel < ( ( ( phys_x + 1 ) * 512 ) / vdc[which].physical_width ) ) {
	777	if ( vdc[which].physical_width != 512 )
	778	{
	779	while ( pixel < ( ( ( phys_x + 1 ) * 512 ) / vdc[which].physical_width ) )
	780	{
711	781	drawn[ pixel ] = c ? 1 : 0;
712	782	if ( c || ! external_input )
713	783	line_buffer[ pixel ] = color_base + vce.vce_data[c].w;
r4679	r4680
757	827	static void pce_refresh_sprites(running_machine *machine, int which, int line, UINT8 *drawn, UINT16 *line_buffer)
758	828	{
759	829	int i;
760		UINT8 sprites_drawn=0;
	830	UINT8 sprites_drawn = 0;
761	831
762	832	/* Are we in greyscale mode or in color mode? */
763	833	int color_base = vce.vce_control & 0x80 ? 512 : 0;
764	834
765	835	/* count up: Highest priority is Sprite 0 */
766		for(i=0; i<64; i++)
	836	for(i = 0; i < 64; i++)
767	837	{
768	838	static const int cgy_table[] = {16, 32, 64, 64};
769	839
770		int obj_y = (vdc[which].sprite_ram[(i<<2)+0] & 0x03FF) - 64;
771		int obj_x = (vdc[which].sprite_ram[(i<<2)+1] & 0x03FF) - 32;
772		int obj_i = (vdc[which].sprite_ram[(i<<2)+2] & 0x07FE);
773		int obj_a = (vdc[which].sprite_ram[(i<<2)+3]);
	840	int obj_y = (vdc[which].sprite_ram[(i << 2) + 0] & 0x03FF) - 64;
	841	int obj_x = (vdc[which].sprite_ram[(i << 2) + 1] & 0x03FF) - 32;
	842	int obj_i = (vdc[which].sprite_ram[(i << 2) + 2] & 0x07FE);
	843	int obj_a = (vdc[which].sprite_ram[(i << 2) + 3]);
774	844	int cgx   = (obj_a >> 8) & 1;   /* sprite width */
775	845	int cgy   = (obj_a >> 12) & 3;  /* sprite height */
776	846	int hf    = (obj_a >> 11) & 1;  /* horizontal flip */
r4679	r4680
786	856	if ((obj_x == -32) || (obj_x >= vdc[which].physical_width)) continue;
787	857
788	858	/* no need to draw an object that's ABOVE where we are. */
789		if((obj_y + obj_h)<line) continue;
	859	if((obj_y + obj_h) < line) continue;
790	860
791	861	/* If CGX is set, bit 0 of sprite pattern index is forced to 0 */
792	862	if ( cgx )
r4679	r4680
800	870	if ( cgy & 2 )
801	871	obj_i &= ~12;
802	872
803		if (obj_l < obj_h) {
	873	if (obj_l < obj_h)
	874	{
804	875
805	876	sprites_drawn++;
806		if(sprites_drawn > 16) {
	877	if(sprites_drawn > 16)
	878	{
807	879	vdc[which].status |= VDC_OR;
808		if(vdc[which].vdc_data[CR].w&CR_OV)
809		cpu_set_input_line(machine->cpu[0], 0, ASSERT_LINE);
	880	if(vdc[which].vdc_data[CR].w & CR_OV)
	881	cputag_set_input_line(machine, "maincpu", 0, ASSERT_LINE);
810	882	continue;  /* Should cause an interrupt */
811	883	}
812	884
r4679	r4680
820	892
821	893	conv_obj(which, obj_i + (cgypos << 2), obj_l, hf, vf, buf);
822	894
823		for(x=0;x<16;x++)
	895	for(x = 0; x < 16; x++)
824	896	{
825		if(((obj_x + x)<(vdc[which].physical_width))&&((obj_x + x)>=0))
	897	if(((obj_x + x) < (vdc[which].physical_width)) && ((obj_x + x) >= 0))
826	898	{
827		if ( buf[x] ) {
828		if( drawn[pixel_x] < 2 ) {
829		if( priority || drawn[pixel_x] == 0 ) {
	899	if ( buf[x] )
	900	{
	901	if( drawn[pixel_x] < 2 )
	902	{
	903	if( priority || drawn[pixel_x] == 0 )
	904	{
830	905	line_buffer[pixel_x] = color_base + vce.vce_data[0x100 + (palette << 4) + buf[x]].w;
831		if ( vdc[which].physical_width != 512 ) {
	906	if ( vdc[which].physical_width != 512 )
	907	{
832	908	int dp = 1;
833		while ( pixel_x + dp < ( ( ( obj_x + x + 1 ) * 512 ) / vdc[which].physical_width ) ) {
	909	while ( pixel_x + dp < ( ( ( obj_x + x + 1 ) * 512 ) / vdc[which].physical_width ) )
	910	{
834	911	drawn[pixel_x + dp] = i + 2;
835	912	line_buffer[pixel_x + dp] = color_base + vce.vce_data[0x100 + (palette << 4) + buf[x]].w;
836	913	dp++;
r4679	r4680
840	917	drawn[pixel_x] = i + 2;
841	918	}
842	919	/* Check for sprite #0 collision */
843		else if (drawn[pixel_x]==2)
	920	else if (drawn[pixel_x] == 2)
844	921	{
845		if(vdc[which].vdc_data[CR].w&CR_CC)
846		cpu_set_input_line(machine->cpu[0], 0, ASSERT_LINE);
847		vdc[which].status|=VDC_CR;
	922	if(vdc[which].vdc_data[CR].w & CR_CC)
	923	cputag_set_input_line(machine, "maincpu", 0, ASSERT_LINE);
	924	vdc[which].status |= VDC_CR;
848	925	}
849	926	}
850	927	}
851		if ( vdc[which].physical_width != 512 ) {
	928	if ( vdc[which].physical_width != 512 )
	929	{
852	930	pixel_x = ( ( obj_x + x + 1 ) * 512 ) / vdc[which].physical_width;
853		} else {
	931	}
	932	else
	933	{
854	934	pixel_x += 1;
855	935	}
856	936	}
r4679	r4680
862	942
863	943	conv_obj(which, obj_i + (cgypos << 2) + (hf ? 2 : 0), obj_l, hf, vf, buf);
864	944
865		for(x=0;x<16;x++)
	945	for(x = 0; x < 16; x++)
866	946	{
867		if(((obj_x + x)<(vdc[which].physical_width))&&((obj_x + x)>=0))
	947	if(((obj_x + x) < (vdc[which].physical_width)) && ((obj_x + x) >= 0))
868	948	{
869		if ( buf[x] ) {
870		if( drawn[pixel_x] < 2 ) {
871		if ( priority || drawn[pixel_x] == 0 ) {
	949	if ( buf[x] )
	950	{
	951	if( drawn[pixel_x] < 2 )
	952	{
	953	if ( priority || drawn[pixel_x] == 0 )
	954	{
872	955	line_buffer[pixel_x] = color_base + vce.vce_data[0x100 + (palette << 4) + buf[x]].w;
873		if ( vdc[which].physical_width != 512 ) {
	956	if ( vdc[which].physical_width != 512 )
	957	{
874	958	int dp = 1;
875		while ( pixel_x + dp < ( ( ( obj_x + x + 1 ) * 512 ) / vdc[which].physical_width ) ) {
	959	while ( pixel_x + dp < ( ( ( obj_x + x + 1 ) * 512 ) / vdc[which].physical_width ) )
	960	{
876	961	drawn[pixel_x + dp] = i + 2;
877	962	line_buffer[pixel_x + dp] = color_base + vce.vce_data[0x100 + (palette << 4) + buf[x]].w;
878	963	dp++;
r4679	r4680
882	967	drawn[pixel_x] = i + 2;
883	968	}
884	969	/* Check for sprite #0 collision */
885		else if ( drawn[pixel_x] == 2 ) {
886		if(vdc[which].vdc_data[CR].w&CR_CC)
887		cpu_set_input_line(machine->cpu[0], 0, ASSERT_LINE);
888		vdc[which].status|=VDC_CR;
	970	else if ( drawn[pixel_x] == 2 )
	971	{
	972	if(vdc[which].vdc_data[CR].w & CR_CC)
	973	cputag_set_input_line(machine, "maincpu", 0, ASSERT_LINE);
	974	vdc[which].status |= VDC_CR;
889	975	}
890	976	}
891	977	}
892		if ( vdc[which].physical_width != 512 ) {
	978	if ( vdc[which].physical_width != 512 )
	979	{
893	980	pixel_x = ( ( obj_x + x + 1 ) * 512 ) / vdc[which].physical_width;
894		} else {
	981	}
	982	else
	983	{
895	984	pixel_x += 1;
896	985	}
897	986	}
r4679	r4680
900	989	is only drawn if there are 2 open slots.
901	990	*/
902	991	sprites_drawn++;
903		if( sprites_drawn > 16 ) {
	992	if( sprites_drawn > 16 )
	993	{
904	994	vdc[which].status |= VDC_OR;
905	995	if(vdc[which].vdc_data[CR].w&CR_OV)
906		cpu_set_input_line(machine->cpu[0], 0, ASSERT_LINE);
907		} else {
	996	cputag_set_input_line(machine, "maincpu", 0, ASSERT_LINE);
	997	}
	998	else
	999	{
908	1000	conv_obj(which, obj_i + (cgypos << 2) + (hf ? 0 : 2), obj_l, hf, vf, buf);
909		for(x=0;x<16;x++)
	1001	for(x = 0; x < 16; x++)
910	1002	{
911		if(((obj_x + 0x10 + x)<(vdc[which].physical_width))&&((obj_x + 0x10 + x)>=0))
	1003	if(((obj_x + 0x10 + x) < (vdc[which].physical_width)) && ((obj_x + 0x10 + x) >= 0))
912	1004	{
913		if ( buf[x] ) {
914		if( drawn[pixel_x] < 2 ) {
915		if( priority || drawn[pixel_x] == 0 ) {
	1005	if ( buf[x] )
	1006	{
	1007	if( drawn[pixel_x] < 2 )
	1008	{
	1009	if( priority || drawn[pixel_x] == 0 )
	1010	{
916	1011	line_buffer[pixel_x] = color_base + vce.vce_data[0x100 + (palette << 4) + buf[x]].w;
917		if ( vdc[which].physical_width != 512 ) {
	1012	if ( vdc[which].physical_width != 512 )
	1013	{
918	1014	int dp = 1;
919		while ( pixel_x + dp < ( ( ( obj_x + x + 17 ) * 512 ) / vdc[which].physical_width ) ) {
	1015	while ( pixel_x + dp < ( ( ( obj_x + x + 17 ) * 512 ) / vdc[which].physical_width ) )
	1016	{
920	1017	drawn[pixel_x + dp] = i + 2;
921	1018	line_buffer[pixel_x + dp] = color_base + vce.vce_data[0x100 + (palette << 4) + buf[x]].w;
922	1019	dp++;
r4679	r4680
926	1023	drawn[pixel_x] = i + 2;
927	1024	}
928	1025	/* Check for sprite #0 collision */
929		else if ( drawn[pixel_x]==2 ) {
930		if(vdc[which].vdc_data[CR].w&CR_CC)
931		cpu_set_input_line(machine->cpu[0], 0, ASSERT_LINE);
932		vdc[which].status|=VDC_CR;
	1026	else if ( drawn[pixel_x] == 2 )
	1027	{
	1028	if(vdc[which].vdc_data[CR].w & CR_CC)
	1029	cputag_set_input_line(machine, "maincpu", 0, ASSERT_LINE);
	1030	vdc[which].status |= VDC_CR;
933	1031	}
934	1032	}
935	1033	}
936		if ( vdc[which].physical_width != 512 ) {
	1034	if ( vdc[which].physical_width != 512 )
	1035	{
937	1036	pixel_x = ( ( obj_x + x + 17 ) * 512 ) / vdc[which].physical_width;
938		} else {
	1037	}
	1038	else
	1039	{
939	1040	pixel_x += 1;
940	1041	}
941	1042	}
r4679	r4680
980	1081	vdc[which].vdc_data[LENR].w = len;
981	1082	if(dvc)
982	1083	{
983		cpu_set_input_line(machine->cpu[0], 0, ASSERT_LINE);
	1084	cputag_set_input_line(machine, "maincpu", 0, ASSERT_LINE);
984	1085	}
985	1086
986	1087	}
987	1088
988		static void vpc_update_prio_map( void ) {
	1089	static void vpc_update_prio_map( void )
	1090	{
989	1091	int i;
990	1092
991		for( i = 0; i < 512; i++ ) {
	1093	for( i = 0; i < 512; i++ )
	1094	{
992	1095	vpc.prio_map[i] = 0;
993		if ( vpc.window1.w < 0x40 || i > vpc.window1.w ) {
	1096	if ( vpc.window1.w < 0x40 || i > vpc.window1.w )
	1097	{
994	1098	vpc.prio_map[i] |= 1;
995	1099	}
996		if ( vpc.window2.w < 0x40 || i > vpc.window2.w ) {
	1100	if ( vpc.window2.w < 0x40 || i > vpc.window2.w )
	1101	{
997	1102	vpc.prio_map[i] |= 2;
998	1103	}
999	1104	}
1000	1105	}
1001	1106
1002		WRITE8_HANDLER( vpc_w ) {
	1107	WRITE8_HANDLER( vpc_w )
	1108	{
1003	1109	//if ( offset < 2 )
1004	1110	//printf("VPC write offset %02X, data %02X\n", offset, data );
1005		switch( offset & 0x07 ) {
	1111	switch( offset & 0x07 )
	1112	{
1006	1113	case 0x00:   /* Priority register #0 */
1007	1114	vpc.priority.b.l = data;
1008	1115	vpc.vpc_prio[0].prio = ( data >> 2 ) & 3;
r4679	r4680
1043	1150	}
1044	1151	}
1045	1152
1046		READ8_HANDLER( vpc_r ) {
	1153	READ8_HANDLER( vpc_r )
	1154	{
1047	1155	UINT8 data = 0;
1048		switch( offset & 0x07 ) {
	1156	switch( offset & 0x07 )
	1157	{
1049	1158	case 0x00:  /* Priority register #0 */
1050	1159	data = vpc.priority.b.l;
1051	1160	break;
r4679	r4680
1070	1179
1071	1180	static void vpc_init( running_machine *machine )
1072	1181	{
1073		const address_space *space = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM);
	1182	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
1074	1183	vpc_w( space, 0, 0x11 );
1075	1184	vpc_w( space, 1, 0x11 );
1076	1185	vpc.window1.w = 0;
r4679	r4680
1078	1187	vpc.vdc_select = 0;
1079	1188	}
1080	1189
1081		WRITE8_HANDLER( sgx_vdc_w ) {
1082		if ( vpc.vdc_select ) {
	1190	WRITE8_HANDLER( sgx_vdc_w )
	1191	{
	1192	if ( vpc.vdc_select )
	1193	{
1083	1194	vdc_1_w( space, offset, data );
1084		} else {
	1195	}
	1196	else
	1197	{
1085	1198	vdc_0_w( space, offset, data );
1086	1199	}
1087	1200	}
1088	1201
1089		READ8_HANDLER( sgx_vdc_r ) {
	1202	READ8_HANDLER( sgx_vdc_r )
	1203	{
1090	1204	return ( vpc.vdc_select ) ? vdc_1_r( space, offset ) : vdc_0_r( space, offset );
1091	1205	}
1092	1206

src/mame/video/kaneko16.c

r4679	r4680
125	125	VIDEO_START( kaneko16_sprites )
126	126	{
127	127	/* 0x400 sprites max */
128		spritelist.first_sprite = (struct tempsprite *)auto_malloc(0x400 * sizeof(spritelist.first_sprite[0]));
	128	spritelist.first_sprite = auto_alloc_array(machine, struct tempsprite, 0x400);
129	129	}
130	130
131	131	VIDEO_START( kaneko16_1xVIEW2_tilemaps )
r4679	r4680
256	256
257	257	/* Render the hi-color static backgrounds held in the ROMs */
258	258
259		kaneko16_bg15_bitmap = auto_bitmap_alloc(256 * 32, 256 * 1, BITMAP_FORMAT_INDEXED16);
	259	kaneko16_bg15_bitmap = auto_bitmap_alloc(machine, 256 * 32, 256 * 1, BITMAP_FORMAT_INDEXED16);
260	260
261	261	/*
262	262	8aba is used as background color

src/mame/video/goldstar.c

r4679	r4680
26	26	static UINT8 cmaster_girl_num;
27	27	static UINT8 cmaster_girl_pal;
28	28	static UINT8 cm_enable_reg;
	29	static UINT8 cm_girl_scroll;
29	30
	31	WRITE8_HANDLER( cm_girl_scroll_w )
	32	{
	33	cm_girl_scroll = data;
	34	/*
	35	xxxx ----  yscroll
	36	---- xxxx  xscroll
	37
	38	this isn't very fine scrolling, but i see no other registers.
	39	1000 1000 is the center of the screen.
	40	*/
	41	}
	42
30	43	WRITE8_HANDLER( cm_outport0_w )
31	44	{
32	45	cm_enable_reg = data;
r4679	r4680
213	226	cmaster_girl_num = (data >> 4)&0x7;
214	227	cmaster_girl_pal = (data >> 2)&0x3;
215	228
	229	//bgcolor = (data & 0x03) >> 0;
	230
	231	// apparently some boards have this colour scheme?
	232	// i'm not convinced it isn't just a different prom on them
	233	#if 0
	234	bgcolor = 0;
	235	bgcolor |= (data & 0x01) << 1;
	236	bgcolor |= (data & 0x02) >> 1;
	237	#else
216	238	bgcolor = (data & 0x03) >> 0;
	239	#endif
	240
217	241	tilemap_mark_all_tiles_dirty (goldstar_reel1_tilemap);
218	242	tilemap_mark_all_tiles_dirty (goldstar_reel2_tilemap);
219	243	tilemap_mark_all_tiles_dirty (goldstar_reel3_tilemap);
r4679	r4680
262	286	if (memory_region(screen->machine,"user1"))
263	287	{
264	288	const gfx_element *gfx = screen->machine->gfx[2];
265		drawgfxzoom(bitmap,gfx,cmaster_girl_num,cmaster_girl_pal,0,0,32*8,16*8,cliprect,TRANSPARENCY_PEN,0, 0x20000, 0x10000);
	289	int girlyscroll = (INT8)((cm_girl_scroll & 0xf0));
	290	int girlxscroll = (INT8)((cm_girl_scroll & 0x0f)<<4);
	291
	292	drawgfxzoom(bitmap,gfx,cmaster_girl_num,cmaster_girl_pal,0,0,-(girlxscroll*2),-(girlyscroll),cliprect,TRANSPARENCY_PEN,0, 0x20000, 0x10000);
266	293	}
267	294	}
268	295

src/mame/video/20pacgal.c

r4679	r4680
292	292
293	293	static VIDEO_UPDATE( 20pacgal )
294	294	{
295		const _20pacgal_state *state = screen->machine->driver_data;
	295	const _20pacgal_state *state = (_20pacgal_state *)screen->machine->driver_data;
296	296
297	297	draw_chars(state, bitmap);
298	298	draw_sprites(state, bitmap);

src/mame/video/spbactn.c

r4679	r4680
113	113	int width = video_screen_get_width(machine->primary_screen);
114	114	int height = video_screen_get_height(machine->primary_screen);
115	115
116		tile_bitmap_bg = auto_bitmap_alloc(width, height, BITMAP_FORMAT_INDEXED16);
117		tile_bitmap_fg = auto_bitmap_alloc(width, height, BITMAP_FORMAT_INDEXED16);
	116	tile_bitmap_bg = auto_bitmap_alloc(machine, width, height, BITMAP_FORMAT_INDEXED16);
	117	tile_bitmap_fg = auto_bitmap_alloc(machine, width, height, BITMAP_FORMAT_INDEXED16);
118	118	}
119	119
120	120	VIDEO_UPDATE( spbactn )

src/mame/video/atarimo.c

r4679	r4680
246	246	mo->gfxelement[idx].total_colors = 65536;
247	247	}
248	248
249		static atarimo_data atarimo[ATARIMO_MAX];
250		static emu_timer *force_update_timer;
251	249
252	250	/*---------------------------------------------------------------
253	251	init_savestate: Initialize save states
r4679	r4680
406	404	mo->slipram       = (map == 0) ? &atarimo_0_slipram : &atarimo_1_slipram;
407	405
408	406	/* allocate the temp bitmap */
409		mo->bitmap        = auto_bitmap_alloc(video_screen_get_width(machine->primary_screen), video_screen_get_height(machine->primary_screen), BITMAP_FORMAT_INDEXED16);
	407	mo->bitmap        = auto_bitmap_alloc(machine, video_screen_get_width(machine->primary_screen), video_screen_get_height(machine->primary_screen), BITMAP_FORMAT_INDEXED16);
410	408	bitmap_fill(mo->bitmap, NULL, desc->transpen);
411	409
412	410	/* allocate the spriteram */
413		mo->spriteram = auto_malloc(sizeof(mo->spriteram[0]) * mo->spriteramsize);
	411	mo->spriteram = auto_alloc_array_clear(machine, atarimo_entry, mo->spriteramsize);
414	412
415		/* clear it to zero */
416		memset(mo->spriteram, 0, sizeof(mo->spriteram[0]) * mo->spriteramsize);
417
418	413	/* allocate the code lookup */
419		mo->codelookup = auto_malloc(sizeof(mo->codelookup[0]) * round_to_powerof2(mo->codemask.mask));
	414	mo->codelookup = auto_alloc_array(machine, UINT16, round_to_powerof2(mo->codemask.mask));
420	415
421	416	/* initialize it 1:1 */
422	417	for (i = 0; i < round_to_powerof2(mo->codemask.mask); i++)
423	418	mo->codelookup[i] = i;
424	419
425	420	/* allocate the color lookup */
426		mo->colorlookup = auto_malloc(sizeof(mo->colorlookup[0]) * round_to_powerof2(mo->colormask.mask));
	421	mo->colorlookup = auto_alloc_array(machine, UINT8, round_to_powerof2(mo->colormask.mask));
427	422
428	423	/* initialize it 1:1 */
429	424	for (i = 0; i < round_to_powerof2(mo->colormask.mask); i++)
r4679	r4680
432	427	/* allocate dirty grid */
433	428	mo->dirtywidth = (video_screen_get_width(machine->primary_screen) >> mo->tilexshift) + 2;
434	429	mo->dirtyheight = (video_screen_get_height(machine->primary_screen) >> mo->tileyshift) + 2;
435		mo->dirtygrid = auto_malloc(mo->dirtywidth * mo->dirtyheight);
	430	mo->dirtygrid = auto_alloc_array(machine, UINT8, mo->dirtywidth * mo->dirtyheight);
436	431
437	432	/* allocate the gfx lookup */
438		mo->gfxlookup = auto_malloc(sizeof(mo->gfxlookup[0]) * round_to_powerof2(mo->gfxmask.mask));
	433	mo->gfxlookup = auto_alloc_array(machine, UINT8, round_to_powerof2(mo->gfxmask.mask));
439	434
440	435	/* initialize it with the gfxindex we were passed in */
441	436	for (i = 0; i < round_to_powerof2(mo->gfxmask.mask); i++)

src/mame/video/redalert.c

r4679	r4680
138	138
139	139	static VIDEO_START( redalert )
140	140	{
141		redalert_bitmap_colorram = auto_malloc(0x0400);
	141	redalert_bitmap_colorram = auto_alloc_array(machine, UINT8, 0x0400);
142	142
143	143	state_save_register_global_pointer(machine, redalert_bitmap_colorram, 0x0400);
144	144

src/mame/video/stadhero.c

r4679	r4680
159	159	pf1_tilemap =     tilemap_create(machine, get_pf1_tile_info,tilemap_scan_rows, 8, 8,32,32);
160	160	pf2_tilemap =     tilemap_create(machine, get_pf2_tile_info,stadhero_scan,     16,16,64,64);
161	161
162		stadhero_pf2_data = auto_malloc(0x2000 * 2);
	162	stadhero_pf2_data = auto_alloc_array(machine, UINT16, 0x2000);
163	163
164	164	tilemap_set_transparent_pen(pf1_tilemap,0);
165	165	}

src/mame/video/simpsons.c

r4679	r4680
104	104	{
105	105	if (bank & 1)
106	106	{
107		memory_install_readwrite8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x0000, 0x0fff, 0, 0, SMH_BANK5, paletteram_xBBBBBGGGGGRRRRR_be_w);
	107	memory_install_readwrite8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x0000, 0x0fff, 0, 0, (read8_space_func)SMH_BANK(5), paletteram_xBBBBBGGGGGRRRRR_be_w);
108	108	memory_set_bankptr(machine, 5, paletteram);
109	109	}
110	110	else
111		memory_install_readwrite8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x0000, 0x0fff, 0, 0, K052109_r, K052109_w);
	111	memory_install_readwrite8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x0000, 0x0fff, 0, 0, K052109_r, K052109_w);
112	112
113	113	if (bank & 2)
114		memory_install_readwrite8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x2000, 0x3fff, 0, 0, simpsons_K053247_r, simpsons_K053247_w);
	114	memory_install_readwrite8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x2000, 0x3fff, 0, 0, simpsons_K053247_r, simpsons_K053247_w);
115	115	else
116		memory_install_readwrite8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x2000, 0x3fff, 0, 0, simpsons_K052109_r, simpsons_K052109_w);
	116	memory_install_readwrite8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x2000, 0x3fff, 0, 0, simpsons_K052109_r, simpsons_K052109_w);
117	117	}
118	118
119	119

src/mame/video/model1.c

r4679	r4680
1438	1438	sys24_tile_vh_start(machine, 0x3fff);
1439	1439
1440	1440	poly_rom = (UINT32 *)memory_region(machine, "user1");
1441		poly_ram = auto_malloc(0x400000*4);
1442		memset(poly_ram, 0, 0x400000*4);
1443		tgp_ram = auto_malloc((0x100000-0x40000)*2);
1444		memset(tgp_ram, 0, (0x100000-0x40000)*2);
1445		pointdb = auto_malloc(1000000*2*sizeof(struct point));
1446		memset(pointdb, 0, 1000000*2*sizeof(struct point));
1447		quaddb  = auto_malloc(1000000*sizeof(struct quad));
1448		memset(quaddb, 0, 1000000*sizeof(struct quad));
1449		quadind = auto_malloc(1000000*sizeof(struct quad *));
1450		memset(quadind, 0, 1000000*sizeof(struct quad *));
	1441	poly_ram = auto_alloc_array_clear(machine, UINT32, 0x400000);
	1442	tgp_ram = auto_alloc_array_clear(machine, UINT16, 0x100000-0x40000);
	1443	pointdb = auto_alloc_array_clear(machine, struct point, 1000000*2);
	1444	quaddb  = auto_alloc_array_clear(machine, struct quad, 1000000);
	1445	quadind = auto_alloc_array_clear(machine, struct quad *, 1000000);
1451	1446
1452	1447	pointpt = pointdb;
1453	1448	quadpt = quaddb;

src/mame/video/taito_b.c

r4679	r4680
161	161	static void hitice_clear_pixel_bitmap(running_machine *machine)
162	162	{
163	163	int i;
164		const address_space *space = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM);
	164	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
165	165
166		for (i = 0;i < 0x40000;i++)
167		hitice_pixelram_w(space,i,0,0xffff);
	166	for (i = 0; i < 0x40000; i++)
	167	hitice_pixelram_w(space, i, 0, 0xffff);
168	168	}
169	169
170	170	static TILE_GET_INFO( get_bg_tile_info )
r4679	r4680
175	175	SET_TILE_INFO(
176	176	1,
177	177	tile,
178		b_bg_color_base + (color&0x3f),
179		TILE_FLIPYX((color & 0x00c0)>>6));
	178	b_bg_color_base + (color & 0x3f),
	179	TILE_FLIPYX((color & 0x00c0) >> 6));
180	180	}
181	181
182	182	static TILE_GET_INFO( get_fg_tile_info )
r4679	r4680
187	187	SET_TILE_INFO(
188	188	1,
189	189	tile,
190		b_fg_color_base + (color&0x3f),
191		TILE_FLIPYX((color & 0x00c0)>>6));
	190	b_fg_color_base + (color & 0x3f),
	191	TILE_FLIPYX((color & 0x00c0) >> 6));
192	192	}
193	193
194	194	static TILE_GET_INFO( get_tx_tile_info )
r4679	r4680
205	205
206	206	static VIDEO_START( taitob_core )
207	207	{
208		framebuffer[0] = auto_bitmap_alloc(512,256, video_screen_get_format(machine->primary_screen));
209		framebuffer[1] = auto_bitmap_alloc(512,256, video_screen_get_format(machine->primary_screen));
	208	framebuffer[0] = auto_bitmap_alloc(machine,512,256, video_screen_get_format(machine->primary_screen));
	209	framebuffer[1] = auto_bitmap_alloc(machine,512,256, video_screen_get_format(machine->primary_screen));
210	210	pixel_bitmap = NULL;  /* only hitice needs this */
211	211
212	212	bg_tilemap = tilemap_create(machine, get_bg_tile_info,tilemap_scan_rows,     16,16,64,64);
r4679	r4680
279	279	{
280	280	VIDEO_START_CALL(taitob_color_order0);
281	281
282		pixel_bitmap = auto_bitmap_alloc(1024,512,video_screen_get_format(machine->primary_screen));
	282	pixel_bitmap = auto_bitmap_alloc(machine,1024,512,video_screen_get_format(machine->primary_screen));
283	283
284	284	state_save_register_global_bitmap(machine, pixel_bitmap);
285	285	}

src/mame/video/taitoic.c

r4679	r4680
806	806	PC080SN_tilemap[i][1] = tilemap_create(machine, PC080SN_get_tile_info[i][1],tilemap_scan_rows,8,8,128,64);
807	807	}
808	808
809		PC080SN_ram[i] = auto_malloc(PC080SN_RAM_SIZE);
	809	PC080SN_ram[i] = auto_alloc_array_clear(machine, UINT16, PC080SN_RAM_SIZE/2);
810	810
811	811	PC080SN_bg_ram[i][0]       = PC080SN_ram[i] + 0x0000 /2;
812	812	PC080SN_bg_ram[i][1]       = PC080SN_ram[i] + 0x8000 /2;
813	813	PC080SN_bgscroll_ram[i][0] = PC080SN_ram[i] + 0x4000 /2;
814	814	PC080SN_bgscroll_ram[i][1] = PC080SN_ram[i] + 0xc000 /2;
815		memset(PC080SN_ram[i],0,PC080SN_RAM_SIZE);
816	815
817	816	state_save_register_item_pointer(machine, "PC080SN", NULL, i, PC080SN_ram[i], PC080SN_RAM_SIZE/2);
818	817	state_save_register_item_array(machine, "PC080SN", NULL, i, PC080SN_ctrl[i]);
r4679	r4680
1223	1222
1224	1223	PC090OJ_buffer = use_buffer;
1225	1224
1226		PC090OJ_ram = auto_malloc(PC090OJ_RAM_SIZE);
1227		PC090OJ_ram_buffered = auto_malloc(PC090OJ_RAM_SIZE);
	1225	PC090OJ_ram = auto_alloc_array_clear(machine, UINT16, PC090OJ_RAM_SIZE/2);
	1226	PC090OJ_ram_buffered = auto_alloc_array_clear(machine, UINT16, PC090OJ_RAM_SIZE/2);
1228	1227
1229		memset(PC090OJ_ram,0,PC090OJ_RAM_SIZE);
1230		memset(PC090OJ_ram_buffered,0,PC090OJ_RAM_SIZE);
1231
1232	1228	state_save_register_global_pointer(machine, PC090OJ_ram, PC090OJ_RAM_SIZE/2);
1233	1229	state_save_register_global_pointer(machine, PC090OJ_ram_buffered, PC090OJ_RAM_SIZE/2);
1234	1230	state_save_register_global(machine, PC090OJ_ctrl);
r4679	r4680
1525	1521
1526	1522	TC0080VCO_tilemap[0] = tilemap_create(machine, TC0080VCO_get_bg0_tile_info_0,tilemap_scan_rows,16,16,64,64);
1527	1523	TC0080VCO_tilemap[1] = tilemap_create(machine, TC0080VCO_get_bg1_tile_info_0,tilemap_scan_rows,16,16,64,64);
1528		TC0080VCO_ram = auto_malloc(TC0080VCO_RAM_SIZE);
	1524	TC0080VCO_ram = auto_alloc_array_clear(machine, UINT16, TC0080VCO_RAM_SIZE/2);
1529	1525
1530		memset( TC0080VCO_ram,0,TC0080VCO_RAM_SIZE );
1531	1526	TC0080VCO_set_layer_ptrs();
1532	1527
1533	1528	/* use the given gfx set for bg tiles*/
r4679	r4680
2283	2278
2284	2279	TC0100SCN_cliprect[i] = myclip;
2285	2280
2286		TC0100SCN_ram[i] = auto_malloc(TC0100SCN_RAM_SIZE);
	2281	TC0100SCN_ram[i] = auto_alloc_array_clear(machine, UINT16, TC0100SCN_RAM_SIZE/2);
2287	2282
2288	2283	TC0100SCN_set_layer_ptrs(i);
2289		memset(TC0100SCN_ram[i],0,TC0100SCN_RAM_SIZE);
2290	2284
2291	2285	{
2292	2286	state_save_register_item_pointer(machine, "TC0100SCN", NULL, i, TC0100SCN_ram[i], TC0100SCN_RAM_SIZE/2);
r4679	r4680
2724	2718
2725	2719	void TC0280GRD_vh_start(running_machine *machine, int gfxnum)
2726	2720	{
2727		TC0280GRD_ram = auto_malloc(TC0280GRD_RAM_SIZE);
	2721	TC0280GRD_ram = auto_alloc_array(machine, UINT16, TC0280GRD_RAM_SIZE/2);
2728	2722	TC0280GRD_tilemap = tilemap_create(machine, TC0280GRD_get_tile_info,tilemap_scan_rows,8,8,64,64);
2729	2723
2730	2724	state_save_register_global_pointer(machine, TC0280GRD_ram, TC0280GRD_RAM_SIZE/2);
r4679	r4680
3086	3080	TC0480SCP_tilemap[3][1] = tilemap_create(machine, tc480_get_tile_info[3],tilemap_scan_rows,16,16,64,32);
3087	3081	TC0480SCP_tilemap[4][1] = tilemap_create(machine, tc480_get_tile_info[4],tilemap_scan_rows,8,8,64,64);
3088	3082
3089		TC0480SCP_ram = auto_malloc(TC0480SCP_RAM_SIZE);
	3083	TC0480SCP_ram = auto_alloc_array_clear(machine, UINT16, TC0480SCP_RAM_SIZE/2);
3090	3084
3091	3085	TC0480SCP_set_layer_ptrs();
3092		memset(TC0480SCP_ram,0,TC0480SCP_RAM_SIZE);
3093	3086
3094	3087	state_save_register_global_pointer(machine, TC0480SCP_ram, TC0480SCP_RAM_SIZE/2);
3095	3088	state_save_register_global_array(machine, TC0480SCP_ctrl);
r4679	r4680
3805	3798
3806	3799	void TC0150ROD_vh_start(running_machine *machine)
3807	3800	{
3808		TC0150ROD_ram = auto_malloc(TC0150ROD_RAM_SIZE);
	3801	TC0150ROD_ram = auto_alloc_array(machine, UINT16, TC0150ROD_RAM_SIZE/2);
3809	3802
3810	3803	state_save_register_global_pointer(machine, TC0150ROD_ram, TC0150ROD_RAM_SIZE/2);
3811	3804	}
r4679	r4680
4602	4595
4603	4596	void TC0110PCR_vh_start(running_machine *machine)
4604	4597	{
4605		TC0110PCR_ram[0] = auto_malloc(TC0110PCR_RAM_SIZE * sizeof(*TC0110PCR_ram[0]));
	4598	TC0110PCR_ram[0] = auto_alloc_array(machine, UINT16, TC0110PCR_RAM_SIZE);
4606	4599
4607	4600	state_save_register_global_pointer(machine, TC0110PCR_ram[0], TC0110PCR_RAM_SIZE);
4608	4601	state_save_register_postload(machine, TC0110PCR_restore_colors, (void *)0);
r4679	r4680
4612	4605
4613	4606	void TC0110PCR_1_vh_start(running_machine *machine)
4614	4607	{
4615		TC0110PCR_ram[1] = auto_malloc(TC0110PCR_RAM_SIZE * sizeof(*TC0110PCR_ram[1]));
	4608	TC0110PCR_ram[1] = auto_alloc_array(machine, UINT16, TC0110PCR_RAM_SIZE);
4616	4609
4617	4610	state_save_register_global_pointer(machine, TC0110PCR_ram[1], TC0110PCR_RAM_SIZE);
4618	4611	state_save_register_postload(machine, TC0110PCR_restore_colors, (void *)1);
r4679	r4680
4620	4613
4621	4614	void TC0110PCR_2_vh_start(running_machine *machine)
4622	4615	{
4623		TC0110PCR_ram[2] = auto_malloc(TC0110PCR_RAM_SIZE * sizeof(*TC0110PCR_ram[2]));
	4616	TC0110PCR_ram[2] = auto_alloc_array(machine, UINT16, TC0110PCR_RAM_SIZE);
4624	4617
4625	4618	state_save_register_global_pointer(machine, TC0110PCR_ram[2], TC0110PCR_RAM_SIZE);
4626	4619	state_save_register_postload(machine, TC0110PCR_restore_colors, (void *)2);

src/mame/video/suna8.c

r4679	r4680
171	171
172	172
173	173
174		static void suna8_vh_start_common(int dim)
	174	static void suna8_vh_start_common(running_machine *machine, int dim)
175	175	{
176	176	suna8_text_dim = dim;
177	177	if (!(suna8_text_dim > 0))
178	178	{
179		paletteram   =   auto_malloc(0x200 * 2);
180		spriteram   =   auto_malloc(0x2000 * 2);
	179	paletteram   =   auto_alloc_array(machine, UINT8, 0x200 * 2);
	180	spriteram   =   auto_alloc_array(machine, UINT8, 0x2000 * 2);
181	181	suna8_spritebank  = 0;
182	182	suna8_palettebank = 0;
183	183	}
r4679	r4680
191	191	#endif
192	192	}
193	193
194		VIDEO_START( suna8_textdim0 )   { suna8_vh_start_common(0);  }
195		VIDEO_START( suna8_textdim8 )   { suna8_vh_start_common(8);  }
196		VIDEO_START( suna8_textdim12 )   { suna8_vh_start_common(12); }
	194	VIDEO_START( suna8_textdim0 )   { suna8_vh_start_common(machine, 0);  }
	195	VIDEO_START( suna8_textdim8 )   { suna8_vh_start_common(machine, 8);  }
	196	VIDEO_START( suna8_textdim12 )   { suna8_vh_start_common(machine, 12); }
197	197
198	198	/***************************************************************************
199	199

src/mame/video/btime.c

r4679	r4680
152	152	int width = 256;
153	153	int height = 256;
154	154	bitmap_format format = video_screen_get_format(machine->primary_screen);
155		background_bitmap = auto_bitmap_alloc(2*width, height, format);
	155	background_bitmap = auto_bitmap_alloc(machine, 2*width, height, format);
156	156
157	157	VIDEO_START_CALL(btime);
158	158	}

src/mame/video/cps1.c

r4679	r4680
2055	2055	palette_set_color(machine,i,MAKE_RGB(0,0,0));
2056	2056	}
2057	2057
2058		cps1_buffered_obj = auto_malloc (cps1_obj_size);
2059		memset(cps1_buffered_obj, 0x00, cps1_obj_size);
	2058	cps1_buffered_obj = auto_alloc_array_clear(machine, UINT16, cps1_obj_size/2);
2060	2059
2061	2060	if (cps_version==2)
2062	2061	{
2063		cps2_buffered_obj = auto_malloc (cps2_obj_size);
2064		memset(cps2_buffered_obj, 0x00, cps2_obj_size);
	2062	cps2_buffered_obj = auto_alloc_array_clear(machine, UINT16, cps2_obj_size/2);
2065	2063	}
2066	2064
2067	2065	memset(cps1_gfxram, 0, cps1_gfxram_size);   /* Clear GFX RAM */

src/mame/video/starcrus.c

r4679	r4680
55	55
56	56	VIDEO_START( starcrus )
57	57	{
58		ship1_vid = auto_bitmap_alloc(16,16,video_screen_get_format(machine->primary_screen));
59		ship2_vid = auto_bitmap_alloc(16,16,video_screen_get_format(machine->primary_screen));
	58	ship1_vid = auto_bitmap_alloc(machine,16,16,video_screen_get_format(machine->primary_screen));
	59	ship2_vid = auto_bitmap_alloc(machine,16,16,video_screen_get_format(machine->primary_screen));
60	60
61		proj1_vid = auto_bitmap_alloc(16,16,video_screen_get_format(machine->primary_screen));
62		proj2_vid = auto_bitmap_alloc(16,16,video_screen_get_format(machine->primary_screen));
	61	proj1_vid = auto_bitmap_alloc(machine,16,16,video_screen_get_format(machine->primary_screen));
	62	proj2_vid = auto_bitmap_alloc(machine,16,16,video_screen_get_format(machine->primary_screen));
63	63	}
64	64
65	65	WRITE8_HANDLER( starcrus_ship_parm_1_w )

src/mame/video/stactics.c

r4679	r4680
91	91
92	92	WRITE8_HANDLER( stactics_scroll_ram_w )
93	93	{
94		stactics_state *state = space->machine->driver_data;
	94	stactics_state *state = (stactics_state *)space->machine->driver_data;
95	95
96	96	if (data & 0x01)
97	97	{
r4679	r4680
114	114
115	115	CUSTOM_INPUT( stactics_get_frame_count_d3 )
116	116	{
117		stactics_state *state = field->port->machine->driver_data;
	117	stactics_state *state = (stactics_state *)field->port->machine->driver_data;
118	118
119	119	return (state->frame_count >> 3) & 0x01;
120	120	}
r4679	r4680
129	129
130	130	WRITE8_HANDLER( stactics_speed_latch_w )
131	131	{
132		stactics_state *state = space->machine->driver_data;
	132	stactics_state *state = (stactics_state *)space->machine->driver_data;
133	133
134	134	/* This writes to a shift register which is clocked by   */
135	135	/* a 555 oscillator.  This value determines the speed of */
r4679	r4680
156	156
157	157	WRITE8_HANDLER( stactics_shot_trigger_w )
158	158	{
159		stactics_state *state = space->machine->driver_data;
	159	stactics_state *state = (stactics_state *)space->machine->driver_data;
160	160
161	161	state->shot_standby = 0;
162	162	}
r4679	r4680
164	164
165	165	WRITE8_HANDLER( stactics_shot_flag_clear_w )
166	166	{
167		stactics_state *state = space->machine->driver_data;
	167	stactics_state *state = (stactics_state *)space->machine->driver_data;
168	168
169	169	state->shot_arrive = 0;
170	170	}
r4679	r4680
172	172
173	173	CUSTOM_INPUT( stactics_get_shot_standby )
174	174	{
175		stactics_state *state = field->port->machine->driver_data;
	175	stactics_state *state = (stactics_state *)field->port->machine->driver_data;
176	176
177	177	return state->shot_standby;
178	178	}
r4679	r4680
180	180
181	181	CUSTOM_INPUT( stactics_get_not_shot_arrive )
182	182	{
183		stactics_state *state = field->port->machine->driver_data;
	183	stactics_state *state = (stactics_state *)field->port->machine->driver_data;
184	184
185	185	return !state->shot_arrive;
186	186	}
r4679	r4680
367	367
368	368	static VIDEO_START( stactics )
369	369	{
370		stactics_state *state = machine->driver_data;
	370	stactics_state *state = (stactics_state *)machine->driver_data;
371	371
372	372	state->y_scroll_d = 0;
373	373	state->y_scroll_e = 0;
r4679	r4680
390	390
391	391	static VIDEO_UPDATE( stactics )
392	392	{
393		stactics_state *state = screen->machine->driver_data;
	393	stactics_state *state = (stactics_state *)screen->machine->driver_data;
394	394
395	395	update_beam(state);
396	396	draw_background(state, bitmap, cliprect);

src/mame/video/gaelco3d.c

r4679	r4680
83	83
84	84	width = video_screen_get_width(machine->primary_screen);
85	85	height = video_screen_get_height(machine->primary_screen);
86		zbuffer = auto_bitmap_alloc(width, height, BITMAP_FORMAT_INDEXED16);
	86	zbuffer = auto_bitmap_alloc(machine, width, height, BITMAP_FORMAT_INDEXED16);
87	87
88		palette = auto_malloc(32768 * sizeof(palette[0]));
89		polydata_buffer = auto_malloc(MAX_POLYDATA * sizeof(polydata_buffer[0]));
	88	palette = auto_alloc_array(machine, rgb_t, 32768);
	89	polydata_buffer = auto_alloc_array(machine, UINT32, MAX_POLYDATA);
90	90
91	91	/* save states */
92	92
r4679	r4680
144	144	float voz_base = convert_tms3203x_fp_to_float(polydata[7]) * 256.0f - midx * voz_dx - midy * voz_dy;
145	145	float ooz_base = convert_tms3203x_fp_to_float(polydata[8]) - midx * ooz_dx - midy * ooz_dy;
146	146	float uoz_base = convert_tms3203x_fp_to_float(polydata[9]) * 256.0f - midx * uoz_dx - midy * uoz_dy;
147		poly_extra_data *extra = poly_get_extra_data(poly);
	147	poly_extra_data *extra = (poly_extra_data *)poly_get_extra_data(poly);
148	148	int color = (polydata[10] & 0x7f) << 8;
149	149	poly_vertex vert[MAX_VERTICES];
150	150	UINT32 data;
r4679	r4680
223	223
224	224	static void render_noz_noperspective(void *destbase, INT32 scanline, const poly_extent *extent, const void *extradata, int threadid)
225	225	{
226		const poly_extra_data *extra = extradata;
227		bitmap_t *bitmap = destbase;
	226	const poly_extra_data *extra = (const poly_extra_data *)extradata;
	227	bitmap_t *bitmap = (bitmap_t *)destbase;
228	228	float zbase = recip_approx(extra->ooz_base);
229	229	float uoz_step = extra->uoz_dx * zbase;
230	230	float voz_step = extra->voz_dx * zbase;
r4679	r4680
264	264
265	265	static void render_normal(void *destbase, INT32 scanline, const poly_extent *extent, const void *extradata, int threadid)
266	266	{
267		const poly_extra_data *extra = extradata;
268		bitmap_t *bitmap = destbase;
	267	const poly_extra_data *extra = (const poly_extra_data *)extradata;
	268	bitmap_t *bitmap = (bitmap_t *)destbase;
269	269	float ooz_dx = extra->ooz_dx;
270	270	float uoz_dx = extra->uoz_dx;
271	271	float voz_dx = extra->voz_dx;
r4679	r4680
316	316
317	317	static void render_alphablend(void *destbase, INT32 scanline, const poly_extent *extent, const void *extradata, int threadid)
318	318	{
319		const poly_extra_data *extra = extradata;
320		bitmap_t *bitmap = destbase;
	319	const poly_extra_data *extra = (const poly_extra_data *)extradata;
	320	bitmap_t *bitmap = (bitmap_t *)destbase;
321	321	float ooz_dx = extra->ooz_dx;
322	322	float uoz_dx = extra->uoz_dx;
323	323	float voz_dx = extra->voz_dx;

src/mame/video/lethalj.c

r4679	r4680
91	91	VIDEO_START( lethalj )
92	92	{
93	93	/* allocate video RAM for screen */
94		screenram = auto_malloc(BLITTER_DEST_WIDTH * BLITTER_DEST_HEIGHT * sizeof(screenram[0]));
	94	screenram = auto_alloc_array(machine, UINT16, BLITTER_DEST_WIDTH * BLITTER_DEST_HEIGHT);
95	95
96	96	/* predetermine blitter info */
97	97	blitter_base = (UINT16 *)memory_region(machine, "gfx1");
r4679	r4680
108	108
109	109	static TIMER_CALLBACK( gen_ext1_int )
110	110	{
111		cpu_set_input_line(machine->cpu[0], 0, ASSERT_LINE);
	111	cputag_set_input_line(machine, "maincpu", 0, ASSERT_LINE);
112	112	}
113	113
114	114
r4679	r4680
170	170
171	171	/* clear the IRQ on offset 0 */
172	172	else if (offset == 0)
173		cpu_set_input_line(space->machine->cpu[0], 0, CLEAR_LINE);
	173	cputag_set_input_line(space->machine, "maincpu", 0, CLEAR_LINE);
174	174	}
175	175
176	176

src/mame/video/galaxian.c

r4679	r4680
290	290
291	291	static void sprites_draw(running_machine *machine, bitmap_t *bitmap, const rectangle *cliprect, const UINT8 *spritebase);
292	292
293		static void stars_init(void);
	293	static void stars_init(running_machine *machine);
294	294	static void stars_update_origin(running_machine *machine);
295	295	static void stars_draw_row(bitmap_t *bitmap, int maxx, int y, UINT32 star_offs, UINT8 starmask);
296	296
r4679	r4680
468	468	background_green = 0;
469	469
470	470	/* initialize stars */
471		stars_init();
	471	stars_init(machine);
472	472
473	473	/* register for save states */
474	474	state_save_register(machine);
r4679	r4680
810	810	*
811	811	*************************************/
812	812
813		static void stars_init(void)
	813	static void stars_init(running_machine *machine)
814	814	{
815	815	UINT32 shiftreg;
816	816	int i;
r4679	r4680
820	820	stars_blink_state = 0;
821	821
822	822	/* precalculate the RNG */
823		stars = auto_malloc(STAR_RNG_PERIOD);
	823	stars = auto_alloc_array(machine, UINT8, STAR_RNG_PERIOD);
824	824	shiftreg = 0;
825	825	for (i = 0; i < STAR_RNG_PERIOD; i++)
826	826	{

src/mame/video/othldrby.c

r4679	r4680
63	63	bg_tilemap[1] = tilemap_create(machine, get_tile_info1,tilemap_scan_rows,16,16,32,32);
64	64	bg_tilemap[2] = tilemap_create(machine, get_tile_info2,tilemap_scan_rows,16,16,32,32);
65	65
66		vram = auto_malloc(VIDEORAM_SIZE * sizeof(vram[0]));
67		buf_spriteram = auto_malloc(2*SPRITERAM_SIZE * sizeof(buf_spriteram[0]));
	66	vram = auto_alloc_array(machine, UINT16, VIDEORAM_SIZE);
	67	buf_spriteram = auto_alloc_array(machine, UINT16, 2*SPRITERAM_SIZE);
68	68
69	69	buf_spriteram2 = buf_spriteram + SPRITERAM_SIZE;
70	70

src/mame/video/hyprduel.c

r4679	r4680
309	309	the tile's sizes to be known at startup - which we don't!
310	310	*/
311	311
312		static void alloc_empty_tiles(void)
	312	static void alloc_empty_tiles(running_machine *machine)
313	313	{
314	314	int code,i;
315	315
316		empty_tiles = auto_malloc(16*16*16);
	316	empty_tiles = auto_alloc_array(machine, UINT8, 16*16*16);
317	317
318	318	for (code = 0;code < 0x10;code++)
319	319	for (i = 0;i < 16*16;i++)
r4679	r4680
340	340
341	341	VIDEO_START( hyprduel_14220 )
342	342	{
343		alloc_empty_tiles();
344		hyprduel_tiletable_old = auto_malloc(hyprduel_tiletable_size);
345		dirtyindex = auto_malloc(hyprduel_tiletable_size/4);
	343	alloc_empty_tiles(machine);
	344	hyprduel_tiletable_old = auto_alloc_array(machine, UINT16, hyprduel_tiletable_size/2);
	345	dirtyindex = auto_alloc_array(machine, UINT8, hyprduel_tiletable_size/4);
346	346
347	347	bg_tilemap[0] = tilemap_create(machine, get_tile_info_0_8bit,tilemap_scan_rows,8,8,WIN_NX,WIN_NY);
348	348	bg_tilemap[1] = tilemap_create(machine, get_tile_info_1_8bit,tilemap_scan_rows,8,8,WIN_NX,WIN_NY);

src/mame/video/namconb1.c

r4679	r4680
166	166	VIDEO_START( namconb1 )
167	167	{
168	168	namco_tilemap_init( machine, NAMCONB1_TILEGFX, memory_region(machine, NAMCONB1_TILEMASKREGION), NB1TilemapCB );
169		namco_obj_init(NAMCONB1_SPRITEGFX,0x0,NB1objcode2tile);
	169	namco_obj_init(machine,NAMCONB1_SPRITEGFX,0x0,NB1objcode2tile);
170	170	} /* namconb1 */
171	171
172	172	/****************************************************************************************************/
r4679	r4680
228	228	VIDEO_START( namconb2 )
229	229	{
230	230	namco_tilemap_init(machine, NAMCONB1_TILEGFX, memory_region(machine, NAMCONB1_TILEMASKREGION), NB2TilemapCB );
231		namco_obj_init(NAMCONB1_SPRITEGFX,0x0,NB2objcode2tile);
	231	namco_obj_init(machine,NAMCONB1_SPRITEGFX,0x0,NB2objcode2tile);
232	232	namco_roz_init(machine, NAMCONB1_ROTGFX,NAMCONB1_ROTMASKREGION);
233	233	} /* namconb2_vh_start */

src/mame/video/flstory.c

r4679	r4680
34	34	{
35	35	int code = videoram[tile_index*2];
36	36	int attr = videoram[tile_index*2+1];
37		int tile_number = tile_number = ((attr & 0x38) << 5) + code;
	37	int tile_number = ((attr & 0x38) << 5) + code;
38	38	int flags = ((attr & 0x40) ? TILE_FLIPX : 0) | ((attr & 0x80) ? TILE_FLIPY : 0);
39	39
40	40	SET_TILE_INFO(
r4679	r4680
53	53	tilemap_set_transmask(bg_tilemap,1,0x8000,0x7fff); /* split type 1 has pen 15 transparent in front half */
54	54	tilemap_set_scroll_cols(bg_tilemap,32);
55	55
56		paletteram = auto_malloc(0x200);
57		paletteram_2 = auto_malloc(0x200);
	56	paletteram = auto_alloc_array(machine, UINT8, 0x200);
	57	paletteram_2 = auto_alloc_array(machine, UINT8, 0x200);
58	58	}
59	59
60	60	VIDEO_START( victnine )
r4679	r4680
62	62	bg_tilemap = tilemap_create( machine, victnine_get_tile_info,tilemap_scan_rows,8,8,32,32 );
63	63	tilemap_set_scroll_cols(bg_tilemap,32);
64	64
65		paletteram = auto_malloc(0x200);
66		paletteram_2 = auto_malloc(0x200);
	65	paletteram = auto_alloc_array(machine, UINT8, 0x200);
	66	paletteram_2 = auto_alloc_array(machine, UINT8, 0x200);
67	67	}
68	68
69	69	WRITE8_HANDLER( flstory_videoram_w )

src/mame/video/tia.c

r4679	r4680
274	274	int cx = video_screen_get_width(machine->primary_screen);
275	275
276	276	screen_height = video_screen_get_height(machine->primary_screen);
277		helper[0] = auto_bitmap_alloc(cx, TIA_MAX_SCREEN_HEIGHT, video_screen_get_format(machine->primary_screen));
278		helper[1] = auto_bitmap_alloc(cx, TIA_MAX_SCREEN_HEIGHT, video_screen_get_format(machine->primary_screen));
279		helper[2] = auto_bitmap_alloc(cx, TIA_MAX_SCREEN_HEIGHT, video_screen_get_format(machine->primary_screen));
	277	helper[0] = auto_bitmap_alloc(machine, cx, TIA_MAX_SCREEN_HEIGHT, video_screen_get_format(machine->primary_screen));
	278	helper[1] = auto_bitmap_alloc(machine, cx, TIA_MAX_SCREEN_HEIGHT, video_screen_get_format(machine->primary_screen));
	279	helper[2] = auto_bitmap_alloc(machine, cx, TIA_MAX_SCREEN_HEIGHT, video_screen_get_format(machine->primary_screen));
280	280	}
281	281
282	282

src/mame/video/model2.c

r4679	r4680
331	331	*
332	332	*******************************************/
333	333
334		static void model2_3d_init( UINT16 *texture_rom )
	334	static void model2_3d_init( running_machine *machine, UINT16 *texture_rom )
335	335	{
336	336	memset( &raster, 0, sizeof( raster_state ) );
337	337
338	338	raster.texture_rom = texture_rom;
339		raster.texture_ram = auto_malloc(0x10000 * sizeof(UINT16));
340		raster.log_ram = auto_malloc(0x40000 * sizeof(UINT8));
341		raster.tri_list = auto_malloc(MAX_TRIANGLES * sizeof(triangle));
342		raster.tri_sorted_list = auto_malloc(0x10000 * sizeof( triangle * ));
	339	raster.texture_ram = auto_alloc_array(machine, UINT16, 0x10000);
	340	raster.log_ram = auto_alloc_array(machine, UINT8, 0x40000);
	341	raster.tri_list = auto_alloc_array(machine, triangle, MAX_TRIANGLES);
	342	raster.tri_sorted_list = auto_alloc_array(machine, triangle *, 0x10000);
343	343	}
344	344
345	345	/*******************************************
r4679	r4680
511	511	if ( ztri != NULL )
512	512	{
513	513	while( ztri->next != NULL )
514		ztri = ztri->next;
	514	ztri = (triangle *)ztri->next;
515	515	}
516	516
517	517	/* go through the clipped vertex list, adding triangles */
r4679	r4680
748	748	if ( ztri != NULL )
749	749	{
750	750	while( ztri->next != NULL )
751		ztri = ztri->next;
	751	ztri = (triangle *)ztri->next;
752	752	}
753	753
754	754	/* go through the clipped vertex list, adding triangles */
r4679	r4680
929	929
930	930	static void model2_3d_render( bitmap_t *bitmap, triangle *tri, const rectangle *cliprect )
931	931	{
932		poly_extra_data *extra = poly_get_extra_data(poly);
	932	poly_extra_data *extra = (poly_extra_data *)poly_get_extra_data(poly);
933	933	UINT8      renderer;
934	934	rectangle   vp;
935	935
r4679	r4680
1085	1085	model2_3d_project( tri );
1086	1086	model2_3d_render( bitmap, tri, cliprect );
1087	1087
1088		tri = tri->next;
	1088	tri = (triangle *)tri->next;
1089	1089	}
1090	1090	}
1091	1091	}
r4679	r4680
1312	1312	*
1313	1313	*******************************************/
1314	1314
1315		static void geo_init( UINT32 *polygon_rom )
	1315	static void geo_init( running_machine *machine, UINT32 *polygon_rom )
1316	1316	{
1317	1317	memset( &geo, 0, sizeof( geo_state ) );
1318	1318
1319	1319	geo.polygon_rom = polygon_rom;
1320		geo.polygon_ram0 = auto_malloc(0x8000 * sizeof(UINT32));
1321		geo.polygon_ram1 = auto_malloc(0x8000 * sizeof(UINT32));
	1320	geo.polygon_ram0 = auto_alloc_array(machine, UINT32, 0x8000);
	1321	geo.polygon_ram1 = auto_alloc_array(machine, UINT32, 0x8000);
1322	1322	}
1323	1323
1324	1324	/*******************************************
r4679	r4680
2707	2707	add_exit_callback(machine, model2_exit);
2708	2708
2709	2709	/* initialize the geometry engine */
2710		geo_init( (UINT32*)memory_region(machine, "user2") );
	2710	geo_init( machine, (UINT32*)memory_region(machine, "user2") );
2711	2711
2712	2712	/* initialize the hardware rasterizer */
2713		model2_3d_init( (UINT16*)memory_region(machine, "user3") );
	2713	model2_3d_init( machine, (UINT16*)memory_region(machine, "user3") );
2714	2714	}
2715	2715
2716	2716	static void convert_bitmap( running_machine *machine, bitmap_t *dst, bitmap_t *src, const rectangle *rect )

src/mame/video/sshangha.c

r4679	r4680
15	15
16	16	/******************************************************************************/
17	17
18		WRITE16_HANDLER( sshangha_palette_24bit_w )
19		{
20		int r,g,b;
21
22		COMBINE_DATA(&paletteram16[offset]);
23		if (offset&1) offset--;
24
25		b = (paletteram16[offset] >> 0) & 0xff;
26		g = (paletteram16[offset+1] >> 8) & 0xff;
27		r = (paletteram16[offset+1] >> 0) & 0xff;
28
29		palette_set_color(space->machine,offset/2,MAKE_RGB(r,g,b));
30		}
31
32	18	static void sshangha_tilemap_draw(bitmap_t *bitmap, const rectangle *cliprect)
33	19	{
34	20	const bitmap_t *bitmap0 = tilemap_get_pixmap(pf1_16x16_tilemap);

src/mame/video/leland.c

r4679	r4680
86	86	static VIDEO_START( leland )
87	87	{
88	88	/* allocate memory */
89		leland_video_ram = auto_malloc(VRAM_SIZE);
	89	leland_video_ram = auto_alloc_array_clear(machine, UINT8, VRAM_SIZE);
90	90
91		/* reset videoram */
92		memset(leland_video_ram, 0, VRAM_SIZE);
93
94	91	/* scanline timer */
95	92	scanline_timer = timer_alloc(machine, scanline_callback, NULL);
96	93	timer_adjust_oneshot(scanline_timer, video_screen_get_time_until_pos(machine->primary_screen, 0, 0), 0);
r4679	r4680
104	101	VIDEO_START_CALL(leland);
105	102
106	103	/* allocate memory */
107		ataxx_qram = auto_malloc(QRAM_SIZE);
108
109		/* reset QRAM */
110		memset(ataxx_qram, 0, QRAM_SIZE);
	104	ataxx_qram = auto_alloc_array_clear(machine, UINT8, QRAM_SIZE);
111	105	}
112	106
113	107
r4679	r4680
319	313
320	314	static TIMER_CALLBACK( leland_delayed_mvram_w )
321	315	{
322		const address_space *space = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM);
	316	const address_space *space = cputag_get_address_space(machine, "master", ADDRESS_SPACE_PROGRAM);
323	317
324	318	int num = (param >> 16) & 1;
325	319	int offset = (param >> 8) & 0xff;

src/mame/video/segaic24.c

r4679	r4680
143	143	break;
144	144	assert(sys24_char_gfx_index != MAX_GFX_ELEMENTS);
145	145
146		sys24_char_ram = auto_malloc(0x80000);
	146	sys24_char_ram = auto_alloc_array(machine, UINT16, 0x80000/2);
147	147
148		sys24_tile_ram = auto_malloc(0x10000);
	148	sys24_tile_ram = auto_alloc_array(machine, UINT16, 0x10000/2);
149	149
150	150	sys24_tile_layer[0] = tilemap_create(machine, sys24_tile_info_0s, tilemap_scan_rows,  8, 8, 64, 64);
151	151	sys24_tile_layer[1] = tilemap_create(machine, sys24_tile_info_0w, tilemap_scan_rows,  8, 8, 64, 64);
r4679	r4680
172	172	int y;
173	173	const UINT16 *source  = ((UINT16 *)bm->base) + sx + sy*bm->rowpixels;
174	174	const UINT8  *trans = ((UINT8 *) tm->base) + sx + sy*tm->rowpixels;
175		UINT8        *prib = priority_bitmap->base;
176		UINT16       *dest = dm->base;
	175	UINT8        *prib = (UINT8 *)priority_bitmap->base;
	176	UINT16       *dest = (UINT16 *)dm->base;
177	177
178	178	tpri |= TILEMAP_PIXEL_LAYER0;
179	179
r4679	r4680
306	306	int y;
307	307	const UINT16 *source  = ((UINT16 *)bm->base) + sx + sy*bm->rowpixels;
308	308	const UINT8  *trans = ((UINT8 *) tm->base) + sx + sy*tm->rowpixels;
309		UINT16       *dest = dm->base;
	309	UINT16       *dest = (UINT16 *)dm->base;
310	310	const pen_t  *pens   = machine->pens;
311	311
312	312	tpri |= TILEMAP_PIXEL_LAYER0;
r4679	r4680
649	649
650	650	void sys24_sprite_vh_start(running_machine *machine)
651	651	{
652		sys24_sprite_ram = auto_malloc(0x40000);
	652	sys24_sprite_ram = auto_alloc_array(machine, UINT16, 0x40000/2);
653	653
654	654	state_save_register_global_pointer(machine, sys24_sprite_ram, 0x40000/2);
655	655	//  kc = 0;

src/mame/video/popeye.c

r4679	r4680
244	244
245	245	VIDEO_START( skyskipr )
246	246	{
247		popeye_bitmapram = auto_malloc(popeye_bitmapram_size);
248		tmpbitmap2 = auto_bitmap_alloc(1024,1024,video_screen_get_format(machine->primary_screen));   /* actually 1024x512 but not rolling over vertically? */
	247	popeye_bitmapram = auto_alloc_array(machine, UINT8, popeye_bitmapram_size);
	248	tmpbitmap2 = auto_bitmap_alloc(machine,1024,1024,video_screen_get_format(machine->primary_screen));   /* actually 1024x512 but not rolling over vertically? */
249	249
250	250	bitmap_type = TYPE_SKYSKIPR;
251	251
r4679	r4680
261	261
262	262	VIDEO_START( popeye )
263	263	{
264		popeye_bitmapram = auto_malloc(popeye_bitmapram_size);
265		tmpbitmap2 = auto_bitmap_alloc(512,512,video_screen_get_format(machine->primary_screen));
	264	popeye_bitmapram = auto_alloc_array(machine, UINT8, popeye_bitmapram_size);
	265	tmpbitmap2 = auto_bitmap_alloc(machine,512,512,video_screen_get_format(machine->primary_screen));
266	266
267	267	bitmap_type = TYPE_POPEYE;
268	268
r4679	r4680
279	279	static void draw_background(running_machine *machine, bitmap_t *bitmap, const rectangle *cliprect)
280	280	{
281	281	int offs;
282		const address_space *space = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM);
	282	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
283	283
284	284	if (lastflip != flip_screen_get(machine))
285	285	{

src/mame/video/lordgun.c

r4679	r4680
36	36	***************************************************************************/
37	37
38	38	#include "driver.h"
	39	#include "lordgun.h"
39	40
40	41	// Variables needed by driver:
41	42
r4679	r4680
46	47	UINT16 *lordgun_scrollram;
47	48	int lordgun_whitescreen;
48	49
49		struct
50		{
51		int      scr_x,   scr_y;
52		UINT16   hw_x,   hw_y;
53		}   lordgun_gun[2];
	50	lordgun_gun_data lordgun_gun[2];
54	51
55	52
56	53	/***************************************************************************

src/mame/video/lemmings.c

r4679	r4680
93	93
94	94	VIDEO_START( lemmings )
95	95	{
96		bitmap0 = auto_bitmap_alloc(2048,256,video_screen_get_format(machine->primary_screen));
	96	bitmap0 = auto_bitmap_alloc(machine,2048,256,video_screen_get_format(machine->primary_screen));
97	97	vram_tilemap = tilemap_create(machine, get_tile_info,tilemap_scan_cols,8,8,64,32);
98	98
99		vram_buffer = (UINT8*)auto_malloc(2048*64); /* 64 bytes per VRAM character */
100		sprite_triple_buffer_0 = (UINT16*)auto_malloc(0x800);
101		sprite_triple_buffer_1 = (UINT16*)auto_malloc(0x800);
	99	vram_buffer = auto_alloc_array(machine, UINT8, 2048*64); /* 64 bytes per VRAM character */
	100	sprite_triple_buffer_0 = auto_alloc_array(machine, UINT16, 0x800/2);
	101	sprite_triple_buffer_1 = auto_alloc_array(machine, UINT16, 0x800/2);
102	102
103	103	tilemap_set_transparent_pen(vram_tilemap,0);
104	104	bitmap_fill(bitmap0,0,0x100);

src/mame/video/espial.c

r4679	r4680
103	103	bg_tilemap = tilemap_create(machine, get_tile_info,tilemap_scan_rows,8,8,32,32);
104	104
105	105	tilemap_set_scroll_cols(bg_tilemap, 32);
	106
	107	state_save_register_global(machine, flipscreen);
106	108	}
107	109
108	110	VIDEO_START( netwars )
r4679	r4680
112	114
113	115	tilemap_set_scroll_cols(bg_tilemap, 32);
114	116	tilemap_set_scrolldy(bg_tilemap, 0, 0x100);
	117
	118	state_save_register_global(machine, flipscreen);
115	119	}
116	120
117	121

src/mame/video/tiamc1.c

r4679	r4680
103	103	int r, g, b, ir, ig, ib;
104	104	float tcol;
105	105
106		palette = auto_malloc(256 * sizeof(*palette));
	106	palette = auto_alloc_array(machine, rgb_t, 256);
107	107
108	108	for (col = 0; col < 256; col++) {
109	109	ir = (col >> 3) & 7;
r4679	r4680
134	134	{
135	135	UINT8 *video_ram;
136	136
137		video_ram = auto_malloc(0x3040);
138		memset(video_ram, 0, 0x3040);
	137	video_ram = auto_alloc_array_clear(machine, UINT8, 0x3040);
139	138
140	139	tiamc1_charram = video_ram + 0x0800;     /* Ram is banked */
141	140	tiamc1_tileram = video_ram + 0x0000;

src/mame/video/toaplan1.c

r4679	r4680
267	267	}
268	268
269	269
270		static void toaplan1_paletteram_alloc(void)
	270	static void toaplan1_paletteram_alloc(running_machine *machine)
271	271	{
272		paletteram16 = auto_malloc(toaplan1_colorram1_size + toaplan1_colorram2_size);
	272	paletteram16 = auto_alloc_array(machine, UINT16, (toaplan1_colorram1_size + toaplan1_colorram2_size)/2);
273	273	}
274	274
275		static void toaplan1_vram_alloc(void)
	275	static void toaplan1_vram_alloc(running_machine *machine)
276	276	{
277		pf1_tilevram16 = auto_malloc(TOAPLAN1_TILEVRAM_SIZE);
278		memset(pf1_tilevram16,0,TOAPLAN1_TILEVRAM_SIZE);
279
280		pf2_tilevram16 = auto_malloc(TOAPLAN1_TILEVRAM_SIZE);
281		memset(pf2_tilevram16,0,TOAPLAN1_TILEVRAM_SIZE);
282
283		pf3_tilevram16 = auto_malloc(TOAPLAN1_TILEVRAM_SIZE);
284		memset(pf3_tilevram16,0,TOAPLAN1_TILEVRAM_SIZE);
285
286		pf4_tilevram16 = auto_malloc(TOAPLAN1_TILEVRAM_SIZE);
287		memset(pf4_tilevram16,0,TOAPLAN1_TILEVRAM_SIZE);
	277	pf1_tilevram16 = auto_alloc_array_clear(machine, UINT16, TOAPLAN1_TILEVRAM_SIZE/2);
	278	pf2_tilevram16 = auto_alloc_array_clear(machine, UINT16, TOAPLAN1_TILEVRAM_SIZE/2);
	279	pf3_tilevram16 = auto_alloc_array_clear(machine, UINT16, TOAPLAN1_TILEVRAM_SIZE/2);
	280	pf4_tilevram16 = auto_alloc_array_clear(machine, UINT16, TOAPLAN1_TILEVRAM_SIZE/2);
288	281	}
289	282
290		static void toaplan1_spritevram_alloc(void)
	283	static void toaplan1_spritevram_alloc(running_machine *machine)
291	284	{
292		spriteram16 = auto_malloc(TOAPLAN1_SPRITERAM_SIZE);
293		memset(spriteram16,0,TOAPLAN1_SPRITERAM_SIZE);
	285	spriteram16 = auto_alloc_array_clear(machine, UINT16, TOAPLAN1_SPRITERAM_SIZE/2);
	286	buffered_spriteram16 = auto_alloc_array_clear(machine, UINT16, TOAPLAN1_SPRITERAM_SIZE/2);
	287	toaplan1_spritesizeram16 = auto_alloc_array_clear(machine, UINT16, TOAPLAN1_SPRITESIZERAM_SIZE/2);
	288	toaplan1_buffered_spritesizeram16 = auto_alloc_array_clear(machine, UINT16, TOAPLAN1_SPRITESIZERAM_SIZE/2);
294	289
295		buffered_spriteram16 = auto_malloc(TOAPLAN1_SPRITERAM_SIZE);
296		memset(buffered_spriteram16,0,TOAPLAN1_SPRITERAM_SIZE);
297
298		toaplan1_spritesizeram16 = auto_malloc(TOAPLAN1_SPRITESIZERAM_SIZE);
299		memset(toaplan1_spritesizeram16,0,TOAPLAN1_SPRITESIZERAM_SIZE);
300
301		toaplan1_buffered_spritesizeram16 = auto_malloc(TOAPLAN1_SPRITESIZERAM_SIZE);
302		memset(toaplan1_buffered_spritesizeram16,0,TOAPLAN1_SPRITESIZERAM_SIZE);
303
304	290	spriteram_size = TOAPLAN1_SPRITERAM_SIZE;
305	291	}
306	292
r4679	r4680
318	304
319	305	static STATE_POSTLOAD( rallybik_flipscreen )
320	306	{
321		const address_space *space = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM);
	307	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
322	308	rallybik_bcu_flipscreen_w(space, 0, bcu_flipscreen, 0xffff);
323	309	}
324	310
325	311	static STATE_POSTLOAD( toaplan1_flipscreen )
326	312	{
327		const address_space *space = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM);
	313	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
328	314	toaplan1_bcu_flipscreen_w(space, 0, bcu_flipscreen, 0xffff);
329	315	}
330	316
r4679	r4680
332	318	VIDEO_START( rallybik )
333	319	{
334	320	toaplan1_create_tilemaps(machine);
335		toaplan1_paletteram_alloc();
336		toaplan1_vram_alloc();
	321	toaplan1_paletteram_alloc(machine);
	322	toaplan1_vram_alloc(machine);
337	323
338	324	scrollx_offs1 = 0x0d + 6;
339	325	scrollx_offs2 = 0x0d + 4;
r4679	r4680
375	361	VIDEO_START( toaplan1 )
376	362	{
377	363	toaplan1_create_tilemaps(machine);
378		toaplan1_paletteram_alloc();
379		toaplan1_vram_alloc();
380		toaplan1_spritevram_alloc();
	364	toaplan1_paletteram_alloc(machine);
	365	toaplan1_vram_alloc(machine);
	366	toaplan1_spritevram_alloc(machine);
381	367
382	368	scrollx_offs1 = 0x1ef + 6;
383	369	scrollx_offs2 = 0x1ef + 4;
r4679	r4680
1231	1217
1232	1218	VIDEO_EOF( rallybik )
1233	1219	{
1234		const address_space *space = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM);
	1220	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
1235	1221	buffer_spriteram16_w(space, 0, 0, 0xffff);
1236	1222	}
1237	1223
1238	1224	VIDEO_EOF( toaplan1 )
1239	1225	{
1240		const address_space *space = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM);
	1226	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
1241	1227	buffer_spriteram16_w(space, 0, 0, 0xffff);
1242	1228	memcpy(toaplan1_buffered_spritesizeram16, toaplan1_spritesizeram16, TOAPLAN1_SPRITESIZERAM_SIZE);
1243	1229	}
1244	1230
1245	1231	VIDEO_EOF( samesame )
1246	1232	{
1247		const address_space *space = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM);
	1233	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
1248	1234	buffer_spriteram16_w(space, 0, 0, 0xffff);
1249	1235	memcpy(toaplan1_buffered_spritesizeram16, toaplan1_spritesizeram16, TOAPLAN1_SPRITESIZERAM_SIZE);
1250		cpu_set_input_line(machine->cpu[0], M68K_IRQ_2, HOLD_LINE);   /* Frame done */
	1236	cputag_set_input_line(machine, "maincpu", M68K_IRQ_2, HOLD_LINE);   /* Frame done */
1251	1237	}

src/mame/video/segag80r.c

r4679	r4680
211	211	gfx_element_set_source(machine->gfx[0], &videoram[0x800]);
212	212
213	213	/* allocate paletteram */
214		paletteram = auto_malloc(0x80);
	214	paletteram = auto_alloc_array(machine, UINT8, 0x80);
215	215
216	216	/* initialize the particulars for each type of background PCB */
217	217	switch (segag80r_background_pcb)
r4679	r4680
608	608	{
609	609	/* port 0: irq ack */
610	610	case 0:
611		cpu_set_input_line(space->machine->cpu[0], 0, CLEAR_LINE);
	611	cputag_set_input_line(space->machine, "maincpu", 0, CLEAR_LINE);
612	612	break;
613	613
614	614	/* port 1: background control

src/mame/video/hnayayoi.c

r4679	r4680
17	17	static int total_pixmaps;
18	18
19	19
20		static void common_vh_start(int num_pixmaps)
	20	static void common_vh_start(running_machine *machine, int num_pixmaps)
21	21	{
22	22	int i;
23	23
r4679	r4680
27	27	{
28	28	if (i < total_pixmaps)
29	29	{
30		pixmap[i] = auto_malloc(256*256);
	30	pixmap[i] = auto_alloc_array(machine, UINT8, 256*256);
31	31	}
32	32	else
33	33	pixmap[i] = NULL;
r4679	r4680
36	36
37	37	VIDEO_START( hnayayoi )
38	38	{
39		common_vh_start(4);   /* 4 bitmaps -> 2 layers */
	39	common_vh_start(machine, 4);   /* 4 bitmaps -> 2 layers */
40	40	}
41	41
42	42	VIDEO_START( untoucha )
43	43	{
44		common_vh_start(8);   /* 8 bitmaps -> 4 layers */
	44	common_vh_start(machine, 8);   /* 8 bitmaps -> 4 layers */
45	45	}
46	46
47	47

src/mame/video/tmnt.c

r4679	r4680
335	335	static int last;
336	336
337	337	/* bit 0/1 = coin counters */
338		coin_counter_w(0,data & 0x01);
339		coin_counter_w(1,data & 0x02);   /* 2 players version */
	338	coin_counter_w(0, data & 0x01);
	339	coin_counter_w(1, data & 0x02);   /* 2 players version */
340	340
341	341	/* bit 3 high then low triggers irq on sound CPU */
342	342	if (last == 0x08 && (data & 0x08) == 0)
343		cpu_set_input_line_and_vector(space->machine->cpu[1],0,HOLD_LINE,0xff);
	343	cputag_set_input_line_and_vector(space->machine, "audiocpu", 0, HOLD_LINE, 0xff);
344	344
345	345	last = data & 0x08;
346	346
347	347	/* bit 5 = irq enable */
348		interrupt_enable_w(space,0,data & 0x20);
	348	interrupt_enable_w(space, 0, data & 0x20);
349	349
350	350	/* bit 7 = enable char ROM reading through the video RAM */
351	351	K052109_set_RMRD_line((data & 0x80) ? ASSERT_LINE : CLEAR_LINE);
r4679	r4680
362	362
363	363
364	364	/* bit 0 = coin counter */
365		coin_counter_w(0,data & 0x01);
	365	coin_counter_w(0, data & 0x01);
366	366
367	367	/* bit 2 = trigger irq on sound CPU */
368	368	if (last == 0x04 && (data & 0x04) == 0)
369		cpu_set_input_line_and_vector(space->machine->cpu[1],0,HOLD_LINE,0xff);
	369	cputag_set_input_line_and_vector(space->machine, "audiocpu", 0, HOLD_LINE, 0xff);
370	370
371	371	last = data & 0x04;
372	372
r4679	r4680
383	383
384	384
385	385	/* bit 0,1 = coin counter */
386		coin_counter_w(0,data & 0x01);
387		coin_counter_w(1,data & 0x02);
	386	coin_counter_w(0, data & 0x01);
	387	coin_counter_w(1, data & 0x02);
388	388
389	389	/* bit 2 = trigger irq on sound CPU */
390	390	if (last == 0x00 && (data & 0x04) == 0x04)
391		cpu_set_input_line_and_vector(space->machine->cpu[1],0,HOLD_LINE,0xff);
	391	cputag_set_input_line_and_vector(space->machine, "audiocpu", 0, HOLD_LINE, 0xff);
392	392
393	393	last = data & 0x04;
394	394

src/mame/video/dc.c

r4679	r4680
9	9	#include "render.h"
10	10	#include "rendutil.h"
11	11
	12	static int vblc=0;
12	13	#define DEBUG_FIFO_POLY (0)
13	14	#define DEBUG_PVRCTRL   (0)
14	15	#define DEBUG_PVRTA   (0)
15	16	#define DEBUG_PVRTA_REGS (0)
16		#define DEBUG_PVRDLIST   (0)
17		#define DEBUG_VERTICES   (1)
	17	#define DEBUG_PVRDLIST   (1)
18	18	#define DEBUG_PALRAM (1)
19	19
20	20	#define NUM_BUFFERS 4
r4679	r4680
28	28	static UINT32 dilated0[15][1024];
29	29	static UINT32 dilated1[15][1024];
30	30	static int dilatechose[64];
	31	static float wbuffer[480][640];
31	32
32	33	UINT64 *dc_texture_ram;
33	34	static UINT32 tafifo_buff[32];
r4679	r4680
42	43	static bitmap_t *fakeframebuffer_bitmap;
43	44	static void testdrawscreen(const running_machine *machine,bitmap_t *bitmap,const rectangle *cliprect);
44	45
45		typedef struct
	46	typedef struct texinfo {
	47	UINT32 address, vqbase;
	48	int sizex, sizey, sizes, pf, palette, mode, mipmapped;
	49
	50	UINT32 (*r)(struct texinfo *t, float x, float y);
	51	int palbase, cd;
	52	} texinfo;
	53
	54	typedef   struct
46	55	{
47		float x;
48		float y;
49		float z;
50		float u;
51		float v;
	56	float x, y, w, u, v;
52	57	} vert;
53	58
54	59	typedef struct
55	60	{
56		int positionx, positiony;
57		int sizex, sizey;
58		UINT32 textureaddress;
59		float u, v, du, dv;
60		int texturemode;
61		int texturesizex, texturesizey, texturesizes, texturepf, texturepalette;
	61	int svert, evert;
	62	texinfo ti;
	63	} strip;
62	64
63		vert a,b,c,d;
64
65		} testsprites;
66
67		#if DEBUG_VERTICES
68		typedef   struct
69		{
70		int x;
71		int y;
72		int endofstrip;
73		} testvertices;
74		#endif
75
76	65	typedef struct {
77		testsprites showsprites[2048];
	66	vert verts[65536];
	67	strip strips[65536];
78	68
79		#if DEBUG_VERTICES
80		testvertices showvertices[65536];
81		#endif
82
83		int testsprites_size, testsprites_toerase, testvertices_size;
	69	int verts_size, strips_size;
84	70	UINT32 ispbase;
85	71	UINT32 fbwsof1;
86	72	UINT32 fbwsof2;
r4679	r4680
108	94
109	95	static pvrta_state state_ta;
110	96
	97
	98	INLINE UINT32 cv_1555(UINT16 c)
	99	{
	100	return
	101	(c & 0x8000 ? 0xff000000 : 0) |
	102	((c << 9) & 0x00f80000) | ((c << 4) & 0x00070000) |
	103	((c << 6) & 0x0000f800) | ((c << 1) & 0x00000700) |
	104	((c << 3) & 0x000000f8) | ((c >> 2) & 0x00000007);
	105	}
	106
	107	INLINE UINT32 cv_1555z(UINT16 c)
	108	{
	109	return
	110	(c & 0x8000 ? 0xff000000 : 0) |
	111	((c << 9) & 0x00f80000) |
	112	((c << 6) & 0x0000f800) |
	113	((c << 3) & 0x000000f8);
	114	}
	115
	116	INLINE UINT32 cv_565(UINT16 c)
	117	{
	118	return
	119	0xff000000 |
	120	((c << 8) & 0x00f80000) | ((c << 3) & 0x00070000) |
	121	((c << 5) & 0x0000fc00) | ((c >> 1) & 0x00000300) |
	122	((c << 3) & 0x000000f8) | ((c >> 2) & 0x00000007);
	123	}
	124
	125	INLINE UINT32 cv_565z(UINT16 c)
	126	{
	127	return
	128	0xff000000 |
	129	((c << 8) & 0x00f80000) |
	130	((c << 5) & 0x0000fc00) |
	131	((c << 3) & 0x000000f8);
	132	}
	133
	134	INLINE UINT32 cv_4444(UINT16 c)
	135	{
	136	return
	137	((c << 16) & 0xf0000000) | ((c << 12) & 0x0f000000) |
	138	((c << 12) & 0x00f00000) | ((c <<  8) & 0x000f0000) |
	139	((c <<  8) & 0x0000f000) | ((c <<  4) & 0x00000f00) |
	140	((c <<  4) & 0x000000f0) | ((c      ) & 0x0000000f);
	141	}
	142
	143	INLINE UINT32 cv_4444z(UINT16 c)
	144	{
	145	return
	146	((c << 16) & 0xf0000000) |
	147	((c << 12) & 0x00f00000) |
	148	((c <<  8) & 0x0000f000) |
	149	((c <<  4) & 0x000000f0);
	150	}
	151
	152	INLINE UINT32 cv_yuv(UINT16 c1, UINT16 c2, int x)
	153	{
	154	int u = 11*((c1 & 0xff) - 128);
	155	int v = 11*((c2 & 0xff) - 128);
	156	int y = (x & 1 ? c2 : c1) >> 8;
	157	int r = y + v/8;
	158	int g = y - u/32 - v/16;
	159	int b = y + (3*u)/16;
	160	r = r < 0 ? 0 : r > 255 ? 255 : r;
	161	g = g < 0 ? 0 : g > 255 ? 255 : g;
	162	b = b < 0 ? 0 : b > 255 ? 255 : b;
	163	return 0xff000000 | (r << 16) | (g << 8) | b;
	164	}
	165
	166
	167	static UINT32 tex_r_yuv_n(texinfo *t, float x, float y)
	168	{
	169	int xt = ((int)x) & (t->sizex-1);
	170	int yt = ((int)y) & (t->sizey-1);
	171	int addrp = t->address + (t->sizex*yt + (xt & ~1))*2;
	172	UINT16 c1 = *(UINT16 *)(((UINT8 *)dc_texture_ram) + WORD_XOR_LE(addrp));
	173	UINT16 c2 = *(UINT16 *)(((UINT8 *)dc_texture_ram) + WORD_XOR_LE(addrp+2));
	174	return cv_yuv(c1, c2, xt);
	175	}
	176
	177	static UINT32 tex_r_1555_n(texinfo *t, float x, float y)
	178	{
	179	int xt = ((int)x) & (t->sizex-1);
	180	int yt = ((int)y) & (t->sizey-1);
	181	int addrp = t->address + (t->sizex*yt + xt)*2;
	182	return cv_1555z(*(UINT16 *)(((UINT8 *)dc_texture_ram) + WORD_XOR_LE(addrp)));
	183	}
	184
	185	static UINT32 tex_r_1555_tw(texinfo *t, float x, float y)
	186	{
	187	int xt = ((int)x) & (t->sizex-1);
	188	int yt = ((int)y) & (t->sizey-1);
	189	int addrp = t->address + (dilated1[t->cd][xt] + dilated0[t->cd][yt])*2;
	190	return cv_1555(*(UINT16 *)(((UINT8 *)dc_texture_ram) + WORD_XOR_LE(addrp)));
	191	}
	192
	193	static UINT32 tex_r_1555_vq(texinfo *t, float x, float y)
	194	{
	195	int xt = ((int)x) & (t->sizex-1);
	196	int yt = ((int)y) & (t->sizey-1);
	197	int idx = ((UINT8 *)dc_texture_ram)[BYTE_XOR_LE(t->address + dilated1[t->cd][xt >> 1] + dilated0[t->cd][yt >> 1])];
	198	int addrp = t->vqbase + 8*idx + (dilated1[t->cd][xt & 1] + dilated0[t->cd][yt & 1])*2;
	199	return cv_1555(*(UINT16 *)(((UINT8 *)dc_texture_ram) + WORD_XOR_LE(addrp)));
	200	}
	201
	202	static UINT32 tex_r_565_n(texinfo *t, float x, float y)
	203	{
	204	int xt = ((int)x) & (t->sizex-1);
	205	int yt = ((int)y) & (t->sizey-1);
	206	int addrp = t->address + (t->sizex*yt + xt)*2;
	207	return cv_565z(*(UINT16 *)(((UINT8 *)dc_texture_ram) + WORD_XOR_LE(addrp)));
	208	}
	209
	210	static UINT32 tex_r_565_tw(texinfo *t, float x, float y)
	211	{
	212	int xt = ((int)x) & (t->sizex-1);
	213	int yt = ((int)y) & (t->sizey-1);
	214	int addrp = t->address + (dilated1[t->cd][xt] + dilated0[t->cd][yt])*2;
	215	return cv_565(*(UINT16 *)(((UINT8 *)dc_texture_ram) + WORD_XOR_LE(addrp)));
	216	}
	217
	218	static UINT32 tex_r_565_vq(texinfo *t, float x, float y)
	219	{
	220	int xt = ((int)x) & (t->sizex-1);
	221	int yt = ((int)y) & (t->sizey-1);
	222	int idx = ((UINT8 *)dc_texture_ram)[BYTE_XOR_LE(t->address + dilated1[t->cd][xt >> 1] + dilated0[t->cd][yt >> 1])];
	223	int addrp = t->vqbase + 8*idx + (dilated1[t->cd][xt & 1] + dilated0[t->cd][yt & 1])*2;
	224	return cv_565(*(UINT16 *)(((UINT8 *)dc_texture_ram) + WORD_XOR_LE(addrp)));
	225	}
	226
	227	static UINT32 tex_r_4444_n(texinfo *t, float x, float y)
	228	{
	229	int xt = ((int)x) & (t->sizex-1);
	230	int yt = ((int)y) & (t->sizey-1);
	231	int addrp = t->address + (t->sizex*yt + xt)*2;
	232	return cv_4444z(*(UINT16 *)(((UINT8 *)dc_texture_ram) + WORD_XOR_LE(addrp)));
	233	}
	234
	235	static UINT32 tex_r_4444_tw(texinfo *t, float x, float y)
	236	{
	237	int xt = ((int)x) & (t->sizex-1);
	238	int yt = ((int)y) & (t->sizey-1);
	239	int addrp = t->address + (dilated1[t->cd][xt] + dilated0[t->cd][yt])*2;
	240	return cv_4444(*(UINT16 *)(((UINT8 *)dc_texture_ram) + WORD_XOR_LE(addrp)));
	241	}
	242
	243	static UINT32 tex_r_4444_vq(texinfo *t, float x, float y)
	244	{
	245	int xt = ((int)x) & (t->sizex-1);
	246	int yt = ((int)y) & (t->sizey-1);
	247	int idx = ((UINT8 *)dc_texture_ram)[BYTE_XOR_LE(t->address + dilated1[t->cd][xt >> 1] + dilated0[t->cd][yt >> 1])];
	248	int addrp = t->vqbase + 8*idx + (dilated1[t->cd][xt & 1] + dilated0[t->cd][yt & 1])*2;
	249	return cv_4444(*(UINT16 *)(((UINT8 *)dc_texture_ram) + WORD_XOR_LE(addrp)));
	250	}
	251
	252	static UINT32 tex_r_p4_1555_tw(texinfo *t, float x, float y)
	253	{
	254	int xt = ((int)x) & (t->sizex-1);
	255	int yt = ((int)y) & (t->sizey-1);
	256	int off = dilated1[t->cd][xt] + dilated0[t->cd][yt];
	257	int addrp = t->address + (off >> 1);
	258	int c = (((UINT8 *)dc_texture_ram)[BYTE_XOR_LE(addrp)] >> ((off & 1) << 2)) & 0xf;
	259	return cv_1555(pvrta_regs[t->palbase + c]);
	260	}
	261
	262	static UINT32 tex_r_p4_1555_vq(texinfo *t, float x, float y)
	263	{
	264	int xt = ((int)x) & (t->sizex-1);
	265	int yt = ((int)y) & (t->sizey-1);
	266	int idx = ((UINT8 *)dc_texture_ram)[BYTE_XOR_LE(t->address + dilated1[t->cd][xt >> 1] + dilated0[t->cd][yt >> 1])];
	267	int addrp = t->vqbase + 8*idx + dilated1[t->cd][xt & 1] + dilated0[t->cd][yt & 3];
	268	int c = ((UINT8 *)dc_texture_ram)[BYTE_XOR_LE(addrp)] & 0xf;
	269	return cv_1555(pvrta_regs[t->palbase + c]);
	270	}
	271
	272	static UINT32 tex_r_p4_565_tw(texinfo *t, float x, float y)
	273	{
	274	int xt = ((int)x) & (t->sizex-1);
	275	int yt = ((int)y) & (t->sizey-1);
	276	int off = dilated1[t->cd][xt] + dilated0[t->cd][yt];
	277	int addrp = t->address + (off >> 1);
	278	int c = (((UINT8 *)dc_texture_ram)[BYTE_XOR_LE(addrp)] >> ((off & 1) << 2)) & 0xf;
	279	return cv_565(pvrta_regs[t->palbase + c]);
	280	}
	281
	282	static UINT32 tex_r_p4_565_vq(texinfo *t, float x, float y)
	283	{
	284	int xt = ((int)x) & (t->sizex-1);
	285	int yt = ((int)y) & (t->sizey-1);
	286	int idx = ((UINT8 *)dc_texture_ram)[BYTE_XOR_LE(t->address + dilated1[t->cd][xt >> 1] + dilated0[t->cd][yt >> 1])];
	287	int addrp = t->vqbase + 8*idx + dilated1[t->cd][xt & 1] + dilated0[t->cd][yt & 3];
	288	int c = ((UINT8 *)dc_texture_ram)[BYTE_XOR_LE(addrp)] & 0xf;
	289	return cv_565(pvrta_regs[t->palbase + c]);
	290	}
	291
	292	static UINT32 tex_r_p4_4444_tw(texinfo *t, float x, float y)
	293	{
	294	int xt = ((int)x) & (t->sizex-1);
	295	int yt = ((int)y) & (t->sizey-1);
	296	int off = dilated1[t->cd][xt] + dilated0[t->cd][yt];
	297	int addrp = t->address + (off >> 1);
	298	int c = (((UINT8 *)dc_texture_ram)[BYTE_XOR_LE(addrp)] >> ((off & 1) << 2)) & 0xf;
	299	return cv_4444(pvrta_regs[t->palbase + c]);
	300	}
	301
	302	static UINT32 tex_r_p4_4444_vq(texinfo *t, float x, float y)
	303	{
	304	int xt = ((int)x) & (t->sizex-1);
	305	int yt = ((int)y) & (t->sizey-1);
	306	int idx = ((UINT8 *)dc_texture_ram)[BYTE_XOR_LE(t->address + dilated1[t->cd][xt >> 1] + dilated0[t->cd][yt >> 1])];
	307	int addrp = t->vqbase + 8*idx + dilated1[t->cd][xt & 1] + dilated0[t->cd][yt & 3];
	308	int c = ((UINT8 *)dc_texture_ram)[BYTE_XOR_LE(addrp)] & 0xf;
	309	return cv_4444(pvrta_regs[t->palbase + c]);
	310	}
	311
	312	static UINT32 tex_r_p4_8888_tw(texinfo *t, float x, float y)
	313	{
	314	int xt = ((int)x) & (t->sizex-1);
	315	int yt = ((int)y) & (t->sizey-1);
	316	int off = dilated1[t->cd][xt] + dilated0[t->cd][yt];
	317	int addrp = t->address + (off >> 1);
	318	int c = (((UINT8 *)dc_texture_ram)[BYTE_XOR_LE(addrp)] >> ((off & 1) << 2)) & 0xf;
	319	return pvrta_regs[t->palbase + c];
	320	}
	321
	322	static UINT32 tex_r_p4_8888_vq(texinfo *t, float x, float y)
	323	{
	324	int xt = ((int)x) & (t->sizex-1);
	325	int yt = ((int)y) & (t->sizey-1);
	326	int idx = ((UINT8 *)dc_texture_ram)[BYTE_XOR_LE(t->address + dilated1[t->cd][xt >> 1] + dilated0[t->cd][yt >> 1])];
	327	int addrp = t->vqbase + 8*idx + dilated1[t->cd][xt & 1] + dilated0[t->cd][yt & 3];
	328	int c = ((UINT8 *)dc_texture_ram)[BYTE_XOR_LE(addrp)] & 0xf;
	329	return pvrta_regs[t->palbase + c];
	330	}
	331
	332	static UINT32 tex_r_p8_1555_tw(texinfo *t, float x, float y)
	333	{
	334	int xt = ((int)x) & (t->sizex-1);
	335	int yt = ((int)y) & (t->sizey-1);
	336	int addrp = t->address + dilated1[t->cd][xt] + dilated0[t->cd][yt];
	337	int c = ((UINT8 *)dc_texture_ram)[BYTE_XOR_LE(addrp)];
	338	return cv_1555(pvrta_regs[t->palbase + c]);
	339	}
	340
	341	static UINT32 tex_r_p8_1555_vq(texinfo *t, float x, float y)
	342	{
	343	int xt = ((int)x) & (t->sizex-1);
	344	int yt = ((int)y) & (t->sizey-1);
	345	int idx = ((UINT8 *)dc_texture_ram)[BYTE_XOR_LE(t->address + dilated1[t->cd][xt >> 1] + dilated0[t->cd][yt >> 1])];
	346	int addrp = t->vqbase + 8*idx + dilated1[t->cd][xt & 1] + dilated0[t->cd][yt & 3];
	347	int c = ((UINT8 *)dc_texture_ram)[BYTE_XOR_LE(addrp)];
	348	return cv_1555(pvrta_regs[t->palbase + c]);
	349	}
	350
	351	static UINT32 tex_r_p8_565_tw(texinfo *t, float x, float y)
	352	{
	353	int xt = ((int)x) & (t->sizex-1);
	354	int yt = ((int)y) & (t->sizey-1);
	355	int addrp = t->address + dilated1[t->cd][xt] + dilated0[t->cd][yt];
	356	int c = ((UINT8 *)dc_texture_ram)[BYTE_XOR_LE(addrp)];
	357	return cv_565(pvrta_regs[t->palbase + c]);
	358	}
	359
	360	static UINT32 tex_r_p8_565_vq(texinfo *t, float x, float y)
	361	{
	362	int xt = ((int)x) & (t->sizex-1);
	363	int yt = ((int)y) & (t->sizey-1);
	364	int idx = ((UINT8 *)dc_texture_ram)[BYTE_XOR_LE(t->address + dilated1[t->cd][xt >> 1] + dilated0[t->cd][yt >> 1])];
	365	int addrp = t->vqbase + 8*idx + dilated1[t->cd][xt & 1] + dilated0[t->cd][yt & 3];
	366	int c = ((UINT8 *)dc_texture_ram)[BYTE_XOR_LE(addrp)];
	367	return cv_565(pvrta_regs[t->palbase + c]);
	368	}
	369
	370	static UINT32 tex_r_p8_4444_tw(texinfo *t, float x, float y)
	371	{
	372	int xt = ((int)x) & (t->sizex-1);
	373	int yt = ((int)y) & (t->sizey-1);
	374	int addrp = t->address + dilated1[t->cd][xt] + dilated0[t->cd][yt];
	375	int c = ((UINT8 *)dc_texture_ram)[BYTE_XOR_LE(addrp)];
	376	return cv_4444(pvrta_regs[t->palbase + c]);
	377	}
	378
	379	static UINT32 tex_r_p8_4444_vq(texinfo *t, float x, float y)
	380	{
	381	int xt = ((int)x) & (t->sizex-1);
	382	int yt = ((int)y) & (t->sizey-1);
	383	int idx = ((UINT8 *)dc_texture_ram)[BYTE_XOR_LE(t->address + dilated1[t->cd][xt >> 1] + dilated0[t->cd][yt >> 1])];
	384	int addrp = t->vqbase + 8*idx + dilated1[t->cd][xt & 1] + dilated0[t->cd][yt & 3];
	385	int c = ((UINT8 *)dc_texture_ram)[BYTE_XOR_LE(addrp)];
	386	return cv_4444(pvrta_regs[t->palbase + c]);
	387	}
	388
	389	static UINT32 tex_r_p8_8888_tw(texinfo *t, float x, float y)
	390	{
	391	int xt = ((int)x) & (t->sizex-1);
	392	int yt = ((int)y) & (t->sizey-1);
	393	int addrp = t->address + dilated1[t->cd][xt] + dilated0[t->cd][yt];
	394	int c = ((UINT8 *)dc_texture_ram)[BYTE_XOR_LE(addrp)];
	395	return pvrta_regs[t->palbase + c];
	396	}
	397
	398	static UINT32 tex_r_p8_8888_vq(texinfo *t, float x, float y)
	399	{
	400	int xt = ((int)x) & (t->sizex-1);
	401	int yt = ((int)y) & (t->sizey-1);
	402	int idx = ((UINT8 *)dc_texture_ram)[BYTE_XOR_LE(t->address + dilated1[t->cd][xt >> 1] + dilated0[t->cd][yt >> 1])];
	403	int addrp = t->vqbase + 8*idx + dilated1[t->cd][xt & 1] + dilated0[t->cd][yt & 3];
	404	int c = ((UINT8 *)dc_texture_ram)[BYTE_XOR_LE(addrp)];
	405	return pvrta_regs[t->palbase + c];
	406	}
	407
	408
	409	static UINT32 tex_r_default(texinfo *t, float x, float y)
	410	{
	411	return ((int)x ^ (int)y) & 4 ? 0xffffff00 : 0xff0000ff;
	412	}
	413
	414	static void tex_prepare(texinfo *t)
	415	{
	416	int miptype = 0;
	417
	418	t->r = tex_r_default;
	419	t->cd = dilatechose[t->sizes];
	420	t->palbase = 0;
	421	t->vqbase = t->address;
	422
	423	//  fprintf(stderr, "tex %d %d %d %d\n", t->pf, t->mode, pvrta_regs[PAL_RAM_CTRL], t->mipmapped);
	424
	425	switch(t->pf) {
	426	case 0: // 1555
	427	switch(t->mode) {
	428	case 0:  t->r = tex_r_1555_tw; miptype = 2; break;
	429	case 1:  t->r = tex_r_1555_n;  miptype = 2; break;
	430	default: t->r = tex_r_1555_vq; miptype = 3; t->address += 0x800; break;
	431	}
	432	break;
	433
	434	case 1: // 565
	435	switch(t->mode) {
	436	case 0:  t->r = tex_r_565_tw; miptype = 2; break;
	437	case 1:  t->r = tex_r_565_n;  miptype = 2; break;
	438	default: t->r = tex_r_565_vq; miptype = 3; t->address += 0x800; break;
	439	}
	440	break;
	441
	442	case 2: // 4444
	443	switch(t->mode) {
	444	case 0:  t->r = tex_r_4444_tw; miptype = 2; break;
	445	case 1:  t->r = tex_r_4444_n;  miptype = 2; break;
	446	default: t->r = tex_r_4444_vq; miptype = 3; t->address += 0x800; break;
	447	}
	448	break;
	449
	450	case 3: // yuv422
	451	switch(t->mode) {
	452	case 0:  /*t->r = tex_r_yuv_tw*/; miptype = -1; break;
	453	case 1:  t->r = tex_r_yuv_n; miptype = -1; break;
	454	default: /*t->r = tex_r_yuv_vq*/; miptype = -1; break;
	455	}
	456	break;
	457
	458	case 4: // bumpmap
	459	break;
	460
	461	case 5: // 4bpp palette
	462	t->palbase = 0x400 | ((t->palette & 0x3f) << 4);
	463	switch(t->mode) {
	464	case 0: case 1:
	465	miptype = 0;
	466
	467	switch(pvrta_regs[PAL_RAM_CTRL]) {
	468	case 0: t->r = tex_r_p4_1555_tw; break;
	469	case 1: t->r = tex_r_p4_565_tw;  break;
	470	case 2: t->r = tex_r_p4_4444_tw; break;
	471	case 3: t->r = tex_r_p4_8888_tw; break;
	472	}
	473	break;
	474	default:
	475	miptype = 3; // ?
	476
	477	switch(pvrta_regs[PAL_RAM_CTRL]) {
	478	case 0: t->r = tex_r_p4_1555_vq; t->address += 0x800; break;
	479	case 1: t->r = tex_r_p4_565_vq;  t->address += 0x800; break;
	480	case 2: t->r = tex_r_p4_4444_vq; t->address += 0x800; break;
	481	case 3: t->r = tex_r_p4_8888_vq; t->address += 0x800; break;
	482	}
	483	break;
	484	}
	485	break;
	486
	487	case 6: // 8bpp palette
	488	t->palbase = 0x400 | ((t->palette & 0x30) << 4);
	489	switch(t->mode) {
	490	case 0: case 1:
	491	miptype = 1;
	492
	493	switch(pvrta_regs[PAL_RAM_CTRL]) {
	494	case 0: t->r = tex_r_p8_1555_tw; break;
	495	case 1: t->r = tex_r_p8_565_tw; break;
	496	case 2: t->r = tex_r_p8_4444_tw; break;
	497	case 3: t->r = tex_r_p8_8888_tw; break;
	498	}
	499	break;
	500	default:
	501	miptype = 3; // ?
	502
	503	switch(pvrta_regs[PAL_RAM_CTRL]) {
	504	case 0: t->r = tex_r_p8_1555_vq; t->address += 0x800; break;
	505	case 1: t->r = tex_r_p8_565_vq;  t->address += 0x800; break;
	506	case 2: t->r = tex_r_p8_4444_vq; t->address += 0x800; break;
	507	case 3: t->r = tex_r_p8_8888_vq; t->address += 0x800; break;
	508	}
	509	break;
	510	}
	511	break;
	512
	513	case 9: // reserved
	514	break;
	515	}
	516
	517	if (t->mipmapped)
	518	{
	519	// full offset tables for reference,
	520	// we don't do mipmapping, so don't use anything < 8x8
	521	// first table is half-bytes
	522
	523	// 4BPP palette textures
	524	// Texture size _4-bit_ offset value for starting address
	525	// 1x1          0x00003
	526	// 2x2          0x00004
	527	// 4x4          0x00008
	528	// 8x8          0x00018
	529	// 16x16        0x00058
	530	// 32x32        0x00158
	531	// 64x64        0x00558
	532	// 128x128      0x01558
	533	// 256x256      0x05558
	534	// 512x512      0x15558
	535	// 1024x1024    0x55558
	536
	537	// 8BPP palette textures
	538	// Texture size Byte offset value for starting address
	539	// 1x1          0x00003
	540	// 2x2          0x00004
	541	// 4x4          0x00008
	542	// 8x8          0x00018
	543	// 16x16        0x00058
	544	// 32x32        0x00158
	545	// 64x64        0x00558
	546	// 128x128      0x01558
	547	// 256x256      0x05558
	548	// 512x512      0x15558
	549	// 1024x1024    0x55558
	550
	551	// Non-palette textures
	552	// Texture size Byte offset value for starting address
	553	// 1x1          0x00006
	554	// 2x2          0x00008
	555	// 4x4          0x00010
	556	// 8x8          0x00030
	557	// 16x16        0x000B0
	558	// 32x32        0x002B0
	559	// 64x64        0x00AB0
	560	// 128x128      0x02AB0
	561	// 256x256      0x0AAB0
	562	// 512x512      0x2AAB0
	563	// 1024x1024    0xAAAB0
	564
	565	// VQ textures
	566	// Texture size Byte offset value for starting address
	567	// 1x1          0x00000
	568	// 2x2          0x00001
	569	// 4x4          0x00002
	570	// 8x8          0x00006
	571	// 16x16        0x00016
	572	// 32x32        0x00056
	573	// 64x64        0x00156
	574	// 128x128      0x00556
	575	// 256x256      0x01556
	576	// 512x512      0x05556
	577	// 1024x1024    0x15556
	578
	579	static const int mipmap_4_8_offset[8] = { 0x00018, 0x00058, 0x00158, 0x00558, 0x01558, 0x05558, 0x15558, 0x55558 };  // 4bpp (4bit offset) / 8bpp (8bit offset)
	580	static const int mipmap_np_offset[8] =  { 0x00030, 0x000B0, 0x002B0, 0x00AB0, 0x02AB0, 0x0AAB0, 0x2AAB0, 0xAAAB0 };  // nonpalette textures
	581	static const int mipmap_vq_offset[8] =  { 0x00006, 0x00016, 0x00056, 0x00156, 0x00556, 0x01556, 0x05556, 0x15556 }; // vq textures
	582
	583	switch (miptype)
	584	{
	585
	586	case 0: // 4bpp
	587	//printf("4bpp\n");
	588	t->address += mipmap_4_8_offset[t->sizes&7]>>1;
	589	break;
	590
	591	case 1: // 8bpp
	592	//printf("8bpp\n");
	593	t->address += mipmap_4_8_offset[t->sizes&7];
	594	break;
	595
	596	case 2: // nonpalette
	597	//printf("np\n");
	598	t->address += mipmap_np_offset[t->sizes&7];
	599	break;
	600
	601	case 3: // vq
	602	//printf("vq\n");
	603	t->address += mipmap_vq_offset[t->sizes&7];
	604	break;
	605	}
	606	}
	607
	608	}
	609
	610	static void tex_get_info(texinfo *ti, pvrta_state *sa)
	611	{
	612	ti->address = sa->textureaddress;
	613	ti->sizex   = sa->textureusize;
	614	ti->sizey   = sa->texturevsize;
	615	ti->mode    = sa->scanorder + sa->vqcompressed*2;
	616	ti->sizes   = sa->texturesizes;
	617	ti->pf      = sa->pixelformat;
	618	ti->mipmapped  = sa->mipmapped;
	619	ti->palette = sa->paletteselector;
	620	tex_prepare(ti);
	621	}
	622
111	623	// register decode helper
112	624	INLINE int decode_reg_64(UINT32 offset, UINT64 mem_mask, UINT64 *shift)
113	625	{
r4679	r4680
154	666	UINT32 pvr_addr;
155	667	UINT32 sys_addr;
156	668	UINT32 size;
	669	UINT8 sel;
157	670	UINT8 dir;
158	671	UINT8 flag;
159	672	UINT8 start;
r4679	r4680
168	681	case SB_PDSTAR: pvr_dma.sys_addr = dat; break;
169	682	case SB_PDLEN: pvr_dma.size = dat; break;
170	683	case SB_PDDIR: pvr_dma.dir = dat & 1; break;
171		case SB_PDTSEL: mame_printf_verbose("PVRCTRL: initiation mode %x\n",dat); break;
	684	case SB_PDTSEL:
	685	pvr_dma.sel = dat & 1;
	686	if(pvr_dma.sel & 1)
	687	printf("Warning: Unsupported irq mode trigger PVR-DMA\n");
	688	break;
172	689	case SB_PDEN: pvr_dma.flag = dat & 1; break;
173	690	case SB_PDST:
174	691	pvr_dma.start = dat & 1;
175		/*We need to know where this is actually used on Naomi, for testing purpose.*/
176		if(pvr_dma.start) { printf("Warning: PVR-DMA start\n"); }
177	692
178	693	if(pvr_dma.flag && pvr_dma.start)
179	694	{
r4679	r4680
181	696	dst = pvr_dma.pvr_addr;
182	697	src = pvr_dma.sys_addr;
183	698	size = 0;
	699
	700	/* used by usagui and sprtjam*/
	701	printf("PVR-DMA start\n");
	702	printf("%08x %08x %08x\n",pvr_dma.pvr_addr,pvr_dma.sys_addr,pvr_dma.size);
	703	printf("src %s dst %08x\n",pvr_dma.dir ? "->" : "<-",pvr_dma.sel);
	704
184	705	/* 0 rounding size = 16 Mbytes */
185	706	if(pvr_dma.size == 0) { pvr_dma.size = 0x100000; }
186	707
r4679	r4680
252	773	dat = (UINT32)(data >> shift);
253	774	old = pvrta_regs[reg];
254	775	pvrta_regs[reg] = dat; // 5f8000+reg*4=dat
	776
255	777	switch (reg)
256	778	{
257	779	case SOFTRESET:
r4679	r4680
418	940	state_ta.grab[state_ta.grabsel].ispbase=pvrta_regs[TA_ISP_BASE];
419	941	state_ta.grab[state_ta.grabsel].busy=0;
420	942	state_ta.grab[state_ta.grabsel].valid=1;
421		state_ta.grab[state_ta.grabsel].testsprites_size=0;
422		state_ta.grab[state_ta.grabsel].testvertices_size=0;
	943	state_ta.grab[state_ta.grabsel].verts_size=0;
	944	state_ta.grab[state_ta.grabsel].strips_size=0;
423	945	break;
424	946	case TA_LIST_CONT:
425	947	#if DEBUG_PVRTA
r4679	r4680
449	971
450	972	*/
451	973
	974	receiveddata *rd = &state_ta.grab[state_ta.grabsel];
	975
452	976	// Para Control
453	977	state_ta.paracontrol=(tafifo_buff[0] >> 24) & 0xff;
454	978	// 0 end of list
r4679	r4680
667	1191	#endif
668	1192	if (state_ta.texture == 1)
669	1193	{
670		#if DEBUG_PVRDLIST
671		mame_printf_verbose(" A(%f,%f) B(%f,%f) C(%f,%f)\n",u2f(tafifo_buff[13] & 0xffff0000),u2f((tafifo_buff[13] & 0xffff) << 16),u2f(tafifo_buff[14] & 0xffff0000),u2f((tafifo_buff[14] & 0xffff) << 16),u2f(tafifo_buff[15] & 0xffff0000),u2f((tafifo_buff[15] & 0xffff) << 16));
672		#endif
	1194	if (rd->verts_size <= 65530)
	1195	{
	1196	strip *ts;
	1197	vert *tv = &rd->verts[rd->verts_size];
	1198	tv[0].x = u2f(tafifo_buff[0x1]);
	1199	tv[0].y = u2f(tafifo_buff[0x2]);
	1200	tv[0].w = u2f(tafifo_buff[0x3]);
	1201	tv[1].x = u2f(tafifo_buff[0x4]);
	1202	tv[1].y = u2f(tafifo_buff[0x5]);
	1203	tv[1].w = u2f(tafifo_buff[0x6]);
	1204	tv[3].x = u2f(tafifo_buff[0x7]);
	1205	tv[3].y = u2f(tafifo_buff[0x8]);
	1206	tv[3].w = u2f(tafifo_buff[0x9]);
	1207	tv[2].x = u2f(tafifo_buff[0xa]);
	1208	tv[2].y = u2f(tafifo_buff[0xb]);
	1209	tv[2].w = tv[0].w+tv[3].w-tv[1].w;
	1210	tv[0].u = u2f(tafifo_buff[0xd] & 0xffff0000);
	1211	tv[0].v = u2f(tafifo_buff[0xd] << 16);
	1212	tv[1].u = u2f(tafifo_buff[0xe] & 0xffff0000);
	1213	tv[1].v = u2f(tafifo_buff[0xe] << 16);
	1214	tv[3].u = u2f(tafifo_buff[0xf] & 0xffff0000);
	1215	tv[3].v = u2f(tafifo_buff[0xf] << 16);
	1216	tv[2].u = tv[0].u+tv[3].u-tv[1].u;
	1217	tv[2].v = tv[0].v+tv[3].v-tv[1].v;
673	1218
674		/* add a sprite to our 'test sprites' list */
675		/* sprites are used for the Naomi Bios logo + text for example */
676		/* -- this is wildly inaccurate! */
677		testsprites* testsprite = &state_ta.grab[state_ta.grabsel].showsprites[state_ta.grab[state_ta.grabsel].testsprites_size];
	1219	ts = &rd->strips[rd->strips_size++];
	1220	tex_get_info(&ts->ti, &state_ta);
	1221	ts->svert = rd->verts_size;
	1222	ts->evert = rd->verts_size + 3;
678	1223
679		/* Sprite Type 1 (for Sprite)
680		0x00 Parameter Control Word (see above)
681		0x04 A.X
682		0x08 A.Y
683		0x0C A.Z
684		0x10 B.X
685		0x14 B.Y
686		0x18 B.Z
687		0x1C C.X
688		0x20 C.Y
689		0x24 C.Z
690		0x28 D.X
691		0x2C D.Y
692		0x30 (ignored) D.Z is calculated from the Plane Equation
693		0x34 AU/AV (16-bits each)
694		0x38 BU/BV (16-bits each)
695		0x3C CU/CV  (16-bits each)
696
697		note: DU/DV is calculated, not specified
698		*/
699
700		testsprite->a.x = u2f(tafifo_buff[0x04/4]);
701		testsprite->a.y = u2f(tafifo_buff[0x08/4]);
702		testsprite->a.z = u2f(tafifo_buff[0x0c/4]);
703		testsprite->b.x = u2f(tafifo_buff[0x10/4]);
704		testsprite->b.y = u2f(tafifo_buff[0x14/4]);
705		testsprite->b.z = u2f(tafifo_buff[0x18/4]);
706		testsprite->c.x = u2f(tafifo_buff[0x1c/4]);
707		testsprite->c.y = u2f(tafifo_buff[0x20/4]);
708		testsprite->c.z = u2f(tafifo_buff[0x24/4]);
709
710		testsprite->d.x = u2f(tafifo_buff[0x28/4]);
711		testsprite->d.y = u2f(tafifo_buff[0x2c/4]);
712		testsprite->d.z = 0.0f;// calculated
713
714		testsprite->a.u = u2f( (tafifo_buff[0x34/4]&0xffff0000) );
715		testsprite->a.v = u2f( (tafifo_buff[0x34/4]&0x0000ffff)<<16);
716		testsprite->b.u = u2f( (tafifo_buff[0x38/4]&0xffff0000) );
717		testsprite->b.v = u2f( (tafifo_buff[0x38/4]&0x0000ffff)<<16);
718		testsprite->c.u = u2f( (tafifo_buff[0x3c/4]&0xffff0000) );
719		testsprite->c.v = u2f( (tafifo_buff[0x3c/4]&0x0000ffff)<<16);
720		testsprite->d.u = 0.0f;// calculated
721		testsprite->d.v = 0.0f;// calculated
722
723		/*
724		printf("Sending a sprite with\n%f %f %f - %f %f\n %f %f %f - %f %f\n%f %f %f - %f %f\n%f %f %f - %f %f\n",
725		testsprite->a.x, testsprite->a.y, testsprite->a.z, testsprite->a.u, testsprite->a.v,
726		testsprite->b.x, testsprite->b.y, testsprite->b.z, testsprite->b.u, testsprite->b.v,
727		testsprite->c.x, testsprite->c.y, testsprite->c.z, testsprite->c.u, testsprite->c.v,
728		testsprite->d.x, testsprite->d.y, testsprite->d.z, testsprite->d.u, testsprite->d.v);
729		*/
730
731		/*
732		horizontal test mode
733		224.000000 224.000000 999.999939 - 0.000000 0.609375
734		232.000000 224.000000 999.999939 - 1.000000 0.609375
735		232.000000 232.000000 999.999939 - 1.000000 0.617188
736		224.000000 232.000000
737		should calculate      999.999939 - 0.000000 0.617188
738
739
740		vertical test mode
741		8.000000 184.000000 999.999939 - 0.000000 0.617188
742		16.000000 184.000000 999.999939 - 0.000000 0.609375
743		16.000000 192.000000 999.999939 - 1.000000 0.609375
744		8.000000 192.000000
745		should calculate      999.999939 - 1.000000 0.617188
746		*/
747
748		// old code, used for the test drawing
749		testsprite->positionx=testsprite->a.x;
750		testsprite->positiony=testsprite->a.y;
751		testsprite->sizex=u2f(tafifo_buff[4])-u2f(tafifo_buff[1]);
752		testsprite->sizey=u2f(tafifo_buff[8])-u2f(tafifo_buff[2]);
753		testsprite->u=u2f(tafifo_buff[13] & 0xffff0000);
754		testsprite->v=u2f((tafifo_buff[13] & 0xffff) << 16);
755		testsprite->du=u2f(tafifo_buff[14] & 0xffff0000)-testsprite->u;
756		testsprite->dv=u2f((tafifo_buff[15] & 0xffff) << 16)-testsprite->v;
757		testsprite->textureaddress=state_ta.textureaddress;
758		testsprite->texturesizex=state_ta.textureusize;
759		testsprite->texturesizey=state_ta.texturevsize;
760		testsprite->texturemode=state_ta.scanorder+state_ta.vqcompressed*2;
761		testsprite->texturesizes=state_ta.texturesizes;
762		testsprite->texturepf=state_ta.pixelformat;
763		testsprite->texturepalette=state_ta.paletteselector;
764
765		state_ta.grab[state_ta.grabsel].testsprites_size++;
	1224	rd->verts_size += 4;
	1225	}
766	1226	}
767	1227	}
768	1228	else if (state_ta.global_paratype == 4)
769	1229	{
770	1230	#if DEBUG_PVRDLIST
771	1231	mame_printf_verbose(" Vertex polygon");
772		mame_printf_verbose(" V(%f,%f,%f)", u2f(tafifo_buff[1]), u2f(tafifo_buff[2]), u2f(tafifo_buff[3]));
	1232	mame_printf_verbose(" V(%f,%f,%f) T(%f,%f)", u2f(tafifo_buff[1]), u2f(tafifo_buff[2]), u2f(tafifo_buff[3]), u2f(tafifo_buff[4]), u2f(tafifo_buff[5]));
773	1233	mame_printf_verbose("\n");
774	1234	#endif
775		#if DEBUG_VERTICES
776		if (state_ta.grab[state_ta.grabsel].testvertices_size <= 65530)
	1235	if (rd->verts_size <= 65530)
777	1236	{
778		/* add a vertex to our 'testverticies' list */
	1237	/* add a vertex to our list */
779	1238	/* this is used for 3d stuff, ie most of the graphics (see guilty gear, confidential mission, maze of the kings etc.) */
780	1239	/* -- this is also wildly inaccurate! */
781		testvertices* testvertex = &state_ta.grab[state_ta.grabsel].showvertices[state_ta.grab[state_ta.grabsel].testvertices_size];
	1240	vert *tv = &rd->verts[rd->verts_size];
782	1241
783		testvertex->x=u2f(tafifo_buff[1]);
784		testvertex->y=u2f(tafifo_buff[2]);
785		testvertex->endofstrip=state_ta.endofstrip;
	1242	tv->x=u2f(tafifo_buff[1]);
	1243	tv->y=u2f(tafifo_buff[2]);
	1244	tv->w=u2f(tafifo_buff[3]);
	1245	tv->u=u2f(tafifo_buff[4]);
	1246	tv->v=u2f(tafifo_buff[5]);
	1247
	1248	if((!rd->strips_size) ||
	1249	rd->strips[rd->strips_size-1].evert != -1)
	1250	{
	1251	strip *ts = &rd->strips[rd->strips_size++];
	1252	tex_get_info(&ts->ti, &state_ta);
	1253	ts->svert = rd->verts_size;
	1254	ts->evert = -1;
	1255	}
	1256	if(state_ta.endofstrip)
	1257	rd->strips[rd->strips_size-1].evert = rd->verts_size;
	1258	rd->verts_size++;
786	1259	}
787		state_ta.grab[state_ta.grabsel].testvertices_size++;
788		#endif
789	1260	}
790	1261	}
791	1262	}
r4679	r4680
875	1346	dilatechose[(b << 3) + a]=3+(a < b ? a : b);
876	1347	}
877	1348
878		#if DEBUG_VERTICES
	1349	void render_hline(bitmap_t *bitmap, texinfo *ti, int y, float xl, float xr, float ul, float ur, float vl, float vr, float wl, float wr)
	1350	{
	1351	int xxl, xxr;
	1352	float dx, dudx, dvdx, dwdx;
	1353	UINT32 *tdata;
	1354	float *wbufline;
879	1355
	1356	if(xr < 0 || xl >= 640)
	1357	return;
880	1358
881		INLINE void testdrawline(bitmap_t *bitmap, testvertices* from, testvertices* to)
882		{
883		UINT32 *bmpaddr;
884		int ix, iy, i, inc, x, y, dx, dy, plotx, ploty;
885		int dxix, dyiy;
886		render_bounds line, clip;
	1359	xxl = (int)xl;
	1360	xxr = (int)xr;
887	1361
888		clip.x0=0;
889		clip.y0=0;
890		clip.x1=639;
891		clip.y1=479;
892		line.x0=from->x;
893		line.y0=from->y;
894		line.x1=to->x;
895		line.y1=to->y;
896		if (render_clip_line(&line, &clip))
	1362	if(xxl == xxr)
897	1363	return;
898		dx=line.x1-line.x0;
899		dy=line.y1-line.y0;
900		plotx=line.x0;
901		ploty=line.y0;
902		ix = abs(dx);
903		iy = abs(dy);
904		inc = MAX(ix,iy);
905		x = y = 0;
906		dxix = (dx ? dx/ix : 0);
907		dyiy = (dy ? dy/iy : 0);
908	1364
909		for (i=0; i <= inc; ++i)
910		{
911		x += ix;  y += iy;
	1365	dx = xr-xl;
	1366	dudx = (ur-ul)/dx;
	1367	dvdx = (vr-vl)/dx;
	1368	dwdx = (wr-wl)/dx;
912	1369
913		if (x > inc)
914		{
915		x -= inc;
916		plotx += dxix;
917		bmpaddr = BITMAP_ADDR32(bitmap,ploty,plotx);
918		*bmpaddr = MAKE_RGB(0, 0, 255);
	1370	if(xl < 0) {
	1371	ul += -dudx*xl;
	1372	vl += -dvdx*xl;
	1373	wl += -dwdx*xl;
	1374	xxl = 0;
	1375	} else {
	1376	float dt = xxl - xl;
	1377	ul += dudx*dt;
	1378	vl += dvdx*dt;
	1379	wl += dwdx*dt;
	1380	}
	1381
	1382	// Target the pixel center
	1383	ul += 0.5*dudx;
	1384	vl += 0.5*dvdx;
	1385	wl += 0.5*dwdx;
	1386
	1387	if(xxr > 640)
	1388	xxr = 640;
	1389
	1390	tdata = BITMAP_ADDR32(bitmap, y, xxl);
	1391	wbufline = &wbuffer[y][xxl];
	1392
	1393	while(xxl < xxr) {
	1394	if((wl > *wbufline)) {
	1395	UINT32 c;
	1396	float u = ul/wl;
	1397	float v = vl/wl;
	1398
	1399	c = ti->r(ti, u, v);
	1400
	1401	if((c & 0xff000000) == 0xff000000) {
	1402	*wbufline = wl;
	1403	*tdata = c;
	1404	} else if(c & 0xff000000) {
	1405	int a = (c >> 24)+1;
	1406	int ca = 256-a;
	1407	UINT32 c2 = *tdata;
	1408	*tdata = ((((c & 0xff00ff)*a + (c2 & 0xff00ff)*ca) & 0xff00ff00) |
	1409	(((c & 0xff00)*a + (c2 & 0xff00)*ca) & 0xff0000)) >> 8;
	1410	}
919	1411	}
920		if (y > inc)
921		{
922		y -= inc;
923		ploty += dyiy;
924		bmpaddr = BITMAP_ADDR32(bitmap,ploty,plotx);
925		*bmpaddr = MAKE_RGB(0, 0, 255);
926		}
	1412	wbufline++;
	1413	tdata++;
	1414
	1415	ul += dudx;
	1416	vl += dvdx;
	1417	wl += dwdx;
	1418	xxl ++;
927	1419	}
928	1420	}
929	1421
930		INLINE void testdrawpoly(bitmap_t *bitmap, testvertices **v)
	1422	void render_span(bitmap_t *bitmap, texinfo *ti,
	1423	int y0, int y1, float adj,
	1424	float *xl, float *xr,
	1425	float *ul, float *ur,
	1426	float *vl, float *vr,
	1427	float *wl, float *wr,
	1428	float dxldy, float dxrdy,
	1429	float duldy, float durdy,
	1430	float dvldy, float dvrdy,
	1431	float dwldy, float dwrdy)
931	1432	{
932		testdrawline(bitmap,v[0],v[1]);
933		testdrawline(bitmap,v[1],v[2]);
934		testdrawline(bitmap,v[2],v[0]);
	1433	if(y1 > 480)
	1434	y1 = 480;
	1435	if(y1 <= 0) {
	1436	*xl += dxldy*(y1-y0);
	1437	*xr += dxrdy*(y1-y0);
	1438	*ul += duldy*(y1-y0);
	1439	*ur += durdy*(y1-y0);
	1440	*vl += dvldy*(y1-y0);
	1441	*vr += dvrdy*(y1-y0);
	1442	*wl += dwldy*(y1-y0);
	1443	*wr += dwrdy*(y1-y0);
	1444	return;
	1445	}
	1446	if(y0 < 0) {
	1447	*xl += -dxldy*y0;
	1448	*xr += -dxrdy*y0;
	1449	*ul += -duldy*y0;
	1450	*ur += -durdy*y0;
	1451	*vl += -dvldy*y0;
	1452	*vr += -dvrdy*y0;
	1453	*wl += -dwldy*y0;
	1454	*wr += -dwrdy*y0;
	1455	y0 = 0;
	1456	}
	1457
	1458	if(adj) {
	1459	*xl += adj*dxldy;
	1460	*xr += adj*dxrdy;
	1461	*ul += adj*duldy;
	1462	*ur += adj*durdy;
	1463	*vl += adj*dvldy;
	1464	*vr += adj*dvrdy;
	1465	*wl += adj*dwldy;
	1466	*wr += adj*dwrdy;
	1467	}
	1468	while(y0 < y1) {
	1469	render_hline(bitmap, ti, y0, *xl, *xr, *ul, *ur, *vl, *vr, *wl, *wr);
	1470
	1471	*xl += dxldy;
	1472	*xr += dxrdy;
	1473	*ul += duldy;
	1474	*ur += durdy;
	1475	*vl += dvldy;
	1476	*vr += dvrdy;
	1477	*wl += dwldy;
	1478	*wr += dwrdy;
	1479	y0 ++;
	1480	}
935	1481	}
936	1482
	1483	static void sort_vertices(const vert *v, int *i0, int *i1, int *i2)
	1484	{
	1485	float miny, maxy;
	1486	int imin, imax, imid;
	1487	miny = maxy = v[0].y;
	1488	imin = imax = 0;
937	1489
938		#endif
	1490	if(miny > v[1].y) {
	1491	miny = v[1].y;
	1492	imin = 1;
	1493	} else if(maxy < v[1].y) {
	1494	maxy = v[1].y;
	1495	imax = 1;
	1496	}
939	1497
940		#if 0
941		INLINE UINT32 alpha_blend_r16_565(UINT32 d, UINT32 s, UINT8 level)
	1498	if(miny > v[2].y) {
	1499	miny = v[2].y;
	1500	imin = 2;
	1501	} else if(maxy < v[2].y) {
	1502	maxy = v[2].y;
	1503	imax = 2;
	1504	}
	1505
	1506	imid = (imin == 0 || imax == 0) ? (imin == 1 || imax == 1) ? 2 : 1 : 0;
	1507
	1508	*i0 = imin;
	1509	*i1 = imid;
	1510	*i2 = imax;
	1511	}
	1512
	1513
	1514	static void render_tri_sorted(bitmap_t *bitmap, texinfo *ti, const vert *v0, const vert *v1, const vert *v2)
942	1515	{
943		int alphad = 256 - level;
944		return ((((s & 0x001f) * level + (d & 0x001f) * alphad) >> 8)) |
945		((((s & 0x07e0) * level + (d & 0x07e0) * alphad) >> 8) & 0x07e0) |
946		((((s & 0xf800) * level + (d & 0xf800) * alphad) >> 8) & 0xf800);
	1516	int y0, y1, y2;
	1517	float dy01, dy02, dy12;
	1518	float dy;
	1519
	1520	float dx01dy, dx02dy, dx12dy, du01dy, du02dy, du12dy, dv01dy, dv02dy, dv12dy, dw01dy, dw02dy, dw12dy;
	1521
	1522	float xl, xr, ul, ur, vl, vr, wl, wr;
	1523
	1524	if(v0->y >= 480 || v2->y < 0)
	1525	return;
	1526
	1527	y0 = (int)(v0->y);
	1528	y1 = (int)(v1->y);
	1529	y2 = (int)(v2->y);
	1530
	1531	dy01 = y1-y0;
	1532	dy02 = y2-y0;
	1533	dy12 = y2-y1;
	1534
	1535	dx01dy = dy01 ? (v1->x-v0->x)/dy01 : 0;
	1536	dx02dy = dy02 ? (v2->x-v0->x)/dy02 : 0;
	1537	dx12dy = dy12 ? (v2->x-v1->x)/dy12 : 0;
	1538
	1539	du01dy = dy01 ? (v1->u-v0->u)/dy01 : 0;
	1540	du02dy = dy02 ? (v2->u-v0->u)/dy02 : 0;
	1541	du12dy = dy12 ? (v2->u-v1->u)/dy12 : 0;
	1542
	1543	dv01dy = dy01 ? (v1->v-v0->v)/dy01 : 0;
	1544	dv02dy = dy02 ? (v2->v-v0->v)/dy02 : 0;
	1545	dv12dy = dy12 ? (v2->v-v1->v)/dy12 : 0;
	1546
	1547	dw01dy = dy01 ? (v1->w-v0->w)/dy01 : 0;
	1548	dw02dy = dy02 ? (v2->w-v0->w)/dy02 : 0;
	1549	dw12dy = dy12 ? (v2->w-v1->w)/dy12 : 0;
	1550
	1551	// Target the pixel center
	1552	dy = (y0-v0->y) + 0.5;
	1553
	1554	xl = v0->x;
	1555	xr = v0->x;
	1556	ul = v0->u;
	1557	ur = v0->u;
	1558	vl = v0->v;
	1559	vr = v0->v;
	1560	wl = v0->w;
	1561	wr = v0->w;
	1562
	1563	if(!dy01) {
	1564	if(!dy12)
	1565	return;
	1566	if(v1->x > v0->x) {
	1567	xr = v1->x;
	1568	ur = v1->u;
	1569	vr = v1->v;
	1570	wr = v1->w;
	1571	render_span(bitmap, ti, y1, y2, dy, &xl, &xr, &ul, &ur, &vl, &vr, &wl, &wr, dx02dy, dx12dy, du02dy, du12dy, dv02dy, dv12dy, dw02dy, dw12dy);
	1572	} else {
	1573	xl = v1->x;
	1574	ul = v1->u;
	1575	vl = v1->v;
	1576	wl = v1->w;
	1577	render_span(bitmap, ti, y1, y2, dy, &xl, &xr, &ul, &ur, &vl, &vr, &wl, &wr, dx12dy, dx02dy, du12dy, du02dy, dv12dy, dv02dy, dw12dy, dw02dy);
	1578	}
	1579	} else if(!dy12) {
	1580	if(v2->x > v1->x)
	1581	render_span(bitmap, ti, y0, y1, dy, &xl, &xr, &ul, &ur, &vl, &vr, &wl, &wr, dx01dy, dx02dy, du01dy, du02dy, dv01dy, dv02dy, dw01dy, dw02dy);
	1582	else
	1583	render_span(bitmap, ti, y0, y1, dy, &xl, &xr, &ul, &ur, &vl, &vr, &wl, &wr, dx02dy, dx01dy, du02dy, du01dy, dv02dy, dv01dy, dw02dy, dw01dy);
	1584	} else {
	1585	if(dx01dy < dx02dy) {
	1586	render_span(bitmap, ti, y0, y1, dy, &xl, &xr, &ul, &ur, &vl, &vr, &wl, &wr, dx01dy, dx02dy, du01dy, du02dy, dv01dy, dv02dy, dw01dy, dw02dy);
	1587	render_span(bitmap, ti, y1, y2,  0, &xl, &xr, &ul, &ur, &vl, &vr, &wl, &wr, dx12dy, dx02dy, du12dy, du02dy, dv12dy, dv02dy, dw12dy, dw02dy);
	1588	} else {
	1589	render_span(bitmap, ti, y0, y1, dy, &xl, &xr, &ul, &ur, &vl, &vr, &wl, &wr, dx02dy, dx01dy, du02dy, du01dy, dv02dy, dv01dy, dw02dy, dw01dy);
	1590	render_span(bitmap, ti, y1, y2,  0, &xl, &xr, &ul, &ur, &vl, &vr, &wl, &wr, dx02dy, dx12dy, du02dy, du12dy, dv02dy, dv12dy, dw02dy, dw12dy);
	1591	}
	1592	}
947	1593	}
948		#endif
949	1594
950		/// !!
	1595	static void render_tri(bitmap_t *bitmap, texinfo *ti, const vert *v)
	1596	{
	1597	int i0, i1, i2;
951	1598
	1599	sort_vertices(v, &i0, &i1, &i2);
	1600	render_tri_sorted(bitmap, ti, v+i0, v+i1, v+i2);
	1601	}
	1602
952	1603	static void testdrawscreen(const running_machine *machine,bitmap_t *bitmap,const rectangle *cliprect)
953	1604	{
954
955		const address_space *space = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM);
956		int cs,x,y,dx,dy,xi,yi,a,rs,ns;
957		float iu,iv,u,v;
958		UINT32 addrp;
959		UINT32 *bmpaddr;
960		int xt,yt,cd;
	1605	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	1606	int cs,rs,ns;
961	1607	UINT32 c;
962	1608	#if 0
963	1609	int stride;
r4679	r4680
996	1642	}
997	1643	#endif
998	1644
999		ns=state_ta.grab[rs].testsprites_size;
	1645	ns=state_ta.grab[rs].strips_size;
	1646	if(ns)
	1647	memset(wbuffer, 0x00, sizeof(wbuffer));
	1648
1000	1649	for (cs=0;cs < ns;cs++)
1001	1650	{
1002		dx=state_ta.grab[rs].showsprites[cs].sizex;
1003		dy=state_ta.grab[rs].showsprites[cs].sizey;
1004		iu=state_ta.grab[rs].showsprites[cs].du/dx;
1005		iv=state_ta.grab[rs].showsprites[cs].dv/dy;
1006		cd=dilatechose[state_ta.grab[rs].showsprites[cs].texturesizes];
	1651	strip *ts = &state_ta.grab[rs].strips[cs];
	1652	int sv = ts->svert;
	1653	int ev = ts->evert;
	1654	int i;
	1655	if(ev == -1)
	1656	continue;
1007	1657
1008		if ((state_ta.grab[rs].showsprites[cs].positionx+dx) > 640)
1009		dx=640-state_ta.grab[rs].showsprites[cs].positionx;
1010		if ((state_ta.grab[rs].showsprites[cs].positiony+dy) > 480)
1011		dy=480-state_ta.grab[rs].showsprites[cs].positiony;
1012		xi=0;
1013		yi=0;
1014
1015		if (state_ta.grab[rs].showsprites[cs].positionx < 0)
1016		xi=-state_ta.grab[rs].showsprites[cs].positionx;
1017		if (state_ta.grab[rs].showsprites[cs].positiony < 0)
1018		yi=-state_ta.grab[rs].showsprites[cs].positiony;
1019
1020		for (y = yi;y < dy;y++)
	1658	for(i=sv; i <= ev; i++)
1021	1659	{
1022		for (x = xi;x < dx;x++)
1023		{
1024		// find the coordinates
1025		u=state_ta.grab[rs].showsprites[cs].u+iu*x;
1026		v=state_ta.grab[rs].showsprites[cs].v+iv*y;
1027		yt=v*(state_ta.grab[rs].showsprites[cs].texturesizey-1);
1028		xt=u*(state_ta.grab[rs].showsprites[cs].texturesizex-1);
1029
1030		a=255;
1031		switch (state_ta.grab[rs].showsprites[cs].texturepf)
1032		{
1033		case 0: // 1555
1034		// find the address
1035		if (state_ta.grab[rs].showsprites[cs].texturemode == 1)
1036		addrp=state_ta.grab[rs].showsprites[cs].textureaddress+(state_ta.grab[rs].showsprites[cs].texturesizex*yt+xt)*2;
1037		else if (state_ta.grab[rs].showsprites[cs].texturemode == 0) // twiddled
1038		addrp=state_ta.grab[rs].showsprites[cs].textureaddress+(dilated1[cd][xt] + dilated0[cd][yt])*2;
1039		else // vq-compressed
1040		{
1041		c=0x800+(dilated1[cd][xt >> 1] + dilated0[cd][yt >> 1]);
1042		c=*(((UINT8 *)dc_texture_ram) + BYTE_XOR_LE(state_ta.grab[rs].showsprites[cs].textureaddress+c));
1043		addrp=state_ta.grab[rs].showsprites[cs].textureaddress+c*8+(dilated1[cd][xt & 1] + dilated0[cd][yt & 1])*2;
1044		}
1045		// read datum
1046		c=*(((UINT16 *)dc_texture_ram) + (WORD2_XOR_LE(addrp) >> 1));
1047		// find the color and draw
1048		a=(((c & 0x8000) >> 8)*255)/0x80;
1049		c=MAKE_RGB((c&0x7c00) >> 7, (c&0x3e0) >> 2, (c&0x1f) << 3);
1050		break;
1051		case 1: // 565
1052		// find the address
1053		if (state_ta.grab[rs].showsprites[cs].texturemode == 1)
1054		addrp=state_ta.grab[rs].showsprites[cs].textureaddress+(state_ta.grab[rs].showsprites[cs].texturesizex*yt+xt)*2;
1055		else if (state_ta.grab[rs].showsprites[cs].texturemode == 0) // twiddled
1056		addrp=state_ta.grab[rs].showsprites[cs].textureaddress+(dilated1[cd][xt] + dilated0[cd][yt])*2;
1057		else // vq-compressed
1058		{
1059		c=0x800+(dilated1[cd][xt >> 1] + dilated0[cd][yt >> 1]);
1060		c=*(((UINT8 *)dc_texture_ram) + BYTE_XOR_LE(state_ta.grab[rs].showsprites[cs].textureaddress+c));
1061		addrp=state_ta.grab[rs].showsprites[cs].textureaddress+c*8+(dilated1[cd][xt & 1] + dilated0[cd][yt & 1])*2;
1062		}
1063		// read datum
1064		c=*(((UINT16 *)dc_texture_ram) + (WORD2_XOR_LE(addrp) >> 1));
1065		// find the color and draw
1066		a=255;
1067		c=MAKE_RGB((c&0xf800) >> 8, (c&0x7e0) >> 3, (c&0x1f) << 3);
1068		break;
1069		case 2: // 4444
1070		// find the address
1071		if (state_ta.grab[rs].showsprites[cs].texturemode == 1)
1072		addrp=state_ta.grab[rs].showsprites[cs].textureaddress+(state_ta.grab[rs].showsprites[cs].texturesizex*yt+xt)*2;
1073		else if (state_ta.grab[rs].showsprites[cs].texturemode == 0) // twiddled
1074		addrp=state_ta.grab[rs].showsprites[cs].textureaddress+(dilated1[cd][xt] + dilated0[cd][yt])*2;
1075		else // vq-compressed
1076		{
1077		c=0x800+(dilated1[cd][xt >> 1] + dilated0[cd][yt >> 1]);
1078		c=*(((UINT8 *)dc_texture_ram) + BYTE_XOR_LE(state_ta.grab[rs].showsprites[cs].textureaddress+c));
1079		addrp=state_ta.grab[rs].showsprites[cs].textureaddress+c*8+(dilated1[cd][xt & 1] + dilated0[cd][yt & 1])*2;
1080		}
1081		// read datum
1082		c=*(((UINT16 *)dc_texture_ram) + (WORD2_XOR_LE(addrp) >> 1));
1083		// find the color and draw
1084		a=(((c & 0xf000) >> 8)*255)/0xf0;
1085		c=MAKE_RGB((c&0xf00) >> 4, c&0xf0, (c&0xf) << 4);
1086		break;
1087		case 3: // yuv422
1088		break;
1089		case 4: // bumpmap
1090		break;
1091		case 5: // 4 bpp palette
1092		if (state_ta.grab[rs].showsprites[cs].texturemode & 2) // vq-compressed
1093		{
1094		c=0x800+(dilated1[cd][xt >> 1] + dilated0[cd][yt >> 2]);
1095		c=*(((UINT8 *)dc_texture_ram) + BYTE_XOR_LE(state_ta.grab[rs].showsprites[cs].textureaddress+c));
1096		addrp=state_ta.grab[rs].showsprites[cs].textureaddress+c*8+(dilated1[cd][xt & 1] + dilated0[cd][yt & 3]);
1097		}
1098		else
1099		{
1100		addrp=state_ta.grab[rs].showsprites[cs].textureaddress+(dilated1[cd][xt] + dilated0[cd][yt]);
1101		}
1102		c=*(((UINT8 *)dc_texture_ram) + BYTE_XOR_LE(addrp));
1103		c=((state_ta.grab[rs].showsprites[cs].texturepalette & 0x3f) << 4) + (c & 0xf);
1104		c=pvrta_regs[0x1000/4+c];
1105		switch (pvrta_regs[PAL_RAM_CTRL])
1106		{
1107		case 0: // argb1555
1108		a=(((c & 0x8000) >> 8)*255)/0x80;
1109		c=MAKE_RGB((c&0x7c00) >> 7, (c&0x3e0) >> 2, (c&0x1f) << 3);
1110		break;
1111		case 1: // rgb565
1112		a=255;
1113		c=MAKE_RGB((c&0xf800) >> 8, (c&0x7e0) >> 3, (c&0x1f) << 3);
1114		break;
1115		case 2: // argb4444
1116		a=(((c & 0xf000) >> 8)*255)/0xf0;
1117		c=MAKE_RGB((c&0xf00) >> 4, c&0xf0, (c&0xf) << 4);
1118		break;
1119		case 3: // argb8888
1120		a=(c & 0xff000000) >> 24;
1121		c=MAKE_RGB((c&0xff0000) >> 16, (c&0xff00) >> 8, c&0xff);
1122		break;
1123		}
1124		break;
1125		case 6: // 8 bpp palette
1126		if (state_ta.grab[rs].showsprites[cs].texturemode & 2) // vq-compressed
1127		{
1128		c=0x800+(dilated1[cd][xt >> 1] + dilated0[cd][yt >> 2]);
1129		c=*(((UINT8 *)dc_texture_ram) + BYTE_XOR_LE(state_ta.grab[rs].showsprites[cs].textureaddress+c));
1130		addrp=state_ta.grab[rs].showsprites[cs].textureaddress+c*8+(dilated1[cd][xt & 1] + dilated0[cd][yt & 3]);
1131		}
1132		else
1133		{
1134		addrp=state_ta.grab[rs].showsprites[cs].textureaddress+(dilated1[cd][xt] + dilated0[cd][yt]);
1135		}
1136		c=*(((UINT8 *)dc_texture_ram) + BYTE_XOR_LE(addrp));
1137		c=((state_ta.grab[rs].showsprites[cs].texturepalette & 0x30) << 4) | c;
1138		c=pvrta_regs[0x1000/4+c];
1139		switch (pvrta_regs[PAL_RAM_CTRL])
1140		{
1141		case 0: // argb1555
1142		a=(((c & 0x8000) >> 8)*255)/0x80;
1143		c=MAKE_RGB((c&0x7c00) >> 7, (c&0x3e0) >> 2, (c&0x1f) << 3);
1144		break;
1145		case 1: // rgb565
1146		a=255;
1147		c=MAKE_RGB((c&0xf800) >> 8, (c&0x7e0) >> 3, (c&0x1f) << 3);
1148		break;
1149		case 2: // argb4444
1150		a=(((c & 0xf000) >> 8)*255)/0xf0;
1151		c=MAKE_RGB((c&0xf00) >> 4, c&0xf0, (c&0xf) << 4);
1152		break;
1153		case 3: // argb8888
1154		a=(c & 0xff000000) >> 24;
1155		c=MAKE_RGB((c&0xff0000) >> 16, (c&0xff00) >> 8, c&0xff);
1156		break;
1157		}
1158		break;
1159		case 7: // reserved
1160		break;
1161		} // switch
1162		bmpaddr=BITMAP_ADDR32(bitmap,state_ta.grab[rs].showsprites[cs].positiony+y,state_ta.grab[rs].showsprites[cs].positionx+x);
1163		*bmpaddr = alpha_blend_r32(*bmpaddr, c, a);
1164		#if 0
1165		// write into framebuffer
1166		switch (pvrta_regs[FB_W_CTRL] & 7)
1167		{
1168		case 0: // 0555 KRGB 16 bit
1169		k=pvrta_regs[FB_W_CTRL] & 0x8000;
1170		addrp=state_ta.grab[s].fbwsof1+(state_ta.grab[s].showsprites[cs].positiony+y)*stride+(state_ta.grab[s].showsprites[cs].positionx+x)*2;
1171		bmpaddr16=((UINT16 *)dc_texture_ram) + (WORD2_XOR_LE(addrp) >> 1);
1172		*bmpaddr16=k | alpha_blend_r16(*bmpaddr16,((c & 0xf80000) >> 9) | ((c & 0xf800) >> 6) | ((c & 0xf8) >> 3),a);
1173		break;
1174		case 1: // 565 RGB 16 bit
1175		addrp=state_ta.grab[rs].fbwsof1+(state_ta.grab[rs].showsprites[cs].positiony+y)*stride+(state_ta.grab[rs].showsprites[cs].positionx+x)*2;
1176		bmpaddr16=((UINT16 *)dc_texture_ram) + (WORD2_XOR_LE(addrp) >> 1);
1177		//*bmpaddr16=alpha_blend_r16_565(*bmpaddr16,((c & 0xf80000) >> 8) | ((c & 0xfc00) >> 5) | ((c & 0xf8) >> 3),a);
1178		*bmpaddr16=((c & 0xf80000) >> 8) | ((c & 0xfc00) >> 5) | ((c & 0xf8) >> 3);
1179		break;
1180		case 2: // 4444 ARGB 16 bit
1181		break;
1182		case 3: // 1555 ARGB 16 bit
1183		break;
1184		case 4: // 888 RGB 24 bit packed
1185		break;
1186		case 5: // 0888 KRGB 32 bit
1187		break;
1188		case 6: // 8888 ARGB 32 bit
1189		break;
1190		case 7: // reserved
1191		break;
1192		} // switch
1193		#endif
1194		}
	1660	vert *tv = state_ta.grab[rs].verts + i;
	1661	tv->u = tv->u * ts->ti.sizex * tv->w;
	1662	tv->v = tv->v * ts->ti.sizey * tv->w;
1195	1663	}
1196	1664
1197		#if 1
1198		// test--draw the verts fore each quad as polys too
1199		{
1200		testvertices vv[4];
1201		testvertices* v[3];
1202
1203		vv[0].x = state_ta.grab[rs].showsprites[cs].a.x;
1204		vv[0].y = state_ta.grab[rs].showsprites[cs].a.y;
1205		vv[1].x = state_ta.grab[rs].showsprites[cs].b.x;
1206		vv[1].y = state_ta.grab[rs].showsprites[cs].b.y;
1207		vv[2].x = state_ta.grab[rs].showsprites[cs].c.x;
1208		vv[2].y = state_ta.grab[rs].showsprites[cs].c.y;
1209		vv[3].x = state_ta.grab[rs].showsprites[cs].d.x;
1210		vv[3].y = state_ta.grab[rs].showsprites[cs].d.y;
1211
1212		v[0] = &vv[0];
1213		v[1] = &vv[1];
1214		v[2] = &vv[2];
1215		testdrawpoly(bitmap,v);
1216		v[0] = &vv[0];
1217		v[1] = &vv[2];
1218		v[2] = &vv[3];
1219		testdrawpoly(bitmap,v);
1220		}
1221		#endif
	1665	for(i=sv; i <= ev-2; i++)
	1666	render_tri(bitmap, &ts->ti, state_ta.grab[rs].verts + i);
1222	1667	}
1223	1668	state_ta.grab[rs].busy=0;
1224		#if DEBUG_VERTICES
1225		a = state_ta.grab[rs].testvertices_size;
1226		if (a > 65530)
1227		a = 65530;
1228
1229		cs = 0;
1230
1231		while (cs<a)
1232		{
1233		testvertices *v[3];
1234
1235		v[0] = &state_ta.grab[rs].showvertices[cs]; cs++;
1236		v[1] = &state_ta.grab[rs].showvertices[cs]; cs++;
1237		v[2] = &state_ta.grab[rs].showvertices[cs]; cs++;
1238
1239		testdrawpoly(bitmap,v);
1240
1241		if (v[2]->endofstrip==0)
1242		{
1243		cs-=2;
1244		}
1245		}
1246		#endif
1247	1669	}
1248	1670
1249	1671	#if 0
r4679	r4680
1454	1876	timer_adjust_oneshot(endofrender_timer_tsp, attotime_never, 0);
1455	1877	timer_adjust_oneshot(endofrender_timer_video, attotime_never, 0);
1456	1878
1457		fakeframebuffer_bitmap = auto_bitmap_alloc(1024,1024,BITMAP_FORMAT_RGB32);
	1879	fakeframebuffer_bitmap = auto_bitmap_alloc(machine,1024,1024,BITMAP_FORMAT_RGB32);
1458	1880
1459	1881	}
1460	1882
r4679	r4680
1483	1905	#endif
1484	1906
1485	1907	// copy our fake framebuffer bitmap (where things have been rendered) to the screen
1486		for (y = visarea->min_y ; y < visarea->max_y ; y++)
	1908	for (y = visarea->min_y ; y <= visarea->max_y ; y++)
1487	1909	{
1488		for (x = visarea->min_x ; x < visarea->max_x ; x++)
	1910	for (x = visarea->min_x ; x <= visarea->max_x ; x++)
1489	1911	{
1490	1912	UINT32* src = BITMAP_ADDR32(fakeframebuffer_bitmap, y, x);
1491	1913	UINT32* dst = BITMAP_ADDR32(bitmap, y, x);
r4679	r4680
1502	1924
1503	1925	dc_sysctrl_regs[SB_ISTNRM] |= IST_VBL_IN; // V Blank-in interrupt
1504	1926	dc_update_interrupt_status(machine);
	1927	vblc++;
1505	1928
1506	1929	timer_adjust_oneshot(vbout_timer, video_screen_get_time_until_pos(machine->primary_screen, 0, 0), 0);
1507	1930	}

src/mame/video/mole.c

r4679	r4680
29	29
30	30	VIDEO_START( mole )
31	31	{
32		tileram = (UINT16 *)auto_malloc(0x400 * sizeof(UINT16));
	32	tileram = auto_alloc_array(machine, UINT16, 0x400);
33	33
34	34	bg_tilemap = tilemap_create(machine, get_bg_tile_info, tilemap_scan_rows, 8, 8, 40, 25);
35	35	}

src/mame/video/jagobj.c

r4679	r4680
24	24	*
25	25	*************************************/
26	26
27		void jagobj_init(void)
	27	void jagobj_init(running_machine *machine)
28	28	{
29	29	int i;
30	30
31	31	/* allocate memory for tables */
32		blend_y = auto_malloc(256 * 256);
33		blend_cc = auto_malloc(256 * 256);
	32	blend_y = auto_alloc_array(machine, UINT8, 256 * 256);
	33	blend_cc = auto_alloc_array(machine, UINT8, 256 * 256);
34	34
35	35	/* fill tables */
36	36	for (i = 0; i < 256 * 256; i++)

src/mame/video/taitojc.c

r4679	r4680
189	189
190	190	tilemap_set_transparent_pen(taitojc_tilemap, 0);
191	191
192		taitojc_char_ram = auto_malloc(0x4000);
193		taitojc_tile_ram = auto_malloc(0x4000);
	192	taitojc_char_ram = auto_alloc_array_clear(machine, UINT32, 0x4000/4);
	193	taitojc_tile_ram = auto_alloc_array_clear(machine, UINT32, 0x4000/4);
194	194
195		memset(taitojc_char_ram, 0, 0x4000);
196		memset(taitojc_tile_ram, 0, 0x4000);
197
198	195	/* create the char set (gfx will then be updated dynamically from RAM) */
199	196	machine->gfx[taitojc_gfx_index] = gfx_element_alloc(machine, &taitojc_char_layout, (UINT8 *)taitojc_char_ram, machine->config->total_colors / 16, 0);
200	197
201		taitojc_texture = auto_malloc(0x400000);
	198	taitojc_texture = auto_alloc_array(machine, UINT8, 0x400000);
202	199
203	200	framebuffer = video_screen_auto_bitmap_alloc(machine->primary_screen);
204	201
205	202	width = video_screen_get_width(machine->primary_screen);
206	203	height = video_screen_get_height(machine->primary_screen);
207		zbuffer = auto_bitmap_alloc(width, height, BITMAP_FORMAT_INDEXED16);
	204	zbuffer = auto_bitmap_alloc(machine, width, height, BITMAP_FORMAT_INDEXED16);
208	205	}
209	206
210	207	//static int tick = 0;
r4679	r4680
292	289
293	290	static void render_solid_scan(void *dest, INT32 scanline, const poly_extent *extent, const void *extradata, int threadid)
294	291	{
295		bitmap_t *destmap = dest;
	292	bitmap_t *destmap = (bitmap_t *)dest;
296	293	float z = extent->param[0].start;
297	294	int color = extent->param[1].start;
298	295	float dz = extent->param[0].dpdx;
r4679	r4680
316	313
317	314	static void render_shade_scan(void *dest, INT32 scanline, const poly_extent *extent, const void *extradata, int threadid)
318	315	{
319		bitmap_t *destmap = dest;
	316	bitmap_t *destmap = (bitmap_t *)dest;
320	317	float z = extent->param[0].start;
321	318	float color = extent->param[1].start;
322	319	float dz = extent->param[0].dpdx;
r4679	r4680
343	340
344	341	static void render_texture_scan(void *dest, INT32 scanline, const poly_extent *extent, const void *extradata, int threadid)
345	342	{
346		const poly_extra_data *extra = extradata;
347		bitmap_t *destmap = dest;
	343	const poly_extra_data *extra = (const poly_extra_data *)extradata;
	344	bitmap_t *destmap = (bitmap_t *)dest;
348	345	float z = extent->param[0].start;
349	346	float u = extent->param[1].start;
350	347	float v = extent->param[2].start;
r4679	r4680
437	434	// 0x12: Vertex 3 X
438	435	// 0x13: Vertex 3 Z
439	436
440		poly_extra_data *extra = poly_get_extra_data(poly);
	437	poly_extra_data *extra = (poly_extra_data *)poly_get_extra_data(poly);
441	438	UINT16 texbase;
442	439
443	440	/*
r4679	r4680
555	552	// 0x18: Vertex 4 X
556	553	// 0x19: Vertex 4 Z
557	554
558		poly_extra_data *extra = poly_get_extra_data(poly);
	555	poly_extra_data *extra = (poly_extra_data *)poly_get_extra_data(poly);
559	556	UINT16 texbase;
560	557
561	558	/*

src/mame/video/pitnrun.c

r4679	r4680
64	64	tilemap_mark_all_tiles_dirty( bg );
65	65	}
66	66
67
68		READ8_HANDLER( pitnrun_videoram_r )
69		{
70		return videoram[offset];
71		}
72
73		READ8_HANDLER( pitnrun_videoram2_r )
74		{
75		return pitnrun_videoram2[offset];
76		}
77
78	67	WRITE8_HANDLER( pitnrun_char_bank_select )
79	68	{
80	69	if(pitnrun_char_bank!=data)
r4679	r4680
181	170	fg = tilemap_create( machine, get_tile_info1,tilemap_scan_rows,8,8,32,32 );
182	171	bg = tilemap_create( machine, get_tile_info2,tilemap_scan_rows,8,8,32*4,32 );
183	172	tilemap_set_transparent_pen( fg, 0 );
184		tmp_bitmap[0] = auto_bitmap_alloc(128,128,video_screen_get_format(machine->primary_screen));
185		tmp_bitmap[1] = auto_bitmap_alloc(128,128,video_screen_get_format(machine->primary_screen));
186		tmp_bitmap[2] = auto_bitmap_alloc(128,128,video_screen_get_format(machine->primary_screen));
187		tmp_bitmap[3] = auto_bitmap_alloc(128,128,video_screen_get_format(machine->primary_screen));
	173	tmp_bitmap[0] = auto_bitmap_alloc(machine,128,128,video_screen_get_format(machine->primary_screen));
	174	tmp_bitmap[1] = auto_bitmap_alloc(machine,128,128,video_screen_get_format(machine->primary_screen));
	175	tmp_bitmap[2] = auto_bitmap_alloc(machine,128,128,video_screen_get_format(machine->primary_screen));
	176	tmp_bitmap[3] = auto_bitmap_alloc(machine,128,128,video_screen_get_format(machine->primary_screen));
188	177	pitnrun_spotlights(machine);
189	178	}
190	179

src/mame/video/segaic16.c

r4679	r4680
402	402	UINT16         latched_yscroll[4];            /* latched Y scroll values */
403	403	UINT16         latched_pageselect[4];         /* latched page select values */
404	404	INT32         xoffs;                     /* X scroll offset */
405		tilemap *tilemaps[16];               /* up to 16 tilemap pages */
406		tilemap *textmap;                  /* a single text tilemap */
407		struct tilemap_callback_info tilemap_info[16];   /* callback info for 16 tilemap pages */
	405	tilemap *      tilemaps[16];               /* up to 16 tilemap pages */
	406	tilemap *      textmap;                  /* a single text tilemap */
	407	struct tilemap_callback_info tmap_info[16];      /* callback info for 16 tilemap pages */
408	408	struct tilemap_callback_info textmap_info;      /* callback info for a single textmap page */
409	409	void         (*reset)(running_machine *machine, struct tilemap_info *info);/* reset callback */
410	410	void         (*draw_layer)(running_machine *machine, struct tilemap_info *info, bitmap_t *bitmap, const rectangle *cliprect, int which, int flags, int priority);
r4679	r4680
808	808
809	809	static TILE_GET_INFO( segaic16_tilemap_16a_tile_info )
810	810	{
811		const struct tilemap_callback_info *info = param;
	811	const struct tilemap_callback_info *info = (const struct tilemap_callback_info *)param;
812	812	UINT16 data = info->rambase[tile_index];
813	813	int code = ((data >> 1) & 0x1000) | (data & 0xfff);
814	814	int color = (data >> 5) & 0x7f;
r4679	r4680
820	820
821	821	static TILE_GET_INFO( segaic16_tilemap_16a_text_info )
822	822	{
823		const struct tilemap_callback_info *info = param;
	823	const struct tilemap_callback_info *info = (const struct tilemap_callback_info *)param;
824	824	UINT16 data = info->rambase[tile_index];
825	825	int color = (data >> 8) & 0x07;
826	826	int code = data & 0xff;
r4679	r4680
1020	1020
1021	1021	static TILE_GET_INFO( segaic16_tilemap_16b_tile_info )
1022	1022	{
1023		const struct tilemap_callback_info *info = param;
	1023	const struct tilemap_callback_info *info = (const struct tilemap_callback_info *)param;
1024	1024	UINT16 data = info->rambase[tile_index];
1025	1025	int color = (data >> 6) & 0x7f;
1026	1026	int code = data & 0x1fff;
r4679	r4680
1034	1034
1035	1035	static TILE_GET_INFO( segaic16_tilemap_16b_text_info )
1036	1036	{
1037		const struct tilemap_callback_info *info = param;
	1037	const struct tilemap_callback_info *info = (const struct tilemap_callback_info *)param;
1038	1038	UINT16 data = info->rambase[tile_index];
1039	1039	int bank = info->bank[0];
1040	1040	int color = (data >> 9) & 0x07;
r4679	r4680
1047	1047
1048	1048	static TILE_GET_INFO( segaic16_tilemap_16b_alt_tile_info )
1049	1049	{
1050		const struct tilemap_callback_info *info = param;
	1050	const struct tilemap_callback_info *info = (const struct tilemap_callback_info *)param;
1051	1051	UINT16 data = info->rambase[tile_index];
1052	1052	int color = (data >> 5) & 0x7f;
1053	1053	int code = data & 0x1fff;
r4679	r4680
1061	1061
1062	1062	static TILE_GET_INFO( segaic16_tilemap_16b_alt_text_info )
1063	1063	{
1064		const struct tilemap_callback_info *info = param;
	1064	const struct tilemap_callback_info *info = (const struct tilemap_callback_info *)param;
1065	1065	UINT16 data = info->rambase[tile_index];
1066	1066	int bank = info->bank[0];
1067	1067	int color = (data >> 8) & 0x07;
r4679	r4680
1287	1287	info->tilemaps[pagenum] = tilemap_create(machine, get_tile_info, tilemap_scan_rows,  8,8, 64,32);
1288	1288
1289	1289	/* configure the tilemap */
1290		info->tilemap_info[pagenum].rambase = info->tileram + pagenum * 64*32;
1291		info->tilemap_info[pagenum].bank = info->bank;
1292		info->tilemap_info[pagenum].banksize = info->banksize;
1293		tilemap_set_user_data(info->tilemaps[pagenum], &info->tilemap_info[pagenum]);
	1290	info->tmap_info[pagenum].rambase = info->tileram + pagenum * 64*32;
	1291	info->tmap_info[pagenum].bank = info->bank;
	1292	info->tmap_info[pagenum].banksize = info->banksize;
	1293	tilemap_set_user_data(info->tilemaps[pagenum], &info->tmap_info[pagenum]);
1294	1294	tilemap_set_palette_offset(info->tilemaps[pagenum], colorbase);
1295	1295	tilemap_set_transparent_pen(info->tilemaps[pagenum], 0);
1296	1296	tilemap_set_scrolldx(info->tilemaps[pagenum], 0, 22);
r4679	r4680
2734	2734
2735	2735	/* if the sprites need buffering, allocate memory for the buffer */
2736	2736	if (buffer)
2737		info->buffer = auto_malloc(info->ramsize);
	2737	info->buffer = auto_alloc_array(machine, UINT16, info->ramsize/2);
2738	2738
2739	2739	state_save_register_item(machine, "segaic16_sp", NULL, which, info->flip);
2740	2740	state_save_register_item(machine, "segaic16_sp", NULL, which, info->shadow);
r4679	r4680
2911	2911	int len = memory_region_length(machine, "gfx3");
2912	2912
2913	2913	/* allocate memory for the unpacked road data */
2914		info->gfx = auto_malloc(256 * 512);
	2914	info->gfx = auto_alloc_array(machine, UINT8, 256 * 512);
2915	2915
2916	2916	/* loop over rows */
2917	2917	for (y = 0; y < 256; y++)
r4679	r4680
3172	3172	int len = memory_region_length(machine, "gfx3");
3173	3173
3174	3174	/* allocate memory for the unpacked road data */
3175		info->gfx = auto_malloc((256 * 2 + 1) * 512);
	3175	info->gfx = auto_alloc_array(machine, UINT8, (256 * 2 + 1) * 512);
3176	3176
3177	3177	/* loop over rows */
3178	3178	for (y = 0; y < 256 * 2; y++)
r4679	r4680
3404	3404
3405	3405	case SEGAIC16_ROAD_OUTRUN:
3406	3406	case SEGAIC16_ROAD_XBOARD:
3407		info->buffer = auto_malloc(0x1000);
	3407	info->buffer = auto_alloc_array(machine, UINT16, 0x1000/2);
3408	3408	info->draw = segaic16_road_outrun_draw;
3409	3409	segaic16_road_outrun_decode(machine, info);
3410	3410	break;
r4679	r4680
3508	3508	}
3509	3509
3510	3510	/* allocate a buffer for swapping */
3511		info->buffer = auto_malloc(info->ramsize);
	3511	info->buffer = auto_alloc_array(machine, UINT16, info->ramsize/2);
3512	3512
3513	3513	state_save_register_item(machine, "segaic16_rot", NULL, which, info->colorbase);
3514	3514	state_save_register_item_pointer(machine, "segaic16_rot", NULL, which, ((UINT8 *) info->buffer), info->ramsize);

src/mame/video/midzeus2.c

r4679	r4680
257	257
258	258	static TIMER_CALLBACK( int_timer_callback )
259	259	{
260		cpu_set_input_line(machine->cpu[0], 2, ASSERT_LINE);
	260	cputag_set_input_line(machine, "maincpu", 2, ASSERT_LINE);
261	261	}
262	262
263	263
264	264	VIDEO_START( midzeus2 )
265	265	{
266	266	/* allocate memory for "wave" RAM */
267		waveram[0] = auto_malloc(WAVERAM0_WIDTH * WAVERAM0_HEIGHT * 8);
268		waveram[1] = auto_malloc(WAVERAM1_WIDTH * WAVERAM1_HEIGHT * 12);
	267	waveram[0] = auto_alloc_array(machine, UINT32, WAVERAM0_WIDTH * WAVERAM0_HEIGHT * 8/4);
	268	waveram[1] = auto_alloc_array(machine, UINT32, WAVERAM1_WIDTH * WAVERAM1_HEIGHT * 12/4);
269	269
270	270	/* initialize polygon engine */
271	271	poly = poly_alloc(machine, 10000, sizeof(poly_extra_data), POLYFLAG_ALLOW_QUADS);
r4679	r4680
390	390	if (input_code_pressed(KEYCODE_RIGHT) && width < 512) { width <<= 1; while (input_code_pressed(KEYCODE_RIGHT)) ; }
391	391
392	392	if (yoffs < 0) yoffs = 0;
393		base = waveram0_ptr_from_expanded_addr(yoffs << 16);
	393	base = (const UINT64 *)waveram0_ptr_from_expanded_addr(yoffs << 16);
394	394
395	395	for (y = cliprect->min_y; y <= cliprect->max_y; y++)
396	396	{
r4679	r4680
498	498	break;
499	499	if (*tailptr == NULL)
500	500	{
501		*tailptr = malloc_or_die(sizeof(reg_info));
	501	*tailptr = alloc_or_die(reg_info);
502	502	(*tailptr)->next = NULL;
503	503	(*tailptr)->value = data;
504	504	regdata_count[offset]++;
r4679	r4680
742	742	break;
743	743	if (*tailptr == NULL)
744	744	{
745		*tailptr = malloc_or_die(sizeof(reg_info));
	745	*tailptr = alloc_or_die(reg_info);
746	746	(*tailptr)->next = NULL;
747	747	(*tailptr)->value = value;
748	748	subregdata_count[which]++;
r4679	r4680
1213	1213	clipvert[i].y += 0.0005f;
1214	1214	}
1215	1215
1216		extra = poly_get_extra_data(poly);
	1216	extra = (poly_extra_data *)poly_get_extra_data(poly);
1217	1217	switch (texmode)
1218	1218	{
1219	1219	case 0x01d:      /* crusnexo: RHS of score bar */
r4679	r4680
1272	1272
1273	1273	static void render_poly_8bit(void *dest, INT32 scanline, const poly_extent *extent, const void *extradata, int threadid)
1274	1274	{
1275		const poly_extra_data *extra = extradata;
	1275	const poly_extra_data *extra = (const poly_extra_data *)extradata;
1276	1276	INT32 curz = extent->param[0].start;
1277	1277	INT32 curu = extent->param[1].start;
1278	1278	INT32 curv = extent->param[2].start;

src/mame/video/liberatr.c

r4679	r4680
227	227	many segments it will take to store the description, allocate the
228	228	space for it and copy the data to it.
229	229	*/
230		buffer = auto_malloc(2*(128 + total_segment_count));
	230	buffer = auto_alloc_array(machine, UINT8, 2*(128 + total_segment_count));
231	231
232	232	liberatr_planet->frames[longitude] = buffer;
233	233
r4679	r4680
267	267
268	268	VIDEO_START( liberatr )
269	269	{
270		liberatr_videoram = auto_malloc(0x10000);
	270	liberatr_videoram = auto_alloc_array(machine, UINT8, 0x10000);
271	271
272	272	/* allocate the planet descriptor structure */
273		liberatr_planets[0] = auto_malloc(sizeof(planet));
274		liberatr_planets[1] = auto_malloc(sizeof(planet));
	273	liberatr_planets[0] = auto_alloc(machine, planet);
	274	liberatr_planets[1] = auto_alloc(machine, planet);
275	275
276	276	/* for each planet in the planet ROMs */
277	277	liberatr_init_planet(machine, liberatr_planets[0], &memory_region(machine, "gfx1")[0x2000]);

src/mame/video/bionicc.c

r4679	r4680
243	243
244	244	VIDEO_EOF( bionicc )
245	245	{
246		const address_space *space = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM);
	246	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
247	247
248		buffer_spriteram16_w(space,0,0,0xffff);
	248	buffer_spriteram16_w(space, 0, 0, 0xffff);
249	249	}

src/mame/video/psikyo.c

r4679	r4680
215	215	16,16,
216	216	0x100, 0x10 );
217	217
218		spritebuf1 = auto_malloc(0x2000);
219		spritebuf2 = auto_malloc(0x2000);
	218	spritebuf1 = auto_alloc_array(machine, UINT32, 0x2000/4);
	219	spritebuf2 = auto_alloc_array(machine, UINT32, 0x2000/4);
220	220
221	221	tilemap_set_scroll_rows(tilemap_0_size0,0x80*16);   // line scrolling
222	222	tilemap_set_scroll_cols(tilemap_0_size0,1);

src/mame/video/pgm.c

r4679	r4680
326	326	tilemap_set_transparent_pen(pgm_bg_tilemap,31);
327	327	tilemap_set_scroll_rows(pgm_bg_tilemap,64*32);
328	328
329		tmppgmbitmap = auto_bitmap_alloc(448,224,BITMAP_FORMAT_RGB32);
	329	tmppgmbitmap = auto_bitmap_alloc(machine,448,224,BITMAP_FORMAT_RGB32);
330	330
331	331	for (i=0; i < 0x1200/2; i++)
332	332	palette_set_color(machine, i, MAKE_RGB(0, 0, 0));
333	333
334		pgm_spritebufferram = auto_malloc (0xa00);
	334	pgm_spritebufferram = auto_alloc_array(machine, UINT16, 0xa00/2);
335	335
336	336	/* we render each sprite to a bitmap then copy the bitmap to screen bitmap with zooming */
337	337	/* easier this way because of the funky sprite format */
338		sprite_temp_render = auto_malloc(0x400*0x200*2);
	338	sprite_temp_render = auto_alloc_array(machine, UINT16, 0x400*0x200);
339	339	}
340	340
341	341	VIDEO_UPDATE( pgm )

src/mame/video/namcos21.c

r4679	r4680
64	64	} /* winrun_gpu_videoram_r */
65	65
66	66	static void
67		AllocatePolyFrameBuffer( void )
	67	AllocatePolyFrameBuffer( running_machine *machine )
68	68	{
69		mpPolyFrameBufferZ     = auto_malloc( FRAMEBUFFER_SIZE_IN_BYTES );
70		mpPolyFrameBufferPens  = auto_malloc( FRAMEBUFFER_SIZE_IN_BYTES );
	69	mpPolyFrameBufferZ     = auto_alloc_array(machine, UINT16, FRAMEBUFFER_SIZE_IN_BYTES/2 );
	70	mpPolyFrameBufferPens  = auto_alloc_array(machine, UINT16, FRAMEBUFFER_SIZE_IN_BYTES/2 );
71	71
72		mpPolyFrameBufferZ2    = auto_malloc( FRAMEBUFFER_SIZE_IN_BYTES );
73		mpPolyFrameBufferPens2 = auto_malloc( FRAMEBUFFER_SIZE_IN_BYTES );
	72	mpPolyFrameBufferZ2    = auto_alloc_array(machine, UINT16, FRAMEBUFFER_SIZE_IN_BYTES/2 );
	73	mpPolyFrameBufferPens2 = auto_alloc_array(machine, UINT16, FRAMEBUFFER_SIZE_IN_BYTES/2 );
74	74
75	75	namcos21_ClearPolyFrameBuffer();
76	76	namcos21_ClearPolyFrameBuffer();
r4679	r4680
129	129	{
130	130	if( namcos2_gametype == NAMCOS21_WINRUN91 )
131	131	{
132		videoram = auto_malloc(0x80000);
	132	videoram = auto_alloc_array(machine, UINT8, 0x80000);
133	133	}
134		AllocatePolyFrameBuffer();
135		namco_obj_init(
	134	AllocatePolyFrameBuffer(machine);
	135	namco_obj_init(machine,
136	136	0,      /* gfx bank */
137	137	0xf,   /* reverse palette mapping */
138	138	objcode2tile );
r4679	r4680
254	254	double z;
255	255	} edge;
256	256
257		#define SWAP(A,B) { const void *temp = A; A = B; B = temp; }
	257	#define SWAP(T,A,B) { const T *temp = A; A = B; B = temp; }
258	258
259	259	static void
260	260	renderscanline_flat( const edge *e1, const edge *e2, int sy, unsigned color, int depthcueenable )
261	261	{
262	262	if( e1->x > e2->x )
263	263	{
264		SWAP(e1,e2);
	264	SWAP(edge,e1,e2);
265	265	}
266	266
267	267	{
r4679	r4680
335	335	{
336	336	if( v0->y > v1->y )
337	337	{
338		SWAP(v0,v1);
	338	SWAP(vertex,v0,v1);
339	339	}
340	340	else if( v1->y > v2->y )
341	341	{
342		SWAP(v1,v2);
	342	SWAP(vertex,v1,v2);
343	343	}
344	344	else
345	345	{

src/mame/video/model3.c

r4679	r4680
172	172	width = video_screen_get_width(machine->primary_screen);
173	173	height = video_screen_get_height(machine->primary_screen);
174	174	bitmap3d = video_screen_auto_bitmap_alloc(machine->primary_screen);
175		zbuffer = auto_bitmap_alloc(width, height, BITMAP_FORMAT_INDEXED32);
	175	zbuffer = auto_bitmap_alloc(machine, width, height, BITMAP_FORMAT_INDEXED32);
176	176
177		m3_char_ram = auto_malloc(0x100000);
178		m3_tile_ram = auto_malloc(0x8000);
	177	m3_char_ram = auto_alloc_array_clear(machine, UINT64, 0x100000/8);
	178	m3_tile_ram = auto_alloc_array_clear(machine, UINT64, 0x8000/8);
179	179
180		memset(m3_char_ram, 0, 0x100000);
181		memset(m3_tile_ram, 0, 0x8000);
	180	pal_lookup = auto_alloc_array_clear(machine, UINT16, 65536);
182	181
183		pal_lookup = auto_malloc(65536*2);
184		memset(pal_lookup, 0, 65536*2);
	182	texture_fifo = auto_alloc_array_clear(machine, UINT32, 0x100000/4);
185	183
186		texture_fifo = auto_malloc(0x100000);
187
188	184	/* 2x 4MB texture sheets */
189		texture_ram[0] = auto_malloc(0x400000);
190		texture_ram[1] = auto_malloc(0x400000);
	185	texture_ram[0] = auto_alloc_array(machine, UINT16, 0x400000/2);
	186	texture_ram[1] = auto_alloc_array(machine, UINT16, 0x400000/2);
191	187
192	188	/* 1MB Display List RAM */
193		display_list_ram = auto_malloc(0x100000);
	189	display_list_ram = auto_alloc_array_clear(machine, UINT32, 0x100000/4);
194	190	/* 4MB for nodes (< Step 2.0 have only 2MB) */
195		culling_ram = auto_malloc(0x400000);
	191	culling_ram = auto_alloc_array_clear(machine, UINT32, 0x400000/4);
196	192	/* 4MB Polygon RAM */
197		polygon_ram = auto_malloc(0x400000);
	193	polygon_ram = auto_alloc_array_clear(machine, UINT32, 0x400000/4);
198	194
199		memset(display_list_ram, 0, 0x100000);
200		memset(culling_ram, 0, 0x400000);
201		memset(polygon_ram, 0, 0x400000);
202		memset(texture_fifo, 0, 0x100000);
203
204	195	tick = 0;
205	196	debug_layer_disable = 0;
206	197	vid_reg0 = 0;
r4679	r4680
583	574	return tex;
584	575
585	576	/* create a new texture */
586		tex = malloc_or_die(sizeof(cached_texture) + (2 * pixwidth * 2 * pixheight) * sizeof(rgb_t));
	577	tex = (cached_texture *)alloc_array_or_die(UINT8, sizeof(cached_texture) + (2 * pixwidth * 2 * pixheight) * sizeof(rgb_t));
587	578	tex->width = texwidth;
588	579	tex->height = texheight;
589	580	tex->format = format;
r4679	r4680
1089	1080
1090	1081	static void render_one(TRIANGLE *tri)
1091	1082	{
1092		poly_extra_data *extra = poly_get_extra_data(poly);
	1083	poly_extra_data *extra = (poly_extra_data *)poly_get_extra_data(poly);
1093	1084	poly_draw_scanline_func callback = NULL;
1094	1085
1095	1086	tri->v[0].pz = 1.0f / tri->v[0].pz;

src/mame/video/gameplan.c

r4679	r4680
71	71
72	72	static VIDEO_UPDATE( gameplan )
73	73	{
74		gameplan_state *state = screen->machine->driver_data;
	74	gameplan_state *state = (gameplan_state *)screen->machine->driver_data;
75	75	pen_t pens[GAMEPLAN_NUM_PENS];
76	76	offs_t offs;
77	77
r4679	r4680
91	91
92	92	static VIDEO_UPDATE( leprechn )
93	93	{
94		gameplan_state *state = screen->machine->driver_data;
	94	gameplan_state *state = (gameplan_state *)screen->machine->driver_data;
95	95	pen_t pens[LEPRECHN_NUM_PENS];
96	96	offs_t offs;
97	97
r4679	r4680
118	118
119	119	static WRITE8_DEVICE_HANDLER( video_data_w )
120	120	{
121		gameplan_state *state = device->machine->driver_data;
	121	gameplan_state *state = (gameplan_state *)device->machine->driver_data;
122	122
123	123	state->video_data = data;
124	124	}
r4679	r4680
126	126
127	127	static WRITE8_DEVICE_HANDLER( gameplan_video_command_w )
128	128	{
129		gameplan_state *state = device->machine->driver_data;
	129	gameplan_state *state = (gameplan_state *)device->machine->driver_data;
130	130
131	131	state->video_command = data & 0x07;
132	132	}
r4679	r4680
134	134
135	135	static WRITE8_DEVICE_HANDLER( leprechn_video_command_w )
136	136	{
137		gameplan_state *state = device->machine->driver_data;
	137	gameplan_state *state = (gameplan_state *)device->machine->driver_data;
138	138
139	139	state->video_command = (data >> 3) & 0x07;
140	140	}
r4679	r4680
151	151
152	152	static WRITE8_DEVICE_HANDLER( video_command_trigger_w )
153	153	{
154		gameplan_state *state = device->machine->driver_data;
	154	gameplan_state *state = (gameplan_state *)device->machine->driver_data;
155	155
156	156	if (data == 0)
157	157	{
r4679	r4680
214	214
215	215	static TIMER_CALLBACK( via_irq_delayed )
216	216	{
217		cpu_set_input_line(machine->cpu[0], 0, param);
	217	cputag_set_input_line(machine, "maincpu", 0, param);
218	218	}
219	219
220	220
r4679	r4680
266	266
267	267	static TIMER_CALLBACK( via_0_ca1_timer_callback )
268	268	{
269		gameplan_state *state = machine->driver_data;
	269	gameplan_state *state = (gameplan_state *)machine->driver_data;
270	270	const device_config *via = devtag_get_device(machine, "via6522_0");
271	271
272	272	/* !VBLANK is connected to CA1 */
r4679	r4680
300	300
301	301	static VIDEO_START( common )
302	302	{
303		gameplan_state *state = machine->driver_data;
	303	gameplan_state *state = (gameplan_state *)machine->driver_data;
304	304
305	305	state->videoram_size = (HBSTART - HBEND) * (VBSTART - VBEND);
306		state->videoram = auto_malloc(state->videoram_size);
	306	state->videoram = auto_alloc_array(machine, UINT8, state->videoram_size);
307	307
308	308	create_via_0_timer(machine, state);
309	309
r4679	r4680
343	343
344	344	static VIDEO_RESET( gameplan )
345	345	{
346		start_via_0_timer(machine, machine->driver_data);
	346	start_via_0_timer(machine, (gameplan_state *)machine->driver_data);
347	347	}
348	348
349	349

src/mame/video/capbowl.c

r4679	r4680
23	23
24	24	static void generate_interrupt(running_machine *machine, int state)
25	25	{
26		cpu_set_input_line(machine->cpu[0], M6809_FIRQ_LINE, state);
	26	cputag_set_input_line(machine, "maincpu", M6809_FIRQ_LINE, state);
27	27	}
28	28
29	29	static const struct tms34061_interface tms34061intf =

src/mame/video/darius.c

r4679	r4680
42	42	{
43	43	fg_tilemap = tilemap_create(machine, get_fg_tile_info,tilemap_scan_rows,8,8,128,64);
44	44
45		spritelist = auto_malloc(0x800 * sizeof(*spritelist));
	45	spritelist = auto_alloc_array(machine, struct tempsprite, 0x800);
46	46
47	47	/* (chips, gfxnum, x_offs, y_offs, y_invert, opaque, dblwidth) */
48	48	PC080SN_vh_start(machine,1,1,-16,8,0,1,1);

src/mame/video/cbasebal.c

r4679	r4680
45	45
46	46	VIDEO_START( cbasebal )
47	47	{
48		cbasebal_textram = auto_malloc(0x1000);
49		cbasebal_scrollram = auto_malloc(0x1000);
	48	cbasebal_textram = auto_alloc_array(machine, UINT8, 0x1000);
	49	cbasebal_scrollram = auto_alloc_array(machine, UINT8, 0x1000);
50	50
51	51	bg_tilemap = tilemap_create(machine, get_bg_tile_info,tilemap_scan_rows,   16,16,64,32);
52	52	fg_tilemap = tilemap_create(machine, get_fg_tile_info,tilemap_scan_rows,8,8,64,32);

src/mame/video/beathead.c

r4679	r4680
43	43
44	44	VIDEO_START( beathead )
45	45	{
46		hsyncram = auto_malloc(0x800);
	46	hsyncram = auto_alloc_array(machine, UINT8, 0x800);
47	47	}
48	48
49	49
r4679	r4680
114	114	if ((oldword & 8) && !(newword & 8) && video_screen_get_vpos(space->machine->primary_screen) != 261)
115	115	{
116	116	logerror("Suspending time! (scanline = %d)\n", video_screen_get_vpos(space->machine->primary_screen));
117		cpu_set_input_line(space->machine->cpu[0], INPUT_LINE_HALT, ASSERT_LINE);
	117	cputag_set_input_line(space->machine, "maincpu", INPUT_LINE_HALT, ASSERT_LINE);
118	118	}
119	119	}
120	120

src/mame/video/st0016.c

r4679	r4680
435	435	VIDEO_START( st0016 )
436	436	{
437	437	int gfx_index=0;
438		st0016_charram=auto_malloc(ST0016_MAX_CHAR_BANK*ST0016_CHAR_BANK_SIZE);
439		st0016_spriteram=auto_malloc(ST0016_MAX_SPR_BANK*ST0016_SPR_BANK_SIZE);
440		st0016_paletteram=auto_malloc(ST0016_MAX_PAL_BANK*ST0016_PAL_BANK_SIZE);
	438	st0016_charram=auto_alloc_array(machine, UINT8, ST0016_MAX_CHAR_BANK*ST0016_CHAR_BANK_SIZE);
	439	st0016_spriteram=auto_alloc_array(machine, UINT8, ST0016_MAX_SPR_BANK*ST0016_SPR_BANK_SIZE);
	440	st0016_paletteram=auto_alloc_array(machine, UINT8, ST0016_MAX_PAL_BANK*ST0016_PAL_BANK_SIZE);
441	441
442	442	/* find first empty slot to decode gfx */
443	443	for (gfx_index = 0; gfx_index < MAX_GFX_ELEMENTS; gfx_index++)
r4679	r4680
468	468	break;
469	469
470	470	case 3: //super eagle shot
471		speglsht_bitmap = auto_bitmap_alloc( 512, 5122, BITMAP_FORMAT_INDEXED16 );
	471	speglsht_bitmap = auto_bitmap_alloc(machine, 512, 5122, BITMAP_FORMAT_INDEXED16 );
472	472	break;
473	473
474	474	case 4: //mayjinsen 1&2

src/mame/video/cchasm.c

r4679	r4680
23	23
24	24	static TIMER_CALLBACK( cchasm_refresh_end )
25	25	{
26		cpu_set_input_line (machine->cpu[0], 2, ASSERT_LINE);
	26	cputag_set_input_line (machine, "maincpu", 2, ASSERT_LINE);
27	27	}
28	28
29	29	static void cchasm_refresh (running_machine *machine)
r4679	r4680
114	114	cchasm_refresh(space->machine);
115	115	break;
116	116	case 0xf7:
117		cpu_set_input_line (space->machine->cpu[0], 2, CLEAR_LINE);
	117	cputag_set_input_line (space->machine, "maincpu", 2, CLEAR_LINE);
118	118	break;
119	119	}
120	120	}

src/mame/video/qix.c

r4679	r4680
43	43
44	44	static VIDEO_START( qix )
45	45	{
46		qix_state *state = machine->driver_data;
	46	qix_state *state = (qix_state *)machine->driver_data;
47	47
48	48	/* allocate memory for the full video RAM */
49		state->videoram = auto_malloc(256 * 256);
	49	state->videoram = auto_alloc_array(machine, UINT8, 256 * 256);
50	50
51	51	/* set up save states */
52	52	state_save_register_global_pointer(machine, state->videoram, 256 * 256);
r4679	r4680
65	65
66	66	static MC6845_ON_DE_CHANGED( display_enable_changed )
67	67	{
68		qix_state *state = device->machine->driver_data;
	68	qix_state *state = (qix_state *)device->machine->driver_data;
69	69
70	70	/* on the rising edge, latch the scanline */
71	71	if (display_enabled)
r4679	r4680
88	88
89	89	WRITE8_DEVICE_HANDLER( qix_flip_screen_w )
90	90	{
91		qix_state *state = device->machine->driver_data;
	91	qix_state *state = (qix_state *)device->machine->driver_data;
92	92
93	93	state->flip = data;
94	94	}
r4679	r4680
112	112
113	113	static READ8_HANDLER( qix_videoram_r )
114	114	{
115		qix_state *state = space->machine->driver_data;
	115	qix_state *state = (qix_state *)space->machine->driver_data;
116	116
117	117	/* add in the upper bit of the address latch */
118	118	offset += (state->videoram_address[0] & 0x80) << 8;
r4679	r4680
122	122
123	123	static WRITE8_HANDLER( qix_videoram_w )
124	124	{
125		qix_state *state = space->machine->driver_data;
	125	qix_state *state = (qix_state *)space->machine->driver_data;
126	126
127	127	/* update the screen in case the game is writing "behind" the beam -
128	128	Zookeeper likes to do this */
r4679	r4680
138	138
139	139	static WRITE8_HANDLER( slither_videoram_w )
140	140	{
141		qix_state *state = space->machine->driver_data;
	141	qix_state *state = (qix_state *)space->machine->driver_data;
142	142
143	143	/* update the screen in case the game is writing "behind" the beam -
144	144	Zookeeper likes to do this */
r4679	r4680
170	170
171	171	static READ8_HANDLER( qix_addresslatch_r )
172	172	{
173		qix_state *state = space->machine->driver_data;
	173	qix_state *state = (qix_state *)space->machine->driver_data;
174	174
175	175	/* compute the value at the address latch */
176	176	offset = (state->videoram_address[0] << 8) | state->videoram_address[1];
r4679	r4680
180	180
181	181	static WRITE8_HANDLER( qix_addresslatch_w )
182	182	{
183		qix_state *state = space->machine->driver_data;
	183	qix_state *state = (qix_state *)space->machine->driver_data;
184	184
185	185	/* update the screen in case the game is writing "behind" the beam */
186	186	video_screen_update_now(space->machine->primary_screen);
r4679	r4680
195	195
196	196	static WRITE8_HANDLER( slither_addresslatch_w )
197	197	{
198		qix_state *state = space->machine->driver_data;
	198	qix_state *state = (qix_state *)space->machine->driver_data;
199	199
200	200	/* update the screen in case the game is writing "behind" the beam */
201	201	video_screen_update_now(space->machine->primary_screen);
r4679	r4680
220	220
221	221	static WRITE8_HANDLER( qix_paletteram_w )
222	222	{
223		qix_state *state = space->machine->driver_data;
	223	qix_state *state = (qix_state *)space->machine->driver_data;
224	224
225	225	UINT8 old_data = state->paletteram[offset];
226	226
r4679	r4680
236	236
237	237	WRITE8_HANDLER( qix_palettebank_w )
238	238	{
239		qix_state *state = space->machine->driver_data;
	239	qix_state *state = (qix_state *)space->machine->driver_data;
240	240
241	241	/* set the bank value */
242	242	if (state->palette_bank != (data & 3))
r4679	r4680
308	308
309	309	static MC6845_BEGIN_UPDATE( begin_update )
310	310	{
311		qix_state *state = device->machine->driver_data;
	311	qix_state *state = (qix_state *)device->machine->driver_data;
312	312
313	313	#if 0
314	314	// note the confusing bit order!
r4679	r4680
326	326
327	327	static MC6845_UPDATE_ROW( update_row )
328	328	{
329		qix_state *state = device->machine->driver_data;
	329	qix_state *state = (qix_state *)device->machine->driver_data;
330	330	UINT32 *dest = BITMAP_ADDR32(bitmap, y, 0);
331	331	UINT16 x;
332	332

src/mame/video/himesiki.c

r4679	r4680
29	29
30	30	VIDEO_START( himesiki )
31	31	{
32		himesiki_bg_ram = auto_malloc(0x1000);
	32	himesiki_bg_ram = auto_alloc_array(machine, UINT8, 0x1000);
33	33	himesiki_bg_tilemap = tilemap_create( machine, get_bg_tile_info,tilemap_scan_rows,8,8,64,32 );
34	34	}
35	35

src/mame/video/atarirle.c

r4679	r4680
135	135	STATIC FUNCTION DECLARATIONS
136	136	***************************************************************************/
137	137
138		static void build_rle_tables(void);
	138	static void build_rle_tables(running_machine *machine);
139	139	static int count_objects(const UINT16 *base, int length);
140	140	static void prescan_rle(const atarirle_data *mo, int which);
141	141	static void sort_and_render(running_machine *machine, atarirle_data *mo);
r4679	r4680
278	278	assert_always(map >= 0 && map < ATARIRLE_MAX, "Invalid map index");
279	279
280	280	/* build and allocate the generic tables */
281		build_rle_tables();
	281	build_rle_tables(machine);
282	282
283	283	/* determine the masks first */
284	284	convert_mask(&desc->codemask,     &mo->codemask);
r4679	r4680
326	326	}
327	327
328	328	/* allocate the object info */
329		mo->info = auto_malloc(sizeof(mo->info[0]) * mo->objectcount);
	329	mo->info = auto_alloc_array_clear(machine, atarirle_info, mo->objectcount);
330	330
331	331	/* fill in the data */
332		memset(mo->info, 0, sizeof(mo->info[0]) * mo->objectcount);
333	332	for (i = 0; i < mo->objectcount; i++)
334	333	prescan_rle(mo, i);
335	334
336	335	/* allocate the spriteram */
337		mo->spriteram = auto_malloc(sizeof(mo->spriteram[0]) * mo->spriteramsize);
	336	mo->spriteram = auto_alloc_array_clear(machine, atarirle_entry, mo->spriteramsize);
338	337
339		/* clear it to zero */
340		memset(mo->spriteram, 0, sizeof(mo->spriteram[0]) * mo->spriteramsize);
341
342	338	/* allocate bitmaps */
343	339	width = video_screen_get_width(machine->primary_screen);
344	340	height = video_screen_get_height(machine->primary_screen);
345	341
346		mo->vram[0][0] = auto_bitmap_alloc(width, height, BITMAP_FORMAT_INDEXED16);
347		mo->vram[0][1] = auto_bitmap_alloc(width, height, BITMAP_FORMAT_INDEXED16);
	342	mo->vram[0][0] = auto_bitmap_alloc(machine, width, height, BITMAP_FORMAT_INDEXED16);
	343	mo->vram[0][1] = auto_bitmap_alloc(machine, width, height, BITMAP_FORMAT_INDEXED16);
348	344	bitmap_fill(mo->vram[0][0], NULL, 0);
349	345	bitmap_fill(mo->vram[0][1], NULL, 0);
350	346
351	347	/* allocate alternate bitmaps if needed */
352	348	if (mo->vrammask.mask != 0)
353	349	{
354		mo->vram[1][0] = auto_bitmap_alloc(width, height, BITMAP_FORMAT_INDEXED16);
355		mo->vram[1][1] = auto_bitmap_alloc(width, height, BITMAP_FORMAT_INDEXED16);
	350	mo->vram[1][0] = auto_bitmap_alloc(machine, width, height, BITMAP_FORMAT_INDEXED16);
	351	mo->vram[1][1] = auto_bitmap_alloc(machine, width, height, BITMAP_FORMAT_INDEXED16);
356	352	bitmap_fill(mo->vram[1][0], NULL, 0);
357	353	bitmap_fill(mo->vram[1][1], NULL, 0);
358	354	}
r4679	r4680
540	536	build_rle_tables: Builds internal table for RLE mapping.
541	537	---------------------------------------------------------------*/
542	538
543		static void build_rle_tables(void)
	539	static void build_rle_tables(running_machine *machine)
544	540	{
545	541	UINT16 *base;
546	542	int i;
547	543
548	544	/* allocate all 5 tables */
549		base = auto_malloc(0x500 * sizeof(UINT16));
	545	base = auto_alloc_array(machine, UINT16, 0x500);
550	546
551	547	/* assign the tables */
552	548	rle_table[0] = &base[0x000];

src/mame/video/glass.c

r4679	r4680
133	133	{
134	134	pant[0] = tilemap_create(machine, get_tile_info_glass_screen0,tilemap_scan_rows,16,16,32,32);
135	135	pant[1] = tilemap_create(machine, get_tile_info_glass_screen1,tilemap_scan_rows,16,16,32,32);
136		screen_bitmap = auto_bitmap_alloc (320, 200, video_screen_get_format(machine->primary_screen));
	136	screen_bitmap = auto_bitmap_alloc (machine, 320, 200, video_screen_get_format(machine->primary_screen));
137	137
138	138	tilemap_set_transparent_pen(pant[0],0);
139	139	tilemap_set_transparent_pen(pant[1],0);

src/mame/video/mcatadv.c

r4679	r4680
252	252	mcatadv_tilemap2 = tilemap_create(machine, get_mcatadv_tile_info2,tilemap_scan_rows, 16, 16,32,32);
253	253	tilemap_set_transparent_pen(mcatadv_tilemap2,0);
254	254
255		spriteram_old = auto_malloc(spriteram_size);
256		vidregs_old = auto_malloc(0xf);
	255	spriteram_old = auto_alloc_array_clear(machine, UINT16, spriteram_size/2);
	256	vidregs_old = auto_alloc_array(machine, UINT16, 0xf/2);
257	257
258		memset(spriteram_old,0,spriteram_size);
259
260	258	palette_bank1 = 0;
261	259	palette_bank2 = 0;
262	260	}

src/mame/video/cinemat.c

r4679	r4680
84	84	WRITE8_HANDLER(cinemat_vector_control_w)
85	85	{
86	86	int r, g, b, i;
	87	const device_config *cpu = cputag_get_cpu(space->machine, "maincpu");
87	88
88	89	switch (color_mode)
89	90	{
r4679	r4680
97	98	/* X register as the intensity */
98	99	if (data != last_control && data)
99	100	{
100		int xval = cpu_get_reg(space->machine->cpu[0], CCPU_X) & 0x0f;
	101	int xval = cpu_get_reg(cpu, CCPU_X) & 0x0f;
101	102	i = (xval + 1) * 255 / 16;
102	103	vector_color = MAKE_RGB(i,i,i);
103	104	}
r4679	r4680
108	109	/* X register as the intensity */
109	110	if (data != last_control && data)
110	111	{
111		int xval = cpu_get_reg(space->machine->cpu[0], CCPU_X);
	112	int xval = cpu_get_reg(cpu, CCPU_X);
112	113	xval = (~xval >> 2) & 0x3f;
113	114	i = (xval + 1) * 255 / 64;
114	115	vector_color = MAKE_RGB(i,i,i);
r4679	r4680
120	121	/* as 4-4-4 BGR values */
121	122	if (data != last_control && data)
122	123	{
123		int xval = cpu_get_reg(space->machine->cpu[0], CCPU_X);
	124	int xval = cpu_get_reg(cpu, CCPU_X);
124	125	r = (~xval >> 0) & 0x0f;
125	126	r = r * 255 / 15;
126	127	g = (~xval >> 4) & 0x0f;
r4679	r4680
141	142	/* on an IV instruction if data == 0 here */
142	143	if (data != last_control && !data)
143	144	{
144		lastx = cpu_get_reg(space->machine->cpu[0], CCPU_X);
145		lasty = cpu_get_reg(space->machine->cpu[0], CCPU_Y);
	145	lastx = cpu_get_reg(cpu, CCPU_X);
	146	lasty = cpu_get_reg(cpu, CCPU_Y);
146	147	}
147	148
148	149	/* on the rising edge of the data value, latch the Y register */
149	150	/* as 2-3-3 BGR values */
150	151	if (data != last_control && data)
151	152	{
152		int yval = cpu_get_reg(space->machine->cpu[0], CCPU_Y);
	153	int yval = cpu_get_reg(cpu, CCPU_Y);
153	154	r = (~yval >> 0) & 0x07;
154	155	r = r * 255 / 7;
155	156	g = (~yval >> 3) & 0x07;
r4679	r4680
159	160	vector_color = MAKE_RGB(r,g,b);
160	161
161	162	/* restore the original X,Y values */
162		cpu_set_reg(space->machine->cpu[0], CCPU_X, lastx);
163		cpu_set_reg(space->machine->cpu[0], CCPU_Y, lasty);
	163	cpu_set_reg(cpu, CCPU_X, lastx);
	164	cpu_set_reg(cpu, CCPU_Y, lasty);
164	165	}
165	166	}
166	167	break;
r4679	r4680
225	226	VIDEO_UPDATE_CALL(vector);
226	227	vector_clear_list();
227	228
228		ccpu_wdt_timer_trigger(screen->machine->cpu[0]);
	229	ccpu_wdt_timer_trigger(cputag_get_cpu(screen->machine, "maincpu"));
229	230
230	231	return 0;
231	232	}

src/mame/video/toaplan2.c

r4679	r4680
458	458	}
459	459
460	460
461		static void toaplan2_vram_alloc(int controller)
	461	static void toaplan2_vram_alloc(running_machine *machine, int controller)
462	462	{
463		spriteram16_new[controller] = auto_malloc(TOAPLAN2_SPRITERAM_SIZE);
464		memset(spriteram16_new[controller],0,TOAPLAN2_SPRITERAM_SIZE);
	463	spriteram16_new[controller] = auto_alloc_array_clear(machine, UINT16, TOAPLAN2_SPRITERAM_SIZE/2);
	464	spriteram16_now[controller] = auto_alloc_array_clear(machine, UINT16, TOAPLAN2_SPRITERAM_SIZE/2);
	465	topvideoram16[controller] = auto_alloc_array_clear(machine, UINT16, TOAPLAN2_TOP_VRAM_SIZE/2);
	466	fgvideoram16[controller] = auto_alloc_array_clear(machine, UINT16, TOAPLAN2_FG_VRAM_SIZE/2);
	467	bgvideoram16[controller] = auto_alloc_array_clear(machine, UINT16, TOAPLAN2_BG_VRAM_SIZE/2);
465	468
466		spriteram16_now[controller] = auto_malloc(TOAPLAN2_SPRITERAM_SIZE);
467		memset(spriteram16_now[controller],0,TOAPLAN2_SPRITERAM_SIZE);
468
469		topvideoram16[controller] = auto_malloc(TOAPLAN2_TOP_VRAM_SIZE);
470		memset(topvideoram16[controller],0,TOAPLAN2_TOP_VRAM_SIZE);
471
472		fgvideoram16[controller] = auto_malloc(TOAPLAN2_FG_VRAM_SIZE);
473		memset(fgvideoram16[controller],0,TOAPLAN2_FG_VRAM_SIZE);
474
475		bgvideoram16[controller] = auto_malloc(TOAPLAN2_BG_VRAM_SIZE);
476		memset(bgvideoram16[controller],0,TOAPLAN2_BG_VRAM_SIZE);
477
478	469	spriteram16_n[controller] = spriteram16_now[controller];
479	470	}
480	471
481	472	static void toaplan2_vh_start(running_machine *machine, int controller)
482	473	{
483		toaplan2_vram_alloc(controller);
	474	toaplan2_vram_alloc(machine, controller);
484	475
485	476	if (controller == 0)
486	477	{
r4679	r4680
556	547
557	548	VIDEO_START( truxton2_0 )
558	549	{
559		toaplan2_vram_alloc(0);
	550	toaplan2_vram_alloc(machine, 0);
560	551	truxton2_create_tilemaps_0(machine);
561	552
562	553	if (machine->gfx[2]->srcdata == NULL)
r4679	r4680
586	577
587	578	VIDEO_START( bgaregga_0 )
588	579	{
589		toaplan2_vram_alloc(0);
	580	toaplan2_vram_alloc(machine, 0);
590	581	truxton2_create_tilemaps_0(machine);
591	582	tilemap_set_scrolldx(tx_tilemap, 0x1d4, 0x2a);
592	583	defaultOffsets();
r4679	r4680
595	586
596	587	VIDEO_START( batrider_0 )
597	588	{
598		raizing_tx_gfxram16 = auto_malloc(RAIZING_TX_GFXRAM_SIZE);
599		memset(raizing_tx_gfxram16,0,RAIZING_TX_GFXRAM_SIZE);
	589	raizing_tx_gfxram16 = auto_alloc_array_clear(machine, UINT16, RAIZING_TX_GFXRAM_SIZE/2);
600	590	state_save_register_global_pointer(machine, raizing_tx_gfxram16, RAIZING_TX_GFXRAM_SIZE/2);
601	591
602	592	gfx_element_set_source(machine->gfx[2], (UINT8 *)raizing_tx_gfxram16);
603	593
604		toaplan2_vram_alloc(0);
	594	toaplan2_vram_alloc(machine, 0);
605	595	spriteram16_n[0] = spriteram16_new[0];
606	596
607	597	batrider_create_tilemaps_0(machine);
r4679	r4680
1022	1012
1023	1013	if (ym && (sound_get_type(ym) == SOUND_YM3812))
1024	1014	{
1025		cpu_set_input_line(machine->cpu[1], INPUT_LINE_RESET, PULSE_LINE);
	1015	cputag_set_input_line(machine, "audiocpu", INPUT_LINE_RESET, PULSE_LINE);
1026	1016	devtag_reset(machine, "ym");
1027	1017	}
1028	1018	}

src/mame/video/wecleman.c

r4679	r4680
94	94
95	95	***************************************************************************/
96	96
97		static struct sprite *sprite_list_create(int num_sprites)
98		{
99		struct sprite *spr_list;
100
101		spr_list = auto_malloc(num_sprites * sizeof(struct sprite));
102
103		memset(spr_list, 0, num_sprites * sizeof(struct sprite));
104
105		return spr_list;
106		}
107
108	97	static void get_sprite_info(running_machine *machine)
109	98	{
110	99	const pen_t *base_pal = machine->pens;
r4679	r4680
924	913	int i, j;
925	914
926	915	assert(video_screen_get_format(machine->primary_screen) == BITMAP_FORMAT_RGB32);
927		buffer = auto_malloc(0x12c00);   // working buffer for sprite operations
	916	buffer = auto_alloc_array(machine, UINT8, 0x12c00);   // working buffer for sprite operations
928	917
929	918	gameid = 0;
930	919	wecleman_gfx_bank = bank;
r4679	r4680
955	944	}
956	945	}
957	946
958		sprite_list = sprite_list_create(NUM_SPRITES);
	947	sprite_list = auto_alloc_array_clear(machine, struct sprite, NUM_SPRITES);
959	948
960	949	bg_tilemap = tilemap_create(machine, wecleman_get_bg_tile_info,
961	950	tilemap_scan_rows,
r4679	r4680
1026	1015
1027	1016	UINT8 *buffer;
1028	1017
1029		buffer = auto_malloc(0x400);   // reserve 1k for sprite list
	1018	buffer = auto_alloc_array(machine, UINT8, 0x400);   // reserve 1k for sprite list
1030	1019
1031	1020	gameid = 1;
1032	1021	wecleman_gfx_bank = bank;
r4679	r4680
1036	1025
1037	1026	spr_ptr_list = (struct sprite **)buffer;
1038	1027
1039		sprite_list = sprite_list_create(NUM_SPRITES);
	1028	sprite_list = auto_alloc_array_clear(machine, struct sprite, NUM_SPRITES);
1040	1029
1041	1030	K051316_vh_start_0(machine,ZOOMROM0_MEM_REGION,4,FALSE,0,zoom_callback_0);
1042	1031	K051316_vh_start_1(machine,ZOOMROM1_MEM_REGION,4,FALSE,0,zoom_callback_1);

src/mame/video/pastelg.c

r4679	r4680
281	281	int width = video_screen_get_width(machine->primary_screen);
282	282	int height = video_screen_get_height(machine->primary_screen);
283	283
284		pastelg_videoram = auto_malloc(width * height * sizeof(UINT8));
285		pastelg_clut = auto_malloc(0x10 * sizeof(UINT8));
286		memset(pastelg_videoram, 0x00, (width * height * sizeof(UINT8)));
	284	pastelg_videoram = auto_alloc_array_clear(machine, UINT8, width * height);
	285	pastelg_clut = auto_alloc_array(machine, UINT8, 0x10);
287	286	}
288	287
289	288	/******************************************************************************

src/mame/video/munchmo.c

r4679	r4680
50	50
51	51	VIDEO_START( mnchmobl )
52	52	{
53		tmpbitmap = auto_bitmap_alloc(512,512,video_screen_get_format(machine->primary_screen));
	53	tmpbitmap = auto_bitmap_alloc(machine,512,512,video_screen_get_format(machine->primary_screen));
54	54	}
55	55
56	56	static void draw_status(running_machine *machine, bitmap_t *bitmap, const rectangle *cliprect)

src/mame/video/galastrm.c

r4679	r4680
45	45
46	46	VIDEO_START( galastrm )
47	47	{
48		spritelist = auto_malloc(0x4000 * sizeof(*spritelist));
	48	spritelist = auto_alloc_array(machine, struct tempsprite, 0x4000);
49	49
50	50	TC0100SCN_vh_start(machine,1,TC0100SCN_GFX_NUM,48-X_OFFSET,4-Y_OFFSET,0,0,0,0,0);
51	51	TC0480SCP_vh_start(machine,TC0480SCP_GFX_NUM,0,56-X_OFFSET,-63+Y_OFFSET,0,0,0,0,0);
r4679	r4680
239	239
240	240	static void tc0610_draw_scanline(void *dest, INT32 scanline, const poly_extent *extent, const void *extradata, int threadid)
241	241	{
242		const poly_extra_data *extra = extradata;
243		bitmap_t *destmap = dest;
	242	const poly_extra_data *extra = (const poly_extra_data *)extradata;
	243	bitmap_t *destmap = (bitmap_t *)dest;
244	244	UINT16 *framebuffer = BITMAP_ADDR16(destmap, scanline, 0);
245	245	bitmap_t *texbase = extra->texbase;
246	246	int startx = extent->startx;
r4679	r4680
261	261
262	262	static void tc0610_rotate_draw(running_machine *machine, bitmap_t *bitmap, bitmap_t *srcbitmap, const rectangle *clip)
263	263	{
264		poly_extra_data *extra = poly_get_extra_data(poly);
	264	poly_extra_data *extra = (poly_extra_data *)poly_get_extra_data(poly);
265	265	poly_draw_scanline_func callback;
266	266	poly_vertex vert[4];
267	267	int rsx = galastrm_tc0610_ctrl_reg[1][0];

src/mame/video/btoads.c

r4679	r4680
77	77	COMBINE_DATA(&misc_control);
78	78
79	79	/* bit 3 controls sound reset line */
80		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_RESET, (misc_control & 8) ? CLEAR_LINE : ASSERT_LINE);
	80	cputag_set_input_line(space->machine, "audiocpu", INPUT_LINE_RESET, (misc_control & 8) ? CLEAR_LINE : ASSERT_LINE);
81	81	}
82	82
83	83

src/mame/video/lastduel.c

r4679	r4680
287	287
288	288	VIDEO_EOF( lastduel )
289	289	{
290		const address_space *space = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM);
	290	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
291	291
292	292	/* Spriteram is always 1 frame ahead, suggesting buffering.  I can't find
293	293	a register to control this so I assume it happens automatically

src/mame/video/namcos22.c

r4679	r4680
276	276	float du = extent->param[1].dpdx;
277	277	float dv = extent->param[2].dpdx;
278	278	float di = extent->param[3].dpdx;
279		bitmap_t *bitmap = dest;
280		const poly_extra_data *extra = extradata;
	279	bitmap_t *bitmap = (bitmap_t *)dest;
	280	const poly_extra_data *extra = (const poly_extra_data *)extradata;
281	281	int bn = extra->bn * 0x1000;
282	282	const pen_t *pens = extra->pens;
283	283	int fogFactor = 0xff - extra->fogFactor;
r4679	r4680
434	434	}
435	435	}
436	436
437		extra = poly_get_extra_data(poly);
	437	extra = (poly_extra_data *)poly_get_extra_data(poly);
438	438
439	439	extra->pens = &machine->pens[(color&0x7f)<<8];
440	440	extra->bn = textureBank;
r4679	r4680
488	488	int x_index = extent->param[0].start * 65536.0f;
489	489	int y_index = extent->param[1].start * 65536.0f;
490	490	int dx = extent->param[0].dpdx * 65536.0f;
491		const poly_extra_data *extra = extradata;
492		bitmap_t *destmap = destbase;
	491	const poly_extra_data *extra = (const poly_extra_data *)extradata;
	492	bitmap_t *destmap = (bitmap_t *)destbase;
493	493	const pen_t *pal = extra->pens;
494	494	int prioverchar = extra->prioverchar;
495	495	int z = extra->z;
r4679	r4680
591	591	vert[3].p[0] = flipx ? fwidth : 0;
592	592	vert[3].p[1] = flipy ? 0 : fheight;
593	593
594		extra = poly_get_extra_data(poly);
	594	extra = (poly_extra_data *)poly_get_extra_data(poly);
595	595	extra->z = z;
596	596	extra->alpha = alpha;
597	597	extra->prioverchar = prioverchar;
r4679	r4680
826	826	} /* FreeSceneNode */
827	827
828	828	static struct SceneNode *
829		MallocSceneNode( void )
	829	MallocSceneNode( running_machine *machine )
830	830	{
831	831	struct SceneNode *node = mpFreeSceneNode;
832	832	if( node )
r4679	r4680
836	836	else
837	837	{
838	838	#define SCENE_NODE_POOL_SIZE 64
839		struct SceneNode *pSceneNodePool = auto_malloc(sizeof(struct SceneNode)*SCENE_NODE_POOL_SIZE);
	839	struct SceneNode *pSceneNodePool = auto_alloc_array(machine, struct SceneNode, SCENE_NODE_POOL_SIZE);
840	840	{
841	841	int i;
842	842	for( i=0; i<SCENE_NODE_POOL_SIZE; i++ )
843	843	{
844	844	FreeSceneNode( &pSceneNodePool[i] );
845	845	}
846		return MallocSceneNode();
	846	return MallocSceneNode(machine);
847	847	}
848	848	}
849	849	memset( node, 0, sizeof(*node) );
r4679	r4680
851	851	} /* MallocSceneNode */
852	852
853	853	static struct SceneNode *
854		NewSceneNode( UINT32 zsortvalue24, SceneNodeType type )
	854	NewSceneNode( running_machine *machine, UINT32 zsortvalue24, SceneNodeType type )
855	855	{
856	856	struct SceneNode *node = &mSceneRoot;
857	857	int i;
r4679	r4680
861	861	struct SceneNode *next = node->data.nonleaf.next[hash];
862	862	if( !next )
863	863	{ /* lazily allocate tree node for this radix */
864		next = MallocSceneNode();
	864	next = MallocSceneNode(machine);
865	865	next->type = eSCENENODE_NONLEAF;
866	866	node->data.nonleaf.next[hash] = next;
867	867	}
r4679	r4680
876	876	}
877	877	else
878	878	{
879		struct SceneNode *leaf = MallocSceneNode();
	879	struct SceneNode *leaf = MallocSceneNode(machine);
880	880	leaf->type = type;
881	881	#if 0
882	882	leaf->nextInBucket = node->nextInBucket;
r4679	r4680
1125	1125	} /* PatchTexture */
1126	1126
1127	1127	void
1128		namcos22_draw_direct_poly( const UINT16 *pSource )
	1128	namcos22_draw_direct_poly( running_machine *machine, const UINT16 *pSource )
1129	1129	{
1130	1130	/**
1131	1131	* word#0:
r4679	r4680
1153	1153	*    --xx xxxx // zpos
1154	1154	*/
1155	1155	INT32 zsortvalue24 = ((pSource[1]&0xfff)<<12)|(pSource[0]&0xfff);
1156		struct SceneNode *node = NewSceneNode(zsortvalue24,eSCENENODE_QUAD3D);
	1156	struct SceneNode *node = NewSceneNode(machine, zsortvalue24,eSCENENODE_QUAD3D);
1157	1157	int i;
1158	1158	node->data.quad3d.flags = ((pSource[3]&0x7f00)*2)|(pSource[3]&3);
1159	1159	node->data.quad3d.cmode = (pSource[2]&0x00f0)>>4;
r4679	r4680
1216	1216	} /* namcos22_draw_direct_poly */
1217	1217
1218	1218	static void
1219		Prepare3dTexture( void *pTilemapROM, void *pTextureROM )
	1219	Prepare3dTexture( running_machine *machine, void *pTilemapROM, void *pTextureROM )
1220	1220	{
1221	1221	int i;
1222	1222	assert( pTilemapROM && pTextureROM );
1223	1223	{ /* following setup is Namco System 22 specific */
1224	1224	const UINT8 *pPackedTileAttr = 0x200000 + (UINT8 *)pTilemapROM;
1225		UINT8 *pUnpackedTileAttr = auto_malloc(0x080000*2);
	1225	UINT8 *pUnpackedTileAttr = auto_alloc_array(machine, UINT8, 0x080000*2);
1226	1226	{
1227	1227	InitXYAttrToPixel();
1228	1228	mpTextureTileMapAttr = pUnpackedTileAttr;
r4679	r4680
1232	1232	*pUnpackedTileAttr++ = (*pPackedTileAttr)&0xf;
1233	1233	pPackedTileAttr++;
1234	1234	}
1235		mpTextureTileMap16 = pTilemapROM;
1236		mpTextureTileData = pTextureROM;
	1235	mpTextureTileMap16 = (UINT16 *)pTilemapROM;
	1236	mpTextureTileData = (UINT8 *)pTextureROM;
1237	1237	PatchTexture();
1238	1238	}
1239	1239	}
r4679	r4680
1241	1241
1242	1242	static void
1243	1243	DrawSpritesHelper(
	1244	running_machine *machine,
1244	1245	bitmap_t *bitmap,
1245	1246	const rectangle *cliprect,
1246	1247	const UINT32 *pSource,
r4679	r4680
1312	1313	}
1313	1314
1314	1315	{
1315		struct SceneNode *node = NewSceneNode(zcoord,eSCENENODE_SPRITE);
	1316	struct SceneNode *node = NewSceneNode(machine, zcoord,eSCENENODE_SPRITE);
1316	1317	node->data.sprite.tile = tile;
1317	1318	node->data.sprite.pri = cz&0x80;
1318	1319	//              node->data.sprite.pri = (color&0x80);
r4679	r4680
1336	1337	} /* DrawSpritesHelper */
1337	1338
1338	1339	static void
1339		DrawSprites( bitmap_t *bitmap, const rectangle *cliprect )
	1340	DrawSprites( running_machine *machine, bitmap_t *bitmap, const rectangle *cliprect )
1340	1341	{
1341	1342	/*
1342	1343	// time crisis:
r4679	r4680
1422	1423
1423	1424	if( enable==6 /*&& namcos22_gametype!=NAMCOS22_AIR_COMBAT22*/ )
1424	1425	{
1425		DrawSpritesHelper( bitmap, cliprect, pSource, pPal, num_sprites, deltax, deltay );
	1426	DrawSpritesHelper( machine, bitmap, cliprect, pSource, pPal, num_sprites, deltax, deltay );
1426	1427	}
1427	1428
1428	1429	/* VICS RAM provides two additional banks */
r4679	r4680
1445	1446	{
1446	1447	pSource = &namcos22_vics_data[(namcos22_vics_control[0x48/4]&0xffff)/4];
1447	1448	pPal    = &namcos22_vics_data[(namcos22_vics_control[0x58/4]&0xffff)/4];
1448		DrawSpritesHelper( bitmap, cliprect, pSource, pPal, num_sprites, deltax, deltay );
	1449	DrawSpritesHelper( machine, bitmap, cliprect, pSource, pPal, num_sprites, deltax, deltay );
1449	1450	}
1450	1451
1451	1452	num_sprites = (namcos22_vics_control[0x60/4]&0xffff)/0x10;
r4679	r4680
1453	1454	{
1454	1455	pSource = &namcos22_vics_data[(namcos22_vics_control[0x68/4]&0xffff)/4];
1455	1456	pPal    = &namcos22_vics_data[(namcos22_vics_control[0x78/4]&0xffff)/4];
1456		DrawSpritesHelper( bitmap, cliprect, pSource, pPal, num_sprites, deltax, deltay );
	1457	DrawSpritesHelper( machine, bitmap, cliprect, pSource, pPal, num_sprites, deltax, deltay );
1457	1458	}
1458	1459	} /* DrawSprites */
1459	1460
r4679	r4680
1613	1614	*/
1614	1615	static void
1615	1616	BlitQuadHelper(
	1617	running_machine *machine,
1616	1618	bitmap_t *bitmap,
1617	1619	unsigned color,
1618	1620	unsigned addr,
r4679	r4680
1729	1731	zsortvalue24 |= (absolutePriority<<21);
1730	1732
1731	1733	{
1732		struct SceneNode *node = NewSceneNode(zsortvalue24,eSCENENODE_QUAD3D);
	1734	struct SceneNode *node = NewSceneNode(machine, zsortvalue24,eSCENENODE_QUAD3D);
1733	1735	node->data.quad3d.cmode = (v[0].u>>12)&0xf;
1734	1736	node->data.quad3d.textureBank = (v[0].v>>12)&0xf;
1735	1737	node->data.quad3d.color = (color>>8)&0xff;
r4679	r4680
1779	1781	} /* RegisterNormals */
1780	1782
1781	1783	static void
1782		BlitQuads( bitmap_t *bitmap, INT32 addr, float m[4][4], INT32 base )
	1784	BlitQuads( running_machine *machine, bitmap_t *bitmap, INT32 addr, float m[4][4], INT32 base )
1783	1785	{
1784	1786	int numAdditionalNormals = 0;
1785	1787	int chunkLength = GetPolyData(addr++);
r4679	r4680
1833	1835	flags = GetPolyData(addr+1);
1834	1836	color = GetPolyData(addr+2);
1835	1837	bias = 0;
1836		BlitQuadHelper( bitmap,color,addr+3,m,bias,flags,packetFormat );
	1838	BlitQuadHelper( machine,bitmap,color,addr+3,m,bias,flags,packetFormat );
1837	1839	break;
1838	1840
1839	1841	case 0x18:
r4679	r4680
1846	1848	flags = GetPolyData(addr+1);
1847	1849	color = GetPolyData(addr+2);
1848	1850	bias  = GetPolyData(addr+3);
1849		BlitQuadHelper( bitmap,color,addr+4,m,bias,flags,packetFormat );
	1851	BlitQuadHelper( machine,bitmap,color,addr+4,m,bias,flags,packetFormat );
1850	1852	break;
1851	1853
1852	1854	case 0x10: /* vertex lighting */
r4679	r4680
1884	1886	} /* BlitQuads */
1885	1887
1886	1888	static void
1887		BlitPolyObject( bitmap_t *bitmap, int code, float M[4][4] )
	1889	BlitPolyObject( running_machine *machine, bitmap_t *bitmap, int code, float M[4][4] )
1888	1890	{
1889	1891	unsigned addr1 = GetPolyData(code);
1890	1892	mLitSurfaceCount = 0;
r4679	r4680
1894	1896	INT32 addr2 = GetPolyData(addr1++);
1895	1897	if( addr2<0 )
1896	1898	break;
1897		BlitQuads( bitmap, addr2, M, code );
	1899	BlitQuads( machine, bitmap, addr2, M, code );
1898	1900	}
1899	1901	} /* BlitPolyObject */
1900	1902
r4679	r4680
2002	2004	} /* HandleBB0003 */
2003	2005
2004	2006	static void
2005		Handle200002( bitmap_t *bitmap, const INT32 *pSource )
	2007	Handle200002( running_machine *machine, bitmap_t *bitmap, const INT32 *pSource )
2006	2008	{
2007	2009	if( mPrimitiveID>=0x45 )
2008	2010	{
r4679	r4680
2027	2029	m[3][2] = pSource[0xc]; /* zpos */
2028	2030
2029	2031	matrix3d_Multiply( m, mViewMatrix );
2030		BlitPolyObject( bitmap, mPrimitiveID, m );
	2032	BlitPolyObject( machine, bitmap, mPrimitiveID, m );
2031	2033	}
2032	2034	else if( mPrimitiveID !=0 && mPrimitiveID !=2 )
2033	2035	{
r4679	r4680
2068	2070	} /* Handle233002 */
2069	2071
2070	2072	static void
2071		SimulateSlaveDSP( bitmap_t *bitmap )
	2073	SimulateSlaveDSP( running_machine *machine, bitmap_t *bitmap )
2072	2074	{
2073	2075	const INT32 *pSource = 0x300 + (INT32 *)namcos22_polygonram;
2074	2076	INT16 len;
r4679	r4680
2105	2107	break;
2106	2108
2107	2109	case 0x0d:
2108		Handle200002( bitmap, pSource ); /* render primitive */
	2110	Handle200002( machine, bitmap, pSource ); /* render primitive */
2109	2111	break;
2110	2112
2111	2113	default:
r4679	r4680
2133	2135	} /* SimulateSlaveDSP */
2134	2136
2135	2137	static void
2136		DrawPolygons( bitmap_t *bitmap )
	2138	DrawPolygons( running_machine *machine, bitmap_t *bitmap )
2137	2139	{
2138	2140	if( mbDSPisActive )
2139	2141	{
2140		SimulateSlaveDSP( bitmap );
	2142	SimulateSlaveDSP( machine, bitmap );
2141	2143	poly_wait(poly, "DrawPolygons");
2142	2144	}
2143	2145	} /* DrawPolygons */
r4679	r4680
2205	2207
2206	2208	for (code = 0; code < machine->gfx[GFX_TEXTURE_TILE]->total_elements; code++)
2207	2209	gfx_element_decode(machine->gfx[GFX_TEXTURE_TILE], code);
2208		Prepare3dTexture(memory_region(machine, "textilemap"), machine->gfx[GFX_TEXTURE_TILE]->gfxdata );
2209		dirtypal = auto_malloc(NAMCOS22_PALETTE_SIZE/4);
	2210	Prepare3dTexture(machine, memory_region(machine, "textilemap"), machine->gfx[GFX_TEXTURE_TILE]->gfxdata );
	2211	dirtypal = auto_alloc_array(machine, UINT8, NAMCOS22_PALETTE_SIZE/4);
2210	2212	mPtRomSize = memory_region_length(machine, "pointrom")/3;
2211	2213	mpPolyL = memory_region(machine, "pointrom");
2212	2214	mpPolyM = mpPolyL + mPtRomSize;
r4679	r4680
2232	2234	VIDEO_START( namcos22s )
2233	2235	{
2234	2236	mbSuperSystem22 = 1;
2235		namcos22_czram[0] = auto_malloc( 0x200 );
2236		namcos22_czram[1] = auto_malloc( 0x200 );
2237		namcos22_czram[2] = auto_malloc( 0x200 );
2238		namcos22_czram[3] = auto_malloc( 0x200 );
	2237	namcos22_czram[0] = auto_alloc_array(machine, UINT16, 0x200/2 );
	2238	namcos22_czram[1] = auto_alloc_array(machine, UINT16, 0x200/2 );
	2239	namcos22_czram[2] = auto_alloc_array(machine, UINT16, 0x200/2 );
	2240	namcos22_czram[3] = auto_alloc_array(machine, UINT16, 0x200/2 );
2239	2241	VIDEO_START_CALL(common);
2240	2242	}
2241	2243
r4679	r4680
2247	2249	bitmap_fill( bitmap, cliprect , bgColor);
2248	2250	UpdatePaletteS(screen->machine);
2249	2251	DrawCharacterLayer(screen->machine, bitmap, cliprect );
2250		DrawPolygons( bitmap );
2251		DrawSprites( bitmap, cliprect );
	2252	DrawPolygons( screen->machine, bitmap );
	2253	DrawSprites( screen->machine, bitmap, cliprect );
2252	2254	RenderScene(screen->machine, bitmap );
2253	2255	DrawTranslucentCharacters( bitmap, cliprect );
2254	2256	ApplyGamma( screen->machine, bitmap );
r4679	r4680
2259	2261	FILE *f = fopen( "dump.txt", "wb" );
2260	2262	if( f )
2261	2263	{
2262		const address_space *space = cpu_get_address_space(screen->machine->cpu[0], ADDRESS_SPACE_PROGRAM);
	2264	const address_space *space = cputag_get_address_space(screen->machine, "maincpu", ADDRESS_SPACE_PROGRAM);
2263	2265
2264	2266	{
2265	2267	int i,bank;
r4679	r4680
2298	2300	bitmap_fill( bitmap, cliprect , get_black_pen(screen->machine));
2299	2301	UpdatePalette(screen->machine);
2300	2302	DrawCharacterLayer(screen->machine, bitmap, cliprect );
2301		DrawPolygons( bitmap );
	2303	DrawPolygons( screen->machine, bitmap );
2302	2304	RenderScene(screen->machine, bitmap);
2303	2305	DrawTranslucentCharacters( bitmap, cliprect );
2304	2306	ApplyGamma( screen->machine, bitmap );
r4679	r4680
2309	2311	FILE *f = fopen( "dump.txt", "wb" );
2310	2312	if( f )
2311	2313	{
2312		const address_space *space = cpu_get_address_space(screen->machine->cpu[0], ADDRESS_SPACE_PROGRAM);
	2314	const address_space *space = cputag_get_address_space(screen->machine, "maincpu", ADDRESS_SPACE_PROGRAM);
2313	2315
2314	2316	//         Dump(space, f,0x90000000, 0x90000003, "led?" );
2315	2317	//         Dump(space, f,0x90010000, 0x90017fff, "cz_ram");

src/mame/video/galaxold.c

r4679	r4680
924	924	dambustr_tmpbitmap = video_screen_auto_bitmap_alloc(machine->primary_screen);
925	925
926	926	/* make a copy of the tilemap to emulate background priority */
927		dambustr_videoram2 = auto_malloc(0x0400);
	927	dambustr_videoram2 = auto_alloc_array(machine, UINT8, 0x0400);
928	928	dambustr_tilemap2 = tilemap_create(machine, dambustr_get_tile_info2,tilemap_scan_rows,8,8,32,32);
929	929
930	930	tilemap_set_transparent_pen(dambustr_tilemap2,0);

src/mame/video/atarisy1.c

r4679	r4680
248	248	/* sound CPU reset */
249	249	if (diff & 0x0080)
250	250	{
251		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_RESET, (newselect & 0x0080) ? CLEAR_LINE : ASSERT_LINE);
	251	cputag_set_input_line(space->machine, "audiocpu", INPUT_LINE_RESET, (newselect & 0x0080) ? CLEAR_LINE : ASSERT_LINE);
252	252	if (!(newselect & 0x0080)) atarigen_sound_reset(space->machine);
253	253	}
254	254
r4679	r4680
405	405
406	406	static TIMER_CALLBACK( int3off_callback )
407	407	{
408		const address_space *space = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM);
	408	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
409	409
410	410	/* clear the state */
411	411	atarigen_scanline_int_ack_w(space, 0, 0, 0xffff);
r4679	r4680
417	417	int scanline = param;
418	418
419	419	/* update the state */
420		atarigen_scanline_int_gen(machine->cpu[0]);
	420	atarigen_scanline_int_gen(cputag_get_cpu(machine, "maincpu"));
421	421
422	422	/* set a timer to turn it off */
423	423	timer_adjust_oneshot(int3off_timer, video_screen_get_scan_period(machine->primary_screen), 0);

src/mame/video/dec0.c

r4679	r4680
712	712	VIDEO_START( dec0 )
713	713	{
714	714	VIDEO_START_CALL(dec0_nodma);
715		dec0_spriteram=auto_malloc(0x800);
	715	dec0_spriteram=auto_alloc_array(machine, UINT16, 0x800/2);
716	716	}
717	717
718	718	/******************************************************************************/

src/mame/video/ssv.c

r4679	r4680
202	202	{
203	203	VIDEO_START_CALL(ssv);
204	204
205		eaglshot_gfxram      =   (UINT16*)auto_malloc(16 * 0x40000);
	205	eaglshot_gfxram      =   auto_alloc_array(machine, UINT16, 16 * 0x40000 / 2);
206	206
207	207	gfx_element_set_source(machine->gfx[0], (UINT8 *)eaglshot_gfxram);
208	208	gfx_element_set_source(machine->gfx[1], (UINT8 *)eaglshot_gfxram);
r4679	r4680
226	226	{
227	227	VIDEO_START_CALL(ssv);
228	228
229		eaglshot_gfxram      =   (UINT16*)auto_malloc(4 * 0x100000);
	229	eaglshot_gfxram      =   auto_alloc_array(machine, UINT16, 4 * 0x100000 / 2);
230	230
231	231	machine->gfx[2]->color_granularity = 64; /* 256 colour sprites with palette selectable on 64 colour boundaries */
232	232	gfx_element_set_source(machine->gfx[2], (UINT8 *)eaglshot_gfxram);

src/mame/video/tceptor.c

r4679	r4680
263	263	int len = 0x8000;
264	264	int i;
265	265
266		buffer = malloc_or_die(len);
	266	buffer = alloc_array_or_die(UINT8, len);
267	267
268	268	/* expand rom tc2-19.10d */
269	269	for (i = 0; i < len / 2; i++)
r4679	r4680
282	282	static void decode_sprite(running_machine *machine, int gfx_index, const gfx_layout *layout, const void *data)
283	283	{
284	284	/* decode the graphics */
285		machine->gfx[gfx_index] = gfx_element_alloc(machine, layout, data, 64, 1024);
	285	machine->gfx[gfx_index] = gfx_element_alloc(machine, layout, (const UINT8 *)data, 64, 1024);
286	286	}
287	287
288	288	// fix sprite order
r4679	r4680
310	310	UINT8 *dst;
311	311	int i, y;
312	312
313		dst = auto_malloc(len);
	313	dst = auto_alloc_array(machine, UINT8, len);
314	314
315	315	for (i = 0; i < len / (4*4*16); i++)
316	316	for (y = 0; y < 16; y++)
r4679	r4680
363	363	UINT8 *dst;
364	364	int i;
365	365
366		dst = auto_malloc(len);
	366	dst = auto_alloc_array(machine, UINT8, len);
367	367
368	368	memset(dst, 0, len);
369	369
r4679	r4680
385	385	{
386	386	int gfx_index;
387	387
388		tceptor_sprite_ram_buffered = auto_malloc(0x200);
389		memset(tceptor_sprite_ram_buffered, 0, 0x200);
	388	tceptor_sprite_ram_buffered = auto_alloc_array_clear(machine, UINT16, 0x200/2);
390	389
391	390	/* find first empty slot to decode gfx */
392	391	for (gfx_index = 0; gfx_index < MAX_GFX_ELEMENTS; gfx_index++)

src/mame/video/vindictr.c

r4679	r4680
191	191	break;
192	192
193	193	case 6:      /* /VIRQ */
194		atarigen_scanline_int_gen(screen->machine->cpu[0]);
	194	atarigen_scanline_int_gen(cputag_get_cpu(screen->machine, "maincpu"));
195	195	break;
196	196
197	197	case 7:      /* /PFVS */

src/mame/video/metro.c

r4679	r4680
390	390	static int metro_sprite_xoffs, metro_sprite_yoffs;
391	391
392	392
393		static void alloc_empty_tiles(void)
	393	static void alloc_empty_tiles(running_machine *machine)
394	394	{
395	395	int code,i;
396	396
397		empty_tiles = auto_malloc(16*16*16);
	397	empty_tiles = auto_alloc_array(machine, UINT8, 16*16*16);
398	398
399	399	for (code = 0;code < 0x10;code++)
400	400	for (i = 0;i < 16*16;i++)
r4679	r4680
407	407	support_16x16 = 0;
408	408	has_zoom = 0;
409	409
410		alloc_empty_tiles();
411		metro_tiletable_old = auto_malloc(metro_tiletable_size);
412		dirtyindex = auto_malloc(metro_tiletable_size/4);
	410	alloc_empty_tiles(machine);
	411	metro_tiletable_old = auto_alloc_array(machine, UINT16, metro_tiletable_size/2);
	412	dirtyindex = auto_alloc_array(machine, UINT8, metro_tiletable_size/4);
413	413
414	414	bg_tilemap[0] = tilemap_create(machine, get_tile_info_0,tilemap_scan_rows,8,8,WIN_NX,WIN_NY);
415	415	bg_tilemap[1] = tilemap_create(machine, get_tile_info_1,tilemap_scan_rows,8,8,WIN_NX,WIN_NY);
r4679	r4680
436	436	support_16x16 = 0;
437	437	has_zoom = 0;
438	438
439		alloc_empty_tiles();
440		metro_tiletable_old = auto_malloc(metro_tiletable_size);
441		dirtyindex = auto_malloc(metro_tiletable_size/4);
	439	alloc_empty_tiles(machine);
	440	metro_tiletable_old = auto_alloc_array(machine, UINT16, metro_tiletable_size/2);
	441	dirtyindex = auto_alloc_array(machine, UINT8, metro_tiletable_size/4);
442	442
443	443	bg_tilemap[0] = tilemap_create(machine, get_tile_info_0_8bit,tilemap_scan_rows,8,8,WIN_NX,WIN_NY);
444	444	bg_tilemap[1] = tilemap_create(machine, get_tile_info_1_8bit,tilemap_scan_rows,8,8,WIN_NX,WIN_NY);
r4679	r4680
468	468	support_16x16 = 1;
469	469	has_zoom = 0;
470	470
471		alloc_empty_tiles();
472		metro_tiletable_old = auto_malloc(metro_tiletable_size);
473		dirtyindex = auto_malloc(metro_tiletable_size/4);
	471	alloc_empty_tiles(machine);
	472	metro_tiletable_old = auto_alloc_array(machine, UINT16, metro_tiletable_size/2);
	473	dirtyindex = auto_alloc_array(machine, UINT8, metro_tiletable_size/4);
474	474
475	475	bg_tilemap[0] = tilemap_create(machine, get_tile_info_0_8bit,tilemap_scan_rows,8,8,WIN_NX,WIN_NY);
476	476	bg_tilemap[1] = tilemap_create(machine, get_tile_info_1_8bit,tilemap_scan_rows,8,8,WIN_NX,WIN_NY);

src/mame/video/midvunit.c

r4679	r4680
59	59
60	60	if (scanline != -1)
61	61	{
62		cpu_set_input_line(machine->cpu[0], 0, ASSERT_LINE);
	62	cputag_set_input_line(machine, "maincpu", 0, ASSERT_LINE);
63	63	timer_adjust_oneshot(scanline_timer, video_screen_get_time_until_pos(machine->primary_screen, scanline + 1, 0), scanline);
64	64	timer_set(machine, ATTOTIME_IN_HZ(25000000), NULL, -1, scanline_timer_cb);
65	65	}
66	66	else
67		cpu_set_input_line(machine->cpu[0], 0, CLEAR_LINE);
	67	cputag_set_input_line(machine, "maincpu", 0, CLEAR_LINE);
68	68	}
69	69
70	70
r4679	r4680
97	97
98	98	static void render_flat(void *destbase, INT32 scanline, const poly_extent *extent, const void *extradata, int threadid)
99	99	{
100		const poly_extra_data *extra = extradata;
	100	const poly_extra_data *extra = (const poly_extra_data *)extradata;
101	101	UINT16 pixdata = extra->pixdata;
102	102	int xstep = extra->dither + 1;
103	103	UINT16 *dest = (UINT16 *)destbase + scanline * 512;
r4679	r4680
129	129
130	130	static void render_tex(void *destbase, INT32 scanline, const poly_extent *extent, const void *extradata, int threadid)
131	131	{
132		const poly_extra_data *extra = extradata;
	132	const poly_extra_data *extra = (const poly_extra_data *)extradata;
133	133	UINT16 pixdata = extra->pixdata & 0xff00;
134	134	const UINT8 *texbase = extra->texbase;
135	135	int xstep = extra->dither + 1;
r4679	r4680
167	167
168	168	static void render_textrans(void *destbase, INT32 scanline, const poly_extent *extent, const void *extradata, int threadid)
169	169	{
170		const poly_extra_data *extra = extradata;
	170	const poly_extra_data *extra = (const poly_extra_data *)extradata;
171	171	UINT16 pixdata = extra->pixdata & 0xff00;
172	172	const UINT8 *texbase = extra->texbase;
173	173	int xstep = extra->dither + 1;
r4679	r4680
207	207
208	208	static void render_textransmask(void *destbase, INT32 scanline, const poly_extent *extent, const void *extradata, int threadid)
209	209	{
210		const poly_extra_data *extra = extradata;
	210	const poly_extra_data *extra = (const poly_extra_data *)extradata;
211	211	UINT16 pixdata = extra->pixdata;
212	212	const UINT8 *texbase = extra->texbase;
213	213	int xstep = extra->dither + 1;
r4679	r4680
302	302
303	303	static void process_dma_queue(running_machine *machine)
304	304	{
305		poly_extra_data *extra = poly_get_extra_data(poly);
	305	poly_extra_data *extra = (poly_extra_data *)poly_get_extra_data(poly);
306	306	UINT16 *dest = &midvunit_videoram[(page_control & 4) ? 0x40000 : 0x00000];
307	307	int textured = ((dma_data[0] & 0x300) == 0x100);
308	308	poly_draw_scanline_func callback;

src/mame/video/suna16.c

r4679	r4680
92	92
93	93	VIDEO_START( suna16 )
94	94	{
95		paletteram16 = auto_malloc( machine->config->total_colors * sizeof(UINT16) );
	95	paletteram16 = auto_alloc_array(machine, UINT16, machine->config->total_colors);
96	96	}
97	97
98	98	READ16_HANDLER( suna16_paletteram16_r )

src/mame/video/shadfrce.c

r4679	r4680
75	75
76	76	shadfrce_bg1tilemap = tilemap_create(machine, get_shadfrce_bg1tile_info,tilemap_scan_rows, 16, 16,32,32);
77	77
78		shadfrce_spvideoram_old = auto_malloc(spriteram_size);
	78	shadfrce_spvideoram_old = auto_alloc_array(machine, UINT16, spriteram_size/2);
79	79	}
80	80
81	81	WRITE16_HANDLER ( shadfrce_bg0scrollx_w )

src/mame/video/attckufo.c

r4679	r4680
136	136
137	137	VIDEO_UPDATE( attckufo )
138	138	{
139		const address_space *space = cpu_get_address_space(screen->machine->cpu[0], ADDRESS_SPACE_PROGRAM);
	139	const address_space *space = cputag_get_address_space(screen->machine, "maincpu", ADDRESS_SPACE_PROGRAM);
140	140	int x, y, yy;
141	141
142	142	for (y = cliprect->min_y & ~7; y <= cliprect->max_y; y += 8)

src/mame/video/eolith.c

r4679	r4680
30	30
31	31	VIDEO_START( eolith )
32	32	{
33		vram = auto_malloc(0x40000*2);
	33	vram = auto_alloc_array(machine, UINT32, 0x40000*2/4);
34	34	}
35	35
36	36	VIDEO_UPDATE( eolith )

src/mame/video/gtia.c

r4679	r4680
154	154	static void gtia_reset(running_machine *machine)
155	155	{
156	156	int i;
157		const address_space *space = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM);
	157	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
158	158
159	159	/* reset the GTIA read/write/helper registers */
160	160	for (i = 0; i < 32; i++)

src/mame/video/bigevglf.c

r4679	r4680
66	66	tmp_bitmap[1] = video_screen_auto_bitmap_alloc(machine->primary_screen);
67	67	tmp_bitmap[2] = video_screen_auto_bitmap_alloc(machine->primary_screen);
68	68	tmp_bitmap[3] = video_screen_auto_bitmap_alloc(machine->primary_screen);
69		vidram = auto_malloc(0x100*0x100 * 4);
	69	vidram = auto_alloc_array(machine, UINT8, 0x100*0x100 * 4);
70	70	}
71	71
72	72	static void draw_sprites(running_machine *machine, bitmap_t *bitmap, const rectangle *cliprect)

src/mame/video/commando.c

r4679	r4680
59	59	coin_counter_w(1, data & 0x02);
60	60
61	61	// bit 4 resets the sound CPU
62		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_RESET, (data & 0x10) ? ASSERT_LINE : CLEAR_LINE);
	62	cputag_set_input_line(space->machine, "audiocpu", INPUT_LINE_RESET, (data & 0x10) ? ASSERT_LINE : CLEAR_LINE);
63	63
64	64	// bit 7 flips screen
65	65	flip_screen_set(space->machine, data & 0x80);
r4679	r4680
136	136
137	137	VIDEO_EOF( commando )
138	138	{
139		const address_space *space = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM);
	139	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
140	140
141	141	buffer_spriteram_w(space, 0, 0);
142	142	}

src/mame/video/atarisy2.c

r4679	r4680
116	116	};
117	117
118	118	/* allocate banked memory */
119		vram = auto_malloc(0x8000);
	119	vram = auto_alloc_array(machine, UINT16, 0x8000/2);
120	120	memset(vram, 0, 0x8000);
121	121	atarigen_alpha = &vram[0x0000];
122	122	atarimo_0_spriteram = &vram[0x0c00];

src/mame/video/ninjakd2.c

r4679	r4680
5	5	UINT8* ninjakd2_fg_videoram;
6	6
7	7	static int next_sprite_overdraw_enabled;
8		static int stencil_palette;
	8	static int (*stencil_compare_function) (UINT16 pal);
9	9	static int sprites_updated;
10	10	static bitmap_t *sp_bitmap;
11	11	// in robokid and omegaf big sprites are laid out differently in ROM
r4679	r4680
25	25	static UINT8* robokid_bg1_videoram;
26	26	static UINT8* robokid_bg2_videoram;
27	27
	28	#define TRANSPARENTCODE (15)
28	29
29	30	/*************************************
30	31	*
r4679	r4680
126	127	*
127	128	*************************************/
128	129
129		static void videoram_alloc(const running_machine* const machine, int const size)
	130	static void videoram_alloc(running_machine* const machine, int const size)
130	131	{
131	132	if (size)
132	133	{
133	134	/* create video ram */
134		robokid_bg0_videoram = auto_malloc(size);
135		memset(robokid_bg0_videoram, 0x00, size);
136
137		robokid_bg1_videoram = auto_malloc(size);
138		memset(robokid_bg1_videoram, 0x00, size);
139
140		robokid_bg2_videoram = auto_malloc(size);
141		memset(robokid_bg2_videoram, 0x00, size);
	135	robokid_bg0_videoram = auto_alloc_array_clear(machine, UINT8, size);
	136	robokid_bg1_videoram = auto_alloc_array_clear(machine, UINT8, size);
	137	robokid_bg2_videoram = auto_alloc_array_clear(machine, UINT8, size);
142	138	}
143	139
144	140	sp_bitmap = video_screen_auto_bitmap_alloc(machine->primary_screen);
145	141	}
146	142
	143	static int stencil_ninjakd2( UINT16 pal );
	144	static int stencil_mnight(   UINT16 pal );
	145	static int stencil_arkarea(  UINT16 pal );
	146	static int stencil_robokid(  UINT16 pal );
	147	static int stencil_omegaf(   UINT16 pal );
	148
147	149	VIDEO_START( ninjakd2 )
148	150	{
149	151	videoram_alloc(machine, 0);
r4679	r4680
151	153	fg_tilemap = tilemap_create(         machine, get_fg_tile_info, tilemap_scan_rows,   8,  8, 32, 32);
152	154	bg_tilemap = tilemap_create(machine, ninjakd2_get_bg_tile_info, tilemap_scan_rows,  16, 16, 32, 32);
153	155
154		tilemap_set_transparent_pen(fg_tilemap, 15);
	156	tilemap_set_transparent_pen(fg_tilemap, TRANSPARENTCODE);
155	157
156	158	robokid_sprites = 0;
157		stencil_palette = 0xf0;  // stencil palette when overdraw mode = 0xf (watched bit 7-4)
	159	stencil_compare_function = stencil_ninjakd2 ;
158	160	}
159	161
160	162	VIDEO_START( mnight )
r4679	r4680
164	166	fg_tilemap = tilemap_create(       machine, get_fg_tile_info, tilemap_scan_rows,   8,  8, 32, 32);
165	167	bg_tilemap = tilemap_create(machine, mnight_get_bg_tile_info, tilemap_scan_rows,  16, 16, 32, 32);
166	168
167		tilemap_set_transparent_pen(fg_tilemap, 15);
	169	tilemap_set_transparent_pen(fg_tilemap, TRANSPARENTCODE);
168	170
169	171	robokid_sprites = 0;
170		stencil_palette = 0xf0;  // stencil palette when overdraw mode = 0xf (watched bit 7-4)
	172	stencil_compare_function = stencil_mnight ;
171	173	}
172	174
	175	VIDEO_START( arkarea )
	176	{
	177	videoram_alloc(machine, 0);
	178
	179	fg_tilemap = tilemap_create(       machine, get_fg_tile_info, tilemap_scan_rows,   8,  8, 32, 32);
	180	bg_tilemap = tilemap_create(machine, mnight_get_bg_tile_info, tilemap_scan_rows,  16, 16, 32, 32);
	181
	182	tilemap_set_transparent_pen(fg_tilemap, TRANSPARENTCODE);
	183
	184	robokid_sprites = 0;
	185	stencil_compare_function = stencil_arkarea ;
	186	}
	187
173	188	VIDEO_START( robokid )
174	189	{
175	190	bank_mask = 1;
r4679	r4680
181	196	bg1_tilemap = tilemap_create(machine, robokid_get_bg1_tile_info, robokid_bg_scan,    16, 16, 32, 32);
182	197	bg2_tilemap = tilemap_create(machine, robokid_get_bg2_tile_info, robokid_bg_scan,    16, 16, 32, 32);
183	198
184		tilemap_set_transparent_pen(fg_tilemap,  15);
185		tilemap_set_transparent_pen(bg1_tilemap, 15);
186		tilemap_set_transparent_pen(bg2_tilemap, 15);
	199	tilemap_set_transparent_pen(fg_tilemap,  TRANSPARENTCODE);
	200	tilemap_set_transparent_pen(bg1_tilemap, TRANSPARENTCODE);
	201	tilemap_set_transparent_pen(bg2_tilemap, TRANSPARENTCODE);
187	202
188	203	robokid_sprites = 1;
189		stencil_palette = 0xf0;  // stencil palette when overdraw mode = 0xf (watched bit 7-4)
	204	stencil_compare_function = stencil_robokid ;
190	205	}
191	206
192	207	VIDEO_START( omegaf )
r4679	r4680
200	215	bg1_tilemap = tilemap_create(machine, robokid_get_bg1_tile_info, omegaf_bg_scan,     16, 16, 128, 32);
201	216	bg2_tilemap = tilemap_create(machine, robokid_get_bg2_tile_info, omegaf_bg_scan,     16, 16, 128, 32);
202	217
203		tilemap_set_transparent_pen(fg_tilemap,  15);
204		tilemap_set_transparent_pen(bg0_tilemap, 15);
205		tilemap_set_transparent_pen(bg1_tilemap, 15);
206		tilemap_set_transparent_pen(bg2_tilemap, 15);
	218	tilemap_set_transparent_pen(fg_tilemap,  TRANSPARENTCODE);
	219	tilemap_set_transparent_pen(bg0_tilemap, TRANSPARENTCODE);
	220	tilemap_set_transparent_pen(bg1_tilemap, TRANSPARENTCODE);
	221	tilemap_set_transparent_pen(bg2_tilemap, TRANSPARENTCODE);
207	222
208	223	robokid_sprites = 1;
209		stencil_palette = 0xf0;  // stencil palette when overdraw mode = 0xf (watched bit 7-4)
	224	stencil_compare_function = stencil_omegaf ;
210	225	}
211	226
212	227
r4679	r4680
420	435	}
421	436	}
422	437
	438	static int stencil_ninjakd2( UINT16 pal ) { return( (pal & 0xf0) == 0xf0 ); }
	439	static int stencil_mnight(   UINT16 pal ) { return( (pal & 0xf0) == 0xf0 ); }
	440	static int stencil_arkarea(  UINT16 pal ) { return( (pal & 0xf0) == 0xf0 ); }
	441	static int stencil_robokid(  UINT16 pal ) { return( (pal & 0xf0) <  0xe0 ); }
	442	static int stencil_omegaf(   UINT16 pal ) { return( TRUE ); }
	443	//////            OVERDRAW     STENCIL     UNKNOWN
	444	//////  NINJAKD2  023459ABCDE  F           1678
	445	//////    MNIGHT  023459ABCDE  F           279
	446	//////   ARKAREA  012345679BDE             8ACF
	447	//////   ROBOKID  EF           01236       45789ABCD
	448	//////    OMEGAF                                     unused ?
	449	// I could not find a port to select overdraw or stencil.
	450	// Temporarily, I compare with constant number.
	451	// This is very hackish.
423	452
424	453	static void erase_sprites(running_machine* const machine, bitmap_t* const bitmap, const rectangle* const cliprect)
425	454	{
426	455	// if sprite overdraw is disabled, clear the sprite framebuffer
427		// if sprite overdraw is enabled, leave palette "0-E" on screen, and stencil only "F".
428	456	if (!next_sprite_overdraw_enabled)
429		bitmap_fill(sp_bitmap, cliprect, 15);
	457	bitmap_fill(sp_bitmap, cliprect, TRANSPARENTCODE);
430	458	else
431	459	{
432	460	int y;
r4679	r4680
437	465	{
438	466	UINT16* const ptr = BITMAP_ADDR16(sp_bitmap, y, x);
439	467
440		if ( (*ptr & 0xf0) == stencil_palette ) { *ptr = 15; }
441		////// Before modified, clears palettes 0-B and F, and leaves C-E on screen
442		////// But I'm sure "Ninja Kid II" clears F, and leaves 0-E
443		//////  (apply this to other games when verified)
444		//////  Now, I use variable "stencil_palette".
445		//////  But, I think that it may be "F", because I don't know why 0-B was cleared.
	468	if ( (*stencil_compare_function)(*ptr) ) *ptr = TRANSPARENTCODE ;
446	469	}
447	470	}
448	471	}
r4679	r4680
472	495
473	496	tilemap_draw(bitmap, cliprect, bg_tilemap, 0, 0);
474	497
475		copybitmap_trans(bitmap, sp_bitmap, 0, 0, 0, 0, cliprect, 15);
	498	copybitmap_trans(bitmap, sp_bitmap, 0, 0, 0, 0, cliprect, TRANSPARENTCODE);
476	499
477	500	tilemap_draw(bitmap, cliprect, fg_tilemap, 0, 0);
478	501
r4679	r4680
490	513
491	514	tilemap_draw(bitmap, cliprect, bg1_tilemap, 0, 0);
492	515
493		copybitmap_trans(bitmap, sp_bitmap, 0, 0, 0, 0, cliprect, 15);
	516	copybitmap_trans(bitmap, sp_bitmap, 0, 0, 0, 0, cliprect, TRANSPARENTCODE);
494	517
495	518	tilemap_draw(bitmap, cliprect, bg2_tilemap, 0, 0);
496	519
r4679	r4680
512	535
513	536	tilemap_draw(bitmap, cliprect, bg2_tilemap, 0, 0);
514	537
515		copybitmap_trans(bitmap, sp_bitmap, 0, 0, 0, 0, cliprect, 15);
	538	copybitmap_trans(bitmap, sp_bitmap, 0, 0, 0, 0, cliprect, TRANSPARENTCODE);
516	539
517	540	tilemap_draw(bitmap, cliprect, fg_tilemap, 0, 0);
518	541

src/mame/video/mjsister.c

r4679	r4680
23	23
24	24	VIDEO_START( mjsister )
25	25	{
26		mjsister_tmpbitmap0 = auto_bitmap_alloc(256,256,video_screen_get_format(machine->primary_screen));
27		mjsister_tmpbitmap1 = auto_bitmap_alloc(256,256,video_screen_get_format(machine->primary_screen));
28		mjsister_videoram0 = auto_malloc(0x8000);
29		mjsister_videoram1 = auto_malloc(0x8000);
	26	mjsister_tmpbitmap0 = auto_bitmap_alloc(machine,256,256,video_screen_get_format(machine->primary_screen));
	27	mjsister_tmpbitmap1 = auto_bitmap_alloc(machine,256,256,video_screen_get_format(machine->primary_screen));
	28	mjsister_videoram0 = auto_alloc_array(machine, UINT8, 0x8000);
	29	mjsister_videoram1 = auto_alloc_array(machine, UINT8, 0x8000);
30	30	}
31	31
32	32	static void mjsister_plot0(int offset,UINT8 data)

src/mame/video/skydiver.c

r4679	r4680
17	17
18	18	MACHINE_RESET( skydiver )
19	19	{
20		const address_space *space = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM);
	20	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
21	21
22	22	/* reset all latches */
23	23	skydiver_start_lamp_1_w(space, 0, 0);

src/mame/video/spacefb.c

r4679	r4680
92	92
93	93	width = video_screen_get_width(machine->primary_screen);
94	94	height = video_screen_get_height(machine->primary_screen);
95		object_present_map = auto_malloc(width * height);
	95	object_present_map = auto_alloc_array(machine, UINT8, width * height);
96	96
97	97	/* this start value positions the stars to match the flyer screen shot,
98	98	but most likely, the actual star position is random as the hardware

src/mame/video/jaguar.c

r4679	r4680
209	209	*************************************/
210	210
211	211	/* from jagobj.c */
212		static void jagobj_init(void);
	212	static void jagobj_init(running_machine *machine);
213	213	static void process_object_list(running_machine *machine, int vc, UINT16 *_scanline);
214	214
215	215	/* from jagblit.c */
r4679	r4680
308	308
309	309	void jaguar_gpu_suspend(running_machine *machine)
310	310	{
311		cpu_suspend(machine->cpu[1], SUSPEND_REASON_SPIN, 1);
	311	cputag_suspend(machine, "gpu", SUSPEND_REASON_SPIN, 1);
312	312	}
313	313
314	314
315	315	void jaguar_gpu_resume(running_machine *machine)
316	316	{
317		cpu_resume(machine->cpu[1], SUSPEND_REASON_SPIN);
	317	cputag_resume(machine, "gpu", SUSPEND_REASON_SPIN);
318	318	}
319	319
320	320
r4679	r4680
328	328	static void update_cpu_irq(running_machine *machine)
329	329	{
330	330	if (cpu_irq_state & gpu_regs[INT1] & 0x1f)
331		cpu_set_input_line(machine->cpu[0], cojag_is_r3000 ? R3000_IRQ4 : M68K_IRQ_6, ASSERT_LINE);
	331	cputag_set_input_line(machine, "maincpu", cojag_is_r3000 ? R3000_IRQ4 : M68K_IRQ_6, ASSERT_LINE);
332	332	else
333		cpu_set_input_line(machine->cpu[0], cojag_is_r3000 ? R3000_IRQ4 : M68K_IRQ_6, CLEAR_LINE);
	333	cputag_set_input_line(machine, "maincpu", cojag_is_r3000 ? R3000_IRQ4 : M68K_IRQ_6, CLEAR_LINE);
334	334	}
335	335
336	336
r4679	r4680
479	479
480	480	static UINT8 *get_jaguar_memory(running_machine *machine, UINT32 offset)
481	481	{
482		return memory_get_read_ptr(cpu_get_address_space(machine->cpu[1], ADDRESS_SPACE_PROGRAM), offset);
	482	const address_space *space = cputag_get_address_space(machine, "gpu", ADDRESS_SPACE_PROGRAM);
	483	return (UINT8 *)memory_get_read_ptr(space, offset);
483	484	}
484	485
485	486
r4679	r4680
815	816	object_timer = timer_alloc(machine, cojag_scanline_update, NULL);
816	817	adjust_object_timer(machine, 0);
817	818
818		screen_bitmap = auto_bitmap_alloc(720, 512, BITMAP_FORMAT_RGB32);
	819	screen_bitmap = auto_bitmap_alloc(machine, 720, 512, BITMAP_FORMAT_RGB32);
819	820
820		jagobj_init();
	821	jagobj_init(machine);
821	822
822		pen_table = auto_malloc(65536 * sizeof(pen_t));
	823	pen_table = auto_alloc_array(machine, pen_t, 65536);
823	824
824	825	state_save_register_global_pointer(machine, pen_table, 65536);
825	826	state_save_register_global_array(machine, blitter_regs);

src/mame/video/gng.c

r4679	r4680
156	156
157	157	VIDEO_EOF( gng )
158	158	{
159		const address_space *space = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM);
	159	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
160	160
161	161	buffer_spriteram_w(space,0,0);
162	162	}

src/mame/video/ojankohs.c

r4679	r4680
60	60	}
61	61	}
62	62
63		READ8_HANDLER( ojankohs_palette_r )
64		{
65		return ojankohs_paletteram[offset];
66		}
67
68	63	WRITE8_HANDLER( ojankohs_palette_w )
69	64	{
70	65	int r, g, b;
r4679	r4680
125	120
126	121	******************************************************************************/
127	122
128		READ8_HANDLER( ojankohs_videoram_r )
129		{
130		return ojankohs_videoram[offset];
131		}
132
133	123	WRITE8_HANDLER( ojankohs_videoram_w )
134	124	{
135	125	ojankohs_videoram[offset] = data;
136	126	tilemap_mark_tile_dirty(ojankohs_tilemap, offset);
137	127	}
138	128
139		READ8_HANDLER( ojankohs_colorram_r )
140		{
141		return ojankohs_colorram[offset];
142		}
143
144	129	WRITE8_HANDLER( ojankohs_colorram_w )
145	130	{
146	131	ojankohs_colorram[offset] = data;
r4679	r4680
279	264	VIDEO_START( ojankohs )
280	265	{
281	266	ojankohs_tilemap = tilemap_create(machine, ojankohs_get_tile_info, tilemap_scan_rows,  8, 4, 64, 64);
282		ojankohs_videoram = auto_malloc(0x2000);
283		ojankohs_colorram = auto_malloc(0x1000);
284		ojankohs_paletteram = auto_malloc(0x800);
	267	ojankohs_videoram = auto_alloc_array(machine, UINT8, 0x2000);
	268	ojankohs_colorram = auto_alloc_array(machine, UINT8, 0x1000);
	269	ojankohs_paletteram = auto_alloc_array(machine, UINT8, 0x800);
285	270	}
286	271
287	272	VIDEO_START( ojankoy )
288	273	{
289	274	ojankohs_tilemap = tilemap_create(machine, ojankoy_get_tile_info, tilemap_scan_rows,  8, 4, 64, 64);
290		ojankohs_videoram = auto_malloc(0x2000);
291		ojankohs_colorram = auto_malloc(0x1000);
292		ojankohs_paletteram = auto_malloc(0x800);
	275	ojankohs_videoram = auto_alloc_array(machine, UINT8, 0x2000);
	276	ojankohs_colorram = auto_alloc_array(machine, UINT8, 0x1000);
	277	ojankohs_paletteram = auto_alloc_array(machine, UINT8, 0x800);
293	278	}
294	279
295	280	VIDEO_START( ojankoc )
296	281	{
297	282	ojankoc_tmpbitmap = video_screen_auto_bitmap_alloc(machine->primary_screen);
298		ojankohs_videoram = auto_malloc(0x8000);
299		ojankohs_paletteram = auto_malloc(0x20);
	283	ojankohs_videoram = auto_alloc_array(machine, UINT8, 0x8000);
	284	ojankohs_paletteram = auto_alloc_array(machine, UINT8, 0x20);
300	285	}
301	286
302	287
r4679	r4680
321	306
322	307	if (ojankoc_screen_refresh)
323	308	{
324		const address_space *space = cpu_get_address_space(screen->machine->cpu[0], ADDRESS_SPACE_PROGRAM);
	309	const address_space *space = cputag_get_address_space(screen->machine, "maincpu", ADDRESS_SPACE_PROGRAM);
325	310
326	311	/* redraw bitmap */
327	312	for (offs = 0; offs < 0x8000; offs++) {

src/mame/video/bfm_adr2.c

r4679	r4680
432	432	{
433	433	UINT8 *s;
434	434
435		s = malloc_or_die( 0x40000 );
	435	s = alloc_array_or_die(UINT8, 0x40000 );
436	436	{
437	437	int x, y;
438	438
r4679	r4680
471	471	ADDRESS_MAP_START( adder2_memmap, ADDRESS_SPACE_PROGRAM, 8 )
472	472
473	473	AM_RANGE(0x0000, 0x0000) AM_WRITE(adder2_screen_page_w)      // screen access/display select
474		AM_RANGE(0x0000, 0x7FFF) AM_READ(SMH_BANK2)            // 8k  paged ROM (4 pages)
	474	AM_RANGE(0x0000, 0x7FFF) AM_READ(SMH_BANK(2))            // 8k  paged ROM (4 pages)
475	475	AM_RANGE(0x8000, 0x917F) AM_READWRITE(screen_ram_r, screen_ram_w)
476	476	AM_RANGE(0x9180, 0x9FFF) AM_READWRITE(normal_ram_r, normal_ram_w)
477	477

src/mame/video/nbmj8891.c

r4679	r4680
501	501	int height = video_screen_get_height(machine->primary_screen);
502	502
503	503	nbmj8891_tmpbitmap0 = video_screen_auto_bitmap_alloc(machine->primary_screen);
504		nbmj8891_videoram0 = auto_malloc(width * height * sizeof(char));
505		nbmj8891_palette = auto_malloc(0x200 * sizeof(char));
506		nbmj8891_clut = auto_malloc(0x800 * sizeof(char));
	504	nbmj8891_videoram0 = auto_alloc_array(machine, UINT8, width * height);
	505	nbmj8891_palette = auto_alloc_array(machine, UINT8, 0x200);
	506	nbmj8891_clut = auto_alloc_array(machine, UINT8, 0x800);
507	507	memset(nbmj8891_videoram0, 0xff, (width * height * sizeof(char)));
508	508	gfxdraw_mode = 0;
509	509
r4679	r4680
518	518
519	519	nbmj8891_tmpbitmap0 = video_screen_auto_bitmap_alloc(machine->primary_screen);
520	520	nbmj8891_tmpbitmap1 = video_screen_auto_bitmap_alloc(machine->primary_screen);
521		nbmj8891_videoram0 = auto_malloc(width * height * sizeof(UINT8));
522		nbmj8891_videoram1 = auto_malloc(width * height * sizeof(UINT8));
523		nbmj8891_palette = auto_malloc(0x200 * sizeof(UINT8));
524		nbmj8891_clut = auto_malloc(0x800 * sizeof(UINT8));
	521	nbmj8891_videoram0 = auto_alloc_array(machine, UINT8, width * height);
	522	nbmj8891_videoram1 = auto_alloc_array(machine, UINT8, width * height);
	523	nbmj8891_palette = auto_alloc_array(machine, UINT8, 0x200);
	524	nbmj8891_clut = auto_alloc_array(machine, UINT8, 0x800);
525	525	memset(nbmj8891_videoram0, 0xff, (width * height * sizeof(UINT8)));
526	526	memset(nbmj8891_videoram1, 0xff, (width * height * sizeof(UINT8)));
527	527	gfxdraw_mode = 1;

src/mame/video/liberate.c

r4679	r4680
12	12	#include "driver.h"
13	13	#include "cpu/m6502/m6502.h"
14	14
15		static int background_color,background_disable;
	15	static int background_color, background_disable;
16	16	static tilemap *background_tilemap, *fix_tilemap;
17	17	static UINT8 deco16_io_ram[16];
18	18
19	19	#if 0
20	20	void debug_print(bitmap_t *bitmap)
21	21	{
22		int i,j;
23		char buf[20*16];
	22	int i, j;
	23	char buf[20 * 16];
24	24	char *bufptr = buf;
25		for (i = 0;i < 16;i+=2)
26		bufptr += sprintf(bufptr,"%04X",deco16_io_ram[i+1]|(deco16_io_ram[i]<<8));
27		ui_draw_text(buf, 10, 6*6);
	25	for (i = 0; i < 16; i += 2)
	26	bufptr += sprintf(bufptr, "%04X", deco16_io_ram[i + 1] | (deco16_io_ram[i] << 8));
	27	ui_draw_text(buf, 10, 6 * 6);
28	28	}
29	29	#endif
30	30
31	31	static TILEMAP_MAPPER( back_scan )
32	32	{
33	33	/* logical (col,row) -> memory offset */
34		return ((row & 0xf)) + ((15-(col &0xf))<<4) + ((row&0x10)<<5) + ((col&0x10)<<4);
	34	return ((row & 0xf)) + ((15 - (col & 0xf)) << 4) + ((row & 0x10) << 5) + ((col & 0x10) << 4);
35	35	}
36	36
37	37	static TILEMAP_MAPPER( fix_scan )
38	38	{
39	39	/* logical (col,row) -> memory offset */
40		return (row & 0x1f) + ((31-(col &0x1f))<<5);
	40	return (row & 0x1f) + ((31 - (col & 0x1f)) << 5);
41	41	}
42	42
43	43	static TILE_GET_INFO( get_back_tile_info )
44	44	{
45	45	const UINT8 *RAM = memory_region(machine, "user1");
46		int tile,bank;
	46	int tile, bank;
47	47
48	48	/* Convert tile index of 512x512 to paged format */
49		if (tile_index&0x100) {
50		if (tile_index&0x200)
51		tile_index=(tile_index&0xff)+(deco16_io_ram[5]<<8); /* Bottom right */
	49	if (tile_index & 0x100)
	50	{
	51	if (tile_index & 0x200)
	52	tile_index = (tile_index & 0xff) + (deco16_io_ram[5] << 8); /* Bottom right */
52	53	else
53		tile_index=(tile_index&0xff)+(deco16_io_ram[4]<<8); /* Bottom left */
54		} else {
55		if (tile_index&0x200)
56		tile_index=(tile_index&0xff)+(deco16_io_ram[3]<<8); /* Top right */
	54	tile_index = (tile_index & 0xff) + (deco16_io_ram[4] << 8); /* Bottom left */
	55	}
	56	else
	57	{
	58	if (tile_index & 0x200)
	59	tile_index = (tile_index & 0xff) + (deco16_io_ram[3] << 8); /* Top right */
57	60	else
58		tile_index=(tile_index&0xff)+(deco16_io_ram[2]<<8); /* Top left */
	61	tile_index = (tile_index & 0xff) + (deco16_io_ram[2] << 8); /* Top left */
59	62	}
60	63
61		tile=RAM[tile_index];
62		if (tile>0x7f) bank=3; else bank=2;
63		SET_TILE_INFO(bank,tile&0x7f,background_color,0);
	64	tile = RAM[tile_index];
	65	if (tile > 0x7f) bank = 3; else bank = 2;
	66	SET_TILE_INFO(bank, tile & 0x7f, background_color, 0);
64	67	}
65	68
66	69	static TILE_GET_INFO( get_fix_tile_info )
67	70	{
68		int tile,color;
	71	int tile, color;
69	72
70		tile=videoram[tile_index+0x400]+((videoram[tile_index]&0x7)<<8);
71		color=(videoram[tile_index]&0x70)>>4;
	73	tile = videoram[tile_index + 0x400] + ((videoram[tile_index] & 0x7) << 8);
	74	color = (videoram[tile_index] & 0x70) >> 4;
72	75
73		//if (tile&0x300) tile-=0x000;
74		//else if(tile&0x200) tile-=0x100;
75		//else if (tile&0x100) tile-=0x100;
76		//else tile+=0x200;
	76	//if (tile & 0x300) tile -= 0x000;
	77	//else if(tile & 0x200) tile -= 0x100;
	78	//else if (tile & 0x100) tile -= 0x100;
	79	//else tile += 0x200;
77	80
78		SET_TILE_INFO(0,tile,color,0);
	81	SET_TILE_INFO(0, tile, color, 0);
79	82	}
80	83
81	84	/***************************************************************************/
82	85
83	86	WRITE8_HANDLER( deco16_io_w )
84	87	{
85		deco16_io_ram[offset]=data;
86		if (offset>1 && offset<6)
	88	deco16_io_ram[offset] = data;
	89	if (offset > 1 && offset < 6)
87	90	tilemap_mark_all_tiles_dirty(background_tilemap);
88	91
89		switch (offset) {
	92	switch (offset)
	93	{
90	94	case 6: /* Background colour */
91		if (((data>>4)&3)!=background_color) {
92		background_color=(data>>4)&3;
	95	if (((data >> 4) & 3) != background_color)
	96	{
	97	background_color = (data >> 4) & 3;
93	98	tilemap_mark_all_tiles_dirty(background_tilemap);
94	99	}
95		background_disable=data&0x4;
96		flip_screen_set(space->machine, data&0x1);
	100	background_disable = data & 0x4;
	101	flip_screen_set(space->machine, data & 0x1);
97	102	break;
98	103	case 7: /* Background palette resistors? */
99	104	/* Todo */
100	105	break;
101	106	case 8: /* Irq ack */
102		cpu_set_input_line(space->machine->cpu[0],DECO16_IRQ_LINE,CLEAR_LINE);
	107	cputag_set_input_line(space->machine, "maincpu", DECO16_IRQ_LINE, CLEAR_LINE);
103	108	break;
104	109	case 9: /* Sound */
105		soundlatch_w(space,0,data);
106		cpu_set_input_line(space->machine->cpu[1],M6502_IRQ_LINE,HOLD_LINE);
	110	soundlatch_w(space, 0, data);
	111	cputag_set_input_line(space->machine, "audiocpu", M6502_IRQ_LINE, HOLD_LINE);
107	112	break;
108	113	}
109	114	}
110	115
111	116	WRITE8_HANDLER( liberate_videoram_w )
112	117	{
113		videoram[offset]=data;
114		tilemap_mark_tile_dirty(fix_tilemap,offset&0x3ff);
	118	videoram[offset] = data;
	119	tilemap_mark_tile_dirty(fix_tilemap, offset & 0x3ff);
115	120	}
116	121
117	122	/***************************************************************************/
r4679	r4680
214	219
215	220	if (multi && fy==0) sy-=16;
216	221
217		if (flip_screen_get(machine)) {
	222	if (flip_screen_get(machine))
	223	{
218	224	sy=240-sy;
219	225	sx=240-sx;
220	226	if (fy)
r4679	r4680
224	230	if (fx) fx=0; else fx=1;
225	231	if (fy) fy=0; else fy=1;
226	232	}
227		else {
	233	else
	234	{
228	235	if (fy)
229	236	sy2=sy-16;
230	237	else
r4679	r4680
275	282	//      if (multi) sy-=16;
276	283	if (fy && multi) { code2=code; code++; }
277	284
278		if (flip_screen_get(machine)) {
	285	if (flip_screen_get(machine))
	286	{
279	287	sy=240-sy;
280	288	sx=240-sx;
281	289	if (fx) fx=0; else fx=1;
282	290	if (fy) fy=0; else fy=1;
283	291	sy2=sy-16;
284	292	}
285		else {
	293	else
	294	{
286	295	sy2=sy+16;
287	296	}
288	297
r4679	r4680
331	340	//      if (multi) sy-=16;
332	341	if (fy && multi) { code2=code; code++; }
333	342
334		if (flip_screen_get(machine)) {
	343	if (flip_screen_get(machine))
	344	{
335	345	sy=240-sy;
336	346	sx=240-sx;
337	347	if (fx) fx=0; else fx=1;
338	348	if (fy) fy=0; else fy=1;
339	349	sy2=sy-16;
340	350	}
341		else {
	351	else
	352	{
342	353	sy2=sy+16;
343	354	}
344	355
r4679	r4680
382	393
383	394	prosport_draw_sprites(screen->machine,bitmap,cliprect);
384	395
385		for (offs = 0;offs < 0x400;offs++) {
	396	for (offs = 0;offs < 0x400;offs++)
	397	{
386	398	tile=videoram[offs+0x400]+((videoram[offs]&0x3)<<8);
387	399
388	400	tile+=((deco16_io_ram[0]&0x30)<<6);

src/mame/video/cvs.c

r4679	r4680
186	186	width = video_screen_get_width(machine->primary_screen);
187	187	height = video_screen_get_height(machine->primary_screen);
188	188
189		s2636_0 = s2636_config(cvs_s2636_0_ram, height, width, CVS_S2636_Y_OFFSET, CVS_S2636_X_OFFSET);
190		s2636_1 = s2636_config(cvs_s2636_1_ram, height, width, CVS_S2636_Y_OFFSET, CVS_S2636_X_OFFSET);
191		s2636_2 = s2636_config(cvs_s2636_2_ram, height, width, CVS_S2636_Y_OFFSET, CVS_S2636_X_OFFSET);
	189	s2636_0 = s2636_config(machine, cvs_s2636_0_ram, height, width, CVS_S2636_Y_OFFSET, CVS_S2636_X_OFFSET);
	190	s2636_1 = s2636_config(machine, cvs_s2636_1_ram, height, width, CVS_S2636_Y_OFFSET, CVS_S2636_X_OFFSET);
	191	s2636_2 = s2636_config(machine, cvs_s2636_2_ram, height, width, CVS_S2636_Y_OFFSET, CVS_S2636_X_OFFSET);
192	192
193	193	/* create helper bitmaps */
194	194	background_bitmap = video_screen_auto_bitmap_alloc(machine->primary_screen);

src/mame/video/turbo.c

r4679	r4680
167	167
168	168	static TILE_GET_INFO( get_fg_tile_info )
169	169	{
170		turbo_state *state = machine->driver_data;
	170	turbo_state *state = (turbo_state *)machine->driver_data;
171	171	int code = state->videoram[tile_index];
172	172	SET_TILE_INFO(0, code, code >> 2, 0);
173	173	}
r4679	r4680
175	175
176	176	VIDEO_START( turbo )
177	177	{
178		turbo_state *state = machine->driver_data;
	178	turbo_state *state = (turbo_state *)machine->driver_data;
179	179
180	180	/* initialize the foreground tilemap */
181	181	state->fg_tilemap = tilemap_create(machine, get_fg_tile_info, tilemap_scan_rows,  8,8, 32,32);
r4679	r4680
184	184
185	185	VIDEO_START( buckrog )
186	186	{
187		turbo_state *state = machine->driver_data;
	187	turbo_state *state = (turbo_state *)machine->driver_data;
188	188
189	189	/* initialize the foreground tilemap */
190	190	state->fg_tilemap = tilemap_create(machine, get_fg_tile_info, tilemap_scan_rows,  8,8, 32,32);
191	191
192	192	/* allocate the bitmap RAM */
193		state->buckrog_bitmap_ram = auto_malloc(0xe000);
	193	state->buckrog_bitmap_ram = auto_alloc_array(machine, UINT8, 0xe000);
194	194	state_save_register_global_pointer(machine, state->buckrog_bitmap_ram, 0xe000);
195	195	}
196	196
r4679	r4680
204	204
205	205	WRITE8_HANDLER( turbo_videoram_w )
206	206	{
207		turbo_state *state = space->machine->driver_data;
	207	turbo_state *state = (turbo_state *)space->machine->driver_data;
208	208	state->videoram[offset] = data;
209	209	if (offset < 0x400)
210	210	{
r4679	r4680
216	216
217	217	WRITE8_HANDLER( buckrog_bitmap_w )
218	218	{
219		turbo_state *state = space->machine->driver_data;
	219	turbo_state *state = (turbo_state *)space->machine->driver_data;
220	220	state->buckrog_bitmap_ram[offset] = data & 1;
221	221	}
222	222
r4679	r4680
406	406
407	407	VIDEO_UPDATE( turbo )
408	408	{
409		turbo_state *state = screen->machine->driver_data;
	409	turbo_state *state = (turbo_state *)screen->machine->driver_data;
410	410	bitmap_t *fgpixmap = tilemap_get_pixmap(state->fg_tilemap);
411	411	const UINT8 *road_gfxdata = memory_region(screen->machine, "gfx3");
412	412	const UINT8 *prom_base = memory_region(screen->machine, "proms");
r4679	r4680
761	761
762	762	VIDEO_UPDATE( subroc3d )
763	763	{
764		turbo_state *state = screen->machine->driver_data;
	764	turbo_state *state = (turbo_state *)screen->machine->driver_data;
765	765	bitmap_t *fgpixmap = tilemap_get_pixmap(state->fg_tilemap);
766	766	const UINT8 *prom_base = memory_region(screen->machine, "proms");
767	767	const UINT8 *pr1419 = prom_base + 0x000;
r4679	r4680
981	981
982	982	VIDEO_UPDATE( buckrog )
983	983	{
984		turbo_state *state = screen->machine->driver_data;
	984	turbo_state *state = (turbo_state *)screen->machine->driver_data;
985	985	bitmap_t *fgpixmap = tilemap_get_pixmap(state->fg_tilemap);
986	986	const UINT8 *bgcolor = memory_region(screen->machine, "gfx3");
987	987	const UINT8 *prom_base = memory_region(screen->machine, "proms");

src/mame/video/rohga.c

r4679	r4680
26	26
27	27	VIDEO_START( rohga )
28	28	{
29		rohga_spriteram = (UINT16*)auto_malloc(0x800);
	29	rohga_spriteram = auto_alloc_array(machine, UINT16, 0x800/2);
30	30
31	31	deco16_2_video_init(machine, 0);
32	32

src/mame/video/nemesis.c

r4679	r4680
111	111	if (ACCESSING_BITS_8_15)
112	112	{
113	113	if (data & 0x0100)
114		cpu_set_input_line_and_vector(space->machine->cpu[1], 0, HOLD_LINE, 0xff);
	114	cputag_set_input_line_and_vector(space->machine, "audiocpu", 0, HOLD_LINE, 0xff);
115	115	}
116	116	}
117	117
r4679	r4680
161	161	coin_lockout_w(1, data & 0x0400);
162	162
163	163	if (data & 0x0800)
164		cpu_set_input_line(space->machine->cpu[1], 0, HOLD_LINE);
	164	cputag_set_input_line(space->machine, "audiocpu", 0, HOLD_LINE);
165	165
166	166	hcrash_selected_ip = (~data & 0x1000) >> 12;      /* citybomb steering & accel */
167	167	}

src/mame/video/magmax.c

r4679	r4680
75	75	/* Set up save state */
76	76	state_save_register_global(machine, flipscreen);
77	77
78		prom_tab = auto_malloc(256 * sizeof(UINT32));
	78	prom_tab = auto_alloc_array(machine, UINT32, 256);
79	79
80	80	/* Allocate temporary bitmap */
81	81	tmpbitmap = video_screen_auto_bitmap_alloc(machine->primary_screen);

src/mame/video/deco16ic.c

r4679	r4680
520	520	{
521	521	int width = video_screen_get_width(machine->primary_screen);
522	522	int height = video_screen_get_height(machine->primary_screen);
523		sprite_priority_bitmap = auto_bitmap_alloc(width, height, BITMAP_FORMAT_INDEXED8 );
	523	sprite_priority_bitmap = auto_bitmap_alloc(machine, width, height, BITMAP_FORMAT_INDEXED8 );
524	524
525	525	pf1_tilemap_16x16 =   tilemap_create(machine, get_pf1_tile_info,   deco16_scan_rows, 16,16,64,32);
526	526	pf1_tilemap_8x8 =   tilemap_create(machine, get_pf1_tile_info_b, tilemap_scan_rows,8,8,64,32);
r4679	r4680
531	531	pf2_tilemap_16x16 =   tilemap_create(machine, get_pf2_tile_info,   deco16_scan_rows, 16,16,full_width ? 64 : 32,32);
532	532	pf2_tilemap_8x8 =   tilemap_create(machine, get_pf2_tile_info_b, tilemap_scan_rows,8,8,full_width ? 64 : 32,32);
533	533
534		dirty_palette = auto_malloc(4096);
535		deco16_raster_display_list=auto_malloc(20 * 256);
	534	dirty_palette = auto_alloc_array(machine, UINT8, 4096);
	535	deco16_raster_display_list=auto_alloc_array(machine, UINT16, 20 * 256 / 2);
536	536
537	537	if (!pf12_only)
538	538	{
r4679	r4680
602	602	/* Allow sprite bitmap to be used by Deco32 games as well */
603	603	int width = video_screen_get_width(machine->primary_screen);
604	604	int height = video_screen_get_height(machine->primary_screen);
605		sprite_priority_bitmap = auto_bitmap_alloc(width, height, BITMAP_FORMAT_INDEXED16 );
	605	sprite_priority_bitmap = auto_bitmap_alloc(machine, width, height, BITMAP_FORMAT_INDEXED16 );
606	606	}
607	607
608	608	/*****************************************************************************************/

src/mame/video/goal92.c

r4679	r4680
139	139	foreground_layer = tilemap_create(machine, get_fore_tile_info,tilemap_scan_rows,16,16,32,32);
140	140	text_layer       = tilemap_create(machine, get_text_tile_info,tilemap_scan_rows,  8,8,64,32);
141	141
142		buffered_spriteram16 = auto_malloc(0x400*2);
	142	buffered_spriteram16 = auto_alloc_array(machine, UINT16, 0x400*2);
143	143
144	144	tilemap_set_transparent_pen(background_layer,15);
145	145	tilemap_set_transparent_pen(foreground_layer,15);

src/mame/video/1942.c

r4679	r4680
185	185
186	186	coin_counter_w(0,data & 0x01);
187	187
188		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_RESET, (data & 0x10) ? ASSERT_LINE : CLEAR_LINE);
	188	cputag_set_input_line(space->machine, "audiocpu", INPUT_LINE_RESET, (data & 0x10) ? ASSERT_LINE : CLEAR_LINE);
189	189
190	190	flip_screen_set(space->machine, data & 0x80);
191	191	}

src/mame/video/mayumi.c

r4679	r4680
9	9
10	10	#include "driver.h"
11	11
12		static UINT8 *mayumi_videoram;
	12	UINT8 *mayumi_videoram;
13	13	static tilemap *mayumi_tilemap;
14	14
15	15	static TILE_GET_INFO( get_tile_info )
r4679	r4680
22	22
23	23	VIDEO_START( mayumi )
24	24	{
25		mayumi_videoram = auto_malloc(0x1800);
	25	mayumi_videoram = auto_alloc_array(machine, UINT8, 0x1800);
26	26
27	27	mayumi_tilemap = tilemap_create( machine, get_tile_info,tilemap_scan_rows,8,8,64,32 );
28	28	}
r4679	r4680
30	30	WRITE8_HANDLER( mayumi_videoram_w )
31	31	{
32	32	mayumi_videoram[offset] = data;
33
34	33	tilemap_mark_tile_dirty(mayumi_tilemap, offset & 0x7ff );
35	34	}
36	35
37		READ8_HANDLER( mayumi_videoram_r )
38		{
39		return mayumi_videoram[offset];
40		}
41
42	36	VIDEO_UPDATE( mayumi )
43	37	{
44	38	tilemap_draw(bitmap, cliprect, mayumi_tilemap, 0, 0);

src/mame/video/fromanc2.c

r4679	r4680
380	380	fromanc2_tilemap[1][2] = tilemap_create(machine, fromanc2_get_v1_l2_tile_info, tilemap_scan_rows,  8, 8, 64, 64);
381	381	fromanc2_tilemap[1][3] = tilemap_create(machine, fromanc2_get_v1_l3_tile_info, tilemap_scan_rows,  8, 8, 64, 64);
382	382
383		fromanc2_videoram[0][0] = auto_malloc((64 * 64) * sizeof(UINT16));
384		fromanc2_videoram[0][1] = auto_malloc((64 * 64) * sizeof(UINT16));
385		fromanc2_videoram[0][2] = auto_malloc((64 * 64) * sizeof(UINT16));
386		fromanc2_videoram[0][3] = auto_malloc((64 * 64) * sizeof(UINT16));
387		fromanc2_videoram[1][0] = auto_malloc((64 * 64) * sizeof(UINT16));
388		fromanc2_videoram[1][1] = auto_malloc((64 * 64) * sizeof(UINT16));
389		fromanc2_videoram[1][2] = auto_malloc((64 * 64) * sizeof(UINT16));
390		fromanc2_videoram[1][3] = auto_malloc((64 * 64) * sizeof(UINT16));
	383	fromanc2_videoram[0][0] = auto_alloc_array(machine, UINT16, (64 * 64));
	384	fromanc2_videoram[0][1] = auto_alloc_array(machine, UINT16, (64 * 64));
	385	fromanc2_videoram[0][2] = auto_alloc_array(machine, UINT16, (64 * 64));
	386	fromanc2_videoram[0][3] = auto_alloc_array(machine, UINT16, (64 * 64));
	387	fromanc2_videoram[1][0] = auto_alloc_array(machine, UINT16, (64 * 64));
	388	fromanc2_videoram[1][1] = auto_alloc_array(machine, UINT16, (64 * 64));
	389	fromanc2_videoram[1][2] = auto_alloc_array(machine, UINT16, (64 * 64));
	390	fromanc2_videoram[1][3] = auto_alloc_array(machine, UINT16, (64 * 64));
391	391
392		fromanc2_paletteram[0] = auto_malloc(0x800 * 2);
393		fromanc2_paletteram[1] = auto_malloc(0x800 * 2);
	392	fromanc2_paletteram[0] = auto_alloc_array(machine, UINT16, 0x800);
	393	fromanc2_paletteram[1] = auto_alloc_array(machine, UINT16, 0x800);
394	394
395	395	tilemap_set_transparent_pen(fromanc2_tilemap[0][1], 0x000);
396	396	tilemap_set_transparent_pen(fromanc2_tilemap[0][2], 0x000);
r4679	r4680
411	411	fromanc2_tilemap[1][2] = tilemap_create(machine, fromancr_get_v1_l2_tile_info, tilemap_scan_rows,  8, 8, 64, 64);
412	412	fromanc2_tilemap[1][3] = 0;
413	413
414		fromanc2_videoram[0][0] = auto_malloc((64 * 64) * sizeof(UINT16));
415		fromanc2_videoram[0][1] = auto_malloc((64 * 64) * sizeof(UINT16));
416		fromanc2_videoram[0][2] = auto_malloc((64 * 64) * sizeof(UINT16));
417		fromanc2_videoram[1][0] = auto_malloc((64 * 64) * sizeof(UINT16));
418		fromanc2_videoram[1][1] = auto_malloc((64 * 64) * sizeof(UINT16));
419		fromanc2_videoram[1][2] = auto_malloc((64 * 64) * sizeof(UINT16));
	414	fromanc2_videoram[0][0] = auto_alloc_array(machine, UINT16, (64 * 64));
	415	fromanc2_videoram[0][1] = auto_alloc_array(machine, UINT16, (64 * 64));
	416	fromanc2_videoram[0][2] = auto_alloc_array(machine, UINT16, (64 * 64));
	417	fromanc2_videoram[1][0] = auto_alloc_array(machine, UINT16, (64 * 64));
	418	fromanc2_videoram[1][1] = auto_alloc_array(machine, UINT16, (64 * 64));
	419	fromanc2_videoram[1][2] = auto_alloc_array(machine, UINT16, (64 * 64));
420	420
421		fromanc2_paletteram[0] = auto_malloc(0x800 * 2);
422		fromanc2_paletteram[1] = auto_malloc(0x800 * 2);
	421	fromanc2_paletteram[0] = auto_alloc_array(machine, UINT16, 0x800);
	422	fromanc2_paletteram[1] = auto_alloc_array(machine, UINT16, 0x800);
423	423
424	424	tilemap_set_transparent_pen(fromanc2_tilemap[0][1], 0x0ff);
425	425	tilemap_set_transparent_pen(fromanc2_tilemap[0][2], 0x0ff);
r4679	r4680
439	439	fromanc2_tilemap[1][2] = tilemap_create(machine, fromancr_get_v1_l2_tile_info, tilemap_scan_rows,  8, 8, 256, 64);
440	440	fromanc2_tilemap[1][3] = 0;
441	441
442		fromanc2_videoram[0][0] = auto_malloc((256 * 64) * sizeof(UINT16));
443		fromanc2_videoram[0][1] = auto_malloc((256 * 64) * sizeof(UINT16));
444		fromanc2_videoram[0][2] = auto_malloc((256 * 64) * sizeof(UINT16));
445		fromanc2_videoram[1][0] = auto_malloc((256 * 64) * sizeof(UINT16));
446		fromanc2_videoram[1][1] = auto_malloc((256 * 64) * sizeof(UINT16));
447		fromanc2_videoram[1][2] = auto_malloc((256 * 64) * sizeof(UINT16));
	442	fromanc2_videoram[0][0] = auto_alloc_array(machine, UINT16, (256 * 64));
	443	fromanc2_videoram[0][1] = auto_alloc_array(machine, UINT16, (256 * 64));
	444	fromanc2_videoram[0][2] = auto_alloc_array(machine, UINT16, (256 * 64));
	445	fromanc2_videoram[1][0] = auto_alloc_array(machine, UINT16, (256 * 64));
	446	fromanc2_videoram[1][1] = auto_alloc_array(machine, UINT16, (256 * 64));
	447	fromanc2_videoram[1][2] = auto_alloc_array(machine, UINT16, (256 * 64));
448	448
449		fromanc2_paletteram[0] = auto_malloc(0x800 * 2);
450		fromanc2_paletteram[1] = auto_malloc(0x800 * 2);
	449	fromanc2_paletteram[0] = auto_alloc_array(machine, UINT16, 0x800);
	450	fromanc2_paletteram[1] = auto_alloc_array(machine, UINT16, 0x800);
451	451
452	452	tilemap_set_transparent_pen(fromanc2_tilemap[0][1], 0x000);
453	453	tilemap_set_transparent_pen(fromanc2_tilemap[0][2], 0x000);

src/mame/video/gridlee.c

r4679	r4680
82	82	VIDEO_START( gridlee )
83	83	{
84	84	/* allocate a local copy of video RAM */
85		local_videoram = auto_malloc(256 * 256);
86		memset(local_videoram, 0, 256 * 256);
	85	local_videoram = auto_alloc_array_clear(machine, UINT8, 256 * 256);
87	86
88	87	/* reset the palette */
89	88	palettebank_vis = 0;

src/mame/video/realbrk.c

r4679	r4680
163	163	tilemap_set_transparent_pen(tilemap_1,0);
164	164	tilemap_set_transparent_pen(tilemap_2,0);
165	165
166		tmpbitmap0 = auto_bitmap_alloc(32,32, video_screen_get_format(machine->primary_screen));
167		tmpbitmap1 = auto_bitmap_alloc(32,32, video_screen_get_format(machine->primary_screen));
	166	tmpbitmap0 = auto_bitmap_alloc(machine,32,32, video_screen_get_format(machine->primary_screen));
	167	tmpbitmap1 = auto_bitmap_alloc(machine,32,32, video_screen_get_format(machine->primary_screen));
168	168	}
169	169
170	170	/***************************************************************************

src/mame/video/superchs.c

r4679	r4680
16	16
17	17	VIDEO_START( superchs )
18	18	{
19		spritelist = auto_malloc(0x4000 * sizeof(*spritelist));
	19	spritelist = auto_alloc_array(machine, struct tempsprite, 0x4000);
20	20
21	21	TC0480SCP_vh_start(machine,TC0480SCP_GFX_NUM,0,0x20,0x08,-1,0,0,0,0);
22	22	}

src/mame/video/battlera.c

r4679	r4680
27	27
28	28	VIDEO_START( battlera )
29	29	{
30		HuC6270_vram=auto_malloc(0x20000);
31		vram_dirty=auto_malloc(0x1000);
	30	HuC6270_vram=auto_alloc_array(machine, UINT8, 0x20000);
	31	vram_dirty=auto_alloc_array(machine, UINT8, 0x1000);
32	32
33	33	memset(HuC6270_vram,0,0x20000);
34	34	memset(vram_dirty,1,0x1000);
35	35
36		tile_bitmap=auto_bitmap_alloc(512,512,video_screen_get_format(machine->primary_screen));
37		front_bitmap=auto_bitmap_alloc(512,512,video_screen_get_format(machine->primary_screen));
	36	tile_bitmap=auto_bitmap_alloc(machine,512,512,video_screen_get_format(machine->primary_screen));
	37	front_bitmap=auto_bitmap_alloc(machine,512,512,video_screen_get_format(machine->primary_screen));
38	38
39	39	vram_ptr=0;
40	40	inc_value=1;

src/mame/video/namcos1.c

r4679	r4680
105	105	tilemap_maskdata = (UINT8 *)memory_region(machine, "gfx1");
106	106
107	107	/* allocate videoram */
108		namcos1_videoram = auto_malloc(0x8000);
109		namcos1_spriteram = auto_malloc(0x1000);
	108	namcos1_videoram = auto_alloc_array(machine, UINT8, 0x8000);
	109	namcos1_spriteram = auto_alloc_array(machine, UINT8, 0x1000);
110	110
111	111	/* initialize playfields */
112	112	bg_tilemap[0] = tilemap_create(machine, bg_get_info0,tilemap_scan_rows,8,8,64,64);

src/mame/video/mrdo.c

r4679	r4680
63	63	{
64	64	float par = 0;
65	65
66		if (i & 1) par += 1.0/R1;
67		if (i & 2) par += 1.0/R2;
68		if (i & 4) par += 1.0/R3;
69		if (i & 8) par += 1.0/R4;
	66	if (i & 1) par += 1.0f/(float)R1;
	67	if (i & 2) par += 1.0f/(float)R2;
	68	if (i & 4) par += 1.0f/(float)R3;
	69	if (i & 8) par += 1.0f/(float)R4;
70	70	if (par)
71	71	{
72	72	par = 1/par;

src/mame/video/astrocde.c

r4679	r4680
92	92
93	93	static void init_savestate(running_machine *machine);
94	94	static TIMER_CALLBACK( scanline_callback );
95		static void init_sparklestar(void);
	95	static void init_sparklestar(running_machine *machine);
96	96
97	97
98	98
r4679	r4680
230	230
231	231	/* initialize the sparkle and stars */
232	232	if (astrocade_video_config & AC_STARS)
233		init_sparklestar();
	233	init_sparklestar(machine);
234	234	}
235	235
236	236
r4679	r4680
241	241	timer_adjust_oneshot(scanline_timer, video_screen_get_time_until_pos(machine->primary_screen, 1, 0), 1);
242	242
243	243	/* allocate videoram */
244		profpac_videoram = auto_malloc(0x4000 * 4 * sizeof(*profpac_videoram));
	244	profpac_videoram = auto_alloc_array(machine, UINT16, 0x4000 * 4);
245	245
246	246	/* register for save states */
247	247	init_savestate(machine);
r4679	r4680
427	427
428	428	static TIMER_CALLBACK( interrupt_off )
429	429	{
430		cpu_set_input_line(machine->cpu[0], 0, CLEAR_LINE);
	430	cputag_set_input_line(machine, "maincpu", 0, CLEAR_LINE);
431	431	}
432	432
433	433
r4679	r4680
440	440	/* bit 0 controls the interrupt mode: mode 0 means assert until acknowledged */
441	441	if ((interrupt_enable & 0x01) == 0)
442	442	{
443		cpu_set_input_line_and_vector(machine->cpu[0], 0, HOLD_LINE, interrupt_vector & 0xf0);
	443	cputag_set_input_line_and_vector(machine, "maincpu", 0, HOLD_LINE, interrupt_vector & 0xf0);
444	444	timer_set(machine, video_screen_get_time_until_vblank_end(machine->primary_screen), NULL, 0, interrupt_off);
445	445	}
446	446
447	447	/* mode 1 means assert for 1 instruction */
448	448	else
449	449	{
450		cpu_set_input_line_and_vector(machine->cpu[0], 0, ASSERT_LINE, interrupt_vector & 0xf0);
451		timer_set(machine, cpu_clocks_to_attotime(machine->cpu[0], 1), NULL, 0, interrupt_off);
	450	cputag_set_input_line_and_vector(machine, "maincpu", 0, ASSERT_LINE, interrupt_vector & 0xf0);
	451	timer_set(machine, cputag_clocks_to_attotime(machine, "maincpu", 1), NULL, 0, interrupt_off);
452	452	}
453	453
454	454	/* latch the feedback registers */
r4679	r4680
480	480	/* bit 2 controls the interrupt mode: mode 0 means assert until acknowledged */
481	481	if ((interrupt_enable & 0x04) == 0)
482	482	{
483		cpu_set_input_line_and_vector(machine->cpu[0], 0, HOLD_LINE, interrupt_vector);
	483	cputag_set_input_line_and_vector(machine, "maincpu", 0, HOLD_LINE, interrupt_vector);
484	484	timer_set(machine, video_screen_get_time_until_vblank_end(machine->primary_screen), NULL, 0, interrupt_off);
485	485	}
486	486
487	487	/* mode 1 means assert for 1 instruction */
488	488	else
489	489	{
490		cpu_set_input_line_and_vector(machine->cpu[0], 0, ASSERT_LINE, interrupt_vector);
491		timer_set(machine, cpu_clocks_to_attotime(machine->cpu[0], 1), NULL, 0, interrupt_off);
	490	cputag_set_input_line_and_vector(machine, "maincpu", 0, ASSERT_LINE, interrupt_vector);
	491	timer_set(machine, cputag_clocks_to_attotime(machine, "maincpu", 1), NULL, 0, interrupt_off);
492	492	}
493	493	}
494	494
r4679	r4680
957	957	relative to the beginning of time and use that, mod RNG_PERIOD.
958	958	*/
959	959
960		static void init_sparklestar(void)
	960	static void init_sparklestar(running_machine *machine)
961	961	{
962	962	UINT32 shiftreg;
963	963	int i;
r4679	r4680
966	966	astrocade_sparkle[0] = astrocade_sparkle[1] = astrocade_sparkle[2] = astrocade_sparkle[3] = 0;
967	967
968	968	/* allocate memory for the sparkle/star array */
969		sparklestar = auto_malloc(RNG_PERIOD);
	969	sparklestar = auto_alloc_array(machine, UINT8, RNG_PERIOD);
970	970
971	971	/* generate the data for the sparkle/star array */
972	972	for (shiftreg = i = 0; i < RNG_PERIOD; i++)

src/mame/video/megazone.c

r4679	r4680
109	109
110	110	VIDEO_START( megazone )
111	111	{
112		tmpbitmap = auto_bitmap_alloc(256,256,video_screen_get_format(machine->primary_screen));
	112	tmpbitmap = auto_bitmap_alloc(machine,256,256,video_screen_get_format(machine->primary_screen));
113	113	}
114	114
115	115

src/mame/video/toki.c

r4679	r4680
38	38
39	39	VIDEO_EOF( toki )
40	40	{
41		buffer_spriteram16_w(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM),0,0,0xffff);
	41	buffer_spriteram16_w(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0, 0, 0xffff);
42	42	}
43	43
44	44	VIDEO_EOF( tokib )
45	45	{
46		buffer_spriteram16_w(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM),0,0,0xffff);
	46	buffer_spriteram16_w(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0, 0, 0xffff);
47	47	}
48	48
49	49	static TILE_GET_INFO( get_text_tile_info )
50	50	{
51	51	int tile = videoram16[tile_index];
52		int color=(tile>>12)&0xf;
	52	int color = (tile >> 12) & 0xf;
53	53
54		tile&=0xfff;
	54	tile &= 0xfff;
55	55
56	56	SET_TILE_INFO(
57	57	0,
r4679	r4680
63	63	static TILE_GET_INFO( get_back_tile_info )
64	64	{
65	65	int tile = toki_background1_videoram16[tile_index];
66		int color=(tile>>12)&0xf;
	66	int color = (tile >> 12) & 0xf;
67	67
68		tile&=0xfff;
	68	tile &= 0xfff;
69	69
70	70	SET_TILE_INFO(
71	71	2,
r4679	r4680
77	77	static TILE_GET_INFO( get_fore_tile_info )
78	78	{
79	79	int tile = toki_background2_videoram16[tile_index];
80		int color=(tile>>12)&0xf;
	80	int color = (tile >> 12) & 0xf;
81	81
82		tile&=0xfff;
	82	tile &= 0xfff;
83	83
84	84	SET_TILE_INFO(
85	85	3,

src/mame/video/40love.c

r4679	r4680
119	119
120	120	VIDEO_START( fortyl )
121	121	{
122		fortyl_pixram1 = auto_malloc(0x4000);
123		fortyl_pixram2 = auto_malloc(0x4000);
124		memset(fortyl_pixram1,0,0x4000);
125		memset(fortyl_pixram2,0,0x4000);
	122	fortyl_pixram1 = auto_alloc_array_clear(machine, UINT8, 0x4000);
	123	fortyl_pixram2 = auto_alloc_array_clear(machine, UINT8, 0x4000);
126	124
127		pixel_bitmap1 = auto_bitmap_alloc(256,256,video_screen_get_format(machine->primary_screen));
128		pixel_bitmap2 = auto_bitmap_alloc(256,256,video_screen_get_format(machine->primary_screen));
	125	pixel_bitmap1 = auto_bitmap_alloc(machine,256,256,video_screen_get_format(machine->primary_screen));
	126	pixel_bitmap2 = auto_bitmap_alloc(machine,256,256,video_screen_get_format(machine->primary_screen));
129	127
130	128	background  = tilemap_create(machine, get_bg_tile_info, tilemap_scan_rows, 8,8,64,32);
131	129

src/mame/video/nbmj8688.c

r4679	r4680
561	561
562	562	static void common_video_start(running_machine *machine)
563	563	{
564		mjsikaku_tmpbitmap = auto_bitmap_alloc(512, 256, video_screen_get_format(machine->primary_screen));
565		mjsikaku_videoram = auto_malloc(512 * 256 * sizeof(UINT16));
566		nbmj8688_clut = auto_malloc(0x20 * sizeof(UINT8));
567		memset(mjsikaku_videoram, 0, (512 * 256 * sizeof(UINT16)));
	564	mjsikaku_tmpbitmap = auto_bitmap_alloc(machine, 512, 256, video_screen_get_format(machine->primary_screen));
	565	mjsikaku_videoram = auto_alloc_array_clear(machine, UINT16, 512 * 256);
	566	nbmj8688_clut = auto_alloc_array(machine, UINT8, 0x20);
568	567
569	568	mjsikaku_scrolly = 0;   // reset because crystalg/crystal2 don't write to this register
570	569	}
r4679	r4680
603	602	{
604	603	mjsikaku_gfxmode = GFXTYPE_PURE_16BIT;
605	604
606		HD61830B_ram[0] = auto_malloc(0x10000);
607		HD61830B_ram[1] = auto_malloc(0x10000);
	605	HD61830B_ram[0] = auto_alloc_array(machine, UINT8, 0x10000);
	606	HD61830B_ram[1] = auto_alloc_array(machine, UINT8, 0x10000);
608	607
609	608	common_video_start(machine);
610	609	}

src/mame/video/psychic5.c

r4679	r4680
254	254
255	255	tilemap_set_transparent_pen(fg_tilemap, 15);
256	256
257		ps5_pagedram[0] = auto_malloc(0x2000);
258		ps5_pagedram[1] = auto_malloc(0x2000);
	257	ps5_pagedram[0] = auto_alloc_array(machine, UINT8, 0x2000);
	258	ps5_pagedram[1] = auto_alloc_array(machine, UINT8, 0x2000);
259	259
260	260	psychic5_bg_videoram  = &ps5_pagedram[0][0x0000];
261	261	ps5_dummy_bg_ram      = &ps5_pagedram[0][0x1000];
r4679	r4680
263	263	ps5_palette_ram       = &ps5_pagedram[1][0x0400];
264	264	psychic5_fg_videoram  = &ps5_pagedram[1][0x1000];
265	265
266		jal_blend_table = auto_malloc(0xc00);
	266	jal_blend_table = auto_alloc_array(machine, UINT8, 0xc00);
267	267
268	268	bg_palette_ram_base = 0x400;
269	269	bg_palette_base = 0x100;
r4679	r4680
277	277
278	278	tilemap_set_transparent_pen(fg_tilemap, 15);
279	279
280		ps5_pagedram[0] = auto_malloc(0x2000);
281		ps5_pagedram[1] = auto_malloc(0x2000);
	280	ps5_pagedram[0] = auto_alloc_array(machine, UINT8, 0x2000);
	281	ps5_pagedram[1] = auto_alloc_array(machine, UINT8, 0x2000);
282	282
283	283	psychic5_bg_videoram  = &ps5_pagedram[0][0x0000];
284	284	ps5_dummy_bg_ram      = &ps5_pagedram[0][0x1000];
r4679	r4680
286	286	psychic5_fg_videoram  = &ps5_pagedram[1][0x0800];
287	287	ps5_palette_ram       = &ps5_pagedram[1][0x1000];
288	288
289		//jal_blend_table = auto_malloc(0xc00);
	289	//jal_blend_table = auto_alloc_array(machine, UINT8, 0xc00);
290	290	jal_blend_table = NULL;
291	291
292	292	bg_palette_ram_base = 0x000;

src/mame/video/othunder.c

r4679	r4680
24	24	Multiply this by 32 to give room for the number of small sprites,
25	25	which are what actually get put in the structure. */
26	26
27		spritelist = auto_malloc(0x2000 * sizeof(*spritelist));
	27	spritelist = auto_alloc_array(machine, struct tempsprite, 0x2000);
28	28
29	29	TC0100SCN_vh_start(machine,1,TC0100SCN_GFX_NUM,4,0,0,0,0,0,0);
30	30

src/mame/video/ginganin.c

r4679	r4680
181	181	tilemap_set_flip(ALL_TILEMAPS,flipscreen ? (TILEMAP_FLIPY | TILEMAP_FLIPX) : 0);
182	182	break;
183	183	case 7:
184		soundlatch_w(space,0,data);
185		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_NMI, PULSE_LINE);
	184	soundlatch_w(space, 0, data);
	185	cputag_set_input_line(space->machine, "audiocpu", INPUT_LINE_NMI, PULSE_LINE);
186	186	break;
187	187	default:
188	188	logerror("CPU #0 PC %06X : Warning, videoreg %04X <- %04X\n",cpu_get_pc(space->cpu),offset,data);

src/mame/video/quasar.c

r4679	r4680
101	101	int width = video_screen_get_width(machine->primary_screen);
102	102	int height = video_screen_get_height(machine->primary_screen);
103	103
104		quasar_effectram = auto_malloc(0x400);
	104	quasar_effectram = auto_alloc_array(machine, UINT8, 0x400);
105	105
106	106	/* configure the S2636 chips */
107		s2636_0 = s2636_config(cvs_s2636_0_ram, height, width, CVS_S2636_Y_OFFSET, CVS_S2636_X_OFFSET);
108		s2636_1 = s2636_config(cvs_s2636_1_ram, height, width, CVS_S2636_Y_OFFSET, CVS_S2636_X_OFFSET);
109		s2636_2 = s2636_config(cvs_s2636_2_ram, height, width, CVS_S2636_Y_OFFSET, CVS_S2636_X_OFFSET);
	107	s2636_0 = s2636_config(machine, cvs_s2636_0_ram, height, width, CVS_S2636_Y_OFFSET, CVS_S2636_X_OFFSET);
	108	s2636_1 = s2636_config(machine, cvs_s2636_1_ram, height, width, CVS_S2636_Y_OFFSET, CVS_S2636_X_OFFSET);
	109	s2636_2 = s2636_config(machine, cvs_s2636_2_ram, height, width, CVS_S2636_Y_OFFSET, CVS_S2636_X_OFFSET);
110	110
111	111	/* create helper bitmaps */
112	112	cvs_collision_background = video_screen_auto_bitmap_alloc(machine->primary_screen);

src/mame/video/mrjong.c

r4679	r4680
12	12
13	13	/***************************************************************************
14	14
15		Convert the color PROMs. (from video/penco.c)
	15	Convert the color PROMs. (from video/pengo.c)
16	16
17	17	***************************************************************************/
18	18	PALETTE_INIT( mrjong )
r4679	r4680
101	101	bg_tilemap = tilemap_create(machine, get_bg_tile_info, tilemap_scan_rows_flip_xy, 8, 8, 32, 32);
102	102	}
103	103
	104	/*
	105	Note: First 0x40 entries in the videoram are actually spriteram
	106	*/
104	107	static void draw_sprites(running_machine *machine, bitmap_t *bitmap, const rectangle *cliprect)
105	108	{
106	109	int offs;
107	110
108		for (offs = (spriteram_size - 4); offs >= 0; offs -= 4)
	111	for (offs = (0x40 - 4); offs >= 0; offs -= 4)
109	112	{
110	113	int sprt;
111	114	int color;
112	115	int sx, sy;
113	116	int flipx, flipy;
114	117
115		sprt = (((spriteram[offs + 1] >> 2) & 0x3f) | ((spriteram[offs + 3] & 0x20) << 1));
116		flipx = (spriteram[offs + 1] & 0x01) >> 0;
117		flipy = (spriteram[offs + 1] & 0x02) >> 1;
118		color = (spriteram[offs + 3] & 0x1f);
	118	sprt = (((videoram[offs + 1] >> 2) & 0x3f) | ((videoram[offs + 3] & 0x20) << 1));
	119	flipx = (videoram[offs + 1] & 0x01) >> 0;
	120	flipy = (videoram[offs + 1] & 0x02) >> 1;
	121	color = (videoram[offs + 3] & 0x1f);
119	122
120		sx = 224 - spriteram[offs + 2];
121		sy = spriteram[offs + 0];
	123	sx = 224 - videoram[offs + 2];
	124	sy = videoram[offs + 0];
122	125	if (flip_screen_get(machine))
123	126	{
124	127	sx = 208 - sx;

src/mame/video/slapshot.c

r4679	r4680
34	34	{
35	35	int i;
36	36
37		spriteram_delayed = auto_malloc(spriteram_size);
38		spriteram_buffered = auto_malloc(spriteram_size);
39		spritelist = auto_malloc(0x400 * sizeof(*spritelist));
	37	spriteram_delayed = auto_alloc_array(machine, UINT16, spriteram_size/2);
	38	spriteram_buffered = auto_alloc_array(machine, UINT16, spriteram_size/2);
	39	spritelist = auto_alloc_array(machine, struct tempsprite, 0x400);
40	40
41	41	if (has_TC0480SCP(machine))   /* it's a tc0480scp game */
42	42	TC0480SCP_vh_start(machine,TC0480SCP_GFX_NUM,taito_hide_pixels,30,9,-1,1,0,2,256);

src/mame/video/vsnes.c

r4679	r4680
16	16
17	17	static void ppu_irq_1( const device_config *device, int *ppu_regs )
18	18	{
19		cpu_set_input_line(device->machine->cpu[0], INPUT_LINE_NMI, PULSE_LINE );
	19	cputag_set_input_line(device->machine, "maincpu", INPUT_LINE_NMI, PULSE_LINE );
20	20	}
21	21
22	22	static void ppu_irq_2( const device_config *device, int *ppu_regs )
23	23	{
24		cpu_set_input_line(device->machine->cpu[1], INPUT_LINE_NMI, PULSE_LINE );
	24	cputag_set_input_line(device->machine, "sub", INPUT_LINE_NMI, PULSE_LINE );
25	25	}
26	26
27	27	/* our ppu interface                                            */

src/mame/video/victory.c

r4679	r4680
71	71	VIDEO_START( victory )
72	72	{
73	73	/* allocate bitmapram */
74		rram = auto_malloc(0x4000);
75		gram = auto_malloc(0x4000);
76		bram = auto_malloc(0x4000);
	74	rram = auto_alloc_array(machine, UINT8, 0x4000);
	75	gram = auto_alloc_array(machine, UINT8, 0x4000);
	76	bram = auto_alloc_array(machine, UINT8, 0x4000);
77	77
78	78	/* allocate bitmaps */
79		bgbitmap = auto_malloc(256 * 256);
80		fgbitmap = auto_malloc(256 * 256);
	79	bgbitmap = auto_alloc_array(machine, UINT8, 256 * 256);
	80	fgbitmap = auto_alloc_array(machine, UINT8, 256 * 256);
81	81
82	82	/* reset globals */
83	83	vblank_irq = 0;
r4679	r4680
103	103	static void victory_update_irq(running_machine *machine)
104	104	{
105	105	if (vblank_irq || fgcoll || (bgcoll && (video_control & 0x20)))
106		cpu_set_input_line(machine->cpu[0], 0, ASSERT_LINE);
	106	cputag_set_input_line(machine, "maincpu", 0, ASSERT_LINE);
107	107	else
108		cpu_set_input_line(machine->cpu[0], 0, CLEAR_LINE);
	108	cputag_set_input_line(machine, "maincpu", 0, CLEAR_LINE);
109	109	}
110	110
111	111

src/mame/video/pacland.c

r4679	r4680
125	125	switch_palette(machine);
126	126
127	127	/* precalculate transparency masks for sprites */
128		transmask[0] = auto_malloc(64 * sizeof(transmask[0][0]));
129		transmask[1] = auto_malloc(64 * sizeof(transmask[0][0]));
130		transmask[2] = auto_malloc(64 * sizeof(transmask[0][0]));
	128	transmask[0] = auto_alloc_array(machine, UINT32, 64);
	129	transmask[1] = auto_alloc_array(machine, UINT32, 64);
	130	transmask[2] = auto_alloc_array(machine, UINT32, 64);
131	131	for (i = 0; i < 64; i++)
132	132	{
133	133	int palentry;

src/mame/video/ladyfrog.c

r4679	r4680
136	136
137	137	VIDEO_START( ladyfrog )
138	138	{
139		ladyfrog_spriteram = auto_malloc (160);
	139	ladyfrog_spriteram = auto_alloc_array(machine, UINT8, 160);
140	140	bg_tilemap = tilemap_create( machine, get_tile_info,tilemap_scan_rows,8,8,32,32 );
141	141
142		paletteram = auto_malloc(0x200);
143		paletteram_2 = auto_malloc(0x200);
	142	paletteram = auto_alloc_array(machine, UINT8, 0x200);
	143	paletteram_2 = auto_alloc_array(machine, UINT8, 0x200);
144	144	tilemap_set_scroll_cols(bg_tilemap,32);
145	145	tilemap_set_scrolldy( bg_tilemap,   15, 15 );
146	146	}

src/mame/video/sidearms.c

r4679	r4680
52	52	/* bit 4 resets the sound CPU */
53	53	if (data & 0x10)
54	54	{
55		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_RESET, PULSE_LINE);
	55	cputag_set_input_line(space->machine, "audiocpu", INPUT_LINE_RESET, PULSE_LINE);
56	56	}
57	57
58	58	/* bit 5 enables starfield */
r4679	r4680
359	359
360	360	VIDEO_EOF( sidearms )
361	361	{
362		const address_space *space = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM);
	362	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
363	363
364	364	buffer_spriteram_w(space, 0, 0);
365	365	}

src/mame/video/model2rd.c

r4679	r4680
57	57	static void MODEL2_FUNC_NAME(void *dest, INT32 scanline, const poly_extent *extent, const void *extradata, int threadid)
58	58	{
59	59	#if !defined( MODEL2_TRANSLUCENT)
60		const poly_extra_data *extra = extradata;
61		bitmap_t *destmap = dest;
	60	const poly_extra_data *extra = (const poly_extra_data *)extradata;
	61	bitmap_t *destmap = (bitmap_t *)dest;
62	62	UINT32 *p = BITMAP_ADDR32(destmap, scanline, 0);
63	63
64	64	/* extract color information */
r4679	r4680
109	109	/* textured render path */
110	110	static void MODEL2_FUNC_NAME(void *dest, INT32 scanline, const poly_extent *extent, const void *extradata, int threadid)
111	111	{
112		const poly_extra_data *extra = extradata;
113		bitmap_t *destmap = dest;
	112	const poly_extra_data *extra = (const poly_extra_data *)extradata;
	113	bitmap_t *destmap = (bitmap_t *)dest;
114	114	UINT32 *p = BITMAP_ADDR32(destmap, scanline, 0);
115	115
116	116	UINT32   tex_width = extra->texwidth;

src/mame/video/dogfgt.c

r4679	r4680
83	83	{
84	84	bg_tilemap = tilemap_create(machine, get_tile_info,tilemap_scan_rows,16,16,32,32);
85	85
86		bitmapram = auto_malloc(BITMAPRAM_SIZE);
	86	bitmapram = auto_alloc_array(machine, UINT8, BITMAPRAM_SIZE);
87	87
88	88	pixbitmap = video_screen_auto_bitmap_alloc(machine->primary_screen);
89	89	}
r4679	r4680
226	226
227	227	if (lastflip != flip_screen_get(screen->machine) || lastpixcolor != pixcolor)
228	228	{
229		const address_space *space = cpu_get_address_space(screen->machine->cpu[0], ADDRESS_SPACE_PROGRAM);
	229	const address_space *space = cputag_get_address_space(screen->machine, "maincpu", ADDRESS_SPACE_PROGRAM);
230	230
231	231	lastflip = flip_screen_get(screen->machine);
232	232	lastpixcolor = pixcolor;

src/mame/video/taitosj.c

r4679	r4680
192	192	{
193	193	int i;
194	194
195		sprite_layer_collbitmap1 = auto_bitmap_alloc(16,16,video_screen_get_format(machine->primary_screen));
	195	sprite_layer_collbitmap1 = auto_bitmap_alloc(machine,16,16,video_screen_get_format(machine->primary_screen));
196	196
197	197	for (i = 0; i < 3; i++)
198	198	{
r4679	r4680
200	200	sprite_layer_collbitmap2[i] = video_screen_auto_bitmap_alloc(machine->primary_screen);
201	201	}
202	202
203		sprite_sprite_collbitmap1 = auto_bitmap_alloc(32,32,video_screen_get_format(machine->primary_screen));
204		sprite_sprite_collbitmap2 = auto_bitmap_alloc(32,32,video_screen_get_format(machine->primary_screen));
	203	sprite_sprite_collbitmap1 = auto_bitmap_alloc(machine,32,32,video_screen_get_format(machine->primary_screen));
	204	sprite_sprite_collbitmap2 = auto_bitmap_alloc(machine,32,32,video_screen_get_format(machine->primary_screen));
205	205
206	206	gfx_element_set_source(machine->gfx[0], taitosj_characterram);
207	207	gfx_element_set_source(machine->gfx[1], taitosj_characterram);

src/mame/video/vigilant.c

r4679	r4680
40	40
41	41	VIDEO_START( vigilant )
42	42	{
43		bg_bitmap = auto_bitmap_alloc(512*4,256,video_screen_get_format(machine->primary_screen));
	43	bg_bitmap = auto_bitmap_alloc(machine,512*4,256,video_screen_get_format(machine->primary_screen));
44	44	}
45	45
46	46

src/mame/video/nbmj8991.c

r4679	r4680
307	307	int height = video_screen_get_height(machine->primary_screen);
308	308
309	309	nbmj8991_tmpbitmap = video_screen_auto_bitmap_alloc(machine->primary_screen);
310		nbmj8991_videoram = auto_malloc(width * height * sizeof(UINT8));
311		nbmj8991_clut = auto_malloc(0x800 * sizeof(UINT8));
	310	nbmj8991_videoram = auto_alloc_array(machine, UINT8, width * height);
	311	nbmj8991_clut = auto_alloc_array(machine, UINT8, 0x800);
312	312	memset(nbmj8991_videoram, 0x00, (width * height * sizeof(UINT8)));
313	313	}
314	314

src/mame/video/esripsys.c

r4679	r4680
47	47
48	48	INTERRUPT_GEN( esripsys_vblank_irq )
49	49	{
50		cpu_set_input_line(device->machine->cpu[ESRIPSYS_GAME_CPU], M6809_IRQ_LINE, ASSERT_LINE);
	50	cputag_set_input_line(device->machine, "game_cpu", M6809_IRQ_LINE, ASSERT_LINE);
51	51	esripsys_frame_vbl = 0;
52	52	}
53	53
r4679	r4680
58	58	if (video_firq)
59	59	{
60	60	video_firq = 0;
61		cpu_set_input_line(machine->cpu[ESRIPSYS_GAME_CPU], M6809_FIRQ_LINE, CLEAR_LINE);
	61	cputag_set_input_line(machine, "game_cpu", M6809_FIRQ_LINE, CLEAR_LINE);
62	62	}
63	63
64	64	/* Not sure if this is totally accurate - I couldn't find the circuit that generates the FIRQs! */
65	65	if (!(v % 6) && v && esripsys_video_firq_en && v < ESRIPSYS_VBLANK_START)
66	66	{
67	67	video_firq = 1;
68		cpu_set_input_line(machine->cpu[ESRIPSYS_GAME_CPU], M6809_FIRQ_LINE, ASSERT_LINE);
	68	cputag_set_input_line(machine, "game_cpu", M6809_FIRQ_LINE, ASSERT_LINE);
69	69	}
70	70
71	71	/* Adjust for next scanline */
r4679	r4680
95	95	int i;
96	96
97	97	/* Allocate memory for the two 512-pixel line buffers */
98		line_buffer[0].colour_buf = auto_malloc(512);
99		line_buffer[0].intensity_buf = auto_malloc(512);
100		line_buffer[0].priority_buf = auto_malloc(512);
	98	line_buffer[0].colour_buf = auto_alloc_array(machine, UINT8, 512);
	99	line_buffer[0].intensity_buf = auto_alloc_array(machine, UINT8, 512);
	100	line_buffer[0].priority_buf = auto_alloc_array(machine, UINT8, 512);
101	101
102		line_buffer[1].colour_buf = auto_malloc(512);
103		line_buffer[1].intensity_buf = auto_malloc(512);
104		line_buffer[1].priority_buf = auto_malloc(512);
	102	line_buffer[1].colour_buf = auto_alloc_array(machine, UINT8, 512);
	103	line_buffer[1].intensity_buf = auto_alloc_array(machine, UINT8, 512);
	104	line_buffer[1].priority_buf = auto_alloc_array(machine, UINT8, 512);
105	105
106	106	/* Create and initialise the HBLANK timers */
107	107	hblank_start_timer = timer_alloc(machine, hblank_start_callback, NULL);
r4679	r4680
109	109	timer_adjust_oneshot(hblank_start_timer, video_screen_get_time_until_pos(machine->primary_screen, 0, ESRIPSYS_HBLANK_START), 0);
110	110
111	111	/* Create the sprite scaling table */
112		scale_table = auto_malloc(64 * 64);
	112	scale_table = auto_alloc_array(machine, UINT8, 64 * 64);
113	113
114	114	for (i = 0; i < 64; ++i)
115	115	{
r4679	r4680
142	142	}
143	143
144	144	/* Now create a lookup table for scaling the sprite 'fig' value */
145		fig_scale_table = auto_malloc(1024 * 64);
	145	fig_scale_table = auto_alloc_array(machine, UINT8, 1024 * 64);
146	146
147	147	for (i = 0; i < 1024; ++i)
148	148	{

src/mame/video/splash.c

r4679	r4680
78	78
79	79	***************************************************************************/
80	80
81		READ16_HANDLER( splash_vram_r )
82		{
83		return splash_videoram[offset];
84		}
85
86	81	WRITE16_HANDLER( splash_vram_w )
87	82	{
88	83	COMBINE_DATA(&splash_videoram[offset]);

src/mame/video/namcos2.c

r4679	r4680
394	394	VIDEO_START( luckywld )
395	395	{
396	396	namco_tilemap_init(machine,2,memory_region(machine, "gfx4"),TilemapCB);
397		namco_obj_init( 0, 0x0, NULL );
	397	namco_obj_init( machine, 0, 0x0, NULL );
398	398	if( namcos2_gametype==NAMCOS2_LUCKY_AND_WILD )
399	399	{
400	400	namco_roz_init( machine, 1, "gfx5" );
r4679	r4680
435	435	VIDEO_START( sgunner )
436	436	{
437	437	namco_tilemap_init(machine,2,memory_region(machine, "gfx4"),TilemapCB);
438		namco_obj_init( 0, 0x0, NULL );
	438	namco_obj_init( machine, 0, 0x0, NULL );
439	439	}
440	440
441	441	VIDEO_UPDATE( sgunner )

src/mame/video/exidy440.c

r4679	r4680
66	66	exidy440_firq_beam = 0;
67	67
68	68	/* allocate a buffer for VRAM */
69		local_videoram = auto_malloc(256 * 256 * 2);
	69	local_videoram = auto_alloc_array(machine, UINT8, 256 * 256 * 2);
70	70	memset(local_videoram, 0, 256 * 256 * 2);
71	71
72	72	/* allocate a buffer for palette RAM */
73		local_paletteram = auto_malloc(512 * 2);
	73	local_paletteram = auto_alloc_array(machine, UINT8, 512 * 2);
74	74	memset(local_paletteram, 0, 512 * 2);
75	75	}
76	76
r4679	r4680
244	244	static void exidy440_update_firq(running_machine *machine)
245	245	{
246	246	if (exidy440_firq_vblank || (firq_enable && exidy440_firq_beam))
247		cpu_set_input_line(machine->cpu[0], 1, ASSERT_LINE);
	247	cputag_set_input_line(machine, "maincpu", 1, ASSERT_LINE);
248	248	else
249		cpu_set_input_line(machine->cpu[0], 1, CLEAR_LINE);
	249	cputag_set_input_line(machine, "maincpu", 1, CLEAR_LINE);
250	250	}
251	251
252	252

src/mame/video/tx1.c

r4679	r4680
34	34	*/
35	35	static TIMER_CALLBACK( interrupt_callback )
36	36	{
37		cpu_set_input_line_and_vector(machine->cpu[0], 0, HOLD_LINE, 0xff);
	37	cputag_set_input_line_and_vector(machine, "main_cpu", 0, HOLD_LINE, 0xff);
38	38	timer_adjust_oneshot(interrupt_timer, video_screen_get_time_until_pos(machine->primary_screen, CURSOR_YPOS, CURSOR_XPOS), 0);
39	39	}
40	40
r4679	r4680
1122	1122	VIDEO_START( tx1 )
1123	1123	{
1124	1124	/* Allocate a large bitmap that covers the three screens */
1125		tx1_bitmap = auto_bitmap_alloc(768, 256, BITMAP_FORMAT_INDEXED16);
	1125	tx1_bitmap = auto_bitmap_alloc(machine, 768, 256, BITMAP_FORMAT_INDEXED16);
1126	1126	tx1_texture = render_texture_alloc(NULL, NULL);
1127	1127
1128	1128	/* Allocate some bitmaps */
1129		tx1_chr_bmp = auto_malloc(sizeof(UINT8) * 256 * 3 * 240);
1130		tx1_obj_bmp = auto_malloc(sizeof(UINT8) * 256 * 3 * 240);
1131		tx1_rod_bmp = auto_malloc(sizeof(UINT8) * 256 * 3 * 240);
	1129	tx1_chr_bmp = auto_alloc_array(machine, UINT8, 256 * 3 * 240);
	1130	tx1_obj_bmp = auto_alloc_array(machine, UINT8, 256 * 3 * 240);
	1131	tx1_rod_bmp = auto_alloc_array(machine, UINT8, 256 * 3 * 240);
1132	1132
1133	1133	/* Set a timer to run the interrupts */
1134	1134	interrupt_timer = timer_alloc(machine, interrupt_callback, NULL);
r4679	r4680
2939	2939	}
2940	2940	case 0xe0:
2941	2941	{
2942		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_TEST, CLEAR_LINE);
	2942	cputag_set_input_line(space->machine, "math_cpu", INPUT_LINE_TEST, CLEAR_LINE);
2943	2943	vregs.flags = data;
2944	2944	break;
2945	2945	}
r4679	r4680
3045	3045	VIDEO_START( buggyboy )
3046	3046	{
3047	3047	/* Allocate some bitmaps */
3048		bb_chr_bmp = auto_malloc(sizeof(UINT8) * 3 * 256 * 240);
3049		bb_obj_bmp = auto_malloc(sizeof(UINT8) * 3 * 256 * 240);
3050		bb_rod_bmp = auto_malloc(sizeof(UINT8) * 3 * 256 * 240);
	3048	bb_chr_bmp = auto_alloc_array(machine, UINT8, 3 * 256 * 240);
	3049	bb_obj_bmp = auto_alloc_array(machine, UINT8, 3 * 256 * 240);
	3050	bb_rod_bmp = auto_alloc_array(machine, UINT8, 3 * 256 * 240);
3051	3051
3052	3052	/* Set a timer to run the interrupts */
3053	3053	interrupt_timer = timer_alloc(machine, interrupt_callback, NULL);
r4679	r4680
3059	3059	VIDEO_START( buggybjr )
3060	3060	{
3061	3061	/* Allocate some bitmaps */
3062		bb_chr_bmp = auto_malloc(sizeof(UINT8) * 256 * 240);
3063		bb_obj_bmp = auto_malloc(sizeof(UINT8) * 256 * 240);
3064		bb_rod_bmp = auto_malloc(sizeof(UINT8) * 256 * 240);
	3062	bb_chr_bmp = auto_alloc_array(machine, UINT8, 256 * 240);
	3063	bb_obj_bmp = auto_alloc_array(machine, UINT8, 256 * 240);
	3064	bb_rod_bmp = auto_alloc_array(machine, UINT8, 256 * 240);
3065	3065
3066	3066	/* Set a timer to run the interrupts */
3067	3067	interrupt_timer = timer_alloc(machine, interrupt_callback, NULL);

src/mame/video/blstroid.c

r4679	r4680
98	98
99	99	static TIMER_CALLBACK( irq_off )
100	100	{
101		const address_space *space = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM);
	101	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
102	102
103	103	/* clear the interrupt */
104	104	atarigen_scanline_int_ack_w(space, 0, 0, 0xffff);
r4679	r4680
108	108	static TIMER_CALLBACK( irq_on )
109	109	{
110	110	/* generate the interrupt */
111		atarigen_scanline_int_gen(machine->cpu[0]);
	111	atarigen_scanline_int_gen(cputag_get_cpu(machine, "maincpu"));
112	112	atarigen_update_interrupts(machine);
113	113	}
114	114

src/mame/video/tatsumi.c

r4679	r4680
206	206	VIDEO_START( apache3 )
207	207	{
208	208	tx_layer = tilemap_create(machine, get_text_tile_info,tilemap_scan_rows,8,8,64,64);
209		shadow_pen_array = auto_malloc(8192);
210		temp_bitmap = auto_bitmap_alloc(512, 512, BITMAP_FORMAT_RGB32);
211		apache3_road_x_ram = auto_malloc(512 * sizeof(UINT16));
	209	shadow_pen_array = auto_alloc_array_clear(machine, UINT8, 8192);
	210	temp_bitmap = auto_bitmap_alloc(machine, 512, 512, BITMAP_FORMAT_RGB32);
	211	apache3_road_x_ram = auto_alloc_array(machine, UINT8, 512);
212	212
213		memset(shadow_pen_array, 0, 8192);
214	213	tilemap_set_transparent_pen(tx_layer,0);
215	214	}
216	215
217	216	VIDEO_START( roundup5 )
218	217	{
219	218	tx_layer = tilemap_create(machine, get_text_tile_info,tilemap_scan_rows,8,8,128,64);
220		shadow_pen_array = auto_malloc(8192);
221		roundup5_vram = auto_malloc(0x48000 * 4);
	219	shadow_pen_array = auto_alloc_array_clear(machine, UINT8, 8192);
	220	roundup5_vram = auto_alloc_array(machine, UINT16, (0x48000 * 4)/2);
222	221
223		memset(shadow_pen_array, 0, 8192);
224	222	tilemap_set_transparent_pen(tx_layer,0);
225	223
226	224	gfx_element_set_source(machine->gfx[1], (UINT8 *)roundup5_vram);
r4679	r4680
234	232	layer2 = tilemap_create(machine, get_tile_info_bigfight_1,tilemap_scan_rows,8,8,64,512);
235	233	layer3 = tilemap_create(machine, get_tile_info_bigfight_1,tilemap_scan_rows,8,8,64,512);
236	234
237		shadow_pen_array = auto_malloc(8192);
238		memset(shadow_pen_array, 0, 8192);
	235	shadow_pen_array = auto_alloc_array_clear(machine, UINT8, 8192);
239	236	}
240	237
241	238	VIDEO_START( bigfight )
r4679	r4680
245	242	layer2 = tilemap_create(machine, get_tile_info_bigfight_1,tilemap_scan_rows,8,8,128,256);
246	243	layer3 = tilemap_create(machine, get_tile_info_bigfight_1,tilemap_scan_rows,8,8,128,256);
247	244
248		shadow_pen_array = auto_malloc(8192);
249		memset(shadow_pen_array, 0, 8192);
	245	shadow_pen_array = auto_alloc_array_clear(machine, UINT8, 8192);
250	246	}
251	247
252	248	/********************************************************************/

src/mame/video/konamiic.c

r4679	r4680
1522	1522	K007342_tilemap[0] = tilemap_create(machine, K007342_get_tile_info0,K007342_scan,8,8,64,32);
1523	1523	K007342_tilemap[1] = tilemap_create(machine, K007342_get_tile_info1,K007342_scan,8,8,64,32);
1524	1524
1525		K007342_ram = auto_malloc(0x2000);
1526		K007342_scroll_ram = auto_malloc(0x0200);
	1525	K007342_ram = auto_alloc_array(machine, UINT8, 0x2000);
	1526	K007342_scroll_ram = auto_alloc_array(machine, UINT8, 0x0200);
1527	1527
1528	1528	memset(K007342_ram,0,0x2000);
1529	1529
r4679	r4680
1697	1697	{
1698	1698	K007420_gfx = machine->gfx[gfxnum];
1699	1699	K007420_callback = callback;
1700		K007420_ram = auto_malloc(0x200);
	1700	K007420_ram = auto_alloc_array_clear(machine, UINT8, 0x200);
1701	1701
1702		memset(K007420_ram,0,0x200);
1703
1704	1702	K007420_banklimit = -1;
1705	1703
1706	1704	state_save_register_global_pointer(machine, K007420_ram, 0x0200);
r4679	r4680
2041	2039	K052109_tilemap[1] = tilemap_create(machine, K052109_get_tile_info1,tilemap_scan_rows,8,8,64,32);
2042	2040	K052109_tilemap[2] = tilemap_create(machine, K052109_get_tile_info2,tilemap_scan_rows,8,8,64,32);
2043	2041
2044		K052109_ram = auto_malloc(0x6000);
	2042	K052109_ram = auto_alloc_array(machine, UINT8, 0x6000);
2045	2043
2046	2044	memset(K052109_ram,0,0x6000);
2047	2045
r4679	r4680
2549	2547	K051960_memory_region = gfx_memory_region;
2550	2548	K051960_gfx = machine->gfx[gfx_index];
2551	2549	K051960_callback = callback;
2552		K051960_ram = auto_malloc(0x400);
2553		memset(K051960_ram,0,0x400);
	2550	K051960_ram = auto_alloc_array_clear(machine, UINT8, 0x400);
2554	2551
2555	2552	state_save_register_global(machine, K051960_romoffset);
2556	2553	state_save_register_global(machine, K051960_spriteflip);
r4679	r4680
3046	3043	K053245_callback[chip] = callback;
3047	3044	K053244_rombank[chip] = 0;
3048	3045	K053245_ramsize[chip] = 0x800;
3049		K053245_ram[chip] = auto_malloc(K053245_ramsize[chip]);
	3046	K053245_ram[chip] = auto_alloc_array_clear(machine, UINT16, K053245_ramsize[chip]/2);
3050	3047	K053245_dx[chip] = K053245_dy[chip] = 0;
3051	3048
3052		K053245_buffer[chip] = auto_malloc(K053245_ramsize[chip]);
	3049	K053245_buffer[chip] = auto_alloc_array_clear(machine, UINT16, K053245_ramsize[chip]/2);
3053	3050
3054		memset(K053245_ram[chip],0,K053245_ramsize[chip]);
3055		memset(K053245_buffer[chip],0,K053245_ramsize[chip]);
3056
3057	3051	state_save_register_item_pointer(machine, "K053245", NULL, chip, K053245_ram[chip], K053245_ramsize[chip] / 2);
3058	3052	state_save_register_item_pointer(machine, "K053245", NULL, chip, K053245_buffer[chip], K053245_ramsize[chip] / 2);
3059	3053	state_save_register_item(machine, "K053245", NULL, chip, K053244_rombank[chip]);
r4679	r4680
3812	3806	K053247_gfx = machine->gfx[gfx_index];
3813	3807	K053247_callback = callback;
3814	3808	K053246_OBJCHA_line = CLEAR_LINE;
3815		K053247_ram = auto_malloc(0x1000);
	3809	K053247_ram = auto_alloc_array(machine, UINT16, 0x1000/2);
3816	3810
3817	3811	memset(K053247_ram,  0, 0x1000);
3818	3812	memset(K053246_regs, 0, 8);
r4679	r4680
3893	3887	size4 = (memory_region_length(machine, gfx_memory_region)/(1024*1024))/5;
3894	3888	size4 *= 4*1024*1024;
3895	3889	/* set the # of tiles based on the 4bpp section */
3896		K055673_rom = auto_malloc(size4 * 5);
	3890	K055673_rom = auto_alloc_array(machine, UINT16, size4 * 5 / 2);
3897	3891	d = (UINT8 *)K055673_rom;
3898	3892	// now combine the graphics together to form 5bpp
3899	3893	s1 = memory_region(machine, gfx_memory_region); // 4bpp area
r4679	r4680
3941	3935	K053247_gfx = machine->gfx[gfx_index];
3942	3936	K053247_callback = callback;
3943	3937	K053246_OBJCHA_line = CLEAR_LINE;
3944		K053247_ram = auto_malloc(0x1000);
	3938	K053247_ram = auto_alloc_array(machine, UINT16, 0x1000/2);
3945	3939
3946	3940	memset(K053247_ram,  0, 0x1000);
3947	3941	memset(K053246_regs, 0, 8);
r4679	r4680
4698	4692
4699	4693	K051316_tilemap[chip] = tilemap_create(machine, get_tile_info[chip],tilemap_scan_rows,16,16,32,32);
4700	4694
4701		K051316_ram[chip] = auto_malloc(0x800);
	4695	K051316_ram[chip] = auto_alloc_array(machine, UINT8, 0x800);
4702	4696
4703	4697	if (!pen_is_mask)
4704	4698	tilemap_set_transparent_pen(K051316_tilemap[chip],transparent_pen);
r4679	r4680
5783	5777	K056832_PageTileMode[i] = 1;
5784	5778	}
5785	5779
5786		K056832_videoram = auto_malloc(0x2000 * (K056832_PAGE_COUNT+1));
	5780	K056832_videoram = auto_alloc_array(machine, UINT16, 0x2000 * (K056832_PAGE_COUNT+1) / 2);
5787	5781
5788	5782	K056832_tilemap[0x0] = tilemap_create(machine, K056832_get_tile_info0, tilemap_scan_rows,  8, 8, 64, 32);
5789	5783	K056832_tilemap[0x1] = tilemap_create(machine, K056832_get_tile_info1, tilemap_scan_rows,  8, 8, 64, 32);
r4679	r4680
7458	7452	/*                                                                         */
7459	7453	/***************************************************************************/
7460	7454
	7455	struct K053250_CHIPTAG
	7456	{
	7457	UINT8 regs[8];
	7458	UINT8 *base;
	7459	UINT16 *ram, *rammax;
	7460	UINT16 *buffer[2];
	7461	UINT32 rommask;
	7462	int page[2];
	7463	int frame, offsx, offsy;
	7464	};
	7465
7461	7466	static struct
7462	7467	{
7463	7468	int chips;
7464		struct K053250_CHIPTAG
7465		{
7466		UINT8 regs[8];
7467		UINT8 *base;
7468		UINT16 *ram, *rammax;
7469		UINT16 *buffer[2];
7470		UINT32 rommask;
7471		int page[2];
7472		int frame, offsx, offsy;
7473		} chip[2];
	7469	struct K053250_CHIPTAG chip[2];
7474	7470	} K053250_info;
7475	7471
7476	7472	void K053250_set_LayerOffset(int chip, int offsx, int offsy)
r4679	r4680
7528	7524	for(chip=0; chip<chips; chip++)
7529	7525	{
7530	7526	K053250_info.chip[chip].base = memory_region(machine, region[chip]);
7531		ram = auto_malloc(0x6000);
	7527	ram = auto_alloc_array(machine, UINT16, 0x6000/2);
7532	7528	K053250_info.chip[chip].ram = ram;
7533	7529	K053250_info.chip[chip].rammax = ram + 0x800;
7534	7530	K053250_info.chip[chip].buffer[0] = ram + 0x2000;

src/mame/video/dotrikun.c

r4679	r4680
21	21	}
22	22
23	23
	24	VIDEO_START( dotrikun )
	25	{
	26	state_save_register_global(machine, color);
	27	}
	28
24	29	VIDEO_UPDATE( dotrikun )
25	30	{
26	31	int offs;

src/mame/video/harddriv.c

r4679	r4680
78	78	gfx_palettebank = 0;
79	79
80	80	/* allocate the mask table */
81		mask_table = auto_malloc(sizeof(UINT32) * 4 * 65536);
	81	mask_table = auto_alloc_array(machine, UINT32, 4 * 65536);
82	82
83	83	/* fill in the mask table */
84	84	destmask = mask_table;

src/mame/video/m72.c

r4679	r4680
115	115	state_save_register_global(machine, scrolly1);
116	116	state_save_register_global(machine, scrollx2);
117	117	state_save_register_global(machine, scrolly2);
118		state_save_register_global_pointer(machine, m72_spriteram, spriteram_size);
	118	state_save_register_global_pointer(machine, m72_spriteram, spriteram_size/2);
119	119	}
120	120
121	121
r4679	r4680
124	124	bg_tilemap = tilemap_create(machine, m72_get_bg_tile_info,tilemap_scan_rows,8,8,64,64);
125	125	fg_tilemap = tilemap_create(machine, m72_get_fg_tile_info,tilemap_scan_rows,8,8,64,64);
126	126
127		m72_spriteram = auto_malloc(spriteram_size);
	127	m72_spriteram = auto_alloc_array(machine, UINT16, spriteram_size/2);
128	128
129	129	tilemap_set_transmask(fg_tilemap,0,0xffff,0x0001);
130	130	tilemap_set_transmask(fg_tilemap,1,0x00ff,0xff01);
r4679	r4680
151	151	bg_tilemap = tilemap_create(machine, rtype2_get_bg_tile_info,tilemap_scan_rows,8,8,64,64);
152	152	fg_tilemap = tilemap_create(machine, rtype2_get_fg_tile_info,tilemap_scan_rows,8,8,64,64);
153	153
154		m72_spriteram = auto_malloc(spriteram_size);
	154	m72_spriteram = auto_alloc_array(machine, UINT16, spriteram_size/2);
155	155
156	156	tilemap_set_transmask(fg_tilemap,0,0xffff,0x0001);
157	157	tilemap_set_transmask(fg_tilemap,1,0x00ff,0xff01);
r4679	r4680
190	190	bg_tilemap = tilemap_create(machine, rtype2_get_bg_tile_info,majtitle_scan_rows,8,8,128,64);
191	191	fg_tilemap = tilemap_create(machine, rtype2_get_fg_tile_info,tilemap_scan_rows,8,8,64,64);
192	192
193		m72_spriteram = auto_malloc(spriteram_size);
	193	m72_spriteram = auto_alloc_array(machine, UINT16, spriteram_size/2);
194	194
195	195	tilemap_set_transmask(fg_tilemap,0,0xffff,0x0001);
196	196	tilemap_set_transmask(fg_tilemap,1,0x00ff,0xff01);
r4679	r4680
216	216	bg_tilemap = tilemap_create(machine, hharry_get_bg_tile_info,tilemap_scan_rows,8,8,64,64);
217	217	fg_tilemap = tilemap_create(machine, m72_get_fg_tile_info,   tilemap_scan_rows,8,8,64,64);
218	218
219		m72_spriteram = auto_malloc(spriteram_size);
	219	m72_spriteram = auto_alloc_array(machine, UINT16, spriteram_size/2);
220	220
221	221	tilemap_set_transmask(fg_tilemap,0,0xffff,0x0001);
222	222	tilemap_set_transmask(fg_tilemap,1,0x00ff,0xff01);

src/mame/video/madalien.c

r4679	r4680
164	164	tilemap_set_scrolldy(tilemap_edge2[i], 0, video_screen_get_height(machine->primary_screen) - 256);
165	165	}
166	166
167		headlight_bitmap = auto_bitmap_alloc(128, 128, BITMAP_FORMAT_INDEXED16);
	167	headlight_bitmap = auto_bitmap_alloc(machine, 128, 128, BITMAP_FORMAT_INDEXED16);
168	168
169	169	gfx_element_set_source(machine->gfx[0], madalien_charram);
170	170

src/mame/video/aeroboto.c

r4679	r4680
58	58
59	59	rom = memory_region(machine, "gfx2");
60	60	length = memory_region_length(machine, "gfx2");
61		temp = malloc_or_die(length);
	61	temp = alloc_array_or_die(UINT8, length);
62	62	memcpy(temp, rom, length);
63	63
64	64	for (i=0; i<length; i++) rom[(i&~0xff)+(i<<5&0xe0)+(i>>3&0x1f)] = temp[i];

src/mame/video/crgolf.c

r4679	r4680
104	104	static VIDEO_START( crgolf )
105	105	{
106	106	/* allocate memory for the two bitmaps */
107		crgolf_videoram_a = auto_malloc(VIDEORAM_SIZE);
108		crgolf_videoram_b = auto_malloc(VIDEORAM_SIZE);
	107	crgolf_videoram_a = auto_alloc_array(machine, UINT8, VIDEORAM_SIZE);
	108	crgolf_videoram_b = auto_alloc_array(machine, UINT8, VIDEORAM_SIZE);
109	109
110	110	/* register for save states */
111	111	state_save_register_global_pointer(machine, crgolf_videoram_a, VIDEORAM_SIZE);

src/mame/video/toobin.c

r4679	r4680
104	104	tilemap_set_transparent_pen(atarigen_alpha_tilemap, 0);
105	105
106	106	/* allocate a playfield bitmap for rendering */
107		pfbitmap = auto_bitmap_alloc(video_screen_get_width(machine->primary_screen), video_screen_get_height(machine->primary_screen), BITMAP_FORMAT_INDEXED16);
	107	pfbitmap = auto_bitmap_alloc(machine, video_screen_get_width(machine->primary_screen), video_screen_get_height(machine->primary_screen), BITMAP_FORMAT_INDEXED16);
108	108	}
109	109
110	110

src/mame/video/srumbler.c

r4679	r4680
170	170
171	171	VIDEO_EOF( srumbler )
172	172	{
173		const address_space *space = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM);
	173	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
174	174
175	175	buffer_spriteram_w(space,0,0);
176	176	}

src/mame/video/legionna.c

r4679	r4680
167	167	text_layer =       tilemap_create(machine, get_text_tile_info,tilemap_scan_rows,  8,8,64,32);
168	168	legionna_layer_disable = 0x0000;
169	169
170		legionna_scrollram16 = auto_malloc(0x60);
	170	legionna_scrollram16 = auto_alloc_array(machine, UINT16, 0x60/2);
171	171
172	172	tilemap_set_transparent_pen(background_layer,15);
173	173	tilemap_set_transparent_pen(midground_layer,15);
r4679	r4680
183	183	text_layer =       tilemap_create(machine, get_text_tile_info,tilemap_scan_rows,  8,8,64,32);
184	184	legionna_layer_disable = 0x0000;
185	185
186		legionna_scrollram16 = auto_malloc(0x60);
	186	legionna_scrollram16 = auto_alloc_array(machine, UINT16, 0x60/2);
187	187
188	188	tilemap_set_transparent_pen(background_layer,15);
189	189	tilemap_set_transparent_pen(midground_layer,15);
r4679	r4680
199	199	text_layer =       tilemap_create(machine, get_text_tile_info,tilemap_scan_rows,  8,8,64,32);
200	200	legionna_layer_disable = 0x0000;
201	201
202		legionna_scrollram16 = auto_malloc(0x60);
	202	legionna_scrollram16 = auto_alloc_array(machine, UINT16, 0x60/2);
203	203
204	204	tilemap_set_transparent_pen(background_layer,15);
205	205	tilemap_set_transparent_pen(midground_layer,15);

src/mame/video/mcr68.c

r4679	r4680
85	85	tilemap_set_transparent_pen(fg_tilemap, 0);
86	86
87	87	/* allocate memory for the assembled gfx data */
88		srcdata0 = auto_malloc(gfx0->total_elements * gfx0->width * gfx0->height);
89		srcdata2 = auto_malloc(gfx2->total_elements * gfx2->width * gfx2->height);
	88	srcdata0 = auto_alloc_array(machine, UINT8, gfx0->total_elements * gfx0->width * gfx0->height);
	89	srcdata2 = auto_alloc_array(machine, UINT8, gfx2->total_elements * gfx2->width * gfx2->height);
90	90
91	91	/* "colorize" each code */
92	92	dest0 = srcdata0;

src/mame/video/mario.c

r4679	r4680
79	79
80	80	WRITE8_HANDLER( mario_videoram_w )
81	81	{
82		mario_state   *state = space->machine->driver_data;
	82	mario_state   *state = (mario_state *)space->machine->driver_data;
83	83
84	84	state->videoram[offset] = data;
85	85	tilemap_mark_tile_dirty(state->bg_tilemap, offset);
r4679	r4680
87	87
88	88	WRITE8_HANDLER( mario_gfxbank_w )
89	89	{
90		mario_state   *state = space->machine->driver_data;
	90	mario_state   *state = (mario_state *)space->machine->driver_data;
91	91
92	92	if (state->gfx_bank != (data & 0x01))
93	93	{
r4679	r4680
98	98
99	99	WRITE8_HANDLER( mario_palettebank_w )
100	100	{
101		mario_state   *state = space->machine->driver_data;
	101	mario_state   *state = (mario_state *)space->machine->driver_data;
102	102
103	103	if (state->palette_bank != (data & 0x01))
104	104	{
r4679	r4680
109	109
110	110	WRITE8_HANDLER( mario_scroll_w )
111	111	{
112		mario_state   *state = space->machine->driver_data;
	112	mario_state   *state = (mario_state *)space->machine->driver_data;
113	113
114	114	state->gfx_scroll = data + 17;
115	115	}
116	116
117	117	WRITE8_HANDLER( mario_flip_w )
118	118	{
119		mario_state   *state = space->machine->driver_data;
	119	mario_state   *state = (mario_state *)space->machine->driver_data;
120	120
121	121	if (state->flip != (data & 0x01))
122	122	{
r4679	r4680
131	131
132	132	static TILE_GET_INFO( get_bg_tile_info )
133	133	{
134		mario_state   *state = machine->driver_data;
	134	mario_state   *state = (mario_state *)machine->driver_data;
135	135	int code = state->videoram[tile_index] + 256 * state->gfx_bank;
136	136	int color;
137	137
r4679	r4680
142	142
143	143	VIDEO_START( mario )
144	144	{
145		mario_state   *state = machine->driver_data;
	145	mario_state   *state = (mario_state *)machine->driver_data;
146	146
147	147	state->bg_tilemap = tilemap_create(machine, get_bg_tile_info, tilemap_scan_rows,
148	148	8, 8, 32, 32);
r4679	r4680
166	166	/* TODO: draw_sprites should adopt the scanline logic from dkong.c
167	167	* The schematics have the same logic for sprite buffering.
168	168	*/
169		mario_state   *state = machine->driver_data;
	169	mario_state   *state = (mario_state *)machine->driver_data;
170	170	int offs;
171	171
172	172	for (offs = 0;offs < state->spriteram_size;offs += 4)
r4679	r4680
212	212
213	213	VIDEO_UPDATE( mario )
214	214	{
215		mario_state   *state = screen->machine->driver_data;
	215	mario_state   *state = (mario_state *)screen->machine->driver_data;
216	216	int t;
217	217
218	218	t = input_port_read(screen->machine, "MONITOR");

src/mame/video/xmen.c

r4679	r4680
67	67	K053247_vh_start(machine,"gfx2",53,-2,NORMAL_PLANE_ORDER,xmen_sprite_callback);
68	68	K053247_export_config(&K053247_ram, NULL, NULL, NULL, NULL);
69	69
70		screen_left = auto_bitmap_alloc(64*8, 32*8, BITMAP_FORMAT_INDEXED16);
71		screen_right = auto_bitmap_alloc(64*8, 32*8, BITMAP_FORMAT_INDEXED16);
	70	screen_left = auto_bitmap_alloc(machine, 64*8, 32*8, BITMAP_FORMAT_INDEXED16);
	71	screen_right = auto_bitmap_alloc(machine, 64*8, 32*8, BITMAP_FORMAT_INDEXED16);
72	72	}
73	73
74	74
r4679	r4680
163	163	/* my lefts and rights are mixed up in several places.. */
164	164	VIDEO_EOF( xmen6p )
165	165	{
166		const address_space *space = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM);
	166	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
167	167	int layer[3];
168	168	bitmap_t * renderbitmap;
169	169	rectangle cliprect;
r4679	r4680
178	178	//  cliprect.max_y = visarea->max_y;
179	179
180	180	cliprect.min_x = 0;
181		cliprect.max_x = 64*8-1;
182		cliprect.min_y = 2*8;
183		cliprect.max_y = 30*8-1;
	181	cliprect.max_x = 64 * 8 - 1;
	182	cliprect.min_y = 2 * 8;
	183	cliprect.max_y = 30 * 8 - 1;
184	184
185	185
186
187
188	186	if (xmen_current_frame & 0x01)
189	187	{
190	188
191	189	/* copy the desired spritelist to the chip */
192		memcpy(K053247_ram,xmen6p_spriteramright,0x1000);
	190	memcpy(K053247_ram, xmen6p_spriteramright, 0x1000);
193	191	/* we write the entire content of the tileram to the chip to ensure
194	192	everything gets marked as dirty and the desired tilemap is rendered
195	193
196	194	this is not very efficient!
197	195	*/
198		for (offset=0;offset<(0xc000/2);offset++)
	196	for (offset = 0; offset < (0xc000 / 2); offset++)
199	197	{
200	198	//          K052109_lsb_w
201		K052109_w(space,offset,xmen6p_tilemapright[offset]&0x00ff);
	199	K052109_w(space, offset, xmen6p_tilemapright[offset] & 0x00ff);
202	200	}
203	201
204	202
r4679	r4680
207	205	else
208	206	{
209	207	/* copy the desired spritelist to the chip */
210		memcpy(K053247_ram,xmen6p_spriteramleft,0x1000);
	208	memcpy(K053247_ram, xmen6p_spriteramleft, 0x1000);
211	209
212	210	/* we write the entire content of the tileram to the chip to ensure
213	211	everything gets marked as dirty and the desired tilemap is rendered
214	212
215	213	this is not very efficient!
216	214	*/
217		for (offset=0;offset<(0xc000/2);offset++)
	215	for (offset = 0; offset < (0xc000 / 2); offset++)
218	216	{
219	217	//          K052109_lsb_w
220		K052109_w(space,offset,xmen6p_tilemapleft[offset]&0x00ff);
	218	K052109_w(space, offset, xmen6p_tilemapleft[offset] & 0x00ff);
221	219	}
222	220
223	221
224
225
226	222	renderbitmap = screen_left;
227	223	}
228	224
r4679	r4680
244	240
245	241	sortlayers(layer,layerpri);
246	242
247		bitmap_fill(priority_bitmap,&cliprect,0);
	243	bitmap_fill(priority_bitmap, &cliprect, 0);
248	244	/* note the '+1' in the background color!!! */
249		bitmap_fill(renderbitmap,&cliprect,16 * bg_colorbase+1);
250		tilemap_draw(renderbitmap,&cliprect,K052109_tilemap[layer[0]],0,1);
251		tilemap_draw(renderbitmap,&cliprect,K052109_tilemap[layer[1]],0,2);
252		tilemap_draw(renderbitmap,&cliprect,K052109_tilemap[layer[2]],0,4);
	245	bitmap_fill(renderbitmap, &cliprect, 16 * bg_colorbase + 1);
	246	tilemap_draw(renderbitmap, &cliprect, K052109_tilemap[layer[0]], 0, 1);
	247	tilemap_draw(renderbitmap, &cliprect, K052109_tilemap[layer[1]], 0, 2);
	248	tilemap_draw(renderbitmap, &cliprect, K052109_tilemap[layer[2]], 0, 4);
253	249
254	250	/* this isn't supported anymore and it is unsure if still needed; keeping here for reference
255	251	pdrawgfx_shadow_lowpri = 1; fix shadows of boulders in front of feet */
256		K053247_sprites_draw(machine, renderbitmap,&cliprect);
257
	252	K053247_sprites_draw(machine, renderbitmap, &cliprect);
258	253	}
259

src/mame/video/tecmo16.c

r4679	r4680
68	68	int height = video_screen_get_height(machine->primary_screen);
69	69
70	70	/* set up tile layers */
71		tile_bitmap_bg = auto_bitmap_alloc(width, height, BITMAP_FORMAT_INDEXED16);
72		tile_bitmap_fg = auto_bitmap_alloc(width, height, BITMAP_FORMAT_INDEXED16);
	71	tile_bitmap_bg = auto_bitmap_alloc(machine, width, height, BITMAP_FORMAT_INDEXED16);
	72	tile_bitmap_fg = auto_bitmap_alloc(machine, width, height, BITMAP_FORMAT_INDEXED16);
73	73
74	74	/* set up sprites */
75		sprite_bitmap = auto_bitmap_alloc(width, height, BITMAP_FORMAT_INDEXED16);
	75	sprite_bitmap = auto_bitmap_alloc(machine, width, height, BITMAP_FORMAT_INDEXED16);
76	76
77	77	fg_tilemap = tilemap_create(machine, fg_get_tile_info,tilemap_scan_rows,16,16,32,32);
78	78	bg_tilemap = tilemap_create(machine, bg_get_tile_info,tilemap_scan_rows,16,16,32,32);
r4679	r4680
93	93	int height = video_screen_get_height(machine->primary_screen);
94	94
95	95	/* set up tile layers */
96		tile_bitmap_bg = auto_bitmap_alloc(width, height, BITMAP_FORMAT_INDEXED16);
97		tile_bitmap_fg = auto_bitmap_alloc(width, height, BITMAP_FORMAT_INDEXED16);
	96	tile_bitmap_bg = auto_bitmap_alloc(machine, width, height, BITMAP_FORMAT_INDEXED16);
	97	tile_bitmap_fg = auto_bitmap_alloc(machine, width, height, BITMAP_FORMAT_INDEXED16);
98	98
99	99	/* set up sprites */
100		sprite_bitmap = auto_bitmap_alloc(width, height, BITMAP_FORMAT_INDEXED16);
	100	sprite_bitmap = auto_bitmap_alloc(machine, width, height, BITMAP_FORMAT_INDEXED16);
101	101
102	102	fg_tilemap = tilemap_create(machine, fg_get_tile_info,tilemap_scan_rows,16,16,64,32);
103	103	bg_tilemap = tilemap_create(machine, bg_get_tile_info,tilemap_scan_rows,16,16,64,32);
r4679	r4680
116	116	int height = video_screen_get_height(machine->primary_screen);
117	117
118	118	/* set up tile layers */
119		tile_bitmap_bg = auto_bitmap_alloc(width, height, BITMAP_FORMAT_INDEXED16);
120		tile_bitmap_fg = auto_bitmap_alloc(width, height, BITMAP_FORMAT_INDEXED16);
	119	tile_bitmap_bg = auto_bitmap_alloc(machine, width, height, BITMAP_FORMAT_INDEXED16);
	120	tile_bitmap_fg = auto_bitmap_alloc(machine, width, height, BITMAP_FORMAT_INDEXED16);
121	121
122	122	/* set up sprites */
123		sprite_bitmap = auto_bitmap_alloc(width, height, BITMAP_FORMAT_INDEXED16);
	123	sprite_bitmap = auto_bitmap_alloc(machine, width, height, BITMAP_FORMAT_INDEXED16);
124	124
125	125	fg_tilemap = tilemap_create(machine, fg_get_tile_info,tilemap_scan_rows,16,16,64,32);
126	126	bg_tilemap = tilemap_create(machine, bg_get_tile_info,tilemap_scan_rows,16,16,64,32);
r4679	r4680
251	251	const pen_t *paldata = machine->pens;
252	252	UINT32 *end;
253	253
254		UINT16 *sd1 = src1->base;                                    /* source data   */
255		UINT16 *sd2 = src2->base;
256		UINT16 *sd3 = src3->base;
	254	UINT16 *sd1 = (UINT16 *)src1->base;                                    /* source data   */
	255	UINT16 *sd2 = (UINT16 *)src2->base;
	256	UINT16 *sd3 = (UINT16 *)src3->base;
257	257
258	258	int sw = ex-sx+1;                                          /* source width  */
259	259	int sh = ey-sy+1;                                          /* source height */

src/mame/video/naughtyb.c

r4679	r4680
110	110	palreg = bankreg = 0;
111	111
112	112	/* Naughty Boy has a virtual screen twice as large as the visible screen */
113		tmpbitmap = auto_bitmap_alloc(68*8,28*8,video_screen_get_format(machine->primary_screen));
	113	tmpbitmap = auto_bitmap_alloc(machine,68*8,28*8,video_screen_get_format(machine->primary_screen));
114	114	}
115	115
116	116

src/mame/video/gunbustr.c

r4679	r4680
18	18
19	19	VIDEO_START( gunbustr )
20	20	{
21		spritelist = auto_malloc(0x4000 * sizeof(*spritelist));
	21	spritelist = auto_alloc_array(machine, struct tempsprite, 0x4000);
22	22
23	23	TC0480SCP_vh_start(machine,TC0480SCP_GFX_NUM,0,0x20,0x07,-1,-1,-1,0,0);
24	24	}

src/mame/video/phoenix.c

r4679	r4680
178	178
179	179	VIDEO_START( phoenix )
180	180	{
181		videoram_pg[0] = auto_malloc(0x1000);
182		videoram_pg[1] = auto_malloc(0x1000);
	181	videoram_pg[0] = auto_alloc_array(machine, UINT8, 0x1000);
	182	videoram_pg[1] = auto_alloc_array(machine, UINT8, 0x1000);
183	183
184	184	memory_configure_bank(machine, 1, 0, 1, videoram_pg[0], 0);
185	185	memory_configure_bank(machine, 1, 1, 1, videoram_pg[1], 0);

src/mame/video/superqix.c

r4679	r4680
66	66
67	67	VIDEO_START( superqix )
68	68	{
69		fg_bitmap[0] = auto_bitmap_alloc(256, 256, video_screen_get_format(machine->primary_screen));
70		fg_bitmap[1] = auto_bitmap_alloc(256, 256, video_screen_get_format(machine->primary_screen));
	69	fg_bitmap[0] = auto_bitmap_alloc(machine, 256, 256, video_screen_get_format(machine->primary_screen));
	70	fg_bitmap[1] = auto_bitmap_alloc(machine, 256, 256, video_screen_get_format(machine->primary_screen));
71	71	bg_tilemap = tilemap_create(machine, sqix_get_bg_tile_info, tilemap_scan_rows,  8, 8, 32, 32);
72	72
73	73	tilemap_set_transmask(bg_tilemap,0,0xffff,0x0000); /* split type 0 is totally transparent in front half */

src/mame/video/playch10.c

r4679	r4680
59	59
60	60	static void ppu_irq( const device_config *device, int *ppu_regs )
61	61	{
62		cpu_set_input_line(device->machine->cpu[1], INPUT_LINE_NMI, PULSE_LINE );
	62	cputag_set_input_line(device->machine, "cart", INPUT_LINE_NMI, PULSE_LINE );
63	63	pc10_int_detect = 1;
64	64	}
65	65

src/mame/video/lockon.c

r4679	r4680
115	115	static TIMER_CALLBACK( cursor_callback )
116	116	{
117	117	if (lockon_main_inten)
118		cpu_set_input_line_and_vector(machine->cpu[MAIN_CPU], 0, HOLD_LINE, 0xff);
	118	cputag_set_input_line_and_vector(machine, "maincpu", 0, HOLD_LINE, 0xff);
119	119
120	120	timer_adjust_oneshot(cursor_timer, video_screen_get_time_until_pos(machine->primary_screen, CURSOR_YPOS, CURSOR_XPOS), 0);
121	121	}
r4679	r4680
329	329
330	330	static TIMER_CALLBACK( bufend_callback )
331	331	{
332		cpu_set_input_line_and_vector(machine->cpu[GROUND_CPU], 0, HOLD_LINE, 0xff);
333		cpu_set_input_line(machine->cpu[OBJECT_CPU], NEC_INPUT_LINE_POLL, ASSERT_LINE);
	332	cputag_set_input_line_and_vector(machine, "ground", 0, HOLD_LINE, 0xff);
	333	cputag_set_input_line(machine, "object", NEC_INPUT_LINE_POLL, ASSERT_LINE);
334	334	}
335	335
336	336	/* Get data for a each 8x8x3 ground tile */
r4679	r4680
658	658
659	659	READ16_HANDLER( lockon_obj_4000_r )
660	660	{
661		cpu_set_input_line(space->machine->cpu[OBJECT_CPU], NEC_INPUT_LINE_POLL, CLEAR_LINE);
	661	cputag_set_input_line(space->machine, "object", NEC_INPUT_LINE_POLL, CLEAR_LINE);
662	662	return 0xffff;
663	663	}
664	664
r4679	r4680
938	938	tilemap_set_transparent_pen(lockon_tilemap, 0);
939	939
940	940	/* Allocate the two frame buffers for rotation */
941		back_buffer = auto_bitmap_alloc(512, 512, BITMAP_FORMAT_INDEXED16);
942		front_buffer = auto_bitmap_alloc(512, 512, BITMAP_FORMAT_INDEXED16);
	941	back_buffer = auto_bitmap_alloc(machine, 512, 512, BITMAP_FORMAT_INDEXED16);
	942	front_buffer = auto_bitmap_alloc(machine, 512, 512, BITMAP_FORMAT_INDEXED16);
943	943
944	944	/* 2kB of object ASIC palette RAM */
945		obj_pal_ram = auto_malloc(2048);
	945	obj_pal_ram = auto_alloc_array(machine, UINT8, 2048);
946	946
947	947	/* Timer for ground display list callback */
948	948	bufend_timer = timer_alloc(machine, bufend_callback, NULL);

src/mame/video/tigeroad.c

r4679	r4680
166	166
167	167	VIDEO_EOF( tigeroad )
168	168	{
169		const address_space *space = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM);
	169	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
170	170
171		buffer_spriteram16_w(space,0,0,0xffff);
	171	buffer_spriteram16_w(space, 0, 0, 0xffff);
172	172	}

src/mame/video/atari.c

r4679	r4680
713	713	LOG(("atari antic_vh_start\n"));
714	714	memset(&antic, 0, sizeof(antic));
715	715
716		antic.cclk_expand = auto_malloc(21 * 256 * sizeof(UINT32));
	716	antic.cclk_expand = auto_alloc_array(machine, UINT32, 21 * 256);
717	717
718	718	antic.pf_21      = &antic.cclk_expand[ 0 * 256];
719	719	antic.pf_x10b     = &antic.cclk_expand[ 1 * 256];
r4679	r4680
725	725	antic.pf_gtia2     = &antic.cclk_expand[19 * 256];
726	726	antic.pf_gtia3     = &antic.cclk_expand[20 * 256];
727	727
728		antic.used_colors = auto_malloc(21 * 256 * sizeof(UINT8));
	728	antic.used_colors = auto_alloc_array(machine, UINT8, 21 * 256);
729	729
730	730	memset(antic.used_colors, 0, 21 * 256 * sizeof(UINT8));
731	731
r4679	r4680
748	748
749	749	for( i = 0; i < 64; i++ )
750	750	{
751		antic.prio_table[i] = auto_malloc(8*256);
	751	antic.prio_table[i] = auto_alloc_array(machine, UINT8, 8*256);
752	752	}
753	753
754	754	LOG(("atari prio_init\n"));
r4679	r4680
756	756
757	757	for( i = 0; i < video_screen_get_height(machine->primary_screen); i++ )
758	758	{
759		antic.video[i] = auto_malloc(sizeof(VIDEO));
760		memset(antic.video[i], 0, sizeof(VIDEO));
	759	antic.video[i] = auto_alloc_clear(machine, VIDEO);
761	760	}
762	761
763	762	VIDEO_START_CALL(generic_bitmapped);
r4679	r4680
1067	1066	{
1068	1067	LOG(("           @cycle #%3d issue DLI\n", cycle(machine)));
1069	1068	antic.r.nmist |= DLI_NMI;
1070		cpu_set_input_line(machine->cpu[0], INPUT_LINE_NMI, PULSE_LINE);
	1069	cputag_set_input_line(machine, "maincpu", INPUT_LINE_NMI, PULSE_LINE);
1071	1070	}
1072	1071	else
1073	1072	{
r4679	r4680
1162	1161	LOG(("           @cycle #%3d steal %d cycles\n", cycle(machine), antic.steal_cycles));
1163	1162	after(machine, antic.steal_cycles, antic_line_done, "antic_line_done");
1164	1163	antic.steal_cycles = 0;
1165		cpu_spinuntil_trigger( machine->cpu[0], TRIGGER_STEAL );
	1164	cpu_spinuntil_trigger( cputag_get_cpu(machine, "maincpu"), TRIGGER_STEAL );
1166	1165	}
1167	1166
1168	1167
r4679	r4680
1176	1175	*****************************************************************************/
1177	1176	static TIMER_CALLBACK( antic_scanline_render )
1178	1177	{
1179		const address_space *space = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM);
	1178	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
1180	1179
1181	1180	VIDEO *video = antic.video[antic.scanline];
1182	1181	LOG(("           @cycle #%3d render mode $%X lines to go #%d\n", cycle(machine), (antic.cmd & 0x0f), antic.modelines));
r4679	r4680
1246	1245	**************************************************************/
1247	1246	if( new_cmd & ANTIC_LMS )
1248	1247	{
1249		const address_space *space = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM);
	1248	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
1250	1249	int addr = RDANTIC(space);
1251	1250	antic.doffs = ++antic.doffs & DOFFS;
1252	1251	addr += 256 * RDANTIC(space);
r4679	r4680
1271	1270	*****************************************************************************/
1272	1271	static void antic_scanline_dma(running_machine *machine, int param)
1273	1272	{
1274		const address_space *space = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM);
	1273	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
1275	1274	LOG(("           @cycle #%3d DMA fetch\n", cycle(machine)));
1276	1275	if (antic.scanline == VBL_END)
1277	1276	antic.r.nmist &= ~VBL_NMI;
r4679	r4680
1529	1528	LOG(("           cause VBL NMI\n"));
1530	1529	/* set the VBL NMI status bit */
1531	1530	antic.r.nmist |= VBL_NMI;
1532		cpu_set_input_line(machine->cpu[0], INPUT_LINE_NMI, PULSE_LINE);
	1531	cputag_set_input_line(machine, "maincpu", INPUT_LINE_NMI, PULSE_LINE);
1533	1532	}
1534	1533	}
1535	1534

src/mame/video/segas32.c

r4679	r4680
290	290	is_multi32 = multi32;
291	291
292	292	/* allocate a copy of spriteram in 32-bit format */
293		spriteram_32bit = auto_malloc(0x20000);
	293	spriteram_32bit = auto_alloc_array(machine, UINT32, 0x20000/4);
294	294
295	295	/* allocate the tilemap cache */
296	296	cache_head = NULL;
297	297	for (tmap = 0; tmap < TILEMAP_CACHE_SIZE; tmap++)
298	298	{
299		struct cache_entry *entry = auto_malloc(sizeof(struct cache_entry));
	299	struct cache_entry *entry = auto_alloc(machine, struct cache_entry);
300	300
301	301	entry->tmap = tilemap_create(machine, get_tile_info, tilemap_scan_rows,  16,16, 32,16);
302	302	entry->page = 0xff;
r4679	r4680
310	310	/* allocate the bitmaps (a few extra for multi32) */
311	311	for (tmap = 0; tmap < 9 + 2 * multi32; tmap++)
312	312	{
313		layer_data[tmap].bitmap = auto_bitmap_alloc(416, 224, BITMAP_FORMAT_INDEXED16);
314		layer_data[tmap].transparent = auto_malloc(sizeof(layer_data[tmap].transparent[0]) * 256);
315		memset(layer_data[tmap].transparent, 0, sizeof(layer_data[tmap].transparent[0]) * 256);
	313	layer_data[tmap].bitmap = auto_bitmap_alloc(machine, 416, 224, BITMAP_FORMAT_INDEXED16);
	314	layer_data[tmap].transparent = auto_alloc_array_clear(machine, UINT8, 256);
316	315	}
317	316
318	317	/* allocate pre-rendered solid lines of 0's and ffff's */
319		solid_0000 = auto_malloc(sizeof(solid_0000[0]) * 512);
	318	solid_0000 = auto_alloc_array(machine, UINT16, 512);
320	319	memset(solid_0000, 0x00, sizeof(solid_0000[0]) * 512);
321		solid_ffff = auto_malloc(sizeof(solid_ffff[0]) * 512);
	320	solid_ffff = auto_alloc_array(machine, UINT16, 512);
322	321	memset(solid_ffff, 0xff, sizeof(solid_ffff[0]) * 512);
323	322
324	323	/* initialize videoram */
r4679	r4680
584	583	/*  D1 : Seems to be '1' only during an erase in progress, this
585	584	occurs very briefly though.
586	585	D0 : Selected frame buffer (0= A, 1= B) */
587		return 0xfffc | (layer_data[MIXER_LAYER_SPRITES].bitmap < layer_data[MIXER_LAYER_SPRITES_2].bitmap);
	586	return 0xfffc | (int)(layer_data[MIXER_LAYER_SPRITES].bitmap < layer_data[MIXER_LAYER_SPRITES_2].bitmap);
588	587
589	588	case 1:
590	589	/*  D1 : ?
r4679	r4680
793	792
794	793	static TILE_GET_INFO( get_tile_info )
795	794	{
796		struct cache_entry *entry = param;
	795	struct cache_entry *entry = (struct cache_entry *)param;
797	796	UINT16 data = system32_videoram[(entry->page & 0x7f) * 0x200 + tile_index];
798	797	SET_TILE_INFO(0, (entry->bank << 13) + (data & 0x1fff), (data >> 4) & 0x1ff, (data >> 14) & 3);
799	798	}

src/mame/video/psikyosh.c

r4679	r4680
1081	1081	{
1082	1082	int width = video_screen_get_width(machine->primary_screen);
1083	1083	int height = video_screen_get_height(machine->primary_screen);
1084		z_bitmap = auto_bitmap_alloc(width, height, BITMAP_FORMAT_INDEXED16);
	1084	z_bitmap = auto_bitmap_alloc(machine, width, height, BITMAP_FORMAT_INDEXED16);
1085	1085
1086	1086	/* Need 16-bit z-buffer */
1087		zoom_bitmap = auto_bitmap_alloc(16*16, 16*16, BITMAP_FORMAT_INDEXED8);
	1087	zoom_bitmap = auto_bitmap_alloc(machine, 16*16, 16*16, BITMAP_FORMAT_INDEXED8);
1088	1088
1089	1089	machine->gfx[1]->color_granularity=16; /* 256 colour sprites with palette selectable on 16 colour boundaries */
1090	1090
r4679	r4680
1170	1170
1171	1171	VIDEO_EOF( psikyosh )
1172	1172	{
1173		const address_space *space = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM);
	1173	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
1174	1174
1175	1175	buffer_spriteram32_w(space,0,0,0xffffffff);
1176	1176	}

src/mame/video/quizdna.c

r4679	r4680
61	61	quizdna_bg_xscroll[0] = 0;
62	62	quizdna_bg_xscroll[1] = 0;
63	63
64		quizdna_bg_ram = auto_malloc(0x2000);
65		quizdna_fg_ram = auto_malloc(0x1000);
	64	quizdna_bg_ram = auto_alloc_array(machine, UINT8, 0x2000);
	65	quizdna_fg_ram = auto_alloc_array(machine, UINT8, 0x1000);
66	66
67	67	quizdna_bg_tilemap = tilemap_create( machine, get_bg_tile_info,tilemap_scan_rows,8,8,64,32 );
68	68	quizdna_fg_tilemap = tilemap_create( machine, get_fg_tile_info,tilemap_scan_rows,16,8,32,32 );

src/mame/video/kan_pand.c

r4679	r4680
166	166	pandora_region = region;
167	167	pandora_xoffset = x;
168	168	pandora_yoffset = y;
169		pandora_spriteram = auto_malloc(0x1000);
	169	pandora_spriteram = auto_alloc_array(machine, UINT8, 0x1000);
170	170	memset(pandora_spriteram,0x00, 0x1000);
171	171
172	172	pandora_sprites_bitmap = video_screen_auto_bitmap_alloc(machine->primary_screen);

src/mame/video/equites.c

r4679	r4680
121	121
122	122	VIDEO_START( equites )
123	123	{
124		equites_fg_videoram = (UINT8 *)auto_malloc(0x800);
	124	equites_fg_videoram = auto_alloc_array(machine, UINT8, 0x800);
125	125
126	126	fg_tilemap = tilemap_create(machine, equites_fg_info, tilemap_scan_cols,  8, 8, 32, 32);
127	127	tilemap_set_transparent_pen(fg_tilemap, 0);
r4679	r4680
135	135	{
136	136	assert(video_screen_get_format(machine->primary_screen) == BITMAP_FORMAT_INDEXED16);
137	137
138		equites_fg_videoram = (UINT8 *)auto_malloc(0x800);
	138	equites_fg_videoram = auto_alloc_array(machine, UINT8, 0x800);
139	139
140	140	fg_tilemap = tilemap_create(machine, splndrbt_fg_info, tilemap_scan_cols,  8, 8, 32, 32);
141	141	tilemap_set_transparent_pen(fg_tilemap, 0);

src/mame/video/gradius3.c

r4679	r4680
113	113
114	114	VIDEO_UPDATE( gradius3 )
115	115	{
116		const address_space *space = cpu_get_address_space(screen->machine->cpu[0], ADDRESS_SPACE_PROGRAM);
	116	const address_space *space = cputag_get_address_space(screen->machine, "maincpu", ADDRESS_SPACE_PROGRAM);
117	117
118	118	/* TODO: this kludge enforces the char banks. For some reason, they don't work otherwise. */
119	119	K052109_w(space,0x1d80,0x10);

src/mame/video/decocass.c

r4679	r4680
529	529	rectangle clip;
530	530
531	531	if (0xc0 != (input_port_read(screen->machine, "IN2") & 0xc0))  /* coin slots assert an NMI */
532		cpu_set_input_line(screen->machine->cpu[0], INPUT_LINE_NMI, ASSERT_LINE);
	532	cputag_set_input_line(screen->machine, "maincpu", INPUT_LINE_NMI, ASSERT_LINE);
533	533
534	534	if (0 == (watchdog_flip & 0x04))
535	535	watchdog_reset(screen->machine);

src/mame/video/bfm_dm01.c

r4679	r4680
204	204
205	205	static WRITE8_HANDLER( unknown_w )
206	206	{
207		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_NMI, CLEAR_LINE ); //?
	207	cputag_set_input_line(space->machine, "matrix", INPUT_LINE_NMI, CLEAR_LINE ); //?
208	208	}
209	209
210	210	///////////////////////////////////////////////////////////////////////////
r4679	r4680
226	226	data_avail = 1;
227	227
228	228	//pulse IRQ line
229		cpu_set_input_line(machine->cpu[1], M6809_IRQ_LINE, HOLD_LINE ); // trigger IRQ
	229	cputag_set_input_line(machine, "matrix", M6809_IRQ_LINE, HOLD_LINE ); // trigger IRQ
230	230	}
231	231
232	232	///////////////////////////////////////////////////////////////////////////
r4679	r4680
240	240
241	241	VIDEO_START( bfm_dm01 )
242	242	{
243		dm_bitmap = auto_bitmap_alloc(DM_BYTESPERROW*8, DM_MAXLINES,video_screen_get_format(machine->primary_screen));
	243	dm_bitmap = auto_bitmap_alloc(machine, DM_BYTESPERROW*8, DM_MAXLINES,video_screen_get_format(machine->primary_screen));
244	244	}
245	245
246	246	///////////////////////////////////////////////////////////////////////////

src/mame/video/mystwarr.c

r4679	r4680
30	30	break;
31	31	assert(gfxnum != ARRAY_LENGTH(machine->gfx));
32	32
33		decoded = auto_malloc(len);
	33	decoded = auto_alloc_array(machine, UINT8, len);
34	34	d = decoded;
35	35
36	36	// now convert the data into a drawable format so we can decode it

src/mame/video/fromance.c

r4679	r4680
78	78	flipscreen_old = -1;
79	79
80	80	/* allocate local videoram */
81		local_videoram[0] = auto_malloc(0x1000 * 3);
82		local_videoram[1] = auto_malloc(0x1000 * 3);
	81	local_videoram[0] = auto_alloc_array(machine, UINT8, 0x1000 * 3);
	82	local_videoram[1] = auto_alloc_array(machine, UINT8, 0x1000 * 3);
83	83
84	84	/* allocate local palette RAM */
85		local_paletteram = auto_malloc(0x800 * 2);
	85	local_paletteram = auto_alloc_array(machine, UINT8, 0x800 * 2);
86	86
87	87	/* configure tilemaps */
88	88	tilemap_set_transparent_pen(fg_tilemap,15);
r4679	r4680
269	269
270	270	static TIMER_CALLBACK( crtc_interrupt_gen )
271	271	{
272		cpu_set_input_line(machine->cpu[1], 0, HOLD_LINE);
	272	cputag_set_input_line(machine, "sub", 0, HOLD_LINE);
273	273	if (param != 0)
274	274	timer_adjust_periodic(crtc_timer, attotime_div(video_screen_get_frame_period(machine->primary_screen), param), 0, attotime_div(video_screen_get_frame_period(machine->primary_screen), param));
275	275	}

src/mame/video/irobot.c

r4679	r4680
100	100	{
101	101	/* Setup 2 bitmaps for the polygon generator */
102	102	int height = video_screen_get_height(machine->primary_screen);
103		polybitmap1 = auto_malloc(BITMAP_WIDTH * height);
104		polybitmap2 = auto_malloc(BITMAP_WIDTH * height);
	103	polybitmap1 = auto_alloc_array(machine, UINT8, BITMAP_WIDTH * height);
	104	polybitmap2 = auto_alloc_array(machine, UINT8, BITMAP_WIDTH * height);
105	105
106	106	/* clear the bitmaps so we start with valid palette look-up values for drawing */
107	107	_irobot_poly_clear(machine, polybitmap1);

src/mame/video/neogeo.c

r4679	r4680
708	708	sprite_gfx_address_mask >>= 1;
709	709	}
710	710
711		sprite_gfx = auto_malloc(sprite_gfx_address_mask + 1);
712		memset(sprite_gfx, 0, sprite_gfx_address_mask + 1);
	711	sprite_gfx = auto_alloc_array_clear(machine, UINT8, sprite_gfx_address_mask + 1);
713	712
714	713	src = memory_region(machine, "sprites");
715	714	dest = sprite_gfx;
r4679	r4680
858	857	VIDEO_START( neogeo )
859	858	{
860	859	/* allocate memory not directly mapped */
861		palettes[0] = auto_malloc(NUM_PENS * sizeof(UINT16));
862		palettes[1] = auto_malloc(NUM_PENS * sizeof(UINT16));
863		pens = auto_malloc(NUM_PENS * sizeof(pen_t));
864		neogeo_videoram = auto_malloc(0x20000);
	860	palettes[0] = auto_alloc_array(machine, UINT16, NUM_PENS);
	861	palettes[1] = auto_alloc_array(machine, UINT16, NUM_PENS);
	862	pens = auto_alloc_array(machine, pen_t, NUM_PENS);
	863	neogeo_videoram = auto_alloc_array(machine, UINT16, 0x20000/2);
865	864
866	865	/* clear allocated memory */
867	866	memset(palettes[0],0x00, NUM_PENS * sizeof(UINT16));

src/mame/video/combatsc.c

r4679	r4680
264	264	bg_tilemap[1] = tilemap_create(machine, get_tile_info1,tilemap_scan_rows,8,8,32,32);
265	265	textlayer =  tilemap_create(machine, get_text_info, tilemap_scan_rows,     8,8,32,32);
266	266
267		private_spriteram[0] = auto_malloc(0x800);
268		private_spriteram[1] = auto_malloc(0x800);
269		memset(private_spriteram[0],0,0x800);
270		memset(private_spriteram[1],0,0x800);
	267	private_spriteram[0] = auto_alloc_array_clear(machine, UINT8, 0x800);
	268	private_spriteram[1] = auto_alloc_array_clear(machine, UINT8, 0x800);
271	269
272	270	tilemap_set_transparent_pen(bg_tilemap[0],0);
273	271	tilemap_set_transparent_pen(bg_tilemap[1],0);
r4679	r4680
284	282	bg_tilemap[1] = tilemap_create(machine, get_tile_info1_bootleg,tilemap_scan_rows,8,8,32,32);
285	283	textlayer =  tilemap_create(machine, get_text_info_bootleg, tilemap_scan_rows,8,8,32,32);
286	284
287		private_spriteram[0] = auto_malloc(0x800);
288		private_spriteram[1] = auto_malloc(0x800);
289		memset(private_spriteram[0],0,0x800);
290		memset(private_spriteram[1],0,0x800);
	285	private_spriteram[0] = auto_alloc_array_clear(machine, UINT8, 0x800);
	286	private_spriteram[1] = auto_alloc_array_clear(machine, UINT8, 0x800);
291	287
292	288	tilemap_set_transparent_pen(bg_tilemap[0],0);
293	289	tilemap_set_transparent_pen(bg_tilemap[1],0);
r4679	r4680
340	336
341	337	static WRITE8_HANDLER( combascb_sh_irqtrigger_w )
342	338	{
343		soundlatch_w(space,offset,data);
344		cpu_set_input_line_and_vector(space->machine->cpu[1],0,HOLD_LINE,0xff);
	339	soundlatch_w(space, offset, data);
	340	cputag_set_input_line_and_vector(space->machine, "audiocpu", 0, HOLD_LINE, 0xff);
345	341	}
346	342
347	343	static READ8_HANDLER( combascb_io_r )
r4679	r4680
423	419	}
424	420	else
425	421	{
426		memory_install_readwrite8_handler(space, 0x4000, 0x7fff, 0, 0, SMH_BANK1, SMH_UNMAP);   /* banked ROM */
	422	memory_install_readwrite8_handler(space, 0x4000, 0x7fff, 0, 0, (read8_space_func)SMH_BANK(1), (write8_space_func)SMH_UNMAP);   /* banked ROM */
427	423	}
428	424	}
429	425	}
r4679	r4680
431	427	MACHINE_RESET( combasc )
432	428	{
433	429	UINT8 *MEM = memory_region(machine, "maincpu") + 0x38000;
434		const address_space *space = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM);
	430	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
435	431
436	432	combasc_io_ram  = MEM + 0x0000;
437	433	combasc_page[0] = MEM + 0x4000;
r4679	r4680
600	596
601	597	static void bootleg_draw_sprites(running_machine *machine, bitmap_t *bitmap, const rectangle *cliprect, const UINT8 *source, int circuit )
602	598	{
603		const address_space *space = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM);
	599	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
604	600	const gfx_element *gfx = machine->gfx[circuit+2];
605	601
606	602	int limit = ( circuit) ? (memory_read_byte(space, 0xc2)*256 + memory_read_byte(space, 0xc3)) : (memory_read_byte(space, 0xc0)*256 + memory_read_byte(space, 0xc1));

src/mame/video/ppu2c0x.c

r4679	r4680
315	315	chip->scan_scale = 1;
316	316
317	317	/* allocate a screen bitmap, videomem and spriteram, a dirtychar array and the monochromatic colortable */
318		chip->bitmap = auto_bitmap_alloc( VISIBLE_SCREEN_WIDTH, VISIBLE_SCREEN_HEIGHT, video_screen_get_format(device->machine->primary_screen));
319		chip->videomem = auto_malloc( VIDEOMEM_SIZE );
320		chip->videoram = auto_malloc( VIDEOMEM_SIZE );
321		chip->spriteram = auto_malloc( SPRITERAM_SIZE );
322		chip->colortable = auto_malloc( sizeof( default_colortable ) );
323		chip->colortable_mono = auto_malloc( sizeof( default_colortable_mono ) );
	318	chip->bitmap = auto_bitmap_alloc(device->machine, VISIBLE_SCREEN_WIDTH, VISIBLE_SCREEN_HEIGHT, video_screen_get_format(device->machine->primary_screen));
	319	chip->videomem = auto_alloc_array_clear(device->machine, UINT8, VIDEOMEM_SIZE );
	320	chip->videoram = auto_alloc_array_clear(device->machine, UINT8, VIDEOMEM_SIZE );
	321	chip->spriteram = auto_alloc_array_clear(device->machine, UINT8, SPRITERAM_SIZE );
	322	chip->colortable = auto_alloc_array(device->machine, pen_t, ARRAY_LENGTH( default_colortable ) );
	323	chip->colortable_mono = auto_alloc_array(device->machine, pen_t, ARRAY_LENGTH( default_colortable_mono ) );
324	324
325		/* clear videomem & spriteram */
326		memset( chip->videomem, 0, VIDEOMEM_SIZE );
327		memset( chip->videoram, 0, VIDEOMEM_SIZE );
328		memset( chip->spriteram, 0, SPRITERAM_SIZE );
329	325	memset( chip->videoram_banks_indices, 0xff, sizeof(chip->videoram_banks_indices) );
330	326
331	327	if ( intf->vram_enabled )
r4679	r4680
376	372
377	373	static TIMER_CALLBACK( hblank_callback )
378	374	{
379		const device_config *device = ptr;
	375	const device_config *device = (const device_config *)ptr;
380	376	ppu2c0x_chip *this_ppu = get_token(device);
381	377	int *ppu_regs = &this_ppu->regs[0];
382	378
r4679	r4680
393	389
394	390	static TIMER_CALLBACK( nmi_callback )
395	391	{
396		const device_config *device = ptr;
	392	const device_config *device = (const device_config *)ptr;
397	393	ppu2c0x_chip *this_ppu = get_token(device);
398	394	const ppu2c0x_interface *intf = get_interface(device);
399	395	int *ppu_regs = &this_ppu->regs[0];
r4679	r4680
865	861
866	862	static TIMER_CALLBACK( scanline_callback )
867	863	{
868		const device_config *device = ptr;
	864	const device_config *device = (const device_config *)ptr;
869	865	ppu2c0x_chip *this_ppu = get_token(device);
870	866	int *ppu_regs = &this_ppu->regs[0];
871	867	int blanked = ( ppu_regs[PPU_CONTROL1] & ( PPU_CONTROL1_BACKGROUND | PPU_CONTROL1_SPRITES ) ) == 0;
r4679	r4680
1535	1531	case PPU2C0XINFO_INT_SCANLINES_PER_FRAME:      info->i = PPU_NTSC_SCANLINES_PER_FRAME;      break;
1536	1532
1537	1533	/* --- the following bits of info are returned as pointers to data or functions --- */
1538		case DEVINFO_FCT_SET_INFO:                  /* Nothing */                        break;
1539	1534	case DEVINFO_FCT_START:                     info->start = DEVICE_START_NAME(ppu2c0x);   break;
1540	1535	case DEVINFO_FCT_STOP:                     /* Nothing */                        break;
1541	1536	case DEVINFO_FCT_RESET:                     info->reset = DEVICE_RESET_NAME(ppu2c0x);   break;

src/mame/video/starshp1.c

r4679	r4680
94	94
95	95	tilemap_set_scrollx(bg_tilemap, 0, -8);
96	96
97		LSFR = auto_malloc(0x20000);
	97	LSFR = auto_alloc_array(machine, UINT16, 0x10000);
98	98
99	99	for (i = 0; i < 0x10000; i++)
100	100	{
r4679	r4680
266	266
267	267	static int get_radius(void)
268	268	{
269		return 6 * sqrt(starshp1_circle_size);  /* size calibrated by hand */
	269	return 6 * sqrt((double)starshp1_circle_size);  /* size calibrated by hand */
270	270	}
271	271	static int get_circle_hpos(void)
272	272	{

src/mame/video/n64.c

r4679	r4680
262	262	if (LOG_RDP_EXECUTION)
263	263	rdp_exec = fopen("rdp_execute.txt", "wt");
264	264
265		texture_cache = auto_malloc(0x100000);
	265	texture_cache = auto_alloc_array(machine, UINT8, 0x100000);
266	266
267	267	combiner_rgbsub_a_r[0] = combiner_rgbsub_a_r[1] = &one_color.r;
268	268	combiner_rgbsub_a_g[0] = combiner_rgbsub_a_g[1] = &one_color.g;

src/mame/video/taito_f2.c

r4679	r4680
89	89	f2_hide_pixels = hide;
90	90	f2_flip_hide_pixels = flip_hide;
91	91
92		spriteram_delayed = auto_malloc(spriteram_size);
93		spriteram_buffered = auto_malloc(spriteram_size);
94		spritelist = auto_malloc(0x400 * sizeof(*spritelist));
	92	spriteram_delayed = auto_alloc_array(machine, UINT16, spriteram_size/2);
	93	spriteram_buffered = auto_alloc_array(machine, UINT16, spriteram_size/2);
	94	spritelist = auto_alloc_array(machine, struct tempsprite, 0x400);
95	95
96	96	chips = TC0100SCN_count(machine);
97	97

src/mame/video/gottlieb.c

r4679	r4680
143	143	SET_TILE_INFO(gottlieb_gfxcharhi, code, 0, 0);
144	144	}
145	145
	146	static TILE_GET_INFO( get_screwloo_bg_tile_info )
	147	{
	148	int code = videoram[tile_index];
	149	if ((code & 0xc0) == 0)
	150	SET_TILE_INFO(gottlieb_gfxcharlo, code, 0, 0);
	151	else
	152	SET_TILE_INFO(gottlieb_gfxcharhi, code, 0, 0);
	153	}
146	154
	155
147	156	VIDEO_START( gottlieb )
148	157	{
149	158	static const int resistances[4] = { 2000, 1000, 470, 240 };
r4679	r4680
170	179	state_save_register_global(machine, transparent0);
171	180	}
172	181
	182	VIDEO_START( screwloo )
	183	{
	184	static const int resistances[4] = { 2000, 1000, 470, 240 };
173	185
	186	/* compute palette information */
	187	/* note that there really are pullup/pulldown resistors, but this situation is complicated */
	188	/* by the use of transistors, so we ignore that and just use the realtive resistor weights */
	189	compute_resistor_weights(0,   255, -1.0,
	190	4, resistances, weights, 180, 0,
	191	4, resistances, weights, 180, 0,
	192	4, resistances, weights, 180, 0);
	193	transparent0 = FALSE;
174	194
	195	/* configure the background tilemap */
	196	bg_tilemap = tilemap_create(machine, get_screwloo_bg_tile_info, tilemap_scan_rows, 8, 8, 32, 32);
	197	tilemap_set_transparent_pen(bg_tilemap, 0);
	198	tilemap_set_scrolldx(bg_tilemap, 0, 318 - 256);
	199
	200	gfx_element_set_source(machine->gfx[0], gottlieb_charram);
	201
	202	/* save some state */
	203	state_save_register_global(machine, background_priority);
	204	state_save_register_global(machine, spritebank);
	205	state_save_register_global(machine, transparent0);
	206	}
	207
	208
	209
175	210	/*************************************
176	211	*
177	212	*  Sprite rendering

src/mame/video/tubep.c

r4679	r4680
367	367
368	368	VIDEO_START( tubep )
369	369	{
370		spritemap = auto_malloc(256*256*2);
	370	spritemap = auto_alloc_array(machine, UINT8, 256*256*2);
371	371
372	372	/* Set up save state */
373	373	state_save_register_global(machine, romD_addr);
r4679	r4680
442	442
443	443	WRITE8_HANDLER( tubep_background_a000_w )
444	444	{
445		ls175_b7 = ((data&0x0f)^0x0f) | 0xf0;
	445	ls175_b7 = ((data & 0x0f) ^ 0x0f) | 0xf0;
446	446	}
447	447
448	448
449	449	WRITE8_HANDLER( tubep_background_c000_w )
450	450	{
451		ls175_e8 = ((data&0x0f)^0x0f);
	451	ls175_e8 = ((data & 0x0f) ^ 0x0f);
452	452	}
453	453
454	454
455	455	static TIMER_CALLBACK( sprite_timer_callback )
456	456	{
457		cpu_set_input_line(machine->cpu[3],0,ASSERT_LINE);
	457	cputag_set_input_line(machine, "nsc", 0, ASSERT_LINE);
458	458	}
459	459
460	460
r4679	r4680
583	583	/SINT line will be reasserted in XSize * YSize cycles (RH0 signal cycles)
584	584	*/
585	585	/* 1.clear the /SINT interrupt line */
586		cpu_set_input_line(space->machine->cpu[3],0,CLEAR_LINE);
	586	cputag_set_input_line(space->machine, "nsc", 0, CLEAR_LINE);
587	587
588	588	/* 2.assert /SINT again after this time */
589	589	timer_set( space->machine, attotime_mul(ATTOTIME_IN_HZ(19968000/8), (XSize+1)*(YSize+1)), NULL, 0, sprite_timer_callback);
r4679	r4680
875	875
876	876	return 0;
877	877	}
878

src/mame/video/homedata.c

r4679	r4680
132	132	} /* for(;;) */
133	133
134	134	finish:
135		cpu_set_input_line(space->machine->cpu[0],M6809_FIRQ_LINE,HOLD_LINE);
	135	cputag_set_input_line(space->machine, "maincpu", M6809_FIRQ_LINE, HOLD_LINE);
136	136	}
137	137
138	138	static void reikaids_handleblit( const address_space *space, int rom_base )
r4679	r4680
232	232	}
233	233
234	234	finish:
235		cpu_set_input_line(space->machine->cpu[0],M6809_FIRQ_LINE,HOLD_LINE);
	235	cputag_set_input_line(space->machine, "maincpu", M6809_FIRQ_LINE, HOLD_LINE);
236	236	}
237	237
238	238	static void pteacher_handleblit( const address_space *space, int rom_base )
r4679	r4680
320	320	} /* for(;;) */
321	321
322	322	finish:
323		cpu_set_input_line(space->machine->cpu[0],M6809_FIRQ_LINE,HOLD_LINE);
	323	cputag_set_input_line(space->machine, "maincpu", M6809_FIRQ_LINE, HOLD_LINE);
324	324	}
325	325
326	326

src/mame/video/exidy.c

r4679	r4680
57	57	bitmap_format format = video_screen_get_format(machine->primary_screen);
58	58
59	59	background_bitmap = video_screen_auto_bitmap_alloc(machine->primary_screen);
60		motion_object_1_vid = auto_bitmap_alloc(16, 16, format);
61		motion_object_2_vid = auto_bitmap_alloc(16, 16, format);
62		motion_object_2_clip = auto_bitmap_alloc(16, 16, format);
	60	motion_object_1_vid = auto_bitmap_alloc(machine, 16, 16, format);
	61	motion_object_2_vid = auto_bitmap_alloc(machine, 16, 16, format);
	62	motion_object_2_clip = auto_bitmap_alloc(machine, 16, 16, format);
63	63
64	64	state_save_register_global(machine, collision_mask);
65	65	state_save_register_global(machine, collision_invert);
r4679	r4680
111	111	READ8_HANDLER( exidy_interrupt_r )
112	112	{
113	113	/* clear any interrupts */
114		cpu_set_input_line(space->machine->cpu[0], 0, CLEAR_LINE);
	114	cputag_set_input_line(space->machine, "maincpu", 0, CLEAR_LINE);
115	115
116	116	/* return the latched condition */
117	117	return int_condition;
r4679	r4680
295	295	latch_condition(machine, param);
296	296
297	297	/* set the IRQ line */
298		cpu_set_input_line(machine->cpu[0], 0, ASSERT_LINE);
	298	cputag_set_input_line(machine, "maincpu", 0, ASSERT_LINE);
299	299	}
300	300
301	301

src/mame/video/hng64.c

r4679	r4680
103	103	int xpos, ypos, tileno,chainx,chainy,xflip;
104	104	int xdrw,ydrw,pal,xinc,yinc,yflip;
105	105	UINT32 zoomx,zoomy;
106		float foomX, foomY;
	106	//float foomX, foomY;
107	107	source-=8;
108	108
109	109	ypos = (source[0]&0xffff0000)>>16;
r4679	r4680
129	129
130	130	/* Calculate the zoom */
131	131	/* First, prevent any possible divide by zero errors */
	132
	133	#if 0
132	134	if(!zoomx) zoomx=0x1000;
133	135	if(!zoomy) zoomy=0x1000;
134	136
r4679	r4680
140	142
141	143	zoomx += (int)((foomX - floor(foomX)) * (float)0x10000) ;
142	144	zoomy += (int)((foomY - floor(foomY)) * (float)0x10000) ;
	145	#endif
143	146
	147	zoomx = 0x10000;
	148	zoomy = 0x10000;
144	149
145	150	if (source[3]&0x00800000) // maybe ..
146	151	{
r4679	r4680
160	165	// Accomodate for chaining and flipping
161	166	if(xflip)
162	167	{
163		xinc=-(int)(16.0f*foomX);
	168	//xinc=-(int)(16.0f*foomX);
	169
	170	xinc=-16;
164	171	xpos-=xinc*chainx;
165	172	}
166	173	else
167	174	{
168		xinc=(int)(16.0f*foomX);
	175	//xinc=(int)(16.0f*foomX);
	176	xinc = 16;
169	177	}
170	178
171	179	if(yflip)
172	180	{
173		yinc=-(int)(16.0f*foomY);
	181	//yinc=-(int)(16.0f*foomY);
	182	yinc = -16;
174	183	ypos-=yinc*chainy;
175	184	}
176	185	else
177	186	{
178		yinc=(int)(16.0f*foomY);
	187	yinc = 16;
	188	//yinc=(int)(16.0f*foomY);
179	189	}
180	190
181	191
r4679	r4680
518	528	// GEOMETRY
519	529	;
520	530
521		threeDRoms = memory_region(machine, "gfx4") ;
	531	threeDRoms = memory_region(machine, "verts") ;
522	532
523	533	/////////////////////////
524	534	// GET THE HEADER INFO //
r4679	r4680
937	947	}
938	948
939	949
940		/* 8x8 tiles, 4bpp layer */
	950	/* 8x8x4bpp layer */
941	951	static TILE_GET_INFO( get_hng64_tile0_info )
942	952	{
943		int tileno,pal;
944		tileno = hng64_videoram[tile_index];
945		pal = hng64_videoram[tile_index]>>24;
946		SET_TILE_INFO((tileno&1)?0:1,(tileno&0x3fffff)>>1,pal,TILE_FLIPYX((tileno&0xc00000)>>22));
947		}
	953	UINT16 tilemapinfo = (hng64_videoregs[0x02]&0xffff0000)>>16;
	954	int tileno,pal, flip;
948	955
949		/* 16x16 tiles, 8bpp layer */
950		static TILE_GET_INFO( get_hng64_tile1_info )
951		{
952		int tileno,pal;
953		tileno = hng64_videoram[tile_index+(0x10000/4)];
954		pal = hng64_videoram[tile_index+(0x10000/4)]>>24;
	956	tileno = hng64_videoram[tile_index+(0x00000/4)];
	957	// pppppppp ff--atttt tttttttt tttttttt
955	958
956		SET_TILE_INFO(3,(tileno&0x3fffff)>>3,pal>>4,  TILE_FLIPYX((tileno&0xc00000)>>22) );
957		}
	959	pal = (tileno&0xff000000)>>24;
	960	flip =(tileno&0x00c00000)>>22;
958	961
959		/* 16x16 tiles, 8bpp layer */
960		static TILE_GET_INFO( get_hng64_tile2_info )
961		{
962		int tileno,pal;
963		tileno = hng64_videoram[tile_index+(0x20000/4)];
964		pal = hng64_videoram[tile_index+(0x20000/4)]>>24;
965		SET_TILE_INFO(3,(tileno&0x3fffff)>>3,pal>>4,TILE_FLIPYX((tileno&0xc00000)>>22));
	962	if (tileno&0x200000)
	963	{
	964	tileno = (tileno & hng64_videoregs[0x0b]) | hng64_videoregs[0x0c];
	965	}
	966
	967	tileno &= 0x1fffff;
	968
	969	if (tilemapinfo&0x400)
	970	{
	971	SET_TILE_INFO(1,tileno>>1,pal>>4,TILE_FLIPYX(flip));
	972	}
	973	else
	974	{
	975	SET_TILE_INFO(0,tileno, pal,TILE_FLIPYX(flip));
	976	}
966	977	}
967	978
968	979	/* 16x16 tiles, 8bpp layer */
969		static TILE_GET_INFO( get_hng64_tile3_info )
	980	static TILE_GET_INFO( get_hng64_tile1_info )
970	981	{
971		int tileno,pal;
972		tileno = hng64_videoram[tile_index+(0x30000/4)];
973		pal = hng64_videoram[tile_index+(0x30000/4)]>>24;
974		SET_TILE_INFO(3,(tileno&0x3fffff)>>3,pal>>4,TILE_FLIPYX((tileno&0xc00000)>>22));
975		}
	982	UINT16 tilemapinfo = (hng64_videoregs[0x02]&0x0000ffff)>>0;
	983	int tileno,pal, flip;
976	984
	985	tileno = hng64_videoram[tile_index+(0x10000/4)];
	986	// pppppppp ff--atttt tttttttt tttttttt
977	987
	988	pal = (tileno&0xff000000)>>24;
	989	flip =(tileno&0x00c00000)>>22;
978	990
979		/* Tilemaps zoom, and probably rotate.. they can have linescroll/lineselect,
980		looks like the zoom center can move too..
981		not sure how these features are enabled up yet */
982
983		static int gatherPixelsForLine(bitmap_t *tilemapBitmap,
984		INT32 startX, INT32 startY, INT32 endX, INT32 endY,
985		UINT16 *penList)
986		{
987		int retVal = 0 ;
988
989		// !! BRESENHAM'S AGAIN - I REALLY SHOULD GENERALIZE THIS !!
990
991		#define SWAP(a,b) tmpswap = a; a = b; b = tmpswap;
992
993		INT32 i;
994		INT32 steep = 1;
995		INT32 sx, sy;  /* step positive or negative (1 or -1) */
996		INT32 dx, dy;  /* delta (difference in X and Y between points) */
997		INT32 e;
998
999		/*
1000		* inline swap. On some architectures, the XOR trick may be faster
1001		*/
1002		INT32 tmpswap;
1003
1004		/*
1005		* optimize for vertical and horizontal lines here
1006		*/
1007
1008		dx = abs(endX - startX);
1009		sx = ((endX - startX) > 0) ? 1 : -1;
1010		dy = abs(endY - startY);
1011		sy = ((endY - startY) > 0) ? 1 : -1;
1012
1013		if (dy > dx)
	991	if (tileno&0x200000)
1014	992	{
1015		steep = 0;
1016		SWAP(startX, startY);
1017		SWAP(dx, dy);
1018		SWAP(sx, sy);
	993	tileno = (tileno & hng64_videoregs[0x0b]) | hng64_videoregs[0x0c];
1019	994	}
1020	995
1021		e = (dy << 1) - dx;
	996	tileno &= 0x1fffff;
1022	997
1023		for (i = 0; i < dx; i++)
	998	if (tilemapinfo&0x400)
1024	999	{
1025		if (steep)
1026		{
1027		penList[retVal] = *BITMAP_ADDR16(tilemapBitmap, startY, startX);
1028		retVal++ ;
1029		}
1030		else
1031		{
1032		penList[retVal] = *BITMAP_ADDR16(tilemapBitmap, startX, startY) ;
1033		retVal++ ;
1034		}
1035		while (e >= 0)
1036		{
1037		startY += sy;
1038		e -= (dx << 1);
1039		}
1040
1041		startX += sx;
1042		e += (dy << 1);
	1000	SET_TILE_INFO(3,tileno>>3,pal>>4,TILE_FLIPYX(flip));
1043	1001	}
1044		#undef SWAP
1045
1046
1047		return retVal ;
	1002	else
	1003	{
	1004	SET_TILE_INFO(2,tileno>>2, pal,TILE_FLIPYX(flip));
	1005	}
1048	1006	}
1049	1007
1050		static void plotTilemap3Line(running_machine *machine,
1051		bitmap_t *tilemapBitmap,
1052		INT32 startX, INT32 startY, INT32 endX, INT32 endY,
1053		INT32 screenY, bitmap_t *bitmap)
	1008	/* 16x16 tiles, 8bpp layer */
	1009	static TILE_GET_INFO( get_hng64_tile2_info )
1054	1010	{
1055		int i ;
	1011	UINT16 tilemapinfo = (hng64_videoregs[0x03]&0xffff0000)>>16;
	1012	int tileno,pal, flip;
1056	1013
1057		int numPix ;
1058		UINT16 penList[0x1000] ;         // 4k of pixels to be safe
	1014	tileno = hng64_videoram[tile_index+(0x20000/4)];
	1015	// pppppppp ff--atttt tttttttt tttttttt
1059	1016
1060		float pixStride, pixOffset ;
	1017	pal = (tileno&0xff000000)>>24;
	1018	flip =(tileno&0x00c00000)>>22;
1061	1019
1062		const rectangle *visarea = video_screen_get_visible_area(machine->primary_screen);
1063
1064		//  mame_printf_debug("(%d,%d) (%d,%d)\n", startX, startY, endX, endY) ;
1065
1066		// CLAMP - BUT I'M PRETTY SURE THIS ISN'T QUITE RIGHT !!! ???
1067		startX += 1024 ; if (startX < 0) startX = 0 ; else if (startX >= 2048) startX = 2048-1 ;
1068		startY += 1024 ; if (startY < 0) startY = 0 ; else if (startY >= 2048) startY = 2048-1 ;
1069		endX += 1024 ; if (endX < 0) endX = 0 ; else if (endX >= 2048) endX = 2048-1 ;
1070		endY += 1024 ; if (endY < 0) endY = 0 ; else if (endY >= 2048) endY = 2048-1 ;
1071
1072		numPix = gatherPixelsForLine(tilemapBitmap, startX, startY, endX, endY, penList) ;
1073
1074		pixStride = (float)numPix / (float)(visarea->max_x-1) ;
1075		pixOffset = 0 ;
1076
1077		if (numPix == 0)
1078		penList[0] = *BITMAP_ADDR16(tilemapBitmap, 1024, 1024);
1079
1080		//  mame_printf_debug("numpix %d ps %f po %f s(%d,%d) e(%d,%d)\n", numPix, pixStride, pixOffset, startX, startY, endX, endY) ;
1081
1082		// Draw out the screen's line...
1083		for (i = visarea->min_x; i < visarea->max_x; i++)
	1020	if (tileno&0x200000)
1084	1021	{
1085		// Nearest-neighbor interpolation for now (but i doubt it does linear)
1086		UINT16 tmPen = penList[(int)pixOffset] ;
	1022	tileno = (tileno & hng64_videoregs[0x0b]) | hng64_videoregs[0x0c];
	1023	}
1087	1024
1088		*BITMAP_ADDR32(bitmap, screenY, i) = palette_get_color(machine, tmPen) | 0xff000000;
	1025	tileno &= 0x1fffff;
1089	1026
1090		pixOffset += pixStride ;
	1027	if (tilemapinfo&0x400)
	1028	{
	1029	SET_TILE_INFO(3,tileno>>3,pal>>4,TILE_FLIPYX(flip));
1091	1030	}
	1031	else
	1032	{
	1033	SET_TILE_INFO(2,tileno>>2, pal,TILE_FLIPYX(flip));
	1034	}
1092	1035	}
1093	1036
1094		static void hng64_drawtilemap3(running_machine *machine, bitmap_t *bitmap, const rectangle *cliprect )
	1037	/* 16x16 tiles, 8bpp layer */
	1038	static TILE_GET_INFO( get_hng64_tile3_info )
1095	1039	{
1096		int i ;
	1040	UINT16 tilemapinfo = (hng64_videoregs[0x03]&0x0000ffff)>>0;
	1041	int tileno,pal, flip;
1097	1042
1098		bitmap_t *srcbitmap = tilemap_get_pixmap( hng64_tilemap3 );
1099		const rectangle *visarea = video_screen_get_visible_area(machine->primary_screen);
	1043	tileno = hng64_videoram[tile_index+(0x30000/4)];
	1044	// pppppppp ff--atttt tttttttt tttttttt
1100	1045
1101		//  usrintf_showmessage("%d", hng64_hackTm3Count) ;
	1046	pal = (tileno&0xff000000)>>24;
	1047	flip =(tileno&0x00c00000)>>22;
1102	1048
1103		if (hng64_hackTm3Count/4 < visarea->max_y)
	1049	if (tileno&0x200000)
1104	1050	{
1105		for (i = 0; i < hng64_hackTm3Count/4; i++)
1106		{
1107		UINT32 address = hng64_rowScrollOffset + 0xbf0 ;
1108		address -= (i * 0x10) ;
1109		address /= 4 ;
1110		//mame_printf_debug("nums : %.4x %.4x %.4x %.4x\n", (INT16)((hng64_videoram[address+0x0]&0xffff0000) >> 16),
1111		//                                     (INT16)((hng64_videoram[address+0x1]&0xffff0000) >> 16),
1112		//                                     (INT16)((hng64_videoram[address+0x2]&0xffff0000) >> 16),
1113		//                                     (INT16)((hng64_videoram[address+0x3]&0xffff0000) >> 16)) ;
1114
1115		plotTilemap3Line(machine, srcbitmap,
1116		(INT16)((hng64_videoram[address+0x0]&0xffff0000) >> 16),
1117		(INT16)((hng64_videoram[address+0x2]&0xffff0000) >> 16),
1118		(INT16)((hng64_videoram[address+0x1]&0xffff0000) >> 16),
1119		(INT16)((hng64_videoram[address+0x3]&0xffff0000) >> 16),
1120		(visarea->max_y-1)-i,
1121		bitmap) ;
1122		}
	1051	tileno = (tileno & hng64_videoregs[0x0b]) | hng64_videoregs[0x0c];
1123	1052	}
1124	1053
1125		// Maybe the scrollbase should be used instead of my hacky hng64_rowScrollOffset :)?
1126		//  scrollbase = (hng64_videoregs[0x05]&0x00003fff)>>0;
	1054	tileno &= 0x1fffff;
1127	1055
1128		//  xscroll = hng64_videoram[(0x40000+(scrollbase<<4))/4]>>16;
1129		//  yscroll = hng64_videoram[(0x40008+(scrollbase<<4))/4]>>16;
1130		//  xzoom   = hng64_videoram[(0x40010+(scrollbase<<4))/4]>>16;
1131		//  yzoom   = hng64_videoram[(0x4000c+(scrollbase<<4))/4]>>16;
1132		//  xzoom   = xzoom-xscroll;
1133		//  yzoom   = yzoom-yscroll;
1134		//  xzoom &=0xffff;
1135		//  yzoom &=0xffff;
	1056	if (tilemapinfo&0x400)
	1057	{
	1058	SET_TILE_INFO(3,tileno>>3,pal>>4,TILE_FLIPYX(flip));
	1059	}
	1060	else
	1061	{
	1062	SET_TILE_INFO(2,tileno>>2, pal,TILE_FLIPYX(flip));
	1063	}
	1064	}
1136	1065
1137		//  xscroll <<=16;
1138		//  yscroll <<=16;
1139		//  xzoom <<=8;
1140		//  yzoom <<=8;
1141	1066
1142		//  tilemap_set_scrollx(hng64_tilemap3,0, xscroll);
1143		//  tilemap_set_scrolly(hng64_tilemap3,0, yscroll);
1144	1067
1145		//  tilemap_draw(bitmap,cliprect,hng64_tilemap3,0,0);
1146
1147		//  tilemap_draw_roz(bitmap,cliprect,hng64_tilemap3,xscroll,yscroll,
1148		//          xzoom,0,0,yzoom,
1149		//          1,
1150		//          0,0);
1151		}
1152
1153		static void hng64_drawtilemap2( bitmap_t *bitmap, const rectangle *cliprect )
	1068	static void hng64_drawtilemap( bitmap_t *bitmap, const rectangle *cliprect, int scrollbase, tilemap* tilemap )
1154	1069	{
1155		int scrollbase,xscroll,yscroll,xzoom,yzoom;
	1070	int xscroll,yscroll,xzoom,yzoom;
1156	1071
1157		scrollbase = (hng64_videoregs[0x05]&0x3fff0000)>>16;
1158	1072	xscroll = (INT16)(hng64_videoram[(0x40000+(scrollbase<<4))/4]>>16);
1159	1073	// ???  = (INT16)(hng64_videoram[(0x40004+(scrollbase<<4))/4]>>16);
1160	1074	yscroll = (INT16)(hng64_videoram[(0x40008+(scrollbase<<4))/4]>>16);
1161		yzoom   = (INT16)(hng64_videoram[(0x4000c+(scrollbase<<4))/4]>>16);
1162		xzoom   = (INT16)(hng64_videoram[(0x40010+(scrollbase<<4))/4]>>16);
	1075	//  xzoom   = (INT16)(hng64_videoram[(0x40010+(scrollbase<<4))/4]>>16);
	1076	//  yzoom   = (INT16)(hng64_videoram[(0x4000c+(scrollbase<<4))/4]>>16);
1163	1077	// ???  = (INT16)(hng64_videoram[(0x40014+(scrollbase<<4))/4]>>16);
1164	1078	// ???  = (INT16)(hng64_videoram[(0x40018+(scrollbase<<4))/4]>>16);
1165	1079	// ???  = (INT16)(hng64_videoram[(0x4001c+(scrollbase<<4))/4]>>16);
1166		xzoom   = xzoom-xscroll;
1167		yzoom   = yzoom-yscroll;
1168		xzoom &=0xffff;
1169		yzoom &=0xffff;
1170	1080
1171	1081	xscroll <<=16;
1172	1082	yscroll <<=16;
1173		xzoom <<=8;
1174		yzoom <<=8;
1175	1083
1176		tilemap_draw_roz(bitmap,cliprect,hng64_tilemap2,xscroll,yscroll,
1177		xzoom,0,0,yzoom,
1178		1,
1179		0,0);
1180		}
	1084	xzoom = 0x10000;
	1085	yzoom = 0x10000;
1181	1086
1182		static void hng64_drawtilemap1( bitmap_t *bitmap, const rectangle *cliprect )
1183		{
1184		int scrollbase,xscroll,yscroll,xzoom,yzoom;
1185	1087
1186		scrollbase = (hng64_videoregs[0x04]&0x00003fff)>>0;
1187		xscroll = (INT16)(hng64_videoram[(0x40000+(scrollbase<<4))/4]>>16);
1188		// ???  = (INT16)(hng64_videoram[(0x40004+(scrollbase<<4))/4]>>16);
1189		yscroll = (INT16)(hng64_videoram[(0x40008+(scrollbase<<4))/4]>>16);
1190		xzoom   = (INT16)(hng64_videoram[(0x40010+(scrollbase<<4))/4]>>16);
1191		yzoom   = (INT16)(hng64_videoram[(0x4000c+(scrollbase<<4))/4]>>16);
1192		// ???  = (INT16)(hng64_videoram[(0x40014+(scrollbase<<4))/4]>>16);
1193		// ???  = (INT16)(hng64_videoram[(0x40018+(scrollbase<<4))/4]>>16);
1194		// ???  = (INT16)(hng64_videoram[(0x4001c+(scrollbase<<4))/4]>>16);
1195		xzoom   = xzoom-xscroll;
1196		yzoom   = yzoom-yscroll;
1197		xzoom &=0xffff;
1198		yzoom &=0xffff;
1199
1200		xscroll <<=16;
1201		yscroll <<=16;
1202		xzoom <<=8;
1203		yzoom <<=8;
1204
1205		tilemap_draw_roz(bitmap,cliprect,hng64_tilemap1,xscroll,yscroll,
	1088	tilemap_draw_roz(bitmap,cliprect,tilemap,xscroll,yscroll,
1206	1089	xzoom,0,0,yzoom,
1207	1090	1,
1208	1091	0,0);
r4679	r4680
1219	1102	*   0    | oooooooo | unknown - always seems to be 04060000 (fatfurwa) and 00060000 (buriki)
1220	1103	*   1    | xxxx---- | looks like it's 0001 most (all) of the time - turns off in buriki intro
1221	1104	*   1    | ----oooo | unknown - always seems to be 0000 (fatfurwa)
1222		*   2    | oooooooo | unknown - likes to change sometimes though... (looks like bit-flags)
1223		*   3    | oooooooo | unknown - change a lot - maybe mixer flags?
	1105	*   2    | xxxx---- | tilemap0 per layer flags
	1106	*   2    | ----xxxx | tilemap1 per layer flags
	1107	*   3    | xxxx---- | tilemap2 per layer flags
	1108	*   3    | ----xxxx | tilemap3 per layer flags
1224	1109	*   4    | xxxx---- | tilemap0 offset into tilemap RAM?
1225	1110	*   4    | ----xxxx | tilemap1 offset into tilemap RAM
1226	1111	*   5    | xxxx---- | tilemap3 offset into tilemap RAM
r4679	r4680
1230	1115	*   8    | oooooooo | unknown - always seems to be 80008000 (fatfurwa)
1231	1116	*   9    | oooooooo | unknown - always seems to be 00000000 (fatfurwa)
1232	1117	*   a    | oooooooo | unknown - always seems to be 00000000 (fatfurwa)
1233		*   b    | oooooooo | unknown - 00000000 in intro - 00007ff8 when fight is going on (looks like &'ing it with 0x3fff is a good thing to do - tilemap stuff?)
1234		*   c    | xxxxxxxx | I'm almost positive this is some form of offset to produce animations in Tilemap1 - or maybe all tilemaps?
1235		*                     - 00xxx000 are used in fatfurwa during fights
1236		*                     - 00000?xx are used in buriki during the intro
	1118	*   b    | mmmmmmmm | auto animation mask for tilemaps, - use these bits from the original tile number
	1119	*   c    | xxxxxxxx | auto animation bits for tilemaps, - merge in these bits to auto animate the tilemap
1237	1120	*   d    | oooooooo | not used ??
1238	1121	*   e    | oooooooo | not used ??
1239	1122	*/
r4679	r4680
1243	1126	{
1244	1127	bitmap_fill(bitmap, 0, get_black_pen(screen->machine));
1245	1128
1246		// Debug
1247		//  for (int iii = 0; iii < 0x0f; iii++)
1248		//      mame_printf_debug("%.8x ", hng64_videoregs[iii]) ;
1249		//  mame_printf_debug("\n") ;
1250		//  usrintf_showmessage("%.8x %.8x %.8x %.8x", hng64_videoregs[0x1], hng64_videoregs[0x3], hng64_videoregs[0xb], hng64_videoregs[0xc]) ;
	1129	// the tilemap auto animation and moveable tilebases means that they end up
	1130	// dirty most frames anyway, even with manual tracking
	1131	tilemap_mark_all_tiles_dirty (hng64_tilemap3);
	1132	tilemap_mark_all_tiles_dirty (hng64_tilemap2);
	1133	tilemap_mark_all_tiles_dirty (hng64_tilemap1);
	1134	tilemap_mark_all_tiles_dirty (hng64_tilemap0);
1251	1135
1252		// I think there's something to this, but I'm not doing it right...
1253		// Interestingly enough, this turns the bootup screen blue :)
1254		/*
1255		if (hng64_videoregs[0xc] != tilemap2Offset)
1256		{
1257		tilemap2Offset = hng64_videoregs[0xc] ;
1258	1136
1259		tilemap_dispose(hng64_tilemap1) ;
1260		hng64_tilemap1 = tilemap_create(machine, get_hng64_tile2_info,tilemap_scan_rows, 16, 16, 128,128); // 128x128x4 = 0x10000
1261		}
	1137	hng64_drawtilemap(bitmap,cliprect, (hng64_videoregs[0x05]&0x00003fff)>>0,  hng64_tilemap3);
	1138	hng64_drawtilemap(bitmap,cliprect, (hng64_videoregs[0x05]&0x3fff0000)>>16, hng64_tilemap2);
	1139	hng64_drawtilemap(bitmap,cliprect, (hng64_videoregs[0x04]&0x00003fff)>>0,  hng64_tilemap1);
	1140	hng64_drawtilemap(bitmap,cliprect, (hng64_videoregs[0x04]&0x3fff0000)>>16, hng64_tilemap0);
	1141
	1142	draw_sprites(screen->machine, bitmap,cliprect);
	1143
	1144	// 3d really shouldn't be last, but you don't see some cool stuff right now if it's put before sprites :)...
	1145	draw3d(screen->machine, bitmap, cliprect);
	1146
	1147	transition_control(bitmap, cliprect) ;
	1148
	1149	/*
	1150	popmessage("%08x %08x %08x %08x %08x %08x %08x %08x %08x %08x %08x %08x %08x %08x %08x",
	1151	hng64_videoregs[0x00],
	1152	hng64_videoregs[0x01],
	1153	hng64_videoregs[0x02],
	1154	hng64_videoregs[0x03],
	1155	hng64_videoregs[0x04],
	1156	hng64_videoregs[0x05],
	1157	hng64_videoregs[0x06],
	1158	hng64_videoregs[0x07],
	1159	hng64_videoregs[0x08],
	1160	hng64_videoregs[0x09],
	1161	hng64_videoregs[0x0a],
	1162	hng64_videoregs[0x0b],
	1163	hng64_videoregs[0x0c],
	1164	hng64_videoregs[0x0d],
	1165	hng64_videoregs[0x0e]);
1262	1166	*/
1263	1167
1264		// Rowscroll variables...
1265		// usrintf_showmessage("%.8x %.8x x %.8x %.8x", hng64_videoram[0x00057bf0/4], hng64_videoram[0x00057bf4/4], hng64_videoram[0x00057bf8/4], hng64_videoram[0x00057bfc/4]) ;
	1168	// tilemap0 per layer flags
	1169	// 0840 - startup tests, 8x8x4 layer
	1170	// 0cc0 - beast busters 2, 8x8x8 layer
	1171	// 0860 - fatal fury wa
	1172	// 08e0 - fatal fury wa during transitions
	1173	// 0940 - samurai shodown 64
	1174	// 0880 - buriki
1266	1175
1267		// All of this priority stuff is probably done with some funky layer mixing chip -
1268		//   (there are neato alpha effects on a real board, etc)
1269		hng64_drawtilemap2(bitmap,cliprect);
1270		hng64_drawtilemap1(bitmap,cliprect);
1271		hng64_drawtilemap3(screen->machine, bitmap,cliprect);                  // Draw the ground last...
	1176	// ---l rb?? ???? ????
	1177	// l = floor effects / linescroll enable  (buriki on tilemap1, fatal fury on tilemap3)
	1178	// r = tile size?
	1179	// b = 4bpp/8bpp ?  (beast busters, samsh64, sasm64 2 switch it for some screens)
1272	1180
1273		// !!! This tilemap has the same flags as the 'previous' three, but they're not used in fatfurwa !!!
1274		//     (in other words, we should make a similar hng64_drawtilemap0() function for this tilemap)
1275		tilemap_draw(bitmap,cliprect,hng64_tilemap0,0,0);
1276	1181
1277		draw_sprites(screen->machine, bitmap,cliprect);
1278	1182
1279		// 3d really shouldn't be last, but you don't see some cool stuff right now if it's put before sprites :)...
1280		draw3d(screen->machine, bitmap, cliprect);
1281	1183
1282		/* hack to enable 2nd cpu when key is pressed */
1283		//  if ( input_code_pressed_once(KEYCODE_L) )
1284		//  {
1285		//      cpu_set_input_line(machine->cpu[1], INPUT_LINE_HALT, CLEAR_LINE);
1286		//      cpu_set_input_line(machine->cpu[1], INPUT_LINE_RESET, CLEAR_LINE);
1287		//  }
	1184	popmessage("0: %04x  1: %04x   2: %04x  3: %04x\n", (hng64_videoregs[0x02]&0xffff0000)>>16, (hng64_videoregs[0x02]&0x0000ffff)>>0, (hng64_videoregs[0x03]&0xffff0000)>>16, (hng64_videoregs[0x03]&0x0000ffff)>>0);
1288	1185
1289		/* AJG */
1290		// if(input_code_pressed(KEYCODE_D))
1291	1186
1292		transition_control(bitmap, cliprect) ;
1293	1187
1294	1188	//  mame_printf_debug("FRAME DONE %d\n", frameCount) ;
1295	1189	frameCount++ ;
1296	1190
1297		hng64_hackTilemap3 = hng64_rowScrollOffset = hng64_hackTm3Count = 0 ;
1298	1191	return 0;
1299	1192	}
1300	1193
r4679	r4680
1312	1205	tilemap_set_transparent_pen(hng64_tilemap3,0);
1313	1206
1314	1207	// 3d Buffer Allocation
1315		depthBuffer = (float*)auto_malloc((visarea->max_x)*(visarea->max_y)*sizeof(float)) ;
	1208	depthBuffer = auto_alloc_array(machine, float, (visarea->max_x)*(visarea->max_y)) ;
1316	1209
1317	1210	// The general display list of polygons in the scene...
1318	1211	// !! This really should be a dynamic array !!
1319		polys = auto_malloc(MAX_ONSCREEN_POLYS * sizeof(struct polygon))  ;
	1212	polys = auto_alloc_array(machine, struct polygon, MAX_ONSCREEN_POLYS)  ;
1320	1213	}
1321	1214
1322	1215	///////////////
r4679	r4680
1716	1609	{
1717	1610	float *dp = &(depthBuffer[y*video_screen_get_visible_area(machine->primary_screen)->max_x+x_start]);
1718	1611
1719		const UINT8 *gfx = memory_region(machine, "gfx3");
	1612	const UINT8 *gfx = memory_region(machine, "textures");
1720	1613	const UINT8 *textureOffset ;
1721	1614	UINT8 paletteEntry ;
1722	1615	float t_coord, s_coord ;

src/mame/video/macrossp.c

r4679	r4680
146	146
147	147	VIDEO_START(macrossp)
148	148	{
149		spriteram_old = auto_malloc(spriteram_size);
150		spriteram_old2 = auto_malloc(spriteram_size);
	149	spriteram_old = auto_alloc_array_clear(machine, UINT32, spriteram_size/4);
	150	spriteram_old2 = auto_alloc_array_clear(machine, UINT32, spriteram_size/4);
151	151
152		memset(spriteram_old,0,spriteram_size);
153		memset(spriteram_old2,0,spriteram_size);
154
155	152	macrossp_text_tilemap = tilemap_create(machine, get_macrossp_text_tile_info,tilemap_scan_rows,16,16,64,64);
156	153	macrossp_scra_tilemap = tilemap_create(machine, get_macrossp_scra_tile_info,tilemap_scan_rows,16,16,64,64);
157	154	macrossp_scrb_tilemap = tilemap_create(machine, get_macrossp_scrb_tile_info,tilemap_scan_rows,16,16,64,64);

src/mame/video/groundfx.c

r4679	r4680
22	22
23	23	VIDEO_START( groundfx )
24	24	{
25		spritelist = auto_malloc(0x4000 * sizeof(*spritelist));
	25	spritelist = auto_alloc_array(machine, struct tempsprite, 0x4000);
26	26
27	27	TC0100SCN_vh_start(machine,1,TC0100SCN_GFX_NUM,50,8,0,0,0,0,0);
28	28	TC0480SCP_vh_start(machine,TC0480SCP_GFX_NUM,0,0x24,0,-1,0,0,0,0);
r4679	r4680
220	220
221	221	VIDEO_UPDATE( groundfx )
222	222	{
223		const address_space *space = cpu_get_address_space(screen->machine->cpu[0], ADDRESS_SPACE_PROGRAM);
	223	const address_space *space = cputag_get_address_space(screen->machine, "maincpu", ADDRESS_SPACE_PROGRAM);
224	224	UINT8 layer[5];
225	225	UINT8 pivlayer[3];
226	226	UINT16 priority;

src/mame/video/kangaroo.c

r4679	r4680
24	24	VIDEO_START( kangaroo )
25	25	{
26	26	/* video RAM is accessed 32 bits at a time (two planes, 4bpp each, 4 pixels) */
27		videoram32 = auto_malloc(256 * 64 * 4);
	27	videoram32 = auto_alloc_array(machine, UINT32, 256 * 64);
28	28	state_save_register_global_pointer(machine, videoram32, 256 * 64);
29	29	}
30	30

src/mame/video/cidelsa.c

r4679	r4680
7	7
8	8	static CDP1869_PAGE_RAM_READ( cidelsa_pageram_r )
9	9	{
10		cidelsa_state *state = device->machine->driver_data;
	10	cidelsa_state *state = (cidelsa_state *)device->machine->driver_data;
11	11
12	12	UINT16 addr = pma & CIDELSA_PAGERAM_MASK;
13	13
r4679	r4680
21	21
22	22	static CDP1869_PAGE_RAM_WRITE( cidelsa_pageram_w )
23	23	{
24		cidelsa_state *state = device->machine->driver_data;
	24	cidelsa_state *state = (cidelsa_state *)device->machine->driver_data;
25	25
26	26	UINT16 addr = pma & CIDELSA_PAGERAM_MASK;
27	27
r4679	r4680
35	35
36	36	static CDP1869_PAGE_RAM_READ( draco_pageram_r )
37	37	{
38		cidelsa_state *state = device->machine->driver_data;
	38	cidelsa_state *state = (cidelsa_state *)device->machine->driver_data;
39	39
40	40	UINT16 addr = pma & DRACO_PAGERAM_MASK;
41	41
r4679	r4680
44	44
45	45	static CDP1869_PAGE_RAM_WRITE( draco_pageram_w )
46	46	{
47		cidelsa_state *state = device->machine->driver_data;
	47	cidelsa_state *state = (cidelsa_state *)device->machine->driver_data;
48	48
49	49	UINT16 addr = pma & DRACO_PAGERAM_MASK;
50	50
r4679	r4680
55	55
56	56	static CDP1869_CHAR_RAM_READ( cidelsa_charram_r )
57	57	{
58		cidelsa_state *state = device->machine->driver_data;
	58	cidelsa_state *state = (cidelsa_state *)device->machine->driver_data;
59	59
60	60	UINT8 column = BIT(pma, 10) ? 0xff : state->pageram[pma & CIDELSA_PAGERAM_MASK];
61	61	UINT16 addr = ((column << 3) | (cma & 0x07)) & CIDELSA_CHARRAM_MASK;
r4679	r4680
68	68
69	69	static CDP1869_CHAR_RAM_WRITE( cidelsa_charram_w )
70	70	{
71		cidelsa_state *state = device->machine->driver_data;
	71	cidelsa_state *state = (cidelsa_state *)device->machine->driver_data;
72	72
73	73	UINT8 column = BIT(pma, 10) ? 0xff : state->pageram[pma & CIDELSA_PAGERAM_MASK];
74	74	UINT16 addr = ((column << 3) | (cma & 0x07)) & CIDELSA_CHARRAM_MASK;
r4679	r4680
79	79
80	80	static CDP1869_CHAR_RAM_READ( draco_charram_r )
81	81	{
82		cidelsa_state *state = device->machine->driver_data;
	82	cidelsa_state *state = (cidelsa_state *)device->machine->driver_data;
83	83
84	84	UINT8 column = state->pageram[pma & DRACO_PAGERAM_MASK];
85	85	UINT16 addr = ((column << 3) | (cma & 0x07)) & CIDELSA_CHARRAM_MASK;
r4679	r4680
92	92
93	93	static CDP1869_CHAR_RAM_WRITE( draco_charram_w )
94	94	{
95		cidelsa_state *state = device->machine->driver_data;
	95	cidelsa_state *state = (cidelsa_state *)device->machine->driver_data;
96	96
97	97	UINT8 column = state->pageram[pma & DRACO_PAGERAM_MASK];
98	98	UINT16 addr = ((column << 3) | (cma & 0x07)) & CIDELSA_CHARRAM_MASK;
r4679	r4680
105	105
106	106	static CDP1869_PCB_READ( cidelsa_pcb_r )
107	107	{
108		cidelsa_state *state = device->machine->driver_data;
	108	cidelsa_state *state = (cidelsa_state *)device->machine->driver_data;
109	109
110	110	UINT8 column = state->pageram[pma & CIDELSA_PAGERAM_MASK];
111	111	UINT16 addr = ((column << 3) | (cma & 0x07)) & CIDELSA_CHARRAM_MASK;
r4679	r4680
115	115
116	116	static CDP1869_PCB_READ( draco_pcb_r )
117	117	{
118		cidelsa_state *state = device->machine->driver_data;
	118	cidelsa_state *state = (cidelsa_state *)device->machine->driver_data;
119	119
120	120	UINT8 column = state->pageram[pma & DRACO_PAGERAM_MASK];
121	121	UINT16 addr = ((column << 3) | (cma & 0x07)) & CIDELSA_CHARRAM_MASK;
r4679	r4680
127	127
128	128	static WRITE_LINE_DEVICE_HANDLER( cidelsa_prd_w )
129	129	{
130		cidelsa_state *driver_state = device->machine->driver_data;
	130	cidelsa_state *driver_state = (cidelsa_state *)device->machine->driver_data;
131	131
132	132	/* invert PRD signal */
133	133	cputag_set_input_line(device->machine, CDP1802_TAG, INPUT_LINE_IRQ0, !state);
r4679	r4680
136	136
137	137	static WRITE_LINE_DEVICE_HANDLER( draco_prd_w )
138	138	{
139		cidelsa_state *driver_state = device->machine->driver_data;
	139	cidelsa_state *driver_state = (cidelsa_state *)device->machine->driver_data;
140	140
141	141	driver_state->cdp1869_prd = state;
142	142	}
r4679	r4680
189	189
190	190	static void video_start(running_machine *machine, UINT16 pageram_size)
191	191	{
192		cidelsa_state *state = machine->driver_data;
	192	cidelsa_state *state = (cidelsa_state *)machine->driver_data;
193	193
194	194	/* allocate memory */
195		state->pageram = auto_malloc(pageram_size);
196		state->pcbram = auto_malloc(CIDELSA_CHARRAM_SIZE);
197		state->charram = auto_malloc(CIDELSA_CHARRAM_SIZE);
	195	state->pageram = auto_alloc_array(machine, UINT8, pageram_size);
	196	state->pcbram = auto_alloc_array(machine, UINT8, CIDELSA_CHARRAM_SIZE);
	197	state->charram = auto_alloc_array(machine, UINT8, CIDELSA_CHARRAM_SIZE);
198	198
199	199	/* find devices */
200	200	state->cdp1869 = devtag_get_device(machine, CDP1869_TAG);
r4679	r4680
221	221
222	222	static VIDEO_UPDATE( cidelsa )
223	223	{
224		cidelsa_state *state = screen->machine->driver_data;
	224	cidelsa_state *state = (cidelsa_state *)screen->machine->driver_data;
225	225
226	226	cdp1869_update(state->cdp1869, bitmap, cliprect);
227	227

src/mame/video/m92.c

r4679	r4680
141	141
142	142	static TILE_GET_INFO( get_pf_tile_info )
143	143	{
144		pf_layer_info *layer = param;
	144	pf_layer_info *layer = (pf_layer_info *)param;
145	145	int tile, attrib;
146	146	tile_index = 2 * tile_index + layer->vram_base;
147	147
r4679	r4680
279	279	state_save_register_item_array(machine, "layer", NULL, laynum, layer->control);
280	280	}
281	281
282		paletteram16 = auto_malloc(0x1000);
	282	paletteram16 = auto_alloc_array(machine, UINT16, 0x1000/2);
283	283
284	284	memset(spriteram16,0,0x800);
285	285	memset(buffered_spriteram16,0,0x800);

src/mame/video/m58.c

r4679	r4680
188	188	tilemap_set_scrolldx(bg_tilemap, visarea->min_x, width - (visarea->max_x + 1));
189	189	tilemap_set_scrolldy(bg_tilemap, visarea->min_y - 8, height + 16 - (visarea->max_y + 1));
190	190
191		scroll_panel_bitmap = auto_bitmap_alloc(SCROLL_PANEL_WIDTH, height, format);
	191	scroll_panel_bitmap = auto_bitmap_alloc(machine, SCROLL_PANEL_WIDTH, height, format);
192	192	}
193	193
194	194

src/mame/video/thoop2.c

r4679	r4680
95	95	tilemap_set_transmask(pant[1],0,0xff01,0x00ff); /* pens 1-7 opaque, pens 0, 8-15 transparent */
96	96
97	97	for (i = 0; i < 5; i++){
98		sprite_table[i] = auto_malloc(512*sizeof(int));
	98	sprite_table[i] = auto_alloc_array(machine, int, 512);
99	99	}
100	100	}
101	101

src/mame/video/circus.c

r4679	r4680
252	252	// report collision only when the character is not blank and within display area
253	253	if (collision && code!=0xf && clown_x>0 && clown_x<240 && clown_y>-12 && clown_y<240)
254	254	{
255		cpu_set_input_line(machine->cpu[0], 0, ASSERT_LINE); // interrupt accuracy is critical in Ripcord
256		cpu_set_input_line(machine->cpu[0], 0, CLEAR_LINE);
	255	cputag_set_input_line(machine, "maincpu", 0, ASSERT_LINE); // interrupt accuracy is critical in Ripcord
	256	cputag_set_input_line(machine, "maincpu", 0, CLEAR_LINE);
257	257	}
258	258	}
259	259

src/mame/video/taotaido.c

r4679	r4680
194	194	{
195	195	bg_tilemap = tilemap_create(machine, taotaido_bg_tile_info,taotaido_tilemap_scan_rows,     16,16,128,64);
196	196
197		taotaido_spriteram_old = auto_malloc(0x2000);
198		taotaido_spriteram_older = auto_malloc(0x2000);
	197	taotaido_spriteram_old = auto_alloc_array(machine, UINT16, 0x2000/2);
	198	taotaido_spriteram_older = auto_alloc_array(machine, UINT16, 0x2000/2);
199	199
200		taotaido_spriteram2_old = auto_malloc(0x10000);
201		taotaido_spriteram2_older = auto_malloc(0x10000);
	200	taotaido_spriteram2_old = auto_alloc_array(machine, UINT16, 0x10000/2);
	201	taotaido_spriteram2_older = auto_alloc_array(machine, UINT16, 0x10000/2);
202	202	}
203	203
204	204

src/mame/video/taito_f3.c

r4679	r4680
664	664	twidth_mask_bit=5;
665	665	}
666	666
667		spriteram32_buffered = (UINT32 *)auto_malloc(0x10000);
668		spritelist = auto_malloc(0x400 * sizeof(*spritelist));
	667	spriteram32_buffered = auto_alloc_array(machine, UINT32, 0x10000/4);
	668	spritelist = auto_alloc_array(machine, struct tempsprite, 0x400);
669	669	sprite_end = spritelist;
670	670	vram_layer = tilemap_create(machine, get_tile_info_vram,tilemap_scan_rows,8,8,64,64);
671	671	pixel_layer = tilemap_create(machine, get_tile_info_pixel,tilemap_scan_cols,8,8,64,32);
672		pf_line_inf = auto_malloc(5 * sizeof(struct f3_playfield_line_inf));
673		sa_line_inf = auto_malloc(1 * sizeof(struct f3_spritealpha_line_inf));
	672	pf_line_inf = auto_alloc_array(machine, struct f3_playfield_line_inf, 5);
	673	sa_line_inf = auto_alloc_array(machine, struct f3_spritealpha_line_inf, 1);
674	674	width = video_screen_get_width(machine->primary_screen);
675	675	height = video_screen_get_height(machine->primary_screen);
676		pri_alp_bitmap = auto_bitmap_alloc(width, height, BITMAP_FORMAT_INDEXED8 );
677		tile_opaque_sp = (UINT8 *)auto_malloc(machine->gfx[2]->total_elements);
	676	pri_alp_bitmap = auto_bitmap_alloc(machine, width, height, BITMAP_FORMAT_INDEXED8 );
	677	tile_opaque_sp = auto_alloc_array(machine, UINT8, machine->gfx[2]->total_elements);
678	678	for (i=0; i<4; i++)
679		tile_opaque_pf[i] = (UINT8 *)auto_malloc(machine->gfx[1]->total_elements);
	679	tile_opaque_pf[i] = auto_alloc_array(machine, UINT8, machine->gfx[1]->total_elements);
680	680
681	681	tilemap_set_transparent_pen(pf1_tilemap,0);
682	682	tilemap_set_transparent_pen(pf2_tilemap,0);

src/mame/video/gaelco2.c

r4679	r4680
509	509
510	510	VIDEO_EOF( gaelco2 )
511	511	{
512		const address_space *space = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM);
	512	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
513	513
514	514	/* sprites are one frame ahead */
515	515	buffer_spriteram16_w(space, 0, 0, 0xffff);

src/mame/video/segasyse.c

r4679	r4680
59	59
60	60	vdp_start(machine, 0);
61	61
62		cache_bitmap = auto_malloc( (16+256+16) * 192); /* 16 pixels either side to simplify drawing */
	62	cache_bitmap = auto_alloc_array(machine, UINT8, (16+256+16) * 192); /* 16 pixels either side to simplify drawing */
63	63	}
64	64
65	65	VIDEO_UPDATE( megaplay_normal )
r4679	r4680
101	101
102	102	/*- VRAM -*/
103	103
104		segae_vdp_vram[chip] = auto_malloc(0x8000); /* 32kb (2 banks) */
	104	segae_vdp_vram[chip] = auto_alloc_array(machine, UINT8, 0x8000); /* 32kb (2 banks) */
105	105	segae_vdp_vrambank[chip] = 0;
106	106
107	107	/*- CRAM -*/
108	108
109		vdp_cram[chip] = auto_malloc(0x20);
	109	vdp_cram[chip] = auto_alloc_array(machine, UINT8, 0x20);
110	110
111	111	/*- VDP Registers -*/
112	112
113		segae_vdp_regs[chip] = auto_malloc(0x20);
	113	segae_vdp_regs[chip] = auto_alloc_array(machine, UINT8, 0x20);
114	114
115	115	/*- Clear Memory -*/
116	116

src/mame/video/m107.c

r4679	r4680
59	59
60	60	static TILE_GET_INFO( get_pf_tile_info )
61	61	{
62		pf_layer_info *layer = param;
	62	pf_layer_info *layer = (pf_layer_info *)param;
63	63	int tile, attrib;
64	64	tile_index = 2 * tile_index + layer->vram_base;
65	65
r4679	r4680
147	147	tilemap_set_transparent_pen(layer->tmap, 0);
148	148	}
149	149
150		m107_spriteram = auto_malloc(0x1000);
151		memset(m107_spriteram,0,0x1000);
	150	m107_spriteram = auto_alloc_array_clear(machine, UINT16, 0x1000/2);
152	151	}
153	152
154	153	/*****************************************************************************/

src/mame/video/ninjaw.c

r4679	r4680
25	25	int chips;
26	26	int mask;
27	27
28		spritelist = auto_malloc(0x1000 * sizeof(*spritelist));
	28	spritelist = auto_alloc_array(machine, struct tempsprite, 0x1000);
29	29
30	30	chips = TC0100SCN_count(machine);
31	31

src/mame/video/matmania.c

r4679	r4680
130	130	bitmap_format format = video_screen_get_format(machine->primary_screen);
131	131
132	132	/* Mat Mania has a virtual screen twice as large as the visible screen */
133		tmpbitmap  = auto_bitmap_alloc(width, 2*height, format);
134		tmpbitmap2 = auto_bitmap_alloc(width, 2*height, format);
	133	tmpbitmap  = auto_bitmap_alloc(machine, width, 2*height, format);
	134	tmpbitmap2 = auto_bitmap_alloc(machine, width, 2*height, format);
135	135	}
136	136
137	137

src/mame/video/arkanoid.c

r4679	r4680
24	24	int bank;
25	25
26	26	/* bits 0 and 1 flip X and Y, I don't know which is which */
27		if (flip_screen_x_get(space->machine) != (data & 0x01)) {
	27	if (flip_screen_x_get(space->machine) != (data & 0x01))
	28	{
28	29	flip_screen_x_set(space->machine, data & 0x01);
29	30	tilemap_mark_all_tiles_dirty(bg_tilemap);
30	31	}
31	32
32		if (flip_screen_y_get(space->machine) != (data & 0x02)) {
	33	if (flip_screen_y_get(space->machine) != (data & 0x02))
	34	{
33	35	flip_screen_y_set(space->machine, data & 0x02);
34	36	tilemap_mark_all_tiles_dirty(bg_tilemap);
35	37	}
r4679	r4680
47	49	/* so I don't know which is which. */
48	50	bank = (data & 0x20) >> 5;
49	51
50		if (gfxbank != bank) {
	52	if (gfxbank != bank)
	53	{
51	54	gfxbank = bank;
52	55	tilemap_mark_all_tiles_dirty(bg_tilemap);
53	56	}
54	57
55	58	bank = (data & 0x40) >> 6;
56	59
57		if (palettebank != bank) {
	60	if (palettebank != bank)
	61	{
58	62	palettebank = bank;
59	63	tilemap_mark_all_tiles_dirty(bg_tilemap);
60	64	}
r4679	r4680
65	69	leaving the tilt screen (as the MCU is now out of sync with main CPU
66	70	which resets itself).  This bit is the likely candidate as it is flipped
67	71	early in bootup just prior to accessing the MCU for the first time. */
68		if (space->machine->cpu[1] != NULL) // Bootlegs don't have the MCU but still set this bit
69		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_RESET, (data & 0x80) ? CLEAR_LINE : ASSERT_LINE);
	72	if (cputag_get_cpu(space->machine, "mcu") != NULL)   // Bootlegs don't have the MCU but still set this bit
	73	cputag_set_input_line(space->machine, "mcu", INPUT_LINE_RESET, (data & 0x80) ? CLEAR_LINE : ASSERT_LINE);
70	74	}
71	75
72	76	static TILE_GET_INFO( get_bg_tile_info )

src/mame/video/twin16.c

r4679	r4680
456	456
457	457	VIDEO_EOF( twin16 )
458	458	{
459		const address_space *space = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM);
	459	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
460	460
461	461	if( twin16_spriteram_process_enable() && need_process_spriteram )
462	462	twin16_spriteram_process();

src/mame/video/megasys1.c

r4679	r4680
449	449
450	450	case 0x300/2   :   megasys1_screen_flag = new_data;
451	451	if (new_data & 0x10)
452		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_RESET, ASSERT_LINE);
	452	cputag_set_input_line(space->machine, "soundcpu", INPUT_LINE_RESET, ASSERT_LINE);
453	453	else
454		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_RESET, CLEAR_LINE);
	454	cputag_set_input_line(space->machine, "soundcpu", INPUT_LINE_RESET, CLEAR_LINE);
455	455	break;
456	456
457	457	case 0x308/2   :   soundlatch_word_w(space,0,new_data,0xffff);
458		cpu_set_input_line(space->machine->cpu[1],4,HOLD_LINE);
	458	cputag_set_input_line(space->machine, "soundcpu", 4, HOLD_LINE);
459	459	break;
460	460
461	461	default       :   SHOW_WRITE_ERROR("vreg %04X <- %04X",offset*2,data);
r4679	r4680
500	500
501	501	case 0x2308/2   :   megasys1_screen_flag = new_data;
502	502	if (new_data & 0x10)
503		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_RESET, ASSERT_LINE);
	503	cputag_set_input_line(space->machine, "soundcpu", INPUT_LINE_RESET, ASSERT_LINE);
504	504	else
505		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_RESET, CLEAR_LINE);
	505	cputag_set_input_line(space->machine, "soundcpu", INPUT_LINE_RESET, CLEAR_LINE);
506	506	break;
507	507
508	508	case 0x8000/2   :   /* Cybattler reads sound latch on irq 2 */
509		soundlatch_word_w(space,0,new_data,0xffff);
510		cpu_set_input_line(space->machine->cpu[1],2,HOLD_LINE);
	509	soundlatch_word_w(space, 0, new_data, 0xffff);
	510	cputag_set_input_line(space->machine, "soundcpu", 2, HOLD_LINE);
511	511	break;
512	512
513		default:      SHOW_WRITE_ERROR("vreg %04X <- %04X",offset*2,data);
	513	default:      SHOW_WRITE_ERROR("vreg %04X <- %04X", offset * 2, data);
514	514	}
515	515	}
516	516

src/mame/video/crshrace.c

r4679	r4680
215	215
216	216	VIDEO_EOF( crshrace )
217	217	{
218		const address_space *space = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM);
	218	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
219	219
220	220	buffer_spriteram16_w(space,0,0,0xffff);
221	221	buffer_spriteram16_2_w(space,0,0,0xffff);

src/mame/video/dcheese.c

r4679	r4680
108	108	VIDEO_START( dcheese )
109	109	{
110	110	/* the destination bitmap is not directly accessible to the CPU */
111		dstbitmap = auto_bitmap_alloc(DSTBITMAP_WIDTH, DSTBITMAP_HEIGHT, video_screen_get_format(machine->primary_screen));
	111	dstbitmap = auto_bitmap_alloc(machine, DSTBITMAP_WIDTH, DSTBITMAP_HEIGHT, video_screen_get_format(machine->primary_screen));
112	112
113	113	/* create a timer */
114	114	blitter_timer = timer_alloc(machine, blitter_scanline_callback, NULL);

src/mame/video/bwing.c

r4679	r4680
48	48	//****************************************************************************
49	49	// Exports
50	50
	51	extern const gfx_layout bwing_tilelayout;
51	52	const gfx_layout bwing_tilelayout =
52	53	{
53	54	16, 16,
r4679	r4680
189	190	charmap = tilemap_create(machine, get_charinfo,tilemap_scan_cols, 8, 8,32,32);
190	191	fgmap = tilemap_create(machine, get_fgtileinfo,bwing_scan_cols,16,16,64,64);
191	192	bgmap = tilemap_create(machine, get_bgtileinfo,bwing_scan_cols,16,16,64,64);
192		srxlat = auto_malloc(0x8000);
	193	srxlat = auto_alloc_array(machine, int, 0x2000);
193	194
194	195	scrollmap[0] = fgmap;
195	196	scrollmap[1] = bgmap;

src/mame/video/cave.c

r4679	r4680
144	144	int pen;
145	145
146	146	/* create a 1:1 palette map covering everything */
147		palette_map = auto_malloc(machine->config->total_colors * sizeof(palette_map[0]));
	147	palette_map = auto_alloc_array(machine, UINT16, machine->config->total_colors);
148	148	for (pen = 0; pen < machine->config->total_colors; pen++)
149	149	palette_map[pen] = pen % maxpen;
150	150	}
r4679	r4680
788	788	cave_spritetype2 = 0;
789	789	}
790	790
791		sprite_zbuf = auto_bitmap_alloc(screen_width, screen_height, BITMAP_FORMAT_INDEXED16 );
792		blit.baseaddr_zbuf = sprite_zbuf->base;
	791	sprite_zbuf = auto_bitmap_alloc(machine, screen_width, screen_height, BITMAP_FORMAT_INDEXED16 );
	792	blit.baseaddr_zbuf = (UINT8 *)sprite_zbuf->base;
793	793	blit.line_offset_zbuf = sprite_zbuf->rowpixels * sprite_zbuf->bpp / 8;
794	794
795	795	num_sprites = spriteram_size / 0x10 / 2;
796		sprite_cave = auto_malloc( num_sprites * sizeof(struct sprite_cave) );
797		memset(sprite_cave, 0, num_sprites * sizeof(struct sprite_cave));
	796	sprite_cave = auto_alloc_array_clear(machine, struct sprite_cave, num_sprites);
798	797
799	798	memset(sprite_table,0,sizeof(sprite_table));
800	799	cave_sprite_draw = sprite_draw_donpachi;
r4679	r4680
1464	1463
1465	1464	set_pens(screen->machine);
1466	1465
1467		blit.baseaddr = bitmap->base;
	1466	blit.baseaddr = (UINT8 *)bitmap->base;
1468	1467	blit.line_offset = bitmap->rowpixels * bitmap->bpp / 8;
1469	1468
1470	1469	/* Choose the tilemap to display (8x8 tiles or 16x16 tiles) */

src/mame/video/dooyong.c

r4679	r4680
904	904
905	905	VIDEO_EOF( dooyong )
906	906	{
907		const address_space *space = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM);
	907	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
908	908
909	909	buffer_spriteram_w(space, 0, 0);
910	910	}
911	911
912	912	VIDEO_EOF( rshark )
913	913	{
914		const address_space *space = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM);
	914	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
915	915
916	916	buffer_spriteram16_w(space, 0, 0, 0xffff);
917	917	}

src/mame/video/williams.c

r4679	r4680
155	155	*
156	156	*************************************/
157	157
158		static void blitter_init(int blitter_config, const UINT8 *remap_prom);
159		static void create_palette_lookup(void);
	158	static void blitter_init(running_machine *machine, int blitter_config, const UINT8 *remap_prom);
	159	static void create_palette_lookup(running_machine *machine);
160	160	static TILE_GET_INFO( get_tile_info );
161	161	static int blitter_core(const address_space *space, int sstart, int dstart, int w, int h, int data);
162	162
r4679	r4680
183	183
184	184	VIDEO_START( williams )
185	185	{
186		blitter_init(williams_blitter_config, NULL);
187		create_palette_lookup();
	186	blitter_init(machine, williams_blitter_config, NULL);
	187	create_palette_lookup(machine);
188	188	state_save_register(machine);
189	189	}
190	190
191	191
192	192	VIDEO_START( blaster )
193	193	{
194		blitter_init(williams_blitter_config, memory_region(machine, "proms"));
195		create_palette_lookup();
	194	blitter_init(machine, williams_blitter_config, memory_region(machine, "proms"));
	195	create_palette_lookup(machine);
196	196	state_save_register(machine);
197	197	}
198	198
199	199
200	200	VIDEO_START( williams2 )
201	201	{
202		blitter_init(williams_blitter_config, NULL);
	202	blitter_init(machine, williams_blitter_config, NULL);
203	203
204	204	/* allocate paletteram */
205		paletteram = auto_malloc(0x400 * 2);
	205	paletteram = auto_alloc_array(machine, UINT8, 0x400 * 2);
206	206	state_save_register_global_pointer(machine, paletteram, 0x400 * 2);
207	207
208	208	/* create the tilemap */
r4679	r4680
329	329	*
330	330	*************************************/
331	331
332		static void create_palette_lookup(void)
	332	static void create_palette_lookup(running_machine *machine)
333	333	{
334	334	static const int resistances_rg[3] = { 1200, 560, 330 };
335	335	static const int resistances_b[2]  = { 560, 330 };
r4679	r4680
345	345	2, resistances_b,  weights_b, 0, 0);
346	346
347	347	/* build a palette lookup */
348		palette_lookup = auto_malloc(256 * sizeof(*palette_lookup));
	348	palette_lookup = auto_alloc_array(machine, rgb_t, 256);
349	349	for (i = 0; i < 256; i++)
350	350	{
351	351	int r = combine_3_weights(weights_r, BIT(i,0), BIT(i,1), BIT(i,2));
r4679	r4680
521	521	*
522	522	*************************************/
523	523
524		static void blitter_init(int blitter_config, const UINT8 *remap_prom)
	524	static void blitter_init(running_machine *machine, int blitter_config, const UINT8 *remap_prom)
525	525	{
526	526	static const UINT8 dummy_table[] = { 0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15 };
527	527	int i,j;
r4679	r4680
533	533	blitter_xor = (blitter_config == WILLIAMS_BLITTER_SC01) ? 4 : 0;
534	534
535	535	/* create the remap table; if no PROM, make an identity remap table */
536		blitter_remap_lookup = auto_malloc(256 * 256);
	536	blitter_remap_lookup = auto_alloc_array(machine, UINT8, 256 * 256);
537	537	blitter_remap_index = 0;
538	538	blitter_remap = blitter_remap_lookup;
539	539	for (i = 0; i < 256; i++)

src/mame/video/dec8.c

r4679	r4680
81	81	{
82	82	int i;
83	83
84		for (i = 0;i < machine->config->total_colors;i++)
	84	for (i = 0; i < machine->config->total_colors; i++)
85	85	{
86		int bit0,bit1,bit2,bit3,r,g,b;
	86	int bit0, bit1, bit2, bit3, r, g, b;
87	87
88	88	bit0 = (color_prom[i] >> 0) & 0x01;
89	89	bit1 = (color_prom[i] >> 1) & 0x01;
r4679	r4680
101	101	bit3 = (color_prom[i + machine->config->total_colors] >> 3) & 0x01;
102	102	b = 0x0e * bit0 + 0x1f * bit1 + 0x43 * bit2 + 0x8f * bit3;
103	103
104		palette_set_color(machine,i,MAKE_RGB(r,g,b));
	104	palette_set_color(machine, i, MAKE_RGB(r, g, b));
105	105	}
106	106	}
107	107
108	108	WRITE8_HANDLER( dec8_bac06_0_w )
109	109	{
110		dec8_pf0_control[offset]=data;
	110	dec8_pf0_control[offset] = data;
111	111	}
112	112
113	113	WRITE8_HANDLER( dec8_bac06_1_w )
114	114	{
115		dec8_pf1_control[offset]=data;
	115	dec8_pf1_control[offset] = data;
116	116	}
117	117
118	118	WRITE8_HANDLER( dec8_pf0_data_w )
119	119	{
120		dec8_pf0_data[offset]=data;
121		tilemap_mark_tile_dirty(dec8_pf0_tilemap,offset/2);
	120	dec8_pf0_data[offset] = data;
	121	tilemap_mark_tile_dirty(dec8_pf0_tilemap, offset / 2);
122	122	}
123	123
124	124	WRITE8_HANDLER( dec8_pf1_data_w )
125	125	{
126		dec8_pf1_data[offset]=data;
127		tilemap_mark_tile_dirty(dec8_pf1_tilemap,offset/2);
	126	dec8_pf1_data[offset] = data;
	127	tilemap_mark_tile_dirty(dec8_pf1_tilemap, offset / 2);
128	128	}
129	129
130	130	READ8_HANDLER( dec8_pf0_data_r )
r4679	r4680
139	139
140	140	WRITE8_HANDLER( dec8_videoram_w )
141	141	{
142		videoram[offset]=data;
	142	videoram[offset] = data;
143	143	tilemap_mark_tile_dirty( dec8_fix_tilemap,offset/2 );
144	144	}
145	145
146	146	WRITE8_HANDLER( srdarwin_videoram_w )
147	147	{
148		videoram[offset]=data;
	148	videoram[offset] = data;
149	149	tilemap_mark_tile_dirty( dec8_fix_tilemap,offset );
150	150	}
151	151
152	152	#ifdef UNUSED_FUNCTION
153	153	WRITE8_HANDLER( dec8_scroll1_w )
154	154	{
155		scroll1[offset]=data;
	155	scroll1[offset] = data;
156	156	}
157	157	#endif
158	158
159	159	WRITE8_HANDLER( dec8_scroll2_w )
160	160	{
161		scroll2[offset]=data;
	161	scroll2[offset] = data;
162	162	}
163	163
164	164	WRITE8_HANDLER( srdarwin_control_w )
r4679	r4680
166	166	int bankaddress;
167	167	UINT8 *RAM = memory_region(space->machine, "maincpu");
168	168
169		switch (offset) {
	169	switch (offset)
	170	{
170	171	case 0: /* Top 3 bits - bank switch, bottom 4 - scroll MSB */
171	172	bankaddress = 0x10000 + (data >> 5) * 0x4000;
172		memory_set_bankptr(space->machine, 1,&RAM[bankaddress]);
173		scroll2[0]=data&0xf;
	173	memory_set_bankptr(space->machine, 1, &RAM[bankaddress]);
	174	scroll2[0] = data & 0xf;
174	175	return;
175	176
176	177	case 1:
177		scroll2[1]=data;
	178	scroll2[1] = data;
178	179	return;
179	180	}
180	181	}
r4679	r4680
190	191	Bit 0x40 - Y scroll MSB
191	192	Bit 0x80 - Hold subcpu reset line high if clear, else low
192	193	*/
193		memory_set_bankptr(space->machine, 1,&RAM[0x10000 + (data & 0x0f) * 0x4000]);
	194	memory_set_bankptr(space->machine, 1, &RAM[0x10000 + (data & 0x0f) * 0x4000]);
194	195
195		scroll2[0]=(data>>5)&1;
196		scroll2[2]=(data>>6)&1;
	196	scroll2[0] = (data >> 5) & 1;
	197	scroll2[2] = (data >> 6) & 1;
197	198
198		if (data&0x80)
199		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_RESET, CLEAR_LINE);
	199	if (data & 0x80)
	200	cputag_set_input_line(space->machine, "sub", INPUT_LINE_RESET, CLEAR_LINE);
200	201	else
201		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_RESET, ASSERT_LINE);
	202	cputag_set_input_line(space->machine, "sub", INPUT_LINE_RESET, ASSERT_LINE);
202	203	}
203	204
204	205	WRITE8_HANDLER( shackled_control_w )
r4679	r4680
210	211	bankaddress = 0x10000 + (data & 0x0f) * 0x4000;
211	212	memory_set_bankptr(space->machine, 1,&RAM[bankaddress]);
212	213
213		scroll2[0]=(data>>5)&1;
214		scroll2[2]=(data>>6)&1;
	214	scroll2[0] = (data >> 5) & 1;
	215	scroll2[2] = (data >> 6) & 1;
215	216	}
216	217
217	218	WRITE8_HANDLER( lastmiss_scrollx_w )
218	219	{
219		scroll2[1]=data;
	220	scroll2[1] = data;
220	221	}
221	222
222	223	WRITE8_HANDLER( lastmiss_scrolly_w )
223	224	{
224		scroll2[3]=data;
	225	scroll2[3] = data;
225	226	}
226	227
227	228	WRITE8_HANDLER( gondo_scroll_w )
228	229	{
229		switch (offset) {
	230	switch (offset)
	231	{
230	232	case 0x0:
231		scroll2[1]=data; /* X LSB */
	233	scroll2[1] = data; /* X LSB */
232	234	break;
233	235	case 0x8:
234		scroll2[3]=data; /* Y LSB */
	236	scroll2[3] = data; /* Y LSB */
235	237	break;
236	238	case 0x10:
237		scroll2[0]=(data>>0)&1; /* Bit 0: X MSB */
238		scroll2[2]=(data>>1)&1; /* Bit 1: Y MSB */
	239	scroll2[0] = (data >> 0) & 1; /* Bit 0: X MSB */
	240	scroll2[2] = (data >> 1) & 1; /* Bit 1: Y MSB */
239	241	/* Bit 2 is also used in Gondo & Garyoret */
240	242	break;
241	243	}
r4679	r4680
276	278	y=(y+16)%0x200;
277	279	x=256 - x;
278	280	y=256 - y;
279		if (flip_screen_get(machine)) {
	281	if (flip_screen_get(machine))
	282	{
280	283	y=240-y;
281	284	x=240-x;
282	285	if (fx) fx=0; else fx=1;
r4679	r4680
285	288	}
286	289
287	290	/* Y Flip determines order of multi-sprite */
288		if (extra && fy) {
	291	if (extra && fy)
	292	{
289	293	sprite2=sprite;
290	294	sprite++;
291	295	}
r4679	r4680
348	352	inc = 1;
349	353	}
350	354
351		if (flip_screen_get(machine)) {
	355	if (flip_screen_get(machine))
	356	{
352	357	y=240-y;
353	358	x=240-x;
354	359	if (fx) fx=0; else fx=1;
r4679	r4680
394	399	fx = buffered_spriteram[offs+1] & 0x04;
395	400	multi = buffered_spriteram[offs+1] & 0x10;
396	401
397		if (flip_screen_get(machine)) {
	402	if (flip_screen_get(machine))
	403	{
398	404	sy=240-sy;
399	405	sx=240-sx;
400	406	if (fx) fx=0; else fx=1;
r4679	r4680
424	430	{
425	431	int mx,my,tile,color,offs;
426	432
427		for (offs = 0x800 - 2;offs >= 0;offs -= 2) {
	433	for (offs = 0x800 - 2;offs >= 0;offs -= 2)
	434	{
428	435	tile=videoram[offs+1]+((videoram[offs]&0xf)<<8);
429	436
430	437	if (!tile) continue;
r4679	r4680
526	533
527	534	VIDEO_UPDATE( ghostb )
528	535	{
529		if (dec8_pf0_control[0]&0x4) { /* Rowscroll */
	536	if (dec8_pf0_control[0]&0x4)
	537	{ /* Rowscroll */
530	538	int offs;
531	539
532	540	tilemap_set_scroll_rows(dec8_pf0_tilemap,512);
533	541	for (offs = 0;offs < 512;offs+=2)
534	542	tilemap_set_scrollx( dec8_pf0_tilemap,offs/2, (dec8_pf0_control[0x10]<<8)+dec8_pf0_control[0x11] + (dec8_row[offs]<<8)+dec8_row[offs+1] );
535		} else {
	543	}
	544	else
	545	{
536	546	tilemap_set_scroll_rows(dec8_pf0_tilemap,1);
537	547	tilemap_set_scrollx( dec8_pf0_tilemap,0, (dec8_pf0_control[0x10]<<8)+dec8_pf0_control[0x11] );
538	548	}

src/mame/video/fuukifg3.c

r4679	r4680
106	106
107	107	VIDEO_START( fuuki32 )
108	108	{
109		buffered_spriteram32   = auto_malloc(spriteram_size);
110		buffered_spriteram32_2 = auto_malloc(spriteram_size);
	109	buffered_spriteram32   = auto_alloc_array(machine, UINT32, spriteram_size/4);
	110	buffered_spriteram32_2 = auto_alloc_array(machine, UINT32, spriteram_size/4);
111	111
112	112	tilemap_0 = tilemap_create(   machine, get_tile_info_0, tilemap_scan_rows,
113	113	16, 16, 64,32);

src/mame/video/battlane.c

r4679	r4680
146	146	bg_tilemap = tilemap_create(machine, get_tile_info_bg, battlane_tilemap_scan_rows_2x2,
147	147	16, 16, 32, 32);
148	148
149		screen_bitmap = auto_bitmap_alloc(32 * 8, 32 * 8, BITMAP_FORMAT_INDEXED8);
	149	screen_bitmap = auto_bitmap_alloc(machine, 32 * 8, 32 * 8, BITMAP_FORMAT_INDEXED8);
150	150	}
151	151
152	152	static void draw_sprites(running_machine *machine, bitmap_t *bitmap, const rectangle *cliprect)

src/mame/video/atarigt.c

r4679	r4680
152	152	width = video_screen_get_width(machine->primary_screen);
153	153	height = video_screen_get_height(machine->primary_screen);
154	154
155		pf_bitmap = auto_bitmap_alloc(width, height, BITMAP_FORMAT_INDEXED16);
156		an_bitmap = auto_bitmap_alloc(width, height, BITMAP_FORMAT_INDEXED16);
	155	pf_bitmap = auto_bitmap_alloc(machine, width, height, BITMAP_FORMAT_INDEXED16);
	156	an_bitmap = auto_bitmap_alloc(machine, width, height, BITMAP_FORMAT_INDEXED16);
157	157
158	158	/* allocate memory */
159		expanded_mram = auto_malloc(sizeof(*expanded_mram) * MRAM_ENTRIES * 3);
	159	expanded_mram = auto_alloc_array(machine, UINT32, MRAM_ENTRIES * 3);
160	160
161	161	/* map pens 1:1 */
162		substitute_pens = auto_malloc(65536 * sizeof(*substitute_pens));
	162	substitute_pens = auto_alloc_array(machine, pen_t, 65536);
163	163	for (i = 0; i < machine->config->total_colors; i++)
164	164	substitute_pens[i] = i;
165	165	machine->pens = substitute_pens;

src/mame/video/genesis.c

r4679	r4680
8	8	***********************************************************************************************/
9	9
10	10	#include "driver.h"
	11	#include "sound/sn76496.h"
	12
11	13	#include "genesis.h"
12	14
13	15	/* in video/segasyse.c */
r4679	r4680
134	136	genesis_screen = screen;
135	137
136	138	/* allocate memory for the VDP, the lookup table, and the buffer bitmap */
137		vdp_vram         = auto_malloc(VRAM_SIZE);
138		vdp_vsram         = auto_malloc(VSRAM_SIZE);
139		transparent_lookup   = auto_malloc(0x1000 * sizeof(UINT16));
	139	vdp_vram         = auto_alloc_array(screen->machine, UINT8, VRAM_SIZE);
	140	vdp_vsram         = auto_alloc_array(screen->machine, UINT8, VSRAM_SIZE);
	141	transparent_lookup   = auto_alloc_array(screen->machine, UINT16, 0x1000);
140	142
141	143	/* clear the VDP memory, prevents corrupt tile in Puyo Puyo 2 */
142	144	memset(vdp_vram, 0, VRAM_SIZE);

src/mame/video/thepit.c

r4679	r4680
155	155	tilemap_set_scroll_cols(thepit_solid_tilemap, 32);
156	156	tilemap_set_scroll_cols(thepit_tilemap, 32);
157	157
158		dummy_tile = auto_malloc(8*8);
159		memset(dummy_tile, 0, 8*8);
	158	dummy_tile = auto_alloc_array_clear(machine, UINT8, 8*8);
160	159
161	160	graphics_bank = 0;   /* only used in intrepid */
162	161	}

src/mame/video/rpunch.c

r4679	r4680
76	76
77	77	static TIMER_CALLBACK( crtc_interrupt_gen )
78	78	{
79		cpu_set_input_line(machine->cpu[0], 1, HOLD_LINE);
	79	cputag_set_input_line(machine, "maincpu", 1, HOLD_LINE);
80	80	if (param != 0)
81	81	timer_adjust_periodic(crtc_timer, attotime_div(video_screen_get_frame_period(machine->primary_screen), param), 0, attotime_div(video_screen_get_frame_period(machine->primary_screen), param));
82	82	}

src/mame/video/cloud9.c

r4679	r4680
38	38	static const int resistances[3] = { 22000, 10000, 4700 };
39	39
40	40	/* allocate second bank of videoram */
41		videoram = auto_malloc(0x8000);
	41	videoram = auto_alloc_array(machine, UINT8, 0x8000);
42	42	memory_set_bankptr(machine, 1, videoram);
43	43
44	44	/* get pointers to our PROMs */

src/mame/video/m3raster.c

r4679	r4680
1	1	static void draw_scanline_normal(void *dest, INT32 scanline, const poly_extent *extent, const void *extradata, int threadid)
2	2	{
3		const poly_extra_data *extra = extradata;
	3	const poly_extra_data *extra = (const poly_extra_data *)extradata;
4	4	const cached_texture *texture = extra->texture;
5		bitmap_t *destmap = dest;
	5	bitmap_t *destmap = (bitmap_t *)dest;
6	6	UINT16 *p = BITMAP_ADDR16(destmap, scanline, 0);
7	7	UINT32 *d = BITMAP_ADDR32(zbuffer, scanline, 0);
8	8	float ooz = extent->param[0].start;
r4679	r4680
49	49
50	50	static void draw_scanline_trans(void *dest, INT32 scanline, const poly_extent *extent, const void *extradata, int threadid)
51	51	{
52		const poly_extra_data *extra = extradata;
	52	const poly_extra_data *extra = (const poly_extra_data *)extradata;
53	53	const cached_texture *texture = extra->texture;
54		bitmap_t *destmap = dest;
	54	bitmap_t *destmap = (bitmap_t *)dest;
55	55	UINT16 *p = BITMAP_ADDR16(destmap, scanline, 0);
56	56	UINT32 *d = BITMAP_ADDR32(zbuffer, scanline, 0);
57	57	float ooz = extent->param[0].start;
r4679	r4680
104	104
105	105	static void draw_scanline_alpha(void *dest, INT32 scanline, const poly_extent *extent, const void *extradata, int threadid)
106	106	{
107		const poly_extra_data *extra = extradata;
	107	const poly_extra_data *extra = (const poly_extra_data *)extradata;
108	108	const cached_texture *texture = extra->texture;
109		bitmap_t *destmap = dest;
	109	bitmap_t *destmap = (bitmap_t *)dest;
110	110	UINT16 *p = BITMAP_ADDR16(destmap, scanline, 0);
111	111	UINT32 *d = BITMAP_ADDR32(zbuffer, scanline, 0);
112	112	float ooz = extent->param[0].start;
r4679	r4680
162	162
163	163	static void draw_scanline_alpha_test(void *dest, INT32 scanline, const poly_extent *extent, const void *extradata, int threadid)
164	164	{
165		const poly_extra_data *extra = extradata;
	165	const poly_extra_data *extra = (const poly_extra_data *)extradata;
166	166	const cached_texture *texture = extra->texture;
167		bitmap_t *destmap = dest;
	167	bitmap_t *destmap = (bitmap_t *)dest;
168	168	UINT16 *p = BITMAP_ADDR16(destmap, scanline, 0);
169	169	UINT32 *d = BITMAP_ADDR32(zbuffer, scanline, 0);
170	170	float ooz = extent->param[0].start;
r4679	r4680
222	222
223	223	static void draw_scanline_color(void *dest, INT32 scanline, const poly_extent *extent, const void *extradata, int threadid)
224	224	{
225		const poly_extra_data *extra = extradata;
226		bitmap_t *destmap = dest;
	225	const poly_extra_data *extra = (const poly_extra_data *)extradata;
	226	bitmap_t *destmap = (bitmap_t *)dest;
227	227	UINT16 *p = BITMAP_ADDR16(destmap, scanline, 0);
228	228	UINT32 *d = BITMAP_ADDR32(zbuffer, scanline, 0);
229	229	float ooz = extent->param[0].start;

src/mame/video/changela.c

r4679	r4680
30	30
31	31	VIDEO_START( changela )
32	32	{
33		memory_devices = auto_malloc(4 * 0x800); /* 0 - not connected, 1,2,3 - RAMs*/
34		tree_ram = auto_malloc(2 * 0x20);
	33	memory_devices = auto_alloc_array(machine, UINT8, 4 * 0x800); /* 0 - not connected, 1,2,3 - RAMs*/
	34	tree_ram = auto_alloc_array(machine, UINT8, 2 * 0x20);
35	35
36	36	obj0_bitmap  = video_screen_auto_bitmap_alloc(machine->primary_screen);
37	37	river_bitmap = video_screen_auto_bitmap_alloc(machine->primary_screen);

src/mame/video/crimfght.c

r4679	r4680
54	54
55	55	VIDEO_START( crimfght )
56	56	{
57		paletteram = auto_malloc(0x400);
	57	paletteram = auto_alloc_array(machine, UINT8, 0x400);
58	58
59	59	layer_colorbase[0] = 0;
60	60	layer_colorbase[1] = 4;

src/mame/video/wolfpack.c

r4679	r4680
123	123
124	124	int i;
125	125
126		LFSR = auto_malloc(0x8000);
	126	LFSR = auto_alloc_array(machine, UINT8, 0x8000);
127	127
128	128	helper = video_screen_auto_bitmap_alloc(machine->primary_screen);
129	129

src/mame/video/exerion.c

r4679	r4680
123	123	background_mixer = memory_region(machine, "proms") + 0x320;
124	124
125	125	/* allocate memory for the decoded background graphics */
126		background_gfx[0] = auto_malloc(2 * 256 * 256 * 4);
	126	background_gfx[0] = auto_alloc_array(machine, UINT16, 256 * 256 * 4);
127	127	background_gfx[1] = background_gfx[0] + 256 * 256;
128	128	background_gfx[2] = background_gfx[1] + 256 * 256;
129	129	background_gfx[3] = background_gfx[2] + 256 * 256;

src/mame/video/segas18.c

r4679	r4680
65	65	/* create a temp bitmap to draw the VDP data into */
66	66	width = video_screen_get_width(machine->primary_screen);
67	67	height = video_screen_get_height(machine->primary_screen);
68		tempbitmap = auto_bitmap_alloc(width, height, BITMAP_FORMAT_INDEXED16);
	68	tempbitmap = auto_bitmap_alloc(machine, width, height, BITMAP_FORMAT_INDEXED16);
69	69	}
70	70
71	71

src/mame/video/nmk16.c

r4679	r4680
101	101	{
102	102	bg_tilemap = tilemap_create(machine, macross_get_bg_tile_info,bg_scan,16,16,256,32);
103	103	tx_tilemap = tilemap_create(machine, macross_get_tx_tile_info,tilemap_scan_cols,8,8,32,32);
104		spriteram_old = auto_malloc(0x1000);
105		spriteram_old2 = auto_malloc(0x1000);
106		background_bitmap = auto_bitmap_alloc(8192,512,video_screen_get_format(machine->primary_screen));
	104	spriteram_old = auto_alloc_array_clear(machine, UINT16, 0x1000/2);
	105	spriteram_old2 = auto_alloc_array_clear(machine, UINT16, 0x1000/2);
	106	background_bitmap = auto_bitmap_alloc(machine,8192,512,video_screen_get_format(machine->primary_screen));
107	107
108	108	tilemap_set_transparent_pen(bg_tilemap,15);
109	109	tilemap_set_transparent_pen(tx_tilemap,15);
110	110	bioship_background_bank=0;
111	111	redraw_bitmap = 1;
112	112
113		memset(spriteram_old,0,0x1000);
114		memset(spriteram_old2,0,0x1000);
115
116	113	videoshift =  0;   /* 256x224 screen, no shift */
117	114	}
118	115
r4679	r4680
121	118	bg_tilemap = tilemap_create(machine, macross_get_bg_tile_info,bg_scan,16,16,256,32);
122	119	fg_tilemap = tilemap_create(machine, strahl_get_fg_tile_info, bg_scan,16,16,256,32);
123	120	tx_tilemap = tilemap_create(machine, macross_get_tx_tile_info,tilemap_scan_cols,8,8,32,32);
124		spriteram_old = auto_malloc(0x1000);
125		spriteram_old2 = auto_malloc(0x1000);
	121	spriteram_old = auto_alloc_array_clear(machine, UINT16, 0x1000/2);
	122	spriteram_old2 = auto_alloc_array_clear(machine, UINT16, 0x1000/2);
126	123
127	124	tilemap_set_transparent_pen(fg_tilemap,15);
128	125	tilemap_set_transparent_pen(tx_tilemap,15);
129	126
130		memset(spriteram_old,0,0x1000);
131		memset(spriteram_old2,0,0x1000);
132
133	127	videoshift =  0;   /* 256x224 screen, no shift */
134	128	background_bitmap = NULL;
135	129	}
r4679	r4680
138	132	{
139	133	bg_tilemap = tilemap_create(machine, macross_get_bg_tile_info,bg_scan,16,16,256,32);
140	134	tx_tilemap = tilemap_create(machine, macross_get_tx_tile_info,tilemap_scan_cols,8,8,32,32);
141		spriteram_old = auto_malloc(0x1000);
142		spriteram_old2 = auto_malloc(0x1000);
	135	spriteram_old = auto_alloc_array_clear(machine, UINT16, 0x1000/2);
	136	spriteram_old2 = auto_alloc_array_clear(machine, UINT16, 0x1000/2);
143	137
144	138	tilemap_set_transparent_pen(tx_tilemap,15);
145	139
146		memset(spriteram_old,0,0x1000);
147		memset(spriteram_old2,0,0x1000);
148
149	140	videoshift =  0;   /* 256x224 screen, no shift */
150	141	background_bitmap = NULL;
151	142	}
r4679	r4680
154	145	{
155	146	bg_tilemap = tilemap_create(machine, macross_get_bg_tile_info,bg_scan,16,16,256,32);
156	147	tx_tilemap = tilemap_create(machine, macross_get_tx_tile_info,tilemap_scan_cols,8,8,64,32);
157		spriteram_old = auto_malloc(0x1000);
158		spriteram_old2 = auto_malloc(0x1000);
	148	spriteram_old = auto_alloc_array_clear(machine, UINT16, 0x1000/2);
	149	spriteram_old2 = auto_alloc_array_clear(machine, UINT16, 0x1000/2);
159	150
160	151	tilemap_set_transparent_pen(tx_tilemap,15);
161	152	tilemap_set_scroll_rows(bg_tilemap,512);
162	153
163		memset(spriteram_old,0,0x1000);
164		memset(spriteram_old2,0,0x1000);
165
166	154	videoshift = 64;   /* 384x224 screen, leftmost 64 pixels have to be retrieved */
167	155	/* from the other side of the tilemap (!) */
168	156	background_bitmap = NULL;
r4679	r4680
172	160	{
173	161	bg_tilemap = tilemap_create(machine, macross_get_bg_tile_info,bg_scan,16,16,1024,128);
174	162	tx_tilemap = tilemap_create(machine, macross_get_tx_tile_info,tilemap_scan_cols,8,8,64,32);
175		spriteram_old = auto_malloc(0x1000);
176		spriteram_old2 = auto_malloc(0x1000);
	163	spriteram_old = auto_alloc_array_clear(machine, UINT16, 0x1000/2);
	164	spriteram_old2 = auto_alloc_array_clear(machine, UINT16, 0x1000/2);
177	165
178	166	tilemap_set_transparent_pen(tx_tilemap,15);
179	167
180		memset(spriteram_old,0,0x1000);
181		memset(spriteram_old2,0,0x1000);
182
183	168	videoshift = 64;   /* 384x224 screen, leftmost 64 pixels have to be retrieved */
184	169	/* from the other side of the tilemap (!) */
185	170	background_bitmap = NULL;
r4679	r4680
189	174	{
190	175	bg_tilemap = tilemap_create(machine, macross_get_bg_tile_info,bg_scan_td2,16,16,1024,32);
191	176	tx_tilemap = tilemap_create(machine, macross_get_tx_tile_info,tilemap_scan_cols,8,8,64,32);
192		spriteram_old = auto_malloc(0x1000);
193		spriteram_old2 = auto_malloc(0x1000);
	177	spriteram_old = auto_alloc_array_clear(machine, UINT16, 0x1000/2);
	178	spriteram_old2 = auto_alloc_array_clear(machine, UINT16, 0x1000/2);
194	179
195	180	tilemap_set_transparent_pen(tx_tilemap,15);
196	181
197		memset(spriteram_old,0,0x1000);
198		memset(spriteram_old2,0,0x1000);
199
200	182	videoshift = 64;   /* 384x224 screen, leftmost 64 pixels have to be retrieved */
201	183	/* from the other side of the tilemap (!) */
202	184	background_bitmap = NULL;
r4679	r4680
205	187	VIDEO_START( bjtwin )
206	188	{
207	189	bg_tilemap = tilemap_create(machine, bjtwin_get_bg_tile_info,tilemap_scan_cols,8,8,64,32);
208		spriteram_old = auto_malloc(0x1000);
209		spriteram_old2 = auto_malloc(0x1000);
	190	spriteram_old = auto_alloc_array_clear(machine, UINT16, 0x1000/2);
	191	spriteram_old2 = auto_alloc_array_clear(machine, UINT16, 0x1000/2);
210	192
211		memset(spriteram_old,0,0x1000);
212		memset(spriteram_old2,0,0x1000);
213
214	193	videoshift = 64;   /* 384x224 screen, leftmost 64 pixels have to be retrieved */
215	194	/* from the other side of the tilemap (!) */
216	195	background_bitmap = NULL;
r4679	r4680
224	203
225	204	***************************************************************************/
226	205
227		READ16_HANDLER( nmk_bgvideoram_r )
228		{
229		return nmk_bgvideoram[offset];
230		}
231
232	206	WRITE16_HANDLER( nmk_bgvideoram_w )
233	207	{
234	208	COMBINE_DATA(&nmk_bgvideoram[offset]);
235	209	tilemap_mark_tile_dirty(bg_tilemap,offset);
236	210	}
237	211
238		READ16_HANDLER( nmk_fgvideoram_r )
239		{
240		return nmk_fgvideoram[offset];
241		}
242
243	212	WRITE16_HANDLER( nmk_fgvideoram_w )
244	213	{
245		int oldword = nmk_fgvideoram[offset];
246		int newword = oldword;
247		COMBINE_DATA(&newword);
248
249		if (oldword != newword)
250		{
251		nmk_fgvideoram[offset] = newword;
252		tilemap_mark_tile_dirty(fg_tilemap,offset);
253		}
	214	COMBINE_DATA(&nmk_fgvideoram[offset]);
	215	tilemap_mark_tile_dirty(fg_tilemap,offset);
254	216	}
255	217
256		READ16_HANDLER( nmk_txvideoram_r )
257		{
258		return nmk_txvideoram[offset];
259		}
260
261	218	WRITE16_HANDLER( nmk_txvideoram_w )
262	219	{
263	220	COMBINE_DATA(&nmk_txvideoram[offset]);
r4679	r4680
860	817
861	818	VIDEO_START( afega )
862	819	{
863		spriteram_old = auto_malloc(0x1000);
864		spriteram_old2 = auto_malloc(0x1000);
865		memset(spriteram_old,0,0x1000);
866		memset(spriteram_old2,0,0x1000);
	820	spriteram_old = auto_alloc_array_clear(machine, UINT16, 0x1000/2);
	821	spriteram_old2 = auto_alloc_array_clear(machine, UINT16, 0x1000/2);
867	822
868
869	823	tilemap_0 = tilemap_create(   machine, get_tile_info_0_4bit, afega_tilemap_scan_pages,
870	824
871	825	16,16,
r4679	r4680
882	836
883	837	VIDEO_START( grdnstrm )
884	838	{
885		spriteram_old = auto_malloc(0x1000);
886		spriteram_old2 = auto_malloc(0x1000);
887		memset(spriteram_old,0,0x1000);
888		memset(spriteram_old2,0,0x1000);
	839	spriteram_old = auto_alloc_array_clear(machine, UINT16, 0x1000/2);
	840	spriteram_old2 = auto_alloc_array_clear(machine, UINT16, 0x1000/2);
889	841
890	842
891	843	tilemap_0 = tilemap_create(   machine, get_tile_info_0_8bit, afega_tilemap_scan_pages,
r4679	r4680
904	856
905	857	VIDEO_START( firehawk )
906	858	{
907		spriteram_old = auto_malloc(0x1000);
908		spriteram_old2 = auto_malloc(0x1000);
909		memset(spriteram_old,0,0x1000);
910		memset(spriteram_old2,0,0x1000);
	859	spriteram_old = auto_alloc_array_clear(machine, UINT16, 0x1000/2);
	860	spriteram_old2 = auto_alloc_array_clear(machine, UINT16, 0x1000/2);
911	861
912	862
913	863	tilemap_0 = tilemap_create(   machine, get_tile_info_0_8bit, firehawk_tilemap_scan_pages,

src/mame/video/m10.c

r4679	r4680
64	64
65	65	WRITE8_HANDLER( m10_chargen_w )
66	66	{
67		m10_state *state = space->machine->driver_data;
	67	m10_state *state = (m10_state *)space->machine->driver_data;
68	68
69	69	if (state->chargen[offset] != data)
70	70	{
r4679	r4680
76	76
77	77	WRITE8_HANDLER( m15_chargen_w )
78	78	{
79		m10_state *state = space->machine->driver_data;
	79	m10_state *state = (m10_state *)space->machine->driver_data;
80	80
81	81	if (state->chargen[offset] != data)
82	82	{
r4679	r4680
88	88
89	89	INLINE void plot_pixel_m10(running_machine *machine, bitmap_t *bm, int x, int y, int col)
90	90	{
91		m10_state *state = machine->driver_data;
	91	m10_state *state = (m10_state *)machine->driver_data;
92	92
93	93	if (!state->flip)
94	94	*BITMAP_ADDR16(bm, y, x) = col;
r4679	r4680
99	99
100	100	VIDEO_START( m10 )
101	101	{
102		m10_state *state = machine->driver_data;
	102	m10_state *state = (m10_state *)machine->driver_data;
103	103	int i;
104	104
105	105	for (i=0;i<32*8;i++)
r4679	r4680
118	118
119	119	VIDEO_START( m15 )
120	120	{
121		m10_state *state = machine->driver_data;
	121	m10_state *state = (m10_state *)machine->driver_data;
122	122
123	123	machine->gfx[0] = gfx_element_alloc(machine, &charlayout, state->chargen, 8, 0);
124	124
r4679	r4680
136	136	***************************************************************************/
137	137	VIDEO_UPDATE( m10 )
138	138	{
139		m10_state *state = screen->machine->driver_data;
	139	m10_state *state = (m10_state *)screen->machine->driver_data;
140	140	int offs;
141	141	static const int color[4]= { 3, 3, 5, 5 };
142	142	static const int xpos[4] = { 4*8, 26*8, 7*8, 6*8};
r4679	r4680
175	175	***************************************************************************/
176	176	VIDEO_UPDATE( m15 )
177	177	{
178		m10_state *state = screen->machine->driver_data;
	178	m10_state *state = (m10_state *)screen->machine->driver_data;
179	179	int offs;
180	180
181	181	for (offs = videoram_size - 1;offs >= 0;offs--)

src/mame/drivers/bfcobra.c

r4679	r4680
131	131	if (newstate != irq_state)
132	132	{
133	133	irq_state = newstate;
134		cpu_set_input_line(machine->cpu[0], 0, irq_state ? ASSERT_LINE : CLEAR_LINE);
	134	cputag_set_input_line(machine, "maincpu", 0, irq_state ? ASSERT_LINE : CLEAR_LINE);
135	135	}
136	136	}
137	137
r4679	r4680
1306	1306	***************************************************************************/
1307	1307
1308	1308	static ADDRESS_MAP_START( z80_prog_map, ADDRESS_SPACE_PROGRAM, 8 )
1309		AM_RANGE(0x0000, 0x3fff) AM_READ(SMH_BANK4)
1310		AM_RANGE(0x4000, 0x7fff) AM_READWRITE(SMH_BANK1, SMH_BANK1)
1311		AM_RANGE(0x8000, 0xbfff) AM_READWRITE(SMH_BANK2, SMH_BANK2)
1312		AM_RANGE(0xc000, 0xffff) AM_READWRITE(SMH_BANK3, SMH_BANK3)
	1309	AM_RANGE(0x0000, 0x3fff) AM_READ(SMH_BANK(4))
	1310	AM_RANGE(0x4000, 0x7fff) AM_READWRITE(SMH_BANK(1), SMH_BANK(1))
	1311	AM_RANGE(0x8000, 0xbfff) AM_READWRITE(SMH_BANK(2), SMH_BANK(2))
	1312	AM_RANGE(0xc000, 0xffff) AM_READWRITE(SMH_BANK(3), SMH_BANK(3))
1313	1313	ADDRESS_MAP_END
1314	1314
1315	1315	static ADDRESS_MAP_START( z80_io_map, ADDRESS_SPACE_IO, 8 )
r4679	r4680
1564	1564	/*
1565	1565	Allocate work RAM and video RAM shared by the Z80 and chipset.
1566	1566	*/
1567		static void init_ram(void)
	1567	static void init_ram(running_machine *machine)
1568	1568	{
1569	1569	/* 768kB work RAM */
1570		work_ram = auto_malloc(0xC0000);
	1570	work_ram = auto_alloc_array_clear(machine, UINT8, 0xC0000);
1571	1571
1572	1572	/* 128kB video RAM */
1573		video_ram = auto_malloc(0x20000);
1574
1575		memset(work_ram, 0, 0xc0000);
1576		memset(video_ram, 0, 0x20000);
	1573	video_ram = auto_alloc_array_clear(machine, UINT8, 0x20000);
1577	1574	}
1578	1575
1579	1576	/*
r4679	r4680
1620	1617
1621	1618	static WRITE_LINE_DEVICE_HANDLER( m6809_data_irq )
1622	1619	{
1623		cpu_set_input_line(device->machine->cpu[1], M6809_IRQ_LINE, state ? CLEAR_LINE : ASSERT_LINE);
	1620	cputag_set_input_line(device->machine, "audiocpu", M6809_IRQ_LINE, state ? CLEAR_LINE : ASSERT_LINE);
1624	1621	}
1625	1622
1626	1623	static ACIA6850_INTERFACE( m6809_acia_if )
r4679	r4680
1673	1670	UINT8 *rom;
1674	1671	UINT8 *tmp;
1675	1672
1676		tmp = malloc_or_die(0x8000);
	1673	tmp = alloc_array_or_die(UINT8, 0x8000);
1677	1674	rom = memory_region(machine, "audiocpu") + 0x8000;
1678	1675	memcpy(tmp, rom, 0x8000);
1679	1676
r4679	r4680
1695	1692
1696	1693	free(tmp);
1697	1694
1698		init_ram();
	1695	init_ram(machine);
1699	1696
1700	1697	bank[0] = 1;
1701	1698	bank[1] = 0;

src/mame/drivers/sbugger.c

r4679	r4680
115	115
116	116	/* memory maps */
117	117
118		static ADDRESS_MAP_START( readmem, ADDRESS_SPACE_PROGRAM, 8 )
119		AM_RANGE(0x0000, 0x37ff) AM_READ(SMH_ROM)
120		AM_RANGE(0xc800, 0xcfff) AM_READ(SMH_RAM) /* video ram */
121		AM_RANGE(0xe000, 0xe0ff) AM_READ(SMH_RAM) /* sp is set to e0ff  = iternal 8156 RAM*/
122		AM_RANGE(0xf400, 0xffff) AM_READ(SMH_RAM)
	118	static ADDRESS_MAP_START( sbugger_map, ADDRESS_SPACE_PROGRAM, 8 )
	119	AM_RANGE(0x0000, 0x37ff) AM_ROM
	120	AM_RANGE(0xc800, 0xcbff) AM_RAM_WRITE(sbugger_videoram_attr_w) AM_BASE(&sbugger_videoram_attr)
	121	AM_RANGE(0xcc00, 0xcfff) AM_RAM_WRITE(sbugger_videoram_w) AM_BASE(&sbugger_videoram)
	122	AM_RANGE(0xe000, 0xe0ff) AM_RAM /* sp is set to e0ff */
	123	AM_RANGE(0xf400, 0xffff) AM_RAM
123	124	ADDRESS_MAP_END
124	125
125		static ADDRESS_MAP_START( writemem, ADDRESS_SPACE_PROGRAM, 8 )
126		AM_RANGE(0x0000, 0x37ff) AM_WRITE(SMH_ROM)
127		AM_RANGE(0xc800, 0xcbff) AM_WRITE(sbugger_videoram_attr_w) AM_BASE(&sbugger_videoram_attr)
128		AM_RANGE(0xcc00, 0xcfff) AM_WRITE(sbugger_videoram_w) AM_BASE(&sbugger_videoram)
129		AM_RANGE(0xe000, 0xe0ff) AM_WRITE(SMH_RAM) /* sp is set to e0ff */
130		AM_RANGE(0xf400, 0xffff) AM_WRITE(SMH_RAM)
131		ADDRESS_MAP_END
132
133		static ADDRESS_MAP_START( readport, ADDRESS_SPACE_IO, 8 )
	126	static ADDRESS_MAP_START( sbugger_io_map, ADDRESS_SPACE_IO, 8 )
134	127	AM_RANGE(0xe0, 0xe0) AM_WRITENOP            // 8156 command/status reg (write c0 = command START = (start of timer)
135	128	AM_RANGE(0xe1, 0xe1) AM_READ_PORT("INPUTS")      // 8156 PA
136	129	AM_RANGE(0xe2, 0xe2) AM_READ_PORT("DSW1")      // 8156 PB
r4679	r4680
227	220
228	221	static MACHINE_DRIVER_START( sbugger )
229	222	MDRV_CPU_ADD("maincpu", 8085A, 6000000)        /* 3.00 MHz??? */
230		MDRV_CPU_PROGRAM_MAP(readmem,writemem)
231		MDRV_CPU_IO_MAP(readport,0)
	223	MDRV_CPU_PROGRAM_MAP(sbugger_map,0)
	224	MDRV_CPU_IO_MAP(sbugger_io_map,0)
232	225	MDRV_CPU_VBLANK_INT_HACK(irq3_line_hold,NUM_INTS_FRAME)
233	226
234	227	MDRV_GFXDECODE(sbugger)

src/mame/drivers/nycaptor.c

r4679	r4680
147	147
148	148
149	149	#include "driver.h"
150		#include "deprecat.h"
151	150	#include "cpu/z80/z80.h"
152	151	#include "cpu/m6805/m6805.h"
153	152	#include "sound/ay8910.h"
r4679	r4680
161	160
162	161	static WRITE8_HANDLER( sub_cpu_halt_w )
163	162	{
164		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_HALT, (data )? ASSERT_LINE : CLEAR_LINE);
	163	cputag_set_input_line(space->machine, "sub", INPUT_LINE_HALT, (data) ? ASSERT_LINE : CLEAR_LINE);
165	164	}
166	165
167	166	static UINT8 snd_data;
r4679	r4680
190	189
191	190	static READ8_HANDLER( nycaptor_b_r )
192	191	{
193		return 1;
	192	return 1;
194	193	}
195	194
196	195	static READ8_HANDLER( nycaptor_by_r )
197	196	{
198	197	int port=input_port_read(space->machine, "LIGHTY");
199	198	if(nyc_gametype == 1)
200		port = 255 - port;
201		return port - 8;
	199	port = 255 - port;
	200	return port - 8;
202	201	}
203	202
204	203	static READ8_HANDLER( nycaptor_bx_r )
205	204	{
206		return (input_port_read(space->machine, "LIGHTX") + 0x27) | 1;
	205	return (input_port_read(space->machine, "LIGHTX") + 0x27) | 1;
207	206	}
208	207
209	208
210	209	static WRITE8_HANDLER( sound_cpu_reset_w )
211	210	{
212		cpu_set_input_line(space->machine->cpu[2], INPUT_LINE_RESET, (data&1 )? ASSERT_LINE : CLEAR_LINE);
	211	cputag_set_input_line(space->machine, "audiocpu", INPUT_LINE_RESET, (data&1 )? ASSERT_LINE : CLEAR_LINE);
213	212	}
214	213
215	214	static int vol_ctrl[16];
r4679	r4680
233	232
234	233	static TIMER_CALLBACK( nmi_callback )
235	234	{
236		if (sound_nmi_enable) cpu_set_input_line(machine->cpu[2],INPUT_LINE_NMI,PULSE_LINE);
	235	if (sound_nmi_enable) cputag_set_input_line(machine, "audiocpu", INPUT_LINE_NMI, PULSE_LINE);
237	236	else pending_nmi = 1;
238	237	}
239	238
r4679	r4680
253	252	sound_nmi_enable = 1;
254	253	if (pending_nmi)
255	254	{
256		cpu_set_input_line(space->machine->cpu[2],INPUT_LINE_NMI,PULSE_LINE);
	255	cputag_set_input_line(space->machine, "audiocpu", INPUT_LINE_NMI, PULSE_LINE);
257	256	pending_nmi = 0;
258	257	}
259	258	}
r4679	r4680
290	289	memory_set_bankptr(space->machine, 1, memory_region(space->machine, "maincpu") + 0x10000 + ((data&0x08)>>3)*0x4000 );
291	290	}
292	291
293		static ADDRESS_MAP_START( readmem, ADDRESS_SPACE_PROGRAM, 8 )
294		AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM)
295		AM_RANGE(0x8000, 0xbfff) AM_READ(SMH_BANK1)
296		AM_RANGE(0xc000, 0xc7ff) AM_READ(nycaptor_videoram_r)
297		AM_RANGE(0xd000, 0xd000) AM_READ(nycaptor_mcu_r)
298		AM_RANGE(0xd002, 0xd002) AM_READ(nycaptor_generic_control_r)
299		AM_RANGE(0xd400, 0xd400) AM_READ(from_snd_r)
	292	static ADDRESS_MAP_START( nycaptor_master_map, ADDRESS_SPACE_PROGRAM, 8 )
	293	AM_RANGE(0x0000, 0x7fff) AM_ROM
	294	AM_RANGE(0x8000, 0xbfff) AM_ROMBANK(1)
	295	AM_RANGE(0xc000, 0xc7ff) AM_READ(nycaptor_videoram_r) AM_WRITE(nycaptor_videoram_w) AM_BASE(&videoram) AM_SIZE(&videoram_size)
	296	AM_RANGE(0xd000, 0xd000) AM_READ(nycaptor_mcu_r) AM_WRITE(nycaptor_mcu_w)
	297	AM_RANGE(0xd001, 0xd001) AM_WRITE(sub_cpu_halt_w)
	298	AM_RANGE(0xd002, 0xd002) AM_READ(nycaptor_generic_control_r) AM_WRITE(nycaptor_generic_control_w)   /* bit 3 - memory bank at 0x8000-0xbfff */
	299	AM_RANGE(0xd400, 0xd400) AM_READ(from_snd_r) AM_WRITE(sound_command_w)
300	300	AM_RANGE(0xd401, 0xd401) AM_READNOP
	301	AM_RANGE(0xd403, 0xd403) AM_WRITE(sound_cpu_reset_w)
301	302	AM_RANGE(0xd800, 0xd800) AM_READ_PORT("DSW0")
302	303	AM_RANGE(0xd801, 0xd801) AM_READ_PORT("DSW1")
303	304	AM_RANGE(0xd802, 0xd802) AM_READ_PORT("DSW2")
r4679	r4680
306	307	AM_RANGE(0xd805, 0xd805) AM_READ(nycaptor_mcu_status_r1)
307	308	AM_RANGE(0xd806, 0xd806) AM_READNOP /* unknown ?sound? */
308	309	AM_RANGE(0xd807, 0xd807) AM_READ(nycaptor_mcu_status_r2)
309		AM_RANGE(0xdc00, 0xdc9f) AM_READ(nycaptor_spriteram_r)
310		AM_RANGE(0xdca0, 0xdcbf) AM_READ(nycaptor_scrlram_r)
311		AM_RANGE(0xdd00, 0xdeff) AM_READ(nycaptor_palette_r)
312		AM_RANGE(0xdf03, 0xdf03) AM_READ(nycaptor_gfxctrl_r)
313		AM_RANGE(0xe000, 0xffff) AM_READ(nycaptor_sharedram_r)
314		ADDRESS_MAP_END
315
316		static ADDRESS_MAP_START( writemem, ADDRESS_SPACE_PROGRAM, 8 )
317		AM_RANGE(0x0000, 0xbfff) AM_WRITE(SMH_ROM)
318		AM_RANGE(0xc000, 0xc7ff) AM_WRITE(nycaptor_videoram_w) AM_BASE(&videoram) AM_SIZE(&videoram_size)
319		AM_RANGE(0xd000, 0xd000) AM_WRITE(nycaptor_mcu_w)
320		AM_RANGE(0xd001, 0xd001) AM_WRITE(sub_cpu_halt_w)
321		AM_RANGE(0xd002, 0xd002) AM_WRITE(nycaptor_generic_control_w)   /* bit 3 - memory bank at 0x8000-0xbfff */
322		AM_RANGE(0xd400, 0xd400) AM_WRITE(sound_command_w)
323		AM_RANGE(0xd403, 0xd403) AM_WRITE(sound_cpu_reset_w)
324		AM_RANGE(0xdc00, 0xdc9f) AM_WRITE(nycaptor_spriteram_w)
325		AM_RANGE(0xdca0, 0xdcbf) AM_WRITE(nycaptor_scrlram_w) AM_BASE(&nycaptor_scrlram)
	310	AM_RANGE(0xdc00, 0xdc9f) AM_READ(nycaptor_spriteram_r) AM_WRITE(nycaptor_spriteram_w)
	311	AM_RANGE(0xdca0, 0xdcbf) AM_READ(nycaptor_scrlram_r) AM_WRITE(nycaptor_scrlram_w) AM_BASE(&nycaptor_scrlram)
326	312	AM_RANGE(0xdce1, 0xdce1) AM_WRITENOP
327		AM_RANGE(0xdd00, 0xdeff) AM_WRITE(nycaptor_palette_w)
328		AM_RANGE(0xdf03, 0xdf03) AM_WRITE(nycaptor_gfxctrl_w)
329		AM_RANGE(0xe000, 0xffff) AM_WRITE(nycaptor_sharedram_w) AM_BASE(&nycaptor_sharedram)
	313	AM_RANGE(0xdd00, 0xdeff) AM_READ(nycaptor_palette_r) AM_WRITE(nycaptor_palette_w)
	314	AM_RANGE(0xdf03, 0xdf03) AM_READ(nycaptor_gfxctrl_r) AM_WRITE(nycaptor_gfxctrl_w)
	315	AM_RANGE(0xe000, 0xffff) AM_READ(nycaptor_sharedram_r)  AM_WRITE(nycaptor_sharedram_w) AM_BASE(&nycaptor_sharedram)
330	316	ADDRESS_MAP_END
331	317
332
333		static ADDRESS_MAP_START( readmem_sub, ADDRESS_SPACE_PROGRAM, 8 )
334		AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM)
	318	static ADDRESS_MAP_START( nycaptor_slave_map, ADDRESS_SPACE_PROGRAM, 8 )
	319	AM_RANGE(0x0000, 0x7fff) AM_ROM
	320	AM_RANGE(0xc000, 0xc7ff) AM_READ(nycaptor_videoram_r) AM_WRITE(nycaptor_videoram_w) AM_BASE(&videoram) AM_SIZE(&videoram_size)
335	321	AM_RANGE(0xd800, 0xd800) AM_READ_PORT("DSW0")
336	322	AM_RANGE(0xd801, 0xd801) AM_READ_PORT("DSW1")
337	323	AM_RANGE(0xd802, 0xd802) AM_READ_PORT("DSW2")
338	324	AM_RANGE(0xd803, 0xd803) AM_READ_PORT("IN0")
339	325	AM_RANGE(0xd804, 0xd804) AM_READ_PORT("IN1")
340		AM_RANGE(0xdc00, 0xdc9f) AM_READ(nycaptor_spriteram_r)
341		AM_RANGE(0xdd00, 0xdeff) AM_READ(nycaptor_palette_r)
	326	AM_RANGE(0xdc00, 0xdc9f) AM_READ(nycaptor_spriteram_r) AM_WRITE(nycaptor_spriteram_w)
	327	AM_RANGE(0xdca0, 0xdcbf) AM_WRITE(nycaptor_scrlram_w) AM_BASE(&nycaptor_scrlram)
	328
	329	AM_RANGE(0xdd00, 0xdeff) AM_READ(nycaptor_palette_r) AM_WRITE(nycaptor_palette_w)
342	330	AM_RANGE(0xdf00, 0xdf00) AM_READ(nycaptor_bx_r)
343	331	AM_RANGE(0xdf01, 0xdf01) AM_READ(nycaptor_by_r)
344	332	AM_RANGE(0xdf02, 0xdf02) AM_READ(nycaptor_b_r)
345		AM_RANGE(0xdf03, 0xdf03) AM_READ(nycaptor_gfxctrl_r)
346		AM_RANGE(0xe000, 0xffff) AM_READ(nycaptor_sharedram_r)
	333	AM_RANGE(0xdf03, 0xdf03) AM_READ(nycaptor_gfxctrl_r) AM_WRITENOP/* ? gfx control ? */
	334	AM_RANGE(0xe000, 0xffff) AM_READ(nycaptor_sharedram_r) AM_WRITE(nycaptor_sharedram_w)
347	335	ADDRESS_MAP_END
348	336
349
350		static ADDRESS_MAP_START( writemem_sub, ADDRESS_SPACE_PROGRAM, 8 )
351		AM_RANGE(0x0000, 0xbfff) AM_WRITE(SMH_ROM)
352		AM_RANGE(0xc000, 0xc7ff) AM_WRITE(nycaptor_videoram_w) AM_BASE(&videoram) AM_SIZE(&videoram_size)
353		AM_RANGE(0xdc00, 0xdc9f) AM_WRITE(nycaptor_spriteram_w)
354		AM_RANGE(0xdca0, 0xdcbf) AM_WRITE(nycaptor_scrlram_w) AM_BASE(&nycaptor_scrlram)
355		AM_RANGE(0xdd00, 0xdeff) AM_WRITE(nycaptor_palette_w)
356		AM_RANGE(0xdf03, 0xdf03) AM_WRITENOP/* ? gfx control ? */
357		AM_RANGE(0xe000, 0xffff) AM_WRITE(nycaptor_sharedram_w)
358		ADDRESS_MAP_END
359
360		static ADDRESS_MAP_START( sound_readmem, ADDRESS_SPACE_PROGRAM, 8 )
361		AM_RANGE(0x0000, 0xbfff) AM_READ(SMH_ROM)
362		AM_RANGE(0xc000, 0xc7ff) AM_READ(SMH_RAM)
363		AM_RANGE(0xd000, 0xd000) AM_READ(soundlatch_r)
364		AM_RANGE(0xd200, 0xd200) AM_READNOP
365		AM_RANGE(0xe000, 0xefff) AM_READNOP
366		ADDRESS_MAP_END
367
368		static ADDRESS_MAP_START( sound_writemem, ADDRESS_SPACE_PROGRAM, 8 )
369		AM_RANGE(0x0000, 0xbfff) AM_WRITE(SMH_ROM)
370		AM_RANGE(0xc000, 0xc7ff) AM_WRITE(SMH_RAM)
	337	static ADDRESS_MAP_START( nycaptor_sound_map, ADDRESS_SPACE_PROGRAM, 8 )
	338	AM_RANGE(0x0000, 0xbfff) AM_ROM
	339	AM_RANGE(0xc000, 0xc7ff) AM_RAM
371	340	AM_RANGE(0xc800, 0xc801) AM_DEVWRITE("ay1", ay8910_address_data_w)
372	341	AM_RANGE(0xc802, 0xc803) AM_DEVWRITE("ay2", ay8910_address_data_w)
373	342	AM_RANGE(0xc900, 0xc90d) AM_DEVWRITE("msm", msm5232_w)
374	343	AM_RANGE(0xca00, 0xca00) AM_WRITENOP
375	344	AM_RANGE(0xcb00, 0xcb00) AM_WRITENOP
376	345	AM_RANGE(0xcc00, 0xcc00) AM_WRITENOP
377		AM_RANGE(0xd000, 0xd000) AM_WRITE(to_main_w)
378		AM_RANGE(0xd200, 0xd200) AM_WRITE(nmi_enable_w)
	346	AM_RANGE(0xd000, 0xd000) AM_READ(soundlatch_r) AM_WRITE(to_main_w)
	347	AM_RANGE(0xd200, 0xd200) AM_READNOP AM_WRITE(nmi_enable_w)
379	348	AM_RANGE(0xd400, 0xd400) AM_WRITE(nmi_disable_w)
380	349	AM_RANGE(0xd600, 0xd600) AM_WRITENOP
381		AM_RANGE(0xe000, 0xefff) AM_WRITENOP
	350	AM_RANGE(0xe000, 0xefff) AM_NOP
382	351	ADDRESS_MAP_END
383	352
384		static ADDRESS_MAP_START( m68705_readmem, ADDRESS_SPACE_PROGRAM, 8 )
	353	static ADDRESS_MAP_START( nycaptor_m68705_map, ADDRESS_SPACE_PROGRAM, 8 )
385	354	ADDRESS_MAP_GLOBAL_MASK(0x7ff)
386		AM_RANGE(0x0000, 0x0000) AM_READ(nycaptor_68705_portA_r)
387		AM_RANGE(0x0001, 0x0001) AM_READ(nycaptor_68705_portB_r)
388		AM_RANGE(0x0002, 0x0002) AM_READ(nycaptor_68705_portC_r)
389		AM_RANGE(0x0010, 0x007f) AM_READ(SMH_RAM)
390		AM_RANGE(0x0080, 0x07ff) AM_READ(SMH_ROM)
391		ADDRESS_MAP_END
392
393		static ADDRESS_MAP_START( m68705_writemem, ADDRESS_SPACE_PROGRAM, 8 )
394		ADDRESS_MAP_GLOBAL_MASK(0x7ff)
395		AM_RANGE(0x0000, 0x0000) AM_WRITE(nycaptor_68705_portA_w)
396		AM_RANGE(0x0001, 0x0001) AM_WRITE(nycaptor_68705_portB_w)
397		AM_RANGE(0x0002, 0x0002) AM_WRITE(nycaptor_68705_portC_w)
	355	AM_RANGE(0x0000, 0x0000) AM_READWRITE(nycaptor_68705_portA_r,nycaptor_68705_portA_w)
	356	AM_RANGE(0x0001, 0x0001) AM_READWRITE(nycaptor_68705_portB_r,nycaptor_68705_portB_w)
	357	AM_RANGE(0x0002, 0x0002) AM_READWRITE(nycaptor_68705_portC_r,nycaptor_68705_portC_w)
398	358	AM_RANGE(0x0004, 0x0004) AM_WRITE(nycaptor_68705_ddrA_w)
399	359	AM_RANGE(0x0005, 0x0005) AM_WRITE(nycaptor_68705_ddrB_w)
400	360	AM_RANGE(0x0006, 0x0006) AM_WRITE(nycaptor_68705_ddrC_w)
401		AM_RANGE(0x0010, 0x007f) AM_WRITE(SMH_RAM)
402		AM_RANGE(0x0080, 0x07ff) AM_WRITE(SMH_ROM)
	361	AM_RANGE(0x0010, 0x007f) AM_RAM
	362	AM_RANGE(0x0080, 0x07ff) AM_ROM
403	363	ADDRESS_MAP_END
404	364
405	365
r4679	r4680
434	394	}
435	395
436	396
437		static ADDRESS_MAP_START( cyclshtg_readmem, ADDRESS_SPACE_PROGRAM, 8 )
438		AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM)
439		AM_RANGE(0x8000, 0xbfff) AM_READ(SMH_BANK1)
440		AM_RANGE(0xc000, 0xcfff) AM_READ(nycaptor_videoram_r)
441		AM_RANGE(0xd000, 0xd000) AM_READ(cyclshtg_mcu_r)
442		AM_RANGE(0xd002, 0xd002) AM_READ(nycaptor_generic_control_r)
443		AM_RANGE(0xd400, 0xd400) AM_READ(from_snd_r)
	397	static ADDRESS_MAP_START( cyclshtg_master_map, ADDRESS_SPACE_PROGRAM, 8 )
	398	AM_RANGE(0x0000, 0x7fff) AM_ROM
	399	AM_RANGE(0x8000, 0xbfff) AM_ROMBANK(1)
	400	AM_RANGE(0xc000, 0xcfff) AM_READ(nycaptor_videoram_r) AM_WRITE(nycaptor_videoram_w) AM_BASE(&videoram) AM_SIZE(&videoram_size)
	401	AM_RANGE(0xd000, 0xd000) AM_READ(cyclshtg_mcu_r) AM_WRITE(cyclshtg_mcu_w)
	402	AM_RANGE(0xd001, 0xd001) AM_WRITE(sub_cpu_halt_w)
	403	AM_RANGE(0xd002, 0xd002) AM_READ(nycaptor_generic_control_r) AM_WRITE(cyclshtg_generic_control_w)
	404	AM_RANGE(0xd400, 0xd400) AM_READ(from_snd_r) AM_WRITE(sound_command_w)
	405	AM_RANGE(0xd403, 0xd403) AM_WRITE(sound_cpu_reset_w)
444	406	AM_RANGE(0xd800, 0xd800) AM_READ_PORT("DSW0")
445	407	AM_RANGE(0xd801, 0xd801) AM_READ_PORT("DSW1")
446	408	AM_RANGE(0xd802, 0xd802) AM_READ_PORT("DSW2")
r4679	r4680
449	411	AM_RANGE(0xd805, 0xd805) AM_READ(cyclshtg_mcu_status_r)
450	412	AM_RANGE(0xd806, 0xd806) AM_READNOP
451	413	AM_RANGE(0xd807, 0xd807) AM_READ(cyclshtg_mcu_status_r)
452		AM_RANGE(0xdc00, 0xdc9f) AM_READ(nycaptor_spriteram_r)
453		AM_RANGE(0xdca0, 0xdcbf) AM_READ(nycaptor_scrlram_r)
454		AM_RANGE(0xdd00, 0xdeff) AM_READ(nycaptor_palette_r)
455		AM_RANGE(0xdf03, 0xdf03) AM_READ(nycaptor_gfxctrl_r)
456		AM_RANGE(0xe000, 0xffff) AM_READ(nycaptor_sharedram_r)
457		ADDRESS_MAP_END
458
459		static ADDRESS_MAP_START( cyclshtg_writemem, ADDRESS_SPACE_PROGRAM, 8 )
460		AM_RANGE(0x0000, 0xbfff) AM_WRITE(SMH_ROM)
461		AM_RANGE(0xc000, 0xcfff) AM_WRITE(nycaptor_videoram_w) AM_BASE(&videoram) AM_SIZE(&videoram_size)
462		AM_RANGE(0xd000, 0xd000) AM_WRITE(cyclshtg_mcu_w)
463		AM_RANGE(0xd001, 0xd001) AM_WRITE(sub_cpu_halt_w)
464		AM_RANGE(0xd002, 0xd002) AM_WRITE(cyclshtg_generic_control_w)
465		AM_RANGE(0xd400, 0xd400) AM_WRITE(sound_command_w)
466		AM_RANGE(0xd403, 0xd403) AM_WRITE(sound_cpu_reset_w)
467		AM_RANGE(0xdc00, 0xdc9f) AM_WRITE(nycaptor_spriteram_w)
468		AM_RANGE(0xdca0, 0xdcbf) AM_WRITE(nycaptor_scrlram_w) AM_BASE(&nycaptor_scrlram)
	414	AM_RANGE(0xdc00, 0xdc9f) AM_READ(nycaptor_spriteram_r) AM_WRITE(nycaptor_spriteram_w)
	415	AM_RANGE(0xdca0, 0xdcbf) AM_READ(nycaptor_scrlram_r) AM_WRITE(nycaptor_scrlram_w) AM_BASE(&nycaptor_scrlram)
469	416	AM_RANGE(0xdce1, 0xdce1) AM_WRITENOP
470		AM_RANGE(0xdd00, 0xdeff) AM_WRITE(nycaptor_palette_w)
471		AM_RANGE(0xdf03, 0xdf03) AM_WRITE(nycaptor_gfxctrl_w)
472		AM_RANGE(0xe000, 0xffff) AM_WRITE(nycaptor_sharedram_w) AM_BASE(&nycaptor_sharedram)
	417	AM_RANGE(0xdd00, 0xdeff) AM_READ(nycaptor_palette_r) AM_WRITE(nycaptor_palette_w)
	418	AM_RANGE(0xdf03, 0xdf03) AM_READ(nycaptor_gfxctrl_r) AM_WRITE(nycaptor_gfxctrl_w)
	419	AM_RANGE(0xe000, 0xffff) AM_READ(nycaptor_sharedram_r) AM_WRITE(nycaptor_sharedram_w) AM_BASE(&nycaptor_sharedram)
473	420	ADDRESS_MAP_END
474	421
475
476		static ADDRESS_MAP_START( cyclshtg_readmem_sub, ADDRESS_SPACE_PROGRAM, 8 )
477		AM_RANGE(0x0000, 0xbfff) AM_READ(SMH_ROM)
	422	static ADDRESS_MAP_START( cyclshtg_slave_map, ADDRESS_SPACE_PROGRAM, 8 )
	423	AM_RANGE(0x0000, 0xbfff) AM_ROM
	424	AM_RANGE(0xc000, 0xcfff) AM_READ(nycaptor_videoram_r) AM_WRITE(nycaptor_videoram_w) AM_BASE(&videoram) AM_SIZE(&videoram_size)
478	425	AM_RANGE(0xd800, 0xd800) AM_READ_PORT("DSW0")
479	426	AM_RANGE(0xd801, 0xd801) AM_READ_PORT("DSW1")
480	427	AM_RANGE(0xd802, 0xd802) AM_READ_PORT("DSW2")
481	428	AM_RANGE(0xd803, 0xd803) AM_READ_PORT("IN0")
482	429	AM_RANGE(0xd804, 0xd804) AM_READ_PORT("IN1")
483		AM_RANGE(0xdc00, 0xdc9f) AM_READ(nycaptor_spriteram_r)
484		AM_RANGE(0xdd00, 0xdeff) AM_READ(nycaptor_palette_r)
	430	AM_RANGE(0xdc00, 0xdc9f) AM_READ(nycaptor_spriteram_r) AM_WRITE(nycaptor_spriteram_w)
	431	AM_RANGE(0xdca0, 0xdcbf) AM_WRITE(nycaptor_scrlram_w) AM_BASE(&nycaptor_scrlram)
	432	AM_RANGE(0xdd00, 0xdeff) AM_READ(nycaptor_palette_r) AM_WRITE(nycaptor_palette_w)
485	433	AM_RANGE(0xdf00, 0xdf00) AM_READ(nycaptor_bx_r)
486	434	AM_RANGE(0xdf01, 0xdf01) AM_READ(nycaptor_by_r)
487	435	AM_RANGE(0xdf02, 0xdf02) AM_READ(nycaptor_b_r)
488	436	AM_RANGE(0xdf03, 0xdf03) AM_READ(nycaptor_gfxctrl_r)
489		AM_RANGE(0xe000, 0xffff) AM_READ(nycaptor_sharedram_r)
490		ADDRESS_MAP_END
491
492		static ADDRESS_MAP_START( cyclshtg_writemem_sub, ADDRESS_SPACE_PROGRAM, 8 )
493		AM_RANGE(0x0000, 0xbfff) AM_WRITE(SMH_ROM)
494		AM_RANGE(0xc000, 0xc7ff) AM_WRITE(nycaptor_videoram_w) AM_BASE(&videoram) AM_SIZE(&videoram_size)
495		AM_RANGE(0xdc00, 0xdc9f) AM_WRITE(nycaptor_spriteram_w)
496		AM_RANGE(0xdca0, 0xdcbf) AM_WRITE(nycaptor_scrlram_w) AM_BASE(&nycaptor_scrlram)
497		AM_RANGE(0xdd00, 0xdeff) AM_WRITE(nycaptor_palette_w)
498	437	AM_RANGE(0xdf03, 0xdf03) AM_WRITENOP
499		AM_RANGE(0xe000, 0xffff) AM_WRITE(nycaptor_sharedram_w)
	438	AM_RANGE(0xe000, 0xffff) AM_READ(nycaptor_sharedram_r) AM_WRITE(nycaptor_sharedram_w)
500	439	ADDRESS_MAP_END
501	440
502	441	static READ8_HANDLER(unk_r)
r4679	r4680
504	443	return mame_rand(space->machine);
505	444	}
506	445
507		static ADDRESS_MAP_START( bronx_readmem, ADDRESS_SPACE_PROGRAM, 8 )
508		AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM)
509		AM_RANGE(0x8000, 0xbfff) AM_READ(SMH_BANK1)
510		AM_RANGE(0xc000, 0xcfff) AM_READ(nycaptor_videoram_r)
511		AM_RANGE(0xd000, 0xd000) AM_READ(cyclshtg_mcu_r)
512		AM_RANGE(0xd002, 0xd002) AM_READ(nycaptor_generic_control_r)
513		AM_RANGE(0xd400, 0xd400) AM_READ(from_snd_r)
	446	static ADDRESS_MAP_START( bronx_master_map, ADDRESS_SPACE_PROGRAM, 8 )
	447	AM_RANGE(0x0000, 0x7fff) AM_ROM
	448	AM_RANGE(0x8000, 0xbfff) AM_ROMBANK(1)
	449	AM_RANGE(0xc000, 0xc7ff) AM_READ(nycaptor_videoram_r) AM_WRITE(nycaptor_videoram_w) AM_BASE(&videoram) AM_SIZE(&videoram_size)
	450	AM_RANGE(0xd000, 0xd000) AM_READ(cyclshtg_mcu_r) AM_WRITENOP
	451	AM_RANGE(0xd001, 0xd001) AM_WRITE(sub_cpu_halt_w)
	452	AM_RANGE(0xd002, 0xd002) AM_READ(nycaptor_generic_control_r) AM_WRITE(cyclshtg_generic_control_w)
	453	AM_RANGE(0xd400, 0xd400) AM_READ(from_snd_r) AM_WRITE(sound_command_w)
514	454	AM_RANGE(0xd401, 0xd401) AM_READ(unk_r)
	455	AM_RANGE(0xd403, 0xd403) AM_WRITE(sound_cpu_reset_w)
515	456	AM_RANGE(0xd800, 0xd800) AM_READ_PORT("DSW0")
516	457	AM_RANGE(0xd801, 0xd801) AM_READ_PORT("DSW1")
517	458	AM_RANGE(0xd802, 0xd802) AM_READ_PORT("DSW2")
r4679	r4680
520	461	AM_RANGE(0xd805, 0xd805) AM_READ(cyclshtg_mcu_status_r)
521	462	AM_RANGE(0xd806, 0xd806) AM_READNOP
522	463	AM_RANGE(0xd807, 0xd807) AM_READ(cyclshtg_mcu_status_r)
523		AM_RANGE(0xdc00, 0xdc9f) AM_READ(nycaptor_spriteram_r)
524		AM_RANGE(0xdca0, 0xdcbf) AM_READ(nycaptor_scrlram_r)
525		AM_RANGE(0xdd00, 0xdeff) AM_READ(nycaptor_palette_r)
526		AM_RANGE(0xdf03, 0xdf03) AM_READ(nycaptor_gfxctrl_r)
527		AM_RANGE(0xe000, 0xffff) AM_READ(nycaptor_sharedram_r)
	464	AM_RANGE(0xdc00, 0xdc9f) AM_READ(nycaptor_spriteram_r) AM_WRITE(nycaptor_spriteram_w)
	465	AM_RANGE(0xdca0, 0xdcbf) AM_READ(nycaptor_scrlram_r) AM_RANGE(0xdca0, 0xdcbf) AM_WRITE(nycaptor_scrlram_w) AM_BASE(&nycaptor_scrlram)
	466	AM_RANGE(0xdd00, 0xdeff) AM_READ(nycaptor_palette_r) AM_WRITE(nycaptor_palette_w)
	467	AM_RANGE(0xdf03, 0xdf03) AM_READ(nycaptor_gfxctrl_r) AM_WRITE(nycaptor_gfxctrl_w)
	468	AM_RANGE(0xe000, 0xffff) AM_READ(nycaptor_sharedram_r) AM_WRITE(nycaptor_sharedram_w) AM_BASE(&nycaptor_sharedram)
528	469	ADDRESS_MAP_END
529	470
530		static ADDRESS_MAP_START( bronx_writemem, ADDRESS_SPACE_PROGRAM, 8 )
531		AM_RANGE(0x0000, 0xbfff) AM_WRITE(SMH_ROM)
532		AM_RANGE(0xc000, 0xcfff) AM_WRITE(nycaptor_videoram_w) AM_BASE(&videoram) AM_SIZE(&videoram_size)
533		AM_RANGE(0xd000, 0xd000) AM_WRITENOP
534		AM_RANGE(0xd001, 0xd001) AM_WRITE(sub_cpu_halt_w)
535		AM_RANGE(0xd002, 0xd002) AM_WRITE(cyclshtg_generic_control_w)
536		AM_RANGE(0xd400, 0xd400) AM_WRITE(sound_command_w)
537		AM_RANGE(0xd403, 0xd403) AM_WRITE(sound_cpu_reset_w)
538		AM_RANGE(0xdc00, 0xdc9f) AM_WRITE(nycaptor_spriteram_w)
539		AM_RANGE(0xdca0, 0xdcbf) AM_WRITE(nycaptor_scrlram_w) AM_BASE(&nycaptor_scrlram)
540		AM_RANGE(0xdd00, 0xdeff) AM_WRITE(nycaptor_palette_w)
541		AM_RANGE(0xdf03, 0xdf03) AM_WRITE(nycaptor_gfxctrl_w)
542		AM_RANGE(0xe000, 0xffff) AM_WRITE(nycaptor_sharedram_w) AM_BASE(&nycaptor_sharedram)
543		ADDRESS_MAP_END
544
545		static ADDRESS_MAP_START( bronx_io, ADDRESS_SPACE_IO, 8 )
546		AM_RANGE(0x0000, 0x7fff) AM_ROM AM_REGION("user1", 0)
547		ADDRESS_MAP_END
548
549		static ADDRESS_MAP_START( bronx_readmem_sub, ADDRESS_SPACE_PROGRAM, 8 )
550		AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM)
	471	static ADDRESS_MAP_START( bronx_slave_map, ADDRESS_SPACE_PROGRAM, 8 )
	472	AM_RANGE(0x0000, 0x7fff) AM_ROM
	473	AM_RANGE(0xc000, 0xc7ff) AM_READ(nycaptor_videoram_r) AM_WRITE(nycaptor_videoram_w) AM_BASE(&videoram) AM_SIZE(&videoram_size)
551	474	AM_RANGE(0xd800, 0xd800) AM_READ_PORT("DSW0")
552	475	AM_RANGE(0xd801, 0xd801) AM_READ_PORT("DSW1")
553	476	AM_RANGE(0xd802, 0xd802) AM_READ_PORT("DSW2")
r4679	r4680
555	478	AM_RANGE(0xd804, 0xd804) AM_READ_PORT("IN1")
556	479	AM_RANGE(0xd805, 0xd805) AM_READ(cyclshtg_mcu_status_r1)
557	480	AM_RANGE(0xd807, 0xd807) AM_READ(cyclshtg_mcu_status_r)
558		AM_RANGE(0xdc00, 0xdc9f) AM_READ(nycaptor_spriteram_r)
559		AM_RANGE(0xdd00, 0xdeff) AM_READ(nycaptor_palette_r)
	481	AM_RANGE(0xdc00, 0xdc9f) AM_READ(nycaptor_spriteram_r) AM_WRITE(nycaptor_spriteram_w)
	482	AM_RANGE(0xdca0, 0xdcbf) AM_WRITE(nycaptor_scrlram_w) AM_BASE(&nycaptor_scrlram)
	483	AM_RANGE(0xdd00, 0xdeff) AM_READ(nycaptor_palette_r) AM_WRITE(nycaptor_palette_w)
560	484	AM_RANGE(0xdf00, 0xdf00) AM_READ(nycaptor_bx_r)
561	485	AM_RANGE(0xdf01, 0xdf01) AM_READ(nycaptor_by_r)
562	486	AM_RANGE(0xdf02, 0xdf02) AM_READ(nycaptor_b_r)
563		AM_RANGE(0xdf03, 0xdf03) AM_READ(nycaptor_gfxctrl_r)
564		AM_RANGE(0xe000, 0xffff) AM_READ(nycaptor_sharedram_r)
	487	AM_RANGE(0xdf03, 0xdf03) AM_READ(nycaptor_gfxctrl_r) AM_WRITE(nycaptor_gfxctrl_w)
	488	AM_RANGE(0xe000, 0xffff) AM_READ(nycaptor_sharedram_r) AM_WRITE(nycaptor_sharedram_w)
565	489	ADDRESS_MAP_END
566	490
567		static ADDRESS_MAP_START( bronx_writemem_sub, ADDRESS_SPACE_PROGRAM, 8 )
568		AM_RANGE(0x0000, 0xbfff) AM_WRITE(SMH_ROM)
569		AM_RANGE(0xc000, 0xc7ff) AM_WRITE(nycaptor_videoram_w) AM_BASE(&videoram) AM_SIZE(&videoram_size)
570		AM_RANGE(0xdc00, 0xdc9f) AM_WRITE(nycaptor_spriteram_w)
571		AM_RANGE(0xdca0, 0xdcbf) AM_WRITE(nycaptor_scrlram_w) AM_BASE(&nycaptor_scrlram)
572		AM_RANGE(0xdd00, 0xdeff) AM_WRITE(nycaptor_palette_w)
573		AM_RANGE(0xdf03, 0xdf03) AM_WRITE(nycaptor_gfxctrl_w)
574		AM_RANGE(0xe000, 0xffff) AM_WRITE(nycaptor_sharedram_w)
	491	static ADDRESS_MAP_START( bronx_slave_io_map, ADDRESS_SPACE_IO, 8 )
	492	AM_RANGE(0x0000, 0x7fff) AM_ROM AM_REGION("user1", 0)
575	493	ADDRESS_MAP_END
576	494
	495
577	496	/* Cycle Shooting */
578	497
579
580	498	static INPUT_PORTS_START( cyclshtg )
581	499	PORT_START("DSW0")
582	500	PORT_DIPNAME( 0x04, 0x04, "Test Mode" )
r4679	r4680
768	686	static MACHINE_DRIVER_START( nycaptor )
769	687	/* basic machine hardware */
770	688	MDRV_CPU_ADD("maincpu", Z80,8000000/2)      /* ??? */
771		MDRV_CPU_PROGRAM_MAP(readmem,writemem)
	689	MDRV_CPU_PROGRAM_MAP(nycaptor_master_map,0)
772	690	MDRV_CPU_VBLANK_INT("screen", irq0_line_hold)
773	691
774	692	MDRV_CPU_ADD("sub", Z80,8000000/2)
775		MDRV_CPU_PROGRAM_MAP(readmem_sub,writemem_sub)
	693	MDRV_CPU_PROGRAM_MAP(nycaptor_slave_map,0)
776	694	MDRV_CPU_VBLANK_INT("screen", irq0_line_hold)   /* IRQ generated by ??? */
777	695
778	696	MDRV_CPU_ADD("audiocpu", Z80,8000000/2)
779		MDRV_CPU_PROGRAM_MAP(sound_readmem,sound_writemem)
780		MDRV_CPU_VBLANK_INT_HACK(irq0_line_hold,2)   /* IRQ generated by ??? */
	697	MDRV_CPU_PROGRAM_MAP(nycaptor_sound_map,0)
	698	MDRV_CPU_PERIODIC_INT(irq0_line_hold,2*60)   /* IRQ generated by ??? */
781	699
782	700	MDRV_CPU_ADD("mcu", M68705,2000000)
783		MDRV_CPU_PROGRAM_MAP(m68705_readmem,m68705_writemem)
	701	MDRV_CPU_PROGRAM_MAP(nycaptor_m68705_map,0)
784	702
785		MDRV_QUANTUM_TIME(HZ(6000))   /* 100 CPU slices per frame - an high value to ensure proper */
	703	MDRV_QUANTUM_TIME(HZ(6000))   /* 100 CPU slices per frame - an high value to ensure proper synchronization of the CPUs */
786	704
787		/* synchronization of the CPUs */
788	705	MDRV_MACHINE_RESET(ta7630)
789	706
790	707	/* video hardware */
r4679	r4680
829	746
830	747	static MACHINE_DRIVER_START( cyclshtg )
831	748	MDRV_CPU_ADD("maincpu", Z80,8000000/2)
832
833		MDRV_CPU_PROGRAM_MAP(cyclshtg_readmem,cyclshtg_writemem)
	749	MDRV_CPU_PROGRAM_MAP(cyclshtg_master_map,0)
834	750	MDRV_CPU_VBLANK_INT("screen", irq0_line_hold)
835	751
836	752	MDRV_CPU_ADD("sub", Z80,8000000/2)
837		MDRV_CPU_PROGRAM_MAP(cyclshtg_readmem_sub,cyclshtg_writemem_sub)
	753	MDRV_CPU_PROGRAM_MAP(cyclshtg_slave_map,0)
838	754	MDRV_CPU_VBLANK_INT("screen", irq0_line_hold)
839	755
840	756	MDRV_CPU_ADD("audiocpu", Z80,8000000/2)
841		MDRV_CPU_PROGRAM_MAP(sound_readmem,sound_writemem)
842		MDRV_CPU_VBLANK_INT_HACK(irq0_line_hold,2)
	757	MDRV_CPU_PROGRAM_MAP(nycaptor_sound_map,0)
	758	MDRV_CPU_PERIODIC_INT(irq0_line_hold,2*60)
843	759
844	760	#ifdef USE_MCU
845	761	MDRV_CPU_ADD("mcu", M68705,2000000)
846		MDRV_CPU_PROGRAM_MAP(m68705_readmem,m68705_writemem)
	762	MDRV_CPU_PROGRAM_MAP(nycaptor_m68705_map,0)
847	763	#endif
848	764
849	765	MDRV_QUANTUM_TIME(HZ(60))
r4679	r4680
890	806
891	807	static MACHINE_DRIVER_START( bronx )
892	808	MDRV_CPU_ADD("maincpu", Z80,8000000/2)
893
894		MDRV_CPU_PROGRAM_MAP(bronx_readmem, bronx_writemem)
	809	MDRV_CPU_PROGRAM_MAP(bronx_master_map,0)
895	810	MDRV_CPU_VBLANK_INT("screen", irq0_line_hold)
896	811
897	812	MDRV_CPU_ADD("sub", Z80,8000000/2)
898		MDRV_CPU_PROGRAM_MAP(bronx_readmem_sub, bronx_writemem_sub)
899		MDRV_CPU_IO_MAP(bronx_io, 0)
900
	813	MDRV_CPU_PROGRAM_MAP(bronx_slave_map, 0)
	814	MDRV_CPU_IO_MAP(bronx_slave_io_map, 0)
901	815	MDRV_CPU_VBLANK_INT("screen", irq0_line_hold)
902	816
903	817	MDRV_CPU_ADD("audiocpu", Z80,8000000/2)
904		MDRV_CPU_PROGRAM_MAP(sound_readmem,sound_writemem)
905		MDRV_CPU_VBLANK_INT_HACK(irq0_line_hold,2)
	818	MDRV_CPU_PROGRAM_MAP(nycaptor_sound_map,0)
	819	MDRV_CPU_PERIODIC_INT(irq0_line_hold,2*60)
906	820
907	821	MDRV_QUANTUM_TIME(HZ(120))
908	822	MDRV_MACHINE_RESET(ta7630)

src/mame/drivers/mitchell.c

r4679	r4680
8	8
9	9	Other games that might run on this hardware:
10	10	"Chi-toitsu"(YUGA 1988)-Another version of"Mahjong Gakuen"
11		"MIRAGE -Youjyu mahjong den-"(MITCHELL 1994)
12	11
13	12	Notes:
14	13	- Super Pang has a protection which involves copying code stored in the
r4679	r4680
348	347
349	348	***************************************************************************/
350	349
351		static ADDRESS_MAP_START( mgakuen_readmem, ADDRESS_SPACE_PROGRAM, 8 )
352		AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM)
353		AM_RANGE(0x8000, 0xbfff) AM_READ(SMH_BANK1)
354		AM_RANGE(0xc000, 0xc7ff) AM_READ(mgakuen_paletteram_r)   /* palette RAM */
355		AM_RANGE(0xc800, 0xcfff) AM_READ(pang_colorram_r)   /* Attribute RAM */
356		AM_RANGE(0xd000, 0xdfff) AM_READ(mgakuen_videoram_r)   /* char RAM */
357		AM_RANGE(0xe000, 0xefff) AM_READ(SMH_RAM)   /* Work RAM */
358		AM_RANGE(0xf000, 0xffff) AM_READ(mgakuen_objram_r)   /* OBJ RAM */
	350	static ADDRESS_MAP_START( mgakuen_map, ADDRESS_SPACE_PROGRAM, 8 )
	351	AM_RANGE(0x0000, 0x7fff) AM_ROM
	352	AM_RANGE(0x8000, 0xbfff) AM_ROMBANK(1)
	353	AM_RANGE(0xc000, 0xc7ff) AM_READWRITE(mgakuen_paletteram_r,mgakuen_paletteram_w)   /* palette RAM */
	354	AM_RANGE(0xc800, 0xcfff) AM_READWRITE(pang_colorram_r,pang_colorram_w) AM_BASE(&pang_colorram) /* Attribute RAM */
	355	AM_RANGE(0xd000, 0xdfff) AM_READWRITE(mgakuen_videoram_r,mgakuen_videoram_w) AM_BASE(&pang_videoram) AM_SIZE(&pang_videoram_size) /* char RAM */
	356	AM_RANGE(0xe000, 0xefff) AM_RAM   /* Work RAM */
	357	AM_RANGE(0xf000, 0xffff) AM_READWRITE(mgakuen_objram_r,mgakuen_objram_w)   /* OBJ RAM */
359	358	ADDRESS_MAP_END
360	359
361		static ADDRESS_MAP_START( mgakuen_writemem, ADDRESS_SPACE_PROGRAM, 8 )
362		AM_RANGE(0x0000, 0xbfff) AM_WRITE(SMH_ROM)
363		AM_RANGE(0xc000, 0xc7ff) AM_WRITE(mgakuen_paletteram_w)
364		AM_RANGE(0xc800, 0xcfff) AM_WRITE(pang_colorram_w) AM_BASE(&pang_colorram)
365		AM_RANGE(0xd000, 0xdfff) AM_WRITE(mgakuen_videoram_w) AM_BASE(&pang_videoram) AM_SIZE(&pang_videoram_size)
366		AM_RANGE(0xe000, 0xefff) AM_WRITE(SMH_RAM)
367		AM_RANGE(0xf000, 0xffff) AM_WRITE(mgakuen_objram_w)   /* OBJ RAM */
368		ADDRESS_MAP_END
369
370		static ADDRESS_MAP_START( readmem, ADDRESS_SPACE_PROGRAM, 8 )
371		AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM)
372		AM_RANGE(0x8000, 0xbfff) AM_READ(SMH_BANK1)
373		AM_RANGE(0xc000, 0xc7ff) AM_READ(pang_paletteram_r)   /* Banked palette RAM */
374		AM_RANGE(0xc800, 0xcfff) AM_READ(pang_colorram_r)   /* Attribute RAM */
375		AM_RANGE(0xd000, 0xdfff) AM_READ(pang_videoram_r)   /* Banked char / OBJ RAM */
	360	static ADDRESS_MAP_START( mitchell_map, ADDRESS_SPACE_PROGRAM, 8 )
	361	AM_RANGE(0x0000, 0x7fff) AM_ROM
	362	AM_RANGE(0x8000, 0xbfff) AM_ROMBANK(1)
	363	AM_RANGE(0xc000, 0xc7ff) AM_READWRITE(pang_paletteram_r,pang_paletteram_w) /* Banked palette RAM */
	364	AM_RANGE(0xc800, 0xcfff) AM_READWRITE(pang_colorram_r,pang_colorram_w) AM_BASE(&pang_colorram) /* Attribute RAM */
	365	AM_RANGE(0xd000, 0xdfff) AM_READWRITE(pang_videoram_r,pang_videoram_w) AM_BASE(&pang_videoram) AM_SIZE(&pang_videoram_size)/* Banked char / OBJ RAM */
376	366	AM_RANGE(0xe000, 0xffff) AM_READ(SMH_RAM)   /* Work RAM */
377	367	ADDRESS_MAP_END
378	368
379		static ADDRESS_MAP_START( writemem, ADDRESS_SPACE_PROGRAM, 8 )
380		AM_RANGE(0x0000, 0xbfff) AM_WRITE(SMH_ROM)
381		AM_RANGE(0xc000, 0xc7ff) AM_WRITE(pang_paletteram_w)
382		AM_RANGE(0xc800, 0xcfff) AM_WRITE(pang_colorram_w) AM_BASE(&pang_colorram)
383		AM_RANGE(0xd000, 0xdfff) AM_WRITE(pang_videoram_w) AM_BASE(&pang_videoram) AM_SIZE(&pang_videoram_size)
384		AM_RANGE(0xe000, 0xffff) AM_WRITE(SMH_RAM)
385		ADDRESS_MAP_END
386
387		static ADDRESS_MAP_START( io_map, ADDRESS_SPACE_IO, 8 )
	369	static ADDRESS_MAP_START( mitchell_io_map, ADDRESS_SPACE_IO, 8 )
388	370	ADDRESS_MAP_GLOBAL_MASK(0xff)
389	371	AM_RANGE(0x00, 0x00) AM_WRITE(pang_gfxctrl_w)   /* Palette bank, layer enable, coin counters, more */
390	372	AM_RANGE(0x00, 0x02) AM_READ(input_r)         /* Super Pang needs a kludge to initialize EEPROM.
r4679	r4680
403	385
404	386	/* spangbl */
405	387
406		static ADDRESS_MAP_START( spangb_memmap, ADDRESS_SPACE_PROGRAM, 8 )
	388	static ADDRESS_MAP_START( spangbl_map, ADDRESS_SPACE_PROGRAM, 8 )
407	389	AM_RANGE(0x0000, 0x7fff) AM_ROM
408		AM_RANGE(0x8000, 0xbfff) AM_READWRITE(SMH_BANK1, SMH_NOP)
	390	AM_RANGE(0x8000, 0xbfff) AM_ROMBANK(1) AM_WRITENOP
409	391	AM_RANGE(0xc000, 0xc7ff) AM_READWRITE(pang_paletteram_r, pang_paletteram_w)   /* Banked palette RAM */
410	392	AM_RANGE(0xc800, 0xcfff) AM_READWRITE(pang_colorram_r, pang_colorram_w)   AM_BASE(&pang_colorram)/* Attribute RAM */
411	393	AM_RANGE(0xd000, 0xdfff) AM_READWRITE(pang_videoram_r, pang_videoram_w)   AM_BASE(&pang_videoram) AM_SIZE(&pang_videoram_size) /* Banked char / OBJ RAM */
412		AM_RANGE(0xe000, 0xffff) AM_READ(SMH_RAM)   /* Work RAM */
413		AM_RANGE(0xe000, 0xffff) AM_RAM
	394	AM_RANGE(0xe000, 0xffff) AM_RAM      /* Work RAM */
414	395	ADDRESS_MAP_END
415	396
416		static ADDRESS_MAP_START( spangb_portmap, ADDRESS_SPACE_IO, 8 )
	397	static ADDRESS_MAP_START( spangbl_io_map, ADDRESS_SPACE_IO, 8 )
417	398	ADDRESS_MAP_GLOBAL_MASK(0xff)
418	399	AM_RANGE(0x00, 0x02) AM_READ(input_r)   /* Super Pang needs a kludge to initialize EEPROM. */
419	400	AM_RANGE(0x00, 0x00) AM_WRITE(pang_gfxctrl_w)    /* Palette bank, layer enable, coin counters, more */
r4679	r4680
439	420	}
440	421	#endif
441	422
442		static ADDRESS_MAP_START( spangb_sound_memmap, ADDRESS_SPACE_PROGRAM, 8 )
	423	static ADDRESS_MAP_START( spangbl_sound_map, ADDRESS_SPACE_PROGRAM, 8 )
443	424	AM_RANGE(0x0000, 0x3fff) AM_ROM
444	425	//  AM_RANGE(0xec00, 0xec00) AM_WRITE( spangbl_msm5205_data_w )
445	426	AM_RANGE(0xf000, 0xf3ff) AM_RAM
446	427	ADDRESS_MAP_END
447	428
448		static ADDRESS_MAP_START( spangb_sound_portmap, ADDRESS_SPACE_IO, 8 )
	429	static ADDRESS_MAP_START( spangbl_sound_io_map, ADDRESS_SPACE_IO, 8 )
449	430	ADDRESS_MAP_GLOBAL_MASK(0xff)
450	431	ADDRESS_MAP_END
451	432
r4679	r4680
456	437	okim6295_set_bank_base(device, 0x40000 * (data & 3));
457	438	}
458	439
459		static ADDRESS_MAP_START( mstworld_sound_readmem, ADDRESS_SPACE_PROGRAM, 8 )
460		AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM)
461		AM_RANGE(0x8000, 0x87ff) AM_READ(SMH_RAM)
462		AM_RANGE(0x9800, 0x9800) AM_DEVREAD("oki", okim6295_r)
	440	static ADDRESS_MAP_START( mstworld_sound_map, ADDRESS_SPACE_PROGRAM, 8 )
	441	AM_RANGE(0x0000, 0x7fff) AM_ROM
	442	AM_RANGE(0x8000, 0x87ff) AM_RAM
	443	AM_RANGE(0x9000, 0x9000) AM_DEVWRITE("oki", oki_banking_w)
	444	AM_RANGE(0x9800, 0x9800) AM_DEVREADWRITE("oki", okim6295_r,okim6295_w)
463	445	AM_RANGE(0xa000, 0xa000) AM_READ(soundlatch_r)
464	446	ADDRESS_MAP_END
465	447
466		static ADDRESS_MAP_START( mstworld_sound_writemem, ADDRESS_SPACE_PROGRAM, 8 )
467		AM_RANGE(0x0000, 0x7fff) AM_WRITE(SMH_ROM)
468		AM_RANGE(0x8000, 0x87ff) AM_WRITE(SMH_RAM)
469		AM_RANGE(0x9000, 0x9000) AM_DEVWRITE("oki", oki_banking_w)
470		AM_RANGE(0x9800, 0x9800) AM_DEVWRITE("oki", okim6295_w)
471		ADDRESS_MAP_END
472
473	448	static WRITE8_HANDLER(mstworld_sound_w)
474	449	{
475	450	soundlatch_w(space,0,data);
r4679	r4680
1117	1092
1118	1093	/* basic machine hardware */
1119	1094	MDRV_CPU_ADD("maincpu", Z80, 6000000)   /* ??? */
1120		MDRV_CPU_PROGRAM_MAP(mgakuen_readmem,mgakuen_writemem)
1121		MDRV_CPU_IO_MAP(io_map,0)
	1095	MDRV_CPU_PROGRAM_MAP(mgakuen_map,0)
	1096	MDRV_CPU_IO_MAP(mitchell_io_map,0)
1122	1097	MDRV_CPU_VBLANK_INT_HACK(irq0_line_hold,2)   /* ??? one extra irq seems to be needed for music (see input5_r) */
1123	1098
1124	1099	/* video hardware */
r4679	r4680
1151	1126
1152	1127	/* basic machine hardware */
1153	1128	MDRV_CPU_ADD("maincpu",Z80, 8000000)   /* (verified on pcb) */
1154		MDRV_CPU_PROGRAM_MAP(readmem,writemem)
1155		MDRV_CPU_IO_MAP(io_map,0)
	1129	MDRV_CPU_PROGRAM_MAP(mitchell_map,0)
	1130	MDRV_CPU_IO_MAP(mitchell_io_map,0)
1156	1131	MDRV_CPU_VBLANK_INT_HACK(irq0_line_hold,2)   /* ??? one extra irq seems to be needed for music (see input5_r) */
1157	1132
1158	1133	MDRV_NVRAM_HANDLER(mitchell)
r4679	r4680
1222	1197	MDRV_IMPORT_FROM(pang)
1223	1198
1224	1199	MDRV_CPU_MODIFY("maincpu")
1225		MDRV_CPU_PROGRAM_MAP(spangb_memmap,0)
1226		MDRV_CPU_IO_MAP(spangb_portmap,0)
	1200	MDRV_CPU_PROGRAM_MAP(spangbl_map,0)
	1201	MDRV_CPU_IO_MAP(spangbl_io_map,0)
1227	1202	MDRV_CPU_VBLANK_INT("screen", irq0_line_hold)
1228	1203
1229	1204	MDRV_CPU_ADD("soundcpu",Z80, 8000000)
1230		MDRV_CPU_PROGRAM_MAP(spangb_sound_memmap,0 )
1231		MDRV_CPU_IO_MAP(spangb_sound_portmap,0)
	1205	MDRV_CPU_PROGRAM_MAP(spangbl_sound_map,0 )
	1206	MDRV_CPU_IO_MAP(spangbl_sound_io_map,0)
1232	1207	MDRV_CPU_VBLANK_INT("screen", irq0_line_hold)
1233	1208	//  MDRV_CPU_VBLANK_INT("screen", nmi_line_pulse)
1234	1209
r4679	r4680
1243	1218	static MACHINE_DRIVER_START( mstworld )
1244	1219
1245	1220	/* basic machine hardware */
1246
1247
1248	1221	/* it doesn't glitch with the clock speed set to 4x normal, however this is incorrect..
1249	1222	the interrupt handling (and probably various irq flags / vbl flags handling etc.) is
1250	1223	more likely wrong.. the game appears to run too fast anyway .. */
1251	1224	MDRV_CPU_ADD("maincpu", Z80, 6000000*4)
1252
1253		MDRV_CPU_PROGRAM_MAP(readmem,writemem)
	1225	MDRV_CPU_PROGRAM_MAP(mitchell_map,0)
1254	1226	MDRV_CPU_IO_MAP(mstworld_io_map,0)
1255	1227	MDRV_CPU_VBLANK_INT("screen", irq0_line_hold)
1256	1228
1257	1229	MDRV_CPU_ADD("audiocpu", Z80,6000000)       /* 6 MHz? */
1258		MDRV_CPU_PROGRAM_MAP(mstworld_sound_readmem,mstworld_sound_writemem)
	1230	MDRV_CPU_PROGRAM_MAP(mstworld_sound_map,0)
1259	1231
1260	1232	/* video hardware */
1261	1233	MDRV_SCREEN_ADD("screen", RASTER)
r4679	r4680
1284	1256
1285	1257	/* basic machine hardware */
1286	1258	MDRV_CPU_ADD("maincpu", Z80, 8000000)   /* Super Pang says 8MHZ ORIGINAL BOARD */
1287		MDRV_CPU_PROGRAM_MAP(readmem,writemem)
1288		MDRV_CPU_IO_MAP(io_map,0)
	1259	MDRV_CPU_PROGRAM_MAP(mitchell_map,0)
	1260	MDRV_CPU_IO_MAP(mitchell_io_map,0)
1289	1261	MDRV_CPU_VBLANK_INT_HACK(irq0_line_hold,2)   /* ??? one extra irq seems to be needed for music (see input5_r) */
1290	1262
1291	1263	MDRV_NVRAM_HANDLER(mitchell)
r4679	r4680
2151	2123	{
2152	2124	/* descramble the program rom .. */
2153	2125	int len = memory_region_length(machine, "maincpu");
2154		UINT8* source = malloc_or_die(len);
	2126	UINT8* source = alloc_array_or_die(UINT8, len);
2155	2127	UINT8* dst    = memory_region(machine, "maincpu") ;
2156	2128	int x;
2157	2129

src/mame/drivers/rainbow.c

r4679	r4680
263	263	if (ACCESSING_BITS_0_7)
264	264	{
265	265	jumping_latch = data & 0xff; /*M68000 writes .b to $400007*/
266		cpu_set_input_line(space->machine->cpu[1],0,HOLD_LINE);
	266	cputag_set_input_line(space->machine, "audiocpu", 0, HOLD_LINE);
267	267	}
268	268	}
269	269
r4679	r4680
272	272	MEMORY STRUCTURES
273	273	***************************************************************************/
274	274
275		static ADDRESS_MAP_START( rainbow_readmem, ADDRESS_SPACE_PROGRAM, 16 )
276		AM_RANGE(0x000000, 0x07ffff) AM_READ(SMH_ROM)
277		AM_RANGE(0x10c000, 0x10ffff) AM_READ(SMH_RAM)   /* main RAM */
278		AM_RANGE(0x200000, 0x200fff) AM_READ(SMH_RAM)   /* palette */
279		AM_RANGE(0x201000, 0x203fff) AM_READ(SMH_RAM)   /* read in initial checks */
	275	static ADDRESS_MAP_START( rainbow_map, ADDRESS_SPACE_PROGRAM, 16 )
	276	AM_RANGE(0x000000, 0x07ffff) AM_ROM
	277	AM_RANGE(0x10c000, 0x10ffff) AM_RAM            /* main RAM */
	278	AM_RANGE(0x200000, 0x200fff) AM_RAM_WRITE(paletteram16_xBBBBBGGGGGRRRRR_word_w) AM_BASE(&paletteram16)
	279	AM_RANGE(0x201000, 0x203fff) AM_RAM            /* r/w in initial checks */
280	280	AM_RANGE(0x390000, 0x390003) AM_READ_PORT("DSWA")
281		AM_RANGE(0x3b0000, 0x3b0003) AM_READ_PORT("DSWB")
282		AM_RANGE(0x3e0000, 0x3e0001) AM_READNOP
283		AM_RANGE(0x3e0002, 0x3e0003) AM_READ8(taitosound_comm_r, 0x00ff)
284		AM_RANGE(0x800000, 0x8007ff) AM_READ(rainbow_cchip_ram_r)
285		AM_RANGE(0x800802, 0x800803) AM_READ(rainbow_cchip_ctrl_r)
286		AM_RANGE(0xc00000, 0xc0ffff) AM_READ(PC080SN_word_0_r)
287		AM_RANGE(0xd00000, 0xd03fff) AM_READ(PC090OJ_word_0_r)   /* sprite ram + other stuff */
288		ADDRESS_MAP_END
289
290		static ADDRESS_MAP_START( rainbow_writemem, ADDRESS_SPACE_PROGRAM, 16 )
291		AM_RANGE(0x000000, 0x07ffff) AM_WRITE(SMH_ROM)
292		AM_RANGE(0x10c000, 0x10ffff) AM_WRITE(SMH_RAM)
293		AM_RANGE(0x200000, 0x200fff) AM_WRITE(paletteram16_xBBBBBGGGGGRRRRR_word_w) AM_BASE(&paletteram16)
294		AM_RANGE(0x201000, 0x203fff) AM_WRITE(SMH_RAM)   /* written in initial checks */
295	281	AM_RANGE(0x3a0000, 0x3a0001) AM_WRITE(rainbow_spritectrl_w)
296		AM_RANGE(0x3c0000, 0x3c0003) AM_WRITENOP   /* written very often, watchdog? */
297		AM_RANGE(0x3e0000, 0x3e0001) AM_WRITE8(taitosound_port_w, 0x00ff)
298		AM_RANGE(0x3e0002, 0x3e0003) AM_WRITE8(taitosound_comm_w, 0x00ff)
299		AM_RANGE(0x800000, 0x8007ff) AM_WRITE(rainbow_cchip_ram_w)
300		AM_RANGE(0x800802, 0x800803) AM_WRITE(rainbow_cchip_ctrl_w)
	282	AM_RANGE(0x3b0000, 0x3b0003) AM_READ_PORT("DSWB")
	283	AM_RANGE(0x3c0000, 0x3c0003) AM_WRITENOP      /* written very often, watchdog? */
	284	AM_RANGE(0x3e0000, 0x3e0001) AM_READNOP AM_WRITE8(taitosound_port_w, 0x00ff)
	285	AM_RANGE(0x3e0002, 0x3e0003) AM_READWRITE8(taitosound_comm_r,taitosound_comm_w, 0x00ff)
	286	AM_RANGE(0x800000, 0x8007ff) AM_READWRITE(rainbow_cchip_ram_r,rainbow_cchip_ram_w)
	287	AM_RANGE(0x800802, 0x800803) AM_READWRITE(rainbow_cchip_ctrl_r,rainbow_cchip_ctrl_w)
301	288	AM_RANGE(0x800c00, 0x800c01) AM_WRITE(rainbow_cchip_bank_w)
302		AM_RANGE(0xc00000, 0xc0ffff) AM_WRITE(PC080SN_word_0_w)
	289	AM_RANGE(0xc00000, 0xc0ffff) AM_READWRITE(PC080SN_word_0_r,PC080SN_word_0_w)
303	290	AM_RANGE(0xc20000, 0xc20003) AM_WRITE(PC080SN_yscroll_word_0_w)
304	291	AM_RANGE(0xc40000, 0xc40003) AM_WRITE(PC080SN_xscroll_word_0_w)
305	292	AM_RANGE(0xc50000, 0xc50003) AM_WRITE(PC080SN_ctrl_word_0_w)
306		AM_RANGE(0xd00000, 0xd03fff) AM_WRITE(PC090OJ_word_0_w)   /* sprite ram + other stuff */
	293	AM_RANGE(0xd00000, 0xd03fff) AM_READWRITE(PC090OJ_word_0_r,PC090OJ_word_0_w)   /* sprite ram + other stuff */
307	294	ADDRESS_MAP_END
308	295
309
310		static ADDRESS_MAP_START( jumping_readmem, ADDRESS_SPACE_PROGRAM, 16 )
311		AM_RANGE(0x000000, 0x09ffff) AM_READ(SMH_ROM)
312		AM_RANGE(0x10c000, 0x10ffff) AM_READ(SMH_RAM)   /* main RAM */
313		AM_RANGE(0x200000, 0x200fff) AM_READ(SMH_RAM)   /* palette */
314		AM_RANGE(0x201000, 0x203fff) AM_READ(SMH_RAM)   /* read in initial checks */
	296	static ADDRESS_MAP_START( jumping_map, ADDRESS_SPACE_PROGRAM, 16 )
	297	AM_RANGE(0x000000, 0x09ffff) AM_ROM
	298	AM_RANGE(0x10c000, 0x10ffff) AM_RAM            /* main RAM */
	299	AM_RANGE(0x200000, 0x200fff) AM_RAM_WRITE(paletteram16_xxxxBBBBGGGGRRRR_word_w) AM_BASE(&paletteram16)
	300	AM_RANGE(0x201000, 0x203fff) AM_RAM            /* r/w in initial checks */
315	301	AM_RANGE(0x400000, 0x400001) AM_READ_PORT("DSWA")
316	302	AM_RANGE(0x400002, 0x400003) AM_READ_PORT("DSWB")
317	303	AM_RANGE(0x401000, 0x401001) AM_READ_PORT("401001")
318	304	AM_RANGE(0x401002, 0x401003) AM_READ_PORT("401003")
319		AM_RANGE(0x420000, 0x420001) AM_READNOP   /* read, but result not used */
320		AM_RANGE(0x440000, 0x4407ff) AM_READ(SMH_RAM)
321		AM_RANGE(0xc00000, 0xc0ffff) AM_READ(PC080SN_word_0_r)
322		AM_RANGE(0xd00000, 0xd01fff) AM_READ(SMH_RAM)   /* original spriteram location, needed for Attract Mode */
323		ADDRESS_MAP_END
324
325		static ADDRESS_MAP_START( jumping_writemem, ADDRESS_SPACE_PROGRAM, 16 )
326		AM_RANGE(0x000000, 0x09ffff) AM_WRITE(SMH_ROM)
327		AM_RANGE(0x10c000, 0x10ffff) AM_WRITE(SMH_RAM)
328		AM_RANGE(0x200000, 0x200fff) AM_WRITE(paletteram16_xxxxBBBBGGGGRRRR_word_w) AM_BASE(&paletteram16)
329		AM_RANGE(0x201000, 0x203fff) AM_WRITE(SMH_RAM)   /* written in initial checks */
330	305	AM_RANGE(0x3a0000, 0x3a0001) AM_WRITE(jumping_spritectrl_w)
331		AM_RANGE(0x3c0000, 0x3c0001) AM_WRITENOP   /* watchdog? */
	306	AM_RANGE(0x3c0000, 0x3c0001) AM_WRITENOP      /* watchdog? */
332	307	AM_RANGE(0x400006, 0x400007) AM_WRITE(jumping_sound_w)
	308	AM_RANGE(0x420000, 0x420001) AM_READNOP         /* read, but result not used */
333	309	AM_RANGE(0x430000, 0x430003) AM_WRITE(PC080SN_yscroll_word_0_w)
334		AM_RANGE(0x440000, 0x4407ff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)
335		AM_RANGE(0x800000, 0x80ffff) AM_WRITENOP   /* original c-chip location (not used) */
336		AM_RANGE(0xc00000, 0xc0ffff) AM_WRITE(PC080SN_word_0_w)
337		AM_RANGE(0xc20000, 0xc20003) AM_WRITENOP   /* seems it is a leftover from rainbow: scroll y written here too */
	310	AM_RANGE(0x440000, 0x4407ff) AM_RAM AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)
	311	AM_RANGE(0x800000, 0x80ffff) AM_WRITENOP      /* original c-chip location (not used) */
	312	AM_RANGE(0xc00000, 0xc0ffff) AM_READWRITE(PC080SN_word_0_r,PC080SN_word_0_w)
	313	AM_RANGE(0xc20000, 0xc20003) AM_WRITENOP      /* seems it is a leftover from rainbow: scroll y written here too */
338	314	AM_RANGE(0xc40000, 0xc40003) AM_WRITE(PC080SN_xscroll_word_0_w)
339		AM_RANGE(0xd00000, 0xd01fff) AM_WRITE(SMH_RAM)    /* original spriteram location, needed for Attract Mode */
	315	AM_RANGE(0xd00000, 0xd01fff) AM_RAM            /* original spriteram location, needed for Attract Mode */
340	316	ADDRESS_MAP_END
341	317
342	318
r4679	r4680
349	325
350	326	static WRITE8_DEVICE_HANDLER( bankswitch_w )
351	327	{
352		memory_set_bankptr(device->machine, 5, memory_region(device->machine, "audiocpu") + ((data - 1) & 3) * 0x4000 + 0x10000);
	328	memory_set_bankptr(device->machine, 1, memory_region(device->machine, "audiocpu") + ((data - 1) & 3) * 0x4000 + 0x10000);
353	329	}
354	330
355	331	static READ8_HANDLER( jumping_latch_r )
r4679	r4680
358	334	}
359	335
360	336
361		static ADDRESS_MAP_START( rainbow_s_readmem, ADDRESS_SPACE_PROGRAM, 8 )
362		AM_RANGE(0x0000, 0x3fff) AM_READ(SMH_ROM)
363		AM_RANGE(0x4000, 0x7fff) AM_READ(SMH_BANK5)
364		AM_RANGE(0x8000, 0x8fff) AM_READ(SMH_RAM)
365		AM_RANGE(0x9000, 0x9001) AM_DEVREAD("ym", ym2151_r)
366		AM_RANGE(0x9002, 0x9100) AM_READ(SMH_RAM)
367		AM_RANGE(0xa001, 0xa001) AM_READ(taitosound_slave_comm_r)
368		ADDRESS_MAP_END
369
370		static ADDRESS_MAP_START( rainbow_s_writemem, ADDRESS_SPACE_PROGRAM, 8 )
371		AM_RANGE(0x0000, 0x7fff) AM_WRITE(SMH_ROM)
372		AM_RANGE(0x8000, 0x8fff) AM_WRITE(SMH_RAM)
373		AM_RANGE(0x9000, 0x9001) AM_DEVWRITE("ym", ym2151_w)
	337	static ADDRESS_MAP_START( rainbow_sound_map, ADDRESS_SPACE_PROGRAM, 8 )
	338	AM_RANGE(0x0000, 0x3fff) AM_ROM
	339	AM_RANGE(0x4000, 0x7fff) AM_ROMBANK(1)
	340	AM_RANGE(0x8000, 0x8fff) AM_RAM
	341	AM_RANGE(0x9000, 0x9001) AM_DEVREADWRITE("ym", ym2151_r,ym2151_w)
	342	AM_RANGE(0x9002, 0x9100) AM_READNOP
374	343	AM_RANGE(0xa000, 0xa000) AM_WRITE(taitosound_slave_port_w)
375		AM_RANGE(0xa001, 0xa001) AM_WRITE(taitosound_slave_comm_w)
	344	AM_RANGE(0xa001, 0xa001) AM_READWRITE(taitosound_slave_comm_r,taitosound_slave_comm_w)
376	345	ADDRESS_MAP_END
377	346
378		static ADDRESS_MAP_START( jumping_sound_readmem, ADDRESS_SPACE_PROGRAM, 8 )
379		AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM)
380		AM_RANGE(0x8000, 0x8fff) AM_READ(SMH_RAM)
381		AM_RANGE(0xb000, 0xb001) AM_DEVREAD("ym1", ym2203_r)
382		AM_RANGE(0xb400, 0xb401) AM_DEVREAD("ym2", ym2203_r)
	347	static ADDRESS_MAP_START( jumping_sound_map, ADDRESS_SPACE_PROGRAM, 8 )
	348	AM_RANGE(0x0000, 0x7fff) AM_ROM
	349	AM_RANGE(0x8000, 0x8fff) AM_RAM
	350	AM_RANGE(0xb000, 0xb001) AM_DEVREADWRITE("ym1", ym2203_r,ym2203_w)
	351	AM_RANGE(0xb400, 0xb401) AM_DEVREADWRITE("ym2", ym2203_r,ym2203_w)
383	352	AM_RANGE(0xb800, 0xb800) AM_READ(jumping_latch_r)
384		AM_RANGE(0xc000, 0xffff) AM_READ(SMH_ROM)
385		ADDRESS_MAP_END
386
387		static ADDRESS_MAP_START( jumping_sound_writemem, ADDRESS_SPACE_PROGRAM, 8 )
388		AM_RANGE(0x0000, 0x7fff) AM_WRITE(SMH_ROM)
389		AM_RANGE(0x8000, 0x8fff) AM_WRITE(SMH_RAM)
390		AM_RANGE(0xb000, 0xb001) AM_DEVWRITE("ym1", ym2203_w)
391		AM_RANGE(0xb400, 0xb401) AM_DEVWRITE("ym2", ym2203_w)
392	353	AM_RANGE(0xbc00, 0xbc00) AM_WRITENOP   /* looks like a bankswitch, but sound works with or without it */
	354	AM_RANGE(0xc000, 0xffff) AM_ROM
393	355	ADDRESS_MAP_END
394	356
395	357
r4679	r4680
591	553
592	554	static void irqhandler(const device_config *device, int irq)
593	555	{
594		cpu_set_input_line(device->machine->cpu[1],0,irq ? ASSERT_LINE : CLEAR_LINE);
	556	cputag_set_input_line(device->machine, "audiocpu", 0, irq ? ASSERT_LINE : CLEAR_LINE);
595	557	}
596	558
597	559	static const ym2151_interface ym2151_config =
r4679	r4680
609	571
610	572	/* basic machine hardware */
611	573	MDRV_CPU_ADD("maincpu", M68000, XTAL_16MHz/2) /* verified on pcb */
612		MDRV_CPU_PROGRAM_MAP(rainbow_readmem,rainbow_writemem)
	574	MDRV_CPU_PROGRAM_MAP(rainbow_map,0)
613	575	MDRV_CPU_VBLANK_INT("screen", irq4_line_hold)
614	576
615	577	MDRV_CPU_ADD("audiocpu", Z80, XTAL_16MHz/4) /* verified on pcb */
616		MDRV_CPU_PROGRAM_MAP(rainbow_s_readmem,rainbow_s_writemem)
	578	MDRV_CPU_PROGRAM_MAP(rainbow_sound_map,0)
617	579
618	580	MDRV_QUANTUM_TIME(HZ(600))   /* 10 CPU slices per frame - enough for the sound CPU to read all commands */
619	581
r4679	r4680
641	603	MACHINE_DRIVER_END
642	604
643	605
644		/* Jumping The pcb has 2 xtals, 24MHz and 18,432MHz */
	606	/* Jumping: The PCB has 2 Xtals, 24MHz and 18,432MHz */
645	607	static MACHINE_DRIVER_START( jumping )
646	608
647	609	/* basic machine hardware */
648	610	MDRV_CPU_ADD("maincpu", M68000, XTAL_24MHz/3)   /* not verified but matches original */
649		MDRV_CPU_PROGRAM_MAP(jumping_readmem,jumping_writemem)
	611	MDRV_CPU_PROGRAM_MAP(jumping_map,0)
650	612	MDRV_CPU_VBLANK_INT("screen", irq4_line_hold)
651	613
652	614	MDRV_CPU_ADD("audiocpu", Z80, XTAL_18_432MHz/6)   /* not verified but music tempo matches original */
653		MDRV_CPU_PROGRAM_MAP(jumping_sound_readmem,jumping_sound_writemem)
	615	MDRV_CPU_PROGRAM_MAP(jumping_sound_map,0)
654	616
655	617	MDRV_QUANTUM_TIME(HZ(600))   /* 10 CPU slices per frame - enough ? */
656	618

src/mame/drivers/galspnbl.c

r4679	r4680
39	39	if (ACCESSING_BITS_0_7)
40	40	{
41	41	soundlatch_w(space,offset,data & 0xff);
42		cpu_set_input_line(space->machine->cpu[1],INPUT_LINE_NMI,PULSE_LINE);
	42	cputag_set_input_line(space->machine, "audiocpu", INPUT_LINE_NMI, PULSE_LINE);
43	43	}
44	44	}
45	45
r4679	r4680
196	196
197	197	static void irqhandler(const device_config *device, int linestate)
198	198	{
199		cpu_set_input_line(device->machine->cpu[1],0,linestate);
	199	cputag_set_input_line(device->machine, "audiocpu", 0, linestate);
200	200	}
201	201
202	202	static const ym3812_interface ym3812_config =

src/mame/drivers/blktiger.c

r4679	r4680
16	16	#include "driver.h"
17	17	#include "cpu/z80/z80.h"
18	18	#include "sound/2203intf.h"
	19	#include "cpu/mcs51/mcs51.h"
19	20
20	21
21	22	extern UINT8 *blktiger_txvideoram;
r4679	r4680
36	37	VIDEO_EOF( blktiger );
37	38
38	39
	40	/**************************************************
39	41
40		/* this is a protection check. The game crashes (thru a jump to 0x8000) */
41		/* if a read from this address doesn't return the value it expects. */
42		static READ8_HANDLER( blktiger_protection_r )
	42	Protection comms between main cpu and i8751
	43
	44	**************************************************/
	45
	46	static UINT8 z80_latch,i8751_latch;
	47
	48	static READ8_HANDLER( blktiger_from_mcu_r )
43	49	{
44		int data = cpu_get_reg(space->cpu, Z80_DE) >> 8;
45		logerror("protection read, PC: %04x Result:%02x\n",cpu_get_pc(space->cpu),data);
46		return data;
	50	return i8751_latch;
47	51	}
48	52
	53	static WRITE8_HANDLER( blktiger_to_mcu_w )
	54	{
	55	cputag_set_input_line(space->machine, "mcu", MCS51_INT1_LINE, ASSERT_LINE);
	56	z80_latch = data;
	57	}
	58
	59	static READ8_HANDLER( blktiger_from_main_r )
	60	{
	61	cputag_set_input_line(space->machine, "mcu", MCS51_INT1_LINE, CLEAR_LINE);
	62	//printf("%02x read\n",latch);
	63	return z80_latch;
	64	}
	65
	66	static WRITE8_HANDLER( blktiger_to_main_w )
	67	{
	68	//printf("%02x write\n",data);
	69	i8751_latch = data;
	70	}
	71
	72
	73
49	74	static WRITE8_HANDLER( blktiger_bankswitch_w )
50	75	{
51	76	memory_set_bank(space->machine, 1, data & 0x0f);
r4679	r4680
61	86	}
62	87
63	88
64		static ADDRESS_MAP_START( mem_map, ADDRESS_SPACE_PROGRAM, 8 )
	89	static ADDRESS_MAP_START( blktiger_map, ADDRESS_SPACE_PROGRAM, 8 )
65	90	AM_RANGE(0x0000, 0x7fff) AM_ROM
66		AM_RANGE(0x8000, 0xbfff) AM_READWRITE(SMH_BANK1, SMH_ROM)
	91	AM_RANGE(0x8000, 0xbfff) AM_READWRITE(SMH_BANK(1), SMH_ROM)
67	92	AM_RANGE(0xc000, 0xcfff) AM_READWRITE(blktiger_bgvideoram_r, blktiger_bgvideoram_w)
68	93	AM_RANGE(0xd000, 0xd7ff) AM_RAM_WRITE(blktiger_txvideoram_w) AM_BASE(&blktiger_txvideoram)
69	94	AM_RANGE(0xd800, 0xdbff) AM_RAM_WRITE(paletteram_xxxxBBBBRRRRGGGG_split1_w) AM_BASE(&paletteram)
r4679	r4680
72	97	AM_RANGE(0xfe00, 0xffff) AM_RAM AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
73	98	ADDRESS_MAP_END
74	99
75		static ADDRESS_MAP_START( port_map, ADDRESS_SPACE_IO, 8 )
	100	static ADDRESS_MAP_START( blktiger_io_map, ADDRESS_SPACE_IO, 8 )
76	101	ADDRESS_MAP_GLOBAL_MASK(0xff)
77	102	AM_RANGE(0x00, 0x00) AM_READ_PORT("IN0")   AM_WRITE(soundlatch_w)
78	103	AM_RANGE(0x01, 0x01) AM_READ_PORT("IN1")   AM_WRITE(blktiger_bankswitch_w)
r4679	r4680
81	106	AM_RANGE(0x04, 0x04) AM_READ_PORT("DSW1")   AM_WRITE(blktiger_video_control_w)
82	107	AM_RANGE(0x05, 0x05) AM_READ_PORT("FREEZE")
83	108	AM_RANGE(0x06, 0x06) AM_WRITE(watchdog_reset_w)
84		AM_RANGE(0x07, 0x07) AM_READ(blktiger_protection_r)   AM_WRITENOP /* Software protection (7) */
	109	AM_RANGE(0x07, 0x07) AM_READWRITE(blktiger_from_mcu_r,blktiger_to_mcu_w)    /* Software protection (7) */
85	110	AM_RANGE(0x08, 0x09) AM_WRITE(blktiger_scrollx_w)
86	111	AM_RANGE(0x0a, 0x0b) AM_WRITE(blktiger_scrolly_w)
87	112	AM_RANGE(0x0c, 0x0c) AM_WRITE(blktiger_video_enable_w)
r4679	r4680
89	114	AM_RANGE(0x0e, 0x0e) AM_WRITE(blktiger_screen_layout_w)
90	115	ADDRESS_MAP_END
91	116
92		static ADDRESS_MAP_START( sound_mem_map, ADDRESS_SPACE_PROGRAM, 8 )
	117	static ADDRESS_MAP_START( blktigerbl_io_map, ADDRESS_SPACE_IO, 8 )
	118	ADDRESS_MAP_GLOBAL_MASK(0xff)
	119	AM_RANGE(0x00, 0x00) AM_READ_PORT("IN0")   AM_WRITE(soundlatch_w)
	120	AM_RANGE(0x01, 0x01) AM_READ_PORT("IN1")   AM_WRITE(blktiger_bankswitch_w)
	121	AM_RANGE(0x02, 0x02) AM_READ_PORT("IN2")
	122	AM_RANGE(0x03, 0x03) AM_READ_PORT("DSW0")   AM_WRITE(blktiger_coinlockout_w)
	123	AM_RANGE(0x04, 0x04) AM_READ_PORT("DSW1")   AM_WRITE(blktiger_video_control_w)
	124	AM_RANGE(0x05, 0x05) AM_READ_PORT("FREEZE")
	125	AM_RANGE(0x06, 0x06) AM_WRITE(watchdog_reset_w)
	126	AM_RANGE(0x07, 0x07) AM_NOP    /* Software protection (7) */
	127	AM_RANGE(0x08, 0x09) AM_WRITE(blktiger_scrollx_w)
	128	AM_RANGE(0x0a, 0x0b) AM_WRITE(blktiger_scrolly_w)
	129	AM_RANGE(0x0c, 0x0c) AM_WRITE(blktiger_video_enable_w)
	130	AM_RANGE(0x0d, 0x0d) AM_WRITE(blktiger_bgvideoram_bank_w)
	131	AM_RANGE(0x0e, 0x0e) AM_WRITE(blktiger_screen_layout_w)
	132	ADDRESS_MAP_END
	133
	134	static ADDRESS_MAP_START( blktiger_sound_map, ADDRESS_SPACE_PROGRAM, 8 )
93	135	AM_RANGE(0x0000, 0x7fff) AM_ROM
94	136	AM_RANGE(0xc000, 0xc7ff) AM_RAM
95	137	AM_RANGE(0xc800, 0xc800) AM_READ(soundlatch_r)
r4679	r4680
97	139	AM_RANGE(0xe002, 0xe003) AM_DEVREADWRITE("ym2", ym2203_r, ym2203_w)
98	140	ADDRESS_MAP_END
99	141
	142	static ADDRESS_MAP_START( blktiger_mcu_map, ADDRESS_SPACE_PROGRAM, 8 )
	143	AM_RANGE(0x0000, 0x0fff) AM_ROM
	144	ADDRESS_MAP_END
100	145
	146	static ADDRESS_MAP_START( blktiger_mcu_io_map, ADDRESS_SPACE_IO, 8 )
	147	AM_RANGE(MCS51_PORT_P0,MCS51_PORT_P0) AM_READWRITE(blktiger_from_main_r,blktiger_to_main_w)
	148	AM_RANGE(MCS51_PORT_P1,MCS51_PORT_P3) AM_WRITENOP    /* other ports unknown */
	149	ADDRESS_MAP_END
	150
	151
	152
101	153	static INPUT_PORTS_START( blktiger )
102	154	PORT_START("IN0")   /* IN0 */
103	155	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_START1 )
r4679	r4680
228	280	/* handler called by the 2203 emulator when the internal timers cause an IRQ */
229	281	static void irqhandler(const device_config *device, int irq)
230	282	{
231		cpu_set_input_line(device->machine->cpu[1],0,irq ? ASSERT_LINE : CLEAR_LINE);
	283	cputag_set_input_line(device->machine, "audiocpu", 0, irq ? ASSERT_LINE : CLEAR_LINE);
232	284	}
233	285
234	286	static const ym2203_interface ym2203_config =
r4679	r4680
251	303
252	304	/* basic machine hardware */
253	305	MDRV_CPU_ADD("maincpu", Z80, XTAL_24MHz/4)   /* verified on pcb */
254		MDRV_CPU_PROGRAM_MAP(mem_map, 0)
255		MDRV_CPU_IO_MAP(port_map, 0)
	306	MDRV_CPU_PROGRAM_MAP(blktiger_map, 0)
	307	MDRV_CPU_IO_MAP(blktiger_io_map, 0)
256	308	MDRV_CPU_VBLANK_INT("screen", irq0_line_hold)
257	309
258	310	MDRV_CPU_ADD("audiocpu", Z80, XTAL_3_579545MHz) /* verified on pcb */
259		MDRV_CPU_PROGRAM_MAP(sound_mem_map, 0)
	311	MDRV_CPU_PROGRAM_MAP(blktiger_sound_map, 0)
260	312
	313	MDRV_CPU_ADD("mcu", I8751, XTAL_24MHz/4) /* ??? */
	314	MDRV_CPU_PROGRAM_MAP(blktiger_mcu_map,0)
	315	MDRV_CPU_IO_MAP(blktiger_mcu_io_map,0)
	316	//MDRV_CPU_VBLANK_INT("screen", irq0_line_hold)
	317
261	318	MDRV_MACHINE_START(blktiger)
262	319
263	320	/* video hardware */
r4679	r4680
288	345	MDRV_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.15)
289	346	MACHINE_DRIVER_END
290	347
	348	static MACHINE_DRIVER_START( blktigerbl )
	349	MDRV_IMPORT_FROM(blktiger)
	350	MDRV_CPU_MODIFY("maincpu")
	351	MDRV_CPU_IO_MAP(blktigerbl_io_map, 0)
291	352
	353	MDRV_CPU_REMOVE("mcu")
	354	MACHINE_DRIVER_END
	355
292	356	/***************************************************************************
293	357
294	358	Game driver(s)
r4679	r4680
306	370	ROM_REGION( 0x10000, "audiocpu", 0 )
307	371	ROM_LOAD( "bd-06.1l",  0x0000, 0x8000, CRC(2cf54274) SHA1(87df100c65999ba1e9d358ffd0fe4bba23ae0efb) )
308	372
	373	ROM_REGION( 0x10000, "mcu", 0 )
	374	ROM_LOAD( "bd.5k",  0x0000, 0x1000, CRC(ac7d14f1) SHA1(46fd6b43f10312e3e8d3c9e0c0fd616af98fdbad) )
	375
309	376	ROM_REGION( 0x08000, "gfx1", ROMREGION_DISPOSE )
310	377	ROM_LOAD( "bd-15.2n",  0x00000, 0x08000, CRC(70175d78) SHA1(2f02be2785d1824002145ea20db79821d0393929) )   /* characters */
311	378
r4679	r4680
328	395	ROM_LOAD( "bd04.11l",  0x0300, 0x0100, CRC(e5490b68) SHA1(40f9f92efe7dd97b49144aec02eb509834056915) )
329	396	ROM_END
330	397
331		ROM_START( bktigrb1 )
	398	ROM_START( blktigerb1 )
332	399	ROM_REGION( 0x50000, "maincpu", 0 )   /* 64k for code + banked ROMs images */
333	400	ROM_LOAD( "btiger1.f6",   0x00000, 0x08000, CRC(9d8464e8) SHA1(c847ee9a22b8b636e85427214747e6bd779023e8) )   /* CODE */
334	401	ROM_LOAD( "bdu-02a.6e",   0x10000, 0x10000, CRC(7bef96e8) SHA1(6d05a73d8400dead78c561b904bf6ef8311e7b91) )   /* 0+1 */
r4679	r4680
361	428	ROM_LOAD( "bd04.11l",  0x0300, 0x0100, CRC(e5490b68) SHA1(40f9f92efe7dd97b49144aec02eb509834056915) )
362	429	ROM_END
363	430
364		ROM_START( bktigrb2 )
	431	ROM_START( blktigerb2 )
365	432	ROM_REGION( 0x50000, "maincpu", 0 )   /* 64k for code + banked ROMs images */
366	433	ROM_LOAD( "1.bin",        0x00000, 0x08000, CRC(47e2b21e) SHA1(3f03543ace435239978a95f569ac89f6762253c0) )   /* CODE */
367	434	ROM_LOAD( "bdu-02a.6e",   0x10000, 0x10000, CRC(7bef96e8) SHA1(6d05a73d8400dead78c561b904bf6ef8311e7b91) )   /* 0+1 */
r4679	r4680
405	472	ROM_REGION( 0x10000, "audiocpu", 0 )
406	473	ROM_LOAD( "bd-06.1l",  0x0000, 0x8000, CRC(2cf54274) SHA1(87df100c65999ba1e9d358ffd0fe4bba23ae0efb) )
407	474
	475	ROM_REGION( 0x10000, "mcu", 0 )
	476	ROM_LOAD( "bd.5k",  0x0000, 0x1000, CRC(ac7d14f1) SHA1(46fd6b43f10312e3e8d3c9e0c0fd616af98fdbad) )
	477
408	478	ROM_REGION( 0x08000, "gfx1", ROMREGION_DISPOSE )
409	479	ROM_LOAD( "blkdrgon.2n",  0x00000, 0x08000, CRC(3821ab29) SHA1(576f1839f63b0cad6b851d6e6a3e9dec21ac811d) )   /* characters */
410	480
r4679	r4680
427	497	ROM_LOAD( "bd04.11l",  0x0300, 0x0100, CRC(e5490b68) SHA1(40f9f92efe7dd97b49144aec02eb509834056915) )
428	498	ROM_END
429	499
430		ROM_START( blkdrgnb )
	500	ROM_START( blkdrgonb )
431	501	ROM_REGION( 0x50000, "maincpu", 0 )   /* 64k for code + banked ROMs images */
432	502	ROM_LOAD( "a1",           0x00000, 0x08000, CRC(7caf2ba0) SHA1(57b17caff67d36b24075f5865d433bfc8bcc9bc2) )   /* CODE */
433	503	ROM_LOAD( "blkdrgon.6e",  0x10000, 0x10000, CRC(7d39c26f) SHA1(562a3f578e109ae020f65e341c876ad7e510a311) )   /* 0+1 */
r4679	r4680
461	531	ROM_END
462	532
463	533
464
465		GAME( 1987, blktiger, 0,        blktiger, blktiger, 0, ROT0, "Capcom", "Black Tiger", GAME_SUPPORTS_SAVE )
466		GAME( 1987, bktigrb1, blktiger, blktiger, blktiger, 0, ROT0, "bootleg", "Black Tiger (bootleg set 1)", GAME_SUPPORTS_SAVE )
467		GAME( 1987, bktigrb2, blktiger, blktiger, blktiger, 0, ROT0, "bootleg", "Black Tiger (bootleg set 2)", GAME_SUPPORTS_SAVE )
468		GAME( 1987, blkdrgon, blktiger, blktiger, blktiger, 0, ROT0, "Capcom", "Black Dragon", GAME_SUPPORTS_SAVE )
469		GAME( 1987, blkdrgnb, blktiger, blktiger, blktiger, 0, ROT0, "bootleg", "Black Dragon (bootleg)", GAME_SUPPORTS_SAVE )
	534	GAME( 1987, blktiger,   0,        blktiger,   blktiger, 0, ROT0, "Capcom",  "Black Tiger",                 GAME_SUPPORTS_SAVE )
	535	GAME( 1987, blktigerb1, blktiger, blktigerbl, blktiger, 0, ROT0, "bootleg", "Black Tiger (bootleg set 1)", GAME_SUPPORTS_SAVE )
	536	GAME( 1987, blktigerb2, blktiger, blktigerbl, blktiger, 0, ROT0, "bootleg", "Black Tiger (bootleg set 2)", GAME_SUPPORTS_SAVE )
	537	GAME( 1987, blkdrgon,   blktiger, blktiger,   blktiger, 0, ROT0, "Capcom",  "Black Dragon",                GAME_SUPPORTS_SAVE )
	538	GAME( 1987, blkdrgonb,  blktiger, blktigerbl, blktiger, 0, ROT0, "bootleg", "Black Dragon (bootleg)",      GAME_SUPPORTS_SAVE )

src/mame/drivers/mgolf.c

r4679	r4680
82	82	time_released = timer_get_time(machine);
83	83
84	84	if (!mask)
85		cpu_set_input_line(machine->cpu[0], INPUT_LINE_NMI, PULSE_LINE);
	85	cputag_set_input_line(machine, "maincpu", INPUT_LINE_NMI, PULSE_LINE);
86	86	}
87	87	else
88	88	time_pushed = timer_get_time(machine);
r4679	r4680
98	98
99	99	update_plunger(machine);
100	100
101		generic_pulse_irq_line(machine->cpu[0], 0);
	101	generic_pulse_irq_line(cputag_get_cpu(machine, "maincpu"), 0);
102	102
103	103	scanline = scanline + 32;
104	104

src/mame/drivers/deco_mlc.c

r4679	r4680
177	177	static TIMER_CALLBACK( interrupt_gen )
178	178	{
179	179	//  logerror("hit scanline IRQ %d (%08x)\n", video_screen_get_vpos(machine->primary_screen), info.i);
180		cpu_set_input_line(machine->cpu[0], mainCpuIsArm ? ARM_IRQ_LINE : 1, HOLD_LINE);
	180	cputag_set_input_line(machine, "maincpu", mainCpuIsArm ? ARM_IRQ_LINE : 1, HOLD_LINE);
181	181	}
182	182
183	183	static WRITE32_HANDLER( mlc_irq_w )
r4679	r4680
189	189	switch (offset*4)
190	190	{
191	191	case 0x10: /* IRQ ack.  Value written doesn't matter */
192		cpu_set_input_line(space->machine->cpu[0], mainCpuIsArm ? ARM_IRQ_LINE : 1, CLEAR_LINE);
	192	cputag_set_input_line(space->machine, "maincpu", mainCpuIsArm ? ARM_IRQ_LINE : 1, CLEAR_LINE);
193	193	return;
194	194	case 0x14: /* Prepare scanline interrupt */
195	195	timer_adjust_oneshot(raster_irq_timer,video_screen_get_time_until_pos(space->machine->primary_screen, irq_ram[0x14/4], 0),0);
r4679	r4680
264	264
265	265	/******************************************************************************/
266	266
267		static ADDRESS_MAP_START( readmem, ADDRESS_SPACE_PROGRAM, 32 )
268		AM_RANGE(0x0000000, 0x00fffff) AM_READ(SMH_ROM) AM_MIRROR(0xff000000)
269		AM_RANGE(0x0100000, 0x011ffff) AM_READ(SMH_RAM) AM_MIRROR(0xff000000)
	267	static ADDRESS_MAP_START( decomlc_map, ADDRESS_SPACE_PROGRAM, 32 )
	268	AM_RANGE(0x0000000, 0x00fffff) AM_ROM AM_MIRROR(0xff000000)
	269	AM_RANGE(0x0100000, 0x011ffff) AM_RAM AM_BASE(&mlc_ram) AM_MIRROR(0xff000000)
270	270	AM_RANGE(0x0200000, 0x020000f) AM_READNOP AM_MIRROR(0xff000000)/* IRQ control? */
271	271	AM_RANGE(0x0200070, 0x0200073) AM_READ(decomlc_vbl_r) AM_MIRROR(0xff000000)
272	272	AM_RANGE(0x0200074, 0x0200077) AM_READ(mlc_scanline_r) AM_MIRROR(0xff000000)
273	273	AM_RANGE(0x0200078, 0x020007f) AM_READ(test2_r)   AM_MIRROR(0xff000000)
274		AM_RANGE(0x0200080, 0x02000ff) AM_READ(SMH_RAM) AM_MIRROR(0xff000000)
275		AM_RANGE(0x0204000, 0x0206fff) AM_READ(mlc_spriteram_r) AM_MIRROR(0xff000000)
276		AM_RANGE(0x0200080, 0x02000ff) AM_READ(SMH_RAM) AM_MIRROR(0xff000000)
277		AM_RANGE(0x0280000, 0x029ffff) AM_READ(mlc_vram_r) AM_MIRROR(0xff000000)
278		AM_RANGE(0x0300000, 0x0307fff) AM_READ(SMH_RAM) AM_MIRROR(0xff000000)
	274	AM_RANGE(0x0200000, 0x020007f) AM_WRITE(mlc_irq_w) AM_BASE(&irq_ram) AM_MIRROR(0xff000000)
	275	AM_RANGE(0x0200080, 0x02000ff) AM_RAM AM_BASE(&mlc_clip_ram) AM_MIRROR(0xff000000)
	276	AM_RANGE(0x0204000, 0x0206fff) AM_READWRITE(mlc_spriteram_r, SMH_RAM) AM_BASE(&spriteram32) AM_SIZE(&spriteram_size) AM_MIRROR(0xff000000)
	277	AM_RANGE(0x0280000, 0x029ffff) AM_READWRITE(mlc_vram_r, SMH_RAM) AM_BASE(&mlc_vram) AM_MIRROR(0xff000000)
	278	AM_RANGE(0x0300000, 0x0307fff) AM_RAM_WRITE(avengrs_palette_w) AM_BASE(&paletteram32) AM_MIRROR(0xff000000)
279	279	AM_RANGE(0x0400000, 0x0400003) AM_READ_PORT("INPUTS") AM_MIRROR(0xff000000)
280	280	AM_RANGE(0x0440000, 0x044001f) AM_READ(test3_r)   AM_MIRROR(0xff000000)
281		AM_RANGE(0x0600000, 0x0600007) AM_DEVREAD8("ymz", ymz280b_r, 0xff000000) AM_MIRROR(0xff000000)
282		AM_RANGE(0x070f000, 0x070ffff) AM_READ(stadhr96_prot_146_r) AM_MIRROR(0xff000000)
283		ADDRESS_MAP_END
284
285		static ADDRESS_MAP_START( writemem, ADDRESS_SPACE_PROGRAM, 32 )
286		AM_RANGE(0x0000000, 0x00fffff) AM_WRITE(SMH_ROM) AM_MIRROR(0xff000000)
287		AM_RANGE(0x0100000, 0x011ffff) AM_WRITE(SMH_RAM) AM_BASE(&mlc_ram) AM_MIRROR(0xff000000)
288		AM_RANGE(0x0200000, 0x020007f) AM_WRITE(mlc_irq_w) AM_BASE(&irq_ram) AM_MIRROR(0xff000000)
289		AM_RANGE(0x0200080, 0x02000ff) AM_WRITE(SMH_RAM) AM_BASE(&mlc_clip_ram) AM_MIRROR(0xff000000)
290		AM_RANGE(0x0204000, 0x0206fff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram32) AM_SIZE(&spriteram_size) AM_MIRROR(0xff000000)
291		AM_RANGE(0x0280000, 0x029ffff) AM_WRITE(SMH_RAM) AM_BASE(&mlc_vram) AM_MIRROR(0xff000000)
292		AM_RANGE(0x0300000, 0x0307fff) AM_WRITE(avengrs_palette_w) AM_BASE(&paletteram32) AM_MIRROR(0xff000000)
293	281	AM_RANGE(0x044001c, 0x044001f) AM_WRITENOP AM_MIRROR(0xff000000)
294	282	AM_RANGE(0x0500000, 0x0500003) AM_WRITE(avengrs_eprom_w) AM_MIRROR(0xff000000)
295		AM_RANGE(0x0600000, 0x0600007) AM_DEVWRITE8("ymz", ymz280b_w, 0xff000000) AM_MIRROR(0xff000000)
	283	AM_RANGE(0x0600000, 0x0600007) AM_DEVREADWRITE8("ymz", ymz280b_r, ymz280b_w, 0xff000000) AM_MIRROR(0xff000000)
	284	AM_RANGE(0x070f000, 0x070ffff) AM_READ(stadhr96_prot_146_r) AM_MIRROR(0xff000000)
296	285	//  AM_RANGE(0x070f000, 0x070ffff) AM_READ(stadhr96_prot_146_w) AM_BASE(&deco32_prot_ram)
297	286	ADDRESS_MAP_END
298	287
r4679	r4680
415	404
416	405	/* basic machine hardware */
417	406	MDRV_CPU_ADD("maincpu", SH2,42000000/2) /* 21 MHz clock confirmed on real board */
418		MDRV_CPU_PROGRAM_MAP(readmem,writemem)
	407	MDRV_CPU_PROGRAM_MAP(decomlc_map,0)
419	408
420	409	MDRV_MACHINE_RESET(mlc)
421	410	MDRV_NVRAM_HANDLER(mlc) /* Actually 93c45 */
r4679	r4680
446	435
447	436	/* basic machine hardware */
448	437	MDRV_CPU_ADD("maincpu", ARM,42000000/6) /* 42 MHz -> 7MHz clock confirmed on real board */
449		MDRV_CPU_PROGRAM_MAP(readmem,writemem)
	438	MDRV_CPU_PROGRAM_MAP(decomlc_map,0)
450	439
451	440	MDRV_MACHINE_RESET(mlc)
452	441	MDRV_NVRAM_HANDLER(mlc) /* Actually 93c45 */
r4679	r4680
708	697	/* the same as simpl156 / heavy smash? */
709	698	UINT8 *rom = memory_region(machine, "ymz");
710	699	int length = memory_region_length(machine, "ymz");
711		UINT8 *buf1 = malloc_or_die(length);
	700	UINT8 *buf1 = alloc_array_or_die(UINT8, length);
712	701
713	702	UINT32 x;
714	703
r4679	r4680
744	733	static DRIVER_INIT( avengrgs )
745	734	{
746	735	// init options
747		sh2drc_set_options(machine->cpu[0], SH2DRC_FASTEST_OPTIONS);
	736	sh2drc_set_options(cputag_get_cpu(machine, "maincpu"), SH2DRC_FASTEST_OPTIONS);
748	737
749	738	// set up speed cheat
750		sh2drc_add_pcflush(machine->cpu[0], 0x3234);
751		sh2drc_add_pcflush(machine->cpu[0], 0x32dc);
	739	sh2drc_add_pcflush(cputag_get_cpu(machine, "maincpu"), 0x3234);
	740	sh2drc_add_pcflush(cputag_get_cpu(machine, "maincpu"), 0x32dc);
752	741
753		mainCpuIsArm=0;
754		memory_install_read32_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x01089a0, 0x01089a3, 0, 0, avengrgs_speedup_r );
	742	mainCpuIsArm = 0;
	743	memory_install_read32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x01089a0, 0x01089a3, 0, 0, avengrgs_speedup_r );
755	744	descramble_sound(machine);
756	745	}
757	746
r4679	r4680
760	749	/* The timing in the ARM core isn't as accurate as it should be, so bump up the
761	750	effective clock rate here to compensate otherwise we have slowdowns in
762	751	Skull Fung where there probably shouldn't be. */
763		cpu_set_clockscale(machine->cpu[0], 2.0f);
764		mainCpuIsArm=1;
	752	cpu_set_clockscale(cputag_get_cpu(machine, "maincpu"), 2.0f);
	753	mainCpuIsArm = 1;
765	754	deco156_decrypt(machine);
766	755	descramble_sound(machine);
767	756	}

src/mame/drivers/tryout.c

r4679	r4680
30	30
31	31	static WRITE8_HANDLER( tryout_nmi_ack_w )
32	32	{
33		cpu_set_input_line(space->machine->cpu[0], INPUT_LINE_NMI, CLEAR_LINE );
	33	cputag_set_input_line(space->machine, "maincpu", INPUT_LINE_NMI, CLEAR_LINE );
34	34	}
35	35
36	36	static WRITE8_HANDLER( tryout_sound_w )
37	37	{
38		soundlatch_w(space,0,data);
39		cpu_set_input_line(space->machine->cpu[1], 0, HOLD_LINE);
	38	soundlatch_w(space, 0, data);
	39	cputag_set_input_line(space->machine, "audiocpu", 0, HOLD_LINE);
40	40	}
41	41
42	42	/*this is actually irq/nmi mask, polls only four values at start up (81->01->81->01) and then
43	43	stays on this state.*/
44	44	static WRITE8_HANDLER( tryout_sound_irq_ack_w )
45	45	{
46		//  cpu_set_input_line(space->machine->cpu[1], 0, CLEAR_LINE);
	46	//  cputag_set_input_line(space->machine, "audiocpu", 0, CLEAR_LINE);
47	47	}
48	48
49	49	static WRITE8_HANDLER( tryout_bankswitch_w )
r4679	r4680
52	52	int bankaddress;
53	53
54	54	bankaddress = 0x10000 + (data & 0x01) * 0x2000;
55		memory_set_bankptr(space->machine, 1,&RAM[bankaddress]);
	55	memory_set_bankptr(space->machine, 1, &RAM[bankaddress]);
56	56	}
57	57
58	58	static ADDRESS_MAP_START( main_cpu, ADDRESS_SPACE_PROGRAM, 8 )

src/mame/drivers/pasha2.c

r4679	r4680
315	315
316	316	static VIDEO_START( pasha2 )
317	317	{
318		bitmap0 = auto_malloc(0x40000);
319		bitmap1 = auto_malloc(0x40000);
	318	bitmap0 = auto_alloc_array(machine, UINT16, 0x40000/2);
	319	bitmap1 = auto_alloc_array(machine, UINT16, 0x40000/2);
320	320	}
321	321
322	322	static VIDEO_UPDATE( pasha2 )
r4679	r4680
445	445
446	446	static DRIVER_INIT( pasha2 )
447	447	{
448		memory_install_read16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x95744, 0x95747, 0, 0, pasha2_speedup_r );
	448	memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x95744, 0x95747, 0, 0, pasha2_speedup_r );
449	449
450	450	memory_set_bankptr(machine, 1, memory_region(machine, "user2"));
451	451	}

src/mame/drivers/rungun.c

r4679	r4680
159	159	}
160	160
161	161	if (!(data & 0x40))
162		cpu_set_input_line(space->machine->cpu[0], M68K_IRQ_5, CLEAR_LINE);
	162	cputag_set_input_line(space->machine, "maincpu", M68K_IRQ_5, CLEAR_LINE);
163	163	break;
164	164
165	165	case 0x0c/2:
r4679	r4680
177	177	static WRITE16_HANDLER( sound_cmd1_w )
178	178	{
179	179	if (ACCESSING_BITS_8_15)
180		soundlatch_w(space, 0, data>>8);
	180	soundlatch_w(space, 0, data >> 8);
181	181	}
182	182
183	183	static WRITE16_HANDLER( sound_cmd2_w )
r4679	r4680
189	189	static WRITE16_HANDLER( sound_irq_w )
190	190	{
191	191	if (ACCESSING_BITS_8_15)
192		cpu_set_input_line(space->machine->cpu[1], 0, HOLD_LINE);
	192	cputag_set_input_line(space->machine, "soundcpu", 0, HOLD_LINE);
193	193	}
194	194
195	195	static READ16_HANDLER( sound_status_msb_r )
196	196	{
197	197	if (ACCESSING_BITS_8_15)
198		return(rng_sound_status<<8);
	198	return(rng_sound_status << 8);
199	199
200	200	return(0);
201	201	}
r4679	r4680
206	206	cpu_set_input_line(device, M68K_IRQ_5, ASSERT_LINE);
207	207	}
208	208
209		static ADDRESS_MAP_START( rngreadmem, ADDRESS_SPACE_PROGRAM, 16 )
210		AM_RANGE(0x000000, 0x2fffff) AM_READ(SMH_ROM)      // main program + data
211		AM_RANGE(0x300000, 0x3007ff) AM_READ(SMH_RAM)      // palette RAM
212		AM_RANGE(0x380000, 0x39ffff) AM_READ(SMH_RAM)      // work RAM
213		AM_RANGE(0x400000, 0x43ffff) AM_READNOP      // K053936_0_rom_r }, // '936 ROM readback window
214		AM_RANGE(0x480000, 0x48001f) AM_READ(rng_sysregs_r)
215		AM_RANGE(0x4c0000, 0x4c001f) AM_READ(K053252_word_r)   // CCU (for scanline and vblank polling)
	209	static ADDRESS_MAP_START( rungun_map, ADDRESS_SPACE_PROGRAM, 16 )
	210	AM_RANGE(0x000000, 0x2fffff) AM_ROM                                 // main program + data
	211	AM_RANGE(0x300000, 0x3007ff) AM_RAM_WRITE(paletteram16_xBBBBBGGGGGRRRRR_word_w) AM_BASE(&paletteram16)
	212	AM_RANGE(0x380000, 0x39ffff) AM_RAM                                 // work RAM
	213	AM_RANGE(0x400000, 0x43ffff) AM_READNOP   // AM_READ( K053936_0_rom_r )       // '936 ROM readback window
	214	AM_RANGE(0x480000, 0x48001f) AM_READWRITE(rng_sysregs_r,rng_sysregs_w) AM_BASE(&rng_sysreg)
	215	AM_RANGE(0x4c0000, 0x4c001f) AM_READ(K053252_word_r)                  // CCU (for scanline and vblank polling)
	216	AM_RANGE(0x540000, 0x540001) AM_WRITE(sound_irq_w)
	217	AM_RANGE(0x58000c, 0x58000d) AM_WRITE(sound_cmd1_w)
	218	AM_RANGE(0x58000e, 0x58000f) AM_WRITE(sound_cmd2_w)
216	219	AM_RANGE(0x580014, 0x580015) AM_READ(sound_status_msb_r)
217		AM_RANGE(0x580000, 0x58001f) AM_READ(SMH_RAM)      // sound regs read fall-through
218		AM_RANGE(0x5c0000, 0x5c000d) AM_READ(K053246_word_r)   // 246A ROM readback window
219		AM_RANGE(0x600000, 0x600fff) AM_READ(K053247_word_r)   // OBJ RAM
220		AM_RANGE(0x601000, 0x601fff) AM_READ(SMH_RAM)      // communication? second monitor buffer?
221		AM_RANGE(0x6c0000, 0x6cffff) AM_READ(SMH_RAM)      // PSAC2 render RAM
222		AM_RANGE(0x700000, 0x7007ff) AM_READ(SMH_RAM)      // PSAC2 line effect
223		AM_RANGE(0x740000, 0x741fff) AM_READ(rng_ttl_ram_r)      // text plane RAM
	220	AM_RANGE(0x580000, 0x58001f) AM_RAM                                 // sound regs read/write fall-through
	221	AM_RANGE(0x5c0000, 0x5c000d) AM_READ(K053246_word_r)                  // 246A ROM readback window
	222	AM_RANGE(0x5c0010, 0x5c001f) AM_WRITE(K053247_reg_word_w)
	223	AM_RANGE(0x600000, 0x600fff) AM_READWRITE(K053247_word_r,K053247_word_w)   // OBJ RAM
	224	AM_RANGE(0x601000, 0x601fff) AM_RAM                                 // communication? second monitor buffer?
	225	AM_RANGE(0x640000, 0x640007) AM_WRITE(K053246_word_w)                  // '246A registers
	226	AM_RANGE(0x680000, 0x68001f) AM_WRITEONLY AM_BASE(&K053936_0_ctrl)         // '936 registers
	227	AM_RANGE(0x6c0000, 0x6cffff) AM_RAM_WRITE(rng_936_videoram_w) AM_BASE(&rng_936_videoram)   // PSAC2 ('936) RAM (34v + 35v)
	228	AM_RANGE(0x700000, 0x7007ff) AM_RAM AM_BASE(&K053936_0_linectrl)         // PSAC "Line RAM"
	229	AM_RANGE(0x740000, 0x741fff) AM_READWRITE(rng_ttl_ram_r,rng_ttl_ram_w)      // text plane RAM
	230	AM_RANGE(0x7c0000, 0x7c0001) AM_WRITENOP                           // watchdog
224	231	#if RNG_DEBUG
225	232	AM_RANGE(0x5c0010, 0x5c001f) AM_READ(K053247_reg_word_r)
226	233	AM_RANGE(0x640000, 0x640007) AM_READ(K053246_reg_word_r)
227	234	#endif
228	235	ADDRESS_MAP_END
229	236
230		static ADDRESS_MAP_START( rngwritemem, ADDRESS_SPACE_PROGRAM, 16 )
231		AM_RANGE(0x000000, 0x2fffff) AM_WRITE(SMH_ROM)
232		AM_RANGE(0x300000, 0x3007ff) AM_WRITE(paletteram16_xBBBBBGGGGGRRRRR_word_w) AM_BASE(&paletteram16)
233		AM_RANGE(0x380000, 0x39ffff) AM_WRITE(SMH_RAM)      // work RAM
234		AM_RANGE(0x480000, 0x48001f) AM_WRITE(rng_sysregs_w) AM_BASE(&rng_sysreg)
235		AM_RANGE(0x4c0000, 0x4c001f) AM_WRITE(K053252_word_w)   // CCU
236		AM_RANGE(0x540000, 0x540001) AM_WRITE(sound_irq_w)
237		AM_RANGE(0x58000c, 0x58000d) AM_WRITE(sound_cmd1_w)
238		AM_RANGE(0x58000e, 0x58000f) AM_WRITE(sound_cmd2_w)
239		AM_RANGE(0x580000, 0x58001f) AM_WRITE(SMH_RAM)      // sound regs write fall-through
240		AM_RANGE(0x5c0010, 0x5c001f) AM_WRITE(K053247_reg_word_w)
241		AM_RANGE(0x600000, 0x600fff) AM_WRITE(K053247_word_w)   // OBJ RAM
242		AM_RANGE(0x601000, 0x601fff) AM_WRITE(SMH_RAM)      // communication? second monitor buffer?
243		AM_RANGE(0x640000, 0x640007) AM_WRITE(K053246_word_w)   // '246A registers
244		AM_RANGE(0x680000, 0x68001f) AM_WRITE(SMH_RAM) AM_BASE(&K053936_0_ctrl)            // '936 registers
245		AM_RANGE(0x6c0000, 0x6cffff) AM_WRITE(rng_936_videoram_w) AM_BASE(&rng_936_videoram)   // PSAC2 ('936) RAM (34v + 35v)
246		AM_RANGE(0x700000, 0x7007ff) AM_WRITE(SMH_RAM) AM_BASE(&K053936_0_linectrl)         // "Line RAM"
247		AM_RANGE(0x740000, 0x741fff) AM_WRITE(rng_ttl_ram_w)      // text plane RAM
248		AM_RANGE(0x7c0000, 0x7c0001) AM_WRITENOP      // watchdog
249		ADDRESS_MAP_END
250	237
251	238	/**********************************************************************************/
252	239
r4679	r4680
262	249	memory_set_bankptr(space->machine, 2, memory_region(space->machine, "soundcpu") + 0x10000 + (data & 0x07) * 0x4000);
263	250
264	251	if (data & 0x10)
265		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_NMI, CLEAR_LINE);
	252	cputag_set_input_line(space->machine, "soundcpu", INPUT_LINE_NMI, CLEAR_LINE);
266	253	}
267	254
268	255	static INTERRUPT_GEN(audio_interrupt)
r4679	r4680
274	261
275	262	/* sound (this should be split into audio/xexex.c or pregx.c or so someday) */
276	263
277		static ADDRESS_MAP_START( sound_readmem, ADDRESS_SPACE_PROGRAM, 8 )
278		AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM)
279		AM_RANGE(0x8000, 0xbfff) AM_READ(SMH_BANK2)
280		AM_RANGE(0xc000, 0xdfff) AM_READ(SMH_RAM)
281		AM_RANGE(0xe000, 0xe22f) AM_DEVREAD("konami1", k054539_r)
282		AM_RANGE(0xe230, 0xe3ff) AM_READ(SMH_RAM)
283		AM_RANGE(0xe400, 0xe62f) AM_DEVREAD("konami2", k054539_r)
284		AM_RANGE(0xe630, 0xe7ff) AM_READ(SMH_RAM)
	264	static ADDRESS_MAP_START( rungun_sound_map, ADDRESS_SPACE_PROGRAM, 8 )
	265	AM_RANGE(0x0000, 0x7fff) AM_ROM
	266	AM_RANGE(0x8000, 0xbfff) AM_ROMBANK(2)
	267	AM_RANGE(0xc000, 0xdfff) AM_RAM
	268	AM_RANGE(0xe000, 0xe22f) AM_DEVREADWRITE("konami1", k054539_r,k054539_w)
	269	AM_RANGE(0xe230, 0xe3ff) AM_RAM
	270	AM_RANGE(0xe400, 0xe62f) AM_DEVREADWRITE("konami2", k054539_r,k054539_w)
	271	AM_RANGE(0xe630, 0xe7ff) AM_RAM
	272	AM_RANGE(0xf000, 0xf000) AM_WRITE(sound_status_w)
285	273	AM_RANGE(0xf002, 0xf002) AM_READ(soundlatch_r)
286	274	AM_RANGE(0xf003, 0xf003) AM_READ(soundlatch2_r)
287		ADDRESS_MAP_END
288
289		static ADDRESS_MAP_START( sound_writemem, ADDRESS_SPACE_PROGRAM, 8 )
290		AM_RANGE(0x0000, 0xbfff) AM_WRITE(SMH_ROM)
291		AM_RANGE(0xc000, 0xdfff) AM_WRITE(SMH_RAM)
292		AM_RANGE(0xe000, 0xe22f) AM_DEVWRITE("konami1", k054539_w)
293		AM_RANGE(0xe230, 0xe3ff) AM_WRITE(SMH_RAM)
294		AM_RANGE(0xe400, 0xe62f) AM_DEVWRITE("konami2", k054539_w)
295		AM_RANGE(0xe630, 0xe7ff) AM_WRITE(SMH_RAM)
296		AM_RANGE(0xf000, 0xf000) AM_WRITE(sound_status_w)
297	275	AM_RANGE(0xf800, 0xf800) AM_WRITE(z80ctrl_w)
298	276	AM_RANGE(0xfff0, 0xfff3) AM_WRITENOP
299	277	ADDRESS_MAP_END
300	278
	279
301	280	static const k054539_interface k054539_config =
302	281	{
303	282	"shared"
r4679	r4680
326	305
327	306	/* basic machine hardware */
328	307	MDRV_CPU_ADD("maincpu", M68000, 16000000)
329		MDRV_CPU_PROGRAM_MAP(rngreadmem,rngwritemem)
	308	MDRV_CPU_PROGRAM_MAP(rungun_map,0)
330	309	MDRV_CPU_VBLANK_INT("screen", rng_interrupt)
331	310
332	311	MDRV_CPU_ADD("soundcpu", Z80, 10000000) // 8Mhz (10Mhz is much safer in self-test due to heavy sync)
333		MDRV_CPU_PROGRAM_MAP(sound_readmem,sound_writemem)
	312	MDRV_CPU_PROGRAM_MAP(rungun_sound_map,0)
334	313	MDRV_CPU_PERIODIC_INT(audio_interrupt, 480)
335	314
336	315	MDRV_QUANTUM_TIME(HZ(6000)) // higher if sound stutters

src/mame/drivers/sfbonus.c

r4679	r4680
434	434
435	435	static VIDEO_START(sfbonus)
436	436	{
437		temp_reel_bitmap = auto_bitmap_alloc(1024,512,BITMAP_FORMAT_INDEXED16);
	437	temp_reel_bitmap = auto_bitmap_alloc(machine,1024,512,BITMAP_FORMAT_INDEXED16);
438	438
439	439	sfbonus_tilemap = tilemap_create(machine,get_sfbonus_tile_info,tilemap_scan_rows,8,8, 128, 64);
440	440	sfbonus_reel_tilemap = tilemap_create(machine,get_sfbonus_reel_tile_info,tilemap_scan_rows,8,32, 64, 16);
r4679	r4680
5086	5086
5087	5087	static DRIVER_INIT( sfbonus_common)
5088	5088	{
5089		sfbonus_tilemap_ram = auto_malloc(0x4000);
	5089	sfbonus_tilemap_ram = auto_alloc_array(machine, UINT8, 0x4000);
5090	5090	memset(sfbonus_tilemap_ram,0xff,0x4000);
5091	5091	state_save_register_global_pointer(machine, sfbonus_tilemap_ram , 0x4000);
5092	5092
5093		sfbonus_reel_ram = auto_malloc(0x0800);
	5093	sfbonus_reel_ram = auto_alloc_array(machine, UINT8, 0x0800);
5094	5094	memset(sfbonus_reel_ram,0xff,0x0800);
5095	5095	state_save_register_global_pointer(machine, sfbonus_reel_ram , 0x0800);
5096	5096
5097		sfbonus_reel2_ram = auto_malloc(0x0800);
	5097	sfbonus_reel2_ram = auto_alloc_array(machine, UINT8, 0x0800);
5098	5098	memset(sfbonus_reel2_ram,0xff,0x0800);
5099	5099	state_save_register_global_pointer(machine, sfbonus_reel2_ram , 0x0800);
5100	5100
5101		sfbonus_reel3_ram = auto_malloc(0x0800);
	5101	sfbonus_reel3_ram = auto_alloc_array(machine, UINT8, 0x0800);
5102	5102	memset(sfbonus_reel3_ram,0xff,0x0800);
5103	5103	state_save_register_global_pointer(machine, sfbonus_reel3_ram , 0x0800);
5104	5104
5105		sfbonus_reel4_ram = auto_malloc(0x0800);
	5105	sfbonus_reel4_ram = auto_alloc_array(machine, UINT8, 0x0800);
5106	5106	memset(sfbonus_reel4_ram,0xff,0x0800);
5107	5107	state_save_register_global_pointer(machine, sfbonus_reel4_ram , 0x0800);
5108	5108
5109	5109	// hack, because the debugger is broken
5110	5110	sfbonus_videoram = memory_region(machine,"debugram");
5111		if (!sfbonus_videoram) sfbonus_videoram = auto_malloc(0x10000);
	5111	if (!sfbonus_videoram) sfbonus_videoram = auto_alloc_array(machine, UINT8, 0x10000);
5112	5112
5113	5113	memset(sfbonus_videoram,0xff,0x10000);
5114	5114

src/mame/drivers/crystal.c

r4679	r4680
141	141
142	142	static void IntReq(running_machine *machine, int num)
143	143	{
144		const address_space *space = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM);
	144	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
145	145	UINT32 IntEn=memory_read_dword(space, 0x01800c08);
146	146	UINT32 IntPend=memory_read_dword(space, 0x01800c0c);
147		if(IntEn&(1<<num))
	147	if(IntEn & (1 << num))
148	148	{
149		IntPend|=(1<<num);
150		memory_write_dword(space,0x01800c0c,IntPend);
151		cpu_set_input_line(machine->cpu[0],SE3208_INT,ASSERT_LINE);
	149	IntPend |= (1 << num);
	150	memory_write_dword(space, 0x01800c0c, IntPend);
	151	cputag_set_input_line(machine, "maincpu", SE3208_INT, ASSERT_LINE);
152	152	}
153	153	#ifdef IDLE_LOOP_SPEEDUP
154		FlipCntRead=0;
155		cpu_resume(machine->cpu[0],SUSPEND_REASON_SPIN);
	154	FlipCntRead = 0;
	155	cputag_resume(machine, "maincpu", SUSPEND_REASON_SPIN);
156	156	#endif
157	157	}
158	158
159	159	static READ32_HANDLER(FlipCount_r)
160	160	{
161	161	#ifdef IDLE_LOOP_SPEEDUP
162		UINT32 IntPend=memory_read_dword(space, 0x01800c0c);
	162	UINT32 IntPend = memory_read_dword(space, 0x01800c0c);
163	163	FlipCntRead++;
164		if(FlipCntRead>=16 && !IntPend && FlipCount!=0)
165		cpu_suspend(space->machine->cpu[0],SUSPEND_REASON_SPIN,1);
	164	if(FlipCntRead >= 16 && !IntPend && FlipCount != 0)
	165	cputag_suspend(space->machine, "maincpu", SUSPEND_REASON_SPIN, 1);
166	166	#endif
167	167	return ((UINT32) FlipCount)<<16;
168	168	}
169	169
170	170	static WRITE32_HANDLER(FlipCount_w)
171	171	{
172		if(mem_mask&0x00ff0000)
	172	if(mem_mask & 0x00ff0000)
173	173	{
174		int fc=(data>>16)&0xff;
175		if(fc==1)
	174	int fc = (data >> 16) & 0xff;
	175	if(fc == 1)
176	176	FlipCount++;
177		else if(fc==0)
178		FlipCount=0;
	177	else if(fc == 0)
	178	FlipCount = 0;
179	179	}
180	180	}
181	181
r4679	r4680
193	193	if(!(Port4 & 0x20) && ((OldPort4^Port4) & 0x20))
194	194	IntReq(space->machine, 19);
195	195	OldPort4 = Port4;
196		return /*dips*/input_port_read(space->machine, "DSW")|(Port4<<16);
	196	return /*dips*/input_port_read(space->machine, "DSW") | (Port4 << 16);
197	197	}
198	198	return 0;
199	199	}
200	200
201	201	static WRITE32_HANDLER(IntAck_w)
202	202	{
203		UINT32 IntPend=memory_read_dword(space, 0x01800c0c);
204		if(mem_mask&0xff)
	203	UINT32 IntPend = memory_read_dword(space, 0x01800c0c);
	204	if(mem_mask & 0xff)
205	205	{
206		IntPend&=~(1<<(data&0x1f));
207		memory_write_dword(space, 0x01800c0c,IntPend);
	206	IntPend &= ~(1 << (data & 0x1f));
	207	memory_write_dword(space, 0x01800c0c, IntPend);
208	208	if(!IntPend)
209		cpu_set_input_line(space->machine->cpu[0],SE3208_INT,CLEAR_LINE);
	209	cputag_set_input_line(space->machine, "maincpu", SE3208_INT, CLEAR_LINE);
210	210	}
211		if(mem_mask&0xff00)
212		IntHigh=(data>>8)&7;
	211	if(mem_mask & 0xff00)
	212	IntHigh = (data >> 8) & 7;
213	213	}
214	214
215	215	static IRQ_CALLBACK(icallback)
216	216	{
217	217	const address_space *space = cpu_get_address_space(device, ADDRESS_SPACE_PROGRAM);
218		UINT32 IntPend=memory_read_dword(space, 0x01800c0c);
	218	UINT32 IntPend = memory_read_dword(space, 0x01800c0c);
219	219	int i;
220	220
221		for(i=0;i<32;++i)
	221	for(i = 0; i < 32; ++i)
222	222	{
223		if(IntPend&(1<<i))
	223	if(IntPend & (1 << i))
224	224	{
225		return (IntHigh<<5)|i;
	225	return (IntHigh << 5) | i;
226	226	}
227	227	}
228	228	return 0;      //This should never happen
r4679	r4680
443	443	AM_RANGE(0x04800000, 0x04800fff) AM_DEVREADWRITE("vrender", vr0_snd_read, vr0_snd_write)
444	444
445	445	AM_RANGE(0x05000000, 0x05000003) AM_READ(FlashCmd_r) AM_WRITE(FlashCmd_w)
446		AM_RANGE(0x05000000, 0x05ffffff) AM_READ(SMH_BANK1)
	446	AM_RANGE(0x05000000, 0x05ffffff) AM_READ(SMH_BANK(1))
447	447
448	448	AM_RANGE(0x44414F4C, 0x44414F7F) AM_RAM AM_BASE(&ResetPatch)
449	449
r4679	r4680
501	501	{
502	502	int i;
503	503
504		cpu_set_irq_callback(machine->cpu[0],icallback);
505		for (i=0; i<4; i++)
	504	cpu_set_irq_callback(cputag_get_cpu(machine, "maincpu"), icallback);
	505	for (i = 0; i < 4; i++)
506	506	Timer[i] = timer_alloc(machine, Timercb, (void*)(FPTR)i);
507	507
508	508	PatchReset();
r4679	r4680
512	512	{
513	513	int i;
514	514
515		memset(sysregs,0,0x10000);
516		memset(vidregs,0,0x10000);
517		FlipCount=0;
518		IntHigh=0;
519		cpu_set_irq_callback(machine->cpu[0],icallback);
520		Bank=0;
521		memory_set_bankptr(machine, 1,memory_region(machine, "user1")+0);
522		FlashCmd=0xff;
523		OldPort4=0;
	515	memset(sysregs, 0, 0x10000);
	516	memset(vidregs, 0, 0x10000);
	517	FlipCount = 0;
	518	IntHigh = 0;
	519	cpu_set_irq_callback(cputag_get_cpu(machine, "maincpu"), icallback);
	520	Bank = 0;
	521	memory_set_bankptr(machine, 1, memory_region(machine, "user1") + 0);
	522	FlashCmd = 0xff;
	523	OldPort4 = 0;
524	524
525		DMActrl[0]=0;
526		DMActrl[1]=0;
	525	DMActrl[0] = 0;
	526	DMActrl[1] = 0;
527	527
528		for (i=0; i<4; i++)
	528	for (i = 0; i < 4; i++)
529	529	{
530		Timerctrl[i]=0;
531		timer_adjust_oneshot(Timer[i],attotime_never,0);
	530	Timerctrl[i] = 0;
	531	timer_adjust_oneshot(Timer[i], attotime_never, 0);
532	532	}
533	533
534		vr0_snd_set_areas(devtag_get_device(machine, "vrender"), textureram,frameram);
	534	vr0_snd_set_areas(devtag_get_device(machine, "vrender"), textureram, frameram);
535	535	#ifdef IDLE_LOOP_SPEEDUP
536		FlipCntRead=0;
	536	FlipCntRead = 0;
537	537	#endif
538	538
539	539	PatchReset();
r4679	r4680
545	545
546	546	static UINT16 GetVidReg(const address_space *space, UINT16 reg)
547	547	{
548		return memory_read_word(space,0x03000000+reg);
	548	return memory_read_word(space, 0x03000000 + reg);
549	549	}
550	550
551		static void SetVidReg(const address_space *space, UINT16 reg,UINT16 val)
	551	static void SetVidReg(const address_space *space, UINT16 reg, UINT16 val)
552	552	{
553		memory_write_word(space,0x03000000+reg,val);
	553	memory_write_word(space, 0x03000000 + reg, val);
554	554	}
555	555
556	556
557	557	static VIDEO_UPDATE(crystal)
558	558	{
559		const address_space *space = cpu_get_address_space(screen->machine->cpu[0], ADDRESS_SPACE_PROGRAM);
	559	const address_space *space = cputag_get_address_space(screen->machine, "maincpu", ADDRESS_SPACE_PROGRAM);
560	560	int DoFlip;
561	561
562	562
563		UINT32 B0=0x0;
564		UINT32 B1=(GetVidReg(space,0x90)&0x8000)?0x400000:0x100000;
565		UINT16 *Front,*Back;
566		UINT16 *Visible,*DrawDest;
	563	UINT32 B0 = 0x0;
	564	UINT32 B1 = (GetVidReg(space, 0x90) & 0x8000) ? 0x400000 : 0x100000;
	565	UINT16 *Front, *Back;
	566	UINT16 *Visible, *DrawDest;
567	567	UINT16 *srcline;
568	568	int y;
569		UINT16 head,tail;
570		UINT32 width=video_screen_get_width(screen);
	569	UINT16 head, tail;
	570	UINT32 width = video_screen_get_width(screen);
571	571
572		if(GetVidReg(space,0x8e)&1)
	572	if(GetVidReg(space, 0x8e) & 1)
573	573	{
574		Front=(UINT16*) (frameram+B1/4);
575		Back=(UINT16*) (frameram+B0/4);
	574	Front = (UINT16*) (frameram + B1 / 4);
	575	Back  = (UINT16*) (frameram + B0 / 4);
576	576	}
577	577	else
578	578	{
579		Front=(UINT16*) (frameram+B0/4);
580		Back=(UINT16*) (frameram+B1/4);
	579	Front = (UINT16*) (frameram + B0 / 4);
	580	Back  = (UINT16*) (frameram + B1 / 4);
581	581	}
582	582
583		Visible=(UINT16*) Front;
584		DrawDest=(UINT16 *) frameram;
	583	Visible  = (UINT16*) Front;
	584	DrawDest = (UINT16 *) frameram;
585	585
586	586
587		if(GetVidReg(space,0x8c)&0x80)
588		DrawDest=Front;
	587	if(GetVidReg(space, 0x8c) & 0x80)
	588	DrawDest = Front;
589	589	else
590		DrawDest=Back;
	590	DrawDest = Back;
591	591
592		//  DrawDest=Visible;
	592	//  DrawDest = Visible;
593	593
594		srcline=(UINT16 *) DrawDest;
	594	srcline = (UINT16 *) DrawDest;
595	595
596		DoFlip=0;
597		head=GetVidReg(space,0x82);
598		tail=GetVidReg(space,0x80);
599		while((head&0x7ff)!=(tail&0x7ff))
	596	DoFlip = 0;
	597	head = GetVidReg(space, 0x82);
	598	tail = GetVidReg(space, 0x80);
	599	while((head & 0x7ff) != (tail & 0x7ff))
600	600	{
601		DoFlip=vrender0_ProcessPacket(space,0x03800000+head*64,DrawDest,(UINT8*)textureram);
	601	DoFlip = vrender0_ProcessPacket(space, 0x03800000 + head * 64, DrawDest, (UINT8*)textureram);
602	602	head++;
603		head&=0x7ff;
	603	head &= 0x7ff;
604	604	if(DoFlip)
605	605	break;
606	606	}
607	607
608	608	if(DoFlip)
609		SetVidReg(space,0x8e,GetVidReg(space,0x8e)^1);
	609	SetVidReg(space, 0x8e, GetVidReg(space, 0x8e) ^ 1);
610	610
611	611	srcline=(UINT16 *) Visible;
612		for(y=0;y<240;y++)
613		memcpy(BITMAP_ADDR16(bitmap, y, 0), &srcline[y*512], width*2);
	612	for(y = 0; y < 240; y++)
	613	memcpy(BITMAP_ADDR16(bitmap, y, 0), &srcline[y * 512], width * 2);
614	614
615	615	return 0;
616	616	}
617	617
618	618	static VIDEO_EOF(crystal)
619	619	{
620		const address_space *space = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM);
621		UINT16 head,tail;
622		int DoFlip=0;
	620	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	621	UINT16 head, tail;
	622	int DoFlip = 0;
623	623
624		head=GetVidReg(space,0x82);
625		tail=GetVidReg(space,0x80);
626		while((head&0x7ff)!=(tail&0x7ff))
	624	head = GetVidReg(space, 0x82);
	625	tail = GetVidReg(space, 0x80);
	626	while((head & 0x7ff) != (tail & 0x7ff))
627	627	{
628		UINT16 Packet0=memory_read_word(space,0x03800000+head*64);
629		if(Packet0&0x81)
630		DoFlip=1;
	628	UINT16 Packet0 = memory_read_word(space, 0x03800000 + head * 64);
	629	if(Packet0 & 0x81)
	630	DoFlip = 1;
631	631	head++;
632		head&=0x7ff;
	632	head &= 0x7ff;
633	633	if(DoFlip)
634	634	break;
635	635	}
636		SetVidReg(space,0x82,head);
	636	SetVidReg(space, 0x82, head);
637	637	if(DoFlip)
638	638	{
639	639	if(FlipCount)
r4679	r4680
914	914	GAME( 2001, evosocc,  crysbios, crystal, crystal,  evosocc, ROT0, "Evoga", "Evolution Soccer", 0 )
915	915	GAME( 2003, topbladv, crysbios, topbladv,crystal, topbladv, ROT0, "SonoKong / Expotato", "Top Blade V", GAME_NOT_WORKING ) // protection
916	916	GAME( 2001, officeye,        0, crystal, crystal, officeye, ROT0, "Danbi", "Office Yeo In Cheon Ha (version 1.2)", GAME_NOT_WORKING ) // protection
917

src/mame/drivers/tempest.c

r4679	r4680
309	309
310	310	static WRITE8_HANDLER( wdclr_w )
311	311	{
312		cpu_set_input_line(space->machine->cpu[0], 0, CLEAR_LINE);
	312	cputag_set_input_line(space->machine, "maincpu", 0, CLEAR_LINE);
313	313	watchdog_reset(space->machine);
314	314	}
315	315
r4679	r4680
335	335	static CUSTOM_INPUT( clock_r )
336	336	{
337	337	/* Emulate the 3kHz source on bit 7 (divide 1.5MHz by 512) */
338		return (cpu_get_total_cycles(field->port->machine->cpu[0]) & 0x100) ? 1 : 0;
	338	return (cputag_get_total_cycles(field->port->machine, "maincpu") & 0x100) ? 1 : 0;
339	339	}
340	340
341	341

src/mame/drivers/madmotor.c

r4679	r4680
22	22	VIDEO_START( madmotor );
23	23	VIDEO_UPDATE( madmotor );
24	24
25		READ16_HANDLER( madmotor_pf1_rowscroll_r );
26		WRITE16_HANDLER( madmotor_pf1_rowscroll_w );
27		READ16_HANDLER( madmotor_pf1_data_r );
28		READ16_HANDLER( madmotor_pf2_data_r );
29		READ16_HANDLER( madmotor_pf3_data_r );
30	25	WRITE16_HANDLER( madmotor_pf1_data_w );
31	26	WRITE16_HANDLER( madmotor_pf2_data_w );
32	27	WRITE16_HANDLER( madmotor_pf3_data_w );
33		WRITE16_HANDLER( madmotor_pf1_control_w );
34		WRITE16_HANDLER( madmotor_pf2_control_w );
35		WRITE16_HANDLER( madmotor_pf3_control_w );
36	28	extern UINT16 *madmotor_pf1_rowscroll;
37	29	extern UINT16 *madmotor_pf1_data,*madmotor_pf2_data,*madmotor_pf3_data;
	30	extern UINT16 *madmotor_pf1_control,*madmotor_pf2_control,*madmotor_pf3_control;
38	31
39
40	32	/******************************************************************************/
41	33
42	34	static WRITE16_HANDLER( madmotor_sound_w )
43	35	{
44	36	if (ACCESSING_BITS_0_7)
45	37	{
46		soundlatch_w(space,0,data & 0xff);
47		cpu_set_input_line(space->machine->cpu[1],0,HOLD_LINE);
	38	soundlatch_w(space, 0, data & 0xff);
	39	cputag_set_input_line(space->machine, "audiocpu", 0, HOLD_LINE);
48	40	}
49	41	}
50	42
51	43
52	44	/******************************************************************************/
53	45
54		static ADDRESS_MAP_START( madmotor_readmem, ADDRESS_SPACE_PROGRAM, 16 )
55		AM_RANGE(0x000000, 0x07ffff) AM_READ(SMH_ROM)
56		AM_RANGE(0x184000, 0x1847ff) AM_READ(madmotor_pf1_rowscroll_r)
57		AM_RANGE(0x188000, 0x189fff) AM_READ(madmotor_pf1_data_r)
58		AM_RANGE(0x198000, 0x1987ff) AM_READ(madmotor_pf2_data_r)
59		AM_RANGE(0x1a4000, 0x1a4fff) AM_READ(madmotor_pf3_data_r)
60		AM_RANGE(0x18c000, 0x18c001) AM_READNOP
	46	static ADDRESS_MAP_START( madmotor_map, ADDRESS_SPACE_PROGRAM, 16 )
	47	AM_RANGE(0x000000, 0x07ffff) AM_ROM
	48	AM_RANGE(0x180000, 0x18001f) AM_WRITEONLY AM_BASE(&madmotor_pf1_control)
	49	AM_RANGE(0x184000, 0x1847ff) AM_RAM AM_BASE(&madmotor_pf1_rowscroll)
	50	AM_RANGE(0x188000, 0x189fff) AM_RAM_WRITE(madmotor_pf1_data_w) AM_BASE(&madmotor_pf1_data)
	51	AM_RANGE(0x18c000, 0x18c001) AM_NOP
	52	AM_RANGE(0x190000, 0x19001f) AM_WRITEONLY AM_BASE(&madmotor_pf2_control)
	53	AM_RANGE(0x198000, 0x1987ff) AM_RAM_WRITE(madmotor_pf2_data_w) AM_BASE(&madmotor_pf2_data)
61	54	AM_RANGE(0x19c000, 0x19c001) AM_READNOP
62		AM_RANGE(0x3e0000, 0x3e3fff) AM_READ(SMH_RAM)
63		AM_RANGE(0x3e8000, 0x3e87ff) AM_READ(SMH_RAM)
64		AM_RANGE(0x3f0000, 0x3f07ff) AM_READ(SMH_RAM)
	55	AM_RANGE(0x1a0000, 0x1a001f) AM_WRITEONLY AM_BASE(&madmotor_pf3_control)
	56	AM_RANGE(0x1a4000, 0x1a4fff) AM_RAM_WRITE(madmotor_pf3_data_w) AM_BASE(&madmotor_pf3_data)
	57	AM_RANGE(0x3e0000, 0x3e3fff) AM_RAM
	58	AM_RANGE(0x3e8000, 0x3e87ff) AM_RAM AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)
	59	AM_RANGE(0x3f0000, 0x3f07ff) AM_RAM_WRITE(paletteram16_xxxxBBBBGGGGRRRR_word_w) AM_BASE(&paletteram16)
65	60	AM_RANGE(0x3f8002, 0x3f8003) AM_READ_PORT("P1_P2")
66	61	AM_RANGE(0x3f8004, 0x3f8005) AM_READ_PORT("DSW")
67	62	AM_RANGE(0x3f8006, 0x3f8007) AM_READ_PORT("SYSTEM")
68		ADDRESS_MAP_END
69
70		static ADDRESS_MAP_START( madmotor_writemem, ADDRESS_SPACE_PROGRAM, 16 )
71		AM_RANGE(0x000000, 0x07ffff) AM_WRITE(SMH_ROM)
72		AM_RANGE(0x180000, 0x18001f) AM_WRITE(madmotor_pf1_control_w)
73		AM_RANGE(0x184000, 0x1847ff) AM_WRITE(madmotor_pf1_rowscroll_w) AM_BASE(&madmotor_pf1_rowscroll)
74		AM_RANGE(0x188000, 0x189fff) AM_WRITE(madmotor_pf1_data_w) AM_BASE(&madmotor_pf1_data)
75		AM_RANGE(0x18c000, 0x18c001) AM_WRITENOP
76		AM_RANGE(0x190000, 0x19001f) AM_WRITE(madmotor_pf2_control_w)
77		AM_RANGE(0x198000, 0x1987ff) AM_WRITE(madmotor_pf2_data_w) AM_BASE(&madmotor_pf2_data)
78		AM_RANGE(0x1a0000, 0x1a001f) AM_WRITE(madmotor_pf3_control_w)
79		AM_RANGE(0x1a4000, 0x1a4fff) AM_WRITE(madmotor_pf3_data_w) AM_BASE(&madmotor_pf3_data)
80		AM_RANGE(0x3e0000, 0x3e3fff) AM_WRITE(SMH_RAM)
81		AM_RANGE(0x3e8000, 0x3e87ff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)
82		AM_RANGE(0x3f0000, 0x3f07ff) AM_WRITE(paletteram16_xxxxBBBBGGGGRRRR_word_w) AM_BASE(&paletteram16)
83	63	AM_RANGE(0x3fc004, 0x3fc005) AM_WRITE(madmotor_sound_w)
84	64	ADDRESS_MAP_END
85	65
86	66	/******************************************************************************/
87	67
88	68	/* Physical memory map (21 bits) */
89		static ADDRESS_MAP_START( sound_readmem, ADDRESS_SPACE_PROGRAM, 8 )
90		AM_RANGE(0x000000, 0x00ffff) AM_READ(SMH_ROM)
91		AM_RANGE(0x100000, 0x100001) AM_DEVREAD("ym1", ym2203_r)
92		AM_RANGE(0x110000, 0x110001) AM_DEVREAD("ym2", ym2151_r)
93		AM_RANGE(0x120000, 0x120001) AM_DEVREAD("oki1", okim6295_r)
94		AM_RANGE(0x130000, 0x130001) AM_DEVREAD("oki2", okim6295_r)
	69	static ADDRESS_MAP_START( sound_map, ADDRESS_SPACE_PROGRAM, 8 )
	70	AM_RANGE(0x000000, 0x00ffff) AM_ROM
	71	AM_RANGE(0x100000, 0x100001) AM_DEVREADWRITE("ym1", ym2203_r,ym2203_w)
	72	AM_RANGE(0x110000, 0x110001) AM_DEVREADWRITE("ym2", ym2151_r,ym2151_w)
	73	AM_RANGE(0x120000, 0x120001) AM_DEVREADWRITE("oki1", okim6295_r,okim6295_w)
	74	AM_RANGE(0x130000, 0x130001) AM_DEVREADWRITE("oki2", okim6295_r,okim6295_w)
95	75	AM_RANGE(0x140000, 0x140001) AM_READ(soundlatch_r)
96		AM_RANGE(0x1f0000, 0x1f1fff) AM_READ(SMH_BANK8)
97		ADDRESS_MAP_END
98
99		static ADDRESS_MAP_START( sound_writemem, ADDRESS_SPACE_PROGRAM, 8 )
100		AM_RANGE(0x000000, 0x00ffff) AM_WRITE(SMH_ROM)
101		AM_RANGE(0x100000, 0x100001) AM_DEVWRITE("ym1", ym2203_w)
102		AM_RANGE(0x110000, 0x110001) AM_DEVWRITE("ym2", ym2151_w)
103		AM_RANGE(0x120000, 0x120001) AM_DEVWRITE("oki1", okim6295_w)
104		AM_RANGE(0x130000, 0x130001) AM_DEVWRITE("oki2", okim6295_w)
105		AM_RANGE(0x1f0000, 0x1f1fff) AM_WRITE(SMH_BANK8)
	76	AM_RANGE(0x1f0000, 0x1f1fff) AM_RAMBANK(8)
106	77	AM_RANGE(0x1fec00, 0x1fec01) AM_WRITE(h6280_timer_w)
107	78	AM_RANGE(0x1ff400, 0x1ff403) AM_WRITE(h6280_irq_status_w)
108	79	ADDRESS_MAP_END
r4679	r4680
250	221
251	222	static void sound_irq(const device_config *device, int state)
252	223	{
253		cpu_set_input_line(device->machine->cpu[1],1,state); /* IRQ 2 */
	224	cputag_set_input_line(device->machine, "audiocpu", 1, state); /* IRQ 2 */
254	225	}
255	226
256	227	static const ym2151_interface ym2151_config =
r4679	r4680
262	233
263	234	/* basic machine hardware */
264	235	MDRV_CPU_ADD("maincpu", M68000, 12000000) /* Custom chip 59, 24 MHz crystal */
265		MDRV_CPU_PROGRAM_MAP(madmotor_readmem,madmotor_writemem)
	236	MDRV_CPU_PROGRAM_MAP(madmotor_map,0)
266	237	MDRV_CPU_VBLANK_INT("screen", irq6_line_hold)/* VBL */
267	238
268	239	MDRV_CPU_ADD("audiocpu", H6280, 8053000/2) /* Custom chip 45, Crystal near CPU is 8.053 MHz */
269		MDRV_CPU_PROGRAM_MAP(sound_readmem,sound_writemem)
	240	MDRV_CPU_PROGRAM_MAP(sound_map,0)
270	241
271	242	/* video hardware */
272	243	MDRV_VIDEO_ATTRIBUTES(VIDEO_UPDATE_BEFORE_VBLANK)

src/mame/drivers/bublbobl.c

r4679	r4680
658	658	// handler called by the 2203 emulator when the internal timers cause an IRQ
659	659	static void irqhandler(const device_config *device, int irq)
660	660	{
661		cpu_set_input_line(device->machine->cpu[2], 0, irq ? ASSERT_LINE : CLEAR_LINE);
	661	cputag_set_input_line(device->machine, "audiocpu", 0, irq ? ASSERT_LINE : CLEAR_LINE);
662	662	}
663	663
664	664	static const ym2203_interface ym2203_config =
r4679	r4680
1275	1275	{
1276	1276	DRIVER_INIT_CALL(tokio);
1277	1277
1278		memory_install_read8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xfe00, 0xfe00, 0, 0, tokiob_mcu_r );
	1278	memory_install_read8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xfe00, 0xfe00, 0, 0, tokiob_mcu_r );
1279	1279	}
1280	1280
1281	1281

src/mame/drivers/skyfox.c

r4679	r4680
48	48	Sky Fox
49	49	***************************************************************************/
50	50
51		static ADDRESS_MAP_START( skyfox_readmem, ADDRESS_SPACE_PROGRAM, 8 )
52		AM_RANGE(0x0000, 0xbfff) AM_READ(SMH_ROM         )   // ROM
53		AM_RANGE(0xc000, 0xdfff) AM_READ(SMH_RAM         )   // RAM
	51	static ADDRESS_MAP_START( skyfox_map, ADDRESS_SPACE_PROGRAM, 8 )
	52	AM_RANGE(0x0000, 0xbfff) AM_ROM                     // ROM
	53	AM_RANGE(0xc000, 0xcfff) AM_RAM                     // RAM
	54	AM_RANGE(0xd000, 0xd3ff) AM_RAM AM_BASE(&spriteram) AM_SIZE(&spriteram_size)   // Sprites
	55	AM_RANGE(0xd400, 0xdfff) AM_RAM                     // RAM?
54	56	AM_RANGE(0xe000, 0xe000) AM_READ_PORT("INPUTS")         // Input Ports
55	57	AM_RANGE(0xe001, 0xe001) AM_READ_PORT("DSW0")         //
56	58	AM_RANGE(0xe002, 0xe002) AM_READ_PORT("DSW1")         //
	59	AM_RANGE(0xe008, 0xe00f) AM_WRITE(skyfox_vregs_w)      // Video Regs
57	60	AM_RANGE(0xf001, 0xf001) AM_READ_PORT("DSW2")         //
58		//  AM_RANGE(0xff00, 0xff07) AM_READ(skyfox_vregs_r     )   // fake to read the vregs
	61	//  AM_RANGE(0xff00, 0xff07) AM_READ(skyfox_vregs_r)        // fake to read the vregs
59	62	ADDRESS_MAP_END
60	63
61		static ADDRESS_MAP_START( skyfox_writemem, ADDRESS_SPACE_PROGRAM, 8 )
62		AM_RANGE(0x0000, 0xbfff) AM_WRITE(SMH_ROM                        )   // ROM
63		AM_RANGE(0xc000, 0xcfff) AM_WRITE(SMH_RAM                        )   // RAM
64		AM_RANGE(0xd000, 0xd3ff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram) AM_SIZE(&spriteram_size   )   // Sprites
65		AM_RANGE(0xd400, 0xdfff) AM_WRITE(SMH_RAM                        )   // RAM?
66		AM_RANGE(0xe008, 0xe00f) AM_WRITE(skyfox_vregs_w                  )   // Video Regs
67		ADDRESS_MAP_END
68	64
69
70
71
72
73
74	65	/***************************************************************************
75	66
76	67
r4679	r4680
85	76	***************************************************************************/
86	77
87	78
88		static ADDRESS_MAP_START( skyfox_sound_readmem, ADDRESS_SPACE_PROGRAM, 8 )
89		AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM            )   // ROM
90		AM_RANGE(0x8000, 0x87ff) AM_READ(SMH_RAM            )   // RAM
91		AM_RANGE(0xa000, 0xa001) AM_DEVREAD("ym1", ym2203_r)   // YM2203 #1
92		//  AM_RANGE(0xc000, 0xc001) AM_DEVREAD("ym2", ym2203_r )   // YM2203 #2
93		AM_RANGE(0xb000, 0xb000) AM_READ(soundlatch_r         )   // From Main CPU
	79	static ADDRESS_MAP_START( skyfox_sound_map, ADDRESS_SPACE_PROGRAM, 8 )
	80	AM_RANGE(0x0000, 0x7fff) AM_ROM                        // ROM
	81	AM_RANGE(0x8000, 0x87ff) AM_RAM                        // RAM
	82	//  AM_RANGE(0x9000, 0x9001) AM_WRITENOP                        // ??
	83	AM_RANGE(0xa000, 0xa001) AM_DEVREADWRITE("ym1", ym2203_r,ym2203_w)   // YM2203 #1
	84	//  AM_RANGE(0xb000, 0xb001) AM_WRITENOP                        // ??
	85	AM_RANGE(0xc000, 0xc001) AM_DEVREADWRITE("ym2", ym2203_r,ym2203_w)   // YM2203 #2
	86	AM_RANGE(0xb000, 0xb000) AM_READ(soundlatch_r)            // From Main CPU
94	87	ADDRESS_MAP_END
95	88
96		static ADDRESS_MAP_START( skyfox_sound_writemem, ADDRESS_SPACE_PROGRAM, 8 )
97		AM_RANGE(0x0000, 0x7fff) AM_WRITE(SMH_ROM               )   // ROM
98		AM_RANGE(0x8000, 0x87ff) AM_WRITE(SMH_RAM               )   // RAM
99		//  AM_RANGE(0x9000, 0x9001) AM_WRITE(SMH_NOP                  )   // ??
100		AM_RANGE(0xa000, 0xa001) AM_DEVWRITE("ym1", ym2203_w    )   //
101		//  AM_RANGE(0xb000, 0xb001) AM_WRITE(SMH_NOP                  )   // ??
102		AM_RANGE(0xc000, 0xc001) AM_DEVWRITE("ym2", ym2203_w    )   //
103		ADDRESS_MAP_END
104	89
105
106
107
108	90	/***************************************************************************
109	91
110	92
r4679	r4680
113	95
114	96	***************************************************************************/
115	97
	98	static INPUT_CHANGED( coin_inserted )
	99	{
	100	cputag_set_input_line(field->port->machine, "maincpu", INPUT_LINE_NMI, newval ? CLEAR_LINE : ASSERT_LINE);
	101	}
	102
116	103	static INPUT_PORTS_START( skyfox )
117	104	PORT_START("INPUTS")
118	105	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_UP )
r4679	r4680
182	169	PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
183	170	PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
184	171
185		PORT_START("COINS")   // Fake input port, polled every VBLANK to generate an NMI upon coin insertion
186		PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_IMPULSE(1)
187		PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_COIN2 ) PORT_IMPULSE(1)
	172	PORT_START("COINS")   // Fake input port, coins are directly connected on NMI line
	173	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_CHANGED(coin_inserted, 0)
	174	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_COIN2 ) PORT_CHANGED(coin_inserted, 0)
188	175	INPUT_PORTS_END
189	176
190	177
r4679	r4680
222	209	GFXDECODE_END
223	210
224	211
225
226
227
228
229	212	/***************************************************************************
230	213
231	214
r4679	r4680
239	222	Sky Fox
240	223	***************************************************************************/
241	224
242		/* Check for coin insertion once a frame (polling a fake input port).
243		Generate an NMI in case. Scroll the background too. */
	225	/* Scroll the background on every vblank (guess). */
244	226
245	227	static INTERRUPT_GEN( skyfox_interrupt )
246	228	{
247	229	/* Scroll the bg */
248	230	skyfox_bg_pos += (skyfox_bg_ctrl >> 1) & 0x7;   // maybe..
249
250		/* Check coin 1 & 2 */
251		if ((input_port_read(device->machine, "COINS") & 3) != 3) cpu_set_input_line(device, INPUT_LINE_NMI, PULSE_LINE);
252	231	}
253	232
254	233	static MACHINE_DRIVER_START( skyfox )
255	234
256	235	/* basic machine hardware */
257	236	MDRV_CPU_ADD("maincpu", Z80, 4000000)
258		MDRV_CPU_PROGRAM_MAP(skyfox_readmem,skyfox_writemem)
	237	MDRV_CPU_PROGRAM_MAP(skyfox_map,0)
259	238	MDRV_CPU_VBLANK_INT("screen", skyfox_interrupt)      /* NMI caused by coin insertion */
260	239
261	240	MDRV_CPU_ADD("audiocpu", Z80, 1748000)
262		MDRV_CPU_PROGRAM_MAP(skyfox_sound_readmem,skyfox_sound_writemem)
	241	MDRV_CPU_PROGRAM_MAP(skyfox_sound_map,0)
263	242
264	243	/* video hardware */
265	244	MDRV_SCREEN_ADD("screen", RASTER)

src/mame/drivers/cshooter.c

r4679	r4680
258	258	return paletteram[offset];
259	259	}
260	260
261		static ADDRESS_MAP_START( readmem, ADDRESS_SPACE_PROGRAM, 8 )
262		AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM)
263		AM_RANGE(0x8000, 0xafff) AM_READ(SMH_BANK1)
	261	static ADDRESS_MAP_START( cshooter_map, ADDRESS_SPACE_PROGRAM, 8 )
	262	AM_RANGE(0x0000, 0x7fff) AM_ROM
	263	AM_RANGE(0x8000, 0xafff) AM_READWRITE(SMH_BANK(1), SMH_RAM)
264	264	AM_RANGE(0xb000, 0xb0ff) AM_READ(SMH_RAM)         // sound related ?
265	265	AM_RANGE(0xc000, 0xc1ff) AM_WRITE(pal_w) AM_READ(pal_r) AM_BASE(&paletteram)
266	266	AM_RANGE(0xc200, 0xc200) AM_READ_PORT("IN0")
r4679	r4680
269	269	AM_RANGE(0xc203, 0xc203) AM_READ_PORT("DSW2")
270	270	AM_RANGE(0xc204, 0xc204) AM_READ_PORT("DSW1")
271	271	AM_RANGE(0xc205, 0xc205) AM_READ(cshooter_coin_r)   // hack until I understand
272		AM_RANGE(0xd000, 0xd7ff) AM_READ(SMH_RAM)
273		AM_RANGE(0xd800, 0xdfff) AM_READ(SMH_RAM)
274		AM_RANGE(0xe000, 0xffff) AM_READ(SMH_RAM)
275		ADDRESS_MAP_END
276
277		static ADDRESS_MAP_START( writemem, ADDRESS_SPACE_PROGRAM, 8 )
278		AM_RANGE(0x0000, 0x7fff) AM_WRITE(SMH_ROM)
279		AM_RANGE(0x8000, 0xafff) AM_WRITE(SMH_RAM)         // to be confirmed
280	272	AM_RANGE(0xc500, 0xc500) AM_WRITE(cshooter_c500_w)
281	273	AM_RANGE(0xc600, 0xc600) AM_WRITENOP         // see notes
282	274	AM_RANGE(0xc700, 0xc700) AM_WRITE(cshooter_c700_w)
283	275	AM_RANGE(0xc801, 0xc801) AM_WRITENOP         // see notes
284		AM_RANGE(0xd000, 0xd7ff) AM_WRITE(cshooter_txram_w) AM_BASE(&cshooter_txram)
285		AM_RANGE(0xd800, 0xdfff) AM_WRITE(SMH_RAM)
286		AM_RANGE(0xe000, 0xffff) AM_WRITE(SMH_RAM)
	276	AM_RANGE(0xd000, 0xd7ff) AM_RAM_WRITE(cshooter_txram_w) AM_BASE(&cshooter_txram)
	277	AM_RANGE(0xd800, 0xdfff) AM_RAM
	278	AM_RANGE(0xe000, 0xffff) AM_RAM
287	279	ADDRESS_MAP_END
288	280
289		static ADDRESS_MAP_START( arreadmem, ADDRESS_SPACE_PROGRAM, 8 )
290		AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM)
291		AM_RANGE(0x8000, 0xbfff) AM_READ(SMH_BANK1)
	281	static ADDRESS_MAP_START( airraid_map, ADDRESS_SPACE_PROGRAM, 8 )
	282	AM_RANGE(0x0000, 0x7fff) AM_ROM
	283	AM_RANGE(0x8000, 0xbfff) AM_READ(SMH_BANK(1))
292	284	AM_RANGE(0xb000, 0xb0ff) AM_RAM         // sound related ?
293		AM_RANGE(0xb100, 0xb1ff) AM_RAM//READ(SMH_BANK1)           // sound related ?
	285	AM_RANGE(0xb100, 0xb1ff) AM_RAM//READ(SMH_BANK(1))           // sound related ?
294	286	AM_RANGE(0xc000, 0xc000) AM_READ_PORT("IN0")
295	287	AM_RANGE(0xc001, 0xc001) AM_READ_PORT("IN1")
296	288	AM_RANGE(0xc002, 0xc002) AM_READ_PORT("IN2")
297	289	AM_RANGE(0xc003, 0xc003) AM_READ_PORT("DSW2")
298	290	AM_RANGE(0xc004, 0xc004) AM_READ_PORT("DSW1")
299		AM_RANGE(0xd000, 0xd7ff) AM_READ(SMH_RAM)
	291	AM_RANGE(0xc500, 0xc500) AM_WRITE(cshooter_c500_w)
	292	AM_RANGE(0xc600, 0xc600) AM_WRITENOP         // see notes
	293	AM_RANGE(0xc700, 0xc700) AM_WRITE(cshooter_c700_w)
	294	AM_RANGE(0xc801, 0xc801) AM_WRITENOP         // see notes
	295	AM_RANGE(0xd000, 0xd7ff) AM_RAM_WRITE(cshooter_txram_w) AM_BASE(&cshooter_txram)
300	296	AM_RANGE(0xd800, 0xdbff) AM_WRITE(pal2_w) AM_READ(pal_r) AM_BASE(&paletteram)
301	297	AM_RANGE(0xdc11, 0xdc11) AM_WRITE(bank_w)
302	298	AM_RANGE(0xdc00, 0xddff) AM_RAM
r4679	r4680
305	301	AM_RANGE(0xfe00, 0xffff) AM_RAM AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
306	302	ADDRESS_MAP_END
307	303
308		static ADDRESS_MAP_START( arwritemem, ADDRESS_SPACE_PROGRAM, 8 )
309		AM_RANGE(0x0000, 0x7fff) AM_WRITE(SMH_ROM)
310		AM_RANGE(0xc500, 0xc500) AM_WRITE(cshooter_c500_w)
311		AM_RANGE(0xc600, 0xc600) AM_WRITENOP         // see notes
312		AM_RANGE(0xc700, 0xc700) AM_WRITE(cshooter_c700_w)
313		AM_RANGE(0xc801, 0xc801) AM_WRITENOP         // see notes
314		AM_RANGE(0xd000, 0xd7ff) AM_WRITE(cshooter_txram_w) AM_BASE(&cshooter_txram)
315		ADDRESS_MAP_END
316	304
317
318	305	/* Sound CPU */
319	306
320		static ADDRESS_MAP_START( s_readmem, ADDRESS_SPACE_PROGRAM, 8 )
321		AM_RANGE(0x0000, 0x1fff) AM_READ(SMH_ROM)
322		AM_RANGE(0xf800, 0xffff) AM_READ(SMH_RAM)
323		ADDRESS_MAP_END
324
325		static ADDRESS_MAP_START( s_writemem, ADDRESS_SPACE_PROGRAM, 8 )
326		AM_RANGE(0x0000, 0x1fff) AM_WRITE(SMH_ROM)
	307	static ADDRESS_MAP_START( sound_map, ADDRESS_SPACE_PROGRAM, 8 )
	308	AM_RANGE(0x0000, 0x1fff) AM_ROM
327	309	AM_RANGE(0xc000, 0xc001) AM_WRITENOP // AM_DEVWRITE("ym1", ym2203_w) ?
328	310	AM_RANGE(0xc800, 0xc801) AM_WRITENOP // AM_DEVWRITE("ym2", ym2203_w) ?
329		AM_RANGE(0xf800, 0xffff) AM_WRITE(SMH_RAM)
	311	AM_RANGE(0xf800, 0xffff) AM_RAM
330	312	ADDRESS_MAP_END
331	313
332		static ADDRESS_MAP_START( s2_readmem, ADDRESS_SPACE_PROGRAM, 8 )
	314	static ADDRESS_MAP_START( sound_map2, ADDRESS_SPACE_PROGRAM, 8 )
333	315	AM_RANGE(0x0000, 0x1fff) AM_ROM
334		AM_RANGE(0x2000, 0x27ff) AM_RAM
335		ADDRESS_MAP_END
336
337		static ADDRESS_MAP_START( s2_writemem, ADDRESS_SPACE_PROGRAM, 8 )
338	316	AM_RANGE(0x4000, 0x4001) AM_WRITENOP // AM_DEVWRITE("ym1", ym2203_w) ?
339	317	AM_RANGE(0x4008, 0x4009) AM_WRITENOP // AM_DEVWRITE("ym2", ym2203_w) ?
	318	AM_RANGE(0x2000, 0x27ff) AM_RAM
340	319	ADDRESS_MAP_END
341	320
342	321
r4679	r4680
442	421
443	422	static MACHINE_DRIVER_START( cshooter )
444	423	MDRV_CPU_ADD("maincpu", Z80,XTAL_12MHz/2)       /* verified on pcb */
445		MDRV_CPU_PROGRAM_MAP(readmem,writemem)
	424	MDRV_CPU_PROGRAM_MAP(cshooter_map,0)
446	425	MDRV_CPU_VBLANK_INT_HACK(cshooter_interrupt,2)
447	426
448	427	MDRV_CPU_ADD("audiocpu", Z80,XTAL_14_31818MHz/4)       /* verified on pcb */
449		MDRV_CPU_PROGRAM_MAP(s_readmem,s_writemem)
	428	MDRV_CPU_PROGRAM_MAP(sound_map,0)
450	429
451	430	MDRV_MACHINE_RESET(cshooter)
452	431
r4679	r4680
471	450
472	451	static MACHINE_DRIVER_START( airraid )
473	452	MDRV_CPU_ADD("maincpu", Z80,XTAL_12MHz/2)       /* verified on pcb */
474		MDRV_CPU_PROGRAM_MAP(arreadmem,arwritemem)
	453	MDRV_CPU_PROGRAM_MAP(airraid_map,0)
475	454	MDRV_CPU_VBLANK_INT_HACK(cshooter_interrupt,2)
476	455
477	456	MDRV_CPU_ADD("audiocpu", Z80,XTAL_14_31818MHz/4)       /* verified on pcb */
478		MDRV_CPU_PROGRAM_MAP(s2_readmem,s2_writemem)
	457	MDRV_CPU_PROGRAM_MAP(sound_map2,0)
479	458
480	459	MDRV_MACHINE_RESET(cshooter)
481	460
r4679	r4680
687	666	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
688	667	int A;
689	668	UINT8 *rom = memory_region(machine, "maincpu");
690		UINT8 *decrypt = auto_malloc(0x8000);
	669	UINT8 *decrypt = auto_alloc_array(machine, UINT8, 0x8000);
691	670
692	671	memory_set_decrypted_region(space, 0x0000, 0x7fff, decrypt);
693	672

src/mame/drivers/aerofgt.c

r4679	r4680
75	75	{
76	76	pending_command = 1;
77	77	soundlatch_w(space,offset,data & 0xff);
78		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_NMI, PULSE_LINE);
	78	cputag_set_input_line(space->machine, "audiocpu", INPUT_LINE_NMI, PULSE_LINE);
79	79	}
80	80	}
81	81
r4679	r4680
85	85	{
86	86	pending_command = 1;
87	87	soundlatch_w(space,offset,(data >> 8) & 0xff);
88		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_NMI, PULSE_LINE);
	88	cputag_set_input_line(space->machine, "audiocpu", INPUT_LINE_NMI, PULSE_LINE);
89	89	}
90	90	}
91	91
r4679	r4680
94	94	if(ACCESSING_BITS_8_15)
95	95	{
96	96	soundlatch_w(space,0,(data>>8) & 0xff);
97		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_NMI, PULSE_LINE);
	97	cputag_set_input_line(space->machine, "audiocpu", INPUT_LINE_NMI, PULSE_LINE);
98	98	}
99	99	}
100	100
r4679	r4680
122	122
123	123	static MACHINE_RESET( aerofgt )
124	124	{
125		const address_space *space = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM);
	125	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
126	126
127	127	aerofgt_sh_bankswitch_w(space,0,0);   /* needed by spinlbrk */
128	128	}
r4679	r4680
1290	1290
1291	1291	static void irqhandler(const device_config *device, int irq)
1292	1292	{
1293		cpu_set_input_line(device->machine->cpu[1],0,irq ? ASSERT_LINE : CLEAR_LINE);
	1293	cputag_set_input_line(device->machine, "audiocpu", 0, irq ? ASSERT_LINE : CLEAR_LINE);
1294	1294	}
1295	1295
1296	1296	static const ym2610_interface ym2610_config =

src/mame/drivers/rocnrope.c

r4679	r4680
1	1	/***************************************************************************
2	2
	3	Roc'n Rope (c) 1983 Konami
	4
3	5	Based on drivers from Juno First emulator by Chris Hardy (chrish@kcbbs.gen.nz)
4	6
5	7	***************************************************************************/
r4679	r4680
31	33	}
32	34
33	35
34		static ADDRESS_MAP_START( readmem, ADDRESS_SPACE_PROGRAM, 8 )
	36	static ADDRESS_MAP_START( rocnrope_map, ADDRESS_SPACE_PROGRAM, 8 )
35	37	AM_RANGE(0x3080, 0x3080) AM_READ_PORT("SYSTEM")
36	38	AM_RANGE(0x3081, 0x3081) AM_READ_PORT("P1")
37	39	AM_RANGE(0x3082, 0x3082) AM_READ_PORT("P2")
38	40	AM_RANGE(0x3083, 0x3083) AM_READ_PORT("DSW1")
39	41	AM_RANGE(0x3000, 0x3000) AM_READ_PORT("DSW2")
40	42	AM_RANGE(0x3100, 0x3100) AM_READ_PORT("DSW3")
41		AM_RANGE(0x4000, 0x5fff) AM_READ(SMH_RAM)
42		AM_RANGE(0x6000, 0xffff) AM_READ(SMH_ROM)
43		ADDRESS_MAP_END
44
45		static ADDRESS_MAP_START( writemem, ADDRESS_SPACE_PROGRAM, 8 )
46		AM_RANGE(0x4000, 0x402f) AM_WRITE(SMH_RAM) AM_BASE(&spriteram_2)
47		AM_RANGE(0x4400, 0x442f) AM_WRITE(SMH_RAM) AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
48		AM_RANGE(0x4000, 0x47ff) AM_WRITE(SMH_RAM)
49		AM_RANGE(0x4800, 0x4bff) AM_WRITE(rocnrope_colorram_w) AM_BASE(&colorram)
50		AM_RANGE(0x4c00, 0x4fff) AM_WRITE(rocnrope_videoram_w) AM_BASE(&videoram)
51		AM_RANGE(0x5000, 0x5fff) AM_WRITE(SMH_RAM)
	43	AM_RANGE(0x4000, 0x402f) AM_RAM AM_BASE(&spriteram_2)
	44	AM_RANGE(0x4400, 0x442f) AM_RAM AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
	45	AM_RANGE(0x4000, 0x47ff) AM_RAM
	46	AM_RANGE(0x4800, 0x4bff) AM_RAM_WRITE(rocnrope_colorram_w) AM_BASE(&colorram)
	47	AM_RANGE(0x4c00, 0x4fff) AM_RAM_WRITE(rocnrope_videoram_w) AM_BASE(&videoram)
	48	AM_RANGE(0x5000, 0x5fff) AM_RAM
52	49	AM_RANGE(0x8000, 0x8000) AM_WRITE(watchdog_reset_w)
53	50	AM_RANGE(0x8080, 0x8080) AM_WRITE(rocnrope_flipscreen_w)
54	51	AM_RANGE(0x8081, 0x8081) AM_WRITE(timeplt_sh_irqtrigger_w)  /* cause interrupt on audio CPU */
r4679	r4680
58	55	AM_RANGE(0x8087, 0x8087) AM_WRITE(interrupt_enable_w)
59	56	AM_RANGE(0x8100, 0x8100) AM_WRITE(soundlatch_w)
60	57	AM_RANGE(0x8182, 0x818d) AM_WRITE(rocnrope_interrupt_vector_w)
61		AM_RANGE(0x6000, 0xffff) AM_WRITE(SMH_ROM)
	58	AM_RANGE(0x6000, 0xffff) AM_ROM
62	59	ADDRESS_MAP_END
63	60
64	61
r4679	r4680
168	165
169	166	/* basic machine hardware */
170	167	MDRV_CPU_ADD("maincpu", M6809, MASTER_CLOCK / 3 / 4)        /* Verified in schematics */
171		MDRV_CPU_PROGRAM_MAP(readmem,writemem)
	168	MDRV_CPU_PROGRAM_MAP(rocnrope_map,0)
172	169	MDRV_CPU_VBLANK_INT("screen", irq0_line_hold)
173	170
174	171	/* video hardware */

src/mame/drivers/fgoal.c

r4679	r4680
84	84	int scanline;
85	85	int coin = (input_port_read(machine, "IN1") & 2);
86	86
87		cpu_set_input_line(machine->cpu[0], 0, ASSERT_LINE);
	87	cputag_set_input_line(machine, "maincpu", 0, ASSERT_LINE);
88	88
89	89	if (!coin && prev_coin)
90		cpu_set_input_line(machine->cpu[0], INPUT_LINE_NMI, ASSERT_LINE);
	90	cputag_set_input_line(machine, "maincpu", INPUT_LINE_NMI, ASSERT_LINE);
91	91
92	92	prev_coin = coin;
93	93
r4679	r4680
127	127
128	128	static READ8_HANDLER( fgoal_nmi_reset_r )
129	129	{
130		cpu_set_input_line(space->machine->cpu[0], INPUT_LINE_NMI, CLEAR_LINE);
	130	cputag_set_input_line(space->machine, "maincpu", INPUT_LINE_NMI, CLEAR_LINE);
131	131
132	132	return 0;
133	133	}
r4679	r4680
135	135
136	136	static READ8_HANDLER( fgoal_irq_reset_r )
137	137	{
138		cpu_set_input_line(space->machine->cpu[0], 0, CLEAR_LINE);
	138	cputag_set_input_line(space->machine, "maincpu", 0, CLEAR_LINE);
139	139
140	140	return 0;
141	141	}

src/mame/drivers/coinmstr.c

r4679	r4680
1194	1194	{
1195	1195	UINT8 *rom = memory_region(machine, "user1");
1196	1196	int length = memory_region_length(machine, "user1");
1197		UINT8 *buf = malloc_or_die(length);
	1197	UINT8 *buf = alloc_array_or_die(UINT8, length);
1198	1198	int i;
1199	1199
1200	1200	memcpy(buf,rom,length);

src/mame/drivers/ultrsprt.c

r4679	r4680
70	70
71	71	static CUSTOM_INPUT( analog_ctrl_r )
72	72	{
73		const char *tag = param;
	73	const char *tag = (const char *)param;
74	74	return input_port_read(field->port->machine, tag) & 0xfff;
75	75	}
76	76
77	77	static WRITE32_HANDLER( int_ack_w )
78	78	{
79		cpu_set_input_line(space->machine->cpu[0], INPUT_LINE_IRQ1, CLEAR_LINE);
	79	cputag_set_input_line(space->machine, "maincpu", INPUT_LINE_IRQ1, CLEAR_LINE);
80	80	}
81	81
82	82	static MACHINE_START( ultrsprt )
83	83	{
84	84	/* set conservative DRC options */
85		ppcdrc_set_options(machine->cpu[0], PPCDRC_COMPATIBLE_OPTIONS);
	85	ppcdrc_set_options(cputag_get_cpu(machine, "maincpu"), PPCDRC_COMPATIBLE_OPTIONS);
86	86
87	87	/* configure fast RAM regions for DRC */
88		ppcdrc_add_fastram(machine->cpu[0], 0x80000000, 0x8007ffff, FALSE, vram);
89		ppcdrc_add_fastram(machine->cpu[0], 0xff000000, 0xff01ffff, FALSE, workram);
	88	ppcdrc_add_fastram(cputag_get_cpu(machine, "maincpu"), 0x80000000, 0x8007ffff, FALSE, vram);
	89	ppcdrc_add_fastram(cputag_get_cpu(machine, "maincpu"), 0xff000000, 0xff01ffff, FALSE, workram);
90	90	}
91	91
92	92
r4679	r4680
232	232	static void sound_irq_callback(running_machine *machine, int irq)
233	233	{
234	234	if (irq == 0)
235		/*generic_pulse_irq_line(machine->cpu[1], INPUT_LINE_IRQ5)*/;
	235	/*generic_pulse_irq_line(cputag_get_cpu(machine, "audiocpu"), INPUT_LINE_IRQ5)*/;
236	236	else
237		cpu_set_input_line(machine->cpu[1], INPUT_LINE_IRQ6, HOLD_LINE);
	237	cputag_set_input_line(machine, "maincpu", INPUT_LINE_IRQ6, HOLD_LINE);
238	238	}
239	239
240	240	static DRIVER_INIT( ultrsprt )

src/mame/drivers/mainsnk.c

r4679	r4680
128	128	{
129	129	sound_cpu_busy = 1;
130	130	soundlatch_w(space, 0, data);
131		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_NMI, PULSE_LINE);
	131	cputag_set_input_line(space->machine, "audiocpu", INPUT_LINE_NMI, PULSE_LINE);
132	132	}
133	133
134	134	static READ8_HANDLER( sound_command_r )

src/mame/drivers/mystston.c

r4679	r4680
39	39
40	40	void mystston_on_scanline_interrupt(running_machine *machine)
41	41	{
42		cpu_set_input_line(machine->cpu[0], 0, ASSERT_LINE);
	42	cputag_set_input_line(machine, "maincpu", 0, ASSERT_LINE);
43	43	}
44	44
45	45
46	46	static WRITE8_HANDLER( irq_clear_w )
47	47	{
48		cpu_set_input_line(space->machine->cpu[0], 0, CLEAR_LINE);
	48	cputag_set_input_line(space->machine, "maincpu", 0, CLEAR_LINE);
49	49	}
50	50
51	51
r4679	r4680
59	59	static INPUT_CHANGED( coin_inserted )
60	60	{
61	61	/* coin insertion causes an NMI */
62		cpu_set_input_line(field->port->machine->cpu[0], INPUT_LINE_NMI, newval ? CLEAR_LINE : ASSERT_LINE);
	62	cputag_set_input_line(field->port->machine, "maincpu", INPUT_LINE_NMI, newval ? CLEAR_LINE : ASSERT_LINE);
63	63	}
64	64
65	65
r4679	r4680
72	72
73	73	static WRITE8_HANDLER( mystston_ay8910_select_w )
74	74	{
75		mystston_state *state = space->machine->driver_data;
	75	mystston_state *state = (mystston_state *)space->machine->driver_data;
76	76
77	77	/* bit 5 goes to 8910 #0 BDIR pin */
78	78	if (((*state->ay8910_select & 0x20) == 0x20) && ((data & 0x20) == 0x00))

src/mame/drivers/rampart.c

r4679	r4680
41	41
42	42	static void update_interrupts(running_machine *machine)
43	43	{
44		cpu_set_input_line(machine->cpu[0], 4, atarigen_scanline_int_state ? ASSERT_LINE : CLEAR_LINE);
	44	cputag_set_input_line(machine, "maincpu", 4, atarigen_scanline_int_state ? ASSERT_LINE : CLEAR_LINE);
45	45	}
46	46
47	47
r4679	r4680
49	49	{
50	50	/* generate 32V signals */
51	51	if ((scanline & 32) == 0)
52		atarigen_scanline_int_gen(screen->machine->cpu[0]);
	52	atarigen_scanline_int_gen(cputag_get_cpu(screen->machine, "maincpu"));
53	53	}
54	54
55	55
r4679	r4680
490	490
491	491	atarigen_eeprom_default = compressed_default_eeprom;
492	492	memcpy(&rom[0x140000], &rom[0x40000], 0x8000);
493		atarigen_slapstic_init(machine->cpu[0], 0x140000, 0x438000, 118);
	493	atarigen_slapstic_init(cputag_get_cpu(machine, "maincpu"), 0x140000, 0x438000, 118);
494	494	}
495	495
496	496

src/mame/drivers/magicard.c

r4679	r4680
411	411	static INTERRUPT_GEN( magicard_irq )
412	412	{
413	413	//  if(input_code_pressed(KEYCODE_Z))
414		//      cpu_set_input_line(device->machine->cpu[0], 1, HOLD_LINE);
	414	//      cputag_set_input_line(device->machine, "maincpu", 1, HOLD_LINE);
415	415	//  magicram[0x2004/2]^=0xffff;
416	416	}
417	417

src/mame/drivers/senjyo.c

r4679	r4680
98	98	flip_screen_set(space->machine, data);
99	99	}
100	100
101		static WRITE8_HANDLER( paletteram_IIBBGGRR_w )
102		{
103		int r,g,b,i;
104	101
105
106		paletteram[offset] = data;
107
108		i = (data >> 6) & 0x03;
109		/* red component */
110		r = (data << 2) & 0x0c;
111		if (r) r |= i;
112		/* green component */
113		g = (data >> 0) & 0x0c;
114		if (g) g |= i;
115		/* blue component */
116		b = (data >> 2) & 0x0c;
117		if (b) b |= i;
118
119		palette_set_color_rgb(space->machine,offset,pal4bit(r),pal4bit(g),pal4bit(b));
120		}
121
122
123
124		static ADDRESS_MAP_START( readmem, ADDRESS_SPACE_PROGRAM, 8 )
125		AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM)
126		AM_RANGE(0x8000, 0x97ff) AM_READ(SMH_RAM)
127		AM_RANGE(0x9800, 0x987f) AM_READ(SMH_RAM)
128		AM_RANGE(0x9c00, 0x9dff) AM_READ(SMH_RAM)
129		AM_RANGE(0x9e00, 0x9e3f) AM_READ(SMH_RAM)
130		AM_RANGE(0xa000, 0xa7ff) AM_READ(SMH_RAM)
131		AM_RANGE(0xa800, 0xafff) AM_READ(SMH_RAM)
132		AM_RANGE(0xb000, 0xb7ff) AM_READ(SMH_RAM)
133		AM_RANGE(0xb800, 0xbbff) AM_READ(SMH_RAM)
134		AM_RANGE(0xd000, 0xd000) AM_READ_PORT("P1")
	102	static ADDRESS_MAP_START( senjyo_map, ADDRESS_SPACE_PROGRAM, 8 )
	103	AM_RANGE(0x0000, 0x7fff) AM_ROM
	104	AM_RANGE(0x8000, 0x8fff) AM_RAM
	105	AM_RANGE(0x9000, 0x93ff) AM_RAM_WRITE(senjyo_fgvideoram_w) AM_BASE(&senjyo_fgvideoram)
	106	AM_RANGE(0x9400, 0x97ff) AM_RAM_WRITE(senjyo_fgcolorram_w) AM_BASE(&senjyo_fgcolorram)
	107	AM_RANGE(0x9800, 0x987f) AM_RAM AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
	108	AM_RANGE(0x9c00, 0x9dff) AM_RAM_WRITE(paletteram_IIBBGGRR_w) AM_BASE(&paletteram)
	109	AM_RANGE(0x9e00, 0x9e1f) AM_RAM AM_BASE(&senjyo_fgscroll)
	110	AM_RANGE(0x9e20, 0x9e21) AM_RAM AM_BASE(&senjyo_scrolly3)
	111	/*  AM_RANGE(0x9e22, 0x9e23) height of the layer (Senjyo only, fixed at 0x380) */
	112	AM_RANGE(0x9e25, 0x9e25) AM_RAM AM_BASE(&senjyo_scrollx3)
	113	AM_RANGE(0x9e27, 0x9e27) AM_RAM_WRITE(senjyo_bgstripes_w) AM_BASE(&senjyo_bgstripesram)   /* controls width of background stripes */
	114	AM_RANGE(0x9e28, 0x9e29) AM_RAM AM_BASE(&senjyo_scrolly2)
	115	/*  AM_RANGE(0x9e2a, 0x9e2b) height of the layer (Senjyo only, fixed at 0x200) */
	116	AM_RANGE(0x9e2d, 0x9e2d) AM_RAM AM_BASE(&senjyo_scrollx2)
	117	AM_RANGE(0x9e30, 0x9e31) AM_RAM AM_BASE(&senjyo_scrolly1)
	118	/*  AM_RANGE(0x9e32, 0x9e33) height of the layer (Senjyo only, fixed at 0x100) */
	119	AM_RANGE(0x9e35, 0x9e35) AM_RAM AM_BASE(&senjyo_scrollx1)
	120	/*  AM_RANGE(0x9e38, 0x9e38) probably radar y position (Senjyo only, fixed at 0x61) */
	121	/*  AM_RANGE(0x9e3d, 0x9e3d) probably radar x position (Senjyo only, 0x00/0xc0 depending on screen flip) */
	122	AM_RANGE(0x9e00, 0x9e3f) AM_RAM
	123	AM_RANGE(0xa000, 0xa7ff) AM_RAM_WRITE(senjyo_bg3videoram_w) AM_BASE(&senjyo_bg3videoram)
	124	AM_RANGE(0xa800, 0xafff) AM_RAM_WRITE(senjyo_bg2videoram_w) AM_BASE(&senjyo_bg2videoram)
	125	AM_RANGE(0xb000, 0xb7ff) AM_RAM_WRITE(senjyo_bg1videoram_w) AM_BASE(&senjyo_bg1videoram)
	126	AM_RANGE(0xb800, 0xbbff) AM_RAM AM_BASE(&senjyo_radarram)
	127	AM_RANGE(0xd000, 0xd000) AM_READ_PORT("P1") AM_WRITE(flip_screen_w)
135	128	AM_RANGE(0xd001, 0xd001) AM_READ_PORT("P2")
136	129	AM_RANGE(0xd002, 0xd002) AM_READ_PORT("SYSTEM")
137		AM_RANGE(0xd004, 0xd004) AM_READ_PORT("DSW1")
	130	AM_RANGE(0xd004, 0xd004) AM_READ_PORT("DSW1") AM_DEVWRITE("z80pio", z80pio_p_w)
138	131	AM_RANGE(0xd005, 0xd005) AM_READ_PORT("DSW2")
139	132	ADDRESS_MAP_END
140	133
141		static ADDRESS_MAP_START( writemem, ADDRESS_SPACE_PROGRAM, 8 )
142		AM_RANGE(0x0000, 0x7fff) AM_WRITE(SMH_ROM)
143		AM_RANGE(0x8000, 0x8fff) AM_WRITE(SMH_RAM)
144		AM_RANGE(0x9000, 0x93ff) AM_WRITE(senjyo_fgvideoram_w) AM_BASE(&senjyo_fgvideoram)
145		AM_RANGE(0x9400, 0x97ff) AM_WRITE(senjyo_fgcolorram_w) AM_BASE(&senjyo_fgcolorram)
146		AM_RANGE(0x9800, 0x987f) AM_WRITE(SMH_RAM) AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
147		AM_RANGE(0x9c00, 0x9dff) AM_WRITE(paletteram_IIBBGGRR_w) AM_BASE(&paletteram)
148		AM_RANGE(0x9e00, 0x9e1f) AM_WRITE(SMH_RAM) AM_BASE(&senjyo_fgscroll)
149		AM_RANGE(0x9e20, 0x9e21) AM_WRITE(SMH_RAM) AM_BASE(&senjyo_scrolly3)
150		/*  { 0x9e22, 0x9e23, height of the layer (Senjyo only, fixed at 0x380) */
151		AM_RANGE(0x9e25, 0x9e25) AM_WRITE(SMH_RAM) AM_BASE(&senjyo_scrollx3)
152		AM_RANGE(0x9e27, 0x9e27) AM_WRITE(senjyo_bgstripes_w) AM_BASE(&senjyo_bgstripesram)   /* controls width of background stripes */
153		AM_RANGE(0x9e28, 0x9e29) AM_WRITE(SMH_RAM) AM_BASE(&senjyo_scrolly2)
154		/*  { 0x9e2a, 0x9e2b, height of the layer (Senjyo only, fixed at 0x200) */
155		AM_RANGE(0x9e2d, 0x9e2d) AM_WRITE(SMH_RAM) AM_BASE(&senjyo_scrollx2)
156		AM_RANGE(0x9e30, 0x9e31) AM_WRITE(SMH_RAM) AM_BASE(&senjyo_scrolly1)
157		/*  { 0x9e32, 0x9e33, height of the layer (Senjyo only, fixed at 0x100) */
158		AM_RANGE(0x9e35, 0x9e35) AM_WRITE(SMH_RAM) AM_BASE(&senjyo_scrollx1)
159		/*  { 0x9e38, 0x9e38, probably radar y position (Senjyo only, fixed at 0x61) */
160		/*  { 0x9e3d, 0x9e3d, probably radar x position (Senjyo only, 0x00/0xc0 depending on screen flip) */
161		AM_RANGE(0x9e00, 0x9e3f) AM_WRITE(SMH_RAM)
162		AM_RANGE(0xa000, 0xa7ff) AM_WRITE(senjyo_bg3videoram_w) AM_BASE(&senjyo_bg3videoram)
163		AM_RANGE(0xa800, 0xafff) AM_WRITE(senjyo_bg2videoram_w) AM_BASE(&senjyo_bg2videoram)
164		AM_RANGE(0xb000, 0xb7ff) AM_WRITE(senjyo_bg1videoram_w) AM_BASE(&senjyo_bg1videoram)
165		AM_RANGE(0xb800, 0xbbff) AM_WRITE(SMH_RAM) AM_BASE(&senjyo_radarram)
166		AM_RANGE(0xd000, 0xd000) AM_WRITE(flip_screen_w)
167		AM_RANGE(0xd004, 0xd004) AM_DEVWRITE("z80pio", z80pio_p_w)
168		ADDRESS_MAP_END
169	134
	135	static WRITE8_DEVICE_HANDLER( pio_w )
	136	{
	137	if (offset & 1)
	138	z80pio_c_w(device, (offset >> 1) & 1, data);
	139	else
	140	z80pio_d_w(device, (offset >> 1) & 1, data);
	141	}
170	142
171		static ADDRESS_MAP_START( sound_readmem, ADDRESS_SPACE_PROGRAM, 8 )
172		AM_RANGE(0x0000, 0x3fff) AM_READ(SMH_ROM)
173		AM_RANGE(0x4000, 0x43ff) AM_READ(SMH_RAM)
174		ADDRESS_MAP_END
	143	static READ8_DEVICE_HANDLER( pio_r )
	144	{
	145	return (offset & 1) ? z80pio_c_r(device, (offset >> 1) & 1) : z80pio_d_r(device, (offset >> 1) & 1);
	146	}
175	147
176		static ADDRESS_MAP_START( sound_writemem, ADDRESS_SPACE_PROGRAM, 8 )
177		AM_RANGE(0x0000, 0x3fff) AM_WRITE(SMH_ROM)
178		AM_RANGE(0x4000, 0x43ff) AM_WRITE(SMH_RAM)
	148	static ADDRESS_MAP_START( senjyo_sound_map, ADDRESS_SPACE_PROGRAM, 8 )
	149	AM_RANGE(0x0000, 0x3fff) AM_ROM
	150	AM_RANGE(0x4000, 0x43ff) AM_RAM
179	151	AM_RANGE(0x8000, 0x8000) AM_DEVWRITE("sn1", sn76496_w)
180	152	AM_RANGE(0x9000, 0x9000) AM_DEVWRITE("sn2", sn76496_w)
181	153	AM_RANGE(0xa000, 0xa000) AM_DEVWRITE("sn3", sn76496_w)
r4679	r4680
186	158	#endif
187	159	ADDRESS_MAP_END
188	160
	161	static ADDRESS_MAP_START( senjyo_sound_io_map, ADDRESS_SPACE_IO, 8 )
	162	ADDRESS_MAP_GLOBAL_MASK(0xff)
	163	AM_RANGE(0x00, 0x03) AM_DEVREADWRITE("z80pio", pio_r, pio_w)
	164	AM_RANGE(0x08, 0x0b) AM_DEVREADWRITE("z80ctc", z80ctc_r, z80ctc_w)
	165	ADDRESS_MAP_END
	166
189	167	/* For the bootleg */
190	168
191	169	/* are scroll registers 1+2 linked on the bootleg?, only one copy is written */
r4679	r4680
201	179	senjyo_scrollx1[offset] = data;
202	180	}
203	181
204
205		static ADDRESS_MAP_START( starforb_writemem, ADDRESS_SPACE_PROGRAM, 8 )
206		AM_RANGE(0x0000, 0x7fff) AM_WRITE(SMH_ROM)
207		AM_RANGE(0x8000, 0x8fff) AM_WRITE(SMH_RAM)
208		AM_RANGE(0x9000, 0x93ff) AM_WRITE(senjyo_fgvideoram_w) AM_BASE(&senjyo_fgvideoram)
209		AM_RANGE(0x9400, 0x97ff) AM_WRITE(senjyo_fgcolorram_w) AM_BASE(&senjyo_fgcolorram)
210		AM_RANGE(0x9800, 0x987f) AM_WRITE(SMH_RAM) AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
211		AM_RANGE(0x9c00, 0x9dff) AM_WRITE(paletteram_IIBBGGRR_w) AM_BASE(&paletteram)
212
	182	static ADDRESS_MAP_START( starforb_map, ADDRESS_SPACE_PROGRAM, 8 )
	183	AM_RANGE(0x0000, 0x7fff) AM_ROM
	184	AM_RANGE(0x8000, 0x8fff) AM_RAM
	185	AM_RANGE(0x9000, 0x93ff) AM_RAM_WRITE(senjyo_fgvideoram_w) AM_BASE(&senjyo_fgvideoram)
	186	AM_RANGE(0x9400, 0x97ff) AM_RAM_WRITE(senjyo_fgcolorram_w) AM_BASE(&senjyo_fgcolorram)
	187	AM_RANGE(0x9800, 0x987f) AM_RAM AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
	188	AM_RANGE(0x9c00, 0x9dff) AM_RAM_WRITE(paletteram_IIBBGGRR_w) AM_BASE(&paletteram)
213	189	/* The format / use of the ram here is different on the bootleg */
214		AM_RANGE(0x9e20, 0x9e21) AM_WRITE(SMH_RAM) AM_BASE(&senjyo_scrolly3)
215		AM_RANGE(0x9e25, 0x9e25) AM_WRITE(SMH_RAM) AM_BASE(&senjyo_scrollx3)
216		AM_RANGE(0x9e30, 0x9e31) AM_WRITE(starforb_scrolly2) AM_BASE(&senjyo_scrolly2) // ok
217		AM_RANGE(0x9e35, 0x9e35) AM_WRITE(starforb_scrollx2) AM_BASE(&senjyo_scrollx2) // ok
218		AM_RANGE(0x9e00, 0x9e3f) AM_WRITE(SMH_RAM)
	190	AM_RANGE(0x9e20, 0x9e21) AM_RAM AM_BASE(&senjyo_scrolly3)
	191	AM_RANGE(0x9e25, 0x9e25) AM_RAM AM_BASE(&senjyo_scrollx3)
	192	AM_RANGE(0x9e30, 0x9e31) AM_RAM_WRITE(starforb_scrolly2) AM_BASE(&senjyo_scrolly2) // ok
	193	AM_RANGE(0x9e35, 0x9e35) AM_RAM_WRITE(starforb_scrollx2) AM_BASE(&senjyo_scrollx2) // ok
	194	AM_RANGE(0x9e00, 0x9e3f) AM_RAM
219	195
220		AM_RANGE(0xa000, 0xa7ff) AM_WRITE(senjyo_bg3videoram_w) AM_BASE(&senjyo_bg3videoram)
221		AM_RANGE(0xa800, 0xafff) AM_WRITE(senjyo_bg2videoram_w) AM_BASE(&senjyo_bg2videoram)
222		AM_RANGE(0xb000, 0xb7ff) AM_WRITE(senjyo_bg1videoram_w) AM_BASE(&senjyo_bg1videoram)
223		AM_RANGE(0xb800, 0xbbff) AM_WRITE(SMH_RAM) AM_BASE(&senjyo_radarram)
224		AM_RANGE(0xd000, 0xd000) AM_WRITE(flip_screen_w)
225		AM_RANGE(0xd004, 0xd004) AM_DEVWRITE("z80pio", z80pio_p_w)
	196	AM_RANGE(0xa000, 0xa7ff) AM_RAM_WRITE(senjyo_bg3videoram_w) AM_BASE(&senjyo_bg3videoram)
	197	AM_RANGE(0xa800, 0xafff) AM_RAM_WRITE(senjyo_bg2videoram_w) AM_BASE(&senjyo_bg2videoram)
	198	AM_RANGE(0xb000, 0xb7ff) AM_RAM_WRITE(senjyo_bg1videoram_w) AM_BASE(&senjyo_bg1videoram)
	199	AM_RANGE(0xb800, 0xbbff) AM_RAM AM_BASE(&senjyo_radarram)
	200	AM_RANGE(0xd000, 0xd000) AM_READ_PORT("P1") AM_WRITE(flip_screen_w)
	201	AM_RANGE(0xd001, 0xd001) AM_READ_PORT("P2")
	202	AM_RANGE(0xd002, 0xd002) AM_READ_PORT("SYSTEM")
	203	AM_RANGE(0xd004, 0xd004) AM_READ_PORT("DSW1") AM_DEVWRITE("z80pio", z80pio_p_w)
	204	AM_RANGE(0xd005, 0xd005) AM_READ_PORT("DSW2")
226	205
227	206	/* these aren't used / written, left here to make sure memory is allocated */
228		AM_RANGE(0xfe00, 0xfe1f) AM_WRITE(SMH_RAM) AM_BASE(&senjyo_fgscroll)
229		AM_RANGE(0xfe27, 0xfe27) AM_WRITE(senjyo_bgstripes_w) AM_BASE(&senjyo_bgstripesram)   /* controls width of background stripes */
230		AM_RANGE(0xfe28, 0xfe29) AM_WRITE(SMH_RAM) AM_BASE(&senjyo_scrolly1)
231		AM_RANGE(0xfe2d, 0xfe2d) AM_WRITE(SMH_RAM) AM_BASE(&senjyo_scrollx1)
	207	AM_RANGE(0xfe00, 0xfe1f) AM_RAM AM_BASE(&senjyo_fgscroll)
	208	AM_RANGE(0xfe27, 0xfe27) AM_RAM_WRITE(senjyo_bgstripes_w) AM_BASE(&senjyo_bgstripesram)   /* controls width of background stripes */
	209	AM_RANGE(0xfe28, 0xfe29) AM_RAM AM_BASE(&senjyo_scrolly1)
	210	AM_RANGE(0xfe2d, 0xfe2d) AM_RAM AM_BASE(&senjyo_scrollx1)
232	211	ADDRESS_MAP_END
233	212
234	213
235		static ADDRESS_MAP_START( starforb_sound_readmem, ADDRESS_SPACE_PROGRAM, 8 )
236		AM_RANGE(0x0000, 0x3fff) AM_READ(SMH_ROM)
237		AM_RANGE(0x4000, 0x43ff) AM_READ(SMH_RAM)
238		AM_RANGE(0xf000, 0xffff) AM_READ(SMH_RAM)
239		ADDRESS_MAP_END
240
241		static ADDRESS_MAP_START( starforb_sound_writemem, ADDRESS_SPACE_PROGRAM, 8 )
242		AM_RANGE(0x0000, 0x3fff) AM_WRITE(SMH_ROM)
243		AM_RANGE(0x4000, 0x43ff) AM_WRITE(SMH_RAM)
	214	static ADDRESS_MAP_START( starforb_sound_map, ADDRESS_SPACE_PROGRAM, 8 )
	215	AM_RANGE(0x0000, 0x3fff) AM_ROM
	216	AM_RANGE(0x4000, 0x43ff) AM_RAM
244	217	AM_RANGE(0x8000, 0x8000) AM_DEVWRITE("sn1", sn76496_w)
245	218	AM_RANGE(0x9000, 0x9000) AM_DEVWRITE("sn2", sn76496_w)
246	219	AM_RANGE(0xa000, 0xa000) AM_DEVWRITE("sn3", sn76496_w)
r4679	r4680
249	222	AM_RANGE(0xe000, 0xe000) AM_WRITE(unknown)
250	223	AM_RANGE(0xf000, 0xf000) AM_WRITE(unknown)
251	224	#endif
252
253		AM_RANGE(0xf000, 0xffff) AM_WRITE(SMH_RAM)
	225	AM_RANGE(0xf000, 0xffff) AM_RAM
254	226	ADDRESS_MAP_END
255	227
256		static WRITE8_DEVICE_HANDLER( pio_w )
257		{
258		if (offset & 1)
259		z80pio_c_w(device, (offset >> 1) & 1, data);
260		else
261		z80pio_d_w(device, (offset >> 1) & 1, data);
262		}
263	228
264		static READ8_DEVICE_HANDLER( pio_r )
265		{
266		return (offset & 1) ? z80pio_c_r(device, (offset >> 1) & 1) : z80pio_d_r(device, (offset >> 1) & 1);
267		}
268
269		static ADDRESS_MAP_START( sound_io_map, ADDRESS_SPACE_IO, 8 )
270		ADDRESS_MAP_GLOBAL_MASK(0xff)
271		AM_RANGE(0x00, 0x03) AM_DEVREADWRITE("z80pio", pio_r, pio_w)
272		AM_RANGE(0x08, 0x0b) AM_DEVREADWRITE("z80ctc", z80ctc_r, z80ctc_w)
273		ADDRESS_MAP_END
274
275
276
277	229	static INPUT_PORTS_START( senjyo )
278	230	PORT_START("P1")
279	231	PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_JOYSTICK_RIGHT ) PORT_8WAY
r4679	r4680
596	548
597	549	/* basic machine hardware */
598	550	MDRV_CPU_ADD("maincpu", Z80, 4000000)   /* 4 MHz? */
599		MDRV_CPU_PROGRAM_MAP(readmem,writemem)
	551	MDRV_CPU_PROGRAM_MAP(senjyo_map,0)
600	552	MDRV_CPU_VBLANK_INT("screen", senjyo_interrupt)
601	553
602	554	MDRV_CPU_ADD("sub", Z80, 2000000)   /* 2 MHz? */
603	555	MDRV_CPU_CONFIG(senjyo_daisy_chain)
604		MDRV_CPU_PROGRAM_MAP(sound_readmem,sound_writemem)
605		MDRV_CPU_IO_MAP(sound_io_map,0)
	556	MDRV_CPU_PROGRAM_MAP(senjyo_sound_map,0)
	557	MDRV_CPU_IO_MAP(senjyo_sound_io_map,0)
606	558
607	559	MDRV_MACHINE_RESET(senjyo)
608	560
r4679	r4680
646	598	/* basic machine hardware */
647	599	MDRV_IMPORT_FROM(senjyo)
648	600	MDRV_CPU_MODIFY("maincpu")
649		MDRV_CPU_PROGRAM_MAP(readmem,starforb_writemem)
	601	MDRV_CPU_PROGRAM_MAP(starforb_map,0)
650	602
651	603	MDRV_CPU_MODIFY("sub")
652		MDRV_CPU_PROGRAM_MAP(starforb_sound_readmem,starforb_sound_writemem)
	604	MDRV_CPU_PROGRAM_MAP(starforb_sound_map,0)
653	605	MACHINE_DRIVER_END
654	606
655	607

src/mame/drivers/maygay1b.c

r4679	r4680
465	465
466	466	static void duart_irq_handler(const device_config *device, UINT8 state)
467	467	{
468		cpu_set_input_line(device->machine->cpu[0], M6809_IRQ_LINE, state?ASSERT_LINE:CLEAR_LINE);
	468	cputag_set_input_line(device->machine, "maincpu", M6809_IRQ_LINE, state?ASSERT_LINE:CLEAR_LINE);
469	469	LOG(("6809 irq%d \n",state));
470	470	}
471	471
r4679	r4680
707	707	static WRITE8_DEVICE_HANDLER( m1_meter_w )
708	708	{
709	709	int i;
710		UINT64 cycles  = cpu_get_total_cycles(device->machine->cpu[0]);
	710	UINT64 cycles  = cputag_get_total_cycles(device->machine, "maincpu");
711	711
712	712	for (i=0; i<8; i++)
713	713	if ( data & (1 << i) )   Mechmtr_update(i, cycles, data & (1 << i) );

src/mame/drivers/bfm_sc1.c

r4679	r4680
180	180
181	181	sc1_Inputs[2] = input_port_read(device->machine,"STROBE0");
182	182
183		generic_pulse_irq_line(device->machine->cpu[0], M6809_IRQ_LINE);
	183	generic_pulse_irq_line(cputag_get_cpu(device->machine, "maincpu"), M6809_IRQ_LINE);
184	184	}
185	185	}
186	186
r4679	r4680
277	277	if ( changed & (1 << i) )
278	278	{
279	279	Mechmtr_update(i, cycles, data & (1 << i) );
280		generic_pulse_irq_line(space->machine->cpu[0], M6809_FIRQ_LINE);
	280	generic_pulse_irq_line(cputag_get_cpu(space->machine, "maincpu"), M6809_FIRQ_LINE);
281	281	}
282	282	}
283	283	}
r4679	r4680
371	371	adder2_sc2data       = data;   // store data
372	372
373	373	adder2_acia_triggered = 1;      // set flag, acia IRQ triggered
374		cpu_set_input_line(machine->cpu[1], M6809_IRQ_LINE, ASSERT_LINE );//HOLD_LINE);// trigger IRQ
	374	cputag_set_input_line(machine, "adder2", M6809_IRQ_LINE, ASSERT_LINE );//HOLD_LINE);// trigger IRQ
375	375	}
376	376
377	377	///////////////////////////////////////////////////////////////////////////
r4679	r4680
497	497	if ( changed & 0x08 )
498	498	{ // clock changed
499	499
500		if ( (!data & 0x08) )
	500	if ( !(data & 0x08) )
501	501	{ // clock changed to low
502	502	int strobe, offset, pattern, i;
503	503
r4679	r4680
662	662
663	663	rom = memory_region(machine,rom_region);
664	664
665		tmp = malloc_or_die(0x10000);
	665	tmp = alloc_array_or_die(UINT8, 0x10000);
666	666
667	667	{
668	668	int i;
r4679	r4680
797	797	AM_RANGE(0x3800, 0x39FF) AM_WRITE(reel56_w)    // reel 5+6 latch
798	798
799	799	AM_RANGE(0x4000, 0x5FFF) AM_ROM            // 8k  ROM
800		AM_RANGE(0x6000, 0x7FFF) AM_READ(SMH_BANK1) // 8k  paged ROM (4 pages)
	800	AM_RANGE(0x6000, 0x7FFF) AM_READ(SMH_BANK(1)) // 8k  paged ROM (4 pages)
801	801	AM_RANGE(0x8000, 0xFFFF) AM_READWRITE(SMH_ROM,watchdog_w)    // 32k ROM
802	802
803	803	ADDRESS_MAP_END
r4679	r4680
845	845	AM_RANGE(0x3E01, 0x3E01) AM_READWRITE(vid_uart_rx_r,vid_uart_tx_w)      // video uart receive  reg
846	846
847	847	AM_RANGE(0x4000, 0x5FFF) AM_ROM            // 8k  ROM
848		AM_RANGE(0x6000, 0x7FFF) AM_READ(SMH_BANK1) // 8k  paged ROM (4 pages)
	848	AM_RANGE(0x6000, 0x7FFF) AM_READ(SMH_BANK(1)) // 8k  paged ROM (4 pages)
849	849	AM_RANGE(0x8000, 0xFFFF) AM_READWRITE(SMH_ROM,watchdog_w)    // 32k ROM
850	850
851	851	ADDRESS_MAP_END
r4679	r4680
890	890	AM_RANGE(0x3800, 0x39FF) AM_DEVWRITE("upd", nec_latch_w)
891	891
892	892	AM_RANGE(0x4000, 0x5FFF) AM_ROM                     // 8k  ROM
893		AM_RANGE(0x6000, 0x7FFF) AM_READ(SMH_BANK1)            // 8k  paged ROM (4 pages)
	893	AM_RANGE(0x6000, 0x7FFF) AM_READ(SMH_BANK(1))            // 8k  paged ROM (4 pages)
894	894	AM_RANGE(0x8000, 0xFFFF) AM_READWRITE(SMH_ROM,watchdog_w)   // 32k ROM
895	895
896	896	ADDRESS_MAP_END

src/mame/drivers/snowbros.c

r4679	r4680
71	71	#include "sound/okim6295.h"
72	72	#include "video/kan_pand.h" // for the original pandora
73	73	#include "video/kan_panb.h" // for bootlegs / non-original hw
	74	#include "cpu/mcs51/mcs51.h" // for semicom mcu
74	75
75
76	76	static WRITE16_HANDLER( snowbros_flipscreen_w )
77	77	{
78	78	if (ACCESSING_BITS_8_15)
r4679	r4680
104	104	static int sb3_music_is_playing;
105	105	static int sb3_music;
106	106
	107	static WRITE16_HANDLER( snowbros_irq4_ack_w )
	108	{
	109	cputag_set_input_line(space->machine, "maincpu", 4, CLEAR_LINE);
	110	}
	111
	112	static WRITE16_HANDLER( snowbros_irq3_ack_w )
	113	{
	114	cputag_set_input_line(space->machine, "maincpu", 3, CLEAR_LINE);
	115	}
	116
	117	static WRITE16_HANDLER( snowbros_irq2_ack_w )
	118	{
	119	cputag_set_input_line(space->machine, "maincpu", 2, CLEAR_LINE);
	120	}
	121
107	122	static INTERRUPT_GEN( snowbros_interrupt )
108	123	{
109		cpu_set_input_line(device, cpu_getiloops(device) + 2, HOLD_LINE);   /* IRQs 4, 3, and 2 */
	124	cpu_set_input_line(device, cpu_getiloops(device) + 2, ASSERT_LINE);   /* IRQs 4, 3, and 2 */
110	125	}
111	126
112	127	static INTERRUPT_GEN( snowbro3_interrupt )
r4679	r4680
114	129	const device_config *adpcm = devtag_get_device(device->machine, "oki");
115	130	int status = okim6295_r(adpcm,0);
116	131
117		cpu_set_input_line(device, cpu_getiloops(device) + 2, HOLD_LINE);   /* IRQs 4, 3, and 2 */
	132	cpu_set_input_line(device, cpu_getiloops(device) + 2, ASSERT_LINE);   /* IRQs 4, 3, and 2 */
118	133
119	134	if (sb3_music_is_playing)
120	135	{
r4679	r4680
148	163	{
149	164	if (ACCESSING_BITS_0_7)
150	165	{
151		soundlatch_w(space,offset,data & 0xff);
152		cpu_set_input_line(space->machine->cpu[1],INPUT_LINE_NMI,PULSE_LINE);
	166	soundlatch_w(space, offset, data & 0xff);
	167	cputag_set_input_line(space->machine, "soundcpu", INPUT_LINE_NMI, PULSE_LINE);
153	168	}
154	169	}
155	170
r4679	r4680
158	173	if (ACCESSING_BITS_0_7) soundlatch_w(space,0,data & 0xff);
159	174	}
160	175
161
162	176	/* Snow Bros Memory Map */
163	177
164		static ADDRESS_MAP_START( readmem, ADDRESS_SPACE_PROGRAM, 16 )
165		AM_RANGE(0x000000, 0x03ffff) AM_READ(SMH_ROM)
166		AM_RANGE(0x100000, 0x103fff) AM_READ(SMH_RAM)
167		AM_RANGE(0x300000, 0x300001) AM_READ(snowbros_68000_sound_r)
	178	static ADDRESS_MAP_START( snowbros_map, ADDRESS_SPACE_PROGRAM, 16 )
	179	AM_RANGE(0x000000, 0x03ffff) AM_ROM
	180	AM_RANGE(0x100000, 0x103fff) AM_RAM
	181	AM_RANGE(0x200000, 0x200001) AM_WRITE(watchdog_reset16_w)
	182	AM_RANGE(0x300000, 0x300001) AM_READWRITE(snowbros_68000_sound_r,snowbros_68000_sound_w)
	183	AM_RANGE(0x400000, 0x400001) AM_WRITE(snowbros_flipscreen_w)
168	184	AM_RANGE(0x500000, 0x500001) AM_READ_PORT("DSW1")
169	185	AM_RANGE(0x500002, 0x500003) AM_READ_PORT("DSW2")
170	186	AM_RANGE(0x500004, 0x500005) AM_READ_PORT("SYSTEM")
171		AM_RANGE(0x600000, 0x6001ff) AM_READ(SMH_RAM)
172		AM_RANGE(0x700000, 0x701fff) AM_READ(pandora_spriteram_LSB_r)
	187	AM_RANGE(0x600000, 0x6001ff) AM_RAM_WRITE(paletteram16_xBBBBBGGGGGRRRRR_word_w) AM_BASE(&paletteram16)
	188	AM_RANGE(0x700000, 0x701fff) AM_READWRITE(pandora_spriteram_LSB_r,pandora_spriteram_LSB_w)
	189	AM_RANGE(0x800000, 0x800001) AM_WRITE(snowbros_irq4_ack_w)   /* IRQ 4 acknowledge */
	190	AM_RANGE(0x900000, 0x900001) AM_WRITE(snowbros_irq3_ack_w)   /* IRQ 3 acknowledge */
	191	AM_RANGE(0xa00000, 0xa00001) AM_WRITE(snowbros_irq2_ack_w)   /* IRQ 2 acknowledge */
173	192	ADDRESS_MAP_END
174	193
175		static ADDRESS_MAP_START( writemem, ADDRESS_SPACE_PROGRAM, 16 )
176		AM_RANGE(0x000000, 0x03ffff) AM_WRITE(SMH_ROM)
177		AM_RANGE(0x100000, 0x103fff) AM_WRITE(SMH_RAM)
178		AM_RANGE(0x200000, 0x200001) AM_WRITE(watchdog_reset16_w)
179		AM_RANGE(0x300000, 0x300001) AM_WRITE(snowbros_68000_sound_w)
180		AM_RANGE(0x400000, 0x400001) AM_WRITE(snowbros_flipscreen_w)
181		AM_RANGE(0x600000, 0x6001ff) AM_WRITE(paletteram16_xBBBBBGGGGGRRRRR_word_w) AM_BASE(&paletteram16)
182		AM_RANGE(0x700000, 0x701fff) AM_WRITE(pandora_spriteram_LSB_w)
183		AM_RANGE(0x800000, 0x800001) AM_WRITENOP   /* IRQ 4 acknowledge? */
184		AM_RANGE(0x900000, 0x900001) AM_WRITENOP   /* IRQ 3 acknowledge? */
185		AM_RANGE(0xa00000, 0xa00001) AM_WRITENOP   /* IRQ 2 acknowledge? */
	194	static ADDRESS_MAP_START( sound_map, ADDRESS_SPACE_PROGRAM, 8 )
	195	AM_RANGE(0x0000, 0x7fff) AM_ROM
	196	AM_RANGE(0x8000, 0x87ff) AM_RAM
186	197	ADDRESS_MAP_END
187	198
188		static ADDRESS_MAP_START( sound_readmem, ADDRESS_SPACE_PROGRAM, 8 )
189		AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM)
190		AM_RANGE(0x8000, 0x87ff) AM_READ(SMH_RAM)
191		ADDRESS_MAP_END
192
193		static ADDRESS_MAP_START( sound_writemem, ADDRESS_SPACE_PROGRAM, 8 )
194		AM_RANGE(0x0000, 0x7fff) AM_WRITE(SMH_ROM)
195		AM_RANGE(0x8000, 0x87ff) AM_WRITE(SMH_RAM)
196		ADDRESS_MAP_END
197
198	199	static ADDRESS_MAP_START( sound_io_map, ADDRESS_SPACE_IO, 8 )
199	200	ADDRESS_MAP_GLOBAL_MASK(0xff)
200	201	AM_RANGE(0x02, 0x03) AM_DEVREADWRITE("ym", ym3812_r, ym3812_w)
201	202	AM_RANGE(0x04, 0x04) AM_READWRITE(soundlatch_r, soundlatch_w)   /* goes back to the main CPU, checked during boot */
202	203	ADDRESS_MAP_END
203	204
	205
	206
	207	static READ8_HANDLER( prot_io_r )
	208	{
	209	// never read?
	210	return 0x00;
	211	}
	212
	213	static UINT8 semicom_prot_offset = 0x00;
	214
	215	// probably not endian safe
	216	static WRITE8_HANDLER( prot_io_w )
	217	{
	218	switch (offset)
	219	{
	220	case 0x00:
	221	{
	222	UINT16 word = hyperpac_ram[(0xe000/2)+semicom_prot_offset];
	223	word = (word & 0xff00) | (data << 0);
	224	hyperpac_ram[(0xe000/2)+semicom_prot_offset] = word;
	225	break;
	226	}
	227
	228	case 0x01:
	229	{
	230	UINT16 word = hyperpac_ram[(0xe000/2)+semicom_prot_offset];
	231	word = (word & 0x00ff) | (data << 8);
	232	hyperpac_ram[(0xe000/2)+semicom_prot_offset] = word;
	233	break;
	234	}
	235
	236	case 0x02: // offset
	237	{
	238	semicom_prot_offset = data;
	239	break;
	240	}
	241
	242	case 0x03: // ??
	243	{
	244	//logerror("offset %02x data %02x\n",offset,data);
	245	break;
	246	}
	247	}
	248	}
	249
	250	/* Semicom AT89C52 MCU */
	251	static ADDRESS_MAP_START( protection_map, ADDRESS_SPACE_PROGRAM, 8 )
	252	AM_RANGE(0x0000, 0x1fff) AM_ROM
	253	ADDRESS_MAP_END
	254
	255	static ADDRESS_MAP_START( protection_iomap, ADDRESS_SPACE_IO, 8 )
	256	AM_RANGE(MCS51_PORT_P0, MCS51_PORT_P3) AM_READWRITE(prot_io_r,prot_io_w)
	257	ADDRESS_MAP_END
	258
204	259	/* Winter Bobble - bootleg GFX chip */
205	260
206		static ADDRESS_MAP_START( wintbob_readmem, ADDRESS_SPACE_PROGRAM, 16 )
207		AM_RANGE(0x000000, 0x03ffff) AM_READ(SMH_ROM)
208		AM_RANGE(0x100000, 0x103fff) AM_READ(SMH_RAM)
209		AM_RANGE(0x300000, 0x300001) AM_READ(snowbros_68000_sound_r)
	261	static ADDRESS_MAP_START( wintbob_map, ADDRESS_SPACE_PROGRAM, 16 )
	262	AM_RANGE(0x000000, 0x03ffff) AM_ROM
	263	AM_RANGE(0x100000, 0x103fff) AM_RAM
	264	AM_RANGE(0x200000, 0x200001) AM_WRITE(watchdog_reset16_w)
	265	AM_RANGE(0x300000, 0x300001) AM_READWRITE(snowbros_68000_sound_r,snowbros_68000_sound_w)
	266	AM_RANGE(0x400000, 0x400001) AM_WRITE(snowbros_flipscreen_w)
210	267	AM_RANGE(0x500000, 0x500001) AM_READ_PORT("DSW1")
211	268	AM_RANGE(0x500002, 0x500003) AM_READ_PORT("DSW2")
212	269	AM_RANGE(0x500004, 0x500005) AM_READ_PORT("SYSTEM")
213		AM_RANGE(0x600000, 0x6001ff) AM_READ(SMH_RAM)
214		AM_RANGE(0x700000, 0x701fff) AM_READ(SMH_RAM)
	270	AM_RANGE(0x600000, 0x6001ff) AM_RAM_WRITE(paletteram16_xBBBBBGGGGGRRRRR_word_w) AM_BASE(&paletteram16)
	271	AM_RANGE(0x700000, 0x701fff) AM_RAM AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)
	272	AM_RANGE(0x800000, 0x800001) AM_WRITE(snowbros_irq4_ack_w)   /* IRQ 4 acknowledge */
	273	AM_RANGE(0x900000, 0x900001) AM_WRITE(snowbros_irq3_ack_w)   /* IRQ 3 acknowledge */
	274	AM_RANGE(0xa00000, 0xa00001) AM_WRITE(snowbros_irq2_ack_w)   /* IRQ 2 acknowledge */
215	275	ADDRESS_MAP_END
216	276
217		static ADDRESS_MAP_START( wintbob_writemem, ADDRESS_SPACE_PROGRAM, 16 )
218		AM_RANGE(0x000000, 0x03ffff) AM_WRITE(SMH_ROM)
219		AM_RANGE(0x100000, 0x103fff) AM_WRITE(SMH_RAM)
220		AM_RANGE(0x200000, 0x200001) AM_WRITE(watchdog_reset16_w)
221		AM_RANGE(0x300000, 0x300001) AM_WRITE(snowbros_68000_sound_w)
222		AM_RANGE(0x400000, 0x400001) AM_WRITE(snowbros_flipscreen_w)
223		AM_RANGE(0x600000, 0x6001ff) AM_WRITE(paletteram16_xBBBBBGGGGGRRRRR_word_w) AM_BASE(&paletteram16)
224		AM_RANGE(0x700000, 0x701fff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)
225		AM_RANGE(0x800000, 0x800001) AM_WRITENOP   /* IRQ 4 acknowledge? */
226		AM_RANGE(0x900000, 0x900001) AM_WRITENOP   /* IRQ 3 acknowledge? */
227		AM_RANGE(0xa00000, 0xa00001) AM_WRITENOP   /* IRQ 2 acknowledge? */
228		ADDRESS_MAP_END
229
230	277	/* Honey Dolls */
231	278
232		static ADDRESS_MAP_START( honeydol_readmem, ADDRESS_SPACE_PROGRAM, 16 )
233		AM_RANGE(0x000000, 0x03ffff) AM_READ(SMH_ROM)
234		AM_RANGE(0x100000, 0x10ffff) AM_READ(SMH_RAM)
	279	static ADDRESS_MAP_START( honeydol_map, ADDRESS_SPACE_PROGRAM, 16 )
	280	AM_RANGE(0x000000, 0x03ffff) AM_ROM
	281	AM_RANGE(0x100000, 0x10ffff) AM_RAM AM_BASE(&hyperpac_ram)
	282	AM_RANGE(0x200000, 0x200001) AM_WRITENOP   /* ? */
	283	AM_RANGE(0x300000, 0x300001) AM_WRITE(snowbros_68000_sound_w)   /* ? */
	284	AM_RANGE(0x400000, 0x400001) AM_WRITE(snowbros_irq4_ack_w)   /* IRQ 4 acknowledge */
	285	AM_RANGE(0x500000, 0x500001) AM_WRITE(snowbros_irq3_ack_w)   /* IRQ 3 acknowledge */
	286	AM_RANGE(0x600000, 0x600001) AM_WRITE(snowbros_irq2_ack_w)   /* IRQ 2 acknowledge */
	287	AM_RANGE(0x800000, 0x800001) AM_WRITENOP   /* ? */
235	288	AM_RANGE(0x900000, 0x900001) AM_READ_PORT("DSW1")
236	289	AM_RANGE(0x900002, 0x900003) AM_READ_PORT("DSW2")
237	290	AM_RANGE(0x900004, 0x900005) AM_READ_PORT("SYSTEM")
238		AM_RANGE(0xa00000, 0xa007ff) AM_READ(SMH_RAM)
239		AM_RANGE(0xb00000, 0xb01fff) AM_READ(SMH_RAM)
	291	AM_RANGE(0xa00000, 0xa007ff) AM_RAM_WRITE(paletteram16_xBBBBBGGGGGRRRRR_word_w) AM_BASE(&paletteram16)
	292	AM_RANGE(0xb00000, 0xb01fff) AM_RAM AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)
240	293	ADDRESS_MAP_END
241	294
242		static ADDRESS_MAP_START( honeydol_writemem, ADDRESS_SPACE_PROGRAM, 16 )
243		AM_RANGE(0x000000, 0x03ffff) AM_WRITE(SMH_ROM)
244		AM_RANGE(0x100000, 0x10ffff) AM_WRITE(SMH_RAM) AM_BASE(&hyperpac_ram)
245		AM_RANGE(0x200000, 0x200001) AM_WRITENOP   /* ?*/
246		AM_RANGE(0x300000, 0x300001) AM_WRITE(snowbros_68000_sound_w)   /* ?*/
247		AM_RANGE(0xa00000, 0xa007ff) AM_WRITE(paletteram16_xBBBBBGGGGGRRRRR_word_w) AM_BASE(&paletteram16)
248		AM_RANGE(0xb00000, 0xb01fff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)
249		AM_RANGE(0x400000, 0x400001) AM_WRITENOP   /* IRQ 4 acknowledge? */
250		AM_RANGE(0x500000, 0x500001) AM_WRITENOP   /* IRQ 3 acknowledge? */
251		AM_RANGE(0x600000, 0x600001) AM_WRITENOP   /* IRQ 2 acknowledge? */
252		AM_RANGE(0x800000, 0x800001) AM_WRITENOP   /* ?*/
	295	static ADDRESS_MAP_START( honeydol_sound_map, ADDRESS_SPACE_PROGRAM, 8 )
	296	AM_RANGE(0x0000, 0x7fff) AM_ROM
	297	AM_RANGE(0x8000, 0x87ff) AM_RAM
	298	AM_RANGE(0xe010, 0xe010) AM_DEVREADWRITE("oki", okim6295_r,okim6295_w)
253	299	ADDRESS_MAP_END
254	300
255		static ADDRESS_MAP_START( honeydol_sound_readmem, ADDRESS_SPACE_PROGRAM, 8 )
256		AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM)
257		AM_RANGE(0x8000, 0x87ff) AM_READ(SMH_RAM)
258		AM_RANGE(0xe010, 0xe010) AM_DEVREAD("oki", okim6295_r)
259		ADDRESS_MAP_END
260
261		static ADDRESS_MAP_START( honeydol_sound_writemem, ADDRESS_SPACE_PROGRAM, 8 )
262		AM_RANGE(0x0000, 0x7fff) AM_WRITE(SMH_ROM)
263		AM_RANGE(0x8000, 0x87ff) AM_WRITE(SMH_RAM)
264		AM_RANGE(0xe010, 0xe010) AM_DEVWRITE("oki", okim6295_w)
265		ADDRESS_MAP_END
266
267	301	static ADDRESS_MAP_START( honeydol_sound_io_map, ADDRESS_SPACE_IO, 8 )
268	302	ADDRESS_MAP_GLOBAL_MASK(0xff)
269	303	AM_RANGE(0x02, 0x03) AM_DEVREADWRITE("ym", ym3812_r, ym3812_w)                        // not connected?
r4679	r4680
276	310	{
277	311	if (ACCESSING_BITS_0_7)
278	312	{
279		soundlatch_w(space,offset,data & 0xff);
280		cpu_set_input_line(space->machine->cpu[1],INPUT_LINE_NMI,PULSE_LINE);
	313	soundlatch_w(space, offset, data & 0xff);
	314	cputag_set_input_line(space->machine, "soundcpu", INPUT_LINE_NMI, PULSE_LINE);
281	315	}
282	316	}
283	317
284		static ADDRESS_MAP_START( twinadv_readmem, ADDRESS_SPACE_PROGRAM, 16 )
285		AM_RANGE(0x000000, 0x03ffff) AM_READ(SMH_ROM)
286		AM_RANGE(0x100000, 0x10ffff) AM_READ(SMH_RAM)
287		AM_RANGE(0x300000, 0x300001) AM_READ(snowbros_68000_sound_r)
	318	static ADDRESS_MAP_START( twinadv_map, ADDRESS_SPACE_PROGRAM, 16 )
	319	AM_RANGE(0x000000, 0x03ffff) AM_ROM
	320	AM_RANGE(0x100000, 0x10ffff) AM_RAM
	321	AM_RANGE(0x200000, 0x200001) AM_WRITE(watchdog_reset16_w)
	322	AM_RANGE(0x300000, 0x300001) AM_READWRITE(snowbros_68000_sound_r,twinadv_68000_sound_w)
	323	AM_RANGE(0x400000, 0x400001) AM_WRITE(snowbros_flipscreen_w)
	324
288	325	AM_RANGE(0x500000, 0x500001) AM_READ_PORT("DSW1")
289	326	AM_RANGE(0x500002, 0x500003) AM_READ_PORT("DSW2")
290	327	AM_RANGE(0x500004, 0x500005) AM_READ_PORT("SYSTEM")
291		AM_RANGE(0x600000, 0x6001ff) AM_READ(SMH_RAM)
292		AM_RANGE(0x700000, 0x701fff) AM_READ(SMH_RAM)
	328	AM_RANGE(0x600000, 0x6001ff) AM_RAM_WRITE(paletteram16_xBBBBBGGGGGRRRRR_word_w) AM_BASE(&paletteram16)
	329	AM_RANGE(0x700000, 0x701fff) AM_RAM AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)
	330	AM_RANGE(0x800000, 0x800001) AM_WRITE(snowbros_irq4_ack_w)   /* IRQ 4 acknowledge */
	331	AM_RANGE(0x900000, 0x900001) AM_WRITE(snowbros_irq3_ack_w)   /* IRQ 3 acknowledge */
	332	AM_RANGE(0xa00000, 0xa00001) AM_WRITE(snowbros_irq2_ack_w)   /* IRQ 2 acknowledge */
293	333	ADDRESS_MAP_END
294	334
295		static ADDRESS_MAP_START( twinadv_writemem, ADDRESS_SPACE_PROGRAM, 16 )
296		AM_RANGE(0x000000, 0x03ffff) AM_WRITE(SMH_ROM)
297		AM_RANGE(0x100000, 0x10ffff) AM_WRITE(SMH_RAM)
298		AM_RANGE(0x200000, 0x200001) AM_WRITE(watchdog_reset16_w)
299		AM_RANGE(0x300000, 0x300001) AM_WRITE(twinadv_68000_sound_w)
300		AM_RANGE(0x400000, 0x400001) AM_WRITE(snowbros_flipscreen_w)
301		AM_RANGE(0x600000, 0x6001ff) AM_WRITE(paletteram16_xBBBBBGGGGGRRRRR_word_w) AM_BASE(&paletteram16)
302		AM_RANGE(0x700000, 0x701fff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)
303		AM_RANGE(0x800000, 0x800001) AM_WRITENOP   /* IRQ 4 acknowledge? */
304		AM_RANGE(0x900000, 0x900001) AM_WRITENOP   /* IRQ 3 acknowledge? */
305		AM_RANGE(0xa00000, 0xa00001) AM_WRITENOP   /* IRQ 2 acknowledge? */
306		ADDRESS_MAP_END
307
308
309		static ADDRESS_MAP_START( twinadv_sound_readmem, ADDRESS_SPACE_PROGRAM, 8 )
310		AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM)
311		AM_RANGE(0x8000, 0x87ff) AM_READ(SMH_RAM)
312		//  AM_RANGE(0xe010, 0xe010) AM_DEVREAD("oki", okim6295_r)
313		ADDRESS_MAP_END
314
315		static ADDRESS_MAP_START( twinadv_sound_writemem, ADDRESS_SPACE_PROGRAM, 8 )
316		AM_RANGE(0x0000, 0x7fff) AM_WRITE(SMH_ROM)
317		AM_RANGE(0x8000, 0x87ff) AM_WRITE(SMH_RAM)
318		//  AM_RANGE(0xe010, 0xe010) AM_DEVWRITE("oki", okim6295_w)
319		ADDRESS_MAP_END
320
321	335	static WRITE8_DEVICE_HANDLER( twinadv_oki_bank_w )
322	336	{
323	337	int bank = (data &0x02)>>1;
r4679	r4680
342	356
343	357	*/
344	358
345		static ADDRESS_MAP_START( hyperpac_readmem, ADDRESS_SPACE_PROGRAM, 16 )
346		AM_RANGE(0x000000, 0x0fffff) AM_READ(SMH_ROM)
347		AM_RANGE(0x100000, 0x10ffff) AM_READ(SMH_RAM)
348
	359	static ADDRESS_MAP_START( hyperpac_map, ADDRESS_SPACE_PROGRAM, 16 )
	360	AM_RANGE(0x000000, 0x0fffff) AM_ROM
	361	AM_RANGE(0x100000, 0x10ffff) AM_RAM AM_BASE(&hyperpac_ram)
	362	AM_RANGE(0x300000, 0x300001) AM_WRITE(semicom_soundcmd_w)
	363	//  AM_RANGE(0x400000, 0x400001) ???
349	364	AM_RANGE(0x500000, 0x500001) AM_READ_PORT("DSW1")
350	365	AM_RANGE(0x500002, 0x500003) AM_READ_PORT("DSW2")
351	366	AM_RANGE(0x500004, 0x500005) AM_READ_PORT("SYSTEM")
352	367
353		AM_RANGE(0x600000, 0x6001ff) AM_READ(SMH_RAM)
354		AM_RANGE(0x700000, 0x701fff) AM_READ(pandora_spriteram_LSB_r)
	368	AM_RANGE(0x600000, 0x6001ff) AM_RAM_WRITE(paletteram16_xBBBBBGGGGGRRRRR_word_w) AM_BASE(&paletteram16)
	369	AM_RANGE(0x700000, 0x701fff) AM_READWRITE(pandora_spriteram_LSB_r,pandora_spriteram_LSB_w)
	370	AM_RANGE(0x800000, 0x800001) AM_WRITE(snowbros_irq4_ack_w)   /* IRQ 4 acknowledge */
	371	AM_RANGE(0x900000, 0x900001) AM_WRITE(snowbros_irq3_ack_w)   /* IRQ 3 acknowledge */
	372	AM_RANGE(0xa00000, 0xa00001) AM_WRITE(snowbros_irq2_ack_w)   /* IRQ 2 acknowledge */
355	373	ADDRESS_MAP_END
356	374
357		static ADDRESS_MAP_START( hyperpac_writemem, ADDRESS_SPACE_PROGRAM, 16 )
358		AM_RANGE(0x000000, 0x0fffff) AM_WRITE(SMH_ROM)
359		AM_RANGE(0x100000, 0x10ffff) AM_WRITE(SMH_RAM) AM_BASE(&hyperpac_ram)
360		AM_RANGE(0x300000, 0x300001) AM_WRITE(semicom_soundcmd_w)
361		//  AM_RANGE(0x400000, 0x400001) ???
362		AM_RANGE(0x600000, 0x6001ff) AM_WRITE(paletteram16_xBBBBBGGGGGRRRRR_word_w) AM_BASE(&paletteram16)
363		AM_RANGE(0x700000, 0x701fff) AM_WRITE(pandora_spriteram_LSB_w)
364
365		AM_RANGE(0x800000, 0x800001) AM_WRITENOP   /* IRQ 4 acknowledge? */
366		AM_RANGE(0x900000, 0x900001) AM_WRITENOP   /* IRQ 3 acknowledge? */
367		AM_RANGE(0xa00000, 0xa00001) AM_WRITENOP   /* IRQ 2 acknowledge? */
368		ADDRESS_MAP_END
369
370		static ADDRESS_MAP_START( hyperpac_sound_readmem, ADDRESS_SPACE_PROGRAM, 8 )
371		AM_RANGE(0x0000, 0xcfff) AM_READ(SMH_ROM)
372		AM_RANGE(0xd000, 0xd7ff) AM_READ(SMH_RAM)
373		AM_RANGE(0xf000, 0xf001) AM_DEVREAD("ym", ym2151_r)
	375	static ADDRESS_MAP_START( hyperpac_sound_map, ADDRESS_SPACE_PROGRAM, 8 )
	376	AM_RANGE(0x0000, 0xcfff) AM_ROM
	377	AM_RANGE(0xd000, 0xd7ff) AM_RAM
	378	AM_RANGE(0xf000, 0xf001) AM_DEVREADWRITE("ym", ym2151_r,ym2151_w)
	379	AM_RANGE(0xf002, 0xf002) AM_DEVREADWRITE("oki",okim6295_r,okim6295_w)
374	380	AM_RANGE(0xf008, 0xf008) AM_READ(soundlatch_r)
375	381	ADDRESS_MAP_END
376	382
377		static ADDRESS_MAP_START( hyperpac_sound_writemem, ADDRESS_SPACE_PROGRAM, 8 )
378		AM_RANGE(0x0000, 0xcfff) AM_WRITE(SMH_ROM)
379		AM_RANGE(0xd000, 0xd7ff) AM_WRITE(SMH_RAM)
380		AM_RANGE(0xf000, 0xf001) AM_DEVWRITE("ym", ym2151_w)
381		AM_RANGE(0xf002, 0xf002) AM_DEVWRITE("oki", okim6295_w)
382		//  AM_RANGE(0xf006, 0xf006) ???
383		ADDRESS_MAP_END
384
385	383	/* Same volume used for all samples at the Moment, could be right, we have no
386	384	way of knowing .. */
387	385	static READ16_HANDLER( sb3_sound_r )
r4679	r4680
489	487
490	488
491	489
492		static ADDRESS_MAP_START( readmem3, ADDRESS_SPACE_PROGRAM, 16 )
493		AM_RANGE( 0x000000, 0x03ffff) AM_READ(SMH_ROM)
494		AM_RANGE( 0x100000, 0x103fff) AM_READ(SMH_RAM)
	490	static ADDRESS_MAP_START( snowbros3_map, ADDRESS_SPACE_PROGRAM, 16 )
	491	AM_RANGE( 0x000000, 0x03ffff) AM_ROM
	492	AM_RANGE( 0x100000, 0x103fff) AM_RAM
	493	AM_RANGE( 0x200000, 0x200001) AM_WRITE(watchdog_reset16_w)
495	494	AM_RANGE( 0x300000, 0x300001) AM_READ(sb3_sound_r) // ?
	495	AM_RANGE( 0x300000, 0x300001) AM_DEVWRITE("oki", sb3_sound_w)  // ?
	496	AM_RANGE( 0x400000, 0x400001) AM_WRITE(snowbros_flipscreen_w)
496	497	AM_RANGE( 0x500000, 0x500001) AM_READ_PORT("DSW1")
497	498	AM_RANGE( 0x500002, 0x500003) AM_READ_PORT("DSW2")
498	499	AM_RANGE( 0x500004, 0x500005) AM_READ_PORT("SYSTEM")
499		AM_RANGE( 0x600000, 0x6003ff) AM_READ(SMH_RAM)
500		AM_RANGE( 0x700000, 0x7021ff) AM_READ(SMH_RAM)
	500	AM_RANGE( 0x600000, 0x6003ff) AM_RAM_WRITE(paletteram16_xBBBBBGGGGGRRRRR_word_w) AM_BASE (&paletteram16)
	501	AM_RANGE( 0x700000, 0x7021ff) AM_RAM AM_BASE( &spriteram16) AM_SIZE( &spriteram_size )
	502	AM_RANGE(0x800000, 0x800001) AM_WRITE(snowbros_irq4_ack_w)   /* IRQ 4 acknowledge */
	503	AM_RANGE(0x900000, 0x900001) AM_WRITE(snowbros_irq3_ack_w)   /* IRQ 3 acknowledge */
	504	AM_RANGE(0xa00000, 0xa00001) AM_WRITE(snowbros_irq2_ack_w)   /* IRQ 2 acknowledge */
501	505	ADDRESS_MAP_END
502	506
503		static ADDRESS_MAP_START( writemem3, ADDRESS_SPACE_PROGRAM, 16 )
504		AM_RANGE( 0x000000, 0x03ffff) AM_WRITE(SMH_ROM)
505		AM_RANGE( 0x100000, 0x103fff) AM_WRITE(SMH_RAM)
506		AM_RANGE( 0x200000, 0x200001) AM_WRITE(watchdog_reset16_w)
507		AM_RANGE( 0x300000, 0x300001) AM_DEVWRITE("oki", sb3_sound_w)  // ?
508		AM_RANGE( 0x400000, 0x400001) AM_WRITE(snowbros_flipscreen_w)
509		AM_RANGE( 0x600000, 0x6003ff) AM_WRITE(paletteram16_xBBBBBGGGGGRRRRR_word_w) AM_BASE (&paletteram16)
510		AM_RANGE( 0x700000, 0x7021ff) AM_WRITE(SMH_RAM) AM_BASE( &spriteram16) AM_SIZE( &spriteram_size )
511		AM_RANGE( 0x800000, 0x800001) AM_WRITENOP    /* IRQ 4 acknowledge? */
512		AM_RANGE( 0x900000, 0x900001) AM_WRITENOP    /* IRQ 3 acknowledge? */
513		AM_RANGE( 0xa00000, 0xa00001) AM_WRITENOP    /* IRQ 2 acknowledge? */
514		ADDRESS_MAP_END
515
516	507	/* Final Tetris */
517	508
518		static ADDRESS_MAP_START( finalttr_readmem, ADDRESS_SPACE_PROGRAM, 16 )
519		AM_RANGE(0x000000, 0x0fffff) AM_READ(SMH_ROM)
520		AM_RANGE(0x100000, 0x103fff) AM_READ(SMH_RAM)
	509	static ADDRESS_MAP_START( finalttr_map, ADDRESS_SPACE_PROGRAM, 16 )
	510	AM_RANGE(0x000000, 0x0fffff) AM_ROM
	511	AM_RANGE(0x100000, 0x103fff) AM_RAM AM_BASE(&hyperpac_ram)
	512	AM_RANGE(0x300000, 0x300001) AM_WRITE(semicom_soundcmd_w)
	513	//  AM_RANGE(0x400000, 0x400001) ???
	514
521	515	AM_RANGE(0x500000, 0x500001) AM_READ_PORT("DSW1")
522	516	AM_RANGE(0x500002, 0x500003) AM_READ_PORT("DSW2")
523	517	AM_RANGE(0x500004, 0x500005) AM_READ_PORT("SYSTEM")
524	518
525		AM_RANGE(0x600000, 0x6001ff) AM_READ(SMH_RAM)
526		AM_RANGE(0x700000, 0x701fff) AM_READ(pandora_spriteram_LSB_r)
	519	AM_RANGE(0x600000, 0x6001ff) AM_RAM_WRITE(paletteram16_xBBBBBGGGGGRRRRR_word_w) AM_BASE(&paletteram16)
	520	AM_RANGE(0x700000, 0x701fff) AM_READWRITE(pandora_spriteram_LSB_r,pandora_spriteram_LSB_w)
	521	AM_RANGE(0x800000, 0x800001) AM_WRITE(snowbros_irq4_ack_w)   /* IRQ 4 acknowledge */
	522	AM_RANGE(0x900000, 0x900001) AM_WRITE(snowbros_irq3_ack_w)   /* IRQ 3 acknowledge */
	523	AM_RANGE(0xa00000, 0xa00001) AM_WRITE(snowbros_irq2_ack_w)   /* IRQ 2 acknowledge */
527	524	ADDRESS_MAP_END
528	525
529		static ADDRESS_MAP_START( finalttr_writemem, ADDRESS_SPACE_PROGRAM, 16 )
530		AM_RANGE(0x000000, 0x0fffff) AM_WRITE(SMH_ROM)
531		AM_RANGE(0x100000, 0x103fff) AM_WRITE(SMH_RAM) AM_BASE(&hyperpac_ram)
532		AM_RANGE(0x300000, 0x300001) AM_WRITE(semicom_soundcmd_w)
533		//  AM_RANGE(0x400000, 0x400001) ???
534		AM_RANGE(0x600000, 0x6001ff) AM_WRITE(paletteram16_xBBBBBGGGGGRRRRR_word_w) AM_BASE(&paletteram16)
535		AM_RANGE(0x700000, 0x701fff) AM_WRITE(pandora_spriteram_LSB_w)
536
537		AM_RANGE(0x800000, 0x800001) AM_WRITENOP   /* IRQ 4 acknowledge? */
538		AM_RANGE(0x900000, 0x900001) AM_WRITENOP   /* IRQ 3 acknowledge? */
539		AM_RANGE(0xa00000, 0xa00001) AM_WRITENOP   /* IRQ 2 acknowledge? */
540		ADDRESS_MAP_END
541
542	526	static INPUT_PORTS_START( snowbros )
543	527	PORT_START("DSW1")   /* 500001 */
544	528	PORT_DIPNAME( 0x01, 0x00, DEF_STR( Region ) )
r4679	r4680
1494	1478	/* handler called by the 3812/2151 emulator when the internal timers cause an IRQ */
1495	1479	static void irqhandler(const device_config *device, int irq)
1496	1480	{
1497		cpu_set_input_line(device->machine->cpu[1],0,irq ? ASSERT_LINE : CLEAR_LINE);
	1481	cputag_set_input_line(device->machine, "soundcpu", 0, irq ? ASSERT_LINE : CLEAR_LINE);
1498	1482	}
1499	1483
1500	1484	/* SnowBros Sound */
r4679	r4680
1534	1518
1535	1519	/* basic machine hardware */
1536	1520	MDRV_CPU_ADD("maincpu", M68000, 8000000) /* 8 Mhz - confirmed */
1537		MDRV_CPU_PROGRAM_MAP(readmem,writemem)
	1521	MDRV_CPU_PROGRAM_MAP(snowbros_map,0)
1538	1522	MDRV_CPU_VBLANK_INT_HACK(snowbros_interrupt,3)
1539	1523
1540	1524	MDRV_CPU_ADD("soundcpu", Z80, 6000000) /* 6 MHz - confirmed */
1541		MDRV_CPU_PROGRAM_MAP(sound_readmem,sound_writemem)
	1525	MDRV_CPU_PROGRAM_MAP(sound_map,0)
1542	1526	MDRV_CPU_IO_MAP(sound_io_map,0)
1543	1527
1544	1528	/* video hardware */
r4679	r4680
1569	1553	/* basic machine hardware */
1570	1554	MDRV_IMPORT_FROM(snowbros)
1571	1555	MDRV_CPU_REPLACE("maincpu", M68000, 10000000) /* 10mhz - Confirmed */
1572		MDRV_CPU_PROGRAM_MAP(wintbob_readmem,wintbob_writemem)
	1556	MDRV_CPU_PROGRAM_MAP(wintbob_map,0)
1573	1557
1574	1558	/* video hardware */
1575	1559	MDRV_GFXDECODE(wb)
r4679	r4680
1583	1567	/* basic machine hardware */
1584	1568	MDRV_IMPORT_FROM(snowbros)
1585	1569	MDRV_CPU_REPLACE("maincpu", M68000, 16000000) /* 16mhz or 12mhz ? */
1586		MDRV_CPU_PROGRAM_MAP(hyperpac_readmem,hyperpac_writemem)
	1570	MDRV_CPU_PROGRAM_MAP(hyperpac_map,0)
1587	1571
1588	1572	MDRV_CPU_REPLACE("soundcpu", Z80, 4000000) /* 4.0 MHz ??? */
1589		MDRV_CPU_PROGRAM_MAP(hyperpac_sound_readmem,hyperpac_sound_writemem)
	1573	MDRV_CPU_PROGRAM_MAP(hyperpac_sound_map,0)
1590	1574
1591	1575	MDRV_GFXDECODE(hyperpac)
1592	1576
r4679	r4680
1601	1585	MDRV_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.0)
1602	1586	MACHINE_DRIVER_END
1603	1587
	1588
	1589
	1590	static MACHINE_DRIVER_START( semicom_mcu )
	1591
	1592	/* basic machine hardware */
	1593	MDRV_IMPORT_FROM(semicom)
	1594
	1595	MDRV_CPU_ADD("protection", I8052, 16000000)  // AT89C52
	1596	MDRV_CPU_PROGRAM_MAP(protection_map,0)
	1597	MDRV_CPU_IO_MAP(protection_iomap,0)
	1598	MACHINE_DRIVER_END
	1599
	1600
1604	1601	static MACHINE_DRIVER_START( semiprot )
1605	1602	MDRV_IMPORT_FROM(semicom)
1606	1603	MDRV_MACHINE_RESET ( semiprot )
r4679	r4680
1630	1627
1631	1628	/* basic machine hardware */
1632	1629	MDRV_CPU_ADD("maincpu", M68000, 16000000)
1633		MDRV_CPU_PROGRAM_MAP(honeydol_readmem,honeydol_writemem)
	1630	MDRV_CPU_PROGRAM_MAP(honeydol_map,0)
1634	1631	MDRV_CPU_VBLANK_INT_HACK(snowbros_interrupt,3)
1635	1632
1636	1633	MDRV_CPU_ADD("soundcpu", Z80, 4000000)
1637		MDRV_CPU_PROGRAM_MAP(honeydol_sound_readmem,honeydol_sound_writemem)
	1634	MDRV_CPU_PROGRAM_MAP(honeydol_sound_map,0)
1638	1635	MDRV_CPU_IO_MAP(honeydol_sound_io_map,0)
1639	1636
1640	1637	/* video hardware */
r4679	r4680
1669	1666
1670	1667	/* basic machine hardware */
1671	1668	MDRV_CPU_ADD("maincpu", M68000, 16000000) // or 12
1672		MDRV_CPU_PROGRAM_MAP(twinadv_readmem,twinadv_writemem)
	1669	MDRV_CPU_PROGRAM_MAP(twinadv_map,0)
1673	1670	MDRV_CPU_VBLANK_INT_HACK(snowbros_interrupt,3)
1674	1671
1675	1672	MDRV_CPU_ADD("soundcpu", Z80, 4000000)
1676		MDRV_CPU_PROGRAM_MAP(twinadv_sound_readmem,twinadv_sound_writemem)
	1673	MDRV_CPU_PROGRAM_MAP(sound_map,0)
1677	1674	MDRV_CPU_IO_MAP(twinadv_sound_io_map,0)
1678	1675	MDRV_CPU_VBLANK_INT("screen", irq0_line_hold)
1679	1676
r4679	r4680
1722	1719	MDRV_IMPORT_FROM(semicom)
1723	1720
1724	1721	MDRV_CPU_REPLACE("maincpu", M68000, 12000000)
1725		MDRV_CPU_PROGRAM_MAP(finalttr_readmem,finalttr_writemem)
	1722	MDRV_CPU_PROGRAM_MAP(finalttr_map,0)
1726	1723
1727	1724	MDRV_CPU_REPLACE("soundcpu", Z80, 3578545)
1728	1725
r4679	r4680
1749	1746
1750	1747	/* basic machine hardware */
1751	1748	MDRV_CPU_ADD("maincpu", M68000, 16000000) /* 16mhz or 12mhz ? */
1752		MDRV_CPU_PROGRAM_MAP(readmem3,writemem3)
	1749	MDRV_CPU_PROGRAM_MAP(snowbros3_map,0)
1753	1750	MDRV_CPU_VBLANK_INT_HACK(snowbro3_interrupt,3)
1754	1751
1755	1752	/* video hardware */
r4679	r4680
2002	1999	ROM_REGION( 0x10000, "soundcpu", 0 ) /* Z80 Code */
2003	2000	ROM_LOAD( "hyperpac.u1", 0x00000, 0x10000 , CRC(03faf88e) SHA1(a8da883d4b765b809452bbffca37ff224edbe86d) )
2004	2001
2005		ROM_REGION( 0x10000, "cpu2", 0 ) /* Intel 87C52 MCU Code */
2006		ROM_LOAD( "87c52.mcu", 0x00000, 0x10000 , NO_DUMP ) /* can't be dumped */
	2002	ROM_REGION( 0x10000, "protection", 0 ) /* Intel 87C52 MCU Code */
	2003	ROM_LOAD( "at89c52.bin", 0x00000, 0x2000 , CRC(291f9326) SHA1(e440ce7d92188faa86e02e7f9db4ec6bce21efd3) ) /* decapped */
2007	2004
2008	2005	ROM_REGION( 0x040000, "oki", 0 ) /* Samples */
2009	2006	ROM_LOAD( "hyperpac.j15", 0x00000, 0x40000, CRC(fb9f468d) SHA1(52857b1a04c64ac853340ebb8e92d98eabea8bc1) )
r4679	r4680
2301	2298	//      hyperpac_ram[0xf000/2 + i] = PROTDATA[i];
2302	2299
2303	2300	/* explicit check in the code */
2304		memory_install_read16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x200000, 0x200001, 0, 0, moremorp_0a_read );
	2301	memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x200000, 0x200001, 0, 0, moremorp_0a_read );
2305	2302	}
2306	2303
2307	2304
r4679	r4680
2647	2644	#endif
2648	2645	}
2649	2646
2650
	2647	// protection simulation no longer used
	2648	#if 0
2651	2649	static DRIVER_INIT( hyperpac )
2652	2650	{
2653	2651	/* simulate RAM initialization done by the protection MCU */
r4679	r4680
2661	2659	hyperpac_ram[0xe084/2] = 0x7654;
2662	2660	hyperpac_ram[0xe086/2] = 0x3210;
2663	2661	}
	2662	#endif
2664	2663
2665	2664	static READ16_HANDLER ( _4in1_02_read )
2666	2665	{
r4679	r4680
2674	2673	int len = memory_region_length(machine, "maincpu");
2675	2674
2676	2675	/* strange order */
2677		buffer = malloc_or_die(len);
	2676	buffer = alloc_array_or_die(UINT8, len);
2678	2677	{
2679	2678	int i;
2680	2679	for (i = 0;i < len; i++)
r4679	r4680
2689	2688	len = memory_region_length(machine, "soundcpu");
2690	2689
2691	2690	/* strange order */
2692		buffer = malloc_or_die(len);
	2691	buffer = alloc_array_or_die(UINT8, len);
2693	2692	{
2694	2693	int i;
2695	2694	for (i = 0;i < len; i++)
r4679	r4680
2697	2696	memcpy(src,buffer,len);
2698	2697	free(buffer);
2699	2698	}
2700		memory_install_read16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x200000, 0x200001, 0, 0, _4in1_02_read );
	2699	memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x200000, 0x200001, 0, 0, _4in1_02_read );
2701	2700	}
2702	2701
2703	2702	static DRIVER_INIT(snowbro3)
r4679	r4680
2707	2706	int len = memory_region_length(machine, "maincpu");
2708	2707
2709	2708	/* strange order */
2710		buffer = malloc_or_die(len);
	2709	buffer = alloc_array_or_die(UINT8, len);
2711	2710	{
2712	2711	int i;
2713	2712	for (i = 0;i < len; i++)
r4679	r4680
2724	2723
2725	2724	static DRIVER_INIT( 3in1semi )
2726	2725	{
2727		memory_install_read16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x200000, 0x200001, 0, 0, _3in1_read );
	2726	memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x200000, 0x200001, 0, 0, _3in1_read );
2728	2727	}
2729	2728
2730	2729	static READ16_HANDLER( cookbib3_read )
r4679	r4680
2734	2733
2735	2734	static DRIVER_INIT( cookbib3 )
2736	2735	{
2737		memory_install_read16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x200000, 0x200001, 0, 0, cookbib3_read );
	2736	memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x200000, 0x200001, 0, 0, cookbib3_read );
2738	2737	}
2739	2738
2740	2739
r4679	r4680
2749	2748	GAME( 1995, honeydol, 0,        honeydol, honeydol, 0, ROT0, "Barko Corp.", "Honey Dolls", 0 ) // based on snowbros code..
2750	2749	GAME( 1995, twinadv,  0,        twinadv,  twinadv,  0, ROT0, "Barko Corp.", "Twin Adventure (World)", 0 )
2751	2750	GAME( 1995, twinadvk, twinadv,  twinadv,  twinadv,  0, ROT0, "Barko Corp.", "Twin Adventure (Korea)", 0 )
2752		GAME( 1995, hyperpac, 0,        semicom,  hyperpac, hyperpac, ROT0, "SemiCom", "Hyper Pacman", 0 )
	2751	GAME( 1995, hyperpac, 0,        semicom_mcu,  hyperpac, 0, ROT0, "SemiCom", "Hyper Pacman", 0 )
2753	2752	GAME( 1995, hyperpcb, hyperpac, semicom,  hyperpac, 0,        ROT0, "bootleg", "Hyper Pacman (bootleg)", 0 )
2754	2753	GAME( 1996, cookbib2, 0,        semiprot, cookbib2, cookbib2, ROT0, "SemiCom", "Cookie & Bibi 2", 0 )
2755	2754	GAME( 1996, toppyrap, 0,        semiprot, toppyrap, 0,        ROT0, "SemiCom", "Toppy & Rappy", 0 )
r4679	r4680
2761	2760	GAME( 2002, 4in1boot, 0,        _4in1,    4in1boot, 4in1boot, ROT0, "K1 Soft", "Puzzle King (includes bootleg of Snow Bros.)" , 0)
2762	2761	GAME( 2002, snowbro3, snowbros, snowbro3, snowbroj, snowbro3, ROT0, "Syrmex (bootleg/hack)", "Snow Brothers 3 - Magical Adventure", GAME_IMPERFECT_SOUND ) // its basically snowbros code?...
2763	2762	GAME( 1993, finalttr, 0,        finalttr, finalttr, 0,        ROT0, "Jeil Computer System", "Final Tetris", 0 )
2764
2765

src/mame/drivers/bzone.c

r4679	r4680
264	264
265	265	static CUSTOM_INPUT( clock_r )
266	266	{
267		return (cpu_get_total_cycles(field->port->machine->cpu[0]) & 0x100) ? 1 : 0;
	267	return (cputag_get_total_cycles(field->port->machine, "maincpu") & 0x100) ? 1 : 0;
268	268	}
269	269
270	270
r4679	r4680
787	787
788	788	static DRIVER_INIT( bradley )
789	789	{
790		memory_install_readwrite8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x400, 0x7ff, 0, 0, SMH_BANK1, SMH_BANK1);
791		memory_set_bankptr(machine, 1, auto_malloc(0x400));
	790	memory_install_readwrite8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x400, 0x7ff, 0, 0, (read8_space_func)SMH_BANK(1), (write8_space_func)SMH_BANK(1));
	791	memory_set_bankptr(machine, 1, auto_alloc_array(machine, UINT8, 0x400));
792	792
793		memory_install_read_port_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x1808, 0x1808, 0, 0, "1808");
794		memory_install_read_port_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x1809, 0x1809, 0, 0, "1809");
795		memory_install_read8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x180a, 0x180a, 0, 0, analog_data_r);
796		memory_install_write8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x1848, 0x1850, 0, 0, analog_select_w);
	793	memory_install_read_port_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x1808, 0x1808, 0, 0, "1808");
	794	memory_install_read_port_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x1809, 0x1809, 0, 0, "1809");
	795	memory_install_read8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x180a, 0x180a, 0, 0, analog_data_r);
	796	memory_install_write8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x1848, 0x1850, 0, 0, analog_select_w);
797	797	}
798	798
799	799

src/mame/drivers/mhavoc.c

r4679	r4680
319	319	static CUSTOM_INPUT( clock_r )
320	320	{
321	321	/* 2.4kHz (divide 2.5MHz by 1024) */
322		return (cpu_get_total_cycles(field->port->machine->cpu[0]) & 0x400) ? 0 : 1;
	322	return (cputag_get_total_cycles(field->port->machine, "alpha") & 0x400) ? 0 : 1;
323	323	}
324	324
325	325

src/mame/drivers/segaxbd.c

r4679	r4680
303	303	if (timer_irq_state)
304	304	irq |= 2;
305	305	else
306		cpu_set_input_line(machine->cpu[0], 2, CLEAR_LINE);
	306	cputag_set_input_line(machine, "maincpu", 2, CLEAR_LINE);
307	307
308	308	if (vblank_irq_state)
309	309	irq |= 4;
310	310	else
311		cpu_set_input_line(machine->cpu[0], 4, CLEAR_LINE);
	311	cputag_set_input_line(machine, "maincpu", 4, CLEAR_LINE);
312	312
313	313	if (gprider_hack && irq > 4)
314	314	irq = 4;
315	315
316	316	if (!(irq==6))
317		cpu_set_input_line(machine->cpu[0], 6, CLEAR_LINE);
	317	cputag_set_input_line(machine, "maincpu", 6, CLEAR_LINE);
318	318
319	319	if (irq)
320	320	{
321		cpu_set_input_line(machine->cpu[0], irq, ASSERT_LINE);
	321	cputag_set_input_line(machine, "maincpu", irq, ASSERT_LINE);
322	322	cpuexec_boost_interleave(machine, attotime_zero, ATTOTIME_IN_USEC(100));
323	323	}
324	324	}
r4679	r4680
338	338	if (scanline == 223)
339	339	{
340	340	vblank_irq_state = update = 1;
341		cpu_set_input_line(machine->cpu[1], 4, ASSERT_LINE);
	341	cputag_set_input_line(machine, "sub", 4, ASSERT_LINE);
342	342	next_scanline = scanline + 1;
343	343	}
344	344
r4679	r4680
347	347	{
348	348	vblank_irq_state = 0;
349	349	update = 1;
350		cpu_set_input_line(machine->cpu[1], 4, CLEAR_LINE);
	350	cputag_set_input_line(machine, "sub", 4, CLEAR_LINE);
351	351	next_scanline = scanline + 1;
352	352	}
353	353
r4679	r4680
377	377
378	378	static TIMER_CALLBACK( delayed_sound_data_w )
379	379	{
380		const address_space *space = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM);
	380	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
381	381
382	382	soundlatch_w(space, 0, param);
383		cpu_set_input_line(machine->cpu[2], INPUT_LINE_NMI, ASSERT_LINE);
	383	cputag_set_input_line(machine, "soundcpu", INPUT_LINE_NMI, ASSERT_LINE);
384	384	}
385	385
386	386
r4679	r4680
392	392
393	393	static void sound_cpu_irq(const device_config *device, int state)
394	394	{
395		cpu_set_input_line(device->machine->cpu[2], 0, state);
	395	cputag_set_input_line(device->machine, "soundcpu", 0, state);
396	396	}
397	397
398	398
399	399	static READ8_HANDLER( sound_data_r )
400	400	{
401		cpu_set_input_line(space->machine->cpu[2], INPUT_LINE_NMI, CLEAR_LINE);
	401	cputag_set_input_line(space->machine, "soundcpu", INPUT_LINE_NMI, CLEAR_LINE);
402	402	return soundlatch_r(space, offset);
403	403	}
404	404
r4679	r4680
412	412
413	413	static void xboard_reset(const device_config *device)
414	414	{
415		cpu_set_input_line(device->machine->cpu[1], INPUT_LINE_RESET, PULSE_LINE);
	415	cputag_set_input_line(device->machine, "sub", INPUT_LINE_RESET, PULSE_LINE);
416	416	cpuexec_boost_interleave(device->machine, attotime_zero, ATTOTIME_IN_USEC(100));
417	417	}
418	418
419	419
420	420	static MACHINE_RESET( xboard )
421	421	{
422		fd1094_machine_init(machine->cpu[0]);
	422	fd1094_machine_init(cputag_get_cpu(machine, "maincpu"));
423	423	segaic16_tilemap_reset(machine, 0);
424	424
425	425	/* hook the RESET line, which resets CPU #1 */
426		device_set_info_fct(machine->cpu[0], CPUINFO_FCT_M68K_RESET_CALLBACK, (genf *)xboard_reset);
	426	m68k_set_reset_callback(cputag_get_cpu(machine, "maincpu"), xboard_reset);
427	427
428	428	/* set up the compare/timer chip */
429	429	segaic16_compare_timer_init(0, sound_data_w, timer_ack_callback);
r4679	r4680
559	559	*/
560	560	if (((oldval ^ data) & 0x40) && !(data & 0x40)) watchdog_reset_w(space,0,0);
561	561	segaic16_set_display_enable(space->machine, data & 0x20);
562		cpu_set_input_line(space->machine->cpu[2], INPUT_LINE_RESET, (data & 0x01) ? CLEAR_LINE : ASSERT_LINE);
	562	cputag_set_input_line(space->machine, "soundcpu", INPUT_LINE_RESET, (data & 0x01) ? CLEAR_LINE : ASSERT_LINE);
563	563	return;
564	564
565	565	case 3:
r4679	r4680
2811	2811	xboard_generic_init(machine);
2812	2812	xboard_set_road_priority(0);
2813	2813
2814		memory_install_write16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x140006, 0x140007, 0, 0x00fff0, aburner2_iochip_0_D_w);
	2814	memory_install_write16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x140006, 0x140007, 0, 0x00fff0, aburner2_iochip_0_D_w);
2815	2815	}
2816	2816
2817	2817
r4679	r4680
2828	2828	adc_reverse[1] = adc_reverse[3] = 1;
2829	2829
2830	2830	/* install extra synchronization on core shared memory */
2831		loffire_sync = memory_install_write16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x29c000, 0x29c011, 0, 0, loffire_sync0_w);
	2831	loffire_sync = memory_install_write16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x29c000, 0x29c011, 0, 0, loffire_sync0_w);
2832	2832	}
2833	2833
2834	2834
2835	2835	static DRIVER_INIT( smgp )
2836	2836	{
2837	2837	xboard_generic_init(machine);
2838		memory_install_readwrite16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x2f0000, 0x2f3fff, 0, 0, smgp_excs_r, smgp_excs_w);
	2838	memory_install_readwrite16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x2f0000, 0x2f3fff, 0, 0, smgp_excs_r, smgp_excs_w);
2839	2839	}
2840	2840
2841	2841

src/mame/drivers/nbmj9195.c

r4679	r4680
471	471
472	472	static void ctc0_interrupt(const device_config *device, int state)
473	473	{
474		cpu_set_input_line(device->machine->cpu[0], 0, state);
	474	cputag_set_input_line(device->machine, "maincpu", 0, state);
475	475	}
476	476
477	477	static void ctc1_interrupt(const device_config *device, int state)
478	478	{
479		cpu_set_input_line(device->machine->cpu[1], 0, state);
	479	cputag_set_input_line(device->machine, "audiocpu", 0, state);
480	480	}
481	481
482	482	/* CTC of main cpu, ch0 trigger is vblank */
r4679	r4680
507	507
508	508	static MACHINE_RESET( sailorws )
509	509	{
510		const address_space *space = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM);
	510	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
511	511	int i;
512	512
513	513	// initialize TMPZ84C011 PIO
r4679	r4680
520	520
521	521	static DRIVER_INIT( nbmj9195 )
522	522	{
523		const address_space *space = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM);
	523	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
524	524	UINT8 *ROM = memory_region(machine, "audiocpu");
525	525
526	526	// sound program patch
r4679	r4680
530	530	nbmj9195_soundbank_w(space, 0, 0);
531	531	}
532	532
	533	#define TMPZ84C011_REGS \
	534	AM_RANGE(0x10, 0x13) AM_DEVREADWRITE("main_ctc", z80ctc_r,z80ctc_w) \
	535	AM_RANGE(0x50, 0x50) AM_READWRITE(tmpz84c011_0_pa_r,tmpz84c011_0_pa_w) \
	536	AM_RANGE(0x51, 0x51) AM_READWRITE(tmpz84c011_0_pb_r,tmpz84c011_0_pb_w) \
	537	AM_RANGE(0x52, 0x52) AM_READWRITE(tmpz84c011_0_pc_r,tmpz84c011_0_pc_w) \
	538	AM_RANGE(0x30, 0x30) AM_READWRITE(tmpz84c011_0_pd_r,tmpz84c011_0_pd_w) \
	539	AM_RANGE(0x40, 0x40) AM_READWRITE(tmpz84c011_0_pe_r,tmpz84c011_0_pe_w) \
	540	AM_RANGE(0x54, 0x54) AM_READWRITE(tmpz84c011_0_dir_pa_r,tmpz84c011_0_dir_pa_w) \
	541	AM_RANGE(0x55, 0x55) AM_READWRITE(tmpz84c011_0_dir_pb_r,tmpz84c011_0_dir_pb_w) \
	542	AM_RANGE(0x56, 0x56) AM_READWRITE(tmpz84c011_0_dir_pc_r,tmpz84c011_0_dir_pc_w) \
	543	AM_RANGE(0x34, 0x34) AM_READWRITE(tmpz84c011_0_dir_pd_r,tmpz84c011_0_dir_pd_w) \
	544	AM_RANGE(0x44, 0x44) AM_READWRITE(tmpz84c011_0_dir_pe_r,tmpz84c011_0_dir_pe_w) \
533	545
534		static ADDRESS_MAP_START( readmem_sailorws, ADDRESS_SPACE_PROGRAM, 8 )
535		AM_RANGE(0x0000, 0xefff) AM_READ(SMH_ROM)
536		AM_RANGE(0xf000, 0xf1ff) AM_READ(nbmj9195_palette_r)
537		AM_RANGE(0xf800, 0xffff) AM_READ(SMH_RAM)
538		ADDRESS_MAP_END
539	546
540		static ADDRESS_MAP_START( writemem_sailorws, ADDRESS_SPACE_PROGRAM, 8 )
541		AM_RANGE(0x0000, 0xefff) AM_WRITE(SMH_ROM)
542		AM_RANGE(0xf000, 0xf1ff) AM_WRITE(nbmj9195_palette_w)
543		AM_RANGE(0xf800, 0xffff) AM_WRITE(SMH_RAM) AM_BASE(&nbmj9195_nvram) AM_SIZE(&nbmj9195_nvram_size)
	547	static ADDRESS_MAP_START( sailorws_map, ADDRESS_SPACE_PROGRAM, 8 )
	548	AM_RANGE(0x0000, 0xefff) AM_ROM
	549	AM_RANGE(0xf000, 0xf1ff) AM_READWRITE(nbmj9195_palette_r,nbmj9195_palette_w)
	550	AM_RANGE(0xf800, 0xffff) AM_RAM AM_BASE(&nbmj9195_nvram) AM_SIZE(&nbmj9195_nvram_size)
544	551	ADDRESS_MAP_END
545	552
546		static ADDRESS_MAP_START( readmem_mjuraden, ADDRESS_SPACE_PROGRAM, 8 )
547		AM_RANGE(0x0000, 0xefff) AM_READ(SMH_ROM)
548		AM_RANGE(0xf200, 0xf3ff) AM_READ(nbmj9195_palette_r)
549		AM_RANGE(0xf800, 0xffff) AM_READ(SMH_RAM)
	553	static ADDRESS_MAP_START( mjuraden_map, ADDRESS_SPACE_PROGRAM, 8 )
	554	AM_RANGE(0x0000, 0xefff) AM_ROM
	555	AM_RANGE(0xf200, 0xf3ff) AM_READWRITE(nbmj9195_palette_r,nbmj9195_palette_w)
	556	AM_RANGE(0xf800, 0xffff) AM_RAM
550	557	ADDRESS_MAP_END
551	558
552		static ADDRESS_MAP_START( writemem_mjuraden, ADDRESS_SPACE_PROGRAM, 8 )
553		AM_RANGE(0x0000, 0xefff) AM_WRITE(SMH_ROM)
554		AM_RANGE(0xf200, 0xf3ff) AM_WRITE(nbmj9195_palette_w)
555		AM_RANGE(0xf800, 0xffff) AM_WRITE(SMH_RAM)
	559	static ADDRESS_MAP_START( koinomp_map, ADDRESS_SPACE_PROGRAM, 8 )
	560	AM_RANGE(0x0000, 0xdfff) AM_ROM
	561	AM_RANGE(0xe000, 0xe1ff) AM_READWRITE(nbmj9195_palette_r,nbmj9195_palette_w)
	562	AM_RANGE(0xe800, 0xefff) AM_RAM AM_BASE(&nbmj9195_nvram) AM_SIZE(&nbmj9195_nvram_size)
556	563	ADDRESS_MAP_END
557	564
558		static ADDRESS_MAP_START( readmem_koinomp, ADDRESS_SPACE_PROGRAM, 8 )
559		AM_RANGE(0x0000, 0xdfff) AM_READ(SMH_ROM)
560		AM_RANGE(0xe000, 0xe1ff) AM_READ(nbmj9195_palette_r)
561		AM_RANGE(0xe800, 0xefff) AM_READ(SMH_RAM)
	565	static ADDRESS_MAP_START( ngpgal_map, ADDRESS_SPACE_PROGRAM, 8 )
	566	AM_RANGE(0x0000, 0xcfff) AM_ROM
	567	AM_RANGE(0xd000, 0xd1ff) AM_READWRITE(nbmj9195_palette_r,nbmj9195_palette_w)
	568	AM_RANGE(0xd800, 0xdfff) AM_RAM
562	569	ADDRESS_MAP_END
563	570
564		static ADDRESS_MAP_START( writemem_koinomp, ADDRESS_SPACE_PROGRAM, 8 )
565		AM_RANGE(0x0000, 0xdfff) AM_WRITE(SMH_ROM)
566		AM_RANGE(0xe000, 0xe1ff) AM_WRITE(nbmj9195_palette_w)
567		AM_RANGE(0xe800, 0xefff) AM_WRITE(SMH_RAM) AM_BASE(&nbmj9195_nvram) AM_SIZE(&nbmj9195_nvram_size)
	571	static ADDRESS_MAP_START( mscoutm_map, ADDRESS_SPACE_PROGRAM, 8 )
	572	AM_RANGE(0x0000, 0xdfff) AM_ROM
	573	AM_RANGE(0xe000, 0xe5ff) AM_RAM
	574	AM_RANGE(0xe600, 0xebff) AM_READWRITE(nbmj9195_nb22090_palette_r,nbmj9195_nb22090_palette_w)
	575	AM_RANGE(0xec00, 0xf1ff) AM_RAM
	576	AM_RANGE(0xf200, 0xffff) AM_RAM
568	577	ADDRESS_MAP_END
569	578
570		static ADDRESS_MAP_START( readmem_ngpgal, ADDRESS_SPACE_PROGRAM, 8 )
571		AM_RANGE(0x0000, 0xcfff) AM_READ(SMH_ROM)
572		AM_RANGE(0xd000, 0xd1ff) AM_READ(nbmj9195_palette_r)
573		AM_RANGE(0xd800, 0xdfff) AM_READ(SMH_RAM)
	579	static ADDRESS_MAP_START( mjegolf_map, ADDRESS_SPACE_PROGRAM, 8 )
	580	AM_RANGE(0x0000, 0xdfff) AM_ROM
	581	AM_RANGE(0xe000, 0xe5ff) AM_READWRITE(nbmj9195_nb22090_palette_r,nbmj9195_nb22090_palette_w)
	582	AM_RANGE(0xe600, 0xebff) AM_RAM
	583	AM_RANGE(0xec00, 0xf1ff) AM_RAM
	584	AM_RANGE(0xf200, 0xffff) AM_RAM
574	585	ADDRESS_MAP_END
575	586
576		static ADDRESS_MAP_START( writemem_ngpgal, ADDRESS_SPACE_PROGRAM, 8 )
577		AM_RANGE(0x0000, 0xcfff) AM_WRITE(SMH_ROM)
578		AM_RANGE(0xd000, 0xd1ff) AM_WRITE(nbmj9195_palette_w)
579		AM_RANGE(0xd800, 0xdfff) AM_WRITE(SMH_RAM)
580		ADDRESS_MAP_END
581
582		static ADDRESS_MAP_START( readmem_mscoutm, ADDRESS_SPACE_PROGRAM, 8 )
583		AM_RANGE(0x0000, 0xdfff) AM_READ(SMH_ROM)
584		AM_RANGE(0xe000, 0xe5ff) AM_READ(SMH_RAM)
585		AM_RANGE(0xe600, 0xebff) AM_READ(nbmj9195_nb22090_palette_r)
586		AM_RANGE(0xec00, 0xf1ff) AM_READ(SMH_RAM)
587		AM_RANGE(0xf200, 0xffff) AM_READ(SMH_RAM)
588		ADDRESS_MAP_END
589
590		static ADDRESS_MAP_START( writemem_mscoutm, ADDRESS_SPACE_PROGRAM, 8 )
591		AM_RANGE(0x0000, 0xdfff) AM_WRITE(SMH_ROM)
592		AM_RANGE(0xe000, 0xe5ff) AM_WRITE(SMH_RAM)
593		AM_RANGE(0xe600, 0xebff) AM_WRITE(nbmj9195_nb22090_palette_w)
594		AM_RANGE(0xec00, 0xf1ff) AM_WRITE(SMH_RAM)
595		AM_RANGE(0xf200, 0xffff) AM_WRITE(SMH_RAM)
596		ADDRESS_MAP_END
597
598		static ADDRESS_MAP_START( readmem_mjegolf, ADDRESS_SPACE_PROGRAM, 8 )
599		AM_RANGE(0x0000, 0xdfff) AM_READ(SMH_ROM)
600		AM_RANGE(0xe000, 0xe5ff) AM_READ(nbmj9195_nb22090_palette_r)
601		AM_RANGE(0xe600, 0xebff) AM_READ(SMH_RAM)
602		AM_RANGE(0xec00, 0xf1ff) AM_READ(SMH_RAM)
603		AM_RANGE(0xf200, 0xffff) AM_READ(SMH_RAM)
604		ADDRESS_MAP_END
605
606		static ADDRESS_MAP_START( writemem_mjegolf, ADDRESS_SPACE_PROGRAM, 8 )
607		AM_RANGE(0x0000, 0xdfff) AM_WRITE(SMH_ROM)
608		AM_RANGE(0xe000, 0xe5ff) AM_WRITE(nbmj9195_nb22090_palette_w)
609		AM_RANGE(0xe600, 0xebff) AM_WRITE(SMH_RAM)
610		AM_RANGE(0xec00, 0xf1ff) AM_WRITE(SMH_RAM)
611		AM_RANGE(0xf200, 0xffff) AM_WRITE(SMH_RAM)
612		ADDRESS_MAP_END
613
614		static ADDRESS_MAP_START( sound_readmem, ADDRESS_SPACE_PROGRAM, 8 )
615		AM_RANGE(0x0000, 0x77ff) AM_READ(SMH_ROM)
616		AM_RANGE(0x7800, 0x7fff) AM_READ(SMH_RAM)
617		AM_RANGE(0x8000, 0xffff) AM_READ(SMH_BANK1)
618		ADDRESS_MAP_END
619
620		static ADDRESS_MAP_START( sound_writemem, ADDRESS_SPACE_PROGRAM, 8 )
621		AM_RANGE(0x0000, 0x77ff) AM_WRITE(SMH_ROM)
622		AM_RANGE(0x7800, 0x7fff) AM_WRITE(SMH_RAM)
623		ADDRESS_MAP_END
624
625
626		static ADDRESS_MAP_START( readport_mjuraden, ADDRESS_SPACE_IO, 8 )
	587	static ADDRESS_MAP_START( mjuraden_io_map, ADDRESS_SPACE_IO, 8 )
627	588	ADDRESS_MAP_GLOBAL_MASK(0xff)
628		AM_RANGE(0x10, 0x13) AM_DEVREAD("main_ctc", z80ctc_r)
629		AM_RANGE(0x50, 0x50) AM_READ(tmpz84c011_0_pa_r)
630		AM_RANGE(0x51, 0x51) AM_READ(tmpz84c011_0_pb_r)
631		AM_RANGE(0x52, 0x52) AM_READ(tmpz84c011_0_pc_r)
632		AM_RANGE(0x30, 0x30) AM_READ(tmpz84c011_0_pd_r)
633		AM_RANGE(0x40, 0x40) AM_READ(tmpz84c011_0_pe_r)
634		AM_RANGE(0x54, 0x54) AM_READ(tmpz84c011_0_dir_pa_r)
635		AM_RANGE(0x55, 0x55) AM_READ(tmpz84c011_0_dir_pb_r)
636		AM_RANGE(0x56, 0x56) AM_READ(tmpz84c011_0_dir_pc_r)
637		AM_RANGE(0x34, 0x34) AM_READ(tmpz84c011_0_dir_pd_r)
638		AM_RANGE(0x44, 0x44) AM_READ(tmpz84c011_0_dir_pe_r)
	589	TMPZ84C011_REGS
639	590
640	591	AM_RANGE(0x80, 0x81) AM_READ(nbmj9195_blitter_0_r)
641		ADDRESS_MAP_END
642
643		static ADDRESS_MAP_START( writeport_mjuraden, ADDRESS_SPACE_IO, 8 )
644		ADDRESS_MAP_GLOBAL_MASK(0xff)
645		AM_RANGE(0x10, 0x13) AM_DEVWRITE("main_ctc", z80ctc_w)
646		AM_RANGE(0x50, 0x50) AM_WRITE(tmpz84c011_0_pa_w)
647		AM_RANGE(0x51, 0x51) AM_WRITE(tmpz84c011_0_pb_w)
648		AM_RANGE(0x52, 0x52) AM_WRITE(tmpz84c011_0_pc_w)
649		AM_RANGE(0x30, 0x30) AM_WRITE(tmpz84c011_0_pd_w)
650		AM_RANGE(0x40, 0x40) AM_WRITE(tmpz84c011_0_pe_w)
651		AM_RANGE(0x54, 0x54) AM_WRITE(tmpz84c011_0_dir_pa_w)
652		AM_RANGE(0x55, 0x55) AM_WRITE(tmpz84c011_0_dir_pb_w)
653		AM_RANGE(0x56, 0x56) AM_WRITE(tmpz84c011_0_dir_pc_w)
654		AM_RANGE(0x34, 0x34) AM_WRITE(tmpz84c011_0_dir_pd_w)
655		AM_RANGE(0x44, 0x44) AM_WRITE(tmpz84c011_0_dir_pe_w)
656
	592	AM_RANGE(0x80, 0x8f) AM_WRITE(nbmj9195_blitter_0_w)
657	593	AM_RANGE(0x90, 0x9f) AM_WRITE(nbmj9195_clut_0_w)
658	594
659		AM_RANGE(0x80, 0x8f) AM_WRITE(nbmj9195_blitter_0_w)
660
661	595	AM_RANGE(0xb0, 0xb0) AM_WRITE(nbmj9195_sound_w)
662	596	AM_RANGE(0xb2, 0xb2) AM_WRITENOP
663	597	AM_RANGE(0xb4, 0xb4) AM_WRITENOP
r4679	r4680
665	599	ADDRESS_MAP_END
666	600
667	601
668		static ADDRESS_MAP_START( readport_koinomp, ADDRESS_SPACE_IO, 8 )
	602	static ADDRESS_MAP_START( koinomp_io_map, ADDRESS_SPACE_IO, 8 )
669	603	ADDRESS_MAP_GLOBAL_MASK(0xff)
670		AM_RANGE(0x10, 0x13) AM_DEVREAD("main_ctc", z80ctc_r)
671		AM_RANGE(0x50, 0x50) AM_READ(tmpz84c011_0_pa_r)
672		AM_RANGE(0x51, 0x51) AM_READ(tmpz84c011_0_pb_r)
673		AM_RANGE(0x52, 0x52) AM_READ(tmpz84c011_0_pc_r)
674		AM_RANGE(0x30, 0x30) AM_READ(tmpz84c011_0_pd_r)
675		AM_RANGE(0x40, 0x40) AM_READ(tmpz84c011_0_pe_r)
676		AM_RANGE(0x54, 0x54) AM_READ(tmpz84c011_0_dir_pa_r)
677		AM_RANGE(0x55, 0x55) AM_READ(tmpz84c011_0_dir_pb_r)
678		AM_RANGE(0x56, 0x56) AM_READ(tmpz84c011_0_dir_pc_r)
679		AM_RANGE(0x34, 0x34) AM_READ(tmpz84c011_0_dir_pd_r)
680		AM_RANGE(0x44, 0x44) AM_READ(tmpz84c011_0_dir_pe_r)
	604	TMPZ84C011_REGS
681	605
682	606	AM_RANGE(0x80, 0x81) AM_READ(nbmj9195_blitter_0_r)
683		AM_RANGE(0xa0, 0xa1) AM_READ(nbmj9195_blitter_1_r)
684		ADDRESS_MAP_END
685
686		static ADDRESS_MAP_START( writeport_koinomp, ADDRESS_SPACE_IO, 8 )
687		ADDRESS_MAP_GLOBAL_MASK(0xff)
688		AM_RANGE(0x10, 0x13) AM_DEVWRITE("main_ctc", z80ctc_w)
689		AM_RANGE(0x50, 0x50) AM_WRITE(tmpz84c011_0_pa_w)
690		AM_RANGE(0x51, 0x51) AM_WRITE(tmpz84c011_0_pb_w)
691		AM_RANGE(0x52, 0x52) AM_WRITE(tmpz84c011_0_pc_w)
692		AM_RANGE(0x30, 0x30) AM_WRITE(tmpz84c011_0_pd_w)
693		AM_RANGE(0x40, 0x40) AM_WRITE(tmpz84c011_0_pe_w)
694		AM_RANGE(0x54, 0x54) AM_WRITE(tmpz84c011_0_dir_pa_w)
695		AM_RANGE(0x55, 0x55) AM_WRITE(tmpz84c011_0_dir_pb_w)
696		AM_RANGE(0x56, 0x56) AM_WRITE(tmpz84c011_0_dir_pc_w)
697		AM_RANGE(0x34, 0x34) AM_WRITE(tmpz84c011_0_dir_pd_w)
698		AM_RANGE(0x44, 0x44) AM_WRITE(tmpz84c011_0_dir_pe_w)
699
	607	AM_RANGE(0x80, 0x8f) AM_WRITE(nbmj9195_blitter_0_w)
700	608	AM_RANGE(0x90, 0x9f) AM_WRITE(nbmj9195_clut_0_w)
701		AM_RANGE(0xb0, 0xbf) AM_WRITE(nbmj9195_clut_1_w)
702	609
703		AM_RANGE(0x80, 0x8f) AM_WRITE(nbmj9195_blitter_0_w)
	610	AM_RANGE(0xa0, 0xa1) AM_READ(nbmj9195_blitter_1_r)
704	611	AM_RANGE(0xa0, 0xaf) AM_WRITE(nbmj9195_blitter_1_w)
	612	AM_RANGE(0xb0, 0xbf) AM_WRITE(nbmj9195_clut_1_w)
705	613
706	614	AM_RANGE(0xc0, 0xc0) AM_WRITE(nbmj9195_sound_w)
707	615	AM_RANGE(0xc2, 0xc2) AM_WRITENOP
r4679	r4680
711	619	ADDRESS_MAP_END
712	620
713	621
714		static ADDRESS_MAP_START( readport_patimono, ADDRESS_SPACE_IO, 8 )
	622	static ADDRESS_MAP_START( patimono_io_map, ADDRESS_SPACE_IO, 8 )
715	623	ADDRESS_MAP_GLOBAL_MASK(0xff)
716		AM_RANGE(0x10, 0x13) AM_DEVREAD("main_ctc", z80ctc_r)
717		AM_RANGE(0x50, 0x50) AM_READ(tmpz84c011_0_pa_r)
718		AM_RANGE(0x51, 0x51) AM_READ(tmpz84c011_0_pb_r)
719		AM_RANGE(0x52, 0x52) AM_READ(tmpz84c011_0_pc_r)
720		AM_RANGE(0x30, 0x30) AM_READ(tmpz84c011_0_pd_r)
721		AM_RANGE(0x40, 0x40) AM_READ(tmpz84c011_0_pe_r)
722		AM_RANGE(0x54, 0x54) AM_READ(tmpz84c011_0_dir_pa_r)
723		AM_RANGE(0x55, 0x55) AM_READ(tmpz84c011_0_dir_pb_r)
724		AM_RANGE(0x56, 0x56) AM_READ(tmpz84c011_0_dir_pc_r)
725		AM_RANGE(0x34, 0x34) AM_READ(tmpz84c011_0_dir_pd_r)
726		AM_RANGE(0x44, 0x44) AM_READ(tmpz84c011_0_dir_pe_r)
	624	TMPZ84C011_REGS
727	625
728		AM_RANGE(0xc0, 0xc1) AM_READ(nbmj9195_blitter_0_r)
729	626	AM_RANGE(0x80, 0x81) AM_READ(nbmj9195_blitter_1_r)
730		ADDRESS_MAP_END
731
732		static ADDRESS_MAP_START( writeport_patimono, ADDRESS_SPACE_IO, 8 )
733		ADDRESS_MAP_GLOBAL_MASK(0xff)
734		AM_RANGE(0x10, 0x13) AM_DEVWRITE("main_ctc", z80ctc_w)
735		AM_RANGE(0x50, 0x50) AM_WRITE(tmpz84c011_0_pa_w)
736		AM_RANGE(0x51, 0x51) AM_WRITE(tmpz84c011_0_pb_w)
737		AM_RANGE(0x52, 0x52) AM_WRITE(tmpz84c011_0_pc_w)
738		AM_RANGE(0x30, 0x30) AM_WRITE(tmpz84c011_0_pd_w)
739		AM_RANGE(0x40, 0x40) AM_WRITE(tmpz84c011_0_pe_w)
740		AM_RANGE(0x54, 0x54) AM_WRITE(tmpz84c011_0_dir_pa_w)
741		AM_RANGE(0x55, 0x55) AM_WRITE(tmpz84c011_0_dir_pb_w)
742		AM_RANGE(0x56, 0x56) AM_WRITE(tmpz84c011_0_dir_pc_w)
743		AM_RANGE(0x34, 0x34) AM_WRITE(tmpz84c011_0_dir_pd_w)
744		AM_RANGE(0x44, 0x44) AM_WRITE(tmpz84c011_0_dir_pe_w)
745
746		AM_RANGE(0x90, 0x9f) AM_WRITE(nbmj9195_clut_0_w)
747		AM_RANGE(0xd0, 0xdf) AM_WRITE(nbmj9195_clut_1_w)
748
749		AM_RANGE(0xc0, 0xcf) AM_WRITE(nbmj9195_blitter_0_w)
750	627	AM_RANGE(0x80, 0x8f) AM_WRITE(nbmj9195_blitter_1_w)
751	628
	629	AM_RANGE(0x90, 0x9f) AM_WRITE(nbmj9195_clut_0_w)
752	630	AM_RANGE(0xa0, 0xa0) AM_WRITE(nbmj9195_sound_w)
753	631	AM_RANGE(0xa4, 0xa4) AM_WRITENOP
754	632	AM_RANGE(0xa8, 0xa8) AM_WRITENOP
755	633	AM_RANGE(0xb0, 0xb8) AM_WRITE(nbmj9195_inputportsel_w)
756		ADDRESS_MAP_END
757	634
758
759		static ADDRESS_MAP_START( readport_mmehyou, ADDRESS_SPACE_IO, 8 )
760		ADDRESS_MAP_GLOBAL_MASK(0xff)
761		AM_RANGE(0x10, 0x13) AM_DEVREAD("main_ctc", z80ctc_r)
762		AM_RANGE(0x50, 0x50) AM_READ(tmpz84c011_0_pa_r)
763		AM_RANGE(0x51, 0x51) AM_READ(tmpz84c011_0_pb_r)
764		AM_RANGE(0x52, 0x52) AM_READ(tmpz84c011_0_pc_r)
765		AM_RANGE(0x30, 0x30) AM_READ(tmpz84c011_0_pd_r)
766		AM_RANGE(0x40, 0x40) AM_READ(tmpz84c011_0_pe_r)
767		AM_RANGE(0x54, 0x54) AM_READ(tmpz84c011_0_dir_pa_r)
768		AM_RANGE(0x55, 0x55) AM_READ(tmpz84c011_0_dir_pb_r)
769		AM_RANGE(0x56, 0x56) AM_READ(tmpz84c011_0_dir_pc_r)
770		AM_RANGE(0x34, 0x34) AM_READ(tmpz84c011_0_dir_pd_r)
771		AM_RANGE(0x44, 0x44) AM_READ(tmpz84c011_0_dir_pe_r)
772
773		AM_RANGE(0x80, 0x81) AM_READ(nbmj9195_blitter_0_r)
	635	AM_RANGE(0xc0, 0xc1) AM_READ(nbmj9195_blitter_0_r)
	636	AM_RANGE(0xc0, 0xcf) AM_WRITE(nbmj9195_blitter_0_w)
	637	AM_RANGE(0xd0, 0xdf) AM_WRITE(nbmj9195_clut_1_w)
774	638	ADDRESS_MAP_END
775	639
776		static ADDRESS_MAP_START( writeport_mmehyou, ADDRESS_SPACE_IO, 8 )
	640	static ADDRESS_MAP_START( mmehyou_io_map, ADDRESS_SPACE_IO, 8 )
777	641	ADDRESS_MAP_GLOBAL_MASK(0xff)
778		AM_RANGE(0x10, 0x13) AM_DEVWRITE("main_ctc", z80ctc_w)
779		AM_RANGE(0x50, 0x50) AM_WRITE(tmpz84c011_0_pa_w)
780		AM_RANGE(0x51, 0x51) AM_WRITE(tmpz84c011_0_pb_w)
781		AM_RANGE(0x52, 0x52) AM_WRITE(tmpz84c011_0_pc_w)
782		AM_RANGE(0x30, 0x30) AM_WRITE(tmpz84c011_0_pd_w)
783		AM_RANGE(0x40, 0x40) AM_WRITE(tmpz84c011_0_pe_w)
784		AM_RANGE(0x54, 0x54) AM_WRITE(tmpz84c011_0_dir_pa_w)
785		AM_RANGE(0x55, 0x55) AM_WRITE(tmpz84c011_0_dir_pb_w)
786		AM_RANGE(0x56, 0x56) AM_WRITE(tmpz84c011_0_dir_pc_w)
787		AM_RANGE(0x34, 0x34) AM_WRITE(tmpz84c011_0_dir_pd_w)
788		AM_RANGE(0x44, 0x44) AM_WRITE(tmpz84c011_0_dir_pe_w)
	642	TMPZ84C011_REGS
789	643
	644	AM_RANGE(0x80, 0x81) AM_READ(nbmj9195_blitter_0_r)
	645	AM_RANGE(0x80, 0x8f) AM_WRITE(nbmj9195_blitter_0_w)
790	646	AM_RANGE(0x90, 0x9f) AM_WRITE(nbmj9195_clut_0_w)
791	647
792		AM_RANGE(0x80, 0x8f) AM_WRITE(nbmj9195_blitter_0_w)
793
794	648	AM_RANGE(0xa0, 0xa0) AM_WRITE(nbmj9195_sound_w)
795	649	AM_RANGE(0xa4, 0xa4) AM_WRITENOP
796	650	AM_RANGE(0xa8, 0xa8) AM_WRITENOP
797	651	AM_RANGE(0xb0, 0xb0) AM_WRITE(nbmj9195_inputportsel_w)
798	652	ADDRESS_MAP_END
799	653
800
801		static ADDRESS_MAP_START( readport_gal10ren, ADDRESS_SPACE_IO, 8 )
	654	static ADDRESS_MAP_START( gal10ren_io_map, ADDRESS_SPACE_IO, 8 )
802	655	ADDRESS_MAP_GLOBAL_MASK(0xff)
803		AM_RANGE(0x10, 0x13) AM_DEVREAD("main_ctc", z80ctc_r)
804		AM_RANGE(0x50, 0x50) AM_READ(tmpz84c011_0_pa_r)
805		AM_RANGE(0x51, 0x51) AM_READ(tmpz84c011_0_pb_r)
806		AM_RANGE(0x52, 0x52) AM_READ(tmpz84c011_0_pc_r)
807		AM_RANGE(0x30, 0x30) AM_READ(tmpz84c011_0_pd_r)
808		AM_RANGE(0x40, 0x40) AM_READ(tmpz84c011_0_pe_r)
809		AM_RANGE(0x54, 0x54) AM_READ(tmpz84c011_0_dir_pa_r)
810		AM_RANGE(0x55, 0x55) AM_READ(tmpz84c011_0_dir_pb_r)
811		AM_RANGE(0x56, 0x56) AM_READ(tmpz84c011_0_dir_pc_r)
812		AM_RANGE(0x34, 0x34) AM_READ(tmpz84c011_0_dir_pd_r)
813		AM_RANGE(0x44, 0x44) AM_READ(tmpz84c011_0_dir_pe_r)
	656	TMPZ84C011_REGS
814	657
815	658	AM_RANGE(0x60, 0x61) AM_READ(nbmj9195_blitter_0_r)
816		AM_RANGE(0xa0, 0xa1) AM_READ(nbmj9195_blitter_1_r)
817		ADDRESS_MAP_END
818
819		static ADDRESS_MAP_START( writeport_gal10ren, ADDRESS_SPACE_IO, 8 )
820		ADDRESS_MAP_GLOBAL_MASK(0xff)
821		AM_RANGE(0x10, 0x13) AM_DEVWRITE("main_ctc", z80ctc_w)
822		AM_RANGE(0x50, 0x50) AM_WRITE(tmpz84c011_0_pa_w)
823		AM_RANGE(0x51, 0x51) AM_WRITE(tmpz84c011_0_pb_w)
824		AM_RANGE(0x52, 0x52) AM_WRITE(tmpz84c011_0_pc_w)
825		AM_RANGE(0x30, 0x30) AM_WRITE(tmpz84c011_0_pd_w)
826		AM_RANGE(0x40, 0x40) AM_WRITE(tmpz84c011_0_pe_w)
827		AM_RANGE(0x54, 0x54) AM_WRITE(tmpz84c011_0_dir_pa_w)
828		AM_RANGE(0x55, 0x55) AM_WRITE(tmpz84c011_0_dir_pb_w)
829		AM_RANGE(0x56, 0x56) AM_WRITE(tmpz84c011_0_dir_pc_w)
830		AM_RANGE(0x34, 0x34) AM_WRITE(tmpz84c011_0_dir_pd_w)
831		AM_RANGE(0x44, 0x44) AM_WRITE(tmpz84c011_0_dir_pe_w)
832
	659	AM_RANGE(0x60, 0x6f) AM_WRITE(nbmj9195_blitter_0_w)
833	660	AM_RANGE(0x70, 0x7f) AM_WRITE(nbmj9195_clut_0_w)
834		AM_RANGE(0xb0, 0xbf) AM_WRITE(nbmj9195_clut_1_w)
835	661
836		AM_RANGE(0x60, 0x6f) AM_WRITE(nbmj9195_blitter_0_w)
	662	AM_RANGE(0xa0, 0xa1) AM_READ(nbmj9195_blitter_1_r)
837	663	AM_RANGE(0xa0, 0xaf) AM_WRITE(nbmj9195_blitter_1_w)
	664	AM_RANGE(0xb0, 0xbf) AM_WRITE(nbmj9195_clut_1_w)
838	665
839	666	AM_RANGE(0xc0, 0xc0) AM_WRITE(nbmj9195_sound_w)
840	667	AM_RANGE(0xc8, 0xc8) AM_WRITENOP
r4679	r4680
842	669	AM_RANGE(0xd8, 0xd8) AM_WRITE(nbmj9195_inputportsel_w)
843	670	ADDRESS_MAP_END
844	671
845
846		static ADDRESS_MAP_START( readport_renaiclb, ADDRESS_SPACE_IO, 8 )
	672	static ADDRESS_MAP_START( renaiclb_io_map, ADDRESS_SPACE_IO, 8 )
847	673	ADDRESS_MAP_GLOBAL_MASK(0xff)
848		AM_RANGE(0x10, 0x13) AM_DEVREAD("main_ctc", z80ctc_r)
849		AM_RANGE(0x50, 0x50) AM_READ(tmpz84c011_0_pa_r)
850		AM_RANGE(0x51, 0x51) AM_READ(tmpz84c011_0_pb_r)
851		AM_RANGE(0x52, 0x52) AM_READ(tmpz84c011_0_pc_r)
852		AM_RANGE(0x30, 0x30) AM_READ(tmpz84c011_0_pd_r)
853		AM_RANGE(0x40, 0x40) AM_READ(tmpz84c011_0_pe_r)
854		AM_RANGE(0x54, 0x54) AM_READ(tmpz84c011_0_dir_pa_r)
855		AM_RANGE(0x55, 0x55) AM_READ(tmpz84c011_0_dir_pb_r)
856		AM_RANGE(0x56, 0x56) AM_READ(tmpz84c011_0_dir_pc_r)
857		AM_RANGE(0x34, 0x34) AM_READ(tmpz84c011_0_dir_pd_r)
858		AM_RANGE(0x44, 0x44) AM_READ(tmpz84c011_0_dir_pe_r)
	674	TMPZ84C011_REGS
859	675
860		AM_RANGE(0x60, 0x61) AM_READ(nbmj9195_blitter_0_r)
861		AM_RANGE(0xe0, 0xe1) AM_READ(nbmj9195_blitter_1_r)
862		ADDRESS_MAP_END
863
864		static ADDRESS_MAP_START( writeport_renaiclb, ADDRESS_SPACE_IO, 8 )
865		ADDRESS_MAP_GLOBAL_MASK(0xff)
866		AM_RANGE(0x10, 0x13) AM_DEVWRITE("main_ctc", z80ctc_w)
867		AM_RANGE(0x50, 0x50) AM_WRITE(tmpz84c011_0_pa_w)
868		AM_RANGE(0x51, 0x51) AM_WRITE(tmpz84c011_0_pb_w)
869		AM_RANGE(0x52, 0x52) AM_WRITE(tmpz84c011_0_pc_w)
870		AM_RANGE(0x30, 0x30) AM_WRITE(tmpz84c011_0_pd_w)
871		AM_RANGE(0x40, 0x40) AM_WRITE(tmpz84c011_0_pe_w)
872		AM_RANGE(0x54, 0x54) AM_WRITE(tmpz84c011_0_dir_pa_w)
873		AM_RANGE(0x55, 0x55) AM_WRITE(tmpz84c011_0_dir_pb_w)
874		AM_RANGE(0x56, 0x56) AM_WRITE(tmpz84c011_0_dir_pc_w)
875		AM_RANGE(0x34, 0x34) AM_WRITE(tmpz84c011_0_dir_pd_w)
876		AM_RANGE(0x44, 0x44) AM_WRITE(tmpz84c011_0_dir_pe_w)
877
878		AM_RANGE(0x70, 0x7f) AM_WRITE(nbmj9195_clut_1_w)
879		AM_RANGE(0xf0, 0xff) AM_WRITE(nbmj9195_clut_0_w)
880
881		AM_RANGE(0x60, 0x6f) AM_WRITE(nbmj9195_blitter_1_w)
882		AM_RANGE(0xe0, 0xef) AM_WRITE(nbmj9195_blitter_0_w)
883
884	676	AM_RANGE(0x20, 0x20) AM_WRITE(nbmj9195_sound_w)
885	677	AM_RANGE(0x24, 0x24) AM_WRITENOP
886	678	AM_RANGE(0x28, 0x28) AM_WRITENOP
887	679	AM_RANGE(0x2c, 0x2c) AM_WRITE(nbmj9195_inputportsel_w)
888		ADDRESS_MAP_END
889	680
	681	AM_RANGE(0x60, 0x61) AM_READ(nbmj9195_blitter_0_r)
	682	AM_RANGE(0x60, 0x6f) AM_WRITE(nbmj9195_blitter_1_w)
	683	AM_RANGE(0x70, 0x7f) AM_WRITE(nbmj9195_clut_1_w)
890	684
891		static ADDRESS_MAP_START( readport_mjlaman, ADDRESS_SPACE_IO, 8 )
892		ADDRESS_MAP_GLOBAL_MASK(0xff)
893		AM_RANGE(0x10, 0x13) AM_DEVREAD("main_ctc", z80ctc_r)
894		AM_RANGE(0x50, 0x50) AM_READ(tmpz84c011_0_pa_r)
895		AM_RANGE(0x51, 0x51) AM_READ(tmpz84c011_0_pb_r)
896		AM_RANGE(0x52, 0x52) AM_READ(tmpz84c011_0_pc_r)
897		AM_RANGE(0x30, 0x30) AM_READ(tmpz84c011_0_pd_r)
898		AM_RANGE(0x40, 0x40) AM_READ(tmpz84c011_0_pe_r)
899		AM_RANGE(0x54, 0x54) AM_READ(tmpz84c011_0_dir_pa_r)
900		AM_RANGE(0x55, 0x55) AM_READ(tmpz84c011_0_dir_pb_r)
901		AM_RANGE(0x56, 0x56) AM_READ(tmpz84c011_0_dir_pc_r)
902		AM_RANGE(0x34, 0x34) AM_READ(tmpz84c011_0_dir_pd_r)
903		AM_RANGE(0x44, 0x44) AM_READ(tmpz84c011_0_dir_pe_r)
904
905		AM_RANGE(0x80, 0x81) AM_READ(nbmj9195_blitter_0_r)
906	685	AM_RANGE(0xe0, 0xe1) AM_READ(nbmj9195_blitter_1_r)
	686	AM_RANGE(0xe0, 0xef) AM_WRITE(nbmj9195_blitter_0_w)
	687	AM_RANGE(0xf0, 0xff) AM_WRITE(nbmj9195_clut_0_w)
907	688	ADDRESS_MAP_END
908	689
909		static ADDRESS_MAP_START( writeport_mjlaman, ADDRESS_SPACE_IO, 8 )
	690	static ADDRESS_MAP_START( mjlaman_io_map, ADDRESS_SPACE_IO, 8 )
910	691	ADDRESS_MAP_GLOBAL_MASK(0xff)
911		AM_RANGE(0x10, 0x13) AM_DEVWRITE("main_ctc", z80ctc_w)
912		AM_RANGE(0x50, 0x50) AM_WRITE(tmpz84c011_0_pa_w)
913		AM_RANGE(0x51, 0x51) AM_WRITE(tmpz84c011_0_pb_w)
914		AM_RANGE(0x52, 0x52) AM_WRITE(tmpz84c011_0_pc_w)
915		AM_RANGE(0x30, 0x30) AM_WRITE(tmpz84c011_0_pd_w)
916		AM_RANGE(0x40, 0x40) AM_WRITE(tmpz84c011_0_pe_w)
917		AM_RANGE(0x54, 0x54) AM_WRITE(tmpz84c011_0_dir_pa_w)
918		AM_RANGE(0x55, 0x55) AM_WRITE(tmpz84c011_0_dir_pb_w)
919		AM_RANGE(0x56, 0x56) AM_WRITE(tmpz84c011_0_dir_pc_w)
920		AM_RANGE(0x34, 0x34) AM_WRITE(tmpz84c011_0_dir_pd_w)
921		AM_RANGE(0x44, 0x44) AM_WRITE(tmpz84c011_0_dir_pe_w)
	692	TMPZ84C011_REGS
922	693
923		AM_RANGE(0x90, 0x9f) AM_WRITE(nbmj9195_clut_0_w)
924		AM_RANGE(0xf0, 0xff) AM_WRITE(nbmj9195_clut_1_w)
925
926		AM_RANGE(0x80, 0x8f) AM_WRITE(nbmj9195_blitter_0_w)
927		AM_RANGE(0xe0, 0xef) AM_WRITE(nbmj9195_blitter_1_w)
928
929	694	AM_RANGE(0x20, 0x20) AM_WRITE(nbmj9195_sound_w)
930	695	AM_RANGE(0x22, 0x22) AM_WRITENOP
931	696	AM_RANGE(0x24, 0x24) AM_WRITENOP
932	697	AM_RANGE(0x26, 0x26) AM_WRITE(nbmj9195_inputportsel_w)
933		ADDRESS_MAP_END
934	698
935
936		static ADDRESS_MAP_START( readport_mkeibaou, ADDRESS_SPACE_IO, 8 )
937		ADDRESS_MAP_GLOBAL_MASK(0xff)
938		AM_RANGE(0x10, 0x13) AM_DEVREAD("main_ctc", z80ctc_r)
939		AM_RANGE(0x50, 0x50) AM_READ(tmpz84c011_0_pa_r)
940		AM_RANGE(0x51, 0x51) AM_READ(tmpz84c011_0_pb_r)
941		AM_RANGE(0x52, 0x52) AM_READ(tmpz84c011_0_pc_r)
942		AM_RANGE(0x30, 0x30) AM_READ(tmpz84c011_0_pd_r)
943		AM_RANGE(0x40, 0x40) AM_READ(tmpz84c011_0_pe_r)
944		AM_RANGE(0x54, 0x54) AM_READ(tmpz84c011_0_dir_pa_r)
945		AM_RANGE(0x55, 0x55) AM_READ(tmpz84c011_0_dir_pb_r)
946		AM_RANGE(0x56, 0x56) AM_READ(tmpz84c011_0_dir_pc_r)
947		AM_RANGE(0x34, 0x34) AM_READ(tmpz84c011_0_dir_pd_r)
948		AM_RANGE(0x44, 0x44) AM_READ(tmpz84c011_0_dir_pe_r)
949
950	699	AM_RANGE(0x80, 0x81) AM_READ(nbmj9195_blitter_0_r)
951		AM_RANGE(0xa0, 0xa1) AM_READ(nbmj9195_blitter_1_r)
	700	AM_RANGE(0x80, 0x8f) AM_WRITE(nbmj9195_blitter_0_w)
	701	AM_RANGE(0x90, 0x9f) AM_WRITE(nbmj9195_clut_0_w)
	702
	703	AM_RANGE(0xe0, 0xe1) AM_READ(nbmj9195_blitter_1_r)
	704	AM_RANGE(0xe0, 0xef) AM_WRITE(nbmj9195_blitter_1_w)
	705	AM_RANGE(0xf0, 0xff) AM_WRITE(nbmj9195_clut_1_w)
952	706	ADDRESS_MAP_END
953	707
954		static ADDRESS_MAP_START( writeport_mkeibaou, ADDRESS_SPACE_IO, 8 )
	708
	709	static ADDRESS_MAP_START( mkeibaou_io_map, ADDRESS_SPACE_IO, 8 )
955	710	ADDRESS_MAP_GLOBAL_MASK(0xff)
956		AM_RANGE(0x10, 0x13) AM_DEVWRITE("main_ctc", z80ctc_w)
957		AM_RANGE(0x50, 0x50) AM_WRITE(tmpz84c011_0_pa_w)
958		AM_RANGE(0x51, 0x51) AM_WRITE(tmpz84c011_0_pb_w)
959		AM_RANGE(0x52, 0x52) AM_WRITE(tmpz84c011_0_pc_w)
960		AM_RANGE(0x30, 0x30) AM_WRITE(tmpz84c011_0_pd_w)
961		AM_RANGE(0x40, 0x40) AM_WRITE(tmpz84c011_0_pe_w)
962		AM_RANGE(0x54, 0x54) AM_WRITE(tmpz84c011_0_dir_pa_w)
963		AM_RANGE(0x55, 0x55) AM_WRITE(tmpz84c011_0_dir_pb_w)
964		AM_RANGE(0x56, 0x56) AM_WRITE(tmpz84c011_0_dir_pc_w)
965		AM_RANGE(0x34, 0x34) AM_WRITE(tmpz84c011_0_dir_pd_w)
966		AM_RANGE(0x44, 0x44) AM_WRITE(tmpz84c011_0_dir_pe_w)
	711	TMPZ84C011_REGS
967	712
	713	AM_RANGE(0x80, 0x81) AM_READ(nbmj9195_blitter_0_r)
	714	AM_RANGE(0x80, 0x8f) AM_WRITE(nbmj9195_blitter_0_w)
968	715	AM_RANGE(0x90, 0x9f) AM_WRITE(nbmj9195_clut_0_w)
969		AM_RANGE(0xb0, 0xbf) AM_WRITE(nbmj9195_clut_1_w)
970	716
971		AM_RANGE(0x80, 0x8f) AM_WRITE(nbmj9195_blitter_0_w)
	717	AM_RANGE(0xa0, 0xa1) AM_READ(nbmj9195_blitter_1_r)
972	718	AM_RANGE(0xa0, 0xaf) AM_WRITE(nbmj9195_blitter_1_w)
	719	AM_RANGE(0xb0, 0xbf) AM_WRITE(nbmj9195_clut_1_w)
973	720
974	721	AM_RANGE(0xd8, 0xd8) AM_WRITE(nbmj9195_sound_w)
975	722	AM_RANGE(0xda, 0xda) AM_WRITENOP
r4679	r4680
978	725	ADDRESS_MAP_END
979	726
980	727
981		static ADDRESS_MAP_START( readport_pachiten, ADDRESS_SPACE_IO, 8 )
	728	static ADDRESS_MAP_START( pachiten_io_map, ADDRESS_SPACE_IO, 8 )
982	729	ADDRESS_MAP_GLOBAL_MASK(0xff)
983		AM_RANGE(0x10, 0x13) AM_DEVREAD("main_ctc", z80ctc_r)
984		AM_RANGE(0x50, 0x50) AM_READ(tmpz84c011_0_pa_r)
985		AM_RANGE(0x51, 0x51) AM_READ(tmpz84c011_0_pb_r)
986		AM_RANGE(0x52, 0x52) AM_READ(tmpz84c011_0_pc_r)
987		AM_RANGE(0x30, 0x30) AM_READ(tmpz84c011_0_pd_r)
988		AM_RANGE(0x40, 0x40) AM_READ(tmpz84c011_0_pe_r)
989		AM_RANGE(0x54, 0x54) AM_READ(tmpz84c011_0_dir_pa_r)
990		AM_RANGE(0x55, 0x55) AM_READ(tmpz84c011_0_dir_pb_r)
991		AM_RANGE(0x56, 0x56) AM_READ(tmpz84c011_0_dir_pc_r)
992		AM_RANGE(0x34, 0x34) AM_READ(tmpz84c011_0_dir_pd_r)
993		AM_RANGE(0x44, 0x44) AM_READ(tmpz84c011_0_dir_pe_r)
	730	TMPZ84C011_REGS
994	731
995	732	AM_RANGE(0x60, 0x61) AM_READ(nbmj9195_blitter_0_r)
996		AM_RANGE(0xa0, 0xa1) AM_READ(nbmj9195_blitter_1_r)
997		ADDRESS_MAP_END
998
999		static ADDRESS_MAP_START( writeport_pachiten, ADDRESS_SPACE_IO, 8 )
1000		ADDRESS_MAP_GLOBAL_MASK(0xff)
1001		AM_RANGE(0x10, 0x13) AM_DEVWRITE("main_ctc", z80ctc_w)
1002		AM_RANGE(0x50, 0x50) AM_WRITE(tmpz84c011_0_pa_w)
1003		AM_RANGE(0x51, 0x51) AM_WRITE(tmpz84c011_0_pb_w)
1004		AM_RANGE(0x52, 0x52) AM_WRITE(tmpz84c011_0_pc_w)
1005		AM_RANGE(0x30, 0x30) AM_WRITE(tmpz84c011_0_pd_w)
1006		AM_RANGE(0x40, 0x40) AM_WRITE(tmpz84c011_0_pe_w)
1007		AM_RANGE(0x54, 0x54) AM_WRITE(tmpz84c011_0_dir_pa_w)
1008		AM_RANGE(0x55, 0x55) AM_WRITE(tmpz84c011_0_dir_pb_w)
1009		AM_RANGE(0x56, 0x56) AM_WRITE(tmpz84c011_0_dir_pc_w)
1010		AM_RANGE(0x34, 0x34) AM_WRITE(tmpz84c011_0_dir_pd_w)
1011		AM_RANGE(0x44, 0x44) AM_WRITE(tmpz84c011_0_dir_pe_w)
1012
	733	AM_RANGE(0x60, 0x6f) AM_WRITE(nbmj9195_blitter_0_w)
1013	734	AM_RANGE(0x70, 0x7f) AM_WRITE(nbmj9195_clut_0_w)
1014		AM_RANGE(0xb0, 0xbf) AM_WRITE(nbmj9195_clut_1_w)
1015	735
1016		AM_RANGE(0x60, 0x6f) AM_WRITE(nbmj9195_blitter_0_w)
	736	AM_RANGE(0xa0, 0xa1) AM_READ(nbmj9195_blitter_1_r)
1017	737	AM_RANGE(0xa0, 0xaf) AM_WRITE(nbmj9195_blitter_1_w)
	738	AM_RANGE(0xb0, 0xbf) AM_WRITE(nbmj9195_clut_1_w)
1018	739
1019	740	AM_RANGE(0xe0, 0xe0) AM_WRITE(nbmj9195_sound_w)
1020	741	AM_RANGE(0xe2, 0xe2) AM_WRITENOP
r4679	r4680
1022	743	AM_RANGE(0xe6, 0xe6) AM_WRITE(nbmj9195_inputportsel_w)
1023	744	ADDRESS_MAP_END
1024	745
1025
1026		static ADDRESS_MAP_START( readport_sailorws, ADDRESS_SPACE_IO, 8 )
	746	static ADDRESS_MAP_START( sailorws_io_map, ADDRESS_SPACE_IO, 8 )
1027	747	ADDRESS_MAP_GLOBAL_MASK(0xff)
1028		AM_RANGE(0x10, 0x13) AM_DEVREAD("main_ctc", z80ctc_r)
1029		AM_RANGE(0x50, 0x50) AM_READ(tmpz84c011_0_pa_r)
1030		AM_RANGE(0x51, 0x51) AM_READ(tmpz84c011_0_pb_r)
1031		AM_RANGE(0x52, 0x52) AM_READ(tmpz84c011_0_pc_r)
1032		AM_RANGE(0x30, 0x30) AM_READ(tmpz84c011_0_pd_r)
1033		AM_RANGE(0x40, 0x40) AM_READ(tmpz84c011_0_pe_r)
1034		AM_RANGE(0x54, 0x54) AM_READ(tmpz84c011_0_dir_pa_r)
1035		AM_RANGE(0x55, 0x55) AM_READ(tmpz84c011_0_dir_pb_r)
1036		AM_RANGE(0x56, 0x56) AM_READ(tmpz84c011_0_dir_pc_r)
1037		AM_RANGE(0x34, 0x34) AM_READ(tmpz84c011_0_dir_pd_r)
1038		AM_RANGE(0x44, 0x44) AM_READ(tmpz84c011_0_dir_pe_r)
	748	TMPZ84C011_REGS
1039	749
1040	750	AM_RANGE(0x60, 0x61) AM_READ(nbmj9195_blitter_0_r)
1041		AM_RANGE(0x80, 0x81) AM_READ(nbmj9195_blitter_1_r)
1042		ADDRESS_MAP_END
1043
1044		static ADDRESS_MAP_START( writeport_sailorws, ADDRESS_SPACE_IO, 8 )
1045		ADDRESS_MAP_GLOBAL_MASK(0xff)
1046		AM_RANGE(0x10, 0x13) AM_DEVWRITE("main_ctc", z80ctc_w)
1047		AM_RANGE(0x50, 0x50) AM_WRITE(tmpz84c011_0_pa_w)
1048		AM_RANGE(0x51, 0x51) AM_WRITE(tmpz84c011_0_pb_w)
1049		AM_RANGE(0x52, 0x52) AM_WRITE(tmpz84c011_0_pc_w)
1050		AM_RANGE(0x30, 0x30) AM_WRITE(tmpz84c011_0_pd_w)
1051		AM_RANGE(0x40, 0x40) AM_WRITE(tmpz84c011_0_pe_w)
1052		AM_RANGE(0x54, 0x54) AM_WRITE(tmpz84c011_0_dir_pa_w)
1053		AM_RANGE(0x55, 0x55) AM_WRITE(tmpz84c011_0_dir_pb_w)
1054		AM_RANGE(0x56, 0x56) AM_WRITE(tmpz84c011_0_dir_pc_w)
1055		AM_RANGE(0x34, 0x34) AM_WRITE(tmpz84c011_0_dir_pd_w)
1056		AM_RANGE(0x44, 0x44) AM_WRITE(tmpz84c011_0_dir_pe_w)
1057
	751	AM_RANGE(0x60, 0x6f) AM_WRITE(nbmj9195_blitter_0_w)
1058	752	AM_RANGE(0x70, 0x7f) AM_WRITE(nbmj9195_clut_0_w)
1059		AM_RANGE(0x90, 0x9f) AM_WRITE(nbmj9195_clut_1_w)
1060	753
1061		AM_RANGE(0x60, 0x6f) AM_WRITE(nbmj9195_blitter_0_w)
	754	AM_RANGE(0x80, 0x81) AM_READ(nbmj9195_blitter_1_r)
1062	755	AM_RANGE(0x80, 0x8f) AM_WRITE(nbmj9195_blitter_1_w)
	756	AM_RANGE(0x90, 0x9f) AM_WRITE(nbmj9195_clut_1_w)
1063	757
1064	758	AM_RANGE(0xf0, 0xf0) AM_WRITE(nbmj9195_sound_w)
1065	759	AM_RANGE(0xf2, 0xf2) AM_WRITENOP
r4679	r4680
1067	761	AM_RANGE(0xf6, 0xf6) AM_WRITE(nbmj9195_inputportsel_w)
1068	762	ADDRESS_MAP_END
1069	763
1070
1071		static ADDRESS_MAP_START( readport_sailorwr, ADDRESS_SPACE_IO, 8 )
	764	static ADDRESS_MAP_START( sailorwr_io_map, ADDRESS_SPACE_IO, 8 )
1072	765	ADDRESS_MAP_GLOBAL_MASK(0xff)
1073		AM_RANGE(0x10, 0x13) AM_DEVREAD("main_ctc", z80ctc_r)
1074		AM_RANGE(0x50, 0x50) AM_READ(tmpz84c011_0_pa_r)
1075		AM_RANGE(0x51, 0x51) AM_READ(tmpz84c011_0_pb_r)
1076		AM_RANGE(0x52, 0x52) AM_READ(tmpz84c011_0_pc_r)
1077		AM_RANGE(0x30, 0x30) AM_READ(tmpz84c011_0_pd_r)
1078		AM_RANGE(0x40, 0x40) AM_READ(tmpz84c011_0_pe_r)
1079		AM_RANGE(0x54, 0x54) AM_READ(tmpz84c011_0_dir_pa_r)
1080		AM_RANGE(0x55, 0x55) AM_READ(tmpz84c011_0_dir_pb_r)
1081		AM_RANGE(0x56, 0x56) AM_READ(tmpz84c011_0_dir_pc_r)
1082		AM_RANGE(0x34, 0x34) AM_READ(tmpz84c011_0_dir_pd_r)
1083		AM_RANGE(0x44, 0x44) AM_READ(tmpz84c011_0_dir_pe_r)
	766	TMPZ84C011_REGS
1084	767
1085	768	AM_RANGE(0x60, 0x61) AM_READ(nbmj9195_blitter_0_r)
1086		AM_RANGE(0x80, 0x81) AM_READ(nbmj9195_blitter_1_r)
1087		ADDRESS_MAP_END
1088
1089		static ADDRESS_MAP_START( writeport_sailorwr, ADDRESS_SPACE_IO, 8 )
1090		ADDRESS_MAP_GLOBAL_MASK(0xff)
1091		AM_RANGE(0x10, 0x13) AM_DEVWRITE("main_ctc", z80ctc_w)
1092		AM_RANGE(0x50, 0x50) AM_WRITE(tmpz84c011_0_pa_w)
1093		AM_RANGE(0x51, 0x51) AM_WRITE(tmpz84c011_0_pb_w)
1094		AM_RANGE(0x52, 0x52) AM_WRITE(tmpz84c011_0_pc_w)
1095		AM_RANGE(0x30, 0x30) AM_WRITE(tmpz84c011_0_pd_w)
1096		AM_RANGE(0x40, 0x40) AM_WRITE(tmpz84c011_0_pe_w)
1097		AM_RANGE(0x54, 0x54) AM_WRITE(tmpz84c011_0_dir_pa_w)
1098		AM_RANGE(0x55, 0x55) AM_WRITE(tmpz84c011_0_dir_pb_w)
1099		AM_RANGE(0x56, 0x56) AM_WRITE(tmpz84c011_0_dir_pc_w)
1100		AM_RANGE(0x34, 0x34) AM_WRITE(tmpz84c011_0_dir_pd_w)
1101		AM_RANGE(0x44, 0x44) AM_WRITE(tmpz84c011_0_dir_pe_w)
1102
	769	AM_RANGE(0x60, 0x6f) AM_WRITE(nbmj9195_blitter_0_w)
1103	770	AM_RANGE(0x70, 0x7f) AM_WRITE(nbmj9195_clut_0_w)
1104		AM_RANGE(0x90, 0x9f) AM_WRITE(nbmj9195_clut_1_w)
1105	771
1106		AM_RANGE(0x60, 0x6f) AM_WRITE(nbmj9195_blitter_0_w)
	772	AM_RANGE(0x80, 0x81) AM_READ(nbmj9195_blitter_1_r)
1107	773	AM_RANGE(0x80, 0x8f) AM_WRITE(nbmj9195_blitter_1_w)
	774	AM_RANGE(0x90, 0x9f) AM_WRITE(nbmj9195_clut_1_w)
1108	775
1109	776	AM_RANGE(0xf8, 0xf8) AM_WRITE(nbmj9195_sound_w)
1110	777	AM_RANGE(0xfa, 0xfa) AM_WRITENOP
r4679	r4680
1113	780	ADDRESS_MAP_END
1114	781
1115	782
1116		static ADDRESS_MAP_START( readport_psailor1, ADDRESS_SPACE_IO, 8 )
	783	static ADDRESS_MAP_START( psailor1_io_map, ADDRESS_SPACE_IO, 8 )
1117	784	ADDRESS_MAP_GLOBAL_MASK(0xff)
1118		AM_RANGE(0x10, 0x13) AM_DEVREAD("main_ctc", z80ctc_r)
1119		AM_RANGE(0x50, 0x50) AM_READ(tmpz84c011_0_pa_r)
1120		AM_RANGE(0x51, 0x51) AM_READ(tmpz84c011_0_pb_r)
1121		AM_RANGE(0x52, 0x52) AM_READ(tmpz84c011_0_pc_r)
1122		AM_RANGE(0x30, 0x30) AM_READ(tmpz84c011_0_pd_r)
1123		AM_RANGE(0x40, 0x40) AM_READ(tmpz84c011_0_pe_r)
1124		AM_RANGE(0x54, 0x54) AM_READ(tmpz84c011_0_dir_pa_r)
1125		AM_RANGE(0x55, 0x55) AM_READ(tmpz84c011_0_dir_pb_r)
1126		AM_RANGE(0x56, 0x56) AM_READ(tmpz84c011_0_dir_pc_r)
1127		AM_RANGE(0x34, 0x34) AM_READ(tmpz84c011_0_dir_pd_r)
1128		AM_RANGE(0x44, 0x44) AM_READ(tmpz84c011_0_dir_pe_r)
	785	TMPZ84C011_REGS
1129	786
1130	787	AM_RANGE(0x60, 0x61) AM_READ(nbmj9195_blitter_0_r)
1131		AM_RANGE(0xc0, 0xc1) AM_READ(nbmj9195_blitter_1_r)
1132		ADDRESS_MAP_END
1133
1134		static ADDRESS_MAP_START( writeport_psailor1, ADDRESS_SPACE_IO, 8 )
1135		ADDRESS_MAP_GLOBAL_MASK(0xff)
1136		AM_RANGE(0x10, 0x13) AM_DEVWRITE("main_ctc", z80ctc_w)
1137		AM_RANGE(0x50, 0x50) AM_WRITE(tmpz84c011_0_pa_w)
1138		AM_RANGE(0x51, 0x51) AM_WRITE(tmpz84c011_0_pb_w)
1139		AM_RANGE(0x52, 0x52) AM_WRITE(tmpz84c011_0_pc_w)
1140		AM_RANGE(0x30, 0x30) AM_WRITE(tmpz84c011_0_pd_w)
1141		AM_RANGE(0x40, 0x40) AM_WRITE(tmpz84c011_0_pe_w)
1142		AM_RANGE(0x54, 0x54) AM_WRITE(tmpz84c011_0_dir_pa_w)
1143		AM_RANGE(0x55, 0x55) AM_WRITE(tmpz84c011_0_dir_pb_w)
1144		AM_RANGE(0x56, 0x56) AM_WRITE(tmpz84c011_0_dir_pc_w)
1145		AM_RANGE(0x34, 0x34) AM_WRITE(tmpz84c011_0_dir_pd_w)
1146		AM_RANGE(0x44, 0x44) AM_WRITE(tmpz84c011_0_dir_pe_w)
1147
	788	AM_RANGE(0x60, 0x6f) AM_WRITE(nbmj9195_blitter_0_w)
1148	789	AM_RANGE(0x70, 0x7f) AM_WRITE(nbmj9195_clut_0_w)
1149		AM_RANGE(0xd0, 0xdf) AM_WRITE(nbmj9195_clut_1_w)
1150	790
1151		AM_RANGE(0x60, 0x6f) AM_WRITE(nbmj9195_blitter_0_w)
	791	AM_RANGE(0xc0, 0xc1) AM_READ(nbmj9195_blitter_1_r)
1152	792	AM_RANGE(0xc0, 0xcf) AM_WRITE(nbmj9195_blitter_1_w)
	793	AM_RANGE(0xd0, 0xdf) AM_WRITE(nbmj9195_clut_1_w)
1153	794
1154	795	AM_RANGE(0xf0, 0xf0) AM_WRITE(nbmj9195_sound_w)
1155	796	AM_RANGE(0xf2, 0xf2) AM_WRITENOP
r4679	r4680
1157	798	AM_RANGE(0xf6, 0xf6) AM_WRITE(nbmj9195_inputportsel_w)
1158	799	ADDRESS_MAP_END
1159	800
1160
1161		static ADDRESS_MAP_START( readport_psailor2, ADDRESS_SPACE_IO, 8 )
	801	static ADDRESS_MAP_START( psailor2_io_map, ADDRESS_SPACE_IO, 8 )
1162	802	ADDRESS_MAP_GLOBAL_MASK(0xff)
1163		AM_RANGE(0x10, 0x13) AM_DEVREAD("main_ctc", z80ctc_r)
1164		AM_RANGE(0x50, 0x50) AM_READ(tmpz84c011_0_pa_r)
1165		AM_RANGE(0x51, 0x51) AM_READ(tmpz84c011_0_pb_r)
1166		AM_RANGE(0x52, 0x52) AM_READ(tmpz84c011_0_pc_r)
1167		AM_RANGE(0x30, 0x30) AM_READ(tmpz84c011_0_pd_r)
1168		AM_RANGE(0x40, 0x40) AM_READ(tmpz84c011_0_pe_r)
1169		AM_RANGE(0x54, 0x54) AM_READ(tmpz84c011_0_dir_pa_r)
1170		AM_RANGE(0x55, 0x55) AM_READ(tmpz84c011_0_dir_pb_r)
1171		AM_RANGE(0x56, 0x56) AM_READ(tmpz84c011_0_dir_pc_r)
1172		AM_RANGE(0x34, 0x34) AM_READ(tmpz84c011_0_dir_pd_r)
1173		AM_RANGE(0x44, 0x44) AM_READ(tmpz84c011_0_dir_pe_r)
	803	TMPZ84C011_REGS
1174	804
1175	805	AM_RANGE(0x60, 0x61) AM_READ(nbmj9195_blitter_0_r)
1176		AM_RANGE(0xa0, 0xa1) AM_READ(nbmj9195_blitter_1_r)
1177		ADDRESS_MAP_END
1178
1179		static ADDRESS_MAP_START( writeport_psailor2, ADDRESS_SPACE_IO, 8 )
1180		ADDRESS_MAP_GLOBAL_MASK(0xff)
1181		AM_RANGE(0x10, 0x13) AM_DEVWRITE("main_ctc", z80ctc_w)
1182		AM_RANGE(0x50, 0x50) AM_WRITE(tmpz84c011_0_pa_w)
1183		AM_RANGE(0x51, 0x51) AM_WRITE(tmpz84c011_0_pb_w)
1184		AM_RANGE(0x52, 0x52) AM_WRITE(tmpz84c011_0_pc_w)
1185		AM_RANGE(0x30, 0x30) AM_WRITE(tmpz84c011_0_pd_w)
1186		AM_RANGE(0x40, 0x40) AM_WRITE(tmpz84c011_0_pe_w)
1187		AM_RANGE(0x54, 0x54) AM_WRITE(tmpz84c011_0_dir_pa_w)
1188		AM_RANGE(0x55, 0x55) AM_WRITE(tmpz84c011_0_dir_pb_w)
1189		AM_RANGE(0x56, 0x56) AM_WRITE(tmpz84c011_0_dir_pc_w)
1190		AM_RANGE(0x34, 0x34) AM_WRITE(tmpz84c011_0_dir_pd_w)
1191		AM_RANGE(0x44, 0x44) AM_WRITE(tmpz84c011_0_dir_pe_w)
1192
	806	AM_RANGE(0x60, 0x6f) AM_WRITE(nbmj9195_blitter_0_w)
1193	807	AM_RANGE(0x70, 0x7f) AM_WRITE(nbmj9195_clut_0_w)
1194		AM_RANGE(0xb0, 0xbf) AM_WRITE(nbmj9195_clut_1_w)
1195	808
1196		AM_RANGE(0x60, 0x6f) AM_WRITE(nbmj9195_blitter_0_w)
	809	AM_RANGE(0xa0, 0xa1) AM_READ(nbmj9195_blitter_1_r)
1197	810	AM_RANGE(0xa0, 0xaf) AM_WRITE(nbmj9195_blitter_1_w)
	811	AM_RANGE(0xb0, 0xbf) AM_WRITE(nbmj9195_clut_1_w)
1198	812
1199	813	AM_RANGE(0xe0, 0xe0) AM_WRITE(nbmj9195_sound_w)
1200	814	AM_RANGE(0xe2, 0xe2) AM_WRITENOP
r4679	r4680
1202	816	AM_RANGE(0xf6, 0xf6) AM_WRITE(nbmj9195_inputportsel_w)
1203	817	ADDRESS_MAP_END
1204	818
1205
1206		static ADDRESS_MAP_START( readport_otatidai, ADDRESS_SPACE_IO, 8 )
	819	static ADDRESS_MAP_START( otatidai_io_map, ADDRESS_SPACE_IO, 8 )
1207	820	ADDRESS_MAP_GLOBAL_MASK(0xff)
1208		AM_RANGE(0x10, 0x13) AM_DEVREAD("main_ctc", z80ctc_r)
1209		AM_RANGE(0x50, 0x50) AM_READ(tmpz84c011_0_pa_r)
1210		AM_RANGE(0x51, 0x51) AM_READ(tmpz84c011_0_pb_r)
1211		AM_RANGE(0x52, 0x52) AM_READ(tmpz84c011_0_pc_r)
1212		AM_RANGE(0x30, 0x30) AM_READ(tmpz84c011_0_pd_r)
1213		AM_RANGE(0x40, 0x40) AM_READ(tmpz84c011_0_pe_r)
1214		AM_RANGE(0x54, 0x54) AM_READ(tmpz84c011_0_dir_pa_r)
1215		AM_RANGE(0x55, 0x55) AM_READ(tmpz84c011_0_dir_pb_r)
1216		AM_RANGE(0x56, 0x56) AM_READ(tmpz84c011_0_dir_pc_r)
1217		AM_RANGE(0x34, 0x34) AM_READ(tmpz84c011_0_dir_pd_r)
1218		AM_RANGE(0x44, 0x44) AM_READ(tmpz84c011_0_dir_pe_r)
	821	TMPZ84C011_REGS
1219	822
1220	823	AM_RANGE(0x60, 0x61) AM_READ(nbmj9195_blitter_0_r)
1221		AM_RANGE(0x80, 0x81) AM_READ(nbmj9195_blitter_1_r)
1222		ADDRESS_MAP_END
1223
1224		static ADDRESS_MAP_START( writeport_otatidai, ADDRESS_SPACE_IO, 8 )
1225		ADDRESS_MAP_GLOBAL_MASK(0xff)
1226		AM_RANGE(0x10, 0x13) AM_DEVWRITE("main_ctc", z80ctc_w)
1227		AM_RANGE(0x50, 0x50) AM_WRITE(tmpz84c011_0_pa_w)
1228		AM_RANGE(0x51, 0x51) AM_WRITE(tmpz84c011_0_pb_w)
1229		AM_RANGE(0x52, 0x52) AM_WRITE(tmpz84c011_0_pc_w)
1230		AM_RANGE(0x30, 0x30) AM_WRITE(tmpz84c011_0_pd_w)
1231		AM_RANGE(0x40, 0x40) AM_WRITE(tmpz84c011_0_pe_w)
1232		AM_RANGE(0x54, 0x54) AM_WRITE(tmpz84c011_0_dir_pa_w)
1233		AM_RANGE(0x55, 0x55) AM_WRITE(tmpz84c011_0_dir_pb_w)
1234		AM_RANGE(0x56, 0x56) AM_WRITE(tmpz84c011_0_dir_pc_w)
1235		AM_RANGE(0x34, 0x34) AM_WRITE(tmpz84c011_0_dir_pd_w)
1236		AM_RANGE(0x44, 0x44) AM_WRITE(tmpz84c011_0_dir_pe_w)
1237
	824	AM_RANGE(0x60, 0x6f) AM_WRITE(nbmj9195_blitter_0_w)
1238	825	AM_RANGE(0x70, 0x7f) AM_WRITE(nbmj9195_clut_0_w)
1239		AM_RANGE(0x90, 0x9f) AM_WRITE(nbmj9195_clut_1_w)
1240	826
1241		AM_RANGE(0x60, 0x6f) AM_WRITE(nbmj9195_blitter_0_w)
	827	AM_RANGE(0x80, 0x81) AM_READ(nbmj9195_blitter_1_r)
1242	828	AM_RANGE(0x80, 0x8f) AM_WRITE(nbmj9195_blitter_1_w)
	829	AM_RANGE(0x90, 0x9f) AM_WRITE(nbmj9195_clut_1_w)
1243	830
1244	831	AM_RANGE(0xa0, 0xa0) AM_WRITE(nbmj9195_sound_w)
1245	832	AM_RANGE(0xa8, 0xa8) AM_WRITENOP
r4679	r4680
1247	834	AM_RANGE(0xb8, 0xb8) AM_WRITE(nbmj9195_inputportsel_w)
1248	835	ADDRESS_MAP_END
1249	836
1250
1251		static ADDRESS_MAP_START( readport_yosimoto, ADDRESS_SPACE_IO, 8 )
	837	static ADDRESS_MAP_START( yosimoto_io_map, ADDRESS_SPACE_IO, 8 )
1252	838	ADDRESS_MAP_GLOBAL_MASK(0xff)
1253		AM_RANGE(0x10, 0x13) AM_DEVREAD("main_ctc", z80ctc_r)
1254		AM_RANGE(0x50, 0x50) AM_READ(tmpz84c011_0_pa_r)
1255		AM_RANGE(0x51, 0x51) AM_READ(tmpz84c011_0_pb_r)
1256		AM_RANGE(0x52, 0x52) AM_READ(tmpz84c011_0_pc_r)
1257		AM_RANGE(0x30, 0x30) AM_READ(tmpz84c011_0_pd_r)
1258		AM_RANGE(0x40, 0x40) AM_READ(tmpz84c011_0_pe_r)
1259		AM_RANGE(0x54, 0x54) AM_READ(tmpz84c011_0_dir_pa_r)
1260		AM_RANGE(0x55, 0x55) AM_READ(tmpz84c011_0_dir_pb_r)
1261		AM_RANGE(0x56, 0x56) AM_READ(tmpz84c011_0_dir_pc_r)
1262		AM_RANGE(0x34, 0x34) AM_READ(tmpz84c011_0_dir_pd_r)
1263		AM_RANGE(0x44, 0x44) AM_READ(tmpz84c011_0_dir_pe_r)
	839	TMPZ84C011_REGS
1264	840
1265	841	AM_RANGE(0x60, 0x61) AM_READ(nbmj9195_blitter_0_r)
1266		AM_RANGE(0xc0, 0xc1) AM_READ(nbmj9195_blitter_1_r)
1267		ADDRESS_MAP_END
1268
1269		static ADDRESS_MAP_START( writeport_yosimoto, ADDRESS_SPACE_IO, 8 )
1270		ADDRESS_MAP_GLOBAL_MASK(0xff)
1271		AM_RANGE(0x10, 0x13) AM_DEVWRITE("main_ctc", z80ctc_w)
1272		AM_RANGE(0x50, 0x50) AM_WRITE(tmpz84c011_0_pa_w)
1273		AM_RANGE(0x51, 0x51) AM_WRITE(tmpz84c011_0_pb_w)
1274		AM_RANGE(0x52, 0x52) AM_WRITE(tmpz84c011_0_pc_w)
1275		AM_RANGE(0x30, 0x30) AM_WRITE(tmpz84c011_0_pd_w)
1276		AM_RANGE(0x40, 0x40) AM_WRITE(tmpz84c011_0_pe_w)
1277		AM_RANGE(0x54, 0x54) AM_WRITE(tmpz84c011_0_dir_pa_w)
1278		AM_RANGE(0x55, 0x55) AM_WRITE(tmpz84c011_0_dir_pb_w)
1279		AM_RANGE(0x56, 0x56) AM_WRITE(tmpz84c011_0_dir_pc_w)
1280		AM_RANGE(0x34, 0x34) AM_WRITE(tmpz84c011_0_dir_pd_w)
1281		AM_RANGE(0x44, 0x44) AM_WRITE(tmpz84c011_0_dir_pe_w)
1282
	842	AM_RANGE(0x60, 0x6f) AM_WRITE(nbmj9195_blitter_0_w)
1283	843	AM_RANGE(0x70, 0x7f) AM_WRITE(nbmj9195_clut_0_w)
1284		AM_RANGE(0xd0, 0xdf) AM_WRITE(nbmj9195_clut_1_w)
1285	844
1286		AM_RANGE(0x60, 0x6f) AM_WRITE(nbmj9195_blitter_0_w)
1287		AM_RANGE(0xc0, 0xcf) AM_WRITE(nbmj9195_blitter_1_w)
1288
1289	845	AM_RANGE(0x90, 0x90) AM_WRITE(nbmj9195_sound_w)
1290	846	AM_RANGE(0x94, 0x94) AM_WRITENOP
1291	847	AM_RANGE(0x98, 0x98) AM_WRITENOP
1292	848	AM_RANGE(0x9c, 0x9c) AM_WRITE(nbmj9195_inputportsel_w)
1293		ADDRESS_MAP_END
1294	849
1295
1296		static ADDRESS_MAP_START( readport_jituroku, ADDRESS_SPACE_IO, 8 )
1297		ADDRESS_MAP_GLOBAL_MASK(0xff)
1298		AM_RANGE(0x10, 0x13) AM_DEVREAD("main_ctc", z80ctc_r)
1299		AM_RANGE(0x50, 0x50) AM_READ(tmpz84c011_0_pa_r)
1300		AM_RANGE(0x51, 0x51) AM_READ(tmpz84c011_0_pb_r)
1301		AM_RANGE(0x52, 0x52) AM_READ(tmpz84c011_0_pc_r)
1302		AM_RANGE(0x30, 0x30) AM_READ(tmpz84c011_0_pd_r)
1303		AM_RANGE(0x40, 0x40) AM_READ(tmpz84c011_0_pe_r)
1304		AM_RANGE(0x54, 0x54) AM_READ(tmpz84c011_0_dir_pa_r)
1305		AM_RANGE(0x55, 0x55) AM_READ(tmpz84c011_0_dir_pb_r)
1306		AM_RANGE(0x56, 0x56) AM_READ(tmpz84c011_0_dir_pc_r)
1307		AM_RANGE(0x34, 0x34) AM_READ(tmpz84c011_0_dir_pd_r)
1308		AM_RANGE(0x44, 0x44) AM_READ(tmpz84c011_0_dir_pe_r)
1309
1310		AM_RANGE(0x60, 0x61) AM_READ(nbmj9195_blitter_0_r)
1311	850	AM_RANGE(0xc0, 0xc1) AM_READ(nbmj9195_blitter_1_r)
	851	AM_RANGE(0xc0, 0xcf) AM_WRITE(nbmj9195_blitter_1_w)
	852	AM_RANGE(0xd0, 0xdf) AM_WRITE(nbmj9195_clut_1_w)
1312	853	ADDRESS_MAP_END
1313	854
1314		static ADDRESS_MAP_START( writeport_jituroku, ADDRESS_SPACE_IO, 8 )
	855	static ADDRESS_MAP_START( jituroku_io_map, ADDRESS_SPACE_IO, 8 )
1315	856	ADDRESS_MAP_GLOBAL_MASK(0xff)
1316		AM_RANGE(0x10, 0x13) AM_DEVWRITE("main_ctc", z80ctc_w)
1317		AM_RANGE(0x50, 0x50) AM_WRITE(tmpz84c011_0_pa_w)
1318		AM_RANGE(0x51, 0x51) AM_WRITE(tmpz84c011_0_pb_w)
1319		AM_RANGE(0x52, 0x52) AM_WRITE(tmpz84c011_0_pc_w)
1320		AM_RANGE(0x30, 0x30) AM_WRITE(tmpz84c011_0_pd_w)
1321		AM_RANGE(0x40, 0x40) AM_WRITE(tmpz84c011_0_pe_w)
1322		AM_RANGE(0x54, 0x54) AM_WRITE(tmpz84c011_0_dir_pa_w)
1323		AM_RANGE(0x55, 0x55) AM_WRITE(tmpz84c011_0_dir_pb_w)
1324		AM_RANGE(0x56, 0x56) AM_WRITE(tmpz84c011_0_dir_pc_w)
1325		AM_RANGE(0x34, 0x34) AM_WRITE(tmpz84c011_0_dir_pd_w)
1326		AM_RANGE(0x44, 0x44) AM_WRITE(tmpz84c011_0_dir_pe_w)
	857	TMPZ84C011_REGS
1327	858
	859	AM_RANGE(0x60, 0x61) AM_READ(nbmj9195_blitter_0_r)
	860	AM_RANGE(0x60, 0x6f) AM_WRITE(nbmj9195_blitter_0_w)
1328	861	AM_RANGE(0x70, 0x7f) AM_WRITE(nbmj9195_clut_0_w)
1329		AM_RANGE(0xd0, 0xdf) AM_WRITE(nbmj9195_clut_1_w)
1330	862
1331		AM_RANGE(0x60, 0x6f) AM_WRITE(nbmj9195_blitter_0_w)
	863	AM_RANGE(0xc0, 0xc1) AM_READ(nbmj9195_blitter_1_r)
1332	864	AM_RANGE(0xc0, 0xcf) AM_WRITE(nbmj9195_blitter_1_w)
	865	AM_RANGE(0xd0, 0xdf) AM_WRITE(nbmj9195_clut_1_w)
1333	866
1334	867	AM_RANGE(0xe0, 0xe0) AM_WRITE(nbmj9195_sound_w)
1335	868	AM_RANGE(0xe8, 0xe8) AM_WRITENOP
r4679	r4680
1337	870	AM_RANGE(0xf8, 0xf8) AM_WRITE(nbmj9195_inputportsel_w)
1338	871	ADDRESS_MAP_END
1339	872
1340
1341		static ADDRESS_MAP_START( readport_ngpgal, ADDRESS_SPACE_IO, 8 )
	873	static ADDRESS_MAP_START( ngpgal_io_map, ADDRESS_SPACE_IO, 8 )
1342	874	ADDRESS_MAP_GLOBAL_MASK(0xff)
1343		AM_RANGE(0x10, 0x13) AM_DEVREAD("main_ctc", z80ctc_r)
1344		AM_RANGE(0x50, 0x50) AM_READ(tmpz84c011_0_pa_r)
1345		AM_RANGE(0x51, 0x51) AM_READ(tmpz84c011_0_pb_r)
1346		AM_RANGE(0x52, 0x52) AM_READ(tmpz84c011_0_pc_r)
1347		AM_RANGE(0x30, 0x30) AM_READ(tmpz84c011_0_pd_r)
1348		AM_RANGE(0x40, 0x40) AM_READ(tmpz84c011_0_pe_r)
1349		AM_RANGE(0x54, 0x54) AM_READ(tmpz84c011_0_dir_pa_r)
1350		AM_RANGE(0x55, 0x55) AM_READ(tmpz84c011_0_dir_pb_r)
1351		AM_RANGE(0x56, 0x56) AM_READ(tmpz84c011_0_dir_pc_r)
1352		AM_RANGE(0x34, 0x34) AM_READ(tmpz84c011_0_dir_pd_r)
1353		AM_RANGE(0x44, 0x44) AM_READ(tmpz84c011_0_dir_pe_r)
	875	TMPZ84C011_REGS
1354	876
1355		AM_RANGE(0xc0, 0xc1) AM_READ(nbmj9195_blitter_0_r)
1356		ADDRESS_MAP_END
1357
1358		static ADDRESS_MAP_START( writeport_ngpgal, ADDRESS_SPACE_IO, 8 )
1359		ADDRESS_MAP_GLOBAL_MASK(0xff)
1360		AM_RANGE(0x10, 0x13) AM_DEVWRITE("main_ctc", z80ctc_w)
1361		AM_RANGE(0x50, 0x50) AM_WRITE(tmpz84c011_0_pa_w)
1362		AM_RANGE(0x51, 0x51) AM_WRITE(tmpz84c011_0_pb_w)
1363		AM_RANGE(0x52, 0x52) AM_WRITE(tmpz84c011_0_pc_w)
1364		AM_RANGE(0x30, 0x30) AM_WRITE(tmpz84c011_0_pd_w)
1365		AM_RANGE(0x40, 0x40) AM_WRITE(tmpz84c011_0_pe_w)
1366		AM_RANGE(0x54, 0x54) AM_WRITE(tmpz84c011_0_dir_pa_w)
1367		AM_RANGE(0x55, 0x55) AM_WRITE(tmpz84c011_0_dir_pb_w)
1368		AM_RANGE(0x56, 0x56) AM_WRITE(tmpz84c011_0_dir_pc_w)
1369		AM_RANGE(0x34, 0x34) AM_WRITE(tmpz84c011_0_dir_pd_w)
1370		AM_RANGE(0x44, 0x44) AM_WRITE(tmpz84c011_0_dir_pe_w)
1371
1372		AM_RANGE(0xd0, 0xdf) AM_WRITE(nbmj9195_clut_0_w)
1373
1374		AM_RANGE(0xc0, 0xcf) AM_WRITE(nbmj9195_blitter_0_w)
1375
1376	877	AM_RANGE(0xa0, 0xa0) AM_WRITE(nbmj9195_sound_w)
1377	878	AM_RANGE(0xa4, 0xa4) AM_WRITENOP
1378	879	AM_RANGE(0xa8, 0xa8) AM_WRITENOP
1379	880	AM_RANGE(0xb0, 0xb0) AM_WRITE(nbmj9195_inputportsel_w)
1380		ADDRESS_MAP_END
1381	881
1382
1383		static ADDRESS_MAP_START( readport_mjgottsu, ADDRESS_SPACE_IO, 8 )
1384		ADDRESS_MAP_GLOBAL_MASK(0xff)
1385		AM_RANGE(0x10, 0x13) AM_DEVREAD("main_ctc", z80ctc_r)
1386		AM_RANGE(0x50, 0x50) AM_READ(tmpz84c011_0_pa_r)
1387		AM_RANGE(0x51, 0x51) AM_READ(tmpz84c011_0_pb_r)
1388		AM_RANGE(0x52, 0x52) AM_READ(tmpz84c011_0_pc_r)
1389		AM_RANGE(0x30, 0x30) AM_READ(tmpz84c011_0_pd_r)
1390		AM_RANGE(0x40, 0x40) AM_READ(tmpz84c011_0_pe_r)
1391		AM_RANGE(0x54, 0x54) AM_READ(tmpz84c011_0_dir_pa_r)
1392		AM_RANGE(0x55, 0x55) AM_READ(tmpz84c011_0_dir_pb_r)
1393		AM_RANGE(0x56, 0x56) AM_READ(tmpz84c011_0_dir_pc_r)
1394		AM_RANGE(0x34, 0x34) AM_READ(tmpz84c011_0_dir_pd_r)
1395		AM_RANGE(0x44, 0x44) AM_READ(tmpz84c011_0_dir_pe_r)
1396
1397		AM_RANGE(0x80, 0x81) AM_READ(nbmj9195_blitter_0_r)
	882	AM_RANGE(0xc0, 0xc1) AM_READ(nbmj9195_blitter_0_r)
	883	AM_RANGE(0xc0, 0xcf) AM_WRITE(nbmj9195_blitter_0_w)
	884	AM_RANGE(0xd0, 0xdf) AM_WRITE(nbmj9195_clut_0_w)
1398	885	ADDRESS_MAP_END
1399	886
1400		static ADDRESS_MAP_START( writeport_mjgottsu, ADDRESS_SPACE_IO, 8 )
	887	static ADDRESS_MAP_START( mjgottsu_io_map, ADDRESS_SPACE_IO, 8 )
1401	888	ADDRESS_MAP_GLOBAL_MASK(0xff)
1402		AM_RANGE(0x10, 0x13) AM_DEVWRITE("main_ctc", z80ctc_w)
1403		AM_RANGE(0x50, 0x50) AM_WRITE(tmpz84c011_0_pa_w)
1404		AM_RANGE(0x51, 0x51) AM_WRITE(tmpz84c011_0_pb_w)
1405		AM_RANGE(0x52, 0x52) AM_WRITE(tmpz84c011_0_pc_w)
1406		AM_RANGE(0x30, 0x30) AM_WRITE(tmpz84c011_0_pd_w)
1407		AM_RANGE(0x40, 0x40) AM_WRITE(tmpz84c011_0_pe_w)
1408		AM_RANGE(0x54, 0x54) AM_WRITE(tmpz84c011_0_dir_pa_w)
1409		AM_RANGE(0x55, 0x55) AM_WRITE(tmpz84c011_0_dir_pb_w)
1410		AM_RANGE(0x56, 0x56) AM_WRITE(tmpz84c011_0_dir_pc_w)
1411		AM_RANGE(0x34, 0x34) AM_WRITE(tmpz84c011_0_dir_pd_w)
1412		AM_RANGE(0x44, 0x44) AM_WRITE(tmpz84c011_0_dir_pe_w)
	889	TMPZ84C011_REGS
1413	890
	891	AM_RANGE(0x80, 0x81) AM_READ(nbmj9195_blitter_0_r)
	892	AM_RANGE(0x80, 0x8f) AM_WRITE(nbmj9195_blitter_0_w)
1414	893	AM_RANGE(0x90, 0x9f) AM_WRITE(nbmj9195_clut_0_w)
1415	894
1416		AM_RANGE(0x80, 0x8f) AM_WRITE(nbmj9195_blitter_0_w)
1417
1418	895	AM_RANGE(0xa0, 0xa0) AM_WRITE(nbmj9195_sound_w)
1419	896	AM_RANGE(0xa4, 0xa4) AM_WRITENOP
1420	897	AM_RANGE(0xa8, 0xa8) AM_WRITENOP
1421	898	AM_RANGE(0xb0, 0xb0) AM_WRITE(nbmj9195_inputportsel_w)
1422	899	ADDRESS_MAP_END
1423	900
1424
1425		static ADDRESS_MAP_START( readport_cmehyou, ADDRESS_SPACE_IO, 8 )
	901	static ADDRESS_MAP_START( cmehyou_io_map, ADDRESS_SPACE_IO, 8 )
1426	902	ADDRESS_MAP_GLOBAL_MASK(0xff)
1427		AM_RANGE(0x10, 0x13) AM_DEVREAD("main_ctc", z80ctc_r)
1428		AM_RANGE(0x50, 0x50) AM_READ(tmpz84c011_0_pa_r)
1429		AM_RANGE(0x51, 0x51) AM_READ(tmpz84c011_0_pb_r)
1430		AM_RANGE(0x52, 0x52) AM_READ(tmpz84c011_0_pc_r)
1431		AM_RANGE(0x30, 0x30) AM_READ(tmpz84c011_0_pd_r)
1432		AM_RANGE(0x40, 0x40) AM_READ(tmpz84c011_0_pe_r)
1433		AM_RANGE(0x54, 0x54) AM_READ(tmpz84c011_0_dir_pa_r)
1434		AM_RANGE(0x55, 0x55) AM_READ(tmpz84c011_0_dir_pb_r)
1435		AM_RANGE(0x56, 0x56) AM_READ(tmpz84c011_0_dir_pc_r)
1436		AM_RANGE(0x34, 0x34) AM_READ(tmpz84c011_0_dir_pd_r)
1437		AM_RANGE(0x44, 0x44) AM_READ(tmpz84c011_0_dir_pe_r)
	903	TMPZ84C011_REGS
1438	904
1439		AM_RANGE(0xc0, 0xc1) AM_READ(nbmj9195_blitter_0_r)
1440		ADDRESS_MAP_END
1441
1442		static ADDRESS_MAP_START( writeport_cmehyou, ADDRESS_SPACE_IO, 8 )
1443		ADDRESS_MAP_GLOBAL_MASK(0xff)
1444		AM_RANGE(0x10, 0x13) AM_DEVWRITE("main_ctc", z80ctc_w)
1445		AM_RANGE(0x50, 0x50) AM_WRITE(tmpz84c011_0_pa_w)
1446		AM_RANGE(0x51, 0x51) AM_WRITE(tmpz84c011_0_pb_w)
1447		AM_RANGE(0x52, 0x52) AM_WRITE(tmpz84c011_0_pc_w)
1448		AM_RANGE(0x30, 0x30) AM_WRITE(tmpz84c011_0_pd_w)
1449		AM_RANGE(0x40, 0x40) AM_WRITE(tmpz84c011_0_pe_w)
1450		AM_RANGE(0x54, 0x54) AM_WRITE(tmpz84c011_0_dir_pa_w)
1451		AM_RANGE(0x55, 0x55) AM_WRITE(tmpz84c011_0_dir_pb_w)
1452		AM_RANGE(0x56, 0x56) AM_WRITE(tmpz84c011_0_dir_pc_w)
1453		AM_RANGE(0x34, 0x34) AM_WRITE(tmpz84c011_0_dir_pd_w)
1454		AM_RANGE(0x44, 0x44) AM_WRITE(tmpz84c011_0_dir_pe_w)
1455
1456		AM_RANGE(0xd0, 0xdf) AM_WRITE(nbmj9195_clut_0_w)
1457
1458		AM_RANGE(0xc0, 0xcf) AM_WRITE(nbmj9195_blitter_0_w)
1459
1460	905	AM_RANGE(0xa0, 0xa0) AM_WRITE(nbmj9195_sound_w)
1461	906	AM_RANGE(0xa8, 0xa8) AM_WRITENOP
1462	907	AM_RANGE(0xb0, 0xb0) AM_WRITE(nbmj9195_inputportsel_w)
1463	908	AM_RANGE(0xb4, 0xb4) AM_WRITENOP
1464		ADDRESS_MAP_END
1465	909
1466
1467		static ADDRESS_MAP_START( readport_mjkoiura, ADDRESS_SPACE_IO, 8 )
1468		ADDRESS_MAP_GLOBAL_MASK(0xff)
1469		AM_RANGE(0x10, 0x13) AM_DEVREAD("main_ctc", z80ctc_r)
1470		AM_RANGE(0x50, 0x50) AM_READ(tmpz84c011_0_pa_r)
1471		AM_RANGE(0x51, 0x51) AM_READ(tmpz84c011_0_pb_r)
1472		AM_RANGE(0x52, 0x52) AM_READ(tmpz84c011_0_pc_r)
1473		AM_RANGE(0x30, 0x30) AM_READ(tmpz84c011_0_pd_r)
1474		AM_RANGE(0x40, 0x40) AM_READ(tmpz84c011_0_pe_r)
1475		AM_RANGE(0x54, 0x54) AM_READ(tmpz84c011_0_dir_pa_r)
1476		AM_RANGE(0x55, 0x55) AM_READ(tmpz84c011_0_dir_pb_r)
1477		AM_RANGE(0x56, 0x56) AM_READ(tmpz84c011_0_dir_pc_r)
1478		AM_RANGE(0x34, 0x34) AM_READ(tmpz84c011_0_dir_pd_r)
1479		AM_RANGE(0x44, 0x44) AM_READ(tmpz84c011_0_dir_pe_r)
1480
1481		AM_RANGE(0x80, 0x81) AM_READ(nbmj9195_blitter_0_r)
	910	AM_RANGE(0xc0, 0xc1) AM_READ(nbmj9195_blitter_0_r)
	911	AM_RANGE(0xc0, 0xcf) AM_WRITE(nbmj9195_blitter_0_w)
	912	AM_RANGE(0xd0, 0xdf) AM_WRITE(nbmj9195_clut_0_w)
1482	913	ADDRESS_MAP_END
1483	914
1484		static ADDRESS_MAP_START( writeport_mjkoiura, ADDRESS_SPACE_IO, 8 )
	915	static ADDRESS_MAP_START( mjkoiura_io_map, ADDRESS_SPACE_IO, 8 )
1485	916	ADDRESS_MAP_GLOBAL_MASK(0xff)
1486		AM_RANGE(0x10, 0x13) AM_DEVWRITE("main_ctc", z80ctc_w)
1487		AM_RANGE(0x50, 0x50) AM_WRITE(tmpz84c011_0_pa_w)
1488		AM_RANGE(0x51, 0x51) AM_WRITE(tmpz84c011_0_pb_w)
1489		AM_RANGE(0x52, 0x52) AM_WRITE(tmpz84c011_0_pc_w)
1490		AM_RANGE(0x30, 0x30) AM_WRITE(tmpz84c011_0_pd_w)
1491		AM_RANGE(0x40, 0x40) AM_WRITE(tmpz84c011_0_pe_w)
1492		AM_RANGE(0x54, 0x54) AM_WRITE(tmpz84c011_0_dir_pa_w)
1493		AM_RANGE(0x55, 0x55) AM_WRITE(tmpz84c011_0_dir_pb_w)
1494		AM_RANGE(0x56, 0x56) AM_WRITE(tmpz84c011_0_dir_pc_w)
1495		AM_RANGE(0x34, 0x34) AM_WRITE(tmpz84c011_0_dir_pd_w)
1496		AM_RANGE(0x44, 0x44) AM_WRITE(tmpz84c011_0_dir_pe_w)
	917	TMPZ84C011_REGS
1497	918
	919	AM_RANGE(0x80, 0x81) AM_READ(nbmj9195_blitter_0_r)
	920	AM_RANGE(0x80, 0x8f) AM_WRITE(nbmj9195_blitter_0_w)
1498	921	AM_RANGE(0x90, 0x9f) AM_WRITE(nbmj9195_clut_0_w)
1499	922
1500		AM_RANGE(0x80, 0x8f) AM_WRITE(nbmj9195_blitter_0_w)
1501
1502	923	AM_RANGE(0xa0, 0xa0) AM_WRITE(nbmj9195_sound_w)
1503	924	AM_RANGE(0xa4, 0xa4) AM_WRITENOP
1504	925	AM_RANGE(0xa8, 0xa8) AM_WRITENOP
1505	926	AM_RANGE(0xb0, 0xb0) AM_WRITE(nbmj9195_inputportsel_w)
1506	927	ADDRESS_MAP_END
1507	928
1508
1509		static ADDRESS_MAP_START( readport_mkoiuraa, ADDRESS_SPACE_IO, 8 )
	929	static ADDRESS_MAP_START( mkoiuraa_io_map, ADDRESS_SPACE_IO, 8 )
1510	930	ADDRESS_MAP_GLOBAL_MASK(0xff)
1511		AM_RANGE(0x10, 0x13) AM_DEVREAD("main_ctc", z80ctc_r)
1512		AM_RANGE(0x50, 0x50) AM_READ(tmpz84c011_0_pa_r)
1513		AM_RANGE(0x51, 0x51) AM_READ(tmpz84c011_0_pb_r)
1514		AM_RANGE(0x52, 0x52) AM_READ(tmpz84c011_0_pc_r)
1515		AM_RANGE(0x30, 0x30) AM_READ(tmpz84c011_0_pd_r)
1516		AM_RANGE(0x40, 0x40) AM_READ(tmpz84c011_0_pe_r)
1517		AM_RANGE(0x54, 0x54) AM_READ(tmpz84c011_0_dir_pa_r)
1518		AM_RANGE(0x55, 0x55) AM_READ(tmpz84c011_0_dir_pb_r)
1519		AM_RANGE(0x56, 0x56) AM_READ(tmpz84c011_0_dir_pc_r)
1520		AM_RANGE(0x34, 0x34) AM_READ(tmpz84c011_0_dir_pd_r)
1521		AM_RANGE(0x44, 0x44) AM_READ(tmpz84c011_0_dir_pe_r)
	931	TMPZ84C011_REGS
1522	932
1523		AM_RANGE(0xc0, 0xc1) AM_READ(nbmj9195_blitter_0_r)
1524		ADDRESS_MAP_END
1525
1526		static ADDRESS_MAP_START( writeport_mkoiuraa, ADDRESS_SPACE_IO, 8 )
1527		ADDRESS_MAP_GLOBAL_MASK(0xff)
1528		AM_RANGE(0x10, 0x13) AM_DEVWRITE("main_ctc", z80ctc_w)
1529		AM_RANGE(0x50, 0x50) AM_WRITE(tmpz84c011_0_pa_w)
1530		AM_RANGE(0x51, 0x51) AM_WRITE(tmpz84c011_0_pb_w)
1531		AM_RANGE(0x52, 0x52) AM_WRITE(tmpz84c011_0_pc_w)
1532		AM_RANGE(0x30, 0x30) AM_WRITE(tmpz84c011_0_pd_w)
1533		AM_RANGE(0x40, 0x40) AM_WRITE(tmpz84c011_0_pe_w)
1534		AM_RANGE(0x54, 0x54) AM_WRITE(tmpz84c011_0_dir_pa_w)
1535		AM_RANGE(0x55, 0x55) AM_WRITE(tmpz84c011_0_dir_pb_w)
1536		AM_RANGE(0x56, 0x56) AM_WRITE(tmpz84c011_0_dir_pc_w)
1537		AM_RANGE(0x34, 0x34) AM_WRITE(tmpz84c011_0_dir_pd_w)
1538		AM_RANGE(0x44, 0x44) AM_WRITE(tmpz84c011_0_dir_pe_w)
1539
1540		AM_RANGE(0xd0, 0xdf) AM_WRITE(nbmj9195_clut_0_w)
1541
1542		AM_RANGE(0xc0, 0xcf) AM_WRITE(nbmj9195_blitter_0_w)
1543
1544	933	AM_RANGE(0xa0, 0xa0) AM_WRITE(nbmj9195_sound_w)
1545	934	AM_RANGE(0xa4, 0xa4) AM_WRITENOP
1546	935	AM_RANGE(0xa8, 0xa8) AM_WRITENOP
1547	936	AM_RANGE(0xb0, 0xb0) AM_WRITE(nbmj9195_inputportsel_w)
	937
	938	AM_RANGE(0xc0, 0xc1) AM_READ(nbmj9195_blitter_0_r)
	939	AM_RANGE(0xc0, 0xcf) AM_WRITE(nbmj9195_blitter_0_w)
	940	AM_RANGE(0xd0, 0xdf) AM_WRITE(nbmj9195_clut_0_w)
1548	941	ADDRESS_MAP_END
1549	942
1550
1551		static ADDRESS_MAP_START( readport_mscoutm, ADDRESS_SPACE_IO, 8 )
	943	static ADDRESS_MAP_START( mscoutm_io_map, ADDRESS_SPACE_IO, 8 )
1552	944	ADDRESS_MAP_GLOBAL_MASK(0xff)
1553		AM_RANGE(0x10, 0x13) AM_DEVREAD("main_ctc", z80ctc_r)
1554		AM_RANGE(0x50, 0x50) AM_READ(tmpz84c011_0_pa_r)
1555		AM_RANGE(0x51, 0x51) AM_READ(tmpz84c011_0_pb_r)
1556		AM_RANGE(0x52, 0x52) AM_READ(tmpz84c011_0_pc_r)
1557		AM_RANGE(0x30, 0x30) AM_READ(tmpz84c011_0_pd_r)
1558		AM_RANGE(0x40, 0x40) AM_READ(tmpz84c011_0_pe_r)
1559		AM_RANGE(0x54, 0x54) AM_READ(tmpz84c011_0_dir_pa_r)
1560		AM_RANGE(0x55, 0x55) AM_READ(tmpz84c011_0_dir_pb_r)
1561		AM_RANGE(0x56, 0x56) AM_READ(tmpz84c011_0_dir_pc_r)
1562		AM_RANGE(0x34, 0x34) AM_READ(tmpz84c011_0_dir_pd_r)
1563		AM_RANGE(0x44, 0x44) AM_READ(tmpz84c011_0_dir_pe_r)
	945	TMPZ84C011_REGS
1564	946
1565	947	AM_RANGE(0x80, 0x80) AM_READ(mscoutm_dipsw_1_r)
1566	948	AM_RANGE(0x82, 0x82) AM_READ(mscoutm_dipsw_0_r)
	949	AM_RANGE(0x84, 0x84) AM_WRITE(nbmj9195_sound_w)
1567	950
1568		AM_RANGE(0xc0, 0xc1) AM_READ(nbmj9195_blitter_0_r)
1569		AM_RANGE(0xe0, 0xe1) AM_READ(nbmj9195_blitter_1_r)
1570		ADDRESS_MAP_END
1571
1572		static ADDRESS_MAP_START( writeport_mscoutm, ADDRESS_SPACE_IO, 8 )
1573		ADDRESS_MAP_GLOBAL_MASK(0xff)
1574		AM_RANGE(0x10, 0x13) AM_DEVWRITE("main_ctc", z80ctc_w)
1575		AM_RANGE(0x50, 0x50) AM_WRITE(tmpz84c011_0_pa_w)
1576		AM_RANGE(0x51, 0x51) AM_WRITE(tmpz84c011_0_pb_w)
1577		AM_RANGE(0x52, 0x52) AM_WRITE(tmpz84c011_0_pc_w)
1578		AM_RANGE(0x30, 0x30) AM_WRITE(tmpz84c011_0_pd_w)
1579		AM_RANGE(0x40, 0x40) AM_WRITE(tmpz84c011_0_pe_w)
1580		AM_RANGE(0x54, 0x54) AM_WRITE(tmpz84c011_0_dir_pa_w)
1581		AM_RANGE(0x55, 0x55) AM_WRITE(tmpz84c011_0_dir_pb_w)
1582		AM_RANGE(0x56, 0x56) AM_WRITE(tmpz84c011_0_dir_pc_w)
1583		AM_RANGE(0x34, 0x34) AM_WRITE(tmpz84c011_0_dir_pd_w)
1584		AM_RANGE(0x44, 0x44) AM_WRITE(tmpz84c011_0_dir_pe_w)
1585
1586		AM_RANGE(0xd0, 0xdf) AM_WRITE(nbmj9195_clut_0_w)
1587		AM_RANGE(0xf0, 0xff) AM_WRITE(nbmj9195_clut_1_w)
1588
1589	951	AM_RANGE(0xa0, 0xa6) AM_WRITENOP         // nb22090 param ?
1590	952
	953	AM_RANGE(0xc0, 0xc1) AM_READ(nbmj9195_blitter_0_r)
1591	954	AM_RANGE(0xc0, 0xcf) AM_WRITE(nbmj9195_blitter_0_w)
	955
	956	AM_RANGE(0xd0, 0xdf) AM_WRITE(nbmj9195_clut_0_w)
	957	AM_RANGE(0xe0, 0xe1) AM_READ(nbmj9195_blitter_1_r)
1592	958	AM_RANGE(0xe0, 0xef) AM_WRITE(nbmj9195_blitter_1_w)
1593	959
1594		AM_RANGE(0x84, 0x84) AM_WRITE(nbmj9195_sound_w)
	960	AM_RANGE(0xf0, 0xff) AM_WRITE(nbmj9195_clut_1_w)
1595	961	ADDRESS_MAP_END
1596	962
1597
1598		static ADDRESS_MAP_START( readport_imekura, ADDRESS_SPACE_IO, 8 )
	963	static ADDRESS_MAP_START( imekura_io_map, ADDRESS_SPACE_IO, 8 )
1599	964	ADDRESS_MAP_GLOBAL_MASK(0xff)
1600		AM_RANGE(0x10, 0x13) AM_DEVREAD("main_ctc", z80ctc_r)
1601		AM_RANGE(0x50, 0x50) AM_READ(tmpz84c011_0_pa_r)
1602		AM_RANGE(0x51, 0x51) AM_READ(tmpz84c011_0_pb_r)
1603		AM_RANGE(0x52, 0x52) AM_READ(tmpz84c011_0_pc_r)
1604		AM_RANGE(0x30, 0x30) AM_READ(tmpz84c011_0_pd_r)
1605		AM_RANGE(0x40, 0x40) AM_READ(tmpz84c011_0_pe_r)
1606		AM_RANGE(0x54, 0x54) AM_READ(tmpz84c011_0_dir_pa_r)
1607		AM_RANGE(0x55, 0x55) AM_READ(tmpz84c011_0_dir_pb_r)
1608		AM_RANGE(0x56, 0x56) AM_READ(tmpz84c011_0_dir_pc_r)
1609		AM_RANGE(0x34, 0x34) AM_READ(tmpz84c011_0_dir_pd_r)
1610		AM_RANGE(0x44, 0x44) AM_READ(tmpz84c011_0_dir_pe_r)
	965	TMPZ84C011_REGS
1611	966
1612	967	AM_RANGE(0x80, 0x80) AM_READ(mscoutm_dipsw_1_r)
1613	968	AM_RANGE(0x82, 0x82) AM_READ(mscoutm_dipsw_0_r)
	969	AM_RANGE(0x84, 0x84) AM_WRITE(nbmj9195_sound_w)
1614	970
	971	AM_RANGE(0xb0, 0xb6) AM_WRITENOP         // nb22090 param ?
	972
1615	973	AM_RANGE(0xc0, 0xc1) AM_READ(nbmj9195_blitter_0_r)
1616		AM_RANGE(0xe0, 0xe1) AM_READ(nbmj9195_blitter_1_r)
1617		ADDRESS_MAP_END
	974	AM_RANGE(0xc0, 0xcf) AM_WRITE(nbmj9195_blitter_0_w)
1618	975
1619		static ADDRESS_MAP_START( writeport_imekura, ADDRESS_SPACE_IO, 8 )
1620		ADDRESS_MAP_GLOBAL_MASK(0xff)
1621		AM_RANGE(0x10, 0x13) AM_DEVWRITE("main_ctc", z80ctc_w)
1622		AM_RANGE(0x50, 0x50) AM_WRITE(tmpz84c011_0_pa_w)
1623		AM_RANGE(0x51, 0x51) AM_WRITE(tmpz84c011_0_pb_w)
1624		AM_RANGE(0x52, 0x52) AM_WRITE(tmpz84c011_0_pc_w)
1625		AM_RANGE(0x30, 0x30) AM_WRITE(tmpz84c011_0_pd_w)
1626		AM_RANGE(0x40, 0x40) AM_WRITE(tmpz84c011_0_pe_w)
1627		AM_RANGE(0x54, 0x54) AM_WRITE(tmpz84c011_0_dir_pa_w)
1628		AM_RANGE(0x55, 0x55) AM_WRITE(tmpz84c011_0_dir_pb_w)
1629		AM_RANGE(0x56, 0x56) AM_WRITE(tmpz84c011_0_dir_pc_w)
1630		AM_RANGE(0x34, 0x34) AM_WRITE(tmpz84c011_0_dir_pd_w)
1631		AM_RANGE(0x44, 0x44) AM_WRITE(tmpz84c011_0_dir_pe_w)
1632
1633	976	AM_RANGE(0xd0, 0xdf) AM_WRITE(nbmj9195_clut_0_w)
1634		AM_RANGE(0xf0, 0xff) AM_WRITE(nbmj9195_clut_1_w)
1635	977
1636		AM_RANGE(0xb0, 0xb6) AM_WRITENOP         // nb22090 param ?
1637
1638		AM_RANGE(0xc0, 0xcf) AM_WRITE(nbmj9195_blitter_0_w)
	978	AM_RANGE(0xe0, 0xe1) AM_READ(nbmj9195_blitter_1_r)
1639	979	AM_RANGE(0xe0, 0xef) AM_WRITE(nbmj9195_blitter_1_w)
1640
1641		AM_RANGE(0x84, 0x84) AM_WRITE(nbmj9195_sound_w)
	980	AM_RANGE(0xf0, 0xff) AM_WRITE(nbmj9195_clut_1_w)
1642	981	ADDRESS_MAP_END
1643	982
1644
1645		static ADDRESS_MAP_START( readport_mjegolf, ADDRESS_SPACE_IO, 8 )
	983	static ADDRESS_MAP_START( mjegolf_io_map, ADDRESS_SPACE_IO, 8 )
1646	984	ADDRESS_MAP_GLOBAL_MASK(0xff)
1647		AM_RANGE(0x10, 0x13) AM_DEVREAD("main_ctc", z80ctc_r)
1648		AM_RANGE(0x50, 0x50) AM_READ(tmpz84c011_0_pa_r)
1649		AM_RANGE(0x51, 0x51) AM_READ(tmpz84c011_0_pb_r)
1650		AM_RANGE(0x52, 0x52) AM_READ(tmpz84c011_0_pc_r)
1651		AM_RANGE(0x30, 0x30) AM_READ(tmpz84c011_0_pd_r)
1652		AM_RANGE(0x40, 0x40) AM_READ(tmpz84c011_0_pe_r)
1653		AM_RANGE(0x54, 0x54) AM_READ(tmpz84c011_0_dir_pa_r)
1654		AM_RANGE(0x55, 0x55) AM_READ(tmpz84c011_0_dir_pb_r)
1655		AM_RANGE(0x56, 0x56) AM_READ(tmpz84c011_0_dir_pc_r)
1656		AM_RANGE(0x34, 0x34) AM_READ(tmpz84c011_0_dir_pd_r)
1657		AM_RANGE(0x44, 0x44) AM_READ(tmpz84c011_0_dir_pe_r)
	985	TMPZ84C011_REGS
1658	986
1659		AM_RANGE(0xe0, 0xe0) AM_READ(mscoutm_dipsw_1_r)
1660		AM_RANGE(0xe2, 0xe2) AM_READ(mscoutm_dipsw_0_r)
	987	AM_RANGE(0x80, 0x86) AM_WRITENOP         // nb22090 param ?
1661	988
1662	989	AM_RANGE(0xa0, 0xa1) AM_READ(nbmj9195_blitter_0_r)
1663		AM_RANGE(0xc0, 0xc1) AM_READ(nbmj9195_blitter_1_r)
1664		ADDRESS_MAP_END
1665
1666		static ADDRESS_MAP_START( writeport_mjegolf, ADDRESS_SPACE_IO, 8 )
1667		ADDRESS_MAP_GLOBAL_MASK(0xff)
1668		AM_RANGE(0x10, 0x13) AM_DEVWRITE("main_ctc", z80ctc_w)
1669		AM_RANGE(0x50, 0x50) AM_WRITE(tmpz84c011_0_pa_w)
1670		AM_RANGE(0x51, 0x51) AM_WRITE(tmpz84c011_0_pb_w)
1671		AM_RANGE(0x52, 0x52) AM_WRITE(tmpz84c011_0_pc_w)
1672		AM_RANGE(0x30, 0x30) AM_WRITE(tmpz84c011_0_pd_w)
1673		AM_RANGE(0x40, 0x40) AM_WRITE(tmpz84c011_0_pe_w)
1674		AM_RANGE(0x54, 0x54) AM_WRITE(tmpz84c011_0_dir_pa_w)
1675		AM_RANGE(0x55, 0x55) AM_WRITE(tmpz84c011_0_dir_pb_w)
1676		AM_RANGE(0x56, 0x56) AM_WRITE(tmpz84c011_0_dir_pc_w)
1677		AM_RANGE(0x34, 0x34) AM_WRITE(tmpz84c011_0_dir_pd_w)
1678		AM_RANGE(0x44, 0x44) AM_WRITE(tmpz84c011_0_dir_pe_w)
1679
	990	AM_RANGE(0xa0, 0xaf) AM_WRITE(nbmj9195_blitter_0_w)
1680	991	AM_RANGE(0xb0, 0xbf) AM_WRITE(nbmj9195_clut_0_w)
1681		AM_RANGE(0xd0, 0xdf) AM_WRITE(nbmj9195_clut_1_w)
1682	992
1683		AM_RANGE(0x80, 0x86) AM_WRITENOP         // nb22090 param ?
1684
1685		AM_RANGE(0xa0, 0xaf) AM_WRITE(nbmj9195_blitter_0_w)
	993	AM_RANGE(0xc0, 0xc1) AM_READ(nbmj9195_blitter_1_r)
1686	994	AM_RANGE(0xc0, 0xcf) AM_WRITE(nbmj9195_blitter_1_w)
1687	995
	996	AM_RANGE(0xd0, 0xdf) AM_WRITE(nbmj9195_clut_1_w)
	997
	998	AM_RANGE(0xe0, 0xe0) AM_READ(mscoutm_dipsw_1_r)
	999	AM_RANGE(0xe2, 0xe2) AM_READ(mscoutm_dipsw_0_r)
1688	1000	AM_RANGE(0xe4, 0xe4) AM_WRITE(nbmj9195_sound_w)
1689	1001	ADDRESS_MAP_END
1690	1002
1691	1003
1692		static ADDRESS_MAP_START( sound_readport, ADDRESS_SPACE_IO, 8 )
1693		ADDRESS_MAP_GLOBAL_MASK(0xff)
1694		AM_RANGE(0x10, 0x13) AM_DEVREAD("audio_ctc", z80ctc_r)
1695		AM_RANGE(0x50, 0x50) AM_READ(tmpz84c011_1_pa_r)
1696		AM_RANGE(0x51, 0x51) AM_READ(tmpz84c011_1_pb_r)
1697		AM_RANGE(0x52, 0x52) AM_READ(tmpz84c011_1_pc_r)
1698		AM_RANGE(0x30, 0x30) AM_READ(tmpz84c011_1_pd_r)
1699		AM_RANGE(0x40, 0x40) AM_READ(tmpz84c011_1_pe_r)
1700		AM_RANGE(0x54, 0x54) AM_READ(tmpz84c011_1_dir_pa_r)
1701		AM_RANGE(0x55, 0x55) AM_READ(tmpz84c011_1_dir_pb_r)
1702		AM_RANGE(0x56, 0x56) AM_READ(tmpz84c011_1_dir_pc_r)
1703		AM_RANGE(0x34, 0x34) AM_READ(tmpz84c011_1_dir_pd_r)
1704		AM_RANGE(0x44, 0x44) AM_READ(tmpz84c011_1_dir_pe_r)
	1004
	1005	static ADDRESS_MAP_START( sailorws_sound_map, ADDRESS_SPACE_PROGRAM, 8 )
	1006	AM_RANGE(0x0000, 0x77ff) AM_ROM
	1007	AM_RANGE(0x7800, 0x7fff) AM_RAM
	1008	AM_RANGE(0x8000, 0xffff) AM_ROMBANK(1)
1705	1009	ADDRESS_MAP_END
1706	1010
1707		static ADDRESS_MAP_START( sound_writeport, ADDRESS_SPACE_IO, 8 )
	1011	static ADDRESS_MAP_START( sailorws_sound_io_map, ADDRESS_SPACE_IO, 8 )
1708	1012	ADDRESS_MAP_GLOBAL_MASK(0xff)
1709		AM_RANGE(0x10, 0x13) AM_DEVWRITE("audio_ctc", z80ctc_w)
1710		AM_RANGE(0x50, 0x50) AM_WRITE(tmpz84c011_1_pa_w)
1711		AM_RANGE(0x51, 0x51) AM_WRITE(tmpz84c011_1_pb_w)
1712		AM_RANGE(0x52, 0x52) AM_WRITE(tmpz84c011_1_pc_w)
1713		AM_RANGE(0x30, 0x30) AM_WRITE(tmpz84c011_1_pd_w)
1714		AM_RANGE(0x40, 0x40) AM_WRITE(tmpz84c011_1_pe_w)
1715		AM_RANGE(0x54, 0x54) AM_WRITE(tmpz84c011_1_dir_pa_w)
1716		AM_RANGE(0x55, 0x55) AM_WRITE(tmpz84c011_1_dir_pb_w)
1717		AM_RANGE(0x56, 0x56) AM_WRITE(tmpz84c011_1_dir_pc_w)
1718		AM_RANGE(0x34, 0x34) AM_WRITE(tmpz84c011_1_dir_pd_w)
1719		AM_RANGE(0x44, 0x44) AM_WRITE(tmpz84c011_1_dir_pe_w)
1720
	1013	AM_RANGE(0x10, 0x13) AM_DEVREADWRITE("audio_ctc", z80ctc_r,z80ctc_w)
	1014	AM_RANGE(0x50, 0x50) AM_READWRITE(tmpz84c011_1_pa_r,tmpz84c011_1_pa_w)
	1015	AM_RANGE(0x51, 0x51) AM_READWRITE(tmpz84c011_1_pb_r,tmpz84c011_1_pb_w)
	1016	AM_RANGE(0x52, 0x52) AM_READWRITE(tmpz84c011_1_pc_r,tmpz84c011_1_pc_w)
	1017	AM_RANGE(0x30, 0x30) AM_READWRITE(tmpz84c011_1_pd_r,tmpz84c011_1_pd_w)
	1018	AM_RANGE(0x40, 0x40) AM_READWRITE(tmpz84c011_1_pe_r,tmpz84c011_1_pe_w)
	1019	AM_RANGE(0x54, 0x54) AM_READWRITE(tmpz84c011_1_dir_pa_r,tmpz84c011_1_dir_pa_w)
	1020	AM_RANGE(0x55, 0x55) AM_READWRITE(tmpz84c011_1_dir_pb_r,tmpz84c011_1_dir_pb_w)
	1021	AM_RANGE(0x56, 0x56) AM_READWRITE(tmpz84c011_1_dir_pc_r,tmpz84c011_1_dir_pc_w)
	1022	AM_RANGE(0x34, 0x34) AM_READWRITE(tmpz84c011_1_dir_pd_r,tmpz84c011_1_dir_pd_w)
	1023	AM_RANGE(0x44, 0x44) AM_READWRITE(tmpz84c011_1_dir_pe_r,tmpz84c011_1_dir_pe_w)
1721	1024	AM_RANGE(0x80, 0x81) AM_DEVWRITE("ym", ym3812_w)
1722	1025	ADDRESS_MAP_END
1723	1026
1724
1725	1027	/********************************************************************************
1726	1028	These Nichibutsu Mahjong games use two different but very similar control ports:
1727	1029	- the 1st type is the common control panel used by many other nbmj* drivers
r4679	r4680
3625	2927	/* basic machine hardware */
3626	2928	MDRV_CPU_ADD("maincpu", Z80, 12000000/2)      /* TMPZ84C011, 6.00 MHz */
3627	2929	MDRV_CPU_CONFIG(daisy_chain_main)
3628		MDRV_CPU_PROGRAM_MAP(readmem_sailorws, writemem_sailorws)
3629		MDRV_CPU_IO_MAP(readport_sailorws, writeport_sailorws)
	2930	MDRV_CPU_PROGRAM_MAP(sailorws_map, 0)
	2931	MDRV_CPU_IO_MAP(sailorws_io_map, 0)
3630	2932	MDRV_CPU_VBLANK_INT("screen", ctc0_trg1)            /* vblank is connect to ctc triggfer */
3631	2933
3632	2934	MDRV_CPU_ADD("audiocpu", Z80, 8000000/1)               /* TMPZ84C011, 8.00 MHz */
3633	2935	MDRV_CPU_CONFIG(daisy_chain_sound)
3634		MDRV_CPU_PROGRAM_MAP(sound_readmem, sound_writemem)
3635		MDRV_CPU_IO_MAP(sound_readport, sound_writeport)
	2936	MDRV_CPU_PROGRAM_MAP(sailorws_sound_map, 0)
	2937	MDRV_CPU_IO_MAP(sailorws_sound_io_map, 0)
3636	2938
3637	2939	MDRV_Z80CTC_ADD("main_ctc", 12000000/2 /* same as "maincpu" */, ctc_intf_main)
3638	2940	MDRV_Z80CTC_ADD("audio_ctc", 8000000/1 /* same as "audiocpu" */, ctc_intf_audio)
r4679	r4680
3697	2999	/* basic machine hardware */
3698	3000	MDRV_IMPORT_FROM( NBMJDRV1 )
3699	3001	MDRV_CPU_MODIFY("maincpu")
3700		MDRV_CPU_PROGRAM_MAP(readmem_mjuraden, writemem_mjuraden)
3701		MDRV_CPU_IO_MAP(readport_mjuraden, writeport_mjuraden)
	3002	MDRV_CPU_PROGRAM_MAP(mjuraden_map, 0)
	3003	MDRV_CPU_IO_MAP(mjuraden_io_map, 0)
3702	3004	MACHINE_DRIVER_END
3703	3005
3704	3006
r4679	r4680
3707	3009	/* basic machine hardware */
3708	3010	MDRV_IMPORT_FROM( NBMJDRV1 )
3709	3011	MDRV_CPU_MODIFY("maincpu")
3710		MDRV_CPU_PROGRAM_MAP(readmem_koinomp, writemem_koinomp)
3711		MDRV_CPU_IO_MAP(readport_koinomp, writeport_koinomp)
	3012	MDRV_CPU_PROGRAM_MAP(koinomp_map, 0)
	3013	MDRV_CPU_IO_MAP(koinomp_io_map, 0)
3712	3014	MACHINE_DRIVER_END
3713	3015
3714	3016
r4679	r4680
3717	3019	/* basic machine hardware */
3718	3020	MDRV_IMPORT_FROM( NBMJDRV1 )
3719	3021	MDRV_CPU_MODIFY("maincpu")
3720		MDRV_CPU_IO_MAP(readport_patimono, writeport_patimono)
	3022	MDRV_CPU_IO_MAP(patimono_io_map, 0)
3721	3023	MACHINE_DRIVER_END
3722	3024
3723	3025
r4679	r4680
3726	3028	/* basic machine hardware */
3727	3029	MDRV_IMPORT_FROM( NBMJDRV1 )
3728	3030	MDRV_CPU_MODIFY("maincpu")
3729		MDRV_CPU_IO_MAP(readport_patimono, writeport_patimono)
	3031	MDRV_CPU_IO_MAP(patimono_io_map, 0)
3730	3032
3731	3033	MDRV_NVRAM_HANDLER(nbmj9195)
3732	3034	MACHINE_DRIVER_END
r4679	r4680
3737	3039	/* basic machine hardware */
3738	3040	MDRV_IMPORT_FROM( NBMJDRV1 )
3739	3041	MDRV_CPU_MODIFY("maincpu")
3740		MDRV_CPU_PROGRAM_MAP(readmem_koinomp, writemem_koinomp)
3741		MDRV_CPU_IO_MAP(readport_mmehyou, writeport_mmehyou)
	3042	MDRV_CPU_PROGRAM_MAP(koinomp_map, 0)
	3043	MDRV_CPU_IO_MAP(mmehyou_io_map, 0)
3742	3044
3743	3045	MDRV_NVRAM_HANDLER(nbmj9195)
3744	3046	MACHINE_DRIVER_END
r4679	r4680
3749	3051	/* basic machine hardware */
3750	3052	MDRV_IMPORT_FROM( NBMJDRV1 )
3751	3053	MDRV_CPU_MODIFY("maincpu")
3752		MDRV_CPU_PROGRAM_MAP(readmem_koinomp, writemem_koinomp)
3753		MDRV_CPU_IO_MAP(readport_koinomp, writeport_koinomp)
	3054	MDRV_CPU_PROGRAM_MAP(koinomp_map, 0)
	3055	MDRV_CPU_IO_MAP(koinomp_io_map, 0)
3754	3056
3755	3057	MDRV_NVRAM_HANDLER(nbmj9195)
3756	3058	MACHINE_DRIVER_END
r4679	r4680
3761	3063	/* basic machine hardware */
3762	3064	MDRV_IMPORT_FROM( NBMJDRV1 )
3763	3065	MDRV_CPU_MODIFY("maincpu")
3764		MDRV_CPU_IO_MAP(readport_gal10ren, writeport_gal10ren)
	3066	MDRV_CPU_IO_MAP(gal10ren_io_map, 0)
3765	3067	MACHINE_DRIVER_END
3766	3068
3767	3069
r4679	r4680
3770	3072	/* basic machine hardware */
3771	3073	MDRV_IMPORT_FROM( NBMJDRV1 )
3772	3074	MDRV_CPU_MODIFY("maincpu")
3773		MDRV_CPU_IO_MAP(readport_renaiclb, writeport_renaiclb)
	3075	MDRV_CPU_IO_MAP(renaiclb_io_map, 0)
3774	3076	MACHINE_DRIVER_END
3775	3077
3776	3078
r4679	r4680
3779	3081	/* basic machine hardware */
3780	3082	MDRV_IMPORT_FROM( NBMJDRV1 )
3781	3083	MDRV_CPU_MODIFY("maincpu")
3782		MDRV_CPU_IO_MAP(readport_mjlaman, writeport_mjlaman)
	3084	MDRV_CPU_IO_MAP(mjlaman_io_map, 0)
3783	3085	MACHINE_DRIVER_END
3784	3086
3785	3087
r4679	r4680
3788	3090	/* basic machine hardware */
3789	3091	MDRV_IMPORT_FROM( NBMJDRV1 )
3790	3092	MDRV_CPU_MODIFY("maincpu")
3791		MDRV_CPU_IO_MAP(readport_mkeibaou, writeport_mkeibaou)
	3093	MDRV_CPU_IO_MAP(mkeibaou_io_map, 0)
3792	3094	MACHINE_DRIVER_END
3793	3095
3794	3096
r4679	r4680
3797	3099	/* basic machine hardware */
3798	3100	MDRV_IMPORT_FROM( NBMJDRV1 )
3799	3101	MDRV_CPU_MODIFY("maincpu")
3800		MDRV_CPU_IO_MAP(readport_pachiten, writeport_pachiten)
	3102	MDRV_CPU_IO_MAP(pachiten_io_map, 0)
3801	3103
3802	3104	MDRV_NVRAM_HANDLER(nbmj9195)
3803	3105	MACHINE_DRIVER_END
r4679	r4680
3815	3117	/* basic machine hardware */
3816	3118	MDRV_IMPORT_FROM( NBMJDRV1 )
3817	3119	MDRV_CPU_MODIFY("maincpu")
3818		MDRV_CPU_IO_MAP(readport_sailorwr, writeport_sailorwr)
	3120	MDRV_CPU_IO_MAP(sailorwr_io_map, 0)
3819	3121
3820	3122	MDRV_NVRAM_HANDLER(nbmj9195)
3821	3123	MACHINE_DRIVER_END
r4679	r4680
3826	3128	/* basic machine hardware */
3827	3129	MDRV_IMPORT_FROM( NBMJDRV1 )
3828	3130	MDRV_CPU_MODIFY("maincpu")
3829		MDRV_CPU_IO_MAP(readport_psailor1, writeport_psailor1)
	3131	MDRV_CPU_IO_MAP(psailor1_io_map, 0)
3830	3132	MACHINE_DRIVER_END
3831	3133
3832	3134
r4679	r4680
3835	3137	/* basic machine hardware */
3836	3138	MDRV_IMPORT_FROM( NBMJDRV1 )
3837	3139	MDRV_CPU_MODIFY("maincpu")
3838		MDRV_CPU_IO_MAP(readport_psailor2, writeport_psailor2)
	3140	MDRV_CPU_IO_MAP(psailor2_io_map, 0)
3839	3141	MACHINE_DRIVER_END
3840	3142
3841	3143
r4679	r4680
3844	3146	/* basic machine hardware */
3845	3147	MDRV_IMPORT_FROM( NBMJDRV1 )
3846	3148	MDRV_CPU_MODIFY("maincpu")
3847		MDRV_CPU_IO_MAP(readport_otatidai, writeport_otatidai)
	3149	MDRV_CPU_IO_MAP(otatidai_io_map, 0)
3848	3150	MACHINE_DRIVER_END
3849	3151
3850	3152
r4679	r4680
3853	3155	/* basic machine hardware */
3854	3156	MDRV_IMPORT_FROM( NBMJDRV1 )
3855	3157	MDRV_CPU_MODIFY("maincpu")
3856		MDRV_CPU_IO_MAP(readport_yosimoto, writeport_yosimoto)
	3158	MDRV_CPU_IO_MAP(yosimoto_io_map, 0)
3857	3159	MACHINE_DRIVER_END
3858	3160
3859	3161
r4679	r4680
3862	3164	/* basic machine hardware */
3863	3165	MDRV_IMPORT_FROM( NBMJDRV1 )
3864	3166	MDRV_CPU_MODIFY("maincpu")
3865		MDRV_CPU_IO_MAP(readport_jituroku, writeport_jituroku)
	3167	MDRV_CPU_IO_MAP(jituroku_io_map, 0)
3866	3168	MACHINE_DRIVER_END
3867	3169
3868	3170
r4679	r4680
3871	3173	/* basic machine hardware */
3872	3174	MDRV_IMPORT_FROM( NBMJDRV2 )
3873	3175	MDRV_CPU_MODIFY("maincpu")
3874		MDRV_CPU_PROGRAM_MAP(readmem_ngpgal, writemem_ngpgal)
3875		MDRV_CPU_IO_MAP(readport_ngpgal, writeport_ngpgal)
	3176	MDRV_CPU_PROGRAM_MAP(ngpgal_map, 0)
	3177	MDRV_CPU_IO_MAP(ngpgal_io_map, 0)
3876	3178	MACHINE_DRIVER_END
3877	3179
3878	3180
r4679	r4680
3881	3183	/* basic machine hardware */
3882	3184	MDRV_IMPORT_FROM( NBMJDRV2 )
3883	3185	MDRV_CPU_MODIFY("maincpu")
3884		MDRV_CPU_PROGRAM_MAP(readmem_ngpgal, writemem_ngpgal)
3885		MDRV_CPU_IO_MAP(readport_mjgottsu, writeport_mjgottsu)
	3186	MDRV_CPU_PROGRAM_MAP(ngpgal_map, 0)
	3187	MDRV_CPU_IO_MAP(mjgottsu_io_map, 0)
3886	3188	MACHINE_DRIVER_END
3887	3189
3888	3190
r4679	r4680
3891	3193	/* basic machine hardware */
3892	3194	MDRV_IMPORT_FROM( NBMJDRV2 )
3893	3195	MDRV_CPU_MODIFY("maincpu")
3894		MDRV_CPU_PROGRAM_MAP(readmem_ngpgal, writemem_ngpgal)
3895		MDRV_CPU_IO_MAP(readport_mjgottsu, writeport_mjgottsu)
	3196	MDRV_CPU_PROGRAM_MAP(ngpgal_map, 0)
	3197	MDRV_CPU_IO_MAP(mjgottsu_io_map, 0)
3896	3198	MACHINE_DRIVER_END
3897	3199
3898	3200
r4679	r4680
3901	3203	/* basic machine hardware */
3902	3204	MDRV_IMPORT_FROM( NBMJDRV2 )
3903	3205	MDRV_CPU_MODIFY("maincpu")
3904		MDRV_CPU_PROGRAM_MAP(readmem_ngpgal, writemem_ngpgal)
3905		MDRV_CPU_IO_MAP(readport_cmehyou, writeport_cmehyou)
	3206	MDRV_CPU_PROGRAM_MAP(ngpgal_map, 0)
	3207	MDRV_CPU_IO_MAP(cmehyou_io_map, 0)
3906	3208	MACHINE_DRIVER_END
3907	3209
3908	3210
r4679	r4680
3911	3213	/* basic machine hardware */
3912	3214	MDRV_IMPORT_FROM( NBMJDRV2 )
3913	3215	MDRV_CPU_MODIFY("maincpu")
3914		MDRV_CPU_PROGRAM_MAP(readmem_mjuraden, writemem_mjuraden)
3915		MDRV_CPU_IO_MAP(readport_mjkoiura, writeport_mjkoiura)
	3216	MDRV_CPU_PROGRAM_MAP(mjuraden_map, 0)
	3217	MDRV_CPU_IO_MAP(mjkoiura_io_map, 0)
3916	3218	MACHINE_DRIVER_END
3917	3219
3918	3220
r4679	r4680
3921	3223	/* basic machine hardware */
3922	3224	MDRV_IMPORT_FROM( NBMJDRV2 )
3923	3225	MDRV_CPU_MODIFY("maincpu")
3924		MDRV_CPU_PROGRAM_MAP(readmem_mjuraden, writemem_mjuraden)
3925		MDRV_CPU_IO_MAP(readport_mkoiuraa, writeport_mkoiuraa)
	3226	MDRV_CPU_PROGRAM_MAP(mjuraden_map, 0)
	3227	MDRV_CPU_IO_MAP(mkoiuraa_io_map, 0)
3926	3228	MACHINE_DRIVER_END
3927	3229
3928	3230
r4679	r4680
3931	3233	/* basic machine hardware */
3932	3234	MDRV_IMPORT_FROM( NBMJDRV3 )
3933	3235	MDRV_CPU_MODIFY("maincpu")
3934		MDRV_CPU_PROGRAM_MAP(readmem_mscoutm, writemem_mscoutm)
3935		MDRV_CPU_IO_MAP(readport_mscoutm, writeport_mscoutm)
	3236	MDRV_CPU_PROGRAM_MAP(mscoutm_map, 0)
	3237	MDRV_CPU_IO_MAP(mscoutm_io_map, 0)
3936	3238	MACHINE_DRIVER_END
3937	3239
3938	3240
r4679	r4680
3941	3243	/* basic machine hardware */
3942	3244	MDRV_IMPORT_FROM( NBMJDRV3 )
3943	3245	MDRV_CPU_MODIFY("maincpu")
3944		MDRV_CPU_PROGRAM_MAP(readmem_mjegolf, writemem_mjegolf)
3945		MDRV_CPU_IO_MAP(readport_imekura, writeport_imekura)
	3246	MDRV_CPU_PROGRAM_MAP(mjegolf_map, 0)
	3247	MDRV_CPU_IO_MAP(imekura_io_map, 0)
3946	3248	MACHINE_DRIVER_END
3947	3249
3948	3250
r4679	r4680
3951	3253	/* basic machine hardware */
3952	3254	MDRV_IMPORT_FROM( NBMJDRV3 )
3953	3255	MDRV_CPU_MODIFY("maincpu")
3954		MDRV_CPU_PROGRAM_MAP(readmem_mjegolf, writemem_mjegolf)
3955		MDRV_CPU_IO_MAP(readport_mjegolf, writeport_mjegolf)
	3256	MDRV_CPU_PROGRAM_MAP(mjegolf_map, 0)
	3257	MDRV_CPU_IO_MAP(mjegolf_io_map, 0)
3956	3258	MACHINE_DRIVER_END
3957	3259
3958	3260

src/mame/drivers/spool99.c

r4679	r4680
323	323	static DRIVER_INIT( spool99 )
324	324	{
325	325	UINT8 *ROM = memory_region(machine, "maincpu");
326		//  vram = auto_malloc(0x2000);
	326	//  vram = auto_alloc_array(machine, UINT8, 0x2000);
327	327	memcpy(spool99_main, ROM, 0xae00);
328	328	}
329	329

src/mame/drivers/sonson.c

r4679	r4680
71	71	if (last == 0 && data == 1)
72	72	{
73	73	/* setting bit 0 low then high triggers IRQ on the sound CPU */
74		cpu_set_input_line(space->machine->cpu[1],M6809_FIRQ_LINE,HOLD_LINE);
	74	cputag_set_input_line(space->machine, "audiocpu", M6809_FIRQ_LINE, HOLD_LINE);
75	75	}
76	76
77	77	last = data;

src/mame/drivers/sslam.c

r4679	r4680
396	396
397	397	static WRITE16_HANDLER( powerbls_sound_w )
398	398	{
399		soundlatch_w(space,0,data & 0xff);
400		cpu_set_input_line(space->machine->cpu[1],MCS51_INT1_LINE,HOLD_LINE);
	399	soundlatch_w(space, 0, data & 0xff);
	400	cputag_set_input_line(space->machine, "audiocpu", MCS51_INT1_LINE, HOLD_LINE);
401	401	}
402	402
403	403	/* Memory Maps */

src/mame/drivers/simpl156.c

r4679	r4680
530	530	{
531	531	UINT8 *rom = memory_region(machine, "okimusic");
532	532	int length = memory_region_length(machine, "okimusic");
533		UINT8 *buf1 = malloc_or_die(length);
	533	UINT8 *buf1 = alloc_array_or_die(UINT8, length);
534	534
535	535	UINT32 x;
536	536
r4679	r4680
1138	1138
1139	1139	static DRIVER_INIT (joemacr)
1140	1140	{
1141		memory_install_read32_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x0201018, 0x020101b, 0, 0, joemacr_speedup_r );
	1141	memory_install_read32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x0201018, 0x020101b, 0, 0, joemacr_speedup_r );
1142	1142	DRIVER_INIT_CALL(simpl156);
1143	1143	}
1144	1144
r4679	r4680
1150	1150
1151	1151	static DRIVER_INIT (chainrec)
1152	1152	{
1153		memory_install_read32_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x0201018, 0x020101b, 0, 0, chainrec_speedup_r );
	1153	memory_install_read32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x0201018, 0x020101b, 0, 0, chainrec_speedup_r );
1154	1154	DRIVER_INIT_CALL(simpl156);
1155	1155	simpl156_default_eeprom = chainrec_eeprom;
1156	1156	}
r4679	r4680
1163	1163
1164	1164	static DRIVER_INIT (prtytime)
1165	1165	{
1166		memory_install_read32_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x0201ae0, 0x0201ae3, 0, 0, prtytime_speedup_r );
	1166	memory_install_read32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x0201ae0, 0x0201ae3, 0, 0, prtytime_speedup_r );
1167	1167	DRIVER_INIT_CALL(simpl156);
1168	1168	simpl156_default_eeprom = prtytime_eeprom;
1169	1169	}
1170	1170
1171	1171	static DRIVER_INIT (gangonta)
1172	1172	{
1173		memory_install_read32_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x0201ae0, 0x0201ae3, 0, 0, prtytime_speedup_r );
	1173	memory_install_read32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x0201ae0, 0x0201ae3, 0, 0, prtytime_speedup_r );
1174	1174	DRIVER_INIT_CALL(simpl156);
1175	1175	simpl156_default_eeprom = gangonta_eeprom;
1176	1176	}
r4679	r4680
1184	1184
1185	1185	static DRIVER_INIT (charlien)
1186	1186	{
1187		memory_install_read32_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x0201010, 0x0201013, 0, 0, charlien_speedup_r );
	1187	memory_install_read32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x0201010, 0x0201013, 0, 0, charlien_speedup_r );
1188	1188	DRIVER_INIT_CALL(simpl156);
1189	1189	}
1190	1190
r4679	r4680
1196	1196
1197	1197	static DRIVER_INIT (osman)
1198	1198	{
1199		memory_install_read32_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x0201010, 0x0201013, 0, 0, osman_speedup_r );
	1199	memory_install_read32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x0201010, 0x0201013, 0, 0, osman_speedup_r );
1200	1200	DRIVER_INIT_CALL(simpl156);
1201	1201	simpl156_default_eeprom = osman_eeprom;
1202	1202
r4679	r4680
1204	1204
1205	1205	static DRIVER_INIT (candance)
1206	1206	{
1207		memory_install_read32_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x0201010, 0x0201013, 0, 0, osman_speedup_r );
	1207	memory_install_read32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x0201010, 0x0201013, 0, 0, osman_speedup_r );
1208	1208	DRIVER_INIT_CALL(simpl156);
1209	1209	simpl156_default_eeprom = candance_eeprom;
1210	1210	}

src/mame/drivers/lgp.c

r4679	r4680
317	317
318	318	static TIMER_CALLBACK( irq_stop )
319	319	{
320		cpu_set_input_line(machine->cpu[0], 0, CLEAR_LINE);
	320	cputag_set_input_line(machine, "maincpu", 0, CLEAR_LINE);
321	321	}
322	322
323	323	static INTERRUPT_GEN( vblank_callback_lgp )

src/mame/drivers/hcastle.c

r4679	r4680
38	38
39	39	static WRITE8_HANDLER( hcastle_soundirq_w )
40	40	{
41		cpu_set_input_line(space->machine->cpu[1], 0, HOLD_LINE );
	41	cputag_set_input_line(space->machine, "audiocpu", 0, HOLD_LINE );
42	42	}
43	43
44	44	static WRITE8_HANDLER( hcastle_coin_w )
r4679	r4680
49	49
50	50
51	51
52		static ADDRESS_MAP_START( readmem, ADDRESS_SPACE_PROGRAM, 8 )
53		AM_RANGE(0x0020, 0x003f) AM_READ(SMH_RAM)
54		AM_RANGE(0x0220, 0x023f) AM_READ(SMH_RAM)
55		AM_RANGE(0x0410, 0x0410) AM_READ_PORT("SYSTEM")
56		AM_RANGE(0x0411, 0x0411) AM_READ_PORT("P1")
57		AM_RANGE(0x0412, 0x0412) AM_READ_PORT("P2")
58		AM_RANGE(0x0413, 0x0413) AM_READ_PORT("DSW3")
59		AM_RANGE(0x0414, 0x0414) AM_READ_PORT("DSW2")
60		AM_RANGE(0x0415, 0x0415) AM_READ_PORT("DSW1")
61		AM_RANGE(0x0418, 0x0418) AM_READ(hcastle_gfxbank_r)
62		AM_RANGE(0x0600, 0x06ff) AM_READ(SMH_RAM)
63		AM_RANGE(0x0700, 0x5fff) AM_READ(SMH_RAM)
64		AM_RANGE(0x6000, 0x7fff) AM_READ(SMH_BANK1)
65		AM_RANGE(0x8000, 0xffff) AM_READ(SMH_ROM)
66		ADDRESS_MAP_END
67
68		static ADDRESS_MAP_START( writemem, ADDRESS_SPACE_PROGRAM, 8 )
	52	static ADDRESS_MAP_START( hcastle_map, ADDRESS_SPACE_PROGRAM, 8 )
69	53	AM_RANGE(0x0000, 0x0007) AM_WRITE(hcastle_pf1_control_w)
70		AM_RANGE(0x0020, 0x003f) AM_WRITE(SMH_RAM)   /* rowscroll? */
	54	AM_RANGE(0x0020, 0x003f) AM_RAM   /* rowscroll? */
71	55	AM_RANGE(0x0200, 0x0207) AM_WRITE(hcastle_pf2_control_w)
72		AM_RANGE(0x0220, 0x023f) AM_WRITE(SMH_RAM)   /* rowscroll? */
	56	AM_RANGE(0x0220, 0x023f) AM_RAM /* rowscroll? */
73	57	AM_RANGE(0x0400, 0x0400) AM_WRITE(hcastle_bankswitch_w)
74	58	AM_RANGE(0x0404, 0x0404) AM_WRITE(soundlatch_w)
75	59	AM_RANGE(0x0408, 0x0408) AM_WRITE(hcastle_soundirq_w)
76	60	AM_RANGE(0x040c, 0x040c) AM_WRITE(watchdog_reset_w)
77		AM_RANGE(0x0410, 0x0410) AM_WRITE(hcastle_coin_w)
78		AM_RANGE(0x0418, 0x0418) AM_WRITE(hcastle_gfxbank_w)
79		AM_RANGE(0x0600, 0x06ff) AM_WRITE(SMH_RAM) AM_BASE(&paletteram)
80		AM_RANGE(0x0700, 0x1fff) AM_WRITE(SMH_RAM)
81		AM_RANGE(0x2000, 0x2fff) AM_WRITE(hcastle_pf1_video_w) AM_BASE(&hcastle_pf1_videoram)
82		AM_RANGE(0x3000, 0x3fff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
83		AM_RANGE(0x4000, 0x4fff) AM_WRITE(hcastle_pf2_video_w) AM_BASE(&hcastle_pf2_videoram)
84		AM_RANGE(0x5000, 0x5fff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram_2) AM_SIZE(&spriteram_2_size)
85		AM_RANGE(0x6000, 0xffff) AM_WRITE(SMH_ROM)
	61	AM_RANGE(0x0410, 0x0410) AM_READ_PORT("SYSTEM") AM_WRITE(hcastle_coin_w)
	62	AM_RANGE(0x0411, 0x0411) AM_READ_PORT("P1")
	63	AM_RANGE(0x0412, 0x0412) AM_READ_PORT("P2")
	64	AM_RANGE(0x0413, 0x0413) AM_READ_PORT("DSW3")
	65	AM_RANGE(0x0414, 0x0414) AM_READ_PORT("DSW2")
	66	AM_RANGE(0x0415, 0x0415) AM_READ_PORT("DSW1")
	67	AM_RANGE(0x0418, 0x0418) AM_READWRITE(hcastle_gfxbank_r, hcastle_gfxbank_w)
	68	AM_RANGE(0x0600, 0x06ff) AM_RAM AM_BASE(&paletteram)
	69	AM_RANGE(0x0700, 0x1fff) AM_RAM
	70	AM_RANGE(0x2000, 0x2fff) AM_RAM_WRITE(hcastle_pf1_video_w) AM_BASE(&hcastle_pf1_videoram)
	71	AM_RANGE(0x3000, 0x3fff) AM_RAM AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
	72	AM_RANGE(0x4000, 0x4fff) AM_RAM_WRITE(hcastle_pf2_video_w) AM_BASE(&hcastle_pf2_videoram)
	73	AM_RANGE(0x5000, 0x5fff) AM_RAM AM_BASE(&spriteram_2) AM_SIZE(&spriteram_2_size)
	74	AM_RANGE(0x6000, 0x7fff) AM_ROMBANK(1)
	75	AM_RANGE(0x8000, 0xffff) AM_ROM
86	76	ADDRESS_MAP_END
87	77
88	78	/*****************************************************************************/
r4679	r4680
94	84	k007232_set_bank(device, bank_A, bank_B );
95	85	}
96	86
97		static ADDRESS_MAP_START( sound_readmem, ADDRESS_SPACE_PROGRAM, 8 )
98		AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM)
99		AM_RANGE(0x8000, 0x87ff) AM_READ(SMH_RAM)
100		AM_RANGE(0xa000, 0xa001) AM_DEVREAD("ym", ym3812_r)
101		AM_RANGE(0xb000, 0xb00d) AM_DEVREAD("konami1", k007232_r)
102		AM_RANGE(0xd000, 0xd000) AM_READ(soundlatch_r)
103		ADDRESS_MAP_END
104
105		static ADDRESS_MAP_START( sound_writemem, ADDRESS_SPACE_PROGRAM, 8 )
106		AM_RANGE(0x0000, 0x7fff) AM_WRITE(SMH_ROM)
107		AM_RANGE(0x8000, 0x87ff) AM_WRITE(SMH_RAM)
	87	static ADDRESS_MAP_START( sound_map, ADDRESS_SPACE_PROGRAM, 8 )
	88	AM_RANGE(0x0000, 0x7fff) AM_ROM
	89	AM_RANGE(0x8000, 0x87ff) AM_RAM
108	90	AM_RANGE(0x9800, 0x987f) AM_DEVWRITE("konami2", k051649_waveform_w)
109	91	AM_RANGE(0x9880, 0x9889) AM_DEVWRITE("konami2", k051649_frequency_w)
110	92	AM_RANGE(0x988a, 0x988e) AM_DEVWRITE("konami2", k051649_volume_w)
111	93	AM_RANGE(0x988f, 0x988f) AM_DEVWRITE("konami2", k051649_keyonoff_w)
112		AM_RANGE(0xa000, 0xa001) AM_DEVWRITE("ym", ym3812_w)
113		AM_RANGE(0xb000, 0xb00d) AM_DEVWRITE("konami1", k007232_w)
	94	AM_RANGE(0xa000, 0xa001) AM_DEVREADWRITE("ym", ym3812_r, ym3812_w)
	95	AM_RANGE(0xb000, 0xb00d) AM_DEVREADWRITE("konami1", k007232_r, k007232_w)
114	96	AM_RANGE(0xc000, 0xc000) AM_DEVWRITE("konami1", sound_bank_w) /* 7232 bankswitch */
	97	AM_RANGE(0xd000, 0xd000) AM_READ(soundlatch_r)
115	98	ADDRESS_MAP_END
116	99
117	100	/*****************************************************************************/
r4679	r4680
190	173
191	174	static void irqhandler(const device_config *device, int linestate)
192	175	{
193		//  cpu_set_input_line(device->machine->cpu[1],0,linestate);
	176	//  cputag_set_input_line(device->machine, "audiocpu", 0, linestate);
194	177	}
195	178
196	179	static void volume_callback(const device_config *device, int v)
r4679	r4680
213	196
214	197	/* basic machine hardware */
215	198	MDRV_CPU_ADD("maincpu", KONAMI, 3000000)   /* Derived from 24 MHz clock */
216		MDRV_CPU_PROGRAM_MAP(readmem,writemem)
	199	MDRV_CPU_PROGRAM_MAP(hcastle_map,0)
217	200	MDRV_CPU_VBLANK_INT("screen", irq0_line_hold)
218	201
219	202	MDRV_CPU_ADD("audiocpu", Z80, 3579545)
220		MDRV_CPU_PROGRAM_MAP(sound_readmem,sound_writemem)
	203	MDRV_CPU_PROGRAM_MAP(sound_map,0)
221	204
222	205	/* video hardware */
223	206	MDRV_VIDEO_ATTRIBUTES(VIDEO_BUFFERS_SPRITERAM)

src/mame/drivers/deadang.c

r4679	r4680
411	411	seibu_sound_decrypt(machine, "audiocpu", 0x2000);
412	412	seibu_adpcm_decrypt(machine, "adpcm");
413	413
414		memory_install_read16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x80000, 0x80001, 0, 0, ghunter_trackball_low_r);
415		memory_install_read16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xb0000, 0xb0001, 0, 0, ghunter_trackball_high_r);
	414	memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x80000, 0x80001, 0, 0, ghunter_trackball_low_r);
	415	memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xb0000, 0xb0001, 0, 0, ghunter_trackball_high_r);
416	416	}
417	417
418	418	/* Game Drivers */

src/mame/drivers/cliffhgr.c

r4679	r4680
137	137	static READ8_HANDLER( cliff_irq_ack_r )
138	138	{
139	139	/* deassert IRQ on the CPU */
140		cpu_set_input_line(space->machine->cpu[0], 0, CLEAR_LINE);
	140	cputag_set_input_line(space->machine, "maincpu", 0, CLEAR_LINE);
141	141
142	142	return 0x00;
143	143	}
r4679	r4680
197	197
198	198	/* if we have a valid code, trigger an IRQ */
199	199	if ( phillips_code & 0x800000 )
200		cpu_set_input_line(machine->cpu[0], 0, ASSERT_LINE);
	200	cputag_set_input_line(machine, "maincpu", 0, ASSERT_LINE);
201	201
202	202	timer_adjust_oneshot(irq_timer, video_screen_get_time_until_pos(machine->primary_screen, param, 0), param);
203	203	}
204	204
205	205	static void vdp_interrupt (running_machine *machine, int state)
206	206	{
207		cpu_set_input_line(machine->cpu[0], INPUT_LINE_NMI, state ? ASSERT_LINE : CLEAR_LINE );
	207	cputag_set_input_line(machine, "maincpu", INPUT_LINE_NMI, state ? ASSERT_LINE : CLEAR_LINE );
208	208	}
209	209
210	210

src/mame/drivers/artmagic.c

r4679	r4680
57	57
58	58	static void update_irq_state(running_machine *machine)
59	59	{
60		cpu_set_input_line(machine->cpu[0], 4, tms_irq  ? ASSERT_LINE : CLEAR_LINE);
61		cpu_set_input_line(machine->cpu[0], 5, hack_irq ? ASSERT_LINE : CLEAR_LINE);
	60	cputag_set_input_line(machine, "maincpu", 4, tms_irq  ? ASSERT_LINE : CLEAR_LINE);
	61	cputag_set_input_line(machine, "maincpu", 5, hack_irq ? ASSERT_LINE : CLEAR_LINE);
62	62	}
63	63
64	64
r4679	r4680
93	93
94	94	static READ16_HANDLER( tms_host_r )
95	95	{
96		return tms34010_host_r(space->machine->cpu[1], offset);
	96	return tms34010_host_r(cputag_get_cpu(space->machine, "tms"), offset);
97	97	}
98	98
99	99
100	100	static WRITE16_HANDLER( tms_host_w )
101	101	{
102		tms34010_host_w(space->machine->cpu[1], offset, data);
	102	tms34010_host_w(cputag_get_cpu(space->machine, "tms"), offset, data);
103	103	}
104	104
105	105
r4679	r4680
890	890	protection_handler = ultennis_protection;
891	891
892	892	/* additional (protection?) hack */
893		memory_install_read16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x300000, 0x300001, 0, 0, ultennis_hack_r);
	893	memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x300000, 0x300001, 0, 0, ultennis_hack_r);
894	894	}
895	895
896	896

src/mame/drivers/cntsteer.c

r4679	r4680
386	386
387	387	static WRITE8_HANDLER( gekitsui_sub_irq_ack )
388	388	{
389		cpu_set_input_line(space->machine->cpu[1], M6809_IRQ_LINE, CLEAR_LINE);
	389	cputag_set_input_line(space->machine, "subcpu", M6809_IRQ_LINE, CLEAR_LINE);
390	390	}
391	391
392	392	static WRITE8_HANDLER( cntsteer_sound_w )
393	393	{
394	394	soundlatch_w(space,0,data);
395		cpu_set_input_line(space->machine->cpu[2], 0, HOLD_LINE);
	395	cputag_set_input_line(space->machine, "audiocpu", 0, HOLD_LINE);
396	396	}
397	397
398	398	static WRITE8_HANDLER( zerotrgt_ctrl_w )
399	399	{
400	400	/*TODO: check this.*/
401	401	logerror("CTRL: %04x: %04x: %04x\n",cpu_get_pc(space->cpu),offset,data);
402		//  if (offset==0) cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_RESET, ASSERT_LINE);
	402	//  if (offset==0) cputag_set_input_line(space->machine, "subcpu", INPUT_LINE_RESET, ASSERT_LINE);
403	403
404	404	// Wrong - bits 0 & 1 used on this
405		if (offset==1) cpu_set_input_line(space->machine->cpu[1], M6809_IRQ_LINE, ASSERT_LINE);
406		//  if (offset==2) cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_RESET, CLEAR_LINE);
	405	if (offset==1) cputag_set_input_line(space->machine, "subcpu", M6809_IRQ_LINE, ASSERT_LINE);
	406	//  if (offset==2) cputag_set_input_line(space->machine, "subcpu", INPUT_LINE_RESET, CLEAR_LINE);
407	407	}
408	408
409	409	static WRITE8_HANDLER( cntsteer_sub_irq_w )
410	410	{
411		cpu_set_input_line(space->machine->cpu[1], M6809_IRQ_LINE, ASSERT_LINE);
	411	cputag_set_input_line(space->machine, "subcpu", M6809_IRQ_LINE, ASSERT_LINE);
412	412	//  printf("%02x IRQ\n",data);
413	413	}
414	414
415	415	static WRITE8_HANDLER( cntsteer_sub_nmi_w )
416	416	{
417	417	//  if(data)
418		//  cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_NMI, PULSE_LINE);
	418	//  cputag_set_input_line(space->machine, "subcpu", INPUT_LINE_NMI, PULSE_LINE);
419	419	//  popmessage("%02x",data);
420	420	}
421	421
422	422	static WRITE8_HANDLER( cntsteer_main_irq_w )
423	423	{
424		cpu_set_input_line(space->machine->cpu[0], M6809_IRQ_LINE, HOLD_LINE);
	424	cputag_set_input_line(space->machine, "maincpu", M6809_IRQ_LINE, HOLD_LINE);
425	425	}
426	426
427	427	/* Convert weird input handling with MAME standards.*/
r4679	r4680
588	588
589	589	static INPUT_CHANGED( coin_inserted )
590	590	{
591		cpu_set_input_line(field->port->machine->cpu[1], INPUT_LINE_NMI, newval ? CLEAR_LINE : PULSE_LINE);
	591	cputag_set_input_line(field->port->machine, "subcpu", INPUT_LINE_NMI, newval ? CLEAR_LINE : ASSERT_LINE);
592	592	}
593	593
594	594	static INPUT_PORTS_START( cntsteer )
r4679	r4680
609	609	PORT_BIT( 0xff, 0x80, IPT_AD_STICK_X ) PORT_MINMAX(0x01,0xff) PORT_SENSITIVITY(10) PORT_KEYDELTA(2)
610	610
611	611	PORT_START("COINS")
612		PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_CHANGED(coin_inserted, 0)
613		PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_COIN2 ) PORT_CHANGED(coin_inserted, 0)
614		PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_SERVICE1 ) PORT_CHANGED(coin_inserted, 0)
	612	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_IMPULSE(1) PORT_CHANGED(coin_inserted, 0)
	613	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_COIN2 ) PORT_IMPULSE(1) PORT_CHANGED(coin_inserted, 0)
	614	PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_SERVICE1 ) PORT_IMPULSE(1) PORT_CHANGED(coin_inserted, 0)
615	615	PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) ) //unused
616	616	PORT_DIPSETTING(    0x08, DEF_STR( Off ) )
617	617	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
r4679	r4680
738	738	MDRV_CPU_PROGRAM_MAP(cntsteer_cpu1_map,0)
739	739	MDRV_CPU_VBLANK_INT("screen", nmi_line_pulse) /* ? */
740	740
741		MDRV_CPU_ADD("sub", M6809, 2000000)       /* ? */
	741	MDRV_CPU_ADD("subcpu", M6809, 2000000)       /* ? */
742	742	MDRV_CPU_PROGRAM_MAP(cntsteer_cpu2_map,0)
743	743	//  MDRV_CPU_VBLANK_INT("screen", nmi_line_pulse) /* ? */
744	744
r4679	r4680
781	781	MDRV_CPU_PROGRAM_MAP(gekitsui_cpu1_map,0)
782	782	MDRV_CPU_VBLANK_INT("screen", nmi_line_pulse) /* ? */
783	783
784		MDRV_CPU_ADD("sub", M6809, 2000000)       /* ? */
	784	MDRV_CPU_ADD("subcpu", M6809, 2000000)       /* ? */
785	785	MDRV_CPU_PROGRAM_MAP(gekitsui_cpu2_map,0)
786	786	//  MDRV_CPU_VBLANK_INT("screen", nmi_line_pulse) /* ? */
787	787
r4679	r4680
825	825	ROM_LOAD( "by02", 0x8000, 0x4000, CRC(b6fdd7fd) SHA1(e54cc31628966f747f9ccbf9db1017ed1eee0d5d) )
826	826	ROM_LOAD( "by01", 0xc000, 0x4000, CRC(932423a5) SHA1(0d8164359a79ae554328dfb4d729a8d07de7ee75) )
827	827
828		ROM_REGION( 0x10000, "sub", 0 )
	828	ROM_REGION( 0x10000, "subcpu", 0 )
829	829	ROM_LOAD( "by12", 0x4000, 0x4000, CRC(278e7fed) SHA1(5def4c8919a507c64045c57de2da65e1d39e1185) )
830	830	ROM_LOAD( "by11", 0x8000, 0x4000, CRC(00624e34) SHA1(27bd472e9f2feef4a2c4753d8b0da26ff30d930d) )
831	831	ROM_LOAD( "by10", 0xc000, 0x4000, CRC(9227a9ce) SHA1(8c86f22f90a3a8853562469037ffa06693045f4c) )
r4679	r4680
867	867	ROM_REGION( 0x10000, "maincpu", 0 )
868	868	ROM_LOAD( "ct01-s.4c", 0x8000, 0x8000, CRC(b35a16cb) SHA1(49581324c3e3d5219f0512d08a40161185368b10) )
869	869
870		ROM_REGION( 0x10000, "sub", 0 )
	870	ROM_REGION( 0x10000, "subcpu", 0 )
871	871	ROM_LOAD( "ct08.16a",  0x4000, 0x4000,  CRC(7e8db408) SHA1(2ae407d15645753a2a0d691c9f1cf1eb383d3e8a) )
872	872	ROM_LOAD( "cty07.14a", 0x8000, 0x4000,  CRC(119b6211) SHA1(2042f06387d34fad6b63bcb8ac6f9b06377f634d) )
873	873	ROM_LOAD( "ct06.13a",  0xc000, 0x4000,  CRC(bce5adad) SHA1(86c4eef0d68679a24bab6460b49640a498f32ecd) )
r4679	r4680
910	910	ROM_REGION( 0x10000, "maincpu", 0 )
911	911	ROM_LOAD( "ct01", 0x8000, 0x8000, CRC(d3d82d8d) SHA1(c175c626d4cb89a2d82740c04892092db6faf616) )
912	912
913		ROM_REGION( 0x10000, "sub", 0 )
	913	ROM_REGION( 0x10000, "subcpu", 0 )
914	914	ROM_LOAD( "ct08.16a",  0x4000, 0x4000,  CRC(7e8db408) SHA1(2ae407d15645753a2a0d691c9f1cf1eb383d3e8a) )
915	915	ROM_LOAD( "cty07.14a", 0x8000, 0x4000,  CRC(119b6211) SHA1(2042f06387d34fad6b63bcb8ac6f9b06377f634d) )
916	916	ROM_LOAD( "ct06.13a",  0xc000, 0x4000,  CRC(bce5adad) SHA1(86c4eef0d68679a24bab6460b49640a498f32ecd) )
r4679	r4680
974	974	#if 0
975	975	static void init_cntsteer(void)
976	976	{
977		UINT8 *RAM = memory_region(machine, "sub");
	977	UINT8 *RAM = memory_region(machine, "subcpu");
978	978
979	979	RAM[0xc2cf]=0x43; /* Patch out Cpu 1 ram test - it never ends..?! */
980	980	RAM[0xc2d0]=0x43;

src/mame/drivers/twincobr.c

r4679	r4680
690	690	/* handler called by the 3812 emulator when the internal timers cause an IRQ */
691	691	static void irqhandler(const device_config *device, int linestate)
692	692	{
693		cpu_set_input_line(device->machine->cpu[1],0,linestate);
	693	cputag_set_input_line(device->machine, "audiocpu", 0, linestate);
694	694	}
695	695
696	696	static const ym3812_interface ym3812_config =

src/mame/drivers/hexion.c

r4679	r4680
113	113
114	114
115	115
116		static ADDRESS_MAP_START( readmem, ADDRESS_SPACE_PROGRAM, 8 )
117		AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM)
118		AM_RANGE(0x8000, 0x9fff) AM_READ(SMH_BANK1)
119		AM_RANGE(0xa000, 0xbfff) AM_READ(SMH_RAM)
120		AM_RANGE(0xc000, 0xdffe) AM_READ(hexion_bankedram_r)
121		AM_RANGE(0xf400, 0xf400) AM_READ_PORT("DSW1")
122		AM_RANGE(0xf401, 0xf401) AM_READ_PORT("DSW2")
123		AM_RANGE(0xf402, 0xf402) AM_READ_PORT("P1")
124		AM_RANGE(0xf403, 0xf403) AM_READ_PORT("P2")
125		AM_RANGE(0xf440, 0xf440) AM_READ_PORT("DSW3")
126		AM_RANGE(0xf441, 0xf441) AM_READ_PORT("SYSTEM")
127		AM_RANGE(0xf540, 0xf540) AM_READ(watchdog_reset_r)
128		ADDRESS_MAP_END
129
130		static ADDRESS_MAP_START( writemem, ADDRESS_SPACE_PROGRAM, 8 )
131		AM_RANGE(0x0000, 0x7fff) AM_WRITE(SMH_ROM)
132		AM_RANGE(0xa000, 0xbfff) AM_WRITE(SMH_RAM)
133		AM_RANGE(0xc000, 0xdffe) AM_WRITE(hexion_bankedram_w)
	116	static ADDRESS_MAP_START( hexion_map, ADDRESS_SPACE_PROGRAM, 8 )
	117	AM_RANGE(0x0000, 0x7fff) AM_ROM
	118	AM_RANGE(0x8000, 0x9fff) AM_ROMBANK(1)
	119	AM_RANGE(0xa000, 0xbfff) AM_RAM
	120	AM_RANGE(0xc000, 0xdffe) AM_READWRITE(hexion_bankedram_r, hexion_bankedram_w)
134	121	AM_RANGE(0xdfff, 0xdfff) AM_WRITE(hexion_bankctrl_w)
135	122	AM_RANGE(0xe800, 0xe87f) AM_DEVWRITE("konami", k051649_waveform_w)
136	123	AM_RANGE(0xe880, 0xe889) AM_DEVWRITE("konami", k051649_frequency_w)
r4679	r4680
138	125	AM_RANGE(0xe88f, 0xe88f) AM_DEVWRITE("konami", k051649_keyonoff_w)
139	126	AM_RANGE(0xf000, 0xf00f) AM_WRITENOP   /* 053252? f00e = IRQ ack, f00f = NMI ack */
140	127	AM_RANGE(0xf200, 0xf200) AM_DEVWRITE("oki", okim6295_w)
	128	AM_RANGE(0xf400, 0xf400) AM_READ_PORT("DSW1")
	129	AM_RANGE(0xf401, 0xf401) AM_READ_PORT("DSW2")
	130	AM_RANGE(0xf402, 0xf402) AM_READ_PORT("P1")
	131	AM_RANGE(0xf403, 0xf403) AM_READ_PORT("P2")
	132	AM_RANGE(0xf440, 0xf440) AM_READ_PORT("DSW3")
	133	AM_RANGE(0xf441, 0xf441) AM_READ_PORT("SYSTEM")
141	134	AM_RANGE(0xf480, 0xf480) AM_WRITE(hexion_bankswitch_w)
142	135	AM_RANGE(0xf4c0, 0xf4c0) AM_WRITE(coincntr_w)
143	136	AM_RANGE(0xf500, 0xf500) AM_WRITE(hexion_gfxrom_select_w)
	137	AM_RANGE(0xf540, 0xf540) AM_READ(watchdog_reset_r)
144	138	ADDRESS_MAP_END
145	139
146	140
r4679	r4680
237	231
238	232	/* basic machine hardware */
239	233	MDRV_CPU_ADD("maincpu", Z80,24000000/4)   /* Z80B 6 MHz */
240		MDRV_CPU_PROGRAM_MAP(readmem,writemem)
	234	MDRV_CPU_PROGRAM_MAP(hexion_map,0)
241	235	MDRV_CPU_VBLANK_INT_HACK(hexion_interrupt,3)   /* both IRQ and NMI are used */
242	236
243	237	/* video hardware */

src/mame/drivers/bking.c

r4679	r4680
70	70	if (data & (1 << i)) code |= 0x80 >> i;
71	71
72	72	soundlatch_w(space,offset,code);
73		if (sndnmi_enable) cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_NMI, PULSE_LINE);
	73	if (sndnmi_enable) cputag_set_input_line(space->machine, "audiocpu", INPUT_LINE_NMI, PULSE_LINE);
74	74	}
75	75
76	76	static WRITE8_HANDLER( bking3_addr_l_w )
r4679	r4680
199	199	if (~data & 0x02)
200	200	{
201	201	portA_in = from_main;
202		if (main_sent) cpu_set_input_line(space->machine->cpu[2],0,CLEAR_LINE);
	202	if (main_sent) cputag_set_input_line(space->machine, "mcu", 0, CLEAR_LINE);
203	203	main_sent = 0;
204	204	}
205	205

src/mame/drivers/battlnts.c

r4679	r4680
30	30
31	31	static WRITE8_HANDLER( battlnts_sh_irqtrigger_w )
32	32	{
33		cpu_set_input_line_and_vector(space->machine->cpu[1], 0, HOLD_LINE, 0xff);
	33	cputag_set_input_line_and_vector(space->machine, "audiocpu", 0, HOLD_LINE, 0xff);
34	34	}
35	35
36	36	static WRITE8_HANDLER( battlnts_bankswitch_w )

src/mame/drivers/dblewing.c

r4679	r4680
364	364	//printf("%04x\n",dblwings_280_data);
365	365	return;
366	366	case 0x380: // sound write
367		soundlatch_w(space,0,data&0xff);
	367	soundlatch_w(space, 0, data & 0xff);
368	368	dblewing_sound_irq |= 0x02;
369		cpu_set_input_line(space->machine->cpu[1],0,(dblewing_sound_irq != 0) ? ASSERT_LINE : CLEAR_LINE);
	369	cputag_set_input_line(space->machine, "audiocpu", 0, (dblewing_sound_irq != 0) ? ASSERT_LINE : CLEAR_LINE);
370	370	return;
371	371	case 0x384:
372	372	dblwings_384_data = data;
r4679	r4680
461	461	{
462	462	/* bit 1 of dblewing_sound_irq specifies IRQ command writes */
463	463	dblewing_sound_irq &= ~0x02;
464		cpu_set_input_line(space->machine->cpu[1], 0, (dblewing_sound_irq != 0) ? ASSERT_LINE : CLEAR_LINE);
	464	cputag_set_input_line(space->machine, "audiocpu", 0, (dblewing_sound_irq != 0) ? ASSERT_LINE : CLEAR_LINE);
465	465	return dblewing_sound_irq;
466	466	}
467	467
r4679	r4680
654	654	dblewing_sound_irq |= 0x01;
655	655	else
656	656	dblewing_sound_irq &= ~0x01;
657		cpu_set_input_line(device->machine->cpu[1], 0, (dblewing_sound_irq != 0) ? ASSERT_LINE : CLEAR_LINE);
	657	cputag_set_input_line(device->machine, "audiocpu", 0, (dblewing_sound_irq != 0) ? ASSERT_LINE : CLEAR_LINE);
658	658	}
659	659
660	660	static const ym2151_interface ym2151_config =

src/mame/drivers/multfish.c

r4679	r4680
80	80
81	81	static VIDEO_START(multfish)
82	82	{
83		multfish_vid = auto_malloc(multfish_VIDRAM_SIZE);
	83	multfish_vid = auto_alloc_array(machine, UINT8, multfish_VIDRAM_SIZE);
84	84	memset(multfish_vid,0x00,multfish_VIDRAM_SIZE);
85	85	state_save_register_global_pointer(machine, multfish_vid, multfish_VIDRAM_SIZE);
86	86
87		multfish_bram = auto_malloc(multfish_BRAM_SIZE);
	87	multfish_bram = auto_alloc_array(machine, UINT8, multfish_BRAM_SIZE);
88	88	memset(multfish_bram,0x00,multfish_BRAM_SIZE);
89	89	state_save_register_global_pointer(machine, multfish_bram, multfish_BRAM_SIZE);
90	90
r4679	r4680
210	210
211	211	static ADDRESS_MAP_START( multfish_map, ADDRESS_SPACE_PROGRAM, 8 )
212	212	AM_RANGE(0x0000, 0x7fff) AM_READWRITE(SMH_ROM, multfish_vid_w)
213		AM_RANGE(0x8000, 0xbfff) AM_READWRITE(SMH_BANK1, SMH_ROM )
	213	AM_RANGE(0x8000, 0xbfff) AM_READWRITE(SMH_BANK(1), SMH_ROM )
214	214	AM_RANGE(0xc000, 0xdfff) AM_RAM AM_BASE(&generic_nvram) AM_SIZE(&generic_nvram_size)
215	215	AM_RANGE(0xe000, 0xffff) AM_READWRITE(bankedram_r, bankedram_w)
216	216	ADDRESS_MAP_END

src/mame/drivers/galpani2.c

r4679	r4680
1		/***************************************************************************
	1	/***************************************************************************
2	2
3	3	-= Gals Panic II =-
4	4
r4679	r4680
77	77
78	78	kaneko16_sprite_xoffs = 0x10000 - 0x16c0 + 0xc00;
79	79	kaneko16_sprite_yoffs = 0x000;
	80	cpuexec_boost_interleave(machine, attotime_zero, ATTOTIME_IN_USEC(50)); //initial mcu xchk
80	81	}
81	82
82		static void galpani2_write_kaneko(running_machine *machine)
	83	static void galpani2_write_kaneko(const device_config *device)
83	84	{
84		const address_space *dstspace = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM);
85		memory_write_byte(dstspace,0x100000,0x4b);
86		memory_write_byte(dstspace,0x100001,0x41);
87		memory_write_byte(dstspace,0x100002,0x4e);
88		memory_write_byte(dstspace,0x100003,0x45);
89		memory_write_byte(dstspace,0x100004,0x4b);
90		memory_write_byte(dstspace,0x100005,0x4f);
91		}
	85	const address_space *dstspace = cpu_get_address_space(device, ADDRESS_SPACE_PROGRAM);
	86	int i,x,tpattidx;
	87	unsigned char testpattern[] = {0xFF,0x55,0xAA,0xDD,0xBB,0x99};
92	88
93		void galpani2_mcu_run(running_machine *machine)
94		{
95		const address_space *srcspace = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM);
96		const address_space *dstspace = cpu_get_address_space(machine->cpu[1], ADDRESS_SPACE_PROGRAM);
97		int i,x;
98
99	89	/* Write "KANEKO" to 100000-100005, but do not clash with ram test */
100	90
101	91	x  = 0;
102	92
103	93	for (i = 0x100000; i < 0x100007; i++)
104		x |= memory_read_byte(srcspace,i);
	94	{
	95	for (tpattidx = 0; tpattidx < 6; tpattidx++)
	96	{
	97	if (memory_read_byte(dstspace,i) == testpattern[tpattidx]) x = 1; //ram test fragment present
	98	}
	99	}
105	100
106	101	if   ( x == 0 )
107	102	{
108		galpani2_write_kaneko(machine);
109		memory_write_byte(dstspace,0x100006,1);
110		logerror("MCU executes CHECK0\n");
	103	memory_write_byte(dstspace,0x100000,0x4b); //K
	104	memory_write_byte(dstspace,0x100001,0x41); //A
	105	memory_write_byte(dstspace,0x100002,0x4e); //N
	106	memory_write_byte(dstspace,0x100003,0x45); //E
	107	memory_write_byte(dstspace,0x100004,0x4b); //K
	108	memory_write_byte(dstspace,0x100005,0x4f); //O
111	109	}
112	110	}
113	111
114		static void galpani2_mcu_nmi(running_machine *machine)
	112	static WRITE8_HANDLER( galpani2_mcu_init_w )
115	113	{
116		const address_space *srcspace = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM);
117		const address_space *dstspace = cpu_get_address_space(machine->cpu[1], ADDRESS_SPACE_PROGRAM);
118		UINT32 mcu_list, mcu_command, mcu_address, mcu_src, mcu_dst, mcu_size;
	114	running_machine *machine = space->machine;
	115	const address_space *srcspace = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	116	const address_space *dstspace = cputag_get_address_space(machine, "sub", ADDRESS_SPACE_PROGRAM);
	117	UINT32 mcu_address, mcu_data;
119	118
120		/* "Last Check" */
121		galpani2_write_kaneko(machine);
	119	for ( mcu_address = 0x100010; mcu_address < (0x100010 + 6); mcu_address += 1 )
	120	{
	121	mcu_data   =   memory_read_byte(srcspace, mcu_address );
	122	memory_write_byte(dstspace, mcu_address-0x10, mcu_data);
	123	}
	124	cputag_set_input_line(machine, "sub", INPUT_LINE_IRQ7, HOLD_LINE); //MCU Initialised
	125	}
122	126
123		for ( mcu_list = 0x100020; mcu_list < (0x100020 + 0x40); mcu_list += 4 )
	127	static void galpani2_mcu_nmi1(running_machine *machine)
	128	{
	129	const address_space *srcspace = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	130	const address_space *dstspace = cputag_get_address_space(machine, "sub", ADDRESS_SPACE_PROGRAM);
	131	UINT32 mcu_list, mcu_command, mcu_address, mcu_extra, mcu_src, mcu_dst, mcu_size;
	132
	133	for ( mcu_list = 0x100021; mcu_list < (0x100021 + 0x40); mcu_list += 4 )
124	134	{
125		mcu_command      =   memory_read_byte(srcspace, mcu_list + 1 );
	135	mcu_command      =   memory_read_byte(srcspace, mcu_list);
126	136
127	137	mcu_address      =   0x100000 +
128		(memory_read_byte(srcspace, mcu_list + 2)<<8) +
129		(memory_read_byte(srcspace, mcu_list + 3)<<0) ;
	138	(memory_read_byte(srcspace, mcu_list + 1)<<8) +
	139	(memory_read_byte(srcspace, mcu_list + 2)<<0) ;
130	140
	141	mcu_extra      =   memory_read_byte(srcspace, mcu_list + 3); //0xff for command $A and $2, 0x02 for others
	142
	143	if (mcu_command != 0)
	144	{
	145	logerror("%s : MCU [$%06X] endidx = $%02X / command = $%02X addr = $%04X ? = $%02X.\n",
	146	cpuexec_describe_context(machine),
	147	mcu_list,
	148	memory_read_byte(srcspace, 0x100020),
	149	mcu_command,
	150	mcu_address,
	151	mcu_extra
	152	);
	153	}
	154
131	155	switch (mcu_command)
132	156	{
133	157	case 0x00:
134	158	break;
135	159
136		//case 0x02: //?, gp2se is the only one to use it, often!
137		//  break;
	160	case 0x02: //Copy N bytes from RAM2 to RAM1?, gp2se is the only one to use it, often!
	161	mcu_src      =   (memory_read_byte(srcspace, mcu_address + 2)<<8) +
	162	(memory_read_byte(srcspace, mcu_address + 3)<<0) ;
138	163
	164	mcu_dst      =   (memory_read_byte(srcspace, mcu_address + 6)<<8) +
	165	(memory_read_byte(srcspace, mcu_address + 7)<<0) ;
	166
	167	mcu_size   =   (memory_read_byte(srcspace, mcu_address + 8)<<8) +
	168	(memory_read_byte(srcspace, mcu_address + 9)<<0) ;
	169	logerror("%s : MCU executes command $%02X, %04X %02X-> %04x\n",cpuexec_describe_context(machine),mcu_command,mcu_src,mcu_size,mcu_dst);
	170
	171	for( ; mcu_size > 0 ; mcu_size-- )
	172	{
	173	mcu_src &= 0xffff;   mcu_dst &= 0xffff;
	174	memory_write_byte(srcspace,0x100000 + mcu_dst,memory_read_byte(dstspace,0x100000 + mcu_src));
	175	mcu_src ++;         mcu_dst ++;
	176	}
	177
	178	/* Raise a "job done" flag */
	179	memory_write_byte(srcspace,mcu_address+0,0xff);
	180	memory_write_byte(srcspace,mcu_address+1,0xff);
	181
	182	break;
	183
139	184	case 0x0a:   // Copy N bytes from RAM1 to RAM2
140	185	mcu_src      =   (memory_read_byte(srcspace, mcu_address + 2)<<8) +
141	186	(memory_read_byte(srcspace, mcu_address + 3)<<0) ;
r4679	r4680
146	191	mcu_size   =   (memory_read_byte(srcspace, mcu_address + 8)<<8) +
147	192	(memory_read_byte(srcspace, mcu_address + 9)<<0) ;
148	193
149		logerror("%s : MCU executes command $A, %04X %02X-> %04x\n",cpuexec_describe_context(machine),mcu_src,mcu_size,mcu_dst);
	194	logerror("%s : MCU executes command $%02X, %04X %02X-> %04x\n",cpuexec_describe_context(machine),mcu_command,mcu_src,mcu_size,mcu_dst);
150	195
151	196	for( ; mcu_size > 0 ; mcu_size-- )
152	197	{
r4679	r4680
162	207	break;
163	208
164	209	//case 0x10: //? Clear gal?
165		//case 0x1B: //? Display gal?
166		//case 0x1F: //? Display gal?
167		//case 0x21: //? Display gal?
168		//case 0x27: //? Display gal?
169		//case 0x3E: //? Display gal?
170		//case 0x43: //? Display gal?
171		//case 0x45: //? Display gal?
172		//case 0x4C: //? Display gal?
173		//case 0x68: //? Display "Changed" gal?
174		//case 0x6B: //? Display "Changed" gal?
175		//case 0x6E: //? Display "Changed" gal?
	210	//case 0x14: //? Display gal?
	211	//until
	212	//case 0x50: //? Display gal?
	213	//case 0x68: //? Display "Changed" monster?
	214	//until
	215	//case 0x6E: //? Display "Changed" monster?
	216	//case 0x85: //? Do what?
176	217	default:
177	218	/* Raise a "job done" flag */
178	219	memory_write_byte(srcspace,mcu_address+0,0xff);
r4679	r4680
181	222	logerror("%s : MCU ERROR, unknown command $%02X\n",cpuexec_describe_context(machine),mcu_command);
182	223	}
183	224
184		/* Erase command? */
185		memory_write_byte(srcspace,mcu_list + 1,0x00);
	225	/* Erase command (so that it won't be processed again)? */
	226	memory_write_byte(srcspace,mcu_list,0x00);
186	227	}
187	228	}
188	229
189		static WRITE16_HANDLER( galpani2_mcu_nmi_w )
	230	static void galpani2_mcu_nmi2(running_machine *machine)
190	231	{
191		static UINT16 old = 0;
192		if ( (data & 1) && !(old & 1) )   galpani2_mcu_nmi(space->machine);
193		old = data;
	232	galpani2_write_kaneko(machine->cpu[0]);
	233	//logerror("%s : MCU executes CHECKs synchro\n",cpuexec_describe_context(machine));
194	234	}
195	235
	236	static WRITE8_HANDLER( galpani2_mcu_nmi1_w ) //driven by CPU1's int5 ISR
	237	{
	238	//for galpan2t:
	239	//Triggered from 'maincpu' (00007D60),once, with no command, using alternate line, during init
	240	//Triggered from 'maincpu' (000080BE),once, for unknown command, during init
	241	//Triggered from 'maincpu' (0000741E),from here on...driven by int5, even if there's no command
	242	static UINT16 old_mcu_nmi1 = 0;
	243	if ( (data & 1) && !(old_mcu_nmi1 & 1) )   galpani2_mcu_nmi1(space->machine);
	244	//if ( (data & 0x10) && !(old_mcu_nmi1 & 0x10) )    galpani2_mcu_nmi1(space->machine);
	245	//alternate line, same function?
	246	old_mcu_nmi1 = data;
	247	}
196	248
	249	static WRITE8_HANDLER( galpani2_mcu_nmi2_w ) //driven by CPU2's int5 ISR
	250	{
	251	static UINT16 old_mcu_nmi2 = 0;
	252	if ( (data & 1) && !(old_mcu_nmi2 & 1) )   galpani2_mcu_nmi2(space->machine);
	253	old_mcu_nmi2 = data;
	254	}
197	255
	256
198	257	/***************************************************************************
199	258
200	259
r4679	r4680
203	262
204	263	***************************************************************************/
205	264
206		static WRITE16_HANDLER( galpani2_coin_lockout_w )
	265	static WRITE8_HANDLER( galpani2_coin_lockout_w )
207	266	{
208		if (ACCESSING_BITS_8_15)
209		{
210		coin_counter_w(0, data & 0x0100);
211		coin_counter_w(1, data & 0x0200);
212		coin_lockout_w(0,~data & 0x0400);
213		coin_lockout_w(1,~data & 0x0800);
214		// & 0x1000     CARD in lockout?
215		// & 0x2000     CARD in lockout?
216		// & 0x4000     CARD out
217		}
	267	coin_counter_w(0, data & 0x01);
	268	coin_counter_w(1, data & 0x02);
	269	coin_lockout_w(0,~data & 0x04);
	270	coin_lockout_w(1,~data & 0x08);
	271	// & 0x10     CARD in lockout?
	272	// & 0x20     CARD in lockout?
	273	// & 0x40     CARD out
218	274	}
219	275
220		static WRITE16_DEVICE_HANDLER( galpani2_oki1_bank_w )
	276	static WRITE8_DEVICE_HANDLER( galpani2_oki1_bank_w )
221	277	{
222		if (ACCESSING_BITS_0_7)
223		{
224	278	UINT8 *ROM = memory_region(device->machine, "oki1");
225	279	logerror("%s : %s bank %08X\n",cpuexec_describe_context(device->machine),device->tag,data);
226	280	memcpy(ROM + 0x30000, ROM + 0x40000 + 0x10000 * (~data & 0xf), 0x10000);
227		}
228	281	}
229	282
230		static WRITE16_DEVICE_HANDLER( galpani2_oki2_bank_w )
	283	static WRITE8_DEVICE_HANDLER( galpani2_oki2_bank_w )
231	284	{
232		if (ACCESSING_BITS_0_7)
233		{
234	285	okim6295_set_bank_base(device, 0x40000 * (data & 0xf) );
235	286	logerror("%s : %s bank %08X\n",cpuexec_describe_context(device->machine),device->tag,data);
236		}
237	287	}
238	288
239	289
240	290	static ADDRESS_MAP_START( galpani2_mem1, ADDRESS_SPACE_PROGRAM, 16 )
241	291	AM_RANGE(0x000000, 0x0fffff) AM_ROM                                    // ROM
242	292	AM_RANGE(0x100000, 0x10ffff) AM_RAM AM_BASE(&galpani2_ram            )      // Work RAM
	293	AM_RANGE(0x110000, 0x11000f) AM_RAM                                    // ? corrupted? stack dumper on POST failure, pc+sr on gp2se
243	294	AM_RANGE(0x300000, 0x301fff) AM_RAM                                    // ?
244	295	AM_RANGE(0x302000, 0x303fff) AM_RAM AM_BASE(&spriteram16) AM_SIZE(&spriteram_size   )   // Sprites
245	296	AM_RANGE(0x304000, 0x30401f) AM_RAM_WRITE(kaneko16_sprites_regs_w) AM_BASE(&kaneko16_sprites_regs   )   // Sprites Regs
246		AM_RANGE(0x308000, 0x308001) AM_WRITE(SMH_NOP                        )   // ? 0 at startup
247		AM_RANGE(0x30c000, 0x30c001) AM_WRITE(SMH_NOP                        )   // ? hblank effect ?
	297	AM_RANGE(0x308000, 0x308001) AM_WRITENOP                              // ? 0 at startup
	298	AM_RANGE(0x30c000, 0x30c001) AM_WRITENOP                              // ? hblank effect ?
248	299	AM_RANGE(0x310000, 0x3101ff) AM_RAM_WRITE(galpani2_palette_0_w) AM_BASE(&galpani2_palette_0   )   // ?
249		AM_RANGE(0x314000, 0x314001) AM_WRITE(SMH_NOP                        )   // ? flip backgrounds ?
250		AM_RANGE(0x318000, 0x318001) AM_READWRITE(galpani2_eeprom_r, galpani2_eeprom_w   )   // EEPROM
	300	AM_RANGE(0x314000, 0x314001) AM_WRITENOP                              // ? flip backgrounds ?
	301	AM_RANGE(0x318000, 0x318001) AM_READWRITE(galpani2_eeprom_r, galpani2_eeprom_w)   // EEPROM
251	302	AM_RANGE(0x380000, 0x387fff) AM_RAM                                    // Palette?
252	303	AM_RANGE(0x388000, 0x38ffff) AM_RAM_WRITE(paletteram16_xGGGGGRRRRRBBBBB_word_w) AM_BASE(&paletteram16   )   // Palette
253		AM_RANGE(0x390000, 0x3901ff) AM_WRITE(SMH_NOP                        )   // ? at startup of service mode
	304	AM_RANGE(0x390000, 0x3901ff) AM_WRITENOP                              // ? at startup of service mode
254	305
255	306	AM_RANGE(0x400000, 0x43ffff) AM_RAM_WRITE(galpani2_bg8_0_w) AM_BASE(&galpani2_bg8_0   )   // Background 0
256	307	AM_RANGE(0x440000, 0x440001) AM_RAM AM_BASE(&galpani2_bg8_0_scrollx   )         // Background 0 Scroll X
257	308	AM_RANGE(0x480000, 0x480001) AM_RAM AM_BASE(&galpani2_bg8_0_scrolly   )         // Background 0 Scroll Y
258		AM_RANGE(0x4c0000, 0x4c0001) AM_WRITE(SMH_NOP                        )   // ? 0 at startup only
	309	AM_RANGE(0x4c0000, 0x4c0001) AM_WRITENOP                              // ? 0 at startup only
259	310	AM_RANGE(0x500000, 0x53ffff) AM_RAM_WRITE(galpani2_bg8_1_w) AM_BASE(&galpani2_bg8_1   )   // Background 1
260	311	AM_RANGE(0x540000, 0x540001) AM_RAM AM_BASE(&galpani2_bg8_1_scrollx   )         // Background 1 Scroll X
261	312
262		AM_RANGE(0x54059a, 0x54059b) AM_READ(SMH_NOP                  )   // ? galpani2 at F0A4
263		AM_RANGE(0x5405a2, 0x5405a3) AM_READ(SMH_NOP                  )   // ? galpani2 at F0A4 and F148
264		AM_RANGE(0x5405aa, 0x5405ab) AM_READ(SMH_NOP                  )   // ? galpani2 at F0A4 and F148
265		AM_RANGE(0x5405b2, 0x5405b3) AM_READ(SMH_NOP                  )   // ? galpani2 at F0A4 and F148
266		AM_RANGE(0x5405ba, 0x5405bb) AM_READ(SMH_NOP                  )   // ? galpani2 at F0A4 and F148
267		AM_RANGE(0x5405c2, 0x5405c3) AM_READ(SMH_NOP                  )   // ? galpani2 at F0A4 and F148
268		AM_RANGE(0x5405ca, 0x5405cb) AM_READ(SMH_NOP                  )   // ? galpani2 at F148
	313	AM_RANGE(0x540572, 0x540573) AM_READNOP                                 // ? galpani2 at F0A4
	314	AM_RANGE(0x54057a, 0x54057b) AM_READNOP                                 // ? galpani2 at F148
	315	AM_RANGE(0x54059a, 0x54059b) AM_READNOP                                 // ? galpani2 at F0A4
	316	AM_RANGE(0x5405a2, 0x5405a3) AM_READNOP                                 // ? galpani2 at F0A4 and F148
	317	AM_RANGE(0x5405aa, 0x5405ab) AM_READNOP                                 // ? galpani2 at F0A4 and F148
	318	AM_RANGE(0x5405b2, 0x5405b3) AM_READNOP                                 // ? galpani2 at F0A4 and F148
	319	AM_RANGE(0x5405ba, 0x5405bb) AM_READNOP                                 // ? galpani2 at F0A4 and F148
	320	AM_RANGE(0x5405c2, 0x5405c3) AM_READNOP                                 // ? galpani2 at F0A4 and F148
	321	AM_RANGE(0x5405ca, 0x5405cb) AM_READNOP                                 // ? galpani2 at F148
269	322
270	323	AM_RANGE(0x580000, 0x580001) AM_RAM AM_BASE(&galpani2_bg8_1_scrolly   )         // Background 1 Scroll Y
271		AM_RANGE(0x5c0000, 0x5c0001) AM_WRITE(SMH_NOP                        )   // ? 0 at startup only
272		AM_RANGE(0x600000, 0x600001) AM_WRITE(SMH_NOP                        )   // Watchdog
273		AM_RANGE(0x640000, 0x640001) AM_WRITE(SMH_NOP                        )   // ? 0 before resetting and at startup
274		AM_RANGE(0x680000, 0x680001) AM_WRITE(galpani2_mcu_nmi_w   )               // ? 0 -> 1 -> 0 (lev 5) / 0 -> $10 -> 0
275		AM_RANGE(0x6c0000, 0x6c0001) AM_WRITE(galpani2_coin_lockout_w            )   // Coin + Card Lockout
	324	AM_RANGE(0x5c0000, 0x5c0001) AM_WRITENOP                              // ? 0 at startup only
	325	AM_RANGE(0x600000, 0x600001) AM_WRITENOP                              // Watchdog
	326	AM_RANGE(0x640000, 0x640001) AM_WRITE8(galpani2_mcu_init_w, 0x00ff         )   // ? 0 before resetting and at startup, Reset mcu ?
	327	AM_RANGE(0x680000, 0x680001) AM_WRITE8(galpani2_mcu_nmi1_w, 0x00ff)            // ? 0 -> 1 -> 0 (lev 5) / 0 -> $10 -> 0
	328	AM_RANGE(0x6c0000, 0x6c0001) AM_WRITE8(galpani2_coin_lockout_w, 0xff00      )   // Coin + Card Lockout
276	329	AM_RANGE(0x780000, 0x780001) AM_READ_PORT("DSW1_P1")
277	330	AM_RANGE(0x780002, 0x780003) AM_READ_PORT("DSW2_P2")
278	331	AM_RANGE(0x780004, 0x780005) AM_READ_PORT("SPECIAL")
279	332	AM_RANGE(0x780006, 0x780007) AM_READ_PORT("SERVICE")
280	333	AM_RANGE(0xc00000, 0xc00001) AM_DEVREADWRITE8("oki1", okim6295_r, okim6295_w, 0x00ff   )   // 2 x OKIM6295
281	334	AM_RANGE(0xc40000, 0xc40001) AM_DEVREADWRITE8("oki2", okim6295_r, okim6295_w, 0x00ff   )   //
282		AM_RANGE(0xc80000, 0xc80001) AM_DEVWRITE("oki1", galpani2_oki1_bank_w               )   //
283		AM_RANGE(0xcc0000, 0xcc0001) AM_DEVWRITE("oki2", galpani2_oki2_bank_w               )   //
	335	AM_RANGE(0xc80000, 0xc80001) AM_DEVWRITE8("oki1", galpani2_oki1_bank_w, 0x00ff         )   //
	336	AM_RANGE(0xcc0000, 0xcc0001) AM_DEVWRITE8("oki2", galpani2_oki2_bank_w, 0x00ff         )   //
284	337	ADDRESS_MAP_END
285	338
286	339
r4679	r4680
302	355	offset += (0x800000/2) * (*galpani2_rombank & 0x0003);
303	356
304	357	if ( offset < len )   return ROM[offset];
305		else            return 0xffff;
	358	else            return 0xffff; //floating bus for absent ROMs
306	359	}
307	360
308	361	static ADDRESS_MAP_START( galpani2_mem2, ADDRESS_SPACE_PROGRAM, 16 )
r4679	r4680
311	364	AM_RANGE(0x400000, 0x4fffff) AM_RAM_WRITE(galpani2_bg15_w) AM_BASE(&galpani2_bg15)   // bg15
312	365	AM_RANGE(0x500000, 0x5fffff) AM_RAM                                                // bg15
313	366	AM_RANGE(0x600000, 0x600001) AM_READWRITE(SMH_NOP, SMH_NOP         )   // ? 0 at startup only
314		AM_RANGE(0x640000, 0x640001) AM_WRITE(SMH_NOP                  )   // ? 0 at startup only
315		AM_RANGE(0x680000, 0x680001) AM_WRITE(SMH_NOP                  )   // ? 0 at startup only
316		AM_RANGE(0x6c0000, 0x6c0001) AM_WRITE(SMH_NOP                  )   // ? 0 at startup only
317		AM_RANGE(0x700000, 0x700001) AM_WRITE(SMH_NOP                  )   // Watchdog
318		AM_RANGE(0x780000, 0x780001) AM_WRITE(SMH_NOP                  )   // ? 0 -> 1 -> 0 (lev 5)
	367	AM_RANGE(0x640000, 0x640001) AM_WRITENOP                        // ? 0 at startup only
	368	AM_RANGE(0x680000, 0x680001) AM_WRITENOP                        // ? 0 at startup only
	369	AM_RANGE(0x6c0000, 0x6c0001) AM_WRITENOP                        // ? 0 at startup only
	370	AM_RANGE(0x700000, 0x700001) AM_WRITENOP                        // Watchdog
	371	//  AM_RANGE(0x740000, 0x740001) AM_WRITENOP                                // ? Reset mcu
	372	AM_RANGE(0x780000, 0x780001) AM_WRITE8(galpani2_mcu_nmi2_w, 0x00ff)            // ? 0 -> 1 -> 0 (lev 5)
319	373	AM_RANGE(0x7c0000, 0x7c0001) AM_WRITE(SMH_RAM) AM_BASE(&galpani2_rombank   )   // Rom Bank
320	374	AM_RANGE(0x800000, 0xffffff) AM_READ(galpani2_bankedrom_r      )      // Banked ROM
321	375	ADDRESS_MAP_END
r4679	r4680
426	480	INPUT_PORTS_END
427	481
428	482	static INPUT_PORTS_START( gp2se )
429		PORT_START("DSW1_P1")   /* 780000.w */
	483	PORT_INCLUDE( galpani2 )
	484
	485	PORT_MODIFY("DSW1_P1")   /* 780000.w */
430	486	PORT_DIPNAME( 0x0007, 0x0007, DEF_STR( Difficulty ) )
431	487	PORT_DIPSETTING(      0x0007, DEF_STR( Normal ) )
432	488	PORT_DIPSETTING(      0x0006, DEF_STR( Very_Easy ) )
r4679	r4680
448	504	PORT_DIPSETTING(      0x0040, "4" )
449	505	PORT_DIPSETTING(      0x0000, "6" )
450	506
451		PORT_BIT( 0x0100, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_PLAYER(1)
452		PORT_BIT( 0x0200, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_PLAYER(1)
453		PORT_BIT( 0x0400, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_PLAYER(1)
454		PORT_BIT( 0x0800, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_PLAYER(1)
455		PORT_BIT( 0x1000, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(1)
456		PORT_BIT( 0x2000, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(1)
457		PORT_BIT( 0x4000, IP_ACTIVE_LOW, IPT_START1 )
458		PORT_BIT( 0x8000, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_IMPULSE(1)
459
460		PORT_START("DSW2_P2")   /* 780002.w */
461		PORT_DIPNAME( 0x000f, 0x000f, DEF_STR( Coinage ) )
462		PORT_DIPSETTING(      0x000f, "1 Coin/1 Credit  1/1" )
463		PORT_DIPSETTING(      0x000e, "2 Coin/1 Credit  2/1" )
464		PORT_DIPSETTING(      0x000d, "3 Coin/1 Credit  3/1" )
465		PORT_DIPSETTING(      0x000c, "4 Coin/1 Credit  4/1" )
466		PORT_DIPSETTING(      0x000b, "5 Coin/1 Credit  5/1" )
467		PORT_DIPSETTING(      0x000a, "2 Coin/1 Credit  1/1" )
468		PORT_DIPSETTING(      0x0009, "3 Coin/1 Credit  1/1" )
469		PORT_DIPSETTING(      0x0008, "4 Coin/1 Credit  1/1" )
470		PORT_DIPSETTING(      0x0007, "5 Coin/1 Credit  1/1" )
471		PORT_DIPSETTING(      0x0006, "2 Coin/1 Credit  2/1" )
472		PORT_DIPSETTING(      0x0005, "3 Coin/1 Credit  2/1" )
473		PORT_DIPSETTING(      0x0004, "4 Coin/1 Credit  2/1" )
474		PORT_DIPSETTING(      0x0003, "5 Coin/1 Credit  2/1" )
475		PORT_DIPSETTING(      0x0002, "1 Coin/2 Credit  1/2" )
476		PORT_DIPSETTING(      0x0001, "1 Coin/3 Credit  1/3" )
477		PORT_DIPSETTING(      0x0000, DEF_STR( Free_Play ) )
	507	PORT_MODIFY("DSW2_P2")   /* 780002.w */
478	508	PORT_DIPNAME( 0x0010, 0x0010, "Card Dispenser" )
479	509	PORT_DIPSETTING(      0x0000, "Used" )
480	510	PORT_DIPSETTING(      0x0010, DEF_STR( Unused ) )
481		PORT_DIPNAME( 0x0020, 0x0020, DEF_STR( Flip_Screen ) )
482		PORT_DIPSETTING(      0x0020, DEF_STR( Off ) )
483		PORT_DIPSETTING(      0x0000, DEF_STR( On ) )
484		PORT_DIPNAME( 0x0040, 0x0040, DEF_STR( Demo_Sounds ) )
485		PORT_DIPSETTING(      0x0000, DEF_STR( Off ) )
486		PORT_DIPSETTING(      0x0040, DEF_STR( On ) )
487		PORT_SERVICE( 0x0080, IP_ACTIVE_LOW )
488	511
489		PORT_BIT( 0x0100, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_PLAYER(2)
490		PORT_BIT( 0x0200, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_PLAYER(2)
491		PORT_BIT( 0x0400, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_PLAYER(2)
492		PORT_BIT( 0x0800, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_PLAYER(2)
493		PORT_BIT( 0x1000, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(2)
494		PORT_BIT( 0x2000, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(2)
495		PORT_BIT( 0x4000, IP_ACTIVE_LOW, IPT_START2  )
496		PORT_BIT( 0x8000, IP_ACTIVE_LOW, IPT_COIN2 ) PORT_IMPULSE(1)
497
498		PORT_START("SPECIAL")   /* 780004.w */
499		PORT_BIT( 0x00ff, IP_ACTIVE_LOW, IPT_UNKNOWN )
500		PORT_BIT( 0x0100, IP_ACTIVE_LOW, IPT_UNKNOWN )
501		PORT_BIT( 0x0200, IP_ACTIVE_LOW, IPT_UNKNOWN )
502		PORT_BIT( 0x0400, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_PLAYER(1)
503		PORT_BIT( 0x0800, IP_ACTIVE_LOW, IPT_UNKNOWN )
504		PORT_BIT( 0x1000, IP_ACTIVE_LOW, IPT_UNKNOWN )
505		PORT_BIT( 0x2000, IP_ACTIVE_LOW, IPT_SPECIAL )   // CARD full
506		PORT_BIT( 0x4000, IP_ACTIVE_LOW, IPT_SPECIAL )   // CARD full
507		PORT_BIT( 0x8000, IP_ACTIVE_LOW, IPT_SPECIAL )   // CARD empty
508
509		PORT_START("SERVICE")   /* 780006.w */
510		PORT_BIT( 0x00ff, IP_ACTIVE_LOW, IPT_UNKNOWN )
511		PORT_BIT( 0x0100, IP_ACTIVE_LOW, IPT_UNKNOWN )
512		PORT_BIT( 0x0200, IP_ACTIVE_LOW, IPT_UNKNOWN )
513		PORT_BIT( 0x0400, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_PLAYER(2)
514		PORT_BIT( 0x0800, IP_ACTIVE_LOW, IPT_UNKNOWN )
515		PORT_BIT( 0x1000, IP_ACTIVE_LOW, IPT_UNKNOWN )
516		PORT_SERVICE_NO_TOGGLE( 0x2000, IP_ACTIVE_LOW )
517		PORT_BIT( 0x4000, IP_ACTIVE_LOW, IPT_TILT     )
518		PORT_BIT( 0x8000, IP_ACTIVE_LOW, IPT_SERVICE1 )
519
520	512	//missing "test" input
521	513	INPUT_PORTS_END
522	514
r4679	r4680
556	548	***************************************************************************/
557	549
558	550
559		/* CPU#1 Interrups */
	551	/* CPU#1 Interrups , lev 3,4 & 5 are tested on power up. The rest is rte, but lev 6 */
560	552	#define GALPANI2_INTERRUPTS_NUM   4
561	553	static INTERRUPT_GEN( galpani2_interrupt1 )
562	554	{
r4679	r4680
569	561	}
570	562	}
571	563
572		/* CPU#2 Interrups */
573		/* lev 3,4 & 5 are tested on power up. The rest is rte, but lev 7 */
	564	/* CPU#2 Interrups , lev 3,4 & 5 are tested on power up. The rest is rte, but lev 7 */
574	565	#define GALPANI2_INTERRUPTS_NUM2   3
575	566	static INTERRUPT_GEN( galpani2_interrupt2 )
576	567	{
r4679	r4680
585	576	static MACHINE_DRIVER_START( galpani2 )
586	577
587	578	/* basic machine hardware */
588		MDRV_CPU_ADD("maincpu", M68000, 16000000)   /* 16MHz */
	579	MDRV_CPU_ADD("maincpu", M68000, XTAL_16MHz)
589	580	MDRV_CPU_PROGRAM_MAP(galpani2_mem1, 0)
590	581	MDRV_CPU_VBLANK_INT_HACK(galpani2_interrupt1,GALPANI2_INTERRUPTS_NUM)
	582	//MDRV_QUANTUM_PERFECT_CPU("maincpu")
591	583
592		MDRV_CPU_ADD("sub", M68000, 16000000)   /* 16MHz */
	584	MDRV_CPU_ADD("sub", M68000, XTAL_16MHz)
593	585	MDRV_CPU_PROGRAM_MAP(galpani2_mem2, 0)
594	586	MDRV_CPU_VBLANK_INT_HACK(galpani2_interrupt2,GALPANI2_INTERRUPTS_NUM2)
595	587
r4679	r4680
614	606	/* sound hardware */
615	607	MDRV_SPEAKER_STANDARD_STEREO("lspeaker", "rspeaker")
616	608
617		MDRV_SOUND_ADD("oki1", OKIM6295, 1584000)
618		MDRV_SOUND_CONFIG(okim6295_interface_pin7high) // clock frequency & pin 7 not verified
	609	MDRV_SOUND_ADD("oki1", OKIM6295, XTAL_16MHz/8)
	610	MDRV_SOUND_CONFIG(okim6295_interface_pin7low) // clock frequency & pin 7 not verified
619	611	MDRV_SOUND_ROUTE(ALL_OUTPUTS, "lspeaker", 1.0)
620	612
621		MDRV_SOUND_ADD("oki2", OKIM6295, 1584000)
622		MDRV_SOUND_CONFIG(okim6295_interface_pin7high) // clock frequency & pin 7 not verified
	613	MDRV_SOUND_ADD("oki2", OKIM6295, XTAL_16MHz/8)
	614	MDRV_SOUND_CONFIG(okim6295_interface_pin7low) // clock frequency & pin 7 not verified
623	615	MDRV_SOUND_ROUTE(ALL_OUTPUTS, "rspeaker", 1.0)
624	616	MACHINE_DRIVER_END
625	617
r4679	r4680
701	693	ROM_LOAD16_BYTE( "g000a2.u165-1", 0x000000, 0x080000, CRC(0c6dfe3f) SHA1(22b16eaa3fee7f8f8434c6775255b25c8d960620) )
702	694	ROM_LOAD16_BYTE( "g001a2.u164-1", 0x000001, 0x080000, CRC(b3a5951f) SHA1(78cf2d85a8b3cd46c5e30fd13b474af2ed2ee09b) )
703	695
704		ROM_REGION( 0x1000000, "sub", 0 )         /* CPU#2 Code */
	696	ROM_REGION( 0x40000, "sub", 0 )         /* CPU#2 Code */
705	697	ROM_LOAD16_BYTE( "g002a2.u64-1", 0x000000, 0x020000, CRC(c0b94eaf) SHA1(4f3a65b238b31ee8d256b7025253f01eaf6e55d5) )
706	698	ROM_LOAD16_BYTE( "g003a2.u63-1", 0x000001, 0x020000, CRC(0d30725d) SHA1(d4614f9ffb930c4ea36cb3fbacffe63060e92402) )
707	699
708		ROM_REGION16_BE( 0x1500000, "user1", 0 )   /* Backgrounds (CPU2) */
	700	ROM_REGION16_BE( 0x2000000, "user1", 0 )   /* Backgrounds (CPU2) */
709	701	ROM_LOAD( "gp2-300a.052", 0x0000000, 0x100000, CRC(09ebedba) SHA1(3c06614633f0da03facb5199deac492b8ce07257) )
710	702	ROM_LOAD( "gp2-300b.053", 0x0100000, 0x100000, CRC(d7d12920) SHA1(4b6e01cc0ac5192758f4b3d26f102905b2b5e8ac) )
711	703	ROM_LOAD( "gp2-301.035", 0x0200000, 0x200000, CRC(e71e749d) SHA1(420c4c085e89d9641a84e34fa870df2bc02165b6) )
r4679	r4680
735	727	ROM_LOAD( "gp2-100.043", 0x040000, 0x100000, CRC(4235ac5b) SHA1(7e35831523fbb2d0587b9ab93c13b2b43dc481a8) )   // $10 x $10000
736	728	ROM_COPY( "oki1", 0x0c0000, 0, 0x40000 )
737	729
738		ROM_REGION( 0x400000, "oki2", 0 )   /* Samples */
739		ROM_LOAD( "gp2-102.045", 0x080000, 0x180000, CRC(b4bee779) SHA1(a41098e4b8e48577719dc4bd7f09f5e893e8b388) )   //  $8 x $40000
740		ROM_CONTINUE(            0x000000, 0x080000 )
	730	ROM_REGION( 0x300000, "oki2", 0 )   /* Samples */
	731	ROM_LOAD( "gp2-102.045", 0x180000, 0x080000, CRC(b4bee779) SHA1(a41098e4b8e48577719dc4bd7f09f5e893e8b388) )   //  $8 x $40000
	732	ROM_CONTINUE(            0x000000, 0x180000 )
741	733	ROM_LOAD( "gp2-101.044", 0x280000, 0x080000, CRC(f75ba6a0) SHA1(91cc0c019a7ebfa2562bbe570af029f00b5e0699) )   //  $4 x $40000
742	734	ROM_CONTINUE(            0x200000, 0x080000 )
743	735	ROM_END
r4679	r4680
747	739	ROM_LOAD16_BYTE( "g000g1.u133-0", 0x000000, 0x080000, CRC(5a9c4886) SHA1(6fbc443612e72bafc5cac30de78c72815db20c4c) )
748	740	ROM_LOAD16_BYTE( "g001g1.u134-0", 0x000001, 0x080000, CRC(c92937c3) SHA1(0c9e894c0e23e319bd2d01ec573f02ed510e3ed6) )
749	741
750		ROM_REGION( 0x1000000, "sub", 0 )         /* CPU#2 Code */
	742	ROM_REGION( 0x40000, "sub", 0 )         /* CPU#2 Code */
751	743	ROM_LOAD16_BYTE( "g002t1.125", 0x000000, 0x020000, CRC(a3034e1c) SHA1(493e4be36f2aea0083d5d37e16486ed66dab952e) )
752	744	ROM_LOAD16_BYTE( "g003t1.126", 0x000001, 0x020000, CRC(20d3a2ad) SHA1(93450e5a23456c242ebf1a3560013a17c6b05354) )
753	745
754		ROM_REGION16_BE( 0x1500000, "user1", 0 )   /* Backgrounds (CPU2) */
	746	ROM_REGION16_BE( 0x2000000, "user1", 0 )   /* Backgrounds (CPU2) */
755	747	ROM_LOAD16_BYTE( "g300a0.u44-00", 0x0000000, 0x080000, CRC(50406294) SHA1(fc1165b7b31a44ab204cd5ac3e7b2733ed6b1534) )
756	748	ROM_LOAD16_BYTE( "g300a1.u41-00", 0x0000001, 0x080000, CRC(d26b7c4f) SHA1(b491170010977ba1e5111893937cc6bab0539e7d) )
757	749	ROM_LOAD16_BYTE( "g300b0.u45-00", 0x0100000, 0x080000, CRC(9637934c) SHA1(d3b39d9f44825bdf24d4aa39ca32035bc5af4905) )
r4679	r4680
786	778	/* Sound samples: unknown load position, but included here to retain the rom in this set */
787	779	ROM_LOAD( "g104g1.u04-00", 0x140000, 0x080000, CRC(03539013) SHA1(36b96c59c59d0e747eb000472c22a30de0810902) )   // $8 x $10000, 1st is just audio data, no header
788	780
789		ROM_REGION( 0x400000, "oki2", 0 )   /* Samples */
790		ROM_LOAD( "gp2-102.045", 0x080000, 0x180000, CRC(b4bee779) SHA1(a41098e4b8e48577719dc4bd7f09f5e893e8b388) )   //  $8 x $40000
791		ROM_CONTINUE(            0x000000, 0x080000 )
	781	ROM_REGION( 0x300000, "oki2", 0 )   /* Samples */
	782	ROM_LOAD( "gp2-102.045", 0x180000, 0x080000, CRC(b4bee779) SHA1(a41098e4b8e48577719dc4bd7f09f5e893e8b388) )   //  $8 x $40000
	783	ROM_CONTINUE(            0x000000, 0x180000 )
792	784	ROM_LOAD( "gp2-101.044", 0x280000, 0x080000, CRC(f75ba6a0) SHA1(91cc0c019a7ebfa2562bbe570af029f00b5e0699) )   //  $4 x $40000
793	785	ROM_CONTINUE(            0x200000, 0x080000 )
794	786	ROM_END
r4679	r4680
798	790	ROM_LOAD16_BYTE( "g000t1.133", 0x000000, 0x080000, CRC(332048e7) SHA1(1a353d4b29f7a08158fc454309dc496df6b5b108) )
799	791	ROM_LOAD16_BYTE( "g001t1.134", 0x000001, 0x080000, CRC(c92937c3) SHA1(0c9e894c0e23e319bd2d01ec573f02ed510e3ed6) )
800	792
801		ROM_REGION( 0x1000000, "sub", 0 )         /* CPU#2 Code */
	793	ROM_REGION( 0x40000, "sub", 0 )         /* CPU#2 Code */
802	794	ROM_LOAD16_BYTE( "g002t1.125", 0x000000, 0x020000, CRC(a3034e1c) SHA1(493e4be36f2aea0083d5d37e16486ed66dab952e) )
803	795	ROM_LOAD16_BYTE( "g003t1.126", 0x000001, 0x020000, CRC(20d3a2ad) SHA1(93450e5a23456c242ebf1a3560013a17c6b05354) )
804	796
805		ROM_REGION16_BE( 0x1500000, "user1", 0 )   /* Backgrounds (CPU2) */
	797	ROM_REGION16_BE( 0x2000000, "user1", 0 )   /* Backgrounds (CPU2) */
806	798	ROM_LOAD( "gp2-300a.052", 0x0000000, 0x100000, CRC(09ebedba) SHA1(3c06614633f0da03facb5199deac492b8ce07257) )
807	799	ROM_LOAD( "gp2-300b.053", 0x0100000, 0x100000, CRC(d7d12920) SHA1(4b6e01cc0ac5192758f4b3d26f102905b2b5e8ac) )
808	800	ROM_LOAD( "gp2-301.035", 0x0200000, 0x200000, CRC(e71e749d) SHA1(420c4c085e89d9641a84e34fa870df2bc02165b6) )
r4679	r4680
833	825	ROM_LOAD( "gp2-100.043", 0x040000, 0x100000, CRC(4235ac5b) SHA1(7e35831523fbb2d0587b9ab93c13b2b43dc481a8) )   // $10 x $10000
834	826	ROM_COPY( "oki1", 0x0c0000, 0, 0x40000 )
835	827
836		ROM_REGION( 0x400000, "oki2", 0 )   /* Samples */
837		ROM_LOAD( "gp2-102.045", 0x080000, 0x180000, CRC(b4bee779) SHA1(a41098e4b8e48577719dc4bd7f09f5e893e8b388) )   //  $8 x $40000
838		ROM_CONTINUE(            0x000000, 0x080000 )
	828	ROM_REGION( 0x300000, "oki2", 0 )   /* Samples */
	829	ROM_LOAD( "gp2-102.045", 0x180000, 0x080000, CRC(b4bee779) SHA1(a41098e4b8e48577719dc4bd7f09f5e893e8b388) )   //  $8 x $40000
	830	ROM_CONTINUE(            0x000000, 0x180000 )
839	831	ROM_LOAD( "gp2-101.044", 0x280000, 0x080000, CRC(f75ba6a0) SHA1(91cc0c019a7ebfa2562bbe570af029f00b5e0699) )   //  $4 x $40000
840	832	ROM_CONTINUE(            0x200000, 0x080000 )
841	833	ROM_END
r4679	r4680
863	855	ROM_LOAD16_BYTE( "g000j2.165", 0x000000, 0x080000, CRC(e0c5a03d) SHA1(e12457400ca8cd78674b44d7f4d664cfc0afc8c9) )
864	856	ROM_LOAD16_BYTE( "g001j2.164", 0x000001, 0x080000, CRC(c8e12223) SHA1(0e0160565e95cb33dc6ad796225e995ed3baf8eb) )
865	857
866		ROM_REGION( 0x1000000, "sub", 0 )         /* CPU#2 Code */
	858	ROM_REGION( 0x40000, "sub", 0 )         /* CPU#2 Code */
867	859	ROM_LOAD16_BYTE( "g002j1.64",  0x000000, 0x020000, CRC(5e523829) SHA1(dad11e4a3348c988ff658609cf78a3fbee58064e) )
868	860	ROM_LOAD16_BYTE( "g003j1.63",  0x000001, 0x020000, CRC(2a0d5f89) SHA1(0a7031c4b8b7bc757da25250dbb5fa1004205aeb) )
869	861
870		ROM_REGION16_BE( 0x800000, "user1", 0 )   /* Backgrounds (CPU2) */
	862	ROM_REGION16_BE( 0x2000000, "user1", 0 )   /* Backgrounds (CPU2) */
871	863	ROM_LOAD( "gp2-300j.175", 0x000000, 0x200000, CRC(3a0afc1d) SHA1(91fba9074cc3c28e919053f0ea07b28d88b2ce5f) )
872	864	ROM_LOAD( "gp2-301j.176", 0x200000, 0x200000, CRC(5b6d1709) SHA1(a7d35247fe71895f2b6169409aa0bdaef446804c) )
873	865	ROM_LOAD16_BYTE( "gp2-302a.177", 0x400000, 0x100000, CRC(311fa273) SHA1(c2adeac45be701f6f474841755fac4347d44f844) )
r4679	r4680
894	886	ROM_LOAD16_BYTE( "g000j4.u165", 0x000000, 0x080000, CRC(d8258a7a) SHA1(12991392d7e70bfba394ec4ad49b427959ca019e) )
895	887	ROM_LOAD16_BYTE( "g001j4.u164", 0x000001, 0x080000, CRC(23f706bf) SHA1(960c6e6c17f03072cecabfd52018e0351ff4b661) )
896	888
897		ROM_REGION( 0x1000000, "sub", 0 )         /* CPU#2 Code */
	889	ROM_REGION( 0x40000, "sub", 0 )         /* CPU#2 Code */
898	890	ROM_LOAD16_BYTE( "g002j4.u64",  0x000000, 0x020000, CRC(bcd4edd9) SHA1(17ae6fbf75d8e5333133737de926a36f5cd29661) )
899	891	ROM_LOAD16_BYTE( "g003j4.u63",  0x000001, 0x020000, CRC(2fbe0194) SHA1(52da771ba813b27ec1a996b237c14dab9b33db82) )
900	892
901		ROM_REGION16_BE( 0xa00000, "user1", 0 )   /* Backgrounds (CPU2) */
	893	ROM_REGION16_BE( 0x2000000, "user1", 0 )   /* Backgrounds (CPU2) */
902	894	ROM_LOAD( "gp2-300-j-0071.u175", 0x000000, 0x200000, CRC(3a0afc1d) SHA1(91fba9074cc3c28e919053f0ea07b28d88b2ce5f) )
903	895	ROM_LOAD( "gp2-301-j-0072.u176", 0x200000, 0x200000, CRC(5b6d1709) SHA1(a7d35247fe71895f2b6169409aa0bdaef446804c) )
904	896	ROM_LOAD16_BYTE( "gp2-302a-0057.u177", 0x400000, 0x100000, CRC(311fa273) SHA1(c2adeac45be701f6f474841755fac4347d44f844) )
r4679	r4680
930	922	ROM_LOAD16_BYTE( "g000e3.u165-3", 0x000000, 0x080000, CRC(b6de2653) SHA1(a24daf5e6b6b268f60b1dbb374861c85f642cea5) )
931	923	ROM_LOAD16_BYTE( "g001e3.u164-3", 0x000001, 0x080000, CRC(74e8d0e8) SHA1(d131be9f52ee79e1b82f46721c2ad5d71b3da649) )
932	924
933		ROM_REGION( 0x1000000, "sub", 0 )         /* CPU#2 Code */
	925	ROM_REGION( 0x40000, "sub", 0 )         /* CPU#2 Code */
934	926	ROM_LOAD16_BYTE( "g002e3.u64-3",  0x000000, 0x020000, CRC(5e523829) SHA1(dad11e4a3348c988ff658609cf78a3fbee58064e) )
935	927	ROM_LOAD16_BYTE( "g003e3.u63-3",  0x000001, 0x020000, CRC(2a0d5f89) SHA1(0a7031c4b8b7bc757da25250dbb5fa1004205aeb) )
936	928
937		ROM_REGION16_BE( 0x800000, "user1", 0 )   /* Backgrounds (CPU2) */
	929	ROM_REGION16_BE( 0x2000000, "user1", 0 )   /* Backgrounds (CPU2) */
938	930	ROM_LOAD( "gp2-300-j-0071.u175", 0x000000, 0x200000, CRC(3a0afc1d) SHA1(91fba9074cc3c28e919053f0ea07b28d88b2ce5f) )
939	931	ROM_LOAD( "gp2-301-j-0072.u176", 0x200000, 0x200000, CRC(5b6d1709) SHA1(a7d35247fe71895f2b6169409aa0bdaef446804c) )
940	932	ROM_LOAD16_BYTE( "gp2-302a-0057.u177", 0x400000, 0x100000, CRC(311fa273) SHA1(c2adeac45be701f6f474841755fac4347d44f844) )

src/mame/drivers/arabian.c

r4679	r4680
445	445
446	446	static DRIVER_INIT( arabian )
447	447	{
448		memory_install_write8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xd34b, 0xd34b, 0, 0, custom_flip_w);
449		memory_install_write8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xd400, 0xd401, 0, 0, custom_cocktail_w);
	448	memory_install_write8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xd34b, 0xd34b, 0, 0, custom_flip_w);
	449	memory_install_write8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xd400, 0xd401, 0, 0, custom_cocktail_w);
450	450	}
451	451
452	452

src/mame/drivers/shougi.c

r4679	r4680
221	221	static WRITE8_HANDLER( shougi_mcu_halt_off_w )
222	222	{
223	223	/* logerror("mcu HALT OFF"); */
224		cpu_set_input_line(space->machine->cpu[2], INPUT_LINE_HALT, CLEAR_LINE);
	224	cputag_set_input_line(space->machine, "mcu", INPUT_LINE_HALT, CLEAR_LINE);
225	225	}
226	226
227	227	static WRITE8_HANDLER( shougi_mcu_halt_on_w )
228	228	{
229	229	/* logerror("mcu HALT ON"); */
230		cpu_set_input_line(space->machine->cpu[2], INPUT_LINE_HALT,ASSERT_LINE);
	230	cputag_set_input_line(space->machine, "mcu", INPUT_LINE_HALT,ASSERT_LINE);
231	231	}
232	232
233	233
r4679	r4680
238	238	nmi_enabled = 0; /* disable NMIs */
239	239
240	240	/* NMI lines are tied together on both CPUs and connected to the LS74 /Q output */
241		cpu_set_input_line(space->machine->cpu[0], INPUT_LINE_NMI, CLEAR_LINE);
242		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_NMI, CLEAR_LINE);
	241	cputag_set_input_line(space->machine, "maincpu", INPUT_LINE_NMI, CLEAR_LINE);
	242	cputag_set_input_line(space->machine, "sub", INPUT_LINE_NMI, CLEAR_LINE);
243	243	}
244	244
245	245	static WRITE8_HANDLER( nmi_enable_w )
r4679	r4680
252	252	if ( nmi_enabled == 1 )
253	253	{
254	254	/* NMI lines are tied together on both CPUs and connected to the LS74 /Q output */
255		cpu_set_input_line(device->machine->cpu[0], INPUT_LINE_NMI, ASSERT_LINE);
256		cpu_set_input_line(device->machine->cpu[1], INPUT_LINE_NMI, ASSERT_LINE);
	255	cputag_set_input_line(device->machine, "maincpu", INPUT_LINE_NMI, ASSERT_LINE);
	256	cputag_set_input_line(device->machine, "sub", INPUT_LINE_NMI, ASSERT_LINE);
257	257	}
258	258	}
259	259

src/mame/drivers/taito_o.c

r0	r4680
	1	/***************************************************************
	2
	3	Taito  'O System'
	4	-------------------
	5
	6	Taito gambling hardware, very similar to H system.
	7
	8	Board specs (based on poor quality pic):
	9
	10	68000
	11	YM2203
	12	4 custom Taito chips ( TC0080VCO? TC0070RGB? )
	13	Custom (non JAMMA) connector
	14	Battery
	15
	16
	17	Games :
	18
	19	Parent Jack  (C) 1989 Taito
	20
	21	TODO:
	22
	23	- inputs (coins)
	24	- NVRAM
	25	- sprite priorities
	26	- dips
	27	- interrupts (sources) - valid levels 4,5,6(hop empty?)
	28
	29	*****************************************************************/
	30
	31	#include "driver.h"
	32	#include "deprecat.h"
	33	#include "cpu/z80/z80.h"
	34	#include "cpu/m68000/m68000.h"
	35	#include "video/taitoic.h"
	36	#include "sound/2203intf.h"
	37
	38	static const int clear_hack=1;
	39
	40	VIDEO_START( parentj );
	41	VIDEO_UPDATE( parentj );
	42
	43	static WRITE16_HANDLER(io_w)
	44	{
	45	switch(offset)
	46	{
	47	case 2: watchdog_reset(space->machine); break;
	48
	49	default: logerror("IO W %x %x %x\n",offset,data,mem_mask);
	50	}
	51	}
	52
	53	static READ16_HANDLER(io_r)
	54	{
	55	int retval=0;
	56	switch(offset)
	57	{
	58	case 0: retval=input_port_read(space->machine, "IN0")&(clear_hack?0xf7ff:0xffff);break;
	59	case 1: retval=input_port_read(space->machine, "IN1")&(clear_hack?0xfff7:0xffff);break;
	60	default: logerror("IO R %x %x = %x @ %x\n",offset,mem_mask,retval,cpu_get_pc(space->cpu));
	61	}
	62	return retval;
	63	}
	64
	65	static ADDRESS_MAP_START( parentj_map, ADDRESS_SPACE_PROGRAM, 16 )
	66	AM_RANGE(0x000000, 0x01ffff) AM_ROM
	67	AM_RANGE(0x100000, 0x10ffff) AM_MIRROR(0x010000) AM_RAM
	68	AM_RANGE(0x200000, 0x20000f) AM_READWRITE(io_r, io_w) /* TC0220IOC ? */
	69	AM_RANGE(0x300000, 0x300003) AM_DEVREADWRITE8("ym", ym2203_r, ym2203_w, 0x00ff)
	70	AM_RANGE(0x400000, 0x420fff) AM_READWRITE(TC0080VCO_word_r, TC0080VCO_word_w)
	71	AM_RANGE(0x500800, 0x500fff) AM_RAM AM_WRITE(paletteram16_xBBBBBGGGGGRRRRR_word_w) AM_BASE(&paletteram16)
	72	ADDRESS_MAP_END
	73
	74	static INPUT_PORTS_START( parentj )
	75	PORT_START("IN0")
	76	PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_CODE(KEYCODE_Z) PORT_NAME("Bet 1")
	77	PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_CODE(KEYCODE_X) PORT_NAME("Bet 2")
	78	PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_CODE(KEYCODE_C) PORT_NAME("Bet 3")
	79	PORT_BIT( 0x0008, IP_ACTIVE_LOW, IPT_BUTTON4 ) PORT_CODE(KEYCODE_V) PORT_NAME("Bet 4")
	80
	81	PORT_DIPNAME(0x0010,  0x10, "IN0 4")
	82	PORT_DIPSETTING(    0x10, DEF_STR( Off ) )
	83	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	84	PORT_BIT( 0x0020, IP_ACTIVE_LOW, IPT_BUTTON8 ) PORT_CODE(KEYCODE_F) PORT_NAME("Payout")
	85	PORT_BIT( 0x0040, IP_ACTIVE_LOW, IPT_START1 )
	86	PORT_BIT( 0x0080, IP_ACTIVE_LOW, IPT_BUTTON7 ) PORT_CODE(KEYCODE_D) PORT_NAME("Check")
	87	PORT_BIT( 0x0100, IP_ACTIVE_LOW, IPT_BUTTON5 ) PORT_CODE(KEYCODE_A) PORT_NAME("Deal/Hit")
	88	PORT_BIT( 0x0200, IP_ACTIVE_LOW, IPT_BUTTON6 ) PORT_CODE(KEYCODE_S) PORT_NAME("Double")
	89	PORT_DIPNAME(0x000400,  0x400, "IN0 a")
	90	PORT_DIPSETTING(    0x400, DEF_STR( Off ) )
	91	PORT_DIPSETTING(    0x000, DEF_STR( On ) )
	92	PORT_BIT( 0x0800, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_CODE(KEYCODE_J) PORT_NAME("Reset")
	93
	94	PORT_BIT( 0x1000, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_CODE(KEYCODE_Q) PORT_NAME("Last Key")
	95	PORT_BIT( 0x2000, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_CODE(KEYCODE_W) PORT_NAME("Meter Key")
	96	PORT_BIT( 0x4000, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_CODE(KEYCODE_E) PORT_NAME("Opto 1H")
	97	PORT_BIT( 0x8000, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_CODE(KEYCODE_R) PORT_NAME("Opto 1L")
	98
	99	PORT_START("IN1")
	100	PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_CODE(KEYCODE_U) PORT_NAME("Hop Over")
	101	PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_CODE(KEYCODE_T) PORT_NAME("Opto 2H")
	102	PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_CODE(KEYCODE_Y) PORT_NAME("Opto 2L")
	103	PORT_BIT( 0x0008, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_CODE(KEYCODE_I) PORT_NAME("All Clear")
	104
	105	PORT_DIPNAME(0x0010,  0x10, "Test Mode") /* sometimes */
	106	PORT_DIPSETTING(    0x10, DEF_STR( Off ) )
	107	PORT_DIPSETTING(    0x000, DEF_STR( On ) )
	108	PORT_DIPNAME(0x0020,  0x20, "IN1 5")
	109	PORT_DIPSETTING(    0x20, DEF_STR( Off ) )
	110	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	111	PORT_DIPNAME(0x0040,  0x40, "IN1 6")
	112	PORT_DIPSETTING(    0x40, DEF_STR( Off ) )
	113	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	114	PORT_DIPNAME(0x0080,  0x80, "IN1 7")
	115	PORT_DIPSETTING(    0x80, DEF_STR( Off ) )
	116	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
	117	PORT_DIPNAME(0x000100,  0x000, "Battery test?")
	118	PORT_DIPSETTING(    0x000, DEF_STR( Off ) )
	119	PORT_DIPSETTING(    0x100, DEF_STR( On ) )
	120	PORT_BIT( 0x0200, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_CODE(KEYCODE_O) PORT_NAME("Pay Out")
	121	PORT_DIPNAME(0x000400,  0x400, "IN1 a")
	122	PORT_DIPSETTING(    0x400, DEF_STR( Off ) )
	123	PORT_DIPSETTING(    0x000, DEF_STR( On ) )
	124	PORT_DIPNAME(0x000800,  0x800, "IN1 b")
	125	PORT_DIPSETTING(    0x800, DEF_STR( Off ) )
	126	PORT_DIPSETTING(    0x000, DEF_STR( On ) )
	127	PORT_DIPNAME(0x001000,  0x1000, "IN1 c")
	128	PORT_DIPSETTING(    0x1000, DEF_STR( Off ) )
	129	PORT_DIPSETTING(    0x0000, DEF_STR( On ) )
	130	PORT_DIPNAME(0x002000,  0x2000, "IN1 d")
	131	PORT_DIPSETTING(    0x2000, DEF_STR( Off ) )
	132	PORT_DIPSETTING(    0x0000, DEF_STR( On ) )
	133	PORT_DIPNAME(0x004000,  0x4000, "IN1 e")
	134	PORT_DIPSETTING(    0x4000, DEF_STR( Off ) )
	135	PORT_DIPSETTING(    0x0000, DEF_STR( On ) )
	136	PORT_DIPNAME(0x008000,  0x8000, "IN1 f")
	137	PORT_DIPSETTING(    0x8000, DEF_STR( Off ) )
	138	PORT_DIPSETTING(    0x0000, DEF_STR( On ) )
	139
	140	PORT_START("DSWA")
	141	PORT_DIPNAME(0x0001,  0x00, "DSWA 0")
	142	PORT_DIPSETTING(    0x00, DEF_STR( Off ) )
	143	PORT_DIPSETTING(    0x01, DEF_STR( On ) )
	144	PORT_DIPNAME(0x0002,  0x00, "DSWA 1")
	145	PORT_DIPSETTING(    0x00, DEF_STR( Off ) )
	146	PORT_DIPSETTING(    0x02, DEF_STR( On ) )
	147	PORT_DIPNAME(0x0004,  0x00, "DSWA 2")
	148	PORT_DIPSETTING(    0x00, DEF_STR( Off ) )
	149	PORT_DIPSETTING(    0x04, DEF_STR( On ) )
	150	PORT_DIPNAME(0x0008,  0x00, "DSWA 3")
	151	PORT_DIPSETTING(    0x00, DEF_STR( Off ) )
	152	PORT_DIPSETTING(    0x08, DEF_STR( On ) )
	153	PORT_DIPNAME(0x0010,  0x00, "DSWA 4")
	154	PORT_DIPSETTING(    0x00, DEF_STR( Off ) )
	155	PORT_DIPSETTING(    0x010, DEF_STR( On ) )
	156	PORT_DIPNAME(0x0020,  0x00, "DSWA 5")
	157	PORT_DIPSETTING(    0x00, DEF_STR( Off ) )
	158	PORT_DIPSETTING(    0x020, DEF_STR( On ) )
	159	PORT_DIPNAME(0x0040,  0x00, "DSWA 6")
	160	PORT_DIPSETTING(    0x00, DEF_STR( Off ) )
	161	PORT_DIPSETTING(    0x040, DEF_STR( On ) )
	162	PORT_DIPNAME(0x0080,  0x00, "DSWA 7")
	163	PORT_DIPSETTING(    0x00, DEF_STR( Off ) )
	164	PORT_DIPSETTING(    0x080, DEF_STR( On ) )
	165
	166	PORT_START("DSWB")
	167	PORT_DIPNAME(0x0001,  0x00, "Credits at start")
	168	PORT_DIPSETTING(    0x00, "500" )
	169	PORT_DIPSETTING(    0x01, "0" )
	170	PORT_DIPNAME(0x0002,  0x00, "DSWB 1")
	171	PORT_DIPSETTING(    0x00, DEF_STR( Off ) )
	172	PORT_DIPSETTING(    0x02, DEF_STR( On ) )
	173	PORT_DIPNAME(0x0004,  0x00, "DSWB 2")
	174	PORT_DIPSETTING(    0x00, DEF_STR( Off ) )
	175	PORT_DIPSETTING(    0x04, DEF_STR( On ) )
	176	PORT_DIPNAME(0x0008,  0x00, "DSWB 3")
	177	PORT_DIPSETTING(    0x00, DEF_STR( Off ) )
	178	PORT_DIPSETTING(    0x08, DEF_STR( On ) )
	179	PORT_DIPNAME(0x0010,  0x00, "DSWB 4")
	180	PORT_DIPSETTING(    0x00, DEF_STR( Off ) )
	181	PORT_DIPSETTING(    0x010, DEF_STR( On ) )
	182	PORT_DIPNAME(0x0020,  0x00, "DSWB 5")
	183	PORT_DIPSETTING(    0x00, DEF_STR( Off ) )
	184	PORT_DIPSETTING(    0x020, DEF_STR( On ) )
	185	PORT_DIPNAME(0x0040,  0x00, "DSWB 6")
	186	PORT_DIPSETTING(    0x00, DEF_STR( Off ) )
	187	PORT_DIPSETTING(    0x040, DEF_STR( On ) )
	188	PORT_DIPNAME(0x0080,  0x00, "DSWB 7")
	189	PORT_DIPSETTING(    0x00, DEF_STR( Off ) )
	190	PORT_DIPSETTING(    0x080, DEF_STR( On ) )
	191
	192	INPUT_PORTS_END
	193
	194	static const gfx_layout parentj_layout =
	195	{
	196	16,16,
	197	RGN_FRAC(1,8),
	198	4,
	199	{ 0,1,2,3 },
	200	{ RGN_FRAC(7,8)+4, RGN_FRAC(7,8)+0,
	201	RGN_FRAC(6,8)+4, RGN_FRAC(6,8)+0,
	202	RGN_FRAC(5,8)+4, RGN_FRAC(5,8)+0,
	203	RGN_FRAC(4,8)+4, RGN_FRAC(4,8)+0,
	204	RGN_FRAC(3,8)+4, RGN_FRAC(3,8)+0,
	205	RGN_FRAC(2,8)+4, RGN_FRAC(2,8)+0,
	206	RGN_FRAC(1,8)+4, RGN_FRAC(1,8)+0,
	207	RGN_FRAC(0,8)+4, RGN_FRAC(0,8)+0
	208	},
	209	{ 0,8,16,24,32,40,48,56,64,72,80,88,96,104,112,120},
	210
	211	1*128
	212	};
	213
	214	static GFXDECODE_START( parentj )
	215	GFXDECODE_ENTRY( "gfx1", 0, parentj_layout,  0x0, 0x400/16  )
	216	GFXDECODE_END
	217
	218
	219	static INTERRUPT_GEN( parentj_interrupt )
	220	{
	221	cpu_set_input_line(device, cpu_getiloops(device)?4:5 , HOLD_LINE);
	222	}
	223
	224	static const ym2203_interface ym2203_config =
	225	{
	226	{
	227	AY8910_LEGACY_OUTPUT,
	228	AY8910_DEFAULT_LOADS,
	229	DEVCB_INPUT_PORT("DSWA"),DEVCB_INPUT_PORT("DSWB"),
	230	DEVCB_NULL, DEVCB_NULL,
	231	},
	232	NULL
	233	};
	234
	235	static MACHINE_DRIVER_START( parentj )
	236
	237
	238	MDRV_CPU_ADD("maincpu", M68000,12000000 )      /*?? MHz */
	239	MDRV_CPU_PROGRAM_MAP(parentj_map,0)
	240	MDRV_CPU_VBLANK_INT_HACK(parentj_interrupt,2)
	241
	242	MDRV_SCREEN_ADD("screen", RASTER)
	243	MDRV_SCREEN_REFRESH_RATE(60)
	244	MDRV_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(0))
	245	MDRV_SCREEN_FORMAT(BITMAP_FORMAT_INDEXED16)
	246	MDRV_SCREEN_SIZE(64*16, 64*16)
	247	MDRV_SCREEN_VISIBLE_AREA(0*16, 32*16-1, 3*16, 31*16-1)
	248
	249	MDRV_GFXDECODE(parentj)
	250	MDRV_PALETTE_LENGTH(33*16)
	251
	252	MDRV_VIDEO_START(parentj)
	253	MDRV_VIDEO_UPDATE(parentj)
	254
	255	MDRV_SPEAKER_STANDARD_MONO("mono")
	256
	257	MDRV_SOUND_ADD("ym", YM2203, 2000000) /*?? MHz */
	258	MDRV_SOUND_CONFIG(ym2203_config)
	259	MDRV_SOUND_ROUTE(0, "mono",  0.25)
	260	MDRV_SOUND_ROUTE(0, "mono", 0.25)
	261	MDRV_SOUND_ROUTE(1, "mono",  1.0)
	262	MDRV_SOUND_ROUTE(2, "mono", 1.0)
	263	MACHINE_DRIVER_END
	264
	265	ROM_START( parentj )
	266	ROM_REGION( 0x20000, "maincpu", 0 ) /* 68000 Code */
	267	ROM_LOAD16_BYTE( "c42-13.21", 0x00000, 0x10000, CRC(823623eb) SHA1(7302cc0ac532f6190ae35218ea05bf8cf11fd687) )
	268	ROM_LOAD16_BYTE( "c42-12.20", 0x00001, 0x10000, CRC(8654b0ab) SHA1(edd23a731c1c60cab353e51ef5e66d33bc3fde61) )
	269
	270	ROM_REGION( 0x100000, "gfx1", 0 )
	271	ROM_LOAD( "c42-05.06", 0x00000, 0x20000, CRC(7af0d45d) SHA1(bc527b74185596e4e77b34d08eb3e1678614b451) )
	272	ROM_LOAD( "c42-04.05", 0x20000, 0x20000, CRC(133009a1) SHA1(fae5dd600384790225c24a62d1f8a00f0366dae9) )
	273	ROM_LOAD( "c42-09.13", 0x40000, 0x20000, CRC(ba35fb03) SHA1(b76e50d298ccc0f230c865b563cd8e02866a4ffb) )
	274	ROM_LOAD( "c42-08.12", 0x60000, 0x20000, CRC(7fae35a7) SHA1(f4bc6c6fd4afc167eb36b8f16589e1bfd729085e) )
	275	ROM_LOAD( "c42-07.10", 0x80000, 0x20000, CRC(f92c6f03) SHA1(ff42318ee425b423b67e2cec1fe3ef9d9785ebf6) )
	276	ROM_LOAD( "c42-06.09", 0xa0000, 0x20000, CRC(3685febd) SHA1(637946377f6d934f791d52e9790c91f60a5b2c65) )
	277	ROM_LOAD( "c42-11.17", 0xc0000, 0x20000, CRC(5d8d3c59) SHA1(c8a8a957ac9f2f1c346b4504495893c71fbfe14b) )
	278	ROM_LOAD( "c42-10.16", 0xe0000, 0x20000, CRC(e85e536e) SHA1(9ed9e316869333338e39cb0d1293e3380861a3ca) )
	279
	280	ROM_REGION( 0x2dd, "misc", 0 )
	281	ROM_LOAD( "ampal22v10a-0233.c42", 0x000, 0x2dd, CRC(0c030a81) SHA1(0f8198df2cb046683d2db9ac8e609cdff53083ed) )
	282	ROM_END
	283
	284	GAME( 1989, parentj,  0,        parentj,  parentj,  0,        ROT0,    "Taito", "Parent Jack", GAME_NOT_WORKING)

src/mame/drivers/hornet.c

r4679	r4680
417	417	if(K037122_gfx_index[chip] == MAX_GFX_ELEMENTS)
418	418	return 1;
419	419
420		K037122_char_ram[chip] = auto_malloc(0x200000);
	420	K037122_char_ram[chip] = auto_alloc_array(machine, UINT32, 0x200000/4);
421	421
422		K037122_tile_ram[chip] = auto_malloc(0x20000);
	422	K037122_tile_ram[chip] = auto_alloc_array(machine, UINT32, 0x20000/4);
423	423
424		K037122_reg[chip] = auto_malloc(0x400);
	424	K037122_reg[chip] = auto_alloc_array(machine, UINT32, 0x400/4);
425	425
426	426	if (chip == 0)
427	427	{
r4679	r4680
965	965	static MACHINE_START( hornet )
966	966	{
967	967	jvs_sdata_ptr = 0;
968		jvs_sdata = auto_malloc(1024);
969		memset(jvs_sdata, 0, 1024);
	968	jvs_sdata = auto_alloc_array_clear(machine, UINT8, 1024);
970	969
971	970	/* set conservative DRC options */
972	971	ppcdrc_set_options(machine->cpu[0], PPCDRC_COMPATIBLE_OPTIONS);

src/mame/drivers/pipedrm.c

r4679	r4680
181	181	/* sound commands. It's possible the NMI isn't really hooked up on the YM2608 */
182	182	/* sound board. */
183	183	if (param & 0x100)
184		cpu_set_input_line(machine->cpu[1], INPUT_LINE_NMI, ASSERT_LINE);
	184	cputag_set_input_line(machine, "audiocpu", INPUT_LINE_NMI, ASSERT_LINE);
185	185	}
186	186
187	187
r4679	r4680
200	200	static WRITE8_HANDLER( pending_command_clear_w )
201	201	{
202	202	pending_command = 0;
203		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_NMI, CLEAR_LINE);
	203	cputag_set_input_line(space->machine, "audiocpu", INPUT_LINE_NMI, CLEAR_LINE);
204	204	}
205	205
206	206
r4679	r4680
518	518
519	519	static void irqhandler(const device_config *device, int irq)
520	520	{
521		cpu_set_input_line(device->machine->cpu[1], 0, irq ? ASSERT_LINE : CLEAR_LINE);
	521	cputag_set_input_line(device->machine, "audiocpu", 0, irq ? ASSERT_LINE : CLEAR_LINE);
522	522	}
523	523
524	524
r4679	r4680
769	769	/* sprite RAM lives at the end of palette RAM */
770	770	spriteram = &paletteram[0xc00];
771	771	spriteram_size = 0x400;
772		memory_install_readwrite8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xcc00, 0xcfff, 0, 0, SMH_BANK3, SMH_BANK3);
	772	memory_install_readwrite8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xcc00, 0xcfff, 0, 0, (read8_space_func)SMH_BANK(3), (write8_space_func)SMH_BANK(3));
773	773	memory_set_bankptr(machine, 3, spriteram);
774	774	}
775	775
776	776
777	777	static DRIVER_INIT( hatris )
778	778	{
779		memory_install_write8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_IO), 0x20, 0x20, 0, 0, sound_command_nonmi_w);
780		memory_install_write8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_IO), 0x21, 0x21, 0, 0, fromance_gfxreg_w);
	779	memory_install_write8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_IO), 0x20, 0x20, 0, 0, sound_command_nonmi_w);
	780	memory_install_write8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_IO), 0x21, 0x21, 0, 0, fromance_gfxreg_w);
781	781	}
782	782
783	783

src/mame/drivers/ccastles.c

r4679	r4680
174	174	/* assert the IRQ if not already asserted */
175	175	if (!irq_state)
176	176	{
177		cpu_set_input_line(machine->cpu[0], 0, ASSERT_LINE);
	177	cputag_set_input_line(machine, "maincpu", 0, ASSERT_LINE);
178	178	irq_state = 1;
179	179	}
180	180
r4679	r4680
238	238	schedule_next_irq(machine, 0);
239	239
240	240	/* allocate backing memory for the NVRAM */
241		generic_nvram = auto_malloc(generic_nvram_size);
	241	generic_nvram = auto_alloc_array(machine, UINT8, generic_nvram_size);
242	242
243	243	/* setup for save states */
244	244	state_save_register_global(machine, irq_state);
r4679	r4680
249	249
250	250	static MACHINE_RESET( ccastles )
251	251	{
252		cpu_set_input_line(machine->cpu[0], 0, CLEAR_LINE);
	252	cputag_set_input_line(machine, "maincpu", 0, CLEAR_LINE);
253	253	irq_state = 0;
254	254	}
255	255
r4679	r4680
265	265	{
266	266	if (irq_state)
267	267	{
268		cpu_set_input_line(space->machine->cpu[0], 0, CLEAR_LINE);
	268	cputag_set_input_line(space->machine, "maincpu", 0, CLEAR_LINE);
269	269	irq_state = 0;
270	270	}
271	271	}

src/mame/drivers/ddragon3.c

r4679	r4680
183	183	break;
184	184
185	185	case 1: /* soundlatch_w */
186		soundlatch_w(space,1,reg[1]&0xff);
187		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_NMI, PULSE_LINE );
	186	soundlatch_w(space, 1, reg[1] & 0xff);
	187	cputag_set_input_line(space->machine, "audiocpu", INPUT_LINE_NMI, PULSE_LINE );
188	188	break;
189	189
190	190	case 2:
191	191	/*  this gets written to on startup and at the end of IRQ6
192	192	**  possibly trigger IRQ on sound CPU
193	193	*/
194		cpu_set_input_line(space->machine->cpu[0], 6, CLEAR_LINE);
	194	cputag_set_input_line(space->machine, "maincpu", 6, CLEAR_LINE);
195	195	break;
196	196
197	197	case 3:
198	198	/*  this gets written to on startup,
199	199	**  and at the end of IRQ5 (input port read) */
200		cpu_set_input_line(space->machine->cpu[0], 5, CLEAR_LINE);
	200	cputag_set_input_line(space->machine, "maincpu", 5, CLEAR_LINE);
201	201	break;
202	202
203	203	case 4:
204	204	/* this gets written to at the end of IRQ6 only */
205		cpu_set_input_line(space->machine->cpu[0], 6, CLEAR_LINE);
	205	cputag_set_input_line(space->machine, "maincpu", 6, CLEAR_LINE);
206	206	break;
207	207
208	208	default:
209		logerror("OUTPUT 1400[%02x] %08x, pc=%06x \n", offset,(unsigned)data, cpu_get_pc(space->cpu) );
	209	logerror("OUTPUT 1400[%02x] %08x, pc=%06x \n", offset, (unsigned)data, cpu_get_pc(space->cpu) );
210	210	break;
211	211	}
212	212	}
r4679	r4680
217	217	*
218	218	*************************************/
219	219
220		static ADDRESS_MAP_START( readmem, ADDRESS_SPACE_PROGRAM, 16 )
221		AM_RANGE(0x000000, 0x07ffff) AM_READ(SMH_ROM)
222		AM_RANGE(0x080000, 0x080fff) AM_READ(SMH_RAM)   /* Foreground (32x32 Tiles - 4 by per tile) */
223		AM_RANGE(0x082000, 0x0827ff) AM_READ(SMH_RAM)   /* Background (32x32 Tiles - 2 by per tile) */
	220	static ADDRESS_MAP_START( ddragon3_map, ADDRESS_SPACE_PROGRAM, 16 )
	221	AM_RANGE(0x000000, 0x07ffff) AM_ROM
	222	AM_RANGE(0x080000, 0x080fff) AM_RAM_WRITE(ddragon3_fg_videoram16_w) AM_BASE(&ddragon3_fg_videoram16) /* Foreground (32x32 Tiles - 4 by per tile) */
	223	AM_RANGE(0x082000, 0x0827ff) AM_RAM_WRITE(ddragon3_bg_videoram16_w) AM_BASE(&ddragon3_bg_videoram16) /* Background (32x32 Tiles - 2 by per tile) */
	224	AM_RANGE(0x0c0000, 0x0c000f) AM_WRITE(ddragon3_scroll16_w)
224	225	AM_RANGE(0x100000, 0x100001) AM_READ_PORT("P1_P2")
225	226	AM_RANGE(0x100002, 0x100003) AM_READ_PORT("SYSTEM")
226	227	AM_RANGE(0x100004, 0x100005) AM_READ_PORT("DSW")
227	228	AM_RANGE(0x100006, 0x100007) AM_READ_PORT("P3")
228		AM_RANGE(0x140000, 0x1405ff) AM_READ(SMH_RAM)   /* Palette RAM */
229		AM_RANGE(0x180000, 0x180fff) AM_READ(SMH_RAM)
230		AM_RANGE(0x1c0000, 0x1c3fff) AM_READ(SMH_RAM)   /* working RAM */
231		ADDRESS_MAP_END
232
233		static ADDRESS_MAP_START( writemem, ADDRESS_SPACE_PROGRAM, 16 )
234		AM_RANGE(0x000000, 0x07ffff) AM_WRITE(SMH_ROM)
235		AM_RANGE(0x080000, 0x080fff) AM_WRITE(ddragon3_fg_videoram16_w) AM_BASE(&ddragon3_fg_videoram16)
236		AM_RANGE(0x082000, 0x0827ff) AM_WRITE(ddragon3_bg_videoram16_w) AM_BASE(&ddragon3_bg_videoram16)
237		AM_RANGE(0x0c0000, 0x0c000f) AM_WRITE(ddragon3_scroll16_w)
238	229	AM_RANGE(0x100000, 0x10000f) AM_WRITE(ddragon3_io16_w)
239		AM_RANGE(0x140000, 0x1405ff) AM_WRITE(paletteram16_xBBBBBGGGGGRRRRR_word_w) AM_BASE(&paletteram16)
240		AM_RANGE(0x180000, 0x180fff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16) /* Sprites (16 bytes per sprite) */
241		AM_RANGE(0x1c0000, 0x1c3fff) AM_WRITE(SMH_RAM)
	230	AM_RANGE(0x140000, 0x1405ff) AM_RAM_WRITE(paletteram16_xBBBBBGGGGGRRRRR_word_w) AM_BASE(&paletteram16) /* Palette RAM */
	231	AM_RANGE(0x180000, 0x180fff) AM_RAM AM_BASE(&spriteram16)
	232	AM_RANGE(0x1c0000, 0x1c3fff) AM_RAM /* working RAM */
242	233	ADDRESS_MAP_END
243	234
244		static ADDRESS_MAP_START( dd3b_readmem, ADDRESS_SPACE_PROGRAM, 16 )
245		AM_RANGE(0x000000, 0x07ffff) AM_READ(SMH_ROM)
246		AM_RANGE(0x080000, 0x080fff) AM_READ(SMH_RAM)   /* Foreground (32x32 Tiles - 4 by per tile) */
247		AM_RANGE(0x081000, 0x081fff) AM_READ(SMH_RAM)
248		AM_RANGE(0x082000, 0x0827ff) AM_READ(SMH_RAM)   /* Background (32x32 Tiles - 2 by per tile) */
249		AM_RANGE(0x100000, 0x1005ff) AM_READ(SMH_RAM)   /* Palette RAM */
	235	static ADDRESS_MAP_START( dd3b_map, ADDRESS_SPACE_PROGRAM, 16 )
	236	AM_RANGE(0x000000, 0x07ffff) AM_ROM
	237	AM_RANGE(0x080000, 0x080fff) AM_RAM_WRITE(ddragon3_fg_videoram16_w) AM_BASE(&ddragon3_fg_videoram16) /* Foreground (32x32 Tiles - 4 by per tile) */
	238	AM_RANGE(0x081000, 0x081fff) AM_RAM AM_BASE(&spriteram16)
	239	AM_RANGE(0x082000, 0x0827ff) AM_RAM_WRITE(ddragon3_bg_videoram16_w) AM_BASE(&ddragon3_bg_videoram16) /* Background (32x32 Tiles - 2 by per tile) */
	240	AM_RANGE(0x0c0000, 0x0c000f) AM_WRITE(ddragon3_scroll16_w)
	241	AM_RANGE(0x100000, 0x1005ff) AM_RAM_WRITE(paletteram16_xBBBBBGGGGGRRRRR_word_w) AM_BASE(&paletteram16) /* Palette RAM */
	242	AM_RANGE(0x140000, 0x14000f) AM_WRITE(ddragon3_io16_w)
250	243	AM_RANGE(0x180000, 0x180001) AM_READ_PORT("IN0")
251	244	AM_RANGE(0x180002, 0x180003) AM_READ_PORT("IN1")
252	245	AM_RANGE(0x180004, 0x180005) AM_READ_PORT("IN2")
253	246	AM_RANGE(0x180006, 0x180007) AM_READ_PORT("IN3")
254		AM_RANGE(0x1c0000, 0x1c3fff) AM_READ(SMH_RAM)   /* working RAM */
	247	AM_RANGE(0x1c0000, 0x1c3fff) AM_RAM /* working RAM */
255	248	ADDRESS_MAP_END
256	249
257		static ADDRESS_MAP_START( dd3b_writemem, ADDRESS_SPACE_PROGRAM, 16 )
258		AM_RANGE(0x000000, 0x07ffff) AM_WRITE(SMH_ROM)
259		AM_RANGE(0x080000, 0x080fff) AM_WRITE(ddragon3_fg_videoram16_w) AM_BASE(&ddragon3_fg_videoram16)
260		AM_RANGE(0x081000, 0x081fff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16) /* Sprites (16 bytes per sprite) */
261		AM_RANGE(0x082000, 0x0827ff) AM_WRITE(ddragon3_bg_videoram16_w) AM_BASE(&ddragon3_bg_videoram16)
262		AM_RANGE(0x0c0000, 0x0c000f) AM_WRITE(ddragon3_scroll16_w)
263		AM_RANGE(0x100000, 0x1005ff) AM_WRITE(paletteram16_xBBBBBGGGGGRRRRR_word_w) AM_BASE(&paletteram16)
	250	static ADDRESS_MAP_START( ctribe_map, ADDRESS_SPACE_PROGRAM, 16 )
	251	AM_RANGE(0x000000, 0x07ffff) AM_ROM
	252	AM_RANGE(0x080000, 0x080fff) AM_RAM_WRITE(ddragon3_fg_videoram16_w) AM_BASE(&ddragon3_fg_videoram16) /* Foreground (32x32 Tiles - 4 by per tile) */
	253	AM_RANGE(0x081000, 0x081fff) AM_RAM AM_BASE(&spriteram16)
	254	AM_RANGE(0x082000, 0x0827ff) AM_RAM_WRITE(ddragon3_bg_videoram16_w) AM_BASE(&ddragon3_bg_videoram16) /* Background (32x32 Tiles - 2 by per tile) */
	255	AM_RANGE(0x082800, 0x082fff) AM_RAM
	256	AM_RANGE(0x0c0000, 0x0c000f) AM_READWRITE(ddragon3_scroll16_r, ddragon3_scroll16_w)
	257	AM_RANGE(0x100000, 0x1005ff) AM_RAM_WRITE(paletteram16_xxxxBBBBGGGGRRRR_word_w) AM_BASE(&paletteram16) /* Palette RAM */
264	258	AM_RANGE(0x140000, 0x14000f) AM_WRITE(ddragon3_io16_w)
265		AM_RANGE(0x1c0000, 0x1c3fff) AM_WRITE(SMH_RAM)
266		ADDRESS_MAP_END
267
268		static ADDRESS_MAP_START( ctribe_readmem, ADDRESS_SPACE_PROGRAM, 16 )
269		AM_RANGE(0x000000, 0x07ffff) AM_READ(SMH_ROM)
270		AM_RANGE(0x080000, 0x080fff) AM_READ(SMH_RAM)   /* Foreground (32x32 Tiles - 4 by per tile) */
271		AM_RANGE(0x081000, 0x081fff) AM_READ(SMH_RAM)
272		AM_RANGE(0x082000, 0x0827ff) AM_READ(SMH_RAM)   /* Background (32x32 Tiles - 2 by per tile) */
273		AM_RANGE(0x082800, 0x082fff) AM_READ(SMH_RAM)
274		AM_RANGE(0x0c0000, 0x0c000f) AM_READ(ddragon3_scroll16_r)
275		AM_RANGE(0x100000, 0x1005ff) AM_READ(SMH_RAM)   /* Palette RAM */
276	259	AM_RANGE(0x180000, 0x180001) AM_READ_PORT("IN0")
277	260	AM_RANGE(0x180002, 0x180003) AM_READ_PORT("IN1")
278	261	AM_RANGE(0x180004, 0x180005) AM_READ_PORT("IN2")
279	262	AM_RANGE(0x180006, 0x180007) AM_READ_PORT("IN3")
280		AM_RANGE(0x1c0000, 0x1c3fff) AM_READ(SMH_RAM)   /* working RAM */
	263	AM_RANGE(0x1c0000, 0x1c3fff) AM_RAM /* working RAM */
281	264	ADDRESS_MAP_END
282	265
283		static ADDRESS_MAP_START( ctribe_writemem, ADDRESS_SPACE_PROGRAM, 16 )
284		AM_RANGE(0x000000, 0x07ffff) AM_WRITE(SMH_ROM)
285		AM_RANGE(0x080000, 0x080fff) AM_WRITE(ddragon3_fg_videoram16_w) AM_BASE(&ddragon3_fg_videoram16)
286		AM_RANGE(0x081000, 0x081fff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16) /* Sprites (16 bytes per sprite) */
287		AM_RANGE(0x082000, 0x0827ff) AM_WRITE(ddragon3_bg_videoram16_w) AM_BASE(&ddragon3_bg_videoram16)
288		AM_RANGE(0x082800, 0x082fff) AM_WRITE(SMH_RAM)
289		AM_RANGE(0x0c0000, 0x0c000f) AM_WRITE(ddragon3_scroll16_w)
290		AM_RANGE(0x100000, 0x1005ff) AM_WRITE(paletteram16_xxxxBBBBGGGGRRRR_word_w) AM_BASE(&paletteram16)
291		AM_RANGE(0x140000, 0x14000f) AM_WRITE(ddragon3_io16_w)
292		AM_RANGE(0x1c0000, 0x1c3fff) AM_WRITE(SMH_RAM)
293		ADDRESS_MAP_END
294
295		static ADDRESS_MAP_START( readmem_sound, ADDRESS_SPACE_PROGRAM, 8 )
296		AM_RANGE(0x0000, 0xbfff) AM_READ(SMH_ROM)
297		AM_RANGE(0xc000, 0xc7ff) AM_READ(SMH_RAM)
298		AM_RANGE(0xc800, 0xc801) AM_DEVREAD("ym2151", ym2151_r)
299		AM_RANGE(0xd800, 0xd800) AM_DEVREAD("oki", okim6295_r)
	266	static ADDRESS_MAP_START( sound_map, ADDRESS_SPACE_PROGRAM, 8 )
	267	AM_RANGE(0x0000, 0xbfff) AM_ROM
	268	AM_RANGE(0xc000, 0xc7ff) AM_RAM
	269	AM_RANGE(0xc800, 0xc801) AM_DEVREADWRITE("ym2151", ym2151_r, ym2151_w)
	270	AM_RANGE(0xd800, 0xd800) AM_DEVREADWRITE("oki", okim6295_r, okim6295_w)
300	271	AM_RANGE(0xe000, 0xe000) AM_READ(soundlatch_r)
301		ADDRESS_MAP_END
302
303		static ADDRESS_MAP_START( writemem_sound, ADDRESS_SPACE_PROGRAM, 8 )
304		AM_RANGE(0x0000, 0xbfff) AM_WRITE(SMH_ROM)
305		AM_RANGE(0xc000, 0xc7ff) AM_WRITE(SMH_RAM)
306		AM_RANGE(0xc800, 0xc801) AM_DEVWRITE("ym2151", ym2151_w)
307		AM_RANGE(0xd800, 0xd800) AM_DEVWRITE("oki", okim6295_w)
308	272	AM_RANGE(0xe800, 0xe800) AM_DEVWRITE("oki", oki_bankswitch_w)
309	273	ADDRESS_MAP_END
310	274
311		static ADDRESS_MAP_START( ctribe_readmem_sound, ADDRESS_SPACE_PROGRAM, 8 )
312		AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM)
313		AM_RANGE(0x8000, 0x87ff) AM_READ(SMH_RAM)
314		AM_RANGE(0x8801, 0x8801) AM_DEVREAD("ym2151", ym2151_status_port_r)
315		AM_RANGE(0x9800, 0x9800) AM_DEVREAD("oki", okim6295_r)
	275	static ADDRESS_MAP_START( ctribe_sound_map, ADDRESS_SPACE_PROGRAM, 8 )
	276	AM_RANGE(0x0000, 0x7fff) AM_ROM
	277	AM_RANGE(0x8000, 0x87ff) AM_RAM
	278	AM_RANGE(0x8801, 0x8801) AM_DEVREADWRITE("ym2151", ym2151_status_port_r, ym2151_w)
	279	AM_RANGE(0x9800, 0x9800) AM_DEVREADWRITE("oki", okim6295_r, okim6295_w)
316	280	AM_RANGE(0xa000, 0xa000) AM_READ(soundlatch_r)
317	281	ADDRESS_MAP_END
318	282
319		static ADDRESS_MAP_START( ctribe_writemem_sound, ADDRESS_SPACE_PROGRAM, 8 )
320		AM_RANGE(0x0000, 0x7fff) AM_WRITE(SMH_ROM)
321		AM_RANGE(0x8000, 0x87ff) AM_WRITE(SMH_RAM)
322		AM_RANGE(0x8800, 0x8801) AM_DEVWRITE("ym2151", ym2151_w)
323		AM_RANGE(0x9800, 0x9800) AM_DEVWRITE("oki", okim6295_w)
324		ADDRESS_MAP_END
325
326	283	/*************************************
327	284	*
328	285	*  Game-specific port definitions
r4679	r4680
569	526
570	527	static void dd3_ymirq_handler(const device_config *device, int irq)
571	528	{
572		cpu_set_input_line(device->machine->cpu[1], 0 , irq ? ASSERT_LINE : CLEAR_LINE );
	529	cputag_set_input_line(device->machine, "audiocpu", 0 , irq ? ASSERT_LINE : CLEAR_LINE );
573	530	}
574	531
575	532	static const ym2151_interface ym2151_config =
r4679	r4680
592	549	{
593	550	if (scanline > 0)
594	551	video_screen_update_partial(timer->machine->primary_screen, scanline - 1);
595		cpu_set_input_line(timer->machine->cpu[0], 5, ASSERT_LINE);
	552	cputag_set_input_line(timer->machine, "maincpu", 5, ASSERT_LINE);
596	553	}
597	554
598	555	/* Vblank is raised on scanline 248 */
599	556	if (scanline == 248)
600	557	{
601	558	video_screen_update_partial(timer->machine->primary_screen, scanline - 1);
602		cpu_set_input_line(timer->machine->cpu[0], 6, ASSERT_LINE);
	559	cputag_set_input_line(timer->machine, "maincpu", 6, ASSERT_LINE);
603	560	}
604	561	}
605	562
r4679	r4680
612	569	static MACHINE_DRIVER_START( ddragon3 )
613	570	/* basic machine hardware */
614	571	MDRV_CPU_ADD("maincpu", M68000, XTAL_20MHz / 2)
615		MDRV_CPU_PROGRAM_MAP(readmem, writemem)
	572	MDRV_CPU_PROGRAM_MAP(ddragon3_map,0)
616	573	MDRV_TIMER_ADD_SCANLINE("scantimer", ddragon3_scanline, "screen", 0, 1)
617	574
618	575	MDRV_CPU_ADD("audiocpu", Z80, XTAL_3_579545MHz)
619		MDRV_CPU_PROGRAM_MAP(readmem_sound, writemem_sound)
	576	MDRV_CPU_PROGRAM_MAP(sound_map,0)
620	577
621	578	/* video hardware */
622	579	MDRV_SCREEN_ADD("screen", RASTER)
r4679	r4680
647	604	MDRV_IMPORT_FROM(ddragon3)
648	605
649	606	MDRV_CPU_MODIFY("maincpu")
650		MDRV_CPU_PROGRAM_MAP(dd3b_readmem, dd3b_writemem)
	607	MDRV_CPU_PROGRAM_MAP(dd3b_map,0)
651	608	MACHINE_DRIVER_END
652	609
653	610	static MACHINE_DRIVER_START( ctribe )
654	611	MDRV_IMPORT_FROM(ddragon3)
655	612
656	613	MDRV_CPU_MODIFY("maincpu")
657		MDRV_CPU_PROGRAM_MAP(ctribe_readmem,ctribe_writemem)
	614	MDRV_CPU_PROGRAM_MAP(ctribe_map,0)
658	615
659	616	MDRV_CPU_MODIFY("audiocpu")
660		MDRV_CPU_PROGRAM_MAP(ctribe_readmem_sound,ctribe_writemem_sound)
	617	MDRV_CPU_PROGRAM_MAP(ctribe_sound_map,0)
661	618
662	619	MDRV_VIDEO_UPDATE(ctribe)
663	620
r4679	r4680
842	799	ROM_REGION( 0x80000, "maincpu", 0 )   /* 64k for cpu code */
843	800	ROM_LOAD16_BYTE( "28a16-2.ic26", 0x00001, 0x20000, CRC(c46b2e63) SHA1(86ace715dca48c78a46da1d102de47e5f948a86c) )
844	801	ROM_LOAD16_BYTE( "28a15-2.ic25", 0x00000, 0x20000, CRC(3221c755) SHA1(0f6fe5cd6947f6547585eedb7fc5e6af8544b1f7) )
845		ROM_LOAD16_BYTE( "ct_ep2.ic104", 0x40001, 0x10000, CRC(8c2c6dbd) SHA1(b99b9be6e0bdc8340fedd258819c4df587926a84) )
	802	ROM_LOAD16_BYTE( "28j17-0.104", 0x40001, 0x10000, CRC(8c2c6dbd) SHA1(b99b9be6e0bdc8340fedd258819c4df587926a84) )
846	803	/* No EVEN rom! */
847	804
848	805	ROM_REGION( 0x10000, "audiocpu", 0 )   /* 64k for sound cpu code */
r4679	r4680
876	833	ROM_REGION( 0x80000, "maincpu", 0 )   /* 64k for cpu code */
877	834	ROM_LOAD16_BYTE( "28a16-2.ic26", 0x00001, 0x20000, CRC(f00f8443) SHA1(3c099b6bea9956cc60ce4a9a5d790ac2bf7d77bd) )
878	835	ROM_LOAD16_BYTE( "28a15-2.ic25", 0x00000, 0x20000, CRC(dd70079f) SHA1(321b523fefec2a962d0afa20b33428e7caea8958) )
879		ROM_LOAD16_BYTE( "ct_ep2.ic104", 0x40001, 0x10000, CRC(8c2c6dbd) SHA1(b99b9be6e0bdc8340fedd258819c4df587926a84) )
	836	ROM_LOAD16_BYTE( "28j17-0.104", 0x40001, 0x10000, CRC(8c2c6dbd) SHA1(b99b9be6e0bdc8340fedd258819c4df587926a84) )
880	837	/* No EVEN rom! */
881	838
882	839	ROM_REGION( 0x10000, "audiocpu", 0 )   /* 64k for sound cpu code */
r4679	r4680
906	863	ROM_LOAD( "28.ic44", 0x0000, 0x0100, CRC(964329ef) SHA1(f26846571a16d27b726f689049deb0188103aadb) )
907	864	ROM_END
908	865
	866	ROM_START( ctribej )
	867	ROM_REGION( 0x80000, "maincpu", 0 )   /* 64k for cpu code */
	868	ROM_LOAD16_BYTE( "28j16-02.26", 0x00001, 0x20000, CRC(658b8568) SHA1(899682f6ab28b184654c51c1169216974043f1b9) )
	869	ROM_LOAD16_BYTE( "28j15-12.25", 0x00000, 0x20000, CRC(50aac7e7) SHA1(af77107f325f9b45a92c544328d3073ed1db5465) )
	870	ROM_LOAD16_BYTE( "28j17-0.104", 0x40001, 0x10000, CRC(8c2c6dbd) SHA1(b99b9be6e0bdc8340fedd258819c4df587926a84) )
	871	/* No EVEN rom! */
	872
	873	ROM_REGION( 0x10000, "audiocpu", 0 )   /* 64k for sound cpu code */
	874	ROM_LOAD( "28j10-0.89", 0x00000, 0x8000, CRC(4346de13) SHA1(67c6de90ba31a325f03e64d28c9391a315ee359c) )
	875
	876	ROM_REGION( 0x200000, "gfx1", ROMREGION_DISPOSE )   /* Background */
	877	ROM_LOAD( "28j7-0.ic11",  0x000000, 0x40000, CRC(a8b773f1) SHA1(999e41dfeb3fb937da769c4a33bb29bf4076dc63) )
	878	ROM_LOAD( "28j6-0.ic13",  0x040000, 0x40000, CRC(617530fc) SHA1(b9155ed0ae1437bf4d0b7a95e769bc05a820ecec) )
	879	ROM_LOAD( "28j5-0.ic12",  0x080000, 0x40000, CRC(cef0a821) SHA1(c7a35048d5ebf3f09abf9d27f91d12adc03befeb) )
	880	ROM_LOAD( "28j4-0.ic14",  0x0c0000, 0x40000, CRC(b84fda09) SHA1(3ae0c0ec6c398dea17e248b017ea3e2f6c3571e1) )
	881
	882	ROM_REGION( 0x400000, "gfx2", ROMREGION_DISPOSE )   /* Sprites */
	883	ROM_LOAD( "28j3-0.ic77",  0x000000, 0x80000, CRC(1ac2a461) SHA1(17436f5dcf29041ca5f470dfae538e4fc12153cc) )
	884	ROM_LOAD( "28j14-0.60",   0x080000, 0x10000, CRC(6869050a) SHA1(34bdab383f2b0c5327306d419f65ce7974e1b7ba) )
	885	ROM_LOAD( "28j2-0.ic78",  0x100000, 0x80000, CRC(8c796707) SHA1(7417ad0413083876ed65a8612845ccb0d2717530) )
	886	ROM_LOAD( "28j13-0.61",   0x180000, 0x10000, CRC(8b8addea) SHA1(87bc1c843a51d232d339735a85946dde799a9ac5) )
	887	ROM_LOAD( "28j1-0.ic97",  0x200000, 0x80000, CRC(1c9badbd) SHA1(d28f6d684d88448eaa3feae0bba2f5a836d89bd7) )
	888	ROM_LOAD( "28j12-0.85",   0x280000, 0x10000, CRC(422b041c) SHA1(fa19dce6ee84b5a2ad729963073abe8919cb1689) )
	889	ROM_LOAD( "28j0-0.ic98",  0x300000, 0x80000, CRC(ba73c49e) SHA1(830099027ede1f7c56bb0bf3cdef3018b92e0b87) )
	890	ROM_LOAD( "28j11-0.86",   0x380000, 0x10000, CRC(4a391c5b) SHA1(520aa49808a3e7faf32efbb6b0ec22f90e5b4890) )
	891
	892	ROM_REGION( 0x040000, "oki", 0 ) /* ADPCM Samples */
	893	ROM_LOAD( "28j9-0.ic83", 0x00000, 0x20000, CRC(f92a7f4a) SHA1(3717ef64876be9ada378b449749918ce9072073a) )
	894	ROM_LOAD( "28j8-0.ic82", 0x20000, 0x20000, CRC(1a3a0b39) SHA1(8847530027cf4be03ffbc6d78dee97b459d03a04) )
	895
	896	ROM_REGION( 0x0100, "proms", 0 )
	897	ROM_LOAD( "28.ic44", 0x0000, 0x0100, CRC(964329ef) SHA1(f26846571a16d27b726f689049deb0188103aadb) )
	898	ROM_END
	899
909	900	ROM_START( ctribeb )
910	901	ROM_REGION( 0x80000, "maincpu", 0 )   /* 64k for cpu code */
911	902	ROM_LOAD16_BYTE( "ct_ep1.rom", 0x00001, 0x20000, CRC(9cfa997f) SHA1(ee49b4b9e9cd29616f244fdf3912ef743e2404ce) )
r4679	r4680
996	987	GAME( 1990, ddrago3b, ddragon3, ddrago3b, ddrago3b, 0, ROT0, "bootleg", "Double Dragon 3 - The Rosetta Stone (bootleg)", GAME_SUPPORTS_SAVE )
997	988	GAME( 1990, ctribe,   0,        ctribe,   ctribe,   0, ROT0, "Technos Japan", "The Combatribes (US)", GAME_SUPPORTS_SAVE )
998	989	GAME( 1990, ctribe1,  ctribe,   ctribe,   ctribe,   0, ROT0, "Technos Japan", "The Combatribes (US Set 1?)", GAME_SUPPORTS_SAVE )
	990	GAME( 1990, ctribej,  ctribe,   ctribe,   ctribe,   0, ROT0, "Technos Japan", "The Combatribes (Japan)", GAME_SUPPORTS_SAVE )
999	991	GAME( 1990, ctribeb,  ctribe,   ctribe,   ctribeb,  0, ROT0, "bootleg", "The Combatribes (bootleg Set 1)", GAME_SUPPORTS_SAVE )
1000	992	GAME( 1990, ctribb2,  ctribe,   ctribe,   ctribeb,  0, ROT0, "bootleg", "The Combatribes (bootleg Set 2)", GAME_SUPPORTS_SAVE )

src/mame/drivers/sprint2.c

r4679	r4680
246	246	}
247	247
248	248
249		static ADDRESS_MAP_START( readmem, ADDRESS_SPACE_PROGRAM, 8 )
250		AM_RANGE(0x0000, 0x03ff) AM_READ(sprint2_wram_r)
251		AM_RANGE(0x0400, 0x07ff) AM_READ(SMH_RAM)
	249	static ADDRESS_MAP_START( sprint2_map, ADDRESS_SPACE_PROGRAM, 8 )
	250	AM_RANGE(0x0000, 0x03ff) AM_READWRITE(sprint2_wram_r,sprint2_wram_w)
	251	AM_RANGE(0x0400, 0x07ff) AM_RAM_WRITE(sprint2_video_ram_w) AM_BASE(&sprint2_video_ram)
252	252	AM_RANGE(0x0818, 0x081f) AM_READ(sprint2_input_A_r)
253	253	AM_RANGE(0x0828, 0x082f) AM_READ(sprint2_input_B_r)
254	254	AM_RANGE(0x0830, 0x0837) AM_READ(sprint2_dip_r)
r4679	r4680
256	256	AM_RANGE(0x0880, 0x08bf) AM_READ(sprint2_steering1_r)
257	257	AM_RANGE(0x08c0, 0x08ff) AM_READ(sprint2_steering2_r)
258	258	AM_RANGE(0x0c00, 0x0fff) AM_READ(sprint2_sync_r)
259		AM_RANGE(0x1000, 0x13ff) AM_READ(sprint2_collision1_r)
260		AM_RANGE(0x1400, 0x17ff) AM_READ(sprint2_collision2_r)
261		AM_RANGE(0x1800, 0x1800) AM_READNOP  /* debugger ROM location? */
262		AM_RANGE(0x2000, 0x3fff) AM_READ(SMH_ROM)
263		AM_RANGE(0xe000, 0xffff) AM_READ(SMH_ROM)
264		ADDRESS_MAP_END
265
266
267		static ADDRESS_MAP_START( writemem, ADDRESS_SPACE_PROGRAM, 8 )
268		AM_RANGE(0x0000, 0x03ff) AM_WRITE(sprint2_wram_w)
269		AM_RANGE(0x0400, 0x07ff) AM_WRITE(sprint2_video_ram_w) AM_BASE(&sprint2_video_ram)
270	259	AM_RANGE(0x0c00, 0x0c0f) AM_DEVWRITE("discrete", sprint2_attract_w)
271	260	AM_RANGE(0x0c10, 0x0c1f) AM_DEVWRITE("discrete", sprint2_skid1_w)
272	261	AM_RANGE(0x0c20, 0x0c2f) AM_DEVWRITE("discrete", sprint2_skid2_w)
r4679	r4680
279	268	AM_RANGE(0x0e00, 0x0e7f) AM_WRITE(sprint2_steering_reset1_w)
280	269	AM_RANGE(0x0e80, 0x0eff) AM_WRITE(sprint2_steering_reset2_w)
281	270	AM_RANGE(0x0f00, 0x0f7f) AM_DEVWRITE("discrete", sprint2_noise_reset_w)
282		AM_RANGE(0x2000, 0x3fff) AM_WRITE(SMH_ROM)
283		AM_RANGE(0xe000, 0xffff) AM_WRITE(SMH_ROM)
	271	AM_RANGE(0x1000, 0x13ff) AM_READ(sprint2_collision1_r)
	272	AM_RANGE(0x1400, 0x17ff) AM_READ(sprint2_collision2_r)
	273	AM_RANGE(0x1800, 0x1800) AM_READNOP  /* debugger ROM location? */
	274	AM_RANGE(0x2000, 0x3fff) AM_ROM
	275	AM_RANGE(0xe000, 0xffff) AM_ROM
284	276	ADDRESS_MAP_END
285	277
286	278
r4679	r4680
504	496
505	497	/* basic machine hardware */
506	498	MDRV_CPU_ADD("maincpu", M6502, 12096000 / 16)
507		MDRV_CPU_PROGRAM_MAP(readmem, writemem)
	499	MDRV_CPU_PROGRAM_MAP(sprint2_map, 0)
508	500	MDRV_CPU_VBLANK_INT("screen", sprint2)
509	501	MDRV_WATCHDOG_VBLANK_INIT(8)
510	502

src/mame/drivers/86lions.c

r4679	r4680
82	82	}
83	83
84	84
85		static ADDRESS_MAP_START( readmem, ADDRESS_SPACE_PROGRAM, 8 )
	85	static ADDRESS_MAP_START( lions_map, ADDRESS_SPACE_PROGRAM, 8 )
86	86	AM_RANGE(0x0000, 0x07ff) AM_RAM AM_BASE(&lions_vram)
87	87	AM_RANGE(0x0800, 0x0fff) AM_RAM
88	88	AM_RANGE(0x1800, 0x1800) AM_DEVWRITE("crtc", mc6845_address_w)
r4679	r4680
323	323	static MACHINE_DRIVER_START( lions )
324	324	/* basic machine hardware */
325	325	MDRV_CPU_ADD("maincpu", M6809, MAIN_CLOCK/4)       /* 3 MHz.(guess) */
326		MDRV_CPU_PROGRAM_MAP(readmem,0)
	326	MDRV_CPU_PROGRAM_MAP(lions_map,0)
327	327	MDRV_CPU_VBLANK_INT("screen", lions_irq )
328	328
329	329	/* video hardware */

src/mame/drivers/exterm.c

r4679	r4680
117	117
118	118	static WRITE16_HANDLER( exterm_host_data_w )
119	119	{
120		tms34010_host_w(space->machine->cpu[1], offset / TOWORD(0x00100000), data);
	120	tms34010_host_w(cputag_get_cpu(space->machine, "slave"), offset / TOWORD(0x00100000), data);
121	121	}
122	122
123	123
124	124	static READ16_HANDLER( exterm_host_data_r )
125	125	{
126		return tms34010_host_r(space->machine->cpu[1], offset / TOWORD(0x00100000));
	126	return tms34010_host_r(cputag_get_cpu(space->machine, "slave"), offset / TOWORD(0x00100000));
127	127	}
128	128
129	129
r4679	r4680
198	198	{
199	199	/* Bit 13 = Resets the slave CPU */
200	200	if ((data & 0x2000) && !(last & 0x2000))
201		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_RESET, PULSE_LINE);
	201	cputag_set_input_line(space->machine, "slave", INPUT_LINE_RESET, PULSE_LINE);
202	202
203	203	/* Bits 14-15 = Coin counters */
204	204	coin_counter_w(0, data & 0x8000);
r4679	r4680
213	213	{
214	214	/* data is latched independently for both sound CPUs */
215	215	master_sound_latch = slave_sound_latch = param;
216		cpu_set_input_line(machine->cpu[2], M6502_IRQ_LINE, ASSERT_LINE);
217		cpu_set_input_line(machine->cpu[3], M6502_IRQ_LINE, ASSERT_LINE);
	216	cputag_set_input_line(machine, "audiocpu", M6502_IRQ_LINE, ASSERT_LINE);
	217	cputag_set_input_line(machine, "audioslave", M6502_IRQ_LINE, ASSERT_LINE);
218	218	}
219	219
220	220
r4679	r4680
236	236	{
237	237	/* bit 0 of the sound control determines if the NMI is actually delivered */
238	238	if (sound_control & 0x01)
239		cpu_set_input_line(machine->cpu[2], INPUT_LINE_NMI, PULSE_LINE);
	239	cputag_set_input_line(machine, "audiocpu", INPUT_LINE_NMI, PULSE_LINE);
240	240	}
241	241
242	242
r4679	r4680
260	260	static READ8_HANDLER( sound_master_latch_r )
261	261	{
262	262	/* read latch and clear interrupt */
263		cpu_set_input_line(space->machine->cpu[2], M6502_IRQ_LINE, CLEAR_LINE);
	263	cputag_set_input_line(space->machine, "audiocpu", M6502_IRQ_LINE, CLEAR_LINE);
264	264	return master_sound_latch;
265	265	}
266	266
r4679	r4680
268	268	static READ8_HANDLER( sound_slave_latch_r )
269	269	{
270	270	/* read latch and clear interrupt */
271		cpu_set_input_line(space->machine->cpu[3], M6502_IRQ_LINE, CLEAR_LINE);
	271	cputag_set_input_line(space->machine, "audioslave", M6502_IRQ_LINE, CLEAR_LINE);
272	272	return slave_sound_latch;
273	273	}
274	274
r4679	r4680
284	284	static READ8_HANDLER( sound_nmi_to_slave_r )
285	285	{
286	286	/* a read from here triggers an NMI pulse to the slave */
287		cpu_set_input_line(space->machine->cpu[3], INPUT_LINE_NMI, PULSE_LINE);
	287	cputag_set_input_line(space->machine, "audioslave", INPUT_LINE_NMI, PULSE_LINE);
288	288	return 0xff;
289	289	}
290	290

src/mame/drivers/dragrace.c

r4679	r4680
175	175	}
176	176
177	177
178		static ADDRESS_MAP_START( dragrace_readmem, ADDRESS_SPACE_PROGRAM, 8 )
179		AM_RANGE(0x0080, 0x00ff) AM_READ(SMH_RAM)
	178	static ADDRESS_MAP_START( dragrace_map, ADDRESS_SPACE_PROGRAM, 8 )
	179	AM_RANGE(0x0080, 0x00ff) AM_RAM
180	180	AM_RANGE(0x0800, 0x083f) AM_READ(dragrace_input_r)
181		AM_RANGE(0x0c00, 0x0c00) AM_READ(dragrace_steering_r)
182		AM_RANGE(0x0d00, 0x0d00) AM_READ(dragrace_scanline_r)
183		AM_RANGE(0x1000, 0x1fff) AM_READ(SMH_ROM) /* program */
184		AM_RANGE(0xf800, 0xffff) AM_READ(SMH_ROM) /* program mirror */
185		ADDRESS_MAP_END
186
187		static ADDRESS_MAP_START( dragrace_writemem, ADDRESS_SPACE_PROGRAM, 8 )
188		AM_RANGE(0x0080, 0x00ff) AM_WRITE(SMH_RAM)
189	181	AM_RANGE(0x0900, 0x091f) AM_WRITE(dragrace_misc_w)
190	182	AM_RANGE(0x0920, 0x093f) AM_WRITE(dragrace_misc_clear_w)
191	183	AM_RANGE(0x0a00, 0x0aff) AM_WRITE(SMH_RAM) AM_BASE(&dragrace_playfield_ram)
192	184	AM_RANGE(0x0b00, 0x0bff) AM_WRITE(SMH_RAM) AM_BASE(&dragrace_position_ram)
	185	AM_RANGE(0x0c00, 0x0c00) AM_READ(dragrace_steering_r)
	186	AM_RANGE(0x0d00, 0x0d00) AM_READ(dragrace_scanline_r)
193	187	AM_RANGE(0x0e00, 0x0eff) AM_WRITE(watchdog_reset_w)
194		AM_RANGE(0x1000, 0x1fff) AM_WRITE(SMH_ROM) /* program */
195		AM_RANGE(0xf800, 0xffff) AM_WRITE(SMH_ROM) /* program mirror */
	188	AM_RANGE(0x1000, 0x1fff) AM_ROM /* program */
	189	AM_RANGE(0xf800, 0xffff) AM_ROM /* program mirror */
196	190	ADDRESS_MAP_END
197	191
198	192
r4679	r4680
332	326
333	327	/* basic machine hardware */
334	328	MDRV_CPU_ADD("maincpu", M6800, 12096000 / 12)
335		MDRV_CPU_PROGRAM_MAP(dragrace_readmem, dragrace_writemem)
	329	MDRV_CPU_PROGRAM_MAP(dragrace_map,0)
336	330	MDRV_CPU_VBLANK_INT_HACK(irq0_line_hold, 4)
337	331	MDRV_WATCHDOG_VBLANK_INIT(8)
338	332

src/mame/drivers/discoboy.c

r4679	r4680
203	203
204	204	static WRITE8_HANDLER( discoboy_port_03_w ) // sfx? (to sound cpu)
205	205	{
206		//  printf("unk discoboy_port_03_w %02x\n",data);
207		//  cpu_set_input_line(space->machine->cpu[1],INPUT_LINE_NMI,HOLD_LINE);
208		soundlatch_w(space,0,data);
209		cpu_set_input_line(space->machine->cpu[1],0,HOLD_LINE);
	206	//  printf("unk discoboy_port_03_w %02x\n", data);
	207	//  cputag_set_input_line(space->machine, "audiocpu", INPUT_LINE_NMI, HOLD_LINE);
	208	soundlatch_w(space, 0, data);
	209	cputag_set_input_line(space->machine, "audiocpu", 0, HOLD_LINE);
210	210	}
211	211
212	212	static WRITE8_HANDLER( discoboy_port_06_w )
r4679	r4680
285	285	discoboy_ram_att[offset] = data;
286	286	}
287	287
288		static ADDRESS_MAP_START( readmem, ADDRESS_SPACE_PROGRAM, 8 )
289		AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM)
290		AM_RANGE(0x8000, 0xbfff) AM_READ(SMH_BANK1)
291		AM_RANGE(0xc000, 0xc7ff) AM_READ(rambank_r)
292		AM_RANGE(0xc800, 0xcfff) AM_READ(discoboy_ram_att_r)
293		AM_RANGE(0xd000, 0xdfff) AM_READ(rambank2_r)
294		AM_RANGE(0xe000, 0xefff) AM_READ(SMH_RAM)
295		AM_RANGE(0xf000, 0xffff) AM_READ(SMH_RAM)
	288	static ADDRESS_MAP_START( discoboy_map, ADDRESS_SPACE_PROGRAM, 8 )
	289	AM_RANGE(0x0000, 0x7fff) AM_ROM
	290	AM_RANGE(0x8000, 0xbfff) AM_ROMBANK(1)
	291	AM_RANGE(0xc000, 0xc7ff) AM_READWRITE(rambank_r, rambank_w)
	292	AM_RANGE(0xc800, 0xcfff) AM_READWRITE(discoboy_ram_att_r, discoboy_ram_att_w)
	293	AM_RANGE(0xd000, 0xdfff) AM_READWRITE(rambank2_r, rambank2_w)
	294	AM_RANGE(0xe000, 0xefff) AM_RAM
	295	AM_RANGE(0xf000, 0xffff) AM_RAM
296	296	ADDRESS_MAP_END
297	297
298		static ADDRESS_MAP_START( writemem, ADDRESS_SPACE_PROGRAM, 8 )
299		AM_RANGE(0x0000, 0xbfff) AM_WRITE(SMH_ROM)
300		AM_RANGE(0xc000, 0xc7ff) AM_WRITE(rambank_w)
301		AM_RANGE(0xc800, 0xcfff) AM_WRITE(discoboy_ram_att_w)
302		AM_RANGE(0xd000, 0xdfff) AM_WRITE(rambank2_w)
303		AM_RANGE(0xe000, 0xefff) AM_WRITE(SMH_RAM)
304		AM_RANGE(0xf000, 0xffff) AM_WRITE(SMH_RAM)
305		ADDRESS_MAP_END
306	298
307
308	299	static READ8_HANDLER( discoboy_port_06_r )
309	300	{
310	301	return 0x00;
r4679	r4680
333	324	//  adpcm_data = (adpcm_data << 4) & 0xf0;
334	325	}
335	326
336		static ADDRESS_MAP_START( sound_readmem, ADDRESS_SPACE_PROGRAM, 8 )
337		AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM)
338		AM_RANGE(0xf000, 0xf7ff) AM_READ(SMH_RAM)
	327	static ADDRESS_MAP_START( sound_map, ADDRESS_SPACE_PROGRAM, 8 )
	328	AM_RANGE(0x0000, 0x7fff) AM_ROM
	329	AM_RANGE(0xf000, 0xf7ff) AM_RAM
	330	AM_RANGE(0xec00, 0xec01) AM_DEVWRITE("ym", ym3812_w)
339	331	AM_RANGE(0xf800, 0xf800) AM_READ(soundlatch_r)
340	332	ADDRESS_MAP_END
341	333
342		static ADDRESS_MAP_START( sound_writemem, ADDRESS_SPACE_PROGRAM, 8 )
343		AM_RANGE(0x0000, 0x7fff) AM_WRITE(SMH_ROM)
344		AM_RANGE(0xf000, 0xf7ff) AM_WRITE(SMH_RAM)
345		AM_RANGE(0xec00, 0xec01) AM_DEVWRITE("ym", ym3812_w)
346		ADDRESS_MAP_END
347	334
348
349	335	static INPUT_PORTS_START( discoboy )
350	336	PORT_START("DSWA")
351	337	PORT_DIPNAME( 0x07, 0x07, DEF_STR( Coinage ) ) PORT_DIPLOCATION("SWA:6,7,8")
r4679	r4680
460	446	static MACHINE_DRIVER_START( discoboy )
461	447	/* basic machine hardware */
462	448	MDRV_CPU_ADD("maincpu", Z80,12000000/2)       /* 6 MHz? */
463		MDRV_CPU_PROGRAM_MAP(readmem,writemem)
	449	MDRV_CPU_PROGRAM_MAP(discoboy_map,0)
464	450	MDRV_CPU_IO_MAP(io_map,0)
465	451	MDRV_CPU_VBLANK_INT("screen", irq0_line_hold)
466	452
467	453	MDRV_CPU_ADD("audiocpu", Z80,10000000/2)       /* 5 MHz? */
468		MDRV_CPU_PROGRAM_MAP(sound_readmem,sound_writemem)
	454	MDRV_CPU_PROGRAM_MAP(sound_map,0)
469	455	//  MDRV_CPU_IO_MAP(sound_io_map,0)
470	456	//  MDRV_CPU_VBLANK_INT("screen", irq0_line_hold)
471	457	MDRV_CPU_VBLANK_INT_HACK(nmi_line_pulse,32)
r4679	r4680
503	489	{
504	490	UINT8 *ROM = memory_region(machine, "maincpu");
505	491
506		discoboy_ram_part1 = auto_malloc(0x800);
507		discoboy_ram_part2 = auto_malloc(0x800);
508		discoboy_ram_att = auto_malloc(0x800);
	492	discoboy_ram_part1 = auto_alloc_array(machine, UINT8, 0x800);
	493	discoboy_ram_part2 = auto_alloc_array(machine, UINT8, 0x800);
	494	discoboy_ram_att = auto_alloc_array(machine, UINT8, 0x800);
509	495
510		discoboy_ram_part3 = auto_malloc(0x1000);
511		discoboy_ram_part4 = auto_malloc(0x1000);
	496	discoboy_ram_part3 = auto_alloc_array(machine, UINT8, 0x1000);
	497	discoboy_ram_part4 = auto_alloc_array(machine, UINT8, 0x1000);
512	498
513	499	memset(discoboy_ram_part1,0,0x800);
514	500	memset(discoboy_ram_part2,0,0x800);
r4679	r4680
556	542
557	543
558	544	GAME( 1993, discoboy,  0,    discoboy, discoboy, discoboy, ROT270, "Soft Art Co.", "Disco Boy", 0 )
559

src/mame/drivers/mediagx.c

r4679	r4680
732	732	{
733	733	UINT8 data = at_pages[offset % 0x10];
734	734
735		switch(offset % 8) {
	735	switch(offset % 8)
	736	{
736	737	case 1:
737	738	data = dma_offset[(offset / 8) & 1][2];
738	739	break;
r4679	r4680
754	755	{
755	756	at_pages[offset % 0x10] = data;
756	757
757		switch(offset % 8) {
	758	switch(offset % 8)
	759	{
758	760	case 1:
759	761	dma_offset[(offset / 8) & 1][2] = data;
760	762	break;
r4679	r4680
773	775
774	776	static DMA8237_MEM_READ( pc_dma_read_byte )
775	777	{
776		const address_space *space = cpu_get_address_space(device->machine->cpu[0], ADDRESS_SPACE_PROGRAM);
	778	const address_space *space = cputag_get_address_space(device->machine, "maincpu", ADDRESS_SPACE_PROGRAM);
777	779	offs_t page_offset = (((offs_t) dma_offset[0][channel]) << 16)
778	780	& 0xFF0000;
779	781
r4679	r4680
783	785
784	786	static DMA8237_MEM_WRITE( pc_dma_write_byte )
785	787	{
786		const address_space *space = cpu_get_address_space(device->machine->cpu[0], ADDRESS_SPACE_PROGRAM);
	788	const address_space *space = cputag_get_address_space(device->machine, "maincpu", ADDRESS_SPACE_PROGRAM);
787	789	offs_t page_offset = (((offs_t) dma_offset[0][channel]) << 16)
788	790	& 0xFF0000;
789	791
r4679	r4680
955	957	{
956	958	UINT8 *rom = memory_region(machine, "bios");
957	959
958		cpu_set_irq_callback(machine->cpu[0], irq_callback);
	960	cpu_set_irq_callback(cputag_get_cpu(machine, "maincpu"), irq_callback);
959	961
960	962	memcpy(bios_ram, rom, 0x40000);
961		device_reset(machine->cpu[0]);
	963	device_reset(cputag_get_cpu(machine, "maincpu"));
962	964
963		dacl = auto_malloc(65536 * sizeof(INT16));
964		dacr = auto_malloc(65536 * sizeof(INT16));
	965	dacl = auto_alloc_array(machine, INT16, 65536);
	966	dacr = auto_alloc_array(machine, INT16, 65536);
965	967
966	968	sound_timer = timer_alloc(machine, sound_timer_callback, NULL);
967	969	timer_adjust_oneshot(sound_timer, ATTOTIME_IN_MSEC(10), 0);
r4679	r4680
978	980	*
979	981	*************************************************************/
980	982
981		static PIC8259_SET_INT_LINE( mediagx_pic8259_1_set_int_line ) {
982		cpu_set_input_line(device->machine->cpu[0], 0, interrupt ? HOLD_LINE : CLEAR_LINE);
	983	static PIC8259_SET_INT_LINE( mediagx_pic8259_1_set_int_line )
	984	{
	985	cputag_set_input_line(device->machine, "maincpu", 0, interrupt ? HOLD_LINE : CLEAR_LINE);
983	986	}
984	987
985	988
986		static PIC8259_SET_INT_LINE( mediagx_pic8259_2_set_int_line ) {
	989	static PIC8259_SET_INT_LINE( mediagx_pic8259_2_set_int_line )
	990	{
987	991	pic8259_set_irq_line( mediagx_devices.pic8259_1, 2, interrupt);
988	992	}
989	993
r4679	r4680
1079	1083
1080	1084	static void set_gate_a20(running_machine *machine, int a20)
1081	1085	{
1082		cpu_set_input_line(machine->cpu[0], INPUT_LINE_A20, a20);
	1086	cputag_set_input_line(machine, "maincpu", INPUT_LINE_A20, a20);
1083	1087	}
1084	1088
1085	1089	static void keyboard_interrupt(running_machine *machine, int state)
r4679	r4680
1092	1096	pic8259_set_irq_line(mediagx_devices.pic8259_2, 6, state);
1093	1097	}
1094	1098
1095		static int mediagx_get_out2(running_machine *machine) {
	1099	static int mediagx_get_out2(running_machine *machine)
	1100	{
1096	1101	return pit8253_get_output( mediagx_devices.pit8254, 2 );
1097	1102	}
1098	1103
r4679	r4680
1101	1106	KBDC8042_AT386, set_gate_a20, keyboard_interrupt, mediagx_get_out2
1102	1107	};
1103	1108
1104		static void mediagx_set_keyb_int(running_machine *machine, int state) {
	1109	static void mediagx_set_keyb_int(running_machine *machine, int state)
	1110	{
1105	1111	pic8259_set_irq_line(mediagx_devices.pic8259_1, 1, state);
1106	1112	}
1107	1113
r4679	r4680
1178	1184	speedup_count = count;
1179	1185
1180	1186	for (i = 0; i < count; i++)
1181		memory_install_read32_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), entries[i].offset, entries[i].offset + 3, 0, 0, speedup_handlers[i]);
	1187	memory_install_read32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), entries[i].offset, entries[i].offset + 3, 0, 0, speedup_handlers[i]);
1182	1188
1183	1189	#ifdef MAME_DEBUG
1184	1190	add_exit_callback(machine, report_speedups);

src/mame/drivers/orbit.c

r4679	r4680
40	40	{
41	41	int scanline = param;
42	42	int nmistate = (scanline & 32) && (orbit_misc_flags & 4);
43		cpu_set_input_line(timer->machine->cpu[0], INPUT_LINE_NMI, nmistate ? ASSERT_LINE : CLEAR_LINE);
	43	cputag_set_input_line(timer->machine, "maincpu", INPUT_LINE_NMI, nmistate ? ASSERT_LINE : CLEAR_LINE);
44	44	}
45	45
46	46
47	47	static TIMER_CALLBACK( irq_off )
48	48	{
49		cpu_set_input_line(machine->cpu[0], 0, CLEAR_LINE);
	49	cputag_set_input_line(machine, "maincpu", 0, CLEAR_LINE);
50	50	}
51	51
52	52

src/mame/drivers/policetr.c

r4679	r4680
121	121
122	122	static TIMER_CALLBACK( irq5_gen )
123	123	{
124		cpu_set_input_line(machine->cpu[0], R3000_IRQ5, ASSERT_LINE);
	124	cputag_set_input_line(machine, "audiocpu", R3000_IRQ5, ASSERT_LINE);
125	125	}
126	126
127	127
r4679	r4680
701	701
702	702	static DRIVER_INIT( policetr )
703	703	{
704		speedup_data = memory_install_write32_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x00000fc8, 0x00000fcb, 0, 0, speedup_w);
	704	speedup_data = memory_install_write32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x00000fc8, 0x00000fcb, 0, 0, speedup_w);
705	705	speedup_pc = 0x1fc028ac;
706	706	}
707	707
708	708	static DRIVER_INIT( plctr13b )
709	709	{
710		speedup_data = memory_install_write32_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x00000fc8, 0x00000fcb, 0, 0, speedup_w);
	710	speedup_data = memory_install_write32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x00000fc8, 0x00000fcb, 0, 0, speedup_w);
711	711	speedup_pc = 0x1fc028bc;
712	712	}
713	713
714	714
715	715	static DRIVER_INIT( sshooter )
716	716	{
717		speedup_data = memory_install_write32_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x00018fd8, 0x00018fdb, 0, 0, speedup_w);
	717	speedup_data = memory_install_write32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x00018fd8, 0x00018fdb, 0, 0, speedup_w);
718	718	speedup_pc = 0x1fc03470;
719	719	}
720	720
721	721	static DRIVER_INIT( sshoot12 )
722	722	{
723		speedup_data = memory_install_write32_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x00018fd8, 0x00018fdb, 0, 0, speedup_w);
	723	speedup_data = memory_install_write32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x00018fd8, 0x00018fdb, 0, 0, speedup_w);
724	724	speedup_pc = 0x1fc033e0;
725	725	}
726	726

src/mame/drivers/seibuspi.c

r4679	r4680
814	814
815	815	static READ32_HANDLER( spi_int_r )
816	816	{
817		cpu_set_input_line(space->machine->cpu[0], 0,CLEAR_LINE );
	817	cputag_set_input_line(space->machine, "maincpu", 0,CLEAR_LINE );
818	818	return 0xffffffff;
819	819	}
820	820
r4679	r4680
888	888	if( ACCESSING_BITS_0_7 ) {
889	889	if( data & 0x1 ) {
890	890	z80_prg_fifo_pos = 0;
891		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_RESET, CLEAR_LINE );
	891	cputag_set_input_line(space->machine, "soundcpu", INPUT_LINE_RESET, CLEAR_LINE );
892	892	} else {
893		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_RESET, ASSERT_LINE );
	893	cputag_set_input_line(space->machine, "soundcpu", INPUT_LINE_RESET, ASSERT_LINE );
894	894	}
895	895	}
896	896	}
r4679	r4680
1080	1080	static void irqhandler(const device_config *device, int state)
1081	1081	{
1082	1082	if (state)
1083		cpu_set_input_line_and_vector(device->machine->cpu[1], 0, ASSERT_LINE, 0xd7);   // IRQ is RST10
	1083	cputag_set_input_line_and_vector(device->machine, "soundcpu", 0, ASSERT_LINE, 0xd7);   // IRQ is RST10
1084	1084	else
1085		cpu_set_input_line(device->machine->cpu[1], 0, CLEAR_LINE);
	1085	cputag_set_input_line(device->machine, "soundcpu", 0, CLEAR_LINE);
1086	1086	}
1087	1087
1088	1088	static WRITE32_HANDLER(sys386f2_eeprom_w)
r4679	r4680
1268	1268	static CUSTOM_INPUT( ejanhs_encode )
1269	1269	{
1270	1270	static const UINT8 encoding[] = { 0x02, 0x10, 0x03, 0x18, 0x04, 0x20, 0x05, 0x28, 0x06, 0x30, 0x07 };
1271		input_port_value state = input_port_read(field->port->machine, param);
	1271	input_port_value state = input_port_read(field->port->machine, (const char *)param);
1272	1272	int bit;
1273	1273
1274	1274	for (bit = 0; bit < ARRAY_LENGTH(encoding); bit++)
r4679	r4680
1817	1817	UINT8 *rombase = memory_region(machine, "user1");
1818	1818	UINT8 flash_data = rombase[0x1ffffc];
1819	1819
1820		cpu_set_input_line(machine->cpu[1], INPUT_LINE_RESET, ASSERT_LINE );
1821		cpu_set_irq_callback(machine->cpu[0], spi_irq_callback);
	1820	cputag_set_input_line(machine, "soundcpu", INPUT_LINE_RESET, ASSERT_LINE );
	1821	cpu_set_irq_callback(cputag_get_cpu(machine, "maincpu"), spi_irq_callback);
1822	1822
1823		memory_install_read32_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x00000680, 0x00000683, 0, 0, sound_fifo_r);
1824		memory_install_write32_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x00000688, 0x0000068b, 0, 0, z80_prg_fifo_w);
1825		memory_install_write32_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x0000068c, 0x0000068f, 0, 0, z80_enable_w);
	1823	memory_install_read32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x00000680, 0x00000683, 0, 0, sound_fifo_r);
	1824	memory_install_write32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x00000688, 0x0000068b, 0, 0, z80_prg_fifo_w);
	1825	memory_install_write32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x0000068c, 0x0000068f, 0, 0, z80_enable_w);
1826	1826
1827		z80_rom = auto_malloc(0x40000);
	1827	z80_rom = auto_alloc_array(machine, UINT8, 0x40000);
1828	1828	memory_set_bankptr(machine, 4, z80_rom);
1829	1829	memory_set_bankptr(machine, 5, z80_rom);
1830	1830
r4679	r4680
1887	1887	{
1888	1888	UINT8 *rom = memory_region(machine, "soundcpu");
1889	1889
1890		z80_rom = auto_malloc(0x40000);
	1890	z80_rom = auto_alloc_array(machine, UINT8, 0x40000);
1891	1891	memory_set_bankptr(machine, 4, z80_rom);
1892	1892	memory_set_bankptr(machine, 5, z80_rom);
1893	1893
1894	1894	memcpy(z80_rom, rom, 0x40000);
1895	1895
1896		memory_install_write32_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x0000068c, 0x0000068f, 0, 0, eeprom_w);
1897		memory_install_read32_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x00000680, 0x00000683, 0, 0, sb_coin_r);
1898		cpu_set_irq_callback(machine->cpu[0], spi_irq_callback);
	1896	memory_install_write32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x0000068c, 0x0000068f, 0, 0, eeprom_w);
	1897	memory_install_read32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x00000680, 0x00000683, 0, 0, sb_coin_r);
	1898	cpu_set_irq_callback(cputag_get_cpu(machine, "maincpu"), spi_irq_callback);
1899	1899
1900	1900	sb_coin_latch = 0;
1901	1901	}
r4679	r4680
2065	2065
2066	2066	static DRIVER_INIT( rdft )
2067	2067	{
2068		memory_install_read32_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x00298d0, 0x00298d3, 0, 0, rdft_speedup_r );
	2068	memory_install_read32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x00298d0, 0x00298d3, 0, 0, rdft_speedup_r );
2069	2069
2070	2070	init_spi(machine);
2071	2071	}
2072	2072
2073	2073	static DRIVER_INIT( senkyu )
2074	2074	{
2075		memory_install_read32_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x0018cb4, 0x0018cb7, 0, 0, senkyu_speedup_r );
	2075	memory_install_read32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x0018cb4, 0x0018cb7, 0, 0, senkyu_speedup_r );
2076	2076
2077	2077	init_spi(machine);
2078	2078	}
2079	2079
2080	2080	static DRIVER_INIT( senkyua )
2081	2081	{
2082		memory_install_read32_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x0018c9c, 0x0018c9f, 0, 0, senkyua_speedup_r );
	2082	memory_install_read32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x0018c9c, 0x0018c9f, 0, 0, senkyua_speedup_r );
2083	2083
2084	2084	init_spi(machine);
2085	2085	}
2086	2086
2087	2087	static DRIVER_INIT( batlball )
2088	2088	{
2089		memory_install_read32_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x0018db4, 0x0018db7, 0, 0, batlball_speedup_r );
	2089	memory_install_read32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x0018db4, 0x0018db7, 0, 0, batlball_speedup_r );
2090	2090
2091	2091	init_spi(machine);
2092	2092	}
r4679	r4680
2094	2094	static DRIVER_INIT( ejanhs )
2095	2095	{
2096	2096	//  idle skip doesn't work properly?
2097		//  memory_install_read32_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x002d224, 0x002d227, 0, 0, ejanhs_speedup_r );
	2097	//  memory_install_read32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x002d224, 0x002d227, 0, 0, ejanhs_speedup_r );
2098	2098
2099	2099	init_spi(machine);
2100	2100	}
2101	2101
2102	2102	static DRIVER_INIT( viprp1 )
2103	2103	{
2104		memory_install_read32_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x001e2e0, 0x001e2e3, 0, 0, viprp1_speedup_r );
	2104	memory_install_read32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x001e2e0, 0x001e2e3, 0, 0, viprp1_speedup_r );
2105	2105
2106	2106	init_spi(machine);
2107	2107	}
2108	2108
2109	2109	static DRIVER_INIT( viprp1o )
2110	2110	{
2111		memory_install_read32_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x001d49c, 0x001d49f, 0, 0, viprp1o_speedup_r );
	2111	memory_install_read32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x001d49c, 0x001d49f, 0, 0, viprp1o_speedup_r );
2112	2112
2113	2113	init_spi(machine);
2114	2114	}
r4679	r4680
2120	2120	intelflash_init( machine, 0, FLASH_INTEL_E28F008SA, NULL );
2121	2121	intelflash_init( machine, 1, FLASH_INTEL_E28F008SA, NULL );
2122	2122
2123		memory_install_read32_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x0282AC, 0x0282AF, 0, 0, rf2_speedup_r );
	2123	memory_install_read32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x0282AC, 0x0282AF, 0, 0, rf2_speedup_r );
2124	2124	seibuspi_rise10_text_decrypt(memory_region(machine, "gfx1"));
2125	2125	seibuspi_rise10_bg_decrypt(memory_region(machine, "gfx2"), memory_region_length(machine, "gfx2"));
2126	2126	seibuspi_rise10_sprite_decrypt(memory_region(machine, "gfx3"), 0x600000);
2127	2127
2128		memory_install_write32_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x560, 0x563, 0, 0, sprite_dma_start_w);
	2128	memory_install_write32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x560, 0x563, 0, 0, sprite_dma_start_w);
2129	2129	}
2130	2130
2131	2131	static DRIVER_INIT( rdft2 )
r4679	r4680
2144	2144	intelflash_init( machine, 0, FLASH_INTEL_E28F008SA, NULL );
2145	2145	intelflash_init( machine, 1, FLASH_INTEL_E28F008SA, NULL );
2146	2146
2147		memory_install_read32_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x002894c, 0x002894f, 0, 0, rfjet_speedup_r );
	2147	memory_install_read32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x002894c, 0x002894f, 0, 0, rfjet_speedup_r );
2148	2148	seibuspi_rise11_text_decrypt(memory_region(machine, "gfx1"));
2149	2149	seibuspi_rise11_bg_decrypt(memory_region(machine, "gfx2"), memory_region_length(machine, "gfx2"));
2150	2150	seibuspi_rise11_sprite_decrypt_rfjet(memory_region(machine, "gfx3"), 0x800000);
2151	2151
2152		memory_install_write32_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x560, 0x563, 0, 0, sprite_dma_start_w);
	2152	memory_install_write32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x560, 0x563, 0, 0, sprite_dma_start_w);
2153	2153	}
2154	2154
2155	2155	/* SYS386 */
r4679	r4680
2161	2161
2162	2162	static MACHINE_RESET( seibu386 )
2163	2163	{
2164		cpu_set_irq_callback(machine->cpu[0], spi_irq_callback);
	2164	cpu_set_irq_callback(cputag_get_cpu(machine, "maincpu"), spi_irq_callback);
2165	2165	}
2166	2166
2167	2167	static MACHINE_DRIVER_START( seibu386 )

src/mame/drivers/skimaxx.c

r0	r4680
	1	/***************************************************************************
	2
	3	Skimaxx
	4
	5	Preliminary driver by Phil Bennett
	6
	7	68030-40 * 2
	8	TMS34010-50
	9	MSM6295 * 4
	10
	11	Video hardware consists of scaling sprites with a Mode 7-style ground?
	12	TMS34010 seems to draws text, score etc.
	13
	14	It looks like a bistream for a Xilinx FPGA is stored in ROM. The sub
	15	CPU bit-bangs 30864 bits worth of data to 0x40000003 twice.
	16
	17	***************************************************************************/
	18
	19	#include "driver.h"
	20	#include "cpu/m68000/m68000.h"
	21	#include "cpu/tms34010/tms34010.h"
	22
	23
	24	/*************************************
	25	*
	26	*  Statics
	27	*
	28	*************************************/
	29
	30	static UINT32 *sprite_buffer;
	31	static UINT16 *frame_buffer;
	32
	33
	34	/*************************************
	35	*
	36	*  Video emulation
	37	*
	38	*************************************/
	39
	40	VIDEO_START( skimaxx )
	41	{
	42
	43	}
	44
	45
	46	/*************************************
	47	*
	48	*  VRAM shift register callbacks
	49	*
	50	*************************************/
	51
	52	// TODO: Might not be used
	53	void skimaxx_to_shiftreg(const address_space *space, UINT32 address, UINT16 *shiftreg)
	54	{
	55	memcpy(shiftreg, &frame_buffer[TOWORD(address)], 512 * sizeof(UINT16));
	56	}
	57
	58	void skimaxx_from_shiftreg(const address_space *space, UINT32 address, UINT16 *shiftreg)
	59	{
	60	memcpy(&frame_buffer[TOWORD(address)], shiftreg, 512 * sizeof(UINT16));
	61	}
	62
	63
	64	/*************************************
	65	*
	66	*  Main video refresh
	67	*
	68	*************************************/
	69
	70	void skimaxx_scanline_update(const device_config *screen, bitmap_t *bitmap, int scanline, const tms34010_display_params *params)
	71	{
	72	// TODO: This isn't correct. I just hacked it together quickly so I could see something!
	73	if (params->rowaddr >= 0x220)
	74	{
	75	UINT32 rowaddr = (params->rowaddr - 0x220);
	76	UINT16 *vram1 = &frame_buffer[rowaddr << 8];
	77	UINT16 *dest = BITMAP_ADDR16(bitmap, scanline, 0);
	78	int coladdr = params->coladdr;
	79	int x;
	80	coladdr = 0;
	81
	82	if (scanline >= 236)
	83	return;
	84
	85	for (x = params->heblnk; x < params->hsblnk; ++x)
	86	{
	87	UINT16 tmspix = vram1[coladdr++] & 0x7fff;
	88	dest[x] = tmspix;
	89	}
	90	}
	91	}
	92
	93
	94	/*************************************
	95	*
	96	*  TMS34010 host interface
	97	*
	98	*************************************/
	99
	100	static WRITE32_HANDLER( m68k_tms_w )
	101	{
	102	tms34010_host_w(cputag_get_cpu(space->machine, "tms"), offset, data);
	103	}
	104
	105	static READ32_HANDLER( m68k_tms_r )
	106	{
	107	return tms34010_host_r(cputag_get_cpu(space->machine, "tms"), offset);
	108	}
	109
	110
	111	/*************************************
	112	*
	113	*  Handlers
	114	*
	115	*************************************/
	116
	117	static READ32_HANDLER( unk_r )
	118	{
	119	return 0x80;
	120	}
	121
	122
	123	/*************************************
	124	*
	125	*  Main CPU memory map
	126	*
	127	*************************************/
	128
	129	static ADDRESS_MAP_START( 68030_1_map, ADDRESS_SPACE_PROGRAM, 32 )
	130	AM_RANGE(0x00000000, 0x001fffff) AM_ROM
	131	AM_RANGE(0x10000000, 0x10000003) AM_RAM
	132	AM_RANGE(0x10100000, 0x1010000f) AM_READWRITE(m68k_tms_r, m68k_tms_w)
	133	AM_RANGE(0x10180000, 0x10187fff) AM_RAM AM_SHARE(1)
	134	AM_RANGE(0x20000000, 0x20000003) AM_RAM
	135	AM_RANGE(0x20000020, 0x20000023) AM_RAM
	136	AM_RANGE(0x20000024, 0x20000027) AM_RAM
	137	AM_RANGE(0x20000040, 0x20000043) AM_RAM
	138	AM_RANGE(0x20000044, 0x20000047) AM_RAM
	139	AM_RANGE(0x20000048, 0x2000004b) AM_RAM
	140	AM_RANGE(0x2000004c, 0x2000004f) AM_READ(unk_r)
	141	AM_RANGE(0x20000050, 0x20000053) AM_RAM
	142	AM_RANGE(0x20000054, 0x20000057) AM_RAM
	143	AM_RANGE(0xfffc0000, 0xfffdffff) AM_RAM AM_MIRROR(0x00020000)
	144	ADDRESS_MAP_END
	145
	146
	147	/*************************************
	148	*
	149	*  Sub CPU memory map
	150	*
	151	*************************************/
	152
	153	static ADDRESS_MAP_START( 68030_2_map, ADDRESS_SPACE_PROGRAM, 32 )
	154	AM_RANGE(0x00000000, 0x003fffff) AM_ROM
	155	AM_RANGE(0x40000000, 0x40000003) AM_RAM // Xilinx FPGA configuration write port?
	156	AM_RANGE(0x50000000, 0x5007ffff) AM_RAM AM_BASE(&sprite_buffer) // Part of this is mixed with the TMS frame buffer
	157	AM_RANGE(0xfffc0000, 0xfffc7fff) AM_RAM AM_SHARE(1)
	158	AM_RANGE(0xfffe0000, 0xffffffff) AM_RAM // I think this is banked with the shared RAM? (see CPU sync routines)
	159	ADDRESS_MAP_END
	160
	161
	162	/*************************************
	163	*
	164	*  Video CPU memory map
	165	*
	166	*************************************/
	167
	168	static ADDRESS_MAP_START( tms_program_map, ADDRESS_SPACE_PROGRAM, 16 )
	169	AM_RANGE(0x00000000, 0x000100ff) AM_RAM
	170	AM_RANGE(0x00008000, 0x0003ffff) AM_RAM
	171	AM_RANGE(0x00050000, 0x0005ffff) AM_RAM
	172	AM_RANGE(0x00220000, 0x003fffff) AM_RAM AM_BASE(&frame_buffer)
	173	AM_RANGE(0x02000000, 0x0200000f) AM_RAM
	174	AM_RANGE(0x02100000, 0x0210000f) AM_RAM
	175	AM_RANGE(0x04000000, 0x047fffff) AM_ROM AM_REGION("tmsgfx", 0)
	176	AM_RANGE(0xc0000000, 0xc00001ff) AM_READWRITE(tms34010_io_register_r, tms34010_io_register_w)
	177	AM_RANGE(0xff800000, 0xffffffff) AM_ROM AM_REGION("tms", 0)
	178	ADDRESS_MAP_END
	179
	180
	181	/*************************************
	182	*
	183	*  Input definitions
	184	*
	185	*************************************/
	186
	187	static INPUT_PORTS_START( skimaxx )
	188	PORT_START("DSW")
	189	// TODO
	190	INPUT_PORTS_END
	191
	192
	193	/*************************************
	194	*
	195	*  TMS34010 configuration
	196	*
	197	*************************************/
	198
	199	static void skimaxx_tms_irq(const device_config *device, int state)
	200	{
	201	// TODO
	202	}
	203
	204	static const tms34010_config tms_config =
	205	{
	206	FALSE,                     /* halt on reset */
	207	"screen",                  /* the screen operated on */
	208	50000000/8,                /* pixel clock */
	209	1,                         /* pixels per clock */
	210	skimaxx_scanline_update,   /* scanline updater */
	211	skimaxx_tms_irq,           /* generate interrupt */
	212	skimaxx_to_shiftreg,       /* write to shiftreg function */
	213	skimaxx_from_shiftreg      /* read from shiftreg function */
	214	};
	215
	216
	217	/*************************************
	218	*
	219	*  Initialisation
	220	*
	221	*************************************/
	222
	223	static MACHINE_RESET( skimaxx )
	224	{
	225
	226	}
	227
	228
	229	/*************************************
	230	*
	231	*  Machine driver
	232	*
	233	*************************************/
	234
	235	static MACHINE_DRIVER_START( skimaxx )
	236	MDRV_CPU_ADD("maincpu", M68020, XTAL_40MHz)   // TODO: Should be a 68030!
	237	MDRV_CPU_PROGRAM_MAP(68030_1_map, 0)
	238	//  MDRV_CPU_VBLANK_INT("screen", irq3_line_hold)
	239
	240	MDRV_CPU_ADD("subcpu", M68020, XTAL_40MHz)
	241	MDRV_CPU_PROGRAM_MAP(68030_2_map, 0)      // TODO: Should be a 68030!
	242
	243	MDRV_CPU_ADD("tms", TMS34010, XTAL_50MHz)
	244	MDRV_CPU_CONFIG(tms_config)
	245	MDRV_CPU_PROGRAM_MAP(tms_program_map, 0)
	246
	247	MDRV_MACHINE_RESET(skimaxx)
	248
	249	MDRV_SCREEN_ADD("screen", RASTER)
	250	MDRV_SCREEN_FORMAT(BITMAP_FORMAT_INDEXED16)
	251	MDRV_SCREEN_RAW_PARAMS(40000000/4, 156*4, 0, 100*4, 328, 0, 300) // TODO - Wrong but TMS overrides it anyway
	252
	253	MDRV_PALETTE_INIT(RRRRR_GGGGG_BBBBB)
	254	MDRV_PALETTE_LENGTH(32768)
	255
	256	MDRV_SPEAKER_STANDARD_MONO("mono")
	257
	258	MDRV_VIDEO_START(skimaxx)
	259	MDRV_VIDEO_UPDATE(tms340x0)
	260	MACHINE_DRIVER_END
	261
	262
	263	/*************************************
	264	*
	265	*  ROM definition(s)
	266	*
	267	*************************************/
	268
	269	ROM_START( skimaxx )
	270	ROM_REGION( 0x200000, "maincpu", 0 )
	271	ROM_LOAD32_BYTE( "main2_0.ve2", 0x000000, 0x80000, CRC(0e139138) SHA1(b28b0f5dba7810712cee99a9a9748ca2dabddf15) )
	272	ROM_LOAD32_BYTE( "main2_0.ve4", 0x000001, 0x80000, CRC(4e0502cf) SHA1(451efd82656dd32e696f572d848b2717453f05c8) )
	273	ROM_LOAD32_BYTE( "main2_0.ve3", 0x000002, 0x80000, CRC(53887cfd) SHA1(79d9547e0e9c4c41913279f977bf25cdbe800356) )
	274	ROM_LOAD32_BYTE( "main2_0.ve5", 0x000003, 0x80000, CRC(6317f54d) SHA1(057141acd2a8a804d8cc0487d5cacc286c344866) )
	275
	276	ROM_REGION( 0x400000, "subcpu", 0 )
	277	ROM_LOAD32_BYTE( "ve1v-2_0", 0x000003, 0x100000, CRC(871e16d2) SHA1(9318ebcff4032fffcbe53c8fb805b14578eaebac) )
	278	ROM_LOAD32_BYTE( "ve2v-2_0", 0x000002, 0x100000, CRC(17b01a96) SHA1(79ef3bd6a22abf774095741c29deeb6af53d1585) )
	279	ROM_LOAD32_BYTE( "ve3v-2_0", 0x000001, 0x100000, CRC(c1491795) SHA1(3a527ea4bf8cfdab072153b1cd66b0d090ef4d31) )
	280	ROM_LOAD32_BYTE( "ve4v-2_0", 0x000000, 0x100000, CRC(950773bb) SHA1(68e4a5780701488a934104eb87d10c36d736f049) )
	281
	282	ROM_REGION16_LE( 0x100000, "tms", 0 )
	283	ROM_LOAD16_BYTE( "vc8v-2_0", 0x000000, 0x80000, CRC(a6e9ef81) SHA1(59a0fb149e17d3773adb980428a0b107647bd4fa) )
	284	ROM_LOAD16_BYTE( "vc9v-2_0", 0x000001, 0x80000, CRC(b1e8ba65) SHA1(b91cf93ecd9b6067664780ab2c1b69f632c7ae05) )
	285
	286	ROM_REGION( 0x600000, "tmsgfx", 0 )
	287	ROM_LOAD16_BYTE( "vc10v2_0", 0x000000, 0x80000, CRC(433651cd) SHA1(9b9801703d16adbbca2b03e1714490fb166d48a0) )
	288	ROM_LOAD16_BYTE( "vc11v2_0", 0x000001, 0x80000, CRC(a906fc72) SHA1(c61ad560f203c7f507cc7b7dc8834f529a6501a7) )
	289
	290	ROM_REGION( 0x600000, "gfx", 0 )
	291	ROM_LOAD16_BYTE( "ve5v-2_0", 0x000000, 0x100000, CRC(b95544a3) SHA1(1ad49da54d36543229e241887c3dd8411ef5c89a) )
	292	ROM_LOAD16_BYTE( "ve6v-2_0", 0x000001, 0x100000, CRC(d98bf89a) SHA1(f7fd66487f7696b53ee90a4cf45a810ec791df59) )
	293	ROM_LOAD16_BYTE( "ve7v-2_0", 0x200000, 0x100000, CRC(a927716b) SHA1(0189d7b08b65b6a8a8d4c3e2affe93612db38155) )
	294	ROM_LOAD16_BYTE( "ve8v-2_0", 0x200001, 0x100000, CRC(ad8ed4a4) SHA1(5d1339b3d6ce59fea062273fa2da35988ba94a80) )
	295	ROM_LOAD16_BYTE( "ve9v-2_0", 0x400000, 0x100000, CRC(587b364d) SHA1(b53412bdcc804727990d959e5b2399a7e5e7fbf3) )
	296	ROM_LOAD16_BYTE( "ve10v2_0", 0x400001, 0x100000, CRC(c2a16a62) SHA1(3663c19a6517b0a01fb454523b995be3cdf2e4b3) )
	297
	298	ROM_REGION( 0x80000, "oki1", 0 )
	299	ROM_LOAD( "main2_0.u2", 0x000000, 0x80000, CRC(c84b3c46) SHA1(b956358518495aa822a5b699cbad1abac212dd09) )
	300
	301	ROM_REGION( 0x80000, "oki2", 0 )
	302	ROM_LOAD( "main2_0.u4", 0x000000, 0x80000, CRC(c84b3c46) SHA1(b956358518495aa822a5b699cbad1abac212dd09) )
	303
	304	ROM_REGION( 0x80000, "oki3", 0 )
	305	ROM_LOAD( "main2_0.u3", 0x000000, 0x80000, CRC(24d8c6ad) SHA1(06f51a4c380c91c930d646826246f62c4e1f9cda) )
	306
	307	ROM_REGION( 0x80000, "oki4", 0 )
	308	ROM_LOAD( "main2_0.u5", 0x000000, 0x80000, CRC(e2ba07ad) SHA1(cf82753975f7b6756cca4e10b5372e00135440bf) )
	309	ROM_END
	310
	311
	312	/*************************************
	313	*
	314	*  Game driver
	315	*
	316	*************************************/
	317
	318	GAME( 1996, skimaxx, 0, skimaxx, skimaxx, 0, ROT0, "Kyle Hodgetts/ICE", "Skimaxx", GAME_NOT_WORKING | GAME_NO_SOUND )

src/mame/drivers/coolpool.c

r4679	r4680
220	220	coin_counter_w(0, ~data & 0x0001);
221	221	coin_counter_w(1, ~data & 0x0002);
222	222
223		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_RESET, (data & 0x0400) ? ASSERT_LINE : CLEAR_LINE);
	223	cputag_set_input_line(space->machine, "dsp", INPUT_LINE_RESET, (data & 0x0400) ? ASSERT_LINE : CLEAR_LINE);
224	224
225	225	/* bits 10-15 are counted down over time */
226	226	if (data & 0x0400) amerdart_iop_echo = 1;
r4679	r4680
233	233	iop_answer = iop_cmd;
234	234	if (amerdart_iop_echo && iop_cmd != 0x19)
235	235	{
236		cpu_set_input_line(machine->cpu[0], 1, ASSERT_LINE);
	236	cputag_set_input_line(machine, "maincpu", 1, ASSERT_LINE);
237	237	return;
238	238	}
239	239	amerdart_iop_echo = 0;
r4679	r4680
271	271	break;
272	272	}
273	273
274		cpu_set_input_line(machine->cpu[0], 1, ASSERT_LINE);
	274	cputag_set_input_line(machine, "maincpu", 1, ASSERT_LINE);
275	275	}
276	276
277	277
r4679	r4680
297	297	coin_counter_w(0, ~data & 0x0001);
298	298	coin_counter_w(1, ~data & 0x0002);
299	299
300		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_RESET, (data & 0x0400) ? ASSERT_LINE : CLEAR_LINE);
	300	cputag_set_input_line(space->machine, "dsp", INPUT_LINE_RESET, (data & 0x0400) ? ASSERT_LINE : CLEAR_LINE);
301	301	}
302	302
303	303
r4679	r4680
313	313	{
314	314	iop_cmd = param;
315	315	cmd_pending = 1;
316		cpu_set_input_line(machine->cpu[1], 0, HOLD_LINE);   /* ???  I have no idea who should generate this! */
317		/* the DSP polls the status bit so it isn't strictly */
318		/* necessary to also have an IRQ */
	316	cputag_set_input_line(machine, "dsp", 0, HOLD_LINE);   /* ???  I have no idea who should generate this! */
	317	/* the DSP polls the status bit so it isn't strictly */
	318	/* necessary to also have an IRQ */
319	319	cpuexec_boost_interleave(machine, attotime_zero, ATTOTIME_IN_USEC(50));
320	320	}
321	321
r4679	r4680
330	330	static READ16_HANDLER( coolpool_iop_r )
331	331	{
332	332	logerror("%08x:IOP read %04x\n",cpu_get_pc(space->cpu),iop_answer);
333		cpu_set_input_line(space->machine->cpu[0], 1, CLEAR_LINE);
	333	cputag_set_input_line(space->machine, "maincpu", 1, CLEAR_LINE);
334	334
335	335	return iop_answer;
336	336	}
r4679	r4680
347	347	static READ16_HANDLER( dsp_cmd_r )
348	348	{
349	349	cmd_pending = 0;
350		logerror("%08x:IOP cmd_r %04x\n",cpu_get_pc(space->cpu),iop_cmd);
	350	logerror("%08x:IOP cmd_r %04x\n", cpu_get_pc(space->cpu), iop_cmd);
351	351	return iop_cmd;
352	352	}
353	353
354	354
355	355	static WRITE16_HANDLER( dsp_answer_w )
356	356	{
357		logerror("%08x:IOP answer %04x\n",cpu_get_pc(space->cpu),data);
	357	logerror("%08x:IOP answer %04x\n", cpu_get_pc(space->cpu), data);
358	358	iop_answer = data;
359		cpu_set_input_line(space->machine->cpu[0], 1, ASSERT_LINE);
	359	cputag_set_input_line(space->machine, "maincpu", 1, ASSERT_LINE);
360	360	}
361	361
362	362
r4679	r4680
955	955
956	956	static DRIVER_INIT( coolpool )
957	957	{
958		memory_install_read16_handler(cpu_get_address_space(machine->cpu[1], ADDRESS_SPACE_IO), 0x07, 0x07, 0, 0, coolpool_input_r);
	958	memory_install_read16_handler(cputag_get_address_space(machine, "dsp", ADDRESS_SPACE_IO), 0x07, 0x07, 0, 0, coolpool_input_r);
959	959	}
960	960
961	961

src/mame/drivers/mwarr.c

r4679	r4680
318	318	mhigh_tilemap = tilemap_create(machine, get_mhigh_tile_info,tilemap_scan_cols, 16, 16,64,16);
319	319	tx_tilemap    = tilemap_create(machine, get_tx_tile_info,   tilemap_scan_rows,  8,  8,64,32);
320	320
321		sprites_buffer = auto_malloc(sizeof(UINT16) * 0x800);
	321	sprites_buffer = auto_alloc_array(machine, UINT16, 0x800);
322	322
323	323	tilemap_set_transparent_pen(mlow_tilemap,0);
324	324	tilemap_set_transparent_pen(mhigh_tilemap,0);

src/mame/drivers/sauro.c

r4679	r4680
90	90	WRITE8_HANDLER( tecfri_colorram2_w );
91	91	WRITE8_HANDLER( tecfri_scroll_bg_w );
92	92	WRITE8_HANDLER( sauro_scroll_fg_w );
93		WRITE8_HANDLER( trckydoc_spriteram_mirror_w );
94	93	WRITE8_HANDLER( sauro_palette_bank_w );
95	94
96	95	VIDEO_START( sauro );
r4679	r4680
135	134	sp0256_ALD_w(device, 0, data);
136	135	}
137	136
138		static ADDRESS_MAP_START( sauro_readmem, ADDRESS_SPACE_PROGRAM, 8 )
139		AM_RANGE(0x0000, 0xdfff) AM_READ(SMH_ROM)
140		AM_RANGE(0xe000, 0xebff) AM_READ(SMH_RAM)
141		AM_RANGE(0xf000, 0xffff) AM_READ(SMH_RAM)
	137	static ADDRESS_MAP_START( sauro_map, ADDRESS_SPACE_PROGRAM, 8 )
	138	AM_RANGE(0x0000, 0xdfff) AM_ROM
	139	AM_RANGE(0xe000, 0xe7ff) AM_RAM
	140	AM_RANGE(0xe800, 0xebff) AM_RAM AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
	141	AM_RANGE(0xf000, 0xf3ff) AM_RAM_WRITE(tecfri_videoram_w) AM_BASE(&tecfri_videoram)
	142	AM_RANGE(0xf400, 0xf7ff) AM_RAM_WRITE(tecfri_colorram_w) AM_BASE(&tecfri_colorram)
	143	AM_RANGE(0xf800, 0xfbff) AM_RAM_WRITE(tecfri_videoram2_w) AM_BASE(&tecfri_videoram2)
	144	AM_RANGE(0xfc00, 0xffff) AM_RAM_WRITE(tecfri_colorram2_w) AM_BASE(&tecfri_colorram2)
142	145	ADDRESS_MAP_END
143	146
144		static ADDRESS_MAP_START( sauro_writemem, ADDRESS_SPACE_PROGRAM, 8 )
145		AM_RANGE(0x0000, 0xdfff) AM_WRITE(SMH_ROM)
146		AM_RANGE(0xe000, 0xe7ff) AM_WRITE(SMH_RAM)
147		AM_RANGE(0xe800, 0xebff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
148		AM_RANGE(0xf000, 0xf3ff) AM_WRITE(tecfri_videoram_w) AM_BASE(&tecfri_videoram)
149		AM_RANGE(0xf400, 0xf7ff) AM_WRITE(tecfri_colorram_w) AM_BASE(&tecfri_colorram)
150		AM_RANGE(0xf800, 0xfbff) AM_WRITE(tecfri_videoram2_w) AM_BASE(&tecfri_videoram2)
151		AM_RANGE(0xfc00, 0xffff) AM_WRITE(tecfri_colorram2_w) AM_BASE(&tecfri_colorram2)
152		ADDRESS_MAP_END
153
154
155	147	static ADDRESS_MAP_START( sauro_io_map, ADDRESS_SPACE_IO, 8 )
156	148	ADDRESS_MAP_GLOBAL_MASK(0xff)
157	149	AM_RANGE(0x00, 0x00) AM_READ_PORT("DSW1")
r4679	r4680
177	169	AM_RANGE(0xe0, 0xe0) AM_WRITE(watchdog_reset_w)
178	170	ADDRESS_MAP_END
179	171
180		static ADDRESS_MAP_START( sauro_sound_readmem, ADDRESS_SPACE_PROGRAM, 8 )
181		AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM)
182		AM_RANGE(0x8000, 0x87ff) AM_READ(SMH_RAM)
183		AM_RANGE(0xe000, 0xe000) AM_READ(sauro_sound_command_r)
184		ADDRESS_MAP_END
185
186		static ADDRESS_MAP_START( sauro_sound_writemem, ADDRESS_SPACE_PROGRAM, 8 )
187		AM_RANGE(0x8000, 0x87ff) AM_WRITE(SMH_RAM)
	172	static ADDRESS_MAP_START( sauro_sound_map, ADDRESS_SPACE_PROGRAM, 8 )
	173	AM_RANGE(0x0000, 0x7fff) AM_ROM
	174	AM_RANGE(0x8000, 0x87ff) AM_RAM
188	175	AM_RANGE(0xc000, 0xc001) AM_DEVWRITE("ym", ym3812_w)
189	176	AM_RANGE(0xa000, 0xa000) AM_DEVWRITE("speech", adpcm_w)
	177	AM_RANGE(0xe000, 0xe000) AM_READ(sauro_sound_command_r)
190	178	AM_RANGE(0xe000, 0xe006) AM_WRITENOP   /* echo from write to e0000 */
191	179	AM_RANGE(0xe00e, 0xe00f) AM_WRITENOP
192	180	ADDRESS_MAP_END
193	181
194		static ADDRESS_MAP_START( trckydoc_readmem, ADDRESS_SPACE_PROGRAM, 8 )
195		AM_RANGE(0x0000, 0xdfff) AM_READ(SMH_ROM)
196		AM_RANGE(0xe000, 0xe7ff) AM_READ(SMH_RAM)
	182
	183	static ADDRESS_MAP_START( trckydoc_map, ADDRESS_SPACE_PROGRAM, 8 )
	184	AM_RANGE(0x0000, 0xdfff) AM_ROM
	185	AM_RANGE(0xe000, 0xe7ff) AM_RAM
	186	AM_RANGE(0xe800, 0xebff) AM_RAM AM_MIRROR(0x400) AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
	187	AM_RANGE(0xf000, 0xf3ff) AM_RAM_WRITE(tecfri_videoram_w) AM_BASE(&tecfri_videoram)
	188	AM_RANGE(0xf400, 0xf7ff) AM_RAM_WRITE(tecfri_colorram_w) AM_BASE(&tecfri_colorram)
197	189	AM_RANGE(0xf800, 0xf800) AM_READ_PORT("DSW1")
198	190	AM_RANGE(0xf808, 0xf808) AM_READ_PORT("DSW2")
199	191	AM_RANGE(0xf810, 0xf810) AM_READ_PORT("P1")
200	192	AM_RANGE(0xf818, 0xf818) AM_READ_PORT("P2")
201		AM_RANGE(0xf828, 0xf828) AM_READ(watchdog_reset_r)
202		ADDRESS_MAP_END
203
204		static ADDRESS_MAP_START( trckydoc_writemem, ADDRESS_SPACE_PROGRAM, 8 )
205		AM_RANGE(0x0000, 0xdfff) AM_WRITE(SMH_ROM)
206		AM_RANGE(0xe000, 0xe7ff) AM_WRITE(SMH_RAM)
207		AM_RANGE(0xe800, 0xebff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
208		AM_RANGE(0xec00, 0xefff) AM_WRITE(trckydoc_spriteram_mirror_w) // it clears sprites from the screen by writing here to set some of the attributes
209		AM_RANGE(0xf000, 0xf3ff) AM_WRITE(tecfri_videoram_w) AM_BASE(&tecfri_videoram)
210		AM_RANGE(0xf400, 0xf7ff) AM_WRITE(tecfri_colorram_w) AM_BASE(&tecfri_colorram)
211	193	AM_RANGE(0xf820, 0xf821) AM_DEVWRITE("ym", ym3812_w)
	194	AM_RANGE(0xf828, 0xf828) AM_READ(watchdog_reset_r)
212	195	AM_RANGE(0xf830, 0xf830) AM_WRITE(tecfri_scroll_bg_w)
213	196	AM_RANGE(0xf838, 0xf838) AM_WRITENOP            /* only written at startup */
214	197	AM_RANGE(0xf839, 0xf839) AM_WRITE(flip_screen_w)
r4679	r4680
218	201	AM_RANGE(0xf83f, 0xf83f) AM_WRITENOP            /* only written at startup */
219	202	ADDRESS_MAP_END
220	203
	204
221	205	static INPUT_PORTS_START( tecfri )
222	206	PORT_START("P1")
223	207	PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_BUTTON1 )
r4679	r4680
350	334
351	335	static MACHINE_DRIVER_START( tecfri )
352	336	/* basic machine hardware */
353		MDRV_CPU_ADD("maincpu", Z80, 4000000)        // 4 MHz???
	337	MDRV_CPU_ADD("maincpu", Z80, XTAL_20MHz/4)       /* verified on pcb */
354	338	MDRV_CPU_VBLANK_INT("screen", irq0_line_hold)
355	339
356	340	/* video hardware */
r4679	r4680
367	351	/* sound hardware */
368	352	MDRV_SPEAKER_STANDARD_MONO("mono")
369	353
370		MDRV_SOUND_ADD("ym", YM3812, 3600000)
	354	MDRV_SOUND_ADD("ym", YM3812, XTAL_20MHz/8)       /* verified on pcb */
371	355	MDRV_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.0)
372	356
373	357	MACHINE_DRIVER_END
r4679	r4680
376	360	MDRV_IMPORT_FROM(tecfri)
377	361
378	362	MDRV_CPU_MODIFY("maincpu")
379		MDRV_CPU_PROGRAM_MAP(trckydoc_readmem, trckydoc_writemem )
	363	MDRV_CPU_PROGRAM_MAP(trckydoc_map,0 )
380	364
381	365	MDRV_GFXDECODE(trckydoc)
382	366
r4679	r4680
389	373	MDRV_IMPORT_FROM(tecfri)
390	374
391	375	MDRV_CPU_MODIFY("maincpu")
392		MDRV_CPU_PROGRAM_MAP(sauro_readmem, sauro_writemem)
	376	MDRV_CPU_PROGRAM_MAP(sauro_map, 0)
393	377	MDRV_CPU_IO_MAP(sauro_io_map,0)
394	378
395	379	MDRV_CPU_ADD("audiocpu", Z80, 4000000)   // 4 MHz?
396		MDRV_CPU_PROGRAM_MAP(sauro_sound_readmem, sauro_sound_writemem)
397		MDRV_CPU_VBLANK_INT_HACK(sauro_interrupt, 8) // ?
	380	MDRV_CPU_PROGRAM_MAP(sauro_sound_map, 0)
	381	MDRV_CPU_PERIODIC_INT(sauro_interrupt, 8*60) // ?
398	382
399	383	MDRV_GFXDECODE(sauro)
400	384
r4679	r4680
404	388	MDRV_SOUND_ADD("speech", SP0256, 3120000)
405	389	MDRV_SOUND_CONFIG(sauro_sp256)
406	390	MDRV_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.0)
407
408	391	MACHINE_DRIVER_END
409	392
410	393	/***************************************************************************

src/mame/drivers/gaplus.c

r4679	r4680
310	310	}
311	311
312	312
313		static ADDRESS_MAP_START( readmem_cpu1, ADDRESS_SPACE_PROGRAM, 8 )
314		AM_RANGE(0x0000, 0x07ff) AM_READ(gaplus_videoram_r)      /* tilemap RAM (shared with CPU #2) */
315		AM_RANGE(0x0800, 0x1fff) AM_READ(gaplus_spriteram_r)      /* shared RAM with CPU #2 & spriteram */
316		AM_RANGE(0x6000, 0x63ff) AM_READ(gaplus_snd_sharedram_r) /* shared RAM with CPU #3 */
317		AM_RANGE(0x6820, 0x682f) AM_READ(gaplus_customio_3_r)   /* custom I/O chip #3 interface */
318		AM_RANGE(0x6800, 0x6bff) AM_READ(namcoio_r)            /* custom I/O chips interface */
319		AM_RANGE(0x7800, 0x7fff) AM_READ(watchdog_reset_r)      /* watchdog */
320		AM_RANGE(0xa000, 0xffff) AM_READ(SMH_ROM)            /* ROM */
321		ADDRESS_MAP_END
322
323		static ADDRESS_MAP_START( writemem_cpu1, ADDRESS_SPACE_PROGRAM, 8 )
324		AM_RANGE(0x0000, 0x07ff) AM_WRITE(gaplus_videoram_w) AM_BASE(&gaplus_videoram)   /* tilemap RAM (shared with CPU #2) */
325		AM_RANGE(0x0800, 0x1fff) AM_WRITE(gaplus_spriteram_w) AM_BASE(&gaplus_spriteram)   /* shared RAM with CPU #2 (includes sprite RAM) */
326		AM_RANGE(0x6000, 0x63ff) AM_DEVWRITE("namco", gaplus_snd_sharedram_w) /* shared RAM with CPU #3 */
327		AM_RANGE(0x6820, 0x682f) AM_WRITE(gaplus_customio_3_w) AM_BASE(&gaplus_customio_3)/* custom I/O chip #3 interface */
328		AM_RANGE(0x6800, 0x6bff) AM_WRITE(namcoio_w)                        /* custom I/O chips interface */
329		AM_RANGE(0x7000, 0x7fff) AM_WRITE(gaplus_irq_1_ctrl_w)               /* main CPU irq control */
330		AM_RANGE(0x8000, 0x8fff) AM_WRITE(gaplus_sreset_w)                   /* reset CPU #2 & #3, enable sound */
331		AM_RANGE(0x9000, 0x9fff) AM_WRITE(gaplus_freset_w)                   /* reset I/O chips */
	313	static ADDRESS_MAP_START( cpu1_map, ADDRESS_SPACE_PROGRAM, 8 )
	314	AM_RANGE(0x0000, 0x07ff) AM_READWRITE(gaplus_videoram_r, gaplus_videoram_w) AM_BASE(&gaplus_videoram)      /* tilemap RAM (shared with CPU #2) */
	315	AM_RANGE(0x0800, 0x1fff) AM_READWRITE(gaplus_spriteram_r, gaplus_spriteram_w) AM_BASE(&gaplus_spriteram)   /* shared RAM with CPU #2 (includes sprite RAM) */
	316	AM_RANGE(0x6000, 0x63ff) AM_READ(gaplus_snd_sharedram_r)                                        /* shared RAM with CPU #3 */
	317	AM_RANGE(0x6000, 0x63ff) AM_DEVWRITE("namco", gaplus_snd_sharedram_w)                               /* shared RAM with CPU #3 */
	318	AM_RANGE(0x6820, 0x682f) AM_READWRITE(gaplus_customio_3_r, gaplus_customio_3_w) AM_BASE(&gaplus_customio_3)   /* custom I/O chip #3 interface */
	319	AM_RANGE(0x6800, 0x6bff) AM_READWRITE(namcoio_r, namcoio_w)                                       /* custom I/O chips interface */
	320	AM_RANGE(0x7000, 0x7fff) AM_WRITE(gaplus_irq_1_ctrl_w)                                          /* main CPU irq control */
	321	AM_RANGE(0x7800, 0x7fff) AM_READ(watchdog_reset_r)                                             /* watchdog */
	322	AM_RANGE(0x8000, 0x8fff) AM_WRITE(gaplus_sreset_w)                                              /* reset CPU #2 & #3, enable sound */
	323	AM_RANGE(0x9000, 0x9fff) AM_WRITE(gaplus_freset_w)                                              /* reset I/O chips */
332	324	AM_RANGE(0xa000, 0xa7ff) AM_WRITE(gaplus_starfield_control_w)            /* starfield control */
333		AM_RANGE(0xa000, 0xffff) AM_WRITE(SMH_ROM)                        /* ROM */
	325	AM_RANGE(0xa000, 0xffff) AM_ROM                                                            /* ROM */
334	326	ADDRESS_MAP_END
335	327
336		static ADDRESS_MAP_START( readmem_cpu2, ADDRESS_SPACE_PROGRAM, 8 )
337		AM_RANGE(0x0000, 0x07ff) AM_READ(gaplus_videoram_r)      /* tilemap RAM (shared with CPU #1) */
338		AM_RANGE(0x0800, 0x1fff) AM_READ(gaplus_spriteram_r)      /* shared RAM with CPU #1 & spriteram */
339		AM_RANGE(0xa000, 0xffff) AM_READ(SMH_ROM)            /* ROM */
	328	static ADDRESS_MAP_START( cpu2_map, ADDRESS_SPACE_PROGRAM, 8 )
	329	AM_RANGE(0x0000, 0x07ff) AM_READWRITE(gaplus_videoram_r, gaplus_videoram_w)      /* tilemap RAM (shared with CPU #1) */
	330	AM_RANGE(0x0800, 0x1fff) AM_READWRITE(gaplus_spriteram_r, gaplus_spriteram_w)   /* shared RAM with CPU #1 */
	331	//  AM_RANGE(0x500f, 0x500f) AM_WRITENOP                                            /* ??? written 256 times on startup */
	332	AM_RANGE(0x6000, 0x6fff) AM_WRITE(gaplus_irq_2_ctrl_w)                     /* IRQ 2 control */
	333	AM_RANGE(0xa000, 0xffff) AM_ROM                                       /* ROM */
340	334	ADDRESS_MAP_END
341	335
342		static ADDRESS_MAP_START( writemem_cpu2, ADDRESS_SPACE_PROGRAM, 8 )
343		AM_RANGE(0x0000, 0x07ff) AM_WRITE(gaplus_videoram_w)      /* tilemap RAM (shared with CPU #1) */
344		AM_RANGE(0x0800, 0x1fff) AM_WRITE(gaplus_spriteram_w)      /* shared RAM with CPU #1 */
345		//  AM_RANGE(0x500f, 0x500f) AM_WRITENOP             /* ??? written 256 times on startup */
346		AM_RANGE(0x6000, 0x6fff) AM_WRITE(gaplus_irq_2_ctrl_w)   /* IRQ 2 control */
347		AM_RANGE(0xa000, 0xffff) AM_WRITE(SMH_ROM)            /* ROM */
348		ADDRESS_MAP_END
349
350		static ADDRESS_MAP_START( readmem_cpu3, ADDRESS_SPACE_PROGRAM, 8 )
351		AM_RANGE(0x0000, 0x03ff) AM_READ(gaplus_snd_sharedram_r) /* shared RAM with CPU #1 */
352		AM_RANGE(0x2000, 0x3fff) AM_READ(watchdog_reset_r)      /* watchdog? */
353		AM_RANGE(0xe000, 0xffff) AM_READ(SMH_ROM)            /* ROM */
354		ADDRESS_MAP_END
355
356		/* CPU 3 (SOUND CPU) write addresses */
357		static ADDRESS_MAP_START( writemem_cpu3, ADDRESS_SPACE_PROGRAM, 8 )
	336	static ADDRESS_MAP_START( cpu3_map, ADDRESS_SPACE_PROGRAM, 8 )
	337	AM_RANGE(0x0000, 0x03ff) AM_READ(gaplus_snd_sharedram_r)                               /* shared RAM with CPU #1 */
358	338	AM_RANGE(0x0000, 0x03ff) AM_DEVWRITE("namco", gaplus_snd_sharedram_w) AM_BASE(&namco_soundregs)   /* shared RAM with the main CPU + sound registers */
359		AM_RANGE(0x2000, 0x3fff) AM_WRITE(watchdog_reset_w)      /* watchdog? */
360		AM_RANGE(0x4000, 0x7fff) AM_WRITE(gaplus_irq_3_ctrl_w)   /* interrupt enable/disable */
361		AM_RANGE(0xe000, 0xffff) AM_WRITE(SMH_ROM)            /* ROM */
	339	AM_RANGE(0x2000, 0x3fff) AM_READWRITE(watchdog_reset_r, watchdog_reset_w)                  /* watchdog? */
	340	AM_RANGE(0x4000, 0x7fff) AM_WRITE(gaplus_irq_3_ctrl_w)                                 /* interrupt enable/disable */
	341	AM_RANGE(0xe000, 0xffff) AM_ROM                                                   /* ROM */
362	342	ADDRESS_MAP_END
363	343
364	344
r4679	r4680
542	522
543	523	/* basic machine hardware */
544	524	MDRV_CPU_ADD("maincpu", M6809,   24576000/16)   /* 1.536 MHz */
545		MDRV_CPU_PROGRAM_MAP(readmem_cpu1,writemem_cpu1)
	525	MDRV_CPU_PROGRAM_MAP(cpu1_map,0)
546	526	MDRV_CPU_VBLANK_INT("screen", gaplus_interrupt_1)
547	527
548	528	MDRV_CPU_ADD("sub", M6809,   24576000/16)   /* 1.536 MHz */
549		MDRV_CPU_PROGRAM_MAP(readmem_cpu2,writemem_cpu2)
	529	MDRV_CPU_PROGRAM_MAP(cpu2_map,0)
550	530	MDRV_CPU_VBLANK_INT("screen", irq0_line_assert)
551	531
552	532	MDRV_CPU_ADD("sub2", M6809, 24576000/16)   /* 1.536 MHz */
553		MDRV_CPU_PROGRAM_MAP(readmem_cpu3,writemem_cpu3)
	533	MDRV_CPU_PROGRAM_MAP(cpu3_map,0)
554	534	MDRV_CPU_VBLANK_INT("screen", irq0_line_assert)
555	535
556	536	MDRV_QUANTUM_TIME(HZ(6000))   /* a high value to ensure proper synchronization of the CPUs */

src/mame/drivers/drmicro.c

r4679	r4680
74	74
75	75	/****************************************************************************/
76	76
77		static ADDRESS_MAP_START( readmem, ADDRESS_SPACE_PROGRAM, 8 )
78		AM_RANGE(0x0000, 0xbfff) AM_READ(SMH_ROM)
79		AM_RANGE(0xc000, 0xdfff) AM_READ(SMH_RAM)
80		AM_RANGE(0xe000, 0xefff) AM_READ(SMH_RAM)
81		AM_RANGE(0xf000, 0xffff) AM_READ(SMH_RAM)
	77	static ADDRESS_MAP_START( drmicro_map, ADDRESS_SPACE_PROGRAM, 8 )
	78	AM_RANGE(0x0000, 0xbfff) AM_ROM
	79	AM_RANGE(0xc000, 0xdfff) AM_RAM
	80	AM_RANGE(0xe000, 0xefff) AM_READWRITE(SMH_RAM, drmicro_videoram_w)
	81	AM_RANGE(0xf000, 0xffff) AM_RAM
82	82	ADDRESS_MAP_END
83	83
84		static ADDRESS_MAP_START( writemem, ADDRESS_SPACE_PROGRAM, 8 )
85		AM_RANGE(0x0000, 0xbfff) AM_WRITE(SMH_ROM)
86		AM_RANGE(0xc000, 0xdfff) AM_WRITE(SMH_RAM)
87		AM_RANGE(0xe000, 0xefff) AM_WRITE(drmicro_videoram_w)
88		AM_RANGE(0xf000, 0xffff) AM_WRITE(SMH_RAM)
89		ADDRESS_MAP_END
90
91	84	static ADDRESS_MAP_START( io_map, ADDRESS_SPACE_IO, 8 )
92	85	ADDRESS_MAP_GLOBAL_MASK(0xff)
93	86	AM_RANGE(0x00, 0x00) AM_READ_PORT("P1") AM_DEVWRITE("sn1", sn76496_w)
r4679	r4680
221	214
222	215	/* basic machine hardware */
223	216	MDRV_CPU_ADD("maincpu", Z80,MCLK/6)   /* 3.072MHz? */
224		MDRV_CPU_PROGRAM_MAP(readmem,writemem)
	217	MDRV_CPU_PROGRAM_MAP(drmicro_map,0)
225	218	MDRV_CPU_IO_MAP(io_map,0)
226	219	MDRV_CPU_VBLANK_INT("screen", drmicro_interrupt)
227	220

src/mame/drivers/twins.c

r4679	r4680
94	94
95	95	static VIDEO_START(twins)
96	96	{
97		twins_pal = auto_malloc(0x100*2);
	97	twins_pal = auto_alloc_array(machine, UINT16, 0x100);
98	98	}
99	99
100	100	static VIDEO_UPDATE(twins)
r4679	r4680
199	199
200	200	static VIDEO_START(twinsa)
201	201	{
202		twins_pal = auto_malloc(0x1000*2);
	202	twins_pal = auto_alloc_array(machine, UINT16, 0x1000);
203	203	}
204	204
205	205	static VIDEO_UPDATE(twinsa)

src/mame/drivers/system1.c

r4679	r4680
191	191	#include "driver.h"
192	192	#include "video/system1.h"
193	193	#include "cpu/z80/z80.h"
	194	#include "cpu/mcs51/mcs51.h"
194	195	#include "machine/z80pio.h"
195	196	#include "machine/8255ppi.h"
196	197	#include "machine/segacrpt.h"
r4679	r4680
698	699
699	700	/*************************************
700	701	*
	702	*  MCU address maps
	703	*
	704	*************************************/
	705
	706	static UINT8 mcu_control;
	707
	708	static WRITE8_HANDLER( mcu_control_w )
	709	{
	710	mcu_control = data;
	711	}
	712
	713	static WRITE8_HANDLER( mcu_io_w )
	714	{
	715	switch (mcu_control)
	716	{
	717	case 0x01:
	718	if (offset >= 0xc000 && offset < 0xd000)
	719	memory_write_byte(cpu_get_address_space(space->machine->cpu[0], ADDRESS_SPACE_PROGRAM), offset, data);
	720	else
	721	logerror("%03X: MCU movx write mode %02X offset %04X = %02X\n",
	722	cpu_get_pc(space->cpu), mcu_control, offset, data);
	723	break;
	724
	725	case 0x51:
	726	memory_write_byte(cpu_get_address_space(space->machine->cpu[0], ADDRESS_SPACE_IO), offset, data);
	727	break;
	728
	729	default:
	730	logerror("%03X: MCU movx write mode %02X offset %04X = %02X\n",
	731	cpu_get_pc(space->cpu), mcu_control, offset, data);
	732	break;
	733	}
	734	}
	735
	736	static READ8_HANDLER( mcu_io_r )
	737	{
	738	switch (mcu_control)
	739	{
	740	case 0x01:
	741	if (offset >= 0xc000)
	742	return memory_read_byte(cpu_get_address_space(space->machine->cpu[0], ADDRESS_SPACE_PROGRAM), offset);
	743	else
	744	{
	745	logerror("%03X: MCU movx read mode %02X offset %04X\n",
	746	cpu_get_pc(space->cpu), mcu_control, offset);
	747	return 0xff;
	748	}
	749
	750	case 0x47:
	751	return memory_region(space->machine, "maincpu")[offset + 0x00000];
	752
	753	case 0x4f:
	754	return memory_region(space->machine, "maincpu")[offset + 0x10000];
	755
	756	case 0x51:
	757	return memory_read_byte(cpu_get_address_space(space->machine->cpu[0], ADDRESS_SPACE_IO), offset);
	758
	759	case 0x59: /* read after each byte of internal checksum */
	760	case 0x5f: /* read after each pair of bytes during main CPU checksum */
	761	return 0xff;
	762
	763	default:
	764	logerror("%03X: MCU movx read mode %02X offset %04X\n",
	765	cpu_get_pc(space->cpu), mcu_control, offset);
	766	return 0xff;
	767	}
	768	}
	769
	770	/*
	771
	772	+------------- HALT?
	773	| +----------- I/O?
	774	| | +--------- ROM bank select
	775	| | |
	776	01  0000 0001 = read/write to Z80 program space
	777	51  0101 0001 = read/write to Z80 I/O space
	778	41  0100 0001 = write at initialization time
	779	47  0100 0111 = read from ROM 00000-07FFF
	780	4F  0100 1111 = read from ROM 10000-1FFFF
	781	5F  0101 1111 = read during ROM checksum
	782	19  0001 1001 = reads here before doing shorter loops
	783	59  0101 1001 = reads here during checksum, and in infinite loop on checksum error
	784
	785
	786	When P1 = $01, movx writes to ???, reads from ???
	787	When P1 = $19, movx reads from ???
	788	When P1 = $41, movx writes to ??? (done at init, with no dptr)
	789	When P1 = $47, movx reads from ROM 00000-07FFF
	790	When P1 = $4F, movx reads from ROM 10000-1FFFF
	791	When P1 = $51, movx writes to ??? (address $17, $14, $15, $16)
	792	When P1 = $59, movx reads from ??? (done on error, and on each byte of internal checksum)
	793	When P1 = $5F, movx reads from ??? (when after each pair of bytes during checksum)
	794	When P1 = $FF, default state
	795	*/
	796
	797	static ADDRESS_MAP_START( mcu_io_map, ADDRESS_SPACE_IO, 8 )
	798	ADDRESS_MAP_UNMAP_HIGH
	799	AM_RANGE(0x0000, 0xffff) AM_READWRITE(mcu_io_r, mcu_io_w)
	800	AM_RANGE(MCS51_PORT_P1, MCS51_PORT_P1) AM_WRITE(mcu_control_w)
	801	ADDRESS_MAP_END
	802
	803
	804
	805	/*************************************
	806	*
701	807	*  Generic port definitions
702	808	*
703	809	*************************************/
r4679	r4680
2079	2185	MDRV_CPU_PROGRAM_MAP(nobo_map,0)
2080	2186	MACHINE_DRIVER_END
2081	2187
	2188	static MACHINE_DRIVER_START( nobm )
	2189	MDRV_IMPORT_FROM( nob )
2082	2190
	2191	/* basic machine hardware */
	2192	MDRV_CPU_ADD("mcu", I8751, 8000000 /* unknown speed */)
	2193	MDRV_CPU_IO_MAP(mcu_io_map,0)
	2194	MDRV_CPU_VBLANK_INT("screen", irq0_line_pulse)
	2195	MACHINE_DRIVER_END
2083	2196
	2197
	2198
2084	2199	/* system2 video */
2085	2200	static MACHINE_DRIVER_START( sys2 )
2086	2201	MDRV_IMPORT_FROM( sys1ppi )
r4679	r4680
2090	2205	MDRV_VIDEO_UPDATE(system2)
2091	2206	MACHINE_DRIVER_END
2092	2207
	2208	static MACHINE_DRIVER_START( sys2m )
	2209	MDRV_IMPORT_FROM( sys2 )
	2210
	2211	/* basic machine hardware */
	2212	MDRV_CPU_ADD("mcu", I8751, 8000000 /* unknown speed */)
	2213	MDRV_CPU_IO_MAP(mcu_io_map,0)
	2214	MDRV_CPU_VBLANK_INT("screen", irq0_line_pulse)
	2215	MACHINE_DRIVER_END
	2216
2093	2217	/* system2 with rowscroll */
2094	2218	static MACHINE_DRIVER_START( sys2row )
2095	2219	MDRV_IMPORT_FROM( sys2 )
r4679	r4680
2098	2222	MDRV_VIDEO_UPDATE(system2_rowscroll)
2099	2223	MACHINE_DRIVER_END
2100	2224
	2225	static MACHINE_DRIVER_START( sys2rowm )
	2226	MDRV_IMPORT_FROM( sys2row )
2101	2227
	2228	/* basic machine hardware */
	2229	MDRV_CPU_ADD("mcu", I8751, 8000000 /* unknown speed */)
	2230	MDRV_CPU_IO_MAP(mcu_io_map,0)
	2231	MDRV_CPU_VBLANK_INT("screen", irq0_line_pulse)
	2232	MACHINE_DRIVER_END
2102	2233
	2234
	2235
2103	2236	/*************************************
2104	2237	*
2105	2238	*  ROM definition(s)
r4679	r4680
3181	3314	ROM_LOAD( "epr7043.ic126",  0x0000, 0x8000, CRC(99a368ab) SHA1(a9451f39ee2613e5c3e2791d4d8d837b4a3ab666) )
3182	3315
3183	3316	/* This mcu is located on the main board. */
3184		ROM_REGION( 0x10000, "cpu2", 0 )   /* Internal i8751 MCU code */
3185		ROM_LOAD( "315-5159a.ic74", 0x00000, 0x1000, NO_DUMP )
	3317	ROM_REGION( 0x1000, "mcu", 0 )
	3318	ROM_LOAD( "315-5159a.ic74", 0x00000, 0x1000, BAD_DUMP CRC(1f774912) SHA1(2a301391ffeb38ce0ebba96b7fe2acde3097e220) )
3186	3319
3187	3320	/* These roms are located on the main board. */
3188	3321	ROM_REGION( 0x18000, "tiles", 0 )
r4679	r4680
3240	3373	ROM_LOAD( "epr7043.ic126",  0x0000, 0x8000, CRC(99a368ab) SHA1(a9451f39ee2613e5c3e2791d4d8d837b4a3ab666) )
3241	3374
3242	3375	/* This mcu is located on the main board. */
3243		ROM_REGION( 0x10000, "cpu2", 0 )   /* Internal i8751 MCU code */
3244		ROM_LOAD( "315-5159.ic74", 0x00000, 0x1000, NO_DUMP )
	3376	ROM_REGION( 0x1000, "mcu", 0 )
	3377	ROM_LOAD( "315-5159.ic74", 0x00000, 0x1000, BAD_DUMP CRC(1f774912) SHA1(a9451f39ee2613e5c3e2791d4d8d837b4a3ab666) )
3245	3378
3246	3379	/* These roms are located on the main board. */
3247	3380	ROM_REGION( 0x18000, "tiles", 0 )
r4679	r4680
3380	3513	ROM_REGION( 0x10000, "soundcpu", 0 )
3381	3514	ROM_LOAD( "epr-7130.ic126",   0x0000, 0x8000, CRC(346af118) SHA1(ef579818a45b8ebb276d5832092b26e232d5a737) )
3382	3515
3383		ROM_REGION( 0x10000, "cpu2", 0 )   /* Internal i8751 MCU code */
3384		ROM_LOAD( "315-5151.ic74",  0x00000, 0x1000, NO_DUMP )
	3516	ROM_REGION( 0x1000, "mcu", 0 )
	3517	ROM_LOAD( "315-5151.ic74",  0x00000, 0x1000, BAD_DUMP CRC(7bd11a6c) SHA1(2d75a2276e572f97f269af062536c1c58e1c8eaf) )
3385	3518
3386	3519	ROM_REGION( 0x18000, "tiles", 0 )
3387	3520	ROM_LOAD( "epr-7127.ic4",   0x00000, 0x8000, CRC(1e708f6d) SHA1(b975e13bdc44105e7a15c2694e3ec53b60e23e5e) )
r4679	r4680
4376	4509	ROM_LOAD( "dm10.1k", 0x10000, 0x8000, CRC(e7c06663) SHA1(8ae42b0875afe60ef672f2285aeb72da1c7e167b) )
4377	4510	ROM_LOAD( "dm09.1h", 0x18000, 0x8000, CRC(dc4c872f) SHA1(aab85203cfd2463ffddfd48e87733fb8d6d8bcf6) )
4378	4511
4379		ROM_REGION( 0x8000, "mcu", 0 )
4380		ROM_LOAD( "8751.mcu", 0x00000, 0x8000, NO_DUMP )
	4512	ROM_REGION( 0x1000, "mcu", 0 )
	4513	ROM_LOAD( "dm.bin", 0x00000, 0x1000, CRC(6fde9dcb) SHA1(e1340644471a149b49a616c59445c85785e44fa4) )
4381	4514
4382	4515	ROM_REGION( 0x10000, "soundcpu", 0 )
4383	4516	ROM_LOAD( "dm03.9h", 0x0000, 0x4000, CRC(415adf76) SHA1(fbd6f8921aa3246702983ba81fa9ae53fa10c19d) )
r4679	r4680
4480	4613
4481	4614	mc8123_decrypt_rom(machine, "maincpu", "key", 1, 4);
4482	4615
4483		//  memory_install_read8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_IO), 0x00, 0x00, 0, 0, dakkochn_port_00_r);
4484		//  memory_install_read8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_IO), 0x03, 0x03, 0, 0, dakkochn_port_03_r);
4485		//  memory_install_read8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_IO), 0x04, 0x04, 0, 0, dakkochn_port_04_r);
	4616	//  memory_install_read8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_IO), 0x00, 0x00, 0, 0, dakkochn_port_00_r);
	4617	//  memory_install_read8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_IO), 0x03, 0x03, 0, 0, dakkochn_port_03_r);
	4618	//  memory_install_read8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_IO), 0x04, 0x04, 0, 0, dakkochn_port_04_r);
4486	4619
4487		//  memory_install_write8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_IO), 0x15, 0x15, 0, 0, dakkochn_port_15_w);
	4620	//  memory_install_write8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_IO), 0x15, 0x15, 0, 0, dakkochn_port_15_w);
4488	4621	}
4489	4622
4490	4623
r4679	r4680
4587	4720	i8751_run = choplift_i8751_run;
4588	4721	}
4589	4722
4590		static DRIVER_INIT( shtngmst )
	4723	static DRIVER_INIT( shtngmst1 )
4591	4724	{
4592	4725	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_IO);
4593	4726	memory_install_write8_handler(space, 0x10, 0x10, 0x00, 0x00, mcuenable_hack_w);
r4679	r4680
4595	4728	memory_install_read_port_handler(space, 0x18, 0x18, 0x00, 0x03, "18");
4596	4729	memory_install_read_port_handler(space, 0x1c, 0x1c, 0x00, 0x02, "GUNX");
4597	4730	memory_install_read_port_handler(space, 0x1d, 0x1d, 0x00, 0x02, "GUNY");
4598		DRIVER_INIT_CALL(choplift);
	4731	DRIVER_INIT_CALL(bank0c);
4599	4732	}
4600	4733
	4734	static DRIVER_INIT( shtngmst )
	4735	{
	4736	UINT8 *rom = memory_region(machine, "maincpu");
	4737	int addr;
4601	4738
	4739	// this is not right, but works for a decent amount of the data
	4740	for (addr = 0; addr < 0x8000; addr++)
	4741	rom[addr] ^= 0x04;
	4742	DRIVER_INIT_CALL(shtngmst1);
	4743	}
4602	4744
	4745
	4746
4603	4747	/*************************************
4604	4748	*
4605	4749	*  Game driver(s)
r4679	r4680
4626	4770	GAME( 1986, wboy2,      wboy,     sys1ppi,  wboy,      wboy2,    ROT0,   "Sega (Escape license)", "Wonder Boy (set 2, 315-5178)", GAME_SUPPORTS_SAVE )
4627	4771	GAME( 1986, wboy2u,     wboy,     sys1ppi,  wboy,      bank00,   ROT0,   "Sega (Escape license)", "Wonder Boy (set 2, not encrypted)", GAME_SUPPORTS_SAVE )
4628	4772	GAME( 1986, wbdeluxe,   wboy,     sys1ppi,  wbdeluxe,  bank00,   ROT0,   "Sega (Escape license)", "Wonder Boy Deluxe", GAME_SUPPORTS_SAVE )
4629		GAME( 1986, nob,        nobb,     nob,      nob,       bank44,   ROT270, "Data East Corporation", "Noboranka (Japan)", GAME_NOT_WORKING )
4630		GAME( 1986, nobb,       0,        nob,      nob,       nobb,     ROT270, "bootleg",               "Noboranka (Japan, bootleg)", GAME_SUPPORTS_SAVE )
	4773	GAME( 1986, nob,        0,        nobm,     nob,       bank44,   ROT270, "Data East Corporation", "Noboranka (Japan)", GAME_NOT_WORKING )
	4774	GAME( 1986, nobb,       nob,      nob,      nob,       nobb,     ROT270, "bootleg",               "Noboranka (Japan, bootleg)", GAME_SUPPORTS_SAVE )
4631	4775
4632	4776	/* PIO-based System 1 */
4633	4777	GAME( 1984, flicky,     0,        sys1pio,  flicky,    flicky,   ROT0,   "Sega",            "Flicky (128k Version, System 2, 315-5051)", GAME_SUPPORTS_SAVE )
r4679	r4680
4665	4809	GAME( 1986, brain,      0,        sys1pio,  brain,     bank44,   ROT0,   "Coreland / Sega", "Brain", GAME_SUPPORTS_SAVE )
4666	4810
4667	4811	/* System 2 */
4668		GAME( 1985, choplift,   0,        sys2row, choplift,  choplift, ROT0,   "Sega",            "Choplifter (8751 315-5151)", GAME_UNEMULATED_PROTECTION | GAME_SUPPORTS_SAVE | GAME_NOT_WORKING )
	4812	GAME( 1985, choplift,   0,        sys2rowm, choplift,  choplift, ROT0,   "Sega",            "Choplifter (8751 315-5151)", GAME_UNEMULATED_PROTECTION | GAME_SUPPORTS_SAVE | GAME_NOT_WORKING )
4669	4813	GAME( 1985, chopliftu,  choplift, sys2row,  choplift,  bank0c,   ROT0,   "Sega",            "Choplifter (unprotected)", GAME_SUPPORTS_SAVE )
4670	4814	GAME( 1985, chopliftbl, choplift, sys2row,  choplift,  bank0c,   ROT0,   "bootleg",         "Choplifter (bootleg)", GAME_SUPPORTS_SAVE )
4671		GAME( 1985, shtngmst,   0,        sys2,     shtngmst,  shtngmst, ROT0,   "Sega",            "Shooting Master (Rev A, 8751 315-5159a)", GAME_SUPPORTS_SAVE | GAME_NOT_WORKING )
4672		GAME( 1985, shtngmst1,  shtngmst, sys2,     shtngmst,  shtngmst, ROT0,   "Sega",            "Shooting Master (8751 315-5159)", GAME_SUPPORTS_SAVE | GAME_NOT_WORKING )
4673		GAME( 1985, shtngmsta,  shtngmst, sys2,     shtngmst,  shtngmst, ROT0,   "Sega [EVG]",      "Shooting Master (EVG, 8751 315-5159)", GAME_SUPPORTS_SAVE | GAME_NOT_WORKING )
	4815	GAME( 1985, shtngmst,   0,        sys2m,    shtngmst,  shtngmst, ROT0,   "Sega",            "Shooting Master (Rev A, 8751 315-5159a)", GAME_SUPPORTS_SAVE | GAME_NOT_WORKING )
	4816	GAME( 1985, shtngmst1,  shtngmst, sys2m,    shtngmst,  shtngmst1,ROT0,   "Sega",            "Shooting Master (8751 315-5159)", GAME_SUPPORTS_SAVE | GAME_NOT_WORKING )
	4817	GAME( 1985, shtngmsta,  shtngmst, sys2,     shtngmst,  shtngmst1,ROT0,   "Sega [EVG]",      "Shooting Master (EVG, 8751 315-5159)", GAME_SUPPORTS_SAVE | GAME_NOT_WORKING )
4674	4818	GAME( 1986, gardiab,    gardia,   sys2,     gardia,    gardiab,  ROT270, "bootleg",         "Gardia (317-0007?, bootleg)", GAME_IMPERFECT_GRAPHICS | GAME_SUPPORTS_SAVE )
4675	4819	GAME( 1986, wboysys2,   wboy,     sys2,     wboysys2,  wboysys2, ROT0,   "Sega (Escape license)", "Wonder Boy (system 2)", GAME_SUPPORTS_SAVE )
4676	4820	GAME( 1987, tokisens,   0,        sys2,     tokisens,  bank0c,   ROT90,  "Sega",            "Toki no Senshi - Chrono Soldier", GAME_SUPPORTS_SAVE )

src/mame/drivers/cultures.c

r4679	r4680
435	435
436	436	static DRIVER_INIT( cultures )
437	437	{
438		paletteram = auto_malloc(0x4000);
	438	paletteram = auto_alloc_array(machine, UINT8, 0x4000);
439	439	}
440	440
441	441	GAME( 1994, cultures, 0, cultures, cultures, cultures, ROT0, "Face", "Jibun wo Migaku Culture School Mahjong Hen", 0 )

src/mame/drivers/powerins.c

r4679	r4680
15	15	CPU:    MC68000, Z80 (for sound)
16	16	Sound:  2x OKI6295 (Sound code supports an additional YM2203, but it's not fitted)
17	17
18		- Note: To enter test mode press F2 (Test)
19		Use 9 (Service Coin) to change page.
	18	Note:
	19	- To enter test mode press F2 (Test)
	20	Use 9 (Service Coin) to change page.
	21	- In powerina there is a hidden test mode screen because it's a bootleg
	22	without a sound CPU. Set 18ff08 to 4 during test mode that calls the
	23	data written to $10001e "sound code".
20	24
21	25	TODO:
22	26	- sprites flip y (not used by the game)
r4679	r4680
77	81	static WRITE16_HANDLER( powerins_soundlatch_w )
78	82	{
79	83	if (ACCESSING_BITS_0_7)
80		{
81	84	soundlatch_w(space, 0, data & 0xff);
82		}
83	85	}
	86
84	87	static READ8_HANDLER( powerinb_fake_ym2203_r )
85	88	{
86	89	return 0x01;
87	90	}
88	91
89	92
90		static ADDRESS_MAP_START( powerins_readmem, ADDRESS_SPACE_PROGRAM, 16 )
91		AM_RANGE(0x000000, 0x0fffff) AM_READ(SMH_ROM            )   // ROM
	93	static ADDRESS_MAP_START( powerins_map, ADDRESS_SPACE_PROGRAM, 16 )
	94	AM_RANGE(0x000000, 0x0fffff) AM_ROM                                             // ROM
92	95	AM_RANGE(0x100000, 0x100001) AM_READ_PORT("SYSTEM")
93	96	AM_RANGE(0x100002, 0x100003) AM_READ_PORT("P1_P2")
94	97	AM_RANGE(0x100008, 0x100009) AM_READ_PORT("DSW1")
95	98	AM_RANGE(0x10000a, 0x10000b) AM_READ_PORT("DSW2")
96		AM_RANGE(0x10003e, 0x10003f) AM_DEVREAD8("oki1", okim6295_r, 0x00ff)   // OKI Status (used by powerina)
97		AM_RANGE(0x120000, 0x120fff) AM_READ(SMH_RAM            )   // Palette
98		AM_RANGE(0x130000, 0x130007) AM_READ(SMH_RAM            )   // VRAM 0 Control
99		AM_RANGE(0x140000, 0x143fff) AM_READ(SMH_RAM            )   // VRAM 0
100		AM_RANGE(0x170000, 0x170fff) AM_READ(SMH_RAM            )   // VRAM 1
101		AM_RANGE(0x180000, 0x18ffff) AM_READ(SMH_RAM            )   // RAM + Sprites
	99	AM_RANGE(0x100014, 0x100015) AM_WRITE(powerins_flipscreen_w)                        // Flip Screen
	100	AM_RANGE(0x100016, 0x100017) AM_WRITENOP                                       // ? always 1
	101	AM_RANGE(0x100018, 0x100019) AM_WRITE(powerins_tilebank_w)                           // Tiles Banking (VRAM 0)
	102	AM_RANGE(0x10001e, 0x10001f) AM_WRITE(powerins_soundlatch_w)                        // Sound Latch
	103	AM_RANGE(0x100030, 0x100031) AM_WRITE(powerins_okibank_w)                           // Sound
	104	AM_RANGE(0x120000, 0x120fff) AM_RAM_WRITE(powerins_paletteram16_w) AM_BASE(&paletteram16)   // Palette
	105	AM_RANGE(0x130000, 0x130007) AM_RAM AM_BASE(&powerins_vctrl_0)                        // VRAM 0 Control
	106	AM_RANGE(0x140000, 0x143fff) AM_RAM_WRITE(powerins_vram_0_w) AM_BASE(&powerins_vram_0)      // VRAM 0
	107	AM_RANGE(0x170000, 0x170fff) AM_RAM_WRITE(powerins_vram_1_w) AM_BASE(&powerins_vram_1)      // VRAM 1
	108	AM_RANGE(0x171000, 0x171fff) AM_WRITE(powerins_vram_1_w)                           // Mirror of VRAM 1?
	109	AM_RANGE(0x180000, 0x18ffff) AM_RAM AM_BASE(&spriteram16)                           // RAM + Sprites
102	110	ADDRESS_MAP_END
103	111
104		static ADDRESS_MAP_START( powerins_writemem, ADDRESS_SPACE_PROGRAM, 16 )
105		AM_RANGE(0x000000, 0x0fffff) AM_WRITE(SMH_ROM                        )   // ROM
106		AM_RANGE(0x100014, 0x100015) AM_WRITE(powerins_flipscreen_w               )   // Flip Screen
107		AM_RANGE(0x100016, 0x100017) AM_WRITE(SMH_NOP                        )   // ? always 1
108		AM_RANGE(0x100018, 0x100019) AM_WRITE(powerins_tilebank_w               )   // Tiles Banking (VRAM 0)
109		AM_RANGE(0x10001e, 0x10001f) AM_WRITE(powerins_soundlatch_w               )   // Sound Latch
110		AM_RANGE(0x100030, 0x100031) AM_WRITE(powerins_okibank_w               )   // Sound
111		AM_RANGE(0x10003e, 0x10003f) AM_DEVWRITE8("oki1", okim6295_w, 0x00ff   )   // used by powerina
112		AM_RANGE(0x120000, 0x120fff) AM_WRITE(powerins_paletteram16_w) AM_BASE(&paletteram16   )   // Palette
113		AM_RANGE(0x130000, 0x130007) AM_WRITE(SMH_RAM) AM_BASE(&powerins_vctrl_0   )   // VRAM 0 Control
114		AM_RANGE(0x140000, 0x143fff) AM_WRITE(powerins_vram_0_w) AM_BASE(&powerins_vram_0      )   // VRAM 0
115		AM_RANGE(0x170000, 0x170fff) AM_WRITE(powerins_vram_1_w) AM_BASE(&powerins_vram_1      )   // VRAM 1
116		AM_RANGE(0x171000, 0x171fff) AM_WRITE(powerins_vram_1_w                  )   // Mirror of VRAM 1?
117		AM_RANGE(0x180000, 0x18ffff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16         )   // RAM + Sprites
	112	/* powerina: same as the original one but without the sound cpu (and inferior sound HW) */
	113	static ADDRESS_MAP_START( powerina_map, ADDRESS_SPACE_PROGRAM, 16 )
	114	AM_RANGE(0x000000, 0x0fffff) AM_ROM                                             // ROM
	115	AM_RANGE(0x100000, 0x100001) AM_READ_PORT("SYSTEM")
	116	AM_RANGE(0x100002, 0x100003) AM_READ_PORT("P1_P2")
	117	AM_RANGE(0x100008, 0x100009) AM_READ_PORT("DSW1")
	118	AM_RANGE(0x10000a, 0x10000b) AM_READ_PORT("DSW2")
	119	AM_RANGE(0x100014, 0x100015) AM_WRITE(powerins_flipscreen_w)                        // Flip Screen
	120	AM_RANGE(0x100016, 0x100017) AM_WRITENOP                                       // ? always 1
	121	AM_RANGE(0x100018, 0x100019) AM_WRITE(powerins_tilebank_w)                           // Tiles Banking (VRAM 0)
	122	AM_RANGE(0x10001e, 0x10001f) AM_WRITENOP                                       // Sound Latch, NOPed since there is no sound cpu
	123	AM_RANGE(0x100030, 0x100031) AM_WRITE(powerins_okibank_w)                           // Sound
	124	AM_RANGE(0x10003e, 0x10003f) AM_DEVREADWRITE8("oki1", okim6295_r,okim6295_w, 0x00ff)      // (used by powerina)
	125	AM_RANGE(0x120000, 0x120fff) AM_RAM_WRITE(powerins_paletteram16_w) AM_BASE(&paletteram16)   // Palette
	126	AM_RANGE(0x130000, 0x130007) AM_RAM AM_BASE(&powerins_vctrl_0)                        // VRAM 0 Control
	127	AM_RANGE(0x140000, 0x143fff) AM_RAM_WRITE(powerins_vram_0_w) AM_BASE(&powerins_vram_0)      // VRAM 0
	128	AM_RANGE(0x170000, 0x170fff) AM_RAM_WRITE(powerins_vram_1_w) AM_BASE(&powerins_vram_1)      // VRAM 1
	129	AM_RANGE(0x171000, 0x171fff) AM_WRITE(powerins_vram_1_w)                           // Mirror of VRAM 1?
	130	AM_RANGE(0x180000, 0x18ffff) AM_RAM AM_BASE(&spriteram16)                           // RAM + Sprites
118	131	ADDRESS_MAP_END
119	132
120		/* In powerina there is a hidden test mode screen because it's a bootleg
121		without a sound CPU. Set 18ff08 to 4 during test mode that calls the
122		data written to $10001e "sound code". */
123
124		static ADDRESS_MAP_START( readmem_snd, ADDRESS_SPACE_PROGRAM, 8 )
125		AM_RANGE(0x0000, 0xbfff) AM_READ(SMH_ROM)
126		AM_RANGE(0xc000, 0xdfff) AM_READ(SMH_RAM)
	133	static ADDRESS_MAP_START( powerins_sound_map, ADDRESS_SPACE_PROGRAM, 8 )
	134	AM_RANGE(0x0000, 0xbfff) AM_ROM
	135	AM_RANGE(0xc000, 0xdfff) AM_RAM
127	136	AM_RANGE(0xe000, 0xe000) AM_READ(soundlatch_r)
128		ADDRESS_MAP_END
129
130		static ADDRESS_MAP_START( writemem_snd, ADDRESS_SPACE_PROGRAM, 8 )
131		AM_RANGE(0x0000, 0xbfff) AM_WRITE(SMH_ROM)
132		AM_RANGE(0xc000, 0xdfff) AM_WRITE(SMH_RAM)
133	137	//  AM_RANGE(0xe000, 0xe000) AM_WRITENOP // ? written only once ?
134	138	//  AM_RANGE(0xe001, 0xe001) AM_WRITENOP // ?
135	139	ADDRESS_MAP_END
136	140
137		static ADDRESS_MAP_START( powerins_io_snd, ADDRESS_SPACE_IO, 8 )
	141	static ADDRESS_MAP_START( powerins_sound_io_map, ADDRESS_SPACE_IO, 8 )
138	142	ADDRESS_MAP_GLOBAL_MASK(0xff)
139	143	AM_RANGE(0x00, 0x01) AM_DEVREADWRITE("ym2203", ym2203_r, ym2203_w)
140	144	AM_RANGE(0x80, 0x80) AM_DEVREADWRITE("oki1", okim6295_r, okim6295_w)
r4679	r4680
142	146	AM_RANGE(0x90, 0x97) AM_WRITE(NMK112_okibank_w)
143	147	ADDRESS_MAP_END
144	148
145		static ADDRESS_MAP_START( powerinb_io_snd, ADDRESS_SPACE_IO, 8 )
	149	static ADDRESS_MAP_START( powerinb_sound_io_map, ADDRESS_SPACE_IO, 8 )
146	150	ADDRESS_MAP_GLOBAL_MASK(0xff)
147		AM_RANGE(0x00, 0x00) AM_READWRITE(powerinb_fake_ym2203_r, SMH_NOP)
	151	AM_RANGE(0x00, 0x00) AM_READ(powerinb_fake_ym2203_r) AM_WRITENOP
148	152	AM_RANGE(0x01, 0x01) AM_NOP
149	153	AM_RANGE(0x80, 0x80) AM_DEVREADWRITE("oki1", okim6295_r, okim6295_w)
150	154	AM_RANGE(0x88, 0x88) AM_DEVREADWRITE("oki2", okim6295_r, okim6295_w)
151	155	AM_RANGE(0x90, 0x97) AM_WRITE(NMK112_okibank_w)
152	156	ADDRESS_MAP_END
153	157
	158
154	159	/***************************************************************************
155	160
156	161	Input Ports
r4679	r4680
335	340
336	341	static void irqhandler(const device_config *device, int irq)
337	342	{
338		cpu_set_input_line(device->machine->cpu[1],0,irq ? ASSERT_LINE : CLEAR_LINE);
	343	cputag_set_input_line(device->machine, "soundcpu", 0, irq ? ASSERT_LINE : CLEAR_LINE);
339	344	}
340	345
341	346	static const ym2203_interface ym2203_config =
r4679	r4680
352	357
353	358	/* basic machine hardware */
354	359	MDRV_CPU_ADD("maincpu", M68000, 12000000)   /* 12MHz */
355		MDRV_CPU_PROGRAM_MAP(powerins_readmem,powerins_writemem)
	360	MDRV_CPU_PROGRAM_MAP(powerins_map,0)
356	361	MDRV_CPU_VBLANK_INT("screen", irq4_line_hold)
357	362
358	363	MDRV_CPU_ADD("soundcpu", Z80, 6000000) /* 6 MHz */
359		MDRV_CPU_PROGRAM_MAP(readmem_snd,writemem_snd)
360		MDRV_CPU_IO_MAP(powerins_io_snd,0)
	364	MDRV_CPU_PROGRAM_MAP(powerins_sound_map,0)
	365	MDRV_CPU_IO_MAP(powerins_sound_io_map,0)
361	366
362	367	MDRV_MACHINE_RESET(powerins)
363	368
r4679	r4680
396	401	/* basic machine hardware */
397	402	MDRV_IMPORT_FROM(powerins)
398	403
	404	MDRV_CPU_MODIFY("maincpu")
	405	MDRV_CPU_PROGRAM_MAP(powerina_map,0)
	406
399	407	MDRV_SCREEN_MODIFY("screen")
400	408	MDRV_SCREEN_REFRESH_RATE(60)
401	409
r4679	r4680
418	426	MDRV_SCREEN_REFRESH_RATE(60)
419	427
420	428	MDRV_CPU_MODIFY("soundcpu") /* 6 MHz */
421		MDRV_CPU_IO_MAP(powerinb_io_snd,0)
	429	MDRV_CPU_IO_MAP(powerinb_sound_io_map,0)
422	430	MDRV_CPU_PERIODIC_INT(irq0_line_hold, 120)   // YM2203 rate is at 150??
423	431
424	432	MDRV_SOUND_REMOVE("ym2203")   // Sound code talks to one, but it's not fitted on the board

src/mame/drivers/quizo.c

r4679	r4680
244	244
245	245	static DRIVER_INIT(quizo)
246	246	{
247		videoram=auto_malloc(0x4000*2);
	247	videoram=auto_alloc_array(machine, UINT8, 0x4000*2);
248	248	}
249	249
250	250	GAME( 1985, quizo,  0,       quizo,  quizo,  quizo, ROT0, "Seoul Coin Corp.", "Quiz Olympic (set 1)", 0 )

src/mame/drivers/niyanpai.c

r4679	r4680
181	181
182	182	static MACHINE_RESET( niyanpai )
183	183	{
184		const address_space *space = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM);
	184	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
185	185	int i;
186	186
187	187	// initialize TMPZ84C011 PIO
r4679	r4680
251	251
252	252	static CUSTOM_INPUT( musobana_outcoin_flag_r )
253	253	{
254		const address_space *space = cpu_get_address_space(field->port->machine->cpu[0], ADDRESS_SPACE_PROGRAM);
	254	const address_space *space = cputag_get_address_space(field->port->machine, "maincpu", ADDRESS_SPACE_PROGRAM);
255	255	// tmp68301_parallel_interface[0x05]
256	256	//  bit 0   coin counter
257	257	//  bit 2   motor on
r4679	r4680
268	268	musobana_inputport = data;
269	269	}
270	270
	271	#define TMP68301_REGS \
	272	AM_RANGE(0xfffc00, 0xfffc0f) AM_READWRITE(tmp68301_address_decoder_r,tmp68301_address_decoder_w) \
	273	AM_RANGE(0xfffc80, 0xfffc9f) AM_READWRITE(tmp68301_interrupt_controller_r,tmp68301_interrupt_controller_w) \
	274	AM_RANGE(0xfffd00, 0xfffd0f) AM_READWRITE(tmp68301_parallel_interface_r,tmp68301_parallel_interface_w) \
	275	AM_RANGE(0xfffd80, 0xfffdaf) AM_READWRITE(tmp68301_serial_interface_r,tmp68301_serial_interface_w) \
	276	AM_RANGE(0xfffe00, 0xfffe4f) AM_READWRITE(tmp68301_timer_r,tmp68301_timer_w)
271	277
272		static ADDRESS_MAP_START( niyanpai_readmem, ADDRESS_SPACE_PROGRAM, 16 )
273		AM_RANGE(0x000000, 0x03ffff) AM_READ(SMH_ROM)
274		AM_RANGE(0x040000, 0x040fff) AM_READ(SMH_RAM)
275	278
276		AM_RANGE(0x0a0000, 0x0a08ff) AM_READ(niyanpai_palette_r)
277		AM_RANGE(0x0a0900, 0x0a11ff) AM_READ(SMH_RAM)            // palette work ram?
	279	static ADDRESS_MAP_START( niyanpai_map, ADDRESS_SPACE_PROGRAM, 16 )
	280	AM_RANGE(0x000000, 0x03ffff) AM_ROM
	281	AM_RANGE(0x040000, 0x040fff) AM_RAM AM_BASE(&generic_nvram16) AM_SIZE(&generic_nvram_size)
278	282
279		AM_RANGE(0x0bf800, 0x0bffff) AM_READ(SMH_RAM)
	283	AM_RANGE(0x0a0000, 0x0a08ff) AM_READWRITE(niyanpai_palette_r,niyanpai_palette_w)
	284	AM_RANGE(0x0a0900, 0x0a11ff) AM_RAM   // palette work ram?
280	285
281		AM_RANGE(0x240400, 0x240403) AM_READ(niyanpai_blitter_0_r)
282		AM_RANGE(0x240600, 0x240603) AM_READ(niyanpai_blitter_1_r)
283		AM_RANGE(0x240800, 0x240803) AM_READ(niyanpai_blitter_2_r)
	286	AM_RANGE(0x0bf800, 0x0bffff) AM_RAM
284	287
285		AM_RANGE(0x280000, 0x280001) AM_READ(niyanpai_dipsw_r)
286		AM_RANGE(0x280200, 0x280201) AM_READ_PORT("P1_P2")
287		AM_RANGE(0x280400, 0x280401) AM_READ_PORT("SYSTEM")
288
289		AM_RANGE(0xfffc00, 0xfffc0f) AM_READ(tmp68301_address_decoder_r)
290		AM_RANGE(0xfffc80, 0xfffc9f) AM_READ(tmp68301_interrupt_controller_r)
291		AM_RANGE(0xfffd00, 0xfffd0f) AM_READ(tmp68301_parallel_interface_r)
292		AM_RANGE(0xfffd80, 0xfffdaf) AM_READ(tmp68301_serial_interface_r)
293		AM_RANGE(0xfffe00, 0xfffe4f) AM_READ(tmp68301_timer_r)
294		ADDRESS_MAP_END
295
296		static ADDRESS_MAP_START( niyanpai_writemem, ADDRESS_SPACE_PROGRAM, 16 )
297		AM_RANGE(0x000000, 0x03ffff) AM_WRITE(SMH_ROM)
298		AM_RANGE(0x040000, 0x040fff) AM_WRITE(SMH_RAM) AM_BASE(&generic_nvram16) AM_SIZE(&generic_nvram_size)
299
300		AM_RANGE(0x0a0000, 0x0a08ff) AM_WRITE(niyanpai_palette_w)
301		AM_RANGE(0x0a0900, 0x0a11ff) AM_WRITE(SMH_RAM)         // palette work ram?
302
303		AM_RANGE(0x0bf800, 0x0bffff) AM_WRITE(SMH_RAM)
304
305	288	AM_RANGE(0x200000, 0x200001) AM_WRITE(niyanpai_sound_w)
306	289
307	290	AM_RANGE(0x200200, 0x200201) AM_WRITENOP         // unknown
308	291	AM_RANGE(0x240000, 0x240009) AM_WRITENOP         // unknown
309	292	AM_RANGE(0x240200, 0x2403ff) AM_WRITENOP         // unknown
310	293
	294	AM_RANGE(0x240400, 0x240403) AM_READ(niyanpai_blitter_0_r)
311	295	AM_RANGE(0x240400, 0x24041f) AM_WRITE(niyanpai_blitter_0_w)
312	296	AM_RANGE(0x240420, 0x24043f) AM_WRITE(niyanpai_clut_0_w)
313
	297	AM_RANGE(0x240600, 0x240603) AM_READ(niyanpai_blitter_1_r)
314	298	AM_RANGE(0x240600, 0x24061f) AM_WRITE(niyanpai_blitter_1_w)
315	299	AM_RANGE(0x240620, 0x24063f) AM_WRITE(niyanpai_clut_1_w)
316
	300	AM_RANGE(0x240800, 0x240803) AM_READ(niyanpai_blitter_2_r)
317	301	AM_RANGE(0x240800, 0x24081f) AM_WRITE(niyanpai_blitter_2_w)
318	302	AM_RANGE(0x240820, 0x24083f) AM_WRITE(niyanpai_clut_2_w)
	303	AM_RANGE(0x280000, 0x280001) AM_READ(niyanpai_dipsw_r)
319	304
	305	AM_RANGE(0x280200, 0x280201) AM_READ_PORT("P1_P2")
	306	AM_RANGE(0x280400, 0x280401) AM_READ_PORT("SYSTEM")
320	307	AM_RANGE(0x240a00, 0x240a01) AM_WRITE(niyanpai_clutsel_0_w)
321	308	AM_RANGE(0x240c00, 0x240c01) AM_WRITE(niyanpai_clutsel_1_w)
322	309	AM_RANGE(0x240e00, 0x240e01) AM_WRITE(niyanpai_clutsel_2_w)
323	310
324		AM_RANGE(0xfffc00, 0xfffc0f) AM_WRITE(tmp68301_address_decoder_w)
325		AM_RANGE(0xfffc80, 0xfffc9f) AM_WRITE(tmp68301_interrupt_controller_w)
326		AM_RANGE(0xfffd00, 0xfffd0f) AM_WRITE(tmp68301_parallel_interface_w)
327		AM_RANGE(0xfffd80, 0xfffdaf) AM_WRITE(tmp68301_serial_interface_w)
328		AM_RANGE(0xfffe00, 0xfffe4f) AM_WRITE(tmp68301_timer_w)
	311	TMP68301_REGS
329	312	ADDRESS_MAP_END
330	313
331		static ADDRESS_MAP_START( musobana_readmem, ADDRESS_SPACE_PROGRAM, 16 )
332		AM_RANGE(0x000000, 0x03ffff) AM_READ(SMH_ROM)
333		AM_RANGE(0x040000, 0x040fff) AM_READ(SMH_RAM)
	314	static ADDRESS_MAP_START( musobana_map, ADDRESS_SPACE_PROGRAM, 16 )
	315	AM_RANGE(0x000000, 0x03ffff) AM_ROM
	316	AM_RANGE(0x040000, 0x040fff) AM_RAM
334	317
335		AM_RANGE(0x0a0000, 0x0a08ff) AM_READ(niyanpai_palette_r)
336		AM_RANGE(0x0a0900, 0x0a11ff) AM_READ(SMH_RAM)            // palette work ram?
	318	AM_RANGE(0x0a0000, 0x0a08ff) AM_READWRITE(niyanpai_palette_r,niyanpai_palette_w)
	319	AM_RANGE(0x0a0900, 0x0a11ff) AM_RAM            // palette work ram?
337	320
338		AM_RANGE(0x0a8000, 0x0a87ff) AM_READ(SMH_RAM)
339		AM_RANGE(0x0bf800, 0x0bffff) AM_READ(SMH_RAM)
	321	AM_RANGE(0x0a8000, 0x0a87ff) AM_RAM AM_BASE(&generic_nvram16) AM_SIZE(&generic_nvram_size)
	322	AM_RANGE(0x0bf800, 0x0bffff) AM_RAM
340	323
341		AM_RANGE(0x240400, 0x240403) AM_READ(niyanpai_blitter_0_r)
342		AM_RANGE(0x240600, 0x240603) AM_READ(niyanpai_blitter_1_r)
343		AM_RANGE(0x240800, 0x240803) AM_READ(niyanpai_blitter_2_r)
344
345		AM_RANGE(0x280000, 0x280001) AM_READ(niyanpai_dipsw_r)
346		AM_RANGE(0x280200, 0x280201) AM_READ(musobana_inputport_0_r)
347		AM_RANGE(0x280400, 0x280401) AM_READ_PORT("SYSTEM")
348
349		AM_RANGE(0xfffc00, 0xfffc0f) AM_READ(tmp68301_address_decoder_r)
350		AM_RANGE(0xfffc80, 0xfffc9f) AM_READ(tmp68301_interrupt_controller_r)
351		AM_RANGE(0xfffd00, 0xfffd0f) AM_READ(tmp68301_parallel_interface_r)
352		AM_RANGE(0xfffd80, 0xfffdaf) AM_READ(tmp68301_serial_interface_r)
353		AM_RANGE(0xfffe00, 0xfffe4f) AM_READ(tmp68301_timer_r)
354		ADDRESS_MAP_END
355
356		static ADDRESS_MAP_START( musobana_writemem, ADDRESS_SPACE_PROGRAM, 16 )
357		AM_RANGE(0x000000, 0x03ffff) AM_WRITE(SMH_ROM)
358		AM_RANGE(0x040000, 0x040fff) AM_WRITE(SMH_RAM)
359
360		AM_RANGE(0x0a0000, 0x0a08ff) AM_WRITE(niyanpai_palette_w)
361		AM_RANGE(0x0a0900, 0x0a11ff) AM_WRITE(SMH_RAM)         // palette work ram?
362
363		AM_RANGE(0x0a8000, 0x0a87ff) AM_WRITE(SMH_RAM) AM_BASE(&generic_nvram16) AM_SIZE(&generic_nvram_size)
364		AM_RANGE(0x0bf800, 0x0bffff) AM_WRITE(SMH_RAM)
365
366	324	AM_RANGE(0x200000, 0x200001) AM_WRITE(niyanpai_sound_w)
367	325
368	326	AM_RANGE(0x200200, 0x200201) AM_WRITE(musobana_inputport_w)   // inputport select
369	327	AM_RANGE(0x240000, 0x240009) AM_WRITENOP         // unknown
370	328	AM_RANGE(0x240200, 0x2403ff) AM_WRITENOP         // unknown
371	329
	330	AM_RANGE(0x240400, 0x240403) AM_READ(niyanpai_blitter_0_r)
372	331	AM_RANGE(0x240400, 0x24041f) AM_WRITE(niyanpai_blitter_0_w)
373	332	AM_RANGE(0x240420, 0x24043f) AM_WRITE(niyanpai_clut_0_w)
374	333
	334	AM_RANGE(0x240600, 0x240603) AM_READ(niyanpai_blitter_1_r)
375	335	AM_RANGE(0x240600, 0x24061f) AM_WRITE(niyanpai_blitter_1_w)
376	336	AM_RANGE(0x240620, 0x24063f) AM_WRITE(niyanpai_clut_1_w)
377	337
	338	AM_RANGE(0x240800, 0x240803) AM_READ(niyanpai_blitter_2_r)
378	339	AM_RANGE(0x240800, 0x24081f) AM_WRITE(niyanpai_blitter_2_w)
379	340	AM_RANGE(0x240820, 0x24083f) AM_WRITE(niyanpai_clut_2_w)
380
381	341	AM_RANGE(0x240a00, 0x240a01) AM_WRITE(niyanpai_clutsel_0_w)
382	342	AM_RANGE(0x240c00, 0x240c01) AM_WRITE(niyanpai_clutsel_1_w)
383	343	AM_RANGE(0x240e00, 0x240e01) AM_WRITE(niyanpai_clutsel_2_w)
384	344
385		AM_RANGE(0xfffc00, 0xfffc0f) AM_WRITE(tmp68301_address_decoder_w)
386		AM_RANGE(0xfffc80, 0xfffc9f) AM_WRITE(tmp68301_interrupt_controller_w)
387		AM_RANGE(0xfffd00, 0xfffd0f) AM_WRITE(tmp68301_parallel_interface_w)
388		AM_RANGE(0xfffd80, 0xfffdaf) AM_WRITE(tmp68301_serial_interface_w)
389		AM_RANGE(0xfffe00, 0xfffe4f) AM_WRITE(tmp68301_timer_w)
390		ADDRESS_MAP_END
391
392		static ADDRESS_MAP_START( mhhonban_readmem, ADDRESS_SPACE_PROGRAM, 16 )
393		AM_RANGE(0x000000, 0x03ffff) AM_READ(SMH_ROM)
394		AM_RANGE(0x040000, 0x040fff) AM_READ(SMH_RAM)
395
396		AM_RANGE(0x060000, 0x0608ff) AM_READ(niyanpai_palette_r)
397		AM_RANGE(0x060900, 0x0611ff) AM_READ(SMH_RAM)            // palette work ram?
398		AM_RANGE(0x07f800, 0x07ffff) AM_READ(SMH_RAM)
399
400		AM_RANGE(0x0a8000, 0x0a87ff) AM_READ(SMH_RAM)
401		AM_RANGE(0x0bf000, 0x0bffff) AM_READ(SMH_RAM)
402
403		AM_RANGE(0x240400, 0x240403) AM_READ(niyanpai_blitter_0_r)
404		AM_RANGE(0x240600, 0x240603) AM_READ(niyanpai_blitter_1_r)
405		AM_RANGE(0x240800, 0x240803) AM_READ(niyanpai_blitter_2_r)
406
407	345	AM_RANGE(0x280000, 0x280001) AM_READ(niyanpai_dipsw_r)
408	346	AM_RANGE(0x280200, 0x280201) AM_READ(musobana_inputport_0_r)
409	347	AM_RANGE(0x280400, 0x280401) AM_READ_PORT("SYSTEM")
410	348
411		AM_RANGE(0xfffc00, 0xfffc0f) AM_READ(tmp68301_address_decoder_r)
412		AM_RANGE(0xfffc80, 0xfffc9f) AM_READ(tmp68301_interrupt_controller_r)
413		AM_RANGE(0xfffd00, 0xfffd0f) AM_READ(tmp68301_parallel_interface_r)
414		AM_RANGE(0xfffd80, 0xfffdaf) AM_READ(tmp68301_serial_interface_r)
415		AM_RANGE(0xfffe00, 0xfffe4f) AM_READ(tmp68301_timer_r)
	349	TMP68301_REGS
416	350	ADDRESS_MAP_END
417	351
418		static ADDRESS_MAP_START( mhhonban_writemem, ADDRESS_SPACE_PROGRAM, 16 )
419		AM_RANGE(0x000000, 0x03ffff) AM_WRITE(SMH_ROM)
420		AM_RANGE(0x040000, 0x040fff) AM_WRITE(SMH_RAM)
	352	static ADDRESS_MAP_START( mhhonban_map, ADDRESS_SPACE_PROGRAM, 16 )
	353	AM_RANGE(0x000000, 0x03ffff) AM_ROM
	354	AM_RANGE(0x040000, 0x040fff) AM_RAM
421	355
422		AM_RANGE(0x060000, 0x0608ff) AM_WRITE(niyanpai_palette_w)
423		AM_RANGE(0x060900, 0x0611ff) AM_WRITE(SMH_RAM)         // palette work ram?
424		AM_RANGE(0x07f800, 0x07ffff) AM_WRITE(SMH_RAM)
	356	AM_RANGE(0x060000, 0x0608ff) AM_READWRITE(niyanpai_palette_r,niyanpai_palette_w)
	357	AM_RANGE(0x060900, 0x0611ff) AM_RAM            // palette work ram?
	358	AM_RANGE(0x07f800, 0x07ffff) AM_RAM
425	359
426		AM_RANGE(0x0a8000, 0x0a87ff) AM_WRITE(SMH_RAM) AM_BASE(&generic_nvram16) AM_SIZE(&generic_nvram_size)
427		AM_RANGE(0x0bf000, 0x0bffff) AM_WRITE(SMH_RAM)
	360	AM_RANGE(0x0a8000, 0x0a87ff) AM_RAM AM_BASE(&generic_nvram16) AM_SIZE(&generic_nvram_size)
	361	AM_RANGE(0x0bf000, 0x0bffff) AM_RAM
428	362
429	363	AM_RANGE(0x200000, 0x200001) AM_WRITE(niyanpai_sound_w)
430	364
r4679	r4680
432	366	AM_RANGE(0x240000, 0x240009) AM_WRITENOP         // unknown
433	367	AM_RANGE(0x240200, 0x2403ff) AM_WRITENOP         // unknown
434	368
	369	AM_RANGE(0x240400, 0x240403) AM_READ(niyanpai_blitter_0_r)
435	370	AM_RANGE(0x240400, 0x24041f) AM_WRITE(niyanpai_blitter_0_w)
436	371	AM_RANGE(0x240420, 0x24043f) AM_WRITE(niyanpai_clut_0_w)
437	372
	373	AM_RANGE(0x240600, 0x240603) AM_READ(niyanpai_blitter_1_r)
438	374	AM_RANGE(0x240600, 0x24061f) AM_WRITE(niyanpai_blitter_1_w)
439	375	AM_RANGE(0x240620, 0x24063f) AM_WRITE(niyanpai_clut_1_w)
440	376
	377	AM_RANGE(0x240800, 0x240803) AM_READ(niyanpai_blitter_2_r)
441	378	AM_RANGE(0x240800, 0x24081f) AM_WRITE(niyanpai_blitter_2_w)
442	379	AM_RANGE(0x240820, 0x24083f) AM_WRITE(niyanpai_clut_2_w)
443	380
r4679	r4680
445	382	AM_RANGE(0x240c00, 0x240c01) AM_WRITE(niyanpai_clutsel_1_w)
446	383	AM_RANGE(0x240e00, 0x240e01) AM_WRITE(niyanpai_clutsel_2_w)
447	384
448		AM_RANGE(0xfffc00, 0xfffc0f) AM_WRITE(tmp68301_address_decoder_w)
449		AM_RANGE(0xfffc80, 0xfffc9f) AM_WRITE(tmp68301_interrupt_controller_w)
450		AM_RANGE(0xfffd00, 0xfffd0f) AM_WRITE(tmp68301_parallel_interface_w)
451		AM_RANGE(0xfffd80, 0xfffdaf) AM_WRITE(tmp68301_serial_interface_w)
452		AM_RANGE(0xfffe00, 0xfffe4f) AM_WRITE(tmp68301_timer_w)
	385	AM_RANGE(0x280000, 0x280001) AM_READ(niyanpai_dipsw_r)
	386	AM_RANGE(0x280200, 0x280201) AM_READ(musobana_inputport_0_r)
	387	AM_RANGE(0x280400, 0x280401) AM_READ_PORT("SYSTEM")
	388
	389	TMP68301_REGS
453	390	ADDRESS_MAP_END
454	391
455	392
456		static ADDRESS_MAP_START( sound_readmem, ADDRESS_SPACE_PROGRAM, 8 )
457		AM_RANGE(0x0000, 0x77ff) AM_READ(SMH_ROM)
458		AM_RANGE(0x7800, 0x7fff) AM_READ(SMH_RAM)
459		AM_RANGE(0x8000, 0xffff) AM_READ(SMH_BANK1)
	393	static ADDRESS_MAP_START( niyanpai_sound_map, ADDRESS_SPACE_PROGRAM, 8 )
	394	AM_RANGE(0x0000, 0x77ff) AM_ROM
	395	AM_RANGE(0x7800, 0x7fff) AM_RAM
	396	AM_RANGE(0x8000, 0xffff) AM_ROMBANK(1)
460	397	ADDRESS_MAP_END
461	398
462		static ADDRESS_MAP_START( sound_writemem, ADDRESS_SPACE_PROGRAM, 8 )
463		AM_RANGE(0x0000, 0x77ff) AM_WRITE(SMH_ROM)
464		AM_RANGE(0x7800, 0x7fff) AM_WRITE(SMH_RAM)
465		ADDRESS_MAP_END
466
467		static ADDRESS_MAP_START( sound_io_map, ADDRESS_SPACE_IO, 8 )
	399	static ADDRESS_MAP_START( niyanpai_sound_io_map, ADDRESS_SPACE_IO, 8 )
468	400	ADDRESS_MAP_GLOBAL_MASK(0xff)
469	401	AM_RANGE(0x10, 0x13) AM_DEVREADWRITE("ctc", z80ctc_r, z80ctc_w)
470	402	AM_RANGE(0x50, 0x50) AM_READWRITE(tmpz84c011_0_pa_r, tmpz84c011_0_pa_w)
r4679	r4680
848	780
849	781	/* basic machine hardware */
850	782	MDRV_CPU_ADD("maincpu", M68000, 12288000/2)   /* TMP68301, 6.144 MHz */
851		MDRV_CPU_PROGRAM_MAP(niyanpai_readmem,niyanpai_writemem)
	783	MDRV_CPU_PROGRAM_MAP(niyanpai_map,0)
852	784	MDRV_CPU_VBLANK_INT("screen", niyanpai_interrupt)
853	785
854	786	MDRV_CPU_ADD("audiocpu", Z80, 8000000/1)               /* TMPZ84C011, 8.00 MHz */
855	787	MDRV_CPU_CONFIG(daisy_chain_sound)
856		MDRV_CPU_PROGRAM_MAP(sound_readmem, sound_writemem)
857		MDRV_CPU_IO_MAP(sound_io_map,0)
	788	MDRV_CPU_PROGRAM_MAP(niyanpai_sound_map, 0)
	789	MDRV_CPU_IO_MAP(niyanpai_sound_io_map,0)
858	790
859	791	MDRV_Z80CTC_ADD("ctc", 8000000/1 /* same as "audiocpu" */, ctc_intf)
860	792
r4679	r4680
892	824	/* basic machine hardware */
893	825	MDRV_IMPORT_FROM(niyanpai)
894	826	MDRV_CPU_MODIFY("maincpu")
895		MDRV_CPU_PROGRAM_MAP(musobana_readmem, musobana_writemem)
	827	MDRV_CPU_PROGRAM_MAP(musobana_map, 0)
896	828	MACHINE_DRIVER_END
897	829
898	830	static MACHINE_DRIVER_START( mhhonban )
r4679	r4680
900	832	/* basic machine hardware */
901	833	MDRV_IMPORT_FROM(niyanpai)
902	834	MDRV_CPU_MODIFY("maincpu")
903		MDRV_CPU_PROGRAM_MAP(mhhonban_readmem, mhhonban_writemem)
	835	MDRV_CPU_PROGRAM_MAP(mhhonban_map, 0)
904	836	MACHINE_DRIVER_END
905	837
906	838
r4679	r4680
985	917	GAME( 1995, musobana, 0, musobana, musobana, niyanpai, ROT0, "Nichibutsu/Yubis", "Musoubana (Japan)", 0 )
986	918	GAME( 1994, 4psimasy, 0, musobana, 4psimasy, niyanpai, ROT0, "SPHINX/AV JAPAN", "Mahjong 4P Simasyo (Japan)", 0 )
987	919	GAME( 199?, mhhonban, 0, mhhonban, mhhonban, niyanpai, ROT0, "Nichibutsu?", "Mahjong Housoukyoku Honbanchuu (Japan)", 0 )
988

src/mame/drivers/exedexes.c

r4679	r4680
42	42
43	43
44	44
45		static ADDRESS_MAP_START( readmem, ADDRESS_SPACE_PROGRAM, 8 )
46		AM_RANGE(0x0000, 0xbfff) AM_READ(SMH_ROM)
	45	static ADDRESS_MAP_START( exedexes_map, ADDRESS_SPACE_PROGRAM, 8 )
	46	AM_RANGE(0x0000, 0xbfff) AM_ROM
47	47	AM_RANGE(0xc000, 0xc000) AM_READ_PORT("SYSTEM")
48	48	AM_RANGE(0xc001, 0xc001) AM_READ_PORT("P1")
49	49	AM_RANGE(0xc002, 0xc002) AM_READ_PORT("P2")
50	50	AM_RANGE(0xc003, 0xc003) AM_READ_PORT("DSW0")
51	51	AM_RANGE(0xc004, 0xc004) AM_READ_PORT("DSW1")
52		AM_RANGE(0xd000, 0xd7ff) AM_READ(SMH_RAM)
53		AM_RANGE(0xe000, 0xefff) AM_READ(SMH_RAM) /* Work RAM */
54		AM_RANGE(0xf000, 0xffff) AM_READ(SMH_RAM) /* Sprite RAM */
55		ADDRESS_MAP_END
56
57		static ADDRESS_MAP_START( writemem, ADDRESS_SPACE_PROGRAM, 8 )
58		AM_RANGE(0x0000, 0xbfff) AM_WRITE(SMH_ROM)
59	52	AM_RANGE(0xc800, 0xc800) AM_WRITE(soundlatch_w)
60		AM_RANGE(0xc804, 0xc804) AM_WRITE(exedexes_c804_w)   /* coin counters + text layer enable */
61		AM_RANGE(0xc806, 0xc806) AM_WRITENOP /* Watchdog ?? */
62		AM_RANGE(0xd000, 0xd3ff) AM_WRITE(exedexes_videoram_w) AM_BASE(&videoram)
63		AM_RANGE(0xd400, 0xd7ff) AM_WRITE(exedexes_colorram_w) AM_BASE(&colorram)
	53	AM_RANGE(0xc804, 0xc804) AM_WRITE(exedexes_c804_w)                        /* coin counters + text layer enable */
	54	AM_RANGE(0xc806, 0xc806) AM_WRITENOP                                  /* Watchdog ?? */
	55	AM_RANGE(0xd000, 0xd3ff) AM_RAM_WRITE(exedexes_videoram_w) AM_BASE(&videoram)   /* Video RAM */
	56	AM_RANGE(0xd400, 0xd7ff) AM_RAM_WRITE(exedexes_colorram_w) AM_BASE(&colorram)   /* Color RAM */
64	57	AM_RANGE(0xd800, 0xd801) AM_WRITE(SMH_RAM) AM_BASE(&exedexes_nbg_yscroll)
65	58	AM_RANGE(0xd802, 0xd803) AM_WRITE(SMH_RAM) AM_BASE(&exedexes_nbg_xscroll)
66	59	AM_RANGE(0xd804, 0xd805) AM_WRITE(SMH_RAM) AM_BASE(&exedexes_bg_scroll)
67		AM_RANGE(0xd807, 0xd807) AM_WRITE(exedexes_gfxctrl_w)   /* layer enables */
68		AM_RANGE(0xe000, 0xefff) AM_WRITE(SMH_RAM)
69		AM_RANGE(0xf000, 0xffff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
	60	AM_RANGE(0xd807, 0xd807) AM_WRITE(exedexes_gfxctrl_w)                     /* layer enables */
	61	AM_RANGE(0xe000, 0xefff) AM_RAM                                       /* Work RAM */
	62	AM_RANGE(0xf000, 0xffff) AM_RAM AM_BASE(&spriteram) AM_SIZE(&spriteram_size)   /* Sprite RAM */
70	63	ADDRESS_MAP_END
71	64
72	65
73	66
74		static ADDRESS_MAP_START( sound_readmem, ADDRESS_SPACE_PROGRAM, 8 )
75		AM_RANGE(0x0000, 0x3fff) AM_READ(SMH_ROM)
76		AM_RANGE(0x4000, 0x47ff) AM_READ(SMH_RAM)
	67	static ADDRESS_MAP_START( sound_map, ADDRESS_SPACE_PROGRAM, 8 )
	68	AM_RANGE(0x0000, 0x3fff) AM_ROM
	69	AM_RANGE(0x4000, 0x47ff) AM_RAM
77	70	AM_RANGE(0x6000, 0x6000) AM_READ(soundlatch_r)
78		ADDRESS_MAP_END
79
80		static ADDRESS_MAP_START( sound_writemem, ADDRESS_SPACE_PROGRAM, 8 )
81		AM_RANGE(0x0000, 0x3fff) AM_WRITE(SMH_ROM)
82		AM_RANGE(0x4000, 0x47ff) AM_WRITE(SMH_RAM)
83	71	AM_RANGE(0x8000, 0x8001) AM_DEVWRITE("ay", ay8910_address_data_w)
84	72	AM_RANGE(0x8002, 0x8002) AM_DEVWRITE("sn1", sn76496_w)
85	73	AM_RANGE(0x8003, 0x8003) AM_DEVWRITE("sn2", sn76496_w)
r4679	r4680
224	212
225	213	/* basic machine hardware */
226	214	MDRV_CPU_ADD("maincpu", Z80, 4000000)   /* 4 MHz (?) */
227		MDRV_CPU_PROGRAM_MAP(readmem,writemem)
	215	MDRV_CPU_PROGRAM_MAP(exedexes_map,0)
228	216	MDRV_CPU_VBLANK_INT_HACK(exedexes_interrupt,2)
229	217
230	218	MDRV_CPU_ADD("audiocpu", Z80, 3000000)   /* 3 MHz ??? */
231		MDRV_CPU_PROGRAM_MAP(sound_readmem,sound_writemem)
	219	MDRV_CPU_PROGRAM_MAP(sound_map,0)
232	220	MDRV_CPU_VBLANK_INT_HACK(irq0_line_hold,4)
233	221
234	222	/* video hardware */

src/mame/drivers/jedi.c

r4679	r4680
124	124
125	125	static TIMER_CALLBACK( generate_interrupt )
126	126	{
127		jedi_state *state = machine->driver_data;
	127	jedi_state *state = (jedi_state *)machine->driver_data;
128	128	int scanline = param;
129	129
130	130	/* IRQ is set by /32V */
131		cpu_set_input_line(machine->cpu[0], M6502_IRQ_LINE, (scanline & 32) ? CLEAR_LINE : ASSERT_LINE);
132		cpu_set_input_line(machine->cpu[1], M6502_IRQ_LINE, (scanline & 32) ? CLEAR_LINE : ASSERT_LINE);
	131	cputag_set_input_line(machine, "maincpu", M6502_IRQ_LINE, (scanline & 32) ? CLEAR_LINE : ASSERT_LINE);
	132	cputag_set_input_line(machine, "audiocpu", M6502_IRQ_LINE, (scanline & 32) ? CLEAR_LINE : ASSERT_LINE);
133	133
134	134	/* set up for the next */
135	135	scanline += 32;
r4679	r4680
141	141
142	142	static WRITE8_HANDLER( main_irq_ack_w )
143	143	{
144		cpu_set_input_line(space->machine->cpu[0], M6502_IRQ_LINE, CLEAR_LINE);
	144	cputag_set_input_line(space->machine, "maincpu", M6502_IRQ_LINE, CLEAR_LINE);
145	145	}
146	146
147	147
r4679	r4680
154	154
155	155	static MACHINE_START( jedi )
156	156	{
157		jedi_state *state = machine->driver_data;
	157	jedi_state *state = (jedi_state *)machine->driver_data;
158	158
159	159	/* set a timer to run the interrupts */
160	160	state->interrupt_timer = timer_alloc(machine, generate_interrupt, NULL);
r4679	r4680
177	177
178	178	static MACHINE_RESET( jedi )
179	179	{
180		jedi_state *state = machine->driver_data;
	180	jedi_state *state = (jedi_state *)machine->driver_data;
181	181
182	182	/* init globals */
183	183	state->a2d_select = 0;
r4679	r4680
209	209
210	210	static READ8_HANDLER( a2d_data_r )
211	211	{
212		jedi_state *state = space->machine->driver_data;
	212	jedi_state *state = (jedi_state *)space->machine->driver_data;
213	213	UINT8 ret = 0;
214	214
215	215	switch (state->a2d_select)
r4679	r4680
224	224
225	225	static WRITE8_HANDLER( a2d_select_w )
226	226	{
227		jedi_state *state = space->machine->driver_data;
	227	jedi_state *state = (jedi_state *)space->machine->driver_data;
228	228
229	229	state->a2d_select = offset;
230	230	}
r4679	r4680
245	245
246	246	static WRITE8_HANDLER( nvram_data_w )
247	247	{
248		jedi_state *state = space->machine->driver_data;
	248	jedi_state *state = (jedi_state *)space->machine->driver_data;
249	249
250	250	if (state->nvram_enabled)
251	251	generic_nvram[offset] = data;
r4679	r4680
254	254
255	255	static WRITE8_HANDLER( nvram_enable_w )
256	256	{
257		jedi_state *state = space->machine->driver_data;
	257	jedi_state *state = (jedi_state *)space->machine->driver_data;
258	258
259	259	state->nvram_enabled = ~offset & 1;
260	260	}

src/mame/drivers/bfm_sc2.c

r4679	r4680
266	266	adder2_sc2data       = data;
267	267
268	268	adder2_acia_triggered = 1;
269		cpu_set_input_line(machine->cpu[1], M6809_IRQ_LINE, HOLD_LINE );
	269	cputag_set_input_line(machine, "adder2", M6809_IRQ_LINE, HOLD_LINE );
270	270
271	271	LOG_SERIAL(("sadder  %02X  (%c)\n",data, data ));
272	272	}
r4679	r4680
614	614	}
615	615	}
616	616	}
617		if ( data & 0x1F ) cpu_set_input_line(space->machine->cpu[0], M6809_FIRQ_LINE, ASSERT_LINE );
	617	if ( data & 0x1F ) cputag_set_input_line(space->machine, "maincpu", M6809_FIRQ_LINE, ASSERT_LINE );
618	618	}
619	619
620	620	///////////////////////////////////////////////////////////////////////////
r4679	r4680
1434	1434
1435	1435	rom = memory_region(machine, rom_region);
1436	1436
1437		tmp = malloc_or_die(0x10000);
	1437	tmp = alloc_array_or_die(UINT8, 0x10000);
1438	1438	{
1439	1439	int i;
1440	1440	long address;
r4679	r4680
1556	1556	AM_RANGE(0x3FFF, 0x3FFF) AM_READ(coin_input_r)
1557	1557	AM_RANGE(0x4000, 0x5fff) AM_ROM                     // 8k  fixed ROM
1558	1558	AM_RANGE(0x4000, 0xFFFF) AM_WRITE(unknown_w)         // contains unknown I/O registers
1559		AM_RANGE(0x6000, 0x7FFF) AM_READ(SMH_BANK1)         // 8k  paged ROM (4 pages)
	1559	AM_RANGE(0x6000, 0x7FFF) AM_READ(SMH_BANK(1))         // 8k  paged ROM (4 pages)
1560	1560	AM_RANGE(0x8000, 0xFFFF) AM_ROM                     // 32k ROM
1561	1561
1562	1562	ADDRESS_MAP_END
r4679	r4680
2790	2790
2791	2791	AM_RANGE(0x3FFF, 0x3FFF) AM_READ( coin_input_r)
2792	2792	AM_RANGE(0x4000, 0x5FFF) AM_ROM                           /* 8k  fixed ROM */
2793		AM_RANGE(0x6000, 0x7FFF) AM_READ(SMH_BANK1)                  /* 8k  paged ROM (4 pages) */
	2793	AM_RANGE(0x6000, 0x7FFF) AM_READ(SMH_BANK(1))                  /* 8k  paged ROM (4 pages) */
2794	2794	AM_RANGE(0x8000, 0xFFFF) AM_ROM                           /* 32k ROM */
2795	2795	ADDRESS_MAP_END
2796	2796
r4679	r4680
2839	2839	AM_RANGE(0x3FFF, 0x3FFF) AM_READ( coin_input_r)
2840	2840	AM_RANGE(0x4000, 0x5FFF) AM_ROM
2841	2841	//  AM_RANGE(0x4000, 0xFFFF) AM_WRITE(unknown_w)
2842		AM_RANGE(0x6000, 0x7FFF) AM_READ(SMH_BANK1)
	2842	AM_RANGE(0x6000, 0x7FFF) AM_READ(SMH_BANK(1))
2843	2843	AM_RANGE(0x8000, 0xFFFF) AM_ROM
2844	2844	ADDRESS_MAP_END
2845	2845
r4679	r4680
2889	2889	AM_RANGE(0x3FFF, 0x3FFF) AM_READ( coin_input_r)
2890	2890	AM_RANGE(0x4000, 0x5FFF) AM_ROM
2891	2891	//  AM_RANGE(0x4000, 0xFFFF) AM_WRITE(unknown_w)
2892		AM_RANGE(0x6000, 0x7FFF) AM_READ(SMH_BANK1)
	2892	AM_RANGE(0x6000, 0x7FFF) AM_READ(SMH_BANK(1))
2893	2893	AM_RANGE(0x8000, 0xFFFF) AM_ROM
2894	2894	ADDRESS_MAP_END
2895	2895

src/mame/drivers/suprnova.c

r4679	r4680
451	451
452	452	static TIMER_CALLBACK( interrupt_callback )
453	453	{
454		cpu_set_input_line(machine->cpu[0],param,HOLD_LINE);
	454	cputag_set_input_line(machine, "maincpu", param, HOLD_LINE);
455	455	}
456	456
457	457	static MACHINE_RESET(skns)
458	458	{
459	459	timer_pulse(machine, ATTOTIME_IN_MSEC(2), NULL, 15, interrupt_callback);
460	460	timer_pulse(machine, ATTOTIME_IN_MSEC(8), NULL, 11, interrupt_callback);
461		timer_pulse(machine, cpu_clocks_to_attotime(machine->cpu[0], 1824), NULL, 9, interrupt_callback);
	461	timer_pulse(machine, cputag_clocks_to_attotime(machine, "maincpu", 1824), NULL, 9, interrupt_callback);
462	462
463	463	memory_set_bankptr(machine, 1,memory_region(machine, "user1"));
464	464	}
r4679	r4680
490	490
491	491	static CUSTOM_INPUT( paddle_r )
492	492	{
493		const char *tag = param;
	493	const char *tag = (const char *)param;
494	494	return input_port_read(field->port->machine, tag);
495	495	}
496	496
r4679	r4680
670	670	if(ACCESSING_BITS_8_15)
671	671	{ /* Interrupt Clear, do we need these? */
672	672	/*          if(data&0x01)
673		cpu_set_input_line(space->machine->cpu[0],1,CLEAR_LINE);
	673	cputag_set_input_line(space->machine, "maincpu",1,CLEAR_LINE);
674	674	if(data&0x02)
675		cpu_set_input_line(space->machine->cpu[0],3,CLEAR_LINE);
	675	cputag_set_input_line(space->machine, "maincpu",3,CLEAR_LINE);
676	676	if(data&0x04)
677		cpu_set_input_line(space->machine->cpu[0],5,CLEAR_LINE);
	677	cputag_set_input_line(space->machine, "maincpu",5,CLEAR_LINE);
678	678	if(data&0x08)
679		cpu_set_input_line(space->machine->cpu[0],7,CLEAR_LINE);
	679	cputag_set_input_line(space->machine, "maincpu",7,CLEAR_LINE);
680	680	if(data&0x10)
681		cpu_set_input_line(space->machine->cpu[0],9,CLEAR_LINE);
	681	cputag_set_input_line(space->machine, "maincpu",9,CLEAR_LINE);
682	682	if(data&0x20)
683		cpu_set_input_line(space->machine->cpu[0],0xb,CLEAR_LINE);
	683	cputag_set_input_line(space->machine, "maincpu",0xb,CLEAR_LINE);
684	684	if(data&0x40)
685		cpu_set_input_line(space->machine->cpu[0],0xd,CLEAR_LINE);
	685	cputag_set_input_line(space->machine, "maincpu",0xd,CLEAR_LINE);
686	686	if(data&0x80)
687		cpu_set_input_line(space->machine->cpu[0],0xf,CLEAR_LINE);*/
	687	cputag_set_input_line(space->machine, "maincpu",0xf,CLEAR_LINE);*/
688	688
689	689	/* idle skip for vblokbrk/sarukani, i can't find a better place to put it :-( but i think it works ok unless its making the game too fast */
690	690	if (cpu_get_pc(space->cpu)==0x04013B42)
r4679	r4680
992	992	static void init_skns(running_machine *machine)
993	993	{
994	994	// init DRC to fastest options
995		sh2drc_set_options(machine->cpu[0], SH2DRC_FASTEST_OPTIONS);
	995	sh2drc_set_options(cputag_get_cpu(machine, "maincpu"), SH2DRC_FASTEST_OPTIONS);
996	996
997		sh2drc_add_pcflush(machine->cpu[0], 0x6f8);
998		memory_install_read32_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x6000028, 0x600002b, 0, 0, bios_skip_r );
	997	sh2drc_add_pcflush(cputag_get_cpu(machine, "maincpu"), 0x6f8);
	998	memory_install_read32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x6000028, 0x600002b, 0, 0, bios_skip_r );
999	999	}
1000	1000
1001	1001	static void set_drc_pcflush(running_machine *machine, UINT32 addr)
1002	1002	{
1003		sh2drc_add_pcflush(machine->cpu[0], addr);
	1003	sh2drc_add_pcflush(cputag_get_cpu(machine, "maincpu"), addr);
1004	1004	}
1005	1005
1006	1006	static DRIVER_INIT( galpani4 ) { skns_sprite_kludge(-5,-1); init_skns(machine);  }
1007	1007	static DRIVER_INIT( galpanis ) { skns_sprite_kludge(-5,-1); init_skns(machine);  }
1008		static DRIVER_INIT( cyvern )   { skns_sprite_kludge(+0,+2); init_skns(machine); memory_install_read32_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x604d3c8, 0x604d3cb, 0, 0, cyvern_speedup_r );  set_drc_pcflush(machine, 0x402ebd2);  }
1009		static DRIVER_INIT( galpans2 ) { skns_sprite_kludge(-1,-1); init_skns(machine); memory_install_read32_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x60fb6bc, 0x60fb6bf, 0, 0, galpans2_speedup_r ); set_drc_pcflush(machine, 0x4049ae2); }
1010		static DRIVER_INIT( gutsn )    { skns_sprite_kludge(+0,+0); init_skns(machine); memory_install_read32_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x600c780, 0x600c783, 0, 0, gutsn_speedup_r ); set_drc_pcflush(machine, 0x402206e); }
1011		static DRIVER_INIT( panicstr ) { skns_sprite_kludge(-1,-1); init_skns(machine); memory_install_read32_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x60f19e4, 0x60f19e7, 0, 0, panicstr_speedup_r ); set_drc_pcflush(machine, 0x404e68a);  }
1012		static DRIVER_INIT( senknow )  { skns_sprite_kludge(+1,+1); init_skns(machine); memory_install_read32_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x60000dc, 0x60000df, 0, 0, senknow_speedup_r ); set_drc_pcflush(machine, 0x4017dce);  }
1013		static DRIVER_INIT( puzzloop ) { skns_sprite_kludge(-9,-1); init_skns(machine); memory_install_read32_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x6081d38, 0x6081d3b, 0, 0, puzzloop_speedup_r ); set_drc_pcflush(machine, 0x401da14); }
1014		static DRIVER_INIT( puzzloopj ) { skns_sprite_kludge(-9,-1); init_skns(machine); memory_install_read32_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x6086714, 0x6086717, 0, 0, puzzloopj_speedup_r ); set_drc_pcflush(machine, 0x401dca0); }
1015		static DRIVER_INIT( puzzloopa ) { skns_sprite_kludge(-9,-1); init_skns(machine); memory_install_read32_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x6085bcc, 0x6085bcf, 0, 0, puzzloopa_speedup_r ); set_drc_pcflush(machine, 0x401d9d4); }
1016		static DRIVER_INIT( puzzloopu ) { skns_sprite_kludge(-9,-1); init_skns(machine); memory_install_read32_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x6085cec, 0x6085cef, 0, 0, puzzloopu_speedup_r ); set_drc_pcflush(machine, 0x401dab0); }
1017		static DRIVER_INIT( jjparads ) { skns_sprite_kludge(+5,+1); init_skns(machine); memory_install_read32_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x6000994, 0x6000997, 0, 0, jjparads_speedup_r ); set_drc_pcflush(machine, 0x4015e84); }
1018		static DRIVER_INIT( jjparad2 ) { skns_sprite_kludge(+5,+1); init_skns(machine); memory_install_read32_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x6000984, 0x6000987, 0, 0, jjparad2_speedup_r ); set_drc_pcflush(machine, 0x401620a); }
1019		static DRIVER_INIT( ryouran )  { skns_sprite_kludge(+5,+1); init_skns(machine); memory_install_read32_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x6000a14, 0x6000a17, 0, 0, ryouran_speedup_r );  set_drc_pcflush(machine, 0x40182ce); }
1020		static DRIVER_INIT( teljan )   { skns_sprite_kludge(+5,+1); init_skns(machine); memory_install_read32_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x6002fb4, 0x6002fb7, 0, 0, teljan_speedup_r ); set_drc_pcflush(machine, 0x401ba32); }
1021		static DRIVER_INIT( sengekis ) { skns_sprite_kludge(-192,-272); init_skns(machine); memory_install_read32_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x60b74bc, 0x60b74bf, 0, 0, sengekis_speedup_r ); set_drc_pcflush(machine, 0x60006ec); }
1022		static DRIVER_INIT( sengekij ) { skns_sprite_kludge(-192,-272); init_skns(machine); memory_install_read32_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x60b7380, 0x60b7383, 0, 0, sengekij_speedup_r ); set_drc_pcflush(machine, 0x60006ec); }
	1008	static DRIVER_INIT( cyvern )   { skns_sprite_kludge(+0,+2); init_skns(machine); memory_install_read32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x604d3c8, 0x604d3cb, 0, 0, cyvern_speedup_r );  set_drc_pcflush(machine, 0x402ebd2);  }
	1009	static DRIVER_INIT( galpans2 ) { skns_sprite_kludge(-1,-1); init_skns(machine); memory_install_read32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x60fb6bc, 0x60fb6bf, 0, 0, galpans2_speedup_r ); set_drc_pcflush(machine, 0x4049ae2); }
	1010	static DRIVER_INIT( gutsn )    { skns_sprite_kludge(+0,+0); init_skns(machine); memory_install_read32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x600c780, 0x600c783, 0, 0, gutsn_speedup_r ); set_drc_pcflush(machine, 0x402206e); }
	1011	static DRIVER_INIT( panicstr ) { skns_sprite_kludge(-1,-1); init_skns(machine); memory_install_read32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x60f19e4, 0x60f19e7, 0, 0, panicstr_speedup_r ); set_drc_pcflush(machine, 0x404e68a);  }
	1012	static DRIVER_INIT( senknow )  { skns_sprite_kludge(+1,+1); init_skns(machine); memory_install_read32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x60000dc, 0x60000df, 0, 0, senknow_speedup_r ); set_drc_pcflush(machine, 0x4017dce);  }
	1013	static DRIVER_INIT( puzzloop ) { skns_sprite_kludge(-9,-1); init_skns(machine); memory_install_read32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x6081d38, 0x6081d3b, 0, 0, puzzloop_speedup_r ); set_drc_pcflush(machine, 0x401da14); }
	1014	static DRIVER_INIT( puzzloopj ) { skns_sprite_kludge(-9,-1); init_skns(machine); memory_install_read32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x6086714, 0x6086717, 0, 0, puzzloopj_speedup_r ); set_drc_pcflush(machine, 0x401dca0); }
	1015	static DRIVER_INIT( puzzloopa ) { skns_sprite_kludge(-9,-1); init_skns(machine); memory_install_read32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x6085bcc, 0x6085bcf, 0, 0, puzzloopa_speedup_r ); set_drc_pcflush(machine, 0x401d9d4); }
	1016	static DRIVER_INIT( puzzloopu ) { skns_sprite_kludge(-9,-1); init_skns(machine); memory_install_read32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x6085cec, 0x6085cef, 0, 0, puzzloopu_speedup_r ); set_drc_pcflush(machine, 0x401dab0); }
	1017	static DRIVER_INIT( jjparads ) { skns_sprite_kludge(+5,+1); init_skns(machine); memory_install_read32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x6000994, 0x6000997, 0, 0, jjparads_speedup_r ); set_drc_pcflush(machine, 0x4015e84); }
	1018	static DRIVER_INIT( jjparad2 ) { skns_sprite_kludge(+5,+1); init_skns(machine); memory_install_read32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x6000984, 0x6000987, 0, 0, jjparad2_speedup_r ); set_drc_pcflush(machine, 0x401620a); }
	1019	static DRIVER_INIT( ryouran )  { skns_sprite_kludge(+5,+1); init_skns(machine); memory_install_read32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x6000a14, 0x6000a17, 0, 0, ryouran_speedup_r );  set_drc_pcflush(machine, 0x40182ce); }
	1020	static DRIVER_INIT( teljan )   { skns_sprite_kludge(+5,+1); init_skns(machine); memory_install_read32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x6002fb4, 0x6002fb7, 0, 0, teljan_speedup_r ); set_drc_pcflush(machine, 0x401ba32); }
	1021	static DRIVER_INIT( sengekis ) { skns_sprite_kludge(-192,-272); init_skns(machine); memory_install_read32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x60b74bc, 0x60b74bf, 0, 0, sengekis_speedup_r ); set_drc_pcflush(machine, 0x60006ec); }
	1022	static DRIVER_INIT( sengekij ) { skns_sprite_kludge(-192,-272); init_skns(machine); memory_install_read32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x60b7380, 0x60b7383, 0, 0, sengekij_speedup_r ); set_drc_pcflush(machine, 0x60006ec); }
1023	1023	static DRIVER_INIT( sarukani ) { skns_sprite_kludge(-1,-1); init_skns(machine); set_drc_pcflush(machine, 0x4013b42); } // Speedup is in skns_io_w()
1024	1024	static DRIVER_INIT( galpans3 ) { skns_sprite_kludge(-1,-1); init_skns(machine);  }
1025	1025

src/mame/drivers/seta2.c

r4679	r4680
556	556	//  popmessage("%04X", data & 0xffff);
557	557	}
558	558
559		static ADDRESS_MAP_START( grdians_readmem, ADDRESS_SPACE_PROGRAM, 16 )
560		AM_RANGE(0x000000, 0x1fffff) AM_READ(SMH_ROM            )   // ROM
561		AM_RANGE(0x200000, 0x20ffff) AM_READ(SMH_RAM            )   // RAM
562		AM_RANGE(0x304000, 0x30ffff) AM_READ(SMH_RAM            )   // ? seems tile data
	559	static ADDRESS_MAP_START( grdians_map, ADDRESS_SPACE_PROGRAM, 16 )
	560	AM_RANGE(0x000000, 0x1fffff) AM_ROM                        // ROM
	561	AM_RANGE(0x200000, 0x20ffff) AM_RAM                        // RAM
	562	AM_RANGE(0x304000, 0x30ffff) AM_RAM                        // ? seems tile data
563	563	AM_RANGE(0x600000, 0x600001) AM_READ_PORT("DSW1")            // DSW 1
564	564	AM_RANGE(0x600002, 0x600003) AM_READ_PORT("DSW2")            // DSW 2
565	565	AM_RANGE(0x700000, 0x700001) AM_READ_PORT("P1")               // P1
566	566	AM_RANGE(0x700002, 0x700003) AM_READ_PORT("P2")               // P2
567	567	AM_RANGE(0x700004, 0x700005) AM_READ_PORT("SYSTEM")            // Coins
568		AM_RANGE(0x70000c, 0x70000d) AM_READ(watchdog_reset16_r      )   // Watchdog
569		AM_RANGE(0xb00000, 0xb03fff) AM_DEVREAD("x1", seta_sound_word_r       )   // Sound
570		AM_RANGE(0xc00000, 0xc3ffff) AM_READ(SMH_RAM            )   // Sprites
571		AM_RANGE(0xc40000, 0xc4ffff) AM_READ(SMH_RAM            )   // Palette
572		AM_RANGE(0xfffc00, 0xffffff) AM_READ(SMH_RAM            )   // TMP68301 Registers
	568	AM_RANGE(0x70000c, 0x70000d) AM_READ(watchdog_reset16_r)      // Watchdog
	569	AM_RANGE(0x800000, 0x800001) AM_WRITE(grdians_lockout_w)
	570	AM_RANGE(0xb00000, 0xb03fff) AM_DEVREADWRITE("x1", seta_sound_word_r,seta_sound_word_w)   // Sound
	571	AM_RANGE(0xc00000, 0xc3ffff) AM_RAM AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)      // Sprites
	572	AM_RANGE(0xc40000, 0xc4ffff) AM_RAM_WRITE(paletteram16_xRRRRRGGGGGBBBBB_word_w) AM_BASE(&paletteram16)   // Palette
	573	AM_RANGE(0xc50000, 0xc5ffff) AM_RAM                        // cleared
	574	AM_RANGE(0xc60000, 0xc6003f) AM_WRITE(seta2_vregs_w) AM_BASE(&seta2_vregs)   // Video Registers
	575	AM_RANGE(0xe00010, 0xe0001f) AM_WRITE(seta2_sound_bank_w)      // Samples Banks
	576	AM_RANGE(0xfffc00, 0xffffff) AM_RAM_WRITE(tmp68301_regs_w) AM_BASE(&tmp68301_regs)   // TMP68301 Registers
573	577	ADDRESS_MAP_END
574	578
575		static ADDRESS_MAP_START( grdians_writemem, ADDRESS_SPACE_PROGRAM, 16 )
576		AM_RANGE(0x000000, 0x1fffff) AM_WRITE(SMH_ROM                     )   // ROM
577		AM_RANGE(0x200000, 0x20ffff) AM_WRITE(SMH_RAM                     )   // RAM
578		AM_RANGE(0x304000, 0x30ffff) AM_WRITE(SMH_RAM                     )   // ? seems tile data
579		AM_RANGE(0x800000, 0x800001) AM_WRITE(grdians_lockout_w               )
580		AM_RANGE(0xb00000, 0xb03fff) AM_DEVWRITE("x1", seta_sound_word_w             )   // Sound
581		AM_RANGE(0xc00000, 0xc3ffff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16) AM_SIZE(&spriteram_size   )   // Sprites
582		AM_RANGE(0xc40000, 0xc4ffff) AM_WRITE(paletteram16_xRRRRRGGGGGBBBBB_word_w) AM_BASE(&paletteram16   )   // Palette
583		AM_RANGE(0xc50000, 0xc5ffff) AM_WRITE(SMH_RAM                     )   // cleared
584		AM_RANGE(0xc60000, 0xc6003f) AM_WRITE(seta2_vregs_w) AM_BASE(&seta2_vregs      )   // Video Registers
585		AM_RANGE(0xe00010, 0xe0001f) AM_WRITE(seta2_sound_bank_w            )   // Samples Banks
586		AM_RANGE(0xfffc00, 0xffffff) AM_WRITE(tmp68301_regs_w) AM_BASE(&tmp68301_regs   )   // TMP68301 Registers
587		ADDRESS_MAP_END
588
589	579	/***************************************************************************
590	580	Mobile Suit Gundam EX Revue
591	581	***************************************************************************/
r4679	r4680
608	598	UINT32 length, size;
609	599	UINT16 *dat;
610	600
611		dat = eeprom_get_data_pointer(&length, &size);
	601	dat = (UINT16 *)eeprom_get_data_pointer(&length, &size);
612	602	dat[0] = 0x7008;
613	603	}
614	604	}
r4679	r4680
626	616	eeprom_set_cs_line((data & 0x4) ? CLEAR_LINE : ASSERT_LINE);
627	617	}
628	618
629		static ADDRESS_MAP_START( gundamex_readmem, ADDRESS_SPACE_PROGRAM, 16 )
630		AM_RANGE(0x000000, 0x1fffff) AM_READ(SMH_ROM            )   // ROM
631		AM_RANGE(0x200000, 0x20ffff) AM_READ(SMH_RAM            )   // RAM
632		AM_RANGE(0x500000, 0x57ffff) AM_READ(SMH_ROM            )   // ROM
	619	static ADDRESS_MAP_START( gundamex_map, ADDRESS_SPACE_PROGRAM, 16 )
	620	AM_RANGE(0x000000, 0x1fffff) AM_ROM                        // ROM
	621	AM_RANGE(0x200000, 0x20ffff) AM_RAM                        // RAM
	622	AM_RANGE(0x500000, 0x57ffff) AM_ROM                        // ROM
633	623	AM_RANGE(0x600000, 0x600001) AM_READ_PORT("DSW1")            // DSW 1
634	624	AM_RANGE(0x600002, 0x600003) AM_READ_PORT("DSW2")            // DSW 2
635	625	AM_RANGE(0x700000, 0x700001) AM_READ_PORT("P1")               // P1
r4679	r4680
637	627	AM_RANGE(0x700004, 0x700005) AM_READ_PORT("SYSTEM")            // Coins
638	628	AM_RANGE(0x700008, 0x700009) AM_READ_PORT("IN0")            // P1
639	629	AM_RANGE(0x70000a, 0x70000b) AM_READ_PORT("IN1")            // P2
640		AM_RANGE(0xb00000, 0xb03fff) AM_DEVREAD("x1", seta_sound_word_r       )   // Sound
641		AM_RANGE(0xfffd0a, 0xfffd0b) AM_READ(gundamex_eeprom_r      )   // parallel data register
	630	AM_RANGE(0x70000c, 0x70000d) AM_WRITE(watchdog_reset16_w)
	631	AM_RANGE(0x800000, 0x800001) AM_WRITE(grdians_lockout_w)
	632	AM_RANGE(0xb00000, 0xb03fff) AM_DEVREADWRITE("x1", seta_sound_word_r,seta_sound_word_w)   // Sound
	633	AM_RANGE(0xc00000, 0xc3ffff) AM_RAM AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)   // Sprites
	634	AM_RANGE(0xc40000, 0xc4ffff) AM_RAM_WRITE(paletteram16_xRRRRRGGGGGBBBBB_word_w) AM_BASE(&paletteram16   )   // Palette
	635	AM_RANGE(0xc50000, 0xc5ffff) AM_RAM                        // cleared
	636	AM_RANGE(0xc60000, 0xc6003f) AM_WRITE(seta2_vregs_w) AM_BASE(&seta2_vregs)   // Video Registers
	637	AM_RANGE(0xe00010, 0xe0001f) AM_WRITE(seta2_sound_bank_w)      // Samples Banks
	638	AM_RANGE(0xfffd0a, 0xfffd0b) AM_READWRITE(gundamex_eeprom_r,gundamex_eeprom_w)   // parallel data register
	639	AM_RANGE(0xfffc00, 0xffffff) AM_RAM_WRITE(tmp68301_regs_w) AM_BASE(&tmp68301_regs)   // TMP68301 Registers
642	640	ADDRESS_MAP_END
643	641
644		static ADDRESS_MAP_START( gundamex_writemem, ADDRESS_SPACE_PROGRAM, 16 )
645		AM_RANGE(0x000000, 0x1fffff) AM_WRITE(SMH_ROM                     )   // ROM
646		AM_RANGE(0x200000, 0x20ffff) AM_WRITE(SMH_RAM                     )   // RAM
647		AM_RANGE(0x500000, 0x57ffff) AM_WRITE(SMH_ROM                     )   // ROM
648		AM_RANGE(0x70000c, 0x70000d) AM_WRITE(watchdog_reset16_w            )
649		AM_RANGE(0x800000, 0x800001) AM_WRITE(grdians_lockout_w               )
650		AM_RANGE(0xb00000, 0xb03fff) AM_DEVWRITE("x1", seta_sound_word_w             )   // Sound
651		AM_RANGE(0xc00000, 0xc3ffff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16) AM_SIZE(&spriteram_size   )   // Sprites
652		AM_RANGE(0xc40000, 0xc4ffff) AM_WRITE(paletteram16_xRRRRRGGGGGBBBBB_word_w) AM_BASE(&paletteram16   )   // Palette
653		AM_RANGE(0xc50000, 0xc5ffff) AM_WRITE(SMH_RAM                     )   // cleared
654		AM_RANGE(0xc60000, 0xc6003f) AM_WRITE(seta2_vregs_w) AM_BASE(&seta2_vregs      )   // Video Registers
655		AM_RANGE(0xe00010, 0xe0001f) AM_WRITE(seta2_sound_bank_w            )   // Samples Banks
656		AM_RANGE(0xfffd0a, 0xfffd0b) AM_WRITE(gundamex_eeprom_w             )   // parallel data register
657		AM_RANGE(0xfffc00, 0xffffff) AM_WRITE(tmp68301_regs_w) AM_BASE(&tmp68301_regs   )   // TMP68301 Registers
658		ADDRESS_MAP_END
659	642
660	643	/***************************************************************************
661	644	Wakakusamonogatari Mahjong Yonshimai
r4679	r4680
667	650	{
668	651	switch (keyboard_row)
669	652	{
670		case 0x01: return input_port_read(space->machine, "KEY0");
671		case 0x02: return input_port_read(space->machine, "KEY1");
672		case 0x04: return input_port_read(space->machine, "KEY2");
673		case 0x08: return input_port_read(space->machine, "KEY3");
674		case 0x10: return input_port_read(space->machine, "KEY4");
	653	case 0x01: return input_port_read(space->machine, "P1_KEY0");
	654	case 0x02: return input_port_read(space->machine, "P1_KEY1");
	655	case 0x04: return input_port_read(space->machine, "P1_KEY2");
	656	case 0x08: return input_port_read(space->machine, "P1_KEY3");
	657	case 0x10: return input_port_read(space->machine, "P1_KEY4");
675	658	default:   logerror("p1_r with keyboard_row = %02x\n",keyboard_row); return 0xffff;
676	659	}
677	660	}
678	661
	662	static READ16_HANDLER( mj4simai_p2_r )
	663	{
	664	switch (keyboard_row)
	665	{
	666	case 0x01: return input_port_read(space->machine, "P2_KEY0");
	667	case 0x02: return input_port_read(space->machine, "P2_KEY1");
	668	case 0x04: return input_port_read(space->machine, "P2_KEY2");
	669	case 0x08: return input_port_read(space->machine, "P2_KEY3");
	670	case 0x10: return input_port_read(space->machine, "P2_KEY4");
	671	default:   logerror("p2_r with keyboard_row = %02x\n",keyboard_row); return 0xffff;
	672	}
	673	}
	674
679	675	static WRITE16_HANDLER( mj4simai_keyboard_w )
680	676	{
681	677	if (ACCESSING_BITS_0_7)
682	678	keyboard_row = data & 0xff;
683	679	}
684	680
685		static ADDRESS_MAP_START( mj4simai_readmem, ADDRESS_SPACE_PROGRAM, 16 )
686		AM_RANGE(0x000000, 0x1fffff) AM_READ(SMH_ROM            )   // ROM
687		AM_RANGE(0x200000, 0x20ffff) AM_READ(SMH_RAM            )   // RAM
688		AM_RANGE(0x600000, 0x600001) AM_READ(mj4simai_p1_r         )   // P1
689		AM_RANGE(0x600002, 0x600003) AM_READ(mj4simai_p1_r         )   // P2, but I'm using P1 again
690		AM_RANGE(0x600006, 0x600007) AM_READ(watchdog_reset16_r      )   // Watchdog
	681	static ADDRESS_MAP_START( mj4simai_map, ADDRESS_SPACE_PROGRAM, 16 )
	682	AM_RANGE(0x000000, 0x1fffff) AM_ROM                        // ROM
	683	AM_RANGE(0x200000, 0x20ffff) AM_RAM                        // RAM
	684	AM_RANGE(0x600000, 0x600001) AM_READ(mj4simai_p1_r)            // P1
	685	AM_RANGE(0x600002, 0x600003) AM_READ(mj4simai_p2_r)            // P2
	686	AM_RANGE(0x600004, 0x600005) AM_WRITE(mj4simai_keyboard_w)      // select keyboard row to read
	687	AM_RANGE(0x600006, 0x600007) AM_READ(watchdog_reset16_r)      // Watchdog
691	688	AM_RANGE(0x600100, 0x600101) AM_READ_PORT("SYSTEM")            //
	689	AM_RANGE(0x600200, 0x600201) AM_WRITENOP                  // Leds? Coins?
692	690	AM_RANGE(0x600300, 0x600301) AM_READ_PORT("DSW1")            // DSW 1
693	691	AM_RANGE(0x600302, 0x600303) AM_READ_PORT("DSW2")            // DSW 2
694		AM_RANGE(0xb00000, 0xb03fff) AM_DEVREAD("x1", seta_sound_word_r       )   // Sound
695		AM_RANGE(0xc00000, 0xc3ffff) AM_READ(SMH_RAM            )   // Sprites
696		AM_RANGE(0xc40000, 0xc4ffff) AM_READ(SMH_RAM            )   // Palette
697		AM_RANGE(0xfffc00, 0xffffff) AM_READ(SMH_RAM            )   // TMP68301 Registers
	692	AM_RANGE(0x600300, 0x60030f) AM_WRITE(seta2_sound_bank_w)      // Samples Banks
	693	AM_RANGE(0xb00000, 0xb03fff) AM_DEVREADWRITE("x1", seta_sound_word_r,seta_sound_word_w)   // Sound
	694	AM_RANGE(0xc00000, 0xc3ffff) AM_RAM AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)   // Sprites
	695	AM_RANGE(0xc40000, 0xc4ffff) AM_RAM_WRITE(paletteram16_xRRRRRGGGGGBBBBB_word_w) AM_BASE(&paletteram16)   // Palette
	696	AM_RANGE(0xc60000, 0xc6003f) AM_WRITE(seta2_vregs_w) AM_BASE(&seta2_vregs)   // Video Registers
	697	AM_RANGE(0xfffc00, 0xffffff) AM_RAM_WRITE(tmp68301_regs_w) AM_BASE(&tmp68301_regs)   // TMP68301 Registers
698	698	ADDRESS_MAP_END
699	699
700		static ADDRESS_MAP_START( mj4simai_writemem, ADDRESS_SPACE_PROGRAM, 16 )
701		AM_RANGE(0x000000, 0x1fffff) AM_WRITE(SMH_ROM                  )   // ROM
702		AM_RANGE(0x200000, 0x20ffff) AM_WRITE(SMH_RAM                  )   // RAM
703		AM_RANGE(0x600004, 0x600005) AM_WRITE(mj4simai_keyboard_w         )   // select keyboard row to read
704		AM_RANGE(0x600200, 0x600201) AM_WRITE(SMH_NOP                  )   // Leds? Coins?
705		AM_RANGE(0x600300, 0x60030f) AM_WRITE(seta2_sound_bank_w         )   // Samples Banks
706		AM_RANGE(0xb00000, 0xb03fff) AM_DEVWRITE("x1", seta_sound_word_w          )   // Sound
707		AM_RANGE(0xc00000, 0xc3ffff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16) AM_SIZE(&spriteram_size   )   // Sprites
708		AM_RANGE(0xc40000, 0xc4ffff) AM_WRITE(paletteram16_xRRRRRGGGGGBBBBB_word_w) AM_BASE(&paletteram16   )   // Palette
709		AM_RANGE(0xc60000, 0xc6003f) AM_WRITE(seta2_vregs_w) AM_BASE(&seta2_vregs   )   // Video Registers
710		AM_RANGE(0xfffc00, 0xffffff) AM_WRITE(tmp68301_regs_w) AM_BASE(&tmp68301_regs   )   // TMP68301 Registers
711		ADDRESS_MAP_END
712	700
713
714	701	/***************************************************************************
715	702	Kosodate Quiz My Angel
716	703	***************************************************************************/
717	704
718		static ADDRESS_MAP_START( myangel_readmem, ADDRESS_SPACE_PROGRAM, 16 )
719		AM_RANGE(0x000000, 0x1fffff) AM_READ(SMH_ROM            )   // ROM
720		AM_RANGE(0x200000, 0x20ffff) AM_READ(SMH_RAM            )   // RAM
	705	static ADDRESS_MAP_START( myangel_map, ADDRESS_SPACE_PROGRAM, 16 )
	706	AM_RANGE(0x000000, 0x1fffff) AM_ROM                        // ROM
	707	AM_RANGE(0x200000, 0x20ffff) AM_RAM                        // RAM
721	708	AM_RANGE(0x700000, 0x700001) AM_READ_PORT("P1")               // P1
722	709	AM_RANGE(0x700002, 0x700003) AM_READ_PORT("P2")               // P2
723	710	AM_RANGE(0x700004, 0x700005) AM_READ_PORT("SYSTEM")            // Coins
724		AM_RANGE(0x700006, 0x700007) AM_READ(watchdog_reset16_r      )   // Watchdog
	711	AM_RANGE(0x700006, 0x700007) AM_READ(watchdog_reset16_r)      // Watchdog
	712	AM_RANGE(0x700200, 0x700201) AM_WRITENOP                  // Leds? Coins?
725	713	AM_RANGE(0x700300, 0x700301) AM_READ_PORT("DSW1")            // DSW 1
726	714	AM_RANGE(0x700302, 0x700303) AM_READ_PORT("DSW2")            // DSW 2
727		AM_RANGE(0xb00000, 0xb03fff) AM_DEVREAD("x1", seta_sound_word_r       )   // Sound
728		AM_RANGE(0xc00000, 0xc3ffff) AM_READ(SMH_RAM            )   // Sprites
729		AM_RANGE(0xc40000, 0xc4ffff) AM_READ(SMH_RAM            )   // Palette
730		AM_RANGE(0xfffc00, 0xffffff) AM_READ(SMH_RAM            )   // TMP68301 Registers
	715	AM_RANGE(0x700310, 0x70031f) AM_WRITE(seta2_sound_bank_w)      // Samples Banks
	716	AM_RANGE(0xb00000, 0xb03fff) AM_DEVREADWRITE("x1", seta_sound_word_r,seta_sound_word_w)   // Sound
	717	AM_RANGE(0xc00000, 0xc3ffff) AM_RAM AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)      // Sprites
	718	AM_RANGE(0xc40000, 0xc4ffff) AM_RAM_WRITE(paletteram16_xRRRRRGGGGGBBBBB_word_w) AM_BASE(&paletteram16)   // Palette
	719	AM_RANGE(0xc60000, 0xc6003f) AM_WRITE(seta2_vregs_w) AM_BASE(&seta2_vregs)            // Video Registers
	720	AM_RANGE(0xfffc00, 0xffffff) AM_RAM_WRITE(tmp68301_regs_w) AM_BASE(&tmp68301_regs)      // TMP68301 Registers
731	721	ADDRESS_MAP_END
732	722
733		static ADDRESS_MAP_START( myangel_writemem, ADDRESS_SPACE_PROGRAM, 16 )
734		AM_RANGE(0x000000, 0x1fffff) AM_WRITE(SMH_ROM                  )   // ROM
735		AM_RANGE(0x200000, 0x20ffff) AM_WRITE(SMH_RAM                  )   // RAM
736		AM_RANGE(0x700200, 0x700201) AM_WRITE(SMH_NOP                  )   // Leds? Coins?
737		AM_RANGE(0x700310, 0x70031f) AM_WRITE(seta2_sound_bank_w         )   // Samples Banks
738		AM_RANGE(0xb00000, 0xb03fff) AM_DEVWRITE("x1", seta_sound_word_w          )   // Sound
739		AM_RANGE(0xc00000, 0xc3ffff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16) AM_SIZE(&spriteram_size   )   // Sprites
740		AM_RANGE(0xc40000, 0xc4ffff) AM_WRITE(paletteram16_xRRRRRGGGGGBBBBB_word_w) AM_BASE(&paletteram16   )   // Palette
741		AM_RANGE(0xc60000, 0xc6003f) AM_WRITE(seta2_vregs_w) AM_BASE(&seta2_vregs   )   // Video Registers
742		AM_RANGE(0xfffc00, 0xffffff) AM_WRITE(tmp68301_regs_w) AM_BASE(&tmp68301_regs   )   // TMP68301 Registers
743		ADDRESS_MAP_END
744	723
745
746	724	/***************************************************************************
747	725	Kosodate Quiz My Angel 2
748	726	***************************************************************************/
749	727
750		static ADDRESS_MAP_START( myangel2_readmem, ADDRESS_SPACE_PROGRAM, 16 )
751		AM_RANGE(0x000000, 0x1fffff) AM_READ(SMH_ROM            )   // ROM
752		AM_RANGE(0x200000, 0x20ffff) AM_READ(SMH_RAM            )   // RAM
	728	static ADDRESS_MAP_START( myangel2_map, ADDRESS_SPACE_PROGRAM, 16 )
	729	AM_RANGE(0x000000, 0x1fffff) AM_ROM                        // ROM
	730	AM_RANGE(0x200000, 0x20ffff) AM_RAM                        // RAM
753	731	AM_RANGE(0x600000, 0x600001) AM_READ_PORT("P1")               // P1
754	732	AM_RANGE(0x600002, 0x600003) AM_READ_PORT("P2")               // P2
755	733	AM_RANGE(0x600004, 0x600005) AM_READ_PORT("SYSTEM")            // Coins
756		AM_RANGE(0x600006, 0x600007) AM_READ(watchdog_reset16_r      )   // Watchdog
	734	AM_RANGE(0x600006, 0x600007) AM_READ(watchdog_reset16_r)      // Watchdog
	735	AM_RANGE(0x600200, 0x600201) AM_WRITENOP                  // Leds? Coins?
757	736	AM_RANGE(0x600300, 0x600301) AM_READ_PORT("DSW1")            // DSW 1
758	737	AM_RANGE(0x600302, 0x600303) AM_READ_PORT("DSW2")            // DSW 2
759		AM_RANGE(0xb00000, 0xb03fff) AM_DEVREAD("x1", seta_sound_word_r       )   // Sound
760		AM_RANGE(0xd00000, 0xd3ffff) AM_READ(SMH_RAM            )   // Sprites
761		AM_RANGE(0xd40000, 0xd4ffff) AM_READ(SMH_RAM            )   // Palette
762		AM_RANGE(0xfffc00, 0xffffff) AM_READ(SMH_RAM            )   // TMP68301 Registers
	738	AM_RANGE(0x600300, 0x60030f) AM_WRITE(seta2_sound_bank_w)      // Samples Banks
	739	AM_RANGE(0xb00000, 0xb03fff) AM_DEVREADWRITE("x1", seta_sound_word_r,seta_sound_word_w)   // Sound
	740	AM_RANGE(0xd00000, 0xd3ffff) AM_RAM AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)      // Sprites
	741	AM_RANGE(0xd40000, 0xd4ffff) AM_RAM_WRITE(paletteram16_xRRRRRGGGGGBBBBB_word_w) AM_BASE(&paletteram16)   // Palette
	742	AM_RANGE(0xd60000, 0xd6003f) AM_WRITE(seta2_vregs_w) AM_BASE(&seta2_vregs   )         // Video Registers
	743	AM_RANGE(0xfffc00, 0xffffff) AM_RAM_WRITE(tmp68301_regs_w) AM_BASE(&tmp68301_regs)      // TMP68301 Registers
763	744	ADDRESS_MAP_END
764	745
765		static ADDRESS_MAP_START( myangel2_writemem, ADDRESS_SPACE_PROGRAM, 16 )
766		AM_RANGE(0x000000, 0x1fffff) AM_WRITE(SMH_ROM                  )   // ROM
767		AM_RANGE(0x200000, 0x20ffff) AM_WRITE(SMH_RAM                  )   // RAM
768		AM_RANGE(0x600200, 0x600201) AM_WRITE(SMH_NOP                  )   // Leds? Coins?
769		AM_RANGE(0x600300, 0x60030f) AM_WRITE(seta2_sound_bank_w         )   // Samples Banks
770		AM_RANGE(0xb00000, 0xb03fff) AM_DEVWRITE("x1", seta_sound_word_w          )   // Sound
771		AM_RANGE(0xd00000, 0xd3ffff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16) AM_SIZE(&spriteram_size   )   // Sprites
772		AM_RANGE(0xd40000, 0xd4ffff) AM_WRITE(paletteram16_xRRRRRGGGGGBBBBB_word_w) AM_BASE(&paletteram16   )   // Palette
773		AM_RANGE(0xd60000, 0xd6003f) AM_WRITE(seta2_vregs_w) AM_BASE(&seta2_vregs   )   // Video Registers
774		AM_RANGE(0xfffc00, 0xffffff) AM_WRITE(tmp68301_regs_w) AM_BASE(&tmp68301_regs   )   // TMP68301 Registers
775		ADDRESS_MAP_END
776	746
777
778	747	/***************************************************************************
779	748	Puzzle De Bowling
780	749	***************************************************************************/
r4679	r4680
801	770	}
802	771	}
803	772
804		static ADDRESS_MAP_START( pzlbowl_readmem, ADDRESS_SPACE_PROGRAM, 16 )
805		AM_RANGE(0x000000, 0x0fffff) AM_READ(SMH_ROM               )   // ROM
806		AM_RANGE(0x200000, 0x20ffff) AM_READ(SMH_RAM               )   // RAM
807		AM_RANGE(0x400300, 0x400301) AM_READ_PORT("DSW1")            // DSW 1
808		AM_RANGE(0x400302, 0x400303) AM_READ_PORT("DSW2")            // DSW 2
809		AM_RANGE(0x500000, 0x500001) AM_READ_PORT("P1")            // P1
810		AM_RANGE(0x500002, 0x500003) AM_READ_PORT("P2")            // P2
811		AM_RANGE(0x500004, 0x500005) AM_READ(pzlbowl_coins_r         )   // Coins + Protection?
812		AM_RANGE(0x500006, 0x500007) AM_READ(watchdog_reset16_r      )   // Watchdog
813		AM_RANGE(0x700000, 0x700001) AM_READ(pzlbowl_protection_r      )   // Protection
814		AM_RANGE(0x800000, 0x83ffff) AM_READ(SMH_RAM               )   // Sprites
815		AM_RANGE(0x840000, 0x84ffff) AM_READ(SMH_RAM               )   // Palette
816		AM_RANGE(0x900000, 0x903fff) AM_DEVREAD("x1", seta_sound_word_r       )   // Sound
817		AM_RANGE(0xfffc00, 0xffffff) AM_READ(SMH_RAM               )   // TMP68301 Registers
	773	static ADDRESS_MAP_START( pzlbowl_map, ADDRESS_SPACE_PROGRAM, 16 )
	774	AM_RANGE(0x000000, 0x0fffff) AM_ROM                           // ROM
	775	AM_RANGE(0x200000, 0x20ffff) AM_RAM                           // RAM
	776	AM_RANGE(0x400300, 0x400301) AM_READ_PORT("DSW1")               // DSW 1
	777	AM_RANGE(0x400302, 0x400303) AM_READ_PORT("DSW2")               // DSW 2
	778	AM_RANGE(0x400300, 0x40030f) AM_WRITE(seta2_sound_bank_w)         // Samples Banks
	779	AM_RANGE(0x500000, 0x500001) AM_READ_PORT("P1")                  // P1
	780	AM_RANGE(0x500002, 0x500003) AM_READ_PORT("P2")                  // P2
	781	AM_RANGE(0x500004, 0x500005) AM_READWRITE(pzlbowl_coins_r,pzlbowl_coin_counter_w)   // Coins + Protection?
	782	AM_RANGE(0x500006, 0x500007) AM_READ(watchdog_reset16_r)         // Watchdog
	783	AM_RANGE(0x700000, 0x700001) AM_READ(pzlbowl_protection_r)         // Protection
	784	AM_RANGE(0x800000, 0x83ffff) AM_RAM AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)      // Sprites
	785	AM_RANGE(0x840000, 0x84ffff) AM_RAM_WRITE(paletteram16_xRRRRRGGGGGBBBBB_word_w) AM_BASE(&paletteram16)   // Palette
	786	AM_RANGE(0x860000, 0x86003f) AM_WRITE(seta2_vregs_w) AM_BASE(&seta2_vregs)            // Video Registers
	787	AM_RANGE(0x900000, 0x903fff) AM_DEVREADWRITE("x1", seta_sound_word_r,seta_sound_word_w)   // Sound
	788	AM_RANGE(0xfffc00, 0xffffff) AM_RAM_WRITE(tmp68301_regs_w) AM_BASE(&tmp68301_regs)      // TMP68301 Registers
818	789	ADDRESS_MAP_END
819	790
820		static ADDRESS_MAP_START( pzlbowl_writemem, ADDRESS_SPACE_PROGRAM, 16 )
821		AM_RANGE(0x000000, 0x0fffff) AM_WRITE(SMH_ROM                  )   // ROM
822		AM_RANGE(0x200000, 0x20ffff) AM_WRITE(SMH_RAM                  )   // RAM
823		AM_RANGE(0x400300, 0x40030f) AM_WRITE(seta2_sound_bank_w         )   // Samples Banks
824		AM_RANGE(0x500004, 0x500005) AM_WRITE(pzlbowl_coin_counter_w      )   // Coins Counter
825		AM_RANGE(0x800000, 0x83ffff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16) AM_SIZE(&spriteram_size   )   // Sprites
826		AM_RANGE(0x840000, 0x84ffff) AM_WRITE(paletteram16_xRRRRRGGGGGBBBBB_word_w) AM_BASE(&paletteram16   )   // Palette
827		AM_RANGE(0x860000, 0x86003f) AM_WRITE(seta2_vregs_w) AM_BASE(&seta2_vregs   )   // Video Registers
828		AM_RANGE(0x900000, 0x903fff) AM_DEVWRITE("x1", seta_sound_word_w          )   // Sound
829		AM_RANGE(0xfffc00, 0xffffff) AM_WRITE(tmp68301_regs_w) AM_BASE(&tmp68301_regs   )   // TMP68301 Registers
830		ADDRESS_MAP_END
831	791
832
833	792	/***************************************************************************
834	793	Penguin Bros
835	794	***************************************************************************/
836	795
837		static ADDRESS_MAP_START( penbros_readmem, ADDRESS_SPACE_PROGRAM, 16 )
838		AM_RANGE(0x000000, 0x0fffff) AM_READ(SMH_ROM            )   // ROM
839		AM_RANGE(0x200000, 0x20ffff) AM_READ(SMH_RAM            )   // RAM
840		AM_RANGE(0x210000, 0x23ffff) AM_READ(SMH_RAM            )   // RAM
841		AM_RANGE(0x300000, 0x30ffff) AM_READ(SMH_RAM            )   // RAM
	796	static ADDRESS_MAP_START( penbros_map, ADDRESS_SPACE_PROGRAM, 16 )
	797	AM_RANGE(0x000000, 0x0fffff) AM_ROM                        // ROM
	798	AM_RANGE(0x200000, 0x20ffff) AM_RAM                        // RAM
	799	AM_RANGE(0x210000, 0x23ffff) AM_RAM                        // RAM
	800	AM_RANGE(0x300000, 0x30ffff) AM_RAM                        // RAM
842	801	AM_RANGE(0x500300, 0x500301) AM_READ_PORT("DSW1")            // DSW 1
843	802	AM_RANGE(0x500302, 0x500303) AM_READ_PORT("DSW2")            // DSW 2
	803	AM_RANGE(0x500300, 0x50030f) AM_WRITE(seta2_sound_bank_w)      // Samples Banks
844	804	AM_RANGE(0x600000, 0x600001) AM_READ_PORT("P1")               // P1
845	805	AM_RANGE(0x600002, 0x600003) AM_READ_PORT("P2")               // P2
846	806	AM_RANGE(0x600004, 0x600005) AM_READ_PORT("SYSTEM")            // Coins
847		AM_RANGE(0x600006, 0x600007) AM_READ(watchdog_reset16_r      )   // Watchdog
848		//  AM_RANGE(0x700000, 0x700001) AM_READ(pzlbowl_protection_r   )   // Protection
849		AM_RANGE(0xb00000, 0xb3ffff) AM_READ(SMH_RAM            )   // Sprites
850		AM_RANGE(0xb40000, 0xb4ffff) AM_READ(SMH_RAM            )   // Palette
851		AM_RANGE(0xa00000, 0xa03fff) AM_DEVREAD("x1", seta_sound_word_r       )   // Sound
852		AM_RANGE(0xfffc00, 0xffffff) AM_READ(SMH_RAM            )   // TMP68301 Registers
	807	AM_RANGE(0x600004, 0x600005) AM_WRITE(pzlbowl_coin_counter_w)   // Coins Counter
	808	AM_RANGE(0x600006, 0x600007) AM_READ(watchdog_reset16_r)      // Watchdog
	809	//  AM_RANGE(0x700000, 0x700001) AM_READ(pzlbowl_protection_r)      // Protection
	810	AM_RANGE(0xb00000, 0xb3ffff) AM_RAM AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)      // Sprites
	811	AM_RANGE(0xb40000, 0xb4ffff) AM_RAM_WRITE(paletteram16_xRRRRRGGGGGBBBBB_word_w) AM_BASE(&paletteram16)   // Palette
	812	AM_RANGE(0xa00000, 0xa03fff) AM_DEVREADWRITE("x1", seta_sound_word_r,seta_sound_word_w)   // Sound
	813	AM_RANGE(0xfffc00, 0xffffff) AM_RAM_WRITE(tmp68301_regs_w) AM_BASE(&tmp68301_regs)      // TMP68301 Registers
853	814	ADDRESS_MAP_END
854	815
855		static ADDRESS_MAP_START( penbros_writemem, ADDRESS_SPACE_PROGRAM, 16 )
856		AM_RANGE(0x000000, 0x0fffff) AM_WRITE(SMH_ROM                  )   // ROM
857		AM_RANGE(0x200000, 0x20ffff) AM_WRITE(SMH_RAM                  )   // RAM
858		AM_RANGE(0x300000, 0x30ffff) AM_WRITE(SMH_RAM                  )   // RAM
859		AM_RANGE(0x210000, 0x23ffff) AM_WRITE(SMH_RAM                  )   // RAM
860		AM_RANGE(0x500300, 0x50030f) AM_WRITE(seta2_sound_bank_w         )   // Samples Banks
861		AM_RANGE(0x600004, 0x600005) AM_WRITE(pzlbowl_coin_counter_w      )   // Coins Counter
862		AM_RANGE(0xb00000, 0xb3ffff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16) AM_SIZE(&spriteram_size   )   // Sprites
863		AM_RANGE(0xb40000, 0xb4ffff) AM_WRITE(paletteram16_xRRRRRGGGGGBBBBB_word_w) AM_BASE(&paletteram16   )   // Palette
864		AM_RANGE(0xb60000, 0xb6003f) AM_WRITE(seta2_vregs_w) AM_BASE(&seta2_vregs   )   // Video Registers
865		AM_RANGE(0xa00000, 0xa03fff) AM_DEVWRITE("x1", seta_sound_word_w          )   // Sound
866		AM_RANGE(0xfffc00, 0xffffff) AM_WRITE(tmp68301_regs_w) AM_BASE(&tmp68301_regs   )   // TMP68301 Registers
867		ADDRESS_MAP_END
868	816
869
870	817	/***************************************************************************
871	818	Sammy Outdoor Shooting
872	819	***************************************************************************/
r4679	r4680
909	856	AM_RANGE( 0x900000, 0x903fff ) AM_DEVREADWRITE( "x1", seta_sound_word_r, seta_sound_word_w   )   // Sound
910	857
911	858	AM_RANGE( 0xfffd0a, 0xfffd0b ) AM_READ_PORT("DSW2")            // parallel data register (DSW 2)
912		AM_RANGE( 0xfffc00, 0xffffff ) AM_READWRITE( SMH_RAM, tmp68301_regs_w) AM_BASE(&tmp68301_regs )   // TMP68301 Registers
	859	AM_RANGE( 0xfffc00, 0xffffff ) AM_RAM_WRITE( tmp68301_regs_w) AM_BASE(&tmp68301_regs )   // TMP68301 Registers
913	860	ADDRESS_MAP_END
914	861
915	862
r4679	r4680
1439	1386	PORT_BIT( 0x0080, IP_ACTIVE_LOW, IPT_UNKNOWN )
1440	1387	PORT_BIT( 0xff00, IP_ACTIVE_LOW, IPT_UNKNOWN )
1441	1388
1442		PORT_START("KEY0")   // $600000(0)
	1389	PORT_START("P1_KEY0")   // $600000(0)
1443	1390	PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_MAHJONG_A )
1444	1391	PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_MAHJONG_E )
1445	1392	PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_MAHJONG_I )
r4679	r4680
1448	1395	PORT_BIT( 0x0020, IP_ACTIVE_LOW, IPT_START1  )
1449	1396	PORT_BIT( 0xffc0, IP_ACTIVE_LOW, IPT_UNKNOWN )
1450	1397
1451		PORT_START("KEY1")   // $600000(1)
	1398	PORT_START("P1_KEY1")   // $600000(1)
1452	1399	PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_MAHJONG_B )
1453	1400	PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_MAHJONG_F )
1454	1401	PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_MAHJONG_J )
r4679	r4680
1457	1404	PORT_BIT( 0x0020, IP_ACTIVE_LOW, IPT_MAHJONG_BET )
1458	1405	PORT_BIT( 0xffc0, IP_ACTIVE_LOW, IPT_UNKNOWN)
1459	1406
1460		PORT_START("KEY2")   // $600000(2)
	1407	PORT_START("P1_KEY2")   // $600000(2)
1461	1408	PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_MAHJONG_C )
1462	1409	PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_MAHJONG_G )
1463	1410	PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_MAHJONG_K )
r4679	r4680
1465	1412	PORT_BIT( 0x0010, IP_ACTIVE_LOW, IPT_MAHJONG_RON )
1466	1413	PORT_BIT( 0xffe0, IP_ACTIVE_LOW, IPT_UNKNOWN )
1467	1414
1468		PORT_START("KEY3")   // $600000(3)
	1415	PORT_START("P1_KEY3")   // $600000(3)
1469	1416	PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_MAHJONG_D )
1470	1417	PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_MAHJONG_H )
1471	1418	PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_MAHJONG_L )
1472	1419	PORT_BIT( 0x0008, IP_ACTIVE_LOW, IPT_MAHJONG_PON )
1473	1420	PORT_BIT( 0xfff0, IP_ACTIVE_LOW, IPT_UNKNOWN )
1474	1421
1475		PORT_START("KEY4")   // $600000(4)
	1422	PORT_START("P1_KEY4")   // $600000(4)
1476	1423	PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_MAHJONG_LAST_CHANCE )
1477	1424	PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_MAHJONG_SCORE )
1478	1425	PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_MAHJONG_DOUBLE_UP )
r4679	r4680
1481	1428	PORT_BIT( 0x0020, IP_ACTIVE_LOW, IPT_MAHJONG_SMALL )
1482	1429	PORT_BIT( 0x00c0, IP_ACTIVE_LOW, IPT_UNUSED )
1483	1430	PORT_BIT( 0xff00, IP_ACTIVE_LOW, IPT_UNKNOWN )
	1431
	1432	PORT_START("P2_KEY0")   // $600000(0)
	1433	PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_MAHJONG_A ) PORT_PLAYER(2)
	1434	PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_MAHJONG_E ) PORT_PLAYER(2)
	1435	PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_MAHJONG_I ) PORT_PLAYER(2)
	1436	PORT_BIT( 0x0008, IP_ACTIVE_LOW, IPT_MAHJONG_M ) PORT_PLAYER(2)
	1437	PORT_BIT( 0x0010, IP_ACTIVE_LOW, IPT_MAHJONG_KAN ) PORT_PLAYER(2)
	1438	PORT_BIT( 0x0020, IP_ACTIVE_LOW, IPT_START2  )
	1439	PORT_BIT( 0xffc0, IP_ACTIVE_LOW, IPT_UNKNOWN )
	1440
	1441	PORT_START("P2_KEY1")   // $600000(1)
	1442	PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_MAHJONG_B ) PORT_PLAYER(2)
	1443	PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_MAHJONG_F ) PORT_PLAYER(2)
	1444	PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_MAHJONG_J ) PORT_PLAYER(2)
	1445	PORT_BIT( 0x0008, IP_ACTIVE_LOW, IPT_MAHJONG_N ) PORT_PLAYER(2)
	1446	PORT_BIT( 0x0010, IP_ACTIVE_LOW, IPT_MAHJONG_REACH ) PORT_PLAYER(2)
	1447	PORT_BIT( 0x0020, IP_ACTIVE_LOW, IPT_MAHJONG_BET ) PORT_PLAYER(2)
	1448	PORT_BIT( 0xffc0, IP_ACTIVE_LOW, IPT_UNKNOWN)
	1449
	1450	PORT_START("P2_KEY2")   // $600000(2)
	1451	PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_MAHJONG_C ) PORT_PLAYER(2)
	1452	PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_MAHJONG_G ) PORT_PLAYER(2)
	1453	PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_MAHJONG_K ) PORT_PLAYER(2)
	1454	PORT_BIT( 0x0008, IP_ACTIVE_LOW, IPT_MAHJONG_CHI ) PORT_PLAYER(2)
	1455	PORT_BIT( 0x0010, IP_ACTIVE_LOW, IPT_MAHJONG_RON ) PORT_PLAYER(2)
	1456	PORT_BIT( 0xffe0, IP_ACTIVE_LOW, IPT_UNKNOWN )
	1457
	1458	PORT_START("P2_KEY3")   // $600000(3)
	1459	PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_MAHJONG_D ) PORT_PLAYER(2)
	1460	PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_MAHJONG_H ) PORT_PLAYER(2)
	1461	PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_MAHJONG_L ) PORT_PLAYER(2)
	1462	PORT_BIT( 0x0008, IP_ACTIVE_LOW, IPT_MAHJONG_PON ) PORT_PLAYER(2)
	1463	PORT_BIT( 0xfff0, IP_ACTIVE_LOW, IPT_UNKNOWN )
	1464
	1465	PORT_START("P2_KEY4")   // $600000(4)
	1466	PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_MAHJONG_LAST_CHANCE ) PORT_PLAYER(2)
	1467	PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_MAHJONG_SCORE ) PORT_PLAYER(2)
	1468	PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_MAHJONG_DOUBLE_UP ) PORT_PLAYER(2)
	1469	PORT_BIT( 0x0008, IP_ACTIVE_LOW, IPT_MAHJONG_FLIP_FLOP ) PORT_PLAYER(2)
	1470	PORT_BIT( 0x0010, IP_ACTIVE_LOW, IPT_MAHJONG_BIG ) PORT_PLAYER(2)
	1471	PORT_BIT( 0x0020, IP_ACTIVE_LOW, IPT_MAHJONG_SMALL ) PORT_PLAYER(2)
	1472	PORT_BIT( 0x00c0, IP_ACTIVE_LOW, IPT_UNUSED )
	1473	PORT_BIT( 0xff00, IP_ACTIVE_LOW, IPT_UNKNOWN )
1484	1474	INPUT_PORTS_END
1485	1475
1486	1476
r4679	r4680
2284	2274
2285	2275	/* basic machine hardware */
2286	2276	MDRV_CPU_ADD("maincpu",M68000,50000000/3)         /* !! TMP68301 @ 16.666666MHz !! */
2287		MDRV_CPU_PROGRAM_MAP(mj4simai_readmem,mj4simai_writemem)
	2277	MDRV_CPU_PROGRAM_MAP(mj4simai_map,0)
2288	2278	MDRV_CPU_VBLANK_INT("screen", seta2_interrupt)
2289	2279
2290	2280	MDRV_MACHINE_RESET( tmp68301 )
r4679	r4680
2318	2308	/* basic machine hardware */
2319	2309	MDRV_IMPORT_FROM(mj4simai)
2320	2310	MDRV_CPU_MODIFY("maincpu")
2321		MDRV_CPU_PROGRAM_MAP(gundamex_readmem,gundamex_writemem)
	2311	MDRV_CPU_PROGRAM_MAP(gundamex_map,0)
2322	2312
2323	2313	MDRV_NVRAM_HANDLER(93C46_gundamex)
2324	2314
r4679	r4680
2331	2321
2332	2322	MDRV_IMPORT_FROM(mj4simai)
2333	2323	MDRV_CPU_MODIFY("maincpu")
2334		MDRV_CPU_PROGRAM_MAP(grdians_readmem,grdians_writemem)
	2324	MDRV_CPU_PROGRAM_MAP(grdians_map,0)
2335	2325
2336	2326	/* video hardware */
2337	2327	MDRV_SCREEN_MODIFY("screen")
r4679	r4680
2344	2334	/* basic machine hardware */
2345	2335	MDRV_IMPORT_FROM(mj4simai)
2346	2336	MDRV_CPU_MODIFY("maincpu")
2347		MDRV_CPU_PROGRAM_MAP(myangel_readmem,myangel_writemem)
	2337	MDRV_CPU_PROGRAM_MAP(myangel_map,0)
2348	2338
2349	2339	/* video hardware */
2350	2340	MDRV_SCREEN_MODIFY("screen")
r4679	r4680
2359	2349	/* basic machine hardware */
2360	2350	MDRV_IMPORT_FROM(mj4simai)
2361	2351	MDRV_CPU_MODIFY("maincpu")
2362		MDRV_CPU_PROGRAM_MAP(myangel2_readmem,myangel2_writemem)
	2352	MDRV_CPU_PROGRAM_MAP(myangel2_map,0)
2363	2353
2364	2354	/* video hardware */
2365	2355	MDRV_SCREEN_MODIFY("screen")
r4679	r4680
2374	2364	/* basic machine hardware */
2375	2365	MDRV_IMPORT_FROM(mj4simai)
2376	2366	MDRV_CPU_MODIFY("maincpu")
2377		MDRV_CPU_PROGRAM_MAP(pzlbowl_readmem,pzlbowl_writemem)
	2367	MDRV_CPU_PROGRAM_MAP(pzlbowl_map,0)
2378	2368
2379	2369	/* video hardware */
2380	2370	MDRV_SCREEN_MODIFY("screen")
r4679	r4680
2387	2377	/* basic machine hardware */
2388	2378	MDRV_IMPORT_FROM(mj4simai)
2389	2379	MDRV_CPU_MODIFY("maincpu")
2390		MDRV_CPU_PROGRAM_MAP(penbros_readmem,penbros_writemem)
	2380	MDRV_CPU_PROGRAM_MAP(penbros_map,0)
2391	2381
2392	2382	/* video hardware */
2393	2383	MDRV_SCREEN_MODIFY("screen")

src/mame/drivers/witch.c

r4679	r4680
439	439
440	440	static ADDRESS_MAP_START( map_main, ADDRESS_SPACE_PROGRAM, 8 )
441	441	AM_RANGE(0x0000, UNBANKED_SIZE-1) AM_ROM
442		AM_RANGE(UNBANKED_SIZE, 0x7fff) AM_READ(SMH_BANK1)
	442	AM_RANGE(UNBANKED_SIZE, 0x7fff) AM_READ(SMH_BANK(1))
443	443	AM_RANGE(0x8000, 0x8001) AM_DEVREADWRITE("ym1", ym2203_r, ym2203_w)
444	444	AM_RANGE(0x8008, 0x8009) AM_DEVREADWRITE("ym2", ym2203_r, ym2203_w)
445	445	AM_RANGE(0xa000, 0xa00f) AM_READWRITE(read_a00x, write_a00x)
r4679	r4680
844	844	static DRIVER_INIT(witch)
845	845	{
846	846	UINT8 *ROM = (UINT8 *)memory_region(machine, "maincpu");
847		memory_set_bankptr(machine, 1,&ROM[0x10000+UNBANKED_SIZE]);
	847	memory_set_bankptr(machine, 1, &ROM[0x10000+UNBANKED_SIZE]);
848	848
849		memory_install_read8_handler(cpu_get_address_space(machine->cpu[1], ADDRESS_SPACE_PROGRAM), 0x7000, 0x700f, 0, 0, prot_read_700x);
	849	memory_install_read8_handler(cputag_get_address_space(machine, "sub", ADDRESS_SPACE_PROGRAM), 0x7000, 0x700f, 0, 0, prot_read_700x);
850	850	bank = -1;
851	851	}
852	852

src/mame/drivers/flkatck.c

r4679	r4680
86	86	soundlatch_w(space, 0, data);
87	87	break;
88	88	case 0x06:   /* Cause interrupt on audio CPU */
89		cpu_set_input_line(space->machine->cpu[1],0,HOLD_LINE);
	89	cputag_set_input_line(space->machine, "audiocpu", 0, HOLD_LINE);
90	90	break;
91	91	case 0x07:   /* watchdog reset */
92	92	watchdog_reset_w(space, 0, data);
r4679	r4680
106	106	}
107	107
108	108
109		static ADDRESS_MAP_START( flkatck_readmem, ADDRESS_SPACE_PROGRAM, 8 )
110		AM_RANGE(0x0000, 0x03ff) AM_READ(SMH_RAM)
111		AM_RANGE(0x0400, 0x041f) AM_READ(flkatck_ls138_r)         /* inputs + DIPS */
112		AM_RANGE(0x0800, 0x0bff) AM_READ(SMH_RAM)      /* palette */
113		AM_RANGE(0x1000, 0x1fff) AM_READ(SMH_RAM)               /* RAM */
114		AM_RANGE(0x2000, 0x3fff) AM_READ(SMH_RAM)      /* Video RAM (007121) */
115		AM_RANGE(0x4000, 0x5fff) AM_READ(SMH_BANK1)               /* banked ROM */
116		AM_RANGE(0x6000, 0xffff) AM_READ(SMH_ROM)               /* ROM */
	109	static ADDRESS_MAP_START( flkatck_map, ADDRESS_SPACE_PROGRAM, 8 )
	110	AM_RANGE(0x0000, 0x0007) AM_RAM_WRITE(flkatck_k007121_regs_w)                            /* 007121 registers */
	111	AM_RANGE(0x0008, 0x03ff) AM_RAM                                                   /* RAM */
	112	AM_RANGE(0x0400, 0x041f) AM_READWRITE(flkatck_ls138_r, flkatck_ls138_w)                     /* inputs, DIPS, bankswitch, counters, sound command */
	113	AM_RANGE(0x0800, 0x0bff) AM_RAM_WRITE(paletteram_xBBBBBGGGGGRRRRR_le_w) AM_BASE(&paletteram)   /* palette */
	114	AM_RANGE(0x1000, 0x1fff) AM_RAM                                                   /* RAM */
	115	AM_RANGE(0x2000, 0x3fff) AM_RAM_WRITE(flkatck_k007121_w) AM_BASE(&k007121_ram)               /* Video RAM (007121) */
	116	AM_RANGE(0x4000, 0x5fff) AM_ROMBANK(1)                                             /* banked ROM */
	117	AM_RANGE(0x6000, 0xffff) AM_ROM                                                   /* ROM */
117	118	ADDRESS_MAP_END
118	119
119		static ADDRESS_MAP_START( flkatck_writemem, ADDRESS_SPACE_PROGRAM, 8 )
120		AM_RANGE(0x0000, 0x0007) AM_WRITE(flkatck_k007121_regs_w)    /* 007121 registers */
121		AM_RANGE(0x0000, 0x03ff) AM_WRITE(SMH_RAM)
122		AM_RANGE(0x0400, 0x041f) AM_WRITE(flkatck_ls138_w)         /* bankswitch + counters + sound command */
123		AM_RANGE(0x0800, 0x0bff) AM_WRITE(paletteram_xBBBBBGGGGGRRRRR_le_w) AM_BASE(&paletteram)/* palette */
124		AM_RANGE(0x1000, 0x1fff) AM_WRITE(SMH_RAM)               /* RAM */
125		AM_RANGE(0x2000, 0x3fff) AM_WRITE(flkatck_k007121_w) AM_BASE(&k007121_ram)         /* Video RAM (007121) */
126		AM_RANGE(0x4000, 0x5fff) AM_WRITE(SMH_BANK1)               /* banked ROM */
127		AM_RANGE(0x6000, 0xffff) AM_WRITE(SMH_ROM)               /* ROM */
	120	static ADDRESS_MAP_START( flkatck_sound_map, ADDRESS_SPACE_PROGRAM, 8 )
	121	AM_RANGE(0x0000, 0x7fff) AM_ROM                                    /* ROM */
	122	AM_RANGE(0x8000, 0x87ff) AM_RAM                                    /* RAM */
	123	AM_RANGE(0x9000, 0x9000) AM_READWRITE(multiply_r, multiply_w)            /* ??? */
	124	//  AM_RANGE(0x9001, 0x9001) AM_RAM                                             /* ??? */
	125	AM_RANGE(0x9004, 0x9004) AM_READNOP                                 /* ??? */
	126	AM_RANGE(0x9006, 0x9006) AM_WRITENOP                              /* ??? */
	127	AM_RANGE(0xa000, 0xa000) AM_READ(soundlatch_r)                        /* soundlatch_r */
	128	AM_RANGE(0xb000, 0xb00d) AM_DEVREADWRITE("konami", k007232_r, k007232_w)   /* 007232 registers */
	129	AM_RANGE(0xc000, 0xc001) AM_DEVREADWRITE("ym", ym2151_r, ym2151_w)         /* YM2151 */
128	130	ADDRESS_MAP_END
129	131
130		static ADDRESS_MAP_START( flkatck_readmem_sound, ADDRESS_SPACE_PROGRAM, 8 )
131		AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM)            /* ROM */
132		AM_RANGE(0x8000, 0x87ff) AM_READ(SMH_RAM)            /* RAM */
133		AM_RANGE(0x9000, 0x9000) AM_READ(multiply_r)            /* ??? */
134		//  AM_RANGE(0x9001, 0x9001) AM_READ(SMH_RAM)               /* ??? */
135		AM_RANGE(0x9004, 0x9004) AM_READ(SMH_RAM)            /* ??? */
136		AM_RANGE(0xa000, 0xa000) AM_READ(soundlatch_r)         /* soundlatch_r */
137		AM_RANGE(0xb000, 0xb00d) AM_DEVREAD("konami", k007232_r)   /* 007232 registers */
138		AM_RANGE(0xc000, 0xc001) AM_DEVREAD("ym", ym2151_r) /* YM2151 */
139		ADDRESS_MAP_END
140	132
141		static ADDRESS_MAP_START( flkatck_writemem_sound, ADDRESS_SPACE_PROGRAM, 8 )
142		AM_RANGE(0x0000, 0x7fff) AM_WRITE(SMH_ROM)               /* ROM */
143		AM_RANGE(0x8000, 0x87ff) AM_WRITE(SMH_RAM)               /* RAM */
144		AM_RANGE(0x9000, 0x9001) AM_WRITE(multiply_w)               /* ??? */
145		//  AM_RANGE(0x9001, 0x9001) AM_WRITE(SMH_RAM)                  /* ??? */
146		AM_RANGE(0x9006, 0x9006) AM_WRITE(SMH_RAM)               /* ??? */
147		AM_RANGE(0xb000, 0xb00d) AM_DEVWRITE("konami", k007232_w)    /* 007232 registers */
148		AM_RANGE(0xc000, 0xc001) AM_DEVWRITE("ym", ym2151_w)      /* YM2151 */
149		ADDRESS_MAP_END
150
151
152	133	static INPUT_PORTS_START( flkatck )
153	134	PORT_START("DSW1")
154	135	KONAMI_COINAGE(DEF_STR( Free_Play ), "Invalid")
r4679	r4680
231	212
232	213	/* basic machine hardware */
233	214	MDRV_CPU_ADD("maincpu", HD6309,3000000*4) /* HD63C09EP, 24/8 MHz */
234		MDRV_CPU_PROGRAM_MAP(flkatck_readmem,flkatck_writemem)
	215	MDRV_CPU_PROGRAM_MAP(flkatck_map,0)
235	216	MDRV_CPU_VBLANK_INT("screen", flkatck_interrupt)
236	217
237	218	MDRV_CPU_ADD("audiocpu", Z80,3579545)   /* NEC D780C-1, 3.579545 MHz */
238		MDRV_CPU_PROGRAM_MAP(flkatck_readmem_sound,flkatck_writemem_sound)
	219	MDRV_CPU_PROGRAM_MAP(flkatck_sound_map,0)
239	220
240	221	MDRV_QUANTUM_TIME(HZ(600))
241	222

src/mame/drivers/namcofl.c

r4679	r4680
239	239	}
240	240
241	241	static ADDRESS_MAP_START( namcofl_mem, ADDRESS_SPACE_PROGRAM, 32 )
242		AM_RANGE(0x00000000, 0x000fffff) AM_READWRITE(SMH_BANK1, SMH_BANK1)
243		AM_RANGE(0x10000000, 0x100fffff) AM_READWRITE(SMH_BANK2, SMH_BANK2)
	242	AM_RANGE(0x00000000, 0x000fffff) AM_READWRITE(SMH_BANK(1), SMH_BANK(1))
	243	AM_RANGE(0x10000000, 0x100fffff) AM_READWRITE(SMH_BANK(2), SMH_BANK(2))
244	244	AM_RANGE(0x20000000, 0x201fffff) AM_ROM AM_REGION("user1", 0)   /* data */
245	245	AM_RANGE(0x30000000, 0x30001fff) AM_RAM   AM_BASE(&generic_nvram32) AM_SIZE(&generic_nvram_size) /* nvram */
246	246	AM_RANGE(0x30100000, 0x30100003) AM_WRITE(namcofl_spritebank_w)
r4679	r4680
472	472
473	473	static TIMER_CALLBACK( network_interrupt_callback )
474	474	{
475		cpu_set_input_line(machine->cpu[0], I960_IRQ0, ASSERT_LINE);
	475	cputag_set_input_line(machine, "maincpu", I960_IRQ0, ASSERT_LINE);
476	476	timer_set(machine, video_screen_get_frame_period(machine->primary_screen), NULL, 0, network_interrupt_callback);
477	477	}
478	478
479	479
480	480	static TIMER_CALLBACK( vblank_interrupt_callback )
481	481	{
482		cpu_set_input_line(machine->cpu[0], I960_IRQ2, ASSERT_LINE);
	482	cputag_set_input_line(machine, "maincpu", I960_IRQ2, ASSERT_LINE);
483	483	timer_set(machine, video_screen_get_frame_period(machine->primary_screen), NULL, 0, vblank_interrupt_callback);
484	484	}
485	485
r4679	r4680
487	487	static TIMER_CALLBACK( raster_interrupt_callback )
488	488	{
489	489	video_screen_update_partial(machine->primary_screen, video_screen_get_vpos(machine->primary_screen));
490		cpu_set_input_line(machine->cpu[0], I960_IRQ1, ASSERT_LINE);
	490	cputag_set_input_line(machine, "maincpu", I960_IRQ1, ASSERT_LINE);
491	491	timer_adjust_oneshot(raster_interrupt_timer, video_screen_get_frame_period(machine->primary_screen), 0);
492	492	}
493	493
r4679	r4680
723	723
724	724	static void namcofl_common_init(running_machine *machine)
725	725	{
726		namcofl_workram = auto_malloc(0x100000);
	726	namcofl_workram = auto_alloc_array(machine, UINT32, 0x100000/4);
727	727
728	728	memory_set_bankptr(machine,  1, memory_region(machine, "maincpu") );
729	729	memory_set_bankptr(machine,  2, namcofl_workram );

src/mame/drivers/luckgrln.c

r4679	r4680
79	79
80	80	static ADDRESS_MAP_START( mainmap, ADDRESS_SPACE_PROGRAM, 8 )
81	81	AM_RANGE(0x00000, 0x03fff) AM_ROM
82		AM_RANGE(0x10000, 0x1ffff) AM_READ(SMH_BANK1)
	82	AM_RANGE(0x10000, 0x1ffff) AM_READ(SMH_BANK(1))
83	83	AM_RANGE(0x0d800, 0x0dfff) AM_RAM
84	84	AM_RANGE(0x0f000, 0x0ffff) AM_RAM
85	85	AM_RANGE(0xf0000, 0xfffff) AM_RAM

src/mame/drivers/dynax.c

r4679	r4680
105	105	int irq   =   ((dynax_sound_irq)   ? 0x08 : 0) |
106	106	((dynax_vblank_irq)  ? 0x10 : 0) |
107	107	((dynax_blitter_irq) ? 0x20 : 0) ;
108		cpu_set_input_line_and_vector(machine->cpu[0], 0, irq ? ASSERT_LINE : CLEAR_LINE, 0xc7 | irq); /* rst $xx */
	108	cputag_set_input_line_and_vector(machine, "maincpu", 0, irq ? ASSERT_LINE : CLEAR_LINE, 0xc7 | irq); /* rst $xx */
109	109	}
110	110
111	111	static WRITE8_HANDLER( dynax_vblank_ack_w )
r4679	r4680
145	145	int irq   =   ((dynax_blitter_irq)   ? 0x08 : 0) |
146	146	((dynax_blitter2_irq)   ? 0x10 : 0) |
147	147	((dynax_vblank_irq)      ? 0x20 : 0) ;
148		cpu_set_input_line_and_vector(machine->cpu[0], 0, irq ? ASSERT_LINE : CLEAR_LINE, 0xc7 | irq); /* rst $xx */
	148	cputag_set_input_line_and_vector(machine, "maincpu", 0, irq ? ASSERT_LINE : CLEAR_LINE, 0xc7 | irq); /* rst $xx */
149	149	}
150	150
151	151	static WRITE8_HANDLER( jantouki_vblank_ack_w )
r4679	r4680
185	185	int irq   =   ((dynax_sound_irq)         ? 0x08 : 0) |
186	186	((dynax_soundlatch_irq)      ? 0x10 : 0) |
187	187	((dynax_sound_vblank_irq)   ? 0x20 : 0) ;
188		cpu_set_input_line_and_vector(machine->cpu[1], 0, irq ? ASSERT_LINE : CLEAR_LINE, 0xc7 | irq); /* rst $xx */
	188	cputag_set_input_line_and_vector(machine, "soundcpu", 0, irq ? ASSERT_LINE : CLEAR_LINE, 0xc7 | irq); /* rst $xx */
189	189	}
190	190
191	191	static INTERRUPT_GEN( jantouki_sound_vblank_interrupt )
r4679	r4680
408	408	if (toggle)
409	409	{
410	410	if (resetkludge)   // don't know what's wrong, but NMIs when the 5205 is reset make the game crash
411		cpu_set_input_line(device->machine->cpu[0], INPUT_LINE_NMI, PULSE_LINE);
	411	cputag_set_input_line(device->machine, "maincpu", INPUT_LINE_NMI, PULSE_LINE);
412	412	}
413	413	}
414	414	static void adpcm_int_cpu1(const device_config *device)
r4679	r4680
422	422	if (toggle)
423	423	{
424	424	if (resetkludge)   // don't know what's wrong, but NMIs when the 5205 is reset make the game crash
425		cpu_set_input_line(device->machine->cpu[1], INPUT_LINE_NMI, PULSE_LINE);   // cpu1
	425	cputag_set_input_line(device->machine, "soundcpu", INPUT_LINE_NMI, PULSE_LINE);   // cpu1
426	426	}
427	427	}
428	428
r4679	r4680
463	463	static ADDRESS_MAP_START( hnoridur_mem_map, ADDRESS_SPACE_PROGRAM, 8 )
464	464	AM_RANGE( 0x0000, 0x6fff ) AM_ROM
465	465	AM_RANGE( 0x7000, 0x7fff ) AM_RAM AM_BASE(&generic_nvram) AM_SIZE(&generic_nvram_size)
466		AM_RANGE( 0x8000, 0xffff ) AM_READWRITE(SMH_BANK1, hnoridur_palette_w)
	466	AM_RANGE( 0x8000, 0xffff ) AM_READWRITE(SMH_BANK(1), hnoridur_palette_w)
467	467	ADDRESS_MAP_END
468	468
469	469	static ADDRESS_MAP_START( mcnpshnt_mem_map, ADDRESS_SPACE_PROGRAM, 8 )
470	470	AM_RANGE( 0x0000, 0x5fff ) AM_ROM
471	471	AM_RANGE( 0x6000, 0x6fff ) AM_RAM
472	472	AM_RANGE( 0x7000, 0x7fff ) AM_RAM AM_BASE(&generic_nvram) AM_SIZE(&generic_nvram_size)
473		AM_RANGE( 0x8000, 0xffff ) AM_READWRITE(SMH_BANK1, hnoridur_palette_w)
	473	AM_RANGE( 0x8000, 0xffff ) AM_READWRITE(SMH_BANK(1), hnoridur_palette_w)
474	474	ADDRESS_MAP_END
475	475
476	476	static ADDRESS_MAP_START( nanajign_mem_map, ADDRESS_SPACE_PROGRAM, 8 )
r4679	r4680
3980	3980	void mjelctrn_update_irq(running_machine *machine)
3981	3981	{
3982	3982	dynax_blitter_irq = 1;
3983		cpu_set_input_line_and_vector(machine->cpu[0], 0, HOLD_LINE, 0xfa);
	3983	cputag_set_input_line_and_vector(machine, "maincpu", 0, HOLD_LINE, 0xfa);
3984	3984	}
3985	3985
3986	3986	static INTERRUPT_GEN( mjelctrn_vblank_interrupt )
r4679	r4680
4014	4014	void neruton_update_irq(running_machine *machine)
4015	4015	{
4016	4016	dynax_blitter_irq = 1;
4017		cpu_set_input_line_and_vector(machine->cpu[0], 0, HOLD_LINE, 0x42);
	4017	cputag_set_input_line_and_vector(machine, "maincpu", 0, HOLD_LINE, 0x42);
4018	4018	}
4019	4019
4020	4020	static INTERRUPT_GEN( neruton_vblank_interrupt )
r4679	r4680
4543	4543	}
4544	4544
4545	4545	/* Address lines scrambling on the blitter data roms */
4546		rom = malloc_or_die(0xc0000);
	4546	rom = alloc_array_or_die(UINT8, 0xc0000);
4547	4547	memcpy(rom, gfx, 0xc0000);
4548	4548	for (i = 0; i < 0xc0000; i++)
4549	4549	gfx[i] = rom[BITSWAP24(i,23,22,21,20,19,18,14,15, 16,17,13,12,11,10,9,8, 7,6,5,4,3,2,1,0)];
r4679	r4680
5250	5250	int i;
5251	5251	UINT8   *rom = memory_region(machine, "maincpu");
5252	5252	size_t  size = memory_region_length(machine, "maincpu");
5253		UINT8   *rom1 = malloc_or_die(size);
	5253	UINT8   *rom1 = alloc_array_or_die(UINT8, size);
5254	5254
5255	5255	memcpy(rom1,rom,size);
5256	5256	for (i = 0; i < size; i++)
r4679	r4680
5263	5263	int i,j;
5264	5264	UINT8   *rom = memory_region(machine, "maincpu");
5265	5265	size_t  size = memory_region_length(machine, "maincpu");
5266		UINT8   *rom1 = malloc_or_die(size);
	5266	UINT8   *rom1 = alloc_array_or_die(UINT8, size);
5267	5267
5268	5268	memcpy(rom1,rom,size);
5269	5269	for (i = 0; i < size; i++)
r4679	r4680
5600	5600
5601	5601	static DRIVER_INIT( mjreach )
5602	5602	{
5603		memory_install_write8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x10060, 0x10060, 0, 0, yarunara_flipscreen_w);
	5603	memory_install_write8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x10060, 0x10060, 0, 0, yarunara_flipscreen_w);
5604	5604	}
5605	5605
5606	5606	/***************************************************************************

src/mame/drivers/shootout.c

r4679	r4680
10	10	Perhaps the USA arm of Deco designed this game rather than the Japanese
11	11	arm?
12	12
13		Shoot Out (Japan) uses the YM2203 ports for CPU bankswitching so it does
14		not work with sound turned off.
15
16	13	Shoot Out (Korean bootleg) is based on the earlier DE-0203 board but
17	14	strangely features the same encryption as used on the DE-0219 board.  It
18	15	also has some edited graphics.
r4679	r4680
61	58	static WRITE8_HANDLER( sound_cpu_command_w )
62	59	{
63	60	soundlatch_w( space, offset, data );
64		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_NMI, PULSE_LINE );
	61	cputag_set_input_line(space->machine, "audiocpu", INPUT_LINE_NMI, PULSE_LINE );
65	62	}
66	63
67	64	static WRITE8_HANDLER( shootout_flipscreen_w )
r4679	r4680
76	73
77	74	/*******************************************************************************/
78	75
79		static ADDRESS_MAP_START( readmem, ADDRESS_SPACE_PROGRAM, 8 )
80		AM_RANGE(0x0000, 0x0fff) AM_READ(SMH_RAM)
81		AM_RANGE(0x1000, 0x1000) AM_READ_PORT("DSW1")
82		AM_RANGE(0x1001, 0x1001) AM_READ_PORT("P1")
83		AM_RANGE(0x1002, 0x1002) AM_READ_PORT("P2")
84		AM_RANGE(0x1003, 0x1003) AM_READ_PORT("DSW2")
85		AM_RANGE(0x2000, 0x27ff) AM_READ(SMH_RAM)   /* foreground */
86		AM_RANGE(0x2800, 0x2fff) AM_READ(SMH_RAM)   /* background */
87		AM_RANGE(0x4000, 0x7fff) AM_READ(SMH_BANK1)
88		AM_RANGE(0x8000, 0xffff) AM_READ(SMH_ROM)
	76	static ADDRESS_MAP_START( shootout_map, ADDRESS_SPACE_PROGRAM, 8 )
	77	AM_RANGE(0x0000, 0x0fff) AM_RAM
	78	AM_RANGE(0x1000, 0x1000) AM_READ_PORT("DSW1") AM_WRITE(shootout_bankswitch_w)
	79	AM_RANGE(0x1001, 0x1001) AM_READ_PORT("P1") AM_WRITE(shootout_flipscreen_w)
	80	AM_RANGE(0x1002, 0x1002) AM_READ_PORT("P2") AM_WRITE(shootout_coin_counter_w)
	81	AM_RANGE(0x1003, 0x1003) AM_READ_PORT("DSW2") AM_WRITE(sound_cpu_command_w)
	82	AM_RANGE(0x1004, 0x17ff) AM_RAM
	83	AM_RANGE(0x1800, 0x19ff) AM_RAM AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
	84	AM_RANGE(0x2000, 0x27ff) AM_RAM_WRITE(shootout_textram_w) AM_BASE(&shootout_textram)
	85	AM_RANGE(0x2800, 0x2fff) AM_RAM_WRITE(shootout_videoram_w) AM_BASE(&videoram)
	86	AM_RANGE(0x4000, 0x7fff) AM_ROMBANK(1)
	87	AM_RANGE(0x8000, 0xffff) AM_ROM
89	88	ADDRESS_MAP_END
90	89
91		static ADDRESS_MAP_START( writemem, ADDRESS_SPACE_PROGRAM, 8 )
92		AM_RANGE(0x0000, 0x0fff) AM_WRITE(SMH_RAM)
93		AM_RANGE(0x1000, 0x1000) AM_WRITE(shootout_bankswitch_w)
94		AM_RANGE(0x1001, 0x1001) AM_WRITE(shootout_flipscreen_w)
95		AM_RANGE(0x1002, 0x1002) AM_WRITE(shootout_coin_counter_w)
96		AM_RANGE(0x1003, 0x1003) AM_WRITE(sound_cpu_command_w)
97		AM_RANGE(0x1004, 0x17ff) AM_WRITE(SMH_RAM)
98		AM_RANGE(0x1800, 0x19ff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
99		AM_RANGE(0x2000, 0x27ff) AM_WRITE(shootout_textram_w) AM_BASE(&shootout_textram)
100		AM_RANGE(0x2800, 0x2fff) AM_WRITE(shootout_videoram_w) AM_BASE(&videoram)
101		AM_RANGE(0x4000, 0xffff) AM_WRITE(SMH_ROM)
102		ADDRESS_MAP_END
103
104		static ADDRESS_MAP_START( readmem_alt, ADDRESS_SPACE_PROGRAM, 8 )
105		AM_RANGE(0x0000, 0x0fff) AM_READ(SMH_RAM)
	90	static ADDRESS_MAP_START( shootouj_map, ADDRESS_SPACE_PROGRAM, 8 )
	91	AM_RANGE(0x0000, 0x0fff) AM_RAM
106	92	AM_RANGE(0x1000, 0x1000) AM_READ_PORT("DSW1")
107	93	AM_RANGE(0x1001, 0x1001) AM_READ_PORT("P1")
108	94	AM_RANGE(0x1002, 0x1002) AM_READ_PORT("P2")
109	95	AM_RANGE(0x1003, 0x1003) AM_READ_PORT("DSW2")
110		AM_RANGE(0x2000, 0x21ff) AM_READ(SMH_RAM)
111		AM_RANGE(0x2800, 0x2801) AM_DEVREAD("ym", ym2203_r)
112		AM_RANGE(0x3000, 0x37ff) AM_READ(SMH_RAM)   /* foreground */
113		AM_RANGE(0x3800, 0x3fff) AM_READ(SMH_RAM)   /* background */
114		AM_RANGE(0x4000, 0x7fff) AM_READ(SMH_BANK1)
115		AM_RANGE(0x8000, 0xffff) AM_READ(SMH_ROM)
116		ADDRESS_MAP_END
117
118		static ADDRESS_MAP_START( writemem_alt, ADDRESS_SPACE_PROGRAM, 8 )
119		AM_RANGE(0x0000, 0x0fff) AM_WRITE(SMH_RAM)
120	96	AM_RANGE(0x1800, 0x1800) AM_WRITE(shootout_coin_counter_w)
121		AM_RANGE(0x2000, 0x21ff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
122		AM_RANGE(0x2800, 0x2801) AM_DEVWRITE("ym", ym2203_w)
123		AM_RANGE(0x3000, 0x37ff) AM_WRITE(shootout_textram_w) AM_BASE(&shootout_textram)
124		AM_RANGE(0x3800, 0x3fff) AM_WRITE(shootout_videoram_w) AM_BASE(&videoram)
125		AM_RANGE(0x4000, 0xffff) AM_WRITE(SMH_ROM)
	97	AM_RANGE(0x2000, 0x21ff) AM_RAM AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
	98	AM_RANGE(0x2800, 0x2801) AM_DEVREADWRITE("ym", ym2203_r,ym2203_w)
	99	AM_RANGE(0x3000, 0x37ff) AM_RAM_WRITE(shootout_textram_w) AM_BASE(&shootout_textram)
	100	AM_RANGE(0x3800, 0x3fff) AM_RAM_WRITE(shootout_videoram_w) AM_BASE(&videoram)
	101	AM_RANGE(0x4000, 0x7fff) AM_ROMBANK(1)
	102	AM_RANGE(0x8000, 0xffff) AM_ROM
126	103	ADDRESS_MAP_END
127	104
128	105	/*******************************************************************************/
129	106
130		static ADDRESS_MAP_START( sound_readmem, ADDRESS_SPACE_PROGRAM, 8 )
131		AM_RANGE(0x0000, 0x07ff) AM_READ(SMH_RAM)
132		AM_RANGE(0x4000, 0x4001) AM_DEVREAD("ym", ym2203_r)
	107	static ADDRESS_MAP_START( shootout_sound_map, ADDRESS_SPACE_PROGRAM, 8 )
	108	AM_RANGE(0x0000, 0x07ff) AM_RAM
	109	AM_RANGE(0x4000, 0x4001) AM_DEVREADWRITE("ym", ym2203_r,ym2203_w)
133	110	AM_RANGE(0xa000, 0xa000) AM_READ(soundlatch_r)
134		AM_RANGE(0xc000, 0xffff) AM_READ(SMH_ROM)
135		ADDRESS_MAP_END
136
137		static ADDRESS_MAP_START( sound_writemem, ADDRESS_SPACE_PROGRAM, 8 )
138		AM_RANGE(0x0000, 0x07ff) AM_WRITE(SMH_RAM)
139		AM_RANGE(0x4000, 0x4001) AM_DEVWRITE("ym", ym2203_w)
	111	AM_RANGE(0xc000, 0xffff) AM_ROM
140	112	AM_RANGE(0xd000, 0xd000) AM_WRITE(interrupt_enable_w)
141		AM_RANGE(0xc000, 0xffff) AM_WRITE(SMH_ROM)
142	113	ADDRESS_MAP_END
143	114
144	115	/*******************************************************************************/
145	116
	117	static INPUT_CHANGED( coin_inserted )
	118	{
	119	cputag_set_input_line(field->port->machine, "maincpu", INPUT_LINE_NMI, newval ? ASSERT_LINE : CLEAR_LINE);
	120	}
	121
146	122	static INPUT_PORTS_START( shootout )
147	123	PORT_START("P1")
148	124	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_8WAY
r4679	r4680
161	137	PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_8WAY PORT_COCKTAIL
162	138	PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_COCKTAIL
163	139	PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_COCKTAIL
164		PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_COIN2 )
165		PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_COIN1 )
	140	PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_COIN2 ) PORT_CHANGED(coin_inserted, 0)
	141	PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_COIN1 ) PORT_CHANGED(coin_inserted, 0)
166	142
167	143	PORT_START("DSW1")
168	144	PORT_DIPNAME( 0x03, 0x03, DEF_STR( Coin_A ) )
r4679	r4680
262	238
263	239	static void shootout_snd_irq(const device_config *device, int linestate)
264	240	{
265		cpu_set_input_line(device->machine->cpu[1],0,linestate);
	241	cputag_set_input_line(device->machine, "audiocpu", 0, linestate);
266	242	}
267	243
268	244	static void shootout_snd2_irq(const device_config *device, int linestate)
269	245	{
270		cpu_set_input_line(device->machine->cpu[0],0,linestate);
	246	cputag_set_input_line(device->machine, "maincpu", 0, linestate);
271	247	}
272	248
273	249	static const ym2203_interface ym2203_config =
r4679	r4680
293	269	shootout_snd2_irq
294	270	};
295	271
296		static INTERRUPT_GEN( shootout_interrupt )
297		{
298		static int coin = 0;
299
300		if ( input_port_read(device->machine, "P2") & 0xc0 ) {
301		if ( coin == 0 ) {
302		coin = 1;
303		nmi_line_pulse(device);
304		}
305		} else
306		coin = 0;
307		}
308
309	272	static MACHINE_DRIVER_START( shootout )
310	273
311	274	/* basic machine hardware */
312	275	MDRV_CPU_ADD("maincpu", M6502, 2000000)   /* 2 MHz? */
313		MDRV_CPU_PROGRAM_MAP(readmem,writemem)
314		MDRV_CPU_VBLANK_INT("screen", shootout_interrupt) /* nmi's are triggered at coin up */
	276	MDRV_CPU_PROGRAM_MAP(shootout_map,0)
315	277
316	278	MDRV_CPU_ADD("audiocpu", M6502, 1500000)
317		MDRV_CPU_PROGRAM_MAP(sound_readmem,sound_writemem)
	279	MDRV_CPU_PROGRAM_MAP(shootout_sound_map,0)
318	280
319	281	/* video hardware */
320	282	MDRV_SCREEN_ADD("screen", RASTER)
r4679	r4680
344	306
345	307	/* basic machine hardware */
346	308	MDRV_CPU_ADD("maincpu", M6502, 2000000)   /* 2 MHz? */
347		MDRV_CPU_PROGRAM_MAP(readmem_alt,writemem_alt)
348		MDRV_CPU_VBLANK_INT("screen", shootout_interrupt) /* nmi's are triggered at coin up */
	309	MDRV_CPU_PROGRAM_MAP(shootouj_map,0)
349	310
350	311	/* video hardware */
351	312	MDRV_SCREEN_ADD("screen", RASTER)
r4679	r4680
459	420	{
460	421	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
461	422	int length = memory_region_length(machine, "maincpu");
462		UINT8 *decrypt = auto_malloc(length - 0x8000);
	423	UINT8 *decrypt = auto_alloc_array(machine, UINT8, length - 0x8000);
463	424	UINT8 *rom = memory_region(machine, "maincpu");
464	425	int A;
465	426

src/mame/drivers/contra.c

r4679	r4680
53	53
54	54	static WRITE8_HANDLER( contra_sh_irqtrigger_w )
55	55	{
56		cpu_set_input_line(space->machine->cpu[1],M6809_IRQ_LINE,HOLD_LINE);
	56	cputag_set_input_line(space->machine, "audiocpu", M6809_IRQ_LINE, HOLD_LINE);
57	57	}
58	58
59	59	static WRITE8_HANDLER( contra_coin_counter_w )
r4679	r4680
69	69
70	70
71	71
72		static ADDRESS_MAP_START( readmem, ADDRESS_SPACE_PROGRAM, 8 )
	72	static ADDRESS_MAP_START( contra_map, ADDRESS_SPACE_PROGRAM, 8 )
	73	AM_RANGE(0x0000, 0x0007) AM_WRITE(contra_K007121_ctrl_0_w)
73	74	AM_RANGE(0x0010, 0x0010) AM_READ_PORT("SYSTEM")
74	75	AM_RANGE(0x0011, 0x0011) AM_READ_PORT("P1")
75	76	AM_RANGE(0x0012, 0x0012) AM_READ_PORT("P2")
r4679	r4680
78	79	AM_RANGE(0x0015, 0x0015) AM_READ_PORT("DSW2")
79	80	AM_RANGE(0x0016, 0x0016) AM_READ_PORT("DSW3")
80	81
81		AM_RANGE(0x0c00, 0x0cff) AM_READ(SMH_RAM)
82		AM_RANGE(0x1000, 0x5fff) AM_READ(SMH_RAM)
83		AM_RANGE(0x6000, 0x7fff) AM_READ(SMH_BANK1)
84		AM_RANGE(0x8000, 0xffff) AM_READ(SMH_ROM)
85		ADDRESS_MAP_END
86
87		static ADDRESS_MAP_START( writemem, ADDRESS_SPACE_PROGRAM, 8 )
88		AM_RANGE(0x0000, 0x0007) AM_WRITE(contra_K007121_ctrl_0_w)
89	82	AM_RANGE(0x0018, 0x0018) AM_WRITE(contra_coin_counter_w)
90	83	AM_RANGE(0x001a, 0x001a) AM_WRITE(contra_sh_irqtrigger_w)
91	84	AM_RANGE(0x001c, 0x001c) AM_WRITE(cpu_sound_command_w)
92	85	AM_RANGE(0x001e, 0x001e) AM_WRITENOP   /* ? */
93	86	AM_RANGE(0x0060, 0x0067) AM_WRITE(contra_K007121_ctrl_1_w)
94		AM_RANGE(0x0c00, 0x0cff) AM_WRITE(SMH_RAM) AM_BASE(&paletteram)
95		AM_RANGE(0x1000, 0x1fff) AM_WRITE(SMH_RAM)
	87
	88	AM_RANGE(0x0c00, 0x0cff) AM_RAM AM_BASE(&paletteram)
	89
	90	AM_RANGE(0x1000, 0x1fff) AM_RAM
	91
	92	AM_RANGE(0x2000, 0x5fff) AM_READ(SMH_RAM)
96	93	AM_RANGE(0x2000, 0x23ff) AM_WRITE(contra_fg_cram_w) AM_BASE(&contra_fg_cram)
97	94	AM_RANGE(0x2400, 0x27ff) AM_WRITE(contra_fg_vram_w) AM_BASE(&contra_fg_vram)
98	95	AM_RANGE(0x2800, 0x2bff) AM_WRITE(contra_text_cram_w) AM_BASE(&contra_text_cram)
r4679	r4680
102	99	AM_RANGE(0x4000, 0x43ff) AM_WRITE(contra_bg_cram_w) AM_BASE(&contra_bg_cram)
103	100	AM_RANGE(0x4400, 0x47ff) AM_WRITE(contra_bg_vram_w) AM_BASE(&contra_bg_vram)
104	101	AM_RANGE(0x4800, 0x5fff) AM_WRITE(SMH_RAM)
105		AM_RANGE(0x6000, 0x6fff) AM_WRITE(SMH_ROM)
	102
	103	AM_RANGE(0x6000, 0x7fff) AM_ROMBANK(1)
106	104	AM_RANGE(0x7000, 0x7000) AM_WRITE(contra_bankswitch_w)
107		AM_RANGE(0x7001, 0xffff) AM_WRITE(SMH_ROM)
108		ADDRESS_MAP_END
109	105
110		static ADDRESS_MAP_START( readmem_sound, ADDRESS_SPACE_PROGRAM, 8 )
111		AM_RANGE(0x0000, 0x0000) AM_READ(soundlatch_r)
112		AM_RANGE(0x2000, 0x2001) AM_DEVREAD("ym", ym2151_r)
113		AM_RANGE(0x6000, 0x67ff) AM_READ(SMH_RAM)
114		AM_RANGE(0x8000, 0xffff) AM_READ(SMH_ROM)
	106	AM_RANGE(0x8000, 0xffff) AM_ROM
115	107	ADDRESS_MAP_END
116	108
117		static ADDRESS_MAP_START( writemem_sound, ADDRESS_SPACE_PROGRAM, 8 )
118		AM_RANGE(0x2000, 0x2001) AM_DEVWRITE("ym", ym2151_w)
	109	static ADDRESS_MAP_START( sound_map, ADDRESS_SPACE_PROGRAM, 8 )
	110	AM_RANGE(0x0000, 0x0000) AM_READ(soundlatch_r)
	111	AM_RANGE(0x2000, 0x2001) AM_DEVREADWRITE("ym", ym2151_r, ym2151_w)
119	112	AM_RANGE(0x4000, 0x4000) AM_WRITENOP /* read triggers irq reset and latch read (in the hardware only). */
120		AM_RANGE(0x6000, 0x67ff) AM_WRITE(SMH_RAM)
121		AM_RANGE(0x8000, 0xffff) AM_WRITE(SMH_ROM)
	113	AM_RANGE(0x6000, 0x67ff) AM_RAM
	114	AM_RANGE(0x8000, 0xffff) AM_ROM
122	115	ADDRESS_MAP_END
123	116
124	117
r4679	r4680
197	190
198	191	/* basic machine hardware */
199	192	MDRV_CPU_ADD("maincpu", M6809, 1500000)
200		MDRV_CPU_PROGRAM_MAP(readmem,writemem)
	193	MDRV_CPU_PROGRAM_MAP(contra_map,0)
201	194	MDRV_CPU_VBLANK_INT("screen", irq0_line_hold)
202	195
203	196	MDRV_CPU_ADD("audiocpu", M6809, 2000000)
204		MDRV_CPU_PROGRAM_MAP(readmem_sound,writemem_sound)
	197	MDRV_CPU_PROGRAM_MAP(sound_map,0)
205	198
206	199	MDRV_QUANTUM_TIME(HZ(600))   /* 10 CPU slices per frame - enough for the sound CPU to read all commands */
207	200

src/mame/drivers/zn.c

r4679	r4680
298	298
299	299	if( param )
300	300	{
301		timer_adjust_oneshot( dip_timer, cpu_clocks_to_attotime( machine->cpu[0], 50 ), 0 );
	301	timer_adjust_oneshot( dip_timer, cputag_clocks_to_attotime( machine, "maincpu", 50 ), 0 );
302	302	}
303	303	}
304	304
r4679	r4680
648	648	static WRITE32_HANDLER( zn_qsound_w )
649	649	{
650	650	soundlatch_w(space, 0, data);
651		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_NMI, PULSE_LINE);
	651	cputag_set_input_line(space->machine, "audiocpu", INPUT_LINE_NMI, PULSE_LINE);
652	652	}
653	653
654	654	static DRIVER_INIT( coh1000c )
655	655	{
656		memory_install_read32_handler ( cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x1f000000, 0x1f3fffff, 0, 0, SMH_BANK1 );     /* fixed game rom */
657		memory_install_read32_handler ( cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x1f400000, 0x1f7fffff, 0, 0, SMH_BANK2 );     /* banked game rom */
658		memory_install_write32_handler( cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x1fb00000, 0x1fb00003, 0, 0, bank_coh1000c_w ); /* bankswitch */
659		memory_install_read32_handler ( cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x1fb40010, 0x1fb40013, 0, 0, capcom_kickharness_r );
660		memory_install_read32_handler ( cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x1fb40020, 0x1fb40023, 0, 0, capcom_kickharness_r );
661		memory_install_read32_handler ( cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x1fb80000, 0x1fbfffff, 0, 0, SMH_BANK3 );     /* country rom */
662		memory_install_write32_handler( cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x1fb60000, 0x1fb60003, 0, 0, zn_qsound_w );
	656	memory_install_read32_handler ( cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x1f000000, 0x1f3fffff, 0, 0, (read32_space_func)SMH_BANK(1) );     /* fixed game rom */
	657	memory_install_read32_handler ( cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x1f400000, 0x1f7fffff, 0, 0, (read32_space_func)SMH_BANK(2) );     /* banked game rom */
	658	memory_install_write32_handler( cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x1fb00000, 0x1fb00003, 0, 0, bank_coh1000c_w ); /* bankswitch */
	659	memory_install_read32_handler ( cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x1fb40010, 0x1fb40013, 0, 0, capcom_kickharness_r );
	660	memory_install_read32_handler ( cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x1fb40020, 0x1fb40023, 0, 0, capcom_kickharness_r );
	661	memory_install_read32_handler ( cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x1fb80000, 0x1fbfffff, 0, 0, (read32_space_func)SMH_BANK(3) );     /* country rom */
	662	memory_install_write32_handler( cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x1fb60000, 0x1fb60003, 0, 0, zn_qsound_w );
663	663
664	664	zn_driver_init(machine);
665	665
r4679	r4680
669	669	/* disable:
670	670	the QSound CPU for glpracr as it doesn't have any roms &
671	671	the link cpu for glprac2l as the h/w is not emulated yet. */
672		cpu_suspend( machine->cpu[1], SUSPEND_REASON_DISABLE, 1 );
	672	cputag_suspend( machine, "audiocpu", SUSPEND_REASON_DISABLE, 1 );
673	673	}
674	674	}
675	675
r4679	r4680
872	872
873	873	static DRIVER_INIT( coh3002c )
874	874	{
875		memory_install_read32_handler ( cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x1f000000, 0x1f3fffff, 0, 0, SMH_BANK1 );     /* fixed game rom */
876		memory_install_read32_handler ( cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x1f400000, 0x1f7fffff, 0, 0, SMH_BANK2 );     /* banked game rom */
877		memory_install_read32_handler ( cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x1fb40010, 0x1fb40013, 0, 0, capcom_kickharness_r );
878		memory_install_read32_handler ( cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x1fb40020, 0x1fb40023, 0, 0, capcom_kickharness_r );
879		memory_install_write32_handler( cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x1fb00000, 0x1fb00003, 0, 0, bank_coh3002c_w ); /* bankswitch */
880		memory_install_read32_handler ( cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x1fb80000, 0x1fbfffff, 0, 0, SMH_BANK3 );     /* country rom */
881		memory_install_write32_handler( cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x1fb60000, 0x1fb60003, 0, 0, zn_qsound_w );
	875	memory_install_read32_handler ( cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x1f000000, 0x1f3fffff, 0, 0, (read32_space_func)SMH_BANK(1) );     /* fixed game rom */
	876	memory_install_read32_handler ( cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x1f400000, 0x1f7fffff, 0, 0, (read32_space_func)SMH_BANK(2) );     /* banked game rom */
	877	memory_install_read32_handler ( cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x1fb40010, 0x1fb40013, 0, 0, capcom_kickharness_r );
	878	memory_install_read32_handler ( cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x1fb40020, 0x1fb40023, 0, 0, capcom_kickharness_r );
	879	memory_install_write32_handler( cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x1fb00000, 0x1fb00003, 0, 0, bank_coh3002c_w ); /* bankswitch */
	880	memory_install_read32_handler ( cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x1fb80000, 0x1fbfffff, 0, 0, (read32_space_func)SMH_BANK(3) );     /* country rom */
	881	memory_install_write32_handler( cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x1fb60000, 0x1fb60003, 0, 0, zn_qsound_w );
882	882
883	883	zn_driver_init(machine);
884	884	}
r4679	r4680
1160	1160
1161	1161	static DRIVER_INIT( coh1000ta )
1162	1162	{
1163		taitofx1_eeprom_size1 = 0x200; taitofx1_eeprom1 = auto_malloc( taitofx1_eeprom_size1 );
	1163	taitofx1_eeprom_size1 = 0x200; taitofx1_eeprom1 = auto_alloc_array(machine, UINT8, taitofx1_eeprom_size1 );
1164	1164
1165		memory_install_read32_handler     ( cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x1f000000, 0x1f7fffff, 0, 0, SMH_BANK1 );     /* banked game rom */
1166		memory_install_write32_handler    ( cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x1fb40000, 0x1fb40003, 0, 0, bank_coh1000t_w ); /* bankswitch */
1167		memory_install_readwrite32_handler( cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x1fb80000, 0x1fb80003, 0, 0, taitofx1a_ymsound_r, taitofx1a_ymsound_w );
1168		memory_install_readwrite32_handler( cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x1fbe0000, 0x1fbe0000 + ( taitofx1_eeprom_size1 - 1 ), 0, 0, SMH_BANK2, SMH_BANK2 );
	1165	memory_install_read32_handler     ( cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x1f000000, 0x1f7fffff, 0, 0, (read32_space_func)SMH_BANK(1) );     /* banked game rom */
	1166	memory_install_write32_handler    ( cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x1fb40000, 0x1fb40003, 0, 0, bank_coh1000t_w ); /* bankswitch */
	1167	memory_install_readwrite32_handler( cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x1fb80000, 0x1fb80003, 0, 0, taitofx1a_ymsound_r, taitofx1a_ymsound_w );
	1168	memory_install_readwrite32_handler( cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x1fbe0000, 0x1fbe0000 + ( taitofx1_eeprom_size1 - 1 ), 0, 0, (read32_space_func)SMH_BANK(2), (write32_space_func)SMH_BANK(2) );
1169	1169
1170	1170	zn_driver_init(machine);
1171	1171	mb3773_init(machine);
r4679	r4680
1195	1195	}
1196	1196
1197	1197	static ADDRESS_MAP_START( fx1a_sound_map, ADDRESS_SPACE_PROGRAM, 8 )
1198		AM_RANGE(0x4000, 0x7fff) AM_READ(SMH_BANK10)   /* Fallthrough */
	1198	AM_RANGE(0x4000, 0x7fff) AM_READ(SMH_BANK(10))   /* Fallthrough */
1199	1199	AM_RANGE(0x0000, 0x7fff) AM_ROM
1200	1200	AM_RANGE(0xc000, 0xdfff) AM_RAM
1201	1201	AM_RANGE(0xe000, 0xe003) AM_DEVREADWRITE("ym", ym2610_r, ym2610_w)
r4679	r4680
1210	1210	/* handler called by the YM2610 emulator when the internal timers cause an IRQ */
1211	1211	static void irq_handler(const device_config *device, int irq)
1212	1212	{
1213		cpu_set_input_line(device->machine->cpu[1],0,irq ? ASSERT_LINE : CLEAR_LINE);
	1213	cputag_set_input_line(device->machine, "audiocpu", 0, irq ? ASSERT_LINE : CLEAR_LINE);
1214	1214	}
1215	1215
1216	1216	static const ym2610_interface ym2610_config =
r4679	r4680
1253	1253
1254	1254	static DRIVER_INIT( coh1000tb )
1255	1255	{
1256		taitofx1_eeprom_size1 = 0x400; taitofx1_eeprom1 = auto_malloc( taitofx1_eeprom_size1 );
1257		taitofx1_eeprom_size2 = 0x200; taitofx1_eeprom2 = auto_malloc( taitofx1_eeprom_size2 );
	1256	taitofx1_eeprom_size1 = 0x400; taitofx1_eeprom1 = auto_alloc_array(machine, UINT8,  taitofx1_eeprom_size1 );
	1257	taitofx1_eeprom_size2 = 0x200; taitofx1_eeprom2 = auto_alloc_array(machine, UINT8,  taitofx1_eeprom_size2 );
1258	1258
1259		memory_install_read32_handler     ( cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x1f000000, 0x1f7fffff, 0, 0, SMH_BANK1 ); /* banked game rom */
1260		memory_install_readwrite32_handler( cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x1fb00000, 0x1fb00000 + ( taitofx1_eeprom_size1 - 1 ), 0, 0, SMH_BANK2, SMH_BANK2 );
1261		memory_install_write32_handler    ( cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x1fb40000, 0x1fb40003, 0, 0, bank_coh1000t_w ); /* bankswitch */
1262		memory_install_write32_handler    ( cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x1fb80000, 0x1fb80003, 0, 0, taitofx1b_volume_w );
1263		memory_install_write32_handler    ( cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x1fba0000, 0x1fba0003, 0, 0, taitofx1b_sound_w );
1264		memory_install_read32_handler     ( cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x1fbc0000, 0x1fbc0003, 0, 0, taitofx1b_sound_r );
1265		memory_install_readwrite32_handler( cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x1fbe0000, 0x1fbe0000 + ( taitofx1_eeprom_size2 - 1 ), 0, 0, SMH_BANK3, SMH_BANK3 );
	1259	memory_install_read32_handler     ( cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x1f000000, 0x1f7fffff, 0, 0, (read32_space_func)SMH_BANK(1) ); /* banked game rom */
	1260	memory_install_readwrite32_handler( cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x1fb00000, 0x1fb00000 + ( taitofx1_eeprom_size1 - 1 ), 0, 0, (read32_space_func)SMH_BANK(2), (write32_space_func)SMH_BANK(2) );
	1261	memory_install_write32_handler    ( cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x1fb40000, 0x1fb40003, 0, 0, bank_coh1000t_w ); /* bankswitch */
	1262	memory_install_write32_handler    ( cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x1fb80000, 0x1fb80003, 0, 0, taitofx1b_volume_w );
	1263	memory_install_write32_handler    ( cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x1fba0000, 0x1fba0003, 0, 0, taitofx1b_sound_w );
	1264	memory_install_read32_handler     ( cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x1fbc0000, 0x1fbc0003, 0, 0, taitofx1b_sound_r );
	1265	memory_install_readwrite32_handler( cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x1fbe0000, 0x1fbe0000 + ( taitofx1_eeprom_size2 - 1 ), 0, 0, (read32_space_func)SMH_BANK(3), (write32_space_func)SMH_BANK(3) );
1266	1266
1267	1267	zn_driver_init(machine);
1268	1268	mb3773_init(machine);
r4679	r4680
1458	1458	{
1459	1459	const device_config *ide = devtag_get_device(machine, "ide");
1460	1460
1461		memory_install_read32_handler            ( cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x1f000000, 0x1f1fffff, 0, 0, SMH_BANK1 );
1462		memory_install_write32_handler           ( cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x1f000000, 0x1f000003, 0, 0, SMH_NOP );
1463		memory_install_readwrite32_device_handler( cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), ide, 0x1f7e4000, 0x1f7e4fff, 0, 0, ide_controller32_r, ide_controller32_w );
1464		memory_install_readwrite32_handler       ( cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x1f7e8000, 0x1f7e8003, 0, 0, SMH_NOP, SMH_NOP );
1465		memory_install_readwrite32_device_handler( cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), ide, 0x1f7f4000, 0x1f7f4fff, 0, 0, ide_controller32_r, ide_controller32_w );
	1461	memory_install_read32_handler            ( cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x1f000000, 0x1f1fffff, 0, 0, (read32_space_func)SMH_BANK(1) );
	1462	memory_install_write32_handler           ( cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x1f000000, 0x1f000003, 0, 0, (write32_space_func)SMH_NOP );
	1463	memory_install_readwrite32_device_handler( cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), ide, 0x1f7e4000, 0x1f7e4fff, 0, 0, ide_controller32_r, ide_controller32_w );
	1464	memory_install_readwrite32_handler       ( cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x1f7e8000, 0x1f7e8003, 0, 0, (read32_space_func)SMH_NOP, (write32_space_func)SMH_NOP );
	1465	memory_install_readwrite32_device_handler( cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), ide, 0x1f7f4000, 0x1f7f4fff, 0, 0, ide_controller32_r, ide_controller32_w );
1466	1466
1467	1467	zn_driver_init(machine);
1468	1468	}
r4679	r4680
1642	1642	static WRITE32_HANDLER( coh1002e_latch_w )
1643	1643	{
1644	1644	if (offset)
1645		cpu_set_input_line(space->machine->cpu[1], 2, HOLD_LINE);   // irq 2 on the 68k
	1645	cputag_set_input_line(space->machine, "audiocpu", 2, HOLD_LINE);   // irq 2 on the 68k
1646	1646	else
1647	1647	soundlatch_w(space, 0, data);
1648	1648	}
1649	1649
1650	1650	static DRIVER_INIT( coh1002e )
1651	1651	{
1652		memory_install_read32_handler ( cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x1f000000, 0x1f7fffff, 0, 0, SMH_BANK1 );
1653		memory_install_write32_handler( cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x1fa10300, 0x1fa10303, 0, 0, coh1002e_bank_w );
1654		memory_install_write32_handler( cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x1fb00000, 0x1fb00007, 0, 0, coh1002e_latch_w );
	1652	memory_install_read32_handler ( cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x1f000000, 0x1f7fffff, 0, 0, (read32_space_func)SMH_BANK(1) );
	1653	memory_install_write32_handler( cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x1fa10300, 0x1fa10303, 0, 0, coh1002e_bank_w );
	1654	memory_install_write32_handler( cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x1fb00000, 0x1fb00007, 0, 0, coh1002e_latch_w );
1655	1655
1656	1656	zn_driver_init(machine);
1657	1657	}
r4679	r4680
1791	1791
1792	1792	static DRIVER_INIT( bam2 )
1793	1793	{
1794		memory_install_read32_handler ( cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x1f000000, 0x1f3fffff, 0, 0, SMH_BANK1 );
1795		memory_install_read32_handler ( cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x1f400000, 0x1f7fffff, 0, 0, SMH_BANK2 );
1796		memory_install_read32_handler ( cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x1fb00000, 0x1fb00007, 0, 0, bam2_mcu_r );
1797		memory_install_read32_handler ( cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x1fa20000, 0x1fa20003, 0, 0, bam2_unk_r );
1798		memory_install_write32_handler( cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x1fa10300, 0x1fa10303, 0, 0, bam2_sec_w );
1799		memory_install_write32_handler( cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x1fb00000, 0x1fb00007, 0, 0, bam2_mcu_w );
	1794	memory_install_read32_handler ( cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x1f000000, 0x1f3fffff, 0, 0, (read32_space_func)SMH_BANK(1) );
	1795	memory_install_read32_handler ( cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x1f400000, 0x1f7fffff, 0, 0, (read32_space_func)SMH_BANK(2) );
	1796	memory_install_read32_handler ( cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x1fb00000, 0x1fb00007, 0, 0, bam2_mcu_r );
	1797	memory_install_read32_handler ( cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x1fa20000, 0x1fa20003, 0, 0, bam2_unk_r );
	1798	memory_install_write32_handler( cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x1fa10300, 0x1fa10303, 0, 0, bam2_sec_w );
	1799	memory_install_write32_handler( cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x1fb00000, 0x1fb00007, 0, 0, bam2_mcu_w );
1800	1800
1801	1801	zn_driver_init(machine);
1802	1802	}
r4679	r4680
2111	2111
2112	2112	static DRIVER_INIT( coh1000a )
2113	2113	{
2114		memory_install_read32_handler ( cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x1f000000, 0x1f1fffff, 0, 0, SMH_BANK1 );
2115		memory_install_write32_handler( cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x1fbfff00, 0x1fbfff03, 0, 0, acpsx_00_w );
2116		memory_install_write32_handler( cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x1fbfff10, 0x1fbfff13, 0, 0, acpsx_10_w );
	2114	memory_install_read32_handler ( cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x1f000000, 0x1f1fffff, 0, 0, (read32_space_func)SMH_BANK(1) );
	2115	memory_install_write32_handler( cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x1fbfff00, 0x1fbfff03, 0, 0, acpsx_00_w );
	2116	memory_install_write32_handler( cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x1fbfff10, 0x1fbfff13, 0, 0, acpsx_10_w );
2117	2117
2118	2118	if( strcmp( machine->gamedrv->name, "nbajamex" ) == 0 )
2119	2119	{
2120		nbajamex_eeprom_size = 0x8000; nbajamex_eeprom = auto_malloc( nbajamex_eeprom_size );
	2120	nbajamex_eeprom_size = 0x8000; nbajamex_eeprom = auto_alloc_array(machine, UINT8, nbajamex_eeprom_size );
2121	2121
2122		memory_install_readwrite32_handler( cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x1f200000, 0x1f200000 + ( nbajamex_eeprom_size - 1 ), 0, 0, SMH_BANK2, SMH_BANK2 );
2123		memory_install_read32_handler     ( cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x1fbfff08, 0x1fbfff0b, 0, 0, nbajamex_08_r );
2124		memory_install_readwrite32_handler( cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x1fbfff80, 0x1fbfff83, 0, 0, nbajamex_80_r, nbajamex_80_w );
	2122	memory_install_readwrite32_handler( cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x1f200000, 0x1f200000 + ( nbajamex_eeprom_size - 1 ), 0, 0, (read32_space_func)SMH_BANK(2), (write32_space_func)SMH_BANK(2) );
	2123	memory_install_read32_handler     ( cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x1fbfff08, 0x1fbfff0b, 0, 0, nbajamex_08_r );
	2124	memory_install_readwrite32_handler( cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x1fbfff80, 0x1fbfff83, 0, 0, nbajamex_80_r, nbajamex_80_w );
2125	2125
2126	2126	memory_set_bankptr(machine,  2, nbajamex_eeprom ); /* ram/eeprom/?? */
2127	2127	}
r4679	r4680
2131	2131	{
2132	2132	const device_config *ide = devtag_get_device(machine, "ide");
2133	2133
2134		memory_install_read32_device_handler( cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), ide, 0x1fbfff8c, 0x1fbfff8f, 0, 0, jdredd_idestat_r );
2135		memory_install_write32_handler      ( cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x1fbfff8c, 0x1fbfff8f, 0, 0, SMH_NOP );
2136		memory_install_readwrite32_device_handler( cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), ide, 0x1fbfff90, 0x1fbfff9f, 0, 0, jdredd_ide_r, jdredd_ide_w );
	2134	memory_install_read32_device_handler( cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), ide, 0x1fbfff8c, 0x1fbfff8f, 0, 0, jdredd_idestat_r );
	2135	memory_install_write32_handler      ( cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x1fbfff8c, 0x1fbfff8f, 0, 0, (write32_space_func)SMH_NOP );
	2136	memory_install_readwrite32_device_handler( cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), ide, 0x1fbfff90, 0x1fbfff9f, 0, 0, jdredd_ide_r, jdredd_ide_w );
2137	2137	}
2138	2138
2139	2139	zn_driver_init(machine);
r4679	r4680
2290	2290
2291	2291	static DRIVER_INIT( coh1001l )
2292	2292	{
2293		memory_install_read32_handler ( cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x1f000000, 0x1f7fffff, 0, 0, SMH_BANK1 ); /* banked rom */
2294		memory_install_write32_handler( cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x1fb00000, 0x1fb00003, 0, 0, coh1001l_bnk_w );
	2293	memory_install_read32_handler ( cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x1f000000, 0x1f7fffff, 0, 0, (read32_space_func)SMH_BANK(1) ); /* banked rom */
	2294	memory_install_write32_handler( cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x1fb00000, 0x1fb00003, 0, 0, coh1001l_bnk_w );
2295	2295
2296	2296	zn_driver_init(machine);
2297	2297	}
r4679	r4680
2333	2333
2334	2334	static DRIVER_INIT( coh1002v )
2335	2335	{
2336		memory_install_read32_handler ( cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x1f000000, 0x1f27ffff, 0, 0, SMH_BANK1 );
2337		memory_install_read32_handler ( cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x1fb00000, 0x1fbfffff, 0, 0, SMH_BANK2 );
2338		memory_install_write32_handler( cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x1fb00000, 0x1fb00003, 0, 0, coh1002v_bnk_w );
	2336	memory_install_read32_handler ( cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x1f000000, 0x1f27ffff, 0, 0, (read32_space_func)SMH_BANK(1) );
	2337	memory_install_read32_handler ( cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x1fb00000, 0x1fbfffff, 0, 0, (read32_space_func)SMH_BANK(2) );
	2338	memory_install_write32_handler( cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x1fb00000, 0x1fb00003, 0, 0, coh1002v_bnk_w );
2339	2339
2340	2340	zn_driver_init(machine);
2341	2341	}
r4679	r4680
2536	2536
2537	2537	static DRIVER_INIT( coh1002m )
2538	2538	{
2539		memory_install_read32_handler     ( cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x1f000000, 0x1f7fffff, 0, 0, SMH_BANK1 );
2540		memory_install_readwrite32_handler( cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x1fb00000, 0x1fb00003, 0, 0, cbaj_z80_r, cbaj_z80_w );
2541		memory_install_write32_handler    ( cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x1fb00004, 0x1fb00007, 0, 0, coh1002m_bank_w );
	2539	memory_install_read32_handler     ( cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x1f000000, 0x1f7fffff, 0, 0, (read32_space_func)SMH_BANK(1) );
	2540	memory_install_readwrite32_handler( cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x1fb00000, 0x1fb00003, 0, 0, cbaj_z80_r, cbaj_z80_w );
	2541	memory_install_write32_handler    ( cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x1fb00004, 0x1fb00007, 0, 0, coh1002m_bank_w );
2542	2542
2543	2543	zn_driver_init(machine);
2544	2544	}

src/mame/drivers/paradise.c

r4679	r4680
1024	1024	static DRIVER_INIT (tgtball)
1025	1025	{
1026	1026	paradise_sprite_inc = 4;
1027		memory_install_write8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_IO), 0x2001, 0x2001, 0, 0, tgtball_flipscreen_w );
	1027	memory_install_write8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_IO), 0x2001, 0x2001, 0, 0, tgtball_flipscreen_w );
1028	1028	}
1029	1029
1030	1030	static DRIVER_INIT (torus)
1031	1031	{
1032	1032	paradise_sprite_inc = 4;
1033		memory_install_write8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_IO), 0x2070, 0x2070, 0, 0, torus_coin_counter_w);
	1033	memory_install_write8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_IO), 0x2070, 0x2070, 0, 0, torus_coin_counter_w);
1034	1034	}
1035	1035
1036	1036
r4679	r4680
1048	1048	GAME( 1996,  torus,    0,       torus,    torus,    torus,    ROT90, "Yun Sung", "Torus", 0 )
1049	1049	GAME( 1998,  madball,  0,       madball,  madball,  tgtball,  ROT0,  "Yun Sung", "Mad Ball V2.0", 0 )
1050	1050	GAME( 1997,  madballn, madball, madball,  madball,  tgtball,  ROT0,  "Yun Sung", "Mad Ball V2.0 (With Nudity)", 0 )
1051

src/mame/drivers/volfied.c

r4679	r4680
217	217
218	218	static void irqhandler(const device_config *device, int irq)
219	219	{
220		cpu_set_input_line(device->machine->cpu[1], 0, irq ? ASSERT_LINE : CLEAR_LINE);
	220	cputag_set_input_line(device->machine, "audiocpu", 0, irq ? ASSERT_LINE : CLEAR_LINE);
221	221	}
222	222
223	223	static const ym2203_interface ym2203_config =

src/mame/drivers/dribling.c

r4679	r4680
99	99	/* bit 7 = di */
100	100	di = (data >> 7) & 1;
101	101	if (!di)
102		cpu_set_input_line(device->machine->cpu[0], 0, CLEAR_LINE);
	102	cputag_set_input_line(device->machine, "maincpu", 0, CLEAR_LINE);
103	103
104	104	/* bit 6 = parata */
105	105
r4679	r4680
215	215	*
216	216	*************************************/
217	217
218		static ADDRESS_MAP_START( readmem, ADDRESS_SPACE_PROGRAM, 8 )
219		AM_RANGE(0x0000, 0x1fff) AM_READ(SMH_ROM)
220		AM_RANGE(0x2000, 0x3fff) AM_READ(SMH_RAM)
221		AM_RANGE(0x4000, 0x7fff) AM_READ(SMH_ROM)
222		AM_RANGE(0xc000, 0xdfff) AM_READ(SMH_RAM)
	218	static ADDRESS_MAP_START( dribling_map, ADDRESS_SPACE_PROGRAM, 8 )
	219	AM_RANGE(0x0000, 0x1fff) AM_ROM
	220	AM_RANGE(0x2000, 0x3fff) AM_RAM AM_BASE(&videoram)
	221	AM_RANGE(0x4000, 0x7fff) AM_ROM
	222	AM_RANGE(0xc000, 0xdfff) AM_RAM_WRITE(dribling_colorram_w) AM_BASE(&colorram)
223	223	ADDRESS_MAP_END
224	224
225	225
226		static ADDRESS_MAP_START( writemem, ADDRESS_SPACE_PROGRAM, 8 )
227		AM_RANGE(0x0000, 0x1fff) AM_WRITE(SMH_ROM)
228		AM_RANGE(0x2000, 0x3fff) AM_WRITE(SMH_RAM) AM_BASE(&videoram)
229		AM_RANGE(0x4000, 0x7fff) AM_WRITE(SMH_ROM)
230		AM_RANGE(0xc000, 0xdfff) AM_WRITE(dribling_colorram_w) AM_BASE(&colorram)
231		ADDRESS_MAP_END
232
233
234	226	static ADDRESS_MAP_START( io_map, ADDRESS_SPACE_IO, 8 )
235	227	ADDRESS_MAP_GLOBAL_MASK(0xff)
236	228	AM_RANGE(0x00, 0xff) AM_READWRITE(ioread, iowrite)
r4679	r4680
297	289
298	290	/* basic machine hardware */
299	291	MDRV_CPU_ADD("maincpu", Z80, 5000000)
300		MDRV_CPU_PROGRAM_MAP(readmem,writemem)
	292	MDRV_CPU_PROGRAM_MAP(dribling_map,0)
301	293	MDRV_CPU_IO_MAP(io_map,0)
302	294	MDRV_CPU_VBLANK_INT("screen", dribling_irq_gen)
303	295
r4679	r4680
377	369
378	370	GAME( 1983, dribling, 0,        dribling, dribling, 0, ROT0, "Model Racing", "Dribbling", GAME_NO_SOUND )
379	371	GAME( 1983, driblino, dribling, dribling, dribling, 0, ROT0, "Model Racing (Olympia license)", "Dribbling (Olympia)", GAME_NO_SOUND )
380

src/mame/drivers/balsente.c

r4679	r4680
1983	1983	/* load EF           from 0x2e000-0x30000 */
1984	1984	/* ROM region must be 0x40000 total */
1985	1985
1986		UINT8 *temp = malloc_or_die(0x20000);
	1986	UINT8 *temp = alloc_array_or_die(UINT8, 0x20000);
1987	1987	{
1988	1988	UINT8 *rom = memory_region(machine, "maincpu");
1989	1989	UINT32 len = memory_region_length(machine, "maincpu");
r4679	r4680
2068	2068	static DRIVER_INIT( toggle )   { expand_roms(machine, EXPAND_ALL);  balsente_shooter = 0; /* noanalog */ }
2069	2069	static DRIVER_INIT( nametune )
2070	2070	{
2071		const address_space *space = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM);
	2071	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
2072	2072	memory_install_write8_handler(space, 0x9f00, 0x9f00, 0, 0, balsente_rombank2_select_w);
2073	2073	expand_roms(machine, EXPAND_NONE | SWAP_HALVES); balsente_shooter = 0; /* noanalog */
2074	2074	}
2075	2075	static DRIVER_INIT( nstocker )
2076	2076	{
2077		const address_space *space = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM);
	2077	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
2078	2078	memory_install_write8_handler(space, 0x9f00, 0x9f00, 0, 0, balsente_rombank2_select_w);
2079	2079	expand_roms(machine, EXPAND_NONE | SWAP_HALVES); balsente_shooter = 1; balsente_adc_shift = 1;
2080	2080	}
2081	2081	static DRIVER_INIT( sfootbal )
2082	2082	{
2083		const address_space *space = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM);
	2083	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
2084	2084	memory_install_write8_handler(space, 0x9f00, 0x9f00, 0, 0, balsente_rombank2_select_w);
2085	2085	expand_roms(machine, EXPAND_ALL  | SWAP_HALVES); balsente_shooter = 0; balsente_adc_shift = 0;
2086	2086	}
2087	2087	static DRIVER_INIT( spiker )
2088	2088	{
2089		const address_space *space = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM);
	2089	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
2090	2090	memory_install_readwrite8_handler(space, 0x9f80, 0x9f8f, 0, 0, spiker_expand_r, spiker_expand_w);
2091	2091	memory_install_write8_handler(space, 0x9f00, 0x9f00, 0, 0, balsente_rombank2_select_w);
2092	2092	expand_roms(machine, EXPAND_ALL  | SWAP_HALVES); balsente_shooter = 0; balsente_adc_shift = 1;
2093	2093	}
2094	2094	static DRIVER_INIT( stompin )
2095	2095	{
2096		const address_space *space = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM);
	2096	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
2097	2097	memory_install_write8_handler(space, 0x9f00, 0x9f00, 0, 0, balsente_rombank2_select_w);
2098	2098	expand_roms(machine, 0x0c | SWAP_HALVES); balsente_shooter = 0; balsente_adc_shift = 32;
2099	2099	}
2100	2100	static DRIVER_INIT( rescraid ) { expand_roms(machine, EXPAND_NONE); balsente_shooter = 0; /* noanalog */ }
2101	2101	static DRIVER_INIT( grudge )
2102	2102	{
2103		const address_space *space = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM);
	2103	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
2104	2104	memory_install_read8_handler(space, 0x9400, 0x9400, 0, 0, grudge_steering_r);
2105	2105	expand_roms(machine, EXPAND_NONE); balsente_shooter = 0;
2106	2106	}
2107	2107	static DRIVER_INIT( shrike )
2108	2108	{
2109		const address_space *space = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM);
	2109	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
2110	2110	memory_install_readwrite8_handler(space, 0x9e00, 0x9fff, 0, 0, shrike_shared_6809_r, shrike_shared_6809_w);
2111	2111	memory_install_write8_handler(space, 0x9e01, 0x9e01, 0, 0, shrike_sprite_select_w );
2112		memory_install_readwrite16_handler(cpu_get_address_space(machine->cpu[2], ADDRESS_SPACE_PROGRAM), 0x10000, 0x1001f, 0, 0, shrike_io_68k_r, shrike_io_68k_w);
	2112	memory_install_readwrite16_handler(cputag_get_address_space(machine, "68k", ADDRESS_SPACE_PROGRAM), 0x10000, 0x1001f, 0, 0, shrike_io_68k_r, shrike_io_68k_w);
2113	2113
2114	2114	expand_roms(machine, EXPAND_ALL);  balsente_shooter = 0; balsente_adc_shift = 32;
2115	2115	}

src/mame/drivers/galpani3.c

r4679	r4680
124	124	static VIDEO_START(galpani3)
125	125	{
126	126	/* so we can use suprnova.c */
127		galpani3_spriteram32 = auto_malloc ( 0x4000 );
	127	galpani3_spriteram32 = auto_alloc_array(machine, UINT32, 0x4000/4);
128	128	spriteram_size = 0x4000;
129		galpani3_spc_regs = auto_malloc (0x40);
	129	galpani3_spc_regs = auto_alloc_array(machine, UINT32, 0x40/4);
130	130	suprnova_alt_enable_sprites = 1;
131	131
132	132
133		sprite_bitmap_1 = auto_bitmap_alloc(1024,1024,BITMAP_FORMAT_INDEXED16);
	133	sprite_bitmap_1 = auto_bitmap_alloc(machine,1024,1024,BITMAP_FORMAT_INDEXED16);
134	134
135	135	}
136	136

src/mame/drivers/megadriv.c

r4679	r4680
145	145
146	146	// hacks for C2
147	147	int genvdp_use_cram = 0; // c2 uses it's own palette ram
148		int genesis_has_z80;
149	148	int genesis_always_irq6 = 0; // c2 never enables the irq6, different source??
150	149	int genesis_other_hacks = 0; // misc hacks
151	150
r4679	r4680
208	207
209	208	static struct genesis_z80_vars
210	209	{
211		int z80_cpunum;
212	210	int z80_is_reset;
213	211	int z80_has_bus;
214	212	UINT32 z80_bank_addr;
r4679	r4680
577	575	if (megadrive_irq4_pending)
578	576	{
579	577	if (MEGADRIVE_REG0_IRQ4_ENABLE)
580		cpu_set_input_line(machine->cpu[0],4,HOLD_LINE);
	578	cputag_set_input_line(machine, "maincpu", 4, HOLD_LINE);
581	579	else
582		cpu_set_input_line(machine->cpu[0],4,CLEAR_LINE);
	580	cputag_set_input_line(machine, "maincpu", 4, CLEAR_LINE);
583	581	}
584	582
585	583	/* ??? Fatal Rewind needs this but I'm not sure it's accurate behavior
r4679	r4680
594	592	if (megadrive_irq6_pending)
595	593	{
596	594	if (MEGADRIVE_REG01_IRQ6_ENABLE )
597		cpu_set_input_line(machine->cpu[0],6,HOLD_LINE);
	595	cputag_set_input_line(machine, "maincpu", 6, HOLD_LINE);
598	596	else
599		cpu_set_input_line(machine->cpu[0],6,CLEAR_LINE);
	597	cputag_set_input_line(machine, "maincpu", 6, CLEAR_LINE);
600	598	}
601	599
602	600	/* ??? */
r4679	r4680
704	702	if (length==0x00) length = 0xffff;
705	703
706	704	/* This is a hack until real DMA timings are implemented */
707		cpu_spinuntil_time(machine->cpu[0], ATTOTIME_IN_NSEC(length*1000/3500));
	705	cpu_spinuntil_time(cputag_get_cpu(machine, "maincpu"), ATTOTIME_IN_NSEC(length * 1000 / 3500));
708	706
709	707	for (count = 0;count<(length>>1);count++)
710	708	{
r4679	r4680
2043	2041	if (((megadrive_io_data_regs[portnum]&0x40)==0x00) && ((data&0x40) == 0x40))
2044	2042	{
2045	2043	io_stage[portnum]++;
2046		timer_adjust_oneshot(io_timeout[portnum], cpu_clocks_to_attotime(machine->cpu[0],8192), 0);
	2044	timer_adjust_oneshot(io_timeout[portnum], cputag_clocks_to_attotime(machine, "maincpu", 8192), 0);
2047	2045	}
2048	2046
2049	2047	}
r4679	r4680
2126	2124
2127	2125
2128	2126
2129		static ADDRESS_MAP_START( megadriv_readmem, ADDRESS_SPACE_PROGRAM, 16 )
2130		AM_RANGE(0x000000 , 0x3fffff) AM_READ(SMH_ROM)
	2127	static ADDRESS_MAP_START( megadriv_map, ADDRESS_SPACE_PROGRAM, 16 )
	2128	AM_RANGE(0x000000 , 0x3fffff) AM_ROM
2131	2129	/*      (0x000000 - 0x3fffff) == GAME ROM (4Meg Max, Some games have special banking too) */
2132	2130
2133		AM_RANGE(0xa00000 , 0xa01fff) AM_READ(megadriv_68k_read_z80_ram)
2134		AM_RANGE(0xa04000 , 0xa04003) AM_DEVREAD8("ym", megadriv_68k_YM2612_read, 0xffff)
	2131	AM_RANGE(0xa00000 , 0xa01fff) AM_READWRITE(megadriv_68k_read_z80_ram,megadriv_68k_write_z80_ram)
	2132	AM_RANGE(0xa02000 , 0xa03fff) AM_WRITE(megadriv_68k_write_z80_ram)
	2133	AM_RANGE(0xa04000 , 0xa04003) AM_DEVREADWRITE8("ym", megadriv_68k_YM2612_read,megadriv_68k_YM2612_write, 0xffff)
2135	2134
2136		AM_RANGE(0xa10000 , 0xa1001f) AM_READ(megadriv_68k_io_read)
	2135	AM_RANGE(0xa06000 , 0xa06001) AM_WRITE(megadriv_68k_z80_bank_write)
2137	2136
2138		AM_RANGE(0xa11100 , 0xa11101) AM_READ(megadriv_68k_check_z80_bus)
	2137	AM_RANGE(0xa10000 , 0xa1001f) AM_READWRITE(megadriv_68k_io_read,megadriv_68k_io_write)
2139	2138
2140		AM_RANGE(0xc00000 , 0xc0001f) AM_READ(megadriv_vdp_r)
2141		AM_RANGE(0xd00000 , 0xd0001f) AM_READ(megadriv_vdp_r) // the earth defend
	2139	AM_RANGE(0xa11100 , 0xa11101) AM_READWRITE(megadriv_68k_check_z80_bus,megadriv_68k_req_z80_bus)
	2140	AM_RANGE(0xa11200 , 0xa11201) AM_WRITE(megadriv_68k_req_z80_reset)
2142	2141
2143	2142	/* these are fake - remove allocs in VIDEO_START to use these to view ram instead */
2144		//  AM_RANGE(0xb00000 , 0xb0ffff) AM_READ(SMH_RAM) AM_BASE(&megadrive_vdp_vram)
2145		//  AM_RANGE(0xb10000 , 0xb1007f) AM_READ(SMH_RAM) AM_BASE(&megadrive_vdp_vsram)
2146		//  AM_RANGE(0xb10100 , 0xb1017f) AM_READ(SMH_RAM) AM_BASE(&megadrive_vdp_cram)
	2143	//  AM_RANGE(0xb00000 , 0xb0ffff) AM_RAM AM_BASE(&megadrive_vdp_vram)
	2144	//  AM_RANGE(0xb10000 , 0xb1007f) AM_RAM AM_BASE(&megadrive_vdp_vsram)
	2145	//  AM_RANGE(0xb10100 , 0xb1017f) AM_RAM AM_BASE(&megadrive_vdp_cram)
2147	2146
	2147	AM_RANGE(0xc00000 , 0xc0001f) AM_READWRITE(megadriv_vdp_r,megadriv_vdp_w)
	2148	AM_RANGE(0xd00000 , 0xd0001f) AM_READWRITE(megadriv_vdp_r,megadriv_vdp_w) // the earth defend
2148	2149
2149
2150		AM_RANGE(0xe00000 , 0xe0ffff) AM_READ(SMH_RAM) AM_MIRROR(0x1f0000)
	2150	AM_RANGE(0xe00000 , 0xe0ffff) AM_RAM AM_MIRROR(0x1f0000) AM_BASE(&megadrive_ram)
2151	2151	//  AM_RANGE(0xff0000 , 0xffffff) AM_READ(SMH_RAM)
2152	2152	/*       0xe00000 - 0xffffff) == MAIN RAM (64kb, Mirrored, most games use ff0000 - ffffff) */
2153
2154	2153	ADDRESS_MAP_END
2155	2154
2156		static ADDRESS_MAP_START( megadriv_writemem, ADDRESS_SPACE_PROGRAM, 16 )
2157		AM_RANGE(0x000000 , 0x3fffff) AM_WRITE(SMH_ROM)
2158	2155
2159		AM_RANGE(0xa00000 , 0xa01fff) AM_WRITE(megadriv_68k_write_z80_ram)
2160		AM_RANGE(0xa02000 , 0xa03fff) AM_WRITE(megadriv_68k_write_z80_ram)
2161		AM_RANGE(0xa04000 , 0xa04003) AM_DEVWRITE8("ym", megadriv_68k_YM2612_write, 0xffff)
2162
2163		AM_RANGE(0xa06000 , 0xa06001) AM_WRITE(megadriv_68k_z80_bank_write)
2164
2165		AM_RANGE(0xa10000 , 0xa1001f) AM_WRITE(megadriv_68k_io_write)
2166
2167		AM_RANGE(0xa11100 , 0xa11101) AM_WRITE(megadriv_68k_req_z80_bus)
2168		AM_RANGE(0xa11200 , 0xa11201) AM_WRITE(megadriv_68k_req_z80_reset)
2169
2170		AM_RANGE(0xc00000 , 0xc0001f) AM_WRITE(megadriv_vdp_w)
2171		AM_RANGE(0xd00000 , 0xd0001f) AM_WRITE(megadriv_vdp_w) // the earth defend
2172
2173		AM_RANGE(0xe00000 , 0xe0ffff) AM_WRITE(SMH_RAM) AM_MIRROR(0x1f0000) AM_BASE(&megadrive_ram)
2174		ADDRESS_MAP_END
2175
2176	2156	/* z80 sounds/sub CPU */
2177	2157
2178	2158
r4679	r4680
2270	2250	if (data & 0x0100)
2271	2251	{
2272	2252	//logerror("%06x: 68000 request z80 Bus (byte MSB access) %04x %04x\n", cpu_get_pc(space->cpu),data,mem_mask);
2273		genz80.z80_has_bus=0;
2274		cpu_suspend( space->machine->cpu[genz80.z80_cpunum], SUSPEND_REASON_HALT, 1 );
	2253	genz80.z80_has_bus = 0;
	2254	cputag_suspend( space->machine, "genesis_snd_z80", SUSPEND_REASON_HALT, 1 );
2275	2255	}
2276	2256	else
2277	2257	{
2278	2258	//logerror("%06x: 68000 return z80 Bus (byte MSB access) %04x %04x\n", cpu_get_pc(space->cpu),data,mem_mask);
2279		genz80.z80_has_bus=1;
2280		cpu_resume( space->machine->cpu[genz80.z80_cpunum], SUSPEND_REASON_HALT );
	2259	genz80.z80_has_bus = 1;
	2260	cputag_resume( space->machine, "genesis_snd_z80", SUSPEND_REASON_HALT );
2281	2261	}
2282	2262	}
2283	2263	else if (!ACCESSING_BITS_8_15) // is this valid?
r4679	r4680
2285	2265	if (data & 0x0001)
2286	2266	{
2287	2267	//logerror("%06x: 68000 request z80 Bus (byte LSB access) %04x %04x\n", cpu_get_pc(space->cpu),data,mem_mask);
2288		genz80.z80_has_bus=0;
2289		cpu_suspend( space->machine->cpu[genz80.z80_cpunum], SUSPEND_REASON_HALT, 1 );
	2268	genz80.z80_has_bus = 0;
	2269	cputag_suspend( space->machine, "genesis_snd_z80", SUSPEND_REASON_HALT, 1 );
2290	2270	}
2291	2271	else
2292	2272	{
2293	2273	//logerror("%06x: 68000 return z80 Bus (byte LSB access) %04x %04x\n", cpu_get_pc(space->cpu),data,mem_mask);
2294		genz80.z80_has_bus=1;
2295		cpu_resume( space->machine->cpu[genz80.z80_cpunum], SUSPEND_REASON_HALT );
	2274	genz80.z80_has_bus = 1;
	2275	cputag_resume( space->machine, "genesis_snd_z80", SUSPEND_REASON_HALT );
2296	2276	}
2297	2277	}
2298	2278	else // word access
r4679	r4680
2300	2280	if (data & 0x0100)
2301	2281	{
2302	2282	//logerror("%06x: 68000 request z80 Bus (word access) %04x %04x\n", cpu_get_pc(space->cpu),data,mem_mask);
2303		genz80.z80_has_bus=0;
2304		cpu_suspend( space->machine->cpu[genz80.z80_cpunum], SUSPEND_REASON_HALT, 1 );
	2283	genz80.z80_has_bus = 0;
	2284	cputag_suspend( space->machine, "genesis_snd_z80", SUSPEND_REASON_HALT, 1 );
2305	2285	}
2306	2286	else
2307	2287	{
2308	2288	//logerror("%06x: 68000 return z80 Bus (byte LSB access) %04x %04x\n", cpu_get_pc(space->cpu),data,mem_mask);
2309		genz80.z80_has_bus=1;
2310		cpu_resume( space->machine->cpu[genz80.z80_cpunum], SUSPEND_REASON_HALT );
	2289	genz80.z80_has_bus = 1;
	2290	cputag_resume( space->machine, "genesis_snd_z80", SUSPEND_REASON_HALT );
2311	2291	}
2312	2292	}
2313	2293	}
r4679	r4680
2319	2299	if (data & 0x0100)
2320	2300	{
2321	2301	//logerror("%06x: 68000 clear z80 reset (byte MSB access) %04x %04x\n", cpu_get_pc(space->cpu),data,mem_mask);
2322		genz80.z80_is_reset=0;
	2302	genz80.z80_is_reset = 0;
2323	2303	if ( genz80.z80_has_bus )
2324		cpu_resume( space->machine->cpu[genz80.z80_cpunum], SUSPEND_REASON_HALT );
	2304	cputag_resume( space->machine, "genesis_snd_z80", SUSPEND_REASON_HALT );
2325	2305	}
2326	2306	else
2327	2307	{
2328	2308	//logerror("%06x: 68000 start z80 reset (byte MSB access) %04x %04x\n", cpu_get_pc(space->cpu),data,mem_mask);
2329		genz80.z80_is_reset=1;
2330		device_reset( space->machine->cpu[genz80.z80_cpunum] );
2331		cpu_suspend( space->machine->cpu[genz80.z80_cpunum], SUSPEND_REASON_HALT, 1 );
	2309	genz80.z80_is_reset = 1;
	2310	device_reset( cputag_get_cpu(space->machine, "genesis_snd_z80") );
	2311	cputag_suspend( space->machine, "genesis_snd_z80", SUSPEND_REASON_HALT, 1 );
2332	2312	devtag_reset(space->machine, "ym");
2333	2313	}
2334	2314	}
r4679	r4680
2337	2317	if (data & 0x0001)
2338	2318	{
2339	2319	//logerror("%06x: 68000 clear z80 reset (byte LSB access) %04x %04x\n", cpu_get_pc(space->cpu),data,mem_mask);
2340		genz80.z80_is_reset=0;
	2320	genz80.z80_is_reset = 0;
2341	2321	if ( genz80.z80_has_bus )
2342		cpu_resume( space->machine->cpu[genz80.z80_cpunum], SUSPEND_REASON_HALT );
	2322	cputag_resume( space->machine, "genesis_snd_z80", SUSPEND_REASON_HALT );
2343	2323	}
2344	2324	else
2345	2325	{
2346	2326	//logerror("%06x: 68000 start z80 reset (byte LSB access) %04x %04x\n", cpu_get_pc(space->cpu),data,mem_mask);
2347		genz80.z80_is_reset=1;
2348		device_reset( space->machine->cpu[genz80.z80_cpunum] );
2349		cpu_suspend( space->machine->cpu[genz80.z80_cpunum], SUSPEND_REASON_HALT, 1 );
	2327	genz80.z80_is_reset = 1;
	2328	device_reset( cputag_get_cpu(space->machine, "genesis_snd_z80") );
	2329	cputag_suspend( space->machine, "genesis_snd_z80", SUSPEND_REASON_HALT, 1 );
2350	2330	devtag_reset(space->machine, "ym");
2351	2331
2352	2332	}
r4679	r4680
2356	2336	if (data & 0x0100)
2357	2337	{
2358	2338	//logerror("%06x: 68000 clear z80 reset (word access) %04x %04x\n", cpu_get_pc(space->cpu),data,mem_mask);
2359		genz80.z80_is_reset=0;
	2339	genz80.z80_is_reset = 0;
2360	2340	if ( genz80.z80_has_bus )
2361		cpu_resume( space->machine->cpu[genz80.z80_cpunum], SUSPEND_REASON_HALT );
	2341	cputag_resume( space->machine, "genesis_snd_z80", SUSPEND_REASON_HALT );
2362	2342	}
2363	2343	else
2364	2344	{
2365	2345	//logerror("%06x: 68000 start z80 reset (byte LSB access) %04x %04x\n", cpu_get_pc(space->cpu),data,mem_mask);
2366		genz80.z80_is_reset=1;
2367		device_reset( space->machine->cpu[genz80.z80_cpunum] );
2368		cpu_suspend( space->machine->cpu[genz80.z80_cpunum], SUSPEND_REASON_HALT, 1 );
	2346	genz80.z80_is_reset = 1;
	2347	device_reset( cputag_get_cpu(space->machine, "genesis_snd_z80") );
	2348	cputag_suspend( space->machine, "genesis_snd_z80", SUSPEND_REASON_HALT, 1 );
2369	2349	devtag_reset(space->machine, "ym");
2370	2350	}
2371	2351	}
r4679	r4680
2476	2456	return 0xff;
2477	2457	}
2478	2458
2479		static ADDRESS_MAP_START( z80_portmap, ADDRESS_SPACE_IO, 8 )
2480		ADDRESS_MAP_GLOBAL_MASK(0xff)
2481		AM_RANGE(0x0000 , 0xff) AM_NOP
2482		ADDRESS_MAP_END
	2459	static ADDRESS_MAP_START( megadriv_z80_map, ADDRESS_SPACE_PROGRAM, 8 )
	2460	AM_RANGE(0x0000 , 0x1fff) AM_RAMBANK(1) AM_MIRROR(0x2000) // RAM can be accessed by the 68k
	2461	AM_RANGE(0x4000 , 0x4003) AM_DEVREADWRITE("ym", ym2612_r,ym2612_w)
2483	2462
2484		static ADDRESS_MAP_START( z80_readmem, ADDRESS_SPACE_PROGRAM, 8 )
	2463	AM_RANGE(0x6000 , 0x6000) AM_WRITE(megadriv_z80_z80_bank_w)
	2464	AM_RANGE(0x6001 , 0x6001) AM_WRITE(megadriv_z80_z80_bank_w) // wacky races uses this address
2485	2465
2486		AM_RANGE(0x0000 , 0x1fff) AM_READ(SMH_BANK1) AM_MIRROR(0x2000) // RAM can be accessed by the 68k
2487		AM_RANGE(0x4000 , 0x4003) AM_DEVREAD("ym", ym2612_r)
2488
2489	2466	AM_RANGE(0x6100 , 0x7eff) AM_READ(megadriv_z80_unmapped_read)
2490	2467
2491		AM_RANGE(0x7f00 , 0x7fff) AM_READ(megadriv_z80_vdp_read)
	2468	AM_RANGE(0x7f00 , 0x7fff) AM_READWRITE(megadriv_z80_vdp_read,megadriv_z80_vdp_write)
2492	2469
2493		AM_RANGE(0x8000 , 0xffff) AM_READ(z80_read_68k_banked_data) // The Z80 can read the 68k address space this way
	2470	AM_RANGE(0x8000 , 0xffff) AM_READWRITE(z80_read_68k_banked_data,z80_write_68k_banked_data) // The Z80 can read the 68k address space this way
2494	2471	ADDRESS_MAP_END
2495	2472
2496		static ADDRESS_MAP_START( z80_writemem, ADDRESS_SPACE_PROGRAM, 8 )
2497		AM_RANGE(0x0000 , 0x1fff) AM_WRITE(SMH_BANK1) AM_MIRROR(0x2000)
2498		AM_RANGE(0x4000 , 0x4003) AM_DEVWRITE("ym", ym2612_w)
2499
2500		AM_RANGE(0x7f00 , 0x7fff) AM_WRITE(megadriv_z80_vdp_write)
2501
2502		AM_RANGE(0x6000 , 0x6000) AM_WRITE(megadriv_z80_z80_bank_w)
2503		AM_RANGE(0x6001 , 0x6001) AM_WRITE(megadriv_z80_z80_bank_w) // wacky races uses this address
2504
2505		AM_RANGE(0x8000 , 0xffff) AM_WRITE(z80_write_68k_banked_data)
	2473	static ADDRESS_MAP_START( megadriv_z80_io_map, ADDRESS_SPACE_IO, 8 )
	2474	ADDRESS_MAP_GLOBAL_MASK(0xff)
	2475	AM_RANGE(0x0000 , 0xff) AM_NOP
2506	2476	ADDRESS_MAP_END
2507	2477
2508	2478	/****************************************** 32X related ******************************************/
r4679	r4680
2687	2657	if (data & 0x01)
2688	2658	{
2689	2659	_32x_adapter_enabled = 1;
2690		memory_install_readwrite16_handler(space, 0x0880000, 0x08fffff, 0, 0, SMH_BANK11, SMH_BANK11); // 'fixed' 512kb rom bank
	2660	memory_install_readwrite16_handler(space, 0x0880000, 0x08fffff, 0, 0, (read16_space_func)SMH_BANK(11), (write16_space_func)SMH_BANK(11)); // 'fixed' 512kb rom bank
2691	2661	memory_set_bankptr(space->machine,  11, memory_region(space->machine, "gamecart") );
2692	2662
2693		memory_install_readwrite16_handler(space, 0x0900000, 0x09fffff, 0, 0, SMH_BANK12, SMH_BANK12); // 'bankable' 1024kb rom bank
	2663	memory_install_readwrite16_handler(space, 0x0900000, 0x09fffff, 0, 0, (read16_space_func)SMH_BANK(12), (write16_space_func)SMH_BANK(12)); // 'bankable' 1024kb rom bank
2694	2664	memory_set_bankptr(space->machine,  12, memory_region(space->machine, "gamecart") );
2695	2665
2696		memory_install_readwrite16_handler(space, 0x0000000, 0x03fffff, 0, 0, SMH_BANK10, SMH_BANK10);
	2666	memory_install_readwrite16_handler(space, 0x0000000, 0x03fffff, 0, 0, (read16_space_func)SMH_BANK(10), (write16_space_func)SMH_BANK(10));
2697	2667	memory_set_bankptr(space->machine,  10, memory_region(space->machine, "32x_68k_bios") );
2698	2668
2699	2669	memory_install_readwrite16_handler(space, 0x0a15180, 0x0a15181, 0, 0, _32x_68k_a15180_r, _32x_68k_a15180_w); // mode control regs
r4679	r4680
2716	2686	{
2717	2687	_32x_adapter_enabled = 0;
2718	2688
2719		memory_install_readwrite16_handler(space, 0x0000000, 0x03fffff, 0, 0, SMH_BANK10, SMH_BANK10);
	2689	memory_install_readwrite16_handler(space, 0x0000000, 0x03fffff, 0, 0, (read16_space_func)SMH_BANK(10), (write16_space_func)SMH_BANK(10));
2720	2690	memory_set_bankptr(space->machine,  10, memory_region(space->machine, "gamecart") );
2721	2691
2722	2692
r4679	r4680
3813	3783	}
3814	3784
3815	3785	static ADDRESS_MAP_START( svp_ssp_map, ADDRESS_SPACE_PROGRAM, 16 )
3816		AM_RANGE(0x0000 , 0x03ff) AM_READ(SMH_BANK3)
3817		AM_RANGE(0x0400 , 0xffff) AM_READ(SMH_BANK4)
	3786	AM_RANGE(0x0000 , 0x03ff) AM_ROMBANK(3)
	3787	AM_RANGE(0x0400 , 0xffff) AM_ROMBANK(4)
3818	3788	ADDRESS_MAP_END
3819	3789
3820	3790	static ADDRESS_MAP_START( svp_ext_map, ADDRESS_SPACE_IO, 16 )
r4679	r4680
3881	3851	memset(&svp, 0, sizeof(svp));
3882	3852
3883	3853	/* SVP stuff */
3884		svp.dram = auto_malloc(0x20000);
3885		memory_install_readwrite16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x300000, 0x31ffff, 0, 0, SMH_BANK2, SMH_BANK2);
	3854	svp.dram = auto_alloc_array(machine, UINT8, 0x20000);
	3855	memory_install_readwrite16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x300000, 0x31ffff, 0, 0, (read16_space_func)SMH_BANK(2), (write16_space_func)SMH_BANK(2));
3886	3856	memory_set_bankptr(machine,  2, svp.dram );
3887		memory_install_readwrite16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xa15000, 0xa150ff, 0, 0, svp_68k_io_r, svp_68k_io_w);
	3857	memory_install_readwrite16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xa15000, 0xa150ff, 0, 0, svp_68k_io_r, svp_68k_io_w);
3888	3858	// "cell arrange" 1 and 2
3889		memory_install_read16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x390000, 0x39ffff, 0, 0, svp_68k_cell1_r);
3890		memory_install_read16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x3a0000, 0x3affff, 0, 0, svp_68k_cell2_r);
	3859	memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x390000, 0x39ffff, 0, 0, svp_68k_cell1_r);
	3860	memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x3a0000, 0x3affff, 0, 0, svp_68k_cell2_r);
3891	3861
3892		memory_install_read16_handler(cpu_get_address_space(machine->cpu[2], ADDRESS_SPACE_PROGRAM), 0x438, 0x438, 0, 0, svp_speedup_r);
	3862	memory_install_read16_handler(cputag_get_address_space(machine, "svp", ADDRESS_SPACE_PROGRAM), 0x438, 0x438, 0, 0, svp_speedup_r);
3893	3863
3894		svp.iram = auto_malloc(0x800);
	3864	svp.iram = auto_alloc_array(machine, UINT8, 0x800);
3895	3865	memory_set_bankptr(machine,  3, svp.iram );
3896	3866	/* SVP ROM just shares m68k region.. */
3897	3867	ROM = memory_region(machine, "maincpu");
r4679	r4680
3942	3912
3943	3913	render_bitmap = video_screen_auto_bitmap_alloc(machine->primary_screen);
3944	3914
3945		megadrive_vdp_vram  = auto_malloc(0x10000);
3946		megadrive_vdp_cram  = auto_malloc(0x80);
3947		megadrive_vdp_vsram = auto_malloc(0x80);
3948		megadrive_vdp_internal_sprite_attribute_table = auto_malloc(0x400);
	3915	megadrive_vdp_vram  = auto_alloc_array(machine, UINT16, 0x10000/2);
	3916	megadrive_vdp_cram  = auto_alloc_array(machine, UINT16, 0x80/2);
	3917	megadrive_vdp_vsram = auto_alloc_array(machine, UINT16, 0x80/2);
	3918	megadrive_vdp_internal_sprite_attribute_table = auto_alloc_array(machine, UINT16, 0x400/2);
3949	3919
3950	3920	for (x=0;x<0x20;x++)
3951	3921	megadrive_vdp_register[x]=0;
r4679	r4680
3960	3930
3961	3931	megadrive_max_hposition = 480;
3962	3932
3963		sprite_renderline = auto_malloc(1024);
3964		highpri_renderline = auto_malloc(320);
3965		video_renderline = auto_malloc(320*4);
	3933	sprite_renderline = auto_alloc_array(machine, UINT8, 1024);
	3934	highpri_renderline = auto_alloc_array(machine, UINT8, 320);
	3935	video_renderline = auto_alloc_array(machine, UINT32, 320);
3966	3936
3967		megadrive_vdp_palette_lookup = auto_malloc(0x40*2);
3968		megadrive_vdp_palette_lookup_sprite = auto_malloc(0x40*2);
	3937	megadrive_vdp_palette_lookup = auto_alloc_array(machine, UINT16, 0x40);
	3938	megadrive_vdp_palette_lookup_sprite = auto_alloc_array(machine, UINT16, 0x40);
3969	3939
3970		megadrive_vdp_palette_lookup_shadow = auto_malloc(0x40*2);
3971		megadrive_vdp_palette_lookup_highlight = auto_malloc(0x40*2);
	3940	megadrive_vdp_palette_lookup_shadow = auto_alloc_array(machine, UINT16, 0x40);
	3941	megadrive_vdp_palette_lookup_highlight = auto_alloc_array(machine, UINT16, 0x40);
3972	3942
3973	3943	memset(megadrive_vdp_palette_lookup,0x00,0x40*2);
3974	3944	memset(megadrive_vdp_palette_lookup_sprite,0x00,0x40*2);
r4679	r4680
3997	3967	/* reference */
3998	3968
3999	3969	//  time_elapsed_since_crap = timer_timeelapsed(frame_timer);
4000		//  xxx = cpu_attotime_to_clocks(screen->machine->cpu[0],time_elapsed_since_crap);
	3970	//  xxx = cputag_attotime_to_clocks(screen->machine, "maincpu", time_elapsed_since_crap);
4001	3971	//  mame_printf_debug("update cycles %d, %08x %08x\n",xxx, (UINT32)(time_elapsed_since_crap.attoseconds>>32),(UINT32)(time_elapsed_since_crap.attoseconds&0xffffffff));
4002	3972
4003	3973	return 0;
r4679	r4680
5917	5887
5918	5888
5919	5889
5920		if (genesis_has_z80)
5921		{
5922		if (genesis_scanline_counter==megadrive_z80irq_scanline)
	5890	if (cputag_get_cpu(machine, "genesis_snd_z80") != NULL)
5923	5891	{
5924		if ((genz80.z80_has_bus==1) && (genz80.z80_is_reset==0)) cpu_set_input_line(machine->cpu[1],0,HOLD_LINE);
	5892	if (genesis_scanline_counter == megadrive_z80irq_scanline)
	5893	{
	5894	if ((genz80.z80_has_bus == 1) && (genz80.z80_is_reset == 0))
	5895	cputag_set_input_line(machine, "genesis_snd_z80", 0, HOLD_LINE);
	5896	}
	5897	if (genesis_scanline_counter == megadrive_z80irq_scanline + 1)
	5898	{
	5899	cputag_set_input_line(machine, "genesis_snd_z80", 0, CLEAR_LINE);
	5900	}
5925	5901	}
5926		if (genesis_scanline_counter==megadrive_z80irq_scanline+1)
5927		{
5928		cpu_set_input_line(machine->cpu[1],0,CLEAR_LINE);
5929		}
5930		}
5931	5902
5932	5903	}
5933	5904	else /* pretend we're still on the same scanline to compensate for rounding errors */
5934	5905	{
5935		genesis_scanline_counter = megadrive_total_scanlines-1;
	5906	genesis_scanline_counter = megadrive_total_scanlines - 1;
5936	5907	}
5937	5908
5938	5909	}
r4679	r4680
5943	5914
5944	5915	{
5945	5916	//      megadrive_irq6_pending = 1;
5946		if (MEGADRIVE_REG01_IRQ6_ENABLE || genesis_always_irq6) cpu_set_input_line(machine->cpu[0],6,HOLD_LINE);
	5917	if (MEGADRIVE_REG01_IRQ6_ENABLE || genesis_always_irq6)
	5918	cputag_set_input_line(machine, "maincpu", 6, HOLD_LINE);
5947	5919	}
5948	5920	}
5949	5921
5950	5922	static TIMER_CALLBACK( irq4_on_callback )
5951	5923	{
5952	5924	//mame_printf_debug("irq4 active on %d\n",genesis_scanline_counter);
5953		cpu_set_input_line(machine->cpu[0],4,HOLD_LINE);
	5925	cputag_set_input_line(machine, "maincpu", 4, HOLD_LINE);
5954	5926	}
5955	5927
5956	5928	/*****************************************************************************************/
r4679	r4680
5998	5970	break;
5999	5971	}
6000	5972
6001		if (genesis_has_z80)
	5973	if (cputag_get_cpu(machine, "genesis_snd_z80") != NULL)
6002	5974	{
6003	5975	genz80.z80_is_reset = 1;
6004		cpu_set_input_line(machine->cpu[genz80.z80_cpunum], INPUT_LINE_RESET, ASSERT_LINE);
	5976	cputag_set_input_line(machine, "genesis_snd_z80", INPUT_LINE_RESET, ASSERT_LINE);
6005	5977	genz80.z80_has_bus = 1;
6006		cpu_set_input_line(machine->cpu[genz80.z80_cpunum], INPUT_LINE_HALT, CLEAR_LINE);
	5978	cputag_set_input_line(machine, "genesis_snd_z80", INPUT_LINE_HALT, CLEAR_LINE);
6007	5979	genz80.z80_bank_addr = 0;
6008	5980	genesis_scanline_counter = -1;
6009	5981	}
r4679	r4680
6020	5992	irq4_on_timer = timer_alloc(machine, irq4_on_callback, NULL);
6021	5993
6022	5994	timer_adjust_oneshot(frame_timer, attotime_zero, 0);
6023		timer_adjust_oneshot(scanline_timer, attotime_zero, 0);
	5995	timer_adjust_oneshot(scanline_timer, attotime_zero, 0);
6024	5996
6025	5997	if (genesis_other_hacks)
6026	5998	{
6027	5999	//  set_refresh_rate(megadriv_framerate);
6028		cpu_set_clockscale(machine->cpu[0], 0.9950f); /* Fatal Rewind is very fussy... */
6029		//  cpu_set_clockscale(machine->cpu[0], 0.3800f); /* Fatal Rewind is very fussy... */
	6000	cpu_set_clockscale(cputag_get_cpu(machine, "maincpu"), 0.9950f); /* Fatal Rewind is very fussy... */
	6001	//  cpu_set_clockscale(cputag_get_cpu(machine, "maincpu"), 0.3800f); /* Fatal Rewind is very fussy... */
6030	6002
6031	6003	memset(megadrive_ram,0x00,0x10000);
6032	6004	}
r4679	r4680
6085	6057	megadrive_sprite_collision=0;//? when to reset this ..
6086	6058	megadrive_imode = MEGADRIVE_REG0C_INTERLEAVE; // can't change mid-frame..
6087	6059	megadrive_imode_odd_frame^=1;
6088		//  cpu_set_input_line(machine->cpu[1],0,CLEAR_LINE); // if the z80 interrupt hasn't happened by now, clear it..
	6060	//  cputag_set_input_line(machine, "genesis_snd_z80", 0, CLEAR_LINE); // if the z80 interrupt hasn't happened by now, clear it..
6089	6061
6090		if (MD_RESET_BUTTON(machine))  cpu_set_input_line(machine->cpu[0], INPUT_LINE_RESET, PULSE_LINE);
	6062	if (MD_RESET_BUTTON(machine))  cputag_set_input_line(machine, "maincpu", INPUT_LINE_RESET, PULSE_LINE);
6091	6063
6092	6064	/*
6093	6065	int megadrive_total_scanlines = 262;
r4679	r4680
6171	6143	frametime = ATTOSECONDS_PER_SECOND/megadriv_framerate;
6172	6144
6173	6145	time_elapsed_since_crap = timer_timeelapsed(frame_timer);
6174		xxx = cpu_attotime_to_clocks(machine->cpu[0],time_elapsed_since_crap);
	6146	xxx = cputag_attotime_to_clocks(machine, "maincpu",time_elapsed_since_crap);
6175	6147	//mame_printf_debug("---------- cycles %d, %08x %08x\n",xxx, (UINT32)(time_elapsed_since_crap.attoseconds>>32),(UINT32)(time_elapsed_since_crap.attoseconds&0xffffffff));
6176	6148	//mame_printf_debug("---------- framet %d, %08x %08x\n",xxx, (UINT32)(frametime>>32),(UINT32)(frametime&0xffffffff));
6177	6149	timer_adjust_oneshot(frame_timer,  attotime_zero, 0);
r4679	r4680
6212	6184
6213	6185	MACHINE_DRIVER_START( megadriv )
6214	6186	MDRV_CPU_ADD("maincpu", M68000, MASTER_CLOCK_NTSC / 7) /* 7.67 MHz */
6215		MDRV_CPU_PROGRAM_MAP(megadriv_readmem,megadriv_writemem)
	6187	MDRV_CPU_PROGRAM_MAP(megadriv_map,0)
6216	6188	/* IRQs are handled via the timers */
6217	6189
6218	6190	MDRV_CPU_ADD("genesis_snd_z80", Z80, MASTER_CLOCK_NTSC / 15) /* 3.58 MHz */
6219		MDRV_CPU_PROGRAM_MAP(z80_readmem,z80_writemem)
6220		MDRV_CPU_IO_MAP(z80_portmap,0)
	6191	MDRV_CPU_PROGRAM_MAP(megadriv_z80_map,0)
	6192	MDRV_CPU_IO_MAP(megadriv_z80_io_map,0)
6221	6193	/* IRQ handled via the timers */
6222	6194
6223	6195	MDRV_MACHINE_RESET(megadriv)
r4679	r4680
6256	6228
6257	6229	MACHINE_DRIVER_START( megadpal )
6258	6230	MDRV_CPU_ADD("maincpu", M68000, MASTER_CLOCK_PAL / 7) /* 7.67 MHz */
6259		MDRV_CPU_PROGRAM_MAP(megadriv_readmem,megadriv_writemem)
	6231	MDRV_CPU_PROGRAM_MAP(megadriv_map,0)
6260	6232	/* IRQs are handled via the timers */
6261	6233
6262	6234	MDRV_CPU_ADD("genesis_snd_z80", Z80, MASTER_CLOCK_PAL / 15) /* 3.58 MHz */
6263		MDRV_CPU_PROGRAM_MAP(z80_readmem,z80_writemem)
6264		MDRV_CPU_IO_MAP(z80_portmap,0)
	6235	MDRV_CPU_PROGRAM_MAP(megadriv_z80_map,0)
	6236	MDRV_CPU_IO_MAP(megadriv_z80_io_map,0)
6265	6237	/* IRQ handled via the timers */
6266	6238
6267	6239	MDRV_MACHINE_RESET(megadriv)
r4679	r4680
6378	6350	if (_genesis_snd_z80_cpu != NULL)
6379	6351	{
6380	6352	printf("GENESIS Sound Z80 cpu found %d\n", cpu_get_index(_genesis_snd_z80_cpu) );
6381		genesis_has_z80 = 1;
	6353
	6354	genz80.z80_prgram = auto_alloc_array(machine, UINT8, 0x2000);
	6355	memory_set_bankptr(machine,  1, genz80.z80_prgram );
6382	6356	}
6383		else
6384		{
6385		genesis_has_z80 = 0;
6386		}
6387	6357
6388	6358	/* Look to see if this system has the 32x Master SH2 */
6389	6359	_32x_master_cpu = cputag_get_cpu(machine, "32x_master_sh2");
r4679	r4680
6421	6391	}
6422	6392
6423	6393
6424		if (genesis_has_z80)
6425		{
6426		genz80.z80_cpunum = 1;
6427		genz80.z80_prgram = auto_malloc(0x2000);
6428		memory_set_bankptr(machine,  1, genz80.z80_prgram );
6429		}
6430
6431		cpu_set_irq_callback(machine->cpu[0], genesis_int_callback);
	6394	cpu_set_irq_callback(cputag_get_cpu(machine, "maincpu"), genesis_int_callback);
6432	6395	megadriv_backupram = NULL;
6433	6396	megadriv_backupram_length = 0;
6434	6397
6435	6398	vdp_get_word_from_68k_mem = vdp_get_word_from_68k_mem_default;
6436	6399
6437		device_set_info_fct(machine->cpu[0], CPUINFO_FCT_M68K_TAS_CALLBACK, (void *)megadriv_tas_callback);
	6400	m68k_set_tas_callback(cputag_get_cpu(machine, "maincpu"), megadriv_tas_callback);
6438	6401
6439	6402	if ((machine->gamedrv->ipt==ipt_megadri6) || (machine->gamedrv->ipt==ipt_ssf2ghw))
6440	6403	{
r4679	r4680
6558	6521	const device_config *ym = devtag_get_device(machine, "ym");
6559	6522
6560	6523	/* INIT THE PORTS *********************************************************************************************/
6561		memory_install_readwrite8_handler(cpu_get_address_space(machine->cpu[1], ADDRESS_SPACE_IO), 0x0000, 0xffff, 0, 0, z80_unmapped_port_r, z80_unmapped_port_w);
	6524	memory_install_readwrite8_handler(cputag_get_address_space(machine, "genesis_snd_z80", ADDRESS_SPACE_IO), 0x0000, 0xffff, 0, 0, z80_unmapped_port_r, z80_unmapped_port_w);
6562	6525
6563	6526	/* catch any addresses that don't get mapped */
6564		memory_install_readwrite8_handler(cpu_get_address_space(machine->cpu[1], ADDRESS_SPACE_PROGRAM), 0x0000, 0xffff, 0, 0, z80_unmapped_r, z80_unmapped_w);
	6527	memory_install_readwrite8_handler(cputag_get_address_space(machine, "genesis_snd_z80", ADDRESS_SPACE_PROGRAM), 0x0000, 0xffff, 0, 0, z80_unmapped_r, z80_unmapped_w);
6565	6528
6566	6529
6567		memory_install_readwrite8_handler(cpu_get_address_space(machine->cpu[1], ADDRESS_SPACE_PROGRAM), 0x0000, 0x1fff, 0, 0, SMH_BANK1, SMH_BANK1);
	6530	memory_install_readwrite8_handler(cputag_get_address_space(machine, "genesis_snd_z80", ADDRESS_SPACE_PROGRAM), 0x0000, 0x1fff, 0, 0, (read8_space_func)SMH_BANK(1), (write8_space_func)SMH_BANK(1));
6568	6531	memory_set_bankptr(machine,  1, genz80.z80_prgram );
6569	6532
6570		memory_install_readwrite8_handler(cpu_get_address_space(machine->cpu[1], ADDRESS_SPACE_PROGRAM), 0x0000, 0x1fff, 0, 0, SMH_BANK6, SMH_BANK6);
	6533	memory_install_readwrite8_handler(cputag_get_address_space(machine, "genesis_snd_z80", ADDRESS_SPACE_PROGRAM), 0x0000, 0x1fff, 0, 0, (read8_space_func)SMH_BANK(6), (write8_space_func)SMH_BANK(6));
6571	6534	memory_set_bankptr(machine,  6, genz80.z80_prgram );
6572	6535
6573	6536
6574	6537	// not allowed??
6575		//  memory_install_readwrite8_handler(cpu_get_address_space(machine->cpu[1], ADDRESS_SPACE_PROGRAM), 0x2000, 0x3fff, 0, 0, SMH_BANK1, SMH_BANK1);
	6538	//  memory_install_readwrite8_handler(cputag_get_address_space(machine, "genesis_snd_z80", ADDRESS_SPACE_PROGRAM), 0x2000, 0x3fff, 0, 0, (read8_space_func)SMH_BANK(1), (write8_space_func)SMH_BANK(1));
6576	6539
6577		memory_install_readwrite8_device_handler(cpu_get_address_space(machine->cpu[1], ADDRESS_SPACE_PROGRAM), ym, 0x4000, 0x4003, 0, 0, ym2612_r, ym2612_w);
6578		memory_install_write8_handler    (cpu_get_address_space(machine->cpu[1], ADDRESS_SPACE_PROGRAM), 0x6000, 0x6000, 0, 0, megadriv_z80_z80_bank_w);
6579		memory_install_write8_handler    (cpu_get_address_space(machine->cpu[1], ADDRESS_SPACE_PROGRAM), 0x6001, 0x6001, 0, 0, megadriv_z80_z80_bank_w);
6580		memory_install_read8_handler     (cpu_get_address_space(machine->cpu[1], ADDRESS_SPACE_PROGRAM), 0x6100, 0x7eff, 0, 0, megadriv_z80_unmapped_read);
6581		memory_install_readwrite8_handler(cpu_get_address_space(machine->cpu[1], ADDRESS_SPACE_PROGRAM), 0x7f00, 0x7fff, 0, 0, megadriv_z80_vdp_read, megadriv_z80_vdp_write);
6582		memory_install_readwrite8_handler(cpu_get_address_space(machine->cpu[1], ADDRESS_SPACE_PROGRAM), 0x8000, 0xffff, 0, 0, z80_read_68k_banked_data, z80_write_68k_banked_data);
	6540	memory_install_readwrite8_device_handler(cputag_get_address_space(machine, "genesis_snd_z80", ADDRESS_SPACE_PROGRAM), ym, 0x4000, 0x4003, 0, 0, ym2612_r, ym2612_w);
	6541	memory_install_write8_handler    (cputag_get_address_space(machine, "genesis_snd_z80", ADDRESS_SPACE_PROGRAM), 0x6000, 0x6000, 0, 0, megadriv_z80_z80_bank_w);
	6542	memory_install_write8_handler    (cputag_get_address_space(machine, "genesis_snd_z80", ADDRESS_SPACE_PROGRAM), 0x6001, 0x6001, 0, 0, megadriv_z80_z80_bank_w);
	6543	memory_install_read8_handler     (cputag_get_address_space(machine, "genesis_snd_z80", ADDRESS_SPACE_PROGRAM), 0x6100, 0x7eff, 0, 0, megadriv_z80_unmapped_read);
	6544	memory_install_readwrite8_handler(cputag_get_address_space(machine, "genesis_snd_z80", ADDRESS_SPACE_PROGRAM), 0x7f00, 0x7fff, 0, 0, megadriv_z80_vdp_read, megadriv_z80_vdp_write);
	6545	memory_install_readwrite8_handler(cputag_get_address_space(machine, "genesis_snd_z80", ADDRESS_SPACE_PROGRAM), 0x8000, 0xffff, 0, 0, z80_read_68k_banked_data, z80_write_68k_banked_data);
6583	6546	}
6584	6547
6585	6548	// these are tests for 'special case' hardware to make sure I don't break anything while rearranging things
r4679	r4680
6591	6554	{
6592	6555
6593	6556
6594		_32x_dram0 = auto_malloc(0x40000);
6595		_32x_dram1 = auto_malloc(0x40000);
	6557	_32x_dram0 = auto_alloc_array(machine, UINT16, 0x40000/2);
	6558	_32x_dram1 = auto_alloc_array(machine, UINT16, 0x40000/2);
6596	6559
6597	6560	memset(_32x_dram0, 0x00, 0x40000);
6598	6561	memset(_32x_dram1, 0x00, 0x40000);
6599	6562
6600		_32x_palette = auto_malloc(0x200);
6601		_32x_palette_lookup = auto_malloc(0x200);
	6563	_32x_palette = auto_alloc_array(machine, UINT16, 0x200/2);
	6564	_32x_palette_lookup = auto_alloc_array(machine, UINT16, 0x200/2);
6602	6565
6603	6566	memset(_32x_palette, 0x00, 0x200);
6604	6567	memset(_32x_palette_lookup, 0x00, 0x200);
r4679	r4680
6611	6574
6612	6575	if (_32x_adapter_enabled == 0)
6613	6576	{
6614		memory_install_readwrite16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x0000000, 0x03fffff, 0, 0, SMH_BANK10, SMH_BANK10);
	6577	memory_install_readwrite16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x0000000, 0x03fffff, 0, 0, (read16_space_func)SMH_BANK(10), (write16_space_func)SMH_BANK(10));
6615	6578	memory_set_bankptr(machine,  10, memory_region(machine, "gamecart") );
6616	6579	};
6617	6580
6618	6581
6619	6582	a15100_reg = 0x0000;
6620		memory_install_readwrite16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xa15100, 0xa15101, 0, 0, _32x_68k_a15100_r, _32x_68k_a15100_w); // framebuffer control regs
6621		memory_install_readwrite16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xa15102, 0xa15103, 0, 0, _32x_68k_a15102_r, _32x_68k_a15102_w); // send irq to sh2
6622		memory_install_readwrite16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xa15104, 0xa15105, 0, 0, _32x_68k_a15104_r, _32x_68k_a15104_w); // 68k BANK rom set
6623		memory_install_readwrite16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xa15106, 0xa15107, 0, 0, _32x_68k_a15106_r, _32x_68k_a15106_w); // dreq stuff
	6583	memory_install_readwrite16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xa15100, 0xa15101, 0, 0, _32x_68k_a15100_r, _32x_68k_a15100_w); // framebuffer control regs
	6584	memory_install_readwrite16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xa15102, 0xa15103, 0, 0, _32x_68k_a15102_r, _32x_68k_a15102_w); // send irq to sh2
	6585	memory_install_readwrite16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xa15104, 0xa15105, 0, 0, _32x_68k_a15104_r, _32x_68k_a15104_w); // 68k BANK rom set
	6586	memory_install_readwrite16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xa15106, 0xa15107, 0, 0, _32x_68k_a15106_r, _32x_68k_a15106_w); // dreq stuff
6624	6587
6625		memory_install_readwrite16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xa15120, 0xa1512f, 0, 0, _32x_68k_commsram_r, _32x_68k_commsram_w); // comms reg 0-7
	6588	memory_install_readwrite16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xa15120, 0xa1512f, 0, 0, _32x_68k_commsram_r, _32x_68k_commsram_w); // comms reg 0-7
6626	6589
6627		memory_install_read16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x0a130ec, 0x0a130ef, 0, 0, _32x_68k_MARS_r); // system ID
	6590	memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x0a130ec, 0x0a130ef, 0, 0, _32x_68k_MARS_r); // system ID
6628	6591
6629	6592
6630	6593
r4679	r4680
6650	6613	_32x_240mode = 0;
6651	6614
6652	6615	// checking if these help brutal, they don't.
6653		sh2drc_set_options(machine->cpu[2], SH2DRC_COMPATIBLE_OPTIONS);
6654		sh2drc_set_options(machine->cpu[3], SH2DRC_COMPATIBLE_OPTIONS);
	6616	sh2drc_set_options(cputag_get_cpu(machine, "32x_master_sh2"), SH2DRC_COMPATIBLE_OPTIONS);
	6617	sh2drc_set_options(cputag_get_cpu(machine, "32x_slave_sh2"), SH2DRC_COMPATIBLE_OPTIONS);
6655	6618
6656	6619	DRIVER_INIT_CALL(megadriv);
6657	6620	}

src/mame/drivers/itgambl2.c

r4679	r4680
1	1	/************************************************************************
2	2
	3
3	4	Italian Gambling games based on H8/3337 MCU + NEC D7759GC (sound).
4	5
5	6	Written by Roberto Fresca.
r4679	r4680
221	222	static MACHINE_RESET( itgambl2 )
222	223	{
223	224	/* stop the CPU, we have no code for it anyway */
224		cpu_set_input_line(machine->cpu[0], INPUT_LINE_HALT, ASSERT_LINE);
	225	cputag_set_input_line(machine, "maincpu", INPUT_LINE_HALT, ASSERT_LINE);
225	226	}
226	227
227	228	/* default 444 palette for debug purpose*/
r4679	r4680
691	692	ROM_LOAD( "0.bin", 0x00000, 0x20000, CRC(833c5be5) SHA1(89110cb52265ee5bfdf73c0af343b7ce2356e394) )
692	693	ROM_END
693	694
	695	/* Triple Star 2000
694	696
	697	CPU:
	698	1x HD64F3337YCP16 (main)(not dumped)
	699	2x NEC D7759GC (speech synthesizer)
	700	1x TDA2003 (sound)
	701	1x oscillator 16.000000
	702	1x oscillator 14.318180
	703
	704	ROMs:
	705	1x M27C1001 (0)
	706	4x M27C4001 (1,2,3,4)
	707
	708
	709	RAMs
	710	3x TC551001
	711
	712	PLDs
	713	2x ispLSI10032E-70LJ
	714	Note    1x 28x2 edge connector
	715	1x 14 legs connector
	716	1x RS232 connector
	717	1x trimmer (volume)
	718	1x trimmer (unknown)
	719	1x red LED
	720	2x 8x2 switches DIP
	721	1x battery 3.6V
	722	*/
	723
	724	ROM_START( trstar2k )
	725	ROM_REGION( 0x1000000, "maincpu", 0 ) /* all the program code is in here */
	726	ROM_LOAD( "trstar2k_hd64f3337ycp16.mcu", 0x00000, 0x4000, NO_DUMP )
	727
	728	ROM_REGION( 0x200000, "gfx1", 0 ) /* gfx seems 4bpp */
	729	ROM_LOAD( "ep1.bin", 0x000000, 0x80000, CRC(59394c87) SHA1(a8b5de197b474714a8e5a5c959b81cb78fc69291) )
	730	ROM_LOAD( "ep2.bin", 0x080000, 0x80000, CRC(80608870) SHA1(5af501e4bb9498d2b9b614cc98ec9f4c907f207d) )
	731	ROM_LOAD( "ep3.bin", 0x100000, 0x80000, CRC(cad4523f) SHA1(1a16f200622a8c9666beea2da2ec64bf7c9195a8) )
	732	ROM_LOAD( "ep4.bin", 0x180000, 0x80000, CRC(e488d31d) SHA1(e0a51abf1459a1c7205750b9cad28a63bbabed96) )
	733
	734	ROM_REGION( 0x20000, "upd", 0 ) /* NEC D7759GC samples */
	735	ROM_LOAD( "msg0.bin", 0x00000, 0x20000, CRC(b25e1c8a) SHA1(a211412c3354a9f1a9662445b4cc379dad27813b) )
	736	ROM_END
	737
	738	/* Super Star
	739
	740	(no readme)
	741
	742	*/
	743
	744	ROM_START( sstar )
	745	ROM_REGION( 0x1000000, "maincpu", 0 ) /* all the program code is in here */
	746	ROM_LOAD( "sstar_hd64f3337cp16.mcu", 0x00000, 0x4000, NO_DUMP )
	747
	748	ROM_REGION( 0x180000, "gfx1", 0 ) /* gfx seems 4bpp */
	749	ROM_LOAD( "sstar.ep1", 0x000000, 0x80000, CRC(e798295e) SHA1(ed9a0ceeaefccfb1bde5894548ba91d631055b69) ) //contains C-based strings?
	750	ROM_LOAD( "sstar.ep2", 0x080000, 0x80000, CRC(5e9fa33b) SHA1(5196723db69bf9f1df497f4d8f84ac1d9768736f) )
	751	ROM_LOAD( "sstar.ep3", 0x100000, 0x80000, CRC(67abc2a1) SHA1(877e233b2120281779a2480e8035a73df87e7240) )
	752
	753	ROM_REGION( 0x20000, "upd", 0 ) /* NEC D7759GC samples */
	754	ROM_LOAD( "sstar.msg0", 0x00000, 0x20000, CRC(04f44a53) SHA1(0b27d1fe1992d1769abec2078defc30896c36bcb) )
	755	ROM_END
	756
695	757	/*************************
696	758	*      Game Drivers      *
697	759	*************************/
698	760
699	761	/*    YEAR  NAME      PARENT  MACHINE   INPUT     INIT ROT    COMPANY    FULLNAME                          FLAGS  */
700		GAME( 1999, ntcash,   0,      itgambl2, itgambl2, 0,   ROT0, "Unknown", "NtCash",                          GAME_NOT_WORKING )
701		GAME( 1999, wizard,   0,      itgambl2, itgambl2, 0,   ROT0, "A.A.",    "Wizard (Ver 1.0)",                GAME_NOT_WORKING )
702		GAME( 2001, laser2k1, 0,      itgambl2, itgambl2, 0,   ROT0, "Unknown", "Laser 2001 (Ver 1.2)",            GAME_NOT_WORKING )
703		GAME( 2001, mdrink,   0,      itgambl2, itgambl2, 0,   ROT0, "Unknown", "Magic Drink (Ver 1.2)",           GAME_NOT_WORKING )
704		GAME( 2001, te0144,   0,      itgambl2, itgambl2, 0,   ROT0, "Unknown", "Unknown italian gambling game",   GAME_NOT_WORKING )
705		GAME( 200?, cmagica,  0,      itgambl2, itgambl2, 0,   ROT0, "Unknown", "Carta Magica (Ver 1.8)",          GAME_NOT_WORKING )
706		GAME( 200?, millsun,  0,      itgambl2, itgambl2, 0,   ROT0, "Unknown", "Millennium Sun",                  GAME_NOT_WORKING )
707		GAME( 200?, sspac2k1, 0,      itgambl2, itgambl2, 0,   ROT0, "Unknown", "Super Space 2001",                GAME_NOT_WORKING )
708		GAME( 200?, elvis,    0,      itgambl2, itgambl2, 0,   ROT0, "Unknown", "Elvis?",                          GAME_NOT_WORKING )
	762	GAME( 1999, ntcash,   0,      itgambl2, itgambl2, 0,   ROT0, "Unknown", "NtCash",                               GAME_NOT_WORKING )
	763	GAME( 1999, wizard,   0,      itgambl2, itgambl2, 0,   ROT0, "A.A.",    "Wizard (Ver 1.0)",                     GAME_NOT_WORKING )
	764	GAME( 200?, trstar2k, 0,      itgambl2, itgambl2, 0,   ROT0, "A.M.",    "Triple Star 2000",                     GAME_NOT_WORKING )
	765	GAME( 2001, laser2k1, 0,      itgambl2, itgambl2, 0,   ROT0, "Unknown", "Laser 2001 (Ver 1.2)",                 GAME_NOT_WORKING )
	766	GAME( 2001, mdrink,   0,      itgambl2, itgambl2, 0,   ROT0, "Unknown", "Magic Drink (Ver 1.2)",                GAME_NOT_WORKING )
	767	GAME( 2001, te0144,   0,      itgambl2, itgambl2, 0,   ROT0, "Unknown", "Puzzle Bobble (Italian Gambling Game)",GAME_NOT_WORKING )
	768	GAME( 200?, cmagica,  0,      itgambl2, itgambl2, 0,   ROT0, "Unknown", "Carta Magica (Ver 1.8)",               GAME_NOT_WORKING )
	769	GAME( 200?, millsun,  0,      itgambl2, itgambl2, 0,   ROT0, "Unknown", "Millennium Sun",                       GAME_NOT_WORKING )
	770	GAME( 200?, sspac2k1, 0,      itgambl2, itgambl2, 0,   ROT0, "Unknown", "Super Space 2001",                     GAME_NOT_WORKING )
	771	GAME( 200?, elvis,    0,      itgambl2, itgambl2, 0,   ROT0, "Unknown", "Elvis?",                               GAME_NOT_WORKING )
	772	GAME( 200?, sstar,    0,      itgambl2, itgambl2, 0,   ROT0, "Unknown", "Super Star",                           GAME_NOT_WORKING )

src/mame/drivers/itech32.c

r4679	r4680
426	426	if (xint != -1) xint_state = xint;
427	427	if (qint != -1) qint_state = qint;
428	428
429		if (is_drivedge) {
430		cpu_set_input_line(machine->cpu[0], 3, vint_state ? ASSERT_LINE : CLEAR_LINE);
431		cpu_set_input_line(machine->cpu[0], 4, xint_state ? ASSERT_LINE : CLEAR_LINE);
432		cpu_set_input_line(machine->cpu[0], 5, qint_state ? ASSERT_LINE : CLEAR_LINE);
433		} else {
434		cpu_set_input_line(machine->cpu[0], 1, vint_state ? ASSERT_LINE : CLEAR_LINE);
435		cpu_set_input_line(machine->cpu[0], 2, xint_state ? ASSERT_LINE : CLEAR_LINE);
436		cpu_set_input_line(machine->cpu[0], 3, qint_state ? ASSERT_LINE : CLEAR_LINE);
	429	if (is_drivedge)
	430	{
	431	cputag_set_input_line(machine, "maincpu", 3, vint_state ? ASSERT_LINE : CLEAR_LINE);
	432	cputag_set_input_line(machine, "maincpu", 4, xint_state ? ASSERT_LINE : CLEAR_LINE);
	433	cputag_set_input_line(machine, "maincpu", 5, qint_state ? ASSERT_LINE : CLEAR_LINE);
437	434	}
	435	else
	436	{
	437	cputag_set_input_line(machine, "maincpu", 1, vint_state ? ASSERT_LINE : CLEAR_LINE);
	438	cputag_set_input_line(machine, "maincpu", 2, xint_state ? ASSERT_LINE : CLEAR_LINE);
	439	cputag_set_input_line(machine, "maincpu", 3, qint_state ? ASSERT_LINE : CLEAR_LINE);
	440	}
438	441	}
439	442
440	443
r4679	r4680
475	478	{
476	479	MACHINE_RESET_CALL(itech32);
477	480
478		cpu_set_input_line(machine->cpu[2], INPUT_LINE_RESET, ASSERT_LINE);
479		cpu_set_input_line(machine->cpu[3], INPUT_LINE_RESET, ASSERT_LINE);
	481	cputag_set_input_line(machine, "dsp1", INPUT_LINE_RESET, ASSERT_LINE);
	482	cputag_set_input_line(machine, "dsp2", INPUT_LINE_RESET, ASSERT_LINE);
480	483	STOP_TMS_SPINNING(machine, 0);
481	484	STOP_TMS_SPINNING(machine, 1);
482	485	}
r4679	r4680
667	670	{
668	671	sound_data = param;
669	672	sound_int_state = 1;
670		cpu_set_input_line(machine->cpu[1], M6809_IRQ_LINE, ASSERT_LINE);
	673	cputag_set_input_line(machine, "soundcpu", M6809_IRQ_LINE, ASSERT_LINE);
671	674	}
672	675
673	676
r4679	r4680
693	696
694	697	static READ8_HANDLER( sound_data_r )
695	698	{
696		cpu_set_input_line(space->machine->cpu[1], M6809_IRQ_LINE, CLEAR_LINE);
	699	cputag_set_input_line(space->machine, "soundcpu", M6809_IRQ_LINE, CLEAR_LINE);
697	700	sound_int_state = 0;
698	701	return sound_data;
699	702	}
r4679	r4680
720	723
721	724	static WRITE8_DEVICE_HANDLER( drivedge_portb_out )
722	725	{
723		const address_space *space = cpu_get_address_space(device->machine->cpu[0], ADDRESS_SPACE_PROGRAM);
	726	const address_space *space = cputag_get_address_space(device->machine, "maincpu", ADDRESS_SPACE_PROGRAM);
724	727	//  logerror("PIA port B write = %02x\n", data);
725	728
726	729	/* bit 0 controls the fan light */
r4679	r4680
745	748
746	749	static WRITE8_DEVICE_HANDLER( pia_portb_out )
747	750	{
748		const address_space *space = cpu_get_address_space(device->machine->cpu[0], ADDRESS_SPACE_PROGRAM);
	751	const address_space *space = cputag_get_address_space(device->machine, "maincpu", ADDRESS_SPACE_PROGRAM);
749	752	//  logerror("PIA port B write = %02x\n", data);
750	753
751	754	/* bit 4 controls the ticket dispenser */
r4679	r4680
792	795
793	796	static WRITE8_HANDLER( firq_clear_w )
794	797	{
795		cpu_set_input_line(space->machine->cpu[1], M6809_FIRQ_LINE, CLEAR_LINE);
	798	cputag_set_input_line(space->machine, "soundcpu", M6809_FIRQ_LINE, CLEAR_LINE);
796	799	}
797	800
798	801
r4679	r4680
805	808
806	809	static WRITE32_HANDLER( tms_reset_assert_w )
807	810	{
808		cpu_set_input_line(space->machine->cpu[2], INPUT_LINE_RESET, ASSERT_LINE);
809		cpu_set_input_line(space->machine->cpu[3], INPUT_LINE_RESET, ASSERT_LINE);
	811	cputag_set_input_line(space->machine, "dsp1", INPUT_LINE_RESET, ASSERT_LINE);
	812	cputag_set_input_line(space->machine, "dsp2", INPUT_LINE_RESET, ASSERT_LINE);
810	813	}
811	814
812	815
r4679	r4680
815	818	/* kludge to prevent crash on first boot */
816	819	if ((tms1_ram[0] & 0xff000000) == 0)
817	820	{
818		cpu_set_input_line(space->machine->cpu[2], INPUT_LINE_RESET, CLEAR_LINE);
	821	cputag_set_input_line(space->machine, "dsp1", INPUT_LINE_RESET, CLEAR_LINE);
819	822	STOP_TMS_SPINNING(space->machine, 0);
820	823	}
821	824	if ((tms2_ram[0] & 0xff000000) == 0)
822	825	{
823		cpu_set_input_line(space->machine->cpu[3], INPUT_LINE_RESET, CLEAR_LINE);
	826	cputag_set_input_line(space->machine, "dsp2", INPUT_LINE_RESET, CLEAR_LINE);
824	827	STOP_TMS_SPINNING(space->machine, 1);
825	828	}
826	829	}
r4679	r4680
3917	3920	itech32_planes = 1;
3918	3921	is_drivedge = 1;
3919	3922
3920		memory_install_read32_handler(cpu_get_address_space(machine->cpu[2], ADDRESS_SPACE_PROGRAM), 0x8382, 0x8382, 0, 0, drivedge_tms1_speedup_r);
3921		memory_install_read32_handler(cpu_get_address_space(machine->cpu[3], ADDRESS_SPACE_PROGRAM), 0x8382, 0x8382, 0, 0, drivedge_tms2_speedup_r);
	3923	memory_install_read32_handler(cputag_get_address_space(machine, "dsp1", ADDRESS_SPACE_PROGRAM), 0x8382, 0x8382, 0, 0, drivedge_tms1_speedup_r);
	3924	memory_install_read32_handler(cputag_get_address_space(machine, "dsp2", ADDRESS_SPACE_PROGRAM), 0x8382, 0x8382, 0, 0, drivedge_tms2_speedup_r);
3922	3925	}
3923	3926
3924	3927
r4679	r4680
3934	3937	itech32_vram_height = 1024;
3935	3938	itech32_planes = 1;
3936	3939
3937		memory_install_read16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x680000, 0x680001, 0, 0, trackball_r);
	3940	memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x680000, 0x680001, 0, 0, trackball_r);
3938	3941
3939		memory_install_read16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x578000, 0x57ffff, 0, 0, SMH_NOP);
3940		memory_install_readwrite16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x680080, 0x680081, 0, 0, wcbowl_prot_result_r, SMH_NOP);
	3942	memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x578000, 0x57ffff, 0, 0, (read16_space_func)SMH_NOP);
	3943	memory_install_readwrite16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x680080, 0x680081, 0, 0, wcbowl_prot_result_r, (write16_space_func)SMH_NOP);
3941	3944	}
3942	3945
3943	3946
r4679	r4680
3950	3953
3951	3954	itech020_prot_address = prot_addr;
3952	3955
3953		memory_install_write32_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x300000, 0x300003, 0, 0, itech020_color2_w);
3954		memory_install_write32_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x380000, 0x380003, 0, 0, itech020_color1_w);
	3956	memory_install_write32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x300000, 0x300003, 0, 0, itech020_color2_w);
	3957	memory_install_write32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x380000, 0x380003, 0, 0, itech020_color1_w);
3955	3958	}
3956	3959
3957	3960
r4679	r4680
3981	3984
3982	3985	itech020_prot_address = prot_addr;
3983	3986
3984		memory_install_write32_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x300000, 0x300003, 0, 0, itech020_color2_w);
3985		memory_install_write32_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x380000, 0x380003, 0, 0, itech020_color1_w);
3986		memory_install_read32_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x180800, 0x180803, 0, 0, trackball32_4bit_r);
3987		memory_install_read32_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x181000, 0x181003, 0, 0, trackball32_4bit_p2_r);
	3987	memory_install_write32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x300000, 0x300003, 0, 0, itech020_color2_w);
	3988	memory_install_write32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x380000, 0x380003, 0, 0, itech020_color1_w);
	3989	memory_install_read32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x180800, 0x180803, 0, 0, trackball32_4bit_r);
	3990	memory_install_read32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x181000, 0x181003, 0, 0, trackball32_4bit_p2_r);
3988	3991	}
3989	3992
3990	3993
r4679	r4680
4003	4006	static void install_timekeeper(running_machine *machine)
4004	4007	{
4005	4008	const device_config *device = devtag_get_device(machine, "m48t02");
4006		memory_install_readwrite32_device_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), device, 0x681000, 0x6817ff, 0, 0, timekeeper_32be_r, timekeeper_32be_w);
	4009	memory_install_readwrite32_device_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), device, 0x681000, 0x6817ff, 0, 0, timekeeper_32be_r, timekeeper_32be_w);
4007	4010	}
4008	4011
4009	4012	static DRIVER_INIT( wcbowlt )   /* PIC 16C54 labeled as ITBWL-3 */
r4679	r4680
4034	4037	Hacked versions of this PCB have been found with GT97
4035	4038	through GTClassic. This is _NOT_ a factory modification
4036	4039	*/
4037		memory_install_read32_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x200000, 0x200003, 0, 0, trackball32_8bit_r);
	4040	memory_install_read32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x200000, 0x200003, 0, 0, trackball32_8bit_r);
4038	4041	init_gt_common(machine);
4039	4042	}
4040	4043
r4679	r4680
4047	4050	board share the same sound CPU code and sample ROMs.
4048	4051	This board has all versions of GT for it, GT3D through GTClassic
4049	4052	*/
4050		memory_install_read32_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x180800, 0x180803, 0, 0, trackball32_4bit_r);
4051		memory_install_read32_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x181000, 0x181003, 0, 0, trackball32_4bit_p2_r);
	4053	memory_install_read32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x180800, 0x180803, 0, 0, trackball32_4bit_r);
	4054	memory_install_read32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x181000, 0x181003, 0, 0, trackball32_4bit_p2_r);
4052	4055	init_gt_common(machine);
4053	4056	}
4054	4057
r4679	r4680
4072	4075	board: GT97 v1.21S, GT98, GT99, GT2K & GT Classic Versions 1.00S
4073	4076	Trackball info is read through 200202 (actually 200203).
4074	4077	*/
4075		memory_install_read32_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x200200, 0x200203, 0, 0, trackball32_4bit_r);
	4078	memory_install_read32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x200200, 0x200203, 0, 0, trackball32_4bit_r);
4076	4079	init_gt_common(machine);
4077	4080	}
4078	4081
r4679	r4680
4086	4089	Player 1 trackball read through 200003
4087	4090	Player 2 trackball read through 200002
4088	4091	*/
4089		memory_install_read32_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x200000, 0x200003, 0, 0, trackball32_4bit_combined_r);
	4092	memory_install_read32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x200000, 0x200003, 0, 0, trackball32_4bit_combined_r);
4090	4093	init_gt_common(machine);
4091	4094	}
4092	4095
r4679	r4680
4094	4097	static DRIVER_INIT( gtclassp )
4095	4098	{
4096	4099	/* a little extra protection */
4097		memory_install_read32_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x680000, 0x680003, 0, 0, gtclass_prot_result_r);
	4100	memory_install_read32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x680000, 0x680003, 0, 0, gtclass_prot_result_r);
4098	4101	DRIVER_INIT_CALL(aama);
4099	4102
4100	4103	/* The protection code is:

src/mame/drivers/mexico86.c

r4679	r4680
61	61	}
62	62	//ZT
63	63
64		static UINT8 *shared;
65	64
66		static READ8_HANDLER( shared_r )
67		{
68		return shared[offset];
69		}
70	65
71		static WRITE8_HANDLER( shared_w )
72		{
73		shared[offset] = data;
74		}
75	66
76
77
78		static ADDRESS_MAP_START( readmem, ADDRESS_SPACE_PROGRAM, 8 )
79		AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM)
80		AM_RANGE(0x8000, 0xbfff) AM_READ(SMH_BANK1)  /* banked roms */
81		AM_RANGE(0xc000, 0xe7ff) AM_READ(shared_r)   /* shared with sound cpu */
82		AM_RANGE(0xe800, 0xe8ff) AM_READ(SMH_RAM)    /* protection ram */
83		AM_RANGE(0xe900, 0xefff) AM_READ(SMH_RAM)
	67	static ADDRESS_MAP_START( mexico86_map, ADDRESS_SPACE_PROGRAM, 8 )
	68	AM_RANGE(0x0000, 0x7fff) AM_ROM
	69	AM_RANGE(0x8000, 0xbfff) AM_ROMBANK(1)                  /* banked roms */
	70	AM_RANGE(0xc000, 0xe7ff) AM_RAM AM_SHARE(1)              /* shared with sound cpu */
	71	AM_RANGE(0xd500, 0xd7ff) AM_RAM AM_BASE(&mexico86_objectram) AM_SIZE(&mexico86_objectram_size)
	72	AM_RANGE(0xe800, 0xe8ff) AM_RAM AM_BASE(&mexico86_protection_ram)  /* shared with mcu */
	73	AM_RANGE(0xe900, 0xefff) AM_RAM
	74	AM_RANGE(0xc000, 0xd4ff) AM_RAM AM_BASE(&mexico86_videoram) //AT: corrected size
	75	AM_RANGE(0xf000, 0xf000) AM_WRITE(mexico86_bankswitch_w)     /* program and gfx ROM banks */
	76	AM_RANGE(0xf008, 0xf008) AM_WRITE(mexico86_f008_w)            /* cpu reset lines + other unknown stuff */
84	77	AM_RANGE(0xf010, 0xf010) AM_READ_PORT("IN3")
85		AM_RANGE(0xf800, 0xffff) AM_READ(SMH_RAM)    /* communication ram - to connect 4 players's subboard */
	78	AM_RANGE(0xf018, 0xf018) AM_WRITENOP                  /* watchdog? */
	79	AM_RANGE(0xf800, 0xffff) AM_RAM AM_SHARE(2)               /* communication ram - to connect 4 players's subboard */
86	80	ADDRESS_MAP_END
87	81
88		static ADDRESS_MAP_START( writemem, ADDRESS_SPACE_PROGRAM, 8 )
89		AM_RANGE(0x0000, 0xbfff) AM_WRITE(SMH_ROM)
90		AM_RANGE(0xc000, 0xe7ff) AM_WRITE(shared_w) AM_BASE(&shared)  /* shared with sound cpu */
91		AM_RANGE(0xc000, 0xd4ff) AM_WRITE(SMH_RAM) AM_BASE(&mexico86_videoram) //AT: corrected size
92		AM_RANGE(0xd500, 0xd7ff) AM_WRITE(SMH_RAM) AM_BASE(&mexico86_objectram) AM_SIZE(&mexico86_objectram_size)
93		AM_RANGE(0xe800, 0xe8ff) AM_WRITE(SMH_RAM) AM_BASE(&mexico86_protection_ram)  /* shared with mcu */
94		AM_RANGE(0xe900, 0xefff) AM_WRITE(SMH_RAM)
95		AM_RANGE(0xf000, 0xf000) AM_WRITE(mexico86_bankswitch_w)  /* program and gfx ROM banks */
96		AM_RANGE(0xf008, 0xf008) AM_WRITE(mexico86_f008_w)    /* cpu reset lines + other unknown stuff */
97		AM_RANGE(0xf018, 0xf018) AM_WRITENOP    // watchdog_reset_w },
98		AM_RANGE(0xf800, 0xffff) AM_WRITE(SMH_RAM)    /* communication ram */
	82	static ADDRESS_MAP_START( mexico86_sound_map, ADDRESS_SPACE_PROGRAM, 8 )
	83	AM_RANGE(0x0000, 0x7fff) AM_ROM
	84	AM_RANGE(0x8000, 0xa7ff) AM_RAM AM_SHARE(1)
	85	AM_RANGE(0xa800, 0xbfff) AM_RAM
	86	AM_RANGE(0xc000, 0xc001) AM_DEVREADWRITE("ym", kiki_ym2203_r,ym2203_w)
99	87	ADDRESS_MAP_END
100	88
101		static ADDRESS_MAP_START( sound_readmem, ADDRESS_SPACE_PROGRAM, 8 )
102		AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM)
103		AM_RANGE(0x8000, 0xa7ff) AM_READ(shared_r)
104		AM_RANGE(0xa800, 0xbfff) AM_READ(SMH_RAM)
105		AM_RANGE(0xc000, 0xc001) AM_DEVREAD("ym", kiki_ym2203_r)
106		ADDRESS_MAP_END
107
108		static ADDRESS_MAP_START( sound_writemem, ADDRESS_SPACE_PROGRAM, 8 )
109		AM_RANGE(0x0000, 0x7fff) AM_WRITE(SMH_ROM)
110		AM_RANGE(0x8000, 0xa7ff) AM_WRITE(shared_w)
111		AM_RANGE(0xa800, 0xbfff) AM_WRITE(SMH_RAM)
112		AM_RANGE(0xc000, 0xc001) AM_DEVWRITE("ym", ym2203_w)
113		ADDRESS_MAP_END
114
115		static ADDRESS_MAP_START( m68705_readmem, ADDRESS_SPACE_PROGRAM, 8 )
	89	static ADDRESS_MAP_START( mexico86_m68705_map, ADDRESS_SPACE_PROGRAM, 8 )
116	90	ADDRESS_MAP_GLOBAL_MASK(0x7ff)
117		AM_RANGE(0x0000, 0x0000) AM_READ(mexico86_68705_portA_r)
118		AM_RANGE(0x0001, 0x0001) AM_READ(mexico86_68705_portB_r)
	91	AM_RANGE(0x0000, 0x0000) AM_READWRITE(mexico86_68705_portA_r,mexico86_68705_portA_w)
	92	AM_RANGE(0x0001, 0x0001) AM_READWRITE(mexico86_68705_portB_r,mexico86_68705_portB_w)
119	93	AM_RANGE(0x0002, 0x0002) AM_READ_PORT("IN0") /* COIN */
120		AM_RANGE(0x0010, 0x007f) AM_READ(SMH_RAM)
121		AM_RANGE(0x0080, 0x07ff) AM_READ(SMH_ROM)
122		ADDRESS_MAP_END
123
124		static ADDRESS_MAP_START( m68705_writemem, ADDRESS_SPACE_PROGRAM, 8 )
125		ADDRESS_MAP_GLOBAL_MASK(0x7ff)
126		AM_RANGE(0x0000, 0x0000) AM_WRITE(mexico86_68705_portA_w)
127		AM_RANGE(0x0001, 0x0001) AM_WRITE(mexico86_68705_portB_w)
128	94	AM_RANGE(0x0004, 0x0004) AM_WRITE(mexico86_68705_ddrA_w)
129	95	AM_RANGE(0x0005, 0x0005) AM_WRITE(mexico86_68705_ddrB_w)
130	96	AM_RANGE(0x000a, 0x000a) AM_WRITENOP    /* looks like a bug in the code, writes to */
131		/* 0x0a (=10dec) instead of 0x10 */
132		AM_RANGE(0x0010, 0x007f) AM_WRITE(SMH_RAM)
133		AM_RANGE(0x0080, 0x07ff) AM_WRITE(SMH_ROM)
	97	/* 0x0a (=10dec) instead of 0x10 */
	98	AM_RANGE(0x0010, 0x007f) AM_RAM
	99	AM_RANGE(0x0080, 0x07ff) AM_ROM
134	100	ADDRESS_MAP_END
135	101
136		static ADDRESS_MAP_START( sub_cpu_map, ADDRESS_SPACE_PROGRAM, 8 )
	102	static ADDRESS_MAP_START( mexico86_sub_cpu_map, ADDRESS_SPACE_PROGRAM, 8 )
137	103	AM_RANGE(0x0000, 0x3fff) AM_ROM
	104	AM_RANGE(0x4000, 0x47ff) AM_RAM
	105	AM_RANGE(0x8000, 0x87ff) AM_RAM //AM_SHARE(2)
	106	AM_RANGE(0xc000, 0xc003) AM_NOP
	107	AM_RANGE(0xc004, 0xc004) AM_WRITENOP
138	108	ADDRESS_MAP_END
139	109
140	110	static INPUT_PORTS_START( mexico86 )
r4679	r4680
372	342
373	343	/* basic machine hardware */
374	344	MDRV_CPU_ADD("maincpu",Z80, 24000000/4)      /* 6 MHz, Uses clock divided 24MHz OSC */
375		MDRV_CPU_PROGRAM_MAP(readmem,writemem)
	345	MDRV_CPU_PROGRAM_MAP(mexico86_map,0)
376	346
377	347	MDRV_CPU_ADD("audiocpu", Z80, 24000000/4)      /* 6 MHz, Uses clock divided 24MHz OSC */
378		MDRV_CPU_PROGRAM_MAP(sound_readmem,sound_writemem)
	348	MDRV_CPU_PROGRAM_MAP(mexico86_sound_map,0)
379	349	MDRV_CPU_VBLANK_INT("screen", irq0_line_hold)
380	350
381	351	MDRV_CPU_ADD("mcu", M68705, 4000000) /* xtal is 4MHz, divided by 4 internally */
382		MDRV_CPU_PROGRAM_MAP(m68705_readmem,m68705_writemem)
	352	MDRV_CPU_PROGRAM_MAP(mexico86_m68705_map,0)
383	353	MDRV_CPU_VBLANK_INT_HACK(mexico86_m68705_interrupt,2)
384	354
385	355	MDRV_CPU_ADD("sub", Z80, 8000000/2)      /* 4 MHz, Uses 8Mhz OSC */
386		MDRV_CPU_PROGRAM_MAP(sub_cpu_map,0)
	356	MDRV_CPU_PROGRAM_MAP(mexico86_sub_cpu_map,0)
387	357	MDRV_CPU_VBLANK_INT("screen", irq0_line_hold)
388	358
389	359	MDRV_QUANTUM_TIME(HZ(6000))    /* 100 CPU slices per frame - an high value to ensure proper */

src/mame/drivers/calchase.c

r4679	r4680
215	215
216	216	static DMA8237_MEM_READ( pc_dma_read_byte )
217	217	{
218		const address_space *space = cpu_get_address_space(device->machine->cpu[0], ADDRESS_SPACE_PROGRAM);
	218	const address_space *space = cputag_get_address_space(device->machine, "maincpu", ADDRESS_SPACE_PROGRAM);
219	219	offs_t page_offset = (((offs_t) dma_offset[0][channel]) << 16)
220	220	& 0xFF0000;
221	221
r4679	r4680
225	225
226	226	static DMA8237_MEM_WRITE( pc_dma_write_byte )
227	227	{
228		const address_space *space = cpu_get_address_space(device->machine->cpu[0], ADDRESS_SPACE_PROGRAM);
	228	const address_space *space = cputag_get_address_space(device->machine, "maincpu", ADDRESS_SPACE_PROGRAM);
229	229	offs_t page_offset = (((offs_t) dma_offset[0][channel]) << 16)
230	230	& 0xFF0000;
231	231
r4679	r4680
546	546
547	547	static MACHINE_START(calchase)
548	548	{
549		cpu_set_irq_callback(machine->cpu[0], irq_callback);
	549	cpu_set_irq_callback(cputag_get_cpu(machine, "maincpu"), irq_callback);
550	550
551	551	calchase_devices.pit8254 = devtag_get_device( machine, "pit8254" );
552	552	calchase_devices.pic8259_1 = devtag_get_device( machine, "pic8259_1" );
r4679	r4680
562	562	*************************************************************/
563	563
564	564	static PIC8259_SET_INT_LINE( calchase_pic8259_1_set_int_line ) {
565		cpu_set_input_line(device->machine->cpu[0], 0, interrupt ? HOLD_LINE : CLEAR_LINE);
	565	cputag_set_input_line(device->machine, "maincpu", 0, interrupt ? HOLD_LINE : CLEAR_LINE);
566	566	}
567	567
568	568
r4679	r4680
615	615
616	616	static void set_gate_a20(running_machine *machine, int a20)
617	617	{
618		cpu_set_input_line(machine->cpu[0], INPUT_LINE_A20, a20);
	618	cputag_set_input_line(machine, "maincpu", INPUT_LINE_A20, a20);
619	619	}
620	620
621	621	static void keyboard_interrupt(running_machine *machine, int state)
r4679	r4680
677	677
678	678	static DRIVER_INIT( calchase )
679	679	{
680		bios_ram = auto_malloc(0x10000);
	680	bios_ram = auto_alloc_array(machine, UINT32, 0x10000/4);
681	681
682	682	init_pc_common(machine, PCCOMMON_KEYBOARD_AT, calchase_set_keyb_int);
683	683	mc146818_init(machine, MC146818_STANDARD);

src/mame/drivers/chaknpop.c

r4679	r4680
39	39
40	40	***************************************************************************/
41	41
42		static ADDRESS_MAP_START( readmem, ADDRESS_SPACE_PROGRAM, 8 )
43		AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM)
44		AM_RANGE(0x8000, 0x87ff) AM_READ(SMH_RAM)
45		AM_RANGE(0x8800, 0x8800) AM_READ(chaknpop_mcu_portA_r)
46		AM_RANGE(0x8801, 0x8801) AM_READ(chaknpop_mcu_portB_r)
47		AM_RANGE(0x8802, 0x8802) AM_READ(chaknpop_mcu_portC_r)
48		AM_RANGE(0x8805, 0x8805) AM_DEVREAD("ay1", ay8910_r)
49		AM_RANGE(0x8807, 0x8807) AM_DEVREAD("ay2", ay8910_r)
	42	static ADDRESS_MAP_START( chaknpop_map, ADDRESS_SPACE_PROGRAM, 8 )
	43	AM_RANGE(0x0000, 0x7fff) AM_ROM
	44	AM_RANGE(0x8000, 0x87ff) AM_RAM AM_BASE(&chaknpop_ram)
	45	AM_RANGE(0x8800, 0x8800) AM_READWRITE(chaknpop_mcu_portA_r, chaknpop_mcu_portA_w)
	46	AM_RANGE(0x8801, 0x8801) AM_READWRITE(chaknpop_mcu_portB_r, chaknpop_mcu_portB_w)
	47	AM_RANGE(0x8802, 0x8802) AM_READWRITE(chaknpop_mcu_portC_r, chaknpop_mcu_portC_w)
	48	AM_RANGE(0x8804, 0x8805) AM_DEVREADWRITE("ay1", ay8910_r, ay8910_address_data_w)
	49	AM_RANGE(0x8806, 0x8807) AM_DEVREADWRITE("ay2", ay8910_r, ay8910_address_data_w)
50	50	AM_RANGE(0x8808, 0x8808) AM_READ_PORT("DSWC")
51	51	AM_RANGE(0x8809, 0x8809) AM_READ_PORT("P1")
52	52	AM_RANGE(0x880a, 0x880a) AM_READ_PORT("SYSTEM")
53	53	AM_RANGE(0x880b, 0x880b) AM_READ_PORT("P2")
54		AM_RANGE(0x880c, 0x880c) AM_READ(chaknpop_gfxmode_r)
55		AM_RANGE(0x9000, 0x93ff) AM_READ(SMH_RAM)         // TX tilemap
56		AM_RANGE(0x9800, 0x983f) AM_READ(SMH_RAM)         // Color attribute
57		AM_RANGE(0x9840, 0x98ff) AM_READ(SMH_RAM)         // sprite
58		AM_RANGE(0xa000, 0xbfff) AM_READ(SMH_ROM)
59		AM_RANGE(0xc000, 0xffff) AM_READ(SMH_BANK1)         // bitmap plane 1-4
	54	AM_RANGE(0x880c, 0x880c) AM_READWRITE(chaknpop_gfxmode_r, chaknpop_gfxmode_w)
	55	AM_RANGE(0x880d, 0x880d) AM_WRITE(coinlock_w)                                    // coin lock out
	56	AM_RANGE(0x9000, 0x93ff) AM_RAM_WRITE(chaknpop_txram_w) AM_BASE(&chaknpop_txram)          // TX tilemap
	57	AM_RANGE(0x9800, 0x983f) AM_RAM_WRITE(chaknpop_attrram_w) AM_BASE(&chaknpop_attrram)       // Color attribute
	58	AM_RANGE(0x9840, 0x98ff) AM_RAM AM_BASE(&chaknpop_sprram) AM_SIZE(&chaknpop_sprram_size)   // sprite
	59	AM_RANGE(0xa000, 0xbfff) AM_ROM
	60	AM_RANGE(0xc000, 0xffff) AM_RAMBANK(1)                                          // bitmap plane 1-4
60	61	ADDRESS_MAP_END
61	62
62		static ADDRESS_MAP_START( writemem, ADDRESS_SPACE_PROGRAM, 8 )
63		AM_RANGE(0x0000, 0x7fff) AM_WRITE(SMH_ROM)
64		AM_RANGE(0x8000, 0x87ff) AM_WRITE(SMH_RAM) AM_BASE(&chaknpop_ram)
65		AM_RANGE(0x8800, 0x8800) AM_WRITE(chaknpop_mcu_portA_w)
66		AM_RANGE(0x8801, 0x8801) AM_WRITE(chaknpop_mcu_portB_w)
67		AM_RANGE(0x8802, 0x8802) AM_WRITE(chaknpop_mcu_portC_w)
68		AM_RANGE(0x8804, 0x8805) AM_DEVWRITE("ay1", ay8910_address_data_w)
69		AM_RANGE(0x8806, 0x8807) AM_DEVWRITE("ay2", ay8910_address_data_w)
70		AM_RANGE(0x880c, 0x880c) AM_WRITE(chaknpop_gfxmode_w)
71		AM_RANGE(0x880D, 0x880D) AM_WRITE(coinlock_w)         // coin lock out
72		AM_RANGE(0x9000, 0x93ff) AM_WRITE(chaknpop_txram_w) AM_BASE(&chaknpop_txram)
73		AM_RANGE(0x9800, 0x983f) AM_WRITE(chaknpop_attrram_w) AM_BASE(&chaknpop_attrram)
74		AM_RANGE(0x9840, 0x98ff) AM_WRITE(SMH_RAM) AM_BASE(&chaknpop_sprram) AM_SIZE(&chaknpop_sprram_size)
75		AM_RANGE(0xa000, 0xbfff) AM_WRITE(SMH_ROM)
76		AM_RANGE(0xc000, 0xffff) AM_WRITE(SMH_BANK1)         // bitmap plane 1-4
77		ADDRESS_MAP_END
78
79	63	static const ay8910_interface ay8910_interface_1 =
80	64	{
81	65	AY8910_LEGACY_OUTPUT,
r4679	r4680
264	248	//MDRV_CPU_ADD("maincpu", Z80, 18432000 / 6)   /* 3.072 MHz */
265	249	MDRV_CPU_ADD("maincpu", Z80, 2350000)
266	250	//MDRV_CPU_ADD("maincpu", Z80, 2760000)
267		MDRV_CPU_PROGRAM_MAP(readmem,writemem)
	251	MDRV_CPU_PROGRAM_MAP(chaknpop_map,0)
268	252	MDRV_CPU_VBLANK_INT("screen", irq0_line_hold)
269	253
270	254	MDRV_MACHINE_RESET(chaknpop)

src/mame/drivers/megadriv.h

r4679	r4680
54	54	extern int segac2_sp_pal_lookup[4];
55	55
56	56	extern int genvdp_use_cram;
57		extern int genesis_has_z80;
58	57	extern int genesis_always_irq6;
59	58	extern int genesis_other_hacks;

src/mame/drivers/fitfight.c

r4679	r4680
221	221
222	222	static ADDRESS_MAP_START( snd_mem, ADDRESS_SPACE_PROGRAM, 8 )
223	223	AM_RANGE(0x0000, 0x3fff) AM_ROM
224		AM_RANGE(0x4000, 0x7fff) AM_READ(SMH_BANK1)   /* ??? External ROM */
	224	AM_RANGE(0x4000, 0x7fff) AM_READ(SMH_BANK(1))   /* ??? External ROM */
225	225	AM_RANGE(0x8000, 0x87ff) AM_RAM
226	226	AM_RANGE(0xff00, 0xffff) AM_RAM
227	227	ADDRESS_MAP_END
r4679	r4680
966	966	static DRIVER_INIT( fitfight )
967	967	{
968	968	//  UINT16 *mem16 = (UINT16 *)memory_region(machine, "maincpu");
969		//  mem16[0x0165B2/2]=0x4e71; // for now so it boots
970		memory_install_read16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x700000, 0x700001, 0, 0, fitfight_700000_r);
	969	//  mem16[0x0165B2/2] = 0x4e71; // for now so it boots
	970	memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x700000, 0x700001, 0, 0, fitfight_700000_r);
971	971	bbprot_kludge = 0;
972	972	}
973	973
974	974	static DRIVER_INIT( histryma )
975	975	{
976	976	//  UINT16 *mem16 = (UINT16 *)memory_region(machine, "maincpu");
977		//  mem16[0x017FDC/2]=0x4e71; // for now so it boots
978		memory_install_read16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x700000, 0x700001, 0, 0, histryma_700000_r);
	977	//  mem16[0x017FDC/2] = 0x4e71; // for now so it boots
	978	memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x700000, 0x700001, 0, 0, histryma_700000_r);
979	979	bbprot_kludge = 0;
980	980	}
981	981

src/mame/drivers/sspeedr.c

r4679	r4680
37	37
38	38	static WRITE8_HANDLER( sspeedr_int_ack_w )
39	39	{
40		cpu_set_input_line(space->machine->cpu[0], 0, CLEAR_LINE);
	40	cputag_set_input_line(space->machine, "maincpu", 0, CLEAR_LINE);
41	41	}
42	42
43	43
r4679	r4680
77	77	}
78	78
79	79
80		static ADDRESS_MAP_START( readmem, ADDRESS_SPACE_PROGRAM, 8 )
81		AM_RANGE(0x0000, 0x0fff) AM_READ(SMH_ROM)
82		AM_RANGE(0x2000, 0x21ff) AM_READ(SMH_RAM)
83		ADDRESS_MAP_END
84
85
86		static ADDRESS_MAP_START( writemem, ADDRESS_SPACE_PROGRAM, 8 )
87		AM_RANGE(0x0000, 0x0fff) AM_WRITE(SMH_ROM)
88		AM_RANGE(0x2000, 0x21ff) AM_WRITE(SMH_RAM)
	80	static ADDRESS_MAP_START( sspeedr_map, ADDRESS_SPACE_PROGRAM, 8 )
	81	AM_RANGE(0x0000, 0x0fff) AM_ROM
	82	AM_RANGE(0x2000, 0x21ff) AM_RAM
89	83	AM_RANGE(0x7f00, 0x7f17) AM_WRITE(sspeedr_score_w)
90	84	ADDRESS_MAP_END
91	85
92	86
93		static ADDRESS_MAP_START( io_map, ADDRESS_SPACE_IO, 8 )
	87	static ADDRESS_MAP_START( sspeedr_io_map, ADDRESS_SPACE_IO, 8 )
94	88	ADDRESS_MAP_GLOBAL_MASK(0xff)
95	89	AM_RANGE(0x00, 0x00) AM_READ_PORT("IN0")
96	90	AM_RANGE(0x01, 0x01) AM_READ_PORT("IN1")
r4679	r4680
196	190
197	191	/* basic machine hardware */
198	192	MDRV_CPU_ADD("maincpu", Z80, 19968000 / 8)
199		MDRV_CPU_PROGRAM_MAP(readmem, writemem)
200		MDRV_CPU_IO_MAP(io_map,0)
	193	MDRV_CPU_PROGRAM_MAP(sspeedr_map, 0)
	194	MDRV_CPU_IO_MAP(sspeedr_io_map,0)
201	195	MDRV_CPU_VBLANK_INT("screen", irq0_line_assert)
202	196
203	197	/* video hardware */
r4679	r4680
237	231
238	232
239	233	GAMEL( 1979, sspeedr, 0, sspeedr, sspeedr, 0, ROT270, "Midway", "Super Speed Race", GAME_NO_SOUND, layout_sspeedr )
240

src/mame/drivers/ashnojoe.c

r4679	r4680
293	293
294	294	static void ym2203_irq_handler(const device_config *device, int irq)
295	295	{
296		cpu_set_input_line(device->machine->cpu[1], 0, irq ? ASSERT_LINE : CLEAR_LINE);
	296	cputag_set_input_line(device->machine, "audiocpu", 0, irq ? ASSERT_LINE : CLEAR_LINE);
297	297	}
298	298
299	299	static WRITE8_DEVICE_HANDLER( ym2203_write_a )
r4679	r4680
332	332	else
333	333	{
334	334	msm5205_data_w(device, adpcm_byte & 0xf);
335		cpu_set_input_line(device->machine->cpu[1], INPUT_LINE_NMI, PULSE_LINE);
	335	cputag_set_input_line(device->machine, "audiocpu", INPUT_LINE_NMI, PULSE_LINE);
336	336	}
337	337
338	338	msm5205_vclk_toggle ^= 1;

src/mame/drivers/terracre.c

r4679	r4680
999	999	static DRIVER_INIT( horekid )
1000	1000	{
1001	1001	mpProtData = mHoreKidProtData;
1002		memory_install_read16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x44004, 0x44005, 0, 0, horekid_IN2_r);
	1002	memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x44004, 0x44005, 0, 0, horekid_IN2_r);
1003	1003	}
1004	1004
1005	1005	/*    YEAR, NAME,   PARENT,     MACHINE, INPUT,    INIT,     MONITOR,  COMPANY,      FULLNAME, FLAGS */
r4679	r4680
1011	1011	GAME( 1987, horekid,  0,        amazon,  horekid,  horekid,  ROT270,  "Nichibutsu", "Kid no Hore Hore Daisakusen", GAME_SUPPORTS_SAVE )
1012	1012	GAME( 1987, horekidb, horekid,  amazon,  horekid,  horekid,  ROT270,  "bootleg", "Kid no Hore Hore Daisakusen (bootleg)", GAME_SUPPORTS_SAVE )
1013	1013	GAME( 1987, boobhack, horekid,  amazon,  horekid,  horekid,  ROT270,  "bootleg", "Booby Kids (Italian manufactured graphic hack / bootleg of Kid no Hore Hore Daisakusen (bootleg))", GAME_SUPPORTS_SAVE )
1014

src/mame/drivers/findout.c

r4679	r4680
67	67
68	68	static READ8_DEVICE_HANDLER( port1_r )
69	69	{
70		const address_space *space = cpu_get_address_space(device->machine->cpu[0], ADDRESS_SPACE_PROGRAM);
	70	const address_space *space = cputag_get_address_space(device->machine, "maincpu", ADDRESS_SPACE_PROGRAM);
71	71
72	72	return input_port_read(device->machine, "IN0") | (ticket_dispenser_0_r(space, 0) >> 5);
73	73	}
r4679	r4680
88	88
89	89	static WRITE8_DEVICE_HANDLER( sound_w )
90	90	{
91		const address_space *space = cpu_get_address_space(device->machine->cpu[0], ADDRESS_SPACE_PROGRAM);
	91	const address_space *space = cputag_get_address_space(device->machine, "maincpu", ADDRESS_SPACE_PROGRAM);
92	92
93	93	/* bit 3 - coin lockout (lamp6 in test modes, set to lamp 10 as in getrivia.c) */
94	94	coin_lockout_global_w(~data & 0x08);

src/mame/drivers/mouser.c

r4679	r4680
47	47	static WRITE8_HANDLER( mouser_sound_interrupt_w )
48	48	{
49	49	mouser_sound_byte = data;
50		cpu_set_input_line(space->machine->cpu[1], 0, HOLD_LINE);
	50	cputag_set_input_line(space->machine, "audiocpu", 0, HOLD_LINE);
51	51	}
52	52
53	53	static READ8_HANDLER( mouser_sound_byte_r )
r4679	r4680
55	55	return mouser_sound_byte;
56	56	}
57	57
58		static ADDRESS_MAP_START( readmem, ADDRESS_SPACE_PROGRAM, 8 )
59		AM_RANGE(0x0000, 0x5fff) AM_READ(SMH_ROM)
60		AM_RANGE(0x6000, 0x6bff) AM_READ(SMH_RAM)
61		AM_RANGE(0x9000, 0x93ff) AM_READ(SMH_RAM)
62		AM_RANGE(0xa000, 0xa000) AM_READ_PORT("P1")
63		AM_RANGE(0xa800, 0xa800) AM_READ_PORT("SYSTEM")
64		AM_RANGE(0xb000, 0xb000) AM_READ_PORT("DSW")
65		AM_RANGE(0xb800, 0xb800) AM_READ_PORT("P2")
66		ADDRESS_MAP_END
67
68
69		static ADDRESS_MAP_START( writemem, ADDRESS_SPACE_PROGRAM, 8 )
70		AM_RANGE(0x0000, 0x5fff) AM_WRITE(SMH_ROM)
71		AM_RANGE(0x6000, 0x6bff) AM_WRITE(SMH_RAM)
	58	static ADDRESS_MAP_START( mouser_map, ADDRESS_SPACE_PROGRAM, 8 )
	59	AM_RANGE(0x0000, 0x5fff) AM_ROM
	60	AM_RANGE(0x6000, 0x6bff) AM_RAM
72	61	AM_RANGE(0x8800, 0x88ff) AM_WRITENOP /* unknown */
73		AM_RANGE(0x9000, 0x93ff) AM_WRITE(SMH_RAM) AM_BASE(&videoram) AM_SIZE(&videoram_size)
74		AM_RANGE(0x9800, 0x9cff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
75		AM_RANGE(0x9c00, 0x9fff) AM_WRITE(SMH_RAM) AM_BASE(&colorram)
76		AM_RANGE(0xa000, 0xa000) AM_WRITE(mouser_nmi_enable_w) /* bit 0 = NMI Enable */
	62	AM_RANGE(0x9000, 0x93ff) AM_RAM AM_BASE(&videoram) AM_SIZE(&videoram_size)
	63	AM_RANGE(0x9800, 0x9cff) AM_RAM AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
	64	AM_RANGE(0x9c00, 0x9fff) AM_RAM AM_BASE(&colorram)
	65	AM_RANGE(0xa000, 0xa000) AM_READ_PORT("P1") AM_WRITE(mouser_nmi_enable_w) /* bit 0 = NMI Enable */
77	66	AM_RANGE(0xa001, 0xa001) AM_WRITE(mouser_flip_screen_x_w)
78	67	AM_RANGE(0xa002, 0xa002) AM_WRITE(mouser_flip_screen_y_w)
79		AM_RANGE(0xb800, 0xb800) AM_WRITE(mouser_sound_interrupt_w) /* byte to sound cpu */
80
	68	AM_RANGE(0xa800, 0xa800) AM_READ_PORT("SYSTEM")
	69	AM_RANGE(0xb000, 0xb000) AM_READ_PORT("DSW")
	70	AM_RANGE(0xb800, 0xb800) AM_READ_PORT("P2") AM_WRITE(mouser_sound_interrupt_w) /* byte to sound cpu */
81	71	ADDRESS_MAP_END
82	72
83	73
84		static ADDRESS_MAP_START( readmem2, ADDRESS_SPACE_PROGRAM, 8 )
85		AM_RANGE(0x0000, 0x1fff) AM_READ(SMH_ROM)
86		AM_RANGE(0x2000, 0x23ff) AM_READ(SMH_RAM)
	74	static ADDRESS_MAP_START( mouser_sound_map, ADDRESS_SPACE_PROGRAM, 8 )
	75	AM_RANGE(0x0000, 0x1fff) AM_ROM
	76	AM_RANGE(0x2000, 0x23ff) AM_RAM
87	77	AM_RANGE(0x3000, 0x3000) AM_READ(mouser_sound_byte_r)
88		ADDRESS_MAP_END
89
90		static ADDRESS_MAP_START( writemem2, ADDRESS_SPACE_PROGRAM, 8 )
91		AM_RANGE(0x0000, 0x1fff) AM_WRITE(SMH_ROM)
92		AM_RANGE(0x2000, 0x23ff) AM_WRITE(SMH_RAM)
93	78	AM_RANGE(0x4000, 0x4000) AM_WRITENOP   /* watchdog? */
94	79	ADDRESS_MAP_END
95	80
96		static ADDRESS_MAP_START( io_map_2, ADDRESS_SPACE_IO, 8 )
	81	static ADDRESS_MAP_START( mouser_sound_io_map, ADDRESS_SPACE_IO, 8 )
97	82	ADDRESS_MAP_GLOBAL_MASK(0xff)
98	83	AM_RANGE(0x00, 0x01) AM_DEVWRITE("ay1", ay8910_data_address_w)
99	84	AM_RANGE(0x80, 0x81) AM_DEVWRITE("ay2", ay8910_data_address_w)
r4679	r4680
196	181
197	182	/* basic machine hardware */
198	183	MDRV_CPU_ADD("maincpu", Z80, 4000000)   /* 4 MHz ? */
199		MDRV_CPU_PROGRAM_MAP(readmem,writemem)
	184	MDRV_CPU_PROGRAM_MAP(mouser_map,0)
200	185	MDRV_CPU_VBLANK_INT("screen", mouser_nmi_interrupt) /* NMI is masked externally */
201	186
202	187	MDRV_CPU_ADD("audiocpu", Z80, 4000000)   /* ??? */
203		MDRV_CPU_PROGRAM_MAP(readmem2,writemem2)
204		MDRV_CPU_IO_MAP(io_map_2,0)
	188	MDRV_CPU_PROGRAM_MAP(mouser_sound_map,0)
	189	MDRV_CPU_IO_MAP(mouser_sound_io_map,0)
205	190	MDRV_CPU_VBLANK_INT_HACK(nmi_line_pulse,4) /* ??? This controls the sound tempo */
206	191
207	192	/* video hardware */
r4679	r4680
284	269	offs_t i;
285	270	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
286	271	UINT8 *rom = memory_region(machine, "maincpu");
287		UINT8 *decrypted = auto_malloc(0x6000);
	272	UINT8 *decrypted = auto_alloc_array(machine, UINT8, 0x6000);
288	273	UINT8 *table = memory_region(machine, "user1");
289	274
290	275	memory_set_decrypted_region(space, 0x0000, 0x5fff, decrypted);
r4679	r4680
298	283
299	284	GAME( 1983, mouser,   0,      mouser, mouser, mouser, ROT90, "UPL", "Mouser", 0 )
300	285	GAME( 1983, mouserc,  mouser, mouser, mouser, mouser, ROT90, "[UPL] (Cosmos license)", "Mouser (Cosmos)", 0 )
301

src/mame/drivers/undrfire.c

r4679	r4680
238	238
239	239	static TIMER_CALLBACK( interrupt5 )
240	240	{
241		cpu_set_input_line(machine->cpu[0], 5, HOLD_LINE);
	241	cputag_set_input_line(machine, "maincpu", 5, HOLD_LINE);
242	242	}
243	243
244	244
r4679	r4680
472	472	........ .x......   Vibration
473	473	*/
474	474
475		cpu_set_input_line(space->machine->cpu[2], INPUT_LINE_RESET, (data & 0x1000) ? CLEAR_LINE : ASSERT_LINE);
	475	cputag_set_input_line(space->machine, "sub", INPUT_LINE_RESET, (data & 0x1000) ? CLEAR_LINE : ASSERT_LINE);
476	476	}
477	477
478	478	static READ32_HANDLER( cbombers_adc_r )

src/mame/drivers/malzak.c

r4679	r4680
171	171	//  Bits 1-3 are all set high upon death, until the game continues
172	172	//  Bit 6 is used only in Malzak II, and is set high after checking
173	173	//        the selected version
174		//  logerror("S2650 [0x%04x]: port 0x40 write: 0x%02x\n",cpu_get_pc(space->machine->cpu[0]),data);
	174	//  logerror("S2650 [0x%04x]: port 0x40 write: 0x%02x\n", cpu_get_pc(cputag_get_cpu(space->machine, "maincpu")), data);
175	175	if(data & 0x40)
176	176	malzak_bank1 = 1;
177	177	else

src/mame/drivers/deco32.c

r4679	r4680
253	253	deco32_raster_display_list[deco32_raster_display_position++]=deco32_pf12_control[3]&0xffff;
254	254	deco32_raster_display_list[deco32_raster_display_position++]=deco32_pf12_control[4]&0xffff;
255	255
256		cpu_set_input_line(machine->cpu[0], ARM_IRQ_LINE, HOLD_LINE);
	256	cputag_set_input_line(machine, "maincpu", ARM_IRQ_LINE, HOLD_LINE);
257	257	}
258	258
259	259	static READ32_HANDLER( deco32_irq_controller_r )
260	260	{
261	261	int vblank;
262	262
263		switch (offset) {
	263	switch (offset)
	264	{
264	265	case 2: /* Raster IRQ ACK - value read is not used */
265		cpu_set_input_line(space->machine->cpu[0], ARM_IRQ_LINE, CLEAR_LINE);
	266	cputag_set_input_line(space->machine, "maincpu", ARM_IRQ_LINE, CLEAR_LINE);
266	267	return 0;
267	268
268	269	case 3: /* Irq controller
r4679	r4680
316	317	static WRITE32_HANDLER( deco32_sound_w )
317	318	{
318	319	soundlatch_w(space,0,data & 0xff);
319		cpu_set_input_line(space->machine->cpu[1],0,HOLD_LINE);
	320	cputag_set_input_line(space->machine, "audiocpu", 0, HOLD_LINE);
320	321	}
321	322
322	323	static READ32_HANDLER( deco32_71_r )
r4679	r4680
480	481	static int pendingCommand=0; /* 1 = read, 2 = write */
481	482	static int readBitCount=0;
482	483	static int byteAddr=0;
483		UINT8 *eeprom=eeprom_get_data_pointer(NULL,NULL);
	484	UINT8 *eeprom=(UINT8 *)eeprom_get_data_pointer(NULL,NULL);
484	485
485	486	/* Eprom in low byte */
486	487	if (mem_mask==0x000000ff) { /* Byte write to low byte only (different from word writing including low byte) */
r4679	r4680
598	599
599	600	/* Sound board reset control */
600	601	if (data&0x80)
601		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_RESET, CLEAR_LINE);
	602	cputag_set_input_line(space->machine, "audiocpu", INPUT_LINE_RESET, CLEAR_LINE);
602	603	else
603		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_RESET, ASSERT_LINE);
	604	cputag_set_input_line(space->machine, "audiocpu", INPUT_LINE_RESET, ASSERT_LINE);
604	605
605	606	/* bit 0x4 fade cancel? */
606	607	/* bit 0x8 ?? */
r4679	r4680
647	648	/* bit 1 of nslasher_sound_irq specifies IRQ command writes */
648	649	soundlatch_w(space,0,(data>>16)&0xff);
649	650	nslasher_sound_irq |= 0x02;
650		cpu_set_input_line(space->machine->cpu[1], 0, (nslasher_sound_irq != 0) ? ASSERT_LINE : CLEAR_LINE);
	651	cputag_set_input_line(space->machine, "audiocpu", 0, (nslasher_sound_irq != 0) ? ASSERT_LINE : CLEAR_LINE);
651	652	}
652	653	}
653	654
654	655	/**********************************************************************************/
655	656
656		static ADDRESS_MAP_START( captaven_readmem, ADDRESS_SPACE_PROGRAM, 32 )
657		AM_RANGE(0x000000, 0x0fffff) AM_READ(SMH_ROM)
	657	static ADDRESS_MAP_START( captaven_map, ADDRESS_SPACE_PROGRAM, 32 )
	658	AM_RANGE(0x000000, 0x0fffff) AM_ROM
658	659
659	660	AM_RANGE(0x100000, 0x100007) AM_READ(deco32_71_r)
660		AM_RANGE(0x110000, 0x110fff) AM_READ(SMH_RAM) /* Sprites */
661		AM_RANGE(0x120000, 0x127fff) AM_READ(SMH_RAM) /* Main RAM */
662		AM_RANGE(0x130000, 0x131fff) AM_READ(SMH_RAM) /* Palette RAM */
663		AM_RANGE(0x128000, 0x128fff) AM_READ(captaven_prot_r)
664		AM_RANGE(0x148000, 0x14800f) AM_READ(deco32_irq_controller_r)
665		AM_RANGE(0x160000, 0x167fff) AM_READ(SMH_RAM) /* Extra work RAM */
666		AM_RANGE(0x168000, 0x168003) AM_READ(captaven_soundcpu_r)
667
668		AM_RANGE(0x180000, 0x18001f) AM_READ(SMH_RAM)
669		AM_RANGE(0x190000, 0x191fff) AM_READ(SMH_RAM)
670		AM_RANGE(0x194000, 0x195fff) AM_READ(SMH_RAM)
671		AM_RANGE(0x1a0000, 0x1a1fff) AM_READ(SMH_RAM)
672		AM_RANGE(0x1a4000, 0x1a5fff) AM_READ(SMH_RAM)
673
674		AM_RANGE(0x1c0000, 0x1c001f) AM_READ(SMH_RAM)
675		AM_RANGE(0x1d0000, 0x1d1fff) AM_READ(SMH_RAM)
676		AM_RANGE(0x1e0000, 0x1e1fff) AM_READ(SMH_RAM)
677		ADDRESS_MAP_END
678
679		static ADDRESS_MAP_START( captaven_writemem, ADDRESS_SPACE_PROGRAM, 32 )
680		AM_RANGE(0x000000, 0x0fffff) AM_WRITE(SMH_ROM)
681
682	661	AM_RANGE(0x100000, 0x100003) AM_WRITE(buffer_spriteram32_w)
683	662	AM_RANGE(0x108000, 0x108003) AM_WRITENOP /* ? */
684		AM_RANGE(0x110000, 0x110fff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram32) AM_SIZE(&spriteram_size)
685		AM_RANGE(0x120000, 0x127fff) AM_WRITE(SMH_RAM) AM_BASE(&deco32_ram) /* Main RAM */
	663	AM_RANGE(0x110000, 0x110fff) AM_RAM AM_BASE(&spriteram32) AM_SIZE(&spriteram_size) /* Sprites */
	664	AM_RANGE(0x120000, 0x127fff) AM_RAM AM_BASE(&deco32_ram) /* Main RAM */
	665	AM_RANGE(0x128000, 0x128fff) AM_READ(captaven_prot_r)
686	666	AM_RANGE(0x1280c8, 0x1280cb) AM_WRITE(deco32_sound_w)
687		AM_RANGE(0x130000, 0x131fff) AM_WRITE(deco32_nonbuffered_palette_w) AM_BASE(&paletteram32)
688		AM_RANGE(0x148000, 0x14800f) AM_WRITE(deco32_irq_controller_w)
	667	AM_RANGE(0x130000, 0x131fff) AM_RAM_WRITE(deco32_nonbuffered_palette_w) AM_BASE(&paletteram32) /* Palette RAM */
	668	AM_RANGE(0x148000, 0x14800f) AM_READWRITE(deco32_irq_controller_r, deco32_irq_controller_w)
	669	AM_RANGE(0x160000, 0x167fff) AM_RAM /* Extra work RAM */
	670	AM_RANGE(0x168000, 0x168003) AM_READ(captaven_soundcpu_r)
689	671
690		AM_RANGE(0x160000, 0x167fff) AM_WRITE(SMH_RAM) /* Additional work RAM */
691
692	672	AM_RANGE(0x178000, 0x178003) AM_WRITE(deco32_pri_w)
693		AM_RANGE(0x180000, 0x18001f) AM_WRITE(SMH_RAM) AM_BASE(&deco32_pf12_control)
694		AM_RANGE(0x190000, 0x191fff) AM_WRITE(deco32_pf1_data_w) AM_BASE(&deco32_pf1_data)
	673
	674	AM_RANGE(0x180000, 0x18001f) AM_RAM AM_BASE(&deco32_pf12_control)
	675	AM_RANGE(0x190000, 0x191fff) AM_RAM_WRITE(deco32_pf1_data_w) AM_BASE(&deco32_pf1_data)
695	676	AM_RANGE(0x192000, 0x193fff) AM_WRITE(deco32_pf1_data_w) /* Mirror address - bug in program code */
696		AM_RANGE(0x194000, 0x195fff) AM_WRITE(deco32_pf2_data_w) AM_BASE(&deco32_pf2_data)
	677	AM_RANGE(0x194000, 0x195fff) AM_RAM_WRITE(deco32_pf2_data_w) AM_BASE(&deco32_pf2_data)
	678	AM_RANGE(0x1a0000, 0x1a1fff) AM_RAM AM_BASE(&deco32_pf1_rowscroll)
	679	AM_RANGE(0x1a4000, 0x1a5fff) AM_RAM AM_BASE(&deco32_pf2_rowscroll)
697	680
698		AM_RANGE(0x1a0000, 0x1a1fff) AM_WRITE(SMH_RAM) AM_BASE(&deco32_pf1_rowscroll)
699		AM_RANGE(0x1a4000, 0x1a5fff) AM_WRITE(SMH_RAM) AM_BASE(&deco32_pf2_rowscroll)
700		AM_RANGE(0x1c0000, 0x1c001f) AM_WRITE(SMH_RAM) AM_BASE(&deco32_pf34_control)
701		AM_RANGE(0x1d0000, 0x1d1fff) AM_WRITE(deco32_pf3_data_w) AM_BASE(&deco32_pf3_data)
702		AM_RANGE(0x1e0000, 0x1e1fff) AM_WRITE(SMH_RAM) AM_BASE(&deco32_pf3_rowscroll)
	681	AM_RANGE(0x1c0000, 0x1c001f) AM_RAM AM_BASE(&deco32_pf34_control)
	682	AM_RANGE(0x1d0000, 0x1d1fff) AM_RAM_WRITE(deco32_pf3_data_w) AM_BASE(&deco32_pf3_data)
	683	AM_RANGE(0x1e0000, 0x1e1fff) AM_RAM AM_BASE(&deco32_pf3_rowscroll)
703	684	ADDRESS_MAP_END
704	685
705		static ADDRESS_MAP_START( fghthist_readmem, ADDRESS_SPACE_PROGRAM, 32 )
706		AM_RANGE(0x000000, 0x0fffff) AM_READ(SMH_ROM)
707		AM_RANGE(0x100000, 0x11ffff) AM_READ(SMH_RAM)
	686	static ADDRESS_MAP_START( fghthist_map, ADDRESS_SPACE_PROGRAM, 32 )
	687	AM_RANGE(0x000000, 0x001fff) AM_READWRITE(SMH_ROM, deco32_pf1_data_w)
	688	AM_RANGE(0x000000, 0x0fffff) AM_ROM
	689	AM_RANGE(0x100000, 0x11ffff) AM_RAM AM_BASE(&deco32_ram)
708	690	AM_RANGE(0x120020, 0x12002f) AM_READ(fghthist_control_r)
709
710		AM_RANGE(0x168000, 0x169fff) AM_READ(SMH_RAM)
711
712		AM_RANGE(0x178000, 0x178fff) AM_READ(SMH_RAM)
713		AM_RANGE(0x179000, 0x179fff) AM_READ(SMH_RAM)
714
715		AM_RANGE(0x182000, 0x183fff) AM_READ(SMH_RAM)
716		AM_RANGE(0x184000, 0x185fff) AM_READ(SMH_RAM)
717		AM_RANGE(0x192000, 0x1923ff) AM_READ(SMH_RAM)
718		AM_RANGE(0x192800, 0x1928ff) AM_READ(SMH_RAM)
719		AM_RANGE(0x194000, 0x1943ff) AM_READ(SMH_RAM)
720		AM_RANGE(0x194800, 0x1948ff) AM_READ(SMH_RAM)
721		AM_RANGE(0x1a0000, 0x1a001f) AM_READ(SMH_RAM)
722
723		AM_RANGE(0x1c2000, 0x1c3fff) AM_READ(SMH_RAM)
724		AM_RANGE(0x1c4000, 0x1c5fff) AM_READ(SMH_RAM)
725		AM_RANGE(0x1d2000, 0x1d23ff) AM_READ(SMH_RAM)
726		AM_RANGE(0x1d2800, 0x1d28ff) AM_READ(SMH_RAM)
727		AM_RANGE(0x1d4000, 0x1d43ff) AM_READ(SMH_RAM)
728		AM_RANGE(0x1d4800, 0x1d48ff) AM_READ(SMH_RAM)
729		AM_RANGE(0x1e0000, 0x1e001f) AM_READ(SMH_RAM)
730
731		AM_RANGE(0x16c000, 0x16c01f) AM_READNOP
732		AM_RANGE(0x17c000, 0x17c03f) AM_READNOP
733
734		AM_RANGE(0x200000, 0x200fff) AM_READ(deco16_146_fghthist_prot_r)
735		ADDRESS_MAP_END
736
737		static ADDRESS_MAP_START( fghthist_writemem, ADDRESS_SPACE_PROGRAM, 32 )
738		AM_RANGE(0x000000, 0x001fff) AM_WRITE(deco32_pf1_data_w) /* Hardware bug?  Test mode writes here and expects to get PF1 */
739		AM_RANGE(0x000000, 0x0fffff) AM_WRITE(SMH_ROM)
740		AM_RANGE(0x100000, 0x11ffff) AM_WRITE(SMH_RAM) AM_BASE(&deco32_ram)
741	691	AM_RANGE(0x12002c, 0x12002f) AM_WRITE(fghthist_eeprom_w)
742	692	AM_RANGE(0x1201fc, 0x1201ff) AM_WRITE(deco32_sound_w)
	693
743	694	AM_RANGE(0x140000, 0x140003) AM_WRITENOP /* VBL irq ack */
744		//148000 - IRQ mask (ca)...
745		AM_RANGE(0x168000, 0x169fff) AM_WRITE(deco32_buffered_palette_w) AM_BASE(&paletteram32)
746		AM_RANGE(0x16c008, 0x16c00b) AM_WRITE(deco32_palette_dma_w)
747	695
748		AM_RANGE(0x178000, 0x178fff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram32) AM_SIZE(&spriteram_size)
749		AM_RANGE(0x179000, 0x179fff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram32_2) // ?
	696	AM_RANGE(0x168000, 0x169fff) AM_RAM_WRITE(deco32_buffered_palette_w) AM_BASE(&paletteram32)
	697	AM_RANGE(0x16c008, 0x16c00b) AM_WRITE(deco32_palette_dma_w)
	698	//
	699	AM_RANGE(0x178000, 0x178fff) AM_RAM AM_BASE(&spriteram32) AM_SIZE(&spriteram_size)
	700	AM_RANGE(0x179000, 0x179fff) AM_RAM AM_BASE(&spriteram32_2) // ?
750	701	AM_RANGE(0x17c010, 0x17c013) AM_WRITE(buffer_spriteram32_w)
751	702
752		AM_RANGE(0x182000, 0x183fff) AM_WRITE(deco32_pf1_data_w) AM_BASE(&deco32_pf1_data)
753		AM_RANGE(0x184000, 0x185fff) AM_WRITE(deco32_pf2_data_w) AM_BASE(&deco32_pf2_data)
754		AM_RANGE(0x192000, 0x192fff) AM_WRITE(SMH_RAM) AM_BASE(&deco32_pf1_rowscroll)
755		AM_RANGE(0x194000, 0x194fff) AM_WRITE(SMH_RAM) AM_BASE(&deco32_pf2_rowscroll)
756		AM_RANGE(0x1a0000, 0x1a001f) AM_WRITE(SMH_RAM) AM_BASE(&deco32_pf12_control)
	703	AM_RANGE(0x182000, 0x183fff) AM_RAM_WRITE(deco32_pf1_data_w) AM_BASE(&deco32_pf1_data)
	704	AM_RANGE(0x184000, 0x185fff) AM_RAM_WRITE(deco32_pf2_data_w) AM_BASE(&deco32_pf2_data)
	705	AM_RANGE(0x192000, 0x192fff) AM_RAM AM_BASE(&deco32_pf1_rowscroll)
	706	AM_RANGE(0x194000, 0x194fff) AM_RAM AM_BASE(&deco32_pf2_rowscroll)
	707	AM_RANGE(0x1a0000, 0x1a001f) AM_RAM AM_BASE(&deco32_pf12_control)
757	708
758		AM_RANGE(0x1c2000, 0x1c3fff) AM_WRITE(deco32_pf3_data_w) AM_BASE(&deco32_pf3_data)
759		AM_RANGE(0x1c4000, 0x1c5fff) AM_WRITE(deco32_pf4_data_w) AM_BASE(&deco32_pf4_data)
760		AM_RANGE(0x1d2000, 0x1d2fff) AM_WRITE(SMH_RAM) AM_BASE(&deco32_pf3_rowscroll)
761		AM_RANGE(0x1d4000, 0x1d4fff) AM_WRITE(SMH_RAM) AM_BASE(&deco32_pf4_rowscroll)
762		AM_RANGE(0x1e0000, 0x1e001f) AM_WRITE(SMH_RAM) AM_BASE(&deco32_pf34_control)
	709	AM_RANGE(0x1c2000, 0x1c3fff) AM_RAM_WRITE(deco32_pf3_data_w) AM_BASE(&deco32_pf3_data)
	710	AM_RANGE(0x1c4000, 0x1c5fff) AM_RAM_WRITE(deco32_pf4_data_w) AM_BASE(&deco32_pf4_data)
	711	AM_RANGE(0x1d2000, 0x1d2fff) AM_RAM AM_BASE(&deco32_pf3_rowscroll)
	712	AM_RANGE(0x1d4000, 0x1d4fff) AM_RAM AM_BASE(&deco32_pf4_rowscroll)
	713	AM_RANGE(0x1e0000, 0x1e001f) AM_RAM AM_BASE(&deco32_pf34_control)
763	714
764		AM_RANGE(0x200000, 0x200fff) AM_WRITE(deco16_146_fghthist_prot_w) AM_BASE(&deco32_prot_ram)
	715	AM_RANGE(0x16c000, 0x16c01f) AM_READNOP
	716	AM_RANGE(0x17c000, 0x17c03f) AM_READNOP
	717
	718	AM_RANGE(0x200000, 0x200fff) AM_READWRITE(deco16_146_fghthist_prot_r, deco16_146_fghthist_prot_w) AM_BASE(&deco32_prot_ram)
765	719	AM_RANGE(0x208800, 0x208803) AM_WRITENOP /* ? */
766	720	ADDRESS_MAP_END
767	721
r4679	r4680
794	748	AM_RANGE(0x200000, 0x200fff) AM_READ(deco16_146_fghthist_prot_r) AM_WRITE(deco16_146_fghthist_prot_w) AM_BASE(&deco32_prot_ram)
795	749	ADDRESS_MAP_END
796	750
797		static ADDRESS_MAP_START( dragngun_readmem, ADDRESS_SPACE_PROGRAM, 32 )
798		AM_RANGE(0x000000, 0x0fffff) AM_READ(SMH_ROM)
799		AM_RANGE(0x100000, 0x11ffff) AM_READ(SMH_RAM)
	751	static ADDRESS_MAP_START( dragngun_map, ADDRESS_SPACE_PROGRAM, 32 )
	752	AM_RANGE(0x000000, 0x0fffff) AM_ROM
	753	AM_RANGE(0x100000, 0x11ffff) AM_RAM AM_BASE(&deco32_ram)
800	754	AM_RANGE(0x120000, 0x120fff) AM_READ(dragngun_prot_r)
801		AM_RANGE(0x128000, 0x12800f) AM_READ(deco32_irq_controller_r)
802		AM_RANGE(0x130000, 0x131fff) AM_READ(SMH_RAM)
803		AM_RANGE(0x138000, 0x138003) AM_READNOP /* Palette dma complete in bit 0x8? ack?  return 0 else tight loop */
	755	AM_RANGE(0x1204c0, 0x1204c3) AM_WRITE(deco32_sound_w)
	756	AM_RANGE(0x128000, 0x12800f) AM_READWRITE(deco32_irq_controller_r, deco32_irq_controller_w)
	757	AM_RANGE(0x130000, 0x131fff) AM_RAM_WRITE(deco32_buffered_palette_w) AM_BASE(&paletteram32)
	758	AM_RANGE(0x138000, 0x138003) AM_NOP /* Palette dma complete in bit 0x8? ack?  return 0 else tight loop */
	759	AM_RANGE(0x138008, 0x13800b) AM_WRITE(deco32_palette_dma_w)
804	760
805		AM_RANGE(0x180000, 0x18001f) AM_READ(SMH_RAM)
806		AM_RANGE(0x190000, 0x191fff) AM_READ(SMH_RAM)
807		AM_RANGE(0x194000, 0x195fff) AM_READ(SMH_RAM)
808		AM_RANGE(0x1a0000, 0x1a0fff) AM_READ(SMH_RAM)
809		AM_RANGE(0x1a4000, 0x1a4fff) AM_READ(SMH_RAM)
	761	AM_RANGE(0x180000, 0x18001f) AM_RAM AM_BASE(&deco32_pf12_control)
	762	AM_RANGE(0x190000, 0x191fff) AM_RAM_WRITE(deco32_pf1_data_w) AM_BASE(&deco32_pf1_data)
	763	AM_RANGE(0x194000, 0x195fff) AM_RAM_WRITE(deco32_pf2_data_w) AM_BASE(&deco32_pf2_data)
	764	AM_RANGE(0x1a0000, 0x1a0fff) AM_RAM AM_BASE(&deco32_pf1_rowscroll)
	765	AM_RANGE(0x1a4000, 0x1a4fff) AM_RAM AM_BASE(&deco32_pf2_rowscroll)
810	766
811		AM_RANGE(0x1c0000, 0x1c001f) AM_READ(SMH_RAM)
812		AM_RANGE(0x1d0000, 0x1d1fff) AM_READ(SMH_RAM)
813		AM_RANGE(0x1d4000, 0x1d5fff) AM_READ(SMH_RAM)
814		AM_RANGE(0x1e0000, 0x1e0fff) AM_READ(SMH_RAM)
815		AM_RANGE(0x1e4000, 0x1e4fff) AM_READ(SMH_RAM)
	767	AM_RANGE(0x1c0000, 0x1c001f) AM_RAM AM_BASE(&deco32_pf34_control)
	768	AM_RANGE(0x1d0000, 0x1d1fff) AM_RAM_WRITE(deco32_pf3_data_w) AM_BASE(&deco32_pf3_data)
	769	AM_RANGE(0x1d4000, 0x1d5fff) AM_RAM_WRITE(deco32_pf4_data_w) AM_BASE(&deco32_pf4_data)
	770	AM_RANGE(0x1e0000, 0x1e0fff) AM_RAM AM_BASE(&deco32_pf3_rowscroll)
	771	AM_RANGE(0x1e4000, 0x1e4fff) AM_RAM AM_BASE(&deco32_pf4_rowscroll)
816	772
817		AM_RANGE(0x208000, 0x208fff) AM_READ(SMH_RAM)
818		AM_RANGE(0x20c000, 0x20cfff) AM_READ(SMH_RAM)
819		AM_RANGE(0x210000, 0x217fff) AM_READ(SMH_RAM)
820		AM_RANGE(0x218000, 0x21ffff) AM_READ(SMH_RAM)
821		AM_RANGE(0x220000, 0x221fff) AM_READ(SMH_RAM) /* Main spriteram */
	773	AM_RANGE(0x204800, 0x204fff) AM_RAM // ace? 0x10 byte increments only  // 13f ff stuff
822	774
823		AM_RANGE(0x204800, 0x204fff) AM_READ(SMH_RAM) //0x10 byte increments only
824		AM_RANGE(0x228000, 0x2283ff) AM_READ(SMH_RAM) //0x10 byte increments only
825	775
826		AM_RANGE(0x300000, 0x3fffff) AM_READ(SMH_ROM)
	776	AM_RANGE(0x208000, 0x208fff) AM_RAM AM_BASE(&dragngun_sprite_layout_0_ram)
	777	AM_RANGE(0x20c000, 0x20cfff) AM_RAM AM_BASE(&dragngun_sprite_layout_1_ram)
	778	AM_RANGE(0x210000, 0x217fff) AM_RAM AM_BASE(&dragngun_sprite_lookup_0_ram)
	779	AM_RANGE(0x218000, 0x21ffff) AM_RAM AM_BASE(&dragngun_sprite_lookup_1_ram)
	780	AM_RANGE(0x220000, 0x221fff) AM_RAM AM_BASE(&spriteram32) AM_SIZE(&spriteram_size) /* Main spriteram */
827	781
828		AM_RANGE(0x400000, 0x400003) AM_DEVREAD8("oki3", okim6295_r, 0x000000ff)
829		AM_RANGE(0x420000, 0x420003) AM_READ(dragngun_eeprom_r)
830		AM_RANGE(0x438000, 0x438003) AM_READ(dragngun_lightgun_r)
831		AM_RANGE(0x440000, 0x440003) AM_READ(dragngun_service_r)
832		ADDRESS_MAP_END
	782	AM_RANGE(0x228000, 0x2283ff) AM_RAM //0x10 byte increments only
833	783
834		static ADDRESS_MAP_START( dragngun_writemem, ADDRESS_SPACE_PROGRAM, 32 )
835		AM_RANGE(0x000000, 0x0fffff) AM_WRITE(SMH_ROM)
836		AM_RANGE(0x100000, 0x11ffff) AM_WRITE(SMH_RAM) AM_BASE(&deco32_ram)
837		AM_RANGE(0x1204c0, 0x1204c3) AM_WRITE(deco32_sound_w)
838		AM_RANGE(0x128000, 0x12800f) AM_WRITE(deco32_irq_controller_w)
839
840		AM_RANGE(0x130000, 0x131fff) AM_WRITE(deco32_buffered_palette_w) AM_BASE(&paletteram32)
841		AM_RANGE(0x138000, 0x138003) AM_WRITENOP // palette mode?  check
842		AM_RANGE(0x138008, 0x13800b) AM_WRITE(deco32_palette_dma_w)
843
844		AM_RANGE(0x180000, 0x18001f) AM_WRITE(SMH_RAM) AM_BASE(&deco32_pf12_control)
845		AM_RANGE(0x190000, 0x191fff) AM_WRITE(deco32_pf1_data_w) AM_BASE(&deco32_pf1_data)
846		AM_RANGE(0x194000, 0x195fff) AM_WRITE(deco32_pf2_data_w) AM_BASE(&deco32_pf2_data)
847		AM_RANGE(0x1a0000, 0x1a0fff) AM_WRITE(SMH_RAM) AM_BASE(&deco32_pf1_rowscroll)
848		AM_RANGE(0x1a4000, 0x1a4fff) AM_WRITE(SMH_RAM) AM_BASE(&deco32_pf2_rowscroll)
849
850		AM_RANGE(0x1c0000, 0x1c001f) AM_WRITE(SMH_RAM) AM_BASE(&deco32_pf34_control)
851		AM_RANGE(0x1d0000, 0x1d1fff) AM_WRITE(deco32_pf3_data_w) AM_BASE(&deco32_pf3_data)
852		AM_RANGE(0x1d4000, 0x1d5fff) AM_WRITE(deco32_pf4_data_w) AM_BASE(&deco32_pf4_data)
853		AM_RANGE(0x1e0000, 0x1e0fff) AM_WRITE(SMH_RAM) AM_BASE(&deco32_pf3_rowscroll)
854		AM_RANGE(0x1e4000, 0x1e4fff) AM_WRITE(SMH_RAM) AM_BASE(&deco32_pf4_rowscroll)
855
856		AM_RANGE(0x204800, 0x204fff) AM_WRITE(SMH_RAM) // ace? 0x10 byte increments only  // 13f ff stuff
857
858		AM_RANGE(0x208000, 0x208fff) AM_WRITE(SMH_RAM) AM_BASE(&dragngun_sprite_layout_0_ram)
859		AM_RANGE(0x20c000, 0x20cfff) AM_WRITE(SMH_RAM) AM_BASE(&dragngun_sprite_layout_1_ram)
860		AM_RANGE(0x210000, 0x217fff) AM_WRITE(SMH_RAM) AM_BASE(&dragngun_sprite_lookup_0_ram)
861		AM_RANGE(0x218000, 0x21ffff) AM_WRITE(SMH_RAM) AM_BASE(&dragngun_sprite_lookup_1_ram)
862		AM_RANGE(0x220000, 0x221fff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram32) AM_SIZE(&spriteram_size)
863		AM_RANGE(0x228000, 0x2283ff) AM_WRITE(SMH_RAM) /* ? */
864	784	AM_RANGE(0x230000, 0x230003) AM_WRITE(dragngun_spriteram_dma_w)
865	785
866		AM_RANGE(0x300000, 0x3fffff) AM_WRITE(SMH_ROM)
	786	AM_RANGE(0x300000, 0x3fffff) AM_ROM
867	787
868		AM_RANGE(0x400000, 0x400003) AM_DEVWRITE8("oki3", okim6295_w, 0x000000ff)
	788	AM_RANGE(0x400000, 0x400003) AM_DEVREADWRITE8("oki3", okim6295_r, okim6295_w, 0x000000ff)
869	789	AM_RANGE(0x410000, 0x410003) AM_WRITENOP /* Some kind of serial bit-stream - digital volume control? */
870		AM_RANGE(0x420000, 0x420003) AM_WRITE(dragngun_eeprom_w)
871		AM_RANGE(0x430000, 0x43001f) AM_WRITE(dragngun_lightgun_w)
	790	AM_RANGE(0x420000, 0x420003) AM_READWRITE(dragngun_eeprom_r, dragngun_eeprom_w)
	791	AM_RANGE(0x438000, 0x438003) AM_READWRITE(dragngun_lightgun_r, dragngun_lightgun_w)
	792	AM_RANGE(0x440000, 0x440003) AM_READ(dragngun_service_r)
	793
872	794	AM_RANGE(0x500000, 0x500003) AM_WRITE(dragngun_sprite_control_w)
873	795	ADDRESS_MAP_END
874	796
875		static ADDRESS_MAP_START( lockload_readmem, ADDRESS_SPACE_PROGRAM, 32 )
876		AM_RANGE(0x000000, 0x0fffff) AM_READ(SMH_ROM)
877		AM_RANGE(0x100000, 0x11ffff) AM_READ(SMH_RAM)
	797	static ADDRESS_MAP_START( lockload_map, ADDRESS_SPACE_PROGRAM, 32 )
	798	AM_RANGE(0x000000, 0x0fffff) AM_ROM
	799	AM_RANGE(0x100000, 0x11ffff) AM_RAM AM_BASE(&deco32_ram)
878	800	AM_RANGE(0x120000, 0x120fff) AM_READ(dragngun_prot_r)
879		AM_RANGE(0x128000, 0x12800f) AM_READ(deco32_irq_controller_r)
880		AM_RANGE(0x130000, 0x131fff) AM_READ(SMH_RAM)
881		AM_RANGE(0x138000, 0x138003) AM_READ(SMH_RAM) //palette dma complete in bit 0x8? ack?  return 0 else tight loop
882
883		AM_RANGE(0x170000, 0x170007) AM_READ(lockload_gun_mirror_r) /* Not on Dragongun */
884
885		AM_RANGE(0x180000, 0x18001f) AM_READ(SMH_RAM)
886		AM_RANGE(0x190000, 0x191fff) AM_READ(SMH_RAM)
887		AM_RANGE(0x194000, 0x195fff) AM_READ(SMH_RAM)
888		AM_RANGE(0x1a0000, 0x1a0fff) AM_READ(SMH_RAM)
889		AM_RANGE(0x1a4000, 0x1a4fff) AM_READ(SMH_RAM)
890
891		AM_RANGE(0x1c0000, 0x1c001f) AM_READ(SMH_RAM)
892		AM_RANGE(0x1d0000, 0x1d1fff) AM_READ(SMH_RAM)
893		AM_RANGE(0x1d4000, 0x1d5fff) AM_READ(SMH_RAM)
894		AM_RANGE(0x1e0000, 0x1e0fff) AM_READ(SMH_RAM)
895		AM_RANGE(0x1e4000, 0x1e4fff) AM_READ(SMH_RAM)
896
897		AM_RANGE(0x208000, 0x208fff) AM_READ(SMH_RAM)
898		AM_RANGE(0x20c000, 0x20cfff) AM_READ(SMH_RAM)
899		AM_RANGE(0x210000, 0x217fff) AM_READ(SMH_RAM)
900		AM_RANGE(0x218000, 0x21ffff) AM_READ(SMH_RAM)
901		AM_RANGE(0x220000, 0x221fff) AM_READ(SMH_RAM) /* Main spriteram */
902
903		AM_RANGE(0x204800, 0x204fff) AM_READ(SMH_RAM) //0x10 byte increments only
904		AM_RANGE(0x228000, 0x2283ff) AM_READ(SMH_RAM) //0x10 byte increments only
905
906		AM_RANGE(0x300000, 0x3fffff) AM_READ(SMH_ROM)
907
908		AM_RANGE(0x400000, 0x400003) AM_DEVREAD8("oki3", okim6295_r, 0x000000ff)
909		AM_RANGE(0x420000, 0x420003) AM_READ(dragngun_eeprom_r)
910		//  AM_RANGE(0x438000, 0x438003) AM_READ(dragngun_lightgun_r)
911		AM_RANGE(0x440000, 0x440003) AM_READ(dragngun_service_r)
912		ADDRESS_MAP_END
913
914
915		static ADDRESS_MAP_START( lockload_writemem, ADDRESS_SPACE_PROGRAM, 32 )
916		AM_RANGE(0x000000, 0x0fffff) AM_WRITE(SMH_ROM)
917		AM_RANGE(0x100000, 0x11ffff) AM_WRITE(SMH_RAM) AM_BASE(&deco32_ram)
918	801	AM_RANGE(0x1204c0, 0x1204c3) AM_WRITE(deco32_sound_w)
919		AM_RANGE(0x128000, 0x12800f) AM_WRITE(deco32_irq_controller_w)
	802	AM_RANGE(0x128000, 0x12800f) AM_READWRITE(deco32_irq_controller_r, deco32_irq_controller_w)
920	803
921		AM_RANGE(0x130000, 0x131fff) AM_WRITE(deco32_buffered_palette_w) AM_BASE(&paletteram32)
922		AM_RANGE(0x138000, 0x138003) AM_WRITENOP // palette mode?  check
	804	AM_RANGE(0x130000, 0x131fff) AM_RAM_WRITE(deco32_buffered_palette_w) AM_BASE(&paletteram32)
	805	AM_RANGE(0x138000, 0x138003) AM_READWRITE(SMH_RAM, SMH_NOP) //palette dma complete in bit 0x8? ack?  return 0 else tight loop
923	806	AM_RANGE(0x138008, 0x13800b) AM_WRITE(deco32_palette_dma_w)
	807
	808	AM_RANGE(0x170000, 0x170007) AM_READ(lockload_gun_mirror_r) /* Not on Dragongun */
924	809	AM_RANGE(0x178008, 0x17800f) AM_WRITENOP /* Gun read ACK's */
925	810
926		AM_RANGE(0x180000, 0x18001f) AM_WRITE(SMH_RAM) AM_BASE(&deco32_pf12_control)
927		AM_RANGE(0x190000, 0x191fff) AM_WRITE(deco32_pf1_data_w) AM_BASE(&deco32_pf1_data)
928		AM_RANGE(0x194000, 0x195fff) AM_WRITE(deco32_pf2_data_w) AM_BASE(&deco32_pf2_data)
929		AM_RANGE(0x1a0000, 0x1a0fff) AM_WRITE(SMH_RAM) AM_BASE(&deco32_pf1_rowscroll)
930		AM_RANGE(0x1a4000, 0x1a4fff) AM_WRITE(SMH_RAM) AM_BASE(&deco32_pf2_rowscroll)
	811	AM_RANGE(0x180000, 0x18001f) AM_RAM AM_BASE(&deco32_pf12_control)
	812	AM_RANGE(0x190000, 0x191fff) AM_RAM_WRITE(deco32_pf1_data_w) AM_BASE(&deco32_pf1_data)
	813	AM_RANGE(0x194000, 0x195fff) AM_RAM_WRITE(deco32_pf2_data_w) AM_BASE(&deco32_pf2_data)
	814	AM_RANGE(0x1a0000, 0x1a0fff) AM_RAM AM_BASE(&deco32_pf1_rowscroll)
	815	AM_RANGE(0x1a4000, 0x1a4fff) AM_RAM AM_BASE(&deco32_pf2_rowscroll)
931	816
932		AM_RANGE(0x1c0000, 0x1c001f) AM_WRITE(SMH_RAM) AM_BASE(&deco32_pf34_control)
933		AM_RANGE(0x1d0000, 0x1d1fff) AM_WRITE(deco32_pf3_data_w) AM_BASE(&deco32_pf3_data)
934		AM_RANGE(0x1d4000, 0x1d5fff) AM_WRITE(deco32_pf4_data_w) AM_BASE(&deco32_pf4_data)
935		AM_RANGE(0x1e0000, 0x1e0fff) AM_WRITE(SMH_RAM) AM_BASE(&deco32_pf3_rowscroll)
936		AM_RANGE(0x1e4000, 0x1e4fff) AM_WRITE(SMH_RAM) AM_BASE(&deco32_pf4_rowscroll)
	817	AM_RANGE(0x1c0000, 0x1c001f) AM_RAM AM_BASE(&deco32_pf34_control)
	818	AM_RANGE(0x1d0000, 0x1d1fff) AM_RAM_WRITE(deco32_pf3_data_w) AM_BASE(&deco32_pf3_data)
	819	AM_RANGE(0x1d4000, 0x1d5fff) AM_RAM_WRITE(deco32_pf4_data_w) AM_BASE(&deco32_pf4_data)
	820	AM_RANGE(0x1e0000, 0x1e0fff) AM_RAM AM_BASE(&deco32_pf3_rowscroll)
	821	AM_RANGE(0x1e4000, 0x1e4fff) AM_RAM AM_BASE(&deco32_pf4_rowscroll)
937	822
938		AM_RANGE(0x204800, 0x204fff) AM_WRITE(SMH_RAM) // ace? 0x10 byte increments only  // 13f ff stuff
	823	AM_RANGE(0x204800, 0x204fff) AM_RAM            //0x10 byte increments only
	824	AM_RANGE(0x208000, 0x208fff) AM_RAM AM_BASE(&dragngun_sprite_layout_0_ram)
	825	AM_RANGE(0x20c000, 0x20cfff) AM_RAM AM_BASE(&dragngun_sprite_layout_1_ram)
	826	AM_RANGE(0x210000, 0x217fff) AM_RAM AM_BASE(&dragngun_sprite_lookup_0_ram)
	827	AM_RANGE(0x218000, 0x21ffff) AM_RAM AM_BASE(&dragngun_sprite_lookup_1_ram)
	828	AM_RANGE(0x220000, 0x221fff) AM_RAM AM_BASE(&spriteram32) AM_SIZE(&spriteram_size) /* Main spriteram */
939	829
940		AM_RANGE(0x208000, 0x208fff) AM_WRITE(SMH_RAM) AM_BASE(&dragngun_sprite_layout_0_ram)
941		AM_RANGE(0x20c000, 0x20cfff) AM_WRITE(SMH_RAM) AM_BASE(&dragngun_sprite_layout_1_ram)
942		AM_RANGE(0x210000, 0x217fff) AM_WRITE(SMH_RAM) AM_BASE(&dragngun_sprite_lookup_0_ram)
943		AM_RANGE(0x218000, 0x21ffff) AM_WRITE(SMH_RAM) AM_BASE(&dragngun_sprite_lookup_1_ram)
944		AM_RANGE(0x220000, 0x221fff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram32) AM_SIZE(&spriteram_size)
945
946		AM_RANGE(0x228000, 0x2283ff) AM_WRITE(SMH_RAM)
947
	830	AM_RANGE(0x228000, 0x2283ff) AM_RAM            //0x10 byte increments only
948	831	AM_RANGE(0x230000, 0x230003) AM_WRITE(dragngun_spriteram_dma_w)
949	832
950		AM_RANGE(0x300000, 0x3fffff) AM_WRITE(SMH_ROM)
951		AM_RANGE(0x400000, 0x400003) AM_DEVWRITE8("oki3", okim6295_w, 0x000000ff)
952		AM_RANGE(0x420000, 0x420003) AM_WRITE(dragngun_eeprom_w)
	833	AM_RANGE(0x300000, 0x3fffff) AM_ROM
	834
	835	AM_RANGE(0x400000, 0x400003) AM_DEVREADWRITE8("oki3", okim6295_r, okim6295_w, 0x000000ff)
	836	AM_RANGE(0x420000, 0x420003) AM_READWRITE(dragngun_eeprom_r, dragngun_eeprom_w)
953	837	//  AM_RANGE(0x430000, 0x43001f) AM_WRITE(dragngun_lightgun_w)
	838	//  AM_RANGE(0x438000, 0x438003) AM_READ(dragngun_lightgun_r)
	839	AM_RANGE(0x440000, 0x440003) AM_READ(dragngun_service_r)
954	840	AM_RANGE(0x500000, 0x500003) AM_WRITE(dragngun_sprite_control_w)
955	841	ADDRESS_MAP_END
956	842
957		static ADDRESS_MAP_START( tattass_readmem, ADDRESS_SPACE_PROGRAM, 32 )
958		AM_RANGE(0x000000, 0x0fffff) AM_READ(SMH_ROM)
959		AM_RANGE(0x100000, 0x11ffff) AM_READ(SMH_RAM)
960		AM_RANGE(0x120000, 0x120003) AM_READNOP /* ACIA (unused) */
	843	static ADDRESS_MAP_START( tattass_map, ADDRESS_SPACE_PROGRAM, 32 )
961	844
962		AM_RANGE(0x162000, 0x162fff) AM_READ(SMH_RAM) /* 'Jack' RAM!? */
963		AM_RANGE(0x163000, 0x16309f) AM_READ(SMH_RAM)
964		AM_RANGE(0x168000, 0x169fff) AM_READ(SMH_RAM)
965
966		AM_RANGE(0x170000, 0x171fff) AM_READ(SMH_RAM)
967		AM_RANGE(0x178000, 0x179fff) AM_READ(SMH_RAM)
968
969		AM_RANGE(0x182000, 0x183fff) AM_READ(SMH_RAM)
970		AM_RANGE(0x184000, 0x185fff) AM_READ(SMH_RAM)
971		AM_RANGE(0x192000, 0x1927ff) AM_READ(SMH_RAM)
972		AM_RANGE(0x192800, 0x193fff) AM_READ(SMH_RAM)
973		AM_RANGE(0x194000, 0x1947ff) AM_READ(SMH_RAM)
974		AM_RANGE(0x194800, 0x195fff) AM_READ(SMH_RAM)
975		AM_RANGE(0x1a0000, 0x1a001f) AM_READ(SMH_RAM)
976
977		AM_RANGE(0x1c2000, 0x1c3fff) AM_READ(SMH_RAM)
978		AM_RANGE(0x1c4000, 0x1c5fff) AM_READ(SMH_RAM)
979		AM_RANGE(0x1d2000, 0x1d27ff) AM_READ(SMH_RAM)
980		AM_RANGE(0x1d2800, 0x1d3fff) AM_READ(SMH_RAM)
981		AM_RANGE(0x1d4000, 0x1d47ff) AM_READ(SMH_RAM)
982		AM_RANGE(0x1d4800, 0x1d5fff) AM_READ(SMH_RAM)
983		AM_RANGE(0x1e0000, 0x1e001f) AM_READ(SMH_RAM)
984
985		AM_RANGE(0x200000, 0x200fff) AM_READ(tattass_prot_r)
986		ADDRESS_MAP_END
987
988		static ADDRESS_MAP_START( tattass_writemem, ADDRESS_SPACE_PROGRAM, 32 )
989		AM_RANGE(0x000000, 0x0f7fff) AM_WRITE(SMH_ROM)
990		AM_RANGE(0x0f8000, 0x0fffff) AM_WRITENOP /* Screen area on debug board? Cleared on startup */
991		AM_RANGE(0x100000, 0x11ffff) AM_WRITE(SMH_RAM) AM_BASE(&deco32_ram)
992
993		AM_RANGE(0x120000, 0x120003) AM_WRITENOP /* ACIA (unused) */
994		AM_RANGE(0x130000, 0x130003) AM_WRITENOP /* Coin port (unused?) */
995		AM_RANGE(0x140000, 0x140003) AM_WRITENOP /* Vblank ack */
	845	AM_RANGE(0x000000, 0x0f7fff) AM_ROM
	846	AM_RANGE(0x0f8000, 0x0fffff) AM_READWRITE(SMH_ROM, SMH_NOP)
	847	AM_RANGE(0x100000, 0x11ffff) AM_RAM AM_BASE(&deco32_ram)
	848	AM_RANGE(0x120000, 0x120003) AM_NOP            /* ACIA (unused) */
	849	AM_RANGE(0x130000, 0x130003) AM_WRITENOP       /* Coin port (unused?) */
	850	AM_RANGE(0x140000, 0x140003) AM_WRITENOP       /* Vblank ack */
996	851	AM_RANGE(0x150000, 0x150003) AM_WRITE(tattass_control_w) /* Volume port/Eprom/Priority */
997	852
998		AM_RANGE(0x162000, 0x162fff) AM_WRITE(SMH_RAM) /* 'Jack' RAM!? */
999		AM_RANGE(0x163000, 0x16309f) AM_WRITE(deco32_ace_ram_w) AM_BASE(&deco32_ace_ram) /* 'Ace' RAM!? */
1000
	853	AM_RANGE(0x162000, 0x162fff) AM_RAM            /* 'Jack' RAM!? */
	854	AM_RANGE(0x163000, 0x16309f) AM_RAM_WRITE(deco32_ace_ram_w) AM_BASE(&deco32_ace_ram)
1001	855	AM_RANGE(0x164000, 0x164003) AM_WRITENOP /* Palette control BG2/3 ($1a constant) */
1002	856	AM_RANGE(0x164004, 0x164007) AM_WRITENOP /* Palette control Obj1 ($6 constant) */
1003	857	AM_RANGE(0x164008, 0x16400b) AM_WRITENOP /* Palette control Obj2 ($5 constant) */
1004	858	AM_RANGE(0x16400c, 0x16400f) AM_WRITENOP
1005		AM_RANGE(0x168000, 0x169fff) AM_WRITE(deco32_buffered_palette_w) AM_BASE(&paletteram32)
	859	AM_RANGE(0x168000, 0x169fff) AM_RAM_WRITE(deco32_buffered_palette_w) AM_BASE(&paletteram32)
1006	860	AM_RANGE(0x16c000, 0x16c003) AM_WRITENOP
1007	861	AM_RANGE(0x16c008, 0x16c00b) AM_WRITE(deco32_palette_dma_w)
1008	862
1009		AM_RANGE(0x170000, 0x171fff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram32) AM_SIZE(&spriteram_size)
	863	AM_RANGE(0x170000, 0x171fff) AM_RAM AM_BASE(&spriteram32) AM_SIZE(&spriteram_size)
1010	864	AM_RANGE(0x174000, 0x174003) AM_WRITENOP /* Sprite DMA mode (2) */
1011	865	AM_RANGE(0x174010, 0x174013) AM_WRITE(buffer_spriteram32_w)
1012	866	AM_RANGE(0x174018, 0x17401b) AM_WRITENOP /* Sprite 'CPU' (unused) */
	867	AM_RANGE(0x178000, 0x179fff) AM_RAM AM_BASE(&spriteram32_2) AM_SIZE(&spriteram_2_size)
1013	868
1014		AM_RANGE(0x178000, 0x179fff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram32_2) AM_SIZE(&spriteram_2_size)
1015		AM_RANGE(0x17c000, 0x17c003) AM_WRITENOP /* Sprite DMA mode (2) */
1016		AM_RANGE(0x17c010, 0x17c013) AM_WRITE(buffer_spriteram32_2_w)
1017		AM_RANGE(0x17c018, 0x17c01b) AM_WRITENOP /* Sprite 'CPU' (unused) */
	869	AM_RANGE(0x182000, 0x183fff) AM_RAM_WRITE(deco32_pf1_data_w) AM_BASE(&deco32_pf1_data)
	870	AM_RANGE(0x184000, 0x185fff) AM_RAM_WRITE(deco32_pf2_data_w) AM_BASE(&deco32_pf2_data)
	871	AM_RANGE(0x192000, 0x193fff) AM_RAM AM_BASE(&deco32_pf1_rowscroll)
	872	AM_RANGE(0x194000, 0x195fff) AM_RAM AM_BASE(&deco32_pf2_rowscroll)
	873	AM_RANGE(0x1a0000, 0x1a001f) AM_RAM AM_BASE(&deco32_pf12_control)
1018	874
1019		AM_RANGE(0x182000, 0x183fff) AM_WRITE(deco32_pf1_data_w) AM_BASE(&deco32_pf1_data)
1020		AM_RANGE(0x184000, 0x185fff) AM_WRITE(deco32_pf2_data_w) AM_BASE(&deco32_pf2_data)
1021		AM_RANGE(0x192000, 0x193fff) AM_WRITE(SMH_RAM) AM_BASE(&deco32_pf1_rowscroll)
1022		AM_RANGE(0x194000, 0x195fff) AM_WRITE(SMH_RAM) AM_BASE(&deco32_pf2_rowscroll)
1023		AM_RANGE(0x1a0000, 0x1a001f) AM_WRITE(SMH_RAM) AM_BASE(&deco32_pf12_control)
	875	AM_RANGE(0x1c2000, 0x1c3fff) AM_RAM_WRITE(deco32_pf3_data_w) AM_BASE(&deco32_pf3_data)
	876	AM_RANGE(0x1c4000, 0x1c5fff) AM_RAM_WRITE(deco32_pf4_data_w) AM_BASE(&deco32_pf4_data)
	877	AM_RANGE(0x1d2000, 0x1d3fff) AM_RAM AM_BASE(&deco32_pf3_rowscroll)
	878	AM_RANGE(0x1d4000, 0x1d5fff) AM_RAM AM_BASE(&deco32_pf4_rowscroll)
	879	AM_RANGE(0x1e0000, 0x1e001f) AM_RAM AM_BASE(&deco32_pf34_control)
1024	880
1025		AM_RANGE(0x1c2000, 0x1c3fff) AM_WRITE(deco32_pf3_data_w) AM_BASE(&deco32_pf3_data)
1026		AM_RANGE(0x1c4000, 0x1c5fff) AM_WRITE(deco32_pf4_data_w) AM_BASE(&deco32_pf4_data)
1027		AM_RANGE(0x1d2000, 0x1d3fff) AM_WRITE(SMH_RAM) AM_BASE(&deco32_pf3_rowscroll)
1028		AM_RANGE(0x1d4000, 0x1d5fff) AM_WRITE(SMH_RAM) AM_BASE(&deco32_pf4_rowscroll)
1029		AM_RANGE(0x1e0000, 0x1e001f) AM_WRITE(SMH_RAM) AM_BASE(&deco32_pf34_control)
1030
1031		AM_RANGE(0x200000, 0x200fff) AM_WRITE(tattass_prot_w) AM_BASE(&deco32_prot_ram)
	881	AM_RANGE(0x200000, 0x200fff) AM_READWRITE(tattass_prot_r, tattass_prot_w) AM_BASE(&deco32_prot_ram)
1032	882	ADDRESS_MAP_END
1033	883
1034		static ADDRESS_MAP_START( nslasher_readmem, ADDRESS_SPACE_PROGRAM, 32 )
1035		AM_RANGE(0x000000, 0x0fffff) AM_READ(SMH_ROM)
1036		AM_RANGE(0x100000, 0x11ffff) AM_READ(SMH_RAM)
1037		AM_RANGE(0x120000, 0x1200ff) AM_READNOP /* ACIA (unused) */
	884	static ADDRESS_MAP_START( nslasher_map, ADDRESS_SPACE_PROGRAM, 32 )
	885	AM_RANGE(0x000000, 0x0fffff) AM_ROM
	886	AM_RANGE(0x100000, 0x11ffff) AM_RAM AM_BASE(&deco32_ram)
	887	AM_RANGE(0x120000, 0x1200ff) AM_NOP                     /* ACIA (unused) */
	888	AM_RANGE(0x140000, 0x140003) AM_WRITENOP                /* Vblank ack */
	889	AM_RANGE(0x150000, 0x150003) AM_WRITE(nslasher_eeprom_w)    /* Volume port/Eprom/Priority */
1038	890
1039		AM_RANGE(0x163000, 0x16309f) AM_READ(SMH_RAM)
1040		AM_RANGE(0x168000, 0x169fff) AM_READ(SMH_RAM)
1041
1042		AM_RANGE(0x170000, 0x171fff) AM_READ(SMH_RAM)
1043		AM_RANGE(0x178000, 0x179fff) AM_READ(SMH_RAM)
1044
1045		AM_RANGE(0x182000, 0x183fff) AM_READ(SMH_RAM)
1046		AM_RANGE(0x184000, 0x185fff) AM_READ(SMH_RAM)
1047		AM_RANGE(0x192000, 0x1927ff) AM_READ(SMH_RAM)
1048		AM_RANGE(0x192800, 0x193fff) AM_READ(SMH_RAM)
1049		AM_RANGE(0x194000, 0x1947ff) AM_READ(SMH_RAM)
1050		AM_RANGE(0x194800, 0x195fff) AM_READ(SMH_RAM)
1051		AM_RANGE(0x1a0000, 0x1a001f) AM_READ(SMH_RAM)
1052
1053		AM_RANGE(0x1c2000, 0x1c3fff) AM_READ(SMH_RAM)
1054		AM_RANGE(0x1c4000, 0x1c5fff) AM_READ(SMH_RAM)
1055		AM_RANGE(0x1d2000, 0x1d27ff) AM_READ(SMH_RAM)
1056		AM_RANGE(0x1d2800, 0x1d3fff) AM_READ(SMH_RAM)
1057		AM_RANGE(0x1d4000, 0x1d47ff) AM_READ(SMH_RAM)
1058		AM_RANGE(0x1d4800, 0x1d5fff) AM_READ(SMH_RAM)
1059		AM_RANGE(0x1e0000, 0x1e001f) AM_READ(SMH_RAM)
1060
1061		AM_RANGE(0x200000, 0x200fff) AM_READ(nslasher_prot_r)
1062		ADDRESS_MAP_END
1063
1064		static ADDRESS_MAP_START( nslasher_writemem, ADDRESS_SPACE_PROGRAM, 32 )
1065		AM_RANGE(0x000000, 0x0fffff) AM_WRITE(SMH_ROM)
1066		AM_RANGE(0x100000, 0x11ffff) AM_WRITE(SMH_RAM) AM_BASE(&deco32_ram)
1067
1068		AM_RANGE(0x120000, 0x120003) AM_WRITENOP /* ACIA (unused) */
1069		//  AM_RANGE(0x130000, 0x130003) AM_WRITENOP /* Coin port (unused?) */
1070		AM_RANGE(0x140000, 0x140003) AM_WRITENOP /* Vblank ack */
1071		AM_RANGE(0x150000, 0x150003) AM_WRITE(nslasher_eeprom_w) /* Volume port/Eprom/Priority */
1072
1073		AM_RANGE(0x163000, 0x16309f) AM_WRITE(deco32_ace_ram_w) AM_BASE(&deco32_ace_ram) /* 'Ace' RAM!? */
	891	AM_RANGE(0x163000, 0x16309f) AM_RAM_WRITE(deco32_ace_ram_w) AM_BASE(&deco32_ace_ram) /* 'Ace' RAM!? */
1074	892	AM_RANGE(0x164000, 0x164003) AM_WRITENOP /* Palette control BG2/3 ($1a constant) */
1075	893	AM_RANGE(0x164004, 0x164007) AM_WRITENOP /* Palette control Obj1 ($4 constant) */
1076	894	AM_RANGE(0x164008, 0x16400b) AM_WRITENOP /* Palette control Obj2 ($6 constant) */
1077	895	AM_RANGE(0x16400c, 0x16400f) AM_WRITENOP
1078		AM_RANGE(0x168000, 0x169fff) AM_WRITE(deco32_buffered_palette_w) AM_BASE(&paletteram32)
	896	AM_RANGE(0x168000, 0x169fff) AM_RAM_WRITE(deco32_buffered_palette_w) AM_BASE(&paletteram32)
1079	897	AM_RANGE(0x16c000, 0x16c003) AM_WRITENOP
1080	898	AM_RANGE(0x16c008, 0x16c00b) AM_WRITE(deco32_palette_dma_w)
1081	899
1082		AM_RANGE(0x170000, 0x171fff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram32) AM_SIZE(&spriteram_size)
	900	AM_RANGE(0x170000, 0x171fff) AM_RAM_WRITE(SMH_RAM) AM_BASE(&spriteram32) AM_SIZE(&spriteram_size)
1083	901	AM_RANGE(0x174000, 0x174003) AM_WRITENOP /* Sprite DMA mode (2) */
1084	902	AM_RANGE(0x174010, 0x174013) AM_WRITE(buffer_spriteram32_w)
1085	903	AM_RANGE(0x174018, 0x17401b) AM_WRITENOP /* Sprite 'CPU' (unused) */
1086
1087		AM_RANGE(0x178000, 0x179fff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram32_2) AM_SIZE(&spriteram_2_size)
	904	AM_RANGE(0x178000, 0x179fff) AM_RAM_WRITE(SMH_RAM) AM_BASE(&spriteram32_2) AM_SIZE(&spriteram_2_size)
1088	905	AM_RANGE(0x17c000, 0x17c003) AM_WRITENOP /* Sprite DMA mode (2) */
1089	906	AM_RANGE(0x17c010, 0x17c013) AM_WRITE(buffer_spriteram32_2_w)
1090	907	AM_RANGE(0x17c018, 0x17c01b) AM_WRITENOP /* Sprite 'CPU' (unused) */
1091	908
1092		AM_RANGE(0x182000, 0x183fff) AM_WRITE(deco32_pf1_data_w) AM_BASE(&deco32_pf1_data)
1093		AM_RANGE(0x184000, 0x185fff) AM_WRITE(deco32_pf2_data_w) AM_BASE(&deco32_pf2_data)
1094		AM_RANGE(0x192000, 0x193fff) AM_WRITE(SMH_RAM) AM_BASE(&deco32_pf1_rowscroll)
1095		AM_RANGE(0x194000, 0x195fff) AM_WRITE(SMH_RAM) AM_BASE(&deco32_pf2_rowscroll)
1096		AM_RANGE(0x1a0000, 0x1a001f) AM_WRITE(SMH_RAM) AM_BASE(&deco32_pf12_control)
	909	AM_RANGE(0x182000, 0x183fff) AM_RAM_WRITE(deco32_pf1_data_w) AM_BASE(&deco32_pf1_data)
	910	AM_RANGE(0x184000, 0x185fff) AM_RAM_WRITE(deco32_pf2_data_w) AM_BASE(&deco32_pf2_data)
	911	AM_RANGE(0x192000, 0x193fff) AM_RAM AM_BASE(&deco32_pf1_rowscroll)
	912	AM_RANGE(0x194000, 0x195fff) AM_RAM AM_BASE(&deco32_pf2_rowscroll)
	913	AM_RANGE(0x1a0000, 0x1a001f) AM_RAM AM_BASE(&deco32_pf12_control)
1097	914
1098		AM_RANGE(0x1c2000, 0x1c3fff) AM_WRITE(deco32_pf3_data_w) AM_BASE(&deco32_pf3_data)
1099		AM_RANGE(0x1c4000, 0x1c5fff) AM_WRITE(deco32_pf4_data_w) AM_BASE(&deco32_pf4_data)
1100		AM_RANGE(0x1d2000, 0x1d3fff) AM_WRITE(SMH_RAM) AM_BASE(&deco32_pf3_rowscroll)
1101		AM_RANGE(0x1d4000, 0x1d5fff) AM_WRITE(SMH_RAM) AM_BASE(&deco32_pf4_rowscroll)
1102		AM_RANGE(0x1e0000, 0x1e001f) AM_WRITE(SMH_RAM) AM_BASE(&deco32_pf34_control)
	915	AM_RANGE(0x1c2000, 0x1c3fff) AM_RAM_WRITE(deco32_pf3_data_w) AM_BASE(&deco32_pf3_data)
	916	AM_RANGE(0x1c4000, 0x1c5fff) AM_RAM_WRITE(deco32_pf4_data_w) AM_BASE(&deco32_pf4_data)
	917	AM_RANGE(0x1d2000, 0x1d3fff) AM_RAM AM_BASE(&deco32_pf3_rowscroll)
	918	AM_RANGE(0x1d4000, 0x1d5fff) AM_RAM AM_BASE(&deco32_pf4_rowscroll)
	919	AM_RANGE(0x1e0000, 0x1e001f) AM_RAM AM_BASE(&deco32_pf34_control)
1103	920
1104		AM_RANGE(0x200000, 0x200fff) AM_WRITE(nslasher_prot_w) AM_BASE(&deco32_prot_ram)
	921	AM_RANGE(0x200000, 0x200fff) AM_READWRITE(nslasher_prot_r, nslasher_prot_w) AM_BASE(&deco32_prot_ram)
1105	922	ADDRESS_MAP_END
1106	923
1107	924	/******************************************************************************/
r4679	r4680
1124	941
1125	942	static WRITE8_DEVICE_HANDLER(deco32_bsmt1_w)
1126	943	{
1127		bsmt2000_data_w(device, offset^ 0xff, ((bsmt_latch<<8)|data), 0xffff);
1128		cpu_set_input_line(device->machine->cpu[1], M6809_IRQ_LINE, HOLD_LINE); /* BSMT is ready */
	944	bsmt2000_data_w(device, offset^ 0xff, ((bsmt_latch << 8) | data), 0xffff);
	945	cputag_set_input_line(device->machine, "audiocpu", M6809_IRQ_LINE, HOLD_LINE); /* BSMT is ready */
1129	946	}
1130	947
1131	948	static READ8_HANDLER(deco32_bsmt_status_r)
r4679	r4680
1133	950	return 0x80;
1134	951	}
1135	952
1136		static ADDRESS_MAP_START( sound_readmem, ADDRESS_SPACE_PROGRAM, 8 )
1137		AM_RANGE(0x000000, 0x00ffff) AM_READ(SMH_ROM)
1138		AM_RANGE(0x110000, 0x110001) AM_DEVREAD("ym", ym2151_r)
1139		AM_RANGE(0x120000, 0x120001) AM_DEVREAD("oki1", okim6295_r)
1140		AM_RANGE(0x130000, 0x130001) AM_DEVREAD("oki2", okim6295_r)
	953	static ADDRESS_MAP_START( sound_map, ADDRESS_SPACE_PROGRAM, 8 )
	954	AM_RANGE(0x000000, 0x00ffff) AM_ROM
	955	AM_RANGE(0x110000, 0x110001) AM_DEVREADWRITE("ym", ym2151_r, ym2151_w)
	956	AM_RANGE(0x120000, 0x120001) AM_DEVREADWRITE("oki1", okim6295_r, okim6295_w)
	957	AM_RANGE(0x130000, 0x130001) AM_DEVREADWRITE("oki2", okim6295_r, okim6295_w)
1141	958	AM_RANGE(0x140000, 0x140001) AM_READ(soundlatch_r)
1142		AM_RANGE(0x1f0000, 0x1f1fff) AM_READ(SMH_BANK8)
1143		ADDRESS_MAP_END
1144
1145		static ADDRESS_MAP_START( sound_writemem, ADDRESS_SPACE_PROGRAM, 8 )
1146		AM_RANGE(0x000000, 0x00ffff) AM_WRITE(SMH_ROM)
1147		AM_RANGE(0x110000, 0x110001) AM_DEVWRITE("ym", ym2151_w)
1148		AM_RANGE(0x120000, 0x120001) AM_DEVWRITE("oki1", okim6295_w)
1149		AM_RANGE(0x130000, 0x130001) AM_DEVWRITE("oki2", okim6295_w)
1150		AM_RANGE(0x1f0000, 0x1f1fff) AM_WRITE(SMH_BANK8)
	959	AM_RANGE(0x1f0000, 0x1f1fff) AM_RAMBANK(8)
1151	960	AM_RANGE(0x1fec00, 0x1fec01) AM_WRITE(h6280_timer_w)
1152	961	AM_RANGE(0x1ff400, 0x1ff403) AM_WRITE(h6280_irq_status_w)
1153	962	ADDRESS_MAP_END
1154	963
1155		static ADDRESS_MAP_START( sound_readmem_tattass, ADDRESS_SPACE_PROGRAM, 8 )
1156		AM_RANGE(0x0000, 0x1fff) AM_READ(SMH_RAM)
	964	static ADDRESS_MAP_START( tattass_sound_map, ADDRESS_SPACE_PROGRAM, 8 )
	965	AM_RANGE(0x0000, 0x1fff) AM_RAM
	966	AM_RANGE(0x2000, 0x2001) AM_WRITE(deco32_bsmt_reset_w)
1157	967	AM_RANGE(0x2002, 0x2003) AM_READ(soundlatch_r)
1158	968	AM_RANGE(0x2006, 0x2007) AM_READ(deco32_bsmt_status_r)
1159		AM_RANGE(0x2000, 0xffff) AM_READ(SMH_ROM)
1160		ADDRESS_MAP_END
1161
1162		static ADDRESS_MAP_START( sound_writemem_tattass, ADDRESS_SPACE_PROGRAM, 8 )
1163		AM_RANGE(0x0000, 0x1fff) AM_WRITE(SMH_RAM)
1164		AM_RANGE(0x2000, 0x2001) AM_WRITE(deco32_bsmt_reset_w)
1165	969	AM_RANGE(0x6000, 0x6000) AM_WRITE(deco32_bsmt0_w)
1166	970	AM_RANGE(0xa000, 0xa0ff) AM_DEVWRITE("bsmt", deco32_bsmt1_w)
1167		AM_RANGE(0x2000, 0xffff) AM_WRITE(SMH_ROM)
	971	AM_RANGE(0x2000, 0xffff) AM_ROM
1168	972	ADDRESS_MAP_END
1169	973
1170	974	static READ8_HANDLER(latch_r)
1171	975	{
1172	976	/* bit 1 of nslasher_sound_irq specifies IRQ command writes */
1173	977	nslasher_sound_irq &= ~0x02;
1174		cpu_set_input_line(space->machine->cpu[1], 0, (nslasher_sound_irq != 0) ? ASSERT_LINE : CLEAR_LINE);
	978	cputag_set_input_line(space->machine, "audiocpu", 0, (nslasher_sound_irq != 0) ? ASSERT_LINE : CLEAR_LINE);
1175	979	return soundlatch_r(space,0);
1176	980	}
1177	981
r4679	r4680
1769	1573
1770	1574	static void sound_irq(const device_config *device, int state)
1771	1575	{
1772		cpu_set_input_line(device->machine->cpu[1],1,state); /* IRQ 2 */
	1576	cputag_set_input_line(device->machine, "audiocpu", 1, state); /* IRQ 2 */
1773	1577	}
1774	1578
1775	1579	static void sound_irq_nslasher(const device_config *device, int state)
r4679	r4680
1779	1583	nslasher_sound_irq |= 0x01;
1780	1584	else
1781	1585	nslasher_sound_irq &= ~0x01;
1782		cpu_set_input_line(device->machine->cpu[1], 0, (nslasher_sound_irq != 0) ? ASSERT_LINE : CLEAR_LINE);
	1586	cputag_set_input_line(device->machine, "audiocpu", 0, (nslasher_sound_irq != 0) ? ASSERT_LINE : CLEAR_LINE);
1783	1587	}
1784	1588
1785	1589	static WRITE8_DEVICE_HANDLER( sound_bankswitch_w )
r4679	r4680
1865	1669
1866	1670	/* basic machine hardware */
1867	1671	MDRV_CPU_ADD("maincpu", ARM, 28000000/4)
1868		MDRV_CPU_PROGRAM_MAP(captaven_readmem,captaven_writemem)
	1672	MDRV_CPU_PROGRAM_MAP(captaven_map,0)
1869	1673	MDRV_CPU_VBLANK_INT("screen", deco32_vbl_interrupt)
1870	1674
1871	1675	MDRV_CPU_ADD("audiocpu", H6280, 32220000/8)
1872		MDRV_CPU_PROGRAM_MAP(sound_readmem,sound_writemem)
	1676	MDRV_CPU_PROGRAM_MAP(sound_map,0)
1873	1677
1874	1678	MDRV_MACHINE_RESET(deco32)
1875	1679
r4679	r4680
1912	1716
1913	1717	/* basic machine hardware */
1914	1718	MDRV_CPU_ADD("maincpu", ARM, 28000000/4)
1915		MDRV_CPU_PROGRAM_MAP(fghthist_readmem,fghthist_writemem)
	1719	MDRV_CPU_PROGRAM_MAP(fghthist_map,0)
1916	1720	MDRV_CPU_VBLANK_INT("screen", deco32_vbl_interrupt)
1917	1721
1918	1722	MDRV_CPU_ADD("audiocpu", H6280, 32220000/8)
1919		MDRV_CPU_PROGRAM_MAP(sound_readmem,sound_writemem)
	1723	MDRV_CPU_PROGRAM_MAP(sound_map,0)
1920	1724
1921	1725	MDRV_NVRAM_HANDLER(93C46)
1922	1726
r4679	r4680
1962	1766	MDRV_CPU_VBLANK_INT("screen", deco32_vbl_interrupt)
1963	1767
1964	1768	MDRV_CPU_ADD("audiocpu", H6280, 32220000/8)
1965		MDRV_CPU_PROGRAM_MAP(sound_readmem,sound_writemem)
	1769	MDRV_CPU_PROGRAM_MAP(sound_map,0)
1966	1770
1967	1771	MDRV_NVRAM_HANDLER(93C46)
1968	1772
r4679	r4680
2004	1808
2005	1809	/* basic machine hardware */
2006	1810	MDRV_CPU_ADD("maincpu", ARM, 28000000/4)
2007		MDRV_CPU_PROGRAM_MAP(dragngun_readmem,dragngun_writemem)
	1811	MDRV_CPU_PROGRAM_MAP(dragngun_map,0)
2008	1812	MDRV_CPU_VBLANK_INT("screen", deco32_vbl_interrupt)
2009	1813
2010	1814	MDRV_CPU_ADD("audiocpu", H6280, 32220000/8)
2011		MDRV_CPU_PROGRAM_MAP(sound_readmem,sound_writemem)
	1815	MDRV_CPU_PROGRAM_MAP(sound_map,0)
2012	1816
2013	1817	MDRV_MACHINE_RESET(deco32)
2014	1818	MDRV_NVRAM_HANDLER(93C46)
r4679	r4680
2057	1861
2058	1862	/* basic machine hardware */
2059	1863	MDRV_CPU_ADD("maincpu", ARM, 28000000/4)
2060		MDRV_CPU_PROGRAM_MAP(lockload_readmem,lockload_writemem)
	1864	MDRV_CPU_PROGRAM_MAP(lockload_map,0)
2061	1865	MDRV_CPU_VBLANK_INT_HACK(deco32_vbl_interrupt,2) // From 2
2062	1866
2063	1867	MDRV_CPU_ADD("audiocpu", H6280, 32220000/8)
2064		MDRV_CPU_PROGRAM_MAP(sound_readmem,sound_writemem)
	1868	MDRV_CPU_PROGRAM_MAP(sound_map,0)
2065	1869
2066	1870	MDRV_MACHINE_RESET(deco32)
2067	1871	MDRV_NVRAM_HANDLER(93C46)
r4679	r4680
2110	1914
2111	1915	/* basic machine hardware */
2112	1916	MDRV_CPU_ADD("maincpu", ARM, 28000000/4) /* Unconfirmed */
2113		MDRV_CPU_PROGRAM_MAP(tattass_readmem,tattass_writemem)
	1917	MDRV_CPU_PROGRAM_MAP(tattass_map,0)
2114	1918	MDRV_CPU_VBLANK_INT("screen", deco32_vbl_interrupt)
2115	1919
2116	1920	MDRV_CPU_ADD("audiocpu", M6809, 2000000)
2117		MDRV_CPU_PROGRAM_MAP(sound_readmem_tattass,sound_writemem_tattass)
	1921	MDRV_CPU_PROGRAM_MAP(tattass_sound_map,0)
2118	1922	MDRV_CPU_PERIODIC_INT(tattass_snd_interrupt, 489) /* Fixed FIRQ of 489Hz as measured on real (pinball) machine */
2119	1923
2120	1924	MDRV_NVRAM_HANDLER(tattass)
r4679	r4680
2146	1950
2147	1951	/* basic machine hardware */
2148	1952	MDRV_CPU_ADD("maincpu", ARM, 28322000/4)
2149		MDRV_CPU_PROGRAM_MAP(nslasher_readmem,nslasher_writemem)
	1953	MDRV_CPU_PROGRAM_MAP(nslasher_map,0)
2150	1954	MDRV_CPU_VBLANK_INT("screen", deco32_vbl_interrupt)
2151	1955
2152	1956	MDRV_CPU_ADD("audiocpu", Z80, 32220000/9)
r4679	r4680
3224	3028	static DRIVER_INIT( tattass )
3225	3029	{
3226	3030	UINT8 *RAM = memory_region(machine, "gfx1");
3227		UINT8 *tmp = malloc_or_die(0x80000);
	3031	UINT8 *tmp = alloc_array_or_die(UINT8, 0x80000);
3228	3032
3229	3033	/* Reorder bitplanes to make decoding easier */
3230	3034	memcpy(tmp,RAM+0x80000,0x80000);
r4679	r4680
3245	3049	static DRIVER_INIT( nslasher )
3246	3050	{
3247	3051	UINT8 *RAM = memory_region(machine, "gfx1");
3248		UINT8 *tmp = malloc_or_die(0x80000);
	3052	UINT8 *tmp = alloc_array_or_die(UINT8, 0x80000);
3249	3053
3250	3054	/* Reorder bitplanes to make decoding easier */
3251	3055	memcpy(tmp,RAM+0x80000,0x80000);

src/mame/drivers/midzeus.c

r4679	r4680
94	94	{
95	95	memcpy(ram_base, memory_region(machine, "user1"), 0x40000*4);
96	96	*ram_base <<= 1;
97		device_reset(machine->cpu[0]);
	97	device_reset(cputag_get_cpu(machine, "maincpu"));
98	98
99	99	cmos_protected = TRUE;
100	100	}
r4679	r4680
109	109
110	110	static TIMER_CALLBACK( display_irq_off )
111	111	{
112		cpu_set_input_line(machine->cpu[0], 0, CLEAR_LINE);
	112	cputag_set_input_line(machine, "maincpu", 0, CLEAR_LINE);
113	113	}
114	114
115	115	static INTERRUPT_GEN( display_irq )
r4679	r4680
441	441	static CUSTOM_INPUT( custom_49way_r )
442	442	{
443	443	static const UINT8 translate49[7] = { 0x8, 0xc, 0xe, 0xf, 0x3, 0x1, 0x0 };
444		const char *namex = param;
	444	const char *namex = (const char *)param;
445	445	const char *namey = namex + strlen(namex) + 1;
446	446	return (translate49[input_port_read(field->port->machine, namey) >> 4] << 4) | translate49[input_port_read(field->port->machine, namex) >> 4];
447	447	}
r4679	r4680
456	456
457	457	static CUSTOM_INPUT( keypad_r )
458	458	{
459		UINT32 bits = input_port_read(field->port->machine, param);
	459	UINT32 bits = input_port_read(field->port->machine, (const char *)param);
460	460	UINT8 select = keypad_select;
461	461	while ((select & 1) != 0)
462	462	{
r4679	r4680
500	500	{
501	501	/* low 2 bits of gun_control seem to enable IRQs */
502	502	if (gun_irq_state & gun_control & 0x03)
503		cpu_set_input_line(machine->cpu[0], 3, ASSERT_LINE);
	503	cputag_set_input_line(machine, "maincpu", 3, ASSERT_LINE);
504	504	else
505		cpu_set_input_line(machine->cpu[0], 3, CLEAR_LINE);
	505	cputag_set_input_line(machine, "maincpu", 3, CLEAR_LINE);
506	506	}
507	507
508	508
r4679	r4680
1330	1330	{
1331	1331	dcs2_init(machine, 0, 0);
1332	1332	midway_ioasic_init(machine, MIDWAY_IOASIC_STANDARD, 468/* or 488 */, 94, NULL);
1333		memory_install_readwrite32_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x9c0000, 0x9c0000, 0, 0, invasn_gun_r, invasn_gun_w);
	1333	memory_install_readwrite32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x9c0000, 0x9c0000, 0, 0, invasn_gun_r, invasn_gun_w);
1334	1334	}
1335	1335
1336	1336
r4679	r4680
1340	1340	midway_ioasic_init(machine, MIDWAY_IOASIC_STANDARD, 472/* or 476,477,478,110 */, 99, NULL);
1341	1341	memory_configure_bank(machine, 1, 0, 3, memory_region(machine, "user2"), 0x400000*4);
1342	1342
1343		memory_install_readwrite32_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x9b0004, 0x9b0007, 0, 0, crusnexo_leds_r, crusnexo_leds_w);
1344		memory_install_write32_handler    (cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x8d0009, 0x8d000a, 0, 0, keypad_select_w);
	1343	memory_install_readwrite32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x9b0004, 0x9b0007, 0, 0, crusnexo_leds_r, crusnexo_leds_w);
	1344	memory_install_write32_handler    (cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x8d0009, 0x8d000a, 0, 0, keypad_select_w);
1345	1345	}
1346	1346
1347	1347

src/mame/drivers/grchamp.c

r4679	r4680
92	92
93	93	static INTERRUPT_GEN( grchamp_cpu0_interrupt )
94	94	{
95		grchamp_state *state = device->machine->driver_data;
	95	grchamp_state *state = (grchamp_state *)device->machine->driver_data;
96	96
97	97	if (state->cpu0_out[0] & 0x01)
98	98	cpu_set_input_line(device, 0, ASSERT_LINE);
r4679	r4680
101	101
102	102	static INTERRUPT_GEN( grchamp_cpu1_interrupt )
103	103	{
104		grchamp_state *state = device->machine->driver_data;
	104	grchamp_state *state = (grchamp_state *)device->machine->driver_data;
105	105
106	106	if (state->cpu1_out[4] & 0x01)
107	107	cpu_set_input_line(device, 0, ASSERT_LINE);
r4679	r4680
117	117
118	118	static WRITE8_HANDLER( cpu0_outputs_w )
119	119	{
120		grchamp_state *state = space->machine->driver_data;
	120	grchamp_state *state = (grchamp_state *)space->machine->driver_data;
121	121	UINT8 diff = data ^ state->cpu0_out[offset];
122	122	state->cpu0_out[offset] = data;
123	123
r4679	r4680
132	132	/* bit 6: FOG OUT */
133	133	/* bit 7: RADARON */
134	134	if ((diff & 0x01) && !(data & 0x01))
135		cpu_set_input_line(space->machine->cpu[0], 0, CLEAR_LINE);
	135	cputag_set_input_line(space->machine, "maincpu", 0, CLEAR_LINE);
136	136	if ((diff & 0x02) && !(data & 0x02))
137	137	state->collide = state->collmode = 0;
138	138	break;
r4679	r4680
191	191	case 0x0e:   /* OUT14 */
192	192	/* O-21 connector */
193	193	soundlatch_w(space, 0, data);
194		cpu_set_input_line(space->machine->cpu[2], INPUT_LINE_NMI, PULSE_LINE);
	194	cputag_set_input_line(space->machine, "audiocpu", INPUT_LINE_NMI, PULSE_LINE);
195	195	break;
196	196	}
197	197	}
r4679	r4680
201	201	{
202	202	static const UINT8 ls247_map[16] =
203	203	{ 0x3f,0x06,0x5b,0x4f,0x66,0x6d,0x7d,0x07,0x7f,0x6f,0x58,0x4c,0x62,0x69,0x78,0x00 };
204		grchamp_state *state = space->machine->driver_data;
	204	grchamp_state *state = (grchamp_state *)space->machine->driver_data;
205	205
206	206	switch (offset)
207	207	{
r4679	r4680
245	245	static WRITE8_HANDLER( cpu1_outputs_w )
246	246	{
247	247	const device_config *discrete = devtag_get_device(space->machine, "discrete");
248		grchamp_state *state = space->machine->driver_data;
	248	grchamp_state *state = (grchamp_state *)space->machine->driver_data;
249	249	UINT8 diff = data ^ state->cpu1_out[offset];
250	250	state->cpu1_out[offset] = data;
251	251
r4679	r4680
272	272	case 0x04:   /* OUT4 */
273	273	/* bit 0:   interrupt enable for CPU 1 */
274	274	if ((diff & 0x01) && !(data & 0x01))
275		cpu_set_input_line(space->machine->cpu[1], 0, CLEAR_LINE);
	275	cputag_set_input_line(space->machine, "sub", 0, CLEAR_LINE);
276	276	break;
277	277
278	278	case 0x05:   /* OUT5 - unused */
r4679	r4680
354	354
355	355	static READ8_HANDLER( pc3259_0_r )
356	356	{
357		grchamp_state *state = space->machine->driver_data;
	357	grchamp_state *state = (grchamp_state *)space->machine->driver_data;
358	358	return get_pc3259_bits(space->machine, state, 0);
359	359	}
360	360
361	361
362	362	static READ8_HANDLER( pc3259_1_r )
363	363	{
364		grchamp_state *state = space->machine->driver_data;
	364	grchamp_state *state = (grchamp_state *)space->machine->driver_data;
365	365	return get_pc3259_bits(space->machine, state, 1);
366	366	}
367	367
368	368
369	369	static READ8_HANDLER( pc3259_2_r )
370	370	{
371		grchamp_state *state = space->machine->driver_data;
	371	grchamp_state *state = (grchamp_state *)space->machine->driver_data;
372	372	return get_pc3259_bits(space->machine, state, 2);
373	373	}
374	374
375	375
376	376	static READ8_HANDLER( pc3259_3_r )
377	377	{
378		grchamp_state *state = space->machine->driver_data;
	378	grchamp_state *state = (grchamp_state *)space->machine->driver_data;
379	379	return get_pc3259_bits(space->machine, state, 3);
380	380	}
381	381
r4679	r4680
389	389
390	390	static READ8_HANDLER( sub_to_main_comm_r )
391	391	{
392		grchamp_state *state = space->machine->driver_data;
	392	grchamp_state *state = (grchamp_state *)space->machine->driver_data;
393	393	return state->comm_latch;
394	394	}
395	395
396	396
397	397	static TIMER_CALLBACK( main_to_sub_comm_sync_w )
398	398	{
399		grchamp_state *state = machine->driver_data;
	399	grchamp_state *state = (grchamp_state *)machine->driver_data;
400	400	int offset = param >> 8;
401	401	state->comm_latch2[offset & 3] = param;
402	402	}
r4679	r4680
410	410
411	411	static READ8_HANDLER( main_to_sub_comm_r )
412	412	{
413		grchamp_state *state = space->machine->driver_data;
	413	grchamp_state *state = (grchamp_state *)space->machine->driver_data;
414	414	return state->comm_latch2[offset];
415	415	}
416	416

src/mame/drivers/argus.c

r4679	r4680
110	110	/* Handler called by the YM2203 emulator when the internal timers cause an IRQ */
111	111	static void irqhandler(const device_config *device, int irq)
112	112	{
113		cpu_set_input_line(device->machine->cpu[1], 0, irq ? ASSERT_LINE : CLEAR_LINE);
	113	cputag_set_input_line(device->machine, "audiocpu", 0, irq ? ASSERT_LINE : CLEAR_LINE);
114	114	}
115	115
116	116	static const ym2203_interface ym2203_config =

src/mame/drivers/lkage.c

r4679	r4680
89	89
90	90	static TIMER_CALLBACK( nmi_callback )
91	91	{
92		if (sound_nmi_enable) cpu_set_input_line(machine->cpu[1],INPUT_LINE_NMI,PULSE_LINE);
	92	if (sound_nmi_enable) cputag_set_input_line(machine, "audiocpu", INPUT_LINE_NMI, PULSE_LINE);
93	93	else pending_nmi = 1;
94	94	}
95	95
r4679	r4680
109	109	sound_nmi_enable = 1;
110	110	if (pending_nmi)
111	111	{ /* probably wrong but commands may go lost otherwise */
112		cpu_set_input_line(space->machine->cpu[1],INPUT_LINE_NMI,PULSE_LINE);
	112	cputag_set_input_line(space->machine, "audiocpu", INPUT_LINE_NMI, PULSE_LINE);
113	113	pending_nmi = 0;
114	114	}
115	115	}
116	116
117		static ADDRESS_MAP_START( lkage, ADDRESS_SPACE_PROGRAM, 8 )
118		AM_RANGE(0x0000, 0xdfff) AM_READ(SMH_ROM) AM_WRITE(SMH_ROM)
119		AM_RANGE(0xe000, 0xe7ff) AM_READ(SMH_RAM) AM_WRITE(SMH_RAM) /* work ram */
	117	static ADDRESS_MAP_START( lkage_map, ADDRESS_SPACE_PROGRAM, 8 )
	118	AM_RANGE(0x0000, 0xdfff) AM_ROM
	119	AM_RANGE(0xe000, 0xe7ff) AM_RAM /* work ram */
120	120	AM_RANGE(0xe800, 0xefff) AM_RAM_WRITE(paletteram_xxxxRRRRGGGGBBBB_le_w) AM_BASE(&paletteram)
121		AM_RANGE(0xf000, 0xf003) AM_READ(SMH_RAM) AM_WRITE(SMH_RAM) AM_BASE(&lkage_vreg) /* video registers */
	121	AM_RANGE(0xf000, 0xf003) AM_RAM AM_BASE(&lkage_vreg) /* video registers */
122	122	AM_RANGE(0xf060, 0xf060) AM_WRITE(lkage_sound_command_w)
123	123	AM_RANGE(0xf061, 0xf061) AM_WRITENOP
124		AM_RANGE(0xf062, 0xf062) AM_READ(lkage_mcu_r) AM_WRITE(lkage_mcu_w)
	124	AM_RANGE(0xf062, 0xf062) AM_READWRITE(lkage_mcu_r,lkage_mcu_w)
125	125	AM_RANGE(0xf063, 0xf063) AM_WRITENOP /* pulsed; nmi on sound cpu? */
126	126	AM_RANGE(0xf080, 0xf080) AM_READ_PORT("DSW1")
127	127	AM_RANGE(0xf081, 0xf081) AM_READ_PORT("DSW2")
r4679	r4680
130	130	AM_RANGE(0xf084, 0xf084) AM_READ_PORT("P1")
131	131	AM_RANGE(0xf086, 0xf086) AM_READ_PORT("P2")
132	132	AM_RANGE(0xf087, 0xf087) AM_READ(lkage_mcu_status_r)
133		AM_RANGE(0xf0a0, 0xf0a3) AM_READ(SMH_RAM) AM_WRITE(SMH_RAM) /* unknown */
134		AM_RANGE(0xf0c0, 0xf0c5) AM_READ(SMH_RAM) AM_WRITE(SMH_RAM) AM_BASE(&lkage_scroll)
	133	AM_RANGE(0xf0a0, 0xf0a3) AM_RAM /* unknown */
	134	AM_RANGE(0xf0c0, 0xf0c5) AM_RAM AM_BASE(&lkage_scroll)
135	135	AM_RANGE(0xf0e1, 0xf0e1) AM_WRITENOP /* pulsed */
136		AM_RANGE(0xf100, 0xf15f) AM_READ(SMH_RAM) AM_WRITE(SMH_RAM) AM_BASE(&spriteram)
137		AM_RANGE(0xf400, 0xffff) AM_READ(SMH_RAM) AM_WRITE(lkage_videoram_w) AM_BASE(&videoram) /* videoram */
	136	AM_RANGE(0xf100, 0xf15f) AM_RAM AM_BASE(&spriteram)
	137	AM_RANGE(0xf400, 0xffff) AM_RAM_WRITE(lkage_videoram_w) AM_BASE(&videoram) /* videoram */
138	138	ADDRESS_MAP_END
139	139
140	140	static READ8_HANDLER( port_fetch_r )
r4679	r4680
142	142	return memory_region(space->machine, "user1")[offset];
143	143	}
144	144
145		static ADDRESS_MAP_START( readport, ADDRESS_SPACE_IO, 8 )
	145	static ADDRESS_MAP_START( lkage_io_map, ADDRESS_SPACE_IO, 8 )
146	146	AM_RANGE(0x4000, 0x7fff) AM_READ(port_fetch_r)
147	147	ADDRESS_MAP_END
148	148
149		static ADDRESS_MAP_START( m68705_readmem, ADDRESS_SPACE_PROGRAM, 8 )
	149	static ADDRESS_MAP_START( lkage_m68705_map, ADDRESS_SPACE_PROGRAM, 8 )
150	150	ADDRESS_MAP_GLOBAL_MASK(0x7ff)
151		AM_RANGE(0x0000, 0x0000) AM_READ(lkage_68705_portA_r)
152		AM_RANGE(0x0001, 0x0001) AM_READ(lkage_68705_portB_r)
153		AM_RANGE(0x0002, 0x0002) AM_READ(lkage_68705_portC_r)
154		AM_RANGE(0x0010, 0x007f) AM_READ(SMH_RAM)
155		AM_RANGE(0x0080, 0x07ff) AM_READ(SMH_ROM)
156		ADDRESS_MAP_END
157
158		static ADDRESS_MAP_START( m68705_writemem, ADDRESS_SPACE_PROGRAM, 8 )
159		ADDRESS_MAP_GLOBAL_MASK(0x7ff)
160		AM_RANGE(0x0000, 0x0000) AM_WRITE(lkage_68705_portA_w)
161		AM_RANGE(0x0001, 0x0001) AM_WRITE(lkage_68705_portB_w)
162		AM_RANGE(0x0002, 0x0002) AM_WRITE(lkage_68705_portC_w)
	151	AM_RANGE(0x0000, 0x0000) AM_READWRITE(lkage_68705_portA_r,lkage_68705_portA_w)
	152	AM_RANGE(0x0001, 0x0001) AM_READWRITE(lkage_68705_portB_r,lkage_68705_portB_w)
	153	AM_RANGE(0x0002, 0x0002) AM_READWRITE(lkage_68705_portC_r,lkage_68705_portC_w)
163	154	AM_RANGE(0x0004, 0x0004) AM_WRITE(lkage_68705_ddrA_w)
164	155	AM_RANGE(0x0005, 0x0005) AM_WRITE(lkage_68705_ddrB_w)
165	156	AM_RANGE(0x0006, 0x0006) AM_WRITE(lkage_68705_ddrC_w)
166		AM_RANGE(0x0010, 0x007f) AM_WRITE(SMH_RAM)
167		AM_RANGE(0x0080, 0x07ff) AM_WRITE(SMH_ROM)
	157	AM_RANGE(0x0010, 0x007f) AM_RAM
	158	AM_RANGE(0x0080, 0x07ff) AM_ROM
168	159	ADDRESS_MAP_END
169	160
170	161	/***************************************************************************/
171	162
172	163	/* sound section is almost identical to Bubble Bobble, YM2203 instead of YM3526 */
173	164
174		static ADDRESS_MAP_START( readmem_sound, ADDRESS_SPACE_PROGRAM, 8 )
175		AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM)
176		AM_RANGE(0x8000, 0x87ff) AM_READ(SMH_RAM)
177		AM_RANGE(0x9000, 0x9001) AM_DEVREAD("ym1", ym2203_r)
178		AM_RANGE(0xa000, 0xa001) AM_DEVREAD("ym2", ym2203_r)
179		AM_RANGE(0xb000, 0xb000) AM_READ(soundlatch_r)
180		AM_RANGE(0xb001, 0xb001) AM_READNOP   /* ??? */
181		AM_RANGE(0xe000, 0xefff) AM_READ(SMH_ROM)   /* space for diagnostic ROM? */
182		ADDRESS_MAP_END
183
184		static ADDRESS_MAP_START( writemem_sound, ADDRESS_SPACE_PROGRAM, 8 )
185		AM_RANGE(0x0000, 0x7fff) AM_WRITE(SMH_ROM)
186		AM_RANGE(0x8000, 0x87ff) AM_WRITE(SMH_RAM)
187		AM_RANGE(0x9000, 0x9001) AM_DEVWRITE("ym1", ym2203_w)
188		AM_RANGE(0xa000, 0xa001) AM_DEVWRITE("ym2", ym2203_w)
189		AM_RANGE(0xb000, 0xb000) AM_WRITENOP   /* ??? */
190		AM_RANGE(0xb001, 0xb001) AM_WRITE(lkage_sh_nmi_enable_w)
	165	static ADDRESS_MAP_START( lkage_sound_map, ADDRESS_SPACE_PROGRAM, 8 )
	166	AM_RANGE(0x0000, 0x7fff) AM_ROM
	167	AM_RANGE(0x8000, 0x87ff) AM_RAM
	168	AM_RANGE(0x9000, 0x9001) AM_DEVREADWRITE("ym1", ym2203_r,ym2203_w)
	169	AM_RANGE(0xa000, 0xa001) AM_DEVREADWRITE("ym2", ym2203_r,ym2203_w)
	170	AM_RANGE(0xb000, 0xb000) AM_READ(soundlatch_r) AM_WRITENOP   /* ??? */
	171	AM_RANGE(0xb001, 0xb001) AM_READNOP   /* ??? */ AM_WRITE(lkage_sh_nmi_enable_w)
191	172	AM_RANGE(0xb002, 0xb002) AM_WRITE(lkage_sh_nmi_disable_w)
192		AM_RANGE(0xe000, 0xefff) AM_WRITE(SMH_ROM)   /* space for diagnostic ROM? */
	173	AM_RANGE(0xe000, 0xefff) AM_ROM   /* space for diagnostic ROM? */
193	174	ADDRESS_MAP_END
194	175
195	176	/***************************************************************************/
r4679	r4680
356	337
357	338	static void irqhandler(const device_config *device, int irq)
358	339	{
359		cpu_set_input_line(device->machine->cpu[1],0,irq ? ASSERT_LINE : CLEAR_LINE);
	340	cputag_set_input_line(device->machine, "audiocpu", 0, irq ? ASSERT_LINE : CLEAR_LINE);
360	341	}
361	342
362	343	static const ym2203_interface ym2203_config =
r4679	r4680
372	353	static MACHINE_DRIVER_START( lkage )
373	354	/* basic machine hardware */
374	355	MDRV_CPU_ADD("maincpu", Z80,6000000)
375		MDRV_CPU_PROGRAM_MAP(lkage,0)
376		MDRV_CPU_IO_MAP(readport,0)
	356	MDRV_CPU_PROGRAM_MAP(lkage_map,0)
	357	MDRV_CPU_IO_MAP(lkage_io_map,0)
377	358	MDRV_CPU_VBLANK_INT("screen", irq0_line_hold)
378	359
379	360	MDRV_CPU_ADD("audiocpu", Z80, 6000000)
380		MDRV_CPU_PROGRAM_MAP(readmem_sound,writemem_sound)
	361	MDRV_CPU_PROGRAM_MAP(lkage_sound_map,0)
381	362	/* IRQs are triggered by the YM2203 */
	363
382	364	MDRV_CPU_ADD("mcu", M68705,4000000)   /* ??? */
383		MDRV_CPU_PROGRAM_MAP(m68705_readmem,m68705_writemem)
	365	MDRV_CPU_PROGRAM_MAP(lkage_m68705_map,0)
384	366
385	367	/* video hardware */
386	368	MDRV_SCREEN_ADD("screen", RASTER)
r4679	r4680
417	399	static MACHINE_DRIVER_START( lkageb )
418	400	/* basic machine hardware */
419	401	MDRV_CPU_ADD("maincpu", Z80,6000000)
420		MDRV_CPU_PROGRAM_MAP(lkage,0)
421		MDRV_CPU_IO_MAP(readport,0)
	402	MDRV_CPU_PROGRAM_MAP(lkage_map,0)
	403	MDRV_CPU_IO_MAP(lkage_io_map,0)
422	404	MDRV_CPU_VBLANK_INT("screen", irq0_line_hold)
423	405
424	406	MDRV_CPU_ADD("audiocpu", Z80, 6000000)
425		MDRV_CPU_PROGRAM_MAP(readmem_sound,writemem_sound)
	407	MDRV_CPU_PROGRAM_MAP(lkage_sound_map,0)
426	408	/* IRQs are triggered by the YM2203 */
427	409
428	410	/* video hardware */
r4679	r4680
517	499	ROM_LOAD( "pal16l8a-a54-14.35", 0x0600, 0x0104, CRC(a89c644e) SHA1(b41a077d1d070d9563f924c776930c33a4ff27d0) )
518	500	ROM_END
519	501
	502	ROM_START( lkageoo )
	503	ROM_REGION( 0x14000, "maincpu", 0 ) /* Z80 code (main CPU) */
	504	ROM_LOAD( "a54-01.37", 0x0000, 0x8000, CRC(34eab2c5) SHA1(25bf2dc80d21aa68c3af5debf10b24c75d83a738) )
	505	ROM_LOAD( "a54-02.38", 0x8000, 0x8000, CRC(ea471d8a) SHA1(1ffc7f78e3e983e16a23e97019f7030f9846569b) )
	506
	507	ROM_REGION( 0x10000, "audiocpu", 0 ) /* Z80 code (sound CPU) */
	508	ROM_LOAD( "a54-04.54",   0x0000, 0x8000, CRC(541faf9a) SHA1(b142ff3bd198f700697ec06ea92db3109ab5818e) )
	509
	510	ROM_REGION( 0x10000, "mcu", 0 ) /* 68705 MCU code */
	511	ROM_LOAD( "a54-09.53",   0x0000, 0x0800, CRC(0e8b8846) SHA1(a4a105462b0127229bb7edfadd2e581c7e40f1cc) )
	512
	513	ROM_REGION( 0x4000, "user1", 0 ) /* data */
	514	ROM_LOAD( "a54-03.51",   0x0000, 0x4000, CRC(493e76d8) SHA1(13c6160edd94ba2801fd89bb33bcae3a1e3454ff) )
	515
	516	ROM_REGION( 0x10000, "gfx1", ROMREGION_DISPOSE )
	517	ROM_LOAD( "a54-05.84", 0x0000, 0x4000, CRC(76753e52) SHA1(13f61969d59b055a5ab40237148e091d7cabe190) )
	518	ROM_LOAD( "a54-06.85", 0x4000, 0x4000, CRC(f33c015c) SHA1(756326daab255d3a36d97e51ee141b9f7157f12e) )
	519	ROM_LOAD( "a54-07.86", 0x8000, 0x4000, CRC(0e02c2e8) SHA1(1d8a817ba66cf26a4fe51ae00874c0fe6e7cebe3) )
	520	ROM_LOAD( "a54-08.87", 0xc000, 0x4000, CRC(4ef5f073) SHA1(dfd234542b28cff74692a1c381772da01e8bb4a7) )
	521
	522	ROM_REGION( 0x0200, "proms", 0 )
	523	ROM_LOAD( "a54-10.2",    0x0000, 0x0200, CRC(17dfbd14) SHA1(f8f0b6dfedd4ba108dad43ccc7697ef4ab9cbf86) )   /* unknown */
	524
	525	ROM_REGION( 0x0800, "plds", ROMREGION_DISPOSE )
	526	ROM_LOAD( "pal16l8-a54-11.34",  0x0000, 0x0104, CRC(56232113) SHA1(4cdc6732aa3e7fbe8df51966a1295253711ecc8f) )
	527	ROM_LOAD( "pal16l8-a54-12.76",  0x0200, 0x0104, CRC(e57c3c89) SHA1(a23f91da254055bb990e8bb730564c40b5725f78) )
	528	ROM_LOAD( "pal16l8a-a54-13.27", 0x0400, 0x0104, CRC(c9b1938e) SHA1(2fd1adc4bde8f07cf4b6314d56b48bb3d7144cc3) )
	529	ROM_LOAD( "pal16l8a-a54-14.35", 0x0600, 0x0104, CRC(a89c644e) SHA1(b41a077d1d070d9563f924c776930c33a4ff27d0) )
	530	ROM_END
	531
520	532	ROM_START( lkageb )
521	533	ROM_REGION( 0x10000, "maincpu", 0 ) /* Z80 code (main CPU) */
522	534	ROM_LOAD( "ic37_1",      0x0000, 0x8000, CRC(05694f7b) SHA1(08a3796d6cf04d64db52ed8208a51084c420e10a) )
r4679	r4680
632	644
633	645	static DRIVER_INIT( lkageb )
634	646	{
635		memory_install_read8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xf062, 0xf062, 0, 0, fake_mcu_r);
636		memory_install_read8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xf087, 0xf087, 0, 0, fake_status_r);
637		memory_install_write8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xf062, 0xf062, 0, 0, fake_mcu_w );
	647	memory_install_read8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xf062, 0xf062, 0, 0, fake_mcu_r);
	648	memory_install_read8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xf087, 0xf087, 0, 0, fake_status_r);
	649	memory_install_write8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xf062, 0xf062, 0, 0, fake_mcu_w );
638	650	}
639	651
640	652	GAME( 1984, lkage,    0,        lkage,    lkage,    0,        ROT0, "Taito Corporation", "The Legend of Kage", GAME_NO_COCKTAIL )
641	653	GAME( 1984, lkageo,   lkage,    lkage,    lkage,    0,        ROT0, "Taito Corporation", "The Legend of Kage (older)", GAME_NO_COCKTAIL )
	654	GAME( 1984, lkageoo,  lkage,    lkage,    lkage,    0,        ROT0, "Taito Corporation", "The Legend of Kage (oldest)", GAME_NO_COCKTAIL )
642	655	GAME( 1984, lkageb,   lkage,    lkageb,   lkageb,   lkageb,   ROT0, "bootleg", "The Legend of Kage (bootleg set 1)", GAME_NO_COCKTAIL )
643	656	GAME( 1984, lkageb2,  lkage,    lkageb,   lkageb,   lkageb,   ROT0, "bootleg", "The Legend of Kage (bootleg set 2)", GAME_NO_COCKTAIL )
644	657	GAME( 1984, lkageb3,  lkage,    lkageb,   lkageb,   lkageb,   ROT0, "bootleg", "The Legend of Kage (bootleg set 3)", GAME_NO_COCKTAIL )

src/mame/drivers/superdq.c

r4679	r4680
133	133	static const UINT8 black_color_entries[] = {7,15,16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31};
134	134
135	135	if ( data & 0x40 ) /* bit 6 = irqack */
136		cpu_set_input_line(space->machine->cpu[0], 0, CLEAR_LINE);
	136	cputag_set_input_line(space->machine, "maincpu", 0, CLEAR_LINE);
137	137
138	138	coin_counter_w( 0, data & 0x08 );
139	139	coin_counter_w( 1, data & 0x04 );

src/mame/drivers/gaiden.c

r4679	r4680
162	162
163	163	static WRITE16_HANDLER( gaiden_sound_command_w )
164	164	{
165		if (ACCESSING_BITS_0_7) soundlatch_w(space,0,data & 0xff);   /* Ninja Gaiden */
166		if (ACCESSING_BITS_8_15) soundlatch_w(space,0,data >> 8);   /* Tecmo Knight */
167		cpu_set_input_line(space->machine->cpu[1],INPUT_LINE_NMI,PULSE_LINE);
	165	if (ACCESSING_BITS_0_7) soundlatch_w(space, 0, data & 0xff);   /* Ninja Gaiden */
	166	if (ACCESSING_BITS_8_15) soundlatch_w(space, 0, data >> 8);   /* Tecmo Knight */
	167	cputag_set_input_line(space->machine, "audiocpu", INPUT_LINE_NMI, PULSE_LINE);
168	168	}
169	169
170	170	static WRITE16_HANDLER( drgnbowl_sound_command_w )
171	171	{
172	172	if (ACCESSING_BITS_8_15)
173	173	{
174		soundlatch_w(space,0,data >> 8);
175		cpu_set_input_line(space->machine->cpu[1],0,HOLD_LINE);
	174	soundlatch_w(space, 0, data >> 8);
	175	cputag_set_input_line(space->machine, "audiocpu", 0, HOLD_LINE);
176	176	}
177	177	}
178	178
r4679	r4680
376	376	return prot;
377	377	}
378	378
379		static ADDRESS_MAP_START( readmem, ADDRESS_SPACE_PROGRAM, 16 )
380		AM_RANGE(0x000000, 0x03ffff) AM_READ(SMH_ROM)
381		AM_RANGE(0x060000, 0x063fff) AM_READ(SMH_RAM)
382		AM_RANGE(0x070000, 0x070fff) AM_READ(SMH_RAM)
383		AM_RANGE(0x072000, 0x073fff) AM_READ(gaiden_videoram2_r)
384		AM_RANGE(0x074000, 0x075fff) AM_READ(gaiden_videoram3_r)
385		AM_RANGE(0x076000, 0x077fff) AM_READ(SMH_RAM)
386		AM_RANGE(0x078000, 0x0787ff) AM_READ(SMH_RAM)
	379	static ADDRESS_MAP_START( gaiden_map, ADDRESS_SPACE_PROGRAM, 16 )
	380	AM_RANGE(0x000000, 0x03ffff) AM_ROM
	381	AM_RANGE(0x060000, 0x063fff) AM_RAM
	382	AM_RANGE(0x070000, 0x070fff) AM_RAM_WRITE(gaiden_videoram_w) AM_BASE(&gaiden_videoram)
	383	AM_RANGE(0x072000, 0x073fff) AM_READWRITE(gaiden_videoram2_r, gaiden_videoram2_w) AM_BASE(&gaiden_videoram2)
	384	AM_RANGE(0x074000, 0x075fff) AM_READWRITE(gaiden_videoram3_r, gaiden_videoram3_w) AM_BASE(&gaiden_videoram3)
	385	AM_RANGE(0x076000, 0x077fff) AM_RAM AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)
	386	AM_RANGE(0x078000, 0x079fff) AM_RAM_WRITE(paletteram16_xxxxBBBBGGGGRRRR_word_w) AM_BASE(&paletteram16)
387	387	AM_RANGE(0x078800, 0x079fff) AM_READNOP   /* extra portion of palette RAM, not really used */
388	388	AM_RANGE(0x07a000, 0x07a001) AM_READ_PORT("SYSTEM")
389	389	AM_RANGE(0x07a002, 0x07a003) AM_READ_PORT("P1_P2")
390	390	AM_RANGE(0x07a004, 0x07a005) AM_READ_PORT("DSW")
391		ADDRESS_MAP_END
392
393		static ADDRESS_MAP_START( writemem, ADDRESS_SPACE_PROGRAM, 16 )
394		AM_RANGE(0x000000, 0x03ffff) AM_WRITE(SMH_ROM)
395		AM_RANGE(0x060000, 0x063fff) AM_WRITE(SMH_RAM)
396		AM_RANGE(0x070000, 0x070fff) AM_WRITE(gaiden_videoram_w) AM_BASE(&gaiden_videoram)
397		AM_RANGE(0x072000, 0x073fff) AM_WRITE(gaiden_videoram2_w) AM_BASE(&gaiden_videoram2)
398		AM_RANGE(0x074000, 0x075fff) AM_WRITE(gaiden_videoram3_w) AM_BASE(&gaiden_videoram3)
399		AM_RANGE(0x076000, 0x077fff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)
400		AM_RANGE(0x078000, 0x079fff) AM_WRITE(paletteram16_xxxxBBBBGGGGRRRR_word_w) AM_BASE(&paletteram16)
401	391	AM_RANGE(0x07a104, 0x07a105) AM_WRITE(gaiden_txscrolly_w)
402	392	AM_RANGE(0x07a10c, 0x07a10d) AM_WRITE(gaiden_txscrollx_w)
403	393	AM_RANGE(0x07a204, 0x07a205) AM_WRITE(gaiden_fgscrolly_w)
r4679	r4680
429	419	AM_RANGE(0x07f006, 0x07f007) AM_WRITE(gaiden_fgscrollx_w)
430	420	ADDRESS_MAP_END
431	421
432		static ADDRESS_MAP_START( sound_readmem, ADDRESS_SPACE_PROGRAM, 8 )
433		AM_RANGE(0x0000, 0xdfff) AM_READ(SMH_ROM)
434		AM_RANGE(0xe000, 0xefff) AM_READ(SMH_ROM)    /* raiga only */
435		AM_RANGE(0xf000, 0xf7ff) AM_READ(SMH_RAM)
436		AM_RANGE(0xf800, 0xf800) AM_DEVREAD("oki", okim6295_r)
437		AM_RANGE(0xfc00, 0xfc00) AM_READNOP   /* ?? */
438		AM_RANGE(0xfc20, 0xfc20) AM_READ(soundlatch_r)
439		ADDRESS_MAP_END
440
441		static ADDRESS_MAP_START( sound_writemem, ADDRESS_SPACE_PROGRAM, 8 )
442		AM_RANGE(0x0000, 0xdfff) AM_WRITE(SMH_ROM)
443		AM_RANGE(0xe000, 0xefff) AM_WRITE(SMH_ROM)    /* raiga only */
444		AM_RANGE(0xf000, 0xf7ff) AM_WRITE(SMH_RAM)
445		AM_RANGE(0xf800, 0xf800) AM_DEVWRITE("oki", okim6295_w)
	422	static ADDRESS_MAP_START( sound_map, ADDRESS_SPACE_PROGRAM, 8 )
	423	AM_RANGE(0x0000, 0xdfff) AM_ROM
	424	AM_RANGE(0xe000, 0xefff) AM_RAM   /* raiga only */
	425	AM_RANGE(0xf000, 0xf7ff) AM_RAM
	426	AM_RANGE(0xf800, 0xf800) AM_DEVREADWRITE("oki", okim6295_r, okim6295_w)
446	427	AM_RANGE(0xf810, 0xf811) AM_DEVWRITE("ym1", ym2203_w)
447	428	AM_RANGE(0xf820, 0xf821) AM_DEVWRITE("ym2", ym2203_w)
448		AM_RANGE(0xfc00, 0xfc00) AM_WRITENOP   /* ?? */
	429	AM_RANGE(0xfc00, 0xfc00) AM_NOP /* ?? */
	430	AM_RANGE(0xfc20, 0xfc20) AM_READ(soundlatch_r)
449	431	ADDRESS_MAP_END
450	432
451	433	static ADDRESS_MAP_START( drgnbowl_sound_map, ADDRESS_SPACE_PROGRAM, 8 )
r4679	r4680
824	806	/* handler called by the 2203 emulator when the internal timers cause an IRQ */
825	807	static void irqhandler(const device_config *device, int irq)
826	808	{
827		cpu_set_input_line(device->machine->cpu[1],0,irq ? ASSERT_LINE : CLEAR_LINE);
	809	cputag_set_input_line(device->machine, "audiocpu", 0, irq ? ASSERT_LINE : CLEAR_LINE);
828	810	}
829	811
830	812	static const ym2203_interface ym2203_config =
r4679	r4680
841	823
842	824	/* basic machine hardware */
843	825	MDRV_CPU_ADD("maincpu", M68000, 18432000/2)   /* 9.216 MHz */
844		MDRV_CPU_PROGRAM_MAP(readmem,writemem)
	826	MDRV_CPU_PROGRAM_MAP(gaiden_map,0)
845	827	MDRV_CPU_VBLANK_INT("screen", irq5_line_hold)
846	828
847	829	MDRV_CPU_ADD("audiocpu", Z80, 4000000)   /* 4 MHz */
848		MDRV_CPU_PROGRAM_MAP(sound_readmem,sound_writemem)
	830	MDRV_CPU_PROGRAM_MAP(sound_map,0)
849	831	/* IRQs are triggered by the YM2203 */
850	832
851	833	MDRV_MACHINE_RESET(raiga)
r4679	r4680
1351	1333	/* sprite size Y = sprite size X */
1352	1334	gaiden_sprite_sizey = 0;
1353	1335
1354		memory_install_read16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x07a006, 0x07a007, 0, 0, wildfang_protection_r);
1355		memory_install_write16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x07a804, 0x07a805, 0, 0, wildfang_protection_w);
	1336	memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x07a006, 0x07a007, 0, 0, wildfang_protection_r);
	1337	memory_install_write16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x07a804, 0x07a805, 0, 0, wildfang_protection_w);
1356	1338	}
1357	1339
1358	1340	static DRIVER_INIT( raiga )
r4679	r4680
1360	1342	/* sprite size Y independent from sprite size X */
1361	1343	gaiden_sprite_sizey = 2;
1362	1344
1363		memory_install_read16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x07a006, 0x07a007, 0, 0, raiga_protection_r);
1364		memory_install_write16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x07a804, 0x07a805, 0, 0, raiga_protection_w);
	1345	memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x07a006, 0x07a007, 0, 0, raiga_protection_r);
	1346	memory_install_write16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x07a804, 0x07a805, 0, 0, raiga_protection_w);
1365	1347	}
1366	1348
1367	1349	static DRIVER_INIT( drgnbowl )
r4679	r4680
1369	1351	int i;
1370	1352	UINT8 *ROM = memory_region(machine, "maincpu");
1371	1353	size_t  size = memory_region_length(machine, "maincpu");
1372		UINT8 *buffer = malloc_or_die(size);
	1354	UINT8 *buffer = alloc_array_or_die(UINT8, size);
1373	1355
1374	1356	memcpy(buffer,ROM,size);
1375	1357	for( i = 0; i < size; i++ )
r4679	r4680
1386	1368
1387	1369	ROM = memory_region(machine, "gfx2");
1388	1370	size = memory_region_length(machine, "gfx2");
1389		buffer = malloc_or_die(size);
	1371	buffer = alloc_array_or_die(UINT8, size);
1390	1372
1391	1373	memcpy(buffer,ROM,size);
1392	1374	for( i = 0; i < size; i++ )

src/mame/drivers/tomcat.c

r4679	r4680
156	156	static WRITE16_HANDLER(tomcat_irqclr_w)
157	157	{
158	158	// Clear IRQ Latch          (Address Strobe)
159		cpu_set_input_line(space->machine->cpu[0], 1, CLEAR_LINE);
	159	cputag_set_input_line(space->machine, "maincpu", 1, CLEAR_LINE);
160	160	}
161	161
162	162	static READ16_HANDLER(tomcat_inputs2_r)
r4679	r4680
177	177	static READ16_HANDLER(tomcat_320bio_r)
178	178	{
179	179	dsp_BIO = 1;
180		cpu_suspend(space->machine->cpu[0], SUSPEND_REASON_SPIN, 1);
	180	cputag_suspend(space->machine, "maincpu", SUSPEND_REASON_SPIN, 1);
181	181	return 0;
182	182	}
183	183
r4679	r4680
198	198	{
199	199	dsp_idle = 0;
200	200	dsp_BIO = 0;
201		cpu_resume(space->machine->cpu[0], SUSPEND_REASON_SPIN );
	201	cputag_resume(space->machine, "maincpu", SUSPEND_REASON_SPIN );
202	202	return 0;
203	203	}
204	204	else
r4679	r4680
331	331	((UINT16*)tomcat_shared_ram)[0x0002] = 0xf600;
332	332	((UINT16*)tomcat_shared_ram)[0x0003] = 0x0000;
333	333
334		tomcat_nvram = auto_malloc(0x800);
	334	tomcat_nvram = auto_alloc_array(machine, UINT8, 0x800);
335	335
336	336	state_save_register_global_pointer(machine, tomcat_nvram, 0x800);
337	337	state_save_register_global(machine, tomcat_control_num);

src/mame/drivers/zaxxon.c

r4679	r4680
361	361	{
362	362	/* pressing the service switch sends an NMI */
363	363	if (newval)
364		cpu_set_input_line(field->port->machine->cpu[0], INPUT_LINE_NMI, PULSE_LINE);
	364	cputag_set_input_line(field->port->machine, "maincpu", INPUT_LINE_NMI, PULSE_LINE);
365	365	}
366	366
367	367
r4679	r4680
376	376	{
377	377	int_enabled = data & 1;
378	378	if (!int_enabled)
379		cpu_set_input_line(space->machine->cpu[0], 0, CLEAR_LINE);
	379	cputag_set_input_line(space->machine, "maincpu", 0, CLEAR_LINE);
380	380	}
381	381
382	382
r4679	r4680
1436	1436	const address_space *space = cputag_get_address_space(machine, cputag, ADDRESS_SPACE_PROGRAM);
1437	1437	UINT8 *rom = memory_region(machine, cputag);
1438	1438	int size = memory_region_length(machine, cputag);
1439		UINT8 *decrypt = auto_malloc(size);
	1439	UINT8 *decrypt = auto_alloc_array(machine, UINT8, size);
1440	1440
1441	1441	memory_set_decrypted_region(space, 0x0000, size - 1, decrypt);
1442	1442
r4679	r4680
1496	1496	nprinces_decode(machine, "maincpu");
1497	1497
1498	1498	/* additional input ports are wired */
1499		memory_install_read_port_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xc004, 0xc004, 0, 0x18f3, "SW04");
1500		memory_install_read_port_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xc008, 0xc008, 0, 0x18f3, "SW08");
1501		memory_install_read_port_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xc00c, 0xc00c, 0, 0x18f3, "SW0C");
	1499	memory_install_read_port_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xc004, 0xc004, 0, 0x18f3, "SW04");
	1500	memory_install_read_port_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xc008, 0xc008, 0, 0x18f3, "SW08");
	1501	memory_install_read_port_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xc00c, 0xc00c, 0, 0x18f3, "SW0C");
1502	1502
1503	1503	/* unknown behavior expected here */
1504		memory_install_read8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xc80a, 0xc80a, 0, 0, razmataz_counter_r);
	1504	memory_install_read8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xc80a, 0xc80a, 0, 0, razmataz_counter_r);
1505	1505
1506	1506	/* connect the universal sound board */
1507		memory_install_readwrite8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xe03c, 0xe03c, 0, 0x1f00, sega_usb_status_r, sega_usb_data_w);
	1507	memory_install_readwrite8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xe03c, 0xe03c, 0, 0x1f00, sega_usb_status_r, sega_usb_data_w);
1508	1508
1509	1509	/* additional state saving */
1510	1510	state_save_register_global_array(machine, razmataz_dial_pos);
r4679	r4680
1517	1517	szaxxon_decode(machine, "maincpu");
1518	1518
1519	1519	/* connect the universal sound board */
1520		memory_install_readwrite8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xe03c, 0xe03c, 0, 0x1f00, sega_usb_status_r, sega_usb_data_w);
	1520	memory_install_readwrite8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xe03c, 0xe03c, 0, 0x1f00, sega_usb_status_r, sega_usb_data_w);
1521	1521	}
1522	1522
1523	1523

src/mame/drivers/norautp.c

r4679	r4680
8	8
9	9	Games running on this hardware:
10	10
11		* Noraut Poker,  1988,  Noraut Ltd.
12		* Poker,         198?,  Unknown.
	11	* Noraut Poker,      1988,  Noraut Ltd.
	12	* Noraut Joker Poker 1988,  Noraut Ltd.
	13	* GTI Poker          1983,  GTI Inc.
	14	* Poker,             198?,  Unknown.
13	15
14	16
15	17	*******************************************************************************
r4679	r4680
139	141	to Noraut Poker (bootleg), since the game has payout system.
140	142	- Some clean-ups.
141	143
	144	Notes:
	145	- norautjp: at the first start-up, the game will give you a very clever
	146	"FU" screen. Press the following buttons *together* on different times
	147	to get rid of it (and actually initialize the machine):
	148	* start + bet buttons (1+2);
	149	* Hold 3 + Hold 2 + Save (Half Gamble) + Change Card (C+X+F+D)
	150	Also notice that you actually need to map the last four buttons on the
	151	same button / on a joypad since MAME's steady key doesn't seem to work on
	152	my end...
142	153
	154
143	155	TODO:
144	156
145	157	- Analize the extra 8255 at 0xc0-0xc3 (full bidirectional port w/hshk)
r4679	r4680
170	182
171	183	static VIDEO_START( norautp )
172	184	{
173		np_vram = auto_malloc(0x1000);
	185	np_vram = auto_alloc_array(machine, UINT16, 0x1000/2);
174	186	}
175	187
176	188
r4679	r4680
219	231	{
220	232	/* 1st gfx bank */
221	233	palette_set_color(machine, 0, MAKE_RGB(0x00, 0x00, 0xff));   /* blue */
222		palette_set_color(machine, 1, MAKE_RGB(0x7f, 0xff, 0x7f));   /* white? */
	234	palette_set_color(machine, 1, MAKE_RGB(0xff, 0xff, 0x00));    /* yellow */
223	235	palette_set_color(machine, 2, MAKE_RGB(0x00, 0x00, 0xff));   /* blue */
224	236	palette_set_color(machine, 3, MAKE_RGB(0xff, 0xff, 0xff));   /* white */
225	237	palette_set_color(machine, 4, MAKE_RGB(0xff, 0xff, 0xff));   /* white */
r4679	r4680
316	328	c0 --> W  ; data (in case of PPI, port data)
317	329	c1 --> W  ; addressing
318	330	c2 --> R  ; status?
319		c3 --> W  ; alternate 00 & 01 (in case of PPI, seting reseting bit 0 of hadshaked port)
	331	c3 --> W  ; alternate 00 & 01 (in case of PPI, setting resetting bit 0 of handshaked port)
320	332
321	333	*/
322	334
r4679	r4680
439	451	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
440	452	INPUT_PORTS_END
441	453
442
443	454	/*************************
444	455	*    Graphics Layouts    *
445	456	*************************/
r4679	r4680
608	619	ROM_END
609	620
610	621
	622	ROM_START( norautjp )
	623	ROM_REGION( 0x10000, "maincpu", 0 )
	624	ROM_LOAD( "2764-1prog.bin",   0x0000, 0x2000, CRC(5f776ce1) SHA1(673b8c67ebd5c1334187a9407b86a43150cbe67b) )
	625
	626	ROM_REGION( 0x800,  "gfx", ROMREGION_DISPOSE )
	627	ROM_LOAD( "2732-1char.bin",   0x0000, 0x0800, CRC(d94be899) SHA1(b7212162324fa2d67383a475052e3b351bb1af5f) )    /* first half 0xff filled */
	628	ROM_CONTINUE(                 0x0000, 0x0800 )
	629	ROM_END
	630
611	631	/*************************
612	632	*      Game Drivers      *
613	633	*************************/
614	634
615	635	/*    YEAR  NAME      PARENT   MACHINE   INPUT    INIT  ROT    COMPANY        FULLNAME                 FLAGS */
616	636	GAME( 1988, norautp,  0,       norautp,  norautp, 0,    ROT0, "Noraut Ltd.", "Noraut Poker",           GAME_NO_SOUND | GAME_IMPERFECT_COLORS )
	637	GAME( 1988, norautjp, norautp, norautp,  norautp, 0,    ROT0, "Noraut Ltd.", "Noraut Joker Poker",     GAME_NO_SOUND | GAME_IMPERFECT_COLORS )
617	638	GAME( 1983, gtipoker, 0,       gtipoker, norautp, 0,    ROT0, "GTI Inc",     "GTI Poker",              GAME_NO_SOUND | GAME_IMPERFECT_COLORS | GAME_NOT_WORKING )
618	639
619	640	/*The following has everything uncertain, seems a bootleg/hack and doesn't have any identification strings in program rom. */

src/mame/drivers/shangkid.c

r4679	r4680
78	78
79	79	static WRITE8_HANDLER( shangkid_bbx_enable_w )
80	80	{
81		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_HALT, data?0:1 );
	81	cputag_set_input_line(space->machine, "bbx", INPUT_LINE_HALT, data?0:1 );
82	82	}
83	83
84	84	static WRITE8_HANDLER( shangkid_cpu_reset_w )
85	85	{
86	86	if( data == 0 )
87	87	{
88		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_RESET, PULSE_LINE);
	88	cputag_set_input_line(space->machine, "bbx", INPUT_LINE_RESET, PULSE_LINE);
89	89	}
90	90	else if( data == 1 )
91	91	{
92		cpu_set_input_line(space->machine->cpu[0], INPUT_LINE_RESET, PULSE_LINE);
	92	cputag_set_input_line(space->machine, "maincpu", INPUT_LINE_RESET, PULSE_LINE);
93	93	}
94	94	}
95	95
r4679	r4680
104	104	{
105	105	if( data == 0x01 )
106	106	/* 0->1 transition triggers interrupt on Sound CPU */
107		cpu_set_input_line(device->machine->cpu[2], 0, HOLD_LINE );
	107	cputag_set_input_line(device->machine, "audiocpu", 0, HOLD_LINE );
108	108	}
109	109	}
110	110
r4679	r4680
114	114	{
115	115	if( data == 0x01 )
116	116	/* 0->1 transition triggers interrupt on Sound CPU */
117		cpu_set_input_line(device->machine->cpu[2], 0, HOLD_LINE );
	117	cputag_set_input_line(device->machine, "audiocpu", 0, HOLD_LINE );
118	118	}
119	119	else
120	120	memory_set_bank(device->machine, 2, data ? 0 : 1);
r4679	r4680
152	152
153	153	static MACHINE_RESET( chinhero )
154	154	{
155		cpu_set_input_line(machine->cpu[1], INPUT_LINE_HALT, 1 );
	155	cputag_set_input_line(machine, "bbx", INPUT_LINE_HALT, 1 );
156	156	}
157	157
158	158	static MACHINE_RESET( shangkid )
159	159	{
160		cpu_set_input_line(machine->cpu[1], INPUT_LINE_HALT, 1 );
	160	cputag_set_input_line(machine, "bbx", INPUT_LINE_HALT, 1 );
161	161
162	162	memory_set_bank(machine, 1, 0);
163	163	memory_set_bank(machine, 2, 0);

src/mame/drivers/trackfld.c

r4679	r4680
212	212	AM_RANGE(0x3000, 0x37ff) AM_READ(SMH_RAM) AM_WRITE(trackfld_videoram_w) AM_BASE(&videoram)
213	213	AM_RANGE(0x3800, 0x3fff) AM_READ(SMH_RAM) AM_WRITE(trackfld_colorram_w) AM_BASE(&colorram)
214	214	AM_RANGE(0xc000, 0xc000) AM_WRITE(questions_bank_w)
215		AM_RANGE(0x6000, 0xdfff) AM_READ(SMH_BANK1)
	215	AM_RANGE(0x6000, 0xdfff) AM_READ(SMH_BANK(1))
216	216	AM_RANGE(0xe000, 0xffff) AM_ROM
217	217	ADDRESS_MAP_END
218	218
r4679	r4680
1132	1132	memory_set_decrypted_region(space, 0x0000, 0xffff, decrypt);
1133	1133
1134	1134	memory_install_write8_handler(space, 0x0800, 0x0800, 0, 0, atlantol_gfxbank_w);
1135		memory_install_write8_handler(space, 0x1000, 0x1000, 0, 0, SMH_NOP);
	1135	memory_install_write8_handler(space, 0x1000, 0x1000, 0, 0, (write8_space_func)SMH_NOP);
1136	1136
1137	1137	/* unmapped areas read as ROM */
1138		memory_install_read8_handler(space, 0x0000, 0x11ff, 0, 0, SMH_BANK10);
1139		memory_install_read8_handler(space, 0x1380, 0x17ff, 0, 0, SMH_BANK11);
1140		memory_install_read8_handler(space, 0x2000, 0x27ff, 0, 0, SMH_BANK12);
1141		memory_install_read8_handler(space, 0x4000, 0x5fff, 0, 0, SMH_BANK13);
	1138	memory_install_read8_handler(space, 0x0000, 0x11ff, 0, 0, (read8_space_func)SMH_BANK(10));
	1139	memory_install_read8_handler(space, 0x1380, 0x17ff, 0, 0, (read8_space_func)SMH_BANK(11));
	1140	memory_install_read8_handler(space, 0x2000, 0x27ff, 0, 0, (read8_space_func)SMH_BANK(12));
	1141	memory_install_read8_handler(space, 0x4000, 0x5fff, 0, 0, (read8_space_func)SMH_BANK(13));
1142	1142	memory_set_bankptr(machine, 10, &rom[0x0000]);
1143	1143	memory_set_bankptr(machine, 11, &rom[0x1380]);
1144	1144	memory_set_bankptr(machine, 12, &rom[0x2000]);

src/mame/drivers/fastfred.c

r4679	r4680
125	125
126	126	static WRITE8_HANDLER( imago_dma_irq_w )
127	127	{
128		cpu_set_input_line(space->machine->cpu[0], 0, data & 1 ? ASSERT_LINE : CLEAR_LINE);
	128	cputag_set_input_line(space->machine, "maincpu", 0, data & 1 ? ASSERT_LINE : CLEAR_LINE);
129	129	}
130	130
131	131	static WRITE8_HANDLER( imago_sprites_bank_w )
r4679	r4680
953	953
954	954	static DRIVER_INIT( flyboy )
955	955	{
956		memory_install_read8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xc085, 0xc099, 0, 0, flyboy_custom1_io_r);
957		memory_install_read8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xc8fb, 0xc900, 0, 0, flyboy_custom2_io_r);
	956	memory_install_read8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xc085, 0xc099, 0, 0, flyboy_custom1_io_r);
	957	memory_install_read8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xc8fb, 0xc900, 0, 0, flyboy_custom2_io_r);
958	958	fastfred_hardware_type = 1;
959	959	}
960	960
r4679	r4680
965	965
966	966	static DRIVER_INIT( fastfred )
967	967	{
968		memory_install_readwrite8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xc800, 0xcfff, 0, 0, fastfred_custom_io_r, SMH_NOP);
	968	memory_install_readwrite8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xc800, 0xcfff, 0, 0, fastfred_custom_io_r, (write8_space_func)SMH_NOP);
969	969	fastfred_hardware_type = 1;
970	970	}
971	971
972	972	static DRIVER_INIT( jumpcoas )
973	973	{
974		memory_install_readwrite8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xc800, 0xcfff, 0, 0, jumpcoas_custom_io_r, SMH_NOP);
	974	memory_install_readwrite8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xc800, 0xcfff, 0, 0, jumpcoas_custom_io_r, (write8_space_func)SMH_NOP);
975	975	fastfred_hardware_type = 0;
976	976	}
977	977
978	978	static DRIVER_INIT( boggy84 )
979	979	{
980		memory_install_readwrite8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xc800, 0xcfff, 0, 0, jumpcoas_custom_io_r, SMH_NOP);
	980	memory_install_readwrite8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xc800, 0xcfff, 0, 0, jumpcoas_custom_io_r, (write8_space_func)SMH_NOP);
981	981	fastfred_hardware_type = 2;
982	982	}
983	983

src/mame/drivers/astrof.c

r4679	r4680
86	86
87	87	static READ8_HANDLER( irq_clear_r )
88	88	{
89		cpu_set_input_line(space->machine->cpu[0], 0, CLEAR_LINE);
	89	cputag_set_input_line(space->machine, "maincpu", 0, CLEAR_LINE);
90	90
91	91	return 0;
92	92	}
r4679	r4680
94	94
95	95	static TIMER_DEVICE_CALLBACK( irq_callback )
96	96	{
97		cpu_set_input_line(timer->machine->cpu[0], 0, ASSERT_LINE);
	97	cputag_set_input_line(timer->machine, "maincpu", 0, ASSERT_LINE);
98	98	}
99	99
100	100
r4679	r4680
108	108	static INPUT_CHANGED( coin_inserted )
109	109	{
110	110	/* coin insertion causes an NMI */
111		cpu_set_input_line(field->port->machine->cpu[0], INPUT_LINE_NMI, newval ? ASSERT_LINE : CLEAR_LINE);
	111	cputag_set_input_line(field->port->machine, "maincpu", INPUT_LINE_NMI, newval ? ASSERT_LINE : CLEAR_LINE);
112	112	coin_counter_w(0, newval);
113	113	}
114	114
r4679	r4680
116	116	static INPUT_CHANGED( service_coin_inserted )
117	117	{
118	118	/* service coin insertion causes an NMI */
119		cpu_set_input_line(field->port->machine->cpu[0], INPUT_LINE_NMI, newval ? ASSERT_LINE : CLEAR_LINE);
	119	cputag_set_input_line(field->port->machine, "maincpu", INPUT_LINE_NMI, newval ? ASSERT_LINE : CLEAR_LINE);
120	120	}
121	121
122	122
r4679	r4680
173	173	static VIDEO_START( astrof )
174	174	{
175	175	/* allocate the color RAM -- half the size of the video RAM as A0 is not connected */
176		astrof_colorram = auto_malloc(astrof_videoram_size / 2);
	176	astrof_colorram = auto_alloc_array(machine, UINT8, astrof_videoram_size / 2);
177	177	state_save_register_global_pointer(machine, astrof_colorram, astrof_videoram_size / 2);
178	178	}
179	179
r4679	r4680
1191	1191	rom[i] = prom[rom[i]];
1192	1192
1193	1193	/* set up protection handlers */
1194		memory_install_read8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xa003, 0xa003, 0, 0, shoot_r);
1195		memory_install_read8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xa004, 0xa004, 0, 0, abattle_coin_prot_r);
	1194	memory_install_read8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xa003, 0xa003, 0, 0, shoot_r);
	1195	memory_install_read8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xa004, 0xa004, 0, 0, abattle_coin_prot_r);
1196	1196	}
1197	1197
1198	1198
r4679	r4680
1205	1205	rom[i] = ~rom[i];
1206	1206
1207	1207	/* set up protection handlers */
1208		memory_install_read8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xa003, 0xa003, 0, 0, shoot_r);
1209		memory_install_read8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xa004, 0xa004, 0, 0, afire_coin_prot_r);
	1208	memory_install_read8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xa003, 0xa003, 0, 0, shoot_r);
	1209	memory_install_read8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xa004, 0xa004, 0, 0, afire_coin_prot_r);
1210	1210	}
1211	1211
1212	1212
r4679	r4680
1219	1219	rom[i] = ~rom[i];
1220	1220
1221	1221	/* set up protection handlers */
1222		memory_install_read8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xa003, 0xa003, 0, 0, shoot_r);
1223		memory_install_read8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xa004, 0xa004, 0, 0, abattle_coin_prot_r);
	1222	memory_install_read8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xa003, 0xa003, 0, 0, shoot_r);
	1223	memory_install_read8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xa004, 0xa004, 0, 0, abattle_coin_prot_r);
1224	1224	}
1225	1225
1226	1226

src/mame/drivers/karnov.c

r4679	r4680
65	65	static void karnov_i8751_w(running_machine *machine, int data)
66	66	{
67	67	/* Pending coin operations may cause protection commands to be queued */
68		if (i8751_needs_ack) {
	68	if (i8751_needs_ack)
	69	{
69	70	i8751_command_queue=data;
70	71	return;
71	72	}
r4679	r4680
88	89
89	90	//  if (!i8751_return && data!=0x300) logerror("%s - Unknown Write %02x intel\n",cpuexec_describe_context(machine),data);
90	91
91		cpu_set_input_line(machine->cpu[0],6,HOLD_LINE); /* Signal main cpu task is complete */
	92	cputag_set_input_line(machine, "maincpu", 6, HOLD_LINE); /* Signal main cpu task is complete */
92	93	i8751_needs_ack=1;
93	94	}
94	95
95	96	static void wndrplnt_i8751_w(running_machine *machine, int data)
96	97	{
97	98	/* The last command hasn't been ACK'd (probably a conflict with coin command) */
98		if (i8751_needs_ack) {
	99	if (i8751_needs_ack)
	100	{
99	101	i8751_command_queue=data;
100	102	return;
101	103	}
r4679	r4680
108	110
109	111	/* The game writes many values in the 0x600 range, but only a specific mask
110	112	matters for the return value */
111		if ((data&0x600)==0x600) {
112		switch (data&0x18) {
	113	if ((data&0x600)==0x600)
	114	{
	115	switch (data&0x18)
	116	{
113	117	case 0x00:    i8751_return=0x4d53; break;
114	118	case 0x08:   i8751_return=0x4b54; break;
115	119	case 0x10:    i8751_return=0x5453; break;
r4679	r4680
142	146	if (data==0x501) i8751_return=0x6bf8;
143	147	if (data==0x500) i8751_return=0x4e75;
144	148
145		cpu_set_input_line(machine->cpu[0],6,HOLD_LINE); /* Signal main cpu task is complete */
	149	cputag_set_input_line(machine, "maincpu", 6, HOLD_LINE); /* Signal main cpu task is complete */
146	150	i8751_needs_ack=1;
147	151	}
148	152
r4679	r4680
151	155	static int level;
152	156
153	157	/* Pending coin operations may cause protection commands to be queued */
154		if (i8751_needs_ack) {
	158	if (i8751_needs_ack)
	159	{
155	160	i8751_command_queue=data;
156	161	return;
157	162	}
r4679	r4680
167	172	if (data>=0x6000 && data<0x8000) i8751_return=1;  /* patched */
168	173	if ((data&0xf000)==0x1000) level=1; /* Level 1 */
169	174	if ((data&0xf000)==0x2000) level++; /* Level Increment */
170		if ((data&0xf000)==0x3000) {        /* Sprite table mapping */
	175	if ((data&0xf000)==0x3000)
	176	{        /* Sprite table mapping */
171	177	int b=data&0xff;
172		switch (level) {
	178	switch (level)
	179	{
173	180	case 1: /* Level 1, Sprite mapping tables */
174		if (microcontroller_id==CHELNOV) { /* USA */
	181	if (microcontroller_id==CHELNOV)
	182	{ /* USA */
175	183	if (b<2) i8751_return=0;
176	184	else if (b<6) i8751_return=1;
177	185	else if (b<0xb) i8751_return=2;
178	186	else if (b<0xf) i8751_return=3;
179	187	else if (b<0x13) i8751_return=4;
180	188	else i8751_return=5;
181		} else { /* Japan, World */
	189	}
	190	else
	191	{ /* Japan, World */
182	192	if (b<3) i8751_return=0;
183	193	else if (b<8) i8751_return=1;
184	194	else if (b<0xc) i8751_return=2;
r4679	r4680
252	262
253	263	//  logerror("%s - Unknown Write %02x intel\n",cpuexec_describe_context(machine),data);
254	264
255		cpu_set_input_line(machine->cpu[0],6,HOLD_LINE); /* Signal main cpu task is complete */
	265	cputag_set_input_line(machine, "maincpu", 6, HOLD_LINE); /* Signal main cpu task is complete */
256	266	i8751_needs_ack=1;
257	267	}
258	268
r4679	r4680
261	271	static WRITE16_HANDLER( karnov_control_w )
262	272	{
263	273	/* Mnemonics filled in from the schematics, brackets are my comments */
264		switch (offset<<1) {
	274	switch (offset<<1)
	275	{
265	276	case 0: /* SECLR (Interrupt ack for Level 6 i8751 interrupt) */
266		cpu_set_input_line(space->machine->cpu[0],6,CLEAR_LINE);
	277	cputag_set_input_line(space->machine, "maincpu", 6, CLEAR_LINE);
267	278
268		if (i8751_needs_ack) {
	279	if (i8751_needs_ack)
	280	{
269	281	/* If a command and coin insert happen at once, then the i8751 will queue the
270	282	coin command until the previous command is ACK'd */
271		if (i8751_coin_pending) {
	283	if (i8751_coin_pending)
	284	{
272	285	i8751_return=i8751_coin_pending;
273		cpu_set_input_line(space->machine->cpu[0],6,HOLD_LINE);
	286	cputag_set_input_line(space->machine, "maincpu", 6, HOLD_LINE);
274	287	i8751_coin_pending=0;
275		} else if (i8751_command_queue) {
	288	}
	289	else if (i8751_command_queue)
	290	{
276	291	/* Pending control command - just write it back as SECREQ */
277	292	i8751_needs_ack=0;
278	293	karnov_control_w(space,3,i8751_command_queue,0xffff);
279	294	i8751_command_queue=0;
280		} else {
	295	}
	296	else
	297	{
281	298	i8751_needs_ack=0;
282	299	}
283	300	}
r4679	r4680
285	302
286	303	case 2: /* SONREQ (Sound CPU byte) */
287	304	soundlatch_w(space,0,data&0xff);
288		cpu_set_input_line (space->machine->cpu[1], INPUT_LINE_NMI, PULSE_LINE);
	305	cputag_set_input_line (space->machine, "audiocpu", INPUT_LINE_NMI, PULSE_LINE);
289	306	break;
290	307
291	308	case 4: /* DM (DMA to buffer spriteram) */
r4679	r4680
316	333	break;
317	334
318	335	case 0xe: /* INTCLR (Interrupt ack for Level 7 vbl interrupt) */
319		cpu_set_input_line(space->machine->cpu[0],7,CLEAR_LINE);
	336	cputag_set_input_line(space->machine, "maincpu", 7, CLEAR_LINE);
320	337	break;
321	338	}
322	339	}
r4679	r4680
325	342
326	343	static READ16_HANDLER( karnov_control_r )
327	344	{
328		switch (offset<<1) {
	345	switch (offset<<1)
	346	{
329	347	case 0:
330	348	return input_port_read(space->machine, "P1_P2");
331	349	case 2: /* Start buttons & VBL */
r4679	r4680
341	359
342	360	/******************************************************************************/
343	361
344		static ADDRESS_MAP_START( karnov_readmem, ADDRESS_SPACE_PROGRAM, 16 )
345		AM_RANGE(0x000000, 0x05ffff) AM_READ(SMH_ROM)
346		AM_RANGE(0x060000, 0x063fff) AM_READ(SMH_RAM)
347		AM_RANGE(0x080000, 0x080fff) AM_READ(SMH_RAM)
348		AM_RANGE(0x0a0000, 0x0a07ff) AM_READ(SMH_RAM)
349		AM_RANGE(0x0c0000, 0x0c0007) AM_READ(karnov_control_r)
350		ADDRESS_MAP_END
351
352		static ADDRESS_MAP_START( karnov_writemem, ADDRESS_SPACE_PROGRAM, 16 )
353		AM_RANGE(0x000000, 0x05ffff) AM_WRITE(SMH_ROM)
354		AM_RANGE(0x060000, 0x063fff) AM_WRITE(SMH_RAM) AM_BASE(&karnov_ram)
355		AM_RANGE(0x080000, 0x080fff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)
356		AM_RANGE(0x0a0000, 0x0a07ff) AM_WRITE(karnov_videoram_w) AM_BASE(&videoram16)
	362	static ADDRESS_MAP_START( karnov_map, ADDRESS_SPACE_PROGRAM, 16 )
	363	AM_RANGE(0x000000, 0x05ffff) AM_ROM
	364	AM_RANGE(0x060000, 0x063fff) AM_RAM AM_BASE(&karnov_ram)
	365	AM_RANGE(0x080000, 0x080fff) AM_RAM AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)
	366	AM_RANGE(0x0a0000, 0x0a07ff) AM_RAM_WRITE(karnov_videoram_w) AM_BASE(&videoram16)
357	367	AM_RANGE(0x0a0800, 0x0a0fff) AM_WRITE(karnov_videoram_w) /* Wndrplnt Mirror */
358		AM_RANGE(0x0a1000, 0x0a17ff) AM_WRITE(SMH_RAM) AM_BASE(&karnov_pf_data)
	368	AM_RANGE(0x0a1000, 0x0a17ff) AM_WRITEONLY AM_BASE(&karnov_pf_data)
359	369	AM_RANGE(0x0a1800, 0x0a1fff) AM_WRITE(karnov_playfield_swap_w)
	370	AM_RANGE(0x0c0000, 0x0c0007) AM_READ(karnov_control_r)
360	371	AM_RANGE(0x0c0000, 0x0c000f) AM_WRITE(karnov_control_w)
361	372	ADDRESS_MAP_END
362	373
363	374	/******************************************************************************/
364	375
365		static ADDRESS_MAP_START( karnov_s_readmem, ADDRESS_SPACE_PROGRAM, 8 )
366		AM_RANGE(0x0000, 0x05ff) AM_READ(SMH_RAM)
	376	static ADDRESS_MAP_START( karnov_sound_map, ADDRESS_SPACE_PROGRAM, 8 )
	377	AM_RANGE(0x0000, 0x05ff) AM_RAM
367	378	AM_RANGE(0x0800, 0x0800) AM_READ(soundlatch_r)
368		AM_RANGE(0x8000, 0xffff) AM_READ(SMH_ROM)
369		ADDRESS_MAP_END
370
371		static ADDRESS_MAP_START( karnov_s_writemem, ADDRESS_SPACE_PROGRAM, 8 )
372		AM_RANGE(0x0000, 0x05ff) AM_WRITE(SMH_RAM)
373	379	AM_RANGE(0x1000, 0x1001) AM_DEVWRITE("ym1", ym2203_w)
374	380	AM_RANGE(0x1800, 0x1801) AM_DEVWRITE("ym2", ym3526_w)
375		AM_RANGE(0x8000, 0xffff) AM_WRITE(SMH_ROM)
	381	AM_RANGE(0x8000, 0xffff) AM_ROM
376	382	ADDRESS_MAP_END
377	383
	384
378	385	/******************************************************************************/
379	386
380	387
r4679	r4680
673	680
674	681	/* Coin input to the i8751 generates an interrupt to the main cpu */
675	682	if (input_port_read(device->machine, "FAKE") == coin_mask) latch=1;
676		if (input_port_read(device->machine, "FAKE") != coin_mask && latch) {
677		if (i8751_needs_ack) {
	683	if (input_port_read(device->machine, "FAKE") != coin_mask && latch)
	684	{
	685	if (i8751_needs_ack)
	686	{
678	687	/* i8751 is busy - queue the command */
679	688	i8751_coin_pending=input_port_read(device->machine, "FAKE") | 0x8000;
680		} else {
	689	}
	690	else
	691	{
681	692	i8751_return=input_port_read(device->machine, "FAKE") | 0x8000;
682	693	cpu_set_input_line(device,6,HOLD_LINE);
683	694	i8751_needs_ack=1;
r4679	r4680
690	701
691	702	static void sound_irq(const device_config *device, int linestate)
692	703	{
693		cpu_set_input_line(device->machine->cpu[1],0,linestate); /* IRQ */
	704	cputag_set_input_line(device->machine, "audiocpu", 0, linestate); /* IRQ */
694	705	}
695	706
696	707	static const ym3526_interface ym3526_config =
r4679	r4680
709	720
710	721	/* basic machine hardware */
711	722	MDRV_CPU_ADD("maincpu", M68000, 10000000)   /* 10 MHz */
712		MDRV_CPU_PROGRAM_MAP(karnov_readmem,karnov_writemem)
	723	MDRV_CPU_PROGRAM_MAP(karnov_map,0)
713	724	MDRV_CPU_VBLANK_INT("screen", karnov_interrupt)
714	725
715	726	MDRV_CPU_ADD("audiocpu", M6502, 1500000)   /* Accurate */
716		MDRV_CPU_PROGRAM_MAP(karnov_s_readmem,karnov_s_writemem)
	727	MDRV_CPU_PROGRAM_MAP(karnov_sound_map,0)
717	728
718	729	MDRV_MACHINE_RESET(karnov)
719	730
r4679	r4680
750	761
751	762	/* basic machine hardware */
752	763	MDRV_CPU_ADD("maincpu", M68000, 10000000)   /* 10 MHz */
753		MDRV_CPU_PROGRAM_MAP(karnov_readmem,karnov_writemem)
	764	MDRV_CPU_PROGRAM_MAP(karnov_map,0)
754	765	MDRV_CPU_VBLANK_INT("screen", karnov_interrupt)
755	766
756	767	MDRV_CPU_ADD("audiocpu", M6502, 1500000)   /* Accurate */
757		MDRV_CPU_PROGRAM_MAP(karnov_s_readmem,karnov_s_writemem)
	768	MDRV_CPU_PROGRAM_MAP(karnov_sound_map,0)
758	769
759	770	MDRV_MACHINE_RESET(karnov)
760	771

src/mame/drivers/lwings.c

r4679	r4680
47	47
48	48	#include "driver.h"
49	49	#include "cpu/z80/z80.h"
50		#include "deprecat.h"
51	50	#include "lwings.h"
52	51	#include "sound/2203intf.h"
53	52	#include "sound/msm5205.h"
r4679	r4680
268	267	msm5205_vclk_w(device,0);
269	268	}
270	269
271		static ADDRESS_MAP_START( avengers_readmem, ADDRESS_SPACE_PROGRAM, 8 )
272		AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM)
273		AM_RANGE(0x8000, 0xbfff) AM_READ(SMH_BANK1)
274		AM_RANGE(0xc000, 0xf7ff) AM_READ(SMH_RAM)
275		AM_RANGE(0xf808, 0xf808) AM_READ_PORT("SERVICE")
276		AM_RANGE(0xf809, 0xf809) AM_READ_PORT("P1")
277		AM_RANGE(0xf80a, 0xf80a) AM_READ_PORT("P2")
278		AM_RANGE(0xf80b, 0xf80b) AM_READ_PORT("DSWB")
279		AM_RANGE(0xf80c, 0xf80c) AM_READ_PORT("DSWA")
280		AM_RANGE(0xf80d, 0xf80d) AM_READ(avengers_protection_r)
281		ADDRESS_MAP_END
282
283		static ADDRESS_MAP_START( avengers_writemem, ADDRESS_SPACE_PROGRAM, 8 )
284		AM_RANGE(0x0000, 0xbfff) AM_WRITE(SMH_ROM)
285		AM_RANGE(0xc000, 0xddff) AM_WRITE(SMH_RAM)
286		AM_RANGE(0xde00, 0xdf7f) AM_WRITE(SMH_RAM) AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
287		AM_RANGE(0xdf80, 0xdfff) AM_WRITE(SMH_RAM)
288		AM_RANGE(0xe000, 0xe7ff) AM_WRITE(lwings_fgvideoram_w) AM_BASE(&lwings_fgvideoram)
289		AM_RANGE(0xe800, 0xefff) AM_WRITE(lwings_bg1videoram_w) AM_BASE(&lwings_bg1videoram)
290		AM_RANGE(0xf000, 0xf3ff) AM_WRITE(paletteram_RRRRGGGGBBBBxxxx_split2_w) AM_BASE(&paletteram_2)
291		AM_RANGE(0xf400, 0xf7ff) AM_WRITE(paletteram_RRRRGGGGBBBBxxxx_split1_w) AM_BASE(&paletteram)
	270	static ADDRESS_MAP_START( avengers_map, ADDRESS_SPACE_PROGRAM, 8 )
	271	AM_RANGE(0x0000, 0x7fff) AM_ROM
	272	AM_RANGE(0x8000, 0xbfff) AM_ROMBANK(1)
	273	AM_RANGE(0xc000, 0xddff) AM_RAM
	274	AM_RANGE(0xde00, 0xdf7f) AM_RAM AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
	275	AM_RANGE(0xdf80, 0xdfff) AM_RAM
	276	AM_RANGE(0xe000, 0xe7ff) AM_RAM_WRITE(lwings_fgvideoram_w) AM_BASE(&lwings_fgvideoram)
	277	AM_RANGE(0xe800, 0xefff) AM_RAM_WRITE(lwings_bg1videoram_w) AM_BASE(&lwings_bg1videoram)
	278	AM_RANGE(0xf000, 0xf3ff) AM_RAM_WRITE(paletteram_RRRRGGGGBBBBxxxx_split2_w) AM_BASE(&paletteram_2)
	279	AM_RANGE(0xf400, 0xf7ff) AM_RAM_WRITE(paletteram_RRRRGGGGBBBBxxxx_split1_w) AM_BASE(&paletteram)
292	280	AM_RANGE(0xf800, 0xf801) AM_WRITE(lwings_bg1_scrollx_w)
293	281	AM_RANGE(0xf802, 0xf803) AM_WRITE(lwings_bg1_scrolly_w)
294	282	AM_RANGE(0xf804, 0xf804) AM_WRITE(trojan_bg2_scrollx_w)
295	283	AM_RANGE(0xf805, 0xf805) AM_WRITE(trojan_bg2_image_w)
296		AM_RANGE(0xf808, 0xf808) AM_WRITENOP /* ? */
297		AM_RANGE(0xf809, 0xf809) AM_WRITE(avengers_protection_w)
298		AM_RANGE(0xf80c, 0xf80c) AM_WRITE(avengers_prot_bank_w)
299		AM_RANGE(0xf80d, 0xf80d) AM_WRITE(avengers_adpcm_w)
	284
	285	AM_RANGE(0xf808, 0xf808) AM_READ_PORT("SERVICE") AM_WRITENOP /* ? */
	286	AM_RANGE(0xf809, 0xf809) AM_READ_PORT("P1") AM_WRITE(avengers_protection_w)
	287	AM_RANGE(0xf80a, 0xf80a) AM_READ_PORT("P2")
	288	AM_RANGE(0xf80b, 0xf80b) AM_READ_PORT("DSWB")
	289	AM_RANGE(0xf80c, 0xf80c) AM_READ_PORT("DSWA") AM_WRITE(avengers_prot_bank_w)
	290	AM_RANGE(0xf80d, 0xf80d) AM_READWRITE(avengers_protection_r,avengers_adpcm_w)
300	291	AM_RANGE(0xf80e, 0xf80e) AM_WRITE(lwings_bankswitch_w)
301	292	ADDRESS_MAP_END
302	293
303		static ADDRESS_MAP_START( readmem, ADDRESS_SPACE_PROGRAM, 8 ) /* common to trojan and lwings */
304		AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM)
305		AM_RANGE(0x8000, 0xbfff) AM_READ(SMH_BANK1)
306		AM_RANGE(0xc000, 0xf7ff) AM_READ(SMH_RAM)
	294	static ADDRESS_MAP_START( lwings_map, ADDRESS_SPACE_PROGRAM, 8 )
	295	AM_RANGE(0x0000, 0x7fff) AM_ROM
	296	AM_RANGE(0x8000, 0xbfff) AM_ROMBANK(1)
	297	AM_RANGE(0xc000, 0xddff) AM_RAM
	298	AM_RANGE(0xde00, 0xdfff) AM_RAM AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
	299	AM_RANGE(0xe000, 0xe7ff) AM_RAM_WRITE(lwings_fgvideoram_w) AM_BASE(&lwings_fgvideoram)
	300	AM_RANGE(0xe800, 0xefff) AM_RAM_WRITE(lwings_bg1videoram_w) AM_BASE(&lwings_bg1videoram)
	301	AM_RANGE(0xf000, 0xf3ff) AM_RAM_WRITE(paletteram_RRRRGGGGBBBBxxxx_split2_w) AM_BASE(&paletteram_2)
	302	AM_RANGE(0xf400, 0xf7ff) AM_RAM_WRITE(paletteram_RRRRGGGGBBBBxxxx_split1_w) AM_BASE(&paletteram)
	303
307	304	AM_RANGE(0xf808, 0xf808) AM_READ_PORT("SERVICE")
308	305	AM_RANGE(0xf809, 0xf809) AM_READ_PORT("P1")
	306	AM_RANGE(0xf808, 0xf809) AM_WRITE(lwings_bg1_scrollx_w)
309	307	AM_RANGE(0xf80a, 0xf80a) AM_READ_PORT("P2")
310	308	AM_RANGE(0xf80b, 0xf80b) AM_READ_PORT("DSWA")
311		AM_RANGE(0xf80c, 0xf80c) AM_READ_PORT("DSWB")
312		ADDRESS_MAP_END
313
314		static ADDRESS_MAP_START( writemem, ADDRESS_SPACE_PROGRAM, 8 ) /* lwings */
315		AM_RANGE(0x0000, 0xbfff) AM_WRITE(SMH_ROM)
316		AM_RANGE(0xc000, 0xddff) AM_WRITE(SMH_RAM)
317		AM_RANGE(0xde00, 0xdfff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
318		AM_RANGE(0xe000, 0xe7ff) AM_WRITE(lwings_fgvideoram_w) AM_BASE(&lwings_fgvideoram)
319		AM_RANGE(0xe800, 0xefff) AM_WRITE(lwings_bg1videoram_w) AM_BASE(&lwings_bg1videoram)
320		AM_RANGE(0xf000, 0xf3ff) AM_WRITE(paletteram_RRRRGGGGBBBBxxxx_split2_w) AM_BASE(&paletteram_2)
321		AM_RANGE(0xf400, 0xf7ff) AM_WRITE(paletteram_RRRRGGGGBBBBxxxx_split1_w) AM_BASE(&paletteram)
322		AM_RANGE(0xf808, 0xf809) AM_WRITE(lwings_bg1_scrollx_w)
323	309	AM_RANGE(0xf80a, 0xf80b) AM_WRITE(lwings_bg1_scrolly_w)
324		AM_RANGE(0xf80c, 0xf80c) AM_WRITE(soundlatch_w)
	310	AM_RANGE(0xf80c, 0xf80c) AM_READ_PORT("DSWB") AM_WRITE(soundlatch_w)
325	311	AM_RANGE(0xf80d, 0xf80d) AM_WRITE(watchdog_reset_w)
326	312	AM_RANGE(0xf80e, 0xf80e) AM_WRITE(lwings_bankswitch_w)
327	313	ADDRESS_MAP_END
328	314
329		static ADDRESS_MAP_START( trojan_writemem, ADDRESS_SPACE_PROGRAM, 8 )
330		AM_RANGE(0x0000, 0xbfff) AM_WRITE(SMH_ROM)
331		AM_RANGE(0xc000, 0xddff) AM_WRITE(SMH_RAM)
332		AM_RANGE(0xde00, 0xdf7f) AM_WRITE(SMH_RAM) AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
333		AM_RANGE(0xdf80, 0xdfff) AM_WRITE(SMH_RAM)
334		AM_RANGE(0xe000, 0xe7ff) AM_WRITE(lwings_fgvideoram_w) AM_BASE(&lwings_fgvideoram)
335		AM_RANGE(0xe800, 0xefff) AM_WRITE(lwings_bg1videoram_w) AM_BASE(&lwings_bg1videoram)
336		AM_RANGE(0xf000, 0xf3ff) AM_WRITE(paletteram_RRRRGGGGBBBBxxxx_split2_w) AM_BASE(&paletteram_2)
337		AM_RANGE(0xf400, 0xf7ff) AM_WRITE(paletteram_RRRRGGGGBBBBxxxx_split1_w) AM_BASE(&paletteram)
	315	static ADDRESS_MAP_START( trojan_map, ADDRESS_SPACE_PROGRAM, 8 )
	316	AM_RANGE(0x0000, 0x7fff) AM_ROM
	317	AM_RANGE(0x8000, 0xbfff) AM_ROMBANK(1)
	318	AM_RANGE(0xc000, 0xddff) AM_RAM
	319	AM_RANGE(0xde00, 0xdf7f) AM_RAM AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
	320	AM_RANGE(0xdf80, 0xdfff) AM_RAM
	321	AM_RANGE(0xe000, 0xe7ff) AM_RAM_WRITE(lwings_fgvideoram_w) AM_BASE(&lwings_fgvideoram)
	322	AM_RANGE(0xe800, 0xefff) AM_RAM_WRITE(lwings_bg1videoram_w) AM_BASE(&lwings_bg1videoram)
	323	AM_RANGE(0xf000, 0xf3ff) AM_RAM_WRITE(paletteram_RRRRGGGGBBBBxxxx_split2_w) AM_BASE(&paletteram_2)
	324	AM_RANGE(0xf400, 0xf7ff) AM_RAM_WRITE(paletteram_RRRRGGGGBBBBxxxx_split1_w) AM_BASE(&paletteram)
	325
338	326	AM_RANGE(0xf800, 0xf801) AM_WRITE(lwings_bg1_scrollx_w)
339	327	AM_RANGE(0xf802, 0xf803) AM_WRITE(lwings_bg1_scrolly_w)
340	328	AM_RANGE(0xf804, 0xf804) AM_WRITE(trojan_bg2_scrollx_w)
341	329	AM_RANGE(0xf805, 0xf805) AM_WRITE(trojan_bg2_image_w)
342		AM_RANGE(0xf80c, 0xf80c) AM_WRITE(soundlatch_w)
	330	AM_RANGE(0xf808, 0xf808) AM_READ_PORT("SERVICE")
	331	AM_RANGE(0xf809, 0xf809) AM_READ_PORT("P1")
	332	AM_RANGE(0xf80a, 0xf80a) AM_READ_PORT("P2")
	333	AM_RANGE(0xf80b, 0xf80b) AM_READ_PORT("DSWA")
	334	AM_RANGE(0xf80c, 0xf80c) AM_READ_PORT("DSWB") AM_WRITE(soundlatch_w)
343	335	AM_RANGE(0xf80d, 0xf80d) AM_WRITE(watchdog_reset_w)
344	336	AM_RANGE(0xf80e, 0xf80e) AM_WRITE(lwings_bankswitch_w)
345	337	ADDRESS_MAP_END
346	338
347		static ADDRESS_MAP_START( sound_readmem, ADDRESS_SPACE_PROGRAM, 8 )
348		AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM)
349		AM_RANGE(0xc000, 0xc7ff) AM_READ(SMH_RAM)
	339	static ADDRESS_MAP_START( lwings_sound_map, ADDRESS_SPACE_PROGRAM, 8 )
	340	AM_RANGE(0x0000, 0x7fff) AM_ROM
	341	AM_RANGE(0xc000, 0xc7ff) AM_RAM
350	342	AM_RANGE(0xc800, 0xc800) AM_READ(soundlatch_r)
351		AM_RANGE(0xe006, 0xe006) AM_READ(avengers_soundlatch2_r) //AT: (avengers061gre)
352		ADDRESS_MAP_END
353
354		static ADDRESS_MAP_START( sound_writemem, ADDRESS_SPACE_PROGRAM, 8 )
355		AM_RANGE(0x0000, 0x7fff) AM_WRITE(SMH_ROM)
356		AM_RANGE(0xc000, 0xc7ff) AM_WRITE(SMH_RAM)
357	343	AM_RANGE(0xe000, 0xe001) AM_DEVWRITE("2203a", ym2203_w)
358	344	AM_RANGE(0xe002, 0xe003) AM_DEVWRITE("2203b", ym2203_w)
359		AM_RANGE(0xe006, 0xe006) AM_WRITE(SMH_RAM) AM_BASE(&avengers_soundlatch2)
	345	AM_RANGE(0xe006, 0xe006) AM_READ(avengers_soundlatch2_r) //AT: (avengers061gre)
	346	AM_RANGE(0xe006, 0xe006) AM_WRITEONLY AM_BASE(&avengers_soundlatch2)
360	347	ADDRESS_MAP_END
361	348
362		static ADDRESS_MAP_START( adpcm_readmem, ADDRESS_SPACE_PROGRAM, 8 )
363		AM_RANGE(0x0000, 0xffff) AM_READ(SMH_ROM)
364		ADDRESS_MAP_END
365
366	349	/* Yes, _no_ ram */
367		static ADDRESS_MAP_START( adpcm_writemem, ADDRESS_SPACE_PROGRAM, 8 )
368		/*  AM_RANGE(0x0000, 0xffff) AM_WRITE(SMH_ROM) avoid cluttering up error.log */
369		AM_RANGE(0x0000, 0xffff) AM_WRITENOP
	350	static ADDRESS_MAP_START( trojan_adpcm_map, ADDRESS_SPACE_PROGRAM, 8 )
	351	AM_RANGE(0x0000, 0xffff) AM_ROM AM_WRITENOP
370	352	ADDRESS_MAP_END
371	353
372	354	static ADDRESS_MAP_START( avengers_adpcm_io_map, ADDRESS_SPACE_IO, 8 )
r4679	r4680
375	357	AM_RANGE(0x01, 0x01) AM_DEVWRITE("5205", msm5205_w)
376	358	ADDRESS_MAP_END
377	359
378		static ADDRESS_MAP_START( adpcm_io_map, ADDRESS_SPACE_IO, 8 )
	360	static ADDRESS_MAP_START( trojan_adpcm_io_map, ADDRESS_SPACE_IO, 8 )
379	361	ADDRESS_MAP_GLOBAL_MASK(0xff)
380	362	AM_RANGE(0x00, 0x00) AM_READ(soundlatch_r)
381	363	AM_RANGE(0x01, 0x01) AM_DEVWRITE("5205", msm5205_w)
r4679	r4680
754	736
755	737	/* basic machine hardware */
756	738	MDRV_CPU_ADD("maincpu", Z80, 6000000)        /* 4 MHz (?) */
757		MDRV_CPU_PROGRAM_MAP(readmem,writemem)
	739	MDRV_CPU_PROGRAM_MAP(lwings_map,0)
758	740	MDRV_CPU_VBLANK_INT("screen", lwings_interrupt)
759	741
760	742	MDRV_CPU_ADD("soundcpu", Z80, 4000000)
761		MDRV_CPU_PROGRAM_MAP(sound_readmem,sound_writemem)
762		MDRV_CPU_VBLANK_INT_HACK(irq0_line_hold,4)
	743	MDRV_CPU_PROGRAM_MAP(lwings_sound_map,0)
	744	MDRV_CPU_PERIODIC_INT(irq0_line_hold,4*60) /* ??? */
763	745
764	746	/* video hardware */
765	747	MDRV_VIDEO_ATTRIBUTES(VIDEO_BUFFERS_SPRITERAM)
r4679	r4680
798	780	MDRV_IMPORT_FROM( lwings )
799	781
800	782	MDRV_CPU_MODIFY("maincpu")
801		MDRV_CPU_PROGRAM_MAP(readmem,trojan_writemem)
	783	MDRV_CPU_PROGRAM_MAP(trojan_map,0)
802	784
803	785	MDRV_CPU_ADD("adpcm", Z80, 4000000) // 3.579545 Mhz (?)
804		MDRV_CPU_PROGRAM_MAP(adpcm_readmem,adpcm_writemem)
805		MDRV_CPU_IO_MAP(adpcm_io_map,0)
	786	MDRV_CPU_PROGRAM_MAP(trojan_adpcm_map,0)
	787	MDRV_CPU_IO_MAP(trojan_adpcm_io_map,0)
806	788	MDRV_CPU_PERIODIC_INT(irq0_line_hold, 4000)
807	789
808	790	/* video hardware */
r4679	r4680
821	803	MDRV_IMPORT_FROM( trojan )
822	804
823	805	MDRV_CPU_MODIFY("maincpu") //AT: (avengers37b16gre)
824		MDRV_CPU_PROGRAM_MAP(avengers_readmem,avengers_writemem)
	806	MDRV_CPU_PROGRAM_MAP(avengers_map,0)
825	807	MDRV_CPU_VBLANK_INT("screen", nmi_line_pulse) // RST 38h triggered by software
826	808
827	809	MDRV_CPU_MODIFY("adpcm")

src/mame/drivers/maxaflex.c

r4679	r4680
79	79
80	80	/* clear coin interrupt */
81	81	if (data & 0x04)
82		cpu_set_input_line(space->machine->cpu[1], M6805_IRQ_LINE, CLEAR_LINE );
	82	cputag_set_input_line(space->machine, "mcu", M6805_IRQ_LINE, CLEAR_LINE );
83	83
84	84	/* AUDMUTE */
85	85	sound_global_enable((data >> 5) & 1);
86	86
87	87	/* RES600 */
88	88	if (diff & 0x10)
89		cpu_set_input_line(space->machine->cpu[0], INPUT_LINE_RESET, (data & 0x10) ? CLEAR_LINE : ASSERT_LINE);
	89	cputag_set_input_line(space->machine, "maincpu", INPUT_LINE_RESET, (data & 0x10) ? CLEAR_LINE : ASSERT_LINE);
90	90
91	91	/* latch for lamps */
92	92	if ((diff & 0x40) && !(data & 0x40))
r4679	r4680
154	154	if ( (tcr & 0x40) == 0 )
155	155	{
156	156	//timer interrupt!
157		generic_pulse_irq_line(machine->cpu[1], M68705_INT_TIMER);
	157	generic_pulse_irq_line(cputag_get_cpu(machine, "mcu"), M68705_INT_TIMER);
158	158	}
159	159	}
160	160	}
r4679	r4680
226	226	static INPUT_CHANGED( coin_inserted )
227	227	{
228	228	if (!newval)
229		cpu_set_input_line(field->port->machine->cpu[1], M6805_IRQ_LINE, HOLD_LINE );
	229	cputag_set_input_line(field->port->machine, "mcu", M6805_IRQ_LINE, HOLD_LINE );
230	230	}
231	231
232	232	int atari_input_disabled(void)
r4679	r4680
542	542	GAME( 1983, mf_brist, maxaflex, maxaflex, a600xl, a600xl, ROT0, "Exidy / First Star Software", "Bristles (Max-A-Flex)", 0 )
543	543	GAME( 1983, mf_flip,  maxaflex, maxaflex, a600xl, a600xl, ROT0, "Exidy / First Star Software", "Flip & Flop (Max-A-Flex)", 0 )
544	544	GAME( 1984, mf_bdash, maxaflex, maxaflex, a600xl, a600xl, ROT0, "Exidy / First Star Software", "Boulder Dash (Max-A-Flex)", 0 )
545

src/mame/drivers/punchout.c

r4679	r4680
150	150
151	151	static WRITE8_DEVICE_HANDLER( punchout_speech_reset_w )
152	152	{
153		vlm5030_rst( device, data&0x01 );
	153	vlm5030_rst( device, data & 0x01 );
154	154	}
155	155
156	156	static WRITE8_DEVICE_HANDLER( punchout_speech_st_w )
157	157	{
158		vlm5030_st( device, data&0x01 );
	158	vlm5030_st( device, data & 0x01 );
159	159	}
160	160
161	161	static WRITE8_DEVICE_HANDLER( punchout_speech_vcu_w )
r4679	r4680
166	166	static WRITE8_HANDLER( punchout_2a03_reset_w )
167	167	{
168	168	if (data & 1)
169		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_RESET, ASSERT_LINE);
	169	cputag_set_input_line(space->machine, "audiocpu", INPUT_LINE_RESET, ASSERT_LINE);
170	170	else
171		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_RESET, CLEAR_LINE);
	171	cputag_set_input_line(space->machine, "audiocpu", INPUT_LINE_RESET, CLEAR_LINE);
172	172	}
173	173
174	174	static int rp5c01_mode_sel; /* Mode selector */
r4679	r4680
176	176
177	177	static READ8_HANDLER( spunchout_rp5c01_r )
178	178	{
179		logerror("%04x: prot_r %x\n",cpu_get_previouspc(space->cpu),offset);
	179	logerror("%04x: prot_r %x\n", cpu_get_previouspc(space->cpu), offset);
180	180
181	181	if (offset <= 0x0c)
182	182	{
r4679	r4680
365	365	ADDRESS_MAP_END
366	366
367	367
368		static ADDRESS_MAP_START( io_map, ADDRESS_SPACE_IO, 8 )
	368	static ADDRESS_MAP_START( punchout_io_map, ADDRESS_SPACE_IO, 8 )
369	369	ADDRESS_MAP_GLOBAL_MASK(0xff)
370	370	AM_RANGE(0x00, 0x00) AM_READ_PORT("IN0")
371	371	AM_RANGE(0x01, 0x01) AM_READ_PORT("IN1")
r4679	r4680
388	388	AM_RANGE(0x07, 0x07) AM_MIRROR(0xf0) AM_MASK(0xf0) AM_READWRITE(spunchout_exp_r, spunchout_exp_w)
389	389	ADDRESS_MAP_END
390	390
391		static ADDRESS_MAP_START( sound_readmem, ADDRESS_SPACE_PROGRAM, 8 )
392		AM_RANGE(0x0000, 0x07ff) AM_READ(SMH_RAM)
	391	static ADDRESS_MAP_START( punchout_sound_map, ADDRESS_SPACE_PROGRAM, 8 )
	392	AM_RANGE(0x0000, 0x07ff) AM_RAM
393	393	AM_RANGE(0x4016, 0x4016) AM_READ(soundlatch_r)
394	394	AM_RANGE(0x4017, 0x4017) AM_READ(soundlatch2_r)
395		AM_RANGE(0x4000, 0x4017) AM_DEVREAD("nes", nes_psg_r)
396		AM_RANGE(0xe000, 0xffff) AM_READ(SMH_ROM)
	395	AM_RANGE(0x4000, 0x4017) AM_DEVREADWRITE("nes", nes_psg_r,nes_psg_w)
	396	AM_RANGE(0xe000, 0xffff) AM_ROM
397	397	ADDRESS_MAP_END
398	398
399		static ADDRESS_MAP_START( sound_writemem, ADDRESS_SPACE_PROGRAM, 8 )
400		AM_RANGE(0x0000, 0x07ff) AM_WRITE(SMH_RAM)
401		AM_RANGE(0x4000, 0x4017) AM_DEVWRITE("nes", nes_psg_w)
402		AM_RANGE(0xe000, 0xffff) AM_WRITE(SMH_ROM)
403		ADDRESS_MAP_END
404	399
405	400
406
407	401	static INPUT_PORTS_START( punchout )
408	402	PORT_START("IN0")
409	403	PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_BUTTON1 )
r4679	r4680
613	607	/* basic machine hardware */
614	608	MDRV_CPU_ADD("maincpu", Z80, 8000000/2)   /* 4 MHz */
615	609	MDRV_CPU_PROGRAM_MAP(punchout_map,0)
616		MDRV_CPU_IO_MAP(io_map,0)
	610	MDRV_CPU_IO_MAP(punchout_io_map,0)
617	611	MDRV_CPU_VBLANK_INT("top", nmi_line_pulse)
618	612
619	613	MDRV_CPU_ADD("audiocpu", N2A03, N2A03_DEFAULTCLOCK)
620		MDRV_CPU_PROGRAM_MAP(sound_readmem,sound_writemem)
	614	MDRV_CPU_PROGRAM_MAP(punchout_sound_map,0)
621	615	MDRV_CPU_VBLANK_INT("top", nmi_line_pulse)
622	616
623	617	MDRV_MACHINE_RESET(punchout)
r4679	r4680
1048	1042	GAME( 1984, spnchout, 0,        punchout, spnchout, spnchout, ROT0, "Nintendo", "Super Punch-Out!!", 0 )
1049	1043	GAME( 1984, spnchotj, spnchout, punchout, spnchout, spnchotj, ROT0, "Nintendo", "Super Punch-Out!! (Japan)", 0 )
1050	1044	GAME( 1985, armwrest, 0,        armwrest, armwrest, armwrest, ROT0, "Nintendo", "Arm Wrestling", 0 )
1051

src/mame/drivers/vegas.c

r4679	r4680
543	543	dcs_idma_cs = 0;
544	544
545	545	/* set the fastest DRC options, but strict verification */
546		mips3drc_set_options(machine->cpu[0], MIPS3DRC_FASTEST_OPTIONS + MIPS3DRC_STRICT_VERIFY + MIPS3DRC_FLUSH_PC);
	546	mips3drc_set_options(cputag_get_cpu(machine, "maincpu"), MIPS3DRC_FASTEST_OPTIONS + MIPS3DRC_STRICT_VERIFY + MIPS3DRC_FLUSH_PC);
547	547
548	548	/* configure fast RAM regions for DRC */
549		mips3drc_add_fastram(machine->cpu[0], 0x00000000, ramsize - 1, FALSE, rambase);
550		mips3drc_add_fastram(machine->cpu[0], 0x1fc00000, 0x1fc7ffff, TRUE, rombase);
	549	mips3drc_add_fastram(cputag_get_cpu(machine, "maincpu"), 0x00000000, ramsize - 1, FALSE, rambase);
	550	mips3drc_add_fastram(cputag_get_cpu(machine, "maincpu"), 0x1fc00000, 0x1fc7ffff, TRUE, rombase);
551	551
552	552	/* register for save states */
553	553	state_save_register_global(machine, nile_irq_state);
r4679	r4680
922	922	if (irq[i])
923	923	{
924	924	if (LOG_NILE_IRQS) logerror(" 1");
925		cpu_set_input_line(machine->cpu[0], MIPS3_IRQ0 + i, ASSERT_LINE);
	925	cputag_set_input_line(machine, "maincpu", MIPS3_IRQ0 + i, ASSERT_LINE);
926	926	}
927	927	else
928	928	{
929	929	if (LOG_NILE_IRQS) logerror(" 0");
930		cpu_set_input_line(machine->cpu[0], MIPS3_IRQ0 + i, CLEAR_LINE);
	930	cputag_set_input_line(machine, "maincpu", MIPS3_IRQ0 + i, CLEAR_LINE);
931	931	}
932	932	}
933	933	if (LOG_NILE_IRQS) logerror("\n");
r4679	r4680
1557	1557
1558	1558	/* unmap everything we know about */
1559	1559	for (addr = 0; addr < dynamic_count; addr++)
1560		memory_install_readwrite32_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), dynamic[addr].start, dynamic[addr].end, 0, 0, SMH_UNMAP, SMH_UNMAP);
	1560	memory_install_readwrite32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), dynamic[addr].start, dynamic[addr].end, 0, 0, (read32_space_func)SMH_UNMAP, (write32_space_func)SMH_UNMAP);
1561	1561
1562	1562	/* the build the list of stuff */
1563	1563	dynamic_count = 0;
r4679	r4680
1571	1571	add_dynamic_address(base + 0x2000, base + 0x2003, sio_irq_cause_r, NULL);
1572	1572	add_dynamic_address(base + 0x3000, base + 0x3003, sio_irq_status_r, NULL);
1573	1573	add_dynamic_address(base + 0x4000, base + 0x4003, sio_led_r, sio_led_w);
1574		add_dynamic_address(base + 0x5000, base + 0x5007, SMH_NOP, NULL);
	1574	add_dynamic_address(base + 0x5000, base + 0x5007, (read32_space_func)SMH_NOP, NULL);
1575	1575	add_dynamic_address(base + 0x6000, base + 0x6003, NULL, cmos_unlock_w);
1576	1576	add_dynamic_address(base + 0x7000, base + 0x7003, NULL, vegas_watchdog_w);
1577	1577	}
r4679	r4680
1677	1677	{
1678	1678	if (LOG_DYNAMIC) logerror("  installing: %08X-%08X %s,%s\n", dynamic[addr].start, dynamic[addr].end, dynamic[addr].rdname, dynamic[addr].wrname);
1679	1679	if (dynamic[addr].mread != NULL || dynamic[addr].mwrite != NULL)
1680		_memory_install_handler32(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), dynamic[addr].start, dynamic[addr].end, 0, 0, dynamic[addr].mread, dynamic[addr].mwrite, dynamic[addr].rdname, dynamic[addr].wrname);
	1680	_memory_install_handler32(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), dynamic[addr].start, dynamic[addr].end, 0, 0, dynamic[addr].mread, dynamic[addr].mwrite, dynamic[addr].rdname, dynamic[addr].wrname);
1681	1681	if (dynamic[addr].dread != NULL || dynamic[addr].dwrite != NULL)
1682		_memory_install_device_handler32(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), dynamic[addr].device, dynamic[addr].start, dynamic[addr].end, 0, 0, dynamic[addr].dread, dynamic[addr].dwrite, dynamic[addr].rdname, dynamic[addr].wrname);
	1682	_memory_install_device_handler32(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), dynamic[addr].device, dynamic[addr].start, dynamic[addr].end, 0, 0, dynamic[addr].dread, dynamic[addr].dwrite, dynamic[addr].rdname, dynamic[addr].wrname);
1683	1683	}
1684	1684
1685	1685	if (LOG_DYNAMIC)
r4679	r4680
2469	2469
2470	2470	/* allocate RAM for the timekeeper */
2471	2471	timekeeper_nvram_size = 0x8000;
2472		timekeeper_nvram = auto_malloc(timekeeper_nvram_size);
	2472	timekeeper_nvram = auto_alloc_array(machine, UINT32, timekeeper_nvram_size/4);
2473	2473	}
2474	2474
2475	2475
r4679	r4680
2479	2479	init_common(machine, MIDWAY_IOASIC_CALSPEED, 340/* 340=39", 322=27", others? */);
2480	2480
2481	2481	/* speedups */
2482		mips3drc_add_hotspot(machine->cpu[0], 0x80015430, 0x8CC38060, 250);      /* confirmed */
2483		mips3drc_add_hotspot(machine->cpu[0], 0x80015464, 0x3C09801E, 250);      /* confirmed */
2484		mips3drc_add_hotspot(machine->cpu[0], 0x800C8918, 0x8FA2004C, 250);      /* confirmed */
2485		mips3drc_add_hotspot(machine->cpu[0], 0x800C8890, 0x8FA20024, 250);      /* confirmed */
	2482	mips3drc_add_hotspot(cputag_get_cpu(machine, "maincpu"), 0x80015430, 0x8CC38060, 250);      /* confirmed */
	2483	mips3drc_add_hotspot(cputag_get_cpu(machine, "maincpu"), 0x80015464, 0x3C09801E, 250);      /* confirmed */
	2484	mips3drc_add_hotspot(cputag_get_cpu(machine, "maincpu"), 0x800C8918, 0x8FA2004C, 250);      /* confirmed */
	2485	mips3drc_add_hotspot(cputag_get_cpu(machine, "maincpu"), 0x800C8890, 0x8FA20024, 250);      /* confirmed */
2486	2486	}
2487	2487
2488	2488
r4679	r4680
2492	2492	init_common(machine, MIDWAY_IOASIC_GAUNTDL, 346/* 347, others? */);
2493	2493
2494	2494	/* speedups */
2495		mips3drc_add_hotspot(machine->cpu[0], 0x800158B8, 0x8CC3CC40, 250);      /* confirmed */
2496		mips3drc_add_hotspot(machine->cpu[0], 0x800158EC, 0x3C0C8022, 250);      /* confirmed */
2497		mips3drc_add_hotspot(machine->cpu[0], 0x800D40C0, 0x8FA2004C, 250);      /* confirmed */
2498		mips3drc_add_hotspot(machine->cpu[0], 0x800D4038, 0x8FA20024, 250);      /* confirmed */
	2495	mips3drc_add_hotspot(cputag_get_cpu(machine, "maincpu"), 0x800158B8, 0x8CC3CC40, 250);      /* confirmed */
	2496	mips3drc_add_hotspot(cputag_get_cpu(machine, "maincpu"), 0x800158EC, 0x3C0C8022, 250);      /* confirmed */
	2497	mips3drc_add_hotspot(cputag_get_cpu(machine, "maincpu"), 0x800D40C0, 0x8FA2004C, 250);      /* confirmed */
	2498	mips3drc_add_hotspot(cputag_get_cpu(machine, "maincpu"), 0x800D4038, 0x8FA20024, 250);      /* confirmed */
2499	2499	}
2500	2500
2501	2501
r4679	r4680
2505	2505	init_common(machine, MIDWAY_IOASIC_MACE, 337/* others? */);
2506	2506
2507	2507	/* speedups */
2508		mips3drc_add_hotspot(machine->cpu[0], 0x8009436C, 0x0C031663, 250);      /* confirmed */
	2508	mips3drc_add_hotspot(cputag_get_cpu(machine, "maincpu"), 0x8009436C, 0x0C031663, 250);      /* confirmed */
2509	2509	}
2510	2510
2511	2511
r4679	r4680
2515	2515	init_common(machine, MIDWAY_IOASIC_GAUNTDL, 330/* others? */);
2516	2516
2517	2517	/* speedups */
2518		mips3drc_add_hotspot(machine->cpu[0], 0x80051CD8, 0x0C023C15, 250);      /* confirmed */
2519		mips3drc_add_hotspot(machine->cpu[0], 0x8005E674, 0x3C028017, 250);      /* confirmed */
2520		mips3drc_add_hotspot(machine->cpu[0], 0x8002DBCC, 0x8FA2002C, 250);      /* confirmed */
2521		mips3drc_add_hotspot(machine->cpu[0], 0x80015930, 0x8FC20244, 250);      /* confirmed */
	2518	mips3drc_add_hotspot(cputag_get_cpu(machine, "maincpu"), 0x80051CD8, 0x0C023C15, 250);      /* confirmed */
	2519	mips3drc_add_hotspot(cputag_get_cpu(machine, "maincpu"), 0x8005E674, 0x3C028017, 250);      /* confirmed */
	2520	mips3drc_add_hotspot(cputag_get_cpu(machine, "maincpu"), 0x8002DBCC, 0x8FA2002C, 250);      /* confirmed */
	2521	mips3drc_add_hotspot(cputag_get_cpu(machine, "maincpu"), 0x80015930, 0x8FC20244, 250);      /* confirmed */
2522	2522	}
2523	2523
2524	2524

src/mame/drivers/kopunch.c

r4679	r4680
	1	/********************************************************
	2
	3	KO Punch (c) 1981 Sega
	4
	5	********************************************************/
	6
1	7	#include "driver.h"
2	8	#include "cpu/i8085/i8085.h"
3		#include "deprecat.h"
4	9
5	10	extern UINT8 *kopunch_videoram2;
6	11
r4679	r4680
17	22
18	23	static INTERRUPT_GEN( kopunch_interrupt )
19	24	{
20		if (cpu_getiloops(device) == 0)
21		{
22		if (~input_port_read(device->machine, "SYSTEM") & 0x80)   /* coin 1 */
23		{
24		cpu_set_input_line_and_vector(device,0,HOLD_LINE,0xf7);   /* RST 30h */
25		return;
26		}
27		else if (~input_port_read(device->machine, "SYSTEM") & 0x08)   /* coin 2 */
28		{
29		cpu_set_input_line_and_vector(device,0,HOLD_LINE,0xef);   /* RST 28h */
30		return;
31		}
32		}
33
34		cpu_set_input_line_and_vector(device,0,HOLD_LINE,0xff);   /* RST 38h */
	25	cpu_set_input_line(device,I8085_RST75_LINE,ASSERT_LINE);
	26	cpu_set_input_line(device,I8085_RST75_LINE,CLEAR_LINE);
35	27	}
36	28
37	29	static READ8_HANDLER( kopunch_in_r )
r4679	r4680
88	80	AM_RANGE(0x3f, 0x3f) AM_WRITENOP
89	81	ADDRESS_MAP_END
90	82
	83	static INPUT_CHANGED( left_coin_inserted )
	84	{
	85	/* left coin insertion causes a rst6.5 (vector 0x34) */
	86	if(newval)
	87	cputag_set_input_line(field->port->machine, "maincpu", I8085_RST65_LINE, HOLD_LINE);
	88	}
91	89
	90	static INPUT_CHANGED( right_coin_inserted )
	91	{
	92	/* right coin insertion causes a rst5.5 (vector 0x2c) */
	93	if(newval)
	94	cputag_set_input_line(field->port->machine, "maincpu", I8085_RST55_LINE, HOLD_LINE);
	95	}
	96
92	97	static INPUT_PORTS_START( kopunch )
93	98	PORT_START("P1")
94	99	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_4WAY
r4679	r4680
102	107
103	108	PORT_START("SYSTEM")
104	109	PORT_BIT( 0x07, IP_ACTIVE_HIGH, IPT_SPECIAL )   /* punch strength (high 3 bits) */
105		PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_COIN2 ) PORT_IMPULSE(1)
	110	PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_COIN2 ) PORT_IMPULSE(1) PORT_CHANGED(right_coin_inserted, 0)
106	111	PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON1 )
107	112	PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON2 )
108	113	PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_BUTTON3 )
109		PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_IMPULSE(1)
	114	PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_IMPULSE(1) PORT_CHANGED(left_coin_inserted, 0)
110	115
111	116	PORT_START("DSW")
112	117	PORT_DIPNAME( 0x01, 0x01, DEF_STR( Unknown ) )
r4679	r4680
180	185	MDRV_CPU_ADD("maincpu", 8085A, 4000000)   /* 4 MHz ???? Uses SIM, must be 8085 */
181	186	MDRV_CPU_PROGRAM_MAP(kopunch_map,0)
182	187	MDRV_CPU_IO_MAP(kopunch_io_map,0)
183		MDRV_CPU_VBLANK_INT_HACK(kopunch_interrupt,4)   /* ??? */
	188	MDRV_CPU_VBLANK_INT("screen",kopunch_interrupt)
184	189
185	190	/* video hardware */
186	191	MDRV_SCREEN_ADD("screen", RASTER)

src/mame/drivers/tecmo.c

r4679	r4680
75	75
76	76
77	77	bankaddress = 0x10000 + ((data & 0xf8) << 8);
78		memory_set_bankptr(space->machine, 1,&RAM[bankaddress]);
	78	memory_set_bankptr(space->machine, 1, &RAM[bankaddress]);
79	79	}
80	80
81	81	static WRITE8_HANDLER( tecmo_sound_command_w )
82	82	{
83		soundlatch_w(space,offset,data);
84		cpu_set_input_line(space->machine->cpu[1],INPUT_LINE_NMI,PULSE_LINE);
	83	soundlatch_w(space, offset, data);
	84	cputag_set_input_line(space->machine, "soundcpu",INPUT_LINE_NMI,PULSE_LINE);
85	85	}
86	86
87	87	static WRITE8_DEVICE_HANDLER( tecmo_adpcm_start_w )
88	88	{
89	89	adpcm_pos = data << 8;
90		msm5205_reset_w(device,0);
	90	msm5205_reset_w(device, 0);
91	91	}
92	92	static WRITE8_HANDLER( tecmo_adpcm_end_w )
93	93	{
r4679	r4680
546	546
547	547	static void irqhandler(const device_config *device, int linestate)
548	548	{
549		cpu_set_input_line(device->machine->cpu[1],0,linestate);
	549	cputag_set_input_line(device->machine, "soundcpu", 0, linestate);
550	550	}
551	551
552	552	static const ym3812_interface ym3812_config =

src/mame/drivers/news.c

r4679	r4680
19	19	#include "sound/okim6295.h"
20	20
21	21
22		static ADDRESS_MAP_START( readmem, ADDRESS_SPACE_PROGRAM, 8 )
23		AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM)
24		AM_RANGE(0x8000, 0x8fff) AM_READ(SMH_RAM)
	22	static ADDRESS_MAP_START( news_map, ADDRESS_SPACE_PROGRAM, 8 )
	23	AM_RANGE(0x0000, 0x7fff) AM_ROM    /* 4000-7fff is written to during startup, probably leftover code */
	24	AM_RANGE(0x8000, 0x87ff) AM_RAM_WRITE(news_fgram_w) AM_BASE(&news_fgram)
	25	AM_RANGE(0x8800, 0x8fff) AM_RAM_WRITE(news_bgram_w) AM_BASE(&news_bgram)
	26	AM_RANGE(0x9000, 0x91ff) AM_RAM_WRITE(paletteram_xxxxRRRRGGGGBBBB_be_w) AM_BASE(&paletteram)
25	27	AM_RANGE(0xc000, 0xc000) AM_READ_PORT("DSW")
26	28	AM_RANGE(0xc001, 0xc001) AM_READ_PORT("INPUTS")
27		AM_RANGE(0xc002, 0xc002) AM_DEVREAD("oki", okim6295_r)
28		AM_RANGE(0xe000, 0xffff) AM_READ(SMH_RAM)
29		ADDRESS_MAP_END
30
31		static ADDRESS_MAP_START( writemem, ADDRESS_SPACE_PROGRAM, 8 )
32		AM_RANGE(0x0000, 0x7fff) AM_WRITE(SMH_ROM)   /* 4000-7fff is written to during startup, probably leftover code */
33		AM_RANGE(0x8000, 0x87ff) AM_WRITE(news_fgram_w) AM_BASE(&news_fgram)
34		AM_RANGE(0x8800, 0x8fff) AM_WRITE(news_bgram_w) AM_BASE(&news_bgram)
35		AM_RANGE(0x9000, 0x91ff) AM_WRITE(paletteram_xxxxRRRRGGGGBBBB_be_w) AM_BASE(&paletteram)
36		AM_RANGE(0xc002, 0xc002) AM_DEVWRITE("oki", okim6295_w) /* ?? */
	29	AM_RANGE(0xc002, 0xc002) AM_DEVREADWRITE("oki", okim6295_r,okim6295_w)
37	30	AM_RANGE(0xc003, 0xc003) AM_WRITE(news_bgpic_w)
38		AM_RANGE(0xe000, 0xffff) AM_WRITE(SMH_RAM)
	31	AM_RANGE(0xe000, 0xffff) AM_RAM
39	32	ADDRESS_MAP_END
40	33
41	34
r4679	r4680
123	116	static MACHINE_DRIVER_START( news )
124	117	/* basic machine hardware */
125	118	MDRV_CPU_ADD("maincpu", Z80,8000000)       /* ? MHz */
126		MDRV_CPU_PROGRAM_MAP(readmem,writemem)
	119	MDRV_CPU_PROGRAM_MAP(news_map,0)
127	120	MDRV_CPU_VBLANK_INT("screen", irq0_line_hold)
128	121
129	122	/* video hardware */

src/mame/drivers/galpanic.c

r4679	r4680
217	217	}
218	218	}
219	219
220		static ADDRESS_MAP_START( galpanic, ADDRESS_SPACE_PROGRAM, 16 )
	220	static ADDRESS_MAP_START( galpanic_map, ADDRESS_SPACE_PROGRAM, 16 )
221	221	AM_RANGE(0x000000, 0x3fffff) AM_ROM
222	222	AM_RANGE(0x400000, 0x400001) AM_DEVREADWRITE8("oki", okim6295_r, okim6295_w, 0x00ff)
223	223	AM_RANGE(0x500000, 0x51ffff) AM_RAM AM_BASE(&galpanic_fgvideoram) AM_SIZE(&galpanic_fgvideoram_size)
224		AM_RANGE(0x520000, 0x53ffff) AM_READWRITE(SMH_RAM,galpanic_bgvideoram_w) AM_BASE(&galpanic_bgvideoram)   /* + work RAM */
225		AM_RANGE(0x600000, 0x6007ff) AM_READWRITE(SMH_RAM,galpanic_paletteram_w) AM_BASE(&paletteram16)   /* 1024 colors, but only 512 seem to be used */
226		AM_RANGE(0x700000, 0x701fff) AM_READWRITE(pandora_spriteram_LSB_r, pandora_spriteram_LSB_w )
	224	AM_RANGE(0x520000, 0x53ffff) AM_RAM_WRITE(galpanic_bgvideoram_w) AM_BASE(&galpanic_bgvideoram)   /* + work RAM */
	225	AM_RANGE(0x600000, 0x6007ff) AM_RAM_WRITE(galpanic_paletteram_w) AM_BASE(&paletteram16)   /* 1024 colors, but only 512 seem to be used */
	226	AM_RANGE(0x700000, 0x701fff) AM_READWRITE(pandora_spriteram_LSB_r, pandora_spriteram_LSB_w)
227	227	AM_RANGE(0x702000, 0x704fff) AM_RAM
228	228	AM_RANGE(0x800000, 0x800001) AM_READ_PORT("DSW1_P1")
229	229	AM_RANGE(0x800002, 0x800003) AM_READ_PORT("DSW2_P2")
r4679	r4680
252	252	return retvalue;
253	253	}
254	254
255		static ADDRESS_MAP_START( comad_readmem, ADDRESS_SPACE_PROGRAM, 16 )
256		AM_RANGE(0x000000, 0x4fffff) AM_READ(SMH_ROM)
257		AM_RANGE(0x500000, 0x51ffff) AM_READ(SMH_RAM)
258		AM_RANGE(0x520000, 0x53ffff) AM_READ(SMH_RAM)
259		AM_RANGE(0x600000, 0x6007ff) AM_READ(SMH_RAM)
260		AM_RANGE(0x700000, 0x700fff) AM_READ(SMH_RAM)
	255	static ADDRESS_MAP_START( comad_map, ADDRESS_SPACE_PROGRAM, 16 )
	256	AM_RANGE(0x000000, 0x4fffff) AM_ROM
	257	AM_RANGE(0x500000, 0x51ffff) AM_RAM AM_BASE(&galpanic_fgvideoram) AM_SIZE(&galpanic_fgvideoram_size)
	258	AM_RANGE(0x520000, 0x53ffff) AM_RAM_WRITE(galpanic_bgvideoram_w) AM_BASE(&galpanic_bgvideoram)   /* + work RAM */
	259	AM_RANGE(0x600000, 0x6007ff) AM_RAM_WRITE(galpanic_paletteram_w) AM_BASE(&paletteram16)   /* 1024 colors, but only 512 seem to be used */
	260	AM_RANGE(0x700000, 0x700fff) AM_RAM AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)
261	261	AM_RANGE(0x800000, 0x800001) AM_READ_PORT("DSW1_P1")
262	262	AM_RANGE(0x800002, 0x800003) AM_READ_PORT("DSW2_P2")
263	263	AM_RANGE(0x800004, 0x800005) AM_READ_PORT("SYSTEM")
264	264	//  AM_RANGE(0x800006, 0x800007)    ??
265	265	AM_RANGE(0x80000a, 0x80000b) AM_READ(kludge)   /* bits 8-a = timer? palette update code waits for them to be 111 */
266	266	AM_RANGE(0x80000c, 0x80000d) AM_READ(kludge)   /* missw96 bits 8-a = timer? palette update code waits for them to be 111 */
267		AM_RANGE(0xc00000, 0xc0ffff) AM_READ(SMH_RAM)   /* missw96 */
268		AM_RANGE(0xc80000, 0xc8ffff) AM_READ(SMH_RAM)   /* fantasia, newfant */
269		AM_RANGE(0xf00000, 0xf00001) AM_DEVREAD8("oki", comad_okim6295_r, 0xff00)   /* fantasia, missw96 */
270		AM_RANGE(0xf80000, 0xf80001) AM_DEVREAD8("oki", comad_okim6295_r, 0xff00)   /* newfant */
271		ADDRESS_MAP_END
272
273		static ADDRESS_MAP_START( comad_writemem, ADDRESS_SPACE_PROGRAM, 16 )
274		AM_RANGE(0x000000, 0x4fffff) AM_WRITE(SMH_ROM)
275		AM_RANGE(0x500000, 0x51ffff) AM_WRITE(SMH_RAM) AM_BASE(&galpanic_fgvideoram) AM_SIZE(&galpanic_fgvideoram_size)
276		AM_RANGE(0x520000, 0x53ffff) AM_WRITE(galpanic_bgvideoram_w) AM_BASE(&galpanic_bgvideoram)   /* + work RAM */
277		AM_RANGE(0x600000, 0x6007ff) AM_WRITE(galpanic_paletteram_w) AM_BASE(&paletteram16)   /* 1024 colors, but only 512 seem to be used */
278		AM_RANGE(0x700000, 0x700fff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)
279	267	AM_RANGE(0x900000, 0x900001) AM_WRITE(galpania_6295_bankswitch_w)   /* not sure */
280		AM_RANGE(0xc00000, 0xc0ffff) AM_WRITE(SMH_RAM)   /* missw96 */
281		AM_RANGE(0xc80000, 0xc8ffff) AM_WRITE(SMH_RAM)   /* fantasia, newfant */
282		AM_RANGE(0xf00000, 0xf00001) AM_DEVWRITE8("oki", okim6295_w, 0xff00)   /* fantasia, missw96 */
283		AM_RANGE(0xf80000, 0xf80001) AM_DEVWRITE8("oki", okim6295_w, 0xff00)   /* newfant */
	268	AM_RANGE(0xc00000, 0xc0ffff) AM_RAM            /* missw96 */
	269	AM_RANGE(0xc80000, 0xc8ffff) AM_RAM            /* fantasia, newfant */
	270	AM_RANGE(0xf00000, 0xf00001) AM_DEVREADWRITE8("oki", comad_okim6295_r, okim6295_w, 0xff00)   /* fantasia, missw96 */
	271	AM_RANGE(0xf80000, 0xf80001) AM_DEVREADWRITE8("oki", comad_okim6295_r, okim6295_w, 0xff00)   /* newfant */
284	272	ADDRESS_MAP_END
285	273
286		static ADDRESS_MAP_START( fantsia2_readmem, ADDRESS_SPACE_PROGRAM, 16 )
287		AM_RANGE(0x000000, 0x4fffff) AM_READ(SMH_ROM)
288		AM_RANGE(0x500000, 0x51ffff) AM_READ(SMH_RAM)
289		AM_RANGE(0x520000, 0x53ffff) AM_READ(SMH_RAM)
290		AM_RANGE(0x600000, 0x6007ff) AM_READ(SMH_RAM)
291		AM_RANGE(0x700000, 0x700fff) AM_READ(SMH_RAM)
	274	static ADDRESS_MAP_START( fantsia2_map, ADDRESS_SPACE_PROGRAM, 16 )
	275	AM_RANGE(0x000000, 0x4fffff) AM_ROM
	276	AM_RANGE(0x500000, 0x51ffff) AM_RAM AM_BASE(&galpanic_fgvideoram) AM_SIZE(&galpanic_fgvideoram_size)
	277	AM_RANGE(0x520000, 0x53ffff) AM_RAM_WRITE(galpanic_bgvideoram_w) AM_BASE(&galpanic_bgvideoram)   /* + work RAM */
	278	AM_RANGE(0x600000, 0x6007ff) AM_RAM_WRITE(galpanic_paletteram_w) AM_BASE(&paletteram16)   /* 1024 colors, but only 512 seem to be used */
	279	AM_RANGE(0x700000, 0x700fff) AM_RAM AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)
292	280	AM_RANGE(0x800000, 0x800001) AM_READ_PORT("DSW1_P1")
293	281	AM_RANGE(0x800002, 0x800003) AM_READ_PORT("DSW2_P2")
294	282	AM_RANGE(0x800004, 0x800005) AM_READ_PORT("SYSTEM")
295	283	//  AM_RANGE(0x800006, 0x800007)    ??
296	284	AM_RANGE(0x800008, 0x800009) AM_READ(kludge)   /* bits 8-a = timer? palette update code waits for them to be 111 */
297		AM_RANGE(0xf80000, 0xf8ffff) AM_READ(SMH_RAM)
298		AM_RANGE(0xc80000, 0xc80001) AM_DEVREAD8("oki", comad_okim6295_r, 0xff00)
299		ADDRESS_MAP_END
300
301		static ADDRESS_MAP_START( fantsia2_writemem, ADDRESS_SPACE_PROGRAM, 16 )
302		AM_RANGE(0x000000, 0x4fffff) AM_WRITE(SMH_ROM)
303		AM_RANGE(0x500000, 0x51ffff) AM_WRITE(SMH_RAM) AM_BASE(&galpanic_fgvideoram) AM_SIZE(&galpanic_fgvideoram_size)
304		AM_RANGE(0x520000, 0x53ffff) AM_WRITE(galpanic_bgvideoram_w) AM_BASE(&galpanic_bgvideoram)   /* + work RAM */
305		AM_RANGE(0x600000, 0x6007ff) AM_WRITE(galpanic_paletteram_w) AM_BASE(&paletteram16)   /* 1024 colors, but only 512 seem to be used */
306		AM_RANGE(0x700000, 0x700fff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)
307	285	AM_RANGE(0x900000, 0x900001) AM_WRITE(galpania_6295_bankswitch_w)   /* not sure */
308		AM_RANGE(0xf80000, 0xf8ffff) AM_WRITE(SMH_RAM)
309	286	AM_RANGE(0xa00000, 0xa00001) AM_WRITENOP   /* coin counters, + ? */
310		AM_RANGE(0xc80000, 0xc80001) AM_DEVWRITE8("oki", okim6295_w, 0xff00)
	287	AM_RANGE(0xc80000, 0xc80001) AM_DEVREADWRITE8("oki", comad_okim6295_r, okim6295_w, 0xff00)
	288	AM_RANGE(0xf80000, 0xf8ffff) AM_RAM
311	289	ADDRESS_MAP_END
312	290
313	291
314		static ADDRESS_MAP_START( galhustl_readmem, ADDRESS_SPACE_PROGRAM, 16 )
315		AM_RANGE(0x000000, 0x0fffff) AM_READ(SMH_ROM)
316		AM_RANGE(0x500000, 0x51ffff) AM_READ(SMH_RAM)
317		AM_RANGE(0x580000, 0x583fff) AM_READ(SMH_RAM)
318		AM_RANGE(0x600000, 0x6007ff) AM_READ(SMH_RAM)
319		AM_RANGE(0x600800, 0x600fff) AM_READ(SMH_RAM)
320		AM_RANGE(0x680000, 0x68001f) AM_READ(SMH_RAM)
321		AM_RANGE(0x700000, 0x700fff) AM_READ(SMH_RAM)
322		AM_RANGE(0x780000, 0x78001f) AM_READ(SMH_RAM)
	292	static ADDRESS_MAP_START( galhustl_map, ADDRESS_SPACE_PROGRAM, 16 )
	293	AM_RANGE(0x000000, 0x0fffff) AM_ROM
	294	AM_RANGE(0x500000, 0x51ffff) AM_RAM AM_BASE(&galpanic_fgvideoram) AM_SIZE(&galpanic_fgvideoram_size)
	295	AM_RANGE(0x520000, 0x53ffff) AM_WRITE(galpanic_bgvideoram_w) AM_BASE(&galpanic_bgvideoram)
	296	AM_RANGE(0x580000, 0x583fff) AM_RAM_WRITE(galpanic_bgvideoram_mirror_w)
	297	AM_RANGE(0x600000, 0x6007ff) AM_RAM_WRITE(galpanic_paletteram_w) AM_BASE(&paletteram16)   /* 1024 colors, but only 512 seem to be used */
	298	AM_RANGE(0x600800, 0x600fff) AM_RAM   // writes only 1?
	299	AM_RANGE(0x680000, 0x68001f) AM_RAM   // regs?
	300	AM_RANGE(0x700000, 0x700fff) AM_RAM   AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)
	301	AM_RANGE(0x780000, 0x78001f) AM_RAM   // regs?
323	302	AM_RANGE(0x800000, 0x800001) AM_READ_PORT("DSW1_P1")
324	303	AM_RANGE(0x800002, 0x800003) AM_READ_PORT("DSW2_P2")
325	304	AM_RANGE(0x800004, 0x800005) AM_READ_PORT("SYSTEM")
326		AM_RANGE(0xd00000, 0xd00001) AM_DEVREAD8("oki", okim6295_r, 0xff00)
327		AM_RANGE(0xe80000, 0xe8ffff) AM_READ(SMH_RAM)
328		ADDRESS_MAP_END
329
330		static ADDRESS_MAP_START( galhustl_writemem, ADDRESS_SPACE_PROGRAM, 16 )
331		AM_RANGE(0x000000, 0x0fffff) AM_WRITE(SMH_ROM)
332		AM_RANGE(0x500000, 0x51ffff) AM_WRITE(SMH_RAM) AM_BASE(&galpanic_fgvideoram) AM_SIZE(&galpanic_fgvideoram_size)
333		AM_RANGE(0x520000, 0x53ffff) AM_WRITE(galpanic_bgvideoram_w) AM_BASE(&galpanic_bgvideoram)
334		AM_RANGE(0x580000, 0x583fff) AM_WRITE(galpanic_bgvideoram_mirror_w)
335		AM_RANGE(0x600000, 0x6007ff) AM_WRITE(galpanic_paletteram_w) AM_BASE(&paletteram16)   /* 1024 colors, but only 512 seem to be used */
336		AM_RANGE(0x600800, 0x600fff) AM_WRITE(SMH_RAM) // writes only 1?
337		AM_RANGE(0x680000, 0x68001f) AM_WRITE(SMH_RAM) // regs?
338		AM_RANGE(0x700000, 0x700fff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)
339		AM_RANGE(0x780000, 0x78001f) AM_WRITE(SMH_RAM) // regs?
340		AM_RANGE(0xa00000, 0xa00001) AM_WRITENOP // ?
341	305	AM_RANGE(0x900000, 0x900001) AM_WRITE(galpania_6295_bankswitch_w)
342		AM_RANGE(0xd00000, 0xd00001) AM_DEVWRITE8("oki", okim6295_w, 0xff00)
343		AM_RANGE(0xe80000, 0xe8ffff) AM_WRITE(SMH_RAM)
	306	AM_RANGE(0xa00000, 0xa00001) AM_WRITENOP // ?
	307	AM_RANGE(0xd00000, 0xd00001) AM_DEVREADWRITE8("oki", okim6295_r, okim6295_w, 0xff00)
	308	AM_RANGE(0xe80000, 0xe8ffff) AM_RAM
344	309	ADDRESS_MAP_END
345	310
346	311	#ifdef UNUSED_FUNCTION
r4679	r4680
350	315	}
351	316	#endif
352	317
353		static ADDRESS_MAP_START( zipzap_readmem, ADDRESS_SPACE_PROGRAM, 16 )
354		AM_RANGE(0x000000, 0x4fffff) AM_READ(SMH_ROM)
355		AM_RANGE(0x500000, 0x51ffff) AM_READ(SMH_RAM)
356		AM_RANGE(0x520000, 0x53ffff) AM_READ(SMH_RAM)
357		AM_RANGE(0x580000, 0x583fff) AM_READ(SMH_RAM)
358		AM_RANGE(0x600000, 0x600fff) AM_READ(SMH_RAM)
359		AM_RANGE(0x680000, 0x68001f) AM_READ(SMH_RAM)
360		AM_RANGE(0x700000, 0x71ffff) AM_READ(SMH_RAM)
361		AM_RANGE(0x780000, 0x78001f) AM_READ(SMH_RAM)
	318	static ADDRESS_MAP_START( zipzap_map, ADDRESS_SPACE_PROGRAM, 16 )
	319	AM_RANGE(0x000000, 0x4fffff) AM_ROM
	320	AM_RANGE(0x500000, 0x51ffff) AM_RAM AM_BASE(&galpanic_fgvideoram) AM_SIZE(&galpanic_fgvideoram_size)
	321	AM_RANGE(0x520000, 0x53ffff) AM_RAM_WRITE(galpanic_bgvideoram_w) AM_BASE(&galpanic_bgvideoram)
	322	AM_RANGE(0x580000, 0x583fff) AM_RAM_WRITE(galpanic_bgvideoram_mirror_w)
	323	AM_RANGE(0x600000, 0x600fff) AM_RAM_WRITE(galpanic_paletteram_w) AM_BASE(&paletteram16)   /* 1024 colors, but only 512 seem to be used */
	324	AM_RANGE(0x680000, 0x68001f) AM_RAM
	325	AM_RANGE(0x700000, 0x700fff) AM_RAM AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)
	326	AM_RANGE(0x701000, 0x71ffff) AM_RAM
	327	AM_RANGE(0x780000, 0x78001f) AM_RAM
362	328	AM_RANGE(0x800000, 0x800001) AM_READ_PORT("DSW1_P1")
363	329	AM_RANGE(0x800002, 0x800003) AM_READ_PORT("DSW2_P2")
364	330	AM_RANGE(0x800004, 0x800005) AM_READ_PORT("SYSTEM")
365	331
366		AM_RANGE(0xc00000, 0xc00001) AM_DEVREAD8("oki", comad_okim6295_r, 0xff00)
	332	AM_RANGE(0x900000, 0x900001) AM_WRITE(galpania_6295_bankswitch_w)
367	333
368		AM_RANGE(0xc80000, 0xc8ffff) AM_READ(SMH_RAM)
369		ADDRESS_MAP_END
	334	AM_RANGE(0xc00000, 0xc00001) AM_DEVREADWRITE8("oki", comad_okim6295_r, okim6295_w, 0xff00)
370	335
371		static ADDRESS_MAP_START( zipzap_writemem, ADDRESS_SPACE_PROGRAM, 16 )
372		AM_RANGE(0x000000, 0x4fffff) AM_WRITE(SMH_ROM)
373		AM_RANGE(0x500000, 0x51ffff) AM_WRITE(SMH_RAM) AM_BASE(&galpanic_fgvideoram) AM_SIZE(&galpanic_fgvideoram_size)
374		AM_RANGE(0x520000, 0x53ffff) AM_WRITE(galpanic_bgvideoram_w) AM_BASE(&galpanic_bgvideoram)
375		AM_RANGE(0x580000, 0x583fff) AM_WRITE(galpanic_bgvideoram_mirror_w)
376		AM_RANGE(0x600000, 0x600fff) AM_WRITE(galpanic_paletteram_w) AM_BASE(&paletteram16)   /* 1024 colors, but only 512 seem to be used */
377		AM_RANGE(0x680000, 0x68001f) AM_WRITE(SMH_RAM)
378		AM_RANGE(0x700000, 0x700fff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)
379		AM_RANGE(0x701000, 0x71ffff) AM_WRITE(SMH_RAM)
380		AM_RANGE(0x780000, 0x78001f) AM_WRITE(SMH_RAM)
381		AM_RANGE(0x900000, 0x900001) AM_WRITE(galpania_6295_bankswitch_w)
382		AM_RANGE(0xc00000, 0xc00001) AM_DEVWRITE8("oki", okim6295_w, 0xff00)
383		AM_RANGE(0xc80000, 0xc8ffff) AM_WRITE(SMH_RAM) // main ram
	336	AM_RANGE(0xc80000, 0xc8ffff) AM_RAM      // main ram
384	337	ADDRESS_MAP_END
385	338
386		static ADDRESS_MAP_START( supmodel_readmem, ADDRESS_SPACE_PROGRAM, 16 )
387		AM_RANGE(0x000000, 0x4fffff) AM_READ(SMH_ROM)
388		AM_RANGE(0x500000, 0x51ffff) AM_READ(SMH_RAM)
389		AM_RANGE(0x520000, 0x53ffff) AM_READ(SMH_RAM)
390		//  AM_RANGE(0x580000, 0x583fff) AM_READ(SMH_RAM)
391		AM_RANGE(0x600000, 0x600fff) AM_READ(SMH_RAM)
392		AM_RANGE(0x680000, 0x68001f) AM_READ(SMH_RAM)
393		AM_RANGE(0x700000, 0x700fff) AM_READ(SMH_RAM)
394		AM_RANGE(0x780000, 0x78001f) AM_READ(SMH_RAM)
	339	static ADDRESS_MAP_START( supmodel_map, ADDRESS_SPACE_PROGRAM, 16 )
	340	AM_RANGE(0x000000, 0x4fffff) AM_ROM
	341	AM_RANGE(0x500000, 0x51ffff) AM_RAM AM_BASE(&galpanic_fgvideoram) AM_SIZE(&galpanic_fgvideoram_size)
	342	AM_RANGE(0x520000, 0x53ffff) AM_RAM_WRITE(galpanic_bgvideoram_w) AM_BASE(&galpanic_bgvideoram)
	343	//  AM_RANGE(0x580000, 0x583fff) AM_RAM_WRITE(galpanic_bgvideoram_mirror_w) // can't be right, causes half the display to vanish at times!
	344	AM_RANGE(0x600000, 0x600fff) AM_RAM_WRITE(galpanic_paletteram_w) AM_BASE(&paletteram16)   /* 1024 colors, but only 512 seem to be used */
	345	AM_RANGE(0x680000, 0x68001f) AM_RAM
	346	AM_RANGE(0x700000, 0x700fff) AM_RAM AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)
	347	AM_RANGE(0x780000, 0x78001f) AM_RAM
395	348	AM_RANGE(0x800000, 0x800001) AM_READ_PORT("DSW1_P1")
396	349	AM_RANGE(0x800002, 0x800003) AM_READ_PORT("DSW2_P2")
397	350	AM_RANGE(0x800004, 0x800005) AM_READ_PORT("SYSTEM")
398	351	AM_RANGE(0x800006, 0x800007) AM_READ(kludge)
399	352	AM_RANGE(0x800008, 0x800009) AM_READ(kludge)
400		AM_RANGE(0xc80000, 0xc8ffff) AM_READ(SMH_RAM)
401		AM_RANGE(0xf80000, 0xf80001) AM_DEVREAD8("oki", comad_okim6295_r, 0xff00)
402		ADDRESS_MAP_END
403
404		static ADDRESS_MAP_START( supmodel_writemem, ADDRESS_SPACE_PROGRAM, 16 )
405		AM_RANGE(0x000000, 0x4fffff) AM_WRITE(SMH_ROM)
406		AM_RANGE(0x500000, 0x51ffff) AM_WRITE(SMH_RAM) AM_BASE(&galpanic_fgvideoram) AM_SIZE(&galpanic_fgvideoram_size)
407		AM_RANGE(0x520000, 0x53ffff) AM_WRITE(galpanic_bgvideoram_w) AM_BASE(&galpanic_bgvideoram)
408		//  AM_RANGE(0x580000, 0x583fff) AM_WRITE(galpanic_bgvideoram_mirror_w) // can't be right, causes half the display to vanish at times!
409		AM_RANGE(0x600000, 0x600fff) AM_WRITE(galpanic_paletteram_w) AM_BASE(&paletteram16)   /* 1024 colors, but only 512 seem to be used */
410		AM_RANGE(0x680000, 0x68001f) AM_WRITE(SMH_RAM)
411		AM_RANGE(0x700000, 0x700fff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)
412		AM_RANGE(0x780000, 0x78001f) AM_WRITE(SMH_RAM)
413	353	AM_RANGE(0x900000, 0x900001) AM_WRITE(galpania_6295_bankswitch_w)   /* not sure */
414	354	AM_RANGE(0xa00000, 0xa00001) AM_WRITENOP
415		AM_RANGE(0xc80000, 0xc8ffff) AM_WRITE(SMH_RAM) // main ram
	355	AM_RANGE(0xc80000, 0xc8ffff) AM_RAM
416	356	AM_RANGE(0xd80000, 0xd80001) AM_WRITENOP
417	357	AM_RANGE(0xe00012, 0xe00013) AM_WRITENOP
418	358	AM_RANGE(0xe80000, 0xe80001) AM_WRITENOP
419		AM_RANGE(0xf80000, 0xf80001) AM_DEVWRITE8("oki", okim6295_w, 0xff00)
	359	AM_RANGE(0xf80000, 0xf80001) AM_DEVREADWRITE8("oki", comad_okim6295_r, okim6295_w, 0xff00)
420	360	ADDRESS_MAP_END
421	361
422	362	#define COMMON_COIN0\
r4679	r4680
933	873
934	874	/* basic machine hardware */
935	875	MDRV_CPU_ADD("maincpu", M68000, XTAL_12MHz) /* verified on pcb */
936		MDRV_CPU_PROGRAM_MAP(galpanic,0)
	876	MDRV_CPU_PROGRAM_MAP(galpanic_map,0)
937	877	MDRV_CPU_VBLANK_INT_HACK(galpanic_interrupt,2)
938	878
939	879	/* video hardware */
r4679	r4680
975	915	/* basic machine hardware */
976	916	MDRV_IMPORT_FROM(galpanic)
977	917	MDRV_CPU_REPLACE("maincpu", M68000, 10000000)
978		MDRV_CPU_PROGRAM_MAP(comad_readmem,comad_writemem)
	918	MDRV_CPU_PROGRAM_MAP(comad_map,0)
979	919
980	920	/* video hardware */
981	921	MDRV_VIDEO_UPDATE(comad)
r4679	r4680
987	927	/* basic machine hardware */
988	928	MDRV_IMPORT_FROM(comad)
989	929	MDRV_CPU_REPLACE("maincpu", M68000, 12000000)   /* ? */
990		MDRV_CPU_PROGRAM_MAP(supmodel_readmem,supmodel_writemem)
	930	MDRV_CPU_PROGRAM_MAP(supmodel_map,0)
991	931	MDRV_CPU_VBLANK_INT_HACK(galpanic_interrupt,2)
992	932
993	933	/* video hardware */
r4679	r4680
1006	946	/* basic machine hardware */
1007	947	MDRV_IMPORT_FROM(comad)
1008	948	MDRV_CPU_REPLACE("maincpu", M68000, 12000000)   /* ? */
1009		MDRV_CPU_PROGRAM_MAP(fantsia2_readmem,fantsia2_writemem)
	949	MDRV_CPU_PROGRAM_MAP(fantsia2_map,0)
1010	950
1011	951	/* video hardware */
1012	952	MDRV_VIDEO_UPDATE(comad)
r4679	r4680
1018	958	/* basic machine hardware */
1019	959	MDRV_IMPORT_FROM(comad)
1020	960	MDRV_CPU_REPLACE("maincpu", M68000, 12000000)   /* ? */
1021		MDRV_CPU_PROGRAM_MAP(galhustl_readmem,galhustl_writemem)
	961	MDRV_CPU_PROGRAM_MAP(galhustl_map,0)
1022	962	MDRV_CPU_VBLANK_INT_HACK(galhustl_interrupt,3)
1023	963
1024	964	/* video hardware */
r4679	r4680
1036	976	/* basic machine hardware */
1037	977	MDRV_IMPORT_FROM(comad)
1038	978	MDRV_CPU_REPLACE("maincpu", M68000, 12000000)   /* ? */
1039		MDRV_CPU_PROGRAM_MAP(zipzap_readmem,zipzap_writemem)
	979	MDRV_CPU_PROGRAM_MAP(zipzap_map,0)
1040	980	MDRV_CPU_VBLANK_INT_HACK(galhustl_interrupt,3)
1041	981
1042	982	/* video hardware */

src/mame/drivers/finalizr.c

r4679	r4680
63	63
64	64	static WRITE8_HANDLER( finalizr_i8039_irq_w )
65	65	{
66		cpu_set_input_line(space->machine->cpu[1], 0, ASSERT_LINE);
	66	cputag_set_input_line(space->machine, "audiocpu", 0, ASSERT_LINE);
67	67	}
68	68
69	69	static WRITE8_HANDLER( i8039_irqen_w )
r4679	r4680
74	74	*/
75	75
76	76	if ((data & 0x80) == 0)
77		cpu_set_input_line(space->machine->cpu[1], 0, CLEAR_LINE);
	77	cputag_set_input_line(space->machine, "audiocpu", 0, CLEAR_LINE);
78	78	}
79	79
80	80	static READ8_HANDLER( i8039_T1_r )

src/mame/drivers/segaybd.c

r4679	r4680
1		/***************************************************************************
	1	/***************************************************************************
2	2
3	3	Sega Y-board hardware
4	4
r4679	r4680
82	82
83	83	static void update_main_irqs(running_machine *machine)
84	84	{
85		cpu_set_input_line(machine->cpu[0], 2, timer_irq_state ? ASSERT_LINE : CLEAR_LINE);
86		cpu_set_input_line(machine->cpu[1], 2, timer_irq_state ? ASSERT_LINE : CLEAR_LINE);
87		cpu_set_input_line(machine->cpu[2], 2, timer_irq_state ? ASSERT_LINE : CLEAR_LINE);
88		cpu_set_input_line(machine->cpu[0], 4, vblank_irq_state ? ASSERT_LINE : CLEAR_LINE);
89		cpu_set_input_line(machine->cpu[1], 4, vblank_irq_state ? ASSERT_LINE : CLEAR_LINE);
90		cpu_set_input_line(machine->cpu[2], 4, vblank_irq_state ? ASSERT_LINE : CLEAR_LINE);
91		cpu_set_input_line(machine->cpu[0], 6, timer_irq_state && vblank_irq_state ? ASSERT_LINE : CLEAR_LINE);
92		cpu_set_input_line(machine->cpu[1], 6, timer_irq_state && vblank_irq_state ? ASSERT_LINE : CLEAR_LINE);
93		cpu_set_input_line(machine->cpu[2], 6, timer_irq_state && vblank_irq_state ? ASSERT_LINE : CLEAR_LINE);
	85	cputag_set_input_line(machine, "maincpu", 2, timer_irq_state ? ASSERT_LINE : CLEAR_LINE);
	86	cputag_set_input_line(machine, "subx", 2, timer_irq_state ? ASSERT_LINE : CLEAR_LINE);
	87	cputag_set_input_line(machine, "suby", 2, timer_irq_state ? ASSERT_LINE : CLEAR_LINE);
	88	cputag_set_input_line(machine, "maincpu", 4, vblank_irq_state ? ASSERT_LINE : CLEAR_LINE);
	89	cputag_set_input_line(machine, "subx", 4, vblank_irq_state ? ASSERT_LINE : CLEAR_LINE);
	90	cputag_set_input_line(machine, "suby", 4, vblank_irq_state ? ASSERT_LINE : CLEAR_LINE);
	91	cputag_set_input_line(machine, "maincpu", 6, timer_irq_state && vblank_irq_state ? ASSERT_LINE : CLEAR_LINE);
	92	cputag_set_input_line(machine, "subx", 6, timer_irq_state && vblank_irq_state ? ASSERT_LINE : CLEAR_LINE);
	93	cputag_set_input_line(machine, "suby", 6, timer_irq_state && vblank_irq_state ? ASSERT_LINE : CLEAR_LINE);
94	94
95	95	if(timer_irq_state || vblank_irq_state)
96	96	cpuexec_boost_interleave(machine, attotime_zero, ATTOTIME_IN_USEC(50));
r4679	r4680
209	209
210	210	static void sound_cpu_irq(const device_config *device, int state)
211	211	{
212		cpu_set_input_line(device->machine->cpu[3], 0, state);
	212	cputag_set_input_line(device->machine, "soundcpu", 0, state);
213	213	}
214	214
215	215
216	216	static TIMER_CALLBACK( delayed_sound_data_w )
217	217	{
218		const address_space *space = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM);
	218	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
219	219
220	220	soundlatch_w(space, 0, param);
221		cpu_set_input_line(machine->cpu[3], INPUT_LINE_NMI, ASSERT_LINE);
	221	cputag_set_input_line(machine, "soundcpu", INPUT_LINE_NMI, ASSERT_LINE);
222	222	}
223	223
224	224
r4679	r4680
231	231
232	232	static READ8_HANDLER( sound_data_r )
233	233	{
234		cpu_set_input_line(space->machine->cpu[3], INPUT_LINE_NMI, CLEAR_LINE);
	234	cputag_set_input_line(space->machine, "soundcpu", INPUT_LINE_NMI, CLEAR_LINE);
235	235	return soundlatch_r(space,offset);
236	236	}
237	237
r4679	r4680
323	323	*/
324	324	segaic16_set_display_enable(space->machine, data & 0x80);
325	325	if (((old ^ data) & 0x20) && !(data & 0x20)) watchdog_reset_w(space,0,0);
326		cpu_set_input_line(space->machine->cpu[3], INPUT_LINE_RESET, (data & 0x10) ? CLEAR_LINE : ASSERT_LINE);
327		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_RESET, (data & 0x08) ? ASSERT_LINE : CLEAR_LINE);
328		cpu_set_input_line(space->machine->cpu[2], INPUT_LINE_RESET, (data & 0x04) ? ASSERT_LINE : CLEAR_LINE);
	326	cputag_set_input_line(space->machine, "soundcpu", INPUT_LINE_RESET, (data & 0x10) ? CLEAR_LINE : ASSERT_LINE);
	327	cputag_set_input_line(space->machine, "subx", INPUT_LINE_RESET, (data & 0x08) ? ASSERT_LINE : CLEAR_LINE);
	328	cputag_set_input_line(space->machine, "suby", INPUT_LINE_RESET, (data & 0x04) ? ASSERT_LINE : CLEAR_LINE);
329	329	break;
330	330
331	331	/* mute */

src/mame/drivers/shuuz.c

r4679	r4680
33	33
34	34	static void update_interrupts(running_machine *machine)
35	35	{
36		cpu_set_input_line(machine->cpu[0], 4, atarigen_scanline_int_state ? ASSERT_LINE : CLEAR_LINE);
	36	cputag_set_input_line(machine, "maincpu", 4, atarigen_scanline_int_state ? ASSERT_LINE : CLEAR_LINE);
37	37	}
38	38
39	39

src/mame/drivers/cclimber.c

r4679	r4680
211	211	static WRITE8_HANDLER( swimmer_sh_soundlatch_w )
212	212	{
213	213	soundlatch_w(space,offset,data);
214		cpu_set_input_line_and_vector(space->machine->cpu[1],0,HOLD_LINE,0xff);
	214	cputag_set_input_line_and_vector(space->machine, "audiocpu", 0, HOLD_LINE, 0xff);
215	215	}
216	216
217	217
r4679	r4680
248	248
249	249	static TIMER_CALLBACK( disable_interrupts )
250	250	{
251		cpu_interrupt_enable(machine->cpu[0],0);
	251	cpu_interrupt_enable(cputag_get_cpu(machine, "maincpu"), 0);
252	252	}
253	253
254	254
r4679	r4680
358	358	ADDRESS_MAP_END
359	359
360	360	static ADDRESS_MAP_START( toprollr_map, ADDRESS_SPACE_PROGRAM, 8 )
361		AM_RANGE(0x0000, 0x5fff) AM_READ(SMH_BANK1)
	361	AM_RANGE(0x0000, 0x5fff) AM_READ(SMH_BANK(1))
362	362	AM_RANGE(0x6000, 0x6bff) AM_RAM
363	363	AM_RANGE(0x8800, 0x88ff) AM_RAM AM_BASE(&cclimber_bigsprite_videoram)
364	364	AM_RANGE(0x8c00, 0x8fff) AM_RAM AM_BASE(&toprollr_bg_videoram)
r4679	r4680
1307	1307	ROM_LOAD( "cc12j.bin",    0x1000, 0x1000, CRC(9003ffbd) SHA1(fd016056aabc23957643f37230f03842294f795e) )
1308	1308	ROM_END
1309	1309
	1310	ROM_START( ckong2j )
	1311	ROM_REGION( 0x10000, "maincpu", 0 )
	1312	ROM_LOAD( "d05-07.bin",   0x0000, 0x1000, CRC(b27df032) SHA1(57f9be139c610405e3c2fddd7093dfb1277e450e) )
	1313	ROM_LOAD( "f05-08.bin",   0x1000, 0x1000, CRC(5dc1aaba) SHA1(42b9e5946ffce7c156d114bde68f37c2c34853c4) )
	1314	ROM_LOAD( "h05-09.bin",   0x2000, 0x1000, CRC(c9054c94) SHA1(1aa08d2501ee620759fd5c111e12f6d432c25294) )
	1315	ROM_LOAD( "10.dat",       0x3000, 0x1000, CRC(c3beb501) SHA1(14f49c45fc7c91799034c5a51fca310f0a66b1d7) )
	1316	ROM_LOAD( "11.5l",        0x4000, 0x1000, CRC(4164eb4d) SHA1(ec95f913820375c3f6dd24776b4d3fd04163f5de) )
	1317	ROM_LOAD( "n05-12.bin",   0x5000, 0x1000, CRC(966bc9ab) SHA1(4434fc620169ffea1b1f227b61674e1daf79b54b) )
	1318
	1319	ROM_REGION( 0x4000, "gfx1", ROMREGION_DISPOSE )
	1320	ROM_LOAD( "n11-06.bin",   0x0000, 0x1000, CRC(2dcedd12) SHA1(dfdcfc21bcba7c8e148ee54daae511ca78c58e70) )
	1321	ROM_LOAD( "l11-05.bin",   0x1000, 0x1000, CRC(fa7cbd91) SHA1(0208d2ebc59f3600005476b6987472685bc99d67) )
	1322	ROM_LOAD( "k11-04.bin",   0x2000, 0x1000, CRC(3375b3bd) SHA1(a00b3c31cff123aab6ac0833aabfdd663302971a) )
	1323	ROM_LOAD( "h11-03.bin",   0x3000, 0x1000, CRC(5655cc11) SHA1(5195e9b2a60c54280b48b32ee8248090904dbc51) )
	1324
	1325	ROM_REGION( 0x1000, "gfx2", ROMREGION_DISPOSE )
	1326	ROM_LOAD( "c11-02.bin",   0x0000, 0x0800, CRC(d1352c31) SHA1(da726a63a8be830d695afeddc1717749af8c9d47) )
	1327	ROM_LOAD( "a11-01.bin",   0x0800, 0x0800, CRC(a7a2fdbd) SHA1(529865f8bbfbdbbf34ac39c70ef17e6d5bd0f845) )
	1328
	1329	ROM_REGION( 0x0060, "proms", 0 )
	1330	ROM_LOAD( "prom.v6",      0x0000, 0x0020, CRC(b3fc1505) SHA1(5b94adde0428a26b815c7eb9b3f3716470d349c7) )
	1331	ROM_LOAD( "prom.u6",      0x0020, 0x0020, CRC(26aada9e) SHA1(f59645e606ea4f0dd0fc4ea47dd03f526c534941) )
	1332	ROM_LOAD( "prom.t6",      0x0040, 0x0020, CRC(676b3166) SHA1(29b9434cd34d43ea5664e436e2a24b54f8d88aac) )
	1333
	1334	ROM_REGION( 0x2000, "samples", 0 )   /* samples */
	1335	ROM_LOAD( "cc13j.bin",    0x0000, 0x1000, CRC(5f0bcdfb) SHA1(7f79bf6de117348f606696ed7ea1937bbf926612) )
	1336	ROM_LOAD( "cc12j.bin",    0x1000, 0x1000, CRC(9003ffbd) SHA1(fd016056aabc23957643f37230f03842294f795e) )
	1337	ROM_END
	1338
1310	1339	ROM_START( ckongjeu )
1311	1340	ROM_REGION( 0x10000, "maincpu", 0 )
1312	1341	ROM_LOAD( "d05-07.bin",   0x0000, 0x1000, CRC(b27df032) SHA1(57f9be139c610405e3c2fddd7093dfb1277e450e) )
r4679	r4680
1916	1945	GAME( 1980, ccboot2,  cclimber, cclimber, cclimber, cclimbrj, ROT0,   "bootleg", "Crazy Climber (bootleg set 2)", 0 )
1917	1946	GAME( 1981, ckong,    0,        cclimber, ckong,    0,        ROT270, "Falcon", "Crazy Kong Part II (set 1)", 0 )
1918	1947	GAME( 1981, ckonga,   ckong,    cclimber, ckong,    0,        ROT270, "Falcon", "Crazy Kong Part II (set 2)", 0 )
	1948	GAME( 1981, ckong2j,  ckong,    cclimber, ckong,    0,        ROT270, "Falcon", "Crazy Kong Part II (Japan)", 0 )
1919	1949	GAME( 1981, ckongjeu, ckong,    cclimber, ckong,    0,        ROT270, "bootleg", "Crazy Kong Part II (Jeutel bootleg)", 0 )
1920	1950	GAME( 1981, ckongo,   ckong,    cclimber, ckong,    0,        ROT270, "bootleg", "Crazy Kong (Orca bootleg)", 0 )
1921	1951	GAME( 1981, ckongalc, ckong,    cclimber, ckong,    0,        ROT270, "bootleg", "Crazy Kong (Alca bootleg)", 0 )

src/mame/drivers/speedspn.c

r4679	r4680
103	103
104	104	static WRITE8_HANDLER(speedspn_sound_w)
105	105	{
106		soundlatch_w(space,1,data);
107		cpu_set_input_line(space->machine->cpu[1],0,HOLD_LINE);
	106	soundlatch_w(space, 1, data);
	107	cputag_set_input_line(space->machine, "audiocpu", 0, HOLD_LINE);
108	108	}
109	109
110	110	static WRITE8_DEVICE_HANDLER( oki_banking_w )
r4679	r4680
116	116
117	117	/* main cpu */
118	118
119		static ADDRESS_MAP_START( readmem, ADDRESS_SPACE_PROGRAM, 8 )
120		AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM)
121		AM_RANGE(0x8000, 0x87ff) AM_READ(SMH_RAM)
122		AM_RANGE(0x8800, 0x8fff) AM_READ(SMH_RAM)
123		AM_RANGE(0x9000, 0x9fff) AM_READ(speedspn_vidram_r) /* banked? */
124		AM_RANGE(0xa000, 0xa7ff) AM_READ(SMH_RAM)
125		AM_RANGE(0xa800, 0xafff) AM_READ(SMH_RAM)
126		AM_RANGE(0xb000, 0xbfff) AM_READ(SMH_RAM)
127		AM_RANGE(0xc000, 0xffff) AM_READ(SMH_BANK1) /* banked ROM */
	119	static ADDRESS_MAP_START( speedspn_map, ADDRESS_SPACE_PROGRAM, 8 )
	120	AM_RANGE(0x0000, 0x7fff) AM_ROM
	121	AM_RANGE(0x8000, 0x87ff) AM_RAM_WRITE(paletteram_xxxxRRRRGGGGBBBB_le_w) AM_BASE(&paletteram)   /* RAM COLOUR */
	122	AM_RANGE(0x8800, 0x8fff) AM_RAM_WRITE(speedspn_attram_w) AM_BASE(&speedspn_attram)
	123	AM_RANGE(0x9000, 0x9fff) AM_READWRITE(speedspn_vidram_r,speedspn_vidram_w)   /* RAM FIX / RAM OBJECTS (selected by bit 0 of port 17) */
	124	AM_RANGE(0xa000, 0xa7ff) AM_RAM
	125	AM_RANGE(0xa800, 0xafff) AM_RAM
	126	AM_RANGE(0xb000, 0xbfff) AM_RAM                                  /* RAM PROGRAM */
	127	AM_RANGE(0xc000, 0xffff) AM_ROMBANK(1)                               /* banked ROM */
128	128	ADDRESS_MAP_END
129	129
130		static ADDRESS_MAP_START( writemem, ADDRESS_SPACE_PROGRAM, 8 )
131		AM_RANGE(0x0000, 0x7fff) AM_WRITE(SMH_ROM)
132		AM_RANGE(0x8000, 0x87ff) AM_WRITE(paletteram_xxxxRRRRGGGGBBBB_le_w) AM_BASE(&paletteram)   /* RAM COLOUR */
133		AM_RANGE(0x8800, 0x8fff) AM_WRITE(speedspn_attram_w) AM_BASE(&speedspn_attram)
134		AM_RANGE(0x9000, 0x9fff) AM_WRITE(speedspn_vidram_w)   /* RAM FIX / RAM OBJECTS (selected by bit 0 of port 17) */
135		AM_RANGE(0xa000, 0xa7ff) AM_WRITE(SMH_RAM)
136		AM_RANGE(0xa800, 0xafff) AM_WRITE(SMH_RAM)
137		AM_RANGE(0xb000, 0xbfff) AM_WRITE(SMH_RAM) /* RAM PROGRAM */
138		AM_RANGE(0xc000, 0xffff) AM_WRITE(SMH_ROM)   /* banked ROM */
139		ADDRESS_MAP_END
140
141		static ADDRESS_MAP_START( io_map, ADDRESS_SPACE_IO, 8 )
	130	static ADDRESS_MAP_START( speedspn_io_map, ADDRESS_SPACE_IO, 8 )
142	131	ADDRESS_MAP_GLOBAL_MASK(0xff)
143	132	AM_RANGE(0x07, 0x07) AM_WRITE(speedspn_global_display_w)
144	133	AM_RANGE(0x10, 0x10) AM_READ_PORT("SYSTEM")
r4679	r4680
152	141
153	142	/* sound cpu */
154	143
155		static ADDRESS_MAP_START( readmem2, ADDRESS_SPACE_PROGRAM, 8 )
156		AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM)
157		AM_RANGE(0x8000, 0x87ff) AM_READ(SMH_RAM)
158		AM_RANGE(0x9800, 0x9800) AM_DEVREAD("oki", okim6295_r)
	144	static ADDRESS_MAP_START( speedspn_sound_map, ADDRESS_SPACE_PROGRAM, 8 )
	145	AM_RANGE(0x0000, 0x7fff) AM_ROM
	146	AM_RANGE(0x8000, 0x87ff) AM_RAM
	147	AM_RANGE(0x9000, 0x9000) AM_DEVWRITE("oki", oki_banking_w)
	148	AM_RANGE(0x9800, 0x9800) AM_DEVREADWRITE("oki", okim6295_r,okim6295_w)
159	149	AM_RANGE(0xa000, 0xa000) AM_READ(soundlatch_r)
160	150	ADDRESS_MAP_END
161	151
162		static ADDRESS_MAP_START( writemem2, ADDRESS_SPACE_PROGRAM, 8 )
163		AM_RANGE(0x0000, 0x7fff) AM_WRITE(SMH_ROM)
164		AM_RANGE(0x8000, 0x87ff) AM_WRITE(SMH_RAM)
165		AM_RANGE(0x9000, 0x9000) AM_DEVWRITE("oki", oki_banking_w)
166		AM_RANGE(0x9800, 0x9800) AM_DEVWRITE("oki", okim6295_w)
167		ADDRESS_MAP_END
168	152
169	153	/*** INPUT PORT **************************************************************/
170	154
r4679	r4680
297	281
298	282	/* basic machine hardware */
299	283	MDRV_CPU_ADD("maincpu",Z80,6000000)       /* 6 MHz */
300		MDRV_CPU_PROGRAM_MAP(readmem,writemem)
301		MDRV_CPU_IO_MAP(io_map,0)
	284	MDRV_CPU_PROGRAM_MAP(speedspn_map,0)
	285	MDRV_CPU_IO_MAP(speedspn_io_map,0)
302	286	MDRV_CPU_VBLANK_INT("screen", irq0_line_hold)
303	287
304	288	MDRV_CPU_ADD("audiocpu", Z80,6000000)       /* 6 MHz */
305		MDRV_CPU_PROGRAM_MAP(readmem2,writemem2)
	289	MDRV_CPU_PROGRAM_MAP(speedspn_sound_map,0)
306	290
307	291	/* video hardware */
308	292	MDRV_SCREEN_ADD("screen", RASTER)
r4679	r4680
368	352	/*** GAME DRIVERS ************************************************************/
369	353
370	354	GAME( 1994, speedspn, 0, speedspn, speedspn, 0, ROT180, "TCH", "Speed Spin", GAME_IMPERFECT_GRAPHICS )
371

src/mame/drivers/enigma2.c

r4679	r4680
88	88
89	89	static TIMER_CALLBACK( interrupt_clear_callback )
90	90	{
91		cpu_set_input_line(machine->cpu[0], 0, CLEAR_LINE);
	91	cputag_set_input_line(machine, "maincpu", 0, CLEAR_LINE);
92	92	}
93	93
94	94
r4679	r4680
101	101	int vpos = video_screen_get_vpos(machine->primary_screen);
102	102	UINT16 counter = vpos_to_vysnc_chain_counter(vpos);
103	103	UINT8 vector = 0xc7 | ((counter & 0x80) >> 3) | ((~counter & 0x80) >> 4);
104		cpu_set_input_line_and_vector(machine->cpu[0], 0, ASSERT_LINE, vector);
	104	cputag_set_input_line_and_vector(machine, "maincpu", 0, ASSERT_LINE, vector);
105	105
106	106	/* set up for next interrupt */
107	107	if (counter == INT_TRIGGER_COUNT_1)
r4679	r4680
139	139	static MACHINE_RESET( enigma2 )
140	140	{
141	141	last_sound_data = 0;
142		cpu_set_input_line(machine->cpu[1], INPUT_LINE_NMI, CLEAR_LINE);
	142	cputag_set_input_line(machine, "audiocpu", INPUT_LINE_NMI, CLEAR_LINE);
143	143
144	144	engima2_flip_screen = 0;
145	145
r4679	r4680
351	351	if (!(data & 0x04) && (last_sound_data & 0x04))
352	352	sound_latch = (sound_latch << 1) | (~data & 0x01);
353	353
354		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_NMI, (data & 0x02) ? ASSERT_LINE : CLEAR_LINE);
	354	cputag_set_input_line(space->machine, "audiocpu", INPUT_LINE_NMI, (data & 0x02) ? ASSERT_LINE : CLEAR_LINE);
355	355
356	356	last_sound_data = data;
357	357	}

src/mame/drivers/igspoker.c

r4679	r4680
101	101
102	102	static WRITE8_HANDLER( igs_irqack_w )
103	103	{
104		//  cpu_set_input_line(space->machine->cpu[0], 0, CLEAR_LINE);
	104	//  cputag_set_input_line(space->machine, "maincpu", 0, CLEAR_LINE);
105	105	}
106	106
107	107
r4679	r4680
2100	2100	/* Descramble graphic */
2101	2101	rom = memory_region(machine, "gfx1");
2102	2102	length = memory_region_length(machine, "gfx1");
2103		tmp = malloc_or_die(length);
	2103	tmp = alloc_array_or_die(UINT8, length);
2104	2104	memcpy(tmp,rom,length);
2105	2105	for (A = 0;A < length;A++)
2106	2106	{
r4679	r4680
2251	2251	GAMEL( 1998, stellecu,  0,        number10, number10, 0,       ROT0, "Sure",   "Stelle e Cubi (Italy)",                     GAME_NOT_WORKING,   layout_igspoker )
2252	2252
2253	2253	GAMEL( 1993?, pktet346, 0,        pktetris, pktet346, pktet346,  ROT0, "IGS",   "PK Tetris (v346I)",                    0, layout_igspoker )
2254
2255

src/mame/drivers/cowrace.c

r4679	r4680
43	43
44	44	static VIDEO_UPDATE( cowrace )
45	45	{
46		tilemap_draw(bitmap,cliprect, tmap, 0, 0);
	46	tilemap_draw(bitmap, cliprect, tmap, 0, 0);
47	47	return 0;
48	48	}
49	49
r4679	r4680
51	51	static WRITE8_HANDLER( cowrace_soundlatch_w )
52	52	{
53	53	soundlatch_w(0, data);
54		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_NMI, PULSE_LINE);
	54	cputag_set_input_line(space->machine, "audiocpu", INPUT_LINE_NMI, PULSE_LINE);
55	55	}
56	56	#endif
57	57

src/mame/drivers/segaorun.c

r4679	r4680
97	97
98	98	static const segaic16_memory_map_entry outrun_info[] =
99	99	{
100		{ 0x35/2, 0x90000, 0x10000, 0xf00000,      ~0, segaic16_road_control_0_r, segaic16_road_control_0_w, NULL,                  "road control" },
101		{ 0x35/2, 0x80000, 0x01000, 0xf0f000,      ~0, SMH_BANK10,              SMH_BANK10,              &segaic16_roadram_0,   "road RAM" },
102		{ 0x35/2, 0x60000, 0x08000, 0xf18000,      ~0, SMH_BANK11,              SMH_BANK11,              &cpu1ram,              "CPU 1 RAM" },
103		{ 0x35/2, 0x00000, 0x60000, 0xf00000,      ~0, SMH_BANK12,              SMH_UNMAP,               &cpu1rom,              "CPU 1 ROM" },
104		{ 0x31/2, 0x00000, 0x04000, 0xffc000,      ~0, misc_io_r,                 misc_io_w,                 NULL,                  "I/O space" },
105		{ 0x2d/2, 0x00000, 0x01000, 0xfff000,      ~0, SMH_BANK13,              SMH_BANK13,              &segaic16_spriteram_0, "object RAM" },
106		{ 0x29/2, 0x00000, 0x02000, 0xffe000,      ~0, SMH_BANK14,              segaic16_paletteram_w,     &paletteram16,         "color RAM" },
107		{ 0x25/2, 0x00000, 0x10000, 0xfe0000,      ~0, SMH_BANK15,              segaic16_tileram_0_w,      &segaic16_tileram_0,   "tile RAM" },
108		{ 0x25/2, 0x10000, 0x01000, 0xfef000,      ~0, SMH_BANK16,              segaic16_textram_0_w,      &segaic16_textram_0,   "text RAM" },
109		{ 0x21/2, 0x60000, 0x08000, 0xf98000,      ~0, SMH_BANK17,              SMH_BANK17,              &workram,              "CPU 0 RAM" },
110		{ 0x21/2, 0x00000, 0x60000, 0xf80000, 0x00000, SMH_BANK18,              SMH_UNMAP,               NULL,                  "CPU 0 ROM" },
	100	{ 0x35/2, 0x90000, 0x10000, 0xf00000,      ~0, segaic16_road_control_0_r,       segaic16_road_control_0_w,        NULL,                  "road control" },
	101	{ 0x35/2, 0x80000, 0x01000, 0xf0f000,      ~0, (read16_space_func)SMH_BANK(10), (write16_space_func)SMH_BANK(10), &segaic16_roadram_0,   "road RAM" },
	102	{ 0x35/2, 0x60000, 0x08000, 0xf18000,      ~0, (read16_space_func)SMH_BANK(11), (write16_space_func)SMH_BANK(11), &cpu1ram,              "CPU 1 RAM" },
	103	{ 0x35/2, 0x00000, 0x60000, 0xf00000,      ~0, (read16_space_func)SMH_BANK(12), (write16_space_func)SMH_UNMAP,    &cpu1rom,              "CPU 1 ROM" },
	104	{ 0x31/2, 0x00000, 0x04000, 0xffc000,      ~0, misc_io_r,                       misc_io_w,                        NULL,                  "I/O space" },
	105	{ 0x2d/2, 0x00000, 0x01000, 0xfff000,      ~0, (read16_space_func)SMH_BANK(13), (write16_space_func)SMH_BANK(13), &segaic16_spriteram_0, "object RAM" },
	106	{ 0x29/2, 0x00000, 0x02000, 0xffe000,      ~0, (read16_space_func)SMH_BANK(14), segaic16_paletteram_w,            &paletteram16,         "color RAM" },
	107	{ 0x25/2, 0x00000, 0x10000, 0xfe0000,      ~0, (read16_space_func)SMH_BANK(15), segaic16_tileram_0_w,             &segaic16_tileram_0,   "tile RAM" },
	108	{ 0x25/2, 0x10000, 0x01000, 0xfef000,      ~0, (read16_space_func)SMH_BANK(16), segaic16_textram_0_w,             &segaic16_textram_0,   "text RAM" },
	109	{ 0x21/2, 0x60000, 0x08000, 0xf98000,      ~0, (read16_space_func)SMH_BANK(17), (write16_space_func)SMH_BANK(17), &workram,              "CPU 0 RAM" },
	110	{ 0x21/2, 0x00000, 0x60000, 0xf80000, 0x00000, (read16_space_func)SMH_BANK(18), (write16_space_func)SMH_UNMAP,    NULL,                  "CPU 0 ROM" },
111	111	{ 0 }
112	112	};
113	113
r4679	r4680
121	121
122	122	static TIMER_CALLBACK( delayed_sound_data_w )
123	123	{
124		const address_space *space = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM);
	124	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
125	125	soundlatch_w(space, 0, param);
126		cpu_set_input_line(machine->cpu[2], INPUT_LINE_NMI, ASSERT_LINE);
	126	cputag_set_input_line(machine, "soundcpu", INPUT_LINE_NMI, ASSERT_LINE);
127	127	}
128	128
129	129
r4679	r4680
135	135
136	136	static READ8_HANDLER( sound_data_r )
137	137	{
138		cpu_set_input_line(space->machine->cpu[2], INPUT_LINE_NMI, CLEAR_LINE);
	138	cputag_set_input_line(space->machine, "soundcpu", INPUT_LINE_NMI, CLEAR_LINE);
139	139	return soundlatch_r(space,offset);
140	140	}
141	141
r4679	r4680
144	144	static void outrun_generic_init(running_machine *machine)
145	145	{
146	146	/* allocate memory for regions not automatically assigned */
147		segaic16_spriteram_0 = auto_malloc(0x01000);
148		paletteram16         = auto_malloc(0x02000);
149		segaic16_tileram_0   = auto_malloc(0x10000);
150		segaic16_textram_0   = auto_malloc(0x01000);
151		workram              = auto_malloc(0x08000);
	147	segaic16_spriteram_0 = auto_alloc_array(machine, UINT16, 0x01000/2);
	148	paletteram16         = auto_alloc_array(machine, UINT16, 0x02000/2);
	149	segaic16_tileram_0   = auto_alloc_array(machine, UINT16, 0x10000/2);
	150	segaic16_textram_0   = auto_alloc_array(machine, UINT16, 0x01000/2);
	151	workram              = auto_alloc_array(machine, UINT16, 0x08000/2);
152	152
153	153	/* init the memory mapper */
154	154	segaic16_memory_mapper_init(cputag_get_cpu(machine, "maincpu"), outrun_info, sound_data_w, NULL);
r4679	r4680
172	172
173	173	static void update_main_irqs(running_machine *machine)
174	174	{
175		cpu_set_input_line(machine->cpu[0], 2, irq2_state ? ASSERT_LINE : CLEAR_LINE);
176		cpu_set_input_line(machine->cpu[0], 4, vblank_irq_state ? ASSERT_LINE : CLEAR_LINE);
177		cpu_set_input_line(machine->cpu[0], 6, vblank_irq_state && irq2_state ? ASSERT_LINE : CLEAR_LINE);
	175	cputag_set_input_line(machine, "maincpu", 2, irq2_state ? ASSERT_LINE : CLEAR_LINE);
	176	cputag_set_input_line(machine, "maincpu", 4, vblank_irq_state ? ASSERT_LINE : CLEAR_LINE);
	177	cputag_set_input_line(machine, "maincpu", 6, vblank_irq_state && irq2_state ? ASSERT_LINE : CLEAR_LINE);
178	178
179	179	if(vblank_irq_state || irq2_state)
180	180	cpuexec_boost_interleave(machine, attotime_zero, ATTOTIME_IN_USEC(100));
r4679	r4680
217	217	case 223:
218	218	vblank_irq_state = 1;
219	219	next_scanline = scanline + 1;
220		cpu_set_input_line(machine->cpu[1], 4, ASSERT_LINE);
	220	cputag_set_input_line(machine, "sub", 4, ASSERT_LINE);
221	221	break;
222	222
223	223	/* VBLANK turns off at the start of scanline 224 */
224	224	case 224:
225	225	vblank_irq_state = 0;
226	226	next_scanline = 65;
227		cpu_set_input_line(machine->cpu[1], 4, CLEAR_LINE);
	227	cputag_set_input_line(machine, "sub", 4, CLEAR_LINE);
228	228	break;
229	229	}
230	230
r4679	r4680
245	245
246	246	static void outrun_reset(const device_config *device)
247	247	{
248		cpu_set_input_line(device->machine->cpu[1], INPUT_LINE_RESET, PULSE_LINE);
	248	cputag_set_input_line(device->machine, "sub", INPUT_LINE_RESET, PULSE_LINE);
249	249	}
250	250
251	251
252	252	static MACHINE_RESET( outrun )
253	253	{
254		fd1094_machine_init(machine->cpu[0]);
	254	fd1094_machine_init(cputag_get_cpu(machine, "maincpu"));
255	255
256	256	/* reset misc components */
257	257	segaic16_memory_mapper_reset(machine);
r4679	r4680
260	260	segaic16_tilemap_reset(machine, 0);
261	261
262	262	/* hook the RESET line, which resets CPU #1 */
263		device_set_info_fct(machine->cpu[0], CPUINFO_FCT_M68K_RESET_CALLBACK, (genf *)outrun_reset);
	263	m68k_set_reset_callback(cputag_get_cpu(machine, "maincpu"), outrun_reset);
264	264
265	265	/* start timers to track interrupts */
266	266	timer_set(machine, video_screen_get_time_until_pos(machine->primary_screen, 223, 0), NULL, 223, scanline_callback);
r4679	r4680
278	278	{
279	279	static const char ports[] = "ABC";
280	280
281		logerror("%06X:read from 8255 port %c\n", cpu_get_pc(machine->cpu[0]), ports[port]);
	281	logerror("%06X:read from 8255 port %c\n", cpu_get_pc(cputag_get_cpu(machine, "maincpu")), ports[port]);
282	282	}
283	283
284	284
r4679	r4680
286	286	{
287	287	static const char ports[] = "ABC";
288	288
289		logerror("%06X:write %02X to 8255 port %c\n", cpu_get_pc(machine->cpu[0]), data, ports[port]);
	289	logerror("%06X:write %02X to 8255 port %c\n", cpu_get_pc(cputag_get_cpu(machine, "maincpu")), data, ports[port]);
290	290	}
291	291
292	292
r4679	r4680
335	335	*/
336	336	segaic16_set_display_enable(device->machine, data & 0x20);
337	337	adc_select = (data >> 2) & 7;
338		cpu_set_input_line(device->machine->cpu[2], INPUT_LINE_RESET, (data & 0x01) ? CLEAR_LINE : ASSERT_LINE);
	338	cputag_set_input_line(device->machine, "soundcpu", INPUT_LINE_RESET, (data & 0x01) ? CLEAR_LINE : ASSERT_LINE);
339	339	}
340	340
341	341
r4679	r4680
475	475	/* Output port:
476	476	D0: Sound section reset (1= normal operation, 0= reset)
477	477	*/
478		cpu_set_input_line(space->machine->cpu[2], INPUT_LINE_RESET, (data & 1) ? CLEAR_LINE : ASSERT_LINE);
	478	cputag_set_input_line(space->machine, "soundcpu", INPUT_LINE_RESET, (data & 1) ? CLEAR_LINE : ASSERT_LINE);
479	479	return;
480	480
481	481	case 0x3000/2:

src/mame/drivers/videopkr.c

r4679	r4680
864	864
865	865	if (dc_40103 == 0)
866	866	{
867		cpu_set_input_line(machine->cpu[1], 0, ASSERT_LINE);
	867	cputag_set_input_line(machine, "soundcpu", 0, ASSERT_LINE);
868	868	}
869	869	}
870	870	}

src/mame/drivers/koikoi.c

r4679	r4680
9	9	TODO:
10	10	- map inputs (temp mapped to keys a-l and z-x)
11	11	- is there (still..) some kind of protection ? timers looks weird (2nd player timer is frozen)
12		- colors (afaik color(?) prom outputs are connected to one of pals)
	12	- colors (afaik color(?) prom outputs are connected to one of pals), might help to have a screenshot of the original thing.
13	13
14	14
15	15	Basic hw is...
r4679	r4680
51	51
52	52	static TILE_GET_INFO( get_tile_info )
53	53	{
54		int code  = videoram[tile_index]|((videoram[tile_index+0x400]<<2)&0x100);
55		int color = videoram[tile_index+0x400]&0x1f;
56		int flip  =(videoram[tile_index+0x400]&0x80)?(TILEMAP_FLIPX|TILEMAP_FLIPY):0;
	54	int code  = videoram[tile_index]|((videoram[tile_index+0x400] & 0x40)<<2);
	55	int color = (videoram[tile_index+0x400]&0x1f);
	56	int flip  = (videoram[tile_index+0x400]&0x80)?(TILEMAP_FLIPX|TILEMAP_FLIPY):0;
57	57
58	58	SET_TILE_INFO(   0,   code,   color, flip);
59	59	}
r4679	r4680
64	64	tilemap_mark_tile_dirty(koikoi_tilemap,offset&0x3ff);
65	65	}
66	66
67		static READ8_HANDLER(vram_r)
68		{
69		return videoram[offset];
70		}
71
72	67	static READ8_DEVICE_HANDLER(input_r)
73	68	{
74	69	if(inputcnt<0)
r4679	r4680
111	106	static READ8_HANDLER(io_r)
112	107	{
113	108	if(!offset)
114		{
115		return input_port_read(space->machine, "IN0")^ioram[4]; //coin
116		}
	109	return input_port_read(space->machine, "IN0")^ioram[4]; //coin
	110
117	111	return 0;
118	112	}
119	113
120	114	static WRITE8_HANDLER(io_w)
121	115	{
122	116	if(offset==7 && data==0)
123		{
124	117	inputcnt=0; //reset read cycle counter
125		}
	118
126	119	ioram[offset]=data;
127	120	}
128	121
129		static ADDRESS_MAP_START( readmem, ADDRESS_SPACE_PROGRAM, 8 )
	122	static ADDRESS_MAP_START( koikoi_map, ADDRESS_SPACE_PROGRAM, 8 )
130	123	AM_RANGE(0x0000, 0x2fff) AM_ROM
131	124	AM_RANGE(0x6000, 0x67ff) AM_RAM
	125	AM_RANGE(0x7000, 0x77ff) AM_RAM_WRITE(vram_w) AM_BASE(&videoram)
132	126	AM_RANGE(0x8000, 0x8000) AM_READ_PORT("DSW")
133		AM_RANGE(0x7000, 0x77ff) AM_READWRITE(vram_r, vram_w) AM_BASE(&videoram)
134	127	AM_RANGE(0x9000, 0x9007) AM_READWRITE(io_r, io_w)
135	128	ADDRESS_MAP_END
136	129
137		static ADDRESS_MAP_START( readport, ADDRESS_SPACE_IO, 8 )
	130	static ADDRESS_MAP_START( koikoi_io_map, ADDRESS_SPACE_IO, 8 )
138	131	ADDRESS_MAP_GLOBAL_MASK(0xff)
139	132	AM_RANGE(0x02, 0x02) AM_WRITENOP //unknown , many writes
140	133	AM_RANGE(0x03, 0x03) AM_DEVREAD("ay", ay8910_r)
r4679	r4680
176	169	PORT_BIT( 0xbf, IP_ACTIVE_LOW, IPT_UNUSED )
177	170
178	171	PORT_START("IN1")   /* IN1 */
179		PORT_BIT( 0x0002, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_CODE(KEYCODE_A) //1
180		PORT_BIT( 0x0004, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_CODE(KEYCODE_S) //2
181		PORT_BIT( 0x0008, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_CODE(KEYCODE_D) //3
182		PORT_BIT( 0x0010, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_CODE(KEYCODE_F) //4
183		PORT_BIT( 0x0020, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_CODE(KEYCODE_G) //5
184		PORT_BIT( 0x0040, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_CODE(KEYCODE_H) //6
185		PORT_BIT( 0x0080, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_CODE(KEYCODE_J) //7
186		PORT_BIT( 0x0100, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_CODE(KEYCODE_K) //8
	172	PORT_BIT( 0x0002, IP_ACTIVE_HIGH, IPT_BUTTON1 ) PORT_NAME("P1 Button 1") PORT_CODE(KEYCODE_A) //1
	173	PORT_BIT( 0x0004, IP_ACTIVE_HIGH, IPT_BUTTON2 ) PORT_NAME("P1 Button 2") PORT_CODE(KEYCODE_S) //2
	174	PORT_BIT( 0x0008, IP_ACTIVE_HIGH, IPT_BUTTON3 ) PORT_NAME("P1 Button 3") PORT_CODE(KEYCODE_D) //3
	175	PORT_BIT( 0x0010, IP_ACTIVE_HIGH, IPT_BUTTON4 ) PORT_NAME("P1 Button 4") PORT_CODE(KEYCODE_F) //4
	176	PORT_BIT( 0x0020, IP_ACTIVE_HIGH, IPT_BUTTON5 ) PORT_NAME("P1 Button 5") PORT_CODE(KEYCODE_G) //5
	177	PORT_BIT( 0x0040, IP_ACTIVE_HIGH, IPT_BUTTON6 ) PORT_NAME("P1 Button 6") PORT_CODE(KEYCODE_H) //6
	178	PORT_BIT( 0x0080, IP_ACTIVE_HIGH, IPT_BUTTON7 ) PORT_NAME("P1 Button 7") PORT_CODE(KEYCODE_J) //7
	179	PORT_BIT( 0x0100, IP_ACTIVE_HIGH, IPT_BUTTON8 ) PORT_NAME("P1 Button 8") PORT_CODE(KEYCODE_K) //8
187	180
188	181	PORT_BIT( 0x0800, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_CODE(KEYCODE_Z)
189	182	PORT_BIT( 0x1000, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_CODE(KEYCODE_X)
r4679	r4680
198	191	{
199	192	int i;
200	193
201		for (i = 0;i < 256;i++)
	194	for (i = 0;i < 0x100;i++)
202	195	{
203	196	int bit0,bit1,bit2,bit3,r,g,b;
204	197
205		bit0 = (color_prom[i] >> 0) & 0x01;
206		bit1 = (color_prom[i] >> 1) & 0x01;
207		bit2 = (color_prom[i] >> 2) & 0x01;
208		bit3 = (color_prom[i] >> 3) & 0x01;
	198	bit0 = (color_prom[i] >> 3) & 0x01;
	199	bit1 = (color_prom[i] >> 2) & 0x01;
	200	bit2 = (color_prom[i] >> 1) & 0x01;
	201	bit3 = (color_prom[i] >> 0) & 0x01;
209	202
210		r=bit0*255;
211		g=bit1*255;
212		b=bit2*255;
	203	r=bit0*0xaa+bit3*0x55;
	204	g=bit1*0xaa+bit3*0x55;
	205	b=bit2*0xaa+bit3*0x55;
213	206
214	207	palette_set_color(machine,i,MAKE_RGB(r,g,b));
215	208	}
r4679	r4680
226	219	return 0;
227	220	}
228	221
229
230	222	static const gfx_layout tilelayout =
231	223	{
232	224	8, 8,
233	225	RGN_FRAC(1,3),
234	226	3,
235		{ RGN_FRAC(0,3), RGN_FRAC(1,3), RGN_FRAC(2,3) },
	227	{ RGN_FRAC(0,3), RGN_FRAC(2,3), RGN_FRAC(1,3) },
	228	//{ RGN_FRAC(2,3), RGN_FRAC(0,3), RGN_FRAC(1,3) },
236	229	{ 0, 1, 2, 3, 4, 5, 6, 7 },
237	230	{ 0*8, 1*8, 2*8, 3*8, 4*8, 5*8, 6*8, 7*8 },
238	231	8*8
r4679	r4680
258	251
259	252	/* basic machine hardware */
260	253	MDRV_CPU_ADD("maincpu", Z80,KOIKOI_CRYSTAL/4)   /* ?? */
261		MDRV_CPU_PROGRAM_MAP(readmem, 0)
262		MDRV_CPU_IO_MAP(readport, 0)
	254	MDRV_CPU_PROGRAM_MAP(koikoi_map, 0)
	255	MDRV_CPU_IO_MAP(koikoi_io_map, 0)
263	256	MDRV_CPU_VBLANK_INT("screen", nmi_line_pulse)
264	257
265	258	/* video hardware */
r4679	r4680
282	275
283	276	MDRV_SOUND_ADD("ay", AY8910, KOIKOI_CRYSTAL/8)
284	277	MDRV_SOUND_CONFIG(ay8910_config)
285		MDRV_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.10)
286
	278	MDRV_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.10)
287	279	MACHINE_DRIVER_END
288	280
289	281
r4679	r4680
314	306	ROM_LOAD( "pal16r8a_yellow.ic8",   0x0400, 0x0104, CRC(7d8da540) SHA1(28925d1fb4ef670e9c9d24860b67fdff8791c6a9) )
315	307	ROM_LOAD( "pal16r8a_brown.ic11",   0x0600, 0x0104, CRC(fff46363) SHA1(97f673c862e9d5b12cac283000a779c465c76828) )
316	308	ROM_LOAD( "pal16r8a_red.ic10",     0x0800, 0x0104, CRC(027ad661) SHA1(fa5aafe6deb3a9865498152b92dd3776ea10a51d) )
317
318	309	ROM_END
319	310
320	311	GAME( 1982, koikoi,   0,      koikoi, koikoi, 0, ROT270, "Kiwako", "Koi Koi Part 2", GAME_WRONG_COLORS )

src/mame/drivers/hexa.c

r4679	r4680
59	59
60	60
61	61
62		static ADDRESS_MAP_START( readmem, ADDRESS_SPACE_PROGRAM, 8 )
63		AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM)
64		AM_RANGE(0x8000, 0xbfff) AM_READ(SMH_BANK1)
65		AM_RANGE(0xc000, 0xc7ff) AM_READ(SMH_RAM)
	62	static ADDRESS_MAP_START( hexa_map, ADDRESS_SPACE_PROGRAM, 8 )
	63	AM_RANGE(0x0000, 0x7fff) AM_ROM
	64	AM_RANGE(0x8000, 0xbfff) AM_ROMBANK(1)
	65	AM_RANGE(0xc000, 0xc7ff) AM_RAM
66	66	AM_RANGE(0xd001, 0xd001) AM_DEVREAD("ay", ay8910_r)
67		AM_RANGE(0xe000, 0xe7ff) AM_READ(SMH_RAM)
68		ADDRESS_MAP_END
69
70		static ADDRESS_MAP_START( writemem, ADDRESS_SPACE_PROGRAM, 8 )
71		AM_RANGE(0x0000, 0xbfff) AM_WRITE(SMH_ROM)
72		AM_RANGE(0xc000, 0xc7ff) AM_WRITE(SMH_RAM)
73	67	AM_RANGE(0xd000, 0xd001) AM_DEVWRITE("ay", ay8910_address_data_w)
74	68	AM_RANGE(0xd008, 0xd008) AM_WRITE(hexa_d008_w)
75	69	AM_RANGE(0xd010, 0xd010) AM_WRITE(watchdog_reset_w)   /* or IRQ acknowledge, or both */
76		AM_RANGE(0xe000, 0xe7ff) AM_WRITE(hexa_videoram_w) AM_BASE(&videoram) AM_SIZE(&videoram_size)
	70	AM_RANGE(0xe000, 0xe7ff) AM_RAM_WRITE(hexa_videoram_w) AM_BASE(&videoram) AM_SIZE(&videoram_size)
77	71	ADDRESS_MAP_END
78	72
79	73
r4679	r4680
151	145
152	146	/* basic machine hardware */
153	147	MDRV_CPU_ADD("maincpu", Z80, 4000000)      /* 4 MHz ??????? */
154		MDRV_CPU_PROGRAM_MAP(readmem,writemem)
	148	MDRV_CPU_PROGRAM_MAP(hexa_map,0)
155	149	MDRV_CPU_VBLANK_INT("screen", irq0_line_hold)
156	150
157	151	/* video hardware */

src/mame/drivers/mil4000.c

r4679	r4680
135	135
136	136	static VIDEO_START(mil4000)
137	137	{
138		const address_space *space = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM);
	138	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
139	139	int i;
140	140
141	141	// game doesn't clear the palette, so to avoid seeing mame defaults we clear it

src/mame/drivers/gticlub.c

r4679	r4680
1217	1217	{
1218	1218	init_konami_cgboard(machine, 1, CGBOARD_TYPE_GTICLUB);
1219	1219
1220		sharc_dataram_0 = auto_malloc(0x100000);
	1220	sharc_dataram_0 = auto_alloc_array(machine, UINT32, 0x100000/4);
1221	1221	gticlub_led_reg0 = gticlub_led_reg1 = 0x7f;
1222	1222
1223	1223	K001005_preprocess_texture_data(memory_region(machine, "gfx1"), memory_region_length(machine, "gfx1"), 1);
r4679	r4680
1233	1233	set_cgboard_texture_bank(machine, 0, 5, memory_region(machine, "user5"));
1234	1234	set_cgboard_texture_bank(machine, 1, 6, memory_region(machine, "user5"));
1235	1235
1236		sharc_dataram_0 = auto_malloc(0x100000);
1237		sharc_dataram_1 = auto_malloc(0x100000);
	1236	sharc_dataram_0 = auto_alloc_array(machine, UINT32, 0x100000/4);
	1237	sharc_dataram_1 = auto_alloc_array(machine, UINT32, 0x100000/4);
1238	1238	gticlub_led_reg0 = gticlub_led_reg1 = 0x7f;
1239	1239
1240	1240	K056800_init(machine, sound_irq_callback);

src/mame/drivers/cloak.c

r4679	r4680
144	144
145	145	static WRITE8_HANDLER( cloak_irq_reset_0_w )
146	146	{
147		cpu_set_input_line(space->machine->cpu[0], 0, CLEAR_LINE);
	147	cputag_set_input_line(space->machine, "maincpu", 0, CLEAR_LINE);
148	148	}
149	149
150	150	static WRITE8_HANDLER( cloak_irq_reset_1_w )
151	151	{
152		cpu_set_input_line(space->machine->cpu[1], 0, CLEAR_LINE);
	152	cputag_set_input_line(space->machine, "slave", 0, CLEAR_LINE);
153	153	}
154	154
155	155	static WRITE8_HANDLER( cloak_nvram_enable_w )

src/mame/drivers/ilpag.c

r4679	r4680
83	83
84	84	static VIDEO_START(ilpag)
85	85	{
86		blit_buffer = auto_malloc(512*512*4); //just to be sure,number is wrong
	86	blit_buffer = auto_alloc_array(machine, UINT8, 512*512*4); //just to be sure,number is wrong
87	87	}
88	88
89	89	static VIDEO_UPDATE(ilpag)
r4679	r4680
242	242	static WRITE16_HANDLER( irq_callback_w )
243	243	{
244	244	//  popmessage("%02x",data);
245		cpu_set_input_line(space->machine->cpu[0],3,HOLD_LINE );
	245	cputag_set_input_line(space->machine, "maincpu", 3, HOLD_LINE );
246	246	}
247	247
248	248	static WRITE16_HANDLER( sound_write_w )

src/mame/drivers/foodf.c

r4679	r4680
115	115
116	116	static void update_interrupts(running_machine *machine)
117	117	{
118		cpu_set_input_line(machine->cpu[0], 1, atarigen_scanline_int_state ? ASSERT_LINE : CLEAR_LINE);
119		cpu_set_input_line(machine->cpu[0], 2, atarigen_video_int_state ? ASSERT_LINE : CLEAR_LINE);
120		cpu_set_input_line(machine->cpu[0], 3, atarigen_scanline_int_state && atarigen_video_int_state ? ASSERT_LINE : CLEAR_LINE);
	118	cputag_set_input_line(machine, "maincpu", 1, atarigen_scanline_int_state ? ASSERT_LINE : CLEAR_LINE);
	119	cputag_set_input_line(machine, "maincpu", 2, atarigen_video_int_state ? ASSERT_LINE : CLEAR_LINE);
	120	cputag_set_input_line(machine, "maincpu", 3, atarigen_scanline_int_state && atarigen_video_int_state ? ASSERT_LINE : CLEAR_LINE);
121	121	}
122	122
123	123
r4679	r4680
131	131	mystery yet */
132	132
133	133	/* INT 1 is on 32V */
134		atarigen_scanline_int_gen(machine->cpu[0]);
	134	atarigen_scanline_int_gen(cputag_get_cpu(machine, "maincpu"));
135	135
136	136	/* advance to the next interrupt */
137	137	scanline += 64;

src/mame/drivers/mazerbla.c

r4679	r4680
284	284	{
285	285	zpu_int_vector &= ~2;   /* clear D1 on INTA (interrupt acknowledge) */
286	286
287		cpu_set_input_line(space->machine->cpu[0], 0, ASSERT_LINE);   /* main cpu interrupt (comes from CFB (generated at the start of INT routine on CFB) - vblank?) */
	287	cputag_set_input_line(space->machine, "maincpu", 0, ASSERT_LINE);   /* main cpu interrupt (comes from CFB (generated at the start of INT routine on CFB) - vblank?) */
288	288	}
289	289
290	290	static READ8_HANDLER( cfb_zpu_int_req_clr )
r4679	r4680
292	292	zpu_int_vector |= 2;
293	293
294	294	/* clear the INT line when there are no more interrupt requests */
295		if (zpu_int_vector==0xff)
296		cpu_set_input_line(space->machine->cpu[0], 0, CLEAR_LINE);
	295	if (zpu_int_vector == 0xff)
	296	cputag_set_input_line(space->machine, "maincpu", 0, CLEAR_LINE);
297	297
298	298	return 0;
299	299	}
r4679	r4680
318	318
319	319
320	320
321		static UINT8 *cfb_zpu_sharedram;
322		static WRITE8_HANDLER ( sharedram_CFB_ZPU_w )
323		{
324		cfb_zpu_sharedram[offset] = data;
325		}
326		static READ8_HANDLER ( sharedram_CFB_ZPU_r )
327		{
328		return cfb_zpu_sharedram[offset];
329		}
330
331
332
333	321	static UINT8 ls670_0[4];
334	322	static UINT8 ls670_1[4];
335	323
r4679	r4680
471	459	coin_counter_w(offset, (data&0x40)>>6 );
472	460	}
473	461
474		static ADDRESS_MAP_START( io_map, ADDRESS_SPACE_IO, 8 )
	462	static ADDRESS_MAP_START( mazerbla_map, ADDRESS_SPACE_PROGRAM, 8 )
	463	AM_RANGE(0x0000, 0x7fff) AM_ROM
	464	AM_RANGE(0xc000, 0xc7ff) AM_RAM AM_SHARE(1)
	465	AM_RANGE(0xd800, 0xd800) AM_READ(cfb_zpu_int_req_clr)
	466	AM_RANGE(0xe000, 0xe7ff) AM_RAM AM_BASE(&videoram) AM_SIZE(&videoram_size)
	467	AM_RANGE(0xe800, 0xefff) AM_RAM
	468	ADDRESS_MAP_END
	469
	470	static ADDRESS_MAP_START( mazerbla_io_map, ADDRESS_SPACE_IO, 8 )
475	471	ADDRESS_MAP_GLOBAL_MASK(0xff)
476	472	AM_RANGE(0x4c, 0x4f) AM_READWRITE(ls670_1_r, ls670_0_w)
477	473	AM_RANGE(0x60, 0x60) AM_WRITE(zpu_bcd_decoder_w)
r4679	r4680
481	477	AM_RANGE(0x6e, 0x6f) AM_WRITE(zpu_led_w)
482	478	ADDRESS_MAP_END
483	479
484		static ADDRESS_MAP_START( readmem, ADDRESS_SPACE_PROGRAM, 8 )
485		AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM)
486		AM_RANGE(0xc000, 0xc7ff) AM_READ(sharedram_CFB_ZPU_r)
487		AM_RANGE(0xd800, 0xd800) AM_READ(cfb_zpu_int_req_clr)
488		AM_RANGE(0xe000, 0xe7ff) AM_READ(SMH_RAM)
489		AM_RANGE(0xe800, 0xefff) AM_READ(SMH_RAM)
490		ADDRESS_MAP_END
491	480
492		static ADDRESS_MAP_START( writemem, ADDRESS_SPACE_PROGRAM, 8 )
493		AM_RANGE(0x0000, 0x7fff) AM_WRITE(SMH_ROM)
494		AM_RANGE(0xc000, 0xc7ff) AM_WRITE(sharedram_CFB_ZPU_w)
495		AM_RANGE(0xe000, 0xe7ff) AM_WRITE(SMH_RAM) AM_BASE(&videoram) AM_SIZE(&videoram_size)
496		AM_RANGE(0xe800, 0xefff) AM_WRITE(SMH_RAM)
497		ADDRESS_MAP_END
498
499
500
501	481	static UINT8 vsb_ls273;
502	482	static WRITE8_HANDLER( vsb_ls273_audio_control_w )
503	483	{
r4679	r4680
508	488	}
509	489
510	490
511		static ADDRESS_MAP_START( cpu2_io_map, ADDRESS_SPACE_IO, 8 )
	491
	492
	493	static ADDRESS_MAP_START( mazerbla_cpu2_map, ADDRESS_SPACE_PROGRAM, 8 )
	494	AM_RANGE(0x0000, 0x1fff) AM_ROM
	495	AM_RANGE(0x4000, 0x43ff) AM_RAM /* main RAM (stack) */
	496	AM_RANGE(0x8000, 0x83ff) AM_RAM /* waveform ???*/
	497	ADDRESS_MAP_END
	498
	499	static ADDRESS_MAP_START( mazerbla_cpu2_io_map, ADDRESS_SPACE_IO, 8 )
512	500	ADDRESS_MAP_GLOBAL_MASK(0xff)
513	501	AM_RANGE(0x00, 0x00) AM_WRITE(vsb_ls273_audio_control_w)
514	502	AM_RANGE(0x80, 0x83) AM_READWRITE(ls670_0_r, ls670_1_w)
515	503	ADDRESS_MAP_END
516	504
517		static ADDRESS_MAP_START( readmem_cpu2, ADDRESS_SPACE_PROGRAM, 8 )
518		AM_RANGE(0x0000, 0x1fff) AM_READ(SMH_ROM)
519		AM_RANGE(0x4000, 0x43ff) AM_READ(SMH_RAM)
520		AM_RANGE(0x8000, 0x83ff) AM_READ(SMH_RAM)
521		ADDRESS_MAP_END
522
523		static ADDRESS_MAP_START( writemem_cpu2, ADDRESS_SPACE_PROGRAM, 8 )
524		AM_RANGE(0x0000, 0x1fff) AM_WRITE(SMH_ROM)
525		AM_RANGE(0x4000, 0x43ff) AM_WRITE(SMH_RAM) /* main RAM (stack) */
526		AM_RANGE(0x8000, 0x83ff) AM_WRITE(SMH_RAM) /* waveform ???*/
527		ADDRESS_MAP_END
528
529
530
531
532
533		/* Color Frame Buffer PCB */
534		static WRITE8_HANDLER ( cfb_ram_w )
535		{
536		cfb_ram[offset] = data;
537		}
538		static READ8_HANDLER ( cfb_ram_r )
539		{
540		return cfb_ram[offset];
541		}
542
543
544	505	static WRITE8_HANDLER(cfb_led_w)
545	506	{
546	507	/* bit 7 - led on */
r4679	r4680
614	575	return (port02_status);
615	576	}
616	577
617
618		static ADDRESS_MAP_START( cpu3_io_map, ADDRESS_SPACE_IO, 8 )
619		ADDRESS_MAP_GLOBAL_MASK(0xff)
620		AM_RANGE(0x01, 0x01) AM_WRITE(cfb_backgnd_color_w)
621		AM_RANGE(0x02, 0x02) AM_READWRITE(cfb_port_02_r, cfb_led_w)   /* Read = VCU status ? */
622		AM_RANGE(0x03, 0x03) AM_WRITE(cfb_zpu_int_req_set_w)
623		AM_RANGE(0x04, 0x04) AM_WRITE(cfb_rom_bank_sel_w)
624		AM_RANGE(0x05, 0x05) AM_WRITE(cfb_vbank_w)   //visible/writable videopage select?
625		ADDRESS_MAP_END
626		/* Great Guns has a little different banking layout */
627
628		static ADDRESS_MAP_START( gg_cpu3_io_map, ADDRESS_SPACE_IO, 8 )
629		ADDRESS_MAP_GLOBAL_MASK(0xff)
630		AM_RANGE(0x00, 0x00) AM_WRITENOP
631		AM_RANGE(0x01, 0x01) AM_WRITE(cfb_backgnd_color_w)
632		AM_RANGE(0x02, 0x02) AM_READWRITE(cfb_port_02_r, cfb_led_w)   /* Read = VCU status ? */
633		AM_RANGE(0x03, 0x03) AM_WRITE(cfb_zpu_int_req_set_w)
634		AM_RANGE(0x04, 0x04) AM_WRITE(cfb_rom_bank_sel_w_gg)
635		AM_RANGE(0x05, 0x05) AM_WRITE(cfb_vbank_w)   //visible/writable videopage select?
636		ADDRESS_MAP_END
637
638
639	578	static UINT8 VCU_video_reg[4];
640	579	static WRITE8_HANDLER( VCU_video_reg_w )
641	580	{
r4679	r4680
1028	967	return 0;
1029	968	}
1030	969
1031		static ADDRESS_MAP_START( readmem_cpu3, ADDRESS_SPACE_PROGRAM, 8 )
1032		AM_RANGE(0x0000, 0x37ff) AM_READ(SMH_ROM)
1033		AM_RANGE(0x3800, 0x3fff) AM_READ(sharedram_CFB_ZPU_r)
1034		AM_RANGE(0x4000, 0x5fff) AM_READ(SMH_BANK1)            /* GFX roms */
1035		AM_RANGE(0x6000, 0x67ff) AM_READ(cfb_ram_r)            /* RAM for VCU commands and parameters */
1036
	970	static ADDRESS_MAP_START( mazerbla_cpu3_map, ADDRESS_SPACE_PROGRAM, 8 )
	971	AM_RANGE(0x0000, 0x37ff) AM_ROM
	972	AM_RANGE(0x3800, 0x3fff) AM_RAM AM_SHARE(1)
	973	AM_RANGE(0x4000, 0x5fff) AM_ROMBANK(1)               /* GFX roms */
	974	AM_RANGE(0x4000, 0x4003) AM_WRITE(VCU_video_reg_w)
	975	AM_RANGE(0x6000, 0x67ff) AM_RAM AM_BASE(&cfb_ram)      /* Color Frame Buffer PCB, a.k.a. RAM for VCU commands and parameters */
1037	976	AM_RANGE(0xa000, 0xa7ff) AM_READ(VCU_set_cmd_param_r)   /* VCU command and parameters LOAD */
1038		AM_RANGE(0xc000, 0xdfff) AM_READ(VCU_set_gfx_addr_r)      /* gfx LOAD (blit) */
1039		AM_RANGE(0xe000, 0xffff) AM_READ(VCU_set_clr_addr_r)      /* palette? LOAD */
	977	AM_RANGE(0xc000, 0xdfff) AM_READ(VCU_set_gfx_addr_r)   /* gfx LOAD (blit) */
	978	AM_RANGE(0xe000, 0xffff) AM_READ(VCU_set_clr_addr_r)   /* palette? LOAD */
1040	979	ADDRESS_MAP_END
1041	980
1042		static ADDRESS_MAP_START( writemem_cpu3, ADDRESS_SPACE_PROGRAM, 8 )
1043		AM_RANGE(0x0000, 0x37ff) AM_WRITE(SMH_ROM)
1044		AM_RANGE(0x3800, 0x3fff) AM_WRITE(sharedram_CFB_ZPU_w) AM_BASE(&cfb_zpu_sharedram)
1045		AM_RANGE(0x4000, 0x4003) AM_WRITE(VCU_video_reg_w)
1046		AM_RANGE(0x6000, 0x67ff) AM_WRITE(cfb_ram_w) AM_BASE(&cfb_ram)
	981	static ADDRESS_MAP_START( mazerbla_cpu3_io_map, ADDRESS_SPACE_IO, 8 )
	982	ADDRESS_MAP_GLOBAL_MASK(0xff)
	983	AM_RANGE(0x01, 0x01) AM_WRITE(cfb_backgnd_color_w)
	984	AM_RANGE(0x02, 0x02) AM_READWRITE(cfb_port_02_r, cfb_led_w)   /* Read = VCU status ? */
	985	AM_RANGE(0x03, 0x03) AM_WRITE(cfb_zpu_int_req_set_w)
	986	AM_RANGE(0x04, 0x04) AM_WRITE(cfb_rom_bank_sel_w)
	987	AM_RANGE(0x05, 0x05) AM_WRITE(cfb_vbank_w)   //visible/writable videopage select?
1047	988	ADDRESS_MAP_END
1048	989
1049	990
1050
1051
1052
1053
1054	991	/* Great Guns */
1055	992
1056	993	static UINT8 soundlatch;
r4679	r4680
1065	1002	soundlatch = param;
1066	1003
1067	1004	/* cause NMI on sound CPU */
1068		cpu_set_input_line(machine->cpu[1], INPUT_LINE_NMI, ASSERT_LINE);
	1005	cputag_set_input_line(machine, "sub", INPUT_LINE_NMI, ASSERT_LINE);
1069	1006	}
1070	1007
1071	1008
r4679	r4680
1075	1012	}
1076	1013
1077	1014
1078		static ADDRESS_MAP_START( gg_io_map, ADDRESS_SPACE_IO, 8 )
	1015	static ADDRESS_MAP_START( greatgun_io_map, ADDRESS_SPACE_IO, 8 )
1079	1016	ADDRESS_MAP_GLOBAL_MASK(0xff)
1080	1017	AM_RANGE(0x4c, 0x4c) AM_WRITE(main_sound_w)
1081	1018	AM_RANGE(0x60, 0x60) AM_WRITE(zpu_bcd_decoder_w)
r4679	r4680
1085	1022	AM_RANGE(0x6e, 0x6f) AM_WRITE(zpu_led_w)
1086	1023	ADDRESS_MAP_END
1087	1024
	1025	/* Great Guns has a little different banking layout */
	1026	static ADDRESS_MAP_START( greatgun_cpu3_io_map, ADDRESS_SPACE_IO, 8 )
	1027	ADDRESS_MAP_GLOBAL_MASK(0xff)
	1028	AM_RANGE(0x00, 0x00) AM_WRITENOP
	1029	AM_RANGE(0x01, 0x01) AM_WRITE(cfb_backgnd_color_w)
	1030	AM_RANGE(0x02, 0x02) AM_READWRITE(cfb_port_02_r, cfb_led_w)   /* Read = VCU status ? */
	1031	AM_RANGE(0x03, 0x03) AM_WRITE(cfb_zpu_int_req_set_w)
	1032	AM_RANGE(0x04, 0x04) AM_WRITE(cfb_rom_bank_sel_w_gg)
	1033	AM_RANGE(0x05, 0x05) AM_WRITE(cfb_vbank_w)   //visible/writable videopage select?
	1034	ADDRESS_MAP_END
1088	1035
1089	1036	/* frequency is 14.318 MHz/16/16/16/16 */
1090	1037	static INTERRUPT_GEN( sound_interrupt )
r4679	r4680
1094	1041
1095	1042	static WRITE8_HANDLER( sound_int_clear_w )
1096	1043	{
1097		cpu_set_input_line(space->machine->cpu[1], 0, CLEAR_LINE);
	1044	cputag_set_input_line(space->machine, "sub", 0, CLEAR_LINE);
1098	1045	}
1099	1046	static WRITE8_HANDLER( sound_nmi_clear_w )
1100	1047	{
1101		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_NMI, CLEAR_LINE);
	1048	cputag_set_input_line(space->machine, "sub", INPUT_LINE_NMI, CLEAR_LINE);
1102	1049	}
1103	1050
1104	1051	static WRITE8_DEVICE_HANDLER( gg_led_ctrl_w )
r4679	r4680
1107	1054	set_led_status(1,data&0x01);
1108	1055	}
1109	1056
1110		static ADDRESS_MAP_START( sound_readmem, ADDRESS_SPACE_PROGRAM, 8 )
1111		AM_RANGE(0x0000, 0x1fff) AM_READ(SMH_ROM)
1112		AM_RANGE(0x2000, 0x27ff) AM_READ(SMH_RAM)
	1057	static ADDRESS_MAP_START( greatgun_sound_map, ADDRESS_SPACE_PROGRAM, 8 )
	1058	AM_RANGE(0x0000, 0x1fff) AM_ROM
	1059	AM_RANGE(0x2000, 0x27ff) AM_RAM
1113	1060	AM_RANGE(0x4000, 0x4000) AM_DEVREAD("ay1", ay8910_r)
1114		ADDRESS_MAP_END
1115
1116		static ADDRESS_MAP_START( sound_writemem, ADDRESS_SPACE_PROGRAM, 8 )
1117		AM_RANGE(0x0000, 0x1fff) AM_WRITE(SMH_ROM)
1118		AM_RANGE(0x2000, 0x27ff) AM_WRITE(SMH_RAM) /* main RAM (stack) */
1119
1120	1061	AM_RANGE(0x4000, 0x4001) AM_DEVWRITE("ay1", ay8910_address_data_w)
1121	1062	AM_RANGE(0x6000, 0x6001) AM_DEVWRITE("ay2", ay8910_address_data_w)
1122
1123	1063	AM_RANGE(0x8000, 0x8000) AM_WRITE(sound_int_clear_w)
1124	1064	AM_RANGE(0xa000, 0xa000) AM_WRITE(sound_nmi_clear_w)
1125	1065	ADDRESS_MAP_END
1126	1066
1127	1067
1128	1068
1129
1130
1131
1132	1069	static INPUT_PORTS_START( mazerbla )
1133	1070	PORT_START("ZPU")   /* Strobe 0: ZPU Switches */
1134	1071	PORT_DIPNAME( 0x40, 0x40, "ZPU Switch 1" )
r4679	r4680
1425	1362	{
1426	1363	game_id = MAZERBLA;
1427	1364	zpu_int_vector = 0xff;
1428		cpu_set_irq_callback(machine->cpu[0], irq_callback);
	1365	cpu_set_irq_callback(cputag_get_cpu(machine, "maincpu"), irq_callback);
1429	1366	}
1430	1367
1431	1368
r4679	r4680
1434	1371	UINT8 *rom = memory_region(machine, "sub2");
1435	1372	game_id = GREATGUN;
1436	1373	zpu_int_vector = 0xff;
1437		cpu_set_irq_callback(machine->cpu[0], irq_callback);
	1374	cpu_set_irq_callback(cputag_get_cpu(machine, "maincpu"), irq_callback);
1438	1375
1439	1376
1440	1377	//patch VCU test
r4679	r4680
1472	1409	static MACHINE_DRIVER_START( mazerbla )
1473	1410	/* basic machine hardware */
1474	1411	MDRV_CPU_ADD("maincpu", Z80, 4000000)   /* 4 MHz, no NMI, IM2 - vectors at 0xf8, 0xfa, 0xfc */
1475		MDRV_CPU_PROGRAM_MAP(readmem,writemem)
1476		MDRV_CPU_IO_MAP(io_map,0)
	1412	MDRV_CPU_PROGRAM_MAP(mazerbla_map,0)
	1413	MDRV_CPU_IO_MAP(mazerbla_io_map,0)
1477	1414
1478	1415	MDRV_CPU_ADD("sub", Z80, 4000000)   /* 4 MHz, NMI, IM1 INT */
1479		MDRV_CPU_PROGRAM_MAP(readmem_cpu2,writemem_cpu2)
1480		MDRV_CPU_IO_MAP(cpu2_io_map,0)
	1416	MDRV_CPU_PROGRAM_MAP(mazerbla_cpu2_map,0)
	1417	MDRV_CPU_IO_MAP(mazerbla_cpu2_io_map,0)
1481	1418	//MDRV_CPU_PERIODIC_INT(irq0_line_hold, 400 ) /* frequency in Hz */
1482	1419
1483	1420	MDRV_CPU_ADD("sub2", Z80, 4000000)   /* 4 MHz, no  NMI, IM1 INT */
1484		MDRV_CPU_PROGRAM_MAP(readmem_cpu3,writemem_cpu3)
1485		MDRV_CPU_IO_MAP(cpu3_io_map,0)
	1421	MDRV_CPU_PROGRAM_MAP(mazerbla_cpu3_map,0)
	1422	MDRV_CPU_IO_MAP(mazerbla_cpu3_io_map,0)
1486	1423	/* (vblank related ??) int generated by a custom video processor
1487	1424	and cleared on ANY port access.
1488	1425	but handled differently for now
r4679	r4680
1515	1452
1516	1453	/* basic machine hardware */
1517	1454	MDRV_CPU_ADD("maincpu", Z80, 4000000)   /* 4 MHz, no NMI, IM2 - vectors at 0xf8, 0xfa, 0xfc */
1518		MDRV_CPU_PROGRAM_MAP(readmem,writemem)
1519		MDRV_CPU_IO_MAP(gg_io_map,0)
	1455	MDRV_CPU_PROGRAM_MAP(mazerbla_map,0)
	1456	MDRV_CPU_IO_MAP(greatgun_io_map,0)
1520	1457
1521	1458	MDRV_CPU_ADD("sub", Z80, 14318000 / 4)   /* 3.579500 MHz, NMI - caused by sound command write, periodic INT */
1522		MDRV_CPU_PROGRAM_MAP(sound_readmem,sound_writemem)
	1459	MDRV_CPU_PROGRAM_MAP(greatgun_sound_map,0)
1523	1460	MDRV_CPU_PERIODIC_INT(sound_interrupt, (double)14318180/16/16/16/16 )
1524	1461
1525	1462	MDRV_CPU_ADD("sub2", Z80, 4000000)   /* 4 MHz, no  NMI, IM1 INT */
1526		MDRV_CPU_PROGRAM_MAP(readmem_cpu3,writemem_cpu3)
1527		MDRV_CPU_IO_MAP(gg_cpu3_io_map,0)
	1463	MDRV_CPU_PROGRAM_MAP(mazerbla_cpu3_map,0)
	1464	MDRV_CPU_IO_MAP(greatgun_cpu3_io_map,0)
1528	1465	/* (vblank related ??) int generated by a custom video processor
1529	1466	and cleared on ANY port access.
1530	1467	but handled differently for now
r4679	r4680
1677	1614	GAME( 1983, mazerbla, 0,        mazerbla,  mazerbla, 0, ROT0, "Stern", "Mazer Blazer (set 1)", GAME_IMPERFECT_GRAPHICS |GAME_NO_SOUND | GAME_NOT_WORKING )
1678	1615	GAME( 1983, mzrblzra, mazerbla, mazerbla,  mazerbla, 0, ROT0, "Stern", "Mazer Blazer (set 2)", GAME_IMPERFECT_GRAPHICS |GAME_NO_SOUND | GAME_NOT_WORKING )
1679	1616	GAME( 1983, greatgun, 0,        greatgun,  greatgun, 0, ROT0, "Stern", "Great Guns", GAME_IMPERFECT_GRAPHICS | GAME_NOT_WORKING )
1680
1681

src/mame/drivers/namcona1.c

r4679	r4680
499	499	static int transfer_dword( running_machine *machine, UINT32 dest, UINT32 source )
500	500	{
501	501	UINT16 data;
502		const address_space *space = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM);
	502	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
503	503
504	504	if( source>=0x400000 && source<0xc00000 )
505	505	{
r4679	r4680
723	723	//  logerror("mailbox_w_68k: %x @ %x\n", data, offset);
724	724
725	725	if (offset == 4)
726		cpu_set_input_line(space->machine->cpu[1], M37710_LINE_IRQ0, HOLD_LINE);
	726	cputag_set_input_line(space->machine, "mcu", M37710_LINE_IRQ0, HOLD_LINE);
727	727
728	728	COMBINE_DATA(&mcu_mailbox[offset%8]);
729	729
r4679	r4680
850	850	logerror("launching 68k, PC=%x\n", cpu_get_pc(space->cpu));
851	851
852	852	// reset and launch the 68k
853		cpu_set_input_line(space->machine->cpu[0], INPUT_LINE_RESET, CLEAR_LINE);
	853	cputag_set_input_line(space->machine, "maincpu", INPUT_LINE_RESET, CLEAR_LINE);
854	854	}
855	855
856	856	mcu_port4 = data;
r4679	r4680
925	925	// for games with the MCU emulated, the MCU boots the 68000.  don't allow it before that.
926	926	static MACHINE_RESET( namcona1_mcu )
927	927	{
928		cpu_set_input_line(machine->cpu[0], INPUT_LINE_RESET, ASSERT_LINE);
	928	cputag_set_input_line(machine, "maincpu", INPUT_LINE_RESET, ASSERT_LINE);
929	929
930	930	mcu_port5 = 1;
931	931	}

src/mame/drivers/forte2.c

r4679	r4680
86	86
87	87	static void vdp_interrupt(running_machine *machine, int i)
88	88	{
89		cpu_set_input_line(machine->cpu[0], 0, (i ? HOLD_LINE : CLEAR_LINE));
	89	cputag_set_input_line(machine, "maincpu", 0, (i ? HOLD_LINE : CLEAR_LINE));
90	90	}
91	91
92	92	static const TMS9928a_interface tms9928a_interface =
r4679	r4680
154	154	}
155	155
156	156	// address line swap
157		buf = (UINT8*)malloc_or_die(memsize);
	157	buf = alloc_array_or_die(UINT8, memsize);
158	158	memcpy(buf, mem, memsize);
159	159	for ( i = 0; i < memsize; i++ )
160	160	{

src/mame/drivers/itgambl3.c

r4679	r4680
210	210	static MACHINE_RESET( itgambl3 )
211	211	{
212	212	/* stop the CPU, we have no code for it anyway */
213		cpu_set_input_line(machine->cpu[0], INPUT_LINE_HALT, ASSERT_LINE);
	213	cputag_set_input_line(machine, "maincpu", INPUT_LINE_HALT, ASSERT_LINE);
214	214	}
215	215
216	216	/* default 444 palette for debug purpose*/

src/mame/drivers/acefruit.c

r4679	r4680
26	26	switch( color )
27	27	{
28	28	case 0x0c:
29		cpu_set_input_line(machine->cpu[0], 0, HOLD_LINE );
	29	cputag_set_input_line(machine, "maincpu", 0, HOLD_LINE );
30	30	break;
31	31	}
32	32	}

src/mame/drivers/dkong.c

r4679	r4680
390	390
391	391	static MACHINE_START( dkong2b )
392	392	{
393		dkong_state *state = machine->driver_data;
	393	dkong_state *state = (dkong_state *)machine->driver_data;
394	394
395	395	state->hardware_type = HARDWARE_TKG04;
396	396
r4679	r4680
401	401
402	402	static MACHINE_START( s2650 )
403	403	{
404		dkong_state *state = machine->driver_data;
	404	dkong_state *state = (dkong_state *)machine->driver_data;
405	405	UINT8   *p = memory_region(machine, "user1");
406	406	const char *game_name = machine->gamedrv->name;
407	407	int i;
r4679	r4680
433	433
434	434	static MACHINE_START( radarscp )
435	435	{
436		dkong_state *state = machine->driver_data;
	436	dkong_state *state = (dkong_state *)machine->driver_data;
437	437
438	438	MACHINE_START_CALL(dkong2b);
439	439	state->hardware_type = HARDWARE_TRS02;
r4679	r4680
441	441
442	442	static MACHINE_START( radarsc1 )
443	443	{
444		dkong_state *state = machine->driver_data;
	444	dkong_state *state = (dkong_state *)machine->driver_data;
445	445
446	446	MACHINE_START_CALL(dkong2b);
447	447	state->hardware_type = HARDWARE_TRS01;
r4679	r4680
449	449
450	450	static MACHINE_START( dkong3 )
451	451	{
452		dkong_state *state = machine->driver_data;
	452	dkong_state *state = (dkong_state *)machine->driver_data;
453	453
454	454	state->hardware_type = HARDWARE_TKG04;
455	455	}
r4679	r4680
461	461
462	462	static MACHINE_RESET( strtheat )
463	463	{
464		dkong_state *state = machine->driver_data;
	464	dkong_state *state = (dkong_state *)machine->driver_data;
465	465	UINT8 *ROM = memory_region(machine, "maincpu");
466	466
467	467	MACHINE_RESET_CALL(dkong);
r4679	r4680
474	474
475	475	static MACHINE_RESET( drakton )
476	476	{
477		dkong_state *state = machine->driver_data;
	477	dkong_state *state = (dkong_state *)machine->driver_data;
478	478	UINT8 *ROM = memory_region(machine, "maincpu");
479	479
480	480	MACHINE_RESET_CALL(dkong);
r4679	r4680
494	494
495	495	static READ8_DEVICE_HANDLER( dk_dma_read_byte )
496	496	{
497		const address_space *space = cpu_get_address_space(device->machine->cpu[0], ADDRESS_SPACE_PROGRAM);
	497	const address_space *space = cputag_get_address_space(device->machine, "maincpu", ADDRESS_SPACE_PROGRAM);
498	498	return memory_read_byte(space, offset);
499	499	}
500	500
501	501	static WRITE8_DEVICE_HANDLER( dk_dma_write_byte )
502	502	{
503		const address_space *space = cpu_get_address_space(device->machine->cpu[0], ADDRESS_SPACE_PROGRAM);
	503	const address_space *space = cputag_get_address_space(device->machine, "maincpu", ADDRESS_SPACE_PROGRAM);
504	504	memory_write_byte(space, offset, data);
505	505	}
506	506
507	507	static READ8_DEVICE_HANDLER( hb_dma_read_byte )
508	508	{
509		const address_space *space = cpu_get_address_space(device->machine->cpu[0], ADDRESS_SPACE_PROGRAM);
510		dkong_state *state = device->machine->driver_data;
	509	const address_space *space = cputag_get_address_space(device->machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	510	dkong_state *state = (dkong_state *)device->machine->driver_data;
511	511	int     bucket = state->rev_map[(offset>>10) & 0x1ff];
512	512	int   addr;
513	513
r4679	r4680
521	521
522	522	static WRITE8_DEVICE_HANDLER( hb_dma_write_byte )
523	523	{
524		const address_space *space = cpu_get_address_space(device->machine->cpu[0], ADDRESS_SPACE_PROGRAM);
525		dkong_state *state = device->machine->driver_data;
	524	const address_space *space = cputag_get_address_space(device->machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	525	dkong_state *state = (dkong_state *)device->machine->driver_data;
526	526	int     bucket = state->rev_map[(offset>>10) & 0x1ff];
527	527	int   addr;
528	528
r4679	r4680
536	536
537	537	static READ8_DEVICE_HANDLER( p8257_ctl_r )
538	538	{
539		dkong_state *state = device->machine->driver_data;
	539	dkong_state *state = (dkong_state *)device->machine->driver_data;
540	540	return state->dma_latch;
541	541	}
542	542
543	543	static WRITE8_DEVICE_HANDLER( p8257_ctl_w )
544	544	{
545		dkong_state *state = device->machine->driver_data;
	545	dkong_state *state = (dkong_state *)device->machine->driver_data;
546	546	state->dma_latch = data;
547	547	}
548	548
r4679	r4680
606	606
607	607	static READ8_HANDLER( epos_decrypt_rom )
608	608	{
609		dkong_state *state = space->machine->driver_data;
	609	dkong_state *state = (dkong_state *)space->machine->driver_data;
610	610
611	611	if (offset & 0x01)
612	612	{
r4679	r4680
636	636
637	637	static WRITE8_HANDLER( s2650_data_w )
638	638	{
639		dkong_state *state = space->machine->driver_data;
	639	dkong_state *state = (dkong_state *)space->machine->driver_data;
640	640	#if DEBUG_PROTECTION
641	641	logerror("write : pc = %04x, loopback = %02x\n",cpu_get_pc(space->cpu), data);
642	642	#endif
r4679	r4680
646	646
647	647	static READ8_HANDLER( s2650_port0_r )
648	648	{
649		dkong_state *state = space->machine->driver_data;
	649	dkong_state *state = (dkong_state *)space->machine->driver_data;
650	650	#if DEBUG_PROTECTION
651	651	logerror("port 0 : pc = %04x, loopback = %02x\n",cpu_get_pc(space->cpu), state->hunchloopback);
652	652	#endif
r4679	r4680
673	673
674	674	static READ8_HANDLER( s2650_port1_r )
675	675	{
676		dkong_state *state = space->machine->driver_data;
	676	dkong_state *state = (dkong_state *)space->machine->driver_data;
677	677	#if DEBUG_PROTECTION
678	678	logerror("port 1 : pc = %04x, loopback = %02x\n",cpu_get_pc(space->cpu), state->hunchloopback);
679	679	#endif
r4679	r4680
699	699	{
700	700	if (data & 1)
701	701	{
702		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_RESET, CLEAR_LINE);
703		cpu_set_input_line(space->machine->cpu[2], INPUT_LINE_RESET, CLEAR_LINE);
	702	cputag_set_input_line(space->machine, "n2a03a", INPUT_LINE_RESET, CLEAR_LINE);
	703	cputag_set_input_line(space->machine, "n2a03b", INPUT_LINE_RESET, CLEAR_LINE);
704	704	}
705	705	else
706	706	{
707		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_RESET, ASSERT_LINE);
708		cpu_set_input_line(space->machine->cpu[2], INPUT_LINE_RESET, ASSERT_LINE);
	707	cputag_set_input_line(space->machine, "n2a03a", INPUT_LINE_RESET, ASSERT_LINE);
	708	cputag_set_input_line(space->machine, "n2a03b", INPUT_LINE_RESET, ASSERT_LINE);
709	709	}
710	710	}
711	711
r4679	r4680
2899	2899	{7,1,4,0,3,6,2,5},
2900	2900	};
2901	2901
2902		memory_install_read8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x0000, 0x3fff, 0, 0, SMH_BANK1 );
	2902	memory_install_read8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x0000, 0x3fff, 0, 0, (read8_space_func)SMH_BANK(1) );
2903	2903
2904	2904	/* While the PAL supports up to 16 decryption methods, only four
2905	2905	are actually used in the PAL.  Therefore, we'll take a little
r4679	r4680
2921	2921	{6,3,4,1,0,7,2,5},
2922	2922	};
2923	2923
2924		memory_install_read8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x0000, 0x3fff, 0, 0, SMH_BANK1 );
	2924	memory_install_read8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x0000, 0x3fff, 0, 0, (read8_space_func)SMH_BANK(1) );
2925	2925
2926	2926	/* While the PAL supports up to 16 decryption methods, only four
2927	2927	are actually used in the PAL.  Therefore, we'll take a little
r4679	r4680
2932	2932	drakton_decrypt_rom(machine, 0x88, 0x1c000, bs[3]);
2933	2933
2934	2934	/* custom handlers supporting Joystick or Steering Wheel */
2935		memory_install_read8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x7c00, 0x7c00, 0, 0, strtheat_inputport_0_r);
2936		memory_install_read8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x7c80, 0x7c80, 0, 0, strtheat_inputport_1_r);
	2935	memory_install_read8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x7c00, 0x7c00, 0, 0, strtheat_inputport_0_r);
	2936	memory_install_read8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x7c80, 0x7c80, 0, 0, strtheat_inputport_1_r);
2937	2937	}
2938	2938
2939	2939	/*************************************

src/mame/drivers/sprint4.c

r4679	r4680
119	119	watchdog_enable(machine, input_port_read(machine, "IN0") & 0x40);
120	120
121	121	if (input_port_read(machine, "IN0") & 0x40)
122		cpu_set_input_line(machine->cpu[0], INPUT_LINE_NMI, PULSE_LINE);
	122	cputag_set_input_line(machine, "maincpu", INPUT_LINE_NMI, PULSE_LINE);
123	123
124	124	timer_set(machine, video_screen_get_time_until_pos(machine->primary_screen, scanline, 0), NULL, scanline, nmi_callback);
125	125	}

src/mame/drivers/skyraid.c

r4679	r4680
44	44	palette_set_color(machine, 19, MAKE_RGB(0xE0, 0xE0, 0xE0));
45	45	}
46	46
47
48		static READ8_HANDLER( skyraid_alpha_num_r)
49		{
50		return skyraid_alpha_num_ram[offset & 0x7f];
51		}
52
53
54	47	static READ8_HANDLER( skyraid_port_0_r )
55	48	{
56	49	UINT8 val = input_port_read(space->machine, "LANGUAGE");
r4679	r4680
63	56	return val;
64	57	}
65	58
66
67		static WRITE8_HANDLER( skyraid_alpha_num_w )
68		{
69		skyraid_alpha_num_ram[offset & 0x7f] = data;
70		}
71
72
73	59	static WRITE8_HANDLER( skyraid_sound_w )
74	60	{
75	61	/* BIT0 => PLANE SWEEP */
r4679	r4680
101	87	}
102	88
103	89
104		static ADDRESS_MAP_START( skyraid_readmem, ADDRESS_SPACE_PROGRAM, 8 )
105		AM_RANGE(0x0000, 0x00ff) AM_READ(SMH_RAM) AM_MIRROR(0x300)
106		AM_RANGE(0x0800, 0x087f) AM_READ(SMH_RAM)
107		AM_RANGE(0x0880, 0x0bff) AM_READ(skyraid_alpha_num_r)
	90	static ADDRESS_MAP_START( skyraid_map, ADDRESS_SPACE_PROGRAM, 8 )
	91	AM_RANGE(0x0000, 0x00ff) AM_RAM AM_MIRROR(0x300)
	92	AM_RANGE(0x0400, 0x040f) AM_WRITEONLY AM_BASE(&skyraid_pos_ram)
	93	AM_RANGE(0x0800, 0x087f) AM_RAM AM_MIRROR(0x480) AM_BASE(&skyraid_alpha_num_ram)
108	94	AM_RANGE(0x1000, 0x1000) AM_READ(skyraid_port_0_r)
109		AM_RANGE(0x1000, 0x1001) AM_READ_PORT("DSW")
	95	AM_RANGE(0x1001, 0x1001) AM_READ_PORT("DSW")
110	96	AM_RANGE(0x1400, 0x1400) AM_READ_PORT("COIN")
111	97	AM_RANGE(0x1400, 0x1401) AM_READ_PORT("SYSTEM")
112		AM_RANGE(0x7000, 0x7fff) AM_READ(SMH_ROM)
113		AM_RANGE(0xf000, 0xffff) AM_READ(SMH_ROM)
114		ADDRESS_MAP_END
115
116
117		static ADDRESS_MAP_START( skyraid_writemem, ADDRESS_SPACE_PROGRAM, 8 )
118		AM_RANGE(0x0000, 0x00ff) AM_WRITE(SMH_RAM) AM_MIRROR(0x300)
119		AM_RANGE(0x0400, 0x040f) AM_WRITE(SMH_RAM) AM_BASE(&skyraid_pos_ram)
120		AM_RANGE(0x0800, 0x087f) AM_WRITE(SMH_RAM) AM_BASE(&skyraid_alpha_num_ram)
121		AM_RANGE(0x0880, 0x0bff) AM_WRITE(skyraid_alpha_num_w)
122		AM_RANGE(0x1c00, 0x1c0f) AM_WRITE(SMH_RAM) AM_BASE(&skyraid_obj_ram)
	98	AM_RANGE(0x1c00, 0x1c0f) AM_WRITEONLY AM_BASE(&skyraid_obj_ram)
123	99	AM_RANGE(0x4000, 0x4000) AM_WRITE(skyraid_scroll_w)
124	100	AM_RANGE(0x4400, 0x4400) AM_WRITE(skyraid_sound_w)
125	101	AM_RANGE(0x4800, 0x4800) AM_WRITE(skyraid_range_w)
126	102	AM_RANGE(0x5000, 0x5000) AM_WRITE(watchdog_reset_w)
127	103	AM_RANGE(0x5800, 0x5800) AM_WRITE(skyraid_offset_w)
128		AM_RANGE(0x7000, 0x7fff) AM_WRITE(SMH_ROM)
129		AM_RANGE(0xf000, 0xffff) AM_WRITE(SMH_ROM)
	104	AM_RANGE(0x7000, 0x7fff) AM_ROM
	105	AM_RANGE(0xf000, 0xffff) AM_ROM
130	106	ADDRESS_MAP_END
131	107
132
133	108	static INPUT_PORTS_START( skyraid )
134	109	PORT_START("LANGUAGE")
135	110	PORT_DIPNAME( 0x30, 0x00, DEF_STR( Language ) )
r4679	r4680
263	238
264	239	/* basic machine hardware */
265	240	MDRV_CPU_ADD("maincpu", M6502, 12096000 / 12)
266		MDRV_CPU_PROGRAM_MAP(skyraid_readmem, skyraid_writemem)
	241	MDRV_CPU_PROGRAM_MAP(skyraid_map, 0)
267	242	MDRV_CPU_VBLANK_INT("screen", irq0_line_hold)
268	243
269	244	/* video hardware */

src/mame/drivers/travrusa.c

r4679	r4680
462	462	{
463	463	int A,j;
464	464	UINT8 *rom = memory_region(machine, "maincpu");
465		UINT8 *buffer = malloc_or_die(0x2000);
	465	UINT8 *buffer = alloc_array_or_die(UINT8, 0x2000);
466	466
467	467	memcpy(buffer,rom,0x2000);
468	468

src/mame/drivers/hanaroku.c

r4679	r4680
118	118
119	119	/* main cpu */
120	120
121		static ADDRESS_MAP_START( readmem, ADDRESS_SPACE_PROGRAM, 8 )
122		AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM)
123		AM_RANGE(0x8000, 0x87ff) AM_READ(SMH_RAM)
124		AM_RANGE(0x9000, 0x97ff) AM_READ(SMH_RAM)
125		AM_RANGE(0xa000, 0xa1ff) AM_READ(SMH_RAM)
126		AM_RANGE(0xc000, 0xc3ff) AM_READ(SMH_RAM)
127		AM_RANGE(0xc400, 0xc4ff) AM_READ(SMH_RAM)
128		AM_RANGE(0xd000, 0xd000) AM_DEVREAD("ay", ay8910_r)
129		AM_RANGE(0xe000, 0xe000) AM_READ_PORT("IN0")
130		AM_RANGE(0xe001, 0xe001) AM_READ_PORT("IN1")
131		AM_RANGE(0xe002, 0xe002) AM_READ_PORT("IN2")
132		AM_RANGE(0xe004, 0xe004) AM_READ_PORT("DSW3")
133		ADDRESS_MAP_END
134
135		static ADDRESS_MAP_START( writemem, ADDRESS_SPACE_PROGRAM, 8 )
136		AM_RANGE(0x0000, 0x7fff) AM_WRITE(SMH_ROM)
137		AM_RANGE(0x8000, 0x87ff) AM_WRITE(SMH_RAM) AM_BASE(&hanaroku_spriteram1)
138		AM_RANGE(0x9000, 0x97ff) AM_WRITE(SMH_RAM) AM_BASE(&hanaroku_spriteram2)
139		AM_RANGE(0xa000, 0xa1ff) AM_WRITE(SMH_RAM) AM_BASE(&hanaroku_spriteram3)
	121	static ADDRESS_MAP_START( hanaroku_map, ADDRESS_SPACE_PROGRAM, 8 )
	122	AM_RANGE(0x0000, 0x7fff) AM_ROM
	123	AM_RANGE(0x8000, 0x87ff) AM_RAM AM_BASE(&hanaroku_spriteram1)
	124	AM_RANGE(0x9000, 0x97ff) AM_RAM AM_BASE(&hanaroku_spriteram2)
	125	AM_RANGE(0xa000, 0xa1ff) AM_RAM AM_BASE(&hanaroku_spriteram3)
140	126	AM_RANGE(0xa200, 0xa2ff) AM_WRITENOP   // ??? written once during P.O.S.T.
141	127	AM_RANGE(0xa300, 0xa304) AM_WRITENOP   // ???
142		AM_RANGE(0xc000, 0xc3ff) AM_WRITE(SMH_RAM)            // main ram
143		AM_RANGE(0xc400, 0xc4ff) AM_WRITE(SMH_RAM)   // ???
144	128	AM_RANGE(0xb000, 0xb000) AM_WRITENOP   // ??? always 0x40
	129	AM_RANGE(0xc000, 0xc3ff) AM_RAM         // main ram
	130	AM_RANGE(0xc400, 0xc4ff) AM_RAM         // ???
	131	AM_RANGE(0xd000, 0xd000) AM_DEVREAD("ay", ay8910_r)
145	132	AM_RANGE(0xd000, 0xd001) AM_DEVWRITE("ay", ay8910_address_data_w)
146		AM_RANGE(0xe000, 0xe000) AM_WRITE(hanaroku_out_0_w)
147		AM_RANGE(0xe002, 0xe002) AM_WRITE(hanaroku_out_1_w)
148		AM_RANGE(0xe004, 0xe004) AM_WRITE(hanaroku_out_2_w)
	133	AM_RANGE(0xe000, 0xe000) AM_READ_PORT("IN0") AM_WRITE(hanaroku_out_0_w)
	134	AM_RANGE(0xe001, 0xe001) AM_READ_PORT("IN1")
	135	AM_RANGE(0xe002, 0xe002) AM_READ_PORT("IN2") AM_WRITE(hanaroku_out_1_w)
	136	AM_RANGE(0xe004, 0xe004) AM_READ_PORT("DSW3") AM_WRITE(hanaroku_out_2_w)
149	137	ADDRESS_MAP_END
150	138
151	139
r4679	r4680
241	229
242	230	static MACHINE_DRIVER_START( hanaroku )
243	231	MDRV_CPU_ADD("maincpu", Z80,6000000)       /* ? MHz */
244		MDRV_CPU_PROGRAM_MAP(readmem,writemem)
	232	MDRV_CPU_PROGRAM_MAP(hanaroku_map,0)
245	233	MDRV_CPU_VBLANK_INT("screen", irq0_line_hold)
246	234
247	235	/* video hardware */

src/mame/drivers/aliens.c

r4679	r4680
75	75	static WRITE8_HANDLER( aliens_sh_irqtrigger_w )
76	76	{
77	77	soundlatch_w(space,offset,data);
78		cpu_set_input_line_and_vector(space->machine->cpu[1], 0, HOLD_LINE, 0xff);
	78	cputag_set_input_line_and_vector(space->machine, "audiocpu", 0, HOLD_LINE, 0xff);
79	79	}
80	80
81	81	static WRITE8_DEVICE_HANDLER( aliens_snd_bankswitch_w )
r4679	r4680
429	429	ROM_LOAD( "875b04.e05",  0x00000, 0x40000, CRC(4e209ac8) SHA1(09d9eaae61bfd04bf318555ccd44d7371571d86d) )
430	430	ROM_END
431	431
	432	ROM_START( aliensa )
	433	ROM_REGION( 0x38000, "maincpu", 0 ) /* code + banked roms */
	434	ROM_LOAD( "875_r02.e24", 0x10000, 0x08000, CRC(973e4f11) SHA1(a4f65ef4c84b1dcac591dc348ebbb96d35ef5f93) )
	435	ROM_CONTINUE(            0x08000, 0x08000 )
	436	ROM_LOAD( "875_m01.c24",  0x18000, 0x20000, CRC(1663d3dc) SHA1(706bdf3daa3bda372d94263f3405d67a7ef8dc69) )
	437
	438	ROM_REGION( 0x10000, "audiocpu", 0 ) /* 64k for the sound CPU */
	439	ROM_LOAD( "875_k03.g04", 0x00000, 0x08000, CRC(bd86264d) SHA1(345fd666daf8a29ef314b14306c1a976cb159bed) )
	440
	441	ROM_REGION( 0x200000, "gfx1", 0 ) /* graphics */
	442	ROM_LOAD( "875b11.k13", 0x000000, 0x80000, CRC(89c5c885) SHA1(02a1581579b6ef816e04bec312a7b3ae7c7e84f8) )   /* characters (set 1) */
	443	ROM_LOAD( "875b07.j13", 0x080000, 0x40000, CRC(e9c56d66) SHA1(1f58949d5391aef002a6e1ee7034e57bf99cee61) )   /* characters (set 2) */
	444	/* second half empty */
	445	ROM_LOAD( "875b12.k19", 0x100000, 0x80000, CRC(ea6bdc17) SHA1(a7c22370f8adc5b479283f1ff831f493df78282f) )   /* characters (set 1) */
	446	ROM_LOAD( "875b08.j19", 0x180000, 0x40000, CRC(f9387966) SHA1(470ecc4a5a3edd08d5e0ab10b0c590db1968fb0a) )   /* characters (set 2) */
	447	/* second half empty */
	448
	449	ROM_REGION( 0x200000, "gfx2", 0 ) /* graphics */
	450	ROM_LOAD( "875b10.k08", 0x000000, 0x80000, CRC(0b1035b1) SHA1(db04020761386e79249762cd1540208375c38c7f) )   /* sprites (set 1) */
	451	ROM_LOAD( "875b06.j08", 0x080000, 0x40000, CRC(081a0566) SHA1(3a4aa14178fe76a030224743c9e9cd974e08bd79) )   /* sprites (set 2) */
	452	/* second half empty */
	453	ROM_LOAD( "875b09.k02", 0x100000, 0x80000, CRC(e76b3c19) SHA1(6838e07460b3eaaeb129208ad0696c8019bd63d9) )   /* sprites (set 1) */
	454	ROM_LOAD( "875b05.j02", 0x180000, 0x40000, CRC(19a261f2) SHA1(b0518fad833b3e613e0201d5d9cab73dc5e78e1d) )   /* sprites (set 2) */
	455	/* second half empty */
	456
	457	ROM_REGION( 0x0100, "proms", 0 )
	458	ROM_LOAD( "821a08.h14", 0x0000, 0x0100, CRC(7da55800) SHA1(3826f73569c8ae0431510a355bdfa082152b74a5) )   /* priority encoder (not used) */
	459
	460	ROM_REGION( 0x40000, "konami", 0 ) /* samples for 007232 */
	461	ROM_LOAD( "875b04.e05",  0x00000, 0x40000, CRC(4e209ac8) SHA1(09d9eaae61bfd04bf318555ccd44d7371571d86d) )
	462	ROM_END
	463
432	464	/***************************************************************************
433	465
434	466	Game driver(s)
r4679	r4680
451	483	{
452	484	UINT8 *RAM = memory_region(machine, "maincpu");
453	485
454		konami_configure_set_lines(machine->cpu[0], aliens_banking);
	486	konami_configure_set_lines(cputag_get_cpu(machine, "maincpu"), aliens_banking);
455	487
456	488	/* init the default bank */
457		memory_set_bankptr(machine,  1, &RAM[0x10000] );
	489	memory_set_bankptr(machine,  1, &RAM[0x10000]);
458	490	}
459	491
460	492
r4679	r4680
471	503	GAME( 1990, aliens,   0,      aliens, aliens, aliens, ROT0, "Konami", "Aliens (World set 1)", GAME_SUPPORTS_SAVE )
472	504	GAME( 1990, aliens2,  aliens, aliens, aliens, aliens, ROT0, "Konami", "Aliens (World set 2)", GAME_SUPPORTS_SAVE )
473	505	GAME( 1990, aliens3,  aliens, aliens, aliens, aliens, ROT0, "Konami", "Aliens (World set 3)", GAME_SUPPORTS_SAVE )
474		GAME( 1990, aliensu,  aliens, aliens, aliens, aliens, ROT0, "Konami", "Aliens (US)", GAME_SUPPORTS_SAVE )
	506	GAME( 1990, aliensu,  aliens, aliens, aliens, aliens, ROT0, "Konami", "Aliens (US)",          GAME_SUPPORTS_SAVE )
475	507	GAME( 1990, aliensj,  aliens, aliens, aliens, aliens, ROT0, "Konami", "Aliens (Japan set 1)", GAME_SUPPORTS_SAVE )
476	508	GAME( 1990, aliensj2, aliens, aliens, aliens, aliens, ROT0, "Konami", "Aliens (Japan set 2)", GAME_SUPPORTS_SAVE )
	509	GAME( 1990, aliensa,  aliens, aliens, aliens, aliens, ROT0, "Konami", "Aliens (Asia)",        GAME_SUPPORTS_SAVE )

src/mame/drivers/metlclsh.c

r4679	r4680
57	57
58	58	***************************************************************************/
59	59
60		static UINT8 *sharedram;
61
62		static READ8_HANDLER ( sharedram_r )   { return sharedram[offset]; }
63		static WRITE8_HANDLER( sharedram_w )   { sharedram[offset] = data; }
64
65	60	static WRITE8_HANDLER( metlclsh_cause_irq )
66	61	{
67		cpu_set_input_line(space->machine->cpu[1],M6809_IRQ_LINE,ASSERT_LINE);
	62	cputag_set_input_line(space->machine, "sub", M6809_IRQ_LINE, ASSERT_LINE);
68	63	}
69	64
70	65	static WRITE8_HANDLER( metlclsh_ack_nmi )
71	66	{
72		cpu_set_input_line(space->machine->cpu[0],INPUT_LINE_NMI,CLEAR_LINE);
	67	cputag_set_input_line(space->machine, "maincpu", INPUT_LINE_NMI, CLEAR_LINE);
73	68	}
74	69
75		static ADDRESS_MAP_START( metlclsh_readmem, ADDRESS_SPACE_PROGRAM, 8 )
76		AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM               )
77		AM_RANGE(0x8000, 0x9fff) AM_READ(sharedram_r            )
78		AM_RANGE(0xa000, 0xbfff) AM_READ(SMH_ROM               )
	70	static ADDRESS_MAP_START( metlclsh_master_map, ADDRESS_SPACE_PROGRAM, 8 )
	71	AM_RANGE(0x0000, 0x7fff) AM_ROM
	72	AM_RANGE(0x8000, 0x9fff) AM_RAM AM_SHARE(1)
	73	AM_RANGE(0xa000, 0xbfff) AM_ROM
79	74	AM_RANGE(0xc000, 0xc000) AM_READ_PORT("IN0")
80	75	AM_RANGE(0xc001, 0xc001) AM_READ_PORT("IN1")
81	76	AM_RANGE(0xc002, 0xc002) AM_READ_PORT("IN2")
82	77	AM_RANGE(0xc003, 0xc003) AM_READ_PORT("DSW")
83		//  AM_RANGE(0xc800, 0xc82f) AM_READ(SMH_RAM                   )   // not actually read
84		//  AM_RANGE(0xcc00, 0xcc2f) AM_READ(SMH_RAM                   )   // ""
85		AM_RANGE(0xd000, 0xd001) AM_DEVREAD("ym1", ym2203_r   )
86		//  AM_RANGE(0xd800, 0xdfff) AM_READ(SMH_RAM                   )   // not actually read
87		AM_RANGE(0xe800, 0xe9ff) AM_READ(SMH_RAM               )
88		AM_RANGE(0xfff0, 0xffff) AM_READ(SMH_ROM               )   // Reset/IRQ vectors
89		ADDRESS_MAP_END
90
91		static ADDRESS_MAP_START( metlclsh_writemem, ADDRESS_SPACE_PROGRAM, 8 )
92		AM_RANGE(0x0000, 0x7fff) AM_WRITE(SMH_ROM               )
93		AM_RANGE(0x8000, 0x9fff) AM_WRITE(sharedram_w) AM_BASE(&sharedram   )
94		AM_RANGE(0xa000, 0xbfff) AM_WRITE(SMH_ROM               )
95		AM_RANGE(0xc080, 0xc080) AM_WRITE(SMH_NOP               )   // ? 0
96		AM_RANGE(0xc0c2, 0xc0c2) AM_WRITE(metlclsh_cause_irq      )   // cause irq on cpu #2
97		AM_RANGE(0xc0c3, 0xc0c3) AM_WRITE(metlclsh_ack_nmi         )   // nmi ack
98		AM_RANGE(0xc800, 0xc82f) AM_WRITE(paletteram_xxxxBBBBGGGGRRRR_split1_w) AM_BASE(&paletteram      )
99		AM_RANGE(0xcc00, 0xcc2f) AM_WRITE(paletteram_xxxxBBBBGGGGRRRR_split2_w) AM_BASE(&paletteram_2   )
100		AM_RANGE(0xd000, 0xd001) AM_DEVWRITE("ym1", ym2203_w   )
	78	AM_RANGE(0xc080, 0xc080) AM_WRITENOP                     // ? 0
	79	AM_RANGE(0xc0c2, 0xc0c2) AM_WRITE(metlclsh_cause_irq)         // cause irq on cpu #2
	80	AM_RANGE(0xc0c3, 0xc0c3) AM_WRITE(metlclsh_ack_nmi)            // nmi ack
	81	/**/AM_RANGE(0xc800, 0xc82f) AM_RAM_WRITE(paletteram_xxxxBBBBGGGGRRRR_split1_w) AM_BASE(&paletteram)
	82	/**/AM_RANGE(0xcc00, 0xcc2f) AM_RAM_WRITE(paletteram_xxxxBBBBGGGGRRRR_split2_w) AM_BASE(&paletteram_2)
	83	AM_RANGE(0xd000, 0xd001) AM_DEVREADWRITE("ym1", ym2203_r,ym2203_w)
	84	/**/AM_RANGE(0xd800, 0xdfff) AM_RAM_WRITE(metlclsh_fgram_w) AM_BASE(&metlclsh_fgram)
101	85	AM_RANGE(0xe000, 0xe001) AM_DEVWRITE("ym2", ym3526_w   )
102		AM_RANGE(0xe800, 0xe9ff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram) AM_SIZE(&spriteram_size   )
103		AM_RANGE(0xd800, 0xdfff) AM_WRITE(metlclsh_fgram_w) AM_BASE(&metlclsh_fgram      )
104		AM_RANGE(0xfff0, 0xffff) AM_WRITE(SMH_ROM               )
	86	AM_RANGE(0xe800, 0xe9ff) AM_RAM AM_BASE(&spriteram) AM_SIZE(&spriteram_size   )
	87	AM_RANGE(0xfff0, 0xffff) AM_ROM                           // Reset/IRQ vectors
105	88	ADDRESS_MAP_END
106	89
107	90
r4679	r4680
113	96
114	97	static WRITE8_HANDLER( metlclsh_cause_nmi2 )
115	98	{
116		cpu_set_input_line(space->machine->cpu[0],INPUT_LINE_NMI,ASSERT_LINE);
	99	cputag_set_input_line(space->machine, "maincpu", INPUT_LINE_NMI, ASSERT_LINE);
117	100	}
118	101
119	102	static WRITE8_HANDLER( metlclsh_ack_irq2 )
120	103	{
121		cpu_set_input_line(space->machine->cpu[1],M6809_IRQ_LINE,CLEAR_LINE);
	104	cputag_set_input_line(space->machine, "sub", M6809_IRQ_LINE, CLEAR_LINE);
122	105	}
123	106
124	107	static WRITE8_HANDLER( metlclsh_ack_nmi2 )
125	108	{
126		cpu_set_input_line(space->machine->cpu[1],INPUT_LINE_NMI,CLEAR_LINE);
	109	cputag_set_input_line(space->machine, "sub", INPUT_LINE_NMI, CLEAR_LINE);
127	110	}
128	111
129	112	static WRITE8_HANDLER( metlclsh_flipscreen_w )
r4679	r4680
131	114	flip_screen_set(space->machine, data & 1);
132	115	}
133	116
134		static ADDRESS_MAP_START( metlclsh_readmem2, ADDRESS_SPACE_PROGRAM, 8 )
135		AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM         )
136		AM_RANGE(0x8000, 0x9fff) AM_READ(sharedram_r      )
137		AM_RANGE(0xc000, 0xc000) AM_READ_PORT("IN0")
	117	static ADDRESS_MAP_START( metlclsh_slave_map, ADDRESS_SPACE_PROGRAM, 8 )
	118	AM_RANGE(0x0000, 0x7fff) AM_ROM
	119	AM_RANGE(0x8000, 0x9fff) AM_RAM AM_SHARE(1)
	120	AM_RANGE(0xc000, 0xc000) AM_READ_PORT("IN0") AM_WRITE(metlclsh_gfxbank_w)   // bg tiles bank
138	121	AM_RANGE(0xc001, 0xc001) AM_READ_PORT("IN1")
139	122	AM_RANGE(0xc002, 0xc002) AM_READ_PORT("IN2")
140	123	AM_RANGE(0xc003, 0xc003) AM_READ_PORT("DSW")
141		AM_RANGE(0xd000, 0xd7ff) AM_READ(SMH_BANK1         )
142		AM_RANGE(0xfff0, 0xffff) AM_READ(SMH_ROM         )   // Reset/IRQ vectors
	124	AM_RANGE(0xc0c0, 0xc0c0) AM_WRITE(metlclsh_cause_nmi2)         // cause nmi on cpu #1
	125	AM_RANGE(0xc0c1, 0xc0c1) AM_WRITE(metlclsh_ack_irq2)         // irq ack
	126	AM_RANGE(0xd000, 0xd7ff) AM_ROMBANK(1) AM_WRITE(metlclsh_bgram_w) AM_BASE(&metlclsh_bgram) // this is banked
	127	AM_RANGE(0xe301, 0xe301) AM_WRITE(metlclsh_flipscreen_w)      // 0/1
	128	AM_RANGE(0xe401, 0xe401) AM_WRITE(metlclsh_rambank_w)
	129	AM_RANGE(0xe402, 0xe403) AM_WRITEONLY AM_BASE(&metlclsh_scrollx)
	130	//  AM_RANGE(0xe404, 0xe404) AM_WRITENOP                            // ? 0
	131	//  AM_RANGE(0xe410, 0xe410) AM_WRITENOP                            // ? 0 on startup only
	132	AM_RANGE(0xe417, 0xe417) AM_WRITE(metlclsh_ack_nmi2)         // nmi ack
	133	AM_RANGE(0xfff0, 0xffff) AM_ROM                           // Reset/IRQ vectors
143	134	ADDRESS_MAP_END
144	135
145		static ADDRESS_MAP_START( metlclsh_writemem2, ADDRESS_SPACE_PROGRAM, 8 )
146		AM_RANGE(0x0000, 0x7fff) AM_WRITE(SMH_ROM                  )
147		AM_RANGE(0x8000, 0x9fff) AM_WRITE(sharedram_w               )
148		AM_RANGE(0xc000, 0xc000) AM_WRITE(metlclsh_gfxbank_w         )   // bg tiles bank
149		AM_RANGE(0xc0c0, 0xc0c0) AM_WRITE(metlclsh_cause_nmi2         )   // cause nmi on cpu #1
150		AM_RANGE(0xc0c1, 0xc0c1) AM_WRITE(metlclsh_ack_irq2            )   // irq ack
151		AM_RANGE(0xd000, 0xd7ff) AM_WRITE(metlclsh_bgram_w) AM_BASE(&metlclsh_bgram   )   // this is banked
152		AM_RANGE(0xe417, 0xe417) AM_WRITE(metlclsh_ack_nmi2            )   // nmi ack
153		AM_RANGE(0xe301, 0xe301) AM_WRITE(metlclsh_flipscreen_w         )   // 0/1
154		AM_RANGE(0xe401, 0xe401) AM_WRITE(metlclsh_rambank_w         )
155		AM_RANGE(0xe402, 0xe403) AM_WRITE(SMH_RAM) AM_BASE(&metlclsh_scrollx   )
156		//  AM_RANGE(0xe404, 0xe404) AM_WRITE(SMH_NOP                      )   // ? 0
157		//  AM_RANGE(0xe410, 0xe410) AM_WRITE(SMH_NOP                      )   // ? 0 on startup only
158		AM_RANGE(0xfff0, 0xffff) AM_WRITE(SMH_ROM                  )
159		ADDRESS_MAP_END
160	136
161
162	137	/***************************************************************************
163	138
164	139	Input Ports
r4679	r4680
287	262
288	263	static void metlclsh_irqhandler(const device_config *device, int linestate)
289	264	{
290		cpu_set_input_line(device->machine->cpu[0],M6809_IRQ_LINE,linestate);
	265	cputag_set_input_line(device->machine, "maincpu", M6809_IRQ_LINE, linestate);
291	266	}
292	267
293	268	static const ym3526_interface ym3526_config =
r4679	r4680
313	288
314	289	/* basic machine hardware */
315	290	MDRV_CPU_ADD("maincpu", M6809, 1500000)        // ?
316		MDRV_CPU_PROGRAM_MAP(metlclsh_readmem, metlclsh_writemem)
	291	MDRV_CPU_PROGRAM_MAP(metlclsh_master_map, 0)
317	292	// IRQ by YM3526, NMI by cpu #2
318	293
319	294	MDRV_CPU_ADD("sub", M6809, 1500000)        // ?
320		MDRV_CPU_PROGRAM_MAP(metlclsh_readmem2, metlclsh_writemem2)
	295	MDRV_CPU_PROGRAM_MAP(metlclsh_slave_map, 0)
321	296	MDRV_CPU_VBLANK_INT_HACK(metlclsh_interrupt2,2)
322	297	// IRQ by cpu #1, NMI by coins insertion
323	298
r4679	r4680
456	431	ROM_END
457	432
458	433	GAME( 1985, metlclsh, 0, metlclsh, metlclsh, 0, ROT0, "Data East", "Metal Clash (Japan)", 0 )
459

src/mame/drivers/88games.c

r4679	r4680
68	68
69	69	static WRITE8_HANDLER( k88games_sh_irqtrigger_w )
70	70	{
71		cpu_set_input_line_and_vector(space->machine->cpu[1], 0, HOLD_LINE, 0xff);
	71	cputag_set_input_line_and_vector(space->machine, "audiocpu", 0, HOLD_LINE, 0xff);
72	72	}
73	73
74	74	static UINT8 speech_chip[8];
r4679	r4680
477	477
478	478	static MACHINE_RESET( 88games )
479	479	{
480		konami_configure_set_lines(machine->cpu[0], k88games_banking);
	480	konami_configure_set_lines(cputag_get_cpu(machine, "maincpu"), k88games_banking);
481	481	paletteram = &memory_region(machine, "maincpu")[0x20000];
482	482	}
483	483

src/mame/drivers/ddenlovr.c

r4679	r4680
159	159	int i;
160	160	for (i = 0; i < 8; i++)
161	161	{
162		ddenlovr_pixmap[i] = auto_malloc(512*512);
	162	ddenlovr_pixmap[i] = auto_alloc_array(machine, UINT8, 512*512);
163	163	ddenlovr_scroll[i*2+0] = ddenlovr_scroll[i*2+1] = 0;
164	164	}
165	165
r4679	r4680
908	908	#endif
909	909	}
910	910
911		cpu_set_input_line_and_vector(machine->cpu[0], 0, HOLD_LINE, irq_vector);
	911	cputag_set_input_line_and_vector(machine, "maincpu", 0, HOLD_LINE, irq_vector);
912	912	break;
913	913
914	914	default:
r4679	r4680
1575	1575	COMBINE_DATA(quiz365_protection + offset);
1576	1576	}
1577	1577
1578		static ADDRESS_MAP_START( quiz365_readmem, ADDRESS_SPACE_PROGRAM, 16 )
1579		AM_RANGE(0x000000, 0x17ffff) AM_READ(SMH_ROM)            // ROM
1580		AM_RANGE(0x200c02, 0x200c03) AM_READ(quiz365_protection_r)   // Protection
1581		AM_RANGE(0x300204, 0x300207) AM_READ(quiz365_input2_r)      //
1582		AM_RANGE(0x300270, 0x300271) AM_READ(unk16_r)            // ? must be 78 on startup (not necessary in ddlover)
1583		AM_RANGE(0x300286, 0x300287) AM_READ(ddenlovr_gfxrom_r)      // Video Chip
1584		AM_RANGE(0x3002c0, 0x3002c1) AM_DEVREAD8("oki", okim6295_r, 0x00ff)            // Sound
1585		AM_RANGE(0x300340, 0x30035f) AM_DEVREAD8("rtc", msm6242_r, 0x00ff)   // 6242RTC
1586		AM_RANGE(0x300384, 0x300385) AM_DEVREAD8("ay", ay8910_r, 0x00ff)
1587		AM_RANGE(0xff0000, 0xffffff) AM_READ(SMH_RAM)            // RAM
1588		ADDRESS_MAP_END
	1578	static ADDRESS_MAP_START( quiz365_map, ADDRESS_SPACE_PROGRAM, 16 )
	1579	AM_RANGE(0x000000, 0x17ffff) AM_ROM                                       // ROM
1589	1580
1590		static ADDRESS_MAP_START( quiz365_writemem, ADDRESS_SPACE_PROGRAM, 16 )
1591		AM_RANGE(0x000000, 0x17ffff) AM_WRITE(SMH_ROM)               // ROM
1592		AM_RANGE(0x200000, 0x2003ff) AM_WRITE(ddenlovr_palette_w)      // Palette
1593		AM_RANGE(0x200e0a, 0x200e0d) AM_WRITE(quiz365_protection_w)      // Protection
1594		//  AM_RANGE(0x201000, 0x2017ff) AM_WRITE(SMH_RAM)                  // ?
	1581	AM_RANGE(0x200000, 0x2003ff) AM_WRITE(ddenlovr_palette_w)                     // Palette
	1582
	1583	AM_RANGE(0x200c02, 0x200c03) AM_READ(quiz365_protection_r)                     // Protection
	1584	AM_RANGE(0x200e0a, 0x200e0d) AM_WRITE(quiz365_protection_w)                     // Protection
	1585	//  AM_RANGE(0x201000, 0x2017ff) AM_WRITE(SMH_RAM)                                      // ?
	1586
1595	1587	AM_RANGE(0x300200, 0x300201) AM_WRITE(ddenlovr_select2_16_w)
1596		AM_RANGE(0x300202, 0x300203) AM_WRITE(quiz365_coincounter_w)   // Coin Counters + more stuff written on startup
	1588	AM_RANGE(0x300202, 0x300203) AM_WRITE(quiz365_coincounter_w)                  // Coin Counters + more stuff written on startup
	1589	AM_RANGE(0x300204, 0x300207) AM_READ(quiz365_input2_r)                        //
	1590
1597	1591	AM_RANGE(0x300240, 0x300247) AM_WRITE(ddenlovr16_palette_base_w)
1598	1592	AM_RANGE(0x300248, 0x30024f) AM_WRITE(ddenlovr16_palette_mask_w)
1599	1593	AM_RANGE(0x300250, 0x300257) AM_WRITE(ddenlovr16_transparency_pen_w)
r4679	r4680
1601	1595	AM_RANGE(0x300268, 0x300269) AM_WRITE(ddenlovr16_bgcolor_w)
1602	1596	AM_RANGE(0x30026a, 0x30026b) AM_WRITE(ddenlovr16_priority_w)
1603	1597	AM_RANGE(0x30026c, 0x30026d) AM_WRITE(ddenlovr16_layer_enable_w)
	1598	AM_RANGE(0x300270, 0x300271) AM_READ(unk16_r)                              // ? must be 78 on startup (not necessary in ddlover)
1604	1599	AM_RANGE(0x300280, 0x300283) AM_WRITE(ddenlovr_blitter_w)
	1600	AM_RANGE(0x300286, 0x300287) AM_READ(ddenlovr_gfxrom_r)                        // Video Chip
	1601
	1602	AM_RANGE(0x3002c0, 0x3002c1) AM_DEVREADWRITE8("oki", okim6295_r, okim6295_w, 0x00ff)// Sound
1605	1603	AM_RANGE(0x300300, 0x300303) AM_DEVWRITE8("ym", ym2413_w, 0x00ff)
1606		AM_RANGE(0x300340, 0x30035f) AM_DEVWRITE8("rtc", msm6242_w, 0x00ff)   // 6242RTC
1607		AM_RANGE(0x3003ca, 0x3003cb) AM_WRITE(ddenlovr_blitter_irq_ack_w)            // Blitter irq acknowledge
	1604	AM_RANGE(0x300340, 0x30035f) AM_DEVREADWRITE8("rtc", msm6242_r, msm6242_w, 0x00ff)   // 6242RTC
1608	1605	AM_RANGE(0x300380, 0x300383) AM_DEVWRITE8("ay", ay8910_address_data_w, 0x00ff)
1609		AM_RANGE(0x3002c0, 0x3002c1) AM_DEVWRITE8("oki", okim6295_w, 0x00ff)
	1606	AM_RANGE(0x300384, 0x300385) AM_DEVREAD8("ay", ay8910_r, 0x00ff)
1610	1607	AM_RANGE(0x3003c2, 0x3003c3) AM_DEVWRITE("oki", quiz365_oki_bank1_w)
	1608	AM_RANGE(0x3003ca, 0x3003cb) AM_WRITE(ddenlovr_blitter_irq_ack_w)               // Blitter irq acknowledge
1611	1609	AM_RANGE(0x3003cc, 0x3003cd) AM_DEVWRITE("oki", quiz365_oki_bank2_w)
1612		AM_RANGE(0xff0000, 0xffffff) AM_WRITE(SMH_RAM)   // RAM
	1610
	1611	AM_RANGE(0xff0000, 0xffffff) AM_RAM                                       // RAM
1613	1612	ADDRESS_MAP_END
1614	1613
1615	1614
r4679	r4680
1639	1638	return ddenlovr_blitter_irq_flag ? 0x03 : 0x00;      // bit 4 = 1 -> blitter busy
1640	1639	}
1641	1640
1642		static ADDRESS_MAP_START( ddenlvrj_readmem, ADDRESS_SPACE_PROGRAM, 16 )
1643		AM_RANGE(0x000000, 0x07ffff) AM_READ(SMH_ROM)               // ROM
1644		AM_RANGE(0x300070, 0x300071) AM_READ(unk16_r)               // ? must be 78 on startup (not necessary in ddlover)
1645		AM_RANGE(0x300086, 0x300087) AM_READ(ddenlovr_gfxrom_r)         // Video Chip
1646		AM_RANGE(0x300100, 0x30011f) AM_DEVREAD8("rtc", msm6242_r,   0x00ff)   // 6242RTC
1647		AM_RANGE(0x300180, 0x300181) AM_READ_PORT("P1")
1648		AM_RANGE(0x300182, 0x300183) AM_READ_PORT("P2")
1649		AM_RANGE(0x300184, 0x300185) AM_READ_PORT("SYSTEM")
1650		AM_RANGE(0x300186, 0x300187) AM_READ(ddenlvrj_dsw_r)         // DSW
1651		AM_RANGE(0x300240, 0x300241) AM_DEVREAD8("oki", okim6295_r, 0x00ff)   // Sound
1652		AM_RANGE(0xff0000, 0xffffff) AM_READ(SMH_RAM)               // RAM
1653		ADDRESS_MAP_END
	1641	static ADDRESS_MAP_START( ddenlvrj_map, ADDRESS_SPACE_PROGRAM, 16 )
	1642	AM_RANGE(0x000000, 0x07ffff) AM_ROM // ROM
1654	1643
1655		static ADDRESS_MAP_START( ddenlvrj_writemem, ADDRESS_SPACE_PROGRAM, 16 )
1656		AM_RANGE(0x000000, 0x07ffff) AM_WRITE(SMH_ROM)               // ROM
1657		AM_RANGE(0x200000, 0x2003ff) AM_WRITE(ddenlovr_palette_w)      // Palette
1658		//  AM_RANGE(0x201000, 0x2017ff) AM_WRITE(SMH_RAM)                  // ? B0 on startup, then 00
	1644	AM_RANGE(0x200000, 0x2003ff) AM_WRITE(ddenlovr_palette_w)                     // Palette
	1645	//  AM_RANGE(0x201000, 0x2017ff) AM_WRITE(SMH_RAM)                                      // ? B0 on startup, then 00
	1646
1659	1647	AM_RANGE(0x300040, 0x300047) AM_WRITE(ddenlovr16_palette_base_w)
1660	1648	AM_RANGE(0x300048, 0x30004f) AM_WRITE(ddenlovr16_palette_mask_w)
1661	1649	AM_RANGE(0x300050, 0x300057) AM_WRITE(ddenlovr16_transparency_pen_w)
r4679	r4680
1663	1651	AM_RANGE(0x300068, 0x300069) AM_WRITE(ddenlovr16_bgcolor_w)
1664	1652	AM_RANGE(0x30006a, 0x30006b) AM_WRITE(ddenlovr16_priority_w)
1665	1653	AM_RANGE(0x30006c, 0x30006d) AM_WRITE(ddenlovr16_layer_enable_w)
	1654	AM_RANGE(0x300070, 0x300071) AM_READ(unk16_r)                              // ? must be 78 on startup (not necessary in ddlover)
1666	1655	AM_RANGE(0x300080, 0x300083) AM_WRITE(ddenlovr_blitter_w)
	1656	AM_RANGE(0x300086, 0x300087) AM_READ(ddenlovr_gfxrom_r)                        // Video Chip
1667	1657	AM_RANGE(0x3000c0, 0x3000c3) AM_DEVWRITE8("ym", ym2413_w, 0x00ff)
1668		AM_RANGE(0x300100, 0x30011f) AM_DEVWRITE8("rtc", msm6242_w, 0x00ff)   // 6242RTC
	1658	AM_RANGE(0x300100, 0x30011f) AM_DEVREADWRITE8("rtc", msm6242_r, msm6242_w, 0x00ff)   // 6242RTC
1669	1659	AM_RANGE(0x300140, 0x300143) AM_DEVWRITE8("ay", ay8910_address_data_w, 0x00ff)
1670		AM_RANGE(0x300188, 0x300189) AM_WRITE(ddenlvrj_coincounter_w)               // Coin Counters
1671		AM_RANGE(0x30018a, 0x30018b) AM_WRITE(SMH_RAM) AM_BASE( &ddenlvrj_dsw_sel )      // DSW select
	1660	AM_RANGE(0x300180, 0x300181) AM_READ_PORT("P1")
	1661	AM_RANGE(0x300182, 0x300183) AM_READ_PORT("P2")
	1662	AM_RANGE(0x300184, 0x300185) AM_READ_PORT("SYSTEM")
	1663	AM_RANGE(0x300186, 0x300187) AM_READ(ddenlvrj_dsw_r)                        // DSW
	1664	AM_RANGE(0x300188, 0x300189) AM_WRITE(ddenlvrj_coincounter_w)                  // Coin Counters
	1665	AM_RANGE(0x30018a, 0x30018b) AM_WRITE(SMH_RAM) AM_BASE( &ddenlvrj_dsw_sel )         // DSW select
1672	1666	AM_RANGE(0x30018c, 0x30018d) AM_DEVWRITE("oki", ddenlovr_oki_bank_w)
1673		AM_RANGE(0x3001ca, 0x3001cb) AM_WRITE(ddenlovr_blitter_irq_ack_w)            // Blitter irq acknowledge
1674		AM_RANGE(0x300240, 0x300241) AM_DEVWRITE8("oki", okim6295_w, 0x00ff)
1675		AM_RANGE(0xff0000, 0xffffff) AM_WRITE(SMH_RAM)                           // RAM
	1667	AM_RANGE(0x3001ca, 0x3001cb) AM_WRITE(ddenlovr_blitter_irq_ack_w)               // Blitter irq acknowledge
	1668	AM_RANGE(0x300240, 0x300241) AM_DEVREADWRITE8("oki", okim6295_r, okim6295_w, 0x00ff)// Sound
	1669	AM_RANGE(0xff0000, 0xffffff) AM_RAM                                       // RAM
1676	1670	ADDRESS_MAP_END
1677	1671
1678	1672
r4679	r4680
1700	1694	okim6295_set_bank_base(devtag_get_device(space->machine, "oki"), ((*ddenlvrk_protection2)&0x7) * 0x40000);
1701	1695	}
1702	1696
1703		static ADDRESS_MAP_START( ddenlvrk_readmem, ADDRESS_SPACE_PROGRAM, 16 )
1704		AM_RANGE(0x000000, 0x07ffff) AM_READ(SMH_ROM)               // ROM
1705		AM_RANGE(0xe00086, 0xe00087) AM_READ(ddenlovr_gfxrom_r)         // Video Chip
1706		AM_RANGE(0xe00070, 0xe00071) AM_READNOP
1707		AM_RANGE(0xe00100, 0xe00101) AM_READ_PORT("P1")
1708		AM_RANGE(0xe00102, 0xe00103) AM_READ_PORT("P2")
1709		AM_RANGE(0xe00104, 0xe00105) AM_READ_PORT("SYSTEM")
1710		AM_RANGE(0xe00200, 0xe00201) AM_READ_PORT("DSW")
1711		AM_RANGE(0xe00500, 0xe0051f) AM_DEVREAD8("rtc", msm6242_r,   0x00ff)   // 6242RTC
1712		AM_RANGE(0xe00604, 0xe00605) AM_DEVREAD8("ay", ay8910_r, 0x00ff)
1713		AM_RANGE(0xe00700, 0xe00701) AM_DEVREAD8("oki", okim6295_r, 0x00ff)   // Sound
1714		AM_RANGE(0xff0000, 0xffffff) AM_READ(SMH_RAM)               // RAM
1715		ADDRESS_MAP_END
	1697	static ADDRESS_MAP_START( ddenlvrk_map, ADDRESS_SPACE_PROGRAM, 16 )
	1698	AM_RANGE(0x000000, 0x07ffff) AM_ROM                                          // ROM
1716	1699
1717		static ADDRESS_MAP_START( ddenlvrk_writemem, ADDRESS_SPACE_PROGRAM, 16 )
1718		AM_RANGE(0x000000, 0x07ffff) AM_WRITE(SMH_ROM)                  // ROM
1719
1720	1700	AM_RANGE(0x100000, 0x100001) AM_READWRITE(ddenlvrk_protection1_r, SMH_RAM)               AM_BASE(&ddenlvrk_protection1)
1721	1701	AM_RANGE(0x200000, 0x200001) AM_READWRITE(ddenlvrk_protection2_r, ddenlvrk_protection2_w)   AM_BASE(&ddenlvrk_protection2)
1722	1702
1723		AM_RANGE(0xd00000, 0xd003ff) AM_WRITE(ddenlovr_palette_w)         // Palette
1724		//  AM_RANGE(0xd01000, 0xd017ff) SMH_RAM)                               // ? B0 on startup, then 00
	1703	AM_RANGE(0xd00000, 0xd003ff) AM_WRITE(ddenlovr_palette_w)                        // Palette
	1704	//  AM_RANGE(0xd01000, 0xd017ff) SMH_RAM)                                                   // ? B0 on startup, then 00
	1705
1725	1706	AM_RANGE(0xe00040, 0xe00047) AM_WRITE(ddenlovr16_palette_base_w)
1726	1707	AM_RANGE(0xe00048, 0xe0004f) AM_WRITE(ddenlovr16_palette_mask_w)
1727	1708	AM_RANGE(0xe00050, 0xe00057) AM_WRITE(ddenlovr16_transparency_pen_w)
r4679	r4680
1729	1710	AM_RANGE(0xe00068, 0xe00069) AM_WRITE(ddenlovr16_bgcolor_w)
1730	1711	AM_RANGE(0xe0006a, 0xe0006b) AM_WRITE(ddenlovr16_priority_w)
1731	1712	AM_RANGE(0xe0006c, 0xe0006d) AM_WRITE(ddenlovr16_layer_enable_w)
	1713	AM_RANGE(0xe00070, 0xe00071) AM_READNOP
1732	1714	AM_RANGE(0xe00080, 0xe00083) AM_WRITE(ddenlovr_blitter_w)
1733		AM_RANGE(0xe00302, 0xe00303) AM_WRITE(ddenlovr_blitter_irq_ack_w)   // Blitter irq acknowledge
1734		AM_RANGE(0xe00308, 0xe00309) AM_WRITE(ddenlovr_coincounter_0_w)      // Coin Counters
1735		AM_RANGE(0xe0030c, 0xe0030d) AM_WRITE(ddenlovr_coincounter_1_w)      //
1736		AM_RANGE(0xe00400, 0xe00403) AM_DEVWRITE8("ym", ym2413_w, 0x00ff)
1737		AM_RANGE(0xe00500, 0xe0051f) AM_DEVWRITE8("rtc", msm6242_w, 0x00ff)   // 6242RTC
1738		//  AM_RANGE(0xe00302, 0xe00303) AM_WRITENOP                      // ?
1739		AM_RANGE(0xe00600, 0xe00603) AM_DEVWRITE8("ay", ay8910_address_data_w, 0x00ff)
1740		AM_RANGE(0xe00700, 0xe00701) AM_DEVWRITE8("oki", okim6295_w, 0x00ff)
1741		AM_RANGE(0xff0000, 0xffffff) AM_WRITE(SMH_RAM)                  // RAM
1742		ADDRESS_MAP_END
	1715	AM_RANGE(0xe00086, 0xe00087) AM_READ(ddenlovr_gfxrom_r)                           // Video Chip
1743	1716
1744
1745
1746
1747		static ADDRESS_MAP_START( ddenlovr_readmem, ADDRESS_SPACE_PROGRAM, 16 )
1748		AM_RANGE(0x000000, 0x07ffff) AM_READ(SMH_ROM)               // ROM
1749		AM_RANGE(0xe00086, 0xe00087) AM_READ(ddenlovr_gfxrom_r)         // Video Chip
1750		AM_RANGE(0xe00070, 0xe00071) AM_READ(unk16_r)               // ? must be 78 on startup (not necessary in ddlover)
1751	1717	AM_RANGE(0xe00100, 0xe00101) AM_READ_PORT("P1")
1752	1718	AM_RANGE(0xe00102, 0xe00103) AM_READ_PORT("P2")
1753	1719	AM_RANGE(0xe00104, 0xe00105) AM_READ_PORT("SYSTEM")
1754	1720	AM_RANGE(0xe00200, 0xe00201) AM_READ_PORT("DSW")
1755		AM_RANGE(0xe00500, 0xe0051f) AM_DEVREAD8("rtc", msm6242_r,   0x00ff)   // 6242RTC
	1721	AM_RANGE(0xe00302, 0xe00303) AM_WRITE(ddenlovr_blitter_irq_ack_w)                  // Blitter irq acknowledge
	1722	AM_RANGE(0xe00308, 0xe00309) AM_WRITE(ddenlovr_coincounter_0_w)                     // Coin Counters
	1723	AM_RANGE(0xe0030c, 0xe0030d) AM_WRITE(ddenlovr_coincounter_1_w)                     //
	1724
	1725	AM_RANGE(0xe00400, 0xe00403) AM_DEVWRITE8("ym", ym2413_w, 0x00ff)
	1726	AM_RANGE(0xe00500, 0xe0051f) AM_DEVREADWRITE8("rtc", msm6242_r,   msm6242_w, 0x00ff)      // 6242RTC
	1727	AM_RANGE(0xe00600, 0xe00603) AM_DEVWRITE8("ay", ay8910_address_data_w, 0x00ff)
1756	1728	AM_RANGE(0xe00604, 0xe00605) AM_DEVREAD8("ay", ay8910_r, 0x00ff)
1757		AM_RANGE(0xe00700, 0xe00701) AM_DEVREAD8("oki", okim6295_r, 0x00ff)   // Sound
1758		AM_RANGE(0xff0000, 0xffffff) AM_READ(SMH_RAM)               // RAM
	1729	AM_RANGE(0xe00700, 0xe00701) AM_DEVREADWRITE8("oki", okim6295_r, okim6295_w, 0x00ff)   // Sound
	1730	AM_RANGE(0xff0000, 0xffffff) AM_RAM                                          // RAM
1759	1731	ADDRESS_MAP_END
1760	1732
1761		static ADDRESS_MAP_START( ddenlovr_writemem, ADDRESS_SPACE_PROGRAM, 16 )
1762		AM_RANGE(0x000000, 0x07ffff) AM_WRITE(SMH_ROM)                  // ROM
	1733
	1734
	1735
	1736	static ADDRESS_MAP_START( ddenlovr_map, ADDRESS_SPACE_PROGRAM, 16 )
	1737	AM_RANGE(0x000000, 0x07ffff) AM_ROM                                          // ROM
	1738
1763	1739	AM_RANGE(0x300000, 0x300001) AM_DEVWRITE("oki", ddenlovr_oki_bank_w)
1764		AM_RANGE(0xd00000, 0xd003ff) AM_WRITE(ddenlovr_palette_w)         // Palette
1765		//  AM_RANGE(0xd01000, 0xd017ff) SMH_RAM)                               // ? B0 on startup, then 00
	1740
	1741	AM_RANGE(0xd00000, 0xd003ff) AM_WRITE(ddenlovr_palette_w)                        // Palette
	1742	//  AM_RANGE(0xd01000, 0xd017ff) SMH_RAM)                                                   // ? B0 on startup, then 00
	1743
1766	1744	AM_RANGE(0xe00040, 0xe00047) AM_WRITE(ddenlovr16_palette_base_w)
1767	1745	AM_RANGE(0xe00048, 0xe0004f) AM_WRITE(ddenlovr16_palette_mask_w)
1768	1746	AM_RANGE(0xe00050, 0xe00057) AM_WRITE(ddenlovr16_transparency_pen_w)
r4679	r4680
1770	1748	AM_RANGE(0xe00068, 0xe00069) AM_WRITE(ddenlovr16_bgcolor_w)
1771	1749	AM_RANGE(0xe0006a, 0xe0006b) AM_WRITE(ddenlovr16_priority_w)
1772	1750	AM_RANGE(0xe0006c, 0xe0006d) AM_WRITE(ddenlovr16_layer_enable_w)
	1751	AM_RANGE(0xe00070, 0xe00071) AM_READ(unk16_r)                                 // ? must be 78 on startup (not necessary in ddlover)
1773	1752	AM_RANGE(0xe00080, 0xe00083) AM_WRITE(ddenlovr_blitter_w)
1774		AM_RANGE(0xe00302, 0xe00303) AM_WRITE(ddenlovr_blitter_irq_ack_w)   // Blitter irq acknowledge
1775		AM_RANGE(0xe00308, 0xe00309) AM_WRITE(ddenlovr_coincounter_0_w)      // Coin Counters
1776		AM_RANGE(0xe0030c, 0xe0030d) AM_WRITE(ddenlovr_coincounter_1_w)      //
	1753	AM_RANGE(0xe00086, 0xe00087) AM_READ(ddenlovr_gfxrom_r)                           // Video Chip
	1754
	1755	AM_RANGE(0xe00100, 0xe00101) AM_READ_PORT("P1")
	1756	AM_RANGE(0xe00102, 0xe00103) AM_READ_PORT("P2")
	1757	AM_RANGE(0xe00104, 0xe00105) AM_READ_PORT("SYSTEM")
	1758	AM_RANGE(0xe00200, 0xe00201) AM_READ_PORT("DSW")
	1759	AM_RANGE(0xe00302, 0xe00303) AM_WRITE(ddenlovr_blitter_irq_ack_w)                  // Blitter irq acknowledge
	1760	AM_RANGE(0xe00308, 0xe00309) AM_WRITE(ddenlovr_coincounter_0_w)                     // Coin Counters
	1761	AM_RANGE(0xe0030c, 0xe0030d) AM_WRITE(ddenlovr_coincounter_1_w)                     //
	1762
1777	1763	AM_RANGE(0xe00400, 0xe00403) AM_DEVWRITE8("ym", ym2413_w, 0x00ff)
1778		AM_RANGE(0xe00500, 0xe0051f) AM_DEVWRITE8("rtc", msm6242_w, 0x00ff)   // 6242RTC
1779		//  AM_RANGE(0xe00302, 0xe00303) AM_WRITENOP                      // ?
	1764	AM_RANGE(0xe00500, 0xe0051f) AM_DEVREADWRITE8("rtc", msm6242_r, msm6242_w, 0x00ff)      // 6242RTC
1780	1765	AM_RANGE(0xe00600, 0xe00603) AM_DEVWRITE8("ay", ay8910_address_data_w, 0x00ff)
1781		AM_RANGE(0xe00700, 0xe00701) AM_DEVWRITE8("oki", okim6295_w, 0x00ff)
1782		AM_RANGE(0xff0000, 0xffffff) AM_WRITE(SMH_RAM)                  // RAM
	1766	AM_RANGE(0xe00604, 0xe00605) AM_DEVREAD8("ay", ay8910_r, 0x00ff)
	1767	AM_RANGE(0xe00700, 0xe00701) AM_DEVREADWRITE8("oki", okim6295_r, okim6295_w, 0x00ff)   // Sound
	1768	AM_RANGE(0xff0000, 0xffffff) AM_RAM                                          // RAM
1783	1769	ADDRESS_MAP_END
1784	1770
1785	1771
r4679	r4680
1830	1816	okim6295_set_bank_base(device, (data & 3) * 0x40000);
1831	1817	}
1832	1818
1833		static ADDRESS_MAP_START( nettoqc_readmem, ADDRESS_SPACE_PROGRAM, 16 )
1834		AM_RANGE(0x000000, 0x17ffff) AM_READ(SMH_ROM)            // ROM
1835		AM_RANGE(0x200c02, 0x200c03) AM_READ(nettoqc_protection_r)   //
1836		AM_RANGE(0x300070, 0x300071) AM_READ(unk16_r)            // ? must be 78 on startup (not necessary in ddlover)
1837		AM_RANGE(0x300086, 0x300087) AM_READ(ddenlovr_gfxrom_r)      // Video Chip
1838		AM_RANGE(0x300100, 0x30011f) AM_DEVREAD8("rtc", msm6242_r,   0x00ff)   // 6242RTC
1839		AM_RANGE(0x300180, 0x300181) AM_READ_PORT("P1")
1840		AM_RANGE(0x300182, 0x300183) AM_READ_PORT("P2")
1841		AM_RANGE(0x300184, 0x300185) AM_READ_PORT("SYSTEM")
1842		AM_RANGE(0x300186, 0x300187) AM_READ(nettoqc_input_r)      // DSW's
1843		AM_RANGE(0x300240, 0x300241) AM_DEVREAD8("oki", okim6295_r, 0x00ff)   // Sound
1844		AM_RANGE(0xff0000, 0xffffff) AM_READ(SMH_RAM)            // RAM
1845		ADDRESS_MAP_END
	1819	static ADDRESS_MAP_START( nettoqc_map, ADDRESS_SPACE_PROGRAM, 16 )
	1820	AM_RANGE(0x000000, 0x17ffff) AM_ROM                                          // ROM
1846	1821
1847		static ADDRESS_MAP_START( nettoqc_writemem, ADDRESS_SPACE_PROGRAM, 16 )
1848		AM_RANGE(0x000000, 0x17ffff) AM_WRITE(SMH_ROM)            // ROM
1849		AM_RANGE(0x200000, 0x2003ff) AM_WRITE(ddenlovr_palette_w)   // Palette
1850		AM_RANGE(0x200e0a, 0x200e0d) AM_WRITE(SMH_RAM) AM_BASE(&nettoqc_protection_val)   //
1851		AM_RANGE(0x201000, 0x2017ff) AM_WRITE(SMH_RAM)            // ?
	1822	AM_RANGE(0x200000, 0x2003ff) AM_WRITE(ddenlovr_palette_w)                        // Palette
	1823	AM_RANGE(0x200c02, 0x200c03) AM_READ(nettoqc_protection_r)                        //
	1824	AM_RANGE(0x200e0a, 0x200e0d) AM_WRITE(SMH_RAM) AM_BASE(&nettoqc_protection_val)         //
	1825	AM_RANGE(0x201000, 0x2017ff) AM_WRITE(SMH_RAM)                                 // ?
	1826
1852	1827	AM_RANGE(0x300040, 0x300047) AM_WRITE(ddenlovr16_palette_base_w)
1853	1828	AM_RANGE(0x300048, 0x30004f) AM_WRITE(ddenlovr16_palette_mask_w)
1854	1829	AM_RANGE(0x300050, 0x300057) AM_WRITE(ddenlovr16_transparency_pen_w)
r4679	r4680
1856	1831	AM_RANGE(0x300068, 0x300069) AM_WRITE(ddenlovr16_bgcolor_w)
1857	1832	AM_RANGE(0x30006a, 0x30006b) AM_WRITE(ddenlovr16_priority_w)
1858	1833	AM_RANGE(0x30006c, 0x30006d) AM_WRITE(ddenlovr16_layer_enable_w)
	1834	AM_RANGE(0x300070, 0x300071) AM_READ(unk16_r)                                 // ? must be 78 on startup (not necessary in ddlover)
1859	1835	AM_RANGE(0x300080, 0x300083) AM_WRITE(ddenlovr_blitter_w)
	1836	AM_RANGE(0x300086, 0x300087) AM_READ(ddenlovr_gfxrom_r)                           // Video Chip
1860	1837	AM_RANGE(0x3000c0, 0x3000c3) AM_DEVWRITE8("ym", ym2413_w, 0x00ff)
1861		AM_RANGE(0x300100, 0x30011f) AM_DEVWRITE8("rtc", msm6242_w, 0x00ff)   // 6242RTC
	1838	AM_RANGE(0x300100, 0x30011f) AM_DEVREADWRITE8("rtc", msm6242_r, msm6242_w, 0x00ff)      // 6242RTC
1862	1839	AM_RANGE(0x300140, 0x300143) AM_DEVWRITE8("ay", ay8910_address_data_w, 0x00ff)
1863		AM_RANGE(0x300188, 0x300189) AM_WRITE(nettoqc_coincounter_w)   // Coin Counters
1864		AM_RANGE(0x30018a, 0x30018b) AM_WRITE(ddenlovr_select_16_w)      //
	1840	AM_RANGE(0x300180, 0x300181) AM_READ_PORT("P1")
	1841	AM_RANGE(0x300182, 0x300183) AM_READ_PORT("P2")
	1842	AM_RANGE(0x300184, 0x300185) AM_READ_PORT("SYSTEM")
	1843	AM_RANGE(0x300186, 0x300187) AM_READ(nettoqc_input_r)                           // DSW's
	1844	AM_RANGE(0x300188, 0x300189) AM_WRITE(nettoqc_coincounter_w)                     // Coin Counters
	1845	AM_RANGE(0x30018a, 0x30018b) AM_WRITE(ddenlovr_select_16_w)                        //
1865	1846	AM_RANGE(0x30018c, 0x30018d) AM_DEVWRITE("oki", nettoqc_oki_bank_w)
1866		AM_RANGE(0x3001ca, 0x3001cb) AM_WRITE(ddenlovr_blitter_irq_ack_w)   // Blitter irq acknowledge
1867		AM_RANGE(0x300240, 0x300241) AM_DEVWRITE8("oki", okim6295_w, 0x00ff)
1868		AM_RANGE(0xff0000, 0xffffff) AM_WRITE(SMH_RAM)               // RAM
	1847	AM_RANGE(0x3001ca, 0x3001cb) AM_WRITE(ddenlovr_blitter_irq_ack_w)                  // Blitter irq acknowledge
	1848	AM_RANGE(0x300240, 0x300241) AM_DEVREADWRITE8("oki", okim6295_r, okim6295_w, 0x00ff)   // Sound
	1849	AM_RANGE(0xff0000, 0xffffff) AM_RAM                                          // RAM
1869	1850	ADDRESS_MAP_END
1870	1851
1871	1852
r4679	r4680
1897	1878	}
1898	1879
1899	1880
1900		static ADDRESS_MAP_START( quizchq_readmem, ADDRESS_SPACE_PROGRAM, 8 )
1901		AM_RANGE(0x0000, 0x5fff) AM_READ(SMH_ROM)   // ROM
1902		AM_RANGE(0x6000, 0x6fff) AM_READ(SMH_RAM)   // RAM
1903		AM_RANGE(0x7000, 0x7fff) AM_READ(SMH_BANK2)   // RAM (Banked)
1904		AM_RANGE(0x8000, 0xffff) AM_READ(SMH_BANK1)   // ROM (Banked)
	1881	static ADDRESS_MAP_START( quizchq_map, ADDRESS_SPACE_PROGRAM, 8 )
	1882	AM_RANGE(0x0000, 0x5fff) AM_ROM                                 // ROM
	1883	AM_RANGE(0x6000, 0x6fff) AM_RAM                                 // RAM
	1884	AM_RANGE(0x7000, 0x7fff) AM_RAMBANK(2)                           // RAM (Banked)
	1885	AM_RANGE(0x8000, 0xffff) AM_ROMBANK(1) AM_WRITE(rongrong_palette_w)      // ROM (Banked)
1905	1886	ADDRESS_MAP_END
1906	1887
1907		static ADDRESS_MAP_START( quizchq_writemem, ADDRESS_SPACE_PROGRAM, 8 )
1908		AM_RANGE(0x6000, 0x6fff) AM_WRITE(SMH_RAM)      // RAM
1909		AM_RANGE(0x7000, 0x7fff) AM_WRITE(SMH_BANK2)   // RAM (Banked)
1910		AM_RANGE(0x8000, 0x81ff) AM_WRITE(rongrong_palette_w)
1911		ADDRESS_MAP_END
1912
1913		static ADDRESS_MAP_START( quizchq_readport, ADDRESS_SPACE_IO, 8 )   ADDRESS_MAP_GLOBAL_MASK(0xff)
	1888	static ADDRESS_MAP_START( quizchq_portmap, ADDRESS_SPACE_IO, 8 )   ADDRESS_MAP_GLOBAL_MASK(0xff)
	1889	AM_RANGE(0x00, 0x01) AM_WRITE(rongrong_blitter_w)
1914	1890	AM_RANGE(0x03, 0x03) AM_READ(rongrong_gfxrom_r)
1915		AM_RANGE(0x1b, 0x1b) AM_READ(rongrong_blitter_busy_r)
1916		AM_RANGE(0x1c, 0x1c) AM_READ(rongrong_input_r)
1917		AM_RANGE(0x22, 0x23) AM_READ(rongrong_input2_r)
1918		AM_RANGE(0x40, 0x40) AM_DEVREAD("oki", okim6295_r)
1919		AM_RANGE(0x98, 0x98) AM_READ(unk_r)                     // ? must be 78 on startup
1920		AM_RANGE(0xa0, 0xaf) AM_DEVREAD("rtc", msm6242_r)   // 6242RTC
1921		ADDRESS_MAP_END
	1891	AM_RANGE(0x1b, 0x1b) AM_READWRITE(rongrong_blitter_busy_r, rongrong_blitter_busy_w)
1922	1892
1923		static ADDRESS_MAP_START( quizchq_writeport, ADDRESS_SPACE_IO, 8 )   ADDRESS_MAP_GLOBAL_MASK(0xff)
1924		AM_RANGE(0x00, 0x01) AM_WRITE(rongrong_blitter_w)
1925		AM_RANGE(0x1b, 0x1b) AM_WRITE(rongrong_blitter_busy_w)
	1893	AM_RANGE(0x1c, 0x1c) AM_READ(rongrong_input_r)
1926	1894	AM_RANGE(0x1e, 0x1e) AM_WRITE(rongrong_select_w)
1927	1895	AM_RANGE(0x20, 0x20) AM_WRITE(ddenlovr_select2_w)
1928		AM_RANGE(0x40, 0x40) AM_DEVWRITE("oki", okim6295_w)
	1896	AM_RANGE(0x22, 0x23) AM_READ(rongrong_input2_r)
	1897
	1898	AM_RANGE(0x40, 0x40) AM_DEVREADWRITE("oki", okim6295_r, okim6295_w)
1929	1899	AM_RANGE(0x60, 0x61) AM_DEVWRITE("ym", ym2413_w)
	1900
1930	1901	AM_RANGE(0x80, 0x83) AM_WRITE(ddenlovr_palette_base_w)
1931	1902	AM_RANGE(0x84, 0x87) AM_WRITE(ddenlovr_palette_mask_w)
1932	1903	AM_RANGE(0x88, 0x8b) AM_WRITE(ddenlovr_transparency_pen_w)
r4679	r4680
1934	1905	AM_RANGE(0x94, 0x94) AM_WRITE(ddenlovr_bgcolor_w)
1935	1906	AM_RANGE(0x95, 0x95) AM_WRITE(ddenlovr_priority_w)
1936	1907	AM_RANGE(0x96, 0x96) AM_WRITE(ddenlovr_layer_enable_w)
1937		AM_RANGE(0xa0, 0xaf) AM_DEVWRITE("rtc", msm6242_w)   // 6242RTC
	1908	AM_RANGE(0x98, 0x98) AM_READ(unk_r)                     // ? must be 78 on startup
	1909
	1910	AM_RANGE(0xa0, 0xaf) AM_DEVREADWRITE("rtc", msm6242_r, msm6242_w)   // 6242RTC
1938	1911	AM_RANGE(0xc0, 0xc0) AM_DEVWRITE("oki", quizchq_oki_bank_w)
1939	1912	AM_RANGE(0xc2, 0xc2) AM_WRITENOP                  // enables palette RAM at 8000
1940	1913	ADDRESS_MAP_END
1941	1914
1942	1915
1943	1916
1944		static ADDRESS_MAP_START( rongrong_readmem, ADDRESS_SPACE_PROGRAM, 8 )
1945		AM_RANGE(0x0000, 0x5fff) AM_READ(SMH_ROM)   // ROM
1946		AM_RANGE(0x6000, 0x6fff) AM_READ(SMH_RAM)   // RAM
1947		AM_RANGE(0x7000, 0x7fff) AM_READ(SMH_BANK2)   // RAM (Banked)
1948		AM_RANGE(0x8000, 0xffff) AM_READ(SMH_BANK1)   // ROM (Banked)
	1917	static ADDRESS_MAP_START( rongrong_map, ADDRESS_SPACE_PROGRAM, 8 )
	1918	AM_RANGE(0x0000, 0x5fff) AM_ROM                                 // ROM
	1919	AM_RANGE(0x6000, 0x6fff) AM_RAM                                 // RAM
	1920	AM_RANGE(0x7000, 0x7fff) AM_RAMBANK(2)                           // RAM (Banked)
	1921	AM_RANGE(0x8000, 0xffff) AM_ROMBANK(1) AM_WRITE(rongrong_palette_w)      // ROM (Banked)
1949	1922	ADDRESS_MAP_END
1950	1923
1951		static ADDRESS_MAP_START( rongrong_writemem, ADDRESS_SPACE_PROGRAM, 8 )
1952		AM_RANGE(0x6000, 0x6fff) AM_WRITE(SMH_RAM)      // RAM
1953		AM_RANGE(0x7000, 0x7fff) AM_WRITE(SMH_BANK2)   // RAM (Banked)
1954		AM_RANGE(0xf000, 0xf1ff) AM_WRITE(rongrong_palette_w)
1955		ADDRESS_MAP_END
1956
1957		static ADDRESS_MAP_START( rongrong_readport, ADDRESS_SPACE_IO, 8 )   ADDRESS_MAP_GLOBAL_MASK(0xff)
	1924	static ADDRESS_MAP_START( rongrong_portmap, ADDRESS_SPACE_IO, 8 )   ADDRESS_MAP_GLOBAL_MASK(0xff)
	1925	AM_RANGE(0x00, 0x01) AM_WRITE(rongrong_blitter_w)
1958	1926	AM_RANGE(0x03, 0x03) AM_READ(rongrong_gfxrom_r)
1959		AM_RANGE(0x1b, 0x1b) AM_READ(rongrong_blitter_busy_r)
1960		AM_RANGE(0x1c, 0x1c) AM_READ(rongrong_input_r)
1961		AM_RANGE(0x20, 0x2f) AM_DEVREAD("rtc", msm6242_r)   // 6242RTC
1962		AM_RANGE(0x40, 0x40) AM_DEVREAD("oki", okim6295_r)
1963		AM_RANGE(0x98, 0x98) AM_READ(unk_r)                     // ? must be 78 on startup
1964		AM_RANGE(0xa2, 0xa3) AM_READ(rongrong_input2_r)
1965		ADDRESS_MAP_END
	1927	AM_RANGE(0x1b, 0x1b) AM_READWRITE(rongrong_blitter_busy_r, rongrong_blitter_busy_w)
1966	1928
1967		static ADDRESS_MAP_START( rongrong_writeport, ADDRESS_SPACE_IO, 8 )   ADDRESS_MAP_GLOBAL_MASK(0xff)
1968		AM_RANGE(0x00, 0x01) AM_WRITE(rongrong_blitter_w)
1969		AM_RANGE(0x1b, 0x1b) AM_WRITE(rongrong_blitter_busy_w)
	1929	AM_RANGE(0x1c, 0x1c) AM_READ(rongrong_input_r)
1970	1930	AM_RANGE(0x1e, 0x1e) AM_WRITE(rongrong_select_w)
1971		AM_RANGE(0x20, 0x2f) AM_DEVWRITE("rtc", msm6242_w)   // 6242RTC
1972		AM_RANGE(0x40, 0x40) AM_DEVWRITE("oki", okim6295_w)
	1931
	1932	AM_RANGE(0x20, 0x2f) AM_DEVREADWRITE("rtc", msm6242_r, msm6242_w)   // 6242RTC
	1933	AM_RANGE(0x40, 0x40) AM_DEVREADWRITE("oki", okim6295_r, okim6295_w)
1973	1934	AM_RANGE(0x60, 0x61) AM_DEVWRITE("ym", ym2413_w)
	1935
1974	1936	AM_RANGE(0x80, 0x83) AM_WRITE(ddenlovr_palette_base_w)
1975	1937	AM_RANGE(0x84, 0x87) AM_WRITE(ddenlovr_palette_mask_w)
1976	1938	AM_RANGE(0x88, 0x8b) AM_WRITE(ddenlovr_transparency_pen_w)
r4679	r4680
1978	1940	AM_RANGE(0x94, 0x94) AM_WRITE(ddenlovr_bgcolor_w)
1979	1941	AM_RANGE(0x95, 0x95) AM_WRITE(ddenlovr_priority_w)
1980	1942	AM_RANGE(0x96, 0x96) AM_WRITE(ddenlovr_layer_enable_w)
	1943	AM_RANGE(0x98, 0x98) AM_READ(unk_r)                           // ? must be 78 on startup
	1944
1981	1945	AM_RANGE(0xa0, 0xa0) AM_WRITE(ddenlovr_select2_w)
1982		AM_RANGE(0xc2, 0xc2) AM_WRITENOP   // enables palette RAM at f000, and protection device at f705/f706/f601
	1946	AM_RANGE(0xa2, 0xa3) AM_READ(rongrong_input2_r)
	1947	AM_RANGE(0xc2, 0xc2) AM_WRITENOP                           // enables palette RAM at f000, and protection device at f705/f706/f601
1983	1948	ADDRESS_MAP_END
1984	1949	/*
1985	1950	1e input select,1c input read
r4679	r4680
2009	1974	static WRITE8_HANDLER( mmpanic_soundlatch_w )
2010	1975	{
2011	1976	soundlatch_w(space,0,data);
2012		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_NMI, PULSE_LINE);
	1977	cputag_set_input_line(space->machine, "soundcpu", INPUT_LINE_NMI, PULSE_LINE);
2013	1978	}
2014	1979
2015	1980	static WRITE8_HANDLER( mmpanic_blitter_w )
r4679	r4680
2057	2022
2058	2023	/* Main CPU */
2059	2024
2060		static ADDRESS_MAP_START( mmpanic_readmem, ADDRESS_SPACE_PROGRAM, 8 )
2061		AM_RANGE(0x0051, 0x0051) AM_READ(magic_r)   // ?
2062		AM_RANGE(0x0000, 0x5fff) AM_READ(SMH_ROM)   // ROM
2063		AM_RANGE(0x6000, 0x6fff) AM_READ(SMH_RAM)   // RAM
2064		AM_RANGE(0x7000, 0x7fff) AM_READ(SMH_BANK2)   // RAM (Banked)
2065		AM_RANGE(0x8000, 0xffff) AM_READ(SMH_BANK1)   // ROM (Banked)
	2025	static ADDRESS_MAP_START( mmpanic_map, ADDRESS_SPACE_PROGRAM, 8 )
	2026	AM_RANGE(0x0051, 0x0051) AM_READ(magic_r)                        // ?
	2027	AM_RANGE(0x0000, 0x5fff) AM_ROM                                 // ROM
	2028	AM_RANGE(0x6000, 0x6fff) AM_RAM                                 // RAM
	2029	AM_RANGE(0x7000, 0x7fff) AM_RAMBANK(2)                           // RAM (Banked)
	2030	AM_RANGE(0x8000, 0xffff) AM_ROMBANK(1) AM_WRITE(rongrong_palette_w)      // ROM (Banked)
2066	2031	ADDRESS_MAP_END
2067	2032
2068		static ADDRESS_MAP_START( mmpanic_writemem, ADDRESS_SPACE_PROGRAM, 8 )
2069		AM_RANGE(0x6000, 0x6fff) AM_WRITE(SMH_RAM)      // RAM
2070		AM_RANGE(0x7000, 0x7fff) AM_WRITE(SMH_BANK2)   // RAM (Banked)
2071		AM_RANGE(0x8000, 0x81ff) AM_WRITE(rongrong_palette_w)
2072		ADDRESS_MAP_END
2073
2074		static ADDRESS_MAP_START( mmpanic_readport, ADDRESS_SPACE_IO, 8 )
	2033	static ADDRESS_MAP_START( mmpanic_portmap, ADDRESS_SPACE_IO, 8 )
2075	2034	ADDRESS_MAP_GLOBAL_MASK(0xff)
2076		AM_RANGE(0x00, 0x0f) AM_DEVREAD("rtc", msm6242_r)   // 6242RTC
2077		AM_RANGE(0x38, 0x38) AM_READ(unk_r)            // ? must be 78 on startup
2078		AM_RANGE(0x58, 0x58) AM_READ(unk_r)            // ? must be 78 on startup
2079		AM_RANGE(0x63, 0x63) AM_READ(rongrong_gfxrom_r)   // Video Chip
2080		AM_RANGE(0x6a, 0x6a) AM_READ_PORT("IN0")
2081		AM_RANGE(0x6b, 0x6b) AM_READ_PORT("IN1")
2082		AM_RANGE(0x6c, 0x6d) AM_READ(mmpanic_link_r)   // Other cabinets?
2083		AM_RANGE(0x7c, 0x7c) AM_DEVREAD("oki", okim6295_r)   // Sound
2084		AM_RANGE(0x94, 0x94) AM_READ_PORT("DSW1")
2085		AM_RANGE(0x98, 0x98) AM_READ_PORT("DSW2")
2086		AM_RANGE(0x9c, 0x9c) AM_READ_PORT("DSW3")      // DSW 1&2 high bits
2087		ADDRESS_MAP_END
	2035	AM_RANGE(0x00, 0x0f) AM_DEVREADWRITE("rtc", msm6242_r, msm6242_w)   // 6242RTC
2088	2036
2089		static ADDRESS_MAP_START( mmpanic_writeport, ADDRESS_SPACE_IO, 8 )
2090		ADDRESS_MAP_GLOBAL_MASK(0xff)
2091		AM_RANGE(0x00, 0x0f) AM_DEVWRITE("rtc", msm6242_w)   // 6242RTC
2092	2037	// Layers 0-3:
2093	2038	AM_RANGE(0x20, 0x23) AM_WRITE(ddenlovr_palette_base_w)
2094	2039	AM_RANGE(0x24, 0x27) AM_WRITE(ddenlovr_palette_mask_w)
r4679	r4680
2097	2042	AM_RANGE(0x34, 0x34) AM_WRITE(ddenlovr_bgcolor_w)
2098	2043	AM_RANGE(0x35, 0x35) AM_WRITE(ddenlovr_priority_w)
2099	2044	AM_RANGE(0x36, 0x36) AM_WRITE(ddenlovr_layer_enable_w)
	2045	AM_RANGE(0x38, 0x38) AM_READ(unk_r)            // ? must be 78 on startup
	2046
2100	2047	// Layers 4-7:
2101	2048	AM_RANGE(0x40, 0x43) AM_WRITE(ddenlovr_palette_base2_w)
2102	2049	AM_RANGE(0x44, 0x47) AM_WRITE(ddenlovr_palette_mask2_w)
r4679	r4680
2105	2052	AM_RANGE(0x54, 0x54) AM_WRITE(ddenlovr_bgcolor2_w)
2106	2053	AM_RANGE(0x55, 0x55) AM_WRITE(ddenlovr_priority2_w)
2107	2054	AM_RANGE(0x56, 0x56) AM_WRITE(ddenlovr_layer_enable2_w)
	2055	AM_RANGE(0x58, 0x58) AM_READ(unk_r)            // ? must be 78 on startup
2108	2056
2109	2057	AM_RANGE(0x60, 0x61) AM_WRITE(mmpanic_blitter_w)
	2058	AM_RANGE(0x63, 0x63) AM_READ(rongrong_gfxrom_r)   // Video Chip
2110	2059	AM_RANGE(0x64, 0x65) AM_WRITE(mmpanic_blitter2_w)
2111	2060	AM_RANGE(0x68, 0x68) AM_DEVWRITE("ay", ddenlovr_select_w)
2112	2061	AM_RANGE(0x69, 0x69) AM_WRITE(mmpanic_lockout_w)
	2062	AM_RANGE(0x6a, 0x6a) AM_READ_PORT("IN0")
	2063	AM_RANGE(0x6b, 0x6b) AM_READ_PORT("IN1")
	2064	AM_RANGE(0x6c, 0x6d) AM_READ(mmpanic_link_r)   // Other cabinets?
2113	2065	AM_RANGE(0x74, 0x74) AM_WRITE(mmpanic_rombank_w)
2114
2115	2066	AM_RANGE(0x78, 0x78) AM_WRITENOP            // 0, during RST 08 (irq acknowledge?)
2116
2117		AM_RANGE(0x7c, 0x7c) AM_DEVWRITE("oki", okim6295_w)   // Sound
	2067	AM_RANGE(0x7c, 0x7c) AM_DEVREADWRITE("oki", okim6295_r, okim6295_w)   // Sound
2118	2068	AM_RANGE(0x8c, 0x8c) AM_WRITE(mmpanic_soundlatch_w)   //
2119	2069	AM_RANGE(0x88, 0x88) AM_WRITE(mmpanic_leds_w)      // Leds
2120	2070	AM_RANGE(0x90, 0x90) AM_WRITENOP            // written just before port 8c
	2071	AM_RANGE(0x94, 0x94) AM_READ_PORT("DSW1")
	2072	AM_RANGE(0x98, 0x98) AM_READ_PORT("DSW2")
	2073	AM_RANGE(0x9c, 0x9c) AM_READ_PORT("DSW3")      // DSW 1&2 high bits
2121	2074	AM_RANGE(0xa6, 0xa6) AM_WRITE(mmpanic_leds2_w)      //
2122	2075	ADDRESS_MAP_END
2123	2076
2124	2077	/* Sound CPU */
2125	2078
2126		static ADDRESS_MAP_START( mmpanic_sound_readmem, ADDRESS_SPACE_PROGRAM, 8 )
2127		AM_RANGE(0x0000, 0x5fff) AM_READ(SMH_ROM)   // ROM
2128		AM_RANGE(0x6000, 0x66ff) AM_READ(SMH_RAM)   // RAM
2129		AM_RANGE(0x8000, 0xffff) AM_READ(SMH_ROM)   // ROM
	2079	static ADDRESS_MAP_START( mmpanic_sound_map, ADDRESS_SPACE_PROGRAM, 8 )
	2080	AM_RANGE(0x0000, 0x5fff) AM_ROM   // ROM
	2081	AM_RANGE(0x6000, 0x66ff) AM_RAM   // RAM
	2082	AM_RANGE(0x8000, 0xffff) AM_ROM   // ROM
2130	2083	ADDRESS_MAP_END
2131	2084
2132		static ADDRESS_MAP_START( mmpanic_sound_writemem, ADDRESS_SPACE_PROGRAM, 8 )
2133		AM_RANGE(0x6000, 0x66ff) AM_WRITE(SMH_RAM)   // RAM
2134		ADDRESS_MAP_END
2135
2136		static ADDRESS_MAP_START( mmpanic_sound_readport, ADDRESS_SPACE_IO, 8 )   ADDRESS_MAP_GLOBAL_MASK(0xff)
	2085	static ADDRESS_MAP_START( mmpanic_sound_portmap, ADDRESS_SPACE_IO, 8 )   ADDRESS_MAP_GLOBAL_MASK(0xff)
2137	2086	AM_RANGE(0x00, 0x00) AM_READ(soundlatch_r)
2138		AM_RANGE(0x02, 0x02) AM_READ(SMH_NOP )   // read just before port 00
2139		AM_RANGE(0x04, 0x04) AM_READ(SMH_NOP )   // read only once at the start
2140		ADDRESS_MAP_END
2141
2142		static ADDRESS_MAP_START( mmpanic_sound_writeport, ADDRESS_SPACE_IO, 8 )   ADDRESS_MAP_GLOBAL_MASK(0xff)
2143		AM_RANGE(0x04, 0x04) AM_WRITENOP   // 0, during IRQ
	2087	AM_RANGE(0x02, 0x02) AM_READ(SMH_NOP )      // read just before port 00
	2088	AM_RANGE(0x04, 0x04) AM_NOP               // read only once at the start
2144	2089	AM_RANGE(0x06, 0x06) AM_WRITENOP   // almost always 1, sometimes 0
2145	2090	AM_RANGE(0x08, 0x09) AM_DEVWRITE("ym", ym2413_w)
2146	2091	AM_RANGE(0x0c, 0x0c) AM_DEVWRITE("ay", ay8910_data_w)
r4679	r4680
2155	2100
2156	2101	/* Main CPU */
2157	2102
2158		static ADDRESS_MAP_START( funkyfig_readmem, ADDRESS_SPACE_PROGRAM, 8 )
2159		AM_RANGE(0x0000, 0x5fff) AM_READ(SMH_ROM)
2160		AM_RANGE(0x6000, 0x6fff) AM_READ(SMH_RAM)
2161		AM_RANGE(0x7000, 0x7fff) AM_READ(SMH_BANK2)   // RAM (Banked)
2162		AM_RANGE(0x8000, 0xffff) AM_READ(SMH_BANK1)   // ROM (Banked)
2163		ADDRESS_MAP_END
	2103	static ADDRESS_MAP_START( funkyfig_map, ADDRESS_SPACE_PROGRAM, 8 )
	2104	AM_RANGE(0x0000, 0x5fff) AM_ROM
	2105	AM_RANGE(0x6000, 0x6fff) AM_RAM
	2106	AM_RANGE(0x7000, 0x7fff) AM_RAMBANK(2)         // RAM (Banked)
2164	2107
2165		static ADDRESS_MAP_START( funkyfig_writemem, ADDRESS_SPACE_PROGRAM, 8 )
2166		AM_RANGE(0x6000, 0x6fff) AM_WRITE(SMH_RAM)
2167		AM_RANGE(0x7000, 0x7fff) AM_WRITE(SMH_BANK2)   // RAM (Banked)
	2108	AM_RANGE(0x8000, 0xffff) AM_ROMBANK(1)
2168	2109	AM_RANGE(0x8000, 0x81ff) AM_WRITE(rongrong_palette_w)
2169	2110	AM_RANGE(0x8400, 0x87ff) AM_WRITENOP
2170	2111	ADDRESS_MAP_END
r4679	r4680
2244	2185	}
2245	2186	}
2246	2187
2247		static ADDRESS_MAP_START( funkyfig_readport, ADDRESS_SPACE_IO, 8 )   ADDRESS_MAP_GLOBAL_MASK(0xff)
2248		AM_RANGE(0x00, 0x00) AM_DEVREAD("oki", okim6295_r)   // Sound
2249		AM_RANGE(0x04, 0x04) AM_READ(funkyfig_busy_r)
2250		AM_RANGE(0x1c, 0x1c) AM_READ(funkyfig_dsw_r)
2251		AM_RANGE(0x23, 0x23) AM_READ(rongrong_gfxrom_r)      // Video Chip
2252		AM_RANGE(0x40, 0x4f) AM_DEVREAD("rtc", msm6242_r)   // 6242RTC
2253		AM_RANGE(0x78, 0x78) AM_READ(unk_r)               // ? must be 78 on startup
2254		AM_RANGE(0x82, 0x82) AM_READ(funkyfig_coin_r)
2255		AM_RANGE(0x83, 0x83) AM_READ(funkyfig_key_r)
2256		//  Other cabinets?
2257		ADDRESS_MAP_END
2258
2259		static ADDRESS_MAP_START( funkyfig_writeport, ADDRESS_SPACE_IO, 8 )   ADDRESS_MAP_GLOBAL_MASK(0xff)
2260		AM_RANGE(0x00, 0x00) AM_DEVWRITE("oki", okim6295_w)   // Sound
	2188	static ADDRESS_MAP_START( funkyfig_portmap, ADDRESS_SPACE_IO, 8 )   ADDRESS_MAP_GLOBAL_MASK(0xff)
	2189	AM_RANGE(0x00, 0x00) AM_DEVREADWRITE("oki", okim6295_r, okim6295_w)   // Sound
2261	2190	AM_RANGE(0x01, 0x01) AM_WRITE(mmpanic_leds_w)      // Leds
2262	2191	AM_RANGE(0x02, 0x02) AM_WRITE(mmpanic_soundlatch_w)   //
	2192	AM_RANGE(0x04, 0x04) AM_READ(funkyfig_busy_r)
	2193	AM_RANGE(0x1c, 0x1c) AM_READ(funkyfig_dsw_r)
2263	2194	AM_RANGE(0x1e, 0x1e) AM_WRITE(funkyfig_rombank_w)
2264	2195	AM_RANGE(0x20, 0x21) AM_WRITE(funkyfig_blitter_w)
2265		AM_RANGE(0x40, 0x4f) AM_DEVWRITE("rtc", msm6242_w)   // 6242RTC
	2196	AM_RANGE(0x23, 0x23) AM_READ(rongrong_gfxrom_r)      // Video Chip
	2197	AM_RANGE(0x40, 0x4f) AM_DEVREADWRITE("rtc", msm6242_r, msm6242_w)   // 6242RTC
2266	2198
2267	2199	// Layers 0-3:
2268	2200	AM_RANGE(0x60, 0x63) AM_WRITE(ddenlovr_palette_base_w)
r4679	r4680
2272	2204	AM_RANGE(0x74, 0x74) AM_WRITE(ddenlovr_bgcolor_w)
2273	2205	AM_RANGE(0x75, 0x75) AM_WRITE(ddenlovr_priority_w)
2274	2206	AM_RANGE(0x76, 0x76) AM_WRITE(ddenlovr_layer_enable_w)
	2207	AM_RANGE(0x78, 0x78) AM_READ(unk_r)               // ? must be 78 on startup
2275	2208
2276	2209	AM_RANGE(0x80, 0x80) AM_WRITE(ddenlovr_select2_w)
2277	2210	AM_RANGE(0x81, 0x81) AM_WRITE(funkyfig_lockout_w)
	2211	AM_RANGE(0x82, 0x82) AM_READ(funkyfig_coin_r)
	2212	AM_RANGE(0x83, 0x83) AM_READ(funkyfig_key_r)
	2213
2278	2214	AM_RANGE(0xa2, 0xa2) AM_WRITE(mmpanic_leds2_w)
2279	2215	ADDRESS_MAP_END
2280	2216
2281	2217
2282	2218	/* Sound CPU */
2283	2219
2284		static ADDRESS_MAP_START( funkyfig_sound_readport, ADDRESS_SPACE_IO, 8 )   ADDRESS_MAP_GLOBAL_MASK(0xff)
	2220	static ADDRESS_MAP_START( funkyfig_sound_portmap, ADDRESS_SPACE_IO, 8 )   ADDRESS_MAP_GLOBAL_MASK(0xff)
2285	2221	AM_RANGE(0x02, 0x02) AM_READ(soundlatch_r)
2286	2222	AM_RANGE(0x04, 0x04) AM_READNOP   // read only once at the start
2287	2223	ADDRESS_MAP_END
r4679	r4680
2303	2239	memory_set_bankptr(space->machine, 2, &rom[0x90000 + 0x1000 * ((data & 0xf0) >> 4)]);
2304	2240	}
2305	2241
2306		static ADDRESS_MAP_START( hanakanz_readmem, ADDRESS_SPACE_PROGRAM, 8 )
2307		AM_RANGE(0x0000, 0x5fff) AM_READ(SMH_ROM)   // ROM
2308		AM_RANGE(0x6000, 0x6fff) AM_READ(SMH_RAM)   // RAM
2309		AM_RANGE(0x7000, 0x7fff) AM_READ(SMH_BANK2)   // RAM (Banked)
2310		AM_RANGE(0x8000, 0xffff) AM_READ(SMH_BANK1)   // ROM (Banked)
	2242	static ADDRESS_MAP_START( hanakanz_map, ADDRESS_SPACE_PROGRAM, 8 )
	2243	AM_RANGE(0x0000, 0x5fff) AM_ROM                        // ROM
	2244	AM_RANGE(0x6000, 0x6fff) AM_RAM                        // RAM
	2245	AM_RANGE(0x7000, 0x7fff) AM_RAMBANK(2)                  // RAM (Banked)
	2246	AM_RANGE(0x8000, 0xffff) AM_ROMBANK(1)                  // ROM (Banked)
2311	2247	ADDRESS_MAP_END
2312		static ADDRESS_MAP_START( hanakanz_writemem, ADDRESS_SPACE_PROGRAM, 8 )
2313		AM_RANGE(0x6000, 0x6fff) AM_WRITE(SMH_RAM)   // RAM
2314		AM_RANGE(0x7000, 0x7fff) AM_WRITE(SMH_BANK2)   // RAM (Banked)
2315		ADDRESS_MAP_END
2316	2248
2317	2249
2318	2250	static UINT8 keyb,dsw;
r4679	r4680
2431	2363	return mame_rand(space->machine);
2432	2364	}
2433	2365
2434		static ADDRESS_MAP_START( hanakanz_readport, ADDRESS_SPACE_IO, 8 )   ADDRESS_MAP_GLOBAL_MASK(0xff)
2435		AM_RANGE(0x2c, 0x2c) AM_READ(hanakanz_busy_r)
2436		AM_RANGE(0x32, 0x32) AM_READ(hanakanz_dsw_r)
2437		AM_RANGE(0x83, 0x84) AM_READ(hanakanz_gfxrom_r)
2438		AM_RANGE(0x90, 0x90) AM_READ_PORT("SYSTEM")
2439		AM_RANGE(0x91, 0x92) AM_READ(hanakanz_keyb_r)
2440		AM_RANGE(0x96, 0x96) AM_READ(hanakanz_rand_r)
2441		AM_RANGE(0xc0, 0xc0) AM_DEVREAD("oki", okim6295_r)
2442		AM_RANGE(0xe0, 0xef) AM_DEVREAD("rtc", msm6242_r)   // 6242RTC
2443		ADDRESS_MAP_END
2444
2445		static ADDRESS_MAP_START( hanakanz_writeport, ADDRESS_SPACE_IO, 8 )   ADDRESS_MAP_GLOBAL_MASK(0xff)
2446		AM_RANGE(0x2c, 0x2c) AM_DEVWRITE("oki", hanakanz_oki_bank_w)
	2366	static ADDRESS_MAP_START( hanakanz_portmap, ADDRESS_SPACE_IO, 8 )   ADDRESS_MAP_GLOBAL_MASK(0xff)
	2367	AM_RANGE(0x2c, 0x2c) AM_READ(hanakanz_busy_r) AM_DEVWRITE("oki", hanakanz_oki_bank_w)
2447	2368	AM_RANGE(0x2e, 0x2e) AM_WRITE(hanakanz_blitter_reg_w)
2448	2369	AM_RANGE(0x30, 0x30) AM_WRITE(hanakanz_rombank_w)
2449	2370	AM_RANGE(0x31, 0x31) AM_WRITE(hanakanz_dsw_w)
	2371	AM_RANGE(0x32, 0x32) AM_READ(hanakanz_dsw_r)
2450	2372	AM_RANGE(0x80, 0x80) AM_WRITE(hanakanz_blitter_data_w)
2451	2373	AM_RANGE(0x81, 0x81) AM_WRITE(hanakanz_palette_w)
	2374	AM_RANGE(0x83, 0x84) AM_READ(hanakanz_gfxrom_r)
	2375	AM_RANGE(0x90, 0x90) AM_READ_PORT("SYSTEM")
	2376	AM_RANGE(0x91, 0x92) AM_READ(hanakanz_keyb_r)
2452	2377	AM_RANGE(0x93, 0x93) AM_WRITE(hanakanz_coincounter_w)
2453	2378	AM_RANGE(0x94, 0x94) AM_WRITE(hanakanz_keyb_w)
	2379	AM_RANGE(0x96, 0x96) AM_READ(hanakanz_rand_r)
2454	2380	AM_RANGE(0xa0, 0xa1) AM_DEVWRITE("ym", ym2413_w)
2455		AM_RANGE(0xc0, 0xc0) AM_DEVWRITE("oki", okim6295_w)
2456		AM_RANGE(0xe0, 0xef) AM_DEVWRITE("rtc", msm6242_w)   // 6242RTC
	2381	AM_RANGE(0xc0, 0xc0) AM_DEVREADWRITE("oki", okim6295_r, okim6295_w)
	2382	AM_RANGE(0xe0, 0xef) AM_DEVREADWRITE("rtc", msm6242_r, msm6242_w)   // 6242RTC
2457	2383	ADDRESS_MAP_END
2458	2384
2459	2385
2460		static ADDRESS_MAP_START( hkagerou_readport, ADDRESS_SPACE_IO, 8 )   ADDRESS_MAP_GLOBAL_MASK(0xff)
2461		AM_RANGE(0x2c, 0x2c) AM_READ(hanakanz_busy_r)
2462		AM_RANGE(0x32, 0x32) AM_READ(hanakanz_dsw_r)
2463		AM_RANGE(0x83, 0x84) AM_READ(hanakanz_gfxrom_r)
2464		AM_RANGE(0xb0, 0xb0) AM_READ_PORT("SYSTEM")
2465		AM_RANGE(0xb1, 0xb2) AM_READ(hanakanz_keyb_r)
2466		AM_RANGE(0xb6, 0xb6) AM_READ(hanakanz_rand_r)
2467		AM_RANGE(0xc0, 0xc0) AM_DEVREAD("oki", okim6295_r)
2468		AM_RANGE(0xe0, 0xef) AM_DEVREAD("rtc", msm6242_r)   // 6242RTC
2469		ADDRESS_MAP_END
2470
2471		static ADDRESS_MAP_START( hkagerou_writeport, ADDRESS_SPACE_IO, 8 )   ADDRESS_MAP_GLOBAL_MASK(0xff)
2472		AM_RANGE(0x2c, 0x2c) AM_DEVWRITE("oki", hanakanz_oki_bank_w)
	2386	static ADDRESS_MAP_START( hkagerou_portmap, ADDRESS_SPACE_IO, 8 )   ADDRESS_MAP_GLOBAL_MASK(0xff)
	2387	AM_RANGE(0x2c, 0x2c) AM_READ(hanakanz_busy_r) AM_DEVWRITE("oki", hanakanz_oki_bank_w)
2473	2388	AM_RANGE(0x2e, 0x2e) AM_WRITE(hanakanz_blitter_reg_w)
2474	2389	AM_RANGE(0x30, 0x30) AM_WRITE(hanakanz_rombank_w)
2475	2390	AM_RANGE(0x31, 0x31) AM_WRITE(hanakanz_dsw_w)
	2391	AM_RANGE(0x32, 0x32) AM_READ(hanakanz_dsw_r)
2476	2392	AM_RANGE(0x80, 0x80) AM_WRITE(hanakanz_blitter_data_w)
2477	2393	AM_RANGE(0x81, 0x81) AM_WRITE(hanakanz_palette_w)
	2394	AM_RANGE(0x83, 0x84) AM_READ(hanakanz_gfxrom_r)
2478	2395	AM_RANGE(0xa0, 0xa1) AM_DEVWRITE("ym", ym2413_w)
	2396	AM_RANGE(0xb0, 0xb0) AM_READ_PORT("SYSTEM")
	2397	AM_RANGE(0xb1, 0xb2) AM_READ(hanakanz_keyb_r)
2479	2398	AM_RANGE(0xb3, 0xb3) AM_WRITE(hanakanz_coincounter_w)
2480	2399	AM_RANGE(0xb4, 0xb4) AM_WRITE(hanakanz_keyb_w)
2481		AM_RANGE(0xc0, 0xc0) AM_DEVWRITE("oki", okim6295_w)
2482		AM_RANGE(0xe0, 0xef) AM_DEVWRITE("rtc", msm6242_w)   // 6242RTC
	2400	AM_RANGE(0xb6, 0xb6) AM_READ(hanakanz_rand_r)
	2401	AM_RANGE(0xc0, 0xc0) AM_DEVREADWRITE("oki", okim6295_r, okim6295_w)
	2402	AM_RANGE(0xe0, 0xef) AM_DEVREADWRITE("rtc", msm6242_r, msm6242_w)   // 6242RTC
2483	2403	ADDRESS_MAP_END
2484	2404
2485	2405
r4679	r4680
2495	2415	return mjreach1_protection_val;
2496	2416	}
2497	2417
2498		static ADDRESS_MAP_START( mjreach1_readport, ADDRESS_SPACE_IO, 8 )   ADDRESS_MAP_GLOBAL_MASK(0xff)
2499		AM_RANGE(0x2c, 0x2c) AM_READ(hanakanz_busy_r)
2500		AM_RANGE(0x32, 0x32) AM_READ(hanakanz_dsw_r)
2501		AM_RANGE(0x83, 0x84) AM_READ(hanakanz_gfxrom_r)
2502		AM_RANGE(0x92, 0x92) AM_READ(hanakanz_rand_r)
2503		AM_RANGE(0x93, 0x93) AM_READ(mjreach1_protection_r   )
2504		AM_RANGE(0x94, 0x94) AM_READ_PORT("SYSTEM")
2505		AM_RANGE(0x95, 0x96) AM_READ(hanakanz_keyb_r)
2506		AM_RANGE(0xc0, 0xc0) AM_DEVREAD("oki", okim6295_r)
2507		AM_RANGE(0xe0, 0xef) AM_DEVREAD("rtc", msm6242_r)   // 6242RTC
2508		ADDRESS_MAP_END
2509
2510		static ADDRESS_MAP_START( mjreach1_writeport, ADDRESS_SPACE_IO, 8 )   ADDRESS_MAP_GLOBAL_MASK(0xff)
2511		AM_RANGE(0x2c, 0x2c) AM_DEVWRITE("oki", hanakanz_oki_bank_w)
	2418	static ADDRESS_MAP_START( mjreach1_portmap, ADDRESS_SPACE_IO, 8 )   ADDRESS_MAP_GLOBAL_MASK(0xff)
	2419	AM_RANGE(0x2c, 0x2c) AM_READ(hanakanz_busy_r) AM_DEVWRITE("oki", hanakanz_oki_bank_w)
2512	2420	AM_RANGE(0x2e, 0x2e) AM_WRITE(hanakanz_blitter_reg_w)
2513	2421	AM_RANGE(0x30, 0x30) AM_WRITE(hanakanz_rombank_w)
2514	2422	AM_RANGE(0x31, 0x31) AM_WRITE(hanakanz_dsw_w)
	2423	AM_RANGE(0x32, 0x32) AM_READ(hanakanz_dsw_r)
2515	2424	AM_RANGE(0x80, 0x80) AM_WRITE(hanakanz_blitter_data_w)
2516	2425	AM_RANGE(0x81, 0x81) AM_WRITE(hanakanz_palette_w)
	2426	AM_RANGE(0x83, 0x84) AM_READ(hanakanz_gfxrom_r)
2517	2427	AM_RANGE(0x90, 0x90) AM_WRITE(hanakanz_keyb_w)
2518		AM_RANGE(0x93, 0x93) AM_WRITE(mjreach1_protection_w)
	2428	AM_RANGE(0x92, 0x92) AM_READ(hanakanz_rand_r)
	2429	AM_RANGE(0x93, 0x93) AM_READWRITE(mjreach1_protection_r, mjreach1_protection_w)
	2430	AM_RANGE(0x94, 0x94) AM_READ_PORT("SYSTEM")
	2431	AM_RANGE(0x95, 0x96) AM_READ(hanakanz_keyb_r)
2519	2432	AM_RANGE(0x97, 0x97) AM_WRITE(hanakanz_coincounter_w)
2520	2433	AM_RANGE(0xa0, 0xa1) AM_DEVWRITE("ym", ym2413_w)
2521		AM_RANGE(0xc0, 0xc0) AM_DEVWRITE("oki", okim6295_w)
2522		AM_RANGE(0xe0, 0xef) AM_DEVWRITE("rtc", msm6242_w)   // 6242RTC
	2434	AM_RANGE(0xc0, 0xc0) AM_DEVREADWRITE("oki", okim6295_r, okim6295_w)
	2435	AM_RANGE(0xe0, 0xef) AM_DEVREADWRITE("rtc", msm6242_r, msm6242_w)   // 6242RTC
2523	2436	ADDRESS_MAP_END
2524	2437
2525	2438
r4679	r4680
2626	2539	#endif
2627	2540	}
2628	2541
2629		static ADDRESS_MAP_START( mjchuuka_readport, ADDRESS_SPACE_IO, 8 )   // 16 bit I/O
	2542	static ADDRESS_MAP_START( mjchuuka_portmap, ADDRESS_SPACE_IO, 8 )   // 16 bit I/O
2630	2543	AM_RANGE(0x13, 0x13) AM_MIRROR(0xff00) AM_READ(hanakanz_rand_r)
	2544	AM_RANGE(0x1c, 0x1c) AM_MIRROR(0xff00) AM_WRITE(hanakanz_rombank_w)
	2545	AM_RANGE(0x1e, 0x1e) AM_MIRROR(0xff00) AM_DEVWRITE("oki", mjchuuka_oki_bank_w   )
	2546	AM_RANGE(0x20, 0x20) AM_MIRROR(0xff00) AM_MASK(0xff00) AM_WRITE(mjchuuka_blitter_w)
	2547	AM_RANGE(0x21, 0x21) AM_MIRROR(0xff00) AM_MASK(0xff00) AM_WRITE(mjchuuka_palette_w)
2631	2548	AM_RANGE(0x23, 0x23) AM_MIRROR(0xff00) AM_READ(mjchuuka_gfxrom_0_r)
	2549	AM_RANGE(0x40, 0x40) AM_MIRROR(0xff00) AM_WRITE(mjchuuka_coincounter_w)
	2550	AM_RANGE(0x41, 0x41) AM_MIRROR(0xff00) AM_WRITE(hanakanz_keyb_w)
2632	2551	AM_RANGE(0x42, 0x42) AM_MIRROR(0xff00) AM_READ_PORT("SYSTEM")
2633	2552	AM_RANGE(0x43, 0x44) AM_MIRROR(0xff00) AM_READ(mjchuuka_keyb_r)
2634	2553	AM_RANGE(0x45, 0x45) AM_MIRROR(0xff00) AM_READ(mjchuuka_gfxrom_1_r)
r4679	r4680
2637	2556	AM_RANGE(0x62, 0x62) AM_MIRROR(0xff00) AM_READ_PORT("DSW3")
2638	2557	AM_RANGE(0x63, 0x63) AM_MIRROR(0xff00) AM_READ_PORT("DSW4")
2639	2558	AM_RANGE(0x64, 0x64) AM_MIRROR(0xff00) AM_READ_PORT("DSW5")      // DSW 1-4 high bits
2640		AM_RANGE(0x80, 0x80) AM_MIRROR(0xff00) AM_DEVREAD("oki", okim6295_r)
2641		AM_RANGE(0xc0, 0xcf) AM_MIRROR(0xff00) AM_DEVREAD("rtc", msm6242_r)   // 6242RTC
2642		ADDRESS_MAP_END
2643
2644		static ADDRESS_MAP_START( mjchuuka_writeport, ADDRESS_SPACE_IO, 8 )   // 16 bit I/O
2645		AM_RANGE(0x1c, 0x1c) AM_MIRROR(0xff00) AM_WRITE(hanakanz_rombank_w)
2646		AM_RANGE(0x20, 0x20) AM_MIRROR(0xff00) AM_MASK(0xff00) AM_WRITE(mjchuuka_blitter_w)
2647		AM_RANGE(0x21, 0x21) AM_MIRROR(0xff00) AM_MASK(0xff00) AM_WRITE(mjchuuka_palette_w)
2648		AM_RANGE(0x40, 0x40) AM_MIRROR(0xff00) AM_WRITE(mjchuuka_coincounter_w)
2649		AM_RANGE(0x41, 0x41) AM_MIRROR(0xff00) AM_WRITE(hanakanz_keyb_w)
2650		AM_RANGE(0x80, 0x80) AM_MIRROR(0xff00) AM_DEVWRITE("oki", okim6295_w)
2651		AM_RANGE(0xc0, 0xcf) AM_MIRROR(0xff00) AM_DEVWRITE("rtc", msm6242_w)   // 6242RTC
	2559	AM_RANGE(0x80, 0x80) AM_MIRROR(0xff00) AM_DEVREADWRITE("oki", okim6295_r, okim6295_w)
2652	2560	AM_RANGE(0xa0, 0xa1) AM_MIRROR(0xff00) AM_DEVWRITE("ym", ym2413_w)
	2561	AM_RANGE(0xc0, 0xcf) AM_MIRROR(0xff00) AM_DEVREADWRITE("rtc", msm6242_r, msm6242_w)   // 6242RTC
2653	2562	AM_RANGE(0xe0, 0xe1) AM_MIRROR(0xff00) AM_DEVWRITE("ay", ay8910_address_data_w)
2654		AM_RANGE(0x1e, 0x1e) AM_MIRROR(0xff00) AM_DEVWRITE("oki", mjchuuka_oki_bank_w   )
2655	2563	ADDRESS_MAP_END
2656	2564
2657	2565
r4679	r4680
2659	2567	Mahjong The Mysterious World
2660	2568	***************************************************************************/
2661	2569
2662		static ADDRESS_MAP_START( mjmyster_readmem, ADDRESS_SPACE_PROGRAM, 8 )
2663		AM_RANGE(0x0000, 0x5fff) AM_READ(SMH_ROM)   // ROM
2664		AM_RANGE(0x6000, 0x6fff) AM_READ(SMH_RAM)   // RAM
2665		AM_RANGE(0x7000, 0x7fff) AM_READ(SMH_BANK2)   // RAM (Banked)
2666		AM_RANGE(0x8000, 0xffff) AM_READ(SMH_BANK1)   // ROM/RAM (Banked)
2667		ADDRESS_MAP_END
2668
2669		static ADDRESS_MAP_START( mjmyster_writemem, ADDRESS_SPACE_PROGRAM, 8 )
2670		AM_RANGE(0x6000, 0x6fff) AM_WRITE(SMH_RAM)      // RAM
2671		AM_RANGE(0x7000, 0x7fff) AM_WRITE(SMH_BANK2)   // RAM (Banked)
	2570	static ADDRESS_MAP_START( mjmyster_map, ADDRESS_SPACE_PROGRAM, 8 )
	2571	AM_RANGE(0x0000, 0x5fff) AM_ROM            // ROM
	2572	AM_RANGE(0x6000, 0x6fff) AM_RAM            // RAM
	2573	AM_RANGE(0x7000, 0x7fff) AM_RAMBANK(2)      // RAM (Banked)
	2574	AM_RANGE(0x8000, 0xffff) AM_ROMBANK(1)      // ROM/RAM (Banked)
2672	2575	AM_RANGE(0xf000, 0xf1ff) AM_WRITE(rongrong_palette_w)   // RAM enabled by bit 4 of rombank
2673	2576	AM_RANGE(0xf200, 0xffff) AM_WRITENOP      // ""
2674	2577	ADDRESS_MAP_END
r4679	r4680
2752	2655	blitter_w(space, 0,offset,data,0xfc);
2753	2656	}
2754	2657
2755		static ADDRESS_MAP_START( mjmyster_readport, ADDRESS_SPACE_IO, 8 )   ADDRESS_MAP_GLOBAL_MASK(0xff)
2756		AM_RANGE(0x03, 0x03) AM_READ(rongrong_gfxrom_r)
2757		AM_RANGE(0x22, 0x22) AM_READ(mjmyster_coins_r)
2758		AM_RANGE(0x23, 0x23) AM_READ(mjmyster_keyb_r)
2759		AM_RANGE(0x40, 0x40) AM_DEVREAD("oki", okim6295_r)
2760		AM_RANGE(0x44, 0x44) AM_DEVREAD("ay", ay8910_r)
2761		AM_RANGE(0x60, 0x6f) AM_DEVREAD("rtc", msm6242_r)   // 6242RTC
2762		AM_RANGE(0x98, 0x98) AM_READ(unk_r)                     // ? must be 78 on startup
2763		AM_RANGE(0xc2, 0xc2) AM_READ(hanakanz_rand_r)
2764		AM_RANGE(0xc3, 0xc3) AM_READ(mjmyster_dsw_r)
2765		ADDRESS_MAP_END
2766
2767		static ADDRESS_MAP_START( mjmyster_writeport, ADDRESS_SPACE_IO, 8 )   ADDRESS_MAP_GLOBAL_MASK(0xff)
	2658	static ADDRESS_MAP_START( mjmyster_portmap, ADDRESS_SPACE_IO, 8 )   ADDRESS_MAP_GLOBAL_MASK(0xff)
2768	2659	AM_RANGE(0x00, 0x01) AM_WRITE(mjmyster_blitter_w)
	2660	AM_RANGE(0x03, 0x03) AM_READ(rongrong_gfxrom_r)
2769	2661	AM_RANGE(0x1c, 0x1c) AM_WRITE(mjmyster_rambank_w)
2770	2662	AM_RANGE(0x1e, 0x1e) AM_WRITE(mmpanic_rombank_w)
2771	2663	AM_RANGE(0x20, 0x20) AM_WRITE(mjmyster_select2_w)
2772	2664	AM_RANGE(0x21, 0x21) AM_WRITE(mjmyster_coincounter_w)
2773		AM_RANGE(0x40, 0x40) AM_DEVWRITE("oki", okim6295_w)
	2665	AM_RANGE(0x22, 0x22) AM_READ(mjmyster_coins_r)
	2666	AM_RANGE(0x23, 0x23) AM_READ(mjmyster_keyb_r)
	2667	AM_RANGE(0x40, 0x40) AM_DEVREADWRITE("oki", okim6295_r, okim6295_w)
2774	2668	AM_RANGE(0x42, 0x43) AM_DEVWRITE("ym", ym2413_w)
	2669	AM_RANGE(0x44, 0x44) AM_DEVREAD("ay", ay8910_r)
2775	2670	AM_RANGE(0x46, 0x46) AM_DEVWRITE("ay", ay8910_data_w)
2776	2671	AM_RANGE(0x48, 0x48) AM_DEVWRITE("ay", ay8910_address_w)
2777		AM_RANGE(0x60, 0x6f) AM_DEVWRITE("rtc", msm6242_w)   // 6242RTC
	2672	AM_RANGE(0x60, 0x6f) AM_DEVREADWRITE("rtc", msm6242_r, msm6242_w)   // 6242RTC
2778	2673	AM_RANGE(0x80, 0x83) AM_WRITE(ddenlovr_palette_base_w)
2779	2674	AM_RANGE(0x84, 0x87) AM_WRITE(ddenlovr_palette_mask_w)
2780	2675	AM_RANGE(0x88, 0x8b) AM_WRITE(ddenlovr_transparency_pen_w)
r4679	r4680
2782	2677	AM_RANGE(0x94, 0x94) AM_WRITE(ddenlovr_bgcolor_w)
2783	2678	AM_RANGE(0x95, 0x95) AM_WRITE(ddenlovr_priority_w)
2784	2679	AM_RANGE(0x96, 0x96) AM_WRITE(ddenlovr_layer_enable_w)
	2680	AM_RANGE(0x98, 0x98) AM_READ(unk_r)                     // ? must be 78 on startup
	2681	AM_RANGE(0xc2, 0xc2) AM_READ(hanakanz_rand_r)
	2682	AM_RANGE(0xc3, 0xc3) AM_READ(mjmyster_dsw_r)
2785	2683	ADDRESS_MAP_END
2786	2684
2787	2685	/***************************************************************************
r4679	r4680
2805	2703	return rom[0x10000 + 0x8000 * (hginga_rombank & 0x7) + 0xf601 - 0x8000];
2806	2704	}
2807	2705
2808		static ADDRESS_MAP_START( hginga_readmem, ADDRESS_SPACE_PROGRAM, 8 )
2809		AM_RANGE(0x0000, 0x5fff) AM_READ(SMH_ROM)   // ROM
2810		AM_RANGE(0x6000, 0x6fff) AM_READ(SMH_RAM)   // RAM
2811		AM_RANGE(0x7000, 0x7fff) AM_READ(SMH_BANK2)   // RAM (Banked)
	2706	static ADDRESS_MAP_START( hginga_map, ADDRESS_SPACE_PROGRAM, 8 )
	2707	AM_RANGE(0x0000, 0x5fff) AM_ROM                        // ROM
	2708	AM_RANGE(0x6000, 0x6fff) AM_RAM                        // RAM
	2709	AM_RANGE(0x7000, 0x7fff) AM_RAMBANK(2)                  // RAM (Banked)
2812	2710	AM_RANGE(0xf601, 0xf601) AM_READ(hginga_protection_r)
2813		AM_RANGE(0x8000, 0xffff) AM_READ(SMH_BANK1)   // ROM/RAM (Banked)
2814		ADDRESS_MAP_END
2815
2816		static ADDRESS_MAP_START( hginga_writemem, ADDRESS_SPACE_PROGRAM, 8 )
2817		AM_RANGE(0x6000, 0x6fff) AM_WRITE(SMH_RAM)      // RAM
2818		AM_RANGE(0x7000, 0x7fff) AM_WRITE(SMH_BANK2)   // RAM (Banked)
	2711	AM_RANGE(0x8000, 0xffff) AM_ROMBANK(1)                  // ROM/RAM (Banked)
2819	2712	AM_RANGE(0xf000, 0xf1ff) AM_WRITE(rongrong_palette_w)   // RAM enabled by bit 4 of rombank
2820	2713	AM_RANGE(0xf700, 0xf706) AM_WRITENOP
2821	2714	ADDRESS_MAP_END
r4679	r4680
2932	2825	blitter_w(space, 0,offset,data,0xfc);
2933	2826	}
2934	2827
2935		static ADDRESS_MAP_START( hginga_readport, ADDRESS_SPACE_IO, 8 )   ADDRESS_MAP_GLOBAL_MASK(0xff)
2936		AM_RANGE(0x03, 0x03) AM_READ(rongrong_gfxrom_r)
2937		AM_RANGE(0x1c, 0x1c) AM_READNOP
2938		AM_RANGE(0x24, 0x24) AM_DEVREAD("ay", ay8910_r)
2939		AM_RANGE(0x60, 0x6f) AM_DEVREAD("rtc", msm6242_r)   // 6242RTC
2940		AM_RANGE(0x42, 0x42) AM_READ(hginga_coins_r)
2941		AM_RANGE(0x43, 0x43) AM_READ(hginga_input_r)
2942		AM_RANGE(0xb8, 0xb8) AM_READ(unk_r)   // ? must be 78 on startup
2943		ADDRESS_MAP_END
2944
2945		static ADDRESS_MAP_START( hginga_writeport, ADDRESS_SPACE_IO, 8 )   ADDRESS_MAP_GLOBAL_MASK(0xff)
	2828	static ADDRESS_MAP_START( hginga_portmap, ADDRESS_SPACE_IO, 8 )   ADDRESS_MAP_GLOBAL_MASK(0xff)
2946	2829	AM_RANGE(0x00, 0x01) AM_WRITE(hginga_blitter_w)
2947		AM_RANGE(0x1c, 0x1c) AM_WRITE(mjmyster_rambank_w)
	2830	AM_RANGE(0x03, 0x03) AM_READ(rongrong_gfxrom_r)
	2831	AM_RANGE(0x1c, 0x1c) AM_READNOP AM_WRITE(mjmyster_rambank_w)
2948	2832	AM_RANGE(0x1e, 0x1e) AM_WRITE(hginga_rombank_w)
2949	2833	AM_RANGE(0x22, 0x23) AM_DEVWRITE("ym", ym2413_w)
	2834	AM_RANGE(0x24, 0x24) AM_DEVREAD("ay", ay8910_r)
2950	2835	AM_RANGE(0x26, 0x26) AM_DEVWRITE("ay", ay8910_data_w)
2951	2836	AM_RANGE(0x28, 0x28) AM_DEVWRITE("ay", ay8910_address_w)
2952	2837	AM_RANGE(0x40, 0x40) AM_WRITE(hginga_input_w)
2953	2838	AM_RANGE(0x41, 0x41) AM_WRITE(hginga_coins_w)
2954		AM_RANGE(0x60, 0x6f) AM_DEVWRITE("rtc", msm6242_w)   // 6242RTC
	2839	AM_RANGE(0x42, 0x42) AM_READ(hginga_coins_r)
	2840	AM_RANGE(0x43, 0x43) AM_READ(hginga_input_r)
	2841	AM_RANGE(0x60, 0x6f) AM_DEVREADWRITE("rtc", msm6242_r, msm6242_w)   // 6242RTC
2955	2842	AM_RANGE(0x80, 0x80) AM_WRITE(hginga_80_w)
2956	2843	AM_RANGE(0xa0, 0xa3) AM_WRITE(ddenlovr_palette_base_w)
2957	2844	AM_RANGE(0xa4, 0xa7) AM_WRITE(ddenlovr_palette_mask_w)
r4679	r4680
2960	2847	AM_RANGE(0xb4, 0xb4) AM_WRITE(ddenlovr_bgcolor_w)
2961	2848	AM_RANGE(0xb5, 0xb5) AM_WRITE(ddenlovr_priority_w)
2962	2849	AM_RANGE(0xb6, 0xb6) AM_WRITE(ddenlovr_layer_enable_w)
	2850	AM_RANGE(0xb8, 0xb8) AM_READ(unk_r)   // ? must be 78 on startup
2963	2851	ADDRESS_MAP_END
2964	2852
2965	2853
r4679	r4680
3029	2917	return rom[0x10000 + 0x8000 * (hginga_rombank & 0x7) + 0xe601 - 0x8000];
3030	2918	}
3031	2919
3032		static ADDRESS_MAP_START( hgokou_readmem, ADDRESS_SPACE_PROGRAM, 8 )
3033		AM_RANGE(0x0000, 0x5fff) AM_READ(SMH_ROM)   // ROM
3034		AM_RANGE(0x6000, 0x6fff) AM_READ(SMH_RAM)   // RAM
3035		AM_RANGE(0x7000, 0x7fff) AM_READ(SMH_BANK2)   // RAM (Banked)
	2920	static ADDRESS_MAP_START( hgokou_map, ADDRESS_SPACE_PROGRAM, 8 )
	2921	AM_RANGE(0x0000, 0x5fff) AM_ROM                        // ROM
	2922	AM_RANGE(0x6000, 0x6fff) AM_RAM                        // RAM
	2923	AM_RANGE(0x7000, 0x7fff) AM_RAMBANK(2)                  // RAM (Banked)
3036	2924	AM_RANGE(0xe601, 0xe601) AM_READ(hgokou_protection_r)
3037		AM_RANGE(0x8000, 0xffff) AM_READ(SMH_BANK1)   // ROM (Banked)
3038		ADDRESS_MAP_END
3039		static ADDRESS_MAP_START( hgokou_writemem, ADDRESS_SPACE_PROGRAM, 8 )
3040		AM_RANGE(0x6000, 0x6fff) AM_WRITE(SMH_RAM)      // RAM
3041		AM_RANGE(0x7000, 0x7fff) AM_WRITE(SMH_BANK2)   // RAM (Banked)
	2925	AM_RANGE(0x8000, 0xffff) AM_ROMBANK(1)                  // ROM (Banked)
3042	2926	AM_RANGE(0xe000, 0xe1ff) AM_WRITE(rongrong_palette_w)
3043	2927	AM_RANGE(0xe700, 0xe706) AM_WRITENOP
3044	2928	ADDRESS_MAP_END
3045	2929
3046	2930
3047		static ADDRESS_MAP_START( hgokou_readport, ADDRESS_SPACE_IO, 8 )   ADDRESS_MAP_GLOBAL_MASK(0xff)
3048		AM_RANGE(0x03, 0x03) AM_READ(rongrong_gfxrom_r)
3049		AM_RANGE(0x1c, 0x1c) AM_READNOP                  // ? ack on RTC int
3050		AM_RANGE(0x20, 0x2f) AM_DEVREAD("rtc", msm6242_r)   // 6242RTC
3051		AM_RANGE(0x58, 0x58) AM_READ(unk_r)                     // ? must be 78 on startup
3052		AM_RANGE(0x62, 0x62) AM_READ(hgokou_input_r)
3053		AM_RANGE(0x80, 0x80) AM_DEVREAD("oki", okim6295_r)
3054		AM_RANGE(0x84, 0x84) AM_DEVREAD("ay", ay8910_r)
3055		AM_RANGE(0xb0, 0xb0) AM_READ(hanakanz_rand_r)
3056		ADDRESS_MAP_END
3057		static ADDRESS_MAP_START( hgokou_writeport, ADDRESS_SPACE_IO, 8 )   ADDRESS_MAP_GLOBAL_MASK(0xff)
	2931	static ADDRESS_MAP_START( hgokou_portmap, ADDRESS_SPACE_IO, 8 )   ADDRESS_MAP_GLOBAL_MASK(0xff)
3058	2932	AM_RANGE(0x00, 0x01) AM_WRITE(hginga_blitter_w)
3059		AM_RANGE(0x1c, 0x1c) AM_WRITE(mjmyster_rambank_w)
	2933	AM_RANGE(0x03, 0x03) AM_READ(rongrong_gfxrom_r)
	2934	AM_RANGE(0x1c, 0x1c) AM_READNOP AM_WRITE(mjmyster_rambank_w)      // ? ack on RTC int
3060	2935	AM_RANGE(0x1e, 0x1e) AM_WRITE(hginga_rombank_w)
3061		AM_RANGE(0x20, 0x2f) AM_DEVWRITE("rtc", msm6242_w)   // 6242RTC
	2936	AM_RANGE(0x20, 0x2f) AM_DEVREADWRITE("rtc", msm6242_r, msm6242_w)   // 6242RTC
3062	2937	AM_RANGE(0x40, 0x43) AM_WRITE(ddenlovr_palette_base_w)
3063	2938	AM_RANGE(0x44, 0x47) AM_WRITE(ddenlovr_palette_mask_w)
3064	2939	AM_RANGE(0x48, 0x4b) AM_WRITE(ddenlovr_transparency_pen_w)
r4679	r4680
3066	2941	AM_RANGE(0x54, 0x54) AM_WRITE(ddenlovr_bgcolor_w)
3067	2942	AM_RANGE(0x55, 0x55) AM_WRITE(ddenlovr_priority_w)
3068	2943	AM_RANGE(0x56, 0x56) AM_WRITE(ddenlovr_layer_enable_w)
	2944	AM_RANGE(0x58, 0x58) AM_READ(unk_r)                           // ? must be 78 on startup
3069	2945	AM_RANGE(0x60, 0x60) AM_WRITE(hginga_input_w)
3070	2946	AM_RANGE(0x61, 0x61) AM_WRITE(hgokou_input_w)
3071		AM_RANGE(0x80, 0x80) AM_DEVWRITE("oki", okim6295_w)
	2947	AM_RANGE(0x62, 0x62) AM_READ(hgokou_input_r)
	2948	AM_RANGE(0x80, 0x80) AM_DEVREADWRITE("oki", okim6295_r, okim6295_w)
3072	2949	AM_RANGE(0x82, 0x83) AM_DEVWRITE("ym", ym2413_w)
	2950	AM_RANGE(0x84, 0x84) AM_DEVREAD("ay", ay8910_r)
3073	2951	AM_RANGE(0x86, 0x86) AM_DEVWRITE("ay", ay8910_data_w)
3074	2952	AM_RANGE(0x88, 0x88) AM_DEVWRITE("ay", ay8910_address_w)
	2953	AM_RANGE(0xb0, 0xb0) AM_READ(hanakanz_rand_r)
3075	2954	ADDRESS_MAP_END
3076	2955
3077	2956
r4679	r4680
3130	3009	}
3131	3010	}
3132	3011
3133		static ADDRESS_MAP_START( hparadis_readmem, ADDRESS_SPACE_PROGRAM, 8 )
3134		AM_RANGE(0x0000, 0x5fff) AM_READ(SMH_ROM)   // ROM
3135		AM_RANGE(0x6000, 0x6fff) AM_READ(SMH_RAM)   // RAM
3136		AM_RANGE(0x7000, 0x7fff) AM_READ(SMH_BANK2)   // RAM (Banked)
3137		AM_RANGE(0x8000, 0xffff) AM_READ(SMH_BANK1)   // ROM (Banked)
3138		ADDRESS_MAP_END
3139		static ADDRESS_MAP_START( hparadis_writemem, ADDRESS_SPACE_PROGRAM, 8 )
3140		AM_RANGE(0x6000, 0x6fff) AM_WRITE(SMH_RAM)      // RAM
3141		AM_RANGE(0x7000, 0x7fff) AM_WRITE(SMH_BANK2)   // RAM (Banked)
	3012	static ADDRESS_MAP_START( hparadis_map, ADDRESS_SPACE_PROGRAM, 8 )
	3013	AM_RANGE(0x0000, 0x5fff) AM_ROM                        // ROM
	3014	AM_RANGE(0x6000, 0x6fff) AM_RAM                        // RAM
	3015	AM_RANGE(0x7000, 0x7fff) AM_RAMBANK(2)                  // RAM (Banked)
	3016	AM_RANGE(0x8000, 0xffff) AM_ROMBANK(1)                  // ROM (Banked)
3142	3017	AM_RANGE(0xc000, 0xc1ff) AM_WRITE(rongrong_palette_w)
3143	3018	ADDRESS_MAP_END
3144	3019
3145	3020	// the RTC seems unused
3146		static ADDRESS_MAP_START( hparadis_readport, ADDRESS_SPACE_IO, 8 )   ADDRESS_MAP_GLOBAL_MASK(0xff)
	3021	static ADDRESS_MAP_START( hparadis_portmap, ADDRESS_SPACE_IO, 8 )   ADDRESS_MAP_GLOBAL_MASK(0xff)
	3022	AM_RANGE(0x00, 0x01) AM_WRITE(rongrong_blitter_w)
3147	3023	AM_RANGE(0x03, 0x03) AM_READ(rongrong_gfxrom_r)
3148		AM_RANGE(0x1b, 0x1b) AM_READ(rongrong_blitter_busy_r)
	3024	AM_RANGE(0x1b, 0x1b) AM_READWRITE(rongrong_blitter_busy_r, rongrong_blitter_busy_w)
3149	3025	AM_RANGE(0x1c, 0x1c) AM_READ(hparadis_dsw_r)
3150		AM_RANGE(0x40, 0x40) AM_DEVREAD("oki", okim6295_r)
3151		AM_RANGE(0x98, 0x98) AM_READ(unk_r)   // ? must be 78 on startup
3152		AM_RANGE(0xa2, 0xa3) AM_READ(hparadis_input_r)
3153		ADDRESS_MAP_END
3154		static ADDRESS_MAP_START( hparadis_writeport, ADDRESS_SPACE_IO, 8 )   ADDRESS_MAP_GLOBAL_MASK(0xff)
3155		AM_RANGE(0x00, 0x01) AM_WRITE(rongrong_blitter_w)
3156		AM_RANGE(0x1b, 0x1b) AM_WRITE(rongrong_blitter_busy_w)
3157	3026	AM_RANGE(0x1e, 0x1e) AM_WRITE(hparadis_select_w)
3158		AM_RANGE(0x40, 0x40) AM_DEVWRITE("oki", okim6295_w)
	3027	AM_RANGE(0x40, 0x40) AM_DEVREADWRITE("oki", okim6295_r, okim6295_w)
3159	3028	AM_RANGE(0x60, 0x61) AM_DEVWRITE("ym", ym2413_w)
3160	3029	AM_RANGE(0x80, 0x83) AM_WRITE(ddenlovr_palette_base_w)
3161	3030	AM_RANGE(0x84, 0x87) AM_WRITE(ddenlovr_palette_mask_w)
r4679	r4680
3164	3033	AM_RANGE(0x94, 0x94) AM_WRITE(ddenlovr_bgcolor_w)
3165	3034	AM_RANGE(0x95, 0x95) AM_WRITE(ddenlovr_priority_w)
3166	3035	AM_RANGE(0x96, 0x96) AM_WRITE(ddenlovr_layer_enable_w)
	3036	AM_RANGE(0x98, 0x98) AM_READ(unk_r)   // ? must be 78 on startup
3167	3037	AM_RANGE(0xa0, 0xa0) AM_WRITE(hginga_input_w)
3168	3038	AM_RANGE(0xa1, 0xa1) AM_WRITE(hparadis_coin_w)
	3039	AM_RANGE(0xa2, 0xa3) AM_READ(hparadis_input_r)
3169	3040	AM_RANGE(0xc2, 0xc2) AM_WRITENOP   // enables palette RAM at c000
3170	3041	ADDRESS_MAP_END
3171	3042
r4679	r4680
3189	3060	return 0xff;
3190	3061	}
3191	3062
3192		static ADDRESS_MAP_START( mjmywrld_readport, ADDRESS_SPACE_IO, 8 )   ADDRESS_MAP_GLOBAL_MASK(0xff)
3193		AM_RANGE(0x03, 0x03) AM_READ(rongrong_gfxrom_r)
3194		AM_RANGE(0x22, 0x22) AM_READ(mjmywrld_coins_r)
3195		AM_RANGE(0x23, 0x23) AM_READ(mjmyster_keyb_r)
3196		AM_RANGE(0x40, 0x40) AM_DEVREAD("oki", okim6295_r)
3197		AM_RANGE(0x44, 0x44) AM_DEVREAD("ay", ay8910_r)
3198		AM_RANGE(0x60, 0x6f) AM_DEVREAD("rtc", msm6242_r)   // 6242RTC
3199		AM_RANGE(0x98, 0x98) AM_READ(unk_r)   // ? must be 78 on startup
3200		AM_RANGE(0xc0, 0xc0) AM_READ(hanakanz_rand_r)
3201		AM_RANGE(0xe0, 0xe0) AM_READ(mjmyster_dsw_r)
3202		ADDRESS_MAP_END
3203
3204		static ADDRESS_MAP_START( mjmywrld_writeport, ADDRESS_SPACE_IO, 8 )   ADDRESS_MAP_GLOBAL_MASK(0xff)
	3063	static ADDRESS_MAP_START( mjmywrld_portmap, ADDRESS_SPACE_IO, 8 )   ADDRESS_MAP_GLOBAL_MASK(0xff)
3205	3064	AM_RANGE(0x00, 0x01) AM_WRITE(mjmyster_blitter_w)
	3065	AM_RANGE(0x03, 0x03) AM_READ(rongrong_gfxrom_r)
3206	3066	AM_RANGE(0x1c, 0x1c) AM_WRITE(mjmyster_rambank_w)
3207	3067	AM_RANGE(0x1e, 0x1e) AM_WRITE(hginga_rombank_w)
3208	3068	AM_RANGE(0x20, 0x20) AM_WRITE(mjmyster_select2_w)
3209	3069	AM_RANGE(0x21, 0x21) AM_WRITE(mjmyster_coincounter_w)
3210		AM_RANGE(0x40, 0x40) AM_DEVWRITE("oki", okim6295_w)
	3070	AM_RANGE(0x22, 0x22) AM_READ(mjmywrld_coins_r)
	3071	AM_RANGE(0x23, 0x23) AM_READ(mjmyster_keyb_r)
	3072	AM_RANGE(0x40, 0x40) AM_DEVREADWRITE("oki", okim6295_r, okim6295_w)
3211	3073	AM_RANGE(0x42, 0x43) AM_DEVWRITE("ym", ym2413_w)
	3074	AM_RANGE(0x44, 0x44) AM_DEVREAD("ay", ay8910_r)
3212	3075	AM_RANGE(0x46, 0x46) AM_DEVWRITE("ay", ay8910_data_w)
3213	3076	AM_RANGE(0x48, 0x48) AM_DEVWRITE("ay", ay8910_address_w)
3214		AM_RANGE(0x60, 0x6f) AM_DEVWRITE("rtc", msm6242_w)   // 6242RTC
	3077	AM_RANGE(0x60, 0x6f) AM_DEVREADWRITE("rtc", msm6242_r, msm6242_w)   // 6242RTC
3215	3078	AM_RANGE(0x80, 0x83) AM_WRITE(ddenlovr_palette_base_w)
3216	3079	AM_RANGE(0x84, 0x87) AM_WRITE(ddenlovr_palette_mask_w)
3217	3080	AM_RANGE(0x88, 0x8b) AM_WRITE(ddenlovr_transparency_pen_w)
r4679	r4680
3219	3082	AM_RANGE(0x94, 0x94) AM_WRITE(ddenlovr_bgcolor_w)
3220	3083	AM_RANGE(0x95, 0x95) AM_WRITE(ddenlovr_priority_w)
3221	3084	AM_RANGE(0x96, 0x96) AM_WRITE(ddenlovr_layer_enable_w)
	3085	AM_RANGE(0x98, 0x98) AM_READ(unk_r)   // ? must be 78 on startup
	3086	AM_RANGE(0xc0, 0xc0) AM_READ(hanakanz_rand_r)
	3087	AM_RANGE(0xe0, 0xe0) AM_READ(mjmyster_dsw_r)
3222	3088	ADDRESS_MAP_END
3223	3089
3224	3090
r4679	r4680
3268	3134	return 0xffff;   // read but not used, it seems
3269	3135	}
3270	3136
3271		static ADDRESS_MAP_START( akamaru_readmem, ADDRESS_SPACE_PROGRAM, 16 )
3272		AM_RANGE(0x000000, 0x1fffff) AM_READ(SMH_ROM)            // ROM
	3137	static ADDRESS_MAP_START( akamaru_map, ADDRESS_SPACE_PROGRAM, 16 )
	3138	AM_RANGE(0x000000, 0x1fffff) AM_ROM                                          // ROM
	3139
	3140	AM_RANGE(0x213570, 0x213571) AM_WRITE(akamaru_protection1_w)                     // OKI bank
3273	3141	AM_RANGE(0x624680, 0x624681) AM_READ(akamaru_protection1_r)
3274		AM_RANGE(0xe00086, 0xe00087) AM_READ(ddenlovr_gfxrom_r)      // Video Chip
3275		AM_RANGE(0xe00070, 0xe00071) AM_READ(unk16_r)            // ? must be 78 on startup (not necessary in ddlover)
3276		AM_RANGE(0xe00100, 0xe00101) AM_READ_PORT("P1")
3277		AM_RANGE(0xe00102, 0xe00103) AM_READ_PORT("P2")
3278		AM_RANGE(0xe00104, 0xe00105) AM_READ_PORT("SYSTEM")
3279		AM_RANGE(0xe00106, 0xe00107) AM_READ(akamaru_protection2_r)
3280		AM_RANGE(0xe0010c, 0xe0010d) AM_READ(akamaru_e0010d_r)
3281		AM_RANGE(0xe00200, 0xe00201) AM_READ(akamaru_dsw_r)         // DSW
3282		AM_RANGE(0xe00204, 0xe00205) AM_READ(akamaru_blitter_r)      // Blitter Busy & IRQ
3283		AM_RANGE(0xe00500, 0xe0051f) AM_DEVREAD8("rtc", msm6242_r, 0x00ff)   // 6242RTC
3284		AM_RANGE(0xe00604, 0xe00605) AM_DEVREAD8("ay", ay8910_r, 0x00ff)
3285		AM_RANGE(0xe00700, 0xe00701) AM_DEVREAD8("oki", okim6295_r, 0x00ff)            // Sound
3286		AM_RANGE(0xff0000, 0xffffff) AM_READ(SMH_RAM)                        // RAM
3287		ADDRESS_MAP_END
3288	3142
3289		static ADDRESS_MAP_START( akamaru_writemem, ADDRESS_SPACE_PROGRAM, 16 )
3290		AM_RANGE(0x000000, 0x1fffff) AM_WRITE(SMH_ROM)               // ROM
3291		AM_RANGE(0x213570, 0x213571) AM_WRITE(akamaru_protection1_w)   // OKI bank
3292		AM_RANGE(0xd00000, 0xd003ff) AM_WRITE(ddenlovr_palette_w)      // Palette
3293		//  AM_RANGE(0xd01000, 0xd017ff) AM_WRITE(SMH_RAM)                  // 0
	3143	AM_RANGE(0xd00000, 0xd003ff) AM_WRITE(ddenlovr_palette_w)                        // Palette
	3144	//  AM_RANGE(0xd01000, 0xd017ff) AM_WRITE(SMH_RAM)                                          // 0
	3145
3294	3146	AM_RANGE(0xe00040, 0xe00047) AM_WRITE(ddenlovr16_palette_base_w)
3295	3147	AM_RANGE(0xe00048, 0xe0004f) AM_WRITE(ddenlovr16_palette_mask_w)
3296	3148	AM_RANGE(0xe00050, 0xe00057) AM_WRITE(ddenlovr16_transparency_pen_w)
r4679	r4680
3298	3150	AM_RANGE(0xe00068, 0xe00069) AM_WRITE(ddenlovr16_bgcolor_w)
3299	3151	AM_RANGE(0xe0006a, 0xe0006b) AM_WRITE(ddenlovr16_priority_w)
3300	3152	AM_RANGE(0xe0006c, 0xe0006d) AM_WRITE(ddenlovr16_layer_enable_w)
	3153	AM_RANGE(0xe00070, 0xe00071) AM_READ(unk16_r)                                 // ? must be 78 on startup (not necessary in ddlover)
3301	3154	AM_RANGE(0xe00080, 0xe00083) AM_WRITE(ddenlovr_blitter_w)
	3155	AM_RANGE(0xe00086, 0xe00087) AM_READ(ddenlovr_gfxrom_r)                           // Video Chip
	3156
	3157	AM_RANGE(0xe00100, 0xe00101) AM_READ_PORT("P1")
	3158	AM_RANGE(0xe00102, 0xe00103) AM_READ_PORT("P2")
	3159	AM_RANGE(0xe00104, 0xe00105) AM_READ_PORT("SYSTEM")
	3160
	3161	AM_RANGE(0xe00106, 0xe00107) AM_READ(akamaru_protection2_r)
3302	3162	AM_RANGE(0xe00108, 0xe0010b) AM_WRITE(SMH_RAM) AM_BASE( &akamaru_protection2)
3303		AM_RANGE(0xe00302, 0xe00303) AM_WRITE(ddenlovr_blitter_irq_ack_w)         // Blitter irq acknowledge
3304		AM_RANGE(0xe00304, 0xe00307) AM_WRITE(SMH_RAM) AM_BASE( &akamaru_dsw_sel)   // DSW select
3305		AM_RANGE(0xe00308, 0xe00309) AM_WRITE(ddenlovr_coincounter_0_w)            // Coin Counters
3306		AM_RANGE(0xe0030c, 0xe0030d) AM_WRITE(ddenlovr_coincounter_1_w)            //
	3163
	3164	AM_RANGE(0xe0010c, 0xe0010d) AM_READ(akamaru_e0010d_r)
	3165	AM_RANGE(0xe00200, 0xe00201) AM_READ(akamaru_dsw_r)                              // DSW
	3166
	3167	AM_RANGE(0xe00204, 0xe00205) AM_READ(akamaru_blitter_r)                           // Blitter Busy & IRQ
	3168	AM_RANGE(0xe00302, 0xe00303) AM_WRITE(ddenlovr_blitter_irq_ack_w)                  // Blitter irq acknowledge
	3169
	3170	AM_RANGE(0xe00304, 0xe00307) AM_WRITE(SMH_RAM) AM_BASE( &akamaru_dsw_sel)            // DSW select
	3171	AM_RANGE(0xe00308, 0xe00309) AM_WRITE(ddenlovr_coincounter_0_w)                     // Coin Counters
	3172	AM_RANGE(0xe0030c, 0xe0030d) AM_WRITE(ddenlovr_coincounter_1_w)                     //
	3173
3307	3174	AM_RANGE(0xe00400, 0xe00403) AM_DEVWRITE8("ym", ym2413_w, 0x00ff)
3308		AM_RANGE(0xe00500, 0xe0051f) AM_DEVWRITE8("rtc", msm6242_w, 0x00ff)   // 6242RTC
	3175	AM_RANGE(0xe00500, 0xe0051f) AM_DEVREADWRITE8("rtc", msm6242_r, msm6242_w, 0x00ff)      // 6242RTC
3309	3176	AM_RANGE(0xe00600, 0xe00603) AM_DEVWRITE8("ay", ay8910_address_data_w, 0x00ff)
3310		AM_RANGE(0xe00700, 0xe00701) AM_DEVWRITE8("oki", okim6295_w, 0x00ff)
3311		AM_RANGE(0xff0000, 0xffffff) AM_WRITE(SMH_RAM)                        // RAM
	3177	AM_RANGE(0xe00604, 0xe00605) AM_DEVREAD8("ay", ay8910_r, 0x00ff)
	3178	AM_RANGE(0xe00700, 0xe00701) AM_DEVREADWRITE8("oki", okim6295_r, okim6295_w, 0x00ff)   // Sound
	3179	AM_RANGE(0xff0000, 0xffffff) AM_RAM                                          // RAM
3312	3180	ADDRESS_MAP_END
3313	3181
3314	3182
r4679	r4680
3373	3241	}
3374	3242	}
3375	3243
3376		static ADDRESS_MAP_START( mjflove_readport, ADDRESS_SPACE_IO, 8 )   // 16 bit I/O
	3244	static ADDRESS_MAP_START( mjflove_portmap, ADDRESS_SPACE_IO, 8 )   // 16 bit I/O
3377	3245	AM_RANGE(0x0010, 0x0010) AM_READ(hanakanz_rand_r) AM_MIRROR(0xff00)
3378	3246	AM_RANGE(0x001c, 0x001c) AM_READ_PORT("DSW2") AM_MIRROR(0xff00)
3379		AM_RANGE(0x0038, 0x0038) AM_READNOP         // ? ack or watchdog
3380		AM_RANGE(0x0043, 0x0043) AM_READ(rongrong_gfxrom_r)
3381		AM_RANGE(0x0080, 0x0081) AM_READ(mjflove_keyb_r)
3382		AM_RANGE(0x0082, 0x0082) AM_READ_PORT("SYSTEM")
3383		AM_RANGE(0x00da, 0x00da) AM_READ(mjflove_protection_r) AM_MIRROR(0xff00)
3384		AM_RANGE(0x0100, 0x0100) AM_READ_PORT("DSW1")
3385		AM_RANGE(0x0280, 0x028f) AM_DEVREAD("rtc", msm6242_r)   // 6242RTC
3386		AM_RANGE(0x0380, 0x0380) AM_DEVREAD("oki", okim6295_r)
3387		ADDRESS_MAP_END
3388
3389		static ADDRESS_MAP_START( mjflove_writeport, ADDRESS_SPACE_IO, 8 )   // 16 bit I/O
3390	3247	AM_RANGE(0x001e, 0x001e) AM_WRITE(hanakanz_keyb_w) AM_MIRROR(0xff00)
3391	3248	AM_RANGE(0x0020, 0x0023) AM_WRITE(ddenlovr_palette_base_w)
3392	3249	AM_RANGE(0x0024, 0x0027) AM_WRITE(ddenlovr_palette_mask_w)
r4679	r4680
3395	3252	AM_RANGE(0x0034, 0x0034) AM_WRITE(ddenlovr_bgcolor_w)
3396	3253	AM_RANGE(0x0035, 0x0035) AM_WRITE(ddenlovr_priority_w)
3397	3254	AM_RANGE(0x0036, 0x0036) AM_WRITE(ddenlovr_layer_enable_w)
	3255	AM_RANGE(0x0038, 0x0038) AM_READNOP         // ? ack or watchdog
3398	3256	AM_RANGE(0x0040, 0x0041) AM_WRITE(mjflove_blitter_w) AM_MIRROR(0xff00)
	3257	AM_RANGE(0x0043, 0x0043) AM_READ(rongrong_gfxrom_r)
	3258	AM_RANGE(0x0080, 0x0081) AM_READ(mjflove_keyb_r)
	3259	AM_RANGE(0x0082, 0x0082) AM_READ_PORT("SYSTEM")
	3260	AM_RANGE(0x00da, 0x00da) AM_READ(mjflove_protection_r) AM_MIRROR(0xff00)
3399	3261	AM_RANGE(0x00f2, 0x00f2) AM_WRITE(mjmyster_rambank_w) AM_MIRROR(0xff00)
3400	3262	AM_RANGE(0x00f8, 0x00f8) AM_WRITE(mjflove_rombank_w) AM_MIRROR(0xff00)
3401	3263	AM_RANGE(0x00fa, 0x00fa) AM_DEVWRITE("oki", mjflove_okibank_w)
	3264	AM_RANGE(0x0100, 0x0100) AM_READ_PORT("DSW1")
3402	3265	AM_RANGE(0x0181, 0x0181) AM_WRITENOP                  // ? int. enable
3403	3266	AM_RANGE(0x0184, 0x0184) AM_WRITE(mjflove_coincounter_w)
3404	3267	AM_RANGE(0x0200, 0x0201) AM_DEVWRITE("ym", ym2413_w)
3405		AM_RANGE(0x0280, 0x028f) AM_DEVWRITE("rtc", msm6242_w)   // 6242RTC
	3268	AM_RANGE(0x0280, 0x028f) AM_DEVREADWRITE("rtc", msm6242_r, msm6242_w)   // 6242RTC
3406	3269	AM_RANGE(0x0300, 0x0301) AM_DEVWRITE("ay", ay8910_address_data_w)
3407		AM_RANGE(0x0380, 0x0380) AM_DEVWRITE("oki", okim6295_w)
	3270	AM_RANGE(0x0380, 0x0380) AM_DEVREADWRITE("oki", okim6295_r, okim6295_w)
3408	3271	ADDRESS_MAP_END
3409	3272
3410	3273	/***************************************************************************
r4679	r4680
3427	3290	return 0x04;   // !bit 2 = blitter busy
3428	3291	}
3429	3292
3430		static ADDRESS_MAP_START( jongtei_readport, ADDRESS_SPACE_IO, 8 )   ADDRESS_MAP_GLOBAL_MASK(0xff)
3431		AM_RANGE(0x2c, 0x2c) AM_READ(jongtei_busy_r)
3432		AM_RANGE(0x32, 0x32) AM_READ(hanakanz_dsw_r)
3433		AM_RANGE(0x40, 0x40) AM_READ_PORT("SYSTEM")
3434		AM_RANGE(0x41, 0x42) AM_READ(hanakanz_keyb_r)
3435		AM_RANGE(0x46, 0x46) AM_READ(hanakanz_rand_r)
3436		AM_RANGE(0x63, 0x64) AM_READ(hanakanz_gfxrom_r)
3437		AM_RANGE(0xa0, 0xa0) AM_DEVREAD("oki", okim6295_r)
3438		AM_RANGE(0xc0, 0xcf) AM_DEVREAD("rtc", msm6242_r)   // 6242RTC
3439		ADDRESS_MAP_END
3440		static ADDRESS_MAP_START( jongtei_writeport, ADDRESS_SPACE_IO, 8 )   ADDRESS_MAP_GLOBAL_MASK(0xff)
3441		AM_RANGE(0x2c, 0x2c) AM_DEVWRITE("oki", jongtei_okibank_w)
	3293	static ADDRESS_MAP_START( jongtei_portmap, ADDRESS_SPACE_IO, 8 )   ADDRESS_MAP_GLOBAL_MASK(0xff)
	3294	AM_RANGE(0x2c, 0x2c) AM_READ(jongtei_busy_r) AM_DEVWRITE("oki", jongtei_okibank_w)
3442	3295	AM_RANGE(0x2e, 0x2e) AM_WRITE(hanakanz_blitter_reg_w)
3443	3296	AM_RANGE(0x30, 0x30) AM_WRITE(hanakanz_rombank_w)
3444	3297	AM_RANGE(0x31, 0x31) AM_WRITE(jongtei_dsw_keyb_w)
	3298	AM_RANGE(0x32, 0x32) AM_READ(hanakanz_dsw_r)
	3299	AM_RANGE(0x40, 0x40) AM_READ_PORT("SYSTEM")
	3300	AM_RANGE(0x41, 0x42) AM_READ(hanakanz_keyb_r)
3445	3301	AM_RANGE(0x43, 0x43) AM_WRITE(hanakanz_coincounter_w)
	3302	AM_RANGE(0x46, 0x46) AM_READ(hanakanz_rand_r)
3446	3303	AM_RANGE(0x60, 0x60) AM_WRITE(hanakanz_blitter_data_w)
3447	3304	AM_RANGE(0x61, 0x61) AM_WRITE(hanakanz_palette_w)
	3305	AM_RANGE(0x63, 0x64) AM_READ(hanakanz_gfxrom_r)
3448	3306	AM_RANGE(0x80, 0x81) AM_DEVWRITE("ym", ym2413_w)
3449		AM_RANGE(0xa0, 0xa0) AM_DEVWRITE("oki", okim6295_w)
3450		AM_RANGE(0xc0, 0xcf) AM_DEVWRITE("rtc", msm6242_w)   // 6242RTC
	3307	AM_RANGE(0xa0, 0xa0) AM_DEVREADWRITE("oki", okim6295_r, okim6295_w)
	3308	AM_RANGE(0xc0, 0xcf) AM_DEVREADWRITE("rtc", msm6242_r, msm6242_w)   // 6242RTC
3451	3309	ADDRESS_MAP_END
3452	3310
3453	3311
r4679	r4680
6815	6673
6816	6674	/* basic machine hardware */
6817	6675	MDRV_CPU_ADD("maincpu",M68000, XTAL_24MHz / 2)
6818		MDRV_CPU_PROGRAM_MAP(ddenlovr_readmem,ddenlovr_writemem)
	6676	MDRV_CPU_PROGRAM_MAP(ddenlovr_map,0)
6819	6677	MDRV_CPU_VBLANK_INT("screen", irq1_line_hold)
6820	6678
6821	6679	/* video hardware */
r4679	r4680
6854	6712	/* basic machine hardware */
6855	6713	MDRV_IMPORT_FROM(ddenlovr)
6856	6714	MDRV_CPU_MODIFY("maincpu")
6857		MDRV_CPU_PROGRAM_MAP(ddenlvrj_readmem,ddenlvrj_writemem)
	6715	MDRV_CPU_PROGRAM_MAP(ddenlvrj_map,0)
6858	6716	MACHINE_DRIVER_END
6859	6717
6860	6718	static MACHINE_DRIVER_START( ddenlvrk )
6861	6719	MDRV_IMPORT_FROM(ddenlovr)
6862	6720	MDRV_CPU_MODIFY("maincpu")
6863		MDRV_CPU_PROGRAM_MAP(ddenlvrk_readmem,ddenlvrk_writemem)
	6721	MDRV_CPU_PROGRAM_MAP(ddenlvrk_map,0)
6864	6722	MACHINE_DRIVER_END
6865	6723
6866	6724	static MACHINE_DRIVER_START( akamaru )
r4679	r4680
6868	6726	/* basic machine hardware */
6869	6727	MDRV_IMPORT_FROM(ddenlovr)
6870	6728	MDRV_CPU_MODIFY("maincpu")
6871		MDRV_CPU_PROGRAM_MAP(akamaru_readmem,akamaru_writemem)
	6729	MDRV_CPU_PROGRAM_MAP(akamaru_map,0)
6872	6730	MACHINE_DRIVER_END
6873	6731
6874	6732
r4679	r4680
6887	6745	/* basic machine hardware */
6888	6746	MDRV_IMPORT_FROM(ddenlovr)
6889	6747	MDRV_CPU_MODIFY("maincpu")
6890		MDRV_CPU_PROGRAM_MAP(quiz365_readmem,quiz365_writemem)
	6748	MDRV_CPU_PROGRAM_MAP(quiz365_map,0)
6891	6749
6892	6750	MDRV_SOUND_MODIFY("ay")
6893	6751	MDRV_SOUND_CONFIG(quiz365_ay8910_interface)
r4679	r4680
6899	6757	/* basic machine hardware */
6900	6758	MDRV_IMPORT_FROM(ddenlovr)
6901	6759	MDRV_CPU_MODIFY("maincpu")
6902		MDRV_CPU_PROGRAM_MAP(nettoqc_readmem,nettoqc_writemem)
	6760	MDRV_CPU_PROGRAM_MAP(nettoqc_map,0)
6903	6761	MACHINE_DRIVER_END
6904	6762
6905	6763	/***************************************************************************
r4679	r4680
6940	6798
6941	6799	/* basic machine hardware */
6942	6800	MDRV_CPU_ADD("maincpu", Z80, 8000000)   /* ? */
6943		MDRV_CPU_PROGRAM_MAP(quizchq_readmem,quizchq_writemem)
6944		MDRV_CPU_IO_MAP(quizchq_readport,quizchq_writeport)
	6801	MDRV_CPU_PROGRAM_MAP(quizchq_map,0)
	6802	MDRV_CPU_IO_MAP(quizchq_portmap,0)
6945	6803	MDRV_CPU_VBLANK_INT("screen", quizchq_irq)
6946	6804
6947	6805	/* video hardware */
r4679	r4680
6977	6835	/* basic machine hardware */
6978	6836	MDRV_IMPORT_FROM(quizchq)
6979	6837	MDRV_CPU_MODIFY("maincpu")
6980		MDRV_CPU_PROGRAM_MAP(rongrong_readmem,rongrong_writemem)
6981		MDRV_CPU_IO_MAP(rongrong_readport,rongrong_writeport)
	6838	MDRV_CPU_PROGRAM_MAP(rongrong_map,0)
	6839	MDRV_CPU_IO_MAP(rongrong_portmap,0)
6982	6840	MACHINE_DRIVER_END
6983	6841
6984	6842	/***************************************************************************
r4679	r4680
7013	6871
7014	6872	/* basic machine hardware */
7015	6873	MDRV_CPU_ADD("maincpu", Z80, 8000000)
7016		MDRV_CPU_PROGRAM_MAP(mmpanic_readmem,mmpanic_writemem)
7017		MDRV_CPU_IO_MAP(mmpanic_readport,mmpanic_writeport)
	6874	MDRV_CPU_PROGRAM_MAP(mmpanic_map,0)
	6875	MDRV_CPU_IO_MAP(mmpanic_portmap,0)
7018	6876	MDRV_CPU_VBLANK_INT("screen", mmpanic_irq)
7019	6877
7020	6878	MDRV_CPU_ADD("soundcpu", Z80, 3579545)
7021		MDRV_CPU_PROGRAM_MAP(mmpanic_sound_readmem,mmpanic_sound_writemem)
7022		MDRV_CPU_IO_MAP(mmpanic_sound_readport,mmpanic_sound_writeport)
	6879	MDRV_CPU_PROGRAM_MAP(mmpanic_sound_map,0)
	6880	MDRV_CPU_IO_MAP(mmpanic_sound_portmap,0)
7023	6881	MDRV_CPU_VBLANK_INT("screen", irq0_line_hold)   // NMI by main cpu
7024	6882
7025	6883	/* video hardware */
r4679	r4680
7085	6943
7086	6944	/* basic machine hardware */
7087	6945	MDRV_CPU_ADD("maincpu",Z80,8000000)   // TMPZ84C015BF-8
7088		MDRV_CPU_PROGRAM_MAP(hanakanz_readmem,hanakanz_writemem)
7089		MDRV_CPU_IO_MAP(hanakanz_readport,hanakanz_writeport)
	6946	MDRV_CPU_PROGRAM_MAP(hanakanz_map,0)
	6947	MDRV_CPU_IO_MAP(hanakanz_portmap,0)
7090	6948	MDRV_CPU_VBLANK_INT("screen", hanakanz_irq)
7091	6949
7092	6950	/* video hardware */
r4679	r4680
7121	6979	/* basic machine hardware */
7122	6980	MDRV_IMPORT_FROM( hanakanz )
7123	6981	MDRV_CPU_MODIFY("maincpu")
7124		MDRV_CPU_IO_MAP(hkagerou_readport,hkagerou_writeport)
	6982	MDRV_CPU_IO_MAP(hkagerou_portmap,0)
7125	6983	MACHINE_DRIVER_END
7126	6984
7127	6985	static MACHINE_DRIVER_START( mjreach1 )
7128	6986	/* basic machine hardware */
7129	6987	MDRV_IMPORT_FROM( hanakanz )
7130	6988	MDRV_CPU_MODIFY("maincpu")
7131		MDRV_CPU_IO_MAP(mjreach1_readport,mjreach1_writeport)
	6989	MDRV_CPU_IO_MAP(mjreach1_portmap,0)
7132	6990	MACHINE_DRIVER_END
7133	6991
7134	6992
r4679	r4680
7162	7020	/* basic machine hardware */
7163	7021	MDRV_IMPORT_FROM( hanakanz )
7164	7022	MDRV_CPU_MODIFY("maincpu")
7165		MDRV_CPU_IO_MAP(mjchuuka_readport,mjchuuka_writeport)
	7023	MDRV_CPU_IO_MAP(mjchuuka_portmap,0)
7166	7024	MDRV_CPU_VBLANK_INT("screen", mjchuuka_irq)
7167	7025
7168	7026	MDRV_SOUND_ADD("ay", AY8910, 1789772)
r4679	r4680
7174	7032
7175	7033	MDRV_IMPORT_FROM(mmpanic)
7176	7034	MDRV_CPU_MODIFY("maincpu")
7177		MDRV_CPU_PROGRAM_MAP(funkyfig_readmem,funkyfig_writemem)
7178		MDRV_CPU_IO_MAP(funkyfig_readport,funkyfig_writeport)
	7035	MDRV_CPU_PROGRAM_MAP(funkyfig_map,0)
	7036	MDRV_CPU_IO_MAP(funkyfig_portmap,0)
7179	7037	MDRV_CPU_VBLANK_INT("screen", mjchuuka_irq)
7180	7038
7181	7039	MDRV_CPU_MODIFY("soundcpu")
7182		MDRV_CPU_IO_MAP(funkyfig_sound_readport,mmpanic_sound_writeport)
	7040	MDRV_CPU_IO_MAP(funkyfig_sound_portmap,0)
7183	7041
7184	7042	MDRV_VIDEO_START(ddenlovr)   // no extra layers?
7185	7043	MACHINE_DRIVER_END
r4679	r4680
7235	7093	/* basic machine hardware */
7236	7094	MDRV_IMPORT_FROM( quizchq )
7237	7095	MDRV_CPU_MODIFY("maincpu")
7238		MDRV_CPU_PROGRAM_MAP(mjmyster_readmem,mjmyster_writemem)
7239		MDRV_CPU_IO_MAP(mjmyster_readport,mjmyster_writeport)
	7096	MDRV_CPU_PROGRAM_MAP(mjmyster_map,0)
	7097	MDRV_CPU_IO_MAP(mjmyster_portmap,0)
7240	7098	MDRV_CPU_VBLANK_INT_HACK(mjmyster_irq, 2)
7241	7099	MDRV_CPU_PERIODIC_INT(rtc_nmi_irq, 1)
7242	7100
r4679	r4680
7284	7142	/* basic machine hardware */
7285	7143	MDRV_IMPORT_FROM( quizchq )
7286	7144	MDRV_CPU_MODIFY("maincpu")
7287		MDRV_CPU_PROGRAM_MAP(hginga_readmem,hginga_writemem)
7288		MDRV_CPU_IO_MAP(hginga_readport,hginga_writeport)
	7145	MDRV_CPU_PROGRAM_MAP(hginga_map,0)
	7146	MDRV_CPU_IO_MAP(hginga_portmap,0)
7289	7147	MDRV_CPU_VBLANK_INT("screen", hginga_irq)
7290	7148
7291	7149	MDRV_SOUND_ADD("ay", AY8910, 3579545)
r4679	r4680
7297	7155	/* basic machine hardware */
7298	7156	MDRV_IMPORT_FROM( quizchq )
7299	7157	MDRV_CPU_MODIFY("maincpu")
7300		MDRV_CPU_PROGRAM_MAP(hgokou_readmem,hgokou_writemem)
7301		MDRV_CPU_IO_MAP(hgokou_readport,hgokou_writeport)
	7158	MDRV_CPU_PROGRAM_MAP(hgokou_map,0)
	7159	MDRV_CPU_IO_MAP(hgokou_portmap,0)
7302	7160	MDRV_CPU_VBLANK_INT("screen", hginga_irq)
7303	7161
7304	7162	MDRV_SOUND_ADD("ay", AY8910, 3579545)
r4679	r4680
7310	7168	/* basic machine hardware */
7311	7169	MDRV_IMPORT_FROM( mjmyster )
7312	7170	MDRV_CPU_MODIFY("maincpu")
7313		MDRV_CPU_PROGRAM_MAP(hginga_readmem,hginga_writemem)
7314		MDRV_CPU_IO_MAP(mjmywrld_readport,mjmywrld_writeport)
	7171	MDRV_CPU_PROGRAM_MAP(hginga_map,0)
	7172	MDRV_CPU_IO_MAP(mjmywrld_portmap,0)
7315	7173	MACHINE_DRIVER_END
7316	7174
7317	7175	static MACHINE_DRIVER_START( mjmyuniv )
7318	7176	/* basic machine hardware */
7319	7177	MDRV_IMPORT_FROM( quizchq )
7320	7178	MDRV_CPU_MODIFY("maincpu")
7321		MDRV_CPU_PROGRAM_MAP(mjmyster_readmem,mjmyster_writemem)
7322		MDRV_CPU_IO_MAP(mjmyster_readport,mjmyster_writeport)
	7179	MDRV_CPU_PROGRAM_MAP(mjmyster_map,0)
	7180	MDRV_CPU_IO_MAP(mjmyster_portmap,0)
7323	7181	MDRV_CPU_VBLANK_INT_HACK(mjmyster_irq, 2)
7324	7182	MDRV_CPU_PERIODIC_INT(rtc_nmi_irq, 1)
7325	7183
r4679	r4680
7332	7190	/* basic machine hardware */
7333	7191	MDRV_IMPORT_FROM( quizchq )
7334	7192	MDRV_CPU_MODIFY("maincpu")
7335		MDRV_CPU_IO_MAP(mjmyster_readport,mjmyster_writeport)
	7193	MDRV_CPU_IO_MAP(mjmyster_portmap,0)
7336	7194	MDRV_CPU_VBLANK_INT_HACK(mjmyster_irq, 2)
7337	7195	MDRV_CPU_PERIODIC_INT(rtc_nmi_irq, 1)
7338	7196
r4679	r4680
7362	7220	/* basic machine hardware */
7363	7221	MDRV_IMPORT_FROM( quizchq )
7364	7222	MDRV_CPU_MODIFY("maincpu")
7365		MDRV_CPU_PROGRAM_MAP(rongrong_readmem,rongrong_writemem)
7366		MDRV_CPU_IO_MAP(mjflove_readport,mjflove_writeport)
	7223	MDRV_CPU_PROGRAM_MAP(rongrong_map,0)
	7224	MDRV_CPU_IO_MAP(mjflove_portmap,0)
7367	7225	MDRV_CPU_VBLANK_INT_HACK(mjflove_irq, 2)
7368	7226
7369	7227	MDRV_VIDEO_START(mjflove)   // blitter commands in the roms are shuffled around
r4679	r4680
7383	7241	/* basic machine hardware */
7384	7242	MDRV_IMPORT_FROM( quizchq )
7385	7243	MDRV_CPU_MODIFY("maincpu")
7386		MDRV_CPU_PROGRAM_MAP(hparadis_readmem,hparadis_writemem)
7387		MDRV_CPU_IO_MAP(hparadis_readport,hparadis_writeport)
	7244	MDRV_CPU_PROGRAM_MAP(hparadis_map,0)
	7245	MDRV_CPU_IO_MAP(hparadis_portmap,0)
7388	7246	MDRV_CPU_VBLANK_INT("screen", hparadis_irq)
7389	7247	MACHINE_DRIVER_END
7390	7248
r4679	r4680
7392	7250
7393	7251	/* basic machine hardware */
7394	7252	MDRV_CPU_ADD("maincpu",Z80, XTAL_20MHz / 2)   // ?
7395		MDRV_CPU_PROGRAM_MAP(hanakanz_readmem,hanakanz_writemem)
7396		MDRV_CPU_IO_MAP(jongtei_readport,jongtei_writeport)
	7253	MDRV_CPU_PROGRAM_MAP(hanakanz_map,0)
	7254	MDRV_CPU_IO_MAP(jongtei_portmap,0)
7397	7255	MDRV_CPU_VBLANK_INT("screen", hanakanz_irq)
7398	7256
7399	7257	/* video hardware */
r4679	r4680
8038	7896	version of the game might be a bootleg with the protection
8039	7897	patched. (both sets need this)
8040	7898	*/
8041		memory_install_read8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x60d4, 0x60d4, 0, 0, SMH_NOP);
	7899	memory_install_read8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x60d4, 0x60d4, 0, 0, (read8_space_func)SMH_NOP);
8042	7900	}
8043	7901
8044	7902	/***************************************************************************

src/mame/drivers/chinagat.c

r4679	r4680
150	150	/* on the rising edge of VBLK (vcount == F8), signal an NMI */
151	151	if (vcount == 0xf8)
152	152	{
153		cpu_set_input_line(timer->machine->cpu[0], INPUT_LINE_NMI, ASSERT_LINE);
	153	cputag_set_input_line(timer->machine, "maincpu", INPUT_LINE_NMI, ASSERT_LINE);
154	154	}
155	155
156	156	/* set 1ms signal on rising edge of vcount & 8 */
157	157	if (!(vcount_old & 8) && (vcount & 8))
158	158	{
159		cpu_set_input_line(timer->machine->cpu[0], M6809_FIRQ_LINE, ASSERT_LINE);
	159	cputag_set_input_line(timer->machine, "maincpu", M6809_FIRQ_LINE, ASSERT_LINE);
160	160	}
161	161
162	162	/* adjust for next scanline */
r4679	r4680
172	172	{
173	173	case 0: /* 3e00 - SND irq */
174	174	soundlatch_w( space, 0, data );
175		cpu_set_input_line(space->machine->cpu[2], sound_irq, (sound_irq == INPUT_LINE_NMI) ? PULSE_LINE : HOLD_LINE );
	175	cputag_set_input_line(space->machine, "audiocpu", sound_irq, (sound_irq == INPUT_LINE_NMI) ? PULSE_LINE : HOLD_LINE );
176	176	break;
177	177
178	178	case 1: /* 3e01 - NMI ack */
179		cpu_set_input_line(space->machine->cpu[0], INPUT_LINE_NMI, CLEAR_LINE);
	179	cputag_set_input_line(space->machine, "maincpu", INPUT_LINE_NMI, CLEAR_LINE);
180	180	break;
181	181
182	182	case 2: /* 3e02 - FIRQ ack */
183		cpu_set_input_line(space->machine->cpu[0], M6809_FIRQ_LINE, CLEAR_LINE);
	183	cputag_set_input_line(space->machine, "maincpu", M6809_FIRQ_LINE, CLEAR_LINE);
184	184	break;
185	185
186	186	case 3: /* 3e03 - IRQ ack */
187		cpu_set_input_line(space->machine->cpu[0], M6809_IRQ_LINE, CLEAR_LINE);
	187	cputag_set_input_line(space->machine, "maincpu", M6809_IRQ_LINE, CLEAR_LINE);
188	188	break;
189	189
190	190	case 4: /* 3e04 - sub CPU IRQ ack */
191		cpu_set_input_line(space->machine->cpu[1], sprite_irq, (sprite_irq == INPUT_LINE_NMI) ? PULSE_LINE : HOLD_LINE );
	191	cputag_set_input_line(space->machine, "sub", sprite_irq, (sprite_irq == INPUT_LINE_NMI) ? PULSE_LINE : HOLD_LINE );
192	192	break;
193	193	}
194	194	}
r4679	r4680
225	225	#if 0
226	226	if (saiyugb1_mcu_command == 0x78)
227	227	{
228		cpu_suspend(space->machine->cpu[3], SUSPEND_REASON_HALT, 1);   /* Suspend (speed up) */
	228	cputag_suspend(space->machine, "mcu", SUSPEND_REASON_HALT, 1);   /* Suspend (speed up) */
229	229	}
230	230	#endif
231	231	return saiyugb1_mcu_command;
r4679	r4680
237	237	#if 0
238	238	if (data != 0x78)
239	239	{
240		cpu_resume(space->machine->cpu[3], SUSPEND_REASON_HALT);   /* Wake up */
	240	cputag_resume(space->machine, "mcu", SUSPEND_REASON_HALT);   /* Wake up */
241	241	}
242	242	#endif
243	243	}
r4679	r4680
337	337	AM_RANGE(0x2800, 0x2fff) AM_RAM_WRITE(ddragon_bgvideoram_w) AM_BASE(&ddragon_bgvideoram)
338	338	AM_RANGE(0x3000, 0x317f) AM_WRITE(paletteram_xxxxBBBBGGGGRRRR_split1_w) AM_BASE(&paletteram)
339	339	AM_RANGE(0x3400, 0x357f) AM_WRITE(paletteram_xxxxBBBBGGGGRRRR_split2_w) AM_BASE(&paletteram_2)
340		AM_RANGE(0x3800, 0x397f) AM_WRITE(SMH_BANK3) AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
	340	AM_RANGE(0x3800, 0x397f) AM_WRITE(SMH_BANK(3)) AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
341	341	AM_RANGE(0x3e00, 0x3e04) AM_WRITE(chinagat_interrupt_w)
342	342	AM_RANGE(0x3e06, 0x3e06) AM_WRITE(SMH_RAM) AM_BASE(&ddragon_scrolly_lo)
343	343	AM_RANGE(0x3e07, 0x3e07) AM_WRITE(SMH_RAM) AM_BASE(&ddragon_scrollx_lo)
r4679	r4680
520	520
521	521	static void chinagat_irq_handler(const device_config *device, int irq)
522	522	{
523		cpu_set_input_line(device->machine->cpu[2], 0, irq ? ASSERT_LINE : CLEAR_LINE );
	523	cputag_set_input_line(device->machine, "audiocpu", 0, irq ? ASSERT_LINE : CLEAR_LINE );
524	524	}
525	525
526	526	static const ym2151_interface ym2151_config =

src/mame/drivers/kaneko16.c

r4679	r4680
270	270	if (ACCESSING_BITS_8_15)
271	271	{
272	272	soundlatch_w(space, 0, (data & 0xff00) >> 8 );
273		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_NMI, PULSE_LINE);
	273	cputag_set_input_line(space->machine, "audiocpu", INPUT_LINE_NMI, PULSE_LINE);
274	274	}
275	275	}
276	276

src/mame/drivers/goldstar.c

r4679	r4680
111	111
112	112	extern WRITE8_HANDLER( goldstar_fg_vidram_w );
113	113	extern WRITE8_HANDLER( goldstar_fg_atrram_w );
	114	extern WRITE8_HANDLER( cm_girl_scroll_w );
114	115
115	116	WRITE8_HANDLER( goldstar_fa00_w );
116	117	WRITE8_HANDLER( cm_background_col_w );
r4679	r4680
188	189	AM_RANGE(0x10, 0x10) AM_READ_PORT("DSW6")
189	190	ADDRESS_MAP_END
190	191
	192	static WRITE8_HANDLER( ncb3_port81_w )
	193	{
	194	//  if (data!=0x00)
	195	//      popmessage("ncb3_port81_w %02x\n",data);
	196	}
191	197
192
	198	// where is colour bank for 'all blue' in attract?
193	199	static ADDRESS_MAP_START( ncb3_map, ADDRESS_SPACE_PROGRAM, 8 )
194	200	AM_RANGE(0x0000, 0xb7ff) AM_ROM
195	201	AM_RANGE(0xb800, 0xbfff) AM_RAM AM_BASE(&nvram) AM_SIZE(&nvram_size)
r4679	r4680
220	226	//  AM_RANGE(0x06, 0x06) AM_READ(ncb3_unkread_r)    // unknown...
221	227	//  AM_RANGE(0x08, 0x08) AM_READ(ncb3_unkread_r)    // unknown...
222	228	AM_RANGE(0x10, 0x10) AM_READ_PORT("DSW5")   /* confirmed for ncb3 */
223		//  AM_RANGE(0x81, 0x81) ---> large writes.
	229	AM_RANGE(0x81, 0x81) AM_WRITE(ncb3_port81_w) // ---> large writes.
224	230
225	231	ADDRESS_MAP_END
226	232
r4679	r4680
265	271
266	272	AM_RANGE(0xd000, 0xd7ff) AM_RAM AM_BASE(&nvram) AM_SIZE(&nvram_size)
267	273
	274
268	275	AM_RANGE(0xe000, 0xe7ff) AM_RAM AM_WRITE(goldstar_fg_vidram_w) AM_BASE(&videoram)
269	276	AM_RANGE(0xe800, 0xefff) AM_RAM AM_WRITE(goldstar_fg_atrram_w) AM_BASE(&colorram)
270	277
r4679	r4680
281	288	AM_RANGE(0xfc80, 0xffff) AM_RAM
282	289	ADDRESS_MAP_END
283	290
	291	static ADDRESS_MAP_START( nfm_map, ADDRESS_SPACE_PROGRAM, 8 )
	292	AM_RANGE(0x0000, 0xd7ff) AM_ROM AM_WRITENOP
	293
	294	AM_RANGE(0xd800, 0xdfff) AM_RAM AM_BASE(&nvram) AM_SIZE(&nvram_size)
	295
	296
	297	AM_RANGE(0xe000, 0xe7ff) AM_RAM AM_WRITE(goldstar_fg_vidram_w) AM_BASE(&videoram)
	298	AM_RANGE(0xe800, 0xefff) AM_RAM AM_WRITE(goldstar_fg_atrram_w) AM_BASE(&colorram)
	299
	300	AM_RANGE(0xf000, 0xf1ff) AM_RAM AM_WRITE( goldstar_reel1_ram_w ) AM_BASE(&goldstar_reel1_ram)
	301	AM_RANGE(0xf200, 0xf3ff) AM_RAM AM_WRITE( goldstar_reel2_ram_w ) AM_BASE(&goldstar_reel2_ram)
	302	AM_RANGE(0xf400, 0xf5ff) AM_RAM AM_WRITE( goldstar_reel3_ram_w ) AM_BASE(&goldstar_reel3_ram)
	303	AM_RANGE(0xf600, 0xf7ff) AM_RAM
	304
	305	AM_RANGE(0xf800, 0xf87f) AM_RAM AM_BASE(&goldstar_reel1_scroll)
	306	AM_RANGE(0xf880, 0xf9ff) AM_RAM
	307	AM_RANGE(0xfa00, 0xfa7f) AM_RAM AM_BASE(&goldstar_reel2_scroll)
	308	AM_RANGE(0xfa80, 0xfbff) AM_RAM
	309	AM_RANGE(0xfc00, 0xfc7f) AM_RAM AM_BASE(&goldstar_reel3_scroll)
	310	AM_RANGE(0xfc80, 0xffff) AM_RAM
	311	ADDRESS_MAP_END
	312
	313
284	314	static ADDRESS_MAP_START( cm_portmap, ADDRESS_SPACE_IO, 8 )
285	315	ADDRESS_MAP_GLOBAL_MASK(0xff)
286	316	AM_RANGE(0x01, 0x01) AM_DEVREAD("ay", ay8910_r)
r4679	r4680
288	318	AM_RANGE(0x04, 0x07) AM_DEVREADWRITE("ppi8255_0", ppi8255_r, ppi8255_w)   /* Input Ports */
289	319	AM_RANGE(0x08, 0x0b) AM_DEVREADWRITE("ppi8255_1", ppi8255_r, ppi8255_w)   /* DIP switches */
290	320	AM_RANGE(0x10, 0x10) AM_WRITE (cm_outport0_w)   /* output port */
291		//  AM_RANGE(0x11, 0x11) AM_WRITENOP
	321	AM_RANGE(0x11, 0x11) AM_WRITENOP
292	322	AM_RANGE(0x12, 0x12) AM_WRITE (cm_outport1_w)   /* output port */
293	323	AM_RANGE(0x13, 0x13) AM_WRITE(cm_background_col_w)
	324	AM_RANGE(0x14, 0x14) AM_WRITE(cm_girl_scroll_w)
294	325	ADDRESS_MAP_END
295	326
296	327
r4679	r4680
556	587	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
557	588
558	589	PORT_START("DSW5")
559		PORT_DIPNAME( 0x01, 0x01, "Display Of Doll On Demo" )          PORT_DIPLOCATION("DSW5:1")   /* not working */
	590	PORT_DIPNAME( 0x01, 0x00, "Display Of Doll On Demo" )          PORT_DIPLOCATION("DSW5:1")   /* not working */
560	591	PORT_DIPSETTING(    0x01, DEF_STR( Off ) )
561	592	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
562	593	PORT_DIPNAME( 0x06, 0x06, "Coin In Limit" )                    PORT_DIPLOCATION("DSW5:2,3")   /* not checked */
r4679	r4680
569	600	PORT_DIPSETTING(    0x10, "9-5-1" )
570	601	PORT_DIPSETTING(    0x08, "6-3-1" )
571	602	PORT_DIPSETTING(    0x00, "3-2-1" )
572		PORT_DIPNAME( 0x20, 0x20, "Display Of Doll At All Fr. Bonus" ) PORT_DIPLOCATION("DSW5:6")   /* not checked */
	603	PORT_DIPNAME( 0x20, 0x00, "Display Of Doll At All Fr. Bonus" ) PORT_DIPLOCATION("DSW5:6")   /* not checked */
573	604	PORT_DIPSETTING(    0x20, DEF_STR( Low ) )
574	605	PORT_DIPSETTING(    0x00, DEF_STR( High ) )
575	606	PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) )                 PORT_DIPLOCATION("DSW5:7")   /* listed as unused */
r4679	r4680
718	749	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
719	750
720	751	PORT_START("DSW5")
721		PORT_DIPNAME( 0x01, 0x01, "Flash 'Dyna - C.M.V.4' string in attract" ) PORT_DIPLOCATION("DSW5:1")   /* OK */
	752	PORT_DIPNAME( 0x01, 0x00, "Flash 'Dyna - C.M.V.4' string in attract" ) PORT_DIPLOCATION("DSW5:1")   /* OK */
722	753	PORT_DIPSETTING(    0x01, DEF_STR( Off ) )
723	754	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
724	755	PORT_DIPNAME( 0x06, 0x06, "Coin In Limit" )                    PORT_DIPLOCATION("DSW5:2,3")   /* not checked */
r4679	r4680
731	762	PORT_DIPSETTING(    0x10, "9-5-1" )
732	763	PORT_DIPSETTING(    0x08, "6-3-1" )
733	764	PORT_DIPSETTING(    0x00, "3-2-1" )
734		PORT_DIPNAME( 0x20, 0x20, "Display Of Doll At All Fr. Bonus" ) PORT_DIPLOCATION("DSW5:6")   /* not checked */
	765	PORT_DIPNAME( 0x20, 0x00, "Display Of Doll At All Fr. Bonus" ) PORT_DIPLOCATION("DSW5:6")   /* not checked */
735	766	PORT_DIPSETTING(    0x20, DEF_STR( Low ) )
736	767	PORT_DIPSETTING(    0x00, DEF_STR( High ) )
737	768	PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) )                 PORT_DIPLOCATION("DSW5:7")   /* listed as unused */
r4679	r4680
880	911	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
881	912
882	913	PORT_START("DSW5")
883		PORT_DIPNAME( 0x01, 0x01, DEF_STR( Unknown ) )                 PORT_DIPLOCATION("DSW5:1")   /* not checked */
	914	PORT_DIPNAME( 0x01, 0x00, "Display Of Doll On Demo" )          PORT_DIPLOCATION("DSW5:1")   /* not working */
884	915	PORT_DIPSETTING(    0x01, DEF_STR( Off ) )
885	916	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
886	917	PORT_DIPNAME( 0x06, 0x06, "Coin In Limit" )                    PORT_DIPLOCATION("DSW5:2,3")   /* not checked */
r4679	r4680
893	924	PORT_DIPSETTING(    0x10, "9-5-1" )
894	925	PORT_DIPSETTING(    0x08, "6-3-1" )
895	926	PORT_DIPSETTING(    0x00, "3-2-1" )
896		PORT_DIPNAME( 0x20, 0x20, "Display Of Doll At All Fr. Bonus" ) PORT_DIPLOCATION("DSW5:6")   /* not checked */
	927	PORT_DIPNAME( 0x20, 0x00, "Display Of Doll At All Fr. Bonus" ) PORT_DIPLOCATION("DSW5:6")   /* not checked */
897	928	PORT_DIPSETTING(    0x20, DEF_STR( Low ) )
898	929	PORT_DIPSETTING(    0x00, DEF_STR( High ) )
899	930	PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) )                 PORT_DIPLOCATION("DSW5:7")   /* listed as unused */
r4679	r4680
1042	1073	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
1043	1074
1044	1075	PORT_START("DSW5")
1045		PORT_DIPNAME( 0x01, 0x01, "Display Of Doll On Demo" )          PORT_DIPLOCATION("DSW5:1")   /* not checked */
	1076	PORT_DIPNAME( 0x01, 0x00, "Display Of Doll On Demo" )          PORT_DIPLOCATION("DSW5:1")   /* not checked */
1046	1077	PORT_DIPSETTING(    0x01, DEF_STR( Off ) )
1047	1078	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
1048	1079	PORT_DIPNAME( 0x06, 0x06, "Coin In Limit" )                    PORT_DIPLOCATION("DSW5:2,3")   /* not checked */
r4679	r4680
1055	1086	PORT_DIPSETTING(    0x10, "9-5-1" )
1056	1087	PORT_DIPSETTING(    0x08, "6-3-1" )
1057	1088	PORT_DIPSETTING(    0x00, "3-2-1" )
1058		PORT_DIPNAME( 0x20, 0x20, "Display Of Doll At All Fr. Bonus" ) PORT_DIPLOCATION("DSW5:6")   /* not checked */
	1089	PORT_DIPNAME( 0x20, 0x00, "Display Of Doll At All Fr. Bonus" ) PORT_DIPLOCATION("DSW5:6")   /* not checked */
1059	1090	PORT_DIPSETTING(    0x20, DEF_STR( Low ) )
1060	1091	PORT_DIPSETTING(    0x00, DEF_STR( High ) )
1061	1092	PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) )                 PORT_DIPLOCATION("DSW5:7")   /* listed as unused */
r4679	r4680
1204	1235	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
1205	1236
1206	1237	PORT_START("DSW5")
1207		PORT_DIPNAME( 0x01, 0x01, "Display Of Doll On Demo" )          PORT_DIPLOCATION("DSW5:1")   /* not checked */
	1238	PORT_DIPNAME( 0x01, 0x00, "Display Of Doll On Demo" )          PORT_DIPLOCATION("DSW5:1")   /* not checked */
1208	1239	PORT_DIPSETTING(    0x01, DEF_STR( Off ) )
1209	1240	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
1210	1241	PORT_DIPNAME( 0x06, 0x06, "Coin In Limit" )                    PORT_DIPLOCATION("DSW5:2,3")   /* not checked */
r4679	r4680
1217	1248	PORT_DIPSETTING(    0x10, "9-5-1" )
1218	1249	PORT_DIPSETTING(    0x08, "6-3-1" )
1219	1250	PORT_DIPSETTING(    0x00, "3-2-1" )
1220		PORT_DIPNAME( 0x20, 0x20, "Display Of Doll At All Fr. Bonus" ) PORT_DIPLOCATION("DSW5:6")   /* not checked */
	1251	PORT_DIPNAME( 0x20, 0x00, "Display Of Doll At All Fr. Bonus" ) PORT_DIPLOCATION("DSW5:6")   /* not checked */
1221	1252	PORT_DIPSETTING(    0x20, DEF_STR( Low ) )
1222	1253	PORT_DIPSETTING(    0x00, DEF_STR( High ) )
1223	1254	PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) )                 PORT_DIPLOCATION("DSW5:7")   /* listed as unused */
r4679	r4680
3997	4028	32*8
3998	4029	};
3999	4030
	4031	// cmasterc set
	4032	static const gfx_layout tiles8x32x4alt_layout =
	4033	{
	4034	8,32,
	4035	RGN_FRAC(1,2),
	4036	4,
	4037	{ RGN_FRAC(1,2)+0, RGN_FRAC(1,2)+4,0,4 },
	4038	{ 3,2,1,0,11, 10, 9, 8 },
	4039	{ 0*16, 1*16,  2*16,  3*16,  4*16,  5*16,  6*16,  7*16,
	4040	8*16, 9*16, 10*16, 11*16, 12*16, 13*16, 14*16, 15*16,
	4041	16*16,17*16, 18*16, 19*16, 20*16, 21*16, 22*16, 23*16,
	4042	24*16,25*16, 26*16, 27*16, 28*16, 29*16, 30*16, 31*16
	4043	},
	4044	16*32
	4045	};
	4046
4000	4047	static const UINT32 layout_xoffset[128] =
4001	4048	{
4002	4049	STEP32(0*128,4),STEP32(1*128,4),STEP32(2*128,4),STEP32(3*128,4)
r4679	r4680
4098	4145	GFXDECODE_ENTRY( "user1", 0, tiles128x128x4_layout, 128, 4 )
4099	4146	GFXDECODE_END
4100	4147
	4148	static GFXDECODE_START( cmasterc )
	4149	GFXDECODE_ENTRY( "gfx1", 0, tiles8x8x3_layout, 0, 16 )
	4150	GFXDECODE_ENTRY( "reels", 0, tiles8x32x4alt_layout, 128+64, 4 )
	4151	GFXDECODE_ENTRY( "user1", 0, tiles128x128x4_layout, 128, 4 )
	4152	GFXDECODE_END
	4153
	4154
4101	4155	static GFXDECODE_START( cmast91 )
4102	4156	GFXDECODE_ENTRY( "gfx1", 0, tiles8x8x3_layout, 0, 16 )
4103	4157	GFXDECODE_ENTRY( "gfx2", 0, tiles8x32x4_layout, 128+64, 4 ) // or is there a register for the +64?
r4679	r4680
4112	4166	#endif
4113	4167
4114	4168
	4169	static const gfx_layout tiles8x32_4bpp_layout =
	4170	{
	4171	8,32,
	4172	RGN_FRAC(1,4),
	4173	4,
	4174	{ RGN_FRAC(0,4),RGN_FRAC(1,4),RGN_FRAC(2,4),RGN_FRAC(3,4) },
	4175	{ 0,1,2,3,4,5,6,7},
	4176	{ 0*8, 1*8, 2*8, 3*8, 4*8, 5*8, 6*8, 7*8,8*8,9*8,10*8,11*8,12*8,13*8,14*8,15*8,16*8,17*8,18*8,19*8,20*8,21*8,22*8,23*8,24*8,25*8,26*8,27*8,28*8,29*8,30*8,31*8 },
	4177	32*8
	4178	};
	4179
	4180	static const gfx_layout tiles8x8_3bpp_layout =
	4181	{
	4182	8,8,
	4183	RGN_FRAC(1,3),
	4184	3,
	4185	{ RGN_FRAC(0,3),RGN_FRAC(1,3),RGN_FRAC(2,3) },
	4186	{ 0,1,2,3,4,5,6,7},
	4187	{ 0*8, 1*8, 2*8, 3*8, 4*8, 5*8, 6*8, 7*8 },
	4188	8*8
	4189	};
	4190
	4191	static GFXDECODE_START( nfm )
	4192	GFXDECODE_ENTRY( "tilegfx", 0, tiles8x8_3bpp_layout, 0, 16 )
	4193	GFXDECODE_ENTRY( "reelgfx", 0, tiles8x32_4bpp_layout, 0, 16 )
	4194	GFXDECODE_END
	4195
	4196
4115	4197	/*************************************
4116	4198	*      PPI 8255 (x3) Interfaces      *
4117	4199	*************************************/
r4679	r4680
4566	4648	MDRV_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.50)
4567	4649	MACHINE_DRIVER_END
4568	4650
	4651	static MACHINE_DRIVER_START( cmasterc )
	4652
	4653	MDRV_IMPORT_FROM(cm)
	4654	MDRV_GFXDECODE(cmasterc)
	4655
	4656	MACHINE_DRIVER_END
	4657
4569	4658	static MACHINE_DRIVER_START( cmnobmp )
4570	4659
4571	4660	/* basic machine hardware */
r4679	r4680
4874	4963	MDRV_SOUND_ROUTE(ALL_OUTPUTS, "mono", 2.00)   /* analyzed for clips */
4875	4964	MACHINE_DRIVER_END
4876	4965
	4966	static MACHINE_DRIVER_START( nfm )
4877	4967
	4968	/* basic machine hardware */
	4969	MDRV_CPU_ADD("maincpu", Z80, CPU_CLOCK)
	4970	MDRV_CPU_PROGRAM_MAP(nfm_map, 0)
	4971	MDRV_CPU_IO_MAP(amcoe2_portmap, 0)
	4972	MDRV_CPU_VBLANK_INT("screen", irq0_line_hold)
	4973
	4974	/* 2x 8255 */
	4975	MDRV_PPI8255_ADD( "ppi8255_0", cm_ppi8255_intf[0] )
	4976	MDRV_PPI8255_ADD( "ppi8255_1", cm_ppi8255_intf[1] )
	4977
	4978	/* video hardware */
	4979	MDRV_SCREEN_ADD("screen", RASTER)
	4980	MDRV_SCREEN_REFRESH_RATE(60)
	4981	//  MDRV_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(0))
	4982	MDRV_SCREEN_FORMAT(BITMAP_FORMAT_INDEXED16)
	4983	MDRV_SCREEN_SIZE(64*8, 32*8)
	4984	MDRV_SCREEN_VISIBLE_AREA(0*8, 64*8-1, 2*8, 30*8-1)
	4985
	4986	MDRV_GFXDECODE(nfm)
	4987	MDRV_PALETTE_LENGTH(256)
	4988	MDRV_PALETTE_INIT(cm)
	4989	MDRV_NVRAM_HANDLER(goldstar)
	4990
	4991	MDRV_VIDEO_START(cherrym)
	4992	MDRV_VIDEO_UPDATE(goldstar)
	4993
	4994	/* sound hardware */
	4995	MDRV_SPEAKER_STANDARD_MONO("mono")
	4996	MDRV_SOUND_ADD("ay", AY8910, AY_CLOCK)
	4997	MDRV_SOUND_CONFIG(cm_ay8910_config)
	4998	MDRV_SOUND_ROUTE(ALL_OUTPUTS, "mono", 2.00)   /* analyzed for clips */
	4999	MACHINE_DRIVER_END
	5000
	5001
4878	5002	/***************************************************************************
4879	5003
4880	5004	Game driver(s)
r4679	r4680
5420	5544	ROM_LOAD( "msii841.u4",  0x10000,  0x8000, CRC(e39fff9c) SHA1(22fdc517fa478441622c6245cecb5728c5595757) )
5421	5545
5422	5546	/* these gfx are in a different format to usual */
5423		ROM_REGION( 0x8000, "gfx2", ROMREGION_DISPOSE )
	5547	ROM_REGION( 0x8000, "reels", ROMREGION_DISPOSE )
5424	5548	ROM_LOAD( "msii841.u1",  0x0000,  0x4000, CRC(cf322ed2) SHA1(84df96229b7bdba0ab498e3bf9c77d7a7661f7b3) )
5425	5549	ROM_LOAD( "msii841.u2",  0x4000,  0x4000, CRC(58c05653) SHA1(59454c07f4fe5b684d078cf97f2b1ee05b02f4ed) )
5426	5550
r4679	r4680
6677	6801
6678	6802
6679	6803
	6804
6680	6805	/* descrambled by looking at CALLs
6681	6806
6682	6807	0000 -> 0000
r4679	r4680
6926	7051
6927	7052
6928	7053
	7054	ROM_START( nfm )
	7055	ROM_REGION( 0x10000, "maincpu", 0 )
	7056	ROM_LOAD( "fuitprg", 0x00000, 0x01000, CRC(6f6c98cf) SHA1(4641cb2b90d4d21edc65e504584f3ec92fe741c4) )
	7057	ROM_CONTINUE(0x5000,0x1000)
	7058	ROM_CONTINUE(0x7000,0x1000)
	7059	ROM_CONTINUE(0xa000,0x1000)
	7060	ROM_CONTINUE(0x2000,0x1000) //?
	7061	ROM_CONTINUE(0xb000,0x1000) //?
	7062	ROM_CONTINUE(0x9000,0x1000)
	7063	ROM_CONTINUE(0xc000,0x1000)
	7064	ROM_CONTINUE(0x1000,0x1000)
	7065	ROM_CONTINUE(0x3000,0x1000)
	7066	ROM_CONTINUE(0x6000,0x1000)
	7067	ROM_CONTINUE(0x4000,0x1000)
	7068	ROM_CONTINUE(0x8000,0x1000)
	7069	ROM_CONTINUE(0xd000,0x1000) // ?
	7070	ROM_CONTINUE(0xe000,0x1000)
	7071	ROM_CONTINUE(0xf000,0x1000)
6929	7072
	7073	ROM_REGION( 0x10000, "reelgfx", 0 )
	7074	ROM_LOAD( "fruit1", 0x00000, 0x04000, CRC(dd096dae) SHA1(ab34942cfa4fe7d46892819372c42f566c249f8c) )
	7075	ROM_CONTINUE(0x0000, 0x4000)
	7076	ROM_LOAD( "fruit2", 0x04000, 0x04000, CRC(6a37a16f) SHA1(7adb08d3e4de9768a8e41760a044bf52509da211) )
	7077	ROM_CONTINUE(0x0000, 0x4000)
	7078	ROM_LOAD( "fruit3", 0x08000, 0x04000, CRC(f3361ba7) SHA1(1a7b9c4f685656447bd6ce5f361e6e4af63012e3) )
	7079	ROM_CONTINUE(0x8000, 0x4000)
	7080	ROM_LOAD( "fruit4", 0x0c000, 0x04000, CRC(99ac5ddf) SHA1(65b6abb98f3156f4c0c55478d09c612eed5ae555) )
6930	7081
	7082	// do these graphics really belong with this set? a lot of the tiles seem wrong for it
	7083	ROM_REGION( 0x18000, "tilegfx", 0 )
	7084	ROM_LOAD( "fruit5", 0x00000, 0x08000, CRC(a7a8f08d) SHA1(76c93194133ba85c0dde1f364260e16d5b647134) )
	7085	ROM_LOAD( "fruit6", 0x08000, 0x08000, CRC(39d5b89a) SHA1(4cf52fa557ffc792d3e13f7dbb5d45fd617bac85) )
	7086	ROM_LOAD( "fruit7", 0x10000, 0x08000, CRC(3ade6709) SHA1(9cdf2814e50c5433c582fc40265c5df2a16e99e7) )
	7087
	7088	ROM_REGION( 0x18000, "proms", 0 ) // colours?
	7089	ROM_LOAD( "fruiprg2", 0x00000, 0x08000, CRC(13925ff5) SHA1(236415a244ef6092834f8080cf0d2e04bbfa2650) )
	7090	ROM_END
	7091
	7092
6931	7093	static DRIVER_INIT(goldstar)
6932	7094	{
6933	7095	int A;
r4679	r4680
6963	7125	0xa000, 0xa800, 0xb000, 0xb800,
6964	7126	};
6965	7127
6966		buffer = malloc(0x10000);
	7128	buffer = alloc_array_or_die(UINT8, 0x10000);
6967	7129	memcpy(buffer,ROM,0x10000);
6968	7130
6969	7131	// swap some 0x800 blocks around..
r4679	r4680
7028	7190	ROM[i] = chry10_decrypt(ROM[i]);
7029	7191	}
7030	7192
7031		buffer = malloc_or_die(size);
	7193	buffer = alloc_array_or_die(UINT8, size);
7032	7194	memcpy(buffer, ROM, size);
7033	7195
7034	7196	free(buffer);
r4679	r4680
7058	7220	ROM[i] = decrypt(ROM[i], i);
7059	7221	}
7060	7222
7061		buffer = malloc_or_die(size);
	7223	buffer = alloc_array_or_die(UINT8, size);
7062	7224	memcpy(buffer, ROM, size);
7063	7225
7064	7226	free(buffer);
r4679	r4680
7176	7338	ROM[i] = x;
7177	7339	}
7178	7340
7179		memory_install_read8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_IO), 0x1d, 0x1d, 0, 0, fixedvala8_r);
7180		memory_install_read8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_IO), 0x2a, 0x2a, 0, 0, fixedvalb4_r);
	7341	memory_install_read8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_IO), 0x1d, 0x1d, 0, 0, fixedvala8_r);
	7342	memory_install_read8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_IO), 0x2a, 0x2a, 0, 0, fixedvalb4_r);
7181	7343	/* Oki 6295 at 0x20 */
7182	7344	}
7183	7345
r4679	r4680
7206	7368
7207	7369
7208	7370
7209		memory_install_read8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_IO), 0x16, 0x16, 0, 0, fixedval38_r);
	7371	memory_install_read8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_IO), 0x16, 0x16, 0, 0, fixedval38_r);
7210	7372	/* Oki 6295 at 0x20 */
7211	7373	}
7212	7374
r4679	r4680
7233	7395	ROM[i] = x;
7234	7396	}
7235	7397
7236		memory_install_read8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_IO), 0x1e, 0x1e, 0, 0, fixedvalea_r);
	7398	memory_install_read8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_IO), 0x1e, 0x1e, 0, 0, fixedvalea_r);
7237	7399	/* Oki 6295 at 0x20 */
7238	7400	}
7239	7401
r4679	r4680
7260	7422	ROM[i] = x;
7261	7423	}
7262	7424
7263		memory_install_read8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_IO), 0x31, 0x31, 0, 0, fixedval68_r);
	7425	memory_install_read8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_IO), 0x31, 0x31, 0, 0, fixedval68_r);
7264	7426
7265	7427	}
7266	7428
r4679	r4680
7296	7458	ROM[i] = x;
7297	7459	}
7298	7460	// nfb96b needs both of these
7299		memory_install_read8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_IO), 0x23, 0x23, 0, 0, fixedval80_r);
7300		memory_install_read8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_IO), 0x5a, 0x5a, 0, 0, fixedvalaa_r);
	7461	memory_install_read8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_IO), 0x23, 0x23, 0, 0, fixedval80_r);
	7462	memory_install_read8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_IO), 0x5a, 0x5a, 0, 0, fixedvalaa_r);
7301	7463
7302	7464	// csel96b
7303		memory_install_read8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_IO), 0x6e, 0x6e, 0, 0, fixedval96_r);
	7465	memory_install_read8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_IO), 0x6e, 0x6e, 0, 0, fixedval96_r);
7304	7466
7305	7467	}
7306	7468
r4679	r4680
7327	7489	ROM[i] = x;
7328	7490	}
7329	7491
7330		memory_install_read8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_IO), 0x2e, 0x2e, 0, 0, fixedvalbe_r);
	7492	memory_install_read8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_IO), 0x2e, 0x2e, 0, 0, fixedvalbe_r);
7331	7493
7332	7494	}
7333	7495
r4679	r4680
7358	7520	ROM[i] = x;
7359	7521	}
7360	7522
7361		memory_install_read8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_IO), 0x5e, 0x5e, 0, 0, fixedval84_r);
7362		memory_install_read8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_IO), 0x36, 0x36, 0, 0, fixedval90_r);
	7523	memory_install_read8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_IO), 0x5e, 0x5e, 0, 0, fixedval84_r);
	7524	memory_install_read8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_IO), 0x36, 0x36, 0, 0, fixedval90_r);
7363	7525	}
7364	7526
7365	7527	static READ8_HANDLER( fixedvalb2_r )
r4679	r4680
7385	7547	ROM[i] = x;
7386	7548	}
7387	7549
7388		memory_install_read8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_IO), 0x34, 0x34, 0, 0, fixedvalb2_r);
	7550	memory_install_read8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_IO), 0x34, 0x34, 0, 0, fixedvalb2_r);
7389	7551	}
7390	7552
7391	7553	static READ8_HANDLER( fixedval48_r )
r4679	r4680
7411	7573	ROM[i] = x;
7412	7574	}
7413	7575
7414		memory_install_read8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_IO), 0x17, 0x17, 0, 0, fixedval48_r);
	7576	memory_install_read8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_IO), 0x17, 0x17, 0, 0, fixedval48_r);
7415	7577	}
7416	7578
7417	7579	static READ8_HANDLER( fixedval09_r )
r4679	r4680
7442	7604
7443	7605	ROM[i] = x;
7444	7606	}
7445		memory_install_read8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_IO), 0x32, 0x32, 0, 0, fixedval74_r);
7446		memory_install_read8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_IO), 0x12, 0x12, 0, 0, fixedval09_r);
	7607	memory_install_read8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_IO), 0x32, 0x32, 0, 0, fixedval74_r);
	7608	memory_install_read8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_IO), 0x12, 0x12, 0, 0, fixedval09_r);
7447	7609	/* oki6295 at 0x20 */
7448	7610	}
7449	7611
r4679	r4680
7470	7632	ROM[i] = x;
7471	7633	}
7472	7634
7473		memory_install_read8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_IO), 0x21, 0x21, 0, 0, fixedval58_r);
	7635	memory_install_read8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_IO), 0x21, 0x21, 0, 0, fixedval58_r);
7474	7636	}
7475	7637
7476	7638	static READ8_HANDLER( fixedvale4_r )
r4679	r4680
7501	7663	ROM[i] = x;
7502	7664	}
7503	7665
7504		memory_install_read8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_IO), 0x16, 0x16, 0, 0, fixedvalc7_r);
7505		memory_install_read8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_IO), 0x1a, 0x1a, 0, 0, fixedvale4_r);
	7666	memory_install_read8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_IO), 0x16, 0x16, 0, 0, fixedvalc7_r);
	7667	memory_install_read8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_IO), 0x1a, 0x1a, 0, 0, fixedvale4_r);
7506	7668	}
7507	7669
7508	7670
r4679	r4680
7531	7693	GAME( 1992, cmv4a,     cmv4,     cm,       cmv4,     cmv4,      ROT0, "Dyna",              "Cherry Master (ver.4, set 2)",                GAME_NOT_WORKING )   /* stealth game? */
7532	7694	GAME( 1991, cmaster,   0,        cm,       cmaster,  0,         ROT0, "Dyna",              "Cherry Master I (ver.1.01, set 1)",           0 )
7533	7695	GAME( 1991, cmasterb,  cmaster,  cm,       cmasterb, cmv4,      ROT0, "Dyna",              "Cherry Master I (ver.1.01, set 2)",           0 )
7534		GAME( 1991, cmasterc,  cmaster,  cm,       cmasterc, cmv4,      ROT0, "Dyna",              "Cherry Master I (ver.1.01, set 3)",           GAME_IMPERFECT_GRAPHICS )
	7696	GAME( 1991, cmasterc,  cmaster,  cmasterc, cmasterc, cmv4,      ROT0, "Dyna",              "Cherry Master I (ver.1.01, set 3)",           0 )
7535	7697	GAME( 1991, cmast91,   0,        cmast91,  cmast91,  cmast91,   ROT0, "Dyna",              "Cherry Master '91 (ver.1.30)",                0 )
7536	7698
7537	7699
r4679	r4680
7581	7743	GAME( 2002, carb2002,  nfb96,    amcoe2,   nfb96bl,   0,         ROT0, "bootleg", "Carriage Bonus 2002 (bootleg)",                         GAME_WRONG_COLORS )
7582	7744	GAME( 2003, carb2003,  nfb96,    amcoe2,   nfb96bl,   0,         ROT0, "bootleg", "Carriage Bonus 2003 (bootleg)",                         GAME_WRONG_COLORS )
7583	7745
	7746	GAME( 2003, nfm, 0, nfm, nfb96bl, 0, ROT0, "Ming-Yang Electronic",         "New Fruit Machine (Ming-Yang Electronic)", GAME_NOT_WORKING )
7584	7747
7585	7748	/* possible stealth sets:
7586	7749

src/mame/drivers/dbz.c

r4679	r4680
120	120
121	121	static WRITE16_HANDLER( dbz_sound_cause_nmi )
122	122	{
123		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_NMI, PULSE_LINE);
	123	cputag_set_input_line(space->machine, "audiocpu", INPUT_LINE_NMI, PULSE_LINE);
124	124	}
125	125
126	126	static void dbz_sound_irq(const device_config *device, int irq)
127	127	{
128	128	if (irq)
129		cpu_set_input_line(device->machine->cpu[1], 0, ASSERT_LINE);
	129	cputag_set_input_line(device->machine, "audiocpu", 0, ASSERT_LINE);
130	130	else
131		cpu_set_input_line(device->machine->cpu[1], 0, CLEAR_LINE);
	131	cputag_set_input_line(device->machine, "audiocpu", 0, CLEAR_LINE);
132	132	}
133	133
134		static ADDRESS_MAP_START( dbz_readmem, ADDRESS_SPACE_PROGRAM, 16 )
135		AM_RANGE(0x000000, 0x0fffff) AM_READ(SMH_ROM)
136		AM_RANGE(0x480000, 0x48ffff) AM_READ(SMH_RAM)
137		AM_RANGE(0x490000, 0x491fff) AM_READ(K056832_ram_word_r)   // '157 RAM is mirrored twice
138		AM_RANGE(0x492000, 0x493fff) AM_READ(K056832_ram_word_r)
	134	static ADDRESS_MAP_START( dbz_map, ADDRESS_SPACE_PROGRAM, 16 )
	135	AM_RANGE(0x000000, 0x0fffff) AM_ROM
	136	AM_RANGE(0x480000, 0x48ffff) AM_RAM
	137	AM_RANGE(0x490000, 0x491fff) AM_READWRITE(K056832_ram_word_r, K056832_ram_word_w)   // '157 RAM is mirrored twice
	138	AM_RANGE(0x492000, 0x493fff) AM_READWRITE(K056832_ram_word_r, K056832_ram_word_w)
139	139	AM_RANGE(0x498000, 0x49ffff) AM_READ(K056832_rom_word_8000_r)   // code near a60 in dbz2, subroutine at 730 in dbz
140		AM_RANGE(0x4a0000, 0x4a0fff) AM_READ(K053247_word_r)
141		AM_RANGE(0x4a1000, 0x4a3fff) AM_READ(SMH_RAM)
142		AM_RANGE(0x4a8000, 0x4abfff) AM_READ(SMH_RAM)         // palette
	140	AM_RANGE(0x4a0000, 0x4a0fff) AM_READWRITE(K053247_word_r, K053247_word_w)
	141	AM_RANGE(0x4a1000, 0x4a3fff) AM_RAM
	142	AM_RANGE(0x4a8000, 0x4abfff) AM_RAM_WRITE(paletteram16_xRRRRRGGGGGBBBBB_word_w) AM_BASE(&paletteram16) // palette
143	143	AM_RANGE(0x4c0000, 0x4c0001) AM_READ(K053246_word_r)
144		AM_RANGE(0x4e0000, 0x4e0001) AM_READ_PORT("P1_P2")
145		AM_RANGE(0x4e0002, 0x4e0003) AM_READ_PORT("SYSTEM_DSW1")
146		AM_RANGE(0x4e4000, 0x4e4001) AM_READ_PORT("DSW2")
147		AM_RANGE(0x500000, 0x501fff) AM_READ(SMH_RAM)
148		AM_RANGE(0x508000, 0x509fff) AM_READ(SMH_RAM)
149		AM_RANGE(0x510000, 0x513fff) AM_READ(SMH_RAM)
150		AM_RANGE(0x518000, 0x51bfff) AM_READ(SMH_RAM)
151		AM_RANGE(0x600000, 0x6fffff) AM_READNOP          // PSAC 1 ROM readback window
152		AM_RANGE(0x700000, 0x7fffff) AM_READNOP          // PSAC 2 ROM readback window
153		ADDRESS_MAP_END
154
155		static ADDRESS_MAP_START( dbz_writemem, ADDRESS_SPACE_PROGRAM, 16 )
156		AM_RANGE(0x480000, 0x48ffff) AM_WRITE(SMH_RAM)
157		AM_RANGE(0x490000, 0x491fff) AM_WRITE(K056832_ram_word_w)
158		AM_RANGE(0x492000, 0x493fff) AM_WRITE(K056832_ram_word_w)
159		AM_RANGE(0x4a0000, 0x4a0fff) AM_WRITE(K053247_word_w)
160		AM_RANGE(0x4a1000, 0x4a3fff) AM_WRITE(SMH_RAM)
161		AM_RANGE(0x4a8000, 0x4abfff) AM_WRITE(paletteram16_xRRRRRGGGGGBBBBB_word_w) AM_BASE(&paletteram16)
162	144	AM_RANGE(0x4c0000, 0x4c0007) AM_WRITE(K053246_word_w)
163	145	AM_RANGE(0x4c4000, 0x4c4007) AM_WRITE(K053246_word_w)
164	146	AM_RANGE(0x4c8000, 0x4c8007) AM_WRITE(K056832_b_word_w)
165	147	AM_RANGE(0x4cc000, 0x4cc03f) AM_WRITE(K056832_word_w)
166		AM_RANGE(0x4ec000, 0x4ec001) AM_WRITE(dbzcontrol_w)
167	148	AM_RANGE(0x4d0000, 0x4d001f) AM_WRITE(SMH_RAM) AM_BASE(&K053936_0_ctrl)
168	149	AM_RANGE(0x4d4000, 0x4d401f) AM_WRITE(SMH_RAM) AM_BASE(&K053936_1_ctrl)
	150	AM_RANGE(0x4e0000, 0x4e0001) AM_READ_PORT("P1_P2")
	151	AM_RANGE(0x4e0002, 0x4e0003) AM_READ_PORT("SYSTEM_DSW1")
	152	AM_RANGE(0x4e4000, 0x4e4001) AM_READ_PORT("DSW2")
169	153	AM_RANGE(0x4e8000, 0x4e8001) AM_WRITENOP
	154	AM_RANGE(0x4ec000, 0x4ec001) AM_WRITE(dbzcontrol_w)
170	155	AM_RANGE(0x4f0000, 0x4f0001) AM_WRITE(dbz_sound_command_w)
171	156	AM_RANGE(0x4f4000, 0x4f4001) AM_WRITE(dbz_sound_cause_nmi)
172	157	AM_RANGE(0x4f8000, 0x4f801f) AM_WRITENOP      // 251 #1
173	158	AM_RANGE(0x4fc000, 0x4fc01f) AM_WRITE(K053251_lsb_w)   // 251 #2
174		AM_RANGE(0x500000, 0x501fff) AM_WRITE(dbz_bg2_videoram_w) AM_BASE(&dbz_bg2_videoram)
175		AM_RANGE(0x508000, 0x509fff) AM_WRITE(dbz_bg1_videoram_w) AM_BASE(&dbz_bg1_videoram)
176		AM_RANGE(0x510000, 0x513fff) AM_WRITE(SMH_RAM) AM_BASE(&K053936_0_linectrl) // ?? guess, it might not be
177		AM_RANGE(0x518000, 0x51bfff) AM_WRITE(SMH_RAM) AM_BASE(&K053936_1_linectrl) // ?? guess, it might not be
	159
	160	AM_RANGE(0x500000, 0x501fff) AM_RAM_WRITE(dbz_bg2_videoram_w) AM_BASE(&dbz_bg2_videoram)
	161	AM_RANGE(0x508000, 0x509fff) AM_RAM_WRITE(dbz_bg1_videoram_w) AM_BASE(&dbz_bg1_videoram)
	162	AM_RANGE(0x510000, 0x513fff) AM_RAM AM_BASE(&K053936_0_linectrl) // ?? guess, it might not be
	163	AM_RANGE(0x518000, 0x51bfff) AM_RAM AM_BASE(&K053936_1_linectrl) // ?? guess, it might not be
	164	AM_RANGE(0x600000, 0x6fffff) AM_READNOP          // PSAC 1 ROM readback window
	165	AM_RANGE(0x700000, 0x7fffff) AM_READNOP          // PSAC 2 ROM readback window
178	166	ADDRESS_MAP_END
179	167
180	168	/* dbz sound */
181	169	/* IRQ: from YM2151.  NMI: from 68000.  Port 0: write to ack NMI */
182	170
183		static ADDRESS_MAP_START( dbz_sound_readmem, ADDRESS_SPACE_PROGRAM, 8 )
184		AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM)
185		AM_RANGE(0x8000, 0xbfff) AM_READ(SMH_RAM)
186		AM_RANGE(0xc000, 0xc001) AM_DEVREAD("ym", ym2151_r)
187		AM_RANGE(0xd000, 0xd002) AM_DEVREAD("oki", okim6295_r)
	171	static ADDRESS_MAP_START( dbz_sound_map, ADDRESS_SPACE_PROGRAM, 8 )
	172	AM_RANGE(0x0000, 0x7fff) AM_ROM
	173	AM_RANGE(0x8000, 0xbfff) AM_RAM
	174	AM_RANGE(0xc000, 0xc001) AM_DEVREADWRITE("ym", ym2151_r, ym2151_w)
	175	AM_RANGE(0xd000, 0xd002) AM_DEVREADWRITE("oki", okim6295_r, okim6295_w)
188	176	AM_RANGE(0xe000, 0xe001) AM_READ(soundlatch_r)
189	177	ADDRESS_MAP_END
190	178
191		static ADDRESS_MAP_START( dbz_sound_writemem, ADDRESS_SPACE_PROGRAM, 8 )
192		AM_RANGE(0x0000, 0x7fff) AM_WRITE(SMH_ROM)
193		AM_RANGE(0x8000, 0xbfff) AM_WRITE(SMH_RAM)
194		AM_RANGE(0xc000, 0xc001) AM_DEVWRITE("ym", ym2151_w)
195		AM_RANGE(0xd000, 0xd001) AM_DEVWRITE("oki", okim6295_w)
196		ADDRESS_MAP_END
197
198	179	static ADDRESS_MAP_START( dbz_sound_io_map, ADDRESS_SPACE_IO, 8 )
199	180	ADDRESS_MAP_GLOBAL_MASK(0xff)
200	181	AM_RANGE(0x00, 0x00) AM_WRITENOP
r4679	r4680
341	322
342	323	/* basic machine hardware */
343	324	MDRV_CPU_ADD("maincpu", M68000, 16000000)
344		MDRV_CPU_PROGRAM_MAP(dbz_readmem,dbz_writemem)
	325	MDRV_CPU_PROGRAM_MAP(dbz_map,0)
345	326	MDRV_CPU_VBLANK_INT_HACK(dbz_interrupt,2)
346	327
347	328	MDRV_CPU_ADD("audiocpu", Z80, 4000000)
348		MDRV_CPU_PROGRAM_MAP(dbz_sound_readmem, dbz_sound_writemem)
	329	MDRV_CPU_PROGRAM_MAP(dbz_sound_map, 0)
349	330	MDRV_CPU_IO_MAP(dbz_sound_io_map, 0)
350	331
351	332	MDRV_GFXDECODE(dbz)

src/mame/drivers/cybertnk.c

r4679	r4680
304	304	case 0:
305	305	// sound data
306	306	if (ACCESSING_BITS_0_7)
307		cpu_set_input_line(space->machine->cpu[2], 0, HOLD_LINE);
	307	cputag_set_input_line(space->machine, "audiocpu", 0, HOLD_LINE);
308	308	else
309	309	LOG_UNKNOWN_WRITE
310	310	break;

src/mame/drivers/wc90.c

r4679	r4680
76	76
77	77
78	78	bankaddress = 0x10000 + ( ( data & 0xf8 ) << 8 );
79		memory_set_bankptr(space->machine, 1,&RAM[bankaddress] );
	79	memory_set_bankptr(space->machine, 1, &RAM[bankaddress] );
80	80	}
81	81
82	82	static WRITE8_HANDLER( wc90_bankswitch1_w )
r4679	r4680
86	86
87	87
88	88	bankaddress = 0x10000 + ( ( data & 0xf8 ) << 8 );
89		memory_set_bankptr(space->machine, 2,&RAM[bankaddress] );
	89	memory_set_bankptr(space->machine, 2, &RAM[bankaddress] );
90	90	}
91	91
92	92	static WRITE8_HANDLER( wc90_sound_command_w )
93	93	{
94		soundlatch_w(space,offset,data);
95		cpu_set_input_line(space->machine->cpu[2],INPUT_LINE_NMI,PULSE_LINE);
	94	soundlatch_w(space, offset, data);
	95	cputag_set_input_line(space->machine, "audiocpu", INPUT_LINE_NMI, PULSE_LINE);
96	96	}
97	97
98	98
r4679	r4680
105	105	AM_RANGE(0xc000, 0xcfff) AM_RAM_WRITE(wc90_bgvideoram_w) AM_BASE(&wc90_bgvideoram)
106	106	AM_RANGE(0xd000, 0xdfff) AM_RAM
107	107	AM_RANGE(0xe000, 0xefff) AM_RAM_WRITE(wc90_txvideoram_w) AM_BASE(&wc90_txvideoram)   /* tx video ram */
108		AM_RANGE(0xf000, 0xf7ff) AM_READWRITE(SMH_BANK1, SMH_ROM)
	108	AM_RANGE(0xf000, 0xf7ff) AM_READWRITE(SMH_BANK(1), SMH_ROM)
109	109	AM_RANGE(0xf800, 0xfbff) AM_READWRITE(wc90_shared_r, wc90_shared_w) AM_BASE(&wc90_shared)
110	110	AM_RANGE(0xfc00, 0xfc00) AM_READ_PORT("P1")
111	111	AM_RANGE(0xfc02, 0xfc02) AM_READ_PORT("P2")
r4679	r4680
135	135	AM_RANGE(0xd000, 0xd7ff) AM_RAM_WRITE(SMH_RAM) AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
136	136	AM_RANGE(0xd800, 0xdfff) AM_RAM
137	137	AM_RANGE(0xe000, 0xe7ff) AM_RAM_WRITE(paletteram_xxxxBBBBRRRRGGGG_be_w) AM_BASE(&paletteram)
138		AM_RANGE(0xf000, 0xf7ff) AM_READWRITE(SMH_BANK2, SMH_ROM)
	138	AM_RANGE(0xf000, 0xf7ff) AM_READWRITE(SMH_BANK(2), SMH_ROM)
139	139	AM_RANGE(0xf800, 0xfbff) AM_READWRITE(wc90_shared_r, wc90_shared_w)
140	140	AM_RANGE(0xfc00, 0xfc00) AM_WRITE(wc90_bankswitch1_w)
141	141	AM_RANGE(0xfc01, 0xfc01) AM_WRITE(watchdog_reset_w)
r4679	r4680
282	282	/* handler called by the 2608 emulator when the internal timers cause an IRQ */
283	283	static void irqhandler(const device_config *device, int irq)
284	284	{
285		cpu_set_input_line(device->machine->cpu[2],0,irq ? ASSERT_LINE : CLEAR_LINE);
	285	cputag_set_input_line(device->machine, "audiocpu", 0, irq ? ASSERT_LINE : CLEAR_LINE);
286	286	}
287	287
288	288	static const ym2608_interface ym2608_config =

src/mame/drivers/gauntlet.c

r4679	r4680
149	149
150	150	static void update_interrupts(running_machine *machine)
151	151	{
152		cpu_set_input_line(machine->cpu[0], 4, atarigen_video_int_state ? ASSERT_LINE : CLEAR_LINE);
153		cpu_set_input_line(machine->cpu[0], 6, atarigen_sound_int_state ? ASSERT_LINE : CLEAR_LINE);
	152	cputag_set_input_line(machine, "maincpu", 4, atarigen_video_int_state ? ASSERT_LINE : CLEAR_LINE);
	153	cputag_set_input_line(machine, "maincpu", 6, atarigen_sound_int_state ? ASSERT_LINE : CLEAR_LINE);
154	154	}
155	155
156	156
157	157	static void scanline_update(const device_config *screen, int scanline)
158	158	{
159		const address_space *space = cpu_get_address_space(screen->machine->cpu[1], ADDRESS_SPACE_PROGRAM);
	159	const address_space *space = cputag_get_address_space(screen->machine, "audiocpu", ADDRESS_SPACE_PROGRAM);
160	160
161	161	/* sound IRQ is on 32V */
162	162	if (scanline & 32)
163		atarigen_6502_irq_gen(screen->machine->cpu[1]);
	163	atarigen_6502_irq_gen(cputag_get_cpu(screen->machine, "audiocpu"));
164	164	else
165	165	atarigen_6502_irq_ack_r(space, 0);
166	166	}
r4679	r4680
175	175	atarigen_slapstic_reset();
176	176	atarigen_interrupt_reset(update_interrupts);
177	177	atarigen_scanline_timer_reset(machine->primary_screen, scanline_update, 32);
178		atarigen_sound_io_reset(machine->cpu[1]);
	178	atarigen_sound_io_reset(cputag_get_cpu(machine, "audiocpu"));
179	179	}
180	180
181	181
r4679	r4680
211	211
212	212	if ((oldword ^ sound_reset_val) & 1)
213	213	{
214		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_RESET, (sound_reset_val & 1) ? CLEAR_LINE : ASSERT_LINE);
	214	cputag_set_input_line(space->machine, "audiocpu", INPUT_LINE_RESET, (sound_reset_val & 1) ? CLEAR_LINE : ASSERT_LINE);
215	215	atarigen_sound_reset(space->machine);
216	216	}
217	217	}
r4679	r4680
1630	1630	{
1631	1631	UINT8 *rom = memory_region(machine, "maincpu");
1632	1632	atarigen_eeprom_default = NULL;
1633		atarigen_slapstic_init(machine->cpu[0], 0x038000, 0, slapstic);
	1633	atarigen_slapstic_init(cputag_get_cpu(machine, "maincpu"), 0x038000, 0, slapstic);
1634	1634
1635	1635	/* swap the top and bottom halves of the main CPU ROM images */
1636	1636	atarigen_swap_mem(rom + 0x000000, rom + 0x008000, 0x8000);
r4679	r4680
1665	1665	static DRIVER_INIT( vindctr2 )
1666	1666	{
1667	1667	UINT8 *gfx2_base = memory_region(machine, "gfx2");
1668		UINT8 *data = malloc_or_die(0x8000);
	1668	UINT8 *data = alloc_array_or_die(UINT8, 0x8000);
1669	1669	int i;
1670	1670
1671	1671	gauntlet_common_init(machine, 118, 1);

src/mame/drivers/ms32.c

r4679	r4680
223	223
224	224	static WRITE32_HANDLER( ms32_sound_w )
225	225	{
226		soundlatch_w(space,0, data & 0xff);
227		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_NMI, ASSERT_LINE);
	226	soundlatch_w(space, 0, data & 0xff);
	227	cputag_set_input_line(space->machine, "audiocpu", INPUT_LINE_NMI, ASSERT_LINE);
228	228
229	229	// give the Z80 time to respond
230	230	cpu_spinuntil_time(space->cpu, ATTOTIME_IN_USEC(40));
r4679	r4680
237	237
238	238	static WRITE32_HANDLER( reset_sub_w )
239	239	{
240		if(data) cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_RESET, PULSE_LINE); // 0 too ?
	240	if(data) cputag_set_input_line(space->machine, "audiocpu", INPUT_LINE_RESET, PULSE_LINE); // 0 too ?
241	241	}
242	242
243	243
r4679	r4680
268	268	support for them bad tiles appear in the bg.
269	269	*/
270	270
271
272		static ADDRESS_MAP_START( ms32_readmem, ADDRESS_SPACE_PROGRAM, 32 )
273		AM_RANGE(0x00000000, 0x001fffff) AM_READ(SMH_ROM)
274		AM_RANGE(0xfc000000, 0xfc007fff) AM_READ(SMH_RAM)
275		AM_RANGE(0xfc800000, 0xfc800003) AM_READNOP   /* sound? */
276		AM_RANGE(0xfcc00004, 0xfcc00007) AM_READ_PORT("INPUTS")
277		AM_RANGE(0xfcc00010, 0xfcc00013) AM_READ_PORT("DSW")
278		/**/AM_RANGE(0xfce00600, 0xfce0065f) AM_READ(SMH_RAM)   /* roz control registers */
279		/**/AM_RANGE(0xfce00a00, 0xfce00a17) AM_READ(SMH_RAM)   /* tx scroll registers */
280		/**/AM_RANGE(0xfce00a20, 0xfce00a37) AM_READ(SMH_RAM)   /* bg scroll registers */
281
282		AM_RANGE(0xfd000000, 0xfd000003) AM_READ(ms32_sound_r)
283		AM_RANGE(0xfd0e0000, 0xfd0e0003) AM_READ(ms32_read_inputs3) /* analog controls in f1superb? */
284
285		///**/AM_RANGE(0xfd104000, 0xfd105fff) AM_READ(SMH_RAM) /* f1superb */
286		///**/AM_RANGE(0xfd144000, 0xfd145fff) AM_READ(SMH_RAM) /* f1superb */
287
288		AM_RANGE(0xfd180000, 0xfd19ffff) AM_READ(ms32_priram_r)   /* priority ram */
289		AM_RANGE(0xfd1a0000, 0xfd1bffff) AM_READ(ms32_priram_r)   /* mirror only used by memory test in service mode */
290
291		AM_RANGE(0xfd400000, 0xfd43ffff) AM_READ(SMH_RAM) /* Palette */
292		///**/AM_RANGE(0xfd440000, 0xfd47ffff) AM_READ(SMH_RAM) /* f1superb color */
293
294		///**/AM_RANGE(0xfdc00000, 0xfdc006ff) AM_READ(SMH_RAM) /* f1superb */
295		///**/AM_RANGE(0xfde00000, 0xfde01fff) AM_READ(SMH_RAM) /* f1superb lineram */
296		AM_RANGE(0xfe000000, 0xfe01ffff) AM_READ(ms32_rozram_r)   /* roz layer */
297		AM_RANGE(0xfe020000, 0xfe03ffff) AM_READ(ms32_rozram_r)   /* mirror only used by memory test in service mode */
298		AM_RANGE(0xfe200000, 0xfe201fff) AM_READ(ms32_lineram_r) /* line ram for roz layer */
299		///**/AM_RANGE(0xfe202000, 0xfe2fffff) AM_READ(SMH_RAM) /* f1superb vram */
300
301		AM_RANGE(0xfe800000, 0xfe83ffff) AM_READ(ms32_spram_r)   /* sprites */
302		AM_RANGE(0xfe840000, 0xfe87ffff) AM_READ(ms32_spram_r)   /* mirror only used by memory test in service mode */
303		AM_RANGE(0xfec00000, 0xfec07fff) AM_READ(ms32_txram_r)   /* tx layer */
304		AM_RANGE(0xfec08000, 0xfec0ffff) AM_READ(ms32_bgram_r)   /* bg layer */
305		AM_RANGE(0xfec10000, 0xfec17fff) AM_READ(ms32_txram_r)   /* mirror only used by memory test in service mode */
306		AM_RANGE(0xfec18000, 0xfec1ffff) AM_READ(ms32_bgram_r)
307		AM_RANGE(0xfee00000, 0xfee1ffff) AM_READ(SMH_RAM)
308		AM_RANGE(0xffe00000, 0xffffffff) AM_READ(SMH_BANK1)
309		ADDRESS_MAP_END
310
311	271	static WRITE32_HANDLER( pip_w )
312	272	{
313	273	if (data)
314	274	popmessage("fce00a7c = %02x",data);
315	275	}
316	276
317		static ADDRESS_MAP_START( ms32_writemem, ADDRESS_SPACE_PROGRAM, 32 )
318		AM_RANGE(0x00000000, 0x001fffff) AM_WRITE(SMH_ROM)
319		AM_RANGE(0xfc000000, 0xfc007fff) AM_WRITE(SMH_RAM) AM_BASE(&ms32_fc000000)   // NVRAM?
	277	static ADDRESS_MAP_START( ms32_map, ADDRESS_SPACE_PROGRAM, 32 )
	278	AM_RANGE(0x00000000, 0x001fffff) AM_ROM
	279	AM_RANGE(0xfc000000, 0xfc007fff) AM_RAM AM_BASE(&ms32_fc000000)   // NVRAM?
	280	AM_RANGE(0xfc800000, 0xfc800003) AM_READNOP   /* sound? */
320	281	AM_RANGE(0xfc800000, 0xfc800003) AM_WRITE(ms32_sound_w) /* sound? */
321		AM_RANGE(0xfce00000, 0xfce00003) AM_WRITE(ms32_gfxctrl_w)   /* flip screen + other unknown bits */
	282
	283	AM_RANGE(0xfcc00004, 0xfcc00007) AM_READ_PORT("INPUTS")
	284	AM_RANGE(0xfcc00010, 0xfcc00013) AM_READ_PORT("DSW")
	285
322	286	AM_RANGE(0xfce00034, 0xfce00037) AM_WRITENOP // irq ack?
323	287	AM_RANGE(0xfce00038, 0xfce0003b) AM_WRITE(reset_sub_w)
324	288	AM_RANGE(0xfce00050, 0xfce0005f) AM_WRITENOP   // watchdog? I haven't investigated
325		//  AM_RANGE(0xfce00000, 0xfce0007f) AM_WRITE(SMH_RAM) AM_BASE(&ms32_fce00000) /* registers not ram? */
	289	//  AM_RANGE(0xfce00000, 0xfce0007f) AM_WRITEONLY AM_BASE(&ms32_fce00000) /* registers not ram? */
	290	AM_RANGE(0xfce00000, 0xfce00003) AM_WRITE(ms32_gfxctrl_w)   /* flip screen + other unknown bits */
326	291	AM_RANGE(0xfce00280, 0xfce0028f) AM_WRITE(ms32_brightness_w)   // global brightness control
327		AM_RANGE(0xfce00600, 0xfce0065f) AM_WRITE(SMH_RAM) AM_BASE(&ms32_roz_ctrl)   /* roz control registers */
328		//  { 0xfce00800, 0xfce0085f, // f1superb, roz #2 control?
329		AM_RANGE(0xfce00a00, 0xfce00a17) AM_WRITE(SMH_RAM) AM_BASE(&ms32_tx_scroll)   /* tx layer scroll */
330		AM_RANGE(0xfce00a20, 0xfce00a37) AM_WRITE(SMH_RAM) AM_BASE(&ms32_bg_scroll)   /* bg layer scroll */
	292	/**/AM_RANGE(0xfce00600, 0xfce0065f) AM_RAM AM_BASE(&ms32_roz_ctrl)      /* roz control registers */
	293	/**/AM_RANGE(0xfce00a00, 0xfce00a17) AM_RAM AM_BASE(&ms32_tx_scroll)   /* tx layer scroll */
	294	/**/AM_RANGE(0xfce00a20, 0xfce00a37) AM_RAM AM_BASE(&ms32_bg_scroll)   /* bg layer scroll */
331	295	AM_RANGE(0xfce00a7c, 0xfce00a7f) AM_WRITE(pip_w)   // ??? layer related? seems to be always 0
	296	//  AM_RANGE(0xfce00800, 0xfce0085f) // f1superb, roz #2 control?
332	297	//  AM_RANGE(0xfce00e00, 0xfce00e03)    coin counters + something else
333	298
334		//  AM_RANGE(0xfd104000, 0xfd105fff) AM_WRITE(SMH_RAM) /* f1superb */
335		//  AM_RANGE(0xfd144000, 0xfd145fff) AM_WRITE(SMH_RAM) /* f1superb */
	299	AM_RANGE(0xfd000000, 0xfd000003) AM_READ(ms32_sound_r)
	300	AM_RANGE(0xfd0e0000, 0xfd0e0003) AM_READ(ms32_read_inputs3) /* analog controls in f1superb? */
336	301
337		AM_RANGE(0xfd180000, 0xfd19ffff) AM_WRITE(ms32_priram_w) AM_BASE(&ms32_priram)   /* priority ram */
338		AM_RANGE(0xfd1a0000, 0xfd1bffff) AM_WRITE(ms32_priram_w)         /* mirror only used by memory test in service mode */
	302	///**/AM_RANGE(0xfd104000, 0xfd105fff) AM_RAM /* f1superb */
	303	///**/AM_RANGE(0xfd144000, 0xfd145fff) AM_RAM /* f1superb */
339	304
340		AM_RANGE(0xfd1c0000, 0xfd1c0003) AM_WRITE(SMH_RAM) AM_BASE(&ms32_mahjong_input_select) // ?
	305	AM_RANGE(0xfd180000, 0xfd19ffff) AM_READWRITE(ms32_priram_r,ms32_priram_w) AM_BASE(&ms32_priram) /* priority ram */
	306	AM_RANGE(0xfd1a0000, 0xfd1bffff) AM_READWRITE(ms32_priram_r,ms32_priram_w)   /* mirror only used by memory test in service mode */
	307	AM_RANGE(0xfd1c0000, 0xfd1c0003) AM_WRITEONLY AM_BASE(&ms32_mahjong_input_select)
341	308
342		AM_RANGE(0xfd400000, 0xfd43ffff) AM_WRITE(ms32_palram_w) AM_BASE(&ms32_palram) /* Palette */
343		///**/AM_RANGE(0xfd440000, 0xfd47ffff) AM_WRITE(SMH_RAM) /* f1superb color */
344		//  AM_RANGE(0xfdc00000, 0xfdc006ff) AM_WRITE(SMH_RAM) /* f1superb */
345		//  AM_RANGE(0xfde00000, 0xfde01fff) AM_WRITE(SMH_RAM) /* f1superb, lineram #2? */
	309	AM_RANGE(0xfd400000, 0xfd43ffff) AM_RAM_WRITE(ms32_palram_w) AM_BASE(&ms32_palram) /* Palette */
	310	///**/AM_RANGE(0xfd440000, 0xfd47ffff) AM_RAM /* f1superb color */
346	311
347		AM_RANGE(0xfe000000, 0xfe01ffff) AM_WRITE(ms32_rozram_w) AM_BASE(&ms32_rozram)   /* roz layer */
348		AM_RANGE(0xfe020000, 0xfe03ffff) AM_WRITE(ms32_rozram_w)      /* mirror only used by memory test in service mode */
	312	///**/AM_RANGE(0xfdc00000, 0xfdc006ff) AM_RAM /* f1superb */
	313	///**/AM_RANGE(0xfde00000, 0xfde01fff) AM_RAM /* f1superb lineram #2? */
	314	AM_RANGE(0xfe000000, 0xfe01ffff) AM_READWRITE(ms32_rozram_r,ms32_rozram_w) AM_BASE(&ms32_rozram)   /* roz layer */
	315	AM_RANGE(0xfe020000, 0xfe03ffff) AM_READWRITE(ms32_rozram_r,ms32_rozram_w)   /* mirror only used by memory test in service mode */
349	316	AM_RANGE(0xfe1ffc88, 0xfe1fffff) AM_WRITENOP   /* gratia writes here before falling into lineram, could be a mirror */
350		AM_RANGE(0xfe200000, 0xfe201fff) AM_WRITE(ms32_lineram_w) AM_BASE(&ms32_lineram) /* line ram for roz layer */
351		///**/AM_RANGE(0xfe202000, 0xfe2fffff) AM_WRITE(SMH_RAM) /* f1superb vram */
352		///**/AM_RANGE(0xfe100000, 0xfe1fffff) AM_WRITE(SMH_RAM) /* gratia writes here ?! */
353		AM_RANGE(0xfe800000, 0xfe83ffff) AM_WRITE(ms32_spram_w) AM_BASE(&ms32_spram)   /* sprites */
354		AM_RANGE(0xfe840000, 0xfe87ffff) AM_WRITE(ms32_spram_w)      /* mirror only used by memory test in service mode */
355		AM_RANGE(0xfec00000, 0xfec07fff) AM_WRITE(ms32_txram_w) AM_BASE(&ms32_txram)   /* tx layer */
356		AM_RANGE(0xfec08000, 0xfec0ffff) AM_WRITE(ms32_bgram_w) AM_BASE(&ms32_bgram)   /* bg layer */
357		AM_RANGE(0xfec10000, 0xfec17fff) AM_WRITE(ms32_txram_w)      /* mirror only used by memory test in service mode */
358		AM_RANGE(0xfec18000, 0xfec1ffff) AM_WRITE(ms32_bgram_w)      /* mirror used by gametngk at the beginning of the game */
359		AM_RANGE(0xfee00000, 0xfee1ffff) AM_WRITE(SMH_RAM) AM_BASE(&ms32_mainram)
360		AM_RANGE(0xffe00000, 0xffffffff) AM_WRITE(SMH_ROM)
	317	AM_RANGE(0xfe200000, 0xfe201fff) AM_READWRITE(ms32_lineram_r,ms32_lineram_w) AM_BASE(&ms32_lineram) /* line ram for roz layer */
	318	///**/AM_RANGE(0xfe202000, 0xfe2fffff) AM_RAM /* f1superb vram */
	319
	320	AM_RANGE(0xfe800000, 0xfe83ffff) AM_READWRITE(ms32_spram_r,ms32_spram_w) AM_BASE(&ms32_spram)   /* sprites */
	321	AM_RANGE(0xfe840000, 0xfe87ffff) AM_READWRITE(ms32_spram_r,ms32_spram_w) /* mirror only used by memory test in service mode */
	322	AM_RANGE(0xfec00000, 0xfec07fff) AM_READWRITE(ms32_txram_r,ms32_txram_w) AM_BASE(&ms32_txram)   /* tx layer */
	323	AM_RANGE(0xfec08000, 0xfec0ffff) AM_READWRITE(ms32_bgram_r,ms32_bgram_w) AM_BASE(&ms32_bgram)   /* bg layer */
	324	AM_RANGE(0xfec10000, 0xfec17fff) AM_READWRITE(ms32_txram_r,ms32_txram_w) /* mirror only used by memory test in service mode */
	325	AM_RANGE(0xfec18000, 0xfec1ffff) AM_READWRITE(ms32_bgram_r,ms32_bgram_w) /* mirror used by gametngk at the beginning of the game */
	326	AM_RANGE(0xfee00000, 0xfee1ffff) AM_RAM AM_BASE(&ms32_mainram)
	327	AM_RANGE(0xffe00000, 0xffffffff) AM_ROMBANK(1)
361	328	ADDRESS_MAP_END
362	329
363	330	/*************************************
r4679	r4680
1106	1073	static void irq_init(running_machine *machine)
1107	1074	{
1108	1075	irqreq = 0;
1109		cpu_set_input_line(machine->cpu[0], 0, CLEAR_LINE);
1110		cpu_set_irq_callback(machine->cpu[0], irq_callback);
	1076	cputag_set_input_line(machine, "maincpu", 0, CLEAR_LINE);
	1077	cpu_set_irq_callback(cputag_get_cpu(machine, "maincpu"), irq_callback);
1111	1078	}
1112	1079
1113	1080	static void irq_raise(running_machine *machine, int level)
1114	1081	{
1115	1082	irqreq |= (1<<level);
1116		cpu_set_input_line(machine->cpu[0], 0, ASSERT_LINE);
	1083	cputag_set_input_line(machine, "maincpu", 0, ASSERT_LINE);
1117	1084	}
1118	1085
1119	1086	static INTERRUPT_GEN(ms32_interrupt)
r4679	r4680
1156	1123
1157	1124	static READ8_HANDLER( latch_r )
1158	1125	{
1159		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_NMI, CLEAR_LINE);
	1126	cputag_set_input_line(space->machine, "audiocpu", INPUT_LINE_NMI, CLEAR_LINE);
1160	1127	return soundlatch_r(space,0)^0xff;
1161	1128	}
1162	1129
r4679	r4680
1168	1135
1169	1136	static WRITE8_HANDLER( to_main_w )
1170	1137	{
1171		to_main=data;
1172		irq_raise(space->machine, 1);
	1138	to_main=data;
	1139	irq_raise(space->machine, 1);
1173	1140	}
1174	1141
1175		static ADDRESS_MAP_START( ms32_snd_readmem, ADDRESS_SPACE_PROGRAM, 8 )
1176		AM_RANGE(0x0000, 0x3eff) AM_READ(SMH_ROM)
1177		AM_RANGE(0x3f00, 0x3f0f) AM_DEVREAD("ymf", ymf271_r)
1178		AM_RANGE(0x3f10, 0x3f10) AM_READ(latch_r)
	1142	static ADDRESS_MAP_START( ms32_sound_map, ADDRESS_SPACE_PROGRAM, 8 )
	1143	AM_RANGE(0x0000, 0x3eff) AM_ROM
	1144	AM_RANGE(0x3f00, 0x3f0f) AM_DEVREADWRITE("ymf", ymf271_r,ymf271_w)
	1145	AM_RANGE(0x3f10, 0x3f10) AM_READWRITE(latch_r,to_main_w)
1179	1146	AM_RANGE(0x3f20, 0x3f20) AM_READNOP /* 2nd latch ? */
1180		AM_RANGE(0x4000, 0x7fff) AM_READ(SMH_RAM)
1181		AM_RANGE(0x8000, 0xbfff) AM_READ(SMH_BANK4)
1182		AM_RANGE(0xc000, 0xffff) AM_READ(SMH_BANK5)
1183		ADDRESS_MAP_END
1184
1185		static ADDRESS_MAP_START( ms32_snd_writemem, ADDRESS_SPACE_PROGRAM, 8 )
1186		AM_RANGE(0x0000, 0x3eff) AM_WRITE(SMH_ROM)
1187		AM_RANGE(0x3f00, 0x3f0f) AM_DEVWRITE("ymf", ymf271_w)
1188		AM_RANGE(0x3f10, 0x3f10) AM_WRITE(to_main_w)
1189	1147	AM_RANGE(0x3f20, 0x3f20) AM_WRITENOP /* to_main2_w  ? */
1190	1148	AM_RANGE(0x3f40, 0x3f40) AM_WRITENOP   /* YMF271 pin 4 (bit 1) , YMF271 pin 39 (bit 4) */
1191	1149	AM_RANGE(0x3f70, 0x3f70) AM_WRITENOP   // watchdog? banking? very noisy
1192	1150	AM_RANGE(0x3f80, 0x3f80) AM_WRITE(ms32_snd_bank_w)
1193		AM_RANGE(0x4000, 0x7fff) AM_WRITE(SMH_RAM)
1194		AM_RANGE(0x8000, 0xffff) AM_WRITE(SMH_ROM)
	1151	AM_RANGE(0x4000, 0x7fff) AM_RAM
	1152	AM_RANGE(0x8000, 0xbfff) AM_ROMBANK(4)
	1153	AM_RANGE(0xc000, 0xffff) AM_ROMBANK(5)
1195	1154	ADDRESS_MAP_END
1196	1155
	1156
1197	1157	/********** MACHINE INIT **********/
1198	1158
1199	1159	static MACHINE_RESET( ms32 )
r4679	r4680
1210	1170
1211	1171	/* basic machine hardware */
1212	1172	MDRV_CPU_ADD("maincpu", V70, 20000000) // 20MHz
1213		MDRV_CPU_PROGRAM_MAP(ms32_readmem,ms32_writemem)
	1173	MDRV_CPU_PROGRAM_MAP(ms32_map,0)
1214	1174	MDRV_CPU_VBLANK_INT_HACK(ms32_interrupt,32)
1215	1175
1216	1176	MDRV_CPU_ADD("audiocpu", Z80, 4000000)
1217		MDRV_CPU_PROGRAM_MAP(ms32_snd_readmem, ms32_snd_writemem)
	1177	MDRV_CPU_PROGRAM_MAP(ms32_sound_map, 0)
1218	1178
1219	1179	MDRV_QUANTUM_TIME(HZ(60000))
1220	1180
r4679	r4680
2029	1989	source_data = memory_region       ( machine, region );
2030	1990	source_size = memory_region_length( machine, region );
2031	1991
2032		result_data = malloc_or_die(source_size);
	1992	result_data = alloc_array_or_die(UINT8, source_size);
2033	1993
2034	1994	for(i=0; i<source_size; i++)
2035	1995	{
r4679	r4680
2054	2014	source_data = memory_region       ( machine, region );
2055	2015	source_size = memory_region_length( machine, region );
2056	2016
2057		result_data = malloc_or_die(source_size);
	2017	result_data = alloc_array_or_die(UINT8, source_size);
2058	2018
2059	2019	addr_xor ^= 0x1005d;
2060	2020
r4679	r4680
2108	2068	source_data = memory_region       ( machine, region );
2109	2069	source_size = memory_region_length( machine, region );
2110	2070
2111		result_data = malloc_or_die(source_size);
	2071	result_data = alloc_array_or_die(UINT8, source_size);
2112	2072
2113	2073	addr_xor ^= 0xc1c5b;
2114	2074

src/mame/drivers/mpu4.c

r4679	r4680
437	437	memory_configure_bank(machine, 1, 0, 8, &rom[0x01000], 0x10000);
438	438
439	439	memory_set_bank(machine, 1,0);
440		device_reset(machine->cpu[0]);
	440	device_reset(cputag_get_cpu(machine, "maincpu"));
441	441	}
442	442
443	443	}
r4679	r4680
464	464
465	465	if (!serial_card_connected)
466	466	{
467		cpu_set_input_line(device->machine->cpu[0], M6809_IRQ_LINE, combined_state ? ASSERT_LINE : CLEAR_LINE);
	467	cputag_set_input_line(device->machine, "maincpu", M6809_IRQ_LINE, combined_state ? ASSERT_LINE : CLEAR_LINE);
468	468	LOG(("6809 int%d \n", combined_state));
469	469	}
470	470	else
471	471	{
472		cpu_set_input_line(device->machine->cpu[0], M6809_FIRQ_LINE, combined_state ? ASSERT_LINE : CLEAR_LINE);
	472	cputag_set_input_line(device->machine, "maincpu", M6809_FIRQ_LINE, combined_state ? ASSERT_LINE : CLEAR_LINE);
473	473	LOG(("6809 fint%d \n", combined_state));
474	474	}
475	475	}
r4679	r4680
1756	1756	AM_RANGE(0x0E00, 0x0E03) AM_DEVREADWRITE("pia_ic7", pia6821_r,pia6821_w)      /* PIA6821 IC7 */
1757	1757	AM_RANGE(0x0F00, 0x0F03) AM_DEVREADWRITE("pia_ic8", pia6821_r,pia6821_w)      /* PIA6821 IC8 */
1758	1758
1759		AM_RANGE(0x1000, 0xffff) AM_READ(SMH_BANK1)   /* 64k  paged ROM (4 pages)  */
	1759	AM_RANGE(0x1000, 0xffff) AM_READ(SMH_BANK(1))   /* 64k  paged ROM (4 pages)  */
1760	1760	ADDRESS_MAP_END
1761	1761
1762	1762	static ADDRESS_MAP_START( mod4_yam_map, ADDRESS_SPACE_PROGRAM, 8 )
r4679	r4680
1778	1778	AM_RANGE(0x0E00, 0x0E03) AM_DEVREADWRITE("pia_ic7", pia6821_r,pia6821_w)      /* PIA6821 IC7 */
1779	1779	AM_RANGE(0x0F00, 0x0F03) AM_DEVREADWRITE("pia_ic8", pia6821_r,pia6821_w)      /* PIA6821 IC8 */
1780	1780
1781		AM_RANGE(0x1000, 0xffff) AM_READ(SMH_BANK1)   // 64k  paged ROM (4 pages)
	1781	AM_RANGE(0x1000, 0xffff) AM_READ(SMH_BANK(1))   // 64k  paged ROM (4 pages)
1782	1782	ADDRESS_MAP_END
1783	1783
1784	1784	static ADDRESS_MAP_START( mod4_oki_map, ADDRESS_SPACE_PROGRAM, 8 )
r4679	r4680
1802	1802	AM_RANGE(0x0E00, 0x0E03) AM_DEVREADWRITE("pia_ic7", pia6821_r,pia6821_w)      /* PIA6821 IC7 */
1803	1803	AM_RANGE(0x0F00, 0x0F03) AM_DEVREADWRITE("pia_ic8", pia6821_r,pia6821_w)      /* PIA6821 IC8 */
1804	1804
1805		AM_RANGE(0x1000, 0xffff) AM_READ(SMH_BANK1)   // 64k  paged ROM (4 pages)
	1805	AM_RANGE(0x1000, 0xffff) AM_READ(SMH_BANK(1))   // 64k  paged ROM (4 pages)
1806	1806	ADDRESS_MAP_END
1807	1807
1808	1808	// memory map for barcrest mpu4 board /////////////////////////////////////
r4679	r4680
1828	1828	AM_RANGE(0x0E00, 0x0E03) AM_DEVREADWRITE("pia_ic7", pia6821_r,pia6821_w)      /* PIA6821 IC7 */
1829	1829	AM_RANGE(0x0F00, 0x0F03) AM_DEVREADWRITE("pia_ic8", pia6821_r,pia6821_w)      /* PIA6821 IC8 */
1830	1830
1831		AM_RANGE(0x1000, 0xffff) AM_READ(SMH_BANK1)   // 64k paged ROM (4 pages)
	1831	AM_RANGE(0x1000, 0xffff) AM_READ(SMH_BANK(1))   // 64k paged ROM (4 pages)
1832	1832	ADDRESS_MAP_END
1833	1833
1834	1834	static const ay8910_interface ay8910_config =

src/mame/drivers/skylncr.c

r4679	r4680
824	824
825	825	static DRIVER_INIT( skylncr )
826	826	{
827		paletteram   = auto_malloc(0x100 * 3);
828		paletteram_2 = auto_malloc(0x100 * 3);
	827	paletteram   = auto_alloc_array(machine, UINT8, 0x100 * 3);
	828	paletteram_2 = auto_alloc_array(machine, UINT8, 0x100 * 3);
829	829	}
830	830
831	831

src/mame/drivers/darkseal.c

r4679	r4680
41	41	{
42	42	switch (offset<<1) {
43	43	case 6: /* DMA flag */
44		buffer_spriteram16_w(space,0,0,0xffff);
	44	buffer_spriteram16_w(space, 0, 0, 0xffff);
45	45	return;
46	46	case 8: /* Sound CPU write */
47		soundlatch_w(space,0,data & 0xff);
48		cpu_set_input_line(space->machine->cpu[1],0,HOLD_LINE);
	47	soundlatch_w(space, 0, data & 0xff);
	48	cputag_set_input_line(space->machine, "audiocpu", 0, HOLD_LINE);
49	49	return;
50	50	case 0xa: /* IRQ Ack (VBL) */
51	51	return;
r4679	r4680
71	71
72	72	/******************************************************************************/
73	73
74		static ADDRESS_MAP_START( darkseal_readmem, ADDRESS_SPACE_PROGRAM, 16 )
75		AM_RANGE(0x000000, 0x07ffff) AM_READ(SMH_ROM)
76		AM_RANGE(0x100000, 0x103fff) AM_READ(SMH_RAM)
77		AM_RANGE(0x120000, 0x1207ff) AM_READ(SMH_RAM)
78		AM_RANGE(0x140000, 0x140fff) AM_READ(SMH_RAM)
79		AM_RANGE(0x141000, 0x141fff) AM_READ(SMH_RAM)
80		AM_RANGE(0x180000, 0x18000f) AM_READ(darkseal_control_r)
81		AM_RANGE(0x220000, 0x220fff) AM_READ(SMH_RAM)
82		AM_RANGE(0x222000, 0x222fff) AM_READ(SMH_RAM)
83		ADDRESS_MAP_END
84
85		static ADDRESS_MAP_START( darkseal_writemem, ADDRESS_SPACE_PROGRAM, 16 )
86		AM_RANGE(0x000000, 0x07ffff) AM_WRITE(SMH_ROM)
87		AM_RANGE(0x100000, 0x103fff) AM_WRITE(SMH_RAM) AM_BASE(&darkseal_ram)
88		AM_RANGE(0x120000, 0x1207ff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)
89		AM_RANGE(0x140000, 0x140fff) AM_WRITE(darkseal_palette_24bit_rg_w) AM_BASE(&paletteram16)
90		AM_RANGE(0x141000, 0x141fff) AM_WRITE(darkseal_palette_24bit_b_w) AM_BASE(&paletteram16_2)
91		AM_RANGE(0x180000, 0x18000f) AM_WRITE(darkseal_control_w)
	74	static ADDRESS_MAP_START( darkseal_map, ADDRESS_SPACE_PROGRAM, 16 )
	75	AM_RANGE(0x000000, 0x07ffff) AM_ROM
	76	AM_RANGE(0x100000, 0x103fff) AM_RAM AM_BASE(&darkseal_ram)
	77	AM_RANGE(0x120000, 0x1207ff) AM_RAM AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)
	78	AM_RANGE(0x140000, 0x140fff) AM_RAM_WRITE(darkseal_palette_24bit_rg_w) AM_BASE(&paletteram16)
	79	AM_RANGE(0x141000, 0x141fff) AM_RAM_WRITE(darkseal_palette_24bit_b_w) AM_BASE(&paletteram16_2)
	80	AM_RANGE(0x180000, 0x18000f) AM_READWRITE(darkseal_control_r, darkseal_control_w)
92	81	AM_RANGE(0x200000, 0x200fff) AM_WRITE(darkseal_pf3b_data_w) /* 2nd half of pf3, only used on last level */
93	82	AM_RANGE(0x202000, 0x203fff) AM_WRITE(darkseal_pf3_data_w) AM_BASE(&darkseal_pf3_data)
94		AM_RANGE(0x220000, 0x220fff) AM_WRITE(SMH_RAM) AM_BASE(&darkseal_pf12_row)
95		AM_RANGE(0x222000, 0x222fff) AM_WRITE(SMH_RAM) AM_BASE(&darkseal_pf34_row)
	83	AM_RANGE(0x220000, 0x220fff) AM_RAM AM_BASE(&darkseal_pf12_row)
	84	AM_RANGE(0x222000, 0x222fff) AM_RAM AM_BASE(&darkseal_pf34_row)
96	85	AM_RANGE(0x240000, 0x24000f) AM_WRITE(darkseal_control_0_w)
97	86	AM_RANGE(0x260000, 0x261fff) AM_WRITE(darkseal_pf2_data_w) AM_BASE(&darkseal_pf2_data)
98	87	AM_RANGE(0x262000, 0x263fff) AM_WRITE(darkseal_pf1_data_w) AM_BASE(&darkseal_pf1_data)
r4679	r4680
101	90
102	91	/******************************************************************************/
103	92
104		static ADDRESS_MAP_START( sound_readmem, ADDRESS_SPACE_PROGRAM, 8 )
105		AM_RANGE(0x000000, 0x00ffff) AM_READ(SMH_ROM)
106		AM_RANGE(0x100000, 0x100001) AM_DEVREAD("ym1", ym2203_r)
107		AM_RANGE(0x110000, 0x110001) AM_DEVREAD("ym2", ym2151_r)
108		AM_RANGE(0x120000, 0x120001) AM_DEVREAD("oki1", okim6295_r)
109		AM_RANGE(0x130000, 0x130001) AM_DEVREAD("oki2", okim6295_r)
	93	static ADDRESS_MAP_START( sound_map, ADDRESS_SPACE_PROGRAM, 8 )
	94	AM_RANGE(0x000000, 0x00ffff) AM_ROM
	95	AM_RANGE(0x100000, 0x100001) AM_DEVREADWRITE("ym1", ym2203_r, ym2203_w)
	96	AM_RANGE(0x110000, 0x110001) AM_DEVREADWRITE("ym2", ym2151_r, ym2151_w)
	97	AM_RANGE(0x120000, 0x120001) AM_DEVREADWRITE("oki1", okim6295_r, okim6295_w)
	98	AM_RANGE(0x130000, 0x130001) AM_DEVREADWRITE("oki2", okim6295_r, okim6295_w)
110	99	AM_RANGE(0x140000, 0x140001) AM_READ(soundlatch_r)
111		AM_RANGE(0x1f0000, 0x1f1fff) AM_READ(SMH_BANK8)
112		ADDRESS_MAP_END
113
114		static ADDRESS_MAP_START( sound_writemem, ADDRESS_SPACE_PROGRAM, 8 )
115		AM_RANGE(0x000000, 0x00ffff) AM_WRITE(SMH_ROM)
116		AM_RANGE(0x100000, 0x100001) AM_DEVWRITE("ym1", ym2203_w)
117		AM_RANGE(0x110000, 0x110001) AM_DEVWRITE("ym2", ym2151_w)
118		AM_RANGE(0x120000, 0x120001) AM_DEVWRITE("oki1", okim6295_w)
119		AM_RANGE(0x130000, 0x130001) AM_DEVWRITE("oki2", okim6295_w)
120		AM_RANGE(0x1f0000, 0x1f1fff) AM_WRITE(SMH_BANK8)
	100	AM_RANGE(0x1f0000, 0x1f1fff) AM_RAMBANK(8)
121	101	AM_RANGE(0x1fec00, 0x1fec01) AM_WRITE(h6280_timer_w)
122	102	AM_RANGE(0x1ff400, 0x1ff403) AM_WRITE(h6280_irq_status_w)
123	103	ADDRESS_MAP_END
r4679	r4680
251	231
252	232	static void sound_irq(const device_config *device, int state)
253	233	{
254		cpu_set_input_line(device->machine->cpu[1],1,state); /* IRQ 2 */
	234	cputag_set_input_line(device->machine, "audiocpu", 1, state); /* IRQ 2 */
255	235	}
256	236
257	237	static const ym2151_interface ym2151_config =
r4679	r4680
263	243
264	244	/* basic machine hardware */
265	245	MDRV_CPU_ADD("maincpu", M68000,12000000) /* Custom chip 59 */
266		MDRV_CPU_PROGRAM_MAP(darkseal_readmem,darkseal_writemem)
	246	MDRV_CPU_PROGRAM_MAP(darkseal_map,0)
267	247	MDRV_CPU_VBLANK_INT("screen", irq6_line_hold)/* VBL */
268	248
269	249	MDRV_CPU_ADD("audiocpu", H6280, 32220000/4) /* Custom chip 45, Audio section crystal is 32.220 MHz */
270		MDRV_CPU_PROGRAM_MAP(sound_readmem,sound_writemem)
	250	MDRV_CPU_PROGRAM_MAP(sound_map,0)
271	251
272	252	/* video hardware */
273	253	MDRV_VIDEO_ATTRIBUTES(VIDEO_BUFFERS_SPRITERAM)

src/mame/drivers/20pacgal.c

r4679	r4680
66	66	{
67	67	int bit = data & 1;
68	68
69		cpu_interrupt_enable(space->machine->cpu[0], bit);
	69	cpu_interrupt_enable(cputag_get_cpu(space->machine, "maincpu"), bit);
70	70
71	71	if (!bit)
72		cpu_set_input_line(space->machine->cpu[0], 0, CLEAR_LINE );
	72	cputag_set_input_line(space->machine, "maincpu", 0, CLEAR_LINE );
73	73	}
74	74
75	75
r4679	r4680
160	160
161	161	static WRITE8_HANDLER( rom_bank_select_w )
162	162	{
163		_20pacgal_state *state = space->machine->driver_data;
	163	_20pacgal_state *state = (_20pacgal_state *)space->machine->driver_data;
164	164
165	165	state->game_selected = data & 1;
166	166
r4679	r4680
174	174
175	175	static WRITE8_HANDLER( rom_48000_w )
176	176	{
177		_20pacgal_state *state = space->machine->driver_data;
	177	_20pacgal_state *state = (_20pacgal_state *)space->machine->driver_data;
178	178
179	179	if (state->game_selected)
180	180	{

src/mame/drivers/seicross.c

r4679	r4680
86	86	static MACHINE_RESET( friskyt )
87	87	{
88	88	/* start with the protection mcu halted */
89		cpu_set_input_line(machine->cpu[1], INPUT_LINE_HALT, ASSERT_LINE);
	89	cputag_set_input_line(machine, "mcu", INPUT_LINE_HALT, ASSERT_LINE);
90	90	}
91	91
92	92
r4679	r4680
100	100	{
101	101	//logerror("PC %04x: 8910 port B = %02x\n",cpu_get_pc(space->cpu),data);
102	102	/* bit 0 is IRQ enable */
103		cpu_interrupt_enable(device->machine->cpu[0],data & 1);
	103	cpu_interrupt_enable(cputag_get_cpu(device->machine, "maincpu"), data & 1);
104	104
105	105	/* bit 1 flips screen */
106	106
r4679	r4680
108	108	if (((portb & 4) == 0) && (data & 4))
109	109	{
110	110	/* reset and start the protection mcu */
111		cpu_set_input_line(device->machine->cpu[1], INPUT_LINE_RESET, PULSE_LINE);
112		cpu_set_input_line(device->machine->cpu[1], INPUT_LINE_HALT, CLEAR_LINE);
	111	cputag_set_input_line(device->machine, "mcu", INPUT_LINE_RESET, PULSE_LINE);
	112	cputag_set_input_line(device->machine, "mcu", INPUT_LINE_HALT, CLEAR_LINE);
113	113	}
114	114
115	115	/* other bits unknown */

src/mame/drivers/spbactn.c

r4679	r4680
140	140	{
141	141	if (ACCESSING_BITS_0_7)
142	142	{
143		soundlatch_w(space,offset,data & 0xff);
144		cpu_set_input_line(space->machine->cpu[1],INPUT_LINE_NMI,PULSE_LINE);
	143	soundlatch_w(space, offset, data & 0xff);
	144	cputag_set_input_line(space->machine, "audiocpu", INPUT_LINE_NMI, PULSE_LINE);
145	145	}
146	146	}
147	147
148		static ADDRESS_MAP_START( spbactn_readmem, ADDRESS_SPACE_PROGRAM, 16 )
149		AM_RANGE(0x00000, 0x3ffff) AM_READ(SMH_ROM)
150		AM_RANGE(0x40000, 0x43fff) AM_READ(SMH_RAM)
151		AM_RANGE(0x50000, 0x50fff) AM_READ(SMH_RAM)
152		AM_RANGE(0x60000, 0x67fff) AM_READ(SMH_RAM)
153		AM_RANGE(0x70000, 0x77fff) AM_READ(SMH_RAM)
154		AM_RANGE(0x80000, 0x82fff) AM_READ(SMH_RAM)
	148	static ADDRESS_MAP_START( spbactn_map, ADDRESS_SPACE_PROGRAM, 16 )
	149	AM_RANGE(0x00000, 0x3ffff) AM_ROM
	150	AM_RANGE(0x40000, 0x43fff) AM_RAM   // main ram
	151	AM_RANGE(0x50000, 0x50fff) AM_RAM AM_BASE(&spbactn_spvideoram)
	152	AM_RANGE(0x60000, 0x67fff) AM_RAM AM_BASE(&spbactn_fgvideoram)
	153	AM_RANGE(0x70000, 0x77fff) AM_RAM AM_BASE(&spbactn_bgvideoram)
	154	AM_RANGE(0x80000, 0x827ff) AM_RAM_WRITE(paletteram16_xxxxBBBBGGGGRRRR_word_w) AM_BASE(&paletteram16)
155	155	AM_RANGE(0x90000, 0x90001) AM_READ_PORT("IN0")
156	156	AM_RANGE(0x90010, 0x90011) AM_READ_PORT("IN1")
157	157	AM_RANGE(0x90020, 0x90021) AM_READ_PORT("SYSTEM")
158	158	AM_RANGE(0x90030, 0x90031) AM_READ_PORT("DSW1")
159	159	AM_RANGE(0x90040, 0x90041) AM_READ_PORT("DSW2")
160		ADDRESS_MAP_END
161	160
162		static ADDRESS_MAP_START( spbactn_writemem, ADDRESS_SPACE_PROGRAM, 16 )
163		AM_RANGE(0x00000, 0x3ffff) AM_WRITE(SMH_ROM)
164		AM_RANGE(0x40000, 0x43fff) AM_WRITE(SMH_RAM)   // main ram
165		AM_RANGE(0x50000, 0x50fff) AM_WRITE(SMH_RAM) AM_BASE(&spbactn_spvideoram)
166		AM_RANGE(0x60000, 0x67fff) AM_WRITE(SMH_RAM) AM_BASE(&spbactn_fgvideoram)
167		AM_RANGE(0x70000, 0x77fff) AM_WRITE(SMH_RAM) AM_BASE(&spbactn_bgvideoram)
168		AM_RANGE(0x80000, 0x827ff) AM_WRITE(paletteram16_xxxxBBBBGGGGRRRR_word_w) AM_BASE(&paletteram16)
169
170	161	/* this is an awful lot of unknowns */
171	162	AM_RANGE(0x90000, 0x90001) AM_WRITENOP
172	163	AM_RANGE(0x90010, 0x90011) AM_WRITE(soundcommand_w)
r4679	r4680
200	191	AM_RANGE(0xa0206, 0xa0207) AM_WRITENOP
201	192	ADDRESS_MAP_END
202	193
203		static ADDRESS_MAP_START( sound_readmem, ADDRESS_SPACE_PROGRAM, 8 )
204		AM_RANGE(0x0000, 0xefff) AM_READ(SMH_ROM)
205		AM_RANGE(0xf000, 0xf7ff) AM_READ(SMH_RAM)
206		AM_RANGE(0xf800, 0xf800) AM_DEVREAD("oki", okim6295_r)
207		AM_RANGE(0xfc00, 0xfc00) AM_READNOP   /* irq ack ?? */
	194	static ADDRESS_MAP_START( spbactn_sound_map, ADDRESS_SPACE_PROGRAM, 8 )
	195	AM_RANGE(0x0000, 0xefff) AM_ROM
	196	AM_RANGE(0xf000, 0xf7ff) AM_RAM
	197	AM_RANGE(0xf800, 0xf800) AM_DEVREADWRITE("oki", okim6295_r,okim6295_w)
	198	AM_RANGE(0xf810, 0xf811) AM_DEVWRITE("ym", ym3812_w)
	199
	200	AM_RANGE(0xfc00, 0xfc00) AM_READNOP   AM_WRITENOP /* irq ack ?? */
208	201	AM_RANGE(0xfc20, 0xfc20) AM_READ(soundlatch_r)
209	202	ADDRESS_MAP_END
210	203
211		static ADDRESS_MAP_START( sound_writemem, ADDRESS_SPACE_PROGRAM, 8 )
212		AM_RANGE(0x0000, 0xefff) AM_WRITE(SMH_ROM)
213		AM_RANGE(0xf000, 0xf7ff) AM_WRITE(SMH_RAM)
214		AM_RANGE(0xf800, 0xf800) AM_DEVWRITE("oki", okim6295_w)
215		AM_RANGE(0xf810, 0xf811) AM_DEVWRITE("ym", ym3812_w)
216		AM_RANGE(0xfc00, 0xfc00) AM_WRITENOP   /* irq ack ?? */
217		ADDRESS_MAP_END
218	204
219	205	static INPUT_PORTS_START( spbactn )
220	206	PORT_START("IN0")
r4679	r4680
344	330
345	331	static void irqhandler(const device_config *device, int linestate)
346	332	{
347		cpu_set_input_line(device->machine->cpu[1],0,linestate);
	333	cputag_set_input_line(device->machine, "audiocpu", 0, linestate);
348	334	}
349	335
350	336	static const ym3812_interface ym3812_config =
r4679	r4680
355	341	static MACHINE_DRIVER_START( spbactn )
356	342	/* basic machine hardware */
357	343	MDRV_CPU_ADD("maincpu", M68000, 12000000)
358		MDRV_CPU_PROGRAM_MAP(spbactn_readmem,spbactn_writemem)
	344	MDRV_CPU_PROGRAM_MAP(spbactn_map,0)
359	345	MDRV_CPU_VBLANK_INT("screen", irq3_line_hold)
360	346
361	347	MDRV_CPU_ADD("audiocpu", Z80, 4000000)   /* 4 MHz ??? */
362		MDRV_CPU_PROGRAM_MAP(sound_readmem,sound_writemem)
	348	MDRV_CPU_PROGRAM_MAP(spbactn_sound_map,0)
363	349
364	350	/* video hardware */
365	351	MDRV_SCREEN_ADD("screen", RASTER)

src/mame/drivers/system16.c

r4679	r4680
255	255	sample_buffer <<= 4;
256	256	sample_select ^= 1;
257	257	if(sample_select == 0)
258		cpu_set_input_line(device->machine->cpu[1], INPUT_LINE_NMI, PULSE_LINE);
	258	cputag_set_input_line(device->machine, "soundcpu", INPUT_LINE_NMI, PULSE_LINE);
259	259	}
260	260
261	261	static const msm5205_interface tturfbl_msm5205_interface =
r4679	r4680
367	367	{
368	368	if( ACCESSING_BITS_0_7 )
369	369	{
370		soundlatch_w( space,0,data&0xff );
371		cpu_set_input_line(space->machine->cpu[1], 0, HOLD_LINE );
	370	soundlatch_w( space, 0, data & 0xff );
	371	cputag_set_input_line(space->machine, "soundcpu", 0, HOLD_LINE );
372	372	}
373	373	}
374	374
375	375	static WRITE16_HANDLER( sound_command_nmi_w )
376	376	{
377	377	if( ACCESSING_BITS_0_7 )
378		{
379		soundlatch_w( space,0,data&0xff );
380		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_NMI, PULSE_LINE);
	378	{
	379	soundlatch_w( space, 0, data & 0xff );
	380	cputag_set_input_line(space->machine, "soundcpu", INPUT_LINE_NMI, PULSE_LINE);
381	381	}
382	382	}
383	383
r4679	r4680
1141	1141
1142	1142	static WRITE16_HANDLER( ga_sound_command_w )
1143	1143	{
1144		COMBINE_DATA( &sys16_workingram[(0xecfc-0xc000)/2] );
	1144	COMBINE_DATA( &sys16_workingram[(0xecfc - 0xc000) / 2] );
1145	1145	if( ACCESSING_BITS_8_15 )
1146		{
1147		soundlatch_w( space,0,data>>8 );
1148		cpu_set_input_line(space->machine->cpu[1], 0, HOLD_LINE );
	1146	{
	1147	soundlatch_w( space, 0, data >> 8 );
	1148	cputag_set_input_line(space->machine, "soundcpu", 0, HOLD_LINE );
1149	1149	}
1150	1150	}
1151	1151

src/mame/drivers/deniam.c

r4679	r4680
57	57	if (ACCESSING_BITS_8_15)
58	58	{
59	59	soundlatch_w(space,offset,(data >> 8) & 0xff);
60		cpu_set_input_line(space->machine->cpu[1],INPUT_LINE_NMI,PULSE_LINE);
	60	cputag_set_input_line(space->machine, "audiocpu", INPUT_LINE_NMI, PULSE_LINE);
61	61	}
62	62	}
63	63
r4679	r4680
79	79	}
80	80
81	81
82		static ADDRESS_MAP_START( deniam16b_readmem, ADDRESS_SPACE_PROGRAM, 16 )
83		AM_RANGE(0x000000, 0x0fffff) AM_READ(SMH_ROM)
84		AM_RANGE(0x400000, 0x40ffff) AM_READ(SMH_RAM)
85		AM_RANGE(0x410000, 0x410fff) AM_READ(SMH_RAM)
86		AM_RANGE(0xc40002, 0xc40003) AM_READ(deniam_coinctrl_r)
	82	static ADDRESS_MAP_START( deniam16b_map, ADDRESS_SPACE_PROGRAM, 16 )
	83	AM_RANGE(0x000000, 0x0fffff) AM_ROM
	84	AM_RANGE(0x400000, 0x40ffff) AM_RAM_WRITE(deniam_videoram_w) AM_BASE(&deniam_videoram)
	85	AM_RANGE(0x410000, 0x410fff) AM_RAM_WRITE(deniam_textram_w) AM_BASE(&deniam_textram)
	86	AM_RANGE(0x440000, 0x4407ff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)
	87	AM_RANGE(0x840000, 0x840fff) AM_WRITE(deniam_palette_w) AM_BASE(&paletteram16)
	88	AM_RANGE(0xc40000, 0xc40001) AM_WRITE(sound_command_w)
	89	AM_RANGE(0xc40002, 0xc40003) AM_READWRITE(deniam_coinctrl_r, deniam_coinctrl_w)
87	90	AM_RANGE(0xc44000, 0xc44001) AM_READ_PORT("SYSTEM")
88	91	AM_RANGE(0xc44002, 0xc44003) AM_READ_PORT("P1")
89		AM_RANGE(0xc44004, 0xc44005) AM_READ_PORT("P2")
	92	AM_RANGE(0xc44004, 0xc44005) AM_READ_PORT("P2") AM_WRITENOP /* irq ack? */
90	93	AM_RANGE(0xc44006, 0xc44007) AM_READNOP   /* unused? */
91	94	AM_RANGE(0xc4400a, 0xc4400b) AM_READ_PORT("DSW")
92		AM_RANGE(0xff0000, 0xffffff) AM_READ(SMH_RAM)
	95	AM_RANGE(0xff0000, 0xffffff) AM_RAM
93	96	ADDRESS_MAP_END
94	97
95		static ADDRESS_MAP_START( deniam16b_writemem, ADDRESS_SPACE_PROGRAM, 16 )
96		AM_RANGE(0x000000, 0x0fffff) AM_WRITE(SMH_ROM)
97		AM_RANGE(0x400000, 0x40ffff) AM_WRITE(deniam_videoram_w) AM_BASE(&deniam_videoram)
98		AM_RANGE(0x410000, 0x410fff) AM_WRITE(deniam_textram_w) AM_BASE(&deniam_textram)
99		AM_RANGE(0x440000, 0x4407ff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)
100		AM_RANGE(0x840000, 0x840fff) AM_WRITE(deniam_palette_w) AM_BASE(&paletteram16)
101		AM_RANGE(0xc40000, 0xc40001) AM_WRITE(sound_command_w)
102		AM_RANGE(0xc40002, 0xc40003) AM_WRITE(deniam_coinctrl_w)
103		AM_RANGE(0xc40004, 0xc40005) AM_WRITENOP   /* irq ack? */
104		AM_RANGE(0xff0000, 0xffffff) AM_WRITE(SMH_RAM)
	98	static ADDRESS_MAP_START( sound_map, ADDRESS_SPACE_PROGRAM, 8 )
	99	AM_RANGE(0x0000, 0xf7ff) AM_ROM
	100	AM_RANGE(0xf800, 0xffff) AM_RAM
105	101	ADDRESS_MAP_END
106	102
107		static ADDRESS_MAP_START( sound_readmem, ADDRESS_SPACE_PROGRAM, 8 )
108		AM_RANGE(0x0000, 0xf7ff) AM_READ(SMH_ROM)
109		AM_RANGE(0xf800, 0xffff) AM_READ(SMH_RAM)
110		ADDRESS_MAP_END
111
112		static ADDRESS_MAP_START( sound_writemem, ADDRESS_SPACE_PROGRAM, 8 )
113		AM_RANGE(0x0000, 0xf7ff) AM_WRITE(SMH_ROM)
114		AM_RANGE(0xf800, 0xffff) AM_WRITE(SMH_RAM)
115		ADDRESS_MAP_END
116
117	103	static ADDRESS_MAP_START( sound_io_map, ADDRESS_SPACE_IO, 8 )
118	104	ADDRESS_MAP_GLOBAL_MASK(0xff)
119	105	AM_RANGE(0x01, 0x01) AM_READ(soundlatch_r)
r4679	r4680
123	109	ADDRESS_MAP_END
124	110
125	111	/* identical to 16b, but handles sound directly */
126		static ADDRESS_MAP_START( deniam16c_readmem, ADDRESS_SPACE_PROGRAM, 16 )
127		AM_RANGE(0x000000, 0x0fffff) AM_READ(SMH_ROM)
128		AM_RANGE(0x400000, 0x40ffff) AM_READ(SMH_RAM)
129		AM_RANGE(0x410000, 0x410fff) AM_READ(SMH_RAM)
130		AM_RANGE(0xc40000, 0xc40001) AM_DEVREAD8("oki", okim6295_r, 0x00ff)
131		AM_RANGE(0xc40002, 0xc40003) AM_READ(deniam_coinctrl_r)
	112	static ADDRESS_MAP_START( deniam16c_map, ADDRESS_SPACE_PROGRAM, 16 )
	113	AM_RANGE(0x000000, 0x0fffff) AM_ROM
	114	AM_RANGE(0x400000, 0x40ffff) AM_RAM_WRITE(deniam_videoram_w) AM_BASE(&deniam_videoram)
	115	AM_RANGE(0x410000, 0x410fff) AM_RAM_WRITE(deniam_textram_w) AM_BASE(&deniam_textram)
	116	AM_RANGE(0x440000, 0x4407ff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)
	117	AM_RANGE(0x840000, 0x840fff) AM_WRITE(deniam_palette_w) AM_BASE(&paletteram16)
	118	AM_RANGE(0xc40000, 0xc40001) AM_DEVREADWRITE8("oki", okim6295_r, okim6295_w, 0x00ff)
	119	AM_RANGE(0xc40002, 0xc40003) AM_READWRITE(deniam_coinctrl_r, deniam_coinctrl_w)
132	120	AM_RANGE(0xc44000, 0xc44001) AM_READ_PORT("SYSTEM")
133	121	AM_RANGE(0xc44002, 0xc44003) AM_READ_PORT("P1")
134		AM_RANGE(0xc44004, 0xc44005) AM_READ_PORT("P2")
135		AM_RANGE(0xc44006, 0xc44007) AM_READNOP   /* unused? */
	122	AM_RANGE(0xc44004, 0xc44005) AM_READ_PORT("P2") AM_WRITENOP /* irq ack? */
	123	AM_RANGE(0xc44006, 0xc44007) AM_READNOP   AM_DEVWRITE("oki", deniam16c_oki_rom_bank_w) /* read unused? */
	124	AM_RANGE(0xc40008, 0xc4000b) AM_DEVWRITE8("ym", ym3812_w, 0xff00)
136	125	AM_RANGE(0xc4400a, 0xc4400b) AM_READ_PORT("DSW") /* probably YM3812 input port */
137		AM_RANGE(0xff0000, 0xffffff) AM_READ(SMH_RAM)
	126	AM_RANGE(0xff0000, 0xffffff) AM_RAM
138	127	ADDRESS_MAP_END
139	128
140		static ADDRESS_MAP_START( deniam16c_writemem, ADDRESS_SPACE_PROGRAM, 16 )
141		AM_RANGE(0x000000, 0x0fffff) AM_WRITE(SMH_ROM)
142		AM_RANGE(0x400000, 0x40ffff) AM_WRITE(deniam_videoram_w) AM_BASE(&deniam_videoram)
143		AM_RANGE(0x410000, 0x410fff) AM_WRITE(deniam_textram_w) AM_BASE(&deniam_textram)
144		AM_RANGE(0x440000, 0x4407ff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)
145		AM_RANGE(0x840000, 0x840fff) AM_WRITE(deniam_palette_w) AM_BASE(&paletteram16)
146		AM_RANGE(0xc40000, 0xc40001) AM_DEVWRITE8("oki", okim6295_w, 0x00ff)
147		AM_RANGE(0xc40002, 0xc40003) AM_WRITE(deniam_coinctrl_w)
148		AM_RANGE(0xc40004, 0xc40005) AM_WRITENOP   /* irq ack? */
149		AM_RANGE(0xc40006, 0xc40007) AM_DEVWRITE("oki", deniam16c_oki_rom_bank_w)
150		AM_RANGE(0xc40008, 0xc4000b) AM_DEVWRITE8("ym", ym3812_w, 0xff00)
151		AM_RANGE(0xff0000, 0xffffff) AM_WRITE(SMH_RAM)
152		ADDRESS_MAP_END
153	129
154	130
155
156	131	static INPUT_PORTS_START( karianx )
157	132	PORT_START("SYSTEM")
158	133	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 )
r4679	r4680
248	223	static void irqhandler(const device_config *device, int linestate)
249	224	{
250	225	/* system 16c doesn't have the sound CPU */
251		if (device->machine->cpu[1] != NULL)
252		cpu_set_input_line(device->machine->cpu[1],0,linestate);
	226	if (cputag_get_cpu(device->machine, "audiocpu") != NULL)
	227	cputag_set_input_line(device->machine, "audiocpu", 0, linestate);
253	228	}
254	229
255	230	static const ym3812_interface ym3812_config =
r4679	r4680
263	238
264	239	/* basic machine hardware */
265	240	MDRV_CPU_ADD("maincpu", M68000,25000000/2)   /* ??? */
266		MDRV_CPU_PROGRAM_MAP(deniam16b_readmem,deniam16b_writemem)
	241	MDRV_CPU_PROGRAM_MAP(deniam16b_map,0)
267	242	MDRV_CPU_VBLANK_INT("screen", irq4_line_hold)
268	243
269	244	MDRV_CPU_ADD("audiocpu", Z80,25000000/4)   /* (makes logicpro music tempo correct) */
270		MDRV_CPU_PROGRAM_MAP(sound_readmem,sound_writemem)
	245	MDRV_CPU_PROGRAM_MAP(sound_map,0)
271	246	MDRV_CPU_IO_MAP(sound_io_map,0)
272	247
273	248	MDRV_MACHINE_RESET(deniam)
r4679	r4680
302	277
303	278	/* basic machine hardware */
304	279	MDRV_CPU_ADD("maincpu", M68000,25000000/2)   /* ??? */
305		MDRV_CPU_PROGRAM_MAP(deniam16c_readmem,deniam16c_writemem)
	280	MDRV_CPU_PROGRAM_MAP(deniam16c_map,0)
306	281	MDRV_CPU_VBLANK_INT("screen", irq4_line_hold)
307	282
308	283	MDRV_MACHINE_RESET(deniam)
r4679	r4680
431	406	GAME( 1996, croquis,  logicpro, deniam16b, logicpr2, logicpro, ROT0, "Deniam", "Croquis (Germany)", 0 )
432	407	GAME( 1996, karianx,  0,        deniam16b, karianx,  karianx,  ROT0, "Deniam", "Karian Cross (Rev. 1.0)", 0 )
433	408	GAME( 1997, logicpr2, 0,        deniam16c, logicpr2, logicpro, ROT0, "Deniam", "Logic Pro 2 (Japan)", GAME_IMPERFECT_SOUND )
434

src/mame/drivers/nyny.c

r4679	r4680
117	117	const device_config *pia2 = devtag_get_device(device->machine, "pia2");
118	118	int combined_state = pia6821_get_irq_a(pia1) | pia6821_get_irq_b(pia1) | pia6821_get_irq_b(pia2);
119	119
120		cpu_set_input_line(device->machine->cpu[0], M6809_IRQ_LINE, combined_state ? ASSERT_LINE : CLEAR_LINE);
	120	cputag_set_input_line(device->machine, "maincpu", M6809_IRQ_LINE, combined_state ? ASSERT_LINE : CLEAR_LINE);
121	121	}
122	122
123	123
124	124	static WRITE_LINE_DEVICE_HANDLER( main_cpu_firq )
125	125	{
126		cpu_set_input_line(device->machine->cpu[0], M6809_FIRQ_LINE, state ? ASSERT_LINE : CLEAR_LINE);
	126	cputag_set_input_line(device->machine, "maincpu", M6809_FIRQ_LINE, state ? ASSERT_LINE : CLEAR_LINE);
127	127	}
128	128
129	129
r4679	r4680
435	435	static WRITE8_HANDLER( audio_1_command_w )
436	436	{
437	437	soundlatch_w(space, 0, data);
438		cpu_set_input_line(space->machine->cpu[1], M6800_IRQ_LINE, HOLD_LINE);
	438	cputag_set_input_line(space->machine, "audiocpu", M6800_IRQ_LINE, HOLD_LINE);
439	439	}
440	440
441	441
442	442	static WRITE8_HANDLER( audio_1_answer_w )
443	443	{
444	444	soundlatch3_w(space, 0, data);
445		cpu_set_input_line(space->machine->cpu[0], M6809_IRQ_LINE, HOLD_LINE);
	445	cputag_set_input_line(space->machine, "maincpu", M6809_IRQ_LINE, HOLD_LINE);
446	446	}
447	447
448	448
r4679	r4680
486	486	static WRITE8_HANDLER( audio_2_command_w )
487	487	{
488	488	soundlatch2_w(space, 0, (data & 0x60) >> 5);
489		cpu_set_input_line(space->machine->cpu[2], M6800_IRQ_LINE, (data & 0x80) ? CLEAR_LINE : ASSERT_LINE);
	489	cputag_set_input_line(space->machine, "audio2", M6800_IRQ_LINE, (data & 0x80) ? CLEAR_LINE : ASSERT_LINE);
490	490	}
491	491
492	492

src/mame/drivers/limenko.c

r4679	r4680
432	432	tilemap_set_transparent_pen(md_tilemap,0);
433	433	tilemap_set_transparent_pen(fg_tilemap,0);
434	434
435		sprites_bitmap     = auto_bitmap_alloc(384,240,BITMAP_FORMAT_INDEXED16);
436		sprites_bitmap_pri = auto_bitmap_alloc(384,240,BITMAP_FORMAT_INDEXED8);
	435	sprites_bitmap     = auto_bitmap_alloc(machine,384,240,BITMAP_FORMAT_INDEXED16);
	436	sprites_bitmap_pri = auto_bitmap_alloc(machine,384,240,BITMAP_FORMAT_INDEXED8);
437	437	}
438	438
439	439	static VIDEO_UPDATE( limenko )
r4679	r4680
999	999
1000	1000	static DRIVER_INIT( dynabomb )
1001	1001	{
1002		memory_install_read32_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xe2784, 0xe2787, 0, 0, dynabomb_speedup_r );
	1002	memory_install_read32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xe2784, 0xe2787, 0, 0, dynabomb_speedup_r );
1003	1003
1004	1004	spriteram_bit = 1;
1005	1005	}
1006	1006
1007	1007	static DRIVER_INIT( legendoh )
1008	1008	{
1009		memory_install_read32_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x32ab0, 0x32ab3, 0, 0, legendoh_speedup_r );
	1009	memory_install_read32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x32ab0, 0x32ab3, 0, 0, legendoh_speedup_r );
1010	1010
1011	1011	spriteram_bit = 1;
1012	1012	}
1013	1013
1014	1014	static DRIVER_INIT( sb2003 )
1015	1015	{
1016		memory_install_read32_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x135800, 0x135803, 0, 0, sb2003_speedup_r );
	1016	memory_install_read32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x135800, 0x135803, 0, 0, sb2003_speedup_r );
1017	1017
1018	1018	spriteram_bit = 1;
1019	1019	}
r4679	r4680
1033	1033	dst[x+2] = (src[x+1]&0x0f) >> 0;
1034	1034	}
1035	1035
1036		memory_install_read32_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x6626c, 0x6626f, 0, 0, spotty_speedup_r );
	1036	memory_install_read32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x6626c, 0x6626f, 0, 0, spotty_speedup_r );
1037	1037
1038	1038	spriteram_bit = 1;
1039	1039	}

src/mame/drivers/big10.c

r4679	r4680
71	71
72	72	static void big10_vdp_interrupt(running_machine *machine, int i)
73	73	{
74		cpu_set_input_line (machine->cpu[0], 0, (i ? HOLD_LINE : CLEAR_LINE));
	74	cputag_set_input_line (machine, "maincpu", 0, (i ? HOLD_LINE : CLEAR_LINE));
75	75	}
76	76
77	77	static INTERRUPT_GEN( big10_interrupt )

src/mame/drivers/redalert.c

r4679	r4680
115	115
116	116	static READ8_HANDLER( redalert_interrupt_clear_r )
117	117	{
118		cpu_set_input_line(space->machine->cpu[0], M6502_IRQ_LINE, CLEAR_LINE);
	118	cputag_set_input_line(space->machine, "maincpu", M6502_IRQ_LINE, CLEAR_LINE);
119	119
120	120	/* the result never seems to be actually used */
121	121	return video_screen_get_vpos(space->machine->primary_screen);

src/mame/drivers/pipeline.c

r4679	r4680
90	90
91	91	static VIDEO_START ( pipeline )
92	92	{
93		palram=auto_malloc(0x1000);
	93	palram=auto_alloc_array(machine, UINT8, 0x1000);
94	94	tilemap1 = tilemap_create( machine, get_tile_info,tilemap_scan_rows,8,8,64,32 );
95	95	tilemap2 = tilemap_create( machine, get_tile_info2,tilemap_scan_rows,8,8,64,32 );
96	96	tilemap_set_transparent_pen(tilemap2,0);

src/mame/drivers/pengo.c

r4679	r4680
661	661	{ 0x88,0x0a,0x82,0x00,0xa0,0x22,0xaa,0x28 }      /* ...1...1...1.... */
662	662	};
663	663	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
664		UINT8 *decrypt = auto_malloc(0x8000);
	664	UINT8 *decrypt = auto_alloc_array(machine, UINT8, 0x8000);
665	665	UINT8 *rom = memory_region(machine, "maincpu");
666	666	int A;
667	667

src/mame/drivers/stadhero.c

r4679	r4680
52	52	case 4: /* Interrupt ack (VBL - IRQ 5) */
53	53	break;
54	54	case 6: /* 6502 sound cpu */
55		soundlatch_w(space,0,data & 0xff);
56		cpu_set_input_line(space->machine->cpu[1],INPUT_LINE_NMI,PULSE_LINE);
	55	soundlatch_w(space, 0, data & 0xff);
	56	cputag_set_input_line(space->machine, "audiocpu", INPUT_LINE_NMI, PULSE_LINE);
57	57	break;
58	58	default:
59	59	logerror("CPU #0 PC %06x: warning - write %02x to unmapped memory address %06x\n",cpu_get_pc(space->cpu),data,0x30c010+offset);
r4679	r4680
209	209
210	210	static void irqhandler(const device_config *device, int linestate)
211	211	{
212		cpu_set_input_line(device->machine->cpu[1],0,linestate);
	212	cputag_set_input_line(device->machine, "audiocpu", 0, linestate);
213	213	}
214	214
215	215	static const ym3812_interface ym3812_config =

src/mame/drivers/prehisle.c

r4679	r4680
29	29	static WRITE16_HANDLER( prehisle_sound16_w )
30	30	{
31	31	soundlatch_w(space, 0, data & 0xff);
32		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_NMI, PULSE_LINE);
	32	cputag_set_input_line(space->machine, "audiocpu", INPUT_LINE_NMI, PULSE_LINE);
33	33	}
34	34
35	35	/*******************************************************************************/
r4679	r4680
202	202
203	203	static void irqhandler(const device_config *device, int irq)
204	204	{
205		cpu_set_input_line(device->machine->cpu[1],0,irq ? ASSERT_LINE : CLEAR_LINE);
	205	cputag_set_input_line(device->machine, "audiocpu", 0, irq ? ASSERT_LINE : CLEAR_LINE);
206	206	}
207	207
208	208	static const ym3812_interface ym3812_config =
r4679	r4680
340	340	GAME( 1989, prehisle, 0,        prehisle, prehisle, 0, ROT0, "SNK", "Prehistoric Isle in 1930 (World)", GAME_SUPPORTS_SAVE )
341	341	GAME( 1989, prehislu, prehisle, prehisle, prehisle, 0, ROT0, "SNK of America", "Prehistoric Isle in 1930 (US)", GAME_SUPPORTS_SAVE )
342	342	GAME( 1989, gensitou, prehisle, prehisle, prehisle, 0, ROT0, "SNK", "Genshi-Tou 1930's", GAME_SUPPORTS_SAVE )
343

src/mame/drivers/simpsons.c

r4679	r4680
115	115
116	116	static void sound_nmi_callback( running_machine *machine, int param )
117	117	{
118		cpu_set_input_line(machine->cpu[1], INPUT_LINE_NMI, ( nmi_enabled ) ? CLEAR_LINE : ASSERT_LINE );
	118	cputag_set_input_line(machine, "audiocpu", INPUT_LINE_NMI, ( nmi_enabled ) ? CLEAR_LINE : ASSERT_LINE );
119	119
120	120	nmi_enabled = 0;
121	121	}
r4679	r4680
123	123
124	124	static TIMER_CALLBACK( nmi_callback )
125	125	{
126		cpu_set_input_line(machine->cpu[1], INPUT_LINE_NMI, ASSERT_LINE);
	126	cputag_set_input_line(machine, "audiocpu", INPUT_LINE_NMI, ASSERT_LINE);
127	127	}
128	128
129	129	static WRITE8_HANDLER( z80_arm_nmi_w )
130	130	{
131	131	//  sound_nmi_enabled = 1;
132		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_NMI, CLEAR_LINE);
	132	cputag_set_input_line(space->machine, "audiocpu", INPUT_LINE_NMI, CLEAR_LINE);
133	133	timer_set(space->machine, ATTOTIME_IN_USEC(25), NULL,0,nmi_callback);   /* kludge until the K053260 is emulated correctly */
134	134	}
135	135
r4679	r4680
239	239	static TIMER_CALLBACK( dmaend_callback )
240	240	{
241	241	if (simpsons_firq_enabled)
242		cpu_set_input_line(machine->cpu[0], KONAMI_FIRQ_LINE, HOLD_LINE);
	242	cputag_set_input_line(machine, "maincpu", KONAMI_FIRQ_LINE, HOLD_LINE);
243	243	}
244	244
245	245	static INTERRUPT_GEN( simpsons_irq )

src/mame/drivers/aladbl.c

r4679	r4680
156	156	static DRIVER_INIT( aladbl )
157	157	{
158	158	// 220000 = writes to mcu? 330000 = reads?
159		memory_install_write16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x220000, 0x220001, 0, 0, aladbl_w);
160		memory_install_read16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x330000, 0x330001, 0, 0, aladbl_r);
	159	memory_install_write16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x220000, 0x220001, 0, 0, aladbl_w);
	160	memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x330000, 0x330001, 0, 0, aladbl_r);
161	161	DRIVER_INIT_CALL(megadrij);
162	162	}
163	163

src/mame/drivers/wwfsstar.c

r4679	r4680
218	218
219	219	static WRITE16_HANDLER ( wwfsstar_soundwrite )
220	220	{
221		soundlatch_w(space,1,data & 0xff);
222		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_NMI, PULSE_LINE );
	221	soundlatch_w(space, 1, data & 0xff);
	222	cputag_set_input_line(space->machine, "audiocpu", INPUT_LINE_NMI, PULSE_LINE );
223	223	}
224	224
225	225	static WRITE16_HANDLER( wwfsstar_flipscreen_w )
r4679	r4680
230	230	static WRITE16_HANDLER( wwfsstar_irqack_w )
231	231	{
232	232	if (offset == 0)
233		cpu_set_input_line(space->machine->cpu[0], 6, CLEAR_LINE);
	233	cputag_set_input_line(space->machine, "maincpu", 6, CLEAR_LINE);
234	234
235	235	else
236		cpu_set_input_line(space->machine->cpu[0], 5, CLEAR_LINE);
	236	cputag_set_input_line(space->machine, "maincpu", 5, CLEAR_LINE);
237	237	}
238	238
239	239	/*
r4679	r4680
269	269	{
270	270	if (scanline > 0)
271	271	video_screen_update_partial(timer->machine->primary_screen, scanline - 1);
272		cpu_set_input_line(timer->machine->cpu[0], 5, ASSERT_LINE);
	272	cputag_set_input_line(timer->machine, "maincpu", 5, ASSERT_LINE);
273	273	}
274	274
275	275	/* Vblank is raised on scanline 240 */
276	276	if (scanline == 240)
277	277	{
278	278	video_screen_update_partial(timer->machine->primary_screen, scanline - 1);
279		cpu_set_input_line(timer->machine->cpu[0], 6, ASSERT_LINE);
	279	cputag_set_input_line(timer->machine, "maincpu", 6, ASSERT_LINE);
280	280	}
281	281	}
282	282
r4679	r4680
421	421
422	422	static void wwfsstar_ymirq_handler(const device_config *device, int irq)
423	423	{
424		cpu_set_input_line(device->machine->cpu[1], 0 , irq ? ASSERT_LINE : CLEAR_LINE );
	424	cputag_set_input_line(device->machine, "audiocpu", 0 , irq ? ASSERT_LINE : CLEAR_LINE );
425	425	}
426	426
427	427	static const ym2151_interface ym2151_config =

src/mame/drivers/kungfur.c

r4679	r4680
327	327
328	328	static INTERRUPT_GEN( kungfur_irq )
329	329	{
330		cpu_set_input_line(device->machine->cpu[0], M6809_IRQ_LINE, HOLD_LINE);
	330	cputag_set_input_line(device->machine, "maincpu", M6809_IRQ_LINE, HOLD_LINE);
331	331	}
332	332
333	333	static MACHINE_DRIVER_START( kungfur )

src/mame/drivers/actfancr.c

r4679	r4680
69	69	static WRITE8_HANDLER( actfancr_sound_w )
70	70	{
71	71	soundlatch_w(space,0,data & 0xff);
72		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_NMI, PULSE_LINE);
	72	cputag_set_input_line(space->machine, "audiocpu", INPUT_LINE_NMI, PULSE_LINE);
73	73	}
74	74
75	75	/******************************************************************************/
r4679	r4680
276	276
277	277	static void sound_irq(const device_config *device, int linestate)
278	278	{
279		cpu_set_input_line(device->machine->cpu[1],0,linestate); /* IRQ */
	279	cputag_set_input_line(device->machine, "audiocpu", 0, linestate); /* IRQ */
280	280	}
281	281
282	282	static const ym3812_interface ym3812_config =
r4679	r4680
583	583
584	584	static DRIVER_INIT( actfancr )
585	585	{
586		memory_install_read8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x1f0026, 0x1f0027, 0, 0, cycle_r);
	586	memory_install_read8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x1f0026, 0x1f0027, 0, 0, cycle_r);
587	587	}
588	588
589	589	static DRIVER_INIT( actfancj )
590	590	{
591		memory_install_read8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x1f0026, 0x1f0027, 0, 0, cyclej_r);
	591	memory_install_read8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x1f0026, 0x1f0027, 0, 0, cyclej_r);
592	592	}
593	593
594	594

src/mame/drivers/model1.c

r4679	r4680
690	690	//  logerror("irq: raising %d\n", level);
691	691	//  irq_status |= (1 << level);
692	692	last_irq = level;
693		cpu_set_input_line(machine->cpu[0], 0, HOLD_LINE);
	693	cputag_set_input_line(machine, "maincpu", 0, HOLD_LINE);
694	694	}
695	695
696	696	static IRQ_CALLBACK(irq_callback)
r4679	r4680
713	713
714	714	static void irq_init(running_machine *machine)
715	715	{
716		cpu_set_input_line(machine->cpu[0], 0, CLEAR_LINE);
717		cpu_set_irq_callback(machine->cpu[0], irq_callback);
	716	cputag_set_input_line(machine, "maincpu", 0, CLEAR_LINE);
	717	cpu_set_irq_callback(cputag_get_cpu(machine, "maincpu"), irq_callback);
718	718	}
719	719
720	720	static INTERRUPT_GEN(model1_interrupt)
r4679	r4680
730	730	// if the FIFO has something in it, signal the 68k too
731	731	if (fifo_rptr != fifo_wptr)
732	732	{
733		cpu_set_input_line(device->machine->cpu[1], 2, HOLD_LINE);
	733	cputag_set_input_line(device->machine, "audiocpu", 2, HOLD_LINE);
734	734	}
735	735	}
736	736	}
r4679	r4680
758	758	{
759	759	memory_set_bankptr(machine, 1, memory_region(machine, "maincpu") + 0x1000000);
760	760	irq_init(machine);
761		model1_vr_tgp_reset();
	761	model1_vr_tgp_reset(machine);
762	762	model1_sound_irq = 3;
763	763
764	764	// init the sound FIFO
r4679	r4680
839	839
840	840	static READ16_HANDLER( snd_68k_ready_r )
841	841	{
842		int sr = cpu_get_reg(space->machine->cpu[1], M68K_SR);
	842	int sr = cpu_get_reg(cputag_get_cpu(space->machine, "audiocpu"), M68K_SR);
843	843
844	844	if ((sr & 0x0700) > 0x0100)
845	845	{
r4679	r4680
857	857	if (fifo_wptr >= FIFO_SIZE) fifo_wptr = 0;
858	858
859	859	// signal the 68000 that there's data waiting
860		cpu_set_input_line(space->machine->cpu[1], 2, HOLD_LINE);
	860	cputag_set_input_line(space->machine, "audiocpu", 2, HOLD_LINE);
861	861	// give the 68k time to reply
862	862	cpu_spinuntil_time(space->cpu, ATTOTIME_IN_USEC(40));
863	863	}

src/mame/drivers/polepos.c

r4679	r4680
289	289	switch (offset)
290	290	{
291	291	case 0x00:   /* IRQON */
292		cpu_interrupt_enable(space->machine->cpu[0],bit);
	292	cpu_interrupt_enable(cputag_get_cpu(space->machine, "maincpu"), bit);
293	293	if (!bit)
294		cpu_set_input_line(space->machine->cpu[0], 0, CLEAR_LINE);
	294	cputag_set_input_line(space->machine, "maincpu", 0, CLEAR_LINE);
295	295	break;
296	296
297	297	case 0x01:   /* IOSEL */
r4679	r4680
302	302	polepos_sound_enable(devtag_get_device(space->machine, "namco"),bit);
303	303	if (!bit)
304	304	{
305		polepos_engine_sound_lsb_w(space,0,0);
306		polepos_engine_sound_msb_w(space,0,0);
	305	polepos_engine_sound_lsb_w(space, 0, 0);
	306	polepos_engine_sound_msb_w(space, 0, 0);
307	307	}
308	308	break;
309	309
r4679	r4680
312	312	break;
313	313
314	314	case 0x04:   /* RESB */
315		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_RESET, bit ? CLEAR_LINE : ASSERT_LINE);
	315	cputag_set_input_line(space->machine, "sub", INPUT_LINE_RESET, bit ? CLEAR_LINE : ASSERT_LINE);
316	316	break;
317	317
318	318	case 0x05:   /* RESA */
319		cpu_set_input_line(space->machine->cpu[2], INPUT_LINE_RESET, bit ? CLEAR_LINE : ASSERT_LINE);
	319	cputag_set_input_line(space->machine, "sub2", INPUT_LINE_RESET, bit ? CLEAR_LINE : ASSERT_LINE);
320	320	break;
321	321
322	322	case 0x06:   /* SB0 */
r4679	r4680
375	375	#include "cpu/z8000/z8000.h"
376	376	static MACHINE_RESET( polepos )
377	377	{
378		const address_space *space = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM);
	378	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
379	379	int i;
380	380
381	381	/* Reset all latches */
382		for (i = 0;i < 8;i++)
383		polepos_latch_w(space,i,0);
	382	for (i = 0; i < 8; i++)
	383	polepos_latch_w(space, i, 0);
384	384
385	385	namco_06xx_init(machine, 0, 0,
386	386	NAMCOIO_51XX, &intf0,
r4679	r4680
389	389	NAMCOIO_54XX, NULL);
390	390
391	391	/* set the interrupt vectors (this shouldn't be needed) */
392		cpu_set_input_line_vector(machine->cpu[1], 0, Z8000_NVI);
393		cpu_set_input_line_vector(machine->cpu[2], 0, Z8000_NVI);
	392	cpu_set_input_line_vector(cputag_get_cpu(machine, "sub"), 0, Z8000_NVI);
	393	cpu_set_input_line_vector(cputag_get_cpu(machine, "sub2"), 0, Z8000_NVI);
394	394	}
395	395
396	396
r4679	r4680
1774	1774	polepos_gear_bit = 0x20;
1775	1775
1776	1776	/* extra direct mapped inputs read */
1777		memory_install_read_port_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_IO), 0x02, 0x02, 0, 0, "STEER");
1778		memory_install_read_port_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_IO), 0x03, 0x03, 0, 0, "IN0");
1779		memory_install_read_port_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_IO), 0x04, 0x04, 0, 0, "DSWA");
	1777	memory_install_read_port_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_IO), 0x02, 0x02, 0, 0, "STEER");
	1778	memory_install_read_port_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_IO), 0x03, 0x03, 0, 0, "IN0");
	1779	memory_install_read_port_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_IO), 0x04, 0x04, 0, 0, "DSWA");
1780	1780
1781	1781	}
1782	1782
1783	1783	static DRIVER_INIT( polepos2 )
1784	1784	{
1785	1785	/* note that the bootleg version doesn't need this custom IC; it has a hacked ROM in its place */
1786		memory_install_read16_handler(cpu_get_address_space(machine->cpu[1], ADDRESS_SPACE_PROGRAM), 0x4000, 0x5fff, 0, 0, polepos2_ic25_r);
	1786	memory_install_read16_handler(cputag_get_address_space(machine, "sub", ADDRESS_SPACE_PROGRAM), 0x4000, 0x5fff, 0, 0, polepos2_ic25_r);
1787	1787
1788	1788	DRIVER_INIT_CALL(polepos);
1789	1789	}

src/mame/drivers/taito_b.c

r4679	r4680
187	187
188	188	static TIMER_CALLBACK( rsaga2_interrupt2  )
189	189	{
190		cpu_set_input_line(machine->cpu[0],2,HOLD_LINE);
	190	cputag_set_input_line(machine, "maincpu", 2, HOLD_LINE);
191	191	}
192	192
193	193	static INTERRUPT_GEN( rastansaga2_interrupt )
194	194	{
195		timer_set(device->machine, cpu_clocks_to_attotime(device,5000), NULL, 0, rsaga2_interrupt2);
	195	timer_set(device->machine, cpu_clocks_to_attotime(device, 5000), NULL, 0, rsaga2_interrupt2);
196	196	cpu_set_input_line(device, 4, HOLD_LINE);
197	197	}
198	198
199	199
200	200	static TIMER_CALLBACK( crimec_interrupt3 )
201	201	{
202		cpu_set_input_line(machine->cpu[0],3,HOLD_LINE);
	202	cputag_set_input_line(machine, "maincpu", 3, HOLD_LINE);
203	203	}
204	204
205	205	static INTERRUPT_GEN( crimec_interrupt )
206	206	{
207		timer_set(device->machine, cpu_clocks_to_attotime(device,5000), NULL, 0, crimec_interrupt3);
	207	timer_set(device->machine, cpu_clocks_to_attotime(device, 5000), NULL, 0, crimec_interrupt3);
208	208	cpu_set_input_line(device, 5, HOLD_LINE);
209	209	}
210	210
211	211
212	212	static TIMER_CALLBACK( hitice_interrupt6 )
213	213	{
214		cpu_set_input_line(machine->cpu[0],6,HOLD_LINE);
	214	cputag_set_input_line(machine, "maincpu", 6, HOLD_LINE);
215	215	}
216	216
217	217	static INTERRUPT_GEN( hitice_interrupt )
218	218	{
219		timer_set(device->machine, cpu_clocks_to_attotime(device,5000), NULL, 0, hitice_interrupt6);
	219	timer_set(device->machine, cpu_clocks_to_attotime(device, 5000), NULL, 0, hitice_interrupt6);
220	220	cpu_set_input_line(device, 4, HOLD_LINE);
221	221	}
222	222
223	223
224	224	static TIMER_CALLBACK( rambo3_interrupt1 )
225	225	{
226		cpu_set_input_line(machine->cpu[0],1,HOLD_LINE);
	226	cputag_set_input_line(machine, "maincpu", 1, HOLD_LINE);
227	227	}
228	228
229	229	static INTERRUPT_GEN( rambo3_interrupt )
230	230	{
231		timer_set(device->machine, cpu_clocks_to_attotime(device,5000), NULL, 0, rambo3_interrupt1);
	231	timer_set(device->machine, cpu_clocks_to_attotime(device, 5000), NULL, 0, rambo3_interrupt1);
232	232	cpu_set_input_line(device, 6, HOLD_LINE);
233	233	}
234	234
235	235
236	236	static TIMER_CALLBACK( pbobble_interrupt5 )
237	237	{
238		cpu_set_input_line(machine->cpu[0],5,HOLD_LINE);
	238	cputag_set_input_line(machine, "maincpu", 5, HOLD_LINE);
239	239	}
240	240
241	241	static INTERRUPT_GEN( pbobble_interrupt )
242	242	{
243		timer_set(device->machine, cpu_clocks_to_attotime(device,5000), NULL, 0, pbobble_interrupt5);
	243	timer_set(device->machine, cpu_clocks_to_attotime(device, 5000), NULL, 0, pbobble_interrupt5);
244	244	cpu_set_input_line(device, 3, HOLD_LINE);
245	245	}
246	246
247	247	static TIMER_CALLBACK( viofight_interrupt1 )
248	248	{
249		cpu_set_input_line(machine->cpu[0],1,HOLD_LINE);
	249	cputag_set_input_line(machine, "maincpu", 1, HOLD_LINE);
250	250	}
251	251
252	252	static INTERRUPT_GEN( viofight_interrupt )
253	253	{
254		timer_set(device->machine, cpu_clocks_to_attotime(device,5000), NULL, 0, viofight_interrupt1);
	254	timer_set(device->machine, cpu_clocks_to_attotime(device, 5000), NULL, 0, viofight_interrupt1);
255	255	cpu_set_input_line(device, 4, HOLD_LINE);
256	256	}
257	257
258	258	static TIMER_CALLBACK( masterw_interrupt4 )
259	259	{
260		cpu_set_input_line(machine->cpu[0],4,HOLD_LINE);
	260	cputag_set_input_line(machine, "maincpu", 4, HOLD_LINE);
261	261	}
262	262
263	263	static INTERRUPT_GEN( masterw_interrupt )
264	264	{
265		timer_set(device->machine, cpu_clocks_to_attotime(device,5000), NULL, 0, masterw_interrupt4);
	265	timer_set(device->machine, cpu_clocks_to_attotime(device, 5000), NULL, 0, masterw_interrupt4);
266	266	cpu_set_input_line(device, 5, HOLD_LINE);
267	267	}
268	268
269	269	static TIMER_CALLBACK( silentd_interrupt4 )
270	270	{
271		cpu_set_input_line(machine->cpu[0],4,HOLD_LINE);
	271	cputag_set_input_line(machine, "maincpu", 4, HOLD_LINE);
272	272	}
273	273
274	274	static INTERRUPT_GEN( silentd_interrupt )
275	275	{
276		timer_set(device->machine, cpu_clocks_to_attotime(device,5000), NULL, 0, silentd_interrupt4);
	276	timer_set(device->machine, cpu_clocks_to_attotime(device, 5000), NULL, 0, silentd_interrupt4);
277	277	cpu_set_input_line(device, 6, HOLD_LINE);
278	278	}
279	279
280	280	static TIMER_CALLBACK( selfeena_interrupt4 )
281	281	{
282		cpu_set_input_line(machine->cpu[0],4,HOLD_LINE);
	282	cputag_set_input_line(machine, "maincpu", 4, HOLD_LINE);
283	283	}
284	284
285	285	static INTERRUPT_GEN( selfeena_interrupt )
286	286	{
287		timer_set(device->machine, cpu_clocks_to_attotime(device,5000), NULL, 0, selfeena_interrupt4);
	287	timer_set(device->machine, cpu_clocks_to_attotime(device, 5000), NULL, 0, selfeena_interrupt4);
288	288	cpu_set_input_line(device, 6, HOLD_LINE);
289	289	}
290	290
291	291	static TIMER_CALLBACK( sbm_interrupt5 )//4
292	292	{
293		cpu_set_input_line(machine->cpu[0],5,HOLD_LINE);
	293	cputag_set_input_line(machine, "maincpu", 5, HOLD_LINE);
294	294	}
295	295
296	296	static INTERRUPT_GEN( sbm_interrupt )//5
297	297	{
298		timer_set(device->machine, cpu_clocks_to_attotime(device,10000), NULL, 0, sbm_interrupt5);
	298	timer_set(device->machine, cpu_clocks_to_attotime(device, 10000), NULL, 0, sbm_interrupt5);
299	299	cpu_set_input_line(device, 4, HOLD_LINE);
300	300	}
301	301
r4679	r4680
2075	2075	/* handler called by the YM2610 emulator when the internal timers cause an IRQ */
2076	2076	static void irqhandler(const device_config *device, int irq)
2077	2077	{
2078		cpu_set_input_line(device->machine->cpu[1],0,irq ? ASSERT_LINE : CLEAR_LINE);
	2078	cputag_set_input_line(device->machine, "audiocpu", 0, irq ? ASSERT_LINE : CLEAR_LINE);
2079	2079	}
2080	2080
2081	2081	static const ym2610_interface ym2610_config =

src/mame/drivers/jackal.c

r4679	r4680
243	243	if (irq_enable)
244	244	{
245	245	cpu_set_input_line(device, 0, HOLD_LINE);
246		cpu_set_input_line(device->machine->cpu[1], INPUT_LINE_NMI, PULSE_LINE);
	246	cputag_set_input_line(device->machine, "slave", INPUT_LINE_NMI, PULSE_LINE);
247	247	}
248	248	}
249	249

src/mame/drivers/tank8.c

r4679	r4680
14	14
15	15	void tank8_set_collision(running_machine *machine, int index)
16	16	{
17		cpu_set_input_line(machine->cpu[0], 0, ASSERT_LINE);
	17	cputag_set_input_line(machine, "maincpu", 0, ASSERT_LINE);
18	18
19	19	collision_index = index;
20	20	}
r4679	r4680
41	41	{
42	42	collision_index &= ~0x3f;
43	43
44		cpu_set_input_line(space->machine->cpu[0], 0, CLEAR_LINE);
	44	cputag_set_input_line(space->machine, "maincpu", 0, CLEAR_LINE);
45	45	}
46	46
47	47	static WRITE8_DEVICE_HANDLER( tank8_crash_w )

src/mame/drivers/viper.c

r4679	r4680
442	442	}
443	443
444	444	default:
445		fatalerror("voodoo3_pci_r: %08X at %08X", reg, cpu_get_pc(device->machine->cpu[0]));
	445	fatalerror("voodoo3_pci_r: %08X at %08X", reg, cpu_get_pc(cputag_get_cpu(device->machine, "maincpu")));
446	446	}
447	447	return 0;
448	448	}
r4679	r4680
510	510	}
511	511
512	512	default:
513		fatalerror("voodoo3_pci_w: %08X, %08X at %08X", data, reg, cpu_get_pc(device->machine->cpu[0]));
	513	fatalerror("voodoo3_pci_w: %08X, %08X at %08X", data, reg, cpu_get_pc(cputag_get_cpu(device->machine, "maincpu")));
514	514	}
515	515	}
516	516
r4679	r4680
637	637
638	638	DRIVER_INIT_CALL(viper);
639	639
640		memory_install_readwrite64_device_handler( cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), ide, 0xff000000, 0xff000fff, 0, 0, cf_card_data_r, cf_card_data_w );
641		memory_install_readwrite64_device_handler( cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), ide, 0xff200000, 0xff200fff, 0, 0, cf_card_r, cf_card_w );
	640	memory_install_readwrite64_device_handler( cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), ide, 0xff000000, 0xff000fff, 0, 0, cf_card_data_r, cf_card_data_w );
	641	memory_install_readwrite64_device_handler( cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), ide, 0xff200000, 0xff200fff, 0, 0, cf_card_r, cf_card_w );
642	642	}
643	643
644	644

src/mame/drivers/namcos86.c

r4679	r4680
266	266
267	267	static WRITE8_HANDLER( int_ack1_w )
268	268	{
269		cpu_set_input_line(space->machine->cpu[0], 0, CLEAR_LINE);
	269	cputag_set_input_line(space->machine, "cpu1", 0, CLEAR_LINE);
270	270	}
271	271
272	272	static WRITE8_HANDLER( int_ack2_w )
273	273	{
274		cpu_set_input_line(space->machine->cpu[1], 0, CLEAR_LINE);
	274	cputag_set_input_line(space->machine, "cpu2", 0, CLEAR_LINE);
275	275	}
276	276
277	277
r4679	r4680
360	360
361	361	AM_RANGE(0x4000, 0x5fff) AM_READWRITE(rthunder_spriteram_r,rthunder_spriteram_w)
362	362
363		AM_RANGE(0x6000, 0x7fff) AM_READ(SMH_BANK1)
	363	AM_RANGE(0x6000, 0x7fff) AM_READ(SMH_BANK(1))
364	364	AM_RANGE(0x8000, 0xffff) AM_ROM
365	365
366	366	/* ROM & Voice expansion board - only some games have it */
r4679	r4680
387	387	AM_RANGE(ADDR_SPRITE+0x0000, ADDR_SPRITE+0x1fff) AM_READWRITE(rthunder_spriteram_r,rthunder_spriteram_w) AM_BASE(&rthunder_spriteram)   \
388	388	AM_RANGE(ADDR_VIDEO1+0x0000, ADDR_VIDEO1+0x1fff) AM_READWRITE(rthunder_videoram1_r,rthunder_videoram1_w)   \
389	389	AM_RANGE(ADDR_VIDEO2+0x0000, ADDR_VIDEO2+0x1fff) AM_READWRITE(rthunder_videoram2_r,rthunder_videoram2_w)   \
390		AM_RANGE(ADDR_ROM+0x0000, ADDR_ROM+0x1fff) AM_READ(SMH_BANK2)                        \
	390	AM_RANGE(ADDR_ROM+0x0000, ADDR_ROM+0x1fff) AM_READ(SMH_BANK(2))                        \
391	391	AM_RANGE(0x8000, 0xffff) AM_ROM                                                \
392	392	/*  { ADDR_BANK+0x00, ADDR_BANK+0x02 } layer 2 scroll registers would be here */            \
393	393	AM_RANGE(ADDR_BANK+0x03, ADDR_BANK+0x03) AM_WRITE(bankswitch2_w)                     \
r4679	r4680
1506	1506	/* shuffle tile ROMs so regular gfx unpack routines can be used */
1507	1507	gfx = memory_region(machine, "gfx1");
1508	1508	size = memory_region_length(machine, "gfx1") * 2 / 3;
1509		buffer = malloc_or_die( size );
	1509	buffer = alloc_array_or_die(UINT8, size );
1510	1510
1511	1511	{
1512	1512	UINT8 *dest1 = gfx;
r4679	r4680
1531	1531
1532	1532	gfx = memory_region(machine, "gfx2");
1533	1533	size = memory_region_length(machine, "gfx2") * 2 / 3;
1534		buffer = malloc_or_die( size );
	1534	buffer = alloc_array_or_die(UINT8, size );
1535	1535
1536	1536	{
1537	1537	UINT8 *dest1 = gfx;

src/mame/drivers/suna8.c

r4679	r4680
98	98	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
99	99	UINT8   *RAM   =   memory_region(machine, "maincpu");
100	100	size_t   size   =   memory_region_length(machine, "maincpu");
101		UINT8   *decrypt = auto_malloc(size);
	101	UINT8   *decrypt = auto_alloc_array(machine, UINT8, size);
102	102	int i;
103	103
104	104	memory_set_decrypted_region(space, 0x0000, 0x7fff, decrypt);
r4679	r4680
208	208	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
209	209	UINT8   *RAM   =   memory_region(machine, "maincpu");
210	210	size_t   size   =   memory_region_length(machine, "maincpu");
211		UINT8   *decrypt =    auto_malloc(size);
	211	UINT8   *decrypt =    auto_alloc_array(machine, UINT8, size);
212	212	UINT8 x;
213	213	int i;
214	214
r4679	r4680
282	282	}
283	283
284	284	memory_configure_bank(machine, 1, 0, 16, memory_region(machine, "maincpu") + 0x10000, 0x4000);
285		memory_configure_bank(machine, 2, 0, 2, auto_malloc(0x2000 * 2), 0x2000);
	285	memory_configure_bank(machine, 2, 0, 2, auto_alloc_array(machine, UINT8, 0x2000 * 2), 0x2000);
286	286	}
287	287
288	288
r4679	r4680
295	295	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
296	296	UINT8   *RAM   =   memory_region(machine, "maincpu");
297	297	size_t   size   =   memory_region_length(machine, "maincpu");
298		UINT8   *decrypt =    auto_malloc(size);
	298	UINT8   *decrypt =    auto_alloc_array(machine, UINT8, size);
299	299	UINT8 x;
300	300	int i;
301	301
r4679	r4680
363	363	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
364	364	UINT8   *RAM   =   memory_region(machine, "maincpu");
365	365	size_t   size   =   memory_region_length(machine, "maincpu");
366		UINT8   *decrypt =    auto_malloc(size);
	366	UINT8   *decrypt =    auto_alloc_array(machine, UINT8, size);
367	367	UINT8 x;
368	368	int i;
369	369

src/mame/drivers/vaportra.c

r4679	r4680
30	30	/* Force synchronisation between CPUs with fake timer */
31	31	timer_call_after_resynch(space->machine, NULL, 0, NULL);
32	32	soundlatch_w(space,0,data & 0xff);
33		cpu_set_input_line(space->machine->cpu[1],0,ASSERT_LINE);
	33	cputag_set_input_line(space->machine, "audiocpu", 0, ASSERT_LINE);
34	34	}
35	35
36	36	static READ16_HANDLER( vaportra_control_r )
r4679	r4680
75	75
76	76	static READ8_HANDLER( vaportra_soundlatch_r )
77	77	{
78		cpu_set_input_line(space->machine->cpu[1],0,CLEAR_LINE);
	78	cputag_set_input_line(space->machine, "audiocpu", 0, CLEAR_LINE);
79	79	return soundlatch_r(space, offset);
80	80	}
81	81
r4679	r4680
86	86	AM_RANGE(0x120000, 0x120001) AM_DEVREADWRITE("oki1", okim6295_r, okim6295_w)
87	87	AM_RANGE(0x130000, 0x130001) AM_DEVREADWRITE("oki2", okim6295_r, okim6295_w)
88	88	AM_RANGE(0x140000, 0x140001) AM_READ(vaportra_soundlatch_r)
89		AM_RANGE(0x1f0000, 0x1f1fff) AM_READWRITE(SMH_BANK8,SMH_BANK8)  /* ??? LOOKUP ??? */
	89	AM_RANGE(0x1f0000, 0x1f1fff) AM_READWRITE(SMH_BANK(8),SMH_BANK(8))  /* ??? LOOKUP ??? */
90	90	AM_RANGE(0x1fec00, 0x1fec01) AM_WRITE(h6280_timer_w)
91	91	AM_RANGE(0x1ff400, 0x1ff403) AM_WRITE(h6280_irq_status_w)
92	92	ADDRESS_MAP_END
r4679	r4680
206	206
207	207	static void sound_irq(const device_config *device, int state)
208	208	{
209		cpu_set_input_line(device->machine->cpu[1],1,state); /* IRQ 2 */
	209	cputag_set_input_line(device->machine, "audiocpu", 1, state); /* IRQ 2 */
210	210	}
211	211
212	212	static const ym2151_interface ym2151_config =

src/mame/drivers/chanbara.c

r4679	r4680
184	184	AM_RANGE(0x2001, 0x2001) AM_READ_PORT("SYSTEM")
185	185	AM_RANGE(0x2003, 0x2003) AM_READ_PORT("JOY")
186	186	AM_RANGE(0x3800, 0x3801) AM_DEVREADWRITE("ym", ym2203_r, ym2203_w)
187		AM_RANGE(0x4000, 0x7fff) AM_READ(SMH_BANK1)
	187	AM_RANGE(0x4000, 0x7fff) AM_READ(SMH_BANK(1))
188	188	AM_RANGE(0x8000, 0xffff) AM_READ(SMH_ROM)
189	189	ADDRESS_MAP_END
190	190
r4679	r4680
312	312
313	313	static void sound_irq(const device_config *device, int linestate)
314	314	{
315		cpu_set_input_line(device->machine->cpu[0],0,linestate);
	315	cputag_set_input_line(device->machine, "maincpu", 0, linestate);
316	316	}
317	317
318	318

src/mame/drivers/btime.c

r4679	r4680
185	185	if (audio_nmi_enable_type == AUDIO_ENABLE_DIRECT)
186	186	{
187	187	audio_nmi_enabled = data & 1;
188		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_NMI, (audio_nmi_enabled && audio_nmi_state) ? ASSERT_LINE : CLEAR_LINE);
	188	cputag_set_input_line(space->machine, "audiocpu", INPUT_LINE_NMI, (audio_nmi_enabled && audio_nmi_state) ? ASSERT_LINE : CLEAR_LINE);
189	189	}
190	190	}
191	191
r4679	r4680
195	195	if (audio_nmi_enable_type == AUDIO_ENABLE_AY8910)
196	196	{
197	197	audio_nmi_enabled = ~data & 1;
198		cpu_set_input_line(device->machine->cpu[1], INPUT_LINE_NMI, (audio_nmi_enabled && audio_nmi_state) ? ASSERT_LINE : CLEAR_LINE);
	198	cputag_set_input_line(device->machine, "audiocpu", INPUT_LINE_NMI, (audio_nmi_enabled && audio_nmi_state) ? ASSERT_LINE : CLEAR_LINE);
199	199	}
200	200	}
201	201
r4679	r4680
203	203	{
204	204	int scanline = param;
205	205	audio_nmi_state = scanline & 8;
206		cpu_set_input_line(timer->machine->cpu[1], INPUT_LINE_NMI, (audio_nmi_enabled && audio_nmi_state) ? ASSERT_LINE : CLEAR_LINE);
	206	cputag_set_input_line(timer->machine, "audiocpu", INPUT_LINE_NMI, (audio_nmi_enabled && audio_nmi_state) ? ASSERT_LINE : CLEAR_LINE);
207	207	}
208	208
209	209
r4679	r4680
524	524	static INPUT_CHANGED( coin_inserted_irq_hi )
525	525	{
526	526	if (newval)
527		cpu_set_input_line(field->port->machine->cpu[0], 0, HOLD_LINE);
	527	cputag_set_input_line(field->port->machine, "maincpu", 0, HOLD_LINE);
528	528	}
529	529
530	530	static INPUT_CHANGED( coin_inserted_irq_lo )
531	531	{
532	532	if (!newval)
533		cpu_set_input_line(field->port->machine->cpu[0], 0, HOLD_LINE);
	533	cputag_set_input_line(field->port->machine, "maincpu", 0, HOLD_LINE);
534	534	}
535	535
536	536	static INPUT_CHANGED( coin_inserted_nmi_lo )
537	537	{
538		cpu_set_input_line(field->port->machine->cpu[0], INPUT_LINE_NMI, newval ? CLEAR_LINE : ASSERT_LINE);
	538	cputag_set_input_line(field->port->machine, "maincpu", INPUT_LINE_NMI, newval ? CLEAR_LINE : ASSERT_LINE);
539	539	}
540	540
541	541
542	542	static WRITE8_HANDLER( audio_command_w )
543	543	{
544	544	soundlatch_w(space,offset,data);
545		cpu_set_input_line(space->machine->cpu[1], 0, ASSERT_LINE);
	545	cputag_set_input_line(space->machine, "audiocpu", 0, ASSERT_LINE);
546	546	}
547	547
548	548	static READ8_HANDLER( audio_command_r )
549	549	{
550		cpu_set_input_line(space->machine->cpu[1], 0, CLEAR_LINE);
	550	cputag_set_input_line(space->machine, "audiocpu", 0, CLEAR_LINE);
551	551	return soundlatch_r(space,offset);
552	552	}
553	553
r4679	r4680
1981	1981	static void decrypt_C10707_cpu(running_machine *machine, const char *cputag)
1982	1982	{
1983	1983	const address_space *space = cputag_get_address_space(machine, cputag, ADDRESS_SPACE_PROGRAM);
1984		UINT8 *decrypt = auto_malloc(0x10000);
	1984	UINT8 *decrypt = auto_alloc_array(machine, UINT8, 0x10000);
1985	1985	UINT8 *rom = memory_region(machine, cputag);
1986	1986	offs_t addr;
1987	1987
r4679	r4680
1991	1991	for (addr = 0; addr < 0x10000; addr++)
1992	1992	decrypt[addr] = swap_bits_5_6(rom[addr]);
1993	1993
1994		if (space->cpu == machine->cpu[0])
	1994	if (space->cpu == cputag_get_cpu(machine, "maincpu"))
1995	1995	decrypted = decrypt;
1996	1996	}
1997	1997
r4679	r4680
2013	2013	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
2014	2014	UINT8 *rom = memory_region(machine, "maincpu");
2015	2015
2016		decrypted = auto_malloc(0x10000);
	2016	decrypted = auto_alloc_array(machine, UINT8, 0x10000);
2017	2017	memory_set_decrypted_region(space, 0x0000, 0xffff, decrypted);
2018	2018
2019	2019	/* For now, just copy the RAM array over to ROM. Decryption will happen */
r4679	r4680
2078	2078	{
2079	2079	decrypt_C10707_cpu(machine, "maincpu");
2080	2080
2081		memory_install_read8_handler(cpu_get_address_space(machine->cpu[1], ADDRESS_SPACE_PROGRAM), 0x0200, 0x0fff, 0, 0, SMH_BANK10);
	2081	memory_install_read8_handler(cputag_get_address_space(machine, "audiocpu", ADDRESS_SPACE_PROGRAM), 0x0200, 0x0fff, 0, 0, (read8_space_func)SMH_BANK(10));
2082	2082	memory_set_bankptr(machine, 10, memory_region(machine, "audiocpu") + 0xe200);
2083	2083	audio_nmi_enable_type = AUDIO_ENABLE_DIRECT;
2084	2084	}
r4679	r4680
2093	2093	{
2094	2094	decrypt_C10707_cpu(machine, "maincpu");
2095	2095
2096		memory_install_read8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xc15f, 0xc15f, 0, 0, wtennis_reset_hack_r);
	2096	memory_install_read8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xc15f, 0xc15f, 0, 0, wtennis_reset_hack_r);
2097	2097
2098		memory_install_read8_handler(cpu_get_address_space(machine->cpu[1], ADDRESS_SPACE_PROGRAM), 0x0200, 0x0fff, 0, 0, SMH_BANK10);
	2098	memory_install_read8_handler(cputag_get_address_space(machine, "audiocpu", ADDRESS_SPACE_PROGRAM), 0x0200, 0x0fff, 0, 0, (read8_space_func)SMH_BANK(10));
2099	2099	memory_set_bankptr(machine, 10, memory_region(machine, "audiocpu") + 0xe200);
2100	2100	audio_nmi_enable_type = AUDIO_ENABLE_DIRECT;
2101	2101	}

src/mame/drivers/qdrmfgp.c

r4679	r4680
46	46
47	47	static CUSTOM_INPUT( inputs_r )
48	48	{
49		const char *tag1 = param;
	49	const char *tag1 = (const char *)param;
50	50	const char *tag2 = tag1 + strlen(tag1) + 1;
51	51	return input_port_read(field->port->machine, (control & 0x0080) ? tag1 : tag2);
52	52	}
r4679	r4680
283	283	if (control & 0x0008)
284	284	{
285	285	if (state != CLEAR_LINE)
286		cpu_set_input_line(device->machine->cpu[0], 4, HOLD_LINE);
	286	cputag_set_input_line(device->machine, "maincpu", 4, HOLD_LINE);
287	287	else
288		cpu_set_input_line(device->machine->cpu[0], 4, CLEAR_LINE);
	288	cputag_set_input_line(device->machine, "maincpu", 4, CLEAR_LINE);
289	289	}
290	290	}
291	291
r4679	r4680
294	294	static TIMER_CALLBACK( gp2_timer_callback )
295	295	{
296	296	if (control & 0x0004)
297		cpu_set_input_line(machine->cpu[0], 3, HOLD_LINE);
	297	cputag_set_input_line(machine, "maincpu", 3, HOLD_LINE);
298	298	}
299	299
300	300	static INTERRUPT_GEN(qdrmfgp2_interrupt)
r4679	r4680
313	313	if (gp2_irq_control)
314	314	gp2_irq_control = 0;
315	315	else
316		cpu_set_input_line(device->machine->cpu[0], 5, HOLD_LINE);
317		} else {
318		cpu_set_input_line(device->machine->cpu[0], 5, CLEAR_LINE);
	316	cputag_set_input_line(device->machine, "maincpu", 5, HOLD_LINE);
319	317	}
	318	else
	319	{
	320	cputag_set_input_line(device->machine, "maincpu", 5, CLEAR_LINE);
	321	}
320	322	}
321	323	}
322	324
r4679	r4680
327	329	*
328	330	*************************************/
329	331
330		static ADDRESS_MAP_START( readmem, ADDRESS_SPACE_PROGRAM, 16 )
331		AM_RANGE(0x000000, 0x0fffff) AM_READ(SMH_ROM)
332		AM_RANGE(0x100000, 0x10ffff) AM_READ(SMH_RAM)            /* work ram */
333		AM_RANGE(0x180000, 0x183fff) AM_READ(SMH_RAM)            /* backup ram */
334		AM_RANGE(0x280000, 0x280fff) AM_READ(SMH_RAM)            /* color ram */
335		AM_RANGE(0x320000, 0x32001f) AM_READ(K053252_word_r)      /* ccu */
336		AM_RANGE(0x330000, 0x330001) AM_READ_PORT("SENSOR")         /* battery power & service sw */
337		AM_RANGE(0x340000, 0x340001) AM_READ_PORT("340000")         /* inputport */
338		AM_RANGE(0x800000, 0x80045f) AM_DEVREAD8("konami", k054539_r, 0x00ff)      /* sound regs */
339		AM_RANGE(0x880000, 0x881fff) AM_READ(K056832_ram_word_r)   /* vram */
340		AM_RANGE(0x882000, 0x883fff) AM_READ(K056832_ram_word_r)   /* vram (mirror) */
341		AM_RANGE(0x900000, 0x901fff) AM_READ(v_rom_r)            /* gfxrom through */
342		AM_RANGE(0xa00000, 0xa0000f) AM_DEVREAD("ide", ide_std_r)            /* IDE control regs */
343		AM_RANGE(0xa4000c, 0xa4000f) AM_DEVREAD("ide", ide_alt_r)            /* IDE status control reg */
344		AM_RANGE(0xc00000, 0xcbffff) AM_READ(sndram_r)            /* sound ram */
	332	static ADDRESS_MAP_START( qdrmfgp_map, ADDRESS_SPACE_PROGRAM, 16 )
	333	AM_RANGE(0x000000, 0x0fffff) AM_ROM
	334	AM_RANGE(0x100000, 0x10ffff) AM_RAM AM_BASE(&workram)                               /* work ram */
	335	AM_RANGE(0x180000, 0x183fff) AM_RAM AM_BASE(&generic_nvram16) AM_SIZE(&generic_nvram_size)   /* backup ram */
	336	AM_RANGE(0x280000, 0x280fff) AM_RAM_WRITE(paletteram16_xBBBBBGGGGGRRRRR_word_w) AM_BASE(&paletteram16)
	337	AM_RANGE(0x300000, 0x30003f) AM_WRITE(K056832_word_w)                              /* video reg */
	338	AM_RANGE(0x320000, 0x32001f) AM_READWRITE(K053252_word_r,K053252_word_w)               /* ccu */
	339	AM_RANGE(0x330000, 0x330001) AM_READ_PORT("SENSOR")                                 /* battery power & service sw */
	340	AM_RANGE(0x340000, 0x340001) AM_READ_PORT("340000")                                 /* inputport */
	341	AM_RANGE(0x350000, 0x350001) AM_WRITENOP                                       /* unknown */
	342	AM_RANGE(0x360000, 0x360001) AM_WRITENOP                                       /* unknown */
	343	AM_RANGE(0x370000, 0x370001) AM_WRITE(gp_control_w)                                 /* control reg */
	344	AM_RANGE(0x380000, 0x380001) AM_WRITENOP                                       /* Watchdog */
	345	AM_RANGE(0x800000, 0x80045f) AM_DEVREADWRITE8("konami", k054539_r,k054539_w, 0x00ff)      /* sound regs */
	346	AM_RANGE(0x880000, 0x881fff) AM_READWRITE(K056832_ram_word_r,K056832_ram_word_w)         /* vram */
	347	AM_RANGE(0x882000, 0x883fff) AM_READWRITE(K056832_ram_word_r,K056832_ram_word_w)         /* vram (mirror) */
	348	AM_RANGE(0x900000, 0x901fff) AM_READ(v_rom_r)                                    /* gfxrom through */
	349	AM_RANGE(0xa00000, 0xa0000f) AM_DEVREADWRITE("ide", ide_std_r,ide_std_w)               /* IDE control regs */
	350	AM_RANGE(0xa4000c, 0xa4000f) AM_DEVREADWRITE("ide", ide_alt_r,ide_alt_w)               /* IDE status control reg */
	351	AM_RANGE(0xc00000, 0xcbffff) AM_READWRITE(sndram_r,sndram_w)                        /* sound ram */
345	352	ADDRESS_MAP_END
346	353
347		static ADDRESS_MAP_START( writemem, ADDRESS_SPACE_PROGRAM, 16 )
348		AM_RANGE(0x000000, 0x0fffff) AM_WRITE(SMH_ROM)
349		AM_RANGE(0x100000, 0x10ffff) AM_WRITE(SMH_RAM) AM_BASE(&workram)    /* work ram */
350		AM_RANGE(0x180000, 0x183fff) AM_WRITE(SMH_RAM) AM_BASE(&generic_nvram16) AM_SIZE(&generic_nvram_size)   /* backup ram */
351		AM_RANGE(0x280000, 0x280fff) AM_WRITE(paletteram16_xBBBBBGGGGGRRRRR_word_w) AM_BASE(&paletteram16)
352		AM_RANGE(0x300000, 0x30003f) AM_WRITE(K056832_word_w)      /* video reg */
353		AM_RANGE(0x320000, 0x32001f) AM_WRITE(K053252_word_w)      /* ccu */
354		AM_RANGE(0x350000, 0x350001) AM_WRITENOP         /* unknown */
355		AM_RANGE(0x360000, 0x360001) AM_WRITENOP         /* unknown */
356		AM_RANGE(0x370000, 0x370001) AM_WRITE(gp_control_w)         /* control reg */
357		AM_RANGE(0x380000, 0x380001) AM_WRITENOP         /* Watchdog */
358		AM_RANGE(0x800000, 0x80045f) AM_DEVWRITE8("konami", k054539_w, 0x00ff)      /* sound regs */
359		AM_RANGE(0x880000, 0x881fff) AM_WRITE(K056832_ram_word_w)   /* vram */
360		AM_RANGE(0x882000, 0x883fff) AM_WRITE(K056832_ram_word_w)   /* vram (mirror) */
361		AM_RANGE(0xa00000, 0xa0000f) AM_DEVWRITE("ide", ide_std_w)         /* IDE control regs */
362		AM_RANGE(0xa4000c, 0xa4000f) AM_DEVWRITE("ide", ide_alt_w)         /* IDE status control reg */
363		AM_RANGE(0xc00000, 0xcbffff) AM_WRITE(sndram_w)            /* sound ram */
364		ADDRESS_MAP_END
365	354
366
367		static ADDRESS_MAP_START( gp2_readmem, ADDRESS_SPACE_PROGRAM, 16 )
368		AM_RANGE(0x000000, 0x0fffff) AM_READ(SMH_ROM)
369		AM_RANGE(0x100000, 0x110fff) AM_READ(SMH_RAM)            /* work ram */
370		AM_RANGE(0x180000, 0x183fff) AM_READ(SMH_RAM)            /* backup ram */
371		AM_RANGE(0x280000, 0x280fff) AM_READ(SMH_RAM)            /* color ram */
372		AM_RANGE(0x320000, 0x32001f) AM_READ(K053252_word_r)      /* ccu */
373		AM_RANGE(0x330000, 0x330001) AM_READ_PORT("SENSOR")         /* battery power & service */
374		AM_RANGE(0x340000, 0x340001) AM_READ_PORT("340000")         /* inputport */
375		AM_RANGE(0x800000, 0x80045f) AM_DEVREAD8("konami", k054539_r, 0x00ff)      /* sound regs */
376		AM_RANGE(0x880000, 0x881fff) AM_READ(gp2_vram_r)         /* vram */
377		AM_RANGE(0x89f000, 0x8a0fff) AM_READ(gp2_vram_mirror_r)      /* vram (mirror) */
378		AM_RANGE(0x900000, 0x901fff) AM_READ(v_rom_r)            /* gfxrom through */
379		AM_RANGE(0xa00000, 0xa0000f) AM_READ(gp2_ide_std_r)         /* IDE control regs */
380		AM_RANGE(0xa4000c, 0xa4000f) AM_DEVREAD("ide", ide_alt_r)            /* IDE status control reg */
381		AM_RANGE(0xc00000, 0xcbffff) AM_READ(sndram_r)            /* sound ram */
	355	static ADDRESS_MAP_START( qdrmfgp2_map, ADDRESS_SPACE_PROGRAM, 16 )
	356	AM_RANGE(0x000000, 0x0fffff) AM_ROM
	357	AM_RANGE(0x100000, 0x110fff) AM_RAM AM_BASE(&workram)                              /* work ram */
	358	AM_RANGE(0x180000, 0x183fff) AM_RAM AM_BASE(&generic_nvram16) AM_SIZE(&generic_nvram_size)   /* backup ram */
	359	AM_RANGE(0x280000, 0x280fff) AM_RAM_WRITE(paletteram16_xBBBBBGGGGGRRRRR_word_w) AM_BASE(&paletteram16)
	360	AM_RANGE(0x300000, 0x30003f) AM_WRITE(K056832_word_w)                              /* video reg */
	361	AM_RANGE(0x320000, 0x32001f) AM_READWRITE(K053252_word_r,K053252_word_w)               /* ccu */
	362	AM_RANGE(0x330000, 0x330001) AM_READ_PORT("SENSOR")                                 /* battery power & service */
	363	AM_RANGE(0x340000, 0x340001) AM_READ_PORT("340000")                                 /* inputport */
	364	AM_RANGE(0x350000, 0x350001) AM_WRITENOP                                       /* unknown */
	365	AM_RANGE(0x360000, 0x360001) AM_WRITENOP                                       /* unknown */
	366	AM_RANGE(0x370000, 0x370001) AM_WRITE(gp2_control_w)                              /* control reg */
	367	AM_RANGE(0x380000, 0x380001) AM_WRITENOP                                       /* Watchdog */
	368	AM_RANGE(0x800000, 0x80045f) AM_DEVREADWRITE8("konami", k054539_r,k054539_w, 0x00ff)      /* sound regs */
	369	AM_RANGE(0x880000, 0x881fff) AM_READWRITE(gp2_vram_r,gp2_vram_w)                     /* vram */
	370	AM_RANGE(0x89f000, 0x8a0fff) AM_READWRITE(gp2_vram_mirror_r,gp2_vram_mirror_w)            /* vram (mirror) */
	371	AM_RANGE(0x900000, 0x901fff) AM_READ(v_rom_r)                                    /* gfxrom through */
	372	AM_RANGE(0xa00000, 0xa0000f) AM_READ(gp2_ide_std_r)   AM_DEVWRITE("ide", ide_std_w)         /* IDE control regs */
	373	AM_RANGE(0xa4000c, 0xa4000f) AM_DEVREADWRITE("ide", ide_alt_r,ide_alt_w)               /* IDE status control reg */
	374	AM_RANGE(0xc00000, 0xcbffff) AM_READWRITE(sndram_r,sndram_w)                        /* sound ram */
382	375	ADDRESS_MAP_END
383	376
384		static ADDRESS_MAP_START( gp2_writemem, ADDRESS_SPACE_PROGRAM, 16 )
385		AM_RANGE(0x000000, 0x0fffff) AM_WRITE(SMH_ROM)
386		AM_RANGE(0x100000, 0x110fff) AM_WRITE(SMH_RAM) AM_BASE(&workram)   /* work ram */
387		AM_RANGE(0x180000, 0x183fff) AM_WRITE(SMH_RAM) AM_BASE(&generic_nvram16) AM_SIZE(&generic_nvram_size)   /* backup ram */
388		AM_RANGE(0x280000, 0x280fff) AM_WRITE(paletteram16_xBBBBBGGGGGRRRRR_word_w) AM_BASE(&paletteram16)
389		AM_RANGE(0x300000, 0x30003f) AM_WRITE(K056832_word_w)      /* video reg */
390		AM_RANGE(0x320000, 0x32001f) AM_WRITE(K053252_word_w)      /* ccu */
391		AM_RANGE(0x350000, 0x350001) AM_WRITENOP         /* unknown */
392		AM_RANGE(0x360000, 0x360001) AM_WRITENOP         /* unknown */
393		AM_RANGE(0x370000, 0x370001) AM_WRITE(gp2_control_w)      /* control reg */
394		AM_RANGE(0x380000, 0x380001) AM_WRITENOP         /* Watchdog */
395		AM_RANGE(0x800000, 0x80045f) AM_DEVWRITE8("konami", k054539_w, 0x00ff)      /* sound regs */
396		AM_RANGE(0x880000, 0x881fff) AM_WRITE(gp2_vram_w)         /* vram */
397		AM_RANGE(0x89f000, 0x8a0fff) AM_WRITE(gp2_vram_mirror_w)   /* vram (mirror) */
398		AM_RANGE(0xa00000, 0xa0000f) AM_DEVWRITE("ide", ide_std_w)         /* IDE control regs */
399		AM_RANGE(0xa4000c, 0xa4000f) AM_DEVWRITE("ide", ide_alt_w)         /* IDE status control reg */
400		AM_RANGE(0xc00000, 0xcbffff) AM_WRITE(sndram_w)            /* sound ram */
401		ADDRESS_MAP_END
402	377
403
404	378	/*************************************
405	379	*
406	380	*  Port definitions
r4679	r4680
590	564	static void sound_irq(const device_config *device)
591	565	{
592	566	if (control & 0x0001)
593		cpu_set_input_line(device->machine->cpu[0], 1, HOLD_LINE);
	567	cputag_set_input_line(device->machine, "maincpu", 1, HOLD_LINE);
594	568	}
595	569
596	570	static const k054539_interface k054539_config =
r4679	r4680
646	620
647	621	/* basic machine hardware */
648	622	MDRV_CPU_ADD("maincpu", M68000, 32000000/2)   /*  16.000 MHz */
649		MDRV_CPU_PROGRAM_MAP(readmem,writemem)
	623	MDRV_CPU_PROGRAM_MAP(qdrmfgp_map,0)
650	624	MDRV_CPU_VBLANK_INT_HACK(qdrmfgp_interrupt, 2)
651	625
652	626	MDRV_MACHINE_START(qdrmfgp)
r4679	r4680
681	655
682	656	/* basic machine hardware */
683	657	MDRV_CPU_ADD("maincpu", M68000, 32000000/2)   /*  16.000 MHz */
684		MDRV_CPU_PROGRAM_MAP(gp2_readmem,gp2_writemem)
	658	MDRV_CPU_PROGRAM_MAP(qdrmfgp2_map,0)
685	659	MDRV_CPU_VBLANK_INT("screen", qdrmfgp2_interrupt)
686	660
687	661	MDRV_MACHINE_START(qdrmfgp)

src/mame/drivers/m14.c

r0	r4680
	1	/********************************************************************************************
	2
	3	M14 Hardware (c) 1979 Irem
	4
	5	driver by Angelo Salese
	6
	7	TODO:
	8	- Check if the coin latch are correct and understand why the proper gameplay looks stiff;
	9	- Sound (very likely to be discrete);
	10	- What are the high 4 bits in the colorram for? They are used on the tiles only, left-over?
	11
	12	==============================================================================================
	13	x (Mystery Rom)
	14	(c)1978-1981? Irem?
	15	PCB No. :M14S-2
	16	:M14L-2
	17	CPU :NEC D8085AC
	18	Sound   :?
	19	OSC :6MHz x2
	20
	21	mgpb1.bin
	22	mgpa2.bin
	23	mgpa3.bin
	24	mgpa4.bin
	25	mgpa5.bin
	26	mgpb6.bin
	27	mgpa7.bin
	28	mgpb8.bin
	29
	30	mgpa9.bin
	31	mgpa10.bin
	32
	33
	34	--- Team Japump!!! ---
	35	http://japump.i.am/
	36	Dumped by Chackn
	37	01/30/2000
	38
	39	********************************************************************************************/
	40
	41	#include "driver.h"
	42	#include "cpu/i8085/i8085.h"
	43
	44	VIDEO_START( m14 )
	45	{
	46
	47	}
	48
	49	VIDEO_UPDATE( m14 )
	50	{
	51	const gfx_element *gfx = screen->machine->gfx[0];
	52	int count = 0;
	53
	54	int y,x;
	55
	56
	57	for (y=0;y<32;y++)
	58	{
	59	for (x=0;x<32;x++)
	60	{
	61	int tile = videoram[count];
	62	int colour = colorram[count] & 0x0f;
	63	/* bits 4-7? */
	64
	65	drawgfx(bitmap,gfx,tile,colour,0,0,x*8,y*8,cliprect,TRANSPARENCY_NONE,0);
	66
	67	count++;
	68	}
	69	}
	70	return 0;
	71	}
	72
	73	static READ8_HANDLER( m14_rng_r )
	74	{
	75	/* graphic artifacts happens if this doesn't return random values. */
	76	return mame_rand(space->machine);
	77	}
	78
	79	static WRITE8_HANDLER( test_w )
	80	{
	81	static UINT8 x[5];
	82
	83	x[offset] = data;
	84
	85	//popmessage("%02x %02x %02x %02x %02x",x[0],x[1],x[2],x[3],x[4]);
	86	}
	87
	88	static ADDRESS_MAP_START( m14_map, ADDRESS_SPACE_PROGRAM, 8 )
	89	AM_RANGE(0x0000, 0x1fff) AM_ROM
	90	AM_RANGE(0x2000, 0x23ff) AM_RAM
	91	AM_RANGE(0xe000, 0xe3ff) AM_RAM AM_BASE(&videoram)
	92	AM_RANGE(0xe400, 0xe7ff) AM_RAM AM_BASE(&colorram)
	93	ADDRESS_MAP_END
	94
	95	static ADDRESS_MAP_START( m14_io_map, ADDRESS_SPACE_IO, 8 )
	96	ADDRESS_MAP_GLOBAL_MASK(0xff)
	97	AM_RANGE(0xf8, 0xf8) AM_READ_PORT("IN0")
	98	AM_RANGE(0xf9, 0xf9) AM_READ_PORT("IN1")
	99	AM_RANGE(0xfa, 0xfa) AM_READ(m14_rng_r)
	100	AM_RANGE(0xfb, 0xfb) AM_READ_PORT("IN3")
	101	AM_RANGE(0xf8, 0xfc) AM_WRITE(test_w)
	102	ADDRESS_MAP_END
	103
	104	static INPUT_CHANGED( left_coin_inserted )
	105	{
	106	/* left coin insertion causes a rst6.5 (vector 0x34) */
	107	cputag_set_input_line(field->port->machine, "maincpu", I8085_RST65_LINE, newval ? ASSERT_LINE : CLEAR_LINE);
	108	}
	109
	110	static INPUT_CHANGED( right_coin_inserted )
	111	{
	112	/* right coin insertion causes a rst5.5 (vector 0x2c) */
	113	cputag_set_input_line(field->port->machine, "maincpu", I8085_RST55_LINE, newval ? ASSERT_LINE : CLEAR_LINE);
	114	}
	115
	116	static INPUT_PORTS_START( m14 )
	117	PORT_START("IN0") // paddle?
	118	PORT_DIPNAME( 0x01, 0x00, "IN0" )
	119	PORT_DIPSETTING(    0x00, DEF_STR( Off ) )
	120	PORT_DIPSETTING(    0x01, DEF_STR( On ) )
	121	PORT_DIPNAME( 0x02, 0x00, DEF_STR( Unknown ) )
	122	PORT_DIPSETTING(    0x00, DEF_STR( Off ) )
	123	PORT_DIPSETTING(    0x02, DEF_STR( On ) )
	124	PORT_DIPNAME( 0x04, 0x00, DEF_STR( Unknown ) )
	125	PORT_DIPSETTING(    0x00, DEF_STR( Off ) )
	126	PORT_DIPSETTING(    0x04, DEF_STR( On ) )
	127	PORT_DIPNAME( 0x08, 0x00, DEF_STR( Unknown ) )
	128	PORT_DIPSETTING(    0x00, DEF_STR( Off ) )
	129	PORT_DIPSETTING(    0x08, DEF_STR( On ) )
	130	PORT_DIPNAME( 0x10, 0x00, DEF_STR( Unknown ) )
	131	PORT_DIPSETTING(    0x00, DEF_STR( Off ) )
	132	PORT_DIPSETTING(    0x10, DEF_STR( On ) )
	133	PORT_DIPNAME( 0x20, 0x00, DEF_STR( Unknown ) )
	134	PORT_DIPSETTING(    0x00, DEF_STR( Off ) )
	135	PORT_DIPSETTING(    0x20, DEF_STR( On ) )
	136	PORT_DIPNAME( 0x40, 0x00, DEF_STR( Unknown ) )
	137	PORT_DIPSETTING(    0x00, DEF_STR( Off ) )
	138	PORT_DIPSETTING(    0x40, DEF_STR( On ) )
	139	PORT_DIPNAME( 0x80, 0x00, DEF_STR( Unknown ) )
	140	PORT_DIPSETTING(    0x00, DEF_STR( Off ) )
	141	PORT_DIPSETTING(    0x80, DEF_STR( On ) )
	142
	143	PORT_START("IN1")
	144	PORT_DIPNAME( 0x01, 0x00, "IN1" )
	145	PORT_DIPSETTING(    0x00, DEF_STR( Off ) )
	146	PORT_DIPSETTING(    0x01, DEF_STR( On ) )
	147	PORT_DIPNAME( 0x02, 0x00, DEF_STR( Unknown ) )
	148	PORT_DIPSETTING(    0x00, DEF_STR( Off ) )
	149	PORT_DIPSETTING(    0x02, DEF_STR( On ) )
	150	PORT_DIPNAME( 0x04, 0x00, DEF_STR( Unknown ) ) //this affects the medal settings
	151	PORT_DIPSETTING(    0x00, DEF_STR( Off ) )
	152	PORT_DIPSETTING(    0x04, DEF_STR( On ) )
	153	PORT_DIPNAME( 0x08, 0x00, DEF_STR( Unknown ) )
	154	PORT_DIPSETTING(    0x00, DEF_STR( Off ) )
	155	PORT_DIPSETTING(    0x08, DEF_STR( On ) )
	156	PORT_DIPNAME( 0x10, 0x00, DEF_STR( Unknown ) )
	157	PORT_DIPSETTING(    0x00, DEF_STR( Off ) )
	158	PORT_DIPSETTING(    0x10, DEF_STR( On ) )
	159	PORT_DIPNAME( 0x20, 0x20, "Freeze" )
	160	PORT_DIPSETTING(    0x20, DEF_STR( No ) )
	161	PORT_DIPSETTING(    0x00, DEF_STR( Yes ) )
	162	PORT_DIPNAME( 0x40, 0x00, DEF_STR( Unknown ) )
	163	PORT_DIPSETTING(    0x00, DEF_STR( Off ) )
	164	PORT_DIPSETTING(    0x40, DEF_STR( On ) )
	165	PORT_DIPNAME( 0x80, 0x00, DEF_STR( Unknown ) )
	166	PORT_DIPSETTING(    0x00, DEF_STR( Off ) )
	167	PORT_DIPSETTING(    0x80, DEF_STR( On ) )
	168
	169	PORT_START("IN3") //this whole port is stored at work ram $2112.
	170	PORT_DIPNAME( 0x01, 0x00, "Show available tiles" ) // debug mode for the rng?
	171	PORT_DIPSETTING(    0x00, DEF_STR( No ) )
	172	PORT_DIPSETTING(    0x01, DEF_STR( Yes ) )
	173	PORT_DIPNAME( 0x02, 0x00, DEF_STR( Unknown ) )
	174	PORT_DIPSETTING(    0x00, DEF_STR( Off ) )
	175	PORT_DIPSETTING(    0x02, DEF_STR( On ) )
	176	PORT_DIPNAME( 0x04, 0x00, DEF_STR( Unknown ) )
	177	PORT_DIPSETTING(    0x00, DEF_STR( Off ) )
	178	PORT_DIPSETTING(    0x04, DEF_STR( On ) )
	179	PORT_DIPNAME( 0x08, 0x00, DEF_STR( Unknown ) )
	180	PORT_DIPSETTING(    0x00, DEF_STR( Off ) )
	181	PORT_DIPSETTING(    0x08, DEF_STR( On ) )
	182	PORT_DIPNAME( 0x10, 0x00, DEF_STR( Unknown ) )
	183	PORT_DIPSETTING(    0x00, DEF_STR( Off ) )
	184	PORT_DIPSETTING(    0x10, DEF_STR( On ) )
	185	PORT_DIPNAME( 0x20, 0x00, DEF_STR( Unknown ) )
	186	PORT_DIPSETTING(    0x00, DEF_STR( Off ) )
	187	PORT_DIPSETTING(    0x20, DEF_STR( On ) )
	188	PORT_DIPNAME( 0x40, 0x00, DEF_STR( Unknown ) )
	189	PORT_DIPSETTING(    0x00, DEF_STR( Off ) )
	190	PORT_DIPSETTING(    0x40, DEF_STR( On ) )
	191	PORT_DIPNAME( 0x80, 0x00, DEF_STR( Unknown ) )
	192	PORT_DIPSETTING(    0x00, DEF_STR( Off ) )
	193	PORT_DIPSETTING(    0x80, DEF_STR( On ) )
	194
	195	PORT_START("FAKE")
	196	PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_COIN1 ) PORT_IMPULSE(1) PORT_CHANGED(left_coin_inserted, 0)
	197	PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_COIN2 ) PORT_IMPULSE(1) PORT_CHANGED(right_coin_inserted, 0)
	198	INPUT_PORTS_END
	199
	200	static const gfx_layout charlayout =
	201	{
	202	8,8,
	203	RGN_FRAC(1,1),
	204	1,
	205	{ RGN_FRAC(0,1) },
	206	{ 0, 1, 2, 3, 4, 5, 6, 7 },
	207	{ 0*8, 1*8, 2*8, 3*8, 4*8, 5*8, 6*8, 7*8 },
	208	8*8
	209	};
	210
	211	static GFXDECODE_START( m14 )
	212	GFXDECODE_ENTRY( "gfx1", 0, charlayout,     0, 0x10 )
	213	GFXDECODE_END
	214
	215	static PALETTE_INIT( m14 )
	216	{
	217	int i;
	218
	219	for (i = 0; i < 0x20; i++)
	220	{
	221	rgb_t color;
	222
	223	if (i & 0x01)
	224	color = MAKE_RGB(pal1bit(i >> 1), pal1bit(i >> 2), pal1bit(i >> 3));
	225	else
	226	color = (i & 0x10) ? RGB_WHITE : RGB_BLACK;
	227
	228	palette_set_color(machine, i, color);
	229	}
	230	}
	231
	232	static INTERRUPT_GEN( m14_irq )
	233	{
	234	cpu_set_input_line(device, I8085_RST75_LINE, ASSERT_LINE);
	235	cpu_set_input_line(device, I8085_RST75_LINE, CLEAR_LINE);
	236	}
	237
	238	static MACHINE_DRIVER_START( m14 )
	239
	240	/* basic machine hardware */
	241	MDRV_CPU_ADD("maincpu",8085A,6000000)
	242	MDRV_CPU_PROGRAM_MAP(m14_map,0)
	243	MDRV_CPU_IO_MAP(m14_io_map,0)
	244	MDRV_CPU_VBLANK_INT("screen",m14_irq)
	245
	246	/* video hardware */
	247	MDRV_SCREEN_ADD("screen", RASTER)
	248	MDRV_SCREEN_REFRESH_RATE(60)
	249	MDRV_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(2500)) //not accurate
	250	MDRV_SCREEN_FORMAT(BITMAP_FORMAT_INDEXED16)
	251	MDRV_SCREEN_SIZE(32*8, 32*8)
	252	MDRV_SCREEN_VISIBLE_AREA(0*8, 32*8-1, 0*8, 28*8-1)
	253	MDRV_GFXDECODE(m14)
	254	MDRV_PALETTE_LENGTH(0x20)
	255	MDRV_PALETTE_INIT(m14)
	256
	257	MDRV_VIDEO_START(m14)
	258	MDRV_VIDEO_UPDATE(m14)
	259
	260	/* sound hardware */
	261	//  MDRV_SPEAKER_STANDARD_MONO("mono")
	262	//  MDRV_SOUND_ADD("ay", AY8910, 8000000/4 /* guess */)
	263	//  MDRV_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.30)
	264	MACHINE_DRIVER_END
	265
	266	/***************************************************************************
	267
	268	Game driver(s)
	269
	270	***************************************************************************/
	271
	272
	273	ROM_START( ptrmj )
	274	ROM_REGION( 0x10000, "maincpu", 0 )
	275	ROM_LOAD( "mgpb1.bin",   0x0000, 0x0400, CRC(47c041b8) SHA1(e834c375e689f99a13964863fc9847a8e148ec91) )
	276	ROM_LOAD( "mgpa2.bin",   0x0400, 0x0400, CRC(cf8bfa23) SHA1(091055e803255f1b5520f50b31af7135d71d0a40) )
	277	ROM_LOAD( "mgpa3.bin",   0x0800, 0x0400, CRC(a07a3093) SHA1(5b86bb11e83c06f828956e7db6dd2c105b023b03) )
	278	ROM_LOAD( "mgpa4.bin",   0x0c00, 0x0400, CRC(a420241c) SHA1(7497d90014dabb49f9db1d5d8e3014c634045725) )
	279	ROM_LOAD( "mgpa5.bin",   0x1000, 0x0400, CRC(a2df92a3) SHA1(97a3d4b188d26f172881f8cf86bdd83d549f5b74) )
	280	ROM_LOAD( "mgpb6.bin",   0x1400, 0x0400, CRC(f5c0fcd4) SHA1(14e2d04be105caeb221dfc226f84cb1722ae2627) )
	281	ROM_LOAD( "mgpa7.bin",   0x1800, 0x0400, CRC(56ed7eb2) SHA1(acf954bf4daadb225475937dd3c36baa996f7b65) )
	282	ROM_LOAD( "mgpb8.bin",   0x1c00, 0x0400, CRC(3ecb8214) SHA1(8575bcb49f693aa8798b8a7d9a76392bfcc90e0e) )
	283
	284	ROM_REGION( 0x0800, "gfx1", ROMREGION_DISPOSE )
	285	ROM_LOAD( "mgpa9.bin",   0x0000, 0x0400, CRC(cb68b4ec) SHA1(2cf596affb155ae38729fcd95cae424073faf74d) )
	286	ROM_LOAD( "mgpa10.bin",  0x0400, 0x0400, CRC(e1a4ebdc) SHA1(d9df42424ede17f0634d8d0a56c0374a33c55333) )
	287	ROM_END
	288
	289	GAME( 1979, ptrmj,  0,       m14,  m14,  0, ROT0, "Irem", "PT Reach Mahjong (Japan)", GAME_NO_SOUND|GAME_NOT_WORKING )

src/mame/drivers/cps1.c

r4679	r4680
2736	2736
2737	2737	static void cps1_irq_handler_mus(const device_config *device, int irq)
2738	2738	{
2739		cpu_set_input_line(device->machine->cpu[1],0,irq ? ASSERT_LINE : CLEAR_LINE);
	2739	cputag_set_input_line(device->machine, "audiocpu", 0, irq ? ASSERT_LINE : CLEAR_LINE);
2740	2740	}
2741	2741
2742	2742	static const ym2151_interface ym2151_config =
r4679	r4680
2892	2892	//  sample_buffer1 >>= 4;
2893	2893	//  sample_select1 ^= 1;
2894	2894	//  if (sample_select1 == 0)
2895		//      cpu_set_input_line(machine->cpu[1], INPUT_LINE_NMI, PULSE_LINE);
	2895	//      cputag_set_input_line(machine, "audiocpu", INPUT_LINE_NMI, PULSE_LINE);
2896	2896	}
2897	2897
2898	2898	static void m5205_int2(const device_config *device)
r4679	r4680
8268	8268	{
8269	8269	/* Forgotten Worlds has a NEC uPD4701AC on the B-board handling dial inputs from the CN-MOWS connector. */
8270	8270	/* The memory mapping is handled by PAL LWIO */
8271		memory_install_write16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x800040, 0x800041, 0, 0, forgottn_dial_0_reset_w);
8272		memory_install_write16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x800048, 0x800049, 0, 0, forgottn_dial_1_reset_w);
8273		memory_install_read16_handler (cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x800052, 0x800055, 0, 0, forgottn_dial_0_r);
8274		memory_install_read16_handler (cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x80005a, 0x80005d, 0, 0, forgottn_dial_1_r);
	8271	memory_install_write16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x800040, 0x800041, 0, 0, forgottn_dial_0_reset_w);
	8272	memory_install_write16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x800048, 0x800049, 0, 0, forgottn_dial_1_reset_w);
	8273	memory_install_read16_handler (cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x800052, 0x800055, 0, 0, forgottn_dial_0_r);
	8274	memory_install_read16_handler (cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x80005a, 0x80005d, 0, 0, forgottn_dial_1_r);
8275	8275
8276	8276	DRIVER_INIT_CALL(cps1);
8277	8277	}
r4679	r4680
8280	8280	{
8281	8281	/* This specific version of SF2 has the CPS-B custom mapped at a different address. */
8282	8282	/* The mapping is handled by a PAL on the B-board */
8283		memory_install_readwrite16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x800140, 0x80017f, 0, 0, SMH_UNMAP, SMH_UNMAP);
8284		memory_install_readwrite16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x8001c0, 0x8001ff, 0, 0, cps1_cps_b_r, cps1_cps_b_w);
	8283	memory_install_readwrite16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x800140, 0x80017f, 0, 0, (read16_space_func)SMH_UNMAP, (write16_space_func)SMH_UNMAP);
	8284	memory_install_readwrite16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x8001c0, 0x8001ff, 0, 0, cps1_cps_b_r, cps1_cps_b_w);
8285	8285
8286	8286	DRIVER_INIT_CALL(cps1);
8287	8287	}
r4679	r4680
8289	8289	static DRIVER_INIT( sf2hack )
8290	8290	{
8291	8291	/* some SF2 hacks have some inputs wired to the LSB instead of MSB */
8292		memory_install_read16_handler (cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x800018, 0x80001f, 0, 0, cps1_hack_dsw_r);
	8292	memory_install_read16_handler (cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x800018, 0x80001f, 0, 0, cps1_hack_dsw_r);
8293	8293
8294	8294	DRIVER_INIT_CALL(cps1);
8295	8295	}
r4679	r4680
8322	8322	{
8323	8323	/* Pang 3 is the only non-QSound game to have an EEPROM. */
8324	8324	/* It is mapped in the CPS-B address range so probably is on the C-board. */
8325		memory_install_readwrite16_handler (cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x80017a, 0x80017b, 0, 0, cps1_eeprom_port_r, cps1_eeprom_port_w);
	8325	memory_install_readwrite16_handler (cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x80017a, 0x80017b, 0, 0, cps1_eeprom_port_r, cps1_eeprom_port_w);
8326	8326
8327	8327	DRIVER_INIT_CALL(cps1);
8328	8328	}
r4679	r4680
8373	8373	rom[i+3] = rom[i+6];
8374	8374	rom[i+6] = tmp;
8375	8375	}
8376		memory_install_read16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x70c01a, 0x70c01b, 0, 0, sf2mdt_r);
8377		memory_install_read16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x70c01c, 0x70c01d, 0, 0, sf2mdt_r);
8378		memory_install_read16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x70c01e, 0x70c01f, 0, 0, sf2mdt_r);
8379		memory_install_read16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x70c010, 0x70c011, 0, 0, sf2mdt_r);
8380		memory_install_read16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x70c018, 0x70c019, 0, 0, sf2mdt_r);
	8376	memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x70c01a, 0x70c01b, 0, 0, sf2mdt_r);
	8377	memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x70c01c, 0x70c01d, 0, 0, sf2mdt_r);
	8378	memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x70c01e, 0x70c01f, 0, 0, sf2mdt_r);
	8379	memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x70c010, 0x70c011, 0, 0, sf2mdt_r);
	8380	memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x70c018, 0x70c019, 0, 0, sf2mdt_r);
8381	8381
8382	8382	DRIVER_INIT_CALL(cps1);
8383	8383	}

src/mame/drivers/nova2001.c

r4679	r4680
1009	1009
1010	1010	UINT8* const src = memory_region(machine, region);
1011	1011
1012		UINT8* const temp = malloc_or_die(length);
	1012	UINT8* const temp = alloc_array_or_die(UINT8, length);
1013	1013
1014	1014	const int mask = (1 << (bit + 1)) - 1;
1015	1015

src/mame/drivers/starcrus.c

r4679	r4680
34	34	extern int s1_sprite;
35	35	extern int s2_sprite;
36	36
37		static ADDRESS_MAP_START( readmem, ADDRESS_SPACE_PROGRAM, 8 )
38		AM_RANGE(0x0000, 0x0fff) AM_READ(SMH_ROM) /* Program ROM */
39		AM_RANGE(0x1000, 0x10ff) AM_READ(SMH_RAM) /* RAM */
	37	static ADDRESS_MAP_START( starcrus_map, ADDRESS_SPACE_PROGRAM, 8 )
	38	AM_RANGE(0x0000, 0x0fff) AM_ROM
	39	AM_RANGE(0x1000, 0x10ff) AM_RAM
40	40	ADDRESS_MAP_END
41	41
42		static ADDRESS_MAP_START( writemem, ADDRESS_SPACE_PROGRAM, 8 )
43		AM_RANGE(0x0000, 0x0fff) AM_WRITE(SMH_ROM) /* Program ROM */
44		AM_RANGE(0x1000, 0x10ff) AM_WRITE(SMH_RAM) /* RAM */
45		ADDRESS_MAP_END
46
47
48		static ADDRESS_MAP_START( io_map, ADDRESS_SPACE_IO, 8 )
	42	static ADDRESS_MAP_START( starcrus_io_map, ADDRESS_SPACE_IO, 8 )
49	43	AM_RANGE(0x00, 0x00) AM_READ_PORT("P1") AM_WRITE(starcrus_s1_x_w)
50	44	AM_RANGE(0x01, 0x01) AM_READ_PORT("P2") AM_WRITE(starcrus_s1_y_w)
51	45	AM_RANGE(0x02, 0x02) AM_READWRITE(starcrus_coll_det_r, starcrus_s2_x_w)
r4679	r4680
164	158
165	159	/* basic machine hardware */
166	160	MDRV_CPU_ADD("maincpu", 8080,9750000/9)  /* 8224 chip is a divide by 9 */
167		MDRV_CPU_PROGRAM_MAP(readmem,writemem)
168		MDRV_CPU_IO_MAP(io_map,0)
	161	MDRV_CPU_PROGRAM_MAP(starcrus_map,0)
	162	MDRV_CPU_IO_MAP(starcrus_io_map,0)
169	163	MDRV_CPU_VBLANK_INT("screen", irq0_line_hold)
170	164
171	165	/* video hardware */

src/mame/drivers/jantotsu.c

r4679	r4680
73	73
74	74	static VIDEO_START(jantotsu)
75	75	{
76		jan_bitmap_1 = auto_malloc(0x2000);
77		jan_bitmap_2 = auto_malloc(0x2000);
78		jan_bitmap_3 = auto_malloc(0x2000);
79		jan_bitmap_4 = auto_malloc(0x2000);
	76	jan_bitmap_1 = auto_alloc_array(machine, UINT8, 0x2000);
	77	jan_bitmap_2 = auto_alloc_array(machine, UINT8, 0x2000);
	78	jan_bitmap_3 = auto_alloc_array(machine, UINT8, 0x2000);
	79	jan_bitmap_4 = auto_alloc_array(machine, UINT8, 0x2000);
80	80	vram_bank = 0;
81	81	}
82	82
r4679	r4680
380	380
381	381	static INTERRUPT_GEN( jantotsu_irq )
382	382	{
383		cpu_set_input_line(device->machine->cpu[0], INPUT_LINE_NMI, PULSE_LINE );
	383	cputag_set_input_line(device->machine, "maincpu", INPUT_LINE_NMI, PULSE_LINE );
384	384	}
385	385
386	386	static MACHINE_RESET( jantotsu )

src/mame/drivers/yunsun16.c

r4679	r4680
158	158	HACK: the game continuously sends this. It'll play the oki sample
159	159	number 0 on each voice. That sample is 00000-00000.
160	160	*/
161		if ((data&0xff)!=0x3a)
	161	if ((data & 0xff) != 0x3a)
162	162	{
163		soundlatch_w(space,0,data & 0xff);
164		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_NMI, PULSE_LINE);
	163	soundlatch_w(space, 0, data & 0xff);
	164	cputag_set_input_line(space->machine, "audiocpu", INPUT_LINE_NMI, PULSE_LINE);
165	165	}
166	166	}
167	167	}
r4679	r4680
169	169	static DRIVER_INIT( magicbub )
170	170	{
171	171	//  remove_mem_write16_handler (0, 0x800180, 0x800181 );
172		memory_install_write16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x800188, 0x800189, 0, 0, magicbub_sound_command_w);
	172	memory_install_write16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x800188, 0x800189, 0, 0, magicbub_sound_command_w);
173	173	}
174	174
175	175	/***************************************************************************
r4679	r4680
573	573
574	574	static void soundirq(const device_config *device, int state)
575	575	{
576		cpu_set_input_line(device->machine->cpu[1], 0, state);
	576	cputag_set_input_line(device->machine, "audiocpu", 0, state);
577	577	}
578	578
579	579	static const ym3812_interface magicbub_ym3812_intf =

src/mame/drivers/wiz.c

r4679	r4680
1052	1052	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
1053	1053	UINT8 *rom = memory_region(machine, "maincpu");
1054	1054	int size = memory_region_length(machine, "maincpu");
1055		UINT8 *decrypt = auto_malloc(size);
	1055	UINT8 *decrypt = auto_alloc_array(machine, UINT8, size);
1056	1056	int A;
1057	1057	const UINT8 *tbl;
1058	1058
r4679	r4680
1086	1086
1087	1087	static DRIVER_INIT( scion )
1088	1088	{
1089		memory_install_write8_handler(cpu_get_address_space(machine->cpu[1], ADDRESS_SPACE_PROGRAM), 0x4000, 0x4001, 0, 0, SMH_NOP);
	1089	memory_install_write8_handler(cputag_get_address_space(machine, "audiocpu", ADDRESS_SPACE_PROGRAM), 0x4000, 0x4001, 0, 0, (write8_space_func)SMH_NOP);
1090	1090	}
1091	1091
1092	1092
1093	1093	static DRIVER_INIT( wiz )
1094	1094	{
1095		memory_install_read8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xd400, 0xd400, 0, 0, wiz_protection_r);
	1095	memory_install_read8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xd400, 0xd400, 0, 0, wiz_protection_r);
1096	1096	}
1097	1097
1098	1098

src/mame/drivers/stactics.c

r4679	r4680
55	55
56	56	static CUSTOM_INPUT( get_motor_not_ready )
57	57	{
58		stactics_state *state = field->port->machine->driver_data;
	58	stactics_state *state = (stactics_state *)field->port->machine->driver_data;
59	59
60	60	/* if the motor is self-centering, but not centered yet */
61	61	return ((*state->motor_on & 0x01) == 0) &&
r4679	r4680
65	65
66	66	static READ8_HANDLER( vert_pos_r )
67	67	{
68		stactics_state *state = space->machine->driver_data;
	68	stactics_state *state = (stactics_state *)space->machine->driver_data;
69	69
70	70	return 0x70 - state->vert_pos;
71	71	}
r4679	r4680
73	73
74	74	static READ8_HANDLER( horiz_pos_r )
75	75	{
76		stactics_state *state = space->machine->driver_data;
	76	stactics_state *state = (stactics_state *)space->machine->driver_data;
77	77
78	78	return state->horiz_pos + 0x88;
79	79	}
r4679	r4680
156	156
157	157	static INTERRUPT_GEN( stactics_interrupt )
158	158	{
159		stactics_state *state = device->machine->driver_data;
	159	stactics_state *state = (stactics_state *)device->machine->driver_data;
160	160
161	161	move_motor(device->machine, state);
162	162
r4679	r4680
287	287
288	288	static MACHINE_START( stactics )
289	289	{
290		stactics_state *state = machine->driver_data;
	290	stactics_state *state = (stactics_state *)machine->driver_data;
291	291
292	292	state->vert_pos = 0;
293	293	state->horiz_pos = 0;

src/mame/drivers/gaelco3d.c

r4679	r4680
202	202	memory_set_bank(machine, 1, 0);
203	203
204	204	/* keep the TMS32031 halted until the code is ready to go */
205		cpu_set_input_line(machine->cpu[1], INPUT_LINE_RESET, ASSERT_LINE);
	205	cputag_set_input_line(machine, "tms", INPUT_LINE_RESET, ASSERT_LINE);
206	206
207	207	for (i = 0; i < SOUND_CHANNELS; i++)
208	208	{
r4679	r4680
255	255
256	256	static WRITE16_HANDLER( irq_ack_w )
257	257	{
258		cpu_set_input_line(space->machine->cpu[0], 2, CLEAR_LINE);
	258	cputag_set_input_line(space->machine, "maincpu", 2, CLEAR_LINE);
259	259	}
260	260
261	261
r4679	r4680
308	308	{
309	309	logerror("delayed_sound_w(%02X)\n", param);
310	310	sound_data = param;
311		cpu_set_input_line(machine->cpu[2], ADSP2115_IRQ2, ASSERT_LINE);
	311	cputag_set_input_line(machine, "adsp", ADSP2115_IRQ2, ASSERT_LINE);
312	312	}
313	313
314	314
r4679	r4680
323	323	static READ16_HANDLER( sound_data_r )
324	324	{
325	325	logerror("sound_data_r(%02X)\n", sound_data);
326		cpu_set_input_line(space->machine->cpu[2], ADSP2115_IRQ2, CLEAR_LINE);
	326	cputag_set_input_line(space->machine, "adsp", ADSP2115_IRQ2, CLEAR_LINE);
327	327	return sound_data;
328	328	}
329	329
r4679	r4680
433	433	/* this is set to 0 while data is uploaded, then set to $ffff after it is done */
434	434	/* it does not ever appear to be touched after that */
435	435	logerror("%06X:tms_reset_w(%02X) = %08X & %08X\n", cpu_get_pc(space->cpu), offset, data, mem_mask);
436		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_RESET, (data == 0xffff) ? CLEAR_LINE : ASSERT_LINE);
	436	cputag_set_input_line(space->machine, "tms", INPUT_LINE_RESET, (data == 0xffff) ? CLEAR_LINE : ASSERT_LINE);
437	437	}
438	438
439	439
r4679	r4680
443	443	/* done after uploading, and after modifying the comm area */
444	444	logerror("%06X:tms_irq_w(%02X) = %08X & %08X\n", cpu_get_pc(space->cpu), offset, data, mem_mask);
445	445	if (ACCESSING_BITS_0_7)
446		cpu_set_input_line(space->machine->cpu[1], 0, (data & 0x01) ? CLEAR_LINE : ASSERT_LINE);
	446	cputag_set_input_line(space->machine, "tms", 0, (data & 0x01) ? CLEAR_LINE : ASSERT_LINE);
447	447	}
448	448
449	449
r4679	r4680
550	550	static TIMER_CALLBACK( adsp_autobuffer_irq )
551	551	{
552	552	/* get the index register */
553		int reg = cpu_get_reg(machine->cpu[2], ADSP2100_I0 + adsp_ireg);
	553	int reg = cpu_get_reg(cputag_get_cpu(machine, "adsp"), ADSP2100_I0 + adsp_ireg);
554	554
555	555	/* copy the current data into the buffer */
556	556	// logerror("ADSP buffer: I%d=%04X incs=%04X size=%04X\n", adsp_ireg, reg, adsp_incs, adsp_size);
r4679	r4680
567	567	reg = adsp_ireg_base;
568	568
569	569	/* generate the (internal, thats why the pulse) irq */
570		generic_pulse_irq_line(machine->cpu[2], ADSP2105_IRQ1);
	570	generic_pulse_irq_line(cputag_get_cpu(machine, "adsp"), ADSP2105_IRQ1);
571	571	}
572	572
573	573	/* store it */
574		cpu_set_reg(machine->cpu[2], ADSP2100_I0 + adsp_ireg, reg);
	574	cpu_set_reg(cputag_get_cpu(machine, "adsp"), ADSP2100_I0 + adsp_ireg, reg);
575	575	}
576	576
577	577
r4679	r4680
1147	1147	/* allocate memory */
1148	1148	gaelco3d_texture_size = memory_region_length(machine, "gfx1");
1149	1149	gaelco3d_texmask_size = memory_region_length(machine, "gfx2") * 8;
1150		gaelco3d_texture = auto_malloc(gaelco3d_texture_size);
1151		gaelco3d_texmask = auto_malloc(gaelco3d_texmask_size);
	1150	gaelco3d_texture = auto_alloc_array(machine, UINT8, gaelco3d_texture_size);
	1151	gaelco3d_texmask = auto_alloc_array(machine, UINT8, gaelco3d_texmask_size);
1152	1152
1153	1153	/* first expand the pixel data */
1154	1154	src = memory_region(machine, "gfx1");

src/mame/drivers/namcos11.c

r4679	r4680
810	810	{
811	811	if( namcos11_config_table[ n_game ].keycus_r != NULL )
812	812	{
813		memory_install_read32_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x1fa20000, 0x1fa2ffff, 0, 0, namcos11_config_table[ n_game ].keycus_r );
	813	memory_install_read32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x1fa20000, 0x1fa2ffff, 0, 0, namcos11_config_table[ n_game ].keycus_r );
814	814	}
815	815	if( namcos11_config_table[ n_game ].n_daughterboard != 0 )
816	816	{
r4679	r4680
818	818	UINT32 len = memory_region_length( machine, "user2" );
819	819	UINT8 *rgn = memory_region( machine, "user2" );
820	820
821		memory_install_read32_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x1f000000, 0x1f0fffff, 0, 0, SMH_BANK1 );
822		memory_install_read32_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x1f100000, 0x1f1fffff, 0, 0, SMH_BANK2 );
823		memory_install_read32_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x1f200000, 0x1f2fffff, 0, 0, SMH_BANK3 );
824		memory_install_read32_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x1f300000, 0x1f3fffff, 0, 0, SMH_BANK4 );
825		memory_install_read32_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x1f400000, 0x1f4fffff, 0, 0, SMH_BANK5 );
826		memory_install_read32_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x1f500000, 0x1f5fffff, 0, 0, SMH_BANK6 );
827		memory_install_read32_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x1f600000, 0x1f6fffff, 0, 0, SMH_BANK7 );
828		memory_install_read32_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x1f700000, 0x1f7fffff, 0, 0, SMH_BANK8 );
	821	memory_install_read32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x1f000000, 0x1f0fffff, 0, 0, (read32_space_func)SMH_BANK(1) );
	822	memory_install_read32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x1f100000, 0x1f1fffff, 0, 0, (read32_space_func)SMH_BANK(2) );
	823	memory_install_read32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x1f200000, 0x1f2fffff, 0, 0, (read32_space_func)SMH_BANK(3) );
	824	memory_install_read32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x1f300000, 0x1f3fffff, 0, 0, (read32_space_func)SMH_BANK(4) );
	825	memory_install_read32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x1f400000, 0x1f4fffff, 0, 0, (read32_space_func)SMH_BANK(5) );
	826	memory_install_read32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x1f500000, 0x1f5fffff, 0, 0, (read32_space_func)SMH_BANK(6) );
	827	memory_install_read32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x1f600000, 0x1f6fffff, 0, 0, (read32_space_func)SMH_BANK(7) );
	828	memory_install_read32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x1f700000, 0x1f7fffff, 0, 0, (read32_space_func)SMH_BANK(8) );
829	829
830	830	for( bank = 0; bank < 8; bank++ )
831	831	{
r4679	r4680
835	835
836	836	if( namcos11_config_table[ n_game ].n_daughterboard == 32 )
837	837	{
838		memory_install_write32_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x1fa10020, 0x1fa1002f, 0, 0, bankswitch_rom32_w );
	838	memory_install_write32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x1fa10020, 0x1fa1002f, 0, 0, bankswitch_rom32_w );
839	839	}
840	840	if( namcos11_config_table[ n_game ].n_daughterboard == 64 )
841	841	{
842	842	m_n_bankoffset = 0;
843		memory_install_write32_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x1f080000, 0x1f080003, 0, 0, bankswitch_rom64_upper_w );
844		memory_install_readwrite32_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x1fa10020, 0x1fa1002f, 0, 0, SMH_NOP, bankswitch_rom64_w );
	843	memory_install_write32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x1f080000, 0x1f080003, 0, 0, bankswitch_rom64_upper_w );
	844	memory_install_readwrite32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x1fa10020, 0x1fa1002f, 0, 0, (read32_space_func)SMH_NOP, bankswitch_rom64_w );
845	845	state_save_register_global(machine,  m_n_bankoffset );
846	846	}
847	847	}
848	848	else
849	849	{
850		memory_install_write32_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x1fa10020, 0x1fa1002f, 0, 0, SMH_NOP );
	850	memory_install_write32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x1fa10020, 0x1fa1002f, 0, 0, (write32_space_func)SMH_NOP );
851	851	}
852	852	break;
853	853	}
r4679	r4680
856	856
857	857	if( strcmp( machine->gamedrv->name, "ptblnk2a" ) == 0 )
858	858	{
859		memory_install_write32_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x1f788000, 0x1f788003, 0, 0, lightgun_w );
860		memory_install_read32_handler (cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x1f780000, 0x1f78000f, 0, 0, lightgun_r );
	859	memory_install_write32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x1f788000, 0x1f788003, 0, 0, lightgun_w );
	860	memory_install_read32_handler (cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x1f780000, 0x1f78000f, 0, 0, lightgun_r );
861	861	}
862	862
863	863	state_save_register_global(machine,  m_n_oldcoin );

src/mame/drivers/lethalj.c

r4679	r4680
161	161
162	162	static CUSTOM_INPUT( ticket_status )
163	163	{
164		const address_space *space = cpu_get_address_space(field->port->machine->cpu[0], ADDRESS_SPACE_PROGRAM);
	164	const address_space *space = cputag_get_address_space(field->port->machine, "maincpu", ADDRESS_SPACE_PROGRAM);
165	165	return ticket_dispenser_0_r(space, 0) >> 7;
166	166	}
167	167
r4679	r4680
907	907	static DRIVER_INIT( ripribit )
908	908	{
909	909	ticket_dispenser_init(machine, 200, TICKET_MOTOR_ACTIVE_HIGH, TICKET_STATUS_ACTIVE_HIGH);
910		memory_install_write16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x04100010, 0x0410001f, 0, 0, ripribit_control_w);
	910	memory_install_write16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x04100010, 0x0410001f, 0, 0, ripribit_control_w);
911	911	}
912	912
913	913
914	914	static DRIVER_INIT( cfarm )
915	915	{
916	916	ticket_dispenser_init(machine, 200, TICKET_MOTOR_ACTIVE_HIGH, TICKET_STATUS_ACTIVE_HIGH);
917		memory_install_write16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x04100010, 0x0410001f, 0, 0, cfarm_control_w);
	917	memory_install_write16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x04100010, 0x0410001f, 0, 0, cfarm_control_w);
918	918	}
919	919
920	920
921	921	static DRIVER_INIT( cclownz )
922	922	{
923	923	ticket_dispenser_init(machine, 200, TICKET_MOTOR_ACTIVE_HIGH, TICKET_STATUS_ACTIVE_HIGH);
924		memory_install_write16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x04100010, 0x0410001f, 0, 0, cclownz_control_w);
	924	memory_install_write16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x04100010, 0x0410001f, 0, 0, cclownz_control_w);
925	925	}
926	926
927	927

src/mame/drivers/dcon.c

r4679	r4680
33	33
34	34	/***************************************************************************/
35	35
36		static ADDRESS_MAP_START( readmem, ADDRESS_SPACE_PROGRAM, 16 )
37		AM_RANGE(0x00000, 0x7ffff) AM_READ(SMH_ROM)
38		AM_RANGE(0x80000, 0x8bfff) AM_READ(SMH_RAM)
39		AM_RANGE(0x8c000, 0x8c7ff) AM_READ(SMH_RAM)
40		AM_RANGE(0x8c800, 0x8cfff) AM_READ(SMH_RAM)
41		AM_RANGE(0x8d000, 0x8d7ff) AM_READ(SMH_RAM)
42		AM_RANGE(0x8d800, 0x8e7ff) AM_READ(SMH_RAM)
43		AM_RANGE(0x8e800, 0x8f7ff) AM_READ(SMH_RAM)
44		AM_RANGE(0x8f800, 0x8ffff) AM_READ(SMH_RAM)
45		AM_RANGE(0xa0000, 0xa000d) AM_READ(seibu_main_word_r)
46		AM_RANGE(0xc001c, 0xc001d) AM_READ(dcon_control_r)
47		AM_RANGE(0xe0000, 0xe0001) AM_READ_PORT("DSW")
48		AM_RANGE(0xe0002, 0xe0003) AM_READ_PORT("P1_P2")
49		AM_RANGE(0xe0004, 0xe0005) AM_READ_PORT("SYSTEM")
50		ADDRESS_MAP_END
	36	static ADDRESS_MAP_START( dcon_map, ADDRESS_SPACE_PROGRAM, 16 )
	37	AM_RANGE(0x00000, 0x7ffff) AM_ROM
	38	AM_RANGE(0x80000, 0x8bfff) AM_RAM
51	39
52		static ADDRESS_MAP_START( writemem, ADDRESS_SPACE_PROGRAM, 16 )
53		AM_RANGE(0x00000, 0x7ffff) AM_WRITE(SMH_ROM)
54		AM_RANGE(0x80000, 0x8bfff) AM_WRITE(SMH_RAM)
55		AM_RANGE(0x8c000, 0x8c7ff) AM_WRITE(dcon_background_w) AM_BASE(&dcon_back_data)
56		AM_RANGE(0x8c800, 0x8cfff) AM_WRITE(dcon_foreground_w) AM_BASE(&dcon_fore_data)
57		AM_RANGE(0x8d000, 0x8d7ff) AM_WRITE(dcon_midground_w) AM_BASE(&dcon_mid_data)
58		AM_RANGE(0x8d800, 0x8e7ff) AM_WRITE(dcon_text_w) AM_BASE(&dcon_textram)
59		AM_RANGE(0x8e800, 0x8f7ff) AM_WRITE(paletteram16_xBBBBBGGGGGRRRRR_word_w) AM_BASE(&paletteram16)
60		AM_RANGE(0x8f800, 0x8ffff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)
	40	AM_RANGE(0x8c000, 0x8c7ff) AM_RAM_WRITE(dcon_background_w) AM_BASE(&dcon_back_data)
	41	AM_RANGE(0x8c800, 0x8cfff) AM_RAM_WRITE(dcon_foreground_w) AM_BASE(&dcon_fore_data)
	42	AM_RANGE(0x8d000, 0x8d7ff) AM_RAM_WRITE(dcon_midground_w) AM_BASE(&dcon_mid_data)
	43	AM_RANGE(0x8d800, 0x8e7ff) AM_RAM_WRITE(dcon_text_w) AM_BASE(&dcon_textram)
	44	AM_RANGE(0x8e800, 0x8f7ff) AM_RAM_WRITE(paletteram16_xBBBBBGGGGGRRRRR_word_w) AM_BASE(&paletteram16)
	45	AM_RANGE(0x8f800, 0x8ffff) AM_RAM AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)
61	46	AM_RANGE(0x9d000, 0x9d7ff) AM_WRITE(dcon_gfxbank_w)
62		AM_RANGE(0xa0000, 0xa000d) AM_WRITE(seibu_main_word_w)
63		AM_RANGE(0xc001c, 0xc001d) AM_WRITE(dcon_control_w)
	47
	48	AM_RANGE(0xa0000, 0xa000d) AM_READWRITE(seibu_main_word_r, seibu_main_word_w)
	49	AM_RANGE(0xc001c, 0xc001d) AM_READWRITE(dcon_control_r, dcon_control_w)
64	50	AM_RANGE(0xc0020, 0xc002f) AM_WRITE(SMH_RAM) AM_BASE(&dcon_scroll_ram)
65	51	AM_RANGE(0xc0080, 0xc0081) AM_WRITENOP
66	52	AM_RANGE(0xc00c0, 0xc00c1) AM_WRITENOP
	53	AM_RANGE(0xe0000, 0xe0001) AM_READ_PORT("DSW")
	54	AM_RANGE(0xe0002, 0xe0003) AM_READ_PORT("P1_P2")
	55	AM_RANGE(0xe0004, 0xe0005) AM_READ_PORT("SYSTEM")
67	56	ADDRESS_MAP_END
68	57
69	58	/******************************************************************************/
r4679	r4680
271	260
272	261	/* basic machine hardware */
273	262	MDRV_CPU_ADD("maincpu", M68000, 10000000)
274		MDRV_CPU_PROGRAM_MAP(readmem,writemem)
	263	MDRV_CPU_PROGRAM_MAP(dcon_map,0)
275	264	MDRV_CPU_VBLANK_INT("screen", irq4_line_hold)
276	265
277	266	SEIBU_SOUND_SYSTEM_CPU(4000000) /* Perhaps 14318180/4? */
r4679	r4680
300	289
301	290	/* basic machine hardware */
302	291	MDRV_CPU_ADD("maincpu", M68000, 10000000)
303		MDRV_CPU_PROGRAM_MAP(readmem,writemem)
	292	MDRV_CPU_PROGRAM_MAP(dcon_map,0)
304	293	MDRV_CPU_VBLANK_INT("screen", irq4_line_hold)
305	294
306	295	SEIBU2_SOUND_SYSTEM_CPU(14318180/4)

src/mame/drivers/itech8.c

r4679	r4680
592	592
593	593	void itech8_update_interrupts(running_machine *machine, int periodic, int tms34061, int blitter)
594	594	{
595		cpu_type main_cpu_type = cpu_get_type(machine->cpu[0]);
	595	cpu_type main_cpu_type = cpu_get_type(cputag_get_cpu(machine, "maincpu"));
596	596
597	597	/* update the states */
598	598	if (periodic != -1) periodic_int = periodic;
r4679	r4680
603	603	if (main_cpu_type == CPU_M6809 || main_cpu_type == CPU_HD6309)
604	604	{
605	605	/* just modify lines that have changed */
606		if (periodic != -1) cpu_set_input_line(machine->cpu[0], INPUT_LINE_NMI, periodic ? ASSERT_LINE : CLEAR_LINE);
607		if (tms34061 != -1) cpu_set_input_line(machine->cpu[0], M6809_IRQ_LINE, tms34061 ? ASSERT_LINE : CLEAR_LINE);
608		if (blitter != -1) cpu_set_input_line(machine->cpu[0], M6809_FIRQ_LINE, blitter ? ASSERT_LINE : CLEAR_LINE);
	606	if (periodic != -1) cputag_set_input_line(machine, "maincpu", INPUT_LINE_NMI, periodic ? ASSERT_LINE : CLEAR_LINE);
	607	if (tms34061 != -1) cputag_set_input_line(machine, "maincpu", M6809_IRQ_LINE, tms34061 ? ASSERT_LINE : CLEAR_LINE);
	608	if (blitter != -1) cputag_set_input_line(machine, "maincpu", M6809_FIRQ_LINE, blitter ? ASSERT_LINE : CLEAR_LINE);
609	609	}
610	610
611	611	/* handle the 68000 case */
612	612	else
613	613	{
614		cpu_set_input_line(machine->cpu[0], 2, blitter_int ? ASSERT_LINE : CLEAR_LINE);
615		cpu_set_input_line(machine->cpu[0], 3, periodic_int ? ASSERT_LINE : CLEAR_LINE);
	614	cputag_set_input_line(machine, "maincpu", 2, blitter_int ? ASSERT_LINE : CLEAR_LINE);
	615	cputag_set_input_line(machine, "maincpu", 3, periodic_int ? ASSERT_LINE : CLEAR_LINE);
616	616	}
617	617	}
618	618
r4679	r4680
643	643	static WRITE8_HANDLER( itech8_nmi_ack_w )
644	644	{
645	645	/* doesn't seem to hold for every game (e.g., hstennis) */
646		/*  cpu_set_input_line(space->machine->cpu[0], INPUT_LINE_NMI, CLEAR_LINE);*/
	646	/*  cputag_set_input_line(space->machine, "maincpu", INPUT_LINE_NMI, CLEAR_LINE);*/
647	647	}
648	648
649	649
650	650	static void generate_sound_irq(const device_config *device, int state)
651	651	{
652		cpu_set_input_line(device->machine->cpu[1], M6809_FIRQ_LINE, state ? ASSERT_LINE : CLEAR_LINE);
	652	cputag_set_input_line(device->machine, "soundcpu", M6809_FIRQ_LINE, state ? ASSERT_LINE : CLEAR_LINE);
653	653	}
654	654
655	655
r4679	r4680
671	671
672	672	static MACHINE_RESET( itech8 )
673	673	{
674		cpu_type main_cpu_type = cpu_get_type(machine->cpu[0]);
	674	cpu_type main_cpu_type = cpu_get_type(cputag_get_cpu(machine, "maincpu"));
675	675
676	676	/* make sure bank 0 is selected */
677	677	if (main_cpu_type == CPU_M6809 || main_cpu_type == CPU_HD6309)
678	678	{
679	679	memory_set_bankptr(machine, 1, &memory_region(machine, "maincpu")[0x4000]);
680		device_reset(machine->cpu[0]);
	680	device_reset(cputag_get_cpu(machine, "maincpu"));
681	681	}
682	682
683	683	/* reset the ticket dispenser */
r4679	r4680
793	793	/* bit 6 controls the diagnostic sound LED */
794	794	/* bit 7 controls the ticket dispenser */
795	795	pia_portb_data = data;
796		ticket_dispenser_w(cpu_get_address_space(device->machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0, data & 0x80);
	796	ticket_dispenser_w(cputag_get_address_space(device->machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0, data & 0x80);
797	797	coin_counter_w(0, (data & 0x20) >> 5);
798	798	}
799	799
r4679	r4680
808	808	static TIMER_CALLBACK( delayed_sound_data_w )
809	809	{
810	810	sound_data = param;
811		cpu_set_input_line(machine->cpu[1], M6809_IRQ_LINE, ASSERT_LINE);
	811	cputag_set_input_line(machine, "soundcpu", M6809_IRQ_LINE, ASSERT_LINE);
812	812	}
813	813
814	814
r4679	r4680
831	831
832	832	static READ8_HANDLER( sound_data_r )
833	833	{
834		cpu_set_input_line(space->machine->cpu[1], M6809_IRQ_LINE, CLEAR_LINE);
	834	cputag_set_input_line(space->machine, "soundcpu", M6809_IRQ_LINE, CLEAR_LINE);
835	835	return sound_data;
836	836	}
837	837
r4679	r4680
1139	1139
1140	1140	static CUSTOM_INPUT( gtg_mux )
1141	1141	{
1142		const char *tag1 = param;
	1142	const char *tag1 = (const char *)param;
1143	1143	const char *tag2 = tag1 + strlen(tag1) + 1;
1144	1144	return input_port_read(field->port->machine, tag1) & input_port_read(field->port->machine, tag2);
1145	1145	}
r4679	r4680
2660	2660
2661	2661	static DRIVER_INIT( grmatch )
2662	2662	{
2663		memory_install_write8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x0160, 0x0160, 0, 0, grmatch_palette_w);
2664		memory_install_write8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x0180, 0x0180, 0, 0, grmatch_xscroll_w);
2665		memory_install_write8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x01e0, 0x01ff, 0, 0, SMH_UNMAP);
	2663	memory_install_write8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x0160, 0x0160, 0, 0, grmatch_palette_w);
	2664	memory_install_write8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x0180, 0x0180, 0, 0, grmatch_xscroll_w);
	2665	memory_install_write8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x01e0, 0x01ff, 0, 0, (write8_space_func)SMH_UNMAP);
2666	2666	}
2667	2667
2668	2668
2669	2669	static DRIVER_INIT( slikshot )
2670	2670	{
2671		memory_install_read8_handler (cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x0180, 0x0180, 0, 0, slikshot_z80_r);
2672		memory_install_read8_handler (cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x01cf, 0x01cf, 0, 0, slikshot_z80_control_r);
2673		memory_install_write8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x01cf, 0x01cf, 0, 0, slikshot_z80_control_w);
	2671	memory_install_read8_handler (cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x0180, 0x0180, 0, 0, slikshot_z80_r);
	2672	memory_install_read8_handler (cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x01cf, 0x01cf, 0, 0, slikshot_z80_control_r);
	2673	memory_install_write8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x01cf, 0x01cf, 0, 0, slikshot_z80_control_w);
2674	2674	}
2675	2675
2676	2676
2677	2677	static DRIVER_INIT( sstrike )
2678	2678	{
2679		memory_install_read8_handler (cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x1180, 0x1180, 0, 0, slikshot_z80_r);
2680		memory_install_read8_handler (cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x11cf, 0x11cf, 0, 0, slikshot_z80_control_r);
2681		memory_install_write8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x11cf, 0x11cf, 0, 0, slikshot_z80_control_w);
	2679	memory_install_read8_handler (cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x1180, 0x1180, 0, 0, slikshot_z80_r);
	2680	memory_install_read8_handler (cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x11cf, 0x11cf, 0, 0, slikshot_z80_control_r);
	2681	memory_install_write8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x11cf, 0x11cf, 0, 0, slikshot_z80_control_w);
2682	2682	}
2683	2683
2684	2684
r4679	r4680
2713	2713	static DRIVER_INIT( rimrockn )
2714	2714	{
2715	2715	/* additional input ports */
2716		memory_install_read_port_handler (cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x0161, 0x0161, 0, 0, "161");
2717		memory_install_read_port_handler (cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x0162, 0x0162, 0, 0, "162");
2718		memory_install_read_port_handler (cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x0163, 0x0163, 0, 0, "163");
2719		memory_install_read_port_handler (cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x0164, 0x0164, 0, 0, "164");
2720		memory_install_read_port_handler (cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x0165, 0x0165, 0, 0, "165");
	2716	memory_install_read_port_handler (cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x0161, 0x0161, 0, 0, "161");
	2717	memory_install_read_port_handler (cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x0162, 0x0162, 0, 0, "162");
	2718	memory_install_read_port_handler (cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x0163, 0x0163, 0, 0, "163");
	2719	memory_install_read_port_handler (cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x0164, 0x0164, 0, 0, "164");
	2720	memory_install_read_port_handler (cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x0165, 0x0165, 0, 0, "165");
2721	2721
2722	2722	/* different banking mechanism (disable the old one) */
2723		memory_install_write8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x01a0, 0x01a0, 0, 0, rimrockn_bank_w);
2724		memory_install_write8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x01c0, 0x01df, 0, 0, itech8_blitter_w);
	2723	memory_install_write8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x01a0, 0x01a0, 0, 0, rimrockn_bank_w);
	2724	memory_install_write8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x01c0, 0x01df, 0, 0, itech8_blitter_w);
2725	2725	}
2726	2726
2727	2727

src/mame/drivers/galaxian.c

r4679	r4680
842	842
843	843	static CUSTOM_INPUT( gmgalax_port_r )
844	844	{
845		const char *portname = param;
	845	const char *portname = (const char *)param;
846	846	if (gmgalax_selected_game != 0)
847	847	portname += strlen(portname) + 1;
848	848	return input_port_read(field->port->machine, portname);
r4679	r4680
2229	2229	{
2230	2230	UINT32 romlength = memory_region_length(machine, "gfx1");
2231	2231	UINT8 *rombase = memory_region(machine, "gfx1");
2232		UINT8 *scratch = malloc_or_die(romlength);
	2232	UINT8 *scratch = alloc_array_or_die(UINT8, romlength);
2233	2233	UINT32 offs;
2234	2234
2235	2235	memcpy(scratch, rombase, romlength);
r4679	r4680
2249	2249	{
2250	2250	UINT32 romlength = memory_region_length(machine, "gfx1");
2251	2251	UINT8 *rombase = memory_region(machine, "gfx1");
2252		UINT8 *scratch = malloc_or_die(romlength);
	2252	UINT8 *scratch = alloc_array_or_die(UINT8, romlength);
2253	2253	UINT32 offs;
2254	2254
2255	2255	memcpy(scratch, rombase, romlength);
r4679	r4680
2326	2326	{
2327	2327	const address_space *space = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM);
2328	2328
2329		memory_install_write8_handler(space, base + 0x0004, base + 0x0007, 0, 0x07f8, SMH_UNMAP);
2330		memory_install_write8_handler(space, base + 0x0800, base + 0x0807, 0, 0x07f8, SMH_UNMAP);
2331		memory_install_write8_handler(space, base + 0x1800, base + 0x1800, 0, 0x07ff, SMH_UNMAP);
	2329	memory_install_write8_handler(space, base + 0x0004, base + 0x0007, 0, 0x07f8, (write8_space_func)SMH_UNMAP);
	2330	memory_install_write8_handler(space, base + 0x0800, base + 0x0807, 0, 0x07f8, (write8_space_func)SMH_UNMAP);
	2331	memory_install_write8_handler(space, base + 0x1800, base + 0x1800, 0, 0x07ff, (write8_space_func)SMH_UNMAP);
2332	2332	}
2333	2333
2334	2334
r4679	r4680
2353	2353	DRIVER_INIT_CALL(galaxian);
2354	2354
2355	2355	/* ...but coin lockout disabled/disconnected */
2356		memory_install_write8_handler(space, 0x6002, 0x6002, 0, 0x7f8, SMH_UNMAP);
	2356	memory_install_write8_handler(space, 0x6002, 0x6002, 0, 0x7f8, (write8_space_func)SMH_UNMAP);
2357	2357	}
2358	2358
2359	2359
r4679	r4680
2365	2365	common_init(machine, scramble_draw_bullet, galaxian_draw_background, NULL, NULL);
2366	2366
2367	2367	/* coin lockout disabled */
2368		memory_install_write8_handler(space, 0x6002, 0x6002, 0, 0x7f8, SMH_UNMAP);
	2368	memory_install_write8_handler(space, 0x6002, 0x6002, 0, 0x7f8, (write8_space_func)SMH_UNMAP);
2369	2369	}
2370	2370
2371	2371
r4679	r4680
2377	2377	common_init(machine, galaxian_draw_bullet, galaxian_draw_background, gmgalax_extend_tile_info, gmgalax_extend_sprite_info);
2378	2378
2379	2379	/* ROM is banked */
2380		memory_install_read8_handler(space, 0x0000, 0x3fff, 0, 0, SMH_BANK1);
	2380	memory_install_read8_handler(space, 0x0000, 0x3fff, 0, 0, (read8_space_func)SMH_BANK(1));
2381	2381	memory_configure_bank(machine, 1, 0, 2, memory_region(machine, "maincpu") + 0x10000, 0x4000);
2382	2382
2383	2383	/* callback when the game select is toggled */
r4679	r4680
2418	2418	common_init(machine, galaxian_draw_bullet, frogger_draw_background, frogger_extend_tile_info, frogger_extend_sprite_info);
2419	2419
2420	2420	/* ...but needs a full 2k of RAM */
2421		memory_install_readwrite8_handler(space, 0x4000, 0x47ff, 0, 0, SMH_BANK1, SMH_BANK1);
2422		frogg_ram = auto_malloc(0x800);
	2421	memory_install_readwrite8_handler(space, 0x4000, 0x47ff, 0, 0, (read8_space_func)SMH_BANK(1), (write8_space_func)SMH_BANK(1));
	2422	frogg_ram = auto_alloc_array(machine, UINT8, 0x800);
2423	2423	memory_set_bankptr(machine, 1, frogg_ram);
2424	2424
2425	2425	state_save_register_global_pointer(machine, frogg_ram, 0x800);
r4679	r4680
2465	2465	static DRIVER_INIT( moonqsr )
2466	2466	{
2467	2467	const address_space *space = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM);
2468		UINT8 *decrypt = auto_malloc(0x8000);
	2468	UINT8 *decrypt = auto_alloc_array(machine, UINT8, 0x8000);
2469	2469
2470	2470	/* video extensions */
2471	2471	common_init(machine, galaxian_draw_bullet, galaxian_draw_background, moonqsr_extend_tile_info, moonqsr_extend_sprite_info);
r4679	r4680
2484	2484	DRIVER_INIT_CALL(galaxian);
2485	2485
2486	2486	/* ...but coin lockout disabled/disconnected */
2487		memory_install_write8_handler(space, 0x6002, 0x6002, 0, 0x7f8, SMH_UNMAP);
	2487	memory_install_write8_handler(space, 0x6002, 0x6002, 0, 0x7f8, (write8_space_func)SMH_UNMAP);
2488	2488
2489	2489	/* also shift the sprite clip offset */
2490	2490	galaxian_sprite_clip_start = 7;
r4679	r4680
2510	2510	common_init(machine, NULL, galaxian_draw_background, NULL, NULL);
2511	2511
2512	2512	/* make ROMs 2 & 3 swappable */
2513		memory_install_read8_handler(space, 0x2000, 0x2fff, 0, 0, SMH_BANK1);
2514		memory_install_read8_handler(space, 0x3000, 0x3fff, 0, 0, SMH_BANK2);
	2513	memory_install_read8_handler(space, 0x2000, 0x2fff, 0, 0, (read8_space_func)SMH_BANK(1));
	2514	memory_install_read8_handler(space, 0x3000, 0x3fff, 0, 0, (read8_space_func)SMH_BANK(2));
2515	2515	memory_configure_bank(machine, 1, 0, 2, memory_region(machine, "maincpu") + 0x2000, 0x1000);
2516	2516	memory_configure_bank(machine, 2, 0, 2, memory_region(machine, "maincpu") + 0x2000, 0x1000);
2517	2517
2518	2518	/* also re-install the fixed ROM area as a bank in order to inform the memory system that
2519	2519	the fixed area only extends to 0x1fff */
2520		memory_install_read8_handler(space, 0x0000, 0x1fff, 0, 0, SMH_BANK3);
	2520	memory_install_read8_handler(space, 0x0000, 0x1fff, 0, 0, (read8_space_func)SMH_BANK(3));
2521	2521	memory_set_bankptr(machine, 3, memory_region(machine, "maincpu") + 0x0000);
2522	2522
2523	2523	/* handler for doing the swaps */
r4679	r4680
2525	2525	zigzag_bankswap_w(space, 0, 0);
2526	2526
2527	2527	/* coin lockout disabled */
2528		memory_install_write8_handler(space, 0x6002, 0x6002, 0, 0x7f8, SMH_UNMAP);
	2528	memory_install_write8_handler(space, 0x6002, 0x6002, 0, 0x7f8, (write8_space_func)SMH_UNMAP);
2529	2529
2530	2530	/* remove the galaxian sound hardware */
2531	2531	unmap_galaxian_sound(machine, 0x6000);
r4679	r4680
2551	2551	common_init(machine, galaxian_draw_bullet, galaxian_draw_background, mooncrst_extend_tile_info, mooncrst_extend_sprite_info);
2552	2552
2553	2553	/* move the interrupt enable from $b000 to $b001 */
2554		memory_install_write8_handler(space, 0xb000, 0xb000, 0, 0x7f8, SMH_UNMAP);
	2554	memory_install_write8_handler(space, 0xb000, 0xb000, 0, 0x7f8, (write8_space_func)SMH_UNMAP);
2555	2555	memory_install_write8_handler(space, 0xb001, 0xb001, 0, 0x7f8, irq_enable_w);
2556	2556
2557	2557	/* attach the sound command handler */
r4679	r4680
2601	2601	common_init(machine, galaxian_draw_bullet, galaxian_draw_background, mooncrst_extend_tile_info, mooncrst_extend_sprite_info);
2602	2602
2603	2603	/* move the interrupt enable from $b000 to $b001 */
2604		memory_install_write8_handler(space, 0xb000, 0xb000, 0, 0x7f8, SMH_UNMAP);
	2604	memory_install_write8_handler(space, 0xb000, 0xb000, 0, 0x7f8, (write8_space_func)SMH_UNMAP);
2605	2605	memory_install_write8_handler(space, 0xb001, 0xb001, 0, 0x7f8, irq_enable_w);
2606	2606
2607	2607	/* attach the sound command handler */
r4679	r4680
2625	2625	memory_install_write8_handler(space, 0xa002, 0xa002, 0, 0x7f8, galaxian_gfxbank_w);
2626	2626
2627	2627	/* needs a full 2k of RAM */
2628		memory_install_readwrite8_handler(space, 0x8000, 0x87ff, 0, 0, SMH_BANK1, SMH_BANK1);
2629		memory_set_bankptr(machine, 1, auto_malloc(0x800));
	2628	memory_install_readwrite8_handler(space, 0x8000, 0x87ff, 0, 0, (read8_space_func)SMH_BANK(1), (write8_space_func)SMH_BANK(1));
	2629	memory_set_bankptr(machine, 1, auto_alloc_array(machine, UINT8, 0x800));
2630	2630
2631	2631	/* extend ROM */
2632		memory_install_read8_handler(space, 0x0000, 0x5fff, 0, 0, SMH_BANK2);
	2632	memory_install_read8_handler(space, 0x0000, 0x5fff, 0, 0, (read8_space_func)SMH_BANK(2));
2633	2633	memory_set_bankptr(machine, 2, memory_region(machine, "maincpu"));
2634	2634	}
2635	2635
r4679	r4680
2685	2685	common_init(machine, galaxian_draw_bullet, galaxian_draw_background, batman2_extend_tile_info, upper_extend_sprite_info);
2686	2686
2687	2687	/* move the interrupt enable from $b000 to $b001 */
2688		memory_install_write8_handler(space, 0xb000, 0xb000, 0, 0x7f8, SMH_UNMAP);
	2688	memory_install_write8_handler(space, 0xb000, 0xb000, 0, 0x7f8, (write8_space_func)SMH_UNMAP);
2689	2689	memory_install_write8_handler(space, 0xb001, 0xb001, 0, 0x7f8, irq_enable_w);
2690	2690
2691	2691	/* extra ROM */
2692		memory_install_read8_handler(space, 0x5000, 0x67ff, 0, 0, SMH_BANK1);
	2692	memory_install_read8_handler(space, 0x5000, 0x67ff, 0, 0, (read8_space_func)SMH_BANK(1));
2693	2693	memory_set_bankptr(machine, 1, memory_region(machine, "maincpu") + 0x5000);
2694	2694
2695	2695	/* install RAM at $4000-$4800 */
2696		memory_install_readwrite8_handler(space, 0x4000, 0x47ff, 0, 0, SMH_BANK2, SMH_BANK2);
2697		memory_set_bankptr(machine, 2, auto_malloc(0x800));
	2696	memory_install_readwrite8_handler(space, 0x4000, 0x47ff, 0, 0, (read8_space_func)SMH_BANK(2), (write8_space_func)SMH_BANK(2));
	2697	memory_set_bankptr(machine, 2, auto_alloc_array(machine, UINT8, 0x800));
2698	2698
2699	2699	/* doesn't appear to use original RAM */
2700		memory_install_readwrite8_handler(space, 0x8000, 0x87ff, 0, 0, SMH_UNMAP, SMH_UNMAP);
	2700	memory_install_readwrite8_handler(space, 0x8000, 0x87ff, 0, 0, (read8_space_func)SMH_UNMAP, (write8_space_func)SMH_UNMAP);
2701	2701	}
2702	2702
2703	2703
r4679	r4680
2716	2716	common_init(machine, theend_draw_bullet, galaxian_draw_background, NULL, NULL);
2717	2717
2718	2718	/* coin counter on the upper bit of port C */
2719		memory_install_write8_handler(space, 0x6802, 0x6802, 0, 0x7f8, SMH_UNMAP);
	2719	memory_install_write8_handler(space, 0x6802, 0x6802, 0, 0x7f8, (write8_space_func)SMH_UNMAP);
2720	2720	}
2721	2721
2722	2722
r4679	r4680
2738	2738	memory_install_write8_handler(space, 0x7000, 0x7000, 0, 0x7ff, watchdog_reset_w);
2739	2739
2740	2740	/* I/O appears to be direct, not via PPIs */
2741		memory_install_readwrite8_handler(space, 0x8000, 0xffff, 0, 0, SMH_UNMAP, SMH_UNMAP);
	2741	memory_install_readwrite8_handler(space, 0x8000, 0xffff, 0, 0, (read8_space_func)SMH_UNMAP, (write8_space_func)SMH_UNMAP);
2742	2742	memory_install_read_port_handler(space, 0x8000, 0x8000, 0, 0xffc, "IN0");
2743	2743	memory_install_read_port_handler(space, 0x8001, 0x8001, 0, 0xffc, "IN1");
2744	2744	memory_install_read_port_handler(space, 0x8002, 0x8002, 0, 0xffc, "IN2");
r4679	r4680
2755	2755	galaxian_sfx_tilemap = TRUE;
2756	2756
2757	2757	/* sound board has space for extra ROM */
2758		memory_install_read8_handler(cpu_get_address_space(machine->cpu[1], ADDRESS_SPACE_PROGRAM), 0x0000, 0x3fff, 0, 0, SMH_BANK1);
	2758	memory_install_read8_handler(cpu_get_address_space(machine->cpu[1], ADDRESS_SPACE_PROGRAM), 0x0000, 0x3fff, 0, 0, (read8_space_func)SMH_BANK(1));
2759	2759	memory_set_bankptr(machine, 1, memory_region(machine, "audiocpu"));
2760	2760	}
2761	2761
r4679	r4680
2768	2768	common_init(machine, scramble_draw_bullet, scramble_draw_background, NULL, NULL);
2769	2769
2770	2770	/* watchdog is at $7800? (or is it just disabled?) */
2771		memory_install_read8_handler(space, 0x7000, 0x7000, 0, 0x7ff, SMH_UNMAP);
	2771	memory_install_read8_handler(space, 0x7000, 0x7000, 0, 0x7ff, (read8_space_func)SMH_UNMAP);
2772	2772	memory_install_read8_handler(space, 0x7800, 0x7800, 0, 0x7ff, watchdog_reset_r);
2773	2773	}
2774	2774
r4679	r4680
2813	2813	memory_install_write8_handler(space, 0xb001, 0xb001, 0, 0x7f8, froggrmc_sound_control_w);
2814	2814
2815	2815	/* actually needs 2k of RAM */
2816		memory_install_readwrite8_handler(space, 0x8000, 0x87ff, 0, 0, SMH_BANK1, SMH_BANK1);
2817		frogg_ram = auto_malloc(0x800);
	2816	memory_install_readwrite8_handler(space, 0x8000, 0x87ff, 0, 0, (read8_space_func)SMH_BANK(1), (write8_space_func)SMH_BANK(1));
	2817	frogg_ram = auto_alloc_array(machine, UINT8, 0x800);
2818	2818	memory_set_bankptr(machine, 1, frogg_ram);
2819	2819
2820	2820	state_save_register_global_pointer(machine, frogg_ram, 0x800);
r4679	r4680
2861	2861	memory_install_readwrite8_handler(cpu_get_address_space(machine->cpu[1], ADDRESS_SPACE_IO), 0x00, 0xff, 0, 0, scorpion_ay8910_r, scorpion_ay8910_w);
2862	2862
2863	2863	/* extra ROM */
2864		memory_install_read8_handler(space, 0x5800, 0x67ff, 0, 0, SMH_BANK1);
	2864	memory_install_read8_handler(space, 0x5800, 0x67ff, 0, 0, (read8_space_func)SMH_BANK(1));
2865	2865	memory_set_bankptr(machine, 1, memory_region(machine, "maincpu") + 0x5800);
2866	2866
2867	2867	/* no background related */
2868		//  memory_install_write8_handler(space, 0x6803, 0x6803, 0, 0, SMH_NOP);
	2868	//  memory_install_write8_handler(space, 0x6803, 0x6803, 0, 0, (write8_space_func)SMH_NOP);
2869	2869
2870	2870	memory_install_read8_handler(cpu_get_address_space(machine->cpu[1], ADDRESS_SPACE_PROGRAM), 0x3000, 0x3000, 0, 0, scorpion_digitalker_intr_r);
2871	2871	/*

src/mame/drivers/othldrby.c

r4679	r4680
94	94
95	95
96	96
97		static ADDRESS_MAP_START( readmem, ADDRESS_SPACE_PROGRAM, 16 )
98		AM_RANGE(0x000000, 0x07ffff) AM_READ(SMH_ROM)
99		AM_RANGE(0x100000, 0x10ffff) AM_READ(SMH_RAM)
100		AM_RANGE(0x200000, 0x20000f) AM_READ(calendar_r)
101		AM_RANGE(0x300004, 0x300007) AM_READ(othldrby_videoram_r)
	97	static ADDRESS_MAP_START( othldrby_map, ADDRESS_SPACE_PROGRAM, 16 )
	98	AM_RANGE(0x000000, 0x07ffff) AM_ROM
	99	AM_RANGE(0x100000, 0x10ffff) AM_RAM
	100	AM_RANGE(0x200000, 0x20000f) AM_READWRITE(calendar_r,calendar_w)
	101	AM_RANGE(0x300000, 0x300001) AM_WRITE(othldrby_videoram_addr_w)
	102	AM_RANGE(0x300004, 0x300007) AM_READWRITE(othldrby_videoram_r,othldrby_videoram_w)
	103	AM_RANGE(0x300008, 0x300009) AM_WRITE(othldrby_vreg_addr_w)
102	104	AM_RANGE(0x30000c, 0x30000d) AM_READ(pip)   // vblank?
103		AM_RANGE(0x400000, 0x400fff) AM_READ(SMH_RAM)
104		AM_RANGE(0x600000, 0x600001) AM_DEVREAD8("oki", okim6295_r, 0x00ff)
	105	AM_RANGE(0x30000c, 0x30000f) AM_WRITE(othldrby_vreg_w)
	106	AM_RANGE(0x400000, 0x400fff) AM_RAM_WRITE(paletteram16_xBBBBBGGGGGRRRRR_word_w) AM_BASE(&paletteram16)
	107	AM_RANGE(0x600000, 0x600001) AM_DEVREADWRITE8("oki", okim6295_r,okim6295_w, 0x00ff)
105	108	AM_RANGE(0x700000, 0x700001) AM_READ(pap)   // scanline???
106	109	AM_RANGE(0x700004, 0x700005) AM_READ_PORT("DSW1")
107	110	AM_RANGE(0x700008, 0x700009) AM_READ_PORT("DSW2")
108	111	AM_RANGE(0x70000c, 0x70000d) AM_READ_PORT("P1")
109	112	AM_RANGE(0x700010, 0x700011) AM_READ_PORT("P2")
110	113	AM_RANGE(0x70001c, 0x70001d) AM_READ_PORT("SYSTEM")
111		ADDRESS_MAP_END
112
113		static ADDRESS_MAP_START( writemem, ADDRESS_SPACE_PROGRAM, 16 )
114		AM_RANGE(0x000000, 0x07ffff) AM_WRITE(SMH_ROM)
115		AM_RANGE(0x100000, 0x10ffff) AM_WRITE(SMH_RAM)
116		AM_RANGE(0x200000, 0x20000f) AM_WRITE(calendar_w)
117		AM_RANGE(0x300000, 0x300001) AM_WRITE(othldrby_videoram_addr_w)
118		AM_RANGE(0x300004, 0x300007) AM_WRITE(othldrby_videoram_w)
119		AM_RANGE(0x300008, 0x300009) AM_WRITE(othldrby_vreg_addr_w)
120		AM_RANGE(0x30000c, 0x30000f) AM_WRITE(othldrby_vreg_w)
121		AM_RANGE(0x400000, 0x400fff) AM_WRITE(paletteram16_xBBBBBGGGGGRRRRR_word_w) AM_BASE(&paletteram16)
122		AM_RANGE(0x600000, 0x600001) AM_DEVWRITE8("oki", okim6295_w, 0x00ff)
123	114	AM_RANGE(0x700030, 0x700031) AM_DEVWRITE("oki", oki_bankswitch_w)
124	115	AM_RANGE(0x700034, 0x700035) AM_WRITE(coinctrl_w)
125	116	ADDRESS_MAP_END
126	117
127	118
128
129	119	static INPUT_PORTS_START( othldrby )
130	120	PORT_START("DSW1")
131	121	PORT_DIPNAME( 0x01, 0x00, DEF_STR( Demo_Sounds ) )
r4679	r4680
242	232
243	233	/* basic machine hardware */
244	234	MDRV_CPU_ADD("maincpu", M68000, 16000000)
245		MDRV_CPU_PROGRAM_MAP(readmem,writemem)
	235	MDRV_CPU_PROGRAM_MAP(othldrby_map,0)
246	236	MDRV_CPU_VBLANK_INT("screen", irq4_line_hold)
247	237
248	238	/* video hardware */

src/mame/drivers/bbusters.c

r4679	r4680
264	264	if (ACCESSING_BITS_0_7)
265	265	{
266	266	soundlatch_w(space, 0, data&0xff);
267		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_NMI, PULSE_LINE);
	267	cputag_set_input_line(space->machine, "audiocpu", INPUT_LINE_NMI, PULSE_LINE);
268	268	}
269	269	}
270	270
r4679	r4680
636	636
637	637	static void sound_irq( const device_config *device, int irq )
638	638	{
639		cpu_set_input_line(device->machine->cpu[1],0,irq ? ASSERT_LINE : CLEAR_LINE);
	639	cputag_set_input_line(device->machine, "audiocpu", 0, irq ? ASSERT_LINE : CLEAR_LINE);
640	640	}
641	641
642	642	static const ym2608_interface ym2608_config =
r4679	r4680
692	692
693	693	static VIDEO_EOF( bbuster )
694	694	{
695		const address_space *space = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM);
	695	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
696	696
697	697	buffer_spriteram16_w(space,0,0,0xffff);
698	698	buffer_spriteram16_2_w(space,0,0,0xffff);
r4679	r4680
700	700
701	701	static VIDEO_EOF( mechatt )
702	702	{
703		const address_space *space = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM);
	703	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
704	704	buffer_spriteram16_w(space,0,0,0xffff);
705	705	}
706	706

src/mame/drivers/gstriker.c

r4679	r4680
202	202	if (ACCESSING_BITS_0_7)
203	203	{
204	204	pending_command = 1;
205		soundlatch_w(space,offset,data & 0xff);
206		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_NMI, PULSE_LINE);
	205	soundlatch_w(space, offset, data & 0xff);
	206	cputag_set_input_line(space->machine, "audiocpu", INPUT_LINE_NMI, PULSE_LINE);
207	207	}
208	208	}
209	209
r4679	r4680
270	270	static void gs_ym2610_irq(const device_config *device, int irq)
271	271	{
272	272	if (irq)
273		cpu_set_input_line(device->machine->cpu[1], 0, ASSERT_LINE);
	273	cputag_set_input_line(device->machine, "audiocpu", 0, ASSERT_LINE);
274	274	else
275		cpu_set_input_line(device->machine->cpu[1], 0, CLEAR_LINE);
	275	cputag_set_input_line(device->machine, "audiocpu", 0, CLEAR_LINE);
276	276	}
277	277
278	278	static const ym2610_interface ym2610_config =
r4679	r4680
286	286	UINT16 *gstriker_lineram;
287	287
288	288
289		static ADDRESS_MAP_START( readmem, ADDRESS_SPACE_PROGRAM, 16 )
290		AM_RANGE(0x000000, 0x0fffff) AM_READ(SMH_ROM)
291		AM_RANGE(0x100000, 0x103fff) AM_READ(SMH_RAM)
292		AM_RANGE(0x140000, 0x141fff) AM_READ(SMH_RAM)
293		AM_RANGE(0x180000, 0x181fff) AM_READ(SMH_RAM)
294		AM_RANGE(0x1c0000, 0x1c0fff) AM_READ(SMH_RAM)
295		AM_RANGE(0xffc000, 0xffffff) AM_READ(SMH_RAM)
	289	static ADDRESS_MAP_START( gstriker_map, ADDRESS_SPACE_PROGRAM, 16 )
	290	AM_RANGE(0x000000, 0x0fffff) AM_ROM
	291	AM_RANGE(0x100000, 0x103fff) AM_RAM_WRITE(MB60553_0_vram_w) AM_BASE(&MB60553_0_vram)
	292	AM_RANGE(0x140000, 0x141fff) AM_RAM AM_BASE(&CG10103_0_vram)
	293	AM_RANGE(0x180000, 0x180fff) AM_RAM_WRITE(VS920A_0_vram_w) AM_BASE(&VS920A_0_vram)
	294	AM_RANGE(0x181000, 0x181fff) AM_RAM AM_BASE(&gstriker_lineram)
	295	AM_RANGE(0x1c0000, 0x1c0fff) AM_RAM_WRITE(paletteram16_xRRRRRGGGGGBBBBB_word_w) AM_BASE(&paletteram16)
296	296
297		AM_RANGE(0x200000, 0x20007f) AM_READ(SMH_RAM)
	297	AM_RANGE(0x200000, 0x20000f) AM_RAM_WRITE(MB60553_0_regs_w)
	298	AM_RANGE(0x200040, 0x20005f) AM_RAM_WRITE(SMH_RAM) AM_BASE(&gs_mixer_regs)
	299	AM_RANGE(0x200060, 0x20007f) AM_READ(SMH_RAM)
298	300	AM_RANGE(0x200080, 0x200081) AM_READ_PORT("P1")
299	301	AM_RANGE(0x200082, 0x200083) AM_READ_PORT("P2")
300	302	AM_RANGE(0x200084, 0x200085) AM_READ_PORT("SYSTEM")
301	303	AM_RANGE(0x200086, 0x200087) AM_READ_PORT("DSW1")
302	304	AM_RANGE(0x200088, 0x200089) AM_READ_PORT("DSW2")
303	305	AM_RANGE(0x20008e, 0x20008f) AM_READ(dmmy_8f)
304		ADDRESS_MAP_END
305
306		static ADDRESS_MAP_START( writemem, ADDRESS_SPACE_PROGRAM, 16 )
307		AM_RANGE(0x000000, 0x0fffff) AM_WRITE(SMH_ROM)
308		AM_RANGE(0x100000, 0x103fff) AM_WRITE(MB60553_0_vram_w) AM_BASE(&MB60553_0_vram)
309		AM_RANGE(0x140000, 0x141fff) AM_WRITE(SMH_RAM) AM_BASE(&CG10103_0_vram)
310		AM_RANGE(0x180000, 0x180fff) AM_WRITE(VS920A_0_vram_w) AM_BASE(&VS920A_0_vram)
311		AM_RANGE(0x181000, 0x181fff) AM_WRITE(SMH_RAM) AM_BASE(&gstriker_lineram)
312		AM_RANGE(0x1c0000, 0x1c0fff) AM_WRITE(paletteram16_xRRRRRGGGGGBBBBB_word_w) AM_BASE(&paletteram16)
313		AM_RANGE(0x200000, 0x20000f) AM_WRITE(MB60553_0_regs_w)
314		AM_RANGE(0x200040, 0x20005f) AM_WRITE(SMH_RAM) AM_BASE(&gs_mixer_regs)
315	306	AM_RANGE(0x2000a0, 0x2000a1) AM_WRITE(sound_command_w)
316		AM_RANGE(0xffc000, 0xffffff) AM_WRITE(SMH_RAM) AM_BASE(&work_ram)
317		ADDRESS_MAP_END
318	307
319		static ADDRESS_MAP_START( sound_readmem, ADDRESS_SPACE_PROGRAM, 8 )
320		AM_RANGE(0x0000, 0x77ff) AM_READ(SMH_ROM)
321		AM_RANGE(0x7800, 0x7fff) AM_READ(SMH_RAM)
322		AM_RANGE(0x8000, 0xffff) AM_READ(SMH_BANK1)
	308	AM_RANGE(0xffc000, 0xffffff) AM_RAM AM_BASE(&work_ram)
323	309	ADDRESS_MAP_END
324	310
325		static ADDRESS_MAP_START( sound_writemem, ADDRESS_SPACE_PROGRAM, 8 )
326		AM_RANGE(0x0000, 0x77ff) AM_WRITE(SMH_ROM)
327		AM_RANGE(0x7800, 0x7fff) AM_WRITE(SMH_RAM)
328		AM_RANGE(0x8000, 0xffff) AM_WRITE(SMH_ROM)
	311	static ADDRESS_MAP_START( sound_map, ADDRESS_SPACE_PROGRAM, 8 )
	312	AM_RANGE(0x0000, 0x77ff) AM_ROM
	313	AM_RANGE(0x7800, 0x7fff) AM_RAM
	314	AM_RANGE(0x8000, 0xffff) AM_ROMBANK(1)
329	315	ADDRESS_MAP_END
330	316
331	317	static ADDRESS_MAP_START( sound_io_map, ADDRESS_SPACE_IO, 8 )
r4679	r4680
565	551
566	552	static MACHINE_DRIVER_START( gstriker )
567	553	MDRV_CPU_ADD("maincpu", M68000, 10000000)
568		MDRV_CPU_PROGRAM_MAP(readmem,writemem)
	554	MDRV_CPU_PROGRAM_MAP(gstriker_map,0)
569	555	MDRV_CPU_VBLANK_INT("screen", irq1_line_hold)
570	556
571	557	MDRV_CPU_ADD("audiocpu", Z80,8000000/2)   /* 4 MHz ??? */
572		MDRV_CPU_PROGRAM_MAP(sound_readmem,sound_writemem)
	558	MDRV_CPU_PROGRAM_MAP(sound_map,0)
573	559	MDRV_CPU_IO_MAP(sound_io_map,0)
574	560
575	561	MDRV_VIDEO_ATTRIBUTES(VIDEO_UPDATE_AFTER_VBLANK)
r4679	r4680
609	595	MDRV_CPU_VBLANK_INT("screen", irq1_line_hold)
610	596
611	597	MDRV_CPU_ADD("audiocpu", Z80,8000000/2)   /* 4 MHz ??? */
612		MDRV_CPU_PROGRAM_MAP(sound_readmem,sound_writemem)
	598	MDRV_CPU_PROGRAM_MAP(sound_map,0)
613	599	MDRV_CPU_IO_MAP(sound_io_map,0)
614	600
615	601	MDRV_VIDEO_ATTRIBUTES(VIDEO_UPDATE_AFTER_VBLANK)
r4679	r4680
989	975	pending_command = 0;
990	976	mcu_data = 0;
991	977
992		memory_install_write16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x20008a, 0x20008b, 0, 0, twrldc94_mcu_w);
993		memory_install_read16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x20008a, 0x20008b, 0, 0, twrldc94_mcu_r);
	978	memory_install_write16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x20008a, 0x20008b, 0, 0, twrldc94_mcu_w);
	979	memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x20008a, 0x20008b, 0, 0, twrldc94_mcu_r);
994	980
995		memory_install_write16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x20008e, 0x20008f, 0, 0, twrldc94_prot_reg_w);
996		memory_install_read16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x20008e, 0x20008f, 0, 0, twrldc94_prot_reg_r);
	981	memory_install_write16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x20008e, 0x20008f, 0, 0, twrldc94_prot_reg_w);
	982	memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x20008e, 0x20008f, 0, 0, twrldc94_prot_reg_r);
997	983	}
998	984
999	985	static DRIVER_INIT( twrldc94 )
r4679	r4680
1013	999	gametype = 3;
1014	1000	mcu_init( machine );
1015	1001
1016		memory_install_write16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x200090, 0x200091, 0, 0, vbl_toggle_w); // vblank toggle
1017		memory_install_read16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x200090, 0x200091, 0, 0, vbl_toggle_r);
	1002	memory_install_write16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x200090, 0x200091, 0, 0, vbl_toggle_w); // vblank toggle
	1003	memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x200090, 0x200091, 0, 0, vbl_toggle_r);
1018	1004	}
1019	1005
1020	1006	/*** GAME DRIVERS ************************************************************/
r4679	r4680
1026	1012	GAME( 1994, vgoalsca, vgoalsoc, vgoal,    vgoalsoc, vgoalsoc,   ROT0, "Tecmo", "V Goal Soccer (set 2)", GAME_NOT_WORKING )
1027	1013	GAME( 1994, twrldc94, 0,        twrldc94, twrldc94, twrldc94,   ROT0, "Tecmo", "Tecmo World Cup '94 (set 1)", GAME_NOT_WORKING | GAME_UNEMULATED_PROTECTION | GAME_IMPERFECT_GRAPHICS )
1028	1014	GAME( 1994, twrdc94a, twrldc94, twrldc94, twrldc94, twrldc94a,  ROT0, "Tecmo", "Tecmo World Cup '94 (set 2)", GAME_NOT_WORKING | GAME_UNEMULATED_PROTECTION | GAME_IMPERFECT_GRAPHICS )
1029

src/mame/drivers/snk.c

r4679	r4680
279	279
280	280	READ8_HANDLER ( snk_cpuA_nmi_trigger_r )
281	281	{
282		cpu_set_input_line(space->machine->cpu[0], INPUT_LINE_NMI, ASSERT_LINE);
	282	cputag_set_input_line(space->machine, "maincpu", INPUT_LINE_NMI, ASSERT_LINE);
283	283	return 0xff;
284	284	}
285	285
286	286	WRITE8_HANDLER( snk_cpuA_nmi_ack_w )
287	287	{
288		cpu_set_input_line(space->machine->cpu[0], INPUT_LINE_NMI, CLEAR_LINE);
	288	cputag_set_input_line(space->machine, "maincpu", INPUT_LINE_NMI, CLEAR_LINE);
289	289	}
290	290
291	291	READ8_HANDLER ( snk_cpuB_nmi_trigger_r )
292	292	{
293		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_NMI, ASSERT_LINE);
	293	cputag_set_input_line(space->machine, "sub", INPUT_LINE_NMI, ASSERT_LINE);
294	294	return 0xff;
295	295	}
296	296
297	297	WRITE8_HANDLER( snk_cpuB_nmi_ack_w )
298	298	{
299		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_NMI, CLEAR_LINE);
	299	cputag_set_input_line(space->machine, "sub", INPUT_LINE_NMI, CLEAR_LINE);
300	300	}
301	301
302	302	/*********************************************************************/
r4679	r4680
318	318	{
319	319	marvins_sound_busy_flag = 1;
320	320	soundlatch_w(space, offset, data);
321		cpu_set_input_line(space->machine->cpu[2], 0, HOLD_LINE);
	321	cputag_set_input_line(space->machine, "audiocpu", 0, HOLD_LINE);
322	322	}
323	323
324	324	static READ8_HANDLER( marvins_soundlatch_r )
325	325	{
326	326	marvins_sound_busy_flag = 0;
327		return soundlatch_r(space,0);
	327	return soundlatch_r(space, 0);
328	328	}
329	329
330	330	static CUSTOM_INPUT( marvins_sound_busy )
r4679	r4680
334	334
335	335	static READ8_HANDLER( marvins_sound_nmi_ack_r )
336	336	{
337		cpu_set_input_line(space->machine->cpu[2], INPUT_LINE_NMI, CLEAR_LINE);
	337	cputag_set_input_line(space->machine, "audiocpu", INPUT_LINE_NMI, CLEAR_LINE);
338	338	return 0xff;
339	339	}
340	340
r4679	r4680
357	357	break;
358	358	}
359	359
360		cpu_set_input_line(machine->cpu[2], INPUT_LINE_NMI, (sound_status & 0x8) ? ASSERT_LINE : CLEAR_LINE);
	360	cputag_set_input_line(machine, "audiocpu", INPUT_LINE_NMI, (sound_status & 0x8) ? ASSERT_LINE : CLEAR_LINE);
361	361	}
362	362
363	363
r4679	r4680
381	381
382	382	static READ8_HANDLER( sgladiat_sound_irq_ack_r )
383	383	{
384		cpu_set_input_line(space->machine->cpu[2], 0, CLEAR_LINE);
	384	cputag_set_input_line(space->machine, "audiocpu", 0, CLEAR_LINE);
385	385	return 0xff;
386	386	}
387	387
r4679	r4680
442	442	break;
443	443	}
444	444
445		cpu_set_input_line(machine->cpu[2], 0, (sound_status & 0xb) ? ASSERT_LINE : CLEAR_LINE);
	445	cputag_set_input_line(machine, "audiocpu", 0, (sound_status & 0xb) ? ASSERT_LINE : CLEAR_LINE);
446	446	}
447	447
448	448
r4679	r4680
6161	6161	static DRIVER_INIT( countryc )
6162	6162	{
6163	6163	// replace coin counter with trackball select
6164		memory_install_write8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xc300, 0xc300, 0, 0, countryc_trackball_w);
	6164	memory_install_write8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xc300, 0xc300, 0, 0, countryc_trackball_w);
6165	6165	}
6166	6166
6167	6167

src/mame/drivers/hyprduel.c

r4679	r4680
61	61	{
62	62	int irq = requested_int & ~*hyprduel_irq_enable;
63	63
64		cpu_set_input_line(machine->cpu[0], 3, (irq & int_num) ? ASSERT_LINE : CLEAR_LINE);
	64	cputag_set_input_line(machine, "maincpu", 3, (irq & int_num) ? ASSERT_LINE : CLEAR_LINE);
65	65	}
66	66
67	67	static TIMER_CALLBACK( vblank_end_callback )
r4679	r4680
115	115	case 0x01:
116	116	if (!subcpu_resetline)
117	117	{
118		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_RESET, ASSERT_LINE);
	118	cputag_set_input_line(space->machine, "sub", INPUT_LINE_RESET, ASSERT_LINE);
119	119	subcpu_resetline = 1;
120	120	}
121	121	break;
r4679	r4680
123	123	case 0x00:
124	124	if (subcpu_resetline)
125	125	{
126		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_RESET, CLEAR_LINE);
	126	cputag_set_input_line(space->machine, "sub", INPUT_LINE_RESET, CLEAR_LINE);
127	127	subcpu_resetline = 0;
128	128	}
129	129	cpu_spinuntil_int(space->cpu);
r4679	r4680
131	131
132	132	case 0x0c:
133	133	case 0x80:
134		cpu_set_input_line(space->machine->cpu[1], 2, HOLD_LINE);
	134	cputag_set_input_line(space->machine, "sub", 2, HOLD_LINE);
135	135	break;
136	136	}
137	137	}
r4679	r4680
193	193
194	194	static TIMER_CALLBACK( magerror_irq_callback )
195	195	{
196		cpu_set_input_line(machine->cpu[1], 1, HOLD_LINE);
	196	cputag_set_input_line(machine, "sub", 1, HOLD_LINE);
197	197	}
198	198
199	199	/***************************************************************************
r4679	r4680
669	669
670	670	static void sound_irq(const device_config *device, int state)
671	671	{
672		cpu_set_input_line(device->machine->cpu[1], 1, HOLD_LINE);
	672	cputag_set_input_line(device->machine, "sub", 1, HOLD_LINE);
673	673	}
674	674
675	675	static const ym2151_interface ym2151_config =
r4679	r4680
684	684	static MACHINE_RESET( hyprduel )
685	685	{
686	686	/* start with cpu2 halted */
687		cpu_set_input_line(machine->cpu[1], INPUT_LINE_RESET, ASSERT_LINE);
	687	cputag_set_input_line(machine, "sub", INPUT_LINE_RESET, ASSERT_LINE);
688	688	subcpu_resetline = 1;
689	689	cpu_trigger = 0;
690	690
r4679	r4680
849	849	savestate(machine);
850	850
851	851	/* cpu synchronization (severe timings) */
852		memory_install_write16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xc0040e, 0xc00411, 0, 0, hyprduel_cpusync_trigger1_w);
853		memory_install_read16_handler(cpu_get_address_space(machine->cpu[1], ADDRESS_SPACE_PROGRAM), 0xc00408, 0xc00409, 0, 0, hyprduel_cpusync_trigger1_r);
854		memory_install_write16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xc00408, 0xc00409, 0, 0, hyprduel_cpusync_trigger2_w);
855		memory_install_read16_handler(cpu_get_address_space(machine->cpu[1], ADDRESS_SPACE_PROGRAM), 0xfff34c, 0xfff34d, 0, 0, hyprduel_cpusync_trigger2_r);
	852	memory_install_write16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xc0040e, 0xc00411, 0, 0, hyprduel_cpusync_trigger1_w);
	853	memory_install_read16_handler(cputag_get_address_space(machine, "sub", ADDRESS_SPACE_PROGRAM), 0xc00408, 0xc00409, 0, 0, hyprduel_cpusync_trigger1_r);
	854	memory_install_write16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xc00408, 0xc00409, 0, 0, hyprduel_cpusync_trigger2_w);
	855	memory_install_read16_handler(cputag_get_address_space(machine, "sub", ADDRESS_SPACE_PROGRAM), 0xfff34c, 0xfff34d, 0, 0, hyprduel_cpusync_trigger2_r);
856	856	}
857	857
858	858	static DRIVER_INIT( magerror )

src/mame/drivers/highvdeo.c

r4679	r4680
1142	1142
1143	1143	static DRIVER_INIT( ciclone )
1144	1144	{
1145		memory_install_read16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_IO), 0x0030, 0x0033, 0, 0, ciclone_status_r );
	1145	memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_IO), 0x0030, 0x0033, 0, 0, ciclone_status_r );
1146	1146	}
1147	1147
1148	1148	/*
r4679	r4680
1212	1212
1213	1213	static DRIVER_INIT( fashion )
1214	1214	{
1215		memory_install_write16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_IO), 0x0002, 0x0003, 0, 0, fashion_output_w );
	1215	memory_install_write16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_IO), 0x0002, 0x0003, 0, 0, fashion_output_w );
1216	1216	}
1217	1217
1218	1218	GAMEL( 2000, tour4000,  0,      tv_vcf,   tv_vcf,   0,       ROT0,  "High Video", "Tour 4000",         0, layout_fashion )

src/mame/drivers/arcadecl.c

r4679	r4680
84	84
85	85	static void update_interrupts(running_machine *machine)
86	86	{
87		cpu_set_input_line(machine->cpu[0], 4, atarigen_scanline_int_state ? ASSERT_LINE : CLEAR_LINE);
	87	cputag_set_input_line(machine, "maincpu", 4, atarigen_scanline_int_state ? ASSERT_LINE : CLEAR_LINE);
88	88	}
89	89
90	90
r4679	r4680
92	92	{
93	93	/* generate 32V signals */
94	94	if ((scanline & 32) == 0)
95		atarigen_scanline_int_gen(screen->machine->cpu[0]);
	95	atarigen_scanline_int_gen(cputag_get_cpu(screen->machine, "maincpu"));
96	96	}
97	97
98	98

src/mame/drivers/namconb1.c

r4679	r4680
298	298
299	299	video_screen_update_partial(machine->primary_screen, param);
300	300	pos_irq_active = 1;
301		cpu_set_input_line(machine->cpu[0], namconb_cpureg[0x02] & 0xf, ASSERT_LINE);
	301	cputag_set_input_line(machine, "maincpu", namconb_cpureg[0x02] & 0xf, ASSERT_LINE);
302	302	}
303	303
304	304	static INTERRUPT_GEN( namconb1_interrupt )
r4679	r4680
374	374	{
375	375	video_screen_update_partial(machine->primary_screen, param);
376	376	pos_irq_active = 1;
377		cpu_set_input_line(machine->cpu[0], namconb_cpureg[0x02], ASSERT_LINE);
	377	cputag_set_input_line(machine, "maincpu", namconb_cpureg[0x02], ASSERT_LINE);
378	378	}
379	379
380	380	static INTERRUPT_GEN( namconb2_interrupt )
r4679	r4680
429	429	switch(reg) {
430	430	case 0x02: // POS IRQ level/enable
431	431	if(pos_irq_active && (((prev & 0xf) != (data & 0xf)) || !(data & 0xf0))) {
432		cpu_set_input_line(machine->cpu[0], prev & 0xf, CLEAR_LINE);
	432	cputag_set_input_line(machine, "maincpu", prev & 0xf, CLEAR_LINE);
433	433	if(data & 0xf0)
434		cpu_set_input_line(machine->cpu[0], data & 0xf, ASSERT_LINE);
	434	cputag_set_input_line(machine, "maincpu", data & 0xf, ASSERT_LINE);
435	435	else
436	436	pos_irq_active = 0;
437	437	}
r4679	r4680
439	439
440	440	case 0x04: // VBLANK IRQ level/enable
441	441	if(vblank_irq_active && (((prev & 0xf) != (data & 0xf)) || !(data & 0xf0))) {
442		cpu_set_input_line(machine->cpu[0], prev & 0xf, CLEAR_LINE);
	442	cputag_set_input_line(machine, "maincpu", prev & 0xf, CLEAR_LINE);
443	443	if(data & 0xf0)
444		cpu_set_input_line(machine->cpu[0], data & 0xf, ASSERT_LINE);
	444	cputag_set_input_line(machine, "maincpu", data & 0xf, ASSERT_LINE);
445	445	else
446	446	vblank_irq_active = 0;
447	447	}
r4679	r4680
449	449
450	450	case 0x07: // POS ack
451	451	if(pos_irq_active) {
452		cpu_set_input_line(machine->cpu[0], namconb_cpureg[0x02] & 0xf, CLEAR_LINE);
	452	cputag_set_input_line(machine, "maincpu", namconb_cpureg[0x02] & 0xf, CLEAR_LINE);
453	453	pos_irq_active = 0;
454	454	}
455	455	break;
456	456
457	457	case 0x09: // VBLANK ack
458	458	if(vblank_irq_active) {
459		cpu_set_input_line(machine->cpu[0], namconb_cpureg[0x04] & 0xf, CLEAR_LINE);
	459	cputag_set_input_line(machine, "maincpu", namconb_cpureg[0x04] & 0xf, CLEAR_LINE);
460	460	vblank_irq_active = 0;
461	461	}
462	462	break;
r4679	r4680
466	466
467	467	case 0x18: // C75 Control
468	468	if(data & 1) {
469		cpu_set_input_line(machine->cpu[1], INPUT_LINE_HALT, CLEAR_LINE);
470		cpu_set_input_line(machine->cpu[1], INPUT_LINE_RESET, ASSERT_LINE);
471		cpu_set_input_line(machine->cpu[1], INPUT_LINE_RESET, CLEAR_LINE);
	469	cputag_set_input_line(machine, "mcu", INPUT_LINE_HALT, CLEAR_LINE);
	470	cputag_set_input_line(machine, "mcu", INPUT_LINE_RESET, ASSERT_LINE);
	471	cputag_set_input_line(machine, "mcu", INPUT_LINE_RESET, CLEAR_LINE);
472	472	} else
473		cpu_set_input_line(machine->cpu[1], INPUT_LINE_HALT, ASSERT_LINE);
	473	cputag_set_input_line(machine, "mcu", INPUT_LINE_HALT, ASSERT_LINE);
474	474	break;
475	475	}
476	476	}
r4679	r4680
495	495	switch(reg) {
496	496	case 0x00: // VBLANK IRQ level
497	497	if(vblank_irq_active && (prev != data)) {
498		cpu_set_input_line(machine->cpu[0], prev, CLEAR_LINE);
	498	cputag_set_input_line(machine, "maincpu", prev, CLEAR_LINE);
499	499	if(data)
500		cpu_set_input_line(machine->cpu[0], data, ASSERT_LINE);
	500	cputag_set_input_line(machine, "maincpu", data, ASSERT_LINE);
501	501	else
502	502	vblank_irq_active = 0;
503	503	}
r4679	r4680
505	505
506	506	case 0x02: // POS IRQ level
507	507	if(pos_irq_active && (prev != data)) {
508		cpu_set_input_line(machine->cpu[0], prev, CLEAR_LINE);
	508	cputag_set_input_line(machine, "maincpu", prev, CLEAR_LINE);
509	509	if(data)
510		cpu_set_input_line(machine->cpu[0], data, ASSERT_LINE);
	510	cputag_set_input_line(machine, "maincpu", data, ASSERT_LINE);
511	511	else
512	512	pos_irq_active = 0;
513	513	}
r4679	r4680
515	515
516	516	case 0x04: // VBLANK ack
517	517	if(vblank_irq_active) {
518		cpu_set_input_line(machine->cpu[0], namconb_cpureg[0x00], CLEAR_LINE);
	518	cputag_set_input_line(machine, "maincpu", namconb_cpureg[0x00], CLEAR_LINE);
519	519	vblank_irq_active = 0;
520	520	}
521	521	break;
522	522
523	523	case 0x06: // POS ack
524	524	if(pos_irq_active) {
525		cpu_set_input_line(machine->cpu[0], namconb_cpureg[0x02], CLEAR_LINE);
	525	cputag_set_input_line(machine, "maincpu", namconb_cpureg[0x02], CLEAR_LINE);
526	526	pos_irq_active = 0;
527	527	}
528	528	break;
r4679	r4680
532	532
533	533	case 0x16: // C75 Control
534	534	if(data & 1) {
535		cpu_set_input_line(machine->cpu[1], INPUT_LINE_HALT, CLEAR_LINE);
536		cpu_set_input_line(machine->cpu[1], INPUT_LINE_RESET, ASSERT_LINE);
537		cpu_set_input_line(machine->cpu[1], INPUT_LINE_RESET, CLEAR_LINE);
	535	cputag_set_input_line(machine, "mcu", INPUT_LINE_HALT, CLEAR_LINE);
	536	cputag_set_input_line(machine, "mcu", INPUT_LINE_RESET, ASSERT_LINE);
	537	cputag_set_input_line(machine, "mcu", INPUT_LINE_RESET, CLEAR_LINE);
538	538	} else {
539		cpu_set_input_line(machine->cpu[1], INPUT_LINE_HALT, ASSERT_LINE);
	539	cputag_set_input_line(machine, "mcu", INPUT_LINE_HALT, ASSERT_LINE);
540	540	}
541	541	break;
542	542	}
r4679	r4680
852	852	}
853	853
854	854	static ADDRESS_MAP_START( namconb1_am, ADDRESS_SPACE_PROGRAM, 32 )
855		AM_RANGE(0x000000, 0x0fffff) AM_READ(SMH_ROM) AM_WRITE(SMH_ROM)
	855	AM_RANGE(0x000000, 0x0fffff) AM_ROM
856	856	AM_RANGE(0x100000, 0x10001f) AM_READ(gunbulet_gun_r)
857		AM_RANGE(0x1c0000, 0x1cffff) AM_READ(SMH_RAM) AM_WRITE(SMH_RAM)
	857	AM_RANGE(0x1c0000, 0x1cffff) AM_RAM
858	858	AM_RANGE(0x1e4000, 0x1e4003) AM_READWRITE(randgen_r,srand_w)
859	859	AM_RANGE(0x200000, 0x207fff) AM_READWRITE(namconb_share_r, namconb_share_w)
860	860	AM_RANGE(0x208000, 0x2fffff) AM_RAM
861	861	AM_RANGE(0x400000, 0x40001f) AM_READWRITE(namconb_cpureg_r, namconb1_cpureg_w)
862		AM_RANGE(0x580000, 0x5807ff) AM_READ(SMH_RAM) AM_WRITE(SMH_RAM) AM_BASE(&nvmem32)
	862	AM_RANGE(0x580000, 0x5807ff) AM_RAM AM_BASE(&nvmem32)
863	863	AM_RANGE(0x600000, 0x61ffff) AM_READWRITE(namco_obj32_r,namco_obj32_w)
864	864	AM_RANGE(0x620000, 0x620007) AM_READWRITE(namco_spritepos32_r,namco_spritepos32_w)
865	865	AM_RANGE(0x640000, 0x64ffff) AM_READWRITE(namco_tilemapvideoram32_r,namco_tilemapvideoram32_w )
866	866	AM_RANGE(0x660000, 0x66003f) AM_READWRITE(namco_tilemapcontrol32_r,namco_tilemapcontrol32_w)
867		AM_RANGE(0x680000, 0x68000f) AM_READ(SMH_RAM) AM_WRITE(SMH_RAM) AM_BASE(&namconb1_spritebank32)
	867	AM_RANGE(0x680000, 0x68000f) AM_RAM AM_BASE(&namconb1_spritebank32)
868	868	AM_RANGE(0x6e0000, 0x6e001f) AM_READ(custom_key_r) AM_WRITENOP
869		AM_RANGE(0x700000, 0x707fff) AM_READ(SMH_RAM) AM_WRITE(SMH_RAM) AM_BASE(&paletteram32)
	869	AM_RANGE(0x700000, 0x707fff) AM_RAM AM_BASE(&paletteram32)
870	870	ADDRESS_MAP_END
871	871
872	872	static ADDRESS_MAP_START( namconb2_am, ADDRESS_SPACE_PROGRAM, 32 )
873		AM_RANGE(0x000000, 0x0fffff) AM_READ(SMH_ROM) AM_WRITE(SMH_ROM)
874		AM_RANGE(0x1c0000, 0x1cffff) AM_READ(SMH_RAM) AM_WRITE(SMH_RAM)
	873	AM_RANGE(0x000000, 0x0fffff) AM_ROM
	874	AM_RANGE(0x1c0000, 0x1cffff) AM_RAM
875	875	AM_RANGE(0x1e4000, 0x1e4003) AM_READWRITE(randgen_r,srand_w)
876	876	AM_RANGE(0x200000, 0x207fff) AM_READWRITE(namconb_share_r, namconb_share_w)
877	877	AM_RANGE(0x208000, 0x2fffff) AM_RAM
878	878	AM_RANGE(0x400000, 0x4fffff) AM_ROM AM_REGION("data", 0)
879	879	AM_RANGE(0x600000, 0x61ffff) AM_READWRITE(namco_obj32_r,namco_obj32_w)
880	880	AM_RANGE(0x620000, 0x620007) AM_READWRITE(namco_spritepos32_r,namco_spritepos32_w)
881		AM_RANGE(0x640000, 0x64000f) AM_READ(SMH_RAM) AM_WRITE(SMH_RAM) /* unknown xy offset */
	881	AM_RANGE(0x640000, 0x64000f) AM_RAM /* unknown xy offset */
882	882	AM_RANGE(0x680000, 0x68ffff) AM_READWRITE(namco_tilemapvideoram32_r, namco_tilemapvideoram32_w )
883	883	AM_RANGE(0x6c0000, 0x6c003f) AM_READWRITE(namco_tilemapcontrol32_r, namco_tilemapcontrol32_w )
884	884	AM_RANGE(0x700000, 0x71ffff) AM_READWRITE(namco_rozvideoram32_r,namco_rozvideoram32_w)
885	885	AM_RANGE(0x740000, 0x74001f) AM_READWRITE(namco_rozcontrol32_r,namco_rozcontrol32_w)
886		AM_RANGE(0x800000, 0x807fff) AM_READ(SMH_RAM) AM_WRITE(SMH_RAM) AM_BASE(&paletteram32)
887		AM_RANGE(0x900008, 0x90000f) AM_READ(SMH_RAM) AM_WRITE(SMH_RAM) AM_BASE(&namconb1_spritebank32)
888		AM_RANGE(0x940000, 0x94000f) AM_READ(SMH_RAM) AM_WRITE(SMH_RAM) AM_BASE(&namconb1_tilebank32)
	886	AM_RANGE(0x800000, 0x807fff) AM_RAM AM_BASE(&paletteram32)
	887	AM_RANGE(0x900008, 0x90000f) AM_RAM AM_BASE(&namconb1_spritebank32)
	888	AM_RANGE(0x940000, 0x94000f) AM_RAM AM_BASE(&namconb1_tilebank32)
889	889	AM_RANGE(0x980000, 0x98000f) AM_READ(namco_rozbank32_r) AM_WRITE(namco_rozbank32_w)
890		AM_RANGE(0xa00000, 0xa007ff) AM_READ(SMH_RAM) AM_WRITE(SMH_RAM) AM_BASE(&nvmem32)
	890	AM_RANGE(0xa00000, 0xa007ff) AM_RAM AM_BASE(&nvmem32)
891	891	AM_RANGE(0xc00000, 0xc0001f) AM_READ(custom_key_r) AM_WRITENOP
892	892	AM_RANGE(0xf00000, 0xf0001f) AM_READWRITE(namconb_cpureg_r, namconb2_cpureg_w)
893		ADDRESS_MAP_END /* namconb2_readmem */
	893	ADDRESS_MAP_END
894	894
895	895	static WRITE16_HANDLER( nbmcu_shared_w )
896	896	{

src/mame/drivers/flstory.c

r4679	r4680
46	46
47	47	static TIMER_CALLBACK( nmi_callback )
48	48	{
49		if (sound_nmi_enable) cpu_set_input_line(machine->cpu[1],INPUT_LINE_NMI,PULSE_LINE);
	49	if (sound_nmi_enable)
	50	cputag_set_input_line(machine, "audiocpu", INPUT_LINE_NMI, PULSE_LINE);
50	51	else pending_nmi = 1;
51	52	}
52	53
53	54	static WRITE8_HANDLER( sound_command_w )
54	55	{
55		soundlatch_w(space,0,data);
56		timer_call_after_resynch(space->machine, NULL, data,nmi_callback);
	56	soundlatch_w(space, 0, data);
	57	timer_call_after_resynch(space->machine, NULL, data, nmi_callback);
57	58	}
58	59
59	60
r4679	r4680
67	68	sound_nmi_enable = 1;
68	69	if (pending_nmi)
69	70	{
70		cpu_set_input_line(space->machine->cpu[1],INPUT_LINE_NMI,PULSE_LINE);
	71	cputag_set_input_line(space->machine, "audiocpu", INPUT_LINE_NMI, PULSE_LINE);
71	72	pending_nmi = 0;
72	73	}
73	74	}
r4679	r4680
126	127
127	128	static CUSTOM_INPUT( victnine_mcu_status_bit01_r )
128	129	{
129		const address_space *space = cpu_get_address_space(field->port->machine->cpu[0], ADDRESS_SPACE_PROGRAM);
	130	const address_space *space = cputag_get_address_space(field->port->machine, "maincpu", ADDRESS_SPACE_PROGRAM);
130	131
131		return (victnine_mcu_status_r(space,0) & 3);
	132	return (victnine_mcu_status_r(space, 0) & 3);
132	133	}
133	134
134	135	static ADDRESS_MAP_START( victnine_map, ADDRESS_SPACE_PROGRAM, 8 )
r4679	r4680
722	723	MDRV_CPU_VBLANK_INT_HACK(irq0_line_hold,2)   /* IRQ generated by ??? */
723	724	/* NMI generated by the main CPU */
724	725	//  MDRV_CPU_ADD("mcu", M68705,4000000)  /* ??? */
725		//  MDRV_CPU_PROGRAM_MAP(m68705_readmem,m68705_writemem)
	726	//  MDRV_CPU_PROGRAM_MAP(m68705_map,0)
726	727
727	728	MDRV_QUANTUM_TIME(HZ(6000))   /* 100 CPU slices per frame - an high value to ensure proper */
728	729	/* synchronization of the CPUs */
r4679	r4680
779	780	MDRV_CPU_VBLANK_INT_HACK(irq0_line_hold,2)   /* IRQ generated by ??? */
780	781	/* NMI generated by the main CPU */
781	782	//  MDRV_CPU_ADD("mcu", M68705,4000000)  /* ??? */
782		//  MDRV_CPU_PROGRAM_MAP(m68705_readmem,m68705_writemem)
	783	//  MDRV_CPU_PROGRAM_MAP(m68705_map,0)
783	784
784	785	MDRV_QUANTUM_TIME(HZ(6000))   /* 100 CPU slices per frame - an high value to ensure proper */
785	786	/* synchronization of the CPUs */

src/mame/drivers/fcrash.c

r4679	r4680
48	48	if (ACCESSING_BITS_0_7)
49	49	{
50	50	soundlatch_w(space,0,data & 0xff);
51		cpu_set_input_line(space->machine->cpu[1], 0, HOLD_LINE);
	51	cputag_set_input_line(space->machine, "soundcpu", 0, HOLD_LINE);
52	52	}
53	53	}
54	54
r4679	r4680
70	70	sample_buffer1 >>= 4;
71	71	sample_select1 ^= 1;
72	72	if (sample_select1 == 0)
73		cpu_set_input_line(device->machine->cpu[1], INPUT_LINE_NMI, PULSE_LINE);
	73	cputag_set_input_line(device->machine, "soundcpu", INPUT_LINE_NMI, PULSE_LINE);
74	74	}
75	75
76	76	static void m5205_int2(const device_config *device)

src/mame/drivers/suprslam.c

r4679	r4680
107	107	if (ACCESSING_BITS_0_7)
108	108	{
109	109	pending_command = 1;
110		soundlatch_w(space,offset,data & 0xff);
111		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_NMI, PULSE_LINE);
	110	soundlatch_w(space, offset, data & 0xff);
	111	cputag_set_input_line(space->machine, "audiocpu", INPUT_LINE_NMI, PULSE_LINE);
112	112	}
113	113	}
114	114
r4679	r4680
287	287
288	288	static void irqhandler(const device_config *device, int irq)
289	289	{
290		cpu_set_input_line(device->machine->cpu[1],0,irq ? ASSERT_LINE : CLEAR_LINE);
	290	cputag_set_input_line(device->machine, "audiocpu", 0, irq ? ASSERT_LINE : CLEAR_LINE);
291	291	}
292	292
293	293	static const ym2610_interface ym2610_config =
r4679	r4680
366	366	/*** GAME DRIVERS ************************************************************/
367	367
368	368	GAME( 1995, suprslam, 0, suprslam, suprslam, 0, ROT0, "Banpresto / Toei Animation", "Super Slams", GAME_IMPERFECT_GRAPHICS )
369
370

src/mame/drivers/strnskil.c

r4679	r4680
504	504	//  AM_RANGE(0xd806, 0xd806) AM_READ(protection_r) /* protection data read (pettanp) */
505	505
506	506	/* Fujitsu MB8841 4-Bit MCU */
507		memory_install_read8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xd806, 0xd806, 0, 0, pettanp_protection_r);
508		memory_install_write8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xd80d, 0xd80d, 0, 0, protection_w);
	507	memory_install_read8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xd806, 0xd806, 0, 0, pettanp_protection_r);
	508	memory_install_write8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xd80d, 0xd80d, 0, 0, protection_w);
509	509
510	510	}
511	511
512	512	static DRIVER_INIT( banbam )
513	513	{
514	514	/* Fujitsu MB8841 4-Bit MCU */
515		memory_install_read8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xd806, 0xd806, 0, 0, banbam_protection_r);
516		memory_install_write8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xd80d, 0xd80d, 0, 0, protection_w);
	515	memory_install_read8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xd806, 0xd806, 0, 0, banbam_protection_r);
	516	memory_install_write8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xd80d, 0xd80d, 0, 0, protection_w);
517	517	}
518	518
519	519	GAME( 1984, strnskil, 0,        strnskil, strnskil, 0,       ROT0, "Sun Electronics", "Strength & Skill", 0 )

src/mame/drivers/sfkick.c

r4679	r4680
92	92	case 0: /* bios */
93	93	{
94	94	UINT8 *mem = memory_region(machine, "bios");
95		memory_set_bankptr (machine, 1, mem);
96		memory_set_bankptr (machine,2, mem+0x2000);
	95	memory_set_bankptr(machine,1, mem);
	96	memory_set_bankptr(machine,2, mem+0x2000);
97	97	}
98	98	break;
99	99
100	100	case 1: /* ext rom */
101	101	{
102	102	UINT8 *mem = memory_region(machine, "extrom");
103		memory_set_bankptr (machine,1, mem+0x4000);
104		memory_set_bankptr (machine,2, mem+0x6000);
	103	memory_set_bankptr(machine,1, mem+0x4000);
	104	memory_set_bankptr(machine,2, mem+0x6000);
105	105	}
106	106	break;
107	107
108	108	case 2: /* banked */
109	109	{
110	110	UINT8 *mem = memory_region(machine, "banked");
111		memory_set_bankptr (machine,1, mem+0x2000*sfkick_bank[0]);
112		memory_set_bankptr (machine,2, mem+0x2000*sfkick_bank[1]);
	111	memory_set_bankptr(machine,1, mem+0x2000*sfkick_bank[0]);
	112	memory_set_bankptr(machine,2, mem+0x2000*sfkick_bank[1]);
113	113	}
114	114	break;
115	115
r4679	r4680
128	128	case 0: /* bios - upper part */
129	129	{
130	130	UINT8 *mem = memory_region(machine, "bios");
131		memory_set_bankptr (machine,3, mem+0x4000);
132		memory_set_bankptr (machine,4, mem+0x6000);
	131	memory_set_bankptr(machine,3, mem+0x4000);
	132	memory_set_bankptr(machine,4, mem+0x6000);
133	133	}
134	134	break;
135	135
r4679	r4680
145	145	case 2: /* banked */
146	146	{
147	147	UINT8 *mem = memory_region(machine, "banked");
148		memory_set_bankptr (machine,3, mem+0x2000*sfkick_bank[2]);
149		memory_set_bankptr (machine,4, mem+0x2000*sfkick_bank[3]);
	148	memory_set_bankptr(machine,3, mem+0x2000*sfkick_bank[2]);
	149	memory_set_bankptr(machine,4, mem+0x2000*sfkick_bank[3]);
150	150	}
151	151	break;
152	152	}
r4679	r4680
174	174	case 2: /* banked */
175	175	{
176	176	UINT8 *mem = memory_region(machine, "banked");
177		memory_set_bankptr (machine,5, mem+0x2000*sfkick_bank[4]);
178		memory_set_bankptr (machine,6, mem+0x2000*sfkick_bank[5]);
	177	memory_set_bankptr(machine,5, mem+0x2000*sfkick_bank[4]);
	178	memory_set_bankptr(machine,6, mem+0x2000*sfkick_bank[5]);
179	179	}
180	180	break;
181	181	}
r4679	r4680
195	195	case 2: /* banked */
196	196	{
197	197	UINT8 *mem = memory_region(machine, "banked");
198		memory_set_bankptr (machine,7, mem+0x2000*sfkick_bank[6]);
199		memory_set_bankptr (machine,8, mem+0x2000*sfkick_bank[7]);
	198	memory_set_bankptr(machine,7, mem+0x2000*sfkick_bank[6]);
	199	memory_set_bankptr(machine,8, mem+0x2000*sfkick_bank[7]);
200	200	}
201	201	break;
202	202
r4679	r4680
293	293	}
294	294	}
295	295
296		static ADDRESS_MAP_START (readmem, ADDRESS_SPACE_PROGRAM, 8)
297		AM_RANGE( 0x0000, 0x1fff) AM_READ( SMH_BANK1 )
298		AM_RANGE( 0x2000, 0x3fff) AM_READ( SMH_BANK2 )
299		AM_RANGE( 0x4000, 0x5fff) AM_READ( SMH_BANK3 )
300		AM_RANGE( 0x6000, 0x7fff) AM_READ( SMH_BANK4 )
301		AM_RANGE( 0x8000, 0x9fff) AM_READ( SMH_BANK5 )
302		AM_RANGE( 0xa000, 0xbfff) AM_READ( SMH_BANK6 )
303		AM_RANGE( 0xc000, 0xdfff) AM_READ( SMH_BANK7 )
304		AM_RANGE( 0xe000, 0xffff) AM_READ( SMH_BANK8 )
305		ADDRESS_MAP_END
306
307		static ADDRESS_MAP_START( writemem , ADDRESS_SPACE_PROGRAM, 8)
	296	static ADDRESS_MAP_START( sfkick_map, ADDRESS_SPACE_PROGRAM, 8)
	297	AM_RANGE( 0x0000, 0x1fff) AM_ROMBANK(1)
	298	AM_RANGE( 0x2000, 0x3fff) AM_ROMBANK(2)
	299	AM_RANGE( 0x4000, 0x5fff) AM_ROMBANK(3)
	300	AM_RANGE( 0x6000, 0x7fff) AM_ROMBANK(4)
	301	AM_RANGE( 0x8000, 0x9fff) AM_ROMBANK(5)
	302	AM_RANGE( 0xa000, 0xbfff) AM_ROMBANK(6)
	303	AM_RANGE( 0xc000, 0xdfff) AM_ROMBANK(7)
	304	AM_RANGE( 0xe000, 0xffff) AM_ROMBANK(8)
308	305	AM_RANGE( 0x0000, 0x3fff) AM_WRITE( page0_w )
309	306	AM_RANGE( 0x4000, 0x7fff) AM_WRITE( page1_w )
310	307	AM_RANGE( 0x8000, 0xbfff) AM_WRITE( page2_w )
311	308	AM_RANGE( 0xc000, 0xffff) AM_WRITE( page3_w )
312	309	ADDRESS_MAP_END
313	310
314		static ADDRESS_MAP_START (main_io, ADDRESS_SPACE_IO, 8)
	311	static ADDRESS_MAP_START( sfkick_io_map, ADDRESS_SPACE_IO, 8)
315	312	ADDRESS_MAP_UNMAP_HIGH
316	313	ADDRESS_MAP_GLOBAL_MASK(0xff)
317	314	AM_RANGE( 0xa0, 0xa7) AM_WRITE( soundlatch_w )
r4679	r4680
322	319	AM_RANGE( 0xa8, 0xab) AM_DEVREADWRITE("ppi8255", ppi8255_r, ppi8255_w)
323	320	ADDRESS_MAP_END
324	321
325		static ADDRESS_MAP_START( sound_mem, ADDRESS_SPACE_PROGRAM, 8 )
	322	static ADDRESS_MAP_START( sfkick_sound_map, ADDRESS_SPACE_PROGRAM, 8 )
326	323	AM_RANGE(0x0000, 0x7fff) AM_ROM
327	324	AM_RANGE(0xc000, 0xc7ff) AM_RAM
328	325	ADDRESS_MAP_END
329	326
330		static ADDRESS_MAP_START (sound_io, ADDRESS_SPACE_IO, 8)
	327	static ADDRESS_MAP_START( sfkick_sound_io_map, ADDRESS_SPACE_IO, 8)
331	328	ADDRESS_MAP_GLOBAL_MASK(0xff)
332	329	AM_RANGE(0x00, 0x00) AM_READ(soundlatch_r)
333	330	AM_RANGE(0x04, 0x05) AM_DEVREADWRITE("ym1", ym2203_r, ym2203_w)
r4679	r4680
413	410
414	411	static void sfkick_vdp_interrupt(running_machine *machine, int i)
415	412	{
416		cpu_set_input_line (machine->cpu[0], 0, (i ? HOLD_LINE : CLEAR_LINE));
	413	cputag_set_input_line (machine, "maincpu", 0, (i ? HOLD_LINE : CLEAR_LINE));
417	414	}
418	415
419	416	static VIDEO_START( sfkick )
r4679	r4680
444	441	}
445	442	static void irqhandler(const device_config *device, int irq)
446	443	{
447		cpu_set_input_line_and_vector(device->machine->cpu[1], 0, irq ? ASSERT_LINE : CLEAR_LINE, 0xff);
	444	cputag_set_input_line_and_vector(device->machine, "soundcpu", 0, irq ? ASSERT_LINE : CLEAR_LINE, 0xff);
448	445	}
449	446
450	447	static const ym2203_interface ym2203_config =
r4679	r4680
460	457	static MACHINE_DRIVER_START( sfkick )
461	458
462	459	MDRV_CPU_ADD("maincpu",Z80,MASTER_CLOCK/6)
463		MDRV_CPU_PROGRAM_MAP(readmem,writemem)
464		MDRV_CPU_IO_MAP(main_io,0)
	460	MDRV_CPU_PROGRAM_MAP(sfkick_map,0)
	461	MDRV_CPU_IO_MAP(sfkick_io_map,0)
465	462	MDRV_CPU_VBLANK_INT_HACK(sfkick_interrupt,262)
466	463
467	464	MDRV_QUANTUM_TIME(HZ(60000))
468	465
469	466	MDRV_CPU_ADD("soundcpu",Z80,MASTER_CLOCK/6)
470		MDRV_CPU_PROGRAM_MAP(sound_mem,0)
471		MDRV_CPU_IO_MAP(sound_io,0)
	467	MDRV_CPU_PROGRAM_MAP(sfkick_sound_map,0)
	468	MDRV_CPU_IO_MAP(sfkick_sound_io_map,0)
472	469
473	470	MDRV_SCREEN_ADD("screen", RASTER)
474	471	MDRV_SCREEN_REFRESH_RATE(60)
r4679	r4680
500	497
501	498	static DRIVER_INIT(sfkick)
502	499	{
503		main_mem=auto_malloc(0x4000);
	500	main_mem=auto_alloc_array(machine, UINT8, 0x4000);
504	501	}
505	502
506	503	ROM_START( sfkick )

src/mame/drivers/atetris.c

r4679	r4680
80	80	int scanline = param;
81	81
82	82	/* assert/deassert the interrupt */
83		cpu_set_input_line(machine->cpu[0], 0, (scanline & 32) ? ASSERT_LINE : CLEAR_LINE);
	83	cputag_set_input_line(machine, "maincpu", 0, (scanline & 32) ? ASSERT_LINE : CLEAR_LINE);
84	84
85	85	/* set the next timer */
86	86	scanline += 32;
r4679	r4680
92	92
93	93	static WRITE8_HANDLER( irq_ack_w )
94	94	{
95		cpu_set_input_line(space->machine->cpu[0], 0, CLEAR_LINE);
	95	cputag_set_input_line(space->machine, "maincpu", 0, CLEAR_LINE);
96	96	}
97	97
98	98

src/mame/drivers/dgpix.c

r4679	r4680
269	269
270	270	static VIDEO_START( dgpix )
271	271	{
272		vram = auto_malloc(0x40000*2);
	272	vram = auto_alloc_array(machine, UINT32, 0x40000*2/4);
273	273	}
274	274
275	275	static VIDEO_UPDATE( dgpix )
r4679	r4680
566	566	rom[BYTE4_XOR_BE(0x3aa933)] = 0;
567	567
568	568	//  protection related ?
569		//  memory_install_read32_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xf0c8b440, 0xf0c8b447, 0, 0, SMH_NOP );
	569	//  memory_install_read32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xf0c8b440, 0xf0c8b447, 0, 0, (read32_space_func)SMH_NOP );
570	570
571	571	flash_roms = 2;
572	572	}
r4679	r4680
586	586	rom[BYTE4_XOR_BE(0x3a45c9)] = 0;
587	587
588	588	//  protection related ?
589		//  memory_install_read32_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x12341234, 0x12341243, 0, 0, SMH_NOP );
	589	//  memory_install_read32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x12341234, 0x12341243, 0, 0, (read32_space_func)SMH_NOP );
590	590
591	591	flash_roms = 4;
592	592	}

src/mame/drivers/cosmic.c

r4679	r4680
469	469	}
470	470
471	471
472		static ADDRESS_MAP_START( panic_readmem, ADDRESS_SPACE_PROGRAM, 8 )
473		AM_RANGE(0x0000, 0x3fff) AM_READ(SMH_ROM)
474		AM_RANGE(0x4000, 0x5fff) AM_READ(SMH_RAM)
	472	static ADDRESS_MAP_START( panic_map, ADDRESS_SPACE_PROGRAM, 8 )
	473	AM_RANGE(0x0000, 0x3fff) AM_ROM
	474	AM_RANGE(0x4000, 0x5fff) AM_RAM AM_BASE(&videoram) AM_SIZE(&videoram_size)
	475	AM_RANGE(0x6000, 0x601f) AM_WRITE(SMH_RAM) AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
475	476	AM_RANGE(0x6800, 0x6800) AM_READ_PORT("P1")
476	477	AM_RANGE(0x6801, 0x6801) AM_READ_PORT("P2")
477	478	AM_RANGE(0x6802, 0x6802) AM_READ_PORT("DSW")
478	479	AM_RANGE(0x6803, 0x6803) AM_READ_PORT("SYSTEM")
479		ADDRESS_MAP_END
480
481		static ADDRESS_MAP_START( panic_writemem, ADDRESS_SPACE_PROGRAM, 8 )
482		AM_RANGE(0x0000, 0x3fff) AM_WRITE(SMH_ROM)
483		AM_RANGE(0x4000, 0x5fff) AM_WRITE(SMH_RAM) AM_BASE(&videoram) AM_SIZE(&videoram_size)
484		AM_RANGE(0x6000, 0x601f) AM_WRITE(SMH_RAM) AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
485	480	AM_RANGE(0x7000, 0x700b) AM_WRITE(panic_sound_output_w)
486	481	AM_RANGE(0x700c, 0x700e) AM_WRITE(cosmic_color_register_w)
487	482	AM_RANGE(0x700f, 0x700f) AM_WRITE(flip_screen_w)
r4679	r4680
489	484	ADDRESS_MAP_END
490	485
491	486
492		static ADDRESS_MAP_START( cosmica_readmem, ADDRESS_SPACE_PROGRAM, 8 )
493		AM_RANGE(0x0000, 0x3fff) AM_READ(SMH_ROM)
494		AM_RANGE(0x4000, 0x5fff) AM_READ(SMH_RAM)
	487	static ADDRESS_MAP_START( cosmica_map, ADDRESS_SPACE_PROGRAM, 8 )
	488	AM_RANGE(0x0000, 0x3fff) AM_ROM
	489	AM_RANGE(0x4000, 0x5fff) AM_RAM AM_BASE(&videoram) AM_SIZE(&videoram_size)
	490	AM_RANGE(0x6000, 0x601f) AM_WRITE(SMH_RAM) AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
495	491	AM_RANGE(0x6800, 0x6800) AM_READ_PORT("P1")
496	492	AM_RANGE(0x6801, 0x6801) AM_READ_PORT("P2")
497	493	AM_RANGE(0x6802, 0x6802) AM_READ_PORT("DSW")
498	494	AM_RANGE(0x6803, 0x6803) AM_READ(cosmica_pixel_clock_r)
499		ADDRESS_MAP_END
500
501		static ADDRESS_MAP_START( cosmica_writemem, ADDRESS_SPACE_PROGRAM, 8 )
502		AM_RANGE(0x0000, 0x3fff) AM_WRITE(SMH_ROM)
503		AM_RANGE(0x4000, 0x5fff) AM_WRITE(SMH_RAM) AM_BASE(&videoram) AM_SIZE(&videoram_size)
504		AM_RANGE(0x6000, 0x601f) AM_WRITE(SMH_RAM) AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
505	495	AM_RANGE(0x7000, 0x700b) AM_WRITE(cosmica_sound_output_w)
506	496	AM_RANGE(0x700c, 0x700d) AM_WRITE(cosmic_color_register_w)
507	497	AM_RANGE(0x700f, 0x700f) AM_WRITE(flip_screen_w)
508	498	ADDRESS_MAP_END
509	499
510	500
511		static ADDRESS_MAP_START( cosmicg_readmem, ADDRESS_SPACE_PROGRAM, 8 )
512		AM_RANGE(0x0000, 0x1fff) AM_READ(SMH_ROM)
513		AM_RANGE(0x2000, 0x3fff) AM_READ(SMH_RAM)
	501	static ADDRESS_MAP_START( cosmicg_map, ADDRESS_SPACE_PROGRAM, 8 )
	502	AM_RANGE(0x0000, 0x1fff) AM_ROM
	503	AM_RANGE(0x2000, 0x3fff) AM_RAM AM_BASE(&videoram) AM_SIZE(&videoram_size)
514	504	ADDRESS_MAP_END
515	505
516		static ADDRESS_MAP_START( cosmicg_writemem, ADDRESS_SPACE_PROGRAM, 8 )
517		AM_RANGE(0x0000, 0x1fff) AM_WRITE(SMH_ROM)
518		AM_RANGE(0x2000, 0x3fff) AM_WRITE(SMH_RAM) AM_BASE(&videoram) AM_SIZE(&videoram_size)
519		ADDRESS_MAP_END
520
521	506	static ADDRESS_MAP_START( cosmicg_io_map, ADDRESS_SPACE_IO, 8 )
522	507	AM_RANGE(0x00, 0x00) AM_READ(cosmicg_port_0_r)
523	508	AM_RANGE(0x01, 0x01) AM_READ_PORT("IN1")
r4679	r4680
526	511	ADDRESS_MAP_END
527	512
528	513
529		static ADDRESS_MAP_START( magspot_readmem, ADDRESS_SPACE_PROGRAM, 8 )
530		AM_RANGE(0x0000, 0x2fff) AM_READ(SMH_ROM)
	514	static ADDRESS_MAP_START( magspot_map, ADDRESS_SPACE_PROGRAM, 8 )
	515	AM_RANGE(0x0000, 0x2fff) AM_ROM
531	516	AM_RANGE(0x3800, 0x3807) AM_READ(magspot_coinage_dip_r)
	517	AM_RANGE(0x4000, 0x401f) AM_WRITE(SMH_RAM) AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
	518	AM_RANGE(0x4800, 0x4800) AM_DEVWRITE("dac", dac_w)
	519	AM_RANGE(0x480c, 0x480d) AM_WRITE(cosmic_color_register_w)
	520	AM_RANGE(0x480f, 0x480f) AM_WRITE(flip_screen_w)
532	521	AM_RANGE(0x5000, 0x5000) AM_READ_PORT("IN0")
533	522	AM_RANGE(0x5001, 0x5001) AM_READ_PORT("IN1")
534	523	AM_RANGE(0x5002, 0x5002) AM_READ_PORT("IN2")
535	524	AM_RANGE(0x5003, 0x5003) AM_READ_PORT("IN3")
536		AM_RANGE(0x6000, 0x7fff) AM_READ(SMH_RAM)
	525	AM_RANGE(0x6000, 0x7fff) AM_RAM AM_BASE(&videoram) AM_SIZE(&videoram_size)
537	526	ADDRESS_MAP_END
538	527
539		static ADDRESS_MAP_START( magspot_writemem, ADDRESS_SPACE_PROGRAM, 8 )
540		AM_RANGE(0x0000, 0x2fff) AM_WRITE(SMH_ROM)
541		AM_RANGE(0x4000, 0x401f) AM_WRITE(SMH_RAM) AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
542		AM_RANGE(0x4800, 0x4800) AM_DEVWRITE("dac", dac_w)
543		AM_RANGE(0x480c, 0x480d) AM_WRITE(cosmic_color_register_w)
544		AM_RANGE(0x480f, 0x480f) AM_WRITE(flip_screen_w)
545		AM_RANGE(0x6000, 0x7fff) AM_WRITE(SMH_RAM) AM_BASE(&videoram) AM_SIZE(&videoram_size)
546		ADDRESS_MAP_END
547	528
548
549	529	static INPUT_PORTS_START( panic )
550	530	PORT_START("P1")
551	531	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON1 )
r4679	r4680
1102	1082	MDRV_IMPORT_FROM(cosmic)
1103	1083	MDRV_CPU_MODIFY("maincpu")
1104	1084
1105		MDRV_CPU_PROGRAM_MAP(panic_readmem,panic_writemem)
	1085	MDRV_CPU_PROGRAM_MAP(panic_map,0)
1106	1086	MDRV_CPU_VBLANK_INT_HACK(panic_interrupt,2)
1107	1087
1108	1088	/* video hardware */
r4679	r4680
1130	1110	MDRV_IMPORT_FROM(cosmic)
1131	1111	MDRV_CPU_MODIFY("maincpu")
1132	1112
1133		MDRV_CPU_PROGRAM_MAP(cosmica_readmem,cosmica_writemem)
	1113	MDRV_CPU_PROGRAM_MAP(cosmica_map,0)
1134	1114	MDRV_CPU_VBLANK_INT_HACK(cosmica_interrupt,32)
1135	1115
1136	1116	/* video hardware */
r4679	r4680
1161	1141	/* R Nabet : huh ? This would imply the crystal frequency is somehow divided by 2 before being
1162	1142	fed to the tms9904 or tms9980.  Also, I have never heard of a tms9900/9980 operating under
1163	1143	1.5MHz.  So, if someone can check this... */
1164		MDRV_CPU_PROGRAM_MAP(cosmicg_readmem,cosmicg_writemem)
	1144	MDRV_CPU_PROGRAM_MAP(cosmicg_map,0)
1165	1145	MDRV_CPU_IO_MAP(cosmicg_io_map,0)
1166	1146	MDRV_CPU_VBLANK_INT("screen", cosmicg_interrupt)
1167	1147
r4679	r4680
1195	1175	MDRV_IMPORT_FROM(cosmic)
1196	1176	MDRV_CPU_MODIFY("maincpu")
1197	1177
1198		MDRV_CPU_PROGRAM_MAP(magspot_readmem,magspot_writemem)
	1178	MDRV_CPU_PROGRAM_MAP(magspot_map,0)
1199	1179	MDRV_CPU_VBLANK_INT("screen", magspot_interrupt)
1200	1180
1201	1181	/* video hardware */
r4679	r4680
1229	1209	MDRV_IMPORT_FROM(cosmic)
1230	1210	MDRV_CPU_MODIFY("maincpu")
1231	1211
1232		MDRV_CPU_PROGRAM_MAP(magspot_readmem,magspot_writemem)
	1212	MDRV_CPU_PROGRAM_MAP(magspot_map,0)
1233	1213	MDRV_CPU_VBLANK_INT("screen", nomnlnd_interrupt)
1234	1214
1235	1215	/* video hardware */
r4679	r4680
1590	1570
1591	1571	static DRIVER_INIT( devzone )
1592	1572	{
1593		memory_install_write8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x4807, 0x4807, 0, 0, cosmic_background_enable_w);
	1573	memory_install_write8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x4807, 0x4807, 0, 0, cosmic_background_enable_w);
1594	1574	}
1595	1575
1596	1576
1597	1577	static DRIVER_INIT( nomnlnd )
1598	1578	{
1599	1579	const device_config *dac = devtag_get_device(machine, "dac");
1600		memory_install_read8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x5000, 0x5001, 0, 0, nomnlnd_port_0_1_r);
1601		memory_install_write8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x4800, 0x4800, 0, 0, SMH_NOP);
1602		memory_install_write8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x4807, 0x4807, 0, 0, cosmic_background_enable_w);
1603		memory_install_write8_device_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), dac, 0x480a, 0x480a, 0, 0, dac_w);
	1580	memory_install_read8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x5000, 0x5001, 0, 0, nomnlnd_port_0_1_r);
	1581	memory_install_write8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x4800, 0x4800, 0, 0, (write8_space_func)SMH_NOP);
	1582	memory_install_write8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x4807, 0x4807, 0, 0, cosmic_background_enable_w);
	1583	memory_install_write8_device_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), dac, 0x480a, 0x480a, 0, 0, dac_w);
1604	1584	}
1605	1585
1606	1586
r4679	r4680
1618	1598	GAME( 1980, panicger, panic,   panic,    panic,    0,       ROT270, "Universal (ADP Automaten license)", "Space Panic (German)", 0 )
1619	1599	GAME( 1980, devzone,  0,       devzone,  devzone,  devzone, ROT270, "Universal", "Devil Zone", GAME_IMPERFECT_SOUND )
1620	1600	GAME( 1980, devzone2, devzone, devzone,  devzone2, devzone, ROT270, "Universal", "Devil Zone (easier)", GAME_IMPERFECT_SOUND )
1621

src/mame/drivers/sangho.c

r4679	r4680
59	59	sangho_ram[offset]=data;
60	60	}
61	61
62		static ADDRESS_MAP_START( readmem, ADDRESS_SPACE_PROGRAM, 8 )
	62	static ADDRESS_MAP_START( pzlestar_map, ADDRESS_SPACE_PROGRAM, 8 )
63	63	AM_RANGE(0x0000, 0xffff) AM_WRITE(sangho_ram_w)
64		AM_RANGE(0x0000, 0x3fff) AM_READ( SMH_BANK1 )
65		AM_RANGE(0x4000, 0x7fff) AM_READ( SMH_BANK2 )
66		AM_RANGE(0x8000, 0xbfff) AM_READ( SMH_BANK3 )
67		AM_RANGE(0xc000, 0xffff) AM_READ( SMH_BANK4 )
	64	AM_RANGE(0x0000, 0x3fff) AM_ROMBANK(1)
	65	AM_RANGE(0x4000, 0x7fff) AM_ROMBANK(2)
	66	AM_RANGE(0x8000, 0xbfff) AM_ROMBANK(3)
	67	AM_RANGE(0xc000, 0xffff) AM_ROMBANK(4)
68	68	ADDRESS_MAP_END
69	69
70	70	/* Wrong ! */
r4679	r4680
203	203
204	204	static void msx_vdp_interrupt(running_machine *machine, int i)
205	205	{
206		cpu_set_input_line (machine->cpu[0], 0, (i ? HOLD_LINE : CLEAR_LINE));
	206	cputag_set_input_line (machine, "maincpu", 0, (i ? HOLD_LINE : CLEAR_LINE));
207	207	}
208	208
209	209	static INTERRUPT_GEN( sangho_interrupt )
r4679	r4680
223	223	static MACHINE_DRIVER_START(pzlestar)
224	224
225	225	MDRV_CPU_ADD("maincpu", Z80,8000000) // ?
226		MDRV_CPU_PROGRAM_MAP(readmem, 0)
	226	MDRV_CPU_PROGRAM_MAP(pzlestar_map, 0)
227	227	MDRV_CPU_IO_MAP(pzlestar_io_map,0)
228	228	MDRV_CPU_VBLANK_INT_HACK(sangho_interrupt,262)
229	229
r4679	r4680
256	256	static MACHINE_DRIVER_START(sexyboom )
257	257
258	258	MDRV_CPU_ADD("maincpu", Z80,8000000) // ?
259		MDRV_CPU_PROGRAM_MAP(readmem, 0)
	259	MDRV_CPU_PROGRAM_MAP(pzlestar_map, 0)
260	260	MDRV_CPU_IO_MAP(sexyboom_io_map,0)
261	261	MDRV_CPU_VBLANK_INT_HACK(sangho_interrupt,262)
262	262
r4679	r4680
324	324
325	325	static DRIVER_INIT(sangho)
326	326	{
327		sangho_ram = auto_malloc(0x20000);
	327	sangho_ram = auto_alloc_array(machine, UINT8, 0x20000);
328	328	}
329	329
330	330	GAME( 1991, pzlestar,  0,    pzlestar, sangho, sangho, ROT270, "Sang Ho Soft", "Puzzle Star (Sang Ho Soft)", GAME_NOT_WORKING )
331	331	GAME( 1992, sexyboom,  0,    sexyboom, sangho, sangho, ROT270, "Sang Ho Soft", "Sexy Boom", GAME_NOT_WORKING | GAME_NO_SOUND )
332

src/mame/drivers/shaolins.c

r4679	r4680
36	36
37	37
38	38
39		static ADDRESS_MAP_START( readmem, ADDRESS_SPACE_PROGRAM, 8 )
	39	static ADDRESS_MAP_START( shaolins_map, ADDRESS_SPACE_PROGRAM, 8 )
	40	AM_RANGE(0x0000, 0x0000) AM_WRITE(shaolins_nmi_w)   /* bit 0 = flip screen, bit 1 = nmi enable, bit 2 = ? */
	41	/* bit 3, bit 4 = coin counters */
	42	AM_RANGE(0x0100, 0x0100) AM_WRITE(watchdog_reset_w)
	43	AM_RANGE(0x0300, 0x0300) AM_DEVWRITE("sn1", sn76496_w)    /* trigger chip to read from latch. The program always */
	44	AM_RANGE(0x0400, 0x0400) AM_DEVWRITE("sn2", sn76496_w)    /* writes the same number as the latch, so we don't */
	45	/* bother emulating them. */
40	46	AM_RANGE(0x0500, 0x0500) AM_READ_PORT("DSW1")
41	47	AM_RANGE(0x0600, 0x0600) AM_READ_PORT("DSW2")
42	48	AM_RANGE(0x0700, 0x0700) AM_READ_PORT("SYSTEM")
43	49	AM_RANGE(0x0701, 0x0701) AM_READ_PORT("P1")
44	50	AM_RANGE(0x0702, 0x0702) AM_READ_PORT("P2")
45	51	AM_RANGE(0x0703, 0x0703) AM_READ_PORT("DSW3")
46		AM_RANGE(0x2800, 0x2bff) AM_READ(SMH_RAM)   /* RAM BANK 2 */
47		AM_RANGE(0x3000, 0x33ff) AM_READ(SMH_RAM)   /* RAM BANK 1 */
48		AM_RANGE(0x3800, 0x3fff) AM_READ(SMH_RAM)   /* video RAM */
49		AM_RANGE(0x4000, 0x5fff) AM_READ(SMH_ROM)    /* Machine checks for extra rom */
50		AM_RANGE(0x6000, 0xffff) AM_READ(SMH_ROM)
51		ADDRESS_MAP_END
52
53		static ADDRESS_MAP_START( writemem, ADDRESS_SPACE_PROGRAM, 8 )
54		AM_RANGE(0x0000, 0x0000) AM_WRITE(shaolins_nmi_w)   /* bit 0 = flip screen, bit 1 = nmi enable, bit 2 = ? */
55		/* bit 3, bit 4 = coin counters */
56		AM_RANGE(0x0100, 0x0100) AM_WRITE(watchdog_reset_w)
57		AM_RANGE(0x0300, 0x0300) AM_DEVWRITE("sn1", sn76496_w)    /* trigger chip to read from latch. The program always */
58		AM_RANGE(0x0400, 0x0400) AM_DEVWRITE("sn2", sn76496_w)    /* writes the same number as the latch, so we don't */
59		/* bother emulating them. */
60		AM_RANGE(0x0800, 0x0800) AM_WRITENOP   /* latch for 76496 #0 */
61		AM_RANGE(0x1000, 0x1000) AM_WRITENOP   /* latch for 76496 #1 */
	52	AM_RANGE(0x0800, 0x0800) AM_WRITENOP               /* latch for 76496 #0 */
	53	AM_RANGE(0x1000, 0x1000) AM_WRITENOP               /* latch for 76496 #1 */
62	54	AM_RANGE(0x1800, 0x1800) AM_WRITE(shaolins_palettebank_w)
63	55	AM_RANGE(0x2000, 0x2000) AM_WRITE(shaolins_scroll_w)
64		AM_RANGE(0x2800, 0x2bff) AM_WRITE(SMH_RAM)   /* RAM BANK 2 */
65		AM_RANGE(0x3000, 0x30ff) AM_WRITE(SMH_RAM)   /* RAM BANK 1 */
66		AM_RANGE(0x3100, 0x33ff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
67		AM_RANGE(0x3800, 0x3bff) AM_WRITE(shaolins_colorram_w) AM_BASE(&colorram)
68		AM_RANGE(0x3c00, 0x3fff) AM_WRITE(shaolins_videoram_w) AM_BASE(&videoram)
69		AM_RANGE(0x6000, 0xffff) AM_WRITE(SMH_ROM)
	56	AM_RANGE(0x2800, 0x2bff) AM_RAM                     /* RAM BANK 2 */
	57	AM_RANGE(0x3000, 0x30ff) AM_RAM                     /* RAM BANK 1 */
	58	AM_RANGE(0x3100, 0x33ff) AM_RAM AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
	59	AM_RANGE(0x3800, 0x3bff) AM_RAM_WRITE(shaolins_colorram_w) AM_BASE(&colorram)
	60	AM_RANGE(0x3c00, 0x3fff) AM_RAM_WRITE(shaolins_videoram_w) AM_BASE(&videoram)
	61	AM_RANGE(0x4000, 0x5fff) AM_ROM                     /* Machine checks for extra rom */
	62	AM_RANGE(0x6000, 0xffff) AM_ROM
70	63	ADDRESS_MAP_END
71	64
72	65
73
74	66	static INPUT_PORTS_START( shaolins )
75	67	PORT_START("SYSTEM")
76	68	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 )
r4679	r4680
220	212
221	213	/* basic machine hardware */
222	214	MDRV_CPU_ADD("maincpu", M6809, XTAL_18_432MHz/12)        /* verified on pcb */
223		MDRV_CPU_PROGRAM_MAP(readmem,writemem)
	215	MDRV_CPU_PROGRAM_MAP(shaolins_map,0)
224	216	MDRV_CPU_VBLANK_INT_HACK(shaolins_interrupt,16)   /* 1 IRQ + 8 NMI */
225	217
226	218	/* video hardware */

src/mame/drivers/model2.c

r4679	r4680
302	302	model2_intreq |= (1<<bit);
303	303	if (model2_intena & (1<<bit))
304	304	{
305		cpu_set_input_line(machine->cpu[0], I960_IRQ2, ASSERT_LINE);
	305	cputag_set_input_line(machine, "maincpu", I960_IRQ2, ASSERT_LINE);
306	306	}
307	307
308	308	model2_timervals[tnum] = 0;
r4679	r4680
848	848
849	849	static int snd_68k_ready_r(const address_space *space)
850	850	{
851		int sr = cpu_get_reg(space->machine->cpu[1], M68K_SR);
	851	int sr = cpu_get_reg(cputag_get_cpu(space->machine, "audiocpu"), M68K_SR);
852	852
853	853	if ((sr & 0x0700) > 0x0100)
854	854	{
r4679	r4680
868	868
869	869	to_68k = data;
870	870
871		cpu_set_input_line(space->machine->cpu[1], 2, HOLD_LINE);
	871	cputag_set_input_line(space->machine, "audiocpu", 2, HOLD_LINE);
872	872
873	873	// give the 68k time to notice
874	874	cpu_spinuntil_time(space->cpu, ATTOTIME_IN_USEC(40));
r4679	r4680
1713	1713	AM_RANGE(0x400000, 0x400001) AM_WRITE(model2snd_ctrl)
1714	1714	AM_RANGE(0x600000, 0x67ffff) AM_ROM AM_REGION("audiocpu", 0x80000)
1715	1715	AM_RANGE(0x800000, 0x9fffff) AM_ROM AM_REGION("scsp", 0)
1716		AM_RANGE(0xa00000, 0xdfffff) AM_READ(SMH_BANK4)
1717		AM_RANGE(0xe00000, 0xffffff) AM_READ(SMH_BANK5)
	1716	AM_RANGE(0xa00000, 0xdfffff) AM_READ(SMH_BANK(4))
	1717	AM_RANGE(0xe00000, 0xffffff) AM_READ(SMH_BANK(5))
1718	1718	ADDRESS_MAP_END
1719	1719
1720	1720	static int scsp_last_line = 0;
r4679	r4680
1724	1724	if (irq > 0)
1725	1725	{
1726	1726	scsp_last_line = irq;
1727		cpu_set_input_line(device->machine->cpu[1], irq, ASSERT_LINE);
	1727	cputag_set_input_line(device->machine, "audiocpu", irq, ASSERT_LINE);
1728	1728	}
1729	1729	else
1730		cpu_set_input_line(device->machine->cpu[1], -irq, CLEAR_LINE);
	1730	cputag_set_input_line(device->machine, "audiocpu", -irq, CLEAR_LINE);
1731	1731	}
1732	1732
1733	1733	static const scsp_interface scsp_config =
r4679	r4680
4407	4407
4408	4408	static DRIVER_INIT( genprot )
4409	4409	{
4410		memory_install_readwrite32_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x01d80000, 0x01dfffff, 0, 0, model2_prot_r, model2_prot_w);
	4410	memory_install_readwrite32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x01d80000, 0x01dfffff, 0, 0, model2_prot_r, model2_prot_w);
4411	4411	protstate = protpos = 0;
4412	4412	}
4413	4413
r4679	r4680
4415	4415	{
4416	4416	UINT32 *ROM = (UINT32 *)memory_region(machine, "maincpu");
4417	4417
4418		memory_install_readwrite32_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x01d80000, 0x01dfffff, 0, 0, model2_prot_r, model2_prot_w);
	4418	memory_install_readwrite32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x01d80000, 0x01dfffff, 0, 0, model2_prot_r, model2_prot_w);
4419	4419	protstate = protpos = 0;
4420	4420
4421	4421	// fix bug in program: it destroys the interrupt table and never fixes it
r4679	r4680
4426	4426	{
4427	4427	UINT32 *ROM = (UINT32 *)memory_region(machine, "maincpu");
4428	4428
4429		memory_install_readwrite32_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x01d80000, 0x01dfffff, 0, 0, model2_prot_r, model2_prot_w);
	4429	memory_install_readwrite32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x01d80000, 0x01dfffff, 0, 0, model2_prot_r, model2_prot_w);
4430	4430	protstate = protpos = 0;
4431	4431
4432	4432	// fix bug in program: it destroys the interrupt table and never fixes it
r4679	r4680
4435	4435
4436	4436	static DRIVER_INIT( daytonam )
4437	4437	{
4438		memory_install_read32_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x240000, 0x24ffff, 0, 0, maxx_r );
	4438	memory_install_read32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x240000, 0x24ffff, 0, 0, maxx_r );
4439	4439	}
4440	4440
4441	4441	static DRIVER_INIT( sgt24h )
4442	4442	{
4443	4443	UINT32 *ROM = (UINT32 *)memory_region(machine, "maincpu");
4444	4444
4445		memory_install_readwrite32_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x01d80000, 0x01dfffff, 0, 0, model2_prot_r, model2_prot_w);
	4445	memory_install_readwrite32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x01d80000, 0x01dfffff, 0, 0, model2_prot_r, model2_prot_w);
4446	4446	protstate = protpos = 0;
4447	4447
4448	4448	ROM[0x56578/4] = 0x08000004;
r4679	r4680
4453	4453	{
4454	4454	UINT32 *ROM = (UINT32 *)memory_region(machine, "maincpu");
4455	4455
4456		memory_install_readwrite32_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x01d80000, 0x01dfffff, 0, 0, model2_prot_r, model2_prot_w);
	4456	memory_install_readwrite32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x01d80000, 0x01dfffff, 0, 0, model2_prot_r, model2_prot_w);
4457	4457	protstate = protpos = 0;
4458	4458
4459	4459	ROM[0x630/4] = 0x08000004;

src/mame/drivers/bmcbowl.c

r4679	r4680
551	551
552	552	static DRIVER_INIT(bmcbowl)
553	553	{
554		colorram=auto_malloc(768);
	554	colorram = auto_alloc_array(machine, UINT8, 768);
555	555	}
556	556
557	557	GAME( 1994, bmcbowl,    0, bmcbowl,    bmcbowl,    bmcbowl, ROT0,  "BMC", "BMC Bowling", GAME_IMPERFECT_SOUND | GAME_IMPERFECT_GRAPHICS )

src/mame/drivers/ataxx.c

r4679	r4680
651	651	leland_rotate_memory(machine, "slave");
652	652
653	653	/* set up additional input ports */
654		memory_install_read8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_IO), 0x00, 0x03, 0, 0, ataxx_trackball_r);
	654	memory_install_read8_handler(cputag_get_address_space(machine, "master", ADDRESS_SPACE_IO), 0x00, 0x03, 0, 0, ataxx_trackball_r);
655	655	}
656	656
657	657
r4679	r4680
674	674	leland_rotate_memory(machine, "slave");
675	675
676	676	/* set up additional input ports */
677		memory_install_read8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_IO), 0x00, 0x03, 0, 0, ataxx_trackball_r);
	677	memory_install_read8_handler(cputag_get_address_space(machine, "master", ADDRESS_SPACE_IO), 0x00, 0x03, 0, 0, ataxx_trackball_r);
678	678	}
679	679
680	680
r4679	r4680
697	697	leland_rotate_memory(machine, "slave");
698	698
699	699	/* set up additional input ports */
700		memory_install_read_port_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_IO), 0x0d, 0x0d, 0, 0, "P1_P2");
701		memory_install_read_port_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_IO), 0x0e, 0x0e, 0, 0, "P3_P4");
702		memory_install_read_port_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_IO), 0x0f, 0x0f, 0, 0, "BUTTONS");
	700	memory_install_read_port_handler(cputag_get_address_space(machine, "master", ADDRESS_SPACE_IO), 0x0d, 0x0d, 0, 0, "P1_P2");
	701	memory_install_read_port_handler(cputag_get_address_space(machine, "master", ADDRESS_SPACE_IO), 0x0e, 0x0e, 0, 0, "P3_P4");
	702	memory_install_read_port_handler(cputag_get_address_space(machine, "master", ADDRESS_SPACE_IO), 0x0f, 0x0f, 0, 0, "BUTTONS");
703	703	}
704	704
705	705
r4679	r4680
722	722	leland_rotate_memory(machine, "slave");
723	723
724	724	/* set up additional input ports */
725		memory_install_read8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_IO), 0x00, 0x02, 0, 0, indyheat_wheel_r);
726		memory_install_read8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_IO), 0x08, 0x0b, 0, 0, indyheat_analog_r);
727		memory_install_read_port_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_IO), 0x0d, 0x0d, 0, 0, "P1");
728		memory_install_read_port_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_IO), 0x0e, 0x0e, 0, 0, "P2");
729		memory_install_read_port_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_IO), 0x0f, 0x0f, 0, 0, "P3");
	725	memory_install_read8_handler(cputag_get_address_space(machine, "master", ADDRESS_SPACE_IO), 0x00, 0x02, 0, 0, indyheat_wheel_r);
	726	memory_install_read8_handler(cputag_get_address_space(machine, "master", ADDRESS_SPACE_IO), 0x08, 0x0b, 0, 0, indyheat_analog_r);
	727	memory_install_read_port_handler(cputag_get_address_space(machine, "master", ADDRESS_SPACE_IO), 0x0d, 0x0d, 0, 0, "P1");
	728	memory_install_read_port_handler(cputag_get_address_space(machine, "master", ADDRESS_SPACE_IO), 0x0e, 0x0e, 0, 0, "P2");
	729	memory_install_read_port_handler(cputag_get_address_space(machine, "master", ADDRESS_SPACE_IO), 0x0f, 0x0f, 0, 0, "P3");
730	730
731	731	/* set up additional output ports */
732		memory_install_write8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_IO), 0x08, 0x0b, 0, 0, indyheat_analog_w);
	732	memory_install_write8_handler(cputag_get_address_space(machine, "master", ADDRESS_SPACE_IO), 0x08, 0x0b, 0, 0, indyheat_analog_w);
733	733	}
734	734
735	735
r4679	r4680
752	752	leland_rotate_memory(machine, "slave");
753	753
754	754	/* set up additional input ports */
755		memory_install_read_port_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_IO), 0x0d, 0x0d, 0, 0, "P2");
756		memory_install_read_port_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_IO), 0x0e, 0x0e, 0, 0, "P1");
757		memory_install_read_port_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_IO), 0x0f, 0x0f, 0, 0, "P3");
	755	memory_install_read_port_handler(cputag_get_address_space(machine, "master", ADDRESS_SPACE_IO), 0x0d, 0x0d, 0, 0, "P2");
	756	memory_install_read_port_handler(cputag_get_address_space(machine, "master", ADDRESS_SPACE_IO), 0x0e, 0x0e, 0, 0, "P1");
	757	memory_install_read_port_handler(cputag_get_address_space(machine, "master", ADDRESS_SPACE_IO), 0x0f, 0x0f, 0, 0, "P3");
758	758	}
759	759
760	760
r4679	r4680
777	777	leland_rotate_memory(machine, "slave");
778	778
779	779	/* asylum appears to have some extra RAM for the slave CPU */
780		memory_install_readwrite8_handler(cpu_get_address_space(machine->cpu[1], ADDRESS_SPACE_PROGRAM), 0xf000, 0xfffb, 0, 0, SMH_BANK4, SMH_BANK4);
781		memory_set_bankptr(machine, 4, auto_malloc(0x1000));
	780	memory_install_readwrite8_handler(cputag_get_address_space(machine, "slave", ADDRESS_SPACE_PROGRAM), 0xf000, 0xfffb, 0, 0, (read8_space_func)SMH_BANK(4), (write8_space_func)SMH_BANK(4));
	781	memory_set_bankptr(machine, 4, auto_alloc_array(machine, UINT8, 0x1000));
782	782
783	783	/* set up additional input ports */
784		memory_install_read_port_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_IO), 0x0d, 0x0d, 0, 0, "P2");
785		memory_install_read_port_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_IO), 0x0e, 0x0e, 0, 0, "P1");
786		memory_install_read_port_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_IO), 0x0f, 0x0f, 0, 0, "P3");
	784	memory_install_read_port_handler(cputag_get_address_space(machine, "master", ADDRESS_SPACE_IO), 0x0d, 0x0d, 0, 0, "P2");
	785	memory_install_read_port_handler(cputag_get_address_space(machine, "master", ADDRESS_SPACE_IO), 0x0e, 0x0e, 0, 0, "P1");
	786	memory_install_read_port_handler(cputag_get_address_space(machine, "master", ADDRESS_SPACE_IO), 0x0f, 0x0f, 0, 0, "P3");
787	787	}
788	788
789	789

src/mame/drivers/sshangha.c

r4679	r4680
65	65	WRITE16_HANDLER( sshangha_pf2_data_w );
66	66	WRITE16_HANDLER( sshangha_pf1_data_w );
67	67	WRITE16_HANDLER( sshangha_control_0_w );
68		WRITE16_HANDLER( sshangha_palette_24bit_w );
69		WRITE16_HANDLER (sshangha_video_w);
	68	WRITE16_HANDLER( sshangha_video_w );
70	69
71	70	extern UINT16 *sshangha_pf1_data;
72	71	extern UINT16 *sshangha_pf2_data;
r4679	r4680
83	82	logerror("CPU #0 PC %06x: warning - write unmapped control address %06x %04x\n",cpu_get_pc(space->cpu),offset<<1,data);
84	83
85	84	if (offset == (0x260 >> 1)) {
86		//soundlatch_w(0,data&0xff);
87		//cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_NMI, PULSE_LINE);
	85	//soundlatch_w(0, data & 0xff);
	86	//cputag_set_input_line(space->machine, "audiocpu", INPUT_LINE_NMI, PULSE_LINE);
88	87	}
89	88	}
90	89
91	90	static WRITE16_HANDLER( sshangha_sound_w )
92	91	{
93		soundlatch_w(space,0,data&0xff);
94		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_NMI, PULSE_LINE);
	92	soundlatch_w(space, 0, data & 0xff);
	93	cputag_set_input_line(space->machine, "audiocpu", INPUT_LINE_NMI, PULSE_LINE);
95	94	}
96	95
97	96	/* Protection/IO chip 146 */
r4679	r4680
137	136
138	137	static MACHINE_RESET( sshangha )
139	138	{
140		const address_space *space = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM);
	139	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
141	140	/* Such thing is needed as there is no code to turn the screen
142	141	to normal orientation when the game is reset.
143	142	I'm using the value that forces the screen to be in normal
r4679	r4680
149	148
150	149	/******************************************************************************/
151	150
152		static ADDRESS_MAP_START( sshangha_readmem, ADDRESS_SPACE_PROGRAM, 16 )
153		AM_RANGE(0x000000, 0x03ffff) AM_READ(SMH_ROM)
154
	151	static ADDRESS_MAP_START( sshangha_map, ADDRESS_SPACE_PROGRAM, 16 )
	152	AM_RANGE(0x000000, 0x03ffff) AM_ROM
155	153	AM_RANGE(0x084000, 0x0847ff) AM_READ(sshanghb_protection16_r)
156		AM_RANGE(0x101000, 0x101001) AM_READ(deco_71_r)//bootleg hack
157
158		AM_RANGE(0x200000, 0x207fff) AM_READ(SMH_RAM)
159		AM_RANGE(0x340000, 0x340fff) AM_READ(SMH_RAM)
160		AM_RANGE(0x350000, 0x350001) AM_READ(deco_71_r)
161		AM_RANGE(0x360000, 0x360fff) AM_READ(SMH_RAM)
162		AM_RANGE(0x370000, 0x370001) AM_READ(deco_71_r)
163		AM_RANGE(0x380000, 0x383fff) AM_READ(SMH_RAM)
164		AM_RANGE(0xfec000, 0xff3fff) AM_READ(SMH_RAM)
165		AM_RANGE(0xff4000, 0xff47ff) AM_READ(sshangha_protection16_r)
166		ADDRESS_MAP_END
167
168		static ADDRESS_MAP_START( sshangha_writemem, ADDRESS_SPACE_PROGRAM, 16 )
169		AM_RANGE(0x000000, 0x03ffff) AM_WRITE(SMH_ROM)
170	154	AM_RANGE(0x10000c, 0x10000d) AM_WRITE(sshangha_sound_w)
	155	AM_RANGE(0x101000, 0x101001) AM_READ(deco_71_r)//bootleg hack
171	156	AM_RANGE(0x10100c, 0x10100d) AM_WRITE(sshangha_sound_w)   /* the bootleg writes here */
172		AM_RANGE(0x200000, 0x201fff) AM_WRITE(sshangha_pf1_data_w) AM_BASE(&sshangha_pf1_data)
173		AM_RANGE(0x202000, 0x203fff) AM_WRITE(sshangha_pf2_data_w) AM_BASE(&sshangha_pf2_data)
174		AM_RANGE(0x204000, 0x2047ff) AM_WRITE(SMH_RAM) AM_BASE(&sshangha_pf1_rowscroll)
175		AM_RANGE(0x206000, 0x2067ff) AM_WRITE(SMH_RAM) AM_BASE(&sshangha_pf2_rowscroll)
	157
	158	AM_RANGE(0x200000, 0x201fff) AM_RAM_WRITE(sshangha_pf1_data_w) AM_BASE(&sshangha_pf1_data)
	159	AM_RANGE(0x202000, 0x203fff) AM_RAM_WRITE(sshangha_pf2_data_w) AM_BASE(&sshangha_pf2_data)
	160	AM_RANGE(0x204000, 0x2047ff) AM_RAM AM_BASE(&sshangha_pf1_rowscroll)
	161	AM_RANGE(0x206000, 0x2067ff) AM_RAM AM_BASE(&sshangha_pf2_rowscroll)
	162	AM_RANGE(0x206800, 0x207fff) AM_RAM
176	163	AM_RANGE(0x300000, 0x30000f) AM_WRITE(sshangha_control_0_w)
177	164	AM_RANGE(0x320000, 0x320001) AM_WRITE(sshangha_video_w)
178	165	AM_RANGE(0x320002, 0x320005) AM_WRITENOP
179		AM_RANGE(0x340000, 0x340fff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16)
	166
	167	AM_RANGE(0x340000, 0x340fff) AM_RAM AM_BASE(&spriteram16)
	168	AM_RANGE(0x350000, 0x350001) AM_READ(deco_71_r)
180	169	AM_RANGE(0x350000, 0x350007) AM_WRITENOP
181		AM_RANGE(0x360000, 0x360fff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16_2)
	170	AM_RANGE(0x360000, 0x360fff) AM_RAM AM_BASE(&spriteram16_2)
	171	AM_RANGE(0x370000, 0x370001) AM_READ(deco_71_r)
182	172	AM_RANGE(0x370000, 0x370007) AM_WRITENOP
183		AM_RANGE(0x380000, 0x383fff) AM_WRITE(sshangha_palette_24bit_w) AM_BASE(&paletteram16)
184		AM_RANGE(0x3c0000, 0x3c0fff) AM_WRITE(SMH_RAM)   /* Sprite ram buffer on bootleg only?? */
185		AM_RANGE(0xfec000, 0xff3fff) AM_WRITE(SMH_RAM)
186		AM_RANGE(0xff4000, 0xff47ff) AM_WRITE(sshangha_protection16_w) AM_BASE(&sshangha_prot_data)
	173	AM_RANGE(0x380000, 0x383fff) AM_RAM_WRITE(paletteram16_xbgr_word_be_w) AM_BASE(&paletteram16)
	174	AM_RANGE(0x3c0000, 0x3c0fff) AM_RAM   /* Sprite ram buffer on bootleg only?? */
	175	AM_RANGE(0xfec000, 0xff3fff) AM_RAM
	176	AM_RANGE(0xff4000, 0xff47ff) AM_READWRITE(sshangha_protection16_r,sshangha_protection16_w) AM_BASE(&sshangha_prot_data)
187	177	ADDRESS_MAP_END
188	178
189	179	/******************************************************************************/
190	180
191		static ADDRESS_MAP_START( sound_readmem, ADDRESS_SPACE_PROGRAM, 8 )
192		AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM)
193		AM_RANGE(0xc000, 0xc001) AM_DEVREAD("ym", ym2203_r)
194		AM_RANGE(0xf800, 0xffff) AM_READ(SMH_RAM)
	181	static ADDRESS_MAP_START( sound_map, ADDRESS_SPACE_PROGRAM, 8 )
	182	AM_RANGE(0x0000, 0x7fff) AM_ROM
	183	AM_RANGE(0xc000, 0xc001) AM_DEVREADWRITE("ym", ym2203_r,ym2203_w)
	184	AM_RANGE(0xf800, 0xffff) AM_RAM
195	185	//  AM_RANGE(0xf800, 0xf800) AM_READ(soundlatch_r)
196	186	ADDRESS_MAP_END
197	187
198		static ADDRESS_MAP_START( sound_writemem, ADDRESS_SPACE_PROGRAM, 8 )
199		AM_RANGE(0x0000, 0x7fff) AM_WRITE(SMH_ROM)
200		AM_RANGE(0xc000, 0xc001) AM_DEVWRITE("ym", ym2203_w)
201		AM_RANGE(0xf800, 0xffff) AM_WRITE(SMH_RAM)
202		ADDRESS_MAP_END
203
204	188	/******************************************************************************/
205	189
206	190	static INPUT_PORTS_START( sshangha )
r4679	r4680
325	309
326	310	static void irqhandler(const device_config *device, int state)
327	311	{
328		cpu_set_input_line(device->machine->cpu[1],0,state);
	312	cputag_set_input_line(device->machine, "audiocpu", 0, state);
329	313	}
330	314
331	315	static const ym2203_interface ym2203_config =
r4679	r4680
342	326
343	327	/* basic machine hardware */
344	328	MDRV_CPU_ADD("maincpu", M68000, 28000000/2)
345		MDRV_CPU_PROGRAM_MAP(sshangha_readmem,sshangha_writemem)
	329	MDRV_CPU_PROGRAM_MAP(sshangha_map,0)
346	330	MDRV_CPU_VBLANK_INT("screen", irq6_line_hold)
347	331
348	332	MDRV_CPU_ADD("audiocpu", Z80, 16000000/4)
349		MDRV_CPU_PROGRAM_MAP(sound_readmem,sound_writemem)
	333	MDRV_CPU_PROGRAM_MAP(sound_map,0)
350	334
351	335	MDRV_MACHINE_RESET(sshangha)   /* init machine */
352	336

src/mame/drivers/wiping.c

r4679	r4680
88	88	static WRITE8_HANDLER( subcpu_reset_w )
89	89	{
90	90	if (data & 1)
91		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_RESET, CLEAR_LINE);
	91	cputag_set_input_line(space->machine, "audiocpu", INPUT_LINE_RESET, CLEAR_LINE);
92	92	else
93		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_RESET, ASSERT_LINE);
	93	cputag_set_input_line(space->machine, "audiocpu", INPUT_LINE_RESET, ASSERT_LINE);
94	94	}
95	95
96	96

src/mame/drivers/kyugo.c

r4679	r4680
39	39
40	40	MACHINE_RESET( kyugo )
41	41	{
42		const address_space *space = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM);
	42	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
43	43	// must start with interrupts and sub CPU disabled
44		cpu_interrupt_enable(machine->cpu[0], 0);
	44	cpu_interrupt_enable(cputag_get_cpu(machine, "maincpu"), 0);
45	45	kyugo_sub_cpu_control_w(space, 0, 0);
46	46	}
47	47
48	48
49	49	WRITE8_HANDLER( kyugo_sub_cpu_control_w )
50	50	{
51		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_HALT, data ? CLEAR_LINE : ASSERT_LINE);
	51	cputag_set_input_line(space->machine, "sub", INPUT_LINE_HALT, data ? CLEAR_LINE : ASSERT_LINE);
52	52	}
53	53
54	54
r4679	r4680
1204	1204	static DRIVER_INIT( gyrodine )
1205	1205	{
1206	1206	/* add watchdog */
1207		memory_install_write8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xe000, 0xe000, 0, 0, watchdog_reset_w);
	1207	memory_install_write8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xe000, 0xe000, 0, 0, watchdog_reset_w);
1208	1208	}
1209	1209
1210	1210
1211	1211	static DRIVER_INIT( srdmissn )
1212	1212	{
1213	1213	/* shared RAM is mapped at 0xe000 as well  */
1214		memory_install_readwrite8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xe000, 0xe7ff, 0, 0, SMH_BANK1, SMH_BANK1);
	1214	memory_install_readwrite8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xe000, 0xe7ff, 0, 0, (read8_space_func)SMH_BANK(1), (write8_space_func)SMH_BANK(1));
1215	1215	memory_set_bankptr(machine, 1, shared_ram);
1216	1216
1217	1217	/* extra RAM on sub CPU  */
1218		memory_install_readwrite8_handler(cpu_get_address_space(machine->cpu[1], ADDRESS_SPACE_PROGRAM), 0x8800, 0x8fff, 0, 0, SMH_BANK2, SMH_BANK2);
1219		memory_set_bankptr(machine, 2, auto_malloc(0x800));
	1218	memory_install_readwrite8_handler(cputag_get_address_space(machine, "sub", ADDRESS_SPACE_PROGRAM), 0x8800, 0x8fff, 0, 0, (read8_space_func)SMH_BANK(2), (write8_space_func)SMH_BANK(2));
	1219	memory_set_bankptr(machine, 2, auto_alloc_array(machine, UINT8, 0x800));
1220	1220	}
1221	1221
1222	1222

src/mame/drivers/leland.c

r4679	r4680
1839	1839	static void init_master_ports(running_machine *machine, UINT8 mvram_base, UINT8 io_base)
1840	1840	{
1841	1841	/* set up the master CPU VRAM I/O */
1842		memory_install_readwrite8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_IO), mvram_base, mvram_base + 0x1f, 0, 0, leland_mvram_port_r, leland_mvram_port_w);
	1842	memory_install_readwrite8_handler(cputag_get_address_space(machine, "master", ADDRESS_SPACE_IO), mvram_base, mvram_base + 0x1f, 0, 0, leland_mvram_port_r, leland_mvram_port_w);
1843	1843
1844	1844	/* set up the master CPU I/O ports */
1845		memory_install_read8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_IO), io_base, io_base + 0x1f, 0, 0, leland_master_input_r);
1846		memory_install_write8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_IO), io_base, io_base + 0x0f, 0, 0, leland_master_output_w);
	1845	memory_install_read8_handler(cputag_get_address_space(machine, "master", ADDRESS_SPACE_IO), io_base, io_base + 0x1f, 0, 0, leland_master_input_r);
	1846	memory_install_write8_handler(cputag_get_address_space(machine, "master", ADDRESS_SPACE_IO), io_base, io_base + 0x0f, 0, 0, leland_master_output_w);
1847	1847	}
1848	1848
1849	1849
r4679	r4680
1878	1878	init_master_ports(machine, 0x40, 0x80);
1879	1879
1880	1880	/* set up additional input ports */
1881		memory_install_read8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_IO), 0x80, 0x80, 0, 0, cerberus_dial_1_r);
1882		memory_install_read8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_IO), 0x90, 0x90, 0, 0, cerberus_dial_2_r);
	1881	memory_install_read8_handler(cputag_get_address_space(machine, "master", ADDRESS_SPACE_IO), 0x80, 0x80, 0, 0, cerberus_dial_1_r);
	1882	memory_install_read8_handler(cputag_get_address_space(machine, "master", ADDRESS_SPACE_IO), 0x90, 0x90, 0, 0, cerberus_dial_2_r);
1883	1883	}
1884	1884
1885	1885
r4679	r4680
1998	1998	/* kludge warning: the game uses location E0CA to determine if the joysticks are available */
1999	1999	/* it gets cleared by the code, but there is no obvious way for the value to be set to a */
2000	2000	/* non-zero value. If the value is zero, the joystick is never read. */
2001		alleymas_kludge_mem = memory_install_write8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xe0ca, 0xe0ca, 0, 0, alleymas_joystick_kludge);
	2001	alleymas_kludge_mem = memory_install_write8_handler(cputag_get_address_space(machine, "master", ADDRESS_SPACE_PROGRAM), 0xe0ca, 0xe0ca, 0, 0, alleymas_joystick_kludge);
2002	2002	}
2003	2003
2004	2004
r4679	r4680
2051	2051	init_master_ports(machine, 0x40, 0x80);
2052	2052
2053	2053	/* set up additional input ports */
2054		memory_install_read8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_IO), 0xf4, 0xf4, 0, 0, dangerz_input_upper_r);
2055		memory_install_read8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_IO), 0xf8, 0xf8, 0, 0, dangerz_input_y_r);
2056		memory_install_read8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_IO), 0xfc, 0xfc, 0, 0, dangerz_input_x_r);
	2054	memory_install_read8_handler(cputag_get_address_space(machine, "master", ADDRESS_SPACE_IO), 0xf4, 0xf4, 0, 0, dangerz_input_upper_r);
	2055	memory_install_read8_handler(cputag_get_address_space(machine, "master", ADDRESS_SPACE_IO), 0xf8, 0xf8, 0, 0, dangerz_input_y_r);
	2056	memory_install_read8_handler(cputag_get_address_space(machine, "master", ADDRESS_SPACE_IO), 0xfc, 0xfc, 0, 0, dangerz_input_x_r);
2057	2057	}
2058	2058
2059	2059
r4679	r4680
2144	2144	init_master_ports(machine, 0x00, 0xc0);
2145	2145
2146	2146	/* set up additional input ports */
2147		memory_install_read8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_IO), 0xc0, 0xc0, 0, 0, redline_pedal_1_r);
2148		memory_install_read8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_IO), 0xd0, 0xd0, 0, 0, redline_pedal_2_r);
2149		memory_install_read8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_IO), 0xf8, 0xf8, 0, 0, redline_wheel_2_r);
2150		memory_install_read8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_IO), 0xfb, 0xfb, 0, 0, redline_wheel_1_r);
	2147	memory_install_read8_handler(cputag_get_address_space(machine, "master", ADDRESS_SPACE_IO), 0xc0, 0xc0, 0, 0, redline_pedal_1_r);
	2148	memory_install_read8_handler(cputag_get_address_space(machine, "master", ADDRESS_SPACE_IO), 0xd0, 0xd0, 0, 0, redline_pedal_2_r);
	2149	memory_install_read8_handler(cputag_get_address_space(machine, "master", ADDRESS_SPACE_IO), 0xf8, 0xf8, 0, 0, redline_wheel_2_r);
	2150	memory_install_read8_handler(cputag_get_address_space(machine, "master", ADDRESS_SPACE_IO), 0xfb, 0xfb, 0, 0, redline_wheel_1_r);
2151	2151	}
2152	2152
2153	2153
r4679	r4680
2202	2202	init_master_ports(machine, 0x00, 0xc0);
2203	2203
2204	2204	/* set up additional input ports */
2205		memory_install_read8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_IO), 0xa4, 0xa4, 0, 0, dangerz_input_upper_r);
2206		memory_install_read8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_IO), 0xb8, 0xb8, 0, 0, dangerz_input_y_r);
2207		memory_install_read8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_IO), 0xbc, 0xbc, 0, 0, dangerz_input_x_r);
	2205	memory_install_read8_handler(cputag_get_address_space(machine, "master", ADDRESS_SPACE_IO), 0xa4, 0xa4, 0, 0, dangerz_input_upper_r);
	2206	memory_install_read8_handler(cputag_get_address_space(machine, "master", ADDRESS_SPACE_IO), 0xb8, 0xb8, 0, 0, dangerz_input_y_r);
	2207	memory_install_read8_handler(cputag_get_address_space(machine, "master", ADDRESS_SPACE_IO), 0xbc, 0xbc, 0, 0, dangerz_input_x_r);
2208	2208	}
2209	2209
2210	2210
r4679	r4680
2233	2233	init_master_ports(machine, 0x40, 0x80);
2234	2234
2235	2235	/* set up additional input ports */
2236		memory_install_read_port_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_IO), 0x7c, 0x7c, 0, 0, "IN4");
2237		memory_install_read_port_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_IO), 0x7f, 0x7f, 0, 0, "IN5");
	2236	memory_install_read_port_handler(cputag_get_address_space(machine, "master", ADDRESS_SPACE_IO), 0x7c, 0x7c, 0, 0, "IN4");
	2237	memory_install_read_port_handler(cputag_get_address_space(machine, "master", ADDRESS_SPACE_IO), 0x7f, 0x7f, 0, 0, "IN5");
2238	2238	}
2239	2239
2240	2240
r4679	r4680
2263	2263	init_master_ports(machine, 0x00, 0xc0);
2264	2264
2265	2265	/* set up additional input ports */
2266		memory_install_read_port_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_IO), 0x7c, 0x7c, 0, 0, "IN4");
2267		memory_install_read_port_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_IO), 0x7f, 0x7f, 0, 0, "IN5");
	2266	memory_install_read_port_handler(cputag_get_address_space(machine, "master", ADDRESS_SPACE_IO), 0x7c, 0x7c, 0, 0, "IN4");
	2267	memory_install_read_port_handler(cputag_get_address_space(machine, "master", ADDRESS_SPACE_IO), 0x7f, 0x7f, 0, 0, "IN5");
2268	2268	}
2269	2269
2270	2270
r4679	r4680
2293	2293	init_master_ports(machine, 0x80, 0x40);
2294	2294
2295	2295	/* set up additional input ports */
2296		memory_install_read_port_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_IO), 0x7c, 0x7c, 0, 0, "IN4");
2297		memory_install_read_port_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_IO), 0x7f, 0x7f, 0, 0, "IN5");
	2296	memory_install_read_port_handler(cputag_get_address_space(machine, "master", ADDRESS_SPACE_IO), 0x7c, 0x7c, 0, 0, "IN4");
	2297	memory_install_read_port_handler(cputag_get_address_space(machine, "master", ADDRESS_SPACE_IO), 0x7f, 0x7f, 0, 0, "IN5");
2298	2298	}
2299	2299
2300	2300
r4679	r4680
2323	2323	init_master_ports(machine, 0x00, 0x40);
2324	2324
2325	2325	/* set up additional input ports */
2326		memory_install_read_port_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_IO), 0x7c, 0x7c, 0, 0, "IN4");
2327		memory_install_read_port_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_IO), 0x7f, 0x7f, 0, 0, "IN5");
	2326	memory_install_read_port_handler(cputag_get_address_space(machine, "master", ADDRESS_SPACE_IO), 0x7c, 0x7c, 0, 0, "IN4");
	2327	memory_install_read_port_handler(cputag_get_address_space(machine, "master", ADDRESS_SPACE_IO), 0x7f, 0x7f, 0, 0, "IN5");
2328	2328	}
2329	2329
2330	2330
r4679	r4680
2359	2359	init_master_ports(machine, 0x40, 0x80);   /* yes, this is intentional */
2360	2360
2361	2361	/* set up additional input ports */
2362		memory_install_read8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_IO), 0xf8, 0xf8, 0, 0, offroad_wheel_3_r);
2363		memory_install_read8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_IO), 0xf9, 0xf9, 0, 0, offroad_wheel_1_r);
2364		memory_install_read8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_IO), 0xfb, 0xfb, 0, 0, offroad_wheel_2_r);
	2362	memory_install_read8_handler(cputag_get_address_space(machine, "master", ADDRESS_SPACE_IO), 0xf8, 0xf8, 0, 0, offroad_wheel_3_r);
	2363	memory_install_read8_handler(cputag_get_address_space(machine, "master", ADDRESS_SPACE_IO), 0xf9, 0xf9, 0, 0, offroad_wheel_1_r);
	2364	memory_install_read8_handler(cputag_get_address_space(machine, "master", ADDRESS_SPACE_IO), 0xfb, 0xfb, 0, 0, offroad_wheel_2_r);
2365	2365	}
2366	2366
2367	2367
r4679	r4680
2395	2395	init_master_ports(machine, 0x80, 0x40);
2396	2396
2397	2397	/* set up additional input ports */
2398		memory_install_read8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_IO), 0xf8, 0xf8, 0, 0, offroad_wheel_3_r);
2399		memory_install_read8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_IO), 0xf9, 0xf9, 0, 0, offroad_wheel_1_r);
2400		memory_install_read8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_IO), 0xfb, 0xfb, 0, 0, offroad_wheel_2_r);
	2398	memory_install_read8_handler(cputag_get_address_space(machine, "master", ADDRESS_SPACE_IO), 0xf8, 0xf8, 0, 0, offroad_wheel_3_r);
	2399	memory_install_read8_handler(cputag_get_address_space(machine, "master", ADDRESS_SPACE_IO), 0xf9, 0xf9, 0, 0, offroad_wheel_1_r);
	2400	memory_install_read8_handler(cputag_get_address_space(machine, "master", ADDRESS_SPACE_IO), 0xfb, 0xfb, 0, 0, offroad_wheel_2_r);
2401	2401	}
2402	2402
2403	2403
r4679	r4680
2429	2429	init_master_ports(machine, 0x00, 0x40);
2430	2430
2431	2431	/* set up additional input ports */
2432		memory_install_read_port_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_IO), 0x7f, 0x7f, 0, 0, "IN4");
	2432	memory_install_read_port_handler(cputag_get_address_space(machine, "master", ADDRESS_SPACE_IO), 0x7f, 0x7f, 0, 0, "IN4");
2433	2433	}
2434	2434
2435	2435

src/mame/drivers/pcat_nit.c

r4679	r4680
190	190
191	191	static DMA8237_MEM_READ( pc_dma_read_byte )
192	192	{
193		const address_space *space = cpu_get_address_space(device->machine->cpu[0], ADDRESS_SPACE_PROGRAM);
	193	const address_space *space = cputag_get_address_space(device->machine, "maincpu", ADDRESS_SPACE_PROGRAM);
194	194	offs_t page_offset = (((offs_t) dma_offset[0][channel]) << 16)
195	195	& 0xFF0000;
196	196
r4679	r4680
200	200
201	201	static DMA8237_MEM_WRITE( pc_dma_write_byte )
202	202	{
203		const address_space *space = cpu_get_address_space(device->machine->cpu[0], ADDRESS_SPACE_PROGRAM);
	203	const address_space *space = cputag_get_address_space(device->machine, "maincpu", ADDRESS_SPACE_PROGRAM);
204	204	offs_t page_offset = (((offs_t) dma_offset[0][channel]) << 16)
205	205	& 0xFF0000;
206	206
r4679	r4680
211	211	{
212	212	UINT8 data = at_pages[offset % 0x10];
213	213
214		switch(offset % 8) {
	214	switch(offset % 8)
	215	{
215	216	case 1:
216	217	data = dma_offset[(offset / 8) & 1][2];
217	218	break;
r4679	r4680
233	234	{
234	235	at_pages[offset % 0x10] = data;
235	236
236		switch(offset % 8) {
	237	switch(offset % 8)
	238	{
237	239	case 1:
238	240	dma_offset[(offset / 8) & 1][2] = data;
239	241	break;
r4679	r4680
281	283	8259 IRQ controller
282	284	******************/
283	285
284		static PIC8259_SET_INT_LINE( pic8259_1_set_int_line ) {
285		cpu_set_input_line(device->machine->cpu[0], 0, interrupt ? HOLD_LINE : CLEAR_LINE);
	286	static PIC8259_SET_INT_LINE( pic8259_1_set_int_line )
	287	{
	288	cputag_set_input_line(device->machine, "maincpu", 0, interrupt ? HOLD_LINE : CLEAR_LINE);
286	289	}
287	290
288	291	static const struct pic8259_interface pic8259_1_config = {
289	292	pic8259_1_set_int_line
290	293	};
291	294
292		static PIC8259_SET_INT_LINE( pic8259_2_set_int_line ) {
	295	static PIC8259_SET_INT_LINE( pic8259_2_set_int_line )
	296	{
293	297	pic8259_set_irq_line( streetg2_devices.pic8259_1, 2, interrupt);
294	298	}
295	299
r4679	r4680
310	314
311	315	static PIT8253_OUTPUT_CHANGED( at_pit8254_out0_changed )
312	316	{
313		if ( streetg2_devices.pic8259_1 ) {
	317	if ( streetg2_devices.pic8259_1 )
	318	{
314	319	pic8259_set_irq_line(streetg2_devices.pic8259_1, 0, state);
315	320	}
316	321	}
r4679	r4680
514	519	//todo: 256 colors
515	520	}
516	521
517		static void streetg2_set_keyb_int(running_machine *machine, int state) {
	522	static void streetg2_set_keyb_int(running_machine *machine, int state)
	523	{
518	524	pic8259_set_irq_line(streetg2_devices.pic8259_1, 1, state);
519	525	}
520	526
r4679	r4680
524	530	//  bank = -1;
525	531	//  lastvalue = -1;
526	532	//  hv_blank = 0;
527		cpu_set_irq_callback(machine->cpu[0], irq_callback);
	533	cpu_set_irq_callback(cputag_get_cpu(machine, "maincpu"), irq_callback);
528	534	streetg2_devices.pit8253 = devtag_get_device( machine, "pit8254" );
529	535	streetg2_devices.pic8259_1 = devtag_get_device( machine, "pic8259_1" );
530	536	streetg2_devices.pic8259_2 = devtag_get_device( machine, "pic8259_2" );

src/mame/drivers/popeye.c

r4679	r4680
80	80
81	81
82	82
83		static ADDRESS_MAP_START( skyskipr_readmem, ADDRESS_SPACE_PROGRAM, 8 )
84		AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM)
85		AM_RANGE(0x8000, 0x87ff) AM_READ(SMH_RAM)
86		AM_RANGE(0x8c00, 0x8e7f) AM_READ(SMH_RAM)
87		AM_RANGE(0x8e80, 0x8fff) AM_READ(SMH_RAM)
88		AM_RANGE(0xe000, 0xe001) AM_READ(protection_r)
89		ADDRESS_MAP_END
90
91		static ADDRESS_MAP_START( skyskipr_writemem, ADDRESS_SPACE_PROGRAM, 8 )
92		AM_RANGE(0x0000, 0x7fff) AM_WRITE(SMH_ROM)
93		AM_RANGE(0x8000, 0x87ff) AM_WRITE(SMH_RAM)
94		AM_RANGE(0x8c00, 0x8c02) AM_WRITE(SMH_RAM) AM_BASE(&popeye_background_pos)
95		AM_RANGE(0x8c03, 0x8c03) AM_WRITE(SMH_RAM) AM_BASE(&popeye_palettebank)
96		AM_RANGE(0x8c04, 0x8e7f) AM_WRITE(SMH_RAM) AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
97		AM_RANGE(0x8e80, 0x8fff) AM_WRITE(SMH_RAM)
	83	static ADDRESS_MAP_START( skyskipr_map, ADDRESS_SPACE_PROGRAM, 8 )
	84	AM_RANGE(0x0000, 0x7fff) AM_ROM
	85	AM_RANGE(0x8000, 0x87ff) AM_RAM
	86	AM_RANGE(0x8c00, 0x8c02) AM_RAM AM_BASE(&popeye_background_pos)
	87	AM_RANGE(0x8c03, 0x8c03) AM_RAM AM_BASE(&popeye_palettebank)
	88	AM_RANGE(0x8c04, 0x8e7f) AM_RAM AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
	89	AM_RANGE(0x8e80, 0x8fff) AM_RAM
98	90	AM_RANGE(0xa000, 0xa3ff) AM_WRITE(popeye_videoram_w) AM_BASE(&videoram)
99	91	AM_RANGE(0xa400, 0xa7ff) AM_WRITE(popeye_colorram_w) AM_BASE(&colorram)
100	92	AM_RANGE(0xc000, 0xcfff) AM_WRITE(skyskipr_bitmap_w)
101		AM_RANGE(0xe000, 0xe001) AM_WRITE(protection_w)
	93	AM_RANGE(0xe000, 0xe001) AM_READWRITE(protection_r,protection_w)
102	94	ADDRESS_MAP_END
103	95
104		static ADDRESS_MAP_START( popeye_readmem, ADDRESS_SPACE_PROGRAM, 8 )
105		AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM)
106		AM_RANGE(0x8000, 0x87ff) AM_READ(SMH_RAM)
107		AM_RANGE(0x8800, 0x8bff) AM_READ(SMH_RAM)
108		AM_RANGE(0x8c00, 0x8e7f) AM_READ(SMH_RAM)
109		AM_RANGE(0x8e80, 0x8fff) AM_READ(SMH_RAM)
110		AM_RANGE(0xe000, 0xe001) AM_READ(protection_r)
111		ADDRESS_MAP_END
112
113		static ADDRESS_MAP_START( popeye_writemem, ADDRESS_SPACE_PROGRAM, 8 )
114		AM_RANGE(0x0000, 0x7fff) AM_WRITE(SMH_ROM)
115		AM_RANGE(0x8000, 0x87ff) AM_WRITE(SMH_RAM)
116		AM_RANGE(0x8800, 0x8bff) AM_WRITE(SMH_RAM)
117		AM_RANGE(0x8c00, 0x8c02) AM_WRITE(SMH_RAM) AM_BASE(&popeye_background_pos)
118		AM_RANGE(0x8c03, 0x8c03) AM_WRITE(SMH_RAM) AM_BASE(&popeye_palettebank)
119		AM_RANGE(0x8c04, 0x8e7f) AM_WRITE(SMH_RAM) AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
120		AM_RANGE(0x8e80, 0x8fff) AM_WRITE(SMH_RAM)
	96	static ADDRESS_MAP_START( popeye_map, ADDRESS_SPACE_PROGRAM, 8 )
	97	AM_RANGE(0x0000, 0x7fff) AM_ROM
	98	AM_RANGE(0x8000, 0x87ff) AM_RAM
	99	AM_RANGE(0x8800, 0x8bff) AM_RAM
	100	AM_RANGE(0x8c00, 0x8c02) AM_RAM AM_BASE(&popeye_background_pos)
	101	AM_RANGE(0x8c03, 0x8c03) AM_RAM AM_BASE(&popeye_palettebank)
	102	AM_RANGE(0x8c04, 0x8e7f) AM_RAM AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
	103	AM_RANGE(0x8e80, 0x8fff) AM_RAM
121	104	AM_RANGE(0xa000, 0xa3ff) AM_WRITE(popeye_videoram_w) AM_BASE(&videoram)
122	105	AM_RANGE(0xa400, 0xa7ff) AM_WRITE(popeye_colorram_w) AM_BASE(&colorram)
123	106	AM_RANGE(0xc000, 0xdfff) AM_WRITE(popeye_bitmap_w)
124		AM_RANGE(0xe000, 0xe001) AM_WRITE(protection_w)
	107	AM_RANGE(0xe000, 0xe001) AM_READWRITE(protection_r,protection_w)
125	108	ADDRESS_MAP_END
126	109
127		static ADDRESS_MAP_START( popeyebl_readmem, ADDRESS_SPACE_PROGRAM, 8 )
128		AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM)
129		AM_RANGE(0x8000, 0x87ff) AM_READ(SMH_RAM)
130		AM_RANGE(0x8c00, 0x8e7f) AM_READ(SMH_RAM)
131		AM_RANGE(0x8e80, 0x8fff) AM_READ(SMH_RAM)
132		AM_RANGE(0xe000, 0xe01f) AM_READ(SMH_ROM)
133		ADDRESS_MAP_END
134
135		static ADDRESS_MAP_START( popeyebl_writemem, ADDRESS_SPACE_PROGRAM, 8 )
136		AM_RANGE(0x0000, 0x7fff) AM_WRITE(SMH_ROM)
137		AM_RANGE(0x8000, 0x87ff) AM_WRITE(SMH_RAM)
138		AM_RANGE(0x8c00, 0x8c02) AM_WRITE(SMH_RAM) AM_BASE(&popeye_background_pos)
139		AM_RANGE(0x8c03, 0x8c03) AM_WRITE(SMH_RAM) AM_BASE(&popeye_palettebank)
140		AM_RANGE(0x8c04, 0x8e7f) AM_WRITE(SMH_RAM) AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
141		AM_RANGE(0x8e80, 0x8fff) AM_WRITE(SMH_RAM)
	110	static ADDRESS_MAP_START( popeyebl_map, ADDRESS_SPACE_PROGRAM, 8 )
	111	AM_RANGE(0x0000, 0x7fff) AM_ROM
	112	AM_RANGE(0x8000, 0x87ff) AM_RAM
	113	AM_RANGE(0x8c00, 0x8c02) AM_RAM AM_BASE(&popeye_background_pos)
	114	AM_RANGE(0x8c03, 0x8c03) AM_RAM AM_BASE(&popeye_palettebank)
	115	AM_RANGE(0x8c04, 0x8e7f) AM_RAM AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
	116	AM_RANGE(0x8e80, 0x8fff) AM_RAM
142	117	AM_RANGE(0xa000, 0xa3ff) AM_WRITE(popeye_videoram_w) AM_BASE(&videoram)
143	118	AM_RANGE(0xa400, 0xa7ff) AM_WRITE(popeye_colorram_w) AM_BASE(&colorram)
144	119	AM_RANGE(0xc000, 0xcfff) AM_WRITE(skyskipr_bitmap_w)
145		AM_RANGE(0xe000, 0xe01f) AM_WRITE(SMH_ROM)
	120	AM_RANGE(0xe000, 0xe01f) AM_ROM
146	121	ADDRESS_MAP_END
147	122
148		static ADDRESS_MAP_START( io_map, ADDRESS_SPACE_IO, 8 )
	123	static ADDRESS_MAP_START( popeye_io_map, ADDRESS_SPACE_IO, 8 )
149	124	ADDRESS_MAP_GLOBAL_MASK(0xff)
150	125	AM_RANGE(0x00, 0x01) AM_DEVWRITE("ay", ay8910_address_data_w)
151	126	AM_RANGE(0x00, 0x00) AM_READ_PORT("P1")
r4679	r4680
470	445	static MACHINE_DRIVER_START( skyskipr )
471	446	/* basic machine hardware */
472	447	MDRV_CPU_ADD("maincpu", Z80, XTAL_8MHz/2)   /* 4 MHz */
473		MDRV_CPU_PROGRAM_MAP(skyskipr_readmem,skyskipr_writemem)
474		MDRV_CPU_IO_MAP(io_map,0)
	448	MDRV_CPU_PROGRAM_MAP(skyskipr_map,0)
	449	MDRV_CPU_IO_MAP(popeye_io_map,0)
475	450	MDRV_CPU_VBLANK_INT("screen", popeye_interrupt)
476	451
477	452	/* video hardware */
r4679	r4680
501	476	static MACHINE_DRIVER_START( popeye )
502	477	MDRV_IMPORT_FROM(skyskipr)
503	478	MDRV_CPU_MODIFY("maincpu")
504		MDRV_CPU_PROGRAM_MAP(popeye_readmem,popeye_writemem)
	479	MDRV_CPU_PROGRAM_MAP(popeye_map,0)
505	480
506	481	MDRV_VIDEO_START(popeye)
507	482	MACHINE_DRIVER_END
r4679	r4680
510	485	static MACHINE_DRIVER_START( popeyebl )
511	486	MDRV_IMPORT_FROM(skyskipr)
512	487	MDRV_CPU_MODIFY("maincpu")
513		MDRV_CPU_PROGRAM_MAP(popeyebl_readmem,popeyebl_writemem)
	488	MDRV_CPU_PROGRAM_MAP(popeyebl_map,0)
514	489
515	490	MDRV_PALETTE_INIT(popeyebl)
516	491	MDRV_VIDEO_START(popeye)
r4679	r4680
668	643	int len = 0x10000;
669	644
670	645	/* decrypt the program ROMs */
671		buffer = malloc_or_die(len);
	646	buffer = alloc_array_or_die(UINT8, len);
672	647	{
673	648	int i;
674	649	for (i = 0;i < len; i++)
r4679	r4680
689	664	int len = 0x10000;
690	665
691	666	/* decrypt the program ROMs */
692		buffer = malloc_or_die(len);
	667	buffer = alloc_array_or_die(UINT8, len);
693	668	{
694	669	int i;
695	670	for (i = 0;i < len; i++)

src/mame/drivers/gstream.c

r4679	r4680
519	519
520	520	static DRIVER_INIT( gstream )
521	521	{
522		memory_install_read32_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xd1ee0, 0xd1ee3, 0, 0, gstream_speedup_r );
	522	memory_install_read32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xd1ee0, 0xd1ee3, 0, 0, gstream_speedup_r );
523	523
524	524	}
525	525

src/mame/drivers/compgolf.c

r4679	r4680
51	51	compgolf_scrolly_hi = (data & 2) << 7;
52	52	}
53	53
54		static ADDRESS_MAP_START( readmem, ADDRESS_SPACE_PROGRAM, 8 )
55		AM_RANGE(0x0000, 0x07ff) AM_READ(SMH_RAM)
56		AM_RANGE(0x1000, 0x17ff) AM_READ(SMH_RAM)
57		AM_RANGE(0x1800, 0x1fff) AM_READ(SMH_RAM)
58		AM_RANGE(0x2000, 0x2060) AM_READ(SMH_RAM)
	54	static ADDRESS_MAP_START( compgolf_map, ADDRESS_SPACE_PROGRAM, 8 )
	55	AM_RANGE(0x0000, 0x07ff) AM_RAM
	56	AM_RANGE(0x1000, 0x17ff) AM_RAM_WRITE(compgolf_video_w) AM_BASE(&videoram)
	57	AM_RANGE(0x1800, 0x1fff) AM_RAM_WRITE(compgolf_back_w) AM_BASE(&compgolf_bg_ram)
	58	AM_RANGE(0x2000, 0x2060) AM_RAM AM_BASE(&spriteram)
	59	AM_RANGE(0x2061, 0x2061) AM_WRITENOP
59	60	AM_RANGE(0x3000, 0x3000) AM_READ_PORT("P1")
60		AM_RANGE(0x3001, 0x3001) AM_READ_PORT("P2")
	61	AM_RANGE(0x3001, 0x3001) AM_READ_PORT("P2") AM_WRITE(compgolf_ctrl_w)
61	62	AM_RANGE(0x3002, 0x3002) AM_READ_PORT("DSW1")
62	63	AM_RANGE(0x3003, 0x3003) AM_READ_PORT("DSW2")
63		AM_RANGE(0x3800, 0x3801) AM_DEVREAD("ym", ym2203_r)
64		AM_RANGE(0x4000, 0x7fff) AM_READ(SMH_BANK1)
65		AM_RANGE(0x8000, 0xffff) AM_READ(SMH_ROM)
	64	AM_RANGE(0x3800, 0x3801) AM_DEVREADWRITE("ym", ym2203_r, ym2203_w)
	65	AM_RANGE(0x4000, 0x7fff) AM_ROMBANK(1)
	66	AM_RANGE(0x8000, 0xffff) AM_ROM
66	67	ADDRESS_MAP_END
67	68
68		static ADDRESS_MAP_START( writemem, ADDRESS_SPACE_PROGRAM, 8 )
69		AM_RANGE(0x0000, 0x07ff) AM_WRITE(SMH_RAM)
70		AM_RANGE(0x1000, 0x17ff) AM_WRITE(compgolf_video_w) AM_BASE(&videoram)
71		AM_RANGE(0x1800, 0x1fff) AM_WRITE(compgolf_back_w) AM_BASE(&compgolf_bg_ram)
72		AM_RANGE(0x2000, 0x2060) AM_WRITE(SMH_RAM) AM_BASE(&spriteram)
73		AM_RANGE(0x2061, 0x2061) AM_WRITENOP
74		AM_RANGE(0x3001, 0x3001) AM_WRITE(compgolf_ctrl_w)
75		AM_RANGE(0x3800, 0x3801) AM_DEVWRITE("ym", ym2203_w)
76		AM_RANGE(0x4000, 0x7fff) AM_WRITE(SMH_ROM)
77		AM_RANGE(0x8000, 0xffff) AM_WRITE(SMH_ROM)
78		ADDRESS_MAP_END
79
80	69	/***************************************************************************/
81	70
82	71	static INPUT_PORTS_START( compgolf )
r4679	r4680
192	181
193	182	static void sound_irq(const device_config *device, int linestate)
194	183	{
195		cpu_set_input_line(device->machine->cpu[0],0,linestate);
	184	cputag_set_input_line(device->machine, "maincpu", 0, linestate);
196	185	}
197	186
198	187	static const ym2203_interface ym2203_config =
r4679	r4680
210	199
211	200	static MACHINE_DRIVER_START( compgolf )
212	201	MDRV_CPU_ADD("maincpu", M6809, 2000000)
213		MDRV_CPU_PROGRAM_MAP(readmem,writemem)
	202	MDRV_CPU_PROGRAM_MAP(compgolf_map,0)
214	203	MDRV_CPU_VBLANK_INT("screen", nmi_line_pulse)
215	204
216	205	/* video hardware */

src/mame/drivers/cps2.c

r4679	r4680
590	590	#include "cpu/m68000/m68000.h"
591	591	#include "sound/qsound.h"
592	592	#include "sound/okim6295.h" // gigamn2 bootleg
593		#include "chd.h"
594	593
595	594	#include "cps1.h"       /* External CPS1 definitions */
596	595
r4679	r4680
753	752	/* bit 7 - */
754	753
755	754	/* Z80 Reset */
756		if (space->machine->cpu[1])   cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_RESET, (data & 0x0008) ? CLEAR_LINE : ASSERT_LINE);
	755	if (cputag_get_cpu(space->machine, "audiocpu"))
	756	cputag_set_input_line(space->machine, "audiocpu", INPUT_LINE_RESET, (data & 0x0008) ? CLEAR_LINE : ASSERT_LINE);
757	757
758	758	coin_counter_w(0, data & 0x0001);
759	759	if( (strncmp(space->machine->gamedrv->name,"pzloop2",8)==0) ||
r4679	r4680
836	836	*
837	837	*************************************/
838	838
839		static ADDRESS_MAP_START( cps2_readmem, ADDRESS_SPACE_PROGRAM, 16 )
840		AM_RANGE(0x000000, 0x3fffff) AM_READ(SMH_ROM)                   /* 68000 ROM */
841		AM_RANGE(0x400000, 0x40000b) AM_READ(SMH_RAM)                   /* CPS2 object output */
842		AM_RANGE(0x618000, 0x619fff) AM_READ(qsound_sharedram1_r)       /* Q RAM */
843		AM_RANGE(0x662000, 0x662001) AM_READ(SMH_RAM)                   /* Network adapter related, accessed in SSF2TB */
844		AM_RANGE(0x662008, 0x662009) AM_READ(SMH_RAM)                   /* Network adapter related, accessed in SSF2TB */
845		AM_RANGE(0x662020, 0x662021) AM_READ(SMH_RAM)                   /* Network adapter related, accessed in SSF2TB */
846		AM_RANGE(0x660000, 0x663fff) AM_READ(SMH_RAM)                   /* When bit 14 of 0x804030 equals 0 this space is available. Many games store highscores and other info here if available. */
847		AM_RANGE(0x664000, 0x664001) AM_READ(SMH_RAM)                   /* Unknown - Only used if 0x660000-0x663fff available (could be RAM enable?) */
848		AM_RANGE(0x708000, 0x709fff) AM_READ(cps2_objram2_r)            /* Object RAM */
849		AM_RANGE(0x70a000, 0x70bfff) AM_READ(cps2_objram2_r)            /* mirror */
850		AM_RANGE(0x70c000, 0x70dfff) AM_READ(cps2_objram2_r)            /* mirror */
851		AM_RANGE(0x70e000, 0x70ffff) AM_READ(cps2_objram2_r)            /* mirror */
852		AM_RANGE(0x800140, 0x80017f) AM_READ(cps1_cps_b_r)              /* mirror (sfa) */
853		AM_RANGE(0x804000, 0x804001) AM_READ_PORT("IN0")                /* IN0 */
854		AM_RANGE(0x804010, 0x804011) AM_READ_PORT("IN1")                /* IN1 */
855		AM_RANGE(0x804020, 0x804021) AM_READ_PORT("IN2")                /* IN2 + EEPROM */
856		AM_RANGE(0x804030, 0x804031) AM_READ(cps2_qsound_volume_r)      /* Master volume. Also when bit 14=0 addon memory is present, when bit 15=0 network adapter present. */
857		AM_RANGE(0x8040b0, 0x8040b3) AM_READ(kludge_r)                  /* unknown (xmcotaj hangs if this is 0) */
858		AM_RANGE(0x804140, 0x80417f) AM_READ(cps1_cps_b_r)              /* CPS-B custom */
859		AM_RANGE(0x900000, 0x92ffff) AM_READ(SMH_RAM)                   /* Video RAM */
860		AM_RANGE(0xff0000, 0xffffff) AM_READ(SMH_RAM)                   /* RAM */
	839	static ADDRESS_MAP_START( cps2_map, ADDRESS_SPACE_PROGRAM, 16 )
	840	AM_RANGE(0x000000, 0x3fffff) AM_ROM                                                         /* 68000 ROM */
	841	AM_RANGE(0x400000, 0x40000b) AM_RAM AM_BASE(&cps2_output) AM_SIZE(&cps2_output_size)                  /* CPS2 object output */
	842	AM_RANGE(0x618000, 0x619fff) AM_READWRITE(qsound_sharedram1_r, qsound_sharedram1_w)                      /* Q RAM */
	843	AM_RANGE(0x662000, 0x662001) AM_RAM                                                         /* Network adapter related, accessed in SSF2TB */
	844	AM_RANGE(0x662008, 0x662009) AM_RAM                                                         /* Network adapter related, accessed in SSF2TB */
	845	AM_RANGE(0x662020, 0x662021) AM_RAM                                                         /* Network adapter related, accessed in SSF2TB */
	846	AM_RANGE(0x660000, 0x663fff) AM_RAM                                                         /* When bit 14 of 0x804030 equals 0 this space is available. Many games store highscores and other info here if available. */
	847	AM_RANGE(0x664000, 0x664001) AM_RAM                                                         /* Unknown - Only used if 0x660000-0x663fff available (could be RAM enable?) */
	848	AM_RANGE(0x700000, 0x701fff) AM_WRITE(cps2_objram1_w) AM_BASE(&cps2_objram1)                          /* Object RAM, no game seems to use it directly */
	849	AM_RANGE(0x708000, 0x709fff) AM_READWRITE(cps2_objram2_r, cps2_objram2_w) AM_BASE(&cps2_objram2)         /* Object RAM */
	850	AM_RANGE(0x70a000, 0x70bfff) AM_READWRITE(cps2_objram2_r, cps2_objram2_w) AM_BASE(&cps2_objram2)         /* mirror */
	851	AM_RANGE(0x70c000, 0x70dfff) AM_READWRITE(cps2_objram2_r, cps2_objram2_w) AM_BASE(&cps2_objram2)         /* mirror */
	852	AM_RANGE(0x70e000, 0x70ffff) AM_READWRITE(cps2_objram2_r, cps2_objram2_w) AM_BASE(&cps2_objram2)         /* mirror */
	853	AM_RANGE(0x800100, 0x80013f) AM_WRITE(cps1_cps_a_w) AM_BASE(&cps1_cps_a_regs)                        /* mirror (sfa) */
	854	AM_RANGE(0x800140, 0x80017f) AM_READWRITE(cps1_cps_b_r, cps1_cps_b_w) AM_BASE(&cps1_cps_b_regs)          /* mirror (sfa) */
	855	AM_RANGE(0x804000, 0x804001) AM_READ_PORT("IN0")                                                 /* IN0 */
	856	AM_RANGE(0x804010, 0x804011) AM_READ_PORT("IN1")                                                 /* IN1 */
	857	AM_RANGE(0x804020, 0x804021) AM_READ_PORT("IN2")                                                 /* IN2 + EEPROM */
	858	AM_RANGE(0x804030, 0x804031) AM_READ(cps2_qsound_volume_r)                                       /* Master volume. Also when bit 14=0 addon memory is present, when bit 15=0 network adapter present. */
	859	AM_RANGE(0x804040, 0x804041) AM_WRITE(cps2_eeprom_port_w)                                       /* EEPROM */
	860	AM_RANGE(0x8040a0, 0x8040a1) AM_WRITENOP                                                         /* Unknown (reset once on startup) */
	861	AM_RANGE(0x8040b0, 0x8040b3) AM_READ(kludge_r)                                                /* unknown (xmcotaj hangs if this is 0) */
	862	AM_RANGE(0x8040e0, 0x8040e1) AM_WRITE(cps2_objram_bank_w)                                       /* bit 0 = Object ram bank swap */
	863	AM_RANGE(0x804100, 0x80413f) AM_WRITE(cps1_cps_a_w) AM_BASE(&cps1_cps_a_regs)                         /* CPS-A custom */
	864	AM_RANGE(0x804140, 0x80417f) AM_READWRITE(cps1_cps_b_r, cps1_cps_b_w)                                   /* CPS-B custom */
	865	AM_RANGE(0x900000, 0x92ffff) AM_RAM_WRITE(cps1_gfxram_w) AM_BASE(&cps1_gfxram) AM_SIZE(&cps1_gfxram_size)   /* Video RAM */
	866	AM_RANGE(0xff0000, 0xffffff) AM_RAM                                                         /* RAM */
861	867	ADDRESS_MAP_END
862	868
863		static ADDRESS_MAP_START( cps2_writemem, ADDRESS_SPACE_PROGRAM, 16 )
864		AM_RANGE(0x000000, 0x3fffff) AM_WRITE(SMH_ROM)                  /* ROM */
865		AM_RANGE(0x400000, 0x40000b) AM_WRITE(SMH_RAM) AM_BASE(&cps2_output) AM_SIZE(&cps2_output_size)    /* CPS2 output */
866		AM_RANGE(0x618000, 0x619fff) AM_WRITE(qsound_sharedram1_w)        /* Q RAM */
867		AM_RANGE(0x662000, 0x662001) AM_WRITE(SMH_RAM)                  /* Network adapter related, accessed in SSF2TB */
868		AM_RANGE(0x662008, 0x662009) AM_WRITE(SMH_RAM)                  /* Network adapter related, accessed in SSF2TB (not sure if this port is write only yet)*/
869		AM_RANGE(0x662020, 0x662021) AM_WRITE(SMH_RAM)                  /* Network adapter related, accessed in SSF2TB */
870		AM_RANGE(0x660000, 0x663fff) AM_WRITE(SMH_RAM)                  /* When bit 14 of 0x804030 equals 0 this space is available. Many games store highscores and other info here if available. */
871		AM_RANGE(0x664000, 0x664001) AM_WRITE(SMH_RAM)                  /* Unknown - Only used if 0x660000-0x663fff available (could be RAM enable?) */
872		AM_RANGE(0x700000, 0x701fff) AM_WRITE(cps2_objram1_w) AM_BASE(&cps2_objram1)     /* Object RAM, no game seems to use it directly */
873		AM_RANGE(0x708000, 0x709fff) AM_WRITE(cps2_objram2_w) AM_BASE(&cps2_objram2)     /* Object RAM */
874		AM_RANGE(0x70a000, 0x70bfff) AM_WRITE(cps2_objram2_w)             /* mirror */
875		AM_RANGE(0x70c000, 0x70dfff) AM_WRITE(cps2_objram2_w)             /* mirror */
876		AM_RANGE(0x70e000, 0x70ffff) AM_WRITE(cps2_objram2_w)             /* mirror */
877		AM_RANGE(0x800100, 0x80013f) AM_WRITE(cps1_cps_a_w) AM_BASE(&cps1_cps_a_regs)   /* mirror (sfa) */
878		AM_RANGE(0x800140, 0x80017f) AM_WRITE(cps1_cps_b_w) AM_BASE(&cps1_cps_b_regs)   /* mirror (sfa) */
879		AM_RANGE(0x804040, 0x804041) AM_WRITE(cps2_eeprom_port_w)         /* EEPROM */
880		AM_RANGE(0x8040a0, 0x8040a1) AM_WRITENOP                  /* Unknown (reset once on startup) */
881		AM_RANGE(0x8040e0, 0x8040e1) AM_WRITE(cps2_objram_bank_w)         /* bit 0 = Object ram bank swap */
882		AM_RANGE(0x804100, 0x80413f) AM_WRITE(cps1_cps_a_w) AM_BASE(&cps1_cps_a_regs)   /* CPS-A custom */
883		AM_RANGE(0x804140, 0x80417f) AM_WRITE(cps1_cps_b_w) AM_BASE(&cps1_cps_b_regs)   /* CPS-B custom */
884		AM_RANGE(0x900000, 0x92ffff) AM_WRITE(cps1_gfxram_w) AM_BASE(&cps1_gfxram) AM_SIZE(&cps1_gfxram_size)
885		AM_RANGE(0xff0000, 0xffffff) AM_WRITE(SMH_RAM)                  /* RAM */
886		ADDRESS_MAP_END
887	869
888
889		static ADDRESS_MAP_START( dead_cps2_writemem, ADDRESS_SPACE_PROGRAM, 16 )
890		AM_RANGE(0x000000, 0x3fffff) AM_WRITE(SMH_ROM)            /* ROM */
891		AM_RANGE(0x618000, 0x619fff) AM_WRITE(qsound_sharedram1_w)      /* Q RAM */
892		AM_RANGE(0x662000, 0x662001) AM_WRITE(SMH_RAM)            /* Network adapter related, accessed in SSF2TB */
893		AM_RANGE(0x662008, 0x662009) AM_WRITE(SMH_RAM)            /* Network adapter related, accessed in SSF2TB (not sure if this port is write only yet)*/
894		AM_RANGE(0x662020, 0x662021) AM_WRITE(SMH_RAM)            /* Network adapter related, accessed in SSF2TB */
895		AM_RANGE(0x660000, 0x663fff) AM_WRITE(SMH_RAM)            /* When bit 14 of 0x804030 equals 0 this space is available. Many games store highscores and other info here if available. */
896		AM_RANGE(0x664000, 0x664001) AM_WRITE(SMH_RAM)            /* Unknown - Only used if 0x660000-0x663fff available (could be RAM enable?) */
897		AM_RANGE(0x700000, 0x701fff) AM_WRITE(cps2_objram1_w) AM_BASE(&cps2_objram1)   /* Object RAM, no game seems to use it directly */
898		AM_RANGE(0x708000, 0x709fff) AM_WRITE(cps2_objram2_w) AM_BASE(&cps2_objram2)   /* Object RAM */
899		AM_RANGE(0x70a000, 0x70bfff) AM_WRITE(cps2_objram2_w)         /* mirror */
900		AM_RANGE(0x70c000, 0x70dfff) AM_WRITE(cps2_objram2_w)         /* mirror */
901		AM_RANGE(0x70e000, 0x70ffff) AM_WRITE(cps2_objram2_w)         /* mirror */
902		AM_RANGE(0x800100, 0x80013f) AM_WRITE(cps1_cps_a_w) AM_BASE(&cps1_cps_a_regs)   /* mirror (sfa) */
903		AM_RANGE(0x800140, 0x80017f) AM_WRITE(cps1_cps_b_w) AM_BASE(&cps1_cps_b_regs)   /* mirror (sfa) */
904		AM_RANGE(0x804040, 0x804041) AM_WRITE(cps2_eeprom_port_w)      /* EEPROM */
905		AM_RANGE(0x8040a0, 0x8040a1) AM_WRITENOP            /* Unknown (reset once on startup) */
906		AM_RANGE(0x8040e0, 0x8040e1) AM_WRITE(cps2_objram_bank_w)      /* bit 0 = Object ram bank swap */
907		AM_RANGE(0x804100, 0x80413f) AM_WRITE(cps1_cps_a_w) AM_BASE(&cps1_cps_a_regs)   /* CPS-A custom */
908		AM_RANGE(0x804140, 0x80417f) AM_WRITE(cps1_cps_b_w) AM_BASE(&cps1_cps_b_regs)   /* CPS-B custom */
909		AM_RANGE(0x900000, 0x92ffff) AM_WRITE(cps1_gfxram_w) AM_BASE(&cps1_gfxram) AM_SIZE(&cps1_gfxram_size)
910		AM_RANGE(0xff0000, 0xffffef) AM_WRITE(SMH_RAM)            /* RAM */
911		AM_RANGE(0xfffff0, 0xfffffb) AM_WRITE(SMH_RAM) AM_BASE(&cps2_output) AM_SIZE(&cps2_output_size)   /* CPS2 output */
	870	static ADDRESS_MAP_START( dead_cps2_map, ADDRESS_SPACE_PROGRAM, 16 )
	871	AM_RANGE(0x000000, 0x3fffff) AM_ROM                                                         /* 68000 ROM */
	872	AM_RANGE(0x400000, 0x40000b) AM_RAM AM_BASE(&cps2_output) AM_SIZE(&cps2_output_size)                  /* CPS2 object output */
	873	AM_RANGE(0x618000, 0x619fff) AM_READWRITE(qsound_sharedram1_r, qsound_sharedram1_w)                      /* Q RAM */
	874	AM_RANGE(0x662000, 0x662001) AM_RAM                                                         /* Network adapter related, accessed in SSF2TB */
	875	AM_RANGE(0x662008, 0x662009) AM_RAM                                                         /* Network adapter related, accessed in SSF2TB */
	876	AM_RANGE(0x662020, 0x662021) AM_RAM                                                         /* Network adapter related, accessed in SSF2TB */
	877	AM_RANGE(0x660000, 0x663fff) AM_RAM                                                         /* When bit 14 of 0x804030 equals 0 this space is available. Many games store highscores and other info here if available. */
	878	AM_RANGE(0x664000, 0x664001) AM_RAM                                                         /* Unknown - Only used if 0x660000-0x663fff available (could be RAM enable?) */
	879	AM_RANGE(0x700000, 0x701fff) AM_WRITE(cps2_objram1_w) AM_BASE(&cps2_objram1)                          /* Object RAM, no game seems to use it directly */
	880	AM_RANGE(0x708000, 0x709fff) AM_READWRITE(cps2_objram2_r, cps2_objram2_w) AM_BASE(&cps2_objram2)         /* Object RAM */
	881	AM_RANGE(0x70a000, 0x70bfff) AM_READWRITE(cps2_objram2_r, cps2_objram2_w) AM_BASE(&cps2_objram2)         /* mirror */
	882	AM_RANGE(0x70c000, 0x70dfff) AM_READWRITE(cps2_objram2_r, cps2_objram2_w) AM_BASE(&cps2_objram2)         /* mirror */
	883	AM_RANGE(0x70e000, 0x70ffff) AM_READWRITE(cps2_objram2_r, cps2_objram2_w) AM_BASE(&cps2_objram2)         /* mirror */
	884	AM_RANGE(0x800100, 0x80013f) AM_WRITE(cps1_cps_a_w) AM_BASE(&cps1_cps_a_regs)                        /* mirror (sfa) */
	885	AM_RANGE(0x800140, 0x80017f) AM_READWRITE(cps1_cps_b_r, cps1_cps_b_w) AM_BASE(&cps1_cps_b_regs)          /* mirror (sfa) */
	886	AM_RANGE(0x804000, 0x804001) AM_READ_PORT("IN0")                                                 /* IN0 */
	887	AM_RANGE(0x804010, 0x804011) AM_READ_PORT("IN1")                                                 /* IN1 */
	888	AM_RANGE(0x804020, 0x804021) AM_READ_PORT("IN2")                                                 /* IN2 + EEPROM */
	889	AM_RANGE(0x804030, 0x804031) AM_READ(cps2_qsound_volume_r)                                       /* Master volume. Also when bit 14=0 addon memory is present, when bit 15=0 network adapter present. */
	890	AM_RANGE(0x804040, 0x804041) AM_WRITE(cps2_eeprom_port_w)                                       /* EEPROM */
	891	AM_RANGE(0x8040a0, 0x8040a1) AM_WRITENOP                                                         /* Unknown (reset once on startup) */
	892	AM_RANGE(0x8040b0, 0x8040b3) AM_READ(kludge_r)                                                /* unknown (xmcotaj hangs if this is 0) */
	893	AM_RANGE(0x8040e0, 0x8040e1) AM_WRITE(cps2_objram_bank_w)                                       /* bit 0 = Object ram bank swap */
	894	AM_RANGE(0x804100, 0x80413f) AM_WRITE(cps1_cps_a_w) AM_BASE(&cps1_cps_a_regs)                         /* CPS-A custom */
	895	AM_RANGE(0x804140, 0x80417f) AM_READWRITE(cps1_cps_b_r, cps1_cps_b_w)                                   /* CPS-B custom */
	896	AM_RANGE(0x900000, 0x92ffff) AM_RAM_WRITE(cps1_gfxram_w) AM_BASE(&cps1_gfxram) AM_SIZE(&cps1_gfxram_size)   /* Video RAM */
	897	AM_RANGE(0xff0000, 0xffffef) AM_RAM                                                         /* RAM */
	898	AM_RANGE(0xfffff0, 0xfffffb) AM_RAM AM_BASE(&cps2_output) AM_SIZE(&cps2_output_size)                  /* CPS2 output */
912	899	ADDRESS_MAP_END
913	900
	901
914	902	/*************************************
915	903	*
916	904	*  Generic port definitions
r4679	r4680
1224	1212
1225	1213	/* basic machine hardware */
1226	1214	MDRV_CPU_ADD("maincpu", M68000, XTAL_16MHz)
1227		MDRV_CPU_PROGRAM_MAP(cps2_readmem,cps2_writemem)
	1215	MDRV_CPU_PROGRAM_MAP(cps2_map,0)
1228	1216	MDRV_CPU_VBLANK_INT_HACK(cps2_interrupt,259)   // 262  /* ??? interrupts per frame */
1229	1217
1230	1218	MDRV_CPU_ADD("audiocpu", Z80, 8000000)
r4679	r4680
1270	1258	MDRV_IMPORT_FROM(cps2)
1271	1259
1272	1260	MDRV_CPU_MODIFY("maincpu")
1273		MDRV_CPU_PROGRAM_MAP(cps2_readmem,dead_cps2_writemem)
	1261	MDRV_CPU_PROGRAM_MAP(dead_cps2_map,0)
1274	1262	MACHINE_DRIVER_END
1275	1263
1276	1264	static MACHINE_DRIVER_START( gigamn2 )
r4679	r4680
7415	7403	DRIVER_INIT_CALL(cps2crpt);
7416	7404	cps2networkpresent = 0;
7417	7405
7418		cpu_set_clockscale(machine->cpu[0], 0.7375f); /* RAM access waitstates etc. aren't emulated - slow the CPU to compensate */
	7406	cpu_set_clockscale(cputag_get_cpu(machine, "maincpu"), 0.7375f); /* RAM access waitstates etc. aren't emulated - slow the CPU to compensate */
7419	7407	}
7420	7408
7421	7409	static DRIVER_INIT( ssf2tb )
r4679	r4680
7432	7420	static DRIVER_INIT ( pzloop2 )
7433	7421	{
7434	7422	DRIVER_INIT_CALL(cps2);
7435		memory_install_read16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x804000, 0x804001, 0, 0, joy_or_paddle_r);
	7423	memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x804000, 0x804001, 0, 0, joy_or_paddle_r);
7436	7424	}
7437	7425
7438	7426	static UINT16* gigamn2_dummyqsound_ram;
r4679	r4680
7447	7435
7448	7436	DRIVER_INIT_CALL(cps2);
7449	7437
7450		gigamn2_dummyqsound_ram = auto_malloc(0x20000);
7451		memory_install_readwrite16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x618000, 0x619fff, 0, 0, gigamn2_dummyqsound_r, gigamn2_dummyqsound_w); // no qsound..
	7438	gigamn2_dummyqsound_ram = auto_alloc_array(machine, UINT16, 0x20000/2);
	7439	memory_install_readwrite16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x618000, 0x619fff, 0, 0, gigamn2_dummyqsound_r, gigamn2_dummyqsound_w); // no qsound..
7452	7440	memory_set_decrypted_region(space, 0x000000, (length) - 1, &rom[length/4]);
7453		m68k_set_encrypted_opcode_range(machine->cpu[0],0,length);
	7441	m68k_set_encrypted_opcode_range(cputag_get_cpu(machine, "maincpu"), 0, length);
7454	7442	}
7455	7443
7456	7444

src/mame/drivers/lordgun.c

r4679	r4680
32	32	#include "machine/eeprom.h"
33	33	#include "sound/3812intf.h"
34	34	#include "sound/okim6295.h"
	35	#include "lordgun.h"
35	36
36		// Variables defined in video:
37	37
38		extern UINT16 *lordgun_vram_0, *lordgun_scroll_x_0, *lordgun_scroll_y_0;
39		extern UINT16 *lordgun_vram_1, *lordgun_scroll_x_1, *lordgun_scroll_y_1;
40		extern UINT16 *lordgun_vram_2, *lordgun_scroll_x_2, *lordgun_scroll_y_2;
41		extern UINT16 *lordgun_vram_3, *lordgun_scroll_x_3, *lordgun_scroll_y_3;
42		extern UINT16 *lordgun_scrollram;
43	38	static UINT16 *lordgun_priority_ram, lordgun_priority;
44		extern int lordgun_whitescreen;
45	39
46		extern struct
47		{
48		int      scr_x,   scr_y;
49		UINT16   hw_x,   hw_y;
50		}   lordgun_gun[2];
51	40
52		// Functions defined in video:
53
54		WRITE16_HANDLER( lordgun_vram_0_w );
55		WRITE16_HANDLER( lordgun_vram_1_w );
56		WRITE16_HANDLER( lordgun_vram_2_w );
57		WRITE16_HANDLER( lordgun_vram_3_w );
58
59		void lordgun_update_gun(running_machine *machine, int i);
60
61		VIDEO_START( lordgun );
62		VIDEO_UPDATE( lordgun );
63
64	41	/***************************************************************************
65	42
66	43	Code Decryption
r4679	r4680
163	140	if (ACCESSING_BITS_0_7)   soundlatch_w (space, 0, (data >> 0) & 0xff);
164	141	if (ACCESSING_BITS_8_15)   soundlatch2_w(space, 0, (data >> 8) & 0xff);
165	142
166		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_NMI, PULSE_LINE);
	143	cputag_set_input_line(space->machine, "soundcpu", INPUT_LINE_NMI, PULSE_LINE);
167	144	}
168	145
169	146	static ADDRESS_MAP_START( lordgun_map, ADDRESS_SPACE_PROGRAM, 16 )
r4679	r4680
336	313	PORT_DIPNAME( 0x08, 0x08, "Coin Slots" )
337	314	PORT_DIPSETTING(    0x08, "Separate" )
338	315	PORT_DIPSETTING(    0x00, "Common" )
339		PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON1 )
340		PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON2 )
	316	PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(1)
	317	PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(2)
341	318	PORT_SERVICE_NO_TOGGLE( 0x40, IP_ACTIVE_LOW )
342	319	PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_CUSTOM(eeprom_bit_r, NULL)
343	320
r4679	r4680
423	400
424	401	static void soundirq(const device_config *device, int state)
425	402	{
426		cpu_set_input_line(device->machine->cpu[1], 0, state);
	403	cputag_set_input_line(device->machine, "soundcpu", 0, state);
427	404	}
428	405
429	406	static const ym3812_interface lordgun_ym3812_interface =

src/mame/drivers/igs017.c

r4679	r4680
124	124	int i;
125	125
126	126	sprites_gfx_size   =   size / 2 * 3;
127		sprites_gfx         =   auto_malloc(sprites_gfx_size);
	127	sprites_gfx         =   auto_alloc_array(machine, UINT8, sprites_gfx_size);
128	128
129	129	for (i = 0; i < size / 2 ; i++)
130	130	{
r4679	r4680
296	296	{
297	297	int length = memory_region_length(machine, "maincpu");
298	298	UINT8 *rom = memory_region(machine, "maincpu");
299		UINT8 *tmp = auto_malloc(length);
	299	UINT8 *tmp = auto_alloc_array(machine, UINT8, length);
300	300	int i;
301	301
302	302	// decrypt the program ROM
r4679	r4680
394	394	{
395	395	int length = memory_region_length(machine, "sprites");
396	396	UINT8 *rom = memory_region(machine, "sprites");
397		UINT8 *tmp = auto_malloc(length);
	397	UINT8 *tmp = auto_alloc_array(machine, UINT8, length);
398	398	int i;
399	399
400	400	// address lines swap (to do: collapse into one bitswap)
r4679	r4680
491	491	{
492	492	int length = memory_region_length(machine, "tilemaps");
493	493	UINT8 *rom = memory_region(machine, "tilemaps");
494		UINT8 *tmp = malloc_or_die(length);
	494	UINT8 *tmp = alloc_array_or_die(UINT8, length);
495	495	int i;
496	496
497	497	memcpy(tmp,rom,length);

src/mame/drivers/lemmings.c

r4679	r4680
76	76	static WRITE16_HANDLER( lemmings_sound_w )
77	77	{
78	78	soundlatch_w(space,0,data&0xff);
79		cpu_set_input_line(space->machine->cpu[1],1,HOLD_LINE);
	79	cputag_set_input_line(space->machine, "audiocpu", 1, HOLD_LINE);
80	80	}
81	81
82	82	static WRITE8_HANDLER( lemmings_sound_ack_w )
83	83	{
84		cpu_set_input_line(space->machine->cpu[1],1,CLEAR_LINE);
	84	cputag_set_input_line(space->machine, "audiocpu", 1, CLEAR_LINE);
85	85	}
86	86
87	87	/******************************************************************************/
88	88
89		static ADDRESS_MAP_START( lemmings_readmem, ADDRESS_SPACE_PROGRAM, 16 )
90		AM_RANGE(0x000000, 0x0fffff) AM_READ(SMH_ROM)
91		AM_RANGE(0x100000, 0x10ffff) AM_READ(SMH_RAM)
92		AM_RANGE(0x120000, 0x1207ff) AM_READ(SMH_RAM)
93		AM_RANGE(0x140000, 0x1407ff) AM_READ(SMH_RAM)
94		AM_RANGE(0x160000, 0x160fff) AM_READ(SMH_RAM)
95		AM_RANGE(0x1a0000, 0x1a07ff) AM_READ(lemmings_prot_r)
	89	static ADDRESS_MAP_START( lemmings_map, ADDRESS_SPACE_PROGRAM, 16 )
	90	AM_RANGE(0x000000, 0x0fffff) AM_ROM
	91	AM_RANGE(0x100000, 0x10ffff) AM_RAM
	92	AM_RANGE(0x120000, 0x1207ff) AM_RAM AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)
	93	AM_RANGE(0x140000, 0x1407ff) AM_RAM AM_BASE(&spriteram16_2) AM_SIZE(&spriteram_2_size)
	94	AM_RANGE(0x160000, 0x160fff) AM_RAM_WRITE(lemmings_palette_24bit_w) AM_BASE(&paletteram16)
	95	AM_RANGE(0x170000, 0x17000f) AM_RAM_WRITE(lemmings_control_w) AM_BASE(&lemmings_control_data)
96	96	AM_RANGE(0x190000, 0x19000f) AM_READ(lemmings_trackball_r)
97		AM_RANGE(0x200000, 0x202fff) AM_READ(SMH_RAM)
98		AM_RANGE(0x300000, 0x37ffff) AM_READ(SMH_RAM)
99		AM_RANGE(0x380000, 0x39ffff) AM_READ(SMH_RAM)
100		ADDRESS_MAP_END
101
102		static ADDRESS_MAP_START( lemmings_writemem, ADDRESS_SPACE_PROGRAM, 16 )
103		AM_RANGE(0x000000, 0x0fffff) AM_WRITE(SMH_ROM)
104		AM_RANGE(0x100000, 0x10ffff) AM_WRITE(SMH_RAM)
105		AM_RANGE(0x120000, 0x1207ff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)
106		AM_RANGE(0x140000, 0x1407ff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16_2) AM_SIZE(&spriteram_2_size)
107		AM_RANGE(0x160000, 0x160fff) AM_WRITE(lemmings_palette_24bit_w) AM_BASE(&paletteram16)
108		AM_RANGE(0x170000, 0x17000f) AM_WRITE(lemmings_control_w) AM_BASE(&lemmings_control_data)
	97	AM_RANGE(0x1a0000, 0x1a07ff) AM_READ(lemmings_prot_r)
109	98	AM_RANGE(0x1a0064, 0x1a0065) AM_WRITE(lemmings_sound_w)
110	99	AM_RANGE(0x1c0000, 0x1c0001) AM_WRITE(buffer_spriteram16_w) /* 1 written once a frame */
111	100	AM_RANGE(0x1e0000, 0x1e0001) AM_WRITE(buffer_spriteram16_2_w) /* 1 written once a frame */
112		AM_RANGE(0x200000, 0x201fff) AM_WRITE(lemmings_vram_w) AM_BASE(&lemmings_vram_data)
113		AM_RANGE(0x300000, 0x37ffff) AM_WRITE(lemmings_pixel_0_w) AM_BASE(&lemmings_pixel_0_data)
114		AM_RANGE(0x380000, 0x39ffff) AM_WRITE(lemmings_pixel_1_w) AM_BASE(&lemmings_pixel_1_data)
	101	AM_RANGE(0x200000, 0x201fff) AM_RAM_WRITE(lemmings_vram_w) AM_BASE(&lemmings_vram_data)
	102	AM_RANGE(0x202000, 0x202fff) AM_RAM
	103	AM_RANGE(0x300000, 0x37ffff) AM_RAM_WRITE(lemmings_pixel_0_w) AM_BASE(&lemmings_pixel_0_data)
	104	AM_RANGE(0x380000, 0x39ffff) AM_RAM_WRITE(lemmings_pixel_1_w) AM_BASE(&lemmings_pixel_1_data)
115	105	ADDRESS_MAP_END
116	106
117	107	/******************************************************************************/
118	108
119		static ADDRESS_MAP_START( sound_readmem, ADDRESS_SPACE_PROGRAM, 8 )
120		AM_RANGE(0x0000, 0x07ff) AM_READ(SMH_RAM)
121		AM_RANGE(0x0800, 0x0801) AM_DEVREAD("ym", ym2151_r)
122		AM_RANGE(0x1000, 0x1000) AM_DEVREAD("oki", okim6295_r)
123		AM_RANGE(0x1800, 0x1800) AM_READ(soundlatch_r)
124		AM_RANGE(0x8000, 0xffff) AM_READ(SMH_ROM)
	109	static ADDRESS_MAP_START( sound_map, ADDRESS_SPACE_PROGRAM, 8 )
	110	AM_RANGE(0x0000, 0x07ff) AM_RAM
	111	AM_RANGE(0x0800, 0x0801) AM_DEVREADWRITE("ym", ym2151_r,ym2151_w)
	112	AM_RANGE(0x1000, 0x1000) AM_DEVREADWRITE("oki", okim6295_r,okim6295_w)
	113	AM_RANGE(0x1800, 0x1800) AM_READWRITE(soundlatch_r,lemmings_sound_ack_w)
	114	AM_RANGE(0x8000, 0xffff) AM_ROM
125	115	ADDRESS_MAP_END
126	116
127		static ADDRESS_MAP_START( sound_writemem, ADDRESS_SPACE_PROGRAM, 8 )
128		AM_RANGE(0x0000, 0x07ff) AM_WRITE(SMH_RAM)
129		AM_RANGE(0x0800, 0x0801) AM_DEVWRITE("ym", ym2151_w)
130		AM_RANGE(0x1000, 0x1000) AM_DEVWRITE("oki", okim6295_w)
131		AM_RANGE(0x1800, 0x1800) AM_WRITE(lemmings_sound_ack_w)
132		AM_RANGE(0x8000, 0xffff) AM_WRITE(SMH_ROM)
133		ADDRESS_MAP_END
134
135	117	/******************************************************************************/
136	118
137	119	static INPUT_PORTS_START( lemmings )
r4679	r4680
257	239
258	240	static void sound_irq(const device_config *device, int state)
259	241	{
260		cpu_set_input_line(device->machine->cpu[1],0,state);
	242	cputag_set_input_line(device->machine, "audiocpu", 0, state);
261	243	}
262	244
263	245	static const ym2151_interface ym2151_config =
r4679	r4680
269	251
270	252	/* basic machine hardware */
271	253	MDRV_CPU_ADD("maincpu", M68000, 14000000)
272		MDRV_CPU_PROGRAM_MAP(lemmings_readmem,lemmings_writemem)
	254	MDRV_CPU_PROGRAM_MAP(lemmings_map,0)
273	255	MDRV_CPU_VBLANK_INT("screen", irq6_line_hold)
274	256
275	257	MDRV_CPU_ADD("audiocpu", M6809,32220000/8)
276		MDRV_CPU_PROGRAM_MAP(sound_readmem,sound_writemem)
	258	MDRV_CPU_PROGRAM_MAP(sound_map,0)
277	259
278	260	/* video hardware */
279	261	MDRV_VIDEO_ATTRIBUTES(VIDEO_BUFFERS_SPRITERAM)

src/mame/drivers/pushman.c

r4679	r4680
52	52	static WRITE16_HANDLER( pushman_control_w )
53	53	{
54	54	if (ACCESSING_BITS_8_15)
55		soundlatch_w(space,0,(data>>8)&0xff);
	55	soundlatch_w(space, 0, (data >> 8) & 0xff);
56	56	}
57	57
58	58	static READ16_HANDLER( pushman_68705_r )
59	59	{
60		if (offset==0)
	60	if (offset == 0)
61	61	return latch;
62	62
63		if (offset==3 && new_latch) { new_latch=0; return 0; }
64		if (offset==3 && !new_latch) return 0xff;
	63	if (offset == 3 && new_latch) { new_latch = 0; return 0; }
	64	if (offset == 3 && !new_latch) return 0xff;
65	65
66		return (shared_ram[2*offset+1]<<8)+shared_ram[2*offset];
	66	return (shared_ram[2 * offset + 1] << 8) + shared_ram[2 * offset];
67	67	}
68	68
69	69	static WRITE16_HANDLER( pushman_68705_w )
70	70	{
71	71	if (ACCESSING_BITS_8_15)
72		shared_ram[2*offset]=data>>8;
	72	shared_ram[2 * offset] = data >> 8;
73	73	if (ACCESSING_BITS_0_7)
74		shared_ram[2*offset+1]=data&0xff;
	74	shared_ram[2 * offset + 1] = data & 0xff;
75	75
76		if (offset==1)
	76	if (offset == 1)
77	77	{
78		cpu_set_input_line(space->machine->cpu[2],M68705_IRQ_LINE,HOLD_LINE);
	78	cputag_set_input_line(space->machine, "mcu", M68705_IRQ_LINE, HOLD_LINE);
79	79	cpu_spin(space->cpu);
80		new_latch=0;
	80	new_latch = 0;
81	81	}
82	82	}
83	83
84	84	/* ElSemi - Bouncing balls protection. */
85	85	static READ16_HANDLER( bballs_68705_r )
86	86	{
87		if (offset==0)
	87	if (offset == 0)
88	88	return latch;
89		if(offset==3 && new_latch)
	89	if(offset == 3 && new_latch)
90	90	{
91		new_latch=0;
	91	new_latch = 0;
92	92	return 0;
93	93	}
94		if(offset==3 && !new_latch)
	94	if(offset == 3 && !new_latch)
95	95	return 0xff;
96	96
97		return (shared_ram[2*offset+1]<<8)+shared_ram[2*offset];
	97	return (shared_ram[2 * offset + 1] << 8) + shared_ram[2 * offset];
98	98	}
99	99
100	100	static WRITE16_HANDLER( bballs_68705_w )
101	101	{
102	102	if (ACCESSING_BITS_8_15)
103		shared_ram[2*offset]=data>>8;
	103	shared_ram[2 * offset] = data >> 8;
104	104	if (ACCESSING_BITS_0_7)
105		shared_ram[2*offset+1]=data&0xff;
	105	shared_ram[2 * offset + 1] = data & 0xff;
106	106
107		if(offset==0)
	107	if(offset == 0)
108	108	{
109		latch=0;
110		if(shared_ram[0]<=0xf)
	109	latch = 0;
	110	if(shared_ram[0] <= 0xf)
111	111	{
112		latch=shared_ram[0]<<2;
	112	latch = shared_ram[0] << 2;
113	113	if(shared_ram[1])
114		latch|=2;
115		new_latch=1;
	114	latch |= 2;
	115	new_latch = 1;
116	116	}
117	117	else if(shared_ram[0])
118	118	{
119	119	if(shared_ram[1])
120		latch|=2;
121		new_latch=1;
	120	latch |= 2;
	121	new_latch = 1;
122	122	}
123	123	}
124	124	}
r4679	r4680
131	131
132	132	static WRITE8_HANDLER( pushman_68000_w )
133	133	{
134		if (offset==2 && (shared_ram[2]&2)==0 && data&2) {
135		latch=(shared_ram[1]<<8)|shared_ram[0];
136		new_latch=1;
	134	if (offset == 2 && (shared_ram[2] & 2) == 0 && data & 2)
	135	{
	136	latch = (shared_ram[1] << 8) | shared_ram[0];
	137	new_latch = 1;
137	138	}
138		shared_ram[offset]=data;
	139	shared_ram[offset] = data;
139	140	}
140	141
141	142	static MACHINE_RESET( bballs )
142	143	{
143		latch=0x400;
	144	latch = 0x400;
144	145	}
145	146
146	147	/******************************************************************************/
147	148
148		static ADDRESS_MAP_START( readmem, ADDRESS_SPACE_PROGRAM, 16 )
149		AM_RANGE(0x000000, 0x01ffff) AM_READ(SMH_ROM)
150		AM_RANGE(0x060000, 0x060007) AM_READ(pushman_68705_r)
151		AM_RANGE(0xfe0800, 0xfe17ff) AM_READ(SMH_RAM)
152		AM_RANGE(0xfe4000, 0xfe4001) AM_READ_PORT("INPUTS")
153		AM_RANGE(0xfe4002, 0xfe4003) AM_READ_PORT("SYSTEM")
	149	static ADDRESS_MAP_START( pushman_map, ADDRESS_SPACE_PROGRAM, 16 )
	150	AM_RANGE(0x000000, 0x01ffff) AM_ROM
	151	AM_RANGE(0x060000, 0x060007) AM_READWRITE(pushman_68705_r,pushman_68705_w)
	152	AM_RANGE(0xfe0800, 0xfe17ff) AM_RAM AM_BASE(&spriteram16)
	153	AM_RANGE(0xfe4000, 0xfe4001) AM_READ_PORT("INPUTS") AM_WRITE(pushman_flipscreen_w)
	154	AM_RANGE(0xfe4002, 0xfe4003) AM_READ_PORT("SYSTEM") AM_WRITE(pushman_control_w)
154	155	AM_RANGE(0xfe4004, 0xfe4005) AM_READ_PORT("DSW")
155		AM_RANGE(0xfec000, 0xfec7ff) AM_READ(SMH_RAM)
156		AM_RANGE(0xff8000, 0xff87ff) AM_READ(SMH_RAM)
157		AM_RANGE(0xffc000, 0xffffff) AM_READ(SMH_RAM)
158		ADDRESS_MAP_END
159
160		static ADDRESS_MAP_START( writemem, ADDRESS_SPACE_PROGRAM, 16 )
161		AM_RANGE(0x000000, 0x01ffff) AM_WRITE(SMH_ROM)
162		AM_RANGE(0x060000, 0x060007) AM_WRITE(pushman_68705_w)
163		AM_RANGE(0xfe0800, 0xfe17ff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16)
164		AM_RANGE(0xfe4000, 0xfe4001) AM_WRITE(pushman_flipscreen_w)
165		AM_RANGE(0xfe4002, 0xfe4003) AM_WRITE(pushman_control_w)
166	156	AM_RANGE(0xfe8000, 0xfe8003) AM_WRITE(pushman_scroll_w)
167	157	AM_RANGE(0xfe800e, 0xfe800f) AM_WRITENOP /* ? */
168		AM_RANGE(0xfec000, 0xfec7ff) AM_WRITE(pushman_videoram_w) AM_BASE(&videoram16)
169		AM_RANGE(0xff8000, 0xff87ff) AM_WRITE(paletteram16_xxxxRRRRGGGGBBBB_word_w) AM_BASE(&paletteram16)
170		AM_RANGE(0xffc000, 0xffffff) AM_WRITE(SMH_RAM)
	158	AM_RANGE(0xfec000, 0xfec7ff) AM_RAM_WRITE(pushman_videoram_w) AM_BASE(&videoram16)
	159	AM_RANGE(0xff8000, 0xff87ff) AM_RAM_WRITE(paletteram16_xxxxRRRRGGGGBBBB_word_w) AM_BASE(&paletteram16)
	160	AM_RANGE(0xffc000, 0xffffff) AM_RAM
171	161	ADDRESS_MAP_END
172	162
173		static ADDRESS_MAP_START( mcu_readmem, ADDRESS_SPACE_PROGRAM, 8 )
174		AM_RANGE(0x0000, 0x0007) AM_READ(pushman_68000_r)
175		AM_RANGE(0x0010, 0x007f) AM_READ(SMH_RAM)
176		AM_RANGE(0x0080, 0x0fff) AM_READ(SMH_ROM)
	163	static ADDRESS_MAP_START( mcu_map, ADDRESS_SPACE_PROGRAM, 8 )
	164	AM_RANGE(0x0000, 0x0007) AM_READWRITE(pushman_68000_r,pushman_68000_w)
	165	AM_RANGE(0x0010, 0x007f) AM_RAM
	166	AM_RANGE(0x0080, 0x0fff) AM_ROM
177	167	ADDRESS_MAP_END
178	168
179		static ADDRESS_MAP_START( mcu_writemem, ADDRESS_SPACE_PROGRAM, 8 )
180		AM_RANGE(0x0000, 0x0007) AM_WRITE(pushman_68000_w)
181		AM_RANGE(0x0010, 0x007f) AM_WRITE(SMH_RAM)
182		AM_RANGE(0x0080, 0x0fff) AM_WRITE(SMH_ROM)
183		ADDRESS_MAP_END
184
185		static ADDRESS_MAP_START( sound_readmem, ADDRESS_SPACE_PROGRAM, 8 )
186		AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM)
187		AM_RANGE(0xc000, 0xc7ff) AM_READ(SMH_RAM)
	169	static ADDRESS_MAP_START( sound_map, ADDRESS_SPACE_PROGRAM, 8 )
	170	AM_RANGE(0x0000, 0x7fff) AM_ROM
	171	AM_RANGE(0xc000, 0xc7ff) AM_RAM
188	172	AM_RANGE(0xe000, 0xe000) AM_READ(soundlatch_r)
189	173	ADDRESS_MAP_END
190	174
191		static ADDRESS_MAP_START( sound_writemem, ADDRESS_SPACE_PROGRAM, 8 )
192		AM_RANGE(0x0000, 0x7fff) AM_WRITE(SMH_ROM)
193		AM_RANGE(0xc000, 0xc7ff) AM_WRITE(SMH_RAM)
194		ADDRESS_MAP_END
195
196	175	static ADDRESS_MAP_START( sound_io_map, ADDRESS_SPACE_IO, 8 )
197	176	ADDRESS_MAP_GLOBAL_MASK(0xff)
198	177	AM_RANGE(0x00, 0x01) AM_DEVWRITE("ym1", ym2203_w)
199	178	AM_RANGE(0x80, 0x81) AM_DEVWRITE("ym2", ym2203_w)
200	179	ADDRESS_MAP_END
201	180
202		static ADDRESS_MAP_START( bballs_readmem, ADDRESS_SPACE_PROGRAM, 16 )
	181	static ADDRESS_MAP_START( bballs_map, ADDRESS_SPACE_PROGRAM, 16 )
203	182	ADDRESS_MAP_GLOBAL_MASK(0xfffff)
204		AM_RANGE(0x00000, 0x1ffff) AM_READ(SMH_ROM)
205		AM_RANGE(0x60000, 0x60007) AM_READ(bballs_68705_r)
206		AM_RANGE(0xe0800, 0xe17ff) AM_READ(SMH_RAM)
207		AM_RANGE(0xe4000, 0xe4001) AM_READ_PORT("INPUTS")
208		AM_RANGE(0xe4002, 0xe4003) AM_READ_PORT("SYSTEM")
	183	AM_RANGE(0x00000, 0x1ffff) AM_ROM
	184	AM_RANGE(0x60000, 0x60007) AM_READWRITE(bballs_68705_r,bballs_68705_w)
	185	AM_RANGE(0xe0800, 0xe17ff) AM_RAM AM_BASE(&spriteram16)
	186	AM_RANGE(0xe4000, 0xe4001) AM_READ_PORT("INPUTS") AM_WRITE(pushman_flipscreen_w)
	187	AM_RANGE(0xe4002, 0xe4003) AM_READ_PORT("SYSTEM") AM_WRITE(pushman_control_w)
209	188	AM_RANGE(0xe4004, 0xe4005) AM_READ_PORT("DSW")
210		AM_RANGE(0xec000, 0xec7ff) AM_READ(SMH_RAM)
211		AM_RANGE(0xf8000, 0xf87ff) AM_READ(SMH_RAM)
212		AM_RANGE(0xfc000, 0xfffff) AM_READ(SMH_RAM)
213		ADDRESS_MAP_END
214
215		static ADDRESS_MAP_START( bballs_writemem, ADDRESS_SPACE_PROGRAM, 16 )
216		ADDRESS_MAP_GLOBAL_MASK(0xfffff)
217		AM_RANGE(0x00000, 0x1ffff) AM_WRITE(SMH_ROM)
218		AM_RANGE(0x60000, 0x60007) AM_WRITE(bballs_68705_w)
219		AM_RANGE(0xe0800, 0xe17ff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16)
220		AM_RANGE(0xe4000, 0xe4001) AM_WRITE(pushman_flipscreen_w)
221		AM_RANGE(0xe4002, 0xe4003) AM_WRITE(pushman_control_w)
222	189	AM_RANGE(0xe8000, 0xe8003) AM_WRITE(pushman_scroll_w)
223	190	AM_RANGE(0xe800e, 0xe800f) AM_WRITENOP /* ? */
224		AM_RANGE(0xec000, 0xec7ff) AM_WRITE(pushman_videoram_w) AM_BASE(&videoram16)
225		AM_RANGE(0xf8000, 0xf87ff) AM_WRITE(paletteram16_xxxxRRRRGGGGBBBB_word_w) AM_BASE(&paletteram16)
226		AM_RANGE(0xfc000, 0xfffff) AM_WRITE(SMH_RAM)
	191	AM_RANGE(0xec000, 0xec7ff) AM_RAM_WRITE(pushman_videoram_w) AM_BASE(&videoram16)
	192	AM_RANGE(0xf8000, 0xf87ff) AM_RAM_WRITE(paletteram16_xxxxRRRRGGGGBBBB_word_w) AM_BASE(&paletteram16)
	193	AM_RANGE(0xfc000, 0xfffff) AM_RAM
227	194	ADDRESS_MAP_END
228	195
229	196	/******************************************************************************/
r4679	r4680
433	400
434	401	static void irqhandler(const device_config *device, int irq)
435	402	{
436		cpu_set_input_line(device->machine->cpu[1],0,irq ? ASSERT_LINE : CLEAR_LINE);
	403	cputag_set_input_line(device->machine, "audiocpu", 0, irq ? ASSERT_LINE : CLEAR_LINE);
437	404	}
438	405
439	406	static const ym2203_interface ym2203_config =
r4679	r4680
451	418
452	419	/* basic machine hardware */
453	420	MDRV_CPU_ADD("maincpu", M68000, 8000000)
454		MDRV_CPU_PROGRAM_MAP(readmem,writemem)
	421	MDRV_CPU_PROGRAM_MAP(pushman_map,0)
455	422	MDRV_CPU_VBLANK_INT("screen", irq2_line_hold)
456	423
457	424	MDRV_CPU_ADD("audiocpu", Z80, 4000000)
458		MDRV_CPU_PROGRAM_MAP(sound_readmem,sound_writemem)
	425	MDRV_CPU_PROGRAM_MAP(sound_map,0)
459	426	MDRV_CPU_IO_MAP(sound_io_map,0)
460	427
461	428	/* ElSemi. Reversed the CPU order so the sound callback works with bballs */
462	429	MDRV_CPU_ADD("mcu", M68705, 4000000)   /* No idea */
463		MDRV_CPU_PROGRAM_MAP(mcu_readmem,mcu_writemem)
	430	MDRV_CPU_PROGRAM_MAP(mcu_map,0)
464	431
465	432	MDRV_QUANTUM_TIME(HZ(3600))
466	433
r4679	r4680
493	460
494	461	/* basic machine hardware */
495	462	MDRV_CPU_ADD("maincpu", M68000, 8000000)
496		MDRV_CPU_PROGRAM_MAP(bballs_readmem,bballs_writemem)
	463	MDRV_CPU_PROGRAM_MAP(bballs_map,0)
497	464	MDRV_CPU_VBLANK_INT("screen", irq2_line_hold)
498	465
499	466	MDRV_CPU_ADD("audiocpu", Z80, 4000000)
500		MDRV_CPU_PROGRAM_MAP(sound_readmem,sound_writemem)
	467	MDRV_CPU_PROGRAM_MAP(sound_map,0)
501	468	MDRV_CPU_IO_MAP(sound_io_map,0)
502	469
503	470	MDRV_QUANTUM_TIME(HZ(3600))

src/mame/drivers/zerozone.c

r4679	r4680
62	62	{
63	63	if (ACCESSING_BITS_8_15)
64	64	{
65		soundlatch_w(space,offset,data >> 8);
66		cpu_set_input_line_and_vector(space->machine->cpu[1],0,HOLD_LINE,0xff);
	65	soundlatch_w(space, offset, data >> 8);
	66	cputag_set_input_line_and_vector(space->machine, "audiocpu", 0, HOLD_LINE, 0xff);
67	67	}
68	68	}
69	69

src/mame/drivers/espial.c

r4679	r4680
19	19	static TIMER_CALLBACK( interrupt_disable )
20	20	{
21	21	//interrupt_enable = 0;
22		cpu_interrupt_enable(machine->cpu[0],0);
	22	cpu_interrupt_enable(cputag_get_cpu(machine, "maincpu"), 0);
23	23	}
24	24
25	25	MACHINE_RESET( espial )
r4679	r4680
29	29	sound_nmi_enabled = FALSE;
30	30	}
31	31
	32	MACHINE_START( espial )
	33	{
	34	//state_save_register_global_array(machine, mcu_out[1]);
	35	state_save_register_global(machine, sound_nmi_enabled);
	36	}
32	37
	38
33	39	WRITE8_HANDLER( zodiac_master_interrupt_enable_w )
34	40	{
35	41	interrupt_enable_w(space,offset,~data & 1);
r4679	r4680
61	67	WRITE8_HANDLER( zodiac_master_soundlatch_w )
62	68	{
63	69	soundlatch_w(space, offset, data);
64		cpu_set_input_line(space->machine->cpu[1], 0, HOLD_LINE);
	70	cputag_set_input_line(space->machine, "audiocpu", 0, HOLD_LINE);
65	71	}
66	72
67	73
68
69		static ADDRESS_MAP_START( espial_readmem, ADDRESS_SPACE_PROGRAM, 8 )
70		AM_RANGE(0x0000, 0x4fff) AM_READ(SMH_ROM)
71		AM_RANGE(0x5800, 0x5fff) AM_READ(SMH_RAM)
	74	static ADDRESS_MAP_START( espial_map, ADDRESS_SPACE_PROGRAM, 8 )
	75	AM_RANGE(0x0000, 0x4fff) AM_ROM
	76	AM_RANGE(0x5800, 0x5fff) AM_RAM
72	77	AM_RANGE(0x6081, 0x6081) AM_READ_PORT("IN0")
73	78	AM_RANGE(0x6082, 0x6082) AM_READ_PORT("DSW1")
74	79	AM_RANGE(0x6083, 0x6083) AM_READ_PORT("IN1")
75	80	AM_RANGE(0x6084, 0x6084) AM_READ_PORT("IN2")
76		AM_RANGE(0x6090, 0x6090) AM_READ(soundlatch_r)   /* the main CPU reads the command back from the slave */
77		AM_RANGE(0x7000, 0x7000) AM_READ(watchdog_reset_r)
78		AM_RANGE(0x8000, 0x803f) AM_READ(SMH_RAM)
79		AM_RANGE(0x8400, 0x87ff) AM_READ(SMH_RAM)
80		AM_RANGE(0x8c00, 0x903f) AM_READ(SMH_RAM)
81		AM_RANGE(0x9400, 0x97ff) AM_READ(SMH_RAM)
82		AM_RANGE(0xc000, 0xcfff) AM_READ(SMH_ROM)
83		ADDRESS_MAP_END
84
85		static ADDRESS_MAP_START( espial_writemem, ADDRESS_SPACE_PROGRAM, 8 )
86		AM_RANGE(0x0000, 0x4fff) AM_WRITE(SMH_ROM)
87		AM_RANGE(0x5800, 0x5fff) AM_WRITE(SMH_RAM)
88		AM_RANGE(0x6090, 0x6090) AM_WRITE(zodiac_master_soundlatch_w)
89		AM_RANGE(0x7000, 0x7000) AM_WRITE(watchdog_reset_w)
	81	AM_RANGE(0x6090, 0x6090) AM_READWRITE(soundlatch_r, zodiac_master_soundlatch_w)   /* the main CPU reads the command back from the slave */
	82	AM_RANGE(0x7000, 0x7000) AM_READWRITE(watchdog_reset_r, watchdog_reset_w)
90	83	AM_RANGE(0x7100, 0x7100) AM_WRITE(zodiac_master_interrupt_enable_w)
91	84	AM_RANGE(0x7200, 0x7200) AM_WRITE(espial_flipscreen_w)
92		AM_RANGE(0x8000, 0x801f) AM_WRITE(SMH_RAM) AM_BASE(&espial_spriteram_1)
93		AM_RANGE(0x8400, 0x87ff) AM_WRITE(espial_videoram_w) AM_BASE(&espial_videoram)
	85	AM_RANGE(0x8000, 0x801f) AM_RAM AM_BASE(&espial_spriteram_1)
	86	AM_RANGE(0x8020, 0x803f) AM_READ(SMH_RAM)
	87	AM_RANGE(0x8400, 0x87ff) AM_RAM_WRITE(espial_videoram_w) AM_BASE(&espial_videoram)
94	88	AM_RANGE(0x8800, 0x880f) AM_WRITE(SMH_RAM) AM_BASE(&espial_spriteram_3)
95		AM_RANGE(0x8c00, 0x8fff) AM_WRITE(espial_attributeram_w) AM_BASE(&espial_attributeram)
96		AM_RANGE(0x9000, 0x901f) AM_WRITE(SMH_RAM) AM_BASE(&espial_spriteram_2)
97		AM_RANGE(0x9020, 0x903f) AM_WRITE(espial_scrollram_w) AM_BASE(&espial_scrollram)
98		AM_RANGE(0x9400, 0x97ff) AM_WRITE(espial_colorram_w) AM_BASE(&espial_colorram)
99		AM_RANGE(0xc000, 0xcfff) AM_WRITE(SMH_ROM)
	89	AM_RANGE(0x8c00, 0x8fff) AM_RAM_WRITE(espial_attributeram_w) AM_BASE(&espial_attributeram)
	90	AM_RANGE(0x9000, 0x901f) AM_RAM AM_BASE(&espial_spriteram_2)
	91	AM_RANGE(0x9020, 0x903f) AM_RAM_WRITE(espial_scrollram_w) AM_BASE(&espial_scrollram)
	92	AM_RANGE(0x9400, 0x97ff) AM_RAM_WRITE(espial_colorram_w) AM_BASE(&espial_colorram)
	93	AM_RANGE(0xc000, 0xcfff) AM_ROM
100	94	ADDRESS_MAP_END
101	95
102	96
103	97	/* there are a lot of unmapped reads from all over memory as the
104	98	code uses POP instructions in a delay loop */
105		static ADDRESS_MAP_START( netwars_readmem, ADDRESS_SPACE_PROGRAM, 8 )
106		AM_RANGE(0x0000, 0x3fff) AM_READ(SMH_ROM)
107		AM_RANGE(0x5800, 0x5fff) AM_READ(SMH_RAM)
	99	static ADDRESS_MAP_START( netwars_map, ADDRESS_SPACE_PROGRAM, 8 )
	100	AM_RANGE(0x0000, 0x3fff) AM_ROM
	101	AM_RANGE(0x5800, 0x5fff) AM_RAM
108	102	AM_RANGE(0x6081, 0x6081) AM_READ_PORT("IN0")
109	103	AM_RANGE(0x6082, 0x6082) AM_READ_PORT("DSW1")
110	104	AM_RANGE(0x6083, 0x6083) AM_READ_PORT("IN1")
111	105	AM_RANGE(0x6084, 0x6084) AM_READ_PORT("IN2")
112		AM_RANGE(0x6090, 0x6090) AM_READ(soundlatch_r)   /* the main CPU reads the command back from the slave */
113		AM_RANGE(0x7000, 0x7000) AM_READ(watchdog_reset_r)
114		AM_RANGE(0x8000, 0x97ff) AM_READ(SMH_RAM)
115		ADDRESS_MAP_END
116
117		static ADDRESS_MAP_START( netwars_writemem, ADDRESS_SPACE_PROGRAM, 8 )
118		AM_RANGE(0x0000, 0x3fff) AM_WRITE(SMH_ROM)
119		AM_RANGE(0x5800, 0x5fff) AM_WRITE(SMH_RAM)
120		AM_RANGE(0x6090, 0x6090) AM_WRITE(zodiac_master_soundlatch_w)
121		AM_RANGE(0x7000, 0x7000) AM_WRITE(watchdog_reset_w)
	106	AM_RANGE(0x6090, 0x6090) AM_READWRITE(soundlatch_r, zodiac_master_soundlatch_w)   /* the main CPU reads the command back from the slave */
	107	AM_RANGE(0x7000, 0x7000) AM_READWRITE(watchdog_reset_r, watchdog_reset_w)
122	108	AM_RANGE(0x7100, 0x7100) AM_WRITE(zodiac_master_interrupt_enable_w)
123	109	AM_RANGE(0x7200, 0x7200) AM_WRITE(espial_flipscreen_w)
124		AM_RANGE(0x8000, 0x801f) AM_WRITE(SMH_RAM) AM_BASE(&espial_spriteram_1)
125		AM_RANGE(0x8000, 0x87ff) AM_WRITE(espial_videoram_w) AM_BASE(&espial_videoram)
126		AM_RANGE(0x8800, 0x880f) AM_WRITE(SMH_RAM) AM_BASE(&espial_spriteram_3)
127		AM_RANGE(0x8800, 0x8fff) AM_WRITE(espial_attributeram_w) AM_BASE(&espial_attributeram)
128		AM_RANGE(0x9000, 0x901f) AM_WRITE(SMH_RAM) AM_BASE(&espial_spriteram_2)
129		AM_RANGE(0x9020, 0x903f) AM_WRITE(espial_scrollram_w) AM_BASE(&espial_scrollram)
130		AM_RANGE(0x9000, 0x97ff) AM_WRITE(espial_colorram_w) AM_BASE(&espial_colorram)
	110	AM_RANGE(0x8000, 0x801f) AM_RAM AM_BASE(&espial_spriteram_1)
	111	AM_RANGE(0x8000, 0x87ff) AM_RAM_WRITE(espial_videoram_w) AM_BASE(&espial_videoram)
	112	AM_RANGE(0x8800, 0x880f) AM_RAM AM_BASE(&espial_spriteram_3)
	113	AM_RANGE(0x8800, 0x8fff) AM_RAM_WRITE(espial_attributeram_w) AM_BASE(&espial_attributeram)
	114	AM_RANGE(0x9000, 0x901f) AM_RAM AM_BASE(&espial_spriteram_2)
	115	AM_RANGE(0x9020, 0x903f) AM_RAM_WRITE(espial_scrollram_w) AM_BASE(&espial_scrollram)
	116	AM_RANGE(0x9000, 0x97ff) AM_RAM_WRITE(espial_colorram_w) AM_BASE(&espial_colorram)
131	117	ADDRESS_MAP_END
132	118
133	119
134		static ADDRESS_MAP_START( sound_readmem, ADDRESS_SPACE_PROGRAM, 8 )
135		AM_RANGE(0x0000, 0x1fff) AM_READ(SMH_ROM)
136		AM_RANGE(0x2000, 0x23ff) AM_READ(SMH_RAM)
137		AM_RANGE(0x6000, 0x6000) AM_READ(soundlatch_r)
138		ADDRESS_MAP_END
139
140		static ADDRESS_MAP_START( sound_writemem, ADDRESS_SPACE_PROGRAM, 8 )
141		AM_RANGE(0x0000, 0x1fff) AM_WRITE(SMH_ROM)
142		AM_RANGE(0x2000, 0x23ff) AM_WRITE(SMH_RAM)
	120	static ADDRESS_MAP_START( espial_sound_map, ADDRESS_SPACE_PROGRAM, 8 )
	121	AM_RANGE(0x0000, 0x1fff) AM_ROM
	122	AM_RANGE(0x2000, 0x23ff) AM_RAM
143	123	AM_RANGE(0x4000, 0x4000) AM_WRITE(espial_sound_nmi_enable_w)
144		AM_RANGE(0x6000, 0x6000) AM_WRITE(soundlatch_w)
	124	AM_RANGE(0x6000, 0x6000) AM_READWRITE(soundlatch_r, soundlatch_w)
145	125	ADDRESS_MAP_END
146	126
147		static ADDRESS_MAP_START( sound_io_map, ADDRESS_SPACE_IO, 8 )
	127	static ADDRESS_MAP_START( espial_sound_io_map, ADDRESS_SPACE_IO, 8 )
148	128	ADDRESS_MAP_GLOBAL_MASK(0xff)
149	129	AM_RANGE(0x00, 0x01) AM_DEVWRITE("ay", ay8910_address_data_w)
150	130	ADDRESS_MAP_END
r4679	r4680
313	293
314	294	/* basic machine hardware */
315	295	MDRV_CPU_ADD("maincpu", Z80, 3072000)   /* 3.072 MHz */
316		MDRV_CPU_PROGRAM_MAP(espial_readmem,espial_writemem)
	296	MDRV_CPU_PROGRAM_MAP(espial_map,0)
317	297	MDRV_CPU_VBLANK_INT_HACK(zodiac_master_interrupt,2)
318	298
319	299	MDRV_CPU_ADD("audiocpu", Z80, 3072000)   /* 2 MHz?????? */
320		MDRV_CPU_PROGRAM_MAP(sound_readmem,sound_writemem)
321		MDRV_CPU_IO_MAP(sound_io_map,0)
	300	MDRV_CPU_PROGRAM_MAP(espial_sound_map,0)
	301	MDRV_CPU_IO_MAP(espial_sound_io_map,0)
322	302	MDRV_CPU_VBLANK_INT_HACK(espial_sound_nmi_gen,4)
323	303
324	304	MDRV_MACHINE_RESET(espial)
	305	MDRV_MACHINE_START(espial)
325	306
326	307	/* video hardware */
327	308	MDRV_SCREEN_ADD("screen", RASTER)
r4679	r4680
350	331	MDRV_IMPORT_FROM(espial)
351	332
352	333	MDRV_CPU_MODIFY("maincpu")
353		MDRV_CPU_PROGRAM_MAP(netwars_readmem,netwars_writemem)
	334	MDRV_CPU_PROGRAM_MAP(netwars_map,0)
354	335
355	336	/* video hardware */
356	337	MDRV_SCREEN_MODIFY("screen")
r4679	r4680
439	420
440	421
441	422
442		GAME( 1983, espial,  0,      espial,  espial,  0, ROT0,  "[Orca] Thunderbolt", "Espial (Europe)", 0 )
443		GAME( 1983, espialu, espial, espial,  espial,  0, ROT0,  "[Orca] Thunderbolt", "Espial (US?)", 0 )
444		GAME( 1983, netwars, 0,      netwars, netwars, 0, ROT90, "Orca (Esco Trading Co license)", "Net Wars", 0 )
	423	GAME( 1983, espial,  0,      espial,  espial,  0, ROT0,  "[Orca] Thunderbolt", "Espial (Europe)", GAME_SUPPORTS_SAVE )
	424	GAME( 1983, espialu, espial, espial,  espial,  0, ROT0,  "[Orca] Thunderbolt", "Espial (US?)", GAME_SUPPORTS_SAVE )
	425	GAME( 1983, netwars, 0,      netwars, netwars, 0, ROT90, "Orca (Esco Trading Co license)", "Net Wars", GAME_SUPPORTS_SAVE )

src/mame/drivers/hyperspt.c

r4679	r4680
70	70
71	71
72	72
73		static ADDRESS_MAP_START( hyperspt_readmem, ADDRESS_SPACE_PROGRAM, 8 )
74		AM_RANGE(0x1000, 0x10ff) AM_READ(SMH_RAM)
	73	static ADDRESS_MAP_START( hyperspt_map, ADDRESS_SPACE_PROGRAM, 8 )
	74	AM_RANGE(0x1000, 0x10bf) AM_RAM AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
	75	AM_RANGE(0x10c0, 0x10ff) AM_RAM AM_BASE(&hyperspt_scroll)   /* Scroll amount */
	76	AM_RANGE(0x1400, 0x1400) AM_WRITE(watchdog_reset_w)
	77	AM_RANGE(0x1480, 0x1480) AM_WRITE(hyperspt_flipscreen_w)
	78	AM_RANGE(0x1481, 0x1481) AM_WRITE(konami_sh_irqtrigger_w)  /* cause interrupt on audio CPU */
	79	AM_RANGE(0x1483, 0x1484) AM_WRITE(hyperspt_coin_counter_w)
	80	AM_RANGE(0x1487, 0x1487) AM_WRITE(interrupt_enable_w)  /* Interrupt enable */
	81	AM_RANGE(0x1500, 0x1500) AM_WRITE(soundlatch_w)
75	82	AM_RANGE(0x1600, 0x1600) AM_READ_PORT("DSW2")
76	83	AM_RANGE(0x1680, 0x1680) AM_READ_PORT("SYSTEM")
77	84	//  AM_RANGE(0x1681, 0x1681) AM_READ_PORT("P1_P2")
78	85	AM_RANGE(0x1681, 0x1681) AM_READ(konami_IN1_r)    /* P1/P2 IO and handle fake button for cheating */
79	86	AM_RANGE(0x1682, 0x1682) AM_READ_PORT("P3_P4")
80	87	AM_RANGE(0x1683, 0x1683) AM_READ_PORT("DSW1")
81		AM_RANGE(0x2000, 0x3fff) AM_READ(SMH_RAM)
82		AM_RANGE(0x4000, 0xffff) AM_READ(SMH_ROM)
	88	AM_RANGE(0x2000, 0x27ff) AM_RAM_WRITE(hyperspt_videoram_w) AM_BASE(&videoram)
	89	AM_RANGE(0x2800, 0x2fff) AM_RAM_WRITE(hyperspt_colorram_w) AM_BASE(&colorram)
	90	AM_RANGE(0x3000, 0x37ff) AM_RAM
	91	AM_RANGE(0x3800, 0x3fff) AM_RAM AM_BASE(&nvram) AM_SIZE(&nvram_size)
	92	AM_RANGE(0x4000, 0xffff) AM_ROM
83	93	ADDRESS_MAP_END
84	94
85		static ADDRESS_MAP_START( roadf_readmem, ADDRESS_SPACE_PROGRAM, 8 )
86		AM_RANGE(0x1000, 0x10ff) AM_READ(SMH_RAM)
87		AM_RANGE(0x1600, 0x1600) AM_READ_PORT("DSW2")
88		AM_RANGE(0x1680, 0x1680) AM_READ_PORT("SYSTEM")
89		AM_RANGE(0x1681, 0x1681) AM_READ_PORT("P1")
90		AM_RANGE(0x1682, 0x1682) AM_READ_PORT("P2")
91		AM_RANGE(0x1683, 0x1683) AM_READ_PORT("DSW1")
92		AM_RANGE(0x2000, 0x3fff) AM_READ(SMH_RAM)
93		AM_RANGE(0x4000, 0xffff) AM_READ(SMH_ROM)
94		ADDRESS_MAP_END
95
96		static ADDRESS_MAP_START( writemem, ADDRESS_SPACE_PROGRAM, 8 )
97		AM_RANGE(0x1000, 0x10bf) AM_WRITE(SMH_RAM) AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
98		AM_RANGE(0x10C0, 0x10ff) AM_WRITE(SMH_RAM) AM_BASE(&hyperspt_scroll)   /* Scroll amount */
	95	static ADDRESS_MAP_START( roadf_map, ADDRESS_SPACE_PROGRAM, 8 )
	96	AM_RANGE(0x1000, 0x10bf) AM_RAM AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
	97	AM_RANGE(0x10c0, 0x10ff) AM_RAM AM_BASE(&hyperspt_scroll)   /* Scroll amount */
99	98	AM_RANGE(0x1400, 0x1400) AM_WRITE(watchdog_reset_w)
100	99	AM_RANGE(0x1480, 0x1480) AM_WRITE(hyperspt_flipscreen_w)
101	100	AM_RANGE(0x1481, 0x1481) AM_WRITE(konami_sh_irqtrigger_w)  /* cause interrupt on audio CPU */
102	101	AM_RANGE(0x1483, 0x1484) AM_WRITE(hyperspt_coin_counter_w)
103	102	AM_RANGE(0x1487, 0x1487) AM_WRITE(interrupt_enable_w)  /* Interrupt enable */
104	103	AM_RANGE(0x1500, 0x1500) AM_WRITE(soundlatch_w)
105		AM_RANGE(0x2000, 0x27ff) AM_WRITE(hyperspt_videoram_w) AM_BASE(&videoram)
106		AM_RANGE(0x2800, 0x2fff) AM_WRITE(hyperspt_colorram_w) AM_BASE(&colorram)
107		AM_RANGE(0x3000, 0x37ff) AM_WRITE(SMH_RAM)
108		AM_RANGE(0x3800, 0x3fff) AM_WRITE(SMH_RAM) AM_BASE(&nvram) AM_SIZE(&nvram_size)
109		AM_RANGE(0x4000, 0xffff) AM_WRITE(SMH_ROM)
	104	AM_RANGE(0x1600, 0x1600) AM_READ_PORT("DSW2")
	105	AM_RANGE(0x1680, 0x1680) AM_READ_PORT("SYSTEM")
	106	AM_RANGE(0x1681, 0x1681) AM_READ_PORT("P1")
	107	AM_RANGE(0x1682, 0x1682) AM_READ_PORT("P2")
	108	AM_RANGE(0x1683, 0x1683) AM_READ_PORT("DSW1")
	109	AM_RANGE(0x2000, 0x27ff) AM_RAM_WRITE(hyperspt_videoram_w) AM_BASE(&videoram)
	110	AM_RANGE(0x2800, 0x2fff) AM_RAM_WRITE(hyperspt_colorram_w) AM_BASE(&colorram)
	111	AM_RANGE(0x3000, 0x37ff) AM_RAM
	112	AM_RANGE(0x3800, 0x3fff) AM_RAM AM_BASE(&nvram) AM_SIZE(&nvram_size)
	113	AM_RANGE(0x4000, 0xffff) AM_ROM
110	114	ADDRESS_MAP_END
111	115
112		static ADDRESS_MAP_START( sound_readmem, ADDRESS_SPACE_PROGRAM, 8 )
113		AM_RANGE(0x0000, 0x3fff) AM_READ(SMH_ROM)
114		AM_RANGE(0x4000, 0x4fff) AM_READ(SMH_RAM)
	116	static ADDRESS_MAP_START( sound_map, ADDRESS_SPACE_PROGRAM, 8 )
	117	AM_RANGE(0x0000, 0x3fff) AM_ROM
	118	AM_RANGE(0x4000, 0x4fff) AM_RAM
115	119	AM_RANGE(0x6000, 0x6000) AM_READ(soundlatch_r)
116	120	AM_RANGE(0x8000, 0x8000) AM_READ(hyperspt_sh_timer_r)
117		ADDRESS_MAP_END
118
119		static ADDRESS_MAP_START( sound_writemem, ADDRESS_SPACE_PROGRAM, 8 )
120		AM_RANGE(0x0000, 0x3fff) AM_WRITE(SMH_ROM)
121		AM_RANGE(0x4000, 0x4fff) AM_WRITE(SMH_RAM)
122	121	AM_RANGE(0xa000, 0xa000) AM_DEVWRITE("vlm", vlm5030_data_w) /* speech data */
123	122	AM_RANGE(0xc000, 0xdfff) AM_DEVWRITE("vlm", hyperspt_sound_w)     /* speech and output control */
124	123	AM_RANGE(0xe000, 0xe000) AM_DEVWRITE("dac", dac_w)
r4679	r4680
309	308
310	309	/* basic machine hardware */
311	310	MDRV_CPU_ADD("maincpu", M6809, XTAL_18_432MHz/12)   /* verified on pcb */
312		MDRV_CPU_PROGRAM_MAP(hyperspt_readmem,writemem)
	311	MDRV_CPU_PROGRAM_MAP(hyperspt_map,0)
313	312	MDRV_CPU_VBLANK_INT("screen", irq0_line_hold)
314	313
315	314	MDRV_CPU_ADD("audiocpu", Z80,XTAL_14_31818MHz/4) /* verified on pcb */
316		MDRV_CPU_PROGRAM_MAP(sound_readmem,sound_writemem)
	315	MDRV_CPU_PROGRAM_MAP(sound_map,0)
317	316
318	317	MDRV_NVRAM_HANDLER(hyperspt)
319	318
r4679	r4680
349	348	static MACHINE_DRIVER_START( roadf )
350	349	MDRV_IMPORT_FROM(hyperspt)
351	350	MDRV_CPU_MODIFY("maincpu")
352		MDRV_CPU_PROGRAM_MAP(roadf_readmem, writemem)
	351	MDRV_CPU_PROGRAM_MAP(roadf_map,0)
353	352	MDRV_GFXDECODE(roadf)
354	353	MDRV_VIDEO_START(roadf)
355	354	MACHINE_DRIVER_END

src/mame/drivers/tiamc1.c

r4679	r4680
120	120
121	121	static MACHINE_RESET( tiamc1 )
122	122	{
123		const address_space *space = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM);
	123	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
124	124	tiamc1_bankswitch_w(space, 0, 0);
125	125	}
126	126

src/mame/drivers/toaplan1.c

r4679	r4680
1224	1224
1225	1225	static void irqhandler(const device_config *device, int linestate)
1226	1226	{
1227		cpu_set_input_line(device->machine->cpu[1],0,linestate);
	1227	cputag_set_input_line(device->machine, "audiocpu", 0, linestate);
1228	1228	}
1229	1229
1230	1230	static const ym3812_interface ym3812_config =

src/mame/drivers/segag80r.c

r4679	r4680
160	160	{
161	161	/* pressing the service switch sends an NMI */
162	162	if (newval)
163		cpu_set_input_line(field->port->machine->cpu[0], INPUT_LINE_NMI, PULSE_LINE);
	163	cputag_set_input_line(field->port->machine, "maincpu", INPUT_LINE_NMI, PULSE_LINE);
164	164	}
165	165
166	166
r4679	r4680
296	296
297	297	static WRITE8_DEVICE_HANDLER( sindbadm_soundport_w )
298	298	{
299		const address_space *space = cpu_get_address_space(device->machine->cpu[0], ADDRESS_SPACE_PROGRAM);
300		soundlatch_w(space,0,data);
301		cpu_set_input_line(device->machine->cpu[1], INPUT_LINE_NMI, PULSE_LINE);
	299	const address_space *space = cputag_get_address_space(device->machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	300	soundlatch_w(space, 0, data);
	301	cputag_set_input_line(device->machine, "audiocpu", INPUT_LINE_NMI, PULSE_LINE);
302	302	cpuexec_boost_interleave(device->machine, attotime_zero, ATTOTIME_IN_USEC(50));
303	303	}
304	304
r4679	r4680
1396	1396	/* expand the background ROMs; A11/A12 of each ROM is independently controlled via */
1397	1397	/* banking */
1398	1398	dest = memory_region(machine, region);
1399		temp = malloc_or_die(0x4000);
	1399	temp = alloc_array_or_die(UINT8, 0x4000);
1400	1400	memcpy(temp, dest, 0x4000);
1401	1401
1402	1402	/* 16 effective total banks */
r4679	r4680
1425	1425	segag80r_background_pcb = G80_BACKGROUND_NONE;
1426	1426
1427	1427	/* install speech board */
1428		memory_install_write8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_IO), 0x38, 0x38, 0, 0, sega_speech_data_w);
1429		memory_install_write8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_IO), 0x3b, 0x3b, 0, 0, sega_speech_control_w);
	1428	memory_install_write8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_IO), 0x38, 0x38, 0, 0, sega_speech_data_w);
	1429	memory_install_write8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_IO), 0x3b, 0x3b, 0, 0, sega_speech_control_w);
1430	1430
1431	1431	/* install Astro Blaster sound board */
1432		memory_install_write8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_IO), 0x3e, 0x3f, 0, 0, astrob_sound_w);
	1432	memory_install_write8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_IO), 0x3e, 0x3f, 0, 0, astrob_sound_w);
1433	1433	}
1434	1434
1435	1435
r4679	r4680
1452	1452	segag80r_background_pcb = G80_BACKGROUND_SPACEOD;
1453	1453
1454	1454	/* configure ports for the background board */
1455		memory_install_readwrite8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_IO), 0x08, 0x0f, 0, 0, spaceod_back_port_r, spaceod_back_port_w);
	1455	memory_install_readwrite8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_IO), 0x08, 0x0f, 0, 0, spaceod_back_port_r, spaceod_back_port_w);
1456	1456
1457	1457	/* install Space Odyssey sound board */
1458		memory_install_write8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_IO), 0x0e, 0x0f, 0, 0, spaceod_sound_w);
	1458	memory_install_write8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_IO), 0x0e, 0x0f, 0, 0, spaceod_sound_w);
1459	1459
1460	1460	/* install our wacky mangled ports */
1461		memory_install_read8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_IO), 0xf8, 0xfb, 0, 0, spaceod_mangled_ports_r);
1462		memory_install_read8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_IO), 0xfc, 0xfc, 0, 0, spaceod_port_fc_r);
	1461	memory_install_read8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_IO), 0xf8, 0xfb, 0, 0, spaceod_mangled_ports_r);
	1462	memory_install_read8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_IO), 0xfc, 0xfc, 0, 0, spaceod_port_fc_r);
1463	1463	}
1464	1464
1465	1465
r4679	r4680
1473	1473	monsterb_expand_gfx(machine, "gfx1");
1474	1474
1475	1475	/* install background board handlers */
1476		memory_install_write8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_IO), 0xb8, 0xbd, 0, 0, monsterb_back_port_w);
1477		memory_install_write8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xe000, 0xffff, 0, 0, monsterb_vidram_w);
	1476	memory_install_write8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_IO), 0xb8, 0xbd, 0, 0, monsterb_back_port_w);
	1477	memory_install_write8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xe000, 0xffff, 0, 0, monsterb_vidram_w);
1478	1478	}
1479	1479
1480	1480
r4679	r4680
1489	1489	monsterb_expand_gfx(machine, "gfx1");
1490	1490
1491	1491	/* install background board handlers */
1492		memory_install_write8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_IO), 0xb4, 0xb5, 0, 0, pignewt_back_color_w);
1493		memory_install_write8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_IO), 0xb8, 0xbd, 0, 0, pignewt_back_port_w);
1494		memory_install_write8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xe000, 0xffff, 0, 0, pignewt_vidram_w);
	1492	memory_install_write8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_IO), 0xb4, 0xb5, 0, 0, pignewt_back_color_w);
	1493	memory_install_write8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_IO), 0xb8, 0xbd, 0, 0, pignewt_back_port_w);
	1494	memory_install_write8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xe000, 0xffff, 0, 0, pignewt_vidram_w);
1495	1495	}
1496	1496
1497	1497
r4679	r4680
1505	1505	monsterb_expand_gfx(machine, "gfx1");
1506	1506
1507	1507	/* install background board handlers */
1508		memory_install_write8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_IO), 0xb4, 0xb5, 0, 0, pignewt_back_color_w);
1509		memory_install_write8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_IO), 0xb8, 0xbd, 0, 0, pignewt_back_port_w);
1510		memory_install_write8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xe000, 0xffff, 0, 0, pignewt_vidram_w);
	1508	memory_install_write8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_IO), 0xb4, 0xb5, 0, 0, pignewt_back_color_w);
	1509	memory_install_write8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_IO), 0xb8, 0xbd, 0, 0, pignewt_back_port_w);
	1510	memory_install_write8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xe000, 0xffff, 0, 0, pignewt_vidram_w);
1511	1511
1512	1512	/* install Universal sound board */
1513		memory_install_readwrite8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_IO), 0x3f, 0x3f, 0, 0, sega_usb_status_r, sega_usb_data_w);
1514		memory_install_readwrite8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xd000, 0xdfff, 0, 0, sega_usb_ram_r, usb_ram_w);
	1513	memory_install_readwrite8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_IO), 0x3f, 0x3f, 0, 0, sega_usb_status_r, sega_usb_data_w);
	1514	memory_install_readwrite8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xd000, 0xdfff, 0, 0, sega_usb_ram_r, usb_ram_w);
1515	1515	}
1516	1516
1517	1517
r4679	r4680
1525	1525	segag80r_background_pcb = G80_BACKGROUND_SINDBADM;
1526	1526
1527	1527	/* install background board handlers */
1528		memory_install_write8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_IO), 0x40, 0x41, 0, 0, sindbadm_back_port_w);
1529		memory_install_write8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xe000, 0xffff, 0, 0, sindbadm_vidram_w);
	1528	memory_install_write8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_IO), 0x40, 0x41, 0, 0, sindbadm_back_port_w);
	1529	memory_install_write8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xe000, 0xffff, 0, 0, sindbadm_vidram_w);
1530	1530	}
1531	1531
1532	1532

src/mame/drivers/hnayayoi.c

r4679	r4680
103	103
104	104
105	105
106		static ADDRESS_MAP_START( hnayayoi_readmem, ADDRESS_SPACE_PROGRAM, 8 )
107		AM_RANGE(0x0000, 0x77ff) AM_READ(SMH_ROM)
108		AM_RANGE(0x7800, 0x7fff) AM_READ(SMH_RAM)
109		AM_RANGE(0x8000, 0xffff) AM_READ(SMH_ROM)
	106	static ADDRESS_MAP_START( hnayayoi_map, ADDRESS_SPACE_PROGRAM, 8 )
	107	AM_RANGE(0x0000, 0x77ff) AM_ROM
	108	AM_RANGE(0x7800, 0x7fff) AM_RAM AM_BASE(&generic_nvram) AM_SIZE(&generic_nvram_size)
	109	AM_RANGE(0x8000, 0xffff) AM_ROM
110	110	ADDRESS_MAP_END
111	111
112		static ADDRESS_MAP_START( hnayayoi_writemem, ADDRESS_SPACE_PROGRAM, 8 )
113		AM_RANGE(0x0000, 0x77ff) AM_WRITE(SMH_ROM)
114		AM_RANGE(0x7800, 0x7fff) AM_WRITE(SMH_RAM) AM_BASE(&generic_nvram) AM_SIZE(&generic_nvram_size)
115		AM_RANGE(0x8000, 0xffff) AM_WRITE(SMH_ROM)
116		ADDRESS_MAP_END
117
118	112	static ADDRESS_MAP_START( hnayayoi_io_map, ADDRESS_SPACE_IO, 8 )
119	113	ADDRESS_MAP_GLOBAL_MASK(0xff)
120	114	AM_RANGE(0x00, 0x01) AM_DEVWRITE("ym", ym2203_w)
r4679	r4680
135	129	AM_RANGE(0x62, 0x67) AM_WRITE(dynax_blitter_rev1_param_w)
136	130	ADDRESS_MAP_END
137	131
138		static ADDRESS_MAP_START( hnfubuki_readmem, ADDRESS_SPACE_PROGRAM, 8 )
139		AM_RANGE(0x0000, 0x77ff) AM_READ(SMH_ROM)
140		AM_RANGE(0x7800, 0x7fff) AM_READ(SMH_RAM)
141		AM_RANGE(0x8000, 0xfeff) AM_READ(SMH_ROM)
	132	static ADDRESS_MAP_START( hnfubuki_map, ADDRESS_SPACE_PROGRAM, 8 )
	133	AM_RANGE(0x0000, 0x77ff) AM_ROM
	134	AM_RANGE(0x7800, 0x7fff) AM_RAM AM_BASE(&generic_nvram) AM_SIZE(&generic_nvram_size)
	135	AM_RANGE(0x8000, 0xfeff) AM_ROM
	136	AM_RANGE(0xff00, 0xff01) AM_DEVWRITE("ym", ym2203_w)
142	137	AM_RANGE(0xff02, 0xff03) AM_DEVREAD("ym", ym2203_r)
143	138	AM_RANGE(0xff04, 0xff04) AM_READ_PORT("DSW3")
144		AM_RANGE(0xff41, 0xff41) AM_READ(keyboard_0_r)
145		AM_RANGE(0xff42, 0xff42) AM_READ(keyboard_1_r)
146		AM_RANGE(0xff43, 0xff43) AM_READ_PORT("COIN")
147		ADDRESS_MAP_END
148
149		static ADDRESS_MAP_START( hnfubuki_writemem, ADDRESS_SPACE_PROGRAM, 8 )
150		AM_RANGE(0x0000, 0x77ff) AM_WRITE(SMH_ROM)
151		AM_RANGE(0x7800, 0x7fff) AM_WRITE(SMH_RAM) AM_BASE(&generic_nvram) AM_SIZE(&generic_nvram_size)
152		AM_RANGE(0x8000, 0xfeff) AM_WRITE(SMH_ROM)
153		AM_RANGE(0xff00, 0xff01) AM_DEVWRITE("ym", ym2203_w)
154	139	AM_RANGE(0xff06, 0xff06) AM_DEVWRITE("msm", adpcm_data_w)
155	140	//  AM_RANGE(0xff08, 0xff08) AM_WRITENOP // CRT Controller
156	141	//  AM_RANGE(0xff09, 0xff09) AM_WRITENOP // CRT Controller
r4679	r4680
159	144	AM_RANGE(0xff23, 0xff23) AM_DEVWRITE("msm", adpcm_vclk_w)
160	145	AM_RANGE(0xff24, 0xff24) AM_DEVWRITE("msm", adpcm_reset_inv_w)
161	146	AM_RANGE(0xff40, 0xff40) AM_WRITE(keyboard_w)
	147	AM_RANGE(0xff41, 0xff41) AM_READ(keyboard_0_r)
	148	AM_RANGE(0xff42, 0xff42) AM_READ(keyboard_1_r)
	149	AM_RANGE(0xff43, 0xff43) AM_READ_PORT("COIN")
162	150	AM_RANGE(0xff60, 0xff61) AM_WRITE(hnayayoi_palbank_w)
163	151	AM_RANGE(0xff62, 0xff67) AM_WRITE(dynax_blitter_rev1_param_w)
164	152	ADDRESS_MAP_END
165	153
166		static ADDRESS_MAP_START( untoucha_readmem, ADDRESS_SPACE_PROGRAM, 8 )
167		AM_RANGE(0x0000, 0x77ff) AM_READ(SMH_ROM)
168		AM_RANGE(0x7800, 0x7fff) AM_READ(SMH_RAM)
169		AM_RANGE(0x8000, 0xffff) AM_READ(SMH_ROM)
	154	static ADDRESS_MAP_START( untoucha_map, ADDRESS_SPACE_PROGRAM, 8 )
	155	AM_RANGE(0x0000, 0x77ff) AM_ROM
	156	AM_RANGE(0x7800, 0x7fff) AM_RAM AM_BASE(&generic_nvram) AM_SIZE(&generic_nvram_size)
	157	AM_RANGE(0x8000, 0xffff) AM_ROM
170	158	ADDRESS_MAP_END
171	159
172		static ADDRESS_MAP_START( untoucha_writemem, ADDRESS_SPACE_PROGRAM, 8 )
173		AM_RANGE(0x0000, 0x77ff) AM_WRITE(SMH_ROM)
174		AM_RANGE(0x7800, 0x7fff) AM_WRITE(SMH_RAM) AM_BASE(&generic_nvram) AM_SIZE(&generic_nvram_size)
175		AM_RANGE(0x8000, 0xffff) AM_WRITE(SMH_ROM)
176		ADDRESS_MAP_END
177
178	160	static ADDRESS_MAP_START( untoucha_io_map, ADDRESS_SPACE_IO, 8 )
179	161	ADDRESS_MAP_GLOBAL_MASK(0xff)
180	162	AM_RANGE(0x10, 0x10) AM_DEVWRITE("ym", ym2203_control_port_w)
r4679	r4680
562	544	static MACHINE_DRIVER_START( hnayayoi )
563	545	/* basic machine hardware */
564	546	MDRV_CPU_ADD("maincpu", Z80, 20000000/4 )        /* 5 MHz ???? */
565		MDRV_CPU_PROGRAM_MAP(hnayayoi_readmem,hnayayoi_writemem)
	547	MDRV_CPU_PROGRAM_MAP(hnayayoi_map,0)
566	548	MDRV_CPU_IO_MAP(hnayayoi_io_map,0)
567	549	MDRV_CPU_VBLANK_INT("screen", irq0_line_hold)
568	550	MDRV_CPU_PERIODIC_INT(nmi_line_pulse, 8000)
r4679	r4680
603	585	static MACHINE_DRIVER_START( hnfubuki )
604	586	MDRV_IMPORT_FROM(hnayayoi)
605	587	MDRV_CPU_MODIFY("maincpu")
606		MDRV_CPU_PROGRAM_MAP(hnfubuki_readmem,hnfubuki_writemem)
	588	MDRV_CPU_PROGRAM_MAP(hnfubuki_map,0)
607	589	MACHINE_DRIVER_END
608	590
609	591	static MACHINE_DRIVER_START( untoucha )
610	592	MDRV_IMPORT_FROM(hnayayoi)
611	593	MDRV_CPU_MODIFY("maincpu")
612		MDRV_CPU_PROGRAM_MAP(untoucha_readmem,untoucha_writemem)
	594	MDRV_CPU_PROGRAM_MAP(untoucha_map,0)
613	595	MDRV_CPU_IO_MAP(untoucha_io_map,0)
614	596
615	597	MDRV_VIDEO_START(untoucha)

src/mame/drivers/shanghai.c

r4679	r4680
59	59
60	60	static VIDEO_START( shanghai )
61	61	{
62		HD63484_start();
	62	HD63484_start(machine);
63	63	}
64	64
65	65	static VIDEO_UPDATE( shanghai )

src/mame/drivers/tmnt.c

r4679	r4680
195	195	static WRITE16_HANDLER( tmnt_sound_command_w )
196	196	{
197	197	if (ACCESSING_BITS_0_7)
198		soundlatch_w(space,0,data & 0xff);
	198	soundlatch_w(space, 0, data & 0xff);
199	199	}
200	200
201	201	static READ8_DEVICE_HANDLER( punkshot_sound_r )
202	202	{
203	203	/* If the sound CPU is running, read the status, otherwise
204	204	just make it pass the test */
205		return k053260_r(device,2 + offset);
	205	return k053260_r(device, 2 + offset);
206	206	}
207	207
208	208	static WRITE8_DEVICE_HANDLER( glfgreat_sound_w )
r4679	r4680
210	210	k053260_w(device, offset, data);
211	211
212	212	if (offset)
213		cpu_set_input_line_and_vector(device->machine->cpu[1],0,HOLD_LINE,0xff);
	213	cputag_set_input_line_and_vector(device->machine, "audiocpu", 0, HOLD_LINE, 0xff);
214	214	}
215	215
216	216	static READ16_HANDLER( prmrsocr_sound_r )
r4679	r4680
223	223	if (ACCESSING_BITS_0_7)
224	224	{
225	225	data &= 0xff;
226		if (offset == 0) soundlatch_w(space,0,data);
227		else soundlatch2_w(space,0,data);
	226	if (offset == 0) soundlatch_w(space, 0, data);
	227	else soundlatch2_w(space, 0, data);
228	228	}
229	229	}
230	230
231	231	static WRITE16_HANDLER( prmrsocr_sound_irq_w )
232	232	{
233		cpu_set_input_line_and_vector(space->machine->cpu[1],0,HOLD_LINE,0xff);
	233	cputag_set_input_line_and_vector(space->machine, "audiocpu", 0, HOLD_LINE, 0xff);
234	234	}
235	235
236	236	static WRITE8_HANDLER( prmrsocr_audio_bankswitch_w )
r4679	r4680
280	280	int i;
281	281	UINT8 *source = memory_region(machine, "title");
282	282
283		sampledata = auto_malloc(0x40000*sizeof(sampledata[0]));
	283	sampledata = auto_alloc_array(machine, INT16, 0x40000);
284	284
285	285	/*  Sound sample for TMNT.D05 is stored in the following mode (ym3012 format):
286	286	*
r4679	r4680
317	317
318	318	static TIMER_CALLBACK( nmi_callback )
319	319	{
320		cpu_set_input_line(machine->cpu[1], INPUT_LINE_NMI, ASSERT_LINE);
	320	cputag_set_input_line(machine, "audiocpu", INPUT_LINE_NMI, ASSERT_LINE);
321	321	}
322	322
323	323	static WRITE8_HANDLER( sound_arm_nmi_w )
324	324	{
325	325	//  sound_nmi_enabled = 1;
326		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_NMI, CLEAR_LINE);
	326	cputag_set_input_line(space->machine, "audiocpu", INPUT_LINE_NMI, CLEAR_LINE);
327	327	timer_set(space->machine, ATTOTIME_IN_USEC(50), NULL,0,nmi_callback);   /* kludge until the K053260 is emulated correctly */
328	328	}
329	329
r4679	r4680
591	591
592	592	/* bit 5 triggers IRQ on sound cpu */
593	593	if (last == 0 && (data & 0x20) != 0)
594		cpu_set_input_line_and_vector(space->machine->cpu[1],0,HOLD_LINE,0xff);
	594	cputag_set_input_line_and_vector(space->machine, "audiocpu", 0, HOLD_LINE, 0xff);
595	595	last = data & 0x20;
596	596
597	597	/* bit 6 = enable char ROM reading through the video RAM */
r4679	r4680
755	755	static WRITE16_HANDLER( ssriders_soundkludge_w )
756	756	{
757	757	/* I think this is more than just a trigger */
758		cpu_set_input_line_and_vector(space->machine->cpu[1],0,HOLD_LINE,0xff);
	758	cputag_set_input_line_and_vector(space->machine, "audiocpu", 0, HOLD_LINE, 0xff);
759	759	}
760	760
761	761	static ADDRESS_MAP_START( blswhstl_main_map, ADDRESS_SPACE_PROGRAM, 16 )
r4679	r4680
1229	1229
1230	1230	static ADDRESS_MAP_START( prmrsocr_audio_map, ADDRESS_SPACE_PROGRAM, 8 )
1231	1231	AM_RANGE(0x0000, 0x7fff) AM_ROM
1232		AM_RANGE(0x8000, 0xbfff) AM_READWRITE(SMH_BANK1, SMH_ROM)
	1232	AM_RANGE(0x8000, 0xbfff) AM_READWRITE(SMH_BANK(1), SMH_ROM)
1233	1233	AM_RANGE(0xc000, 0xdfff) AM_RAM
1234	1234	AM_RANGE(0xe000, 0xe0ff) AM_DEVREADWRITE("konami", k054539_r, k054539_w)
1235	1235	AM_RANGE(0xe100, 0xe12f) AM_DEVREADWRITE("konami", k054539_ctrl_r, k054539_ctrl_w)
r4679	r4680
2373	2373
2374	2374	static void sound_nmi(const device_config *device)
2375	2375	{
2376		cpu_set_input_line(device->machine->cpu[1], INPUT_LINE_NMI, PULSE_LINE);
	2376	cputag_set_input_line(device->machine, "audiocpu", INPUT_LINE_NMI, PULSE_LINE);
2377	2377	}
2378	2378
2379	2379	static const k054539_interface k054539_config =
r4679	r4680
3749	3749	}
3750	3750	}
3751	3751
3752		temp = malloc_or_die(len);
	3752	temp = alloc_array_or_die(UINT8, len);
3753	3753	memcpy(temp,gfxdata,len);
3754	3754	for (A = 0;A < len/4;A++)
3755	3755	{
r4679	r4680
3845	3845	}
3846	3846	}
3847	3847
3848		temp = malloc_or_die(len);
	3848	temp = alloc_array_or_die(UINT8, len);
3849	3849	memcpy(temp,gfxdata,len);
3850	3850	code_conv_table = &memory_region(machine, "proms")[0x0000];
3851	3851	for (A = 0;A < len/4;A++)

src/mame/drivers/jpmimpct.c

r4679	r4680
155	155
156	156	static void update_irqs(running_machine *machine)
157	157	{
158		cpu_set_input_line(machine->cpu[0], 2, tms_irq ? ASSERT_LINE : CLEAR_LINE);
159		cpu_set_input_line(machine->cpu[0], 5, duart_1_irq ? ASSERT_LINE : CLEAR_LINE);
	158	cputag_set_input_line(machine, "maincpu", 2, tms_irq ? ASSERT_LINE : CLEAR_LINE);
	159	cputag_set_input_line(machine, "maincpu", 5, duart_1_irq ? ASSERT_LINE : CLEAR_LINE);
160	160	}
161	161
162	162
r4679	r4680
197	197
198	198	static WRITE16_HANDLER( m68k_tms_w )
199	199	{
200		tms34010_host_w(space->machine->cpu[1], offset, data);
	200	tms34010_host_w(cputag_get_cpu(space->machine, "dsp"), offset, data);
201	201	}
202	202
203	203	static READ16_HANDLER( m68k_tms_r )
204	204	{
205		return tms34010_host_r(space->machine->cpu[1], offset);
	205	return tms34010_host_r(cputag_get_cpu(space->machine, "dsp"), offset);
206	206	}
207	207
208	208

src/mame/drivers/namcos12.c

r4679	r4680
1156	1156
1157	1157	static void system11gun_install( running_machine *machine )
1158	1158	{
1159		memory_install_write32_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x1f788000, 0x1f788003, 0, 0, system11gun_w );
1160		memory_install_read32_handler (cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x1f780000, 0x1f78000f, 0, 0, system11gun_r );
	1159	memory_install_write32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x1f788000, 0x1f788003, 0, 0, system11gun_w );
	1160	memory_install_read32_handler (cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x1f780000, 0x1f78000f, 0, 0, system11gun_r );
1161	1161	}
1162	1162
1163	1163	static UINT8 kcram[ 12 ];
r4679	r4680
1225	1225
1226	1226	static MACHINE_RESET( namcos12 )
1227	1227	{
1228		const address_space *space = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM);
	1228	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
1229	1229	psx_machine_init(machine);
1230	1230	bankoffset_w(space,0,0,0xffffffff);
1231	1231	has_tektagt_dma = 0;
r4679	r4680
1260	1260	strcmp( machine->gamedrv->name, "ghlpanic" ) == 0 )
1261	1261	{
1262	1262	/* this is based on guesswork, it might not even be keycus. */
1263		memory_install_read32_handler (space, 0x1fc20280, 0x1fc2028b, 0, 0, SMH_BANK2 );
	1263	memory_install_read32_handler (space, 0x1fc20280, 0x1fc2028b, 0, 0, (read32_space_func)SMH_BANK(2) );
1264	1264	memory_install_write32_handler(space, 0x1f008000, 0x1f008003, 0, 0, kcon_w );
1265	1265	memory_install_write32_handler(space, 0x1f018000, 0x1f018003, 0, 0, kcoff_w );
1266	1266

src/mame/drivers/raiden2.c

r4679	r4680
1709	1709	ROM_REGION( 0x100000, "oki2", ROMREGION_ERASEFF )   /* ADPCM samples */
1710	1710	ROM_END
1711	1711
	1712	ROM_START( zeroteac )
	1713	ROM_REGION( 0x200000, "user1", 0 ) /* v30 main cpu */
	1714	ROM_LOAD32_BYTE("b1.024",   0x000000, 0x40000, CRC(528de3b9) SHA1(9ca8cdc0212f2540e852d20ab4c04f68b967d024) )
	1715	ROM_LOAD32_BYTE("b3.023",   0x000002, 0x40000, CRC(3688739a) SHA1(f98f461fb8e7804b3b4020a5e3762d36d6458a62) )
	1716	ROM_LOAD32_BYTE("b2.025",   0x000001, 0x40000, CRC(5176015e) SHA1(6b372564b2f1b1f56cae0c98f4ca588b784bfa3d) )
	1717	ROM_LOAD32_BYTE("b4.026",   0x000003, 0x40000, CRC(c79925cb) SHA1(aaff9f626ec61bc0ff038ebd722fe361dccc49fb) )
	1718
	1719	ROM_REGION( 0x40000, "user2", 0 )   /* COPDX */
	1720	ROM_LOAD( "copx-d2",   0x00000, 0x40000, CRC(a6732ff9) SHA1(c4856ec77869d9098da24b1bb3d7d58bb74b4cda) )
	1721
	1722	ROM_REGION( 0x20000, "audiocpu", 0 ) /* 64k code for sound Z80 */
	1723	ROM_LOAD( "5.bin",  0x000000, 0x10000, CRC(efc484ca) SHA1(c34b8e3e7f4c2967bc6414348993478ed637d338) )
	1724
	1725	ROM_REGION( 0x020000, "gfx1", ROMREGION_DISPOSE ) /* chars */
	1726	ROM_LOAD16_BYTE( "b7.072",   0x000000,   0x010000, CRC(30ec0241) SHA1(a0d0be9458bf97cb9764fb85c988bb816710475e) )
	1727	ROM_LOAD16_BYTE( "b8.077",   0x000001,   0x010000, CRC(e18b3a75) SHA1(3d52bba8d47d0d9108ee79014fd64d6e856a3fde) )
	1728
	1729	ROM_REGION( 0x400000, "gfx2", ROMREGION_DISPOSE ) /* background gfx */
	1730	ROM_LOAD( "back-1",   0x000000, 0x100000, CRC(8b7f9219) SHA1(3412b6f8a4fe245e521ddcf185a53f2f4520eb57) )
	1731	ROM_LOAD( "back-2",   0x100000, 0x080000, CRC(ce61c952) SHA1(52a843c8ba428b121fab933dd3b313b2894d80ac) )
	1732
	1733	ROM_REGION( 0x800000, "gfx3", ROMREGION_DISPOSE ) /* sprite gfx (encrypted) (diff encrypt to raiden2? ) */
	1734	ROM_LOAD32_WORD( "obj-1",  0x000000, 0x200000, CRC(45be8029) SHA1(adc164f9dede9a86b96a4d709e9cba7d2ad0e564) )
	1735	ROM_LOAD32_WORD( "obj-2",  0x000002, 0x200000, CRC(cb61c19d) SHA1(151a2ce9c32f3321a974819e9b165dddc31c8153) )
	1736
	1737	ROM_REGION( 0x100000, "oki1", 0 )   /* ADPCM samples */
	1738	ROM_LOAD( "6.105", 0x00000, 0x40000,  CRC(b4a6e899) SHA1(175ab656db3c3258ff10eede89890f62435d2298) )
	1739
	1740	ROM_REGION( 0x100000, "oki2", ROMREGION_ERASEFF )   /* ADPCM samples */
	1741	ROM_END
	1742
1712	1743	/* Different hardware, uses COPX-D3 for protection  */
1713	1744	ROM_START( nzerotea )
1714	1745	ROM_REGION( 0x200000, "user1", 0 ) /* v30 main cpu */
r4679	r4680
2193	2224	GAME( 1993, zeroteam, 0,       raiden2,  raiden2,  raiden2,  ROT0,   "Seibu Kaihatsu", "Zero Team (set 1)", GAME_NOT_WORKING|GAME_NO_SOUND)
2194	2225	GAME( 1993, zeroteaa, zeroteam,raiden2,  raiden2,  raiden2,  ROT0,   "Seibu Kaihatsu", "Zero Team (set 2)", GAME_NOT_WORKING|GAME_NO_SOUND)
2195	2226	GAME( 1993, zeroteab, zeroteam,raiden2,  raiden2,  raiden2,  ROT0,   "Seibu Kaihatsu", "Zero Team (set 3)", GAME_NOT_WORKING|GAME_NO_SOUND)
	2227	GAME( 1993, zeroteac, zeroteam,raiden2,  raiden2,  raiden2,  ROT0,   "Seibu Kaihatsu", "Zero Team (set 4)", GAME_NOT_WORKING|GAME_NO_SOUND)
2196	2228	GAME( 1993, zerotsel, zeroteam,raiden2,  raiden2,  raiden2,  ROT0,   "Seibu Kaihatsu", "Zero Team Selection", GAME_NOT_WORKING|GAME_NO_SOUND)
2197	2229	GAME( 1995, xsedae,   0,       raiden2,  raiden2,  xsedae,   ROT0,   "Dream Island",   "X Se Dae Quiz", GAME_NOT_WORKING|GAME_NO_SOUND)
2198	2230

src/mame/drivers/zodiack.c

r4679	r4680
527	527	MDRV_CPU_VBLANK_INT_HACK(espial_sound_nmi_gen,8)   /* IRQs are triggered by the main CPU */
528	528
529	529	MDRV_MACHINE_RESET(zodiack)
	530	MDRV_MACHINE_START(espial)
530	531
531	532	/* video hardware */
532	533	MDRV_SCREEN_ADD("screen", RASTER)
r4679	r4680
662	663	ROM_LOAD( "mb7051.2b",   0x0020, 0x0020, CRC(465e31d4) SHA1(d47a4aa0e8931dcd8f85017ef04c2f6ad79f5725) )
663	664	ROM_END
664	665
665
666
667		GAME( 1983, zodiack,  0, zodiack, zodiack,  0, ROT270, "Orca (Esco Trading Co)", "Zodiack", GAME_IMPERFECT_COLORS )   /* bullet color needs to be verified */
668		GAME( 1983, dogfight, 0, zodiack, dogfight, 0, ROT270, "[Orca] Thunderbolt", "Dog Fight (Thunderbolt)", GAME_IMPERFECT_COLORS )   /* bullet color needs to be verified */
669		GAME( 1982, moguchan, 0, percuss, moguchan, 0, ROT270, "Orca (Eastern Commerce Inc. license) (bootleg?)",  /* this is in the ROM at $0b5c */ "Moguchan", GAME_WRONG_COLORS )
670		GAME( 1981, percuss,  0, percuss, percuss,  0, ROT270, "Orca", "The Percussor", 0 )
671		GAME( 1982, bounty,   0, percuss, bounty,   0, ROT180, "Orca", "The Bounty", 0 )
	666	GAME( 1983, zodiack,  0, zodiack, zodiack,  0, ROT270, "Orca (Esco Trading Co)", "Zodiack", GAME_IMPERFECT_COLORS | GAME_SUPPORTS_SAVE )   /* bullet color needs to be verified */
	667	GAME( 1983, dogfight, 0, zodiack, dogfight, 0, ROT270, "[Orca] Thunderbolt", "Dog Fight (Thunderbolt)", GAME_IMPERFECT_COLORS | GAME_SUPPORTS_SAVE )   /* bullet color needs to be verified */
	668	GAME( 1982, moguchan, 0, percuss, moguchan, 0, ROT270, "Orca (Eastern Commerce Inc. license) (bootleg?)",  /* this is in the ROM at $0b5c */ "Moguchan", GAME_WRONG_COLORS | GAME_SUPPORTS_SAVE )
	669	GAME( 1981, percuss,  0, percuss, percuss,  0, ROT270, "Orca", "The Percussor", GAME_SUPPORTS_SAVE )
	670	GAME( 1982, bounty,   0, percuss, bounty,   0, ROT180, "Orca", "The Bounty", GAME_SUPPORTS_SAVE )

src/mame/drivers/mogura.c

r4679	r4680
95	95	dac_data_w(devtag_get_device(space->machine, "dac2"), (data & 0x0f)<<4 );   /* right */
96	96	}
97	97
98		static ADDRESS_MAP_START( io_map, ADDRESS_SPACE_IO, 8 )
99		ADDRESS_MAP_GLOBAL_MASK(0xff)
100		AM_RANGE(0x00, 0x00) AM_WRITENOP   // ??
101		AM_RANGE(0x08, 0x08) AM_READ_PORT("SYSTEM")
102		AM_RANGE(0x0c, 0x0c) AM_READ_PORT("P1")
103		AM_RANGE(0x0d, 0x0d) AM_READ_PORT("P2")
104		AM_RANGE(0x0e, 0x0e) AM_READ_PORT("P3")
105		AM_RANGE(0x0f, 0x0f) AM_READ_PORT("P4")
106		AM_RANGE(0x10, 0x10) AM_READ_PORT("SERVICE")
107		AM_RANGE(0x14, 0x14) AM_WRITE(mogura_dac_w)   /* 4 bit DAC x 2. MSB = left, LSB = right */
108		ADDRESS_MAP_END
109	98
110	99
	100
111	101	static WRITE8_HANDLER ( mogura_gfxram_w )
112	102	{
113	103	mogura_gfxram[offset] = data ;
r4679	r4680
116	106	}
117	107
118	108
119		static ADDRESS_MAP_START( readmem, ADDRESS_SPACE_PROGRAM, 8 )
120		AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM)
121		AM_RANGE(0xc000, 0xdfff) AM_READ(SMH_RAM) // main ram
122		AM_RANGE(0xe000, 0xefff) AM_READ(SMH_RAM) // ram based characters
123		AM_RANGE(0xf000, 0xffff) AM_READ(SMH_RAM) // tilemap
	109	static ADDRESS_MAP_START( mogura_map, ADDRESS_SPACE_PROGRAM, 8 )
	110	AM_RANGE(0x0000, 0x7fff) AM_ROM
	111	AM_RANGE(0xc000, 0xdfff) AM_RAM // main ram
	112	AM_RANGE(0xe000, 0xefff) AM_RAM_WRITE(mogura_gfxram_w) AM_BASE(&mogura_gfxram) // ram based characters
	113	AM_RANGE(0xf000, 0xffff) AM_RAM_WRITE(mogura_tileram_w) AM_BASE(&mogura_tileram) // tilemap
124	114	ADDRESS_MAP_END
125	115
126		static ADDRESS_MAP_START( writemem, ADDRESS_SPACE_PROGRAM, 8 )
127		AM_RANGE(0x0000, 0x7fff) AM_WRITE(SMH_ROM)
128		AM_RANGE(0xc000, 0xdfff) AM_WRITE(SMH_RAM)
129		AM_RANGE(0xe000, 0xefff) AM_WRITE(mogura_gfxram_w) AM_BASE(&mogura_gfxram)
130		AM_RANGE(0xf000, 0xffff) AM_WRITE(mogura_tileram_w) AM_BASE(&mogura_tileram)
	116	static ADDRESS_MAP_START( mogura_io_map, ADDRESS_SPACE_IO, 8 )
	117	ADDRESS_MAP_GLOBAL_MASK(0xff)
	118	AM_RANGE(0x00, 0x00) AM_WRITENOP   // ??
	119	AM_RANGE(0x08, 0x08) AM_READ_PORT("SYSTEM")
	120	AM_RANGE(0x0c, 0x0c) AM_READ_PORT("P1")
	121	AM_RANGE(0x0d, 0x0d) AM_READ_PORT("P2")
	122	AM_RANGE(0x0e, 0x0e) AM_READ_PORT("P3")
	123	AM_RANGE(0x0f, 0x0f) AM_READ_PORT("P4")
	124	AM_RANGE(0x10, 0x10) AM_READ_PORT("SERVICE")
	125	AM_RANGE(0x14, 0x14) AM_WRITE(mogura_dac_w)   /* 4 bit DAC x 2. MSB = left, LSB = right */
131	126	ADDRESS_MAP_END
132	127
133
134	128	static INPUT_PORTS_START( mogura )
135	129	PORT_START("SYSTEM")
136	130	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 )
r4679	r4680
179	173	static MACHINE_DRIVER_START( mogura )
180	174	/* basic machine hardware */
181	175	MDRV_CPU_ADD("maincpu", Z80,3000000)       /* 3 MHz */
182		MDRV_CPU_PROGRAM_MAP(readmem,writemem)
183		MDRV_CPU_IO_MAP(io_map,0)
	176	MDRV_CPU_PROGRAM_MAP(mogura_map,0)
	177	MDRV_CPU_IO_MAP(mogura_io_map,0)
184	178	MDRV_CPU_VBLANK_INT("screen", irq0_line_hold)
185	179
186	180	MDRV_GFXDECODE(mogura)
r4679	r4680
217	211	ROM_LOAD( "gx141.7j", 0x00, 0x20,  CRC(b21c5d5f) SHA1(6913c840dd69a7d4687f4c4cbe3ff12300f62bc2) )
218	212	ROM_END
219	213
220		GAME( 1991, mogura, 0, mogura, mogura, 0, ROT0, "Konami", "Mogura Desse", 0 )
	214	GAME( 1991, mogura, 0, mogura, mogura, 0, ROT0, "Konami", "Mogura Desse (Japan)", 0 )

src/mame/drivers/system18.c

r4679	r4680
96	96
97	97	/***************************************************************************/
98	98
99		static void set_fg_page( int data ){
	99	static void set_fg_page( int data )
	100	{
100	101	sys16_fg_page[0] = data>>12;
101	102	sys16_fg_page[1] = (data>>8)&0xf;
102	103	sys16_fg_page[2] = (data>>4)&0xf;
103	104	sys16_fg_page[3] = data&0xf;
104	105	}
105	106
106		static void set_bg_page( int data ){
	107	static void set_bg_page( int data )
	108	{
107	109	sys16_bg_page[0] = data>>12;
108	110	sys16_bg_page[1] = (data>>8)&0xf;
109	111	sys16_bg_page[2] = (data>>4)&0xf;
110	112	sys16_bg_page[3] = data&0xf;
111	113	}
112	114
113		static void set_fg2_page( int data ){
	115	static void set_fg2_page( int data )
	116	{
114	117	sys16_fg2_page[0] = data>>12;
115	118	sys16_fg2_page[1] = (data>>8)&0xf;
116	119	sys16_fg2_page[2] = (data>>4)&0xf;
117	120	sys16_fg2_page[3] = data&0xf;
118	121	}
119	122
120		static void set_bg2_page( int data ){
	123	static void set_bg2_page( int data )
	124	{
121	125	sys16_bg2_page[0] = data>>12;
122	126	sys16_bg2_page[1] = (data>>8)&0xf;
123	127	sys16_bg2_page[2] = (data>>4)&0xf;
r4679	r4680
174	178	sample_buffer >>= 4;
175	179	sample_select ^= 1;
176	180	if(sample_select == 0)
177		cpu_set_input_line(device->machine->cpu[1], INPUT_LINE_NMI, PULSE_LINE);
	181	cputag_set_input_line(device->machine, "soundcpu", INPUT_LINE_NMI, PULSE_LINE);
178	182	}
179	183
180	184	static const msm5205_interface shdancbl_msm5205_interface =
r4679	r4680
185	189
186	190	static UINT8* shdancbl_soundbank_ptr = NULL;      /* Pointer to currently selected portion of ROM */
187	191
188		static WRITE16_HANDLER( sound_command_irq_w ){
189		if( ACCESSING_BITS_0_7 ){
190		soundlatch_w( space,0,data&0xff );
191		cpu_set_input_line(space->machine->cpu[1], 0, HOLD_LINE );
	192	static WRITE16_HANDLER( sound_command_irq_w )
	193	{
	194	if( ACCESSING_BITS_0_7 )
	195	{
	196	soundlatch_w( space, 0, data&0xff );
	197	cputag_set_input_line(space->machine, "soundcpu", 0, HOLD_LINE );
192	198	}
193	199	}
194	200
r4679	r4680
282	288	AM_RANGE(0xc0, 0xc0) AM_READ(soundlatch_r)
283	289	ADDRESS_MAP_END
284	290
285		static WRITE16_HANDLER( sound_command_nmi_w ){
286		if( ACCESSING_BITS_0_7 ){
287		soundlatch_w( space,0,data&0xff );
288		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_NMI, PULSE_LINE);
	291	static WRITE16_HANDLER( sound_command_nmi_w )
	292	{
	293	if( ACCESSING_BITS_0_7 )
	294	{
	295	soundlatch_w( space, 0, data & 0xff );
	296	cputag_set_input_line(space->machine, "soundcpu", INPUT_LINE_NMI, PULSE_LINE);
289	297	}
290	298	}
291	299
r4679	r4680
689	697	sys16_update_proc = shdancbl_update_proc;
690	698	}
691	699
692		static READ16_HANDLER( shdancbl_skip_r ){
	700	static READ16_HANDLER( shdancbl_skip_r )
	701	{
693	702	if (cpu_get_pc(space->cpu)==0x2f76) {cpu_spinuntil_int(space->cpu); return 0xffff;}
694	703	return sys16_workingram[0];
695	704	}
r4679	r4680
705	714	mem[i] ^= 0xFF;
706	715
707	716	MACHINE_RESET_CALL(sys16_onetime);
708		memory_install_read16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xffc000, 0xffc001, 0, 0, shdancbl_skip_r );
	717	memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xffc000, 0xffc001, 0, 0, shdancbl_skip_r );
709	718
710	719	sys18_splittab_fg_x=&sys16_textram[0x0f80/2];
711	720	sys18_splittab_bg_x=&sys16_textram[0x0fc0/2];
r4679	r4680
746	755
747	756	/***************************************************************************/
748	757
749		static void mwalkbl_update_proc( void ){
	758	static void mwalkbl_update_proc( void )
	759	{
750	760	sys16_fg_scrollx = sys16_textram[0x0e98/2];
751	761	sys16_bg_scrollx = sys16_textram[0x0e9a/2];
752	762	sys16_fg_scrolly = sys16_textram[0x0e90/2];
r4679	r4680
773	783	sys18_bg2_active=0;
774	784	}
775	785
776		static MACHINE_RESET( mwalkbl ){
	786	static MACHINE_RESET( mwalkbl )
	787	{
777	788	static const sys16_patch patch[] =
778	789	{
779	790	{ 0x70116, 0x4e },
r4679	r4680
822	833	sys16_update_proc = mwalkbl_update_proc;
823	834	}
824	835
825		static DRIVER_INIT( mwalkbl ){
	836	static DRIVER_INIT( mwalkbl )
	837	{
826	838	UINT8 *RAM= memory_region(machine, "soundcpu");
827	839	static const int mwalk_sound_info[] =
828	840	{
r4679	r4680
867	879
868	880	/***************************************************************************/
869	881
870		static void astormbl_update_proc( void ){
	882	static void astormbl_update_proc( void )
	883	{
871	884	UINT16 data;
872	885	sys16_fg_scrollx = sys16_textram[0x0e98/2];
873	886	sys16_bg_scrollx = sys16_textram[0x0e9a/2];
r4679	r4680
914	927	sys18_bg2_active=0;
915	928	}
916	929
917		static MACHINE_RESET( astormbl ){
	930	static MACHINE_RESET( astormbl )
	931	{
918	932	static const sys16_patch patch[] =
919	933	{
920	934	{ 0x02D6E, 0x32 },
r4679	r4680
984	998	}
985	999
986	1000
987		static DRIVER_INIT( astormbl ){
	1001	static DRIVER_INIT( astormbl )
	1002	{
988	1003	UINT8 *RAM= memory_region(machine, "soundcpu");
989	1004	static const int astormbl_sound_info[] =
990	1005	{
r4679	r4680
1464	1479	GAME( 1990, mwalkbl,  mwalk,    mwalkbl,  mwalkbl,  mwalkbl,  ROT0, "bootleg", "Michael Jackson's Moonwalker (bootleg)", GAME_IMPERFECT_GRAPHICS | GAME_IMPERFECT_SOUND )
1465	1480
1466	1481	GAME( 1989, shdancbl, shdancer, shdancbl, mwalkbl,  shdancbl, ROT0, "bootleg", "Shadow Dancer (bootleg)", GAME_IMPERFECT_GRAPHICS | GAME_IMPERFECT_SOUND )
1467

src/mame/drivers/taitojc.c

r4679	r4680
775	775	{
776	776	if (!first_dsp_reset)
777	777	{
778		cpu_set_input_line(space->machine->cpu[3], INPUT_LINE_RESET, CLEAR_LINE);
	778	cputag_set_input_line(space->machine, "dsp", INPUT_LINE_RESET, CLEAR_LINE);
779	779	}
780	780	first_dsp_reset = 0;
781	781	}
782	782	else
783	783	{
784		cpu_set_input_line(space->machine->cpu[3], INPUT_LINE_RESET, ASSERT_LINE);
	784	cputag_set_input_line(space->machine, "dsp", INPUT_LINE_RESET, ASSERT_LINE);
785	785	}
786	786	}
787	787	}
r4679	r4680
1280	1280	f3_68681_reset(machine);
1281	1281
1282	1282	// hold the TMS in reset until we have code
1283		cpu_set_input_line(machine->cpu[3], INPUT_LINE_RESET, ASSERT_LINE);
	1283	cputag_set_input_line(machine, "dsp", INPUT_LINE_RESET, ASSERT_LINE);
1284	1284	}
1285	1285
1286	1286	static INTERRUPT_GEN( taitojc_vblank )
r4679	r4680
1333	1333
1334	1334	static DRIVER_INIT( taitojc )
1335	1335	{
1336		f3_shared_ram = auto_malloc(0x800);
	1336	f3_shared_ram = auto_alloc_array(machine, UINT32, 0x800/4);
1337	1337
1338		polygon_fifo = auto_malloc(POLYGON_FIFO_SIZE * sizeof(UINT16));
	1338	polygon_fifo = auto_alloc_array(machine, UINT16, POLYGON_FIFO_SIZE);
1339	1339	}
1340	1340
1341	1341	ROM_START( sidebs )

src/mame/drivers/missb2.c

r4679	r4680
336	336	static void irqhandler(const device_config *device, int irq)
337	337	{
338	338	logerror("YM3526 firing an IRQ\n");
339		//  cpu_set_input_line(device->machine->cpu[2],0,irq ? ASSERT_LINE : CLEAR_LINE);
	339	//  cputag_set_input_line(device->machine, "audiocpu", 0, irq ? ASSERT_LINE : CLEAR_LINE);
340	340	}
341	341
342	342	static const ym3526_interface ym3526_config =

src/mame/drivers/pitnrun.c

r4679	r4680
91	91	flip_screen_y_set(space->machine, data);
92	92	}
93	93
94		static ADDRESS_MAP_START( readmem, ADDRESS_SPACE_PROGRAM, 8 )
95		AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM)
96		AM_RANGE(0x8000, 0x87ff) AM_READ(SMH_RAM)
97		AM_RANGE(0x8800, 0x8fff) AM_READ(pitnrun_videoram_r)
98		AM_RANGE(0x9000, 0x9fff) AM_READ(pitnrun_videoram2_r)
99		AM_RANGE(0xa000, 0xa0ff) AM_READ(SMH_RAM)
	94	static ADDRESS_MAP_START( pitnrun_map, ADDRESS_SPACE_PROGRAM, 8 )
	95	AM_RANGE(0x0000, 0x7fff) AM_ROM
	96	AM_RANGE(0x8000, 0x87ff) AM_RAM
	97	AM_RANGE(0x8800, 0x8fff) AM_RAM_WRITE(pitnrun_videoram_w) AM_BASE(&videoram) AM_SIZE(&videoram_size)
	98	AM_RANGE(0x9000, 0x9fff) AM_RAM_WRITE(pitnrun_videoram2_w) AM_BASE(&pitnrun_videoram2)
	99	AM_RANGE(0xa000, 0xa0ff) AM_RAM AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
100	100	AM_RANGE(0xa800, 0xa800) AM_READ_PORT("SYSTEM")
101		AM_RANGE(0xb000, 0xb000) AM_READ_PORT("DSW")
102		AM_RANGE(0xb800, 0xb800) AM_READ_PORT("INPUTS")
103		AM_RANGE(0xd800, 0xd800) AM_READ(pitnrun_mcu_status_r)
104		AM_RANGE(0xd000, 0xd000) AM_READ(pitnrun_mcu_data_r)
105		AM_RANGE(0xf000, 0xf000) AM_READ(watchdog_reset_r)
106		ADDRESS_MAP_END
107
108		static ADDRESS_MAP_START( writemem, ADDRESS_SPACE_PROGRAM, 8 )
109		AM_RANGE(0x0000, 0x7fff) AM_WRITE(SMH_ROM)
110		AM_RANGE(0x8000, 0x87ff) AM_WRITE(SMH_RAM)
111		AM_RANGE(0x8800, 0x8fff) AM_WRITE(pitnrun_videoram_w) AM_BASE(&videoram) AM_SIZE(&videoram_size)
112		AM_RANGE(0x9000, 0x9fff) AM_WRITE(pitnrun_videoram2_w) AM_BASE(&pitnrun_videoram2)
113		AM_RANGE(0xa000, 0xa0ff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
114	101	AM_RANGE(0xa800, 0xa807) AM_WRITENOP /* Analog Sound */
115		AM_RANGE(0xb000, 0xb000) AM_WRITE(nmi_enable_w)
	102	AM_RANGE(0xb000, 0xb000) AM_READ_PORT("DSW") AM_WRITE(nmi_enable_w)
116	103	AM_RANGE(0xb001, 0xb001) AM_WRITE(pitnrun_color_select_w)
117	104	AM_RANGE(0xb004, 0xb004) AM_WRITENOP/* COLOR SEL 2 - not used ?*/
118	105	AM_RANGE(0xb005, 0xb005) AM_WRITE(pitnrun_char_bank_select)
119	106	AM_RANGE(0xb006, 0xb006) AM_WRITE(pitnrun_hflip_w)
120	107	AM_RANGE(0xb007, 0xb007) AM_WRITE(pitnrun_vflip_w)
121		AM_RANGE(0xb800, 0xb800) AM_WRITE(soundlatch_w)
	108	AM_RANGE(0xb800, 0xb800) AM_READ_PORT("INPUTS") AM_WRITE(soundlatch_w)
122	109	AM_RANGE(0xc800, 0xc801) AM_WRITE(pitnrun_scroll_w)
123	110	AM_RANGE(0xc802, 0xc802) AM_WRITENOP/* VP(VF?)MCV - not used ?*/
124	111	AM_RANGE(0xc804, 0xc804) AM_WRITE(pitnrun_mcu_data_w)
125	112	AM_RANGE(0xc805, 0xc805) AM_WRITE(pitnrun_h_heed_w)
126	113	AM_RANGE(0xc806, 0xc806) AM_WRITE(pitnrun_v_heed_w)
127	114	AM_RANGE(0xc807, 0xc807) AM_WRITE(pitnrun_ha_w)
	115	AM_RANGE(0xd800, 0xd800) AM_READ(pitnrun_mcu_status_r)
	116	AM_RANGE(0xd000, 0xd000) AM_READ(pitnrun_mcu_data_r)
	117	AM_RANGE(0xf000, 0xf000) AM_READ(watchdog_reset_r)
128	118	ADDRESS_MAP_END
129	119
	120	static ADDRESS_MAP_START( pitnrun_sound_map, ADDRESS_SPACE_PROGRAM, 8 )
	121	AM_RANGE(0x0000, 0x2fff) AM_ROM
	122	AM_RANGE(0x3800, 0x3bff) AM_RAM
	123	ADDRESS_MAP_END
130	124
131		static ADDRESS_MAP_START( sound_io_map, ADDRESS_SPACE_IO, 8 )
	125	static ADDRESS_MAP_START( pitnrun_sound_io_map, ADDRESS_SPACE_IO, 8 )
132	126	ADDRESS_MAP_GLOBAL_MASK(0xff)
133	127	AM_RANGE(0x00, 0x00) AM_WRITE(soundlatch_clear_w)
134	128	AM_RANGE(0x8c, 0x8d) AM_DEVWRITE("ay2", ay8910_address_data_w)
r4679	r4680
139	133	AM_RANGE(0x98, 0x98) AM_WRITENOP
140	134	ADDRESS_MAP_END
141	135
142		static ADDRESS_MAP_START( sound_readmem, ADDRESS_SPACE_PROGRAM, 8 )
143		AM_RANGE(0x0000, 0x2fff) AM_READ(SMH_ROM)
144		AM_RANGE(0x3800, 0x3bff) AM_READ(SMH_RAM)
145		ADDRESS_MAP_END
146
147		static ADDRESS_MAP_START( sound_writemem, ADDRESS_SPACE_PROGRAM, 8 )
148		AM_RANGE(0x0000, 0x2fff) AM_WRITE(SMH_ROM)
149		AM_RANGE(0x3800, 0x3bff) AM_WRITE(SMH_RAM)
150		ADDRESS_MAP_END
151
152
153		static ADDRESS_MAP_START( mcu_readmem, ADDRESS_SPACE_PROGRAM, 8 )
	136	static ADDRESS_MAP_START( pitnrun_mcu_map, ADDRESS_SPACE_PROGRAM, 8 )
154	137	ADDRESS_MAP_GLOBAL_MASK(0x7ff)
155		AM_RANGE(0x0000, 0x0000) AM_READ(pitnrun_68705_portA_r)
156		AM_RANGE(0x0001, 0x0001) AM_READ(pitnrun_68705_portB_r)
	138	AM_RANGE(0x0000, 0x0000) AM_READWRITE(pitnrun_68705_portA_r,pitnrun_68705_portA_w)
	139	AM_RANGE(0x0001, 0x0001) AM_READWRITE(pitnrun_68705_portB_r,pitnrun_68705_portB_w)
157	140	AM_RANGE(0x0002, 0x0002) AM_READ(pitnrun_68705_portC_r)
158		AM_RANGE(0x0003, 0x007f) AM_READ(SMH_RAM)
159		AM_RANGE(0x0080, 0x07ff) AM_READ(SMH_ROM)
	141	AM_RANGE(0x0003, 0x007f) AM_RAM
	142	AM_RANGE(0x0080, 0x07ff) AM_ROM
160	143	ADDRESS_MAP_END
161	144
162		static ADDRESS_MAP_START( mcu_writemem, ADDRESS_SPACE_PROGRAM, 8 )
163		ADDRESS_MAP_GLOBAL_MASK(0x7ff)
164		AM_RANGE(0x0000, 0x0000) AM_WRITE(pitnrun_68705_portA_w)
165		AM_RANGE(0x0001, 0x0001) AM_WRITE(pitnrun_68705_portB_w)
166		AM_RANGE(0x0003, 0x007f) AM_WRITE(SMH_RAM)
167		AM_RANGE(0x0080, 0x07ff) AM_WRITE(SMH_ROM)
168		ADDRESS_MAP_END
169	145
170	146	static INPUT_PORTS_START( pitnrun )
171	147	PORT_START("SYSTEM")
r4679	r4680
254	230
255	231	static MACHINE_DRIVER_START( pitnrun )
256	232	MDRV_CPU_ADD("maincpu", Z80,XTAL_18_432MHz/6)       /* verified on pcb */
257		MDRV_CPU_PROGRAM_MAP(readmem,writemem)
	233	MDRV_CPU_PROGRAM_MAP(pitnrun_map,0)
258	234	MDRV_CPU_VBLANK_INT("screen", pitnrun_nmi_source)
259	235
260	236	MDRV_CPU_ADD("audiocpu", Z80, XTAL_5MHz/2)       /* verified on pcb */
261		MDRV_CPU_PROGRAM_MAP(sound_readmem,sound_writemem)
262		MDRV_CPU_IO_MAP(sound_io_map,0)
	237	MDRV_CPU_PROGRAM_MAP(pitnrun_sound_map,0)
	238	MDRV_CPU_IO_MAP(pitnrun_sound_io_map,0)
263	239	MDRV_CPU_VBLANK_INT("screen", irq0_line_hold)
264	240
265	241	MDRV_CPU_ADD("mcu", M68705,XTAL_18_432MHz/6)       /* verified on pcb */
266		MDRV_CPU_PROGRAM_MAP(mcu_readmem,mcu_writemem)
	242	MDRV_CPU_PROGRAM_MAP(pitnrun_mcu_map,0)
267	243
268	244	MDRV_MACHINE_RESET(pitnrun)
269	245

src/mame/drivers/ddealer.c

r4679	r4680
627	627
628	628	static DRIVER_INIT( ddealer )
629	629	{
630		memory_install_read16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xfe01c, 0xfe01d, 0, 0, ddealer_mcu_r );
	630	memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xfe01c, 0xfe01d, 0, 0, ddealer_mcu_r );
631	631	}
632	632
633	633	ROM_START( ddealer )

src/mame/drivers/berzerk.c

r4679	r4680
160	160
161	161	/* set the IRQ line if enabled */
162	162	if (irq_enabled)
163		cpu_set_input_line_and_vector(machine->cpu[0], 0, HOLD_LINE, 0xfc);
	163	cputag_set_input_line_and_vector(machine, "maincpu", 0, HOLD_LINE, 0xfc);
164	164
165	165	/* set up for next interrupt */
166	166	next_irq_number = (irq_number + 1) % IRQS_PER_FRAME;
r4679	r4680
237	237
238	238	/* pulse the NMI line if enabled */
239	239	if (nmi_enabled)
240		cpu_set_input_line(machine->cpu[0], INPUT_LINE_NMI, PULSE_LINE);
	240	cputag_set_input_line(machine, "maincpu", INPUT_LINE_NMI, PULSE_LINE);
241	241
242	242	/* set up for next interrupt */
243	243	next_nmi_number = (nmi_number + 1) % NMIS_PER_FRAME;
r4679	r4680
533	533
534	534	static SOUND_RESET(berzerk)
535	535	{
536		const address_space *space = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_IO);
	536	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_IO);
537	537	/* clears the flip-flop controlling the volume and freq on the speech chip */
538	538	berzerk_audio_w(space, 4, 0x40);
539	539	}

src/mame/drivers/tehkanwc.c

r4679	r4680
113	113	static WRITE8_HANDLER( sub_cpu_halt_w )
114	114	{
115	115	if (data)
116		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_RESET, CLEAR_LINE);
	116	cputag_set_input_line(space->machine, "sub", INPUT_LINE_RESET, CLEAR_LINE);
117	117	else
118		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_RESET, ASSERT_LINE);
	118	cputag_set_input_line(space->machine, "sub", INPUT_LINE_RESET, ASSERT_LINE);
119	119	}
120	120
121	121
r4679	r4680
158	158
159	159	static WRITE8_HANDLER( sound_command_w )
160	160	{
161		soundlatch_w(space,offset,data);
162		cpu_set_input_line(space->machine->cpu[2],INPUT_LINE_NMI,PULSE_LINE);
	161	soundlatch_w(space, offset, data);
	162	cputag_set_input_line(space->machine, "audiocpu", INPUT_LINE_NMI, PULSE_LINE);
163	163	}
164	164
165	165	static TIMER_CALLBACK( reset_callback )
166	166	{
167		cpu_set_input_line(machine->cpu[2], INPUT_LINE_RESET, PULSE_LINE);
	167	cputag_set_input_line(machine, "audiocpu", INPUT_LINE_RESET, PULSE_LINE);
168	168	}
169	169
170	170	static WRITE8_HANDLER( sound_answer_w )
171	171	{
172		soundlatch2_w(space,0,data);
	172	soundlatch2_w(space, 0, data);
173	173
174	174	/* in Gridiron, the sound CPU goes in a tight loop after the self test, */
175	175	/* probably waiting to be reset by a watchdog */
176		if (cpu_get_pc(space->cpu) == 0x08bc) timer_set(space->machine, ATTOTIME_IN_SEC(1), NULL,0,reset_callback);
	176	if (cpu_get_pc(space->cpu) == 0x08bc) timer_set(space->machine, ATTOTIME_IN_SEC(1), NULL, 0, reset_callback);
177	177	}
178	178
179	179

src/mame/drivers/citycon.c

r4679	r4680
30	30
31	31
32	32
33		static ADDRESS_MAP_START( readmem, ADDRESS_SPACE_PROGRAM, 8 )
34		AM_RANGE(0x0000, 0x1fff) AM_READ(SMH_RAM)
35		AM_RANGE(0x3000, 0x3000) AM_READ(citycon_in_r)   /* player 1 & 2 inputs multiplexed */
36		AM_RANGE(0x3001, 0x3001) AM_READ_PORT("DSW1")
37		AM_RANGE(0x3002, 0x3002) AM_READ_PORT("DSW2")
38		AM_RANGE(0x3007, 0x3007) AM_READ(watchdog_reset_r)   /* ? */
39		AM_RANGE(0x4000, 0xffff) AM_READ(SMH_ROM)
40		ADDRESS_MAP_END
41
42		static ADDRESS_MAP_START( writemem, ADDRESS_SPACE_PROGRAM, 8 )
43		AM_RANGE(0x0000, 0x0fff) AM_WRITE(SMH_RAM)
44		AM_RANGE(0x1000, 0x1fff) AM_WRITE(citycon_videoram_w) AM_BASE(&citycon_videoram)
	33	static ADDRESS_MAP_START( citycon_map, ADDRESS_SPACE_PROGRAM, 8 )
	34	AM_RANGE(0x0000, 0x0fff) AM_RAM
	35	AM_RANGE(0x1000, 0x1fff) AM_RAM_WRITE(citycon_videoram_w) AM_BASE(&citycon_videoram)
45	36	AM_RANGE(0x2000, 0x20ff) AM_WRITE(citycon_linecolor_w) AM_BASE(&citycon_linecolor)
46	37	AM_RANGE(0x2800, 0x28ff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
47		AM_RANGE(0x3000, 0x3000) AM_WRITE(citycon_background_w)
48		AM_RANGE(0x3001, 0x3001) AM_WRITE(soundlatch_w)
49		AM_RANGE(0x3002, 0x3002) AM_WRITE(soundlatch2_w)
	38	AM_RANGE(0x3000, 0x3000) AM_READWRITE(citycon_in_r, citycon_background_w)   /* player 1 & 2 inputs multiplexed */
	39	AM_RANGE(0x3001, 0x3001) AM_READ_PORT("DSW1") AM_WRITE(soundlatch_w)
	40	AM_RANGE(0x3002, 0x3002) AM_READ_PORT("DSW2") AM_WRITE(soundlatch2_w)
50	41	AM_RANGE(0x3004, 0x3005) AM_WRITE(SMH_RAM) AM_BASE(&citycon_scroll)
	42	AM_RANGE(0x3007, 0x3007) AM_READ(watchdog_reset_r)   /* ? */
51	43	AM_RANGE(0x3800, 0x3cff) AM_WRITE(paletteram_RRRRGGGGBBBBxxxx_be_w) AM_BASE(&paletteram)
52		AM_RANGE(0x4000, 0xffff) AM_WRITE(SMH_ROM)
	44	AM_RANGE(0x4000, 0xffff) AM_ROM
53	45	ADDRESS_MAP_END
54	46
55		static ADDRESS_MAP_START( readmem_sound, ADDRESS_SPACE_PROGRAM, 8 )
56		AM_RANGE(0x0000, 0x0fff) AM_READ(SMH_RAM)
	47	static ADDRESS_MAP_START( sound_map, ADDRESS_SPACE_PROGRAM, 8 )
	48	AM_RANGE(0x0000, 0x0fff) AM_RAM
	49	AM_RANGE(0x4000, 0x4001) AM_DEVWRITE("ay", ay8910_address_data_w)
57	50	//  AM_RANGE(0x4002, 0x4002) AM_DEVREAD("ay", ay8910_r)  /* ?? */
58		AM_RANGE(0x6000, 0x6001) AM_DEVREAD("ym", ym2203_r)
59		AM_RANGE(0x8000, 0xffff) AM_READ(SMH_ROM)
	51	AM_RANGE(0x6000, 0x6001) AM_DEVREADWRITE("ym", ym2203_r, ym2203_w)
	52	AM_RANGE(0x8000, 0xffff) AM_ROM
60	53	ADDRESS_MAP_END
61	54
62		static ADDRESS_MAP_START( writemem_sound, ADDRESS_SPACE_PROGRAM, 8 )
63		AM_RANGE(0x0000, 0x0fff) AM_WRITE(SMH_RAM)
64		AM_RANGE(0x4000, 0x4001) AM_DEVWRITE("ay", ay8910_address_data_w)
65		AM_RANGE(0x6000, 0x6001) AM_DEVWRITE("ym", ym2203_w)
66		AM_RANGE(0x8000, 0xffff) AM_WRITE(SMH_ROM)
67		ADDRESS_MAP_END
68	55
69	56
70
71	57	static INPUT_PORTS_START( citycon )
72	58	PORT_START("P1")
73	59	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_8WAY
r4679	r4680
207	193
208	194	/* basic machine hardware */
209	195	MDRV_CPU_ADD("maincpu", M6809, 2048000)        /* 2.048 MHz ??? */
210		MDRV_CPU_PROGRAM_MAP(readmem,writemem)
	196	MDRV_CPU_PROGRAM_MAP(citycon_map,0)
211	197	MDRV_CPU_VBLANK_INT("screen", irq0_line_hold)
212	198
213	199	MDRV_CPU_ADD("audiocpu", M6809, 640000)       /* 0.640 MHz ??? */
214		MDRV_CPU_PROGRAM_MAP(readmem_sound,writemem_sound)
	200	MDRV_CPU_PROGRAM_MAP(sound_map,0)
215	201	MDRV_CPU_VBLANK_INT("screen", irq0_line_hold)
216	202
217	203	/* video hardware */

src/mame/drivers/suprridr.c

r4679	r4680
118	118	static TIMER_CALLBACK( delayed_sound_w )
119	119	{
120	120	sound_data = param;
121		cpu_set_input_line(machine->cpu[1], 0, ASSERT_LINE);
	121	cputag_set_input_line(machine, "audiocpu", 0, ASSERT_LINE);
122	122	}
123	123
124	124
r4679	r4680
136	136
137	137	static WRITE8_HANDLER( sound_irq_ack_w )
138	138	{
139		cpu_set_input_line(space->machine->cpu[1], 0, CLEAR_LINE);
	139	cputag_set_input_line(space->machine, "audiocpu", 0, CLEAR_LINE);
140	140	}
141	141
142	142

src/mame/drivers/spy.c

r4679	r4680
325	325	}
326	326	spy_collision();
327	327	//ZT
328		cpu_set_input_line(space->machine->cpu[0],M6809_FIRQ_LINE,HOLD_LINE);
	328	cputag_set_input_line(space->machine, "maincpu", M6809_FIRQ_LINE, HOLD_LINE);
329	329	}
330	330
331	331	old = data;
r4679	r4680
334	334
335	335	static WRITE8_HANDLER( spy_sh_irqtrigger_w )
336	336	{
337		cpu_set_input_line_and_vector(space->machine->cpu[1],0,HOLD_LINE,0xff);
	337	cputag_set_input_line_and_vector(space->machine, "audiocpu", 0, HOLD_LINE, 0xff);
338	338	}
339	339
340	340	static WRITE8_HANDLER( sound_bank_w )
r4679	r4680
351	351
352	352
353	353
354		static ADDRESS_MAP_START( spy_readmem, ADDRESS_SPACE_PROGRAM, 8 )
355		AM_RANGE(0x0000, 0x07ff) AM_READ(spy_bankedram1_r)
356		AM_RANGE(0x0800, 0x1aff) AM_READ(SMH_RAM)
	354	static ADDRESS_MAP_START( spy_map, ADDRESS_SPACE_PROGRAM, 8 )
	355	AM_RANGE(0x0000, 0x07ff) AM_READWRITE(spy_bankedram1_r,spy_bankedram1_w) AM_BASE(&ram)
	356	AM_RANGE(0x0800, 0x1aff) AM_RAM
	357	AM_RANGE(0x3f80, 0x3f80) AM_WRITE(bankswitch_w)
	358	AM_RANGE(0x3f90, 0x3f90) AM_WRITE(spy_3f90_w)
	359	AM_RANGE(0x3fa0, 0x3fa0) AM_WRITE(watchdog_reset_w)
	360	AM_RANGE(0x3fb0, 0x3fb0) AM_WRITE(soundlatch_w)
	361	AM_RANGE(0x3fc0, 0x3fc0) AM_WRITE(spy_sh_irqtrigger_w)
357	362	AM_RANGE(0x3fd0, 0x3fd0) AM_READ_PORT("SYSTEM")
358	363	AM_RANGE(0x3fd1, 0x3fd1) AM_READ_PORT("P1")
359	364	AM_RANGE(0x3fd2, 0x3fd2) AM_READ_PORT("P2")
360	365	AM_RANGE(0x3fd3, 0x3fd3) AM_READ_PORT("DSW1")
361	366	AM_RANGE(0x3fe0, 0x3fe0) AM_READ_PORT("DSW2")
362		AM_RANGE(0x2000, 0x5fff) AM_READ(K052109_051960_r)
363		AM_RANGE(0x6000, 0x7fff) AM_READ(SMH_BANK1)
364		AM_RANGE(0x8000, 0xffff) AM_READ(SMH_ROM)
	367	AM_RANGE(0x2000, 0x5fff) AM_READWRITE(K052109_051960_r,K052109_051960_w)
	368	AM_RANGE(0x6000, 0x7fff) AM_ROMBANK(1)
	369	AM_RANGE(0x8000, 0xffff) AM_ROM
365	370	ADDRESS_MAP_END
366	371
367		static ADDRESS_MAP_START( spy_writemem, ADDRESS_SPACE_PROGRAM, 8 )
368		AM_RANGE(0x0000, 0x07ff) AM_WRITE(spy_bankedram1_w) AM_BASE(&ram)
369		AM_RANGE(0x0800, 0x1aff) AM_WRITE(SMH_RAM)
370		AM_RANGE(0x3f80, 0x3f80) AM_WRITE(bankswitch_w)
371		AM_RANGE(0x3f90, 0x3f90) AM_WRITE(spy_3f90_w)
372		AM_RANGE(0x3fa0, 0x3fa0) AM_WRITE(watchdog_reset_w)
373		AM_RANGE(0x3fb0, 0x3fb0) AM_WRITE(soundlatch_w)
374		AM_RANGE(0x3fc0, 0x3fc0) AM_WRITE(spy_sh_irqtrigger_w)
375		AM_RANGE(0x2000, 0x5fff) AM_WRITE(K052109_051960_w)
376		AM_RANGE(0x6000, 0x7fff) AM_WRITE(SMH_ROM)
377		AM_RANGE(0x8000, 0xffff) AM_WRITE(SMH_ROM)
378		ADDRESS_MAP_END
379
380		static ADDRESS_MAP_START( spy_sound_readmem, ADDRESS_SPACE_PROGRAM, 8 )
381		AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM)
382		AM_RANGE(0x8000, 0x87ff) AM_READ(SMH_RAM)
383		AM_RANGE(0xa000, 0xa00d) AM_DEVREAD("konami1", k007232_r)
384		AM_RANGE(0xb000, 0xb00d) AM_DEVREAD("konami2", k007232_r)
385		AM_RANGE(0xc000, 0xc001) AM_DEVREAD("ym", ym3812_r)
	372	static ADDRESS_MAP_START( spy_sound_map, ADDRESS_SPACE_PROGRAM, 8 )
	373	AM_RANGE(0x0000, 0x7fff) AM_ROM
	374	AM_RANGE(0x8000, 0x87ff) AM_RAM
	375	AM_RANGE(0x9000, 0x9000) AM_WRITE(sound_bank_w)
	376	AM_RANGE(0xa000, 0xa00d) AM_DEVREADWRITE("konami1", k007232_r,k007232_w)
	377	AM_RANGE(0xb000, 0xb00d) AM_DEVREADWRITE("konami2", k007232_r,k007232_w)
	378	AM_RANGE(0xc000, 0xc001) AM_DEVREADWRITE("ym", ym3812_r,ym3812_w)
386	379	AM_RANGE(0xd000, 0xd000) AM_READ(soundlatch_r)
387	380	ADDRESS_MAP_END
388	381
389		static ADDRESS_MAP_START( spy_sound_writemem, ADDRESS_SPACE_PROGRAM, 8 )
390		AM_RANGE(0x0000, 0x7fff) AM_WRITE(SMH_ROM)
391		AM_RANGE(0x8000, 0x87ff) AM_WRITE(SMH_RAM)
392		AM_RANGE(0x9000, 0x9000) AM_WRITE(sound_bank_w)
393		AM_RANGE(0xa000, 0xa00d) AM_DEVWRITE("konami1", k007232_w)
394		AM_RANGE(0xb000, 0xb00d) AM_DEVWRITE("konami2", k007232_w)
395		AM_RANGE(0xc000, 0xc001) AM_DEVWRITE("ym", ym3812_w)
396		ADDRESS_MAP_END
397	382
398
399
400	383	static INPUT_PORTS_START( spy )
401	384	PORT_START("P1")
402	385	KONAMI8_ALT_B21(1)   /* button 3 unused */
r4679	r4680
475	458
476	459	static void irqhandler(const device_config *device, int linestate)
477	460	{
478		cpu_set_input_line(device->machine->cpu[1], INPUT_LINE_NMI, linestate);
	461	cputag_set_input_line(device->machine, "audiocpu", INPUT_LINE_NMI, linestate);
479	462	}
480	463
481	464	static const ym3812_interface ym3812_config =
r4679	r4680
489	472
490	473	/* basic machine hardware */
491	474	MDRV_CPU_ADD("maincpu", M6809, 3000000) /* ? */
492		MDRV_CPU_PROGRAM_MAP(spy_readmem,spy_writemem)
	475	MDRV_CPU_PROGRAM_MAP(spy_map,0)
493	476	MDRV_CPU_VBLANK_INT("screen", spy_interrupt)
494	477
495	478	MDRV_CPU_ADD("audiocpu", Z80, 3579545)
496		MDRV_CPU_PROGRAM_MAP(spy_sound_readmem,spy_sound_writemem)
	479	MDRV_CPU_PROGRAM_MAP(spy_sound_map,0)
497	480	/* nmi by the sound chip */
498	481
499	482	/* video hardware */

src/mame/drivers/psikyo.c

r4679	r4680
172	172	static TIMER_CALLBACK( psikyo_soundlatch_callback )
173	173	{
174	174	psikyo_soundlatch = param;
175		cpu_set_input_line(machine->cpu[1], INPUT_LINE_NMI, ASSERT_LINE);
	175	cputag_set_input_line(machine, "audiocpu", INPUT_LINE_NMI, ASSERT_LINE);
176	176	z80_nmi = 1;
177	177	}
178	178
r4679	r4680
211	211	};
212	212
213	213	static UINT8 s1945_mcu_direction, s1945_mcu_latch1, s1945_mcu_latch2, s1945_mcu_inlatch, s1945_mcu_index;
214		static UINT8 s1945_mcu_latching, s1945_mcu_mode, s1945_mcu_direction, s1945_mcu_control, s1945_mcu_bctrl;
	214	static UINT8 s1945_mcu_latching, s1945_mcu_mode, s1945_mcu_control, s1945_mcu_bctrl;
215	215	static const UINT8 *s1945_mcu_table;
216	216
217	217	static void s1945_mcu_init(const UINT8 *mcu_table)
r4679	r4680
343	343	paletteram16_xRRRRRGGGGGBBBBB_word_w(space, offset*2+1, data, mem_mask);
344	344	}
345	345
346		static ADDRESS_MAP_START( psikyo_readmem, ADDRESS_SPACE_PROGRAM, 32 )
347		AM_RANGE(0x000000, 0x0fffff) AM_READ(SMH_ROM         )   // ROM (not all used)
348		AM_RANGE(0x400000, 0x401fff) AM_READ(SMH_RAM         )   // Sprites Data
349		AM_RANGE(0x600000, 0x601fff) AM_READ(SMH_RAM         )   // Palette
350		AM_RANGE(0x800000, 0x801fff) AM_READ(SMH_RAM         )   // Layer 0
351		AM_RANGE(0x802000, 0x803fff) AM_READ(SMH_RAM         )   // Layer 1
352		AM_RANGE(0x804000, 0x807fff) AM_READ(SMH_RAM         )   // RAM + Vregs
353		//  AM_RANGE(0xc00000, 0xc0000b) AM_READ(psikyo_input_r )   Depends on board, see DRIVER_INIT
354		AM_RANGE(0xfe0000, 0xffffff) AM_READ(SMH_RAM         )   // RAM
	346	static ADDRESS_MAP_START( psikyo_map, ADDRESS_SPACE_PROGRAM, 32 )
	347	AM_RANGE(0x000000, 0x0fffff) AM_ROM                                          // ROM (not all used)
	348	AM_RANGE(0x400000, 0x401fff) AM_RAM AM_BASE(&spriteram32) AM_SIZE(&spriteram_size)      // Sprites, buffered by two frames (list buffered + fb buffered)
	349	AM_RANGE(0x600000, 0x601fff) AM_RAM_WRITE(paletteram32_xRRRRRGGGGGBBBBB_dword_w) AM_BASE(&paletteram32)   // Palette
	350	AM_RANGE(0x800000, 0x801fff) AM_RAM_WRITE(psikyo_vram_0_w) AM_BASE(&psikyo_vram_0)      // Layer 0
	351	AM_RANGE(0x802000, 0x803fff) AM_RAM_WRITE(psikyo_vram_1_w) AM_BASE(&psikyo_vram_1)      // Layer 1
	352	AM_RANGE(0x804000, 0x807fff) AM_RAM AM_BASE(&psikyo_vregs)                        // RAM + Vregs
	353	//  AM_RANGE(0xc00000, 0xc0000b) AM_READ(psikyo_input_r)                                    // Depends on board, see DRIVER_INIT
	354	//  AM_RANGE(0xc00004, 0xc0000b) AM_WRITE(s1945_mcu_w)                                      // MCU on sh404, see DRIVER_INIT
	355	//  AM_RANGE(0xc00010, 0xc00013) AM_WRITE(psikyo_soundlatch_w)                              // Depends on board, see DRIVER_INIT
	356	AM_RANGE(0xfe0000, 0xffffff) AM_RAM                                          // RAM
355	357	ADDRESS_MAP_END
356	358
357		static ADDRESS_MAP_START( psikyo_writemem, ADDRESS_SPACE_PROGRAM, 32 )
358		AM_RANGE(0x000000, 0x0fffff) AM_WRITE(SMH_ROM                     )   // ROM (not all used)
359		AM_RANGE(0x400000, 0x401fff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram32) AM_SIZE(&spriteram_size)   // Sprites, buffered by two frames (list buffered + fb buffered)
360		AM_RANGE(0x600000, 0x601fff) AM_WRITE(paletteram32_xRRRRRGGGGGBBBBB_dword_w) AM_BASE(&paletteram32   )   // Palette
361		AM_RANGE(0x800000, 0x801fff) AM_WRITE(psikyo_vram_0_w) AM_BASE(&psikyo_vram_0   )   // Layer 0
362		AM_RANGE(0x802000, 0x803fff) AM_WRITE(psikyo_vram_1_w) AM_BASE(&psikyo_vram_1   )   // Layer 1
363		AM_RANGE(0x804000, 0x807fff) AM_WRITE(SMH_RAM) AM_BASE(&psikyo_vregs         )   // RAM + Vregs
364		//  AM_RANGE(0xc00004, 0xc0000b) AM_WRITE(s1945_mcu_w                       )   MCU on sh404, see DRIVER_INIT
365		//  AM_RANGE(0xc00010, 0xc00013) AM_WRITE(psikyo_soundlatch_w               )   Depends on board, see DRIVER_INIT
366		AM_RANGE(0xfe0000, 0xffffff) AM_WRITE(SMH_RAM                     )   // RAM
367		ADDRESS_MAP_END
368	359
369
370
371	360	/***************************************************************************
372	361
373	362
r4679	r4680
378	367
379	368	static void sound_irq( const device_config *device, int irq )
380	369	{
381		cpu_set_input_line(device->machine->cpu[1],0,irq ? ASSERT_LINE : CLEAR_LINE);
	370	cputag_set_input_line(device->machine, "audiocpu", 0, irq ? ASSERT_LINE : CLEAR_LINE);
382	371	}
383	372
384	373	static READ8_HANDLER( psikyo_soundlatch_r )
r4679	r4680
388	377
389	378	static WRITE8_HANDLER( psikyo_clear_nmi_w )
390	379	{
391		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_NMI, CLEAR_LINE);
	380	cputag_set_input_line(space->machine, "audiocpu", INPUT_LINE_NMI, CLEAR_LINE);
392	381	z80_nmi = 0;
393	382	}
394	383
r4679	r4680
404	393	memory_set_bankptr(space->machine, 1, &RAM[bank * 0x8000 + 0x10000]);
405	394	}
406	395
407		static ADDRESS_MAP_START( sngkace_sound_readmem, ADDRESS_SPACE_PROGRAM, 8 )
408		AM_RANGE(0x0000, 0x77ff) AM_READ(SMH_ROM      )   // ROM
409		AM_RANGE(0x7800, 0x7fff) AM_READ(SMH_RAM      )   // RAM
410		AM_RANGE(0x8000, 0xffff) AM_READ(SMH_BANK1      )   // Banked ROM
	396	static ADDRESS_MAP_START( sngkace_sound_map, ADDRESS_SPACE_PROGRAM, 8 )
	397	AM_RANGE(0x0000, 0x77ff) AM_ROM                     // ROM
	398	AM_RANGE(0x7800, 0x7fff) AM_RAM                     // RAM
	399	AM_RANGE(0x8000, 0xffff) AM_ROMBANK(1)               // Banked ROM
411	400	ADDRESS_MAP_END
412	401
413		static ADDRESS_MAP_START( sngkace_sound_writemem, ADDRESS_SPACE_PROGRAM, 8 )
414		AM_RANGE(0x0000, 0x77ff) AM_WRITE(SMH_ROM      )   // ROM
415		AM_RANGE(0x7800, 0x7fff) AM_WRITE(SMH_RAM      )   // RAM
416		AM_RANGE(0x8000, 0xffff) AM_WRITE(SMH_ROM      )   // Banked ROM
417		ADDRESS_MAP_END
418
419	402	static ADDRESS_MAP_START( sngkace_sound_io_map, ADDRESS_SPACE_IO, 8 )
420	403	ADDRESS_MAP_GLOBAL_MASK(0xff)
421		AM_RANGE(0x00, 0x03) AM_DEVREADWRITE("ym", ym2610_r, ym2610_w               )
422		AM_RANGE(0x04, 0x04) AM_WRITE(sngkace_sound_bankswitch_w                        )
423		AM_RANGE(0x08, 0x08) AM_READ(psikyo_soundlatch_r                              )
424		AM_RANGE(0x0c, 0x0c) AM_WRITE(psikyo_clear_nmi_w                              )
	404	AM_RANGE(0x00, 0x03) AM_DEVREADWRITE("ym", ym2610_r, ym2610_w)
	405	AM_RANGE(0x04, 0x04) AM_WRITE(sngkace_sound_bankswitch_w)
	406	AM_RANGE(0x08, 0x08) AM_READ(psikyo_soundlatch_r)
	407	AM_RANGE(0x0c, 0x0c) AM_WRITE(psikyo_clear_nmi_w)
425	408	ADDRESS_MAP_END
426	409
	410
427	411	/***************************************************************************
428	412	Gun Bird
429	413	***************************************************************************/
r4679	r4680
439	423	memory_set_bankptr(space->machine, 1, &RAM[bank * 0x8000 + 0x10000 + 0x200]);
440	424	}
441	425
442		static ADDRESS_MAP_START( gunbird_sound_readmem, ADDRESS_SPACE_PROGRAM, 8 )
443		AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM      )   // ROM
444		AM_RANGE(0x8000, 0x81ff) AM_READ(SMH_RAM      )   // RAM
445		AM_RANGE(0x8200, 0xffff) AM_READ(SMH_BANK1      )   // Banked ROM
	426	static ADDRESS_MAP_START( gunbird_sound_map, ADDRESS_SPACE_PROGRAM, 8 )
	427	AM_RANGE(0x0000, 0x7fff) AM_ROM                     // ROM
	428	AM_RANGE(0x8000, 0x81ff) AM_RAM                     // RAM
	429	AM_RANGE(0x8200, 0xffff) AM_ROMBANK(1)               // Banked ROM
446	430	ADDRESS_MAP_END
447	431
448		static ADDRESS_MAP_START( gunbird_sound_writemem, ADDRESS_SPACE_PROGRAM, 8 )
449		AM_RANGE(0x0000, 0x7fff) AM_WRITE(SMH_ROM      )   // ROM
450		AM_RANGE(0x8000, 0x81ff) AM_WRITE(SMH_RAM      )   // RAM
451		AM_RANGE(0x8200, 0xffff) AM_WRITE(SMH_ROM      )   // Banked ROM
452		ADDRESS_MAP_END
453
454	432	static ADDRESS_MAP_START( gunbird_sound_io_map, ADDRESS_SPACE_IO, 8 )
455	433	ADDRESS_MAP_GLOBAL_MASK(0xff)
456		AM_RANGE(0x00, 0x00) AM_WRITE(gunbird_sound_bankswitch_w                        )
457		AM_RANGE(0x04, 0x07) AM_DEVREADWRITE("ym", ym2610_r, ym2610_w               )
458		AM_RANGE(0x08, 0x08) AM_READ(psikyo_soundlatch_r                              )
459		AM_RANGE(0x0c, 0x0c) AM_WRITE(psikyo_clear_nmi_w                              )
	434	AM_RANGE(0x00, 0x00) AM_WRITE(gunbird_sound_bankswitch_w)
	435	AM_RANGE(0x04, 0x07) AM_DEVREADWRITE("ym", ym2610_r, ym2610_w)
	436	AM_RANGE(0x08, 0x08) AM_READ(psikyo_soundlatch_r)
	437	AM_RANGE(0x0c, 0x0c) AM_WRITE(psikyo_clear_nmi_w)
460	438	ADDRESS_MAP_END
461	439
462	440	/***************************************************************************
r4679	r4680
465	443
466	444	static ADDRESS_MAP_START( s1945_sound_io_map, ADDRESS_SPACE_IO, 8 )
467	445	ADDRESS_MAP_GLOBAL_MASK(0xff)
468		AM_RANGE(0x00, 0x00) AM_WRITE(gunbird_sound_bankswitch_w                        )
469		AM_RANGE(0x02, 0x03) AM_WRITE(SMH_NOP                                       )
470		AM_RANGE(0x08, 0x0d) AM_DEVREADWRITE("ymf", ymf278b_r, ymf278b_w               )
471		AM_RANGE(0x10, 0x10) AM_READ(psikyo_soundlatch_r                              )
472		AM_RANGE(0x18, 0x18) AM_WRITE(psikyo_clear_nmi_w                              )
	446	AM_RANGE(0x00, 0x00) AM_WRITE(gunbird_sound_bankswitch_w)
	447	AM_RANGE(0x02, 0x03) AM_WRITENOP
	448	AM_RANGE(0x08, 0x0d) AM_DEVREADWRITE("ymf", ymf278b_r, ymf278b_w)
	449	AM_RANGE(0x10, 0x10) AM_READ(psikyo_soundlatch_r)
	450	AM_RANGE(0x18, 0x18) AM_WRITE(psikyo_clear_nmi_w)
473	451	ADDRESS_MAP_END
474	452
475	453	/***************************************************************************
r4679	r4680
1207	1185
1208	1186	/* basic machine hardware */
1209	1187	MDRV_CPU_ADD("maincpu", M68EC020, 16000000)
1210		MDRV_CPU_PROGRAM_MAP(psikyo_readmem,psikyo_writemem)
	1188	MDRV_CPU_PROGRAM_MAP(psikyo_map,0)
1211	1189	MDRV_CPU_VBLANK_INT("screen", irq1_line_hold)
1212	1190
1213	1191	MDRV_CPU_ADD("audiocpu", Z80, 4000000)   /* ? */
1214		MDRV_CPU_PROGRAM_MAP(sngkace_sound_readmem,sngkace_sound_writemem)
	1192	MDRV_CPU_PROGRAM_MAP(sngkace_sound_map,0)
1215	1193	MDRV_CPU_IO_MAP(sngkace_sound_io_map,0)
1216	1194
1217	1195	MDRV_MACHINE_RESET(psikyo)
r4679	r4680
1258	1236
1259	1237	/* basic machine hardware */
1260	1238	MDRV_CPU_ADD("maincpu", M68EC020, 16000000)
1261		MDRV_CPU_PROGRAM_MAP(psikyo_readmem,psikyo_writemem)
	1239	MDRV_CPU_PROGRAM_MAP(psikyo_map,0)
1262	1240	MDRV_CPU_VBLANK_INT("screen", irq1_line_hold)
1263	1241
1264	1242	MDRV_CPU_ADD("audiocpu", Z80, 4000000)   /* ! LZ8420M (Z80 core) ! */
1265		MDRV_CPU_PROGRAM_MAP(gunbird_sound_readmem,gunbird_sound_writemem)
	1243	MDRV_CPU_PROGRAM_MAP(gunbird_sound_map,0)
1266	1244	MDRV_CPU_IO_MAP(gunbird_sound_io_map,0)
1267	1245
1268	1246	MDRV_MACHINE_RESET(psikyo)
r4679	r4680
1304	1282	static void irqhandler(const device_config *device, int linestate)
1305	1283	{
1306	1284	if (linestate)
1307		cpu_set_input_line(device->machine->cpu[1], 0, ASSERT_LINE);
	1285	cputag_set_input_line(device->machine, "audiocpu", 0, ASSERT_LINE);
1308	1286	else
1309		cpu_set_input_line(device->machine->cpu[1], 0, CLEAR_LINE);
	1287	cputag_set_input_line(device->machine, "audiocpu", 0, CLEAR_LINE);
1310	1288	}
1311	1289
1312	1290	static const ymf278b_interface ymf278b_config =
r4679	r4680
1318	1296
1319	1297	/* basic machine hardware */
1320	1298	MDRV_CPU_ADD("maincpu", M68EC020, 16000000)
1321		MDRV_CPU_PROGRAM_MAP(psikyo_readmem,psikyo_writemem)
	1299	MDRV_CPU_PROGRAM_MAP(psikyo_map,0)
1322	1300	MDRV_CPU_VBLANK_INT("screen", irq1_line_hold)
1323	1301
1324	1302	MDRV_CPU_ADD("audiocpu", Z80, 4000000)   /* ! LZ8420M (Z80 core) ! */
1325		MDRV_CPU_PROGRAM_MAP(gunbird_sound_readmem,gunbird_sound_writemem)
	1303	MDRV_CPU_PROGRAM_MAP(gunbird_sound_map,0)
1326	1304	MDRV_CPU_IO_MAP(s1945_sound_io_map,0)
1327	1305
1328	1306	/* MCU should go here */
r4679	r4680
1439	1417	int i;
1440	1418
1441	1419	/* Bit 6&7 of the samples are swapped. Naughty, naughty... */
1442		for (i=0;i<len;i++)
	1420	for (i = 0; i < len; i++)
1443	1421	{
1444	1422	int x = RAM[i];
1445	1423	RAM[i] = ((x & 0x40) << 1) | ((x & 0x80) >> 1) | (x & 0x3f);
r4679	r4680
1447	1425	}
1448	1426
1449	1427	/* input ports */
1450		memory_install_read32_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xc00000, 0xc0000b, 0, 0, sngkace_input_r);
	1428	memory_install_read32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xc00000, 0xc0000b, 0, 0, sngkace_input_r);
1451	1429
1452	1430	/* sound latch */
1453		memory_install_write32_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xc00010, 0xc00013, 0, 0, psikyo_soundlatch_w);
	1431	memory_install_write32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xc00010, 0xc00013, 0, 0, psikyo_soundlatch_w);
1454	1432
1455	1433	psikyo_ka302c_banking = 0; // SH201B doesn't have any gfx banking
1456	1434	psikyo_switch_banks(0, 0); // sngkace / samuraia don't use banking
r4679	r4680
1619	1597	static DRIVER_INIT( gunbird )
1620	1598	{
1621	1599	/* input ports */
1622		memory_install_read32_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xc00000, 0xc0000b, 0, 0, gunbird_input_r);
	1600	memory_install_read32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xc00000, 0xc0000b, 0, 0, gunbird_input_r);
1623	1601
1624	1602	/* sound latch */
1625		memory_install_write32_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xc00010, 0xc00013, 0, 0, psikyo_soundlatch_w);
	1603	memory_install_write32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xc00010, 0xc00013, 0, 0, psikyo_soundlatch_w);
1626	1604
1627	1605	psikyo_ka302c_banking = 1;
1628	1606	}
r4679	r4680
1677	1655	static DRIVER_INIT( s1945jn )
1678	1656	{
1679	1657	/* input ports */
1680		memory_install_read32_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xc00000, 0xc0000b, 0, 0, gunbird_input_r);
	1658	memory_install_read32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xc00000, 0xc0000b, 0, 0, gunbird_input_r);
1681	1659
1682	1660	/* sound latch */
1683		memory_install_write32_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xc00010, 0xc00013, 0, 0, s1945_soundlatch_w);
	1661	memory_install_write32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xc00010, 0xc00013, 0, 0, s1945_soundlatch_w);
1684	1662
1685	1663	psikyo_ka302c_banking = 1;
1686	1664	}
r4679	r4680
1884	1862	static DRIVER_INIT( s1945 )
1885	1863	{
1886	1864	/* input ports */
1887		memory_install_read32_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xc00000, 0xc0000b, 0, 0, s1945_input_r);
	1865	memory_install_read32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xc00000, 0xc0000b, 0, 0, s1945_input_r);
1888	1866
1889	1867	/* sound latch */
1890		memory_install_write32_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xc00010, 0xc00013, 0, 0, s1945_soundlatch_w);
	1868	memory_install_write32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xc00010, 0xc00013, 0, 0, s1945_soundlatch_w);
1891	1869
1892	1870	/* protection and tile bank switching */
1893		memory_install_write32_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xc00004, 0xc0000b, 0, 0, s1945_mcu_w);
	1871	memory_install_write32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xc00004, 0xc0000b, 0, 0, s1945_mcu_w);
1894	1872	s1945_mcu_init(s1945_table);
1895	1873
1896	1874	psikyo_ka302c_banking = 0; // Banking is controlled by mcu
r4679	r4680
1899	1877	static DRIVER_INIT( s1945a )
1900	1878	{
1901	1879	/* input ports */
1902		memory_install_read32_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xc00000, 0xc0000b, 0, 0, s1945_input_r);
	1880	memory_install_read32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xc00000, 0xc0000b, 0, 0, s1945_input_r);
1903	1881
1904	1882	/* sound latch */
1905		memory_install_write32_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xc00010, 0xc00013, 0, 0, s1945_soundlatch_w);
	1883	memory_install_write32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xc00010, 0xc00013, 0, 0, s1945_soundlatch_w);
1906	1884
1907	1885	/* protection and tile bank switching */
1908		memory_install_write32_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xc00004, 0xc0000b, 0, 0, s1945_mcu_w);
	1886	memory_install_write32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xc00004, 0xc0000b, 0, 0, s1945_mcu_w);
1909	1887	s1945_mcu_init(s1945a_table);
1910	1888
1911	1889	psikyo_ka302c_banking = 0; // Banking is controlled by mcu
r4679	r4680
1914	1892	static DRIVER_INIT( s1945j )
1915	1893	{
1916	1894	/* input ports*/
1917		memory_install_read32_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xc00000, 0xc0000b, 0, 0, s1945_input_r);
	1895	memory_install_read32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xc00000, 0xc0000b, 0, 0, s1945_input_r);
1918	1896
1919	1897	/* sound latch */
1920		memory_install_write32_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xc00010, 0xc00013, 0, 0, s1945_soundlatch_w);
	1898	memory_install_write32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xc00010, 0xc00013, 0, 0, s1945_soundlatch_w);
1921	1899
1922	1900	/* protection and tile bank switching */
1923		memory_install_write32_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xc00004, 0xc0000b, 0, 0, s1945_mcu_w);
	1901	memory_install_write32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xc00004, 0xc0000b, 0, 0, s1945_mcu_w);
1924	1902	s1945_mcu_init(s1945j_table);
1925	1903
1926	1904	psikyo_ka302c_banking = 0; // Banking is controlled by mcu
r4679	r4680
2011	1989	static DRIVER_INIT( tengai )
2012	1990	{
2013	1991	/* input ports */
2014		memory_install_read32_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xc00000, 0xc0000b, 0, 0, s1945_input_r);
	1992	memory_install_read32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xc00000, 0xc0000b, 0, 0, s1945_input_r);
2015	1993
2016	1994	/* sound latch */
2017		memory_install_write32_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xc00010, 0xc00013, 0, 0, s1945_soundlatch_w);
	1995	memory_install_write32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xc00010, 0xc00013, 0, 0, s1945_soundlatch_w);
2018	1996
2019	1997	/* protection */
2020		memory_install_write32_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xc00004, 0xc0000b, 0, 0, s1945_mcu_w);
	1998	memory_install_write32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xc00004, 0xc0000b, 0, 0, s1945_mcu_w);
2021	1999	s1945_mcu_init(0);
2022	2000
2023	2001	psikyo_ka302c_banking = 0; // Banking is controlled by mcu
r4679	r4680
2046	2024	GAME( 1995, s1945k,   s1945,    s1945,    s1945j,   s1945,    ROT270, "Psikyo", "Strikers 1945 (Korea)", 0 )
2047	2025	GAME( 1996, tengai,   0,        s1945,    tengai,   tengai,   ROT0,   "Psikyo", "Tengai (World)", 0 )
2048	2026	GAME( 1996, tengaij,  tengai,   s1945,    tengaij,  tengai,   ROT0,   "Psikyo", "Sengoku Blade: Sengoku Ace Episode II / Tengai", 0 ) // Region dip - 0x0f=Japan, anything else=World
2049

src/mame/drivers/dacholer.c

r4679	r4680
70	70
71	71	static WRITE8_HANDLER(snd_w)
72	72	{
73		soundlatch_w(space,offset,data);
74		cpu_set_input_line(space->machine->cpu[1],INPUT_LINE_NMI,PULSE_LINE);
	73	soundlatch_w(space, offset, data);
	74	cputag_set_input_line(space->machine, "audiocpu", INPUT_LINE_NMI, PULSE_LINE);
75	75	}
76	76
77	77	static ADDRESS_MAP_START( main_map, ADDRESS_SPACE_PROGRAM, 8 )
r4679	r4680
379	379
380	380	static void adpcm_int(const device_config *device)
381	381	{
382		if(snd_interrupt_enable == 1 || (snd_interrupt_enable ==0 && msm_toggle==1))
	382	if(snd_interrupt_enable == 1 || (snd_interrupt_enable == 0 && msm_toggle == 1))
383	383	{
384		msm5205_data_w(device,msm_data >> 4);
385		msm_data<<=4;
386		msm_toggle^=1;
387		if (msm_toggle==0)
	384	msm5205_data_w(device, msm_data >> 4);
	385	msm_data <<= 4;
	386	msm_toggle ^= 1;
	387	if (msm_toggle == 0)
388	388	{
389		cpu_set_input_line_and_vector(device->machine->cpu[1], 0, HOLD_LINE, 0x38);
	389	cputag_set_input_line_and_vector(device->machine, "audiocpu", 0, HOLD_LINE, 0x38);
390	390	}
391	391	}
392	392	}

src/mame/drivers/esd16.c

r4679	r4680
83	83	{
84	84	if (ACCESSING_BITS_0_7)
85	85	{
86		soundlatch_w(space,0,data & 0xff);
87		cpu_set_input_line(space->machine->cpu[1],0,ASSERT_LINE);      // Generate an IRQ
	86	soundlatch_w(space, 0, data & 0xff);
	87	cputag_set_input_line(space->machine, "audiocpu", 0, ASSERT_LINE);      // Generate an IRQ
88	88	cpu_spinuntil_time(space->cpu, ATTOTIME_IN_USEC(50));   // Allow the other CPU to reply
89	89	}
90	90	}
r4679	r4680
95	95	AFAIK)
96	96	*/
97	97
98		static ADDRESS_MAP_START( multchmp_readmem, ADDRESS_SPACE_PROGRAM, 16 )
99		AM_RANGE(0x000000, 0x07ffff) AM_READ(SMH_ROM            )   // ROM
100		AM_RANGE(0x100000, 0x10ffff) AM_READ(SMH_RAM            )   // RAM
101		AM_RANGE(0x200000, 0x2005ff) AM_READ(SMH_RAM            )   // Palette
102		/**/AM_RANGE(0x300000, 0x3007ff) AM_READ(SMH_RAM            )   // Sprites
103		/**/AM_RANGE(0x400000, 0x403fff) AM_READ(SMH_RAM            )   // Layers
104		/**/AM_RANGE(0x420000, 0x423fff) AM_READ(SMH_RAM            )   //
105		/**/AM_RANGE(0x500000, 0x500003) AM_READ(SMH_RAM            )   // Scroll
106		/**/AM_RANGE(0x500004, 0x500007) AM_READ(SMH_RAM            )   //
107		/**/AM_RANGE(0x500008, 0x50000b) AM_READ(SMH_RAM            )   //
108		/**/AM_RANGE(0x50000c, 0x50000f) AM_READ(SMH_RAM            )   //
	98	static ADDRESS_MAP_START( multchmp_map, ADDRESS_SPACE_PROGRAM, 16 )
	99	AM_RANGE(0x000000, 0x07ffff) AM_ROM                                                      // ROM
	100	AM_RANGE(0x100000, 0x10ffff) AM_RAM                                                      // RAM
	101	AM_RANGE(0x200000, 0x2005ff) AM_RAM_WRITE(paletteram16_xRRRRRGGGGGBBBBB_word_w) AM_BASE(&paletteram16)   // Palette
	102	/**/AM_RANGE(0x300000, 0x3007ff) AM_RAM AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)                  // Sprites
	103	AM_RANGE(0x300800, 0x300807) AM_WRITE(esd16_spriteram_w)                                    // Sprites (Mirrored)
	104	/**/AM_RANGE(0x400000, 0x403fff) AM_RAM_WRITE(esd16_vram_0_w) AM_BASE(&esd16_vram_0)                  // Layers
	105	/**/AM_RANGE(0x420000, 0x423fff) AM_RAM_WRITE(esd16_vram_1_w) AM_BASE(&esd16_vram_1)                  //
	106	/**/AM_RANGE(0x500000, 0x500003) AM_RAM AM_BASE(&esd16_scroll_0)                                 // Scroll
	107	/**/AM_RANGE(0x500004, 0x500007) AM_RAM AM_BASE(&esd16_scroll_1)                                 //
	108	/**/AM_RANGE(0x500008, 0x50000b) AM_RAM                                                      //
	109	/**/AM_RANGE(0x50000c, 0x50000f) AM_RAM                                                      //
	110	AM_RANGE(0x600000, 0x600001) AM_WRITE(SMH_NOP)                                             // IRQ Ack
109	111	AM_RANGE(0x600002, 0x600003) AM_READ_PORT("P1_P2")
110	112	AM_RANGE(0x600004, 0x600005) AM_READ_PORT("SYSTEM")
111	113	AM_RANGE(0x600006, 0x600007) AM_READ_PORT("DSW")
112		AM_RANGE(0x700008, 0x70000b) AM_READ(SMH_NOP            )   // ? Only read once
	114	AM_RANGE(0x600008, 0x600009) AM_WRITE(esd16_tilemap0_color_w)                                 // Flip Screen + Tileamp0 palette banking
	115	AM_RANGE(0x60000a, 0x60000b) AM_WRITE(SMH_NOP)                                             // ? 2
	116	AM_RANGE(0x60000c, 0x60000d) AM_WRITE(esd16_sound_command_w)                                 // To Sound CPU
	117	AM_RANGE(0x700008, 0x70000b) AM_READ(SMH_NOP)                                             // ? Only read once
113	118	ADDRESS_MAP_END
114	119
115		static ADDRESS_MAP_START( multchmp_writemem, ADDRESS_SPACE_PROGRAM, 16 )
116		AM_RANGE(0x000000, 0x07ffff) AM_WRITE(SMH_ROM                  )   // ROM
117		AM_RANGE(0x100000, 0x10ffff) AM_WRITE(SMH_RAM                  )   // RAM
118		AM_RANGE(0x200000, 0x2005ff) AM_WRITE(paletteram16_xRRRRRGGGGGBBBBB_word_w) AM_BASE(&paletteram16   )   // Palette
119		AM_RANGE(0x300000, 0x3007ff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16) AM_SIZE(&spriteram_size   )   // Sprites
120		AM_RANGE(0x300800, 0x300807) AM_WRITE(esd16_spriteram_w            )   // Sprites (Mirrored)
121		AM_RANGE(0x400000, 0x403fff) AM_WRITE(esd16_vram_0_w) AM_BASE(&esd16_vram_0   )   // Layers
122		AM_RANGE(0x420000, 0x423fff) AM_WRITE(esd16_vram_1_w) AM_BASE(&esd16_vram_1   )   // Scroll
123		AM_RANGE(0x500000, 0x500003) AM_WRITE(SMH_RAM) AM_BASE(&esd16_scroll_0   )   //
124		AM_RANGE(0x500004, 0x500007) AM_WRITE(SMH_RAM) AM_BASE(&esd16_scroll_1   )   //
125		AM_RANGE(0x500008, 0x50000b) AM_WRITE(SMH_RAM                  )   // ? 0
126		AM_RANGE(0x50000c, 0x50000f) AM_WRITE(SMH_RAM                  )   // ? 0
127		AM_RANGE(0x600000, 0x600001) AM_WRITE(SMH_NOP                  )   // IRQ Ack
128		AM_RANGE(0x600008, 0x600009) AM_WRITE(esd16_tilemap0_color_w      )   // Flip Screen + Tileamp0 palette banking
129		AM_RANGE(0x60000a, 0x60000b) AM_WRITE(SMH_NOP                  )   // ? 2
130		AM_RANGE(0x60000c, 0x60000d) AM_WRITE(esd16_sound_command_w         )   // To Sound CPU
131		ADDRESS_MAP_END
132
133	120	static WRITE16_HANDLER(hedpanic_platform_w)
134	121	{
135	122	int offsets = headpanic_platform_x[0]+0x40* headpanic_platform_y[0];
r4679	r4680
168	155	//  logerror("(0x%06x) Unk EEPROM write: %04x %04x\n", cpu_get_pc(space->cpu), data, mem_mask);
169	156	}
170	157
171		static ADDRESS_MAP_START( hedpanic_readmem, ADDRESS_SPACE_PROGRAM, 16 )
172		AM_RANGE(0x000000, 0x07ffff) AM_READ(SMH_ROM            )   // ROM
173		AM_RANGE(0x100000, 0x10ffff) AM_READ(SMH_RAM)
174		AM_RANGE(0x800000, 0x800fff) AM_READ(SMH_RAM)
175		AM_RANGE(0xc00002, 0xc00003) AM_READ_PORT("P1_P2")
176		AM_RANGE(0xc00004, 0xc00005) AM_READ_PORT("SYSTEM")
177		AM_RANGE(0xc00006, 0xc00007) AM_READ(esd_eeprom_r   )
178		ADDRESS_MAP_END
179
180		static ADDRESS_MAP_START( hedpanic_writemem, ADDRESS_SPACE_PROGRAM, 16 )
181		AM_RANGE(0x000000, 0x07ffff) AM_WRITE(SMH_ROM                  )   // ROM
182		AM_RANGE(0x100000, 0x10ffff) AM_WRITE(SMH_RAM)
183		AM_RANGE(0x800000, 0x800fff) AM_WRITE(paletteram16_xRRRRRGGGGGBBBBB_word_w) AM_BASE(&paletteram16)
184		AM_RANGE(0x900000, 0x9007ff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16) AM_SIZE(&spriteram_size   )   // Sprites
185		AM_RANGE(0x900800, 0x900807) AM_WRITE(esd16_spriteram_w            )   // Sprites (Mirrored)
186		AM_RANGE(0xa00000, 0xa03fff) AM_WRITE(esd16_vram_0_w) AM_BASE(&esd16_vram_0   )   // Layers
187		AM_RANGE(0xa20000, 0xa23fff) AM_WRITE(esd16_vram_1_w) AM_BASE(&esd16_vram_1   )   //
188		AM_RANGE(0xa24000, 0xa27fff) AM_WRITE(esd16_vram_1_w) AM_BASE(&esd16_vram_1   )   // mirror?
189		AM_RANGE(0xb00000, 0xb00003) AM_WRITE(SMH_RAM) AM_BASE(&esd16_scroll_0   )   // Scroll
190		AM_RANGE(0xb00004, 0xb00007) AM_WRITE(SMH_RAM) AM_BASE(&esd16_scroll_1   )   //
	158	static ADDRESS_MAP_START( hedpanic_map, ADDRESS_SPACE_PROGRAM, 16 )
	159	AM_RANGE(0x000000, 0x07ffff) AM_ROM                                                      // ROM
	160	AM_RANGE(0x100000, 0x10ffff) AM_RAM                                                      // RAM
	161	AM_RANGE(0x800000, 0x800fff) AM_RAM_WRITE(paletteram16_xRRRRRGGGGGBBBBB_word_w) AM_BASE(&paletteram16)   // Palette
	162	AM_RANGE(0x900000, 0x9007ff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)         // Sprites
	163	AM_RANGE(0x900800, 0x900807) AM_WRITE(esd16_spriteram_w)                                    // Sprites (Mirrored)
	164	AM_RANGE(0xa00000, 0xa03fff) AM_WRITE(esd16_vram_0_w) AM_BASE(&esd16_vram_0)                     // Layers
	165	AM_RANGE(0xa20000, 0xa23fff) AM_WRITE(esd16_vram_1_w) AM_BASE(&esd16_vram_1)                     //
	166	AM_RANGE(0xa24000, 0xa27fff) AM_WRITE(esd16_vram_1_w) AM_BASE(&esd16_vram_1)                     // mirror?
	167	AM_RANGE(0xb00000, 0xb00003) AM_WRITE(SMH_RAM) AM_BASE(&esd16_scroll_0)                           // Scroll
	168	AM_RANGE(0xb00004, 0xb00007) AM_WRITE(SMH_RAM) AM_BASE(&esd16_scroll_1)                           //
191	169	AM_RANGE(0xb00008, 0xb00009) AM_WRITE(SMH_RAM) AM_BASE(&headpanic_platform_x)
192	170	AM_RANGE(0xb0000a, 0xb0000b) AM_WRITE(SMH_RAM) AM_BASE(&headpanic_platform_y)
193		AM_RANGE(0xb0000c, 0xb0000d) AM_WRITENOP // ??
194		AM_RANGE(0xb0000e, 0xb0000f) AM_WRITE(SMH_RAM) AM_BASE(&head_layersize) // ??
	171	AM_RANGE(0xb0000c, 0xb0000d) AM_WRITENOP                                                 // ??
	172	AM_RANGE(0xb0000e, 0xb0000f) AM_WRITE(SMH_RAM) AM_BASE(&head_layersize)                         // ??
195	173	AM_RANGE(0xc00000, 0xc00001) AM_WRITENOP // IRQ Ack
	174	AM_RANGE(0xc00002, 0xc00003) AM_READ_PORT("P1_P2")
	175	AM_RANGE(0xc00004, 0xc00005) AM_READ_PORT("SYSTEM")
	176	AM_RANGE(0xc00006, 0xc00007) AM_READ(esd_eeprom_r   )
196	177	AM_RANGE(0xc00008, 0xc00009) AM_WRITE(esd16_tilemap0_color_w)   // Flip Screen + Tileamp0 palette banking
197	178	AM_RANGE(0xc0000a, 0xc0000b) AM_WRITENOP   // ? 2 not checked
198	179	AM_RANGE(0xc0000c, 0xc0000d) AM_WRITE(esd16_sound_command_w         )   // To Sound CPU // ok
r4679	r4680
202	183
203	184	/* Multi Champ Deluxe, like Head Panic but different addresses */
204	185
205		static ADDRESS_MAP_START( mchampdx_readmem, ADDRESS_SPACE_PROGRAM, 16 )
206		AM_RANGE(0x000000, 0x07ffff) AM_READ(SMH_ROM            )   // ROM
207		AM_RANGE(0x200000, 0x20ffff) AM_READ(SMH_RAM)
208		AM_RANGE(0x400000, 0x400fff) AM_READ(SMH_RAM)
	186	static ADDRESS_MAP_START( mchampdx_map, ADDRESS_SPACE_PROGRAM, 16 )
	187	AM_RANGE(0x000000, 0x07ffff) AM_ROM                                                      // ROM
	188	AM_RANGE(0x200000, 0x20ffff) AM_RAM                                                      // RAM
	189	AM_RANGE(0x300000, 0x303fff) AM_WRITE(esd16_vram_0_w) AM_BASE(&esd16_vram_0)                     // Layers
	190	AM_RANGE(0x320000, 0x323fff) AM_WRITE(esd16_vram_1_w) AM_BASE(&esd16_vram_1)                     //
	191	AM_RANGE(0x324000, 0x327fff) AM_WRITE(esd16_vram_1_w) AM_BASE(&esd16_vram_1)                     // mirror?
	192	AM_RANGE(0x400000, 0x400fff) AM_RAM_WRITE(paletteram16_xRRRRRGGGGGBBBBB_word_w) AM_BASE(&paletteram16)   // Palette
	193	AM_RANGE(0x500000, 0x500001) AM_WRITENOP   // IRQ Ack
209	194	AM_RANGE(0x500002, 0x500003) AM_READ_PORT("P1_P2")
210	195	AM_RANGE(0x500004, 0x500005) AM_READ_PORT("SYSTEM")
211		AM_RANGE(0x500006, 0x500007) AM_READ(esd_eeprom_r   )
212		ADDRESS_MAP_END
213
214		static ADDRESS_MAP_START( mchampdx_writemem, ADDRESS_SPACE_PROGRAM, 16 )
215		AM_RANGE(0x000000, 0x07ffff) AM_WRITE(SMH_ROM                  )   // ROM
216		AM_RANGE(0x200000, 0x20ffff) AM_WRITE(SMH_RAM)
217		AM_RANGE(0x300000, 0x303fff) AM_WRITE(esd16_vram_0_w) AM_BASE(&esd16_vram_0   )   // Layers
218		AM_RANGE(0x320000, 0x323fff) AM_WRITE(esd16_vram_1_w) AM_BASE(&esd16_vram_1   )   //
219		AM_RANGE(0x324000, 0x327fff) AM_WRITE(esd16_vram_1_w) AM_BASE(&esd16_vram_1   )   // mirror?
220		AM_RANGE(0x400000, 0x400fff) AM_WRITE(paletteram16_xRRRRRGGGGGBBBBB_word_w) AM_BASE(&paletteram16)
221		AM_RANGE(0x500000, 0x500001) AM_WRITENOP   // IRQ Ack
222		AM_RANGE(0x500008, 0x500009) AM_WRITE(esd16_tilemap0_color_w)   // Flip Screen + Tileamp0 palette banking
223		AM_RANGE(0x50000a, 0x50000b) AM_WRITENOP   // ? 2 not checked
224		AM_RANGE(0x50000c, 0x50000d) AM_WRITE(esd16_sound_command_w         )   // To Sound CPU // ok
	196	AM_RANGE(0x500006, 0x500007) AM_READ(esd_eeprom_r)
	197	AM_RANGE(0x500008, 0x500009) AM_WRITE(esd16_tilemap0_color_w)                                 // Flip Screen + Tileamp0 palette banking
	198	AM_RANGE(0x50000a, 0x50000b) AM_WRITENOP                                                // ? 2 not checked
	199	AM_RANGE(0x50000c, 0x50000d) AM_WRITE(esd16_sound_command_w)                                 // To Sound CPU // ok
225	200	AM_RANGE(0x50000e, 0x50000f) AM_WRITE(esd_eeprom_w)
226		AM_RANGE(0x600000, 0x6007ff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16) AM_SIZE(&spriteram_size   )   // Sprites
227		AM_RANGE(0x600800, 0x600807) AM_WRITE(esd16_spriteram_w            )   // Sprites (Mirrored)
228		AM_RANGE(0x700000, 0x700003) AM_WRITE(SMH_RAM) AM_BASE(&esd16_scroll_0   )   // Scroll
229		AM_RANGE(0x700004, 0x700007) AM_WRITE(SMH_RAM) AM_BASE(&esd16_scroll_1   )   //
230		AM_RANGE(0x700008, 0x700009) AM_WRITE(SMH_RAM) AM_BASE(&headpanic_platform_x) // not used in mchampdx?
231		AM_RANGE(0x70000a, 0x70000b) AM_WRITE(SMH_RAM) AM_BASE(&headpanic_platform_y) // not used in mchampdx?
232		AM_RANGE(0x70000c, 0x70000d) AM_WRITENOP // ??
233		AM_RANGE(0x70000e, 0x70000f) AM_WRITE(SMH_RAM) AM_BASE(&head_layersize) // ??
234		AM_RANGE(0xd00008, 0xd00009) AM_WRITE(hedpanic_platform_w) // not used in mchampdx?
	201	AM_RANGE(0x600000, 0x6007ff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)         // Sprites
	202	AM_RANGE(0x600800, 0x600807) AM_WRITE(esd16_spriteram_w)                                    // Sprites (Mirrored)
	203	AM_RANGE(0x700000, 0x700003) AM_WRITE(SMH_RAM) AM_BASE(&esd16_scroll_0)                           // Scroll
	204	AM_RANGE(0x700004, 0x700007) AM_WRITE(SMH_RAM) AM_BASE(&esd16_scroll_1)                           //
	205	AM_RANGE(0x700008, 0x700009) AM_WRITE(SMH_RAM) AM_BASE(&headpanic_platform_x)                      // not used in mchampdx?
	206	AM_RANGE(0x70000a, 0x70000b) AM_WRITE(SMH_RAM) AM_BASE(&headpanic_platform_y)                      // not used in mchampdx?
	207	AM_RANGE(0x70000c, 0x70000d) AM_WRITENOP                                                 // ??
	208	AM_RANGE(0x70000e, 0x70000f) AM_WRITE(SMH_RAM) AM_BASE(&head_layersize)                         // ??
	209	AM_RANGE(0xd00008, 0xd00009) AM_WRITE(hedpanic_platform_w)                                     // not used in mchampdx?
235	210	ADDRESS_MAP_END
236	211
237	212	/* Tang Tang - like the others but again with different addresses */
238	213
239		static ADDRESS_MAP_START( tangtang_readmem, ADDRESS_SPACE_PROGRAM, 16 )
240		AM_RANGE(0x000000, 0x07ffff) AM_READ(SMH_ROM            )   // ROM
241		AM_RANGE(0x100000, 0x100fff) AM_READ(SMH_RAM)
	214	static ADDRESS_MAP_START( tangtang_map, ADDRESS_SPACE_PROGRAM, 16 )
	215	AM_RANGE(0x000000, 0x07ffff) AM_ROM                                                      // ROM
	216	AM_RANGE(0x100000, 0x100fff) AM_RAM_WRITE(paletteram16_xRRRRRGGGGGBBBBB_word_w) AM_BASE(&paletteram16)   // RAM
	217	AM_RANGE(0x200000, 0x2007ff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)         // Sprites
	218	AM_RANGE(0x200800, 0x200807) AM_WRITE(esd16_spriteram_w)                                    // Sprites (Mirrored)
	219	AM_RANGE(0x300000, 0x303fff) AM_WRITE(esd16_vram_0_w) AM_BASE(&esd16_vram_0)                     // Layers
	220	AM_RANGE(0x320000, 0x323fff) AM_WRITE(esd16_vram_1_w) AM_BASE(&esd16_vram_1)                     //
	221	AM_RANGE(0x324000, 0x327fff) AM_WRITE(esd16_vram_1_w) AM_BASE(&esd16_vram_1)                     // mirror?
	222	AM_RANGE(0x400000, 0x400003) AM_WRITE(SMH_RAM) AM_BASE(&esd16_scroll_0)                           // Scroll
	223	AM_RANGE(0x400004, 0x400007) AM_WRITE(SMH_RAM) AM_BASE(&esd16_scroll_1)                           //
	224	AM_RANGE(0x400008, 0x400009) AM_WRITE(SMH_RAM) AM_BASE(&headpanic_platform_x)                      // not used in mchampdx?
	225	AM_RANGE(0x40000a, 0x40000b) AM_WRITE(SMH_RAM) AM_BASE(&headpanic_platform_y)                      // not used in mchampdx?
	226	AM_RANGE(0x40000c, 0x40000d) AM_WRITENOP                                                 // ??
	227	AM_RANGE(0x40000e, 0x40000f) AM_WRITE(SMH_RAM) AM_BASE(&head_layersize)                           // ??
	228	AM_RANGE(0x500000, 0x500001) AM_WRITENOP   // IRQ Ack
242	229	AM_RANGE(0x500002, 0x500003) AM_READ_PORT("P1_P2")
243	230	AM_RANGE(0x500004, 0x500005) AM_READ_PORT("SYSTEM")
244		AM_RANGE(0x500006, 0x500007) AM_READ(esd_eeprom_r   )
245		AM_RANGE(0x700000, 0x70ffff) AM_READ(SMH_RAM) // main ram
246		ADDRESS_MAP_END
247
248		static ADDRESS_MAP_START( tangtang_writemem, ADDRESS_SPACE_PROGRAM, 16 )
249		AM_RANGE(0x000000, 0x07ffff) AM_WRITE(SMH_ROM                  )   // ROM
250		AM_RANGE(0x100000, 0x100fff) AM_WRITE(paletteram16_xRRRRRGGGGGBBBBB_word_w) AM_BASE(&paletteram16)
251		AM_RANGE(0x200000, 0x2007ff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16) AM_SIZE(&spriteram_size   )   // Sprites
252		AM_RANGE(0x200800, 0x200807) AM_WRITE(esd16_spriteram_w            )   // Sprites (Mirrored)
253		AM_RANGE(0x300000, 0x303fff) AM_WRITE(esd16_vram_0_w) AM_BASE(&esd16_vram_0   )   // Layers
254		AM_RANGE(0x320000, 0x323fff) AM_WRITE(esd16_vram_1_w) AM_BASE(&esd16_vram_1   )   //
255		AM_RANGE(0x324000, 0x327fff) AM_WRITE(esd16_vram_1_w) AM_BASE(&esd16_vram_1   )   // mirror?
256		AM_RANGE(0x400000, 0x400003) AM_WRITE(SMH_RAM) AM_BASE(&esd16_scroll_0   )   // Scroll
257		AM_RANGE(0x400004, 0x400007) AM_WRITE(SMH_RAM) AM_BASE(&esd16_scroll_1   )   //
258		AM_RANGE(0x400008, 0x400009) AM_WRITE(SMH_RAM) AM_BASE(&headpanic_platform_x) // not used in mchampdx?
259		AM_RANGE(0x40000a, 0x40000b) AM_WRITE(SMH_RAM) AM_BASE(&headpanic_platform_y) // not used in mchampdx?
260		AM_RANGE(0x40000c, 0x40000d) AM_WRITENOP // ??
261		AM_RANGE(0x40000e, 0x40000f) AM_WRITE(SMH_RAM) AM_BASE(&head_layersize) // ??
262		AM_RANGE(0x500000, 0x500001) AM_WRITENOP   // IRQ Ack
263		AM_RANGE(0x500008, 0x500009) AM_WRITE(esd16_tilemap0_color_w)   // Flip Screen + Tileamp0 palette banking
264		AM_RANGE(0x50000a, 0x50000b) AM_WRITENOP   // ? 2 not checked
265		AM_RANGE(0x50000c, 0x50000d) AM_WRITE(esd16_sound_command_w         )   // To Sound CPU // ok
	231	AM_RANGE(0x500006, 0x500007) AM_READ(esd_eeprom_r)
	232	AM_RANGE(0x500008, 0x500009) AM_WRITE(esd16_tilemap0_color_w)                                 // Flip Screen + Tileamp0 palette banking
	233	AM_RANGE(0x50000a, 0x50000b) AM_WRITENOP                                                // ? 2 not checked
	234	AM_RANGE(0x50000c, 0x50000d) AM_WRITE(esd16_sound_command_w)                                 // To Sound CPU // ok
266	235	AM_RANGE(0x50000e, 0x50000f) AM_WRITE(esd_eeprom_w)
267	236	AM_RANGE(0x600008, 0x600009) AM_WRITE(hedpanic_platform_w)
268		AM_RANGE(0x700000, 0x70ffff) AM_WRITE(SMH_RAM)
	237	AM_RANGE(0x700000, 0x70ffff) AM_RAM                                                      // main ram
269	238	ADDRESS_MAP_END
270	239
271	240
r4679	r4680
285	254	memory_set_bankptr(space->machine, 1, memory_region(space->machine, "audiocpu") + 0x4000 * bank);
286	255	}
287	256
288		static ADDRESS_MAP_START( multchmp_sound_readmem, ADDRESS_SPACE_PROGRAM, 8 )
289		AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM      )   // ROM
290		AM_RANGE(0x8000, 0xbfff) AM_READ(SMH_BANK1      )   // Banked ROM
291		AM_RANGE(0xf800, 0xffff) AM_READ(SMH_RAM      )   // RAM
	257	static ADDRESS_MAP_START( multchmp_sound_map, ADDRESS_SPACE_PROGRAM, 8 )
	258	AM_RANGE(0x0000, 0x7fff) AM_ROM                        // ROM
	259	AM_RANGE(0x8000, 0xbfff) AM_ROMBANK(1)                  // Banked ROM
	260	AM_RANGE(0xf800, 0xffff) AM_RAM                        // RAM
292	261	ADDRESS_MAP_END
293	262
294		static ADDRESS_MAP_START( multchmp_sound_writemem, ADDRESS_SPACE_PROGRAM, 8 )
295		AM_RANGE(0x0000, 0x7fff) AM_WRITE(SMH_ROM      )   // ROM
296		AM_RANGE(0x8000, 0xbfff) AM_WRITE(SMH_ROM      )   // Banked ROM
297		AM_RANGE(0xf800, 0xffff) AM_WRITE(SMH_RAM      )   // RAM
298		ADDRESS_MAP_END
299
300	263	static READ8_HANDLER( esd16_sound_command_r )
301	264	{
302	265	/* Clear IRQ only after reading the command, or some get lost */
303		cpu_set_input_line(space->machine->cpu[1],0,CLEAR_LINE);
304		return soundlatch_r(space,0);
	266	cputag_set_input_line(space->machine, "audiocpu", 0, CLEAR_LINE);
	267	return soundlatch_r(space, 0);
305	268	}
306	269
307	270	static ADDRESS_MAP_START( multchmp_sound_io_map, ADDRESS_SPACE_IO, 8 )
r4679	r4680
566	529
567	530	/* basic machine hardware */
568	531	MDRV_CPU_ADD("maincpu",M68000, 16000000)
569		MDRV_CPU_PROGRAM_MAP(multchmp_readmem,multchmp_writemem)
	532	MDRV_CPU_PROGRAM_MAP(multchmp_map,0)
570	533	MDRV_CPU_VBLANK_INT("screen", irq6_line_hold)
571	534
572	535	MDRV_CPU_ADD("audiocpu", Z80, 4000000)   /* ? */
573		MDRV_CPU_PROGRAM_MAP(multchmp_sound_readmem,multchmp_sound_writemem)
	536	MDRV_CPU_PROGRAM_MAP(multchmp_sound_map,0)
574	537	MDRV_CPU_IO_MAP(multchmp_sound_io_map,0)
575	538	MDRV_CPU_VBLANK_INT_HACK(nmi_line_pulse,32)   /* IRQ By Main CPU */
576	539
r4679	r4680
605	568	MDRV_IMPORT_FROM(multchmp)
606	569
607	570	MDRV_CPU_MODIFY("maincpu")
608		MDRV_CPU_PROGRAM_MAP(hedpanic_readmem,hedpanic_writemem)
	571	MDRV_CPU_PROGRAM_MAP(hedpanic_map,0)
609	572
610	573	MDRV_NVRAM_HANDLER(93C46)
611	574
r4679	r4680
622	585	MDRV_IMPORT_FROM(hedpanic)
623	586
624	587	MDRV_CPU_MODIFY("maincpu")
625		MDRV_CPU_PROGRAM_MAP(mchampdx_readmem,mchampdx_writemem)
	588	MDRV_CPU_PROGRAM_MAP(mchampdx_map,0)
626	589	MACHINE_DRIVER_END
627	590
628	591	static MACHINE_DRIVER_START( tangtang )
r4679	r4680
631	594	MDRV_IMPORT_FROM(hedpanic)
632	595
633	596	MDRV_CPU_MODIFY("maincpu")
634		MDRV_CPU_PROGRAM_MAP(tangtang_readmem,tangtang_writemem)
	597	MDRV_CPU_PROGRAM_MAP(tangtang_map,0)
635	598
636	599	MDRV_GFXDECODE(tangtang)
637	600	MACHINE_DRIVER_END

src/mame/drivers/jangou.c

r4679	r4680
95	95
96	96	static VIDEO_START( jangou )
97	97	{
98		blit_buffer = auto_malloc(256*256);
	98	blit_buffer = auto_alloc_array(machine, UINT8, 256*256);
99	99	}
100	100
101	101	static VIDEO_UPDATE( jangou )
r4679	r4680
269	269	static WRITE8_HANDLER( sound_latch_w )
270	270	{
271	271	soundlatch_w(space, 0, data & 0xff);
272		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_NMI, ASSERT_LINE);
	272	cputag_set_input_line(space->machine, "cpu1", INPUT_LINE_NMI, ASSERT_LINE);
273	273	}
274	274
275	275	static READ8_HANDLER( sound_latch_r )
276	276	{
277		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_NMI, CLEAR_LINE);
	277	cputag_set_input_line(space->machine, "cpu1", INPUT_LINE_NMI, CLEAR_LINE);
278	278	return soundlatch_r(space, 0);
279	279	}
280	280
r4679	r4680
292	292
293	293	/* Trigger an IRQ for every 8 shifted bits */
294	294	if ((++cvsd_shift_cnt & 7) == 0)
295		cpu_set_input_line(machine->cpu[1], 0, HOLD_LINE);
	295	cputag_set_input_line(machine, "cpu1", 0, HOLD_LINE);
296	296	}
297	297
298	298
r4679	r4680
311	311	else
312	312	{
313	313	msm5205_data_w(device, adpcm_byte & 0xf);
314		cpu_set_input_line(device->machine->cpu[1], 0, HOLD_LINE);
	314	cputag_set_input_line(device->machine, "cpu1", 0, HOLD_LINE);
315	315	}
316	316
317	317	msm5205_vclk_toggle ^= 1;
r4679	r4680
333	333
334	334	static WRITE8_HANDLER( master_com_w )
335	335	{
336		cpu_set_input_line(space->machine->cpu[2], 0, HOLD_LINE);
	336	cputag_set_input_line(space->machine, "nsc", 0, HOLD_LINE);
337	337	nsc_latch = data;
338	338	}
339	339
r4679	r4680
1026	1026
1027	1027	static DRIVER_INIT( jngolady )
1028	1028	{
1029		memory_install_read8_handler(cpu_get_address_space(machine->cpu[2], ADDRESS_SPACE_PROGRAM), 0x08, 0x08, 0, 0, jngolady_rng_r );
	1029	memory_install_read8_handler(cputag_get_address_space(machine, "nsc", ADDRESS_SPACE_PROGRAM), 0x08, 0x08, 0, 0, jngolady_rng_r );
1030	1030	}
1031	1031
1032	1032	static DRIVER_INIT (luckygrl)

src/mame/drivers/model3.c

r4679	r4680
388	388	static void update_irq_state(running_machine *machine)
389	389	{
390	390	if ((irq_enable & irq_state) || scsi_irq_state)
391		cpu_set_input_line(machine->cpu[0], PPC_IRQ, ASSERT_LINE);
	391	cputag_set_input_line(machine, "maincpu", PPC_IRQ, ASSERT_LINE);
392	392	else
393		cpu_set_input_line(machine->cpu[0], PPC_IRQ, CLEAR_LINE);
	393	cputag_set_input_line(machine, "maincpu", PPC_IRQ, CLEAR_LINE);
394	394	}
395	395
396	396	void model3_set_irq_line(running_machine *machine, UINT8 bit, int state)
r4679	r4680
768	768
769	769	static UINT32 scsi_fetch(running_machine *machine, UINT32 dsp)
770	770	{
771		const address_space *space = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM);
	771	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
772	772	UINT32 result;
773	773	result = memory_read_dword(space, dsp);
774	774	return FLIPENDIAN_INT32(result);
r4679	r4680
873	873
874	874	static void real3d_dma_callback(running_machine *machine, UINT32 src, UINT32 dst, int length, int byteswap)
875	875	{
876		const address_space *space = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM);
	876	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
877	877	switch(dst >> 24)
878	878	{
879	879	case 0x88:      /* Display List End Trigger */
r4679	r4680
897	897	case 0x9c:      /* Unknown */
898	898	break;
899	899	default:
900		fatalerror("dma_callback: %08X, %08X, %d at %08X", src, dst, length, cpu_get_pc(machine->cpu[0]));
	900	fatalerror("dma_callback: %08X, %08X, %d at %08X", src, dst, length, cpu_get_pc(cputag_get_cpu(machine, "maincpu")));
901	901	break;
902	902	}
903	903	}
r4679	r4680
981	981	static void configure_fast_ram(running_machine *machine)
982	982	{
983	983	/* set conservative DRC options */
984		ppcdrc_set_options(machine->cpu[0], PPCDRC_COMPATIBLE_OPTIONS - PPCDRC_ACCURATE_SINGLES);
	984	ppcdrc_set_options(cputag_get_cpu(machine, "maincpu"), PPCDRC_COMPATIBLE_OPTIONS - PPCDRC_ACCURATE_SINGLES);
985	985
986	986	/* configure fast RAM regions for DRC */
987		ppcdrc_add_fastram(machine->cpu[0], 0x00000000, 0x007fffff, FALSE, work_ram);
	987	ppcdrc_add_fastram(cputag_get_cpu(machine, "maincpu"), 0x00000000, 0x007fffff, FALSE, work_ram);
988	988	}
989	989
990	990	static MACHINE_START(model3_10)
r4679	r4680
4298	4298	AM_RANGE(0x400000, 0x400001) AM_WRITE(model3snd_ctrl)
4299	4299	AM_RANGE(0x600000, 0x67ffff) AM_ROM AM_REGION("audiocpu", 0x80000)
4300	4300	AM_RANGE(0x800000, 0x9fffff) AM_ROM AM_REGION("samples", 0)
4301		AM_RANGE(0xa00000, 0xdfffff) AM_READ(SMH_BANK4)
4302		AM_RANGE(0xe00000, 0xffffff) AM_READ(SMH_BANK5)
	4301	AM_RANGE(0xa00000, 0xdfffff) AM_READ(SMH_BANK(4))
	4302	AM_RANGE(0xe00000, 0xffffff) AM_READ(SMH_BANK(5))
4303	4303	ADDRESS_MAP_END
4304	4304
4305	4305	static int scsp_last_line = 0;
r4679	r4680
4309	4309	if (irq > 0)
4310	4310	{
4311	4311	scsp_last_line = irq;
4312		cpu_set_input_line(device->machine->cpu[1], irq, ASSERT_LINE);
	4312	cputag_set_input_line(device->machine, "audiocpu", irq, ASSERT_LINE);
4313	4313	}
4314	4314	else
4315		cpu_set_input_line(device->machine->cpu[1], -irq, CLEAR_LINE);
	4315	cputag_set_input_line(device->machine, "audiocpu", -irq, CLEAR_LINE);
4316	4316	}
4317	4317
4318	4318	static const scsp_interface scsp_config =
r4679	r4680
4533	4533	int vrom_length = memory_region_length(machine, "user3");
4534	4534	UINT16 *vrom;
4535	4535
4536		model3_vrom = auto_malloc(0x4000000);
	4536	model3_vrom = auto_alloc_array(machine, UINT32, 0x4000000/4);
4537	4537	vrom = (UINT16 *)model3_vrom;
4538	4538
4539	4539	if( vrom_length <= 0x1000000 ) {
r4679	r4680
4558	4558	{
4559	4559	interleave_vroms(machine);
4560	4560
4561		memory_install_readwrite64_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xc0000000, 0xc00000ff, 0, 0, scsi_r, scsi_w );
	4561	memory_install_readwrite64_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xc0000000, 0xc00000ff, 0, 0, scsi_r, scsi_w );
4562	4562
4563		memory_install_read64_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xff000000, 0xff7fffff, 0, 0, SMH_BANK1 );
	4563	memory_install_read64_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xff000000, 0xff7fffff, 0, 0, (read64_space_func)SMH_BANK(1) );
4564	4564
4565		memory_install_readwrite64_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xf0800cf8, 0xf0800cff, 0, 0, mpc105_addr_r, mpc105_addr_w );
4566		memory_install_readwrite64_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xf0c00cf8, 0xf0c00cff, 0, 0, mpc105_data_r, mpc105_data_w );
4567		memory_install_readwrite64_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xf8fff000, 0xf8fff0ff, 0, 0, mpc105_reg_r, mpc105_reg_w );
	4565	memory_install_readwrite64_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xf0800cf8, 0xf0800cff, 0, 0, mpc105_addr_r, mpc105_addr_w );
	4566	memory_install_readwrite64_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xf0c00cf8, 0xf0c00cff, 0, 0, mpc105_data_r, mpc105_data_w );
	4567	memory_install_readwrite64_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xf8fff000, 0xf8fff0ff, 0, 0, mpc105_reg_r, mpc105_reg_w );
4568	4568	}
4569	4569
4570	4570	static DRIVER_INIT( model3_15 )
4571	4571	{
4572	4572	interleave_vroms(machine);
4573		memory_install_read64_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xff000000, 0xff7fffff, 0, 0, SMH_BANK1 );
	4573	memory_install_read64_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xff000000, 0xff7fffff, 0, 0, (read64_space_func)SMH_BANK(1) );
4574	4574
4575		memory_install_readwrite64_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xf0800cf8, 0xf0800cff, 0, 0, mpc105_addr_r, mpc105_addr_w );
4576		memory_install_readwrite64_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xf0c00cf8, 0xf0c00cff, 0, 0, mpc105_data_r, mpc105_data_w );
4577		memory_install_readwrite64_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xf8fff000, 0xf8fff0ff, 0, 0, mpc105_reg_r, mpc105_reg_w );
	4575	memory_install_readwrite64_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xf0800cf8, 0xf0800cff, 0, 0, mpc105_addr_r, mpc105_addr_w );
	4576	memory_install_readwrite64_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xf0c00cf8, 0xf0c00cff, 0, 0, mpc105_data_r, mpc105_data_w );
	4577	memory_install_readwrite64_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xf8fff000, 0xf8fff0ff, 0, 0, mpc105_reg_r, mpc105_reg_w );
4578	4578	}
4579	4579
4580	4580	static DRIVER_INIT( model3_20 )
4581	4581	{
4582	4582	interleave_vroms(machine);
4583		memory_install_read64_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xff000000, 0xff7fffff, 0, 0, SMH_BANK1 );
	4583	memory_install_read64_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xff000000, 0xff7fffff, 0, 0, (read64_space_func)SMH_BANK(1) );
4584	4584
4585		memory_install_readwrite64_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xc2000000, 0xc20000ff, 0, 0, real3d_dma_r, real3d_dma_w );
	4585	memory_install_readwrite64_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xc2000000, 0xc20000ff, 0, 0, real3d_dma_r, real3d_dma_w );
4586	4586
4587		memory_install_readwrite64_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xfec00000, 0xfedfffff, 0, 0, mpc106_addr_r, mpc106_addr_w );
4588		memory_install_readwrite64_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xfee00000, 0xfeffffff, 0, 0, mpc106_data_r, mpc106_data_w );
4589		memory_install_readwrite64_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xf8fff000, 0xf8fff0ff, 0, 0, mpc106_reg_r, mpc106_reg_w );
	4587	memory_install_readwrite64_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xfec00000, 0xfedfffff, 0, 0, mpc106_addr_r, mpc106_addr_w );
	4588	memory_install_readwrite64_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xfee00000, 0xfeffffff, 0, 0, mpc106_data_r, mpc106_data_w );
	4589	memory_install_readwrite64_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xf8fff000, 0xf8fff0ff, 0, 0, mpc106_reg_r, mpc106_reg_w );
4590	4590	}
4591	4591
4592	4592	static DRIVER_INIT( lostwsga )
r4679	r4680
4595	4595
4596	4596	DRIVER_INIT_CALL(model3_15);
4597	4597	/* TODO: there's an M68K device at 0xC0000000 - FF, maybe lightgun controls ? */
4598		memory_install_readwrite64_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xc1000000, 0xc10000ff, 0, 0, scsi_r, scsi_w );
	4598	memory_install_readwrite64_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xc1000000, 0xc10000ff, 0, 0, scsi_r, scsi_w );
4599	4599
4600	4600	rom[0x7374f0/4] = 0x38840004;      /* This seems to be an actual bug in the original code */
4601	4601	}
r4679	r4680
4606	4606
4607	4607	DRIVER_INIT_CALL(model3_15);
4608	4608	/* TODO: network device at 0xC0000000 - FF */
4609		memory_install_readwrite64_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xf9000000, 0xf90000ff, 0, 0, scsi_r, scsi_w );
	4609	memory_install_readwrite64_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xf9000000, 0xf90000ff, 0, 0, scsi_r, scsi_w );
4610	4610
4611	4611	rom[(0x71275c^4)/4] = 0x60000000;
4612	4612	rom[(0x71277c^4)/4] = 0x60000000;
r4679	r4680
4618	4618
4619	4619	DRIVER_INIT_CALL(model3_15);
4620	4620	/* TODO: network device at 0xC0000000 - FF */
4621		memory_install_readwrite64_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xc1000000, 0xc10000ff, 0, 0, scsi_r, scsi_w );
	4621	memory_install_readwrite64_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xc1000000, 0xc10000ff, 0, 0, scsi_r, scsi_w );
4622	4622
4623	4623	rom[(0x713724^4)/4] = 0x60000000;
4624	4624	rom[(0x713744^4)/4] = 0x60000000;
r4679	r4680
4634	4634	UINT32 *rom = (UINT32*)memory_region(machine, "user1");
4635	4635	DRIVER_INIT_CALL(model3_15);
4636	4636
4637		memory_install_readwrite64_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xc1000000, 0xc10000ff, 0, 0, scsi_r, scsi_w );
	4637	memory_install_readwrite64_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xc1000000, 0xc10000ff, 0, 0, scsi_r, scsi_w );
4638	4638
4639	4639	rom[(0x73fe38^4)/4] = 0x38840004;      /* This seems to be an actual bug in the original code */
4640	4640
r4679	r4680
4665	4665	rom[(0x70e710^4)/4] = 0x60000000;
4666	4666
4667	4667	interleave_vroms(machine);
4668		memory_install_read64_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xff000000, 0xff7fffff, 0, 0, SMH_BANK1 );
	4668	memory_install_read64_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xff000000, 0xff7fffff, 0, 0, (read64_space_func)SMH_BANK(1) );
4669	4669
4670		memory_install_readwrite64_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xf9000000, 0xf90000ff, 0, 0, scsi_r, scsi_w );
	4670	memory_install_readwrite64_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xf9000000, 0xf90000ff, 0, 0, scsi_r, scsi_w );
4671	4671
4672		memory_install_readwrite64_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xf0800cf8, 0xf0800cff, 0, 0, mpc106_addr_r, mpc106_addr_w );
4673		memory_install_readwrite64_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xfec00000, 0xfedfffff, 0, 0, mpc106_addr_r, mpc106_addr_w );
4674		memory_install_readwrite64_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xf0c00cf8, 0xf0c00cff, 0, 0, mpc106_data_r, mpc106_data_w );
4675		memory_install_readwrite64_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xfee00000, 0xfeffffff, 0, 0, mpc106_data_r, mpc106_data_w );
4676		memory_install_readwrite64_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xf8fff000, 0xf8fff0ff, 0, 0, mpc106_reg_r, mpc106_reg_w );
	4672	memory_install_readwrite64_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xf0800cf8, 0xf0800cff, 0, 0, mpc106_addr_r, mpc106_addr_w );
	4673	memory_install_readwrite64_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xfec00000, 0xfedfffff, 0, 0, mpc106_addr_r, mpc106_addr_w );
	4674	memory_install_readwrite64_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xf0c00cf8, 0xf0c00cff, 0, 0, mpc106_data_r, mpc106_data_w );
	4675	memory_install_readwrite64_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xfee00000, 0xfeffffff, 0, 0, mpc106_data_r, mpc106_data_w );
	4676	memory_install_readwrite64_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xf8fff000, 0xf8fff0ff, 0, 0, mpc106_reg_r, mpc106_reg_w );
4677	4677	}
4678	4678
4679	4679	static DRIVER_INIT( vs29815 )
r4679	r4680
4684	4684	rom[(0x60290c^4)/4] = 0x60000000;
4685	4685
4686	4686	interleave_vroms(machine);
4687		memory_install_read64_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xff000000, 0xff7fffff, 0, 0, SMH_BANK1 );
	4687	memory_install_read64_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xff000000, 0xff7fffff, 0, 0, (read64_space_func)SMH_BANK(1) );
4688	4688
4689		memory_install_readwrite64_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xf9000000, 0xf90000ff, 0, 0, scsi_r, scsi_w );
	4689	memory_install_readwrite64_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xf9000000, 0xf90000ff, 0, 0, scsi_r, scsi_w );
4690	4690
4691		memory_install_readwrite64_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xf0800cf8, 0xf0800cff, 0, 0, mpc106_addr_r, mpc106_addr_w );
4692		memory_install_readwrite64_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xfec00000, 0xfedfffff, 0, 0, mpc106_addr_r, mpc106_addr_w );
4693		memory_install_readwrite64_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xf0c00cf8, 0xf0c00cff, 0, 0, mpc106_data_r, mpc106_data_w );
4694		memory_install_readwrite64_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xfee00000, 0xfeffffff, 0, 0, mpc106_data_r, mpc106_data_w );
4695		memory_install_readwrite64_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xf8fff000, 0xf8fff0ff, 0, 0, mpc106_reg_r, mpc106_reg_w );
	4691	memory_install_readwrite64_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xf0800cf8, 0xf0800cff, 0, 0, mpc106_addr_r, mpc106_addr_w );
	4692	memory_install_readwrite64_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xfec00000, 0xfedfffff, 0, 0, mpc106_addr_r, mpc106_addr_w );
	4693	memory_install_readwrite64_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xf0c00cf8, 0xf0c00cff, 0, 0, mpc106_data_r, mpc106_data_w );
	4694	memory_install_readwrite64_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xfee00000, 0xfeffffff, 0, 0, mpc106_data_r, mpc106_data_w );
	4695	memory_install_readwrite64_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xf8fff000, 0xf8fff0ff, 0, 0, mpc106_reg_r, mpc106_reg_w );
4696	4696	}
4697	4697
4698	4698	static DRIVER_INIT( bass )
r4679	r4680
4703	4703	rom[(0x7999c8^4)/4] = 0x60000000;
4704	4704
4705	4705	interleave_vroms(machine);
4706		memory_install_read64_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xff000000, 0xff7fffff, 0, 0, SMH_BANK1 );
	4706	memory_install_read64_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xff000000, 0xff7fffff, 0, 0, (read64_space_func)SMH_BANK(1) );
4707	4707
4708		memory_install_readwrite64_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xf9000000, 0xf90000ff, 0, 0, scsi_r, scsi_w );
	4708	memory_install_readwrite64_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xf9000000, 0xf90000ff, 0, 0, scsi_r, scsi_w );
4709	4709
4710		memory_install_readwrite64_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xf0800cf8, 0xf0800cff, 0, 0, mpc106_addr_r, mpc106_addr_w );
4711		memory_install_readwrite64_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xfec00000, 0xfedfffff, 0, 0, mpc106_addr_r, mpc106_addr_w );
4712		memory_install_readwrite64_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xf0c00cf8, 0xf0c00cff, 0, 0, mpc106_data_r, mpc106_data_w );
4713		memory_install_readwrite64_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xfee00000, 0xfeffffff, 0, 0, mpc106_data_r, mpc106_data_w );
4714		memory_install_readwrite64_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xf8fff000, 0xf8fff0ff, 0, 0, mpc106_reg_r, mpc106_reg_w );
	4710	memory_install_readwrite64_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xf0800cf8, 0xf0800cff, 0, 0, mpc106_addr_r, mpc106_addr_w );
	4711	memory_install_readwrite64_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xfec00000, 0xfedfffff, 0, 0, mpc106_addr_r, mpc106_addr_w );
	4712	memory_install_readwrite64_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xf0c00cf8, 0xf0c00cff, 0, 0, mpc106_data_r, mpc106_data_w );
	4713	memory_install_readwrite64_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xfee00000, 0xfeffffff, 0, 0, mpc106_data_r, mpc106_data_w );
	4714	memory_install_readwrite64_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xf8fff000, 0xf8fff0ff, 0, 0, mpc106_reg_r, mpc106_reg_w );
4715	4715	}
4716	4716
4717	4717	static DRIVER_INIT( getbass )
4718	4718	{
4719	4719	interleave_vroms(machine);
4720		memory_install_read64_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xff000000, 0xff7fffff, 0, 0, SMH_BANK1 );
	4720	memory_install_read64_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xff000000, 0xff7fffff, 0, 0, (read64_space_func)SMH_BANK(1) );
4721	4721
4722		memory_install_readwrite64_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xf9000000, 0xf90000ff, 0, 0, scsi_r, scsi_w );
	4722	memory_install_readwrite64_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xf9000000, 0xf90000ff, 0, 0, scsi_r, scsi_w );
4723	4723
4724		memory_install_readwrite64_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xf0800cf8, 0xf0800cff, 0, 0, mpc105_addr_r, mpc105_addr_w );
4725		memory_install_readwrite64_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xf0c00cf8, 0xf0c00cff, 0, 0, mpc105_data_r, mpc105_data_w );
4726		memory_install_readwrite64_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xf8fff000, 0xf8fff0ff, 0, 0, mpc105_reg_r, mpc105_reg_w );
	4724	memory_install_readwrite64_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xf0800cf8, 0xf0800cff, 0, 0, mpc105_addr_r, mpc105_addr_w );
	4725	memory_install_readwrite64_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xf0c00cf8, 0xf0c00cff, 0, 0, mpc105_data_r, mpc105_data_w );
	4726	memory_install_readwrite64_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xf8fff000, 0xf8fff0ff, 0, 0, mpc105_reg_r, mpc105_reg_w );
4727	4727	}
4728	4728
4729	4729	static DRIVER_INIT( vs2 )
r4679	r4680
4772	4772	UINT32 *rom = (UINT32*)memory_region(machine, "user1");
4773	4773	DRIVER_INIT_CALL(model3_20);
4774	4774
4775		memory_install_readwrite64_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xc0000000, 0xc00fffff, 0, 0, network_r, network_w );
	4775	memory_install_readwrite64_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xc0000000, 0xc00fffff, 0, 0, network_r, network_w );
4776	4776
4777	4777	rom[(0x50e8d4^4)/4] = 0x60000000;
4778	4778	rom[(0x50e8f4^4)/4] = 0x60000000;
r4679	r4680
4840	4840	UINT32 *rom = (UINT32*)memory_region(machine, "user1");
4841	4841	DRIVER_INIT_CALL(model3_20);
4842	4842
4843		memory_install_write64_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xc3800000, 0xc3800007, 0, 0, daytona2_rombank_w );
	4843	memory_install_write64_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xc3800000, 0xc3800007, 0, 0, daytona2_rombank_w );
4844	4844
4845	4845	//rom[(0x68468c^4)/4] = 0x60000000;
4846	4846	rom[(0x6063c4^4)/4] = 0x60000000;
r4679	r4680
4853	4853	UINT32 *rom = (UINT32*)memory_region(machine, "user1");
4854	4854	DRIVER_INIT_CALL(model3_20);
4855	4855
4856		memory_install_write64_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xc3800000, 0xc3800007, 0, 0, daytona2_rombank_w );
	4856	memory_install_write64_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xc3800000, 0xc3800007, 0, 0, daytona2_rombank_w );
4857	4857
4858	4858	rom[(0x606784^4)/4] = 0x60000000;
4859	4859	rom[(0x69a3fc^4)/4] = 0x60000000;      // jump to encrypted code

src/mame/drivers/namcos21.c

r4679	r4680
331	331
332	332
333	333	#define DSP_BUF_MAX (4096*12)
334		static struct
	334	typedef struct _dsp_state dsp_state;
	335	struct _dsp_state
335	336	{
336	337	unsigned masterSourceAddr;
337	338	UINT16 slaveInputBuffer[DSP_BUF_MAX];
r4679	r4680
344	345	unsigned masterDirectDrawSize;
345	346	int masterFinished;
346	347	int slaveActive;
347		} *mpDspState;
	348	};
	349	static dsp_state *mpDspState;
348	350
349	351	static INT32
350	352	ReadPointROMData( running_machine *machine, unsigned offset )
r4679	r4680
632	634	pMem[0x8000] = 0xFF80;
633	635	pMem[0x8001] = 0x0000;
634	636
635		mpDspState = auto_malloc( sizeof(*mpDspState) );
636		memset( mpDspState, 0, sizeof(*mpDspState) );
	637	mpDspState = auto_alloc_clear(machine, dsp_state);
637	638
638	639	return 0;
639	640	}
r4679	r4680
798	799	}
799	800
800	801	static ADDRESS_MAP_START( master_dsp_program, ADDRESS_SPACE_PROGRAM, 16 )
801		AM_RANGE(0x0000, 0x0fff) AM_READ(SMH_ROM) /* BIOS */
802		AM_RANGE(0x8000, 0xbfff) AM_READ(SMH_RAM) AM_WRITE(SMH_RAM) AM_BASE(&master_dsp_code)
	802	AM_RANGE(0x0000, 0x0fff) AM_ROM /* BIOS */
	803	AM_RANGE(0x8000, 0xbfff) AM_RAM AM_BASE(&master_dsp_code)
803	804	ADDRESS_MAP_END
804	805
805	806	static ADDRESS_MAP_START( master_dsp_data, ADDRESS_SPACE_DATA, 16 )
806		AM_RANGE(0x2000, 0x200f) AM_READ(dspcuskey_r) AM_WRITE(dspcuskey_w)
807		AM_RANGE(0x8000, 0xffff) AM_READ(dspram16_r) AM_WRITE(dspram16_w) /* 0x8000 words */
	807	AM_RANGE(0x2000, 0x200f) AM_READWRITE(dspcuskey_r,dspcuskey_w)
	808	AM_RANGE(0x8000, 0xffff) AM_READWRITE(dspram16_r,dspram16_w) /* 0x8000 words */
808	809	ADDRESS_MAP_END
809	810
810	811	static ADDRESS_MAP_START( master_dsp_io, ADDRESS_SPACE_IO, 16 )
811		AM_RANGE(0x00,0x00) AM_READ(dsp_port0_r) AM_WRITE(dsp_port0_w)
812		AM_RANGE(0x01,0x01 )AM_READ(dsp_port1_r) AM_WRITE(dsp_port1_w)
813		AM_RANGE(0x02,0x02) AM_READ(dsp_port2_r) AM_WRITE(dsp_port2_w)
814		AM_RANGE(0x03,0x03) AM_READ(dsp_port3_idc_rcv_enable_r) AM_WRITE(dsp_port3_w)
	812	AM_RANGE(0x00,0x00) AM_READWRITE(dsp_port0_r,dsp_port0_w)
	813	AM_RANGE(0x01,0x01) AM_READWRITE(dsp_port1_r,dsp_port1_w)
	814	AM_RANGE(0x02,0x02) AM_READWRITE(dsp_port2_r,dsp_port2_w)
	815	AM_RANGE(0x03,0x03) AM_READWRITE(dsp_port3_idc_rcv_enable_r,dsp_port3_w)
815	816	AM_RANGE(0x04,0x04) AM_WRITE(dsp_port4_w)
816		AM_RANGE(0x08,0x08) AM_READ(dsp_port8_r) AM_WRITE(dsp_port8_w)
	817	AM_RANGE(0x08,0x08) AM_READWRITE(dsp_port8_r,dsp_port8_w)
817	818	AM_RANGE(0x09,0x09) AM_READ(dsp_port9_r)
818		AM_RANGE(0x0a,0x0a) AM_READ(dsp_porta_r) AM_WRITE(dsp_porta_w)
819		AM_RANGE(0x0b,0x0b) AM_READ(dsp_portb_r) AM_WRITE(dsp_portb_w)
	819	AM_RANGE(0x0a,0x0a) AM_READWRITE(dsp_porta_r,dsp_porta_w)
	820	AM_RANGE(0x0b,0x0b) AM_READWRITE(dsp_portb_r,dsp_portb_w)
820	821	AM_RANGE(0x0c,0x0c) AM_WRITE(dsp_portc_w)
821	822	AM_RANGE(0x0f,0x0f) AM_READ(dsp_portf_r)
822		AM_RANGE(TMS32025_HOLD,  TMS32025_HOLD)  AM_READ( SMH_NOP )
823		AM_RANGE(TMS32025_HOLDA, TMS32025_HOLDA) AM_WRITE( SMH_NOP )
	823	AM_RANGE(TMS32025_HOLD,  TMS32025_HOLD)  AM_READNOP
	824	AM_RANGE(TMS32025_HOLDA, TMS32025_HOLDA) AM_WRITENOP
824	825	AM_RANGE(TMS32025_XF,    TMS32025_XF)    AM_WRITE( dsp_xf_w )
825	826	ADDRESS_MAP_END
826	827
r4679	r4680
927	928	}
928	929
929	930	static ADDRESS_MAP_START( slave_dsp_program, ADDRESS_SPACE_PROGRAM, 16 )
930		AM_RANGE(0x0000, 0x0fff) AM_READ(SMH_ROM) /* BIOS */
931		AM_RANGE(0x8000, 0x8fff) AM_READ(SMH_RAM) AM_WRITE(SMH_RAM)
	931	AM_RANGE(0x0000, 0x0fff) AM_ROM /* BIOS */
	932	AM_RANGE(0x8000, 0x8fff) AM_RAM
932	933	ADDRESS_MAP_END
933	934
934	935	static ADDRESS_MAP_START( slave_dsp_data, ADDRESS_SPACE_DATA, 16 )
r4679	r4680
936	937	ADDRESS_MAP_END
937	938
938	939	static ADDRESS_MAP_START( slave_dsp_io, ADDRESS_SPACE_IO, 16 )
939		AM_RANGE(0x00,0x00) AM_READ(slave_port0_r) AM_WRITE(slave_port0_w)
	940	AM_RANGE(0x00,0x00) AM_READWRITE(slave_port0_r,slave_port0_w)
940	941	AM_RANGE(0x02,0x02) AM_READ(slave_port2_r)
941		AM_RANGE(0x03,0x03) AM_READ(slave_port3_r) AM_WRITE(slave_port3_w)
	942	AM_RANGE(0x03,0x03) AM_READWRITE(slave_port3_r,slave_port3_w)
942	943	AM_RANGE(0x0f,0x0f) AM_READ(slave_portf_r)
943	944	AM_RANGE(TMS32025_HOLD,  TMS32025_HOLD)  AM_READNOP
944	945	AM_RANGE(TMS32025_HOLDA, TMS32025_HOLDA) AM_WRITENOP
r4679	r4680
1105	1106	/*************************************************************/
1106	1107	/* MASTER 68000 CPU Memory declarations                      */
1107	1108	/*************************************************************/
	1109
	1110	#define NAMCO21_68K_COMMON \
	1111	AM_RANGE(0x200000, 0x20ffff) AM_READWRITE(dspram16_r,dspram16_w) AM_BASE(&namcos21_dspram16) \
	1112	AM_RANGE(0x280000, 0x280001) AM_WRITENOP /* written once on startup */ \
	1113	AM_RANGE(0x400000, 0x400001) AM_WRITE(pointram_control_w) \
	1114	AM_RANGE(0x440000, 0x440001) AM_READWRITE(pointram_data_r,pointram_data_w) \
	1115	AM_RANGE(0x440002, 0x47ffff) AM_WRITENOP /* (?) Air Combat */ \
	1116	AM_RANGE(0x480000, 0x4807ff) AM_READWRITE(namcos21_depthcue_r,namcos21_depthcue_w) /* Air Combat */ \
	1117	AM_RANGE(0x700000, 0x71ffff) AM_READWRITE(namco_obj16_r,namco_obj16_w) \
	1118	AM_RANGE(0x720000, 0x720007) AM_READWRITE(namco_spritepos16_r,namco_spritepos16_w) \
	1119	AM_RANGE(0x740000, 0x75ffff) AM_READWRITE(paletteram16_r,paletteram16_w) AM_BASE(&paletteram16) \
	1120	AM_RANGE(0x760000, 0x760001) AM_READWRITE(namcos21_video_enable_r,namcos21_video_enable_w) \
	1121	AM_RANGE(0x800000, 0x8fffff) AM_READ(datarom_r) \
	1122	AM_RANGE(0x900000, 0x90ffff) AM_READWRITE(shareram1_r,shareram1_w) AM_BASE(&mpSharedRAM1) \
	1123	AM_RANGE(0xa00000, 0xa00fff) AM_READWRITE(namcos2_68k_dualportram_word_r,namcos2_68k_dualportram_word_w) \
	1124	AM_RANGE(0xb00000, 0xb03fff) AM_READWRITE(NAMCO_C139_SCI_buffer_r,NAMCO_C139_SCI_buffer_w) \
	1125	AM_RANGE(0xb80000, 0xb8000f) AM_READWRITE(NAMCO_C139_SCI_register_r,NAMCO_C139_SCI_register_w) \
	1126	AM_RANGE(0xc00000, 0xcfffff) AM_READ(data2_r) /* Cyber Sled */ \
	1127	AM_RANGE(0xd00000, 0xdfffff) AM_READ(data2_r) \
	1128
1108	1129	static ADDRESS_MAP_START( namcos21_68k_master, ADDRESS_SPACE_PROGRAM, 16 )
1109		AM_RANGE(0x000000, 0x0fffff) AM_READ(SMH_ROM) AM_WRITE(SMH_ROM)
1110		AM_RANGE(0x100000, 0x10ffff) AM_READ(SMH_RAM) AM_WRITE(SMH_RAM) /* private work RAM */
1111		AM_RANGE(0x180000, 0x183fff) AM_READ(NAMCOS2_68K_eeprom_R) AM_WRITE(NAMCOS2_68K_eeprom_W)// AM_BASE(&namcos2_eeprom) AM_SIZE(&namcos2_eeprom_size)
1112		AM_RANGE(0x1c0000, 0x1fffff) AM_READ(namcos2_68k_master_C148_r) AM_WRITE(namcos2_68k_master_C148_w)
	1130	AM_RANGE(0x000000, 0x0fffff) AM_ROM
	1131	AM_RANGE(0x100000, 0x10ffff) AM_RAM /* private work RAM */
	1132	AM_RANGE(0x180000, 0x183fff) AM_READWRITE(NAMCOS2_68K_eeprom_R,NAMCOS2_68K_eeprom_W)// AM_BASE(&namcos2_eeprom) AM_SIZE(&namcos2_eeprom_size)
	1133	AM_RANGE(0x1c0000, 0x1fffff) AM_READWRITE(namcos2_68k_master_C148_r,namcos2_68k_master_C148_w)
	1134	NAMCO21_68K_COMMON
1113	1135	ADDRESS_MAP_END
1114	1136
1115	1137	static ADDRESS_MAP_START( namcos21_68k_slave, ADDRESS_SPACE_PROGRAM, 16 )
1116		AM_RANGE(0x000000, 0x07ffff) AM_READ(SMH_ROM) AM_WRITE(SMH_ROM)
1117		AM_RANGE(0x100000, 0x13ffff) AM_READ(SMH_RAM) AM_WRITE(SMH_RAM) /* private work RAM */
1118		AM_RANGE(0x1c0000, 0x1fffff) AM_READ(namcos2_68k_slave_C148_r) AM_WRITE(namcos2_68k_slave_C148_w)
	1138	AM_RANGE(0x000000, 0x07ffff) AM_ROM
	1139	AM_RANGE(0x100000, 0x13ffff) AM_RAM /* private work RAM */
	1140	AM_RANGE(0x1c0000, 0x1fffff) AM_READWRITE(namcos2_68k_slave_C148_r,namcos2_68k_slave_C148_w)
	1141	NAMCO21_68K_COMMON
1119	1142	ADDRESS_MAP_END
1120	1143
1121		static ADDRESS_MAP_START( namcos21_68k_common, ADDRESS_SPACE_PROGRAM, 16 )
1122		AM_RANGE(0x200000, 0x20ffff) AM_READ(dspram16_r) AM_WRITE(dspram16_w) AM_BASE(&namcos21_dspram16)
1123		AM_RANGE(0x280000, 0x280001) AM_WRITENOP /* written once on startup */
1124		AM_RANGE(0x400000, 0x400001) AM_WRITE(pointram_control_w)
1125		AM_RANGE(0x440000, 0x440001) AM_READ(pointram_data_r) AM_WRITE(pointram_data_w)
1126		AM_RANGE(0x440002, 0x47ffff) AM_WRITENOP /* (?) Air Combat */
1127		AM_RANGE(0x480000, 0x4807ff) AM_WRITE(namcos21_depthcue_w) AM_READ(namcos21_depthcue_r) /* Air Combat */
1128		AM_RANGE(0x700000, 0x71ffff) AM_READ(namco_obj16_r) AM_WRITE(namco_obj16_w)
1129		AM_RANGE(0x720000, 0x720007) AM_READ(namco_spritepos16_r) AM_WRITE(namco_spritepos16_w)
1130		AM_RANGE(0x740000, 0x75ffff) AM_READ(paletteram16_r ) AM_WRITE(paletteram16_w) AM_BASE(&paletteram16)
1131		AM_RANGE(0x760000, 0x760001) AM_READ(namcos21_video_enable_r) AM_WRITE(namcos21_video_enable_w)
1132		AM_RANGE(0x800000, 0x8fffff) AM_READ(datarom_r)
1133		AM_RANGE(0x900000, 0x90ffff) AM_READ(shareram1_r) AM_WRITE(shareram1_w) AM_BASE(&mpSharedRAM1)
1134		AM_RANGE(0xa00000, 0xa00fff) AM_READ(namcos2_68k_dualportram_word_r) AM_WRITE(namcos2_68k_dualportram_word_w)
1135		AM_RANGE(0xb00000, 0xb03fff) AM_READ(NAMCO_C139_SCI_buffer_r) AM_WRITE(NAMCO_C139_SCI_buffer_w)
1136		AM_RANGE(0xb80000, 0xb8000f) AM_READ(NAMCO_C139_SCI_register_r) AM_WRITE(NAMCO_C139_SCI_register_w)
1137		AM_RANGE(0xc00000, 0xcfffff) AM_READ(data2_r) /* Cyber Sled */
1138		AM_RANGE(0xd00000, 0xdfffff) AM_READ(data2_r)
1139		ADDRESS_MAP_END
1140	1144
1141	1145	/*************************************************************
1142	1146	* Winning Run is prototype "System21" hardware.
r4679	r4680
1276	1280	}
1277	1281
1278	1282	static ADDRESS_MAP_START( winrun_dsp_program, ADDRESS_SPACE_PROGRAM, 16 )
1279		AM_RANGE(0x0000, 0x0fff) AM_READ(SMH_ROM)
	1283	AM_RANGE(0x0000, 0x0fff) AM_ROM
1280	1284	ADDRESS_MAP_END
1281	1285
1282	1286	static ADDRESS_MAP_START( winrun_dsp_data, ADDRESS_SPACE_DATA, 16 )
1283		AM_RANGE( 0x2000, 0x200f ) AM_READ(winrun_cuskey_r) AM_WRITE(winrun_cuskey_w)
1284		AM_RANGE( 0x4000, 0x4fff ) AM_READ(winrun_dspcomram_r) AM_WRITE(winrun_dspcomram_w)
	1287	AM_RANGE( 0x2000, 0x200f ) AM_READWRITE(winrun_cuskey_r,winrun_cuskey_w)
	1288	AM_RANGE( 0x4000, 0x4fff ) AM_READWRITE(winrun_dspcomram_r,winrun_dspcomram_w)
1285	1289	AM_RANGE( 0x8000, 0xffff ) AM_READ(winrun_table_r )
1286	1290	ADDRESS_MAP_END
1287	1291
1288	1292	static ADDRESS_MAP_START( winrun_dsp_io, ADDRESS_SPACE_IO, 16 )
1289		AM_RANGE(0x08,0x09) AM_WRITE(winrun_dsp_pointrom_addr_w) AM_READ(winrun_dsp_pointrom_data_r)
	1293	AM_RANGE(0x08,0x09) AM_READWRITE(winrun_dsp_pointrom_data_r,winrun_dsp_pointrom_addr_w)
1290	1294	AM_RANGE(0x0a,0x0a) AM_WRITE(winrun_dsp_render_w)
1291	1295	AM_RANGE(0x0b,0x0b) AM_WRITENOP
1292	1296	AM_RANGE(0x0c,0x0c) AM_WRITE(winrun_dsp_complete_w)
1293	1297	AM_RANGE(TMS32025_BIO,   TMS32025_BIO)   AM_READ( winrun_poly_reset_r )
1294		AM_RANGE(TMS32025_HOLD,  TMS32025_HOLD)  AM_READ( SMH_NOP )
1295		AM_RANGE(TMS32025_HOLDA, TMS32025_HOLDA) AM_WRITE( SMH_NOP )
1296		AM_RANGE(TMS32025_XF,    TMS32025_XF)    AM_WRITE( SMH_NOP )
	1298	AM_RANGE(TMS32025_HOLD,  TMS32025_HOLD)  AM_READNOP
	1299	AM_RANGE(TMS32025_HOLDA, TMS32025_HOLDA) AM_WRITENOP
	1300	AM_RANGE(TMS32025_XF,    TMS32025_XF)    AM_WRITENOP
1297	1301	ADDRESS_MAP_END
1298	1302
1299	1303	static READ16_HANDLER( gpu_data_r )
r4679	r4680
1352	1356	}
1353	1357
1354	1358	static ADDRESS_MAP_START( am_master_winrun, ADDRESS_SPACE_PROGRAM, 16 )
1355		AM_RANGE(0x000000, 0x03ffff) AM_READ(SMH_ROM) AM_WRITE(SMH_ROM)
1356		AM_RANGE(0x100000, 0x10ffff) AM_READ(SMH_RAM) AM_WRITE(SMH_RAM) /* work RAM */
1357		AM_RANGE(0x180000, 0x183fff) AM_READ(NAMCOS2_68K_eeprom_R) AM_WRITE(NAMCOS2_68K_eeprom_W)// AM_BASE(&namcos2_eeprom) AM_SIZE(&namcos2_eeprom_size)
1358		AM_RANGE(0x1c0000, 0x1fffff) AM_READ(namcos2_68k_master_C148_r) AM_WRITE(namcos2_68k_master_C148_w)
1359		AM_RANGE(0x250000, 0x25ffff) AM_READ(SMH_RAM) AM_WRITE(SMH_RAM) AM_BASE( &winrun_polydata )
1360		AM_RANGE(0x260000, 0x26ffff) AM_READ(SMH_RAM) AM_WRITE(SMH_RAM) /* unused? */
	1359	AM_RANGE(0x000000, 0x03ffff) AM_ROM
	1360	AM_RANGE(0x100000, 0x10ffff) AM_RAM /* work RAM */
	1361	AM_RANGE(0x180000, 0x183fff) AM_READWRITE(NAMCOS2_68K_eeprom_R,NAMCOS2_68K_eeprom_W)// AM_BASE(&namcos2_eeprom) AM_SIZE(&namcos2_eeprom_size)
	1362	AM_RANGE(0x1c0000, 0x1fffff) AM_READWRITE(namcos2_68k_master_C148_r,namcos2_68k_master_C148_w)
	1363	AM_RANGE(0x250000, 0x25ffff) AM_RAM AM_BASE( &winrun_polydata )
	1364	AM_RANGE(0x260000, 0x26ffff) AM_RAM /* unused? */
1361	1365	AM_RANGE(0x280000, 0x281fff) AM_WRITE(winrun_dspbios_w) AM_BASE(&winrun_dspbios)
1362		AM_RANGE(0x380000, 0x38000f) AM_READ(winrun_dspcomram_control_r) AM_WRITE(winrun_dspcomram_control_w)
1363		AM_RANGE(0x3c0000, 0x3c1fff) AM_READ(winrun_68k_dspcomram_r) AM_WRITE(winrun_68k_dspcomram_w)
	1366	AM_RANGE(0x380000, 0x38000f) AM_READWRITE(winrun_dspcomram_control_r,winrun_dspcomram_control_w)
	1367	AM_RANGE(0x3c0000, 0x3c1fff) AM_READWRITE(winrun_68k_dspcomram_r,winrun_68k_dspcomram_w)
1364	1368	AM_RANGE(0x400000, 0x400001) AM_WRITE(pointram_control_w)
1365		AM_RANGE(0x440000, 0x440001) AM_READ(pointram_data_r) AM_WRITE(pointram_data_w)
1366		AM_RANGE(0x600000, 0x60ffff) AM_READ(winrun_gpucomram_r) AM_WRITE(winrun_gpucomram_w)
	1369	AM_RANGE(0x440000, 0x440001) AM_READWRITE(pointram_data_r,pointram_data_w)
	1370	AM_RANGE(0x600000, 0x60ffff) AM_READWRITE(winrun_gpucomram_r,winrun_gpucomram_w)
1367	1371	AM_RANGE(0x800000, 0x87ffff) AM_READ(datarom_r)
1368		AM_RANGE(0x900000, 0x90ffff) AM_READ(shareram1_r) AM_WRITE(shareram1_w) AM_BASE(&mpSharedRAM1)
1369		AM_RANGE(0xa00000, 0xa00fff) AM_READ(namcos2_68k_dualportram_word_r) AM_WRITE(namcos2_68k_dualportram_word_w)
1370		AM_RANGE(0xb00000, 0xb03fff) AM_READ(NAMCO_C139_SCI_buffer_r) AM_WRITE(NAMCO_C139_SCI_buffer_w)
1371		AM_RANGE(0xb80000, 0xb8000f) AM_READ(NAMCO_C139_SCI_register_r) AM_WRITE(NAMCO_C139_SCI_register_w)
	1372	AM_RANGE(0x900000, 0x90ffff) AM_READWRITE(shareram1_r,shareram1_w) AM_BASE(&mpSharedRAM1)
	1373	AM_RANGE(0xa00000, 0xa00fff) AM_READWRITE(namcos2_68k_dualportram_word_r,namcos2_68k_dualportram_word_w)
	1374	AM_RANGE(0xb00000, 0xb03fff) AM_READWRITE(NAMCO_C139_SCI_buffer_r,NAMCO_C139_SCI_buffer_w)
	1375	AM_RANGE(0xb80000, 0xb8000f) AM_READWRITE(NAMCO_C139_SCI_register_r,NAMCO_C139_SCI_register_w)
1372	1376	ADDRESS_MAP_END
1373	1377
1374	1378	static ADDRESS_MAP_START( am_slave_winrun, ADDRESS_SPACE_PROGRAM, 16 )
1375		AM_RANGE(0x000000, 0x03ffff) AM_READ(SMH_ROM) AM_WRITE(SMH_ROM)
1376		AM_RANGE(0x100000, 0x13ffff) AM_READ(SMH_RAM) AM_WRITE(SMH_RAM)
1377		AM_RANGE(0x1c0000, 0x1fffff) AM_READ(namcos2_68k_slave_C148_r) AM_WRITE(namcos2_68k_slave_C148_w)
1378		AM_RANGE(0x600000, 0x60ffff) AM_READ(winrun_gpucomram_r) AM_WRITE(winrun_gpucomram_w)
	1379	AM_RANGE(0x000000, 0x03ffff) AM_ROM
	1380	AM_RANGE(0x100000, 0x13ffff) AM_RAM
	1381	AM_RANGE(0x1c0000, 0x1fffff) AM_READWRITE(namcos2_68k_slave_C148_r,namcos2_68k_slave_C148_w)
	1382	AM_RANGE(0x600000, 0x60ffff) AM_READWRITE(winrun_gpucomram_r,winrun_gpucomram_w)
1379	1383	AM_RANGE(0x800000, 0x87ffff) AM_READ(datarom_r)
1380		AM_RANGE(0x900000, 0x90ffff) AM_READ(shareram1_r) AM_WRITE(shareram1_w)
1381		AM_RANGE(0xa00000, 0xa00fff) AM_READ(namcos2_68k_dualportram_word_r) AM_WRITE(namcos2_68k_dualportram_word_w)
1382		AM_RANGE(0xb00000, 0xb03fff) AM_READ(NAMCO_C139_SCI_buffer_r) AM_WRITE(NAMCO_C139_SCI_buffer_w)
1383		AM_RANGE(0xb80000, 0xb8000f) AM_READ(NAMCO_C139_SCI_register_r) AM_WRITE(NAMCO_C139_SCI_register_w)
	1384	AM_RANGE(0x900000, 0x90ffff) AM_READWRITE(shareram1_r,shareram1_w)
	1385	AM_RANGE(0xa00000, 0xa00fff) AM_READWRITE(namcos2_68k_dualportram_word_r,namcos2_68k_dualportram_word_w)
	1386	AM_RANGE(0xb00000, 0xb03fff) AM_READWRITE(NAMCO_C139_SCI_buffer_r,NAMCO_C139_SCI_buffer_w)
	1387	AM_RANGE(0xb80000, 0xb8000f) AM_READWRITE(NAMCO_C139_SCI_register_r,NAMCO_C139_SCI_register_w)
1384	1388	ADDRESS_MAP_END
1385	1389
1386	1390	static ADDRESS_MAP_START( am_gpu_winrun, ADDRESS_SPACE_PROGRAM, 16 )
1387		AM_RANGE(0x000000, 0x07ffff) AM_READ(SMH_ROM) AM_WRITE(SMH_ROM)
1388		AM_RANGE(0x100000, 0x100001) AM_READ(winrun_gpu_color_r) AM_WRITE(winrun_gpu_color_w) /* ? */
1389		AM_RANGE(0x180000, 0x19ffff) AM_READ(SMH_RAM) AM_WRITE(SMH_RAM) /* work RAM */
1390		AM_RANGE(0x1c0000, 0x1fffff) AM_READ(namcos2_68k_gpu_C148_r) AM_WRITE(namcos2_68k_gpu_C148_w)
1391		AM_RANGE(0x200000, 0x20ffff) AM_READ(SMH_RAM) AM_WRITE(SMH_RAM) AM_BASE( &winrun_gpucomram )
1392		AM_RANGE(0x400000, 0x41ffff) AM_READ(paletteram16_r) AM_WRITE(paletteram16_w) AM_BASE( &paletteram16 )
	1391	AM_RANGE(0x000000, 0x07ffff) AM_ROM
	1392	AM_RANGE(0x100000, 0x100001) AM_READWRITE(winrun_gpu_color_r,winrun_gpu_color_w) /* ? */
	1393	AM_RANGE(0x180000, 0x19ffff) AM_RAM /* work RAM */
	1394	AM_RANGE(0x1c0000, 0x1fffff) AM_READWRITE(namcos2_68k_gpu_C148_r,namcos2_68k_gpu_C148_w)
	1395	AM_RANGE(0x200000, 0x20ffff) AM_RAM AM_BASE( &winrun_gpucomram )
	1396	AM_RANGE(0x400000, 0x41ffff) AM_READWRITE(paletteram16_r,paletteram16_w) AM_BASE( &paletteram16 )
1393	1397	AM_RANGE(0x600000, 0x6fffff) AM_READ(gpu_data_r)
1394		AM_RANGE(0xc00000, 0xcfffff) AM_READ(winrun_gpu_videoram_r) AM_WRITE(winrun_gpu_videoram_w)
1395		AM_RANGE(0xd00000, 0xd0000f) AM_READ(winrun_gpu_register_r) AM_WRITE(winrun_gpu_register_w)
	1398	AM_RANGE(0xc00000, 0xcfffff) AM_READWRITE(winrun_gpu_videoram_r,winrun_gpu_videoram_w)
	1399	AM_RANGE(0xd00000, 0xd0000f) AM_READWRITE(winrun_gpu_register_r,winrun_gpu_register_w)
1396	1400	//  AM_RANGE(0xe0000c, 0xe0000d) POSIRQ
1397	1401	ADDRESS_MAP_END
1398	1402
	1403
1399	1404	/*************************************************************/
1400	1405	/* SOUND 6809 CPU Memory declarations                        */
1401	1406	/*************************************************************/
1402	1407
1403		static ADDRESS_MAP_START( readmem_sound, ADDRESS_SPACE_PROGRAM, 8 )
1404		AM_RANGE(0x0000, 0x3fff) AM_READ(BANKED_SOUND_ROM_R) /* banked */
1405		AM_RANGE(0x4000, 0x4001) AM_DEVREAD("ym", ym2151_r)
1406		AM_RANGE(0x5000, 0x6fff) AM_DEVREAD("c140", c140_r)
1407		AM_RANGE(0x7000, 0x77ff) AM_READ(namcos2_dualportram_byte_r)
1408		AM_RANGE(0x7800, 0x7fff) AM_READ(namcos2_dualportram_byte_r)   /* mirror */
1409		AM_RANGE(0x8000, 0x9fff) AM_READ(SMH_RAM)
1410		AM_RANGE(0xd000, 0xffff) AM_READ(SMH_ROM)
1411		ADDRESS_MAP_END
1412
1413		static ADDRESS_MAP_START( writemem_sound, ADDRESS_SPACE_PROGRAM, 8 )
	1408	static ADDRESS_MAP_START( am_sound_winrun, ADDRESS_SPACE_PROGRAM, 8 )
	1409	AM_RANGE(0x0000, 0x3fff) AM_ROMBANK(6) /* banked */
1414	1410	AM_RANGE(0x3000, 0x3003) AM_WRITENOP /* ? */
1415		AM_RANGE(0x0000, 0x3fff) AM_WRITE(SMH_ROM)
1416		AM_RANGE(0x4000, 0x4001) AM_DEVWRITE("ym", ym2151_w)
1417		AM_RANGE(0x5000, 0x6fff) AM_DEVWRITE("c140", c140_w)
1418		AM_RANGE(0x7000, 0x77ff) AM_WRITE(namcos2_dualportram_byte_w) AM_BASE(&mpDualPortRAM)
1419		AM_RANGE(0x7800, 0x7fff) AM_WRITE(namcos2_dualportram_byte_w) /* mirror */
1420		AM_RANGE(0x8000, 0x9fff) AM_WRITE(SMH_RAM)
	1411	AM_RANGE(0x4000, 0x4001) AM_DEVREADWRITE("ym", ym2151_r,ym2151_w)
	1412	AM_RANGE(0x5000, 0x6fff) AM_DEVREADWRITE("c140", c140_r,c140_w)
	1413	AM_RANGE(0x7000, 0x77ff) AM_READWRITE(namcos2_dualportram_byte_r,namcos2_dualportram_byte_w) AM_BASE(&mpDualPortRAM)
	1414	AM_RANGE(0x7800, 0x7fff) AM_READWRITE(namcos2_dualportram_byte_r,namcos2_dualportram_byte_w) /* mirror */
	1415	AM_RANGE(0x8000, 0x9fff) AM_RAM
1421	1416	AM_RANGE(0xa000, 0xbfff) AM_WRITENOP /* amplifier enable on 1st write */
1422	1417	AM_RANGE(0xc000, 0xc001) AM_WRITE(namcos2_sound_bankselect_w)
1423	1418	AM_RANGE(0xd001, 0xd001) AM_WRITENOP /* watchdog */
	1419	AM_RANGE(0xd000, 0xffff) AM_ROM
1424	1420	AM_RANGE(0xc000, 0xffff) AM_WRITENOP /* avoid debug log noise; games write frequently to 0xe000 */
1425	1421	ADDRESS_MAP_END
1426	1422
	1423
1427	1424	/*************************************************************/
1428	1425	/* I/O HD63705 MCU Memory declarations                       */
1429	1426	/*************************************************************/
1430	1427
1431		static ADDRESS_MAP_START( readmem_mcu, ADDRESS_SPACE_PROGRAM, 8 )
	1428	static ADDRESS_MAP_START( am_mcu_winrun, ADDRESS_SPACE_PROGRAM, 8 )
1432	1429	AM_RANGE(0x0000, 0x0000) AM_READNOP
1433	1430	AM_RANGE(0x0001, 0x0001) AM_READ_PORT("PORTB")         /* p1,p2 start */
1434	1431	AM_RANGE(0x0002, 0x0002) AM_READ_PORT("PORTC")         /* coins */
1435		AM_RANGE(0x0003, 0x0003) AM_READ(namcos2_mcu_port_d_r)
	1432	AM_RANGE(0x0003, 0x0003) AM_READWRITE(namcos2_mcu_port_d_r,namcos2_mcu_port_d_w)
1436	1433	AM_RANGE(0x0007, 0x0007) AM_READ_PORT("PORTH")         /* fire buttons */
1437		AM_RANGE(0x0010, 0x0010) AM_READ(namcos2_mcu_analog_ctrl_r)
1438		AM_RANGE(0x0011, 0x0011) AM_READ(namcos2_mcu_analog_port_r)
1439		AM_RANGE(0x0008, 0x003f) AM_READ(SMH_RAM)
1440		AM_RANGE(0x0040, 0x01bf) AM_READ(SMH_RAM)
1441		AM_RANGE(0x01c0, 0x1fff) AM_READ(SMH_ROM)
	1434	AM_RANGE(0x0010, 0x0010) AM_READWRITE(namcos2_mcu_analog_ctrl_r,namcos2_mcu_analog_ctrl_w)
	1435	AM_RANGE(0x0011, 0x0011) AM_READWRITE(namcos2_mcu_analog_port_r,namcos2_mcu_analog_port_w)
	1436	AM_RANGE(0x0000, 0x003f) AM_RAM
	1437	AM_RANGE(0x0040, 0x01bf) AM_RAM
	1438	AM_RANGE(0x01c0, 0x1fff) AM_ROM
1442	1439	AM_RANGE(0x2000, 0x2000) AM_READ_PORT("DSW")
1443	1440	AM_RANGE(0x3000, 0x3000) AM_READ_PORT("DIAL0")
1444	1441	AM_RANGE(0x3001, 0x3001) AM_READ_PORT("DIAL1")
1445	1442	AM_RANGE(0x3002, 0x3002) AM_READ_PORT("DIAL2")
1446	1443	AM_RANGE(0x3003, 0x3003) AM_READ_PORT("DIAL3")
1447		AM_RANGE(0x5000, 0x57ff) AM_READ(namcos2_dualportram_byte_r)
	1444	AM_RANGE(0x5000, 0x57ff) AM_READWRITE(namcos2_dualportram_byte_r,namcos2_dualportram_byte_w) AM_BASE(&mpDualPortRAM)
1448	1445	AM_RANGE(0x6000, 0x6fff) AM_READNOP            /* watchdog */
1449		AM_RANGE(0x8000, 0xffff) AM_READ(SMH_ROM)
	1446	AM_RANGE(0x8000, 0xffff) AM_ROM
1450	1447	ADDRESS_MAP_END
1451	1448
1452		static ADDRESS_MAP_START( writemem_mcu, ADDRESS_SPACE_PROGRAM, 8 )
1453		AM_RANGE(0x0003, 0x0003) AM_WRITE(namcos2_mcu_port_d_w)
1454		AM_RANGE(0x0010, 0x0010) AM_WRITE(namcos2_mcu_analog_ctrl_w)
1455		AM_RANGE(0x0011, 0x0011) AM_WRITE(namcos2_mcu_analog_port_w)
1456		AM_RANGE(0x0000, 0x003f) AM_WRITE(SMH_RAM)
1457		AM_RANGE(0x0040, 0x01bf) AM_WRITE(SMH_RAM)
1458		AM_RANGE(0x01c0, 0x1fff) AM_WRITE(SMH_ROM)
1459		AM_RANGE(0x5000, 0x57ff) AM_WRITE(namcos2_dualportram_byte_w) AM_BASE(&mpDualPortRAM)
1460		AM_RANGE(0x8000, 0xffff) AM_WRITE(SMH_ROM)
1461		ADDRESS_MAP_END
1462	1449
1463	1450	////////////////////////////////////////////////////////////////////////////////
1464	1451	////////////////////////////////////////////////////////////////////////////////
1465	1452	////////////////////////////////////////////////////////////////////////////////
1466	1453	////////////////////////////////////////////////////////////////////////////////
1467	1454
1468		static ADDRESS_MAP_START( driveyes_68k_master, ADDRESS_SPACE_PROGRAM, 16 )
1469		AM_RANGE(0x000000, 0x03ffff) AM_READ(SMH_ROM) AM_WRITE(SMH_ROM)
1470		AM_RANGE(0x100000, 0x10ffff) AM_READ(SMH_RAM) AM_WRITE(SMH_RAM) /* private work RAM */
1471		AM_RANGE(0x180000, 0x183fff) AM_READ(NAMCOS2_68K_eeprom_R) AM_WRITE(NAMCOS2_68K_eeprom_W)// AM_BASE(&namcos2_eeprom) AM_SIZE(&namcos2_eeprom_size)
1472		AM_RANGE(0x1c0000, 0x1fffff) AM_READ(namcos2_68k_master_C148_r) AM_WRITE(namcos2_68k_master_C148_w)
	1455	#define DRIVEYES_68K_COMMON \
	1456	AM_RANGE(0x700000, 0x71ffff) AM_READWRITE(namco_obj16_r,namco_obj16_w) \
	1457	AM_RANGE(0x720000, 0x720007) AM_READWRITE(namco_spritepos16_r,namco_spritepos16_w) \
	1458	AM_RANGE(0x740000, 0x75ffff) AM_READWRITE(paletteram16_r,paletteram16_w) AM_BASE(&paletteram16) \
	1459	AM_RANGE(0x760000, 0x760001) AM_READWRITE(namcos21_video_enable_r,namcos21_video_enable_w) \
	1460	AM_RANGE(0x800000, 0x8fffff) AM_READ(datarom_r) \
	1461	AM_RANGE(0x900000, 0x90ffff) AM_READWRITE(shareram1_r,shareram1_w) AM_BASE(&mpSharedRAM1) \
	1462	AM_RANGE(0xa00000, 0xa00fff) AM_READWRITE(namcos2_68k_dualportram_word_r,namcos2_68k_dualportram_word_w) \
	1463	AM_RANGE(0xb00000, 0xb03fff) AM_READWRITE(NAMCO_C139_SCI_buffer_r,NAMCO_C139_SCI_buffer_w) \
	1464	AM_RANGE(0xb80000, 0xb8000f) AM_READWRITE(NAMCO_C139_SCI_register_r,NAMCO_C139_SCI_register_w) \
1473	1465
1474		AM_RANGE(0x250000, 0x25ffff) AM_READ(SMH_RAM) AM_WRITE(SMH_RAM) AM_BASE( &winrun_polydata )
	1466
	1467	static ADDRESS_MAP_START( driveyes_68k_master, ADDRESS_SPACE_PROGRAM, 16 )
	1468	AM_RANGE(0x000000, 0x03ffff) AM_ROM
	1469	AM_RANGE(0x100000, 0x10ffff) AM_RAM /* private work RAM */
	1470	AM_RANGE(0x180000, 0x183fff) AM_READWRITE(NAMCOS2_68K_eeprom_R,NAMCOS2_68K_eeprom_W)// AM_BASE(&namcos2_eeprom) AM_SIZE(&namcos2_eeprom_size)
	1471	AM_RANGE(0x1c0000, 0x1fffff) AM_READWRITE(namcos2_68k_master_C148_r,namcos2_68k_master_C148_w)
	1472	AM_RANGE(0x250000, 0x25ffff) AM_RAM AM_BASE( &winrun_polydata )
1475	1473	AM_RANGE(0x280000, 0x281fff) AM_WRITE(winrun_dspbios_w) AM_BASE(&winrun_dspbios)
1476		AM_RANGE(0x380000, 0x38000f) AM_READ(winrun_dspcomram_control_r) AM_WRITE(winrun_dspcomram_control_w)
1477		AM_RANGE(0x3c0000, 0x3c1fff) AM_READ(winrun_68k_dspcomram_r) AM_WRITE(winrun_68k_dspcomram_w)
	1474	AM_RANGE(0x380000, 0x38000f) AM_READWRITE(winrun_dspcomram_control_r,winrun_dspcomram_control_w)
	1475	AM_RANGE(0x3c0000, 0x3c1fff) AM_READWRITE(winrun_68k_dspcomram_r,winrun_68k_dspcomram_w)
1478	1476	AM_RANGE(0x400000, 0x400001) AM_WRITE(pointram_control_w)
1479		AM_RANGE(0x440000, 0x440001) AM_READ(pointram_data_r) AM_WRITE(pointram_data_w)
	1477	AM_RANGE(0x440000, 0x440001) AM_READWRITE(pointram_data_r,pointram_data_w)
	1478	DRIVEYES_68K_COMMON
1480	1479	ADDRESS_MAP_END
1481	1480
1482	1481	static ADDRESS_MAP_START( driveyes_68k_slave, ADDRESS_SPACE_PROGRAM, 16 )
1483		AM_RANGE(0x000000, 0x03ffff) AM_READ(SMH_ROM) AM_WRITE(SMH_ROM)
1484		AM_RANGE(0x100000, 0x10ffff) AM_READ(SMH_RAM) AM_WRITE(SMH_RAM) /* private work RAM */
	1482	AM_RANGE(0x000000, 0x03ffff) AM_ROM
	1483	AM_RANGE(0x100000, 0x10ffff) AM_RAM /* private work RAM */
1485	1484	AM_RANGE(0x1c0000, 0x1fffff) AM_READ(namcos2_68k_slave_C148_r) AM_WRITE(namcos2_68k_slave_C148_w)
	1485	DRIVEYES_68K_COMMON
1486	1486	ADDRESS_MAP_END
1487	1487
1488		static ADDRESS_MAP_START( driveyes_68k_common, ADDRESS_SPACE_PROGRAM, 16 )
1489		AM_RANGE(0x700000, 0x71ffff) AM_READ(namco_obj16_r) AM_WRITE(namco_obj16_w)
1490		AM_RANGE(0x720000, 0x720007) AM_READ(namco_spritepos16_r) AM_WRITE(namco_spritepos16_w)
1491		AM_RANGE(0x740000, 0x75ffff) AM_READ(paletteram16_r ) AM_WRITE(paletteram16_w) AM_BASE(&paletteram16)
1492		AM_RANGE(0x760000, 0x760001) AM_READ(namcos21_video_enable_r) AM_WRITE(namcos21_video_enable_w)
1493		AM_RANGE(0x800000, 0x8fffff) AM_READ(datarom_r)
1494		AM_RANGE(0x900000, 0x90ffff) AM_READ(shareram1_r) AM_WRITE(shareram1_w) AM_BASE(&mpSharedRAM1)
1495		AM_RANGE(0xa00000, 0xa00fff) AM_READ(namcos2_68k_dualportram_word_r) AM_WRITE(namcos2_68k_dualportram_word_w)
1496		AM_RANGE(0xb00000, 0xb03fff) AM_READ(NAMCO_C139_SCI_buffer_r) AM_WRITE(NAMCO_C139_SCI_buffer_w)
1497		AM_RANGE(0xb80000, 0xb8000f) AM_READ(NAMCO_C139_SCI_register_r) AM_WRITE(NAMCO_C139_SCI_register_w)
1498		ADDRESS_MAP_END
1499	1488
1500	1489	static const gfx_layout tile_layout =
1501	1490	{
r4679	r4680
1536	1525
1537	1526	static MACHINE_DRIVER_START( s21base )
1538	1527	MDRV_CPU_ADD("maincpu", M68000,12288000) /* Master */
1539		MDRV_CPU_PROGRAM_MAP(namcos21_68k_master, namcos21_68k_common)
	1528	MDRV_CPU_PROGRAM_MAP(namcos21_68k_master, 0)
1540	1529	MDRV_CPU_VBLANK_INT("screen", namcos2_68k_master_vblank)
1541	1530
1542	1531	MDRV_CPU_ADD("slave", M68000,12288000) /* Slave */
1543		MDRV_CPU_PROGRAM_MAP(namcos21_68k_slave, namcos21_68k_common)
	1532	MDRV_CPU_PROGRAM_MAP(namcos21_68k_slave, 0)
1544	1533	MDRV_CPU_VBLANK_INT("screen", namcos2_68k_slave_vblank)
1545	1534
1546	1535	MDRV_CPU_ADD("audiocpu", M6809,3072000) /* Sound */
1547		MDRV_CPU_PROGRAM_MAP(readmem_sound,writemem_sound)
	1536	MDRV_CPU_PROGRAM_MAP(am_sound_winrun,0)
1548	1537	MDRV_CPU_VBLANK_INT_HACK(irq0_line_hold,2)
1549	1538	MDRV_CPU_PERIODIC_INT(irq1_line_hold,120)
1550	1539
1551	1540	MDRV_CPU_ADD("mcu", HD63705,2048000) /* IO */
1552		MDRV_CPU_PROGRAM_MAP(readmem_mcu,writemem_mcu)
	1541	MDRV_CPU_PROGRAM_MAP(am_mcu_winrun,0)
1553	1542	MDRV_CPU_VBLANK_INT("screen", irq0_line_hold)
1554	1543
1555	1544	MDRV_CPU_ADD("dspmaster", TMS32025,24000000) /* 24 MHz? overclocked */
r4679	r4680
1615	1604
1616	1605	static MACHINE_DRIVER_START( driveyes )
1617	1606	MDRV_CPU_ADD("maincpu", M68000,12288000) /* Master */
1618		MDRV_CPU_PROGRAM_MAP(driveyes_68k_master, driveyes_68k_common)
	1607	MDRV_CPU_PROGRAM_MAP(driveyes_68k_master, 0)
1619	1608	MDRV_CPU_VBLANK_INT("screen", namcos2_68k_master_vblank)
1620	1609
1621	1610	MDRV_CPU_ADD("slave", M68000,12288000) /* Slave */
1622		MDRV_CPU_PROGRAM_MAP(driveyes_68k_slave, driveyes_68k_common)
	1611	MDRV_CPU_PROGRAM_MAP(driveyes_68k_slave, 0)
1623	1612	MDRV_CPU_VBLANK_INT("screen", namcos2_68k_slave_vblank)
1624	1613
1625	1614	MDRV_CPU_ADD("audiocpu", M6809,3072000) /* Sound */
1626		MDRV_CPU_PROGRAM_MAP(readmem_sound,writemem_sound)
	1615	MDRV_CPU_PROGRAM_MAP(am_sound_winrun,0)
1627	1616	MDRV_CPU_VBLANK_INT_HACK(irq0_line_hold,2)
1628	1617	MDRV_CPU_PERIODIC_INT(irq1_line_hold,120)
1629	1618
1630	1619	MDRV_CPU_ADD("mcu", HD63705,2048000) /* IO */
1631		MDRV_CPU_PROGRAM_MAP(readmem_mcu,writemem_mcu)
	1620	MDRV_CPU_PROGRAM_MAP(am_mcu_winrun,0)
1632	1621	MDRV_CPU_VBLANK_INT("screen", irq0_line_hold)
1633	1622
1634	1623	MDRV_CPU_ADD("dsp", TMS32025,24000000*2) /* 24 MHz? overclocked */
r4679	r4680
1678	1667	MDRV_CPU_VBLANK_INT("screen", namcos2_68k_slave_vblank)
1679	1668
1680	1669	MDRV_CPU_ADD("audiocpu", M6809,3072000) /* Sound */
1681		MDRV_CPU_PROGRAM_MAP(readmem_sound,writemem_sound)
	1670	MDRV_CPU_PROGRAM_MAP(am_sound_winrun,0)
1682	1671	MDRV_CPU_VBLANK_INT_HACK(irq0_line_hold,2)
1683	1672	MDRV_CPU_PERIODIC_INT(irq1_line_hold,120)
1684	1673
1685	1674	MDRV_CPU_ADD("mcu", HD63705,2048000) /* IO */
1686		MDRV_CPU_PROGRAM_MAP(readmem_mcu,writemem_mcu)
	1675	MDRV_CPU_PROGRAM_MAP(am_mcu_winrun,0)
1687	1676	MDRV_CPU_VBLANK_INT("screen", irq0_line_hold)
1688	1677
1689	1678	MDRV_CPU_ADD("dsp", TMS32025,24000000) /* 24 MHz? overclocked */
r4679	r4680
2202	2191	static void namcos21_init( running_machine *machine, int game_type )
2203	2192	{
2204	2193	namcos2_gametype = game_type;
2205		pointram = auto_malloc(PTRAM_SIZE);
	2194	pointram = auto_alloc_array(machine, UINT8, PTRAM_SIZE);
2206	2195	mpDataROM = (UINT16 *)memory_region( machine, "user1" );
2207	2196	InitDSP(machine);
2208	2197	mbNeedsKickstart = 20;
r4679	r4680
2219	2208	pMem[pc++] = 0xff80; /* b */
2220	2209	pMem[pc++] = 0;
2221	2210
2222		winrun_dspcomram = auto_malloc(sizeof(UINT16)*0x1000*2);
	2211	winrun_dspcomram = auto_alloc_array(machine, UINT16, 0x1000*2);
2223	2212
2224	2213	namcos2_gametype = NAMCOS21_WINRUN91;
2225	2214	mpDataROM = (UINT16 *)memory_region( machine, "user1" );
2226		pointram = auto_malloc(PTRAM_SIZE);
	2215	pointram = auto_alloc_array(machine, UINT8, PTRAM_SIZE);
2227	2216	pointram_idx = 0;
2228	2217	mbNeedsKickstart = 0;
2229	2218	}
r4679	r4680
2261	2250	int pc = 0;
2262	2251	pMem[pc++] = 0xff80; /* b */
2263	2252	pMem[pc++] = 0;
2264		winrun_dspcomram = auto_malloc(sizeof(UINT16)*0x1000*2);
	2253	winrun_dspcomram = auto_alloc_array(machine, UINT16, 0x1000*2);
2265	2254	namcos2_gametype = NAMCOS21_DRIVERS_EYES;
2266	2255	mpDataROM = (UINT16 *)memory_region( machine, "user1" );
2267		pointram = auto_malloc(PTRAM_SIZE);
	2256	pointram = auto_alloc_array(machine, UINT8, PTRAM_SIZE);
2268	2257	pointram_idx = 0;
2269	2258	mbNeedsKickstart = 0;
2270	2259	}

src/mame/drivers/pgm.c

r4679	r4680
349	349	if (PGMARM7LOGERROR) logerror("M68K: Latch write: %04x (%04x) (%06x)\n", data & 0x0000ffff, mem_mask, cpu_get_pc(space->cpu) );
350	350	COMBINE_DATA(&kov2_latchdata_68k_w);
351	351
352		generic_pulse_irq_line(space->machine->cpu[2], ARM7_FIRQ_LINE);
	352	generic_pulse_irq_line(cputag_get_cpu(space->machine, "prot"), ARM7_FIRQ_LINE);
353	353	cpuexec_boost_interleave(space->machine, attotime_zero, ATTOTIME_IN_USEC(200));
354		cpu_spinuntil_time(space->cpu, cpu_clocks_to_attotime(space->machine->cpu[2], 200)); // give the arm time to respond (just boosting the interleave doesn't help)
	354	cpu_spinuntil_time(space->cpu, cputag_clocks_to_attotime(space->machine, "prot", 200)); // give the arm time to respond (just boosting the interleave doesn't help)
355	355	}
356	356
357	357	static READ16_HANDLER( arm7_ram_r )
r4679	r4680
385	385	{
386	386	if (PGMLOGERROR) logerror("Z80: reset %04x @ %04x (%06x)\n", data, mem_mask, cpu_get_pc(space->cpu));
387	387
388		if(data == 0x5050) {
	388	if(data == 0x5050)
	389	{
389	390	devtag_reset(space->machine, "ics");
390		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_HALT, CLEAR_LINE);
391		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_RESET, PULSE_LINE);
392		if(0) {
	391	cputag_set_input_line(space->machine, "soundcpu", INPUT_LINE_HALT, CLEAR_LINE);
	392	cputag_set_input_line(space->machine, "soundcpu", INPUT_LINE_RESET, PULSE_LINE);
	393	if(0)
	394	{
393	395	FILE *out;
394	396	out = fopen("z80ram.bin", "wb");
395	397	fwrite(z80_mainram, 1, 65536, out);
r4679	r4680
400	402	{
401	403	/* this might not be 100% correct, but several of the games (ddp2, puzzli2 etc. expect the z80 to be turned
402	404	off during data uploads, they write here before the upload */
403		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_HALT, ASSERT_LINE);
	405	cputag_set_input_line(space->machine, "soundcpu", INPUT_LINE_HALT, ASSERT_LINE);
404	406	}
405	407	}
406	408
r4679	r4680
411	413
412	414	static WRITE16_HANDLER ( m68k_l1_w )
413	415	{
414		if(ACCESSING_BITS_0_7) {
	416	if(ACCESSING_BITS_0_7)
	417	{
415	418	if (PGMLOGERROR) logerror("SL 1 m68.w %02x (%06x) IRQ\n", data & 0xff, cpu_get_pc(space->cpu));
416	419	soundlatch_w(space, 0, data);
417		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_NMI, PULSE_LINE );
	420	cputag_set_input_line(space->machine, "soundcpu", INPUT_LINE_NMI, PULSE_LINE );
418	421	}
419	422	}
420	423
r4679	r4680
426	429
427	430	static void sound_irq(const device_config *device, int level)
428	431	{
429		cpu_set_input_line(device->machine->cpu[1], 0, level);
	432	cputag_set_input_line(device->machine, "soundcpu", 0, level);
430	433	}
431	434
432	435	static const ics2115_interface pgm_ics2115_interface = {
r4679	r4680
885	888
886	889	static WRITE16_HANDLER( svg_68k_nmi_w )
887	890	{
888		generic_pulse_irq_line(space->machine->cpu[2], ARM7_FIRQ_LINE);
	891	generic_pulse_irq_line(cputag_get_cpu(space->machine, "prot"), ARM7_FIRQ_LINE);
889	892	cpuexec_boost_interleave(space->machine, attotime_zero, ATTOTIME_IN_USEC(200));
890		cpu_spinuntil_time(space->cpu, cpu_clocks_to_attotime(space->machine->cpu[2], 200)); // give the arm time to respond (just boosting the interleave doesn't help)
	893	cpu_spinuntil_time(space->cpu, cputag_clocks_to_attotime(space->machine, "prot", 200)); // give the arm time to respond (just boosting the interleave doesn't help)
891	894	}
892	895
893	896	static WRITE16_HANDLER( svg_latch_68k_w )
r4679	r4680
1259	1262
1260	1263	/* only dragon world 2 NEEDs irq4, Puzzli 2 explicitly doesn't want it, what
1261	1264	is the source? maybe the protection device? */
1262		static INTERRUPT_GEN( drgw_interrupt ) {
	1265	static INTERRUPT_GEN( drgw_interrupt )
	1266	{
1263	1267	if( cpu_getiloops(device) == 0 )
1264	1268	cpu_set_input_line(device, 6, HOLD_LINE);
1265	1269	else
r4679	r4680
1268	1272
1269	1273	static MACHINE_RESET ( pgm )
1270	1274	{
1271		cpu_set_input_line(machine->cpu[1], INPUT_LINE_HALT, ASSERT_LINE);
	1275	cputag_set_input_line(machine, "soundcpu", INPUT_LINE_HALT, ASSERT_LINE);
1272	1276	}
1273	1277
1274	1278	static MACHINE_DRIVER_START( pgm )
r4679	r4680
1427	1431	while (pgm_sprite_a_region_allocate < needed)
1428	1432	pgm_sprite_a_region_allocate = pgm_sprite_a_region_allocate <<1;
1429	1433
1430		pgm_sprite_a_region = auto_malloc (pgm_sprite_a_region_allocate);
	1434	pgm_sprite_a_region = auto_alloc_array(machine, UINT8, pgm_sprite_a_region_allocate);
1431	1435
1432	1436
1433	1437	for (cnt = 0 ; cnt < srcsize/2 ; cnt++)
r4679	r4680
1465	1469	{
1466	1470	pgm_basic_init(machine);
1467	1471
1468		memory_install_readwrite16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xC0400e, 0xC0400f, 0, 0, pgm_asic3_r, pgm_asic3_w);
1469		memory_install_write16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xC04000, 0xC04001, 0, 0, pgm_asic3_reg_w);
	1472	memory_install_readwrite16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xC0400e, 0xC0400f, 0, 0, pgm_asic3_r, pgm_asic3_w);
	1473	memory_install_write16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xC04000, 0xC04001, 0, 0, pgm_asic3_reg_w);
1470	1474	}
1471	1475
1472	1476	static void drgwld2_common_init(running_machine *machine)
r4679	r4680
1479	1483	select and after failing in the 2nd stage (probably there are other checks
1480	1484	out there).
1481	1485	*/
1482		memory_install_read16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xd80000, 0xd80003, 0, 0, dw2_d80000_r);
	1486	memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xd80000, 0xd80003, 0, 0, dw2_d80000_r);
1483	1487	}
1484	1488
1485	1489	static DRIVER_INIT( drgw2 )
r4679	r4680
1581	1585	static void svg_basic_init(running_machine *machine)
1582	1586	{
1583	1587	pgm_basic_init(machine);
1584		svg_shareram[0]=auto_malloc(0x10000);
1585		svg_shareram[1]=auto_malloc(0x10000);
	1588	svg_shareram[0]=auto_alloc_array(machine, UINT32, 0x10000/4);
	1589	svg_shareram[1]=auto_alloc_array(machine, UINT32, 0x10000/4);
1586	1590	svg_ram_sel=0;
1587	1591	}
1588	1592
r4679	r4680
1614	1618	{
1615	1619	pgm_basic_init(machine);
1616	1620
1617		//  memory_install_readwrite16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xda0000, 0xdaffff, 0, 0, dw3_prot_r, dw3_prot_w);
	1621	//  memory_install_readwrite16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xda0000, 0xdaffff, 0, 0, dw3_prot_r, dw3_prot_w);
1618	1622
1619	1623	pgm_dw3_decrypt(machine);
1620	1624	}
r4679	r4680
1857	1861	mem16[0x108a42/2]=0x5202;
1858	1862	mem16[0x108a44/2]=0x0c02;
1859	1863
1860		memory_install_readwrite16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xd40000, 0xd40003, 0, 0, killbld_prot_r, killbld_prot_w);
	1864	memory_install_readwrite16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xd40000, 0xd40003, 0, 0, killbld_prot_r, killbld_prot_w);
1861	1865	}
1862	1866
1863	1867	static DRIVER_INIT( puzzli2 )
r4679	r4680
1870	1874
1871	1875	pgm_basic_init(machine);
1872	1876
1873		memory_install_readwrite16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x500000, 0x500003, 0, 0, ASIC28_r16, ASIC28_w16);
	1877	memory_install_readwrite16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x500000, 0x500003, 0, 0, ASIC28_r16, ASIC28_w16);
1874	1878
1875	1879	/* 0x4f0000 - ? is actually ram shared with the protection device,
1876	1880	the protection device provides the region code */
1877		memory_install_read16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x4f0000, 0x4fffff, 0, 0, sango_protram_r);
	1881	memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x4f0000, 0x4fffff, 0, 0, sango_protram_r);
1878	1882
1879	1883	pgm_puzzli2_decrypt(machine);
1880	1884
r4679	r4680
2072	2076	{
2073	2077	pgm_basic_init(machine);
2074	2078
2075		memory_install_readwrite16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xdcb400, 0xdcb403, 0, 0, olds_r16, olds_w16);
2076		memory_install_read16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x8178f4, 0x8178f5, 0, 0, olds_prot_swap_r16);
	2079	memory_install_readwrite16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xdcb400, 0xdcb403, 0, 0, olds_r16, olds_w16);
	2080	memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x8178f4, 0x8178f5, 0, 0, olds_prot_swap_r16);
2077	2081	}
2078	2082
2079	2083	/*** Rom Loading *************************************************************/

src/mame/drivers/itgamble.c

r4679	r4680
171	171	static MACHINE_RESET( itgamble )
172	172	{
173	173	/* stop the CPU, we have no code for it anyway */
174		cpu_set_input_line(machine->cpu[0], INPUT_LINE_HALT, ASSERT_LINE);
	174	cputag_set_input_line(machine, "maincpu", INPUT_LINE_HALT, ASSERT_LINE);
175	175	}
176	176
177	177

src/mame/drivers/iqblock.c

r4679	r4680
85	85
86	86	static WRITE8_HANDLER( iqblock_irqack_w )
87	87	{
88		cpu_set_input_line(space->machine->cpu[0], 0, CLEAR_LINE);
	88	cputag_set_input_line(space->machine, "maincpu", 0, CLEAR_LINE);
89	89	}
90	90
91	91	static READ8_HANDLER( extrarom_r )
r4679	r4680
441	441	paletteram_2       = rom + 0x12800;
442	442	iqblock_fgvideoram = rom + 0x16800;
443	443	iqblock_bgvideoram = rom + 0x17000;
444		memory_install_write8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xfe26, 0xfe26, 0, 0, iqblock_prot_w);
	444	memory_install_write8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xfe26, 0xfe26, 0, 0, iqblock_prot_w);
445	445	iqblock_video_type=1;
446	446	}
447	447
r4679	r4680
463	463	paletteram_2       = rom + 0x12800;
464	464	iqblock_fgvideoram = rom + 0x16800;
465	465	iqblock_bgvideoram = rom + 0x17000;
466		memory_install_write8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xfe39, 0xfe39, 0, 0, grndtour_prot_w);
	466	memory_install_write8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xfe39, 0xfe39, 0, 0, grndtour_prot_w);
467	467	iqblock_video_type=0;
468	468	}
469	469
r4679	r4680
471	471
472	472	GAME( 1993, iqblock,  0, iqblock,  iqblock, iqblock,  ROT0, "IGS", "IQ-Block", 0 )
473	473	GAME( 1993, grndtour, 0, iqblock,  iqblock, grndtour, ROT0, "IGS", "Grand Tour", 0 )
474

src/mame/drivers/gameplan.c

r4679	r4680
91	91
92	92	static WRITE8_DEVICE_HANDLER( io_select_w )
93	93	{
94		gameplan_state *state = device->machine->driver_data;
	94	gameplan_state *state = (gameplan_state *)device->machine->driver_data;
95	95
96	96	switch (data)
97	97	{
r4679	r4680
108	108	static READ8_DEVICE_HANDLER( io_port_r )
109	109	{
110	110	static const char *const portnames[] = { "IN0", "IN1", "IN2", "IN3", "DSW0", "DSW1" };
111		gameplan_state *state = device->machine->driver_data;
	111	gameplan_state *state = (gameplan_state *)device->machine->driver_data;
112	112
113	113	return input_port_read(device->machine, portnames[state->current_port]);
114	114	}
r4679	r4680
139	139
140	140	static WRITE8_DEVICE_HANDLER( audio_reset_w )
141	141	{
142		gameplan_state *state = device->machine->driver_data;
143		cpu_set_input_line(device->machine->cpu[1], INPUT_LINE_RESET, data ? CLEAR_LINE : ASSERT_LINE);
	142	gameplan_state *state = (gameplan_state *)device->machine->driver_data;
	143	cputag_set_input_line(device->machine, "audiocpu", INPUT_LINE_RESET, data ? CLEAR_LINE : ASSERT_LINE);
144	144	if (data == 0)
145	145	{
146	146	device_reset(state->riot);
r4679	r4680
151	151
152	152	static WRITE8_DEVICE_HANDLER( audio_cmd_w )
153	153	{
154		gameplan_state *state = device->machine->driver_data;
	154	gameplan_state *state = (gameplan_state *)device->machine->driver_data;
155	155	riot6532_porta_in_set(state->riot, data, 0x7f);
156	156	}
157	157
158	158
159	159	static WRITE8_DEVICE_HANDLER( audio_trigger_w )
160	160	{
161		gameplan_state *state = device->machine->driver_data;
	161	gameplan_state *state = (gameplan_state *)device->machine->driver_data;
162	162	riot6532_porta_in_set(state->riot, data << 7, 0x80);
163	163	}
164	164
r4679	r4680
182	182
183	183	static void r6532_irq(const device_config *device, int state)
184	184	{
185		cpu_set_input_line(device->machine->cpu[1], 0, state);
	185	cputag_set_input_line(device->machine, "audiocpu", 0, state);
186	186	if (state == ASSERT_LINE)
187	187	cpuexec_boost_interleave(device->machine, attotime_zero, ATTOTIME_IN_USEC(10));
188	188	}
r4679	r4680
190	190
191	191	static void r6532_soundlatch_w(const device_config *device, UINT8 newdata, UINT8 olddata)
192	192	{
193		const address_space *space = cpu_get_address_space(device->machine->cpu[0], ADDRESS_SPACE_PROGRAM);
	193	const address_space *space = cputag_get_address_space(device->machine, "maincpu", ADDRESS_SPACE_PROGRAM);
194	194	soundlatch_w(space, 0, newdata);
195	195	}
196	196
r4679	r4680
214	214
215	215	static MACHINE_START( gameplan )
216	216	{
217		gameplan_state *state = machine->driver_data;
	217	gameplan_state *state = (gameplan_state *)machine->driver_data;
218	218
219	219	state->riot = devtag_get_device(machine, "riot");
220	220

src/mame/drivers/capbowl.c

r4679	r4680
191	191
192	192	static WRITE8_HANDLER( capbowl_sndcmd_w )
193	193	{
194		cpu_set_input_line(space->machine->cpu[1], M6809_IRQ_LINE, HOLD_LINE);
	194	cputag_set_input_line(space->machine, "audiocpu", M6809_IRQ_LINE, HOLD_LINE);
195	195	soundlatch_w(space, offset, data);
196	196	}
197	197
r4679	r4680
206	206
207	207	static void firqhandler(const device_config *device, int irq)
208	208	{
209		cpu_set_input_line(device->machine->cpu[1], 1, irq ? ASSERT_LINE : CLEAR_LINE);
	209	cputag_set_input_line(device->machine, "audiocpu", 1, irq ? ASSERT_LINE : CLEAR_LINE);
210	210	}
211	211
212	212

src/mame/drivers/darius.c

r4679	r4680
156	156	/* bit 0 enables cpu B */
157	157	/* however this fails when recovering from a save state
158	158	if cpu B is disabled !! */
159		cpu_set_input_line(machine->cpu[2], INPUT_LINE_RESET, (cpua_ctrl &0x1) ? CLEAR_LINE : ASSERT_LINE);
	159	cputag_set_input_line(machine, "cpub", INPUT_LINE_RESET, (cpua_ctrl &0x1) ? CLEAR_LINE : ASSERT_LINE);
160	160
161	161	}
162	162
r4679	r4680
247	247	MEMORY STRUCTURES
248	248	***********************************************************/
249	249
250		static ADDRESS_MAP_START( darius_readmem, ADDRESS_SPACE_PROGRAM, 16 )
251		AM_RANGE(0x000000, 0x05ffff) AM_READ(SMH_ROM)
252		AM_RANGE(0x080000, 0x08ffff) AM_READ(SMH_RAM)      /* main RAM */
253		AM_RANGE(0xc00000, 0xc0001f) AM_READ(darius_ioc_r)   /* inputs, sound */
254		AM_RANGE(0xd00000, 0xd0ffff) AM_READ(PC080SN_word_0_r)   /* tilemaps */
255		AM_RANGE(0xd80000, 0xd80fff) AM_READ(SMH_RAM)   /* palette */
256		AM_RANGE(0xe00100, 0xe00fff) AM_RAM AM_SHARE(1) AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)
257		AM_RANGE(0xe01000, 0xe02fff) AM_RAM AM_SHARE(2)
258		AM_RANGE(0xe08000, 0xe0ffff) AM_RAM_WRITE(darius_fg_layer_w) AM_SHARE(3) AM_BASE(&darius_fg_ram)
259		AM_RANGE(0xe10000, 0xe10fff) AM_READ(SMH_RAM)      /* ??? */
260		ADDRESS_MAP_END
261
262		static ADDRESS_MAP_START( darius_writemem, ADDRESS_SPACE_PROGRAM, 16 )
263		AM_RANGE(0x000000, 0x05ffff) AM_WRITE(SMH_ROM)
264		AM_RANGE(0x080000, 0x08ffff) AM_WRITE(SMH_RAM)
	250	static ADDRESS_MAP_START( darius_map, ADDRESS_SPACE_PROGRAM, 16 )
	251	AM_RANGE(0x000000, 0x05ffff) AM_ROM
	252	AM_RANGE(0x080000, 0x08ffff) AM_RAM                                    /* main RAM */
265	253	AM_RANGE(0x0a0000, 0x0a0001) AM_WRITE(cpua_ctrl_w)
266	254	AM_RANGE(0x0b0000, 0x0b0001) AM_WRITE(darius_watchdog_w)
267		AM_RANGE(0xc00000, 0xc0007f) AM_WRITE(darius_ioc_w)   /* coin ctr & lockout, sound */
268		AM_RANGE(0xd00000, 0xd0ffff) AM_WRITE(PC080SN_word_0_w)
	255	AM_RANGE(0xc00000, 0xc0007f) AM_READWRITE(darius_ioc_r, darius_ioc_w)         /* inputs, sound */
	256	AM_RANGE(0xd00000, 0xd0ffff) AM_READWRITE(PC080SN_word_0_r, PC080SN_word_0_w)   /* tilemaps */
269	257	AM_RANGE(0xd20000, 0xd20003) AM_WRITE(PC080SN_yscroll_word_0_w)
270	258	AM_RANGE(0xd40000, 0xd40003) AM_WRITE(PC080SN_xscroll_word_0_w)
271	259	AM_RANGE(0xd50000, 0xd50003) AM_WRITE(PC080SN_ctrl_word_0_w)
272		AM_RANGE(0xd80000, 0xd80fff) AM_WRITE(paletteram16_xBBBBBGGGGGRRRRR_word_w) AM_BASE(&paletteram16)
273		AM_RANGE(0xe10000, 0xe10fff) AM_WRITE(SMH_RAM)
	260	AM_RANGE(0xd80000, 0xd80fff) AM_RAM_WRITE(paletteram16_xBBBBBGGGGGRRRRR_word_w) AM_BASE(&paletteram16)/* palette */
	261	AM_RANGE(0xe00100, 0xe00fff) AM_RAM AM_SHARE(1) AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)
	262	AM_RANGE(0xe01000, 0xe02fff) AM_RAM AM_SHARE(2)
	263	AM_RANGE(0xe08000, 0xe0ffff) AM_RAM_WRITE(darius_fg_layer_w) AM_SHARE(3) AM_BASE(&darius_fg_ram)
	264	AM_RANGE(0xe10000, 0xe10fff) AM_RAM                                    /* ??? */
274	265	ADDRESS_MAP_END
275	266
276		static ADDRESS_MAP_START( darius_cpub_readmem, ADDRESS_SPACE_PROGRAM, 16 )
277		AM_RANGE(0x000000, 0x03ffff) AM_READ(SMH_ROM)
278		AM_RANGE(0x040000, 0x04ffff) AM_READ(SMH_RAM)   /* local RAM */
	267	static ADDRESS_MAP_START( darius_cpub_map, ADDRESS_SPACE_PROGRAM, 16 )
	268	AM_RANGE(0x000000, 0x03ffff) AM_ROM
	269	AM_RANGE(0x040000, 0x04ffff) AM_RAM            /* local RAM */
	270	AM_RANGE(0xc00000, 0xc0007f) AM_WRITE(darius_ioc_w)   /* only writes $c00050 (?) */
	271	AM_RANGE(0xd80000, 0xd80fff) AM_WRITE(paletteram16_xBBBBBGGGGGRRRRR_word_w)
279	272	AM_RANGE(0xe00100, 0xe00fff) AM_RAM AM_SHARE(1)
280	273	AM_RANGE(0xe01000, 0xe02fff) AM_RAM AM_SHARE(2)
281	274	AM_RANGE(0xe08000, 0xe0ffff) AM_RAM_WRITE(darius_fg_layer_w) AM_SHARE(3)
282	275	ADDRESS_MAP_END
283	276
284		static ADDRESS_MAP_START( darius_cpub_writemem, ADDRESS_SPACE_PROGRAM, 16 )
285		AM_RANGE(0x000000, 0x03ffff) AM_WRITE(SMH_ROM)
286		AM_RANGE(0x040000, 0x04ffff) AM_WRITE(SMH_RAM)
287		AM_RANGE(0xc00000, 0xc0007f) AM_WRITE(darius_ioc_w)   /* only writes $c00050 (?) */
288		AM_RANGE(0xd80000, 0xd80fff) AM_WRITE(paletteram16_xBBBBBGGGGGRRRRR_word_w)
289		ADDRESS_MAP_END
290	277
291
292	278	/*****************************************************
293	279	SOUND
294	280	*****************************************************/
r4679	r4680
486	472	Sound memory structures / ADPCM
487	473	*****************************************************/
488	474
489		static ADDRESS_MAP_START( darius_sound_readmem, ADDRESS_SPACE_PROGRAM, 8 )
490		AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_BANK1)
491		AM_RANGE(0x8000, 0x8fff) AM_READ(SMH_RAM)
492		AM_RANGE(0x9000, 0x9001) AM_DEVREAD("ym1", ym2203_r)
493		AM_RANGE(0xa000, 0xa001) AM_DEVREAD("ym2", ym2203_r)
494		AM_RANGE(0xb000, 0xb000) AM_READNOP
495		AM_RANGE(0xb001, 0xb001) AM_READ(taitosound_slave_comm_r)
496		ADDRESS_MAP_END
497
498		static ADDRESS_MAP_START( darius_sound_writemem, ADDRESS_SPACE_PROGRAM, 8 )
499		AM_RANGE(0x0000, 0x7fff) AM_WRITE(SMH_ROM)
500		AM_RANGE(0x8000, 0x8fff) AM_WRITE(SMH_RAM)
501		AM_RANGE(0x9000, 0x9001) AM_DEVWRITE("ym1", ym2203_w)
502		AM_RANGE(0xa000, 0xa001) AM_DEVWRITE("ym2", ym2203_w)
503		AM_RANGE(0xb000, 0xb000) AM_WRITE(taitosound_slave_port_w)
504		AM_RANGE(0xb001, 0xb001) AM_WRITE(taitosound_slave_comm_w)
	475	static ADDRESS_MAP_START( darius_sound_map, ADDRESS_SPACE_PROGRAM, 8 )
	476	AM_RANGE(0x0000, 0x7fff) AM_ROMBANK(1)
	477	AM_RANGE(0x8000, 0x8fff) AM_RAM
	478	AM_RANGE(0x9000, 0x9001) AM_DEVREADWRITE("ym1", ym2203_r, ym2203_w)
	479	AM_RANGE(0xa000, 0xa001) AM_DEVREADWRITE("ym2", ym2203_r, ym2203_w)
	480	AM_RANGE(0xb000, 0xb000) AM_READWRITE(SMH_NOP, taitosound_slave_port_w)
	481	AM_RANGE(0xb001, 0xb001) AM_READWRITE(taitosound_slave_comm_r, taitosound_slave_comm_w)
505	482	AM_RANGE(0xc000, 0xc000) AM_WRITE(darius_fm0_pan)
506	483	AM_RANGE(0xc400, 0xc400) AM_WRITE(darius_fm1_pan)
507	484	AM_RANGE(0xc800, 0xc800) AM_WRITE(darius_psg0_pan)
r4679	r4680
512	489	AM_RANGE(0xdc00, 0xdc00) AM_WRITE(sound_bankswitch_w)
513	490	ADDRESS_MAP_END
514	491
515		static ADDRESS_MAP_START( darius_sound2_readmem, ADDRESS_SPACE_PROGRAM, 8 )
516		AM_RANGE(0x0000, 0xffff) AM_READ(SMH_ROM)
	492	static ADDRESS_MAP_START( darius_sound2_map, ADDRESS_SPACE_PROGRAM, 8 )
	493	AM_RANGE(0x0000, 0xffff) AM_READWRITE(SMH_ROM, SMH_NOP)
517	494	/* yes, no RAM */
518	495	ADDRESS_MAP_END
519	496
520		static ADDRESS_MAP_START( darius_sound2_writemem, ADDRESS_SPACE_PROGRAM, 8 )
521		AM_RANGE(0x0000, 0xffff) AM_WRITENOP   /* writes rom whenever interrupt occurs - as no stack */
522		/* yes, no RAM */
523		ADDRESS_MAP_END
524	497
525
526	498	static void darius_adpcm_int (const device_config *device)
527	499	{
528	500	if (nmi_enable)
529		cpu_set_input_line(device->machine->cpu[3], INPUT_LINE_NMI, PULSE_LINE);
	501	cputag_set_input_line(device->machine, "adpcm", INPUT_LINE_NMI, PULSE_LINE);
530	502	}
531	503
532	504	static const msm5205_interface msm5205_config =
r4679	r4680
803	775	/* handler called by the YM2203 emulator when the internal timers cause an IRQ */
804	776	static void irqhandler(const device_config *device, int irq)   /* assumes Z80 sandwiched between 68Ks */
805	777	{
806		cpu_set_input_line(device->machine->cpu[1],0,irq ? ASSERT_LINE : CLEAR_LINE);
	778	cputag_set_input_line(device->machine, "audiocpu", 0, irq ? ASSERT_LINE : CLEAR_LINE);
807	779	}
808	780
809	781	static const ym2203_interface ym2203_interface_1 =
r4679	r4680
840	812
841	813	/* basic machine hardware */
842	814	MDRV_CPU_ADD("maincpu", M68000,16000000/2)   /* 8 MHz ? */
843		MDRV_CPU_PROGRAM_MAP(darius_readmem,darius_writemem)
	815	MDRV_CPU_PROGRAM_MAP(darius_map,0)
844	816	MDRV_CPU_VBLANK_INT("lscreen", irq4_line_hold)
845	817
846	818	MDRV_CPU_ADD("audiocpu", Z80,8000000/2)   /* 4 MHz ? */
847		MDRV_CPU_PROGRAM_MAP(darius_sound_readmem,darius_sound_writemem)
	819	MDRV_CPU_PROGRAM_MAP(darius_sound_map,0)
848	820
849	821	MDRV_CPU_ADD("cpub", M68000,16000000/2)   /* 8 MHz ? */
850		MDRV_CPU_PROGRAM_MAP(darius_cpub_readmem,darius_cpub_writemem)
	822	MDRV_CPU_PROGRAM_MAP(darius_cpub_map,0)
851	823	MDRV_CPU_VBLANK_INT("lscreen", irq4_line_hold)
852	824
853	825	MDRV_CPU_ADD("adpcm", Z80,8000000/2) /* 4 MHz ? */   /* ADPCM player using MSM5205 */
854		MDRV_CPU_PROGRAM_MAP(darius_sound2_readmem,darius_sound2_writemem)
	826	MDRV_CPU_PROGRAM_MAP(darius_sound2_map,0)
855	827	MDRV_CPU_IO_MAP(darius_sound2_io_map,0)
856	828
857	829	MDRV_QUANTUM_TIME(HZ(600))   /* 10 CPU slices per frame ? */
r4679	r4680
1250	1222	GAME( 1986, dariusj,  darius,   darius,   dariusj,  darius,   ROT0, "Taito Corporation", "Darius (Japan)", 0 )
1251	1223	GAME( 1986, dariuso,  darius,   darius,   dariusj,  darius,   ROT0, "Taito Corporation", "Darius (Japan old version)", 0 )
1252	1224	GAME( 1986, dariuse,  darius,   darius,   dariuse,  darius,   ROT0, "Taito Corporation", "Darius (Extra) (Japan)", 0 )
1253

src/mame/drivers/ssingles.c

r4679	r4680
164	164	static ADDRESS_MAP_START( ssingles_map, ADDRESS_SPACE_PROGRAM, 8 )
165	165	AM_RANGE(0x0000, 0x00ff) AM_WRITE(ssingles_videoram_w)
166	166	AM_RANGE(0x0800, 0x08ff) AM_WRITE(ssingles_colorram_w)
167		AM_RANGE(0x0000, 0x1fff) AM_READ( SMH_ROM )
	167	AM_RANGE(0x0000, 0x1fff) AM_ROM
168	168	AM_RANGE(0xc000, 0xc000) AM_READ( c000_r )
169	169	AM_RANGE(0xc001, 0xc001) AM_READWRITE( c001_r, c001_w )
170	170	AM_RANGE(0x6000, 0xbfff) AM_ROM
r4679	r4680
307	307
308	308	static DRIVER_INIT(ssingles)
309	309	{
310		ssingles_videoram=auto_malloc(VMEM_SIZE);
311		ssingles_colorram=auto_malloc(VMEM_SIZE);
312		memset(ssingles_videoram,0,VMEM_SIZE);
313		memset(ssingles_colorram,0,VMEM_SIZE);
	310	ssingles_videoram=auto_alloc_array_clear(machine, UINT8, VMEM_SIZE);
	311	ssingles_colorram=auto_alloc_array_clear(machine, UINT8, VMEM_SIZE);
314	312	state_save_register_global_pointer(machine, ssingles_videoram, VMEM_SIZE);
315	313	state_save_register_global_pointer(machine, ssingles_colorram, VMEM_SIZE);
316	314	}

src/mame/drivers/kinst.c

r4679	r4680
190	190	}
191	191
192	192	/* set the fastest DRC options */
193		mips3drc_set_options(machine->cpu[0], MIPS3DRC_FASTEST_OPTIONS);
	193	mips3drc_set_options(cputag_get_cpu(machine, "maincpu"), MIPS3DRC_FASTEST_OPTIONS);
194	194
195	195	/* configure fast RAM regions for DRC */
196		mips3drc_add_fastram(machine->cpu[0], 0x08000000, 0x087fffff, FALSE, rambase2);
197		mips3drc_add_fastram(machine->cpu[0], 0x00000000, 0x0007ffff, FALSE, rambase);
198		mips3drc_add_fastram(machine->cpu[0], 0x1fc00000, 0x1fc7ffff, TRUE,  rombase);
	196	mips3drc_add_fastram(cputag_get_cpu(machine, "maincpu"), 0x08000000, 0x087fffff, FALSE, rambase2);
	197	mips3drc_add_fastram(cputag_get_cpu(machine, "maincpu"), 0x00000000, 0x0007ffff, FALSE, rambase);
	198	mips3drc_add_fastram(cputag_get_cpu(machine, "maincpu"), 0x1fc00000, 0x1fc7ffff, TRUE,  rombase);
199	199	}
200	200
201	201
r4679	r4680
254	254
255	255	static TIMER_CALLBACK( irq0_stop )
256	256	{
257		cpu_set_input_line(machine->cpu[0], 0, CLEAR_LINE);
	257	cputag_set_input_line(machine, "maincpu", 0, CLEAR_LINE);
258	258	}
259	259
260	260
r4679	r4680
267	267
268	268	static void ide_interrupt(const device_config *device, int state)
269	269	{
270		cpu_set_input_line(device->machine->cpu[0], 1, state);
	270	cputag_set_input_line(device->machine, "maincpu", 1, state);
271	271	}
272	272
273	273

src/mame/drivers/beathead.c

r4679	r4680
144	144
145	145	/* on scanline zero, clear any halt condition */
146	146	if (scanline == 0)
147		cpu_set_input_line(machine->cpu[0], INPUT_LINE_HALT, CLEAR_LINE);
	147	cputag_set_input_line(machine, "maincpu", INPUT_LINE_HALT, CLEAR_LINE);
148	148
149	149	/* wrap around at 262 */
150	150	scanline++;
r4679	r4680
204	204	{
205	205	irq_line_state = gen_int;
206	206	//      if (irq_line_state != CLEAR_LINE)
207		cpu_set_input_line(machine->cpu[0], ASAP_IRQ0, irq_line_state);
	207	cputag_set_input_line(machine, "maincpu", ASAP_IRQ0, irq_line_state);
208	208	//      else
209	209	//          asap_set_irq_line(ASAP_IRQ0, irq_line_state);
210	210	}
r4679	r4680
299	299	static WRITE32_HANDLER( sound_reset_w )
300	300	{
301	301	logerror("Sound reset = %d\n", !offset);
302		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_RESET, offset ? CLEAR_LINE : ASSERT_LINE);
	302	cputag_set_input_line(space->machine, "jsa", INPUT_LINE_RESET, offset ? CLEAR_LINE : ASSERT_LINE);
303	303	}
304	304
305	305
r4679	r4680
514	514	atarijsa_init(machine, "IN2", 0x0040);
515	515
516	516	/* prepare the speedups */
517		speedup_data = memory_install_read32_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x00000ae8, 0x00000aeb, 0, 0, speedup_r);
518		movie_speedup_data = memory_install_read32_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x00000804, 0x00000807, 0, 0, movie_speedup_r);
	517	speedup_data = memory_install_read32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x00000ae8, 0x00000aeb, 0, 0, speedup_r);
	518	movie_speedup_data = memory_install_read32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x00000804, 0x00000807, 0, 0, movie_speedup_r);
519	519	}
520	520
521	521

src/mame/drivers/st0016.c

r4679	r4680
136	136	AM_RANGE(0x80000000, 0x8001ffff) AM_RAM
137	137	AM_RANGE(0xc0000000, 0xc001ffff) AM_RAM
138	138	AM_RANGE(0x40000000, 0x4000000f) AM_READ(latch32_r) AM_WRITE(latch32_w)
139		AM_RANGE(0xfff80000, 0xffffffff) AM_READ(SMH_BANK2)
	139	AM_RANGE(0xfff80000, 0xffffffff) AM_READ(SMH_BANK(2))
140	140	ADDRESS_MAP_END
141	141
142	142	static ADDRESS_MAP_START( st0016_m2_io, ADDRESS_SPACE_IO, 8 )

src/mame/drivers/cchasm.c

r4679	r4680
68	68
69	69	static void cchasm_6840_irq(running_machine *machine, int state)
70	70	{
71		cpu_set_input_line(machine->cpu[0], 4, state?ASSERT_LINE:CLEAR_LINE);
	71	cputag_set_input_line(machine, "maincpu", 4, state ? ASSERT_LINE : CLEAR_LINE);
72	72	}
73	73	static const ptm6840_interface cchasm_6840_intf =
74	74	{

src/mame/drivers/sbasketb.c

r4679	r4680
64	64
65	65	static WRITE8_HANDLER( sbasketb_sh_irqtrigger_w )
66	66	{
67		cpu_set_input_line_and_vector(space->machine->cpu[1],0,HOLD_LINE,0xff);
	67	cputag_set_input_line_and_vector(space->machine, "audiocpu", 0, HOLD_LINE, 0xff);
68	68	}
69	69
70	70	static WRITE8_HANDLER( sbasketb_coin_counter_w )
r4679	r4680
73	73	}
74	74
75	75
76		static ADDRESS_MAP_START( readmem, ADDRESS_SPACE_PROGRAM, 8 )
77		AM_RANGE(0x2000, 0x3bff) AM_READ(SMH_RAM)
	76	static ADDRESS_MAP_START( sbasketb_map, ADDRESS_SPACE_PROGRAM, 8 )
	77	AM_RANGE(0x2000, 0x2fff) AM_RAM
	78	AM_RANGE(0x3000, 0x33ff) AM_RAM_WRITE(sbasketb_colorram_w) AM_BASE(&colorram)
	79	AM_RANGE(0x3400, 0x37ff) AM_RAM_WRITE(sbasketb_videoram_w) AM_BASE(&videoram)
	80	AM_RANGE(0x3800, 0x39ff) AM_RAM AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
	81	AM_RANGE(0x3a00, 0x3bff) AM_RAM           /* Probably unused, but initialized */
	82	AM_RANGE(0x3c00, 0x3c00) AM_WRITE(watchdog_reset_w)
78	83	AM_RANGE(0x3c10, 0x3c10) AM_READNOP    /* ???? */
	84	AM_RANGE(0x3c20, 0x3c20) AM_WRITEONLY AM_BASE(&sbasketb_palettebank)
	85	AM_RANGE(0x3c80, 0x3c80) AM_WRITE(sbasketb_flipscreen_w)
	86	AM_RANGE(0x3c81, 0x3c81) AM_WRITE(interrupt_enable_w)
	87	AM_RANGE(0x3c83, 0x3c84) AM_WRITE(sbasketb_coin_counter_w)
	88	AM_RANGE(0x3c85, 0x3c85) AM_WRITE(SMH_RAM) AM_BASE(&sbasketb_spriteram_select)
	89	AM_RANGE(0x3d00, 0x3d00) AM_WRITE(soundlatch_w)
	90	AM_RANGE(0x3d80, 0x3d80) AM_WRITE(sbasketb_sh_irqtrigger_w)
79	91	AM_RANGE(0x3e00, 0x3e00) AM_READ_PORT("SYSTEM")
80	92	AM_RANGE(0x3e01, 0x3e01) AM_READ_PORT("P1")
81	93	AM_RANGE(0x3e02, 0x3e02) AM_READ_PORT("P2")
82	94	AM_RANGE(0x3e03, 0x3e03) AM_READNOP
83	95	AM_RANGE(0x3e80, 0x3e80) AM_READ_PORT("DSW2")
84	96	AM_RANGE(0x3f00, 0x3f00) AM_READ_PORT("DSW1")
	97	AM_RANGE(0x3f80, 0x3f80) AM_WRITEONLY AM_BASE(&sbasketb_scroll)
85	98	AM_RANGE(0x6000, 0xffff) AM_READ(SMH_ROM)
86	99	ADDRESS_MAP_END
87	100
88		static ADDRESS_MAP_START( writemem, ADDRESS_SPACE_PROGRAM, 8 )
89		AM_RANGE(0x2000, 0x2fff) AM_WRITE(SMH_RAM)
90		AM_RANGE(0x3000, 0x33ff) AM_WRITE(sbasketb_colorram_w) AM_BASE(&colorram)
91		AM_RANGE(0x3400, 0x37ff) AM_WRITE(sbasketb_videoram_w) AM_BASE(&videoram)
92		AM_RANGE(0x3800, 0x39ff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
93		AM_RANGE(0x3a00, 0x3bff) AM_WRITE(SMH_RAM)           /* Probably unused, but initialized */
94		AM_RANGE(0x3c00, 0x3c00) AM_WRITE(watchdog_reset_w)
95		AM_RANGE(0x3c20, 0x3c20) AM_WRITE(SMH_RAM) AM_BASE(&sbasketb_palettebank)
96		AM_RANGE(0x3c80, 0x3c80) AM_WRITE(sbasketb_flipscreen_w)
97		AM_RANGE(0x3c81, 0x3c81) AM_WRITE(interrupt_enable_w)
98		AM_RANGE(0x3c83, 0x3c84) AM_WRITE(sbasketb_coin_counter_w)
99		AM_RANGE(0x3c85, 0x3c85) AM_WRITE(SMH_RAM) AM_BASE(&sbasketb_spriteram_select)
100		AM_RANGE(0x3d00, 0x3d00) AM_WRITE(soundlatch_w)
101		AM_RANGE(0x3d80, 0x3d80) AM_WRITE(sbasketb_sh_irqtrigger_w)
102		AM_RANGE(0x3f80, 0x3f80) AM_WRITE(SMH_RAM) AM_BASE(&sbasketb_scroll)
103		ADDRESS_MAP_END
104
105		static ADDRESS_MAP_START( sound_readmem, ADDRESS_SPACE_PROGRAM, 8 )
106		AM_RANGE(0x0000, 0x1fff) AM_READ(SMH_ROM)
107		AM_RANGE(0x4000, 0x43ff) AM_READ(SMH_RAM)
	101	static ADDRESS_MAP_START( sbasketb_sound_map, ADDRESS_SPACE_PROGRAM, 8 )
	102	AM_RANGE(0x0000, 0x1fff) AM_ROM
	103	AM_RANGE(0x4000, 0x43ff) AM_RAM
108	104	AM_RANGE(0x6000, 0x6000) AM_READ(soundlatch_r)
109	105	AM_RANGE(0x8000, 0x8000) AM_READ(hyperspt_sh_timer_r)
110		ADDRESS_MAP_END
111
112		static ADDRESS_MAP_START( sound_writemem, ADDRESS_SPACE_PROGRAM, 8 )
113		AM_RANGE(0x4000, 0x43ff) AM_WRITE(SMH_RAM)
114	106	AM_RANGE(0xa000, 0xa000) AM_DEVWRITE("vlm", vlm5030_data_w) /* speech data */
115	107	AM_RANGE(0xc000, 0xdfff) AM_DEVWRITE("vlm", hyperspt_sound_w)     /* speech and output controll */
116	108	AM_RANGE(0xe000, 0xe000) AM_DEVWRITE("dac", dac_w)
r4679	r4680
119	111	ADDRESS_MAP_END
120	112
121	113
122
123	114	static INPUT_PORTS_START( sbasketb )
124	115	PORT_START("SYSTEM")
125	116	KONAMI8_SYSTEM_UNK
r4679	r4680
197	188
198	189	/* basic machine hardware */
199	190	MDRV_CPU_ADD("maincpu", M6809, 1400000)        /* 1.400 MHz ??? */
200		MDRV_CPU_PROGRAM_MAP(readmem,writemem)
	191	MDRV_CPU_PROGRAM_MAP(sbasketb_map,0)
201	192	MDRV_CPU_VBLANK_INT("screen", irq0_line_hold)
202	193
203	194	MDRV_CPU_ADD("audiocpu", Z80, XTAL_14_31818MHz / 4)   /* 3.5795 MHz */
204		MDRV_CPU_PROGRAM_MAP(sound_readmem,sound_writemem)
	195	MDRV_CPU_PROGRAM_MAP(sbasketb_sound_map,0)
205	196
206	197	/* video hardware */
207	198	MDRV_SCREEN_ADD("screen", RASTER)

src/mame/drivers/funkyjet.c

r4679	r4680
102	102
103	103	/******************************************************************************/
104	104
105		static ADDRESS_MAP_START( funkyjet_readmem, ADDRESS_SPACE_PROGRAM, 16 )
106		AM_RANGE(0x000000, 0x07ffff) AM_READ(SMH_ROM)
107		AM_RANGE(0x120000, 0x1207ff) AM_READ(SMH_RAM)
108		AM_RANGE(0x140000, 0x143fff) AM_READ(SMH_RAM)
109		AM_RANGE(0x160000, 0x1607ff) AM_READ(SMH_RAM)
110		AM_RANGE(0x180000, 0x1807ff) AM_READ(deco16_146_funkyjet_prot_r)
111		AM_RANGE(0x320000, 0x321fff) AM_READ(SMH_RAM)
112		AM_RANGE(0x322000, 0x323fff) AM_READ(SMH_RAM)
113		AM_RANGE(0x340000, 0x340bff) AM_READ(SMH_RAM)
114		AM_RANGE(0x342000, 0x342bff) AM_READ(SMH_RAM)
115		ADDRESS_MAP_END
116
117		static ADDRESS_MAP_START( funkyjet_writemem, ADDRESS_SPACE_PROGRAM, 16 )
118		AM_RANGE(0x000000, 0x07ffff) AM_WRITE(SMH_ROM)
119		AM_RANGE(0x120000, 0x1207ff) AM_WRITE(paletteram16_xxxxBBBBGGGGRRRR_word_w) AM_BASE(&paletteram16)
120		AM_RANGE(0x140000, 0x143fff) AM_WRITE(SMH_RAM)
121		AM_RANGE(0x160000, 0x1607ff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16)
122		AM_RANGE(0x180000, 0x1807ff) AM_WRITE(deco16_146_funkyjet_prot_w) AM_BASE(&deco16_prot_ram)
	105	static ADDRESS_MAP_START( funkyjet_map, ADDRESS_SPACE_PROGRAM, 16 )
	106	AM_RANGE(0x000000, 0x07ffff) AM_ROM
	107	AM_RANGE(0x120000, 0x1207ff) AM_RAM_WRITE(paletteram16_xxxxBBBBGGGGRRRR_word_w) AM_BASE(&paletteram16)
	108	AM_RANGE(0x140000, 0x143fff) AM_RAM
	109	AM_RANGE(0x160000, 0x1607ff) AM_RAM AM_BASE(&spriteram16)
	110	AM_RANGE(0x180000, 0x1807ff) AM_READWRITE(deco16_146_funkyjet_prot_r, deco16_146_funkyjet_prot_w) AM_BASE(&deco16_prot_ram)
123	111	AM_RANGE(0x184000, 0x184001) AM_WRITENOP
124	112	AM_RANGE(0x188000, 0x188001) AM_WRITENOP
125	113	AM_RANGE(0x300000, 0x30000f) AM_WRITE(SMH_RAM) AM_BASE(&deco16_pf12_control)
126		AM_RANGE(0x320000, 0x321fff) AM_WRITE(deco16_pf1_data_w) AM_BASE(&deco16_pf1_data)
127		AM_RANGE(0x322000, 0x323fff) AM_WRITE(deco16_pf2_data_w) AM_BASE(&deco16_pf2_data)
128		AM_RANGE(0x340000, 0x340bff) AM_WRITE(SMH_RAM) AM_BASE(&deco16_pf1_rowscroll)
129		AM_RANGE(0x342000, 0x342bff) AM_WRITE(SMH_RAM) AM_BASE(&deco16_pf2_rowscroll)
	114	AM_RANGE(0x320000, 0x321fff) AM_RAM_WRITE(deco16_pf1_data_w) AM_BASE(&deco16_pf1_data)
	115	AM_RANGE(0x322000, 0x323fff) AM_RAM_WRITE(deco16_pf2_data_w) AM_BASE(&deco16_pf2_data)
	116	AM_RANGE(0x340000, 0x340bff) AM_RAM AM_BASE(&deco16_pf1_rowscroll)
	117	AM_RANGE(0x342000, 0x342bff) AM_RAM AM_BASE(&deco16_pf2_rowscroll)
130	118	ADDRESS_MAP_END
131	119
132	120	/******************************************************************************/
133	121
134	122	/* Physical memory map (21 bits) */
135		static ADDRESS_MAP_START( sound_readmem, ADDRESS_SPACE_PROGRAM, 8 )
136		AM_RANGE(0x000000, 0x00ffff) AM_READ(SMH_ROM)
137		AM_RANGE(0x100000, 0x100001) AM_READNOP
138		AM_RANGE(0x110000, 0x110001) AM_DEVREAD("ym", ym2151_r)
139		AM_RANGE(0x120000, 0x120001) AM_DEVREAD("oki", okim6295_r)
140		AM_RANGE(0x130000, 0x130001) AM_READNOP /* This board only has 1 oki chip */
	123	static ADDRESS_MAP_START( sound_map, ADDRESS_SPACE_PROGRAM, 8 )
	124	AM_RANGE(0x000000, 0x00ffff) AM_ROM
	125	AM_RANGE(0x100000, 0x100001) AM_NOP /* YM2203 - this board doesn't have one */
	126	AM_RANGE(0x110000, 0x110001) AM_DEVREADWRITE("ym", ym2151_r, ym2151_w)
	127	AM_RANGE(0x120000, 0x120001) AM_DEVREADWRITE("oki", okim6295_r, okim6295_w)
	128	AM_RANGE(0x130000, 0x130001) AM_NOP /* This board only has 1 oki chip */
141	129	AM_RANGE(0x140000, 0x140001) AM_READ(soundlatch_r)
142		AM_RANGE(0x1f0000, 0x1f1fff) AM_READ(SMH_BANK8)
143		ADDRESS_MAP_END
144
145		static ADDRESS_MAP_START( sound_writemem, ADDRESS_SPACE_PROGRAM, 8 )
146		AM_RANGE(0x000000, 0x00ffff) AM_WRITE(SMH_ROM)
147		AM_RANGE(0x100000, 0x100001) AM_WRITENOP /* YM2203 - this board doesn't have one */
148		AM_RANGE(0x110000, 0x110001) AM_DEVWRITE("ym", ym2151_w)
149		AM_RANGE(0x120000, 0x120001) AM_DEVWRITE("oki", okim6295_w)
150		AM_RANGE(0x130000, 0x130001) AM_WRITENOP
151		AM_RANGE(0x1f0000, 0x1f1fff) AM_WRITE(SMH_BANK8)
	130	AM_RANGE(0x1f0000, 0x1f1fff) AM_RAMBANK(8)
152	131	AM_RANGE(0x1fec00, 0x1fec01) AM_WRITE(h6280_timer_w)
153	132	AM_RANGE(0x1ff400, 0x1ff403) AM_WRITE(h6280_irq_status_w)
154	133	ADDRESS_MAP_END
r4679	r4680
300	279
301	280	static void sound_irq(const device_config *device, int state)
302	281	{
303		cpu_set_input_line(device->machine->cpu[1],1,state); /* IRQ 2 */
	282	cputag_set_input_line(device->machine, "audiocpu", 1, state); /* IRQ 2 */
304	283	}
305	284
306	285	static const ym2151_interface ym2151_config =
r4679	r4680
312	291
313	292	/* basic machine hardware */
314	293	MDRV_CPU_ADD("maincpu", M68000, 14000000) /* 28 MHz crystal */
315		MDRV_CPU_PROGRAM_MAP(funkyjet_readmem,funkyjet_writemem)
	294	MDRV_CPU_PROGRAM_MAP(funkyjet_map,0)
316	295	MDRV_CPU_VBLANK_INT("screen", irq6_line_hold)
317	296
318	297	MDRV_CPU_ADD("audiocpu", H6280,32220000/4)   /* Custom chip 45, Audio section crystal is 32.220 MHz */
319		MDRV_CPU_PROGRAM_MAP(sound_readmem,sound_writemem)
	298	MDRV_CPU_PROGRAM_MAP(sound_map,0)
320	299
321	300	/* video hardware */
322	301	MDRV_SCREEN_ADD("screen", RASTER)

src/mame/drivers/skyarmy.c

r4679	r4680
58	58	tilemap_mark_tile_dirty(skyarmy_tilemap,offset);
59	59	}
60	60
61		static WRITE8_HANDLER( skyarmy_scrollram_w )
62		{
63		skyarmy_scrollram[offset] = data;
64		}
65
66
67		static READ8_HANDLER( skyarmy_scrollram_r )
68		{
69		return skyarmy_scrollram[offset];
70		}
71
72
73	61	static PALETTE_INIT( skyarmy )
74	62	{
75	63	int i;
r4679	r4680
154	142	}
155	143
156	144
157		static ADDRESS_MAP_START( skyarmy_readmem, ADDRESS_SPACE_PROGRAM, 8 )
158		AM_RANGE(0x0000, 0x7FFF) AM_READ(SMH_ROM)
159		AM_RANGE(0x8000, 0x87FF) AM_READ(SMH_RAM)
160		AM_RANGE(0x8800, 0x93FF) AM_READ(SMH_RAM) /* Video RAM */
161		AM_RANGE(0x9800, 0x983F) AM_READ(SMH_RAM) /* Sprites */
162		AM_RANGE(0x9840, 0x985F) AM_READ(skyarmy_scrollram_r) /* Sroll RAM */
163		AM_RANGE(0xA000, 0xA000) AM_READ_PORT("DSW")
164		AM_RANGE(0xA001, 0xA001) AM_READ_PORT("P1")
165		AM_RANGE(0xA002, 0xA002) AM_READ_PORT("P2")
166		AM_RANGE(0xA003, 0xA003) AM_READ_PORT("SYSTEM")
	145	static ADDRESS_MAP_START( skyarmy_map, ADDRESS_SPACE_PROGRAM, 8 )
	146	AM_RANGE(0x0000, 0x7fff) AM_ROM
	147	AM_RANGE(0x8000, 0x87ff) AM_RAM
	148	AM_RANGE(0x8800, 0x8fff) AM_RAM_WRITE(skyarmy_videoram_w) AM_BASE(&skyarmy_videoram) /* Video RAM */
	149	AM_RANGE(0x9000, 0x93ff) AM_RAM_WRITE(skyarmy_colorram_w) AM_BASE(&skyarmy_colorram) /* Color RAM */
	150	AM_RANGE(0x9800, 0x983f) AM_RAM AM_BASE(&spriteram) AM_SIZE(&spriteram_size) /* Sprites */
	151	AM_RANGE(0x9840, 0x985f) AM_RAM AM_BASE(&skyarmy_scrollram)  /* Scroll RAM */
	152	AM_RANGE(0xa000, 0xa000) AM_READ_PORT("DSW")
	153	AM_RANGE(0xa001, 0xa001) AM_READ_PORT("P1")
	154	AM_RANGE(0xa002, 0xa002) AM_READ_PORT("P2")
	155	AM_RANGE(0xa003, 0xa003) AM_READ_PORT("SYSTEM")
	156	AM_RANGE(0xa004, 0xa004) AM_WRITE(nmi_enable_w) // ???
	157	AM_RANGE(0xa005, 0xa005) AM_WRITENOP
	158	AM_RANGE(0xa006, 0xa006) AM_WRITENOP
	159	AM_RANGE(0xa007, 0xa007) AM_WRITENOP
167	160	ADDRESS_MAP_END
168	161
169		static ADDRESS_MAP_START( skyarmy_writemem, ADDRESS_SPACE_PROGRAM, 8 )
170		AM_RANGE(0x0000, 0x7FFF) AM_WRITE(SMH_ROM)
171		AM_RANGE(0x8000, 0x87FF) AM_WRITE(SMH_RAM)
172		AM_RANGE(0x8800, 0x8BFF) AM_WRITE(skyarmy_videoram_w) AM_BASE(&skyarmy_videoram) /* Video RAM */
173		AM_RANGE(0x9000, 0x93FF) AM_WRITE(skyarmy_colorram_w) AM_BASE(&skyarmy_colorram) /* Color RAM */
174		AM_RANGE(0x9800, 0x983F) AM_WRITE(SMH_RAM) AM_BASE(&spriteram) AM_SIZE(&spriteram_size) /* Sprites */
175		AM_RANGE(0x9840, 0x985F) AM_WRITE(skyarmy_scrollram_w) AM_BASE(&skyarmy_scrollram) /* Sprites */
176		AM_RANGE(0xa004, 0xa004) AM_WRITE(nmi_enable_w) // ???
177		AM_RANGE(0xa005, 0xa005) AM_WRITENOP
178		AM_RANGE(0xa006, 0xa006) AM_WRITENOP
179		AM_RANGE(0xa007, 0xa007) AM_WRITENOP
	162	static ADDRESS_MAP_START( skyarmy_io_map, ADDRESS_SPACE_IO, 8 )
	163	ADDRESS_MAP_GLOBAL_MASK(0xff)
	164	AM_RANGE(0x04, 0x05) AM_DEVWRITE("ay", ay8910_address_data_w)
	165	AM_RANGE(0x06, 0x06) AM_DEVREAD("ay", ay8910_r)
180	166	ADDRESS_MAP_END
181	167
182	168	static INPUT_PORTS_START( skyarmy )
r4679	r4680
249	235	GFXDECODE_ENTRY( "gfx2", 0, spritelayout, 0, 32 )
250	236	GFXDECODE_END
251	237
252
253		static ADDRESS_MAP_START( io_map, ADDRESS_SPACE_IO, 8 )
254		ADDRESS_MAP_GLOBAL_MASK(0xff)
255		AM_RANGE(0x04, 0x05) AM_DEVWRITE("ay", ay8910_address_data_w)
256		AM_RANGE(0x06, 0x06) AM_DEVREAD("ay", ay8910_r)
257		ADDRESS_MAP_END
258
259	238	static MACHINE_DRIVER_START( skyarmy )
260	239	MDRV_CPU_ADD("maincpu", Z80,4000000)
261		MDRV_CPU_PROGRAM_MAP(skyarmy_readmem,skyarmy_writemem)
262		MDRV_CPU_IO_MAP(io_map,0)
	240	MDRV_CPU_PROGRAM_MAP(skyarmy_map,0)
	241	MDRV_CPU_IO_MAP(skyarmy_io_map,0)
263	242	MDRV_CPU_VBLANK_INT("screen", irq0_line_hold)
264	243	MDRV_CPU_PERIODIC_INT(skyarmy_nmi_source,650)   /* Hz */
265	244

src/mame/drivers/ksayakyu.c

r4679	r4680
107	107
108	108	static ADDRESS_MAP_START( maincpu_map, ADDRESS_SPACE_PROGRAM, 8 )
109	109	AM_RANGE(0x0000, 0x3fff) AM_ROM
110		AM_RANGE(0x4000, 0x7fff) AM_READWRITE(SMH_BANK1, SMH_NOP)
	110	AM_RANGE(0x4000, 0x7fff) AM_READWRITE(SMH_BANK(1), SMH_NOP)
111	111	AM_RANGE(0x8000, 0x9fff) AM_ROM
112	112	AM_RANGE(0xa000, 0xa7ff) AM_RAM
113	113	AM_RANGE(0xa800, 0xa800) AM_READ_PORT("P1")

src/mame/drivers/qix.c

r4679	r4680
1188	1188
1189	1189	static int kram3_permut2(int tbl_index, int idx, const UINT8 *xor_table)
1190	1190	{
1191		int xor = 0;
	1191	int xorval = 0;
1192	1192
1193	1193	if (idx == 0 || idx == 3)
1194	1194	{
1195		xor = xor_table[tbl_index];
	1195	xorval = xor_table[tbl_index];
1196	1196
1197	1197	// handle missing values in table
1198		if (xor == 99)
1199		return xor;
	1198	if (xorval == 99)
	1199	return xorval;
1200	1200	}
1201	1201
1202		xor ^= 0x02;
	1202	xorval ^= 0x02;
1203	1203
1204	1204	if (idx == 3)
1205		xor = BITSWAP8(xor, 7,6,5,4, 0,2,3,1);
	1205	xorval = BITSWAP8(xorval, 7,6,5,4, 0,2,3,1);
1206	1206
1207		return xor;
	1207	return xorval;
1208	1208	}
1209	1209
1210	1210	static int kram3_decrypt(int address, int value)
r4679	r4680
1258	1258	i = 0;
1259	1259	patch = memory_region(machine, "user1");
1260	1260	rom = memory_region(machine, "maincpu");
1261		decrypted = auto_malloc(0x6000);
	1261	decrypted = auto_alloc_array(machine, UINT8, 0x6000);
1262	1262
1263	1263	memory_set_decrypted_region(mainspace, 0xa000, 0xffff, decrypted);
1264	1264
r4679	r4680
1272	1272	patch = memory_region(machine, "user2");
1273	1273	size = memory_region_length(machine, "user2");
1274	1274	rom = memory_region(machine, "videocpu");
1275		decrypted = auto_malloc(0x6000);
	1275	decrypted = auto_alloc_array(machine, UINT8, 0x6000);
1276	1276
1277	1277	memory_set_decrypted_region(videospace, 0xa000, 0xffff, decrypted);
1278	1278

src/mame/drivers/suprgolf.c

r4679	r4680
70	70	static VIDEO_START( suprgolf )
71	71	{
72	72	suprgolf_tilemap = tilemap_create( machine, get_tile_info,tilemap_scan_rows,8,8,32,32 );
73		paletteram = auto_malloc(0x1000);
74		suprgolf_bg_vram = auto_malloc(0x2000*0x20);
75		suprgolf_bg_pen = auto_malloc(0x2000*0x20);
	73	paletteram = auto_alloc_array(machine, UINT8, 0x1000);
	74	suprgolf_bg_vram = auto_alloc_array(machine, UINT8, 0x2000*0x20);
	75	suprgolf_bg_pen = auto_alloc_array(machine, UINT8, 0x2000*0x20);
76	76
77	77	tilemap_set_transparent_pen(suprgolf_tilemap,15);
78	78	}
r4679	r4680
181	181	suprgolf_bg_bank = (data & 0x1f);
182	182
183	183	if(data & 0x20) //TODO: understand the proper condition
184		cpu_set_input_line(space->machine->cpu[0], INPUT_LINE_NMI, PULSE_LINE);
	184	cputag_set_input_line(space->machine, "maincpu", INPUT_LINE_NMI, PULSE_LINE);
185	185	}
186	186
187	187	static UINT8 pen;

src/mame/drivers/xexex.c

r4679	r4680
273	273
274	274	static WRITE16_HANDLER( sound_irq_w )
275	275	{
276		cpu_set_input_line(space->machine->cpu[1], 0, HOLD_LINE);
	276	cputag_set_input_line(space->machine, "audiocpu", 0, HOLD_LINE);
277	277	}
278	278
279	279	static READ16_HANDLER( sound_status_r )
r4679	r4680
309	309
310	310	// IRQ 5 is the "object DMA end interrupt" and shouldn't be triggered
311	311	// if object data isn't ready for DMA within the frame.
312		cpu_set_input_line(machine->cpu[0], 5, HOLD_LINE);
	312	cputag_set_input_line(machine, "maincpu", 5, HOLD_LINE);
313	313	}
314	314	}
315	315
r4679	r4680
393	393
394	394
395	395	static ADDRESS_MAP_START( sound_map, ADDRESS_SPACE_PROGRAM, 8 )
396		AM_RANGE(0x8000, 0xbfff) AM_READ(SMH_BANK2)
	396	AM_RANGE(0x8000, 0xbfff) AM_READ(SMH_BANK(2))
397	397	AM_RANGE(0x0000, 0xbfff) AM_ROM
398	398	AM_RANGE(0xc000, 0xdfff) AM_RAM
399	399	AM_RANGE(0xe000, 0xe22f) AM_DEVREADWRITE("konami", k054539_r, k054539_w)

src/mame/drivers/himesiki.c

r4679	r4680
101	101	static WRITE8_HANDLER( himesiki_rombank_w )
102	102	{
103	103	UINT8 *ROM = memory_region(space->machine, "maincpu");
104		memory_set_bankptr(space->machine, 1, &ROM[0x10000+0x800*(data & 8)]);
	104	memory_set_bankptr(space->machine, 1, &ROM[0x10000 + 0x800 * (data & 8)]);
105	105
106	106	if (data & 0xf7)
107	107	logerror("p06_w %02x\n",data);
r4679	r4680
110	110	static WRITE8_HANDLER( himesiki_sound_w )
111	111	{
112	112	soundlatch_w(space, offset, data);
113		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_NMI, PULSE_LINE);
	113	cputag_set_input_line(space->machine, "sub", INPUT_LINE_NMI, PULSE_LINE);
114	114	}
115	115
116	116	/****************************************************************************/

src/mame/drivers/marinedt.c

r4679	r4680
115	115	tilemap_mark_tile_dirty(tx_tilemap, offset);
116	116	}
117	117
118		static ADDRESS_MAP_START( marinedt_readmem, ADDRESS_SPACE_PROGRAM, 8 )
119		AM_RANGE(0x0000, 0x37ff) AM_READ(SMH_ROM)
120		AM_RANGE(0x4000, 0x43ff) AM_READ(SMH_RAM)
121		AM_RANGE(0x4400, 0x47ff) AM_READ(SMH_RAM)   //unused, vram mirror?
122		AM_RANGE(0x4000, 0x4bff) AM_READ(SMH_RAM)
123		ADDRESS_MAP_END
124
125		static ADDRESS_MAP_START( marinedt_writemem, ADDRESS_SPACE_PROGRAM, 8 )
126		AM_RANGE(0x0000, 0x37ff) AM_WRITE(SMH_ROM)
127		AM_RANGE(0x4000, 0x47ff) AM_WRITE(SMH_RAM)
128		AM_RANGE(0x4800, 0x4bff) AM_WRITE(tx_tileram_w) AM_BASE(&tx_tileram)
129		AM_RANGE(0x4c00, 0x4c00) AM_WRITENOP   //?? maybe off by one error
130		ADDRESS_MAP_END
131
132	118	static READ8_HANDLER( marinedt_port1_r )
133	119	{
134	120	//might need to be reversed for cocktail stuff
r4679	r4680
270	256
271	257	}
272	258
	259	static ADDRESS_MAP_START( marinedt_map, ADDRESS_SPACE_PROGRAM, 8 )
	260	AM_RANGE(0x0000, 0x37ff) AM_ROM
	261	AM_RANGE(0x4000, 0x43ff) AM_RAM
	262	AM_RANGE(0x4400, 0x47ff) AM_RAM            //unused, vram mirror?
	263	AM_RANGE(0x4800, 0x4bff) AM_RAM_WRITE(tx_tileram_w) AM_BASE(&tx_tileram)
	264	AM_RANGE(0x4c00, 0x4c00) AM_WRITENOP   //?? maybe off by one error
	265	ADDRESS_MAP_END
273	266
274	267	static ADDRESS_MAP_START( marinedt_io_map, ADDRESS_SPACE_IO, 8 )
275	268	ADDRESS_MAP_GLOBAL_MASK(0xff)
r4679	r4680
448	441	tilemap_set_scrolldx(tx_tilemap, 0, 4*8);
449	442	tilemap_set_scrolldy(tx_tilemap, 0, -4*8);
450	443
451		tile = auto_bitmap_alloc(32 * 8, 32 * 8, video_screen_get_format(machine->primary_screen));
452		obj1 = auto_bitmap_alloc(32,32,video_screen_get_format(machine->primary_screen));
453		obj2 = auto_bitmap_alloc(32,32,video_screen_get_format(machine->primary_screen));
	444	tile = auto_bitmap_alloc(machine,32 * 8, 32 * 8, video_screen_get_format(machine->primary_screen));
	445	obj1 = auto_bitmap_alloc(machine,32,32,video_screen_get_format(machine->primary_screen));
	446	obj2 = auto_bitmap_alloc(machine,32,32,video_screen_get_format(machine->primary_screen));
454	447	}
455	448
456	449
r4679	r4680
577	570
578	571	/* basic machine hardware */
579	572	MDRV_CPU_ADD("maincpu", Z80,10000000/4)
580		MDRV_CPU_PROGRAM_MAP(marinedt_readmem,marinedt_writemem)
	573	MDRV_CPU_PROGRAM_MAP(marinedt_map,0)
581	574	MDRV_CPU_IO_MAP(marinedt_io_map,0)
582	575	MDRV_CPU_VBLANK_INT("screen", irq0_line_hold)
583	576

src/mame/drivers/ironhors.c

r4679	r4680
46	46
47	47	static WRITE8_HANDLER( ironhors_sh_irqtrigger_w )
48	48	{
49		cpu_set_input_line_and_vector(space->machine->cpu[1],0,HOLD_LINE,0xff);
	49	cputag_set_input_line_and_vector(space->machine, "soundcpu", 0, HOLD_LINE, 0xff);
50	50	}
51	51
52	52	static WRITE8_DEVICE_HANDLER( ironhors_filter_w )
r4679	r4680
390	390
391	391	static READ8_DEVICE_HANDLER( farwest_soundlatch_r )
392	392	{
393		return soundlatch_r(cpu_get_address_space(device->machine->cpu[1], ADDRESS_SPACE_PROGRAM),0);
	393	return soundlatch_r(cputag_get_address_space(device->machine, "soundcpu", ADDRESS_SPACE_PROGRAM),0);
394	394	}
395	395
396	396	static const ym2203_interface farwest_ym2203_config =

src/mame/drivers/battlex.c

r4679	r4680
59	59
60	60	/*** MEMORY & PORT READ / WRITE **********************************************/
61	61
62		static ADDRESS_MAP_START( readmem, ADDRESS_SPACE_PROGRAM, 8 )
63		AM_RANGE(0x0000, 0x5fff) AM_READ(SMH_ROM)
64		AM_RANGE(0x8000, 0x8fff) AM_READ(SMH_RAM) /* not read? */
65		AM_RANGE(0x9000, 0x91ff) AM_READ(SMH_RAM) /* not read? */
66		AM_RANGE(0xa000, 0xa3ff) AM_READ(SMH_RAM)
67		AM_RANGE(0xe000, 0xe03f) AM_READ(SMH_RAM) /* not read? */
	62	static ADDRESS_MAP_START( battlex_map, ADDRESS_SPACE_PROGRAM, 8 )
	63	AM_RANGE(0x0000, 0x5fff) AM_ROM
	64	AM_RANGE(0x8000, 0x8fff) AM_RAM_WRITE(battlex_videoram_w) AM_BASE(&videoram)
	65	AM_RANGE(0x9000, 0x91ff) AM_RAM AM_BASE(&spriteram)
	66	AM_RANGE(0xa000, 0xa3ff) AM_RAM
	67	AM_RANGE(0xe000, 0xe03f) AM_RAM_WRITE(battlex_palette_w)
68	68	ADDRESS_MAP_END
69	69
70		static ADDRESS_MAP_START( writemem, ADDRESS_SPACE_PROGRAM, 8 )
71		AM_RANGE(0x0000, 0x5fff) AM_WRITE(SMH_ROM)
72		AM_RANGE(0x8000, 0x8fff) AM_WRITE(battlex_videoram_w) AM_BASE(&videoram)
73		AM_RANGE(0x9000, 0x91ff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram)
74		AM_RANGE(0xa000, 0xa3ff) AM_WRITE(SMH_RAM) /* main */
75		AM_RANGE(0xe000, 0xe03f) AM_WRITE(battlex_palette_w) /* probably palette */
76		ADDRESS_MAP_END
77	70
78
79	71	static ADDRESS_MAP_START( io_map, ADDRESS_SPACE_IO, 8 )
80	72	ADDRESS_MAP_GLOBAL_MASK(0xff)
81	73	AM_RANGE(0x00, 0x00) AM_READ_PORT("DSW1")
r4679	r4680
206	198
207	199	/* basic machine hardware */
208	200	MDRV_CPU_ADD("maincpu", Z80,10000000/2 )       /* 10 MHz, divided ? (Z80A CPU) */
209		MDRV_CPU_PROGRAM_MAP(readmem,writemem)
	201	MDRV_CPU_PROGRAM_MAP(battlex_map,0)
210	202	MDRV_CPU_IO_MAP(io_map,0)
211	203	MDRV_CPU_VBLANK_INT_HACK(irq0_line_hold,8) /* controls game speed? */
212	204

src/mame/drivers/skullxbo.c

r4679	r4680
33	33
34	34	static void update_interrupts(running_machine *machine)
35	35	{
36		cpu_set_input_line(machine->cpu[0], 1, atarigen_scanline_int_state ? ASSERT_LINE : CLEAR_LINE);
37		cpu_set_input_line(machine->cpu[0], 2, atarigen_video_int_state ? ASSERT_LINE : CLEAR_LINE);
38		cpu_set_input_line(machine->cpu[0], 4, atarigen_sound_int_state ? ASSERT_LINE : CLEAR_LINE);
	36	cputag_set_input_line(machine, "maincpu", 1, atarigen_scanline_int_state ? ASSERT_LINE : CLEAR_LINE);
	37	cputag_set_input_line(machine, "maincpu", 2, atarigen_video_int_state ? ASSERT_LINE : CLEAR_LINE);
	38	cputag_set_input_line(machine, "maincpu", 4, atarigen_sound_int_state ? ASSERT_LINE : CLEAR_LINE);
39	39	}
40	40
41	41
42	42	static TIMER_CALLBACK( irq_gen )
43	43	{
44		atarigen_scanline_int_gen(machine->cpu[0]);
	44	atarigen_scanline_int_gen(cputag_get_cpu(machine, "maincpu"));
45	45	}
46	46
47	47

src/mame/drivers/adp.c

r4679	r4680
166	166
167	167	static void duart_irq_handler(const device_config *device, UINT8 vector)
168	168	{
169		cpu_set_input_line_and_vector(device->machine->cpu[0], 4, HOLD_LINE, vector);
	169	cputag_set_input_line_and_vector(device->machine, "maincpu", 4, HOLD_LINE, vector);
170	170	};
171	171
172	172	static void duart_tx(const device_config *device, int channel, UINT8 data)
r4679	r4680
241	241	//  UINT32 i;
242	242	//  UINT16 *prgrom = (UINT16*)memory_region(machine, "maincpu");
243	243
244		HD63484_start();
	244	HD63484_start(machine);
245	245
246	246	//  for (i = 0; i < 0x70000; i++)
247	247	//      HD63484_ram[0x90000 + i] = prgrom[i];

src/mame/drivers/sliver.c

r4679	r4680
307	307
308	308	static void render_jpeg(running_machine *machine)
309	309	{
310		int x,y;
311		int addr=jpeg_addr;
	310	int x, y;
	311	int addr = jpeg_addr;
312	312	UINT8 *rom;
313	313
314		bitmap_fill(sliver_bitmap_bg, 0,0);
315		if(jpeg_addr<0)
	314	bitmap_fill(sliver_bitmap_bg, 0, 0);
	315	if(jpeg_addr < 0)
316	316	{
317	317	return;
318	318	}
319	319	rom = memory_region(machine, "user3");
320		for (y=0;y<jpeg_h;y++)
	320	for (y = 0; y < jpeg_h; y++)
321	321	{
322		for (x=0;x<jpeg_w;x++)
	322	for (x = 0; x < jpeg_w; x++)
323	323	{
324		plot_pixel_rgb(x-x_offset+jpeg_x,jpeg_h-y-y_offset-jpeg_y,rom[addr],rom[addr+1],rom[addr+2]);
	324	plot_pixel_rgb(x - x_offset + jpeg_x, jpeg_h - y - y_offset - jpeg_y, rom[addr], rom[addr + 1], rom[addr + 2]);
325	325	addr+=3;
326	326	}
327	327	}
r4679	r4680
329	329
330	330	static int find_data(int offset)
331	331	{
332		int idx=0;
333		while(gfxlookup[idx][0]>=0)
	332	int idx = 0;
	333	while(gfxlookup[idx][0] >= 0)
334	334	{
335		if(offset==gfxlookup[idx][1])
	335	if(offset == gfxlookup[idx][1])
336	336	{
337	337	return idx;
338	338	}
r4679	r4680
346	346	COMBINE_DATA(&jpeg2);
347	347
348	348	{
349		int idx=find_data((int)jpeg2+(((int)jpeg1)<<16));
350		if(idx>=0)
	349	int idx = find_data((int)jpeg2 + (((int)jpeg1) << 16));
	350	if(idx >= 0)
351	351	{
352		jpeg_addr=gfxlookup[idx][0];
353		jpeg_w=gfxlookup[idx][2];
354		jpeg_h=gfxlookup[idx][3];
	352	jpeg_addr = gfxlookup[idx][0];
	353	jpeg_w = gfxlookup[idx][2];
	354	jpeg_h = gfxlookup[idx][3];
355	355	render_jpeg(space->machine);
356	356	}
357	357	else
358	358	{
359		jpeg_addr=-1;
	359	jpeg_addr = -1;
360	360	}
361	361	}
362	362	}
r4679	r4680
370	370	{
371	371	if(io_offset<IO_SIZE)
372	372	{
373		int tmpx,tmpy;
	373	int tmpx, tmpy;
374	374	COMBINE_DATA(&io_reg[io_offset]);
375	375
376		tmpy=io_reg[0x1a]+(io_reg[0x1b]<<8)-io_reg[0x20]; //0x20  ???
377		tmpx=io_reg[0x1e]+(io_reg[0x1f]<<8);
	376	tmpy = io_reg[0x1a] + (io_reg[0x1b] << 8) - io_reg[0x20]; //0x20  ???
	377	tmpx = io_reg[0x1e] + (io_reg[0x1f] << 8);
378	378
379		if(tmpy!=jpeg_y || tmpx!=jpeg_x)
	379	if(tmpy != jpeg_y || tmpx != jpeg_x)
380	380	{
381		jpeg_x=tmpx;
382		jpeg_y=tmpy;
	381	jpeg_x = tmpx;
	382	jpeg_y = tmpy;
383	383	render_jpeg(space->machine);
384	384	}
385	385	}
r4679	r4680
391	391
392	392	static WRITE16_HANDLER(sound_w)
393	393	{
394		soundlatch_w(space,0,data & 0xff);
395		cpu_set_input_line(space->machine->cpu[1], MCS51_INT0_LINE, HOLD_LINE);
	394	soundlatch_w(space, 0, data & 0xff);
	395	cputag_set_input_line(space->machine, "audiocpu", MCS51_INT0_LINE, HOLD_LINE);
396	396	}
397	397
398	398	static ADDRESS_MAP_START( sliver_map, ADDRESS_SPACE_PROGRAM, 16 )
r4679	r4680
590	590	static DRIVER_INIT(sliver)
591	591	{
592	592	jpeg_addr = -1;
593		colorram=auto_malloc(256*3);
	593	colorram=auto_alloc_array(machine, UINT8, 256*3);
594	594	}
595	595
596	596	GAME( 1996, sliver, 0,        sliver, sliver, sliver, ROT0,  "Hollow Corp", "Sliver", GAME_IMPERFECT_GRAPHICS )

src/mame/drivers/konamigq.c

r4679	r4680
67	67	sndto000[ ( offset << 1 ) + 1 ] = data >> 16;
68	68	if( offset == 3 )
69	69	{
70		cpu_set_input_line(space->machine->cpu[1], 1, HOLD_LINE );
	70	cputag_set_input_line(space->machine, "soundcpu", 1, HOLD_LINE );
71	71	}
72	72	}
73	73	if( ACCESSING_BITS_0_15 )
r4679	r4680
141	141	eeprom_write_bit( ( data & 0x01 ) ? 1 : 0 );
142	142	eeprom_set_clock_line( ( data & 0x04 ) ? ASSERT_LINE : CLEAR_LINE );
143	143	eeprom_set_cs_line( ( data & 0x02 ) ? CLEAR_LINE : ASSERT_LINE );
144		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_RESET, ( data & 0x40 ) ? CLEAR_LINE : ASSERT_LINE );
	144	cputag_set_input_line(space->machine, "soundcpu", INPUT_LINE_RESET, ( data & 0x40 ) ? CLEAR_LINE : ASSERT_LINE );
145	145	}
146	146
147	147	/* PCM RAM */
r4679	r4680
270	270	}
271	271
272	272	/* 68000 memory handling */
273		static ADDRESS_MAP_START( sndreadmem, ADDRESS_SPACE_PROGRAM, 16 )
274		AM_RANGE(0x000000, 0x07ffff) AM_READ(SMH_ROM)
275		AM_RANGE(0x100000, 0x10ffff) AM_READ(SMH_RAM)
276		AM_RANGE(0x200000, 0x2004ff) AM_READ(dual539_r)
277		AM_RANGE(0x300000, 0x300001) AM_READ(tms57002_data_word_r)
278		AM_RANGE(0x400010, 0x40001f) AM_READ(sndcomm68k_r)
279		AM_RANGE(0x500000, 0x500001) AM_READ(tms57002_status_word_r)
280		ADDRESS_MAP_END
281
282		static ADDRESS_MAP_START( sndwritemem, ADDRESS_SPACE_PROGRAM, 16 )
283		AM_RANGE(0x100000, 0x10ffff) AM_WRITE(SMH_RAM)
284		AM_RANGE(0x200000, 0x2004ff) AM_WRITE(dual539_w)
285		AM_RANGE(0x300000, 0x300001) AM_WRITE(tms57002_data_word_w)
	273	static ADDRESS_MAP_START( konamigq_sound_map, ADDRESS_SPACE_PROGRAM, 16 )
	274	AM_RANGE(0x000000, 0x07ffff) AM_ROM
	275	AM_RANGE(0x100000, 0x10ffff) AM_RAM
	276	AM_RANGE(0x200000, 0x2004ff) AM_READWRITE(dual539_r,dual539_w)
	277	AM_RANGE(0x300000, 0x300001) AM_READWRITE(tms57002_data_word_r,tms57002_data_word_w)
286	278	AM_RANGE(0x400000, 0x40000f) AM_WRITE(sndcomm68k_w)
287		AM_RANGE(0x500000, 0x500001) AM_WRITE(tms57002_control_word_w)
	279	AM_RANGE(0x400010, 0x40001f) AM_READ(sndcomm68k_r)
	280	AM_RANGE(0x500000, 0x500001) AM_READWRITE(tms57002_status_word_r,tms57002_control_word_w)
288	281	AM_RANGE(0x580000, 0x580001) AM_WRITENOP /* ?? */
289	282	ADDRESS_MAP_END
290	283
	284
291	285	static const k054539_interface k054539_config =
292	286	{
293	287	"shared"
r4679	r4680
391	385	MDRV_CPU_VBLANK_INT("screen", psx_vblank)
392	386
393	387	MDRV_CPU_ADD( "soundcpu", M68000, 8000000 )
394		MDRV_CPU_PROGRAM_MAP( sndreadmem, sndwritemem )
	388	MDRV_CPU_PROGRAM_MAP( konamigq_sound_map, 0 )
395	389	MDRV_CPU_PERIODIC_INT( irq2_line_hold, 480 )
396	390
397	391	MDRV_MACHINE_START( konamigq )

src/mame/drivers/epos.c

r4679	r4680
60	60	*
61	61	*************************************/
62	62
63		static ADDRESS_MAP_START( readmem, ADDRESS_SPACE_PROGRAM, 8 )
64		AM_RANGE(0x0000, 0x77ff) AM_READ(SMH_ROM)
65		AM_RANGE(0x7800, 0xffff) AM_READ(SMH_RAM)
	63	static ADDRESS_MAP_START( epos_map, ADDRESS_SPACE_PROGRAM, 8 )
	64	AM_RANGE(0x0000, 0x77ff) AM_ROM
	65	AM_RANGE(0x7800, 0x7fff) AM_RAM
	66	AM_RANGE(0x8000, 0xffff) AM_RAM AM_BASE(&videoram) AM_SIZE(&videoram_size)
66	67	ADDRESS_MAP_END
67	68
68	69
69		static ADDRESS_MAP_START( writemem, ADDRESS_SPACE_PROGRAM, 8 )
70		AM_RANGE(0x0000, 0x77ff) AM_WRITE(SMH_ROM)
71		AM_RANGE(0x7800, 0x7fff) AM_WRITE(SMH_RAM)
72		AM_RANGE(0x8000, 0xffff) AM_WRITE(SMH_RAM) AM_BASE(&videoram) AM_SIZE(&videoram_size)
	70	static ADDRESS_MAP_START( dealer_map, ADDRESS_SPACE_PROGRAM, 8 )
	71	AM_RANGE(0x0000, 0x5fff) AM_ROMBANK(1)
	72	AM_RANGE(0x6000, 0x6fff) AM_ROMBANK(2)
	73	AM_RANGE(0x7000, 0x7fff) AM_RAM
	74	AM_RANGE(0x8000, 0xffff) AM_RAM AM_BASE(&videoram) AM_SIZE(&videoram_size)
73	75	ADDRESS_MAP_END
74	76
75
76		static ADDRESS_MAP_START( dealer_readmem, ADDRESS_SPACE_PROGRAM, 8 )
77		AM_RANGE(0x0000, 0x5fff) AM_READ(SMH_BANK1)
78		AM_RANGE(0x6000, 0x6fff) AM_READ(SMH_BANK2)
79		AM_RANGE(0x7000, 0xffff) AM_READ(SMH_RAM)
80		ADDRESS_MAP_END
81
82		static ADDRESS_MAP_START( dealer_writemem, ADDRESS_SPACE_PROGRAM, 8 )
83		AM_RANGE(0x0000, 0x6fff) AM_WRITE(SMH_ROM)
84		AM_RANGE(0x7000, 0x7fff) AM_WRITE(SMH_RAM)
85		AM_RANGE(0x8000, 0xffff) AM_WRITE(SMH_RAM) AM_BASE(&videoram) AM_SIZE(&videoram_size)
86		ADDRESS_MAP_END
87
88	77	/*************************************
89	78	*
90	79	*  Main CPU port handlers
r4679	r4680
382	371
383	372	/* basic machine hardware */
384	373	MDRV_CPU_ADD("maincpu", Z80, 11000000/4)   /* 2.75 MHz (see notes) */
385		MDRV_CPU_PROGRAM_MAP(readmem,writemem)
	374	MDRV_CPU_PROGRAM_MAP(epos_map,0)
386	375	MDRV_CPU_IO_MAP(io_map,0)
387	376	MDRV_CPU_VBLANK_INT("screen", irq0_line_hold)
388	377
r4679	r4680
406	395	static MACHINE_DRIVER_START( dealer )
407	396	/* basic machine hardware */
408	397	MDRV_CPU_ADD("maincpu", Z80, 11000000/4)   /* 2.75 MHz (see notes) */
409		MDRV_CPU_PROGRAM_MAP(dealer_readmem,dealer_writemem)
	398	MDRV_CPU_PROGRAM_MAP(dealer_map,0)
410	399	MDRV_CPU_IO_MAP(dealer_io_map,0)
411	400	MDRV_CPU_VBLANK_INT("screen", irq0_line_hold)
412	401

src/mame/drivers/mrflea.c

r4679	r4680
82	82
83	83	static GFXDECODE_START( mrflea )
84	84	GFXDECODE_ENTRY( "gfx1", 0, sprite_layout,   0x10, 1 )
85		GFXDECODE_ENTRY( "gfx2", 0, tile_layout,      0x00, 1 )
	85	GFXDECODE_ENTRY( "gfx2", 0, tile_layout,   0x00, 1 )
86	86	GFXDECODE_END
87	87
88	88	/*******************************************************/
89	89
90		static ADDRESS_MAP_START( readmem, ADDRESS_SPACE_PROGRAM, 8 )
91		AM_RANGE(0x0000, 0xbfff) AM_READ(SMH_ROM)
92		AM_RANGE(0xc000, 0xcfff) AM_READ(SMH_RAM)
93		ADDRESS_MAP_END
94
95		static ADDRESS_MAP_START( writemem, ADDRESS_SPACE_PROGRAM, 8 )
96		AM_RANGE(0x0000, 0xbfff) AM_WRITE(SMH_ROM)
97		AM_RANGE(0xc000, 0xcfff) AM_WRITE(SMH_RAM)
98		AM_RANGE(0xe000, 0xe7ff) AM_WRITE(mrflea_videoram_w) AM_BASE(&videoram)
99		AM_RANGE(0xe800, 0xe83f) AM_WRITE(paletteram_xxxxRRRRGGGGBBBB_le_w) AM_BASE(&paletteram)
100		AM_RANGE(0xec00, 0xecff) AM_WRITE(mrflea_spriteram_w) AM_BASE(&spriteram)
101		ADDRESS_MAP_END
102
103		static ADDRESS_MAP_START( readmem_io, ADDRESS_SPACE_PROGRAM, 8 )
104		AM_RANGE(0x0000, 0x0fff) AM_READ(SMH_ROM)
105		AM_RANGE(0x2000, 0x3fff) AM_READ(SMH_ROM)
106		AM_RANGE(0x8000, 0x80ff) AM_READ(SMH_RAM)
107		AM_RANGE(0x9000, 0x905a) AM_READ(SMH_RAM) /* ? */
108		ADDRESS_MAP_END
109
110		static ADDRESS_MAP_START( writemem_io, ADDRESS_SPACE_PROGRAM, 8 )
111		AM_RANGE(0x0000, 0x0fff) AM_WRITE(SMH_ROM)
112		AM_RANGE(0x2000, 0x3fff) AM_WRITE(SMH_ROM)
113		AM_RANGE(0x8000, 0x80ff) AM_WRITE(SMH_RAM)
114		AM_RANGE(0x9000, 0x905a) AM_WRITE(SMH_RAM) /* ? */
115		ADDRESS_MAP_END
116
117		/*******************************************************/
118
119		static WRITE8_HANDLER( mrflea_main_w ){
	90	static WRITE8_HANDLER( mrflea_main_w )
	91	{
120	92	mrflea_status |= 0x01; // pending command to main CPU
121	93	mrflea_main = data;
122	94	}
123	95
124		static WRITE8_HANDLER( mrflea_io_w ){
	96	static WRITE8_HANDLER( mrflea_io_w )
	97	{
125	98	mrflea_status |= 0x08; // pending command to IO CPU
126	99	mrflea_io = data;
127		cpu_set_input_line(space->machine->cpu[1], 0, HOLD_LINE );
	100	cputag_set_input_line(space->machine, "sub", 0, HOLD_LINE );
128	101	}
129	102
130		static READ8_HANDLER( mrflea_main_r ){
	103	static READ8_HANDLER( mrflea_main_r )
	104	{
131	105	mrflea_status &= ~0x01; // main CPU command read
132	106	return mrflea_main;
133	107	}
134	108
135		static READ8_HANDLER( mrflea_io_r ){
	109	static READ8_HANDLER( mrflea_io_r )
	110	{
136	111	mrflea_status &= ~0x08; // IO CPU command read
137	112	return mrflea_io;
138	113	}
139	114
140	115	/*******************************************************/
141	116
142		static READ8_HANDLER( mrflea_main_status_r ){
	117	static READ8_HANDLER( mrflea_main_status_r )
	118	{
143	119	/*  0x01: main CPU command pending
144	120	0x08: io cpu ready */
145	121	return mrflea_status^0x08;
146	122	}
147	123
148		static READ8_HANDLER( mrflea_io_status_r ){
	124	static READ8_HANDLER( mrflea_io_status_r )
	125	{
149	126	/*  0x08: IO CPU command pending
150	127	0x01: main cpu ready */
151	128	return mrflea_status^0x01;
152	129	}
153	130
154		static INTERRUPT_GEN( mrflea_io_interrupt ){
	131	static INTERRUPT_GEN( mrflea_slave_interrupt )
	132	{
155	133	if( cpu_getiloops(device)==0 || (mrflea_status&0x08) )
156	134	cpu_set_input_line(device, 0, HOLD_LINE);
157	135	}
158	136
159		static READ8_HANDLER( mrflea_interrupt_type_r ){
	137	static READ8_HANDLER( mrflea_interrupt_type_r )
	138	{
160	139	/* there are two interrupt types:
161	140	1. triggered (in response to sound command)
162	141	2. heartbeat (for music timing)
r4679	r4680
167	146
168	147	/*******************************************************/
169	148
170		static ADDRESS_MAP_START( io_map, ADDRESS_SPACE_IO, 8 )
	149	static ADDRESS_MAP_START( mrflea_master_map, ADDRESS_SPACE_PROGRAM, 8 )
	150	AM_RANGE(0x0000, 0xbfff) AM_ROM
	151	AM_RANGE(0xc000, 0xcfff) AM_RAM
	152	AM_RANGE(0xe000, 0xe7ff) AM_RAM_WRITE(mrflea_videoram_w) AM_BASE(&videoram)
	153	AM_RANGE(0xe800, 0xe83f) AM_RAM_WRITE(paletteram_xxxxRRRRGGGGBBBB_le_w) AM_BASE(&paletteram)
	154	AM_RANGE(0xec00, 0xecff) AM_RAM_WRITE(mrflea_spriteram_w) AM_BASE(&spriteram)
	155	ADDRESS_MAP_END
	156
	157	static ADDRESS_MAP_START( mrflea_master_io_map, ADDRESS_SPACE_IO, 8 )
171	158	ADDRESS_MAP_GLOBAL_MASK(0xff)
172	159	AM_RANGE(0x00, 0x00) AM_WRITENOP /* watchdog? */
173	160	AM_RANGE(0x40, 0x40) AM_WRITE(mrflea_io_w)
r4679	r4680
179	166
180	167	/*******************************************************/
181	168
182		static WRITE8_HANDLER( mrflea_select1_w ){
	169	static WRITE8_HANDLER( mrflea_select1_w )
	170	{
183	171	mrflea_select1 = data;
184	172	}
185	173
r4679	r4680
188	176	return 0x00;
189	177	}
190	178
191		static WRITE8_HANDLER( mrflea_data1_w ){
	179	static WRITE8_HANDLER( mrflea_data1_w )
	180	{
192	181	}
193	182
194		static ADDRESS_MAP_START( inout_io_map, ADDRESS_SPACE_IO, 8 )
	183	static ADDRESS_MAP_START( mrflea_slave_map, ADDRESS_SPACE_PROGRAM, 8 )
	184	AM_RANGE(0x0000, 0x0fff) AM_ROM
	185	AM_RANGE(0x2000, 0x3fff) AM_ROM
	186	AM_RANGE(0x8000, 0x80ff) AM_RAM
	187	AM_RANGE(0x9000, 0x905a) AM_RAM /* ? */
	188	ADDRESS_MAP_END
	189
	190	static ADDRESS_MAP_START( mrflea_slave_io_map, ADDRESS_SPACE_IO, 8 )
195	191	ADDRESS_MAP_GLOBAL_MASK(0xff)
196	192	AM_RANGE(0x00, 0x00) AM_WRITENOP /* watchdog */
197	193	AM_RANGE(0x10, 0x10) AM_READWRITE(mrflea_interrupt_type_r, SMH_NOP) /* ? / irq ACK */
r4679	r4680
232	228
233	229	/* basic machine hardware */
234	230	MDRV_CPU_ADD("maincpu", Z80, 4000000) /* 4 MHz? */
235		MDRV_CPU_PROGRAM_MAP(readmem,writemem)
236		MDRV_CPU_IO_MAP(io_map,0)
	231	MDRV_CPU_PROGRAM_MAP(mrflea_master_map,0)
	232	MDRV_CPU_IO_MAP(mrflea_master_io_map,0)
237	233	MDRV_CPU_VBLANK_INT("screen", irq0_line_hold) /* NMI resets the game */
238	234
239	235	MDRV_CPU_ADD("sub", Z80, 6000000)
240		MDRV_CPU_PROGRAM_MAP(readmem_io,writemem_io)
241		MDRV_CPU_IO_MAP(inout_io_map,0)
242		MDRV_CPU_VBLANK_INT_HACK(mrflea_io_interrupt,2)
	236	MDRV_CPU_PROGRAM_MAP(mrflea_slave_map,0)
	237	MDRV_CPU_IO_MAP(mrflea_slave_io_map,0)
	238	MDRV_CPU_VBLANK_INT_HACK(mrflea_slave_interrupt,2)
243	239
244	240	MDRV_QUANTUM_TIME(HZ(6000))
245	241

src/mame/drivers/cps3.c

r4679	r4680
620	620	return ((value<<n)|aux)%0x10000;
621	621	}
622	622
623		static UINT16 rotxor(UINT16 val, UINT16 xor)
	623	static UINT16 rotxor(UINT16 val, UINT16 xorval)
624	624	{
625	625	UINT16 res;
626	626
627	627	res = val + rotate_left(val,2);
628	628
629		res = rotate_left(res,4) ^ (res & (val ^ xor));
	629	res = rotate_left(res,4) ^ (res & (val ^ xorval));
630	630
631	631	return res;
632	632	}
r4679	r4680
690	690	cps3_user4region = memory_region(machine,"user4");
691	691	cps3_user5region = memory_region(machine,"user5");
692	692
693		if (!cps3_user4region) cps3_user4region = auto_malloc(USER4REGION_LENGTH);
694		if (!cps3_user5region) cps3_user5region = auto_malloc(USER5REGION_LENGTH);
	693	if (!cps3_user4region) cps3_user4region = auto_alloc_array(machine, UINT8, USER4REGION_LENGTH);
	694	if (!cps3_user5region) cps3_user5region = auto_alloc_array(machine, UINT8, USER5REGION_LENGTH);
695	695
696	696	// set strict verify
697		sh2drc_set_options(machine->cpu[0], SH2DRC_STRICT_VERIFY);
	697	sh2drc_set_options(cputag_get_cpu(machine, "maincpu"), SH2DRC_STRICT_VERIFY);
698	698
699	699	cps3_decrypt_bios(machine);
700		decrypted_gamerom = auto_malloc(0x1000000);
	700	decrypted_gamerom = auto_alloc_array(machine, UINT32, 0x1000000/4);
701	701
702	702	/* just some NOPs for the game to execute if it crashes and starts executing unmapped addresses
703	703	- this prevents MAME from crashing */
704		cps3_nops = auto_malloc(0x4);
	704	cps3_nops = auto_alloc(machine, UINT32);
705	705	cps3_nops[0] = 0x00090009;
706	706
707	707
708		cps3_0xc0000000_ram_decrypted = auto_malloc(0x400);
709		memory_set_direct_update_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), cps3_direct_handler);
	708	cps3_0xc0000000_ram_decrypted = auto_alloc_array(machine, UINT32, 0x400/4);
	709	memory_set_direct_update_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), cps3_direct_handler);
710	710
711	711	// flash roms
712	712
713	713	for (i=0;i<48;i++)
714	714	intelflash_init( machine, i, FLASH_FUJITSU_29F016A, NULL );
715	715
716		cps3_eeprom = auto_malloc(0x400);
	716	cps3_eeprom = auto_alloc_array(machine, UINT32, 0x400/4);
717	717	}
718	718
719	719	static DRIVER_INIT( jojo )    { cps3_key1 = 0x02203ee3; cps3_key2 = 0x01301972; cps3_altEncryption = 0; DRIVER_INIT_CALL(cps3); }
r4679	r4680
796	796
797	797	static VIDEO_START(cps3)
798	798	{
799		cps3_ss_ram       = auto_malloc(0x10000);
	799	cps3_ss_ram       = auto_alloc_array(machine, UINT32, 0x10000/4);
800	800	memset(cps3_ss_ram, 0x00, 0x10000);
801	801	state_save_register_global_pointer(machine, cps3_ss_ram, 0x10000/4);
802	802
803		cps3_char_ram = auto_malloc(0x800000);
	803	cps3_char_ram = auto_alloc_array(machine, UINT32, 0x800000/4);
804	804	memset(cps3_char_ram, 0x00, 0x800000);
805	805	state_save_register_global_pointer(machine, cps3_char_ram, 0x800000 /4);
806	806
r4679	r4680
815	815
816	816	//decode_charram();
817	817
818		cps3_mame_colours = auto_malloc(0x80000);
	818	cps3_mame_colours = auto_alloc_array(machine, UINT32, 0x80000/4);
819	819	memset(cps3_mame_colours, 0x00, 0x80000);
820	820
821	821	cps3_screenwidth = 384;
822	822
823	823	// the renderbuffer can be twice the size of the screen, this allows us to handle framebuffer zoom values
824	824	// between 0x00 and 0x80 (0x40 is normal, 0x80 would be 'view twice as much', 0x20 is 'view half as much')
825		renderbuffer_bitmap = auto_bitmap_alloc(512*2,224*2,video_screen_get_format(machine->primary_screen));
	825	renderbuffer_bitmap = auto_bitmap_alloc(machine,512*2,224*2,video_screen_get_format(machine->primary_screen));
826	826
827	827	renderbuffer_clip.min_x = 0;
828	828	renderbuffer_clip.max_x = cps3_screenwidth-1;
r4679	r4680
1429	1429	UINT32* romdata = (UINT32*)cps3_user5region;
1430	1430	int real_offset = 0;
1431	1431	UINT32 newdata;
1432		UINT8* ptr1 = intelflash_getmemptr(flash1);
1433		UINT8* ptr2 = intelflash_getmemptr(flash2);
	1432	UINT8* ptr1 = (UINT8*)intelflash_getmemptr(flash1);
	1433	UINT8* ptr2 = (UINT8*)intelflash_getmemptr(flash2);
1434	1434
1435	1435	real_offset = ((cram_gfxflash_bank&0x3e) * 0x200000) + offset*4;
1436	1436
r4679	r4680
1532	1532	UINT32* romdata2 = (UINT32*)decrypted_gamerom;
1533	1533	int real_offset = 0;
1534	1534	UINT32 newdata;
1535		UINT8* ptr1 = intelflash_getmemptr(base+0);
1536		UINT8* ptr2 = intelflash_getmemptr(base+1);
1537		UINT8* ptr3 = intelflash_getmemptr(base+2);
1538		UINT8* ptr4 = intelflash_getmemptr(base+3);
	1535	UINT8* ptr1 = (UINT8*)intelflash_getmemptr(base+0);
	1536	UINT8* ptr2 = (UINT8*)intelflash_getmemptr(base+1);
	1537	UINT8* ptr3 = (UINT8*)intelflash_getmemptr(base+2);
	1538	UINT8* ptr4 = (UINT8*)intelflash_getmemptr(base+3);
1539	1539
1540	1540	real_offset = offset * 4;
1541	1541
r4679	r4680
1806	1806	}
1807	1807
1808	1808
1809		cpu_set_input_line(space->machine->cpu[0],10, ASSERT_LINE);
	1809	cputag_set_input_line(space->machine, "maincpu", 10, ASSERT_LINE);
1810	1810
1811	1811
1812	1812	}
r4679	r4680
2002	2002
2003	2003	//printf("charDMA start:\n");
2004	2004
2005		for (i=0;i<0x1000;i+=3)
	2005	for (i = 0; i < 0x1000; i += 3)
2006	2006	{
2007		UINT32 dat1 = LITTLE_ENDIANIZE_INT32(cps3_char_ram[i+0+(address)]);
2008		UINT32 dat2 = LITTLE_ENDIANIZE_INT32(cps3_char_ram[i+1+(address)]);
2009		UINT32 dat3 = LITTLE_ENDIANIZE_INT32(cps3_char_ram[i+2+(address)]);
2010		UINT32 real_source      = (dat3<<1)-0x400000;
2011		UINT32 real_destination =  dat2<<3;
2012		UINT32 real_length      = (((dat1&0x001fffff)+1)<<3);
	2007	UINT32 dat1 = LITTLE_ENDIANIZE_INT32(cps3_char_ram[i + 0 + (address)]);
	2008	UINT32 dat2 = LITTLE_ENDIANIZE_INT32(cps3_char_ram[i + 1 + (address)]);
	2009	UINT32 dat3 = LITTLE_ENDIANIZE_INT32(cps3_char_ram[i + 2 + (address)]);
	2010	UINT32 real_source      = (dat3 << 1) - 0x400000;
	2011	UINT32 real_destination =  dat2 << 3;
	2012	UINT32 real_length      = (((dat1 & 0x001fffff) + 1) << 3);
2013	2013
2014	2014	/* 0x01000000 is the end of list marker, 0x13131313 is our default fill */
2015		if ((dat1==0x01000000) || (dat1==0x13131313)) break;
	2015	if ((dat1 == 0x01000000) || (dat1 == 0x13131313)) break;
2016	2016
2017	2017	//printf("%08x %08x %08x real_source %08x (rom %d offset %08x) real_destination %08x, real_length %08x\n", dat1, dat2, dat3, real_source, real_source/0x800000, real_source%0x800000, real_destination, real_length);
2018	2018
2019		if  ( (dat1&0x00e00000) ==0x00800000 )
	2019	if  ((dat1 & 0x00e00000) == 0x00800000)
2020	2020	{
2021	2021	/* Sets a table used by the decompression routines */
2022	2022	{
2023	2023	/* We should probably copy this, but a pointer to it is fine for our purposes as the data doesn't change */
2024	2024	current_table_address = real_source;
2025	2025	}
2026		cpu_set_input_line(machine->cpu[0],10, ASSERT_LINE);
	2026	cputag_set_input_line(machine, "maincpu", 10, ASSERT_LINE);
2027	2027	}
2028		else if  ( (dat1&0x00e00000) ==0x00400000 )
	2028	else if  ((dat1 & 0x00e00000) == 0x00400000)
2029	2029	{
2030	2030	/* 6bpp DMA decompression
2031	2031	- this is used for the majority of sprites and backgrounds */
2032	2032	cps3_do_char_dma( machine, real_source, real_destination, real_length );
2033		cpu_set_input_line(machine->cpu[0],10, ASSERT_LINE);
	2033	cputag_set_input_line(machine, "maincpu", 10, ASSERT_LINE);
2034	2034
2035	2035	}
2036		else if  ( (dat1&0x00e00000) ==0x00600000 )
	2036	else if  ((dat1 & 0x00e00000) == 0x00600000)
2037	2037	{
2038	2038	/* 8bpp DMA decompression
2039	2039	- this is used on SFIII NG Sean's Stage ONLY */
2040	2040	cps3_do_alt_char_dma( machine, real_source, real_destination, real_length);
2041		cpu_set_input_line(machine->cpu[0],10, ASSERT_LINE);
	2041	cputag_set_input_line(machine, "maincpu", 10, ASSERT_LINE);
2042	2042	}
2043	2043	else
2044	2044	{
r4679	r4680
2095	2095
2096	2096	static WRITE32_HANDLER( cps3_irq10_ack_w )
2097	2097	{
2098		cpu_set_input_line(space->machine->cpu[0],10, CLEAR_LINE); return;
	2098	cputag_set_input_line(space->machine, "maincpu", 10, CLEAR_LINE); return;
2099	2099	}
2100	2100
2101	2101	static WRITE32_HANDLER( cps3_irq12_ack_w )
2102	2102	{
2103		cpu_set_input_line(space->machine->cpu[0],12, CLEAR_LINE); return;
	2103	cputag_set_input_line(space->machine, "maincpu", 12, CLEAR_LINE); return;
2104	2104	}
2105	2105
2106	2106	static WRITE32_HANDLER( cps3_unk_vidregs_w )
r4679	r4680
2297	2297	for (i=0;i<0x800000;i+=4)
2298	2298	{
2299	2299	UINT32 data;
2300		UINT8* ptr1 = intelflash_getmemptr(0);
2301		UINT8* ptr2 = intelflash_getmemptr(1);
2302		UINT8* ptr3 = intelflash_getmemptr(2);
2303		UINT8* ptr4 = intelflash_getmemptr(3);
	2300	UINT8* ptr1 = (UINT8*)intelflash_getmemptr(0);
	2301	UINT8* ptr2 = (UINT8*)intelflash_getmemptr(1);
	2302	UINT8* ptr3 = (UINT8*)intelflash_getmemptr(2);
	2303	UINT8* ptr4 = (UINT8*)intelflash_getmemptr(3);
2304	2304
2305	2305	data = romdata[i/4];
2306	2306
r4679	r4680
2313	2313	for (i=0;i<0x800000;i+=4)
2314	2314	{
2315	2315	UINT32 data;
2316		UINT8* ptr1 = intelflash_getmemptr(4);
2317		UINT8* ptr2 = intelflash_getmemptr(5);
2318		UINT8* ptr3 = intelflash_getmemptr(6);
2319		UINT8* ptr4 = intelflash_getmemptr(7);
	2316	UINT8* ptr1 = (UINT8*)intelflash_getmemptr(4);
	2317	UINT8* ptr2 = (UINT8*)intelflash_getmemptr(5);
	2318	UINT8* ptr3 = (UINT8*)intelflash_getmemptr(6);
	2319	UINT8* ptr4 = (UINT8*)intelflash_getmemptr(7);
2320	2320
2321	2321	data = romdata[(0x800000+i)/4];
2322	2322
r4679	r4680
2338	2338
2339	2339	for (i=0;i<0x200000;i+=2)
2340	2340	{
2341		UINT8* ptr1 = intelflash_getmemptr(flashnum);
2342		UINT8* ptr2 = intelflash_getmemptr(flashnum+1);
	2341	UINT8* ptr1 = (UINT8*)intelflash_getmemptr(flashnum);
	2342	UINT8* ptr2 = (UINT8*)intelflash_getmemptr(flashnum+1);
2343	2343	UINT32 dat = romdata[(thebase+i)/2];
2344	2344
2345	2345	ptr1[BYTE_XOR_LE(i+1)] =  (dat&0xff000000)>>24;
r4679	r4680
2364	2364	for (i=0;i<0x800000;i+=4)
2365	2365	{
2366	2366	UINT32 data;
2367		UINT8* ptr1 = intelflash_getmemptr(0);
2368		UINT8* ptr2 = intelflash_getmemptr(1);
2369		UINT8* ptr3 = intelflash_getmemptr(2);
2370		UINT8* ptr4 = intelflash_getmemptr(3);
	2367	UINT8* ptr1 = (UINT8*)intelflash_getmemptr(0);
	2368	UINT8* ptr2 = (UINT8*)intelflash_getmemptr(1);
	2369	UINT8* ptr3 = (UINT8*)intelflash_getmemptr(2);
	2370	UINT8* ptr4 = (UINT8*)intelflash_getmemptr(3);
2371	2371
2372	2372	data = ((ptr1[i/4]<<24) | (ptr2[i/4]<<16) | (ptr3[i/4]<<8) | (ptr4[i/4]<<0));
2373	2373
r4679	r4680
2383	2383	for (i=0;i<0x800000;i+=4)
2384	2384	{
2385	2385	UINT32 data;
2386		UINT8* ptr1 = intelflash_getmemptr(4);
2387		UINT8* ptr2 = intelflash_getmemptr(5);
2388		UINT8* ptr3 = intelflash_getmemptr(6);
2389		UINT8* ptr4 = intelflash_getmemptr(7);
	2386	UINT8* ptr1 = (UINT8*)intelflash_getmemptr(4);
	2387	UINT8* ptr2 = (UINT8*)intelflash_getmemptr(5);
	2388	UINT8* ptr3 = (UINT8*)intelflash_getmemptr(6);
	2389	UINT8* ptr4 = (UINT8*)intelflash_getmemptr(7);
2390	2390
2391	2391	data = ((ptr1[i/4]<<24) | (ptr2[i/4]<<16) | (ptr3[i/4]<<8) | (ptr4[i/4]<<0));
2392	2392
r4679	r4680
2408	2408
2409	2409	for (i=0;i<0x200000;i+=2)
2410	2410	{
2411		UINT8* ptr1 = intelflash_getmemptr(flashnum);
2412		UINT8* ptr2 = intelflash_getmemptr(flashnum+1);
	2411	UINT8* ptr1 = (UINT8*)intelflash_getmemptr(flashnum);
	2412	UINT8* ptr2 = (UINT8*)intelflash_getmemptr(flashnum+1);
2413	2413	UINT32 dat = (ptr1[i+0]<<8) |
2414	2414	(ptr1[i+1]<<24) |
2415	2415	(ptr2[i+0]<<0) |
r4679	r4680
2476	2476
2477	2477
2478	2478
2479		static UINT32 cps3_dma_callback(UINT32 src, UINT32 dst, UINT32 data, int size)
	2479	static int cps3_dma_callback(UINT32 src, UINT32 dst, UINT32 data, int size)
2480	2480	{
2481	2481	/*
2482	2482	on the actual CPS3 hardware the SH2 DMA bypasses the encryption.
r4679	r4680
2535	2535
2536	2536	static const sh2_cpu_core sh2_conf_cps3 = {
2537	2537	0, // master
2538		(void*)cps3_dma_callback
	2538	cps3_dma_callback
2539	2539	};
2540	2540
2541	2541	static MACHINE_DRIVER_START( cps3 )

src/mame/drivers/glass.c

r4679	r4680
67	67	GFXDECODE_END
68	68
69	69
70		static ADDRESS_MAP_START( glass_readmem, ADDRESS_SPACE_PROGRAM, 16 )
71		AM_RANGE(0x000000, 0x07ffff) AM_READ(SMH_ROM)            /* ROM */
72		AM_RANGE(0x100000, 0x101fff) AM_READ(SMH_RAM)            /* Video RAM */
73		AM_RANGE(0x102000, 0x102fff) AM_READ(SMH_RAM)            /* Extra Video RAM */
74		AM_RANGE(0x200000, 0x2007ff) AM_READ(SMH_RAM)            /* Palette */
75		AM_RANGE(0x440000, 0x440fff) AM_READ(SMH_RAM)            /* Sprite RAM */
76		AM_RANGE(0x700000, 0x700001) AM_READ_PORT("DSW2")
77		AM_RANGE(0x700002, 0x700003) AM_READ_PORT("DSW1")
78		AM_RANGE(0x700004, 0x700005) AM_READ_PORT("P1")
79		AM_RANGE(0x700006, 0x700007) AM_READ_PORT("P2")
80		AM_RANGE(0x70000e, 0x70000f) AM_DEVREAD8("oki", okim6295_r, 0x00ff)/* OKI6295 status register */
81		AM_RANGE(0xfec000, 0xfeffff) AM_READ(SMH_RAM)            /* Work RAM (partially shared with DS5002FP) */
82		ADDRESS_MAP_END
83
84
85	70	static WRITE16_HANDLER( OKIM6295_bankswitch_w )
86	71	{
87	72	UINT8 *RAM = memory_region(space->machine, "oki");
r4679	r4680
107	92	}
108	93	}
109	94
110		static ADDRESS_MAP_START( glass_writemem, ADDRESS_SPACE_PROGRAM, 16 )
111		AM_RANGE(0x000000, 0x07ffff) AM_WRITE(SMH_ROM)                        /* ROM */
112		AM_RANGE(0x100000, 0x101fff) AM_WRITE(glass_vram_w) AM_BASE(&glass_videoram)         /* Video RAM */
113		AM_RANGE(0x102000, 0x102fff) AM_WRITE(SMH_RAM)                        /* Extra Video RAM */
114		AM_RANGE(0x108000, 0x108007) AM_WRITE(SMH_RAM) AM_BASE(&glass_vregs)            /* Video Registers */
115		AM_RANGE(0x108008, 0x108009) AM_WRITE(clr_int_w)                        /* CLR INT Video */
116		AM_RANGE(0x200000, 0x2007ff) AM_WRITE(paletteram16_xBBBBBGGGGGRRRRR_word_w) AM_BASE(&paletteram16)/*  Palette */
117		AM_RANGE(0x440000, 0x440fff) AM_WRITE(SMH_RAM) AM_BASE(&glass_spriteram)         /* Sprite RAM */
118		AM_RANGE(0x700008, 0x700009) AM_WRITE(glass_blitter_w)                  /* serial blitter */
119		AM_RANGE(0x70000c, 0x70000d) AM_WRITE(OKIM6295_bankswitch_w)               /* OKI6295 bankswitch */
120		AM_RANGE(0x70000e, 0x70000f) AM_DEVWRITE8("oki", okim6295_w, 0x00ff)               /* OKI6295 data register */
121		AM_RANGE(0x70000a, 0x70004b) AM_WRITE(glass_coin_w)                     /* Coin Counters/Lockout */
122		AM_RANGE(0xfec000, 0xfeffff) AM_WRITE(SMH_RAM)                        /* Work RAM (partially shared with DS5002FP) */
	95	static ADDRESS_MAP_START( glass_map, ADDRESS_SPACE_PROGRAM, 16 )
	96	AM_RANGE(0x000000, 0x07ffff) AM_ROM                                                      /* ROM */
	97	AM_RANGE(0x100000, 0x101fff) AM_RAM_WRITE(glass_vram_w) AM_BASE(&glass_videoram)                  /* Video RAM */
	98	AM_RANGE(0x102000, 0x102fff) AM_RAM                                                      /* Extra Video RAM */
	99	AM_RANGE(0x108000, 0x108007) AM_WRITE(SMH_RAM) AM_BASE(&glass_vregs)                           /* Video Registers */
	100	AM_RANGE(0x108008, 0x108009) AM_WRITE(clr_int_w)                                          /* CLR INT Video */
	101	AM_RANGE(0x200000, 0x2007ff) AM_RAM_WRITE(paletteram16_xBBBBBGGGGGRRRRR_word_w) AM_BASE(&paletteram16)   /* Palette */
	102	AM_RANGE(0x440000, 0x440fff) AM_RAM AM_BASE(&glass_spriteram)                                 /* Sprite RAM */
	103	AM_RANGE(0x700000, 0x700001) AM_READ_PORT("DSW2")
	104	AM_RANGE(0x700002, 0x700003) AM_READ_PORT("DSW1")
	105	AM_RANGE(0x700004, 0x700005) AM_READ_PORT("P1")
	106	AM_RANGE(0x700006, 0x700007) AM_READ_PORT("P2")
	107	AM_RANGE(0x700008, 0x700009) AM_WRITE(glass_blitter_w)                                       /* serial blitter */
	108	AM_RANGE(0x70000c, 0x70000d) AM_WRITE(OKIM6295_bankswitch_w)                                 /* OKI6295 bankswitch */
	109	AM_RANGE(0x70000e, 0x70000f) AM_DEVREADWRITE8("oki", okim6295_r, okim6295_w, 0x00ff)               /* OKI6295 status register */
	110	AM_RANGE(0x70000a, 0x70004b) AM_WRITE(glass_coin_w)                                          /* Coin Counters/Lockout */
	111	AM_RANGE(0xfec000, 0xfeffff) AM_RAM                                                      /* Work RAM (partially shared with DS5002FP) */
123	112	ADDRESS_MAP_END
124	113
125	114
r4679	r4680
202	191
203	192	/* basic machine hardware */
204	193	MDRV_CPU_ADD("maincpu", M68000,24000000/2)      /* 12 MHz (M680000 P12) */
205		MDRV_CPU_PROGRAM_MAP(glass_readmem,glass_writemem)
	194	MDRV_CPU_PROGRAM_MAP(glass_map,0)
206	195	MDRV_CPU_VBLANK_INT("screen", glass_interrupt)
207	196
208	197	MDRV_MACHINE_RESET(glass)
r4679	r4680
229	218	MDRV_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.0)
230	219	MACHINE_DRIVER_END
231	220
232		ROM_START( glass )
	221	ROM_START( glass ) /* Version 1.1 */
233	222	ROM_REGION( 0x080000, "maincpu", 0 )   /* 68000 code */
234		ROM_LOAD16_BYTE( "1.c23",   0x000000, 0x040000, CRC(aeebd4ed) SHA1(04759dc146dff0fc74b78d70e79dfaebe68328f9) )
235		ROM_LOAD16_BYTE( "2.c22",   0x000001, 0x040000, CRC(165e2e01) SHA1(180a2e2b5151f2321d85ac23eff7fbc9f52023a5) )
	223	ROM_LOAD16_BYTE( "1.c23", 0x000000, 0x040000, CRC(aeebd4ed) SHA1(04759dc146dff0fc74b78d70e79dfaebe68328f9) )
	224	ROM_LOAD16_BYTE( "2.c22", 0x000001, 0x040000, CRC(165e2e01) SHA1(180a2e2b5151f2321d85ac23eff7fbc9f52023a5) )
236	225
237	226	ROM_REGION( 0x400000, "gfx1", ROMREGION_DISPOSE )   /* Graphics */
238	227	/* 0x000000-0x3fffff filled in later in the DRIVER_INIT */
r4679	r4680
245	234	ROM_LOAD( "h9.bin", 0x000000, 0x100000, CRC(b9492557) SHA1(3f5c0d696d65e1cd492763dfa749c813dd56a9bf) )
246	235
247	236	ROM_REGION( 0x140000, "oki", 0 )   /* ADPCM samples - sound chip is OKIM6295 */
248		ROM_LOAD( "c1.bin",    0x000000, 0x100000, CRC(d9f075a2) SHA1(31a7a677861f39d512e9d1f51925c689e481159a) )
	237	ROM_LOAD( "c1.bin", 0x000000, 0x100000, CRC(d9f075a2) SHA1(31a7a677861f39d512e9d1f51925c689e481159a) )
249	238	/* 0x00000-0x2ffff is fixed, 0x30000-0x3ffff is bank switched from all the ROMs */
250		ROM_RELOAD(            0x040000, 0x100000 )
	239	ROM_RELOAD(         0x040000, 0x100000 )
251	240	ROM_END
252	241
253		ROM_START( glass10 )
	242	ROM_START( glass10 ) /* Version 1.0 */
254	243	ROM_REGION( 0x080000, "maincpu", 0 )   /* 68000 code */
255		ROM_LOAD16_BYTE( "c23.bin",   0x000000, 0x040000, CRC(688cdf33) SHA1(b59dcc3fc15f72037692b745927b110e97d8282e) )
256		ROM_LOAD16_BYTE( "c22.bin",   0x000001, 0x040000, CRC(ab17c992) SHA1(1509b5b4bbfb4e022e0ab6fbbc0ffc070adfa531) )
	244	ROM_LOAD16_BYTE( "c23.bin", 0x000000, 0x040000, CRC(688cdf33) SHA1(b59dcc3fc15f72037692b745927b110e97d8282e) )
	245	ROM_LOAD16_BYTE( "c22.bin", 0x000001, 0x040000, CRC(ab17c992) SHA1(1509b5b4bbfb4e022e0ab6fbbc0ffc070adfa531) )
257	246
258	247	ROM_REGION( 0x400000, "gfx1", ROMREGION_DISPOSE )   /* Graphics */
259	248	/* 0x000000-0x3fffff filled in later in the DRIVER_INIT */
r4679	r4680
266	255	ROM_LOAD( "h9.bin", 0x000000, 0x100000, CRC(b9492557) SHA1(3f5c0d696d65e1cd492763dfa749c813dd56a9bf) )
267	256
268	257	ROM_REGION( 0x140000, "oki", 0 )   /* ADPCM samples - sound chip is OKIM6295 */
269		ROM_LOAD( "c1.bin",    0x000000, 0x100000, CRC(d9f075a2) SHA1(31a7a677861f39d512e9d1f51925c689e481159a) )
	258	ROM_LOAD( "c1.bin", 0x000000, 0x100000, CRC(d9f075a2) SHA1(31a7a677861f39d512e9d1f51925c689e481159a) )
270	259	/* 0x00000-0x2ffff is fixed, 0x30000-0x3ffff is bank switched from all the ROMs */
271		ROM_RELOAD(            0x040000, 0x100000 )
	260	ROM_RELOAD(         0x040000, 0x100000 )
272	261	ROM_END
273	262
274		ROM_START( glass10a )
	263	ROM_START( glassbrk ) /* Title screen shows "GLASS" and under that "Break Edition" on a real PCB */
275	264	ROM_REGION( 0x080000, "maincpu", 0 )   /* 68000 code */
276		ROM_LOAD16_BYTE( "gl.c23",   0x000000, 0x040000, CRC(c1393bea) SHA1(a5f877ba38305a7b49fa3c96b9344cbf71e8c9ef
277		) )
278		ROM_LOAD16_BYTE( "gl.c22",   0x000001, 0x040000, CRC(0d6fa33e) SHA1(37e9258ef7e108d034c80abc8e5e5ab6dacf0a61) )
	265	ROM_LOAD16_BYTE( "spl-c23.bin", 0x000000, 0x040000, CRC(c1393bea) SHA1(a5f877ba38305a7b49fa3c96b9344cbf71e8c9ef) )
	266	ROM_LOAD16_BYTE( "spl-c22.bin", 0x000001, 0x040000, CRC(0d6fa33e) SHA1(37e9258ef7e108d034c80abc8e5e5ab6dacf0a61) )
279	267
280	268	ROM_REGION( 0x400000, "gfx1", ROMREGION_DISPOSE )   /* Graphics */
281	269	/* 0x000000-0x3fffff filled in later in the DRIVER_INIT */
r4679	r4680
288	276	ROM_LOAD( "h9.bin", 0x000000, 0x100000, CRC(b9492557) SHA1(3f5c0d696d65e1cd492763dfa749c813dd56a9bf) )
289	277
290	278	ROM_REGION( 0x140000, "oki", 0 )   /* ADPCM samples - sound chip is OKIM6295 */
291		ROM_LOAD( "c1.bin",    0x000000, 0x100000, CRC(d9f075a2) SHA1(31a7a677861f39d512e9d1f51925c689e481159a) )
	279	ROM_LOAD( "c1.bin", 0x000000, 0x100000, CRC(d9f075a2) SHA1(31a7a677861f39d512e9d1f51925c689e481159a) )
292	280	/* 0x00000-0x2ffff is fixed, 0x30000-0x3ffff is bank switched from all the ROMs */
293		ROM_RELOAD(            0x040000, 0x100000 )
	281	ROM_RELOAD(         0x040000, 0x100000 )
294	282	ROM_END
295	283
296	284	/***************************************************************************
r4679	r4680
337	325	glass_ROM16_split_gfx(machine, "gfx2", "gfx1", 0x0200000, 0x0200000, 0x0200000, 0x0300000);
338	326	}
339	327
340		GAME( 1993, glass,    0,     glass, glass, glass, ROT0, "Gaelco", "Glass (Ver 1.1)",        GAME_UNEMULATED_PROTECTION | GAME_NOT_WORKING )
341		GAME( 1993, glass10,  glass, glass, glass, glass, ROT0, "Gaelco", "Glass (Ver 1.0, set 1)", GAME_UNEMULATED_PROTECTION | GAME_NOT_WORKING )
342		GAME( 1993, glass10a, glass, glass, glass, glass, ROT0, "Gaelco", "Glass (Ver 1.0, set 2)", GAME_UNEMULATED_PROTECTION | GAME_NOT_WORKING )
	328	GAME( 1993, glass,    0,     glass, glass, glass, ROT0, "Gaelco", "Glass (Ver 1.1)",                GAME_UNEMULATED_PROTECTION | GAME_NOT_WORKING )
	329	GAME( 1993, glass10,  glass, glass, glass, glass, ROT0, "Gaelco", "Glass (Ver 1.0)",                GAME_UNEMULATED_PROTECTION | GAME_NOT_WORKING )
	330	GAME( 1993, glassbrk, glass, glass, glass, glass, ROT0, "Gaelco", "Glass (Ver 1.0, Break Edition)", GAME_UNEMULATED_PROTECTION | GAME_NOT_WORKING )

src/mame/drivers/spiders.c

r4679	r4680
238	238	pia6821_get_irq_b(pia2) |
239	239	pia6821_get_irq_a(pia3) | pia6821_get_irq_b(pia3);
240	240
241		cpu_set_input_line(device->machine->cpu[0], M6809_IRQ_LINE, combined_state ? ASSERT_LINE : CLEAR_LINE);
	241	cputag_set_input_line(device->machine, "maincpu", M6809_IRQ_LINE, combined_state ? ASSERT_LINE : CLEAR_LINE);
242	242	}
243	243
244	244
245	245	static WRITE_LINE_DEVICE_HANDLER( main_cpu_firq )
246	246	{
247		cpu_set_input_line(device->machine->cpu[0], M6809_FIRQ_LINE, state ? ASSERT_LINE : CLEAR_LINE);
	247	cputag_set_input_line(device->machine, "maincpu", M6809_FIRQ_LINE, state ? ASSERT_LINE : CLEAR_LINE);
248	248	}
249	249
250	250
251	251	static WRITE_LINE_DEVICE_HANDLER( audio_cpu_irq )
252	252	{
253		cpu_set_input_line(device->machine->cpu[1], M6800_IRQ_LINE, state ? ASSERT_LINE : CLEAR_LINE);
	253	cputag_set_input_line(device->machine, "audiocpu", M6800_IRQ_LINE, state ? ASSERT_LINE : CLEAR_LINE);
254	254	}
255	255
256	256

src/mame/drivers/snesb.c

r4679	r4680
581	581	rom[i]=BITSWAP8(rom[i],5,0,6,1,7,4,3,2);
582	582	}
583	583
584		shared_ram=auto_malloc(0x100);
585		memory_install_readwrite8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x781000, 0x7810ff, 0, 0, sharedram_r, sharedram_w);
	584	shared_ram=auto_alloc_array(machine, INT8, 0x100);
	585	memory_install_readwrite8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x781000, 0x7810ff, 0, 0, sharedram_r, sharedram_w);
586	586
587	587	DRIVER_INIT_CALL(snes_hirom);
588	588	}
r4679	r4680
624	624	rom[0x7ffc]=0x54;
625	625
626	626	ffight2b_coins=0;
627		memory_install_read8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x7eadce, 0x7eadce, 0, 0, ffight2b_coin_r);
	627	memory_install_read8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x7eadce, 0x7eadce, 0, 0, ffight2b_coin_r);
628	628
629	629
630	630	DRIVER_INIT_CALL(snes);
r4679	r4680
686	686	dst[0xfffd]=0x7a;
687	687
688	688	/*  protection checks */
689		memory_install_read8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x75bd37, 0x75bd37, 0, 0, sb2b_75bd37_r);
690		memory_install_read8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x6a6000, 0x6a6fff, 0, 0, sb2b_6a6xxx_r);
	689	memory_install_read8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x75bd37, 0x75bd37, 0, 0, sb2b_75bd37_r);
	690	memory_install_read8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x6a6000, 0x6a6fff, 0, 0, sb2b_6a6xxx_r);
691	691
692	692	/* extra inputs */
693		memory_install_read8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x770071, 0x770071, 0, 0, sb2b_770071_r);
694		memory_install_read8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x770079, 0x770079, 0, 0, sb2b_770079_r);
	693	memory_install_read8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x770071, 0x770071, 0, 0, sb2b_770071_r);
	694	memory_install_read8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x770079, 0x770079, 0, 0, sb2b_770079_r);
695	695
696	696	/* handler to read boot code */
697		memory_install_read8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x007000, 0x007fff, 0, 0, sb2b_7xxx_r);
	697	memory_install_read8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x007000, 0x007fff, 0, 0, sb2b_7xxx_r);
698	698
699	699	DRIVER_INIT_CALL(snes_hirom);
700	700	}

src/mame/drivers/pcxt.c

r4679	r4680
435	435	}
436	436	else//keyboard emulation
437	437	{
438		//cpu_set_input_line(device->machine->cpu[0],1,PULSE_LINE);
	438	//cputag_set_input_line(device->machine, "maincpu", 1, PULSE_LINE);
439	439	return 0x00;//Keyboard is disconnected
440	440	//return 0xaa;//Keyboard code
441	441	}
r4679	r4680
478	478
479	479	static WRITE8_DEVICE_HANDLER( sys_reset_w )
480	480	{
481		cpu_set_input_line(device->machine->cpu[0],INPUT_LINE_RESET,PULSE_LINE);
	481	cputag_set_input_line(device->machine, "maincpu", INPUT_LINE_RESET, PULSE_LINE);
482	482	}
483	483
484	484
r4679	r4680
553	553
554	554	static DMA8237_MEM_READ( pc_dma_read_byte )
555	555	{
556		const address_space *space = cpu_get_address_space(device->machine->cpu[0], ADDRESS_SPACE_PROGRAM);
	556	const address_space *space = cputag_get_address_space(device->machine, "maincpu", ADDRESS_SPACE_PROGRAM);
557	557	offs_t page_offset = (((offs_t) dma_offset[0][channel]) << 16)
558	558	& 0xFF0000;
559	559
r4679	r4680
563	563
564	564	static DMA8237_MEM_WRITE( pc_dma_write_byte )
565	565	{
566		const address_space *space = cpu_get_address_space(device->machine->cpu[0], ADDRESS_SPACE_PROGRAM);
	566	const address_space *space = cputag_get_address_space(device->machine, "maincpu", ADDRESS_SPACE_PROGRAM);
567	567	offs_t page_offset = (((offs_t) dma_offset[0][channel]) << 16)
568	568	& 0xFF0000;
569	569
r4679	r4680
631	631	******************/
632	632
633	633	static PIC8259_SET_INT_LINE( pic8259_1_set_int_line ) {
634		cpu_set_input_line(device->machine->cpu[0], 0, interrupt ? HOLD_LINE : CLEAR_LINE);
	634	cputag_set_input_line(device->machine, "maincpu", 0, interrupt ? HOLD_LINE : CLEAR_LINE);
635	635	}
636	636
637	637	static const struct pic8259_interface pic8259_1_config = {
r4679	r4680
662	662	AM_RANGE(0x00400, 0x007ff) AM_RAM AM_BASE(&work_ram)
663	663	AM_RANGE(0x00800, 0x9ffff) AM_RAM //work RAM 640KB
664	664	AM_RANGE(0xa0000, 0xbffff) AM_RAM_WRITE(vga_vram_w) AM_BASE(&vga_vram)//VGA RAM
665		AM_RANGE(0xc0000, 0xcffff) AM_READ(SMH_BANK1)
	665	AM_RANGE(0xc0000, 0xcffff) AM_READ(SMH_BANK(1))
666	666	AM_RANGE(0xf0000, 0xfffff) AM_ROM
667	667	ADDRESS_MAP_END
668	668
r4679	r4680
898	898	bank = -1;
899	899	lastvalue = -1;
900	900	hv_blank = 0;
901		cpu_set_irq_callback(machine->cpu[0], irq_callback);
	901	cpu_set_irq_callback(cputag_get_cpu(machine, "maincpu"), irq_callback);
902	902	filetto_devices.pit8253 = devtag_get_device( machine, "pit8253" );
903	903	filetto_devices.pic8259_1 = devtag_get_device( machine, "pic8259_1" );
904	904	filetto_devices.pic8259_2 = devtag_get_device( machine, "pic8259_2" );

src/mame/drivers/mcatadv.c

r4679	r4680
151	151	static WRITE16_HANDLER( mcat_soundlatch_w )
152	152	{
153	153	soundlatch_w(space, 0, data);
154		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_NMI, PULSE_LINE);
	154	cputag_set_input_line(space->machine, "soundcpu", INPUT_LINE_NMI, PULSE_LINE);
155	155	}
156	156
157	157	#if 0 // mcat only.. install read handler?
r4679	r4680
174	174	}
175	175
176	176
177		static ADDRESS_MAP_START( mcatadv_readmem, ADDRESS_SPACE_PROGRAM, 16 )
178		AM_RANGE(0x000000, 0x0fffff) AM_READ(SMH_ROM)
179		AM_RANGE(0x100000, 0x10ffff) AM_READ(SMH_RAM)
	177	static ADDRESS_MAP_START( mcatadv_map, ADDRESS_SPACE_PROGRAM, 16 )
	178	AM_RANGE(0x000000, 0x0fffff) AM_ROM
	179	AM_RANGE(0x100000, 0x10ffff) AM_RAM
180	180
181		AM_RANGE(0x200000, 0x200005) AM_READ(SMH_RAM)
182		AM_RANGE(0x300000, 0x300005) AM_READ(SMH_RAM)
183
184	181	//  AM_RANGE(0x180018, 0x18001f) AM_READNOP // ?
185	182
186		AM_RANGE(0x400000, 0x401fff) AM_READ(SMH_RAM) // Tilemap 0
187		AM_RANGE(0x500000, 0x501fff) AM_READ(SMH_RAM) // Tilemap 1
	183	AM_RANGE(0x200000, 0x200005) AM_RAM AM_BASE(&mcatadv_scroll)
	184	AM_RANGE(0x300000, 0x300005) AM_RAM AM_BASE(&mcatadv_scroll2)
188	185
189		AM_RANGE(0x600000, 0x601fff) AM_READ(SMH_RAM)
190		AM_RANGE(0x602000, 0x602fff) AM_READ(SMH_RAM)
	186	AM_RANGE(0x400000, 0x401fff) AM_RAM_WRITE(mcatadv_videoram1_w) AM_BASE(&mcatadv_videoram1) // Tilemap 0
	187	AM_RANGE(0x500000, 0x501fff) AM_RAM_WRITE(mcatadv_videoram2_w) AM_BASE(&mcatadv_videoram2) // Tilemap 1
191	188
192		AM_RANGE(0x700000, 0x707fff) AM_READ(SMH_RAM) // Sprites
193		AM_RANGE(0x708000, 0x70ffff) AM_READ(SMH_RAM) // Tests more than is needed?
	189	AM_RANGE(0x600000, 0x601fff) AM_RAM_WRITE(paletteram16_xGGGGGRRRRRBBBBB_word_w) AM_BASE(&paletteram16)
	190	AM_RANGE(0x602000, 0x602fff) AM_RAM // Bigger than needs to be?
194	191
	192	AM_RANGE(0x700000, 0x707fff) AM_RAM AM_BASE(&spriteram16) AM_SIZE(&spriteram_size) // Sprites, two halves for double buffering
	193	AM_RANGE(0x708000, 0x70ffff) AM_RAM // Tests more than is needed?
	194
195	195	AM_RANGE(0x800000, 0x800001) AM_READ_PORT("P1")
196	196	AM_RANGE(0x800002, 0x800003) AM_READ_PORT("P2")
	197	//  AM_RANGE(0x900000, 0x900001) AM_WRITE(mcat_coin_w) // Lockout / Counter MCAT Only
197	198	AM_RANGE(0xa00000, 0xa00001) AM_READ_PORT("DSW1")
198	199	AM_RANGE(0xa00002, 0xa00003) AM_READ_PORT("DSW2")
199	200
200		AM_RANGE(0xb00000, 0xb0000f) AM_READ(SMH_RAM)
	201	AM_RANGE(0xb00000, 0xb0000f) AM_RAM AM_BASE(&mcatadv_vidregs)
201	202
	203	AM_RANGE(0xb00018, 0xb00019) AM_WRITE(watchdog_reset16_w) // NOST Only
202	204	AM_RANGE(0xb0001e, 0xb0001f) AM_READ(mcat_wd_r) // MCAT Only
203		AM_RANGE(0xc00000, 0xc00001) AM_READ(soundlatch2_word_r)
	205	AM_RANGE(0xc00000, 0xc00001) AM_READWRITE(soundlatch2_word_r,mcat_soundlatch_w)
204	206	ADDRESS_MAP_END
205	207
206		static ADDRESS_MAP_START( mcatadv_writemem, ADDRESS_SPACE_PROGRAM, 16 )
207		AM_RANGE(0x000000, 0x0fffff) AM_WRITE(SMH_ROM)
208		AM_RANGE(0x100000, 0x10ffff) AM_WRITE(SMH_RAM)
209		AM_RANGE(0x200000, 0x200005) AM_WRITE(SMH_RAM) AM_BASE(&mcatadv_scroll)
210		AM_RANGE(0x300000, 0x300005) AM_WRITE(SMH_RAM) AM_BASE(&mcatadv_scroll2)
211
212		AM_RANGE(0x400000, 0x401fff) AM_WRITE(mcatadv_videoram1_w) AM_BASE(&mcatadv_videoram1) // Tilemap 0
213		AM_RANGE(0x500000, 0x501fff) AM_WRITE(mcatadv_videoram2_w) AM_BASE(&mcatadv_videoram2) // Tilemap 1
214
215		AM_RANGE(0x600000, 0x601fff) AM_WRITE(paletteram16_xGGGGGRRRRRBBBBB_word_w) AM_BASE(&paletteram16)
216		AM_RANGE(0x602000, 0x602fff) AM_WRITE(SMH_RAM) // Bigger than needs to be?
217
218		AM_RANGE(0x700000, 0x707fff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16) AM_SIZE(&spriteram_size) // Sprites, two halves for double buffering
219		AM_RANGE(0x708000, 0x70ffff) AM_WRITE(SMH_RAM) // Tests more than is needed?
220
221		//  AM_RANGE(0x900000, 0x900001) AM_WRITE(mcat_coin_w) // Lockout / Counter MCAT Only
222		AM_RANGE(0xb00000, 0xb0000f) AM_WRITE(SMH_RAM) AM_BASE(&mcatadv_vidregs)
223		AM_RANGE(0xb00018, 0xb00019) AM_WRITE(watchdog_reset16_w) // NOST Only
224		AM_RANGE(0xc00000, 0xc00001) AM_WRITE(mcat_soundlatch_w)
225		ADDRESS_MAP_END
226
227	208	/*** Sound ***/
228	209
229	210	static WRITE8_HANDLER ( mcatadv_sound_bw_w )
r4679	r4680
234	215	}
235	216
236	217
237		static ADDRESS_MAP_START( mcatadv_sound_readmem, ADDRESS_SPACE_PROGRAM, 8 )
238		AM_RANGE(0x0000, 0x3fff) AM_READ(SMH_ROM      )   // ROM
239		AM_RANGE(0x4000, 0xbfff) AM_READ(SMH_BANK1      )   // ROM
240		AM_RANGE(0xc000, 0xdfff) AM_READ(SMH_RAM      )   // RAM
241		AM_RANGE(0xe000, 0xe003) AM_DEVREAD("ym", ym2610_r)
242		ADDRESS_MAP_END
243
244		static ADDRESS_MAP_START( mcatadv_sound_writemem, ADDRESS_SPACE_PROGRAM, 8 )
245		AM_RANGE(0x0000, 0x3fff) AM_WRITE(SMH_ROM      )   // ROM
246		AM_RANGE(0x4000, 0xbfff) AM_WRITE(SMH_ROM      )   // ROM
247		AM_RANGE(0xc000, 0xdfff) AM_WRITE(SMH_RAM      )   // RAM
248		AM_RANGE(0xe000, 0xe003) AM_DEVWRITE("ym", ym2610_w)
	218	static ADDRESS_MAP_START( mcatadv_sound_map, ADDRESS_SPACE_PROGRAM, 8 )
	219	AM_RANGE(0x0000, 0x3fff) AM_ROM                  // ROM
	220	AM_RANGE(0x4000, 0xbfff) AM_ROMBANK(1)            // ROM
	221	AM_RANGE(0xc000, 0xdfff) AM_RAM                  // RAM
	222	AM_RANGE(0xe000, 0xe003) AM_DEVREADWRITE("ym", ym2610_r,ym2610_w)
249	223	AM_RANGE(0xf000, 0xf000) AM_WRITE(mcatadv_sound_bw_w)
250	224	ADDRESS_MAP_END
251	225
r4679	r4680
255	229	ADDRESS_MAP_END
256	230
257	231
258		static ADDRESS_MAP_START( nost_sound_readmem, ADDRESS_SPACE_PROGRAM, 8 )
259		AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM      )   // ROM
260		AM_RANGE(0x8000, 0xbfff) AM_READ(SMH_BANK1      )   // ROM
261		AM_RANGE(0xc000, 0xdfff) AM_READ(SMH_RAM      )   // RAM
	232	static ADDRESS_MAP_START( nost_sound_map, ADDRESS_SPACE_PROGRAM, 8 )
	233	AM_RANGE(0x0000, 0x7fff) AM_ROM                  // ROM
	234	AM_RANGE(0x8000, 0xbfff) AM_ROMBANK(1)            // ROM
	235	AM_RANGE(0xc000, 0xdfff) AM_RAM                  // RAM
262	236	ADDRESS_MAP_END
263	237
264		static ADDRESS_MAP_START( nost_sound_writemem, ADDRESS_SPACE_PROGRAM, 8 )
265		AM_RANGE(0x0000, 0x7fff) AM_WRITE(SMH_ROM      )   // ROM
266		AM_RANGE(0x8000, 0xbfff) AM_WRITE(SMH_ROM      )   // ROM
267		AM_RANGE(0xc000, 0xdfff) AM_WRITE(SMH_RAM      )   // RAM
268		ADDRESS_MAP_END
269
270	238	static ADDRESS_MAP_START( nost_sound_io_map, ADDRESS_SPACE_IO, 8 )
271	239	ADDRESS_MAP_GLOBAL_MASK(0xff)
272	240	AM_RANGE(0x00, 0x03) AM_DEVWRITE("ym", ym2610_w)
r4679	r4680
454	422	/* Stolen from Psikyo.c */
455	423	static void sound_irq( const device_config *device, int irq )
456	424	{
457		cpu_set_input_line(device->machine->cpu[1],0,irq ? ASSERT_LINE : CLEAR_LINE);
	425	cputag_set_input_line(device->machine, "soundcpu", 0, irq ? ASSERT_LINE : CLEAR_LINE);
458	426	}
459	427	static const ym2610_interface mcatadv_ym2610_interface =
460	428	{
r4679	r4680
466	434
467	435	/* basic machine hardware */
468	436	MDRV_CPU_ADD("maincpu", M68000, XTAL_16MHz) /* verified on pcb */
469		MDRV_CPU_PROGRAM_MAP(mcatadv_readmem,mcatadv_writemem)
	437	MDRV_CPU_PROGRAM_MAP(mcatadv_map,0)
470	438	MDRV_CPU_VBLANK_INT("screen", irq1_line_hold)
471	439
472	440	MDRV_CPU_ADD("soundcpu", Z80, XTAL_16MHz/4) /* verified on pcb */
473		MDRV_CPU_PROGRAM_MAP(mcatadv_sound_readmem,mcatadv_sound_writemem)
	441	MDRV_CPU_PROGRAM_MAP(mcatadv_sound_map,0)
474	442	MDRV_CPU_IO_MAP(mcatadv_sound_io_map,0)
475	443
476	444	/* video hardware */
r4679	r4680
497	465	MDRV_SOUND_CONFIG(mcatadv_ym2610_interface)
498	466	MDRV_SOUND_ROUTE(0, "lspeaker",  0.32)
499	467	MDRV_SOUND_ROUTE(0, "rspeaker", 0.32)
500		MDRV_SOUND_ROUTE(1, "lspeaker",  1.0)
501		MDRV_SOUND_ROUTE(2, "rspeaker", 1.0)
	468	MDRV_SOUND_ROUTE(1, "lspeaker",  0.5)
	469	MDRV_SOUND_ROUTE(2, "rspeaker", 0.5)
502	470	MACHINE_DRIVER_END
503	471
504	472	static MACHINE_DRIVER_START( nost )
505	473	MDRV_IMPORT_FROM( mcatadv )
506	474
507	475	MDRV_CPU_MODIFY("soundcpu")
508		MDRV_CPU_PROGRAM_MAP(nost_sound_readmem,nost_sound_writemem)
	476	MDRV_CPU_PROGRAM_MAP(nost_sound_map,0)
509	477	MDRV_CPU_IO_MAP(nost_sound_io_map,0)
510	478	MACHINE_DRIVER_END
511	479
r4679	r4680
702	670	GAME( 1993, nost,     0,       nost,    nost,    mcatadv, ROT270, "Face",      "Nostradamus", GAME_NO_COCKTAIL )
703	671	GAME( 1993, nostj,    nost,    nost,    nost,    mcatadv, ROT270, "Face",      "Nostradamus (Japan)", GAME_NO_COCKTAIL )
704	672	GAME( 1993, nostk,    nost,    nost,    nost,    mcatadv, ROT270, "Face",      "Nostradamus (Korea)", GAME_NO_COCKTAIL )
705

src/mame/drivers/cinemat.c

r4679	r4680
280	280
281	281	static WRITE8_HANDLER( qb3_ram_bank_w )
282	282	{
283		memory_set_bank(space->machine, 1, cpu_get_reg(space->machine->cpu[0], CCPU_P) & 3);
	283	memory_set_bank(space->machine, 1, cpu_get_reg(cputag_get_cpu(space->machine, "maincpu"), CCPU_P) & 3);
284	284	}
285	285
286	286
r4679	r4680
1437	1437
1438	1438	static DRIVER_INIT( speedfrk )
1439	1439	{
1440		memory_install_read8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_IO), 0x00, 0x03, 0, 0, speedfrk_wheel_r);
1441		memory_install_read8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_IO), 0x04, 0x06, 0, 0, speedfrk_gear_r);
	1440	memory_install_read8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_IO), 0x00, 0x03, 0, 0, speedfrk_wheel_r);
	1441	memory_install_read8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_IO), 0x04, 0x06, 0, 0, speedfrk_gear_r);
1442	1442	}
1443	1443
1444	1444
1445	1445	static DRIVER_INIT( sundance )
1446	1446	{
1447		memory_install_read8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_IO), 0x00, 0x0f, 0, 0, sundance_inputs_r);
	1447	memory_install_read8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_IO), 0x00, 0x0f, 0, 0, sundance_inputs_r);
1448	1448	}
1449	1449
1450	1450
1451	1451	static DRIVER_INIT( tailg )
1452	1452	{
1453		memory_install_write8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_IO), 0x07, 0x07, 0, 0, mux_select_w);
	1453	memory_install_write8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_IO), 0x07, 0x07, 0, 0, mux_select_w);
1454	1454	}
1455	1455
1456	1456
1457	1457	static DRIVER_INIT( boxingb )
1458	1458	{
1459		memory_install_read8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_IO), 0x0c, 0x0f, 0, 0, boxingb_dial_r);
1460		memory_install_write8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_IO), 0x07, 0x07, 0, 0, mux_select_w);
	1459	memory_install_read8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_IO), 0x0c, 0x0f, 0, 0, boxingb_dial_r);
	1460	memory_install_write8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_IO), 0x07, 0x07, 0, 0, mux_select_w);
1461	1461	}
1462	1462
1463	1463
1464	1464	static DRIVER_INIT( qb3 )
1465	1465	{
1466		memory_install_read8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_IO), 0x0f, 0x0f, 0, 0, qb3_frame_r);
1467		memory_install_write8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_IO), 0x00, 0x00, 0, 0, qb3_ram_bank_w);
	1466	memory_install_read8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_IO), 0x0f, 0x0f, 0, 0, qb3_frame_r);
	1467	memory_install_write8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_IO), 0x00, 0x00, 0, 0, qb3_ram_bank_w);
1468	1468
1469	1469	memory_configure_bank(machine, 1, 0, 4, rambase, 0x100*2);
1470	1470	}

src/mame/drivers/toaplan2.c

r4679	r4680
317	317	This is important for games with common RAM; the RAM test will fail
318	318	when leaving service mode if the sound CPU is not reset.
319	319	*/
320		device_set_info_fct(machine->cpu[0], CPUINFO_FCT_M68K_RESET_CALLBACK, (genf *)toaplan2_reset);
	320	m68k_set_reset_callback(machine->cpu[0], toaplan2_reset);
321	321	}
322	322
323	323	static MACHINE_RESET( ghox )
r4679	r4680
394	394	#if USE_V25
395	395
396	396	#else
397		memory_install_readwrite16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x28f002, 0x28fbff, 0, 0, SMH_BANK2, SMH_BANK2 );
	397	memory_install_readwrite16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x28f002, 0x28fbff, 0, 0, (read16_space_func)SMH_BANK(2), (write16_space_func)SMH_BANK(2) );
398	398	memory_set_bankptr(machine, 2, fixeight_sec_cpu_mem);
399	399	#endif
400	400
r4679	r4680
921	921	/* game keeping service mode. It writes/reads the settings to/from */
922	922	/* these shared RAM locations. The secondary CPU reads/writes them */
923	923	/* from/to nvram to store the settings (a 93C45 EEPROM) */
924		memory_install_readwrite16_handler(space, 0x28f002, 0x28fbff, 0, 0, SMH_BANK2, SMH_BANK2);
	924	memory_install_readwrite16_handler(space, 0x28f002, 0x28fbff, 0, 0, (read16_space_func)SMH_BANK(2), (write16_space_func)SMH_BANK(2));
925	925	memory_set_bankptr(space->machine, 2, fixeight_sec_cpu_mem);
926	926	memory_install_read_port_handler(space, 0x28f004, 0x28f005, 0, 0, "DSWA");   /* Dip Switch A - Wrong !!! */
927	927	memory_install_read_port_handler(space, 0x28f006, 0x28f007, 0, 0, "DSWB");   /* Dip Switch B - Wrong !!! */
r4679	r4680
1558	1558	AM_RANGE(0x502000, 0x5021ff) AM_READWRITE(toaplan2_txvideoram16_offs_r, toaplan2_txvideoram16_offs_w) AM_BASE(&toaplan2_txvideoram16_offs) AM_SIZE(&toaplan2_tx_offs_vram_size)
1559	1559	AM_RANGE(0x503000, 0x5031ff) AM_READWRITE(toaplan2_txscrollram16_r, toaplan2_txscrollram16_w) AM_BASE(&toaplan2_txscrollram16) AM_SIZE(&toaplan2_tx_scroll_vram_size)
1560	1560	AM_RANGE(0x700000, 0x700001) AM_READ(video_count_r)
1561		AM_RANGE(0x800000, 0x87ffff) AM_READ(SMH_BANK1)
	1561	AM_RANGE(0x800000, 0x87ffff) AM_READ(SMH_BANK(1))
1562	1562	ADDRESS_MAP_END
1563	1563
1564	1564

src/mame/drivers/mjkjidai.c

r4679	r4680
14	14	- Several imperfections with sprites rendering:
15	15	- some sprites are misplaced by 1pixel vertically
16	16	- during the tile distribution at the beginning of a match, there's something
17		wrong with the stacks moved around, they aremisaligned and something is
	17	wrong with the stacks moved around, they are misaligned and something is
18	18	missing.
19	19
20	20	- unknown reads from port 01. Only the top two bits seem to be used.
r4679	r4680
48	48
49	49	static STREAM_UPDATE( mjkjidai_adpcm_callback )
50	50	{
51		struct mjkjidai_adpcm_state *state = param;
	51	struct mjkjidai_adpcm_state *state = (struct mjkjidai_adpcm_state *)param;
52	52	stream_sample_t *dest = outputs[0];
53	53
54	54	while (state->playing && samples > 0)
r4679	r4680
171	171
172	172
173	173
174		static ADDRESS_MAP_START( readmem, ADDRESS_SPACE_PROGRAM, 8 )
175		AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM)
176		AM_RANGE(0x8000, 0xbfff) AM_READ(SMH_BANK1)
177		AM_RANGE(0xc000, 0xdfff) AM_READ(SMH_RAM)
178		AM_RANGE(0xe000, 0xf7ff) AM_READ(SMH_RAM)
	174	static ADDRESS_MAP_START( mjkjidai_map, ADDRESS_SPACE_PROGRAM, 8 )
	175	AM_RANGE(0x0000, 0x7fff) AM_ROM
	176	AM_RANGE(0x8000, 0xbfff) AM_ROMBANK(1)
	177	AM_RANGE(0xc000, 0xcfff) AM_RAM
	178	AM_RANGE(0xd000, 0xdfff) AM_RAM   AM_BASE(&nvram) AM_SIZE(&nvram_size)   // cleared and initialized on startup if bit 6 if port 00 is 0
	179	AM_RANGE(0xe000, 0xe01f) AM_RAM AM_BASE(&spriteram)         // shared with tilemap ram
	180	AM_RANGE(0xe800, 0xe81f) AM_RAM AM_BASE(&spriteram_2)      // shared with tilemap ram
	181	AM_RANGE(0xf000, 0xf01f) AM_RAM AM_BASE(&spriteram_3)      // shared with tilemap ram
	182	AM_RANGE(0xe000, 0xf7ff) AM_RAM_WRITE(mjkjidai_videoram_w) AM_BASE(&mjkjidai_videoram)
179	183	ADDRESS_MAP_END
180	184
181		static ADDRESS_MAP_START( writemem, ADDRESS_SPACE_PROGRAM, 8 )
182		AM_RANGE(0x0000, 0xbfff) AM_WRITE(SMH_ROM)
183		AM_RANGE(0xc000, 0xcfff) AM_WRITE(SMH_RAM)
184		AM_RANGE(0xd000, 0xdfff) AM_WRITE(SMH_RAM) AM_BASE(&nvram) AM_SIZE(&nvram_size)   // cleared and initialized on startup if bit 6 if port 00 is 0
185		AM_RANGE(0xe000, 0xe01f) AM_WRITE(SMH_RAM) AM_BASE(&spriteram)   // shared with tilemap ram
186		AM_RANGE(0xe800, 0xe81f) AM_WRITE(SMH_RAM) AM_BASE(&spriteram_2)   // shared with tilemap ram
187		AM_RANGE(0xf000, 0xf01f) AM_WRITE(SMH_RAM) AM_BASE(&spriteram_3)   // shared with tilemap ram
188		AM_RANGE(0xe000, 0xf7ff) AM_WRITE(mjkjidai_videoram_w) AM_BASE(&mjkjidai_videoram)
189		ADDRESS_MAP_END
190
191		static ADDRESS_MAP_START( io_map, ADDRESS_SPACE_IO, 8 )
	185	static ADDRESS_MAP_START( mjkjidai_io_map, ADDRESS_SPACE_IO, 8 )
192	186	ADDRESS_MAP_GLOBAL_MASK(0xff)
193	187	AM_RANGE(0x00, 0x00) AM_READ(keyboard_r)
194	188	AM_RANGE(0x01, 0x01) AM_READNOP   // ???
r4679	r4680
359	353
360	354	/* basic machine hardware */
361	355	MDRV_CPU_ADD("maincpu", Z80,10000000/2)   /* 5 MHz ??? */
362		MDRV_CPU_PROGRAM_MAP(readmem,writemem)
363		MDRV_CPU_IO_MAP(io_map,0)
	356	MDRV_CPU_PROGRAM_MAP(mjkjidai_map,0)
	357	MDRV_CPU_IO_MAP(mjkjidai_io_map,0)
364	358	MDRV_CPU_VBLANK_INT("screen", nmi_line_pulse)
365	359
366	360	MDRV_NVRAM_HANDLER(mjkjidai)

src/mame/drivers/jchan.c

r4679	r4680
325	325	{
326	326
327	327	case 0:
328		cpu_set_input_line(device->machine->cpu[1], 1, HOLD_LINE);
	328	cputag_set_input_line(device->machine, "sub", 1, HOLD_LINE);
329	329	break;
330	330
331	331	case 220:
332		cpu_set_input_line(device->machine->cpu[1], 2, HOLD_LINE);
	332	cputag_set_input_line(device->machine, "sub", 2, HOLD_LINE);
333	333	break;
334	334
335	335	case 100:
336		cpu_set_input_line(device->machine->cpu[1], 3, HOLD_LINE);
	336	cputag_set_input_line(device->machine, "sub", 3, HOLD_LINE);
337	337	break;
338	338
339	339	}
r4679	r4680
346	346	static VIDEO_START(jchan)
347	347	{
348	348	/* so we can use suprnova.c */
349		jchan_sprite_ram32_1 = auto_malloc ( 0x4000 );
350		jchan_sprite_ram32_2 = auto_malloc ( 0x4000 );
	349	jchan_sprite_ram32_1 = auto_alloc_array(machine, UINT32, 0x4000/4);
	350	jchan_sprite_ram32_2 = auto_alloc_array(machine, UINT32, 0x4000/4);
351	351
352	352	spriteram_size = 0x4000;
353		jchan_sprite_regs32_1 = auto_malloc (0x40);
354		jchan_sprite_regs32_2 = auto_malloc (0x40);
	353	jchan_sprite_regs32_1 = auto_alloc_array(machine, UINT32, 0x40/4);
	354	jchan_sprite_regs32_2 = auto_alloc_array(machine, UINT32, 0x40/4);
355	355
356		sprite_bitmap_1 = auto_bitmap_alloc(1024,1024,BITMAP_FORMAT_INDEXED16);
357		sprite_bitmap_2 = auto_bitmap_alloc(1024,1024,BITMAP_FORMAT_INDEXED16);
	356	sprite_bitmap_1 = auto_bitmap_alloc(machine,1024,1024,BITMAP_FORMAT_INDEXED16);
	357	sprite_bitmap_2 = auto_bitmap_alloc(machine,1024,1024,BITMAP_FORMAT_INDEXED16);
358	358
359	359	suprnova_alt_enable_sprites = 1;
360	360
r4679	r4680
451	451	***************************************************************************/
452	452
453	453	/* communications - hacky! */
454		static UINT16 *mainsub_shared_ram;
455
456	454	static WRITE16_HANDLER( main2sub_cmd_w )
457	455	{
458	456	COMBINE_DATA(&mainsub_shared_ram[0x03ffe/2]);
459		cpu_set_input_line(space->machine->cpu[1], 4, HOLD_LINE);
	457	cputag_set_input_line(space->machine, "sub", 4, HOLD_LINE);
460	458	}
461	459
462	460	// is this called?
463	461	static WRITE16_HANDLER( sub2main_cmd_w )
464	462	{
465	463	COMBINE_DATA(&mainsub_shared_ram[0x0000/2]);
466		cpu_set_input_line(space->machine->cpu[0], 3, HOLD_LINE);
	464	cputag_set_input_line(space->machine, "maincpu", 3, HOLD_LINE);
467	465	}
468	466
469	467	/* ram convert for suprnova (requires 32-bit stuff) */
r4679	r4680
775	773	{
776	774	DRIVER_INIT_CALL( decrypt_toybox_rom );
777	775	// install these here, putting them in the memory map causes issues
778		memory_install_write16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x403ffe, 0x403fff, 0, 0, main2sub_cmd_w );
779		memory_install_write16_handler(cpu_get_address_space(machine->cpu[1], ADDRESS_SPACE_PROGRAM), 0x400000, 0x400001, 0, 0, sub2main_cmd_w );
	776	memory_install_write16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x403ffe, 0x403fff, 0, 0, main2sub_cmd_w );
	777	memory_install_write16_handler(cputag_get_address_space(machine, "sub", ADDRESS_SPACE_PROGRAM), 0x400000, 0x400001, 0, 0, sub2main_cmd_w );
780	778
781	779
782	780	memset(jchan_mcu_com, 0, 4 * sizeof( UINT16 ) );
r4679	r4680
786	784	/* game drivers */
787	785	GAME( 1995, jchan,     0,        jchan,    jchan,    jchan,    ROT0, "Kaneko", "Jackie Chan - The Kung-Fu Master", GAME_IMPERFECT_GRAPHICS )
788	786	GAME( 1995, jchan2,    0,        jchan,    jchan2,   jchan,    ROT0, "Kaneko", "Jackie Chan in Fists of Fire", GAME_IMPERFECT_GRAPHICS )
789

src/mame/drivers/mlanding.c

r4679	r4680
67	67	static WRITE16_HANDLER(ml_subreset_w)
68	68	{
69	69	//wrong
70		if(cpu_get_pc(space->cpu)==0x822)
71		cpu_set_input_line(space->machine->cpu[2], INPUT_LINE_RESET, PULSE_LINE);
	70	if(cpu_get_pc(space->cpu) == 0x822)
	71	cputag_set_input_line(space->machine, "sub", INPUT_LINE_RESET, PULSE_LINE);
72	72	}
73	73
74	74	static WRITE8_DEVICE_HANDLER( sound_bankswitch_w )
r4679	r4680
155	155
156	156	static ADDRESS_MAP_START( mlanding_z80_mem, ADDRESS_SPACE_PROGRAM, 8 )
157	157	AM_RANGE(0x0000, 0x3fff) AM_ROM
158		AM_RANGE(0x4000, 0x7fff) AM_READ(SMH_BANK1)
	158	AM_RANGE(0x4000, 0x7fff) AM_READ(SMH_BANK(1))
159	159	AM_RANGE(0x8000, 0x8fff) AM_RAM
160	160	AM_RANGE(0x9000, 0x9001) AM_DEVREADWRITE("ym", ym2151_r, ym2151_w)
161	161	AM_RANGE(0x9002, 0x9100) AM_READ(SMH_RAM)
r4679	r4680
314	314
315	315	static void irq_handler(const device_config *device, int irq)
316	316	{
317		cpu_set_input_line(device->machine->cpu[1],0,irq ? ASSERT_LINE : CLEAR_LINE);
	317	cputag_set_input_line(device->machine, "z80", 0, irq ? ASSERT_LINE : CLEAR_LINE);
318	318	}
319	319
320	320	static GFXDECODE_START( mlanding )

src/mame/drivers/gaelco.c

r4679	r4680
111	111	VIDEO_UPDATE( bigkarnk );
112	112
113	113
114		static ADDRESS_MAP_START( bigkarnk_readmem, ADDRESS_SPACE_PROGRAM, 16 )
115		AM_RANGE(0x000000, 0x07ffff) AM_READ(SMH_ROM)         /* ROM */
116		AM_RANGE(0x100000, 0x101fff) AM_READ(SMH_RAM)         /* Video RAM */
117		AM_RANGE(0x102000, 0x103fff) AM_READ(SMH_RAM)         /* Screen RAM */
118		AM_RANGE(0x200000, 0x2007ff) AM_READ(SMH_RAM)         /* Palette */
119		AM_RANGE(0x440000, 0x440fff) AM_READ(SMH_RAM)         /* Sprite RAM */
120		AM_RANGE(0x700000, 0x700001) AM_READ_PORT("DSW1")
121		AM_RANGE(0x700002, 0x700003) AM_READ_PORT("DSW2")
122		AM_RANGE(0x700004, 0x700005) AM_READ_PORT("P1")
123		AM_RANGE(0x700006, 0x700007) AM_READ_PORT("P2")
124		AM_RANGE(0x700008, 0x700009) AM_READ_PORT("SERVICE")
125		AM_RANGE(0xff8000, 0xffffff) AM_READ(SMH_RAM)         /* Work RAM */
126		ADDRESS_MAP_END
127
128	114	static WRITE16_HANDLER( bigkarnk_sound_command_w )
129	115	{
130		if (ACCESSING_BITS_0_7){
131		soundlatch_w(space,0,data & 0xff);
132		cpu_set_input_line(space->machine->cpu[1],M6809_FIRQ_LINE,HOLD_LINE);
	116	if (ACCESSING_BITS_0_7)
	117	{
	118	soundlatch_w(space, 0, data & 0xff);
	119	cputag_set_input_line(space->machine, "audiocpu", M6809_FIRQ_LINE, HOLD_LINE);
133	120	}
134	121	}
135	122
136	123	static WRITE16_HANDLER( bigkarnk_coin_w )
137	124	{
138		if (ACCESSING_BITS_0_7){
139		switch ((offset >> 3)){
	125	if (ACCESSING_BITS_0_7)
	126	{
	127	switch ((offset >> 3))
	128	{
140	129	case 0x00:   /* Coin Lockouts */
141	130	case 0x01:
142	131	coin_lockout_w( (offset >> 3) & 0x01, ~data & 0x01);
r4679	r4680
149	138	}
150	139	}
151	140
152		static ADDRESS_MAP_START( bigkarnk_writemem, ADDRESS_SPACE_PROGRAM, 16 )
153		AM_RANGE(0x000000, 0x07ffff) AM_WRITE(SMH_ROM)                        /* ROM */
154		AM_RANGE(0x100000, 0x101fff) AM_WRITE(gaelco_vram_w) AM_BASE(&gaelco_videoram)      /* Video RAM */
155		AM_RANGE(0x102000, 0x103fff) AM_WRITE(SMH_RAM)                        /* Screen RAM */
156		AM_RANGE(0x108000, 0x108007) AM_WRITE(SMH_RAM) AM_BASE(&gaelco_vregs)            /* Video Registers */
157		//  AM_RANGE(0x10800c, 0x10800d) AM_WRITE(watchdog_reset_w)                     /* INT 6 ACK/Watchdog timer */
158		AM_RANGE(0x200000, 0x2007ff) AM_WRITE(paletteram16_xBBBBBGGGGGRRRRR_word_w) AM_BASE(&paletteram16)/* Palette */
159		AM_RANGE(0x440000, 0x440fff) AM_WRITE(SMH_RAM) AM_BASE(&gaelco_spriteram)         /* Sprite RAM */
160		AM_RANGE(0x70000e, 0x70000f) AM_WRITE(bigkarnk_sound_command_w)            /* Triggers a FIRQ on the sound CPU */
161		AM_RANGE(0x70000a, 0x70003b) AM_WRITE(bigkarnk_coin_w)                  /* Coin Counters + Coin Lockout */
162		AM_RANGE(0xff8000, 0xffffff) AM_WRITE(SMH_RAM)                        /* Work RAM */
163		ADDRESS_MAP_END
164	141
165
166		static ADDRESS_MAP_START( bigkarnk_readmem_snd, ADDRESS_SPACE_PROGRAM, 8 )
167		AM_RANGE(0x0000, 0x07ff) AM_READ(SMH_RAM)            /* RAM */
168		AM_RANGE(0x0800, 0x0801) AM_DEVREAD("oki", okim6295_r)   /* OKI6295 */
169		AM_RANGE(0x0a00, 0x0a01) AM_DEVREAD("ym", ym3812_r)   /* YM3812 */
170		AM_RANGE(0x0b00, 0x0b00) AM_READ(soundlatch_r)         /* Sound latch */
171		AM_RANGE(0x0c00, 0xffff) AM_READ(SMH_ROM)            /* ROM */
	142	static ADDRESS_MAP_START( bigkarnk_map, ADDRESS_SPACE_PROGRAM, 16 )
	143	AM_RANGE(0x000000, 0x07ffff) AM_ROM                                                      /* ROM */
	144	AM_RANGE(0x100000, 0x101fff) AM_RAM_WRITE(gaelco_vram_w) AM_BASE(&gaelco_videoram)                  /* Video RAM */
	145	AM_RANGE(0x102000, 0x103fff) AM_RAM                                                      /* Screen RAM */
	146	AM_RANGE(0x108000, 0x108007) AM_WRITEONLY AM_BASE(&gaelco_vregs)                              /* Video Registers */
	147	//  AM_RANGE(0x10800c, 0x10800d) AM_WRITE(watchdog_reset_w)                                                 /* INT 6 ACK/Watchdog timer */
	148	AM_RANGE(0x200000, 0x2007ff) AM_RAM_WRITE(paletteram16_xBBBBBGGGGGRRRRR_word_w) AM_BASE(&paletteram16)   /* Palette */
	149	AM_RANGE(0x440000, 0x440fff) AM_RAM AM_BASE(&gaelco_spriteram)                                 /* Sprite RAM */
	150	AM_RANGE(0x700000, 0x700001) AM_READ_PORT("DSW1")
	151	AM_RANGE(0x700002, 0x700003) AM_READ_PORT("DSW2")
	152	AM_RANGE(0x700004, 0x700005) AM_READ_PORT("P1")
	153	AM_RANGE(0x700006, 0x700007) AM_READ_PORT("P2")
	154	AM_RANGE(0x700008, 0x700009) AM_READ_PORT("SERVICE")
	155	AM_RANGE(0x70000e, 0x70000f) AM_WRITE(bigkarnk_sound_command_w)                                 /* Triggers a FIRQ on the sound CPU */
	156	AM_RANGE(0x70000a, 0x70003b) AM_WRITE(bigkarnk_coin_w)                                       /* Coin Counters + Coin Lockout */
	157	AM_RANGE(0xff8000, 0xffffff) AM_RAM                                                      /* Work RAM */
172	158	ADDRESS_MAP_END
173	159
174		static ADDRESS_MAP_START( bigkarnk_writemem_snd, ADDRESS_SPACE_PROGRAM, 8 )
175		AM_RANGE(0x0000, 0x07ff) AM_WRITE(SMH_RAM)            /* RAM */
176		AM_RANGE(0x0800, 0x0800) AM_DEVWRITE("oki", okim6295_w)      /* OKI6295 */
177		//  AM_RANGE(0x0900, 0x0900) AM_WRITENOP             /* enable sound output? */
178		AM_RANGE(0x0a00, 0x0a01) AM_DEVWRITE("ym", ym3812_w)   /* YM3812 */
179		AM_RANGE(0x0c00, 0xffff) AM_WRITE(SMH_ROM)            /* ROM */
	160	static ADDRESS_MAP_START( bigkarnk_snd_map, ADDRESS_SPACE_PROGRAM, 8 )
	161	AM_RANGE(0x0000, 0x07ff) AM_RAM                                 /* RAM */
	162	AM_RANGE(0x0800, 0x0801) AM_DEVREADWRITE("oki", okim6295_r, okim6295_w)   /* OKI6295 */
	163	//  AM_RANGE(0x0900, 0x0900) AM_WRITENOP                                    /* enable sound output? */
	164	AM_RANGE(0x0a00, 0x0a01) AM_DEVREADWRITE("ym", ym3812_r, ym3812_w)      /* YM3812 */
	165	AM_RANGE(0x0b00, 0x0b00) AM_READ(soundlatch_r)                     /* Sound latch */
	166	AM_RANGE(0x0c00, 0xffff) AM_ROM                                 /* ROM */
180	167	ADDRESS_MAP_END
181	168
182	169	static INPUT_PORTS_START( bigkarnk )
r4679	r4680
224	211
225	212	/* basic machine hardware */
226	213	MDRV_CPU_ADD("maincpu", M68000, 10000000)   /* MC68000P10, 10 MHz */
227		MDRV_CPU_PROGRAM_MAP(bigkarnk_readmem,bigkarnk_writemem)
	214	MDRV_CPU_PROGRAM_MAP(bigkarnk_map,0)
228	215	MDRV_CPU_VBLANK_INT("screen", irq6_line_hold)
229	216
230	217	MDRV_CPU_ADD("audiocpu", M6809, 8867000/4)   /* 68B09, 2.21675 MHz? */
231		MDRV_CPU_PROGRAM_MAP(bigkarnk_readmem_snd,bigkarnk_writemem_snd)
	218	MDRV_CPU_PROGRAM_MAP(bigkarnk_snd_map,0)
232	219
233	220	MDRV_QUANTUM_TIME(HZ(600))
234	221
r4679	r4680
289	276	VIDEO_UPDATE( maniacsq );
290	277
291	278
292		static ADDRESS_MAP_START( maniacsq_readmem, ADDRESS_SPACE_PROGRAM, 16 )
293		AM_RANGE(0x000000, 0x0fffff) AM_READ(SMH_ROM)         /* ROM */
294		AM_RANGE(0x100000, 0x101fff) AM_READ(SMH_RAM)         /* Video RAM */
295		AM_RANGE(0x102000, 0x103fff) AM_READ(SMH_RAM)         /* Screen RAM */
296		AM_RANGE(0x200000, 0x2007ff) AM_READ(SMH_RAM)         /* Palette */
297		AM_RANGE(0x440000, 0x440fff) AM_READ(SMH_RAM)         /* Sprite RAM */
298		AM_RANGE(0x700000, 0x700001) AM_READ_PORT("DSW2")
299		AM_RANGE(0x700002, 0x700003) AM_READ_PORT("DSW1")
300		AM_RANGE(0x700004, 0x700005) AM_READ_PORT("P1")
301		AM_RANGE(0x700006, 0x700007) AM_READ_PORT("P2")
302		AM_RANGE(0x70000e, 0x70000f) AM_DEVREAD8("oki", okim6295_r, 0x00ff)/* OKI6295 status register */
303		AM_RANGE(0xff0000, 0xffffff) AM_READ(SMH_RAM)         /* Work RAM */
304		ADDRESS_MAP_END
305
306	279	static WRITE16_HANDLER( OKIM6295_bankswitch_w )
307	280	{
308	281	UINT8 *RAM = memory_region(space->machine, "oki");
309	282
310		if (ACCESSING_BITS_0_7){
	283	if (ACCESSING_BITS_0_7)
	284	{
311	285	memcpy(&RAM[0x30000], &RAM[0x40000 + (data & 0x0f)*0x10000], 0x10000);
312	286	}
313	287	}
314	288
315		static ADDRESS_MAP_START( maniacsq_writemem, ADDRESS_SPACE_PROGRAM, 16 )
316		AM_RANGE(0x000000, 0x0fffff) AM_WRITE(SMH_ROM)                        /* ROM */
317		AM_RANGE(0x100000, 0x101fff) AM_WRITE(gaelco_vram_w) AM_BASE(&gaelco_videoram)      /* Video RAM */
318		AM_RANGE(0x102000, 0x103fff) AM_WRITE(SMH_RAM)                        /* Screen RAM */
319		AM_RANGE(0x108000, 0x108007) AM_WRITE(SMH_RAM) AM_BASE(&gaelco_vregs)            /* Video Registers */
320		//  AM_RANGE(0x10800c, 0x10800d) AM_WRITE(watchdog_reset_w)                     /* INT 6 ACK/Watchdog timer */
321		AM_RANGE(0x200000, 0x2007ff) AM_WRITE(paletteram16_xBBBBBGGGGGRRRRR_word_w) AM_BASE(&paletteram16)/* Palette */
322		AM_RANGE(0x440000, 0x440fff) AM_WRITE(SMH_RAM) AM_BASE(&gaelco_spriteram)         /* Sprite RAM */
323		AM_RANGE(0x70000c, 0x70000d) AM_WRITE(OKIM6295_bankswitch_w)               /* OKI6295 bankswitch */
324		AM_RANGE(0x70000e, 0x70000f) AM_DEVWRITE8("oki", okim6295_w, 0x00ff)               /* OKI6295 data register */
325		AM_RANGE(0xff0000, 0xffffff) AM_WRITE(SMH_RAM)                        /* Work RAM */
	289	static ADDRESS_MAP_START( maniacsq_map, ADDRESS_SPACE_PROGRAM, 16 )
	290	AM_RANGE(0x000000, 0x0fffff) AM_ROM                                                      /* ROM */
	291	AM_RANGE(0x100000, 0x101fff) AM_RAM_WRITE(gaelco_vram_w) AM_BASE(&gaelco_videoram)                  /* Video RAM */
	292	AM_RANGE(0x102000, 0x103fff) AM_RAM                                                      /* Screen RAM */
	293	AM_RANGE(0x108000, 0x108007) AM_WRITE(SMH_RAM) AM_BASE(&gaelco_vregs)                           /* Video Registers */
	294	//  AM_RANGE(0x10800c, 0x10800d) AM_WRITE(watchdog_reset_w)                                                 /* INT 6 ACK/Watchdog timer */
	295	AM_RANGE(0x200000, 0x2007ff) AM_RAM_WRITE(paletteram16_xBBBBBGGGGGRRRRR_word_w) AM_BASE(&paletteram16)   /* Palette */
	296	AM_RANGE(0x440000, 0x440fff) AM_RAM AM_BASE(&gaelco_spriteram)                                 /* Sprite RAM */
	297	AM_RANGE(0x700000, 0x700001) AM_READ_PORT("DSW2")
	298	AM_RANGE(0x700002, 0x700003) AM_READ_PORT("DSW1")
	299	AM_RANGE(0x700004, 0x700005) AM_READ_PORT("P1")
	300	AM_RANGE(0x700006, 0x700007) AM_READ_PORT("P2")
	301	AM_RANGE(0x70000c, 0x70000d) AM_WRITE(OKIM6295_bankswitch_w)                                 /* OKI6295 bankswitch */
	302	AM_RANGE(0x70000e, 0x70000f) AM_DEVREADWRITE8("oki", okim6295_r, okim6295_w, 0x00ff)               /* OKI6295 status register */
	303	AM_RANGE(0xff0000, 0xffffff) AM_RAM                                                      /* Work RAM */
326	304	ADDRESS_MAP_END
327	305
328	306
r4679	r4680
385	363
386	364	/* basic machine hardware */
387	365	MDRV_CPU_ADD("maincpu", M68000,24000000/2)         /* 12 MHz */
388		MDRV_CPU_PROGRAM_MAP(maniacsq_readmem,maniacsq_writemem)
	366	MDRV_CPU_PROGRAM_MAP(maniacsq_map,0)
389	367	MDRV_CPU_VBLANK_INT("screen", irq6_line_hold)
390	368
391	369	/* video hardware */
r4679	r4680
589	567	}
590	568
591	569
592		static ADDRESS_MAP_START( squash_readmem, ADDRESS_SPACE_PROGRAM, 16 )
593		AM_RANGE(0x000000, 0x0fffff) AM_READ(SMH_ROM)         /* ROM */
594		AM_RANGE(0x100000, 0x101fff) AM_READ(SMH_RAM)         /* Video RAM */
595		AM_RANGE(0x102000, 0x103fff) AM_READ(SMH_RAM)         /* Screen RAM */
596		AM_RANGE(0x200000, 0x2007ff) AM_READ(SMH_RAM)         /* Palette */
597		AM_RANGE(0x440000, 0x440fff) AM_READ(SMH_RAM)         /* Sprite RAM */
	570	static ADDRESS_MAP_START( squash_map, ADDRESS_SPACE_PROGRAM, 16 )
	571	AM_RANGE(0x000000, 0x0fffff) AM_ROM                                                      /* ROM */
	572	AM_RANGE(0x100000, 0x101fff) AM_RAM_WRITE(gaelco_vram_encrypted_w) AM_BASE(&gaelco_videoram)         /* Video RAM */
	573	AM_RANGE(0x102000, 0x103fff) AM_RAM_WRITE(gaelco_encrypted_w) AM_BASE(&gaelco_screen)                                                                /* Screen RAM */
	574	AM_RANGE(0x108000, 0x108007) AM_WRITE(SMH_RAM) AM_BASE(&gaelco_vregs)                           /* Video Registers */
	575	//  AM_RANGE(0x10800c, 0x10800d) AM_WRITE(watchdog_reset_w)                                                 /* INT 6 ACK/Watchdog timer */
	576	AM_RANGE(0x200000, 0x2007ff) AM_RAM_WRITE(paletteram16_xBBBBBGGGGGRRRRR_word_w) AM_BASE(&paletteram16)   /* Palette */
	577	AM_RANGE(0x440000, 0x440fff) AM_RAM AM_BASE(&gaelco_spriteram)                                 /* Sprite RAM */
598	578	AM_RANGE(0x700000, 0x700001) AM_READ_PORT("DSW2")
599	579	AM_RANGE(0x700002, 0x700003) AM_READ_PORT("DSW1")
600	580	AM_RANGE(0x700004, 0x700005) AM_READ_PORT("P1")
601	581	AM_RANGE(0x700006, 0x700007) AM_READ_PORT("P2")
602		AM_RANGE(0x70000e, 0x70000f) AM_DEVREAD8("oki", okim6295_r, 0x00ff)/* OKI6295 status register */
603		AM_RANGE(0xff0000, 0xffffff) AM_READ(SMH_RAM)         /* Work RAM */
	582	AM_RANGE(0x70000c, 0x70000d) AM_WRITE(OKIM6295_bankswitch_w)                                 /* OKI6295 bankswitch */
	583	AM_RANGE(0x70000e, 0x70000f) AM_DEVREADWRITE8("oki", okim6295_r, okim6295_w, 0x00ff)               /* OKI6295 status register */
	584	AM_RANGE(0xff0000, 0xffffff) AM_RAM                                                      /* Work RAM */
604	585	ADDRESS_MAP_END
605	586
606		static ADDRESS_MAP_START( squash_writemem, ADDRESS_SPACE_PROGRAM, 16 )
607		AM_RANGE(0x000000, 0x0fffff) AM_WRITE(SMH_ROM)                        /* ROM */
608		AM_RANGE(0x100000, 0x101fff) AM_WRITE(gaelco_vram_encrypted_w) AM_BASE(&gaelco_videoram)      /* Video RAM */
609		AM_RANGE(0x102000, 0x103fff) AM_WRITE(gaelco_encrypted_w) AM_BASE(&gaelco_screen)                                                                /* Screen RAM */
610		AM_RANGE(0x108000, 0x108007) AM_WRITE(SMH_RAM) AM_BASE(&gaelco_vregs)            /* Video Registers */
611		//  AM_RANGE(0x10800c, 0x10800d) AM_WRITE(watchdog_reset_w)                     /* INT 6 ACK/Watchdog timer */
612		AM_RANGE(0x200000, 0x2007ff) AM_WRITE(paletteram16_xBBBBBGGGGGRRRRR_word_w) AM_BASE(&paletteram16)/* Palette */
613		AM_RANGE(0x440000, 0x440fff) AM_WRITE(SMH_RAM) AM_BASE(&gaelco_spriteram)         /* Sprite RAM */
614		AM_RANGE(0x70000c, 0x70000d) AM_WRITE(OKIM6295_bankswitch_w)               /* OKI6295 bankswitch */
615		AM_RANGE(0x70000e, 0x70000f) AM_DEVWRITE8("oki", okim6295_w, 0x00ff)               /* OKI6295 data register */
616		AM_RANGE(0xff0000, 0xffffff) AM_WRITE(SMH_RAM)                        /* Work RAM */
617		ADDRESS_MAP_END
618
619	587	static MACHINE_DRIVER_START( squash )
620	588
621	589	/* basic machine hardware */
622	590	MDRV_CPU_ADD("maincpu", M68000, 12000000)   /* MC68000P12, 12 MHz */
623		MDRV_CPU_PROGRAM_MAP(squash_readmem,squash_writemem)
	591	MDRV_CPU_PROGRAM_MAP(squash_map,0)
624	592	MDRV_CPU_VBLANK_INT("screen", irq6_line_hold)
625	593
626	594	MDRV_QUANTUM_TIME(HZ(600))
r4679	r4680
754	722
755	723
756	724
757		static ADDRESS_MAP_START( thoop_writemem, ADDRESS_SPACE_PROGRAM, 16 )
758		AM_RANGE(0x000000, 0x0fffff) AM_WRITE(SMH_ROM)                        /* ROM */
759		AM_RANGE(0x100000, 0x101fff) AM_WRITE(thoop_vram_encrypted_w) AM_BASE(&gaelco_videoram)      /* Video RAM */
760		AM_RANGE(0x102000, 0x103fff) AM_WRITE(thoop_encrypted_w) AM_BASE(&gaelco_screen)                                                                /* Screen RAM */
761		AM_RANGE(0x108000, 0x108007) AM_WRITE(SMH_RAM) AM_BASE(&gaelco_vregs)            /* Video Registers */
762		//  AM_RANGE(0x10800c, 0x10800d) AM_WRITE(watchdog_reset_w)                     /* INT 6 ACK/Watchdog timer */
763		AM_RANGE(0x200000, 0x2007ff) AM_WRITE(paletteram16_xBBBBBGGGGGRRRRR_word_w) AM_BASE(&paletteram16)/* Palette */
764		AM_RANGE(0x440000, 0x440fff) AM_WRITE(SMH_RAM) AM_BASE(&gaelco_spriteram)         /* Sprite RAM */
765		AM_RANGE(0x70000c, 0x70000d) AM_WRITE(OKIM6295_bankswitch_w)               /* OKI6295 bankswitch */
766		AM_RANGE(0x70000e, 0x70000f) AM_DEVWRITE8("oki", okim6295_w, 0x00ff)               /* OKI6295 data register */
767		AM_RANGE(0xff0000, 0xffffff) AM_WRITE(SMH_RAM)                        /* Work RAM */
	725	static ADDRESS_MAP_START( thoop_map, ADDRESS_SPACE_PROGRAM, 16 )
	726	AM_RANGE(0x000000, 0x0fffff) AM_ROM                                                         /* ROM */
	727	AM_RANGE(0x100000, 0x101fff) AM_RAM_WRITE(thoop_vram_encrypted_w) AM_BASE(&gaelco_videoram)               /* Video RAM */
	728	AM_RANGE(0x102000, 0x103fff) AM_RAM_WRITE(thoop_encrypted_w) AM_BASE(&gaelco_screen)                  /* Screen RAM */
	729	AM_RANGE(0x108000, 0x108007) AM_WRITE(SMH_RAM) AM_BASE(&gaelco_vregs)                              /* Video Registers */
	730	//  AM_RANGE(0x10800c, 0x10800d) AM_WRITE(watchdog_reset_w)                                                     /* INT 6 ACK/Watchdog timer */
	731	AM_RANGE(0x200000, 0x2007ff) AM_RAM_WRITE(paletteram16_xBBBBBGGGGGRRRRR_word_w) AM_BASE(&paletteram16)      /* Palette */
	732	AM_RANGE(0x440000, 0x440fff) AM_RAM AM_BASE(&gaelco_spriteram)                                    /* Sprite RAM */
	733	AM_RANGE(0x700000, 0x700001) AM_READ_PORT("DSW2")
	734	AM_RANGE(0x700002, 0x700003) AM_READ_PORT("DSW1")
	735	AM_RANGE(0x700004, 0x700005) AM_READ_PORT("P1")
	736	AM_RANGE(0x700006, 0x700007) AM_READ_PORT("P2")
	737	AM_RANGE(0x70000c, 0x70000d) AM_WRITE(OKIM6295_bankswitch_w)                                    /* OKI6295 bankswitch */
	738	AM_RANGE(0x70000e, 0x70000f) AM_DEVREADWRITE8("oki", okim6295_r, okim6295_w, 0x00ff)                  /* OKI6295 status register */
	739	AM_RANGE(0xff0000, 0xffffff) AM_RAM                                                         /* Work RAM */
768	740	ADDRESS_MAP_END
769	741
770	742	static MACHINE_DRIVER_START( thoop )
771	743
772	744	/* basic machine hardware */
773	745	MDRV_CPU_ADD("maincpu", M68000, 12000000)   /* MC68000P12, 12 MHz */
774		MDRV_CPU_PROGRAM_MAP(squash_readmem,thoop_writemem)
	746	MDRV_CPU_PROGRAM_MAP(thoop_map,0)
775	747	MDRV_CPU_VBLANK_INT("screen", irq6_line_hold)
776	748
777	749	MDRV_QUANTUM_TIME(HZ(600))

src/mame/drivers/tankbust.c

r4679	r4680
56	56	}
57	57
58	58	//port B of ay8910#0
59		static UINT32 timer1=0;
	59	static UINT32 timer1 = 0;
60	60	static READ8_DEVICE_HANDLER( tankbust_soundtimer_r )
61	61	{
62	62	int ret;
r4679	r4680
70	70	{
71	71	//logerror("sound_irq_line write = %2x (after CPUs synced) \n",param);
72	72
73		if ((param&1) == 0)
74		cpu_set_input_line(machine->cpu[1], 0, HOLD_LINE);
	73	if ((param & 1) == 0)
	74	cputag_set_input_line(machine, "sub", 0, HOLD_LINE);
75	75	}
76	76
77	77
r4679	r4680
83	83
84	84	#if 0
85	85	popmessage("e0: %x %x (%x cnt) %x %x %x %x",
86		e0xx_data[0],e0xx_data[1],
87		e0xx_data[2],e0xx_data[3],
88		e0xx_data[4],e0xx_data[5],
	86	e0xx_data[0], e0xx_data[1],
	87	e0xx_data[2], e0xx_data[3],
	88	e0xx_data[4], e0xx_data[5],
89	89	e0xx_data[6] );
90	90	#endif
91	91
92	92	switch (offset)
93	93	{
94	94	case 0:   /* 0xe000 interrupt enable */
95		interrupt_enable_w(space,0,data);
	95	interrupt_enable_w(space, 0, data);
96	96	break;
97	97
98	98	case 1:   /* 0xe001 (value 0 then 1) written right after the soundlatch_w */
r4679	r4680
194	194
195	195	static ADDRESS_MAP_START( main_map, ADDRESS_SPACE_PROGRAM, 8 )
196	196	AM_RANGE(0x0000, 0x5fff) AM_ROM
197		AM_RANGE(0x6000, 0x9fff) AM_READWRITE(SMH_BANK1, SMH_ROM)
198		AM_RANGE(0xa000, 0xbfff) AM_READWRITE(SMH_BANK2, SMH_ROM)
	197	AM_RANGE(0x6000, 0x9fff) AM_READWRITE(SMH_BANK(1), SMH_ROM)
	198	AM_RANGE(0xa000, 0xbfff) AM_READWRITE(SMH_BANK(2), SMH_ROM)
199	199	AM_RANGE(0xc000, 0xc7ff) AM_READWRITE(tankbust_background_videoram_r, tankbust_background_videoram_w) AM_BASE(&videoram)
200	200	AM_RANGE(0xc800, 0xcfff) AM_READWRITE(tankbust_background_colorram_r, tankbust_background_colorram_w) AM_BASE(&colorram)
201	201	AM_RANGE(0xd000, 0xd7ff) AM_READWRITE(tankbust_txtram_r, tankbust_txtram_w) AM_BASE(&tankbust_txtram)

src/mame/drivers/wecleman.c

r4679	r4680
376	376
377	377	// Bit 0 : SUBINT
378	378	if ( (wecleman_irqctrl & 1) && (!(data & 1)) )   // 1->0 transition
379		cpu_set_input_line(space->machine->cpu[1],4,HOLD_LINE);
	379	cputag_set_input_line(space->machine, "sub", 4, HOLD_LINE);
380	380
381	381	// Bit 1 : NSUBRST
382		if (data & 2)   cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_RESET, CLEAR_LINE  );
383		else                    cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_RESET, ASSERT_LINE );
	382	if (data & 2)
	383	cputag_set_input_line(space->machine, "sub", INPUT_LINE_RESET, CLEAR_LINE);
	384	else
	385	cputag_set_input_line(space->machine, "sub", INPUT_LINE_RESET, ASSERT_LINE);
384	386
385	387	// Bit 2 : SOUND-ON
386	388	// Bit 3 : SOUNDRST
r4679	r4680
655	657	{
656	658	if (ACCESSING_BITS_0_7)
657	659	{
658		soundlatch_w(space,0,data & 0xFF);
659		cpu_set_input_line(space->machine->cpu[2],0, HOLD_LINE);
	660	soundlatch_w(space, 0, data & 0xFF);
	661	cputag_set_input_line(space->machine, "audiocpu", 0, HOLD_LINE);
660	662	}
661	663	}
662	664
r4679	r4680
715	717	{
716	718	if (ACCESSING_BITS_0_7)
717	719	{
718		soundlatch_w(space,0,data & 0xFF);
719		cpu_set_input_line(space->machine->cpu[2],M6809_IRQ_LINE, HOLD_LINE);
	720	soundlatch_w(space, 0, data & 0xFF);
	721	cputag_set_input_line(space->machine, "audiocpu", M6809_IRQ_LINE, HOLD_LINE);
720	722	}
721	723	}
722	724
r4679	r4680
1259	1261
1260	1262	static void bitswap(UINT8 *src,size_t len,int _14,int _13,int _12,int _11,int _10,int _f,int _e,int _d,int _c,int _b,int _a,int _9,int _8,int _7,int _6,int _5,int _4,int _3,int _2,int _1,int _0)
1261	1263	{
1262		UINT8 *buffer = malloc_or_die(len);
	1264	UINT8 *buffer = alloc_array_or_die(UINT8, len);
1263	1265	{
1264	1266	int i;
1265	1267
r4679	r4680
1375	1377	int i;
1376	1378
1377	1379	base = memory_region(machine, "gfx1");   // sprites
1378		temp = malloc_or_die( bank_size );
	1380	temp = alloc_array_or_die(UINT8, bank_size );
1379	1381
1380	1382	for( i = num16_banks; i >0; i-- ){
1381	1383	UINT8 *finish   = base + 2*bank_size*i;

src/mame/drivers/crbaloon.c

r4679	r4680
163	163	const device_config *sn = devtag_get_device(space->machine, "sn");
164	164
165	165	/* D0 - interrupt enable - also goes to PC3259 as /HTCTRL */
166		cpu_interrupt_enable(space->machine->cpu[0], (data & 0x01) ? TRUE : FALSE);
	166	cpu_interrupt_enable(cputag_get_cpu(space->machine, "maincpu"), (data & 0x01) ? TRUE : FALSE);
167	167	crbaloon_set_clear_collision_address((data & 0x01) ? TRUE : FALSE);
168	168
169	169	/* D1 - SOUND STOP */
r4679	r4680
342	342
343	343	static MACHINE_RESET( crballoon )
344	344	{
345		const address_space *space = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_IO);
	345	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_IO);
346	346	const device_config *discrete = devtag_get_device(machine, "discrete");
347	347
348	348	pc3092_reset();

src/mame/drivers/seattle.c

r4679	r4680
509	509	galileo.timer[3].timer = timer_alloc(machine, galileo_timer_callback, NULL);
510	510
511	511	/* set the fastest DRC options, but strict verification */
512		mips3drc_set_options(machine->cpu[0], MIPS3DRC_FASTEST_OPTIONS + MIPS3DRC_STRICT_VERIFY);
	512	mips3drc_set_options(cputag_get_cpu(machine, "maincpu"), MIPS3DRC_FASTEST_OPTIONS + MIPS3DRC_STRICT_VERIFY);
513	513
514	514	/* configure fast RAM regions for DRC */
515		mips3drc_add_fastram(machine->cpu[0], 0x00000000, 0x007fffff, FALSE, rambase);
516		mips3drc_add_fastram(machine->cpu[0], 0x1fc00000, 0x1fc7ffff, TRUE,  rombase);
	515	mips3drc_add_fastram(cputag_get_cpu(machine, "maincpu"), 0x00000000, 0x007fffff, FALSE, rambase);
	516	mips3drc_add_fastram(cputag_get_cpu(machine, "maincpu"), 0x1fc00000, 0x1fc7ffff, TRUE,  rombase);
517	517
518	518	/* register for save states */
519	519	state_save_register_global_array(machine, galileo.reg);
r4679	r4680
583	583
584	584	static void ide_interrupt(const device_config *device, int state)
585	585	{
586		cpu_set_input_line(device->machine->cpu[0], IDE_IRQ_NUM, state);
	586	cputag_set_input_line(device->machine, "maincpu", IDE_IRQ_NUM, state);
587	587	}
588	588
589	589
r4679	r4680
601	601	{
602	602	UINT8 assert = ethernet_irq_state && (*interrupt_enable & (1 << ETHERNET_IRQ_SHIFT));
603	603	if (ethernet_irq_num != 0)
604		cpu_set_input_line(machine->cpu[0], ethernet_irq_num, assert ? ASSERT_LINE : CLEAR_LINE);
	604	cputag_set_input_line(machine, "maincpu", ethernet_irq_num, assert ? ASSERT_LINE : CLEAR_LINE);
605	605	}
606	606	else if (board_config == SEATTLE_WIDGET_CONFIG)
607	607	update_widget_irq(machine);
r4679	r4680
622	622
623	623	static void ioasic_irq(running_machine *machine, int state)
624	624	{
625		cpu_set_input_line(machine->cpu[0], IOASIC_IRQ_NUM, state);
	625	cputag_set_input_line(machine, "maincpu", IOASIC_IRQ_NUM, state);
626	626	}
627	627
628	628
r4679	r4680
657	657
658	658	/* VBLANK: clear anything pending on the old IRQ */
659	659	if (vblank_irq_num != 0)
660		cpu_set_input_line(space->machine->cpu[0], vblank_irq_num, CLEAR_LINE);
	660	cputag_set_input_line(space->machine, "maincpu", vblank_irq_num, CLEAR_LINE);
661	661
662	662	/* VBLANK: compute the new IRQ vector */
663	663	irq = (*interrupt_config >> (2*VBLANK_IRQ_SHIFT)) & 3;
r4679	r4680
668	668	{
669	669	/* Widget: clear anything pending on the old IRQ */
670	670	if (widget.irq_num != 0)
671		cpu_set_input_line(space->machine->cpu[0], widget.irq_num, CLEAR_LINE);
	671	cputag_set_input_line(space->machine, "maincpu", widget.irq_num, CLEAR_LINE);
672	672
673	673	/* Widget: compute the new IRQ vector */
674	674	irq = (*interrupt_config >> (2*WIDGET_IRQ_SHIFT)) & 3;
r4679	r4680
680	680	{
681	681	/* Ethernet: clear anything pending on the old IRQ */
682	682	if (ethernet_irq_num != 0)
683		cpu_set_input_line(space->machine->cpu[0], ethernet_irq_num, CLEAR_LINE);
	683	cputag_set_input_line(space->machine, "maincpu", ethernet_irq_num, CLEAR_LINE);
684	684
685	685	/* Ethernet: compute the new IRQ vector */
686	686	irq = (*interrupt_config >> (2*ETHERNET_IRQ_SHIFT)) & 3;
r4679	r4680
725	725	/* if the VBLANK has been latched, and the interrupt is enabled, assert */
726	726	if (vblank_latch && (*interrupt_enable & (1 << VBLANK_IRQ_SHIFT)))
727	727	state = ASSERT_LINE;
728		cpu_set_input_line(machine->cpu[0], vblank_irq_num, state);
	728	cputag_set_input_line(machine, "maincpu", vblank_irq_num, state);
729	729	}
730	730
731	731
r4679	r4680
886	886	/* if any unmasked interrupts are live, we generate */
887	887	if (galileo.reg[GREG_INT_STATE] & galileo.reg[GREG_INT_MASK])
888	888	state = ASSERT_LINE;
889		cpu_set_input_line(machine->cpu[0], GALILEO_IRQ_NUM, state);
	889	cputag_set_input_line(machine, "maincpu", GALILEO_IRQ_NUM, state);
890	890
891	891	if (LOG_GALILEO)
892	892	logerror("Galileo IRQ %s\n", (state == ASSERT_LINE) ? "asserted" : "cleared");
r4679	r4680
1333	1333	}
1334	1334	else
1335	1335	{
1336		if (LOG_DMA) logerror("%08X:Stalling CPU on voodoo\n", cpu_get_pc(device->machine->cpu[0]));
1337		cpu_spinuntil_trigger(device->machine->cpu[0], 45678);
	1336	if (LOG_DMA) logerror("%08X:Stalling CPU on voodoo\n", cpu_get_pc(cputag_get_cpu(device->machine, "maincpu")));
	1337	cpu_spinuntil_trigger(cputag_get_cpu(device->machine, "maincpu"), 45678);
1338	1338	}
1339	1339	}
1340	1340
r4679	r4680
1347	1347	for (which = 0; which < 4; which++)
1348	1348	if (galileo.dma_stalled_on_voodoo[which])
1349	1349	{
1350		const address_space *space = cpu_get_address_space(device->machine->cpu[0], ADDRESS_SPACE_PROGRAM);
	1350	const address_space *space = cputag_get_address_space(device->machine, "maincpu", ADDRESS_SPACE_PROGRAM);
1351	1351	if (LOG_DMA) logerror("Resuming DMA%d on voodoo\n", which);
1352	1352
1353	1353	/* mark this DMA as no longer stalled */
r4679	r4680
1504	1504
1505	1505	/* update the IRQ state */
1506	1506	if (widget.irq_num != 0)
1507		cpu_set_input_line(machine->cpu[0], widget.irq_num, assert ? ASSERT_LINE : CLEAR_LINE);
	1507	cputag_set_input_line(machine, "maincpu", widget.irq_num, assert ? ASSERT_LINE : CLEAR_LINE);
1508	1508	}
1509	1509
1510	1510
r4679	r4680
1524	1524	break;
1525	1525
1526	1526	case WREG_ANALOG:
1527		result = analog_port_r(cpu_get_address_space(device->machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0, mem_mask);
	1527	result = analog_port_r(cputag_get_address_space(device->machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0, mem_mask);
1528	1528	break;
1529	1529
1530	1530	case WREG_ETHER_DATA:
r4679	r4680
1555	1555	break;
1556	1556
1557	1557	case WREG_ANALOG:
1558		analog_port_w(cpu_get_address_space(device->machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0, data, mem_mask);
	1558	analog_port_w(cputag_get_address_space(device->machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0, data, mem_mask);
1559	1559	break;
1560	1560
1561	1561	case WREG_ETHER_DATA:
r4679	r4680
1720	1720	{
1721	1721	/* note that blitz times out if we don't have this cycle stealing */
1722	1722	if (offset == 0x3f6/4)
1723		cpu_eat_cycles(device->machine->cpu[0], 100);
	1723	cpu_eat_cycles(cputag_get_cpu(device->machine, "maincpu"), 100);
1724	1724	return ide_controller32_r(device, offset, mem_mask);
1725	1725	}
1726	1726
r4679	r4680
2777	2777	{
2778	2778	case PHOENIX_CONFIG:
2779	2779	/* original Phoenix board only has 4MB of RAM */
2780		memory_install_readwrite32_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x00400000, 0x007fffff, 0, 0, SMH_UNMAP, SMH_UNMAP);
	2780	memory_install_readwrite32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x00400000, 0x007fffff, 0, 0, (read32_space_func)SMH_UNMAP, (write32_space_func)SMH_UNMAP);
2781	2781	break;
2782	2782
2783	2783	case SEATTLE_WIDGET_CONFIG:
2784	2784	/* set up the widget board */
2785	2785	device = devtag_get_device(machine, "ethernet");
2786		memory_install_readwrite32_device_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), device, 0x16c00000, 0x16c0001f, 0, 0, widget_r, widget_w);
	2786	memory_install_readwrite32_device_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), device, 0x16c00000, 0x16c0001f, 0, 0, widget_r, widget_w);
2787	2787	break;
2788	2788
2789	2789	case FLAGSTAFF_CONFIG:
2790	2790	/* set up the analog inputs */
2791		memory_install_readwrite32_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x14000000, 0x14000003, 0, 0, analog_port_r, analog_port_w);
	2791	memory_install_readwrite32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x14000000, 0x14000003, 0, 0, analog_port_r, analog_port_w);
2792	2792
2793	2793	/* set up the ethernet controller */
2794	2794	device = devtag_get_device(machine, "ethernet");
2795		memory_install_readwrite32_device_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), device, 0x16c00000, 0x16c0003f, 0, 0, ethernet_r, ethernet_w);
	2795	memory_install_readwrite32_device_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), device, 0x16c00000, 0x16c0003f, 0, 0, ethernet_r, ethernet_w);
2796	2796	break;
2797	2797	}
2798	2798	}
r4679	r4680
2804	2804	init_common(machine, MIDWAY_IOASIC_STANDARD, 310/* others? */, 80, PHOENIX_CONFIG);
2805	2805
2806	2806	/* speedups */
2807		mips3drc_add_hotspot(machine->cpu[0], 0x8004413C, 0x0C0054B4, 250);      /* confirmed */
2808		mips3drc_add_hotspot(machine->cpu[0], 0x80094930, 0x00A2102B, 250);      /* confirmed */
2809		mips3drc_add_hotspot(machine->cpu[0], 0x80092984, 0x3C028011, 250);      /* confirmed */
	2807	mips3drc_add_hotspot(cputag_get_cpu(machine, "maincpu"), 0x8004413C, 0x0C0054B4, 250);      /* confirmed */
	2808	mips3drc_add_hotspot(cputag_get_cpu(machine, "maincpu"), 0x80094930, 0x00A2102B, 250);      /* confirmed */
	2809	mips3drc_add_hotspot(cputag_get_cpu(machine, "maincpu"), 0x80092984, 0x3C028011, 250);      /* confirmed */
2810	2810	}
2811	2811
2812	2812
r4679	r4680
2816	2816	init_common(machine, MIDWAY_IOASIC_MACE, 319/* others? */, 80, SEATTLE_CONFIG);
2817	2817
2818	2818	/* speedups */
2819		mips3drc_add_hotspot(machine->cpu[0], 0x800108F8, 0x8C420000, 250);      /* confirmed */
	2819	mips3drc_add_hotspot(cputag_get_cpu(machine, "maincpu"), 0x800108F8, 0x8C420000, 250);      /* confirmed */
2820	2820	}
2821	2821
2822	2822
r4679	r4680
2826	2826	init_common(machine, MIDWAY_IOASIC_STANDARD, 315/* no alternates */, 100, FLAGSTAFF_CONFIG);
2827	2827
2828	2828	/* speedups */
2829		mips3drc_add_hotspot(machine->cpu[0], 0x80059F34, 0x3C028012, 250);      /* confirmed */
2830		mips3drc_add_hotspot(machine->cpu[0], 0x800A5AF4, 0x8E300010, 250);      /* confirmed */
2831		mips3drc_add_hotspot(machine->cpu[0], 0x8004C260, 0x3C028012, 250);      /* confirmed */
	2829	mips3drc_add_hotspot(cputag_get_cpu(machine, "maincpu"), 0x80059F34, 0x3C028012, 250);      /* confirmed */
	2830	mips3drc_add_hotspot(cputag_get_cpu(machine, "maincpu"), 0x800A5AF4, 0x8E300010, 250);      /* confirmed */
	2831	mips3drc_add_hotspot(cputag_get_cpu(machine, "maincpu"), 0x8004C260, 0x3C028012, 250);      /* confirmed */
2832	2832	}
2833	2833
2834	2834
r4679	r4680
2838	2838	init_common(machine, MIDWAY_IOASIC_SFRUSHRK, 331/* unknown */, 100, FLAGSTAFF_CONFIG);
2839	2839
2840	2840	/* speedups */
2841		mips3drc_add_hotspot(machine->cpu[0], 0x800343E8, 0x3C028012, 250);      /* confirmed */
2842		mips3drc_add_hotspot(machine->cpu[0], 0x8008F4F0, 0x3C028012, 250);      /* confirmed */
2843		mips3drc_add_hotspot(machine->cpu[0], 0x800A365C, 0x8E300014, 250);      /* confirmed */
2844		mips3drc_add_hotspot(machine->cpu[0], 0x80051DAC, 0x3C028012, 250);      /* confirmed */
	2841	mips3drc_add_hotspot(cputag_get_cpu(machine, "maincpu"), 0x800343E8, 0x3C028012, 250);      /* confirmed */
	2842	mips3drc_add_hotspot(cputag_get_cpu(machine, "maincpu"), 0x8008F4F0, 0x3C028012, 250);      /* confirmed */
	2843	mips3drc_add_hotspot(cputag_get_cpu(machine, "maincpu"), 0x800A365C, 0x8E300014, 250);      /* confirmed */
	2844	mips3drc_add_hotspot(cputag_get_cpu(machine, "maincpu"), 0x80051DAC, 0x3C028012, 250);      /* confirmed */
2845	2845	}
2846	2846
2847	2847
r4679	r4680
2852	2852	midway_ioasic_set_auto_ack(1);
2853	2853
2854	2854	/* speedups */
2855		mips3drc_add_hotspot(machine->cpu[0], 0x80032534, 0x02221024, 250);      /* confirmed */
2856		mips3drc_add_hotspot(machine->cpu[0], 0x800B1BE4, 0x8E110014, 250);      /* confirmed */
	2855	mips3drc_add_hotspot(cputag_get_cpu(machine, "maincpu"), 0x80032534, 0x02221024, 250);      /* confirmed */
	2856	mips3drc_add_hotspot(cputag_get_cpu(machine, "maincpu"), 0x800B1BE4, 0x8E110014, 250);      /* confirmed */
2857	2857	}
2858	2858
2859	2859
r4679	r4680
2863	2863	init_common(machine, MIDWAY_IOASIC_VAPORTRX, 324/* 334? unknown */, 100, SEATTLE_WIDGET_CONFIG);
2864	2864
2865	2865	/* speedups */
2866		mips3drc_add_hotspot(machine->cpu[0], 0x80049F14, 0x3C028020, 250);      /* confirmed */
2867		mips3drc_add_hotspot(machine->cpu[0], 0x8004859C, 0x3C028020, 250);      /* confirmed */
2868		mips3drc_add_hotspot(machine->cpu[0], 0x8005922C, 0x8E020014, 250);      /* confirmed */
	2866	mips3drc_add_hotspot(cputag_get_cpu(machine, "maincpu"), 0x80049F14, 0x3C028020, 250);      /* confirmed */
	2867	mips3drc_add_hotspot(cputag_get_cpu(machine, "maincpu"), 0x8004859C, 0x3C028020, 250);      /* confirmed */
	2868	mips3drc_add_hotspot(cputag_get_cpu(machine, "maincpu"), 0x8005922C, 0x8E020014, 250);      /* confirmed */
2869	2869	}
2870	2870
2871	2871
r4679	r4680
2887	2887	rombase[0x934/4] += 4;
2888	2888
2889	2889	/* main CPU speedups */
2890		mips3drc_add_hotspot(machine->cpu[0], 0x80135510, 0x3C028024, 250);      /* confirmed */
2891		mips3drc_add_hotspot(machine->cpu[0], 0x800087DC, 0x8E820010, 250);      /* confirmed */
	2890	mips3drc_add_hotspot(cputag_get_cpu(machine, "maincpu"), 0x80135510, 0x3C028024, 250);      /* confirmed */
	2891	mips3drc_add_hotspot(cputag_get_cpu(machine, "maincpu"), 0x800087DC, 0x8E820010, 250);      /* confirmed */
2892	2892	}
2893	2893
2894	2894
r4679	r4680
2898	2898	init_common(machine, MIDWAY_IOASIC_BLITZ99, 481/* or 484 or 520 */, 80, SEATTLE_CONFIG);
2899	2899
2900	2900	/* speedups */
2901		mips3drc_add_hotspot(machine->cpu[0], 0x8014E41C, 0x3C038025, 250);      /* confirmed */
2902		mips3drc_add_hotspot(machine->cpu[0], 0x80011F10, 0x8E020018, 250);      /* confirmed */
	2901	mips3drc_add_hotspot(cputag_get_cpu(machine, "maincpu"), 0x8014E41C, 0x3C038025, 250);      /* confirmed */
	2902	mips3drc_add_hotspot(cputag_get_cpu(machine, "maincpu"), 0x80011F10, 0x8E020018, 250);      /* confirmed */
2903	2903	}
2904	2904
2905	2905
r4679	r4680
2909	2909	init_common(machine, MIDWAY_IOASIC_BLITZ99, 494/* or 498 */, 80, SEATTLE_CONFIG);
2910	2910
2911	2911	/* speedups */
2912		mips3drc_add_hotspot(machine->cpu[0], 0x8015773C, 0x3C038025, 250);      /* confirmed */
2913		mips3drc_add_hotspot(machine->cpu[0], 0x80012CA8, 0x8E020018, 250);      /* confirmed */
	2912	mips3drc_add_hotspot(cputag_get_cpu(machine, "maincpu"), 0x8015773C, 0x3C038025, 250);      /* confirmed */
	2913	mips3drc_add_hotspot(cputag_get_cpu(machine, "maincpu"), 0x80012CA8, 0x8E020018, 250);      /* confirmed */
2914	2914	}
2915	2915
2916	2916
r4679	r4680
2920	2920	init_common(machine, MIDWAY_IOASIC_CARNEVIL, 469/* 469 or 486 or 528 */, 80, SEATTLE_CONFIG);
2921	2921
2922	2922	/* set up the gun */
2923		memory_install_readwrite32_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x16800000, 0x1680001f, 0, 0, carnevil_gun_r, carnevil_gun_w);
	2923	memory_install_readwrite32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x16800000, 0x1680001f, 0, 0, carnevil_gun_r, carnevil_gun_w);
2924	2924
2925	2925	/* speedups */
2926		mips3drc_add_hotspot(machine->cpu[0], 0x8015176C, 0x3C03801A, 250);      /* confirmed */
2927		mips3drc_add_hotspot(machine->cpu[0], 0x80011FBC, 0x8E020018, 250);      /* confirmed */
	2926	mips3drc_add_hotspot(cputag_get_cpu(machine, "maincpu"), 0x8015176C, 0x3C03801A, 250);      /* confirmed */
	2927	mips3drc_add_hotspot(cputag_get_cpu(machine, "maincpu"), 0x80011FBC, 0x8E020018, 250);      /* confirmed */
2928	2928	}
2929	2929
2930	2930
r4679	r4680
2934	2934	init_common(machine, MIDWAY_IOASIC_HYPRDRIV, 469/* unknown */, 80, SEATTLE_WIDGET_CONFIG);
2935	2935
2936	2936	/* speedups */
2937		mips3drc_add_hotspot(machine->cpu[0], 0x801643BC, 0x3C03801B, 250);      /* confirmed */
2938		mips3drc_add_hotspot(machine->cpu[0], 0x80011FB8, 0x8E020018, 250);      /* confirmed */
2939		//mips3drc_add_hotspot(machine->cpu[0], 0x80136A80, 0x3C02801D, 250);      /* potential */
	2937	mips3drc_add_hotspot(cputag_get_cpu(machine, "maincpu"), 0x801643BC, 0x3C03801B, 250);      /* confirmed */
	2938	mips3drc_add_hotspot(cputag_get_cpu(machine, "maincpu"), 0x80011FB8, 0x8E020018, 250);      /* confirmed */
	2939	//mips3drc_add_hotspot(cputag_get_cpu(machine, "maincpu"), 0x80136A80, 0x3C02801D, 250);      /* potential */
2940	2940	}
2941	2941
2942	2942

src/mame/drivers/munchmo.c

r4679	r4680
62	62	static WRITE8_HANDLER( mnchmobl_soundlatch_w )
63	63	{
64	64	soundlatch_w( space, offset, data );
65		cpu_set_input_line(space->machine->cpu[1], 0, HOLD_LINE );
	65	cputag_set_input_line(space->machine, "audiocpu", 0, HOLD_LINE );
66	66	}
67	67
68	68	static WRITE8_HANDLER( sound_nmi_ack_w )
69	69	{
70		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_NMI, CLEAR_LINE);
	70	cputag_set_input_line(space->machine, "audiocpu", INPUT_LINE_NMI, CLEAR_LINE);
71	71	}
72	72
73	73

src/mame/drivers/funkybee.c

r4679	r4680
98	98	coin_counter_w(offset,data);
99	99	}
100	100
101		static ADDRESS_MAP_START( readmem, ADDRESS_SPACE_PROGRAM, 8 )
102		AM_RANGE(0x0000, 0x4fff) AM_READ(SMH_ROM)
103		AM_RANGE(0x8000, 0x87ff) AM_READ(SMH_RAM)
104		AM_RANGE(0xa000, 0xdfff) AM_READ(SMH_RAM)
105		AM_RANGE(0xf000, 0xf000) AM_READNOP   /* IRQ Ack */
106		AM_RANGE(0xf800, 0xf800) AM_READ(funkybee_input_port_0_r)
107		AM_RANGE(0xf801, 0xf801) AM_READ_PORT("IN1")
108		AM_RANGE(0xf802, 0xf802) AM_READ_PORT("IN2")
109		ADDRESS_MAP_END
110
111		static ADDRESS_MAP_START( writemem, ADDRESS_SPACE_PROGRAM, 8 )
112		AM_RANGE(0x0000, 0x4fff) AM_WRITE(SMH_ROM)
113		AM_RANGE(0x8000, 0x87ff) AM_WRITE(SMH_RAM)
114		AM_RANGE(0xa000, 0xbfff) AM_WRITE(funkybee_videoram_w) AM_BASE(&videoram)
115		AM_RANGE(0xc000, 0xdfff) AM_WRITE(funkybee_colorram_w) AM_BASE(&colorram)
	101	static ADDRESS_MAP_START( funkybee_map, ADDRESS_SPACE_PROGRAM, 8 )
	102	AM_RANGE(0x0000, 0x4fff) AM_ROM
	103	AM_RANGE(0x8000, 0x87ff) AM_RAM
	104	AM_RANGE(0xa000, 0xbfff) AM_RAM_WRITE(funkybee_videoram_w) AM_BASE(&videoram)
	105	AM_RANGE(0xc000, 0xdfff) AM_RAM_WRITE(funkybee_colorram_w) AM_BASE(&colorram)
116	106	AM_RANGE(0xe000, 0xe000) AM_WRITE(funkybee_scroll_w)
117	107	AM_RANGE(0xe800, 0xe800) AM_WRITE(funkybee_flipscreen_w)
118	108	AM_RANGE(0xe802, 0xe803) AM_WRITE(funkybee_coin_counter_w)
119	109	AM_RANGE(0xe805, 0xe805) AM_WRITE(funkybee_gfx_bank_w)
120		AM_RANGE(0xf800, 0xf800) AM_WRITE(watchdog_reset_w)
	110	AM_RANGE(0xf000, 0xf000) AM_READNOP   /* IRQ Ack */
	111	AM_RANGE(0xf800, 0xf800) AM_READWRITE(funkybee_input_port_0_r, watchdog_reset_w)
	112	AM_RANGE(0xf801, 0xf801) AM_READ_PORT("IN1")
	113	AM_RANGE(0xf802, 0xf802) AM_READ_PORT("IN2")
121	114	ADDRESS_MAP_END
122	115
123	116	static ADDRESS_MAP_START( io_map, ADDRESS_SPACE_IO, 8 )
r4679	r4680
299	292
300	293	/* basic machine hardware */
301	294	MDRV_CPU_ADD("maincpu", Z80, 3072000)   /* 3.072 MHz */
302		MDRV_CPU_PROGRAM_MAP(readmem,writemem)
	295	MDRV_CPU_PROGRAM_MAP(funkybee_map,0)
303	296	MDRV_CPU_IO_MAP(io_map,0)
304	297	MDRV_CPU_VBLANK_INT("screen", irq0_line_hold)
305	298

src/mame/drivers/galastrm.c

r4679	r4680
64	64
65	65	static TIMER_CALLBACK( galastrm_interrupt6 )
66	66	{
67		cpu_set_input_line(machine->cpu[0], 6, HOLD_LINE);
	67	cputag_set_input_line(machine, "maincpu", 6, HOLD_LINE);
68	68	}
69	69
70	70
r4679	r4680
176	176	MEMORY STRUCTURES
177	177	***********************************************************/
178	178
179		static ADDRESS_MAP_START( galastrm_readmem, ADDRESS_SPACE_PROGRAM, 32 )
180		AM_RANGE(0x000000, 0x0fffff) AM_READ(SMH_ROM)
181		AM_RANGE(0x200000, 0x21ffff) AM_READ(SMH_RAM)   /* main CPUA ram */
182		AM_RANGE(0x300000, 0x303fff) AM_READ(SMH_RAM)   /* Sprite ram */
	179	static ADDRESS_MAP_START( galastrm_map, ADDRESS_SPACE_PROGRAM, 32 )
	180	AM_RANGE(0x000000, 0x0fffff) AM_ROM
	181	AM_RANGE(0x200000, 0x21ffff) AM_RAM AM_BASE(&galastrm_ram)                         /* main CPUA ram */
	182	AM_RANGE(0x300000, 0x303fff) AM_RAM AM_BASE(&spriteram32) AM_SIZE(&spriteram_size)
183	183	AM_RANGE(0x400000, 0x400003) AM_READ_PORT("IN0")
184	184	AM_RANGE(0x400004, 0x400007) AM_READ_PORT("IN1")
185		AM_RANGE(0x500000, 0x500007) AM_READ(galastrm_adstick_ctrl_r)
186		AM_RANGE(0x600000, 0x6007ff) AM_READ(SMH_RAM)   /* Sound shared ram */
187		AM_RANGE(0x800000, 0x80ffff) AM_READ(TC0480SCP_long_r)
188		AM_RANGE(0x830000, 0x83002f) AM_READ(TC0480SCP_ctrl_long_r)
189		AM_RANGE(0xd00000, 0xd0ffff) AM_READ(TC0100SCN_long_r)   /* piv tilemaps */
190		AM_RANGE(0xd20000, 0xd2000f) AM_READ(TC0100SCN_ctrl_long_r)
191		ADDRESS_MAP_END
192
193		static ADDRESS_MAP_START( galastrm_writemem, ADDRESS_SPACE_PROGRAM, 32 )
194		AM_RANGE(0x000000, 0x1fffff) AM_WRITE(SMH_ROM)
195		AM_RANGE(0x200000, 0x21ffff) AM_WRITE(SMH_RAM) AM_BASE(&galastrm_ram)
196		AM_RANGE(0x300000, 0x303fff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram32) AM_SIZE(&spriteram_size)
197		AM_RANGE(0x400000, 0x400007) AM_WRITE(galastrm_input_w)   /* eerom etc. */
	185	AM_RANGE(0x400000, 0x400007) AM_WRITE(galastrm_input_w)                           /* eerom etc. */
198	186	AM_RANGE(0x40fff0, 0x40fff3) AM_WRITENOP
199		AM_RANGE(0x500000, 0x500007) AM_WRITE(galastrm_adstick_ctrl_w)
200		AM_RANGE(0x600000, 0x6007ff) AM_WRITE(SMH_RAM) AM_BASE(&f3_shared_ram)
201		AM_RANGE(0x800000, 0x80ffff) AM_WRITE(TC0480SCP_long_w)
202		AM_RANGE(0x830000, 0x83002f) AM_WRITE(TC0480SCP_ctrl_long_w)
203		AM_RANGE(0x900000, 0x900003) AM_WRITE(galastrm_palette_w)   /* TC0110PCR */
204		AM_RANGE(0xb00000, 0xb00003) AM_WRITE(galastrm_tc0610_0_w)      /* TC0610 */
	187	AM_RANGE(0x500000, 0x500007) AM_READWRITE(galastrm_adstick_ctrl_r, galastrm_adstick_ctrl_w)
	188	AM_RANGE(0x600000, 0x6007ff) AM_RAM AM_BASE(&f3_shared_ram)                        /* Sound shared ram */
	189	AM_RANGE(0x800000, 0x80ffff) AM_READWRITE(TC0480SCP_long_r, TC0480SCP_long_w)
	190	AM_RANGE(0x830000, 0x83002f) AM_READWRITE(TC0480SCP_ctrl_long_r, TC0480SCP_ctrl_long_w)
	191	AM_RANGE(0x900000, 0x900003) AM_WRITE(galastrm_palette_w)                        /* TC0110PCR */
	192	AM_RANGE(0xb00000, 0xb00003) AM_WRITE(galastrm_tc0610_0_w)                        /* TC0610 */
205	193	AM_RANGE(0xc00000, 0xc00003) AM_WRITE(galastrm_tc0610_1_w)
206		AM_RANGE(0xd00000, 0xd0ffff) AM_WRITE(TC0100SCN_long_w)   /* piv tilemaps */
207		AM_RANGE(0xd20000, 0xd2000f) AM_WRITE(TC0100SCN_ctrl_long_w)
	194	AM_RANGE(0xd00000, 0xd0ffff) AM_READWRITE(TC0100SCN_long_r, TC0100SCN_long_w)         /* piv tilemaps */
	195	AM_RANGE(0xd20000, 0xd2000f) AM_READWRITE(TC0100SCN_ctrl_long_r, TC0100SCN_ctrl_long_w)
208	196	ADDRESS_MAP_END
209	197
210	198	/***********************************************************
r4679	r4680
342	330	static MACHINE_DRIVER_START( galastrm )
343	331	/* basic machine hardware */
344	332	MDRV_CPU_ADD("maincpu", M68EC020, 16000000)   /* 16 MHz */
345		MDRV_CPU_PROGRAM_MAP(galastrm_readmem,galastrm_writemem)
	333	MDRV_CPU_PROGRAM_MAP(galastrm_map,0)
346	334	MDRV_CPU_VBLANK_INT("screen", galastrm_interrupt) /* VBL */
347	335
348	336	TAITO_F3_SOUND_SYSTEM_CPU(16000000)

src/mame/drivers/btoads.c

r4679	r4680
68	68	{
69	69	main_to_sound_data = param;
70	70	main_to_sound_ready = 1;
71		cpu_triggerint(machine->cpu[1]);
	71	cpu_triggerint(cputag_get_cpu(machine, "audiocpu"));
72	72
73	73	/* use a timer to make long transfers faster */
74	74	timer_set(machine, ATTOTIME_IN_USEC(50), NULL, 0, 0);
r4679	r4680
149	149	devtag_reset(space->machine, "bsmt");
150	150
151	151	/* also clears interrupts */
152		cpu_set_input_line(space->machine->cpu[1], 0, CLEAR_LINE);
	152	cputag_set_input_line(space->machine, "audiocpu", 0, CLEAR_LINE);
153	153	sound_int_state = data;
154	154	}
155	155

src/mame/drivers/tetrisp2.c

r4679	r4680
1032	1032
1033	1033	static TIMER_CALLBACK( rockn_timer_level4_callback )
1034	1034	{
1035		cpu_set_input_line(machine->cpu[0], 4, HOLD_LINE);
	1035	cputag_set_input_line(machine, "maincpu", 4, HOLD_LINE);
1036	1036	}
1037	1037
1038	1038	static TIMER_CALLBACK( rockn_timer_sub_level4_callback )
1039	1039	{
1040		cpu_set_input_line(machine->cpu[1], 4, HOLD_LINE);
	1040	cputag_set_input_line(machine, "sub", 4, HOLD_LINE);
1041	1041	}
1042	1042
1043	1043
1044	1044	static TIMER_CALLBACK( rockn_timer_level1_callback )
1045	1045	{
1046		cpu_set_input_line(machine->cpu[0], 1, HOLD_LINE);
	1046	cputag_set_input_line(machine, "maincpu", 1, HOLD_LINE);
1047	1047	}
1048	1048
1049	1049	static TIMER_CALLBACK( rockn_timer_sub_level1_callback )
1050	1050	{
1051		cpu_set_input_line(machine->cpu[1], 1, HOLD_LINE);
	1051	cputag_set_input_line(machine, "sub", 1, HOLD_LINE);
1052	1052	}
1053	1053
1054	1054	static void init_rockn_timer(running_machine *machine)

src/mame/drivers/lastduel.c

r4679	r4680
49	49
50	50	/******************************************************************************/
51	51
52		static ADDRESS_MAP_START( lastduel_readmem, ADDRESS_SPACE_PROGRAM, 16 )
53		AM_RANGE(0x000000, 0x05ffff) AM_READ(SMH_ROM)
54		AM_RANGE(0xfc0800, 0xfc0fff) AM_READ(SMH_RAM)
55		AM_RANGE(0xfc4000, 0xfc4001) AM_READ_PORT("P1_P2")
56		AM_RANGE(0xfc4002, 0xfc4003) AM_READ_PORT("SYSTEM")
	52	static ADDRESS_MAP_START( lastduel_map, ADDRESS_SPACE_PROGRAM, 16 )
	53	AM_RANGE(0x000000, 0x05ffff) AM_ROM
	54	AM_RANGE(0xfc0000, 0xfc0003) AM_WRITENOP /* Written rarely */
	55	AM_RANGE(0xfc0800, 0xfc0fff) AM_RAM AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)
	56	AM_RANGE(0xfc4000, 0xfc4001) AM_READ_PORT("P1_P2") AM_WRITE(lastduel_flip_w)
	57	AM_RANGE(0xfc4002, 0xfc4003) AM_READ_PORT("SYSTEM") AM_WRITE(lastduel_sound_w)
57	58	AM_RANGE(0xfc4004, 0xfc4005) AM_READ_PORT("DSW1")
58	59	AM_RANGE(0xfc4006, 0xfc4007) AM_READ_PORT("DSW2")
59		AM_RANGE(0xfcc000, 0xfcdfff) AM_READ(SMH_RAM)
60		AM_RANGE(0xfd0000, 0xfd3fff) AM_READ(SMH_RAM)
61		AM_RANGE(0xfd4000, 0xfd7fff) AM_READ(SMH_RAM)
62		AM_RANGE(0xfd8000, 0xfd87ff) AM_READ(SMH_RAM)
63		AM_RANGE(0xfe0000, 0xffffff) AM_READ(SMH_RAM)
64		ADDRESS_MAP_END
65
66		static ADDRESS_MAP_START( lastduel_writemem, ADDRESS_SPACE_PROGRAM, 16 )
67		AM_RANGE(0x000000, 0x05ffff) AM_WRITE(SMH_ROM)
68		AM_RANGE(0xfc0000, 0xfc0003) AM_WRITENOP /* Written rarely */
69		AM_RANGE(0xfc0800, 0xfc0fff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)
70		AM_RANGE(0xfc4000, 0xfc4001) AM_WRITE(lastduel_flip_w)
71		AM_RANGE(0xfc4002, 0xfc4003) AM_WRITE(lastduel_sound_w)
72	60	AM_RANGE(0xfc8000, 0xfc800f) AM_WRITE(lastduel_scroll_w)
73		AM_RANGE(0xfcc000, 0xfcdfff) AM_WRITE(lastduel_vram_w) AM_BASE(&lastduel_vram)
74		AM_RANGE(0xfd0000, 0xfd3fff) AM_WRITE(lastduel_scroll1_w) AM_BASE(&lastduel_scroll1)
75		AM_RANGE(0xfd4000, 0xfd7fff) AM_WRITE(lastduel_scroll2_w) AM_BASE(&lastduel_scroll2)
76		AM_RANGE(0xfd8000, 0xfd87ff) AM_WRITE(lastduel_palette_word_w) AM_BASE(&paletteram16)
77		AM_RANGE(0xfe0000, 0xffffff) AM_WRITE(SMH_RAM)
	61	AM_RANGE(0xfcc000, 0xfcdfff) AM_RAM_WRITE(lastduel_vram_w) AM_BASE(&lastduel_vram)
	62	AM_RANGE(0xfd0000, 0xfd3fff) AM_RAM_WRITE(lastduel_scroll1_w) AM_BASE(&lastduel_scroll1)
	63	AM_RANGE(0xfd4000, 0xfd7fff) AM_RAM_WRITE(lastduel_scroll2_w) AM_BASE(&lastduel_scroll2)
	64	AM_RANGE(0xfd8000, 0xfd87ff) AM_RAM_WRITE(lastduel_palette_word_w) AM_BASE(&paletteram16)
	65	AM_RANGE(0xfe0000, 0xffffff) AM_RAM
78	66	ADDRESS_MAP_END
79	67
80		static ADDRESS_MAP_START( madgear_readmem, ADDRESS_SPACE_PROGRAM, 16 )
81		AM_RANGE(0x000000, 0x07ffff) AM_READ(SMH_ROM)
82		AM_RANGE(0xfc1800, 0xfc1fff) AM_READ(SMH_RAM)
83		AM_RANGE(0xfc4000, 0xfc4001) AM_READ_PORT("DSW1")
84		AM_RANGE(0xfc4002, 0xfc4003) AM_READ_PORT("DSW2")
	68	static ADDRESS_MAP_START( madgear_map, ADDRESS_SPACE_PROGRAM, 16 )
	69	AM_RANGE(0x000000, 0x07ffff) AM_ROM
	70	AM_RANGE(0xfc1800, 0xfc1fff) AM_RAM AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)
	71	AM_RANGE(0xfc4000, 0xfc4001) AM_READ_PORT("DSW1") AM_WRITE(lastduel_flip_w)
	72	AM_RANGE(0xfc4002, 0xfc4003) AM_READ_PORT("DSW2") AM_WRITE(lastduel_sound_w)
85	73	AM_RANGE(0xfc4004, 0xfc4005) AM_READ_PORT("P1_P2")
86	74	AM_RANGE(0xfc4006, 0xfc4007) AM_READ_PORT("SYSTEM")
87		AM_RANGE(0xfc8000, 0xfc9fff) AM_READ(SMH_RAM)
88		AM_RANGE(0xfcc000, 0xfcc7ff) AM_READ(SMH_RAM)
89		AM_RANGE(0xfd4000, 0xfd7fff) AM_READ(SMH_RAM)
90		AM_RANGE(0xfd8000, 0xfdffff) AM_READ(SMH_RAM)
91		AM_RANGE(0xff0000, 0xffffff) AM_READ(SMH_RAM)
92		ADDRESS_MAP_END
93
94		static ADDRESS_MAP_START( madgear_writemem, ADDRESS_SPACE_PROGRAM, 16 )
95		AM_RANGE(0x000000, 0x07ffff) AM_WRITE(SMH_ROM)
96		AM_RANGE(0xfc1800, 0xfc1fff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)
97		AM_RANGE(0xfc4000, 0xfc4001) AM_WRITE(lastduel_flip_w)
98		AM_RANGE(0xfc4002, 0xfc4003) AM_WRITE(lastduel_sound_w)
99		AM_RANGE(0xfc8000, 0xfc9fff) AM_WRITE(lastduel_vram_w) AM_BASE(&lastduel_vram)
100		AM_RANGE(0xfcc000, 0xfcc7ff) AM_WRITE(lastduel_palette_word_w) AM_BASE(&paletteram16)
	75	AM_RANGE(0xfc8000, 0xfc9fff) AM_RAM_WRITE(lastduel_vram_w) AM_BASE(&lastduel_vram)
	76	AM_RANGE(0xfcc000, 0xfcc7ff) AM_RAM_WRITE(lastduel_palette_word_w) AM_BASE(&paletteram16)
101	77	AM_RANGE(0xfd0000, 0xfd000f) AM_WRITE(lastduel_scroll_w)
102		AM_RANGE(0xfd4000, 0xfd7fff) AM_WRITE(madgear_scroll1_w) AM_BASE(&lastduel_scroll1)
103		AM_RANGE(0xfd8000, 0xfdffff) AM_WRITE(madgear_scroll2_w) AM_BASE(&lastduel_scroll2)
104		AM_RANGE(0xff0000, 0xffffff) AM_WRITE(SMH_RAM)
	78	AM_RANGE(0xfd4000, 0xfd7fff) AM_RAM_WRITE(madgear_scroll1_w) AM_BASE(&lastduel_scroll1)
	79	AM_RANGE(0xfd8000, 0xfdffff) AM_RAM_WRITE(madgear_scroll2_w) AM_BASE(&lastduel_scroll2)
	80	AM_RANGE(0xff0000, 0xffffff) AM_RAM
105	81	ADDRESS_MAP_END
106	82
107	83	/******************************************************************************/
108	84
109		static ADDRESS_MAP_START( sound_readmem, ADDRESS_SPACE_PROGRAM, 8 )
110		AM_RANGE(0x0000, 0xdfff) AM_READ(SMH_ROM)
111		AM_RANGE(0xe000, 0xe7ff) AM_READ(SMH_RAM)
112		AM_RANGE(0xe800, 0xe801) AM_DEVREAD("ym1", ym2203_r)
113		AM_RANGE(0xf000, 0xf001) AM_DEVREAD("ym2", ym2203_r)
	85	static ADDRESS_MAP_START( sound_map, ADDRESS_SPACE_PROGRAM, 8 )
	86	AM_RANGE(0x0000, 0xdfff) AM_ROM
	87	AM_RANGE(0xe000, 0xe7ff) AM_RAM
	88	AM_RANGE(0xe800, 0xe801) AM_DEVREADWRITE("ym1", ym2203_r,ym2203_w)
	89	AM_RANGE(0xf000, 0xf001) AM_DEVREADWRITE("ym2", ym2203_r,ym2203_w)
114	90	AM_RANGE(0xf800, 0xf800) AM_READ(soundlatch_r)
115	91	ADDRESS_MAP_END
116	92
117		static ADDRESS_MAP_START( sound_writemem, ADDRESS_SPACE_PROGRAM, 8 )
118		AM_RANGE(0x0000, 0xdfff) AM_WRITE(SMH_ROM)
119		AM_RANGE(0xe000, 0xe7ff) AM_WRITE(SMH_RAM)
120		AM_RANGE(0xe800, 0xe801) AM_DEVWRITE("ym1", ym2203_w)
121		AM_RANGE(0xf000, 0xf001) AM_DEVWRITE("ym2", ym2203_w)
122		ADDRESS_MAP_END
123
124	93	static WRITE8_HANDLER( mg_bankswitch_w )
125	94	{
126	95	int bankaddress;
127	96	UINT8 *RAM = memory_region(space->machine, "audiocpu");
128	97
129	98	bankaddress = 0x10000 + (data & 0x01) * 0x4000;
130		memory_set_bankptr(space->machine, 3,&RAM[bankaddress]);
	99	memory_set_bankptr(space->machine, 1,&RAM[bankaddress]);
131	100	}
132	101
133		static ADDRESS_MAP_START( mg_sound_readmem, ADDRESS_SPACE_PROGRAM, 8 )
134		AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM)
135		AM_RANGE(0x8000, 0xcfff) AM_READ(SMH_BANK3)
136		AM_RANGE(0xd000, 0xd7ff) AM_READ(SMH_RAM)
137		AM_RANGE(0xf000, 0xf001) AM_DEVREAD("ym1", ym2203_r)
138		AM_RANGE(0xf002, 0xf003) AM_DEVREAD("ym2", ym2203_r)
139		AM_RANGE(0xf006, 0xf006) AM_READ(soundlatch_r)
140		ADDRESS_MAP_END
141
142		static ADDRESS_MAP_START( mg_sound_writemem, ADDRESS_SPACE_PROGRAM, 8 )
143		AM_RANGE(0x0000, 0xcfff) AM_WRITE(SMH_ROM)
144		AM_RANGE(0xd000, 0xd7ff) AM_WRITE(SMH_RAM)
145		AM_RANGE(0xf000, 0xf001) AM_DEVWRITE("ym1", ym2203_w)
146		AM_RANGE(0xf002, 0xf003) AM_DEVWRITE("ym2", ym2203_w)
	102	static ADDRESS_MAP_START( madgear_sound_map, ADDRESS_SPACE_PROGRAM, 8 )
	103	AM_RANGE(0x0000, 0x7fff) AM_ROM
	104	AM_RANGE(0x8000, 0xcfff) AM_ROMBANK(1)
	105	AM_RANGE(0xd000, 0xd7ff) AM_RAM
	106	AM_RANGE(0xf000, 0xf001) AM_DEVREADWRITE("ym1", ym2203_r,ym2203_w)
	107	AM_RANGE(0xf002, 0xf003) AM_DEVREADWRITE("ym2", ym2203_r,ym2203_w)
147	108	AM_RANGE(0xf004, 0xf004) AM_DEVWRITE("oki", okim6295_w)
	109	AM_RANGE(0xf006, 0xf006) AM_READ(soundlatch_r)
148	110	AM_RANGE(0xf00a, 0xf00a) AM_WRITE(mg_bankswitch_w)
149	111	ADDRESS_MAP_END
150	112
r4679	r4680
232	194	/* handler called by the 2203 emulator when the internal timers cause an IRQ */
233	195	static void irqhandler(const device_config *device, int irq)
234	196	{
235		cpu_set_input_line(device->machine->cpu[1],0,irq ? ASSERT_LINE : CLEAR_LINE);
	197	cputag_set_input_line(device->machine, "audiocpu", 0, irq ? ASSERT_LINE : CLEAR_LINE);
236	198	}
237	199
238	200	static const ym2203_interface ym2203_config =
r4679	r4680
265	227
266	228	/* basic machine hardware */
267	229	MDRV_CPU_ADD("maincpu", M68000, 10000000) /* Could be 8 MHz */
268		MDRV_CPU_PROGRAM_MAP(lastduel_readmem,lastduel_writemem)
	230	MDRV_CPU_PROGRAM_MAP(lastduel_map,0)
269	231	MDRV_CPU_VBLANK_INT_HACK(lastduel_interrupt,3)   /* 1 for vbl, 2 for control reads?? */
270	232
271	233	MDRV_CPU_ADD("audiocpu", Z80, 3579545) /* Accurate */
272		MDRV_CPU_PROGRAM_MAP(sound_readmem,sound_writemem)
	234	MDRV_CPU_PROGRAM_MAP(sound_map,0)
273	235
274	236	/* video hardware */
275	237	MDRV_VIDEO_ATTRIBUTES(VIDEO_UPDATE_BEFORE_VBLANK | VIDEO_BUFFERS_SPRITERAM)
r4679	r4680
304	266
305	267	/* basic machine hardware */
306	268	MDRV_CPU_ADD("maincpu", M68000, 10000000) /* Accurate */
307		MDRV_CPU_PROGRAM_MAP(madgear_readmem,madgear_writemem)
	269	MDRV_CPU_PROGRAM_MAP(madgear_map,0)
308	270	MDRV_CPU_VBLANK_INT_HACK(madgear_interrupt,3)   /* 1 for vbl, 2 for control reads?? */
309	271
310	272	MDRV_CPU_ADD("audiocpu", Z80, XTAL_3_579545MHz) /* verified on pcb */
311		MDRV_CPU_PROGRAM_MAP(mg_sound_readmem,mg_sound_writemem)
	273	MDRV_CPU_PROGRAM_MAP(madgear_sound_map,0)
312	274
313	275	/* video hardware */
314	276	MDRV_VIDEO_ATTRIBUTES(VIDEO_UPDATE_BEFORE_VBLANK | VIDEO_BUFFERS_SPRITERAM)

src/mame/drivers/alpha68k.c

r4679	r4680
356	356	if (ACCESSING_BITS_0_7)
357	357	{
358	358	soundlatch_w(space, 0, data);
359		cpu_set_input_line(space->machine->cpu[1], 0, HOLD_LINE);
	359	cputag_set_input_line(space->machine, "audiocpu", 0, HOLD_LINE);
360	360	}
361	361	}
362	362
r4679	r4680
365	365	if (ACCESSING_BITS_0_7)
366	366	{
367	367	soundlatch_w(space, 0, data);
368		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_NMI, PULSE_LINE);
	368	cputag_set_input_line(space->machine, "audiocpu", INPUT_LINE_NMI, PULSE_LINE);
369	369	}
370	370	}
371	371	//ZT
r4679	r4680
1888	1888
1889	1889	static void YM3812_irq(const device_config *device, int param)
1890	1890	{
1891		cpu_set_input_line(device->machine->cpu[1], 0, (param) ? HOLD_LINE : CLEAR_LINE);
	1891	cputag_set_input_line(device->machine, "audiocpu", 0, (param) ? HOLD_LINE : CLEAR_LINE);
1892	1892	}
1893	1893
1894	1894	static const ym3812_interface ym3812_config =
r4679	r4680
3133	3133
3134	3134	static DRIVER_INIT( sstingry )
3135	3135	{
3136		invert_controls=0;
3137		microcontroller_id=0x00ff;
3138		coin_id=0x22|(0x22<<8);
	3136	invert_controls = 0;
	3137	microcontroller_id = 0x00ff;
	3138	coin_id = 0x22 | (0x22 << 8);
3139	3139	}
3140	3140
3141	3141	static DRIVER_INIT( kyros )
3142	3142	{
3143		invert_controls=0;
3144		microcontroller_id=0x0012;
3145		coin_id=0x22|(0x22<<8);
	3143	invert_controls = 0;
	3144	microcontroller_id = 0x0012;
	3145	coin_id = 0x22 | (0x22 << 8);
3146	3146
3147	3147	alpha68k_video_banking = kyros_video_banking;
3148	3148	}
3149	3149
3150	3150	static DRIVER_INIT( jongbou )
3151	3151	{
3152		invert_controls=0;
3153		microcontroller_id=0x00ff;
3154		coin_id=0x23|(0x24<<8);
	3152	invert_controls = 0;
	3153	microcontroller_id = 0x00ff;
	3154	coin_id = 0x23 | (0x24 << 8);
3155	3155
3156	3156	alpha68k_video_banking = jongbou_video_banking;
3157	3157
3158		memory_install_read16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x0c0000, 0x0c0001, 0, 0, jongbou_inputs_r);
	3158	memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x0c0000, 0x0c0001, 0, 0, jongbou_inputs_r);
3159	3159	}
3160	3160
3161	3161	static DRIVER_INIT( paddlema )
3162	3162	{
3163		microcontroller_id=0;
3164		coin_id=0;            // Not needed !
	3163	microcontroller_id = 0;
	3164	coin_id = 0;            // Not needed !
3165	3165	}
3166	3166
3167	3167	static DRIVER_INIT( timesold )
3168	3168	{
3169		memory_install_read16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x40008, 0x40009, 0, 0, timesold_cycle_r);
3170		invert_controls=0;
3171		microcontroller_id=0;
3172		coin_id=0x22|(0x22<<8);
	3169	memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x40008, 0x40009, 0, 0, timesold_cycle_r);
	3170	invert_controls = 0;
	3171	microcontroller_id = 0;
	3172	coin_id = 0x22 | (0x22 << 8);
3173	3173	}
3174	3174
3175	3175	static DRIVER_INIT( timesol1 )
3176	3176	{
3177		memory_install_read16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x40008, 0x40009, 0, 0, timesol1_cycle_r);
3178		invert_controls=1;
3179		microcontroller_id=0;
3180		coin_id=0x22|(0x22<<8);
	3177	memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x40008, 0x40009, 0, 0, timesol1_cycle_r);
	3178	invert_controls = 1;
	3179	microcontroller_id = 0;
	3180	coin_id = 0x22 | (0x22 << 8);
3181	3181	}
3182	3182
3183	3183	static DRIVER_INIT( btlfield )
3184	3184	{
3185		memory_install_read16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x40008, 0x40009, 0, 0, btlfield_cycle_r);
3186		invert_controls=1;
3187		microcontroller_id=0;
3188		coin_id=0x22|(0x22<<8);
	3185	memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x40008, 0x40009, 0, 0, btlfield_cycle_r);
	3186	invert_controls = 1;
	3187	microcontroller_id = 0;
	3188	coin_id = 0x22 | (0x22 << 8);
3189	3189	}
3190	3190
3191	3191	static DRIVER_INIT( btlfildb )
3192	3192	{
3193		invert_controls=1;
3194		microcontroller_id=0;
3195		coin_id=0x22|(0x22<<8); //not checked
	3193	invert_controls = 1;
	3194	microcontroller_id = 0;
	3195	coin_id = 0x22 | (0x22 << 8); //not checked
3196	3196	}
3197	3197
3198	3198	static DRIVER_INIT( skysoldr )
3199	3199	{
3200		memory_install_read16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x40008, 0x40009, 0, 0, skysoldr_cycle_r);
3201		memory_set_bankptr(machine, 8, (memory_region(machine, "user1"))+0x40000);
3202		invert_controls=0;
3203		microcontroller_id=0;
3204		coin_id=0x22|(0x22<<8);
	3200	memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x40008, 0x40009, 0, 0, skysoldr_cycle_r);
	3201	memory_set_bankptr(machine, 8, (memory_region(machine, "user1")) + 0x40000);
	3202	invert_controls = 0;
	3203	microcontroller_id = 0;
	3204	coin_id = 0x22 | (0x22 << 8);
3205	3205	}
3206	3206
3207	3207	static DRIVER_INIT( goldmedl )
3208	3208	{
3209		invert_controls=0;
3210		microcontroller_id=0x8803; //AT
3211		coin_id=0x23|(0x24<<8);
	3209	invert_controls = 0;
	3210	microcontroller_id = 0x8803; //AT
	3211	coin_id = 0x23 | (0x24 << 8);
3212	3212	}
3213	3213
3214	3214	static DRIVER_INIT( goldmeda )
3215	3215	{
3216	3216	memory_set_bankptr(machine, 8, memory_region(machine, "maincpu") + 0x20000);
3217		invert_controls=0;
3218		microcontroller_id=0x8803; //Guess - routine to handle coinage is the same as in 'goldmedl'
3219		coin_id=0x23|(0x24<<8);
	3217	invert_controls = 0;
	3218	microcontroller_id = 0x8803; //Guess - routine to handle coinage is the same as in 'goldmedl'
	3219	coin_id = 0x23 | (0x24 << 8);
3220	3220	}
3221	3221
3222	3222	static DRIVER_INIT( skyadvnt )
3223	3223	{
3224		memory_install_read16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x40008, 0x40009, 0, 0, skyadvnt_cycle_r);
3225		invert_controls=0;
3226		microcontroller_id=0x8814;
3227		coin_id=0x22|(0x22<<8);
	3224	memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x40008, 0x40009, 0, 0, skyadvnt_cycle_r);
	3225	invert_controls = 0;
	3226	microcontroller_id = 0x8814;
	3227	coin_id = 0x22 | (0x22 << 8);
3228	3228	}
3229	3229
3230	3230	static DRIVER_INIT( skyadvnu )
3231	3231	{
3232		memory_install_read16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x40008, 0x40009, 0, 0, skyadvnt_cycle_r);
3233		invert_controls=0;
3234		microcontroller_id=0x8814;
3235		coin_id=0x23|(0x24<<8);
	3232	memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x40008, 0x40009, 0, 0, skyadvnt_cycle_r);
	3233	invert_controls = 0;
	3234	microcontroller_id = 0x8814;
	3235	coin_id = 0x23 | (0x24 << 8);
3236	3236	}
3237	3237
3238	3238	static DRIVER_INIT( gangwars )
3239	3239	{
3240		memory_install_read16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x40206, 0x40207, 0, 0, gangwars_cycle_r);
	3240	memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x40206, 0x40207, 0, 0, gangwars_cycle_r);
3241	3241	memory_set_bankptr(machine, 8, memory_region(machine, "user1"));
3242		invert_controls=0;
3243		microcontroller_id=0x8512;
3244		coin_id=0x23|(0x24<<8);
	3242	invert_controls = 0;
	3243	microcontroller_id = 0x8512;
	3244	coin_id = 0x23 | (0x24 << 8);
3245	3245	}
3246	3246
3247	3247	static DRIVER_INIT( gangwarb )
3248	3248	{
3249		memory_install_read16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x40206, 0x40207, 0, 0, gangwarb_cycle_r);
	3249	memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x40206, 0x40207, 0, 0, gangwarb_cycle_r);
3250	3250	memory_set_bankptr(machine, 8, memory_region(machine, "user1"));
3251		invert_controls=0;
3252		microcontroller_id=0x8512;
3253		coin_id=0x23|(0x24<<8);
	3251	invert_controls = 0;
	3252	microcontroller_id = 0x8512;
	3253	coin_id = 0x23 | (0x24 << 8);
3254	3254	}
3255	3255
3256	3256	static DRIVER_INIT( sbasebal )
r4679	r4680
3271	3271	rom[0x2b6/2] = 0x4e71;
3272	3272	#endif
3273	3273
3274		invert_controls=0;
3275		microcontroller_id=0x8512;   // Same as 'gangwars' ?
3276		coin_id=0x23|(0x24<<8);
	3274	invert_controls = 0;
	3275	microcontroller_id = 0x8512;   // Same as 'gangwars' ?
	3276	coin_id = 0x23 | (0x24 << 8);
3277	3277	}
3278	3278
3279	3279	static DRIVER_INIT( tnexspce )
3280	3280	{
3281		invert_controls=0;
3282		microcontroller_id=0x890a;
3283		coin_id=0;            // Not needed !
	3281	invert_controls = 0;
	3282	microcontroller_id = 0x890a;
	3283	coin_id = 0;            // Not needed !
3284	3284	}
3285	3285
3286	3286	/******************************************************************************/

src/mame/drivers/boxer.c

r4679	r4680
27	27	int mask = param;
28	28
29	29	if (pot_latch & mask)
30		cpu_set_input_line(machine->cpu[0], INPUT_LINE_NMI, ASSERT_LINE);
	30	cputag_set_input_line(machine, "maincpu", INPUT_LINE_NMI, ASSERT_LINE);
31	31
32	32	pot_state |= mask;
33	33	}
r4679	r4680
37	37	{
38	38	int scanline = param;
39	39
40		cpu_set_input_line(machine->cpu[0], 0, ASSERT_LINE);
	40	cputag_set_input_line(machine, "maincpu", 0, ASSERT_LINE);
41	41
42	42	if (scanline == 0)
43	43	{
r4679	r4680
149	149
150	150	pot_latch = data & 0x3f;
151	151
152		cpu_set_input_line(space->machine->cpu[0], INPUT_LINE_NMI, CLEAR_LINE);
	152	cputag_set_input_line(space->machine, "maincpu", INPUT_LINE_NMI, CLEAR_LINE);
153	153	}
154	154
155	155
156	156	static WRITE8_HANDLER( boxer_irq_reset_w )
157	157	{
158		cpu_set_input_line(space->machine->cpu[0], 0, CLEAR_LINE);
	158	cputag_set_input_line(space->machine, "maincpu", 0, CLEAR_LINE);
159	159	}
160	160
161	161

src/mame/drivers/tmaster.c

r4679	r4680
147	147
148	148	static void duart_irq_handler(const device_config *device, UINT8 vector)
149	149	{
150		cpu_set_input_line_and_vector(device->machine->cpu[0], 4, HOLD_LINE, vector);
	150	cputag_set_input_line_and_vector(device->machine, "maincpu", 4, HOLD_LINE, vector);
151	151	};
152	152
153	153	static void duart_tx(const device_config *device, int channel, UINT8 data)
r4679	r4680
408	408	{
409	409	case 0x0e:
410	410	tmaster_draw(space->machine);
411		cpu_set_input_line(space->machine->cpu[0], 2, HOLD_LINE);
	411	cputag_set_input_line(space->machine, "maincpu", 2, HOLD_LINE);
412	412	break;
413	413	}
414	414	}
r4679	r4680
602	602
603	603	static ADDRESS_MAP_START( galgames_map, ADDRESS_SPACE_PROGRAM, 16 )
604	604
605		AM_RANGE( 0x000000, 0x03ffff ) AM_READWRITE(SMH_BANK1, SMH_BANK2)
	605	AM_RANGE( 0x000000, 0x03ffff ) AM_READWRITE(SMH_BANK(1), SMH_BANK(2))
606	606	AM_RANGE( 0x040000, 0x1fffff ) AM_ROM AM_REGION( "maincpu", 0 )
607		AM_RANGE( 0x200000, 0x23ffff ) AM_READWRITE(SMH_BANK3, SMH_BANK4)
	607	AM_RANGE( 0x200000, 0x23ffff ) AM_READWRITE(SMH_BANK(3), SMH_BANK(4))
608	608	AM_RANGE( 0x240000, 0x3fffff ) AM_ROM AM_REGION( "maincpu", 0 )
609	609
610	610	AM_RANGE( 0x400000, 0x400011 ) AM_WRITE( tmaster_blitter_w ) AM_BASE( &tmaster_regs )
r4679	r4680
832	832	memory_set_bank(machine, 2, 0);   // ram
833	833	memory_set_bank(machine, 4, 0);   // ram
834	834
835		device_reset(machine->cpu[0]);
	835	device_reset(cputag_get_cpu(machine, "maincpu"));
836	836	}
837	837
838	838	static MACHINE_DRIVER_START( galgames )

src/mame/drivers/roul.c

r4679	r4680
139	139	static WRITE8_HANDLER( sound_latch_w )
140	140	{
141	141	soundlatch_w(space, 0, data & 0xff);
142		cpu_set_input_line(space->machine->cpu[1], 0, HOLD_LINE);
	142	cputag_set_input_line(space->machine, "soundcpu", 0, HOLD_LINE);
143	143	}
144	144
145	145	static WRITE8_HANDLER( ball_w )
r4679	r4680
180	180
181	181	static VIDEO_START(roul)
182	182	{
183		videobuf = auto_malloc(VIDEOBUF_SIZE * sizeof(*videobuf));
184		memset(videobuf, 0, VIDEOBUF_SIZE * sizeof(*videobuf));
	183	videobuf = auto_alloc_array_clear(machine, UINT8, VIDEOBUF_SIZE);
185	184	}
186	185
187	186	static VIDEO_UPDATE(roul)

src/mame/drivers/tcl.c

r4679	r4680
183	183	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
184	184	UINT8 *dest = memory_region(machine, "maincpu");
185	185	int len = memory_region_length(machine, "maincpu");
186		UINT8 *src = malloc_or_die(len);
	186	UINT8 *src = alloc_array_or_die(UINT8, len);
187	187
188	188	int i,idx=0;
189	189	memcpy(src, dest, len);

src/mame/drivers/freekick.c

r4679	r4680
178	178	*
179	179	*************************************/
180	180
181		static ADDRESS_MAP_START( pbillrd_readmem, ADDRESS_SPACE_PROGRAM, 8 )
182		AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM)
183		AM_RANGE(0x8000, 0xbfff) AM_READ(SMH_BANK1)
184		AM_RANGE(0xc000, 0xdfff) AM_READ(SMH_RAM)
	181	static ADDRESS_MAP_START( pbillrd_map, ADDRESS_SPACE_PROGRAM, 8 )
	182	AM_RANGE(0x0000, 0x7fff) AM_ROM
	183	AM_RANGE(0x8000, 0xbfff) AM_ROMBANK(1)
	184	AM_RANGE(0xc000, 0xcfff) AM_RAM
	185	AM_RANGE(0xd000, 0xd7ff) AM_RAM_WRITE(freek_videoram_w) AM_BASE(&freek_videoram)
	186	AM_RANGE(0xd800, 0xd8ff) AM_RAM AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
	187	AM_RANGE(0xd900, 0xdfff) AM_RAM
185	188	AM_RANGE(0xe000, 0xe000) AM_READ_PORT("IN0")
186		AM_RANGE(0xe800, 0xe800) AM_READ_PORT("IN1")
187		AM_RANGE(0xf000, 0xf000) AM_READ_PORT("DSW1")
188		AM_RANGE(0xf800, 0xf800) AM_READ_PORT("DSW2")
189		ADDRESS_MAP_END
190
191		static ADDRESS_MAP_START( pbillrd_writemem, ADDRESS_SPACE_PROGRAM, 8 )
192		AM_RANGE(0x0000, 0xbfff) AM_WRITE(SMH_ROM)
193		AM_RANGE(0xc000, 0xcfff) AM_WRITE(SMH_RAM)
194		AM_RANGE(0xd000, 0xd7ff) AM_WRITE(freek_videoram_w) AM_BASE(&freek_videoram)
195		AM_RANGE(0xd800, 0xd8ff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
196		AM_RANGE(0xd900, 0xdfff) AM_WRITE(SMH_RAM)
197	189	AM_RANGE(0xe000, 0xe001) AM_WRITE(flipscreen_w)
198	190	AM_RANGE(0xe002, 0xe003) AM_WRITE(coin_w)
199	191	AM_RANGE(0xe004, 0xe004) AM_WRITE(nmi_enable_w)
200		AM_RANGE(0xf000, 0xf000) AM_WRITE(pbillrd_bankswitch_w)
	192	AM_RANGE(0xe800, 0xe800) AM_READ_PORT("IN1")
	193	AM_RANGE(0xf000, 0xf000) AM_READ_PORT("DSW1") AM_WRITE(pbillrd_bankswitch_w)
	194	AM_RANGE(0xf800, 0xf800) AM_READ_PORT("DSW2")
201	195	AM_RANGE(0xfc00, 0xfc00) AM_DEVWRITE("sn1", sn76496_w)
202	196	AM_RANGE(0xfc01, 0xfc01) AM_DEVWRITE("sn2", sn76496_w)
203	197	AM_RANGE(0xfc02, 0xfc02) AM_DEVWRITE("sn3", sn76496_w)
204	198	AM_RANGE(0xfc03, 0xfc03) AM_DEVWRITE("sn4", sn76496_w)
205	199	ADDRESS_MAP_END
206	200
207		static ADDRESS_MAP_START( freekckb_readmem, ADDRESS_SPACE_PROGRAM, 8 )
208		AM_RANGE(0x0000, 0xcfff) AM_READ(SMH_ROM)
209		AM_RANGE(0xd000, 0xdfff) AM_READ(SMH_RAM)
210		AM_RANGE(0xe000, 0xe7ff) AM_READ(SMH_RAM)   // tilemap
211		AM_RANGE(0xe800, 0xe8ff) AM_READ(SMH_RAM)   // sprites
212		AM_RANGE(0xec00, 0xec03) AM_DEVREAD("ppi8255_0", ppi8255_r)
213		AM_RANGE(0xf000, 0xf003) AM_DEVREAD("ppi8255_1", ppi8255_r)
214		AM_RANGE(0xf800, 0xf800) AM_READ_PORT("IN0")
	201	static ADDRESS_MAP_START( freekckb_map, ADDRESS_SPACE_PROGRAM, 8 )
	202	AM_RANGE(0x0000, 0xcfff) AM_ROM
	203	AM_RANGE(0xd000, 0xdfff) AM_RAM
	204	AM_RANGE(0xe000, 0xe7ff) AM_RAM_WRITE(freek_videoram_w) AM_BASE(&freek_videoram)   // tilemap
	205	AM_RANGE(0xe800, 0xe8ff) AM_RAM AM_BASE(&spriteram) AM_SIZE(&spriteram_size)      // sprites
	206	AM_RANGE(0xec00, 0xec03) AM_DEVREADWRITE("ppi8255_0", ppi8255_r, ppi8255_w)
	207	AM_RANGE(0xf000, 0xf003) AM_DEVREADWRITE("ppi8255_1", ppi8255_r, ppi8255_w)
	208	AM_RANGE(0xf800, 0xf800) AM_READ_PORT("IN0") AM_WRITE(flipscreen_w)
215	209	AM_RANGE(0xf801, 0xf801) AM_READ_PORT("IN1")
216	210	AM_RANGE(0xf802, 0xf802) AM_READNOP   //MUST return bit 0 = 0, otherwise game resets
217	211	AM_RANGE(0xf803, 0xf803) AM_READ(spinner_r)
218		ADDRESS_MAP_END
219
220		static ADDRESS_MAP_START( freekckb_writemem, ADDRESS_SPACE_PROGRAM, 8 )
221		AM_RANGE(0x0000, 0xcfff) AM_WRITE(SMH_ROM)
222		AM_RANGE(0xd000, 0xdfff) AM_WRITE(SMH_RAM)
223		AM_RANGE(0xe000, 0xe7ff) AM_WRITE(freek_videoram_w) AM_BASE(&freek_videoram)
224		AM_RANGE(0xe800, 0xe8ff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
225		AM_RANGE(0xec00, 0xec03) AM_DEVWRITE("ppi8255_0", ppi8255_w)
226		AM_RANGE(0xf000, 0xf003) AM_DEVWRITE("ppi8255_1", ppi8255_w)
227		AM_RANGE(0xf800, 0xf801) AM_WRITE(flipscreen_w)
228	212	AM_RANGE(0xf802, 0xf803) AM_WRITE(coin_w)
229	213	AM_RANGE(0xf804, 0xf804) AM_WRITE(nmi_enable_w)
230	214	AM_RANGE(0xf806, 0xf806) AM_WRITE(spinner_select_w)
r4679	r4680
234	218	AM_RANGE(0xfc03, 0xfc03) AM_DEVWRITE("sn4", sn76496_w)
235	219	ADDRESS_MAP_END
236	220
237		static ADDRESS_MAP_START( gigas_readmem, ADDRESS_SPACE_PROGRAM, 8 )
238		AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM)
239		AM_RANGE(0x8000, 0xbfff) AM_READ(SMH_ROM)
240		AM_RANGE(0xc000, 0xdfff) AM_READ(SMH_RAM)
241		AM_RANGE(0xe000, 0xe000) AM_READ_PORT("IN0")
242		AM_RANGE(0xe800, 0xe800) AM_READ_PORT("IN1")
243		AM_RANGE(0xf000, 0xf000) AM_READ_PORT("DSW1")
244		AM_RANGE(0xf800, 0xf800) AM_READ_PORT("DSW2")
245		ADDRESS_MAP_END
246
247		static ADDRESS_MAP_START( gigas_writemem, ADDRESS_SPACE_PROGRAM, 8 )
248		AM_RANGE(0x0000, 0xbfff) AM_WRITE(SMH_ROM)
249		AM_RANGE(0xc000, 0xcfff) AM_WRITE(SMH_RAM)
250		AM_RANGE(0xd000, 0xd7ff) AM_WRITE(freek_videoram_w) AM_BASE(&freek_videoram)
251		AM_RANGE(0xd800, 0xd8ff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
252		AM_RANGE(0xd900, 0xdfff) AM_WRITE(SMH_RAM)
253		AM_RANGE(0xe000, 0xe001) AM_WRITENOP// probably not flipscreen
	221	static ADDRESS_MAP_START( gigas_map, ADDRESS_SPACE_PROGRAM, 8 )
	222	AM_RANGE(0x0000, 0x7fff) AM_ROM
	223	AM_RANGE(0x8000, 0xbfff) AM_ROM
	224	AM_RANGE(0xc000, 0xcfff) AM_RAM
	225	AM_RANGE(0xd000, 0xd7ff) AM_RAM_WRITE(freek_videoram_w) AM_BASE(&freek_videoram)
	226	AM_RANGE(0xd800, 0xd8ff) AM_RAM AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
	227	AM_RANGE(0xd900, 0xdfff) AM_RAM
	228	AM_RANGE(0xe000, 0xe000) AM_READ_PORT("IN0") AM_WRITENOP // probably not flipscreen
254	229	AM_RANGE(0xe002, 0xe003) AM_WRITE(coin_w)
255	230	AM_RANGE(0xe004, 0xe004) AM_WRITE(nmi_enable_w)
256	231	AM_RANGE(0xe005, 0xe005) AM_WRITENOP
257		AM_RANGE(0xf000, 0xf000) AM_WRITENOP //bankswitch ?
	232	AM_RANGE(0xe800, 0xe800) AM_READ_PORT("IN1")
	233	AM_RANGE(0xf000, 0xf000) AM_READ_PORT("DSW1") AM_WRITENOP //bankswitch ?
	234	AM_RANGE(0xf800, 0xf800) AM_READ_PORT("DSW2")
258	235	AM_RANGE(0xfc00, 0xfc00) AM_DEVWRITE("sn1", sn76496_w)
259	236	AM_RANGE(0xfc01, 0xfc01) AM_DEVWRITE("sn2", sn76496_w)
260	237	AM_RANGE(0xfc02, 0xfc02) AM_DEVWRITE("sn3", sn76496_w)
r4679	r4680
290	267
291	268	static INPUT_PORTS_START( pbillrd )
292	269
	270
293	271	PORT_START("IN0")
294	272	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON1 )
295	273	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON2 )
r4679	r4680
636	614
637	615	static MACHINE_DRIVER_START( base )
638	616	MDRV_CPU_ADD("maincpu",Z80, 18432000/6)   //confirmed
639		MDRV_CPU_PROGRAM_MAP(pbillrd_readmem,pbillrd_writemem)
	617	MDRV_CPU_PROGRAM_MAP(pbillrd_map,0)
640	618	MDRV_CPU_PERIODIC_INT(irq0_line_hold, 50*3) //??
641	619	MDRV_CPU_VBLANK_INT("screen", freekick_irqgen)
642	620
r4679	r4680
682	660	MDRV_IMPORT_FROM(base)
683	661
684	662	MDRV_CPU_MODIFY("maincpu")
685		MDRV_CPU_PROGRAM_MAP(freekckb_readmem,freekckb_writemem)
	663	MDRV_CPU_PROGRAM_MAP(freekckb_map,0)
686	664	MDRV_CPU_IO_MAP(freekckb_io_map,0)
687	665
688	666	MDRV_PPI8255_ADD( "ppi8255_0", ppi8255_intf[0] )
r4679	r4680
695	673	MDRV_IMPORT_FROM(base)
696	674
697	675	MDRV_CPU_MODIFY("maincpu")
698		MDRV_CPU_PROGRAM_MAP(gigas_readmem,gigas_writemem)
	676	MDRV_CPU_PROGRAM_MAP(gigas_map,0)
699	677	MDRV_CPU_IO_MAP(gigas_io_map,0)
700	678
701	679	MDRV_VIDEO_UPDATE(gigas)
r4679	r4680
978	956	ROM_END
979	957
980	958
	959
	960	ROM_START( gigas ) /* From an actual Sega board 834-6167 with mc-8123: 317-5002 */
	961	/* The MC-8123 is located on a small daughterboard which plugs into the z80 socket;
	962	* the daughterboard also has an input for the spinner control the game uses,
	963	* Also note that roms 7 and 8 are encrypted, and the load order may be swapped or
	964	* otherwise wrong; It is also possible that the 7 and 8 labels were switched on
	965	* the files submitted. 7 is at location 8p, 8 at location 8n according to pcb pics.
	966	* An empty socket marked 27256 is at location 10n */
	967	ROM_REGION( 2*0x10000, "maincpu", 0 )
	968	ROM_LOAD( "7.8p",   0x10000, 0x4000, CRC(43653909) SHA1(30f6666ba5c0f016299f462c4c07c81ee4832808) ) /* 27256 */
	969	ROM_CONTINUE(        0x00000, 0x4000)
	970	ROM_LOAD( "8.8n",   0x04000, 0x4000, NO_DUMP CRC(ab54d286) SHA1(897256b6709e1a4da9daba92b6bde39ccfccd8c1) ) /* 27128, dumped as all 0x00s, bad eprom */
	971
	972	ROM_REGION( 0x2000, "user1", 0 ) /* MC8123 key */
	973	ROM_LOAD( "317-5002.key", 0x0000, 0x2000, NO_DUMP )
	974
	975	ROM_REGION( 0xc000, "gfx1", ROMREGION_DISPOSE ) /* GFX */
	976	ROM_LOAD( "4.3k", 0x00000, 0x04000, CRC(8ed78981) SHA1(1f2c0584fcc6d04b042638c7b9a7e21fc560ca3d) )
	977	ROM_LOAD( "5.3h", 0x04000, 0x04000, CRC(0645ec2d) SHA1(ecf8b1ce98f845b5b32e7fc959cea7679a149d74) )
	978	ROM_LOAD( "6.3g", 0x08000, 0x04000, CRC(99e9cb27) SHA1(d141d6caa077e3cd182eb64cf803613ac17e7d09) )
	979
	980	ROM_REGION( 0xc000, "gfx2", ROMREGION_DISPOSE ) /* GFX */
	981	ROM_LOAD( "1.3p", 0x00000, 0x04000, CRC(d78fae6e) SHA1(a7bf3b213f2a3a51b964959bd45003351670575a) )
	982	ROM_LOAD( "3.3l", 0x04000, 0x04000, CRC(37df4a4c) SHA1(ab996db636d89845474529ba2573307046fb96ee) )
	983	ROM_LOAD( "2.3n", 0x08000, 0x04000, CRC(3a46e354) SHA1(ebd6a5db4c9cdfc6fabe6b412a704aaf03c32d7c) )
	984
	985	ROM_REGION( 0x0600, "proms", 0 ) /* not dumped yet; assumed to be the same */
	986	/* fill in which locations for each prom when redumping; the chips have
	987	* no labels, but are clearly located at 3a 3b 3c 3d 4a and 4d */
	988	ROM_LOAD( "1.pr", 0x0000, 0x0100, CRC(a784e71f) SHA1(1741ce98d719bad6cc5ea42337ef897f2435bbab) )
	989	ROM_LOAD( "6.pr", 0x0100, 0x0100, CRC(376df30c) SHA1(cc95920cd1c133da1becc7d92f4b187b56a90ec7) )
	990	ROM_LOAD( "5.pr", 0x0200, 0x0100, CRC(4edff5bd) SHA1(305efc7ad7f86635489a655e214e216ac02b904d) )
	991	ROM_LOAD( "4.pr", 0x0300, 0x0100, CRC(fe201a4e) SHA1(15f8ecfcf6c63ffbf9777bec9b203c319ba1b96c) )
	992	ROM_LOAD( "2.pr", 0x0400, 0x0100, CRC(5796cc4a) SHA1(39576c4e48fd7ac52fc652a1ae0573db3d878878) )
	993	ROM_LOAD( "3.pr", 0x0500, 0x0100, CRC(28b5ee4c) SHA1(e21b9c38f433dca1e8894619b1d9f0389a81b48a) )
	994	ROM_END
	995
981	996	/*
982	997	Gigas (bootleg)
983	998
r4679	r4680
1053	1068	*
1054	1069	*************************************/
1055	1070
1056		static DRIVER_INIT(gigas)
	1071	static DRIVER_INIT(gigasb)
1057	1072	{
1058	1073	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
1059	1074	memory_set_decrypted_region(space, 0x0000, 0x7fff, memory_region(machine, "maincpu") + 0x10000);
r4679	r4680
1065	1080	mc8123_decrypt_rom(machine, "maincpu", "user1", 1, 2);
1066	1081	}
1067	1082
	1083	static DRIVER_INIT( gigas )
	1084	{
	1085	/* uncomment this next line and remove the two lines below it once the key is dumped */
	1086	//mc8123_decrypt_rom(machine, "maincpu", "user1", 1, 2);
	1087	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	1088	memory_set_decrypted_region(space, 0x0000, 0x7fff, memory_region(machine, "maincpu") + 0x10000);
	1089	}
1068	1090
1069	1091
	1092
	1093
1070	1094	/*************************************
1071	1095	*
1072	1096	*  Game driver(s)
1073	1097	*
1074	1098	*************************************/
1075
1076		GAME( 1986, gigasb,   0,        gigas,    gigas,    gigas,    ROT270, "bootleg", "Gigas (bootleg)", GAME_NO_COCKTAIL )
1077		GAME( 1986, oigas,    gigasb,   oigas,    gigas,    gigas,    ROT270, "bootleg", "Oigas (bootleg)", GAME_NO_COCKTAIL )
1078		GAME( 1986, gigasm2b, 0,        gigas,    gigasm2,  gigas,    ROT270, "bootleg", "Gigas Mark II (bootleg)", GAME_NO_COCKTAIL )
	1099	/*    YEAR  NAME      PARENT    MACHINE   INPUT     INIT      ROT     COMPANY   FULLNAME        FLAGS  */
	1100	GAME( 1986, gigas,    0,        gigas,    gigas,    gigas,    ROT270, "Sega", "Gigas", GAME_NOT_WORKING )
	1101	GAME( 1986, gigasb,   gigas,    gigas,    gigas,    gigasb,   ROT270, "bootleg", "Gigas (bootleg)", GAME_NO_COCKTAIL )
	1102	GAME( 1986, oigas,    gigas ,   oigas,    gigas,    gigasb,   ROT270, "bootleg", "Oigas (bootleg)", GAME_NO_COCKTAIL )
	1103	GAME( 1986, gigasm2b, 0,        gigas,    gigasm2,  gigasb,   ROT270, "bootleg", "Gigas Mark II (bootleg)", GAME_NO_COCKTAIL )
1079	1104	GAME( 1987, pbillrd,  0,        pbillrd,  pbillrd,  0,        ROT0,   "Nihon System", "Perfect Billiard", 0 )
1080	1105	GAME( 1987, pbillrds, pbillrd,  pbillrd,  pbillrd,  pbillrds, ROT0,   "Nihon System", "Perfect Billiard (MC-8123, 317-0030)", 0 )
1081	1106	GAME( 1987, freekick, 0,        freekckb, freekck,  0,        ROT270, "Nihon System (Sega license)", "Free Kick", GAME_NOT_WORKING )

src/mame/drivers/cischeat.c

r4679	r4680
254	254	if ( (offset >= 0x3600/2) && (offset <= 0x37ff/2) ) { palette_set_color(space->machine, 0xe00 + offset - 0x3600/2, MAKE_RGB(r,g,b) ); return;}
255	255	}
256	256
257		static ADDRESS_MAP_START( bigrun_readmem, ADDRESS_SPACE_PROGRAM, 16 )
258		AM_RANGE(0x000000, 0x07ffff) AM_READ(SMH_ROM         )   // ROM
259		AM_RANGE(0x100000, 0x13ffff) AM_READ(rom_1_r            )   // ROM
260		AM_RANGE(0x0f0000, 0x0fffff) AM_READ(SMH_RAM         )   // RAM
261		AM_RANGE(0x080000, 0x083fff) AM_READ(bigrun_vregs_r      )   // Vregs
262		AM_RANGE(0x084000, 0x087fff) AM_READ(SMH_RAM         )   // Linking with other units
	257	static ADDRESS_MAP_START( bigrun_map, ADDRESS_SPACE_PROGRAM, 16 )
	258	AM_RANGE(0x000000, 0x07ffff) AM_ROM                                                   // ROM
	259	AM_RANGE(0x080000, 0x083fff) AM_READWRITE(bigrun_vregs_r, bigrun_vregs_w) AM_BASE(&megasys1_vregs)   // Vregs
	260	AM_RANGE(0x084000, 0x087fff) AM_WRITE(SMH_RAM)                                          // Linking with other units
	261	AM_RANGE(0x088000, 0x08bfff) AM_READWRITE(sharedram2_r, sharedram2_w) AM_BASE(&sharedram2)         // Sharedram with sub CPU#2
	262	AM_RANGE(0x08c000, 0x08ffff) AM_READWRITE(sharedram1_r, sharedram1_w) AM_BASE(&sharedram1)         // Sharedram with sub CPU#1
263	263
264		/* this is the right order of sharedram's */
265		AM_RANGE(0x088000, 0x08bfff) AM_READ(sharedram2_r      )   // Sharedram with sub CPU#2
266		AM_RANGE(0x08c000, 0x08ffff) AM_READ(sharedram1_r      )   // Sharedram with sub CPU#1
267
268		AM_RANGE(0x090000, 0x093fff) AM_READ(SMH_RAM         )   // Scroll ram 0
269		AM_RANGE(0x094000, 0x097fff) AM_READ(SMH_RAM         )   // Scroll ram 1
270		AM_RANGE(0x098000, 0x09bfff) AM_READ(SMH_RAM         )   // Scroll ram 2
271
272		AM_RANGE(0x09c000, 0x09ffff) AM_READ(SMH_RAM         )   // Palettes
273		ADDRESS_MAP_END
274
275		static ADDRESS_MAP_START( bigrun_writemem, ADDRESS_SPACE_PROGRAM, 16 )
276		AM_RANGE(0x000000, 0x07ffff) AM_WRITE(SMH_ROM                     )   // ROM
277		AM_RANGE(0x100000, 0x13ffff) AM_WRITE(SMH_ROM                     )   // ROM
278		AM_RANGE(0x0f0000, 0x0fffff) AM_WRITE(SMH_RAM) AM_BASE(&megasys1_ram         )   // RAM
279		AM_RANGE(0x080000, 0x083fff) AM_WRITE(bigrun_vregs_w) AM_BASE(&megasys1_vregs   )   // Vregs
280		AM_RANGE(0x084000, 0x087fff) AM_WRITE(SMH_RAM                     )   // Linking with other units
281
282		AM_RANGE(0x088000, 0x08bfff) AM_WRITE(sharedram2_w) AM_BASE(&sharedram2         )   // Sharedram with sub CPU#2
283		AM_RANGE(0x08c000, 0x08ffff) AM_WRITE(sharedram1_w) AM_BASE(&sharedram1         )   // Sharedram with sub CPU#1
284
285	264	/* Only writes to the first 0x40000 bytes affect the tilemaps:             */
286	265	/* either these games support larger tilemaps or have more ram than needed */
287		AM_RANGE(0x090000, 0x093fff) AM_WRITE(megasys1_scrollram_0_w) AM_BASE(&megasys1_scrollram[0]   )   // Scroll ram 0
288		AM_RANGE(0x094000, 0x097fff) AM_WRITE(megasys1_scrollram_1_w) AM_BASE(&megasys1_scrollram[1]   )   // Scroll ram 1
289		AM_RANGE(0x098000, 0x09bfff) AM_WRITE(megasys1_scrollram_2_w) AM_BASE(&megasys1_scrollram[2]   )   // Scroll ram 2
	266	AM_RANGE(0x090000, 0x093fff) AM_WRITE(megasys1_scrollram_0_w) AM_BASE(&megasys1_scrollram[0])      // Scroll ram 0
	267	AM_RANGE(0x094000, 0x097fff) AM_WRITE(megasys1_scrollram_1_w) AM_BASE(&megasys1_scrollram[1])      // Scroll ram 1
	268	AM_RANGE(0x098000, 0x09bfff) AM_WRITE(megasys1_scrollram_2_w) AM_BASE(&megasys1_scrollram[2])      // Scroll ram 2
290	269
291		AM_RANGE(0x09c000, 0x09ffff) AM_WRITE(bigrun_paletteram16_w) AM_BASE(&paletteram16   )   // Palettes
	270	AM_RANGE(0x09c000, 0x09ffff) AM_WRITE(bigrun_paletteram16_w) AM_BASE(&paletteram16   )            // Palettes
	271	AM_RANGE(0x0f0000, 0x0fffff) AM_RAM AM_BASE(&megasys1_ram)                                 // RAM
	272	AM_RANGE(0x100000, 0x13ffff) AM_READWRITE(rom_1_r, SMH_ROM)                                 // ROM
292	273	ADDRESS_MAP_END
293	274
294	275
r4679	r4680
326	307	if ( (offset >= 0x5000/2) && (offset <= 0x5fff/2) ) { palette_set_color(space->machine, 0xe00 + offset - 0x5000/2, MAKE_RGB(r,g,b) ); return;}
327	308	}
328	309
329		static ADDRESS_MAP_START( cischeat_readmem, ADDRESS_SPACE_PROGRAM, 16 )
330		AM_RANGE(0x000000, 0x07ffff) AM_READ(SMH_ROM         )   // ROM
331		AM_RANGE(0x100000, 0x17ffff) AM_READ(rom_1_r         )   // ROM
332		AM_RANGE(0x0f0000, 0x0fffff) AM_READ(SMH_RAM         )   // RAM
333		AM_RANGE(0x080000, 0x087fff) AM_READ(cischeat_vregs_r   )   // Vregs
334		AM_RANGE(0x088000, 0x088fff) AM_READ(SMH_RAM         )   // Linking with other units
	310	static ADDRESS_MAP_START( cischeat_map, ADDRESS_SPACE_PROGRAM, 16 )
	311	AM_RANGE(0x000000, 0x07ffff) AM_ROM                                                    // ROM
	312	AM_RANGE(0x080000, 0x087fff) AM_READWRITE(cischeat_vregs_r, cischeat_vregs_w)  AM_BASE(&megasys1_vregs)   // Vregs
	313	AM_RANGE(0x088000, 0x088fff) AM_RAM                                                    // Linking with other units
335	314
336	315	/*  Only the first 0x800 bytes are tested but:
337	316	CPU #0 PC 0000278c: warning - write 68c0 to unmapped memory address 0009c7fe
r4679	r4680
339	318	No mem access error from the other CPU's, though.. */
340	319
341	320	/* this is the right order of sharedram's */
342		AM_RANGE(0x090000, 0x097fff) AM_READ(sharedram2_r      )   // Sharedram with sub CPU#2
343		AM_RANGE(0x098000, 0x09ffff) AM_READ(sharedram1_r      )   // Sharedram with sub CPU#1
	321	AM_RANGE(0x090000, 0x097fff) AM_READWRITE(sharedram2_r, sharedram2_w) AM_BASE(&sharedram2)             // Sharedram with sub CPU#2
	322	AM_RANGE(0x098000, 0x09ffff) AM_READWRITE(sharedram1_r, sharedram1_w) AM_BASE(&sharedram1)             // Sharedram with sub CPU#1
344	323
345		AM_RANGE(0x0a0000, 0x0a7fff) AM_READ(SMH_RAM         )   // Scroll ram 0
346		AM_RANGE(0x0a8000, 0x0affff) AM_READ(SMH_RAM         )   // Scroll ram 1
347		AM_RANGE(0x0b0000, 0x0b7fff) AM_READ(SMH_RAM         )   // Scroll ram 2
348
349		AM_RANGE(0x0b8000, 0x0bffff) AM_READ(SMH_RAM         )   // Palettes
350		ADDRESS_MAP_END
351
352		static ADDRESS_MAP_START( cischeat_writemem, ADDRESS_SPACE_PROGRAM, 16 )
353		AM_RANGE(0x000000, 0x07ffff) AM_WRITE(SMH_ROM                     )   // ROM
354		AM_RANGE(0x100000, 0x17ffff) AM_WRITE(SMH_ROM                     )   // ROM
355		AM_RANGE(0x0f0000, 0x0fffff) AM_WRITE(SMH_RAM) AM_BASE(&megasys1_ram         )   // RAM
356		AM_RANGE(0x080000, 0x087fff) AM_WRITE(cischeat_vregs_w) AM_BASE(&megasys1_vregs   )   // Vregs
357		AM_RANGE(0x088000, 0x088fff) AM_WRITE(SMH_RAM                     )   // Linking with other units
358
359		AM_RANGE(0x090000, 0x097fff) AM_WRITE(sharedram2_w) AM_BASE(&sharedram2         )   // Sharedram with sub CPU#2
360		AM_RANGE(0x098000, 0x09ffff) AM_WRITE(sharedram1_w) AM_BASE(&sharedram1         )   // Sharedram with sub CPU#1
361
362	324	/* Only writes to the first 0x40000 bytes affect the tilemaps:             */
363	325	/* either these games support larger tilemaps or have more ram than needed */
364		AM_RANGE(0x0a0000, 0x0a7fff) AM_WRITE(megasys1_scrollram_0_w) AM_BASE(&megasys1_scrollram[0]   )   // Scroll ram 0
365		AM_RANGE(0x0a8000, 0x0affff) AM_WRITE(megasys1_scrollram_1_w) AM_BASE(&megasys1_scrollram[1]   )   // Scroll ram 1
366		AM_RANGE(0x0b0000, 0x0b7fff) AM_WRITE(megasys1_scrollram_2_w) AM_BASE(&megasys1_scrollram[2]   )   // Scroll ram 2
	326	AM_RANGE(0x0a0000, 0x0a7fff) AM_RAM_WRITE(megasys1_scrollram_0_w) AM_BASE(&megasys1_scrollram[0])       // Scroll ram 0
	327	AM_RANGE(0x0a8000, 0x0affff) AM_RAM_WRITE(megasys1_scrollram_1_w) AM_BASE(&megasys1_scrollram[1])       // Scroll ram 1
	328	AM_RANGE(0x0b0000, 0x0b7fff) AM_RAM_WRITE(megasys1_scrollram_2_w) AM_BASE(&megasys1_scrollram[2])       // Scroll ram 2
367	329
368		AM_RANGE(0x0b8000, 0x0bffff) AM_WRITE(cischeat_paletteram16_w) AM_BASE(&paletteram16   )   // Palettes
	330	AM_RANGE(0x0b8000, 0x0bffff) AM_RAM_WRITE(cischeat_paletteram16_w) AM_BASE(&paletteram16)             // Palettes
	331
	332	AM_RANGE(0x0f0000, 0x0fffff) AM_RAM AM_BASE(&megasys1_ram)                                    // RAM
	333	AM_RANGE(0x100000, 0x17ffff) AM_READWRITE(rom_1_r, SMH_ROM)                                    // ROM
369	334	ADDRESS_MAP_END
370	335
371	336
r4679	r4680
402	367	098800-099000
403	368	0F8000-0F9000   */
404	369
405		static ADDRESS_MAP_START( f1gpstar_readmem, ADDRESS_SPACE_PROGRAM, 16 )
406		AM_RANGE(0x000000, 0x07ffff) AM_READ(SMH_ROM         )   // ROM
407		AM_RANGE(0x100000, 0x17ffff) AM_READ(rom_1_r         )   // ROM
408		AM_RANGE(0x0f0000, 0x0fffff) AM_READ(SMH_RAM         )   // RAM
409		AM_RANGE(0x080000, 0x087fff) AM_READ(f1gpstar_vregs_r   )   // Vregs
410		AM_RANGE(0x088000, 0x088fff) AM_READ(SMH_RAM         )   // Linking with other units
	370	static ADDRESS_MAP_START( f1gpstar_map, ADDRESS_SPACE_PROGRAM, 16 )
	371	AM_RANGE(0x000000, 0x07ffff) AM_ROM                                                    // ROM
	372	AM_RANGE(0x080000, 0x087fff) AM_READWRITE(f1gpstar_vregs_r, f1gpstar_vregs_w) AM_BASE(&megasys1_vregs)   // Vregs
	373	AM_RANGE(0x088000, 0x088fff) AM_RAM                                                      // Linking with other units
411	374
412		AM_RANGE(0x090000, 0x097fff) AM_READ(sharedram2_r      )   // Sharedram with sub CPU#2
413		AM_RANGE(0x098000, 0x09ffff) AM_READ(sharedram1_r      )   // Sharedram with sub CPU#1
	375	AM_RANGE(0x090000, 0x097fff) AM_READWRITE(sharedram2_r, sharedram2_w) AM_BASE(&sharedram2)            // Sharedram with sub CPU#2
	376	AM_RANGE(0x098000, 0x09ffff) AM_READWRITE(sharedram1_r, sharedram1_w) AM_BASE(&sharedram1)            // Sharedram with sub CPU#1
414	377
415		AM_RANGE(0x0a0000, 0x0a7fff) AM_READ(SMH_RAM         )   // Scroll ram 0
416		AM_RANGE(0x0a8000, 0x0affff) AM_READ(SMH_RAM         )   // Scroll ram 1
417		AM_RANGE(0x0b0000, 0x0b7fff) AM_READ(SMH_RAM         )   // Scroll ram 2
418
419		AM_RANGE(0x0b8000, 0x0bffff) AM_READ(SMH_RAM         )   // Palettes
420		ADDRESS_MAP_END
421
422		static ADDRESS_MAP_START( f1gpstar_writemem, ADDRESS_SPACE_PROGRAM, 16 )
423		AM_RANGE(0x000000, 0x07ffff) AM_WRITE(SMH_ROM                     )
424		AM_RANGE(0x100000, 0x17ffff) AM_WRITE(SMH_ROM                     )
425		AM_RANGE(0x0f0000, 0x0fffff) AM_WRITE(SMH_RAM) AM_BASE(&megasys1_ram         )   // RAM
426		AM_RANGE(0x080000, 0x087fff) AM_WRITE(f1gpstar_vregs_w) AM_BASE(&megasys1_vregs   )   // Vregs
427		AM_RANGE(0x088000, 0x088fff) AM_WRITE(SMH_RAM                     )   // Linking with other units
428
429		AM_RANGE(0x090000, 0x097fff) AM_WRITE(sharedram2_w) AM_BASE(&sharedram2         )   // Sharedram with sub CPU#2
430		AM_RANGE(0x098000, 0x09ffff) AM_WRITE(sharedram1_w) AM_BASE(&sharedram1         )   // Sharedram with sub CPU#1
431
432	378	/* Only writes to the first 0x40000 bytes affect the tilemaps:             */
433	379	/* either these games support larger tilemaps or have more ram than needed */
434		AM_RANGE(0x0a0000, 0x0a7fff) AM_WRITE(megasys1_scrollram_0_w) AM_BASE(&megasys1_scrollram[0]   )   // Scroll ram 0
435		AM_RANGE(0x0a8000, 0x0affff) AM_WRITE(megasys1_scrollram_1_w) AM_BASE(&megasys1_scrollram[1]   )   // Scroll ram 1
436		AM_RANGE(0x0b0000, 0x0b7fff) AM_WRITE(megasys1_scrollram_2_w) AM_BASE(&megasys1_scrollram[2]   )   // Scroll ram 2
	380	AM_RANGE(0x0a0000, 0x0a7fff) AM_RAM_WRITE(megasys1_scrollram_0_w) AM_BASE(&megasys1_scrollram[0])      // Scroll ram 0
	381	AM_RANGE(0x0a8000, 0x0affff) AM_RAM_WRITE(megasys1_scrollram_1_w) AM_BASE(&megasys1_scrollram[1])      // Scroll ram 1
	382	AM_RANGE(0x0b0000, 0x0b7fff) AM_RAM_WRITE(megasys1_scrollram_2_w) AM_BASE(&megasys1_scrollram[2])      // Scroll ram 2
437	383
438		AM_RANGE(0x0b8000, 0x0bffff) AM_WRITE(f1gpstar_paletteram16_w) AM_BASE(&paletteram16   )   // Palettes
	384	AM_RANGE(0x0b8000, 0x0bffff) AM_RAM_WRITE(f1gpstar_paletteram16_w) AM_BASE(&paletteram16)            // Palettes
	385
	386	AM_RANGE(0x0f0000, 0x0fffff) AM_RAM AM_BASE(&megasys1_ram)                                    // RAM
	387	AM_RANGE(0x100000, 0x17ffff) AM_READWRITE(rom_1_r, SMH_ROM)                                    // ROM
439	388	ADDRESS_MAP_END
440	389
441	390
r4679	r4680
444	393	**************************************************************************/
445	394
446	395	// Same as f1gpstar, but vregs are slightly different:
447		static ADDRESS_MAP_START( f1gpstr2_readmem, ADDRESS_SPACE_PROGRAM, 16 )
448		AM_RANGE(0x000000, 0x07ffff) AM_READ(SMH_ROM         )   // ROM
449		AM_RANGE(0x100000, 0x17ffff) AM_READ(rom_1_r         )   // ROM
450		AM_RANGE(0x0f0000, 0x0fffff) AM_READ(SMH_RAM         )   // RAM
451		AM_RANGE(0x080000, 0x087fff) AM_READ(f1gpstr2_vregs_r   )   // Vregs (slightly different from f1gpstar)
452		AM_RANGE(0x088000, 0x088fff) AM_READ(SMH_RAM         )   // Linking with other units
	396	static ADDRESS_MAP_START( f1gpstr2_map, ADDRESS_SPACE_PROGRAM, 16 )
	397	AM_RANGE(0x000000, 0x07ffff) AM_ROM                                                      // ROM
	398	AM_RANGE(0x080000, 0x087fff) AM_READWRITE(f1gpstr2_vregs_r, f1gpstr2_vregs_w) AM_BASE(&megasys1_vregs)   // Vregs (slightly different from f1gpstar)
	399	AM_RANGE(0x088000, 0x088fff) AM_RAM                                                      // Linking with other units
453	400
454		AM_RANGE(0x090000, 0x097fff) AM_READ(sharedram2_r      )   // Sharedram with sub CPU#2
455		AM_RANGE(0x098000, 0x09ffff) AM_READ(sharedram1_r      )   // Sharedram with sub CPU#1
	401	AM_RANGE(0x090000, 0x097fff) AM_READWRITE(sharedram2_r, sharedram2_w) AM_BASE(&sharedram2)            // Sharedram with sub CPU#2
	402	AM_RANGE(0x098000, 0x09ffff) AM_READWRITE(sharedram2_r, sharedram1_w) AM_BASE(&sharedram1)            // Sharedram with sub CPU#1
456	403
457		AM_RANGE(0x0a0000, 0x0a7fff) AM_READ(SMH_RAM         )   // Scroll ram 0
458		AM_RANGE(0x0a8000, 0x0affff) AM_READ(SMH_RAM         )   // Scroll ram 1
459		AM_RANGE(0x0b0000, 0x0b7fff) AM_READ(SMH_RAM         )   // Scroll ram 2
460
461		AM_RANGE(0x0b8000, 0x0bffff) AM_READ(SMH_RAM         )   // Palettes
462		ADDRESS_MAP_END
463
464		static ADDRESS_MAP_START( f1gpstr2_writemem, ADDRESS_SPACE_PROGRAM, 16 )
465		AM_RANGE(0x000000, 0x07ffff) AM_WRITE(SMH_ROM                     )
466		AM_RANGE(0x100000, 0x17ffff) AM_WRITE(SMH_ROM                     )
467		AM_RANGE(0x0f0000, 0x0fffff) AM_WRITE(SMH_RAM) AM_BASE(&megasys1_ram         )   // RAM
468		AM_RANGE(0x080000, 0x087fff) AM_WRITE(f1gpstr2_vregs_w) AM_BASE(&megasys1_vregs   )   // Vregs  (slightly different from f1gpstar)
469		AM_RANGE(0x088000, 0x088fff) AM_WRITE(SMH_RAM                     )   // Linking with other units
470
471		AM_RANGE(0x090000, 0x097fff) AM_WRITE(sharedram2_w) AM_BASE(&sharedram2         )   // Sharedram with sub CPU#2
472		AM_RANGE(0x098000, 0x09ffff) AM_WRITE(sharedram1_w) AM_BASE(&sharedram1         )   // Sharedram with sub CPU#1
473
474	404	/* Only writes to the first 0x40000 bytes affect the tilemaps:             */
475	405	/* either these games support larger tilemaps or have more ram than needed */
476		AM_RANGE(0x0a0000, 0x0a7fff) AM_WRITE(megasys1_scrollram_0_w) AM_BASE(&megasys1_scrollram[0]   )   // Scroll ram 0
477		AM_RANGE(0x0a8000, 0x0affff) AM_WRITE(megasys1_scrollram_1_w) AM_BASE(&megasys1_scrollram[1]   )   // Scroll ram 1
478		AM_RANGE(0x0b0000, 0x0b7fff) AM_WRITE(megasys1_scrollram_2_w) AM_BASE(&megasys1_scrollram[2]   )   // Scroll ram 2
	406	AM_RANGE(0x0a0000, 0x0a7fff) AM_RAM_WRITE(megasys1_scrollram_0_w) AM_BASE(&megasys1_scrollram[0])      // Scroll ram 0
	407	AM_RANGE(0x0a8000, 0x0affff) AM_RAM_WRITE(megasys1_scrollram_1_w) AM_BASE(&megasys1_scrollram[1])      // Scroll ram 1
	408	AM_RANGE(0x0b0000, 0x0b7fff) AM_RAM_WRITE(megasys1_scrollram_2_w) AM_BASE(&megasys1_scrollram[2])      // Scroll ram 2
479	409
480		AM_RANGE(0x0b8000, 0x0bffff) AM_WRITE(f1gpstar_paletteram16_w) AM_BASE(&paletteram16   )   // Palettes
	410	AM_RANGE(0x0b8000, 0x0bffff) AM_RAM_WRITE(f1gpstar_paletteram16_w) AM_BASE(&paletteram16)            // Palettes
	411
	412	AM_RANGE(0x0f0000, 0x0fffff) AM_RAM AM_BASE(&megasys1_ram)                                    // RAM
	413	AM_RANGE(0x100000, 0x17ffff) AM_READWRITE(rom_1_r, SMH_ROM)                                    // ROM
481	414	ADDRESS_MAP_END
482	415
483	416
r4679	r4680
584	517	}
585	518	}
586	519
587		static ADDRESS_MAP_START( readmem_scudhamm, ADDRESS_SPACE_PROGRAM, 16 )
588		AM_RANGE(0x000000, 0x07ffff) AM_READ(SMH_ROM               )   // ROM
589		AM_RANGE(0x0f0000, 0x0fffff) AM_READ(SMH_RAM               )   // Work RAM + Spriteram
590		AM_RANGE(0x082000, 0x082fff) AM_READ(SMH_RAM               )   // Video Registers + RAM
591		AM_RANGE(0x0a0000, 0x0a3fff) AM_READ(SMH_RAM               )   // Scroll RAM 0
592		AM_RANGE(0x0b0000, 0x0b3fff) AM_READ(SMH_RAM               )   // Scroll RAM 2
593		AM_RANGE(0x0b8000, 0x0bffff) AM_READ(SMH_RAM               )   // Palette
594		AM_RANGE(0x100008, 0x100009) AM_READ_PORT("IN0")               // Buttons
595		AM_RANGE(0x100014, 0x100015) AM_DEVREAD8("oki1", okim6295_r, 0x00ff   )   // Sound
596		AM_RANGE(0x100018, 0x100019) AM_DEVREAD8("oki2", okim6295_r, 0x00ff   )   //
597		AM_RANGE(0x100040, 0x100041) AM_READ(scudhamm_analog_r         )   // A / D
598		AM_RANGE(0x100044, 0x100045) AM_READ(scudhamm_motor_pos_r      )   // Motor Position
599		AM_RANGE(0x100050, 0x100051) AM_READ(scudhamm_motor_status_r   )   // Motor Limit Switches
600		AM_RANGE(0x10005c, 0x10005d) AM_READ_PORT("IN2")               // 2 x DSW
	520	static ADDRESS_MAP_START( scudhamm_map, ADDRESS_SPACE_PROGRAM, 16 )
	521	AM_RANGE(0x000000, 0x07ffff) AM_ROM                                                   // ROM
	522	AM_RANGE(0x082000, 0x082fff) AM_RAM_WRITE(scudhamm_vregs_w) AM_BASE(&megasys1_vregs)            // Video Registers + RAM
	523	AM_RANGE(0x0a0000, 0x0a3fff) AM_RAM_WRITE(megasys1_scrollram_0_w) AM_BASE(&megasys1_scrollram[0])   // Scroll RAM 0
	524	AM_RANGE(0x0b0000, 0x0b3fff) AM_RAM_WRITE(megasys1_scrollram_2_w) AM_BASE(&megasys1_scrollram[2])   // Scroll RAM 2
	525	AM_RANGE(0x0b8000, 0x0bffff) AM_RAM_WRITE(scudhamm_paletteram16_w) AM_BASE(&paletteram16)         // Palette
	526	AM_RANGE(0x0f0000, 0x0fffff) AM_RAM AM_BASE(&megasys1_ram)                                 // Work RAM + Spriteram
	527	AM_RANGE(0x100000, 0x100001) AM_WRITE(scudhamm_oki_bank_w)                                 // Sound
	528	AM_RANGE(0x100008, 0x100009) AM_READ_PORT("IN0") AM_WRITE(scudhamm_leds_w)                     // Buttons
	529	AM_RANGE(0x100014, 0x100015) AM_DEVREADWRITE8("oki1", okim6295_r, okim6295_w, 0x00ff)            // Sound
	530	AM_RANGE(0x100018, 0x100019) AM_DEVREADWRITE8("oki2", okim6295_r, okim6295_w, 0x00ff)            //
	531	AM_RANGE(0x10001c, 0x10001d) AM_WRITE(scudhamm_enable_w)                                 // ?
	532	AM_RANGE(0x100040, 0x100041) AM_READ(scudhamm_analog_r) AM_WRITE(SMH_NOP)                     // A / D
	533	AM_RANGE(0x100044, 0x100045) AM_READ(scudhamm_motor_pos_r      )                           // Motor Position
	534	AM_RANGE(0x100050, 0x100051) AM_READWRITE(scudhamm_motor_status_r, scudhamm_motor_command_w)      // Motor Limit Switches
	535	AM_RANGE(0x10005c, 0x10005d) AM_READ_PORT("IN2")                                       // 2 x DSW
601	536	ADDRESS_MAP_END
602	537
603		static ADDRESS_MAP_START( writemem_scudhamm, ADDRESS_SPACE_PROGRAM, 16 )
604		AM_RANGE(0x000000, 0x07ffff) AM_WRITE(SMH_ROM               )   // ROM
605		AM_RANGE(0x0f0000, 0x0fffff) AM_WRITE(SMH_RAM) AM_BASE(            &megasys1_ram         )   // Work RAM + Spriteram
606		AM_RANGE(0x082000, 0x082fff) AM_WRITE(scudhamm_vregs_w) AM_BASE(      &megasys1_vregs         )   // Video Registers + RAM
607		AM_RANGE(0x0a0000, 0x0a3fff) AM_WRITE(megasys1_scrollram_0_w) AM_BASE(   &megasys1_scrollram[0]   )   // Scroll RAM 0
608		AM_RANGE(0x0b0000, 0x0b3fff) AM_WRITE(megasys1_scrollram_2_w) AM_BASE(   &megasys1_scrollram[2]   )   // Scroll RAM 2
609		AM_RANGE(0x0b8000, 0x0bffff) AM_WRITE(scudhamm_paletteram16_w) AM_BASE(   &paletteram16         )   // Palette
610		AM_RANGE(0x100000, 0x100001) AM_WRITE(scudhamm_oki_bank_w      )   // Sound
611		AM_RANGE(0x100008, 0x100009) AM_WRITE(scudhamm_leds_w         )   // Leds
612		AM_RANGE(0x100014, 0x100015) AM_DEVWRITE8("oki1", okim6295_w, 0x00ff      )   // Sound
613		AM_RANGE(0x100018, 0x100019) AM_DEVWRITE8("oki2", okim6295_w, 0x00ff      )   //
614		AM_RANGE(0x10001c, 0x10001d) AM_WRITE(scudhamm_enable_w         )   // ?
615		AM_RANGE(0x100040, 0x100041) AM_WRITE(SMH_NOP               )   // ? 0 written before reading
616		AM_RANGE(0x100050, 0x100051) AM_WRITE(scudhamm_motor_command_w   )   // Move Motor
617		ADDRESS_MAP_END
618	538
619
620	539	/**************************************************************************
621	540	Arm Champs II
622	541	**************************************************************************/
r4679	r4680
680	599	}
681	600	}
682	601
683		static ADDRESS_MAP_START( readmem_armchmp2, ADDRESS_SPACE_PROGRAM, 16 )
684		AM_RANGE(0x000000, 0x07ffff) AM_READ(SMH_ROM               )   // ROM
685		AM_RANGE(0x0f0000, 0x0fffff) AM_READ(SMH_RAM               )   // Work RAM + Spriteram
686		AM_RANGE(0x082000, 0x082fff) AM_READ(SMH_RAM               )   // Video Registers + RAM
687		AM_RANGE(0x0a0000, 0x0a3fff) AM_READ(SMH_RAM               )   // Scroll RAM 0
688		AM_RANGE(0x0b0000, 0x0b3fff) AM_READ(SMH_RAM               )   // Scroll RAM 2
689		AM_RANGE(0x0b8000, 0x0bffff) AM_READ(SMH_RAM               )   // Palette
690		AM_RANGE(0x100000, 0x100001) AM_READ_PORT("IN2")               // DSW
691		AM_RANGE(0x100004, 0x100005) AM_READ_PORT("IN3")               // DSW
692		AM_RANGE(0x100008, 0x100009) AM_READ(armchmp2_buttons_r         )   // Buttons + Sensors
693		AM_RANGE(0x10000c, 0x10000d) AM_READ(armchmp2_analog_r         )   // A / D
694		AM_RANGE(0x100010, 0x100011) AM_READ(armchmp2_motor_status_r   )   // Motor Limit Switches?
695		AM_RANGE(0x100014, 0x100015) AM_DEVREAD8("oki1", okim6295_r, 0x00ff   )   // Sound
696		AM_RANGE(0x100018, 0x100019) AM_DEVREAD8("oki2", okim6295_r, 0x00ff   )   //
	602	static ADDRESS_MAP_START( armchmp2_map, ADDRESS_SPACE_PROGRAM, 16 )
	603	AM_RANGE(0x000000, 0x07ffff) AM_ROM                                                 // ROM
	604	AM_RANGE(0x082000, 0x082fff) AM_RAM_WRITE(scudhamm_vregs_w) AM_BASE(&megasys1_vregs)            // Video Registers + RAM
	605	AM_RANGE(0x0a0000, 0x0a3fff) AM_RAM_WRITE(megasys1_scrollram_0_w) AM_BASE(&megasys1_scrollram[0])   // Scroll RAM 0
	606	AM_RANGE(0x0b0000, 0x0b3fff) AM_RAM_WRITE(megasys1_scrollram_2_w) AM_BASE(&megasys1_scrollram[2])   // Scroll RAM 2
	607	AM_RANGE(0x0b8000, 0x0bffff) AM_RAM_WRITE(scudhamm_paletteram16_w) AM_BASE(&paletteram16)         // Palette
	608	AM_RANGE(0x0f0000, 0x0fffff) AM_RAM AM_BASE(&megasys1_ram)                                 // Work RAM + Spriteram
	609	AM_RANGE(0x100000, 0x100001) AM_READ_PORT("IN2") AM_WRITE(scudhamm_oki_bank_w)                  // DSW + Sound
	610	AM_RANGE(0x100004, 0x100005) AM_READ_PORT("IN3")                                       // DSW
	611	AM_RANGE(0x100008, 0x100009) AM_READWRITE(armchmp2_buttons_r, armchmp2_leds_w)                  // Leds + Coin Counters + Buttons + Sensors
	612	AM_RANGE(0x10000c, 0x10000d) AM_READ(armchmp2_analog_r) AM_WRITE(SMH_NOP)                     // A / D
	613	AM_RANGE(0x100010, 0x100011) AM_READWRITE(armchmp2_motor_status_r, armchmp2_motor_command_w)      // Motor Limit Switches?
	614	AM_RANGE(0x100014, 0x100015) AM_DEVREADWRITE8("oki1", okim6295_r, okim6295_w, 0x00ff   )         // Sound
	615	AM_RANGE(0x100018, 0x100019) AM_DEVREADWRITE8("oki2", okim6295_r, okim6295_w, 0x00ff   )         //
697	616	ADDRESS_MAP_END
698	617
699		static ADDRESS_MAP_START( writemem_armchmp2, ADDRESS_SPACE_PROGRAM, 16 )
700		AM_RANGE(0x000000, 0x07ffff) AM_WRITE(SMH_ROM               )   // ROM
701		AM_RANGE(0x0f0000, 0x0fffff) AM_WRITE(SMH_RAM) AM_BASE(            &megasys1_ram         )   // Work RAM + Spriteram
702		AM_RANGE(0x082000, 0x082fff) AM_WRITE(scudhamm_vregs_w) AM_BASE(      &megasys1_vregs         )   // Video Registers + RAM
703		AM_RANGE(0x0a0000, 0x0a3fff) AM_WRITE(megasys1_scrollram_0_w) AM_BASE(   &megasys1_scrollram[0]   )   // Scroll RAM 0
704		AM_RANGE(0x0b0000, 0x0b3fff) AM_WRITE(megasys1_scrollram_2_w) AM_BASE(   &megasys1_scrollram[2]   )   // Scroll RAM 2
705		AM_RANGE(0x0b8000, 0x0bffff) AM_WRITE(scudhamm_paletteram16_w) AM_BASE(   &paletteram16         )   // Palette
706		AM_RANGE(0x100000, 0x100001) AM_WRITE(scudhamm_oki_bank_w      )   // Sound
707		AM_RANGE(0x100008, 0x100009) AM_WRITE(armchmp2_leds_w         )   // Leds + Coin Counters
708		AM_RANGE(0x10000c, 0x10000d) AM_WRITE(SMH_NOP               )   // ?
709		AM_RANGE(0x100010, 0x100011) AM_WRITE(armchmp2_motor_command_w   )   // Move Motor
710		AM_RANGE(0x100014, 0x100015) AM_DEVWRITE8("oki1", okim6295_w, 0x00ff      )   // Sound
711		AM_RANGE(0x100018, 0x100019) AM_DEVWRITE8("oki2", okim6295_w, 0x00ff      )   //
712		ADDRESS_MAP_END
713	618
714
715	619	/**************************************************************************
716	620
717	621
r4679	r4680
724	628	Big Run
725	629	**************************************************************************/
726	630
727		static ADDRESS_MAP_START( bigrun_readmem2, ADDRESS_SPACE_PROGRAM, 16 )
728		AM_RANGE(0x000000, 0x03ffff) AM_READ(SMH_ROM      )   // ROM
729		AM_RANGE(0x0c0000, 0x0c3fff) AM_READ(SMH_RAM      )   // RAM
730		AM_RANGE(0x040000, 0x047fff) AM_READ(sharedram1_r   )   // Shared RAM (with Main CPU)
731		AM_RANGE(0x080000, 0x0807ff) AM_READ(SMH_RAM      )   // Road RAM
	631	static ADDRESS_MAP_START( bigrun_map2, ADDRESS_SPACE_PROGRAM, 16 )
	632	AM_RANGE(0x000000, 0x03ffff) AM_ROM                            // ROM
	633	AM_RANGE(0x040000, 0x047fff) AM_READWRITE(sharedram1_r, sharedram1_w)   // Shared RAM (with Main CPU)
	634	AM_RANGE(0x080000, 0x0807ff) AM_RAM AM_BASE(&cischeat_roadram[0])      // Road RAM
	635	AM_RANGE(0x0c0000, 0x0c3fff) AM_RAM                            // RAM
732	636	ADDRESS_MAP_END
733		static ADDRESS_MAP_START( bigrun_writemem2, ADDRESS_SPACE_PROGRAM, 16 )
734		AM_RANGE(0x000000, 0x03ffff) AM_WRITE(SMH_ROM                     )   // ROM
735		AM_RANGE(0x0c0000, 0x0c3fff) AM_WRITE(SMH_RAM                     )   // RAM
736		/* 800 bytes tested: */
737		AM_RANGE(0x040000, 0x047fff) AM_WRITE(sharedram1_w                  )   // Shared RAM (with Main CPU)
738		AM_RANGE(0x080000, 0x0807ff) AM_WRITE(SMH_RAM) AM_BASE(&cischeat_roadram[0]   )   // Road RAM
739		ADDRESS_MAP_END
740	637
741
742		static ADDRESS_MAP_START( bigrun_readmem3, ADDRESS_SPACE_PROGRAM, 16 )
743		AM_RANGE(0x000000, 0x03ffff) AM_READ(SMH_ROM      )   // ROM
744		AM_RANGE(0x0c0000, 0x0c3fff) AM_READ(SMH_RAM      )   // RAM
745		AM_RANGE(0x040000, 0x047fff) AM_READ(sharedram2_r   )   // Shared RAM (with Main CPU)
746		AM_RANGE(0x080000, 0x0807ff) AM_READ(SMH_RAM      )   // Road RAM
	638	static ADDRESS_MAP_START( bigrun_map3, ADDRESS_SPACE_PROGRAM, 16 )
	639	AM_RANGE(0x000000, 0x03ffff) AM_ROM                              // ROM
	640	AM_RANGE(0x040000, 0x047fff) AM_READWRITE(sharedram2_r, sharedram1_w)   // Shared RAM (with Main CPU)
	641	AM_RANGE(0x080000, 0x0807ff) AM_RAM AM_BASE(&cischeat_roadram[1])      // Road RAM
	642	AM_RANGE(0x0c0000, 0x0c3fff) AM_RAM                              // RAM
747	643	ADDRESS_MAP_END
748		static ADDRESS_MAP_START( bigrun_writemem3, ADDRESS_SPACE_PROGRAM, 16 )
749		AM_RANGE(0x000000, 0x03ffff) AM_WRITE(SMH_ROM                     )   // ROM
750		AM_RANGE(0x0c0000, 0x0c3fff) AM_WRITE(SMH_RAM                     )   // RAM
751		AM_RANGE(0x040000, 0x047fff) AM_WRITE(sharedram2_w                  )   // Shared RAM (with Main CPU)
752		AM_RANGE(0x080000, 0x0807ff) AM_WRITE(SMH_RAM) AM_BASE(&cischeat_roadram[1]   )   // Road RAM
753		ADDRESS_MAP_END
754	644
755	645
756	646	/**************************************************************************
757	647	Cisco Heat
758	648	**************************************************************************/
759	649
760		static ADDRESS_MAP_START( cischeat_readmem2, ADDRESS_SPACE_PROGRAM, 16 )
761		AM_RANGE(0x000000, 0x03ffff) AM_READ(SMH_ROM      )   // ROM
762		AM_RANGE(0x200000, 0x23ffff) AM_READ(rom_2_r      )   // ROM
763		AM_RANGE(0x0c0000, 0x0c3fff) AM_READ(SMH_RAM      )   // RAM
764		AM_RANGE(0x040000, 0x047fff) AM_READ(sharedram1_r   )   // Shared RAM (with Main CPU)
765		AM_RANGE(0x080000, 0x0807ff) AM_READ(SMH_RAM      )   // Road RAM
	650	static ADDRESS_MAP_START( cischeat_map2, ADDRESS_SPACE_PROGRAM, 16 )
	651	AM_RANGE(0x000000, 0x03ffff) AM_ROM                              // ROM
	652	AM_RANGE(0x040000, 0x047fff) AM_READWRITE(sharedram1_r, sharedram1_w)   // Shared RAM (with Main CPU)
	653	AM_RANGE(0x080000, 0x0807ff) AM_RAM AM_BASE(&cischeat_roadram[0])      // Road RAM
	654	AM_RANGE(0x0c0000, 0x0c3fff) AM_RAM                              // RAM
	655	AM_RANGE(0x100000, 0x100001) AM_WRITE(SMH_NOP)                     // watchdog
	656	AM_RANGE(0x200000, 0x23ffff) AM_READWRITE(rom_2_r, SMH_ROM)            // ROM
766	657	ADDRESS_MAP_END
767		static ADDRESS_MAP_START( cischeat_writemem2, ADDRESS_SPACE_PROGRAM, 16 )
768		AM_RANGE(0x000000, 0x03ffff) AM_WRITE(SMH_ROM                     )   // ROM
769		AM_RANGE(0x200000, 0x23ffff) AM_WRITE(SMH_ROM                     )   // ROM
770		AM_RANGE(0x0c0000, 0x0c3fff) AM_WRITE(SMH_RAM                     )   // RAM
771		AM_RANGE(0x040000, 0x047fff) AM_WRITE(sharedram1_w                  )   // Shared RAM (with Main CPU)
772		AM_RANGE(0x080000, 0x0807ff) AM_WRITE(SMH_RAM) AM_BASE(&cischeat_roadram[0]   )   // Road RAM
773		AM_RANGE(0x100000, 0x100001) AM_WRITE(SMH_NOP                     )   // watchdog
774		ADDRESS_MAP_END
775	658
776		static ADDRESS_MAP_START( cischeat_readmem3, ADDRESS_SPACE_PROGRAM, 16 )
777		AM_RANGE(0x000000, 0x03ffff) AM_READ(SMH_ROM      )   // ROM
778		AM_RANGE(0x200000, 0x23ffff) AM_READ(rom_3_r      )   // ROM
779		AM_RANGE(0x0c0000, 0x0c3fff) AM_READ(SMH_RAM      )   // RAM
780		AM_RANGE(0x040000, 0x047fff) AM_READ(sharedram2_r   )   // Shared RAM (with Main CPU)
781		AM_RANGE(0x080000, 0x0807ff) AM_READ(SMH_RAM      )   // Road RAM
	659	static ADDRESS_MAP_START( cischeat_map3, ADDRESS_SPACE_PROGRAM, 16 )
	660	AM_RANGE(0x000000, 0x03ffff) AM_ROM                              // ROM
	661	AM_RANGE(0x040000, 0x047fff) AM_READWRITE(sharedram2_r, sharedram2_w)   // Shared RAM (with Main CPU)
	662	AM_RANGE(0x080000, 0x0807ff) AM_RAM AM_BASE(&cischeat_roadram[1])      // Road RAM
	663	AM_RANGE(0x0c0000, 0x0c3fff) AM_RAM                              // RAM
	664	AM_RANGE(0x100000, 0x100001) AM_WRITE(SMH_NOP)                     // watchdog
	665	AM_RANGE(0x200000, 0x23ffff) AM_READWRITE(rom_3_r, SMH_ROM)            // ROM
782	666	ADDRESS_MAP_END
783		static ADDRESS_MAP_START( cischeat_writemem3, ADDRESS_SPACE_PROGRAM, 16 )
784		AM_RANGE(0x000000, 0x03ffff) AM_WRITE(SMH_ROM                     )   // ROM
785		AM_RANGE(0x200000, 0x23ffff) AM_WRITE(SMH_ROM                     )   // ROM
786		AM_RANGE(0x0c0000, 0x0c3fff) AM_WRITE(SMH_RAM                     )   // RAM
787		AM_RANGE(0x040000, 0x047fff) AM_WRITE(sharedram2_w                  )   // Shared RAM (with Main CPU)
788		AM_RANGE(0x080000, 0x0807ff) AM_WRITE(SMH_RAM) AM_BASE(&cischeat_roadram[1]   )   // Road RAM
789		AM_RANGE(0x100000, 0x100001) AM_WRITE(SMH_NOP                     )   // watchdog
790		ADDRESS_MAP_END
791	667
792	668
793	669
r4679	r4680
795	671	F1 GrandPrix Star
796	672	**************************************************************************/
797	673
798		static ADDRESS_MAP_START( f1gpstar_readmem2, ADDRESS_SPACE_PROGRAM, 16 )
799		AM_RANGE(0x000000, 0x03ffff) AM_READ(SMH_ROM      )   // ROM
800		AM_RANGE(0x180000, 0x183fff) AM_READ(SMH_RAM      )   // RAM
801		AM_RANGE(0x080000, 0x0807ff) AM_READ(sharedram1_r   )   // Shared RAM (with Main CPU)
802		AM_RANGE(0x100000, 0x1007ff) AM_READ(SMH_RAM      )   // Road RAM
	674	static ADDRESS_MAP_START( f1gpstar_map2, ADDRESS_SPACE_PROGRAM, 16 )
	675	AM_RANGE(0x000000, 0x03ffff) AM_ROM                              // ROM
	676	AM_RANGE(0x080000, 0x0807ff) AM_READWRITE(sharedram1_r, sharedram1_w)   // Shared RAM (with Main CPU)
	677	AM_RANGE(0x100000, 0x1007ff) AM_RAM AM_BASE(&cischeat_roadram[0])      // Road RAM
	678	AM_RANGE(0x180000, 0x183fff) AM_RAM                              // RAM
	679	AM_RANGE(0x200000, 0x200001) AM_WRITE(SMH_NOP)                     // watchdog
803	680	ADDRESS_MAP_END
804		static ADDRESS_MAP_START( f1gpstar_writemem2, ADDRESS_SPACE_PROGRAM, 16 )
805		AM_RANGE(0x000000, 0x03ffff) AM_WRITE(SMH_ROM                     )   // ROM
806		AM_RANGE(0x180000, 0x183fff) AM_WRITE(SMH_RAM                     )   // RAM
807		AM_RANGE(0x080000, 0x0807ff) AM_WRITE(sharedram1_w                  )   // Shared RAM (with Main CPU)
808		AM_RANGE(0x100000, 0x1007ff) AM_WRITE(SMH_RAM) AM_BASE(&cischeat_roadram[0]   )   // Road RAM
809		AM_RANGE(0x200000, 0x200001) AM_WRITE(SMH_NOP                     )   // watchdog
810		ADDRESS_MAP_END
811	681
812		static ADDRESS_MAP_START( f1gpstar_readmem3, ADDRESS_SPACE_PROGRAM, 16 )
813		AM_RANGE(0x000000, 0x03ffff) AM_READ(SMH_ROM      )   // ROM
814		AM_RANGE(0x180000, 0x183fff) AM_READ(SMH_RAM      )   // RAM
815		AM_RANGE(0x080000, 0x0807ff) AM_READ(sharedram2_r   )   // Shared RAM (with Main CPU)
816		AM_RANGE(0x100000, 0x1007ff) AM_READ(SMH_RAM      )   // Road RAM
	682	static ADDRESS_MAP_START( f1gpstar_map3, ADDRESS_SPACE_PROGRAM, 16 )
	683	AM_RANGE(0x000000, 0x03ffff) AM_ROM                              // ROM
	684	AM_RANGE(0x080000, 0x0807ff) AM_READWRITE(sharedram2_r, sharedram2_w)   // Shared RAM (with Main CPU)
	685	AM_RANGE(0x100000, 0x1007ff) AM_RAM AM_BASE(&cischeat_roadram[1])      // Road RAM
	686	AM_RANGE(0x180000, 0x183fff) AM_RAM                              // RAM
	687	AM_RANGE(0x200000, 0x200001) AM_WRITE(SMH_NOP)                     // watchdog
817	688	ADDRESS_MAP_END
818		static ADDRESS_MAP_START( f1gpstar_writemem3, ADDRESS_SPACE_PROGRAM, 16 )
819		AM_RANGE(0x000000, 0x03ffff) AM_WRITE(SMH_ROM                     )   // ROM
820		AM_RANGE(0x180000, 0x183fff) AM_WRITE(SMH_RAM                     )   // RAM
821		AM_RANGE(0x080000, 0x0807ff) AM_WRITE(sharedram2_w                  )   // Shared RAM (with Main CPU)
822		AM_RANGE(0x100000, 0x1007ff) AM_WRITE(SMH_RAM) AM_BASE(&cischeat_roadram[1]   )   // Road RAM
823		AM_RANGE(0x200000, 0x200001) AM_WRITE(SMH_NOP                     )   // watchdog
824		ADDRESS_MAP_END
825	689
826	690
827	691	/**************************************************************************
r4679	r4680
848	712	}
849	713	}
850	714
851		static ADDRESS_MAP_START( bigrun_sound_readmem, ADDRESS_SPACE_PROGRAM, 16 )
852		AM_RANGE(0x000000, 0x03ffff) AM_READ(SMH_ROM                  )   // ROM
853		AM_RANGE(0x0f0000, 0x0fffff) AM_READ(SMH_RAM                  )   // RAM
854		AM_RANGE(0x040000, 0x040001) AM_READ(soundlatch_word_r            )   // From Main CPU
855		AM_RANGE(0x080000, 0x080003) AM_DEVREAD8("ym", ym2151_r, 0x00ff )
856		AM_RANGE(0x0a0000, 0x0a0001) AM_DEVREAD8("oki1", okim6295_r, 0x00ff )
857		AM_RANGE(0x0c0000, 0x0c0001) AM_DEVREAD8("oki2", okim6295_r, 0x00ff )
	715	static ADDRESS_MAP_START( bigrun_sound_map, ADDRESS_SPACE_PROGRAM, 16 )
	716	AM_RANGE(0x000000, 0x03ffff) AM_ROM                                       // ROM
	717	AM_RANGE(0x040000, 0x040001) AM_READWRITE(soundlatch_word_r, bigrun_soundbank_w)   // From Main CPU
	718	AM_RANGE(0x060000, 0x060001) AM_WRITE(soundlatch2_word_w)                     // To Main CPU
	719	AM_RANGE(0x080000, 0x080003) AM_DEVREADWRITE8("ym", ym2151_r, ym2151_w, 0x00ff)
	720	AM_RANGE(0x0a0000, 0x0a0001) AM_DEVREADWRITE8("oki1", okim6295_r, okim6295_w, 0x00ff)
	721	AM_RANGE(0x0c0000, 0x0c0001) AM_DEVREADWRITE8("oki2", okim6295_r, okim6295_w, 0x00ff)
	722	AM_RANGE(0x0f0000, 0x0fffff) AM_RAM                                       // RAM
858	723	ADDRESS_MAP_END
859	724
860		static ADDRESS_MAP_START( bigrun_sound_writemem, ADDRESS_SPACE_PROGRAM, 16 )
861		AM_RANGE(0x000000, 0x03ffff) AM_WRITE(SMH_ROM                  )   // ROM
862		AM_RANGE(0x0f0000, 0x0fffff) AM_WRITE(SMH_RAM                  )   // RAM
863		AM_RANGE(0x040000, 0x040001) AM_WRITE(bigrun_soundbank_w         )   // Sample Banking
864		AM_RANGE(0x060000, 0x060001) AM_WRITE(soundlatch2_word_w         )   // To Main CPU
865		AM_RANGE(0x080000, 0x080003) AM_DEVWRITE8("ym", ym2151_w, 0x00ff   )
866		AM_RANGE(0x0a0000, 0x0a0003) AM_DEVWRITE8("oki1", okim6295_w, 0x00ff   )
867		AM_RANGE(0x0c0000, 0x0c0003) AM_DEVWRITE8("oki2", okim6295_w, 0x00ff )
868		ADDRESS_MAP_END
869	725
870
871	726	/**************************************************************************
872	727	Cisco Heat
873	728	**************************************************************************/
r4679	r4680
877	732	if (ACCESSING_BITS_0_7)   okim6295_set_bank_base(device, 0x40000 * (data & 1) );
878	733	}
879	734
880		static ADDRESS_MAP_START( cischeat_sound_readmem, ADDRESS_SPACE_PROGRAM, 16 )
881		AM_RANGE(0x000000, 0x03ffff) AM_READ(SMH_ROM                  )   // ROM
882		AM_RANGE(0x0f0000, 0x0fffff) AM_READ(SMH_RAM                  )   // RAM
883		AM_RANGE(0x060004, 0x060005) AM_READ(soundlatch_word_r            )   // From Main CPU
884		AM_RANGE(0x080000, 0x080003) AM_DEVREAD8("ym", ym2151_r, 0x00ff )
885		AM_RANGE(0x0a0000, 0x0a0001) AM_DEVREAD8("oki1", okim6295_r, 0x00ff      )
886		AM_RANGE(0x0c0000, 0x0c0001) AM_DEVREAD8("oki2", okim6295_r, 0x00ff      )
	735	static ADDRESS_MAP_START( cischeat_sound_map, ADDRESS_SPACE_PROGRAM, 16 )
	736	AM_RANGE(0x000000, 0x03ffff) AM_ROM                                       // ROM
	737	AM_RANGE(0x040002, 0x040003) AM_DEVWRITE("oki1", cischeat_soundbank_w)            // Sample Banking
	738	AM_RANGE(0x040004, 0x040005) AM_DEVWRITE("oki2", cischeat_soundbank_w)            // Sample Banking
	739	AM_RANGE(0x060002, 0x060003) AM_WRITE(soundlatch2_word_w)                     // To Main CPU
	740	AM_RANGE(0x060004, 0x060005) AM_READ(soundlatch_word_r)                        // From Main CPU
	741	AM_RANGE(0x080000, 0x080003) AM_DEVREADWRITE8("ym", ym2151_r, ym2151_w, 0x00ff)
	742	AM_RANGE(0x0a0000, 0x0a0003) AM_DEVREADWRITE8("oki1", okim6295_r, okim6295_w, 0x00ff)
	743	AM_RANGE(0x0c0000, 0x0c0003) AM_DEVREADWRITE8("oki2", okim6295_r, okim6295_w, 0x00ff)
	744	AM_RANGE(0x0f0000, 0x0fffff) AM_RAM                                       // RAM
887	745	ADDRESS_MAP_END
888	746
889		static ADDRESS_MAP_START( cischeat_sound_writemem, ADDRESS_SPACE_PROGRAM, 16 )
890		AM_RANGE(0x000000, 0x03ffff) AM_WRITE(SMH_ROM                  )   // ROM
891		AM_RANGE(0x0f0000, 0x0fffff) AM_WRITE(SMH_RAM                  )   // RAM
892		AM_RANGE(0x040002, 0x040003) AM_DEVWRITE("oki1", cischeat_soundbank_w      )   // Sample Banking
893		AM_RANGE(0x040004, 0x040005) AM_DEVWRITE("oki2", cischeat_soundbank_w      )   // Sample Banking
894		AM_RANGE(0x060002, 0x060003) AM_WRITE(soundlatch2_word_w         )   // To Main CPU
895		AM_RANGE(0x080000, 0x080003) AM_DEVWRITE8("ym", ym2151_w, 0x00ff )
896		AM_RANGE(0x0a0000, 0x0a0003) AM_DEVWRITE8("oki1", okim6295_w, 0x00ff         )
897		AM_RANGE(0x0c0000, 0x0c0003) AM_DEVWRITE8("oki2", okim6295_w, 0x00ff         )
898		ADDRESS_MAP_END
899	747
900
901	748	/**************************************************************************
902	749	F1 GrandPrix Star
903	750	**************************************************************************/
904	751
905		static ADDRESS_MAP_START( f1gpstar_sound_readmem, ADDRESS_SPACE_PROGRAM, 16 )
906		AM_RANGE(0x000000, 0x03ffff) AM_READ(SMH_ROM                  )   // ROM
907		AM_RANGE(0x0e0000, 0x0fffff) AM_READ(SMH_RAM                  )   // RAM              (cischeat: f0000-fffff)
908		AM_RANGE(0x060000, 0x060001) AM_READ(soundlatch_word_r            )   // From Main CPU    (cischeat: 60004)
909		AM_RANGE(0x080000, 0x080003) AM_DEVREAD8("ym", ym2151_r, 0x00ff )
910		AM_RANGE(0x0a0000, 0x0a0001) AM_DEVREAD8("oki1", okim6295_r, 0x00ff      )
911		AM_RANGE(0x0c0000, 0x0c0001) AM_DEVREAD8("oki2", okim6295_r, 0x00ff      )
	752	static ADDRESS_MAP_START( f1gpstar_sound_map, ADDRESS_SPACE_PROGRAM, 16 )
	753	AM_RANGE(0x000000, 0x03ffff) AM_ROM                                       // ROM
	754	AM_RANGE(0x040004, 0x040005) AM_DEVWRITE("oki1", cischeat_soundbank_w)            // Sample Banking   (cischeat: 40002)
	755	AM_RANGE(0x040008, 0x040009) AM_DEVWRITE("oki2", cischeat_soundbank_w)            // Sample Banking   (cischeat: 40004)
	756	AM_RANGE(0x060000, 0x060001) AM_READWRITE(soundlatch_word_r, soundlatch2_word_w)   // From Main CPU    (cischeat: 60004)
	757	AM_RANGE(0x080000, 0x080003) AM_DEVREADWRITE8("ym", ym2151_r, ym2151_w, 0x00ff)
	758	AM_RANGE(0x0a0000, 0x0a0003) AM_DEVREADWRITE8("oki1", okim6295_r, okim6295_w, 0x00ff)
	759	AM_RANGE(0x0c0000, 0x0c0003) AM_DEVREADWRITE8("oki2", okim6295_r, okim6295_w, 0x00ff)
	760	AM_RANGE(0x0e0000, 0x0fffff) AM_RAM                                       // RAM              (cischeat: f0000-fffff)
912	761	ADDRESS_MAP_END
913	762
914		static ADDRESS_MAP_START( f1gpstar_sound_writemem, ADDRESS_SPACE_PROGRAM, 16 )
915		AM_RANGE(0x000000, 0x03ffff) AM_WRITE(SMH_ROM                  )   // ROM
916		AM_RANGE(0x0e0000, 0x0fffff) AM_WRITE(SMH_RAM                  )   // RAM              (cischeat: f0000-fffff)
917		AM_RANGE(0x040004, 0x040005) AM_DEVWRITE("oki1", cischeat_soundbank_w      )   // Sample Banking   (cischeat: 40002)
918		AM_RANGE(0x040008, 0x040009) AM_DEVWRITE("oki2", cischeat_soundbank_w      )   // Sample Banking   (cischeat: 40004)
919		AM_RANGE(0x060000, 0x060001) AM_WRITE(soundlatch2_word_w         )   // To Main CPU      (cischeat: 60002)
920		AM_RANGE(0x080000, 0x080003) AM_DEVWRITE8("ym", ym2151_w, 0x00ff )
921		AM_RANGE(0x0a0000, 0x0a0003) AM_DEVWRITE8("oki1", okim6295_w, 0x00ff         )
922		AM_RANGE(0x0c0000, 0x0c0003) AM_DEVWRITE8("oki2", okim6295_w, 0x00ff         )
923		ADDRESS_MAP_END
924	763
925
926	764	/**************************************************************************
927	765	F1 GrandPrix Star II
928	766	**************************************************************************/
929	767
930		static ADDRESS_MAP_START( f1gpstr2_sound_readmem, ADDRESS_SPACE_PROGRAM, 16 )
931		AM_RANGE(0x000000, 0x03ffff) AM_READ(SMH_ROM                  )   // ROM
932		AM_RANGE(0x0e0000, 0x0fffff) AM_READ(SMH_RAM                  )   // RAM
933		AM_RANGE(0x060004, 0x060005) AM_READ(soundlatch_word_r            )   // From Main CPU    (f1gpstar: 60000)
934		AM_RANGE(0x080000, 0x080003) AM_DEVREAD8("ym", ym2151_r, 0x00ff )
935		AM_RANGE(0x0a0000, 0x0a0001) AM_DEVREAD8("oki1", okim6295_r, 0x00ff      )
936		AM_RANGE(0x0c0000, 0x0c0001) AM_DEVREAD8("oki2", okim6295_r, 0x00ff      )
	768	static ADDRESS_MAP_START( f1gpstr2_sound_map, ADDRESS_SPACE_PROGRAM, 16 )
	769	AM_RANGE(0x000000, 0x03ffff) AM_ROM // ROM
	770	AM_RANGE(0x040004, 0x040005) AM_DEVWRITE("oki1", cischeat_soundbank_w)               // Sample Banking
	771	AM_RANGE(0x040008, 0x040009) AM_DEVWRITE("oki2", cischeat_soundbank_w)               // Sample Banking
	772	AM_RANGE(0x04000e, 0x04000f) AM_WRITE(SMH_NOP)                                 // ? 0              (f1gpstar: no)
	773	AM_RANGE(0x060004, 0x060005) AM_READWRITE(soundlatch_word_r, soundlatch2_word_w)      // From Main CPU    (f1gpstar: 60000)
	774	AM_RANGE(0x080000, 0x080003) AM_DEVREADWRITE8("ym", ym2151_r, ym2151_w, 0x00ff)
	775	AM_RANGE(0x0a0000, 0x0a0003) AM_DEVREADWRITE8("oki1", okim6295_r, okim6295_w, 0x00ff)
	776	AM_RANGE(0x0c0000, 0x0c0003) AM_DEVREADWRITE8("oki2", okim6295_r, okim6295_w, 0x00ff)
	777	AM_RANGE(0x0e0000, 0x0fffff) AM_RAM                                          // RAM
937	778	ADDRESS_MAP_END
938	779
939		static ADDRESS_MAP_START( f1gpstr2_sound_writemem, ADDRESS_SPACE_PROGRAM, 16 )
940		AM_RANGE(0x000000, 0x03ffff) AM_WRITE(SMH_ROM                  )   // ROM
941		AM_RANGE(0x0e0000, 0x0fffff) AM_WRITE(SMH_RAM                  )   // RAM
942		AM_RANGE(0x040004, 0x040005) AM_DEVWRITE("oki1", cischeat_soundbank_w)   // Sample Banking
943		AM_RANGE(0x040008, 0x040009) AM_DEVWRITE("oki2", cischeat_soundbank_w)   // Sample Banking
944		AM_RANGE(0x04000e, 0x04000f) AM_WRITE(SMH_NOP                  )   // ? 0              (f1gpstar: no)
945		AM_RANGE(0x060002, 0x060003) AM_WRITE(soundlatch2_word_w         )   // To Main CPU      (f1gpstar: 60000)
946		AM_RANGE(0x080000, 0x080003) AM_DEVWRITE8("ym", ym2151_w, 0x00ff )
947		AM_RANGE(0x0a0000, 0x0a0003) AM_DEVWRITE8("oki1", okim6295_w, 0x00ff         )
948		AM_RANGE(0x0c0000, 0x0c0003) AM_DEVWRITE8("oki2", okim6295_w, 0x00ff         )
949		ADDRESS_MAP_END
950
951	780	/**************************************************************************
952	781
953	782
r4679	r4680
959	788	static READ16_HANDLER ( f1gpstr2_io_r )   { return megasys1_vregs[offset + 0x1000/2]; }
960	789	static WRITE16_HANDLER( f1gpstr2_io_w )   { COMBINE_DATA(&megasys1_vregs[offset + 0x1000/2]); }
961	790
962		static ADDRESS_MAP_START( f1gpstr2_io_readmem, ADDRESS_SPACE_PROGRAM, 16 )
963		AM_RANGE(0x000000, 0x07ffff) AM_READ(SMH_ROM                  )   // ROM
964		AM_RANGE(0x180000, 0x183fff) AM_READ(SMH_RAM                  )   // RAM
965		AM_RANGE(0x080000, 0x080fff) AM_READ(f1gpstr2_io_r               )   //
	791	static ADDRESS_MAP_START( f1gpstr2_io_map, ADDRESS_SPACE_PROGRAM, 16 )
	792	AM_RANGE(0x000000, 0x07ffff) AM_ROM                                 // ROM
	793	AM_RANGE(0x080000, 0x080fff) AM_READWRITE(f1gpstr2_io_r, f1gpstr2_io_w)      //
	794	AM_RANGE(0x100000, 0x100001) AM_WRITE(SMH_RAM) AM_BASE(&f1gpstr2_ioready)   //
	795	AM_RANGE(0x180000, 0x183fff) AM_RAM                                 // RAM
	796	AM_RANGE(0x200000, 0x200001) AM_WRITE(SMH_NOP)                        //
966	797	ADDRESS_MAP_END
967	798
968		static ADDRESS_MAP_START( f1gpstr2_io_writemem, ADDRESS_SPACE_PROGRAM, 16 )
969		AM_RANGE(0x000000, 0x07ffff) AM_WRITE(SMH_ROM                  )   // ROM
970		AM_RANGE(0x180000, 0x183fff) AM_WRITE(SMH_RAM                  )   // RAM
971		AM_RANGE(0x080000, 0x080fff) AM_WRITE(f1gpstr2_io_w               )   //
972		AM_RANGE(0x100000, 0x100001) AM_WRITE(SMH_RAM) AM_BASE(&f1gpstr2_ioready   )   //
973		AM_RANGE(0x200000, 0x200001) AM_WRITE(SMH_NOP                  )   //
974		ADDRESS_MAP_END
975	799
976
977	800	/***************************************************************************
978	801
979	802
r4679	r4680
1755	1578
1756	1579	/* basic machine hardware */
1757	1580	MDRV_CPU_ADD("cpu1", M68000, 10000000)
1758		MDRV_CPU_PROGRAM_MAP(bigrun_readmem,bigrun_writemem)
	1581	MDRV_CPU_PROGRAM_MAP(bigrun_map,0)
1759	1582	MDRV_CPU_VBLANK_INT_HACK(cischeat_interrupt,CISCHEAT_INTERRUPT_NUM)
1760	1583
1761	1584	MDRV_CPU_ADD("cpu2", M68000, 10000000)
1762		MDRV_CPU_PROGRAM_MAP(bigrun_readmem2,bigrun_writemem2)
	1585	MDRV_CPU_PROGRAM_MAP(bigrun_map2,0)
1763	1586	MDRV_CPU_VBLANK_INT("screen", irq4_line_hold)
1764	1587
1765	1588	MDRV_CPU_ADD("cpu3", M68000, 10000000)
1766		MDRV_CPU_PROGRAM_MAP(bigrun_readmem3,bigrun_writemem3)
	1589	MDRV_CPU_PROGRAM_MAP(bigrun_map3,0)
1767	1590	MDRV_CPU_VBLANK_INT("screen", irq4_line_hold)
1768	1591
1769	1592	MDRV_CPU_ADD("soundcpu", M68000, 6000000)
1770		MDRV_CPU_PROGRAM_MAP(bigrun_sound_readmem,bigrun_sound_writemem)
	1593	MDRV_CPU_PROGRAM_MAP(bigrun_sound_map,0)
1771	1594	MDRV_CPU_VBLANK_INT_HACK(irq4_line_hold,CISCHEAT_SOUND_INTERRUPT_NUM)
1772	1595
1773	1596	MDRV_QUANTUM_TIME(HZ(1200))
r4679	r4680
1810	1633	/* basic machine hardware */
1811	1634	MDRV_IMPORT_FROM(bigrun)
1812	1635	MDRV_CPU_MODIFY("cpu1")
1813		MDRV_CPU_PROGRAM_MAP(cischeat_readmem,cischeat_writemem)
	1636	MDRV_CPU_PROGRAM_MAP(cischeat_map,0)
1814	1637
1815	1638	MDRV_CPU_MODIFY("cpu2")
1816		MDRV_CPU_PROGRAM_MAP(cischeat_readmem2,cischeat_writemem2)
	1639	MDRV_CPU_PROGRAM_MAP(cischeat_map2,0)
1817	1640
1818	1641	MDRV_CPU_MODIFY("cpu3")
1819		MDRV_CPU_PROGRAM_MAP(cischeat_readmem3,cischeat_writemem3)
	1642	MDRV_CPU_PROGRAM_MAP(cischeat_map3,0)
1820	1643
1821	1644	MDRV_CPU_MODIFY("soundcpu")
1822		MDRV_CPU_PROGRAM_MAP(cischeat_sound_readmem,cischeat_sound_writemem)
	1645	MDRV_CPU_PROGRAM_MAP(cischeat_sound_map,0)
1823	1646
1824	1647	/* video hardware */
1825	1648	MDRV_SCREEN_MODIFY("screen")
r4679	r4680
1838	1661	/* basic machine hardware */
1839	1662	MDRV_IMPORT_FROM(bigrun)
1840	1663	MDRV_CPU_REPLACE("cpu1", M68000, 12000000)
1841		MDRV_CPU_PROGRAM_MAP(f1gpstar_readmem,f1gpstar_writemem)
	1664	MDRV_CPU_PROGRAM_MAP(f1gpstar_map,0)
1842	1665
1843	1666	MDRV_CPU_REPLACE("cpu2", M68000, 12000000)
1844		MDRV_CPU_PROGRAM_MAP(f1gpstar_readmem2,f1gpstar_writemem2)
	1667	MDRV_CPU_PROGRAM_MAP(f1gpstar_map2,0)
1845	1668
1846	1669	MDRV_CPU_REPLACE("cpu3", M68000, 12000000)
1847		MDRV_CPU_PROGRAM_MAP(f1gpstar_readmem3,f1gpstar_writemem3)
	1670	MDRV_CPU_PROGRAM_MAP(f1gpstar_map3,0)
1848	1671
1849	1672	MDRV_CPU_MODIFY("soundcpu")
1850		MDRV_CPU_PROGRAM_MAP(f1gpstar_sound_readmem,f1gpstar_sound_writemem)
	1673	MDRV_CPU_PROGRAM_MAP(f1gpstar_sound_map,0)
1851	1674
1852	1675	/* video hardware */
1853	1676	MDRV_GFXDECODE(f1gpstar)
r4679	r4680
1864	1687	MDRV_IMPORT_FROM(f1gpstar)
1865	1688
1866	1689	MDRV_CPU_MODIFY("cpu1")
1867		MDRV_CPU_PROGRAM_MAP(f1gpstr2_readmem,f1gpstr2_writemem)
	1690	MDRV_CPU_PROGRAM_MAP(f1gpstr2_map,0)
1868	1691
1869	1692	MDRV_CPU_MODIFY("soundcpu")
1870		MDRV_CPU_PROGRAM_MAP(f1gpstr2_sound_readmem,f1gpstr2_sound_writemem)
	1693	MDRV_CPU_PROGRAM_MAP(f1gpstr2_sound_map,0)
1871	1694
1872	1695	MDRV_CPU_ADD("cpu5", M68000, 12000000/* was 10000000 */)
1873		MDRV_CPU_PROGRAM_MAP(f1gpstr2_io_readmem,f1gpstr2_io_writemem)
	1696	MDRV_CPU_PROGRAM_MAP(f1gpstr2_io_map,0)
1874	1697	MDRV_CPU_VBLANK_INT("screen", irq4_line_hold)
1875	1698	MACHINE_DRIVER_END
1876	1699
r4679	r4680
1901	1724
1902	1725	/* basic machine hardware */
1903	1726	MDRV_CPU_ADD("maincpu",M68000, 12000000)
1904		MDRV_CPU_PROGRAM_MAP(readmem_scudhamm,writemem_scudhamm)
	1727	MDRV_CPU_PROGRAM_MAP(scudhamm_map,0)
1905	1728	MDRV_CPU_VBLANK_INT_HACK(interrupt_scudhamm,INTERRUPT_NUM_SCUDHAMM)
1906	1729
1907	1730	/* video hardware */
r4679	r4680
1953	1776	/* basic machine hardware */
1954	1777	MDRV_IMPORT_FROM(scudhamm)
1955	1778	MDRV_CPU_MODIFY("maincpu")
1956		MDRV_CPU_PROGRAM_MAP(readmem_armchmp2,writemem_armchmp2)
	1779	MDRV_CPU_PROGRAM_MAP(armchmp2_map,0)
1957	1780	MDRV_CPU_VBLANK_INT_HACK(interrupt_armchmp2,INTERRUPT_NUM_SCUDHAMM)
1958	1781
1959	1782	MACHINE_DRIVER_END
r4679	r4680
2697	2520
2698	2521	static DRIVER_INIT( wildplt )
2699	2522	{
2700		memory_install_read16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x080000, 0x087fff, 0, 0, wildplt_vregs_r );
	2523	memory_install_read16_handler(cputag_get_address_space(machine, "cpu1", ADDRESS_SPACE_PROGRAM), 0x080000, 0x087fff, 0, 0, wildplt_vregs_r );
2701	2524
2702	2525	DRIVER_INIT_CALL(f1gpstar);
2703	2526	}

src/mame/drivers/namcos22.c

r4679	r4680
1772	1772	mRenderBufData[mRenderBufSize++] = data;
1773	1773	if( mRenderBufSize == MAX_RENDER_CMD_SEQ )
1774	1774	{
1775		namcos22_draw_direct_poly( mRenderBufData );
	1775	namcos22_draw_direct_poly( space->machine, mRenderBufData );
1776	1776	}
1777	1777	}
1778	1778	}
r4679	r4680
2099	2099	*/
2100	2100	static TIMER_CALLBACK( start_subcpu )
2101	2101	{
2102		cpu_set_input_line(machine->cpu[3], INPUT_LINE_RESET, CLEAR_LINE);
	2102	cputag_set_input_line(machine, "mcu", INPUT_LINE_RESET, CLEAR_LINE);
2103	2103	}
2104	2104
2105	2105	static WRITE32_HANDLER( namcos22_system_controller_w )
r4679	r4680
2136	2136	{ /* SUBCPU enable for Super System 22 */
2137	2137	if (data)
2138	2138	{
2139		cpu_set_input_line(space->machine->cpu[3], INPUT_LINE_RESET, CLEAR_LINE);
	2139	cputag_set_input_line(space->machine, "mcu", INPUT_LINE_RESET, CLEAR_LINE);
2140	2140	}
2141	2141	else
2142	2142	{
2143		cpu_set_input_line(space->machine->cpu[3],INPUT_LINE_RESET,ASSERT_LINE); /* M37710 MCU */
	2143	cputag_set_input_line(space->machine, "mcu",INPUT_LINE_RESET,ASSERT_LINE); /* M37710 MCU */
2144	2144	}
2145	2145	}
2146	2146	}
r4679	r4680
2601	2601	int i;
2602	2602	for (i = 0; i < 16; i++)
2603	2603	{
2604		generic_pulse_irq_line(space->machine->cpu[3], M37710_LINE_TIMERA3TICK);
	2604	generic_pulse_irq_line(cputag_get_cpu(space->machine, "mcu"), M37710_LINE_TIMERA3TICK);
2605	2605	}
2606	2606	}
2607	2607
r4679	r4680
5071	5071
5072	5072	static void install_c74_speedup(running_machine *machine)
5073	5073	{
5074		memory_install_readwrite16_handler(cpu_get_address_space(machine->cpu[3], ADDRESS_SPACE_PROGRAM), 0x80, 0x81, 0, 0, mcuc74_speedup_r, mcu_speedup_w);
	5074	memory_install_readwrite16_handler(cputag_get_address_space(machine, "mcu", ADDRESS_SPACE_PROGRAM), 0x80, 0x81, 0, 0, mcuc74_speedup_r, mcu_speedup_w);
5075	5075	}
5076	5076
5077	5077	static void install_130_speedup(running_machine *machine)
5078	5078	{
5079	5079	// install speedup cheat for 1.30 MCU BIOS
5080		memory_install_readwrite16_handler(cpu_get_address_space(machine->cpu[3], ADDRESS_SPACE_PROGRAM), 0x82, 0x83, 0, 0, mcu130_speedup_r, mcu_speedup_w);
	5080	memory_install_readwrite16_handler(cputag_get_address_space(machine, "mcu", ADDRESS_SPACE_PROGRAM), 0x82, 0x83, 0, 0, mcu130_speedup_r, mcu_speedup_w);
5081	5081	}
5082	5082
5083	5083	static void install_141_speedup(running_machine *machine)
5084	5084	{
5085	5085	// install speedup cheat for 1.41 MCU BIOS
5086		memory_install_readwrite16_handler(cpu_get_address_space(machine->cpu[3], ADDRESS_SPACE_PROGRAM), 0x82, 0x83, 0, 0, mcu141_speedup_r, mcu_speedup_w);
	5086	memory_install_readwrite16_handler(cputag_get_address_space(machine, "mcu", ADDRESS_SPACE_PROGRAM), 0x82, 0x83, 0, 0, mcu141_speedup_r, mcu_speedup_w);
5087	5087	}
5088	5088
5089		static void namcos22_init( enum namcos22_gametype game_type )
	5089	static void namcos22_init( running_machine *machine, enum namcos22_gametype game_type )
5090	5090	{
5091	5091	namcos22_gametype = game_type;
5092		mpPointRAM = auto_malloc(0x20000*sizeof(*mpPointRAM));
	5092	mpPointRAM = auto_alloc_array(machine, UINT32, 0x20000);
5093	5093	}
5094	5094
5095		static void namcos22s_init( enum namcos22_gametype game_type )
	5095	static void namcos22s_init( running_machine *machine, enum namcos22_gametype game_type )
5096	5096	{
5097		namcos22_init(game_type);
5098		mSpotRAM.RAM = auto_malloc(SPOTRAM_SIZE*2);
	5097	namcos22_init(machine, game_type);
	5098	mSpotRAM.RAM = auto_alloc_array(machine, UINT16, SPOTRAM_SIZE);
5099	5099	}
5100	5100
5101	5101	static DRIVER_INIT( alpiner )
5102	5102	{
5103		namcos22s_init(NAMCOS22_ALPINE_RACER);
	5103	namcos22s_init(machine, NAMCOS22_ALPINE_RACER);
5104	5104
5105		memory_install_read8_handler(cpu_get_address_space(machine->cpu[3], ADDRESS_SPACE_IO), M37710_ADC0_L, M37710_ADC7_H, 0, 0, alpineracer_mcu_adc_r);
	5105	memory_install_read8_handler(cputag_get_address_space(machine, "mcu", ADDRESS_SPACE_IO), M37710_ADC0_L, M37710_ADC7_H, 0, 0, alpineracer_mcu_adc_r);
5106	5106
5107	5107	install_130_speedup(machine);
5108	5108	}
5109	5109
5110	5110	static DRIVER_INIT( alpiner2 )
5111	5111	{
5112		namcos22s_init(NAMCOS22_ALPINE_RACER_2);
	5112	namcos22s_init(machine, NAMCOS22_ALPINE_RACER_2);
5113	5113
5114		memory_install_read8_handler(cpu_get_address_space(machine->cpu[3], ADDRESS_SPACE_IO), M37710_ADC0_L, M37710_ADC7_H, 0, 0, alpineracer_mcu_adc_r);
	5114	memory_install_read8_handler(cputag_get_address_space(machine, "mcu", ADDRESS_SPACE_IO), M37710_ADC0_L, M37710_ADC7_H, 0, 0, alpineracer_mcu_adc_r);
5115	5115
5116	5116	install_130_speedup(machine);
5117	5117	}
5118	5118
5119	5119	static DRIVER_INIT( alpinesa )
5120	5120	{
5121		namcos22s_init(NAMCOS22_ALPINE_SURFER);
	5121	namcos22s_init(machine, NAMCOS22_ALPINE_SURFER);
5122	5122
5123		memory_install_read8_handler(cpu_get_address_space(machine->cpu[3], ADDRESS_SPACE_IO), M37710_ADC0_L, M37710_ADC7_H, 0, 0, alpineracer_mcu_adc_r);
	5123	memory_install_read8_handler(cputag_get_address_space(machine, "mcu", ADDRESS_SPACE_IO), M37710_ADC0_L, M37710_ADC7_H, 0, 0, alpineracer_mcu_adc_r);
5124	5124
5125	5125	install_141_speedup(machine);
5126	5126	}
5127	5127
5128	5128	static DRIVER_INIT( airco22 )
5129	5129	{
5130		namcos22s_init(NAMCOS22_AIR_COMBAT22);
	5130	namcos22s_init(machine, NAMCOS22_AIR_COMBAT22);
5131	5131
5132		memory_install_read8_handler(cpu_get_address_space(machine->cpu[3], ADDRESS_SPACE_IO), M37710_ADC0_L, M37710_ADC7_H, 0, 0, airco22_mcu_adc_r);
	5132	memory_install_read8_handler(cputag_get_address_space(machine, "mcu", ADDRESS_SPACE_IO), M37710_ADC0_L, M37710_ADC7_H, 0, 0, airco22_mcu_adc_r);
5133	5133	}
5134	5134
5135	5135	static DRIVER_INIT( propcycl )
r4679	r4680
5151	5151	//   pROM[0x22296/4] &= 0xffff0000;
5152	5152	//   pROM[0x22296/4] |= 0x00004e75;
5153	5153
5154		namcos22s_init(NAMCOS22_PROP_CYCLE);
	5154	namcos22s_init(machine, NAMCOS22_PROP_CYCLE);
5155	5155
5156		memory_install_read8_handler(cpu_get_address_space(machine->cpu[3], ADDRESS_SPACE_IO), M37710_ADC0_L, M37710_ADC7_H, 0, 0, propcycle_mcu_adc_r);
	5156	memory_install_read8_handler(cputag_get_address_space(machine, "mcu", ADDRESS_SPACE_IO), M37710_ADC0_L, M37710_ADC7_H, 0, 0, propcycle_mcu_adc_r);
5157	5157
5158	5158	install_141_speedup(machine);
5159	5159	}
5160	5160
5161	5161	static DRIVER_INIT( ridgeraj )
5162	5162	{
5163		namcos22_init(NAMCOS22_RIDGE_RACER);
	5163	namcos22_init(machine, NAMCOS22_RIDGE_RACER);
5164	5164
5165	5165	install_c74_speedup(machine);
5166	5166
r4679	r4680
5170	5170
5171	5171	static DRIVER_INIT( ridger2j )
5172	5172	{
5173		namcos22_init(NAMCOS22_RIDGE_RACER2);
	5173	namcos22_init(machine, NAMCOS22_RIDGE_RACER2);
5174	5174
5175	5175	install_c74_speedup(machine);
5176	5176
r4679	r4680
5180	5180
5181	5181	static DRIVER_INIT( acedrvr )
5182	5182	{
5183		namcos22_init(NAMCOS22_ACE_DRIVER);
	5183	namcos22_init(machine, NAMCOS22_ACE_DRIVER);
5184	5184
5185	5185	install_c74_speedup(machine);
5186	5186
r4679	r4680
5190	5190
5191	5191	static DRIVER_INIT( victlap )
5192	5192	{
5193		namcos22_init(NAMCOS22_VICTORY_LAP);
	5193	namcos22_init(machine, NAMCOS22_VICTORY_LAP);
5194	5194
5195	5195	install_c74_speedup(machine);
5196	5196
r4679	r4680
5200	5200
5201	5201	static DRIVER_INIT( raveracw )
5202	5202	{
5203		namcos22_init(NAMCOS22_RAVE_RACER);
	5203	namcos22_init(machine, NAMCOS22_RAVE_RACER);
5204	5204
5205	5205	install_c74_speedup(machine);
5206	5206
r4679	r4680
5217	5217	pROM[0x18aec8/4] = 0x4e714e71;
5218	5218	pROM[0x18aefc/4] = 0x4e714e71;
5219	5219
5220		namcos22_init(NAMCOS22_CYBER_COMMANDO);
	5220	namcos22_init(machine, NAMCOS22_CYBER_COMMANDO);
5221	5221
5222	5222	install_c74_speedup(machine);
5223	5223
r4679	r4680
5232	5232	pROM[0x355C/4] &= 0x0000ffff;
5233	5233	pROM[0x355C/4] |= 0x4e710000;
5234	5234
5235		namcos22s_init(NAMCOS22_CYBER_CYCLES);
	5235	namcos22s_init(machine, NAMCOS22_CYBER_CYCLES);
5236	5236
5237		memory_install_read8_handler(cpu_get_address_space(machine->cpu[3], ADDRESS_SPACE_IO), M37710_ADC0_L, M37710_ADC7_H, 0, 0, cybrcycc_mcu_adc_r);
	5237	memory_install_read8_handler(cputag_get_address_space(machine, "mcu", ADDRESS_SPACE_IO), M37710_ADC0_L, M37710_ADC7_H, 0, 0, cybrcycc_mcu_adc_r);
5238	5238
5239	5239	install_130_speedup(machine);
5240	5240	}
5241	5241
5242	5242	static DRIVER_INIT( timecris )
5243	5243	{
5244		namcos22s_init(NAMCOS22_TIME_CRISIS);
	5244	namcos22s_init(machine, NAMCOS22_TIME_CRISIS);
5245	5245
5246	5246	// install_130_speedup(machine); // with speed up the SUBCPU START WAIT test fails
5247	5247	}

src/mame/drivers/flyball.c

r4679	r4680
31	31	int potsense = param;
32	32
33	33	if (potsense & ~flyball_potmask)
34		generic_pulse_irq_line(machine->cpu[0], 0);
	34	generic_pulse_irq_line(cputag_get_cpu(machine, "maincpu"), 0);
35	35
36	36	flyball_potsense |= potsense;
37	37	}
r4679	r4680
73	73
74	74	for (i = 0; i < 0x1000; i++)
75	75	rombase[i] = ROM[i ^ 0x1ff];
76		device_reset(machine->cpu[0]);
	76	device_reset(cputag_get_cpu(machine, "maincpu"));
77	77
78	78	timer_set(machine, video_screen_get_time_until_pos(machine->primary_screen, 0, 0), NULL, 0, flyball_quarter_callback);
79	79	}

src/mame/drivers/redclash.c

r4679	r4680
38	38	extern VIDEO_UPDATE( redclash );
39	39	extern VIDEO_EOF( redclash );
40	40
41		/*
42		This game doesn't have VBlank interrupts.
43		Interrupts are still used, but they are related to coin
44		slots. Left slot generates an IRQ, Right slot a NMI.
45		*/
46		static INTERRUPT_GEN( redclash_interrupt )
47		{
48		if (input_port_read(device->machine, "FAKE") & 1)   /* Left Coin */
49		cpu_set_input_line(device,0,ASSERT_LINE);
50		else if (input_port_read(device->machine, "FAKE") & 2)   /* Right Coin */
51		cpu_set_input_line(device, INPUT_LINE_NMI, PULSE_LINE);
52		}
53	41
	42
54	43	static WRITE8_HANDLER( irqack_w )
55	44	{
56		cpu_set_input_line(space->machine->cpu[0],0,CLEAR_LINE);
	45	cputag_set_input_line(space->machine, "maincpu", 0, CLEAR_LINE);
57	46	}
58	47
59	48
60
61		static ADDRESS_MAP_START( zero_readmem, ADDRESS_SPACE_PROGRAM, 8 )
62		AM_RANGE(0x0000, 0x2fff) AM_READ(SMH_ROM)
63		AM_RANGE(0x3000, 0x37ff) AM_READ(SMH_RAM)
	49	static ADDRESS_MAP_START( zerohour_map, ADDRESS_SPACE_PROGRAM, 8 )
	50	AM_RANGE(0x0000, 0x2fff) AM_ROM
	51	AM_RANGE(0x3000, 0x37ff) AM_RAM
	52	AM_RANGE(0x3800, 0x3bff) AM_RAM AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
	53	AM_RANGE(0x4000, 0x43ff) AM_RAM_WRITE(redclash_videoram_w) AM_BASE(&videoram)
64	54	AM_RANGE(0x4800, 0x4800) AM_READ_PORT("IN0")   /* IN0 */
65	55	AM_RANGE(0x4801, 0x4801) AM_READ_PORT("IN1")   /* IN1 */
66	56	AM_RANGE(0x4802, 0x4802) AM_READ_PORT("DSW1")   /* DSW0 */
67	57	AM_RANGE(0x4803, 0x4803) AM_READ_PORT("DSW2")   /* DSW1 */
68		AM_RANGE(0x4000, 0x43ff) AM_READ(SMH_RAM)      /* video RAM */
69		ADDRESS_MAP_END
70
71		static ADDRESS_MAP_START( zero_writemem, ADDRESS_SPACE_PROGRAM, 8 )
72		AM_RANGE(0x0000, 0x2fff) AM_WRITE(SMH_ROM)
73		AM_RANGE(0x3000, 0x37ff) AM_WRITE(SMH_RAM)
74		AM_RANGE(0x3800, 0x3bff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
75		AM_RANGE(0x4000, 0x43ff) AM_WRITE(redclash_videoram_w) AM_BASE(&videoram)
76	58	AM_RANGE(0x5000, 0x5007) AM_WRITENOP   /* to sound board */
77	59	AM_RANGE(0x5800, 0x5800) AM_WRITE(redclash_star0_w)
78	60	AM_RANGE(0x5801, 0x5804) AM_WRITENOP   /* to sound board */
r4679	r4680
83	65	AM_RANGE(0x7800, 0x7800) AM_WRITE(irqack_w)
84	66	ADDRESS_MAP_END
85	67
86		static ADDRESS_MAP_START( readmem, ADDRESS_SPACE_PROGRAM, 8 )
87		AM_RANGE(0x0000, 0x2fff) AM_READ(SMH_ROM)
	68	static ADDRESS_MAP_START( redclash_map, ADDRESS_SPACE_PROGRAM, 8 )
	69	AM_RANGE(0x0000, 0x2fff) AM_ROM
	70	//  AM_RANGE(0x3000, 0x3000) AM_WRITENOP
	71	//  AM_RANGE(0x3800, 0x3800) AM_WRITENOP
	72	AM_RANGE(0x4000, 0x43ff) AM_RAM_WRITE(redclash_videoram_w) AM_BASE(&videoram)
88	73	AM_RANGE(0x4800, 0x4800) AM_READ_PORT("IN0")   /* IN0 */
89	74	AM_RANGE(0x4801, 0x4801) AM_READ_PORT("IN1")   /* IN1 */
90	75	AM_RANGE(0x4802, 0x4802) AM_READ_PORT("DSW1")   /* DSW0 */
91	76	AM_RANGE(0x4803, 0x4803) AM_READ_PORT("DSW2")   /* DSW1 */
92		AM_RANGE(0x4000, 0x43ff) AM_READ(SMH_RAM)      /* video RAM */
93		AM_RANGE(0x6000, 0x67ff) AM_READ(SMH_RAM)
94		ADDRESS_MAP_END
95
96		static ADDRESS_MAP_START( writemem, ADDRESS_SPACE_PROGRAM, 8 )
97		AM_RANGE(0x0000, 0x2fff) AM_WRITE(SMH_ROM)
98		//  AM_RANGE(0x3000, 0x3000) AM_WRITENOP
99		//  AM_RANGE(0x3800, 0x3800) AM_WRITENOP
100		AM_RANGE(0x4000, 0x43ff) AM_WRITE(redclash_videoram_w) AM_BASE(&videoram)
101	77	AM_RANGE(0x5000, 0x5007) AM_WRITENOP   /* to sound board */
102	78	AM_RANGE(0x5800, 0x5800) AM_WRITE(redclash_star0_w)
103	79	AM_RANGE(0x5801, 0x5801) AM_WRITE(redclash_gfxbank_w)
104	80	AM_RANGE(0x5805, 0x5805) AM_WRITE(redclash_star1_w)
105	81	AM_RANGE(0x5806, 0x5806) AM_WRITE(redclash_star2_w)
106	82	AM_RANGE(0x5807, 0x5807) AM_WRITE(redclash_flipscreen_w)
107		AM_RANGE(0x6000, 0x67ff) AM_WRITE(SMH_RAM)
108		AM_RANGE(0x6800, 0x6bff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
	83	AM_RANGE(0x6000, 0x67ff) AM_RAM
	84	AM_RANGE(0x6800, 0x6bff) AM_RAM AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
109	85	AM_RANGE(0x7000, 0x7000) AM_WRITE(redclash_star_reset_w)
110	86	AM_RANGE(0x7800, 0x7800) AM_WRITE(irqack_w)
111	87	ADDRESS_MAP_END
112	88
	89	/*
	90	This game doesn't have VBlank interrupts.
	91	Interrupts are still used, but they are related to coin
	92	slots. Left slot generates an IRQ, Right slot a NMI.
	93	*/
	94	static INPUT_CHANGED( left_coin_inserted )
	95	{
	96	if(newval)
	97	cputag_set_input_line(field->port->machine, "maincpu", 0, ASSERT_LINE);
	98	}
113	99
	100	static INPUT_CHANGED( right_coin_inserted )
	101	{
	102	if(newval)
	103	cputag_set_input_line(field->port->machine, "maincpu", INPUT_LINE_NMI, PULSE_LINE);
	104	}
114	105
115	106	static INPUT_PORTS_START( redclash )
116	107	PORT_START("IN0")   /* IN0 */
r4679	r4680
201	192	/* handler to be notified of coin insertions. We use IMPULSE to */
202	193	/* trigger exactly one interrupt, without having to check when the */
203	194	/* user releases the key. */
204		PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_COIN1 ) PORT_IMPULSE(1)
205		PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_COIN2 ) PORT_IMPULSE(1)
	195	PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_COIN1 ) PORT_IMPULSE(1) PORT_CHANGED(left_coin_inserted, 0)
	196	PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_COIN2 ) PORT_IMPULSE(1) PORT_CHANGED(right_coin_inserted, 0)
206	197	INPUT_PORTS_END
207	198
208	199	static INPUT_PORTS_START( zerohour )
r4679	r4680
276	267	/* handler to be notified of coin insertions. We use IMPULSE to */
277	268	/* trigger exactly one interrupt, without having to check when the */
278	269	/* user releases the key. */
279		PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_COIN1 ) PORT_IMPULSE(1)
280		PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_COIN2 ) PORT_IMPULSE(1)
	270	PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_COIN1 ) PORT_IMPULSE(1) PORT_CHANGED(left_coin_inserted, 0)
	271	PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_COIN2 ) PORT_IMPULSE(1) PORT_CHANGED(right_coin_inserted, 0)
281	272	INPUT_PORTS_END
282	273
283	274	static const gfx_layout charlayout =
r4679	r4680
350	341
351	342	/* basic machine hardware */
352	343	MDRV_CPU_ADD("maincpu", Z80, 4000000)  /* 4 MHz */
353		MDRV_CPU_PROGRAM_MAP(zero_readmem,zero_writemem)
354		MDRV_CPU_VBLANK_INT("screen", redclash_interrupt)
	344	MDRV_CPU_PROGRAM_MAP(zerohour_map,0)
355	345
356	346	/* video hardware */
357	347	MDRV_SCREEN_ADD("screen", RASTER)
r4679	r4680
377	367
378	368	/* basic machine hardware */
379	369	MDRV_CPU_ADD("maincpu", Z80, 4000000)  /* 4 MHz */
380		MDRV_CPU_PROGRAM_MAP(readmem,writemem)
381		MDRV_CPU_VBLANK_INT("screen", redclash_interrupt)
	370	MDRV_CPU_PROGRAM_MAP(redclash_map,0)
382	371
383	372	/* video hardware */
384	373	MDRV_SCREEN_ADD("screen", RASTER)

src/mame/drivers/vicdual.c

r4679	r4680
97	97	coin_counter_w(0, 1);
98	98	coin_counter_w(0, 0);
99	99
100		cpu_set_input_line(field->port->machine->cpu[0], INPUT_LINE_RESET, PULSE_LINE);
	100	cputag_set_input_line(field->port->machine, "maincpu", INPUT_LINE_RESET, PULSE_LINE);
101	101
102	102	/* simulate the coin switch being closed for a while */
103	103	timer_set(field->port->machine, double_to_attotime(4 * attotime_to_double(video_screen_get_frame_period(field->port->machine->primary_screen))), NULL, 0, clear_coin_status);
r4679	r4680
362	362	static WRITE8_HANDLER( safari_io_w )
363	363	{
364	364	if (offset & 0x01)  assert_coin_status();
365		if (offset & 0x02) /* safari_audio_w(0, data) */;
	365	if (offset & 0x02) { /* safari_audio_w(0, data) */ }
366	366	}
367	367
368	368
r4679	r4680
567	567	{
568	568	if (offset & 0x01)  assert_coin_status();
569	569	if (offset & 0x02)  headon_audio_w(space, 0, data);
570		if (offset & 0x04) /* vicdual_palette_bank_w(0, data)  */;    /* not written to */
	570	if (offset & 0x04) { /* vicdual_palette_bank_w(0, data)  */ }    /* not written to */
571	571	}
572	572
573	573
r4679	r4680
759	759	if (offset & 0x01)  assert_coin_status();
760	760	if (offset & 0x02)  headon_audio_w(space, 0, data);
761	761	if (offset & 0x04)  vicdual_palette_bank_w(space, 0, data);
762		if (offset & 0x08)  ;/* schematics show this as going into a shifer circuit, but never written to */
763		if (offset & 0x10)  ;/* schematics show this as going to an edge connector, but never written to */
	762	if (offset & 0x08) { /* schematics show this as going into a shifer circuit, but never written to */ }
	763	if (offset & 0x10) { /* schematics show this as going to an edge connector, but never written to */ }
764	764	if (offset & 0x18)  logerror("********* Write to port %x\n", offset);
765	765	}
766	766
r4679	r4680
768	768	static WRITE8_HANDLER( digger_io_w )
769	769	{
770	770	if (offset & 0x01)  assert_coin_status();
771		if (offset & 0x02) /* digger_audio_1_w(0, data) */;
	771	if (offset & 0x02) { /* digger_audio_1_w(0, data) */ }
772	772	if (offset & 0x04)
773	773	{
774	774	vicdual_palette_bank_w(space, 0, data & 0x03);
775		/* digger_audio_2_w(0, data & 0xfc) */;
	775	/* digger_audio_2_w(0, data & 0xfc); */
776	776	}
777	777
778		if (offset & 0x08)  ;/* schematics show this as going into a shifer circuit, but never written to */
779		if (offset & 0x10)  ;/* schematics show this as going to an edge connector, but never written to */
	778	if (offset & 0x08) { /* schematics show this as going into a shifer circuit, but never written to */ }
	779	if (offset & 0x10) { /* schematics show this as going to an edge connector, but never written to */ }
780	780	if (offset & 0x18)  logerror("********* Write to port %x\n", offset);
781	781	}
782	782
r4679	r4680
972	972	static WRITE8_HANDLER( invds_io_w )
973	973	{
974	974	if (offset & 0x01)  invinco_audio_w(space, 0, data);
975		if (offset & 0x02) /* deepscan_audio_w(0, data) */;
	975	if (offset & 0x02) { /* deepscan_audio_w(0, data) */ }
976	976	if (offset & 0x08)  assert_coin_status();
977	977	if (offset & 0x40)  vicdual_palette_bank_w(space, 0, data);
978	978	}
r4679	r4680
981	981	static WRITE8_HANDLER( sspacaho_io_w )
982	982	{
983	983	if (offset & 0x01)  invho2_audio_w(space, 0, data);
984		if (offset & 0x02) /* sspaceatt_audio_w(space, 0, data) */;
	984	if (offset & 0x02) { /* sspaceatt_audio_w(space, 0, data) */ }
985	985	if (offset & 0x08)  assert_coin_status();
986	986	if (offset & 0x40)  vicdual_palette_bank_w(space, 0, data);
987	987	}
r4679	r4680
989	989
990	990	static WRITE8_HANDLER( tranqgun_io_w )
991	991	{
992		if (offset & 0x01) /* tranqgun_audio_w(space, 0, data) */;
	992	if (offset & 0x01) { /* tranqgun_audio_w(space, 0, data) */ }
993	993	if (offset & 0x02)  vicdual_palette_bank_w(space, 0, data);
994	994	if (offset & 0x08)  assert_coin_status();
995	995	}
r4679	r4680
997	997
998	998	static WRITE8_HANDLER( spacetrk_io_w )
999	999	{
1000		if (offset & 0x01)  /* spacetrk_audio_w(space, 0, data) */;
1001		if (offset & 0x02)  /* spacetrk_audio_w(space, 0, data) */;
	1000	if (offset & 0x01) { /* spacetrk_audio_w(space, 0, data) */ }
	1001	if (offset & 0x02) { /* spacetrk_audio_w(space, 0, data) */ }
1002	1002	if (offset & 0x08)  assert_coin_status();
1003	1003	if (offset & 0x40)  vicdual_palette_bank_w(space, 0, data);
1004	1004	}
r4679	r4680
1015	1015
1016	1016	static WRITE8_HANDLER( brdrline_io_w )
1017	1017	{
1018		if (offset & 0x01) /* brdrline_audio_w(space, 0, data) */;
	1018	if (offset & 0x01) { /* brdrline_audio_w(space, 0, data) */ }
1019	1019	if (offset & 0x02)  vicdual_palette_bank_w(space, 0, data);
1020	1020	if (offset & 0x08)  assert_coin_status();
1021	1021	}
r4679	r4680
1032	1032
1033	1033	static WRITE8_HANDLER( heiankyo_io_w )
1034	1034	{
1035		if (offset & 0x01) /* heiankyo_audio_1_w(0, data) */;
	1035	if (offset & 0x01) { /* heiankyo_audio_1_w(0, data) */ }
1036	1036
1037	1037	if (offset & 0x02)
1038	1038	{
1039	1039	vicdual_palette_bank_w(space, 0, data & 0x03);
1040		/* heiankyo_audio_2_w(0, data & 0xfc) */;
	1040	/* heiankyo_audio_2_w(0, data & 0xfc); */
1041	1041	}
1042	1042
1043	1043	if (offset & 0x08)  assert_coin_status();
r4679	r4680
1046	1046
1047	1047	static WRITE8_HANDLER( alphaho_io_w )
1048	1048	{
1049		if (offset & 0x01)  /* headon_audio_w(0, data) */;
1050		if (offset & 0x02)  /* alphaf_audio_w(0, data) */;
	1049	if (offset & 0x01) { /* headon_audio_w(0, data) */ }
	1050	if (offset & 0x02) { /* alphaf_audio_w(0, data) */ }
1051	1051	if (offset & 0x08)  assert_coin_status();
1052	1052	if (offset & 0x40)  vicdual_palette_bank_w(space, 0, data);
1053	1053	}
r4679	r4680
1989	1989
1990	1990	static WRITE8_HANDLER( samurai_io_w )
1991	1991	{
1992		if (offset & 0x02) /* samurai_audio_w(0, data) */;
	1992	if (offset & 0x02) { /* samurai_audio_w(0, data) */ }
1993	1993	if (offset & 0x08)  assert_coin_status();
1994	1994	if (offset & 0x40)  vicdual_palette_bank_w(space, 0, data);
1995	1995	}
r4679	r4680
2108	2108	static WRITE8_HANDLER( nsub_io_w )
2109	2109	{
2110	2110	if (offset & 0x01)  assert_coin_status();
2111		if (offset & 0x02) /* nsub_audio_w(0, data) */;
	2111	if (offset & 0x02) { /* nsub_audio_w(0, data) */ }
2112	2112	if (offset & 0x04)  vicdual_palette_bank_w(space, 0, data);
2113	2113	}
2114	2114

src/mame/drivers/xybots.c

r4679	r4680
33	33
34	34	static void update_interrupts(running_machine *machine)
35	35	{
36		cpu_set_input_line(machine->cpu[0], 1, atarigen_video_int_state ? ASSERT_LINE : CLEAR_LINE);
37		cpu_set_input_line(machine->cpu[0], 2, atarigen_sound_int_state ? ASSERT_LINE : CLEAR_LINE);
	36	cputag_set_input_line(machine, "maincpu", 1, atarigen_video_int_state ? ASSERT_LINE : CLEAR_LINE);
	37	cputag_set_input_line(machine, "maincpu", 2, atarigen_sound_int_state ? ASSERT_LINE : CLEAR_LINE);
38	38	}
39	39
40	40
r4679	r4680
384	384	static DRIVER_INIT( xybots )
385	385	{
386	386	atarigen_eeprom_default = NULL;
387		atarigen_slapstic_init(machine->cpu[0], 0x008000, 0, 107);
	387	atarigen_slapstic_init(cputag_get_cpu(machine, "maincpu"), 0x008000, 0, 107);
388	388	atarijsa_init(machine, "FFE200", 0x0100);
389	389	}
390	390

src/mame/drivers/galaxold.c

r4679	r4680
394	394	}
395	395
396	396
397		static ADDRESS_MAP_START( galaxold_readmem, ADDRESS_SPACE_PROGRAM, 8 )
398		AM_RANGE(0x0000, 0x3fff) AM_READ(SMH_ROM)
399		AM_RANGE(0x4000, 0x47ff) AM_READ(SMH_RAM)
400		AM_RANGE(0x5000, 0x53ff) AM_READ(SMH_RAM)
	397	static ADDRESS_MAP_START( galaxold_map, ADDRESS_SPACE_PROGRAM, 8 )
	398	AM_RANGE(0x0000, 0x3fff) AM_ROM
	399	AM_RANGE(0x4000, 0x47ff) AM_RAM
	400	AM_RANGE(0x5000, 0x53ff) AM_RAM_WRITE(galaxold_videoram_w) AM_BASE(&galaxold_videoram)
401	401	AM_RANGE(0x5400, 0x57ff) AM_READ(galaxold_videoram_r)
402		AM_RANGE(0x5800, 0x58ff) AM_READ(SMH_RAM)
	402	AM_RANGE(0x5800, 0x583f) AM_RAM_WRITE(galaxold_attributesram_w) AM_BASE(&galaxold_attributesram)
	403	AM_RANGE(0x5840, 0x585f) AM_RAM AM_BASE(&galaxold_spriteram) AM_SIZE(&galaxold_spriteram_size)
	404	AM_RANGE(0x5860, 0x587f) AM_RAM AM_BASE(&galaxold_bulletsram) AM_SIZE(&galaxold_bulletsram_size)
	405	AM_RANGE(0x5880, 0x58ff) AM_RAM
403	406	AM_RANGE(0x6000, 0x6000) AM_READ_PORT("IN0")
404		AM_RANGE(0x6800, 0x6800) AM_READ_PORT("IN1")
405		AM_RANGE(0x7000, 0x7000) AM_READ_PORT("IN2")
406		AM_RANGE(0x7800, 0x7fff) AM_READ(watchdog_reset_r)
407		AM_RANGE(0xfffc, 0xffff) AM_READ(SMH_RAM)
408		ADDRESS_MAP_END
409
410		static ADDRESS_MAP_START( galaxold_writemem, ADDRESS_SPACE_PROGRAM, 8 )
411		AM_RANGE(0x0000, 0x3fff) AM_WRITE(SMH_ROM)
412		AM_RANGE(0x4000, 0x47ff) AM_WRITE(SMH_RAM)
413		AM_RANGE(0x5000, 0x53ff) AM_WRITE(galaxold_videoram_w) AM_BASE(&galaxold_videoram)
414		AM_RANGE(0x5800, 0x583f) AM_WRITE(galaxold_attributesram_w) AM_BASE(&galaxold_attributesram)
415		AM_RANGE(0x5840, 0x585f) AM_WRITE(SMH_RAM) AM_BASE(&galaxold_spriteram) AM_SIZE(&galaxold_spriteram_size)
416		AM_RANGE(0x5860, 0x587f) AM_WRITE(SMH_RAM) AM_BASE(&galaxold_bulletsram) AM_SIZE(&galaxold_bulletsram_size)
417		AM_RANGE(0x5880, 0x58ff) AM_WRITE(SMH_RAM)
418	407	AM_RANGE(0x6000, 0x6001) AM_WRITE(galaxold_leds_w)
419	408	AM_RANGE(0x6002, 0x6002) AM_WRITE(galaxold_coin_lockout_w)
420	409	AM_RANGE(0x6003, 0x6003) AM_WRITE(galaxold_coin_counter_w)
421	410	AM_RANGE(0x6004, 0x6007) AM_WRITE(galaxian_lfo_freq_w)
	411	AM_RANGE(0x6800, 0x6800) AM_READ_PORT("IN1")
422	412	AM_RANGE(0x6800, 0x6802) AM_WRITE(galaxian_background_enable_w)
423	413	AM_RANGE(0x6803, 0x6803) AM_WRITE(galaxian_noise_enable_w)
424	414	AM_RANGE(0x6805, 0x6805) AM_WRITE(galaxian_shoot_enable_w)
425	415	AM_RANGE(0x6806, 0x6807) AM_WRITE(galaxian_vol_w)
	416	AM_RANGE(0x7000, 0x7000) AM_READ_PORT("IN2")
426	417	AM_RANGE(0x7001, 0x7001) AM_WRITE(galaxold_nmi_enable_w)
427	418	AM_RANGE(0x7004, 0x7004) AM_WRITE(galaxold_stars_enable_w)
428	419	AM_RANGE(0x7006, 0x7006) AM_WRITE(galaxold_flip_screen_x_w)
429	420	AM_RANGE(0x7007, 0x7007) AM_WRITE(galaxold_flip_screen_y_w)
	421	AM_RANGE(0x7800, 0x7fff) AM_READ(watchdog_reset_r)
430	422	AM_RANGE(0x7800, 0x7800) AM_WRITE(galaxian_pitch_w)
431		AM_RANGE(0xfffc, 0xffff) AM_WRITE(SMH_RAM)
	423	AM_RANGE(0xfffc, 0xffff) AM_RAM
432	424	ADDRESS_MAP_END
433	425
434	426
435		static ADDRESS_MAP_START( mooncrst_readmem, ADDRESS_SPACE_PROGRAM, 8 )
436		AM_RANGE(0x0000, 0x5fff) AM_READ(SMH_ROM)
437		AM_RANGE(0x8000, 0x87ff) AM_READ(SMH_RAM)
438		AM_RANGE(0x9000, 0x93ff) AM_READ(SMH_RAM)
	427	static ADDRESS_MAP_START( mooncrst_map, ADDRESS_SPACE_PROGRAM, 8 )
	428	AM_RANGE(0x0000, 0x5fff) AM_ROM
	429	AM_RANGE(0x8000, 0x87ff) AM_RAM
	430	AM_RANGE(0x9000, 0x93ff) AM_WRITE(galaxold_videoram_w) AM_BASE(&galaxold_videoram)
439	431	AM_RANGE(0x9400, 0x97ff) AM_READ(galaxold_videoram_r)
440		AM_RANGE(0x9800, 0x98ff) AM_READ(SMH_RAM)
	432	AM_RANGE(0x9800, 0x983f) AM_RAM_WRITE(galaxold_attributesram_w) AM_BASE(&galaxold_attributesram)
	433	AM_RANGE(0x9840, 0x985f) AM_RAM AM_BASE(&galaxold_spriteram) AM_SIZE(&galaxold_spriteram_size)
	434	AM_RANGE(0x9860, 0x987f) AM_RAM AM_BASE(&galaxold_bulletsram) AM_SIZE(&galaxold_bulletsram_size)
	435	AM_RANGE(0x9880, 0x98ff) AM_RAM
441	436	AM_RANGE(0xa000, 0xa000) AM_READ_PORT("IN0")
442		AM_RANGE(0xa800, 0xa800) AM_READ_PORT("IN1")
443		AM_RANGE(0xb000, 0xb000) AM_READ_PORT("DSW0")
444		AM_RANGE(0xb800, 0xb800) AM_READ(watchdog_reset_r)
445		ADDRESS_MAP_END
446
447		static ADDRESS_MAP_START( mooncrst_writemem, ADDRESS_SPACE_PROGRAM, 8 )
448		AM_RANGE(0x0000, 0x5fff) AM_WRITE(SMH_ROM)
449		AM_RANGE(0x8000, 0x87ff) AM_WRITE(SMH_RAM)
450		AM_RANGE(0x9000, 0x93ff) AM_WRITE(galaxold_videoram_w) AM_BASE(&galaxold_videoram)
451		AM_RANGE(0x9800, 0x983f) AM_WRITE(galaxold_attributesram_w) AM_BASE(&galaxold_attributesram)
452		AM_RANGE(0x9840, 0x985f) AM_WRITE(SMH_RAM) AM_BASE(&galaxold_spriteram) AM_SIZE(&galaxold_spriteram_size)
453		AM_RANGE(0x9860, 0x987f) AM_WRITE(SMH_RAM) AM_BASE(&galaxold_bulletsram) AM_SIZE(&galaxold_bulletsram_size)
454		AM_RANGE(0x9880, 0x98ff) AM_WRITE(SMH_RAM)
455	437	AM_RANGE(0xa003, 0xa003) AM_WRITE(galaxold_coin_counter_w)
456	438	AM_RANGE(0xa004, 0xa007) AM_WRITE(galaxian_lfo_freq_w)
	439	AM_RANGE(0xa800, 0xa800) AM_READ_PORT("IN1")
457	440	AM_RANGE(0xa800, 0xa802) AM_WRITE(galaxian_background_enable_w)
458	441	AM_RANGE(0xa803, 0xa803) AM_WRITE(galaxian_noise_enable_w)
459	442	AM_RANGE(0xa805, 0xa805) AM_WRITE(galaxian_shoot_enable_w)
460	443	AM_RANGE(0xa806, 0xa807) AM_WRITE(galaxian_vol_w)
461		AM_RANGE(0xb000, 0xb000) AM_WRITE(galaxold_nmi_enable_w)
	444	AM_RANGE(0xb000, 0xb000) AM_READ_PORT("DSW0") AM_WRITE(galaxold_nmi_enable_w)
462	445	AM_RANGE(0xb004, 0xb004) AM_WRITE(galaxold_stars_enable_w)
463	446	AM_RANGE(0xb006, 0xb006) AM_WRITE(galaxold_flip_screen_x_w)
464	447	AM_RANGE(0xb007, 0xb007) AM_WRITE(galaxold_flip_screen_y_w)
465		AM_RANGE(0xb800, 0xb800) AM_WRITE(galaxian_pitch_w)
	448	AM_RANGE(0xb800, 0xb800) AM_READWRITE(watchdog_reset_r, galaxian_pitch_w)
466	449	ADDRESS_MAP_END
467	450
468		static ADDRESS_MAP_START( rockclim_readmem, ADDRESS_SPACE_PROGRAM, 8 )
469		AM_RANGE(0x0000, 0x3fff) AM_READ(SMH_ROM)
470		AM_RANGE(0x4000, 0x47ff) AM_READ(rockclim_videoram_r)
471		AM_RANGE(0x5000, 0x53ff) AM_READ(SMH_RAM)
472		AM_RANGE(0x6000, 0x7fff) AM_READ(SMH_ROM)
473		AM_RANGE(0x8000, 0x87ff) AM_READ(SMH_RAM)
	451	static ADDRESS_MAP_START( rockclim_map, ADDRESS_SPACE_PROGRAM, 8 )
	452	AM_RANGE(0x0000, 0x3fff) AM_ROM
	453	AM_RANGE(0x4000, 0x47ff) AM_READWRITE(rockclim_videoram_r, rockclim_videoram_w) AM_BASE(&rockclim_videoram)//4800 - 4803 = bg scroll ?
	454	AM_RANGE(0x4800, 0x4803) AM_WRITE(rockclim_scroll_w)
	455	AM_RANGE(0x5000, 0x53ff) AM_RAM //?
	456	AM_RANGE(0x6000, 0x7fff) AM_ROM
	457	AM_RANGE(0x8000, 0x87ff) AM_RAM
474	458	AM_RANGE(0x8800, 0x8800) AM_READ_PORT("DSW1")
475		AM_RANGE(0x9000, 0x93ff) AM_READ(SMH_RAM)
	459	AM_RANGE(0x9000, 0x93ff) AM_RAM_WRITE(galaxold_videoram_w) AM_BASE(&galaxold_videoram)
476	460	AM_RANGE(0x9400, 0x97ff) AM_READ(galaxold_videoram_r)
477		AM_RANGE(0x9800, 0x98ff) AM_READ(SMH_RAM)
	461	AM_RANGE(0x9800, 0x983f) AM_RAM_WRITE(galaxold_attributesram_w) AM_BASE(&galaxold_attributesram)
	462	AM_RANGE(0x9840, 0x985f) AM_RAM AM_BASE(&galaxold_spriteram) AM_SIZE(&galaxold_spriteram_size)
	463	AM_RANGE(0x9860, 0x987f) AM_RAM AM_BASE(&galaxold_bulletsram) AM_SIZE(&galaxold_bulletsram_size)
	464	AM_RANGE(0x9880, 0x98ff) AM_RAM
478	465	AM_RANGE(0xa000, 0xa000) AM_READ_PORT("IN0")
479		AM_RANGE(0xa800, 0xa800) AM_READ_PORT("IN1")
480		AM_RANGE(0xb000, 0xb000) AM_READ_PORT("DSW0")
481		AM_RANGE(0xb800, 0xb800) AM_READ(watchdog_reset_r)
482		ADDRESS_MAP_END
483
484		static ADDRESS_MAP_START( rockclim_writemem, ADDRESS_SPACE_PROGRAM, 8 )
485		AM_RANGE(0x0000, 0x3fff) AM_WRITE(SMH_ROM)
486		AM_RANGE(0x4000, 0x47ff) AM_WRITE(rockclim_videoram_w) AM_BASE(&rockclim_videoram)//4800 - 4803 = bg scroll ?
487		AM_RANGE(0x4800, 0x4803) AM_WRITE(rockclim_scroll_w)
488		AM_RANGE(0x5000, 0x53ff) AM_WRITE(SMH_RAM)//?
489		AM_RANGE(0x6000, 0x7fff) AM_WRITE(SMH_ROM)
490		AM_RANGE(0x8000, 0x87ff) AM_WRITE(SMH_RAM)
491		AM_RANGE(0x9000, 0x93ff) AM_WRITE(galaxold_videoram_w) AM_BASE(&galaxold_videoram)
492		AM_RANGE(0x9800, 0x983f) AM_WRITE(galaxold_attributesram_w) AM_BASE(&galaxold_attributesram)
493		AM_RANGE(0x9840, 0x985f) AM_WRITE(SMH_RAM) AM_BASE(&galaxold_spriteram) AM_SIZE(&galaxold_spriteram_size)
494		AM_RANGE(0x9860, 0x987f) AM_WRITE(SMH_RAM) AM_BASE(&galaxold_bulletsram) AM_SIZE(&galaxold_bulletsram_size)
495		AM_RANGE(0x9880, 0x98ff) AM_WRITE(SMH_RAM)
496	466	AM_RANGE(0xa000, 0xa002) AM_WRITE(galaxold_gfxbank_w)// a002 - sprite bank
497	467	AM_RANGE(0xa003, 0xa003) AM_WRITE(galaxold_coin_counter_w)
498	468	AM_RANGE(0xa004, 0xa007) AM_WRITE(galaxian_lfo_freq_w)
	469	AM_RANGE(0xa800, 0xa800) AM_READ_PORT("IN1")
499	470	AM_RANGE(0xa800, 0xa802) AM_WRITE(galaxian_background_enable_w)
500	471	AM_RANGE(0xa803, 0xa803) AM_WRITE(galaxian_noise_enable_w)
501	472	AM_RANGE(0xa805, 0xa805) AM_WRITE(galaxian_shoot_enable_w)
502	473	AM_RANGE(0xa806, 0xa807) AM_WRITE(galaxian_vol_w)
503		AM_RANGE(0xb000, 0xb000) AM_WRITE(galaxold_nmi_enable_w)
	474	AM_RANGE(0xb000, 0xb000) AM_READ_PORT("DSW0") AM_WRITE(galaxold_nmi_enable_w)
504	475	AM_RANGE(0xb006, 0xb006) AM_WRITE(galaxold_flip_screen_x_w)
505	476	AM_RANGE(0xb007, 0xb007) AM_WRITE(galaxold_flip_screen_y_w)
506		AM_RANGE(0xb800, 0xb800) AM_WRITE(galaxian_pitch_w)
	477	AM_RANGE(0xb800, 0xb800) AM_READWRITE(watchdog_reset_r, galaxian_pitch_w)
507	478	ADDRESS_MAP_END
508	479
509
510		static ADDRESS_MAP_START( scramblb_readmem, ADDRESS_SPACE_PROGRAM, 8 )
511		AM_RANGE(0x0000, 0x3fff) AM_READ(SMH_ROM)
512		AM_RANGE(0x4000, 0x4bff) AM_READ(SMH_RAM)
513		AM_RANGE(0x5000, 0x50ff) AM_READ(SMH_RAM)
	480	static ADDRESS_MAP_START( scramblb_map, ADDRESS_SPACE_PROGRAM, 8 )
	481	AM_RANGE(0x0000, 0x3fff) AM_ROM
	482	AM_RANGE(0x4000, 0x47ff) AM_RAM
	483	AM_RANGE(0x4800, 0x4bff) AM_RAM_WRITE(galaxold_videoram_w) AM_BASE(&galaxold_videoram)
	484	AM_RANGE(0x5000, 0x503f) AM_RAM_WRITE(galaxold_attributesram_w) AM_BASE(&galaxold_attributesram)
	485	AM_RANGE(0x5040, 0x505f) AM_RAM AM_BASE(&galaxold_spriteram) AM_SIZE(&galaxold_spriteram_size)
	486	AM_RANGE(0x5060, 0x507f) AM_RAM AM_BASE(&galaxold_bulletsram) AM_SIZE(&galaxold_bulletsram_size)
	487	AM_RANGE(0x5080, 0x50ff) AM_RAM
514	488	AM_RANGE(0x6000, 0x6000) AM_READ_PORT("IN0")
515		AM_RANGE(0x6800, 0x6800) AM_READ_PORT("IN1")
516		AM_RANGE(0x7000, 0x7000) AM_READ_PORT("IN2")
517		AM_RANGE(0x7800, 0x7800) AM_READ(watchdog_reset_r)
518		AM_RANGE(0x8102, 0x8102) AM_READ(scramblb_protection_1_r)
519		AM_RANGE(0x8202, 0x8202) AM_READ(scramblb_protection_2_r)
520		ADDRESS_MAP_END
521
522		static ADDRESS_MAP_START( scramblb_writemem, ADDRESS_SPACE_PROGRAM, 8 )
523		AM_RANGE(0x0000, 0x3fff) AM_WRITE(SMH_ROM)
524		AM_RANGE(0x4000, 0x47ff) AM_WRITE(SMH_RAM)
525		AM_RANGE(0x4800, 0x4bff) AM_WRITE(galaxold_videoram_w) AM_BASE(&galaxold_videoram)
526		AM_RANGE(0x5000, 0x503f) AM_WRITE(galaxold_attributesram_w) AM_BASE(&galaxold_attributesram)
527		AM_RANGE(0x5040, 0x505f) AM_WRITE(SMH_RAM) AM_BASE(&galaxold_spriteram) AM_SIZE(&galaxold_spriteram_size)
528		AM_RANGE(0x5060, 0x507f) AM_WRITE(SMH_RAM) AM_BASE(&galaxold_bulletsram) AM_SIZE(&galaxold_bulletsram_size)
529		AM_RANGE(0x5080, 0x50ff) AM_WRITE(SMH_RAM)
530	489	AM_RANGE(0x6000, 0x6001) AM_WRITENOP  /* sound triggers */
531	490	AM_RANGE(0x6003, 0x6003) AM_WRITE(galaxold_coin_counter_w)
532	491	AM_RANGE(0x6004, 0x6007) AM_WRITE(galaxian_lfo_freq_w)
	492	AM_RANGE(0x6800, 0x6800) AM_READ_PORT("IN1")
533	493	AM_RANGE(0x6800, 0x6802) AM_WRITE(galaxian_background_enable_w)
534	494	AM_RANGE(0x6803, 0x6803) AM_WRITE(galaxian_noise_enable_w)
535	495	AM_RANGE(0x6805, 0x6805) AM_WRITE(galaxian_shoot_enable_w)
536	496	AM_RANGE(0x6806, 0x6807) AM_WRITE(galaxian_vol_w)
	497	AM_RANGE(0x7000, 0x7000) AM_READ_PORT("IN2")
537	498	AM_RANGE(0x7001, 0x7001) AM_WRITE(galaxold_nmi_enable_w)
538	499	AM_RANGE(0x7002, 0x7002) AM_WRITE(galaxold_coin_counter_w)
539	500	AM_RANGE(0x7003, 0x7003) AM_WRITE(scrambold_background_enable_w)
540	501	AM_RANGE(0x7004, 0x7004) AM_WRITE(galaxold_stars_enable_w)
541	502	AM_RANGE(0x7006, 0x7006) AM_WRITE(galaxold_flip_screen_x_w)
542	503	AM_RANGE(0x7007, 0x7007) AM_WRITE(galaxold_flip_screen_y_w)
543		AM_RANGE(0x7800, 0x7800) AM_WRITE(galaxian_pitch_w)
	504	AM_RANGE(0x7800, 0x7800) AM_READWRITE(watchdog_reset_r, galaxian_pitch_w)
	505	AM_RANGE(0x8102, 0x8102) AM_READ(scramblb_protection_1_r)
	506	AM_RANGE(0x8202, 0x8202) AM_READ(scramblb_protection_2_r)
544	507	ADDRESS_MAP_END
545	508
546	509
r4679	r4680
550	513	static READ8_HANDLER( scramb2_port1_r ) { return (input_port_read(space->machine, "IN1") >> offset) & 0x1; }
551	514	static READ8_HANDLER( scramb2_port2_r ) { return (input_port_read(space->machine, "IN2") >> offset) & 0x1; }
552	515
553		static ADDRESS_MAP_START( scramb2_readmem, ADDRESS_SPACE_PROGRAM, 8 )
554		AM_RANGE(0x0000, 0x3fff) AM_READ(SMH_ROM)
555		AM_RANGE(0x4000, 0x4bff) AM_READ(SMH_RAM)
556		AM_RANGE(0x5000, 0x50ff) AM_READ(SMH_RAM)
	516	static ADDRESS_MAP_START( scramb2_map, ADDRESS_SPACE_PROGRAM, 8 )
	517	AM_RANGE(0x0000, 0x3fff) AM_ROM
	518	AM_RANGE(0x4000, 0x47ff) AM_RAM
	519	AM_RANGE(0x4800, 0x4bff) AM_RAM_WRITE(galaxold_videoram_w) AM_BASE(&galaxold_videoram)
	520	AM_RANGE(0x4c00, 0x4fff) AM_WRITE(galaxold_videoram_w) // mirror
	521	AM_RANGE(0x5000, 0x503f) AM_RAM_WRITE(galaxold_attributesram_w) AM_BASE(&galaxold_attributesram)
	522	AM_RANGE(0x5040, 0x505f) AM_RAM AM_BASE(&galaxold_spriteram) AM_SIZE(&galaxold_spriteram_size)
	523	AM_RANGE(0x5060, 0x507f) AM_RAM AM_BASE(&galaxold_bulletsram) AM_SIZE(&galaxold_bulletsram_size)
	524	AM_RANGE(0x5080, 0x50ff) AM_RAM
557	525	AM_RANGE(0x5800, 0x5fff) AM_READ(scramb2_protection_r) // must return 0x25
558	526	AM_RANGE(0x6000, 0x6007) AM_READ(scramb2_port0_r) // reads from 8 addresses, 1 bit per address
559	527	AM_RANGE(0x6800, 0x6807) AM_READ(scramb2_port1_r) // reads from 8 addresses, 1 bit per address
560		AM_RANGE(0x7000, 0x7007) AM_READ(watchdog_reset_r)
561		AM_RANGE(0x7800, 0x7807) AM_READ(scramb2_port2_r) // reads from 8 addresses, 1 bit per address
562		ADDRESS_MAP_END
563
564		static ADDRESS_MAP_START( scramb2_writemem, ADDRESS_SPACE_PROGRAM, 8 )
565		AM_RANGE(0x0000, 0x3fff) AM_WRITE(SMH_ROM)
566		AM_RANGE(0x4000, 0x47ff) AM_WRITE(SMH_RAM)
567		AM_RANGE(0x4800, 0x4bff) AM_WRITE(galaxold_videoram_w) AM_BASE(&galaxold_videoram)
568		AM_RANGE(0x4c00, 0x4fff) AM_WRITE(galaxold_videoram_w) // mirror
569		AM_RANGE(0x5000, 0x503f) AM_WRITE(galaxold_attributesram_w) AM_BASE(&galaxold_attributesram)
570		AM_RANGE(0x5040, 0x505f) AM_WRITE(SMH_RAM) AM_BASE(&galaxold_spriteram) AM_SIZE(&galaxold_spriteram_size)
571		AM_RANGE(0x5060, 0x507f) AM_WRITE(SMH_RAM) AM_BASE(&galaxold_bulletsram) AM_SIZE(&galaxold_bulletsram_size)
572		AM_RANGE(0x5080, 0x50ff) AM_WRITE(SMH_RAM)
573	528	AM_RANGE(0x6801, 0x6801) AM_WRITE(galaxold_nmi_enable_w)
574	529	AM_RANGE(0x6802, 0x6802) AM_WRITE(galaxold_coin_counter_w)
575	530	AM_RANGE(0x6804, 0x6804) AM_WRITE(galaxold_stars_enable_w)
576	531	AM_RANGE(0x6806, 0x6806) AM_WRITE(galaxold_flip_screen_x_w)
577	532	AM_RANGE(0x6807, 0x6807) AM_WRITE(galaxold_flip_screen_y_w)
	533	AM_RANGE(0x7000, 0x7007) AM_READ(watchdog_reset_r)
578	534	AM_RANGE(0x7006, 0x7006) AM_WRITENOP
579	535	AM_RANGE(0x7007, 0x7007) AM_WRITENOP
	536	AM_RANGE(0x7800, 0x7807) AM_READ(scramb2_port2_r) // reads from 8 addresses, 1 bit per address
580	537	AM_RANGE(0x7800, 0x7800) AM_WRITE(galaxian_pitch_w)
581	538	ADDRESS_MAP_END
582	539
583	540
584	541
585		static ADDRESS_MAP_START( _4in1_readmem, ADDRESS_SPACE_PROGRAM, 8 )
586		AM_RANGE(0x0000, 0x3fff) AM_READ(SMH_BANK1)   /* banked game code */
587		AM_RANGE(0x4000, 0x47ff) AM_READ(SMH_RAM)
588		AM_RANGE(0x5000, 0x53ff) AM_READ(SMH_RAM)
	542	static ADDRESS_MAP_START( _4in1_map, ADDRESS_SPACE_PROGRAM, 8 )
	543	AM_RANGE(0x0000, 0x3fff) AM_ROMBANK(1)   /* banked game code */
	544	AM_RANGE(0x4000, 0x47ff) AM_RAM
	545	AM_RANGE(0x5000, 0x53ff) AM_RAM_WRITE(galaxold_videoram_w) AM_BASE(&galaxold_videoram)
589	546	AM_RANGE(0x5400, 0x57ff) AM_READ(galaxold_videoram_r)
590		AM_RANGE(0x5800, 0x58ff) AM_READ(SMH_RAM)
	547	AM_RANGE(0x5800, 0x583f) AM_RAM_WRITE(galaxold_attributesram_w) AM_BASE(&galaxold_attributesram)
	548	AM_RANGE(0x5840, 0x585f) AM_RAM AM_BASE(&galaxold_spriteram) AM_SIZE(&galaxold_spriteram_size)
	549	AM_RANGE(0x5860, 0x587f) AM_RAM AM_BASE(&galaxold_bulletsram) AM_SIZE(&galaxold_bulletsram_size)
	550	AM_RANGE(0x5880, 0x58ff) AM_RAM
591	551	AM_RANGE(0x6000, 0x6000) AM_READ_PORT("IN0")
592		AM_RANGE(0x6800, 0x6800) AM_READ_PORT("IN1")
593		AM_RANGE(0x7000, 0x7000) AM_READ_PORT("DSW0")
594		AM_RANGE(0x7800, 0x78ff) AM_READ(watchdog_reset_r)
595		AM_RANGE(0xc000, 0xdfff) AM_READ(SMH_ROM)   /* fixed menu code */
596		ADDRESS_MAP_END
597
598		static ADDRESS_MAP_START( _4in1_writemem, ADDRESS_SPACE_PROGRAM, 8 )
599		AM_RANGE(0x0000, 0x3fff) AM_WRITE(SMH_ROM)   /* banked game code */
600		AM_RANGE(0x4000, 0x47ff) AM_WRITE(SMH_RAM)
601		AM_RANGE(0x5000, 0x53ff) AM_WRITE(galaxold_videoram_w) AM_BASE(&galaxold_videoram)
602		AM_RANGE(0x5800, 0x583f) AM_WRITE(galaxold_attributesram_w) AM_BASE(&galaxold_attributesram)
603		AM_RANGE(0x5840, 0x585f) AM_WRITE(SMH_RAM) AM_BASE(&galaxold_spriteram) AM_SIZE(&galaxold_spriteram_size)
604		AM_RANGE(0x5860, 0x587f) AM_WRITE(SMH_RAM) AM_BASE(&galaxold_bulletsram) AM_SIZE(&galaxold_bulletsram_size)
605		AM_RANGE(0x5880, 0x58ff) AM_WRITE(SMH_RAM)
606	552	AM_RANGE(0x6000, 0x6001) AM_WRITE(galaxold_leds_w)
607	553	//  AM_RANGE(0x6002, 0x6002) AM_WRITE(galaxold_coin_lockout_w)
608	554	AM_RANGE(0x6003, 0x6003) AM_WRITE(galaxold_coin_counter_w)
609	555	AM_RANGE(0x6004, 0x6007) AM_WRITE(galaxian_lfo_freq_w)
	556	AM_RANGE(0x6800, 0x6800) AM_READ_PORT("IN1")
610	557	AM_RANGE(0x6800, 0x6802) AM_WRITE(galaxian_background_enable_w)
611	558	//  AM_RANGE(0x6803, 0x6803) AM_WRITE(galaxian_noise_enable_w) /* not hooked up? */
612	559	AM_RANGE(0x6805, 0x6805) AM_WRITE(galaxian_shoot_enable_w)
613	560	AM_RANGE(0x6806, 0x6807) AM_WRITE(galaxian_vol_w)
	561	AM_RANGE(0x7000, 0x7000) AM_READ_PORT("DSW0")
614	562	AM_RANGE(0x7001, 0x7001) AM_WRITE(galaxold_nmi_enable_w)
615	563	AM_RANGE(0x7004, 0x7004) AM_WRITE(galaxold_stars_enable_w)
616	564	AM_RANGE(0x7006, 0x7006) AM_WRITE(galaxold_flip_screen_x_w)
617	565	AM_RANGE(0x7007, 0x7007) AM_WRITE(galaxold_flip_screen_y_w)
618		AM_RANGE(0x7800, 0x7800) AM_WRITE(galaxian_pitch_w)
	566	AM_RANGE(0x7800, 0x78ff) AM_READWRITE(watchdog_reset_r, galaxian_pitch_w)
619	567	AM_RANGE(0x8000, 0x8000) AM_WRITE(_4in1_bank_w)
620		AM_RANGE(0xc000, 0xdfff) AM_WRITE(SMH_ROM) /* Fixed Menu Code */
	568	AM_RANGE(0xc000, 0xdfff) AM_ROM      /* fixed menu code */
621	569	ADDRESS_MAP_END
622	570
623	571
624		static ADDRESS_MAP_START( bagmanmc_readmem, ADDRESS_SPACE_PROGRAM, 8 )
625		AM_RANGE(0x0000, 0x5fff) AM_READ(SMH_ROM)
626		AM_RANGE(0x6000, 0x67ff) AM_READ(SMH_RAM)
627		AM_RANGE(0x9000, 0x93ff) AM_READ(SMH_RAM)
	572	static ADDRESS_MAP_START( bagmanmc_map, ADDRESS_SPACE_PROGRAM, 8 )
	573	AM_RANGE(0x0000, 0x5fff) AM_ROM
	574	AM_RANGE(0x6000, 0x67ff) AM_RAM
	575	AM_RANGE(0x9000, 0x93ff) AM_RAM_WRITE(galaxold_videoram_w) AM_BASE(&galaxold_videoram)
628	576	AM_RANGE(0x9400, 0x97ff) AM_READ(galaxold_videoram_r)
629		AM_RANGE(0x9800, 0x98ff) AM_READ(SMH_RAM)
	577	AM_RANGE(0x9800, 0x983f) AM_RAM_WRITE(galaxold_attributesram_w) AM_BASE(&galaxold_attributesram)
	578	AM_RANGE(0x9840, 0x985f) AM_RAM AM_BASE(&galaxold_spriteram) AM_SIZE(&galaxold_spriteram_size)
	579	AM_RANGE(0x9860, 0x987f) AM_RAM AM_BASE(&galaxold_bulletsram) AM_SIZE(&galaxold_bulletsram_size)
	580	AM_RANGE(0x9880, 0x98ff) AM_RAM
630	581	AM_RANGE(0xa000, 0xa000) AM_READ_PORT("IN0")
631		AM_RANGE(0xa800, 0xa800) AM_READ_PORT("IN1")
632		AM_RANGE(0xb000, 0xb000) AM_READ_PORT("DSW")
633		AM_RANGE(0xb800, 0xb800) AM_READ(watchdog_reset_r)
634		ADDRESS_MAP_END
635
636		static ADDRESS_MAP_START( bagmanmc_writemem, ADDRESS_SPACE_PROGRAM, 8 )
637		AM_RANGE(0x0000, 0x5fff) AM_WRITE(SMH_ROM)
638		AM_RANGE(0x6000, 0x67ff) AM_WRITE(SMH_RAM)
639		AM_RANGE(0x9000, 0x93ff) AM_WRITE(galaxold_videoram_w) AM_BASE(&galaxold_videoram)
640		AM_RANGE(0x9800, 0x983f) AM_WRITE(galaxold_attributesram_w) AM_BASE(&galaxold_attributesram)
641		AM_RANGE(0x9840, 0x985f) AM_WRITE(SMH_RAM) AM_BASE(&galaxold_spriteram) AM_SIZE(&galaxold_spriteram_size)
642		AM_RANGE(0x9860, 0x987f) AM_WRITE(SMH_RAM) AM_BASE(&galaxold_bulletsram) AM_SIZE(&galaxold_bulletsram_size)
643		AM_RANGE(0x9880, 0x98ff) AM_WRITE(SMH_RAM)
644	582	AM_RANGE(0xa003, 0xa003) AM_WRITE(galaxold_coin_counter_w)
	583	AM_RANGE(0xa800, 0xa800) AM_READ_PORT("IN1")
645	584	AM_RANGE(0xa803, 0xa803) AM_WRITE(galaxian_noise_enable_w)
	585	AM_RANGE(0xb000, 0xb000) AM_READ_PORT("DSW")
646	586	AM_RANGE(0xb001, 0xb001) AM_WRITE(galaxold_nmi_enable_w)
647	587	AM_RANGE(0xb006, 0xb006) AM_WRITE(galaxold_flip_screen_x_w)
648	588	AM_RANGE(0xb007, 0xb007) AM_WRITE(galaxold_flip_screen_y_w)
649		AM_RANGE(0xb800, 0xb800) AM_WRITE(galaxian_pitch_w)
	589	AM_RANGE(0xb800, 0xb800) AM_READWRITE(watchdog_reset_r, galaxian_pitch_w)
650	590	ADDRESS_MAP_END
651	591
652		static ADDRESS_MAP_START( dkongjrm_readmem, ADDRESS_SPACE_PROGRAM, 8 )
653		AM_RANGE(0x0000, 0x5fff) AM_READ(SMH_ROM)
654		AM_RANGE(0x6000, 0x6fff) AM_READ(SMH_RAM)
655		AM_RANGE(0x7000, 0x7fff) AM_READ(SMH_ROM)
656		AM_RANGE(0x9000, 0x93ff) AM_READ(SMH_RAM)
657		AM_RANGE(0xa000, 0xa0ff) AM_READ_PORT("IN0")
658		AM_RANGE(0xa800, 0xa8ff) AM_READ_PORT("IN1")
659		AM_RANGE(0xb000, 0xb0ff) AM_READ_PORT("IN2")
660		AM_RANGE(0xb800, 0xb800) AM_READ(watchdog_reset_r)
661		ADDRESS_MAP_END
662
663		static ADDRESS_MAP_START( dkongjrm_writemem, ADDRESS_SPACE_PROGRAM, 8 )
664		AM_RANGE(0x0000, 0x5fff) AM_WRITE(SMH_ROM)
665		AM_RANGE(0x6000, 0x6fff) AM_WRITE(SMH_RAM)
666		AM_RANGE(0x7000, 0x7fff) AM_WRITE(SMH_ROM)
667		AM_RANGE(0x9000, 0x93ff) AM_WRITE(galaxold_videoram_w) AM_BASE(&galaxold_videoram)
	592	static ADDRESS_MAP_START( dkongjrm_map, ADDRESS_SPACE_PROGRAM, 8 )
	593	AM_RANGE(0x0000, 0x5fff) AM_ROM
	594	AM_RANGE(0x6000, 0x6fff) AM_RAM
	595	AM_RANGE(0x7000, 0x7fff) AM_ROM
	596	AM_RANGE(0x9000, 0x93ff) AM_RAM_WRITE(galaxold_videoram_w) AM_BASE(&galaxold_videoram)
668	597	AM_RANGE(0x9800, 0x983f) AM_WRITE(galaxold_attributesram_w) AM_BASE(&galaxold_attributesram)
669	598	AM_RANGE(0x9840, 0x987f) AM_WRITE(SMH_RAM) AM_BASE(&galaxold_spriteram) AM_SIZE(&galaxold_spriteram_size)
670	599	AM_RANGE(0x98c0, 0x98ff) AM_WRITE(SMH_RAM) AM_BASE(&galaxold_spriteram2) AM_SIZE(&galaxold_spriteram2_size)
	600	AM_RANGE(0xa000, 0xa0ff) AM_READ_PORT("IN0")
671	601	AM_RANGE(0xa003, 0xa003) AM_WRITE(galaxold_coin_counter_w)
672	602	//AM_RANGE(0xa004, 0xa007) AM_WRITE(galaxian_lfo_freq_w)
	603	AM_RANGE(0xa800, 0xa8ff) AM_READ_PORT("IN1")
673	604	AM_RANGE(0xa800, 0xa802) AM_WRITE(galaxian_background_enable_w)
674	605	AM_RANGE(0xa803, 0xa803) AM_WRITE(galaxian_noise_enable_w)
675	606	//AM_RANGE(0xa805, 0xa805) AM_WRITE(galaxian)
676	607	AM_RANGE(0xa806, 0xa807) AM_WRITE(galaxian_vol_w)
	608	AM_RANGE(0xb000, 0xb0ff) AM_READ_PORT("IN2")
677	609	AM_RANGE(0xb000, 0xb000) AM_WRITE(galaxold_gfxbank_w)
678	610	AM_RANGE(0xb001, 0xb001) AM_WRITE(galaxold_nmi_enable_w)
679	611	//AM_RANGE(0xb004, 0xb004) AM_WRITE(galaxold_stars_enable_w)
680	612	AM_RANGE(0xb006, 0xb006) AM_WRITE(galaxold_flip_screen_x_w)
681	613	AM_RANGE(0xb007, 0xb007) AM_WRITE(galaxold_flip_screen_y_w)
682		AM_RANGE(0xb800, 0xb800) AM_WRITE(galaxian_pitch_w)
	614	AM_RANGE(0xb800, 0xb800) AM_READWRITE(watchdog_reset_r, galaxian_pitch_w)
683	615	ADDRESS_MAP_END
684	616
685	617
686		static ADDRESS_MAP_START( ozon1_readmem, ADDRESS_SPACE_PROGRAM, 8 )
687		AM_RANGE(0x0000, 0x2fff) AM_READ(SMH_ROM)
688		AM_RANGE(0x4000, 0x4200) AM_READ(SMH_RAM)
689		AM_RANGE(0x4300, 0x43ff) AM_READ(SMH_RAM)
690		AM_RANGE(0x4800, 0x4bff) AM_READ(galaxold_videoram_r)
691		AM_RANGE(0x5000, 0x503f) AM_READ(SMH_RAM)
692		AM_RANGE(0x5040, 0x505f) AM_READ(SMH_RAM)
693		AM_RANGE(0x8100, 0x8100) AM_READ_PORT("IN0")
694		AM_RANGE(0x8101, 0x8101) AM_READ_PORT("IN1")
695		AM_RANGE(0x8102, 0x8102) AM_READ_PORT("DSW")
696		ADDRESS_MAP_END
697
698		static ADDRESS_MAP_START( ozon1_writemem, ADDRESS_SPACE_PROGRAM, 8 )
699		AM_RANGE(0x0000, 0x2fff) AM_WRITE(SMH_ROM)
700		AM_RANGE(0x4000, 0x4200) AM_WRITE(SMH_RAM)
701		AM_RANGE(0x4300, 0x43ff) AM_WRITE(SMH_RAM)
702		AM_RANGE(0x4800, 0x4bff) AM_WRITE(galaxold_videoram_w) AM_BASE(&galaxold_videoram)
	618	static ADDRESS_MAP_START( ozon1_map, ADDRESS_SPACE_PROGRAM, 8 )
	619	AM_RANGE(0x0000, 0x2fff) AM_ROM
	620	AM_RANGE(0x4000, 0x4200) AM_RAM
	621	AM_RANGE(0x4300, 0x43ff) AM_RAM
	622	AM_RANGE(0x4800, 0x4bff) AM_READWRITE(galaxold_videoram_r, galaxold_videoram_w) AM_BASE(&galaxold_videoram)
703	623	AM_RANGE(0x4c00, 0x4fff) AM_WRITE(galaxold_videoram_w)
704		AM_RANGE(0x5000, 0x503f) AM_WRITE(galaxold_attributesram_w) AM_BASE(&galaxold_attributesram)
705		AM_RANGE(0x5040, 0x505f) AM_WRITE(SMH_RAM) AM_BASE(&galaxold_spriteram) AM_SIZE(&galaxold_spriteram_size)
	624	AM_RANGE(0x5000, 0x503f) AM_RAM_WRITE(galaxold_attributesram_w) AM_BASE(&galaxold_attributesram)
	625	AM_RANGE(0x5040, 0x505f) AM_RAM_WRITE(SMH_RAM) AM_BASE(&galaxold_spriteram) AM_SIZE(&galaxold_spriteram_size)
706	626	AM_RANGE(0x6801, 0x6801) AM_WRITENOP //continuosly 0 and 1
707	627	AM_RANGE(0x6802, 0x6802) AM_WRITE(galaxold_coin_counter_w)
708	628	AM_RANGE(0x6806, 0x6806) AM_WRITENOP //only one 0 at reset
709	629	AM_RANGE(0x6807, 0x6807) AM_WRITENOP //only one 0 at reset
	630	AM_RANGE(0x8100, 0x8100) AM_READ_PORT("IN0")
	631	AM_RANGE(0x8101, 0x8101) AM_READ_PORT("IN1")
	632	AM_RANGE(0x8102, 0x8102) AM_READ_PORT("DSW")
710	633	AM_RANGE(0x8103, 0x8103) AM_WRITENOP //only one 9b at reset
711	634	ADDRESS_MAP_END
712	635
r4679	r4680
882	805	AM_RANGE(S2650_SENSE_PORT, S2650_SENSE_PORT) AM_READ_PORT("SENSE")
883	806	ADDRESS_MAP_END
884	807
885		static ADDRESS_MAP_START( ckongg_readmem, ADDRESS_SPACE_PROGRAM, 8 )
886		AM_RANGE(0x0000, 0x5fff) AM_READ(SMH_ROM)
887		AM_RANGE(0x6000, 0x6fff) AM_READ(SMH_RAM)
888		AM_RANGE(0x9000, 0x93ff) AM_READ(galaxold_videoram_r)
889		AM_RANGE(0x9800, 0x98ff) AM_READ(SMH_RAM)
	808	static ADDRESS_MAP_START( ckongg_map, ADDRESS_SPACE_PROGRAM, 8 )
	809	AM_RANGE(0x0000, 0x5fff) AM_ROM
	810	AM_RANGE(0x6000, 0x6fff) AM_RAM
	811	AM_RANGE(0x9000, 0x93ff) AM_READWRITE(galaxold_videoram_r, galaxold_videoram_w) AM_BASE(&galaxold_videoram)
	812	AM_RANGE(0x9800, 0x983f) AM_RAM_WRITE(galaxold_attributesram_w) AM_BASE(&galaxold_attributesram)
	813	AM_RANGE(0x9840, 0x985f) AM_RAM AM_BASE(&galaxold_spriteram) AM_SIZE(&galaxold_spriteram_size)
	814	AM_RANGE(0x9860, 0x987f) AM_RAM AM_BASE(&galaxold_bulletsram) AM_SIZE(&galaxold_bulletsram_size)
	815	AM_RANGE(0x9880, 0x98ff) AM_RAM
890	816	AM_RANGE(0xc000, 0xc000) AM_READ_PORT("IN0")
891		AM_RANGE(0xc400, 0xc400) AM_READ_PORT("IN1")
892		AM_RANGE(0xc800, 0xc800) AM_READ_PORT("DSW0")
893		AM_RANGE(0xcc00, 0xcc00) AM_READ(watchdog_reset_r)
894		ADDRESS_MAP_END
895
896		static ADDRESS_MAP_START( ckongg_writemem, ADDRESS_SPACE_PROGRAM, 8 )
897		AM_RANGE(0x0000, 0x5fff) AM_WRITE(SMH_ROM)
898		AM_RANGE(0x6000, 0x6fff) AM_WRITE(SMH_RAM)
899		AM_RANGE(0x9000, 0x93ff) AM_WRITE(galaxold_videoram_w) AM_BASE(&galaxold_videoram)
900		AM_RANGE(0x9800, 0x983f) AM_WRITE(galaxold_attributesram_w) AM_BASE(&galaxold_attributesram)
901		AM_RANGE(0x9840, 0x985f) AM_WRITE(SMH_RAM) AM_BASE(&galaxold_spriteram) AM_SIZE(&galaxold_spriteram_size)
902		AM_RANGE(0x9860, 0x987f) AM_WRITE(SMH_RAM) AM_BASE(&galaxold_bulletsram) AM_SIZE(&galaxold_bulletsram_size)
903		AM_RANGE(0x9880, 0x98ff) AM_WRITE(SMH_RAM)
904	817	AM_RANGE(0xc000, 0xc001) AM_WRITE(galaxold_leds_w)
905	818	AM_RANGE(0xc002, 0xc002) AM_WRITE(galaxold_coin_lockout_w)
906	819	AM_RANGE(0xc003, 0xc003) AM_WRITE(galaxold_coin_counter_w)
907	820	AM_RANGE(0xc004, 0xc007) AM_WRITE(galaxian_lfo_freq_w)
	821	AM_RANGE(0xc400, 0xc400) AM_READ_PORT("IN1")
908	822	AM_RANGE(0xc400, 0xc402) AM_WRITE(galaxian_background_enable_w)
909	823	AM_RANGE(0xc403, 0xc403) AM_WRITE(galaxian_noise_enable_w)
910	824	AM_RANGE(0xc405, 0xc405) AM_WRITE(galaxian_shoot_enable_w)
911	825	AM_RANGE(0xc406, 0xc407) AM_WRITE(galaxian_vol_w)
	826	AM_RANGE(0xc800, 0xc800) AM_READ_PORT("DSW0")
912	827	AM_RANGE(0xc801, 0xc801) AM_WRITE(galaxold_nmi_enable_w)
913	828	AM_RANGE(0xc804, 0xc804) AM_WRITENOP // link cut
914	829	AM_RANGE(0xc806, 0xc806) AM_WRITE(galaxold_flip_screen_x_w)
915	830	AM_RANGE(0xc807, 0xc807) AM_WRITE(galaxold_flip_screen_y_w)
916		AM_RANGE(0xcc00, 0xcc00) AM_WRITE(galaxian_pitch_w)
	831	AM_RANGE(0xcc00, 0xcc00) AM_READWRITE(watchdog_reset_r, galaxian_pitch_w)
917	832	ADDRESS_MAP_END
918	833
919		static ADDRESS_MAP_START( kkgalax_readmem, ADDRESS_SPACE_PROGRAM, 8 )
920		AM_RANGE(0x0000, 0x5fff) AM_READ(SMH_ROM)
921		AM_RANGE(0x6000, 0x6fff) AM_READ(SMH_RAM)
922		AM_RANGE(0x9000, 0x93ff) AM_READ(galaxold_videoram_r)
923		AM_RANGE(0x9800, 0x98ff) AM_READ(SMH_RAM)
	834	static ADDRESS_MAP_START( kkgalax_map, ADDRESS_SPACE_PROGRAM, 8 )
	835	AM_RANGE(0x0000, 0x5fff) AM_ROM
	836	AM_RANGE(0x6000, 0x6fff) AM_RAM
	837	AM_RANGE(0x9000, 0x93ff) AM_READWRITE(galaxold_videoram_r, galaxold_videoram_w) AM_BASE(&galaxold_videoram)
	838	AM_RANGE(0x9800, 0x983f) AM_RAM_WRITE(galaxold_attributesram_w) AM_BASE(&galaxold_attributesram)
	839	AM_RANGE(0x9840, 0x985f) AM_RAM AM_BASE(&galaxold_spriteram) AM_SIZE(&galaxold_spriteram_size)
	840	AM_RANGE(0x9860, 0x987f) AM_RAM AM_BASE(&galaxold_bulletsram) AM_SIZE(&galaxold_bulletsram_size)
	841	AM_RANGE(0x9880, 0x98ff) AM_RAM
924	842	AM_RANGE(0xa000, 0xa000) AM_READ_PORT("IN0")
925	843	AM_RANGE(0xa800, 0xa800) AM_READ_PORT("IN1")
926	844	AM_RANGE(0xb000, 0xb000) AM_READ_PORT("DSW0")
927		//  AM_RANGE(0xcc00, 0xcc00) AM_READ(watchdog_reset_r)
928		ADDRESS_MAP_END
929
930		static ADDRESS_MAP_START( kkgalax_writemem, ADDRESS_SPACE_PROGRAM, 8 )
931		AM_RANGE(0x0000, 0x5fff) AM_WRITENOP
932		AM_RANGE(0x6000, 0x6fff) AM_WRITE(SMH_RAM)
933		AM_RANGE(0x9000, 0x93ff) AM_WRITE(galaxold_videoram_w) AM_BASE(&galaxold_videoram)
934		AM_RANGE(0x9800, 0x983f) AM_WRITE(galaxold_attributesram_w) AM_BASE(&galaxold_attributesram)
935		AM_RANGE(0x9840, 0x985f) AM_WRITE(SMH_RAM) AM_BASE(&galaxold_spriteram) AM_SIZE(&galaxold_spriteram_size)
936		AM_RANGE(0x9860, 0x987f) AM_WRITE(SMH_RAM) AM_BASE(&galaxold_bulletsram) AM_SIZE(&galaxold_bulletsram_size)
937		AM_RANGE(0x9880, 0x98ff) AM_WRITE(SMH_RAM)
	845	AM_RANGE(0xb001, 0xb001) AM_WRITE(galaxold_nmi_enable_w)
938	846	//  AM_RANGE(0xc000, 0xc001) AM_WRITE(galaxold_leds_w)
939	847	//  AM_RANGE(0xc002, 0xc002) AM_WRITE(galaxold_coin_lockout_w)
940	848	//  AM_RANGE(0xc003, 0xc003) AM_WRITE(galaxold_coin_counter_w)
r4679	r4680
943	851	//  AM_RANGE(0xc403, 0xc403) AM_WRITE(galaxian_noise_enable_w)
944	852	//  AM_RANGE(0xc405, 0xc405) AM_WRITE(galaxian)
945	853	//  AM_RANGE(0xc406, 0xc407) AM_WRITE(galaxian_vol_w)
946		AM_RANGE(0xb001, 0xb001) AM_WRITE(galaxold_nmi_enable_w)
947	854	//  AM_RANGE(0xc804, 0xc804) AM_WRITENOP // link cut
948	855	//  AM_RANGE(0xc806, 0xc806) AM_WRITE(galaxold_flip_screen_x_w)
949	856	//  AM_RANGE(0xc807, 0xc807) AM_WRITE(galaxold_flip_screen_y_w)
950		//  AM_RANGE(0xcc00, 0xcc00) AM_WRITE(galaxian_pitch_w)
	857	//  AM_RANGE(0xcc00, 0xcc00) AM_READWRITE(watchdog_reset_r, galaxian_pitch_w)
951	858	ADDRESS_MAP_END
952	859
953	860	static READ8_HANDLER( hexpoola_data_port_r )
r4679	r4680
2196	2103
2197	2104	/* basic machine hardware */
2198	2105	MDRV_CPU_ADD("maincpu", Z80, PIXEL_CLOCK/2)   /* 3.072 MHz */
2199		MDRV_CPU_PROGRAM_MAP(galaxold_readmem,galaxold_writemem)
	2106	MDRV_CPU_PROGRAM_MAP(galaxold_map,0)
2200	2107
2201	2108	MDRV_MACHINE_RESET(galaxold)
2202	2109
r4679	r4680
2244	2151	/* basic machine hardware */
2245	2152	MDRV_IMPORT_FROM(galaxian)
2246	2153	MDRV_CPU_MODIFY("maincpu")
2247		MDRV_CPU_PROGRAM_MAP(mooncrst_readmem,mooncrst_writemem)
	2154	MDRV_CPU_PROGRAM_MAP(mooncrst_map,0)
2248	2155
2249	2156	/* video hardware */
2250	2157	MDRV_VIDEO_START(mooncrst)
r4679	r4680
2256	2163	/* basic machine hardware */
2257	2164	MDRV_IMPORT_FROM(galaxian)
2258	2165	MDRV_CPU_MODIFY("maincpu")
2259		MDRV_CPU_PROGRAM_MAP(scramblb_readmem,scramblb_writemem)
	2166	MDRV_CPU_PROGRAM_MAP(scramblb_map,0)
2260	2167
2261	2168	/* video hardware */
2262	2169	MDRV_PALETTE_LENGTH(32+2+64+1)   /* 32 for the characters, 2 for the bullets, 64 for the stars, 1 for background */
r4679	r4680
2270	2177	/* basic machine hardware */
2271	2178	MDRV_IMPORT_FROM(galaxian)
2272	2179	MDRV_CPU_MODIFY("maincpu")
2273		MDRV_CPU_PROGRAM_MAP(scramb2_readmem,scramb2_writemem)
	2180	MDRV_CPU_PROGRAM_MAP(scramb2_map,0)
2274	2181
2275	2182	/* video hardware */
2276	2183	MDRV_PALETTE_LENGTH(32+2+64+1)   /* 32 for the characters, 2 for the bullets, 64 for the stars, 1 for background */
r4679	r4680
2286	2193	/* basic machine hardware */
2287	2194	MDRV_IMPORT_FROM(galaxian)
2288	2195	MDRV_CPU_MODIFY("maincpu")
2289		MDRV_CPU_PROGRAM_MAP(_4in1_readmem,_4in1_writemem)
	2196	MDRV_CPU_PROGRAM_MAP(_4in1_map,0)
2290	2197
2291	2198	/* video hardware */
2292	2199	MDRV_GFXDECODE(_4in1)
r4679	r4680
2300	2207	/* basic machine hardware */
2301	2208	MDRV_IMPORT_FROM(galaxian)
2302	2209	MDRV_CPU_MODIFY("maincpu")
2303		MDRV_CPU_PROGRAM_MAP(bagmanmc_readmem,bagmanmc_writemem)
	2210	MDRV_CPU_PROGRAM_MAP(bagmanmc_map,0)
2304	2211
2305	2212	MDRV_MACHINE_RESET( devilfsg )
2306	2213
r4679	r4680
2316	2223	/* basic machine hardware */
2317	2224	MDRV_IMPORT_FROM(galaxian)
2318	2225	MDRV_CPU_MODIFY("maincpu")
2319		MDRV_CPU_PROGRAM_MAP(dkongjrm_readmem,dkongjrm_writemem)
	2226	MDRV_CPU_PROGRAM_MAP(dkongjrm_map,0)
2320	2227
2321	2228	/* video hardware */
2322	2229	MDRV_VIDEO_START(dkongjrm)
r4679	r4680
2326	2233	/* basic machine hardware */
2327	2234	MDRV_IMPORT_FROM(galaxian)
2328	2235	MDRV_CPU_MODIFY("maincpu")
2329		MDRV_CPU_PROGRAM_MAP(rockclim_readmem,rockclim_writemem)
	2236	MDRV_CPU_PROGRAM_MAP(rockclim_map,0)
2330	2237	MDRV_GFXDECODE(rockclim)
2331	2238	/* video hardware */
2332	2239	MDRV_VIDEO_START(rockclim)
r4679	r4680
2342	2249	/* basic machine hardware */
2343	2250	MDRV_IMPORT_FROM(galaxold_base)
2344	2251	MDRV_CPU_MODIFY("maincpu")
2345		MDRV_CPU_PROGRAM_MAP(ozon1_readmem,ozon1_writemem)
	2252	MDRV_CPU_PROGRAM_MAP(ozon1_map,0)
2346	2253	MDRV_CPU_IO_MAP(ozon1_io_map,0)
2347	2254	MDRV_CPU_VBLANK_INT("screen", nmi_line_pulse)
2348	2255
r4679	r4680
2500	2407	/* basic machine hardware */
2501	2408	MDRV_IMPORT_FROM(galaxian)
2502	2409	MDRV_CPU_MODIFY("maincpu")
2503		MDRV_CPU_PROGRAM_MAP(ckongg_readmem,ckongg_writemem)
	2410	MDRV_CPU_PROGRAM_MAP(ckongg_map,0)
2504	2411
2505	2412	MDRV_GFXDECODE(gmgalax)
2506	2413
r4679	r4680
2513	2420	/* basic machine hardware */
2514	2421	MDRV_IMPORT_FROM(galaxian)
2515	2422	MDRV_CPU_MODIFY("maincpu")
2516		MDRV_CPU_PROGRAM_MAP(kkgalax_readmem,kkgalax_writemem)
	2423	MDRV_CPU_PROGRAM_MAP(kkgalax_map,0)
2517	2424
2518	2425	MDRV_GFXDECODE(gmgalax)
2519	2426

src/mame/drivers/centiped.c

r4679	r4680
446	446
447	447	/* IRQ is clocked on the rising edge of 16V, equal to the previous 32V */
448	448	if (scanline & 16)
449		cpu_set_input_line(timer->machine->cpu[0], 0, ((scanline - 1) & 32) ? ASSERT_LINE : CLEAR_LINE);
	449	cputag_set_input_line(timer->machine, "maincpu", 0, ((scanline - 1) & 32) ? ASSERT_LINE : CLEAR_LINE);
450	450
451	451	/* do a partial update now to handle sprite multiplexing (Maze Invaders) */
452	452	video_screen_update_partial(timer->machine->primary_screen, scanline);
r4679	r4680
463	463
464	464	static MACHINE_RESET( centiped )
465	465	{
466		cpu_set_input_line(machine->cpu[0], 0, CLEAR_LINE);
	466	cputag_set_input_line(machine, "maincpu", 0, CLEAR_LINE);
467	467	dsw_select = 0;
468	468	control_select = 0;
469	469	}
r4679	r4680
480	480
481	481	static WRITE8_HANDLER( irq_ack_w )
482	482	{
483		cpu_set_input_line(space->machine->cpu[0], 0, CLEAR_LINE);
	483	cputag_set_input_line(space->machine, "maincpu", 0, CLEAR_LINE);
484	484	}
485	485
486	486
r4679	r4680
1976	1976
1977	1977	static DRIVER_INIT( caterplr )
1978	1978	{
1979		const address_space *space = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM);
	1979	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
1980	1980	const device_config *device = devtag_get_device(machine, "pokey");
1981	1981	memory_install_readwrite8_device_handler(space, device, 0x1000, 0x100f, 0, 0, caterplr_AY8910_r, caterplr_AY8910_w);
1982	1982	memory_install_read8_device_handler(space, device, 0x1780, 0x1780, 0, 0, caterplr_rand_r);
r4679	r4680
1985	1985
1986	1986	static DRIVER_INIT( magworm )
1987	1987	{
1988		const address_space *space = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM);
	1988	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
1989	1989	const device_config *device = devtag_get_device(machine, "pokey");
1990	1990	memory_install_write8_device_handler(space, device, 0x1001, 0x1001, 0, 0, ay8910_address_w);
1991	1991	memory_install_readwrite8_device_handler(space, device, 0x1003, 0x1003, 0, 0, ay8910_r, ay8910_data_w);

src/mame/drivers/atarisy1.c

r4679	r4680
211	211
212	212	static void update_interrupts(running_machine *machine)
213	213	{
214		cpu_set_input_line(machine->cpu[0], 2, joystick_int && joystick_int_enable ? ASSERT_LINE : CLEAR_LINE);
215		cpu_set_input_line(machine->cpu[0], 3, atarigen_scanline_int_state ? ASSERT_LINE : CLEAR_LINE);
216		cpu_set_input_line(machine->cpu[0], 4, atarigen_video_int_state ? ASSERT_LINE : CLEAR_LINE);
217		cpu_set_input_line(machine->cpu[0], 6, atarigen_sound_int_state ? ASSERT_LINE : CLEAR_LINE);
	214	cputag_set_input_line(machine, "maincpu", 2, joystick_int && joystick_int_enable ? ASSERT_LINE : CLEAR_LINE);
	215	cputag_set_input_line(machine, "maincpu", 3, atarigen_scanline_int_state ? ASSERT_LINE : CLEAR_LINE);
	216	cputag_set_input_line(machine, "maincpu", 4, atarigen_video_int_state ? ASSERT_LINE : CLEAR_LINE);
	217	cputag_set_input_line(machine, "maincpu", 6, atarigen_sound_int_state ? ASSERT_LINE : CLEAR_LINE);
218	218	}
219	219
220	220
r4679	r4680
224	224	atarigen_eeprom_reset();
225	225	atarigen_slapstic_reset();
226	226	atarigen_interrupt_reset(update_interrupts);
227		atarigen_sound_io_reset(machine->cpu[1]);
	227	atarigen_sound_io_reset(cputag_get_cpu(machine, "audiocpu"));
228	228
229	229	/* reset the joystick parameters */
230	230	joystick_value = 0;
r4679	r4680
2328	2328	static DRIVER_INIT( marble )
2329	2329	{
2330	2330	atarigen_eeprom_default = NULL;
2331		atarigen_slapstic_init(machine->cpu[0], 0x080000, 0, 103);
	2331	atarigen_slapstic_init(cputag_get_cpu(machine, "maincpu"), 0x080000, 0, 103);
2332	2332
2333	2333	joystick_type = 0;   /* none */
2334	2334	trackball_type = 1;   /* rotated */
r4679	r4680
2338	2338	static DRIVER_INIT( peterpak )
2339	2339	{
2340	2340	atarigen_eeprom_default = NULL;
2341		atarigen_slapstic_init(machine->cpu[0], 0x080000, 0, 107);
	2341	atarigen_slapstic_init(cputag_get_cpu(machine, "maincpu"), 0x080000, 0, 107);
2342	2342
2343	2343	joystick_type = 1;   /* digital */
2344	2344	trackball_type = 0;   /* none */
r4679	r4680
2348	2348	static DRIVER_INIT( indytemp )
2349	2349	{
2350	2350	atarigen_eeprom_default = NULL;
2351		atarigen_slapstic_init(machine->cpu[0], 0x080000, 0, 105);
	2351	atarigen_slapstic_init(cputag_get_cpu(machine, "maincpu"), 0x080000, 0, 105);
2352	2352
2353	2353	joystick_type = 1;   /* digital */
2354	2354	trackball_type = 0;   /* none */
r4679	r4680
2358	2358	static DRIVER_INIT( roadrunn )
2359	2359	{
2360	2360	atarigen_eeprom_default = NULL;
2361		atarigen_slapstic_init(machine->cpu[0], 0x080000, 0, 108);
	2361	atarigen_slapstic_init(cputag_get_cpu(machine, "maincpu"), 0x080000, 0, 108);
2362	2362
2363	2363	joystick_type = 2;   /* analog */
2364	2364	trackball_type = 0;   /* none */
r4679	r4680
2368	2368	static DRIVER_INIT( roadb109 )
2369	2369	{
2370	2370	atarigen_eeprom_default = NULL;
2371		atarigen_slapstic_init(machine->cpu[0], 0x080000, 0, 109);
	2371	atarigen_slapstic_init(cputag_get_cpu(machine, "maincpu"), 0x080000, 0, 109);
2372	2372
2373	2373	joystick_type = 3;   /* pedal */
2374	2374	trackball_type = 2;   /* steering wheel */
r4679	r4680
2378	2378	static DRIVER_INIT( roadb110 )
2379	2379	{
2380	2380	atarigen_eeprom_default = NULL;
2381		atarigen_slapstic_init(machine->cpu[0], 0x080000, 0, 110);
	2381	atarigen_slapstic_init(cputag_get_cpu(machine, "maincpu"), 0x080000, 0, 110);
2382	2382
2383	2383	joystick_type = 3;   /* pedal */
2384	2384	trackball_type = 2;   /* steering wheel */

src/mame/drivers/wgp.c

r4679	r4680
438	438	/* bit 0 enables cpu B */
439	439	/* however this fails when recovering from a save state
440	440	if cpu B is disabled !! */
441		cpu_set_input_line(machine->cpu[2], INPUT_LINE_RESET, (cpua_ctrl &0x1) ? CLEAR_LINE : ASSERT_LINE);
	441	cputag_set_input_line(machine, "sub", INPUT_LINE_RESET, (cpua_ctrl & 0x1) ? CLEAR_LINE : ASSERT_LINE);
442	442
443	443	/* bit 1 is "vibration" acc. to test mode */
444	444	}
r4679	r4680
464	464	#ifdef UNUSED_FUNCTION
465	465	static TIMER_CALLBACK( wgp_interrupt4 )
466	466	{
467		cpu_set_input_line(machine->cpu[0],4,HOLD_LINE);
	467	cputag_set_input_line(machine, "maincpu", 4, HOLD_LINE);
468	468	}
469	469	#endif
470	470
471	471	static TIMER_CALLBACK( wgp_interrupt6 )
472	472	{
473		cpu_set_input_line(machine->cpu[0],6,HOLD_LINE);
	473	cputag_set_input_line(machine, "maincpu", 6, HOLD_LINE);
474	474	}
475	475
476	476	/* 68000 B */
477	477
478	478	static TIMER_CALLBACK( wgp_cpub_interrupt6 )
479	479	{
480		cpu_set_input_line(machine->cpu[2],6,HOLD_LINE);   /* assumes Z80 sandwiched between the 68Ks */
	480	cputag_set_input_line(machine, "sub", 6, HOLD_LINE);   /* assumes Z80 sandwiched between the 68Ks */
481	481	}
482	482
483	483
r4679	r4680
688	688	/***************************************************************************/
689	689
690	690	static ADDRESS_MAP_START( z80_sound_map, ADDRESS_SPACE_PROGRAM, 8 )
691		AM_RANGE(0x4000, 0x7fff) AM_READ(SMH_BANK10)   /* Fallthrough */
	691	AM_RANGE(0x4000, 0x7fff) AM_READ(SMH_BANK(10))   /* Fallthrough */
692	692	AM_RANGE(0x0000, 0x7fff) AM_ROM
693	693	AM_RANGE(0xc000, 0xdfff) AM_RAM
694	694	AM_RANGE(0xe000, 0xe003) AM_DEVREADWRITE("ym", ym2610_r, ym2610_w)
r4679	r4680
913	913	/* handler called by the YM2610 emulator when the internal timers cause an IRQ */
914	914	static void irqhandler(const device_config *device, int irq)   // assumes Z80 sandwiched between 68Ks
915	915	{
916		cpu_set_input_line(device->machine->cpu[1],0,irq ? ASSERT_LINE : CLEAR_LINE);
	916	cputag_set_input_line(device->machine, "audiocpu", 0, irq ? ASSERT_LINE : CLEAR_LINE);
917	917	}
918	918
919	919	static const ym2610_interface ym2610_config =
r4679	r4680
1236	1236	GAME( 1989, wgpjoy,   wgp,    wgp,    wgpjoy, wgp,    ROT0, "Taito Corporation", "World Grand Prix (joystick version) (Japan, set 1)", GAME_IMPERFECT_GRAPHICS | GAME_NOT_WORKING )
1237	1237	GAME( 1989, wgpjoya,  wgp,    wgp,    wgpjoy, wgp,    ROT0, "Taito Corporation", "World Grand Prix (joystick version) (Japan, set 2)", GAME_IMPERFECT_GRAPHICS | GAME_NOT_WORKING )
1238	1238	GAME( 1990, wgp2,     wgp,    wgp2,   wgp2,   wgp2,   ROT0, "Taito Corporation", "World Grand Prix 2 (Japan)", GAME_IMPERFECT_GRAPHICS | GAME_NOT_WORKING )
1239

src/mame/drivers/welltris.c

r4679	r4680
349	349	{
350	350	pending_command = 1;
351	351	soundlatch_w(space, 0, data & 0xff);
352		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_NMI, PULSE_LINE);
	352	cputag_set_input_line(space->machine, "audiocpu", INPUT_LINE_NMI, PULSE_LINE);
353	353	}
354	354	}
355	355
r4679	r4680
391	391	static ADDRESS_MAP_START( sound_map, ADDRESS_SPACE_PROGRAM, 8 )
392	392	AM_RANGE(0x0000, 0x77ff) AM_ROM
393	393	AM_RANGE(0x7800, 0x7fff) AM_RAM
394		AM_RANGE(0x8000, 0xffff) AM_READ(SMH_BANK1)
	394	AM_RANGE(0x8000, 0xffff) AM_READ(SMH_BANK(1))
395	395	ADDRESS_MAP_END
396	396
397	397	static ADDRESS_MAP_START( sound_port_map, ADDRESS_SPACE_IO, 8 )
r4679	r4680
688	688
689	689	static void irqhandler(const device_config *device, int irq)
690	690	{
691		cpu_set_input_line(device->machine->cpu[1], 0, irq ? ASSERT_LINE : CLEAR_LINE);
	691	cputag_set_input_line(device->machine, "audiocpu", 0, irq ? ASSERT_LINE : CLEAR_LINE);
692	692	}
693	693
694	694	static const ym2610_interface ym2610_config =

src/mame/drivers/sprint8.c

r4679	r4680
19	19	{
20	20	if (collision_reset == 0)
21	21	{
22		cpu_set_input_line(machine->cpu[0], 0, ASSERT_LINE);
	22	cputag_set_input_line(machine, "maincpu", 0, ASSERT_LINE);
23	23
24	24	collision_index = n;
25	25	}
r4679	r4680
99	99	collision_reset = !(data & 1);
100	100
101	101	if (collision_reset)
102		cpu_set_input_line(space->machine->cpu[0], 0, CLEAR_LINE);
	102	cputag_set_input_line(space->machine, "maincpu", 0, CLEAR_LINE);
103	103	}
104	104
105	105
r4679	r4680
113	113	static WRITE8_HANDLER( sprint8_motor_w ) {}
114	114
115	115
116		static ADDRESS_MAP_START( readmem, ADDRESS_SPACE_PROGRAM, 8 )
117		AM_RANGE(0x0000, 0x00ff) AM_READ(SMH_RAM)
	116	static ADDRESS_MAP_START( sprint8_map, ADDRESS_SPACE_PROGRAM, 8 )
	117	AM_RANGE(0x0000, 0x00ff) AM_RAM
	118	AM_RANGE(0x1800, 0x1bff) AM_RAM_WRITE(sprint8_video_ram_w) AM_BASE(&sprint8_video_ram)
118	119	AM_RANGE(0x1c00, 0x1c00) AM_READ(sprint8_collision_r)
119	120	AM_RANGE(0x1c01, 0x1c08) AM_READ(sprint8_input_r)
120	121	AM_RANGE(0x1c09, 0x1c09) AM_READ_PORT("IN0")
121	122	AM_RANGE(0x1c0a, 0x1c0a) AM_READ_PORT("IN1")
122	123	AM_RANGE(0x1c0f, 0x1c0f) AM_READ_PORT("VBLANK")
123		AM_RANGE(0x2000, 0x3fff) AM_READ(SMH_ROM)
124		AM_RANGE(0xf800, 0xffff) AM_READ(SMH_ROM)
125		ADDRESS_MAP_END
126
127
128		static ADDRESS_MAP_START( writemem, ADDRESS_SPACE_PROGRAM, 8 )
129		AM_RANGE(0x0000, 0x00ff) AM_WRITE(SMH_RAM)
130		AM_RANGE(0x1800, 0x1bff) AM_WRITE(sprint8_video_ram_w) AM_BASE(&sprint8_video_ram)
131		AM_RANGE(0x1c00, 0x1c0f) AM_WRITE(SMH_RAM) AM_BASE(&sprint8_pos_h_ram)
132		AM_RANGE(0x1c10, 0x1c1f) AM_WRITE(SMH_RAM) AM_BASE(&sprint8_pos_v_ram)
133		AM_RANGE(0x1c20, 0x1c2f) AM_WRITE(SMH_RAM) AM_BASE(&sprint8_pos_d_ram)
	124	AM_RANGE(0x1c00, 0x1c0f) AM_WRITEONLY AM_BASE(&sprint8_pos_h_ram)
	125	AM_RANGE(0x1c10, 0x1c1f) AM_WRITEONLY AM_BASE(&sprint8_pos_v_ram)
	126	AM_RANGE(0x1c20, 0x1c2f) AM_WRITEONLY AM_BASE(&sprint8_pos_d_ram)
134	127	AM_RANGE(0x1c30, 0x1c37) AM_WRITE(sprint8_lockout_w)
135	128	AM_RANGE(0x1d00, 0x1d00) AM_WRITE(sprint8_int_reset_w)
136	129	AM_RANGE(0x1d01, 0x1d01) AM_WRITE(sprint8_crash_w)
137	130	AM_RANGE(0x1d02, 0x1d02) AM_WRITE(sprint8_explosion_w)
138	131	AM_RANGE(0x1d03, 0x1d03) AM_WRITE(sprint8_bugle_w)
139	132	AM_RANGE(0x1d04, 0x1d04) AM_WRITE(sprint8_bug_w)
140		AM_RANGE(0x1d05, 0x1d05) AM_WRITE(SMH_RAM) AM_BASE(&sprint8_team)
	133	AM_RANGE(0x1d05, 0x1d05) AM_WRITEONLY AM_BASE(&sprint8_team)
141	134	AM_RANGE(0x1d06, 0x1d06) AM_WRITE(sprint8_attract_w)
142	135	AM_RANGE(0x1e00, 0x1e07) AM_WRITE(sprint8_motor_w)
143	136	AM_RANGE(0x1f00, 0x1f00) AM_WRITENOP /* probably a watchdog, disabled in service mode */
144		AM_RANGE(0x2000, 0x3fff) AM_WRITE(SMH_ROM)
145		AM_RANGE(0xf800, 0xffff) AM_WRITE(SMH_ROM)
	137	AM_RANGE(0x2000, 0x3fff) AM_ROM
	138	AM_RANGE(0xf800, 0xffff) AM_ROM
146	139	ADDRESS_MAP_END
147	140
148	141
r4679	r4680
467	460
468	461	/* basic machine hardware */
469	462	MDRV_CPU_ADD("maincpu", M6800, 11055000 / 11) /* ? */
470		MDRV_CPU_PROGRAM_MAP(readmem, writemem)
	463	MDRV_CPU_PROGRAM_MAP(sprint8_map, 0)
471	464
472	465	MDRV_MACHINE_RESET(sprint8)
473	466

src/mame/drivers/pturn.c

r4679	r4680
440	440
441	441	static MACHINE_RESET( pturn )
442	442	{
443		const address_space *space = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM);
	443	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
444	444	soundlatch_clear_w(space,0,0);
445	445	}
446	446
r4679	r4680
520	520	static DRIVER_INIT(pturn)
521	521	{
522	522	/*
523		memory_install_read8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xc0dd, 0xc0dd, 0, 0, pturn_protection_r);
524		memory_install_read8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xc0db, 0xc0db, 0, 0, pturn_protection2_r);
	523	memory_install_read8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xc0dd, 0xc0dd, 0, 0, pturn_protection_r);
	524	memory_install_read8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xc0db, 0xc0db, 0, 0, pturn_protection2_r);
525	525	*/
526	526	}
527	527

src/mame/drivers/gumbo.c

r4679	r4680
53	53	VIDEO_START( gumbo );
54	54	VIDEO_UPDATE( gumbo );
55	55
56		static ADDRESS_MAP_START( gumbo_readmem, ADDRESS_SPACE_PROGRAM, 16 )
57		AM_RANGE(0x000000, 0x03ffff) AM_READ(SMH_ROM)
58		AM_RANGE(0x080000, 0x083fff) AM_READ(SMH_RAM)
59		AM_RANGE(0x1b0000, 0x1b03ff) AM_READ(SMH_RAM)
	56	static ADDRESS_MAP_START( gumbo_map, ADDRESS_SPACE_PROGRAM, 16 )
	57	AM_RANGE(0x000000, 0x03ffff) AM_ROM
	58	AM_RANGE(0x080000, 0x083fff) AM_RAM // main ram
	59	AM_RANGE(0x1b0000, 0x1b03ff) AM_RAM_WRITE(paletteram16_xRRRRRGGGGGBBBBB_word_w) AM_BASE(&paletteram16)
60	60	AM_RANGE(0x1c0100, 0x1c0101) AM_READ_PORT("P1_P2")
61	61	AM_RANGE(0x1c0200, 0x1c0201) AM_READ_PORT("DSW")
62		AM_RANGE(0x1c0300, 0x1c0301) AM_DEVREAD8("oki", okim6295_r, 0x00ff)
63		AM_RANGE(0x1e0000, 0x1e0fff) AM_READ(SMH_RAM)
64		AM_RANGE(0x1f0000, 0x1f3fff) AM_READ(SMH_RAM)
	62	AM_RANGE(0x1c0300, 0x1c0301) AM_DEVREADWRITE8("oki", okim6295_r, okim6295_w, 0x00ff)
	63	AM_RANGE(0x1e0000, 0x1e0fff) AM_RAM_WRITE(gumbo_bg_videoram_w) AM_BASE(&gumbo_bg_videoram) // bg tilemap
	64	AM_RANGE(0x1f0000, 0x1f3fff) AM_RAM_WRITE(gumbo_fg_videoram_w) AM_BASE(&gumbo_fg_videoram) // fg tilemap
65	65	ADDRESS_MAP_END
66	66
67		static ADDRESS_MAP_START( gumbo_writemem, ADDRESS_SPACE_PROGRAM, 16 )
68		AM_RANGE(0x000000, 0x03ffff) AM_WRITE(SMH_ROM)
69		AM_RANGE(0x080000, 0x083fff) AM_WRITE(SMH_RAM) // main ram
70		AM_RANGE(0x1c0300, 0x1c0301) AM_DEVWRITE8("oki", okim6295_w, 0x00ff)
71		AM_RANGE(0x1b0000, 0x1b03ff) AM_WRITE(paletteram16_xRRRRRGGGGGBBBBB_word_w) AM_BASE(&paletteram16)
72		AM_RANGE(0x1e0000, 0x1e0fff) AM_WRITE(gumbo_bg_videoram_w) AM_BASE(&gumbo_bg_videoram) // bg tilemap
73		AM_RANGE(0x1f0000, 0x1f3fff) AM_WRITE(gumbo_fg_videoram_w) AM_BASE(&gumbo_fg_videoram) // fg tilemap
74		ADDRESS_MAP_END
75
76	67	/* Miss Puzzle has a different memory map */
77	68
78		static ADDRESS_MAP_START( mspuzzle_readmem, ADDRESS_SPACE_PROGRAM, 16 )
79		AM_RANGE(0x000000, 0x07ffff) AM_READ(SMH_ROM)
80		AM_RANGE(0x100000, 0x103fff) AM_READ(SMH_RAM)
81		AM_RANGE(0x1a0000, 0x1a03ff) AM_READ(SMH_RAM)
	69	static ADDRESS_MAP_START( mspuzzle_map, ADDRESS_SPACE_PROGRAM, 16 )
	70	AM_RANGE(0x000000, 0x07ffff) AM_ROM
	71	AM_RANGE(0x100000, 0x103fff) AM_RAM // main ram
	72	AM_RANGE(0x190000, 0x197fff) AM_RAM_WRITE(gumbo_fg_videoram_w) AM_BASE(&gumbo_fg_videoram) // fg tilemap
	73	AM_RANGE(0x1a0000, 0x1a03ff) AM_RAM_WRITE(paletteram16_xRRRRRGGGGGBBBBB_word_w) AM_BASE(&paletteram16)
82	74	AM_RANGE(0x1b0100, 0x1b0101) AM_READ_PORT("P1_P2")
83	75	AM_RANGE(0x1b0200, 0x1b0201) AM_READ_PORT("DSW")
84		AM_RANGE(0x1b0300, 0x1b0301) AM_DEVREAD8("oki", okim6295_r, 0x00ff)
85		AM_RANGE(0x190000, 0x197fff) AM_READ(SMH_RAM)
86		AM_RANGE(0x1c0000, 0x1c1fff) AM_READ(SMH_RAM)
	76	AM_RANGE(0x1b0300, 0x1b0301) AM_DEVREADWRITE8("oki", okim6295_r, okim6295_w, 0x00ff)
	77	AM_RANGE(0x1c0000, 0x1c1fff) AM_RAM_WRITE(gumbo_bg_videoram_w) AM_BASE(&gumbo_bg_videoram) // bg tilemap
87	78	ADDRESS_MAP_END
88	79
89		static ADDRESS_MAP_START( mspuzzle_writemem, ADDRESS_SPACE_PROGRAM, 16 )
90		AM_RANGE(0x000000, 0x07ffff) AM_WRITE(SMH_ROM)
91		AM_RANGE(0x100000, 0x103fff) AM_WRITE(SMH_RAM) // main ram
92		AM_RANGE(0x1b0300, 0x1b0301) AM_DEVWRITE8("oki", okim6295_w, 0x00ff)
93		AM_RANGE(0x1a0000, 0x1a03ff) AM_WRITE(paletteram16_xRRRRRGGGGGBBBBB_word_w) AM_BASE(&paletteram16)
94		AM_RANGE(0x190000, 0x197fff) AM_WRITE(gumbo_fg_videoram_w) AM_BASE(&gumbo_fg_videoram) // fg tilemap
95		AM_RANGE(0x1c0000, 0x1c1fff) AM_WRITE(gumbo_bg_videoram_w) AM_BASE(&gumbo_bg_videoram) // bg tilemap
96		ADDRESS_MAP_END
97
98		static ADDRESS_MAP_START( dblpoint_readmem, ADDRESS_SPACE_PROGRAM, 16 )
99		AM_RANGE(0x000000, 0x07ffff) AM_READ(SMH_ROM)
100		AM_RANGE(0x080000, 0x083fff) AM_READ(SMH_RAM)
	80	static ADDRESS_MAP_START( dblpoint_map, ADDRESS_SPACE_PROGRAM, 16 )
	81	AM_RANGE(0x000000, 0x07ffff) AM_ROM
	82	AM_RANGE(0x080000, 0x083fff) AM_RAM // main ram
	83	AM_RANGE(0x1b0000, 0x1b03ff) AM_WRITE(paletteram16_xRRRRRGGGGGBBBBB_word_w) AM_BASE(&paletteram16)
101	84	AM_RANGE(0x1c0100, 0x1c0101) AM_READ_PORT("P1_P2")
102	85	AM_RANGE(0x1c0200, 0x1c0201) AM_READ_PORT("DSW")
103		AM_RANGE(0x1c0300, 0x1c0301) AM_DEVREAD8("oki", okim6295_r, 0x00ff)
104		AM_RANGE(0x1e0000, 0x1e3fff) AM_READ(SMH_RAM)
105		AM_RANGE(0x1f0000, 0x1f0fff) AM_READ(SMH_RAM)
	86	AM_RANGE(0x1c0300, 0x1c0301) AM_DEVREADWRITE8("oki", okim6295_r, okim6295_w, 0x00ff)
	87	AM_RANGE(0x1e0000, 0x1e3fff) AM_RAM_WRITE(gumbo_fg_videoram_w) AM_BASE(&gumbo_fg_videoram) // fg tilemap
	88	AM_RANGE(0x1f0000, 0x1f0fff) AM_RAM_WRITE(gumbo_bg_videoram_w) AM_BASE(&gumbo_bg_videoram) // bg tilemap
106	89	ADDRESS_MAP_END
107	90
108		static ADDRESS_MAP_START( dblpoint_writemem, ADDRESS_SPACE_PROGRAM, 16 )
109		AM_RANGE(0x000000, 0x07ffff) AM_WRITE(SMH_ROM)
110		AM_RANGE(0x080000, 0x083fff) AM_WRITE(SMH_RAM) // main ram
111		AM_RANGE(0x1c0300, 0x1c0301) AM_DEVWRITE8("oki", okim6295_w, 0x00ff)
112		AM_RANGE(0x1b0000, 0x1b03ff) AM_WRITE(paletteram16_xRRRRRGGGGGBBBBB_word_w) AM_BASE(&paletteram16)
113		AM_RANGE(0x1e0000, 0x1e3fff) AM_WRITE(gumbo_fg_videoram_w) AM_BASE(&gumbo_fg_videoram) // fg tilemap
114		AM_RANGE(0x1f0000, 0x1f0fff) AM_WRITE(gumbo_bg_videoram_w) AM_BASE(&gumbo_bg_videoram) // bg tilemap
115		ADDRESS_MAP_END
116
117	91	static INPUT_PORTS_START( gumbo )
118	92	PORT_START("P1_P2")
119	93	PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_COIN1 )
r4679	r4680
262	236
263	237	static MACHINE_DRIVER_START( gumbo )
264	238	MDRV_CPU_ADD("maincpu", M68000, 14318180 /2)    // or 10mhz? ?
265		MDRV_CPU_PROGRAM_MAP(gumbo_readmem,gumbo_writemem)
	239	MDRV_CPU_PROGRAM_MAP(gumbo_map,0)
266	240	MDRV_CPU_VBLANK_INT("screen", irq1_line_hold) // all the same
267	241
268	242	MDRV_GFXDECODE(gumbo)
r4679	r4680
291	265	static MACHINE_DRIVER_START( mspuzzle )
292	266	MDRV_IMPORT_FROM(gumbo)
293	267	MDRV_CPU_MODIFY("maincpu")
294		MDRV_CPU_PROGRAM_MAP(mspuzzle_readmem,mspuzzle_writemem)
	268	MDRV_CPU_PROGRAM_MAP(mspuzzle_map,0)
295	269	MACHINE_DRIVER_END
296	270
297	271	static MACHINE_DRIVER_START( dblpoint )
298	272	MDRV_IMPORT_FROM(gumbo)
299	273	MDRV_CPU_MODIFY("maincpu")
300		MDRV_CPU_PROGRAM_MAP(dblpoint_readmem,dblpoint_writemem)
	274	MDRV_CPU_PROGRAM_MAP(dblpoint_map,0)
301	275	MACHINE_DRIVER_END
302	276
303	277	ROM_START( gumbo )

src/mame/drivers/getrivia.c

r4679	r4680
138	138
139	139	static WRITE8_DEVICE_HANDLER( sound_w )
140	140	{
141		const address_space *space = cpu_get_address_space(device->machine->cpu[0], ADDRESS_SPACE_PROGRAM);
	141	const address_space *space = cputag_get_address_space(device->machine, "cpu", ADDRESS_SPACE_PROGRAM);
142	142
143	143	/* bit 3 - coin lockout, lamp10 in poker / lamp6 in trivia test modes */
144	144	coin_lockout_global_w(~data & 0x08);
r4679	r4680
179	179
180	180	static WRITE8_DEVICE_HANDLER( nmi_w )
181	181	{
182		const address_space *space = cpu_get_address_space(device->machine->cpu[0], ADDRESS_SPACE_PROGRAM);
	182	const address_space *space = cputag_get_address_space(device->machine, "cpu", ADDRESS_SPACE_PROGRAM);
183	183
184	184	/* bit 4 - play/raise button lamp, lamp 9 in selection test mode  */
185	185	set_led_status(8,data & 0x10);

src/mame/drivers/scregg.c

r4679	r4680
51	51
52	52	#include "driver.h"
53	53	#include "cpu/m6502/m6502.h"
54		#include "deprecat.h"
55	54	#include "sound/ay8910.h"
56	55	#include "includes/btime.h"
57	56
58	57
59		static ADDRESS_MAP_START( dommy_readmem, ADDRESS_SPACE_PROGRAM, 8 )
60		AM_RANGE(0x0000, 0x07ff) AM_READ(SMH_RAM)
61		AM_RANGE(0x2000, 0x27ff) AM_READ(SMH_RAM)
62		AM_RANGE(0x2800, 0x2bff) AM_READ(btime_mirrorvideoram_r)
63		AM_RANGE(0x4000, 0x4000) AM_READ_PORT("DSW1")
64		AM_RANGE(0x4001, 0x4001) AM_READ_PORT("DSW2")
	58	static ADDRESS_MAP_START( dommy_map, ADDRESS_SPACE_PROGRAM, 8 )
	59	AM_RANGE(0x0000, 0x07ff) AM_RAM
	60	AM_RANGE(0x2000, 0x23ff) AM_RAM AM_BASE(&btime_videoram) AM_SIZE(&btime_videoram_size)
	61	AM_RANGE(0x2400, 0x27ff) AM_RAM AM_BASE(&btime_colorram)
	62	AM_RANGE(0x2800, 0x2bff) AM_READWRITE(btime_mirrorvideoram_r,btime_mirrorvideoram_w)
	63	AM_RANGE(0x4000, 0x4000) AM_READ_PORT("DSW1") AM_WRITENOP
	64	AM_RANGE(0x4001, 0x4001) AM_READ_PORT("DSW2") AM_WRITE(btime_video_control_w)
65	65	/*  AM_RANGE(0x4004, 0x4004)  */ /* this is read */
66	66	AM_RANGE(0x4002, 0x4002) AM_READ_PORT("P1")
67	67	AM_RANGE(0x4003, 0x4003) AM_READ_PORT("P2")
68		AM_RANGE(0xa000, 0xffff) AM_READ(SMH_ROM)
69		ADDRESS_MAP_END
70
71		static ADDRESS_MAP_START( dommy_writemem, ADDRESS_SPACE_PROGRAM, 8 )
72		AM_RANGE(0x0000, 0x07ff) AM_WRITE(SMH_RAM)
73		AM_RANGE(0x2000, 0x23ff) AM_WRITE(SMH_RAM) AM_BASE(&btime_videoram) AM_SIZE(&btime_videoram_size)
74		AM_RANGE(0x2400, 0x27ff) AM_WRITE(SMH_RAM) AM_BASE(&btime_colorram)
75		AM_RANGE(0x2800, 0x2bff) AM_WRITE(btime_mirrorvideoram_w)
76		AM_RANGE(0x4000, 0x4000) AM_WRITENOP
77		AM_RANGE(0x4001, 0x4001) AM_WRITE(btime_video_control_w)
78	68	AM_RANGE(0x4004, 0x4005) AM_DEVWRITE("ay1", ay8910_address_data_w)
79	69	AM_RANGE(0x4006, 0x4007) AM_DEVWRITE("ay2", ay8910_address_data_w)
80		AM_RANGE(0xa000, 0xffff) AM_WRITE(SMH_ROM)
	70	AM_RANGE(0xa000, 0xffff) AM_ROM
81	71	ADDRESS_MAP_END
82	72
83		static ADDRESS_MAP_START( eggs_readmem, ADDRESS_SPACE_PROGRAM, 8 )
84		AM_RANGE(0x0000, 0x07ff) AM_READ(SMH_RAM)
85		AM_RANGE(0x1000, 0x17ff) AM_READ(SMH_RAM)
86		AM_RANGE(0x1800, 0x1bff) AM_READ(btime_mirrorvideoram_r)
87		AM_RANGE(0x1c00, 0x1fff) AM_READ(btime_mirrorcolorram_r)
88		AM_RANGE(0x2000, 0x2000) AM_READ_PORT("DSW1")
89		AM_RANGE(0x2001, 0x2001) AM_READ_PORT("DSW2")
	73
	74	static ADDRESS_MAP_START( eggs_map, ADDRESS_SPACE_PROGRAM, 8 )
	75	AM_RANGE(0x0000, 0x07ff) AM_RAM
	76	AM_RANGE(0x1000, 0x13ff) AM_RAM AM_BASE(&btime_videoram) AM_SIZE(&btime_videoram_size)
	77	AM_RANGE(0x1400, 0x17ff) AM_RAM AM_BASE(&btime_colorram)
	78	AM_RANGE(0x1800, 0x1bff) AM_READWRITE(btime_mirrorvideoram_r,btime_mirrorvideoram_w)
	79	AM_RANGE(0x1c00, 0x1fff) AM_READWRITE(btime_mirrorcolorram_r,btime_mirrorcolorram_w)
	80	AM_RANGE(0x2000, 0x2000) AM_READ_PORT("DSW1") AM_WRITE(btime_video_control_w)
	81	AM_RANGE(0x2001, 0x2001) AM_READ_PORT("DSW2") AM_WRITENOP
90	82	AM_RANGE(0x2002, 0x2002) AM_READ_PORT("P1")
91	83	AM_RANGE(0x2003, 0x2003) AM_READ_PORT("P2")
92		AM_RANGE(0x3000, 0x7fff) AM_READ(SMH_ROM)
93		AM_RANGE(0xf000, 0xffff) AM_READ(SMH_ROM)    /* reset/interrupt vectors */
94		ADDRESS_MAP_END
95
96		static ADDRESS_MAP_START( eggs_writemem, ADDRESS_SPACE_PROGRAM, 8 )
97		AM_RANGE(0x0000, 0x07ff) AM_WRITE(SMH_RAM)
98		AM_RANGE(0x1000, 0x13ff) AM_WRITE(SMH_RAM) AM_BASE(&btime_videoram) AM_SIZE(&btime_videoram_size)
99		AM_RANGE(0x1400, 0x17ff) AM_WRITE(SMH_RAM) AM_BASE(&btime_colorram)
100		AM_RANGE(0x1800, 0x1bff) AM_WRITE(btime_mirrorvideoram_w)
101		AM_RANGE(0x1c00, 0x1fff) AM_WRITE(btime_mirrorcolorram_w)
102		AM_RANGE(0x2000, 0x2000) AM_WRITE(btime_video_control_w)
103		AM_RANGE(0x2001, 0x2001) AM_WRITENOP
104	84	AM_RANGE(0x2004, 0x2005) AM_DEVWRITE("ay1", ay8910_address_data_w)
105	85	AM_RANGE(0x2006, 0x2007) AM_DEVWRITE("ay2", ay8910_address_data_w)
106		AM_RANGE(0x3000, 0x7fff) AM_WRITE(SMH_ROM)
	86	AM_RANGE(0x3000, 0x7fff) AM_ROM
	87	AM_RANGE(0xf000, 0xffff) AM_ROM    /* reset/interrupt vectors */
107	88	ADDRESS_MAP_END
108	89
109	90
110
111	91	static INPUT_PORTS_START( scregg )
112	92	PORT_START("P1")
113	93	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_4WAY
r4679	r4680
224	204
225	205	/* basic machine hardware */
226	206	MDRV_CPU_ADD("maincpu", M6502, 1500000)
227		MDRV_CPU_PROGRAM_MAP(dommy_readmem,dommy_writemem)
228		MDRV_CPU_VBLANK_INT_HACK(irq0_line_hold,16)
	207	MDRV_CPU_PROGRAM_MAP(dommy_map,0)
	208	MDRV_CPU_PERIODIC_INT(irq0_line_hold,16*60) //???
229	209
230	210	/* video hardware */
231	211	MDRV_SCREEN_ADD("screen", RASTER)
r4679	r4680
257	237
258	238	/* basic machine hardware */
259	239	MDRV_CPU_ADD("maincpu", M6502, 1500000)
260		MDRV_CPU_PROGRAM_MAP(eggs_readmem,eggs_writemem)
261		MDRV_CPU_VBLANK_INT_HACK(irq0_line_hold,16)
	240	MDRV_CPU_PROGRAM_MAP(eggs_map,0)
	241	MDRV_CPU_PERIODIC_INT(irq0_line_hold,16*60) //???
262	242
263	243	/* video hardware */
264	244	MDRV_SCREEN_ADD("screen", RASTER)

src/mame/drivers/dec0.c

r4679	r4680
64	64
65	65	static WRITE16_HANDLER( dec0_control_w )
66	66	{
67		switch (offset<<1)
	67	switch (offset << 1)
68	68	{
69	69	case 0: /* Playfield & Sprite priority */
70		dec0_priority_w(space,0,data,mem_mask);
	70	dec0_priority_w(space, 0, data, mem_mask);
71	71	break;
72	72
73	73	case 2: /* DMA flag */
74		dec0_update_sprites_w(space,0,0,mem_mask);
	74	dec0_update_sprites_w(space, 0, 0, mem_mask);
75	75	break;
76	76
77	77	case 4: /* 6502 sound cpu */
78	78	if (ACCESSING_BITS_0_7)
79	79	{
80		soundlatch_w(space,0,data & 0xff);
81		cpu_set_input_line(space->machine->cpu[1],INPUT_LINE_NMI,PULSE_LINE);
	80	soundlatch_w(space, 0, data & 0xff);
	81	cputag_set_input_line(space->machine, "audiocpu", INPUT_LINE_NMI, PULSE_LINE);
82	82	}
83	83	break;
84	84
r4679	r4680
110	110
111	111	static WRITE16_HANDLER( automat_control_w )
112	112	{
113		switch (offset<<1)
	113	switch (offset << 1)
114	114	{
115	115	case 0xe: /* 6502 sound cpu */
116	116	if (ACCESSING_BITS_0_7)
117	117	{
118		soundlatch_w(space,0,data & 0xff);
119		cpu_set_input_line(space->machine->cpu[1], 0 ,HOLD_LINE);
	118	soundlatch_w(space, 0, data & 0xff);
	119	cputag_set_input_line(space->machine, "audiocpu", 0, HOLD_LINE);
120	120	}
121	121	break;
122	122
123	123	case 12: /* DMA flag */
124		dec0_update_sprites_w(space,0,0,mem_mask);
	124	dec0_update_sprites_w(space, 0, 0, mem_mask);
125	125	break;
126	126	#if 0
127	127	case 8: /* Interrupt ack (VBL - IRQ 6) */
r4679	r4680
143	143
144	144	static WRITE16_HANDLER( slyspy_control_w )
145	145	{
146		switch (offset<<1) {
	146	switch (offset << 1)
	147	{
147	148	case 0:
148	149	if (ACCESSING_BITS_0_7)
149	150	{
150		soundlatch_w(space,0,data & 0xff);
151		cpu_set_input_line(space->machine->cpu[1],INPUT_LINE_NMI,PULSE_LINE);
	151	soundlatch_w(space, 0, data & 0xff);
	152	cputag_set_input_line(space->machine, "audiocpu", INPUT_LINE_NMI, PULSE_LINE);
152	153	}
153	154	break;
154	155	case 2:
155		dec0_priority_w(space,0,data,mem_mask);
	156	dec0_priority_w(space, 0, data, mem_mask);
156	157	break;
157	158	}
158	159	}
r4679	r4680
161	162	{
162	163	if (ACCESSING_BITS_0_7)
163	164	{
164		soundlatch_w(space,0,data & 0xff);
165		cpu_set_input_line(space->machine->cpu[1],INPUT_LINE_NMI,PULSE_LINE);
	165	soundlatch_w(space, 0, data & 0xff);
	166	cputag_set_input_line(space->machine, "audiocpu", INPUT_LINE_NMI, PULSE_LINE);
166	167	}
167	168	}
168	169
169	170	/******************************************************************************/
170	171
171		static ADDRESS_MAP_START( dec0_readmem, ADDRESS_SPACE_PROGRAM, 16 )
172		AM_RANGE(0x000000, 0x05ffff) AM_READ(SMH_ROM)
173		AM_RANGE(0x242800, 0x243fff) AM_READ(SMH_RAM) /* Robocop only */
174		AM_RANGE(0x244000, 0x245fff) AM_READ(SMH_RAM)
175		AM_RANGE(0x24a000, 0x24a7ff) AM_READ(SMH_RAM)
176		AM_RANGE(0x24c800, 0x24c87f) AM_READ(SMH_RAM)
177		AM_RANGE(0x24d000, 0x24d7ff) AM_READ(SMH_RAM)
178		AM_RANGE(0x300000, 0x30001f) AM_READ(dec0_rotary_r)
179		AM_RANGE(0x30c000, 0x30c00b) AM_READ(dec0_controls_r)
180		AM_RANGE(0x310000, 0x3107ff) AM_READ(SMH_RAM)
181		AM_RANGE(0x314000, 0x3147ff) AM_READ(SMH_RAM)
182		AM_RANGE(0xff8000, 0xffbfff) AM_READ(SMH_RAM) /* Main ram */
183		AM_RANGE(0xffc000, 0xffc7ff) AM_READ(SMH_RAM) /* Sprites */
184		ADDRESS_MAP_END
185
186		static ADDRESS_MAP_START( dec0_writemem, ADDRESS_SPACE_PROGRAM, 16 )
187		AM_RANGE(0x000000, 0x05ffff) AM_WRITE(SMH_ROM)
188		AM_RANGE(0x240000, 0x240007) AM_WRITE(dec0_pf1_control_0_w)   /* text layer */
	172	static ADDRESS_MAP_START( dec0_map, ADDRESS_SPACE_PROGRAM, 16 )
	173	AM_RANGE(0x000000, 0x05ffff) AM_ROM
	174	AM_RANGE(0x240000, 0x240007) AM_WRITE(dec0_pf1_control_0_w)                        /* text layer */
189	175	AM_RANGE(0x240010, 0x240017) AM_WRITE(dec0_pf1_control_1_w)
190	176	AM_RANGE(0x242000, 0x24207f) AM_WRITE(SMH_RAM) AM_BASE(&dec0_pf1_colscroll)
191	177	AM_RANGE(0x242400, 0x2427ff) AM_WRITE(SMH_RAM) AM_BASE(&dec0_pf1_rowscroll)
192		AM_RANGE(0x242800, 0x243fff) AM_WRITE(SMH_RAM) /* Robocop only */
193		AM_RANGE(0x244000, 0x245fff) AM_WRITE(dec0_pf1_data_w) AM_BASE(&dec0_pf1_data)
194
195		AM_RANGE(0x246000, 0x246007) AM_WRITE(dec0_pf2_control_0_w)   /* first tile layer */
	178	AM_RANGE(0x242800, 0x243fff) AM_RAM                                          /* Robocop only */
	179	AM_RANGE(0x244000, 0x245fff) AM_RAM_WRITE(dec0_pf1_data_w) AM_BASE(&dec0_pf1_data)
	180	AM_RANGE(0x246000, 0x246007) AM_WRITE(dec0_pf2_control_0_w)                        /* first tile layer */
196	181	AM_RANGE(0x246010, 0x246017) AM_WRITE(dec0_pf2_control_1_w)
197	182	AM_RANGE(0x248000, 0x24807f) AM_WRITE(SMH_RAM) AM_BASE(&dec0_pf2_colscroll)
198	183	AM_RANGE(0x248400, 0x2487ff) AM_WRITE(SMH_RAM) AM_BASE(&dec0_pf2_rowscroll)
199		AM_RANGE(0x24a000, 0x24a7ff) AM_WRITE(dec0_pf2_data_w) AM_BASE(&dec0_pf2_data)
200
201		AM_RANGE(0x24c000, 0x24c007) AM_WRITE(dec0_pf3_control_0_w)   /* second tile layer */
	184	AM_RANGE(0x24a000, 0x24a7ff) AM_RAM_WRITE(dec0_pf2_data_w) AM_BASE(&dec0_pf2_data)
	185	AM_RANGE(0x24c000, 0x24c007) AM_WRITE(dec0_pf3_control_0_w)                        /* second tile layer */
202	186	AM_RANGE(0x24c010, 0x24c017) AM_WRITE(dec0_pf3_control_1_w)
203		AM_RANGE(0x24c800, 0x24c87f) AM_WRITE(SMH_RAM) AM_BASE(&dec0_pf3_colscroll)
	187	AM_RANGE(0x24c800, 0x24c87f) AM_RAM AM_BASE(&dec0_pf3_colscroll)
204	188	AM_RANGE(0x24cc00, 0x24cfff) AM_WRITE(SMH_RAM) AM_BASE(&dec0_pf3_rowscroll)
205		AM_RANGE(0x24d000, 0x24d7ff) AM_WRITE(dec0_pf3_data_w) AM_BASE(&dec0_pf3_data)
206
207		AM_RANGE(0x30c010, 0x30c01f) AM_WRITE(dec0_control_w)   /* Priority, sound, etc. */
208		AM_RANGE(0x310000, 0x3107ff) AM_WRITE(dec0_paletteram_rg_w) AM_BASE(&paletteram16)   /* Red & Green bits */
209		AM_RANGE(0x314000, 0x3147ff) AM_WRITE(dec0_paletteram_b_w) AM_BASE(&paletteram16_2)   /* Blue bits */
210		AM_RANGE(0xff8000, 0xffbfff) AM_WRITE(SMH_RAM) AM_BASE(&dec0_ram)
211		AM_RANGE(0xffc000, 0xffc7ff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16)
	189	AM_RANGE(0x24d000, 0x24d7ff) AM_RAM_WRITE(dec0_pf3_data_w) AM_BASE(&dec0_pf3_data)
	190	AM_RANGE(0x300000, 0x30001f) AM_READ(dec0_rotary_r)
	191	AM_RANGE(0x30c000, 0x30c00b) AM_READ(dec0_controls_r)
	192	AM_RANGE(0x30c010, 0x30c01f) AM_WRITE(dec0_control_w)                           /* Priority, sound, etc. */
	193	AM_RANGE(0x310000, 0x3107ff) AM_RAM_WRITE(dec0_paletteram_rg_w) AM_BASE(&paletteram16)
	194	AM_RANGE(0x314000, 0x3147ff) AM_RAM_WRITE(dec0_paletteram_b_w) AM_BASE(&paletteram16_2)
	195	AM_RANGE(0xff8000, 0xffbfff) AM_RAM AM_BASE(&dec0_ram)                            /* Main ram */
	196	AM_RANGE(0xffc000, 0xffc7ff) AM_RAM AM_BASE(&spriteram16)                        /* Sprites */
212	197	ADDRESS_MAP_END
213	198
214		static ADDRESS_MAP_START( robocop_sub_readmem, ADDRESS_SPACE_PROGRAM, 8 )
215		AM_RANGE(0x000000, 0x00ffff) AM_READ(SMH_ROM)
216		AM_RANGE(0x1f0000, 0x1f1fff) AM_READ(SMH_RAM) /* Main ram */
217		AM_RANGE(0x1f2000, 0x1f3fff) AM_READ(SMH_RAM) /* Shared ram */
218		ADDRESS_MAP_END
219
220		static ADDRESS_MAP_START( robocop_sub_writemem, ADDRESS_SPACE_PROGRAM, 8 )
221		AM_RANGE(0x000000, 0x00ffff) AM_WRITE(SMH_ROM)
222		AM_RANGE(0x1f0000, 0x1f1fff) AM_WRITE(SMH_RAM) /* Main ram */
223		AM_RANGE(0x1f2000, 0x1f3fff) AM_WRITE(SMH_RAM) AM_BASE(&robocop_shared_ram) /* Shared ram */
	199	static ADDRESS_MAP_START( robocop_sub_map, ADDRESS_SPACE_PROGRAM, 8 )
	200	AM_RANGE(0x000000, 0x00ffff) AM_ROM
	201	AM_RANGE(0x1f0000, 0x1f1fff) AM_RAM                           /* Main ram */
	202	AM_RANGE(0x1f2000, 0x1f3fff) AM_RAM AM_BASE(&robocop_shared_ram)   /* Shared ram */
224	203	AM_RANGE(0x1ff400, 0x1ff403) AM_WRITE(h6280_irq_status_w)
225	204	ADDRESS_MAP_END
226	205
227		static ADDRESS_MAP_START( hippodrm_sub_readmem, ADDRESS_SPACE_PROGRAM, 8 )
228		AM_RANGE(0x000000, 0x00ffff) AM_READ(SMH_ROM)
229		AM_RANGE(0x180000, 0x1800ff) AM_READ(hippodrm_shared_r)
230		AM_RANGE(0x1a1000, 0x1a17ff) AM_READ(dec0_pf3_data_8bit_r)
231		AM_RANGE(0x1d0000, 0x1d00ff) AM_READ(hippodrm_prot_r)
232		AM_RANGE(0x1f0000, 0x1f1fff) AM_READ(SMH_BANK8) /* Main ram */
233		AM_RANGE(0x1ff402, 0x1ff403) AM_READ_PORT("VBLANK")
234		ADDRESS_MAP_END
235
236		static ADDRESS_MAP_START( hippodrm_sub_writemem, ADDRESS_SPACE_PROGRAM, 8 )
237		AM_RANGE(0x000000, 0x00ffff) AM_WRITE(SMH_ROM)
238		AM_RANGE(0x180000, 0x1800ff) AM_WRITE(hippodrm_shared_w)
	206	static ADDRESS_MAP_START( hippodrm_sub_map, ADDRESS_SPACE_PROGRAM, 8 )
	207	AM_RANGE(0x000000, 0x00ffff) AM_ROM
	208	AM_RANGE(0x180000, 0x1800ff) AM_READWRITE(hippodrm_shared_r, hippodrm_shared_w)
239	209	AM_RANGE(0x1a0000, 0x1a001f) AM_WRITE(dec0_pf3_control_8bit_w)
240		AM_RANGE(0x1a1000, 0x1a17ff) AM_WRITE(dec0_pf3_data_8bit_w)
241		AM_RANGE(0x1d0000, 0x1d00ff) AM_WRITE(hippodrm_prot_w)
242		AM_RANGE(0x1f0000, 0x1f1fff) AM_WRITE(SMH_BANK8) /* Main ram */
	210	AM_RANGE(0x1a1000, 0x1a17ff) AM_READWRITE(dec0_pf3_data_8bit_r, dec0_pf3_data_8bit_w)
	211	AM_RANGE(0x1d0000, 0x1d00ff) AM_READWRITE(hippodrm_prot_r, hippodrm_prot_w)
	212	AM_RANGE(0x1f0000, 0x1f1fff) AM_RAMBANK(8) /* Main ram */
243	213	AM_RANGE(0x1ff400, 0x1ff403) AM_WRITE(h6280_irq_status_w)
	214	AM_RANGE(0x1ff402, 0x1ff403) AM_READ_PORT("VBLANK")
244	215	ADDRESS_MAP_END
245	216
246		static ADDRESS_MAP_START( slyspy_readmem, ADDRESS_SPACE_PROGRAM, 16 )
247		AM_RANGE(0x000000, 0x05ffff) AM_READ(SMH_ROM)
248		AM_RANGE(0x244000, 0x244001) AM_READ(slyspy_state_r) /* protection */
249		AM_RANGE(0x304000, 0x307fff) AM_READ(SMH_RAM) /* Sly spy main ram */
250		AM_RANGE(0x308000, 0x3087ff) AM_READ(SMH_RAM) /* Sprites */
251		AM_RANGE(0x310000, 0x3107ff) AM_READ(SMH_RAM)
252		AM_RANGE(0x314008, 0x31400f) AM_READ(slyspy_controls_r)
253		AM_RANGE(0x31c000, 0x31c00f) AM_READ(slyspy_protection_r)
254		ADDRESS_MAP_END
	217	static ADDRESS_MAP_START( slyspy_map, ADDRESS_SPACE_PROGRAM, 16 )
	218	AM_RANGE(0x000000, 0x05ffff) AM_ROM
255	219
256		static ADDRESS_MAP_START( slyspy_writemem, ADDRESS_SPACE_PROGRAM, 16 )
257		AM_RANGE(0x000000, 0x05ffff) AM_WRITE(SMH_ROM)
258
259	220	/* These locations aren't real!  They are just there so memory is allocated */
	221	AM_RANGE(0x200000, 0x2007ff) AM_WRITENOP AM_BASE(&dec0_pf2_data)
	222	AM_RANGE(0x202000, 0x203fff) AM_WRITENOP AM_BASE(&dec0_pf1_data)
260	223	AM_RANGE(0x232000, 0x23207f) AM_WRITENOP AM_BASE(&dec0_pf2_colscroll)
261	224	AM_RANGE(0x232400, 0x2327ff) AM_WRITENOP AM_BASE(&dec0_pf2_rowscroll)
262	225	AM_RANGE(0x23c000, 0x23c07f) AM_WRITENOP AM_BASE(&dec0_pf1_colscroll)
263	226	AM_RANGE(0x23c400, 0x23c7ff) AM_WRITENOP AM_BASE(&dec0_pf1_rowscroll)
264		AM_RANGE(0x200000, 0x2007ff) AM_WRITENOP AM_BASE(&dec0_pf2_data)
265		AM_RANGE(0x202000, 0x203fff) AM_WRITENOP AM_BASE(&dec0_pf1_data)
266	227
267		AM_RANGE(0x244000, 0x244001) AM_WRITENOP /* Extra protection? */
	228	AM_RANGE(0x244000, 0x244001) AM_READ(slyspy_state_r) AM_WRITENOP /* protection */
268	229
269	230	/* The location of p1 & pf2 can change between these according to protection */
270	231	AM_RANGE(0x240000, 0x241fff) AM_WRITE(slyspy_240000_w)
271	232	AM_RANGE(0x242000, 0x243fff) AM_WRITE(slyspy_242000_w)
272	233	AM_RANGE(0x246000, 0x247fff) AM_WRITE(slyspy_246000_w)
273	234	AM_RANGE(0x248000, 0x249fff) AM_WRITE(slyspy_248000_w)
	235	AM_RANGE(0x24a000, 0x24a001) AM_WRITE(slyspy_state_w) /* Protection */
274	236	AM_RANGE(0x24c000, 0x24dfff) AM_WRITE(slyspy_24c000_w)
275	237	AM_RANGE(0x24e000, 0x24ffff) AM_WRITE(slyspy_24e000_w)
276	238
277		AM_RANGE(0x24a000, 0x24a001) AM_WRITE(slyspy_state_w) /* Protection */
278
279	239	/* Pf3 is unaffected by protection */
280	240	AM_RANGE(0x300000, 0x300007) AM_WRITE(dec0_pf3_control_0_w)
281	241	AM_RANGE(0x300010, 0x300017) AM_WRITE(dec0_pf3_control_1_w)
r4679	r4680
283	243	AM_RANGE(0x300c00, 0x300fff) AM_WRITE(SMH_RAM) AM_BASE(&dec0_pf3_rowscroll)
284	244	AM_RANGE(0x301000, 0x3017ff) AM_WRITE(dec0_pf3_data_w) AM_BASE(&dec0_pf3_data)
285	245
286		AM_RANGE(0x304000, 0x307fff) AM_WRITE(SMH_RAM) AM_BASE(&dec0_ram) /* Sly spy main ram */
287		AM_RANGE(0x308000, 0x3087ff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16)
288		AM_RANGE(0x310000, 0x3107ff) AM_WRITE(paletteram16_xxxxBBBBGGGGRRRR_word_w) AM_BASE(&paletteram16)
	246	AM_RANGE(0x304000, 0x307fff) AM_RAM AM_BASE(&dec0_ram)    /* Sly spy main ram */
	247	AM_RANGE(0x308000, 0x3087ff) AM_RAM AM_BASE(&spriteram16)   /* Sprites */
	248	AM_RANGE(0x310000, 0x3107ff) AM_RAM_WRITE(paletteram16_xxxxBBBBGGGGRRRR_word_w) AM_BASE(&paletteram16)
289	249	AM_RANGE(0x314000, 0x314003) AM_WRITE(slyspy_control_w)
290		AM_RANGE(0x31c000, 0x31c00f) AM_WRITENOP
	250	AM_RANGE(0x314008, 0x31400f) AM_READ(slyspy_controls_r)
	251	AM_RANGE(0x31c000, 0x31c00f) AM_READ(slyspy_protection_r) AM_WRITENOP
291	252	ADDRESS_MAP_END
292	253
293		static ADDRESS_MAP_START( midres_readmem, ADDRESS_SPACE_PROGRAM, 16 )
294		AM_RANGE(0x000000, 0x07ffff) AM_READ(SMH_ROM)
295		AM_RANGE(0x100000, 0x103fff) AM_READ(SMH_RAM)
296		AM_RANGE(0x120000, 0x1207ff) AM_READ(SMH_RAM)
297		AM_RANGE(0x180000, 0x18000f) AM_READ(midres_controls_r)
298		AM_RANGE(0x240000, 0x24007f) AM_READ(SMH_RAM)
299		AM_RANGE(0x240400, 0x2407ff) AM_READ(SMH_RAM)
300		AM_RANGE(0x2c0000, 0x2c007f) AM_READ(SMH_RAM)
301		AM_RANGE(0x2c0400, 0x2c07ff) AM_READ(SMH_RAM)
302		AM_RANGE(0x340000, 0x34007f) AM_READ(SMH_RAM)
303		AM_RANGE(0x340400, 0x3407ff) AM_READ(SMH_RAM)
304		AM_RANGE(0x320000, 0x321fff) AM_READ(SMH_RAM)
305		ADDRESS_MAP_END
306
307		static ADDRESS_MAP_START( midres_writemem, ADDRESS_SPACE_PROGRAM, 16 )
308		AM_RANGE(0x000000, 0x07ffff) AM_WRITE(SMH_ROM)
309		AM_RANGE(0x100000, 0x103fff) AM_WRITE(SMH_RAM) AM_BASE(&dec0_ram)
310		AM_RANGE(0x120000, 0x1207ff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16)
	254	static ADDRESS_MAP_START( midres_map, ADDRESS_SPACE_PROGRAM, 16 )
	255	AM_RANGE(0x000000, 0x07ffff) AM_ROM
	256	AM_RANGE(0x100000, 0x103fff) AM_RAM AM_BASE(&dec0_ram)
	257	AM_RANGE(0x120000, 0x1207ff) AM_RAM AM_BASE(&spriteram16)
311	258	AM_RANGE(0x140000, 0x1407ff) AM_WRITE(paletteram16_xxxxBBBBGGGGRRRR_word_w) AM_BASE(&paletteram16)
312	259	AM_RANGE(0x160000, 0x160001) AM_WRITE(dec0_priority_w)
	260	AM_RANGE(0x180000, 0x18000f) AM_READ(midres_controls_r)
313	261	AM_RANGE(0x180008, 0x18000f) AM_WRITENOP /* ?? watchdog ?? */
314	262	AM_RANGE(0x1a0000, 0x1a0001) AM_WRITE(midres_sound_w)
315	263
r4679	r4680
317	265	AM_RANGE(0x200010, 0x200017) AM_WRITE(dec0_pf2_control_1_w)
318	266	AM_RANGE(0x220000, 0x2207ff) AM_WRITE(dec0_pf2_data_w) AM_BASE(&dec0_pf2_data)
319	267	AM_RANGE(0x220800, 0x220fff) AM_WRITE(dec0_pf2_data_w)   /* mirror address used in end sequence */
320		AM_RANGE(0x240000, 0x24007f) AM_WRITE(SMH_RAM) AM_BASE(&dec0_pf2_colscroll)
321		AM_RANGE(0x240400, 0x2407ff) AM_WRITE(SMH_RAM) AM_BASE(&dec0_pf2_rowscroll)
	268	AM_RANGE(0x240000, 0x24007f) AM_RAM AM_BASE(&dec0_pf2_colscroll)
	269	AM_RANGE(0x240400, 0x2407ff) AM_RAM AM_BASE(&dec0_pf2_rowscroll)
322	270
323	271	AM_RANGE(0x280000, 0x280007) AM_WRITE(dec0_pf3_control_0_w)
324	272	AM_RANGE(0x280010, 0x280017) AM_WRITE(dec0_pf3_control_1_w)
325	273	AM_RANGE(0x2a0000, 0x2a07ff) AM_WRITE(dec0_pf3_data_w) AM_BASE(&dec0_pf3_data)
326		AM_RANGE(0x2c0000, 0x2c007f) AM_WRITE(SMH_RAM) AM_BASE(&dec0_pf3_colscroll)
327		AM_RANGE(0x2c0400, 0x2c07ff) AM_WRITE(SMH_RAM) AM_BASE(&dec0_pf3_rowscroll)
	274	AM_RANGE(0x2c0000, 0x2c007f) AM_RAM AM_BASE(&dec0_pf3_colscroll)
	275	AM_RANGE(0x2c0400, 0x2c07ff) AM_RAM AM_BASE(&dec0_pf3_rowscroll)
328	276
329	277	AM_RANGE(0x300000, 0x300007) AM_WRITE(dec0_pf1_control_0_w)
330	278	AM_RANGE(0x300010, 0x300017) AM_WRITE(dec0_pf1_control_1_w)
331	279	AM_RANGE(0x320000, 0x321fff) AM_WRITE(dec0_pf1_data_w) AM_BASE(&dec0_pf1_data)
332		AM_RANGE(0x340000, 0x34007f) AM_WRITE(SMH_RAM) AM_BASE(&dec0_pf1_colscroll)
333		AM_RANGE(0x340400, 0x3407ff) AM_WRITE(SMH_RAM) AM_BASE(&dec0_pf1_rowscroll)
	280	AM_RANGE(0x340000, 0x34007f) AM_RAM AM_BASE(&dec0_pf1_colscroll)
	281	AM_RANGE(0x340400, 0x3407ff) AM_RAM AM_BASE(&dec0_pf1_rowscroll)
	282
	283	AM_RANGE(0x320000, 0x321fff) AM_RAM
334	284	ADDRESS_MAP_END
335	285
336	286	/******************************************************************************/
337	287
338		static ADDRESS_MAP_START( dec0_s_readmem, ADDRESS_SPACE_PROGRAM, 8 )
339		AM_RANGE(0x0000, 0x05ff) AM_READ(SMH_RAM)
340		AM_RANGE(0x3000, 0x3000) AM_READ(soundlatch_r)
341		AM_RANGE(0x3800, 0x3800) AM_DEVREAD("oki", okim6295_r)
342		AM_RANGE(0x8000, 0xffff) AM_READ(SMH_ROM)
343		ADDRESS_MAP_END
344
345		static ADDRESS_MAP_START( dec0_s_writemem, ADDRESS_SPACE_PROGRAM, 8 )
346		AM_RANGE(0x0000, 0x05ff) AM_WRITE(SMH_RAM)
	288	static ADDRESS_MAP_START( dec0_s_map, ADDRESS_SPACE_PROGRAM, 8 )
	289	AM_RANGE(0x0000, 0x05ff) AM_RAM
347	290	AM_RANGE(0x0800, 0x0801) AM_DEVWRITE("ym1", ym2203_w)
348	291	AM_RANGE(0x1000, 0x1001) AM_DEVWRITE("ym2", ym3812_w)
349		AM_RANGE(0x3800, 0x3800) AM_DEVWRITE("oki", okim6295_w)
350		AM_RANGE(0x8000, 0xffff) AM_WRITE(SMH_ROM)
	292	AM_RANGE(0x3000, 0x3000) AM_READ(soundlatch_r)
	293	AM_RANGE(0x3800, 0x3800) AM_DEVREADWRITE("oki", okim6295_r, okim6295_w)
	294	AM_RANGE(0x8000, 0xffff) AM_RAM
351	295	ADDRESS_MAP_END
352	296
353	297	/* Physical memory map (21 bits) */
354		static ADDRESS_MAP_START( slyspy_s_readmem, ADDRESS_SPACE_PROGRAM, 8 )
355		AM_RANGE(0x000000, 0x00ffff) AM_READ(SMH_ROM)
356		AM_RANGE(0x0a0000, 0x0a0001) AM_READNOP /* Protection counter */
357		AM_RANGE(0x0e0000, 0x0e0001) AM_DEVREAD("oki", okim6295_r)
358		AM_RANGE(0x0f0000, 0x0f0001) AM_READ(soundlatch_r)
359		AM_RANGE(0x1f0000, 0x1f1fff) AM_READ(SMH_BANK8)
360		ADDRESS_MAP_END
361
362		static ADDRESS_MAP_START( slyspy_s_writemem, ADDRESS_SPACE_PROGRAM, 8 )
363		AM_RANGE(0x000000, 0x00ffff) AM_WRITE(SMH_ROM)
	298	static ADDRESS_MAP_START( slyspy_s_map, ADDRESS_SPACE_PROGRAM, 8 )
	299	AM_RANGE(0x000000, 0x00ffff) AM_ROM
364	300	AM_RANGE(0x090000, 0x090001) AM_DEVWRITE("ym2", ym3812_w)
	301	AM_RANGE(0x0a0000, 0x0a0001) AM_READNOP /* Protection counter */
365	302	AM_RANGE(0x0b0000, 0x0b0001) AM_DEVWRITE("ym1", ym2203_w)
366		AM_RANGE(0x0e0000, 0x0e0001) AM_DEVWRITE("oki", okim6295_w)
367		AM_RANGE(0x1f0000, 0x1f1fff) AM_WRITE(SMH_BANK8) /* Main ram */
	303	AM_RANGE(0x0e0000, 0x0e0001) AM_DEVREADWRITE("oki", okim6295_r, okim6295_w)
	304	AM_RANGE(0x0f0000, 0x0f0001) AM_READ(soundlatch_r)
	305	AM_RANGE(0x1f0000, 0x1f1fff) AM_RAMBANK(8)
368	306	AM_RANGE(0x1ff400, 0x1ff403) AM_WRITE(h6280_irq_status_w)
369	307	ADDRESS_MAP_END
370	308
371		static ADDRESS_MAP_START( midres_s_readmem, ADDRESS_SPACE_PROGRAM, 8 )
372		AM_RANGE(0x000000, 0x00ffff) AM_READ(SMH_ROM)
373		AM_RANGE(0x130000, 0x130001) AM_DEVREAD("oki", okim6295_r)
374		AM_RANGE(0x138000, 0x138001) AM_READ(soundlatch_r)
375		AM_RANGE(0x1f0000, 0x1f1fff) AM_READ(SMH_BANK8)
376		ADDRESS_MAP_END
377
378		static ADDRESS_MAP_START( midres_s_writemem, ADDRESS_SPACE_PROGRAM, 8 )
379		AM_RANGE(0x000000, 0x00ffff) AM_WRITE(SMH_ROM)
	309	static ADDRESS_MAP_START( midres_s_map, ADDRESS_SPACE_PROGRAM, 8 )
	310	AM_RANGE(0x000000, 0x00ffff) AM_ROM
380	311	AM_RANGE(0x108000, 0x108001) AM_DEVWRITE("ym2", ym3812_w)
381	312	AM_RANGE(0x118000, 0x118001) AM_DEVWRITE("ym1", ym2203_w)
382		AM_RANGE(0x130000, 0x130001) AM_DEVWRITE("oki", okim6295_w)
383		AM_RANGE(0x1f0000, 0x1f1fff) AM_WRITE(SMH_BANK8) /* Main ram */
	313	AM_RANGE(0x130000, 0x130001) AM_DEVREADWRITE("oki", okim6295_r, okim6295_w)
	314	AM_RANGE(0x138000, 0x138001) AM_READ(soundlatch_r)
	315	AM_RANGE(0x1f0000, 0x1f1fff) AM_RAMBANK(8)
384	316	AM_RANGE(0x1ff400, 0x1ff403) AM_WRITE(h6280_irq_status_w)
385	317	ADDRESS_MAP_END
386	318
r4679	r4680
412	344	AM_RANGE(0xb08000, 0xb087ff) AM_RAM AM_BASE(&spriteram16) /* Sprites */
413	345	ADDRESS_MAP_END
414	346
415		static ADDRESS_MAP_START( automat_readmem, ADDRESS_SPACE_PROGRAM, 16 )
416		AM_RANGE(0x000000, 0x05ffff) AM_READ(SMH_ROM)
417		AM_RANGE(0x242800, 0x243fff) AM_READ(SMH_RAM) /* Robocop only */
418		AM_RANGE(0x244000, 0x245fff) AM_READ(SMH_RAM)
419		AM_RANGE(0x24a000, 0x24a7ff) AM_READ(SMH_RAM)
420		AM_RANGE(0x24c800, 0x24c87f) AM_READ(SMH_RAM)
421		AM_RANGE(0x24d000, 0x24d7ff) AM_READ(SMH_RAM)
422		AM_RANGE(0x300000, 0x30001f) AM_READ(dec0_rotary_r)
423		AM_RANGE(0x30c000, 0x30c00b) AM_READ(dec0_controls_r)
424		AM_RANGE(0x310000, 0x3107ff) AM_READ(SMH_RAM)
425		AM_RANGE(0x314000, 0x3147ff) AM_READ(SMH_RAM)
426		AM_RANGE(0xff8000, 0xffbfff) AM_READ(SMH_RAM) /* Main ram */
427		AM_RANGE(0xffc000, 0xffc7ff) AM_READ(SMH_RAM) /* Sprites */
428		ADDRESS_MAP_END
	347	static ADDRESS_MAP_START( automat_map, ADDRESS_SPACE_PROGRAM, 16 )
	348	AM_RANGE(0x000000, 0x05ffff) AM_ROM
429	349
430		static ADDRESS_MAP_START( automat_writemem, ADDRESS_SPACE_PROGRAM, 16 )
431		AM_RANGE(0x000000, 0x05ffff) AM_WRITE(SMH_ROM)
432		AM_RANGE(0x240000, 0x240007) AM_WRITE(dec0_pf1_control_0_w)   /* text layer */
	350	AM_RANGE(0x240000, 0x240007) AM_WRITE(dec0_pf1_control_0_w)         /* text layer */
433	351	AM_RANGE(0x240010, 0x240017) AM_WRITE(dec0_pf1_control_1_w)
434	352	AM_RANGE(0x242000, 0x24207f) AM_WRITE(SMH_RAM) AM_BASE(&dec0_pf1_colscroll)
435	353	AM_RANGE(0x242400, 0x2427ff) AM_WRITE(SMH_RAM) AM_BASE(&dec0_pf1_rowscroll)
436		AM_RANGE(0x242800, 0x243fff) AM_WRITE(SMH_RAM) /* Robocop only */
437		AM_RANGE(0x244000, 0x245fff) AM_WRITE(dec0_pf1_data_w) AM_BASE(&dec0_pf1_data)
438	354
439		AM_RANGE(0x246000, 0x246007) AM_WRITE(dec0_pf2_control_0_w)   /* first tile layer */
	355	AM_RANGE(0x242800, 0x243fff) AM_RAM                         /* Robocop only */
	356	AM_RANGE(0x244000, 0x245fff) AM_RAM_WRITE(dec0_pf1_data_w) AM_BASE(&dec0_pf1_data)
	357
	358	AM_RANGE(0x246000, 0x246007) AM_WRITE(dec0_pf2_control_0_w)         /* first tile layer */
440	359	AM_RANGE(0x246010, 0x246017) AM_WRITE(dec0_pf2_control_1_w)
441	360	AM_RANGE(0x248000, 0x24807f) AM_WRITE(SMH_RAM) AM_BASE(&dec0_pf2_colscroll)
442	361	AM_RANGE(0x248400, 0x2487ff) AM_WRITE(SMH_RAM) AM_BASE(&dec0_pf2_rowscroll)
443		AM_RANGE(0x24a000, 0x24a7ff) AM_WRITE(dec0_pf2_data_w) AM_BASE(&dec0_pf2_data)
444	362
445		AM_RANGE(0x24c000, 0x24c007) AM_WRITE(dec0_pf3_control_0_w)   /* second tile layer */
	363	AM_RANGE(0x24a000, 0x24a7ff) AM_RAM_WRITE(dec0_pf2_data_w) AM_BASE(&dec0_pf2_data)
	364	AM_RANGE(0x24c000, 0x24c007) AM_WRITE(dec0_pf3_control_0_w)         /* second tile layer */
446	365	AM_RANGE(0x24c010, 0x24c017) AM_WRITE(dec0_pf3_control_1_w)
447		AM_RANGE(0x24c800, 0x24c87f) AM_WRITE(SMH_RAM) AM_BASE(&dec0_pf3_colscroll)
	366	AM_RANGE(0x24c800, 0x24c87f) AM_RAM AM_BASE(&dec0_pf3_colscroll)
448	367	AM_RANGE(0x24cc00, 0x24cfff) AM_WRITE(SMH_RAM) AM_BASE(&dec0_pf3_rowscroll)
449		AM_RANGE(0x24d000, 0x24d7ff) AM_WRITE(dec0_pf3_data_w) AM_BASE(&dec0_pf3_data)
450
451		AM_RANGE(0x30c000, 0x30c01f) AM_WRITE(automat_control_w)   /* Priority, sound, etc. */
452		AM_RANGE(0x310000, 0x3107ff) AM_WRITE(paletteram16_xxxxBBBBGGGGRRRR_word_w) AM_BASE(&paletteram16)
453		AM_RANGE(0x400008, 0x400009) AM_WRITE(dec0_priority_w) // NEW
454		AM_RANGE(0xff8000, 0xffbfff) AM_WRITE(SMH_RAM) AM_BASE(&dec0_ram)
455		AM_RANGE(0xffc000, 0xffc7ff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16)
	368	AM_RANGE(0x24d000, 0x24d7ff) AM_RAM_WRITE(dec0_pf3_data_w) AM_BASE(&dec0_pf3_data)
	369	AM_RANGE(0x300000, 0x30001f) AM_READ(dec0_rotary_r)
	370	AM_RANGE(0x30c000, 0x30c00b) AM_READ(dec0_controls_r)
	371	AM_RANGE(0x30c000, 0x30c01f) AM_WRITE(automat_control_w)         /* Priority, sound, etc. */
	372	AM_RANGE(0x310000, 0x3107ff) AM_RAM_WRITE(paletteram16_xxxxBBBBGGGGRRRR_word_w) AM_BASE(&paletteram16)
	373	AM_RANGE(0x314000, 0x3147ff) AM_READ(SMH_RAM)
	374	AM_RANGE(0x400008, 0x400009) AM_WRITE(dec0_priority_w)             // NEW
	375	AM_RANGE(0xff8000, 0xffbfff) AM_RAM AM_BASE(&dec0_ram)             /* Main ram */
	376	AM_RANGE(0xffc000, 0xffc7ff) AM_RAM AM_BASE(&spriteram16)          /* Sprites */
456	377	ADDRESS_MAP_END
457	378
458
459	379	static WRITE8_HANDLER( automat_adpcm_w )
460	380	{
461	381	automat_adpcm_byte = data;
462	382	}
463	383
464		static ADDRESS_MAP_START( automat_s_mem, ADDRESS_SPACE_PROGRAM, 8 )
	384	static ADDRESS_MAP_START( automat_s_map, ADDRESS_SPACE_PROGRAM, 8 )
465	385	AM_RANGE(0xc000, 0xc7ff) AM_RAM
466	386	//  AM_RANGE(0xc800, 0xc800) AM_WRITE(ym2203_control_port_0_w)
467	387	//  AM_RANGE(0xc801, 0xc801) AM_WRITE(ym2203_write_port_0_w)
r4679	r4680
1025	945
1026	946	static void sound_irq(const device_config *device, int linestate)
1027	947	{
1028		cpu_set_input_line(device->machine->cpu[1],0,linestate); /* IRQ */
	948	cputag_set_input_line(device->machine, "audiocpu", 0, linestate); /* IRQ */
1029	949	}
1030	950
1031	951	static void sound_irq2(const device_config *device, int linestate)
1032	952	{
1033		cpu_set_input_line(device->machine->cpu[1],1,linestate); /* IRQ2 */
	953	cputag_set_input_line(device->machine, "audiocpu", 1, linestate); /* IRQ2 */
1034	954	}
1035	955
1036	956	static const ym3812_interface ym3812_config =
r4679	r4680
1055	975	else
1056	976	{
1057	977	msm5205_data_w(device, automat_adpcm_byte >> 4);
1058		cpu_set_input_line(device->machine->cpu[1], INPUT_LINE_NMI, PULSE_LINE);
	978	cputag_set_input_line(device->machine, "maincpu", INPUT_LINE_NMI, PULSE_LINE);
1059	979	}
1060	980
1061	981	automat_msm5205_vclk_toggle ^= 1;
r4679	r4680
1072	992
1073	993	/* basic machine hardware */
1074	994	MDRV_CPU_ADD("maincpu", M68000, 10000000)
1075		MDRV_CPU_PROGRAM_MAP(automat_readmem, automat_writemem)
	995	MDRV_CPU_PROGRAM_MAP(automat_map,0)
1076	996	MDRV_CPU_VBLANK_INT("screen", irq6_line_hold)/* VBL */
1077	997
1078	998	MDRV_CPU_ADD("audiocpu", Z80, 3000000)// ?
1079		MDRV_CPU_PROGRAM_MAP(automat_s_mem, 0)
	999	MDRV_CPU_PROGRAM_MAP(automat_s_map,0)
1080	1000
1081	1001	/* video hardware */
1082	1002	MDRV_SCREEN_ADD("screen", RASTER)
r4679	r4680
1116	1036
1117	1037	/* basic machine hardware */
1118	1038	MDRV_CPU_ADD("maincpu", M68000, 10000000)
1119		MDRV_CPU_PROGRAM_MAP(dec0_readmem,dec0_writemem)
	1039	MDRV_CPU_PROGRAM_MAP(dec0_map,0)
1120	1040	MDRV_CPU_VBLANK_INT("screen", irq6_line_hold)/* VBL, level 5 interrupts from i8751 */
1121	1041
1122	1042	MDRV_CPU_ADD("audiocpu", M6502, 1500000)
1123		MDRV_CPU_PROGRAM_MAP(dec0_s_readmem,dec0_s_writemem)
	1043	MDRV_CPU_PROGRAM_MAP(dec0_s_map,0)
1124	1044
1125	1045	/* video hardware */
1126	1046	MDRV_SCREEN_ADD("screen", RASTER)
r4679	r4680
1158	1078
1159	1079	/* basic machine hardware */
1160	1080	MDRV_CPU_ADD("maincpu", M68000, 10000000)
1161		MDRV_CPU_PROGRAM_MAP(dec0_readmem,dec0_writemem)
	1081	MDRV_CPU_PROGRAM_MAP(dec0_map,0)
1162	1082	MDRV_CPU_VBLANK_INT("screen", irq6_line_hold)/* VBL, level 5 interrupts from i8751 */
1163	1083
1164	1084	MDRV_CPU_ADD("audiocpu", M6502, 1500000)
1165		MDRV_CPU_PROGRAM_MAP(dec0_s_readmem,dec0_s_writemem)
	1085	MDRV_CPU_PROGRAM_MAP(dec0_s_map,0)
1166	1086
1167	1087	/* video hardware */
1168	1088	MDRV_SCREEN_ADD("screen", RASTER)
r4679	r4680
1200	1120
1201	1121	/* basic machine hardware */
1202	1122	MDRV_CPU_ADD("maincpu", M68000, 10000000)
1203		MDRV_CPU_PROGRAM_MAP(dec0_readmem,dec0_writemem)
	1123	MDRV_CPU_PROGRAM_MAP(dec0_map,0)
1204	1124	MDRV_CPU_VBLANK_INT("screen", irq6_line_hold)/* VBL, level 5 interrupts from i8751 */
1205	1125
1206	1126	MDRV_CPU_ADD("audiocpu", M6502, 1500000)
1207		MDRV_CPU_PROGRAM_MAP(dec0_s_readmem,dec0_s_writemem)
	1127	MDRV_CPU_PROGRAM_MAP(dec0_s_map,0)
1208	1128
1209	1129	/* video hardware */
1210	1130	MDRV_SCREEN_ADD("screen", RASTER)
r4679	r4680
1242	1162
1243	1163	/* basic machine hardware */
1244	1164	MDRV_CPU_ADD("maincpu", M68000, 10000000)
1245		MDRV_CPU_PROGRAM_MAP(dec0_readmem,dec0_writemem)
	1165	MDRV_CPU_PROGRAM_MAP(dec0_map,0)
1246	1166	MDRV_CPU_VBLANK_INT("screen", irq6_line_hold)/* VBL */
1247	1167
1248	1168	MDRV_CPU_ADD("audiocpu", M6502, 1500000)
1249		MDRV_CPU_PROGRAM_MAP(dec0_s_readmem,dec0_s_writemem)
	1169	MDRV_CPU_PROGRAM_MAP(dec0_s_map,0)
1250	1170
1251	1171	MDRV_CPU_ADD("sub", H6280,21477200/16) /* 21.4772MHz clock */
1252		MDRV_CPU_PROGRAM_MAP(robocop_sub_readmem,robocop_sub_writemem)
	1172	MDRV_CPU_PROGRAM_MAP(robocop_sub_map,0)
1253	1173
1254	1174	MDRV_QUANTUM_TIME(HZ(3000))   /* Interleave between HuC6280 & 68000 */
1255	1175
r4679	r4680
1289	1209
1290	1210	/* basic machine hardware */
1291	1211	MDRV_CPU_ADD("maincpu", M68000, 10000000)
1292		MDRV_CPU_PROGRAM_MAP(dec0_readmem,dec0_writemem)
	1212	MDRV_CPU_PROGRAM_MAP(dec0_map,0)
1293	1213	MDRV_CPU_VBLANK_INT("screen", irq6_line_hold)/* VBL */
1294	1214
1295	1215	MDRV_CPU_ADD("audiocpu", M6502, 1500000)
1296		MDRV_CPU_PROGRAM_MAP(dec0_s_readmem,dec0_s_writemem)
	1216	MDRV_CPU_PROGRAM_MAP(dec0_s_map,0)
1297	1217
1298	1218	/* video hardware */
1299	1219	MDRV_SCREEN_ADD("screen", RASTER)
r4679	r4680
1331	1251
1332	1252	/* basic machine hardware */
1333	1253	MDRV_CPU_ADD("maincpu", M68000, 10000000)
1334		MDRV_CPU_PROGRAM_MAP(dec0_readmem,dec0_writemem)
	1254	MDRV_CPU_PROGRAM_MAP(dec0_map,0)
1335	1255	MDRV_CPU_VBLANK_INT("screen", irq6_line_hold)/* VBL */
1336	1256
1337	1257	MDRV_CPU_ADD("audiocpu", M6502, 1500000)
1338		MDRV_CPU_PROGRAM_MAP(dec0_s_readmem,dec0_s_writemem)
	1258	MDRV_CPU_PROGRAM_MAP(dec0_s_map,0)
1339	1259
1340	1260	MDRV_CPU_ADD("sub", H6280,21477200/16) /* 21.4772MHz clock */
1341		MDRV_CPU_PROGRAM_MAP(hippodrm_sub_readmem,hippodrm_sub_writemem)
	1261	MDRV_CPU_PROGRAM_MAP(hippodrm_sub_map,0)
1342	1262
1343	1263	MDRV_QUANTUM_TIME(HZ(300))   /* Interleave between H6280 & 68000 */
1344	1264
r4679	r4680
1378	1298
1379	1299	/* basic machine hardware */
1380	1300	MDRV_CPU_ADD("maincpu", M68000, XTAL_20MHz/2) /* verified on pcb (20MHZ OSC) 68000P12 running at 10Mhz */
1381		MDRV_CPU_PROGRAM_MAP(slyspy_readmem,slyspy_writemem)
	1301	MDRV_CPU_PROGRAM_MAP(slyspy_map,0)
1382	1302	MDRV_CPU_VBLANK_INT("screen", irq6_line_hold)/* VBL */
1383	1303
1384	1304	MDRV_CPU_ADD("audiocpu", H6280, XTAL_12MHz/2/3) /* verified on pcb (6Mhz is XIN on pin 10 of H6280, verified on pcb */
1385		MDRV_CPU_PROGRAM_MAP(slyspy_s_readmem,slyspy_s_writemem)
	1305	MDRV_CPU_PROGRAM_MAP(slyspy_s_map,0)
1386	1306
1387	1307	/* video hardware */
1388	1308	MDRV_SCREEN_ADD("screen", RASTER)
r4679	r4680
1425	1345
1426	1346	/* z80 */
1427	1347	//  MDRV_CPU_ADD("audiocpu", H6280, XTAL_12MHz/2/3) /* verified on pcb (6Mhz is XIN on pin 10 of H6280, verified on pcb */
1428		//  MDRV_CPU_PROGRAM_MAP(slyspy_s_readmem,slyspy_s_writemem)
	1348	//  MDRV_CPU_PROGRAM_MAP(slyspy_s_map,0)
1429	1349
1430	1350	/* video hardware */
1431	1351	MDRV_SCREEN_ADD("screen", RASTER)
r4679	r4680
1463	1383
1464	1384	/* basic machine hardware */
1465	1385	MDRV_CPU_ADD("maincpu", M68000, XTAL_20MHz/2) /* verified on pcb (20MHZ OSC) 68000P12 running at 10Mhz */
1466		MDRV_CPU_PROGRAM_MAP(midres_readmem,midres_writemem)
	1386	MDRV_CPU_PROGRAM_MAP(midres_map,0)
1467	1387	MDRV_CPU_VBLANK_INT("screen", irq6_line_hold)/* VBL */
1468	1388
1469	1389	MDRV_CPU_ADD("audiocpu", H6280, XTAL_24MHz/4/3) /* verified on pcb (6Mhz is XIN on pin 10 of H6280, verified on pcb */
1470		MDRV_CPU_PROGRAM_MAP(midres_s_readmem,midres_s_writemem)
	1390	MDRV_CPU_PROGRAM_MAP(midres_s_map,0)
1471	1391
1472	1392	/* video hardware */
1473	1393	MDRV_SCREEN_ADD("screen", RASTER)

src/mame/drivers/ssv.c

r4679	r4680
203	203	/* Update the IRQ state based on all possible causes */
204	204	static void update_irq_state(running_machine *machine)
205	205	{
206		cpu_set_input_line(machine->cpu[0], 0, (requested_int & irq_enable)? ASSERT_LINE : CLEAR_LINE);
	206	cputag_set_input_line(machine, "maincpu", 0, (requested_int & irq_enable)? ASSERT_LINE : CLEAR_LINE);
207	207	}
208	208
209	209	static IRQ_CALLBACK(ssv_irq_callback)
r4679	r4680
339	339	static MACHINE_RESET( ssv )
340	340	{
341	341	requested_int = 0;
342		cpu_set_irq_callback(machine->cpu[0], ssv_irq_callback);
	342	cpu_set_irq_callback(cputag_get_cpu(machine, "maincpu"), ssv_irq_callback);
343	343	memory_set_bankptr(machine, 1, memory_region(machine, "user1"));
344	344	}
345	345
r4679	r4680
397	397	if(offset == 0x21 && dsp_ram[0x21]) {
398	398	switch(dsp_ram[0x20]) {
399	399	case 0x0001:
400		dsp_ram[0x11] = (UINT8)(128*atan2(dsp_ram[0] - dsp_ram[1], dsp_ram[2] - dsp_ram[3])/M_PI) ^ 0x80;
	400	dsp_ram[0x11] = (UINT8)(128*atan2((double)(dsp_ram[0] - dsp_ram[1]), (double)(dsp_ram[2] - dsp_ram[3]))/M_PI) ^ 0x80;
401	401	dsp_ram[0x21] = 0;
402	402	break;
403	403	default:
r4679	r4680
422	422	static READ16_HANDLER( fake_r )   {   return ssv_scroll[offset];  }
423	423	#endif
424	424
425		#define SSV_READMEM( _ROM  )                                          \
426		AM_RANGE(0x000000, 0x00ffff) AM_READ(SMH_RAM            )   /*  RAM     */   \
427		AM_RANGE(0x100000, 0x13ffff) AM_READ(SMH_RAM            )   /*  Sprites */   \
428		AM_RANGE(0x140000, 0x15ffff) AM_READ(SMH_RAM            )   /*  Palette */   \
429		AM_RANGE(0x160000, 0x17ffff) AM_READ(SMH_RAM            )   /*          */   \
430		AM_RANGE(0x1c0000, 0x1c0001) AM_READ(ssv_vblank_r         )   /*  Vblank? */   \
431		/**/AM_RANGE(0x1c0002, 0x1c007f) AM_READ(SMH_RAM            )   /*  Scroll  */   \
432		AM_RANGE(0x210002, 0x210003) AM_READ_PORT("DSW1")                        \
433		AM_RANGE(0x210004, 0x210005) AM_READ_PORT("DSW2")                        \
434		AM_RANGE(0x210008, 0x210009) AM_READ_PORT("P1")                           \
435		AM_RANGE(0x21000a, 0x21000b) AM_READ_PORT("P2")                           \
436		AM_RANGE(0x21000c, 0x21000d) AM_READ_PORT("SYSTEM")                        \
437		AM_RANGE(0x21000e, 0x21000f) AM_READ(SMH_NOP            )   /*          */   \
438		AM_RANGE(0x300000, 0x30007f) AM_DEVREAD8("ensoniq", es5506_r, 0x00ff   )   /*  Sound   */   \
439		AM_RANGE(0x482000, 0x482fff) AM_RAM_WRITE(dsp_w) AM_BASE(&dsp_ram)            \
440		AM_RANGE(_ROM, 0xffffff) AM_READ(SMH_BANK1               )   /*  ROM  */       \
	425	#define SSV_MAP( _ROM  )                                                                     \
	426	AM_RANGE(0x000000, 0x00ffff) AM_RAM AM_BASE(&ssv_mainram)                              /*  RAM     */   \
	427	AM_RANGE(0x100000, 0x13ffff) AM_RAM AM_BASE(&spriteram16)                              /*  Sprites */   \
	428	AM_RANGE(0x140000, 0x15ffff) AM_RAM_WRITE(paletteram16_xrgb_swap_word_w) AM_BASE(&paletteram16)   /*  Palette */   \
	429	AM_RANGE(0x160000, 0x17ffff) AM_RAM                                                /*          */   \
	430	AM_RANGE(0x1c0000, 0x1c0001) AM_READ(ssv_vblank_r         )                           /*  Vblank? */   \
	431	/**/AM_RANGE(0x1c0002, 0x1c007f) AM_READ(SMH_RAM            )                           /*  Scroll  */   \
	432	AM_RANGE(0x1c0000, 0x1c007f) AM_WRITE(ssv_scroll_w) AM_BASE(&ssv_scroll)                       /*  Scroll  */  \
	433	AM_RANGE(0x210002, 0x210003) AM_READ_PORT("DSW1")                                                \
	434	AM_RANGE(0x210004, 0x210005) AM_READ_PORT("DSW2")                                                \
	435	AM_RANGE(0x210008, 0x210009) AM_READ_PORT("P1")                                                   \
	436	AM_RANGE(0x21000a, 0x21000b) AM_READ_PORT("P2")                                                   \
	437	AM_RANGE(0x21000c, 0x21000d) AM_READ_PORT("SYSTEM")                                                \
	438	AM_RANGE(0x21000e, 0x21000f) AM_READWRITE(SMH_NOP, ssv_lockout_w)                        /*  Lockout */   \
	439	AM_RANGE(0x210010, 0x210011) AM_WRITENOP                                                                    \
	440	AM_RANGE(0x230000, 0x230071) AM_WRITE(SMH_RAM) AM_BASE(&ssv_irq_vectors)                       /*  IRQ Vec */    \
	441	AM_RANGE(0x240000, 0x240071) AM_WRITE(ssv_irq_ack_w )                                          /*  IRQ Ack */   \
	442	AM_RANGE(0x260000, 0x260001) AM_WRITE(ssv_irq_enable_w)                                        /*  IRQ En  */  \
	443	AM_RANGE(0x300000, 0x30007f) AM_DEVREADWRITE8("ensoniq", es5506_r, es5506_w, 0x00ff)         /*  Sound   */   \
	444	AM_RANGE(0x482000, 0x482fff) AM_RAM_WRITE(dsp_w) AM_BASE(&dsp_ram)                                    \
	445	AM_RANGE(_ROM, 0xffffff) AM_ROMBANK(1)                                          /*  ROM     */   \
441	446	//AM_RANGE(0x990000, 0x99007f) AM_READ(fake_r)
442	447
443		#define SSV_WRITEMEM                                                                          \
444		AM_RANGE(0x000000, 0x00ffff) AM_WRITE(SMH_RAM) AM_BASE(&ssv_mainram)                    /* RAM */     \
445		AM_RANGE(0x100000, 0x13ffff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16)                    /* Sprites */ \
446		AM_RANGE(0x140000, 0x15ffff) AM_WRITE(paletteram16_xrgb_swap_word_w) AM_BASE(&paletteram16)             \
447		AM_RANGE(0x160000, 0x17ffff) AM_WRITE(SMH_RAM)                                                        \
448		AM_RANGE(0x1c0000, 0x1c007f) AM_WRITE(ssv_scroll_w) AM_BASE(&ssv_scroll )                 /*Scroll */   \
449		AM_RANGE(0x21000e, 0x21000f) AM_WRITE(ssv_lockout_w)                                      /*Lockout */  \
450		AM_RANGE(0x210010, 0x210011) AM_WRITENOP                                                        \
451		AM_RANGE(0x230000, 0x230071) AM_WRITE(SMH_RAM) AM_BASE(&ssv_irq_vectors)             /* IRQ Vectors */ \
452		AM_RANGE(0x240000, 0x240071) AM_WRITE(ssv_irq_ack_w )                                 /* IRQ Ack */     \
453		AM_RANGE(0x260000, 0x260001) AM_WRITE(ssv_irq_enable_w)                               /* IRQ Enable */  \
454		AM_RANGE(0x300000, 0x30007f) AM_DEVWRITE8("ensoniq", es5506_w, 0x00ff)         /* Sound */       \
455		//AM_RANGE(0x990000, 0x99007f) AM_WRITE(ssv_scroll_w)
456	448
457
458	449	static UINT16 *ssv_input_sel;
459	450
460	451	/***************************************************************************
r4679	r4680
466	457	return mame_rand(space->machine) & 0xffff;
467	458	}
468	459
469		static ADDRESS_MAP_START( drifto94_readmem, ADDRESS_SPACE_PROGRAM, 16 )
470		AM_RANGE(0x480000, 0x480001) AM_READ(SMH_NOP            )   // ?
471		AM_RANGE(0x510000, 0x510001) AM_READ(drifto94_rand_r      )   // ??
472		AM_RANGE(0x520000, 0x520001) AM_READ(drifto94_rand_r      )   // ??
473		AM_RANGE(0x580000, 0x5807ff) AM_READ(SMH_RAM            )   // NVRAM
474		SSV_READMEM( 0xc00000 )
	460	static ADDRESS_MAP_START( drifto94_map, ADDRESS_SPACE_PROGRAM, 16 )
	461	//  AM_RANGE(0x210002, 0x210003) AM_WRITE(SMH_NOP)                                      // ? 1 at the start
	462	AM_RANGE(0x400000, 0x47ffff) AM_WRITE(SMH_RAM)                              // ?
	463	AM_RANGE(0x480000, 0x480001) AM_NOP                                       // ?
	464	AM_RANGE(0x483000, 0x485fff) AM_WRITE(SMH_NOP)                              // ?
	465	AM_RANGE(0x500000, 0x500001) AM_WRITE(SMH_NOP)                              // ??
	466	AM_RANGE(0x510000, 0x510001) AM_READ(drifto94_rand_r      )                  // ??
	467	AM_RANGE(0x520000, 0x520001) AM_READ(drifto94_rand_r      )                  // ??
	468	AM_RANGE(0x580000, 0x5807ff) AM_RAM AM_BASE(&ssv_nvram) AM_SIZE(&ssv_nvram_size)   // NVRAM
	469	SSV_MAP( 0xc00000 )
475	470	ADDRESS_MAP_END
476		static ADDRESS_MAP_START( drifto94_writemem, ADDRESS_SPACE_PROGRAM, 16 )
477		//  AM_RANGE(0x210002, 0x210003) AM_WRITE(SMH_NOP             )   // ? 1 at the start
478		AM_RANGE(0x400000, 0x47ffff) AM_WRITE(SMH_RAM            )   // ?
479		AM_RANGE(0x480000, 0x480001) AM_WRITE(SMH_NOP            )   // ?
480		AM_RANGE(0x483000, 0x485fff) AM_WRITE(SMH_NOP            )   // ?
481		AM_RANGE(0x500000, 0x500001) AM_WRITE(SMH_NOP            )   // ??
482		AM_RANGE(0x580000, 0x5807ff) AM_WRITE(SMH_RAM) AM_BASE(&ssv_nvram) AM_SIZE(&ssv_nvram_size   )   // NVRAM
483		SSV_WRITEMEM
484		ADDRESS_MAP_END
485	471
486	472
487	473	/***************************************************************************
r4679	r4680
610	596	}
611	597	}
612	598
613		static ADDRESS_MAP_START( gdfs_readmem, ADDRESS_SPACE_PROGRAM, 16 )
	599	static ADDRESS_MAP_START( gdfs_map, ADDRESS_SPACE_PROGRAM, 16 )
	600	AM_RANGE(0x400000, 0x41ffff) AM_RAM_WRITE(gdfs_tmapram_w) AM_BASE(&gdfs_tmapram)
	601	AM_RANGE(0x420000, 0x43ffff) AM_RAM
	602	AM_RANGE(0x440000, 0x44003f) AM_RAM AM_BASE(&gdfs_tmapscroll)
	603	AM_RANGE(0x500000, 0x500001) AM_WRITE(gdfs_eeprom_w)
614	604	AM_RANGE(0x540000, 0x540001) AM_READ(gdfs_eeprom_r)
615		AM_RANGE(0x600000, 0x600fff) AM_READ(SMH_RAM)
616		AM_RANGE(0x400000, 0x43ffff) AM_READ(SMH_RAM)
617		AM_RANGE(0x440000, 0x44003f) AM_READ(SMH_RAM)
618		AM_RANGE(0x800000, 0x87ffff) AM_READ(SMH_RAM)
619		AM_RANGE(0x8c0000, 0x8c00ff) AM_READ(gdfs_blitram_r)
620		AM_RANGE(0x900000, 0x9fffff) AM_READ(gdfs_gfxram_r)
621		SSV_READMEM( 0xc00000 )
	605	AM_RANGE(0x600000, 0x600fff) AM_RAM
	606	AM_RANGE(0x800000, 0x87ffff) AM_RAM AM_BASE(&spriteram16_2)
	607	AM_RANGE(0x8c0000, 0x8c00ff) AM_READWRITE(gdfs_blitram_r, gdfs_blitram_w) AM_BASE(&gdfs_blitram)
	608	AM_RANGE(0x900000, 0x9fffff) AM_READWRITE(gdfs_gfxram_r, gdfs_gfxram_w)
	609	SSV_MAP( 0xc00000 )
622	610	ADDRESS_MAP_END
623	611
624		static ADDRESS_MAP_START( gdfs_writemem, ADDRESS_SPACE_PROGRAM, 16 )
625		AM_RANGE(0x400000, 0x41ffff) AM_WRITE(gdfs_tmapram_w) AM_BASE(&gdfs_tmapram)
626		AM_RANGE(0x420000, 0x43ffff) AM_WRITE(SMH_RAM)
627		AM_RANGE(0x440000, 0x44003f) AM_WRITE(SMH_RAM) AM_BASE(&gdfs_tmapscroll)
628		AM_RANGE(0x500000, 0x500001) AM_WRITE(gdfs_eeprom_w)
629		AM_RANGE(0x600000, 0x600fff) AM_WRITE(SMH_RAM)
630		AM_RANGE(0x800000, 0x87ffff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16_2)
631		AM_RANGE(0x8c0000, 0x8c00ff) AM_WRITE(gdfs_blitram_w) AM_BASE(&gdfs_blitram)
632		AM_RANGE(0x900000, 0x9fffff) AM_WRITE(gdfs_gfxram_w)
633		SSV_WRITEMEM
634		ADDRESS_MAP_END
635	612
636
637	613	/***************************************************************************
638	614	Hyper Reaction
639	615	***************************************************************************/
r4679	r4680
657	633	return 0xffff;
658	634	}
659	635
660		static ADDRESS_MAP_START( hypreact_readmem, ADDRESS_SPACE_PROGRAM, 16 )
661		AM_RANGE(0x210000, 0x210001) AM_READ(watchdog_reset16_r      )   // Watchdog
662		//  AM_RANGE(0x280000, 0x280001) AM_READ(SMH_NOP                  )   // ? read at the start, value not used
663		AM_RANGE(0xc00000, 0xc00001) AM_READ(hypreact_input_r         )   // Inputs
664		AM_RANGE(0xc00006, 0xc00007) AM_READ(SMH_RAM               )   //
665		AM_RANGE(0xc00008, 0xc00009) AM_READ(SMH_NOP               )   //
666		SSV_READMEM( 0xf00000 )
	636	static ADDRESS_MAP_START( hypreact_map, ADDRESS_SPACE_PROGRAM, 16 )
	637	AM_RANGE(0x210000, 0x210001) AM_READ(watchdog_reset16_r)         // Watchdog
	638	//  AM_RANGE(0x210002, 0x210003) AM_WRITE(SMH_NOP)                      // ? 5 at the start
	639	AM_RANGE(0x21000e, 0x21000f) AM_WRITE(ssv_lockout_inv_w)         // Inverted lockout lines
	640	//  AM_RANGE(0x280000, 0x280001) AM_READ(SMH_NOP)                       // ? read at the start, value not used
	641	AM_RANGE(0xc00000, 0xc00001) AM_READ(hypreact_input_r)            // Inputs
	642	AM_RANGE(0xc00006, 0xc00007) AM_RAM AM_BASE(&ssv_input_sel)         //
	643	AM_RANGE(0xc00008, 0xc00009) AM_NOP                           //
	644	SSV_MAP( 0xf00000 )
667	645	ADDRESS_MAP_END
668		static ADDRESS_MAP_START( hypreact_writemem, ADDRESS_SPACE_PROGRAM, 16 )
669		//  AM_RANGE(0x210002, 0x210003) AM_WRITE(SMH_NOP                 )   // ? 5 at the start
670		AM_RANGE(0x21000e, 0x21000f) AM_WRITE(ssv_lockout_inv_w         )   // Inverted lockout lines
671		AM_RANGE(0xc00006, 0xc00007) AM_WRITE(SMH_RAM) AM_BASE(&ssv_input_sel   )   // Inputs
672		AM_RANGE(0xc00008, 0xc00009) AM_WRITE(SMH_NOP               )   //
673		SSV_WRITEMEM
674		ADDRESS_MAP_END
675	646
676	647
677	648	/***************************************************************************
678	649	Hyper Reaction 2
679	650	***************************************************************************/
680	651
681		static ADDRESS_MAP_START( hypreac2_readmem, ADDRESS_SPACE_PROGRAM, 16 )
682		AM_RANGE(0x210000, 0x210001) AM_READ(watchdog_reset16_r      )   // Watchdog
683		//  AM_RANGE(0x280000, 0x280001) AM_READ(SMH_NOP                  )   // ? read at the start, value not used
684		AM_RANGE(0x500000, 0x500001) AM_READ(hypreact_input_r         )   // Inputs
685		AM_RANGE(0x500002, 0x500003) AM_READ(hypreact_input_r         )   // (again?)
686		//    0x540000, 0x540003  communication with another unit
687		SSV_READMEM( 0xe00000 )
	652	static ADDRESS_MAP_START( hypreac2_map, ADDRESS_SPACE_PROGRAM, 16 )
	653	AM_RANGE(0x210000, 0x210001) AM_READ(watchdog_reset16_r)            // Watchdog
	654	//  AM_RANGE(0x210002, 0x210003) AM_WRITE(SMH_NOP)                          // ? 5 at the start
	655	AM_RANGE(0x21000e, 0x21000f) AM_WRITE(ssv_lockout_inv_w)            // Inverted lockout lines
	656	//  AM_RANGE(0x280000, 0x280001) AM_READ(SMH_NOP)                           // ? read at the start, value not used
	657	AM_RANGE(0x500000, 0x500001) AM_READ(hypreact_input_r)               // Inputs
	658	AM_RANGE(0x500002, 0x500003) AM_READ(hypreact_input_r)               // (again?)
	659	AM_RANGE(0x520000, 0x520001) AM_WRITE(SMH_RAM) AM_BASE(&ssv_input_sel)   // Inputs
	660	//  0x540000, 0x540003  communication with other units
	661	SSV_MAP( 0xe00000 )
688	662	ADDRESS_MAP_END
689		static ADDRESS_MAP_START( hypreac2_writemem, ADDRESS_SPACE_PROGRAM, 16 )
690		//  AM_RANGE(0x210002, 0x210003) AM_WRITE(SMH_NOP                 )   // ? 5 at the start
691		AM_RANGE(0x21000e, 0x21000f) AM_WRITE(ssv_lockout_inv_w         )   // Inverted lockout lines
692		AM_RANGE(0x520000, 0x520001) AM_WRITE(SMH_RAM) AM_BASE(&ssv_input_sel   )   // Inputs
693		//    0x540000, 0x540003  communication with other units
694		SSV_WRITEMEM
695		ADDRESS_MAP_END
696	663
697	664
698	665	/***************************************************************************
r4679	r4680
701	668
702	669	static READ16_HANDLER( srmp4_input_r );
703	670
704		static ADDRESS_MAP_START( janjans1_readmem, ADDRESS_SPACE_PROGRAM, 16 )
705		AM_RANGE(0x210006, 0x210007) AM_READ(SMH_NOP               )
706		AM_RANGE(0x800002, 0x800003) AM_READ(srmp4_input_r            )   // Inputs
707		SSV_READMEM( 0xc00000 )
	671	static ADDRESS_MAP_START( janjans1_map, ADDRESS_SPACE_PROGRAM, 16 )
	672	AM_RANGE(0x210000, 0x210001) AM_WRITE(SMH_NOP)                     // koikois2 but not janjans1
	673	//  AM_RANGE(0x210002, 0x210003) AM_WRITE(SMH_NOP)                          // ? 1 at the start
	674	AM_RANGE(0x210006, 0x210007) AM_READ(SMH_NOP)
	675	AM_RANGE(0x800000, 0x800001) AM_WRITE(SMH_RAM) AM_BASE(&ssv_input_sel)   // Inputs
	676	AM_RANGE(0x800002, 0x800003) AM_READ(srmp4_input_r)                  // Inputs
	677	SSV_MAP( 0xc00000 )
708	678	ADDRESS_MAP_END
709		static ADDRESS_MAP_START( janjans1_writemem, ADDRESS_SPACE_PROGRAM, 16 )
710		AM_RANGE(0x210000, 0x210001) AM_WRITE(SMH_NOP               )   // koikois2 but not janjans1
711		//  AM_RANGE(0x210002, 0x210003) AM_WRITE(SMH_NOP                 )   // ? 1 at the start
712		AM_RANGE(0x800000, 0x800001) AM_WRITE(SMH_RAM) AM_BASE(&ssv_input_sel   )   // Inputs
713		SSV_WRITEMEM
714		ADDRESS_MAP_END
715	679
716	680
717	681	/***************************************************************************
718	682	Keith & Lucy
719	683	***************************************************************************/
720	684
721		static ADDRESS_MAP_START( keithlcy_readmem, ADDRESS_SPACE_PROGRAM, 16 )
722		AM_RANGE(0x21000e, 0x21000f) AM_READ(SMH_NOP         )   //
723		SSV_READMEM( 0xe00000 )
	685	static ADDRESS_MAP_START( keithlcy_map, ADDRESS_SPACE_PROGRAM, 16 )
	686	//  AM_RANGE(0x210002, 0x210003) AM_WRITE(SMH_NOP)  // ? 1 at the start
	687	AM_RANGE(0x210010, 0x210011) AM_WRITE(SMH_NOP)   //
	688	AM_RANGE(0x21000e, 0x21000f) AM_READ(SMH_NOP)   //
	689	AM_RANGE(0x400000, 0x47ffff) AM_WRITE(SMH_RAM)   // ?
	690	SSV_MAP( 0xe00000 )
724	691	ADDRESS_MAP_END
725		static ADDRESS_MAP_START( keithlcy_writemem, ADDRESS_SPACE_PROGRAM, 16 )
726		//  AM_RANGE(0x210002, 0x210003) AM_WRITE(SMH_NOP         )   // ? 1 at the start
727		AM_RANGE(0x210010, 0x210011) AM_WRITE(SMH_NOP         )   //
728		AM_RANGE(0x400000, 0x47ffff) AM_WRITE(SMH_RAM         )   // ?
729		SSV_WRITEMEM
730		ADDRESS_MAP_END
731	692
732	693
733	694	/***************************************************************************
734	695	Meosis Magic
735	696	***************************************************************************/
736	697
737		static ADDRESS_MAP_START( meosism_readmem, ADDRESS_SPACE_PROGRAM, 16 )
738		AM_RANGE(0x210000, 0x210001) AM_READ(watchdog_reset16_r   )   // Watchdog
739		//  AM_RANGE(0x280000, 0x280001) AM_READ(SMH_NOP              )   // ? read once, value not used
740		AM_RANGE(0x580000, 0x58ffff) AM_READ(SMH_RAM            )   // NVRAM
741		SSV_READMEM( 0xf00000 )
	698	static ADDRESS_MAP_START( meosism_map, ADDRESS_SPACE_PROGRAM, 16 )
	699	AM_RANGE(0x210000, 0x210001) AM_READ(watchdog_reset16_r   )                     // Watchdog
	700	//  AM_RANGE(0x210002, 0x210003) AM_WRITE(SMH_NOP)                                      // ? 5 at the start
	701	//  AM_RANGE(0x280000, 0x280001) AM_READ(SMH_NOP)                                       // ? read once, value not used
	702	//  AM_RANGE(0x500004, 0x500005) AM_WRITE(SMH_NOP)                                      // ? 0,58,18
	703	AM_RANGE(0x580000, 0x58ffff) AM_RAM AM_BASE(&ssv_nvram) AM_SIZE(&ssv_nvram_size)   // NVRAM
	704	SSV_MAP( 0xf00000 )
742	705	ADDRESS_MAP_END
743		static ADDRESS_MAP_START( meosism_writemem, ADDRESS_SPACE_PROGRAM, 16 )
744		//  AM_RANGE(0x210002, 0x210003) AM_WRITE(SMH_NOP             )   // ? 5 at the start
745		//  AM_RANGE(0x500004, 0x500005) AM_WRITE(SMH_NOP             )   // ? 0,58,18
746		AM_RANGE(0x580000, 0x58ffff) AM_WRITE(SMH_RAM) AM_BASE(&ssv_nvram) AM_SIZE(&ssv_nvram_size   )   // NVRAM
747		SSV_WRITEMEM
748		ADDRESS_MAP_END
749	706
750	707	/***************************************************************************
751	708	Monster Slider
r4679	r4680
763	720	COMBINE_DATA(&ssv_mainram[offset]);
764	721	}
765	722
766		static ADDRESS_MAP_START( mslider_readmem, ADDRESS_SPACE_PROGRAM, 16 )
767		AM_RANGE(0x010000, 0x01ffff) AM_READ(ssv_mainram_r ) // RAM Mirror
768		SSV_READMEM( 0xf00000 )
	723	static ADDRESS_MAP_START( mslider_map, ADDRESS_SPACE_PROGRAM, 16 )
	724	AM_RANGE(0x010000, 0x01ffff) AM_READWRITE(ssv_mainram_r, ssv_mainram_w)   // RAM Mirror
	725	//  AM_RANGE(0x210002, 0x210003) AM_WRITE(SMH_NOP)                          // ? 1 at the start
	726	AM_RANGE(0x400000, 0x47ffff) AM_WRITE(SMH_RAM)                     // ?
	727	//  AM_RANGE(0x500000, 0x500001) AM_WRITE(SMH_NOP)                          // ? ff at the start
	728	SSV_MAP( 0xf00000 )
769	729	ADDRESS_MAP_END
770		static ADDRESS_MAP_START( mslider_writemem, ADDRESS_SPACE_PROGRAM, 16 )
771		AM_RANGE(0x010000, 0x01ffff) AM_WRITE(ssv_mainram_w) // RAM Mirror
772		//  AM_RANGE(0x210002, 0x210003) AM_WRITE(SMH_NOP         )   // ? 1 at the start
773		AM_RANGE(0x400000, 0x47ffff) AM_WRITE(SMH_RAM         )   // ?
774		//  AM_RANGE(0x500000, 0x500001) AM_WRITE(SMH_NOP         )   // ? ff at the start
775		SSV_WRITEMEM
776		ADDRESS_MAP_END
777	730
778	731
779	732	/***************************************************************************
780	733	Gourmet Battle Quiz Ryohrioh CooKing
781	734	***************************************************************************/
782	735
783		static ADDRESS_MAP_START( ryorioh_readmem, ADDRESS_SPACE_PROGRAM, 16 )
784		SSV_READMEM( 0xc00000 )
	736	static ADDRESS_MAP_START( ryorioh_map, ADDRESS_SPACE_PROGRAM, 16 )
	737	AM_RANGE(0x210000, 0x210001) AM_WRITE(watchdog_reset16_w)   // Watchdog
	738	//  AM_RANGE(0x210002, 0x210003) AM_WRITE(SMH_NOP)              // ? 1 at the start
	739	SSV_MAP( 0xc00000 )
785	740	ADDRESS_MAP_END
786		static ADDRESS_MAP_START( ryorioh_writemem, ADDRESS_SPACE_PROGRAM, 16 )
787		AM_RANGE(0x210000, 0x210001) AM_WRITE(watchdog_reset16_w   )   // Watchdog
788		//  AM_RANGE(0x210002, 0x210003) AM_WRITE(SMH_NOP             )   // ? 1 at the start
789		SSV_WRITEMEM
790		ADDRESS_MAP_END
791	741
792	742
793	743	/***************************************************************************
r4679	r4680
805	755	return 0xffff;
806	756	}
807	757
808		static ADDRESS_MAP_START( srmp4_readmem, ADDRESS_SPACE_PROGRAM, 16 )
809		AM_RANGE(0x210000, 0x210001) AM_READ(watchdog_reset16_r      )   // Watchdog
810		AM_RANGE(0xc0000a, 0xc0000b) AM_READ(srmp4_input_r            )   // Inputs
811		SSV_READMEM( 0xf00000 )
	758	static ADDRESS_MAP_START( srmp4_map, ADDRESS_SPACE_PROGRAM, 16 )
	759	AM_RANGE(0x210000, 0x210001) AM_READ(watchdog_reset16_r)            // Watchdog
	760	//  AM_RANGE(0x210002, 0x210003) AM_WRITE(SMH_NOP)                          // ? 1,5 at the start
	761	AM_RANGE(0xc0000a, 0xc0000b) AM_READ(srmp4_input_r)                  // Inputs
	762	AM_RANGE(0xc0000e, 0xc0000f) AM_WRITE(SMH_RAM) AM_BASE(&ssv_input_sel)   // Inputs
	763	AM_RANGE(0xc00010, 0xc00011) AM_WRITE(SMH_NOP)                     //
	764	SSV_MAP( 0xf00000 )
812	765	ADDRESS_MAP_END
813		static ADDRESS_MAP_START( srmp4_writemem, ADDRESS_SPACE_PROGRAM, 16 )
814		//  AM_RANGE(0x210002, 0x210003) AM_WRITE(SMH_NOP                 )   // ? 1,5 at the start
815		AM_RANGE(0xc0000e, 0xc0000f) AM_WRITE(SMH_RAM) AM_BASE(&ssv_input_sel   )   // Inputs
816		AM_RANGE(0xc00010, 0xc00011) AM_WRITE(SMH_NOP               )   //
817		SSV_WRITEMEM
818		ADDRESS_MAP_END
819	766
820	767
821	768	/***************************************************************************
r4679	r4680
855	802	return 0xffff;
856	803	}
857	804
858		static ADDRESS_MAP_START( srmp7_readmem, ADDRESS_SPACE_PROGRAM, 16 )
859		AM_RANGE(0x010000, 0x050faf) AM_READ(SMH_RAM            )   // More RAM
860		AM_RANGE(0x210000, 0x210001) AM_READ(watchdog_reset16_r   )   // Watchdog
861		AM_RANGE(0x300076, 0x300077) AM_READ(srmp7_irqv_r         )   // Sound
862		//    0x540000, 0x540003, related to lev 5 irq?
863		AM_RANGE(0x600000, 0x600001) AM_READ(srmp7_input_r         )   // Inputs
864		SSV_READMEM( 0xc00000 )
	805	static ADDRESS_MAP_START( srmp7_map, ADDRESS_SPACE_PROGRAM, 16 )
	806	AM_RANGE(0x010000, 0x050faf) AM_RAM                              // More RAM
	807	AM_RANGE(0x210000, 0x210001) AM_READ(watchdog_reset16_r)            // Watchdog
	808	//  AM_RANGE(0x210002, 0x210003) AM_WRITE(SMH_NOP)                          // ? 0,4 at the start
	809	AM_RANGE(0x21000e, 0x21000f) AM_WRITE(ssv_lockout_inv_w)            // Coin Counters / Lockouts
	810	AM_RANGE(0x300076, 0x300077) AM_READ(srmp7_irqv_r)                  // Sound
	811	//  0x540000, 0x540003, related to lev 5 irq?
	812	AM_RANGE(0x580000, 0x580001) AM_WRITE(srmp7_sound_bank_w)            // Sound Bank
	813	AM_RANGE(0x600000, 0x600001) AM_READ(srmp7_input_r)                  // Inputs
	814	AM_RANGE(0x680000, 0x680001) AM_WRITE(SMH_RAM) AM_BASE(&ssv_input_sel)   // Inputs
	815	SSV_MAP( 0xc00000 )
865	816	ADDRESS_MAP_END
866		static ADDRESS_MAP_START( srmp7_writemem, ADDRESS_SPACE_PROGRAM, 16 )
867		AM_RANGE(0x010000, 0x050faf) AM_WRITE(SMH_RAM               )   // More RAM
868		//  AM_RANGE(0x210002, 0x210003) AM_WRITE(SMH_NOP                 )   // ? 0,4 at the start
869		AM_RANGE(0x21000e, 0x21000f) AM_WRITE(ssv_lockout_inv_w         )   // Coin Counters / Lockouts
870		//    0x540000, 0x540003, related to lev 5 irq?
871		AM_RANGE(0x580000, 0x580001) AM_WRITE(srmp7_sound_bank_w      )   // Sound Bank
872		AM_RANGE(0x680000, 0x680001) AM_WRITE(SMH_RAM) AM_BASE(&ssv_input_sel   )   // Inputs
873		SSV_WRITEMEM
874		ADDRESS_MAP_END
875	817
876	818
877	819	/***************************************************************************
878	820	Survival Arts
879	821	***************************************************************************/
880	822
881		static ADDRESS_MAP_START( survarts_readmem, ADDRESS_SPACE_PROGRAM, 16 )
882		AM_RANGE(0x210000, 0x210001) AM_READ(watchdog_reset16_r   )   // Watchdog
883		//  AM_RANGE(0x290000, 0x290001) AM_READ(SMH_NOP              ) // ?
884		//  AM_RANGE(0x2a0000, 0x2a0001) AM_READ(SMH_NOP              ) // ?
	823	static ADDRESS_MAP_START( survarts_map, ADDRESS_SPACE_PROGRAM, 16 )
	824	AM_RANGE(0x210000, 0x210001) AM_READ(watchdog_reset16_r)   // Watchdog
	825	//  AM_RANGE(0x210002, 0x210003) AM_WRITE(SMH_NOP)              // ? 0,4 at the start
	826	//  AM_RANGE(0x290000, 0x290001) AM_READ(SMH_NOP)               // ?
	827	//  AM_RANGE(0x2a0000, 0x2a0001) AM_READ(SMH_NOP)               // ?
885	828
886		AM_RANGE(0x400000, 0x43ffff) AM_READ(SMH_RAM)            // dyna
	829	AM_RANGE(0x400000, 0x43ffff) AM_RAM                     // dyna
887	830
888	831	AM_RANGE(0x500008, 0x500009) AM_READ_PORT("ADD_BUTTONS")   // Extra Buttons
889		SSV_READMEM( 0xf00000 )
	832	SSV_MAP( 0xf00000 )
890	833	ADDRESS_MAP_END
891		static ADDRESS_MAP_START( survarts_writemem, ADDRESS_SPACE_PROGRAM, 16 )
892		//  AM_RANGE(0x210002, 0x210003) AM_WRITE(SMH_NOP             ) // ? 0,4 at the start
893		AM_RANGE(0x400000, 0x43ffff) AM_WRITE(SMH_RAM)            // dyna
894	834
895		SSV_WRITEMEM
896		ADDRESS_MAP_END
897	835
898
899	836	/***************************************************************************
900	837	Pachinko Sexy Reaction
901	838	***************************************************************************/
r4679	r4680
933	870	//  popmessage("%04X",data);   // 8 = motor on; 0 = motor off
934	871	}
935	872
936		static ADDRESS_MAP_START( sxyreact_readmem, ADDRESS_SPACE_PROGRAM, 16 )
937		//  AM_RANGE(0x020000, 0x03ffff) AM_READ(ssv_mainram_r ) // sxyreac2 reads / writes here, why?
938		AM_RANGE(0x210000, 0x210001) AM_READ(watchdog_reset16_r   )   // Watchdog
939		AM_RANGE(0x500002, 0x500003) AM_READ(sxyreact_ballswitch_r   )   // ?
940		AM_RANGE(0x500004, 0x500005) AM_READ(sxyreact_dial_r      )   // Dial Value (serial)
941		AM_RANGE(0x580000, 0x58ffff) AM_READ(SMH_RAM            )   // NVRAM
942		SSV_READMEM( 0xe00000 )
	873	static ADDRESS_MAP_START( sxyreact_map, ADDRESS_SPACE_PROGRAM, 16 )
	874	//  AM_RANGE(0x020000, 0x03ffff) AM_READWRITE(ssv_mainram_r, ssv_mainram_w)             // sxyreac2 reads / writes here, why?
	875	AM_RANGE(0x210000, 0x210001) AM_READ(watchdog_reset16_r)                     // Watchdog
	876	//  AM_RANGE(0x210002, 0x210003) AM_WRITE(SMH_NOP)                                      // ? 1 at the start
	877	AM_RANGE(0x21000e, 0x21000f) AM_WRITE(ssv_lockout_inv_w)                     // Inverted lockout lines
	878	AM_RANGE(0x500002, 0x500003) AM_READ(sxyreact_ballswitch_r)                     // ?
	879	AM_RANGE(0x500004, 0x500005) AM_READWRITE(sxyreact_dial_r, sxyreact_motor_w)      // Dial Value (serial)
	880	AM_RANGE(0x520000, 0x520001) AM_WRITE(sxyreact_dial_w)                        // Dial Value (advance 1 bit)
	881	AM_RANGE(0x580000, 0x58ffff) AM_RAM AM_BASE(&ssv_nvram) AM_SIZE(&ssv_nvram_size)   // NVRAM
	882	SSV_MAP( 0xe00000 )
943	883	ADDRESS_MAP_END
944		static ADDRESS_MAP_START( sxyreact_writemem, ADDRESS_SPACE_PROGRAM, 16 )
945		//  AM_RANGE(0x020000, 0x03ffff) AM_WRITE(ssv_mainram_w ) // sxyreac2 reads / writes here, why?
946		//  AM_RANGE(0x210002, 0x210003) AM_WRITE(SMH_NOP             )   // ? 1 at the start
947		AM_RANGE(0x21000e, 0x21000f) AM_WRITE(ssv_lockout_inv_w      )   // Inverted lockout lines
948		AM_RANGE(0x520000, 0x520001) AM_WRITE(sxyreact_dial_w      )   // Dial Value (advance 1 bit)
949		AM_RANGE(0x520004, 0x520005) AM_WRITE(sxyreact_motor_w      )   // Dial Motor?
950		AM_RANGE(0x580000, 0x58ffff) AM_WRITE(SMH_RAM) AM_BASE(&ssv_nvram) AM_SIZE(&ssv_nvram_size   )   // NVRAM
951		SSV_WRITEMEM
952		ADDRESS_MAP_END
953	884
954	885
955	886	/***************************************************************************
r4679	r4680
958	889
959	890	/* comes as either a standalone board or a standard SSV rom board (verified) */
960	891
961		static ADDRESS_MAP_START( twineag2_readmem, ADDRESS_SPACE_PROGRAM, 16 )
962		AM_RANGE(0x010000, 0x03ffff) AM_READ(SMH_RAM            )   // More RAM
963		AM_RANGE(0x210000, 0x210001) AM_READ(watchdog_reset16_r   )   // Watchdog (also value is cmp.b with mem 8)
964		SSV_READMEM( 0xe00000 )
	892	static ADDRESS_MAP_START( twineag2_map, ADDRESS_SPACE_PROGRAM, 16 )
	893	AM_RANGE(0x010000, 0x03ffff) AM_RAM                     // More RAM
	894	AM_RANGE(0x210000, 0x210001) AM_READ(watchdog_reset16_r)   // Watchdog (also value is cmp.b with mem 8)
	895	SSV_MAP( 0xe00000 )
965	896	ADDRESS_MAP_END
966		static ADDRESS_MAP_START( twineag2_writemem, ADDRESS_SPACE_PROGRAM, 16 )
967		AM_RANGE(0x010000, 0x03ffff) AM_WRITE(SMH_RAM            )   // More RAM
968		SSV_WRITEMEM
969		ADDRESS_MAP_END
970	897
971	898
972	899	/***************************************************************************
r4679	r4680
975	902
976	903	/* standalone board based on SSV hardware */
977	904
978		static ADDRESS_MAP_START( ultrax_readmem, ADDRESS_SPACE_PROGRAM, 16 )
979		AM_RANGE(0x010000, 0x03ffff) AM_READ(SMH_RAM            )   // More RAM
980		AM_RANGE(0x210000, 0x210001) AM_READ(watchdog_reset16_r   )   // Watchdog (also value is cmp.b with memory address 8)
981		SSV_READMEM( 0xe00000 )
	905	static ADDRESS_MAP_START( ultrax_map, ADDRESS_SPACE_PROGRAM, 16 )
	906	AM_RANGE(0x010000, 0x03ffff) AM_RAM                     // More RAM
	907	AM_RANGE(0x210000, 0x210001) AM_READ(watchdog_reset16_r)   // Watchdog (also value is cmp.b with memory address 8)
	908	//  AM_RANGE(0x210002, 0x210003) AM_WRITE(SMH_NOP)              // ? 2,6 at the start
	909	SSV_MAP( 0xe00000 )
982	910	ADDRESS_MAP_END
983		static ADDRESS_MAP_START( ultrax_writemem, ADDRESS_SPACE_PROGRAM, 16 )
984		AM_RANGE(0x010000, 0x03ffff) AM_WRITE(SMH_RAM         )   // More RAM
985		//  AM_RANGE(0x210002, 0x210003) AM_WRITE(SMH_NOP         )   // ? 2,6 at the start
986		SSV_WRITEMEM
987		ADDRESS_MAP_END
988	911
989	912	/***************************************************************************
990	913	Joryuu Syougi Kyoushitsu
r4679	r4680
1024	947	timer_call_after_resynch(space->machine, NULL, 0, NULL);
1025	948	}
1026	949
1027		static ADDRESS_MAP_START( jsk_readmem, ADDRESS_SPACE_PROGRAM, 16 )
1028		AM_RANGE(0x050000, 0x05ffff) AM_READ(ssv_mainram_r ) // RAM Mirror?
1029		AM_RANGE(0x400000, 0x47ffff) AM_READ(SMH_RAM   )   // RAM?
1030		AM_RANGE(0x900000, 0x900007) AM_READ(latch16_r)
1031		SSV_READMEM( 0xf00000 )
	950	static ADDRESS_MAP_START( jsk_map, ADDRESS_SPACE_PROGRAM, 16 )
	951	AM_RANGE(0x050000, 0x05ffff) AM_READWRITE(ssv_mainram_r, ssv_mainram_w)   // RAM Mirror?
	952	AM_RANGE(0x210000, 0x210001) AM_WRITE(watchdog_reset16_w)            // Watchdog
	953	AM_RANGE(0x400000, 0x47ffff) AM_RAM                              // RAM?
	954	AM_RANGE(0x900000, 0x900007) AM_READWRITE(latch16_r, latch16_w)
	955	SSV_MAP( 0xf00000 )
1032	956	ADDRESS_MAP_END
1033		static ADDRESS_MAP_START( jsk_writemem, ADDRESS_SPACE_PROGRAM, 16 )
1034		AM_RANGE(0x050000, 0x05ffff) AM_WRITE(ssv_mainram_w ) // RAM Mirror?
1035		AM_RANGE(0x210000, 0x210001) AM_WRITE(watchdog_reset16_w   )   // Watchdog
1036		AM_RANGE(0x400000, 0x47ffff) AM_WRITE(SMH_RAM            )   // RAM?
1037		AM_RANGE(0x900000, 0x900007) AM_WRITE(latch16_w)
1038		SSV_WRITEMEM
1039		ADDRESS_MAP_END
1040	957
1041	958
1042		static ADDRESS_MAP_START( jsk_v810_mem,ADDRESS_SPACE_PROGRAM, 32 )
	959	static ADDRESS_MAP_START( jsk_v810_mem, ADDRESS_SPACE_PROGRAM, 32 )
1043	960	AM_RANGE(0x00000000, 0x0001ffff) AM_RAM
1044	961	AM_RANGE(0x80000000, 0x8001ffff) AM_RAM
1045	962	AM_RANGE(0xc0000000, 0xc001ffff) AM_RAM
1046		AM_RANGE(0x40000000, 0x4000000f) AM_READ(latch32_r) AM_WRITE(latch32_w)
	963	AM_RANGE(0x40000000, 0x4000000f) AM_READWRITE(latch32_r, latch32_w)
1047	964	AM_RANGE(0xfff80000, 0xffffffff) AM_ROM AM_REGION("sub", 0)
1048	965	ADDRESS_MAP_END
1049	966
r4679	r4680
1108	1025	}
1109	1026
1110	1027
1111		static ADDRESS_MAP_START( eaglshot_readmem, ADDRESS_SPACE_PROGRAM, 16 )
1112		AM_RANGE(0x180000, 0x1bffff) AM_READ(eaglshot_gfxram_r      )
1113		AM_RANGE(0x210000, 0x210001) AM_READ(/*watchdog_reset16_r*/SMH_NOP      )   // Watchdog
1114		AM_RANGE(0xa00000, 0xbfffff) AM_READ(eaglshot_gfxrom_r      )
1115		AM_RANGE(0xc00000, 0xc007ff) AM_READ(SMH_RAM            )   // NVRAM
1116		AM_RANGE(0xd00000, 0xd00001) AM_READ(eaglshot_trackball_r   )
1117		SSV_READMEM( 0xf00000 )
	1028	static ADDRESS_MAP_START( eaglshot_map, ADDRESS_SPACE_PROGRAM, 16 )
	1029	AM_RANGE(0x180000, 0x1bffff) AM_READWRITE(eaglshot_gfxram_r, eaglshot_gfxram_w)
	1030	AM_RANGE(0x210000, 0x210001) AM_READ(/*watchdog_reset16_r*/SMH_NOP)               // Watchdog
	1031	//  AM_RANGE(0x210002, 0x210003) AM_WRITE(SMH_NOP)                                      // ? 0,4 at the start
	1032	AM_RANGE(0x21000e, 0x21000f) AM_WRITE(ssv_lockout_inv_w)                     // Inverted lockout lines
	1033	AM_RANGE(0x800000, 0x800001) AM_WRITE(eaglshot_gfxrom_w)
	1034	AM_RANGE(0x900000, 0x900001) AM_WRITE(eaglshot_trackball_w)
	1035	AM_RANGE(0xa00000, 0xbfffff) AM_READ(eaglshot_gfxrom_r)
	1036	AM_RANGE(0xc00000, 0xc007ff) AM_RAM AM_BASE(&ssv_nvram) AM_SIZE(&ssv_nvram_size)   // NVRAM
	1037	AM_RANGE(0xd00000, 0xd00001) AM_READ(eaglshot_trackball_r)
	1038	SSV_MAP( 0xf00000 )
1118	1039	ADDRESS_MAP_END
1119	1040
1120		static ADDRESS_MAP_START( eaglshot_writemem, ADDRESS_SPACE_PROGRAM, 16 )
1121		AM_RANGE(0x180000, 0x1bffff) AM_WRITE(eaglshot_gfxram_w      )
1122		//  AM_RANGE(0x210002, 0x210003) AM_WRITE(SMH_NOP             )   // ? 0,4 at the start
1123		AM_RANGE(0x21000e, 0x21000f) AM_WRITE(ssv_lockout_inv_w      )   // Inverted lockout lines
1124		AM_RANGE(0x800000, 0x800001) AM_WRITE(eaglshot_gfxrom_w      )
1125		AM_RANGE(0x900000, 0x900001) AM_WRITE(eaglshot_trackball_w   )
1126		AM_RANGE(0xc00000, 0xc007ff) AM_WRITE(SMH_RAM) AM_BASE(&ssv_nvram) AM_SIZE(&ssv_nvram_size   )   // NVRAM
1127		SSV_WRITEMEM
1128		ADDRESS_MAP_END
1129	1041
1130	1042
1131
1132	1043	/***************************************************************************
1133	1044
1134	1045
r4679	r4680
2832	2743	/* basic machine hardware */
2833	2744	MDRV_IMPORT_FROM(ssv)
2834	2745	MDRV_CPU_MODIFY("maincpu")
2835		MDRV_CPU_PROGRAM_MAP(drifto94_readmem, drifto94_writemem)
	2746	MDRV_CPU_PROGRAM_MAP(drifto94_map, 0)
2836	2747
2837	2748	MDRV_NVRAM_HANDLER(ssv)
2838	2749
r4679	r4680
2847	2758	/* basic machine hardware */
2848	2759	MDRV_IMPORT_FROM(ssv)
2849	2760	MDRV_CPU_MODIFY("maincpu")
2850		MDRV_CPU_PROGRAM_MAP(gdfs_readmem, gdfs_writemem)
	2761	MDRV_CPU_PROGRAM_MAP(gdfs_map, 0)
2851	2762	MDRV_CPU_VBLANK_INT_HACK(gdfs_interrupt,1+4)
2852	2763
2853	2764	MDRV_NVRAM_HANDLER(gdfs)
r4679	r4680
2867	2778	/* basic machine hardware */
2868	2779	MDRV_IMPORT_FROM(ssv)
2869	2780	MDRV_CPU_MODIFY("maincpu")
2870		MDRV_CPU_PROGRAM_MAP(hypreact_readmem, hypreact_writemem)
	2781	MDRV_CPU_PROGRAM_MAP(hypreact_map, 0)
2871	2782
2872	2783	/* video hardware */
2873	2784	MDRV_SCREEN_MODIFY("screen")
r4679	r4680
2880	2791	/* basic machine hardware */
2881	2792	MDRV_IMPORT_FROM(ssv)
2882	2793	MDRV_CPU_MODIFY("maincpu")
2883		MDRV_CPU_PROGRAM_MAP(hypreac2_readmem, hypreac2_writemem)
	2794	MDRV_CPU_PROGRAM_MAP(hypreac2_map, 0)
2884	2795
2885	2796	/* video hardware */
2886	2797	MDRV_SCREEN_MODIFY("screen")
r4679	r4680
2893	2804	/* basic machine hardware */
2894	2805	MDRV_IMPORT_FROM(ssv)
2895	2806	MDRV_CPU_MODIFY("maincpu")
2896		MDRV_CPU_PROGRAM_MAP(janjans1_readmem, janjans1_writemem)
	2807	MDRV_CPU_PROGRAM_MAP(janjans1_map, 0)
2897	2808
2898	2809	/* video hardware */
2899	2810	MDRV_SCREEN_MODIFY("screen")
r4679	r4680
2906	2817	/* basic machine hardware */
2907	2818	MDRV_IMPORT_FROM(ssv)
2908	2819	MDRV_CPU_MODIFY("maincpu")
2909		MDRV_CPU_PROGRAM_MAP(keithlcy_readmem, keithlcy_writemem)
	2820	MDRV_CPU_PROGRAM_MAP(keithlcy_map, 0)
2910	2821
2911	2822	/* video hardware */
2912	2823	MDRV_SCREEN_MODIFY("screen")
r4679	r4680
2919	2830	/* basic machine hardware */
2920	2831	MDRV_IMPORT_FROM(ssv)
2921	2832	MDRV_CPU_MODIFY("maincpu")
2922		MDRV_CPU_PROGRAM_MAP(meosism_readmem, meosism_writemem)
	2833	MDRV_CPU_PROGRAM_MAP(meosism_map, 0)
2923	2834
2924	2835	MDRV_NVRAM_HANDLER(ssv)
2925	2836
r4679	r4680
2934	2845	/* basic machine hardware */
2935	2846	MDRV_IMPORT_FROM(ssv)
2936	2847	MDRV_CPU_MODIFY("maincpu")
2937		MDRV_CPU_PROGRAM_MAP(mslider_readmem, mslider_writemem)
	2848	MDRV_CPU_PROGRAM_MAP(mslider_map, 0)
2938	2849
2939	2850	/* video hardware */
2940	2851	MDRV_SCREEN_MODIFY("screen")
r4679	r4680
2947	2858	/* basic machine hardware */
2948	2859	MDRV_IMPORT_FROM(ssv)
2949	2860	MDRV_CPU_MODIFY("maincpu")
2950		MDRV_CPU_PROGRAM_MAP(ryorioh_readmem, ryorioh_writemem)
	2861	MDRV_CPU_PROGRAM_MAP(ryorioh_map, 0)
2951	2862
2952	2863	/* video hardware */
2953	2864	MDRV_SCREEN_MODIFY("screen")
r4679	r4680
2960	2871	/* basic machine hardware */
2961	2872	MDRV_IMPORT_FROM(ssv)
2962	2873	MDRV_CPU_MODIFY("maincpu")
2963		MDRV_CPU_PROGRAM_MAP(srmp4_readmem, srmp4_writemem)
	2874	MDRV_CPU_PROGRAM_MAP(srmp4_map, 0)
2964	2875
2965	2876	/* video hardware */
2966	2877	MDRV_SCREEN_MODIFY("screen")
r4679	r4680
2973	2884	/* basic machine hardware */
2974	2885	MDRV_IMPORT_FROM(ssv)
2975	2886	MDRV_CPU_MODIFY("maincpu")
2976		MDRV_CPU_PROGRAM_MAP(srmp7_readmem, srmp7_writemem)
	2887	MDRV_CPU_PROGRAM_MAP(srmp7_map, 0)
2977	2888
2978	2889	/* video hardware */
2979	2890	MDRV_SCREEN_MODIFY("screen")
r4679	r4680
2986	2897	/* basic machine hardware */
2987	2898	MDRV_IMPORT_FROM(ssv)
2988	2899	MDRV_CPU_MODIFY("maincpu")
2989		MDRV_CPU_PROGRAM_MAP(drifto94_readmem, drifto94_writemem)
	2900	MDRV_CPU_PROGRAM_MAP(drifto94_map, 0)
2990	2901
2991	2902	MDRV_NVRAM_HANDLER(ssv)
2992	2903	/* video hardware */
r4679	r4680
3000	2911	/* basic machine hardware */
3001	2912	MDRV_IMPORT_FROM(ssv)
3002	2913	MDRV_CPU_MODIFY("maincpu")
3003		MDRV_CPU_PROGRAM_MAP(survarts_readmem, survarts_writemem)
	2914	MDRV_CPU_PROGRAM_MAP(survarts_map, 0)
3004	2915
3005	2916	/* video hardware */
3006	2917	MDRV_SCREEN_MODIFY("screen")
r4679	r4680
3021	2932	/* basic machine hardware */
3022	2933	MDRV_IMPORT_FROM(ssv)
3023	2934	MDRV_CPU_MODIFY("maincpu")
3024		MDRV_CPU_PROGRAM_MAP(eaglshot_readmem, eaglshot_writemem)
	2935	MDRV_CPU_PROGRAM_MAP(eaglshot_map, 0)
3025	2936
3026	2937	MDRV_NVRAM_HANDLER(ssv)
3027	2938
r4679	r4680
3040	2951	/* basic machine hardware */
3041	2952	MDRV_IMPORT_FROM(ssv)
3042	2953	MDRV_CPU_MODIFY("maincpu")
3043		MDRV_CPU_PROGRAM_MAP(sxyreact_readmem, sxyreact_writemem)
	2954	MDRV_CPU_PROGRAM_MAP(sxyreact_map, 0)
3044	2955
3045	2956	MDRV_NVRAM_HANDLER(ssv)
3046	2957
r4679	r4680
3055	2966	/* basic machine hardware */
3056	2967	MDRV_IMPORT_FROM(ssv)
3057	2968	MDRV_CPU_MODIFY("maincpu")
3058		MDRV_CPU_PROGRAM_MAP(twineag2_readmem, twineag2_writemem)
	2969	MDRV_CPU_PROGRAM_MAP(twineag2_map, 0)
3059	2970
3060	2971	/* video hardware */
3061	2972	MDRV_SCREEN_MODIFY("screen")
r4679	r4680
3068	2979	/* basic machine hardware */
3069	2980	MDRV_IMPORT_FROM(ssv)
3070	2981	MDRV_CPU_MODIFY("maincpu")
3071		MDRV_CPU_PROGRAM_MAP(ultrax_readmem, ultrax_writemem)
	2982	MDRV_CPU_PROGRAM_MAP(ultrax_map, 0)
3072	2983
3073	2984	/* video hardware */
3074	2985	MDRV_SCREEN_MODIFY("screen")
r4679	r4680
3080	2991	/* basic machine hardware */
3081	2992	MDRV_IMPORT_FROM(ssv)
3082	2993	MDRV_CPU_MODIFY("maincpu")
3083		MDRV_CPU_PROGRAM_MAP(jsk_readmem, jsk_writemem)
	2994	MDRV_CPU_PROGRAM_MAP(jsk_map, 0)
3084	2995
3085	2996	MDRV_CPU_ADD("sub", V810,25000000)
3086	2997	MDRV_CPU_PROGRAM_MAP(jsk_v810_mem, 0)

src/mame/drivers/taitoair.c

r4679	r4680
248	248
249	249	dsp_HOLD_signal = (data & 4) ? CLEAR_LINE : ASSERT_LINE;
250	250
251		cpu_set_input_line(space->machine->cpu[2], INPUT_LINE_RESET, (data & 1) ? CLEAR_LINE : ASSERT_LINE);
	251	cputag_set_input_line(space->machine, "dsp", INPUT_LINE_RESET, (data & 1) ? CLEAR_LINE : ASSERT_LINE);
252	252
253		logerror("68K:%06x writing %04x to TMS32025.  %s HOLD , %s RESET\n",cpu_get_previouspc(space->cpu),data,((data & 4) ? "Clear" : "Assert"),((data & 1) ? "Clear" : "Assert"));
	253	logerror("68K:%06x writing %04x to TMS32025.  %s HOLD , %s RESET\n", cpu_get_previouspc(space->cpu), data, ((data & 4) ? "Clear" : "Assert"), ((data & 1) ? "Clear" : "Assert"));
254	254	}
255	255
256	256	static READ16_HANDLER( lineram_r )
r4679	r4680
582	582	/* Handler called by the YM2610 emulator when the internal timers cause an IRQ */
583	583	static void irqhandler(const device_config *device, int irq)
584	584	{
585		cpu_set_input_line(device->machine->cpu[1],0,irq ? ASSERT_LINE : CLEAR_LINE);
	585	cputag_set_input_line(device->machine, "audiocpu", 0, irq ? ASSERT_LINE : CLEAR_LINE);
586	586	}
587	587
588	588	static const ym2610_interface airsys_ym2610_interface =

src/mame/drivers/atarig42.c

r4679	r4680
52	52
53	53	static void update_interrupts(running_machine *machine)
54	54	{
55		cpu_set_input_line(machine->cpu[0], 4, atarigen_video_int_state ? ASSERT_LINE : CLEAR_LINE);
56		cpu_set_input_line(machine->cpu[0], 5, atarigen_sound_int_state ? ASSERT_LINE : CLEAR_LINE);
	55	cputag_set_input_line(machine, "maincpu", 4, atarigen_video_int_state ? ASSERT_LINE : CLEAR_LINE);
	56	cputag_set_input_line(machine, "maincpu", 5, atarigen_sound_int_state ? ASSERT_LINE : CLEAR_LINE);
57	57	}
58	58
59	59
r4679	r4680
113	113	if (ACCESSING_BITS_0_7)
114	114	{
115	115	/* bit 4 resets the sound CPU */
116		cpu_set_input_line(space->machine->cpu[2], INPUT_LINE_RESET, (data & 0x10) ? CLEAR_LINE : ASSERT_LINE);
	116	cputag_set_input_line(space->machine, "jsa", INPUT_LINE_RESET, (data & 0x10) ? CLEAR_LINE : ASSERT_LINE);
117	117	if (!(data & 0x10)) atarijsa_reset();
118	118
119	119	/* bit 5 is /XRESET, probably related to the ASIC */
r4679	r4680
141	141	{
142	142	if (address < 0x80000)
143	143	{
144		direct->raw = direct->decrypted = (void *)sloop_base;
	144	direct->raw = direct->decrypted = (UINT8 *)sloop_base;
145	145	return (offs_t)-1;
146	146	}
147	147	return address;
r4679	r4680
687	687	atarig42_motion_object_base = 0x200;
688	688	atarig42_motion_object_mask = 0x1ff;
689	689
690		sloop_base = memory_install_readwrite16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x000000, 0x07ffff, 0, 0, roadriot_sloop_data_r, roadriot_sloop_data_w);
691		memory_set_direct_update_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), sloop_direct_handler);
	690	sloop_base = memory_install_readwrite16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x000000, 0x07ffff, 0, 0, roadriot_sloop_data_r, roadriot_sloop_data_w);
	691	memory_set_direct_update_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), sloop_direct_handler);
692	692
693	693	asic65_config(machine, ASIC65_ROMBASED);
694	694	/*
r4679	r4680
740	740	/* put an RTS there so we don't die */
741	741	*(UINT16 *)&memory_region(machine, "maincpu")[0x80000] = 0x4E75;
742	742
743		sloop_base = memory_install_readwrite16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x000000, 0x07ffff, 0, 0, guardians_sloop_data_r, guardians_sloop_data_w);
744		memory_set_direct_update_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), sloop_direct_handler);
	743	sloop_base = memory_install_readwrite16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x000000, 0x07ffff, 0, 0, guardians_sloop_data_r, guardians_sloop_data_w);
	744	memory_set_direct_update_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), sloop_direct_handler);
745	745
746	746	asic65_config(machine, ASIC65_GUARDIANS);
747	747	/*

src/mame/drivers/cop01.c

r4679	r4680
70	70	static WRITE8_HANDLER( cop01_sound_command_w )
71	71	{
72	72	soundlatch_w(space,offset,data);
73		cpu_set_input_line_and_vector(space->machine->cpu[1],0,HOLD_LINE,0xff);
	73	cputag_set_input_line_and_vector(space->machine, "audiocpu", 0, HOLD_LINE, 0xff);
74	74	}
75	75
76	76	static READ8_HANDLER( cop01_sound_command_r )
r4679	r4680
101	101	}
102	102
103	103
104		static ADDRESS_MAP_START( readmem, ADDRESS_SPACE_PROGRAM, 8 )
105		AM_RANGE(0x0000, 0xbfff) AM_READ(SMH_ROM)
106		AM_RANGE(0xc000, 0xcfff) AM_READ(SMH_RAM)   /* c000-c7ff in cop01 */
107		AM_RANGE(0xd000, 0xdfff) AM_READ(SMH_RAM)
108		ADDRESS_MAP_END
109
110		static ADDRESS_MAP_START( writemem, ADDRESS_SPACE_PROGRAM, 8 )
111		AM_RANGE(0x0000, 0xbfff) AM_WRITE(SMH_ROM)
112		AM_RANGE(0xc000, 0xcfff) AM_WRITE(SMH_RAM)   /* c000-c7ff in cop01 */
113		AM_RANGE(0xd000, 0xdfff) AM_WRITE(cop01_background_w) AM_BASE(&cop01_bgvideoram)
	104	static ADDRESS_MAP_START( cop01_map, ADDRESS_SPACE_PROGRAM, 8 )
	105	AM_RANGE(0x0000, 0xbfff) AM_ROM
	106	AM_RANGE(0xc000, 0xcfff) AM_RAM /* c000-c7ff in cop01 */
	107	AM_RANGE(0xd000, 0xdfff) AM_RAM_WRITE(cop01_background_w) AM_BASE(&cop01_bgvideoram)
114	108	AM_RANGE(0xe000, 0xe0ff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
115	109	AM_RANGE(0xf000, 0xf3ff) AM_WRITE(cop01_foreground_w) AM_BASE(&cop01_fgvideoram)
116	110	ADDRESS_MAP_END
r4679	r4680
139	133	AM_RANGE(0x45, 0x45) AM_WRITE(watchdog_reset_w) /* ? */
140	134	ADDRESS_MAP_END
141	135
142		static ADDRESS_MAP_START( sound_readmem, ADDRESS_SPACE_PROGRAM, 8 )
143		AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM)
	136	static ADDRESS_MAP_START( sound_map, ADDRESS_SPACE_PROGRAM, 8 )
	137	AM_RANGE(0x0000, 0x7fff) AM_ROM
144	138	AM_RANGE(0x8000, 0x8000) AM_READNOP   /* irq ack? */
145		AM_RANGE(0xc000, 0xc7ff) AM_READ(SMH_RAM)
	139	AM_RANGE(0xc000, 0xc7ff) AM_RAM
146	140	ADDRESS_MAP_END
147	141
148		static ADDRESS_MAP_START( sound_writemem, ADDRESS_SPACE_PROGRAM, 8 )
149		AM_RANGE(0x0000, 0x7fff) AM_WRITE(SMH_ROM)
150		AM_RANGE(0xc000, 0xc7ff) AM_WRITE(SMH_RAM)
151		ADDRESS_MAP_END
152
153	142	static ADDRESS_MAP_START( audio_io_map, ADDRESS_SPACE_IO, 8 )
154	143	ADDRESS_MAP_GLOBAL_MASK(0xff)
155	144	AM_RANGE(0x00, 0x01) AM_DEVWRITE("ay1", ay8910_address_data_w)
r4679	r4680
401	390
402	391	/* basic machine hardware */
403	392	MDRV_CPU_ADD("maincpu", Z80, 4000000)   /* ???? */
404		MDRV_CPU_PROGRAM_MAP(readmem,writemem)
	393	MDRV_CPU_PROGRAM_MAP(cop01_map,0)
405	394	MDRV_CPU_IO_MAP(io_map,0)
406	395	MDRV_CPU_VBLANK_INT("screen", irq0_line_hold)
407	396
408	397	MDRV_CPU_ADD("audiocpu", Z80, 3000000)   /* ???? */
409		MDRV_CPU_PROGRAM_MAP(sound_readmem,sound_writemem)
	398	MDRV_CPU_PROGRAM_MAP(sound_map,0)
410	399	MDRV_CPU_IO_MAP(audio_io_map,0)
411	400
412	401	/* video hardware */
r4679	r4680
441	430
442	431	/* basic machine hardware */
443	432	MDRV_CPU_ADD("maincpu", Z80, 4000000)   /* ???? */
444		MDRV_CPU_PROGRAM_MAP(readmem,writemem)
	433	MDRV_CPU_PROGRAM_MAP(cop01_map,0)
445	434	MDRV_CPU_IO_MAP(mightguy_io_map,0)
446	435	MDRV_CPU_VBLANK_INT("screen", irq0_line_hold)
447	436
448	437	MDRV_CPU_ADD("audiocpu", Z80, 3000000)   /* ???? */
449		MDRV_CPU_PROGRAM_MAP(sound_readmem,sound_writemem)
	438	MDRV_CPU_PROGRAM_MAP(sound_map,0)
450	439	MDRV_CPU_IO_MAP(mightguy_audio_io_map,0)
451	440
452	441	/* video hardware */

src/mame/drivers/vindictr.c

r4679	r4680
33	33
34	34	static void update_interrupts(running_machine *machine)
35	35	{
36		cpu_set_input_line(machine->cpu[0], 4, atarigen_scanline_int_state ? ASSERT_LINE : CLEAR_LINE);
37		cpu_set_input_line(machine->cpu[0], 6, atarigen_sound_int_state ? ASSERT_LINE : CLEAR_LINE);
	36	cputag_set_input_line(machine, "maincpu", 4, atarigen_scanline_int_state ? ASSERT_LINE : CLEAR_LINE);
	37	cputag_set_input_line(machine, "maincpu", 6, atarigen_sound_int_state ? ASSERT_LINE : CLEAR_LINE);
38	38	}
39	39
40	40

src/mame/drivers/hanaawas.c

r4679	r4680
78	78	mux = data;
79	79	}
80	80
81		static ADDRESS_MAP_START( readmem, ADDRESS_SPACE_PROGRAM, 8 )
82		AM_RANGE(0x0000, 0x2fff) AM_READ(SMH_ROM)
83		AM_RANGE(0x4000, 0x4fff) AM_READ(SMH_ROM)
84		AM_RANGE(0x6000, 0x6fff) AM_READ(SMH_ROM)
85		AM_RANGE(0x8000, 0x8bff) AM_READ(SMH_RAM)
	81	static ADDRESS_MAP_START( hanaawas_map, ADDRESS_SPACE_PROGRAM, 8 )
	82	AM_RANGE(0x0000, 0x2fff) AM_ROM
	83	AM_RANGE(0x4000, 0x4fff) AM_ROM
	84	AM_RANGE(0x6000, 0x6fff) AM_ROM
	85	AM_RANGE(0x8000, 0x83ff) AM_RAM_WRITE(hanaawas_videoram_w) AM_BASE(&videoram)
	86	AM_RANGE(0x8400, 0x87ff) AM_RAM_WRITE(hanaawas_colorram_w) AM_BASE(&colorram)
	87	AM_RANGE(0x8800, 0x8bff) AM_RAM
86	88	ADDRESS_MAP_END
87	89
88		static ADDRESS_MAP_START( writemem, ADDRESS_SPACE_PROGRAM, 8 )
89		AM_RANGE(0x0000, 0x2fff) AM_WRITE(SMH_ROM)
90		AM_RANGE(0x4000, 0x4fff) AM_WRITE(SMH_ROM)
91		AM_RANGE(0x6000, 0x6fff) AM_WRITE(SMH_ROM)
92		AM_RANGE(0x8000, 0x83ff) AM_WRITE(hanaawas_videoram_w) AM_BASE(&videoram)
93		AM_RANGE(0x8400, 0x87ff) AM_WRITE(hanaawas_colorram_w) AM_BASE(&colorram)
94		AM_RANGE(0x8800, 0x8bff) AM_WRITE(SMH_RAM)
95		ADDRESS_MAP_END
96	90
97
98	91	static ADDRESS_MAP_START( io_map, ADDRESS_SPACE_IO, 8 )
99	92	ADDRESS_MAP_GLOBAL_MASK(0xff)
100	93	AM_RANGE(0x00, 0x00) AM_READWRITE(hanaawas_input_port_0_r, hanaawas_inputs_mux_w)
r4679	r4680
202	195
203	196	/* basic machine hardware */
204	197	MDRV_CPU_ADD("maincpu", Z80,18432000/6)   /* 3.072 MHz ??? */
205		MDRV_CPU_PROGRAM_MAP(readmem,writemem)
	198	MDRV_CPU_PROGRAM_MAP(hanaawas_map,0)
206	199	MDRV_CPU_IO_MAP(io_map,0)
207	200	MDRV_CPU_VBLANK_INT("screen", irq0_line_hold)
208	201

src/mame/drivers/mpu4drvr.c

r4679	r4680
228	228	{
229	229	ROC10937_reset(0);
230	230
231		/*  cpu_set_input_line(machine->cpu[1], INPUT_LINE_HALT, ASSERT_LINE); */
	231	/*  cputag_set_input_line(machine, "video", INPUT_LINE_HALT, ASSERT_LINE); */
232	232	mpu4_stepper_reset();
233	233
234	234	lamp_strobe    = 0;
r4679	r4680
269	269
270	270	static void update_mpu68_interrupts(running_machine *machine)
271	271	{
272		cpu_set_input_line(machine->cpu[1], 1, m6840_irq_state ? ASSERT_LINE : CLEAR_LINE);
273		cpu_set_input_line(machine->cpu[1], 2, m6850_irq_state ? ASSERT_LINE : CLEAR_LINE);
274		cpu_set_input_line(machine->cpu[1], 3, scn2674_irq_state ? ASSERT_LINE : CLEAR_LINE);
	272	cputag_set_input_line(machine, "video", 1, m6840_irq_state ? ASSERT_LINE : CLEAR_LINE);
	273	cputag_set_input_line(machine, "video", 2, m6850_irq_state ? ASSERT_LINE : CLEAR_LINE);
	274	cputag_set_input_line(machine, "video", 3, scn2674_irq_state ? ASSERT_LINE : CLEAR_LINE);
275	275	}
276	276
277	277	/* Communications with 6809 board */
r4679	r4680
305	305	static WRITE_LINE_DEVICE_HANDLER( m6809_acia_irq )
306	306	{
307	307	m68k_acia_cts = state;
308		cpu_set_input_line(device->machine->cpu[0], M6809_IRQ_LINE, state?ASSERT_LINE:CLEAR_LINE);
	308	cputag_set_input_line(device->machine, "maincpu", M6809_IRQ_LINE, state?ASSERT_LINE:CLEAR_LINE);
309	309	}
310	310
311	311	static ACIA6850_INTERFACE( m6809_acia_if )
r4679	r4680
1018	1018	/* if anything uses tile sizes other than 8x8 we can't really do it this way.. we'll have to draw tiles by hand.
1019	1019	maybe we will anyway, but for now we don't need to */
1020	1020
1021		mpu4_vid_vidram = auto_malloc (0x20000);
	1021	mpu4_vid_vidram = auto_alloc_array(machine, UINT16, 0x20000/2);
1022	1022
1023	1023	memset(mpu4_vid_vidram,0,0x20000);
1024	1024
r4679	r4680
1634	1634
1635	1635	static MC6845_ON_VSYNC_CHANGED( dealem_vsync_changed )
1636	1636	{
1637		cpu_set_input_line(device->machine->cpu[0], INPUT_LINE_NMI, vsync);
	1637	cputag_set_input_line(device->machine, "maincpu", INPUT_LINE_NMI, vsync);
1638	1638	}
1639	1639
1640	1640	/*************************************

src/mame/drivers/aquarium.c

r4679	r4680
98	98	//  popmessage("sound write %04x",data);
99	99
100	100	soundlatch_w(space,1,data&0xff);
101		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_NMI, PULSE_LINE );
	101	cputag_set_input_line(space->machine, "audiocpu", INPUT_LINE_NMI, PULSE_LINE );
102	102	}
103	103
104	104	static WRITE8_HANDLER( aquarium_z80_bank_w )
r4679	r4680
318	318	}
319	319
320	320	/* reset the sound bank */
321		aquarium_z80_bank_w(cpu_get_address_space(machine->cpu[1], ADDRESS_SPACE_IO), 0, 0);
	321	aquarium_z80_bank_w(cputag_get_address_space(machine, "audiocpu", ADDRESS_SPACE_IO), 0, 0);
322	322	}
323	323
324	324
r4679	r4680
331	331
332	332	static void irq_handler(const device_config *device, int irq)
333	333	{
334		cpu_set_input_line(device->machine->cpu[1], 0 , irq ? ASSERT_LINE : CLEAR_LINE );
	334	cputag_set_input_line(device->machine, "audiocpu", 0 , irq ? ASSERT_LINE : CLEAR_LINE );
335	335	}
336	336
337	337	static const ym2151_interface ym2151_config =

src/mame/drivers/metro.c

r4679	r4680
155	155	/* Update the IRQ state based on all possible causes */
156	156	static void update_irq_state(running_machine *machine)
157	157	{
158		const address_space *space = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM);
	158	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
159	159
160	160	/*  Get the pending IRQs (only the enabled ones, e.g. where
161	161	irq_enable is *0*)  */
r4679	r4680
170	170	int i = 0;
171	171	for (i = 0; i < 8; i++)
172	172	if (irq & (1 << i))
173		irq_level[metro_irq_levels[i]&7] = 1;
	173	irq_level[metro_irq_levels[i] & 7] = 1;
174	174	for (i = 0; i < 8; i++)
175		cpu_set_input_line(machine->cpu[0], i, irq_level[i] ? ASSERT_LINE : CLEAR_LINE);
	175	cputag_set_input_line(machine, "maincpu", i, irq_level[i] ? ASSERT_LINE : CLEAR_LINE);
176	176	}
177	177	else
178	178	{
r4679	r4680
181	181	source by peeking a register (metro_irq_cause_r) */
182	182
183	183	int state =   (irq ? ASSERT_LINE : CLEAR_LINE);
184		cpu_set_input_line(machine->cpu[0], irq_line, state);
	184	cputag_set_input_line(machine, "maincpu", irq_line, state);
185	185	}
186	186	}
187	187
r4679	r4680
190	190	static IRQ_CALLBACK(metro_irq_callback)
191	191	{
192	192	//  logerror("%s: irq callback returns %04X\n",cpuexec_describe_context(device->machine),metro_irq_vectors[int_level]);
193		return metro_irq_vectors[irqline]&0xff;
	193	return metro_irq_vectors[irqline] & 0xff;
194	194	}
195	195
196	196	static MACHINE_RESET( metro )
197	197	{
198	198	if (irq_line == -1)
199		cpu_set_irq_callback(machine->cpu[0], metro_irq_callback);
	199	cpu_set_irq_callback(cputag_get_cpu(machine, "maincpu"), metro_irq_callback);
200	200	}
201	201
202	202
r4679	r4680
321	321
322	322	static void ymf278b_interrupt(const device_config *device, int active)
323	323	{
324		cpu_set_input_line(device->machine->cpu[0], 2, active);
	324	cputag_set_input_line(device->machine, "maincpu", 2, active);
325	325	}
326	326
327	327	/***************************************************************************
r4679	r4680
337	337
338	338	static int metro_io_callback(const device_config *device, int ioline, int state)
339	339	{
340		const address_space *space = cpu_get_address_space(device->machine->cpu[0], ADDRESS_SPACE_PROGRAM);
	340	const address_space *space = cputag_get_address_space(device->machine, "maincpu", ADDRESS_SPACE_PROGRAM);
341	341
342	342	UINT8 data = 0;
343	343
r4679	r4680
360	360	if (ACCESSING_BITS_0_7)
361	361	{
362	362	soundlatch_w(space,0,data & 0xff);
363		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_NMI, PULSE_LINE);
	363	cputag_set_input_line(space->machine, "audiocpu", INPUT_LINE_NMI, PULSE_LINE);
364	364	cpu_spinuntil_int(space->cpu);
365	365	busy_sndcpu = 1;
366	366	}
r4679	r4680
512	512
513	513	static void metro_sound_irq_handler(const device_config *device, int state)
514	514	{
515		cpu_set_input_line(device->machine->cpu[1], UPD7810_INTF2, state ? ASSERT_LINE : CLEAR_LINE);
	515	cputag_set_input_line(device->machine, "audiocpu", UPD7810_INTF2, state ? ASSERT_LINE : CLEAR_LINE);
516	516	}
517	517
518	518	static const ym2151_interface ym2151_config =
r4679	r4680
808	808	*/
809	809
810	810
811		static ADDRESS_MAP_START( metro_snd_readmem, ADDRESS_SPACE_PROGRAM, 8 )
812		AM_RANGE(0x0000, 0x3fff) AM_READ(SMH_ROM)   /* External ROM */
813		AM_RANGE(0x4000, 0x7fff) AM_READ(SMH_BANK1)   /* External ROM (Banked) */
814		AM_RANGE(0x8000, 0x87ff) AM_READ(SMH_RAM)   /* External RAM */
815		AM_RANGE(0xff00, 0xffff) AM_READ(SMH_RAM)   /* Internal RAM */
	811	static ADDRESS_MAP_START( metro_sound_map, ADDRESS_SPACE_PROGRAM, 8 )
	812	AM_RANGE(0x0000, 0x3fff) AM_ROM         /* External ROM */
	813	AM_RANGE(0x4000, 0x7fff) AM_ROMBANK(1)   /* External ROM (Banked) */
	814	AM_RANGE(0x8000, 0x87ff) AM_RAM         /* External RAM */
	815	AM_RANGE(0xff00, 0xffff) AM_RAM         /* Internal RAM */
816	816	ADDRESS_MAP_END
817	817
818		static ADDRESS_MAP_START( metro_snd_writemem, ADDRESS_SPACE_PROGRAM, 8 )
819		AM_RANGE(0x0000, 0x3fff) AM_WRITE(SMH_ROM)   /* External ROM */
820		AM_RANGE(0x4000, 0x7fff) AM_WRITE(SMH_BANK1)   /* External ROM (Banked) */
821		AM_RANGE(0x8000, 0x87ff) AM_WRITE(SMH_RAM)   /* External RAM */
822		AM_RANGE(0xff00, 0xffff) AM_WRITE(SMH_RAM)   /* Internal RAM */
823		ADDRESS_MAP_END
824
825		static ADDRESS_MAP_START( metro_snd_readport, ADDRESS_SPACE_IO, 8 )
826		AM_RANGE(UPD7810_PORTA, UPD7810_PORTA) AM_READ(metro_porta_r)
827		ADDRESS_MAP_END
828
829		static ADDRESS_MAP_START( metro_snd_writeport, ADDRESS_SPACE_IO, 8 )
830		AM_RANGE(UPD7810_PORTA, UPD7810_PORTA) AM_WRITE(metro_porta_w)
	818	static ADDRESS_MAP_START( metro_sound_io_map, ADDRESS_SPACE_IO, 8 )
	819	AM_RANGE(UPD7810_PORTA, UPD7810_PORTA) AM_READWRITE(metro_porta_r,metro_porta_w)
831	820	AM_RANGE(UPD7810_PORTB, UPD7810_PORTB) AM_WRITE(metro_portb_w)
832	821	AM_RANGE(UPD7810_PORTC, UPD7810_PORTC) AM_WRITE(metro_sound_rombank_w)
833	822	ADDRESS_MAP_END
834	823
835	824	/*****************/
836	825
837		static ADDRESS_MAP_START( daitorid_snd_readmem, ADDRESS_SPACE_PROGRAM, 8 )
838		AM_RANGE(0x0000, 0x3fff) AM_READ(SMH_ROM)   /* External ROM */
839		AM_RANGE(0x4000, 0x7fff) AM_READ(SMH_BANK1)   /* External ROM (Banked) */
840		AM_RANGE(0x8000, 0x87ff) AM_READ(SMH_RAM)   /* External RAM */
841		AM_RANGE(0xff00, 0xffff) AM_READ(SMH_RAM)   /* Internal RAM */
842		ADDRESS_MAP_END
843	826
844		static ADDRESS_MAP_START( daitorid_snd_writemem, ADDRESS_SPACE_PROGRAM, 8 )
845		AM_RANGE(0x0000, 0x3fff) AM_WRITE(SMH_ROM)   /* External ROM */
846		AM_RANGE(0x4000, 0x7fff) AM_WRITE(SMH_BANK1)   /* External ROM (Banked) */
847		AM_RANGE(0x8000, 0x87ff) AM_WRITE(SMH_RAM)   /* External RAM */
848		AM_RANGE(0xff00, 0xffff) AM_WRITE(SMH_RAM)   /* Internal RAM */
849		ADDRESS_MAP_END
850
851		static ADDRESS_MAP_START( daitorid_snd_readport, ADDRESS_SPACE_IO, 8 )
852		AM_RANGE(UPD7810_PORTA, UPD7810_PORTA) AM_READ(metro_porta_r)
853		ADDRESS_MAP_END
854
855		static ADDRESS_MAP_START( daitorid_snd_writeport, ADDRESS_SPACE_IO, 8 )
856		AM_RANGE(UPD7810_PORTA, UPD7810_PORTA) AM_WRITE(metro_porta_w)
	827	static ADDRESS_MAP_START( daitorid_sound_io_map, ADDRESS_SPACE_IO, 8 )
	828	AM_RANGE(UPD7810_PORTA, UPD7810_PORTA) AM_READWRITE(metro_porta_r,metro_porta_w)
857	829	AM_RANGE(UPD7810_PORTB, UPD7810_PORTB) AM_WRITE(daitorid_portb_w)
858	830	AM_RANGE(UPD7810_PORTC, UPD7810_PORTC) AM_WRITE(daitorid_sound_rombank_w)
859	831	ADDRESS_MAP_END
r4679	r4680
894	866	}
895	867
896	868
897		static ADDRESS_MAP_START( balcube_readmem, ADDRESS_SPACE_PROGRAM, 16 )
898		AM_RANGE(0x000000, 0x07ffff) AM_READ(SMH_ROM            )   // ROM
899		AM_RANGE(0xf00000, 0xf0ffff) AM_READ(SMH_RAM            )   // RAM
900		AM_RANGE(0x300000, 0x300001) AM_DEVREAD8("ymf", ymf278b_r, 0x00ff)   // Sound
901		AM_RANGE(0x400000, 0x41ffff) AM_READ(balcube_dsw_r         )   // DSW x 3
902		AM_RANGE(0x600000, 0x61ffff) AM_READ(SMH_RAM            )   // Layer 0
903		AM_RANGE(0x620000, 0x63ffff) AM_READ(SMH_RAM            )   // Layer 1
904		AM_RANGE(0x640000, 0x65ffff) AM_READ(SMH_RAM            )   // Layer 2
905		AM_RANGE(0x660000, 0x66ffff) AM_READ(metro_bankedrom_r      )   // Banked ROM
906		AM_RANGE(0x670000, 0x673fff) AM_READ(SMH_RAM            )   // Palette
907		AM_RANGE(0x674000, 0x674fff) AM_READ(SMH_RAM            )   // Sprites
908		AM_RANGE(0x678000, 0x6787ff) AM_READ(SMH_RAM            )   // Tiles Set
909		AM_RANGE(0x6788a2, 0x6788a3) AM_READ(metro_irq_cause_r      )   // IRQ Cause
910		AM_RANGE(0x500000, 0x500001) AM_READ_PORT("IN0")            // Inputs
911		AM_RANGE(0x500002, 0x500003) AM_READ_PORT("IN1")            //
912		AM_RANGE(0x500006, 0x500007) AM_READ(SMH_NOP            )   //
	869	static ADDRESS_MAP_START( balcube_map, ADDRESS_SPACE_PROGRAM, 16 )
	870	AM_RANGE(0x000000, 0x07ffff) AM_ROM                                       // ROM
	871	AM_RANGE(0xf00000, 0xf0ffff) AM_RAM                                       // RAM
	872	AM_RANGE(0x300000, 0x300001) AM_DEVREADWRITE8("ymf", ymf278b_r,ymf278b_w, 0x00ff)   // Sound
	873	AM_RANGE(0x400000, 0x41ffff) AM_READ(balcube_dsw_r)                           // DSW x 3
	874	AM_RANGE(0x500000, 0x500001) AM_READ_PORT("IN0")                           // Inputs
	875	AM_RANGE(0x500002, 0x500003) AM_READ_PORT("IN1")                           //
	876	AM_RANGE(0x500006, 0x500007) AM_READNOP                                    //
	877	AM_RANGE(0x500002, 0x500009) AM_WRITE(metro_coin_lockout_4words_w)               // Coin Lockout
	878	AM_RANGE(0x600000, 0x61ffff) AM_RAM_WRITE(metro_vram_0_w) AM_BASE(&metro_vram_0)   // Layer 0
	879	AM_RANGE(0x620000, 0x63ffff) AM_RAM_WRITE(metro_vram_1_w) AM_BASE(&metro_vram_1)   // Layer 1
	880	AM_RANGE(0x640000, 0x65ffff) AM_RAM_WRITE(metro_vram_2_w) AM_BASE(&metro_vram_2)   // Layer 2
	881	AM_RANGE(0x660000, 0x66ffff) AM_READ(metro_bankedrom_r)                        // Banked ROM
	882	AM_RANGE(0x670000, 0x673fff) AM_RAM_WRITE(paletteram16_GGGGGRRRRRBBBBBx_word_w) AM_BASE(&paletteram16)   // Palette
	883	AM_RANGE(0x674000, 0x674fff) AM_RAM AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)   // Sprites
	884	AM_RANGE(0x678000, 0x6787ff) AM_RAM AM_BASE(&metro_tiletable) AM_SIZE(&metro_tiletable_size)   // Tiles Set
	885	AM_RANGE(0x678840, 0x67884d) AM_WRITE(metro_blitter_w) AM_BASE(&metro_blitter_regs)   // Tiles Blitter
	886	AM_RANGE(0x678860, 0x67886b) AM_WRITE(metro_window_w) AM_BASE(&metro_window)      // Tilemap Window
	887	AM_RANGE(0x678870, 0x67887b) AM_WRITEONLY AM_BASE(&metro_scroll)               // Scroll
	888	AM_RANGE(0x678880, 0x678881) AM_WRITENOP                                 // ? increasing
	889	AM_RANGE(0x678890, 0x678891) AM_WRITENOP                                 // ? increasing
	890	AM_RANGE(0x6788a2, 0x6788a3) AM_READWRITE(metro_irq_cause_r,metro_irq_cause_w)      // IRQ Cause / IRQ Acknowledge
	891	AM_RANGE(0x6788a4, 0x6788a5) AM_WRITEONLY AM_BASE(&metro_irq_enable)            // IRQ Enable
	892	AM_RANGE(0x6788aa, 0x6788ab) AM_WRITEONLY AM_BASE(&metro_rombank)               // Rom Bank
	893	AM_RANGE(0x6788ac, 0x6788ad) AM_WRITEONLY AM_BASE(&metro_screenctrl)            // Screen Control
	894	AM_RANGE(0x679700, 0x679713) AM_WRITEONLY AM_BASE(&metro_videoregs)               // Video Registers
913	895	ADDRESS_MAP_END
914	896
915		static ADDRESS_MAP_START( balcube_writemem, ADDRESS_SPACE_PROGRAM, 16 )
916		AM_RANGE(0x000000, 0x07ffff) AM_WRITE(SMH_ROM                  )   // ROM
917		AM_RANGE(0xf00000, 0xf0ffff) AM_WRITE(SMH_RAM                  )   // RAM
918		AM_RANGE(0x300000, 0x30000b) AM_DEVWRITE8("ymf", ymf278b_w, 0x00ff)   // Sound
919		AM_RANGE(0x500002, 0x500009) AM_WRITE(metro_coin_lockout_4words_w   )   // Coin Lockout
920		AM_RANGE(0x670000, 0x673fff) AM_WRITE(paletteram16_GGGGGRRRRRBBBBBx_word_w  ) AM_BASE(&paletteram16   )   // Palette
921		AM_RANGE(0x674000, 0x674fff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16) AM_SIZE(&spriteram_size            )   // Sprites
922		AM_RANGE(0x600000, 0x61ffff) AM_WRITE(metro_vram_0_w) AM_BASE(&metro_vram_0   )   // Layer 0
923		AM_RANGE(0x620000, 0x63ffff) AM_WRITE(metro_vram_1_w) AM_BASE(&metro_vram_1   )   // Layer 1
924		AM_RANGE(0x640000, 0x65ffff) AM_WRITE(metro_vram_2_w) AM_BASE(&metro_vram_2   )   // Layer 2
925		AM_RANGE(0x678000, 0x6787ff) AM_WRITE(SMH_RAM) AM_BASE(&metro_tiletable) AM_SIZE(&metro_tiletable_size      )   // Tiles Set
926		AM_RANGE(0x678840, 0x67884d) AM_WRITE(metro_blitter_w) AM_BASE(&metro_blitter_regs      )   // Tiles Blitter
927		AM_RANGE(0x678860, 0x67886b) AM_WRITE(metro_window_w) AM_BASE(&metro_window            )   // Tilemap Window
928		AM_RANGE(0x678870, 0x67887b) AM_WRITE(SMH_RAM) AM_BASE(&metro_scroll      )   // Scroll
929		AM_RANGE(0x678880, 0x678881) AM_WRITE(SMH_NOP                  )   // ? increasing
930		AM_RANGE(0x678890, 0x678891) AM_WRITE(SMH_NOP                  )   // ? increasing
931		AM_RANGE(0x6788a2, 0x6788a3) AM_WRITE(metro_irq_cause_w            )   // IRQ Acknowledge
932		AM_RANGE(0x6788a4, 0x6788a5) AM_WRITE(SMH_RAM) AM_BASE(&metro_irq_enable   )   // IRQ Enable
933		AM_RANGE(0x6788aa, 0x6788ab) AM_WRITE(SMH_RAM) AM_BASE(&metro_rombank      )   // Rom Bank
934		AM_RANGE(0x6788ac, 0x6788ad) AM_WRITE(SMH_RAM) AM_BASE(&metro_screenctrl   )   // Screen Control
935		AM_RANGE(0x679700, 0x679713) AM_WRITE(SMH_RAM) AM_BASE(&metro_videoregs   )   // Video Registers
936		ADDRESS_MAP_END
937	897
938	898	/***************************************************************************
939	899	Daitoride (alt hardware)
940	900	***************************************************************************/
941	901
942	902
943		static ADDRESS_MAP_START( daitoa_readmem, ADDRESS_SPACE_PROGRAM, 16 )
944		AM_RANGE(0x000000, 0x07ffff) AM_READ(SMH_ROM            )   // ROM
945		AM_RANGE(0xf00000, 0xf0ffff) AM_READ(SMH_RAM            )   // RAM
946		AM_RANGE(0x400000, 0x400001) AM_DEVREAD8("ymf", ymf278b_r, 0x00ff)   // Sound
947		AM_RANGE(0x300000, 0x31ffff) AM_READ(balcube_dsw_r         )   // DSW x 3
948		AM_RANGE(0x100000, 0x11ffff) AM_READ(SMH_RAM            )   // Layer 0
949		AM_RANGE(0x120000, 0x13ffff) AM_READ(SMH_RAM            )   // Layer 1
950		AM_RANGE(0x140000, 0x15ffff) AM_READ(SMH_RAM            )   // Layer 2
951		AM_RANGE(0x160000, 0x16ffff) AM_READ(metro_bankedrom_r      )   // Banked ROM
952		AM_RANGE(0x170000, 0x173fff) AM_READ(SMH_RAM            )   // Palette
953		AM_RANGE(0x174000, 0x174fff) AM_READ(SMH_RAM            )   // Sprites
954		AM_RANGE(0x178000, 0x1787ff) AM_READ(SMH_RAM            )   // Tiles Set
955		AM_RANGE(0x1788a2, 0x1788a3) AM_READ(metro_irq_cause_r      )   // IRQ Cause
956		AM_RANGE(0x200000, 0x200001) AM_READ_PORT("IN0")            // Inputs
957		AM_RANGE(0x200002, 0x200003) AM_READ_PORT("IN1")            //
958		AM_RANGE(0x200006, 0x200007) AM_READ(SMH_NOP            )   //
	903	static ADDRESS_MAP_START( daitoa_map, ADDRESS_SPACE_PROGRAM, 16 )
	904	AM_RANGE(0x000000, 0x07ffff) AM_ROM                                       // ROM
	905	AM_RANGE(0xf00000, 0xf0ffff) AM_RAM                                     // RAM
	906	AM_RANGE(0x400000, 0x400001) AM_DEVREADWRITE8("ymf", ymf278b_r,ymf278b_w, 0x00ff)   // Sound
	907	AM_RANGE(0x300000, 0x31ffff) AM_READ(balcube_dsw_r)                           // DSW x 3
	908	AM_RANGE(0x100000, 0x11ffff) AM_RAM_WRITE(metro_vram_0_w) AM_BASE(&metro_vram_0   )   // Layer 0
	909	AM_RANGE(0x120000, 0x13ffff) AM_RAM_WRITE(metro_vram_1_w) AM_BASE(&metro_vram_1   )   // Layer 1
	910	AM_RANGE(0x140000, 0x15ffff) AM_RAM_WRITE(metro_vram_2_w) AM_BASE(&metro_vram_2   )   // Layer 2
	911	AM_RANGE(0x160000, 0x16ffff) AM_READ(metro_bankedrom_r)                        // Banked ROM
	912	AM_RANGE(0x170000, 0x173fff) AM_RAM_WRITE(paletteram16_GGGGGRRRRRBBBBBx_word_w) AM_BASE(&paletteram16)   // Palette
	913	AM_RANGE(0x174000, 0x174fff) AM_RAM AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)   // Sprites
	914	AM_RANGE(0x178000, 0x1787ff) AM_RAM AM_BASE(&metro_tiletable) AM_SIZE(&metro_tiletable_size)   // Tiles Set
	915	AM_RANGE(0x178840, 0x17884d) AM_WRITE(metro_blitter_w) AM_BASE(&metro_blitter_regs)   // Tiles Blitter
	916	AM_RANGE(0x178860, 0x17886b) AM_WRITE(metro_window_w) AM_BASE(&metro_window)      // Tilemap Window
	917	AM_RANGE(0x178870, 0x17887b) AM_WRITEONLY AM_BASE(&metro_scroll)               // Scroll
	918	AM_RANGE(0x178880, 0x178881) AM_WRITENOP                                 // ? increasing
	919	AM_RANGE(0x178890, 0x178891) AM_WRITENOP                                 // ? increasing
	920	AM_RANGE(0x1788a2, 0x1788a3) AM_READWRITE(metro_irq_cause_r,metro_irq_cause_w)      // IRQ Cause / IRQ Acknowledge
	921	AM_RANGE(0x1788a4, 0x1788a5) AM_WRITEONLY AM_BASE(&metro_irq_enable)            // IRQ Enable
	922	AM_RANGE(0x1788aa, 0x1788ab) AM_WRITEONLY AM_BASE(&metro_rombank)               // Rom Bank
	923	AM_RANGE(0x1788ac, 0x1788ad) AM_WRITEONLY AM_BASE(&metro_screenctrl)            // Screen Control
	924	AM_RANGE(0x179700, 0x179713) AM_WRITEONLY AM_BASE(&metro_videoregs)               // Video Registers
	925	AM_RANGE(0x200000, 0x200001) AM_READ_PORT("IN0")                           // Inputs
	926	AM_RANGE(0x200002, 0x200003) AM_READ_PORT("IN1")                           //
	927	AM_RANGE(0x200006, 0x200007) AM_READNOP                                    //
	928	AM_RANGE(0x200002, 0x200009) AM_WRITE(metro_coin_lockout_4words_w)               // Coin Lockout
959	929	ADDRESS_MAP_END
960	930
961		static ADDRESS_MAP_START( daitoa_writemem, ADDRESS_SPACE_PROGRAM, 16 )
962		AM_RANGE(0x000000, 0x07ffff) AM_WRITE(SMH_ROM                  )   // ROM
963		AM_RANGE(0xf00000, 0xf0ffff) AM_WRITE(SMH_RAM                  )   // RAM
964		AM_RANGE(0x400000, 0x40000b) AM_DEVWRITE8("ymf", ymf278b_w, 0x00ff)   // Sound
965		AM_RANGE(0x200002, 0x200009) AM_WRITE(metro_coin_lockout_4words_w   )   // Coin Lockout
966		AM_RANGE(0x170000, 0x173fff) AM_WRITE(paletteram16_GGGGGRRRRRBBBBBx_word_w  ) AM_BASE(&paletteram16   )   // Palette
967		AM_RANGE(0x174000, 0x174fff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16) AM_SIZE(&spriteram_size            )   // Sprites
968		AM_RANGE(0x100000, 0x11ffff) AM_WRITE(metro_vram_0_w) AM_BASE(&metro_vram_0   )   // Layer 0
969		AM_RANGE(0x120000, 0x13ffff) AM_WRITE(metro_vram_1_w) AM_BASE(&metro_vram_1   )   // Layer 1
970		AM_RANGE(0x140000, 0x15ffff) AM_WRITE(metro_vram_2_w) AM_BASE(&metro_vram_2   )   // Layer 2
971		AM_RANGE(0x178000, 0x1787ff) AM_WRITE(SMH_RAM) AM_BASE(&metro_tiletable) AM_SIZE(&metro_tiletable_size      )   // Tiles Set
972		AM_RANGE(0x178840, 0x17884d) AM_WRITE(metro_blitter_w) AM_BASE(&metro_blitter_regs      )   // Tiles Blitter
973		AM_RANGE(0x178860, 0x17886b) AM_WRITE(metro_window_w) AM_BASE(&metro_window            )   // Tilemap Window
974		AM_RANGE(0x178870, 0x17887b) AM_WRITE(SMH_RAM) AM_BASE(&metro_scroll      )   // Scroll
975		AM_RANGE(0x178880, 0x178881) AM_WRITE(SMH_NOP                  )   // ? increasing
976		AM_RANGE(0x178890, 0x178891) AM_WRITE(SMH_NOP                  )   // ? increasing
977		AM_RANGE(0x1788a2, 0x1788a3) AM_WRITE(metro_irq_cause_w            )   // IRQ Acknowledge
978		AM_RANGE(0x1788a4, 0x1788a5) AM_WRITE(SMH_RAM) AM_BASE(&metro_irq_enable   )   // IRQ Enable
979		AM_RANGE(0x1788aa, 0x1788ab) AM_WRITE(SMH_RAM) AM_BASE(&metro_rombank      )   // Rom Bank
980		AM_RANGE(0x1788ac, 0x1788ad) AM_WRITE(SMH_RAM) AM_BASE(&metro_screenctrl   )   // Screen Control
981		AM_RANGE(0x179700, 0x179713) AM_WRITE(SMH_RAM) AM_BASE(&metro_videoregs   )   // Video Registers
982		ADDRESS_MAP_END
983	931
984
985	932	/***************************************************************************
986	933	Bang Bang Ball
987	934	***************************************************************************/
988	935
989		static ADDRESS_MAP_START( bangball_readmem, ADDRESS_SPACE_PROGRAM, 16 )
990		AM_RANGE(0x000000, 0x07ffff) AM_READ(SMH_ROM            )   // ROM
991		AM_RANGE(0xf00000, 0xf0ffff) AM_READ(SMH_RAM            )   // RAM
992		AM_RANGE(0xf10000, 0xf10fff) AM_READ(SMH_RAM            )   // RAM (bug in the ram test routine)
993		AM_RANGE(0xb00000, 0xb00001) AM_DEVREAD8("ymf", ymf278b_r, 0x00ff)   // Sound
994		AM_RANGE(0xc00000, 0xc1ffff) AM_READ(balcube_dsw_r         )   // DSW x 3
995		AM_RANGE(0xd00000, 0xd00001) AM_READ_PORT("IN0")            // Inputs
996		AM_RANGE(0xd00002, 0xd00003) AM_READ_PORT("IN1")            //
997		AM_RANGE(0xd00006, 0xd00007) AM_READ(SMH_NOP            )   //
998		AM_RANGE(0xe00000, 0xe1ffff) AM_READ(SMH_RAM            )   // Layer 0
999		AM_RANGE(0xe20000, 0xe3ffff) AM_READ(SMH_RAM            )   // Layer 1
1000		AM_RANGE(0xe40000, 0xe5ffff) AM_READ(SMH_RAM            )   // Layer 2
1001		AM_RANGE(0xe60000, 0xe6ffff) AM_READ(metro_bankedrom_r      )   // Banked ROM
1002		AM_RANGE(0xe70000, 0xe73fff) AM_READ(SMH_RAM            )   // Palette
1003		AM_RANGE(0xe74000, 0xe74fff) AM_READ(SMH_RAM            )   // Sprites
1004		AM_RANGE(0xe78000, 0xe787ff) AM_READ(SMH_RAM            )   // Tiles Set
1005		AM_RANGE(0xe788a2, 0xe788a3) AM_READ(metro_irq_cause_r      )   // IRQ Cause
	936	static ADDRESS_MAP_START( bangball_map, ADDRESS_SPACE_PROGRAM, 16 )
	937	AM_RANGE(0x000000, 0x07ffff) AM_ROM                                       // ROM
	938	AM_RANGE(0xf00000, 0xf0ffff) AM_RAM                                       // RAM
	939	AM_RANGE(0xf10000, 0xf10fff) AM_RAM                                       // RAM (bug in the ram test routine)
	940	AM_RANGE(0xb00000, 0xb00001) AM_DEVREADWRITE8("ymf", ymf278b_r,ymf278b_w, 0x00ff)   // Sound
	941	AM_RANGE(0xc00000, 0xc1ffff) AM_READ(balcube_dsw_r)                           // DSW x 3
	942	AM_RANGE(0xd00000, 0xd00001) AM_READ_PORT("IN0")                           // Inputs
	943	AM_RANGE(0xd00002, 0xd00003) AM_READ_PORT("IN1")                           //
	944	AM_RANGE(0xd00006, 0xd00007) AM_READNOP                                    //
	945	AM_RANGE(0xd00002, 0xd00009) AM_WRITE(metro_coin_lockout_4words_w)               // Coin Lockout
	946	AM_RANGE(0xe00000, 0xe1ffff) AM_RAM_WRITE(metro_vram_0_w) AM_BASE(&metro_vram_0)   // Layer 0
	947	AM_RANGE(0xe20000, 0xe3ffff) AM_RAM_WRITE(metro_vram_1_w) AM_BASE(&metro_vram_1)   // Layer 1
	948	AM_RANGE(0xe40000, 0xe5ffff) AM_RAM_WRITE(metro_vram_2_w) AM_BASE(&metro_vram_2)   // Layer 2
	949	AM_RANGE(0xe60000, 0xe6ffff) AM_READ(metro_bankedrom_r)                        // Banked ROM
	950	AM_RANGE(0xe70000, 0xe73fff) AM_RAM_WRITE(paletteram16_GGGGGRRRRRBBBBBx_word_w) AM_BASE(&paletteram16)   // Palette
	951	AM_RANGE(0xe74000, 0xe74fff) AM_RAM AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)   // Sprites
	952	AM_RANGE(0xe78000, 0xe787ff) AM_RAM AM_BASE(&metro_tiletable) AM_SIZE(&metro_tiletable_size)   // Tiles Set
	953	AM_RANGE(0xe78840, 0xe7884d) AM_WRITE(metro_blitter_w) AM_BASE(&metro_blitter_regs)   // Tiles Blitter
	954	AM_RANGE(0xe78860, 0xe7886b) AM_WRITE(metro_window_w) AM_BASE(&metro_window)      // Tilemap Window
	955	AM_RANGE(0xe78870, 0xe7887b) AM_WRITEONLY AM_BASE(&metro_scroll)               // Scroll
	956	AM_RANGE(0xe78880, 0xe78881) AM_WRITENOP                                 // ? increasing
	957	AM_RANGE(0xe78890, 0xe78891) AM_WRITENOP                                  // ? increasing
	958	AM_RANGE(0xe788a2, 0xe788a3) AM_READWRITE(metro_irq_cause_r,metro_irq_cause_w)      // IRQ Cause / IRQ Acknowledge
	959	AM_RANGE(0xe788a4, 0xe788a5) AM_WRITEONLY AM_BASE(&metro_irq_enable)            // IRQ Enable
	960	AM_RANGE(0xe788aa, 0xe788ab) AM_WRITEONLY AM_BASE(&metro_rombank)               // Rom Bank
	961	AM_RANGE(0xe788ac, 0xe788ad) AM_WRITEONLY AM_BASE(&metro_screenctrl)            // Screen Control
	962	AM_RANGE(0xe79700, 0xe79713) AM_WRITEONLY AM_BASE(&metro_videoregs)               // Video Registers
1006	963	ADDRESS_MAP_END
1007	964
1008		static ADDRESS_MAP_START( bangball_writemem, ADDRESS_SPACE_PROGRAM, 16 )
1009		AM_RANGE(0x000000, 0x07ffff) AM_WRITE(SMH_ROM                  )   // ROM
1010		AM_RANGE(0xf00000, 0xf0ffff) AM_WRITE(SMH_RAM                  )   // RAM
1011		AM_RANGE(0xf10000, 0xf10fff) AM_WRITE(SMH_RAM                  )   // RAM
1012		AM_RANGE(0xb00000, 0xb0000b) AM_DEVWRITE8("ymf", ymf278b_w, 0x00ff)   // Sound
1013		AM_RANGE(0xd00002, 0xd00009) AM_WRITE(metro_coin_lockout_4words_w   )   // Coin Lockout
1014		AM_RANGE(0xe00000, 0xe1ffff) AM_WRITE(metro_vram_0_w) AM_BASE(&metro_vram_0   )   // Layer 0
1015		AM_RANGE(0xe20000, 0xe3ffff) AM_WRITE(metro_vram_1_w) AM_BASE(&metro_vram_1   )   // Layer 1
1016		AM_RANGE(0xe40000, 0xe5ffff) AM_WRITE(metro_vram_2_w) AM_BASE(&metro_vram_2   )   // Layer 2
1017		AM_RANGE(0xe70000, 0xe73fff) AM_WRITE(paletteram16_GGGGGRRRRRBBBBBx_word_w  ) AM_BASE(&paletteram16   )   // Palette
1018		AM_RANGE(0xe74000, 0xe74fff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16) AM_SIZE(&spriteram_size            )   // Sprites
1019		AM_RANGE(0xe78000, 0xe787ff) AM_WRITE(SMH_RAM) AM_BASE(&metro_tiletable) AM_SIZE(&metro_tiletable_size      )   // Tiles Set
1020		AM_RANGE(0xe78840, 0xe7884d) AM_WRITE(metro_blitter_w) AM_BASE(&metro_blitter_regs      )   // Tiles Blitter
1021		AM_RANGE(0xe78860, 0xe7886b) AM_WRITE(metro_window_w) AM_BASE(&metro_window            )   // Tilemap Window
1022		AM_RANGE(0xe78870, 0xe7887b) AM_WRITE(SMH_RAM) AM_BASE(&metro_scroll      )   // Scroll
1023		AM_RANGE(0xe78880, 0xe78881) AM_WRITE(SMH_NOP                  )   // ? increasing
1024		AM_RANGE(0xe78890, 0xe78891) AM_WRITE(SMH_NOP                  )   // ? increasing
1025		AM_RANGE(0xe788a2, 0xe788a3) AM_WRITE(metro_irq_cause_w            )   // IRQ Acknowledge
1026		AM_RANGE(0xe788a4, 0xe788a5) AM_WRITE(SMH_RAM) AM_BASE(&metro_irq_enable   )   // IRQ Enable
1027		AM_RANGE(0xe788aa, 0xe788ab) AM_WRITE(SMH_RAM) AM_BASE(&metro_rombank      )   // Rom Bank
1028		AM_RANGE(0xe788ac, 0xe788ad) AM_WRITE(SMH_RAM) AM_BASE(&metro_screenctrl   )   // Screen Control
1029		AM_RANGE(0xe79700, 0xe79713) AM_WRITE(SMH_RAM) AM_BASE(&metro_videoregs   )   // Video Registers
1030		ADDRESS_MAP_END
1031	965
1032	966	/***************************************************************************
1033	967	Battle Bubble
1034	968	***************************************************************************/
1035	969
1036		static ADDRESS_MAP_START( batlbubl_readmem, ADDRESS_SPACE_PROGRAM, 16 )
1037		AM_RANGE(0x000000, 0x0fffff) AM_READ(SMH_ROM            )   // ROM
1038		AM_RANGE(0x100000, 0x11ffff) AM_READ(SMH_RAM            )   // Layer 0
1039		AM_RANGE(0x120000, 0x13ffff) AM_READ(SMH_RAM            )   // Layer 1
1040		AM_RANGE(0x140000, 0x15ffff) AM_READ(SMH_RAM            )   // Layer 2
1041		AM_RANGE(0x160000, 0x16ffff) AM_READ(metro_bankedrom_r      )   // Banked ROM
1042		AM_RANGE(0x170000, 0x173fff) AM_READ(SMH_RAM            )   // Palette
1043		AM_RANGE(0x174000, 0x174fff) AM_READ(SMH_RAM            )   // Sprites
1044		AM_RANGE(0x178000, 0x1787ff) AM_READ(SMH_RAM            )   // Tiles Set
1045		AM_RANGE(0x1788a2, 0x1788a3) AM_READ(metro_irq_cause_r      )   // IRQ Cause
	970	static ADDRESS_MAP_START( batlbubl_map, ADDRESS_SPACE_PROGRAM, 16 )
	971	AM_RANGE(0x000000, 0x0fffff) AM_ROM                                       // ROM
	972	AM_RANGE(0x100000, 0x11ffff) AM_RAM_WRITE(metro_vram_0_w) AM_BASE(&metro_vram_0)   // Layer 0
	973	AM_RANGE(0x120000, 0x13ffff) AM_RAM_WRITE(metro_vram_1_w) AM_BASE(&metro_vram_1)   // Layer 1
	974	AM_RANGE(0x140000, 0x15ffff) AM_RAM_WRITE(metro_vram_2_w) AM_BASE(&metro_vram_2)   // Layer 2
	975	AM_RANGE(0x160000, 0x16ffff) AM_READ(metro_bankedrom_r)                        // Banked ROM
	976	AM_RANGE(0x170000, 0x173fff) AM_RAM_WRITE(paletteram16_GGGGGRRRRRBBBBBx_word_w) AM_BASE(&paletteram16)   // Palette
	977	AM_RANGE(0x174000, 0x174fff) AM_RAM AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)   // Sprites
	978	AM_RANGE(0x178000, 0x1787ff) AM_RAM AM_BASE(&metro_tiletable) AM_SIZE(&metro_tiletable_size)   // Tiles Set
	979	AM_RANGE(0x178840, 0x17884d) AM_WRITE(metro_blitter_w) AM_BASE(&metro_blitter_regs)   // Tiles Blitter
	980	AM_RANGE(0x178860, 0x17886b) AM_WRITE(metro_window_w) AM_BASE(&metro_window)      // Tilemap Window
	981	AM_RANGE(0x178870, 0x17887b) AM_WRITEONLY AM_BASE(&metro_scroll)               // Scroll
	982	AM_RANGE(0x178880, 0x178881) AM_WRITENOP                                 // ? increasing
	983	AM_RANGE(0x178890, 0x178891) AM_WRITENOP                                 // ? increasing
	984	AM_RANGE(0x1788a2, 0x1788a3) AM_READWRITE(metro_irq_cause_r,metro_irq_cause_w)      // IRQ Cause / IRQ Acknowledge
	985	AM_RANGE(0x1788a4, 0x1788a5) AM_WRITEONLY AM_BASE(&metro_irq_enable)            // IRQ Enable
	986	AM_RANGE(0x1788aa, 0x1788ab) AM_WRITEONLY AM_BASE(&metro_rombank)               // Rom Bank
	987	AM_RANGE(0x1788ac, 0x1788ad) AM_WRITEONLY AM_BASE(&metro_screenctrl)            // Screen Control
	988	AM_RANGE(0x179700, 0x179713) AM_WRITEONLY AM_BASE(&metro_videoregs)               // Video Registers
1046	989	AM_RANGE(0x200000, 0x200001) AM_READ_PORT("IN1")
1047	990	AM_RANGE(0x200002, 0x200003) AM_READ_PORT("DSW0")
1048	991	AM_RANGE(0x200004, 0x200005) AM_READ_PORT("IN0")
1049	992	AM_RANGE(0x200006, 0x200007) AM_READ_PORT("IN2")
1050		AM_RANGE(0x300000, 0x31ffff) AM_READ(balcube_dsw_r         )   // read but ignored?
1051		AM_RANGE(0x400000, 0x400001) AM_DEVREAD8("ymf", ymf278b_r, 0x00ff)   // Sound
1052		AM_RANGE(0xf00000, 0xf0ffff) AM_READ(SMH_RAM            )   // RAM
1053		AM_RANGE(0xf10000, 0xf10fff) AM_READ(SMH_RAM            )   // RAM (bug in the ram test routine)
	993	AM_RANGE(0x200002, 0x200009) AM_WRITE(metro_coin_lockout_4words_w)               // Coin Lockout
	994	AM_RANGE(0x300000, 0x31ffff) AM_READ(balcube_dsw_r)                           // read but ignored?
	995	AM_RANGE(0x400000, 0x400001) AM_DEVREADWRITE8("ymf", ymf278b_r,ymf278b_w, 0x00ff)   // Sound
	996	AM_RANGE(0xf00000, 0xf0ffff) AM_RAM                                       // RAM
	997	AM_RANGE(0xf10000, 0xf10fff) AM_RAM                                       // RAM (bug in the ram test routine)
1054	998	ADDRESS_MAP_END
1055	999
1056		static ADDRESS_MAP_START( batlbubl_writemem, ADDRESS_SPACE_PROGRAM, 16 )
1057		AM_RANGE(0x000000, 0x0fffff) AM_WRITE(SMH_ROM                  )   // ROM
1058		AM_RANGE(0x100000, 0x11ffff) AM_WRITE(metro_vram_0_w) AM_BASE(&metro_vram_0   )   // Layer 0
1059		AM_RANGE(0x120000, 0x13ffff) AM_WRITE(metro_vram_1_w) AM_BASE(&metro_vram_1   )   // Layer 1
1060		AM_RANGE(0x140000, 0x15ffff) AM_WRITE(metro_vram_2_w) AM_BASE(&metro_vram_2   )   // Layer 2
1061		AM_RANGE(0x170000, 0x173fff) AM_WRITE(paletteram16_GGGGGRRRRRBBBBBx_word_w  ) AM_BASE(&paletteram16   )   // Palette
1062		AM_RANGE(0x174000, 0x174fff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16) AM_SIZE(&spriteram_size            )   // Sprites
1063		AM_RANGE(0x178000, 0x1787ff) AM_WRITE(SMH_RAM) AM_BASE(&metro_tiletable) AM_SIZE(&metro_tiletable_size      )   // Tiles Set
1064		AM_RANGE(0x178840, 0x17884d) AM_WRITE(metro_blitter_w) AM_BASE(&metro_blitter_regs      )   // Tiles Blitter
1065		AM_RANGE(0x178860, 0x17886b) AM_WRITE(metro_window_w) AM_BASE(&metro_window            )   // Tilemap Window
1066		AM_RANGE(0x178870, 0x17887b) AM_WRITE(SMH_RAM) AM_BASE(&metro_scroll      )   // Scroll
1067		AM_RANGE(0x178880, 0x178881) AM_WRITE(SMH_NOP                  )   // ? increasing
1068		AM_RANGE(0x178890, 0x178891) AM_WRITE(SMH_NOP                  )   // ? increasing
1069		AM_RANGE(0x1788a2, 0x1788a3) AM_WRITE(metro_irq_cause_w            )   // IRQ Acknowledge
1070		AM_RANGE(0x1788a4, 0x1788a5) AM_WRITE(SMH_RAM) AM_BASE(&metro_irq_enable   )   // IRQ Enable
1071		AM_RANGE(0x1788aa, 0x1788ab) AM_WRITE(SMH_RAM) AM_BASE(&metro_rombank      )   // Rom Bank
1072		AM_RANGE(0x1788ac, 0x1788ad) AM_WRITE(SMH_RAM) AM_BASE(&metro_screenctrl   )   // Screen Control
1073		AM_RANGE(0x179700, 0x179713) AM_WRITE(SMH_RAM) AM_BASE(&metro_videoregs   )   // Video Registers
1074		AM_RANGE(0x200002, 0x200009) AM_WRITE(metro_coin_lockout_4words_w   )   // Coin Lockout
1075		AM_RANGE(0x400000, 0x40000b) AM_DEVWRITE8("ymf", ymf278b_w, 0x00ff)   // Sound
1076		AM_RANGE(0xf00000, 0xf0ffff) AM_WRITE(SMH_RAM                  )   // RAM
1077		AM_RANGE(0xf10000, 0xf10fff) AM_WRITE(SMH_RAM                  )   // RAM
1078		ADDRESS_MAP_END
1079	1000
1080
1081	1001	/***************************************************************************
1082	1002	Dai Toride
1083	1003	***************************************************************************/
1084	1004
1085		static ADDRESS_MAP_START( daitorid_readmem, ADDRESS_SPACE_PROGRAM, 16 )
1086		AM_RANGE(0x000000, 0x03ffff) AM_READ(SMH_ROM            )   // ROM
1087		AM_RANGE(0x800000, 0x80ffff) AM_READ(SMH_RAM            )   // RAM
1088		AM_RANGE(0x400000, 0x41ffff) AM_READ(SMH_RAM            )   // Layer 0
1089		AM_RANGE(0x420000, 0x43ffff) AM_READ(SMH_RAM            )   // Layer 1
1090		AM_RANGE(0x440000, 0x45ffff) AM_READ(SMH_RAM            )   // Layer 2
1091		AM_RANGE(0x460000, 0x46ffff) AM_READ(metro_bankedrom_r      )   // Banked ROM
1092		AM_RANGE(0x470000, 0x473fff) AM_READ(SMH_RAM            )   // Palette
1093		AM_RANGE(0x474000, 0x474fff) AM_READ(SMH_RAM            )   // Sprites
1094		AM_RANGE(0x478000, 0x4787ff) AM_READ(SMH_RAM            )   // Tiles Set
1095		AM_RANGE(0x4788a2, 0x4788a3) AM_READ(metro_irq_cause_r      )   // IRQ Cause
1096		AM_RANGE(0xc00000, 0xc00001) AM_READ_PORT("IN0")
	1005	static ADDRESS_MAP_START( daitorid_map, ADDRESS_SPACE_PROGRAM, 16 )
	1006	AM_RANGE(0x000000, 0x03ffff) AM_ROM                                       // ROM
	1007	AM_RANGE(0x800000, 0x80ffff) AM_RAM                                       // RAM
	1008	AM_RANGE(0x400000, 0x41ffff) AM_RAM_WRITE(metro_vram_0_w) AM_BASE(&metro_vram_0   )   // Layer 0
	1009	AM_RANGE(0x420000, 0x43ffff) AM_RAM_WRITE(metro_vram_1_w) AM_BASE(&metro_vram_1   )   // Layer 1
	1010	AM_RANGE(0x440000, 0x45ffff) AM_RAM_WRITE(metro_vram_2_w) AM_BASE(&metro_vram_2   )   // Layer 2
	1011	AM_RANGE(0x460000, 0x46ffff) AM_READ(metro_bankedrom_r)                        // Banked ROM
	1012	AM_RANGE(0x470000, 0x473fff) AM_RAM_WRITE(paletteram16_GGGGGRRRRRBBBBBx_word_w) AM_BASE(&paletteram16)   // Palette
	1013	AM_RANGE(0x474000, 0x474fff) AM_RAM AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)   // Sprites
	1014	AM_RANGE(0x478000, 0x4787ff) AM_RAM AM_BASE(&metro_tiletable) AM_SIZE(&metro_tiletable_size)   // Tiles Set
	1015	AM_RANGE(0x478840, 0x47884d) AM_WRITE(metro_blitter_w) AM_BASE(&metro_blitter_regs)   // Tiles Blitter
	1016	AM_RANGE(0x478860, 0x47886b) AM_WRITE(metro_window_w) AM_BASE(&metro_window)      // Tilemap Window
	1017	AM_RANGE(0x478870, 0x47887b) AM_WRITEONLY AM_BASE(&metro_scroll)               // Scroll
	1018	AM_RANGE(0x478880, 0x478881) AM_WRITENOP                                 // ? increasing
	1019	AM_RANGE(0x478890, 0x478891) AM_WRITENOP                                 // ? increasing
	1020	AM_RANGE(0x4788a2, 0x4788a3) AM_READWRITE(metro_irq_cause_r,metro_irq_cause_w)      // IRQ Cause / IRQ Acknowledge
	1021	AM_RANGE(0x4788a4, 0x4788a5) AM_WRITEONLY AM_BASE(&metro_irq_enable)            // IRQ Enable
	1022	AM_RANGE(0x4788a8, 0x4788a9) AM_WRITE(metro_soundlatch_w)                     // To Sound CPU
	1023	AM_RANGE(0x4788aa, 0x4788ab) AM_WRITEONLY AM_BASE(&metro_rombank)               // Rom Bank
	1024	AM_RANGE(0x4788ac, 0x4788ad) AM_WRITEONLY AM_BASE(&metro_screenctrl)            // Screen Control
	1025	AM_RANGE(0x479700, 0x479713) AM_WRITEONLY AM_BASE(&metro_videoregs)               // Video Registers
	1026	AM_RANGE(0xc00000, 0xc00001) AM_READ_PORT("IN0") AM_WRITE(metro_soundstatus_w)       // To Sound CPU
1097	1027	AM_RANGE(0xc00002, 0xc00003) AM_READ_PORT("IN1")
1098	1028	AM_RANGE(0xc00004, 0xc00005) AM_READ_PORT("DSW0")
1099	1029	AM_RANGE(0xc00006, 0xc00007) AM_READ_PORT("IN2")
	1030	AM_RANGE(0xc00002, 0xc00009) AM_WRITE(metro_coin_lockout_4words_w)               // Coin Lockout
1100	1031	ADDRESS_MAP_END
1101	1032
1102		static ADDRESS_MAP_START( daitorid_writemem, ADDRESS_SPACE_PROGRAM, 16 )
1103		AM_RANGE(0x000000, 0x03ffff) AM_WRITE(SMH_ROM                  )   // ROM
1104		AM_RANGE(0x800000, 0x80ffff) AM_WRITE(SMH_RAM                  )   // RAM
1105		AM_RANGE(0x400000, 0x41ffff) AM_WRITE(metro_vram_0_w) AM_BASE(&metro_vram_0   )   // Layer 0
1106		AM_RANGE(0x420000, 0x43ffff) AM_WRITE(metro_vram_1_w) AM_BASE(&metro_vram_1   )   // Layer 1
1107		AM_RANGE(0x440000, 0x45ffff) AM_WRITE(metro_vram_2_w) AM_BASE(&metro_vram_2   )   // Layer 2
1108		AM_RANGE(0x470000, 0x473fff) AM_WRITE(paletteram16_GGGGGRRRRRBBBBBx_word_w  ) AM_BASE(&paletteram16   )   // Palette
1109		AM_RANGE(0x474000, 0x474fff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16) AM_SIZE(&spriteram_size            )   // Sprites
1110		AM_RANGE(0x478000, 0x4787ff) AM_WRITE(SMH_RAM) AM_BASE(&metro_tiletable) AM_SIZE(&metro_tiletable_size   )   // Tiles Set
1111		AM_RANGE(0x478840, 0x47884d) AM_WRITE(metro_blitter_w) AM_BASE(&metro_blitter_regs   )   // Tiles Blitter
1112		AM_RANGE(0x478860, 0x47886b) AM_WRITE(metro_window_w) AM_BASE(&metro_window         )   // Tilemap Window
1113		AM_RANGE(0x478870, 0x47887b) AM_WRITE(SMH_RAM) AM_BASE(&metro_scroll      )   // Scroll
1114		AM_RANGE(0x478880, 0x478881) AM_WRITE(SMH_NOP                  )   // ? increasing
1115		AM_RANGE(0x478890, 0x478891) AM_WRITE(SMH_NOP                  )   // ? increasing
1116		AM_RANGE(0x4788a2, 0x4788a3) AM_WRITE(metro_irq_cause_w            )   // IRQ Acknowledge
1117		AM_RANGE(0x4788a4, 0x4788a5) AM_WRITE(SMH_RAM) AM_BASE(&metro_irq_enable   )   // IRQ Enable
1118		AM_RANGE(0x4788a8, 0x4788a9) AM_WRITE(metro_soundlatch_w         )   // To Sound CPU
1119		AM_RANGE(0x4788aa, 0x4788ab) AM_WRITE(SMH_RAM) AM_BASE(&metro_rombank      )   // Rom Bank
1120		AM_RANGE(0x4788ac, 0x4788ad) AM_WRITE(SMH_RAM) AM_BASE(&metro_screenctrl   )   // Screen Control
1121		AM_RANGE(0x479700, 0x479713) AM_WRITE(SMH_RAM) AM_BASE(&metro_videoregs   )   // Video Registers
1122		AM_RANGE(0xc00000, 0xc00001) AM_WRITE(metro_soundstatus_w         )   // To Sound CPU
1123		AM_RANGE(0xc00002, 0xc00009) AM_WRITE(metro_coin_lockout_4words_w   )   // Coin Lockout
1124		ADDRESS_MAP_END
1125	1033
1126
1127	1034	/***************************************************************************
1128	1035	Dharma Doujou
1129	1036	***************************************************************************/
1130	1037
1131		static ADDRESS_MAP_START( dharma_readmem, ADDRESS_SPACE_PROGRAM, 16 )
1132		AM_RANGE(0x000000, 0x03ffff) AM_READ(SMH_ROM            )   // ROM
1133		AM_RANGE(0x400000, 0x40ffff) AM_READ(SMH_RAM            )   // RAM
1134		AM_RANGE(0x800000, 0x81ffff) AM_READ(SMH_RAM            )   // Layer 0
1135		AM_RANGE(0x820000, 0x83ffff) AM_READ(SMH_RAM            )   // Layer 1
1136		AM_RANGE(0x840000, 0x85ffff) AM_READ(SMH_RAM            )   // Layer 2
1137		AM_RANGE(0x860000, 0x86ffff) AM_READ(metro_bankedrom_r      )   // Banked ROM
1138		AM_RANGE(0x870000, 0x873fff) AM_READ(SMH_RAM            )   // Palette
1139		AM_RANGE(0x874000, 0x874fff) AM_READ(SMH_RAM            )   // Sprites
1140		AM_RANGE(0x878000, 0x8787ff) AM_READ(SMH_RAM            )   // Tiles Set
1141		AM_RANGE(0x8788a2, 0x8788a3) AM_READ(metro_irq_cause_r      )   // IRQ Cause
1142		AM_RANGE(0xc00000, 0xc00001) AM_READ_PORT("IN0")
	1038	static ADDRESS_MAP_START( dharma_map, ADDRESS_SPACE_PROGRAM, 16 )
	1039	AM_RANGE(0x000000, 0x03ffff) AM_ROM                                       // ROM
	1040	AM_RANGE(0x400000, 0x40ffff) AM_RAM                                       // RAM
	1041	AM_RANGE(0x800000, 0x81ffff) AM_RAM_WRITE(metro_vram_0_w) AM_BASE(&metro_vram_0   )   // Layer 0
	1042	AM_RANGE(0x820000, 0x83ffff) AM_RAM_WRITE(metro_vram_1_w) AM_BASE(&metro_vram_1   )   // Layer 1
	1043	AM_RANGE(0x840000, 0x85ffff) AM_RAM_WRITE(metro_vram_2_w) AM_BASE(&metro_vram_2   )   // Layer 2
	1044	AM_RANGE(0x860000, 0x86ffff) AM_READ(metro_bankedrom_r)                        // Banked ROM
	1045	AM_RANGE(0x870000, 0x873fff) AM_RAM_WRITE(paletteram16_GGGGGRRRRRBBBBBx_word_w) AM_BASE(&paletteram16)   // Palette
	1046	AM_RANGE(0x874000, 0x874fff) AM_RAM AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)   // Sprites
	1047	AM_RANGE(0x878000, 0x8787ff) AM_RAM AM_BASE(&metro_tiletable) AM_SIZE(&metro_tiletable_size   )   // Tiles Set
	1048	AM_RANGE(0x878840, 0x87884d) AM_WRITE(metro_blitter_w) AM_BASE(&metro_blitter_regs)   // Tiles Blitter
	1049	AM_RANGE(0x878860, 0x87886b) AM_WRITE(metro_window_w) AM_BASE(&metro_window   )      // Tilemap Window
	1050	AM_RANGE(0x878870, 0x87887b) AM_WRITE(SMH_RAM) AM_BASE(&metro_scroll)            // Scroll Regs
	1051	AM_RANGE(0x878880, 0x878881) AM_WRITENOP                                 // ? increasing
	1052	AM_RANGE(0x878890, 0x878891) AM_WRITENOP                                 // ? increasing
	1053	AM_RANGE(0x8788a4, 0x8788a5) AM_WRITEONLY AM_BASE(&metro_irq_enable)            // IRQ Enable
	1054	AM_RANGE(0x8788a8, 0x8788a9) AM_WRITE(metro_soundlatch_w)                     // To Sound CPU
	1055	AM_RANGE(0x8788aa, 0x8788ab) AM_WRITEONLY AM_BASE(&metro_rombank)               // Rom Bank
	1056	AM_RANGE(0x8788ac, 0x8788ad) AM_WRITEONLY AM_BASE(&metro_screenctrl)            // Screen Control
	1057	AM_RANGE(0x8788a2, 0x8788a3) AM_READWRITE(metro_irq_cause_r,metro_irq_cause_w)      // IRQ Cause / IRQ Acknowledge
	1058	AM_RANGE(0x879700, 0x879713) AM_WRITEONLY AM_BASE(&metro_videoregs)               // Video Registers
	1059	AM_RANGE(0xc00000, 0xc00001) AM_READ_PORT("IN0") AM_WRITE(metro_soundstatus_w)      // To Sound CPU
1143	1060	AM_RANGE(0xc00002, 0xc00003) AM_READ_PORT("IN1")
1144	1061	AM_RANGE(0xc00004, 0xc00005) AM_READ_PORT("DSW0")
1145	1062	AM_RANGE(0xc00006, 0xc00007) AM_READ_PORT("IN2")
	1063	AM_RANGE(0xc00002, 0xc00009) AM_WRITE(metro_coin_lockout_4words_w)               // Coin Lockout
1146	1064	ADDRESS_MAP_END
1147	1065
1148		static ADDRESS_MAP_START( dharma_writemem, ADDRESS_SPACE_PROGRAM, 16 )
1149		AM_RANGE(0x000000, 0x03ffff) AM_WRITE(SMH_ROM                  )   // ROM
1150		AM_RANGE(0x400000, 0x40ffff) AM_WRITE(SMH_RAM                  )   // RAM
1151		AM_RANGE(0x800000, 0x81ffff) AM_WRITE(metro_vram_0_w) AM_BASE(&metro_vram_0   )   // Layer 0
1152		AM_RANGE(0x820000, 0x83ffff) AM_WRITE(metro_vram_1_w) AM_BASE(&metro_vram_1   )   // Layer 1
1153		AM_RANGE(0x840000, 0x85ffff) AM_WRITE(metro_vram_2_w) AM_BASE(&metro_vram_2   )   // Layer 2
1154		AM_RANGE(0x870000, 0x873fff) AM_WRITE(paletteram16_GGGGGRRRRRBBBBBx_word_w  ) AM_BASE(&paletteram16   )   // Palette
1155		AM_RANGE(0x874000, 0x874fff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16) AM_SIZE(&spriteram_size            )   // Sprites
1156		AM_RANGE(0x878000, 0x8787ff) AM_WRITE(SMH_RAM) AM_BASE(&metro_tiletable) AM_SIZE(&metro_tiletable_size   )   // Tiles Set
1157		AM_RANGE(0x878840, 0x87884d) AM_WRITE(metro_blitter_w) AM_BASE(&metro_blitter_regs   )   // Tiles Blitter
1158		AM_RANGE(0x878860, 0x87886b) AM_WRITE(metro_window_w) AM_BASE(&metro_window   )   // Tilemap Window
1159		AM_RANGE(0x878870, 0x87887b) AM_WRITE(SMH_RAM) AM_BASE(&metro_scroll      )   // Scroll Regs
1160		AM_RANGE(0x878880, 0x878881) AM_WRITE(SMH_NOP                  )   // ? increasing
1161		AM_RANGE(0x878890, 0x878891) AM_WRITE(SMH_NOP                  )   // ? increasing
1162		AM_RANGE(0x8788a2, 0x8788a3) AM_WRITE(metro_irq_cause_w            )   // IRQ Acknowledge
1163		AM_RANGE(0x8788a4, 0x8788a5) AM_WRITE(SMH_RAM) AM_BASE(&metro_irq_enable   )   // IRQ Enable
1164		AM_RANGE(0x8788a8, 0x8788a9) AM_WRITE(metro_soundlatch_w         )   // To Sound CPU
1165		AM_RANGE(0x8788aa, 0x8788ab) AM_WRITE(SMH_RAM) AM_BASE(&metro_rombank      )   // Rom Bank
1166		AM_RANGE(0x8788ac, 0x8788ad) AM_WRITE(SMH_RAM) AM_BASE(&metro_screenctrl   )   // Screen Control
1167		AM_RANGE(0x879700, 0x879713) AM_WRITE(SMH_RAM) AM_BASE(&metro_videoregs   )   // Video Registers
1168		AM_RANGE(0xc00000, 0xc00001) AM_WRITE(metro_soundstatus_w         )   // To Sound CPU
1169		AM_RANGE(0xc00002, 0xc00009) AM_WRITE(metro_coin_lockout_4words_w   )   // Coin Lockout
1170		ADDRESS_MAP_END
1171	1066
1172
1173	1067	/***************************************************************************
1174	1068	Karate Tournament
1175	1069	***************************************************************************/
r4679	r4680
1194	1088	KARATOUR_VRAM( 1 )
1195	1089	KARATOUR_VRAM( 2 )
1196	1090
1197		static ADDRESS_MAP_START( karatour_readmem, ADDRESS_SPACE_PROGRAM, 16 )
1198		AM_RANGE(0x000000, 0x07ffff) AM_READ(SMH_ROM            )   // ROM
1199		AM_RANGE(0xffc000, 0xffffff) AM_READ(SMH_RAM            )   // RAM
1200		AM_RANGE(0x400000, 0x400001) AM_READ(metro_soundstatus_r   )   // From Sound CPU
1201		AM_RANGE(0x400002, 0x400003) AM_READ_PORT("IN0")            // Inputs
1202		AM_RANGE(0x400004, 0x400005) AM_READ_PORT("IN1")            //
1203		AM_RANGE(0x400006, 0x400007) AM_READ_PORT("DSW0")            //
1204		AM_RANGE(0x40000a, 0x40000b) AM_READ_PORT("DSW1")            //
1205		AM_RANGE(0x40000c, 0x40000d) AM_READ_PORT("IN2")            //
1206		AM_RANGE(0x860000, 0x86ffff) AM_READ(metro_bankedrom_r      )   // Banked ROM
1207		AM_RANGE(0x870000, 0x873fff) AM_READ(SMH_RAM            )   // Palette
1208		AM_RANGE(0x874000, 0x874fff) AM_READ(SMH_RAM            )   // Sprites
1209		AM_RANGE(0x875000, 0x875fff) AM_READ(karatour_vram_0_r      )   // Layer 0 (Part of)
1210		AM_RANGE(0x876000, 0x876fff) AM_READ(karatour_vram_1_r      )   // Layer 1 (Part of)
1211		AM_RANGE(0x877000, 0x877fff) AM_READ(karatour_vram_2_r      )   // Layer 2 (Part of)
1212		AM_RANGE(0x878000, 0x8787ff) AM_READ(SMH_RAM            )   // Tiles Set
1213		AM_RANGE(0x8788a2, 0x8788a3) AM_READ(metro_irq_cause_r      )   // IRQ Cause
	1091	static ADDRESS_MAP_START( karatour_map, ADDRESS_SPACE_PROGRAM, 16 )
	1092	AM_RANGE(0x000000, 0x07ffff) AM_ROM                                       // ROM
	1093	AM_RANGE(0xffc000, 0xffffff) AM_RAM                                       // RAM
	1094	AM_RANGE(0x400000, 0x400001) AM_READWRITE(metro_soundstatus_r,metro_soundstatus_w)   // From Sound CPU
	1095	AM_RANGE(0x400002, 0x400003) AM_READ_PORT("IN0")                           // Inputs
	1096	AM_RANGE(0x400002, 0x400003) AM_WRITE(metro_coin_lockout_1word_w)               // Coin Lockout
	1097	AM_RANGE(0x400004, 0x400005) AM_READ_PORT("IN1")                           //
	1098	AM_RANGE(0x400006, 0x400007) AM_READ_PORT("DSW0")                           //
	1099	AM_RANGE(0x40000a, 0x40000b) AM_READ_PORT("DSW1")                           //
	1100	AM_RANGE(0x40000c, 0x40000d) AM_READ_PORT("IN2")                           //
	1101	AM_RANGE(0x860000, 0x86ffff) AM_READ(metro_bankedrom_r)                        // Banked ROM
	1102	AM_RANGE(0x870000, 0x873fff) AM_RAM_WRITE(paletteram16_GGGGGRRRRRBBBBBx_word_w) AM_BASE(&paletteram16)   // Palette
	1103	AM_RANGE(0x874000, 0x874fff) AM_RAM AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)   // Sprites
	1104	AM_RANGE(0x875000, 0x875fff) AM_READWRITE(karatour_vram_0_r,karatour_vram_0_w)      // Layer 0 (Part of)
	1105	AM_RANGE(0x876000, 0x876fff) AM_READWRITE(karatour_vram_1_r,karatour_vram_1_w)      // Layer 1 (Part of)
	1106	AM_RANGE(0x877000, 0x877fff) AM_READWRITE(karatour_vram_2_r,karatour_vram_2_w)      // Layer 2 (Part of)
	1107	AM_RANGE(0x878000, 0x8787ff) AM_RAM AM_BASE(&metro_tiletable) AM_SIZE(&metro_tiletable_size)   // Tiles Set
	1108	AM_RANGE(0x878800, 0x878813) AM_WRITEONLY AM_BASE(&metro_videoregs)               // Video Registers
	1109	AM_RANGE(0x878840, 0x87884d) AM_WRITE(metro_blitter_w) AM_BASE(&metro_blitter_regs)   // Tiles Blitter
	1110	AM_RANGE(0x878860, 0x87886b) AM_WRITE(metro_window_w) AM_BASE(&metro_window)      // Tilemap Window
	1111	AM_RANGE(0x878870, 0x87887b) AM_WRITEONLY AM_BASE(&metro_scroll)               // Scroll
	1112	AM_RANGE(0x878880, 0x878881) AM_WRITENOP                                 // ? increasing
	1113	AM_RANGE(0x878890, 0x878891) AM_WRITENOP                                 // ? increasing
	1114	AM_RANGE(0x8788a2, 0x8788a3) AM_READWRITE(metro_irq_cause_r,metro_irq_cause_w)      // IRQ Cause / IRQ Acknowledge
	1115	AM_RANGE(0x8788a4, 0x8788a5) AM_WRITEONLY AM_BASE(&metro_irq_enable)            // IRQ Enable
	1116	AM_RANGE(0x8788a8, 0x8788a9) AM_WRITE(metro_soundlatch_w)                     // To Sound CPU
	1117	AM_RANGE(0x8788aa, 0x8788ab) AM_WRITEONLY AM_BASE(&metro_rombank)               // Rom Bank
	1118	AM_RANGE(0x8788ac, 0x8788ad) AM_WRITEONLY AM_BASE(&metro_screenctrl)            // Screen Control
1214	1119	ADDRESS_MAP_END
1215	1120
1216		static ADDRESS_MAP_START( karatour_writemem, ADDRESS_SPACE_PROGRAM, 16 )
1217		AM_RANGE(0x000000, 0x07ffff) AM_WRITE(SMH_ROM                  )   // ROM
1218		AM_RANGE(0xffc000, 0xffffff) AM_WRITE(SMH_RAM                  )   // RAM
1219		AM_RANGE(0x400000, 0x400001) AM_WRITE(metro_soundstatus_w         )   // To Sound CPU
1220		AM_RANGE(0x400002, 0x400003) AM_WRITE(metro_coin_lockout_1word_w   )   // Coin Lockout
1221		AM_RANGE(0x870000, 0x873fff) AM_WRITE(paletteram16_GGGGGRRRRRBBBBBx_word_w  ) AM_BASE(&paletteram16   )   // Palette
1222		AM_RANGE(0x874000, 0x874fff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16) AM_SIZE(&spriteram_size            )   // Sprites
1223		AM_RANGE(0x875000, 0x875fff) AM_WRITE(karatour_vram_0_w            )   // Layer 0 (Part of)
1224		AM_RANGE(0x876000, 0x876fff) AM_WRITE(karatour_vram_1_w            )   // Layer 1 (Part of)
1225		AM_RANGE(0x877000, 0x877fff) AM_WRITE(karatour_vram_2_w            )   // Layer 2 (Part of)
1226		AM_RANGE(0x878000, 0x8787ff) AM_WRITE(SMH_RAM) AM_BASE(&metro_tiletable) AM_SIZE(&metro_tiletable_size   )   // Tiles Set
1227		AM_RANGE(0x878800, 0x878813) AM_WRITE(SMH_RAM) AM_BASE(&metro_videoregs   )   // Video Registers
1228		AM_RANGE(0x878840, 0x87884d) AM_WRITE(metro_blitter_w) AM_BASE(&metro_blitter_regs   )   // Tiles Blitter
1229		AM_RANGE(0x878860, 0x87886b) AM_WRITE(metro_window_w) AM_BASE(&metro_window   )   // Tilemap Window
1230		AM_RANGE(0x878870, 0x87887b) AM_WRITE(SMH_RAM) AM_BASE(&metro_scroll      )   // Scroll
1231		AM_RANGE(0x878880, 0x878881) AM_WRITE(SMH_NOP                  )   // ? increasing
1232		AM_RANGE(0x878890, 0x878891) AM_WRITE(SMH_NOP                  )   // ? increasing
1233		AM_RANGE(0x8788a2, 0x8788a3) AM_WRITE(metro_irq_cause_w            )   // IRQ Acknowledge
1234		AM_RANGE(0x8788a4, 0x8788a5) AM_WRITE(SMH_RAM) AM_BASE(&metro_irq_enable   )   // IRQ Enable
1235		AM_RANGE(0x8788a8, 0x8788a9) AM_WRITE(metro_soundlatch_w         )   // To Sound CPU
1236		AM_RANGE(0x8788aa, 0x8788ab) AM_WRITE(SMH_RAM) AM_BASE(&metro_rombank      )   // Rom Bank
1237		AM_RANGE(0x8788ac, 0x8788ad) AM_WRITE(SMH_RAM) AM_BASE(&metro_screenctrl   )   // Screen Control
1238		ADDRESS_MAP_END
1239	1121
1240
1241	1122	/***************************************************************************
1242	1123	Sankokushi
1243	1124	***************************************************************************/
1244	1125
1245	1126	/* same limited tilemap access as karatour */
1246	1127
1247		static ADDRESS_MAP_START( kokushi_readmem, ADDRESS_SPACE_PROGRAM, 16 )
1248		AM_RANGE(0x000000, 0x07ffff) AM_READ(SMH_ROM            )   // ROM
1249		AM_RANGE(0x7fc000, 0x7fffff) AM_READ(SMH_RAM            )   // RAM
1250		AM_RANGE(0x860000, 0x86ffff) AM_READ(metro_bankedrom_r      )   // Banked ROM
1251		AM_RANGE(0x870000, 0x873fff) AM_READ(SMH_RAM            )   // Palette
1252		AM_RANGE(0x874000, 0x874fff) AM_READ(SMH_RAM            )   // Sprites
1253		AM_RANGE(0x875000, 0x875fff) AM_READ(karatour_vram_0_r      )   // Layer 0 (Part of)
1254		AM_RANGE(0x876000, 0x876fff) AM_READ(karatour_vram_1_r      )   // Layer 1 (Part of)
1255		AM_RANGE(0x877000, 0x877fff) AM_READ(karatour_vram_2_r      )   // Layer 2 (Part of)
1256		AM_RANGE(0x878000, 0x8787ff) AM_READ(SMH_RAM            )   // Tiles Set
1257		AM_RANGE(0x8788a2, 0x8788a3) AM_READ(metro_irq_cause_r      )   // IRQ Cause
1258		AM_RANGE(0xc00000, 0xc00001) AM_READ_PORT("IN0")            // From Sound CPU
1259		AM_RANGE(0xc00002, 0xc00003) AM_READ_PORT("IN1")            // Inputs
	1128	static ADDRESS_MAP_START( kokushi_map, ADDRESS_SPACE_PROGRAM, 16 )
	1129	AM_RANGE(0x000000, 0x07ffff) AM_ROM                                       // ROM
	1130	AM_RANGE(0x7fc000, 0x7fffff) AM_RAM                                       // RAM
	1131	AM_RANGE(0x860000, 0x86ffff) AM_READ(metro_bankedrom_r)                        // Banked ROM
	1132	AM_RANGE(0x870000, 0x873fff) AM_RAM_WRITE(paletteram16_GGGGGRRRRRBBBBBx_word_w) AM_BASE(&paletteram16)   // Palette
	1133	AM_RANGE(0x874000, 0x874fff) AM_RAM AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)   // Sprites
	1134	AM_RANGE(0x875000, 0x875fff) AM_READWRITE(karatour_vram_0_r,karatour_vram_0_w)      // Layer 0 (Part of)
	1135	AM_RANGE(0x876000, 0x876fff) AM_READWRITE(karatour_vram_1_r,karatour_vram_1_w)      // Layer 1 (Part of)
	1136	AM_RANGE(0x877000, 0x877fff) AM_READWRITE(karatour_vram_2_r,karatour_vram_2_w)      // Layer 2 (Part of)
	1137	AM_RANGE(0x878000, 0x8787ff) AM_RAM AM_BASE(&metro_tiletable) AM_SIZE(&metro_tiletable_size)   // Tiles Set
	1138	AM_RANGE(0x878840, 0x87884d) AM_WRITE(metro_blitter_w) AM_BASE(&metro_blitter_regs)   // Tiles Blitter
	1139	AM_RANGE(0x878860, 0x87886b) AM_WRITE(metro_window_w) AM_BASE(&metro_window)      // Tilemap Window
	1140	AM_RANGE(0x878870, 0x87887b) AM_WRITEONLY AM_BASE(&metro_scroll)               // Scroll Regs - WRONG
	1141	//  AM_RANGE(0x878880, 0x878881) AM_WRITENOP                                            // ? increasing
	1142	AM_RANGE(0x878890, 0x878891) AM_WRITENOP                                 // ? increasing
	1143	AM_RANGE(0x8788a2, 0x8788a3) AM_READWRITE(metro_irq_cause_r,metro_irq_cause_w)      // IRQ Cause /  IRQ Acknowledge
	1144	AM_RANGE(0x8788a4, 0x8788a5) AM_WRITEONLY AM_BASE(&metro_irq_enable)            // IRQ Enable
	1145	AM_RANGE(0x8788a8, 0x8788a9) AM_WRITE(metro_soundlatch_w)                     // To Sound CPU
	1146	AM_RANGE(0x8788aa, 0x8788ab) AM_WRITEONLY AM_BASE(&metro_rombank)               // Rom Bank
	1147	AM_RANGE(0x8788ac, 0x8788ad) AM_WRITEONLY AM_BASE(&metro_screenctrl)            // Screen Control
	1148	AM_RANGE(0x879700, 0x879713) AM_WRITEONLY AM_BASE(&metro_videoregs)               // Video Registers
	1149	AM_RANGE(0xc00000, 0xc00001) AM_READ_PORT("IN0") AM_WRITE(metro_soundstatus_w)      // To Sound CPU
	1150	AM_RANGE(0xc00002, 0xc00003) AM_READ_PORT("IN1")                           // Inputs
1260	1151	AM_RANGE(0xc00004, 0xc00005) AM_READ_PORT("DSW0")
	1152	AM_RANGE(0xc00002, 0xc00009) AM_WRITE(metro_coin_lockout_4words_w   )            // Coin Lockout
1261	1153	ADDRESS_MAP_END
1262	1154
1263		static ADDRESS_MAP_START( kokushi_writemem, ADDRESS_SPACE_PROGRAM, 16 )
1264		AM_RANGE(0x000000, 0x07ffff) AM_WRITE(SMH_ROM                  )   // ROM
1265		AM_RANGE(0x7fc000, 0x7fffff) AM_WRITE(SMH_RAM                  )   // RAM
1266		AM_RANGE(0x870000, 0x873fff) AM_WRITE(paletteram16_GGGGGRRRRRBBBBBx_word_w  ) AM_BASE(&paletteram16   )   // Palette
1267		AM_RANGE(0x874000, 0x874fff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16) AM_SIZE(&spriteram_size            )   // Sprites
1268		AM_RANGE(0x875000, 0x875fff) AM_WRITE(karatour_vram_0_w            )   // Layer 0 (Part of)
1269		AM_RANGE(0x876000, 0x876fff) AM_WRITE(karatour_vram_1_w            )   // Layer 1 (Part of)
1270		AM_RANGE(0x877000, 0x877fff) AM_WRITE(karatour_vram_2_w            )   // Layer 2 (Part of)
1271		AM_RANGE(0x878000, 0x8787ff) AM_WRITE(SMH_RAM) AM_BASE(&metro_tiletable) AM_SIZE(&metro_tiletable_size   )   // Tiles Set
1272		AM_RANGE(0x878840, 0x87884d) AM_WRITE(metro_blitter_w) AM_BASE(&metro_blitter_regs   )   // Tiles Blitter
1273		AM_RANGE(0x878860, 0x87886b) AM_WRITE(metro_window_w) AM_BASE(&metro_window   )   // Tilemap Window
1274		AM_RANGE(0x878870, 0x87887b) AM_WRITE(SMH_RAM) AM_BASE(&metro_scroll      )   // Scroll Regs - WRONG
1275		//  AM_RANGE(0x878880, 0x878881) AM_WRITE(SMH_NOP                     )   // ? increasing
1276		AM_RANGE(0x878890, 0x878891) AM_WRITE(SMH_NOP                  )   // ? increasing
1277		AM_RANGE(0x8788a2, 0x8788a3) AM_WRITE(metro_irq_cause_w            )   // IRQ Acknowledge
1278		AM_RANGE(0x8788a4, 0x8788a5) AM_WRITE(SMH_RAM) AM_BASE(&metro_irq_enable   )   // IRQ Enable
1279		AM_RANGE(0x8788a8, 0x8788a9) AM_WRITE(metro_soundlatch_w         )   // To Sound CPU
1280		AM_RANGE(0x8788aa, 0x8788ab) AM_WRITE(SMH_RAM) AM_BASE(&metro_rombank      )   // Rom Bank
1281		AM_RANGE(0x8788ac, 0x8788ad) AM_WRITE(SMH_RAM) AM_BASE(&metro_screenctrl   )   // Screen Control
1282		AM_RANGE(0x879700, 0x879713) AM_WRITE(SMH_RAM) AM_BASE(&metro_videoregs   )   // Video Registers
1283		AM_RANGE(0xc00000, 0xc00001) AM_WRITE(metro_soundstatus_w         )   // To Sound CPU
1284		AM_RANGE(0xc00002, 0xc00009) AM_WRITE(metro_coin_lockout_4words_w   )   // Coin Lockout
1285		ADDRESS_MAP_END
1286	1155
1287
1288
1289	1156	/***************************************************************************
1290	1157	Last Fortress
1291	1158	***************************************************************************/
1292	1159
1293		static ADDRESS_MAP_START( lastfort_readmem, ADDRESS_SPACE_PROGRAM, 16 )
1294		AM_RANGE(0x000000, 0x03ffff) AM_READ(SMH_ROM            )   // ROM
1295		AM_RANGE(0x400000, 0x40ffff) AM_READ(SMH_RAM            )   // RAM
1296		AM_RANGE(0x800000, 0x81ffff) AM_READ(SMH_RAM            )   // Layer 0
1297		AM_RANGE(0x820000, 0x83ffff) AM_READ(SMH_RAM            )   // Layer 1
1298		AM_RANGE(0x840000, 0x85ffff) AM_READ(SMH_RAM            )   // Layer 2
1299		AM_RANGE(0x860000, 0x86ffff) AM_READ(metro_bankedrom_r      )   // Banked ROM
1300		AM_RANGE(0x870000, 0x873fff) AM_READ(SMH_RAM            )   // Palette
1301		AM_RANGE(0x874000, 0x874fff) AM_READ(SMH_RAM            )   // Sprites
1302		AM_RANGE(0x878000, 0x8787ff) AM_READ(SMH_RAM            )   // Tiles Set
1303		AM_RANGE(0x8788a2, 0x8788a3) AM_READ(metro_irq_cause_r      )   // IRQ Cause
1304		AM_RANGE(0xc00000, 0xc00001) AM_READ(metro_soundstatus_r   )   // From Sound CPU
1305		AM_RANGE(0xc00002, 0xc00003) AM_READ(SMH_NOP            )   //
1306		AM_RANGE(0xc00004, 0xc00005) AM_READ_PORT("IN0")            // Inputs
1307		AM_RANGE(0xc00006, 0xc00007) AM_READ_PORT("IN1")            //
1308		AM_RANGE(0xc00008, 0xc00009) AM_READ_PORT("IN2")            //
1309		AM_RANGE(0xc0000a, 0xc0000b) AM_READ_PORT("DSW0")            //
1310		AM_RANGE(0xc0000c, 0xc0000d) AM_READ_PORT("DSW1")            //
1311		AM_RANGE(0xc0000e, 0xc0000f) AM_READ_PORT("IN3")            //
	1160	static ADDRESS_MAP_START( lastfort_map, ADDRESS_SPACE_PROGRAM, 16 )
	1161	AM_RANGE(0x000000, 0x03ffff) AM_ROM                                       // ROM
	1162	AM_RANGE(0x400000, 0x40ffff) AM_RAM                                       // RAM
	1163	AM_RANGE(0x800000, 0x81ffff) AM_RAM_WRITE(metro_vram_0_w) AM_BASE(&metro_vram_0)   // Layer 0
	1164	AM_RANGE(0x820000, 0x83ffff) AM_RAM_WRITE(metro_vram_1_w) AM_BASE(&metro_vram_1)   // Layer 1
	1165	AM_RANGE(0x840000, 0x85ffff) AM_RAM_WRITE(metro_vram_2_w) AM_BASE(&metro_vram_2)   // Layer 2
	1166	AM_RANGE(0x860000, 0x86ffff) AM_READ(metro_bankedrom_r)                        // Banked ROM
	1167	AM_RANGE(0x870000, 0x873fff) AM_RAM_WRITE(paletteram16_GGGGGRRRRRBBBBBx_word_w) AM_BASE(&paletteram16)   // Palette
	1168	AM_RANGE(0x874000, 0x874fff) AM_RAM AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)   // Sprites
	1169	AM_RANGE(0x878000, 0x8787ff) AM_RAM AM_BASE(&metro_tiletable) AM_SIZE(&metro_tiletable_size)   // Tiles Set
	1170	AM_RANGE(0x878800, 0x878813) AM_WRITEONLY AM_BASE(&metro_videoregs)               // Video Registers
	1171	AM_RANGE(0x878840, 0x87884d) AM_WRITE(metro_blitter_w) AM_BASE(&metro_blitter_regs)   // Tiles Blitter
	1172	AM_RANGE(0x878860, 0x87886b) AM_WRITE(metro_window_w) AM_BASE(&metro_window)      // Tilemap Window
	1173	AM_RANGE(0x878870, 0x87887b) AM_WRITEONLY AM_BASE(&metro_scroll)               // Scroll
	1174	AM_RANGE(0x878880, 0x878881) AM_WRITENOP                                 // ? increasing
	1175	AM_RANGE(0x878890, 0x878891) AM_WRITENOP                                 // ? increasing
	1176	AM_RANGE(0x8788a2, 0x8788a3) AM_READWRITE(metro_irq_cause_r,metro_irq_cause_w)      // IRQ Cause / IRQ Acknowledge
	1177	AM_RANGE(0x8788a4, 0x8788a5) AM_WRITEONLY AM_BASE(&metro_irq_enable)            // IRQ Enable
	1178	AM_RANGE(0x8788a8, 0x8788a9) AM_WRITE(metro_soundlatch_w)                     // To Sound CPU
	1179	AM_RANGE(0x8788aa, 0x8788ab) AM_WRITEONLY AM_BASE(&metro_rombank)               // Rom Bank
	1180	AM_RANGE(0x8788ac, 0x8788ad) AM_WRITEONLY AM_BASE(&metro_screenctrl)            // Screen Control
	1181	AM_RANGE(0xc00000, 0xc00001) AM_READWRITE(metro_soundstatus_r,metro_soundstatus_w)   // From / To Sound CPU
	1182	AM_RANGE(0xc00002, 0xc00003) AM_WRITE(metro_coin_lockout_1word_w)               // Coin Lockout
	1183	AM_RANGE(0xc00004, 0xc00005) AM_READ_PORT("IN0")                           // Inputs
	1184	AM_RANGE(0xc00006, 0xc00007) AM_READ_PORT("IN1")                           //
	1185	AM_RANGE(0xc00008, 0xc00009) AM_READ_PORT("IN2")                           //
	1186	AM_RANGE(0xc0000a, 0xc0000b) AM_READ_PORT("DSW0")                           //
	1187	AM_RANGE(0xc0000c, 0xc0000d) AM_READ_PORT("DSW1")                           //
	1188	AM_RANGE(0xc0000e, 0xc0000f) AM_READ_PORT("IN3")                           //
1312	1189	ADDRESS_MAP_END
1313	1190
1314		static ADDRESS_MAP_START( lastfort_writemem, ADDRESS_SPACE_PROGRAM, 16 )
1315		AM_RANGE(0x000000, 0x03ffff) AM_WRITE(SMH_ROM                  )   // ROM
1316		AM_RANGE(0x400000, 0x40ffff) AM_WRITE(SMH_RAM                  )   // RAM
1317		AM_RANGE(0x800000, 0x81ffff) AM_WRITE(metro_vram_0_w) AM_BASE(&metro_vram_0   )   // Layer 0
1318		AM_RANGE(0x820000, 0x83ffff) AM_WRITE(metro_vram_1_w) AM_BASE(&metro_vram_1   )   // Layer 1
1319		AM_RANGE(0x840000, 0x85ffff) AM_WRITE(metro_vram_2_w) AM_BASE(&metro_vram_2   )   // Layer 2
1320		AM_RANGE(0x870000, 0x873fff) AM_WRITE(paletteram16_GGGGGRRRRRBBBBBx_word_w  ) AM_BASE(&paletteram16   )   // Palette
1321		AM_RANGE(0x874000, 0x874fff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16) AM_SIZE(&spriteram_size            )   // Sprites
1322		AM_RANGE(0x878000, 0x8787ff) AM_WRITE(SMH_RAM) AM_BASE(&metro_tiletable) AM_SIZE(&metro_tiletable_size   )   // Tiles Set
1323		AM_RANGE(0x878800, 0x878813) AM_WRITE(SMH_RAM) AM_BASE(&metro_videoregs   )   // Video Registers
1324		AM_RANGE(0x878840, 0x87884d) AM_WRITE(metro_blitter_w) AM_BASE(&metro_blitter_regs   )   // Tiles Blitter
1325		AM_RANGE(0x878860, 0x87886b) AM_WRITE(metro_window_w) AM_BASE(&metro_window   )   // Tilemap Window
1326		AM_RANGE(0x878870, 0x87887b) AM_WRITE(SMH_RAM) AM_BASE(&metro_scroll      )   // Scroll
1327		AM_RANGE(0x878880, 0x878881) AM_WRITE(SMH_NOP                  )   // ? increasing
1328		AM_RANGE(0x878890, 0x878891) AM_WRITE(SMH_NOP                  )   // ? increasing
1329		AM_RANGE(0x8788a2, 0x8788a3) AM_WRITE(metro_irq_cause_w            )   // IRQ Acknowledge
1330		AM_RANGE(0x8788a4, 0x8788a5) AM_WRITE(SMH_RAM) AM_BASE(&metro_irq_enable   )   // IRQ Enable
1331		AM_RANGE(0x8788a8, 0x8788a9) AM_WRITE(metro_soundlatch_w         )   // To Sound CPU
1332		AM_RANGE(0x8788aa, 0x8788ab) AM_WRITE(SMH_RAM) AM_BASE(&metro_rombank      )   // Rom Bank
1333		AM_RANGE(0x8788ac, 0x8788ad) AM_WRITE(SMH_RAM) AM_BASE(&metro_screenctrl   )   // Screen Control
1334		AM_RANGE(0xc00000, 0xc00001) AM_WRITE(metro_soundstatus_w         )   // To Sound CPU
1335		AM_RANGE(0xc00002, 0xc00003) AM_WRITE(metro_coin_lockout_1word_w   )   // Coin Lockout
1336		ADDRESS_MAP_END
1337
1338	1191	/* the German version is halfway between lastfort and ladykill (karatour) memory maps */
1339	1192
1340	1193	/* todo: clean up input reads etc. */
1341		static ADDRESS_MAP_START( lastforg_readmem, ADDRESS_SPACE_PROGRAM, 16 )
1342		AM_RANGE(0x000000, 0x03ffff) AM_READ(SMH_ROM            )   // ROM
1343		AM_RANGE(0x400000, 0x400001) AM_READ(metro_soundstatus_r   )   // From Sound CPU
1344		AM_RANGE(0x400002, 0x400003) AM_READ_PORT("IN0")            // Inputs
1345		AM_RANGE(0x400004, 0x400005) AM_READ_PORT("IN1")            //
1346		AM_RANGE(0x400006, 0x400007) AM_READ_PORT("DSW0")            //
1347		AM_RANGE(0x40000a, 0x40000b) AM_READ_PORT("DSW1")            //
1348		AM_RANGE(0x40000c, 0x40000d) AM_READ_PORT("IN2")            //
1349		AM_RANGE(0x880000, 0x89ffff) AM_READ(SMH_RAM            )   // Layer 0
1350		AM_RANGE(0x8a0000, 0x8bffff) AM_READ(SMH_RAM            )   // Layer 1
1351		AM_RANGE(0x8c0000, 0x8dffff) AM_READ(SMH_RAM            )   // Layer 2
1352		AM_RANGE(0x8e0000, 0x8effff) AM_READ(metro_bankedrom_r      )   // Banked ROM
1353		AM_RANGE(0x8f0000, 0x8f3fff) AM_READ(SMH_RAM            )   // Palette
1354		AM_RANGE(0x8f4000, 0x8f4fff) AM_READ(SMH_RAM            )   // Sprites
1355		AM_RANGE(0x8f8000, 0x8f87ff) AM_READ(SMH_RAM            )   // Tiles Set
1356		AM_RANGE(0x8f88a2, 0x8f88a3) AM_READ(metro_irq_cause_r      )   // IRQ Cause
1357		AM_RANGE(0xc00000, 0xc0ffff) AM_READ(SMH_RAM            )   // RAM
	1194	static ADDRESS_MAP_START( lastforg_map, ADDRESS_SPACE_PROGRAM, 16 )
	1195	AM_RANGE(0x000000, 0x03ffff) AM_ROM                                       // ROM
	1196	AM_RANGE(0x400000, 0x400001) AM_READWRITE(metro_soundstatus_r,metro_soundstatus_w)   // From / To Sound CPU
	1197	AM_RANGE(0x400002, 0x400003) AM_READ_PORT("IN0")                           // Inputs
	1198	AM_RANGE(0x400002, 0x400003) AM_WRITE(metro_coin_lockout_1word_w)               // Coin Lockout
	1199	AM_RANGE(0x400004, 0x400005) AM_READ_PORT("IN1")                           //
	1200	AM_RANGE(0x400006, 0x400007) AM_READ_PORT("DSW0")                           //
	1201	AM_RANGE(0x40000a, 0x40000b) AM_READ_PORT("DSW1")                           //
	1202	AM_RANGE(0x40000c, 0x40000d) AM_READ_PORT("IN2")                           //
	1203	AM_RANGE(0x880000, 0x89ffff) AM_RAM_WRITE(metro_vram_0_w) AM_BASE(&metro_vram_0)   // Layer 0
	1204	AM_RANGE(0x8a0000, 0x8bffff) AM_RAM_WRITE(metro_vram_1_w) AM_BASE(&metro_vram_1)   // Layer 1
	1205	AM_RANGE(0x8c0000, 0x8dffff) AM_RAM_WRITE(metro_vram_2_w) AM_BASE(&metro_vram_2)   // Layer 2
	1206	AM_RANGE(0x8e0000, 0x8effff) AM_READ(metro_bankedrom_r)                        // Banked ROM
	1207	AM_RANGE(0x8f0000, 0x8f3fff) AM_RAM_WRITE(paletteram16_GGGGGRRRRRBBBBBx_word_w) AM_BASE(&paletteram16)   // Palette
	1208	AM_RANGE(0x8f4000, 0x8f4fff) AM_RAM AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)   // Sprites
	1209	AM_RANGE(0x8f8000, 0x8f87ff) AM_RAM AM_BASE(&metro_tiletable) AM_SIZE(&metro_tiletable_size)   // Tiles Set
	1210	AM_RANGE(0x8f8800, 0x8f8813) AM_WRITEONLY AM_BASE(&metro_videoregs)               // Video Registers
	1211	AM_RANGE(0x8f8840, 0x8f884d) AM_WRITE(metro_blitter_w) AM_BASE(&metro_blitter_regs)   // Tiles Blitter
	1212	AM_RANGE(0x8f8860, 0x8f886b) AM_WRITE(metro_window_w) AM_BASE(&metro_window)      // Tilemap Window
	1213	AM_RANGE(0x8f8870, 0x8f887b) AM_WRITEONLY AM_BASE(&metro_scroll)               // Scroll
	1214	AM_RANGE(0x8f8880, 0x8f8881) AM_WRITENOP                                 // ? increasing
	1215	AM_RANGE(0x8f8890, 0x8f8891) AM_WRITENOP                                 // ? increasing
	1216	AM_RANGE(0x8f88a2, 0x8f88a3) AM_READWRITE(metro_irq_cause_r,metro_irq_cause_w)      // IRQ Cause / IRQ Acknowledge
	1217	AM_RANGE(0x8f88a4, 0x8f88a5) AM_WRITEONLY AM_BASE(&metro_irq_enable)            // IRQ Enable
	1218	AM_RANGE(0x8f88a8, 0x8f88a9) AM_WRITE(metro_soundlatch_w)                     // To Sound CPU
	1219	AM_RANGE(0x8f88aa, 0x8f88ab) AM_WRITEONLY AM_BASE(&metro_rombank)               // Rom Bank
	1220	AM_RANGE(0x8f88ac, 0x8f88ad) AM_WRITEONLY AM_BASE(&metro_screenctrl)            // Screen Control
	1221	AM_RANGE(0xc00000, 0xc0ffff) AM_RAM                                     // RAM
1358	1222	ADDRESS_MAP_END
1359	1223
1360		static ADDRESS_MAP_START( lastforg_writemem, ADDRESS_SPACE_PROGRAM, 16 )
1361		AM_RANGE(0x000000, 0x03ffff) AM_WRITE(SMH_ROM                  )   // ROM
1362		AM_RANGE(0x400000, 0x400001) AM_WRITE(metro_soundstatus_w         )   // To Sound CPU
1363		AM_RANGE(0x400002, 0x400003) AM_WRITE(metro_coin_lockout_1word_w   )   // Coin Lockout
1364		AM_RANGE(0x880000, 0x89ffff) AM_WRITE(metro_vram_0_w) AM_BASE(&metro_vram_0   )   // Layer 0
1365		AM_RANGE(0x8a0000, 0x8bffff) AM_WRITE(metro_vram_1_w) AM_BASE(&metro_vram_1   )   // Layer 1
1366		AM_RANGE(0x8c0000, 0x8dffff) AM_WRITE(metro_vram_2_w) AM_BASE(&metro_vram_2   )   // Layer 2
1367		AM_RANGE(0x8f0000, 0x8f3fff) AM_WRITE(paletteram16_GGGGGRRRRRBBBBBx_word_w  ) AM_BASE(&paletteram16   )   // Palette
1368		AM_RANGE(0x8f4000, 0x8f4fff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16) AM_SIZE(&spriteram_size            )   // Sprites
1369		AM_RANGE(0x8f8000, 0x8f87ff) AM_WRITE(SMH_RAM) AM_BASE(&metro_tiletable) AM_SIZE(&metro_tiletable_size   )   // Tiles Set
1370		AM_RANGE(0x8f8800, 0x8f8813) AM_WRITE(SMH_RAM) AM_BASE(&metro_videoregs   )   // Video Registers
1371		AM_RANGE(0x8f8840, 0x8f884d) AM_WRITE(metro_blitter_w) AM_BASE(&metro_blitter_regs   )   // Tiles Blitter
1372		AM_RANGE(0x8f8860, 0x8f886b) AM_WRITE(metro_window_w) AM_BASE(&metro_window   )   // Tilemap Window
1373		AM_RANGE(0x8f8870, 0x8f887b) AM_WRITE(SMH_RAM) AM_BASE(&metro_scroll      )   // Scroll
1374		AM_RANGE(0x8f8880, 0x8f8881) AM_WRITE(SMH_NOP                  )   // ? increasing
1375		AM_RANGE(0x8f8890, 0x8f8891) AM_WRITE(SMH_NOP                  )   // ? increasing
1376		AM_RANGE(0x8f88a2, 0x8f88a3) AM_WRITE(metro_irq_cause_w            )   // IRQ Acknowledge
1377		AM_RANGE(0x8f88a4, 0x8f88a5) AM_WRITE(SMH_RAM) AM_BASE(&metro_irq_enable   )   // IRQ Enable
1378		AM_RANGE(0x8f88a8, 0x8f88a9) AM_WRITE(metro_soundlatch_w         )   // To Sound CPU
1379		AM_RANGE(0x8f88aa, 0x8f88ab) AM_WRITE(SMH_RAM) AM_BASE(&metro_rombank      )   // Rom Bank
1380		AM_RANGE(0x8f88ac, 0x8f88ad) AM_WRITE(SMH_RAM) AM_BASE(&metro_screenctrl   )   // Screen Control
1381		AM_RANGE(0xc00000, 0xc0ffff) AM_WRITE(SMH_RAM                  )   // RAM
1382		ADDRESS_MAP_END
1383	1224
1384
1385	1225	/***************************************************************************
1386	1226	Mahjong Gakuensai
1387	1227	***************************************************************************/
r4679	r4680
1446	1286	}
1447	1287	}
1448	1288
1449		static ADDRESS_MAP_START( gakusai_readmem, ADDRESS_SPACE_PROGRAM, 16 )
1450		AM_RANGE(0x000000, 0x07ffff) AM_READ(SMH_ROM               )   // ROM
1451		AM_RANGE(0xff0000, 0xffffff) AM_READ(SMH_RAM               )   // RAM
1452		AM_RANGE(0x200000, 0x21ffff) AM_READ(SMH_RAM               )   // Layer 0
1453		AM_RANGE(0x220000, 0x23ffff) AM_READ(SMH_RAM               )   // Layer 1
1454		AM_RANGE(0x240000, 0x25ffff) AM_READ(SMH_RAM               )   // Layer 2
1455		AM_RANGE(0x260000, 0x26ffff) AM_READ(metro_bankedrom_r         )   // Banked ROM
1456		AM_RANGE(0x270000, 0x273fff) AM_READ(SMH_RAM               )   // Palette
1457		AM_RANGE(0x274000, 0x274fff) AM_READ(SMH_RAM               )   // Sprites
1458		AM_RANGE(0x278000, 0x2787ff) AM_READ(SMH_RAM               )   // Tiles Set
1459		AM_RANGE(0x278832, 0x278833) AM_READ(metro_irq_cause_r         )   // IRQ Cause
1460		AM_RANGE(0x278880, 0x278881) AM_READ(gakusai_input_r         )   // Inputs
1461		AM_RANGE(0x278882, 0x278883) AM_READ_PORT("IN0")               //
1462		AM_RANGE(0x27880e, 0x27880f) AM_READ(SMH_RAM               )   // Screen Control
1463		AM_RANGE(0x700000, 0x700001) AM_DEVREAD8("oki", okim6295_r, 0x00ff   )   // Sound
1464		AM_RANGE(0xc00000, 0xc00001) AM_READ(gakusai_eeprom_r         )   // EEPROM
1465		ADDRESS_MAP_END
1466
1467		static ADDRESS_MAP_START( gakusai_writemem, ADDRESS_SPACE_PROGRAM, 16 )
1468		AM_RANGE(0x000000, 0x07ffff) AM_WRITE(SMH_ROM                  )   // ROM
1469		AM_RANGE(0xff0000, 0xffffff) AM_WRITE(SMH_RAM                  )   // RAM
1470		AM_RANGE(0x200000, 0x21ffff) AM_WRITE(metro_vram_0_w) AM_BASE(&metro_vram_0   )   // Layer 0
1471		AM_RANGE(0x220000, 0x23ffff) AM_WRITE(metro_vram_1_w) AM_BASE(&metro_vram_1   )   // Layer 1
1472		AM_RANGE(0x240000, 0x25ffff) AM_WRITE(metro_vram_2_w) AM_BASE(&metro_vram_2   )   // Layer 2
1473		AM_RANGE(0x270000, 0x273fff) AM_WRITE(paletteram16_GGGGGRRRRRBBBBBx_word_w  ) AM_BASE(&paletteram16   )   // Palette
1474		AM_RANGE(0x274000, 0x274fff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16) AM_SIZE(&spriteram_size            )   // Sprites
1475		AM_RANGE(0x278000, 0x2787ff) AM_WRITE(SMH_RAM) AM_BASE(&metro_tiletable) AM_SIZE(&metro_tiletable_size   )   // Tiles Set
1476		AM_RANGE(0x27880e, 0x27880f) AM_WRITE(SMH_RAM) AM_BASE(&metro_screenctrl   )   // Screen Control
1477		AM_RANGE(0x278810, 0x27881f) AM_WRITE(SMH_RAM) AM_BASE(&metro_irq_levels   )   // IRQ Levels
1478		AM_RANGE(0x278820, 0x27882f) AM_WRITE(SMH_RAM) AM_BASE(&metro_irq_vectors   )   // IRQ Vectors
1479		AM_RANGE(0x278830, 0x278831) AM_WRITE(SMH_RAM) AM_BASE(&metro_irq_enable   )   // IRQ Enable
1480		AM_RANGE(0x278832, 0x278833) AM_WRITE(metro_irq_cause_w            )   // IRQ Acknowledge
1481		AM_RANGE(0x278836, 0x278837) AM_WRITE(watchdog_reset16_w         )   // Watchdog
1482		AM_RANGE(0x278840, 0x27884d) AM_WRITE(metro_blitter_w) AM_BASE(&metro_blitter_regs   )   // Tiles Blitter
1483		AM_RANGE(0x278860, 0x27886b) AM_WRITE(metro_window_w) AM_BASE(&metro_window   )   // Tilemap Window
1484		AM_RANGE(0x278850, 0x27885b) AM_WRITE(SMH_RAM) AM_BASE(&metro_scroll      )   // Scroll Regs
1485		AM_RANGE(0x278870, 0x278871) AM_WRITE(SMH_RAM) AM_BASE(&metro_rombank      )   // Rom Bank
1486		AM_RANGE(0x278888, 0x278889) AM_WRITE(SMH_RAM) AM_BASE(&gakusai_input_sel   )   // Inputs
1487		AM_RANGE(0x279700, 0x279713) AM_WRITE(SMH_RAM) AM_BASE(&metro_videoregs   )   // Video Registers
1488		AM_RANGE(0x400000, 0x400001) AM_WRITE(SMH_NOP                  )   // ? 5
1489		AM_RANGE(0x500000, 0x500001) AM_DEVWRITE("oki", gakusai_oki_bank_lo_w         )   // Sound
	1289	static ADDRESS_MAP_START( gakusai_map, ADDRESS_SPACE_PROGRAM, 16 )
	1290	AM_RANGE(0x000000, 0x07ffff) AM_ROM                                       // ROM
	1291	AM_RANGE(0xff0000, 0xffffff) AM_RAM                                       // RAM
	1292	AM_RANGE(0x200000, 0x21ffff) AM_RAM_WRITE(metro_vram_0_w) AM_BASE(&metro_vram_0)   // Layer 0
	1293	AM_RANGE(0x220000, 0x23ffff) AM_RAM_WRITE(metro_vram_1_w) AM_BASE(&metro_vram_1)   // Layer 1
	1294	AM_RANGE(0x240000, 0x25ffff) AM_RAM_WRITE(metro_vram_2_w) AM_BASE(&metro_vram_2)   // Layer 2
	1295	AM_RANGE(0x260000, 0x26ffff) AM_READ(metro_bankedrom_r)                        // Banked ROM
	1296	AM_RANGE(0x270000, 0x273fff) AM_RAM_WRITE(paletteram16_GGGGGRRRRRBBBBBx_word_w) AM_BASE(&paletteram16)   // Palette
	1297	AM_RANGE(0x274000, 0x274fff) AM_RAM AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)   // Sprites
	1298	AM_RANGE(0x278000, 0x2787ff) AM_RAM AM_BASE(&metro_tiletable) AM_SIZE(&metro_tiletable_size)   // Tiles Set
	1299	AM_RANGE(0x27880e, 0x27880f) AM_RAM AM_BASE(&metro_screenctrl)                  // Screen Control
	1300	AM_RANGE(0x278810, 0x27881f) AM_WRITEONLY AM_BASE(&metro_irq_levels)            // IRQ Levels
	1301	AM_RANGE(0x278820, 0x27882f) AM_WRITEONLY AM_BASE(&metro_irq_vectors)            // IRQ Vectors
	1302	AM_RANGE(0x278830, 0x278831) AM_WRITEONLY AM_BASE(&metro_irq_enable)            // IRQ Enable
	1303	AM_RANGE(0x278832, 0x278833) AM_READWRITE(metro_irq_cause_r,metro_irq_cause_w)      // IRQ Cause / IRQ Acknowledge
	1304	AM_RANGE(0x278880, 0x278881) AM_READ(gakusai_input_r)                        // Inputs
	1305	AM_RANGE(0x278882, 0x278883) AM_READ_PORT("IN0")                           //
	1306	AM_RANGE(0x278836, 0x278837) AM_WRITE(watchdog_reset16_w)                     // Watchdog
	1307	AM_RANGE(0x278840, 0x27884d) AM_WRITE(metro_blitter_w) AM_BASE(&metro_blitter_regs)   // Tiles Blitter
	1308	AM_RANGE(0x278860, 0x27886b) AM_WRITE(metro_window_w) AM_BASE(&metro_window)      // Tilemap Window
	1309	AM_RANGE(0x278850, 0x27885b) AM_WRITEONLY AM_BASE(&metro_scroll)               // Scroll Regs
	1310	AM_RANGE(0x278870, 0x278871) AM_WRITEONLY AM_BASE(&metro_rombank)               // Rom Bank
	1311	AM_RANGE(0x278888, 0x278889) AM_WRITEONLY AM_BASE(&gakusai_input_sel)            // Inputs
	1312	AM_RANGE(0x279700, 0x279713) AM_WRITEONLY AM_BASE(&metro_videoregs)               // Video Registers
	1313	AM_RANGE(0x400000, 0x400001) AM_WRITENOP                                 // ? 5
	1314	AM_RANGE(0x500000, 0x500001) AM_DEVWRITE("oki", gakusai_oki_bank_lo_w)            // Sound
1490	1315	AM_RANGE(0x600000, 0x600003) AM_DEVWRITE8("ym", ym2413_w, 0x00ff)
1491		AM_RANGE(0x700000, 0x700001) AM_DEVWRITE8("oki", okim6295_w, 0x00ff       )
1492		AM_RANGE(0xc00000, 0xc00001) AM_WRITE(gakusai_eeprom_w            )   // EEPROM
1493		AM_RANGE(0xd00000, 0xd00001) AM_DEVWRITE("oki", gakusai_oki_bank_hi_w         )
	1316	AM_RANGE(0x700000, 0x700001) AM_DEVREADWRITE8("oki", okim6295_r,okim6295_w, 0x00ff)   // Sound
	1317	AM_RANGE(0xc00000, 0xc00001) AM_READWRITE(gakusai_eeprom_r,gakusai_eeprom_w)      // EEPROM
	1318	AM_RANGE(0xd00000, 0xd00001) AM_DEVWRITE("oki", gakusai_oki_bank_hi_w)
1494	1319	ADDRESS_MAP_END
1495	1320
1496	1321
r4679	r4680
1498	1323	Mahjong Gakuensai 2
1499	1324	***************************************************************************/
1500	1325
1501		static ADDRESS_MAP_START( gakusai2_readmem, ADDRESS_SPACE_PROGRAM, 16 )
1502		AM_RANGE(0x000000, 0x07ffff) AM_READ(SMH_ROM               )   // ROM
1503		AM_RANGE(0xff0000, 0xffffff) AM_READ(SMH_RAM               )   // RAM
1504		AM_RANGE(0x600000, 0x61ffff) AM_READ(SMH_RAM               )   // Layer 0
1505		AM_RANGE(0x620000, 0x63ffff) AM_READ(SMH_RAM               )   // Layer 1
1506		AM_RANGE(0x640000, 0x65ffff) AM_READ(SMH_RAM               )   // Layer 2
1507		AM_RANGE(0x660000, 0x66ffff) AM_READ(metro_bankedrom_r         )   // Banked ROM
1508		AM_RANGE(0x670000, 0x673fff) AM_READ(SMH_RAM               )   // Palette
1509		AM_RANGE(0x674000, 0x674fff) AM_READ(SMH_RAM               )   // Sprites
1510		AM_RANGE(0x675000, 0x675fff) AM_READ(SMH_RAM               )   // Sprites?
1511		AM_RANGE(0x678000, 0x6787ff) AM_READ(SMH_RAM               )   // Tiles Set
1512		AM_RANGE(0x678832, 0x678833) AM_READ(metro_irq_cause_r         )   // IRQ Cause
1513		AM_RANGE(0x678880, 0x678881) AM_READ(gakusai_input_r         )   // Inputs
1514		AM_RANGE(0x678882, 0x678883) AM_READ_PORT("IN0")               //
1515		AM_RANGE(0x67880e, 0x67880f) AM_READ(SMH_RAM               )   // Screen Control
1516		AM_RANGE(0xb00000, 0xb00001) AM_DEVREAD8("oki", okim6295_r, 0x00ff   )   // Sound
1517		AM_RANGE(0xe00000, 0xe00001) AM_READ(gakusai_eeprom_r         )   // EEPROM
1518		ADDRESS_MAP_END
1519
1520		static ADDRESS_MAP_START( gakusai2_writemem, ADDRESS_SPACE_PROGRAM, 16 )
1521		AM_RANGE(0x000000, 0x07ffff) AM_WRITE(SMH_ROM                  )   // ROM
1522		AM_RANGE(0xff0000, 0xffffff) AM_WRITE(SMH_RAM                  )   // RAM
1523		AM_RANGE(0x600000, 0x61ffff) AM_WRITE(metro_vram_0_w) AM_BASE(&metro_vram_0   )   // Layer 0
1524		AM_RANGE(0x620000, 0x63ffff) AM_WRITE(metro_vram_1_w) AM_BASE(&metro_vram_1   )   // Layer 1
1525		AM_RANGE(0x640000, 0x65ffff) AM_WRITE(metro_vram_2_w) AM_BASE(&metro_vram_2   )   // Layer 2
1526		AM_RANGE(0x670000, 0x673fff) AM_WRITE(paletteram16_GGGGGRRRRRBBBBBx_word_w  ) AM_BASE(&paletteram16   )   // Palette
1527		AM_RANGE(0x674000, 0x674fff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16) AM_SIZE(&spriteram_size            )   // Sprites
1528		AM_RANGE(0x675000, 0x675fff) AM_WRITE(SMH_RAM                  )   // Sprites?
1529		AM_RANGE(0x678000, 0x6787ff) AM_WRITE(SMH_RAM) AM_BASE(&metro_tiletable) AM_SIZE(&metro_tiletable_size   )   // Tiles Set
1530		AM_RANGE(0x67880e, 0x67880f) AM_WRITE(SMH_RAM) AM_BASE(&metro_screenctrl   )   // Screen Control
1531		AM_RANGE(0x678810, 0x67881f) AM_WRITE(SMH_RAM) AM_BASE(&metro_irq_levels   )   // IRQ Levels
1532		AM_RANGE(0x678820, 0x67882f) AM_WRITE(SMH_RAM) AM_BASE(&metro_irq_vectors   )   // IRQ Vectors
1533		AM_RANGE(0x678830, 0x678831) AM_WRITE(SMH_RAM) AM_BASE(&metro_irq_enable   )   // IRQ Enable
1534		AM_RANGE(0x678832, 0x678833) AM_WRITE(metro_irq_cause_w            )   // IRQ Acknowledge
1535		AM_RANGE(0x678836, 0x678837) AM_WRITE(watchdog_reset16_w         )   // Watchdog
1536		AM_RANGE(0x678840, 0x67884d) AM_WRITE(metro_blitter_w) AM_BASE(&metro_blitter_regs   )   // Tiles Blitter
1537		AM_RANGE(0x678860, 0x67886b) AM_WRITE(metro_window_w) AM_BASE(&metro_window   )   // Tilemap Window
1538		AM_RANGE(0x678850, 0x67885b) AM_WRITE(SMH_RAM) AM_BASE(&metro_scroll      )   // Scroll Regs
1539		AM_RANGE(0x678870, 0x678871) AM_WRITE(SMH_RAM) AM_BASE(&metro_rombank      )   // Rom Bank
1540		AM_RANGE(0x678888, 0x678889) AM_WRITE(SMH_RAM) AM_BASE(&gakusai_input_sel   )   // Inputs
1541		AM_RANGE(0x679700, 0x679713) AM_WRITE(SMH_RAM) AM_BASE(&metro_videoregs   )   // Video Registers
1542		AM_RANGE(0x800000, 0x800001) AM_WRITE(SMH_NOP                  )   // ? 5
1543		AM_RANGE(0x900000, 0x900001) AM_DEVWRITE("oki", gakusai_oki_bank_lo_w         )   // Sound
1544		AM_RANGE(0xa00000, 0xa00001) AM_DEVWRITE("oki", gakusai_oki_bank_hi_w         )
1545		AM_RANGE(0xb00000, 0xb00001) AM_DEVWRITE8("oki", okim6295_w, 0x00ff       )
	1326	static ADDRESS_MAP_START( gakusai2_map, ADDRESS_SPACE_PROGRAM, 16 )
	1327	AM_RANGE(0x000000, 0x07ffff) AM_ROM                                       // ROM
	1328	AM_RANGE(0xff0000, 0xffffff) AM_RAM                                       // RAM
	1329	AM_RANGE(0x600000, 0x61ffff) AM_RAM_WRITE(metro_vram_0_w) AM_BASE(&metro_vram_0)   // Layer 0
	1330	AM_RANGE(0x620000, 0x63ffff) AM_RAM_WRITE(metro_vram_1_w) AM_BASE(&metro_vram_1)   // Layer 1
	1331	AM_RANGE(0x640000, 0x65ffff) AM_RAM_WRITE(metro_vram_2_w) AM_BASE(&metro_vram_2)   // Layer 2
	1332	AM_RANGE(0x660000, 0x66ffff) AM_READ(metro_bankedrom_r)                        // Banked ROM
	1333	AM_RANGE(0x670000, 0x673fff) AM_RAM_WRITE(paletteram16_GGGGGRRRRRBBBBBx_word_w) AM_BASE(&paletteram16)   // Palette
	1334	AM_RANGE(0x674000, 0x674fff) AM_RAM AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)   // Sprites
	1335	AM_RANGE(0x675000, 0x675fff) AM_RAM                                       // Sprites?
	1336	AM_RANGE(0x678000, 0x6787ff) AM_RAM AM_BASE(&metro_tiletable) AM_SIZE(&metro_tiletable_size)   // Tiles Set
	1337	AM_RANGE(0x67880e, 0x67880f) AM_RAM AM_BASE(&metro_screenctrl)                  // Screen Control
	1338	AM_RANGE(0x678810, 0x67881f) AM_WRITEONLY AM_BASE(&metro_irq_levels)            // IRQ Levels
	1339	AM_RANGE(0x678820, 0x67882f) AM_WRITEONLY AM_BASE(&metro_irq_vectors)            // IRQ Vectors
	1340	AM_RANGE(0x678830, 0x678831) AM_WRITEONLY AM_BASE(&metro_irq_enable)            // IRQ Enable
	1341	AM_RANGE(0x678832, 0x678833) AM_READWRITE(metro_irq_cause_r,metro_irq_cause_w)      // IRQ Cause / IRQ Acknowledge
	1342	AM_RANGE(0x678836, 0x678837) AM_WRITE(watchdog_reset16_w)                     // Watchdog
	1343	AM_RANGE(0x678840, 0x67884d) AM_WRITE(metro_blitter_w) AM_BASE(&metro_blitter_regs)   // Tiles Blitter
	1344	AM_RANGE(0x678860, 0x67886b) AM_WRITE(metro_window_w) AM_BASE(&metro_window)      // Tilemap Window
	1345	AM_RANGE(0x678880, 0x678881) AM_READ(gakusai_input_r)                        // Inputs
	1346	AM_RANGE(0x678882, 0x678883) AM_READ_PORT("IN0")                           //
	1347	AM_RANGE(0x678850, 0x67885b) AM_WRITEONLY AM_BASE(&metro_scroll)               // Scroll Regs
	1348	AM_RANGE(0x678870, 0x678871) AM_WRITEONLY AM_BASE(&metro_rombank)               // Rom Bank
	1349	AM_RANGE(0x678888, 0x678889) AM_WRITEONLY AM_BASE(&gakusai_input_sel)            // Inputs
	1350	AM_RANGE(0x679700, 0x679713) AM_WRITEONLY AM_BASE(&metro_videoregs)               // Video Registers
	1351	AM_RANGE(0x800000, 0x800001) AM_WRITENOP                                 // ? 5
	1352	AM_RANGE(0x900000, 0x900001) AM_DEVWRITE("oki", gakusai_oki_bank_lo_w)            // Sound bank
	1353	AM_RANGE(0xa00000, 0xa00001) AM_DEVWRITE("oki", gakusai_oki_bank_hi_w)
	1354	AM_RANGE(0xb00000, 0xb00001) AM_DEVREADWRITE8("oki", okim6295_r,okim6295_w, 0x00ff)   // Sound
1546	1355	AM_RANGE(0xc00000, 0xc00003) AM_DEVWRITE8("ym", ym2413_w, 0x00ff)
1547		AM_RANGE(0xe00000, 0xe00001) AM_WRITE(gakusai_eeprom_w            )   // EEPROM
	1356	AM_RANGE(0xe00000, 0xe00001) AM_READWRITE(gakusai_eeprom_r,gakusai_eeprom_w)      // EEPROM
1548	1357	ADDRESS_MAP_END
1549	1358
1550	1359
r4679	r4680
1583	1392	}
1584	1393	}
1585	1394
1586		static ADDRESS_MAP_START( dokyusp_readmem, ADDRESS_SPACE_PROGRAM, 16 )
1587		AM_RANGE(0x000000, 0x03ffff) AM_READ(SMH_ROM               )   // ROM
1588		AM_RANGE(0xff0000, 0xffffff) AM_READ(SMH_RAM               )   // RAM
1589		AM_RANGE(0x200000, 0x21ffff) AM_READ(SMH_RAM               )   // Layer 0
1590		AM_RANGE(0x220000, 0x23ffff) AM_READ(SMH_RAM               )   // Layer 1
1591		AM_RANGE(0x240000, 0x25ffff) AM_READ(SMH_RAM               )   // Layer 2
1592		AM_RANGE(0x260000, 0x26ffff) AM_READ(metro_bankedrom_r         )   // Banked ROM
1593		AM_RANGE(0x270000, 0x273fff) AM_READ(SMH_RAM               )   // Palette
1594		AM_RANGE(0x274000, 0x274fff) AM_READ(SMH_RAM               )   // Sprites
1595		AM_RANGE(0x278000, 0x2787ff) AM_READ(SMH_RAM               )   // Tiles Set
1596		AM_RANGE(0x278832, 0x278833) AM_READ(metro_irq_cause_r         )   // IRQ Cause
1597		AM_RANGE(0x278880, 0x278881) AM_READ(gakusai_input_r         )   // Inputs
1598		AM_RANGE(0x278882, 0x278883) AM_READ_PORT("IN0")               //
1599		AM_RANGE(0x27880e, 0x27880f) AM_READ(SMH_RAM               )   // Screen Control
1600		AM_RANGE(0x700000, 0x700001) AM_DEVREAD8("oki", okim6295_r, 0x00ff   )   // Sound
1601		AM_RANGE(0xd00000, 0xd00001) AM_READ(dokyusp_eeprom_r         )   // EEPROM
1602		ADDRESS_MAP_END
1603
1604		static ADDRESS_MAP_START( dokyusp_writemem, ADDRESS_SPACE_PROGRAM, 16 )
1605		AM_RANGE(0x000000, 0x03ffff) AM_WRITE(SMH_ROM                  )   // ROM
1606		AM_RANGE(0xff0000, 0xffffff) AM_WRITE(SMH_RAM                  )   // RAM
1607		AM_RANGE(0x200000, 0x21ffff) AM_WRITE(metro_vram_0_w) AM_BASE(&metro_vram_0   )   // Layer 0
1608		AM_RANGE(0x220000, 0x23ffff) AM_WRITE(metro_vram_1_w) AM_BASE(&metro_vram_1   )   // Layer 1
1609		AM_RANGE(0x240000, 0x25ffff) AM_WRITE(metro_vram_2_w) AM_BASE(&metro_vram_2   )   // Layer 2
1610		AM_RANGE(0x270000, 0x273fff) AM_WRITE(paletteram16_GGGGGRRRRRBBBBBx_word_w  ) AM_BASE(&paletteram16   )   // Palette
1611		AM_RANGE(0x274000, 0x274fff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16) AM_SIZE(&spriteram_size            )   // Sprites
1612		AM_RANGE(0x278000, 0x2787ff) AM_WRITE(SMH_RAM) AM_BASE(&metro_tiletable) AM_SIZE(&metro_tiletable_size   )   // Tiles Set
1613		AM_RANGE(0x27880e, 0x27880f) AM_WRITE(SMH_RAM) AM_BASE(&metro_screenctrl   )   // Screen Control
1614		AM_RANGE(0x278810, 0x27881f) AM_WRITE(SMH_RAM) AM_BASE(&metro_irq_levels   )   // IRQ Levels
1615		AM_RANGE(0x278820, 0x27882f) AM_WRITE(SMH_RAM) AM_BASE(&metro_irq_vectors   )   // IRQ Vectors
1616		AM_RANGE(0x278830, 0x278831) AM_WRITE(SMH_RAM) AM_BASE(&metro_irq_enable   )   // IRQ Enable
1617		AM_RANGE(0x278832, 0x278833) AM_WRITE(metro_irq_cause_w            )   // IRQ Acknowledge
1618		AM_RANGE(0x278836, 0x278837) AM_WRITE(watchdog_reset16_w         )   // Watchdog
1619		AM_RANGE(0x278840, 0x27884d) AM_WRITE(metro_blitter_w) AM_BASE(&metro_blitter_regs   )   // Tiles Blitter
1620		AM_RANGE(0x278860, 0x27886b) AM_WRITE(metro_window_w) AM_BASE(&metro_window   )   // Tilemap Window
1621		AM_RANGE(0x278850, 0x27885b) AM_WRITE(SMH_RAM) AM_BASE(&metro_scroll      )   // Scroll Regs
1622		AM_RANGE(0x278870, 0x278871) AM_WRITE(SMH_RAM) AM_BASE(&metro_rombank      )   // Rom Bank
1623		AM_RANGE(0x278888, 0x278889) AM_WRITE(SMH_RAM) AM_BASE(&gakusai_input_sel   )   // Inputs
1624		AM_RANGE(0x279700, 0x279713) AM_WRITE(SMH_RAM) AM_BASE(&metro_videoregs   )   // Video Registers
1625		AM_RANGE(0x400000, 0x400001) AM_WRITE(SMH_NOP                  )   // ? 5
1626		AM_RANGE(0x500000, 0x500001) AM_DEVWRITE("oki", gakusai_oki_bank_lo_w         )   // Sound
	1395	static ADDRESS_MAP_START( dokyusp_map, ADDRESS_SPACE_PROGRAM, 16 )
	1396	AM_RANGE(0x000000, 0x03ffff) AM_ROM                                       // ROM
	1397	AM_RANGE(0xff0000, 0xffffff) AM_RAM                                       // RAM
	1398	AM_RANGE(0x200000, 0x21ffff) AM_RAM_WRITE(metro_vram_0_w) AM_BASE(&metro_vram_0)   // Layer 0
	1399	AM_RANGE(0x220000, 0x23ffff) AM_RAM_WRITE(metro_vram_1_w) AM_BASE(&metro_vram_1)   // Layer 1
	1400	AM_RANGE(0x240000, 0x25ffff) AM_RAM_WRITE(metro_vram_2_w) AM_BASE(&metro_vram_2)   // Layer 2
	1401	AM_RANGE(0x260000, 0x26ffff) AM_READ(metro_bankedrom_r)                        // Banked ROM
	1402	AM_RANGE(0x270000, 0x273fff) AM_RAM_WRITE(paletteram16_GGGGGRRRRRBBBBBx_word_w) AM_BASE(&paletteram16)   // Palette
	1403	AM_RANGE(0x274000, 0x274fff) AM_RAM AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)   // Sprites
	1404	AM_RANGE(0x278000, 0x2787ff) AM_RAM AM_BASE(&metro_tiletable) AM_SIZE(&metro_tiletable_size)   // Tiles Set
	1405	AM_RANGE(0x278810, 0x27881f) AM_WRITEONLY AM_BASE(&metro_irq_levels)            // IRQ Levels
	1406	AM_RANGE(0x278820, 0x27882f) AM_WRITEONLY AM_BASE(&metro_irq_vectors)            // IRQ Vectors
	1407	AM_RANGE(0x278830, 0x278831) AM_WRITEONLY AM_BASE(&metro_irq_enable)            // IRQ Enable
	1408	AM_RANGE(0x278832, 0x278833) AM_READWRITE(metro_irq_cause_r,metro_irq_cause_w)      // IRQ Cause / IRQ Acknowledge
	1409	AM_RANGE(0x278836, 0x278837) AM_WRITE(watchdog_reset16_w)                     // Watchdog
	1410	AM_RANGE(0x278840, 0x27884d) AM_WRITE(metro_blitter_w) AM_BASE(&metro_blitter_regs)   // Tiles Blitter
	1411	AM_RANGE(0x278860, 0x27886b) AM_WRITE(metro_window_w) AM_BASE(&metro_window)      // Tilemap Window
	1412	AM_RANGE(0x278850, 0x27885b) AM_WRITEONLY AM_BASE(&metro_scroll)               // Scroll Regs
	1413	AM_RANGE(0x278870, 0x278871) AM_WRITEONLY AM_BASE(&metro_rombank)               // Rom Bank
	1414	AM_RANGE(0x278880, 0x278881) AM_READ(gakusai_input_r)                        // Inputs
	1415	AM_RANGE(0x278882, 0x278883) AM_READ_PORT("IN0")                           //
	1416	AM_RANGE(0x278888, 0x278889) AM_WRITEONLY AM_BASE(&gakusai_input_sel)            // Inputs
	1417	AM_RANGE(0x27880e, 0x27880f) AM_RAM AM_BASE(&metro_screenctrl)                  // Screen Control
	1418	AM_RANGE(0x279700, 0x279713) AM_WRITEONLY AM_BASE(&metro_videoregs)               // Video Registers
	1419	AM_RANGE(0x400000, 0x400001) AM_WRITENOP                                 // ? 5
	1420	AM_RANGE(0x500000, 0x500001) AM_DEVWRITE("oki", gakusai_oki_bank_lo_w)            // Sound
1627	1421	AM_RANGE(0x600000, 0x600003) AM_DEVWRITE8("ym", ym2413_w, 0x00ff)
1628		AM_RANGE(0x700000, 0x700001) AM_DEVWRITE8("oki", okim6295_w, 0x00ff)
1629		AM_RANGE(0xc00000, 0xc00001) AM_WRITE(dokyusp_eeprom_reset_w      )   // EEPROM
1630		AM_RANGE(0xd00000, 0xd00001) AM_WRITE(dokyusp_eeprom_bit_w         )   // EEPROM
	1422	AM_RANGE(0x700000, 0x700001) AM_DEVREADWRITE8("oki", okim6295_r,okim6295_w, 0x00ff)   // Sound
	1423	AM_RANGE(0xc00000, 0xc00001) AM_WRITE(dokyusp_eeprom_reset_w)                  // EEPROM
	1424	AM_RANGE(0xd00000, 0xd00001) AM_READWRITE(dokyusp_eeprom_r,dokyusp_eeprom_bit_w)   // EEPROM
1631	1425	ADDRESS_MAP_END
1632	1426
1633	1427
r4679	r4680
1635	1429	Mahjong Doukyuusei
1636	1430	***************************************************************************/
1637	1431
1638		static ADDRESS_MAP_START( dokyusei_readmem, ADDRESS_SPACE_PROGRAM, 16 )
1639		AM_RANGE(0x000000, 0x03ffff) AM_READ(SMH_ROM               )   // ROM
1640		AM_RANGE(0xff0000, 0xffffff) AM_READ(SMH_RAM               )   // RAM
1641		AM_RANGE(0x400000, 0x41ffff) AM_READ(SMH_RAM               )   // Layer 0
1642		AM_RANGE(0x420000, 0x43ffff) AM_READ(SMH_RAM               )   // Layer 1
1643		AM_RANGE(0x440000, 0x45ffff) AM_READ(SMH_RAM               )   // Layer 2
1644		AM_RANGE(0x460000, 0x46ffff) AM_READ(metro_bankedrom_r         )   // Banked ROM
1645		AM_RANGE(0x470000, 0x473fff) AM_READ(SMH_RAM               )   // Palette
1646		AM_RANGE(0x474000, 0x474fff) AM_READ(SMH_RAM               )   // Sprites
1647		AM_RANGE(0x478000, 0x4787ff) AM_READ(SMH_RAM               )   // Tiles Set
1648		//  AM_RANGE(0x478832, 0x478833) AM_READ(metro_irq_cause_r          )   // IRQ Cause
1649		AM_RANGE(0x478880, 0x478881) AM_READ(gakusai_input_r         )   // Inputs
1650		AM_RANGE(0x478882, 0x478883) AM_READ_PORT("IN0")               //
1651		AM_RANGE(0x478884, 0x478885) AM_READ_PORT("DSW0")               // 2 x DSW
1652		AM_RANGE(0x478886, 0x478887) AM_READ_PORT("DSW1")               //
1653		AM_RANGE(0xd00000, 0xd00001) AM_DEVREAD8("oki", okim6295_r, 0x00ff   )   // Sound
	1432	static ADDRESS_MAP_START( dokyusei_map, ADDRESS_SPACE_PROGRAM, 16 )
	1433	AM_RANGE(0x000000, 0x03ffff) AM_ROM                                       // ROM
	1434	AM_RANGE(0xff0000, 0xffffff) AM_RAM                                       // RAM
	1435	AM_RANGE(0x400000, 0x41ffff) AM_RAM_WRITE(metro_vram_0_w) AM_BASE(&metro_vram_0)   // Layer 0
	1436	AM_RANGE(0x420000, 0x43ffff) AM_RAM_WRITE(metro_vram_1_w) AM_BASE(&metro_vram_1)   // Layer 1
	1437	AM_RANGE(0x440000, 0x45ffff) AM_RAM_WRITE(metro_vram_2_w) AM_BASE(&metro_vram_2)   // Layer 2
	1438	AM_RANGE(0x460000, 0x46ffff) AM_READ(metro_bankedrom_r)                        // Banked ROM
	1439	AM_RANGE(0x460000, 0x46ffff) AM_WRITENOP                                 // DSW Selection
	1440	AM_RANGE(0x470000, 0x473fff) AM_RAM_WRITE(paletteram16_GGGGGRRRRRBBBBBx_word_w) AM_BASE(&paletteram16)   // Palette
	1441	AM_RANGE(0x474000, 0x474fff) AM_RAM AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)   // Sprites
	1442	AM_RANGE(0x478000, 0x4787ff) AM_RAM AM_BASE(&metro_tiletable) AM_SIZE(&metro_tiletable_size)   // Tiles Set
	1443	AM_RANGE(0x47880e, 0x47880f) AM_WRITEONLY AM_BASE(&metro_screenctrl)            // Screen Control
	1444	AM_RANGE(0x478810, 0x47881f) AM_WRITEONLY AM_BASE(&metro_irq_levels)            // IRQ Levels
	1445	AM_RANGE(0x478820, 0x47882f) AM_WRITEONLY AM_BASE(&metro_irq_vectors)            // IRQ Vectors
	1446	AM_RANGE(0x478830, 0x478831) AM_WRITEONLY AM_BASE(&metro_irq_enable)            // IRQ Enable
	1447	//  AM_RANGE(0x478832, 0x478833) AM_READ(metro_irq_cause_r)                             // IRQ Cause
	1448	AM_RANGE(0x478832, 0x478833) AM_WRITE(metro_irq_cause_w)                     // IRQ Acknowledge
	1449	AM_RANGE(0x478836, 0x478837) AM_WRITENOP                                 // ? watchdog ?
	1450	AM_RANGE(0x478840, 0x47884d) AM_WRITE(metro_blitter_w) AM_BASE(&metro_blitter_regs)   // Tiles Blitter
	1451	AM_RANGE(0x478850, 0x47885b) AM_WRITEONLY AM_BASE(&metro_scroll)               // Scroll Regs
	1452	AM_RANGE(0x478860, 0x47886b) AM_WRITE(metro_window_w) AM_BASE(&metro_window)      // Tilemap Window
	1453	AM_RANGE(0x478870, 0x478871) AM_WRITEONLY AM_BASE(&metro_rombank)               // Rom Bank
	1454	AM_RANGE(0x479700, 0x479713) AM_WRITEONLY AM_BASE(&metro_videoregs)               // Video Registers
	1455	AM_RANGE(0x478888, 0x478889) AM_WRITEONLY AM_BASE(&gakusai_input_sel)            // Inputs
	1456	AM_RANGE(0x478880, 0x478881) AM_READ(gakusai_input_r)                        // Inputs
	1457	AM_RANGE(0x478882, 0x478883) AM_READ_PORT("IN0")                           //
	1458	AM_RANGE(0x478884, 0x478885) AM_READ_PORT("DSW0")                           // 2 x DSW
	1459	AM_RANGE(0x478886, 0x478887) AM_READ_PORT("DSW1")                           //
	1460	AM_RANGE(0x800000, 0x800001) AM_DEVWRITE("oki", gakusai_oki_bank_hi_w)            // Samples Bank?
	1461	AM_RANGE(0x900000, 0x900001) AM_WRITENOP                                 // ? 4
	1462	AM_RANGE(0xa00000, 0xa00001) AM_DEVWRITE("oki", gakusai_oki_bank_lo_w)            // Samples Bank
	1463	AM_RANGE(0xc00000, 0xc00003) AM_DEVWRITE8("ym", ym2413_w, 0x00ff)               //
	1464	AM_RANGE(0xd00000, 0xd00001) AM_DEVREADWRITE8("oki", okim6295_r,okim6295_w, 0x00ff)   // Sound
1654	1465	ADDRESS_MAP_END
1655	1466
1656		static ADDRESS_MAP_START( dokyusei_writemem, ADDRESS_SPACE_PROGRAM, 16 )
1657		AM_RANGE(0x000000, 0x03ffff) AM_WRITE(SMH_ROM                  )   // ROM
1658		AM_RANGE(0xff0000, 0xffffff) AM_WRITE(SMH_RAM                  )   // RAM
1659		AM_RANGE(0x400000, 0x41ffff) AM_WRITE(metro_vram_0_w) AM_BASE(&metro_vram_0   )   // Layer 0
1660		AM_RANGE(0x420000, 0x43ffff) AM_WRITE(metro_vram_1_w) AM_BASE(&metro_vram_1   )   // Layer 1
1661		AM_RANGE(0x440000, 0x45ffff) AM_WRITE(metro_vram_2_w) AM_BASE(&metro_vram_2   )   // Layer 2
1662		AM_RANGE(0x460000, 0x46ffff) AM_WRITE(SMH_NOP                  )   // DSW Selection
1663		AM_RANGE(0x470000, 0x473fff) AM_WRITE(paletteram16_GGGGGRRRRRBBBBBx_word_w  ) AM_BASE(&paletteram16   )   // Palette
1664		AM_RANGE(0x474000, 0x474fff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16) AM_SIZE(&spriteram_size            )   // Sprites
1665		AM_RANGE(0x478000, 0x4787ff) AM_WRITE(SMH_RAM) AM_BASE(&metro_tiletable) AM_SIZE(&metro_tiletable_size   )   // Tiles Set
1666		AM_RANGE(0x47880e, 0x47880f) AM_WRITE(SMH_RAM) AM_BASE(&metro_screenctrl   )   // Screen Control
1667		AM_RANGE(0x478810, 0x47881f) AM_WRITE(SMH_RAM) AM_BASE(&metro_irq_levels   )   // IRQ Levels
1668		AM_RANGE(0x478820, 0x47882f) AM_WRITE(SMH_RAM) AM_BASE(&metro_irq_vectors   )   // IRQ Vectors
1669		AM_RANGE(0x478830, 0x478831) AM_WRITE(SMH_RAM) AM_BASE(&metro_irq_enable   )   // IRQ Enable
1670		AM_RANGE(0x478832, 0x478833) AM_WRITE(metro_irq_cause_w            )   // IRQ Acknowledge
1671		AM_RANGE(0x478836, 0x478837) AM_WRITE(SMH_NOP                  )   // ? watchdog ?
1672		AM_RANGE(0x478840, 0x47884d) AM_WRITE(metro_blitter_w) AM_BASE(&metro_blitter_regs   )   // Tiles Blitter
1673		AM_RANGE(0x478860, 0x47886b) AM_WRITE(metro_window_w) AM_BASE(&metro_window   )   // Tilemap Window
1674		AM_RANGE(0x478850, 0x47885b) AM_WRITE(SMH_RAM) AM_BASE(&metro_scroll      )   // Scroll Regs
1675		AM_RANGE(0x478870, 0x478871) AM_WRITE(SMH_RAM) AM_BASE(&metro_rombank      )   // Rom Bank
1676		AM_RANGE(0x479700, 0x479713) AM_WRITE(SMH_RAM) AM_BASE(&metro_videoregs   )   // Video Registers
1677		AM_RANGE(0x478888, 0x478889) AM_WRITE(SMH_RAM) AM_BASE(&gakusai_input_sel   )   // Inputs
1678		AM_RANGE(0x800000, 0x800001) AM_DEVWRITE("oki", gakusai_oki_bank_hi_w         )   // Samples Bank?
1679		AM_RANGE(0x900000, 0x900001) AM_WRITE(SMH_NOP                  )   // ? 4
1680		AM_RANGE(0xa00000, 0xa00001) AM_DEVWRITE("oki", gakusai_oki_bank_lo_w         )   // Samples Bank
1681		AM_RANGE(0xc00000, 0xc00003) AM_DEVWRITE8("ym", ym2413_w, 0x00ff)   //
1682		AM_RANGE(0xd00000, 0xd00001) AM_DEVWRITE8("oki", okim6295_w, 0x00ff         )   //
1683		ADDRESS_MAP_END
1684	1467
1685
1686	1468	/***************************************************************************
1687	1469	Pang Pom's
1688	1470	***************************************************************************/
1689	1471
1690		static ADDRESS_MAP_START( pangpoms_readmem, ADDRESS_SPACE_PROGRAM, 16 )
1691		AM_RANGE(0x000000, 0x03ffff) AM_READ(SMH_ROM            )   // ROM
1692		AM_RANGE(0xc00000, 0xc0ffff) AM_READ(SMH_RAM            )   // RAM
1693		AM_RANGE(0x400000, 0x41ffff) AM_READ(SMH_RAM            )   // Layer 0
1694		AM_RANGE(0x420000, 0x43ffff) AM_READ(SMH_RAM            )   // Layer 1
1695		AM_RANGE(0x440000, 0x45ffff) AM_READ(SMH_RAM            )   // Layer 2
1696		AM_RANGE(0x460000, 0x46ffff) AM_READ(metro_bankedrom_r      )   // Banked ROM
1697		AM_RANGE(0x470000, 0x473fff) AM_READ(SMH_RAM            )   // Palette
1698		AM_RANGE(0x474000, 0x474fff) AM_READ(SMH_RAM            )   // Sprites
1699		AM_RANGE(0x478000, 0x4787ff) AM_READ(SMH_RAM            )   // Tiles Set
1700		AM_RANGE(0x4788a2, 0x4788a3) AM_READ(metro_irq_cause_r      )   // IRQ Cause
1701		AM_RANGE(0x800000, 0x800001) AM_READ(metro_soundstatus_r   )   // From Sound CPU
1702		AM_RANGE(0x800002, 0x800003) AM_READ(SMH_NOP            )   //
1703		AM_RANGE(0x800004, 0x800005) AM_READ_PORT("IN0")            // Inputs
1704		AM_RANGE(0x800006, 0x800007) AM_READ_PORT("IN1")            //
1705		AM_RANGE(0x800008, 0x800009) AM_READ_PORT("IN2")            //
1706		AM_RANGE(0x80000a, 0x80000b) AM_READ_PORT("DSW0")            //
1707		AM_RANGE(0x80000c, 0x80000d) AM_READ_PORT("DSW1")            //
1708		AM_RANGE(0x80000e, 0x80000f) AM_READ_PORT("IN3")            //
	1472	static ADDRESS_MAP_START( pangpoms_map, ADDRESS_SPACE_PROGRAM, 16 )
	1473	AM_RANGE(0x000000, 0x03ffff) AM_ROM                                       // ROM
	1474	AM_RANGE(0xc00000, 0xc0ffff) AM_RAM                                       // RAM
	1475	AM_RANGE(0x400000, 0x41ffff) AM_RAM_WRITE(metro_vram_0_w) AM_BASE(&metro_vram_0)   // Layer 0
	1476	AM_RANGE(0x420000, 0x43ffff) AM_RAM_WRITE(metro_vram_1_w) AM_BASE(&metro_vram_1)   // Layer 1
	1477	AM_RANGE(0x440000, 0x45ffff) AM_RAM_WRITE(metro_vram_2_w) AM_BASE(&metro_vram_2)   // Layer 2
	1478	AM_RANGE(0x460000, 0x46ffff) AM_READ(metro_bankedrom_r)                        // Banked ROM
	1479	AM_RANGE(0x470000, 0x473fff) AM_RAM_WRITE(paletteram16_GGGGGRRRRRBBBBBx_word_w) AM_BASE(&paletteram16)   // Palette
	1480	AM_RANGE(0x474000, 0x474fff) AM_RAM AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)   // Sprites
	1481	AM_RANGE(0x478000, 0x4787ff) AM_RAM AM_BASE(&metro_tiletable) AM_SIZE(&metro_tiletable_size)   // Tiles Set
	1482	AM_RANGE(0x478800, 0x478813) AM_RAM AM_BASE(&metro_videoregs)                  // Video Registers
	1483	AM_RANGE(0x478840, 0x47884d) AM_WRITE(metro_blitter_w) AM_BASE(&metro_blitter_regs)   // Tiles Blitter
	1484	AM_RANGE(0x478860, 0x47886b) AM_WRITE(metro_window_w) AM_BASE(&metro_window)      // Tilemap Window
	1485	AM_RANGE(0x478870, 0x47887b) AM_WRITEONLY AM_BASE(&metro_scroll)               // Scroll Regs
	1486	AM_RANGE(0x478880, 0x478881) AM_WRITENOP                                    // ? increasing
	1487	AM_RANGE(0x478890, 0x478891) AM_WRITENOP                                 // ? increasing
	1488	AM_RANGE(0x4788a2, 0x4788a3) AM_READWRITE(metro_irq_cause_r,metro_irq_cause_w)      // IRQ Cause / IRQ Acknowledge
	1489	AM_RANGE(0x4788a4, 0x4788a5) AM_WRITEONLY AM_BASE(&metro_irq_enable)            // IRQ Enable
	1490	AM_RANGE(0x4788a8, 0x4788a9) AM_WRITE(metro_soundlatch_w)                     // To Sound CPU
	1491	AM_RANGE(0x4788aa, 0x4788ab) AM_WRITEONLY AM_BASE(&metro_rombank)               // Rom Bank
	1492	AM_RANGE(0x4788ac, 0x4788ad) AM_WRITEONLY AM_BASE(&metro_screenctrl)            // Screen Control
	1493	AM_RANGE(0x800000, 0x800001) AM_READWRITE(metro_soundstatus_r,metro_soundstatus_w)   // From / To Sound CPU
	1494	AM_RANGE(0x800002, 0x800003) AM_READNOP   AM_WRITE(metro_coin_lockout_1word_w)      // Coin Lockout
	1495	AM_RANGE(0x800004, 0x800005) AM_READ_PORT("IN0")                           // Inputs
	1496	AM_RANGE(0x800006, 0x800007) AM_READ_PORT("IN1")                           //
	1497	AM_RANGE(0x800008, 0x800009) AM_READ_PORT("IN2")                           //
	1498	AM_RANGE(0x80000a, 0x80000b) AM_READ_PORT("DSW0")                           //
	1499	AM_RANGE(0x80000c, 0x80000d) AM_READ_PORT("DSW1")                           //
	1500	AM_RANGE(0x80000e, 0x80000f) AM_READ_PORT("IN3")                           //
1709	1501	ADDRESS_MAP_END
1710	1502
1711		static ADDRESS_MAP_START( pangpoms_writemem, ADDRESS_SPACE_PROGRAM, 16 )
1712		AM_RANGE(0x000000, 0x03ffff) AM_WRITE(SMH_ROM                  )   // ROM
1713		AM_RANGE(0xc00000, 0xc0ffff) AM_WRITE(SMH_RAM                  )   // RAM
1714		AM_RANGE(0x400000, 0x41ffff) AM_WRITE(metro_vram_0_w) AM_BASE(&metro_vram_0   )   // Layer 0
1715		AM_RANGE(0x420000, 0x43ffff) AM_WRITE(metro_vram_1_w) AM_BASE(&metro_vram_1   )   // Layer 1
1716		AM_RANGE(0x440000, 0x45ffff) AM_WRITE(metro_vram_2_w) AM_BASE(&metro_vram_2   )   // Layer 2
1717		AM_RANGE(0x470000, 0x473fff) AM_WRITE(paletteram16_GGGGGRRRRRBBBBBx_word_w  ) AM_BASE(&paletteram16   )   // Palette
1718		AM_RANGE(0x474000, 0x474fff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16) AM_SIZE(&spriteram_size            )   // Sprites
1719		AM_RANGE(0x478000, 0x4787ff) AM_WRITE(SMH_RAM) AM_BASE(&metro_tiletable) AM_SIZE(&metro_tiletable_size   )   // Tiles Set
1720		AM_RANGE(0x478800, 0x478813) AM_WRITE(SMH_RAM) AM_BASE(&metro_videoregs   )   // Video Registers
1721		AM_RANGE(0x478840, 0x47884d) AM_WRITE(metro_blitter_w) AM_BASE(&metro_blitter_regs   )   // Tiles Blitter
1722		AM_RANGE(0x478860, 0x47886b) AM_WRITE(metro_window_w) AM_BASE(&metro_window   )   // Tilemap Window
1723		AM_RANGE(0x478870, 0x47887b) AM_WRITE(SMH_RAM) AM_BASE(&metro_scroll      )   // Scroll Regs
1724		AM_RANGE(0x478880, 0x478881) AM_WRITE(SMH_NOP                  )   // ? increasing
1725		AM_RANGE(0x478890, 0x478891) AM_WRITE(SMH_NOP                  )   // ? increasing
1726		AM_RANGE(0x4788a2, 0x4788a3) AM_WRITE(metro_irq_cause_w            )   // IRQ Acknowledge
1727		AM_RANGE(0x4788a4, 0x4788a5) AM_WRITE(SMH_RAM) AM_BASE(&metro_irq_enable   )   // IRQ Enable
1728		AM_RANGE(0x4788a8, 0x4788a9) AM_WRITE(metro_soundlatch_w         )   // To Sound CPU
1729		AM_RANGE(0x4788aa, 0x4788ab) AM_WRITE(SMH_RAM) AM_BASE(&metro_rombank      )   // Rom Bank
1730		AM_RANGE(0x4788ac, 0x4788ad) AM_WRITE(SMH_RAM) AM_BASE(&metro_screenctrl   )   // Screen Control
1731		AM_RANGE(0x800000, 0x800001) AM_WRITE(metro_soundstatus_w         )   // To Sound CPU
1732		AM_RANGE(0x800002, 0x800003) AM_WRITE(metro_coin_lockout_1word_w   )   // Coin Lockout
1733		ADDRESS_MAP_END
1734	1503
1735
1736	1504	/***************************************************************************
1737	1505	Poitto!
1738	1506	***************************************************************************/
1739	1507
1740		static ADDRESS_MAP_START( poitto_readmem, ADDRESS_SPACE_PROGRAM, 16 )
1741		AM_RANGE(0x000000, 0x03ffff) AM_READ(SMH_ROM            )   // ROM
1742		AM_RANGE(0x400000, 0x40ffff) AM_READ(SMH_RAM            )   // RAM
1743		AM_RANGE(0xc00000, 0xc1ffff) AM_READ(SMH_RAM            )   // Layer 0
1744		AM_RANGE(0xc20000, 0xc3ffff) AM_READ(SMH_RAM            )   // Layer 1
1745		AM_RANGE(0xc40000, 0xc5ffff) AM_READ(SMH_RAM            )   // Layer 2
1746		AM_RANGE(0xc60000, 0xc6ffff) AM_READ(metro_bankedrom_r      )   // Banked ROM
1747		AM_RANGE(0xc70000, 0xc73fff) AM_READ(SMH_RAM            )   // Palette
1748		AM_RANGE(0xc74000, 0xc74fff) AM_READ(SMH_RAM            )   // Sprites
1749		AM_RANGE(0xc78000, 0xc787ff) AM_READ(SMH_RAM            )   // Tiles Set
1750		AM_RANGE(0xc788a2, 0xc788a3) AM_READ(metro_irq_cause_r      )   // IRQ Cause
1751		AM_RANGE(0x800000, 0x800001) AM_READ_PORT("IN0")
	1508	static ADDRESS_MAP_START( poitto_map, ADDRESS_SPACE_PROGRAM, 16 )
	1509	AM_RANGE(0x000000, 0x03ffff) AM_ROM                                       // ROM
	1510	AM_RANGE(0x400000, 0x40ffff) AM_RAM                                       // RAM
	1511	AM_RANGE(0xc00000, 0xc1ffff) AM_RAM_WRITE(metro_vram_0_w) AM_BASE(&metro_vram_0)   // Layer 0
	1512	AM_RANGE(0xc20000, 0xc3ffff) AM_RAM_WRITE(metro_vram_1_w) AM_BASE(&metro_vram_1)   // Layer 1
	1513	AM_RANGE(0xc40000, 0xc5ffff) AM_RAM_WRITE(metro_vram_2_w) AM_BASE(&metro_vram_2)   // Layer 2
	1514	AM_RANGE(0xc60000, 0xc6ffff) AM_READ(metro_bankedrom_r)                        // Banked ROM
	1515	AM_RANGE(0xc70000, 0xc73fff) AM_RAM_WRITE(paletteram16_GGGGGRRRRRBBBBBx_word_w) AM_BASE(&paletteram16)   // Palette
	1516	AM_RANGE(0xc74000, 0xc74fff) AM_RAM AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)   // Sprites
	1517	AM_RANGE(0xc78000, 0xc787ff) AM_RAM AM_BASE(&metro_tiletable) AM_SIZE(&metro_tiletable_size)   // Tiles Set
	1518	AM_RANGE(0xc78800, 0xc78813) AM_WRITEONLY AM_BASE(&metro_videoregs)               // Video Registers
	1519	AM_RANGE(0xc78840, 0xc7884d) AM_WRITE(metro_blitter_w) AM_BASE(&metro_blitter_regs)   // Tiles Blitter
	1520	AM_RANGE(0xc78860, 0xc7886b) AM_WRITE(metro_window_w) AM_BASE(&metro_window)      // Tilemap Window
	1521	AM_RANGE(0xc78870, 0xc7887b) AM_WRITEONLY AM_BASE(&metro_scroll)               // Scroll Regs
	1522	AM_RANGE(0xc78880, 0xc78881) AM_WRITENOP                                 // ? increasing
	1523	AM_RANGE(0xc78890, 0xc78891) AM_WRITENOP                                 // ? increasing
	1524	AM_RANGE(0xc788a2, 0xc788a3) AM_READWRITE(metro_irq_cause_r,metro_irq_cause_w)      // IRQ Cause / IRQ Acknowledge
	1525	AM_RANGE(0xc788a4, 0xc788a5) AM_WRITEONLY AM_BASE(&metro_irq_enable)            // IRQ Enable
	1526	AM_RANGE(0xc788a8, 0xc788a9) AM_WRITE(metro_soundlatch_w)                     // To Sound CPU
	1527	AM_RANGE(0xc788aa, 0xc788ab) AM_WRITEONLY AM_BASE(&metro_rombank)               // Rom Bank
	1528	AM_RANGE(0xc788ac, 0xc788ad) AM_WRITEONLY AM_BASE(&metro_screenctrl)            // Screen Control
	1529	AM_RANGE(0x800000, 0x800001) AM_READ_PORT("IN0") AM_WRITE(metro_soundstatus_w)      // To Sound CPU
1752	1530	AM_RANGE(0x800002, 0x800003) AM_READ_PORT("IN1")
1753	1531	AM_RANGE(0x800004, 0x800005) AM_READ_PORT("DSW0")
1754	1532	AM_RANGE(0x800006, 0x800007) AM_READ_PORT("IN2")
	1533	AM_RANGE(0x800002, 0x800009) AM_WRITE(metro_coin_lockout_4words_w)               // Coin Lockout
1755	1534	ADDRESS_MAP_END
1756	1535
1757		static ADDRESS_MAP_START( poitto_writemem, ADDRESS_SPACE_PROGRAM, 16 )
1758		AM_RANGE(0x000000, 0x03ffff) AM_WRITE(SMH_ROM                  )   // ROM
1759		AM_RANGE(0x400000, 0x40ffff) AM_WRITE(SMH_RAM                  )   // RAM
1760		AM_RANGE(0xc00000, 0xc1ffff) AM_WRITE(metro_vram_0_w) AM_BASE(&metro_vram_0   )   // Layer 0
1761		AM_RANGE(0xc20000, 0xc3ffff) AM_WRITE(metro_vram_1_w) AM_BASE(&metro_vram_1   )   // Layer 1
1762		AM_RANGE(0xc40000, 0xc5ffff) AM_WRITE(metro_vram_2_w) AM_BASE(&metro_vram_2   )   // Layer 2
1763		AM_RANGE(0xc70000, 0xc73fff) AM_WRITE(paletteram16_GGGGGRRRRRBBBBBx_word_w  ) AM_BASE(&paletteram16   )   // Palette
1764		AM_RANGE(0xc74000, 0xc74fff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16) AM_SIZE(&spriteram_size            )   // Sprites
1765		AM_RANGE(0xc78000, 0xc787ff) AM_WRITE(SMH_RAM) AM_BASE(&metro_tiletable) AM_SIZE(&metro_tiletable_size   )   // Tiles Set
1766		AM_RANGE(0xc78800, 0xc78813) AM_WRITE(SMH_RAM) AM_BASE(&metro_videoregs   )   // Video Registers
1767		AM_RANGE(0xc78840, 0xc7884d) AM_WRITE(metro_blitter_w) AM_BASE(&metro_blitter_regs   )   // Tiles Blitter
1768		AM_RANGE(0xc78860, 0xc7886b) AM_WRITE(metro_window_w) AM_BASE(&metro_window   )   // Tilemap Window
1769		AM_RANGE(0xc78870, 0xc7887b) AM_WRITE(SMH_RAM) AM_BASE(&metro_scroll      )   // Scroll Regs
1770		AM_RANGE(0xc78880, 0xc78881) AM_WRITE(SMH_NOP                  )   // ? increasing
1771		AM_RANGE(0xc78890, 0xc78891) AM_WRITE(SMH_NOP                  )   // ? increasing
1772		AM_RANGE(0xc788a2, 0xc788a3) AM_WRITE(metro_irq_cause_w            )   // IRQ Acknowledge
1773		AM_RANGE(0xc788a4, 0xc788a5) AM_WRITE(SMH_RAM) AM_BASE(&metro_irq_enable   )   // IRQ Enable
1774		AM_RANGE(0xc788a8, 0xc788a9) AM_WRITE(metro_soundlatch_w         )   // To Sound CPU
1775		AM_RANGE(0xc788aa, 0xc788ab) AM_WRITE(SMH_RAM) AM_BASE(&metro_rombank      )   // Rom Bank
1776		AM_RANGE(0xc788ac, 0xc788ad) AM_WRITE(SMH_RAM) AM_BASE(&metro_screenctrl   )   // Screen Control
1777		AM_RANGE(0x800000, 0x800001) AM_WRITE(metro_soundstatus_w         )   // To Sound CPU
1778		AM_RANGE(0x800002, 0x800009) AM_WRITE(metro_coin_lockout_4words_w   )   // Coin Lockout
1779		ADDRESS_MAP_END
1780	1536
1781
1782	1537	/***************************************************************************
1783	1538	Sky Alert
1784	1539	***************************************************************************/
1785	1540
1786		static ADDRESS_MAP_START( skyalert_readmem, ADDRESS_SPACE_PROGRAM, 16 )
1787		AM_RANGE(0x000000, 0x03ffff) AM_READ(SMH_ROM            )   // ROM
1788		AM_RANGE(0xc00000, 0xc0ffff) AM_READ(SMH_RAM            )   // RAM
1789		AM_RANGE(0x800000, 0x81ffff) AM_READ(SMH_RAM            )   // Layer 0
1790		AM_RANGE(0x820000, 0x83ffff) AM_READ(SMH_RAM            )   // Layer 1
1791		AM_RANGE(0x840000, 0x85ffff) AM_READ(SMH_RAM            )   // Layer 2
1792		AM_RANGE(0x860000, 0x86ffff) AM_READ(metro_bankedrom_r      )   // Banked ROM
1793		AM_RANGE(0x870000, 0x873fff) AM_READ(SMH_RAM            )   // Palette
1794		AM_RANGE(0x874000, 0x874fff) AM_READ(SMH_RAM            )   // Sprites
1795		AM_RANGE(0x878000, 0x8787ff) AM_READ(SMH_RAM            )   // Tiles Set
1796		AM_RANGE(0x8788a2, 0x8788a3) AM_READ(metro_irq_cause_r      )   // IRQ Cause
1797		AM_RANGE(0x400000, 0x400001) AM_READ(metro_soundstatus_r   )   // From Sound CPU
1798		AM_RANGE(0x400002, 0x400003) AM_READ(SMH_NOP            )   //
1799		AM_RANGE(0x400004, 0x400005) AM_READ_PORT("IN0")            // Inputs
1800		AM_RANGE(0x400006, 0x400007) AM_READ_PORT("IN1")            //
1801		AM_RANGE(0x400008, 0x400009) AM_READ_PORT("IN2")            //
1802		AM_RANGE(0x40000a, 0x40000b) AM_READ_PORT("DSW0")            //
1803		AM_RANGE(0x40000c, 0x40000d) AM_READ_PORT("DSW1")            //
1804		AM_RANGE(0x40000e, 0x40000f) AM_READ_PORT("IN3")            //
	1541	static ADDRESS_MAP_START( skyalert_map, ADDRESS_SPACE_PROGRAM, 16 )
	1542	AM_RANGE(0x000000, 0x03ffff) AM_ROM                                       // ROM
	1543	AM_RANGE(0xc00000, 0xc0ffff) AM_RAM                                       // RAM
	1544	AM_RANGE(0x800000, 0x81ffff) AM_RAM_WRITE(metro_vram_0_w) AM_BASE(&metro_vram_0)   // Layer 0
	1545	AM_RANGE(0x820000, 0x83ffff) AM_RAM_WRITE(metro_vram_1_w) AM_BASE(&metro_vram_1)   // Layer 1
	1546	AM_RANGE(0x840000, 0x85ffff) AM_RAM_WRITE(metro_vram_2_w) AM_BASE(&metro_vram_2)   // Layer 2
	1547	AM_RANGE(0x860000, 0x86ffff) AM_READ(metro_bankedrom_r)                        // Banked ROM
	1548	AM_RANGE(0x870000, 0x873fff) AM_RAM_WRITE(paletteram16_GGGGGRRRRRBBBBBx_word_w) AM_BASE(&paletteram16)   // Palette
	1549	AM_RANGE(0x874000, 0x874fff) AM_RAM AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)   // Sprites
	1550	AM_RANGE(0x878000, 0x8787ff) AM_RAM AM_BASE(&metro_tiletable) AM_SIZE(&metro_tiletable_size)   // Tiles Set
	1551	AM_RANGE(0x878800, 0x878813) AM_WRITEONLY AM_BASE(&metro_videoregs)               // Video Registers
	1552	AM_RANGE(0x878840, 0x87884d) AM_WRITE(metro_blitter_w) AM_BASE(&metro_blitter_regs)   // Tiles Blitter
	1553	AM_RANGE(0x878860, 0x87886b) AM_WRITE(metro_window_w) AM_BASE(&metro_window   )      // Tilemap Window
	1554	AM_RANGE(0x878870, 0x87887b) AM_WRITEONLY AM_BASE(&metro_scroll)               // Scroll
	1555	AM_RANGE(0x878880, 0x878881) AM_WRITENOP                                 // ? increasing
	1556	AM_RANGE(0x878890, 0x878891) AM_WRITENOP                                 // ? increasing
	1557	AM_RANGE(0x8788a2, 0x8788a3) AM_READWRITE(metro_irq_cause_r,metro_irq_cause_w)      // IRQ Cause / IRQ Acknowledge
	1558	AM_RANGE(0x8788a4, 0x8788a5) AM_WRITEONLY AM_BASE(&metro_irq_enable)            // IRQ Enable
	1559	AM_RANGE(0x8788a8, 0x8788a9) AM_WRITE(metro_soundlatch_w)                     // To Sound CPU
	1560	AM_RANGE(0x8788aa, 0x8788ab) AM_WRITEONLY AM_BASE(&metro_rombank)               // Rom Bank
	1561	AM_RANGE(0x8788ac, 0x8788ad) AM_WRITEONLY AM_BASE(&metro_screenctrl)            // Screen Control
	1562	AM_RANGE(0x400000, 0x400001) AM_READWRITE(metro_soundstatus_r,metro_soundstatus_w)   // From / To Sound CPU
	1563	AM_RANGE(0x400002, 0x400003) AM_READNOP   AM_WRITE(metro_coin_lockout_1word_w)      // Coin Lockout
	1564	AM_RANGE(0x400004, 0x400005) AM_READ_PORT("IN0")                           // Inputs
	1565	AM_RANGE(0x400006, 0x400007) AM_READ_PORT("IN1")                           //
	1566	AM_RANGE(0x400008, 0x400009) AM_READ_PORT("IN2")                           //
	1567	AM_RANGE(0x40000a, 0x40000b) AM_READ_PORT("DSW0")                           //
	1568	AM_RANGE(0x40000c, 0x40000d) AM_READ_PORT("DSW1")                           //
	1569	AM_RANGE(0x40000e, 0x40000f) AM_READ_PORT("IN3")                           //
1805	1570	ADDRESS_MAP_END
1806	1571
1807		static ADDRESS_MAP_START( skyalert_writemem, ADDRESS_SPACE_PROGRAM, 16 )
1808		AM_RANGE(0x000000, 0x03ffff) AM_WRITE(SMH_ROM                  )   // ROM
1809		AM_RANGE(0xc00000, 0xc0ffff) AM_WRITE(SMH_RAM                  )   // RAM
1810		AM_RANGE(0x800000, 0x81ffff) AM_WRITE(metro_vram_0_w) AM_BASE(&metro_vram_0   )   // Layer 0
1811		AM_RANGE(0x820000, 0x83ffff) AM_WRITE(metro_vram_1_w) AM_BASE(&metro_vram_1   )   // Layer 1
1812		AM_RANGE(0x840000, 0x85ffff) AM_WRITE(metro_vram_2_w) AM_BASE(&metro_vram_2   )   // Layer 2
1813		AM_RANGE(0x870000, 0x873fff) AM_WRITE(paletteram16_GGGGGRRRRRBBBBBx_word_w  ) AM_BASE(&paletteram16   )   // Palette
1814		AM_RANGE(0x874000, 0x874fff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16) AM_SIZE(&spriteram_size            )   // Sprites
1815		AM_RANGE(0x878000, 0x8787ff) AM_WRITE(SMH_RAM) AM_BASE(&metro_tiletable) AM_SIZE(&metro_tiletable_size   )   // Tiles Set
1816		AM_RANGE(0x878800, 0x878813) AM_WRITE(SMH_RAM) AM_BASE(&metro_videoregs   )   // Video Registers
1817		AM_RANGE(0x878840, 0x87884d) AM_WRITE(metro_blitter_w) AM_BASE(&metro_blitter_regs   )   // Tiles Blitter
1818		AM_RANGE(0x878860, 0x87886b) AM_WRITE(metro_window_w) AM_BASE(&metro_window   )   // Tilemap Window
1819		AM_RANGE(0x878870, 0x87887b) AM_WRITE(SMH_RAM) AM_BASE(&metro_scroll      )   // Scroll
1820		AM_RANGE(0x878880, 0x878881) AM_WRITE(SMH_NOP                  )   // ? increasing
1821		AM_RANGE(0x878890, 0x878891) AM_WRITE(SMH_NOP                  )   // ? increasing
1822		AM_RANGE(0x8788a2, 0x8788a3) AM_WRITE(metro_irq_cause_w            )   // IRQ Acknowledge
1823		AM_RANGE(0x8788a4, 0x8788a5) AM_WRITE(SMH_RAM) AM_BASE(&metro_irq_enable   )   // IRQ Enable
1824		AM_RANGE(0x8788a8, 0x8788a9) AM_WRITE(metro_soundlatch_w         )   // To Sound CPU
1825		AM_RANGE(0x8788aa, 0x8788ab) AM_WRITE(SMH_RAM) AM_BASE(&metro_rombank      )   // Rom Bank
1826		AM_RANGE(0x8788ac, 0x8788ad) AM_WRITE(SMH_RAM) AM_BASE(&metro_screenctrl   )   // Screen Control
1827		AM_RANGE(0x400000, 0x400001) AM_WRITE(metro_soundstatus_w         )   // To Sound CPU
1828		AM_RANGE(0x400002, 0x400003) AM_WRITE(metro_coin_lockout_1word_w   )   // Coin Lockout
1829		ADDRESS_MAP_END
1830	1572
1831
1832	1573	/***************************************************************************
1833	1574	Pururun
1834	1575	***************************************************************************/
1835	1576
1836		static ADDRESS_MAP_START( pururun_readmem, ADDRESS_SPACE_PROGRAM, 16 )
1837		AM_RANGE(0x000000, 0x07ffff) AM_READ(SMH_ROM            )   // ROM
1838		AM_RANGE(0x800000, 0x80ffff) AM_READ(SMH_RAM            )   // RAM
1839		AM_RANGE(0xc00000, 0xc1ffff) AM_READ(SMH_RAM            )   // Layer 0
1840		AM_RANGE(0xc20000, 0xc3ffff) AM_READ(SMH_RAM            )   // Layer 1
1841		AM_RANGE(0xc40000, 0xc5ffff) AM_READ(SMH_RAM            )   // Layer 2
1842		AM_RANGE(0xc60000, 0xc6ffff) AM_READ(metro_bankedrom_r      )   // Banked ROM
1843		AM_RANGE(0xc70000, 0xc73fff) AM_READ(SMH_RAM            )   // Palette
1844		AM_RANGE(0xc74000, 0xc74fff) AM_READ(SMH_RAM            )   // Sprites
1845		AM_RANGE(0xc78000, 0xc787ff) AM_READ(SMH_RAM            )   // Tiles Set
1846		AM_RANGE(0xc788a2, 0xc788a3) AM_READ(metro_irq_cause_r      )   // IRQ Cause
1847		AM_RANGE(0x400000, 0x400001) AM_READ_PORT("IN0")
	1577	static ADDRESS_MAP_START( pururun_map, ADDRESS_SPACE_PROGRAM, 16 )
	1578	AM_RANGE(0x000000, 0x07ffff) AM_ROM                                       // ROM
	1579	AM_RANGE(0x800000, 0x80ffff) AM_RAM                                       // RAM
	1580	AM_RANGE(0xc00000, 0xc1ffff) AM_RAM_WRITE(metro_vram_0_w) AM_BASE(&metro_vram_0)   // Layer 0
	1581	AM_RANGE(0xc20000, 0xc3ffff) AM_RAM_WRITE(metro_vram_1_w) AM_BASE(&metro_vram_1)   // Layer 1
	1582	AM_RANGE(0xc40000, 0xc5ffff) AM_RAM_WRITE(metro_vram_2_w) AM_BASE(&metro_vram_2)   // Layer 2
	1583	AM_RANGE(0xc60000, 0xc6ffff) AM_READ(metro_bankedrom_r)                        // Banked ROM
	1584	AM_RANGE(0xc70000, 0xc73fff) AM_RAM_WRITE(paletteram16_GGGGGRRRRRBBBBBx_word_w) AM_BASE(&paletteram16)   // Palette
	1585	AM_RANGE(0xc74000, 0xc74fff) AM_RAM AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)   // Sprites
	1586	AM_RANGE(0xc78000, 0xc787ff) AM_RAM AM_BASE(&metro_tiletable) AM_SIZE(&metro_tiletable_size)   // Tiles Set
	1587	AM_RANGE(0xc78840, 0xc7884d) AM_WRITE(metro_blitter_w) AM_BASE(&metro_blitter_regs)   // Tiles Blitter
	1588	AM_RANGE(0xc78860, 0xc7886b) AM_WRITE(metro_window_w) AM_BASE(&metro_window)      // Tilemap Window
	1589	AM_RANGE(0xc78870, 0xc7887b) AM_WRITE(SMH_RAM) AM_BASE(&metro_scroll)            // Scroll Regs
	1590	AM_RANGE(0xc78880, 0xc78881) AM_WRITENOP                                 // ? increasing
	1591	AM_RANGE(0xc78890, 0xc78891) AM_WRITENOP                                 // ? increasing
	1592	AM_RANGE(0xc788a2, 0xc788a3) AM_READWRITE(metro_irq_cause_r,metro_irq_cause_w)      // IRQ Cause / IRQ Acknowledge
	1593	AM_RANGE(0xc788a4, 0xc788a5) AM_WRITEONLY AM_BASE(&metro_irq_enable)            // IRQ Enable
	1594	AM_RANGE(0xc788a8, 0xc788a9) AM_WRITE(metro_soundlatch_w)                     // To Sound CPU
	1595	AM_RANGE(0xc788aa, 0xc788ab) AM_WRITEONLY AM_BASE(&metro_rombank)               // Rom Bank
	1596	AM_RANGE(0xc788ac, 0xc788ad) AM_WRITEONLY AM_BASE(&metro_screenctrl)            // Screen Control
	1597	AM_RANGE(0xc79700, 0xc79713) AM_WRITEONLY AM_BASE(&metro_videoregs)               // Video Registers
	1598	AM_RANGE(0x400000, 0x400001) AM_READ_PORT("IN0") AM_WRITE(metro_soundstatus_w)      // To Sound CPU
1848	1599	AM_RANGE(0x400002, 0x400003) AM_READ_PORT("IN1")
1849	1600	AM_RANGE(0x400004, 0x400005) AM_READ_PORT("DSW0")
1850	1601	AM_RANGE(0x400006, 0x400007) AM_READ_PORT("IN2")
	1602	AM_RANGE(0x400002, 0x400009) AM_WRITE(metro_coin_lockout_4words_w)               // Coin Lockout
1851	1603	ADDRESS_MAP_END
1852	1604
1853		static ADDRESS_MAP_START( pururun_writemem, ADDRESS_SPACE_PROGRAM, 16 )
1854		AM_RANGE(0x000000, 0x07ffff) AM_WRITE(SMH_ROM                  )   // ROM
1855		AM_RANGE(0x800000, 0x80ffff) AM_WRITE(SMH_RAM                  )   // RAM
1856		AM_RANGE(0xc00000, 0xc1ffff) AM_WRITE(metro_vram_0_w) AM_BASE(&metro_vram_0   )   // Layer 0
1857		AM_RANGE(0xc20000, 0xc3ffff) AM_WRITE(metro_vram_1_w) AM_BASE(&metro_vram_1   )   // Layer 1
1858		AM_RANGE(0xc40000, 0xc5ffff) AM_WRITE(metro_vram_2_w) AM_BASE(&metro_vram_2   )   // Layer 2
1859		AM_RANGE(0xc70000, 0xc73fff) AM_WRITE(paletteram16_GGGGGRRRRRBBBBBx_word_w  ) AM_BASE(&paletteram16   )   // Palette
1860		AM_RANGE(0xc74000, 0xc74fff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16) AM_SIZE(&spriteram_size            )   // Sprites
1861		AM_RANGE(0xc78000, 0xc787ff) AM_WRITE(SMH_RAM) AM_BASE(&metro_tiletable) AM_SIZE(&metro_tiletable_size   )   // Tiles Set
1862		AM_RANGE(0xc78840, 0xc7884d) AM_WRITE(metro_blitter_w) AM_BASE(&metro_blitter_regs   )   // Tiles Blitter
1863		AM_RANGE(0xc78860, 0xc7886b) AM_WRITE(metro_window_w) AM_BASE(&metro_window   )   // Tilemap Window
1864		AM_RANGE(0xc78870, 0xc7887b) AM_WRITE(SMH_RAM) AM_BASE(&metro_scroll      )   // Scroll Regs
1865		AM_RANGE(0xc78880, 0xc78881) AM_WRITE(SMH_NOP                  )   // ? increasing
1866		AM_RANGE(0xc78890, 0xc78891) AM_WRITE(SMH_NOP                  )   // ? increasing
1867		AM_RANGE(0xc788a2, 0xc788a3) AM_WRITE(metro_irq_cause_w            )   // IRQ Acknowledge
1868		AM_RANGE(0xc788a4, 0xc788a5) AM_WRITE(SMH_RAM) AM_BASE(&metro_irq_enable   )   // IRQ Enable
1869		AM_RANGE(0xc788a8, 0xc788a9) AM_WRITE(metro_soundlatch_w         )   // To Sound CPU
1870		AM_RANGE(0xc788aa, 0xc788ab) AM_WRITE(SMH_RAM) AM_BASE(&metro_rombank      )   // Rom Bank
1871		AM_RANGE(0xc788ac, 0xc788ad) AM_WRITE(SMH_RAM) AM_BASE(&metro_screenctrl   )   // Screen Control
1872		AM_RANGE(0xc79700, 0xc79713) AM_WRITE(SMH_RAM) AM_BASE(&metro_videoregs   )   // Video Registers
1873		AM_RANGE(0x400000, 0x400001) AM_WRITE(metro_soundstatus_w         )   // To Sound CPU
1874		AM_RANGE(0x400002, 0x400009) AM_WRITE(metro_coin_lockout_4words_w   )   // Coin Lockout
1875		ADDRESS_MAP_END
1876	1605
1877
1878	1606	/***************************************************************************
1879	1607	Toride II Adauchi Gaiden
1880	1608	***************************************************************************/
1881	1609
1882		static ADDRESS_MAP_START( toride2g_readmem, ADDRESS_SPACE_PROGRAM, 16 )
1883		AM_RANGE(0x000000, 0x07ffff) AM_READ(SMH_ROM            )   // ROM
1884		AM_RANGE(0x400000, 0x4cffff) AM_READ(SMH_RAM            )   // RAM (4xc000-4xffff mirrored?)
1885		AM_RANGE(0xc00000, 0xc1ffff) AM_READ(SMH_RAM            )   // Layer 0
1886		AM_RANGE(0xc20000, 0xc3ffff) AM_READ(SMH_RAM            )   // Layer 1
1887		AM_RANGE(0xc40000, 0xc5ffff) AM_READ(SMH_RAM            )   // Layer 2
1888		AM_RANGE(0xc60000, 0xc6ffff) AM_READ(metro_bankedrom_r      )   // Banked ROM
1889		AM_RANGE(0xc70000, 0xc73fff) AM_READ(SMH_RAM            )   // Palette
1890		AM_RANGE(0xc74000, 0xc74fff) AM_READ(SMH_RAM            )   // Sprites
1891		AM_RANGE(0xc78000, 0xc787ff) AM_READ(SMH_RAM            )   // Tiles Set
1892		AM_RANGE(0xc788a2, 0xc788a3) AM_READ(metro_irq_cause_r      )   // IRQ Cause
1893		AM_RANGE(0x800000, 0x800001) AM_READ_PORT("IN0")
	1610	static ADDRESS_MAP_START( toride2g_map, ADDRESS_SPACE_PROGRAM, 16 )
	1611	AM_RANGE(0x000000, 0x07ffff) AM_ROM                                       // ROM
	1612	AM_RANGE(0x400000, 0x4cffff) AM_RAM                                       // RAM (4xc000-4xffff mirrored?)
	1613	AM_RANGE(0xc00000, 0xc1ffff) AM_RAM_WRITE(metro_vram_0_w) AM_BASE(&metro_vram_0)   // Layer 0
	1614	AM_RANGE(0xc20000, 0xc3ffff) AM_RAM_WRITE(metro_vram_1_w) AM_BASE(&metro_vram_1)   // Layer 1
	1615	AM_RANGE(0xc40000, 0xc5ffff) AM_RAM_WRITE(metro_vram_2_w) AM_BASE(&metro_vram_2)   // Layer 2
	1616	AM_RANGE(0xc60000, 0xc6ffff) AM_READ(metro_bankedrom_r)                        // Banked ROM
	1617	AM_RANGE(0xc70000, 0xc73fff) AM_RAM_WRITE(paletteram16_GGGGGRRRRRBBBBBx_word_w) AM_BASE(&paletteram16)   // Palette
	1618	AM_RANGE(0xc74000, 0xc74fff) AM_RAM AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)   // Sprites
	1619	AM_RANGE(0xc78000, 0xc787ff) AM_RAM AM_BASE(&metro_tiletable) AM_SIZE(&metro_tiletable_size)   // Tiles Set
	1620	AM_RANGE(0xc78840, 0xc7884d) AM_WRITE(metro_blitter_w) AM_BASE(&metro_blitter_regs)   // Tiles Blitter
	1621	AM_RANGE(0xc78860, 0xc7886b) AM_WRITE(metro_window_w) AM_BASE(&metro_window)      // Tilemap Window
	1622	AM_RANGE(0xc78870, 0xc7887b) AM_WRITEONLY AM_BASE(&metro_scroll)               // Scroll Regs
	1623	AM_RANGE(0xc78880, 0xc78881) AM_WRITENOP                                 // ? increasing
	1624	AM_RANGE(0xc78890, 0xc78891) AM_WRITENOP                                 // ? increasing
	1625	AM_RANGE(0xc788a2, 0xc788a3) AM_READWRITE(metro_irq_cause_r,metro_irq_cause_w)      // IRQ Cause / IRQ Acknowledge
	1626	AM_RANGE(0xc788a4, 0xc788a5) AM_WRITEONLY AM_BASE(&metro_irq_enable)            // IRQ Enable
	1627	AM_RANGE(0xc788a8, 0xc788a9) AM_WRITE(metro_soundlatch_w)                     // To Sound CPU
	1628	AM_RANGE(0xc788aa, 0xc788ab) AM_WRITEONLY AM_BASE(&metro_rombank)               // Rom Bank
	1629	AM_RANGE(0xc788ac, 0xc788ad) AM_WRITEONLY AM_BASE(&metro_screenctrl)            // Screen Control
	1630	AM_RANGE(0xc79700, 0xc79713) AM_WRITEONLY AM_BASE(&metro_videoregs)               // Video Registers
	1631
	1632	AM_RANGE(0x800000, 0x800001) AM_READ_PORT("IN0") AM_WRITE(metro_soundstatus_w)      // To Sound CPU
1894	1633	AM_RANGE(0x800002, 0x800003) AM_READ_PORT("IN1")
1895	1634	AM_RANGE(0x800004, 0x800005) AM_READ_PORT("DSW0")
1896	1635	AM_RANGE(0x800006, 0x800007) AM_READ_PORT("IN2")
1897		ADDRESS_MAP_END
	1636	AM_RANGE(0x800002, 0x800009) AM_WRITE(metro_coin_lockout_4words_w)               // Coin Lockout
1898	1637
1899		static ADDRESS_MAP_START( toride2g_writemem, ADDRESS_SPACE_PROGRAM, 16 )
1900		AM_RANGE(0x000000, 0x07ffff) AM_WRITE(SMH_ROM                  )   // ROM
1901		AM_RANGE(0x400000, 0x4cffff) AM_WRITE(SMH_RAM                  )   // RAM (4xc000-4xffff mirrored?)
1902		AM_RANGE(0xc00000, 0xc1ffff) AM_WRITE(metro_vram_0_w) AM_BASE(&metro_vram_0   )   // Layer 0
1903		AM_RANGE(0xc20000, 0xc3ffff) AM_WRITE(metro_vram_1_w) AM_BASE(&metro_vram_1   )   // Layer 1
1904		AM_RANGE(0xc40000, 0xc5ffff) AM_WRITE(metro_vram_2_w) AM_BASE(&metro_vram_2   )   // Layer 2
1905		AM_RANGE(0xc70000, 0xc73fff) AM_WRITE(paletteram16_GGGGGRRRRRBBBBBx_word_w  ) AM_BASE(&paletteram16   )   // Palette
1906		AM_RANGE(0xc74000, 0xc74fff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16) AM_SIZE(&spriteram_size            )   // Sprites
1907		AM_RANGE(0xc78000, 0xc787ff) AM_WRITE(SMH_RAM) AM_BASE(&metro_tiletable) AM_SIZE(&metro_tiletable_size   )   // Tiles Set
1908		AM_RANGE(0xc78840, 0xc7884d) AM_WRITE(metro_blitter_w) AM_BASE(&metro_blitter_regs   )   // Tiles Blitter
1909		AM_RANGE(0xc78860, 0xc7886b) AM_WRITE(metro_window_w) AM_BASE(&metro_window   )   // Tilemap Window
1910		AM_RANGE(0xc78870, 0xc7887b) AM_WRITE(SMH_RAM) AM_BASE(&metro_scroll      )   // Scroll Regs
1911		AM_RANGE(0xc78880, 0xc78881) AM_WRITE(SMH_NOP                  )   // ? increasing
1912		AM_RANGE(0xc78890, 0xc78891) AM_WRITE(SMH_NOP                  )   // ? increasing
1913		AM_RANGE(0xc788a2, 0xc788a3) AM_WRITE(metro_irq_cause_w            )   // IRQ Acknowledge
1914		AM_RANGE(0xc788a4, 0xc788a5) AM_WRITE(SMH_RAM) AM_BASE(&metro_irq_enable   )   // IRQ Enable
1915		AM_RANGE(0xc788a8, 0xc788a9) AM_WRITE(metro_soundlatch_w         )   // To Sound CPU
1916		AM_RANGE(0xc788aa, 0xc788ab) AM_WRITE(SMH_RAM) AM_BASE(&metro_rombank      )   // Rom Bank
1917		AM_RANGE(0xc788ac, 0xc788ad) AM_WRITE(SMH_RAM) AM_BASE(&metro_screenctrl   )   // Screen Control
1918		AM_RANGE(0xc79700, 0xc79713) AM_WRITE(SMH_RAM) AM_BASE(&metro_videoregs   )   // Video Registers
1919		AM_RANGE(0x800000, 0x800001) AM_WRITE(metro_soundstatus_w         )   // To Sound CPU
1920		AM_RANGE(0x800002, 0x800009) AM_WRITE(metro_coin_lockout_4words_w   )   // Coin Lockout
1921	1638	ADDRESS_MAP_END
1922	1639
1923	1640
r4679	r4680
1927	1644
1928	1645	static WRITE16_HANDLER( blzntrnd_sound_w )
1929	1646	{
1930		soundlatch_w(space, offset, data>>8);
1931		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_NMI, PULSE_LINE);
	1647	soundlatch_w(space, offset, data >> 8);
	1648	cputag_set_input_line(space->machine, "audiocpu", INPUT_LINE_NMI, PULSE_LINE);
1932	1649	}
1933	1650
1934	1651	static WRITE8_HANDLER( blzntrnd_sh_bankswitch_w )
r4679	r4680
1942	1659
1943	1660	static void blzntrnd_irqhandler(const device_config *device, int irq)
1944	1661	{
1945		cpu_set_input_line(device->machine->cpu[1], 0, irq ? ASSERT_LINE : CLEAR_LINE);
	1662	cputag_set_input_line(device->machine, "audiocpu", 0, irq ? ASSERT_LINE : CLEAR_LINE);
1946	1663	}
1947	1664
1948	1665	static const ym2610_interface blzntrnd_ym2610_interface =
r4679	r4680
1950	1667	blzntrnd_irqhandler
1951	1668	};
1952	1669
1953		static ADDRESS_MAP_START( blzntrnd_sound_readmem, ADDRESS_SPACE_PROGRAM, 8 )
1954		AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM)
1955		AM_RANGE(0x8000, 0xbfff) AM_READ(SMH_BANK1)
1956		AM_RANGE(0xe000, 0xffff) AM_READ(SMH_RAM)
	1670	static ADDRESS_MAP_START( blzntrnd_sound_map, ADDRESS_SPACE_PROGRAM, 8 )
	1671	AM_RANGE(0x0000, 0x7fff) AM_ROM
	1672	AM_RANGE(0x8000, 0xbfff) AM_ROMBANK(1)
	1673	AM_RANGE(0xe000, 0xffff) AM_RAM
1957	1674	ADDRESS_MAP_END
1958	1675
1959		static ADDRESS_MAP_START( blzntrnd_sound_writemem, ADDRESS_SPACE_PROGRAM, 8 )
1960		AM_RANGE(0x0000, 0x7fff) AM_WRITE(SMH_ROM)
1961		AM_RANGE(0x8000, 0xbfff) AM_WRITE(SMH_ROM)
1962		AM_RANGE(0xe000, 0xffff) AM_WRITE(SMH_RAM)
1963		ADDRESS_MAP_END
1964
1965		static ADDRESS_MAP_START( blzntrnd_sound_readport, ADDRESS_SPACE_IO, 8 )
	1676	static ADDRESS_MAP_START( blzntrnd_sound_io_map, ADDRESS_SPACE_IO, 8 )
1966	1677	ADDRESS_MAP_GLOBAL_MASK(0xff)
1967		AM_RANGE(0x40, 0x40) AM_READ(soundlatch_r)
1968		AM_RANGE(0x80, 0x83) AM_DEVREAD("ym", ym2610_r)
1969		ADDRESS_MAP_END
1970
1971		static ADDRESS_MAP_START( blzntrnd_sound_writeport, ADDRESS_SPACE_IO, 8 )
1972		ADDRESS_MAP_GLOBAL_MASK(0xff)
1973	1678	AM_RANGE(0x00, 0x00) AM_WRITE(blzntrnd_sh_bankswitch_w)
1974		AM_RANGE(0x40, 0x40) AM_WRITENOP
1975		AM_RANGE(0x80, 0x83) AM_DEVWRITE("ym", ym2610_w)
	1679	AM_RANGE(0x40, 0x40) AM_READ(soundlatch_r) AM_WRITENOP
	1680	AM_RANGE(0x80, 0x83) AM_DEVREADWRITE("ym", ym2610_r,ym2610_w)
1976	1681	ADDRESS_MAP_END
1977	1682
1978		static ADDRESS_MAP_START( blzntrnd_readmem, ADDRESS_SPACE_PROGRAM, 16 )
1979		AM_RANGE(0x000000, 0x1fffff) AM_READ(SMH_ROM            )   // ROM
1980		AM_RANGE(0xff0000, 0xffffff) AM_READ(SMH_RAM            )   // RAM
1981		//  AM_RANGE(0x300000, 0x300001) AM_READ(SMH_NOP              )   // Sound
1982		AM_RANGE(0x200000, 0x21ffff) AM_READ(SMH_RAM            )   // Layer 0
1983		AM_RANGE(0x220000, 0x23ffff) AM_READ(SMH_RAM            )   // Layer 1
1984		AM_RANGE(0x240000, 0x25ffff) AM_READ(SMH_RAM            )   // Layer 2
1985		AM_RANGE(0x260000, 0x26ffff) AM_READ(metro_bankedrom_r      )   // Banked ROM
1986		AM_RANGE(0x270000, 0x273fff) AM_READ(SMH_RAM            )   // Palette
1987		AM_RANGE(0x274000, 0x274fff) AM_READ(SMH_RAM            )   // Sprites
1988		AM_RANGE(0x278000, 0x2787ff) AM_READ(SMH_RAM            )   // Tiles Set
1989		AM_RANGE(0x2788a2, 0x2788a3) AM_READ(metro_irq_cause_r      )   // IRQ Cause
1990		AM_RANGE(0xe00000, 0xe00001) AM_READ_PORT("DSW0")            // Inputs
1991		AM_RANGE(0xe00002, 0xe00003) AM_READ_PORT("DSW1")            //
1992		AM_RANGE(0xe00004, 0xe00005) AM_READ_PORT("IN0")            //
1993		AM_RANGE(0xe00006, 0xe00007) AM_READ_PORT("IN1")            //
1994		AM_RANGE(0xe00008, 0xe00009) AM_READ_PORT("IN2")            //
1995		AM_RANGE(0x400000, 0x43ffff) AM_READ(SMH_RAM            )   // 053936
1996		ADDRESS_MAP_END
	1683	static ADDRESS_MAP_START( blzntrnd_map, ADDRESS_SPACE_PROGRAM, 16 )
	1684	AM_RANGE(0x000000, 0x1fffff) AM_ROM                                       // ROM
	1685	AM_RANGE(0xff0000, 0xffffff) AM_RAM                                     // RAM
	1686	//  AM_RANGE(0x300000, 0x300001) AM_READNOP                                             // Sound
	1687	AM_RANGE(0x200000, 0x21ffff) AM_RAM_WRITE(metro_vram_0_w) AM_BASE(&metro_vram_0)   // Layer 0
	1688	AM_RANGE(0x220000, 0x23ffff) AM_RAM_WRITE(metro_vram_1_w) AM_BASE(&metro_vram_1)   // Layer 1
	1689	AM_RANGE(0x240000, 0x25ffff) AM_RAM_WRITE(metro_vram_2_w) AM_BASE(&metro_vram_2)   // Layer 2
	1690	AM_RANGE(0x260000, 0x26ffff) AM_READ(metro_bankedrom_r)                        // Banked ROM
	1691	AM_RANGE(0x260000, 0x26ffff) AM_WRITENOP                                 // ??????
	1692	AM_RANGE(0x270000, 0x273fff) AM_RAM_WRITE(paletteram16_GGGGGRRRRRBBBBBx_word_w) AM_BASE(&paletteram16)   // Palette
	1693	AM_RANGE(0x274000, 0x274fff) AM_RAM AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)   // Sprites
	1694	AM_RANGE(0x278000, 0x2787ff) AM_RAM AM_BASE(&metro_tiletable) AM_SIZE(&metro_tiletable_size)   // Tiles Set
	1695	AM_RANGE(0x278860, 0x27886b) AM_WRITE(metro_window_w) AM_BASE(&metro_window)      // Tilemap Window
	1696	AM_RANGE(0x278870, 0x27887b) AM_WRITEONLY AM_BASE(&metro_scroll)               // Scroll
	1697	AM_RANGE(0x278890, 0x278891) AM_WRITENOP                                 // ? increasing
	1698	AM_RANGE(0x2788a2, 0x2788a3) AM_READWRITE(metro_irq_cause_r,metro_irq_cause_w)      // IRQ Cause / IRQ Acknowledge
	1699	AM_RANGE(0x2788a4, 0x2788a5) AM_WRITEONLY AM_BASE(&metro_irq_enable)            // IRQ Enable
	1700	AM_RANGE(0x2788aa, 0x2788ab) AM_WRITEONLY AM_BASE(&metro_rombank)               // Rom Bank
	1701	AM_RANGE(0x2788ac, 0x2788ad) AM_WRITEONLY AM_BASE(&metro_screenctrl)            // Screen Control
	1702	AM_RANGE(0x279700, 0x279713) AM_WRITEONLY AM_BASE(&metro_videoregs)               // Video Registers
1997	1703
1998		static ADDRESS_MAP_START( blzntrnd_writemem, ADDRESS_SPACE_PROGRAM, 16 )
1999		AM_RANGE(0x000000, 0x1fffff) AM_WRITE(SMH_ROM                  )   // ROM
2000		AM_RANGE(0x200000, 0x21ffff) AM_WRITE(metro_vram_0_w) AM_BASE(&metro_vram_0   )   // Layer 0
2001		AM_RANGE(0x220000, 0x23ffff) AM_WRITE(metro_vram_1_w) AM_BASE(&metro_vram_1   )   // Layer 1
2002		AM_RANGE(0x240000, 0x25ffff) AM_WRITE(metro_vram_2_w) AM_BASE(&metro_vram_2   )   // Layer 2
2003		AM_RANGE(0x260000, 0x26ffff) AM_WRITE(SMH_NOP            )   // ??????
2004		AM_RANGE(0x270000, 0x273fff) AM_WRITE(paletteram16_GGGGGRRRRRBBBBBx_word_w  ) AM_BASE(&paletteram16   )   // Palette
2005		AM_RANGE(0x274000, 0x274fff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16) AM_SIZE(&spriteram_size            )   // Sprites
2006		AM_RANGE(0x278000, 0x2787ff) AM_WRITE(SMH_RAM) AM_BASE(&metro_tiletable) AM_SIZE(&metro_tiletable_size      )   // Tiles Set
2007		AM_RANGE(0x278860, 0x27886b) AM_WRITE(metro_window_w) AM_BASE(&metro_window            )   // Tilemap Window
2008		AM_RANGE(0x278870, 0x27887b) AM_WRITE(SMH_RAM) AM_BASE(&metro_scroll      )   // Scroll
2009		AM_RANGE(0x278890, 0x278891) AM_WRITE(SMH_NOP                  )   // ? increasing
2010		AM_RANGE(0x2788a2, 0x2788a3) AM_WRITE(metro_irq_cause_w            )   // IRQ Acknowledge
2011		AM_RANGE(0x2788a4, 0x2788a5) AM_WRITE(SMH_RAM) AM_BASE(&metro_irq_enable   )   // IRQ Enable
2012		AM_RANGE(0x2788aa, 0x2788ab) AM_WRITE(SMH_RAM) AM_BASE(&metro_rombank      )   // Rom Bank
2013		AM_RANGE(0x2788ac, 0x2788ad) AM_WRITE(SMH_RAM) AM_BASE(&metro_screenctrl   )   // Screen Control
2014		AM_RANGE(0x279700, 0x279713) AM_WRITE(SMH_RAM) AM_BASE(&metro_videoregs   )   // Video Registers
2015		AM_RANGE(0x400000, 0x43ffff) AM_WRITE(metro_K053936_w) AM_BASE(&metro_K053936_ram   )   // 053936
2016		AM_RANGE(0x500000, 0x500fff) AM_WRITE(SMH_RAM) AM_BASE(&K053936_0_linectrl)   // 053936 line control
2017		AM_RANGE(0x600000, 0x60001f) AM_WRITE(SMH_RAM) AM_BASE(&K053936_0_ctrl   )   // 053936 control
2018		AM_RANGE(0xe00000, 0xe00001) AM_WRITENOP
2019		AM_RANGE(0xe00002, 0xe00003) AM_WRITE(blzntrnd_sound_w)
2020		AM_RANGE(0xff0000, 0xffffff) AM_WRITE(SMH_RAM                  )   // RAM
	1704	AM_RANGE(0x400000, 0x43ffff) AM_RAM_WRITE(metro_K053936_w) AM_BASE(&metro_K053936_ram)   // 053936
	1705	AM_RANGE(0x500000, 0x500fff) AM_WRITEONLY AM_BASE(&K053936_0_linectrl)            // 053936 line control
	1706	AM_RANGE(0x600000, 0x60001f) AM_WRITEONLY AM_BASE(&K053936_0_ctrl)               // 053936 control
	1707
	1708	AM_RANGE(0xe00000, 0xe00001) AM_READ_PORT("DSW0") AM_WRITENOP                  // Inputs
	1709	AM_RANGE(0xe00002, 0xe00003) AM_READ_PORT("DSW1") AM_WRITE(blzntrnd_sound_w)      //
	1710	AM_RANGE(0xe00004, 0xe00005) AM_READ_PORT("IN0")                           //
	1711	AM_RANGE(0xe00006, 0xe00007) AM_READ_PORT("IN1")                           //
	1712	AM_RANGE(0xe00008, 0xe00009) AM_READ_PORT("IN2")                           //
2021	1713	ADDRESS_MAP_END
2022	1714
2023	1715
r4679	r4680
2031	1723	okim6295_set_bank_base(devtag_get_device(device->machine, "oki"), ((data >> 3) & 0x07) * 0x40000);
2032	1724	}
2033	1725
2034		static ADDRESS_MAP_START( mouja_readmem, ADDRESS_SPACE_PROGRAM, 16 )
2035		AM_RANGE(0x000000, 0x07ffff) AM_READ(SMH_ROM            )   // ROM
2036		AM_RANGE(0xf00000, 0xf0ffff) AM_READ(SMH_RAM            )   // RAM
2037		AM_RANGE(0x400000, 0x41ffff) AM_READ(SMH_RAM            )   // Layer 0
2038		AM_RANGE(0x420000, 0x43ffff) AM_READ(SMH_RAM            )   // Layer 1
2039		AM_RANGE(0x440000, 0x45ffff) AM_READ(SMH_RAM            )   // Layer 2
2040		AM_RANGE(0x470000, 0x473fff) AM_READ(SMH_RAM            )   // Palette
2041		AM_RANGE(0x474000, 0x474fff) AM_READ(SMH_RAM            )   // Sprites
2042		AM_RANGE(0x478000, 0x4787ff) AM_READ(SMH_RAM            )   // Tiles Set
2043		AM_RANGE(0x478832, 0x478833) AM_READ(metro_irq_cause_r      )   // IRQ Cause
2044		AM_RANGE(0x478880, 0x478881) AM_READ_PORT("IN0")            // Inputs
2045		AM_RANGE(0x478882, 0x478883) AM_READ_PORT("IN1")            //
2046		AM_RANGE(0x478884, 0x478885) AM_READ_PORT("DSW0")            //
2047		AM_RANGE(0x478886, 0x478887) AM_READ_PORT("IN2")            //
2048		AM_RANGE(0xd00000, 0xd00001) AM_DEVREAD8("oki", okim6295_r, 0x00ff)
2049		#if 0
2050		AM_RANGE(0x460000, 0x46ffff) AM_READ(metro_bankedrom_r      )   // Banked ROM
2051		#endif
2052		ADDRESS_MAP_END
2053
2054		static ADDRESS_MAP_START( mouja_writemem, ADDRESS_SPACE_PROGRAM, 16 )
2055		AM_RANGE(0x000000, 0x07ffff) AM_WRITE(SMH_ROM                  )   // ROM
2056		AM_RANGE(0xf00000, 0xf0ffff) AM_WRITE(SMH_RAM                  )   // RAM
2057		AM_RANGE(0x400000, 0x41ffff) AM_WRITE(metro_vram_0_w) AM_BASE(&metro_vram_0   )   // Layer 0
2058		AM_RANGE(0x420000, 0x43ffff) AM_WRITE(metro_vram_1_w) AM_BASE(&metro_vram_1   )   // Layer 1
2059		AM_RANGE(0x440000, 0x45ffff) AM_WRITE(metro_vram_2_w) AM_BASE(&metro_vram_2   )   // Layer 2
2060		AM_RANGE(0x470000, 0x473fff) AM_WRITE(paletteram16_GGGGGRRRRRBBBBBx_word_w  ) AM_BASE(&paletteram16   )   // Palette
2061		AM_RANGE(0x474000, 0x474fff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16) AM_SIZE(&spriteram_size            )   // Sprites
2062		AM_RANGE(0x478000, 0x4787ff) AM_WRITE(SMH_RAM) AM_BASE(&metro_tiletable) AM_SIZE(&metro_tiletable_size   )   // Tiles Set
2063		AM_RANGE(0x47880e, 0x47880f) AM_WRITE(SMH_RAM) AM_BASE(&metro_screenctrl   )   // Screen Control
2064		AM_RANGE(0x478810, 0x47881f) AM_WRITE(SMH_RAM) AM_BASE(&metro_irq_levels   )   // IRQ Levels
2065		AM_RANGE(0x478820, 0x47882f) AM_WRITE(SMH_RAM) AM_BASE(&metro_irq_vectors   )   // IRQ Vectors
2066		AM_RANGE(0x478830, 0x478831) AM_WRITE(SMH_RAM) AM_BASE(&metro_irq_enable   )   // IRQ Enable
2067		AM_RANGE(0x478832, 0x478833) AM_WRITE(metro_irq_cause_w            )   // IRQ Acknowledge
2068		AM_RANGE(0x478834, 0x478835) AM_WRITE(mouja_irq_timer_ctrl_w      )   // IRQ set timer count
2069		AM_RANGE(0x478836, 0x478837) AM_WRITE(watchdog_reset16_w         )   // Watchdog
2070		AM_RANGE(0x478860, 0x47886b) AM_WRITE(metro_window_w) AM_BASE(&metro_window   )   // Tilemap Window
2071		AM_RANGE(0x478850, 0x47885b) AM_WRITE(SMH_RAM) AM_BASE(&metro_scroll      )   // Scroll Regs
2072		AM_RANGE(0x478888, 0x478889) AM_WRITENOP                        // ??
2073		AM_RANGE(0x479700, 0x479713) AM_WRITE(SMH_RAM) AM_BASE(&metro_videoregs   )   // Video Registers
2074		AM_RANGE(0xc00000, 0xc00003) AM_DEVWRITE8("ym", ym2413_w, 0x00ff)
	1726	static ADDRESS_MAP_START( mouja_map, ADDRESS_SPACE_PROGRAM, 16 )
	1727	AM_RANGE(0x000000, 0x07ffff) AM_ROM                                       // ROM
	1728	AM_RANGE(0xf00000, 0xf0ffff) AM_RAM                                       // RAM
	1729	AM_RANGE(0x400000, 0x41ffff) AM_RAM_WRITE(metro_vram_0_w) AM_BASE(&metro_vram_0   )   // Layer 0
	1730	AM_RANGE(0x420000, 0x43ffff) AM_RAM_WRITE(metro_vram_1_w) AM_BASE(&metro_vram_1   )   // Layer 1
	1731	AM_RANGE(0x440000, 0x45ffff) AM_RAM_WRITE(metro_vram_2_w) AM_BASE(&metro_vram_2   )   // Layer 2
	1732	AM_RANGE(0x470000, 0x473fff) AM_RAM_WRITE(paletteram16_GGGGGRRRRRBBBBBx_word_w) AM_BASE(&paletteram16)   // Palette
	1733	AM_RANGE(0x474000, 0x474fff) AM_RAM AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)   // Sprites
	1734	AM_RANGE(0x478000, 0x4787ff) AM_RAM AM_BASE(&metro_tiletable) AM_SIZE(&metro_tiletable_size)   // Tiles Set
	1735	AM_RANGE(0x47880e, 0x47880f) AM_WRITEONLY AM_BASE(&metro_screenctrl)            // Screen Control
	1736	AM_RANGE(0x478810, 0x47881f) AM_WRITEONLY AM_BASE(&metro_irq_levels)            // IRQ Levels
	1737	AM_RANGE(0x478820, 0x47882f) AM_WRITEONLY AM_BASE(&metro_irq_vectors)            // IRQ Vectors
	1738	AM_RANGE(0x478830, 0x478831) AM_WRITEONLY AM_BASE(&metro_irq_enable)            // IRQ Enable
	1739	AM_RANGE(0x478832, 0x478833) AM_READWRITE(metro_irq_cause_r,metro_irq_cause_w)      // IRQ Cause / IRQ Acknowledge
	1740	AM_RANGE(0x478834, 0x478835) AM_WRITE(mouja_irq_timer_ctrl_w)                  // IRQ set timer count
	1741	AM_RANGE(0x478836, 0x478837) AM_WRITE(watchdog_reset16_w)                     // Watchdog
	1742	AM_RANGE(0x478850, 0x47885b) AM_WRITEONLY AM_BASE(&metro_scroll)               // Scroll Regs
	1743	AM_RANGE(0x478860, 0x47886b) AM_WRITE(metro_window_w) AM_BASE(&metro_window)      // Tilemap Window
	1744	AM_RANGE(0x478880, 0x478881) AM_READ_PORT("IN0")                           // Inputs
	1745	AM_RANGE(0x478882, 0x478883) AM_READ_PORT("IN1")                           //
	1746	AM_RANGE(0x478884, 0x478885) AM_READ_PORT("DSW0")                           //
	1747	AM_RANGE(0x478886, 0x478887) AM_READ_PORT("IN2")                           //
	1748	AM_RANGE(0x478888, 0x478889) AM_WRITENOP                                 // ??
	1749	AM_RANGE(0x479700, 0x479713) AM_WRITEONLY AM_BASE(&metro_videoregs)               // Video Registers
2075	1750	AM_RANGE(0x800000, 0x800001) AM_DEVWRITE("oki", mouja_sound_rombank_w)
2076		AM_RANGE(0xd00000, 0xd00001) AM_DEVWRITE8("oki", okim6295_w, 0xff00)
	1751	AM_RANGE(0xc00000, 0xc00003) AM_DEVWRITE8("ym", ym2413_w, 0x00ff)
	1752	AM_RANGE(0xd00000, 0xd00001) AM_DEVREADWRITE8("oki", okim6295_r,okim6295_w, 0x00ff)
2077	1753	#if 0
2078		AM_RANGE(0x478840, 0x47884d) AM_WRITE(metro_blitter_w) AM_BASE(&metro_blitter_regs   )   // Tiles Blitter
2079		AM_RANGE(0x47883a, 0x47883b) AM_WRITE(SMH_RAM) AM_BASE(&metro_rombank      )   // Rom Bank
2080		AM_RANGE(0x800002, 0x800009) AM_WRITE(metro_coin_lockout_4words_w   )   // Coin Lockout
	1754	AM_RANGE(0x460000, 0x46ffff) AM_READ(metro_bankedrom_r)                        // Banked ROM
	1755	AM_RANGE(0x478840, 0x47884d) AM_WRITE(metro_blitter_w) AM_BASE(&metro_blitter_regs)   // Tiles Blitter
	1756	AM_RANGE(0x47883a, 0x47883b) AM_WRITEONLY AM_BASE(&metro_rombank)               // Rom Bank
	1757	AM_RANGE(0x800002, 0x800009) AM_WRITE(metro_coin_lockout_4words_w)               // Coin Lockout
2081	1758	#endif
2082	1759	ADDRESS_MAP_END
2083	1760
r4679	r4680
2109	1786	AM_RANGE( 0x760000, 0x76ffff ) AM_READ( metro_bankedrom_r )   // Banked ROM
2110	1787
2111	1788	//  AM_RANGE( 0x772000, 0x773fff ) AM_RAM
2112		AM_RANGE( 0x770000, 0x773fff ) AM_READWRITE( SMH_RAM, paletteram16_GGGGGRRRRRBBBBBx_word_w   ) AM_BASE( &paletteram16 )   // Palette
	1789	AM_RANGE( 0x770000, 0x773fff ) AM_RAM_WRITE( paletteram16_GGGGGRRRRRBBBBBx_word_w   ) AM_BASE( &paletteram16 )   // Palette
2113	1790
2114	1791	AM_RANGE( 0x775000, 0x777fff ) AM_RAM
2115	1792
2116		AM_RANGE( 0x778000, 0x7787ff ) AM_READWRITE( SMH_RAM, SMH_RAM )   AM_BASE(&metro_tiletable) AM_SIZE(&metro_tiletable_size      )   // Tiles Set
2117		AM_RANGE( 0x778800, 0x778813 ) AM_WRITE( SMH_RAM )      AM_BASE( &metro_videoregs )   // Video Registers
	1793	AM_RANGE( 0x778000, 0x7787ff ) AM_RAM   AM_BASE(&metro_tiletable) AM_SIZE(&metro_tiletable_size      )   // Tiles Set
	1794	AM_RANGE( 0x778800, 0x778813 ) AM_WRITEONLY      AM_BASE( &metro_videoregs )   // Video Registers
2118	1795	AM_RANGE( 0x778840, 0x77884f ) AM_WRITE( metro_blitter_w )   AM_BASE( &metro_blitter_regs )   // Tiles Blitter
2119	1796	AM_RANGE( 0x778860, 0x77886b ) AM_WRITE( metro_window_w )   AM_BASE( &metro_window )   // Tilemap Window
2120		AM_RANGE( 0x778870, 0x77887b ) AM_WRITE( SMH_RAM )      AM_BASE( &metro_scroll )   // Scroll
2121		AM_RANGE( 0x778890, 0x778891 ) AM_WRITE( SMH_NOP )   // ? increasing
	1797	AM_RANGE( 0x778870, 0x77887b ) AM_WRITEONLY      AM_BASE( &metro_scroll )   // Scroll
	1798	AM_RANGE( 0x778890, 0x778891 ) AM_WRITENOP    // ? increasing
2122	1799	AM_RANGE( 0x7788a2, 0x7788a3 ) AM_WRITE( metro_irq_cause_w )   // IRQ Cause
2123	1800	AM_RANGE( 0x7788a4, 0x7788a5 ) AM_WRITE( puzzlet_irq_enable_w ) AM_BASE( &metro_irq_enable )   // IRQ Enable
2124	1801
2125		AM_RANGE( 0x7788aa, 0x7788ab ) AM_WRITE( SMH_RAM )      AM_BASE( &metro_rombank   )      // Rom Bank
2126		AM_RANGE( 0x7788ac, 0x7788ad ) AM_WRITE( SMH_RAM )      AM_BASE( &metro_screenctrl )   // Screen Control
	1802	AM_RANGE( 0x7788aa, 0x7788ab ) AM_WRITEONLY      AM_BASE( &metro_rombank   )      // Rom Bank
	1803	AM_RANGE( 0x7788ac, 0x7788ad ) AM_WRITEONLY      AM_BASE( &metro_screenctrl )   // Screen Control
2127	1804
2128	1805	AM_RANGE( 0x7f2000, 0x7f3fff ) AM_RAM
2129	1806
r4679	r4680
2141	1818	}
2142	1819
2143	1820	static ADDRESS_MAP_START( puzzlet_io_map, ADDRESS_SPACE_IO, 8 )
2144		AM_RANGE( H8_PORT_7,      H8_PORT_7   )   AM_READ_PORT("IN2")
	1821	AM_RANGE( H8_PORT_7,   H8_PORT_7   )   AM_READ_PORT("IN2")
2145	1822	AM_RANGE( H8_SERIAL_1,   H8_SERIAL_1   )   AM_READ_PORT("IN0")      // coin
2146		AM_RANGE( H8_PORT_B,      H8_PORT_B   )   AM_READ_PORT("DSW0") AM_WRITE( puzzlet_portb_w )
	1823	AM_RANGE( H8_PORT_B,   H8_PORT_B   )   AM_READ_PORT("DSW0") AM_WRITE( puzzlet_portb_w )
2147	1824	ADDRESS_MAP_END
2148	1825
2149	1826
r4679	r4680
3754	3431
3755	3432	/* basic machine hardware */
3756	3433	MDRV_CPU_ADD("maincpu", M68000, 16000000)
3757		MDRV_CPU_PROGRAM_MAP(balcube_readmem,balcube_writemem)
	3434	MDRV_CPU_PROGRAM_MAP(balcube_map,0)
3758	3435	MDRV_CPU_VBLANK_INT_HACK(metro_interrupt,10)   /* ? */
3759	3436
3760	3437	MDRV_MACHINE_RESET(metro)
r4679	r4680
3787	3464
3788	3465	/* basic machine hardware */
3789	3466	MDRV_CPU_ADD("maincpu", M68000, 16000000)
3790		MDRV_CPU_PROGRAM_MAP(daitoa_readmem,daitoa_writemem)
	3467	MDRV_CPU_PROGRAM_MAP(daitoa_map,0)
3791	3468	MDRV_CPU_VBLANK_INT_HACK(metro_interrupt,10)   /* ? */
3792	3469
3793	3470	MDRV_MACHINE_RESET(metro)
r4679	r4680
3819	3496
3820	3497	/* basic machine hardware */
3821	3498	MDRV_CPU_ADD("maincpu", M68000, 16000000)
3822		MDRV_CPU_PROGRAM_MAP(bangball_readmem,bangball_writemem)
	3499	MDRV_CPU_PROGRAM_MAP(bangball_map,0)
3823	3500	MDRV_CPU_VBLANK_INT("screen", bangball_interrupt)
3824	3501
3825	3502	MDRV_MACHINE_RESET(metro)
r4679	r4680
3852	3529
3853	3530	/* basic machine hardware */
3854	3531	MDRV_CPU_ADD("maincpu", M68000, 16000000)
3855		MDRV_CPU_PROGRAM_MAP(batlbubl_readmem,batlbubl_writemem)
	3532	MDRV_CPU_PROGRAM_MAP(batlbubl_map,0)
3856	3533	MDRV_CPU_VBLANK_INT("screen", bangball_interrupt)
3857	3534
3858	3535	MDRV_MACHINE_RESET(metro)
r4679	r4680
3884	3561
3885	3562	/* basic machine hardware */
3886	3563	MDRV_CPU_ADD("maincpu", M68000, 16000000)
3887		MDRV_CPU_PROGRAM_MAP(daitorid_readmem,daitorid_writemem)
	3564	MDRV_CPU_PROGRAM_MAP(daitorid_map,0)
3888	3565	MDRV_CPU_VBLANK_INT_HACK(metro_interrupt,10)   /* ? */
3889	3566
3890	3567	MDRV_CPU_ADD("audiocpu", UPD7810, 12000000)
3891	3568	MDRV_CPU_CONFIG(metro_cpu_config)
3892		MDRV_CPU_PROGRAM_MAP(daitorid_snd_readmem,daitorid_snd_writemem)
3893		MDRV_CPU_IO_MAP(daitorid_snd_readport,daitorid_snd_writeport)
	3569	MDRV_CPU_PROGRAM_MAP(metro_sound_map,0)
	3570	MDRV_CPU_IO_MAP(daitorid_sound_io_map,0)
3894	3571
3895	3572	MDRV_MACHINE_RESET(metro)
3896	3573
r4679	r4680
3927	3604
3928	3605	/* basic machine hardware */
3929	3606	MDRV_CPU_ADD("maincpu", M68000, 12000000)
3930		MDRV_CPU_PROGRAM_MAP(dharma_readmem,dharma_writemem)
	3607	MDRV_CPU_PROGRAM_MAP(dharma_map,0)
3931	3608	MDRV_CPU_VBLANK_INT_HACK(metro_interrupt,10)   /* ? */
3932	3609
3933	3610	MDRV_CPU_ADD("audiocpu", UPD7810, 12000000)
3934	3611	MDRV_CPU_CONFIG(metro_cpu_config)
3935		MDRV_CPU_PROGRAM_MAP(metro_snd_readmem,metro_snd_writemem)
3936		MDRV_CPU_IO_MAP(metro_snd_readport,metro_snd_writeport)
	3612	MDRV_CPU_PROGRAM_MAP(metro_sound_map,0)
	3613	MDRV_CPU_IO_MAP(metro_sound_io_map,0)
3937	3614
3938	3615	MDRV_MACHINE_RESET(metro)
3939	3616
r4679	r4680
3969	3646
3970	3647	/* basic machine hardware */
3971	3648	MDRV_CPU_ADD("maincpu", M68000, 12000000)
3972		MDRV_CPU_PROGRAM_MAP(karatour_readmem,karatour_writemem)
	3649	MDRV_CPU_PROGRAM_MAP(karatour_map,0)
3973	3650	MDRV_CPU_VBLANK_INT_HACK(karatour_interrupt,10)   /* ? */
3974	3651
3975	3652	MDRV_CPU_ADD("audiocpu", UPD7810, 12000000)
3976	3653	MDRV_CPU_CONFIG(metro_cpu_config)
3977		MDRV_CPU_PROGRAM_MAP(metro_snd_readmem,metro_snd_writemem)
3978		MDRV_CPU_IO_MAP(metro_snd_readport,metro_snd_writeport)
	3654	MDRV_CPU_PROGRAM_MAP(metro_sound_map,0)
	3655	MDRV_CPU_IO_MAP(metro_sound_io_map,0)
3979	3656
3980	3657	MDRV_MACHINE_RESET(metro)
3981	3658
r4679	r4680
4011	3688
4012	3689	/* basic machine hardware */
4013	3690	MDRV_CPU_ADD("maincpu", M68000, 12000000)
4014		MDRV_CPU_PROGRAM_MAP(kokushi_readmem,kokushi_writemem)
	3691	MDRV_CPU_PROGRAM_MAP(kokushi_map,0)
4015	3692	MDRV_CPU_VBLANK_INT_HACK(karatour_interrupt,10)   /* ? */
4016	3693
4017	3694	MDRV_CPU_ADD("audiocpu", UPD7810, 12000000)
4018	3695	MDRV_CPU_CONFIG(metro_cpu_config)
4019		MDRV_CPU_PROGRAM_MAP(metro_snd_readmem,metro_snd_writemem)
4020		MDRV_CPU_IO_MAP(metro_snd_readport,metro_snd_writeport)
	3696	MDRV_CPU_PROGRAM_MAP(metro_sound_map,0)
	3697	MDRV_CPU_IO_MAP(metro_sound_io_map,0)
4021	3698
4022	3699	MDRV_MACHINE_RESET(metro)
4023	3700
r4679	r4680
4053	3730
4054	3731	/* basic machine hardware */
4055	3732	MDRV_CPU_ADD("maincpu", M68000, 12000000)
4056		MDRV_CPU_PROGRAM_MAP(lastfort_readmem,lastfort_writemem)
	3733	MDRV_CPU_PROGRAM_MAP(lastfort_map,0)
4057	3734	MDRV_CPU_VBLANK_INT_HACK(metro_interrupt,10)   /* ? */
4058	3735
4059	3736	MDRV_CPU_ADD("audiocpu", UPD7810, 12000000)
4060	3737	MDRV_CPU_CONFIG(metro_cpu_config)
4061		MDRV_CPU_PROGRAM_MAP(metro_snd_readmem,metro_snd_writemem)
4062		MDRV_CPU_IO_MAP(metro_snd_readport,metro_snd_writeport)
	3738	MDRV_CPU_PROGRAM_MAP(metro_sound_map,0)
	3739	MDRV_CPU_IO_MAP(metro_sound_io_map,0)
4063	3740
4064	3741	MDRV_MACHINE_RESET(metro)
4065	3742
r4679	r4680
4094	3771
4095	3772	/* basic machine hardware */
4096	3773	MDRV_CPU_ADD("maincpu", M68000, 12000000)
4097		MDRV_CPU_PROGRAM_MAP(lastforg_readmem,lastforg_writemem)
	3774	MDRV_CPU_PROGRAM_MAP(lastforg_map,0)
4098	3775	MDRV_CPU_VBLANK_INT_HACK(karatour_interrupt,10)   /* ? */
4099	3776
4100	3777	MDRV_CPU_ADD("audiocpu", UPD7810, 12000000)
4101	3778	MDRV_CPU_CONFIG(metro_cpu_config)
4102		MDRV_CPU_PROGRAM_MAP(metro_snd_readmem,metro_snd_writemem)
4103		MDRV_CPU_IO_MAP(metro_snd_readport,metro_snd_writeport)
	3779	MDRV_CPU_PROGRAM_MAP(metro_sound_map,0)
	3780	MDRV_CPU_IO_MAP(metro_sound_io_map,0)
4104	3781
4105	3782	MDRV_MACHINE_RESET(metro)
4106	3783
r4679	r4680
4135	3812
4136	3813	/* basic machine hardware */
4137	3814	MDRV_CPU_ADD("maincpu", M68000, 16000000)
4138		MDRV_CPU_PROGRAM_MAP(dokyusei_readmem,dokyusei_writemem)
	3815	MDRV_CPU_PROGRAM_MAP(dokyusei_map,0)
4139	3816	MDRV_CPU_VBLANK_INT_HACK(dokyusei_interrupt,2)   /* ? */
4140	3817
4141	3818	MDRV_MACHINE_RESET(metro)
r4679	r4680
4185	3862
4186	3863	/* basic machine hardware */
4187	3864	MDRV_CPU_ADD("maincpu", M68000, 16000000)
4188		MDRV_CPU_PROGRAM_MAP(dokyusp_readmem,dokyusp_writemem)
	3865	MDRV_CPU_PROGRAM_MAP(dokyusp_map,0)
4189	3866	MDRV_CPU_VBLANK_INT("screen", gakusai_interrupt)
4190	3867
4191	3868	MDRV_MACHINE_RESET(metro)
r4679	r4680
4223	3900
4224	3901	/* basic machine hardware */
4225	3902	MDRV_CPU_ADD("maincpu", M68000, 16000000)
4226		MDRV_CPU_PROGRAM_MAP(gakusai_readmem,gakusai_writemem)
	3903	MDRV_CPU_PROGRAM_MAP(gakusai_map,0)
4227	3904	MDRV_CPU_VBLANK_INT("screen", gakusai_interrupt)
4228	3905
4229	3906	MDRV_MACHINE_RESET(metro)
r4679	r4680
4261	3938
4262	3939	/* basic machine hardware */
4263	3940	MDRV_CPU_ADD("maincpu", M68000, 16000000)
4264		MDRV_CPU_PROGRAM_MAP(gakusai2_readmem,gakusai2_writemem)
	3941	MDRV_CPU_PROGRAM_MAP(gakusai2_map,0)
4265	3942	MDRV_CPU_VBLANK_INT("screen", gakusai_interrupt)
4266	3943
4267	3944	MDRV_MACHINE_RESET(metro)
r4679	r4680
4299	3976
4300	3977	/* basic machine hardware */
4301	3978	MDRV_CPU_ADD("maincpu", M68000, 12000000)
4302		MDRV_CPU_PROGRAM_MAP(pangpoms_readmem,pangpoms_writemem)
	3979	MDRV_CPU_PROGRAM_MAP(pangpoms_map,0)
4303	3980	MDRV_CPU_VBLANK_INT_HACK(metro_interrupt,10)   /* ? */
4304	3981
4305	3982	MDRV_CPU_ADD("audiocpu", UPD7810, 12000000)
4306	3983	MDRV_CPU_CONFIG(metro_cpu_config)
4307		MDRV_CPU_PROGRAM_MAP(metro_snd_readmem,metro_snd_writemem)
4308		MDRV_CPU_IO_MAP(metro_snd_readport,metro_snd_writeport)
	3984	MDRV_CPU_PROGRAM_MAP(metro_sound_map,0)
	3985	MDRV_CPU_IO_MAP(metro_sound_io_map,0)
4309	3986
4310	3987	MDRV_MACHINE_RESET(metro)
4311	3988
r4679	r4680
4341	4018
4342	4019	/* basic machine hardware */
4343	4020	MDRV_CPU_ADD("maincpu", M68000, 12000000)
4344		MDRV_CPU_PROGRAM_MAP(poitto_readmem,poitto_writemem)
	4021	MDRV_CPU_PROGRAM_MAP(poitto_map,0)
4345	4022	MDRV_CPU_VBLANK_INT_HACK(metro_interrupt,10)   /* ? */
4346	4023
4347	4024	MDRV_CPU_ADD("audiocpu", UPD7810, 12000000)
4348	4025	MDRV_CPU_CONFIG(metro_cpu_config)
4349		MDRV_CPU_PROGRAM_MAP(metro_snd_readmem,metro_snd_writemem)
4350		MDRV_CPU_IO_MAP(metro_snd_readport,metro_snd_writeport)
	4026	MDRV_CPU_PROGRAM_MAP(metro_sound_map,0)
	4027	MDRV_CPU_IO_MAP(metro_sound_io_map,0)
4351	4028
4352	4029	MDRV_MACHINE_RESET(metro)
4353	4030
r4679	r4680
4383	4060
4384	4061	/* basic machine hardware */
4385	4062	MDRV_CPU_ADD("maincpu", M68000, 12000000)
4386		MDRV_CPU_PROGRAM_MAP(pururun_readmem,pururun_writemem)
	4063	MDRV_CPU_PROGRAM_MAP(pururun_map,0)
4387	4064	MDRV_CPU_VBLANK_INT_HACK(metro_interrupt,10)   /* ? */
4388	4065
4389	4066	MDRV_CPU_ADD("audiocpu", UPD7810, 12000000)
4390	4067	MDRV_CPU_CONFIG(metro_cpu_config)
4391		MDRV_CPU_PROGRAM_MAP(daitorid_snd_readmem,daitorid_snd_writemem)
4392		MDRV_CPU_IO_MAP(daitorid_snd_readport,daitorid_snd_writeport)
	4068	MDRV_CPU_PROGRAM_MAP(metro_sound_map,0)
	4069	MDRV_CPU_IO_MAP(daitorid_sound_io_map,0)
4393	4070
4394	4071	MDRV_MACHINE_RESET(metro)
4395	4072
r4679	r4680
4426	4103
4427	4104	/* basic machine hardware */
4428	4105	MDRV_CPU_ADD("maincpu", M68000, 12000000)
4429		MDRV_CPU_PROGRAM_MAP(skyalert_readmem,skyalert_writemem)
	4106	MDRV_CPU_PROGRAM_MAP(skyalert_map,0)
4430	4107	MDRV_CPU_VBLANK_INT_HACK(metro_interrupt,10)   /* ? */
4431	4108
4432	4109	MDRV_CPU_ADD("audiocpu", UPD7810, 12000000)
4433	4110	MDRV_CPU_CONFIG(metro_cpu_config)
4434		MDRV_CPU_PROGRAM_MAP(metro_snd_readmem,metro_snd_writemem)
4435		MDRV_CPU_IO_MAP(metro_snd_readport,metro_snd_writeport)
	4111	MDRV_CPU_PROGRAM_MAP(metro_sound_map,0)
	4112	MDRV_CPU_IO_MAP(metro_sound_io_map,0)
4436	4113
4437	4114	MDRV_MACHINE_RESET(metro)
4438	4115
r4679	r4680
4468	4145
4469	4146	/* basic machine hardware */
4470	4147	MDRV_CPU_ADD("maincpu", M68000, 12000000)
4471		MDRV_CPU_PROGRAM_MAP(toride2g_readmem,toride2g_writemem)
	4148	MDRV_CPU_PROGRAM_MAP(toride2g_map,0)
4472	4149	MDRV_CPU_VBLANK_INT_HACK(metro_interrupt,10)   /* ? */
4473	4150
4474	4151	MDRV_CPU_ADD("audiocpu", UPD7810, 12000000)
4475	4152	MDRV_CPU_CONFIG(metro_cpu_config)
4476		MDRV_CPU_PROGRAM_MAP(metro_snd_readmem,metro_snd_writemem)
4477		MDRV_CPU_IO_MAP(metro_snd_readport,metro_snd_writeport)
	4153	MDRV_CPU_PROGRAM_MAP(metro_sound_map,0)
	4154	MDRV_CPU_IO_MAP(metro_sound_io_map,0)
4478	4155
4479	4156	MDRV_MACHINE_RESET(metro)
4480	4157
r4679	r4680
4510	4187
4511	4188	/* basic machine hardware */
4512	4189	MDRV_CPU_ADD("maincpu", M68000, 12000000)   /* ??? */
4513		MDRV_CPU_PROGRAM_MAP(mouja_readmem,mouja_writemem)
	4190	MDRV_CPU_PROGRAM_MAP(mouja_map,0)
4514	4191	MDRV_CPU_VBLANK_INT("screen", mouja_interrupt)
4515	4192
4516	4193	MDRV_MACHINE_RESET(metro)
r4679	r4680
4546	4223
4547	4224	/* basic machine hardware */
4548	4225	MDRV_CPU_ADD("maincpu", M68000, 16000000)
4549		MDRV_CPU_PROGRAM_MAP(blzntrnd_readmem,blzntrnd_writemem)
	4226	MDRV_CPU_PROGRAM_MAP(blzntrnd_map,0)
4550	4227	MDRV_CPU_VBLANK_INT_HACK(karatour_interrupt,10)   /* ? */
4551	4228
4552	4229	MDRV_CPU_ADD("audiocpu", Z80, 8000000)
4553		MDRV_CPU_PROGRAM_MAP(blzntrnd_sound_readmem, blzntrnd_sound_writemem)
4554		MDRV_CPU_IO_MAP(blzntrnd_sound_readport, blzntrnd_sound_writeport)
	4230	MDRV_CPU_PROGRAM_MAP(blzntrnd_sound_map, 0)
	4231	MDRV_CPU_IO_MAP(blzntrnd_sound_io_map, 0)
4555	4232
4556	4233	MDRV_MACHINE_RESET(metro)
4557	4234
r4679	r4680
4585	4262
4586	4263	/* basic machine hardware */
4587	4264	MDRV_CPU_ADD("maincpu", M68000, 16000000)
4588		MDRV_CPU_PROGRAM_MAP(blzntrnd_readmem,blzntrnd_writemem)
	4265	MDRV_CPU_PROGRAM_MAP(blzntrnd_map,0)
4589	4266	MDRV_CPU_VBLANK_INT_HACK(karatour_interrupt,10)   /* ? */
4590	4267
4591	4268	MDRV_CPU_ADD("audiocpu", Z80, 8000000)
4592		MDRV_CPU_PROGRAM_MAP(blzntrnd_sound_readmem, blzntrnd_sound_writemem)
4593		MDRV_CPU_IO_MAP(blzntrnd_sound_readport, blzntrnd_sound_writeport)
	4269	MDRV_CPU_PROGRAM_MAP(blzntrnd_sound_map, 0)
	4270	MDRV_CPU_IO_MAP(blzntrnd_sound_io_map, 0)
4594	4271
4595	4272	MDRV_MACHINE_RESET(metro)
4596	4273
r4679	r4680
4646	4323
4647	4324	default:
4648	4325	// timer
4649		cpu_set_input_line(device->machine->cpu[0], H8_METRO_TIMER_HACK, HOLD_LINE);
	4326	cputag_set_input_line(device->machine, "maincpu", H8_METRO_TIMER_HACK, HOLD_LINE);
4650	4327	break;
4651	4328	}
4652	4329	}
r4679	r4680
4654	4331
4655	4332	/* basic machine hardware */
4656	4333	MDRV_CPU_ADD("maincpu", H83007, XTAL_20MHz)   // H8/3007 - Hitachi HD6413007F20 CPU. Clock 20MHz
4657
4658	4334	MDRV_CPU_PROGRAM_MAP(puzzlet_map,0)
4659	4335	MDRV_CPU_IO_MAP(puzzlet_io_map,0)
4660	4336	MDRV_CPU_VBLANK_INT_HACK(puzzlet_interrupt, 5)
r4679	r4680
4718	4394
4719	4395	static DRIVER_INIT( metro )
4720	4396	{
4721		const address_space *space = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM);
	4397	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
4722	4398
4723	4399	metro_common();
4724	4400
r4679	r4680
4730	4406
4731	4407	static DRIVER_INIT( karatour )
4732	4408	{
4733		UINT16 *RAM = (UINT16 *)auto_malloc(0x20000*3);
	4409	UINT16 *RAM = auto_alloc_array(machine, UINT16, 0x20000*3/2);
4734	4410	int i;
4735	4411	metro_vram_0 = RAM + (0x20000/2) * 0;
4736	4412	metro_vram_1 = RAM + (0x20000/2) * 1;
r4679	r4680
4743	4419
4744	4420	static DRIVER_INIT( daitorid )
4745	4421	{
4746		const address_space *space = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM);
	4422	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
4747	4423
4748	4424	metro_common();
4749	4425

src/mame/drivers/angelkds.c

r4679	r4680
538	538
539	539	static void irqhandler(const device_config *device, int irq)
540	540	{
541		cpu_set_input_line(device->machine->cpu[1],0,irq ? ASSERT_LINE : CLEAR_LINE);
	541	cputag_set_input_line(device->machine, "sub", 0, irq ? ASSERT_LINE : CLEAR_LINE);
542	542	}
543	543
544	544	static const ym2203_interface ym2203_config =

src/mame/drivers/jrpacman.c

r4679	r4680
106	106
107	107	static WRITE8_HANDLER( jrpacman_interrupt_vector_w )
108	108	{
109		cpu_set_input_line_vector(space->machine->cpu[0], 0, data);
110		cpu_set_input_line(space->machine->cpu[0], 0, CLEAR_LINE);
	109	cpu_set_input_line_vector(cputag_get_cpu(space->machine, "maincpu"), 0, data);
	110	cputag_set_input_line(space->machine, "maincpu", 0, CLEAR_LINE);
111	111	}
112	112
113	113

src/mame/drivers/hshavoc.c

r4679	r4680
37	37	#include "driver.h"
38	38	#include "cpu/z80/z80.h"
39	39	#include "cpu/m68000/m68000.h"
	40	#include "sound/2612intf.h"
	41	#include "sound/sn76496.h"
	42
40	43	#include "genesis.h"
41	44
42	45	#define MASTER_CLOCK      53693100
r4679	r4680
94	97	PORT_DIPSETTING(      0x0000, DEF_STR( On ) )
95	98	INPUT_PORTS_END
96	99
97		static ADDRESS_MAP_START( topshoot_readmem, ADDRESS_SPACE_PROGRAM, 16 )
98		AM_RANGE(0x000000, 0x0fffff) AM_READ(SMH_ROM)               /* Cartridge Program Rom */
99		AM_RANGE(0x202000, 0x2023ff) AM_READ(SMH_RAM)
100		AM_RANGE(0xa00000, 0xa0ffff) AM_READ(genesis_68k_to_z80_r)
101		AM_RANGE(0xc00000, 0xc0001f) AM_READ(genesis_vdp_r)            /* VDP Access */
102		AM_RANGE(0xe00000, 0xe1ffff) AM_READ(SMH_BANK3)
103		AM_RANGE(0xfe0000, 0xfeffff) AM_READ(SMH_BANK4)
104		AM_RANGE(0xff0000, 0xffffff) AM_READ(SMH_RAM)               /* Main Ram */
105		ADDRESS_MAP_END
106
107
108		static ADDRESS_MAP_START( topshoot_writemem, ADDRESS_SPACE_PROGRAM, 16 )
109		AM_RANGE(0x000000, 0x0fffff) AM_WRITE(SMH_ROM)               /* Cartridge Program Rom */
110		//  AM_RANGE(0x200000, 0x20007f) AM_WRITE(SMH_RAM)
111		AM_RANGE(0x200000, 0x2023ff) AM_WRITE(SMH_RAM) // tested
112		AM_RANGE(0xa10000, 0xa1001f) AM_WRITE(genesis_io_w) AM_BASE(&genesis_io_ram)            /* Genesis Input */
	100	static ADDRESS_MAP_START( topshoot_map, ADDRESS_SPACE_PROGRAM, 16 )
	101	AM_RANGE(0x000000, 0x0fffff) AM_ROM                                          /* Cartridge Program Rom */
	102	AM_RANGE(0x200000, 0x201fff) AM_WRITENOP // tested
	103	AM_RANGE(0x202000, 0x2023ff) AM_RAM // tested
	104	AM_RANGE(0xa00000, 0xa0ffff) AM_READWRITE(genesis_68k_to_z80_r, genesis_68k_to_z80_w)
	105	AM_RANGE(0xa10000, 0xa1001f) AM_WRITE(genesis_io_w) AM_BASE(&genesis_io_ram)         /* Genesis Input */
113	106	AM_RANGE(0xa11000, 0xa11203) AM_WRITE(genesis_ctrl_w)
114		AM_RANGE(0xa00000, 0xa0ffff) AM_WRITE(genesis_68k_to_z80_w)
115		AM_RANGE(0xc00000, 0xc0001f) AM_WRITE(genesis_vdp_w)            /* VDP Access */
116		AM_RANGE(0xfe0000, 0xfeffff) AM_WRITE(SMH_BANK4)
117		AM_RANGE(0xff0000, 0xffffff) AM_WRITE(SMH_RAM) AM_BASE(&genesis_68k_ram)/* Main Ram */
	107	AM_RANGE(0xc00000, 0xc0001f) AM_READWRITE(genesis_vdp_r, genesis_vdp_w)               /* VDP Access */
	108	AM_RANGE(0xe00000, 0xe1ffff) AM_ROMBANK(3)
	109	AM_RANGE(0xfe0000, 0xfeffff) AM_RAMBANK(4)
	110	AM_RANGE(0xff0000, 0xffffff) AM_RAM AM_BASE(&genesis_68k_ram)                     /* Main Ram */
118	111	ADDRESS_MAP_END
119	112
120		static ADDRESS_MAP_START( genesis_z80_readmem, ADDRESS_SPACE_PROGRAM, 8 )
121		AM_RANGE(0x0000, 0x1fff) AM_READ(SMH_BANK1)
122		AM_RANGE(0x2000, 0x3fff) AM_READ(SMH_BANK2) /* mirror */
123		AM_RANGE(0x4000, 0x7fff) AM_READ(genesis_z80_r)
124		AM_RANGE(0x8000, 0xffff) AM_READ(genesis_z80_bank_r)
125		ADDRESS_MAP_END
126	113
127		static ADDRESS_MAP_START( genesis_z80_writemem, ADDRESS_SPACE_PROGRAM, 8 )
128		AM_RANGE(0x0000, 0x1fff) AM_WRITE(SMH_BANK1) AM_BASE(&genesis_z80_ram)
129		AM_RANGE(0x2000, 0x3fff) AM_WRITE(SMH_BANK2) /* mirror */
130		AM_RANGE(0x4000, 0x7fff) AM_WRITE(genesis_z80_w)
	114	static ADDRESS_MAP_START( genesis_z80_map, ADDRESS_SPACE_PROGRAM, 8 )
	115	AM_RANGE(0x0000, 0x1fff) AM_RAMBANK(1) AM_BASE(&genesis_z80_ram)
	116	AM_RANGE(0x2000, 0x3fff) AM_RAMBANK(2) /* mirror */
	117	AM_RANGE(0x4000, 0x7fff) AM_READWRITE(genesis_z80_r, genesis_z80_w)
	118	AM_RANGE(0x8000, 0xffff) AM_READ(genesis_z80_bank_r)
131	119	// AM_RANGE(0x8000, 0xffff) AM_WRITE(genesis_z80_bank_w)
132	120	ADDRESS_MAP_END
133	121
r4679	r4680
137	125	MDRV_CPU_ADD("maincpu", M68000, MASTER_CLOCK / 7)
138	126	MDRV_CPU_VBLANK_INT("screen", genesis_vblank_interrupt)
139	127
140		MDRV_CPU_ADD("soundcpu", Z80, MASTER_CLOCK / 15)
141		MDRV_CPU_PROGRAM_MAP(genesis_z80_readmem, genesis_z80_writemem)
	128	MDRV_CPU_ADD("genesis_snd_z80", Z80, MASTER_CLOCK / 15)
	129	MDRV_CPU_PROGRAM_MAP(genesis_z80_map,0)
142	130	MDRV_CPU_VBLANK_INT("screen", irq0_line_hold) /* from vdp at scanline 0xe0 */
143	131
144	132	MDRV_QUANTUM_TIME(HZ(6000))
r4679	r4680
173	161	/* basic machine hardware */
174	162	MDRV_IMPORT_FROM( genesis_base )
175	163	MDRV_CPU_MODIFY("maincpu")
176		MDRV_CPU_PROGRAM_MAP(topshoot_readmem,topshoot_writemem)
	164	MDRV_CPU_PROGRAM_MAP(topshoot_map,0)
177	165
178	166	/* sound hardware */
179	167	MDRV_SOUND_ADD("sn", SN76496, MASTER_CLOCK/15)
r4679	r4680
208	196	static DRIVER_INIT(genesis)
209	197	{
210	198	/* hack -- fix vdp emulation instead */
211		memory_install_read16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xC00004, 0xC00005, 0, 0, vdp_fake_r);
	199	memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xC00004, 0xC00005, 0, 0, vdp_fake_r);
212	200
213	201	memory_set_bankptr(machine, 3, memory_region(machine, "maincpu") );
214	202	memory_set_bankptr(machine, 4, genesis_68k_ram );

src/mame/drivers/circusc.c

r4679	r4680
104	104
105	105	static WRITE8_HANDLER( circusc_sh_irqtrigger_w )
106	106	{
107		cpu_set_input_line_and_vector(space->machine->cpu[1],0,HOLD_LINE,0xff);
	107	cputag_set_input_line_and_vector(space->machine, "audiocpu", 0, HOLD_LINE, 0xff);
108	108	}
109	109
110	110	static WRITE8_HANDLER( circusc_coin_counter_w )
r4679	r4680
154	154
155	155
156	156
157		static ADDRESS_MAP_START( readmem, ADDRESS_SPACE_PROGRAM, 8 )
158		AM_RANGE(0x1000, 0x1000) AM_MIRROR(0x03fc) AM_READ_PORT("SYSTEM")
159		AM_RANGE(0x1001, 0x1001) AM_MIRROR(0x03fc) AM_READ_PORT("P1")
160		AM_RANGE(0x1002, 0x1002) AM_MIRROR(0x03fc) AM_READ_PORT("P2")
161		AM_RANGE(0x1003, 0x1003) AM_MIRROR(0x03fc) AM_READNOP              /* unpopulated DIPSW 3*/
162		AM_RANGE(0x1400, 0x1400) AM_MIRROR(0x03ff) AM_READ_PORT("DSW1")
163		AM_RANGE(0x1800, 0x1800) AM_MIRROR(0x03ff) AM_READ_PORT("DSW2")
164		AM_RANGE(0x2000, 0x2fff) AM_READ(SMH_RAM)
165		AM_RANGE(0x3000, 0x33ff) AM_READ(SMH_RAM) /* colorram */
166		AM_RANGE(0x3400, 0x37ff) AM_READ(SMH_RAM) /* videoram */
167		AM_RANGE(0x3800, 0x38ff) AM_READ(SMH_RAM) /* spriteram2 */
168		AM_RANGE(0x3900, 0x39ff) AM_READ(SMH_RAM) /* spriteram */
169		AM_RANGE(0x3a00, 0x3fff) AM_READ(SMH_RAM)
170		AM_RANGE(0x6000, 0xffff) AM_READ(SMH_ROM)
171		ADDRESS_MAP_END
172
173		static ADDRESS_MAP_START( writemem, ADDRESS_SPACE_PROGRAM, 8 )
	157	static ADDRESS_MAP_START( circusc_map, ADDRESS_SPACE_PROGRAM, 8 )
174	158	AM_RANGE(0x0000, 0x0000) AM_MIRROR(0x03f8) AM_WRITE(circusc_flipscreen_w)      /* FLIP */
175	159	AM_RANGE(0x0001, 0x0001) AM_MIRROR(0x03f8) AM_WRITE(interrupt_enable_w)         /* INTST */
176	160	//  AM_RANGE(0x0002, 0x0002) AM_MIRROR(0x03f8) AM_WRITENOP                          /* MUT - not used /*
r4679	r4680
179	163	AM_RANGE(0x0400, 0x0400) AM_MIRROR(0x03ff) AM_WRITE(watchdog_reset_w)         /* WDOG */
180	164	AM_RANGE(0x0800, 0x0800) AM_MIRROR(0x03ff) AM_WRITE(soundlatch_w)            /* SOUND DATA */
181	165	AM_RANGE(0x0c00, 0x0c00) AM_MIRROR(0x03ff) AM_WRITE(circusc_sh_irqtrigger_w)   /* SOUND-ON causes interrupt on audio CPU */
	166	AM_RANGE(0x1000, 0x1000) AM_MIRROR(0x03fc) AM_READ_PORT("SYSTEM")
	167	AM_RANGE(0x1001, 0x1001) AM_MIRROR(0x03fc) AM_READ_PORT("P1")
	168	AM_RANGE(0x1002, 0x1002) AM_MIRROR(0x03fc) AM_READ_PORT("P2")
	169	AM_RANGE(0x1003, 0x1003) AM_MIRROR(0x03fc) AM_READNOP              /* unpopulated DIPSW 3*/
	170	AM_RANGE(0x1400, 0x1400) AM_MIRROR(0x03ff) AM_READ_PORT("DSW1")
	171	AM_RANGE(0x1800, 0x1800) AM_MIRROR(0x03ff) AM_READ_PORT("DSW2")
182	172	AM_RANGE(0x1c00, 0x1c00) AM_MIRROR(0x03ff) AM_WRITE(SMH_RAM) AM_BASE(&circusc_scroll) /* VGAP */
183		AM_RANGE(0x2000, 0x2fff) AM_WRITE(SMH_RAM)
184		AM_RANGE(0x3000, 0x33ff) AM_WRITE(circusc_colorram_w) AM_BASE(&circusc_colorram)
185		AM_RANGE(0x3400, 0x37ff) AM_WRITE(circusc_videoram_w) AM_BASE(&circusc_videoram)
186		AM_RANGE(0x3800, 0x38ff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram_2)
187		AM_RANGE(0x3900, 0x39ff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
188		AM_RANGE(0x3a00, 0x3fff) AM_WRITE(SMH_RAM)
189		AM_RANGE(0x6000, 0xffff) AM_WRITE(SMH_ROM)
	173	AM_RANGE(0x2000, 0x2fff) AM_RAM
	174	AM_RANGE(0x3000, 0x33ff) AM_RAM_WRITE(circusc_colorram_w) AM_BASE(&circusc_colorram) /* colorram */
	175	AM_RANGE(0x3400, 0x37ff) AM_RAM_WRITE(circusc_videoram_w) AM_BASE(&circusc_videoram) /* videoram */
	176	AM_RANGE(0x3800, 0x38ff) AM_RAM AM_BASE(&spriteram_2) /* spriteram2 */
	177	AM_RANGE(0x3900, 0x39ff) AM_RAM AM_BASE(&spriteram) AM_SIZE(&spriteram_size) /* spriteram */
	178	AM_RANGE(0x3a00, 0x3fff) AM_RAM
	179	AM_RANGE(0x6000, 0xffff) AM_ROM
190	180	ADDRESS_MAP_END
191	181
192		static ADDRESS_MAP_START( sound_readmem, ADDRESS_SPACE_PROGRAM, 8 )
193		AM_RANGE(0x0000, 0x3fff) AM_READ(SMH_ROM)
194		AM_RANGE(0x4000, 0x43ff) AM_MIRROR(0x1c00) AM_READ(SMH_RAM)
	182	static ADDRESS_MAP_START( sound_map, ADDRESS_SPACE_PROGRAM, 8 )
	183	AM_RANGE(0x0000, 0x3fff) AM_ROM
	184	AM_RANGE(0x4000, 0x43ff) AM_MIRROR(0x1c00) AM_RAM
195	185	AM_RANGE(0x6000, 0x6000) AM_MIRROR(0x1fff) AM_READ(soundlatch_r)      /* CS0 */
196	186	AM_RANGE(0x8000, 0x8000) AM_MIRROR(0x1fff) AM_READ(circusc_sh_timer_r)   /* CS1 */
197		ADDRESS_MAP_END
198
199		static ADDRESS_MAP_START( sound_writemem, ADDRESS_SPACE_PROGRAM, 8 )
200		AM_RANGE(0x0000, 0x3fff) AM_WRITE(SMH_ROM)
201		AM_RANGE(0x4000, 0x43ff) AM_MIRROR(0x1c00) AM_WRITE(SMH_RAM)
202	187	AM_RANGE(0xa000, 0xa07f) AM_MIRROR(0x1f80) AM_WRITE(circusc_sound_w)   /* CS2 - CS6 */
203	188	ADDRESS_MAP_END
204	189
r4679	r4680
359	344
360	345	/* basic machine hardware */
361	346	MDRV_CPU_ADD("maincpu", M6809, 2048000)        /* 2 MHz */
362		MDRV_CPU_PROGRAM_MAP(readmem,writemem)
	347	MDRV_CPU_PROGRAM_MAP(circusc_map,0)
363	348	MDRV_CPU_VBLANK_INT("screen", irq0_line_hold)
364	349	MDRV_WATCHDOG_VBLANK_INIT(8)
365	350
366	351	MDRV_CPU_ADD("audiocpu", Z80,14318180/4)     /* Z80 Clock is derived from a 14.31818 MHz crystal */
367		MDRV_CPU_PROGRAM_MAP(sound_readmem,sound_writemem)
	352	MDRV_CPU_PROGRAM_MAP(sound_map,0)
368	353
369	354	MDRV_MACHINE_START(circusc)
370	355	MDRV_MACHINE_RESET(circusc)

src/mame/drivers/laserbas.c

r4679	r4680
25	25
26	26	static VIDEO_START(laserbas)
27	27	{
28		vram1=auto_malloc(0x8000);
29		vram2=auto_malloc(0x8000);
	28	vram1=auto_alloc_array(machine, UINT8, 0x8000);
	29	vram2=auto_alloc_array(machine, UINT8, 0x8000);
30	30	}
31	31
32	32	static VIDEO_UPDATE(laserbas)

src/mame/drivers/nightgal.c

r4679	r4680
36	36
37	37	static VIDEO_START( nightgal )
38	38	{
39		blit_buffer = auto_malloc(256*256);
	39	blit_buffer = auto_alloc_array(machine, UINT8, 256*256);
40	40	}
41	41
42	42	static VIDEO_UPDATE( nightgal )
r4679	r4680
193	193	}
194	194	}
195	195	//printf("%02x %02x %02x %02x %02x %02x %02x\n",true_blit[0],true_blit[1],true_blit[2],true_blit[3],true_blit[4],true_blit[5],true_blit[6]);
196		//cpu_set_input_line(space->machine->cpu[0], INPUT_LINE_NMI, PULSE_LINE );
	196	//cputag_set_input_line(space->machine, "maincpu", INPUT_LINE_NMI, PULSE_LINE );
197	197	}
198	198	}
199	199	}
r4679	r4680
270	270
271	271	static WRITE8_HANDLER( nsc_latch_w )
272	272	{
273		cpu_set_input_line(space->machine->cpu[1], 0, HOLD_LINE );
	273	cputag_set_input_line(space->machine, "sub", 0, HOLD_LINE );
274	274	}
275	275
276	276	static READ8_HANDLER( nsc_latch_r )

src/mame/drivers/maygayv1.c

r4679	r4680
636	636
637	637	// Active low
638	638	if (!(vsync_latch_preset))
639		cpu_set_input_line(space->machine->cpu[0], 3, CLEAR_LINE);
	639	cputag_set_input_line(space->machine, "maincpu", 3, CLEAR_LINE);
640	640	}
641	641
642	642	static ADDRESS_MAP_START( main_map, ADDRESS_SPACE_PROGRAM, 16 )
r4679	r4680
702	702	return 0;
703	703	}
704	704
705		case 3: upd7759_busy_r(0) ? 0 : 0x08;
	705	case 3: return upd7759_busy_r(0) ? 0 : 0x08;
706	706	}
707	707	return 0;
708	708	}
r4679	r4680
895	895
896	896	static void duart_irq_handler(const device_config *device, UINT8 vector)
897	897	{
898		cpu_set_input_line_and_vector(device->machine->cpu[0], 5, ASSERT_LINE, vector);
899		//  cpu_set_input_line(device->machine->cpu[0], 5, state ? ASSERT_LINE : CLEAR_LINE);
	898	cputag_set_input_line_and_vector(device->machine, "maincpu", 5, ASSERT_LINE, vector);
	899	//  cputag_set_input_line(device->machine, "maincpu", 5, state ? ASSERT_LINE : CLEAR_LINE);
900	900	};
901	901
902	902	static int d68681_val;
r4679	r4680
906	906	if (channel == 0)
907	907	{
908	908	d68681_val = data;
909		cpu_set_input_line(device->machine->cpu[1], MCS51_RX_LINE, ASSERT_LINE);  // ?
	909	cputag_set_input_line(device->machine, "soundcpu", MCS51_RX_LINE, ASSERT_LINE);  // ?
910	910	}
911	911
912	912	};
r4679	r4680
962	962
963	963	static MACHINE_START( maygayv1 )
964	964	{
965		i82716.dram = auto_malloc(0x80000);   // ???
966		i82716.line_buf = auto_malloc(512);
	965	i82716.dram = auto_alloc_array(machine, UINT16, 0x80000/2);   // ???
	966	i82716.line_buf = auto_alloc_array(machine, UINT8, 512);
967	967
968	968	state_save_register_global_pointer(machine, i82716.dram, 0x40000);
969	969
970	970	//  duart_68681_init(DUART_CLOCK, duart_irq_handler, duart_tx);
971	971
972		i8051_set_serial_tx_callback(machine->cpu[1], data_from_i8031);
973		i8051_set_serial_rx_callback(machine->cpu[1], data_to_i8031);
	972	i8051_set_serial_tx_callback(cputag_get_cpu(machine, "soundcpu"), data_from_i8031);
	973	i8051_set_serial_rx_callback(cputag_get_cpu(machine, "soundcpu"), data_to_i8031);
974	974	}
975	975
976	976	static MACHINE_RESET( maygayv1 )
r4679	r4680
985	985	static INTERRUPT_GEN( vsync_interrupt )
986	986	{
987	987	if (vsync_latch_preset)
988		cpu_set_input_line(device->machine->cpu[0], 3, ASSERT_LINE);
	988	cputag_set_input_line(device->machine, "maincpu", 3, ASSERT_LINE);
989	989	}
990	990
991	991

src/mame/drivers/mikie.c

r4679	r4680
51	51	if (last == 0 && data == 1)
52	52	{
53	53	// setting bit 0 low then high triggers IRQ on the sound CPU
54		cpu_set_input_line_and_vector(space->machine->cpu[1], 0, HOLD_LINE, 0xff);
	54	cputag_set_input_line_and_vector(space->machine, "audiocpu", 0, HOLD_LINE, 0xff);
55	55	}
56	56
57	57	last = data;

src/mame/drivers/kingpin.c

r4679	r4680
127	127
128	128	static void vdp_interrupt (running_machine *machine, int state)
129	129	{
130		cpu_set_input_line(machine->cpu[0],0, HOLD_LINE);
	130	cputag_set_input_line(machine, "maincpu", 0, HOLD_LINE);
131	131	}
132	132
133	133	static const TMS9928a_interface tms9928a_interface =

src/mame/drivers/midvunit.c

r4679	r4680
74	74	dcs_reset_w(0);
75	75
76	76	memcpy(ram_base, memory_region(machine, "user1"), 0x20000*4);
77		device_reset(machine->cpu[0]);
	77	device_reset(cputag_get_cpu(machine, "maincpu"));
78	78
79	79	timer[0] = timer_alloc(machine, NULL, NULL);
80	80	timer[1] = timer_alloc(machine, NULL, NULL);
r4679	r4680
87	87	dcs_reset_w(0);
88	88
89	89	memcpy(ram_base, memory_region(machine, "user1"), 0x20000*4);
90		device_reset(machine->cpu[0]);
	90	device_reset(cputag_get_cpu(machine, "maincpu"));
91	91
92	92	timer[0] = timer_alloc(machine, NULL, NULL);
93	93	timer[1] = timer_alloc(machine, NULL, NULL);
r4679	r4680
135	135	{
136	136	if (!(control_data & 0x40))
137	137	{
138		cpu_set_input_line(space->machine->cpu[0], 3, CLEAR_LINE);
	138	cputag_set_input_line(space->machine, "maincpu", 3, CLEAR_LINE);
139	139	return adc_data << adc_shift;
140	140	}
141	141	else
r4679	r4680
146	146
147	147	static TIMER_CALLBACK( adc_ready )
148	148	{
149		cpu_set_input_line(machine->cpu[0], 3, ASSERT_LINE);
	149	cputag_set_input_line(machine, "maincpu", 3, ASSERT_LINE);
150	150	}
151	151
152	152
r4679	r4680
292	292
293	293	/* bit 0x200 selects internal clocking, which is 1/2 the main CPU clock rate */
294	294	if (data & 0x200)
295		timer_rate = (double)(cpu_get_clock(space->machine->cpu[0]) * 0.5);
	295	timer_rate = (double)(cputag_get_clock(space->machine, "maincpu") * 0.5);
296	296	else
297	297	timer_rate = 10000000.;
298	298	}
r4679	r4680
1329	1329	ROM_END
1330	1330
1331	1331
	1332	ROM_START( crusnw17 ) /* Version 1.7, Fri Jan 24 1997 - 16:23:59 */
	1333	ROM_REGION16_LE( 0x1000000, "dcs", ROMREGION_ERASEFF )   /* sound data */
	1334	ROM_LOAD16_BYTE( "cwld.u2",  0x000000, 0x80000, CRC(7a233c89) SHA1(ecfad4bc48a69cd3399e3b3266c81574082e0169) )
	1335	ROM_LOAD16_BYTE( "cwld.u3",  0x200000, 0x80000, CRC(be9a5ff0) SHA1(98d69dbfa6aa8462cdd46772e991ee418b79c653) )
	1336	ROM_LOAD16_BYTE( "cwld.u4",  0x400000, 0x80000, CRC(69f02d84) SHA1(0fb4ff750de78505f241ae6cd18fccf3ddf4223f) )
	1337	ROM_LOAD16_BYTE( "cwld.u5",  0x600000, 0x80000, CRC(9d0b9071) SHA1(05edf9073399a942a9d0b969274a7ebf4ca677da) )
	1338	ROM_LOAD16_BYTE( "cwld.u6",  0x800000, 0x80000, CRC(df28f492) SHA1(c61f3870f59458b7bb5efbf93d697e3fa44a7830) )
	1339	ROM_LOAD16_BYTE( "cwld.u7",  0xa00000, 0x80000, CRC(0128913e) SHA1(c11bc115877310c17f9b57f72b29d19b0ad71afa) )
	1340	ROM_LOAD16_BYTE( "cwld.u8",  0xc00000, 0x80000, CRC(5127c08e) SHA1(4f0eae73817270fa156829100b66f0ff88fa422c) )
	1341	ROM_LOAD16_BYTE( "cwld.u9",  0xe00000, 0x80000, CRC(84cdc781) SHA1(62287aa72903698d1890908adde53c39f8bd200c) )
	1342
	1343	ROM_REGION32_LE( 0x1000000, "user1", 0 )
	1344	ROM_LOAD32_BYTE( "crusnw17.u10", 0x0000000, 0x100000, CRC(afca0f15) SHA1(52ed51e31ba7f8ac1a71a7bdb64733b6e95b0669) )
	1345	ROM_LOAD32_BYTE( "crusnw17.u11", 0x0000001, 0x100000, CRC(6610af52) SHA1(c6ab7f369bd0b05e0ce28c7829b870f5b6ddf12f) )
	1346	ROM_LOAD32_BYTE( "crusnw17.u12", 0x0000002, 0x100000, CRC(ef0107b1) SHA1(350017ab56c220516dda53c8323eaf82d7dee8dd) )
	1347	ROM_LOAD32_BYTE( "crusnw17.u13", 0x0000003, 0x100000, CRC(c1d68aa0) SHA1(07d5ec75d921935474a9de738b1b7e9cb0748483) )
	1348	ROM_LOAD32_BYTE( "cwld.u14",     0x0400000, 0x100000, CRC(ee815091) SHA1(fb8a99bae07f42966f76a3bb073d7d8280d8efcb) )
	1349	ROM_LOAD32_BYTE( "cwld.u15",     0x0400001, 0x100000, CRC(e2da7bf1) SHA1(9d9a80055ee62476f47c95e30ec9a989d5d0e25b) )
	1350	ROM_LOAD32_BYTE( "cwld.u16",     0x0400002, 0x100000, CRC(05a7ad2f) SHA1(4bdfde671379ecefa3f8ceb6fc06e8df5d70fc22) )
	1351	ROM_LOAD32_BYTE( "cwld.u17",     0x0400003, 0x100000, CRC(d6278c0c) SHA1(3e152d755d69903718a84d4154e442a31026f3d8) )
	1352	ROM_LOAD32_BYTE( "cwld.u18",     0x0800000, 0x100000, CRC(e2dc2733) SHA1(c277643548c03d831a3b091f1a311accac9d106b) )
	1353	ROM_LOAD32_BYTE( "cwld.u19",     0x0800001, 0x100000, CRC(5223a070) SHA1(90ce48b2308fa9e7cb636c4732b20b8e177aa9b1) )
	1354	ROM_LOAD32_BYTE( "cwld.u20",     0x0800002, 0x100000, CRC(db535625) SHA1(599ccd6bcfb155eb68ac131de4af524510ab35b7) )
	1355	ROM_LOAD32_BYTE( "cwld.u21",     0x0800003, 0x100000, CRC(92a080e8) SHA1(e5e0faf820b5870a81f121b6ad4c37a9081724e4) )
	1356	ROM_LOAD32_BYTE( "cwld.u22",     0x0c00000, 0x100000, CRC(77c56318) SHA1(52344038942c83f3ce82f3169a345ceb86e43dcb) )
	1357	ROM_LOAD32_BYTE( "cwld.u23",     0x0c00001, 0x100000, CRC(6b920fc7) SHA1(993da81181f24075e1aead7c4b374f36dd86a9c3) )
	1358	ROM_LOAD32_BYTE( "cwld.u24",     0x0c00002, 0x100000, CRC(83485401) SHA1(58407818a82a7a3657530dcda7e373e678b58ab2) )
	1359	ROM_LOAD32_BYTE( "cwld.u25",     0x0c00003, 0x100000, CRC(0dad97a9) SHA1(cdb0c02da35243b118e37ff1519aa6ee1a79d06d) )
	1360	ROM_END
	1361
	1362
1332	1363	ROM_START( crusnw13 ) /* Version 1.3, Mon Nov 25 1996 - 23:22:45 */
1333	1364	ROM_REGION16_LE( 0x1000000, "dcs", ROMREGION_ERASEFF )   /* sound data */
1334	1365	ROM_LOAD16_BYTE( "cwld.u2",  0x000000, 0x80000, CRC(7a233c89) SHA1(ecfad4bc48a69cd3399e3b3266c81574082e0169) )
r4679	r4680
1530	1561	adc_shift = 24;
1531	1562
1532	1563	/* speedups */
1533		generic_speedup = memory_install_read32_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), speedup, speedup + 1, 0, 0, generic_speedup_r);
	1564	generic_speedup = memory_install_read32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), speedup, speedup + 1, 0, 0, generic_speedup_r);
1534	1565	}
1535	1566	static DRIVER_INIT( crusnusa ) { init_crusnusa_common(machine, 0xc93e); }
1536	1567	static DRIVER_INIT( crusnu40 ) { init_crusnusa_common(machine, 0xc957); }
r4679	r4680
1543	1574	adc_shift = 16;
1544	1575
1545	1576	/* control register is different */
1546		memory_install_write32_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x994000, 0x994000, 0, 0, crusnwld_control_w);
	1577	memory_install_write32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x994000, 0x994000, 0, 0, crusnwld_control_w);
1547	1578
1548	1579	/* valid values are 450 or 460 */
1549	1580	midway_serial_pic_init(machine, 450);
1550		memory_install_read32_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x991030, 0x991030, 0, 0, offroadc_serial_status_r);
1551		memory_install_read32_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x996000, 0x996000, 0, 0, offroadc_serial_data_r);
1552		memory_install_write32_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x996000, 0x996000, 0, 0, offroadc_serial_data_w);
	1581	memory_install_read32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x991030, 0x991030, 0, 0, offroadc_serial_status_r);
	1582	memory_install_read32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x996000, 0x996000, 0, 0, offroadc_serial_data_r);
	1583	memory_install_write32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x996000, 0x996000, 0, 0, offroadc_serial_data_w);
1553	1584
1554	1585	/* install strange protection device */
1555		memory_install_read32_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x9d0000, 0x9d1fff, 0, 0, bit_data_r);
1556		memory_install_write32_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x9d0000, 0x9d0000, 0, 0, bit_reset_w);
	1586	memory_install_read32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x9d0000, 0x9d1fff, 0, 0, bit_data_r);
	1587	memory_install_write32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x9d0000, 0x9d0000, 0, 0, bit_reset_w);
1557	1588
1558	1589	/* speedups */
1559	1590	if (speedup)
1560		generic_speedup = memory_install_read32_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), speedup, speedup + 1, 0, 0, generic_speedup_r);
	1591	generic_speedup = memory_install_read32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), speedup, speedup + 1, 0, 0, generic_speedup_r);
1561	1592	}
1562	1593	static DRIVER_INIT( crusnwld ) { init_crusnwld_common(machine, 0xd4c0); }
1563	1594	#if 0
r4679	r4680
1571	1602	adc_shift = 16;
1572	1603
1573	1604	/* control register is different */
1574		memory_install_write32_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x994000, 0x994000, 0, 0, crusnwld_control_w);
	1605	memory_install_write32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x994000, 0x994000, 0, 0, crusnwld_control_w);
1575	1606
1576	1607	/* valid values are 230 or 234 */
1577	1608	midway_serial_pic2_init(machine, 230, 94);
1578		memory_install_read32_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x991030, 0x991030, 0, 0, offroadc_serial_status_r);
1579		memory_install_readwrite32_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x996000, 0x996000, 0, 0, offroadc_serial_data_r, offroadc_serial_data_w);
	1609	memory_install_read32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x991030, 0x991030, 0, 0, offroadc_serial_status_r);
	1610	memory_install_readwrite32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x996000, 0x996000, 0, 0, offroadc_serial_data_r, offroadc_serial_data_w);
1580	1611
1581	1612	/* speedups */
1582		generic_speedup = memory_install_read32_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x195aa, 0x195aa, 0, 0, generic_speedup_r);
	1613	generic_speedup = memory_install_read32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x195aa, 0x195aa, 0, 0, generic_speedup_r);
1583	1614	}
1584	1615
1585	1616
r4679	r4680
1604	1635	midway_serial_pic2_set_default_nvram(default_nvram);
1605	1636
1606	1637	/* speedups */
1607		generic_speedup = memory_install_read32_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x2f4c, 0x2f4c, 0, 0, generic_speedup_r);
	1638	generic_speedup = memory_install_read32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x2f4c, 0x2f4c, 0, 0, generic_speedup_r);
1608	1639	}
1609	1640
1610	1641
r4679	r4680
1621	1652	GAME( 1996, crusnwld, 0,        midvunit, crusnwld, crusnwld, ROT0, "Midway", "Cruis'n World (rev L2.4)", GAME_SUPPORTS_SAVE )
1622	1653	GAME( 1996, crusnw23, crusnwld, midvunit, crusnwld, crusnwld, ROT0, "Midway", "Cruis'n World (rev L2.3)", GAME_SUPPORTS_SAVE )
1623	1654	GAME( 1996, crusnw20, crusnwld, midvunit, crusnwld, crusnwld, ROT0, "Midway", "Cruis'n World (rev L2.0)", GAME_SUPPORTS_SAVE )
	1655	GAME( 1996, crusnw17, crusnwld, midvunit, crusnwld, crusnwld, ROT0, "Midway", "Cruis'n World (rev L1.7)", GAME_SUPPORTS_SAVE )
1624	1656	GAME( 1996, crusnw13, crusnwld, midvunit, crusnwld, crusnwld, ROT0, "Midway", "Cruis'n World (rev L1.3)", GAME_SUPPORTS_SAVE )
1625	1657	GAME( 1997, offroadc, 0,        midvunit, offroadc, offroadc, ROT0, "Midway", "Off Road Challenge (v1.40)", GAME_NOT_WORKING | GAME_SUPPORTS_SAVE )
1626	1658	GAME( 1997, offrodc3, offroadc, midvunit, offroadc, offroadc, ROT0, "Midway", "Off Road Challenge (v1.30)", GAME_NOT_WORKING | GAME_SUPPORTS_SAVE )

src/mame/drivers/usgames.c

r4679	r4680
25	25
26	26	#include "driver.h"
27	27	#include "cpu/m6809/m6809.h"
28		#include "deprecat.h"
29	28	#include "video/mc6845.h"
30	29	#include "sound/ay8910.h"
31	30
r4679	r4680
83	82	AM_RANGE(0x2400, 0x2401) AM_DEVWRITE("ay", ay8910_address_data_w)
84	83	AM_RANGE(0x2800, 0x2fff) AM_RAM_WRITE(usgames_charram_w) AM_BASE(&usgames_charram)
85	84	AM_RANGE(0x3000, 0x3fff) AM_RAM_WRITE(usgames_videoram_w) AM_BASE(&usgames_videoram)
86		AM_RANGE(0x4000, 0x7fff) AM_READWRITE(SMH_BANK1, SMH_ROM)
	85	AM_RANGE(0x4000, 0x7fff) AM_READWRITE(SMH_BANK(1), SMH_ROM)
87	86	AM_RANGE(0x8000, 0xffff) AM_ROM
88	87	ADDRESS_MAP_END
89	88
r4679	r4680
102	101	AM_RANGE(0x2470, 0x2470) AM_READ_PORT("UNK2")
103	102	AM_RANGE(0x2800, 0x2fff) AM_RAM_WRITE(usgames_charram_w) AM_BASE(&usgames_charram)
104	103	AM_RANGE(0x3000, 0x3fff) AM_RAM_WRITE(usgames_videoram_w) AM_BASE(&usgames_videoram)
105		AM_RANGE(0x4000, 0x7fff) AM_READWRITE(SMH_BANK1, SMH_ROM)
	104	AM_RANGE(0x4000, 0x7fff) AM_READWRITE(SMH_BANK(1), SMH_ROM)
106	105	AM_RANGE(0x8000, 0xffff) AM_ROM
107	106	ADDRESS_MAP_END
108	107
r4679	r4680
241	240	/* basic machine hardware */
242	241	MDRV_CPU_ADD("maincpu", M6809, 2000000) /* ?? */
243	242	MDRV_CPU_PROGRAM_MAP(usgames_map,0)
244		MDRV_CPU_VBLANK_INT_HACK(irq0_line_hold,5) /* ?? */
	243	MDRV_CPU_PERIODIC_INT(irq0_line_hold,5*60) /* ?? */
245	244
246	245	MDRV_NVRAM_HANDLER(generic_0fill)
247	246

src/mame/drivers/opwolf.c

r4679	r4680
201	201	***********************************************************/
202	202
203	203
204		static ADDRESS_MAP_START( opwolf_readmem, ADDRESS_SPACE_PROGRAM, 16 )
205		AM_RANGE(0x000000, 0x03ffff) AM_READ(SMH_ROM)
	204	static ADDRESS_MAP_START( opwolf_map, ADDRESS_SPACE_PROGRAM, 16 )
	205	AM_RANGE(0x000000, 0x03ffff) AM_ROM
206	206	AM_RANGE(0x0f0000, 0x0f07ff) AM_MIRROR(0xf000) AM_READ(opwolf_cchip_data_r)
207	207	AM_RANGE(0x0f0802, 0x0f0803) AM_MIRROR(0xf000) AM_READ(opwolf_cchip_status_r)
208		AM_RANGE(0x100000, 0x107fff) AM_READ(SMH_RAM)   /* RAM */
209		AM_RANGE(0x200000, 0x200fff) AM_READ(SMH_RAM)
210		AM_RANGE(0x380000, 0x380003) AM_READ(opwolf_dsw_r)   /* dip switches */
211		AM_RANGE(0x3a0000, 0x3a0003) AM_READ(opwolf_lightgun_r)   /* lightgun, read at $11e0/6 */
212		AM_RANGE(0x3e0000, 0x3e0001) AM_READNOP
213		AM_RANGE(0x3e0002, 0x3e0003) AM_READ8(taitosound_comm_r, 0xff00)
214		AM_RANGE(0xc00000, 0xc0ffff) AM_READ(PC080SN_word_0_r)
215		AM_RANGE(0xd00000, 0xd03fff) AM_READ(PC090OJ_word_0_r)   /* sprite ram */
216		ADDRESS_MAP_END
217
218		static ADDRESS_MAP_START( opwolf_writemem, ADDRESS_SPACE_PROGRAM, 16 )
219		AM_RANGE(0x000000, 0x03ffff) AM_WRITE(SMH_ROM)
220	208	AM_RANGE(0x0ff000, 0x0ff7ff) AM_WRITE(opwolf_cchip_data_w)
221	209	AM_RANGE(0x0ff802, 0x0ff803) AM_WRITE(opwolf_cchip_status_w)
222	210	AM_RANGE(0x0ffc00, 0x0ffc01) AM_WRITE(opwolf_cchip_bank_w)
223		AM_RANGE(0x100000, 0x107fff) AM_WRITE(SMH_RAM)
224		AM_RANGE(0x200000, 0x200fff) AM_WRITE(paletteram16_xxxxRRRRGGGGBBBB_word_w) AM_BASE(&paletteram16)
	211	AM_RANGE(0x100000, 0x107fff) AM_RAM
	212	AM_RANGE(0x200000, 0x200fff) AM_RAM_WRITE(paletteram16_xxxxRRRRGGGGBBBB_word_w) AM_BASE(&paletteram16)
	213	AM_RANGE(0x380000, 0x380003) AM_READ(opwolf_dsw_r)         /* dip switches */
225	214	AM_RANGE(0x380000, 0x380003) AM_WRITE(rainbow_spritectrl_w)   // usually 0x4, changes when you fire
226		AM_RANGE(0x3c0000, 0x3c0001) AM_WRITENOP   /* watchdog ?? */
227		AM_RANGE(0x3e0000, 0x3e0001) AM_WRITE8(taitosound_port_w, 0xff00)
228		AM_RANGE(0x3e0002, 0x3e0003) AM_WRITE8(taitosound_comm_w, 0xff00)
229		AM_RANGE(0xc00000, 0xc0ffff) AM_WRITE(PC080SN_word_0_w)
230		AM_RANGE(0xc10000, 0xc1ffff) AM_WRITE(SMH_RAM)   /* error in init code (?) */
	215	AM_RANGE(0x3a0000, 0x3a0003) AM_READ(opwolf_lightgun_r)      /* lightgun, read at $11e0/6 */
	216	AM_RANGE(0x3c0000, 0x3c0001) AM_WRITENOP               /* watchdog ?? */
	217	AM_RANGE(0x3e0000, 0x3e0001) AM_READNOP AM_WRITE8(taitosound_port_w, 0xff00)
	218	AM_RANGE(0x3e0002, 0x3e0003) AM_READWRITE8(taitosound_comm_r,taitosound_comm_w, 0xff00)
	219	AM_RANGE(0xc00000, 0xc0ffff) AM_READWRITE(PC080SN_word_0_r,PC080SN_word_0_w)
	220	AM_RANGE(0xc10000, 0xc1ffff) AM_WRITEONLY               /* error in init code (?) */
231	221	AM_RANGE(0xc20000, 0xc20003) AM_WRITE(PC080SN_yscroll_word_0_w)
232	222	AM_RANGE(0xc40000, 0xc40003) AM_WRITE(PC080SN_xscroll_word_0_w)
233	223	AM_RANGE(0xc50000, 0xc50003) AM_WRITE(PC080SN_ctrl_word_0_w)
234		AM_RANGE(0xd00000, 0xd03fff) AM_WRITE(PC090OJ_word_0_w)   /* sprite ram */
	224	AM_RANGE(0xd00000, 0xd03fff) AM_READWRITE(PC090OJ_word_0_r,PC090OJ_word_0_w)   /* sprite ram */
235	225	ADDRESS_MAP_END
236	226
237	227
238		static ADDRESS_MAP_START( opwolfb_readmem, ADDRESS_SPACE_PROGRAM, 16 )
239		AM_RANGE(0x000000, 0x03ffff) AM_READ(SMH_ROM)
240		AM_RANGE(0x0f0008, 0x0f000b) AM_READ(opwolf_in_r)   /* coins and buttons */
241		AM_RANGE(0x0ff000, 0x0fffff) AM_READ(cchip_r)
242		AM_RANGE(0x100000, 0x107fff) AM_READ(SMH_RAM)   /* RAM */
243		AM_RANGE(0x200000, 0x200fff) AM_READ(SMH_RAM)
244		AM_RANGE(0x380000, 0x380003) AM_READ(opwolf_dsw_r)   /* dip switches */
245		AM_RANGE(0x3a0000, 0x3a0003) AM_READ(opwolf_lightgun_r)   /* lightgun, read at $11e0/6 */
246		AM_RANGE(0x3e0000, 0x3e0001) AM_READNOP
247		AM_RANGE(0x3e0002, 0x3e0003) AM_READ8(taitosound_comm_r, 0xff00)
248		AM_RANGE(0xc00000, 0xc0ffff) AM_READ(PC080SN_word_0_r)
249		AM_RANGE(0xd00000, 0xd03fff) AM_READ(PC090OJ_word_0_r)   /* sprite ram */
250		ADDRESS_MAP_END
251
252		static ADDRESS_MAP_START( opwolfb_writemem, ADDRESS_SPACE_PROGRAM, 16 )
253		AM_RANGE(0x000000, 0x03ffff) AM_WRITE(SMH_ROM)
254		AM_RANGE(0x0ff000, 0x0fffff) AM_WRITE(cchip_w)
255		AM_RANGE(0x100000, 0x107fff) AM_WRITE(SMH_RAM)
256		AM_RANGE(0x200000, 0x200fff) AM_WRITE(paletteram16_xxxxRRRRGGGGBBBB_word_w) AM_BASE(&paletteram16)
	228	static ADDRESS_MAP_START( opwolfb_map, ADDRESS_SPACE_PROGRAM, 16 )
	229	AM_RANGE(0x000000, 0x03ffff) AM_ROM
	230	AM_RANGE(0x0f0008, 0x0f000b) AM_READ(opwolf_in_r)         /* coins and buttons */
	231	AM_RANGE(0x0ff000, 0x0fffff) AM_READWRITE(cchip_r,cchip_w)
	232	AM_RANGE(0x100000, 0x107fff) AM_RAM
	233	AM_RANGE(0x200000, 0x200fff) AM_RAM_WRITE(paletteram16_xxxxRRRRGGGGBBBB_word_w) AM_BASE(&paletteram16)
	234	AM_RANGE(0x380000, 0x380003) AM_READ(opwolf_dsw_r)         /* dip switches */
257	235	AM_RANGE(0x380000, 0x380003) AM_WRITE(rainbow_spritectrl_w)   // usually 0x4, changes when you fire
258		AM_RANGE(0x3c0000, 0x3c0001) AM_WRITENOP   /* watchdog ?? */
259		AM_RANGE(0x3e0000, 0x3e0001) AM_WRITE8(taitosound_port_w, 0xff00)
260		AM_RANGE(0x3e0002, 0x3e0003) AM_WRITE8(taitosound_comm_w, 0xff00)
261		AM_RANGE(0xc00000, 0xc0ffff) AM_WRITE(PC080SN_word_0_w)
262		AM_RANGE(0xc10000, 0xc1ffff) AM_WRITE(SMH_RAM)   /* error in init code (?) */
	236	AM_RANGE(0x3a0000, 0x3a0003) AM_READ(opwolf_lightgun_r)      /* lightgun, read at $11e0/6 */
	237	AM_RANGE(0x3c0000, 0x3c0001) AM_WRITENOP               /* watchdog ?? */
	238	AM_RANGE(0x3e0000, 0x3e0001) AM_READNOP AM_WRITE8(taitosound_port_w, 0xff00)
	239	AM_RANGE(0x3e0002, 0x3e0003) AM_READWRITE8(taitosound_comm_r,taitosound_comm_w, 0xff00)
	240	AM_RANGE(0xc00000, 0xc0ffff) AM_READWRITE(PC080SN_word_0_r,PC080SN_word_0_w)
	241	AM_RANGE(0xc10000, 0xc1ffff) AM_WRITEONLY               /* error in init code (?) */
263	242	AM_RANGE(0xc20000, 0xc20003) AM_WRITE(PC080SN_yscroll_word_0_w)
264	243	AM_RANGE(0xc40000, 0xc40003) AM_WRITE(PC080SN_xscroll_word_0_w)
265	244	AM_RANGE(0xc50000, 0xc50003) AM_WRITE(PC080SN_ctrl_word_0_w)
266		AM_RANGE(0xd00000, 0xd03fff) AM_WRITE(PC090OJ_word_0_w)   /* sprite ram */
	245	AM_RANGE(0xd00000, 0xd03fff) AM_READWRITE(PC090OJ_word_0_r,PC090OJ_word_0_w)   /* sprite ram */
267	246	ADDRESS_MAP_END
268	247
	248
269	249	/***************************************************************************
270	250	This extra Z80 substitutes for the c-chip in the bootleg
271	251	*/
272	252
273		static ADDRESS_MAP_START( sub_z80_readmem, ADDRESS_SPACE_PROGRAM, 8 )
274		AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM)
	253	static ADDRESS_MAP_START( opwolfb_sub_z80_map, ADDRESS_SPACE_PROGRAM, 8 )
	254	AM_RANGE(0x0000, 0x7fff) AM_ROM
275	255	AM_RANGE(0x8800, 0x8800) AM_READ(z80_input1_r)   /* read at PC=$637: poked to $c004 */
	256	AM_RANGE(0x9000, 0x9000) AM_WRITENOP         /* unknown write, 0 then 1 each interrupt */
276	257	AM_RANGE(0x9800, 0x9800) AM_READ(z80_input2_r)   /* read at PC=$631: poked to $c005 */
277		AM_RANGE(0xc000, 0xc7ff) AM_READ(SMH_RAM)
278		ADDRESS_MAP_END
279
280		static ADDRESS_MAP_START( sub_z80_writemem, ADDRESS_SPACE_PROGRAM, 8 )
281		AM_RANGE(0x0000, 0x7fff) AM_WRITE(SMH_ROM)
282		AM_RANGE(0x9000, 0x9000) AM_WRITENOP   /* unknown write, 0 then 1 each interrupt */
283	258	AM_RANGE(0xa000, 0xa000) AM_WRITENOP   /* IRQ acknowledge (unimplemented) */
284		AM_RANGE(0xc000, 0xc7ff) AM_WRITE(SMH_RAM) AM_BASE(&cchip_ram)
	259	AM_RANGE(0xc000, 0xc7ff) AM_RAM AM_BASE(&cchip_ram)
285	260	ADDRESS_MAP_END
286	261
	262
287	263	/***************************************************************************/
288	264
289		static ADDRESS_MAP_START( z80_readmem, ADDRESS_SPACE_PROGRAM, 8 )
290		AM_RANGE(0x0000, 0x3fff) AM_READ(SMH_ROM)
291		AM_RANGE(0x4000, 0x7fff) AM_READ(SMH_BANK10)
292		AM_RANGE(0x8000, 0x8fff) AM_READ(SMH_RAM)
293		AM_RANGE(0x9000, 0x9001) AM_DEVREAD("ym", ym2151_r)
294		AM_RANGE(0x9002, 0x9100) AM_READ(SMH_RAM)
295		AM_RANGE(0xa001, 0xa001) AM_READ(taitosound_slave_comm_r)
296		ADDRESS_MAP_END
297	265
298
299	266	//static UINT8 adpcm_d[0x08];
300	267	//0 - start ROM offset LSB
301	268	//1 - start ROM offset MSB
r4679	r4680
398	365	//  logerror("CPU #1         e00%i-data=%2x   pc=%4x\n",offset,data,cpu_get_pc(space->cpu) );
399	366	}
400	367
401
402		static ADDRESS_MAP_START( z80_writemem, ADDRESS_SPACE_PROGRAM, 8 )
403		AM_RANGE(0x0000, 0x7fff) AM_WRITE(SMH_ROM)
404		AM_RANGE(0x8000, 0x8fff) AM_WRITE(SMH_RAM)
405		AM_RANGE(0x9000, 0x9001) AM_DEVWRITE("ym", ym2151_w)
	368	static ADDRESS_MAP_START( opwolf_sound_z80_map, ADDRESS_SPACE_PROGRAM, 8 )
	369	AM_RANGE(0x0000, 0x3fff) AM_ROM
	370	AM_RANGE(0x4000, 0x7fff) AM_ROMBANK(10)
	371	AM_RANGE(0x8000, 0x8fff) AM_RAM
	372	AM_RANGE(0x9000, 0x9001) AM_DEVREADWRITE("ym", ym2151_r,ym2151_w)
	373	AM_RANGE(0x9002, 0x9100) AM_READNOP
406	374	AM_RANGE(0xa000, 0xa000) AM_WRITE(taitosound_slave_port_w)
407		AM_RANGE(0xa001, 0xa001) AM_WRITE(taitosound_slave_comm_w)
	375	AM_RANGE(0xa001, 0xa001) AM_READWRITE(taitosound_slave_comm_r,taitosound_slave_comm_w)
408	376	AM_RANGE(0xb000, 0xb006) AM_DEVWRITE("msm1", opwolf_adpcm_b_w)
409	377	AM_RANGE(0xc000, 0xc006) AM_DEVWRITE("msm2", opwolf_adpcm_c_w)
410	378	AM_RANGE(0xd000, 0xd000) AM_WRITE(opwolf_adpcm_d_w)
411	379	AM_RANGE(0xe000, 0xe000) AM_WRITE(opwolf_adpcm_e_w)
412	380	ADDRESS_MAP_END
413	381
414
415	382	/***********************************************************
416	383	INPUT PORTS, DIPs
417	384	***********************************************************/
r4679	r4680
552	519
553	520	static void irq_handler(const device_config *device, int irq)
554	521	{
555		cpu_set_input_line(device->machine->cpu[1],0,irq ? ASSERT_LINE : CLEAR_LINE);
	522	cputag_set_input_line(device->machine, "audiocpu", 0, irq ? ASSERT_LINE : CLEAR_LINE);
556	523	}
557	524
558	525
r4679	r4680
579	546
580	547	/* basic machine hardware */
581	548	MDRV_CPU_ADD("maincpu", M68000, CPU_CLOCK )   /* 8 MHz */
582		MDRV_CPU_PROGRAM_MAP(opwolf_readmem,opwolf_writemem)
	549	MDRV_CPU_PROGRAM_MAP(opwolf_map,0)
583	550	MDRV_CPU_VBLANK_INT("screen", irq5_line_hold)
584	551
585	552	MDRV_CPU_ADD("audiocpu", Z80, SOUND_CPU_CLOCK )   /* 4 MHz */
586		MDRV_CPU_PROGRAM_MAP(z80_readmem,z80_writemem)
	553	MDRV_CPU_PROGRAM_MAP(opwolf_sound_z80_map,0)
587	554
588	555	MDRV_QUANTUM_TIME(HZ(600))   /* 10 CPU slices per frame - enough for the sound CPU to read all commands */
589	556
r4679	r4680
628	595
629	596	/* basic machine hardware */
630	597	MDRV_CPU_ADD("maincpu", M68000, CPU_CLOCK )   /* 8 MHz ??? */
631		MDRV_CPU_PROGRAM_MAP(opwolfb_readmem,opwolfb_writemem)
	598	MDRV_CPU_PROGRAM_MAP(opwolfb_map,0)
632	599	MDRV_CPU_VBLANK_INT("screen", irq5_line_hold)
633	600
634	601	MDRV_CPU_ADD("audiocpu", Z80, SOUND_CPU_CLOCK )   /* 4 MHz ??? */
635		MDRV_CPU_PROGRAM_MAP(z80_readmem,z80_writemem)
	602	MDRV_CPU_PROGRAM_MAP(opwolf_sound_z80_map,0)
636	603
637	604	MDRV_CPU_ADD("sub", Z80, SOUND_CPU_CLOCK )   /* 4 MHz ??? */
638		MDRV_CPU_PROGRAM_MAP(sub_z80_readmem,sub_z80_writemem)
	605	MDRV_CPU_PROGRAM_MAP(opwolfb_sub_z80_map,0)
639	606	MDRV_CPU_VBLANK_INT("screen", irq0_line_hold)
640	607
641	608	MDRV_QUANTUM_TIME(HZ(600))   /* 10 CPU slices per frame - enough for the sound CPU to read all commands */

src/mame/drivers/surpratk.c

r4679	r4680
165	165
166	166	static void irqhandler(const device_config *device, int linestate)
167	167	{
168		cpu_set_input_line(device->machine->cpu[0],KONAMI_FIRQ_LINE,linestate);
	168	cputag_set_input_line(device->machine, "maincpu", KONAMI_FIRQ_LINE, linestate);
169	169	}
170	170
171	171	static const ym2151_interface ym2151_config =
r4679	r4680
280	280
281	281	static MACHINE_RESET( surpratk )
282	282	{
283		konami_configure_set_lines(machine->cpu[0], surpratk_banking);
	283	konami_configure_set_lines(cputag_get_cpu(machine, "maincpu"), surpratk_banking);
284	284
285	285	paletteram = &memory_region(machine, "maincpu")[0x48000];
286	286	}

src/mame/drivers/suna16.c

r4679	r4680
358	358
359	359	static MACHINE_RESET(uballoon)
360	360	{
361		const address_space *space = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM);
	361	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
362	362	uballoon_pcm_1_bankswitch_w(space, 0, 0);
363	363	}
364	364
r4679	r4680
922	922
923	923	static void bestbest_ym3526_irqhandler(const device_config *device, int state)
924	924	{
925		cpu_set_input_line(device->machine->cpu[1], INPUT_LINE_IRQ0, state);
	925	cputag_set_input_line(device->machine, "audiocpu", INPUT_LINE_IRQ0, state);
926	926	}
927	927
928	928	static const ym3526_interface bestbest_ym3526_interface =

src/mame/drivers/zaccaria.c

r4679	r4680
103	103	}
104	104
105	105
106		static WRITE_LINE_DEVICE_HANDLER( zaccaria_irq0a ) { cpu_set_input_line(device->machine->cpu[1], INPUT_LINE_NMI, state ? ASSERT_LINE : CLEAR_LINE); }
107		static WRITE_LINE_DEVICE_HANDLER( zaccaria_irq0b ) { cpu_set_input_line(device->machine->cpu[1],0,state ? ASSERT_LINE : CLEAR_LINE); }
	106	static WRITE_LINE_DEVICE_HANDLER( zaccaria_irq0a ) { cputag_set_input_line(device->machine, "audiocpu", INPUT_LINE_NMI, state ? ASSERT_LINE : CLEAR_LINE); }
	107	static WRITE_LINE_DEVICE_HANDLER( zaccaria_irq0b ) { cputag_set_input_line(device->machine, "audiocpu", 0, state ? ASSERT_LINE : CLEAR_LINE); }
108	108
109	109	static int active_8910, port0a, acs;
110	110
r4679	r4680
259	259
260	260	static WRITE8_HANDLER( sound_command_w )
261	261	{
262		soundlatch_w(space,0,data);
263		cpu_set_input_line(space->machine->cpu[2],0,(data & 0x80) ? CLEAR_LINE : ASSERT_LINE);
	262	soundlatch_w(space, 0, data);
	263	cputag_set_input_line(space->machine, "audio2", 0, (data & 0x80) ? CLEAR_LINE : ASSERT_LINE);
264	264	}
265	265
266	266	static WRITE8_HANDLER( sound1_command_w )
267	267	{
268	268	const device_config *pia0 = devtag_get_device(space->machine, "pia0");
269		pia6821_ca1_w(pia0,0,data & 0x80);
270		soundlatch2_w(space,0,data);
	269	pia6821_ca1_w(pia0, 0, data & 0x80);
	270	soundlatch2_w(space, 0, data);
271	271	}
272	272
273	273	static WRITE8_DEVICE_HANDLER( mc1408_data_w )
274	274	{
275		dac_data_w(device,data);
	275	dac_data_w(device, data);
276	276	}
277	277
278	278

src/mame/drivers/shadfrce.c

r4679	r4680
221	221	{
222	222	if (ACCESSING_BITS_8_15)
223	223	{
224		soundlatch_w(space,1,data >> 8);
225		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_NMI, PULSE_LINE );
	224	soundlatch_w(space, 1, data >> 8);
	225	cputag_set_input_line(space->machine, "audiocpu", INPUT_LINE_NMI, PULSE_LINE );
226	226	}
227	227	else
228	228	{
r4679	r4680
230	230	double brt = (data & 0xff) / 255.0;
231	231
232	232	for (i = 0; i < 0x4000; i++)
233		palette_set_pen_contrast(space->machine,i,brt);
	233	palette_set_pen_contrast(space->machine, i, brt);
234	234	}
235	235	}
236	236
237	237	static WRITE16_HANDLER( shadfrce_irq_ack_w )
238	238	{
239		cpu_set_input_line(space->machine->cpu[0], offset ^ 3, CLEAR_LINE);
	239	cputag_set_input_line(space->machine, "maincpu", offset ^ 3, CLEAR_LINE);
240	240	}
241	241
242	242	static WRITE16_HANDLER( shadfrce_irq_w )
r4679	r4680
289	289	raster_scanline = (raster_scanline + 1) % 240;
290	290	if (raster_scanline > 0)
291	291	video_screen_update_partial(timer->machine->primary_screen, raster_scanline - 1);
292		cpu_set_input_line(timer->machine->cpu[0], 1, ASSERT_LINE);
	292	cputag_set_input_line(timer->machine, "maincpu", 1, ASSERT_LINE);
293	293	}
294	294	}
295	295
r4679	r4680
300	300	{
301	301	if (scanline > 0)
302	302	video_screen_update_partial(timer->machine->primary_screen, scanline - 1);
303		cpu_set_input_line(timer->machine->cpu[0], 2, ASSERT_LINE);
	303	cputag_set_input_line(timer->machine, "maincpu", 2, ASSERT_LINE);
304	304	}
305	305	}
306	306
r4679	r4680
310	310	if (scanline == 248)
311	311	{
312	312	video_screen_update_partial(timer->machine->primary_screen, scanline - 1);
313		cpu_set_input_line(timer->machine->cpu[0], 3, ASSERT_LINE);
	313	cputag_set_input_line(timer->machine, "maincpu", 3, ASSERT_LINE);
314	314	}
315	315	}
316	316	}
r4679	r4680
503	503
504	504	static void irq_handler(const device_config *device, int irq)
505	505	{
506		cpu_set_input_line(device->machine->cpu[1], 0, irq ? ASSERT_LINE : CLEAR_LINE );
	506	cputag_set_input_line(device->machine, "audiocpu", 0, irq ? ASSERT_LINE : CLEAR_LINE );
507	507	}
508	508
509	509	static const ym2151_interface ym2151_config =

src/mame/drivers/yumefuda.c

r4679	r4680
224	224
225	225	static ADDRESS_MAP_START( main_map, ADDRESS_SPACE_PROGRAM, 8 )
226	226	AM_RANGE(0x0000, 0x7fff) AM_ROM
227		AM_RANGE(0x8000, 0x9fff) AM_READWRITE(SMH_BANK1, SMH_ROM)
	227	AM_RANGE(0x8000, 0x9fff) AM_READWRITE(SMH_BANK(1), SMH_ROM)
228	228	AM_RANGE(0xa7fc, 0xa7fc) AM_WRITE(prot_lock_w)
229	229	AM_RANGE(0xa7ff, 0xa7ff) AM_WRITE(eeprom_w)
230	230	AM_RANGE(0xaf80, 0xafff) AM_READWRITE(custom_ram_r, custom_ram_w) AM_BASE(&cus_ram)

src/mame/drivers/jongkyo.c

r4679	r4680
195	195	static ADDRESS_MAP_START( jongkyo_memmap, ADDRESS_SPACE_PROGRAM, 8 )
196	196	AM_RANGE(0x0000, 0x3fff) AM_READ(SMH_ROM) AM_WRITE(videoram2_w) // wrong, this doesn't seem to be video ram on write..
197	197	AM_RANGE(0x4000, 0x6bff) AM_READ(SMH_ROM) // fixed rom
198		AM_RANGE(0x6c00, 0x6fff) AM_READ(SMH_BANK1)   // banked (8 banks)
	198	AM_RANGE(0x6c00, 0x6fff) AM_READ(SMH_BANK(1))   // banked (8 banks)
199	199	AM_RANGE(0x7000, 0x77ff) AM_RAM
200	200	AM_RANGE(0x8000, 0xffff) AM_RAM AM_BASE(&videoram)
201	201	ADDRESS_MAP_END
r4679	r4680
476	476	/* then do the standard Sega decryption */
477	477	jongkyo_decode(machine, "maincpu");
478	478
479		videoram2 = auto_malloc(0x4000);
	479	videoram2 = auto_alloc_array(machine, UINT8, 0x4000);
480	480	state_save_register_global_pointer(machine, videoram2, 0x4000);
481	481
482	482	}

src/mame/drivers/firebeat.c

r4679	r4680
140	140
141	141	static VIDEO_START(firebeat)
142	142	{
143		gcu[0].vram = auto_malloc(0x2000000);
144		gcu[1].vram = auto_malloc(0x2000000);
	143	gcu[0].vram = auto_alloc_array(machine, UINT32, 0x2000000/4);
	144	gcu[1].vram = auto_alloc_array(machine, UINT32, 0x2000000/4);
145	145	memset(gcu[0].vram, 0, 0x2000000);
146	146	memset(gcu[1].vram, 0, 0x2000000);
147	147	}
r4679	r4680
589	589	/* IRQ clear/enable; ppd writes bit off then on in response to interrupt */
590	590	/* it enables bits 0x41, but 0x01 seems to be the one it cares about */
591	591	if (ACCESSING_BITS_16_31 && (data & 0x0001) == 0)
592		cpu_set_input_line(machine->cpu[0], INPUT_LINE_IRQ0, CLEAR_LINE);
	592	cputag_set_input_line(machine, "maincpu", INPUT_LINE_IRQ0, CLEAR_LINE);
593	593	break;
594	594
595	595	case 0x30:
r4679	r4680
857	857
858	858	static void atapi_cause_irq(running_machine *machine)
859	859	{
860		cpu_set_input_line(machine->cpu[0], INPUT_LINE_IRQ4, ASSERT_LINE);
	860	cputag_set_input_line(machine, "maincpu", INPUT_LINE_IRQ4, ASSERT_LINE);
861	861	}
862	862
863	863	static void atapi_clear_irq(running_machine *machine)
864	864	{
865		cpu_set_input_line(machine->cpu[0], INPUT_LINE_IRQ4, CLEAR_LINE);
	865	cputag_set_input_line(machine, "maincpu", INPUT_LINE_IRQ4, CLEAR_LINE);
866	866	}
867	867
868	868	static void atapi_exit(running_machine* machine)
r4679	r4680
1277	1277	static void comm_uart_irq_callback(running_machine *machine, int channel, int value)
1278	1278	{
1279	1279	// TODO
1280		//cpu_set_input_line(machine->cpu[0], INPUT_LINE_IRQ2, ASSERT_LINE);
	1280	//cputag_set_input_line(machine, "maincpu", INPUT_LINE_IRQ2, ASSERT_LINE);
1281	1281	}
1282	1282
1283	1283	/*****************************************************************************/
r4679	r4680
1401	1401	if ((extend_board_irq_enable & 0x02) == 0 && value != CLEAR_LINE)
1402	1402	{
1403	1403	extend_board_irq_active |= 0x02;
1404		cpu_set_input_line(machine->cpu[0], INPUT_LINE_IRQ1, ASSERT_LINE);
	1404	cputag_set_input_line(machine, "maincpu", INPUT_LINE_IRQ1, ASSERT_LINE);
1405	1405	}
1406	1406	else
1407		cpu_set_input_line(machine->cpu[0], INPUT_LINE_IRQ1, CLEAR_LINE);
	1407	cputag_set_input_line(machine, "maincpu", INPUT_LINE_IRQ1, CLEAR_LINE);
1408	1408	}
1409	1409	else
1410	1410	{
1411	1411	if ((extend_board_irq_enable & 0x01) == 0 && value != CLEAR_LINE)
1412	1412	{
1413	1413	extend_board_irq_active |= 0x01;
1414		cpu_set_input_line(machine->cpu[0], INPUT_LINE_IRQ1, ASSERT_LINE);
	1414	cputag_set_input_line(machine, "maincpu", INPUT_LINE_IRQ1, ASSERT_LINE);
1415	1415	}
1416	1416	else
1417		cpu_set_input_line(machine->cpu[0], INPUT_LINE_IRQ1, CLEAR_LINE);
	1417	cputag_set_input_line(machine, "maincpu", INPUT_LINE_IRQ1, CLEAR_LINE);
1418	1418	}
1419	1419	}
1420	1420
r4679	r4680
1733	1733	static MACHINE_START( firebeat )
1734	1734	{
1735	1735	/* set conservative DRC options */
1736		ppcdrc_set_options(machine->cpu[0], PPCDRC_COMPATIBLE_OPTIONS);
	1736	ppcdrc_set_options(cputag_get_cpu(machine, "maincpu"), PPCDRC_COMPATIBLE_OPTIONS);
1737	1737
1738	1738	/* configure fast RAM regions for DRC */
1739		ppcdrc_add_fastram(machine->cpu[0], 0x00000000, 0x01ffffff, FALSE, work_ram);
	1739	ppcdrc_add_fastram(cputag_get_cpu(machine, "maincpu"), 0x00000000, 0x01ffffff, FALSE, work_ram);
1740	1740	}
1741	1741
1742	1742	static ADDRESS_MAP_START( firebeat_map, ADDRESS_SPACE_PROGRAM, 32 )
r4679	r4680
2216	2216	{
2217	2217	int r = ibutton_w(data);
2218	2218	if (r >= 0)
2219		ppc4xx_spu_receive_byte(device->machine->cpu[0], r);
	2219	ppc4xx_spu_receive_byte(cputag_get_cpu(device->machine, "maincpu"), r);
2220	2220	}
2221	2221
2222	2222	/*****************************************************************************/
r4679	r4680
2227	2227	if(!out2) out1 = lamp_output2_w;
2228	2228	if(!out3) out1 = lamp_output3_w;
2229	2229
2230		memory_install_write32_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x7d000804, 0x7d000807, 0, 0, out1);
2231		memory_install_write32_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x7d000320, 0x7d000323, 0, 0, out2);
2232		memory_install_write32_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x7d000324, 0x7d000327, 0, 0, out3);
	2230	memory_install_write32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x7d000804, 0x7d000807, 0, 0, out1);
	2231	memory_install_write32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x7d000320, 0x7d000323, 0, 0, out2);
	2232	memory_install_write32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x7d000324, 0x7d000327, 0, 0, out3);
2233	2233	}
2234	2234
2235	2235	static void init_firebeat(running_machine *machine)
r4679	r4680
2251	2251
2252	2252	cur_cab_data = cab_data;
2253	2253
2254		ppc4xx_spu_set_tx_handler(machine->cpu[0], security_w);
	2254	ppc4xx_spu_set_tx_handler(cputag_get_cpu(machine, "maincpu"), security_w);
2255	2255
2256	2256	set_ibutton(rom);
2257	2257

src/mame/drivers/tagteam.c

r4679	r4680
46	46
47	47	static WRITE8_HANDLER( sound_command_w )
48	48	{
49		soundlatch_w(space,offset,data);
50		cpu_set_input_line(space->machine->cpu[1],M6502_IRQ_LINE,HOLD_LINE);
	49	soundlatch_w(space, offset, data);
	50	cputag_set_input_line(space->machine, "audiocpu", M6502_IRQ_LINE, HOLD_LINE);
51	51	}
52	52
53	53

src/mame/drivers/eolith.c

r4679	r4680
1033	1033
1034	1034	static DRIVER_INIT( hidctch3 )
1035	1035	{
1036		memory_install_write32_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xfc200000, 0xfc200003, 0, 0, SMH_NOP); // this generates pens vibration
	1036	memory_install_write32_handler(cputag_get_address_space(machine, "cpu", ADDRESS_SPACE_PROGRAM), 0xfc200000, 0xfc200003, 0, 0, (write32_space_func)SMH_NOP); // this generates pens vibration
1037	1037
1038	1038	// It is not clear why the first reads are needed too
1039	1039
1040		memory_install_read32_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xfce00000, 0xfce00003, 0, 0, hidctch3_pen1_r);
1041		memory_install_read32_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xfce80000, 0xfce80003, 0, 0, hidctch3_pen1_r);
	1040	memory_install_read32_handler(cputag_get_address_space(machine, "cpu", ADDRESS_SPACE_PROGRAM), 0xfce00000, 0xfce00003, 0, 0, hidctch3_pen1_r);
	1041	memory_install_read32_handler(cputag_get_address_space(machine, "cpu", ADDRESS_SPACE_PROGRAM), 0xfce80000, 0xfce80003, 0, 0, hidctch3_pen1_r);
1042	1042
1043		memory_install_read32_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xfcf00000, 0xfcf00003, 0, 0, hidctch3_pen2_r);
1044		memory_install_read32_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xfcf80000, 0xfcf80003, 0, 0, hidctch3_pen2_r);
	1043	memory_install_read32_handler(cputag_get_address_space(machine, "cpu", ADDRESS_SPACE_PROGRAM), 0xfcf00000, 0xfcf00003, 0, 0, hidctch3_pen2_r);
	1044	memory_install_read32_handler(cputag_get_address_space(machine, "cpu", ADDRESS_SPACE_PROGRAM), 0xfcf80000, 0xfcf80003, 0, 0, hidctch3_pen2_r);
1045	1045
1046	1046	init_eolith_speedup(machine);
1047	1047	}

src/mame/drivers/bigevglf.c

r4679	r4680
117	117
118	118	static TIMER_CALLBACK( nmi_callback )
119	119	{
120		if (sound_nmi_enable) cpu_set_input_line(machine->cpu[2],INPUT_LINE_NMI,PULSE_LINE);
	120	if (sound_nmi_enable) cputag_set_input_line(machine, "audiocpu", INPUT_LINE_NMI, PULSE_LINE);
121	121	else pending_nmi = 1;
122	122	sound_state &= ~1;
123	123	}
124	124	static WRITE8_HANDLER( sound_command_w )   /* write to port 20 clears bit 0 in status */
125	125	{
126	126	for_sound = data;
127		timer_call_after_resynch(space->machine, NULL, data,nmi_callback);
	127	timer_call_after_resynch(space->machine, NULL, data, nmi_callback);
128	128	}
129	129
130	130	static READ8_HANDLER( sound_command_r )   /* read from D800 sets bit 0 in status */
r4679	r4680
143	143	sound_nmi_enable = 1;
144	144	if (pending_nmi)
145	145	{
146		cpu_set_input_line(space->machine->cpu[2],INPUT_LINE_NMI,PULSE_LINE);
	146	cputag_set_input_line(space->machine, "audiocpu", INPUT_LINE_NMI, PULSE_LINE);
147	147	pending_nmi = 0;
148	148	}
149	149	}

src/mame/drivers/namcos23.c

r4679	r4680
38	38
39	39	- Serial number data is at offset 0x201 in the BIOS.  Until the games are running
40	40	and displaying it I'm not going to meddle with it though.
	41
41	42	*/
42	43
43	44	/*
r4679	r4680
52	53	*Final Furlong    Namco, 1997    System 22.5/Gorgon
53	54	Gunmen Wars       Namco, 1998    System 23 [not dumped, but have]
54	55	Motocross Go!     Namco, 1997    System 23
55		*Panic Park       Namco, 1998    System 23
	56	Panic Park        Namco, 1998    System 23
56	57	Rapid River       Namco, 1997    System 22.5/Gorgon
57	58	Time Crisis II    Namco, 1997    System 23
58	59	*Underground King Namco, 1998    System 23
r4679	r4680
1016	1017	if (data)
1017	1018	{
1018	1019	logerror("S23: booting H8/3002\n");
1019		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_RESET, CLEAR_LINE);
	1020	cputag_set_input_line(space->machine, "audiocpu", INPUT_LINE_RESET, CLEAR_LINE);
1020	1021	}
1021	1022	else
1022	1023	{
1023	1024	logerror("S23: stopping H8/3002\n");
1024		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_RESET, ASSERT_LINE);
	1025	cputag_set_input_line(space->machine, "audiocpu", INPUT_LINE_RESET, ASSERT_LINE);
1025	1026	}
1026	1027	}
1027	1028	}
r4679	r4680
1077	1078	return shared16[BYTE_XOR_BE(offset)];
1078	1079	}
1079	1080
1080		#if 1
1081	1081	static WRITE16_HANDLER(cause_sync_w)
1082	1082	{
1083	1083	UINT16 *shared16 = (UINT16 *)namcos23_shared_ram;
1084	1084
1085	1085	shared16[BYTE_XOR_BE(0x4052/2)] = 0;
1086	1086	}
1087		#endif
1088	1087
1089	1088	/* H8/3002 MCU stuff */
1090	1089	static ADDRESS_MAP_START( s23h8rwmap, ADDRESS_SPACE_PROGRAM, 16 )
r4679	r4680
1214	1213	s23_setstate ^= 1;
1215	1214	}
1216	1215
	1216	static UINT8 maintoio[16], mi_rd, mi_wr;
	1217	static UINT8 iotomain[16], im_rd, im_wr;
	1218
	1219	static READ8_HANDLER( s23_mcu_iob_r )
	1220	{
	1221	UINT8 ret = iotomain[im_rd];
	1222
	1223	im_rd++;
	1224	im_rd &= 0xf;
	1225
	1226	if (im_rd == im_wr)
	1227	{
	1228	cputag_set_input_line(space->machine, "audiocpu", H8_SCI_0_RX, CLEAR_LINE);
	1229	}
	1230
	1231	return ret;
	1232	}
	1233
	1234	static WRITE8_HANDLER( s23_mcu_iob_w )
	1235	{
	1236	maintoio[mi_wr++] = data;
	1237	mi_wr &= 0xf;
	1238
	1239	cputag_set_input_line(space->machine, "ioboard", H8_SCI_0_RX, ASSERT_LINE);
	1240	}
	1241
1217	1242	static INPUT_PORTS_START( ss23 )
1218	1243	PORT_START("H8PORT")
1219	1244	INPUT_PORTS_END
r4679	r4680
1223	1248	AM_RANGE(H8_PORT_8, H8_PORT_8) AM_READ( s23_mcu_p8_r ) AM_WRITENOP
1224	1249	AM_RANGE(H8_PORT_A, H8_PORT_A) AM_READWRITE( s23_mcu_pa_r, s23_mcu_pa_w )
1225	1250	AM_RANGE(H8_PORT_B, H8_PORT_B) AM_READWRITE( s23_mcu_portB_r, s23_mcu_portB_w )
1226		AM_RANGE(H8_SERIAL_1, H8_SERIAL_1) AM_READ( s23_mcu_rtc_r ) AM_WRITE( s23_mcu_settings_w )
	1251	AM_RANGE(H8_SERIAL_0, H8_SERIAL_0) AM_READWRITE( s23_mcu_iob_r, s23_mcu_iob_w )
	1252	AM_RANGE(H8_SERIAL_1, H8_SERIAL_1) AM_READWRITE( s23_mcu_rtc_r, s23_mcu_settings_w )
1227	1253	AM_RANGE(H8_ADC_0_H, H8_ADC_0_L) AM_NOP
1228	1254	AM_RANGE(H8_ADC_1_H, H8_ADC_1_L) AM_NOP
1229	1255	AM_RANGE(H8_ADC_2_H, H8_ADC_2_L) AM_NOP
1230	1256	AM_RANGE(H8_ADC_3_H, H8_ADC_3_L) AM_NOP
1231	1257	ADDRESS_MAP_END
1232	1258
	1259	// version without serial hookup to I/O board for games where the PIC isn't dumped
	1260	static ADDRESS_MAP_START( s23h8ionoiobmap, ADDRESS_SPACE_IO, 8 )
	1261	AM_RANGE(H8_PORT_7, H8_PORT_7) AM_READ_PORT( "H8PORT" )
	1262	AM_RANGE(H8_PORT_8, H8_PORT_8) AM_READ( s23_mcu_p8_r ) AM_WRITENOP
	1263	AM_RANGE(H8_PORT_A, H8_PORT_A) AM_READWRITE( s23_mcu_pa_r, s23_mcu_pa_w )
	1264	AM_RANGE(H8_PORT_B, H8_PORT_B) AM_READWRITE( s23_mcu_portB_r, s23_mcu_portB_w )
	1265	AM_RANGE(H8_SERIAL_1, H8_SERIAL_1) AM_READWRITE( s23_mcu_rtc_r, s23_mcu_settings_w )
	1266	AM_RANGE(H8_ADC_0_H, H8_ADC_0_L) AM_NOP
	1267	AM_RANGE(H8_ADC_1_H, H8_ADC_1_L) AM_NOP
	1268	AM_RANGE(H8_ADC_2_H, H8_ADC_2_L) AM_NOP
	1269	AM_RANGE(H8_ADC_3_H, H8_ADC_3_L) AM_NOP
	1270	ADDRESS_MAP_END
1233	1271
	1272
	1273	static READ8_HANDLER( s23_iob_mcu_r )
	1274	{
	1275	UINT8 ret = maintoio[mi_rd];
	1276
	1277	mi_rd++;
	1278	mi_rd &= 0xf;
	1279
	1280	if (mi_rd == mi_wr)
	1281	{
	1282	cputag_set_input_line(space->machine, "ioboard", H8_SCI_0_RX, CLEAR_LINE);
	1283	}
	1284
	1285	return ret;
	1286	}
	1287
	1288	static WRITE8_HANDLER( s23_iob_mcu_w )
	1289	{
	1290	iotomain[im_wr++] = data;
	1291	im_wr &= 0xf;
	1292
	1293	cputag_set_input_line(space->machine, "audiocpu", H8_SCI_0_RX, ASSERT_LINE);
	1294	}
	1295
1234	1296	/* H8/3334 (Namco C78) I/O board MCU */
1235	1297	static ADDRESS_MAP_START( s23iobrdmap, ADDRESS_SPACE_PROGRAM, 8 )
1236	1298	AM_RANGE(0x0000, 0x0fff) AM_READ(SMH_ROM)
r4679	r4680
1238	1300	ADDRESS_MAP_END
1239	1301
1240	1302	static ADDRESS_MAP_START( s23iobrdiomap, ADDRESS_SPACE_IO, 8 )
	1303	AM_RANGE(H8_SERIAL_0, H8_SERIAL_0) AM_READWRITE( s23_iob_mcu_r, s23_iob_mcu_w )
1241	1304	ADDRESS_MAP_END
1242	1305
1243	1306	static DRIVER_INIT(ss23)
1244	1307	{
	1308	mi_rd = mi_wr = im_rd = im_wr = 0;
1245	1309	}
1246	1310
1247	1311	static const gfx_layout namcos23_cg_layout =
r4679	r4680
1303	1367
1304	1368	MDRV_CPU_ADD("audiocpu", H83002, 14745600 )
1305	1369	MDRV_CPU_PROGRAM_MAP( s23h8rwmap, 0 )
1306		MDRV_CPU_IO_MAP( s23h8iomap, 0 )
	1370	MDRV_CPU_IO_MAP( s23h8ionoiobmap, 0 )
1307	1371	MDRV_CPU_VBLANK_INT("screen", irq1_line_pulse)
1308	1372
1309	1373	MDRV_QUANTUM_TIME(HZ(60000))
r4679	r4680
1347	1411	MDRV_CPU_ADD("ioboard", H83334, 14745600 )
1348	1412	MDRV_CPU_PROGRAM_MAP( s23iobrdmap, 0 )
1349	1413	MDRV_CPU_IO_MAP( s23iobrdiomap, 0 )
1350		MDRV_CPU_VBLANK_INT("screen", irq1_line_pulse)
1351	1414
1352
1353	1415	MDRV_QUANTUM_TIME(HZ(60000))
1354	1416
1355	1417	MDRV_SCREEN_ADD("screen", RASTER)
r4679	r4680
1386	1448
1387	1449	MDRV_CPU_ADD("audiocpu", H83002, 14745600 )
1388	1450	MDRV_CPU_PROGRAM_MAP( s23h8rwmap, 0 )
1389		MDRV_CPU_IO_MAP( s23h8iomap, 0 )
	1451	MDRV_CPU_IO_MAP( s23h8ionoiobmap, 0 )
1390	1452	MDRV_CPU_VBLANK_INT("screen", irq1_line_pulse)
1391	1453
1392	1454	MDRV_QUANTUM_TIME(HZ(60000))
r4679	r4680
1723	1785	ROM_LOAD( "ffs1waveh.2a", 0x800000, 0x800000, CRC(178e8bd3) SHA1(8ab1a97003914f70b09e96c5924f3a839fe634c7) )
1724	1786	ROM_END
1725	1787
	1788	ROM_START( panicprk )
	1789	ROM_REGION32_BE( 0x400000, "user1", 0 ) /* 4 megs for main R4650 code */
	1790	ROM_LOAD16_BYTE( "pnp2ver-a.ic2", 0x000000, 0x200000, CRC(cd528597) SHA1(cf390e78228eb10d5f50ff7e7e37063a2d87f469) )
	1791	ROM_LOAD16_BYTE( "pnp2ver-a.ic1", 0x000001, 0x200000, CRC(80fea853) SHA1(b18003bde060ebb3c892a6d7fa4abf868cadc777) )
	1792
	1793	ROM_REGION( 0x80000, "audiocpu", 0 )   /* Hitachi H8/3002 MCU code */
	1794	ROM_LOAD16_WORD_SWAP( "pnp2ver-a.ic3", 0x000000, 0x080000, CRC(fe4bc6f4) SHA1(2114dc4bc63d589e6c3b26a73dbc60924f3b1765) )
	1795
	1796	ROM_REGION( 0x2000000, "sprite", 0 )   /* sprite? tilemap? tiles */
	1797	ROM_LOAD16_BYTE( "pnp1mtal.2h",  0x000000, 0x800000, CRC(6490faaa) SHA1(03443746009b434e5d4074ea6314910418907360) )
	1798	ROM_LOAD16_BYTE( "pnp1mtah.2j",  0x000001, 0x800000, CRC(37addddd) SHA1(3032989653304417df80606bc3fde6e9425d8cbb) )
	1799
	1800	ROM_REGION( 0x4000000, "textile", 0 )   /* texture tiles */
	1801	ROM_LOAD( "pnp1cguu.5f",  0x000000, 0x800000, CRC(cd64f57f) SHA1(8780270298e0823db1acbbf79396788df0c3c19c) )
	1802	ROM_LOAD( "pnp1cgum.4j",  0x800000, 0x800000, CRC(206217ca) SHA1(9c095bba7764f3405c3fab10513b9b78981ec44d) )
	1803	ROM_LOAD( "pnp1cgll.4m",  0x1000000, 0x800000, CRC(d03932cf) SHA1(49240e44923cc6e815e9457b6290fd18466658af) )
	1804	ROM_LOAD( "pnp1cglm.5k",  0x180000, 0x800000, CRC(abf4ccf2) SHA1(3848e26d0ba6c872bbc6d5e0eb23a9d4b34152d5) )
	1805	ROM_LOAD( "pnp1cguu.4f",  0x2000000, 0x800000, CRC(cd64f57f) SHA1(8780270298e0823db1acbbf79396788df0c3c19c) )
	1806	ROM_LOAD( "pnp1cgum.5j",  0x2800000, 0x800000, CRC(206217ca) SHA1(9c095bba7764f3405c3fab10513b9b78981ec44d) )
	1807	ROM_LOAD( "pnp1cgll.5m",  0x3000000, 0x800000, CRC(d03932cf) SHA1(49240e44923cc6e815e9457b6290fd18466658af) )
	1808	ROM_LOAD( "pnp1cglm.4k",  0x3800000, 0x800000, CRC(abf4ccf2) SHA1(3848e26d0ba6c872bbc6d5e0eb23a9d4b34152d5) )
	1809
	1810	ROM_REGION( 0x800000, "textilemap", 0 )   /* texture tilemap */
	1811	ROM_LOAD( "pnp1ccrl.7f",  0x000000, 0x200000, CRC(b7bc43c2) SHA1(f4b470540194486ca6822f438fc1d4700cfb2ab1) )
	1812	ROM_LOAD( "pnp1ccrh.7e",  0x200000, 0x200000, CRC(caaf1b73) SHA1(b436992817ab4e4dad05e7429eb102d4fb57fa6a) )
	1813	ROM_LOAD( "pnp1ccrl.7m",  0x400000, 0x200000, CRC(b7bc43c2) SHA1(f4b470540194486ca6822f438fc1d4700cfb2ab1) )
	1814	ROM_LOAD( "pnp1ccrh.7k",  0x600000, 0x200000, CRC(caaf1b73) SHA1(b436992817ab4e4dad05e7429eb102d4fb57fa6a) )
	1815
	1816	ROM_REGION32_LE( 0x2000000, "pointrom", 0 )   /* 3D model data */
	1817	ROM_LOAD32_WORD( "pnp1pt0l.7c",  0x000000, 0x400000, CRC(26af5fa1) SHA1(12fcf98c2a59643e0fdfdd7186f9f16baf54a9cf) )
	1818	ROM_LOAD32_WORD( "pnp1pt0h.7a",  0x000002, 0x400000, CRC(43fc2246) SHA1(301d321cd4a01ebd7ccfa6f295d6c3daf0a19efe) )
	1819	ROM_LOAD32_WORD( "pnp1pt1l.5c",  0x800000, 0x400000, CRC(15c6f236) SHA1(e8c393359a91cdce6e9110a48c0a80708f8fc132) )
	1820	ROM_LOAD32_WORD( "pnp1pt1h.5a",  0x800002, 0x400000, CRC(1ff470c0) SHA1(ca8fad90743589744939d681b0ce94f368337b3f) )
	1821
	1822	ROM_REGION( 0x1000000, "c352", 0 ) /* C352 PCM samples */
	1823	ROM_LOAD( "pnp1wavel.2c", 0x000000, 0x800000, CRC(35c6a9bd) SHA1(4b56fdc37525c15e57d93091e6609d6a6905fc5c) )
	1824	ROM_LOAD( "pnp1waveh.2a", 0x800000, 0x800000, CRC(6fa1826a) SHA1(20a5af49e65ae2bc57c016b5cd9bafa5a5220d35) )
	1825	ROM_END
	1826
	1827
1726	1828	/* Games */
1727	1829	GAME( 1997, rapidrvr, 0,      gorgon, ss23, ss23, ROT0, "Namco", "Rapid River (RD3 Ver. C)", GAME_NOT_WORKING | GAME_UNEMULATED_PROTECTION | GAME_IMPERFECT_SOUND )
1728	1830	GAME( 1997, motoxgo,  0,         s23, ss23, ss23, ROT0, "Namco", "Motocross Go! (MG3 Ver. A)", GAME_NOT_WORKING | GAME_UNEMULATED_PROTECTION | GAME_IMPERFECT_SOUND )
1729	1831	GAME( 1997, timecrs2, 0,         s23, ss23, ss23, ROT0, "Namco", "Time Crisis 2 (TSS3 Ver. B)", GAME_NOT_WORKING | GAME_UNEMULATED_PROTECTION | GAME_IMPERFECT_SOUND )
1730	1832	GAME( 1997, timcrs2b, timecrs2,  s23, ss23, ss23, ROT0, "Namco", "Time Crisis 2 (TSS2 Ver. B)", GAME_NOT_WORKING | GAME_UNEMULATED_PROTECTION | GAME_IMPERFECT_SOUND )
	1833	GAME( 1998, panicprk, 0,        ss23, ss23, ss23, ROT0, "Namco", "Panic Park (PNP2 Ver. A)", GAME_NOT_WORKING | GAME_UNEMULATED_PROTECTION | GAME_IMPERFECT_SOUND )
1731	1834	GAME( 1999, 500gp,    0,        ss23, ss23, ss23, ROT0, "Namco", "500GP", GAME_NOT_WORKING | GAME_UNEMULATED_PROTECTION | GAME_IMPERFECT_SOUND )
1732	1835	GAME( 1999, finfurl2, 0,        ss23, ss23, ss23, ROT0, "Namco", "Final Furlong 2 (World)", GAME_NOT_WORKING | GAME_UNEMULATED_PROTECTION | GAME_IMPERFECT_SOUND )
1733	1836	GAME( 1999, finfrl2j, finfurl2, ss23, ss23, ss23, ROT0, "Namco", "Final Furlong 2 (Japan)", GAME_NOT_WORKING | GAME_UNEMULATED_PROTECTION | GAME_IMPERFECT_SOUND )

src/mame/drivers/inufuku.c

r4679	r4680
99	99
100	100	pending_command = 1;
101	101	soundlatch_w(space, 0, data & 0xff);
102		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_NMI, PULSE_LINE);
	102	cputag_set_input_line(space->machine, "audiocpu", INPUT_LINE_NMI, PULSE_LINE);
103	103	}
104	104	}
105	105
r4679	r4680
129	129
130	130	static DRIVER_INIT( inufuku )
131	131	{
132		const address_space *space = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM);
	132	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
133	133	pending_command = 1;
134	134	inufuku_soundrombank_w(space, 0, 0);
135	135	}
r4679	r4680
219	219	static ADDRESS_MAP_START( inufuku_readmem_sound, ADDRESS_SPACE_PROGRAM, 8 )
220	220	AM_RANGE(0x0000, 0x77ff) AM_READ(SMH_ROM)
221	221	AM_RANGE(0x7800, 0x7fff) AM_READ(SMH_RAM)
222		AM_RANGE(0x8000, 0xffff) AM_READ(SMH_BANK1)
	222	AM_RANGE(0x8000, 0xffff) AM_READ(SMH_BANK(1))
223	223	ADDRESS_MAP_END
224	224
225	225	static ADDRESS_MAP_START( inufuku_writemem_sound, ADDRESS_SPACE_PROGRAM, 8 )
r4679	r4680
351	351
352	352	static void irqhandler(const device_config *device, int irq)
353	353	{
354		cpu_set_input_line(device->machine->cpu[1], 0, irq ? ASSERT_LINE : CLEAR_LINE);
	354	cputag_set_input_line(device->machine, "audiocpu", 0, irq ? ASSERT_LINE : CLEAR_LINE);
355	355	}
356	356
357	357	static const ym2610_interface ym2610_config =

src/mame/drivers/commando.c

r4679	r4680
506	506	{
507	507	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
508	508	UINT8 *rom = memory_region(machine, "maincpu");
509		UINT8 *decrypt = auto_malloc(0xc000);
	509	UINT8 *decrypt = auto_alloc_array(machine, UINT8, 0xc000);
510	510	int A;
511	511
512	512	memory_set_decrypted_region(space, 0x0000, 0xbfff, decrypt);
r4679	r4680
526	526	{
527	527	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
528	528	UINT8 *rom = memory_region(machine, "maincpu");
529		UINT8 *decrypt = auto_malloc(0xc000);
	529	UINT8 *decrypt = auto_alloc_array(machine, UINT8, 0xc000);
530	530	int A;
531	531
532	532	memory_set_decrypted_region(space, 0x0000, 0xbfff, decrypt);

src/mame/drivers/atarisy2.c

r4679	r4680
185	185	static void update_interrupts(running_machine *machine)
186	186	{
187	187	if (atarigen_video_int_state)
188		cpu_set_input_line(machine->cpu[0], 3, ASSERT_LINE);
	188	cputag_set_input_line(machine, "maincpu", 3, ASSERT_LINE);
189	189	else
190		cpu_set_input_line(machine->cpu[0], 3, CLEAR_LINE);
	190	cputag_set_input_line(machine, "maincpu", 3, CLEAR_LINE);
191	191
192	192	if (atarigen_scanline_int_state)
193		cpu_set_input_line(machine->cpu[0], 2, ASSERT_LINE);
	193	cputag_set_input_line(machine, "maincpu", 2, ASSERT_LINE);
194	194	else
195		cpu_set_input_line(machine->cpu[0], 2, CLEAR_LINE);
	195	cputag_set_input_line(machine, "maincpu", 2, CLEAR_LINE);
196	196
197	197	if (p2portwr_state)
198		cpu_set_input_line(machine->cpu[0], 1, ASSERT_LINE);
	198	cputag_set_input_line(machine, "maincpu", 1, ASSERT_LINE);
199	199	else
200		cpu_set_input_line(machine->cpu[0], 1, CLEAR_LINE);
	200	cputag_set_input_line(machine, "maincpu", 1, CLEAR_LINE);
201	201
202	202	if (p2portrd_state)
203		cpu_set_input_line(machine->cpu[0], 0, ASSERT_LINE);
	203	cputag_set_input_line(machine, "maincpu", 0, ASSERT_LINE);
204	204	else
205		cpu_set_input_line(machine->cpu[0], 0, CLEAR_LINE);
	205	cputag_set_input_line(machine, "maincpu", 0, CLEAR_LINE);
206	206	}
207	207
208	208
r4679	r4680
220	220	/* generate the 32V interrupt (IRQ 2) */
221	221	if ((scanline % 64) == 0)
222	222	if (interrupt_enable & 4)
223		atarigen_scanline_int_gen(screen->machine->cpu[0]);
	223	atarigen_scanline_int_gen(cputag_get_cpu(screen->machine, "maincpu"));
224	224	}
225	225	}
226	226
r4679	r4680
262	262	atarigen_eeprom_reset();
263	263	slapstic_reset();
264	264	atarigen_interrupt_reset(update_interrupts);
265		atarigen_sound_io_reset(machine->cpu[1]);
	265	atarigen_sound_io_reset(cputag_get_cpu(machine, "soundcpu"));
266	266	atarigen_scanline_timer_reset(machine->primary_screen, scanline_update, 64);
267		memory_set_direct_update_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), atarisy2_direct_handler);
	267	memory_set_direct_update_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), atarisy2_direct_handler);
268	268
269	269	tms5220_data_strobe = 1;
270	270
r4679	r4680
302	302	{
303	303	/* reset sound CPU */
304	304	if (ACCESSING_BITS_0_7)
305		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_RESET, (data & 1) ? ASSERT_LINE : CLEAR_LINE);
	305	cputag_set_input_line(space->machine, "soundcpu", INPUT_LINE_RESET, (data & 1) ? ASSERT_LINE : CLEAR_LINE);
306	306	}
307	307
308	308
r4679	r4680
361	361
362	362	static STATE_POSTLOAD( bankselect_postload )
363	363	{
364		const address_space *space = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM);
	364	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
365	365
366	366	bankselect_w(space, 0, bankselect[0], 0xffff);
367	367	bankselect_w(space, 1, bankselect[1], 0xffff);
r4679	r4680
457	457	/* if the joystick is centered, leave the rest of this alone */
458	458	angle = last_angle;
459	459	if (analogx < -32 || analogx > 32 || analogy < -32 || analogy > 32)
460		angle = atan2(analogx, analogy) * 360 / (2 * M_PI);
	460	angle = atan2((double)analogx, (double)analogy) * 360 / (2 * M_PI);
461	461
462	462	/* detect when we pass the 0 point in either direction */
463	463	if (last_angle < -90 && angle > 90)
r4679	r4680
630	630	return;
631	631
632	632	/* a large number of signals are reset when this happens */
633		atarigen_sound_io_reset(space->machine->cpu[1]);
	633	atarigen_sound_io_reset(cputag_get_cpu(space->machine, "soundcpu"));
634	634	devtag_reset(space->machine, "ym");
635	635	mixer_w(space, 0, 0);
636	636	tms5220_data = 0;

src/mame/drivers/mjsister.c

r4679	r4680
151	151
152	152	/****************************************************************************/
153	153
154		static ADDRESS_MAP_START( mjsister_readmem, ADDRESS_SPACE_PROGRAM, 8 )
155		AM_RANGE(0x0000, 0x77ff) AM_READ(SMH_ROM)
156		AM_RANGE(0x7800, 0x7fff) AM_READ(SMH_RAM)
157		AM_RANGE(0x8000, 0xffff) AM_READ(SMH_BANK1)
	154	static ADDRESS_MAP_START( mjsister_map, ADDRESS_SPACE_PROGRAM, 8 )
	155	AM_RANGE(0x0000, 0x77ff) AM_ROM
	156	AM_RANGE(0x7800, 0x7fff) AM_RAM
	157	AM_RANGE(0x8000, 0xffff) AM_ROMBANK(1) AM_WRITE(mjsister_videoram_w)
158	158	ADDRESS_MAP_END
159	159
160		static ADDRESS_MAP_START( mjsister_writemem, ADDRESS_SPACE_PROGRAM, 8 )
161		AM_RANGE(0x0000, 0x77ff) AM_WRITE(SMH_ROM)
162		AM_RANGE(0x7800, 0x7fff) AM_WRITE(SMH_RAM)
163		AM_RANGE(0x8000, 0xffff) AM_WRITE(mjsister_videoram_w)
164		ADDRESS_MAP_END
165
166	160	static ADDRESS_MAP_START( mjsister_io_map, ADDRESS_SPACE_IO, 8 )
167	161	ADDRESS_MAP_GLOBAL_MASK(0xff)
168	162	AM_RANGE(0x00, 0x01) AM_WRITENOP /* HD46505? */
r4679	r4680
179	173	AM_RANGE(0x35, 0x35) AM_WRITE(mjsister_dac_adr_e_w)
180	174	ADDRESS_MAP_END
181	175
	176
182	177	/****************************************************************************/
183	178
184	179	static INPUT_PORTS_START( mjsister )
r4679	r4680
309	304
310	305	/* basic machine hardware */
311	306	MDRV_CPU_ADD("maincpu", Z80, MCLK/2) /* 6.000 MHz */
312		MDRV_CPU_PROGRAM_MAP(mjsister_readmem,mjsister_writemem)
	307	MDRV_CPU_PROGRAM_MAP(mjsister_map,0)
313	308	MDRV_CPU_IO_MAP(mjsister_io_map,0)
314	309	MDRV_CPU_VBLANK_INT_HACK(irq0_line_hold,2)
315	310

src/mame/drivers/ninjakd2.c

r4679	r4680
199	199	static WRITE8_HANDLER( ninjakd2_soundreset_w )
200	200	{
201	201	// bit 4 resets sound CPU
202		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_RESET, (data & 0x10) ? ASSERT_LINE : CLEAR_LINE);
	202	cputag_set_input_line(space->machine, "soundcpu", INPUT_LINE_RESET, (data & 0x10) ? ASSERT_LINE : CLEAR_LINE);
203	203
204	204	// bit 7 flips screen
205	205	flip_screen_set(space->machine, data & 0x80);
r4679	r4680
214	214	running_machine *machine = device->machine;
215	215	const UINT8* const rom = memory_region(machine, "pcm");
216	216	const int length = memory_region_length(machine, "pcm");
217		INT16* const sampledata = auto_malloc(length * sizeof(sampledata[0]));
	217	INT16* sampledata = auto_alloc_array(machine, INT16, length);
218	218
219	219	int i;
220	220
r4679	r4680
905	905
906	906	static void irqhandler(const device_config *device, int irq)
907	907	{
908		cpu_set_input_line(device->machine->cpu[1], 0, irq ? ASSERT_LINE : CLEAR_LINE);
	908	cputag_set_input_line(device->machine, "soundcpu", 0, irq ? ASSERT_LINE : CLEAR_LINE);
909	909	}
910	910
911	911	static const ym2203_interface ym2203_config =
r4679	r4680
997	997	MDRV_SOUND_REMOVE("pcm")
998	998	MACHINE_DRIVER_END
999	999
	1000	static MACHINE_DRIVER_START( arkarea )
	1001
	1002	/* basic machine hardware */
	1003	MDRV_IMPORT_FROM(ninjakd2)
	1004
	1005	MDRV_CPU_MODIFY("maincpu")
	1006	MDRV_CPU_PROGRAM_MAP(mnight_main_cpu,0)
	1007
	1008	/* video hardware */
	1009	MDRV_VIDEO_START(arkarea)
	1010
	1011	/* sound hardware */
	1012	MDRV_SOUND_REMOVE("pcm")
	1013	MACHINE_DRIVER_END
	1014
1000	1015	static MACHINE_DRIVER_START( robokid )
1001	1016
1002	1017	/* basic machine hardware */
r4679	r4680
1405	1420	/******************************************************************************
1406	1421
1407	1422	Gfx ROMs in the older games have an unusual layout, where a high address bit
1408		(which is no the top bit) separates parts of the same tile. To make it possible
	1423	(which is not the top bit) separates parts of the same tile. To make it possible
1409	1424	to decode graphics without resorting to ROM_CONTINUE trickery, this function
1410	1425	makes an address line rotation, bringing bit "bit" to bit 0 and shifting left
1411	1426	by one place all the intervening bits.
r4679	r4680
1418	1433
1419	1434	UINT8* const src = memory_region(machine, region);
1420	1435
1421		UINT8* const temp = malloc_or_die(length);
	1436	UINT8* const temp = alloc_array_or_die(UINT8, length);
1422	1437
1423	1438	const int mask = (1 << (bit + 1)) - 1;
1424	1439
r4679	r4680
1484	1499	GAME( 1987, ninjak2b, ninjakd2, ninjakd2, rdaction, bootleg,  ROT0,   "UPL", "Ninja-Kid II / NinjaKun Ashura no Shou (set 3, bootleg?)", 0 )
1485	1500	GAME( 1987, rdaction, ninjakd2, ninjakd2, rdaction, ninjakd2, ROT0,   "UPL (World Games license)", "Rad Action / NinjaKun Ashura no Shou", 0 )
1486	1501	GAME( 1987, mnight,   0,        mnight,   mnight,   mnight,   ROT0,   "UPL (Kawakus license)", "Mutant Night", GAME_IMPERFECT_GRAPHICS )
1487		GAME( 1987, arkarea,  0,        mnight,   arkarea,  mnight,   ROT0,   "UPL", "Ark Area", GAME_IMPERFECT_GRAPHICS )
1488		GAME( 1988, robokid,  0,        robokid,  robokid,  0,        ROT0,   "UPL", "Atomic Robo-kid", GAME_IMPERFECT_GRAPHICS )
1489		GAME( 1988, robokidj, robokid,  robokid,  robokidj, 0,        ROT0,   "UPL", "Atomic Robo-kid (Japan, set 1)", GAME_IMPERFECT_GRAPHICS )
1490		GAME( 1988, robokdj2, robokid,  robokid,  robokidj, 0,        ROT0,   "UPL", "Atomic Robo-kid (Japan, set 2)", GAME_IMPERFECT_GRAPHICS )
1491		GAME( 1989, omegaf,   0,        omegaf,   omegaf,   0,        ROT270, "UPL", "Omega Fighter", GAME_IMPERFECT_GRAPHICS )
1492		GAME( 1989, omegafs,  omegaf,   omegaf,   omegaf,   0,        ROT270, "UPL", "Omega Fighter Special", GAME_IMPERFECT_GRAPHICS )
	1502	GAME( 1987, arkarea,  0,        arkarea,  arkarea,  mnight,   ROT0,   "UPL", "Ark Area", 0 )
	1503	GAME( 1988, robokid,  0,        robokid,  robokid,  0,        ROT0,   "UPL", "Atomic Robo-kid", 0 )
	1504	GAME( 1988, robokidj, robokid,  robokid,  robokidj, 0,        ROT0,   "UPL", "Atomic Robo-kid (Japan, set 1)", 0 )
	1505	GAME( 1988, robokdj2, robokid,  robokid,  robokidj, 0,        ROT0,   "UPL", "Atomic Robo-kid (Japan, set 2)", 0 )
	1506	GAME( 1989, omegaf,   0,        omegaf,   omegaf,   0,        ROT270, "UPL", "Omega Fighter", 0 )
	1507	GAME( 1989, omegafs,  omegaf,   omegaf,   omegaf,   0,        ROT270, "UPL", "Omega Fighter Special", 0 )

src/mame/drivers/yunsung8.c

r4679	r4680
55	55
56	56	static MACHINE_RESET( yunsung8 )
57	57	{
58		const address_space *space = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM);
59		UINT8* yunsung8_videoram = auto_malloc(0x4000);
	58	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	59	UINT8* yunsung8_videoram = auto_alloc_array(machine, UINT8, 0x4000);
60	60
61	61	yunsung8_videoram_0 = yunsung8_videoram + 0x0000;   // Ram is banked
62	62	yunsung8_videoram_1 = yunsung8_videoram + 0x2000;
63		yunsung8_videobank_w(space,0,0);
	63	yunsung8_videobank_w(space, 0, 0);
64	64	}
65	65
66	66
r4679	r4680
99	99
100	100	static ADDRESS_MAP_START( main_map, ADDRESS_SPACE_PROGRAM, 8 )
101	101	AM_RANGE(0x0001, 0x0001) AM_WRITE(yunsung8_bankswitch_w   )   // ROM Bank (again?)
102		AM_RANGE(0x8000, 0xbfff) AM_READ(SMH_BANK1            )   // Banked ROM
	102	AM_RANGE(0x8000, 0xbfff) AM_READ(SMH_BANK(1)            )   // Banked ROM
103	103	AM_RANGE(0x0000, 0xbfff) AM_ROM
104	104	AM_RANGE(0xc000, 0xdfff) AM_READWRITE(yunsung8_videoram_r, yunsung8_videoram_w   )   // Video RAM (Banked)
105	105	AM_RANGE(0xe000, 0xffff) AM_RAM
r4679	r4680
155	155
156	156	static ADDRESS_MAP_START( sound_map, ADDRESS_SPACE_PROGRAM, 8 )
157	157	AM_RANGE(0x0000, 0x7fff) AM_ROM
158		AM_RANGE(0x8000, 0xbfff) AM_READWRITE(SMH_BANK2,SMH_ROM      )   // Banked ROM
	158	AM_RANGE(0x8000, 0xbfff) AM_READWRITE(SMH_BANK(2),SMH_ROM      )   // Banked ROM
159	159	AM_RANGE(0xe000, 0xe000) AM_DEVWRITE("msm", yunsung8_sound_bankswitch_w   )   // ROM Bank
160	160	AM_RANGE(0xe400, 0xe400) AM_WRITE(yunsung8_adpcm_w            )
161	161	AM_RANGE(0xec00, 0xec01) AM_DEVWRITE("ym", ym3812_w      )
r4679	r4680
486	486
487	487	static void yunsung8_adpcm_int(const device_config *device)
488	488	{
489		static int toggle=0;
	489	static int toggle = 0;
490	490
491		msm5205_data_w (device,adpcm>>4);
492		adpcm<<=4;
	491	msm5205_data_w(device, adpcm >> 4);
	492	adpcm <<= 4;
493	493
494	494	toggle ^= 1;
495	495	if (toggle)
496		cpu_set_input_line(device->machine->cpu[1], INPUT_LINE_NMI, PULSE_LINE);
	496	cputag_set_input_line(device->machine, "audiocpu", INPUT_LINE_NMI, PULSE_LINE);
497	497	}
498	498
499	499	static const msm5205_interface yunsung8_msm5205_interface =

src/mame/drivers/spacefb.c

r4679	r4680
128	128	/* compute vector and set the interrupt line */
129	129	int vpos = video_screen_get_vpos(machine->primary_screen);
130	130	UINT8 vector = 0xc7 | ((vpos & 0x40) >> 2) | ((~vpos & 0x40) >> 3);
131		cpu_set_input_line_and_vector(machine->cpu[0], 0, HOLD_LINE, vector);
	131	cputag_set_input_line_and_vector(machine, "maincpu", 0, HOLD_LINE, vector);
132	132
133	133	/* set up for next interrupt */
134	134	if (vpos == SPACEFB_INT_TRIGGER_COUNT_1)
r4679	r4680
174	174
175	175	static MACHINE_RESET( spacefb )
176	176	{
177		const address_space *space = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_IO);
	177	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_IO);
178	178	/* the 3 output ports are cleared on reset */
179	179	spacefb_port_0_w(space, 0, 0);
180	180	spacefb_port_1_w(space, 0, 0);

src/mame/drivers/warpwarp.c

r4679	r4680
290	290	break;
291	291	case 6:
292	292	warpwarp_ball_on = data & 1;
293		cpu_interrupt_enable(space->machine->cpu[0],data & 1);
	293	cpu_interrupt_enable(cputag_get_cpu(space->machine, "maincpu"), data & 1);
294	294	if (~data & 1)
295		cpu_set_input_line(space->machine->cpu[0], 0, CLEAR_LINE);
	295	cputag_set_input_line(space->machine, "maincpu", 0, CLEAR_LINE);
296	296	break;
297	297	case 7:
298	298	flip_screen_set(space->machine, data & 1);

src/mame/drivers/cubocd32.c

r4679	r4680
64	64	/* swap the write handlers between ROM and bank 1 based on the bit */
65	65	if ((data & 1) == 0)
66	66	/* overlay disabled, map RAM on 0x000000 */
67		memory_install_write32_handler(space, 0x000000, 0x1fffff, 0, 0, SMH_BANK1);
	67	memory_install_write32_handler(space, 0x000000, 0x1fffff, 0, 0, (write32_space_func)SMH_BANK(1));
68	68	else
69	69	/* overlay enabled, map Amiga system ROM on 0x000000 */
70		memory_install_write32_handler(space, 0x000000, 0x1fffff, 0, 0, SMH_UNMAP);
	70	memory_install_write32_handler(space, 0x000000, 0x1fffff, 0, 0, (write32_space_func)SMH_UNMAP);
71	71	}
72	72	}
73	73

src/mame/drivers/wheelfir.c

r4679	r4680
574	574	{
575	575	timer_call_after_resynch(machine, NULL, 0, 0);
576	576
577		if (scanline_counter!=(total_scanlines-1))
	577	if (scanline_counter != (total_scanlines - 1))
578	578	{
579	579	scanline_counter++;
580		cpu_set_input_line(machine->cpu[0], 5, HOLD_LINE); // raster IRQ, changes scroll values for road
	580	cputag_set_input_line(machine, "maincpu", 5, HOLD_LINE); // raster IRQ, changes scroll values for road
581	581	timer_adjust_oneshot(scanline_timer, attotime_div(ATTOTIME_IN_HZ(60), total_scanlines), 0);
582	582
583		if (scanline_counter<256)
	583	if (scanline_counter < 256)
584	584	{
585	585	render_background_to_render_buffer(scanline_counter);
586	586	}
587	587
588		if (scanline_counter==256)
	588	if (scanline_counter == 256)
589	589	{
590		cpu_set_input_line(machine->cpu[0], 3, HOLD_LINE); // vblank IRQ?
	590	cputag_set_input_line(machine, "maincpu", 3, HOLD_LINE); // vblank IRQ?
591	591	toggle_bit = 0x8000; // must toggle..
592	592	}
593	593
594		if (scanline_counter==0)
	594	if (scanline_counter == 0)
595	595	{
596	596	toggle_bit = 0x0000; // must toggle..
597	597	}

src/mame/drivers/cbuster.c

r4679	r4680
39	39
40	40	static WRITE16_HANDLER( twocrude_control_w )
41	41	{
42		switch (offset<<1) {
	42	switch (offset << 1)
	43	{
43	44	case 0: /* DMA flag */
44		buffer_spriteram16_w(space,0,0,0xffff);
	45	buffer_spriteram16_w(space, 0, 0, 0xffff);
45	46	return;
46	47
47	48	case 6: /* IRQ ack */
48	49	return;
49	50
50	51	case 2: /* Sound CPU write */
51		soundlatch_w(space,0,data & 0xff);
52		cpu_set_input_line(space->machine->cpu[1],0,HOLD_LINE);
	52	soundlatch_w(space, 0, data & 0xff);
	53	cputag_set_input_line(space->machine, "audiocpu", 0, HOLD_LINE);
53	54	return;
54	55
55	56	case 4: /* Protection, maybe this is a PAL on the board?
r4679	r4680
69	70	protection?!
70	71
71	72	*/
72		if ((data&0xffff)==0x9a00) prot=0;
73		if ((data&0xffff)==0xaa) prot=0x74;
74		if ((data&0xffff)==0x0200) prot=0x63<<8;
75		if ((data&0xffff)==0x9a) prot=0xe;
76		if ((data&0xffff)==0x55) prot=0x1e;
77		if ((data&0xffff)==0x0e) {prot=0x0e;twocrude_pri_w(0);} /* start */
78		if ((data&0xffff)==0x00) {prot=0x0e;twocrude_pri_w(0);} /* level 0 */
79		if ((data&0xffff)==0xf1) {prot=0x36;twocrude_pri_w(1);} /* level 1 */
80		if ((data&0xffff)==0x80) {prot=0x2e;twocrude_pri_w(1);} /* level 2 */
81		if ((data&0xffff)==0x40) {prot=0x1e;twocrude_pri_w(1);} /* level 3 */
82		if ((data&0xffff)==0xc0) {prot=0x3e;twocrude_pri_w(0);} /* level 4 */
83		if ((data&0xffff)==0xff) {prot=0x76;twocrude_pri_w(1);} /* level 5 */
	73	if ((data & 0xffff) == 0x9a00) prot = 0;
	74	if ((data & 0xffff) == 0xaa)   prot = 0x74;
	75	if ((data & 0xffff) == 0x0200) prot = 0x63 << 8;
	76	if ((data & 0xffff) == 0x9a)   prot = 0xe;
	77	if ((data & 0xffff) == 0x55)   prot = 0x1e;
	78	if ((data & 0xffff) == 0x0e)  {prot = 0x0e; twocrude_pri_w(0);} /* start */
	79	if ((data & 0xffff) == 0x00)  {prot = 0x0e; twocrude_pri_w(0);} /* level 0 */
	80	if ((data & 0xffff) == 0xf1)  {prot = 0x36; twocrude_pri_w(1);} /* level 1 */
	81	if ((data & 0xffff) == 0x80)  {prot = 0x2e; twocrude_pri_w(1);} /* level 2 */
	82	if ((data & 0xffff) == 0x40)  {prot = 0x1e; twocrude_pri_w(1);} /* level 3 */
	83	if ((data & 0xffff) == 0xc0)  {prot = 0x3e; twocrude_pri_w(0);} /* level 4 */
	84	if ((data & 0xffff) == 0xff)  {prot = 0x76; twocrude_pri_w(1);} /* level 5 */
84	85
85	86	break;
86	87	}
87		logerror("Warning %04x- %02x written to control %02x\n",cpu_get_pc(space->cpu),data,offset);
	88	logerror("Warning %04x- %02x written to control %02x\n", cpu_get_pc(space->cpu), data, offset);
88	89	}
89	90
90	91	static READ16_HANDLER( twocrude_control_r )
r4679	r4680
110	111
111	112	/******************************************************************************/
112	113
113		static ADDRESS_MAP_START( twocrude_readmem, ADDRESS_SPACE_PROGRAM, 16 )
114		AM_RANGE(0x000000, 0x07ffff) AM_READ(SMH_ROM)
115		AM_RANGE(0x080000, 0x083fff) AM_READ(SMH_RAM)
	114	static ADDRESS_MAP_START( twocrude_map, ADDRESS_SPACE_PROGRAM, 16 )
	115	AM_RANGE(0x000000, 0x07ffff) AM_ROM
	116	AM_RANGE(0x080000, 0x083fff) AM_RAM AM_BASE(&twocrude_ram)
116	117
117		AM_RANGE(0x0a0000, 0x0a1fff) AM_READ(SMH_RAM)
118		AM_RANGE(0x0a2000, 0x0a2fff) AM_READ(SMH_RAM)
119		AM_RANGE(0x0a4000, 0x0a47ff) AM_READ(SMH_RAM)
120		AM_RANGE(0x0a6000, 0x0a67ff) AM_READ(SMH_RAM)
	118	AM_RANGE(0x0a0000, 0x0a1fff) AM_RAM_WRITE(deco16_pf1_data_w) AM_BASE(&deco16_pf1_data)
	119	AM_RANGE(0x0a2000, 0x0a2fff) AM_RAM_WRITE(deco16_pf2_data_w) AM_BASE(&deco16_pf2_data)
	120	AM_RANGE(0x0a4000, 0x0a47ff) AM_RAM AM_BASE(&deco16_pf1_rowscroll)
	121	AM_RANGE(0x0a6000, 0x0a67ff) AM_RAM AM_BASE(&deco16_pf2_rowscroll)
121	122
122		AM_RANGE(0x0a8000, 0x0a8fff) AM_READ(SMH_RAM)
123		AM_RANGE(0x0aa000, 0x0aafff) AM_READ(SMH_RAM)
124		AM_RANGE(0x0ac000, 0x0ac7ff) AM_READ(SMH_RAM)
125		AM_RANGE(0x0ae000, 0x0ae7ff) AM_READ(SMH_RAM)
	123	AM_RANGE(0x0a8000, 0x0a8fff) AM_RAM_WRITE(deco16_pf3_data_w) AM_BASE(&deco16_pf3_data)
	124	AM_RANGE(0x0aa000, 0x0aafff) AM_RAM_WRITE(deco16_pf4_data_w) AM_BASE(&deco16_pf4_data)
	125	AM_RANGE(0x0ac000, 0x0ac7ff) AM_RAM AM_BASE(&deco16_pf3_rowscroll)
	126	AM_RANGE(0x0ae000, 0x0ae7ff) AM_RAM AM_BASE(&deco16_pf4_rowscroll)
126	127
127		AM_RANGE(0x0b0000, 0x0b07ff) AM_READ(SMH_RAM)
128		AM_RANGE(0x0b8000, 0x0b8fff) AM_READ(SMH_RAM)
129		AM_RANGE(0x0b9000, 0x0b9fff) AM_READ(SMH_RAM)
130		AM_RANGE(0x0bc000, 0x0bc00f) AM_READ(twocrude_control_r)
131		ADDRESS_MAP_END
132
133		static ADDRESS_MAP_START( twocrude_writemem, ADDRESS_SPACE_PROGRAM, 16 )
134		AM_RANGE(0x000000, 0x07ffff) AM_WRITE(SMH_ROM)
135		AM_RANGE(0x080000, 0x083fff) AM_WRITE(SMH_RAM) AM_BASE(&twocrude_ram)
136
137		AM_RANGE(0x0a0000, 0x0a1fff) AM_WRITE(deco16_pf1_data_w) AM_BASE(&deco16_pf1_data)
138		AM_RANGE(0x0a2000, 0x0a2fff) AM_WRITE(deco16_pf2_data_w) AM_BASE(&deco16_pf2_data)
139		AM_RANGE(0x0a4000, 0x0a47ff) AM_WRITE(SMH_RAM) AM_BASE(&deco16_pf1_rowscroll)
140		AM_RANGE(0x0a6000, 0x0a67ff) AM_WRITE(SMH_RAM) AM_BASE(&deco16_pf2_rowscroll)
141
142		AM_RANGE(0x0a8000, 0x0a8fff) AM_WRITE(deco16_pf3_data_w) AM_BASE(&deco16_pf3_data)
143		AM_RANGE(0x0aa000, 0x0aafff) AM_WRITE(deco16_pf4_data_w) AM_BASE(&deco16_pf4_data)
144		AM_RANGE(0x0ac000, 0x0ac7ff) AM_WRITE(SMH_RAM) AM_BASE(&deco16_pf3_rowscroll)
145		AM_RANGE(0x0ae000, 0x0ae7ff) AM_WRITE(SMH_RAM) AM_BASE(&deco16_pf4_rowscroll)
146
147		AM_RANGE(0x0b0000, 0x0b07ff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)
	128	AM_RANGE(0x0b0000, 0x0b07ff) AM_RAM AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)
148	129	AM_RANGE(0x0b4000, 0x0b4001) AM_WRITENOP
149
150	130	AM_RANGE(0x0b5000, 0x0b500f) AM_WRITE(SMH_RAM) AM_BASE(&deco16_pf12_control)
151	131	AM_RANGE(0x0b6000, 0x0b600f) AM_WRITE(SMH_RAM) AM_BASE(&deco16_pf34_control)
152
153		AM_RANGE(0x0b8000, 0x0b8fff) AM_WRITE(twocrude_palette_24bit_rg_w) AM_BASE(&paletteram16)
154		AM_RANGE(0x0b9000, 0x0b9fff) AM_WRITE(twocrude_palette_24bit_b_w) AM_BASE(&paletteram16_2)
155		AM_RANGE(0x0bc000, 0x0bc00f) AM_WRITE(twocrude_control_w)
	132	AM_RANGE(0x0b8000, 0x0b8fff) AM_RAM_WRITE(twocrude_palette_24bit_rg_w) AM_BASE(&paletteram16)
	133	AM_RANGE(0x0b9000, 0x0b9fff) AM_RAM_WRITE(twocrude_palette_24bit_b_w) AM_BASE(&paletteram16_2)
	134	AM_RANGE(0x0bc000, 0x0bc00f) AM_READWRITE(twocrude_control_r, twocrude_control_w)
156	135	ADDRESS_MAP_END
157	136
158	137	/******************************************************************************/
159	138
160		static ADDRESS_MAP_START( sound_readmem, ADDRESS_SPACE_PROGRAM, 8 )
161		AM_RANGE(0x000000, 0x00ffff) AM_READ(SMH_ROM)
162		AM_RANGE(0x100000, 0x100001) AM_DEVREAD("ym1", ym2203_r)
163		AM_RANGE(0x110000, 0x110001) AM_DEVREAD("ym2", ym2151_r)
164		AM_RANGE(0x120000, 0x120001) AM_DEVREAD("oki1", okim6295_r)
165		AM_RANGE(0x130000, 0x130001) AM_DEVREAD("oki2", okim6295_r)
	139	static ADDRESS_MAP_START( sound_map, ADDRESS_SPACE_PROGRAM, 8 )
	140	AM_RANGE(0x000000, 0x00ffff) AM_ROM
	141	AM_RANGE(0x100000, 0x100001) AM_DEVREADWRITE("ym1", ym2203_r, ym2203_w)
	142	AM_RANGE(0x110000, 0x110001) AM_DEVREADWRITE("ym2", ym2151_r, ym2151_w)
	143	AM_RANGE(0x120000, 0x120001) AM_DEVREADWRITE("oki1", okim6295_r, okim6295_w)
	144	AM_RANGE(0x130000, 0x130001) AM_DEVREADWRITE("oki2", okim6295_r, okim6295_w)
166	145	AM_RANGE(0x140000, 0x140001) AM_READ(soundlatch_r)
167		AM_RANGE(0x1f0000, 0x1f1fff) AM_READ(SMH_BANK8)
168		ADDRESS_MAP_END
169
170		static ADDRESS_MAP_START( sound_writemem, ADDRESS_SPACE_PROGRAM, 8 )
171		AM_RANGE(0x000000, 0x00ffff) AM_WRITE(SMH_ROM)
172		AM_RANGE(0x100000, 0x100001) AM_DEVWRITE("ym1", ym2203_w)
173		AM_RANGE(0x110000, 0x110001) AM_DEVWRITE("ym2", ym2151_w)
174		AM_RANGE(0x120000, 0x120001) AM_DEVWRITE("oki1", okim6295_w)
175		AM_RANGE(0x130000, 0x130001) AM_DEVWRITE("oki2", okim6295_w)
176		AM_RANGE(0x1f0000, 0x1f1fff) AM_WRITE(SMH_BANK8)
	146	AM_RANGE(0x1f0000, 0x1f1fff) AM_RAMBANK(8)
177	147	AM_RANGE(0x1fec00, 0x1fec01) AM_WRITE(h6280_timer_w)
178	148	AM_RANGE(0x1ff400, 0x1ff403) AM_WRITE(h6280_irq_status_w)
179	149	ADDRESS_MAP_END
r4679	r4680
303	273
304	274	static void sound_irq(const device_config *device, int state)
305	275	{
306		cpu_set_input_line(device->machine->cpu[1],1,state); /* IRQ 2 */
	276	cputag_set_input_line(device->machine, "audiocpu", 1, state); /* IRQ 2 */
307	277	}
308	278
309	279	static const ym2151_interface ym2151_config =
r4679	r4680
315	285
316	286	/* basic machine hardware */
317	287	MDRV_CPU_ADD("maincpu", M68000, 12000000) /* Custom chip 59 */
318		MDRV_CPU_PROGRAM_MAP(twocrude_readmem,twocrude_writemem)
	288	MDRV_CPU_PROGRAM_MAP(twocrude_map,0)
319	289	MDRV_CPU_VBLANK_INT("screen", irq4_line_hold)/* VBL */
320	290
321	291	MDRV_CPU_ADD("audiocpu", H6280,32220000/4) /* Custom chip 45, Audio section crystal is 32.220 MHz */
322		MDRV_CPU_PROGRAM_MAP(sound_readmem,sound_writemem)
	292	MDRV_CPU_PROGRAM_MAP(sound_map,0)
323	293
324	294	/* video hardware */
325	295	MDRV_VIDEO_ATTRIBUTES(VIDEO_BUFFERS_SPRITERAM)

src/mame/drivers/dunhuang.c

r4679	r4680
103	103	tilemap_set_transparent_pen(tmap,   0);
104	104	tilemap_set_transparent_pen(tmap2,  0);
105	105
106		dunhuang_videoram = (UINT16*)auto_malloc(sizeof(UINT16) * 0x40 * 0x20);
107		dunhuang_colorram = (UINT8*) auto_malloc(sizeof(UINT8)  * 0x40 * 0x20);
	106	dunhuang_videoram = auto_alloc_array(machine, UINT16, 0x40 * 0x20);
	107	dunhuang_colorram = auto_alloc_array(machine, UINT8, 0x40 * 0x20);
108	108
109		dunhuang_videoram2 = (UINT16*)auto_malloc(sizeof(UINT16) * 0x40 * 0x8);
110		dunhuang_colorram2 = (UINT8*) auto_malloc(sizeof(UINT8)  * 0x40 * 0x8);
	109	dunhuang_videoram2 = auto_alloc_array(machine, UINT16, 0x40 * 0x8);
	110	dunhuang_colorram2 = auto_alloc_array(machine, UINT8, 0x40 * 0x8);
111	111
112		dunhuang_paldata  = (UINT8*)auto_malloc(sizeof(UINT8) * 3 * 256);
	112	dunhuang_paldata  = auto_alloc_array(machine, UINT8, 3 * 256);
113	113	}
114	114
115	115	static VIDEO_UPDATE( dunhuang )
r4679	r4680
334	334	static ADDRESS_MAP_START( dunhuang_map, ADDRESS_SPACE_PROGRAM, 8 )
335	335	AM_RANGE( 0x0000, 0x5fff ) AM_ROM
336	336	AM_RANGE( 0x6000, 0x7fff ) AM_RAM
337		AM_RANGE( 0x8000, 0xffff ) AM_READ( SMH_BANK1 )
	337	AM_RANGE( 0x8000, 0xffff ) AM_READ( SMH_BANK(1) )
338	338	ADDRESS_MAP_END
339	339
340	340	// Inputs

src/mame/drivers/gng.c

r4679	r4680
66	66	memory_configure_bank(machine, 1,4,1,&rombase[0x4000],0x2000);
67	67	}
68	68
69		static ADDRESS_MAP_START( readmem, ADDRESS_SPACE_PROGRAM, 8 )
70		AM_RANGE(0x0000, 0x2fff) AM_READ(SMH_RAM)
	69	static ADDRESS_MAP_START( gng_map, ADDRESS_SPACE_PROGRAM, 8 )
	70	AM_RANGE(0x0000, 0x1dff) AM_RAM
	71	AM_RANGE(0x1e00, 0x1fff) AM_RAM AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
	72	AM_RANGE(0x2000, 0x27ff) AM_RAM_WRITE(gng_fgvideoram_w) AM_BASE(&gng_fgvideoram)
	73	AM_RANGE(0x2800, 0x2fff) AM_RAM_WRITE(gng_bgvideoram_w) AM_BASE(&gng_bgvideoram)
71	74	AM_RANGE(0x3000, 0x3000) AM_READ_PORT("SYSTEM")
72	75	AM_RANGE(0x3001, 0x3001) AM_READ_PORT("P1")
73	76	AM_RANGE(0x3002, 0x3002) AM_READ_PORT("P2")
74	77	AM_RANGE(0x3003, 0x3003) AM_READ_PORT("DSW1")
75	78	AM_RANGE(0x3004, 0x3004) AM_READ_PORT("DSW2")
76		AM_RANGE(0x3c00, 0x3c00) AM_READNOP   /* watchdog? */
77		AM_RANGE(0x4000, 0x5fff) AM_READ(SMH_BANK1)
78		AM_RANGE(0x6000, 0xffff) AM_READ(SMH_ROM)
79		ADDRESS_MAP_END
80
81		static ADDRESS_MAP_START( writemem, ADDRESS_SPACE_PROGRAM, 8 )
82		AM_RANGE(0x0000, 0x1dff) AM_WRITE(SMH_RAM)
83		AM_RANGE(0x1e00, 0x1fff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
84		AM_RANGE(0x2000, 0x27ff) AM_WRITE(gng_fgvideoram_w) AM_BASE(&gng_fgvideoram)
85		AM_RANGE(0x2800, 0x2fff) AM_WRITE(gng_bgvideoram_w) AM_BASE(&gng_bgvideoram)
86	79	AM_RANGE(0x3800, 0x38ff) AM_WRITE(paletteram_RRRRGGGGBBBBxxxx_split2_w) AM_BASE(&paletteram_2)
87	80	AM_RANGE(0x3900, 0x39ff) AM_WRITE(paletteram_RRRRGGGGBBBBxxxx_split1_w) AM_BASE(&paletteram)
88	81	AM_RANGE(0x3a00, 0x3a00) AM_WRITE(soundlatch_w)
89	82	AM_RANGE(0x3b08, 0x3b09) AM_WRITE(gng_bgscrollx_w)
90	83	AM_RANGE(0x3b0a, 0x3b0b) AM_WRITE(gng_bgscrolly_w)
91		AM_RANGE(0x3c00, 0x3c00) AM_WRITENOP  /* watchdog? */
	84	AM_RANGE(0x3c00, 0x3c00) AM_NOP /* watchdog? */
92	85	AM_RANGE(0x3d00, 0x3d00) AM_WRITE(gng_flipscreen_w)
93	86	//  { 0x3d01, 0x3d01, reset sound cpu?
94	87	AM_RANGE(0x3d02, 0x3d03) AM_WRITE(gng_coin_counter_w)
95	88	AM_RANGE(0x3e00, 0x3e00) AM_WRITE(gng_bankswitch_w)
96		AM_RANGE(0x4000, 0xffff) AM_WRITE(SMH_ROM)
	89	AM_RANGE(0x4000, 0x5fff) AM_ROMBANK(1)
	90	AM_RANGE(0x6000, 0xffff) AM_ROM
97	91	ADDRESS_MAP_END
98	92
99	93
100	94
101		static ADDRESS_MAP_START( sound_readmem, ADDRESS_SPACE_PROGRAM, 8 )
102		AM_RANGE(0xc000, 0xc7ff) AM_READ(SMH_RAM)
	95	static ADDRESS_MAP_START( sound_map, ADDRESS_SPACE_PROGRAM, 8 )
	96	AM_RANGE(0x0000, 0x7fff) AM_ROM
	97	AM_RANGE(0xc000, 0xc7ff) AM_RAM
103	98	AM_RANGE(0xc800, 0xc800) AM_READ(soundlatch_r)
104		AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM)
105		ADDRESS_MAP_END
106
107		static ADDRESS_MAP_START( sound_writemem, ADDRESS_SPACE_PROGRAM, 8 )
108		AM_RANGE(0xc000, 0xc7ff) AM_WRITE(SMH_RAM)
109	99	AM_RANGE(0xe000, 0xe001) AM_DEVWRITE("ym1", ym2203_w)
110	100	AM_RANGE(0xe002, 0xe003) AM_DEVWRITE("ym2", ym2203_w)
111		AM_RANGE(0x0000, 0x7fff) AM_WRITE(SMH_ROM)
112	101	ADDRESS_MAP_END
113	102
114	103
r4679	r4680
343	332
344	333	/* basic machine hardware */
345	334	MDRV_CPU_ADD("maincpu", M6809, 1500000)         /* 1.5 MHz ? */
346		MDRV_CPU_PROGRAM_MAP(readmem,writemem)
	335	MDRV_CPU_PROGRAM_MAP(gng_map,0)
347	336	MDRV_CPU_VBLANK_INT("screen", irq0_line_hold)
348	337
349	338	MDRV_CPU_ADD("audiocpu", Z80, 3000000)
350		MDRV_CPU_PROGRAM_MAP(sound_readmem,sound_writemem)
	339	MDRV_CPU_PROGRAM_MAP(sound_map,0)
351	340	MDRV_CPU_VBLANK_INT_HACK(irq0_line_hold,4)
352	341
353	342	MDRV_MACHINE_START(gng)
r4679	r4680
702	691
703	692	static DRIVER_INIT( diamond )
704	693	{
705		memory_install_read8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x6000, 0x6000, 0, 0, diamond_hack_r);
	694	memory_install_read8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x6000, 0x6000, 0, 0, diamond_hack_r);
706	695	}
707	696
708	697
r4679	r4680
716	705	GAME( 1985, makaimuc, gng, gng, makaimur, 0,      ROT0, "Capcom", "Makai-Mura (Japan Revision C)", GAME_SUPPORTS_SAVE )
717	706	GAME( 1985, makaimug, gng, gng, makaimur, 0,      ROT0, "Capcom", "Makai-Mura (Japan Revision G)", GAME_SUPPORTS_SAVE )
718	707	GAME( 1989, diamond,  0,   gng, diamond,  diamond, ROT0, "KH Video", "Diamond Run", GAME_SUPPORTS_SAVE )
719

src/mame/drivers/onetwo.c

r4679	r4680
62	62	static WRITE8_HANDLER( onetwo_fgram_w )
63	63	{
64	64	fgram[offset] = data;
65		tilemap_mark_tile_dirty(fg_tilemap, offset/2);
	65	tilemap_mark_tile_dirty(fg_tilemap, offset / 2);
66	66	}
67	67
68	68	static WRITE8_HANDLER( onetwo_cpubank_w )
69	69	{
70	70	UINT8 *RAM = memory_region(space->machine, "maincpu") + 0x10000;
71	71
72		memory_set_bankptr(space->machine, 1,&RAM[data * 0x4000]);
	72	memory_set_bankptr(space->machine, 1, &RAM[data * 0x4000]);
73	73	}
74	74
75	75	static WRITE8_HANDLER( onetwo_coin_counters_w )
r4679	r4680
82	82	static WRITE8_HANDLER( onetwo_soundlatch_w )
83	83	{
84	84	soundlatch_w(space, 0, data);
85		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_NMI, PULSE_LINE);
	85	cputag_set_input_line(space->machine, "audiocpu", INPUT_LINE_NMI, PULSE_LINE);
86	86	}
87	87
88	88	static void setColor(running_machine *machine, int offset)
89	89	{
90		int r,g,b;
91		r=paletteram[offset]&0x1f;
92		g=paletteram_2[offset]&0x1f;
93		b=((paletteram[offset]&0x60)>>2)|((paletteram_2[offset]&0xe0)>>5);
94		palette_set_color_rgb(machine,offset,pal5bit(r),pal5bit(g),pal5bit(b));
	90	int r, g, b;
	91	r = paletteram[offset] & 0x1f;
	92	g = paletteram_2[offset] & 0x1f;
	93	b = ((paletteram[offset] & 0x60) >> 2) | ((paletteram_2[offset] & 0xe0) >> 5);
	94	palette_set_color_rgb(machine, offset, pal5bit(r), pal5bit(g), pal5bit(b));
95	95	}
96	96
97	97	static WRITE8_HANDLER(palette1_w)
98	98	{
99		paletteram[offset]=data;
	99	paletteram[offset] = data;
100	100	setColor(space->machine, offset);
101	101	}
102	102
103	103	static WRITE8_HANDLER(palette2_w)
104	104	{
105		paletteram_2[offset]=data;
	105	paletteram_2[offset] = data;
106	106	setColor(space->machine, offset);
107	107	}
108	108
r4679	r4680
257	257
258	258	static VIDEO_START( onetwo )
259	259	{
260		fg_tilemap = tilemap_create(machine, get_fg_tile_info,tilemap_scan_rows,8,8,64,32);
	260	fg_tilemap = tilemap_create(machine, get_fg_tile_info, tilemap_scan_rows, 8, 8, 64, 32);
261	261	}
262	262
263	263	static VIDEO_UPDATE( onetwo )
264	264	{
265		tilemap_draw(bitmap,cliprect,fg_tilemap,0,0);
	265	tilemap_draw(bitmap, cliprect, fg_tilemap, 0, 0);
266	266	return 0;
267	267	}
268	268
269	269	static void irqhandler(const device_config *device, int linestate)
270	270	{
271		cpu_set_input_line(device->machine->cpu[1],0,linestate);
	271	cputag_set_input_line(device->machine, "audiocpu", 0, linestate);
272	272	}
273	273
274	274	static const ym3812_interface ym3812_config =

src/mame/drivers/ojankohs.c

r4679	r4680
41	41	PALETTE_INIT( ojankoy );
42	42	VIDEO_START( ojankohs );
43	43	VIDEO_START( ojankoy );
44		READ8_HANDLER( ojankohs_palette_r );
45	44	WRITE8_HANDLER( ojankohs_palette_w );
46	45	WRITE8_HANDLER( ccasino_palette_w );
47		READ8_HANDLER( ojankohs_videoram_r );
48	46	WRITE8_HANDLER( ojankohs_videoram_w );
49		READ8_HANDLER( ojankohs_colorram_r );
50	47	WRITE8_HANDLER( ojankohs_colorram_w );
51	48	WRITE8_HANDLER( ojankohs_gfxreg_w );
52	49	WRITE8_HANDLER( ojankohs_flipscreen_w );
r4679	r4680
120	117
121	118	/* generate an NMI if we're out of data */
122	119	if (!ojankohs_vclk_left)
123		cpu_set_input_line(device->machine->cpu[0], INPUT_LINE_NMI, PULSE_LINE);
	120	cputag_set_input_line(device->machine, "audiocpu", INPUT_LINE_NMI, PULSE_LINE);
124	121	}
125	122
126	123	static WRITE8_HANDLER( ojankoc_ctrl_w )
r4679	r4680
223	220	}
224	221
225	222
226		static ADDRESS_MAP_START( readmem_ojankohs, ADDRESS_SPACE_PROGRAM, 8 )
227		AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM)
228		AM_RANGE(0x8000, 0x8fff) AM_READ(ojankohs_videoram_r)
229		AM_RANGE(0x9000, 0x9fff) AM_READ(ojankohs_colorram_r)
230		AM_RANGE(0xa000, 0xb7ff) AM_READ(SMH_RAM)
231		AM_RANGE(0xb800, 0xbfff) AM_READ(ojankohs_palette_r)
232		AM_RANGE(0xc000, 0xffff) AM_READ(SMH_BANK1)
	223	static ADDRESS_MAP_START( ojankohs_map, ADDRESS_SPACE_PROGRAM, 8 )
	224	AM_RANGE(0x0000, 0x7fff) AM_ROM
	225	AM_RANGE(0x8000, 0x8fff) AM_RAM_WRITE(ojankohs_videoram_w)
	226	AM_RANGE(0x9000, 0x9fff) AM_RAM_WRITE(ojankohs_colorram_w)
	227	AM_RANGE(0xa000, 0xb7ff) AM_RAM AM_BASE(&generic_nvram) AM_SIZE(&generic_nvram_size)
	228	AM_RANGE(0xb800, 0xbfff) AM_RAM_WRITE(ojankohs_palette_w)
	229	AM_RANGE(0xc000, 0xffff) AM_ROMBANK(1)
233	230	ADDRESS_MAP_END
234	231
235		static ADDRESS_MAP_START( writemem_ojankohs, ADDRESS_SPACE_PROGRAM, 8 )
236		AM_RANGE(0x0000, 0x7fff) AM_WRITE(SMH_ROM)
237		AM_RANGE(0x8000, 0x8fff) AM_WRITE(ojankohs_videoram_w)
238		AM_RANGE(0x9000, 0x9fff) AM_WRITE(ojankohs_colorram_w)
239		AM_RANGE(0xa000, 0xb7ff) AM_WRITE(SMH_RAM) AM_BASE(&generic_nvram) AM_SIZE(&generic_nvram_size)
240		AM_RANGE(0xb800, 0xbfff) AM_WRITE(ojankohs_palette_w)
241		AM_RANGE(0xc000, 0xffff) AM_WRITE(SMH_ROM)
242		ADDRESS_MAP_END
243	232
244		static ADDRESS_MAP_START( readmem_ojankoy, ADDRESS_SPACE_PROGRAM, 8 )
245		AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM)
246		AM_RANGE(0x8000, 0x9fff) AM_READ(ojankohs_videoram_r)
247		AM_RANGE(0xa000, 0xafff) AM_READ(ojankohs_colorram_r)
248		AM_RANGE(0xb000, 0xbfff) AM_READ(SMH_RAM)
249		AM_RANGE(0xc000, 0xffff) AM_READ(SMH_BANK1)
	233	static ADDRESS_MAP_START( ojankoy_map, ADDRESS_SPACE_PROGRAM, 8 )
	234	AM_RANGE(0x0000, 0x7fff) AM_ROM
	235	AM_RANGE(0x8000, 0x9fff) AM_RAM_WRITE(ojankohs_videoram_w)
	236	AM_RANGE(0xa000, 0xafff) AM_RAM_WRITE(ojankohs_colorram_w)
	237	AM_RANGE(0xb000, 0xbfff) AM_RAM AM_BASE(&generic_nvram) AM_SIZE(&generic_nvram_size)
	238	AM_RANGE(0xc000, 0xffff) AM_ROMBANK(1)
250	239	ADDRESS_MAP_END
251	240
252		static ADDRESS_MAP_START( writemem_ojankoy, ADDRESS_SPACE_PROGRAM, 8 )
253		AM_RANGE(0x0000, 0x7fff) AM_WRITE(SMH_ROM)
254		AM_RANGE(0x8000, 0x9fff) AM_WRITE(ojankohs_videoram_w)
255		AM_RANGE(0xa000, 0xafff) AM_WRITE(ojankohs_colorram_w)
256		AM_RANGE(0xb000, 0xbfff) AM_WRITE(SMH_RAM) AM_BASE(&generic_nvram) AM_SIZE(&generic_nvram_size)
257		AM_RANGE(0xc000, 0xffff) AM_WRITE(SMH_ROM)
258		ADDRESS_MAP_END
259	241
260		static ADDRESS_MAP_START( readmem_ojankoc, ADDRESS_SPACE_PROGRAM, 8 )
261		AM_RANGE(0x0000, 0x77ff) AM_READ(SMH_ROM)
262		AM_RANGE(0x7800, 0x7fff) AM_READ(SMH_RAM)
263		AM_RANGE(0x8000, 0xffff) AM_READ(SMH_BANK1)
	242	static ADDRESS_MAP_START( ojankoc_map, ADDRESS_SPACE_PROGRAM, 8 )
	243	AM_RANGE(0x0000, 0x77ff) AM_ROM
	244	AM_RANGE(0x7800, 0x7fff) AM_RAM AM_BASE(&generic_nvram) AM_SIZE(&generic_nvram_size)
	245	AM_RANGE(0x8000, 0xffff) AM_ROMBANK(1) AM_WRITE(ojankoc_videoram_w)
264	246	ADDRESS_MAP_END
265	247
266		static ADDRESS_MAP_START( writemem_ojankoc, ADDRESS_SPACE_PROGRAM, 8 )
267		AM_RANGE(0x0000, 0x77ff) AM_WRITE(SMH_ROM)
268		AM_RANGE(0x7800, 0x7fff) AM_WRITE(SMH_RAM) AM_BASE(&generic_nvram) AM_SIZE(&generic_nvram_size)
269		AM_RANGE(0x8000, 0xffff) AM_WRITE(ojankoc_videoram_w)
270		ADDRESS_MAP_END
271	248
272
273	249	static ADDRESS_MAP_START( ojankohs_io_map, ADDRESS_SPACE_IO, 8 )
274	250	ADDRESS_MAP_GLOBAL_MASK(0xff)
275	251	AM_RANGE(0x00, 0x00) AM_READ_PORT("IN0") AM_WRITE(ojankohs_portselect_w)
r4679	r4680
843	819
844	820	/* basic machine hardware */
845	821	MDRV_CPU_ADD("maincpu", Z80,12000000/2)      /* 6.00 MHz ? */
846		MDRV_CPU_PROGRAM_MAP(readmem_ojankohs,writemem_ojankohs)
	822	MDRV_CPU_PROGRAM_MAP(ojankohs_map,0)
847	823	MDRV_CPU_IO_MAP(ojankohs_io_map,0)
848	824	MDRV_CPU_VBLANK_INT("screen", irq0_line_hold)
849	825
r4679	r4680
880	856
881	857	/* basic machine hardware */
882	858	MDRV_CPU_ADD("maincpu", Z80,12000000/2)      /* 6.00 MHz ? */
883		MDRV_CPU_PROGRAM_MAP(readmem_ojankoy,writemem_ojankoy)
	859	MDRV_CPU_PROGRAM_MAP(ojankoy_map,0)
884	860	MDRV_CPU_IO_MAP(ojankoy_io_map,0)
885	861	MDRV_CPU_VBLANK_INT("screen", irq0_line_hold)
886	862
r4679	r4680
918	894
919	895	/* basic machine hardware */
920	896	MDRV_CPU_ADD("maincpu", Z80,12000000/2)      /* 6.00 MHz ? */
921		MDRV_CPU_PROGRAM_MAP(readmem_ojankoy,writemem_ojankoy)
	897	MDRV_CPU_PROGRAM_MAP(ojankoy_map,0)
922	898	MDRV_CPU_IO_MAP(ccasino_io_map,0)
923	899	MDRV_CPU_VBLANK_INT("screen", irq0_line_hold)
924	900
r4679	r4680
955	931
956	932	/* basic machine hardware */
957	933	MDRV_CPU_ADD("maincpu", Z80,8000000/2)         /* 4.00 MHz */
958		MDRV_CPU_PROGRAM_MAP(readmem_ojankoc,writemem_ojankoc)
	934	MDRV_CPU_PROGRAM_MAP(ojankoc_map,0)
959	935	MDRV_CPU_IO_MAP(ojankoc_io_map,0)
960	936	MDRV_CPU_VBLANK_INT("screen", irq0_line_hold)
961	937

src/mame/drivers/nbmj8891.c

r4679	r4680
332	332	}
333	333
334	334
335		static ADDRESS_MAP_START( readmem_gionbana, ADDRESS_SPACE_PROGRAM, 8 )
336		AM_RANGE(0x0000, 0xefff) AM_READ(SMH_ROM)
337		AM_RANGE(0xf000, 0xf00f) AM_READ(nbmj8891_clut_r)
338		AM_RANGE(0xf400, 0xf5ff) AM_READ(nbmj8891_palette_type1_r)
339		AM_RANGE(0xf800, 0xffff) AM_READ(SMH_RAM)
	335	static ADDRESS_MAP_START( gionbana_map, ADDRESS_SPACE_PROGRAM, 8 )
	336	AM_RANGE(0x0000, 0xefff) AM_ROM
	337	AM_RANGE(0xf000, 0xf00f) AM_READWRITE(nbmj8891_clut_r,nbmj8891_clut_w)
	338	AM_RANGE(0xf400, 0xf5ff) AM_READWRITE(nbmj8891_palette_type1_r,nbmj8891_palette_type1_w)
	339	AM_RANGE(0xf800, 0xffff) AM_RAM AM_BASE(&nb1413m3_nvram) AM_SIZE(&nb1413m3_nvram_size)
340	340	ADDRESS_MAP_END
341	341
342		static ADDRESS_MAP_START( writemem_gionbana, ADDRESS_SPACE_PROGRAM, 8 )
343		AM_RANGE(0x0000, 0xefff) AM_WRITE(SMH_ROM)
344		AM_RANGE(0xf000, 0xf00f) AM_WRITE(nbmj8891_clut_w)
345		AM_RANGE(0xf400, 0xf5ff) AM_WRITE(nbmj8891_palette_type1_w)
346		AM_RANGE(0xf800, 0xffff) AM_WRITE(SMH_RAM) AM_BASE(&nb1413m3_nvram) AM_SIZE(&nb1413m3_nvram_size)
	342	static ADDRESS_MAP_START( mgion_map, ADDRESS_SPACE_PROGRAM, 8 )
	343	AM_RANGE(0x0000, 0xefff) AM_ROM
	344	AM_RANGE(0xf000, 0xf1ff) AM_READWRITE(nbmj8891_palette_type1_r,nbmj8891_palette_type1_w)
	345	AM_RANGE(0xf400, 0xf40f) AM_READWRITE(nbmj8891_clut_r,nbmj8891_clut_w)
	346	AM_RANGE(0xf800, 0xffff) AM_RAM AM_BASE(&nb1413m3_nvram) AM_SIZE(&nb1413m3_nvram_size)
347	347	ADDRESS_MAP_END
348	348
349		static ADDRESS_MAP_START( writemem_mgion, ADDRESS_SPACE_PROGRAM, 8 )
350		AM_RANGE(0x0000, 0xefff) AM_WRITE(SMH_ROM)
351		AM_RANGE(0xf000, 0xf1ff) AM_WRITE(nbmj8891_palette_type1_w)
352		AM_RANGE(0xf400, 0xf40f) AM_WRITE(nbmj8891_clut_w)
353		AM_RANGE(0xf800, 0xffff) AM_WRITE(SMH_RAM) AM_BASE(&nb1413m3_nvram) AM_SIZE(&nb1413m3_nvram_size)
	349	static ADDRESS_MAP_START( omotesnd_map, ADDRESS_SPACE_PROGRAM, 8 )
	350	AM_RANGE(0x0000, 0xefff) AM_ROM
	351	AM_RANGE(0xf400, 0xf5ff) AM_READWRITE(nbmj8891_palette_type1_r,nbmj8891_palette_type1_w)
	352	AM_RANGE(0xf800, 0xffff) AM_RAM AM_BASE(&nb1413m3_nvram) AM_SIZE(&nb1413m3_nvram_size)
354	353	ADDRESS_MAP_END
355	354
356		static ADDRESS_MAP_START( readmem_omotesnd, ADDRESS_SPACE_PROGRAM, 8 )
357		AM_RANGE(0x0000, 0xefff) AM_READ(SMH_ROM)
358		AM_RANGE(0xf400, 0xf5ff) AM_READ(nbmj8891_palette_type1_r)
359		AM_RANGE(0xf800, 0xffff) AM_READ(SMH_RAM)
	355	static ADDRESS_MAP_START( hanamomo_map, ADDRESS_SPACE_PROGRAM, 8 )
	356	AM_RANGE(0x0000, 0xefff) AM_ROM
	357	AM_RANGE(0xf000, 0xf1ff) AM_READWRITE(nbmj8891_palette_type1_r,nbmj8891_palette_type1_w)
	358	AM_RANGE(0xf400, 0xf40f) AM_READWRITE(nbmj8891_clut_r,nbmj8891_clut_w)
	359	AM_RANGE(0xf800, 0xffff) AM_RAM
360	360	ADDRESS_MAP_END
361	361
362		static ADDRESS_MAP_START( writemem_omotesnd, ADDRESS_SPACE_PROGRAM, 8 )
363		AM_RANGE(0x0000, 0xefff) AM_WRITE(SMH_ROM)
364		AM_RANGE(0xf400, 0xf5ff) AM_WRITE(nbmj8891_palette_type1_w)
365		AM_RANGE(0xf800, 0xffff) AM_WRITE(SMH_RAM) AM_BASE(&nb1413m3_nvram) AM_SIZE(&nb1413m3_nvram_size)
	362	static ADDRESS_MAP_START( scandalm_map, ADDRESS_SPACE_PROGRAM, 8 )
	363	AM_RANGE(0x0000, 0xefff) AM_ROM
	364	AM_RANGE(0xf400, 0xf5ff) AM_READWRITE(nbmj8891_palette_type1_r,nbmj8891_palette_type1_w)
	365	AM_RANGE(0xf800, 0xffff) AM_RAM AM_BASE(&nb1413m3_nvram) AM_SIZE(&nb1413m3_nvram_size)
366	366	ADDRESS_MAP_END
367	367
368		static ADDRESS_MAP_START( readmem_hanamomo, ADDRESS_SPACE_PROGRAM, 8 )
369		AM_RANGE(0x0000, 0xefff) AM_READ(SMH_ROM)
370		AM_RANGE(0xf000, 0xf1ff) AM_READ(nbmj8891_palette_type1_r)
371		AM_RANGE(0xf400, 0xf40f) AM_READ(nbmj8891_clut_r)
372		AM_RANGE(0xf800, 0xffff) AM_READ(SMH_RAM)
	368	static ADDRESS_MAP_START( club90s_map, ADDRESS_SPACE_PROGRAM, 8 )
	369	AM_RANGE(0x0000, 0xefff) AM_ROM
	370	AM_RANGE(0xf000, 0xf7ff) AM_RAM
	371	AM_RANGE(0xf800, 0xf80f) AM_READWRITE(nbmj8891_clut_r,nbmj8891_clut_w)
	372	AM_RANGE(0xfc00, 0xfdff) AM_READWRITE(nbmj8891_palette_type1_r,nbmj8891_palette_type1_w)
373	373	ADDRESS_MAP_END
374	374
375		static ADDRESS_MAP_START( writemem_hanamomo, ADDRESS_SPACE_PROGRAM, 8 )
376		AM_RANGE(0x0000, 0xefff) AM_WRITE(SMH_ROM)
377		AM_RANGE(0xf000, 0xf1ff) AM_WRITE(nbmj8891_palette_type1_w)
378		AM_RANGE(0xf400, 0xf40f) AM_WRITE(nbmj8891_clut_w)
379		AM_RANGE(0xf800, 0xffff) AM_WRITE(SMH_RAM)
	375	static ADDRESS_MAP_START( lovehous_map, ADDRESS_SPACE_PROGRAM, 8 )
	376	AM_RANGE(0x0000, 0xefff) AM_ROM
	377	AM_RANGE(0xf000, 0xf00f) AM_READWRITE(nbmj8891_clut_r,nbmj8891_clut_w)
	378	AM_RANGE(0xf400, 0xf5ff) AM_READWRITE(nbmj8891_palette_type2_r,nbmj8891_palette_type2_w)
	379	AM_RANGE(0xf800, 0xffff) AM_RAM AM_BASE(&nb1413m3_nvram) AM_SIZE(&nb1413m3_nvram_size)
380	380	ADDRESS_MAP_END
381	381
382		static ADDRESS_MAP_START( readmem_scandalm, ADDRESS_SPACE_PROGRAM, 8 )
383		AM_RANGE(0x0000, 0xefff) AM_READ(SMH_ROM)
384		AM_RANGE(0xf400, 0xf5ff) AM_READ(nbmj8891_palette_type1_r)
385		AM_RANGE(0xf800, 0xffff) AM_READ(SMH_RAM)
	382	static ADDRESS_MAP_START( maiko_map, ADDRESS_SPACE_PROGRAM, 8 )
	383	AM_RANGE(0x0000, 0xefff) AM_ROM
	384	AM_RANGE(0xf000, 0xf1ff) AM_READWRITE(nbmj8891_palette_type2_r,nbmj8891_palette_type2_w)
	385	AM_RANGE(0xf400, 0xf40f) AM_READWRITE(nbmj8891_clut_r,nbmj8891_clut_w)
	386	AM_RANGE(0xf800, 0xffff) AM_RAM
386	387	ADDRESS_MAP_END
387	388
388		static ADDRESS_MAP_START( writemem_scandalm, ADDRESS_SPACE_PROGRAM, 8 )
389		AM_RANGE(0x0000, 0xefff) AM_WRITE(SMH_ROM)
390		AM_RANGE(0xf400, 0xf5ff) AM_WRITE(nbmj8891_palette_type1_w)
391		AM_RANGE(0xf800, 0xffff) AM_WRITE(SMH_RAM) AM_BASE(&nb1413m3_nvram) AM_SIZE(&nb1413m3_nvram_size)
392		ADDRESS_MAP_END
393
394		static ADDRESS_MAP_START( readmem_club90s, ADDRESS_SPACE_PROGRAM, 8 )
395		AM_RANGE(0x0000, 0xefff) AM_READ(SMH_ROM)
396		AM_RANGE(0xf000, 0xf7ff) AM_READ(SMH_RAM)
397		AM_RANGE(0xf800, 0xf80f) AM_READ(nbmj8891_clut_r)
398		AM_RANGE(0xfc00, 0xfdff) AM_READ(nbmj8891_palette_type1_r)
399		ADDRESS_MAP_END
400
401		static ADDRESS_MAP_START( writemem_club90s, ADDRESS_SPACE_PROGRAM, 8 )
402		AM_RANGE(0x0000, 0xefff) AM_WRITE(SMH_ROM)
403		AM_RANGE(0xf000, 0xf7ff) AM_WRITE(SMH_RAM)
404		AM_RANGE(0xf800, 0xf80f) AM_WRITE(nbmj8891_clut_w)
405		AM_RANGE(0xfc00, 0xfdff) AM_WRITE(nbmj8891_palette_type1_w)
406		ADDRESS_MAP_END
407
408		static ADDRESS_MAP_START( readmem_lovehous, ADDRESS_SPACE_PROGRAM, 8 )
409		AM_RANGE(0x0000, 0xefff) AM_READ(SMH_ROM)
410		AM_RANGE(0xf000, 0xf00f) AM_READ(nbmj8891_clut_r)
411		AM_RANGE(0xf400, 0xf5ff) AM_READ(nbmj8891_palette_type2_r)
412		AM_RANGE(0xf800, 0xffff) AM_READ(SMH_RAM)
413		ADDRESS_MAP_END
414
415		static ADDRESS_MAP_START( writemem_lovehous, ADDRESS_SPACE_PROGRAM, 8 )
416		AM_RANGE(0x0000, 0xefff) AM_WRITE(SMH_ROM)
417		AM_RANGE(0xf000, 0xf00f) AM_WRITE(nbmj8891_clut_w)
418		AM_RANGE(0xf400, 0xf5ff) AM_WRITE(nbmj8891_palette_type2_w)
419		AM_RANGE(0xf800, 0xffff) AM_WRITE(SMH_RAM) AM_BASE(&nb1413m3_nvram) AM_SIZE(&nb1413m3_nvram_size)
420		ADDRESS_MAP_END
421
422		static ADDRESS_MAP_START( readmem_maiko, ADDRESS_SPACE_PROGRAM, 8 )
423		AM_RANGE(0x0000, 0xefff) AM_READ(SMH_ROM)
424		AM_RANGE(0xf000, 0xf1ff) AM_READ(nbmj8891_palette_type2_r)
425		AM_RANGE(0xf400, 0xf40f) AM_READ(nbmj8891_clut_r)
426		AM_RANGE(0xf800, 0xffff) AM_READ(SMH_RAM)
427		ADDRESS_MAP_END
428
429		static ADDRESS_MAP_START( writemem_maiko, ADDRESS_SPACE_PROGRAM, 8 )
430		AM_RANGE(0x0000, 0xefff) AM_WRITE(SMH_ROM)
431		AM_RANGE(0xf000, 0xf1ff) AM_WRITE(nbmj8891_palette_type2_w)
432		AM_RANGE(0xf400, 0xf40f) AM_WRITE(nbmj8891_clut_w)
433		AM_RANGE(0xf800, 0xffff) AM_WRITE(SMH_RAM)
434		ADDRESS_MAP_END
435
436		static ADDRESS_MAP_START( hnxmasev_mem, ADDRESS_SPACE_PROGRAM, 8 )
	389	static ADDRESS_MAP_START( hnxmasev_map, ADDRESS_SPACE_PROGRAM, 8 )
437	390	AM_RANGE(0x0000, 0xefff) AM_ROM
438	391	AM_RANGE(0xf200, 0xf3ff) AM_READWRITE(nbmj8891_palette_type2_r,nbmj8891_palette_type2_w)
439	392	AM_RANGE(0xf700, 0xf70f) AM_READWRITE(nbmj8891_clut_r,nbmj8891_clut_w)
440	393	AM_RANGE(0xf800, 0xffff) AM_RAM
441	394	ADDRESS_MAP_END
442	395
443		static ADDRESS_MAP_START( hnageman_mem, ADDRESS_SPACE_PROGRAM, 8 )
	396	static ADDRESS_MAP_START( hnageman_map, ADDRESS_SPACE_PROGRAM, 8 )
444	397	AM_RANGE(0x0000, 0xefff) AM_ROM
445		AM_RANGE(0xf400, 0xf5ff) AM_READWRITE(nbmj8891_palette_type2_r,nbmj8891_palette_type2_w)
446	398	AM_RANGE(0xf000, 0xf00f) AM_READWRITE(nbmj8891_clut_r,nbmj8891_clut_w)
	399	AM_RANGE(0xf400, 0xf5ff) AM_READWRITE(nbmj8891_palette_type2_r,nbmj8891_palette_type2_w)
447	400	AM_RANGE(0xf800, 0xffff) AM_RAM
448	401	ADDRESS_MAP_END
449	402
450		static ADDRESS_MAP_START( writemem_mmaiko, ADDRESS_SPACE_PROGRAM, 8 )
451		AM_RANGE(0x0000, 0xefff) AM_WRITE(SMH_ROM)
452		AM_RANGE(0xf000, 0xf1ff) AM_WRITE(nbmj8891_palette_type2_w)
453		AM_RANGE(0xf400, 0xf40f) AM_WRITE(nbmj8891_clut_w)
454		AM_RANGE(0xf800, 0xffff) AM_WRITE(SMH_RAM) AM_BASE(&nb1413m3_nvram) AM_SIZE(&nb1413m3_nvram_size)
	403	static ADDRESS_MAP_START( mmaiko_map, ADDRESS_SPACE_PROGRAM, 8 )
	404	AM_RANGE(0x0000, 0xefff) AM_ROM
	405	AM_RANGE(0xf000, 0xf1ff) AM_READWRITE(nbmj8891_palette_type2_r,nbmj8891_palette_type2_w)
	406	AM_RANGE(0xf400, 0xf40f) AM_READWRITE(nbmj8891_clut_r,nbmj8891_clut_w)
	407	AM_RANGE(0xf800, 0xffff) AM_RAM AM_BASE(&nb1413m3_nvram) AM_SIZE(&nb1413m3_nvram_size)
455	408	ADDRESS_MAP_END
456	409
457		static ADDRESS_MAP_START( readmem_hanaoji, ADDRESS_SPACE_PROGRAM, 8 )
458		AM_RANGE(0x0000, 0xefff) AM_READ(SMH_ROM)
459		AM_RANGE(0xf200, 0xf3ff) AM_READ(nbmj8891_palette_type2_r)
460		AM_RANGE(0xf700, 0xf70f) AM_READ(nbmj8891_clut_r)
461		AM_RANGE(0xf800, 0xffff) AM_READ(SMH_RAM)
	410	static ADDRESS_MAP_START( hanaoji_map, ADDRESS_SPACE_PROGRAM, 8 )
	411	AM_RANGE(0x0000, 0xefff) AM_ROM
	412	AM_RANGE(0xf200, 0xf3ff) AM_READWRITE(nbmj8891_palette_type2_r,nbmj8891_palette_type2_w)
	413	AM_RANGE(0xf700, 0xf70f) AM_READWRITE(nbmj8891_clut_r,nbmj8891_clut_w)
	414	AM_RANGE(0xf800, 0xffff) AM_RAM AM_BASE(&nb1413m3_nvram) AM_SIZE(&nb1413m3_nvram_size)
462	415	ADDRESS_MAP_END
463	416
464		static ADDRESS_MAP_START( writemem_hanaoji, ADDRESS_SPACE_PROGRAM, 8 )
465		AM_RANGE(0x0000, 0xefff) AM_WRITE(SMH_ROM)
466		AM_RANGE(0xf200, 0xf3ff) AM_WRITE(nbmj8891_palette_type2_w)
467		AM_RANGE(0xf700, 0xf70f) AM_WRITE(nbmj8891_clut_w)
468		AM_RANGE(0xf800, 0xffff) AM_WRITE(SMH_RAM) AM_BASE(&nb1413m3_nvram) AM_SIZE(&nb1413m3_nvram_size)
469		ADDRESS_MAP_END
470
471	417	static READ8_HANDLER( taiwanmb_unk_r )
472	418	{
473	419	return 0x00;                                       // MCU or 1413M3 STATUS?
474	420	}
475	421
476		static ADDRESS_MAP_START( readmem_taiwanmb, ADDRESS_SPACE_PROGRAM, 8 )
477		AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM)
478		AM_RANGE(0xec00, 0xedff) AM_READ(nbmj8891_palette_type3_r)
479		AM_RANGE(0xf800, 0xfeff) AM_READ(SMH_RAM)
480		AM_RANGE(0xff00, 0xff1f) AM_READNOP                  // ?
	422	static ADDRESS_MAP_START( taiwanmb_map, ADDRESS_SPACE_PROGRAM, 8 )
	423	AM_RANGE(0x0000, 0x7fff) AM_ROM
	424	AM_RANGE(0xec00, 0xedff) AM_READWRITE(nbmj8891_palette_type3_r,nbmj8891_palette_type3_w)
	425	AM_RANGE(0xf800, 0xfeff) AM_RAM AM_BASE(&nb1413m3_nvram) AM_SIZE(&nb1413m3_nvram_size)
	426	AM_RANGE(0xff00, 0xff1f) AM_NOP                           // ?
481	427	AM_RANGE(0xff20, 0xff20) AM_READ(taiwanmb_unk_r)            // MCU or 1413M3 STATUS? (return != 0x00 then loop)
482		AM_RANGE(0xff21, 0xff2f) AM_READNOP                  // ?
483		AM_RANGE(0xff30, 0xffff) AM_READ(SMH_RAM)                  //
484		ADDRESS_MAP_END
485
486		static ADDRESS_MAP_START( writemem_taiwanmb, ADDRESS_SPACE_PROGRAM, 8 )
487		AM_RANGE(0x0000, 0x7fff) AM_WRITE(SMH_ROM)
488		AM_RANGE(0xec00, 0xedff) AM_WRITE(nbmj8891_palette_type3_w)
489		AM_RANGE(0xf800, 0xfeff) AM_WRITE(SMH_RAM) AM_BASE(&nb1413m3_nvram) AM_SIZE(&nb1413m3_nvram_size)
490		AM_RANGE(0xff00, 0xff1f) AM_WRITENOP                  // ?
491	428	AM_RANGE(0xff20, 0xff20) AM_WRITE(nbmj8891_taiwanmb_mcu_w)      // MCU PARAMETER?
492		AM_RANGE(0xff21, 0xff21) AM_WRITENOP                  // blitter parameter set end (write 0x01 only)
	429	AM_RANGE(0xff21, 0xff2f) AM_READNOP                        // ?
	430	AM_RANGE(0xff21, 0xff21) AM_WRITENOP                     // blitter parameter set end (write 0x01 only)
493	431	AM_RANGE(0xff22, 0xff27) AM_WRITE(nbmj8891_taiwanmb_blitter_w)   // blitter parameter
494	432	AM_RANGE(0xff28, 0xff28) AM_WRITE(nbmj8891_romsel_w)         // gfx rombank select
495	433	AM_RANGE(0xff29, 0xff29) AM_WRITE(nbmj8891_taiwanmb_gfxflag_w)   // screen flip flag?
496		AM_RANGE(0xff2a, 0xff2a) AM_WRITENOP                  // not used?
	434	AM_RANGE(0xff2a, 0xff2a) AM_WRITENOP                     // not used?
497	435	AM_RANGE(0xff2b, 0xff2b) AM_WRITE(nbmj8891_clutsel_w)         // color look up table select
498		AM_RANGE(0xff2c, 0xff2c) AM_WRITENOP                  // blitter parameter set start (write 0xff only)
499		AM_RANGE(0xff2d, 0xff2d) AM_WRITENOP                  // not used?
500		AM_RANGE(0xff2e, 0xff2e) AM_WRITENOP                  // not used?
501		AM_RANGE(0xff2f, 0xff2f) AM_WRITENOP                  // not used?
502		AM_RANGE(0xff30, 0xffff) AM_WRITE(SMH_RAM)                  // RAM?
	436	AM_RANGE(0xff2c, 0xff2c) AM_WRITENOP                     // blitter parameter set start (write 0xff only)
	437	AM_RANGE(0xff2d, 0xff2d) AM_WRITENOP                     // not used?
	438	AM_RANGE(0xff2e, 0xff2e) AM_WRITENOP                     // not used?
	439	AM_RANGE(0xff2f, 0xff2f) AM_WRITENOP                     // not used?
	440	AM_RANGE(0xff30, 0xffff) AM_RAM                           // RAM?
503	441	ADDRESS_MAP_END
504	442
505	443
506		static ADDRESS_MAP_START( readport_gionbana, ADDRESS_SPACE_IO, 8 )
	444	static ADDRESS_MAP_START( gionbana_io_map, ADDRESS_SPACE_IO, 8 )
507	445	ADDRESS_MAP_GLOBAL_MASK(0xff)
508	446	AM_RANGE(0x00, 0x7f) AM_READ(nb1413m3_sndrom_r)
509		AM_RANGE(0x90, 0x90) AM_READ(nb1413m3_inputport0_r)
510		AM_RANGE(0xa0, 0xa0) AM_READ(nb1413m3_inputport1_r)
511		AM_RANGE(0xb0, 0xb0) AM_READ(nb1413m3_inputport2_r)
512		AM_RANGE(0xc0, 0xc0) AM_READ(nb1413m3_inputport3_r)
513		AM_RANGE(0xf0, 0xf0) AM_READ(nb1413m3_dipsw1_r)
514		AM_RANGE(0xf1, 0xf1) AM_READ(nb1413m3_dipsw2_r)
515		ADDRESS_MAP_END
516
517		static ADDRESS_MAP_START( writeport_gionbana, ADDRESS_SPACE_IO, 8 )
518		ADDRESS_MAP_GLOBAL_MASK(0xff)
519	447	AM_RANGE(0x00, 0x00) AM_WRITE(nb1413m3_nmi_clock_w)
520	448	AM_RANGE(0x20, 0x27) AM_WRITE(nbmj8891_blitter_w)
521	449	AM_RANGE(0x40, 0x40) AM_WRITE(nbmj8891_clutsel_w)
522	450	AM_RANGE(0x60, 0x60) AM_WRITE(nbmj8891_romsel_w)
523	451	AM_RANGE(0x70, 0x70) AM_WRITE(nbmj8891_scrolly_w)
524	452	AM_RANGE(0x80, 0x81) AM_DEVWRITE("fm", ym3812_w)
525		AM_RANGE(0xa0, 0xa0) AM_WRITE(nb1413m3_inputportsel_w)
526		AM_RANGE(0xb0, 0xb0) AM_WRITE(nb1413m3_sndrombank1_w)
527		//  AM_RANGE(0xc0, 0xc0) AM_WRITENOP
	453	AM_RANGE(0x90, 0x90) AM_READ(nb1413m3_inputport0_r)
	454	AM_RANGE(0xa0, 0xa0) AM_READWRITE(nb1413m3_inputport1_r,nb1413m3_inputportsel_w)
	455	AM_RANGE(0xb0, 0xb0) AM_READWRITE(nb1413m3_inputport2_r,nb1413m3_sndrombank1_w)
	456	AM_RANGE(0xc0, 0xc0) AM_READ(nb1413m3_inputport3_r) //AM_WRITENOP
528	457	AM_RANGE(0xd0, 0xd0) AM_DEVWRITE("dac", DAC_WRITE)
529	458	AM_RANGE(0xe0, 0xe0) AM_WRITE(nbmj8891_vramsel_w)
530		AM_RANGE(0xf0, 0xf0) AM_WRITE(nb1413m3_outcoin_w)
	459	AM_RANGE(0xf0, 0xf0) AM_READWRITE(nb1413m3_dipsw1_r,nb1413m3_outcoin_w)
	460	AM_RANGE(0xf1, 0xf1) AM_READ(nb1413m3_dipsw2_r)
531	461	ADDRESS_MAP_END
532	462
533		static ADDRESS_MAP_START( writeport_mgion, ADDRESS_SPACE_IO, 8 )
	463	static ADDRESS_MAP_START( mgion_io_map, ADDRESS_SPACE_IO, 8 )
534	464	ADDRESS_MAP_GLOBAL_MASK(0xff)
	465	AM_RANGE(0x00, 0x7f) AM_READ(nb1413m3_sndrom_r)
535	466	AM_RANGE(0x00, 0x00) AM_WRITE(nb1413m3_nmi_clock_w)
536	467	AM_RANGE(0x30, 0x37) AM_WRITE(nbmj8891_blitter_w)
537	468	AM_RANGE(0x40, 0x40) AM_WRITE(nbmj8891_clutsel_w)
538	469	AM_RANGE(0x60, 0x60) AM_WRITE(nbmj8891_romsel_w)
539	470	AM_RANGE(0x70, 0x70) AM_WRITE(nbmj8891_scrolly_w)
540	471	AM_RANGE(0x80, 0x81) AM_DEVWRITE("fm", ym3812_w)
541		AM_RANGE(0xa0, 0xa0) AM_WRITE(nb1413m3_inputportsel_w)
542		AM_RANGE(0xb0, 0xb0) AM_WRITE(nb1413m3_sndrombank1_w)
543		//  AM_RANGE(0xc0, 0xc0) AM_WRITENOP
	472	AM_RANGE(0x90, 0x90) AM_READ(nb1413m3_inputport0_r)
	473	AM_RANGE(0xa0, 0xa0) AM_READWRITE(nb1413m3_inputport1_r,nb1413m3_inputportsel_w)
	474	AM_RANGE(0xb0, 0xb0) AM_READWRITE(nb1413m3_inputport2_r,nb1413m3_sndrombank1_w)
	475	AM_RANGE(0xc0, 0xc0) AM_READ(nb1413m3_inputport3_r) //AM_WRITENOP
544	476	AM_RANGE(0xd0, 0xd0) AM_DEVWRITE("dac", DAC_WRITE)
545	477	AM_RANGE(0xe0, 0xe0) AM_WRITE(nbmj8891_vramsel_w)
546		AM_RANGE(0xf0, 0xf0) AM_WRITE(nb1413m3_outcoin_w)
547		ADDRESS_MAP_END
548
549		static ADDRESS_MAP_START( readport_omotesnd, ADDRESS_SPACE_IO, 8 )
550		ADDRESS_MAP_GLOBAL_MASK(0xff)
551		AM_RANGE(0x00, 0x7f) AM_READ(nb1413m3_sndrom_r)
552		AM_RANGE(0x81, 0x81) AM_DEVREAD("fm", ay8910_r)
553		AM_RANGE(0x90, 0x90) AM_READ(nb1413m3_inputport0_r)
554		AM_RANGE(0xa0, 0xa0) AM_READ(nb1413m3_inputport1_r)
555		AM_RANGE(0xb0, 0xb0) AM_READ(nb1413m3_inputport2_r)
556		AM_RANGE(0xc0, 0xc0) AM_READ(nb1413m3_inputport3_r)
557		AM_RANGE(0xd0, 0xdf) AM_READ(nbmj8891_clut_r)
558		AM_RANGE(0xf0, 0xf0) AM_READ(nb1413m3_dipsw1_r)
	478	AM_RANGE(0xf0, 0xf0) AM_READWRITE(nb1413m3_dipsw1_r,nb1413m3_outcoin_w)
559	479	AM_RANGE(0xf1, 0xf1) AM_READ(nb1413m3_dipsw2_r)
560	480	ADDRESS_MAP_END
561	481
562		static ADDRESS_MAP_START( writeport_omotesnd, ADDRESS_SPACE_IO, 8 )
	482	static ADDRESS_MAP_START( omotesnd_io_map, ADDRESS_SPACE_IO, 8 )
563	483	ADDRESS_MAP_GLOBAL_MASK(0xff)
	484	AM_RANGE(0x00, 0x7f) AM_READ(nb1413m3_sndrom_r)
564	485	AM_RANGE(0x00, 0x07) AM_WRITE(nbmj8891_blitter_w)
565	486	AM_RANGE(0x30, 0x30) AM_WRITE(nbmj8891_vramsel_w)
566	487	AM_RANGE(0x10, 0x10) AM_WRITE(nbmj8891_romsel_w)
r4679	r4680
568	489	AM_RANGE(0x40, 0x4f) AM_WRITE(nbmj8891_clut_w)
569	490	//  AM_RANGE(0x50, 0x50) AM_WRITE(nb1413m3_nmi_clock_w)
570	491	AM_RANGE(0x70, 0x70) AM_WRITE(nbmj8891_scrolly_w)
	492	AM_RANGE(0x81, 0x81) AM_DEVREAD("fm", ay8910_r)
571	493	AM_RANGE(0x82, 0x83) AM_DEVWRITE("fm", ay8910_data_address_w)
572		AM_RANGE(0x90, 0x90) AM_WRITENOP
573		AM_RANGE(0xa0, 0xa0) AM_WRITE(nb1413m3_inputportsel_w)
574		AM_RANGE(0xb0, 0xb0) AM_WRITE(nb1413m3_sndrombank1_w)
575		AM_RANGE(0xc0, 0xc0) AM_WRITENOP
	494	AM_RANGE(0x90, 0x90) AM_READ(nb1413m3_inputport0_r) AM_WRITENOP
	495	AM_RANGE(0xa0, 0xa0) AM_READWRITE(nb1413m3_inputport1_r,nb1413m3_inputportsel_w)
	496	AM_RANGE(0xb0, 0xb0) AM_READWRITE(nb1413m3_inputport2_r,nb1413m3_sndrombank1_w)
	497	AM_RANGE(0xc0, 0xc0) AM_READ(nb1413m3_inputport3_r) AM_WRITENOP
	498	AM_RANGE(0xd0, 0xdf) AM_READ(nbmj8891_clut_r)
576	499	AM_RANGE(0xd0, 0xd0) AM_DEVWRITE("dac", DAC_WRITE)
577		AM_RANGE(0xf0, 0xf0) AM_WRITE(nb1413m3_outcoin_w)
	500	AM_RANGE(0xf0, 0xf0) AM_READWRITE(nb1413m3_dipsw1_r,nb1413m3_outcoin_w)
	501	AM_RANGE(0xf1, 0xf1) AM_READ(nb1413m3_dipsw2_r)
578	502	ADDRESS_MAP_END
579	503
580		static ADDRESS_MAP_START( writeport_hanamomo, ADDRESS_SPACE_IO, 8 )
	504	static ADDRESS_MAP_START( hanamomo_io_map, ADDRESS_SPACE_IO, 8 )
581	505	ADDRESS_MAP_GLOBAL_MASK(0xff)
	506	AM_RANGE(0x00, 0x7f) AM_READ(nb1413m3_sndrom_r)
582	507	AM_RANGE(0x00, 0x00) AM_WRITE(nb1413m3_nmi_clock_w)
583	508	AM_RANGE(0x30, 0x37) AM_WRITE(nbmj8891_blitter_w)
584	509	AM_RANGE(0x40, 0x40) AM_WRITE(nbmj8891_clutsel_w)
585	510	AM_RANGE(0x60, 0x60) AM_WRITE(nbmj8891_romsel_w)
586	511	AM_RANGE(0x70, 0x70) AM_WRITE(nbmj8891_scrolly_w)
587	512	AM_RANGE(0x80, 0x81) AM_DEVWRITE("fm", ym3812_w)
588		AM_RANGE(0xa0, 0xa0) AM_WRITE(nb1413m3_inputportsel_w)
589		AM_RANGE(0xb0, 0xb0) AM_WRITE(nb1413m3_sndrombank1_w)
590		//  AM_RANGE(0xc0, 0xc0) AM_WRITENOP
	513	AM_RANGE(0x90, 0x90) AM_READ(nb1413m3_inputport0_r)
	514	AM_RANGE(0xa0, 0xa0) AM_READWRITE(nb1413m3_inputport1_r,nb1413m3_inputportsel_w)
	515	AM_RANGE(0xb0, 0xb0) AM_READWRITE(nb1413m3_inputport2_r,nb1413m3_sndrombank1_w)
	516	AM_RANGE(0xc0, 0xc0) AM_READ(nb1413m3_inputport3_r) //AM_WRITENOP
591	517	AM_RANGE(0xd0, 0xd0) AM_DEVWRITE("dac", DAC_WRITE)
592	518	//  AM_RANGE(0xe0, 0xe0) AM_WRITENOP
593		//  AM_RANGE(0xf0, 0xf0) AM_WRITENOP
	519	AM_RANGE(0xf0, 0xf0) AM_READ(nb1413m3_dipsw1_r) //AM_WRITENOP
	520	AM_RANGE(0xf1, 0xf1) AM_READ(nb1413m3_dipsw2_r)
594	521	ADDRESS_MAP_END
595	522
596		static ADDRESS_MAP_START( writeport_msjiken, ADDRESS_SPACE_IO, 8 )
	523	static ADDRESS_MAP_START( msjiken_io_map, ADDRESS_SPACE_IO, 8 )
597	524	ADDRESS_MAP_GLOBAL_MASK(0xff)
	525	AM_RANGE(0x00, 0x7f) AM_READ(nb1413m3_sndrom_r)
598	526	AM_RANGE(0x00, 0x00) AM_WRITE(nb1413m3_nmi_clock_w)
599	527	AM_RANGE(0x40, 0x40) AM_WRITE(nbmj8891_clutsel_w)
600	528	AM_RANGE(0x50, 0x57) AM_WRITE(nbmj8891_blitter_w)
601	529	AM_RANGE(0x60, 0x60) AM_WRITE(nbmj8891_romsel_w)
602	530	AM_RANGE(0x70, 0x70) AM_WRITE(nbmj8891_scrolly_w)
603	531	AM_RANGE(0x80, 0x81) AM_DEVWRITE("fm", ym3812_w)
604		AM_RANGE(0xa0, 0xa0) AM_WRITE(nb1413m3_inputportsel_w)
605		AM_RANGE(0xb0, 0xb0) AM_WRITE(nb1413m3_sndrombank1_w)
606		//  AM_RANGE(0xc0, 0xc0) AM_WRITENOP
	532	AM_RANGE(0x90, 0x90) AM_READ(nb1413m3_inputport0_r)
	533	AM_RANGE(0xa0, 0xa0) AM_READWRITE(nb1413m3_inputport1_r,nb1413m3_inputportsel_w)
	534	AM_RANGE(0xb0, 0xb0) AM_READWRITE(nb1413m3_inputport2_r,nb1413m3_sndrombank1_w)
	535	AM_RANGE(0xc0, 0xc0) AM_READ(nb1413m3_inputport3_r) //AM_WRITENOP
607	536	AM_RANGE(0xd0, 0xd0) AM_DEVWRITE("dac", DAC_WRITE)
608	537	//  AM_RANGE(0xe0, 0xe0) AM_WRITENOP
609		//  AM_RANGE(0xf0, 0xf0) AM_WRITENOP
	538	AM_RANGE(0xf0, 0xf0) AM_READ(nb1413m3_dipsw1_r) //AM_WRITENOP
	539	AM_RANGE(0xf1, 0xf1) AM_READ(nb1413m3_dipsw2_r)
610	540	ADDRESS_MAP_END
611	541
612		static ADDRESS_MAP_START( writeport_scandal, ADDRESS_SPACE_IO, 8 )
	542	static ADDRESS_MAP_START( scandal_io_map, ADDRESS_SPACE_IO, 8 )
613	543	ADDRESS_MAP_GLOBAL_MASK(0xff)
	544	AM_RANGE(0x00, 0x7f) AM_READ(nb1413m3_sndrom_r)
614	545	AM_RANGE(0x40, 0x4f) AM_WRITE(nbmj8891_clut_w)
615	546	AM_RANGE(0x00, 0x07) AM_WRITE(nbmj8891_blitter_w)
616	547	AM_RANGE(0x10, 0x10) AM_WRITE(nbmj8891_romsel_w)
617	548	AM_RANGE(0x20, 0x20) AM_WRITE(nbmj8891_clutsel_w)
618	549	AM_RANGE(0x50, 0x50) AM_WRITE(nbmj8891_scrolly_w)
619	550	AM_RANGE(0x80, 0x81) AM_DEVWRITE("fm", ym3812_w)
620		AM_RANGE(0xa0, 0xa0) AM_WRITE(nb1413m3_inputportsel_w)
621		AM_RANGE(0xb0, 0xb0) AM_WRITE(nb1413m3_sndrombank1_w)
622		AM_RANGE(0xc0, 0xc0) AM_WRITE(nb1413m3_nmi_clock_w)
	551	AM_RANGE(0x90, 0x90) AM_READ(nb1413m3_inputport0_r)
	552	AM_RANGE(0xa0, 0xa0) AM_READWRITE(nb1413m3_inputport1_r,nb1413m3_inputportsel_w)
	553	AM_RANGE(0xb0, 0xb0) AM_READWRITE(nb1413m3_inputport2_r,nb1413m3_sndrombank1_w)
	554	AM_RANGE(0xc0, 0xc0) AM_READWRITE(nb1413m3_inputport3_r,nb1413m3_nmi_clock_w)
623	555	AM_RANGE(0xd0, 0xd0) AM_DEVWRITE("dac", DAC_WRITE)
624	556	//  AM_RANGE(0xe0, 0xe0) AM_WRITENOP
625		//  AM_RANGE(0xf0, 0xf0) AM_WRITENOP
626		ADDRESS_MAP_END
627
628		static ADDRESS_MAP_START( readport_scandalm, ADDRESS_SPACE_IO, 8 )
629		ADDRESS_MAP_GLOBAL_MASK(0xff)
630		AM_RANGE(0x00, 0x7f) AM_READ(nb1413m3_sndrom_r)
631		AM_RANGE(0x81, 0x81) AM_DEVREAD("fm", ay8910_r)
632		AM_RANGE(0x90, 0x90) AM_READ(nb1413m3_inputport0_r)
633		AM_RANGE(0xa0, 0xa0) AM_READ(nb1413m3_inputport1_r)
634		AM_RANGE(0xb0, 0xb0) AM_READ(nb1413m3_inputport2_r)
635		AM_RANGE(0xc0, 0xc0) AM_READ(nb1413m3_inputport3_r)
636		AM_RANGE(0xf0, 0xf0) AM_READ(nb1413m3_dipsw1_r)
	557	AM_RANGE(0xf0, 0xf0) AM_READ(nb1413m3_dipsw1_r) //AM_WRITENOP
637	558	AM_RANGE(0xf1, 0xf1) AM_READ(nb1413m3_dipsw2_r)
638	559	ADDRESS_MAP_END
639	560
640		static ADDRESS_MAP_START( writeport_scandalm, ADDRESS_SPACE_IO, 8 )
	561	static ADDRESS_MAP_START( scandalm_io_map, ADDRESS_SPACE_IO, 8 )
641	562	ADDRESS_MAP_GLOBAL_MASK(0xff)
642		AM_RANGE(0x40, 0x4f) AM_WRITE(nbmj8891_clut_w)
	563	AM_RANGE(0x00, 0x7f) AM_READ(nb1413m3_sndrom_r)
643	564	AM_RANGE(0x00, 0x07) AM_WRITE(nbmj8891_blitter_w)
644	565	AM_RANGE(0x10, 0x10) AM_WRITE(nbmj8891_romsel_w)
645	566	AM_RANGE(0x20, 0x20) AM_WRITE(nbmj8891_clutsel_w)
	567	AM_RANGE(0x40, 0x4f) AM_WRITE(nbmj8891_clut_w)
646	568	AM_RANGE(0x50, 0x50) AM_WRITE(nbmj8891_scrolly_w)
	569	AM_RANGE(0x81, 0x81) AM_DEVREAD("fm", ay8910_r)
647	570	AM_RANGE(0x82, 0x83) AM_DEVWRITE("fm", ay8910_data_address_w)
648		AM_RANGE(0xa0, 0xa0) AM_WRITE(nb1413m3_inputportsel_w)
649		AM_RANGE(0xb0, 0xb0) AM_WRITE(nb1413m3_sndrombank1_w)
650		AM_RANGE(0xc0, 0xc0) AM_WRITE(nb1413m3_nmi_clock_w)
	571	AM_RANGE(0x90, 0x90) AM_READ(nb1413m3_inputport0_r)
	572	AM_RANGE(0xa0, 0xa0) AM_READWRITE(nb1413m3_inputport1_r,nb1413m3_inputportsel_w)
	573	AM_RANGE(0xb0, 0xb0) AM_READWRITE(nb1413m3_inputport2_r,nb1413m3_sndrombank1_w)
	574	AM_RANGE(0xc0, 0xc0) AM_READWRITE(nb1413m3_inputport3_r,nb1413m3_nmi_clock_w)
651	575	AM_RANGE(0xd0, 0xd0) AM_DEVWRITE("dac", DAC_WRITE)
652	576	//  AM_RANGE(0xe0, 0xe0) AM_WRITENOP
653		AM_RANGE(0xf0, 0xf0) AM_WRITE(nb1413m3_outcoin_w)
	577	AM_RANGE(0xf0, 0xf0) AM_READWRITE(nb1413m3_dipsw1_r,nb1413m3_outcoin_w)
	578	AM_RANGE(0xf1, 0xf1) AM_READ(nb1413m3_dipsw2_r)
654	579	ADDRESS_MAP_END
655	580
656		static ADDRESS_MAP_START( writeport_bananadr, ADDRESS_SPACE_IO, 8 )
	581	static ADDRESS_MAP_START( bananadr_io_map, ADDRESS_SPACE_IO, 8 )
657	582	ADDRESS_MAP_GLOBAL_MASK(0xff)
658		AM_RANGE(0x40, 0x4f) AM_WRITE(nbmj8891_clut_w)
	583	AM_RANGE(0x00, 0x7f) AM_READ(nb1413m3_sndrom_r)
659	584	AM_RANGE(0x00, 0x07) AM_WRITE(nbmj8891_blitter_w)
660	585	AM_RANGE(0x10, 0x10) AM_WRITE(nbmj8891_romsel_w)
661	586	AM_RANGE(0x20, 0x20) AM_WRITE(nbmj8891_clutsel_w)
662	587	AM_RANGE(0x30, 0x30) AM_WRITE(nbmj8891_vramsel_w)
	588	AM_RANGE(0x40, 0x4f) AM_WRITE(nbmj8891_clut_w)
663	589	AM_RANGE(0x50, 0x50) AM_WRITE(nbmj8891_scrolly_w)
664	590	AM_RANGE(0x80, 0x81) AM_DEVWRITE("fm", ym3812_w)
665		AM_RANGE(0xa0, 0xa0) AM_WRITE(nb1413m3_inputportsel_w)
666		AM_RANGE(0xb0, 0xb0) AM_WRITE(nb1413m3_sndrombank1_w)
667		AM_RANGE(0xc0, 0xc0) AM_WRITE(nb1413m3_nmi_clock_w)
	591	AM_RANGE(0x90, 0x90) AM_READ(nb1413m3_inputport0_r)
	592	AM_RANGE(0xa0, 0xa0) AM_READWRITE(nb1413m3_inputport1_r,nb1413m3_inputportsel_w)
	593	AM_RANGE(0xb0, 0xb0) AM_READWRITE(nb1413m3_inputport2_r,nb1413m3_sndrombank1_w)
	594	AM_RANGE(0xc0, 0xc0) AM_READWRITE(nb1413m3_inputport3_r,nb1413m3_nmi_clock_w)
668	595	AM_RANGE(0xd0, 0xd0) AM_DEVWRITE("dac", DAC_WRITE)
669	596	//  AM_RANGE(0xe0, 0xe0) AM_WRITENOP
670		AM_RANGE(0xf0, 0xf0) AM_WRITE(nb1413m3_outcoin_w)
671		ADDRESS_MAP_END
672
673		static ADDRESS_MAP_START( readport_lovehous, ADDRESS_SPACE_IO, 8 )
674		ADDRESS_MAP_GLOBAL_MASK(0xff)
675		AM_RANGE(0x00, 0x7f) AM_READ(nb1413m3_sndrom_r)
676		AM_RANGE(0x90, 0x90) AM_READ(nb1413m3_inputport0_r)
677		AM_RANGE(0xa0, 0xa0) AM_READ(nb1413m3_inputport1_r)
678		AM_RANGE(0xb0, 0xb0) AM_READ(nb1413m3_inputport2_r)
679		AM_RANGE(0xc0, 0xc0) AM_READ_PORT("PORT0-2")
680		AM_RANGE(0xf0, 0xf0) AM_READ(nb1413m3_dipsw1_r)
	597	AM_RANGE(0xf0, 0xf0) AM_READWRITE(nb1413m3_dipsw1_r,nb1413m3_outcoin_w)
681	598	AM_RANGE(0xf1, 0xf1) AM_READ(nb1413m3_dipsw2_r)
682	599	ADDRESS_MAP_END
683	600
684		static ADDRESS_MAP_START( writeport_lovehous, ADDRESS_SPACE_IO, 8 )
	601	static ADDRESS_MAP_START( lovehous_io_map, ADDRESS_SPACE_IO, 8 )
685	602	ADDRESS_MAP_GLOBAL_MASK(0xff)
	603	AM_RANGE(0x00, 0x7f) AM_READ(nb1413m3_sndrom_r)
686	604	AM_RANGE(0x00, 0x00) AM_WRITE(nb1413m3_nmi_clock_w)
687	605	AM_RANGE(0x40, 0x40) AM_WRITE(nbmj8891_clutsel_w)
688	606	AM_RANGE(0x50, 0x57) AM_WRITE(nbmj8891_blitter_w)
689	607	AM_RANGE(0x60, 0x60) AM_WRITE(nbmj8891_romsel_w)
690	608	AM_RANGE(0x70, 0x70) AM_WRITE(nbmj8891_scrolly_w)
691	609	AM_RANGE(0x80, 0x81) AM_DEVWRITE("fm", ym3812_w)
692		//  AM_RANGE(0x90, 0x90) AM_WRITENOP
693		AM_RANGE(0xa0, 0xa0) AM_WRITE(nb1413m3_inputportsel_w)
694		AM_RANGE(0xb0, 0xb0) AM_WRITE(nb1413m3_sndrombank1_w)
	610	AM_RANGE(0x90, 0x90) AM_READ(nb1413m3_inputport0_r) //AM_WRITENOP
	611	AM_RANGE(0xa0, 0xa0) AM_READWRITE(nb1413m3_inputport1_r,nb1413m3_inputportsel_w)
	612	AM_RANGE(0xb0, 0xb0) AM_READWRITE(nb1413m3_inputport2_r,nb1413m3_sndrombank1_w)
	613	AM_RANGE(0xc0, 0xc0) AM_READ_PORT("PORT0-2")
695	614	AM_RANGE(0xd0, 0xd0) AM_DEVWRITE("dac", DAC_WRITE)
696	615	AM_RANGE(0xe0, 0xe0) AM_WRITE(nbmj8891_vramsel_w)
697		AM_RANGE(0xf0, 0xf0) AM_WRITE(nb1413m3_outcoin_w)
698		ADDRESS_MAP_END
699
700		static ADDRESS_MAP_START( readport_maiko, ADDRESS_SPACE_IO, 8 )
701		ADDRESS_MAP_GLOBAL_MASK(0xff)
702		AM_RANGE(0x00, 0x7f) AM_READ(nb1413m3_sndrom_r)
703		AM_RANGE(0x90, 0x90) AM_READ(nb1413m3_inputport0_r)
704		AM_RANGE(0xa0, 0xa0) AM_READ(nb1413m3_inputport1_r)
705		AM_RANGE(0xb0, 0xb0) AM_READ(nb1413m3_inputport2_r)
706		AM_RANGE(0xc0, 0xc0) AM_READ_PORT("PORT0-2")
707		AM_RANGE(0xf0, 0xf0) AM_READ(nb1413m3_dipsw1_r)
	616	AM_RANGE(0xf0, 0xf0) AM_READWRITE(nb1413m3_dipsw1_r,nb1413m3_outcoin_w)
708	617	AM_RANGE(0xf1, 0xf1) AM_READ(nb1413m3_dipsw2_r)
709	618	ADDRESS_MAP_END
710	619
711		static ADDRESS_MAP_START( writeport_maiko, ADDRESS_SPACE_IO, 8 )
	620	static ADDRESS_MAP_START( maiko_io_map, ADDRESS_SPACE_IO, 8 )
712	621	ADDRESS_MAP_GLOBAL_MASK(0xff)
	622	AM_RANGE(0x00, 0x7f) AM_READ(nb1413m3_sndrom_r)
713	623	AM_RANGE(0x00, 0x00) AM_WRITE(nb1413m3_nmi_clock_w)
714	624	AM_RANGE(0x40, 0x40) AM_WRITE(nbmj8891_clutsel_w)
715	625	AM_RANGE(0x50, 0x57) AM_WRITE(nbmj8891_blitter_w)
716	626	AM_RANGE(0x60, 0x60) AM_WRITE(nbmj8891_romsel_w)
717	627	AM_RANGE(0x70, 0x70) AM_WRITE(nbmj8891_scrolly_w)
718	628	AM_RANGE(0x80, 0x81) AM_DEVWRITE("fm", ym3812_w)
719		AM_RANGE(0xa0, 0xa0) AM_WRITE(nb1413m3_inputportsel_w)
720		AM_RANGE(0xb0, 0xb0) AM_WRITE(nb1413m3_sndrombank1_w)
721		//  AM_RANGE(0xc0, 0xc0) AM_WRITENOP
	629	AM_RANGE(0x90, 0x90) AM_READ(nb1413m3_inputport0_r)
	630	AM_RANGE(0xa0, 0xa0) AM_READWRITE(nb1413m3_inputport1_r,nb1413m3_inputportsel_w)
	631	AM_RANGE(0xb0, 0xb0) AM_READWRITE(nb1413m3_inputport2_r,nb1413m3_sndrombank1_w)
	632	AM_RANGE(0xc0, 0xc0) AM_READ_PORT("PORT0-2") //AM_WRITENOP
722	633	AM_RANGE(0xd0, 0xd0) AM_DEVWRITE("dac", DAC_WRITE)
723	634	AM_RANGE(0xe0, 0xe0) AM_WRITE(nbmj8891_vramsel_w)
724		AM_RANGE(0xf0, 0xf0) AM_WRITE(nb1413m3_outcoin_w)
	635	AM_RANGE(0xf0, 0xf0) AM_READWRITE(nb1413m3_dipsw1_r,nb1413m3_outcoin_w)
	636	AM_RANGE(0xf1, 0xf1) AM_READ(nb1413m3_dipsw2_r)
725	637	ADDRESS_MAP_END
726	638
727		static ADDRESS_MAP_START( readport_taiwanmb, ADDRESS_SPACE_IO, 8 )
	639	static ADDRESS_MAP_START( taiwanmb_io_map, ADDRESS_SPACE_IO, 8 )
728	640	ADDRESS_MAP_GLOBAL_MASK(0xff)
729	641	AM_RANGE(0x00, 0x7f) AM_READ(nb1413m3_sndrom_r)
730	642	AM_RANGE(0x81, 0x81) AM_DEVREAD("fm", ay8910_r)
731		AM_RANGE(0x90, 0x90) AM_READ(nb1413m3_inputport0_r)
732		AM_RANGE(0xa0, 0xa0) AM_READ(nb1413m3_inputport1_r)
733		AM_RANGE(0xb0, 0xb0) AM_READ(nb1413m3_inputport2_r)
	643	AM_RANGE(0x82, 0x83) AM_DEVWRITE("fm", ay8910_data_address_w)
	644	AM_RANGE(0x90, 0x90) AM_READ(nb1413m3_inputport0_r) //AM_WRITENOP   // ?
	645	AM_RANGE(0xa0, 0xa0) AM_READWRITE(nb1413m3_inputport1_r,nb1413m3_inputportsel_w)
	646	AM_RANGE(0xb0, 0xb0) AM_READWRITE(nb1413m3_inputport2_r,nb1413m3_sndrombank1_w)
	647	//  AM_RANGE(0xc0, 0xc0) AM_WRITENOP                    // ?
734	648	//  AM_RANGE(0xd0, 0xd0) AM_READ(ff_r)  // irq ack? watchdog?
735		AM_RANGE(0xe0, 0xe0) AM_READ(nb1413m3_dipsw3_h_r)
	649	AM_RANGE(0xd0, 0xd0) AM_DEVWRITE("dac", DAC_WRITE)
	650	AM_RANGE(0xe0, 0xe0) AM_READ(nb1413m3_dipsw3_h_r) AM_WRITE(nbmj8891_taiwanmb_gfxdraw_w)   // blitter draw start
736	651	AM_RANGE(0xe1, 0xe1) AM_READ(nb1413m3_dipsw3_l_r)
737		AM_RANGE(0xf0, 0xf0) AM_READ(nb1413m3_dipsw2_r)
	652	AM_RANGE(0xf0, 0xf0) AM_READWRITE(nb1413m3_dipsw2_r,nb1413m3_outcoin_w)
738	653	AM_RANGE(0xf1, 0xf1) AM_READ(nb1413m3_dipsw1_r)
739	654	ADDRESS_MAP_END
740	655
741		static ADDRESS_MAP_START( writeport_taiwanmb, ADDRESS_SPACE_IO, 8 )
742		ADDRESS_MAP_GLOBAL_MASK(0xff)
743		AM_RANGE(0x82, 0x83) AM_DEVWRITE("fm", ay8910_data_address_w)
744		//  AM_RANGE(0x90, 0x90) AM_WRITENOP                     // ?
745		AM_RANGE(0xa0, 0xa0) AM_WRITE(nb1413m3_inputportsel_w)
746		AM_RANGE(0xb0, 0xb0) AM_WRITE(nb1413m3_sndrombank1_w)
747		//  AM_RANGE(0xc0, 0xc0) AM_WRITENOP                     // ?
748		AM_RANGE(0xd0, 0xd0) AM_DEVWRITE("dac", DAC_WRITE)
749		AM_RANGE(0xe0, 0xe0) AM_WRITE(nbmj8891_taiwanmb_gfxdraw_w)   // blitter draw start
750		AM_RANGE(0xf0, 0xf0) AM_WRITE(nb1413m3_outcoin_w)
751		ADDRESS_MAP_END
752	656
753
754	657	static INPUT_PORTS_START( hanamomo )
755	658	PORT_START("DSWA")
756	659	PORT_DIPNAME( 0x07, 0x07, DEF_STR( Difficulty ) )
r4679	r4680
2710	2613
2711	2614	/* basic machine hardware */
2712	2615	MDRV_CPU_ADD("maincpu", Z80, 20000000/4)   /* 5.00 MHz ? */
2713		MDRV_CPU_PROGRAM_MAP(readmem_gionbana, writemem_gionbana)
2714		MDRV_CPU_IO_MAP(readport_gionbana, writeport_gionbana)
	2616	MDRV_CPU_PROGRAM_MAP(gionbana_map, 0)
	2617	MDRV_CPU_IO_MAP(gionbana_io_map, 0)
2715	2618	//  MDRV_CPU_VBLANK_INT_HACK(nb1413m3_interrupt, 132)    // nmiclock = 60
2716	2619	MDRV_CPU_VBLANK_INT("screen", nb1413m3_interrupt)
2717	2620
r4679	r4680
2746	2649	/* basic machine hardware */
2747	2650	MDRV_IMPORT_FROM(gionbana)
2748	2651	MDRV_CPU_MODIFY("maincpu")
2749		MDRV_CPU_PROGRAM_MAP(readmem_hanamomo,writemem_mgion)
2750		MDRV_CPU_IO_MAP(readport_gionbana,writeport_mgion)
	2652	MDRV_CPU_PROGRAM_MAP(mgion_map,0)
	2653	MDRV_CPU_IO_MAP(mgion_io_map,0)
2751	2654
2752	2655	MDRV_NVRAM_HANDLER(nb1413m3)
2753	2656	MACHINE_DRIVER_END
r4679	r4680
2758	2661	/* basic machine hardware */
2759	2662	MDRV_IMPORT_FROM(gionbana)
2760	2663	MDRV_CPU_MODIFY("maincpu")
2761		MDRV_CPU_PROGRAM_MAP(readmem_omotesnd,writemem_omotesnd)
2762		MDRV_CPU_IO_MAP(readport_omotesnd,writeport_omotesnd)
	2664	MDRV_CPU_PROGRAM_MAP(omotesnd_map,0)
	2665	MDRV_CPU_IO_MAP(omotesnd_io_map,0)
2763	2666
2764	2667	MDRV_NVRAM_HANDLER(nb1413m3)
2765	2668
r4679	r4680
2776	2679	/* basic machine hardware */
2777	2680	MDRV_IMPORT_FROM(gionbana)
2778	2681	MDRV_CPU_MODIFY("maincpu")
2779		MDRV_CPU_IO_MAP(readport_gionbana, writeport_hanamomo)
	2682	MDRV_CPU_IO_MAP(hanamomo_io_map, 0)
2780	2683	//  MDRV_CPU_VBLANK_INT_HACK(nb1413m3_interrupt, 142)    // ?
2781	2684
2782	2685	MDRV_NVRAM_HANDLER(nb1413m3)
r4679	r4680
2792	2695	/* basic machine hardware */
2793	2696	MDRV_IMPORT_FROM(gionbana)
2794	2697	MDRV_CPU_MODIFY("maincpu")
2795		MDRV_CPU_IO_MAP(readport_gionbana, writeport_hanamomo)
	2698	MDRV_CPU_IO_MAP(hanamomo_io_map, 0)
2796	2699	//  MDRV_CPU_VBLANK_INT_HACK(nb1413m3_interrupt, 128)
2797	2700
2798	2701	MDRV_NVRAM_HANDLER(nb1413m3)
r4679	r4680
2808	2711	/* basic machine hardware */
2809	2712	MDRV_IMPORT_FROM(gionbana)
2810	2713	MDRV_CPU_MODIFY("maincpu")
2811		MDRV_CPU_PROGRAM_MAP(readmem_hanamomo, writemem_hanamomo)
2812		MDRV_CPU_IO_MAP(readport_gionbana, writeport_hanamomo)
	2714	MDRV_CPU_PROGRAM_MAP(hanamomo_map, 0)
	2715	MDRV_CPU_IO_MAP(hanamomo_io_map, 0)
2813	2716	//  MDRV_CPU_VBLANK_INT_HACK(nb1413m3_interrupt, 128)
2814	2717
2815	2718	/* video hardware */
r4679	r4680
2824	2727	/* basic machine hardware */
2825	2728	MDRV_IMPORT_FROM(hanamomo)
2826	2729	MDRV_CPU_MODIFY("maincpu")
2827		MDRV_CPU_PROGRAM_MAP(readmem_gionbana, writemem_gionbana)
2828		MDRV_CPU_IO_MAP(readport_gionbana, writeport_msjiken)
	2730	MDRV_CPU_PROGRAM_MAP(gionbana_map, 0)
	2731	MDRV_CPU_IO_MAP(msjiken_io_map, 0)
2829	2732	//  MDRV_CPU_VBLANK_INT_HACK(nb1413m3_interrupt, 142)    // nmiclock = 70
2830	2733	MACHINE_DRIVER_END
2831	2734
r4679	r4680
2870	2773	/* basic machine hardware */
2871	2774	MDRV_IMPORT_FROM(gionbana)
2872	2775	MDRV_CPU_MODIFY("maincpu")
2873		MDRV_CPU_PROGRAM_MAP(readmem_club90s, writemem_club90s)
	2776	MDRV_CPU_PROGRAM_MAP(club90s_map, 0)
2874	2777	MACHINE_DRIVER_END
2875	2778
2876	2779
r4679	r4680
2879	2782	/* basic machine hardware */
2880	2783	MDRV_IMPORT_FROM(mjnanpas)
2881	2784	MDRV_CPU_MODIFY("maincpu")
2882		MDRV_CPU_PROGRAM_MAP(readmem_maiko, writemem_maiko)
2883		MDRV_CPU_IO_MAP(readport_maiko, writeport_maiko)
	2785	MDRV_CPU_PROGRAM_MAP(maiko_map, 0)
	2786	MDRV_CPU_IO_MAP(maiko_io_map, 0)
2884	2787	MACHINE_DRIVER_END
2885	2788
2886	2789
r4679	r4680
2889	2792	/* basic machine hardware */
2890	2793	MDRV_IMPORT_FROM(maiko)
2891	2794	MDRV_CPU_MODIFY("maincpu")
2892		MDRV_CPU_PROGRAM_MAP(readmem_maiko, writemem_mmaiko)
	2795	MDRV_CPU_PROGRAM_MAP(maiko_map, 0)
2893	2796
2894	2797	MDRV_NVRAM_HANDLER(nb1413m3)
2895	2798	MACHINE_DRIVER_END
r4679	r4680
2900	2803	/* basic machine hardware */
2901	2804	MDRV_IMPORT_FROM(mjnanpas)
2902	2805	MDRV_CPU_MODIFY("maincpu")
2903		MDRV_CPU_PROGRAM_MAP(readmem_lovehous, writemem_lovehous)
2904		MDRV_CPU_IO_MAP(readport_lovehous, writeport_lovehous)
	2806	MDRV_CPU_PROGRAM_MAP(lovehous_map, 0)
	2807	MDRV_CPU_IO_MAP(lovehous_io_map, 0)
2905	2808
2906	2809	MDRV_NVRAM_HANDLER(nb1413m3)
2907	2810	MACHINE_DRIVER_END
r4679	r4680
2912	2815	/* basic machine hardware */
2913	2816	MDRV_IMPORT_FROM(maiko)
2914	2817	MDRV_CPU_MODIFY("maincpu")
2915		MDRV_CPU_PROGRAM_MAP(readmem_hanaoji, writemem_hanaoji)
	2818	MDRV_CPU_PROGRAM_MAP(hanaoji_map, 0)
2916	2819
2917	2820	MDRV_NVRAM_HANDLER(nb1413m3)
2918	2821	MACHINE_DRIVER_END
r4679	r4680
2922	2825	/* basic machine hardware */
2923	2826	MDRV_IMPORT_FROM(maiko)
2924	2827	MDRV_CPU_MODIFY("maincpu")
2925		MDRV_CPU_PROGRAM_MAP(hnxmasev_mem, 0)
2926		MDRV_CPU_IO_MAP(readport_maiko, writeport_maiko)
	2828	MDRV_CPU_PROGRAM_MAP(hnxmasev_map, 0)
	2829	MDRV_CPU_IO_MAP(maiko_io_map, 0)
2927	2830	MACHINE_DRIVER_END
2928	2831
2929	2832	static MACHINE_DRIVER_START( hnageman )
r4679	r4680
2931	2834	/* basic machine hardware */
2932	2835	MDRV_IMPORT_FROM(maiko)
2933	2836	MDRV_CPU_MODIFY("maincpu")
2934		MDRV_CPU_PROGRAM_MAP(hnageman_mem, 0)
2935		MDRV_CPU_IO_MAP(readport_maiko, writeport_maiko)
	2837	MDRV_CPU_PROGRAM_MAP(hnageman_map, 0)
	2838	MDRV_CPU_IO_MAP(maiko_io_map, 0)
2936	2839	MACHINE_DRIVER_END
2937	2840
2938	2841	static MACHINE_DRIVER_START( scandal )
r4679	r4680
2940	2843	/* basic machine hardware */
2941	2844	MDRV_IMPORT_FROM(hanamomo)
2942	2845	MDRV_CPU_MODIFY("maincpu")
2943		MDRV_CPU_PROGRAM_MAP(readmem_scandalm, writemem_scandalm)
2944		MDRV_CPU_IO_MAP(readport_gionbana, writeport_scandal)
	2846	MDRV_CPU_PROGRAM_MAP(scandalm_map, 0)
	2847	MDRV_CPU_IO_MAP(scandal_io_map, 0)
2945	2848	MACHINE_DRIVER_END
2946	2849
2947	2850
r4679	r4680
2950	2853	/* basic machine hardware */
2951	2854	MDRV_IMPORT_FROM(mjnanpas)
2952	2855	MDRV_CPU_MODIFY("maincpu")
2953		MDRV_CPU_PROGRAM_MAP(readmem_scandalm, writemem_scandalm)
2954		MDRV_CPU_IO_MAP(readport_gionbana, writeport_bananadr)
	2856	MDRV_CPU_PROGRAM_MAP(scandalm_map, 0)
	2857	MDRV_CPU_IO_MAP(bananadr_io_map, 0)
2955	2858
2956	2859	MDRV_NVRAM_HANDLER(nb1413m3)
2957	2860	MACHINE_DRIVER_END
r4679	r4680
2963	2866	/* basic machine hardware */
2964	2867	MDRV_IMPORT_FROM(gionbana)
2965	2868	MDRV_CPU_MODIFY("maincpu")
2966		MDRV_CPU_PROGRAM_MAP(readmem_scandalm, writemem_scandalm)
2967		MDRV_CPU_IO_MAP(readport_scandalm, writeport_scandalm)
	2869	MDRV_CPU_PROGRAM_MAP(scandalm_map, 0)
	2870	MDRV_CPU_IO_MAP(scandalm_io_map, 0)
2968	2871	//  MDRV_CPU_VBLANK_INT_HACK(nb1413m3_interrupt, 128)
2969	2872
2970	2873	MDRV_NVRAM_HANDLER(nb1413m3)
r4679	r4680
2986	2889	/* basic machine hardware */
2987	2890	MDRV_IMPORT_FROM(gionbana)
2988	2891	MDRV_CPU_MODIFY("maincpu")
2989		MDRV_CPU_PROGRAM_MAP(readmem_taiwanmb, writemem_taiwanmb)
2990		MDRV_CPU_IO_MAP(readport_taiwanmb, writeport_taiwanmb)
	2892	MDRV_CPU_PROGRAM_MAP(taiwanmb_map, 0)
	2893	MDRV_CPU_IO_MAP(taiwanmb_io_map, 0)
2991	2894	//  MDRV_CPU_VBLANK_INT("screen", nb1413m3_interrupt)
2992	2895
2993	2896	MDRV_NVRAM_HANDLER(nb1413m3)

src/mame/drivers/wc90b.c

r4679	r4680
142	142
143	143	static WRITE8_HANDLER( wc90b_sound_command_w )
144	144	{
145		soundlatch_w(space,offset,data);
146		cpu_set_input_line(space->machine->cpu[2],0,HOLD_LINE);
	145	soundlatch_w(space, offset, data);
	146	cputag_set_input_line(space->machine, "audiocpu", 0, HOLD_LINE);
147	147	}
148	148
149	149	static WRITE8_DEVICE_HANDLER( adpcm_control_w )
r4679	r4680
351	351	/* handler called by the 2203 emulator when the internal timers cause an IRQ */
352	352	static void irqhandler(const device_config *device, int irq)
353	353	{
354		cpu_set_input_line(device->machine->cpu[2], INPUT_LINE_NMI, irq ? ASSERT_LINE : CLEAR_LINE);
	354	cputag_set_input_line(device->machine, "audiocpu", INPUT_LINE_NMI, irq ? ASSERT_LINE : CLEAR_LINE);
355	355	}
356	356
357	357	static const ym2203_interface ym2203_config =
r4679	r4680
368	368	{
369	369	static int toggle = 0;
370	370
371		msm5205_data_w (device,msm5205next);
372		msm5205next>>=4;
	371	msm5205_data_w(device, msm5205next);
	372	msm5205next >>= 4;
373	373
374	374	toggle ^= 1;
375	375	if(toggle)
376		cpu_set_input_line(device->machine->cpu[2], INPUT_LINE_NMI, PULSE_LINE);
377
	376	cputag_set_input_line(device->machine, "audiocpu", INPUT_LINE_NMI, PULSE_LINE);
378	377	}
379	378
380	379	static const msm5205_interface msm5205_config =

src/mame/drivers/kncljoe.c

r4679	r4680
49	49	if ((data & 0x80) == 0)
50	50	soundlatch_w(space, 0, data & 0x7f);
51	51	else
52		cpu_set_input_line(space->machine->cpu[1], 0, ASSERT_LINE);
	52	cputag_set_input_line(space->machine, "soundcpu", 0, ASSERT_LINE);
53	53	}
54	54
55	55
r4679	r4680
104	104
105	105	static WRITE8_HANDLER( sound_irq_ack_w )
106	106	{
107		cpu_set_input_line(space->machine->cpu[1], 0, CLEAR_LINE);
	107	cputag_set_input_line(space->machine, "soundcpu", 0, CLEAR_LINE);
108	108	}
109	109
110	110	static WRITE8_DEVICE_HANDLER(unused_w)

src/mame/drivers/holeland.c

r4679	r4680
27	27	WRITE8_HANDLER( holeland_scroll_w );
28	28
29	29
30		static ADDRESS_MAP_START( readmem, ADDRESS_SPACE_PROGRAM, 8 )
31		AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM)
32		AM_RANGE(0x8000, 0x87ff) AM_READ(SMH_RAM)
33		AM_RANGE(0xa000, 0xbfff) AM_READ(SMH_ROM)
34		AM_RANGE(0xf000, 0xf3ff) AM_READ(SMH_RAM)
35		ADDRESS_MAP_END
36
37		static ADDRESS_MAP_START( writemem, ADDRESS_SPACE_PROGRAM, 8 )
38		AM_RANGE(0x0000, 0x7fff) AM_WRITE(SMH_ROM)
39		AM_RANGE(0x8000, 0x87ff) AM_WRITE(SMH_RAM)
40		AM_RANGE(0xa000, 0xbfff) AM_WRITE(SMH_ROM)
	30	static ADDRESS_MAP_START( holeland_map, ADDRESS_SPACE_PROGRAM, 8 )
	31	AM_RANGE(0x0000, 0x7fff) AM_ROM
	32	AM_RANGE(0x8000, 0x87ff) AM_RAM
	33	AM_RANGE(0xa000, 0xbfff) AM_ROM
41	34	AM_RANGE(0xc000, 0xc001) AM_WRITE(holeland_pal_offs_w)
42	35	AM_RANGE(0xc006, 0xc007) AM_WRITE(holeland_flipscreen_w)
43	36	AM_RANGE(0xe000, 0xe3ff) AM_WRITE(holeland_colorram_w) AM_BASE(&colorram)
44	37	AM_RANGE(0xe400, 0xe7ff) AM_WRITE(holeland_videoram_w) AM_BASE(&videoram) AM_SIZE(&videoram_size)
45		AM_RANGE(0xf000, 0xf3ff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
	38	AM_RANGE(0xf000, 0xf3ff) AM_RAM AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
46	39	ADDRESS_MAP_END
47	40
48		static ADDRESS_MAP_START( crzrally_readmem, ADDRESS_SPACE_PROGRAM, 8 )
49		AM_RANGE(0x0000, 0xbfff) AM_READ(SMH_ROM)
50		AM_RANGE(0xc000, 0xc7ff) AM_READ(SMH_RAM)
51		AM_RANGE(0xe800, 0xebff) AM_READ(SMH_RAM)
52		ADDRESS_MAP_END
53
54		static ADDRESS_MAP_START( crzrally_writemem, ADDRESS_SPACE_PROGRAM, 8 )
55		AM_RANGE(0x0000, 0xbfff) AM_WRITE(SMH_ROM)
56		AM_RANGE(0xc000, 0xc7ff) AM_WRITE(SMH_RAM)
	41	static ADDRESS_MAP_START( crzrally_map, ADDRESS_SPACE_PROGRAM, 8 )
	42	AM_RANGE(0x0000, 0xbfff) AM_ROM
	43	AM_RANGE(0xc000, 0xc7ff) AM_RAM
57	44	AM_RANGE(0xe000, 0xe3ff) AM_WRITE(holeland_colorram_w) AM_BASE(&colorram)
58	45	AM_RANGE(0xe400, 0xe7ff) AM_WRITE(holeland_videoram_w) AM_BASE(&videoram) AM_SIZE(&videoram_size)
59		AM_RANGE(0xe800, 0xebff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
	46	AM_RANGE(0xe800, 0xebff) AM_RAM AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
60	47	AM_RANGE(0xf000, 0xf000) AM_WRITE(holeland_scroll_w)
61	48	AM_RANGE(0xf800, 0xf801) AM_WRITE(holeland_pal_offs_w)
62	49	ADDRESS_MAP_END
r4679	r4680
300	287
301	288	/* basic machine hardware */
302	289	MDRV_CPU_ADD("maincpu", Z80, 4000000)        /* 4 MHz ? */
303		MDRV_CPU_PROGRAM_MAP(readmem,writemem)
	290	MDRV_CPU_PROGRAM_MAP(holeland_map,0)
304	291	MDRV_CPU_IO_MAP(io_map,0)
305	292	MDRV_CPU_VBLANK_INT("screen", irq0_line_hold)
306	293
r4679	r4680
369	356
370	357	/* basic machine hardware */
371	358	MDRV_CPU_ADD("maincpu", Z80, 20000000/4)        /* 5 MHz */
372		MDRV_CPU_PROGRAM_MAP(crzrally_readmem,crzrally_writemem)
	359	MDRV_CPU_PROGRAM_MAP(crzrally_map,0)
373	360	MDRV_CPU_IO_MAP(io_map,0)
374	361	MDRV_CPU_VBLANK_INT("screen", irq0_line_hold)
375	362

src/mame/drivers/liberate.c

r4679	r4680
15	15	*******************************************************************************/
16	16
17	17	#include "driver.h"
18		#include "deprecat.h"
19	18	#include "cpu/m6502/m6502.h"
20	19	#include "sound/ay8910.h"
21	20
r4679	r4680
77	76	deco16_bank = data;
78	77
79	78	if (deco16_bank)
80		memory_install_read8_handler(cpu_get_address_space(space->machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x8000, 0x800f, 0, 0, deco16_io_r);
	79	memory_install_read8_handler(cputag_get_address_space(space->machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x8000, 0x800f, 0, 0, deco16_io_r);
81	80	else
82		memory_install_read8_handler(cpu_get_address_space(space->machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x8000, 0x800f, 0, 0, SMH_BANK1);
	81	memory_install_read8_handler(cputag_get_address_space(space->machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x8000, 0x800f, 0, 0, (read8_space_func)SMH_BANK(1));
83	82	}
84	83
85	84	/*************************************
r4679	r4680
88	87	*
89	88	*************************************/
90	89
91		static ADDRESS_MAP_START( prosport_readmem, ADDRESS_SPACE_PROGRAM, 8 )
92		AM_RANGE(0x0200, 0x021f) AM_READ(SMH_RAM)
93		AM_RANGE(0x0000, 0x0fff) AM_READ(SMH_RAM)
94		AM_RANGE(0x1000, 0x2fff) AM_READ(SMH_RAM)
95		AM_RANGE(0x8000, 0x800f) AM_READ(SMH_BANK1)
96		AM_RANGE(0x4000, 0xffff) AM_READ(SMH_ROM)
97		ADDRESS_MAP_END
98
99		static ADDRESS_MAP_START( prosport_writemem, ADDRESS_SPACE_PROGRAM, 8 )
100		AM_RANGE(0x0200, 0x021f) AM_WRITE(prosport_paletteram_w) AM_BASE(&paletteram)
101		AM_RANGE(0x0000, 0x0fff) AM_WRITE(SMH_RAM)
102		AM_RANGE(0x1200, 0x1fff) AM_WRITE(SMH_RAM)
	90	static ADDRESS_MAP_START( prosport_map, ADDRESS_SPACE_PROGRAM, 8 )
	91	AM_RANGE(0x0200, 0x021f) AM_RAM_WRITE(prosport_paletteram_w) AM_BASE(&paletteram)
	92	AM_RANGE(0x0000, 0x0fff) AM_RAM
103	93	AM_RANGE(0x3000, 0x37ff) AM_WRITE(liberate_videoram_w) AM_BASE(&videoram)
104		AM_RANGE(0x3800, 0x3fff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram)
	94	AM_RANGE(0x3800, 0x3fff) AM_WRITEONLY AM_BASE(&spriteram)
105	95	AM_RANGE(0x8000, 0x800f) AM_WRITE(deco16_io_w)
106		AM_RANGE(0x4000, 0xffff) AM_WRITE(SMH_ROM)
	96	AM_RANGE(0x8000, 0x800f) AM_ROMBANK(1)
	97	AM_RANGE(0x4000, 0xffff) AM_ROM
107	98	ADDRESS_MAP_END
108	99
109		static ADDRESS_MAP_START( liberate_readmem, ADDRESS_SPACE_PROGRAM, 8 )
110		AM_RANGE(0x0000, 0x0fff) AM_READ(SMH_RAM)
111		AM_RANGE(0x1000, 0x3fff) AM_READ(SMH_ROM) /* Mirror of main rom */
	100	static ADDRESS_MAP_START( liberate_map, ADDRESS_SPACE_PROGRAM, 8 )
	101	AM_RANGE(0x0000, 0x0fff) AM_RAM
	102	AM_RANGE(0x1000, 0x3fff) AM_ROM /* Mirror of main rom */
112	103	AM_RANGE(0x4000, 0x7fff) AM_READ(deco16_bank_r)
113		AM_RANGE(0x8000, 0x800f) AM_READ(SMH_BANK1)
114		AM_RANGE(0x6200, 0x67ff) AM_READ(SMH_RAM)
115		AM_RANGE(0x8000, 0xffff) AM_READ(SMH_ROM)
116		ADDRESS_MAP_END
117
118		static ADDRESS_MAP_START( liberate_writemem, ADDRESS_SPACE_PROGRAM, 8 )
119		AM_RANGE(0x0000, 0x0fff) AM_WRITE(SMH_RAM)
120		AM_RANGE(0x1000, 0x3fff) AM_WRITE(SMH_ROM) /* Mirror of main rom */
121	104	AM_RANGE(0x4000, 0x47ff) AM_WRITE(liberate_videoram_w) AM_BASE(&videoram)
122		AM_RANGE(0x4800, 0x4fff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram)
123		AM_RANGE(0x6200, 0x67ff) AM_WRITE(SMH_RAM) AM_BASE(&scratchram)
	105	AM_RANGE(0x4800, 0x4fff) AM_WRITEONLY AM_BASE(&spriteram)
	106	AM_RANGE(0x6200, 0x67ff) AM_RAM AM_BASE(&scratchram)
124	107	AM_RANGE(0x8000, 0x800f) AM_WRITE(deco16_io_w)
125		AM_RANGE(0x8000, 0xffff) AM_WRITE(SMH_ROM)
	108	AM_RANGE(0x8000, 0x800f) AM_ROMBANK(1)
	109	AM_RANGE(0x8000, 0xffff) AM_ROM
126	110	ADDRESS_MAP_END
127	111
128	112	static ADDRESS_MAP_START( deco16_io_map, ADDRESS_SPACE_IO, 8 )
129	113	AM_RANGE(0x00, 0x00) AM_READ_PORT("IN0") AM_WRITE(deco16_bank_w)
130	114	ADDRESS_MAP_END
131	115
132		static ADDRESS_MAP_START( liberatb_readmem, ADDRESS_SPACE_PROGRAM, 8 )
	116	static ADDRESS_MAP_START( liberatb_map, ADDRESS_SPACE_PROGRAM, 8 )
133	117	AM_RANGE(0x00fe, 0x00fe) AM_READ_PORT("IN0")
134		AM_RANGE(0x0000, 0x0fff) AM_READ(SMH_RAM)
135		AM_RANGE(0x1000, 0x3fff) AM_READ(SMH_ROM) /* Mirror of main rom */
	118	AM_RANGE(0x0000, 0x0fff) AM_RAM
	119	AM_RANGE(0x1000, 0x3fff) AM_ROM /* Mirror of main rom */
136	120	AM_RANGE(0x4000, 0x7fff) AM_READ(deco16_bank_r)
	121	AM_RANGE(0x4000, 0x47ff) AM_WRITE(liberate_videoram_w) AM_BASE(&videoram)
	122	AM_RANGE(0x4800, 0x4fff) AM_WRITEONLY AM_BASE(&spriteram)
	123	AM_RANGE(0x6200, 0x67ff) AM_WRITEONLY AM_BASE(&scratchram)
	124	AM_RANGE(0xf000, 0xf00f) AM_WRITE(deco16_io_w)
137	125	AM_RANGE(0xf000, 0xf000) AM_READ_PORT("IN1")
138	126	AM_RANGE(0xf001, 0xf001) AM_READ_PORT("IN2")
139	127	AM_RANGE(0xf002, 0xf002) AM_READ_PORT("IN3")
140	128	AM_RANGE(0xf003, 0xf003) AM_READ_PORT("DSW1")
141	129	AM_RANGE(0xf004, 0xf004) AM_READ_PORT("DSW2")
142		AM_RANGE(0x8000, 0xffff) AM_READ(SMH_ROM)
	130	AM_RANGE(0x8000, 0xffff) AM_ROM
143	131	ADDRESS_MAP_END
144	132
145		static ADDRESS_MAP_START( liberatb_writemem, ADDRESS_SPACE_PROGRAM, 8 )
146		AM_RANGE(0x0000, 0x0fff) AM_WRITE(SMH_RAM)
147		AM_RANGE(0x1000, 0x3fff) AM_WRITE(SMH_ROM) /* Mirror of main rom */
148		AM_RANGE(0x4000, 0x47ff) AM_WRITE(liberate_videoram_w) AM_BASE(&videoram)
149		AM_RANGE(0x4800, 0x4fff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram)
150		AM_RANGE(0x6200, 0x67ff) AM_WRITE(SMH_RAM) AM_BASE(&scratchram)
151		AM_RANGE(0xf000, 0xf00f) AM_WRITE(deco16_io_w)
152		AM_RANGE(0x8000, 0xffff) AM_WRITE(SMH_ROM)
153		ADDRESS_MAP_END
154
155	133	/*************************************
156	134	*
157	135	*  Sound CPU memory handlers
r4679	r4680
159	137	*************************************/
160	138
161	139	#if 0
162		static ADDRESS_MAP_START( prosoccr_sound_readmem, ADDRESS_SPACE_PROGRAM, 8 )
163		AM_RANGE(0x0000, 0x01ff) AM_READ(SMH_RAM)
164		AM_RANGE(0xa000, 0xa000) AM_READ(soundlatch_r)
165		AM_RANGE(0xe000, 0xffff) AM_READ(SMH_ROM)
166		ADDRESS_MAP_END
167
168		static ADDRESS_MAP_START( prosoccr_sound_writemem, ADDRESS_SPACE_PROGRAM, 8 )
169		AM_RANGE(0x0000, 0x01ff) AM_WRITE(SMH_RAM)
	140	static ADDRESS_MAP_START( prosoccr_sound_map, ADDRESS_SPACE_PROGRAM, 8 )
	141	AM_RANGE(0x0000, 0x01ff) AM_RAM
170	142	AM_RANGE(0x2000, 0x2000) AM_DEVWRITE("ay1", ay8910_data_w)
171	143	AM_RANGE(0x4000, 0x4000) AM_DEVWRITE("ay1", ay8910_address_w)
172	144	AM_RANGE(0x6000, 0x6000) AM_DEVWRITE("ay2", ay8910_data_w)
173		AM_RANGE(0x8000, 0x8000) AM_DeVWRITE(SOUND, "ay2", ay8910_address_w)
174		AM_RANGE(0xe000, 0xffff) AM_WRITE(SMH_ROM)
	145	AM_RANGE(0x8000, 0x8000) AM_DEVWRITE(SOUND, "ay2", ay8910_address_w)
	146	AM_RANGE(0xa000, 0xa000) AM_READ(soundlatch_r)
	147	AM_RANGE(0xe000, 0xffff) AM_ROM
175	148	ADDRESS_MAP_END
176	149	#endif
177	150
178		static ADDRESS_MAP_START( sound_readmem, ADDRESS_SPACE_PROGRAM, 8 )
179		AM_RANGE(0x0000, 0x01ff) AM_READ(SMH_RAM)
180		AM_RANGE(0xb000, 0xb000) AM_READ(soundlatch_r)
181		AM_RANGE(0xc000, 0xffff) AM_READ(SMH_ROM)
182		ADDRESS_MAP_END
183
184		static ADDRESS_MAP_START( sound_writemem, ADDRESS_SPACE_PROGRAM, 8 )
185		AM_RANGE(0x0000, 0x01ff) AM_WRITE(SMH_RAM)
	151	static ADDRESS_MAP_START( liberate_sound_map, ADDRESS_SPACE_PROGRAM, 8 )
	152	AM_RANGE(0x0000, 0x01ff) AM_RAM
186	153	AM_RANGE(0x1000, 0x1000) AM_WRITENOP
187	154	AM_RANGE(0x3000, 0x3000) AM_DEVWRITE("ay1", ay8910_data_w)
188	155	AM_RANGE(0x4000, 0x4000) AM_DEVWRITE("ay1", ay8910_address_w)
189	156	AM_RANGE(0x7000, 0x7000) AM_DEVWRITE("ay2", ay8910_data_w)
190	157	AM_RANGE(0x8000, 0x8000) AM_DEVWRITE("ay2", ay8910_address_w)
191		AM_RANGE(0xc000, 0xffff) AM_WRITE(SMH_ROM)
	158	AM_RANGE(0xb000, 0xb000) AM_READ(soundlatch_r)
	159	AM_RANGE(0xc000, 0xffff) AM_ROM
192	160	ADDRESS_MAP_END
193	161
194	162	/*************************************
r4679	r4680
518	486
519	487	/* basic machine hardware */
520	488	MDRV_CPU_ADD("maincpu",DECO16, 2000000)
521		MDRV_CPU_PROGRAM_MAP(liberate_readmem,liberate_writemem)
	489	MDRV_CPU_PROGRAM_MAP(liberate_map,0)
522	490	MDRV_CPU_IO_MAP(deco16_io_map,0)
523	491	MDRV_CPU_VBLANK_INT("screen", deco16_interrupt)
524	492
525	493	MDRV_CPU_ADD("audiocpu",M6502, 1500000)
526		MDRV_CPU_PROGRAM_MAP(sound_readmem,sound_writemem)
527		MDRV_CPU_VBLANK_INT_HACK(nmi_line_pulse,16)
	494	MDRV_CPU_PROGRAM_MAP(liberate_sound_map,0)
	495	MDRV_CPU_PERIODIC_INT(nmi_line_pulse,16*60) /* ??? */
528	496
529	497	MDRV_QUANTUM_TIME(HZ(12000))
530	498
r4679	r4680
559	527	/* basic machine hardware */
560	528	MDRV_CPU_MODIFY("maincpu")
561	529	MDRV_CPU_TYPE(M6502)
562		MDRV_CPU_PROGRAM_MAP(liberatb_readmem,liberatb_writemem)
	530	MDRV_CPU_PROGRAM_MAP(liberatb_map,0)
563	531	MDRV_CPU_IO_MAP(0,0)
564	532	MDRV_CPU_VBLANK_INT("screen", deco16_interrupt)
565	533	MACHINE_DRIVER_END
r4679	r4680
578	546	/* basic machine hardware */
579	547	MDRV_CPU_MODIFY("maincpu")
580	548	MDRV_CPU_CLOCK(3000000)
581		MDRV_CPU_PROGRAM_MAP(liberate_readmem,liberate_writemem)
	549	MDRV_CPU_PROGRAM_MAP(liberate_map,0)
582	550	MDRV_CPU_IO_MAP(deco16_io_map,0)
583	551
584	552	MDRV_VIDEO_START(prosoccr)
r4679	r4680
589	557
590	558	/* basic machine hardware */
591	559	MDRV_CPU_ADD("maincpu", DECO16, 2000000)
592		MDRV_CPU_PROGRAM_MAP(prosport_readmem,prosport_writemem)
	560	MDRV_CPU_PROGRAM_MAP(prosport_map,0)
593	561	MDRV_CPU_IO_MAP(deco16_io_map,0)
594	562
595	563	MDRV_CPU_ADD("audiocpu", M6502, 1500000)
596		MDRV_CPU_PROGRAM_MAP(sound_readmem,sound_writemem)
597		MDRV_CPU_VBLANK_INT_HACK(nmi_line_pulse,16)
	564	MDRV_CPU_PROGRAM_MAP(liberate_sound_map,0)
	565	MDRV_CPU_PERIODIC_INT(nmi_line_pulse,16*60) /* ??? */
598	566
599	567	MDRV_QUANTUM_TIME(HZ(12000))
600	568
r4679	r4680
771	739	ROM_LOAD( "bp15", 0, 32,  CRC(30d3acce) SHA1(be88d74250edc2920fc0f95cfdd93468ac9c640e) )
772	740	ROM_END
773	741
	742	ROM_START( yellowcj )
	743	ROM_REGION(0x10000, "maincpu", 0)
	744	ROM_LOAD( "bp11.bin", 0xe000, 0x2000, CRC(63cdee83) SHA1(c4a5c3d7761336f4fc3fe83490b69812d70b2cde) )
	745	ROM_RELOAD(            0x2000, 0x2000 )
	746	ROM_LOAD( "bp10.bin", 0xc000, 0x2000, CRC(1024f2f1) SHA1(a3804df3c9ecfde9318ed121327ef095d7a9e1f0) )
	747	ROM_RELOAD(            0x0000, 0x2000 )
	748
	749	ROM_REGION(0x10000, "audiocpu", 0)   /* 64K for CPU 2 */
	750	ROM_LOAD( "bp09", 0x0e000, 0x2000, CRC(16b13676) SHA1(f3cad959cbcde243db3ebc77a3692302a44beb09) )
	751
	752	ROM_REGION(0xc000, "gfx1", ROMREGION_DISPOSE )
	753	ROM_LOAD( "bp03.bin", 0x0000, 0x2000, CRC(6761d767) SHA1(f5180cc31d3b4103c78b74e5de311565581d6db7) )
	754	ROM_LOAD( "bp04.bin", 0x2000, 0x2000, CRC(55517196) SHA1(f46899751e614aa35ec316caacb84e25193a56d6) )
	755	ROM_LOAD( "bp05.rom", 0x4000, 0x2000, CRC(33658fd9) SHA1(16c1d211b8fb46467906cd2cd32bcc9eac464573) )
	756	ROM_LOAD( "bp06.rom", 0x6000, 0x2000, CRC(fbc20f07) SHA1(7f7028638038f61dae6aca09d393adeea3ab1b2d) )
	757	ROM_LOAD( "bp07.rom", 0x8000, 0x2000, CRC(061f9e54) SHA1(2e7b7c98892702513e53b8dd2a2a0dc152d52016) )
	758	ROM_LOAD( "bp08.rom", 0xa000, 0x2000, CRC(2ace626d) SHA1(6f12eb2d6a01ac1285d15d15948124b85c6964b7) )
	759
	760	ROM_REGION(0x8000, "gfx2", ROMREGION_DISPOSE )
	761	ROM_LOAD( "bp01.bin", 0x0000, 0x2000, CRC(8e92a253) SHA1(94063c5aae9ce36b47e51f55e7502d1b6c4334be) )
	762	ROM_LOAD( "bp02.bin", 0x2000, 0x2000, CRC(47ada1bb) SHA1(cc0a38d0cc220382c36e6268f47db332bdbb07a2) )
	763	ROM_LOAD( "bp00.bin", 0x4000, 0x2000, CRC(9ead0da1) SHA1(5e46527fa38d75efd266ca982c7cb6d88bb3ea49) )
	764
	765	ROM_REGION(0x4000, "user1", 0 )
	766	ROM_LOAD( "bp12", 0x00000, 0x4000, CRC(8c8f5d35) SHA1(5b908d92786dae76aaf84de14f8847ee8ee350a1) )
	767
	768	ROM_REGION(32, "proms", 0 )
	769	ROM_LOAD( "bp15", 0, 32,  CRC(30d3acce) SHA1(be88d74250edc2920fc0f95cfdd93468ac9c640e) )
	770	ROM_END
	771
774	772	ROM_START( yellowcb )
775	773	ROM_REGION(0x10000, "maincpu", 0)
776	774	ROM_LOAD( "rom11.rom", 0xc000, 0x2000, CRC(af97d530) SHA1(b8b9bfcb2e9164daa115b91a533418a39c40c31d) )
r4679	r4680
900	898	static void sound_cpu_decrypt(running_machine *machine)
901	899	{
902	900	const address_space *space = cputag_get_address_space(machine, "audiocpu", ADDRESS_SPACE_PROGRAM);
903		UINT8 *decrypted = auto_malloc(0x4000);
	901	UINT8 *decrypted = auto_alloc_array(machine, UINT8, 0x4000);
904	902	UINT8 *rom = memory_region(machine, "audiocpu");
905	903	int i;
906	904
r4679	r4680
927	925	{
928	926	DRIVER_INIT_CALL(prosport);
929	927
930		memory_install_read_port_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xa000, 0xa000, 0, 0, "IN0");
	928	memory_install_read_port_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xa000, 0xa000, 0, 0, "IN0");
931	929	}
932	930
933	931	static DRIVER_INIT( liberate )
934	932	{
935	933	int A;
936	934	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
937		UINT8 *decrypted = auto_malloc(0x10000);
	935	UINT8 *decrypted = auto_alloc_array(machine, UINT8, 0x10000);
938	936	UINT8 *ROM = memory_region(machine, "maincpu");
939	937
940	938	memory_set_decrypted_region(space, 0x0000, 0xffff, decrypted);
r4679	r4680
962	960	GAME( 1983, boomrang, 0,        boomrang,  boomrang, prosport, ROT270, "Data East Corporation", "Boomer Rang'r / Genesis (set 1)", 0 )
963	961	GAME( 1983, boomrana, boomrang, boomrang,  boomrang, prosport, ROT270, "Data East Corporation", "Boomer Rang'r / Genesis (set 2)", 0 )
964	962	GAME( 1984, kamikcab, 0,        boomrang,  kamikcab, prosport, ROT270, "Data East Corporation", "Kamikaze Cabbie", 0 )
	963	GAME( 1984, yellowcj, kamikcab, boomrang,  yellowcb, yellowcb, ROT270, "Data East Corporation", "Yellow Cab (Japan)", 0 )
965	964	GAME( 1984, yellowcb, kamikcab, boomrang,  yellowcb, yellowcb, ROT270, "bootleg",               "Yellow Cab (bootleg)", 0 )
966	965	GAME( 1984, liberate, 0,        liberate,  liberate, liberate, ROT270, "Data East Corporation", "Liberation", 0 )
967	966	GAME( 1984, dualaslt, liberate, liberate,  dualaslt, liberate, ROT270, "Data East USA",         "Dual Assault", 0 )
968	967	GAME( 1984, liberatb, liberate, liberatb,  liberatb, prosport, ROT270, "bootleg",               "Liberation (bootleg)", 0 )
969

src/mame/drivers/spdodgeb.c

r4679	r4680
54	54
55	55	static WRITE8_HANDLER( sound_command_w )
56	56	{
57		soundlatch_w(space,offset,data);
58		cpu_set_input_line(space->machine->cpu[1],M6809_IRQ_LINE,HOLD_LINE);
	57	soundlatch_w(space, offset, data);
	58	cputag_set_input_line(space->machine, "audiocpu", M6809_IRQ_LINE, HOLD_LINE);
59	59	}
60	60
61	61	static WRITE8_HANDLER( spd_adpcm_w )
r4679	r4680
267	267
268	268
269	269
270		static ADDRESS_MAP_START( readmem, ADDRESS_SPACE_PROGRAM, 8 )
271		AM_RANGE(0x0000, 0x0fff) AM_READ(SMH_RAM)
272		AM_RANGE(0x2000, 0x2fff) AM_READ(SMH_RAM)
273		AM_RANGE(0x3000, 0x3000) AM_READ(port_0_r)
274		AM_RANGE(0x3001, 0x3001) AM_READ_PORT("DSW")   /* DIPs */
275		AM_RANGE(0x3801, 0x3805) AM_READ(mcu63701_r)
276		AM_RANGE(0x4000, 0x7fff) AM_READ(SMH_BANK1)
277		AM_RANGE(0x8000, 0xffff) AM_READ(SMH_ROM)
278		ADDRESS_MAP_END
279
280		static ADDRESS_MAP_START( writemem, ADDRESS_SPACE_PROGRAM, 8 )
281		AM_RANGE(0x0000, 0x0fff) AM_WRITE(SMH_RAM)
282		AM_RANGE(0x1000, 0x10ff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
283		AM_RANGE(0x2000, 0x2fff) AM_WRITE(spdodgeb_videoram_w) AM_BASE(&spdodgeb_videoram)
284		//  AM_RANGE(0x3000, 0x3000) AM_WRITE(SMH_RAM)
285		//  AM_RANGE(0x3001, 0x3001) AM_WRITE(SMH_RAM)
	270	static ADDRESS_MAP_START( spdodgeb_map, ADDRESS_SPACE_PROGRAM, 8 )
	271	AM_RANGE(0x0000, 0x0fff) AM_RAM
	272	AM_RANGE(0x1000, 0x10ff) AM_WRITEONLY AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
	273	AM_RANGE(0x2000, 0x2fff) AM_RAM_WRITE(spdodgeb_videoram_w) AM_BASE(&spdodgeb_videoram)
	274	AM_RANGE(0x3000, 0x3000) AM_READ(port_0_r) //AM_WRITENOP
	275	AM_RANGE(0x3001, 0x3001) AM_READ_PORT("DSW") //AM_WRITENOP
286	276	AM_RANGE(0x3002, 0x3002) AM_WRITE(sound_command_w)
287		//  AM_RANGE(0x3003, 0x3003) AM_WRITE(SMH_RAM)
	277	//  AM_RANGE(0x3003, 0x3003) AM_WRITENOP
288	278	AM_RANGE(0x3004, 0x3004) AM_WRITE(spdodgeb_scrollx_lo_w)
289		//  AM_RANGE(0x3005, 0x3005) AM_WRITE(SMH_RAM)          /* mcu63701_output_w */
	279	//  AM_RANGE(0x3005, 0x3005) AM_WRITENOP         /* mcu63701_output_w */
290	280	AM_RANGE(0x3006, 0x3006) AM_WRITE(spdodgeb_ctrl_w)   /* scroll hi, flip screen, bank switch, palette select */
291	281	AM_RANGE(0x3800, 0x3800) AM_WRITE(mcu63701_w)
292		AM_RANGE(0x4000, 0xffff) AM_WRITE(SMH_ROM)
	282	AM_RANGE(0x3801, 0x3805) AM_READ(mcu63701_r)
	283	AM_RANGE(0x4000, 0x7fff) AM_ROMBANK(1)
	284	AM_RANGE(0x8000, 0xffff) AM_ROM
293	285	ADDRESS_MAP_END
294	286
295		static ADDRESS_MAP_START( sound_readmem, ADDRESS_SPACE_PROGRAM, 8 )
296		AM_RANGE(0x0000, 0x0fff) AM_READ(SMH_RAM)
	287	static ADDRESS_MAP_START( spdodgeb_sound_map, ADDRESS_SPACE_PROGRAM, 8 )
	288	AM_RANGE(0x0000, 0x0fff) AM_RAM
297	289	AM_RANGE(0x1000, 0x1000) AM_READ(soundlatch_r)
298		AM_RANGE(0x8000, 0xffff) AM_READ(SMH_ROM)
299		ADDRESS_MAP_END
300
301		static ADDRESS_MAP_START( sound_writemem, ADDRESS_SPACE_PROGRAM, 8 )
302		AM_RANGE(0x0000, 0x0fff) AM_WRITE(SMH_RAM)
303	290	AM_RANGE(0x2800, 0x2801) AM_DEVWRITE("ym", ym3812_w)
304	291	AM_RANGE(0x3800, 0x3807) AM_WRITE(spd_adpcm_w)
305		AM_RANGE(0x8000, 0xffff) AM_WRITE(SMH_ROM)
	292	AM_RANGE(0x8000, 0xffff) AM_ROM
306	293	ADDRESS_MAP_END
307	294
308	295
r4679	r4680
415	402
416	403	static void irq_handler(const device_config *device, int irq)
417	404	{
418		cpu_set_input_line(device->machine->cpu[1],M6809_FIRQ_LINE,irq ? ASSERT_LINE : CLEAR_LINE);
	405	cputag_set_input_line(device->machine, "audiocpu", M6809_FIRQ_LINE, irq ? ASSERT_LINE : CLEAR_LINE);
419	406	}
420	407
421	408	static const ym3812_interface ym3812_config =
r4679	r4680
448	435
449	436	/* basic machine hardware */
450	437	MDRV_CPU_ADD("maincpu", M6502,12000000/6)   /* 2MHz ? */
451		MDRV_CPU_PROGRAM_MAP(readmem,writemem)
	438	MDRV_CPU_PROGRAM_MAP(spdodgeb_map,0)
452	439	MDRV_CPU_VBLANK_INT_HACK(spdodgeb_interrupt,33)   /* 1 IRQ every 8 visible scanlines, plus NMI for vblank */
453	440
454	441	MDRV_CPU_ADD("audiocpu", M6809,12000000/6)   /* 2MHz ? */
455		MDRV_CPU_PROGRAM_MAP(sound_readmem,sound_writemem)
	442	MDRV_CPU_PROGRAM_MAP(spdodgeb_sound_map,0)
456	443
457	444	/* video hardware */
458	445	MDRV_SCREEN_ADD("screen", RASTER)

src/mame/drivers/cvs.c

r4679	r4680
102	102
103	103	/*************************************
104	104	*
105		*  Constants
106		*
107		*************************************/
108
109		#define CVS_MAIN_CPU_INDEX      (0)
110		#define CVS_DAC_CPU_INDEX      (1)
111
112
113
114		/*************************************
115		*
116	105	*  Global variables
117	106	*
118	107	*************************************/
r4679	r4680
265	254
266	255	static void cvs_dac_cpu_interrupt(running_machine *machine)
267	256	{
268		cpu_set_input_line_vector(machine->cpu[CVS_DAC_CPU_INDEX], 0, 0x03);
269		cpu_set_input_line(machine->cpu[CVS_DAC_CPU_INDEX], 0, HOLD_LINE);
	257	cpu_set_input_line_vector(cputag_get_cpu(machine, "audiocpu"), 0, 0x03);
	258	cputag_set_input_line(machine, "audiocpu", 0, HOLD_LINE);
270	259	}
271	260
272	261
r4679	r4680
504	493	MACHINE_START( cvs )
505	494	{
506	495	/* allocate memory */
507		cvs_color_ram = auto_malloc(0x400);
508		cvs_palette_ram = auto_malloc(0x10);
509		cvs_character_ram = auto_malloc(3 * 0x800);  /* only half is used, but
	496	cvs_color_ram = auto_alloc_array(machine, UINT8, 0x400);
	497	cvs_palette_ram = auto_alloc_array(machine, UINT8, 0x10);
	498	cvs_character_ram = auto_alloc_array(machine, UINT8, 3 * 0x800);  /* only half is used, but
510	499	by allocating twice the amount,
511	500	we can use the same gfx_layout */
512	501

src/mame/drivers/turbo.c

r4679	r4680
189	189
190	190	static MACHINE_RESET( buckrog )
191	191	{
192		turbo_state *state = machine->driver_data;
	192	turbo_state *state = (turbo_state *)machine->driver_data;
193	193	state->buckrog_command = 0x00;
194	194	}
195	195
r4679	r4680
212	212	static WRITE8_DEVICE_HANDLER( turbo_ppi0a_w )
213	213	{
214	214	/* bit0-7 = 0PA0-7 */
215		turbo_state *state = device->machine->driver_data;
	215	turbo_state *state = (turbo_state *)device->machine->driver_data;
216	216	state->turbo_opa = data;
217	217	}
218	218
r4679	r4680
220	220	static WRITE8_DEVICE_HANDLER( turbo_ppi0b_w )
221	221	{
222	222	/* bit0-7 = 0PB0-7 */
223		turbo_state *state = device->machine->driver_data;
	223	turbo_state *state = (turbo_state *)device->machine->driver_data;
224	224	state->turbo_opb = data;
225	225	}
226	226
r4679	r4680
228	228	static WRITE8_DEVICE_HANDLER( turbo_ppi0c_w )
229	229	{
230	230	/* bit0-7 = 0PC0-7 */
231		turbo_state *state = device->machine->driver_data;
	231	turbo_state *state = (turbo_state *)device->machine->driver_data;
232	232	state->turbo_opc = data;
233	233	}
234	234
r4679	r4680
236	236	static WRITE8_DEVICE_HANDLER( turbo_ppi1a_w )
237	237	{
238	238	/* bit0-7 = 1PA0-7 */
239		turbo_state *state = device->machine->driver_data;
	239	turbo_state *state = (turbo_state *)device->machine->driver_data;
240	240	state->turbo_ipa = data;
241	241	}
242	242
r4679	r4680
244	244	static WRITE8_DEVICE_HANDLER( turbo_ppi1b_w )
245	245	{
246	246	/* bit0-7 = 1PB0-7 */
247		turbo_state *state = device->machine->driver_data;
	247	turbo_state *state = (turbo_state *)device->machine->driver_data;
248	248	state->turbo_ipb = data;
249	249	}
250	250
r4679	r4680
252	252	static WRITE8_DEVICE_HANDLER( turbo_ppi1c_w )
253	253	{
254	254	/* bit0-7 = 1PC0-7 */
255		turbo_state *state = device->machine->driver_data;
	255	turbo_state *state = (turbo_state *)device->machine->driver_data;
256	256	state->turbo_ipc = data;
257	257	}
258	258
r4679	r4680
262	262	/* bit 0-3 = PLA0-3 */
263	263	/* bit 4-6 = COL0-2 */
264	264	/* bit   7 = n/c */
265		turbo_state *state = device->machine->driver_data;
	265	turbo_state *state = (turbo_state *)device->machine->driver_data;
266	266	state->turbo_fbpla = data & 0x0f;
267	267	state->turbo_fbcol = (data >> 4) & 0x07;
268	268	}
r4679	r4680
322	322	{
323	323	/* bit 0-3 = PLY0-3 */
324	324	/* bit 4-7 = n/c */
325		turbo_state *state = device->machine->driver_data;
	325	turbo_state *state = (turbo_state *)device->machine->driver_data;
326	326	state->subroc3d_ply = data & 0x0f;
327	327	}
328	328
r4679	r4680
330	330	static WRITE8_DEVICE_HANDLER( subroc3d_ppi0c_w )
331	331	{
332	332	/* bit 0-3 = COL0-3 */
333		turbo_state *state = device->machine->driver_data;
	333	turbo_state *state = (turbo_state *)device->machine->driver_data;
334	334	state->subroc3d_col = data & 0x0f;
335	335	}
336	336
r4679	r4680
342	342	/* bit 2 = STLA (START LAMP) */
343	343	/* bit 3 = NOUSE (n/c) */
344	344	/* bit 4 = FLIP (not really flip, just offset) */
345		turbo_state *state = device->machine->driver_data;
	345	turbo_state *state = (turbo_state *)device->machine->driver_data;
346	346	coin_counter_w(0, data & 0x01);
347	347	coin_counter_w(1, data & 0x02);
348	348	set_led_status(0, data & 0x04);
r4679	r4680
381	381	static WRITE8_DEVICE_HANDLER( buckrog_ppi0a_w )
382	382	{
383	383	/* bit 0-7 = data to be read on the /IOREQ */
384		turbo_state *state = device->machine->driver_data;
	384	turbo_state *state = (turbo_state *)device->machine->driver_data;
385	385	state->buckrog_command = data;
386	386	}
387	387
r4679	r4680
390	390	{
391	391	/* bit 0-5 = MOV0-5 */
392	392	/* bit 6-7 = n/c */
393		turbo_state *state = device->machine->driver_data;
	393	turbo_state *state = (turbo_state *)device->machine->driver_data;
394	394	state->buckrog_mov = data & 0x3f;
395	395	}
396	396
r4679	r4680
401	401	/* bit 3-5 = n/c */
402	402	/* bit   6 = /IOREQ on the 2nd CPU */
403	403	/* bit   7 = /INT on the 2nd CPU */
404		turbo_state *state = device->machine->driver_data;
	404	turbo_state *state = (turbo_state *)device->machine->driver_data;
405	405	state->buckrog_fchg = data & 0x07;
406		cpu_set_input_line(device->machine->cpu[1], 0, (data & 0x80) ? CLEAR_LINE : ASSERT_LINE);
	406	cputag_set_input_line(device->machine, "sub", 0, (data & 0x80) ? CLEAR_LINE : ASSERT_LINE);
407	407	}
408	408
409	409
r4679	r4680
415	415	/* bit   5 = COM2 (COIN METER 2) */
416	416	/* bit   6 = STLA (START LAMP) */
417	417	/* bit   7 = NOUSE (BODY SONIC) */
418		turbo_state *state = device->machine->driver_data;
	418	turbo_state *state = (turbo_state *)device->machine->driver_data;
419	419	state->buckrog_obch = data & 0x07;
420	420	coin_counter_w(0, data & 0x10);
421	421	coin_counter_w(1, data & 0x20);
r4679	r4680
479	479
480	480	static READ8_HANDLER( turbo_8279_r )
481	481	{
482		turbo_state *state = space->machine->driver_data;
	482	turbo_state *state = (turbo_state *)space->machine->driver_data;
483	483	i8279_state *chip = &state->i8279;
484	484	UINT8 result = 0xff;
485	485	UINT8 addr;
r4679	r4680
520	520
521	521	static WRITE8_HANDLER( turbo_8279_w )
522	522	{
523		turbo_state *state = space->machine->driver_data;
	523	turbo_state *state = (turbo_state *)space->machine->driver_data;
524	524	i8279_state *chip = &state->i8279;
525	525	UINT8 addr;
526	526
r4679	r4680
624	624
625	625	static READ8_HANDLER( turbo_collision_r )
626	626	{
627		turbo_state *state = space->machine->driver_data;
	627	turbo_state *state = (turbo_state *)space->machine->driver_data;
628	628	video_screen_update_partial(space->machine->primary_screen, video_screen_get_vpos(space->machine->primary_screen));
629	629	return input_port_read(space->machine, "DSW3") | (state->turbo_collision & 15);
630	630	}
r4679	r4680
632	632
633	633	static WRITE8_HANDLER( turbo_collision_clear_w )
634	634	{
635		turbo_state *state = space->machine->driver_data;
	635	turbo_state *state = (turbo_state *)space->machine->driver_data;
636	636	video_screen_update_partial(space->machine->primary_screen, video_screen_get_vpos(space->machine->primary_screen));
637	637	state->turbo_collision = 0;
638	638	}
r4679	r4680
640	640
641	641	static READ8_DEVICE_HANDLER( turbo_analog_r )
642	642	{
643		turbo_state *state = device->machine->driver_data;
	643	turbo_state *state = (turbo_state *)device->machine->driver_data;
644	644	return input_port_read(device->machine, "DIAL") - state->turbo_last_analog;
645	645	}
646	646
647	647
648	648	static WRITE8_HANDLER( turbo_analog_reset_w )
649	649	{
650		turbo_state *state = space->machine->driver_data;
	650	turbo_state *state = (turbo_state *)space->machine->driver_data;
651	651	state->turbo_last_analog = input_port_read(space->machine, "DIAL");
652	652	}
653	653
r4679	r4680
679	679	static READ8_HANDLER( buckrog_cpu2_command_r )
680	680	{
681	681	/* assert ACK */
682		turbo_state *state = space->machine->driver_data;
	682	turbo_state *state = (turbo_state *)space->machine->driver_data;
683	683	ppi8255_set_port_c(devtag_get_device(space->machine, "ppi8255_0"), 0x00);
684	684	return state->buckrog_command;
685	685	}

src/mame/drivers/seta.c

r4679	r4680
1330	1330	UINT16 max = uPD71054.max[no]&0xffff;
1331	1331
1332	1332	if( max != 0 ) {
1333		attotime period = attotime_mul(ATTOTIME_IN_HZ(cpu_get_clock(machine->cpu[0])), 16 * max);
	1333	attotime period = attotime_mul(ATTOTIME_IN_HZ(cputag_get_clock(machine, "maincpu")), 16 * max);
1334	1334	timer_adjust_oneshot( uPD71054.timer[no], period, no );
1335	1335	} else {
1336	1336	timer_adjust_oneshot( uPD71054.timer[no], attotime_never, no);
r4679	r4680
1346	1346	------------------------------*/
1347	1347	static TIMER_CALLBACK( uPD71054_timer_callback )
1348	1348	{
1349		cpu_set_input_line(machine->cpu[0], 4, HOLD_LINE );
	1349	cputag_set_input_line(machine, "maincpu", 4, HOLD_LINE );
1350	1350	uPD71054_update_timer( machine, NULL, param );
1351	1351	}
1352	1352
r4679	r4680
1429	1429
1430	1430	static void utoukond_ym3438_interrupt(const device_config *device, int linestate)
1431	1431	{
1432		cpu_set_input_line(device->machine->cpu[1], INPUT_LINE_NMI, linestate);
	1432	cputag_set_input_line(device->machine, "audiocpu", INPUT_LINE_NMI, linestate);
1433	1433	}
1434	1434
1435	1435	static const ym3438_interface utoukond_ym3438_intf =
r4679	r4680
1445	1445
1446	1446	***************************************************************************/
1447	1447
1448		/*
1449	1448
1450		Mirror RAM
1451
1452		*/
1453		static UINT16 *mirror_ram;
1454
1455		static READ16_HANDLER( mirror_ram_r )
1456		{
1457		return mirror_ram[offset];
1458		}
1459
1460		static WRITE16_HANDLER( mirror_ram_w )
1461		{
1462		COMBINE_DATA(&mirror_ram[offset]);
1463		//  logerror("PC %06X - Mirror RAM Written: %04X <- %04X\n", cpu_get_pc(space->cpu), offset*2, data);
1464		}
1465
1466
1467
1468	1449	/*
1469	1450
1470	1451	Shared RAM:
r4679	r4680
1501	1482	case 0/2:   // bit 0: reset sub cpu?
1502	1483	if (ACCESSING_BITS_0_7)
1503	1484	{
1504		if ( !(old_data&1) && (data&1) )
1505		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_RESET, PULSE_LINE);
	1485	if ( !(old_data & 1) && (data & 1) )
	1486	cputag_set_input_line(space->machine, "sub", INPUT_LINE_RESET, PULSE_LINE);
1506	1487	old_data = data;
1507	1488	}
1508	1489	break;
r4679	r4680
1588	1569	writing to sharedram! */
1589	1570
1590	1571
1591		static ADDRESS_MAP_START( tndrcade_readmem, ADDRESS_SPACE_PROGRAM, 16 )
1592		AM_RANGE(0x000000, 0x07ffff) AM_READ(SMH_ROM            )   // ROM
1593		AM_RANGE(0x380000, 0x3803ff) AM_READ(SMH_RAM            )   // Palette
1594		/**/AM_RANGE(0x400000, 0x400001) AM_READ(SMH_RAM            )   // ? $4000
1595		/**/AM_RANGE(0x600000, 0x600607) AM_READ(SMH_RAM            )   // Sprites Y
1596		AM_RANGE(0xa00000, 0xa00fff) AM_READ(sharedram_68000_r      )   // Shared RAM
1597		AM_RANGE(0xc00000, 0xc03fff) AM_READ(SMH_RAM            )   // Sprites Code + X + Attr
1598		AM_RANGE(0xe00000, 0xe03fff) AM_READ(SMH_RAM            )   // RAM (Mirrored?)
1599		AM_RANGE(0xffc000, 0xffffff) AM_READ(mirror_ram_r         )   // RAM (Mirrored?)
	1572	static ADDRESS_MAP_START( tndrcade_map, ADDRESS_SPACE_PROGRAM, 16 )
	1573	AM_RANGE(0x000000, 0x07ffff) AM_ROM                        // ROM
	1574	AM_RANGE(0x200000, 0x200001) AM_WRITENOP                  // ? 0
	1575	AM_RANGE(0x280000, 0x280001) AM_WRITENOP                  // ? 0 / 1 (sub cpu related?)
	1576	AM_RANGE(0x300000, 0x300001) AM_WRITENOP                  // ? 0 / 1
	1577	AM_RANGE(0x380000, 0x3803ff) AM_RAM AM_BASE(&paletteram16) AM_SIZE(&seta_paletteram_size) // Palette
	1578	/**/AM_RANGE(0x400000, 0x400001) AM_WRITENOP                  // ? $4000
	1579	/**/AM_RANGE(0x600000, 0x600607) AM_RAM   AM_BASE(&spriteram16)      // Sprites Y
	1580	AM_RANGE(0x800000, 0x800007) AM_WRITE(sub_ctrl_w)            // Sub CPU Control?
	1581	AM_RANGE(0xa00000, 0xa00fff) AM_READWRITE(sharedram_68000_r,sharedram_68000_w)   // Shared RAM
	1582	AM_RANGE(0xc00000, 0xc03fff) AM_RAM   AM_BASE(&spriteram16_2)      // Sprites Code + X + Attr
	1583	AM_RANGE(0xe00000, 0xe03fff) AM_RAM AM_SHARE(1)               // RAM (Mirrored?)
	1584	AM_RANGE(0xffc000, 0xffffff) AM_RAM AM_SHARE(1)               // RAM (Mirrored?)
1600	1585	ADDRESS_MAP_END
1601	1586
1602		static ADDRESS_MAP_START( tndrcade_writemem, ADDRESS_SPACE_PROGRAM, 16 )
1603		AM_RANGE(0x000000, 0x07ffff) AM_WRITE(SMH_ROM                  )   // ROM
1604		AM_RANGE(0x200000, 0x200001) AM_WRITE(SMH_NOP                  )   // ? 0
1605		AM_RANGE(0x280000, 0x280001) AM_WRITE(SMH_NOP                  )   // ? 0 / 1 (sub cpu related?)
1606		AM_RANGE(0x300000, 0x300001) AM_WRITE(SMH_NOP                  )   // ? 0 / 1
1607		AM_RANGE(0x380000, 0x3803ff) AM_WRITE(SMH_RAM) AM_BASE(&paletteram16   ) AM_SIZE(&seta_paletteram_size)   // Palette
1608		AM_RANGE(0x400000, 0x400001) AM_WRITE(SMH_RAM                  )   // ? $4000
1609		AM_RANGE(0x600000, 0x600607) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16      )   // Sprites Y
1610		AM_RANGE(0x800000, 0x800007) AM_WRITE(sub_ctrl_w               )   // Sub CPU Control?
1611		AM_RANGE(0xa00000, 0xa00fff) AM_WRITE(sharedram_68000_w            )   // Shared RAM
1612		AM_RANGE(0xc00000, 0xc03fff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16_2      )   // Sprites Code + X + Attr
1613		AM_RANGE(0xe00000, 0xe03fff) AM_WRITE(SMH_RAM) AM_BASE(&mirror_ram      )   // RAM (Mirrored?)
1614		AM_RANGE(0xffc000, 0xffffff) AM_WRITE(mirror_ram_w               )   // RAM (Mirrored?)
1615		ADDRESS_MAP_END
1616	1587
1617
1618	1588	/***************************************************************************
1619	1589	Twin Eagle, DownTown, Arbalester, Meta Fox
1620	1590	(with slight variations, and Meta Fox protection hooked in)
1621	1591	***************************************************************************/
1622	1592
1623		static ADDRESS_MAP_START( downtown_readmem, ADDRESS_SPACE_PROGRAM, 16 )
1624		AM_RANGE(0x000000, 0x09ffff) AM_READ(SMH_ROM            )   // ROM
1625		AM_RANGE(0x100000, 0x103fff) AM_DEVREAD("x1", seta_sound_word_r      )   // Sound
1626		AM_RANGE(0x200000, 0x200001) AM_READ(SMH_NOP            )   // watchdog? (twineagl)
1627		AM_RANGE(0x600000, 0x600003) AM_READ(seta_dsw_r            )   // DSW
1628		AM_RANGE(0x700000, 0x7003ff) AM_READ(SMH_RAM            )   // Palette
1629		AM_RANGE(0x900000, 0x901fff) AM_READ(SMH_RAM            )   // VRAM
1630		AM_RANGE(0x902000, 0x903fff) AM_READ(SMH_RAM            )   // VRAM
1631		AM_RANGE(0xb00000, 0xb00fff) AM_READ(sharedram_68000_r      )   // Shared RAM
1632		AM_RANGE(0xd00000, 0xd003ff) AM_READ(SMH_RAM            )   // Sprites Y
1633		AM_RANGE(0xe00000, 0xe03fff) AM_READ(SMH_RAM            )   // Sprites Code + X + Attr
1634		AM_RANGE(0xf00000, 0xffffff) AM_READ(SMH_RAM            )   // RAM
	1593	static ADDRESS_MAP_START( downtown_map, ADDRESS_SPACE_PROGRAM, 16 )
	1594	AM_RANGE(0x000000, 0x09ffff) AM_ROM                        // ROM
	1595	AM_RANGE(0x100000, 0x103fff) AM_DEVREADWRITE("x1", seta_sound_word_r,seta_sound_word_w)   // Sound
	1596	AM_RANGE(0x200000, 0x200001) AM_NOP                        // watchdog? (twineagl)
	1597	AM_RANGE(0x300000, 0x300001) AM_WRITENOP                  // IRQ enable/acknowledge?
	1598	AM_RANGE(0x400000, 0x400007) AM_WRITE(twineagl_tilebank_w)      // special tile banking to animate water in twineagl
	1599	AM_RANGE(0x500000, 0x500001) AM_WRITENOP                  // ?
	1600	AM_RANGE(0x600000, 0x600003) AM_READ(seta_dsw_r)            // DSW
	1601	AM_RANGE(0x700000, 0x7003ff) AM_RAM AM_BASE(&paletteram16) AM_SIZE(&seta_paletteram_size)   // Palette
	1602	AM_RANGE(0x800000, 0x800005) AM_WRITEONLY AM_BASE(&seta_vctrl_0)// VRAM Ctrl
	1603	AM_RANGE(0x900000, 0x903fff) AM_RAM_WRITE(seta_vram_0_w) AM_BASE(&seta_vram_0)   // VRAM
	1604	AM_RANGE(0xa00000, 0xa00007) AM_WRITE(sub_ctrl_w)            // Sub CPU Control?
	1605	AM_RANGE(0xb00000, 0xb00fff) AM_READWRITE(sharedram_68000_r,sharedram_68000_w)   // Shared RAM
	1606	AM_RANGE(0xc00000, 0xc00001) AM_WRITENOP                  // ? $4000
	1607	AM_RANGE(0xd00000, 0xd00607) AM_RAM AM_BASE(&spriteram16)      // Sprites Y
	1608	AM_RANGE(0xe00000, 0xe03fff) AM_RAM AM_BASE(&spriteram16_2)      // Sprites Code + X + Attr
	1609	AM_RANGE(0xf00000, 0xffffff) AM_RAM                        // RAM
1635	1610	ADDRESS_MAP_END
1636	1611
1637		static ADDRESS_MAP_START( downtown_writemem, ADDRESS_SPACE_PROGRAM, 16 )
1638		AM_RANGE(0x000000, 0x09ffff) AM_WRITE(SMH_ROM                  )   // ROM
1639		AM_RANGE(0x100000, 0x103fff) AM_DEVWRITE("x1", seta_sound_word_w            )   // Sound
1640		AM_RANGE(0x200000, 0x200001) AM_WRITE(SMH_NOP                  )   // watchdog?
1641		AM_RANGE(0x300000, 0x300001) AM_WRITE(SMH_NOP                  )   // IRQ enable/acknowledge?
1642		AM_RANGE(0x400000, 0x400007) AM_WRITE(twineagl_tilebank_w         )   // special tile banking to animate water in twineagl
1643		AM_RANGE(0x500000, 0x500001) AM_WRITE(SMH_NOP                  )   // ?
1644		AM_RANGE(0x700000, 0x7003ff) AM_WRITE(SMH_RAM) AM_BASE(&paletteram16   ) AM_SIZE(&seta_paletteram_size)   // Palette
1645		AM_RANGE(0x800000, 0x800005) AM_WRITE(SMH_RAM) AM_BASE(&seta_vctrl_0      )   // VRAM Ctrl
1646		AM_RANGE(0x900000, 0x903fff) AM_WRITE(seta_vram_0_w) AM_BASE(&seta_vram_0   )   // VRAM
1647		AM_RANGE(0xa00000, 0xa00007) AM_WRITE(sub_ctrl_w               )   // Sub CPU Control?
1648		AM_RANGE(0xb00000, 0xb00fff) AM_WRITE(sharedram_68000_w            )   // Shared RAM
1649		AM_RANGE(0xc00000, 0xc00001) AM_WRITE(SMH_RAM                  )   // ? $4000
1650		AM_RANGE(0xd00000, 0xd00607) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16      )   // Sprites Y
1651		AM_RANGE(0xe00000, 0xe03fff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16_2      )   // Sprites Code + X + Attr
1652		AM_RANGE(0xf00000, 0xffffff) AM_WRITE(SMH_RAM                  )   // RAM
1653		ADDRESS_MAP_END
1654	1612
1655
1656	1613	/***************************************************************************
1657	1614	Caliber 50
1658	1615	***************************************************************************/
r4679	r4680
1684	1641	{
1685	1642	if (ACCESSING_BITS_0_7)
1686	1643	{
1687		soundlatch_word_w(space,0,data,mem_mask);
1688		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_NMI, PULSE_LINE);
	1644	soundlatch_word_w(space, 0, data, mem_mask);
	1645	cputag_set_input_line(space->machine, "sub", INPUT_LINE_NMI, PULSE_LINE);
1689	1646	cpu_spinuntil_time(space->cpu, ATTOTIME_IN_USEC(50));   // Allow the other cpu to reply
1690	1647	}
1691	1648	}
1692	1649
1693		static ADDRESS_MAP_START( calibr50_readmem, ADDRESS_SPACE_PROGRAM, 16 )
1694		AM_RANGE(0x000000, 0x09ffff) AM_READ(SMH_ROM            )   // ROM
1695		AM_RANGE(0xff0000, 0xffffff) AM_READ(SMH_RAM            )   // RAM
1696		AM_RANGE(0x100000, 0x100007) AM_READ(SMH_NOP            )   // ? (same as a00010-a00017?)
1697		AM_RANGE(0x200000, 0x200fff) AM_READ(SMH_RAM            )   // NVRAM
1698		AM_RANGE(0x300000, 0x300001) AM_READ(SMH_NOP            )   // ? (value's read but not used)
1699		AM_RANGE(0x400000, 0x400001) AM_READ(watchdog_reset16_r      )   // Watchdog
1700		AM_RANGE(0x600000, 0x600003) AM_READ(seta_dsw_r            )   // DSW
1701		AM_RANGE(0x700000, 0x7003ff) AM_READ(SMH_RAM            )   // Palette
1702		AM_RANGE(0x900000, 0x901fff) AM_READ(SMH_RAM            )   // VRAM
1703		AM_RANGE(0x902000, 0x903fff) AM_READ(SMH_RAM            )   // VRAM
1704		AM_RANGE(0x904000, 0x904fff) AM_READ(SMH_RAM            )   //
1705		AM_RANGE(0xa00000, 0xa00019) AM_READ(calibr50_ip_r         )   // Input Ports
1706		/**/AM_RANGE(0xd00000, 0xd00607) AM_READ(SMH_RAM            )   // Sprites Y
1707		AM_RANGE(0xe00000, 0xe03fff) AM_READ(SMH_RAM            )   // Sprites Code + X + Attr
1708		AM_RANGE(0xb00000, 0xb00001) AM_READ(soundlatch2_word_r      )   // From Sub CPU
1709		/**/AM_RANGE(0xc00000, 0xc00001) AM_READ(SMH_RAM            )   // ? $4000
1710		ADDRESS_MAP_END
	1650	static ADDRESS_MAP_START( calibr50_map, ADDRESS_SPACE_PROGRAM, 16 )
	1651	AM_RANGE(0x000000, 0x09ffff) AM_ROM                        // ROM
	1652	AM_RANGE(0xff0000, 0xffffff) AM_RAM                        // RAM
	1653	AM_RANGE(0x100000, 0x100007) AM_READNOP                     // ? (same as a00010-a00017?)
	1654	AM_RANGE(0x200000, 0x200fff) AM_RAM                        // NVRAM
	1655	AM_RANGE(0x300000, 0x300001) AM_READNOP                     // ? (value's read but not used)
	1656	AM_RANGE(0x300000, 0x300001) AM_WRITENOP                  // ? (random value)
	1657	AM_RANGE(0x400000, 0x400001) AM_READ(watchdog_reset16_r)      // Watchdog
	1658	AM_RANGE(0x500000, 0x500001) AM_WRITENOP                  // ?
	1659	AM_RANGE(0x600000, 0x600003) AM_READ(seta_dsw_r)            // DSW
	1660	AM_RANGE(0x700000, 0x7003ff) AM_RAM AM_BASE(&paletteram16) AM_SIZE(&seta_paletteram_size)   // Palette
	1661	AM_RANGE(0x800000, 0x800005) AM_WRITEONLY AM_BASE(&seta_vctrl_0)// VRAM Ctrl
	1662	AM_RANGE(0x900000, 0x903fff) AM_RAM_WRITE(seta_vram_0_w) AM_BASE(&seta_vram_0)   // VRAM
1711	1663
1712		static ADDRESS_MAP_START( calibr50_writemem, ADDRESS_SPACE_PROGRAM, 16 )
1713		AM_RANGE(0x000000, 0x09ffff) AM_WRITE(SMH_ROM                  )   // ROM
1714		AM_RANGE(0xff0000, 0xffffff) AM_WRITE(SMH_RAM                  )   // RAM
1715		AM_RANGE(0x200000, 0x200fff) AM_WRITE(SMH_RAM                  )   // NVRAM
1716		AM_RANGE(0x300000, 0x300001) AM_WRITE(SMH_NOP                  )   // ? (random value)
1717		AM_RANGE(0x500000, 0x500001) AM_WRITE(SMH_NOP                  )   // ?
1718		AM_RANGE(0x700000, 0x7003ff) AM_WRITE(SMH_RAM) AM_BASE(&paletteram16   ) AM_SIZE(&seta_paletteram_size)   // Palette
1719		AM_RANGE(0x800000, 0x800005) AM_WRITE(SMH_RAM) AM_BASE(&seta_vctrl_0      )   // VRAM Ctrl
1720		AM_RANGE(0x900000, 0x903fff) AM_WRITE(seta_vram_0_w) AM_BASE(&seta_vram_0   )   // VRAM
1721		AM_RANGE(0x904000, 0x904fff) AM_WRITE(SMH_RAM                  )   //
1722		AM_RANGE(0xd00000, 0xd00607) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16      )   // Sprites Y
1723		AM_RANGE(0xe00000, 0xe03fff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16_2      )   // Sprites Code + X + Attr
1724		AM_RANGE(0xb00000, 0xb00001) AM_WRITE(calibr50_soundlatch_w         )   // To Sub CPU
1725		AM_RANGE(0xc00000, 0xc00001) AM_WRITE(SMH_RAM                  )   // ? $4000
	1664	AM_RANGE(0x904000, 0x904fff) AM_RAM                        //
	1665	AM_RANGE(0xa00000, 0xa00019) AM_READ(calibr50_ip_r)            // Input Ports
	1666	/**/AM_RANGE(0xd00000, 0xd00607) AM_RAM AM_BASE(&spriteram16)      // Sprites Y
	1667	AM_RANGE(0xe00000, 0xe03fff) AM_RAM   AM_BASE(&spriteram16_2)      // Sprites Code + X + Attr
	1668	AM_RANGE(0xb00000, 0xb00001) AM_READWRITE(soundlatch2_word_r,calibr50_soundlatch_w)   // From Sub CPU
	1669	/**/AM_RANGE(0xc00000, 0xc00001) AM_RAM                        // ? $4000
1726	1670	ADDRESS_MAP_END
1727	1671
1728	1672
r4679	r4680
1782	1726	}
1783	1727
1784	1728
1785		static ADDRESS_MAP_START( usclssic_readmem, ADDRESS_SPACE_PROGRAM, 16 )
1786		AM_RANGE(0x000000, 0x07ffff) AM_READ(SMH_ROM               )   // ROM
1787		AM_RANGE(0xff0000, 0xffffff) AM_READ(SMH_RAM               )   // RAM
1788		AM_RANGE(0x800000, 0x800607) AM_READ(SMH_RAM               )   // Sprites Y
1789		/**/AM_RANGE(0x900000, 0x900001) AM_READ(SMH_RAM               )   // ?
1790		AM_RANGE(0xa00000, 0xa00005) AM_READ(SMH_RAM               )   // VRAM Ctrl
1791		/**/AM_RANGE(0xb00000, 0xb003ff) AM_READ(SMH_RAM               )   // Palette
1792		AM_RANGE(0xb40000, 0xb40003) AM_READ(usclssic_trackball_x_r      )   // TrackBall X
1793		AM_RANGE(0xb40004, 0xb40007) AM_READ(usclssic_trackball_y_r      )   // TrackBall Y + Buttons
	1729	static ADDRESS_MAP_START( usclssic_map, ADDRESS_SPACE_PROGRAM, 16 )
	1730	AM_RANGE(0x000000, 0x07ffff) AM_ROM                           // ROM
	1731	AM_RANGE(0xff0000, 0xffffff) AM_RAM                           // RAM
	1732	AM_RANGE(0x800000, 0x800607) AM_RAM    AM_BASE(&spriteram16)         // Sprites Y
	1733	/**/AM_RANGE(0x900000, 0x900001) AM_RAM                           // ? $4000
	1734	AM_RANGE(0xa00000, 0xa00005) AM_RAM AM_BASE(&seta_vctrl_0)         // VRAM Ctrl
	1735	/**/AM_RANGE(0xb00000, 0xb003ff) AM_RAM AM_BASE(&paletteram16) AM_SIZE(&seta_paletteram_size)   // Palette
	1736	AM_RANGE(0xb40000, 0xb40003) AM_READ(usclssic_trackball_x_r)      // TrackBall X
	1737	AM_RANGE(0xb40000, 0xb40001) AM_WRITE(usclssic_lockout_w)         // Coin Lockout + Tiles Banking
	1738	AM_RANGE(0xb40004, 0xb40007) AM_READ(usclssic_trackball_y_r)      // TrackBall Y + Buttons
	1739	AM_RANGE(0xb4000a, 0xb4000b) AM_WRITENOP                     // ? (value's not important. In lev2&6)
1794	1740	AM_RANGE(0xb40010, 0xb40011) AM_READ_PORT("COINS")               // Coins
1795		AM_RANGE(0xb40018, 0xb4001f) AM_READ(usclssic_dsw_r            )   // 2 DSWs
1796		AM_RANGE(0xb80000, 0xb80001) AM_READ(SMH_NOP               )   // watchdog (value is discarded)?
1797		AM_RANGE(0xc00000, 0xc03fff) AM_READ(SMH_RAM               )   // Sprites Code + X + Attr
1798		AM_RANGE(0xd00000, 0xd01fff) AM_READ(SMH_RAM               )   // VRAM
1799		AM_RANGE(0xd02000, 0xd03fff) AM_READ(SMH_RAM               )   // VRAM
1800		AM_RANGE(0xd04000, 0xd04fff) AM_READ(SMH_RAM               )   //
1801		AM_RANGE(0xe00000, 0xe00fff) AM_READ(SMH_RAM               )   // NVRAM? (odd bytes)
	1741	AM_RANGE(0xb40010, 0xb40011) AM_WRITE(calibr50_soundlatch_w)      // To Sub CPU
	1742	AM_RANGE(0xb40018, 0xb4001f) AM_READ(usclssic_dsw_r)            // 2 DSWs
	1743	AM_RANGE(0xb40018, 0xb40019) AM_WRITE(watchdog_reset16_w)         // Watchdog
	1744	AM_RANGE(0xb80000, 0xb80001) AM_READNOP                        // Watchdog (value is discarded)?
	1745	AM_RANGE(0xc00000, 0xc03fff) AM_RAM AM_BASE(&spriteram16_2)         // Sprites Code + X + Attr
	1746	AM_RANGE(0xd00000, 0xd03fff) AM_RAM_WRITE(seta_vram_0_w) AM_BASE(&seta_vram_0)   // VRAM
	1747	AM_RANGE(0xd04000, 0xd04fff) AM_RAM                           //
	1748	AM_RANGE(0xe00000, 0xe00fff) AM_RAM                           // NVRAM? (odd bytes)
1802	1749	ADDRESS_MAP_END
1803	1750
1804		static ADDRESS_MAP_START( usclssic_writemem, ADDRESS_SPACE_PROGRAM, 16 )
1805		AM_RANGE(0x000000, 0x07ffff) AM_WRITE(SMH_ROM                  )   // ROM
1806		AM_RANGE(0xff0000, 0xffffff) AM_WRITE(SMH_RAM                  )   // RAM
1807		AM_RANGE(0x800000, 0x800607) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16      )   // Sprites Y
1808		AM_RANGE(0x900000, 0x900001) AM_WRITE(SMH_RAM                  )   // ? $4000
1809		AM_RANGE(0xa00000, 0xa00005) AM_WRITE(SMH_RAM) AM_BASE(&seta_vctrl_0      )   // VRAM Ctrl
1810		AM_RANGE(0xb00000, 0xb003ff) AM_WRITE(SMH_RAM) AM_BASE(&paletteram16   ) AM_SIZE(&seta_paletteram_size)   // Palette
1811		AM_RANGE(0xb40000, 0xb40001) AM_WRITE(usclssic_lockout_w         )   // Coin Lockout + Tiles Banking
1812		AM_RANGE(0xb40010, 0xb40011) AM_WRITE(calibr50_soundlatch_w         )   // To Sub CPU
1813		AM_RANGE(0xb40018, 0xb40019) AM_WRITE(watchdog_reset16_w         )   // Watchdog
1814		AM_RANGE(0xb4000a, 0xb4000b) AM_WRITE(SMH_NOP                  )   // ? (value's not important. In lev2&6)
1815		AM_RANGE(0xc00000, 0xc03fff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16_2   )   // Sprites Code + X + Attr
1816		AM_RANGE(0xd00000, 0xd03fff) AM_WRITE(seta_vram_0_w) AM_BASE(&seta_vram_0   )   // VRAM
1817		AM_RANGE(0xd04000, 0xd04fff) AM_WRITE(SMH_RAM                  )   //
1818		AM_RANGE(0xe00000, 0xe00fff) AM_WRITE(SMH_RAM                  )   // NVRAM? (odd bytes)
1819		ADDRESS_MAP_END
1820	1751
1821
1822
1823	1752	/***************************************************************************
1824	1753	Athena no Hatena?
1825	1754	***************************************************************************/
1826	1755
1827		static ADDRESS_MAP_START( atehate_readmem, ADDRESS_SPACE_PROGRAM, 16 )
1828		AM_RANGE(0x000000, 0x0fffff) AM_READ(SMH_ROM            )   // ROM
1829		AM_RANGE(0x900000, 0x9fffff) AM_READ(SMH_RAM            )   // RAM
1830		AM_RANGE(0x100000, 0x103fff) AM_DEVREAD("x1", seta_sound_word_r      )   // Sound
1831		AM_RANGE(0x600000, 0x600003) AM_READ(seta_dsw_r            )   // DSW
1832		AM_RANGE(0x700000, 0x7003ff) AM_READ(SMH_RAM            )   // Palette
1833		AM_RANGE(0xa00000, 0xa00607) AM_READ(SMH_RAM            )   // Sprites Y
	1756	static ADDRESS_MAP_START( atehate_map, ADDRESS_SPACE_PROGRAM, 16 )
	1757	AM_RANGE(0x000000, 0x0fffff) AM_ROM                        // ROM
	1758	AM_RANGE(0x900000, 0x9fffff) AM_RAM                        // RAM
	1759	AM_RANGE(0x100000, 0x103fff) AM_DEVREADWRITE("x1", seta_sound_word_r,seta_sound_word_w)   // Sound
	1760	AM_RANGE(0x200000, 0x200001) AM_WRITENOP                  // ? watchdog ?
	1761	AM_RANGE(0x300000, 0x300001) AM_WRITENOP                  // ? 0 (irq ack lev 2?)
	1762	AM_RANGE(0x500000, 0x500001) AM_WRITENOP                  // ? (end of lev 1: bit 4 goes 1,0,1)
	1763	AM_RANGE(0x600000, 0x600003) AM_READ(seta_dsw_r)            // DSW
	1764	AM_RANGE(0x700000, 0x7003ff) AM_RAM AM_BASE(&paletteram16) AM_SIZE(&seta_paletteram_size)   // Palette
	1765	AM_RANGE(0xa00000, 0xa00607) AM_RAM   AM_BASE(&spriteram16)      // Sprites Y
1834	1766	AM_RANGE(0xb00000, 0xb00001) AM_READ_PORT("P1")               // P1
1835	1767	AM_RANGE(0xb00002, 0xb00003) AM_READ_PORT("P2")               // P2
1836	1768	AM_RANGE(0xb00004, 0xb00005) AM_READ_PORT("COINS")            // Coins
1837		/**/AM_RANGE(0xc00000, 0xc00001) AM_READ(SMH_RAM            )   // ? 0x4000
1838		AM_RANGE(0xe00000, 0xe03fff) AM_READ(SMH_RAM            )   // Sprites Code + X + Attr
	1769	/**/AM_RANGE(0xc00000, 0xc00001) AM_RAM                        // ? 0x4000
	1770	AM_RANGE(0xe00000, 0xe03fff) AM_RAM   AM_BASE(&spriteram16_2)      // Sprites Code + X + Attr
1839	1771	ADDRESS_MAP_END
1840	1772
1841		static ADDRESS_MAP_START( atehate_writemem, ADDRESS_SPACE_PROGRAM, 16 )
1842		AM_RANGE(0x000000, 0x0fffff) AM_WRITE(SMH_ROM               )   // ROM
1843		AM_RANGE(0x900000, 0x9fffff) AM_WRITE(SMH_RAM               )   // RAM
1844		AM_RANGE(0x100000, 0x103fff) AM_DEVWRITE("x1", seta_sound_word_w         )   // Sound
1845		AM_RANGE(0x200000, 0x200001) AM_WRITE(SMH_NOP               )   // ? watchdog ?
1846		AM_RANGE(0x300000, 0x300001) AM_WRITE(SMH_NOP               )   // ? 0 (irq ack lev 2?)
1847		AM_RANGE(0x500000, 0x500001) AM_WRITE(SMH_NOP               )   // ? (end of lev 1: bit 4 goes 1,0,1)
1848		AM_RANGE(0x700000, 0x7003ff) AM_WRITE(SMH_RAM) AM_BASE(&paletteram16   ) AM_SIZE(&seta_paletteram_size)   // Palette
1849		AM_RANGE(0xa00000, 0xa00607) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16   )   // Sprites Y
1850		AM_RANGE(0xc00000, 0xc00001) AM_WRITE(SMH_RAM               )   // ? 0x4000
1851		AM_RANGE(0xe00000, 0xe03fff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16_2   )   // Sprites Code + X + Attr
1852		ADDRESS_MAP_END
1853	1773
1854	1774	/***************************************************************************
1855	1775	Blandia
1856	1776	***************************************************************************/
1857	1777
1858		static ADDRESS_MAP_START( blandia_readmem, ADDRESS_SPACE_PROGRAM, 16 )
1859		AM_RANGE(0x000000, 0x1fffff) AM_READ(SMH_ROM            )   // ROM (up to 2MB)
1860		AM_RANGE(0x200000, 0x20ffff) AM_READ(SMH_RAM            )   // RAM (main ram for zingzip, wrofaero writes to 20f000-20ffff)
1861		AM_RANGE(0x210000, 0x21ffff) AM_READ(SMH_RAM            )   // RAM (gundhara)
1862		AM_RANGE(0x300000, 0x30ffff) AM_READ(SMH_RAM            )   // RAM (wrofaero only?)
1863		AM_RANGE(0x500000, 0x500005) AM_READ(SMH_RAM            )   // (gundhara)
	1778	static ADDRESS_MAP_START( blandia_map, ADDRESS_SPACE_PROGRAM, 16 )
	1779	AM_RANGE(0x000000, 0x1fffff) AM_ROM                        // ROM (up to 2MB)
	1780	AM_RANGE(0x200000, 0x20ffff) AM_RAM                        // RAM (main ram for zingzip, wrofaero writes to 20f000-20ffff)
	1781	AM_RANGE(0x210000, 0x21ffff) AM_RAM                        // RAM (gundhara)
	1782	AM_RANGE(0x300000, 0x30ffff) AM_RAM                        // RAM (wrofaero only?)
1864	1783	AM_RANGE(0x400000, 0x400001) AM_READ_PORT("P1")               // P1
1865	1784	AM_RANGE(0x400002, 0x400003) AM_READ_PORT("P2")               // P2
1866	1785	AM_RANGE(0x400004, 0x400005) AM_READ_PORT("COINS")            // Coins
1867		AM_RANGE(0x600000, 0x600003) AM_READ(seta_dsw_r            )   // DSW
1868		AM_RANGE(0x700000, 0x7003ff) AM_READ(SMH_RAM            )   // (rezon,jjsquawk)
1869		AM_RANGE(0x700400, 0x700fff) AM_READ(SMH_RAM            )   // Palette
1870		AM_RANGE(0x701000, 0x70ffff) AM_READ(SMH_RAM            )   //
1871		/**/AM_RANGE(0x800000, 0x800607) AM_READ(SMH_RAM            )   // Sprites Y
1872		AM_RANGE(0x880000, 0x880001) AM_READ(SMH_RAM            )   // ? 0xc000
1873		AM_RANGE(0x900000, 0x903fff) AM_READ(SMH_RAM            )   // Sprites Code + X + Attr
1874		/**/AM_RANGE(0xa00000, 0xa00005) AM_READ(SMH_RAM            )   // VRAM 0&1 Ctrl
1875		/**/AM_RANGE(0xa80000, 0xa80005) AM_READ(SMH_RAM            )   // VRAM 2&3 Ctrl
1876		AM_RANGE(0xb00000, 0xb03fff) AM_READ(SMH_RAM            )   // VRAM 0&1
1877		AM_RANGE(0xb04000, 0xb0ffff) AM_READ(SMH_RAM            )   // (jjsquawk)
1878		AM_RANGE(0xb80000, 0xb83fff) AM_READ(SMH_RAM            )   // VRAM 2&3
1879		AM_RANGE(0xb84000, 0xb8ffff) AM_READ(SMH_RAM            )   // (jjsquawk)
1880		AM_RANGE(0xc00000, 0xc03fff) AM_DEVREAD("x1", seta_sound_word_r      )   // Sound
	1786	AM_RANGE(0x500000, 0x500005) AM_RAM_WRITE(seta_vregs_w) AM_BASE(&seta_vregs)   // (gundhara) Coin Lockout + Video Registers
	1787	AM_RANGE(0x600000, 0x600003) AM_READ(seta_dsw_r)            // DSW
	1788	AM_RANGE(0x700000, 0x7003ff) AM_RAM                        // (rezon,jjsquawk)
	1789	AM_RANGE(0x700400, 0x700fff) AM_RAM AM_BASE(&paletteram16) AM_SIZE(&seta_paletteram_size)   // Palette
	1790	AM_RANGE(0x701000, 0x70ffff) AM_RAM                        //
	1791	/**/AM_RANGE(0x800000, 0x800607) AM_RAM AM_BASE(&spriteram16)      // Sprites Y
	1792	AM_RANGE(0x880000, 0x880001) AM_RAM                        // ? 0xc000
	1793	AM_RANGE(0x900000, 0x903fff) AM_RAM AM_BASE(&spriteram16_2)      // Sprites Code + X + Attr
	1794	/**/AM_RANGE(0xa00000, 0xa00005) AM_RAM AM_BASE(&seta_vctrl_0)      // VRAM 0&1 Ctrl
	1795	/**/AM_RANGE(0xa80000, 0xa80005) AM_RAM AM_BASE(&seta_vctrl_2)      // VRAM 2&3 Ctrl
	1796	AM_RANGE(0xb00000, 0xb03fff) AM_RAM_WRITE(seta_vram_0_w) AM_BASE(&seta_vram_0)   // VRAM 0&1
	1797	AM_RANGE(0xb04000, 0xb0ffff) AM_RAM                        // (jjsquawk)
	1798	AM_RANGE(0xb80000, 0xb83fff) AM_RAM_WRITE(seta_vram_2_w) AM_BASE(&seta_vram_2)   // VRAM 2&3
	1799	AM_RANGE(0xb84000, 0xb8ffff) AM_RAM                        // (jjsquawk)
	1800	AM_RANGE(0xc00000, 0xc03fff) AM_DEVREADWRITE("x1", seta_sound_word_r,seta_sound_word_w)   // Sound
	1801	AM_RANGE(0xd00000, 0xd00007) AM_WRITENOP                  // ?
	1802	AM_RANGE(0xe00000, 0xe00001) AM_WRITENOP                  // ? VBlank IRQ Ack
	1803	AM_RANGE(0xf00000, 0xf00001) AM_WRITENOP                  // ? Sound  IRQ Ack
1881	1804	ADDRESS_MAP_END
1882	1805
1883		static ADDRESS_MAP_START( blandia_writemem, ADDRESS_SPACE_PROGRAM, 16 )
1884		AM_RANGE(0x000000, 0x1fffff) AM_WRITE(SMH_ROM                  )   // ROM (up to 2MB)
1885		AM_RANGE(0x200000, 0x20ffff) AM_WRITE(SMH_RAM                  )   // RAM
1886		AM_RANGE(0x210000, 0x21ffff) AM_WRITE(SMH_RAM                  )   // RAM (gundhara)
1887		AM_RANGE(0x300000, 0x30ffff) AM_WRITE(SMH_RAM                  )   // RAM (wrofaero only?)
1888		AM_RANGE(0x500000, 0x500005) AM_WRITE(seta_vregs_w) AM_BASE(&seta_vregs      )   // Coin Lockout + Video Registers
1889		AM_RANGE(0x700000, 0x7003ff) AM_WRITE(SMH_RAM                  )   // (rezon,jjsquawk)
1890		AM_RANGE(0x700400, 0x700fff) AM_WRITE(SMH_RAM) AM_BASE(&paletteram16   ) AM_SIZE(&seta_paletteram_size)   // Palette
1891		AM_RANGE(0x701000, 0x70ffff) AM_WRITE(SMH_RAM                  )   //
1892		AM_RANGE(0x800000, 0x800607) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16      )   // Sprites Y
1893		AM_RANGE(0x880000, 0x880001) AM_WRITE(SMH_RAM                  )   // ? 0xc000
1894		AM_RANGE(0x900000, 0x903fff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16_2      )   // Sprites Code + X + Attr
1895		AM_RANGE(0xa00000, 0xa00005) AM_WRITE(SMH_RAM) AM_BASE(&seta_vctrl_0      )   // VRAM 0&1 Ctrl
1896		AM_RANGE(0xa80000, 0xa80005) AM_WRITE(SMH_RAM) AM_BASE(&seta_vctrl_2      )   // VRAM 2&3 Ctrl
1897		AM_RANGE(0xb00000, 0xb03fff) AM_WRITE(seta_vram_0_w) AM_BASE(&seta_vram_0   )   // VRAM 0
1898		AM_RANGE(0xb04000, 0xb0ffff) AM_WRITE(SMH_RAM                  )   // (jjsquawk)
1899		AM_RANGE(0xb80000, 0xb83fff) AM_WRITE(seta_vram_2_w) AM_BASE(&seta_vram_2   )   // VRAM 2
1900		AM_RANGE(0xb84000, 0xb8ffff) AM_WRITE(SMH_RAM                  )   // (jjsquawk)
1901		AM_RANGE(0xc00000, 0xc03fff) AM_DEVWRITE("x1", seta_sound_word_w            )   // Sound
1902		AM_RANGE(0xd00000, 0xd00007) AM_WRITE(SMH_NOP                  )   // ?
1903		AM_RANGE(0xe00000, 0xe00001) AM_WRITE(SMH_NOP                  )   // ? VBlank IRQ Ack
1904		AM_RANGE(0xf00000, 0xf00001) AM_WRITE(SMH_NOP                  )   // ? Sound  IRQ Ack
1905		ADDRESS_MAP_END
1906	1806
1907
1908	1807	/***************************************************************************
1909	1808	Blandia (proto), Gundhara, J.J.Squawkers, Rezon, War of Aero, Zing Zing Zip
1910	1809	(with slight variations)
1911	1810	***************************************************************************/
1912	1811
1913		static ADDRESS_MAP_START( blandiap_readmem, ADDRESS_SPACE_PROGRAM, 16 )
1914		AM_RANGE(0x000000, 0x1fffff) AM_READ(SMH_ROM            )   // ROM (up to 2MB)
1915		AM_RANGE(0x200000, 0x20ffff) AM_READ(SMH_RAM            )   // RAM (main ram for zingzip, wrofaero writes to 20f000-20ffff)
1916		AM_RANGE(0x210000, 0x21ffff) AM_READ(SMH_RAM            )   // RAM (gundhara)
1917		AM_RANGE(0x300000, 0x30ffff) AM_READ(SMH_RAM            )   // RAM (wrofaero only?)
1918		AM_RANGE(0x500000, 0x500005) AM_READ(SMH_RAM            )   // (gundhara)
	1812	static ADDRESS_MAP_START( blandiap_map, ADDRESS_SPACE_PROGRAM, 16 )
	1813	AM_RANGE(0x000000, 0x1fffff) AM_ROM                        // ROM (up to 2MB)
	1814	AM_RANGE(0x200000, 0x20ffff) AM_RAM                        // RAM (main ram for zingzip, wrofaero writes to 20f000-20ffff)
	1815	AM_RANGE(0x210000, 0x21ffff) AM_RAM                        // RAM (gundhara)
	1816	AM_RANGE(0x300000, 0x30ffff) AM_RAM                        // RAM (wrofaero only?)
1919	1817	AM_RANGE(0x400000, 0x400001) AM_READ_PORT("P1")               // P1
1920	1818	AM_RANGE(0x400002, 0x400003) AM_READ_PORT("P2")               // P2
1921	1819	AM_RANGE(0x400004, 0x400005) AM_READ_PORT("COINS")            // Coins
1922		AM_RANGE(0x600000, 0x600003) AM_READ(seta_dsw_r            )   // DSW
1923		AM_RANGE(0x700000, 0x7003ff) AM_READ(SMH_RAM            )   // (rezon,jjsquawk)
1924		AM_RANGE(0x700400, 0x700fff) AM_READ(SMH_RAM            )   // Palette
1925		AM_RANGE(0x701000, 0x70ffff) AM_READ(SMH_RAM            )   //
1926		AM_RANGE(0x800000, 0x803fff) AM_READ(SMH_RAM            )   // VRAM 0&1
1927		AM_RANGE(0x804000, 0x80ffff) AM_READ(SMH_RAM            )   // (jjsquawk)
1928		AM_RANGE(0x880000, 0x883fff) AM_READ(SMH_RAM            )   // VRAM 2&3
1929		AM_RANGE(0x884000, 0x88ffff) AM_READ(SMH_RAM            )   // (jjsquawk)
1930		/**/AM_RANGE(0x900000, 0x900005) AM_READ(SMH_RAM            )   // VRAM 0&1 Ctrl
1931		/**/AM_RANGE(0x980000, 0x980005) AM_READ(SMH_RAM            )   // VRAM 2&3 Ctrl
1932		/**/AM_RANGE(0xa00000, 0xa00607) AM_READ(SMH_RAM            )   // Sprites Y
1933		/**/AM_RANGE(0xa80000, 0xa80001) AM_READ(SMH_RAM            )   // ? 0x4000
1934		AM_RANGE(0xb00000, 0xb03fff) AM_READ(SMH_RAM            )   // Sprites Code + X + Attr
1935		AM_RANGE(0xc00000, 0xc03fff) AM_DEVREAD("x1", seta_sound_word_r      )   // Sound
	1820	AM_RANGE(0x500000, 0x500005) AM_RAM_WRITE(seta_vregs_w) AM_BASE(&seta_vregs) // (gundhara) Coin Lockout + Video Registers
	1821	AM_RANGE(0x600000, 0x600003) AM_READ(seta_dsw_r)            // DSW
	1822	AM_RANGE(0x700000, 0x7003ff) AM_RAM                        // (rezon,jjsquawk)
	1823	AM_RANGE(0x700400, 0x700fff) AM_RAM AM_BASE(&paletteram16) AM_SIZE(&seta_paletteram_size)   // Palette
	1824	AM_RANGE(0x701000, 0x70ffff) AM_RAM                        //
	1825	AM_RANGE(0x800000, 0x803fff) AM_RAM_WRITE(seta_vram_0_w) AM_BASE(&seta_vram_0)   // VRAM 0&1
	1826	AM_RANGE(0x804000, 0x80ffff) AM_RAM                        // (jjsquawk)
	1827	AM_RANGE(0x880000, 0x883fff) AM_RAM_WRITE(seta_vram_2_w) AM_BASE(&seta_vram_2)   // VRAM 2&3
	1828	AM_RANGE(0x884000, 0x88ffff) AM_RAM                        // (jjsquawk)
	1829	/**/AM_RANGE(0x900000, 0x900005) AM_RAM AM_BASE(&seta_vctrl_0)      // VRAM 0&1 Ctrl
	1830	/**/AM_RANGE(0x980000, 0x980005) AM_RAM AM_BASE(&seta_vctrl_2)      // VRAM 2&3 Ctrl
	1831	/**/AM_RANGE(0xa00000, 0xa00607) AM_RAM AM_BASE(&spriteram16)      // Sprites Y
	1832	/**/AM_RANGE(0xa80000, 0xa80001) AM_RAM                        // ? 0x4000
	1833	AM_RANGE(0xb00000, 0xb03fff) AM_RAM AM_BASE(&spriteram16_2)      // Sprites Code + X + Attr
	1834	AM_RANGE(0xc00000, 0xc03fff) AM_DEVREADWRITE("x1", seta_sound_word_r,seta_sound_word_w)   // Sound
	1835	AM_RANGE(0xd00000, 0xd00007) AM_WRITENOP                  // ?
	1836	AM_RANGE(0xe00000, 0xe00001) AM_WRITENOP                  // ? VBlank IRQ Ack
	1837	AM_RANGE(0xf00000, 0xf00001) AM_WRITENOP                  // ? Sound  IRQ Ack
1936	1838	ADDRESS_MAP_END
1937	1839
1938		static ADDRESS_MAP_START( blandiap_writemem, ADDRESS_SPACE_PROGRAM, 16 )
1939		AM_RANGE(0x000000, 0x1fffff) AM_WRITE(SMH_ROM                  )   // ROM (up to 2MB)
1940		AM_RANGE(0x200000, 0x20ffff) AM_WRITE(SMH_RAM                  )   // RAM
1941		AM_RANGE(0x210000, 0x21ffff) AM_WRITE(SMH_RAM                  )   // RAM (gundhara)
1942		AM_RANGE(0x300000, 0x30ffff) AM_WRITE(SMH_RAM                  )   // RAM (wrofaero only?)
1943		AM_RANGE(0x500000, 0x500005) AM_WRITE(seta_vregs_w) AM_BASE(&seta_vregs      )   // Coin Lockout + Video Registers
1944		AM_RANGE(0x700000, 0x7003ff) AM_WRITE(SMH_RAM                  )   // (rezon,jjsquawk)
1945		AM_RANGE(0x700400, 0x700fff) AM_WRITE(SMH_RAM) AM_BASE(&paletteram16   ) AM_SIZE(&seta_paletteram_size)   // Palette
1946		AM_RANGE(0x701000, 0x70ffff) AM_WRITE(SMH_RAM                  )   //
1947		AM_RANGE(0x800000, 0x803fff) AM_WRITE(seta_vram_0_w) AM_BASE(&seta_vram_0   )   // VRAM 0
1948		AM_RANGE(0x804000, 0x80ffff) AM_WRITE(SMH_RAM                  )   // (jjsquawk)
1949		AM_RANGE(0x880000, 0x883fff) AM_WRITE(seta_vram_2_w) AM_BASE(&seta_vram_2   )   // VRAM 2
1950		AM_RANGE(0x884000, 0x88ffff) AM_WRITE(SMH_RAM                  )   // (jjsquawk)
1951		AM_RANGE(0x900000, 0x900005) AM_WRITE(SMH_RAM) AM_BASE(&seta_vctrl_0      )   // VRAM 0&1 Ctrl
1952		AM_RANGE(0x980000, 0x980005) AM_WRITE(SMH_RAM) AM_BASE(&seta_vctrl_2      )   // VRAM 2&3 Ctrl
1953		AM_RANGE(0xa00000, 0xa00607) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16      )   // Sprites Y
1954		AM_RANGE(0xa80000, 0xa80001) AM_WRITE(SMH_RAM                  )   // ? 0x4000
1955		AM_RANGE(0xb00000, 0xb03fff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16_2      )   // Sprites Code + X + Attr
1956		AM_RANGE(0xc00000, 0xc03fff) AM_DEVWRITE("x1", seta_sound_word_w            )   // Sound
1957		AM_RANGE(0xd00000, 0xd00007) AM_WRITE(SMH_NOP                  )   // ?
1958		AM_RANGE(0xe00000, 0xe00001) AM_WRITE(SMH_NOP                  )   // ? VBlank IRQ Ack
1959		AM_RANGE(0xf00000, 0xf00001) AM_WRITE(SMH_NOP                  )   // ? Sound  IRQ Ack
1960		ADDRESS_MAP_END
1961	1840
1962
1963	1841	/***************************************************************************
1964	1842	Blandia, Gundhara, J.J.Squawkers, Rezon, War of Aero, Zing Zing Zip
1965	1843	and Zombie Raid (with slight variations)
r4679	r4680
2008	1886	old_clock = data & 1;
2009	1887	}
2010	1888
2011		static ADDRESS_MAP_START( wrofaero_readmem, ADDRESS_SPACE_PROGRAM, 16 )
2012		AM_RANGE(0x000000, 0x1fffff) AM_READ(SMH_ROM            )   // ROM (up to 2MB)
2013		AM_RANGE(0x200000, 0x20ffff) AM_READ(SMH_RAM            )   // RAM (main ram for zingzip, wrofaero writes to 20f000-20ffff)
2014		AM_RANGE(0x210000, 0x21ffff) AM_READ(SMH_RAM            )   // RAM (gundhara)
2015		AM_RANGE(0x300000, 0x30ffff) AM_READ(SMH_RAM            )   // RAM (wrofaero only?)
2016		AM_RANGE(0x500000, 0x500005) AM_READ(SMH_RAM            )   // (gundhara)
	1889	static ADDRESS_MAP_START( wrofaero_map, ADDRESS_SPACE_PROGRAM, 16 )
	1890	AM_RANGE(0x000000, 0x1fffff) AM_ROM                        // ROM (up to 2MB)
	1891	AM_RANGE(0x200000, 0x20ffff) AM_RAM AM_BASE(&seta_workram)      // RAM (pointer for zombraid crosshair hack)
	1892	AM_RANGE(0x210000, 0x21ffff) AM_RAM                        // RAM (gundhara)
	1893	AM_RANGE(0x300000, 0x30ffff) AM_RAM                        // RAM (wrofaero only?)
2017	1894	AM_RANGE(0x400000, 0x400001) AM_READ_PORT("P1")               // P1
2018	1895	AM_RANGE(0x400002, 0x400003) AM_READ_PORT("P2")               // P2
2019	1896	AM_RANGE(0x400004, 0x400005) AM_READ_PORT("COINS")            // Coins
2020		AM_RANGE(0x600000, 0x600003) AM_READ(seta_dsw_r            )   // DSW
2021		AM_RANGE(0x700000, 0x7003ff) AM_READ(SMH_RAM            )   // (rezon,jjsquawk)
2022		AM_RANGE(0x700400, 0x700fff) AM_READ(SMH_RAM            )   // Palette
2023		AM_RANGE(0x701000, 0x70ffff) AM_READ(SMH_RAM            )   //
2024		AM_RANGE(0x800000, 0x803fff) AM_READ(SMH_RAM            )   // VRAM 0&1
2025		AM_RANGE(0x804000, 0x80ffff) AM_READ(SMH_RAM            )   // (jjsquawk)
2026		AM_RANGE(0x880000, 0x883fff) AM_READ(SMH_RAM            )   // VRAM 2&3
2027		AM_RANGE(0x884000, 0x88ffff) AM_READ(SMH_RAM            )   // (jjsquawk)
2028		/**/AM_RANGE(0x900000, 0x900005) AM_READ(SMH_RAM            )   // VRAM 0&1 Ctrl
2029		/**/AM_RANGE(0x980000, 0x980005) AM_READ(SMH_RAM            )   // VRAM 2&3 Ctrl
2030		/**/AM_RANGE(0xa00000, 0xa00607) AM_READ(SMH_RAM            )   // Sprites Y
2031		/**/AM_RANGE(0xa80000, 0xa80001) AM_READ(SMH_RAM            )   // ? 0x4000
2032		AM_RANGE(0xb00000, 0xb03fff) AM_READ(SMH_RAM            )   // Sprites Code + X + Attr
2033		AM_RANGE(0xc00000, 0xc03fff) AM_DEVREAD("x1", seta_sound_word_r      )   // Sound
2034		ADDRESS_MAP_END
	1897	AM_RANGE(0x500000, 0x500005) AM_RAM_WRITE(seta_vregs_w) AM_BASE(&seta_vregs)   // (gundhara) Coin Lockout + Video Registers
2035	1898
2036		static ADDRESS_MAP_START( wrofaero_writemem, ADDRESS_SPACE_PROGRAM, 16 )
2037		AM_RANGE(0x000000, 0x1fffff) AM_WRITE(SMH_ROM                  )   // ROM (up to 2MB)
2038		AM_RANGE(0x200000, 0x20ffff) AM_WRITE(SMH_RAM) AM_BASE(&seta_workram      )   // RAM (pointer for zombraid crosshair hack)
2039		AM_RANGE(0x210000, 0x21ffff) AM_WRITE(SMH_RAM                  )   // RAM (gundhara)
2040		AM_RANGE(0x300000, 0x30ffff) AM_WRITE(SMH_RAM                  )   // RAM (wrofaero only?)
2041		AM_RANGE(0x500000, 0x500005) AM_WRITE(seta_vregs_w) AM_BASE(&seta_vregs      )   // Coin Lockout + Video Registers
2042		AM_RANGE(0x700000, 0x7003ff) AM_WRITE(SMH_RAM                  )   // (rezon,jjsquawk)
2043		AM_RANGE(0x700400, 0x700fff) AM_WRITE(SMH_RAM) AM_BASE(&paletteram16   ) AM_SIZE(&seta_paletteram_size)   // Palette
2044		AM_RANGE(0x701000, 0x70ffff) AM_WRITE(SMH_RAM                  )   //
2045		AM_RANGE(0x800000, 0x803fff) AM_WRITE(seta_vram_0_w) AM_BASE(&seta_vram_0   )   // VRAM 0
2046		AM_RANGE(0x804000, 0x80ffff) AM_WRITE(SMH_RAM                  )   // (jjsquawk)
2047		AM_RANGE(0x880000, 0x883fff) AM_WRITE(seta_vram_2_w) AM_BASE(&seta_vram_2   )   // VRAM 2
2048		AM_RANGE(0x884000, 0x88ffff) AM_WRITE(SMH_RAM                  )   // (jjsquawk)
2049		AM_RANGE(0x900000, 0x900005) AM_WRITE(SMH_RAM) AM_BASE(&seta_vctrl_0      )   // VRAM 0&1 Ctrl
2050		AM_RANGE(0x980000, 0x980005) AM_WRITE(SMH_RAM) AM_BASE(&seta_vctrl_2      )   // VRAM 2&3 Ctrl
2051		AM_RANGE(0xa00000, 0xa00607) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16      )   // Sprites Y
2052		AM_RANGE(0xa80000, 0xa80001) AM_WRITE(SMH_RAM                  )   // ? 0x4000
2053		AM_RANGE(0xb00000, 0xb03fff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16_2      )   // Sprites Code + X + Attr
2054		AM_RANGE(0xc00000, 0xc03fff) AM_DEVWRITE("x1", seta_sound_word_w            )   // Sound
	1899	AM_RANGE(0x600000, 0x600003) AM_READ(seta_dsw_r)            // DSW
	1900	AM_RANGE(0x700000, 0x7003ff) AM_RAM                        // (rezon,jjsquawk)
	1901	AM_RANGE(0x700400, 0x700fff) AM_RAM AM_BASE(&paletteram16) AM_SIZE(&seta_paletteram_size)   // Palette
	1902	AM_RANGE(0x701000, 0x70ffff) AM_RAM                        //
	1903	AM_RANGE(0x800000, 0x803fff) AM_RAM_WRITE(seta_vram_0_w) AM_BASE(&seta_vram_0)   // VRAM 0&1
	1904	AM_RANGE(0x804000, 0x80ffff) AM_RAM                        // (jjsquawk)
	1905	AM_RANGE(0x880000, 0x883fff) AM_RAM_WRITE(seta_vram_2_w) AM_BASE(&seta_vram_2)   // VRAM 2&3
	1906	AM_RANGE(0x884000, 0x88ffff) AM_RAM                        // (jjsquawk)
	1907	/**/AM_RANGE(0x900000, 0x900005) AM_RAM AM_BASE(&seta_vctrl_0)      // VRAM 0&1 Ctrl
	1908	/**/AM_RANGE(0x980000, 0x980005) AM_RAM AM_BASE(&seta_vctrl_2)      // VRAM 2&3 Ctrl
	1909	/**/AM_RANGE(0xa00000, 0xa00607) AM_RAM AM_BASE(&spriteram16)      // Sprites Y
	1910	/**/AM_RANGE(0xa80000, 0xa80001) AM_RAM                        // ? 0x4000
	1911	AM_RANGE(0xb00000, 0xb03fff) AM_RAM   AM_BASE(&spriteram16_2)      // Sprites Code + X + Attr
	1912	AM_RANGE(0xc00000, 0xc03fff) AM_DEVREADWRITE("x1", seta_sound_word_r,seta_sound_word_w)   // Sound
2055	1913	#if __uPD71054_TIMER
2056		AM_RANGE(0xd00000, 0xd00007) AM_WRITE(timer_regs_w               )   // ?
	1914	AM_RANGE(0xd00000, 0xd00007) AM_WRITE(timer_regs_w)            // ?
2057	1915	#else
2058		AM_RANGE(0xd00000, 0xd00007) AM_WRITE(SMH_NOP                  )   // ?
	1916	AM_RANGE(0xd00000, 0xd00007) AM_WRITENOP                  // ?
2059	1917	#endif
2060		AM_RANGE(0xe00000, 0xe00001) AM_WRITE(SMH_NOP                  )   // ? VBlank IRQ Ack
2061		AM_RANGE(0xf00000, 0xf00001) AM_WRITE(SMH_NOP                  )   // ? Sound  IRQ Ack
	1918	AM_RANGE(0xe00000, 0xe00001) AM_WRITENOP                  // ? VBlank IRQ Ack
	1919	AM_RANGE(0xf00000, 0xf00001) AM_WRITENOP                  // ? Sound  IRQ Ack
2062	1920	ADDRESS_MAP_END
2063	1921
2064		static ADDRESS_MAP_START( jjsquawb_writemem, ADDRESS_SPACE_PROGRAM, 16 )
2065		AM_RANGE(0x000000, 0x1fffff) AM_WRITE(SMH_ROM                  )   // ROM (up to 2MB)
2066		AM_RANGE(0x200000, 0x20ffff) AM_WRITE(SMH_RAM) AM_BASE(&seta_workram      )   // RAM (pointer for zombraid crosshair hack)
2067		AM_RANGE(0x210000, 0x21ffff) AM_WRITE(SMH_RAM                  )   // RAM (gundhara)
2068		AM_RANGE(0x300000, 0x30ffff) AM_WRITE(SMH_RAM                  )   // RAM (wrofaero only?)
2069		AM_RANGE(0x500000, 0x500005) AM_WRITE(seta_vregs_w) AM_BASE(&seta_vregs      )   // Coin Lockout + Video Registers
2070		AM_RANGE(0x700000, 0x70b3ff) AM_WRITE(SMH_RAM                  )   // RZ: (rezon,jjsquawk)
2071		AM_RANGE(0x70b400, 0x70bfff) AM_WRITE(SMH_RAM) AM_BASE(&paletteram16   ) AM_SIZE(&seta_paletteram_size)   // Palette
2072		AM_RANGE(0x70c000, 0x70ffff) AM_WRITE(SMH_RAM                  )   //
2073		AM_RANGE(0x800000, 0x803fff) AM_WRITE(seta_vram_0_w) AM_BASE(&seta_vram_0   )   // VRAM 0
2074		AM_RANGE(0x804000, 0x807fff) AM_WRITE(seta_vram_2_w) AM_BASE(&seta_vram_2   )   // VRAM 2
2075		AM_RANGE(0x884000, 0x88ffff) AM_WRITE(SMH_RAM                  )   // (jjsquawk)
2076		AM_RANGE(0x908000, 0x908005) AM_WRITE(SMH_RAM) AM_BASE(&seta_vctrl_0      )   // VRAM 0&1 Ctrl
2077		AM_RANGE(0x909000, 0x909005) AM_WRITE(SMH_RAM) AM_BASE(&seta_vctrl_2      )   // VRAM 2&3 Ctrl
2078		AM_RANGE(0xa0a000, 0xa0a607) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16      )   // RZ: Sprites Y
2079		AM_RANGE(0xa80000, 0xa80001) AM_WRITE(SMH_RAM                  )   // ? 0x4000
2080		AM_RANGE(0xb0c000, 0xb0ffff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16_2      )   // RZ: Sprites Code + X + Attr
2081		AM_RANGE(0xc00000, 0xc03fff) AM_DEVWRITE("x1", seta_sound_word_w            )   // Sound
	1922	static ADDRESS_MAP_START( jjsquawb_map, ADDRESS_SPACE_PROGRAM, 16 )
	1923	AM_RANGE(0x000000, 0x1fffff) AM_ROM                        // ROM (up to 2MB)
	1924	AM_RANGE(0x200000, 0x20ffff) AM_RAM AM_BASE(&seta_workram)      // RAM (pointer for zombraid crosshair hack)
	1925	AM_RANGE(0x210000, 0x21ffff) AM_RAM                        // RAM (gundhara)
	1926	AM_RANGE(0x300000, 0x30ffff) AM_RAM                        // RAM (wrofaero only?)
	1927	AM_RANGE(0x400000, 0x400001) AM_READ_PORT("P1")               // P1
	1928	AM_RANGE(0x400002, 0x400003) AM_READ_PORT("P2")               // P2
	1929	AM_RANGE(0x400004, 0x400005) AM_READ_PORT("COINS")            // Coins
	1930	AM_RANGE(0x500000, 0x500005) AM_RAM_WRITE(seta_vregs_w) AM_BASE(&seta_vregs)   // (gundhara) Coin Lockout + Video Registers
	1931
	1932	AM_RANGE(0x600000, 0x600003) AM_READ(seta_dsw_r)            // DSW
	1933	AM_RANGE(0x700000, 0x70b3ff) AM_RAM                        // RZ: (rezon,jjsquawk)
	1934	AM_RANGE(0x70b400, 0x70bfff) AM_RAM AM_BASE(&paletteram16   ) AM_SIZE(&seta_paletteram_size)   // Palette
	1935	AM_RANGE(0x70c000, 0x70ffff) AM_RAM                        //
	1936	AM_RANGE(0x800000, 0x803fff) AM_RAM_WRITE(seta_vram_0_w) AM_BASE(&seta_vram_0)   // VRAM 0
	1937	AM_RANGE(0x804000, 0x807fff) AM_RAM_WRITE(seta_vram_2_w) AM_BASE(&seta_vram_2)   // VRAM 2
	1938	AM_RANGE(0x884000, 0x88ffff) AM_RAM                        // (jjsquawk)
	1939	/**/AM_RANGE(0x900000, 0x900005) AM_RAM AM_BASE(&seta_vctrl_0)      // VRAM 0&1 Ctrl
	1940	/**/AM_RANGE(0x980000, 0x980005) AM_RAM AM_BASE(&seta_vctrl_2)      // VRAM 2&3 Ctrl
	1941	/**/AM_RANGE(0xa0a000, 0xa0a607) AM_RAM AM_BASE(&spriteram16)      // RZ: Sprites Y
	1942	/**/AM_RANGE(0xa80000, 0xa80001) AM_RAM                        // ? 0x4000
	1943	AM_RANGE(0xb0c000, 0xb0ffff) AM_RAM AM_BASE(&spriteram16_2)      // RZ: Sprites Code + X + Attr
	1944	AM_RANGE(0xc00000, 0xc03fff) AM_DEVREADWRITE("x1", seta_sound_word_r,seta_sound_word_w)   // Sound
2082	1945	#if __uPD71054_TIMER
2083		AM_RANGE(0xd00000, 0xd00007) AM_WRITE(timer_regs_w               )   // ?
	1946	AM_RANGE(0xd00000, 0xd00007) AM_WRITE(timer_regs_w)            // ?
2084	1947	#else
2085		AM_RANGE(0xd00000, 0xd00007) AM_WRITE(SMH_NOP                  )   // ?
	1948	AM_RANGE(0xd00000, 0xd00007) AM_WRITENOP                  // ?
2086	1949	#endif
2087		AM_RANGE(0xe00000, 0xe00001) AM_WRITE(SMH_NOP                  )   // ? VBlank IRQ Ack
2088		AM_RANGE(0xf00000, 0xf00001) AM_WRITE(SMH_NOP                  )   // ? Sound  IRQ Ack
	1950	AM_RANGE(0xe00000, 0xe00001) AM_WRITENOP                  // ? VBlank IRQ Ack
	1951	AM_RANGE(0xf00000, 0xf00001) AM_WRITENOP                  // ? Sound  IRQ Ack
2089	1952	ADDRESS_MAP_END
2090	1953
2091	1954	/***************************************************************************
2092		orbs
	1955	Orbs
2093	1956	***************************************************************************/
2094	1957
2095		static ADDRESS_MAP_START( orbs_readmem, ADDRESS_SPACE_PROGRAM, 16 )
2096		AM_RANGE(0x000000, 0x07ffff) AM_READ(SMH_ROM            )   // ROM
2097		AM_RANGE(0xf00000, 0xf0ffff) AM_READ(SMH_RAM            )   // RAM
2098		AM_RANGE(0x100000, 0x100001) AM_READ(SMH_NOP            )   // ?
2099		AM_RANGE(0x200000, 0x200001) AM_READ(SMH_NOP            )   // ?
2100		AM_RANGE(0x300000, 0x300003) AM_READ(seta_dsw_r            )   // DSW
	1958	static ADDRESS_MAP_START( orbs_map, ADDRESS_SPACE_PROGRAM, 16 )
	1959	AM_RANGE(0x000000, 0x07ffff) AM_ROM                        // ROM
	1960	AM_RANGE(0xf00000, 0xf0ffff) AM_RAM                        // RAM
	1961	AM_RANGE(0x100000, 0x100001) AM_READNOP                     // ?
	1962	AM_RANGE(0x200000, 0x200001) AM_READNOP                     // ?
	1963	AM_RANGE(0x300000, 0x300003) AM_READ(seta_dsw_r)            // DSW
	1964	AM_RANGE(0x400000, 0x400001) AM_WRITENOP                  // ?
2101	1965	AM_RANGE(0x500000, 0x500001) AM_READ_PORT("P1")               // P1
2102	1966	AM_RANGE(0x500002, 0x500003) AM_READ_PORT("P2")               // P2
2103	1967	AM_RANGE(0x500004, 0x500005) AM_READ_PORT("COINS")            // Coins
2104	1968	//AM_RANGE(0x600000, 0x60000f) AM_READ(krzybowl_input_r     )   // P1
2105		AM_RANGE(0x8000f0, 0x8000f1) AM_READ(SMH_RAM            )   // NVRAM
2106		AM_RANGE(0x800100, 0x8001ff) AM_READ(SMH_RAM            )   // NVRAM
2107		AM_RANGE(0xa00000, 0xa03fff) AM_DEVREAD("x1", seta_sound_word_r      )   // Sound
2108		AM_RANGE(0xb00000, 0xb003ff) AM_READ(SMH_RAM            )   // Palette
2109		AM_RANGE(0xc00000, 0xc03fff) AM_READ(SMH_RAM            )   // Sprites Code + X + Attr
2110		/**/AM_RANGE(0xd00000, 0xd00001) AM_READ(SMH_RAM            )   // ? 0x4000
2111		/**/AM_RANGE(0xe00000, 0xe00607) AM_READ(SMH_RAM            )   // Sprites Y
	1969	AM_RANGE(0x8000f0, 0x8000f1) AM_RAM                        // NVRAM
	1970	AM_RANGE(0x800100, 0x8001ff) AM_RAM                        // NVRAM
	1971	AM_RANGE(0xa00000, 0xa03fff) AM_DEVREADWRITE("x1", seta_sound_word_r,seta_sound_word_w)   // Sound
	1972	AM_RANGE(0xb00000, 0xb003ff) AM_RAM AM_BASE(&paletteram16) AM_SIZE(&seta_paletteram_size)   // Palette
	1973	AM_RANGE(0xc00000, 0xc03fff) AM_RAM AM_BASE(&spriteram16_2)      // Sprites Code + X + Attr
	1974	/**/AM_RANGE(0xd00000, 0xd00001) AM_RAM                        // ? 0x4000
	1975	/**/AM_RANGE(0xe00000, 0xe00607) AM_RAM AM_BASE(&spriteram16)      // Sprites Y
2112	1976	ADDRESS_MAP_END
2113	1977
2114		static ADDRESS_MAP_START( orbs_writemem, ADDRESS_SPACE_PROGRAM, 16 )
2115		AM_RANGE(0x000000, 0x07ffff) AM_WRITE(SMH_ROM               )   // ROM
2116		AM_RANGE(0xf00000, 0xf0ffff) AM_WRITE(SMH_RAM               )   // RAM
2117		AM_RANGE(0x400000, 0x400001) AM_WRITE(SMH_NOP               )   // ?
2118		AM_RANGE(0x8000f0, 0x8000f1) AM_WRITE(SMH_RAM               )   // NVRAM
2119		AM_RANGE(0x800100, 0x8001ff) AM_WRITE(SMH_RAM               )   // NVRAM
2120		AM_RANGE(0xa00000, 0xa03fff) AM_DEVWRITE("x1", seta_sound_word_w         )   // Sound
2121		AM_RANGE(0xb00000, 0xb003ff) AM_WRITE(SMH_RAM) AM_BASE(&paletteram16   ) AM_SIZE(&seta_paletteram_size)   // Palette
2122		AM_RANGE(0xc00000, 0xc03fff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16_2   )   // Sprites Code + X + Attr
2123		AM_RANGE(0xd00000, 0xd00001) AM_WRITE(SMH_RAM               )   // ? 0x4000
2124		AM_RANGE(0xe00000, 0xe00607) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16   )   // Sprites Y
2125		ADDRESS_MAP_END
2126
2127
2128	1978	/***************************************************************************
2129	1979	Block Carnival
2130	1980	***************************************************************************/
2131	1981
2132	1982	/* similar to krzybowl */
2133		static ADDRESS_MAP_START( blockcar_readmem, ADDRESS_SPACE_PROGRAM, 16 )
2134		AM_RANGE(0x000000, 0x03ffff) AM_READ(SMH_ROM            )   // ROM
2135		AM_RANGE(0xf00000, 0xf03fff) AM_READ(SMH_RAM            )   // RAM
2136		AM_RANGE(0xf04000, 0xf041ff) AM_READ(SMH_RAM            )   // Backup RAM?
2137		AM_RANGE(0xf05000, 0xf050ff) AM_READ(SMH_RAM            )   // Backup RAM?
2138		AM_RANGE(0x300000, 0x300003) AM_READ(seta_dsw_r            )   // DSW
	1983	static ADDRESS_MAP_START( blockcar_map, ADDRESS_SPACE_PROGRAM, 16 )
	1984	AM_RANGE(0x000000, 0x03ffff) AM_ROM                        // ROM
	1985	AM_RANGE(0xf00000, 0xf03fff) AM_RAM                        // RAM
	1986	AM_RANGE(0xf04000, 0xf041ff) AM_RAM                        // Backup RAM?
	1987	AM_RANGE(0xf05000, 0xf050ff) AM_RAM                        // Backup RAM?
	1988	AM_RANGE(0x100000, 0x100001) AM_WRITENOP                  // ? 1 (start of interrupts, main loop: watchdog?)
	1989	AM_RANGE(0x200000, 0x200001) AM_WRITENOP                  // ? 0/1 (IRQ acknowledge?)
	1990	AM_RANGE(0x300000, 0x300003) AM_READ(seta_dsw_r)            // DSW
	1991	AM_RANGE(0x400000, 0x400001) AM_RAM_WRITE(seta_vregs_w) AM_BASE(&seta_vregs)   // Coin Lockout + Sound Enable (bit 4?)
2139	1992	AM_RANGE(0x500000, 0x500001) AM_READ_PORT("P1")               // P1
2140	1993	AM_RANGE(0x500002, 0x500003) AM_READ_PORT("P2")               // P2
2141	1994	AM_RANGE(0x500004, 0x500005) AM_READ_PORT("COINS")            // Coins
2142		AM_RANGE(0xa00000, 0xa03fff) AM_DEVREAD("x1", seta_sound_word_r      )   // Sound
2143		AM_RANGE(0xb00000, 0xb003ff) AM_READ(SMH_RAM            )   // Palette
2144		AM_RANGE(0xc00000, 0xc03fff) AM_READ(SMH_RAM            )   // Sprites Code + X + Attr
2145		/**/AM_RANGE(0xd00000, 0xd00001) AM_READ(SMH_RAM            )   // ? 0x4000
2146		/**/AM_RANGE(0xe00000, 0xe00607) AM_READ(SMH_RAM            )   // Sprites Y
	1995	AM_RANGE(0xa00000, 0xa03fff) AM_DEVREADWRITE("x1", seta_sound_word_r,seta_sound_word_w)   // Sound
	1996	AM_RANGE(0xb00000, 0xb003ff) AM_RAM AM_BASE(&paletteram16) AM_SIZE(&seta_paletteram_size)   // Palette
	1997	AM_RANGE(0xc00000, 0xc03fff) AM_RAM AM_BASE(&spriteram16_2)   // Sprites Code + X + Attr
	1998	/**/AM_RANGE(0xd00000, 0xd00001) AM_RAM   // ? 0x4000
	1999	/**/AM_RANGE(0xe00000, 0xe00607) AM_RAM AM_BASE(&spriteram16)   // Sprites Y
2147	2000	ADDRESS_MAP_END
2148	2001
2149		static ADDRESS_MAP_START( blockcar_writemem, ADDRESS_SPACE_PROGRAM, 16 )
2150		AM_RANGE(0x000000, 0x03ffff) AM_WRITE(SMH_ROM               )   // ROM
2151		AM_RANGE(0xf00000, 0xf03fff) AM_WRITE(SMH_RAM               )   // RAM
2152		AM_RANGE(0xf04000, 0xf041ff) AM_WRITE(SMH_RAM               )   // Backup RAM?
2153		AM_RANGE(0xf05000, 0xf050ff) AM_WRITE(SMH_RAM               )   // Backup RAM?
2154		AM_RANGE(0x100000, 0x100001) AM_WRITE(SMH_NOP               )   // ? 1 (start of interrupts, main loop: watchdog?)
2155		AM_RANGE(0x200000, 0x200001) AM_WRITE(SMH_NOP               )   // ? 0/1 (IRQ acknowledge?)
2156		AM_RANGE(0x400000, 0x400001) AM_WRITE(seta_vregs_w) AM_BASE(&seta_vregs   )   // Coin Lockout + Sound Enable (bit 4?)
2157		AM_RANGE(0xa00000, 0xa03fff) AM_DEVWRITE("x1", seta_sound_word_w         )   // Sound
2158		AM_RANGE(0xb00000, 0xb003ff) AM_WRITE(SMH_RAM) AM_BASE(&paletteram16   ) AM_SIZE(&seta_paletteram_size)   // Palette
2159		AM_RANGE(0xc00000, 0xc03fff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16_2   )   // Sprites Code + X + Attr
2160		AM_RANGE(0xd00000, 0xd00001) AM_WRITE(SMH_RAM               )   // ? 0x4000
2161		AM_RANGE(0xe00000, 0xe00607) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16   )   // Sprites Y
2162		ADDRESS_MAP_END
2163	2002
2164
2165
2166	2003	/***************************************************************************
2167	2004	Daioh
2168	2005	***************************************************************************/
2169	2006
2170		static ADDRESS_MAP_START( daioh_readmem, ADDRESS_SPACE_PROGRAM, 16 )
2171		AM_RANGE(0x000000, 0x0fffff) AM_READ(SMH_ROM            )   // ROM
2172		AM_RANGE(0x100000, 0x10ffff) AM_READ(SMH_RAM            )   // RAM
	2007	static ADDRESS_MAP_START( daioh_map, ADDRESS_SPACE_PROGRAM, 16 )
	2008	AM_RANGE(0x000000, 0x0fffff) AM_ROM                        // ROM
	2009	AM_RANGE(0x100000, 0x10ffff) AM_RAM                        // RAM
2173	2010	AM_RANGE(0x400000, 0x400001) AM_READ_PORT("P1")               // P1
2174	2011	AM_RANGE(0x400002, 0x400003) AM_READ_PORT("P2")               // P2
2175	2012	AM_RANGE(0x400004, 0x400005) AM_READ_PORT("COINS")            // Coins
	2013	AM_RANGE(0x500000, 0x500005) AM_RAM_WRITE(seta_vregs_w) AM_BASE(&seta_vregs)   // Coin Lockout + Video Registers
2176	2014	AM_RANGE(0x500006, 0x500007) AM_READ_PORT("EXTRA")            // Buttons 4,5,6
2177	2015	AM_RANGE(0x600000, 0x600003) AM_READ(seta_dsw_r            )   // DSW
2178		AM_RANGE(0x700000, 0x7003ff) AM_READ(SMH_RAM            )
2179		AM_RANGE(0x700400, 0x700fff) AM_READ(SMH_RAM            )  // Palette
2180		AM_RANGE(0x701000, 0x70ffff) AM_READ(SMH_RAM            )
2181		AM_RANGE(0x800000, 0x803fff) AM_READ(SMH_RAM            )   // VRAM 0&1
2182		AM_RANGE(0x804000, 0x80ffff) AM_READ(SMH_RAM            )   //
2183		AM_RANGE(0x880000, 0x883fff) AM_READ(SMH_RAM            )   // VRAM 2&3
2184		AM_RANGE(0x884000, 0x88ffff) AM_READ(SMH_RAM            )   //
2185		AM_RANGE(0x900000, 0x900005) AM_READ(SMH_RAM            )   // VRAM 0&1 Ctrl
2186		AM_RANGE(0x980000, 0x980005) AM_READ(SMH_RAM            )   // VRAM 2&3 Ctrl
2187		AM_RANGE(0xa00000, 0xa00607) AM_READ(SMH_RAM            )   // Sprites Y
2188		AM_RANGE(0xa80000, 0xa80001) AM_READ(SMH_RAM            )   // ? 0x4000
2189		AM_RANGE(0xb00000, 0xb03fff) AM_READ(SMH_RAM            )   // Sprites Code + X + Attr
2190		AM_RANGE(0xb04000, 0xb13fff) AM_READ(SMH_RAM            )   //
2191		AM_RANGE(0xc00000, 0xc03fff) AM_DEVREAD("x1", seta_sound_word_r      )   // Sound
	2016	AM_RANGE(0x700000, 0x7003ff) AM_RAM
	2017	AM_RANGE(0x700400, 0x700fff) AM_RAM AM_BASE(&paletteram16) AM_SIZE(&seta_paletteram_size)   // Palette
	2018	AM_RANGE(0x701000, 0x70ffff) AM_RAM                        //
	2019	AM_RANGE(0x800000, 0x803fff) AM_RAM_WRITE(seta_vram_0_w) AM_BASE(&seta_vram_0   )   // VRAM 0&1
	2020	AM_RANGE(0x804000, 0x80ffff) AM_RAM                        //
	2021	AM_RANGE(0x880000, 0x883fff) AM_RAM_WRITE(seta_vram_2_w) AM_BASE(&seta_vram_2   )   // VRAM 2&3
	2022	AM_RANGE(0x884000, 0x88ffff) AM_RAM                        //
	2023	AM_RANGE(0x900000, 0x900005) AM_RAM AM_BASE(&seta_vctrl_0)      // VRAM 0&1 Ctrl
	2024	AM_RANGE(0x980000, 0x980005) AM_RAM AM_BASE(&seta_vctrl_2)      // VRAM 2&3 Ctrl
	2025	AM_RANGE(0xa00000, 0xa00607) AM_RAM AM_BASE(&spriteram16      )   // Sprites Y
	2026	AM_RANGE(0xa80000, 0xa80001) AM_RAM   // ? 0x4000
	2027	AM_RANGE(0xb00000, 0xb03fff) AM_RAM AM_BASE(&spriteram16_2      )   // Sprites Code + X + Attr
	2028	AM_RANGE(0xb04000, 0xb13fff) AM_RAM
	2029	AM_RANGE(0xc00000, 0xc03fff) AM_DEVREADWRITE("x1", seta_sound_word_r,seta_sound_word_w)   // Sound
	2030	AM_RANGE(0xe00000, 0xe00001) AM_WRITENOP   //
2192	2031	ADDRESS_MAP_END
2193	2032
2194		static ADDRESS_MAP_START( daioh_writemem, ADDRESS_SPACE_PROGRAM, 16 )
2195		AM_RANGE(0x000000, 0x0fffff) AM_WRITE(SMH_ROM                  )   // ROM
2196		AM_RANGE(0x100000, 0x10ffff) AM_WRITE(SMH_RAM                  )   // RAM
2197		AM_RANGE(0x500000, 0x500005) AM_WRITE(seta_vregs_w) AM_BASE(&seta_vregs      )   // Coin Lockout + Video Registers
2198		AM_RANGE(0x700000, 0x7003ff) AM_WRITE(SMH_RAM                  )
2199		AM_RANGE(0x700400, 0x700fff) AM_WRITE(SMH_RAM) AM_BASE(&paletteram16   ) AM_SIZE(&seta_paletteram_size)   // Palette
2200		AM_RANGE(0x701000, 0x70ffff) AM_WRITE(SMH_RAM                  )   //
2201		AM_RANGE(0x800000, 0x803fff) AM_WRITE(seta_vram_0_w) AM_BASE(&seta_vram_0   )   // VRAM 0
2202		AM_RANGE(0x804000, 0x80ffff) AM_WRITE(SMH_RAM                  )   //
2203		AM_RANGE(0x880000, 0x883fff) AM_WRITE(seta_vram_2_w) AM_BASE(&seta_vram_2   )   // VRAM 2
2204		AM_RANGE(0x884000, 0x88ffff) AM_WRITE(SMH_RAM                  )   //
2205		AM_RANGE(0x900000, 0x900005) AM_WRITE(SMH_RAM) AM_BASE(&seta_vctrl_0      )   // VRAM 0&1 Ctrl
2206		AM_RANGE(0x980000, 0x980005) AM_WRITE(SMH_RAM) AM_BASE(&seta_vctrl_2      )   // VRAM 2&3 Ctrl
2207		AM_RANGE(0xa00000, 0xa00607) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16      )   // Sprites Y
2208		AM_RANGE(0xa80000, 0xa80001) AM_WRITE(SMH_RAM                  )   // ? 0x4000
2209		AM_RANGE(0xb00000, 0xb03fff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16_2      )   // Sprites Code + X + Attr
2210		AM_RANGE(0xb04000, 0xb13fff) AM_WRITE(SMH_RAM                  )   //
2211		AM_RANGE(0xc00000, 0xc03fff) AM_DEVWRITE("x1", seta_sound_word_w            )   // Sound
2212		AM_RANGE(0xe00000, 0xe00001) AM_WRITE(SMH_NOP                  )   //
2213		ADDRESS_MAP_END
2214	2033
2215
2216	2034	/***************************************************************************
2217	2035	Dragon Unit, Quiz Kokology, Quiz Kokology 2, Strike Gunner
2218	2036	***************************************************************************/
2219	2037
2220		static ADDRESS_MAP_START( drgnunit_readmem, ADDRESS_SPACE_PROGRAM, 16 )
2221		AM_RANGE(0x000000, 0x0bffff) AM_READ(SMH_ROM            )   // ROM
2222		AM_RANGE(0xf00000, 0xf0ffff) AM_READ(SMH_RAM            )   // RAM (qzkklogy)
2223		AM_RANGE(0xffc000, 0xffffff) AM_READ(SMH_RAM            )   // RAM (drgnunit,stg)
2224		AM_RANGE(0x100000, 0x103fff) AM_DEVREAD("x1", seta_sound_word_r      )   // Sound
2225		AM_RANGE(0x600000, 0x600003) AM_READ(seta_dsw_r            )   // DSW
2226		AM_RANGE(0x700000, 0x7003ff) AM_READ(SMH_RAM            )   // Palette
2227		AM_RANGE(0x900000, 0x901fff) AM_READ(SMH_RAM            )   // VRAM
2228		AM_RANGE(0x902000, 0x903fff) AM_READ(SMH_RAM            )   // VRAM
	2038	static ADDRESS_MAP_START( drgnunit_map, ADDRESS_SPACE_PROGRAM, 16 )
	2039	AM_RANGE(0x000000, 0x0bffff) AM_ROM                        // ROM
	2040	AM_RANGE(0xf00000, 0xf0ffff) AM_RAM                        // RAM (qzkklogy)
	2041	AM_RANGE(0xffc000, 0xffffff) AM_RAM                        // RAM (drgnunit,stg)
	2042	AM_RANGE(0x100000, 0x103fff) AM_DEVREADWRITE("x1", seta_sound_word_r,seta_sound_word_w)   // Sound
	2043	AM_RANGE(0x200000, 0x200001) AM_WRITENOP                  // Watchdog
	2044	AM_RANGE(0x300000, 0x300001) AM_WRITENOP                  // ? IRQ Ack
	2045	AM_RANGE(0x500000, 0x500001) AM_RAM_WRITE(seta_vregs_w) AM_BASE(&seta_vregs)   // Coin Lockout + Video Registers
	2046	AM_RANGE(0x600000, 0x600003) AM_READ(seta_dsw_r)            // DSW
	2047	AM_RANGE(0x700000, 0x7003ff) AM_RAM AM_BASE(&paletteram16) AM_SIZE(&seta_paletteram_size)   // Palette
	2048	AM_RANGE(0x800000, 0x800005) AM_RAM AM_BASE(&seta_vctrl_0)      // VRAM Ctrl
	2049	AM_RANGE(0x900000, 0x903fff) AM_RAM_WRITE(seta_vram_0_w) AM_BASE(&seta_vram_0   )   // VRAM
	2050	AM_RANGE(0x904000, 0x90ffff) AM_WRITENOP                  // unused (qzkklogy)
2229	2051	AM_RANGE(0xb00000, 0xb00001) AM_READ_PORT("P1")               // P1
2230	2052	AM_RANGE(0xb00002, 0xb00003) AM_READ_PORT("P2")               // P2
2231	2053	AM_RANGE(0xb00004, 0xb00005) AM_READ_PORT("COINS")            // Coins
2232		AM_RANGE(0xb00006, 0xb00007) AM_READ(SMH_NOP            )   // unused (qzkklogy)
2233		/**/AM_RANGE(0xc00000, 0xc00001) AM_READ(SMH_RAM            )   // ? $4000
2234		/**/AM_RANGE(0xd00000, 0xd00607) AM_READ(SMH_RAM            )   // Sprites Y
2235		AM_RANGE(0xe00000, 0xe03fff) AM_READ(SMH_RAM            )   // Sprites Code + X + Attr
	2054	AM_RANGE(0xb00006, 0xb00007) AM_READNOP                     // unused (qzkklogy)
	2055	/**/AM_RANGE(0xc00000, 0xc00001) AM_RAM                        // ? $4000
	2056	/**/AM_RANGE(0xd00000, 0xd00607) AM_RAM AM_BASE(&spriteram16)      // Sprites Y
	2057	AM_RANGE(0xe00000, 0xe03fff) AM_RAM AM_BASE(&spriteram16_2)      // Sprites Code + X + Attr
2236	2058	ADDRESS_MAP_END
2237	2059
2238		static ADDRESS_MAP_START( drgnunit_writemem, ADDRESS_SPACE_PROGRAM, 16 )
2239		AM_RANGE(0x000000, 0x0bffff) AM_WRITE(SMH_ROM                  )   // ROM
2240		AM_RANGE(0xf00000, 0xf0ffff) AM_WRITE(SMH_RAM                  )   // RAM (qzkklogy)
2241		AM_RANGE(0xffc000, 0xffffff) AM_WRITE(SMH_RAM                  )   // RAM (drgnunit,stg)
2242		AM_RANGE(0x100000, 0x103fff) AM_DEVWRITE("x1", seta_sound_word_w            )   // Sound
2243		AM_RANGE(0x200000, 0x200001) AM_WRITE(SMH_NOP                  )   // Watchdog
2244		AM_RANGE(0x300000, 0x300001) AM_WRITE(SMH_NOP                  )   // ? IRQ Ack
2245		AM_RANGE(0x500000, 0x500001) AM_WRITE(seta_vregs_w) AM_BASE(&seta_vregs      )   // Coin Lockout + Video Registers
2246		AM_RANGE(0x700000, 0x7003ff) AM_WRITE(SMH_RAM) AM_BASE(&paletteram16   ) AM_SIZE(&seta_paletteram_size)   // Palette
2247		AM_RANGE(0x800000, 0x800005) AM_WRITE(SMH_RAM) AM_BASE(&seta_vctrl_0      )   // VRAM Ctrl
2248		AM_RANGE(0x900000, 0x903fff) AM_WRITE(seta_vram_0_w) AM_BASE(&seta_vram_0   )   // VRAM
2249		AM_RANGE(0x904000, 0x90ffff) AM_WRITE(SMH_NOP                  )   // unused (qzkklogy)
2250		AM_RANGE(0xc00000, 0xc00001) AM_WRITE(SMH_RAM                  )   // ? $4000
2251		AM_RANGE(0xd00000, 0xd00607) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16      )   // Sprites Y
2252		AM_RANGE(0xe00000, 0xe03fff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16_2      )   // Sprites Code + X + Attr
2253		ADDRESS_MAP_END
2254	2060
2255
2256	2061	/***************************************************************************
2257	2062	Extreme Downhill / Sokonuke
2258	2063	***************************************************************************/
2259	2064
2260		static ADDRESS_MAP_START( extdwnhl_readmem, ADDRESS_SPACE_PROGRAM, 16 )
2261		AM_RANGE(0x000000, 0x0fffff) AM_READ(SMH_ROM            )   // ROM
2262		AM_RANGE(0x200000, 0x20ffff) AM_READ(SMH_RAM            )   // RAM
2263		AM_RANGE(0x210000, 0x21ffff) AM_READ(SMH_RAM            )   // RAM
2264		AM_RANGE(0x220000, 0x23ffff) AM_READ(SMH_RAM            )   // RAM (sokonuke)
	2065	static ADDRESS_MAP_START( extdwnhl_map, ADDRESS_SPACE_PROGRAM, 16 )
	2066	AM_RANGE(0x000000, 0x0fffff) AM_ROM                        // ROM
	2067	AM_RANGE(0x200000, 0x20ffff) AM_RAM                        // RAM
	2068	AM_RANGE(0x210000, 0x21ffff) AM_RAM                        // RAM
	2069	AM_RANGE(0x220000, 0x23ffff) AM_RAM                        // RAM (sokonuke)
2265	2070	AM_RANGE(0x400000, 0x400001) AM_READ_PORT("P1")               // P1
2266	2071	AM_RANGE(0x400002, 0x400003) AM_READ_PORT("P2")               // P2
2267	2072	AM_RANGE(0x400004, 0x400005) AM_READ_PORT("COINS")            // Coins
2268		AM_RANGE(0x400008, 0x40000b) AM_READ(seta_dsw_r            )   // DSW
2269		AM_RANGE(0x40000c, 0x40000d) AM_READ(watchdog_reset16_r      )   // Watchdog (extdwnhl, MUST RETURN $FFFF)
2270		AM_RANGE(0x500004, 0x500007) AM_READ(SMH_NOP            )   // IRQ Ack  (extdwnhl)
2271		AM_RANGE(0x600400, 0x600fff) AM_READ(SMH_RAM            )   // Palette
2272		AM_RANGE(0x601000, 0x610bff) AM_READ(SMH_RAM            )   //
2273		AM_RANGE(0x800000, 0x803fff) AM_READ(SMH_RAM            )   // VRAM 0&1
2274		AM_RANGE(0x804000, 0x80ffff) AM_READ(SMH_RAM            )   //
2275		AM_RANGE(0x880000, 0x883fff) AM_READ(SMH_RAM            )   // VRAM 2&3
2276		AM_RANGE(0x884000, 0x88ffff) AM_READ(SMH_RAM            )   //
2277		/**/AM_RANGE(0x900000, 0x900005) AM_READ(SMH_RAM            )   // VRAM 0&1 Ctrl
2278		/**/AM_RANGE(0x980000, 0x980005) AM_READ(SMH_RAM            )   // VRAM 2&3 Ctrl
2279		/**/AM_RANGE(0xa00000, 0xa00607) AM_READ(SMH_RAM            )   // Sprites Y
2280		/**/AM_RANGE(0xa80000, 0xa80001) AM_READ(SMH_RAM            )   // ? 0x4000
2281		AM_RANGE(0xb00000, 0xb03fff) AM_READ(SMH_RAM            )   // Sprites Code + X + Attr
2282		AM_RANGE(0xb04000, 0xb13fff) AM_READ(SMH_RAM            )   //
2283		AM_RANGE(0xe00000, 0xe03fff) AM_DEVREAD("x1", seta_sound_word_r      )   // Sound
	2073	AM_RANGE(0x400008, 0x40000b) AM_READ(seta_dsw_r)            // DSW
	2074	AM_RANGE(0x40000c, 0x40000d) AM_READWRITE(watchdog_reset16_r,watchdog_reset16_w)   // Watchdog (extdwnhl (R) & sokonuke (W) MUST RETURN $FFFF)
	2075	AM_RANGE(0x500000, 0x500003) AM_RAM_WRITE(seta_vregs_w) AM_BASE(&seta_vregs)   // Coin Lockout + Video Registers
	2076	AM_RANGE(0x500004, 0x500007) AM_NOP                        // IRQ Ack  (extdwnhl (R) & sokonuke (W))
	2077	AM_RANGE(0x600400, 0x600fff) AM_RAM AM_BASE(&paletteram16) AM_SIZE(&seta_paletteram_size)   // Palette
	2078	AM_RANGE(0x601000, 0x610bff) AM_RAM                        //
	2079	AM_RANGE(0x800000, 0x803fff) AM_RAM_WRITE(seta_vram_0_w) AM_BASE(&seta_vram_0)   // VRAM 0&1
	2080	AM_RANGE(0x804000, 0x80ffff) AM_RAM                        //
	2081	AM_RANGE(0x880000, 0x883fff) AM_RAM_WRITE(seta_vram_2_w) AM_BASE(&seta_vram_2)   // VRAM 2&3
	2082	AM_RANGE(0x884000, 0x88ffff) AM_RAM                        //
	2083	/**/AM_RANGE(0x900000, 0x900005) AM_RAM AM_BASE(&seta_vctrl_0)      // VRAM 0&1 Ctrl
	2084	/**/AM_RANGE(0x980000, 0x980005) AM_RAM AM_BASE(&seta_vctrl_2)      // VRAM 2&3 Ctrl
	2085	/**/AM_RANGE(0xa00000, 0xa00607) AM_RAM AM_BASE(&spriteram16)      // Sprites Y
	2086	/**/AM_RANGE(0xa80000, 0xa80001) AM_RAM                        // ? 0x4000
	2087	AM_RANGE(0xb00000, 0xb03fff) AM_RAM AM_BASE(&spriteram16_2)      // Sprites Code + X + Attr
	2088	AM_RANGE(0xb04000, 0xb13fff) AM_RAM                        //
	2089	AM_RANGE(0xe00000, 0xe03fff) AM_DEVREADWRITE("x1", seta_sound_word_r,seta_sound_word_w)   // Sound
2284	2090	ADDRESS_MAP_END
2285	2091
2286		static ADDRESS_MAP_START( extdwnhl_writemem, ADDRESS_SPACE_PROGRAM, 16 )
2287		AM_RANGE(0x000000, 0x0fffff) AM_WRITE(SMH_ROM                  )   // ROM
2288		AM_RANGE(0x200000, 0x20ffff) AM_WRITE(SMH_RAM                  )   // RAM
2289		AM_RANGE(0x210000, 0x21ffff) AM_WRITE(SMH_RAM                  )   // RAM
2290		AM_RANGE(0x220000, 0x23ffff) AM_WRITE(SMH_RAM                  )   // RAM (sokonuke)
2291		AM_RANGE(0x40000c, 0x40000d) AM_WRITE(watchdog_reset16_w         )   // Watchdog (sokonuke)
2292		AM_RANGE(0x500000, 0x500003) AM_WRITE(seta_vregs_w) AM_BASE(&seta_vregs      )   // Coin Lockout + Video Registers
2293		AM_RANGE(0x500004, 0x500007) AM_WRITE(SMH_NOP                  )   // IRQ Ack (sokonuke)
2294		AM_RANGE(0x600400, 0x600fff) AM_WRITE(SMH_RAM) AM_BASE(&paletteram16   ) AM_SIZE(&seta_paletteram_size)   // Palette
2295		AM_RANGE(0x601000, 0x610bff) AM_WRITE(SMH_RAM                  )   //
2296		AM_RANGE(0x800000, 0x803fff) AM_WRITE(seta_vram_0_w) AM_BASE(&seta_vram_0   )   // VRAM 0
2297		AM_RANGE(0x804000, 0x80ffff) AM_WRITE(SMH_RAM                  )   //
2298		AM_RANGE(0x880000, 0x883fff) AM_WRITE(seta_vram_2_w) AM_BASE(&seta_vram_2   )   // VRAM 2
2299		AM_RANGE(0x884000, 0x88ffff) AM_WRITE(SMH_RAM                  )   //
2300		AM_RANGE(0x900000, 0x900005) AM_WRITE(SMH_RAM) AM_BASE(&seta_vctrl_0      )   // VRAM 0&1 Ctrl
2301		AM_RANGE(0x980000, 0x980005) AM_WRITE(SMH_RAM) AM_BASE(&seta_vctrl_2      )   // VRAM 2&3 Ctrl
2302		AM_RANGE(0xa00000, 0xa00607) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16      )   // Sprites Y
2303		AM_RANGE(0xa80000, 0xa80001) AM_WRITE(SMH_RAM                  )   // ? 0x4000
2304		AM_RANGE(0xb00000, 0xb03fff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16_2      )   // Sprites Code + X + Attr
2305		AM_RANGE(0xb04000, 0xb13fff) AM_WRITE(SMH_RAM                  )   //
2306		AM_RANGE(0xe00000, 0xe03fff) AM_DEVWRITE("x1", seta_sound_word_w            )   // Sound
2307		ADDRESS_MAP_END
2308	2092
2309	2093	/***************************************************************************
2310	2094	(Kamen) Masked Riders Club Battle Race / Mad Shark
2311	2095	***************************************************************************/
2312	2096
2313		static ADDRESS_MAP_START( kamenrid_readmem, ADDRESS_SPACE_PROGRAM, 16 )
2314		AM_RANGE(0x000000, 0x07ffff) AM_READ(SMH_ROM            )   // ROM
2315		AM_RANGE(0x200000, 0x20ffff) AM_READ(SMH_RAM            )   // ROM
	2097	static ADDRESS_MAP_START( kamenrid_map, ADDRESS_SPACE_PROGRAM, 16 )
	2098	AM_RANGE(0x000000, 0x07ffff) AM_ROM                        // ROM
	2099	AM_RANGE(0x200000, 0x20ffff) AM_RAM                        // RAM
2316	2100	AM_RANGE(0x500000, 0x500001) AM_READ_PORT("P1")               // P1
2317	2101	AM_RANGE(0x500002, 0x500003) AM_READ_PORT("P2")               // P2
2318		AM_RANGE(0x500004, 0x500007) AM_READ(seta_dsw_r            )   // DSW
	2102	AM_RANGE(0x500004, 0x500007) AM_READ(seta_dsw_r)            // DSW
2319	2103	AM_RANGE(0x500008, 0x500009) AM_READ_PORT("COINS")            // Coins
2320		AM_RANGE(0x50000c, 0x50000d) AM_READ(watchdog_reset16_r      )   // xx Watchdog?
2321		AM_RANGE(0x700000, 0x7003ff) AM_READ(SMH_RAM            )   // Palette
2322		AM_RANGE(0x700400, 0x700fff) AM_READ(SMH_RAM            )   // Palette
2323		AM_RANGE(0x701000, 0x703fff) AM_READ(SMH_RAM            )   // Palette
2324		AM_RANGE(0x800000, 0x801fff) AM_READ(SMH_RAM            )   // VRAM 0
2325		AM_RANGE(0x802000, 0x803fff) AM_READ(SMH_RAM            )   // VRAM 1
2326		AM_RANGE(0x804000, 0x807fff) AM_READ(SMH_RAM            )   // tested
2327		AM_RANGE(0x880000, 0x881fff) AM_READ(SMH_RAM            )   // VRAM 2
2328		AM_RANGE(0x882000, 0x883fff) AM_READ(SMH_RAM            )   // VRAM 3
2329		AM_RANGE(0x884000, 0x887fff) AM_READ(SMH_RAM            )   // tested
2330		AM_RANGE(0xa00000, 0xa00607) AM_READ(SMH_RAM             )   // Sprites Y
2331		AM_RANGE(0xb00000, 0xb03fff) AM_READ(SMH_RAM            )   // Sprites Code + X + Attr
2332		AM_RANGE(0xb04000, 0xb07fff) AM_READ(SMH_RAM            )   // tested
2333		AM_RANGE(0xd00000, 0xd03fff) AM_DEVREAD("x1", seta_sound_word_r      )   // Sound
2334		ADDRESS_MAP_END
2335
2336		static ADDRESS_MAP_START( kamenrid_writemem, ADDRESS_SPACE_PROGRAM, 16 )
2337		AM_RANGE(0x000000, 0x07ffff) AM_WRITE(SMH_ROM                  )   // ROM
2338		AM_RANGE(0x200000, 0x20ffff) AM_WRITE(SMH_RAM                  )   // ROM
2339		AM_RANGE(0x50000c, 0x50000d) AM_WRITE(watchdog_reset16_w         )   // Watchdog (sokonuke)
2340		AM_RANGE(0x600000, 0x600005) AM_WRITE(seta_vregs_w) AM_BASE(&seta_vregs      )   // ? Coin Lockout + Video Registers
2341		AM_RANGE(0x600006, 0x600007) AM_WRITE(SMH_NOP                  )   // ?
2342		AM_RANGE(0x700000, 0x7003ff) AM_WRITE(SMH_RAM                  )   // Palette RAM (tested)
2343		AM_RANGE(0x700400, 0x700fff) AM_WRITE(SMH_RAM) AM_BASE(&paletteram16   ) AM_SIZE(&seta_paletteram_size)   // Palette
2344		AM_RANGE(0x701000, 0x703fff) AM_WRITE(SMH_RAM   )   // Palette
2345		AM_RANGE(0x800000, 0x803fff) AM_WRITE(seta_vram_0_w) AM_BASE(&seta_vram_0   )   // VRAM 0
2346		AM_RANGE(0x804000, 0x807fff) AM_WRITE(SMH_RAM   )   // tested
2347		AM_RANGE(0x880000, 0x883fff) AM_WRITE(seta_vram_2_w) AM_BASE(&seta_vram_2   )   // VRAM 2
2348		AM_RANGE(0x884000, 0x887fff) AM_WRITE(SMH_RAM   )   // tested
2349		AM_RANGE(0x900000, 0x900005) AM_WRITE(SMH_RAM) AM_BASE(&seta_vctrl_0      )   // VRAM 0&1 Ctrl
2350		AM_RANGE(0x980000, 0x980005) AM_WRITE(SMH_RAM) AM_BASE(&seta_vctrl_2      )   // VRAM 2&3 Ctrl
2351		AM_RANGE(0xa00000, 0xa00607) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16      )   // Sprites Y
2352		AM_RANGE(0xa80000, 0xa80001) AM_WRITE(SMH_RAM                  )   // ? $4000
2353		AM_RANGE(0xb00000, 0xb03fff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16_2   )   // Sprites Code + X + Attr
2354		AM_RANGE(0xb04000, 0xb07fff) AM_WRITE(SMH_RAM)   // tested
	2104	AM_RANGE(0x50000c, 0x50000d) AM_READWRITE(watchdog_reset16_r,watchdog_reset16_w)   // xx Watchdog? (sokonuke)
	2105	AM_RANGE(0x600000, 0x600005) AM_RAM_WRITE(seta_vregs_w) AM_BASE(&seta_vregs)   // ? Coin Lockout + Video Registers
	2106	AM_RANGE(0x600006, 0x600007) AM_WRITENOP                  // ?
	2107	AM_RANGE(0x700000, 0x7003ff) AM_RAM                        // Palette RAM (tested)
	2108	AM_RANGE(0x700400, 0x700fff) AM_RAM AM_BASE(&paletteram16) AM_SIZE(&seta_paletteram_size)   // Palette
	2109	AM_RANGE(0x701000, 0x703fff) AM_RAM                      // Palette
	2110	AM_RANGE(0x800000, 0x803fff) AM_RAM_WRITE(seta_vram_0_w) AM_BASE(&seta_vram_0   )   // VRAM 0&1
	2111	AM_RANGE(0x804000, 0x807fff) AM_RAM   // tested
	2112	AM_RANGE(0x880000, 0x883fff) AM_RAM_WRITE(seta_vram_2_w) AM_BASE(&seta_vram_2   )   // VRAM 2&3
	2113	AM_RANGE(0x884000, 0x887fff) AM_RAM   // tested
	2114	AM_RANGE(0x900000, 0x900005) AM_RAM AM_BASE(&seta_vctrl_0)      // VRAM 0&1 Ctrl
	2115	AM_RANGE(0x980000, 0x980005) AM_RAM AM_BASE(&seta_vctrl_2)      // VRAM 2&3 Ctrl
	2116	AM_RANGE(0xa00000, 0xa00607) AM_RAM AM_BASE(&spriteram16)      // Sprites Y
	2117	AM_RANGE(0xa80000, 0xa80001) AM_RAM                        // ? $4000
	2118	AM_RANGE(0xb00000, 0xb03fff) AM_RAM AM_BASE(&spriteram16_2)      // Sprites Code + X + Attr
	2119	AM_RANGE(0xb04000, 0xb07fff) AM_RAM                        // tested
2355	2120	#if __uPD71054_TIMER
2356		AM_RANGE(0xc00000, 0xc00007) AM_WRITE(timer_regs_w               )   // ?
	2121	AM_RANGE(0xc00000, 0xc00007) AM_WRITE(timer_regs_w)            // ?
2357	2122	#else
2358		AM_RANGE(0xc00000, 0xc00007) AM_WRITE(SMH_NOP                  )   // ?
	2123	AM_RANGE(0xc00000, 0xc00007) AM_WRITENOP                  // ?
2359	2124	#endif
2360		AM_RANGE(0xd00000, 0xd03fff) AM_DEVWRITE("x1", seta_sound_word_w            )   // Sound
	2125	AM_RANGE(0xd00000, 0xd03fff) AM_DEVREADWRITE("x1", seta_sound_word_r,seta_sound_word_w)   // Sound
2361	2126	ADDRESS_MAP_END
2362	2127
2363		/* almast identical to kamenrid */
2364		static ADDRESS_MAP_START( madshark_readmem, ADDRESS_SPACE_PROGRAM, 16 )
2365		AM_RANGE(0x000000, 0x0fffff) AM_READ(SMH_ROM            )   // ROM
2366		AM_RANGE(0x200000, 0x20ffff) AM_READ(SMH_RAM            )   // ROM
	2128	/* almost identical to kamenrid */
	2129	static ADDRESS_MAP_START( madshark_map, ADDRESS_SPACE_PROGRAM, 16 )
	2130	AM_RANGE(0x000000, 0x0fffff) AM_ROM                        // ROM
	2131	AM_RANGE(0x200000, 0x20ffff) AM_RAM                        // RAM
2367	2132	AM_RANGE(0x500000, 0x500001) AM_READ_PORT("P1")               // P1
2368	2133	AM_RANGE(0x500002, 0x500003) AM_READ_PORT("P2")               // P2
2369	2134	AM_RANGE(0x500004, 0x500005) AM_READ_PORT("COINS")            // Coins
2370		AM_RANGE(0x500008, 0x50000b) AM_READ(seta_dsw_r            )   // DSW
2371		AM_RANGE(0x700400, 0x700fff) AM_READ(SMH_RAM            )   // Palette
2372		AM_RANGE(0x800000, 0x801fff) AM_READ(SMH_RAM            )   // VRAM 0
2373		AM_RANGE(0x802000, 0x803fff) AM_READ(SMH_RAM            )   // VRAM 1
2374		AM_RANGE(0x880000, 0x881fff) AM_READ(SMH_RAM            )   // VRAM 2
2375		AM_RANGE(0x882000, 0x883fff) AM_READ(SMH_RAM            )   // VRAM 3
2376		AM_RANGE(0xa00000, 0xa00607) AM_READ(SMH_RAM             )   // Sprites Y
2377		AM_RANGE(0xb00000, 0xb03fff) AM_READ(SMH_RAM            )   // Sprites Code + X + Attr
2378		AM_RANGE(0xd00000, 0xd03fff) AM_DEVREAD("x1", seta_sound_word_r      )   // Sound
2379		ADDRESS_MAP_END
	2135	AM_RANGE(0x500008, 0x50000b) AM_READ(seta_dsw_r)            // DSW
	2136	AM_RANGE(0x50000c, 0x50000d) AM_WRITE(watchdog_reset16_w)      // Watchdog
	2137	AM_RANGE(0x600000, 0x600005) AM_RAM_WRITE(seta_vregs_w) AM_BASE(&seta_vregs)   // ? Coin Lockout + Video Registers
	2138	AM_RANGE(0x600006, 0x600007) AM_WRITENOP                  // ?
	2139	AM_RANGE(0x700400, 0x700fff) AM_RAM AM_BASE(&paletteram16) AM_SIZE(&seta_paletteram_size)   // Palette
	2140	AM_RANGE(0x800000, 0x803fff) AM_RAM_WRITE(seta_vram_0_w) AM_BASE(&seta_vram_0)   // VRAM 0&1
	2141	AM_RANGE(0x880000, 0x883fff) AM_RAM_WRITE(seta_vram_2_w) AM_BASE(&seta_vram_2)   // VRAM 2&3
	2142	AM_RANGE(0x900000, 0x900005) AM_RAM AM_BASE(&seta_vctrl_0)      // VRAM 0&1 Ctrl
	2143	AM_RANGE(0x980000, 0x980005) AM_RAM AM_BASE(&seta_vctrl_2)      // VRAM 2&3 Ctrl
2380	2144
2381		static ADDRESS_MAP_START( madshark_writemem, ADDRESS_SPACE_PROGRAM, 16 )
2382		AM_RANGE(0x000000, 0x0fffff) AM_WRITE(SMH_ROM                  )   // ROM
2383		AM_RANGE(0x200000, 0x20ffff) AM_WRITE(SMH_RAM                  )   // ROM
2384		AM_RANGE(0x50000c, 0x50000d) AM_WRITE(watchdog_reset16_w         )   // Watchdog
2385		AM_RANGE(0x600000, 0x600005) AM_WRITE(seta_vregs_w) AM_BASE(&seta_vregs      )   // ? Coin Lockout + Video Registers
2386		AM_RANGE(0x600006, 0x600007) AM_WRITE(SMH_NOP                  )   // ?
2387		AM_RANGE(0x700400, 0x700fff) AM_WRITE(SMH_RAM) AM_BASE(&paletteram16   ) AM_SIZE(&seta_paletteram_size)   // Palette
2388		AM_RANGE(0x800000, 0x803fff) AM_WRITE(seta_vram_0_w) AM_BASE(&seta_vram_0   )   // VRAM 0
2389		AM_RANGE(0x880000, 0x883fff) AM_WRITE(seta_vram_2_w) AM_BASE(&seta_vram_2   )   // VRAM 2
2390		AM_RANGE(0x900000, 0x900005) AM_WRITE(SMH_RAM) AM_BASE(&seta_vctrl_0      )   // VRAM 0&1 Ctrl
2391		AM_RANGE(0x980000, 0x980005) AM_WRITE(SMH_RAM) AM_BASE(&seta_vctrl_2      )   // VRAM 2&3 Ctrl
2392		AM_RANGE(0xa00000, 0xa00607) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16      )   // Sprites Y
2393		AM_RANGE(0xa80000, 0xa80001) AM_WRITE(SMH_RAM                  )   // ? $4000
2394		AM_RANGE(0xb00000, 0xb03fff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16_2   )   // Sprites Code + X + Attr
	2145	AM_RANGE(0xa00000, 0xa00607) AM_RAM   AM_BASE(&spriteram16)      // Sprites Y
	2146	AM_RANGE(0xa80000, 0xa80001) AM_RAM                        // ? $4000
	2147	AM_RANGE(0xb00000, 0xb03fff) AM_RAM   AM_BASE(&spriteram16_2)      // Sprites Code + X + Attr
2395	2148	#if __uPD71054_TIMER
2396		AM_RANGE(0xc00000, 0xc00007) AM_WRITE(timer_regs_w               )   // ?
	2149	AM_RANGE(0xc00000, 0xc00007) AM_WRITE(timer_regs_w)            // ?
2397	2150	#else
2398		AM_RANGE(0xc00000, 0xc00007) AM_WRITE(SMH_NOP                  )   // ?
	2151	AM_RANGE(0xc00000, 0xc00007) AM_WRITENOP                  // ?
2399	2152	#endif
2400		AM_RANGE(0xd00000, 0xd03fff) AM_DEVWRITE("x1", seta_sound_word_w            )   // Sound
	2153	AM_RANGE(0xd00000, 0xd03fff) AM_DEVREADWRITE("x1", seta_sound_word_r,seta_sound_word_w)   // Sound
2401	2154	ADDRESS_MAP_END
2402	2155
2403	2156
2404
2405	2157	/***************************************************************************
2406	2158	Krazy Bowl
2407	2159	***************************************************************************/
r4679	r4680
2430	2182	}
2431	2183	}
2432	2184
2433		static ADDRESS_MAP_START( krzybowl_readmem, ADDRESS_SPACE_PROGRAM, 16 )
2434		AM_RANGE(0x000000, 0x07ffff) AM_READ(SMH_ROM            )   // ROM
2435		AM_RANGE(0xf00000, 0xf0ffff) AM_READ(SMH_RAM            )   // RAM
2436		AM_RANGE(0x100000, 0x100001) AM_READ(SMH_NOP            )   // ?
2437		AM_RANGE(0x200000, 0x200001) AM_READ(SMH_NOP            )   // ?
2438		AM_RANGE(0x300000, 0x300003) AM_READ(seta_dsw_r            )   // DSW
	2185	static ADDRESS_MAP_START( krzybowl_map, ADDRESS_SPACE_PROGRAM, 16 )
	2186	AM_RANGE(0x000000, 0x07ffff) AM_ROM                      // ROM
	2187	AM_RANGE(0xf00000, 0xf0ffff) AM_RAM                        // RAM
	2188	AM_RANGE(0x100000, 0x100001) AM_READNOP                     // ?
	2189	AM_RANGE(0x200000, 0x200001) AM_READNOP                     // ?
	2190	AM_RANGE(0x300000, 0x300003) AM_READ(seta_dsw_r)            // DSW
	2191	AM_RANGE(0x400000, 0x400001) AM_WRITENOP                  // ?
2439	2192	AM_RANGE(0x500000, 0x500001) AM_READ_PORT("P1")               // P1
2440	2193	AM_RANGE(0x500002, 0x500003) AM_READ_PORT("P2")               // P2
2441	2194	AM_RANGE(0x500004, 0x500005) AM_READ_PORT("COINS")            // Coins
2442		AM_RANGE(0x600000, 0x60000f) AM_READ(krzybowl_input_r      )   // P1
2443		AM_RANGE(0x8000f0, 0x8000f1) AM_READ(SMH_RAM            )   // NVRAM
2444		AM_RANGE(0x800100, 0x8001ff) AM_READ(SMH_RAM            )   // NVRAM
2445		AM_RANGE(0xa00000, 0xa03fff) AM_DEVREAD("x1", seta_sound_word_r      )   // Sound
2446		AM_RANGE(0xb00000, 0xb003ff) AM_READ(SMH_RAM            )   // Palette
2447		AM_RANGE(0xc00000, 0xc03fff) AM_READ(SMH_RAM            )   // Sprites Code + X + Attr
2448		/**/AM_RANGE(0xd00000, 0xd00001) AM_READ(SMH_RAM            )   // ? 0x4000
2449		/**/AM_RANGE(0xe00000, 0xe00607) AM_READ(SMH_RAM            )   // Sprites Y
	2195	AM_RANGE(0x600000, 0x60000f) AM_READ(krzybowl_input_r)         // P1
	2196	AM_RANGE(0x8000f0, 0x8000f1) AM_RAM                        // NVRAM
	2197	AM_RANGE(0x800100, 0x8001ff) AM_RAM                        // NVRAM
	2198	AM_RANGE(0xa00000, 0xa03fff) AM_DEVREADWRITE("x1", seta_sound_word_r,seta_sound_word_w)   // Sound
	2199	AM_RANGE(0xb00000, 0xb003ff) AM_RAM AM_BASE(&paletteram16) AM_SIZE(&seta_paletteram_size)   // Palette
	2200	AM_RANGE(0xc00000, 0xc03fff) AM_RAM AM_BASE(&spriteram16_2)      // Sprites Code + X + Attr
	2201	/**/AM_RANGE(0xd00000, 0xd00001) AM_RAM                        // ? 0x4000
	2202	/**/AM_RANGE(0xe00000, 0xe00607) AM_RAM AM_BASE(&spriteram16)      // Sprites Y
2450	2203	ADDRESS_MAP_END
2451	2204
2452		static ADDRESS_MAP_START( krzybowl_writemem, ADDRESS_SPACE_PROGRAM, 16 )
2453		AM_RANGE(0x000000, 0x07ffff) AM_WRITE(SMH_ROM               )   // ROM
2454		AM_RANGE(0xf00000, 0xf0ffff) AM_WRITE(SMH_RAM               )   // RAM
2455		AM_RANGE(0x400000, 0x400001) AM_WRITE(SMH_NOP               )   // ?
2456		AM_RANGE(0x8000f0, 0x8000f1) AM_WRITE(SMH_RAM               )   // NVRAM
2457		AM_RANGE(0x800100, 0x8001ff) AM_WRITE(SMH_RAM               )   // NVRAM
2458		AM_RANGE(0xa00000, 0xa03fff) AM_DEVWRITE("x1", seta_sound_word_w         )   // Sound
2459		AM_RANGE(0xb00000, 0xb003ff) AM_WRITE(SMH_RAM) AM_BASE(&paletteram16   ) AM_SIZE(&seta_paletteram_size)   // Palette
2460		AM_RANGE(0xc00000, 0xc03fff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16_2   )   // Sprites Code + X + Attr
2461		AM_RANGE(0xd00000, 0xd00001) AM_WRITE(SMH_RAM               )   // ? 0x4000
2462		AM_RANGE(0xe00000, 0xe00607) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16   )   // Sprites Y
2463		ADDRESS_MAP_END
2464	2205
2465
2466	2206	/***************************************************************************
2467	2207	Mobile Suit Gundam
2468	2208	***************************************************************************/
r4679	r4680
2480	2220
2481	2221	/* Mirror RAM is necessary or startup, to clear Work RAM after the test */
2482	2222
2483		static ADDRESS_MAP_START( msgundam_readmem, ADDRESS_SPACE_PROGRAM, 16 )
2484		AM_RANGE(0x000000, 0x07ffff) AM_READ(SMH_ROM            )   // ROM
2485		AM_RANGE(0x100000, 0x1fffff) AM_READ(SMH_ROM            )   // ROM
2486		AM_RANGE(0x200000, 0x20ffff) AM_READ(SMH_RAM            )   // RAM
	2223	static ADDRESS_MAP_START( msgundam_map, ADDRESS_SPACE_PROGRAM, 16 )
	2224	AM_RANGE(0x000000, 0x07ffff) AM_ROM                        // ROM
	2225	AM_RANGE(0x100000, 0x1fffff) AM_ROM                        // ROM
	2226	AM_RANGE(0x200000, 0x20ffff) AM_RAM AM_MIRROR(0x70000)         // RAM
2487	2227	AM_RANGE(0x400000, 0x400001) AM_READ_PORT("P1")               // P1
2488	2228	AM_RANGE(0x400002, 0x400003) AM_READ_PORT("P2")               // P2
2489	2229	AM_RANGE(0x400004, 0x400005) AM_READ_PORT("COINS")            // Coins
2490		AM_RANGE(0x600000, 0x600003) AM_READ(seta_dsw_r            )   // DSW
2491		AM_RANGE(0x700400, 0x700fff) AM_READ(SMH_RAM            )   // Palette
2492		AM_RANGE(0x800000, 0x800607) AM_READ(SMH_RAM            )   // Sprites Y
2493		AM_RANGE(0x900000, 0x903fff) AM_READ(SMH_RAM            )   // Sprites Code + X + Attr
2494		AM_RANGE(0xa00000, 0xa03fff) AM_READ(SMH_RAM            )   // VRAM 0&1
2495		AM_RANGE(0xa80000, 0xa83fff) AM_READ(SMH_RAM            )   // VRAM 2&3
2496		AM_RANGE(0xb00000, 0xb00005) AM_READ(SMH_RAM            )   // VRAM 0&1 Ctrl
2497		AM_RANGE(0xb80000, 0xb80005) AM_READ(SMH_RAM            )   // VRAM 1&2 Ctrl
2498		AM_RANGE(0xc00000, 0xc03fff) AM_DEVREAD("x1", seta_sound_word_r      )   // Sound
2499		ADDRESS_MAP_END
2500
2501		static ADDRESS_MAP_START( msgundam_writemem, ADDRESS_SPACE_PROGRAM, 16 )
2502		AM_RANGE(0x000000, 0x07ffff) AM_WRITE(SMH_ROM                  )   // ROM
2503		AM_RANGE(0x100000, 0x1fffff) AM_WRITE(SMH_ROM                  )   // ROM
2504		AM_RANGE(0x200000, 0x20ffff) AM_WRITE(SMH_RAM) AM_BASE(&mirror_ram      )   // RAM
2505		AM_RANGE(0x210000, 0x21ffff) AM_WRITE(mirror_ram_w               )   // Mirrored RAM
2506		AM_RANGE(0x220000, 0x22ffff) AM_WRITE(mirror_ram_w               )
2507		AM_RANGE(0x230000, 0x23ffff) AM_WRITE(mirror_ram_w               )
2508		AM_RANGE(0x240000, 0x24ffff) AM_WRITE(mirror_ram_w               )
2509		AM_RANGE(0x400000, 0x400001) AM_WRITE(SMH_NOP                  )   // Lev 2 IRQ Ack
2510		AM_RANGE(0x400004, 0x400005) AM_WRITE(SMH_NOP                  )   // Lev 4 IRQ Ack
2511		AM_RANGE(0x500000, 0x500005) AM_WRITE(msgundam_vregs_w) AM_BASE(&seta_vregs      )   // Coin Lockout + Video Registers
2512		AM_RANGE(0x700400, 0x700fff) AM_WRITE(SMH_RAM) AM_BASE(&paletteram16   ) AM_SIZE(&seta_paletteram_size)   // Palette
2513		AM_RANGE(0x800000, 0x800607) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16      )   // Sprites Y
2514		AM_RANGE(0x880000, 0x880001) AM_WRITE(SMH_RAM                  )   // ? 0x4000
2515		AM_RANGE(0x900000, 0x903fff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16_2   )   // Sprites Code + X + Attr
2516		AM_RANGE(0xa00000, 0xa03fff) AM_WRITE(seta_vram_0_w) AM_BASE(&seta_vram_0   )   // VRAM 0
2517		AM_RANGE(0xa80000, 0xa83fff) AM_WRITE(seta_vram_2_w) AM_BASE(&seta_vram_2   )   // VRAM 2
2518		AM_RANGE(0xb00000, 0xb00005) AM_WRITE(SMH_RAM) AM_BASE(&seta_vctrl_0      )   // VRAM 0&1 Ctrl
2519		AM_RANGE(0xb80000, 0xb80005) AM_WRITE(SMH_RAM) AM_BASE(&seta_vctrl_2      )   // VRAM 2&3 Ctrl
2520		AM_RANGE(0xc00000, 0xc03fff) AM_DEVWRITE("x1", seta_sound_word_w            )   // Sound
	2230	AM_RANGE(0x400000, 0x400001) AM_WRITENOP                  // Lev 2 IRQ Ack
	2231	AM_RANGE(0x400004, 0x400005) AM_WRITENOP                  // Lev 4 IRQ Ack
	2232	AM_RANGE(0x500000, 0x500005) AM_RAM_WRITE(msgundam_vregs_w) AM_BASE(&seta_vregs)   // Coin Lockout + Video Registers
	2233	AM_RANGE(0x600000, 0x600003) AM_READ(seta_dsw_r)            // DSW
	2234	AM_RANGE(0x700400, 0x700fff) AM_RAM AM_BASE(&paletteram16) AM_SIZE(&seta_paletteram_size)   // Palette
	2235	AM_RANGE(0x800000, 0x800607) AM_RAM AM_BASE(&spriteram16)      // Sprites Y
	2236	AM_RANGE(0x880000, 0x880001) AM_RAM                        // ? 0x4000
	2237	AM_RANGE(0x900000, 0x903fff) AM_RAM AM_BASE(&spriteram16_2)      // Sprites Code + X + Attr
	2238	AM_RANGE(0xa00000, 0xa03fff) AM_RAM_WRITE(seta_vram_0_w) AM_BASE(&seta_vram_0)   // VRAM 0&1
	2239	AM_RANGE(0xa80000, 0xa83fff) AM_RAM_WRITE(seta_vram_2_w) AM_BASE(&seta_vram_2)   // VRAM 2&3
	2240	AM_RANGE(0xb00000, 0xb00005) AM_RAM AM_BASE(&seta_vctrl_0)      // VRAM 0&1 Ctrl
	2241	AM_RANGE(0xb80000, 0xb80005) AM_RAM AM_BASE(&seta_vctrl_2)      // VRAM 2&3 Ctrl
	2242	AM_RANGE(0xc00000, 0xc03fff) AM_DEVREADWRITE("x1", seta_sound_word_r,seta_sound_word_w)   // Sound
2521	2243	#if __uPD71054_TIMER
2522		AM_RANGE(0xd00000, 0xd00007) AM_WRITE(timer_regs_w               )   // ?
	2244	AM_RANGE(0xd00000, 0xd00007) AM_WRITE(timer_regs_w)   // ?
2523	2245	#else
2524		AM_RANGE(0xd00000, 0xd00007) AM_WRITE(SMH_NOP                  )   // ?
	2246	AM_RANGE(0xd00000, 0xd00007) AM_WRITENOP   // ?
2525	2247	#endif
2526	2248	ADDRESS_MAP_END
2527	2249
2528	2250
2529
2530
2531	2251	/***************************************************************************
2532	2252	Oishii Puzzle
2533	2253	***************************************************************************/
2534	2254
2535	2255	/* similar to wrofaero */
2536
2537		static ADDRESS_MAP_START( oisipuzl_readmem, ADDRESS_SPACE_PROGRAM, 16 )
2538		AM_RANGE(0x000000, 0x07ffff) AM_READ(SMH_ROM            )   // ROM
2539		AM_RANGE(0x100000, 0x17ffff) AM_READ(SMH_ROM            )   // ROM
2540		AM_RANGE(0x200000, 0x20ffff) AM_READ(SMH_RAM            )   // RAM
2541		AM_RANGE(0x300000, 0x300003) AM_READ(seta_dsw_r            )   // DSW
	2256	static ADDRESS_MAP_START( oisipuzl_map, ADDRESS_SPACE_PROGRAM, 16 )
	2257	AM_RANGE(0x000000, 0x07ffff) AM_ROM                        // ROM
	2258	AM_RANGE(0x100000, 0x17ffff) AM_ROM                        // ROM
	2259	AM_RANGE(0x200000, 0x20ffff) AM_RAM                        // RAM
	2260	AM_RANGE(0x300000, 0x300003) AM_READ(seta_dsw_r)            // DSW
2542	2261	AM_RANGE(0x400000, 0x400001) AM_READ_PORT("P1")               // P1
2543	2262	AM_RANGE(0x400002, 0x400003) AM_READ_PORT("P2")               // P2
2544	2263	AM_RANGE(0x400004, 0x400005) AM_READ_PORT("COINS")            // Coins
2545		AM_RANGE(0x700000, 0x703fff) AM_DEVREAD("x1", seta_sound_word_r      )   // Sound
2546		AM_RANGE(0x800000, 0x803fff) AM_READ(SMH_RAM            )   // VRAM 0&1
2547		AM_RANGE(0x880000, 0x883fff) AM_READ(SMH_RAM            )   // VRAM 2&3
2548		/**/AM_RANGE(0x900000, 0x900005) AM_READ(SMH_RAM            )   // VRAM 0&1 Ctrl
2549		/**/AM_RANGE(0x980000, 0x980005) AM_READ(SMH_RAM            )   // VRAM 2&3 Ctrl
2550		/**/AM_RANGE(0xa00000, 0xa00607) AM_READ(SMH_RAM            )   // Sprites Y
2551		/**/AM_RANGE(0xa80000, 0xa80001) AM_READ(SMH_RAM            )   // ? 0x4000
2552		AM_RANGE(0xb00000, 0xb03fff) AM_READ(SMH_RAM            )   // Sprites Code + X + Attr
2553		AM_RANGE(0xc00400, 0xc00fff) AM_READ(SMH_RAM            )   // Palette
	2264	AM_RANGE(0x400000, 0x400001) AM_WRITENOP                  // ? IRQ Ack
	2265	AM_RANGE(0x500000, 0x500005) AM_RAM_WRITE(seta_vregs_w) AM_BASE(&seta_vregs)   // Coin Lockout + Video Registers
	2266	AM_RANGE(0x700000, 0x703fff) AM_DEVREADWRITE("x1", seta_sound_word_r,seta_sound_word_w)   // Sound
	2267	AM_RANGE(0x800000, 0x803fff) AM_RAM_WRITE(seta_vram_0_w) AM_BASE(&seta_vram_0)   // VRAM 0&1
	2268	AM_RANGE(0x880000, 0x883fff) AM_RAM_WRITE(seta_vram_2_w) AM_BASE(&seta_vram_2)   // VRAM 2&3
	2269	/**/AM_RANGE(0x900000, 0x900005) AM_RAM AM_BASE(&seta_vctrl_0)      // VRAM 0&1 Ctrl
	2270	/**/AM_RANGE(0x980000, 0x980005) AM_RAM AM_BASE(&seta_vctrl_2)      // VRAM 2&3 Ctrl
	2271	/**/AM_RANGE(0xa00000, 0xa00607) AM_RAM AM_BASE(&spriteram16)      // Sprites Y
	2272	/**/AM_RANGE(0xa80000, 0xa80001) AM_RAM                      // ? 0x4000
	2273	AM_RANGE(0xb00000, 0xb03fff) AM_RAM AM_BASE(&spriteram16_2)      // Sprites Code + X + Attr
	2274	AM_RANGE(0xc00400, 0xc00fff) AM_RAM AM_BASE(&paletteram16) AM_SIZE(&seta_paletteram_size)   // Palette
2554	2275	ADDRESS_MAP_END
2555	2276
2556		static ADDRESS_MAP_START( oisipuzl_writemem, ADDRESS_SPACE_PROGRAM, 16 )
2557		AM_RANGE(0x000000, 0x07ffff) AM_WRITE(SMH_ROM                  )   // ROM
2558		AM_RANGE(0x100000, 0x17ffff) AM_WRITE(SMH_ROM                  )   // ROM
2559		AM_RANGE(0x200000, 0x20ffff) AM_WRITE(SMH_RAM                  )   // RAM
2560		AM_RANGE(0x400000, 0x400001) AM_WRITE(SMH_NOP                  )   // ? IRQ Ack
2561		AM_RANGE(0x500000, 0x500005) AM_WRITE(seta_vregs_w) AM_BASE(&seta_vregs      )   // Coin Lockout + Video Registers
2562		AM_RANGE(0x700000, 0x703fff) AM_DEVWRITE("x1", seta_sound_word_w            )   // Sound
2563		AM_RANGE(0x800000, 0x803fff) AM_WRITE(seta_vram_0_w) AM_BASE(&seta_vram_0   )   // VRAM 0
2564		AM_RANGE(0x880000, 0x883fff) AM_WRITE(seta_vram_2_w) AM_BASE(&seta_vram_2   )   // VRAM 2
2565		AM_RANGE(0x900000, 0x900005) AM_WRITE(SMH_RAM) AM_BASE(&seta_vctrl_0      )   // VRAM 0&1 Ctrl
2566		AM_RANGE(0x980000, 0x980005) AM_WRITE(SMH_RAM) AM_BASE(&seta_vctrl_2      )   // VRAM 2&3 Ctrl
2567		AM_RANGE(0xa00000, 0xa00607) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16      )   // Sprites Y
2568		AM_RANGE(0xa80000, 0xa80001) AM_WRITE(SMH_RAM                  )   // ? 0x4000
2569		AM_RANGE(0xb00000, 0xb03fff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16_2      )   // Sprites Code + X + Attr
2570		AM_RANGE(0xc00400, 0xc00fff) AM_WRITE(SMH_RAM) AM_BASE(&paletteram16   ) AM_SIZE(&seta_paletteram_size)   // Palette
2571		ADDRESS_MAP_END
2572	2277
2573	2278	/***************************************************************************
2574	2279	Triple Fun
2575	2280	***************************************************************************/
2576	2281
2577		/* the same as oisipuzl with the sound system replaced */
	2282	/* Same as oisipuzl but with the sound system replaced */
2578	2283
2579		static ADDRESS_MAP_START( triplfun_readmem, ADDRESS_SPACE_PROGRAM, 16 )
2580		AM_RANGE(0x000000, 0x07ffff) AM_READ(SMH_ROM            )   // ROM
2581		AM_RANGE(0x100000, 0x17ffff) AM_READ(SMH_ROM            )   // ROM
2582		AM_RANGE(0x200000, 0x20ffff) AM_READ(SMH_RAM            )   // RAM
2583		AM_RANGE(0x300000, 0x300003) AM_READ(seta_dsw_r            )   // DSW
	2284	static ADDRESS_MAP_START( triplfun_map, ADDRESS_SPACE_PROGRAM, 16 )
	2285	AM_RANGE(0x000000, 0x07ffff) AM_ROM                        // ROM
	2286	AM_RANGE(0x100000, 0x17ffff) AM_ROM                        // ROM
	2287	AM_RANGE(0x200000, 0x20ffff) AM_RAM                        // RAM
	2288	AM_RANGE(0x300000, 0x300003) AM_READ(seta_dsw_r)            // DSW
2584	2289	AM_RANGE(0x400000, 0x400001) AM_READ_PORT("P1")               // P1
2585	2290	AM_RANGE(0x400002, 0x400003) AM_READ_PORT("P2")               // P2
2586	2291	AM_RANGE(0x400004, 0x400005) AM_READ_PORT("COINS")            // Coins
2587		AM_RANGE(0x500006, 0x500007) AM_DEVREAD8("oki", okim6295_r, 0x00ff) // tfun sound
2588		AM_RANGE(0x700000, 0x703fff) AM_READ(SMH_RAM            )   // old sound
2589		AM_RANGE(0x800000, 0x803fff) AM_READ(SMH_RAM            )   // VRAM 0&1
2590		AM_RANGE(0x880000, 0x883fff) AM_READ(SMH_RAM            )   // VRAM 2&3
2591		/**/AM_RANGE(0x900000, 0x900005) AM_READ(SMH_RAM            )   // VRAM 0&1 Ctrl
2592		/**/AM_RANGE(0x980000, 0x980005) AM_READ(SMH_RAM            )   // VRAM 2&3 Ctrl
2593		/**/AM_RANGE(0xa00000, 0xa00607) AM_READ(SMH_RAM            )   // Sprites Y
2594		/**/AM_RANGE(0xa80000, 0xa80001) AM_READ(SMH_RAM            )   // ? 0x4000
2595		AM_RANGE(0xb00000, 0xb03fff) AM_READ(SMH_RAM            )   // Sprites Code + X + Attr
2596		AM_RANGE(0xc00400, 0xc00fff) AM_READ(SMH_RAM            )   // Palette
	2292	AM_RANGE(0x400000, 0x400001) AM_WRITENOP                  // ? IRQ Ack
	2293	AM_RANGE(0x500000, 0x500005) AM_RAM_WRITE(seta_vregs_w) AM_BASE(&seta_vregs)   // Coin Lockout + Video Registers
	2294	AM_RANGE(0x500006, 0x500007) AM_DEVREADWRITE8("oki", okim6295_r,okim6295_w, 0x00ff) // tfun sound
	2295	AM_RANGE(0x800000, 0x803fff) AM_RAM_WRITE(seta_vram_0_w) AM_BASE(&seta_vram_0)   // VRAM 0&1
	2296	AM_RANGE(0x880000, 0x883fff) AM_RAM_WRITE(seta_vram_2_w) AM_BASE(&seta_vram_2)   // VRAM 2&3
	2297	/**/AM_RANGE(0x900000, 0x900005) AM_RAM AM_BASE(&seta_vctrl_0)      // VRAM 0&1 Ctrl
	2298	/**/AM_RANGE(0x980000, 0x980005) AM_RAM AM_BASE(&seta_vctrl_2)      // VRAM 2&3 Ctrl
	2299	/**/AM_RANGE(0xa00000, 0xa00607) AM_RAM AM_BASE(&spriteram16)      // Sprites Y
	2300	/**/AM_RANGE(0xa80000, 0xa80001) AM_RAM                      // ? 0x4000
	2301	AM_RANGE(0xb00000, 0xb03fff) AM_RAM AM_BASE(&spriteram16_2)      // Sprites Code + X + Attr
	2302	AM_RANGE(0xc00400, 0xc00fff) AM_RAM AM_BASE(&paletteram16) AM_SIZE(&seta_paletteram_size)   // Palette
2597	2303	ADDRESS_MAP_END
2598	2304
2599		static ADDRESS_MAP_START( triplfun_writemem, ADDRESS_SPACE_PROGRAM, 16 )
2600		AM_RANGE(0x000000, 0x07ffff) AM_WRITE(SMH_ROM                  )   // ROM
2601		AM_RANGE(0x100000, 0x17ffff) AM_WRITE(SMH_ROM                  )   // ROM
2602		AM_RANGE(0x200000, 0x20ffff) AM_WRITE(SMH_RAM                  )   // RAM
2603		AM_RANGE(0x400000, 0x400001) AM_WRITE(SMH_NOP                  )   // ? IRQ Ack
2604		AM_RANGE(0x500000, 0x500005) AM_WRITE(seta_vregs_w) AM_BASE(&seta_vregs      )   // Coin Lockout + Video Registers
2605		AM_RANGE(0x500006, 0x500007) AM_DEVWRITE8("oki", okim6295_w, 0x00ff)  // tfun sound
2606		AM_RANGE(0x700000, 0x703fff) AM_WRITE(SMH_RAM                  )   // old sound
2607		AM_RANGE(0x800000, 0x803fff) AM_WRITE(seta_vram_0_w) AM_BASE(&seta_vram_0   )   // VRAM 0
2608		AM_RANGE(0x880000, 0x883fff) AM_WRITE(seta_vram_2_w) AM_BASE(&seta_vram_2   )   // VRAM 2
2609		AM_RANGE(0x900000, 0x900005) AM_WRITE(SMH_RAM) AM_BASE(&seta_vctrl_0      )   // VRAM 0&1 Ctrl
2610		AM_RANGE(0x980000, 0x980005) AM_WRITE(SMH_RAM) AM_BASE(&seta_vctrl_2      )   // VRAM 2&3 Ctrl
2611		AM_RANGE(0xa00000, 0xa00607) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16      )   // Sprites Y
2612		AM_RANGE(0xa80000, 0xa80001) AM_WRITE(SMH_RAM                  )   // ? 0x4000
2613		AM_RANGE(0xb00000, 0xb03fff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16_2      )   // Sprites Code + X + Attr
2614		AM_RANGE(0xc00400, 0xc00fff) AM_WRITE(SMH_RAM) AM_BASE(&paletteram16   ) AM_SIZE(&seta_paletteram_size)   // Palette
2615		ADDRESS_MAP_END
2616	2305
2617	2306	/***************************************************************************
2618	2307	Pro Mahjong Kiwame
r4679	r4680
2653	2342	}
2654	2343	}
2655	2344
2656		static ADDRESS_MAP_START( kiwame_readmem, ADDRESS_SPACE_PROGRAM, 16 )
2657		AM_RANGE(0x000000, 0x07ffff) AM_READ(SMH_ROM            )   // ROM
2658		AM_RANGE(0x200000, 0x20ffff) AM_READ(SMH_RAM            )   // RAM
2659		AM_RANGE(0xfffc00, 0xffffff) AM_READ(kiwame_nvram_r         )   // NVRAM + Regs ?
2660		AM_RANGE(0x800000, 0x803fff) AM_READ(SMH_RAM            )   // Sprites Code + X + Attr
2661		/**/AM_RANGE(0x900000, 0x900001) AM_READ(SMH_RAM            )   // ? 0x4000
2662		/**/AM_RANGE(0xa00000, 0xa00607) AM_READ(SMH_RAM            )   // Sprites Y
2663		AM_RANGE(0xb00000, 0xb003ff) AM_READ(SMH_RAM            )   // Palette
2664		AM_RANGE(0xc00000, 0xc03fff) AM_DEVREAD("x1", seta_sound_word_r      )   // Sound
2665		AM_RANGE(0xd00000, 0xd00009) AM_READ(kiwame_input_r         )
2666		AM_RANGE(0xe00000, 0xe00003) AM_READ(seta_dsw_r            )   // DSW
	2345	static ADDRESS_MAP_START( kiwame_map, ADDRESS_SPACE_PROGRAM, 16 )
	2346	AM_RANGE(0x000000, 0x07ffff) AM_ROM                        // ROM
	2347	AM_RANGE(0x200000, 0x20ffff) AM_RAM                        // RAM
	2348	AM_RANGE(0xfffc00, 0xffffff) AM_READWRITE(kiwame_nvram_r,kiwame_nvram_w) AM_BASE(&kiwame_nvram)   // NVRAM + Regs ?
	2349	AM_RANGE(0x800000, 0x803fff) AM_RAM AM_BASE(&spriteram16_2)      // Sprites Code + X + Attr
	2350	/**/AM_RANGE(0x900000, 0x900001) AM_RAM                        // ? 0x4000
	2351	/**/AM_RANGE(0xa00000, 0xa00607) AM_RAM AM_BASE(&spriteram16)      // Sprites Y
	2352	AM_RANGE(0xb00000, 0xb003ff) AM_RAM AM_BASE(&paletteram16) AM_SIZE(&seta_paletteram_size)   // Palette
	2353	AM_RANGE(0xc00000, 0xc03fff) AM_DEVREADWRITE("x1", seta_sound_word_r,seta_sound_word_w)   // Sound
	2354	AM_RANGE(0xd00000, 0xd00009) AM_READ(kiwame_input_r)         // mahjong panel
	2355	AM_RANGE(0xe00000, 0xe00003) AM_READ(seta_dsw_r)            // DSW
2667	2356	ADDRESS_MAP_END
2668	2357
2669		static ADDRESS_MAP_START( kiwame_writemem, ADDRESS_SPACE_PROGRAM, 16 )
2670		AM_RANGE(0x000000, 0x07ffff) AM_WRITE(SMH_ROM                  )   // ROM
2671		AM_RANGE(0x200000, 0x20ffff) AM_WRITE(SMH_RAM                  )   // RAM
2672		AM_RANGE(0xfffc00, 0xffffff) AM_WRITE(kiwame_nvram_w) AM_BASE(&kiwame_nvram   )   // NVRAM + Regs ?
2673		AM_RANGE(0x800000, 0x803fff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16_2      )   // Sprites Code + X + Attr
2674		AM_RANGE(0x900000, 0x900001) AM_WRITE(SMH_RAM                  )   // ? 0x4000
2675		AM_RANGE(0xa00000, 0xa00607) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16      )   // Sprites Y
2676		AM_RANGE(0xb00000, 0xb003ff) AM_WRITE(SMH_RAM) AM_BASE(&paletteram16   ) AM_SIZE(&seta_paletteram_size)   // Palette
2677		AM_RANGE(0xc00000, 0xc03fff) AM_DEVWRITE("x1", seta_sound_word_w            )   // Sound
2678		ADDRESS_MAP_END
2679	2358
2680
2681	2359	/***************************************************************************
2682	2360	Thunder & Lightning / Wit's
2683	2361	***************************************************************************/
r4679	r4680
2694	2372
2695	2373	/* Similar to downtown etc. */
2696	2374
2697		static ADDRESS_MAP_START( thunderl_readmem, ADDRESS_SPACE_PROGRAM, 16 )
2698		AM_RANGE(0x000000, 0x00ffff) AM_READ(SMH_ROM            )   // ROM
2699		AM_RANGE(0xffc000, 0xffffff) AM_READ(SMH_RAM            )   // RAM
2700		AM_RANGE(0x100000, 0x103fff) AM_DEVREAD("x1", seta_sound_word_r      )   // Sound
2701		AM_RANGE(0x600000, 0x600003) AM_READ(seta_dsw_r            )   // DSW
2702		AM_RANGE(0x700000, 0x7003ff) AM_READ(SMH_RAM            )   // Palette
	2375	static ADDRESS_MAP_START( thunderl_map, ADDRESS_SPACE_PROGRAM, 16 )
	2376	AM_RANGE(0x000000, 0x00ffff) AM_ROM                        // ROM
	2377	AM_RANGE(0xffc000, 0xffffff) AM_RAM                        // RAM
	2378	AM_RANGE(0x100000, 0x103fff) AM_DEVREADWRITE("x1", seta_sound_word_r,seta_sound_word_w)   // Sound
	2379	AM_RANGE(0x200000, 0x200001) AM_WRITENOP                  // ?
	2380	AM_RANGE(0x300000, 0x300001) AM_WRITENOP                  // ?
	2381	AM_RANGE(0x400000, 0x40ffff) AM_WRITE(thunderl_protection_w)   // Protection (not in wits)
	2382	AM_RANGE(0x500000, 0x500001) AM_RAM_WRITE(seta_vregs_w) AM_BASE(&seta_vregs   )   // Coin Lockout
	2383	AM_RANGE(0x600000, 0x600003) AM_READ(seta_dsw_r)            // DSW
	2384	AM_RANGE(0x700000, 0x7003ff) AM_RAM AM_BASE(&paletteram16) AM_SIZE(&seta_paletteram_size)   // Palette
2703	2385	AM_RANGE(0xb00000, 0xb00001) AM_READ_PORT("P1")               // P1
2704	2386	AM_RANGE(0xb00002, 0xb00003) AM_READ_PORT("P2")               // P2
2705	2387	AM_RANGE(0xb00004, 0xb00005) AM_READ_PORT("COINS")            // Coins
2706	2388	AM_RANGE(0xb0000c, 0xb0000d) AM_READ(thunderl_protection_r   )   // Protection (not in wits)
2707	2389	AM_RANGE(0xb00008, 0xb00009) AM_READ_PORT("P3")               // P3 (wits)
2708	2390	AM_RANGE(0xb0000a, 0xb0000b) AM_READ_PORT("P4")               // P4 (wits)
2709		/**/AM_RANGE(0xc00000, 0xc00001) AM_READ(SMH_RAM            )   // ? 0x4000
2710		/**/AM_RANGE(0xd00000, 0xd00607) AM_READ(SMH_RAM            )   // Sprites Y
2711		AM_RANGE(0xe00000, 0xe03fff) AM_READ(SMH_RAM            )   // Sprites Code + X + Attr
2712		AM_RANGE(0xe04000, 0xe07fff) AM_READ(SMH_RAM            )   // (wits)
	2391	/**/AM_RANGE(0xc00000, 0xc00001) AM_RAM                        // ? 0x4000
	2392	/**/AM_RANGE(0xd00000, 0xd00607) AM_RAM AM_BASE(&spriteram16)      // Sprites Y
	2393	AM_RANGE(0xe00000, 0xe03fff) AM_RAM AM_BASE(&spriteram16_2)      // Sprites Code + X + Attr
	2394	AM_RANGE(0xe04000, 0xe07fff) AM_RAM                        // (wits)
2713	2395	ADDRESS_MAP_END
2714	2396
2715		static ADDRESS_MAP_START( thunderl_writemem, ADDRESS_SPACE_PROGRAM, 16 )
2716		AM_RANGE(0x000000, 0x00ffff) AM_WRITE(SMH_ROM               )   // ROM
2717		AM_RANGE(0xffc000, 0xffffff) AM_WRITE(SMH_RAM               )   // RAM
2718		AM_RANGE(0x100000, 0x103fff) AM_DEVWRITE("x1", seta_sound_word_w         )   // Sound
2719		AM_RANGE(0x200000, 0x200001) AM_WRITE(SMH_NOP               )   // ?
2720		AM_RANGE(0x300000, 0x300001) AM_WRITE(SMH_NOP               )   // ?
2721		AM_RANGE(0x400000, 0x40ffff) AM_WRITE(thunderl_protection_w      )   // Protection (not in wits)
2722		AM_RANGE(0x500000, 0x500001) AM_WRITE(seta_vregs_w) AM_BASE(&seta_vregs   )   // Coin Lockout
2723		AM_RANGE(0x700000, 0x7003ff) AM_WRITE(SMH_RAM) AM_BASE(&paletteram16   ) AM_SIZE(&seta_paletteram_size)   // Palette
2724		AM_RANGE(0xc00000, 0xc00001) AM_WRITE(SMH_RAM               )   // ? 0x4000
2725		AM_RANGE(0xd00000, 0xd00607) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16   )   // Sprites Y
2726		AM_RANGE(0xe00000, 0xe03fff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16_2   )   // Sprites Code + X + Attr
2727		AM_RANGE(0xe04000, 0xe07fff) AM_WRITE(SMH_RAM               )   // (wits)
2728		ADDRESS_MAP_END
2729	2397
2730	2398	/***************************************************************************
2731	2399	Wiggie Waggie
r4679	r4680
2741	2409	static WRITE16_HANDLER( wiggie_soundlatch_w )
2742	2410	{
2743	2411	wiggie_soundlatch = data >> 8;
2744		cpu_set_input_line(space->machine->cpu[1],0, HOLD_LINE);
	2412	cputag_set_input_line(space->machine, "audiocpu", 0, HOLD_LINE);
2745	2413	}
2746	2414
2747	2415
2748		static ADDRESS_MAP_START( wiggie_readmem, ADDRESS_SPACE_PROGRAM, 16 )
2749		AM_RANGE(0x000000, 0x00ffff) AM_READ(SMH_ROM            )   // ROM
2750		AM_RANGE(0xffc000, 0xffffff) AM_READ(SMH_RAM            )   // RAM
2751		AM_RANGE(0x600000, 0x600003) AM_READ(seta_dsw_r            )   // DSW
2752		AM_RANGE(0x700000, 0x7003ff) AM_READ(SMH_RAM            )   // Palette
	2416	static ADDRESS_MAP_START( wiggie_map, ADDRESS_SPACE_PROGRAM, 16 )
	2417	AM_RANGE(0x000000, 0x01ffff) AM_ROM                        // ROM
	2418	AM_RANGE(0xffc000, 0xffffff) AM_RAM                        // RAM
	2419	AM_RANGE(0x200000, 0x200001) AM_WRITENOP                  // ?
	2420	AM_RANGE(0x300000, 0x300001) AM_WRITENOP                  // ?
	2421	AM_RANGE(0x400000, 0x40ffff) AM_WRITE(thunderl_protection_w)   // Protection (not in wits)
	2422	AM_RANGE(0x500000, 0x500001) AM_RAM_WRITE(seta_vregs_w) AM_BASE(&seta_vregs)   // Coin Lockout
	2423	AM_RANGE(0x600000, 0x600003) AM_READ(seta_dsw_r)            // DSW
	2424	AM_RANGE(0x700000, 0x7003ff) AM_RAM AM_BASE(&paletteram16) AM_SIZE(&seta_paletteram_size)   // Palette
2753	2425	AM_RANGE(0xb00000, 0xb00001) AM_READ_PORT("P1")               // P1
2754	2426	AM_RANGE(0xb00002, 0xb00003) AM_READ_PORT("P2")               // P2
2755	2427	AM_RANGE(0xb00004, 0xb00005) AM_READ_PORT("COINS")            // Coins
2756		AM_RANGE(0xb0000c, 0xb0000d) AM_READ(thunderl_protection_r   )   // Protection (not in wits)
	2428	AM_RANGE(0xb0000c, 0xb0000d) AM_READ(thunderl_protection_r)      // Protection (not in wits)
2757	2429	AM_RANGE(0xb00008, 0xb00009) AM_READ_PORT("P3")               // P3 (wits)
2758	2430	AM_RANGE(0xb0000a, 0xb0000b) AM_READ_PORT("P4")               // P4 (wits)
2759		/**/AM_RANGE(0xc00000, 0xc00001) AM_READ(SMH_RAM            )   // ? 0x4000
2760		/**/AM_RANGE(0xd00000, 0xd00607) AM_READ(SMH_RAM            )   // Sprites Y
2761		AM_RANGE(0xe00000, 0xe03fff) AM_READ(SMH_RAM            )   // Sprites Code + X + Attr
2762		AM_RANGE(0xe04000, 0xe07fff) AM_READ(SMH_RAM            )   // (wits)
	2431	/**/AM_RANGE(0xc00000, 0xc00001) AM_RAM                        // ? 0x4000
	2432	/**/AM_RANGE(0xd00000, 0xd00607) AM_RAM AM_BASE(&spriteram16)      // Sprites Y
	2433	AM_RANGE(0xe00000, 0xe03fff) AM_RAM AM_BASE(&spriteram16_2)      // Sprites Code + X + Attr
	2434	AM_RANGE(0xe04000, 0xe07fff) AM_RAM   // (wits)
2763	2435	ADDRESS_MAP_END
2764	2436
2765		static ADDRESS_MAP_START( wiggie_writemem, ADDRESS_SPACE_PROGRAM, 16 )
2766		AM_RANGE(0x000000, 0x00ffff) AM_WRITE(SMH_ROM               )   // ROM
2767		AM_RANGE(0xffc000, 0xffffff) AM_WRITE(SMH_RAM               )   // RAM
2768		AM_RANGE(0x200000, 0x200001) AM_WRITE(SMH_NOP               )   // ?
2769		AM_RANGE(0x300000, 0x300001) AM_WRITE(SMH_NOP               )   // ?
2770		AM_RANGE(0x400000, 0x40ffff) AM_WRITE(thunderl_protection_w      )   // Protection (not in wits)
2771		AM_RANGE(0x500000, 0x500001) AM_WRITE(seta_vregs_w) AM_BASE(&seta_vregs   )   // Coin Lockout
2772		AM_RANGE(0x700000, 0x7003ff) AM_WRITE(SMH_RAM) AM_BASE(&paletteram16   ) AM_SIZE(&seta_paletteram_size)   // Palette
2773		AM_RANGE(0xc00000, 0xc00001) AM_WRITE(SMH_RAM               )   // ? 0x4000
2774		AM_RANGE(0xd00000, 0xd00607) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16   )   // Sprites Y
2775		AM_RANGE(0xe00000, 0xe03fff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16_2   )   // Sprites Code + X + Attr
2776		AM_RANGE(0xe04000, 0xe07fff) AM_WRITE(SMH_RAM               )   // (wits)
2777		ADDRESS_MAP_END
2778
2779		static ADDRESS_MAP_START( wiggie_sound_readmem, ADDRESS_SPACE_PROGRAM, 8 )
2780		AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM)
2781		AM_RANGE(0x8000, 0x87ff) AM_READ(SMH_RAM)
2782		AM_RANGE(0x9800, 0x9800) AM_DEVREAD("oki", okim6295_r)
	2437	static ADDRESS_MAP_START( wiggie_sound_map, ADDRESS_SPACE_PROGRAM, 8 )
	2438	AM_RANGE(0x0000, 0x7fff) AM_ROM
	2439	AM_RANGE(0x8000, 0x87ff) AM_RAM
	2440	AM_RANGE(0x9800, 0x9800) AM_DEVREADWRITE("oki", okim6295_r,okim6295_w)
2783	2441	AM_RANGE(0xa000, 0xa000) AM_READ(wiggie_soundlatch_r)
2784	2442	ADDRESS_MAP_END
2785	2443
2786		static ADDRESS_MAP_START( wiggie_sound_writemem, ADDRESS_SPACE_PROGRAM, 8 )
2787		AM_RANGE(0x0000, 0x7fff) AM_WRITE(SMH_ROM)
2788		AM_RANGE(0x8000, 0x87ff) AM_WRITE(SMH_RAM)
2789		AM_RANGE(0x9800, 0x9800) AM_DEVWRITE("oki", okim6295_w)
2790		ADDRESS_MAP_END
2791	2444
2792	2445	/***************************************************************************
2793	2446	Ultraman Club / SD Gundam Neo Battling
2794	2447	***************************************************************************/
2795	2448
2796		static ADDRESS_MAP_START( umanclub_readmem, ADDRESS_SPACE_PROGRAM, 16 )
2797		AM_RANGE(0x000000, 0x03ffff) AM_READ(SMH_ROM            )   // ROM
2798		AM_RANGE(0x200000, 0x20ffff) AM_READ(SMH_RAM            )   // RAM
2799		AM_RANGE(0x300000, 0x3003ff) AM_READ(SMH_RAM            )   // Palette
2800		AM_RANGE(0x300400, 0x300fff) AM_READ(SMH_RAM            )   //
	2449	static ADDRESS_MAP_START( umanclub_map, ADDRESS_SPACE_PROGRAM, 16 )
	2450	AM_RANGE(0x000000, 0x03ffff) AM_ROM                        // ROM
	2451	AM_RANGE(0x200000, 0x20ffff) AM_RAM                        // RAM
	2452	AM_RANGE(0x300000, 0x3003ff) AM_RAM AM_BASE(&paletteram16) AM_SIZE(&seta_paletteram_size)   // Palette
	2453	AM_RANGE(0x300400, 0x300fff) AM_RAM                        //
2801	2454	AM_RANGE(0x400000, 0x400001) AM_READ_PORT("P1")               // P1
2802	2455	AM_RANGE(0x400002, 0x400003) AM_READ_PORT("P2")               // P2
2803	2456	AM_RANGE(0x400004, 0x400005) AM_READ_PORT("COINS")            // Coins
2804		AM_RANGE(0x600000, 0x600003) AM_READ(seta_dsw_r            )   // DSW
2805		AM_RANGE(0xa00000, 0xa00607) AM_READ(SMH_RAM            )   // Sprites Y
2806		/**/AM_RANGE(0xa80000, 0xa80001) AM_READ(SMH_RAM            )   // ? 0x4000
2807		AM_RANGE(0xb00000, 0xb03fff) AM_READ(SMH_RAM            )   // Sprites Code + X + Attr
2808		AM_RANGE(0xc00000, 0xc03fff) AM_DEVREAD("x1", seta_sound_word_r      )   // Sound
	2457	AM_RANGE(0x400000, 0x400001) AM_WRITENOP                  // ? (end of lev 2)
	2458	AM_RANGE(0x400004, 0x400005) AM_WRITENOP                  // ? (end of lev 2)
	2459	AM_RANGE(0x500000, 0x500001) AM_RAM_WRITE(seta_vregs_w) AM_BASE(&seta_vregs   )   // Coin Lockout + Video Registers
	2460	AM_RANGE(0x600000, 0x600003) AM_READ(seta_dsw_r)            // DSW
	2461	AM_RANGE(0xa00000, 0xa00607) AM_RAM AM_BASE(&spriteram16)      // Sprites Y
	2462	/**/AM_RANGE(0xa80000, 0xa80001) AM_RAM                        // ? 0x4000
	2463	AM_RANGE(0xb00000, 0xb03fff) AM_RAM AM_BASE(&spriteram16_2)      // Sprites Code + X + Attr
	2464	AM_RANGE(0xc00000, 0xc03fff) AM_DEVREADWRITE("x1", seta_sound_word_r,seta_sound_word_w)   // Sound
2809	2465	ADDRESS_MAP_END
2810	2466
2811		static ADDRESS_MAP_START( umanclub_writemem, ADDRESS_SPACE_PROGRAM, 16 )
2812		AM_RANGE(0x000000, 0x03ffff) AM_WRITE(SMH_ROM               )   // ROM
2813		AM_RANGE(0x200000, 0x20ffff) AM_WRITE(SMH_RAM               )   // RAM
2814		AM_RANGE(0x300000, 0x3003ff) AM_WRITE(SMH_RAM) AM_BASE(&paletteram16   ) AM_SIZE(&seta_paletteram_size)   // Palette
2815		AM_RANGE(0x300400, 0x300fff) AM_WRITE(SMH_RAM               )   //
2816		AM_RANGE(0x400000, 0x400001) AM_WRITE(SMH_NOP               )   // ? (end of lev 2)
2817		AM_RANGE(0x400004, 0x400005) AM_WRITE(SMH_NOP               )   // ? (end of lev 2)
2818		AM_RANGE(0x500000, 0x500001) AM_WRITE(seta_vregs_w) AM_BASE(&seta_vregs   )   // Coin Lockout + Video Registers
2819		AM_RANGE(0xa00000, 0xa00607) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16   )   // Sprites Y
2820		AM_RANGE(0xa80000, 0xa80001) AM_WRITE(SMH_RAM               )   // ? 0x4000
2821		AM_RANGE(0xb00000, 0xb03fff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16_2   )   // Sprites Code + X + Attr
2822		AM_RANGE(0xc00000, 0xc03fff) AM_DEVWRITE("x1", seta_sound_word_w         )   // Sound
2823		ADDRESS_MAP_END
2824	2467
2825	2468	/***************************************************************************
2826	2469	Ultra Toukond Densetsu
r4679	r4680
2830	2473	{
2831	2474	if (ACCESSING_BITS_0_7)
2832	2475	{
2833		cpu_set_input_line(space->machine->cpu[1],0,HOLD_LINE);
2834		soundlatch_w(space,0,data & 0xff);
	2476	cputag_set_input_line(space->machine, "audiocpu", 0, HOLD_LINE);
	2477	soundlatch_w(space, 0, data & 0xff);
2835	2478	}
2836	2479	}
2837	2480
2838		static ADDRESS_MAP_START( utoukond_readmem, ADDRESS_SPACE_PROGRAM, 16 )
2839		AM_RANGE(0x000000, 0x0fffff) AM_READ(SMH_ROM            )   // ROM
2840		AM_RANGE(0x200000, 0x20ffff) AM_READ(SMH_RAM            )   // ROM
	2481	static ADDRESS_MAP_START( utoukond_map, ADDRESS_SPACE_PROGRAM, 16 )
	2482	AM_RANGE(0x000000, 0x0fffff) AM_ROM                        // ROM
	2483	AM_RANGE(0x200000, 0x20ffff) AM_RAM                        // RAM
2841	2484	AM_RANGE(0x400000, 0x400001) AM_READ_PORT("P1")               // P1
2842	2485	AM_RANGE(0x400002, 0x400003) AM_READ_PORT("P2")               // P2
2843	2486	AM_RANGE(0x400004, 0x400005) AM_READ_PORT("COINS")            // Coins
2844		AM_RANGE(0x600000, 0x600003) AM_READ(seta_dsw_r            )   // DSW
2845		AM_RANGE(0x700400, 0x700fff) AM_READ(SMH_RAM            )   // Palette
2846		AM_RANGE(0x800000, 0x801fff) AM_READ(SMH_RAM            )   // VRAM 0
2847		AM_RANGE(0x802000, 0x803fff) AM_READ(SMH_RAM            )   // VRAM 1
2848		AM_RANGE(0x880000, 0x881fff) AM_READ(SMH_RAM            )   // VRAM 2
2849		AM_RANGE(0x882000, 0x883fff) AM_READ(SMH_RAM            )   // VRAM 3
2850		AM_RANGE(0xa00000, 0xa00607) AM_READ(SMH_RAM             )   // Sprites Y
2851		AM_RANGE(0xb00000, 0xb03fff) AM_READ(SMH_RAM            )   // Sprites Code + X + Attr
	2487	AM_RANGE(0x500000, 0x500005) AM_RAM_WRITE(seta_vregs_w) AM_BASE(&seta_vregs)   // ? Coin Lockout + Video Registers
	2488	AM_RANGE(0x600000, 0x600003) AM_READ(seta_dsw_r)            // DSW
	2489	AM_RANGE(0x700400, 0x700fff) AM_RAM   AM_BASE(&paletteram16) AM_SIZE(&seta_paletteram_size)   // Palette
	2490	AM_RANGE(0x800000, 0x803fff) AM_RAM_WRITE(seta_vram_0_w) AM_BASE(&seta_vram_0)   // VRAM 0&1
	2491	AM_RANGE(0x880000, 0x883fff) AM_RAM_WRITE(seta_vram_2_w) AM_BASE(&seta_vram_2)   // VRAM 2&3
	2492	AM_RANGE(0x900000, 0x900005) AM_WRITEONLY AM_BASE(&seta_vctrl_0)// VRAM 0&1 Ctrl
	2493	AM_RANGE(0x980000, 0x980005) AM_WRITEONLY AM_BASE(&seta_vctrl_2)// VRAM 2&3 Ctrl
	2494	AM_RANGE(0xa00000, 0xa00607) AM_RAM AM_BASE(&spriteram16)      // Sprites Y
	2495	AM_RANGE(0xb00000, 0xb03fff) AM_RAM AM_BASE(&spriteram16_2)      // Sprites Code + X + Attr
	2496	AM_RANGE(0xc00000, 0xc00001) AM_WRITE(utoukond_soundlatch_w)   // To Sound CPU (cause an IRQ)
	2497	AM_RANGE(0xe00000, 0xe00001) AM_WRITENOP                  // ? ack
2852	2498	ADDRESS_MAP_END
2853	2499
2854		static ADDRESS_MAP_START( utoukond_writemem, ADDRESS_SPACE_PROGRAM, 16 )
2855		AM_RANGE(0x000000, 0x0fffff) AM_WRITE(SMH_ROM                  )   // ROM
2856		AM_RANGE(0x200000, 0x20ffff) AM_WRITE(SMH_RAM                  )   // ROM
2857		AM_RANGE(0x500000, 0x500005) AM_WRITE(seta_vregs_w) AM_BASE(&seta_vregs      )   // ? Coin Lockout + Video Registers
2858		AM_RANGE(0x700400, 0x700fff) AM_WRITE(SMH_RAM) AM_BASE(&paletteram16   ) AM_SIZE(&seta_paletteram_size)   // Palette
2859		AM_RANGE(0x800000, 0x803fff) AM_WRITE(seta_vram_0_w) AM_BASE(&seta_vram_0   )   // VRAM 0
2860		AM_RANGE(0x880000, 0x883fff) AM_WRITE(seta_vram_2_w) AM_BASE(&seta_vram_2   )   // VRAM 2
2861		AM_RANGE(0x900000, 0x900005) AM_WRITE(SMH_RAM) AM_BASE(&seta_vctrl_0      )   // VRAM 0&1 Ctrl
2862		AM_RANGE(0x980000, 0x980005) AM_WRITE(SMH_RAM) AM_BASE(&seta_vctrl_2      )   // VRAM 2&3 Ctrl
2863		AM_RANGE(0xa00000, 0xa00607) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16      )   // Sprites Y
2864		AM_RANGE(0xb00000, 0xb03fff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16_2   )   // Sprites Code + X + Attr
2865		AM_RANGE(0xc00000, 0xc00001) AM_WRITE(utoukond_soundlatch_w         )   // To Sound CPU (cause an IRQ)
2866		AM_RANGE(0xe00000, 0xe00001) AM_WRITE(SMH_NOP                  )   // ? ack
2867		ADDRESS_MAP_END
2868
2869	2500	/***************************************************************************
2870
2871
2872		Sub / Sound CPU
2873
2874
	2501	Pairs Love
2875	2502	***************************************************************************/
2876	2503
2877		static WRITE8_HANDLER( sub_bankswitch_w )
2878		{
2879		UINT8 *rom = memory_region(space->machine, "sub");
2880		int bank = data >> 4;
2881
2882		memory_set_bankptr(space->machine, 1, &rom[bank * 0x4000 + 0xc000]);
2883		}
2884
2885		static WRITE8_HANDLER( sub_bankswitch_lockout_w )
2886		{
2887		sub_bankswitch_w(space,offset,data);
2888		seta_coin_lockout_w(space->machine, data);
2889		}
2890
2891
2892		/***************************************************************************
2893		Thundercade
2894		***************************************************************************/
2895
2896		static READ8_HANDLER( ff_r )   {return 0xff;}
2897
2898		static ADDRESS_MAP_START( tndrcade_sub_readmem, ADDRESS_SPACE_PROGRAM, 8 )
2899		AM_RANGE(0x0000, 0x01ff) AM_READ(SMH_RAM            )   // RAM
2900		AM_RANGE(0x0800, 0x0800) AM_READ(ff_r               )   // ? (bits 0/1/2/3: 1 -> do test 0-ff/100-1e0/5001-57ff/banked rom)
2901		//  AM_RANGE(0x0800, 0x0800) AM_READ(soundlatch_r           )   //
2902		//  AM_RANGE(0x0801, 0x0801) AM_READ(soundlatch2_r          )   //
2903		AM_RANGE(0x1000, 0x1000) AM_READ_PORT("P1")               // P1
2904		AM_RANGE(0x1001, 0x1001) AM_READ_PORT("P2")               // P2
2905		AM_RANGE(0x1002, 0x1002) AM_READ_PORT("COINS")            // Coins
2906		AM_RANGE(0x2000, 0x2001) AM_DEVREAD("ym1", ym2203_r )
2907		AM_RANGE(0x5000, 0x57ff) AM_READ(SMH_RAM            )   // Shared RAM
2908		AM_RANGE(0x6000, 0x7fff) AM_READ(SMH_ROM            )   // ROM
2909		AM_RANGE(0x8000, 0xbfff) AM_READ(SMH_BANK1            )   // Banked ROM
2910		AM_RANGE(0xc000, 0xffff) AM_READ(SMH_ROM            )   // ROM
2911		ADDRESS_MAP_END
2912
2913		static ADDRESS_MAP_START( tndrcade_sub_writemem, ADDRESS_SPACE_PROGRAM, 8 )
2914		AM_RANGE(0x0000, 0x01ff) AM_WRITE(SMH_RAM               )   // RAM
2915		AM_RANGE(0x1000, 0x1000) AM_WRITE(sub_bankswitch_lockout_w   )   // ROM Bank + Coin Lockout
2916		AM_RANGE(0x2000, 0x2001) AM_DEVWRITE("ym1", ym2203_w   )
2917		AM_RANGE(0x3000, 0x3001) AM_DEVWRITE("ym2", ym3812_w   )
2918		AM_RANGE(0x5000, 0x57ff) AM_WRITE(SMH_RAM) AM_BASE(&sharedram      )   // Shared RAM
2919		AM_RANGE(0x6000, 0xffff) AM_WRITE(SMH_ROM               )   // ROM
2920		ADDRESS_MAP_END
2921
2922		/***************************************************************************
2923		Twin Eagle
2924		***************************************************************************/
2925
2926		static ADDRESS_MAP_START( twineagl_sub_readmem, ADDRESS_SPACE_PROGRAM, 8 )
2927		AM_RANGE(0x0000, 0x01ff) AM_READ(SMH_RAM         )   // RAM
2928		AM_RANGE(0x0800, 0x0800) AM_READ(soundlatch_r      )   //
2929		AM_RANGE(0x0801, 0x0801) AM_READ(soundlatch2_r      )   //
2930		AM_RANGE(0x1000, 0x1000) AM_READ_PORT("P1")            // P1
2931		AM_RANGE(0x1001, 0x1001) AM_READ_PORT("P2")            // P2
2932		AM_RANGE(0x1002, 0x1002) AM_READ_PORT("COINS")         // Coins
2933		AM_RANGE(0x5000, 0x57ff) AM_READ(SMH_RAM         )   // Shared RAM
2934		AM_RANGE(0x7000, 0x7fff) AM_READ(SMH_ROM         )   // ROM
2935		AM_RANGE(0x8000, 0xbfff) AM_READ(SMH_BANK1         )   // Banked ROM
2936		AM_RANGE(0xc000, 0xffff) AM_READ(SMH_ROM         )   // ROM
2937		ADDRESS_MAP_END
2938
2939		static ADDRESS_MAP_START( twineagl_sub_writemem, ADDRESS_SPACE_PROGRAM, 8 )
2940		AM_RANGE(0x0000, 0x01ff) AM_WRITE(SMH_RAM            )   // RAM
2941		AM_RANGE(0x1000, 0x1000) AM_WRITE(sub_bankswitch_lockout_w   )   // ROM Bank + Coin Lockout
2942		AM_RANGE(0x5000, 0x57ff) AM_WRITE(SMH_RAM) AM_BASE(&sharedram   )   // Shared RAM
2943		AM_RANGE(0x7000, 0x7fff) AM_WRITE(SMH_ROM            )   // ROM
2944		AM_RANGE(0x8000, 0xbfff) AM_WRITE(SMH_ROM            )   // ROM
2945		AM_RANGE(0xc000, 0xffff) AM_WRITE(SMH_ROM            )   // ROM
2946		ADDRESS_MAP_END
2947
2948		/***************************************************************************
2949		DownTown
2950		***************************************************************************/
2951
2952		static READ8_HANDLER( downtown_ip_r )
2953		{
2954		int dir1 = input_port_read(space->machine, "ROT1");   // analog port
2955		int dir2 = input_port_read(space->machine, "ROT2");   // analog port
2956
2957		dir1 = (~ (0x800 >> dir1)) & 0xfff;
2958		dir2 = (~ (0x800 >> dir2)) & 0xfff;
2959
2960		switch (offset)
2961		{
2962		case 0:   return (input_port_read(space->machine, "COINS") & 0xf0) + (dir1 >> 8);   // upper 4 bits of p1 rotation + coins
2963		case 1:   return (dir1 & 0xff);               // lower 8 bits of p1 rotation
2964		case 2:   return input_port_read(space->machine, "P1");   // p1
2965		case 3:   return 0xff;                     // ?
2966		case 4:   return (dir2 >> 8);                  // upper 4 bits of p2 rotation + ?
2967		case 5:   return (dir2 & 0xff);               // lower 8 bits of p2 rotation
2968		case 6:   return input_port_read(space->machine, "P2");   // p2
2969		case 7:   return 0xff;                     // ?
2970		}
2971
2972		return 0;
2973		}
2974
2975		static ADDRESS_MAP_START( downtown_sub_readmem, ADDRESS_SPACE_PROGRAM, 8 )
2976		AM_RANGE(0x0000, 0x01ff) AM_READ(SMH_RAM         )   // RAM
2977		AM_RANGE(0x0800, 0x0800) AM_READ(soundlatch_r      )   //
2978		AM_RANGE(0x0801, 0x0801) AM_READ(soundlatch2_r      )   //
2979		AM_RANGE(0x1000, 0x1007) AM_READ(downtown_ip_r      )   // Input Ports
2980		AM_RANGE(0x5000, 0x57ff) AM_READ(SMH_RAM         )   // Shared RAM
2981		AM_RANGE(0x7000, 0x7fff) AM_READ(SMH_ROM         )   // ROM
2982		AM_RANGE(0x8000, 0xbfff) AM_READ(SMH_BANK1         )   // Banked ROM
2983		AM_RANGE(0xc000, 0xffff) AM_READ(SMH_ROM         )   // ROM
2984		ADDRESS_MAP_END
2985
2986		static ADDRESS_MAP_START( downtown_sub_writemem, ADDRESS_SPACE_PROGRAM, 8 )
2987		AM_RANGE(0x0000, 0x01ff) AM_WRITE(SMH_RAM            )   // RAM
2988		AM_RANGE(0x1000, 0x1000) AM_WRITE(sub_bankswitch_lockout_w      )   // ROM Bank + Coin Lockout
2989		AM_RANGE(0x5000, 0x57ff) AM_WRITE(SMH_RAM) AM_BASE(&sharedram   )   // Shared RAM
2990		AM_RANGE(0x7000, 0xffff) AM_WRITE(SMH_ROM            )   // ROM
2991		ADDRESS_MAP_END
2992
2993		/***************************************************************************
2994		Caliber 50 / U.S. Classic
2995		***************************************************************************/
2996
2997		static MACHINE_RESET(calibr50)
2998		{
2999		const address_space *space = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM);
3000		sub_bankswitch_w(space, 0, 0);
3001		}
3002
3003		static WRITE8_HANDLER( calibr50_soundlatch2_w )
3004		{
3005		soundlatch2_w(space,0,data);
3006		cpu_spinuntil_time(space->cpu, ATTOTIME_IN_USEC(50));   // Allow the other cpu to reply
3007		}
3008
3009		static ADDRESS_MAP_START( calibr50_sub_readmem, ADDRESS_SPACE_PROGRAM, 8 )
3010		AM_RANGE(0x0000, 0x1fff) AM_DEVREAD("x1", seta_sound_r      )   // Sound
3011		AM_RANGE(0x4000, 0x4000) AM_READ(soundlatch_r      )   // From Main CPU
3012		AM_RANGE(0x8000, 0xbfff) AM_READ(SMH_BANK1         )   // Banked ROM
3013		AM_RANGE(0xc000, 0xffff) AM_READ(SMH_ROM         )   // ROM
3014		ADDRESS_MAP_END
3015
3016		static ADDRESS_MAP_START( calibr50_sub_writemem, ADDRESS_SPACE_PROGRAM, 8 )
3017		AM_RANGE(0x0000, 0x1fff) AM_DEVWRITE("x1", seta_sound_w            )   // Sound
3018		AM_RANGE(0x4000, 0x4000) AM_WRITE(sub_bankswitch_w         )   // Bankswitching
3019		AM_RANGE(0x8000, 0xbfff) AM_WRITE(SMH_ROM               )   // Banked ROM
3020		AM_RANGE(0xc000, 0xc000) AM_WRITE(calibr50_soundlatch2_w   )   // To Main CPU
3021		AM_RANGE(0xc000, 0xffff) AM_WRITE(SMH_ROM               )   // ROM
3022		ADDRESS_MAP_END
3023
3024		/***************************************************************************
3025		Meta Fox
3026		***************************************************************************/
3027
3028		static ADDRESS_MAP_START( metafox_sub_readmem, ADDRESS_SPACE_PROGRAM, 8 )
3029		AM_RANGE(0x0000, 0x01ff) AM_READ(SMH_RAM         )   // RAM
3030		AM_RANGE(0x0800, 0x0800) AM_READ(soundlatch_r      )   //
3031		AM_RANGE(0x0801, 0x0801) AM_READ(soundlatch2_r      )   //
3032		AM_RANGE(0x1000, 0x1000) AM_READ_PORT("COINS")         // Coins
3033		AM_RANGE(0x1002, 0x1002) AM_READ_PORT("P1")            // P1
3034		//  AM_RANGE(0x1004, 0x1004) AM_READ(SMH_NOP            )   // ?
3035		AM_RANGE(0x1006, 0x1006) AM_READ_PORT("P2")            // P2
3036		AM_RANGE(0x5000, 0x57ff) AM_READ(SMH_RAM         )   // Shared RAM
3037		AM_RANGE(0x7000, 0x7fff) AM_READ(SMH_ROM         )   // ROM
3038		AM_RANGE(0x8000, 0xbfff) AM_READ(SMH_BANK1         )   // Banked ROM
3039		AM_RANGE(0xc000, 0xffff) AM_READ(SMH_ROM         )   // ROM
3040		ADDRESS_MAP_END
3041
3042		static ADDRESS_MAP_START( metafox_sub_writemem, ADDRESS_SPACE_PROGRAM, 8 )
3043		AM_RANGE(0x0000, 0x01ff) AM_WRITE(SMH_RAM            )   // RAM
3044		AM_RANGE(0x1000, 0x1000) AM_WRITE(sub_bankswitch_lockout_w      )   // ROM Bank + Coin Lockout
3045		AM_RANGE(0x5000, 0x57ff) AM_WRITE(SMH_RAM) AM_BASE(&sharedram   )   // Shared RAM
3046		AM_RANGE(0x7000, 0x7fff) AM_WRITE(SMH_ROM            )   // ROM
3047		AM_RANGE(0x8000, 0xbfff) AM_WRITE(SMH_ROM            )   // ROM
3048		AM_RANGE(0xc000, 0xffff) AM_WRITE(SMH_ROM            )   // ROM
3049		ADDRESS_MAP_END
3050
3051
3052		/***************************************************************************
3053		Ultra Toukon Densetsu
3054		***************************************************************************/
3055
3056		static ADDRESS_MAP_START( utoukond_sound_readmem, ADDRESS_SPACE_PROGRAM, 8 )
3057		AM_RANGE(0x0000, 0xdfff) AM_READ(SMH_ROM)
3058		AM_RANGE(0xe000, 0xefff) AM_READ(SMH_RAM)
3059		AM_RANGE(0xf000, 0xffff) AM_DEVREAD("x1", seta_sound_r)
3060		ADDRESS_MAP_END
3061		static ADDRESS_MAP_START( utoukond_sound_writemem, ADDRESS_SPACE_PROGRAM, 8 )
3062		AM_RANGE(0x0000, 0xdfff) AM_WRITE(SMH_ROM)
3063		AM_RANGE(0xe000, 0xefff) AM_WRITE(SMH_RAM)
3064		AM_RANGE(0xf000, 0xffff) AM_DEVWRITE("x1", seta_sound_w)
3065		ADDRESS_MAP_END
3066
3067		static ADDRESS_MAP_START( utoukond_sound_io_map, ADDRESS_SPACE_IO, 8 )
3068		ADDRESS_MAP_GLOBAL_MASK(0xff)
3069		AM_RANGE(0x00, 0x03) AM_DEVREADWRITE("ym", ym3438_r, ym3438_w)
3070		AM_RANGE(0x80, 0x80) AM_WRITENOP //?
3071		AM_RANGE(0xc0, 0xc0) AM_READ(soundlatch_r)
3072		ADDRESS_MAP_END
3073
3074	2504	static UINT16 pairslove_protram[0x200];
3075	2505	static UINT16 pairslove_protram_old[0x200];
3076	2506
r4679	r4680
3090	2520	pairslove_protram[offset]=data;
3091	2521	}
3092	2522
3093		/***************************************************************************
3094		Pairs Love
3095		***************************************************************************/
3096
3097		static ADDRESS_MAP_START( pairlove_readmem, ADDRESS_SPACE_PROGRAM, 16 )
3098		AM_RANGE(0x000000, 0x03ffff) AM_READ(SMH_ROM            )   // ROM
3099		AM_RANGE(0x300000, 0x300003) AM_READ(seta_dsw_r            )   // DSW
	2523	static ADDRESS_MAP_START( pairlove_map, ADDRESS_SPACE_PROGRAM, 16 )
	2524	AM_RANGE(0x000000, 0x03ffff) AM_ROM                        // ROM
	2525	AM_RANGE(0x100000, 0x100001) AM_WRITENOP                  // ? 1 (start of interrupts, main loop: watchdog?)
	2526	AM_RANGE(0x200000, 0x200001) AM_WRITENOP                  // ? 0/1 (IRQ acknowledge?)
	2527	AM_RANGE(0x300000, 0x300003) AM_READ(seta_dsw_r)            // DSW
	2528	AM_RANGE(0x400000, 0x400001) AM_RAM_WRITE(seta_vregs_w) AM_BASE(&seta_vregs)   // Coin Lockout + Sound Enable (bit 4?)
3100	2529	AM_RANGE(0x500000, 0x500001) AM_READ_PORT("P1")               // P1
3101	2530	AM_RANGE(0x500002, 0x500003) AM_READ_PORT("P2")               // P2
3102	2531	AM_RANGE(0x500004, 0x500005) AM_READ_PORT("COINS")            // Coins
3103		AM_RANGE(0x900000, 0x9001ff) AM_READ(pairlove_prot_r)
3104		AM_RANGE(0xa00000, 0xa03fff) AM_DEVREAD("x1", seta_sound_word_r      )   // Sound
3105		AM_RANGE(0xb00000, 0xb00fff) AM_READ(SMH_RAM            )   // Palette
3106		AM_RANGE(0xc00000, 0xc03fff) AM_READ(SMH_RAM            )   // Sprites Code + X + Attr
3107		AM_RANGE(0xd00000, 0xd00001) AM_READ(SMH_RAM            )   // ? 0x4000
3108		AM_RANGE(0xe00000, 0xe00607) AM_READ(SMH_RAM            )   // Sprites Y
3109		AM_RANGE(0xf00000, 0xf0ffff) AM_READ(SMH_RAM            )   // RAM
	2532	AM_RANGE(0x900000, 0x9001ff) AM_READWRITE(pairlove_prot_r,pairlove_prot_w)
	2533	AM_RANGE(0xa00000, 0xa03fff) AM_DEVREADWRITE("x1", seta_sound_word_r,seta_sound_word_w)   // Sound
	2534	AM_RANGE(0xb00000, 0xb00fff) AM_RAM AM_BASE(&paletteram16) AM_SIZE(&seta_paletteram_size)   // Palette
	2535	AM_RANGE(0xc00000, 0xc03fff) AM_RAM AM_BASE(&spriteram16_2)      // Sprites Code + X + Attr
	2536	AM_RANGE(0xd00000, 0xd00001) AM_RAM                        // ? 0x4000
	2537	AM_RANGE(0xe00000, 0xe00607) AM_RAM AM_BASE(&spriteram16)      // Sprites Y
	2538	AM_RANGE(0xf00000, 0xf0ffff) AM_RAM                        // RAM
3110	2539	ADDRESS_MAP_END
3111	2540
3112		static ADDRESS_MAP_START( pairlove_writemem, ADDRESS_SPACE_PROGRAM, 16 )
3113		AM_RANGE(0x000000, 0x03ffff) AM_WRITE(SMH_ROM               )   // ROM
3114		AM_RANGE(0x100000, 0x100001) AM_WRITE(SMH_NOP               )   // ? 1 (start of interrupts, main loop: watchdog?)
3115		AM_RANGE(0x200000, 0x200001) AM_WRITE(SMH_NOP               )   // ? 0/1 (IRQ acknowledge?)
3116		AM_RANGE(0x400000, 0x400001) AM_WRITE(seta_vregs_w) AM_BASE(&seta_vregs   )   // Coin Lockout + Sound Enable (bit 4?)
3117		AM_RANGE(0x900000, 0x9001ff) AM_WRITE(pairlove_prot_w)
3118		AM_RANGE(0xa00000, 0xa03fff) AM_DEVWRITE("x1", seta_sound_word_w         )   // Sound
3119		AM_RANGE(0xb00000, 0xb00fff) AM_WRITE(SMH_RAM) AM_BASE(&paletteram16   ) AM_SIZE(&seta_paletteram_size)   // Palette
3120		AM_RANGE(0xc00000, 0xc03fff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16_2   )   // Sprites Code + X + Attr
3121		AM_RANGE(0xd00000, 0xd00001) AM_WRITE(SMH_RAM               )   // ? 0x4000
3122		AM_RANGE(0xe00000, 0xe00607) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16   )   // Sprites Y
3123		AM_RANGE(0xf00000, 0xf0ffff) AM_WRITE(SMH_RAM               )   // RAM
3124		ADDRESS_MAP_END
3125	2541
3126
3127	2542	/***************************************************************************
3128	2543	Crazy Fight
3129	2544	***************************************************************************/
r4679	r4680
3150	2565	AM_RANGE(0xb00000, 0xb03fff) AM_RAM AM_BASE(&spriteram16_2)   // Sprites Code + X + Attr
3151	2566	ADDRESS_MAP_END
3152	2567
	2568
3153	2569	/***************************************************************************
3154	2570	International Toote
3155	2571	***************************************************************************/
r4679	r4680
3220	2636	/***************************************************************************
3221	2637
3222	2638
	2639	Sub / Sound CPU
	2640
	2641
	2642	***************************************************************************/
	2643
	2644	static WRITE8_HANDLER( sub_bankswitch_w )
	2645	{
	2646	UINT8 *rom = memory_region(space->machine, "sub");
	2647	int bank = data >> 4;
	2648
	2649	memory_set_bankptr(space->machine, 1, &rom[bank * 0x4000 + 0xc000]);
	2650	}
	2651
	2652	static WRITE8_HANDLER( sub_bankswitch_lockout_w )
	2653	{
	2654	sub_bankswitch_w(space,offset,data);
	2655	seta_coin_lockout_w(space->machine, data);
	2656	}
	2657
	2658
	2659	/***************************************************************************
	2660	Thundercade
	2661	***************************************************************************/
	2662
	2663	static READ8_HANDLER( ff_r )   {return 0xff;}
	2664
	2665	static ADDRESS_MAP_START( tndrcade_sub_map, ADDRESS_SPACE_PROGRAM, 8 )
	2666	AM_RANGE(0x0000, 0x01ff) AM_RAM                      // RAM
	2667	AM_RANGE(0x0800, 0x0800) AM_READ(ff_r)                  // ? (bits 0/1/2/3: 1 -> do test 0-ff/100-1e0/5001-57ff/banked rom)
	2668	//  AM_RANGE(0x0800, 0x0800) AM_READ(soundlatch_r)              //
	2669	//  AM_RANGE(0x0801, 0x0801) AM_READ(soundlatch2_r)             //
	2670	AM_RANGE(0x1000, 0x1000) AM_READ_PORT("P1")               // P1
	2671	AM_RANGE(0x1000, 0x1000) AM_WRITE(sub_bankswitch_lockout_w)   // ROM Bank + Coin Lockout
	2672	AM_RANGE(0x1001, 0x1001) AM_READ_PORT("P2")               // P2
	2673	AM_RANGE(0x1002, 0x1002) AM_READ_PORT("COINS")            // Coins
	2674	AM_RANGE(0x2000, 0x2001) AM_DEVREADWRITE("ym1", ym2203_r,ym2203_w)
	2675	AM_RANGE(0x3000, 0x3001) AM_DEVWRITE("ym2", ym3812_w)
	2676	AM_RANGE(0x5000, 0x57ff) AM_RAM    AM_BASE(&sharedram)      // Shared RAM
	2677	AM_RANGE(0x6000, 0x7fff) AM_ROM                        // ROM
	2678	AM_RANGE(0x8000, 0xbfff) AM_ROMBANK(1)                  // Banked ROM
	2679	AM_RANGE(0xc000, 0xffff) AM_ROM                        // ROM
	2680	ADDRESS_MAP_END
	2681
	2682
	2683	/***************************************************************************
	2684	Twin Eagle
	2685	***************************************************************************/
	2686
	2687	static ADDRESS_MAP_START( twineagl_sub_map, ADDRESS_SPACE_PROGRAM, 8 )
	2688	AM_RANGE(0x0000, 0x01ff) AM_RAM                     // RAM
	2689	AM_RANGE(0x0800, 0x0800) AM_READ(soundlatch_r)         //
	2690	AM_RANGE(0x0801, 0x0801) AM_READ(soundlatch2_r)         //
	2691	AM_RANGE(0x1000, 0x1000) AM_READ_PORT("P1")            // P1
	2692	AM_RANGE(0x1000, 0x1000) AM_WRITE(sub_bankswitch_lockout_w)   // ROM Bank + Coin Lockout
	2693	AM_RANGE(0x1001, 0x1001) AM_READ_PORT("P2")            // P2
	2694	AM_RANGE(0x1002, 0x1002) AM_READ_PORT("COINS")         // Coins
	2695	AM_RANGE(0x5000, 0x57ff) AM_RAM AM_BASE(&sharedram)      // Shared RAM
	2696	AM_RANGE(0x7000, 0x7fff) AM_ROM                     // ROM
	2697	AM_RANGE(0x8000, 0xbfff) AM_ROMBANK(1)               // Banked ROM
	2698	AM_RANGE(0xc000, 0xffff) AM_ROM                     // ROM
	2699	ADDRESS_MAP_END
	2700
	2701
	2702	/***************************************************************************
	2703	DownTown
	2704	***************************************************************************/
	2705
	2706	static READ8_HANDLER( downtown_ip_r )
	2707	{
	2708	int dir1 = input_port_read(space->machine, "ROT1");   // analog port
	2709	int dir2 = input_port_read(space->machine, "ROT2");   // analog port
	2710
	2711	dir1 = (~ (0x800 >> dir1)) & 0xfff;
	2712	dir2 = (~ (0x800 >> dir2)) & 0xfff;
	2713
	2714	switch (offset)
	2715	{
	2716	case 0:   return (input_port_read(space->machine, "COINS") & 0xf0) + (dir1 >> 8);   // upper 4 bits of p1 rotation + coins
	2717	case 1:   return (dir1 & 0xff);               // lower 8 bits of p1 rotation
	2718	case 2:   return input_port_read(space->machine, "P1");   // p1
	2719	case 3:   return 0xff;                     // ?
	2720	case 4:   return (dir2 >> 8);                  // upper 4 bits of p2 rotation + ?
	2721	case 5:   return (dir2 & 0xff);               // lower 8 bits of p2 rotation
	2722	case 6:   return input_port_read(space->machine, "P2");   // p2
	2723	case 7:   return 0xff;                     // ?
	2724	}
	2725
	2726	return 0;
	2727	}
	2728
	2729	static ADDRESS_MAP_START( downtown_sub_map, ADDRESS_SPACE_PROGRAM, 8 )
	2730	AM_RANGE(0x0000, 0x01ff) AM_RAM                     // RAM
	2731	AM_RANGE(0x0800, 0x0800) AM_READ(soundlatch_r)         //
	2732	AM_RANGE(0x0801, 0x0801) AM_READ(soundlatch2_r)         //
	2733	AM_RANGE(0x1000, 0x1007) AM_READ(downtown_ip_r)         // Input Ports
	2734	AM_RANGE(0x1000, 0x1000) AM_WRITE(sub_bankswitch_lockout_w)   // ROM Bank + Coin Lockout
	2735	AM_RANGE(0x5000, 0x57ff) AM_RAM AM_BASE(&sharedram)      // Shared RAM
	2736	AM_RANGE(0x7000, 0x7fff) AM_ROM                     // ROM
	2737	AM_RANGE(0x8000, 0xbfff) AM_ROMBANK(1)               // Banked ROM
	2738	AM_RANGE(0xc000, 0xffff) AM_ROM                     // ROM
	2739	ADDRESS_MAP_END
	2740
	2741
	2742	/***************************************************************************
	2743	Caliber 50 / U.S. Classic
	2744	***************************************************************************/
	2745
	2746	static MACHINE_RESET(calibr50)
	2747	{
	2748	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	2749	sub_bankswitch_w(space, 0, 0);
	2750	}
	2751
	2752	static WRITE8_HANDLER( calibr50_soundlatch2_w )
	2753	{
	2754	soundlatch2_w(space,0,data);
	2755	cpu_spinuntil_time(space->cpu, ATTOTIME_IN_USEC(50));   // Allow the other cpu to reply
	2756	}
	2757
	2758	static ADDRESS_MAP_START( calibr50_sub_map, ADDRESS_SPACE_PROGRAM, 8 )
	2759	AM_RANGE(0x0000, 0x1fff) AM_DEVREADWRITE("x1", seta_sound_r,seta_sound_w)   // Sound
	2760	AM_RANGE(0x4000, 0x4000) AM_READ(soundlatch_r)            // From Main CPU
	2761	AM_RANGE(0x4000, 0x4000) AM_WRITE(sub_bankswitch_w)         // Bankswitching
	2762	AM_RANGE(0x8000, 0xbfff) AM_ROMBANK(1)                  // Banked ROM
	2763	AM_RANGE(0xc000, 0xffff) AM_ROM                        // ROM
	2764	AM_RANGE(0xc000, 0xc000) AM_WRITE(calibr50_soundlatch2_w)   // To Main CPU
	2765	ADDRESS_MAP_END
	2766
	2767
	2768	/***************************************************************************
	2769	Meta Fox
	2770	***************************************************************************/
	2771
	2772	static ADDRESS_MAP_START( metafox_sub_map, ADDRESS_SPACE_PROGRAM, 8 )
	2773	AM_RANGE(0x0000, 0x01ff) AM_RAM                     // RAM
	2774	AM_RANGE(0x0800, 0x0800) AM_READ(soundlatch_r)         //
	2775	AM_RANGE(0x0801, 0x0801) AM_READ(soundlatch2_r)         //
	2776	AM_RANGE(0x1000, 0x1000) AM_READ_PORT("COINS")         // Coins
	2777	AM_RANGE(0x1000, 0x1000) AM_WRITE(sub_bankswitch_lockout_w)   // ROM Bank + Coin Lockout
	2778	AM_RANGE(0x1002, 0x1002) AM_READ_PORT("P1")            // P1
	2779	//  AM_RANGE(0x1004, 0x1004) AM_READNOP                     // ?
	2780	AM_RANGE(0x1006, 0x1006) AM_READ_PORT("P2")            // P2
	2781	AM_RANGE(0x5000, 0x57ff) AM_RAM AM_BASE(&sharedram)      // Shared RAM
	2782	AM_RANGE(0x7000, 0x7fff) AM_ROM                     // ROM
	2783	AM_RANGE(0x8000, 0xbfff) AM_ROMBANK(1)               // Banked ROM
	2784	AM_RANGE(0xc000, 0xffff) AM_ROM                     // ROM
	2785	ADDRESS_MAP_END
	2786
	2787
	2788	/***************************************************************************
	2789	Ultra Toukon Densetsu
	2790	***************************************************************************/
	2791
	2792	static ADDRESS_MAP_START( utoukond_sound_map, ADDRESS_SPACE_PROGRAM, 8 )
	2793	AM_RANGE(0x0000, 0xdfff) AM_ROM
	2794	AM_RANGE(0xe000, 0xefff) AM_RAM
	2795	AM_RANGE(0xf000, 0xffff) AM_DEVREADWRITE("x1", seta_sound_r,seta_sound_w)
	2796	ADDRESS_MAP_END
	2797
	2798	static ADDRESS_MAP_START( utoukond_sound_io_map, ADDRESS_SPACE_IO, 8 )
	2799	ADDRESS_MAP_GLOBAL_MASK(0xff)
	2800	AM_RANGE(0x00, 0x03) AM_DEVREADWRITE("ym", ym3438_r, ym3438_w)
	2801	AM_RANGE(0x80, 0x80) AM_WRITENOP //?
	2802	AM_RANGE(0xc0, 0xc0) AM_READ(soundlatch_r)
	2803	ADDRESS_MAP_END
	2804
	2805
	2806	/***************************************************************************
	2807
	2808
3223	2809	Input Ports
3224	2810
3225	2811
r4679	r4680
6764	6350
6765	6351	/* basic machine hardware */
6766	6352	MDRV_CPU_ADD("maincpu", M68000, 16000000/2)   /* 8 MHz */
6767		MDRV_CPU_PROGRAM_MAP(tndrcade_readmem,tndrcade_writemem)
	6353	MDRV_CPU_PROGRAM_MAP(tndrcade_map,0)
6768	6354	MDRV_CPU_VBLANK_INT("screen", irq2_line_hold)
6769	6355
6770	6356	MDRV_CPU_ADD("sub", M65C02, 16000000/8)   /* 2 MHz */
6771		MDRV_CPU_PROGRAM_MAP(tndrcade_sub_readmem,tndrcade_sub_writemem)
	6357	MDRV_CPU_PROGRAM_MAP(tndrcade_sub_map,0)
6772	6358	MDRV_CPU_VBLANK_INT_HACK(tndrcade_sub_interrupt,TNDRCADE_SUB_INTERRUPTS_NUM)
6773	6359
6774	6360	/* video hardware */
r4679	r4680
6799	6385	MACHINE_DRIVER_END
6800	6386
6801	6387
6802
6803	6388	/***************************************************************************
6804	6389	Twin Eagle
6805	6390	***************************************************************************/
r4679	r4680
6814	6399
6815	6400	/* basic machine hardware */
6816	6401	MDRV_CPU_ADD("maincpu", M68000, 16000000/2)   /* 8 MHz */
6817		MDRV_CPU_PROGRAM_MAP(downtown_readmem,downtown_writemem)
	6402	MDRV_CPU_PROGRAM_MAP(downtown_map,0)
6818	6403	MDRV_CPU_VBLANK_INT("screen", irq3_line_hold)
6819	6404
6820	6405	MDRV_CPU_ADD("sub", M65C02, 16000000/8)   /* 2 MHz */
6821		MDRV_CPU_PROGRAM_MAP(twineagl_sub_readmem,twineagl_sub_writemem)
	6406	MDRV_CPU_PROGRAM_MAP(twineagl_sub_map,0)
6822	6407	MDRV_CPU_VBLANK_INT_HACK(seta_sub_interrupt,SETA_SUB_INTERRUPTS_NUM)
6823	6408
6824	6409	/* video hardware */
r4679	r4680
6845	6430	MACHINE_DRIVER_END
6846	6431
6847	6432
6848
6849	6433	/***************************************************************************
6850	6434	DownTown
6851	6435	***************************************************************************/
r4679	r4680
6856	6440
6857	6441	/* basic machine hardware */
6858	6442	MDRV_CPU_ADD("maincpu", M68000, XTAL_16MHz/2) /* verified on pcb */
6859		MDRV_CPU_PROGRAM_MAP(downtown_readmem,downtown_writemem)
	6443	MDRV_CPU_PROGRAM_MAP(downtown_map,0)
6860	6444	MDRV_CPU_VBLANK_INT_HACK(seta_interrupt_1_and_2,SETA_INTERRUPTS_NUM)
6861	6445
6862	6446	MDRV_CPU_ADD("sub", M65C02, XTAL_16MHz/8) /* verified on pcb */
6863		MDRV_CPU_PROGRAM_MAP(downtown_sub_readmem,downtown_sub_writemem)
	6447	MDRV_CPU_PROGRAM_MAP(downtown_sub_map,0)
6864	6448	MDRV_CPU_VBLANK_INT_HACK(seta_sub_interrupt,SETA_SUB_INTERRUPTS_NUM)
6865	6449
6866	6450	/* video hardware */
r4679	r4680
6887	6471	MACHINE_DRIVER_END
6888	6472
6889	6473
6890
6891	6474	/***************************************************************************
6892	6475	U.S. Classic
6893	6476	***************************************************************************/
r4679	r4680
6916	6499
6917	6500	/* basic machine hardware */
6918	6501	MDRV_CPU_ADD("maincpu", M68000, 16000000/2)   /* 8 MHz */
6919		MDRV_CPU_PROGRAM_MAP(usclssic_readmem,usclssic_writemem)
	6502	MDRV_CPU_PROGRAM_MAP(usclssic_map,0)
6920	6503	MDRV_CPU_VBLANK_INT_HACK(calibr50_interrupt,calibr50_INTERRUPTS_NUM)
6921	6504
6922	6505	MDRV_CPU_ADD("sub", M65C02, 16000000/8)   /* 2 MHz */
6923		MDRV_CPU_PROGRAM_MAP(calibr50_sub_readmem,calibr50_sub_writemem)
	6506	MDRV_CPU_PROGRAM_MAP(calibr50_sub_map,0)
6924	6507	MDRV_CPU_VBLANK_INT("screen", irq0_line_hold)   /* NMI caused by main cpu when writing to the sound latch */
6925	6508
6926	6509	MDRV_MACHINE_RESET(calibr50)
r4679	r4680
6963	6546
6964	6547	/* basic machine hardware */
6965	6548	MDRV_CPU_ADD("maincpu", M68000, 16000000/2)   /* 8 MHz */
6966		MDRV_CPU_PROGRAM_MAP(calibr50_readmem,calibr50_writemem)
	6549	MDRV_CPU_PROGRAM_MAP(calibr50_map,0)
6967	6550	MDRV_CPU_VBLANK_INT_HACK(calibr50_interrupt,calibr50_INTERRUPTS_NUM)
6968	6551
6969	6552	MDRV_CPU_ADD("sub", M65C02, 16000000/8)   /* 2 MHz */
6970		MDRV_CPU_PROGRAM_MAP(calibr50_sub_readmem,calibr50_sub_writemem)
	6553	MDRV_CPU_PROGRAM_MAP(calibr50_sub_map,0)
6971	6554	MDRV_CPU_VBLANK_INT_HACK(irq0_line_hold,4)   /* IRQ: 4/frame
6972	6555	NMI: when the 68k writes the sound latch */
6973	6556
r4679	r4680
7007	6590
7008	6591	/* basic machine hardware */
7009	6592	MDRV_CPU_ADD("maincpu", M68000, 16000000/2)   /* 8 MHz */
7010		MDRV_CPU_PROGRAM_MAP(downtown_readmem,downtown_writemem)
	6593	MDRV_CPU_PROGRAM_MAP(downtown_map,0)
7011	6594	MDRV_CPU_VBLANK_INT("screen", irq3_line_hold)
7012	6595
7013	6596	MDRV_CPU_ADD("sub", M65C02, 16000000/8)   /* 2 MHz */
7014		MDRV_CPU_PROGRAM_MAP(metafox_sub_readmem,metafox_sub_writemem)
	6597	MDRV_CPU_PROGRAM_MAP(metafox_sub_map,0)
7015	6598	MDRV_CPU_VBLANK_INT_HACK(seta_sub_interrupt,SETA_SUB_INTERRUPTS_NUM)
7016	6599
7017	6600	/* video hardware */
r4679	r4680
7038	6621	MACHINE_DRIVER_END
7039	6622
7040	6623
7041
7042
7043
7044
7045	6624	/***************************************************************************
7046	6625	Athena no Hatena?
7047	6626	***************************************************************************/
r4679	r4680
7050	6629
7051	6630	/* basic machine hardware */
7052	6631	MDRV_CPU_ADD("maincpu", M68000, 16000000)   /* 16 MHz */
7053		MDRV_CPU_PROGRAM_MAP(atehate_readmem,atehate_writemem)
	6632	MDRV_CPU_PROGRAM_MAP(atehate_map,0)
7054	6633	MDRV_CPU_VBLANK_INT_HACK(seta_interrupt_1_and_2,SETA_INTERRUPTS_NUM)
7055	6634
7056	6635	/* video hardware */
r4679	r4680
7091	6670
7092	6671	/* basic machine hardware */
7093	6672	MDRV_CPU_ADD("maincpu", M68000, 16000000)   /* 16 MHz */
7094		MDRV_CPU_PROGRAM_MAP(blandia_readmem,blandia_writemem)
7095
	6673	MDRV_CPU_PROGRAM_MAP(blandia_map,0)
7096	6674	MDRV_CPU_VBLANK_INT_HACK(seta_interrupt_2_and_4,SETA_INTERRUPTS_NUM)
7097	6675
7098	6676	/* video hardware */
r4679	r4680
7124	6702
7125	6703	/* basic machine hardware */
7126	6704	MDRV_CPU_ADD("maincpu", M68000, 16000000)   /* 16 MHz */
7127		MDRV_CPU_PROGRAM_MAP(blandiap_readmem,blandiap_writemem)
	6705	MDRV_CPU_PROGRAM_MAP(blandiap_map,0)
7128	6706	MDRV_CPU_VBLANK_INT_HACK(seta_interrupt_2_and_4,SETA_INTERRUPTS_NUM)
7129	6707
7130	6708	/* video hardware */
r4679	r4680
7161	6739
7162	6740	/* basic machine hardware */
7163	6741	MDRV_CPU_ADD("maincpu", M68000, 16000000/2)   /* 8 MHz */
7164		MDRV_CPU_PROGRAM_MAP(blockcar_readmem,blockcar_writemem)
	6742	MDRV_CPU_PROGRAM_MAP(blockcar_map,0)
7165	6743	MDRV_CPU_VBLANK_INT("screen", irq3_line_hold)
7166	6744
7167	6745	/* video hardware */
r4679	r4680
7196	6774
7197	6775	/* basic machine hardware */
7198	6776	MDRV_CPU_ADD("maincpu", M68000, 16000000)   /* 16 MHz */
7199		MDRV_CPU_PROGRAM_MAP(daioh_readmem,daioh_writemem)
	6777	MDRV_CPU_PROGRAM_MAP(daioh_map,0)
7200	6778	MDRV_CPU_VBLANK_INT_HACK(seta_interrupt_1_and_2,SETA_INTERRUPTS_NUM)
7201	6779
7202	6780	/* video hardware */
r4679	r4680
7236	6814
7237	6815	/* basic machine hardware */
7238	6816	MDRV_CPU_ADD("maincpu", M68000, 16000000/2)   /* 8 MHz */
7239		MDRV_CPU_PROGRAM_MAP(drgnunit_readmem,drgnunit_writemem)
	6817	MDRV_CPU_PROGRAM_MAP(drgnunit_map,0)
7240	6818	MDRV_CPU_VBLANK_INT_HACK(seta_interrupt_1_and_2,SETA_INTERRUPTS_NUM)
7241	6819
7242	6820	/* video hardware */
r4679	r4680
7270	6848
7271	6849	/* basic machine hardware */
7272	6850	MDRV_CPU_ADD("maincpu", M68000, 16000000)   /* 16 MHz */
7273		MDRV_CPU_PROGRAM_MAP(drgnunit_readmem,drgnunit_writemem)
	6851	MDRV_CPU_PROGRAM_MAP(drgnunit_map,0)
7274	6852	MDRV_CPU_VBLANK_INT_HACK(seta_interrupt_1_and_2,SETA_INTERRUPTS_NUM)
7275	6853
7276	6854	/* video hardware */
r4679	r4680
7306	6884
7307	6885	/* basic machine hardware */
7308	6886	MDRV_CPU_ADD("maincpu", M68000, 16000000)   /* 16 MHz */
7309		MDRV_CPU_PROGRAM_MAP(wrofaero_readmem,wrofaero_writemem)
	6887	MDRV_CPU_PROGRAM_MAP(wrofaero_map,0)
7310	6888	MDRV_CPU_VBLANK_INT_HACK(seta_interrupt_1_and_2,SETA_INTERRUPTS_NUM)
7311	6889
7312	6890	/* video hardware */
r4679	r4680
7346	6924
7347	6925	/* basic machine hardware */
7348	6926	MDRV_CPU_ADD("maincpu", M68000, 16000000)   /* 16 MHz */
7349		MDRV_CPU_PROGRAM_MAP(extdwnhl_readmem,extdwnhl_writemem)
	6927	MDRV_CPU_PROGRAM_MAP(extdwnhl_map,0)
7350	6928	MDRV_CPU_VBLANK_INT_HACK(seta_interrupt_1_and_2,SETA_INTERRUPTS_NUM)
7351	6929
7352	6930	/* video hardware */
r4679	r4680
7398	6976
7399	6977	/* basic machine hardware */
7400	6978	MDRV_CPU_ADD("maincpu", M68000, 16000000)   /* 16 MHz */
7401		MDRV_CPU_PROGRAM_MAP(wrofaero_readmem,wrofaero_writemem)
	6979	MDRV_CPU_PROGRAM_MAP(wrofaero_map,0)
7402	6980	#if   __uPD71054_TIMER
7403	6981	//  MDRV_CPU_VBLANK_INT("screen", wrofaero_interrupt)
7404	6982	MDRV_CPU_VBLANK_INT_HACK(seta_interrupt_1_and_2,SETA_INTERRUPTS_NUM)
r4679	r4680
7447	7025
7448	7026	/* basic machine hardware */
7449	7027	MDRV_CPU_ADD("maincpu", M68000, 16000000)   /* 16 MHz */
7450		MDRV_CPU_PROGRAM_MAP(wrofaero_readmem,wrofaero_writemem)
	7028	MDRV_CPU_PROGRAM_MAP(wrofaero_map,0)
7451	7029	MDRV_CPU_VBLANK_INT_HACK(seta_interrupt_1_and_2,SETA_INTERRUPTS_NUM)
7452	7030
7453	7031	/* video hardware */
r4679	r4680
7478	7056
7479	7057	/* basic machine hardware */
7480	7058	MDRV_CPU_ADD("maincpu", M68000, 16000000)   /* 16 MHz */
7481		MDRV_CPU_PROGRAM_MAP(wrofaero_readmem,jjsquawb_writemem)
	7059	MDRV_CPU_PROGRAM_MAP(jjsquawb_map,0)
7482	7060	MDRV_CPU_VBLANK_INT_HACK(seta_interrupt_1_and_2,SETA_INTERRUPTS_NUM)
7483	7061
7484	7062	/* video hardware */
r4679	r4680
7514	7092
7515	7093	/* basic machine hardware */
7516	7094	MDRV_CPU_ADD("maincpu", M68000, 16000000)   /* 16 MHz */
7517		MDRV_CPU_PROGRAM_MAP(kamenrid_readmem,kamenrid_writemem)
	7095	MDRV_CPU_PROGRAM_MAP(kamenrid_map,0)
7518	7096	MDRV_CPU_VBLANK_INT("screen", wrofaero_interrupt)
7519	7097
7520	7098	#if   __uPD71054_TIMER
r4679	r4680
7554	7132
7555	7133	/* basic machine hardware */
7556	7134	MDRV_CPU_ADD("maincpu", M68000, 14318180/2)   /* 7.143 MHz */
7557		MDRV_CPU_PROGRAM_MAP(orbs_readmem,orbs_writemem)
	7135	MDRV_CPU_PROGRAM_MAP(orbs_map,0)
7558	7136	MDRV_CPU_VBLANK_INT_HACK(seta_interrupt_1_and_2,SETA_INTERRUPTS_NUM)
7559	7137
7560	7138	/* video hardware */
r4679	r4680
7589	7167
7590	7168	/* basic machine hardware */
7591	7169	MDRV_CPU_ADD("maincpu", M68000, 16000000)   /* 16 MHz */
7592		MDRV_CPU_PROGRAM_MAP(krzybowl_readmem,krzybowl_writemem)
	7170	MDRV_CPU_PROGRAM_MAP(krzybowl_map,0)
7593	7171	MDRV_CPU_VBLANK_INT_HACK(seta_interrupt_1_and_2,SETA_INTERRUPTS_NUM)
7594	7172
7595	7173	/* video hardware */
r4679	r4680
7625	7203
7626	7204	/* basic machine hardware */
7627	7205	MDRV_CPU_ADD("maincpu", M68000, 16000000)   /* 16 MHz */
7628		MDRV_CPU_PROGRAM_MAP(madshark_readmem,madshark_writemem)
	7206	MDRV_CPU_PROGRAM_MAP(madshark_map,0)
7629	7207	MDRV_CPU_VBLANK_INT("screen", wrofaero_interrupt)
7630	7208
7631	7209	#if   __uPD71054_TIMER
r4679	r4680
7667	7245
7668	7246	/* basic machine hardware */
7669	7247	MDRV_CPU_ADD("maincpu", M68000, 16000000)   /* 16 MHz */
7670		MDRV_CPU_PROGRAM_MAP(msgundam_readmem,msgundam_writemem)
	7248	MDRV_CPU_PROGRAM_MAP(msgundam_map,0)
7671	7249	#if   __uPD71054_TIMER
7672	7250	MDRV_CPU_VBLANK_INT("screen", wrofaero_interrupt)
7673	7251	#else
r4679	r4680
7712	7290
7713	7291	/* basic machine hardware */
7714	7292	MDRV_CPU_ADD("maincpu", M68000, 16000000)   /* 16 MHz */
7715		MDRV_CPU_PROGRAM_MAP(oisipuzl_readmem,oisipuzl_writemem)
	7293	MDRV_CPU_PROGRAM_MAP(oisipuzl_map,0)
7716	7294	MDRV_CPU_VBLANK_INT_HACK(seta_interrupt_1_and_2,SETA_INTERRUPTS_NUM)
7717	7295
7718	7296	/* video hardware */
r4679	r4680
7748	7326
7749	7327	/* basic machine hardware */
7750	7328	MDRV_CPU_ADD("maincpu", M68000, 16000000)   /* 16 MHz */
7751		MDRV_CPU_PROGRAM_MAP(triplfun_readmem,triplfun_writemem)
	7329	MDRV_CPU_PROGRAM_MAP(triplfun_map,0)
7752	7330	MDRV_CPU_VBLANK_INT("screen", irq3_line_hold)
7753	7331
7754	7332	/* video hardware */
r4679	r4680
7782	7360
7783	7361	/* basic machine hardware */
7784	7362	MDRV_CPU_ADD("maincpu", M68000, 16000000)   /* 16 MHz */
7785		MDRV_CPU_PROGRAM_MAP(kiwame_readmem,kiwame_writemem)
	7363	MDRV_CPU_PROGRAM_MAP(kiwame_map,0)
7786	7364	MDRV_CPU_VBLANK_INT("screen", irq1_line_hold)/* lev 1-7 are the same. WARNING:
7787	7365	the interrupt table is written to. */
7788	7366
r4679	r4680
7821	7399
7822	7400	/* basic machine hardware */
7823	7401	MDRV_CPU_ADD("maincpu", M68000, 16000000)   /* 16 MHz */
7824		MDRV_CPU_PROGRAM_MAP(wrofaero_readmem,wrofaero_writemem)
	7402	MDRV_CPU_PROGRAM_MAP(wrofaero_map,0)
7825	7403	MDRV_CPU_VBLANK_INT_HACK(seta_interrupt_1_and_2,SETA_INTERRUPTS_NUM)
7826	7404
7827	7405	/* video hardware */
r4679	r4680
7859	7437
7860	7438	/* basic machine hardware */
7861	7439	MDRV_CPU_ADD("maincpu", M68000, 16000000/2)   /* 8 MHz */
7862		MDRV_CPU_PROGRAM_MAP(thunderl_readmem,thunderl_writemem)
	7440	MDRV_CPU_PROGRAM_MAP(thunderl_map,0)
7863	7441	MDRV_CPU_VBLANK_INT("screen", irq2_line_hold)
7864	7442
7865	7443	/* video hardware */
r4679	r4680
7890	7468
7891	7469	/* basic machine hardware */
7892	7470	MDRV_CPU_ADD("maincpu", M68000, 16000000/2)   /* 8 MHz */
7893		MDRV_CPU_PROGRAM_MAP(wiggie_readmem,wiggie_writemem)
	7471	MDRV_CPU_PROGRAM_MAP(wiggie_map,0)
7894	7472	MDRV_CPU_VBLANK_INT("screen", irq2_line_hold)
7895	7473
7896	7474	MDRV_CPU_ADD("audiocpu", Z80, 16000000/4)   /* 4 MHz */
7897		MDRV_CPU_PROGRAM_MAP(wiggie_sound_readmem,wiggie_sound_writemem)
	7475	MDRV_CPU_PROGRAM_MAP(wiggie_sound_map,0)
7898	7476
7899	7477	/* video hardware */
7900	7478	MDRV_SCREEN_ADD("screen", RASTER)
r4679	r4680
7923	7501
7924	7502	/* basic machine hardware */
7925	7503	MDRV_CPU_ADD("maincpu", M68000, 16000000/2)   /* 8 MHz */
7926		MDRV_CPU_PROGRAM_MAP(thunderl_readmem,thunderl_writemem)
	7504	MDRV_CPU_PROGRAM_MAP(thunderl_map,0)
7927	7505	MDRV_CPU_VBLANK_INT("screen", irq2_line_hold)
7928	7506
7929	7507	/* video hardware */
r4679	r4680
7950	7528	MACHINE_DRIVER_END
7951	7529
7952	7530
7953
7954	7531	/***************************************************************************
7955	7532	Ultraman Club / SD Gundam Neo Battling
7956	7533	***************************************************************************/
r4679	r4680
7959	7536
7960	7537	/* basic machine hardware */
7961	7538	MDRV_CPU_ADD("maincpu", M68000, 16000000)   /* 16 MHz */
7962		MDRV_CPU_PROGRAM_MAP(umanclub_readmem,umanclub_writemem)
	7539	MDRV_CPU_PROGRAM_MAP(umanclub_map,0)
7963	7540	MDRV_CPU_VBLANK_INT("screen", irq3_line_hold)
7964	7541
7965	7542	/* video hardware */
r4679	r4680
7994	7571
7995	7572	/* basic machine hardware */
7996	7573	MDRV_CPU_ADD("maincpu", M68000, 16000000)   /* 16 MHz */
7997		MDRV_CPU_PROGRAM_MAP(utoukond_readmem,utoukond_writemem)
	7574	MDRV_CPU_PROGRAM_MAP(utoukond_map,0)
7998	7575	MDRV_CPU_VBLANK_INT_HACK(seta_interrupt_1_and_2,SETA_INTERRUPTS_NUM)
7999	7576
8000	7577	MDRV_CPU_ADD("audiocpu", Z80, 16000000/4)   /* 4 MHz */
8001		MDRV_CPU_PROGRAM_MAP(utoukond_sound_readmem,utoukond_sound_writemem)
	7578	MDRV_CPU_PROGRAM_MAP(utoukond_sound_map,0)
8002	7579	MDRV_CPU_IO_MAP(utoukond_sound_io_map,0)
8003	7580
8004	7581	/* video hardware */
r4679	r4680
8038	7615
8039	7616	/* basic machine hardware */
8040	7617	MDRV_CPU_ADD("maincpu", M68000, 16000000)   /* 16 MHz */
8041		MDRV_CPU_PROGRAM_MAP(wrofaero_readmem,wrofaero_writemem)
	7618	MDRV_CPU_PROGRAM_MAP(wrofaero_map,0)
8042	7619	#if   __uPD71054_TIMER
8043	7620	MDRV_CPU_VBLANK_INT("screen", wrofaero_interrupt)
8044	7621	#else
r4679	r4680
8088	7665
8089	7666	/* basic machine hardware */
8090	7667	MDRV_CPU_ADD("maincpu", M68000, 16000000)   /* 16 MHz */
8091		MDRV_CPU_PROGRAM_MAP(wrofaero_readmem,wrofaero_writemem)
	7668	MDRV_CPU_PROGRAM_MAP(wrofaero_map,0)
8092	7669	MDRV_CPU_VBLANK_INT("screen", irq3_line_hold)
8093	7670
8094	7671	/* video hardware */
r4679	r4680
8123	7700
8124	7701	/* basic machine hardware */
8125	7702	MDRV_CPU_ADD("maincpu", M68000, 16000000/2)   /* 8 MHz */
8126		MDRV_CPU_PROGRAM_MAP(pairlove_readmem,pairlove_writemem)
	7703	MDRV_CPU_PROGRAM_MAP(pairlove_map,0)
8127	7704	MDRV_CPU_VBLANK_INT_HACK(seta_interrupt_1_and_2,SETA_INTERRUPTS_NUM)
8128	7705
8129	7706	/* video hardware */
r4679	r4680
9477	9054	static DRIVER_INIT( twineagl )
9478	9055	{
9479	9056	/* debug? */
9480		memory_install_read16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x800000, 0x8000ff, 0, 0, twineagl_debug_r);
	9057	memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x800000, 0x8000ff, 0, 0, twineagl_debug_r);
9481	9058
9482	9059	/* This allows 2 simultaneous players and the use of the "Copyright" Dip Switch. */
9483		memory_install_readwrite16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x200100, 0x20010f, 0, 0, twineagl_200100_r, twineagl_200100_w);
	9060	memory_install_readwrite16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x200100, 0x20010f, 0, 0, twineagl_200100_r, twineagl_200100_w);
9484	9061	}
9485	9062
9486	9063
r4679	r4680
9510	9087
9511	9088	static DRIVER_INIT( downtown )
9512	9089	{
9513		memory_install_readwrite16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x200000, 0x2001ff, 0, 0, downtown_protection_r, downtown_protection_w);
	9090	memory_install_readwrite16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x200000, 0x2001ff, 0, 0, downtown_protection_r, downtown_protection_w);
9514	9091	}
9515	9092
9516	9093
r4679	r4680
9530	9107
9531	9108	static DRIVER_INIT( arbalest )
9532	9109	{
9533		memory_install_read16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x80000, 0x8000f, 0, 0, arbalest_debug_r);
	9110	memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x80000, 0x8000f, 0, 0, arbalest_debug_r);
9534	9111	}
9535	9112
9536	9113
r4679	r4680
9539	9116	UINT16 *RAM = (UINT16 *) memory_region(machine, "maincpu");
9540	9117
9541	9118	/* This game uses the 21c000-21ffff area for protection? */
9542		//  memory_install_readwrite16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x21c000, 0x21ffff, 0, 0, SMH_NOP, SMH_NOP);
	9119	//  memory_install_readwrite16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x21c000, 0x21ffff, 0, 0, (read16_space_func)SMH_NOP, (write16_space_func)SMH_NOP);
9543	9120
9544	9121	RAM[0x8ab1c/2] = 0x4e71;   // patch protection test: "cp error"
9545	9122	RAM[0x8ab1e/2] = 0x4e71;
r4679	r4680
9557	9134	int rpos;
9558	9135
9559	9136	rom_size = 0x80000;
9560		buf = malloc_or_die(rom_size);
	9137	buf = alloc_array_or_die(UINT8, rom_size);
9561	9138
9562	9139	rom = memory_region(machine, "gfx2") + 0x40000;
9563	9140
r4679	r4680
9583	9160
9584	9161	static DRIVER_INIT( eightfrc )
9585	9162	{
9586		memory_install_read16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x500004, 0x500005, 0, 0, SMH_NOP);   // watchdog??
	9163	memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x500004, 0x500005, 0, 0, (read16_space_func)SMH_NOP);   // watchdog??
9587	9164	}
9588	9165
9589	9166
9590	9167	static DRIVER_INIT( zombraid )
9591	9168	{
9592		memory_install_read16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xf00002, 0xf00003, 0, 0, zombraid_gun_r);
9593		memory_install_write16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xf00000, 0xf00001, 0, 0, zombraid_gun_w);
	9169	memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xf00002, 0xf00003, 0, 0, zombraid_gun_r);
	9170	memory_install_write16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xf00000, 0xf00001, 0, 0, zombraid_gun_w);
9594	9171	}
9595	9172
9596	9173
r4679	r4680
9608	9185
9609	9186	static DRIVER_INIT( rezon )
9610	9187	{
9611		memory_install_read16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x500006, 0x500007, 0, 0, SMH_NOP);   // irq ack?
	9188	memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x500006, 0x500007, 0, 0, (read16_space_func)SMH_NOP);   // irq ack?
9612	9189	}
9613	9190
9614	9191	static DRIVER_INIT(wiggie)
r4679	r4680
9640	9217	}
9641	9218
9642	9219	/* X1_010 is not used. */
9643		memory_install_readwrite16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x100000, 0x103fff, 0, 0, SMH_NOP, SMH_NOP);
	9220	memory_install_readwrite16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x100000, 0x103fff, 0, 0, (read16_space_func)SMH_NOP, (write16_space_func)SMH_NOP);
9644	9221
9645		memory_install_write16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xB00008, 0xB00009, 0, 0, wiggie_soundlatch_w);
	9222	memory_install_write16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xB00008, 0xB00009, 0, 0, wiggie_soundlatch_w);
9646	9223
9647	9224	}
9648	9225
r4679	r4680
9653	9230	RAM[0x1078/2] = 0x4e71;
9654	9231
9655	9232	// fixed priorities?
9656		seta_vregs = (UINT16*)auto_malloc(sizeof(UINT16)*3);
	9233	seta_vregs = auto_alloc_array(machine, UINT16, 3);
9657	9234	seta_vregs[0] = seta_vregs[1] = seta_vregs[2] = 0;
9658	9235
9659	9236	DRIVER_INIT_CALL(blandia);

src/mame/drivers/laserbat.c

r4679	r4680
508	508
509	509	bg_tilemap = tilemap_create(machine, get_tile_info,tilemap_scan_rows,8,8,32,32);
510	510
511		videoram = (UINT8 *)auto_malloc(0x400);
512		colorram = (UINT8 *)auto_malloc(0x400);
	511	videoram = auto_alloc_array(machine, UINT8, 0x400);
	512	colorram = auto_alloc_array(machine, UINT8, 0x400);
513	513
514	514	/* configure the S2636 chips */
515		s2636_0 = s2636_config(s2636_0_ram, screen_height, screen_width, 0, -19);
516		s2636_1 = s2636_config(s2636_1_ram, screen_height, screen_width, 0, -19);
517		s2636_2 = s2636_config(s2636_2_ram, screen_height, screen_width, 0, -19);
	515	s2636_0 = s2636_config(machine, s2636_0_ram, screen_height, screen_width, 0, -19);
	516	s2636_1 = s2636_config(machine, s2636_1_ram, screen_height, screen_width, 0, -19);
	517	s2636_2 = s2636_config(machine, s2636_2_ram, screen_height, screen_width, 0, -19);
518	518	}
519	519
520	520	static VIDEO_UPDATE( laserbat )
r4679	r4680
595	595
596	596	/* Cat'N Mouse sound ***********************************/
597	597
598		static WRITE_LINE_DEVICE_HANDLER( zaccaria_irq0a ) { cpu_set_input_line(device->machine->cpu[1], INPUT_LINE_NMI, state ? ASSERT_LINE : CLEAR_LINE); }
599		static WRITE_LINE_DEVICE_HANDLER( zaccaria_irq0b ) { cpu_set_input_line(device->machine->cpu[1],0,state ? ASSERT_LINE : CLEAR_LINE); }
	598	static WRITE_LINE_DEVICE_HANDLER( zaccaria_irq0a ) { cputag_set_input_line(device->machine, "audiocpu", INPUT_LINE_NMI, state ? ASSERT_LINE : CLEAR_LINE); }
	599	static WRITE_LINE_DEVICE_HANDLER( zaccaria_irq0b ) { cputag_set_input_line(device->machine, "audiocpu", 0, state ? ASSERT_LINE : CLEAR_LINE); }
600	600
601	601	static int active_8910,port0a;
602	602

src/mame/drivers/trvquest.c

r4679	r4680
42	42
43	43	static READ8_HANDLER( trvquest_question_r )
44	44	{
45		gameplan_state *state = space->machine->driver_data;
	45	gameplan_state *state = (gameplan_state *)space->machine->driver_data;
46	46
47	47	return memory_region(space->machine, "questions")[*state->trvquest_question * 0x2000 + offset];
48	48	}
r4679	r4680
148	148
149	149	static TIMER_CALLBACK( via_irq_delayed )
150	150	{
151		cpu_set_input_line(machine->cpu[0], 0, param);
	151	cputag_set_input_line(machine, "maincpu", 0, param);
152	152	}
153	153
154	154	static void via_irq(const device_config *device, int state)

src/mame/drivers/ssf2md.c

r4679	r4680
18	18
19	19	static DRIVER_INIT( ssf2ghw )
20	20	{
21		memory_install_write16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xA130F0, 0xA130FF, 0, 0, SMH_NOP); // custom banking is disabled (!)
22		memory_install_readwrite16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x400000, 0x5fffff, 0, 0, SMH_BANK5, SMH_UNMAP);
	21	memory_install_write16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xA130F0, 0xA130FF, 0, 0, (write16_space_func)SMH_NOP); // custom banking is disabled (!)
	22	memory_install_readwrite16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x400000, 0x5fffff, 0, 0, (read16_space_func)SMH_BANK(5), (write16_space_func)SMH_UNMAP);
23	23
24		memory_set_bankptr(machine,  5, memory_region( machine, "maincpu" )+0x400000 );
	24	memory_set_bankptr(machine,  5, memory_region( machine, "maincpu" ) + 0x400000 );
25	25
26		memory_install_read16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x770070, 0x770075, 0, 0, ssf2ghw_dsw_r );
	26	memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x770070, 0x770075, 0, 0, ssf2ghw_dsw_r );
27	27
28	28	DRIVER_INIT_CALL(megadrij);
29	29

src/mame/drivers/tnzs.c

r4679	r4680
664	664	size++;
665	665	}
666	666	}
667		sampledata[i] = auto_malloc(size * sizeof(sampledata[0]));
	667	sampledata[i] = auto_alloc_array(machine, INT16, size);
668	668	samplesize[i] = size;
669	669
670	670	if (start < 0x100) start = size = 0;
r4679	r4680
810	810
811	811	static WRITE8_HANDLER( tnzsb_sound_command_w )
812	812	{
813		soundlatch_w(space,offset,data);
814		cpu_set_input_line_and_vector(space->machine->cpu[2],0,HOLD_LINE,0xff);
	813	soundlatch_w(space, offset, data);
	814	cputag_set_input_line_and_vector(space->machine, "audiocpu", 0, HOLD_LINE, 0xff);
815	815	}
816	816
817	817	static ADDRESS_MAP_START( tnzsb_cpu1_map, ADDRESS_SPACE_PROGRAM, 8 )
r4679	r4680
890	890
891	891	static ADDRESS_MAP_START( jpopnics_main_map, ADDRESS_SPACE_PROGRAM, 8 )
892	892	AM_RANGE(0x0000, 0x7fff) AM_ROM
893		AM_RANGE(0x8000, 0xbfff) AM_READWRITE(SMH_BANK1, SMH_ROM)
	893	AM_RANGE(0x8000, 0xbfff) AM_READWRITE(SMH_BANK(1), SMH_ROM)
894	894	AM_RANGE(0xc000, 0xdfff) AM_RAM AM_BASE(&tnzs_objram)
895	895	AM_RANGE(0xe000, 0xefff) AM_RAM AM_SHARE(1) /* WORK RAM (shared by the 2 z80's) */
896	896	AM_RANGE(0xf000, 0xf1ff) AM_RAM AM_BASE(&tnzs_vdcram)    /* VDC RAM */
r4679	r4680
911	911
912	912	static ADDRESS_MAP_START( jpopnics_sub_map, ADDRESS_SPACE_PROGRAM, 8 )
913	913	AM_RANGE(0x0000, 0x7fff) AM_ROM
914		AM_RANGE(0x8000, 0x9fff) AM_READWRITE(SMH_BANK2, SMH_ROM)
	914	AM_RANGE(0x8000, 0x9fff) AM_READWRITE(SMH_BANK(2), SMH_ROM)
915	915
916	916	AM_RANGE(0xa000, 0xa000) AM_WRITE(jpopnics_subbankswitch_w)
917	917	AM_RANGE(0xb000, 0xb001) AM_DEVREADWRITE("ym", ym2151_r, ym2151_w)
r4679	r4680
1560	1560	/* handler called by the 2203 emulator when the internal timers cause an IRQ */
1561	1561	static void irqhandler(const device_config *device, int irq)
1562	1562	{
1563		cpu_set_input_line(device->machine->cpu[2], INPUT_LINE_NMI, irq ? ASSERT_LINE : CLEAR_LINE);
	1563	cputag_set_input_line(device->machine, "audiocpu", INPUT_LINE_NMI, irq ? ASSERT_LINE : CLEAR_LINE);
1564	1564	}
1565	1565
1566	1566	static const ym2203_interface kageki_ym2203_interface =

src/mame/drivers/tp84.c

r4679	r4680
130	130
131	131	static WRITE8_HANDLER( tp84_sh_irqtrigger_w )
132	132	{
133		cpu_set_input_line_and_vector(space->machine->cpu[2],0,HOLD_LINE,0xff);
	133	cputag_set_input_line_and_vector(space->machine, "audiocpu",0,HOLD_LINE,0xff);
134	134	}
135	135
136	136

src/mame/drivers/rohga.c

r4679	r4680
127	127
128	128	/**********************************************************************************/
129	129
130		static ADDRESS_MAP_START( rohga_readmem, ADDRESS_SPACE_PROGRAM, 16 )
131		AM_RANGE(0x000000, 0x1fffff) AM_READ(SMH_ROM)
132		AM_RANGE(0x280000, 0x2807ff) AM_MIRROR(0x800) AM_READ(deco16_104_rohga_prot_r) /* Protection device */
133		AM_RANGE(0x2c0000, 0x2c0001) AM_READ_PORT("DSW3")
134		AM_RANGE(0x321100, 0x321101) AM_READNOP /* Irq ack?  Value not used */
135		AM_RANGE(0x3c0000, 0x3c1fff) AM_READ(SMH_RAM)
136		AM_RANGE(0x3c2000, 0x3c2fff) AM_READ(SMH_RAM)
137		AM_RANGE(0x3c4000, 0x3c4fff) AM_READ(SMH_RAM)
138		AM_RANGE(0x3c6000, 0x3c6fff) AM_READ(SMH_RAM)
139		AM_RANGE(0x3c8000, 0x3c8fff) AM_MIRROR(0x1000) AM_READ(SMH_RAM)
140		AM_RANGE(0x3ca000, 0x3cafff) AM_MIRROR(0x1000) AM_READ(SMH_RAM)
141		AM_RANGE(0x3cc000, 0x3ccfff) AM_MIRROR(0x1000) AM_READ(SMH_RAM)
142		AM_RANGE(0x3ce000, 0x3cefff) AM_MIRROR(0x1000) AM_READ(SMH_RAM)
143		AM_RANGE(0x3d0000, 0x3d0fff) AM_READ(SMH_RAM)
144		AM_RANGE(0x3e0000, 0x3e1fff) AM_READ(SMH_RAM)
145		AM_RANGE(0x3f0000, 0x3f3fff) AM_READ(SMH_RAM)
146		ADDRESS_MAP_END
	130	static ADDRESS_MAP_START( rohga_map, ADDRESS_SPACE_PROGRAM, 16 )
	131	AM_RANGE(0x000000, 0x1fffff) AM_ROM
147	132
148		static ADDRESS_MAP_START( rohga_writemem, ADDRESS_SPACE_PROGRAM, 16 )
149		AM_RANGE(0x000000, 0x1fffff) AM_WRITE(SMH_ROM)
150		AM_RANGE(0x200000, 0x20000f) AM_WRITE(SMH_RAM) AM_BASE(&deco16_pf12_control)
151		AM_RANGE(0x240000, 0x24000f) AM_WRITE(SMH_RAM) AM_BASE(&deco16_pf34_control)
152		AM_RANGE(0x280000, 0x2807ff) AM_MIRROR(0x800) AM_WRITE(deco16_104_rohga_prot_w) AM_BASE(&deco16_prot_ram) /* Protection writes */
	133	AM_RANGE(0x200000, 0x20000f) AM_WRITEONLY AM_BASE(&deco16_pf12_control)
	134	AM_RANGE(0x240000, 0x24000f) AM_WRITEONLY AM_BASE(&deco16_pf34_control)
153	135
	136	AM_RANGE(0x280000, 0x2807ff) AM_MIRROR(0x800) AM_READWRITE(deco16_104_rohga_prot_r,deco16_104_rohga_prot_w)  AM_BASE(&deco16_prot_ram) /* Protection device */
	137
	138	AM_RANGE(0x2c0000, 0x2c0001) AM_READ_PORT("DSW3")
	139
154	140	AM_RANGE(0x300000, 0x300001) AM_WRITE(rohga_buffer_spriteram16_w) /* write 1 for sprite dma */
155	141	AM_RANGE(0x310000, 0x310009) AM_WRITENOP /* Palette control? */
156	142	AM_RANGE(0x31000a, 0x31000b) AM_WRITE(deco16_palette_dma_w) /* Write 1111 for dma?  (Or any value?) */
157	143	AM_RANGE(0x320000, 0x320001) AM_WRITENOP /* ? */
158	144	AM_RANGE(0x322000, 0x322001) AM_WRITE(deco16_priority_w)
	145	AM_RANGE(0x321100, 0x321101) AM_READNOP /* Irq ack?  Value not used */
159	146
160		AM_RANGE(0x3c0000, 0x3c1fff) AM_WRITE(deco16_pf1_data_w) AM_BASE(&deco16_pf1_data)
161		AM_RANGE(0x3c2000, 0x3c2fff) AM_WRITE(deco16_pf2_data_w) AM_BASE(&deco16_pf2_data)
162		AM_RANGE(0x3c4000, 0x3c4fff) AM_WRITE(deco16_pf3_data_w) AM_BASE(&deco16_pf3_data)
163		AM_RANGE(0x3c6000, 0x3c6fff) AM_WRITE(deco16_pf4_data_w) AM_BASE(&deco16_pf4_data)
164		AM_RANGE(0x3c8000, 0x3c8fff) AM_MIRROR(0x1000) AM_WRITE(SMH_RAM) AM_BASE(&deco16_pf1_rowscroll)
165		AM_RANGE(0x3ca000, 0x3cafff) AM_MIRROR(0x1000) AM_WRITE(SMH_RAM) AM_BASE(&deco16_pf2_rowscroll)
166		AM_RANGE(0x3cc000, 0x3ccfff) AM_MIRROR(0x1000) AM_WRITE(SMH_RAM) AM_BASE(&deco16_pf3_rowscroll)
167		AM_RANGE(0x3ce000, 0x3cefff) AM_MIRROR(0x1000) AM_WRITE(SMH_RAM) AM_BASE(&deco16_pf4_rowscroll)
168		AM_RANGE(0x3d0000, 0x3d07ff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)
169		AM_RANGE(0x3e0000, 0x3e1fff) AM_WRITE(deco16_buffered_palette_w) AM_BASE(&paletteram16)
170		AM_RANGE(0x3f0000, 0x3f3fff) AM_WRITE(SMH_RAM) /* Main ram */
171		ADDRESS_MAP_END
	147	AM_RANGE(0x3c0000, 0x3c1fff) AM_RAM_WRITE(deco16_pf1_data_w) AM_BASE(&deco16_pf1_data)
	148	AM_RANGE(0x3c2000, 0x3c2fff) AM_RAM_WRITE(deco16_pf2_data_w) AM_BASE(&deco16_pf2_data)
	149	AM_RANGE(0x3c4000, 0x3c4fff) AM_RAM_WRITE(deco16_pf3_data_w) AM_BASE(&deco16_pf3_data)
	150	AM_RANGE(0x3c6000, 0x3c6fff) AM_RAM_WRITE(deco16_pf4_data_w) AM_BASE(&deco16_pf4_data)
172	151
173		static ADDRESS_MAP_START( wizdfire_readmem, ADDRESS_SPACE_PROGRAM, 16 )
174		AM_RANGE(0x000000, 0x1fffff) AM_READ(SMH_ROM)
175		AM_RANGE(0x200000, 0x200fff) AM_READ(SMH_RAM)
176		AM_RANGE(0x202000, 0x202fff) AM_READ(SMH_RAM)
177		AM_RANGE(0x208000, 0x208fff) AM_READ(SMH_RAM)
178		AM_RANGE(0x20a000, 0x20afff) AM_READ(SMH_RAM)
179		AM_RANGE(0x20c000, 0x20cfff) AM_READ(SMH_RAM)
180		AM_RANGE(0x20e000, 0x20efff) AM_READ(SMH_RAM)
181		AM_RANGE(0x340000, 0x3407ff) AM_READ(SMH_RAM)
182		AM_RANGE(0x360000, 0x3607ff) AM_READ(SMH_RAM)
183		AM_RANGE(0x380000, 0x381fff) AM_READ(SMH_RAM)
184		AM_RANGE(0xfdc000, 0xfe3fff) AM_READ(SMH_RAM)
185		AM_RANGE(0xfe4000, 0xfe47ff) AM_READ(deco16_104_prot_r) /* Protection device */
186		AM_RANGE(0xfe5000, 0xfeffff) AM_READ(SMH_RAM)
	152	AM_RANGE(0x3c8000, 0x3c8fff) AM_MIRROR(0x1000) AM_RAM AM_BASE(&deco16_pf1_rowscroll)
	153	AM_RANGE(0x3ca000, 0x3cafff) AM_MIRROR(0x1000) AM_RAM AM_BASE(&deco16_pf2_rowscroll)
	154	AM_RANGE(0x3cc000, 0x3ccfff) AM_MIRROR(0x1000) AM_RAM AM_BASE(&deco16_pf3_rowscroll)
	155	AM_RANGE(0x3ce000, 0x3cefff) AM_MIRROR(0x1000) AM_RAM AM_BASE(&deco16_pf4_rowscroll)
	156
	157	AM_RANGE(0x3d0000, 0x3d07ff) AM_RAM AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)
	158	AM_RANGE(0x3e0000, 0x3e1fff) AM_RAM_WRITE(deco16_buffered_palette_w) AM_BASE(&paletteram16)
	159	AM_RANGE(0x3f0000, 0x3f3fff) AM_RAM /* Main ram */
187	160	ADDRESS_MAP_END
188	161
189		static ADDRESS_MAP_START( wizdfire_writemem, ADDRESS_SPACE_PROGRAM, 16 )
190		AM_RANGE(0x000000, 0x1fffff) AM_WRITE(SMH_ROM)
	162	static ADDRESS_MAP_START( wizdfire_map, ADDRESS_SPACE_PROGRAM, 16 )
	163	AM_RANGE(0x000000, 0x1fffff) AM_ROM
191	164
192		AM_RANGE(0x200000, 0x200fff) AM_WRITE(deco16_pf1_data_w) AM_BASE(&deco16_pf1_data)
193		AM_RANGE(0x202000, 0x202fff) AM_WRITE(deco16_pf2_data_w) AM_BASE(&deco16_pf2_data)
194		AM_RANGE(0x208000, 0x208fff) AM_WRITE(deco16_pf3_data_w) AM_BASE(&deco16_pf3_data)
195		AM_RANGE(0x20a000, 0x20afff) AM_WRITE(deco16_pf4_data_w) AM_BASE(&deco16_pf4_data)
	165	AM_RANGE(0x200000, 0x200fff) AM_RAM_WRITE(deco16_pf1_data_w) AM_BASE(&deco16_pf1_data)
	166	AM_RANGE(0x202000, 0x202fff) AM_RAM_WRITE(deco16_pf2_data_w) AM_BASE(&deco16_pf2_data)
	167	AM_RANGE(0x208000, 0x208fff) AM_RAM_WRITE(deco16_pf3_data_w) AM_BASE(&deco16_pf3_data)
	168	AM_RANGE(0x20a000, 0x20afff) AM_RAM_WRITE(deco16_pf4_data_w) AM_BASE(&deco16_pf4_data)
196	169
197		AM_RANGE(0x20b000, 0x20b3ff) AM_WRITE(SMH_RAM) /* ? Always 0 written */
198		AM_RANGE(0x20c000, 0x20c7ff) AM_WRITE(SMH_RAM) AM_BASE(&deco16_pf3_rowscroll)
199		AM_RANGE(0x20e000, 0x20e7ff) AM_WRITE(SMH_RAM) AM_BASE(&deco16_pf4_rowscroll)
	170	AM_RANGE(0x20b000, 0x20b3ff) AM_WRITEONLY /* ? Always 0 written */
	171	AM_RANGE(0x20c000, 0x20c7ff) AM_RAM AM_BASE(&deco16_pf3_rowscroll)
	172	AM_RANGE(0x20e000, 0x20e7ff) AM_RAM AM_BASE(&deco16_pf4_rowscroll)
200	173
201		AM_RANGE(0x300000, 0x30000f) AM_WRITE(SMH_RAM) AM_BASE(&deco16_pf12_control)
202		AM_RANGE(0x310000, 0x31000f) AM_WRITE(SMH_RAM) AM_BASE(&deco16_pf34_control)
	174	AM_RANGE(0x300000, 0x30000f) AM_WRITEONLY AM_BASE(&deco16_pf12_control)
	175	AM_RANGE(0x310000, 0x31000f) AM_WRITEONLY AM_BASE(&deco16_pf34_control)
203	176
204	177	AM_RANGE(0x320000, 0x320001) AM_WRITE(deco16_priority_w) /* Priority */
205	178	AM_RANGE(0x320002, 0x320003) AM_WRITENOP /* ? */
206	179	AM_RANGE(0x320004, 0x320005) AM_WRITENOP /* VBL IRQ ack */
207	180
208		AM_RANGE(0x340000, 0x3407ff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)
	181	AM_RANGE(0x340000, 0x3407ff) AM_RAM AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)
209	182	AM_RANGE(0x350000, 0x350001) AM_WRITE(buffer_spriteram16_w) /* Triggers DMA for spriteram */
210		AM_RANGE(0x360000, 0x3607ff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16_2) AM_SIZE(&spriteram_2_size)
	183	AM_RANGE(0x360000, 0x3607ff) AM_RAM AM_BASE(&spriteram16_2) AM_SIZE(&spriteram_2_size)
211	184	AM_RANGE(0x370000, 0x370001) AM_WRITE(buffer_spriteram16_2_w) /* Triggers DMA for spriteram */
212	185
213		AM_RANGE(0x380000, 0x381fff) AM_WRITE(deco16_buffered_palette_w) AM_BASE(&paletteram16)
	186	AM_RANGE(0x380000, 0x381fff) AM_RAM_WRITE(deco16_buffered_palette_w) AM_BASE(&paletteram16)
214	187	AM_RANGE(0x390008, 0x390009) AM_WRITE(deco16_palette_dma_w)
215	188
216		AM_RANGE(0xfe4000, 0xfe47ff) AM_WRITE(deco16_104_prot_w) AM_BASE(&deco16_prot_ram) /* Protection writes */
217		AM_RANGE(0xfdc000, 0xfeffff) AM_WRITE(SMH_RAM) /* Main ram */
	189	AM_RANGE(0xfe4000, 0xfe47ff) AM_READWRITE(deco16_104_prot_r,deco16_104_prot_w) AM_BASE(&deco16_prot_ram) /* Protection device */
	190	AM_RANGE(0xfdc000, 0xffffff) AM_RAM
218	191	ADDRESS_MAP_END
219	192
220		static ADDRESS_MAP_START( nitrobal_readmem, ADDRESS_SPACE_PROGRAM, 16 )
221		AM_RANGE(0x000000, 0x1fffff) AM_READ(SMH_ROM)
	193	static ADDRESS_MAP_START( nitrobal_map, ADDRESS_SPACE_PROGRAM, 16 )
	194	AM_RANGE(0x000000, 0x1fffff) AM_ROM
222	195
223		AM_RANGE(0x200000, 0x200fff) AM_READ(SMH_RAM)
224		AM_RANGE(0x202000, 0x202fff) AM_READ(SMH_RAM)
225		AM_RANGE(0x204000, 0x2047ff) AM_READ(SMH_RAM)
226		AM_RANGE(0x206000, 0x2067ff) AM_READ(SMH_RAM)
227		AM_RANGE(0x208000, 0x208fff) AM_READ(SMH_RAM)
228		AM_RANGE(0x20a000, 0x20afff) AM_READ(SMH_RAM)
229		AM_RANGE(0x20c000, 0x20c7ff) AM_READ(SMH_RAM)
230		AM_RANGE(0x20e000, 0x20e7ff) AM_READ(SMH_RAM)
	196	AM_RANGE(0x200000, 0x200fff) AM_MIRROR(0x1000) AM_RAM_WRITE(deco16_pf1_data_w) AM_BASE(&deco16_pf1_data)
	197	AM_RANGE(0x202000, 0x2027ff) AM_MIRROR(0x800) AM_RAM_WRITE(deco16_pf2_data_w) AM_BASE(&deco16_pf2_data)
	198	AM_RANGE(0x208000, 0x2087ff) AM_MIRROR(0x800) AM_RAM_WRITE(deco16_pf3_data_w) AM_BASE(&deco16_pf3_data)
	199	AM_RANGE(0x20a000, 0x20a7ff) AM_MIRROR(0x800) AM_RAM_WRITE(deco16_pf4_data_w) AM_BASE(&deco16_pf4_data)
231	200
232		AM_RANGE(0x300000, 0x30000f) AM_READ(SMH_RAM)
233		AM_RANGE(0x310000, 0x31000f) AM_READ(SMH_RAM)
234		AM_RANGE(0x320000, 0x320001) AM_READ_PORT("DSW3")
	201	AM_RANGE(0x204000, 0x2047ff) AM_RAM AM_BASE(&deco16_pf1_rowscroll)
	202	AM_RANGE(0x206000, 0x2067ff) AM_RAM AM_BASE(&deco16_pf2_rowscroll)
	203	AM_RANGE(0x20c000, 0x20c7ff) AM_RAM AM_BASE(&deco16_pf3_rowscroll)
	204	AM_RANGE(0x20e000, 0x20e7ff) AM_RAM AM_BASE(&deco16_pf4_rowscroll)
235	205
236		AM_RANGE(0x340000, 0x3407ff) AM_READ(SMH_RAM)
237		AM_RANGE(0x360000, 0x3607ff) AM_READ(SMH_RAM)
238		AM_RANGE(0x380000, 0x381fff) AM_READ(SMH_RAM)
	206	AM_RANGE(0x300000, 0x30000f) AM_WRITEONLY AM_BASE(&deco16_pf12_control)
	207	AM_RANGE(0x310000, 0x31000f) AM_WRITEONLY AM_BASE(&deco16_pf34_control)
239	208
240		AM_RANGE(0xfec000, 0xff3fff) AM_READ(SMH_RAM)
241		AM_RANGE(0xff4000, 0xff47ff) AM_READ(deco16_146_nitroball_prot_r) /* Protection device */
242		AM_RANGE(0xff8000, 0xffffff) AM_READ(SMH_RAM)
243		ADDRESS_MAP_END
244
245		static ADDRESS_MAP_START( nitrobal_writemem, ADDRESS_SPACE_PROGRAM, 16 )
246		AM_RANGE(0x000000, 0x1fffff) AM_WRITE(SMH_ROM)
247
248		AM_RANGE(0x200000, 0x200fff) AM_MIRROR(0x1000) AM_WRITE(deco16_pf1_data_w) AM_BASE(&deco16_pf1_data)
249		AM_RANGE(0x202000, 0x2027ff) AM_MIRROR(0x800) AM_WRITE(deco16_pf2_data_w) AM_BASE(&deco16_pf2_data)
250		AM_RANGE(0x208000, 0x2087ff) AM_MIRROR(0x800) AM_WRITE(deco16_pf3_data_w) AM_BASE(&deco16_pf3_data)
251		AM_RANGE(0x20a000, 0x20a7ff) AM_MIRROR(0x800) AM_WRITE(deco16_pf4_data_w) AM_BASE(&deco16_pf4_data)
252
253		AM_RANGE(0x204000, 0x2047ff) AM_WRITE(SMH_RAM) AM_BASE(&deco16_pf1_rowscroll)
254		AM_RANGE(0x206000, 0x2067ff) AM_WRITE(SMH_RAM) AM_BASE(&deco16_pf2_rowscroll)
255		AM_RANGE(0x20c000, 0x20c7ff) AM_WRITE(SMH_RAM) AM_BASE(&deco16_pf3_rowscroll)
256		AM_RANGE(0x20e000, 0x20e7ff) AM_WRITE(SMH_RAM) AM_BASE(&deco16_pf4_rowscroll)
257
258		AM_RANGE(0x300000, 0x30000f) AM_WRITE(SMH_RAM) AM_BASE(&deco16_pf12_control)
259		AM_RANGE(0x310000, 0x31000f) AM_WRITE(SMH_RAM) AM_BASE(&deco16_pf34_control)
260
261		AM_RANGE(0x320000, 0x320001) AM_WRITE(deco16_priority_w) /* Priority */
	209	AM_RANGE(0x320000, 0x320001) AM_READ_PORT("DSW3") AM_WRITE(deco16_priority_w) /* Priority */
262	210	AM_RANGE(0x320002, 0x320003) AM_WRITENOP /* ? */
263	211	AM_RANGE(0x320004, 0x320005) AM_WRITENOP /* VBL IRQ ack */
264	212
265		AM_RANGE(0x340000, 0x3407ff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)
	213	AM_RANGE(0x340000, 0x3407ff) AM_RAM AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)
266	214	AM_RANGE(0x350000, 0x350001) AM_WRITE(buffer_spriteram16_w) /* Triggers DMA for spriteram */
267		AM_RANGE(0x360000, 0x3607ff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16_2) AM_SIZE(&spriteram_2_size)
	215	AM_RANGE(0x360000, 0x3607ff) AM_RAM AM_BASE(&spriteram16_2) AM_SIZE(&spriteram_2_size)
268	216	AM_RANGE(0x370000, 0x370001) AM_WRITE(buffer_spriteram16_2_w) /* Triggers DMA for spriteram */
269	217
270		AM_RANGE(0x380000, 0x381fff) AM_WRITE(deco16_buffered_palette_w) AM_BASE(&paletteram16)
	218	AM_RANGE(0x380000, 0x381fff) AM_RAM_WRITE(deco16_buffered_palette_w) AM_BASE(&paletteram16)
271	219	AM_RANGE(0x390008, 0x390009) AM_WRITE(deco16_palette_dma_w)
272	220
273		AM_RANGE(0xfec000, 0xff3fff) AM_WRITE(SMH_RAM)
274		AM_RANGE(0xff4000, 0xff47ff) AM_MIRROR(0x800) AM_WRITE(deco16_146_nitroball_prot_w) AM_BASE(&deco16_prot_ram) /* Protection writes */
275		AM_RANGE(0xff8000, 0xffffff) AM_WRITE(SMH_RAM) /* Main ram */
	221	AM_RANGE(0xfec000, 0xffffff) AM_RAM
	222	AM_RANGE(0xff4000, 0xff47ff) AM_MIRROR(0x800) AM_READWRITE(deco16_146_nitroball_prot_r,deco16_146_nitroball_prot_w) AM_BASE(&deco16_prot_ram) /* Protection device */
276	223	ADDRESS_MAP_END
277	224
278		static ADDRESS_MAP_START( schmeisr_readmem, ADDRESS_SPACE_PROGRAM, 16 )
279		AM_RANGE(0x000000, 0x0fffff) AM_READ(SMH_ROM)
280		AM_RANGE(0x280000, 0x2807ff) AM_READ(deco16_104_rohga_prot_r) /* Protection device */
	225	static ADDRESS_MAP_START( schmeisr_map, ADDRESS_SPACE_PROGRAM, 16 )
	226	AM_RANGE(0x000000, 0x0fffff) AM_ROM
	227	AM_RANGE(0x200000, 0x20000f) AM_WRITEONLY AM_BASE(&deco16_pf12_control)
	228	AM_RANGE(0x240000, 0x24000f) AM_WRITEONLY AM_BASE(&deco16_pf34_control)
	229	AM_RANGE(0x280000, 0x2807ff) AM_MIRROR(0x800) AM_READWRITE(deco16_104_rohga_prot_r,deco16_104_rohga_prot_w) AM_BASE(&deco16_prot_ram) /* Protection device */
	230
281	231	AM_RANGE(0x2c0000, 0x2c0001) AM_READ_PORT("DSW3")
282		AM_RANGE(0x300000, 0x300001) AM_READ_PORT("DSW3")
	232	AM_RANGE(0x300000, 0x300001) AM_READ_PORT("DSW3")  AM_WRITE(rohga_buffer_spriteram16_w) /* write 1 for sprite dma */
283	233	AM_RANGE(0x310002, 0x310003) AM_READ_PORT("IN1")
284		AM_RANGE(0x321100, 0x321101) AM_READNOP /* Irq ack?  Value not used */
285		AM_RANGE(0x3c0000, 0x3c1fff) AM_READ(SMH_RAM)
286		AM_RANGE(0x3c2000, 0x3c2fff) AM_READ(SMH_RAM)
287		AM_RANGE(0x3c4000, 0x3c4fff) AM_READ(SMH_RAM)
288		AM_RANGE(0x3c6000, 0x3c6fff) AM_READ(SMH_RAM)
289		AM_RANGE(0x3c8000, 0x3c8fff) AM_MIRROR(0x1000) AM_READ(SMH_RAM)
290		AM_RANGE(0x3ca000, 0x3cafff) AM_MIRROR(0x1000) AM_READ(SMH_RAM)
291		AM_RANGE(0x3cc000, 0x3ccfff) AM_MIRROR(0x1000) AM_READ(SMH_RAM)
292		AM_RANGE(0x3ce000, 0x3cefff) AM_MIRROR(0x1000) AM_READ(SMH_RAM)
293		AM_RANGE(0x3d0000, 0x3d07ff) AM_READ(SMH_RAM)
294		AM_RANGE(0x3e0000, 0x3e1fff) AM_MIRROR(0x2000) AM_READ(SMH_RAM)
295		AM_RANGE(0xff0000, 0xff7fff) AM_READ(SMH_RAM)
296		ADDRESS_MAP_END
297
298		static ADDRESS_MAP_START( schmeisr_writemem, ADDRESS_SPACE_PROGRAM, 16 )
299		AM_RANGE(0x000000, 0x1fffff) AM_WRITE(SMH_ROM)
300		AM_RANGE(0x200000, 0x20000f) AM_WRITE(SMH_RAM) AM_BASE(&deco16_pf12_control)
301		AM_RANGE(0x240000, 0x24000f) AM_WRITE(SMH_RAM) AM_BASE(&deco16_pf34_control)
302		AM_RANGE(0x280000, 0x2807ff) AM_MIRROR(0x800) AM_WRITE(deco16_104_rohga_prot_w) AM_BASE(&deco16_prot_ram) /* Protection writes */
303
304		AM_RANGE(0x300000, 0x300001) AM_WRITE(rohga_buffer_spriteram16_w) /* write 1 for sprite dma */
305	234	AM_RANGE(0x310000, 0x310009) AM_WRITENOP /* Palette control? */
306	235	AM_RANGE(0x31000a, 0x31000b) AM_WRITE(deco16_palette_dma_w) /* Write 1111 for dma?  (Or any value?) */
307	236	AM_RANGE(0x320000, 0x320001) AM_WRITENOP /* ? */
308	237	AM_RANGE(0x322000, 0x322001) AM_WRITE(deco16_priority_w)
	238	AM_RANGE(0x321100, 0x321101) AM_READNOP /* Irq ack?  Value not used */
309	239
310		AM_RANGE(0x3c0000, 0x3c1fff) AM_WRITE(deco16_pf1_data_w) AM_BASE(&deco16_pf1_data)
311		AM_RANGE(0x3c2000, 0x3c2fff) AM_WRITE(deco16_pf2_data_w) AM_BASE(&deco16_pf2_data)
312		AM_RANGE(0x3c4000, 0x3c4fff) AM_WRITE(deco16_pf3_data_w) AM_BASE(&deco16_pf3_data)
313		AM_RANGE(0x3c6000, 0x3c6fff) AM_WRITE(deco16_pf4_data_w) AM_BASE(&deco16_pf4_data)
314		AM_RANGE(0x3c8000, 0x3c8fff) AM_MIRROR(0x1000) AM_WRITE(SMH_RAM) AM_BASE(&deco16_pf1_rowscroll)
315		AM_RANGE(0x3ca000, 0x3cafff) AM_MIRROR(0x1000) AM_WRITE(SMH_RAM) AM_BASE(&deco16_pf2_rowscroll)
316		AM_RANGE(0x3cc000, 0x3ccfff) AM_MIRROR(0x1000) AM_WRITE(SMH_RAM) AM_BASE(&deco16_pf3_rowscroll)
317		AM_RANGE(0x3ce000, 0x3cefff) AM_MIRROR(0x1000) AM_WRITE(SMH_RAM) AM_BASE(&deco16_pf4_rowscroll)
318		AM_RANGE(0x3d0000, 0x3d07ff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)
319		AM_RANGE(0x3e0000, 0x3e1fff) AM_MIRROR(0x2000) AM_WRITE(deco16_buffered_palette_w) AM_BASE(&paletteram16)
320		AM_RANGE(0xff0000, 0xff7fff) AM_WRITE(SMH_RAM) /* Main ram */
	240	AM_RANGE(0x3c0000, 0x3c1fff) AM_RAM_WRITE(deco16_pf1_data_w) AM_BASE(&deco16_pf1_data)
	241	AM_RANGE(0x3c2000, 0x3c2fff) AM_RAM_WRITE(deco16_pf2_data_w) AM_BASE(&deco16_pf2_data)
	242	AM_RANGE(0x3c4000, 0x3c4fff) AM_RAM_WRITE(deco16_pf3_data_w) AM_BASE(&deco16_pf3_data)
	243	AM_RANGE(0x3c6000, 0x3c6fff) AM_RAM_WRITE(deco16_pf4_data_w) AM_BASE(&deco16_pf4_data)
	244	AM_RANGE(0x3c8000, 0x3c8fff) AM_MIRROR(0x1000) AM_RAM AM_BASE(&deco16_pf1_rowscroll)
	245	AM_RANGE(0x3ca000, 0x3cafff) AM_MIRROR(0x1000) AM_RAM AM_BASE(&deco16_pf2_rowscroll)
	246	AM_RANGE(0x3cc000, 0x3ccfff) AM_MIRROR(0x1000) AM_RAM AM_BASE(&deco16_pf3_rowscroll)
	247	AM_RANGE(0x3ce000, 0x3cefff) AM_MIRROR(0x1000) AM_RAM AM_BASE(&deco16_pf4_rowscroll)
	248
	249	AM_RANGE(0x3d0000, 0x3d07ff) AM_RAM AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)
	250	AM_RANGE(0x3e0000, 0x3e1fff) AM_MIRROR(0x2000) AM_RAM_WRITE(deco16_buffered_palette_w) AM_BASE(&paletteram16)
	251	AM_RANGE(0xff0000, 0xff7fff) AM_RAM /* Main ram */
321	252	ADDRESS_MAP_END
322	253
	254
323	255	/******************************************************************************/
324	256
325		static ADDRESS_MAP_START( sound_readmem, ADDRESS_SPACE_PROGRAM, 8 )
326		AM_RANGE(0x000000, 0x00ffff) AM_READ(SMH_ROM)
327		AM_RANGE(0x100000, 0x100001) AM_READNOP
328		AM_RANGE(0x110000, 0x110001) AM_DEVREAD("ym", ym2151_r)
329		AM_RANGE(0x120000, 0x120001) AM_DEVREAD("oki1", okim6295_r)
330		AM_RANGE(0x130000, 0x130001) AM_DEVREAD("oki2", okim6295_r)
	257	static ADDRESS_MAP_START( rohga_sound_map, ADDRESS_SPACE_PROGRAM, 8 )
	258	AM_RANGE(0x000000, 0x00ffff) AM_ROM
	259	AM_RANGE(0x100000, 0x100001) AM_NOP
	260	AM_RANGE(0x110000, 0x110001) AM_DEVREADWRITE("ym", ym2151_r,ym2151_w)
	261	AM_RANGE(0x120000, 0x120001) AM_DEVREADWRITE("oki1", okim6295_r,okim6295_w)
	262	AM_RANGE(0x130000, 0x130001) AM_DEVREADWRITE("oki2", okim6295_r,okim6295_w)
331	263	AM_RANGE(0x140000, 0x140001) AM_READ(soundlatch_r)
332		AM_RANGE(0x1f0000, 0x1f1fff) AM_READ(SMH_BANK8)
333		ADDRESS_MAP_END
334
335		static ADDRESS_MAP_START( sound_writemem, ADDRESS_SPACE_PROGRAM, 8 )
336		AM_RANGE(0x000000, 0x00ffff) AM_WRITE(SMH_ROM)
337		AM_RANGE(0x100000, 0x100001) AM_WRITENOP
338		AM_RANGE(0x110000, 0x110001) AM_DEVWRITE("ym", ym2151_w)
339		AM_RANGE(0x120000, 0x120001) AM_DEVWRITE("oki1", okim6295_w)
340		AM_RANGE(0x130000, 0x130001) AM_DEVWRITE("oki2", okim6295_w)
341		AM_RANGE(0x1f0000, 0x1f1fff) AM_WRITE(SMH_BANK8)
	264	AM_RANGE(0x1f0000, 0x1f1fff) AM_RAMBANK(8)
342	265	AM_RANGE(0x1fec00, 0x1fec01) AM_WRITE(h6280_timer_w)
343	266	AM_RANGE(0x1ff400, 0x1ff403) AM_WRITE(h6280_irq_status_w)
344	267	ADDRESS_MAP_END
345	268
	269
346	270	/**********************************************************************************/
347	271
348	272	static INPUT_PORTS_START( rohga )
r4679	r4680
791	715
792	716	static void sound_irq(const device_config *device, int state)
793	717	{
794		cpu_set_input_line(device->machine->cpu[1],1,state); /* IRQ 2 */
	718	cputag_set_input_line(device->machine, "audiocpu", 1, state); /* IRQ 2 */
795	719	}
796	720
797	721	static WRITE8_DEVICE_HANDLER( sound_bankswitch_w )
r4679	r4680
812	736
813	737	/* basic machine hardware */
814	738	MDRV_CPU_ADD("maincpu", M68000, 14000000)
815		MDRV_CPU_PROGRAM_MAP(rohga_readmem,rohga_writemem)
	739	MDRV_CPU_PROGRAM_MAP(rohga_map,0)
816	740	MDRV_CPU_VBLANK_INT("screen", irq6_line_hold)
817	741
818	742	MDRV_CPU_ADD("audiocpu", H6280,32220000/4/3) /* verified on pcb (8.050Mhz is XIN on pin 10 of H6280 */
819		MDRV_CPU_PROGRAM_MAP(sound_readmem,sound_writemem)
	743	MDRV_CPU_PROGRAM_MAP(rohga_sound_map,0)
820	744
821	745	/* video hardware */
822	746	MDRV_VIDEO_ATTRIBUTES(VIDEO_BUFFERS_SPRITERAM)
r4679	r4680
857	781
858	782	/* basic machine hardware */
859	783	MDRV_CPU_ADD("maincpu", M68000, 14000000)
860		MDRV_CPU_PROGRAM_MAP(wizdfire_readmem,wizdfire_writemem)
	784	MDRV_CPU_PROGRAM_MAP(wizdfire_map,0)
861	785	MDRV_CPU_VBLANK_INT("screen", irq6_line_hold)
862	786
863	787	MDRV_CPU_ADD("audiocpu", H6280,32220000/4/3) /* verified on pcb (8.050Mhz is XIN on pin 10 of H6280 */
864		MDRV_CPU_PROGRAM_MAP(sound_readmem,sound_writemem)
	788	MDRV_CPU_PROGRAM_MAP(rohga_sound_map,0)
865	789
866	790	/* video hardware */
867	791	MDRV_VIDEO_ATTRIBUTES(VIDEO_BUFFERS_SPRITERAM )
r4679	r4680
902	826
903	827	/* basic machine hardware */
904	828	MDRV_CPU_ADD("maincpu", M68000, 14000000)
905		MDRV_CPU_PROGRAM_MAP(nitrobal_readmem,nitrobal_writemem)
	829	MDRV_CPU_PROGRAM_MAP(nitrobal_map,0)
906	830	MDRV_CPU_VBLANK_INT("screen", irq6_line_hold)
907	831
908	832	MDRV_CPU_ADD("audiocpu", H6280,32220000/4/3) /* verified on pcb (8.050Mhz is XIN on pin 10 of H6280 */
909		MDRV_CPU_PROGRAM_MAP(sound_readmem,sound_writemem)
	833	MDRV_CPU_PROGRAM_MAP(rohga_sound_map,0)
910	834
911	835	/* video hardware */
912	836	MDRV_VIDEO_ATTRIBUTES(VIDEO_BUFFERS_SPRITERAM )
r4679	r4680
947	871
948	872	/* basic machine hardware */
949	873	MDRV_CPU_ADD("maincpu", M68000, 14000000)
950		MDRV_CPU_PROGRAM_MAP(schmeisr_readmem,schmeisr_writemem)
	874	MDRV_CPU_PROGRAM_MAP(schmeisr_map,0)
951	875	MDRV_CPU_VBLANK_INT("screen", irq6_line_hold)
952	876
953	877	MDRV_CPU_ADD("audiocpu", H6280,32220000/4/3) /* verified on pcb (8.050Mhz is XIN on pin 10 of H6280 */
954		MDRV_CPU_PROGRAM_MAP(sound_readmem,sound_writemem)
	878	MDRV_CPU_PROGRAM_MAP(rohga_sound_map,0)
955	879
956	880	/* video hardware */
957	881	MDRV_VIDEO_ATTRIBUTES(VIDEO_BUFFERS_SPRITERAM)

src/mame/drivers/vball.c

r4679	r4680
125	125	/* IRQ fires every on every 8th scanline */
126	126	if (!(vcount_old & 8) && (vcount & 8))
127	127	{
128		cpu_set_input_line(timer->machine->cpu[0], M6502_IRQ_LINE, ASSERT_LINE);
	128	cputag_set_input_line(timer->machine, "maincpu", M6502_IRQ_LINE, ASSERT_LINE);
129	129	}
130	130
131	131	/* NMI fires on scanline 248 (VBL) and is latched */
132	132	if (vcount == 0xf8)
133	133	{
134		cpu_set_input_line(timer->machine->cpu[0], INPUT_LINE_NMI, ASSERT_LINE);
	134	cputag_set_input_line(timer->machine, "maincpu", INPUT_LINE_NMI, ASSERT_LINE);
135	135	}
136	136
137	137	/* Save the scroll x register value */
138	138	if (scanline < 256)
139	139	{
140		vb_scrollx[255 - scanline] = (vb_scrollx_hi + vb_scrollx_lo+4);
	140	vb_scrollx[255 - scanline] = (vb_scrollx_hi + vb_scrollx_lo + 4);
141	141	}
142	142	}
143	143
144	144	static WRITE8_HANDLER( vball_irq_ack_w )
145	145	{
146	146	if (offset == 0)
147		cpu_set_input_line(space->machine->cpu[0], INPUT_LINE_NMI, CLEAR_LINE);
	147	cputag_set_input_line(space->machine, "maincpu", INPUT_LINE_NMI, CLEAR_LINE);
148	148
149	149	else
150		cpu_set_input_line(space->machine->cpu[0], M6502_IRQ_LINE, CLEAR_LINE);
	150	cputag_set_input_line(space->machine, "maincpu", M6502_IRQ_LINE, CLEAR_LINE);
151	151	}
152	152
153	153
r4679	r4680
163	163	static WRITE8_HANDLER( vb_bankswitch_w )
164	164	{
165	165	UINT8 *RAM = memory_region(space->machine, "maincpu");
166		memory_set_bankptr(space->machine, 1,&RAM[ 0x10000 + ( 0x4000 * ( data & 1 ) ) ] );
	166	memory_set_bankptr(space->machine, 1, &RAM[0x10000 + (0x4000 * (data & 1))]);
167	167
168		if (vball_gfxset != ((data  & 0x20) ^ 0x20)) {
	168	if (vball_gfxset != ((data  & 0x20) ^ 0x20))
	169	{
169	170	vball_gfxset = (data  & 0x20) ^ 0x20;
170	171	vb_mark_all_dirty();
171	172	}
172		vb_scrolly_hi = (data & 0x40)<<2;
	173	vb_scrolly_hi = (data & 0x40) << 2;
173	174	}
174	175
175	176	/* The sound system comes all but verbatim from Double Dragon */
176		static WRITE8_HANDLER( cpu_sound_command_w ) {
177		soundlatch_w( space, offset, data );
178		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_NMI, PULSE_LINE );
	177	static WRITE8_HANDLER( cpu_sound_command_w )
	178	{
	179	soundlatch_w(space, offset, data);
	180	cputag_set_input_line(space->machine, "audiocpu", INPUT_LINE_NMI, PULSE_LINE);
179	181	}
180	182
181	183
r4679	r4680
192	194	{
193	195	flip_screen_set(space->machine, ~data&1);
194	196	vb_scrollx_hi = (data & 0x02) << 7;
195		vb_bgprombank_w(space->machine, (data >> 2)&0x07);
196		vb_spprombank_w(space->machine, (data >> 5)&0x07);
197		//logerror("%04x: vb_scrollx_hi = %d\n",cpu_get_previouspc(space->cpu), vb_scrollx_hi);
	197	vb_bgprombank_w(space->machine, (data >> 2) & 0x07);
	198	vb_spprombank_w(space->machine, (data >> 5) & 0x07);
	199	//logerror("%04x: vb_scrollx_hi = %d\n", cpu_get_previouspc(space->cpu), vb_scrollx_hi);
198	200	}
199	201
200	202	static WRITE8_HANDLER(vb_scrollx_lo_w)
201	203	{
202	204	vb_scrollx_lo = data;
203		//logerror("%04x: vb_scrollx_lo =%d\n",cpu_get_previouspc(space->cpu), vb_scrollx_lo);
	205	//logerror("%04x: vb_scrollx_lo =%d\n", cpu_get_previouspc(space->cpu), vb_scrollx_lo);
204	206	}
205	207
206	208
r4679	r4680
405	407
406	408	static void vball_irq_handler(const device_config *device, int irq)
407	409	{
408		cpu_set_input_line(device->machine->cpu[1], 0 , irq ? ASSERT_LINE : CLEAR_LINE );
	410	cputag_set_input_line(device->machine, "audiocpu", 0 , irq ? ASSERT_LINE : CLEAR_LINE);
409	411	}
410	412
411	413	static const ym2151_interface ym2151_config =

src/mame/drivers/higemaru.c

r4679	r4680
34	34	}
35	35
36	36
37		static ADDRESS_MAP_START( readmem, ADDRESS_SPACE_PROGRAM, 8 )
38		AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM)
	37	static ADDRESS_MAP_START( higemaru_map, ADDRESS_SPACE_PROGRAM, 8 )
	38	AM_RANGE(0x0000, 0x7fff) AM_ROM
39	39	AM_RANGE(0xc000, 0xc000) AM_READ_PORT("P1")
40	40	AM_RANGE(0xc001, 0xc001) AM_READ_PORT("P2")
41	41	AM_RANGE(0xc002, 0xc002) AM_READ_PORT("SYSTEM")
42	42	AM_RANGE(0xc003, 0xc003) AM_READ_PORT("DSW1")
43	43	AM_RANGE(0xc004, 0xc004) AM_READ_PORT("DSW2")
44		AM_RANGE(0xd000, 0xd7ff) AM_READ(SMH_RAM)
45		AM_RANGE(0xe000, 0xefff) AM_READ(SMH_RAM)
46		ADDRESS_MAP_END
47
48		static ADDRESS_MAP_START( writemem, ADDRESS_SPACE_PROGRAM, 8 )
49		AM_RANGE(0x0000, 0x7fff) AM_WRITE(SMH_ROM)
50	44	AM_RANGE(0xc800, 0xc800) AM_WRITE(higemaru_c800_w)
51	45	AM_RANGE(0xc801, 0xc802) AM_DEVWRITE("ay1", ay8910_address_data_w)
52	46	AM_RANGE(0xc803, 0xc804) AM_DEVWRITE("ay2", ay8910_address_data_w)
53		AM_RANGE(0xd000, 0xd3ff) AM_WRITE(higemaru_videoram_w) AM_BASE(&videoram)
54		AM_RANGE(0xd400, 0xd7ff) AM_WRITE(higemaru_colorram_w) AM_BASE(&colorram)
55		AM_RANGE(0xd880, 0xd9ff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
56		AM_RANGE(0xe000, 0xefff) AM_WRITE(SMH_RAM)
	47	AM_RANGE(0xd000, 0xd3ff) AM_RAM_WRITE(higemaru_videoram_w) AM_BASE(&videoram)
	48	AM_RANGE(0xd400, 0xd7ff) AM_RAM_WRITE(higemaru_colorram_w) AM_BASE(&colorram)
	49	AM_RANGE(0xd880, 0xd9ff) AM_RAM_WRITE(SMH_RAM) AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
	50	AM_RANGE(0xe000, 0xefff) AM_RAM
57	51	ADDRESS_MAP_END
58	52
59	53
r4679	r4680
173	167
174	168	/* basic machine hardware */
175	169	MDRV_CPU_ADD("maincpu", Z80, XTAL_12MHz/3)   /* 4 MHz? Sharp LH0080A Z80A-CPU-D */
176		MDRV_CPU_PROGRAM_MAP(readmem,writemem)
	170	MDRV_CPU_PROGRAM_MAP(higemaru_map,0)
177	171	MDRV_CPU_VBLANK_INT_HACK(higemaru_interrupt,2)
178	172
179	173	/* video hardware */

src/mame/drivers/plygonet.c

r4679	r4680
581	581
582	582	static ADDRESS_MAP_START( sound_map, ADDRESS_SPACE_PROGRAM, 8 )
583	583	AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM)
584		AM_RANGE(0x8000, 0xbfff) AM_READ(SMH_BANK2)
	584	AM_RANGE(0x8000, 0xbfff) AM_READ(SMH_BANK(2))
585	585	AM_RANGE(0x0000, 0xbfff) AM_WRITENOP
586	586	AM_RANGE(0xc000, 0xdfff) AM_RAM
587	587	AM_RANGE(0xe000, 0xe22f) AM_DEVREADWRITE("konami1", k054539_r, k054539_w)
r4679	r4680
709	709	reset_sound_region(machine);
710	710
711	711	/* Allocate space for the dsp56k banking */
712		dsp56k_bank00_ram    = auto_malloc(2 * 8 * dsp56k_bank00_size        * sizeof(UINT16));      /* 2 bank sets, 8 potential banks each */
713		dsp56k_bank01_ram    = auto_malloc(2 * 8 * dsp56k_bank01_size        * sizeof(UINT16));
714		dsp56k_bank02_ram    = auto_malloc(2 * 8 * dsp56k_bank02_size        * sizeof(UINT16));
715		dsp56k_shared_ram_16 = auto_malloc(2 * 8 * dsp56k_shared_ram_16_size * sizeof(UINT16));
716		dsp56k_bank04_ram    = auto_malloc(2 * 8 * dsp56k_bank04_size        * sizeof(UINT16));
	712	dsp56k_bank00_ram    = auto_alloc_array_clear(machine, UINT16, 2 * 8 * dsp56k_bank00_size);      /* 2 bank sets, 8 potential banks each */
	713	dsp56k_bank01_ram    = auto_alloc_array_clear(machine, UINT16, 2 * 8 * dsp56k_bank01_size);
	714	dsp56k_bank02_ram    = auto_alloc_array_clear(machine, UINT16, 2 * 8 * dsp56k_bank02_size);
	715	dsp56k_shared_ram_16 = auto_alloc_array_clear(machine, UINT16, 2 * 8 * dsp56k_shared_ram_16_size);
	716	dsp56k_bank04_ram    = auto_alloc_array_clear(machine, UINT16, 2 * 8 * dsp56k_bank04_size);
717	717
718		/* Clear the newly-allocated memory */
719		memset(dsp56k_bank00_ram,    0, 2 * 8 * dsp56k_bank00_size        * sizeof(UINT16));
720		memset(dsp56k_bank01_ram,    0, 2 * 8 * dsp56k_bank01_size        * sizeof(UINT16));
721		memset(dsp56k_bank02_ram,    0, 2 * 8 * dsp56k_bank02_size        * sizeof(UINT16));
722		memset(dsp56k_shared_ram_16, 0, 2 * 8 * dsp56k_shared_ram_16_size * sizeof(UINT16));
723		memset(dsp56k_bank04_ram,    0, 2 * 8 * dsp56k_bank04_size        * sizeof(UINT16));
724
725	718	/* The dsp56k occasionally executes out of mapped memory */
726		dsp56k_update_handler = memory_set_direct_update_handler(cpu_get_address_space(machine->cpu[1], ADDRESS_SPACE_PROGRAM), plygonet_dsp56k_direct_handler);
	719	dsp56k_update_handler = memory_set_direct_update_handler(cputag_get_address_space(machine, "dsp", ADDRESS_SPACE_PROGRAM), plygonet_dsp56k_direct_handler);
727	720	}
728	721
729	722	ROM_START( plygonet )

src/mame/drivers/batman.c

r4679	r4680
43	43
44	44	static void update_interrupts(running_machine *machine)
45	45	{
46		cpu_set_input_line(machine->cpu[0], 4, atarigen_scanline_int_state ? ASSERT_LINE : CLEAR_LINE);
47		cpu_set_input_line(machine->cpu[0], 6, atarigen_sound_int_state ? ASSERT_LINE : CLEAR_LINE);
	46	cputag_set_input_line(machine, "maincpu", 4, atarigen_scanline_int_state ? ASSERT_LINE : CLEAR_LINE);
	47	cputag_set_input_line(machine, "maincpu", 6, atarigen_sound_int_state ? ASSERT_LINE : CLEAR_LINE);
48	48	}
49	49
50	50
r4679	r4680
103	103
104	104	/* bit 4 is connected to the /RESET pin on the 6502 */
105	105	if (latch_data & 0x0010)
106		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_RESET, CLEAR_LINE);
	106	cputag_set_input_line(space->machine, "jsa", INPUT_LINE_RESET, CLEAR_LINE);
107	107	else
108		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_RESET, ASSERT_LINE);
	108	cputag_set_input_line(space->machine, "jsa", INPUT_LINE_RESET, ASSERT_LINE);
109	109
110	110	/* alpha bank is selected by the upper 4 bits */
111	111	if ((oldword ^ latch_data) & 0x7000)

src/mame/drivers/naomi.c

r4679	r4680
687	687	UINT8 *dat;
688	688	UINT8* jvseeprom_default = NULL;
689	689
690		dat = eeprom_get_data_pointer(&length, &size);
	690	dat = (UINT8 *)eeprom_get_data_pointer(&length, &size);
691	691	memset(dat, 0, length * size);
692	692
693	693	// mainboard eeprom?
r4679	r4680
858	858	AM_RANGE(0x08000000, 0x0bffffff) AM_NOP // 'Unassigned'
859	859
860	860	/* Area 3 */
861		AM_RANGE(0x0c000000, 0x0cffffff) AM_RAM AM_BASE(&naomi_ram64) AM_SHARE(4)
862		AM_RANGE(0x0d000000, 0x0dffffff) AM_RAM AM_SHARE(5)// extra ram on Naomi (mirror on DC)
863		AM_RANGE(0x0e000000, 0x0effffff) AM_RAM AM_SHARE(4)// mirror
864		AM_RANGE(0x0f000000, 0x0fffffff) AM_RAM AM_SHARE(5)// mirror
	861	AM_RANGE(0x0c000000, 0x0dffffff) AM_RAM AM_BASE(&naomi_ram64) AM_SHARE(4)
	862	AM_RANGE(0x0e000000, 0x0fffffff) AM_RAM AM_SHARE(4)// mirror
865	863
866		AM_RANGE(0x8c000000, 0x8cffffff) AM_RAM AM_SHARE(4) // RAM access through cache
867		AM_RANGE(0x8d000000, 0x8dffffff) AM_RAM AM_SHARE(5) // RAM access through cache
	864	AM_RANGE(0x8c000000, 0x8dffffff) AM_RAM AM_SHARE(4) // RAM access through cache
868	865
869	866	/* Area 4 */
870	867	AM_RANGE(0x10000000, 0x107fffff) AM_WRITE( ta_fifo_poly_w )
r4679	r4680
892	889
893	890
894	891	/*
	892	* Atomiswave address map, identical to Dreamcast
	893	*/
	894
	895	static ADDRESS_MAP_START( aw_map, ADDRESS_SPACE_PROGRAM, 64 )
	896	/* Area 0 */
	897	AM_RANGE(0x00000000, 0x001fffff) AM_ROM AM_SHARE(3) AM_REGION("maincpu", 0) // BIOS
	898	AM_RANGE(0xa0000000, 0xa01fffff) AM_ROM AM_SHARE(3)  // non cachable access to  0x00000000 - 0x001fffff
	899
	900	AM_RANGE(0x00200000, 0x00207fff) AM_RAM                                             // bios uses it (battery backed ram ?)
	901	AM_RANGE(0x005f6800, 0x005f69ff) AM_READWRITE( dc_sysctrl_r, dc_sysctrl_w )
	902	AM_RANGE(0x005f6c00, 0x005f6cff) AM_READWRITE( dc_maple_r, dc_maple_w )
	903	AM_RANGE(0x005f7000, 0x005f70ff) AM_DEVREADWRITE("rom_board", naomibd_r, naomibd_w)
	904	AM_RANGE(0x005f7400, 0x005f74ff) AM_READWRITE( dc_g1_ctrl_r, dc_g1_ctrl_w )
	905	AM_RANGE(0x005f7800, 0x005f78ff) AM_READWRITE( dc_g2_ctrl_r, dc_g2_ctrl_w )
	906	AM_RANGE(0x005f7c00, 0x005f7cff) AM_READWRITE( pvr_ctrl_r, pvr_ctrl_w )
	907	AM_RANGE(0x005f8000, 0x005f9fff) AM_READWRITE( pvr_ta_r, pvr_ta_w )
	908	AM_RANGE(0x00600000, 0x006007ff) AM_READWRITE( dc_modem_r, dc_modem_w )
	909	AM_RANGE(0x00700000, 0x00707fff) AM_DEVREADWRITE( "aica", dc_aica_reg_r, dc_aica_reg_w )
	910	AM_RANGE(0x00710000, 0x0071000f) AM_READWRITE( dc_rtc_r, dc_rtc_w )
	911	AM_RANGE(0x00800000, 0x00ffffff) AM_READWRITE( naomi_arm_r, naomi_arm_w )           // sound RAM (8 MB)
	912
	913
	914	AM_RANGE(0x0103ff00, 0x0103ffff) AM_READWRITE( naomi_unknown1_r, naomi_unknown1_w ) // bios uses it, actual start and end addresses not known
	915
	916	/* Area 1 */
	917	AM_RANGE(0x04000000, 0x04ffffff) AM_RAM   AM_SHARE(2) AM_BASE( &dc_texture_ram )      // texture memory 64 bit access
	918	AM_RANGE(0x05000000, 0x05ffffff) AM_RAM AM_SHARE(2)                                 // mirror of texture RAM 32 bit access
	919
	920	/* Area 2*/
	921	AM_RANGE(0x08000000, 0x0bffffff) AM_NOP // 'Unassigned'
	922
	923	/* Area 3 */
	924	AM_RANGE(0x0c000000, 0x0cffffff) AM_RAM AM_BASE(&naomi_ram64) AM_SHARE(4)
	925	AM_RANGE(0x0d000000, 0x0dffffff) AM_RAM AM_SHARE(4)// extra ram on Naomi (mirror on DC)
	926	AM_RANGE(0x0e000000, 0x0effffff) AM_RAM AM_SHARE(4)// mirror
	927	AM_RANGE(0x0f000000, 0x0fffffff) AM_RAM AM_SHARE(4)// mirror
	928
	929	AM_RANGE(0x8c000000, 0x8cffffff) AM_RAM AM_SHARE(4) // RAM access through cache
	930	AM_RANGE(0x8d000000, 0x8dffffff) AM_RAM AM_SHARE(4) // RAM access through cache
	931
	932	/* Area 4 */
	933	AM_RANGE(0x10000000, 0x107fffff) AM_WRITE( ta_fifo_poly_w )
	934	AM_RANGE(0x10800000, 0x10ffffff) AM_WRITE( ta_fifo_yuv_w )
	935	AM_RANGE(0x11000000, 0x11ffffff) AM_RAM AM_SHARE(2)
	936	/*       0x12000000 -0x13ffffff Mirror area of  0x10000000 -0x11ffffff */
	937	AM_RANGE(0x12000000, 0x127fffff) AM_WRITE( ta_fifo_poly_w )
	938	AM_RANGE(0x12800000, 0x12ffffff) AM_WRITE( ta_fifo_yuv_w )
	939	AM_RANGE(0x13000000, 0x13ffffff) AM_RAM AM_SHARE(2)
	940
	941	/* Area 5 */
	942	//AM_RANGE(0x14000000, 0x17ffffff) AM_NOP // MPX Ext.
	943
	944	/* Area 6 */
	945	//AM_RANGE(0x18000000, 0x1bffffff) AM_NOP // Unassigned
	946
	947	/* Area 7 */
	948	//AM_RANGE(0x1c000000, 0x1fffffff) AM_NOP // SH4 Internal
	949	ADDRESS_MAP_END
	950
	951	/*
895	952	* Aica
896	953	*/
897	954	static void aica_irq(const device_config *device, int irq)
898	955	{
899		cpu_set_input_line(device->machine->cpu[1], ARM7_FIRQ_LINE, irq ? ASSERT_LINE : CLEAR_LINE);
	956	cputag_set_input_line(device->machine, "soundcpu", ARM7_FIRQ_LINE, irq ? ASSERT_LINE : CLEAR_LINE);
900	957	}
901	958
902	959
r4679	r4680
956	1013	PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_COIN2 ) PORT_CHANGED(dc_coin_slots_callback, &dc_coin_counts[1])
957	1014	INPUT_PORTS_END
958	1015
	1016	/* JVS mahjong panel */
	1017	static INPUT_PORTS_START( naomi_mp )
	1018	PORT_START("IN0")
	1019	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_SERVICE1 ) PORT_NAME("Service")
	1020	PORT_SERVICE_NO_TOGGLE( 0x01, IP_ACTIVE_LOW )
	1021	PORT_START("IN1")
	1022	PORT_DIPNAME( 0x01, 0x00, "SYSA" )
	1023	PORT_DIPSETTING(    0x00, DEF_STR( Off ) )
	1024	PORT_DIPSETTING(    0x01, DEF_STR( On ) )
	1025	PORT_DIPNAME( 0x02, 0x00, DEF_STR( Unknown ) )
	1026	PORT_DIPSETTING(    0x00, DEF_STR( Off ) )
	1027	PORT_DIPSETTING(    0x02, DEF_STR( On ) )
	1028	PORT_DIPNAME( 0x04, 0x00, DEF_STR( Unknown ) )
	1029	PORT_DIPSETTING(    0x00, DEF_STR( Off ) )
	1030	PORT_DIPSETTING(    0x04, DEF_STR( On ) )
	1031	PORT_DIPNAME( 0x08, 0x00, DEF_STR( Unknown ) )
	1032	PORT_DIPSETTING(    0x00, DEF_STR( Off ) )
	1033	PORT_DIPSETTING(    0x08, DEF_STR( On ) )
	1034	PORT_DIPNAME( 0x10, 0x00, DEF_STR( Unknown ) )
	1035	PORT_DIPSETTING(    0x00, DEF_STR( Off ) )
	1036	PORT_DIPSETTING(    0x10, DEF_STR( On ) )
	1037	PORT_DIPNAME( 0x20, 0x00, DEF_STR( Unknown ) )
	1038	PORT_DIPSETTING(    0x00, DEF_STR( Off ) )
	1039	PORT_DIPSETTING(    0x20, DEF_STR( On ) )
	1040	PORT_DIPNAME( 0x40, 0x00, DEF_STR( Unknown ) )
	1041	PORT_DIPSETTING(    0x00, DEF_STR( Off ) )
	1042	PORT_DIPSETTING(    0x40, DEF_STR( On ) )
	1043	PORT_DIPNAME( 0x80, 0x00, DEF_STR( Unknown ) )
	1044	PORT_DIPSETTING(    0x00, DEF_STR( Off ) )
	1045	PORT_DIPSETTING(    0x80, DEF_STR( On ) )
	1046	PORT_START("IN2")
	1047	PORT_DIPNAME( 0x01, 0x00, "SYSB" )
	1048	PORT_DIPSETTING(    0x00, DEF_STR( Off ) )
	1049	PORT_DIPSETTING(    0x01, DEF_STR( On ) )
	1050	PORT_DIPNAME( 0x02, 0x00, DEF_STR( Unknown ) )
	1051	PORT_DIPSETTING(    0x00, DEF_STR( Off ) )
	1052	PORT_DIPSETTING(    0x02, DEF_STR( On ) )
	1053	PORT_DIPNAME( 0x04, 0x00, DEF_STR( Unknown ) )
	1054	PORT_DIPSETTING(    0x00, DEF_STR( Off ) )
	1055	PORT_DIPSETTING(    0x04, DEF_STR( On ) )
	1056	PORT_DIPNAME( 0x08, 0x00, DEF_STR( Unknown ) )
	1057	PORT_DIPSETTING(    0x00, DEF_STR( Off ) )
	1058	PORT_DIPSETTING(    0x08, DEF_STR( On ) )
	1059	PORT_DIPNAME( 0x10, 0x00, DEF_STR( Unknown ) )
	1060	PORT_DIPSETTING(    0x00, DEF_STR( Off ) )
	1061	PORT_DIPSETTING(    0x10, DEF_STR( On ) )
	1062	PORT_DIPNAME( 0x20, 0x00, DEF_STR( Unknown ) )
	1063	PORT_DIPSETTING(    0x00, DEF_STR( Off ) )
	1064	PORT_DIPSETTING(    0x20, DEF_STR( On ) )
	1065	PORT_DIPNAME( 0x40, 0x00, DEF_STR( Unknown ) )
	1066	PORT_DIPSETTING(    0x00, DEF_STR( Off ) )
	1067	PORT_DIPSETTING(    0x40, DEF_STR( On ) )
	1068	PORT_DIPNAME( 0x80, 0x00, DEF_STR( Unknown ) )
	1069	PORT_DIPSETTING(    0x00, DEF_STR( Off ) )
	1070	PORT_DIPSETTING(    0x80, DEF_STR( On ) )
	1071	PORT_START("IN3")
	1072	PORT_DIPNAME( 0x01, 0x00, "SYSC" )
	1073	PORT_DIPSETTING(    0x00, DEF_STR( Off ) )
	1074	PORT_DIPSETTING(    0x01, DEF_STR( On ) )
	1075	PORT_DIPNAME( 0x02, 0x00, DEF_STR( Unknown ) )
	1076	PORT_DIPSETTING(    0x00, DEF_STR( Off ) )
	1077	PORT_DIPSETTING(    0x02, DEF_STR( On ) )
	1078	PORT_DIPNAME( 0x04, 0x00, DEF_STR( Unknown ) )
	1079	PORT_DIPSETTING(    0x00, DEF_STR( Off ) )
	1080	PORT_DIPSETTING(    0x04, DEF_STR( On ) )
	1081	PORT_DIPNAME( 0x08, 0x00, DEF_STR( Unknown ) )
	1082	PORT_DIPSETTING(    0x00, DEF_STR( Off ) )
	1083	PORT_DIPSETTING(    0x08, DEF_STR( On ) )
	1084	PORT_DIPNAME( 0x10, 0x00, DEF_STR( Unknown ) )
	1085	PORT_DIPSETTING(    0x00, DEF_STR( Off ) )
	1086	PORT_DIPSETTING(    0x10, DEF_STR( On ) )
	1087	PORT_DIPNAME( 0x20, 0x00, DEF_STR( Unknown ) )
	1088	PORT_DIPSETTING(    0x00, DEF_STR( Off ) )
	1089	PORT_DIPSETTING(    0x20, DEF_STR( On ) )
	1090	PORT_DIPNAME( 0x40, 0x00, DEF_STR( Unknown ) )
	1091	PORT_DIPSETTING(    0x00, DEF_STR( Off ) )
	1092	PORT_DIPSETTING(    0x40, DEF_STR( On ) )
	1093	PORT_DIPNAME( 0x80, 0x00, DEF_STR( Unknown ) )
	1094	PORT_DIPSETTING(    0x00, DEF_STR( Off ) )
	1095	PORT_DIPSETTING(    0x80, DEF_STR( On ) )
	1096	PORT_START("IN4")
	1097	PORT_DIPNAME( 0x01, 0x00, "SYSD" )
	1098	PORT_DIPSETTING(    0x00, DEF_STR( Off ) )
	1099	PORT_DIPSETTING(    0x01, DEF_STR( On ) )
	1100	PORT_DIPNAME( 0x02, 0x00, DEF_STR( Unknown ) )
	1101	PORT_DIPSETTING(    0x00, DEF_STR( Off ) )
	1102	PORT_DIPSETTING(    0x02, DEF_STR( On ) )
	1103	PORT_DIPNAME( 0x04, 0x00, DEF_STR( Unknown ) )
	1104	PORT_DIPSETTING(    0x00, DEF_STR( Off ) )
	1105	PORT_DIPSETTING(    0x04, DEF_STR( On ) )
	1106	PORT_DIPNAME( 0x08, 0x00, DEF_STR( Unknown ) )
	1107	PORT_DIPSETTING(    0x00, DEF_STR( Off ) )
	1108	PORT_DIPSETTING(    0x08, DEF_STR( On ) )
	1109	PORT_DIPNAME( 0x10, 0x00, DEF_STR( Unknown ) )
	1110	PORT_DIPSETTING(    0x00, DEF_STR( Off ) )
	1111	PORT_DIPSETTING(    0x10, DEF_STR( On ) )
	1112	PORT_DIPNAME( 0x20, 0x00, DEF_STR( Unknown ) )
	1113	PORT_DIPSETTING(    0x00, DEF_STR( Off ) )
	1114	PORT_DIPSETTING(    0x20, DEF_STR( On ) )
	1115	PORT_DIPNAME( 0x40, 0x00, DEF_STR( Unknown ) )
	1116	PORT_DIPSETTING(    0x00, DEF_STR( Off ) )
	1117	PORT_DIPSETTING(    0x40, DEF_STR( On ) )
	1118	PORT_DIPNAME( 0x80, 0x00, DEF_STR( Unknown ) )
	1119	PORT_DIPSETTING(    0x00, DEF_STR( Off ) )
	1120	PORT_DIPSETTING(    0x80, DEF_STR( On ) )
	1121
	1122	PORT_START("COINS")
	1123	PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_COIN1 ) PORT_CHANGED(dc_coin_slots_callback, &dc_coin_counts[0])
	1124	PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_COIN2 ) PORT_CHANGED(dc_coin_slots_callback, &dc_coin_counts[1])
	1125	INPUT_PORTS_END
	1126
959	1127	static MACHINE_RESET( naomi )
960	1128	{
961	1129	MACHINE_RESET_CALL(dc);
r4679	r4680
1020	1188	MDRV_NAOMI_DIMM_BOARD_ADD("rom_board", "gdrom", "user1", "picreturn")
1021	1189	MACHINE_DRIVER_END
1022	1190
	1191	/*
	1192	* Naomi 2
	1193	*/
	1194
	1195	// ...
	1196
	1197	/*
	1198	* Naomi 2 GD-Rom
	1199	*/
	1200
	1201	// ...
	1202
	1203	/*
	1204	* Atomiswave
	1205	*/
	1206
	1207	static MACHINE_DRIVER_START( aw )
	1208	MDRV_IMPORT_FROM(naomi)
	1209	MDRV_CPU_MODIFY("maincpu")
	1210	MDRV_CPU_PROGRAM_MAP(aw_map,0)
	1211	MACHINE_DRIVER_END
	1212
1023	1213	#define ROM_LOAD16_WORD_SWAP_BIOS(bios,name,offset,length,hash) \
1024	1214	ROMX_LOAD(name, offset, length, hash, ROM_GROUPWORD | ROM_BIOS(bios+1)) /* Note '+1' */
1025	1215
r4679	r4680
1250	1440	ROM_END
1251	1441
1252	1442
1253		ROM_START( fotns )
1254		ROM_REGION( 0x200000, "maincpu", 0)
1255		AW_BIOS
	1443	/**********************************************
	1444	*
	1445	* Naomi Cart ROM defines
	1446	*
	1447	*********************************************/
1256	1448
1257		ROM_REGION( 0x8000000, "user1", ROMREGION_ERASE)
1258		ROM_LOAD("ax1901p01.ic18", 0x0000000, 0x0800000,  CRC(a06998b0) SHA1(d617691db5170f6db176e40fc732966d523fd8cf) )
1259		ROM_LOAD("ax1901m01.ic11", 0x1000000, 0x1000000,  CRC(ff5a1642) SHA1(49cefcce173f9a811fe9c0c07bee53aeba2bc3a8) )
1260		ROM_LOAD("ax1902m01.ic12", 0x2000000, 0x1000000,  CRC(d9aae8a9) SHA1(bf87034088be0847b6e297b7665e0ea4d8cba631) )
1261		ROM_LOAD("ax1903m01.ic13", 0x3000000, 0x1000000,  CRC(1711b23d) SHA1(ab628b2ec678839c75245e245297818ef1592d3b) )
1262		ROM_LOAD("ax1904m01.ic14", 0x4000000, 0x1000000,  CRC(443bfb26) SHA1(6f7751afa0ca55dd0679758b27bed92b31c1b050) )
1263		ROM_LOAD("ax1905m01.ic15", 0x5000000, 0x1000000,  CRC(eb1cada0) SHA1(459d21d622c72606f1d3095e8a25b6c4adccf8ab) )
1264		ROM_LOAD("ax1906m01.ic16", 0x6000000, 0x1000000,  CRC(fe6da168) SHA1(d4ab6443383469bb5a4337005de917627a2e21cc) )
1265		ROM_LOAD("ax1907m01.ic17", 0x7000000, 0x1000000,  CRC(9d3a0520) SHA1(78583fd171b34439f77a04a97ebe3c9d1bab61cc) )
1266		ROM_END
1267	1449
1268		ROM_START( demofist )
1269		ROM_REGION( 0x200000, "maincpu", 0)
1270		AW_BIOS
1271
1272		ROM_REGION( 0x8000000, "user1", ROMREGION_ERASE)
1273		ROM_LOAD("ax0601p01.ic18", 0x0000000, 0x0800000,  CRC(0efb38ad) SHA1(9400e37efe3e936474d74400ebdf28ad0869b67b) )
1274		/* incomplete, other rom names / sizes are.. ? */
1275		ROM_END
1276
1277
1278
1279		struct AtomiswaveKey
1280		{
1281		int P0[16];
1282		int P1[16];
1283		int S0[32];
1284		int S1[16];
1285		int S2[16];
1286		int S3[8];
1287		};
1288
1289		static const struct AtomiswaveKey fotns_key = {
1290		{0,2,7,11,12,1,5,6,15,4,8,9,14,3,10,13},
1291		{12,8,3,7,0,15,1,11,6,10,4,14,9,5,13,2},
1292		{4,1,10,16,9,25,26,31,13,0,14,15,24,6,30,18,7,20,5,12,22,17,27,3,8,11,21,29,19,23,28,2},
1293		{3,2,11,14,10,13,12,0,7,6,8,15,5,1,4,9},
1294		{10,3,6,12,7,11,4,14,0,2,8,1,15,13,5,9},
1295		{7,1,6,5,4,2,0,3}
1296		};
1297
1298		static const struct AtomiswaveKey df_key = {
1299		{1,4,5,6,9,7,10,11,13,0,8,12,14,2,3,15},
1300		{12,0,3,8,7,6,15,11,1,4,14,10,9,5,13,2},
1301		{9,27,15,6,28,30,7,12,21,0,1,25,22,3,16,29,13,4,24,20,2,5,23,19,18,10,8,14,17,11,31,26},
1302		{5,13,4,0,8,12,14,7,2,11,3,10,6,1,15,9},
1303		{11,6,2,9,12,1,7,4,10,0,13,3,8,14,15,5},
1304		{1,6,4,3,5,2,7,0}
1305		};
1306
1307
1308		static UINT16 atomiswave_decrypt(UINT16 cipherText, int address, const struct AtomiswaveKey* key)
1309		{
1310		int b0,b1,b2,b3;
1311		int aux;
1312
1313		aux = BITSWAP16(cipherText,
1314		key->P0[15],key->P0[14],key->P0[13],key->P0[12],key->P0[11],key->P0[10],key->P0[9],key->P0[8],
1315		key->P0[7],key->P0[6],key->P0[5],key->P0[4],key->P0[3],key->P0[2],key->P0[1],key->P0[0]);
1316		aux = aux ^ BITSWAP16(address/2,
1317		key->P1[15],key->P1[14],key->P1[13],key->P1[12],key->P1[11],key->P1[10],key->P1[9],key->P1[8],
1318		key->P1[7],key->P1[6],key->P1[5],key->P1[4],key->P1[3],key->P1[2],key->P1[1],key->P1[0]);
1319
1320		b0 = aux&0x1f;
1321		b1 = (aux>>5)&0xf;
1322		b2 = (aux>>9)&0xf;
1323		b3 = aux>>13;
1324
1325		b0 = key->S0[b0];
1326		b1 = key->S1[b1];
1327		b2 = key->S2[b2];
1328		b3 = key->S3[b3];
1329
1330		return (b3<<13)|(b2<<9)|(b1<<5)|b0;
1331		}
1332
1333
1334		static DRIVER_INIT(fotns)
1335		{
1336		int i;
1337		UINT16 *src = (UINT16 *)(memory_region(machine, "user1"));
1338
1339		long rom_size = memory_region_length(machine, "user1");
1340
1341		for(i=0; i<rom_size/2; i++)
1342		{
1343		src[i] = atomiswave_decrypt(src[i], i*2, &fotns_key);
1344		}
1345
1346		#if 0
1347		{
1348		FILE *fp;
1349		const char *gamename = machine->gamedrv->name;
1350		char filename[256];
1351		sprintf(filename, "%s.dump", gamename);
1352
1353		fp=fopen(filename, "w+b");
1354		if (fp)
1355		{
1356		fwrite(src, rom_size, 1, fp);
1357		fclose(fp);
1358		}
1359		}
1360		#endif
1361		}
1362
1363
1364
1365		static DRIVER_INIT(demofist)
1366		{
1367		int i;
1368		UINT16 *src = (UINT16 *)(memory_region(machine, "user1"));
1369
1370		long rom_size = memory_region_length(machine, "user1");
1371
1372		for(i=0; i<rom_size/2; i++)
1373		{
1374		src[i] = atomiswave_decrypt(src[i], i*2, &df_key);
1375		}
1376
1377		#if 0
1378		{
1379		FILE *fp;
1380		const char *gamename = machine->gamedrv->name;
1381		char filename[256];
1382		sprintf(filename, "%s.dump", gamename);
1383
1384		fp=fopen(filename, "w+b");
1385		if (fp)
1386		{
1387		fwrite(src, rom_size, 1, fp);
1388		fclose(fp);
1389		}
1390		}
1391		#endif
1392		}
1393
1394
1395
1396	1450	/* Info above each set is automatically generated from the IC22 rom and may not be accurate */
1397	1451
1398	1452	/*
r4679	r4680
1919	1973	ROM_END
1920	1974
1921	1975	/*
	1976
1922	1977	SYSTEMID: NAOMI
	1978	JAP: F355 CHALLENGE JAPAN
	1979	USA: F355 CHALLENGE USA
	1980	EXP: F355 CHALLENGE EXPORT
	1981
	1982	*/
	1983
	1984	ROM_START( f355 )
	1985	ROM_REGION( 0x200000, "maincpu", 0)
	1986	F355_BIOS
	1987	//  NAOMI_BIOS
	1988
	1989	ROM_REGION( 0xb000000, "user1", ROMREGION_ERASEFF)
	1990	ROM_LOAD("epr-21902.ic22",0x0000000, 0x0400000, CRC(04e8acec) SHA1(82e20f99876b13b77c0393ef545316f9eeb2c29c) )
	1991
	1992	ROM_LOAD("mpr-21881.ic1", 0x0800000, 0x0800000, CRC(00bf0d58) SHA1(cf2c58168501c77318e946a4a4d4663993a7913c) )
	1993	ROM_LOAD("mpr-21882.ic2", 0x1000000, 0x0800000, CRC(f87923cd) SHA1(71de4f550e507c9e967331c4a17349df064608ea) )
	1994	ROM_LOAD("mpr-21883.ic3", 0x1800000, 0x0800000, CRC(8c8280b8) SHA1(1a7003f4111ed9715b9ef0b13b0e9ace6a6f5434) )
	1995	ROM_LOAD("mpr-21884.ic4", 0x2000000, 0x0800000, CRC(7bfa2f9a) SHA1(5796291b14ab25f8fed8d4af43558c7294d49e27) )
	1996	ROM_LOAD("mpr-21885.ic5", 0x2800000, 0x0800000, CRC(5a999e6c) SHA1(7a60fe7d2f234c5d9c02ba403422e3a3de5a86ba) )
	1997	ROM_LOAD("mpr-21886.ic6", 0x3000000, 0x0800000, CRC(dee42cfb) SHA1(437257e035e1b9cfbc3a0c15b24ef1aac4f2fbcb) )
	1998	ROM_LOAD("mpr-21887.ic7", 0x3800000, 0x0800000, CRC(fdcc0334) SHA1(3e3d2094a082f3f2dac5ffe5a7e26cf9e61a279b) )
	1999	ROM_LOAD("mpr-21888.ic8", 0x4000000, 0x0800000, CRC(0c717590) SHA1(d304351b07145252816afc9dd82587a1731f665d) )
	2000	ROM_LOAD("mpr-21889.ic9", 0x4800000, 0x0800000, CRC(e8935135) SHA1(609788d5adf976d5313b3fca02ebc2f3c5e2758b) )
	2001	ROM_LOAD("mpr-21890.ic10",0x5000000, 0x0800000, CRC(aeb9d086) SHA1(22f7d2c09718bf3acb910b5950b0601adad859a2) )
	2002	ROM_LOAD("mpr-21891.ic11",0x5800000, 0x0800000, CRC(16d07b04) SHA1(6f222e226e63e30a73649735349c1928c37e011b) )
	2003	ROM_LOAD("mpr-21892.ic12",0x6000000, 0x0800000, CRC(2d91eed2) SHA1(f3cda9776c800ac11e13b6914d59edb11f3e116b) )
	2004	ROM_LOAD("mpr-21893.ic13",0x6800000, 0x0800000, CRC(e55ef69b) SHA1(fa62f8034728751477effcfecff2bc4cdc982b28) )
	2005	ROM_LOAD("mpr-21894.ic14",0x7000000, 0x0800000, CRC(f1acfaea) SHA1(2684f79c6b7595075df41d1f398f228b4aedab16) )
	2006	ROM_LOAD("mpr-21895.ic15",0x7800000, 0x0800000, CRC(98368844) SHA1(331f87def4f82ceb1bf74b16709ef61dfcda1758) )
	2007	ROM_LOAD("mpr-21896.ic16",0x8000000, 0x0800000, CRC(4bc2ab68) SHA1(3a6d6b7599ca0f2c63cdbc3f5916e548bf3697c7) )
	2008	ROM_LOAD("mpr-21897.ic17",0x8800000, 0x0800000, CRC(4ef4448d) SHA1(475021aec754d4526aff77776c8d2abce2b23199) )
	2009	ROM_LOAD("mpr-21898.ic18",0x9000000, 0x0800000, CRC(cacea996) SHA1(df2b7ce00d8d6171806f676966f5f45d7fb76431) )
	2010	ROM_LOAD("mpr-21899.ic19",0x9800000, 0x0800000, CRC(14a4b87d) SHA1(33177dea88c6aec31e2c16c8d0d3f29c7ea772c5) )
	2011	ROM_LOAD("mpr-21900.ic20",0xa000000, 0x0800000, CRC(81901130) SHA1(1573b5c4360e29ba1a4b4901af49d5399fa1e635) )
	2012	ROM_LOAD("mpr-21901.ic21",0xa800000, 0x0800000, BAD_DUMP CRC(55dcbd6d) SHA1(9fec353f9e58016090e177f899a799e2e8fc7c9f) ) // returns bad in Naomi test mode
	2013	ROM_END
	2014
	2015	/*
	2016	SYSTEMID: NAOMI
1923	2017	JAP: GIANT GRAM
1924	2018	USA: GIANT GRAM
1925	2019	EXP: GIANT GRAM
r4679	r4680
3166	3260	/* 0044C */ GAME( 2001, csmasho,  csmash,   naomi,    naomi,    naomi, ROT0, "Sega",            "Cosmic Smash (JPN, USA, EXP, KOR, AUS) (original)", GAME_UNEMULATED_PROTECTION|GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND|GAME_NOT_WORKING )
3167	3261
3168	3262	/* 841-xxxxx ("Licensed by Sega" games)*/
3169		/* 0001C */ GAME( 1999, pstone,   naomi,    naomi,    naomi,    naomi, ROT0, "Capcom",          "Power Stone (JPN, USA, EUR, ASI, AUS)", GAME_UNEMULATED_PROTECTION|GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND|GAME_NOT_WORKING )
3170		/* 0002C */ GAME( 1999, suchie3,  naomi,    naomi,    naomi,    naomi, ROT0, "Jaleco",          "Idol Janshi Suchie-Pai 3 (JPN)", GAME_UNEMULATED_PROTECTION|GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND|GAME_NOT_WORKING )
3171		/* 0003C */ GAME( 1999, doa2,     naomi,    naomi,    naomi,    naomi, ROT0, "Tecmo",           "Dead or Alive 2 (JPN, USA, EXP, KOR, AUS)", GAME_UNEMULATED_PROTECTION|GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND|GAME_NOT_WORKING )
3172		/* 0003C */ GAME( 2000, doa2m,    doa2,     naomi,    naomi,    naomi, ROT0, "Tecmo",           "Dead or Alive 2 Millennium (JPN, USA, EXP, KOR, AUS)", GAME_UNEMULATED_PROTECTION|GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND|GAME_NOT_WORKING )
3173		/* 0004C */ GAME( 1999, shangril, naomi,    naomi,    naomi,    naomi, ROT0, "Marvelous Ent.",  "Dengen Tenshi Taisen Janshi Shangri-la (JPN, USA, EXP, KOR, AUS)", GAME_UNEMULATED_PROTECTION|GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND|GAME_NOT_WORKING )
3174		/* 0005C */ GAME( 1999, spawn,    naomi,    naomi,    naomi,    naomi, ROT0, "Capcom",          "Spawn (JPN, USA, EUR, ASI, AUS)", GAME_UNEMULATED_PROTECTION|GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND|GAME_NOT_WORKING )
3175		/* 0007C */ GAME( 2000, mvsc2,    naomi,    naomi,    naomi,    naomi, ROT0, "Capcom",          "Marvel vs. Capcom 2 (JPN, USA, EUR, ASI, AUS)", GAME_UNEMULATED_PROTECTION|GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND|GAME_NOT_WORKING )
3176		/* 0008C */ GAME( 2000, pstone2,  naomi,    naomi,    naomi,    naomi, ROT0, "Capcom",          "Power Stone 2 (JPN, USA, EUR, ASI, AUS)", GAME_UNEMULATED_PROTECTION|GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND|GAME_NOT_WORKING )
3177		/* 0012C */ GAME( 2000, cspike,   naomi,    naomi,    naomi,    naomi, ROT0, "Psikyo / Capcom", "Gun Spike (JPN) / Cannon Spike (USA, EXP, KOR, AUS)", GAME_UNEMULATED_PROTECTION|GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND|GAME_NOT_WORKING )
3178		/* 0013C */ GAME( 2000, ggx,      naomi,    naomi,    naomi,    naomi, ROT0, "Arc System Works","Guilty Gear X (JPN)", GAME_UNEMULATED_PROTECTION|GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND|GAME_NOT_WORKING )
3179		/* 0016  */ GAME( 2000, deathcox, naomi,    naomi,    naomi,    naomi, ROT0, "Ecole",           "Death Crimson OX (JPN, USA, EXP, KOR, AUS)", GAME_UNEMULATED_PROTECTION|GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND|GAME_NOT_WORKING )
3180		/* xxxx  */ GAME( 2001, hmgeo,    naomi,    naomi,    naomi,    naomi, ROT0, "Capcom",          "Heavy Metal Geomatrix (JPN, USA, EUR, ASI, AUS)", GAME_UNEMULATED_PROTECTION|GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND|GAME_NOT_WORKING )
	3263	/* 0001C */ GAME( 1999, pstone,   naomi,    naomi,    naomi,    naomi,    ROT0, "Capcom",          "Power Stone (JPN, USA, EUR, ASI, AUS)", GAME_UNEMULATED_PROTECTION|GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND|GAME_NOT_WORKING )
	3264	/* 0002C */ GAME( 1999, suchie3,  naomi,    naomi,    naomi_mp, naomi_mp, ROT0, "Jaleco",          "Idol Janshi Suchie-Pai 3 (JPN)", GAME_UNEMULATED_PROTECTION|GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND|GAME_NOT_WORKING )
	3265	/* 0003C */ GAME( 1999, doa2,     naomi,    naomi,    naomi,    naomi,    ROT0, "Tecmo",           "Dead or Alive 2 (JPN, USA, EXP, KOR, AUS)", GAME_UNEMULATED_PROTECTION|GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND|GAME_NOT_WORKING )
	3266	/* 0003C */ GAME( 2000, doa2m,    doa2,     naomi,    naomi,    naomi,    ROT0, "Tecmo",           "Dead or Alive 2 Millennium (JPN, USA, EXP, KOR, AUS)", GAME_UNEMULATED_PROTECTION|GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND|GAME_NOT_WORKING )
	3267	/* 0004C */ GAME( 1999, shangril, naomi,    naomi,    naomi_mp, naomi_mp, ROT0, "Marvelous Ent.",  "Dengen Tenshi Taisen Janshi Shangri-la (JPN, USA, EXP, KOR, AUS)", GAME_UNEMULATED_PROTECTION|GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND|GAME_NOT_WORKING )
	3268	/* 0005C */ GAME( 1999, spawn,    naomi,    naomi,    naomi,    naomi,    ROT0, "Capcom",          "Spawn (JPN, USA, EUR, ASI, AUS)", GAME_UNEMULATED_PROTECTION|GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND|GAME_NOT_WORKING )
	3269	/* 0007C */ GAME( 2000, mvsc2,    naomi,    naomi,    naomi,    naomi,    ROT0, "Capcom",          "Marvel vs. Capcom 2 (JPN, USA, EUR, ASI, AUS)", GAME_UNEMULATED_PROTECTION|GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND|GAME_NOT_WORKING )
	3270	/* 0008C */ GAME( 2000, pstone2,  naomi,    naomi,    naomi,    naomi,    ROT0, "Capcom",          "Power Stone 2 (JPN, USA, EUR, ASI, AUS)", GAME_UNEMULATED_PROTECTION|GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND|GAME_NOT_WORKING )
	3271	/* 0012C */ GAME( 2000, cspike,   naomi,    naomi,    naomi,    naomi,    ROT0, "Psikyo / Capcom", "Gun Spike (JPN) / Cannon Spike (USA, EXP, KOR, AUS)", GAME_UNEMULATED_PROTECTION|GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND|GAME_NOT_WORKING )
	3272	/* 0013C */ GAME( 2000, ggx,      naomi,    naomi,    naomi,    naomi,    ROT0, "Arc System Works","Guilty Gear X (JPN)", GAME_UNEMULATED_PROTECTION|GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND|GAME_NOT_WORKING )
	3273	/* 0016  */ GAME( 2000, deathcox, naomi,    naomi,    naomi,    naomi,    ROT0, "Ecole",           "Death Crimson OX (JPN, USA, EXP, KOR, AUS)", GAME_UNEMULATED_PROTECTION|GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND|GAME_NOT_WORKING )
	3274	/* xxxx  */ GAME( 2001, hmgeo,    naomi,    naomi,    naomi,    naomi,    ROT0, "Capcom",          "Heavy Metal Geomatrix (JPN, USA, EUR, ASI, AUS)", GAME_UNEMULATED_PROTECTION|GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND|GAME_NOT_WORKING )
3181	3275
3182	3276	/* Incomplete Dumps (just the program rom IC22) */
3183	3277	/* 841-0011C */ GAME( 2000, capsnk,   naomi,    naomi,    naomi,    naomi, ROT0, "Capcom / SNK",    "Capcom Vs. SNK Millennium Fight 2000 (JPN, USA, EXP, KOR, AUS)", GAME_UNEMULATED_PROTECTION|GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND|GAME_NOT_WORKING )
r4679	r4680
3188	3282
3189	3283	/* Games with game specific bios sets */
3190	3284	GAME( 1998, hod2bios, 0,        naomi,    naomi,    0,     ROT0, "Sega",            "Naomi House of the Dead 2 Bios", GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND|GAME_NOT_WORKING|GAME_IS_BIOS_ROOT )
	3285	/* HOTD2 isn't dumped */
3191	3286	GAME( 1999, f355bios, 0,        naomi,    naomi,    0,     ROT0, "Sega",            "Naomi Ferrari F355 Challenge Bios", GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND|GAME_NOT_WORKING|GAME_IS_BIOS_ROOT )
3192		/* HOTD2 & F355 aren't dumped */
	3287	GAME( 1999, f355,     f355bios, naomi,    naomi,    0,     ROT0, "Sega",            "Ferrari F355 Challenge", GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND|GAME_NOT_WORKING )
3193	3288
	3289	/**********************************************
	3290	*
	3291	* Naomi GD-ROM defines
	3292	*
	3293	*********************************************/
3194	3294
3195
3196	3295	ROM_START( gundmgd )
3197	3296	NAOMIGD_BIOS
3198	3297
r4679	r4680
4002	4101
4003	4102
4004	4103	/* Naomi GD-Rom Sets */
4005		GAME( 2001, naomigd,   0,        naomi,    naomi, naomi,   ROT0,   "Sega",             "Naomi GD-ROM Bios", GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND|GAME_NOT_WORKING|GAME_IS_BIOS_ROOT )
	4104	GAME( 2001, naomigd,   0,        naomi,    naomi,    naomi,   ROT0,   "Sega",                   "Naomi GD-ROM Bios", GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND|GAME_NOT_WORKING|GAME_IS_BIOS_ROOT )
4006	4105
4007	4106	/* GDL-xxxx ("licensed by Sega" games) */
4008		GAME( 2001, gundmgd,   naomigd,  naomigd,  naomi, naomi,   ROT0,   "Capcom",           "Mobile Suit Gundam: Federation VS Zeon (GDL-0001)", GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND|GAME_NOT_WORKING )
4009		GAME( 2001, sfz3ugd,   naomigd,  naomigd,  naomi, naomi,   ROT0,   "Capcom",           "Street Fighter Zero 3 Upper (GDL-0002)", GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND|GAME_NOT_WORKING )
	4107	GAME( 2001, gundmgd,   naomigd,  naomigd,  naomi,    naomi,   ROT0,   "Capcom",                 "Mobile Suit Gundam: Federation VS Zeon (GDL-0001)", GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND|GAME_NOT_WORKING )
	4108	GAME( 2001, sfz3ugd,   naomigd,  naomigd,  naomi,    naomi,   ROT0,   "Capcom",                 "Street Fighter Zero 3 Upper (GDL-0002)", GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND|GAME_NOT_WORKING )
4010	4109	//GDL-0003
4011		GAME( 2001, cvsgd,     naomigd,  naomigd,  naomi, naomi,   ROT0,   "Capcom / SNK",     "Capcom vs SNK Millenium Fight 2000 Pro (GDL-0004)", GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND|GAME_NOT_WORKING )
	4110	GAME( 2001, cvsgd,     naomigd,  naomigd,  naomi,    naomi,   ROT0,   "Capcom / SNK",           "Capcom vs SNK Millenium Fight 2000 Pro (GDL-0004)", GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND|GAME_NOT_WORKING )
4012	4111	//GDL-0005 Doki Doki Idol Star Seeker
4013		GAME( 2001, gundmxgd,  naomigd,  naomigd,  naomi, naomi,   ROT0,   "Capcom",           "Mobile Suit Gundam: Federation VS Zeon DX  (GDL-0006)", GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND|GAME_NOT_WORKING )
	4112	GAME( 2001, gundmxgd,  naomigd,  naomigd,  naomi,    naomi,   ROT0,   "Capcom",                 "Mobile Suit Gundam: Federation VS Zeon DX  (GDL-0006)", GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND|GAME_NOT_WORKING )
4014	4113	//GDL-0007 Capcom vs SNK 2
4015		GAME( 2001, cvs2gd,    naomigd,  naomigd,  naomi, naomi,    ROT0,   "Capcom / SNK",     "Capcom vs SNK 2 Millionaire Fighting 2001 (Rev A) (GDL-0007A)", GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND|GAME_NOT_WORKING )
	4114	GAME( 2001, cvs2gd,    naomigd,  naomigd,  naomi,    naomi,   ROT0,   "Capcom / SNK",           "Capcom vs SNK 2 Millionaire Fighting 2001 (Rev A) (GDL-0007A)", GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND|GAME_NOT_WORKING )
4016	4115	//GDL-0008 Capcom vs SNK 2 Mark Of The Millenium 2001 (Export)
4017	4116	//GDL-0009
4018		GAME( 2001, ikaruga,   naomigd,  naomigd,  naomi, naomi,   ROT270, "Treasure",         "Ikaruga (GDL-0010)", GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND|GAME_NOT_WORKING )
4019		GAME( 2002, ggxx,      naomigd,  naomigd,  naomi, ggxx,      ROT0,   "Arc System Works", "Guilty Gear XX (GDL-0011)", GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND|GAME_NOT_WORKING )
	4117	GAME( 2001, ikaruga,   naomigd,  naomigd,  naomi,    naomi,   ROT270, "Treasure",               "Ikaruga (GDL-0010)", GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND|GAME_NOT_WORKING )
	4118	GAME( 2002, ggxx,      naomigd,  naomigd,  naomi,    ggxx,    ROT0,   "Arc System Works",       "Guilty Gear XX (GDL-0011)", GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND|GAME_NOT_WORKING )
4020	4119	//GDL-0012 Cleopatra Fortune Plus
4021		GAME( 2002, moeru,     naomigd,  naomigd,  naomi, naomi,   ROT0,   "Altron",         "Moeru Casinyo (GDL-0013)", GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND|GAME_NOT_WORKING )
	4120	GAME( 2002, moeru,     naomigd,  naomigd,  naomi,    naomi,   ROT0,   "Altron",                 "Moeru Casinyo (GDL-0013)", GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND|GAME_NOT_WORKING )
4022	4121	//GDL-0014 Musapey's Choco Marker
4023		GAME( 2002, chocomk,   naomigd,  naomigd,  naomi, naomi,   ROT0,   "Ecole Software",   "Musapey's Choco Marker (Rev A) (GDL-0014A)", GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND|GAME_NOT_WORKING )
	4122	GAME( 2002, chocomk,   naomigd,  naomigd,  naomi,    naomi,   ROT0,   "Ecole Software",         "Musapey's Choco Marker (Rev A) (GDL-0014A)", GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND|GAME_NOT_WORKING )
4024	4123	//GDL-0015 Mazan
4025	4124	//GDL-0016 Yonin Uchi Mahjong MJ
4026		GAME( 2002, quizqgd,   naomigd,  naomigd,  naomi, naomi,   ROT270, "Amedio (Taito license)", "Quiz Keitai Q mode (GDL-0017)", GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND|GAME_NOT_WORKING )
	4125	GAME( 2002, quizqgd,   naomigd,  naomigd,  naomi,    naomi,   ROT270, "Amedio (Taito license)", "Quiz Keitai Q mode (GDL-0017)", GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND|GAME_NOT_WORKING )
4027	4126	//GDL-0018 Azumanga Daioh Puzzle Bobble
4028	4127	//GDL-0019 Guilty Gear XX #Reload
4029		GAME( 2003, ggxxrl,    naomigd,  naomigd,  naomi, ggxxrl,    ROT0,   "Arc System Works", "Guilty Gear XX #Reload (Rev A) (GDL-0019A)", GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND|GAME_NOT_WORKING )
4030		GAME( 200?, tetkiwam,  naomigd,  naomigd,  naomi, naomi,   ROT0,   "Success",          "Tetris Kiwamemichi (GDL-0020)", GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND|GAME_NOT_WORKING )
4031		GAME( 2003, shikgam2,  naomigd,  naomigd,  naomi, naomi,   ROT270, "Alpha System",     "Shikigami No Shiro II / The Castle of Shikigami II (GDL-0021)", GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND|GAME_NOT_WORKING )
4032		GAME( 2003, usagui,    naomigd,  naomigd,  naomi, naomi,   ROT0,   "Warashi",          "Usagui - Yamashiro Mahjong Hen (GDL-0022)", GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND|GAME_NOT_WORKING )
	4128	GAME( 2003, ggxxrl,    naomigd,  naomigd,  naomi,    ggxxrl,  ROT0,   "Arc System Works",       "Guilty Gear XX #Reload (Rev A) (GDL-0019A)", GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND|GAME_NOT_WORKING )
	4129	GAME( 200?, tetkiwam,  naomigd,  naomigd,  naomi,    naomi,   ROT0,   "Success",                "Tetris Kiwamemichi (GDL-0020)", GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND|GAME_NOT_WORKING )
	4130	GAME( 2003, shikgam2,  naomigd,  naomigd,  naomi,    naomi,   ROT270, "Alpha System",           "Shikigami No Shiro II / The Castle of Shikigami II (GDL-0021)", GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND|GAME_NOT_WORKING )
	4131	GAME( 2003, usagui,    naomigd,  naomigd,  naomi_mp, naomi_mp,ROT0,   "Warashi / Taito / Mahjong Kobo", "Usagi - Yamashiro Mahjong Hen (GDL-0022)", GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND|GAME_NOT_WORKING )
4033	4132	//GDL-0023 Border Down
4034		GAME( 2004, bdrdown,   naomigd,  naomigd,  naomi, naomi,   ROT0,   "G-Rev",            "Border Down (Rev A) (GDL-0023A)", GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND|GAME_NOT_WORKING )
4035		GAME( 2003, psyvar2,   naomigd,  naomigd,  naomi, naomi,   ROT270, "G-Rev",            "Psyvariar 2 - The Will To Fabricate (GDL-0024)", GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND|GAME_NOT_WORKING )
4036		GAME( 2004, cfield,    naomigd,  naomigd,  naomi, naomi,   ROT0,   "Able",             "Chaos Field (GDL-0025)", GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND|GAME_NOT_WORKING )
4037		GAME( 2004, trizeal,   naomigd,  naomigd,  naomi, naomi,   ROT270, "Taito",            "Trizeal (GDL-0026)", GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND|GAME_NOT_WORKING )
	4133	GAME( 2004, bdrdown,   naomigd,  naomigd,  naomi,    naomi,   ROT0,   "G-Rev",                  "Border Down (Rev A) (GDL-0023A)", GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND|GAME_NOT_WORKING )
	4134	GAME( 2003, psyvar2,   naomigd,  naomigd,  naomi,    naomi,   ROT270, "G-Rev",                  "Psyvariar 2 - The Will To Fabricate (GDL-0024)", GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND|GAME_NOT_WORKING )
	4135	GAME( 2004, cfield,    naomigd,  naomigd,  naomi,    naomi,   ROT0,   "Able",                   "Chaos Field (GDL-0025)", GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND|GAME_NOT_WORKING )
	4136	GAME( 2004, trizeal,   naomigd,  naomigd,  naomi,    naomi,   ROT270, "Taito",                  "Trizeal (GDL-0026)", GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND|GAME_NOT_WORKING )
4038	4137	//GDL-0027 Melty Blood Act Cadenza?
4039	4138	//GDL-0028  Melty Blood Act Cadenza Ver A
4040	4139	//GDL-0028A Melty Blood Act Cadenza Ver A (Rev A)
4041	4140	//GDL-0028B Melty Blood Act Cadenza Ver A (Rev B)
4042		GAME( 2005, meltybld,  naomigd,  naomigd,  naomi, naomi,   ROT0,   "Ecole Software",   "Melty Blood Act Cadenza Ver A (Rev C) (GDL-0028C)", GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND|GAME_NOT_WORKING )
	4141	GAME( 2005, meltybld,  naomigd,  naomigd,  naomi,    naomi,   ROT0,   "Ecole Software",         "Melty Blood Act Cadenza Ver A (Rev C) (GDL-0028C)", GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND|GAME_NOT_WORKING )
4043	4142	//GDL-0029
4044		GAME( 2005, senko,     naomigd,  naomigd,  naomi, naomi,   ROT0,   "G-Rev",            "Senko No Ronde NEW ver. (Rev A) (GDL-0030A)", GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND|GAME_NOT_WORKING )
4045		GAME( 2005, senkoo,    senko,    naomigd,  naomi, naomi,   ROT0,   "G-Rev",            "Senko No Ronde (GDL-0030)", GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND|GAME_NOT_WORKING )
	4143	GAME( 2005, senko,     naomigd,  naomigd,  naomi,    naomi,   ROT0,   "G-Rev",                  "Senko No Ronde NEW ver. (Rev A) (GDL-0030A)", GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND|GAME_NOT_WORKING )
	4144	GAME( 2005, senkoo,    senko,    naomigd,  naomi,    naomi,   ROT0,   "G-Rev",                  "Senko No Ronde (GDL-0030)", GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND|GAME_NOT_WORKING )
4046	4145	//GDL-0031 Super Shanghai 2005
4047		GAME( 2005, ss2005,    naomigd,  naomigd,  naomi, naomi,   ROT0,   "Starfish",         "Super Shanghai 2005 (Rev A) (GDL-0031A)", GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND|GAME_NOT_WORKING )
4048		GAME( 2005, radirgy,   naomigd,  naomigd,  naomi, naomi,   ROT270, "Milestone",        "Radirgy (GDL-0032)", GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND|GAME_NOT_WORKING )
	4146	GAME( 2005, ss2005,    naomigd,  naomigd,  naomi,    naomi,   ROT0,   "Starfish",               "Super Shanghai 2005 (Rev A) (GDL-0031A)", GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND|GAME_NOT_WORKING )
	4147	GAME( 2005, radirgy,   naomigd,  naomigd,  naomi,    naomi,   ROT270, "Milestone",              "Radirgy (GDL-0032)", GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND|GAME_NOT_WORKING )
4049	4148	//GDL-0033 Guilty Gear XX Slash
4050		GAME( 2005, ggxxsla,   naomigd,  naomigd,  naomi, ggxxsla,   ROT0,   "Arc System Works", "Guilty Gear XX Slash (Rev A) (GDL-0033A)", GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND|GAME_NOT_WORKING )
4051		GAME( 2006, kurucham,  naomigd,  naomigd,  naomi, naomi,   ROT0,   "Able",             "Kurukuru Chameleon (GDL-0034)", GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND|GAME_NOT_WORKING )
4052		GAME( 2005, undefeat,  naomigd,  naomigd,  naomi, naomi,   ROT270, "G-Rev",            "Under Defeat (GDL-0035)", GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND|GAME_NOT_WORKING )
	4149	GAME( 2005, ggxxsla,   naomigd,  naomigd,  naomi,    ggxxsla, ROT0,   "Arc System Works",       "Guilty Gear XX Slash (Rev A) (GDL-0033A)", GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND|GAME_NOT_WORKING )
	4150	GAME( 2006, kurucham,  naomigd,  naomigd,  naomi,    naomi,   ROT0,   "Able",                   "Kurukuru Chameleon (GDL-0034)", GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND|GAME_NOT_WORKING )
	4151	GAME( 2005, undefeat,  naomigd,  naomigd,  naomi,    naomi,   ROT270, "G-Rev",                  "Under Defeat (GDL-0035)", GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND|GAME_NOT_WORKING )
4053	4152	//GDL-0036 Trigger Heart Exelica
4054		GAME( 2005, trgheart,  naomigd,  naomigd,  naomi, naomi,   ROT270, "Warashi",          "Trigger Heart Exelica (Rev A) (GDL-0036A)", GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND|GAME_NOT_WORKING )
4055		GAME( 2005, jingystm,  naomigd,  naomigd,  naomi, naomi,   ROT0,   "Atrativa Japan",   "Jingi Storm - The Arcade (GDL-0037)", GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND|GAME_NOT_WORKING )
	4153	GAME( 2005, trgheart,  naomigd,  naomigd,  naomi,    naomi,   ROT270, "Warashi",                "Trigger Heart Exelica (Rev A) (GDL-0036A)", GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND|GAME_NOT_WORKING )
	4154	GAME( 2005, jingystm,  naomigd,  naomigd,  naomi,    naomi,   ROT0,   "Atrativa Japan",         "Jingi Storm - The Arcade (GDL-0037)", GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND|GAME_NOT_WORKING )
4056	4155	//GDL-0038 Senko No Ronde Special
4057		GAME( 2006, meltyb,    naomigd,  naomigd,  naomi, naomi,   ROT0,   "Ecole Software",   "Melty Blood Act Cadenza Ver B (GDL-0039)", GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND|GAME_NOT_WORKING )
4058		GAME( 2006, meltyba,   meltyb,   naomigd,  naomi, naomi,   ROT0,   "Ecole Software",   "Melty Blood Act Cadenza Ver B (Rev A) (GDL-0039A)", GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND|GAME_NOT_WORKING )
4059		GAME( 2006, karous,    naomigd,  naomigd,  naomi, naomi,   ROT270, "Milestone",        "Karous (GDL-0040)", GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND|GAME_NOT_WORKING )
	4156	GAME( 2006, meltyb,    naomigd,  naomigd,  naomi,    naomi,   ROT0,   "Ecole Software",         "Melty Blood Act Cadenza Ver B (GDL-0039)", GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND|GAME_NOT_WORKING )
	4157	GAME( 2006, meltyba,   meltyb,   naomigd,  naomi,    naomi,   ROT0,   "Ecole Software",         "Melty Blood Act Cadenza Ver B (Rev A) (GDL-0039A)", GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND|GAME_NOT_WORKING )
	4158	GAME( 2006, karous,    naomigd,  naomigd,  naomi,    naomi,   ROT270, "Milestone",              "Karous (GDL-0040)", GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND|GAME_NOT_WORKING )
4060	4159	//GDL-0041 Guilty Gear XX Accent Core
4061		GAME( 2006, takoron,   naomigd,  naomigd,  naomi, naomi,   ROT0,   "Compile",          "Noukone Puzzle Takoron (GDL-0042)", GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND|GAME_NOT_WORKING )
	4160	GAME( 2006, takoron,   naomigd,  naomigd,  naomi,    naomi,   ROT0,   "Compile",                "Noukone Puzzle Takoron (GDL-0042)", GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND|GAME_NOT_WORKING )
4062	4161
4063	4162
4064	4163	/* GDS-xxxx (Sega first party games) */
4065		GAME( 2001, confmiss,  naomigd,  naomigd,  naomi, naomi,  ROT0, "Sega",          "Confidential Mission (GDS-0001)", GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND|GAME_NOT_WORKING )
	4164	GAME( 2001, confmiss,  naomigd,  naomigd,  naomi,    naomi,  ROT0, "Sega",          "Confidential Mission (GDS-0001)", GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND|GAME_NOT_WORKING )
4066	4165	//GDS-0002 Shakatto Tambourine
4067		GAME( 2000, sprtjam,   naomigd,  naomigd,  naomi, naomi,  ROT0, "Sega",          "Sports Jam (GDS-0003)", GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND|GAME_NOT_WORKING )
4068		GAME( 2000, slashout,  naomigd,  naomigd,  naomi, naomi,  ROT0, "Sega",          "Slashout (GDS-0004)", GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND|GAME_NOT_WORKING )
4069		GAME( 2001, spkrbtl,   naomigd,  naomigd,  naomi, naomi,  ROT0, "Sega",          "Spikers Battle (GDS-0005)", GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND|GAME_NOT_WORKING )
	4166	GAME( 2000, sprtjam,   naomigd,  naomigd,  naomi,    naomi,  ROT0, "Sega",          "Sports Jam (GDS-0003)", GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND|GAME_NOT_WORKING )
	4167	GAME( 2000, slashout,  naomigd,  naomigd,  naomi,    naomi,  ROT0, "Sega",          "Slashout (GDS-0004)", GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND|GAME_NOT_WORKING )
	4168	GAME( 2001, spkrbtl,   naomigd,  naomigd,  naomi,    naomi,  ROT0, "Sega",          "Spikers Battle (GDS-0005)", GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND|GAME_NOT_WORKING )
4070	4169	//GDS-0006 Virtua Striker 3 (NAOMI 2)
4071	4170	//GDS-0007 Shakatto Tambourine Motto Norinori Shinkyoku Tsuika
4072		GAME( 2001, monkeyba,  naomigd,  naomigd,  naomi, naomi,  ROT0, "Sega",          "Monkey Ball (GDS-0008)", GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND|GAME_NOT_WORKING )
4073		GAME( 2001, dygolf,    naomigd,  naomigd,  naomi, naomi,  ROT0, "Sega",          "Virtua Golf / Dynamic Golf (GDS-0009)", GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND|GAME_NOT_WORKING )
4074		GAME( 2001, wsbbgd,    naomigd,  naomigd,  naomi, naomi,  ROT0, "Sega",          "World Series Baseball / Super Major League (GDS-0010)", GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND|GAME_NOT_WORKING )
4075		GAME( 2001, vtennisg,  naomigd,  naomigd,  naomi, naomi,  ROT0, "Sega",          "Virtua Tennis (GDS-0011)", GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND|GAME_NOT_WORKING )
	4171	GAME( 2001, monkeyba,  naomigd,  naomigd,  naomi,    naomi,  ROT0, "Sega",          "Monkey Ball (GDS-0008)", GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND|GAME_NOT_WORKING )
	4172	GAME( 2001, dygolf,    naomigd,  naomigd,  naomi,    naomi,  ROT0, "Sega",          "Virtua Golf / Dynamic Golf (GDS-0009)", GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND|GAME_NOT_WORKING )
	4173	GAME( 2001, wsbbgd,    naomigd,  naomigd,  naomi,    naomi,  ROT0, "Sega",          "World Series Baseball / Super Major League (GDS-0010)", GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND|GAME_NOT_WORKING )
	4174	GAME( 2001, vtennisg,  naomigd,  naomigd,  naomi,    naomi,  ROT0, "Sega",          "Virtua Tennis (GDS-0011)", GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND|GAME_NOT_WORKING )
4076	4175	//GDS-0012 Virtua Fighter 4 (NAOMI 2)
4077	4176	//GDS-0013
4078	4177	//GDS-0014 Beach Spikers (NAOMI 2)
4079	4178	//GDS-0015 Virtua Tennis 2 / Power Smash 2
4080		GAME( 2001, vtennis2,  naomigd,  naomigd,  naomi, naomi,  ROT0, "Sega",          "Virtua Tennis 2 (Rev A) (GDS-0015A)", GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND|GAME_NOT_WORKING )
	4179	GAME( 2001, vtennis2,  naomigd,  naomigd,  naomi,    naomi,  ROT0, "Sega",          "Virtua Tennis 2 (Rev A) (GDS-0015A)", GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND|GAME_NOT_WORKING )
4081	4180	//GDS-0016 Shakatto Tambourine Cho Powerup Chu
4082		GAME( 2001, keyboard,  naomigd,  naomigd,  naomi, naomi,  ROT0, "Sega",          "La Keyboardxyu (GDS-0017)", GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND|GAME_NOT_WORKING )
4083		GAME( 2001, lupinsho,  naomigd,  naomigd,  naomi, naomi,  ROT0, "Sega",          "Lupin The Third - The Shooting (GDS-0018)", GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND|GAME_NOT_WORKING )
4084		GAME( 2002, vathlete,  naomigd,  naomigd,  naomi, naomi,  ROT0, "Sega",          "Virtua Athletics / Virtua Athlete (GDS-0019)", GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND|GAME_NOT_WORKING )
	4181	GAME( 2001, keyboard,  naomigd,  naomigd,  naomi,    naomi,  ROT0, "Sega",          "La Keyboardxyu (GDS-0017)", GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND|GAME_NOT_WORKING )
	4182	GAME( 2001, lupinsho,  naomigd,  naomigd,  naomi,    naomi,  ROT0, "Sega",          "Lupin The Third - The Shooting (GDS-0018)", GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND|GAME_NOT_WORKING )
	4183	GAME( 2002, vathlete,  naomigd,  naomigd,  naomi,    naomi,  ROT0, "Sega",          "Virtua Athletics / Virtua Athlete (GDS-0019)", GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND|GAME_NOT_WORKING )
4085	4184	//GDS-0020 Initial D Arcade Stage (Japan) (NAOMI 2)
4086	4185	//GDS-0021 Lupin The Third - The Typing
4087		GAME( 2002, luptype,   naomigd,  naomigd,  naomi, naomi,  ROT0, "Sega",          "Lupin The Third - The Typing (Rev A) (GDS-0021A)", GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND|GAME_NOT_WORKING )
4088		GAME( 2002, mok,       naomigd,  naomigd,  naomi, naomi,  ROT0, "Sega",          "The Maze of the Kings (GDS-0022)", GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND|GAME_NOT_WORKING )
	4186	GAME( 2002, luptype,   naomigd,  naomigd,  naomi,    naomi,  ROT0, "Sega",          "Lupin The Third - The Typing (Rev A) (GDS-0021A)", GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND|GAME_NOT_WORKING )
	4187	GAME( 2002, mok,       naomigd,  naomigd,  naomi,    naomi,  ROT0, "Sega",          "The Maze of the Kings (GDS-0022)", GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND|GAME_NOT_WORKING )
4089	4188	//GDS-0023 Naomi DIMM Firmware Updater
4090		GAME( 2001, ngdup23a,  naomigd,  naomigd,  naomi, naomi,  ROT0, "Sega",          "Naomi DIMM Firmware Updater (GDS-0023A)", GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND|GAME_NOT_WORKING )
	4189	GAME( 2001, ngdup23a,  naomigd,  naomigd,  naomi,    naomi,  ROT0, "Sega",          "Naomi DIMM Firmware Updater (GDS-0023A)", GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND|GAME_NOT_WORKING )
4091	4190	//GDS-0023B Naomi DIMM Firmware Updater
4092		GAME( 2001, ngdup23c,  naomigd,  naomigd,  naomi, naomi,  ROT0, "Sega",          "Naomi DIMM Firmware Updater (GDS-0023C)", GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND|GAME_NOT_WORKING )
	4191	GAME( 2001, ngdup23c,  naomigd,  naomigd,  naomi,    naomi,  ROT0, "Sega",          "Naomi DIMM Firmware Updater (GDS-0023C)", GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND|GAME_NOT_WORKING )
4093	4192	//GDS-0024 Virtua Fighter 4 Evolution (NAOMI 2)
4094	4193	//GDS-0025 Initial D Arcade Stage (Export) (NAOMI 2)
4095	4194	//GDS-0026 Initial D Arcade Stage Ver. 2 (Japan) (NAOMI 2)
r4679	r4680
4097	4196	//GDS-0028
4098	4197	//GDS-0029
4099	4198	//GDS-0030
4100		GAME( 2003, puyofev,   naomigd,  naomigd,  naomi, naomi,  ROT0, "Sega",          "Puyo Puyo Fever (GDS-0031)", GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND|GAME_NOT_WORKING )
	4199	GAME( 2003, puyofev,   naomigd,  naomigd,  naomi,    naomi,  ROT0, "Sega",          "Puyo Puyo Fever (GDS-0031)", GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND|GAME_NOT_WORKING )
4101	4200	//GDS-0032 Initial D Arcade Stage Ver. 3 (Japan)
4102	4201	//GDS-0033 Initial D Arcade Stage Ver. 3 (Export)
4103	4202	//GDS-0034
r4679	r4680
4106	4205	//GDS-0037? Puyo Puyo Fever (Export)
4107	4206
4108	4207
4109		/* Naomi 2 & Naomi 2 GD-ROM */
	4208	/**********************************************
	4209	*
	4210	* Naomi 2 Cart defines
	4211	*
	4212	*********************************************/
4110	4213
4111	4214	ROM_START( vstrik3c )
4112	4215	NAOMI2_BIOS
4113	4216
4114	4217	ROM_REGION( 0xb000000, "user1", ROMREGION_ERASEFF)
4115	4218	ROM_LOAD("epr-23663.ic22", 0x0000000, 0x0400000, CRC(7007fec7) SHA1(523168f0b218d0bd5c815d65bf0caba2c8468c9d) )
	4219	/* TODO: proper rom names */
4116	4220	ROM_LOAD("ic.1", 0x0800000, 0x0800000, CRC(db8bf632) SHA1(cd0c5c385dc33778eb6477f48a33d31f8461b810) )
4117	4221	ROM_LOAD("ic.2", 0x1000000, 0x0800000, CRC(f5889f8b) SHA1(540aa6a9adf10d5426ac4962afdc300cc9c5c6ba) )
4118	4222	ROM_LOAD("ic.3", 0x1800000, 0x0800000, CRC(74e7ef35) SHA1(6b63910fa05f98b31689882d3f7f32ea84fb11e5) )
r4679	r4680
4163	4267	ROM_LOAD("ic.20",0xa000000, 0x0800000, NO_DUMP )
4164	4268	ROM_END
4165	4269
	4270	/**********************************************
	4271	*
	4272	* Naomi 2 GD-ROM defines
	4273	*
	4274	*********************************************/
	4275
4166	4276	ROM_START( vstrik3 )
4167	4277	NAOMI2_BIOS
4168	4278
r4679	r4680
4394	4504	/* Incomplete Dumps (just the program rom IC22) */
4395	4505	GAME( 2001, wldrider, naomi2,  naomi,    naomi,    0,  ROT0,  "Sega",          "Wild Riders (JPN, USA, EXP, KOR, AUS)", GAME_UNEMULATED_PROTECTION|GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND|GAME_NOT_WORKING )
4396	4506
4397		// GDS-xxxx (first party games?)
	4507	/* GDS-xxxx (Sega first party games) */
4398	4508	GAME( 2001, vstrik3, naomi2,  naomigd,    naomi,    0,  ROT0, "Sega",          "Virtua Striker 3 (GDS-0006)", GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND|GAME_NOT_WORKING )
4399	4509	GAME( 2001, vf4,     naomi2,  naomigd,    naomi,    0,  ROT0, "Sega",          "Virtua Fighter 4 (GDS-0012)", GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND|GAME_NOT_WORKING )
4400	4510	GAME( 2001, vf4b,    vf4,     naomigd,    naomi,    0,  ROT0, "Sega",          "Virtua Fighter 4 (Rev B) (GDS-0012B)", GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND|GAME_NOT_WORKING )
r4679	r4680
4410	4520	GAME( 2004, vf4tunedd,vf4tuned,naomigd,   naomi,    0,  ROT0, "Sega",          "Virtua Fighter 4 Final Tuned (Rev D) (GDS-0036D)", GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND|GAME_NOT_WORKING )
4411	4521	GAME( 2004, vf4tuneda,vf4tuned,naomigd,   naomi,    0,  ROT0, "Sega",          "Virtua Fighter 4 Final Tuned (Rev A) (GDS-0036A)", GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND|GAME_NOT_WORKING )
4412	4522
	4523	/**********************************************
	4524	*
	4525	* Atomiswave cart defines
	4526	*
	4527	*********************************************/
4413	4528
	4529	struct AtomiswaveKey
	4530	{
	4531	int P0[16];
	4532	int P1[16];
	4533	int S0[32];
	4534	int S1[16];
	4535	int S2[16];
	4536	int S3[8];
	4537	};
	4538
	4539	static const struct AtomiswaveKey fotns_key = {
	4540	{0,2,7,11,12,1,5,6,15,4,8,9,14,3,10,13},
	4541	{12,8,3,7,0,15,1,11,6,10,4,14,9,5,13,2},
	4542	{4,1,10,16,9,25,26,31,13,0,14,15,24,6,30,18,7,20,5,12,22,17,27,3,8,11,21,29,19,23,28,2},
	4543	{3,2,11,14,10,13,12,0,7,6,8,15,5,1,4,9},
	4544	{10,3,6,12,7,11,4,14,0,2,8,1,15,13,5,9},
	4545	{7,1,6,5,4,2,0,3}
	4546	};
	4547
	4548	static const struct AtomiswaveKey df_key = {
	4549	{1,4,5,6,9,7,10,11,13,0,8,12,14,2,3,15},
	4550	{12,0,3,8,7,6,15,11,1,4,14,10,9,5,13,2},
	4551	{9,27,15,6,28,30,7,12,21,0,1,25,22,3,16,29,13,4,24,20,2,5,23,19,18,10,8,14,17,11,31,26},
	4552	{5,13,4,0,8,12,14,7,2,11,3,10,6,1,15,9},
	4553	{11,6,2,9,12,1,7,4,10,0,13,3,8,14,15,5},
	4554	{1,6,4,3,5,2,7,0}
	4555	};
	4556
	4557
	4558	static UINT16 atomiswave_decrypt(UINT16 cipherText, int address, const struct AtomiswaveKey* key)
	4559	{
	4560	int b0,b1,b2,b3;
	4561	int aux;
	4562
	4563	aux = BITSWAP16(cipherText,
	4564	key->P0[15],key->P0[14],key->P0[13],key->P0[12],key->P0[11],key->P0[10],key->P0[9],key->P0[8],
	4565	key->P0[7],key->P0[6],key->P0[5],key->P0[4],key->P0[3],key->P0[2],key->P0[1],key->P0[0]);
	4566	aux = aux ^ BITSWAP16(address/2,
	4567	key->P1[15],key->P1[14],key->P1[13],key->P1[12],key->P1[11],key->P1[10],key->P1[9],key->P1[8],
	4568	key->P1[7],key->P1[6],key->P1[5],key->P1[4],key->P1[3],key->P1[2],key->P1[1],key->P1[0]);
	4569
	4570	b0 = aux&0x1f;
	4571	b1 = (aux>>5)&0xf;
	4572	b2 = (aux>>9)&0xf;
	4573	b3 = aux>>13;
	4574
	4575	b0 = key->S0[b0];
	4576	b1 = key->S1[b1];
	4577	b2 = key->S2[b2];
	4578	b3 = key->S3[b3];
	4579
	4580	return (b3<<13)|(b2<<9)|(b1<<5)|b0;
	4581	}
	4582
	4583
	4584	static DRIVER_INIT(fotns)
	4585	{
	4586	int i;
	4587	UINT16 *src = (UINT16 *)(memory_region(machine, "user1"));
	4588
	4589	long rom_size = memory_region_length(machine, "user1");
	4590
	4591	for(i=0; i<rom_size/2; i++)
	4592	{
	4593	src[i] = atomiswave_decrypt(src[i], i*2, &fotns_key);
	4594	}
	4595
	4596	#if 0
	4597	{
	4598	FILE *fp;
	4599	const char *gamename = machine->gamedrv->name;
	4600	char filename[256];
	4601	sprintf(filename, "%s.dump", gamename);
	4602
	4603	fp=fopen(filename, "w+b");
	4604	if (fp)
	4605	{
	4606	fwrite(src, rom_size, 1, fp);
	4607	fclose(fp);
	4608	}
	4609	}
	4610	#endif
	4611	}
	4612
	4613
	4614
	4615	static DRIVER_INIT(demofist)
	4616	{
	4617	int i;
	4618	UINT16 *src = (UINT16 *)(memory_region(machine, "user1"));
	4619
	4620	long rom_size = memory_region_length(machine, "user1");
	4621
	4622	for(i=0; i<rom_size/2; i++)
	4623	{
	4624	src[i] = atomiswave_decrypt(src[i], i*2, &df_key);
	4625	}
	4626
	4627	#if 0
	4628	{
	4629	FILE *fp;
	4630	const char *gamename = machine->gamedrv->name;
	4631	char filename[256];
	4632	sprintf(filename, "%s.dump", gamename);
	4633
	4634	fp=fopen(filename, "w+b");
	4635	if (fp)
	4636	{
	4637	fwrite(src, rom_size, 1, fp);
	4638	fclose(fp);
	4639	}
	4640	}
	4641	#endif
	4642	}
	4643
	4644	ROM_START( fotns )
	4645	ROM_REGION( 0x200000, "maincpu", 0)
	4646	AW_BIOS
	4647
	4648	ROM_REGION( 0x8000000, "user1", ROMREGION_ERASE)
	4649	ROM_LOAD("ax1901p01.ic18", 0x0000000, 0x0800000,  CRC(a06998b0) SHA1(d617691db5170f6db176e40fc732966d523fd8cf) )
	4650	ROM_LOAD("ax1901m01.ic11", 0x1000000, 0x1000000,  CRC(ff5a1642) SHA1(49cefcce173f9a811fe9c0c07bee53aeba2bc3a8) )
	4651	ROM_LOAD("ax1902m01.ic12", 0x2000000, 0x1000000,  CRC(d9aae8a9) SHA1(bf87034088be0847b6e297b7665e0ea4d8cba631) )
	4652	ROM_LOAD("ax1903m01.ic13", 0x3000000, 0x1000000,  CRC(1711b23d) SHA1(ab628b2ec678839c75245e245297818ef1592d3b) )
	4653	ROM_LOAD("ax1904m01.ic14", 0x4000000, 0x1000000,  CRC(443bfb26) SHA1(6f7751afa0ca55dd0679758b27bed92b31c1b050) )
	4654	ROM_LOAD("ax1905m01.ic15", 0x5000000, 0x1000000,  CRC(eb1cada0) SHA1(459d21d622c72606f1d3095e8a25b6c4adccf8ab) )
	4655	ROM_LOAD("ax1906m01.ic16", 0x6000000, 0x1000000,  CRC(fe6da168) SHA1(d4ab6443383469bb5a4337005de917627a2e21cc) )
	4656	ROM_LOAD("ax1907m01.ic17", 0x7000000, 0x1000000,  CRC(9d3a0520) SHA1(78583fd171b34439f77a04a97ebe3c9d1bab61cc) )
	4657	ROM_END
	4658
	4659	ROM_START( demofist )
	4660	ROM_REGION( 0x200000, "maincpu", 0)
	4661	AW_BIOS
	4662
	4663	ROM_REGION( 0x8000000, "user1", ROMREGION_ERASE)
	4664	ROM_LOAD("ax0601p01.ic18", 0x0000000, 0x0800000,  CRC(0efb38ad) SHA1(9400e37efe3e936474d74400ebdf28ad0869b67b) )
	4665	ROM_LOAD("ic11", 0x1000000, 0x1000000,  NO_DUMP )
	4666	ROM_LOAD("ic12", 0x2000000, 0x1000000,  NO_DUMP )
	4667	ROM_LOAD("ic13", 0x3000000, 0x1000000,  NO_DUMP )
	4668	ROM_LOAD("ic14", 0x4000000, 0x1000000,  NO_DUMP )
	4669	ROM_LOAD("ic15", 0x5000000, 0x1000000,  NO_DUMP )
	4670	ROM_LOAD("ic16", 0x6000000, 0x1000000,  NO_DUMP )
	4671	ROM_LOAD("ic17", 0x7000000, 0x1000000,  NO_DUMP )
	4672	ROM_END
	4673
4414	4674	/* Atomiswave */
4415		GAME( 2001, awbios,   0,        naomi,    naomi,    0, ROT0, "Sammy",           "Atomiswave Bios", GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND|GAME_NOT_WORKING|GAME_IS_BIOS_ROOT )
4416		GAME( 2005, fotns,    awbios,   naomi,    naomi,    fotns, ROT0, "Arc System Works",           "Fist Of The North Star", GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND|GAME_NOT_WORKING )
	4675	GAME( 2001, awbios,   0,        naomi,    naomi,    0,        ROT0, "Sammy",                           "Atomiswave Bios", GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND|GAME_NOT_WORKING|GAME_IS_BIOS_ROOT )
	4676
	4677	GAME( 2005, fotns,    awbios,   naomi,    naomi,    fotns,    ROT0, "Arc System Works",                "Fist Of The North Star", GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND|GAME_NOT_WORKING )
4417	4678	GAME( 2003, demofist, awbios,   naomi,    naomi,    demofist, ROT0, "Polygon Magic / Dimps",           "Demolish Fist", GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND|GAME_NOT_WORKING )

src/mame/drivers/nemesis.c

r4679	r4680
1601	1601	static void sound_irq(const device_config *device, int state)
1602	1602	{
1603	1603	/* Interrupts _are_ generated, I wonder where they go.. */
1604		/*cpu_set_input_line(device->machine->cpu[1],0,HOLD_LINE);*/
	1604	/*cputag_set_input_line(device->machine, "audiocpu", 0, HOLD_LINE);*/
1605	1605	}
1606	1606
1607	1607	static const ym2151_interface ym2151_config =

src/mame/drivers/cheekyms.c

r4679	r4680
27	27	{
28	28	/* this starts a 556 one-shot timer (and triggers a sound effect) */
29	29	if (newval)
30		cpu_set_input_line(field->port->machine->cpu[0], INPUT_LINE_NMI, PULSE_LINE);
	30	cputag_set_input_line(field->port->machine, "maincpu", INPUT_LINE_NMI, PULSE_LINE);
31	31	}
32	32
33	33

src/mame/drivers/progolf.c

r4679	r4680
267	267	int A;
268	268	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
269	269	UINT8 *rom = memory_region(machine, "maincpu");
270		UINT8* decrypted = auto_malloc(0x10000);
	270	UINT8* decrypted = auto_alloc_array(machine, UINT8, 0x10000);
271	271
272	272	memory_set_decrypted_region(space,0x0000,0xffff, decrypted);
273	273

src/mame/drivers/magmax.c

r4679	r4680
49	49	if (ACCESSING_BITS_0_7)
50	50	{
51	51	sound_latch = (data & 0xff) << 1;
52		cpu_set_input_line(space->machine->cpu[1], 0, ASSERT_LINE);
	52	cputag_set_input_line(space->machine, "audiocpu", 0, ASSERT_LINE);
53	53	}
54	54	}
55	55
56	56	static READ8_HANDLER( magmax_sound_irq_ack )
57	57	{
58		cpu_set_input_line(space->machine->cpu[1], 0, CLEAR_LINE);
	58	cputag_set_input_line(space->machine, "audiocpu", 0, CLEAR_LINE);
59	59	return 0;
60	60	}
61	61
r4679	r4680
210	210
211	211
212	212
213		static ADDRESS_MAP_START( magmax_readmem, ADDRESS_SPACE_PROGRAM, 16 )
214		AM_RANGE(0x000000, 0x013fff) AM_READ(SMH_ROM)
215		AM_RANGE(0x018000, 0x018fff) AM_READ(SMH_RAM)
216		AM_RANGE(0x020000, 0x0207ff) AM_READ(SMH_RAM)
217		AM_RANGE(0x028000, 0x0281ff) AM_READ(SMH_RAM)
	213	static ADDRESS_MAP_START( magmax_map, ADDRESS_SPACE_PROGRAM, 16 )
	214	AM_RANGE(0x000000, 0x013fff) AM_ROM
	215	AM_RANGE(0x018000, 0x018fff) AM_RAM
	216	AM_RANGE(0x020000, 0x0207ff) AM_RAM AM_BASE(&videoram16) AM_SIZE(&videoram_size)
	217	AM_RANGE(0x028000, 0x0281ff) AM_RAM AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)
218	218	AM_RANGE(0x030000, 0x030001) AM_READ_PORT("P1")
219	219	AM_RANGE(0x030002, 0x030003) AM_READ_PORT("P2")
220	220	AM_RANGE(0x030004, 0x030005) AM_READ_PORT("SYSTEM")
221	221	AM_RANGE(0x030006, 0x030007) AM_READ_PORT("DSW")
222		ADDRESS_MAP_END
223
224		static ADDRESS_MAP_START( magmax_writemem, ADDRESS_SPACE_PROGRAM, 16 )
225		AM_RANGE(0x000000, 0x013fff) AM_WRITE(SMH_ROM)
226		AM_RANGE(0x018000, 0x018fff) AM_WRITE(SMH_RAM)
227		AM_RANGE(0x020000, 0x0207ff) AM_WRITE(SMH_RAM) AM_BASE(&videoram16) AM_SIZE(&videoram_size)
228		AM_RANGE(0x028000, 0x0281ff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)
229	222	AM_RANGE(0x030010, 0x030011) AM_WRITE(magmax_vreg_w) AM_BASE(&magmax_vreg)
230		AM_RANGE(0x030012, 0x030013) AM_WRITE(SMH_RAM) AM_BASE(&magmax_scroll_x)
231		AM_RANGE(0x030014, 0x030015) AM_WRITE(SMH_RAM) AM_BASE(&magmax_scroll_y)
	223	AM_RANGE(0x030012, 0x030013) AM_WRITEONLY AM_BASE(&magmax_scroll_x)
	224	AM_RANGE(0x030014, 0x030015) AM_WRITEONLY AM_BASE(&magmax_scroll_y)
232	225	AM_RANGE(0x03001c, 0x03001d) AM_WRITE(magmax_sound_w)
233	226	AM_RANGE(0x03001e, 0x03001f) AM_WRITENOP   /* IRQ ack */
234	227	ADDRESS_MAP_END
235	228
236		static ADDRESS_MAP_START( magmax_soundreadmem, ADDRESS_SPACE_PROGRAM, 8 )
237		AM_RANGE(0x0000, 0x3fff) AM_READ(SMH_ROM)
	229	static ADDRESS_MAP_START( magmax_sound_map, ADDRESS_SPACE_PROGRAM, 8 )
	230	AM_RANGE(0x0000, 0x3fff) AM_ROM
238	231	AM_RANGE(0x4000, 0x4000) AM_READ(magmax_sound_irq_ack)
239		AM_RANGE(0x6000, 0x67ff) AM_READ(SMH_RAM)
	232	AM_RANGE(0x6000, 0x67ff) AM_RAM
240	233	ADDRESS_MAP_END
241	234
242		static ADDRESS_MAP_START( magmax_soundwritemem, ADDRESS_SPACE_PROGRAM, 8 )
243		AM_RANGE(0x0000, 0x3fff) AM_WRITE(SMH_ROM)
244		AM_RANGE(0x6000, 0x67ff) AM_WRITE(SMH_RAM)
245		ADDRESS_MAP_END
246
247	235	static ADDRESS_MAP_START( magmax_sound_io_map, ADDRESS_SPACE_IO, 8 )
248	236	ADDRESS_MAP_GLOBAL_MASK(0xff)
249	237	AM_RANGE(0x00, 0x01) AM_DEVWRITE("ay1", ay8910_address_data_w)
r4679	r4680
371	359
372	360	/* basic machine hardware */
373	361	MDRV_CPU_ADD("maincpu", M68000, XTAL_16MHz/2)   /* verified on pcb */
374		MDRV_CPU_PROGRAM_MAP(magmax_readmem,magmax_writemem)
	362	MDRV_CPU_PROGRAM_MAP(magmax_map,0)
375	363	MDRV_CPU_VBLANK_INT("screen", irq1_line_hold)
376	364
377	365	MDRV_CPU_ADD("audiocpu", Z80,XTAL_20MHz/8) /* verified on pcb */
378		MDRV_CPU_PROGRAM_MAP(magmax_soundreadmem,magmax_soundwritemem)
	366	MDRV_CPU_PROGRAM_MAP(magmax_sound_map,0)
379	367	MDRV_CPU_IO_MAP(magmax_sound_io_map,0)
380	368
381	369	MDRV_QUANTUM_TIME(HZ(600))

src/mame/drivers/asteroid.c

r4679	r4680
269	269	AM_RANGE(0x2000, 0x2000) AM_READ_PORT("IN0")
270	270	AM_RANGE(0x2400, 0x2407) AM_READ(asteroid_IN1_r)   /* IN1 */
271	271	AM_RANGE(0x2800, 0x2803) AM_READ(asteroid_DSW1_r)   /* DSW1 */
272		AM_RANGE(0x2c00, 0x2c00) AM_READ_PORT("PADDLE")
	272	AM_RANGE(0x2c00, 0x2c00) AM_READ_PORT("THRUST")
273	273	AM_RANGE(0x3000, 0x3000) AM_WRITE(avgdvg_go_w)
274	274	AM_RANGE(0x3200, 0x3200) AM_WRITE(llander_led_w)
275	275	AM_RANGE(0x3400, 0x3400) AM_WRITE(watchdog_reset_w)
r4679	r4680
290	290
291	291	static CUSTOM_INPUT( clock_r )
292	292	{
293		return (cpu_get_total_cycles(field->port->machine->cpu[0]) & 0x100) ? 1 : 0;
	293	return (cputag_get_total_cycles(field->port->machine, "maincpu") & 0x100) ? 1 : 0;
294	294	}
295	295
296	296	static INPUT_PORTS_START( asteroid )
r4679	r4680
547	547	/* The way the DAC/counter circuit always trys to self center at the voltage derived from the thrust control, */
548	548	/* I don't think it ever expected to get to 0xff. We can not emulate the external DAC circuit exactly, */
549	549	/* so changing the range to 0xfe seems to solve the problem. */
550		PORT_START("PADDLE")
551		PORT_BIT( 0xff, 0x00, IPT_PADDLE ) PORT_MINMAX(0,254) PORT_SENSITIVITY(100) PORT_KEYDELTA(10) PORT_CODE_DEC(KEYCODE_UP) PORT_CODE_DEC(JOYCODE_Y_UP_SWITCH) PORT_CODE_INC(KEYCODE_DOWN) PORT_CODE_INC(JOYCODE_Y_DOWN_SWITCH) PORT_REVERSE
	550	/* The thrust control is basically a hand operated pedal. */
	551	/* so IPT_PEDAL is used because it more accurately emulates the control then using IPT_PADDLE */
	552	PORT_START("THRUST")
	553	PORT_BIT( 0xff, 0x00, IPT_PEDAL ) PORT_MINMAX(0,254) PORT_SENSITIVITY(100) PORT_KEYDELTA(10)
552	554	INPUT_PORTS_END
553	555
554	556
r4679	r4680
880	882
881	883	static DRIVER_INIT( asteroib )
882	884	{
883		memory_install_read_port_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x2000, 0x2000, 0, 0, "IN0");
884		memory_install_read_port_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x2003, 0x2003, 0, 0, "HS");
	885	memory_install_read_port_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x2000, 0x2000, 0, 0, "IN0");
	886	memory_install_read_port_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x2003, 0x2003, 0, 0, "HS");
885	887	}
886	888
887	889
888	890	static DRIVER_INIT( asterock )
889	891	{
890		memory_install_read8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x2000, 0x2007, 0, 0, asterock_IN0_r);
	892	memory_install_read8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x2000, 0x2007, 0, 0, asterock_IN0_r);
891	893	}
892	894
893	895

src/mame/drivers/stv.c

r4679	r4680
256	256
257	257	/*A-Bus IRQ checks,where they could be located these?*/
258	258	#define ABUSIRQ(_irq_,_vector_) \
259		{ cpu_set_input_line_and_vector(device->machine->cpu[0], _irq_, HOLD_LINE , _vector_); }
	259	{ cputag_set_input_line_and_vector(device->machine, "maincpu", _irq_, HOLD_LINE , _vector_); }
260	260	#if 0
261	261	if(stv_scu[42] & 1)//IRQ ACK
262	262	{
r4679	r4680
525	525	if(!(smpc_ram[0x77] & 0x10))
526	526	{
527	527	if(LOG_SMPC) logerror("SMPC: M68k on\n");
528		cpu_set_input_line(space->machine->cpu[2], INPUT_LINE_RESET, CLEAR_LINE);
	528	cputag_set_input_line(space->machine, "audiocpu", INPUT_LINE_RESET, CLEAR_LINE);
529	529	en_68k = 1;
530	530	}
531	531	else
532	532	{
533	533	if(LOG_SMPC) logerror("SMPC: M68k off\n");
534		cpu_set_input_line(space->machine->cpu[2], INPUT_LINE_RESET, ASSERT_LINE);
	534	cputag_set_input_line(space->machine, "audiocpu", INPUT_LINE_RESET, ASSERT_LINE);
535	535	en_68k = 0;
536	536	}
537	537	//if(LOG_SMPC) logerror("SMPC: ram [0x77] = %02x\n",smpc_ram[0x77]);
r4679	r4680
560	560	if(EXLE1 || EXLE2)
561	561	{
562	562	//if(LOG_SMPC) logerror ("Interrupt: PAD irq at scanline %04x, Vector 0x48 Level 0x08\n",scanline);
563		cpu_set_input_line_and_vector(space->machine->cpu[0], 8, (stv_irq.pad) ? HOLD_LINE : CLEAR_LINE, 0x48);
	563	cputag_set_input_line_and_vector(space->machine, "maincpu", 8, (stv_irq.pad) ? HOLD_LINE : CLEAR_LINE, 0x48);
564	564	}
565	565	}
566	566
r4679	r4680
578	578	smpc_ram[0x5f]=0x02;
579	579	#if USE_SLAVE
580	580	stv_enable_slave_sh2 = 1;
581		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_RESET, CLEAR_LINE);
	581	cputag_set_input_line(space->machine, "slave", INPUT_LINE_RESET, CLEAR_LINE);
582	582	#endif
583	583	break;
584	584	case 0x03:
r4679	r4680
586	586	smpc_ram[0x5f]=0x03;
587	587	stv_enable_slave_sh2 = 0;
588	588	cpuexec_trigger(space->machine, 1000);
589		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_RESET, ASSERT_LINE);
	589	cputag_set_input_line(space->machine, "slave", INPUT_LINE_RESET, ASSERT_LINE);
590	590	break;
591	591	case 0x06:
592	592	if(LOG_SMPC) logerror ("SMPC: Sound ON\n");
593	593	/* wrong? */
594	594	smpc_ram[0x5f]=0x06;
595		cpu_set_input_line(space->machine->cpu[2], INPUT_LINE_RESET, CLEAR_LINE);
	595	cputag_set_input_line(space->machine, "audiocpu", INPUT_LINE_RESET, CLEAR_LINE);
596	596	break;
597	597	case 0x07:
598	598	if(LOG_SMPC) logerror ("SMPC: Sound OFF\n");
r4679	r4680
604	604	case 0x0d:
605	605	if(LOG_SMPC) logerror ("SMPC: System Reset\n");
606	606	smpc_ram[0x5f]=0x0d;
607		cpu_set_input_line(space->machine->cpu[0], INPUT_LINE_RESET, PULSE_LINE);
	607	cputag_set_input_line(space->machine, "maincpu", INPUT_LINE_RESET, PULSE_LINE);
608	608	system_reset();
609	609	break;
610	610	case 0x0e:
611	611	if(LOG_SMPC) logerror ("SMPC: Change Clock to 352\n");
612	612	smpc_ram[0x5f]=0x0e;
613		cpu_set_clock(space->machine->cpu[0], MASTER_CLOCK_352/2);
614		cpu_set_clock(space->machine->cpu[1], MASTER_CLOCK_352/2);
615		cpu_set_clock(space->machine->cpu[2], MASTER_CLOCK_352/5);
616		cpu_set_input_line(space->machine->cpu[0], INPUT_LINE_NMI, PULSE_LINE); // ff said this causes nmi, should we set a timer then nmi?
	613	cputag_set_clock(space->machine, "maincpu", MASTER_CLOCK_352/2);
	614	cputag_set_clock(space->machine, "slave", MASTER_CLOCK_352/2);
	615	cputag_set_clock(space->machine, "audiocpu", MASTER_CLOCK_352/5);
	616	cputag_set_input_line(space->machine, "maincpu", INPUT_LINE_NMI, PULSE_LINE); // ff said this causes nmi, should we set a timer then nmi?
617	617	break;
618	618	case 0x0f:
619	619	if(LOG_SMPC) logerror ("SMPC: Change Clock to 320\n");
620	620	smpc_ram[0x5f]=0x0f;
621		cpu_set_clock(space->machine->cpu[0], MASTER_CLOCK_320/2);
622		cpu_set_clock(space->machine->cpu[1], MASTER_CLOCK_320/2);
623		cpu_set_clock(space->machine->cpu[2], MASTER_CLOCK_320/5);
624		cpu_set_input_line(space->machine->cpu[0], INPUT_LINE_NMI, PULSE_LINE); // ff said this causes nmi, should we set a timer then nmi?
	621	cputag_set_clock(space->machine, "maincpu", MASTER_CLOCK_320/2);
	622	cputag_set_clock(space->machine, "slave", MASTER_CLOCK_320/2);
	623	cputag_set_clock(space->machine, "audiocpu", MASTER_CLOCK_320/5);
	624	cputag_set_input_line(space->machine, "maincpu", INPUT_LINE_NMI, PULSE_LINE); // ff said this causes nmi, should we set a timer then nmi?
625	625	break;
626	626	/*"Interrupt Back"*/
627	627	case 0x10:
r4679	r4680
667	667	/*System Manager(SMPC) irq*/
668	668	{
669	669	//if(LOG_SMPC) logerror ("Interrupt: System Manager (SMPC) at scanline %04x, Vector 0x47 Level 0x08\n",scanline);
670		cpu_set_input_line_and_vector(space->machine->cpu[0], 8, (stv_irq.smpc) ? HOLD_LINE : CLEAR_LINE, 0x47);
	670	cputag_set_input_line_and_vector(space->machine, "maincpu", 8, (stv_irq.smpc) ? HOLD_LINE : CLEAR_LINE, 0x47);
671	671	}
672	672	break;
673	673	/* RTC write*/
r4679	r4680
691	691	if(LOG_SMPC) logerror ("SMPC: NMI request\n");
692	692	smpc_ram[0x5f]=0x18;
693	693	/*NMI is unconditionally requested?*/
694		cpu_set_input_line(space->machine->cpu[0], INPUT_LINE_NMI, PULSE_LINE);
	694	cputag_set_input_line(space->machine, "maincpu", INPUT_LINE_NMI, PULSE_LINE);
695	695	break;
696	696	case 0x19:
697	697	if(LOG_SMPC) logerror ("SMPC: NMI Enable\n");
r4679	r4680
1172	1172	/*Sound IRQ*/
1173	1173	if(/*(!(stv_scu[40] & 0x40)) &&*/ scsp_to_main_irq == 1)
1174	1174	{
1175		//cpu_set_input_line_and_vector(space->machine->cpu[0], 9, HOLD_LINE , 0x46);
	1175	//cputag_set_input_line_and_vector(space->machine, "maincpu", 9, HOLD_LINE , 0x46);
1176	1176	logerror("SCSP: Main CPU interrupt\n");
1177	1177	#if 0
1178	1178	if((scu_dst_0 & 0x7ffffff) != 0x05a00000)
1179	1179	{
1180	1180	if(!(stv_scu[40] & 0x1000))
1181	1181	{
1182		cpu_set_input_line_and_vector(space->machine->cpu[0], 3, HOLD_LINE, 0x4c);
	1182	cputag_set_input_line_and_vector(space->machine, "maincpu", 3, HOLD_LINE, 0x4c);
1183	1183	logerror("SCU: Illegal DMA interrupt\n");
1184	1184	}
1185	1185	}
r4679	r4680
1233	1233	/*Sound IRQ*/
1234	1234	if(/*(!(stv_scu[40] & 0x40)) &&*/ scsp_to_main_irq == 1)
1235	1235	{
1236		//cpu_set_input_line_and_vector(space->machine->cpu[0], 9, HOLD_LINE , 0x46);
	1236	//cputag_set_input_line_and_vector(space->machine, "maincpu", 9, HOLD_LINE , 0x46);
1237	1237	logerror("SCSP: Main CPU interrupt\n");
1238	1238	}
1239	1239	}
r4679	r4680
1283	1283	/*Sound IRQ*/
1284	1284	if(/*(!(stv_scu[40] & 0x40)) &&*/ scsp_to_main_irq == 1)
1285	1285	{
1286		//cpu_set_input_line_and_vector(space->machine->cpu[0], 9, HOLD_LINE , 0x46);
	1286	//cputag_set_input_line_and_vector(space->machine, "maincpu", 9, HOLD_LINE , 0x46);
1287	1287	logerror("SCSP: Main CPU interrupt\n");
1288	1288	}
1289	1289	}
r4679	r4680
1400	1400	/*Lv 0 DMA end irq*/
1401	1401	static TIMER_CALLBACK( dma_lv0_ended )
1402	1402	{
1403		cpu_set_input_line_and_vector(machine->cpu[0], 5, (stv_irq.dma_end[0]) ? HOLD_LINE : CLEAR_LINE, 0x4b);
	1403	cputag_set_input_line_and_vector(machine, "maincpu", 5, (stv_irq.dma_end[0]) ? HOLD_LINE : CLEAR_LINE, 0x4b);
1404	1404
1405	1405	D0MV_0;
1406	1406	}
r4679	r4680
1408	1408	/*Lv 1 DMA end irq*/
1409	1409	static TIMER_CALLBACK( dma_lv1_ended )
1410	1410	{
1411		cpu_set_input_line_and_vector(machine->cpu[0], 6, (stv_irq.dma_end[1]) ? HOLD_LINE : CLEAR_LINE, 0x4a);
	1411	cputag_set_input_line_and_vector(machine, "maincpu", 6, (stv_irq.dma_end[1]) ? HOLD_LINE : CLEAR_LINE, 0x4a);
1412	1412
1413	1413	D1MV_0;
1414	1414	}
r4679	r4680
1416	1416	/*Lv 2 DMA end irq*/
1417	1417	static TIMER_CALLBACK( dma_lv2_ended )
1418	1418	{
1419		cpu_set_input_line_and_vector(machine->cpu[0], 6, (stv_irq.dma_end[2]) ? HOLD_LINE : CLEAR_LINE, 0x49);
	1419	cputag_set_input_line_and_vector(machine, "maincpu", 6, (stv_irq.dma_end[2]) ? HOLD_LINE : CLEAR_LINE, 0x49);
1420	1420
1421	1421	D2MV_0;
1422	1422	}
r4679	r4680
1960	1960	logerror("cpu %s (PC=%08X) MINIT write = %08x\n", space->cpu->tag, cpu_get_pc(space->cpu),data);
1961	1961	cpuexec_boost_interleave(space->machine, minit_boost_timeslice, ATTOTIME_IN_USEC(minit_boost));
1962	1962	cpuexec_trigger(space->machine, 1000);
1963		sh2_set_frt_input(space->machine->cpu[1], PULSE_LINE);
	1963	sh2_set_frt_input(cputag_get_cpu(space->machine, "slave"), PULSE_LINE);
1964	1964	}
1965	1965
1966	1966	static WRITE32_HANDLER( sinit_w )
1967	1967	{
1968	1968	logerror("cpu %s (PC=%08X) SINIT write = %08x\n", space->cpu->tag, cpu_get_pc(space->cpu),data);
1969	1969	cpuexec_boost_interleave(space->machine, sinit_boost_timeslice, ATTOTIME_IN_USEC(sinit_boost));
1970		sh2_set_frt_input(space->machine->cpu[0], PULSE_LINE);
	1970	sh2_set_frt_input(cputag_get_cpu(space->machine, "maincpu"), PULSE_LINE);
1971	1971	}
1972	1972
1973	1973
r4679	r4680
2309	2309	minit_boost_timeslice = attotime_zero;
2310	2310	sinit_boost_timeslice = attotime_zero;
2311	2311
2312		smpc_ram = auto_malloc (0x80);
2313		stv_scu = auto_malloc (0x100);
2314		scsp_regs = auto_malloc (0x1000);
	2312	smpc_ram = auto_alloc_array(machine, UINT8, 0x80);
	2313	stv_scu = auto_alloc_array(machine, UINT32, 0x100/4);
	2314	scsp_regs = auto_alloc_array(machine, UINT16, 0x1000/2);
2315	2315
2316	2316	install_stvbios_speedups(machine);
2317	2317
2318	2318	// do strict overwrite verification - maruchan and rsgun crash after coinup without this.
2319	2319	// cottonbm needs strict PCREL
2320	2320	// todo: test what games need this and don't turn it on for them...
2321		sh2drc_set_options(machine->cpu[0], SH2DRC_STRICT_VERIFY|SH2DRC_STRICT_PCREL);
2322		sh2drc_set_options(machine->cpu[1], SH2DRC_STRICT_VERIFY|SH2DRC_STRICT_PCREL);
	2321	sh2drc_set_options(cputag_get_cpu(machine, "maincpu"), SH2DRC_STRICT_VERIFY|SH2DRC_STRICT_PCREL);
	2322	sh2drc_set_options(cputag_get_cpu(machine, "slave"), SH2DRC_STRICT_VERIFY|SH2DRC_STRICT_PCREL);
2323	2323
2324	2324	/* debug .. watch the command buffer rsgun, cottonbm etc. appear to use to communicate between cpus */
2325		memory_install_write32_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x60ffc44, 0x60ffc47, 0, 0, w60ffc44_write );
2326		memory_install_write32_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x60ffc48, 0x60ffc4b, 0, 0, w60ffc48_write );
2327		memory_install_write32_handler(cpu_get_address_space(machine->cpu[1], ADDRESS_SPACE_PROGRAM), 0x60ffc44, 0x60ffc47, 0, 0, w60ffc44_write );
2328		memory_install_write32_handler(cpu_get_address_space(machine->cpu[1], ADDRESS_SPACE_PROGRAM), 0x60ffc48, 0x60ffc4b, 0, 0, w60ffc48_write );
	2325	memory_install_write32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x60ffc44, 0x60ffc47, 0, 0, w60ffc44_write );
	2326	memory_install_write32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x60ffc48, 0x60ffc4b, 0, 0, w60ffc48_write );
	2327	memory_install_write32_handler(cputag_get_address_space(machine, "slave", ADDRESS_SPACE_PROGRAM), 0x60ffc44, 0x60ffc47, 0, 0, w60ffc44_write );
	2328	memory_install_write32_handler(cputag_get_address_space(machine, "slave", ADDRESS_SPACE_PROGRAM), 0x60ffc48, 0x60ffc4b, 0, 0, w60ffc48_write );
2329	2329
2330	2330	smpc_ram[0x23] = DectoBCD(systime.local_time.year /100);
2331	2331	smpc_ram[0x25] = DectoBCD(systime.local_time.year %100);
r4679	r4680
2471	2471	if (irq > 0)
2472	2472	{
2473	2473	scsp_last_line = irq;
2474		cpu_set_input_line(device->machine->cpu[2], irq, ASSERT_LINE);
	2474	cputag_set_input_line(device->machine, "audiocpu", irq, ASSERT_LINE);
2475	2475	}
2476	2476	else if (irq < 0)
2477	2477	{
2478		cpu_set_input_line(device->machine->cpu[2], -irq, CLEAR_LINE);
	2478	cputag_set_input_line(device->machine, "audiocpu", -irq, CLEAR_LINE);
2479	2479	}
2480	2480	else
2481	2481	{
2482		cpu_set_input_line(device->machine->cpu[2], scsp_last_line, CLEAR_LINE);
	2482	cputag_set_input_line(device->machine, "audiocpu", scsp_last_line, CLEAR_LINE);
2483	2483	}
2484	2484	}
2485	2485
r4679	r4680
2549	2549	timer_0 = 0; \
2550	2550	{ \
2551	2551	/*if(LOG_IRQ) logerror ("Interrupt: VBlank-OUT Vector 0x41 Level 0x0e\n");*/ \
2552		cpu_set_input_line_and_vector(machine->cpu[0], 0xe, (stv_irq.vblank_out) ? HOLD_LINE : CLEAR_LINE , 0x41); \
	2552	cputag_set_input_line_and_vector(machine, "maincpu", 0xe, (stv_irq.vblank_out) ? HOLD_LINE : CLEAR_LINE , 0x41); \
2553	2553	} \
2554	2554
2555	2555	#define VBLANK_IN_IRQ \
2556	2556	{ \
2557	2557	/*if(LOG_IRQ) logerror ("Interrupt: VBlank IN Vector 0x40 Level 0x0f\n");*/ \
2558		cpu_set_input_line_and_vector(device->machine->cpu[0], 0xf, (stv_irq.vblank_in) ? HOLD_LINE : CLEAR_LINE , 0x40); \
	2558	cputag_set_input_line_and_vector(device->machine, "maincpu", 0xf, (stv_irq.vblank_in) ? HOLD_LINE : CLEAR_LINE , 0x40); \
2559	2559	} \
2560	2560
2561	2561	#define HBLANK_IN_IRQ \
2562	2562	timer_1 = stv_scu[37] & 0x1ff; \
2563	2563	{ \
2564	2564	/*if(LOG_IRQ) logerror ("Interrupt: HBlank-In at scanline %04x, Vector 0x42 Level 0x0d\n",scanline);*/ \
2565		cpu_set_input_line_and_vector(machine->cpu[0], 0xd, (stv_irq.hblank_in) ? HOLD_LINE : CLEAR_LINE, 0x42); \
	2565	cputag_set_input_line_and_vector(machine, "maincpu", 0xd, (stv_irq.hblank_in) ? HOLD_LINE : CLEAR_LINE, 0x42); \
2566	2566	} \
2567	2567
2568	2568	#define TIMER_0_IRQ \
2569	2569	if(timer_0 == (stv_scu[36] & 0x3ff)) \
2570	2570	{ \
2571	2571	/*if(LOG_IRQ) logerror ("Interrupt: Timer 0 at scanline %04x, Vector 0x43 Level 0x0c\n",scanline);*/ \
2572		cpu_set_input_line_and_vector(machine->cpu[0], 0xc, (stv_irq.timer_0) ? HOLD_LINE : CLEAR_LINE, 0x43 ); \
	2572	cputag_set_input_line_and_vector(machine, "maincpu", 0xc, (stv_irq.timer_0) ? HOLD_LINE : CLEAR_LINE, 0x43 ); \
2573	2573	} \
2574	2574
2575	2575	#define TIMER_1_IRQ   \
r4679	r4680
2578	2578	if(!(stv_scu[38] & 0x80)) \
2579	2579	{ \
2580	2580	/*if(LOG_IRQ) logerror ("Interrupt: Timer 1 at point %04x, Vector 0x44 Level 0x0b\n",point);*/ \
2581		cpu_set_input_line_and_vector(machine->cpu[0], 0xb, (stv_irq.timer_1) ? HOLD_LINE : CLEAR_LINE, 0x44 ); \
	2581	cputag_set_input_line_and_vector(machine, "maincpu", 0xb, (stv_irq.timer_1) ? HOLD_LINE : CLEAR_LINE, 0x44 ); \
2582	2582	} \
2583	2583	else \
2584	2584	{ \
2585	2585	if((timer_0) == (stv_scu[36] & 0x3ff)) \
2586	2586	{ \
2587	2587	/*if(LOG_IRQ) logerror ("Interrupt: Timer 1 at point %04x, Vector 0x44 Level 0x0b\n",point);*/ \
2588		cpu_set_input_line_and_vector(machine->cpu[0], 0xb, (stv_irq.timer_1) ? HOLD_LINE : CLEAR_LINE, 0x44 ); \
	2588	cputag_set_input_line_and_vector(machine, "maincpu", 0xb, (stv_irq.timer_1) ? HOLD_LINE : CLEAR_LINE, 0x44 ); \
2589	2589	} \
2590	2590	} \
2591	2591	} \
2592	2592
2593	2593	#define VDP1_IRQ \
2594	2594	{ \
2595		cpu_set_input_line_and_vector(machine->cpu[0], 2, (stv_irq.vdp1_end) ? HOLD_LINE : CLEAR_LINE, 0x4d); \
	2595	cputag_set_input_line_and_vector(machine, "maincpu", 2, (stv_irq.vdp1_end) ? HOLD_LINE : CLEAR_LINE, 0x4d); \
2596	2596	} \
2597	2597
2598	2598	static TIMER_CALLBACK( hblank_in_irq )
r4679	r4680
2668	2668	static MACHINE_RESET( stv )
2669	2669	{
2670	2670	// don't let the slave cpu and the 68k go anywhere
2671		cpu_set_input_line(machine->cpu[1], INPUT_LINE_RESET, ASSERT_LINE);
	2671	cputag_set_input_line(machine, "slave", INPUT_LINE_RESET, ASSERT_LINE);
2672	2672	stv_enable_slave_sh2 = 0;
2673		cpu_set_input_line(machine->cpu[2], INPUT_LINE_RESET, ASSERT_LINE);
	2673	cputag_set_input_line(machine, "audiocpu", INPUT_LINE_RESET, ASSERT_LINE);
2674	2674
2675	2675	timer_0 = 0;
2676	2676	timer_1 = 0;
r4679	r4680
2681	2681	port_sel = mux_data = 0;
2682	2682	port_i = -1;
2683	2683
2684		cpu_set_clock(machine->cpu[0], MASTER_CLOCK_320/2);
2685		cpu_set_clock(machine->cpu[1], MASTER_CLOCK_320/2);
2686		cpu_set_clock(machine->cpu[2], MASTER_CLOCK_320/5);
	2684	cputag_set_clock(machine, "maincpu", MASTER_CLOCK_320/2);
	2685	cputag_set_clock(machine, "slave", MASTER_CLOCK_320/2);
	2686	cputag_set_clock(machine, "audiocpu", MASTER_CLOCK_320/5);
2687	2687
2688	2688	stvcd_reset(machine);
2689	2689

src/mame/drivers/megatech.c

r4679	r4680
79	79	*/
80	80	#include "driver.h"
81	81	#include "cpu/z80/z80.h"
	82	#include "sound/sn76496.h"
	83	#include "rendlay.h"
	84
	85	#include "segae.h"
82	86	#include "genesis.h"
83		#include "rendlay.h"
84	87	#include "megadriv.h"
85		#include "segae.h"
86	88
87	89	/* Megatech BIOS specific */
88	90	static UINT32 bios_port_ctrl;
r4679	r4680
273	275	{
274	276	case 0:
275	277	logerror("bank w %02x %02x\n", offset, data);
276		memory_install_readwrite8_handler(space, 0x0000, 0xbfff, 0, 0, SMH_BANK5, SMH_UNMAP);
	278	memory_install_readwrite8_handler(space, 0x0000, 0xbfff, 0, 0, (read8_space_func)SMH_BANK(5), (write8_space_func)SMH_UNMAP);
277	279
278	280	//printf("bank ram??\n");
279	281	break;
r4679	r4680
308	310	{
309	311	/* INIT THE PORTS *********************************************************************************************/
310	312
311		const address_space *io = cpu_get_address_space(machine->cpu[1], ADDRESS_SPACE_IO);
	313	const address_space *io = cputag_get_address_space(machine, "genesis_snd_z80", ADDRESS_SPACE_IO);
312	314	const device_config *sn = devtag_get_device(machine, "sn");
313	315
314	316	memory_install_readwrite8_handler(io, 0x0000, 0xffff, 0, 0, z80_unmapped_port_r, z80_unmapped_port_w);
r4679	r4680
331	333	/* INIT THE MEMMAP / BANKING *********************************************************************************/
332	334
333	335	/* catch any addresses that don't get mapped */
334		memory_install_readwrite8_handler(cpu_get_address_space(machine->cpu[1], ADDRESS_SPACE_PROGRAM), 0x0000, 0xffff, 0, 0, z80_unmapped_r, z80_unmapped_w);
	336	memory_install_readwrite8_handler(cputag_get_address_space(machine, "genesis_snd_z80", ADDRESS_SPACE_PROGRAM), 0x0000, 0xffff, 0, 0, z80_unmapped_r, z80_unmapped_w);
335	337
336	338	/* fixed rom bank area */
337		sms_rom = auto_malloc(0x400000);
338		memory_install_readwrite8_handler(cpu_get_address_space(machine->cpu[1], ADDRESS_SPACE_PROGRAM), 0x0000, 0xbfff, 0, 0, SMH_BANK5, SMH_UNMAP);
	339	sms_rom = auto_alloc_array(machine, UINT8, 0x400000);
	340	memory_install_readwrite8_handler(cputag_get_address_space(machine, "genesis_snd_z80", ADDRESS_SPACE_PROGRAM), 0x0000, 0xbfff, 0, 0, (read8_space_func)SMH_BANK(5), (write8_space_func)SMH_UNMAP);
339	341	memory_set_bankptr(machine,  5, sms_rom );
340	342
341	343	memcpy(sms_rom, memory_region(machine, "maincpu"), 0x400000);
342	344
343	345	/* main ram area */
344		sms_mainram = auto_malloc(0x2000); // 8kb of main ram
345		memory_install_readwrite8_handler(cpu_get_address_space(machine->cpu[1], ADDRESS_SPACE_PROGRAM), 0xc000, 0xdfff, 0, 0, SMH_BANK6, SMH_BANK6);
	346	sms_mainram = auto_alloc_array(machine, UINT8, 0x2000); // 8kb of main ram
	347	memory_install_readwrite8_handler(cputag_get_address_space(machine, "genesis_snd_z80", ADDRESS_SPACE_PROGRAM), 0xc000, 0xdfff, 0, 0, (read8_space_func)SMH_BANK(6), (write8_space_func)SMH_BANK(6));
346	348	memory_set_bankptr(machine,  6, sms_mainram );
347		memory_install_readwrite8_handler(cpu_get_address_space(machine->cpu[1], ADDRESS_SPACE_PROGRAM), 0xe000, 0xffff, 0, 0, SMH_BANK7, SMH_BANK7);
	349	memory_install_readwrite8_handler(cputag_get_address_space(machine, "genesis_snd_z80", ADDRESS_SPACE_PROGRAM), 0xe000, 0xffff, 0, 0, (read8_space_func)SMH_BANK(7), (write8_space_func)SMH_BANK(7));
348	350	memory_set_bankptr(machine,  7, sms_mainram );
349	351	memset(sms_mainram,0x00,0x2000);
350	352
351		memory_install_write8_handler(cpu_get_address_space(machine->cpu[1], ADDRESS_SPACE_PROGRAM), 0xfffc, 0xffff, 0, 0, mt_sms_standard_rom_bank_w);
	353	memory_install_write8_handler(cputag_get_address_space(machine, "genesis_snd_z80", ADDRESS_SPACE_PROGRAM), 0xfffc, 0xffff, 0, 0, mt_sms_standard_rom_bank_w);
352	354
353	355	megatech_set_genz80_as_sms_standard_ports(machine);
354	356	//  smsgg_backupram = NULL;
r4679	r4680
363	365
364	366	printf("game 0 selected\n");
365	367
366		cpu_set_input_line(machine->cpu[0], INPUT_LINE_RESET, ASSERT_LINE);
367		cpu_set_input_line(machine->cpu[1], INPUT_LINE_RESET, ASSERT_LINE);
368		cpu_set_input_line(machine->cpu[0], INPUT_LINE_HALT, ASSERT_LINE);
369		cpu_set_input_line(machine->cpu[1], INPUT_LINE_HALT, ASSERT_LINE);
	368	cputag_set_input_line(machine, "maincpu", INPUT_LINE_RESET, ASSERT_LINE);
	369	cputag_set_input_line(machine, "genesis_snd_z80", INPUT_LINE_RESET, ASSERT_LINE);
	370	cputag_set_input_line(machine, "maincpu", INPUT_LINE_HALT, ASSERT_LINE);
	371	cputag_set_input_line(machine, "genesis_snd_z80", INPUT_LINE_HALT, ASSERT_LINE);
370	372	devtag_reset(machine, "ym");
371	373
372	374	sprintf(tempname, "game%d", gameno);
r4679	r4680
392	394	printf("SMS cart!!, CPU not running\n");
393	395	current_game_is_sms = 1;
394	396	megatech_set_genz80_as_sms_standard_map(machine);
395		cpu_set_input_line(machine->cpu[1], INPUT_LINE_HALT, CLEAR_LINE);
396		cpu_set_input_line(machine->cpu[1], INPUT_LINE_RESET, CLEAR_LINE);
	397	cputag_set_input_line(machine, "genesis_snd_z80", INPUT_LINE_HALT, CLEAR_LINE);
	398	cputag_set_input_line(machine, "genesis_snd_z80", INPUT_LINE_RESET, CLEAR_LINE);
397	399
398	400
399	401	}
r4679	r4680
402	404	printf("Genesis Cart, CPU0 running\n");
403	405	current_game_is_sms = 0;
404	406	megatech_set_megadrive_z80_as_megadrive_z80(machine);
405		cpu_set_input_line(machine->cpu[0], INPUT_LINE_RESET, CLEAR_LINE);
406		cpu_set_input_line(machine->cpu[0], INPUT_LINE_HALT, CLEAR_LINE);
	407	cputag_set_input_line(machine, "maincpu", INPUT_LINE_RESET, CLEAR_LINE);
	408	cputag_set_input_line(machine, "maincpu", INPUT_LINE_HALT, CLEAR_LINE);
407	409	}
408	410	else
409	411	{
r4679	r4680
412	414	}
413	415	else
414	416	{
415		cpu_set_input_line(machine->cpu[0], INPUT_LINE_HALT, ASSERT_LINE);
416		cpu_set_input_line(machine->cpu[1], INPUT_LINE_HALT, ASSERT_LINE);
417		//  cpu_set_input_line(machine->cpu[0], INPUT_LINE_RESET, ASSERT_LINE);
418		//  cpu_set_input_line(machine->cpu[1], INPUT_LINE_RESET, ASSERT_LINE);
	417	cputag_set_input_line(machine, "maincpu", INPUT_LINE_HALT, ASSERT_LINE);
	418	cputag_set_input_line(machine, "genesis_snd_z80", INPUT_LINE_HALT, ASSERT_LINE);
	419	//  cputag_set_input_line(machine, "maincpu", INPUT_LINE_RESET, ASSERT_LINE);
	420	//  cputag_set_input_line(machine, "genesis_snd_z80", INPUT_LINE_RESET, ASSERT_LINE);
419	421
420	422	/* no cart.. */
421	423	memset(memory_region(machine, "mtbios")+0x8000, 0x00, 0x8000);
r4679	r4680
574	576
575	577	static DRIVER_INIT(mtnew)
576	578	{
577		megatech_banked_ram = auto_malloc(0x1000*8);
	579	megatech_banked_ram = auto_alloc_array(machine, UINT8, 0x1000*8);
578	580	DRIVER_INIT_CALL(megadriv);
579	581	DRIVER_INIT_CALL(megatech_bios);
580	582	}
r4679	r4680
1212	1214	MEGATECH_GAME26("game0", "inst0")
1213	1215	ROM_END
1214	1216
	1217	/* Game 43 - Shadow Dancer */
	1218
	1219	#define MEGATECH_GAME43(GAME_REGION, INSTRUCTION_REGION) \
	1220	ROM_REGION16_BE( 0x300000, GAME_REGION, 0 ) \
	1221	ROM_LOAD16_WORD_SWAP( "mpr-13571-s.ic1", 0x000000, 0x080000, CRC(56a29310) SHA1(55836177e4a1e2deb68408976b29d0282cf661a9) ) \
	1222	MEGATECH_INSTRUCTION_REGION( INSTRUCTION_REGION, MEGATECH_GAME_IS_GEN ) \
	1223	ROM_LOAD( "epr-12368-43.ic2", 0x000000, 0x08000, CRC(1116cbc7) SHA1(ba6dd21ceadeedf730b71b67acbd20d9067114f3) ) \
	1224
	1225	ROM_START( mt_shado ) /* Bonanza Bros */
	1226	MEGATECH_BIOS
	1227	MEGATECH_GAME43("game0", "inst0")
	1228	ROM_END
	1229
	1230	/* Game 51 - Streets of Rage */
	1231
	1232	#define MEGATECH_GAME51(GAME_REGION, INSTRUCTION_REGION) \
	1233	ROM_REGION16_BE( 0x300000, GAME_REGION, 0 ) \
	1234	ROM_LOAD16_WORD_SWAP( "mpr-13571-s.ic1", 0x000000, 0x080000, CRC(db4ac746) SHA1(c7cc24e2329f279574513fa32bbf79f72f75aeea) ) \
	1235	MEGATECH_INSTRUCTION_REGION( INSTRUCTION_REGION, MEGATECH_GAME_IS_GEN ) \
	1236	ROM_LOAD( "epr-12368-51.ic2", 0x000000, 0x08000, CRC(49b7d6f4) SHA1(96e69851c92715e7daf35b184cf374147a8d2880) ) \
	1237
	1238	ROM_START( mt_srage ) /* Bonanza Bros */
	1239	MEGATECH_BIOS
	1240	MEGATECH_GAME51("game0", "inst0")
	1241	ROM_END
	1242
1215	1243	/* Compilations of games to show the multi-cart support */
1216	1244
1217	1245	ROM_START( mt_comp1 )
r4679	r4680
1285	1313	/* 40 */ GAME( 1990, mt_mwalk, megatech, megatech, megatech, mtnew, ROT0, "Sega",                  "Michael Jackson's Moonwalker (Mega-Tech)", GAME_NOT_WORKING )
1286	1314	/* 41 */ GAME( 1990, mt_crack, megatech, megatech, megatech, mtnew, ROT0, "Sega",                  "Crack Down (Mega-Tech)", GAME_NOT_WORKING )
1287	1315	/* 42 */ // unknown
1288		/* 43 */ // unknown
	1316	/* 43 */ GAME( 1990, mt_shado, megatech, megatech, megatech, mtnew, ROT0, "Sega",                  "Shadow Dancer (Mega-Tech)", GAME_NOT_WORKING )
1289	1317	/* 44 */ GAME( 1990, mt_arrow, megatech, megatech, megatech, mtnew, ROT0, "Sega",                  "Arrow Flash (Mega-Tech)", GAME_NOT_WORKING )
1290	1318	/* 45 */ // unknown
1291	1319	/* 46 */ // unknown
r4679	r4680
1293	1321	/* 48 */ GAME( 1991, mt_wwar,  megatech, megatech, megatech, mtnew, ROT0, "Sega",                  "Wrestle War (Mega-Tech)", GAME_NOT_WORKING ) /* Copyright 1989, 1991 Sega */
1294	1322	/* 49 */ GAME( 1991, mt_bbros, megatech, megatech, megatech, mtnew, ROT0, "Sega",                  "Bonanza Bros. (Mega-Tech)", GAME_NOT_WORKING )
1295	1323	/* 50 */ // unknown
1296		/* 51 */ // unknown
	1324	/* 51 */ GAME( 1991, mt_srage, megatech, megatech, megatech, mtnew, ROT0, "Sega",                  "Streets of Rage (Mega-Tech)", GAME_NOT_WORKING )
1297	1325	/* 52 */ GAME( 1991, mt_sonic, megatech, megatech, megatech, mtnew, ROT0, "Sega",                  "Sonic The Hedgehog (Mega-Tech, set 1)", GAME_NOT_WORKING )
1298	1326	/*    */ GAME( 1991, mt_sonia, mt_sonic, megatech, megatech, mtnew, ROT0, "Sega",                  "Sonic The Hedgehog (Mega-Tech, set 2)", GAME_NOT_WORKING )
1299	1327	/* 53 */ GAME( 1990, mt_fshrk, megatech, megatech, megatech, mtnew, ROT0, "Toaplan / Sega",        "Fire Shark (Mega-Tech)", GAME_NOT_WORKING )

src/mame/drivers/timelimt.c

r4679	r4680
49	49
50	50	static WRITE8_HANDLER( sound_reset_w )
51	51	{
52		if ( data & 1 )
53		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_RESET, PULSE_LINE );
	52	if (data & 1)
	53	cputag_set_input_line(space->machine, "audiocpu", INPUT_LINE_RESET, PULSE_LINE);
54	54	}
55	55
56	56	/***************************************************************************/
r4679	r4680
361	361
362	362	GAME( 1983, timelimt, 0, timelimt, timelimt, 0, ROT90, "Chuo Co. Ltd", "Time Limit", GAME_IMPERFECT_COLORS )
363	363	GAME( 1984, progress, 0, progress, progress, 0, ROT90, "Chuo Co. Ltd", "Progress", 0 )
364

src/mame/drivers/jackie.c

r4679	r4680
256	256
257	257	static WRITE8_HANDLER( igs_irqack_w )
258	258	{
259		//  cpu_set_input_line(space->machine->cpu[0], 0, CLEAR_LINE);
	259	//  cputag_set_input_line(space->machine, "maincpu", 0, CLEAR_LINE);
260	260	out[2] = data;
261	261	show_out();
262	262	}

src/mame/drivers/warriorb.c

r4679	r4680
249	249
250	250	static ADDRESS_MAP_START( z80_sound_map, ADDRESS_SPACE_PROGRAM, 8 )
251	251	AM_RANGE(0x0000, 0x3fff) AM_ROM
252		AM_RANGE(0x4000, 0x7fff) AM_READWRITE(SMH_BANK10, SMH_ROM)
	252	AM_RANGE(0x4000, 0x7fff) AM_READWRITE(SMH_BANK(10), SMH_ROM)
253	253	AM_RANGE(0xc000, 0xdfff) AM_RAM
254	254	AM_RANGE(0xe000, 0xe003) AM_DEVREADWRITE("ym", ym2610_r, ym2610_w)
255	255	AM_RANGE(0xe200, 0xe200) AM_READWRITE(SMH_NOP, taitosound_slave_port_w)
r4679	r4680
402	402	/* handler called by the YM2610 emulator when the internal timers cause an IRQ */
403	403	static void irqhandler(const device_config *device, int irq)
404	404	{
405		cpu_set_input_line(device->machine->cpu[1],0,irq ? ASSERT_LINE : CLEAR_LINE);
	405	cputag_set_input_line(device->machine, "audiocpu", 0, irq ? ASSERT_LINE : CLEAR_LINE);
406	406	}
407	407
408	408	static const ym2610_interface ym2610_config =

src/mame/drivers/igs_blit.c

r4679	r4680
87	87
88	88	for (i = 0; i < 8; i++)
89	89	{
90		layer[i] = auto_malloc(512 * 256);
	90	layer[i] = auto_alloc_array(machine, UINT8, 512 * 256);
91	91	}
92	92
93	93	chmplst2_pen_hi = 0;
r4679	r4680
503	503	int i,j;
504	504	int rom_size = 0x80000;
505	505	UINT16 *src = (UINT16 *) (memory_region(machine, "maincpu"));
506		UINT16 *result_data = malloc_or_die(rom_size);
	506	UINT16 *result_data = alloc_array_or_die(UINT16, rom_size/2);
507	507
508	508	for (i=0; i<rom_size/2; i++)
509	509	{
r4679	r4680
625	625	int i;
626	626	unsigned rom_size = 0x200000;
627	627	UINT8 *src = (UINT8 *) (memory_region(machine, "gfx1"));
628		UINT8 *result_data = malloc_or_die(rom_size);
	628	UINT8 *result_data = alloc_array_or_die(UINT8, rom_size);
629	629
630	630	for (i=0; i<rom_size; i++)
631	631	result_data[i] = src[BITSWAP24(i, 23,22,21,20, 19, 17,16,15, 13,12, 10,9,8,7,6,5,4, 2,1, 3, 11, 14, 18, 0)];
r4679	r4680
640	640	int i;
641	641	unsigned rom_size = 0x400000;
642	642	UINT8 *src = (UINT8 *) (memory_region(machine, "gfx1"));
643		UINT8 *result_data = malloc_or_die(rom_size);
	643	UINT8 *result_data = alloc_array_or_die(UINT8, rom_size);
644	644
645	645	for (i=0; i<rom_size; i++)
646	646	result_data[i] = src[BITSWAP24(i, 23,22,21,20,19,18,17,16,15, 12, 13, 14, 11,10,9,8,7,6,5,4,3,2,1,0)];
r4679	r4680
2495	2495
2496	2496	static void sound_irq(const device_config *device, int state)
2497	2497	{
2498		//   cpu_set_input_line(machine->cpu[0], 3, state);
	2498	//   cputag_set_input_line(machine, "maincpu", 3, state);
2499	2499	}
2500	2500
2501	2501	static const ics2115_interface vbowl_ics2115_interface = {

src/mame/drivers/goal92.c

r4679	r4680
33	33	if (ACCESSING_BITS_8_15)
34	34	{
35	35	soundlatch_w(space, 0, (data >> 8) & 0xff);
36		cpu_set_input_line(space->machine->cpu[1],0,HOLD_LINE);
	36	cputag_set_input_line(space->machine, "audiocpu", 0, HOLD_LINE);
37	37	}
38	38	}
39	39
r4679	r4680
59	59	return 0;
60	60	}
61	61
62		static ADDRESS_MAP_START( goal92_readmem, ADDRESS_SPACE_PROGRAM, 16 )
63		AM_RANGE(0x000000, 0x0fffff) AM_READ(SMH_ROM)
64		AM_RANGE(0x100000, 0x13ffff) AM_READ(SMH_RAM)
65		AM_RANGE(0x180000, 0x18000f) AM_READ(goal92_inputs_r)
66		AM_RANGE(0x18001c, 0x18001d) AM_READ(goal92_fg_bank_r)
67		ADDRESS_MAP_END
68
69		static ADDRESS_MAP_START( goal92_writemem, ADDRESS_SPACE_PROGRAM, 16 )
70		AM_RANGE(0x000000, 0x0fffff) AM_WRITE(SMH_ROM)
71		AM_RANGE(0x100000, 0x1007ff) AM_WRITE(SMH_RAM)
72		AM_RANGE(0x100800, 0x100fff) AM_WRITE(goal92_background_w) AM_BASE(&goal92_back_data)
73		AM_RANGE(0x101000, 0x1017ff) AM_WRITE(goal92_foreground_w) AM_BASE(&goal92_fore_data)
74		AM_RANGE(0x101800, 0x101fff) AM_WRITE(SMH_RAM) // it has tiles for clouds, but they aren't used
75		AM_RANGE(0x102000, 0x102fff) AM_WRITE(goal92_text_w) AM_BASE(&goal92_textram)
76		AM_RANGE(0x103000, 0x103fff) AM_WRITE(paletteram16_xBBBBBGGGGGRRRRR_word_w) AM_BASE(&paletteram16)
77		AM_RANGE(0x104000, 0x13ffff) AM_WRITE(SMH_RAM)
	62	static ADDRESS_MAP_START( goal92_map, ADDRESS_SPACE_PROGRAM, 16 )
	63	AM_RANGE(0x000000, 0x0fffff) AM_ROM
	64	AM_RANGE(0x100000, 0x1007ff) AM_RAM
	65	AM_RANGE(0x100800, 0x100fff) AM_RAM_WRITE(goal92_background_w) AM_BASE(&goal92_back_data)
	66	AM_RANGE(0x101000, 0x1017ff) AM_RAM_WRITE(goal92_foreground_w) AM_BASE(&goal92_fore_data)
	67	AM_RANGE(0x101800, 0x101fff) AM_RAM // it has tiles for clouds, but they aren't used
	68	AM_RANGE(0x102000, 0x102fff) AM_RAM_WRITE(goal92_text_w) AM_BASE(&goal92_textram)
	69	AM_RANGE(0x103000, 0x103fff) AM_RAM_WRITE(paletteram16_xBBBBBGGGGGRRRRR_word_w) AM_BASE(&paletteram16)
	70	AM_RANGE(0x104000, 0x13ffff) AM_RAM
78	71	AM_RANGE(0x140000, 0x1407ff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)
79	72	AM_RANGE(0x140800, 0x140801) AM_WRITENOP
80	73	AM_RANGE(0x140802, 0x140803) AM_WRITENOP
	74	AM_RANGE(0x180000, 0x18000f) AM_READ(goal92_inputs_r)
81	75	AM_RANGE(0x180008, 0x180009) AM_WRITE(goal92_sound_command_w)
82	76	AM_RANGE(0x18000a, 0x18000b) AM_WRITENOP
83	77	AM_RANGE(0x180010, 0x180017) AM_WRITE(SMH_RAM) AM_BASE(&goal92_scrollram16)
84		AM_RANGE(0x18001c, 0x18001d) AM_WRITE(goal92_fg_bank_w)
	78	AM_RANGE(0x18001c, 0x18001d) AM_READWRITE(goal92_fg_bank_r, goal92_fg_bank_w)
85	79	ADDRESS_MAP_END
86	80
87	81	/* Sound CPU */
r4679	r4680
234	228	/* handler called by the 2203 emulator when the internal timers cause an IRQ */
235	229	static void irqhandler(const device_config *device, int irq)
236	230	{
237		cpu_set_input_line(device->machine->cpu[1], INPUT_LINE_NMI, irq ? ASSERT_LINE : CLEAR_LINE);
	231	cputag_set_input_line(device->machine, "audiocpu", INPUT_LINE_NMI, irq ? ASSERT_LINE : CLEAR_LINE);
238	232	}
239	233
240	234	static const ym2203_interface ym2203_config =
r4679	r4680
256	250
257	251	toggle ^= 1;
258	252	if(toggle)
259		cpu_set_input_line(device->machine->cpu[1], INPUT_LINE_NMI, PULSE_LINE);
	253	cputag_set_input_line(device->machine, "audiocpu", INPUT_LINE_NMI, PULSE_LINE);
260	254	}
261	255
262	256	static const msm5205_interface msm5205_config =
r4679	r4680
315	309
316	310	/* basic machine hardware */
317	311	MDRV_CPU_ADD("maincpu", M68000,12000000)
318		MDRV_CPU_PROGRAM_MAP(goal92_readmem,goal92_writemem)
	312	MDRV_CPU_PROGRAM_MAP(goal92_map,0)
319	313	MDRV_CPU_VBLANK_INT("screen", irq6_line_hold) /* VBL */
320	314
321	315	MDRV_CPU_ADD("audiocpu", Z80, 2500000)

src/mame/drivers/bishi.c

r4679	r4680
278	278	PORT_BIT( 0x8000, IP_ACTIVE_LOW, IPT_START2 )
279	279	INPUT_PORTS_END
280	280
	281
	282	/* The game will respond to the 'player 2' inputs from the normal
	283	input define if mapped, however, the game will function in an abnormal way
	284	as the game code isn't designed to handle it.  The 'player 3' inputs from
	285	the above input define are the actual ones used for player 2 on this */
	286	static INPUT_PORTS_START( bishi2p )
	287	/* Currently, this "IN0" is not read */
	288	PORT_START("IN0")
	289	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN )
	290	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_COIN2 )
	291	PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_COIN3 )
	292	PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_COIN4 )
	293	PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN )
	294	PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_SERVICE2 )
	295	PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_SERVICE3 )
	296	PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_SERVICE4 )
	297
	298	PORT_START("DSW")
	299	PORT_DIPNAME( 0x0007, 0x0004, DEF_STR( Difficulty ) )
	300	PORT_DIPSETTING(      0x0007, DEF_STR( Easiest ) )
	301	PORT_DIPSETTING(      0x0006, DEF_STR( Very_Easy) )
	302	PORT_DIPSETTING(      0x0005, DEF_STR( Easy ) )
	303	PORT_DIPSETTING(      0x0004, DEF_STR( Medium ) )
	304	PORT_DIPSETTING(      0x0003, "Medium Hard" )
	305	PORT_DIPSETTING(      0x0002, DEF_STR( Hard ) )
	306	PORT_DIPSETTING(      0x0001, DEF_STR( Very_Hard ) )
	307	PORT_DIPSETTING(      0x0000, DEF_STR( Hardest ) )
	308	PORT_DIPNAME( 0x0038, 0x0028, DEF_STR( Lives ) )
	309	PORT_DIPSETTING(      0x0038, "1" )
	310	PORT_DIPSETTING(      0x0030, "2" )
	311	PORT_DIPSETTING(      0x0028, "3" )
	312	PORT_DIPSETTING(      0x0020, "4" )
	313	PORT_DIPSETTING(      0x0018, "5" )
	314	PORT_DIPSETTING(      0x0010, "6" )
	315	PORT_DIPSETTING(      0x0008, "7" )
	316	PORT_DIPSETTING(      0x0000, "8" )
	317	PORT_DIPNAME( 0x00c0, 0x00c0, DEF_STR( Demo_Sounds ) )
	318	PORT_DIPSETTING(      0x00c0, "All The Time" )
	319	PORT_DIPSETTING(      0x0080, "Loop At 2 Times" )
	320	PORT_DIPSETTING(      0x0040, "Loop At 4 Times" )
	321	PORT_DIPSETTING(      0x0000, "No Sounds" )
	322	PORT_DIPNAME( 0x0f00, 0x0f00, DEF_STR( Coinage ) )
	323	PORT_DIPSETTING(      0x0200, DEF_STR( 4C_1C ) )
	324	PORT_DIPSETTING(      0x0500, DEF_STR( 3C_1C ) )
	325	PORT_DIPSETTING(      0x0800, DEF_STR( 2C_1C ) )
	326	PORT_DIPSETTING(      0x0400, DEF_STR( 3C_2C ) )
	327	PORT_DIPSETTING(      0x0100, DEF_STR( 4C_3C ) )
	328	PORT_DIPSETTING(      0x0f00, DEF_STR( 1C_1C ) )
	329	PORT_DIPSETTING(      0x0000, DEF_STR( 4C_5C ) )
	330	PORT_DIPSETTING(      0x0300, DEF_STR( 3C_4C ) )
	331	PORT_DIPSETTING(      0x0700, DEF_STR( 2C_3C ) )
	332	PORT_DIPSETTING(      0x0e00, DEF_STR( 1C_2C ) )
	333	PORT_DIPSETTING(      0x0600, DEF_STR( 2C_5C ) )
	334	PORT_DIPSETTING(      0x0d00, DEF_STR( 1C_3C ) )
	335	PORT_DIPSETTING(      0x0c00, DEF_STR( 1C_4C ) )
	336	PORT_DIPSETTING(      0x0b00, DEF_STR( 1C_5C ) )
	337	PORT_DIPSETTING(      0x0a00, DEF_STR( 1C_6C ) )
	338	PORT_DIPSETTING(      0x0900, DEF_STR( 1C_7C ) )
	339	PORT_DIPNAME( 0x1000, 0x1000, DEF_STR( Free_Play ))
	340	PORT_DIPSETTING(      0x1000, DEF_STR(No))
	341	PORT_DIPSETTING(      0x0000, DEF_STR(Yes))
	342	PORT_DIPNAME( 0x2000, 0x2000, "Slack Difficulty")
	343	PORT_DIPSETTING(      0x2000, DEF_STR(Off))
	344	PORT_DIPSETTING(      0x0000, DEF_STR(On))
	345	PORT_DIPNAME( 0x4000, 0x0000, "Title Demo")
	346	PORT_DIPSETTING(      0x4000, "At 1 Loop")
	347	PORT_DIPSETTING(      0x0000, "At Every Gamedemo")
	348	PORT_DIPNAME( 0x8000, 0x0000, "Gamedemo")
	349	PORT_DIPSETTING(      0x8000, "4 Kinds")
	350	PORT_DIPSETTING(      0x0000, "7 Kinds")
	351
	352	PORT_START("SYSTEM")
	353	PORT_BIT( 0x00ff, IP_ACTIVE_LOW, IPT_UNUSED )
	354	PORT_BIT( 0x0100, IP_ACTIVE_LOW, IPT_UNKNOWN )
	355	PORT_BIT( 0x0200, IP_ACTIVE_LOW, IPT_UNKNOWN )
	356	PORT_BIT( 0x0400, IP_ACTIVE_LOW, IPT_UNKNOWN )
	357	PORT_BIT( 0x0800, IP_ACTIVE_LOW, IPT_COIN1 )
	358	PORT_BIT( 0x1000, IP_ACTIVE_LOW, IPT_UNKNOWN )
	359	PORT_BIT( 0x2000, IP_ACTIVE_LOW, IPT_UNKNOWN )
	360	PORT_BIT( 0x4000, IP_ACTIVE_LOW, IPT_UNKNOWN )
	361	PORT_BIT( 0x8000, IP_ACTIVE_LOW, IPT_UNKNOWN )
	362
	363	PORT_START("INPUTS")
	364	PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(2)
	365	PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(2)
	366	PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_PLAYER(2)
	367	PORT_BIT( 0x0008, IP_ACTIVE_LOW, IPT_START2 )
	368	PORT_BIT( 0x0010, IP_ACTIVE_LOW, IPT_UNKNOWN )
	369	PORT_BIT( 0x0020, IP_ACTIVE_LOW, IPT_UNKNOWN )
	370	PORT_SERVICE_NO_TOGGLE(0x0040, IP_ACTIVE_LOW)
	371	PORT_BIT( 0x0080, IP_ACTIVE_LOW, IPT_SERVICE1 )
	372	PORT_BIT( 0x0100, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(1)
	373	PORT_BIT( 0x0200, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(1)
	374	PORT_BIT( 0x0400, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_PLAYER(1)
	375	PORT_BIT( 0x0800, IP_ACTIVE_LOW, IPT_START1 )
	376	PORT_BIT( 0x1000, IP_ACTIVE_LOW, IPT_UNUSED ) // 'p2' A
	377	PORT_BIT( 0x2000, IP_ACTIVE_LOW, IPT_UNUSED ) // 'p2' B
	378	PORT_BIT( 0x4000, IP_ACTIVE_LOW, IPT_UNUSED ) // 'p2' C
	379	PORT_BIT( 0x8000, IP_ACTIVE_LOW, IPT_UNUSED ) // 'p2' START
	380	INPUT_PORTS_END
	381
	382
281	383	static MACHINE_RESET( bishi )
282	384	{
283	385	}
r4679	r4680
285	387	static void sound_irq_gen(const device_config *device, int state)
286	388	{
287	389	if (state)
288		cpu_set_input_line(device->machine->cpu[0], M68K_IRQ_1, ASSERT_LINE);
	390	cputag_set_input_line(device->machine, "maincpu", M68K_IRQ_1, ASSERT_LINE);
289	391	else
290		cpu_set_input_line(device->machine->cpu[0], M68K_IRQ_1, CLEAR_LINE);
	392	cputag_set_input_line(device->machine, "maincpu", M68K_IRQ_1, CLEAR_LINE);
291	393	}
292	394
293	395	static const ymz280b_interface ymz280b_intf =
r4679	r4680
396	498	ROM_END
397	499
398	500
399		GAME( 1996, bishi,    0,      bishi, bishi, 0, ROT0, "Konami", "Bishi Bashi Championship Mini Game Senshuken (ver JAA)", GAME_IMPERFECT_GRAPHICS)
400		GAME( 1998, sbishi,   0,      bishi, bishi, 0, ROT0, "Konami", "Super Bishi Bashi Championship (ver JAA)", GAME_IMPERFECT_GRAPHICS)
401		GAME( 1998, sbishik,  sbishi, bishi, bishi, 0, ROT0, "Konami", "Super Bishi Bashi Championship (ver KAA)", GAME_IMPERFECT_GRAPHICS)
	501	GAME( 1996, bishi,    0,      bishi, bishi, 0, ROT0, "Konami", "Bishi Bashi Championship Mini Game Senshuken (ver JAA, 3 Players)", GAME_IMPERFECT_GRAPHICS)
	502	GAME( 1998, sbishi,   0,      bishi, bishi2p, 0, ROT0, "Konami", "Super Bishi Bashi Championship (ver JAA, 2 Players)", GAME_IMPERFECT_GRAPHICS)
	503	GAME( 1998, sbishik,  sbishi, bishi, bishi, 0, ROT0, "Konami", "Super Bishi Bashi Championship (ver KAA, 3 Players)", GAME_IMPERFECT_GRAPHICS)

src/mame/drivers/vamphalf.c

r4679	r4680
1627	1627	cpu_eat_cycles(space->cpu, 50);
1628	1628	}
1629	1629
1630		return wram[(0x00906fc/2)+offset];
	1630	return wram[(0x00906fc / 2)+offset];
1631	1631	}
1632	1632
1633	1633	static DRIVER_INIT( vamphalf )
1634	1634	{
1635		memory_install_read16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x0004a840, 0x0004a843, 0, 0, vamphalf_speedup_r );
	1635	memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x0004a840, 0x0004a843, 0, 0, vamphalf_speedup_r );
1636	1636
1637	1637	palshift = 0;
1638	1638	flip_bit = 0x80;
r4679	r4680
1640	1640
1641	1641	static DRIVER_INIT( vamphafk )
1642	1642	{
1643		memory_install_read16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x0004a6d0, 0x0004a6d3, 0, 0, vamphafk_speedup_r );
	1643	memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x0004a6d0, 0x0004a6d3, 0, 0, vamphafk_speedup_r );
1644	1644
1645	1645	palshift = 0;
1646	1646	flip_bit = 0x80;
r4679	r4680
1648	1648
1649	1649	static DRIVER_INIT( misncrft )
1650	1650	{
1651		memory_install_read16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x00072eb4, 0x00072eb7, 0, 0, misncrft_speedup_r );
	1651	memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x00072eb4, 0x00072eb7, 0, 0, misncrft_speedup_r );
1652	1652
1653	1653	palshift = 0;
1654	1654	flip_bit = 1;
r4679	r4680
1656	1656
1657	1657	static DRIVER_INIT( coolmini )
1658	1658	{
1659		memory_install_read16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x000d2e80, 0x000d2e83, 0, 0, coolmini_speedup_r );
	1659	memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x000d2e80, 0x000d2e83, 0, 0, coolmini_speedup_r );
1660	1660
1661	1661	palshift = 0;
1662	1662	flip_bit = 1;
r4679	r4680
1664	1664
1665	1665	static DRIVER_INIT( suplup )
1666	1666	{
1667		memory_install_read16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x0011605c, 0x0011605f, 0, 0, suplup_speedup_r );
	1667	memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x0011605c, 0x0011605f, 0, 0, suplup_speedup_r );
1668	1668
1669	1669	palshift = 8;
1670	1670	/* no flipscreen */
r4679	r4680
1672	1672
1673	1673	static DRIVER_INIT( luplup )
1674	1674	{
1675		memory_install_read16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x00115e84, 0x00115e87, 0, 0, luplup_speedup_r );
	1675	memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x00115e84, 0x00115e87, 0, 0, luplup_speedup_r );
1676	1676
1677	1677	palshift = 8;
1678	1678	/* no flipscreen */
r4679	r4680
1680	1680
1681	1681	static DRIVER_INIT( luplup29 )
1682	1682	{
1683		memory_install_read16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x00113f08, 0x00113f0b, 0, 0, luplup29_speedup_r );
	1683	memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x00113f08, 0x00113f0b, 0, 0, luplup29_speedup_r );
1684	1684
1685	1685	palshift = 8;
1686	1686	/* no flipscreen */
r4679	r4680
1688	1688
1689	1689	static DRIVER_INIT( puzlbang )
1690	1690	{
1691		memory_install_read16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x00113ecc, 0x00113ecf, 0, 0, puzlbang_speedup_r );
	1691	memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x00113ecc, 0x00113ecf, 0, 0, puzlbang_speedup_r );
1692	1692
1693	1693	palshift = 8;
1694	1694	/* no flipscreen */
r4679	r4680
1696	1696
1697	1697	static DRIVER_INIT( wyvernwg )
1698	1698	{
1699		memory_install_read32_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x00b56fc, 0x00b56ff, 0, 0, wyvernwg_speedup_r );
	1699	memory_install_read32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x00b56fc, 0x00b56ff, 0, 0, wyvernwg_speedup_r );
1700	1700
1701	1701	palshift = 0;
1702	1702	flip_bit = 1;
r4679	r4680
1707	1707
1708	1708	static DRIVER_INIT( finalgdr )
1709	1709	{
1710		finalgdr_backupram = auto_malloc(0x80*0x100);
1711		memory_install_read32_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x005e874, 0x005e877, 0, 0, finalgdr_speedup_r );
	1710	finalgdr_backupram = auto_alloc_array(machine, UINT8, 0x80*0x100);
	1711	memory_install_read32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x005e874, 0x005e877, 0, 0, finalgdr_speedup_r );
1712	1712
1713	1713	palshift = 0;
1714	1714	flip_bit = 1; //?
r4679	r4680
1719	1719
1720	1720	static DRIVER_INIT( dquizgo2 )
1721	1721	{
1722		memory_install_read16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x00cde70, 0x00cde73, 0, 0, dquizgo2_speedup_r );
	1722	memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x00cde70, 0x00cde73, 0, 0, dquizgo2_speedup_r );
1723	1723
1724	1724	palshift = 0;
1725	1725	flip_bit = 1;
r4679	r4680
1727	1727
1728	1728	static DRIVER_INIT( aoh )
1729	1729	{
1730		memory_install_read32_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x028a09c, 0x028a09f, 0, 0, aoh_speedup_r );
	1730	memory_install_read32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x028a09c, 0x028a09f, 0, 0, aoh_speedup_r );
1731	1731
1732	1732	palshift = 0;
1733	1733	/* no flipscreen */
r4679	r4680
1735	1735
1736	1736	static DRIVER_INIT( jmpbreak )
1737	1737	{
1738		memory_install_read16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x00906fc, 0x00906ff, 0, 0, jmpbreak_speedup_r );
1739		memory_install_write16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xe0000000, 0xe0000003, 0, 0, jmpbreak_flipscreen_w );
	1738	memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x00906fc, 0x00906ff, 0, 0, jmpbreak_speedup_r );
	1739	memory_install_write16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xe0000000, 0xe0000003, 0, 0, jmpbreak_flipscreen_w );
1740	1740
1741	1741	palshift = 0;
1742	1742	}

src/mame/drivers/mayumi.c

r4679	r4680
12	12
13	13	#define MCLK 10000000
14	14
	15	extern UINT8 *mayumi_videoram;
	16	WRITE8_HANDLER( mayumi_videoram_w );
15	17	VIDEO_START( mayumi );
16	18	VIDEO_UPDATE( mayumi );
17	19
18		WRITE8_HANDLER( mayumi_videoram_w );
19		READ8_HANDLER( mayumi_videoram_r );
20
21	20	static int int_enable;
22	21	static int input_sel;
23	22
r4679	r4680
42	41
43	42	static MACHINE_RESET( mayumi )
44	43	{
45		const address_space *space = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM);
46		bank_sel_w(space,0,0);
	44	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	45	bank_sel_w(space, 0, 0);
47	46	}
48	47
49	48	static WRITE8_HANDLER( input_sel_w )
r4679	r4680
75	74
76	75	/****************************************************************************/
77	76
78		static ADDRESS_MAP_START( readmem, ADDRESS_SPACE_PROGRAM, 8 )
79		AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM)
80		AM_RANGE(0x8000, 0xbfff) AM_READ(SMH_BANK1)
81		AM_RANGE(0xc000, 0xdfff) AM_READ(SMH_RAM)
82		AM_RANGE(0xe000, 0xf7ff) AM_READ(mayumi_videoram_r)
	77	static ADDRESS_MAP_START( mayumi_map, ADDRESS_SPACE_PROGRAM, 8 )
	78	AM_RANGE(0x0000, 0x7fff) AM_ROM
	79	AM_RANGE(0x8000, 0xbfff) AM_ROMBANK(1)
	80	AM_RANGE(0xc000, 0xdfff) AM_RAM AM_BASE(&generic_nvram) AM_SIZE(&generic_nvram_size)
	81	AM_RANGE(0xe000, 0xf7ff) AM_RAM_WRITE(mayumi_videoram_w) AM_BASE(&mayumi_videoram)
83	82	ADDRESS_MAP_END
84	83
85		static ADDRESS_MAP_START( writemem, ADDRESS_SPACE_PROGRAM, 8 )
86		AM_RANGE(0x0000, 0xbfff) AM_WRITE(SMH_ROM)
87		AM_RANGE(0xc000, 0xdfff) AM_WRITE(SMH_RAM) AM_BASE(&generic_nvram) AM_SIZE(&generic_nvram_size)
88		AM_RANGE(0xe000, 0xf7ff) AM_WRITE(mayumi_videoram_w)
89		ADDRESS_MAP_END
90	84
91
92		static ADDRESS_MAP_START( io_map, ADDRESS_SPACE_IO, 8 )
	85	static ADDRESS_MAP_START( mayumi_io_map, ADDRESS_SPACE_IO, 8 )
93	86	ADDRESS_MAP_GLOBAL_MASK(0xff)
94	87	AM_RANGE(0x30, 0x30) AM_READ_PORT("IN0") AM_WRITE(bank_sel_w)
95	88	AM_RANGE(0xc0, 0xc0) AM_WRITE(input_sel_w)
r4679	r4680
279	272
280	273	/* basic machine hardware */
281	274	MDRV_CPU_ADD("maincpu", Z80, MCLK/2) /* 5.000 MHz ? */
282		MDRV_CPU_PROGRAM_MAP(readmem,writemem)
283		MDRV_CPU_IO_MAP(io_map,0)
	275	MDRV_CPU_PROGRAM_MAP(mayumi_map,0)
	276	MDRV_CPU_IO_MAP(mayumi_io_map,0)
284	277	MDRV_CPU_VBLANK_INT("screen", mayumi_interrupt)
285	278
286	279	MDRV_MACHINE_RESET( mayumi )
r4679	r4680
334	327	ROM_END
335	328
336	329	GAME( 1988, mayumi, 0, mayumi, mayumi, 0, ROT0, "[Sanritsu] Victory L.L.C.",  "Kikiippatsu Mayumi-chan (Japan)", 0 )
337

src/mame/drivers/poolshrk.c

r4679	r4680
92	92
93	93	static READ8_HANDLER( poolshrk_irq_reset_r )
94	94	{
95		cpu_set_input_line(space->machine->cpu[0], 0, CLEAR_LINE);
	95	cputag_set_input_line(space->machine, "maincpu", 0, CLEAR_LINE);
96	96
97	97	return 0;
98	98	}

src/mame/drivers/raiden.c

r4679	r4680
228	228
229	229	static VIDEO_EOF( raiden )
230	230	{
231		const address_space *space = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM);
	231	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
232	232	buffer_spriteram16_w(space,0,0,0xffff); /* Could be a memory location instead */
233	233	}
234	234
r4679	r4680
474	474
475	475	static DRIVER_INIT( raiden )
476	476	{
477		memory_install_read16_handler(cpu_get_address_space(machine->cpu[1], ADDRESS_SPACE_PROGRAM), 0x4008, 0x4009, 0, 0, sub_cpu_spin_r);
	477	memory_install_read16_handler(cputag_get_address_space(machine, "sub", ADDRESS_SPACE_PROGRAM), 0x4008, 0x4009, 0, 0, sub_cpu_spin_r);
478	478	}
479	479
480	480	static void memory_patcha(running_machine *machine)
481	481	{
482		memory_install_read16_handler(cpu_get_address_space(machine->cpu[1], ADDRESS_SPACE_PROGRAM), 0x4008, 0x4009, 0, 0, sub_cpu_spina_r);
	482	memory_install_read16_handler(cputag_get_address_space(machine, "sub", ADDRESS_SPACE_PROGRAM), 0x4008, 0x4009, 0, 0, sub_cpu_spina_r);
483	483	}
484	484
485	485	/* This is based on code by Niclas Karlsson Mate, who figured out the

src/mame/drivers/alg.c

r4679	r4680
198	198
199	199	static WRITE8_DEVICE_HANDLER( alg_cia_0_porta_w )
200	200	{
	201	const address_space *space = cputag_get_address_space(device->machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	202
201	203	/* switch banks as appropriate */
202	204	memory_set_bank(device->machine, 1, data & 1);
203	205
204	206	/* swap the write handlers between ROM and bank 1 based on the bit */
205	207	if ((data & 1) == 0)
206	208	/* overlay disabled, map RAM on 0x000000 */
207		memory_install_write16_handler(cpu_get_address_space(device->machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x000000, 0x07ffff, 0, 0, SMH_BANK1);
	209	memory_install_write16_handler(space, 0x000000, 0x07ffff, 0, 0, (write16_space_func)SMH_BANK(1));
208	210
209	211	else
210	212	/* overlay enabled, map Amiga system ROM on 0x000000 */
211		memory_install_write16_handler(cpu_get_address_space(device->machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x000000, 0x07ffff, 0, 0, SMH_UNMAP);
	213	memory_install_write16_handler(space, 0x000000, 0x07ffff, 0, 0, (write16_space_func)SMH_UNMAP);
212	214	}
213	215
214	216
r4679	r4680
683	685	{
684	686	UINT32 length = memory_region_length(machine, "user2");
685	687	UINT8 *rom = memory_region(machine, "user2");
686		UINT8 *original = malloc_or_die(length);
	688	UINT8 *original = alloc_array_or_die(UINT8, length);
687	689	UINT32 srcaddr;
688	690
689	691	memcpy(original, rom, length);
r4679	r4680
703	705	{
704	706	UINT32 length = memory_region_length(machine, "user2");
705	707	UINT8 *rom = memory_region(machine, "user2");
706		UINT8 *original = malloc_or_die(length);
	708	UINT8 *original = alloc_array_or_die(UINT8, length);
707	709	UINT32 srcaddr;
708	710
709	711	memcpy(original, rom, length);
r4679	r4680
722	724	{
723	725	UINT32 length = memory_region_length(machine, "user2");
724	726	UINT8 *rom = memory_region(machine, "user2");
725		UINT8 *original = malloc_or_die(length);
	727	UINT8 *original = alloc_array_or_die(UINT8, length);
726	728	UINT32 srcaddr;
727	729
728	730	memcpy(original, rom, length);
r4679	r4680
743	745	{
744	746	/* NOT DONE TODO FIGURE OUT THE RIGHT ORDER!!!! */
745	747	UINT8 *rom = memory_region(machine, "user2");
746		char *decrypted = auto_malloc(0x40000);
	748	UINT8 *decrypted = auto_alloc_array(machine, UINT8, 0x40000);
747	749	int i;
748	750
749	751	static const int shuffle[] =

src/mame/drivers/galaxia.c

r4679	r4680
41	41	int height = video_screen_get_height(machine->primary_screen);
42	42
43	43	/* configure the S2636 chips */
44		s2636_0 = s2636_config(galaxia_s2636_0_ram, height, width,  3, -27);
45		s2636_1 = s2636_config(galaxia_s2636_1_ram, height, width,  3, -27);
46		s2636_2 = s2636_config(galaxia_s2636_2_ram, height, width,  3, -27);
	44	s2636_0 = s2636_config(machine, galaxia_s2636_0_ram, height, width,  3, -27);
	45	s2636_1 = s2636_config(machine, galaxia_s2636_1_ram, height, width,  3, -27);
	46	s2636_2 = s2636_config(machine, galaxia_s2636_2_ram, height, width,  3, -27);
47	47	}
48	48
49	49	static VIDEO_UPDATE( galaxia )
r4679	r4680
318	318
319	319	static DRIVER_INIT(galaxia)
320	320	{
321		galaxia_color=auto_malloc(0x400);
	321	galaxia_color=auto_alloc_array(machine, UINT8, 0x400);
322	322	}
323	323
324	324	GAME( 1979, galaxia, 0, galaxia, galaxia, galaxia, ROT90, "Zaccaria", "Galaxia", GAME_NOT_WORKING|GAME_NO_SOUND )

src/mame/drivers/vegaeo.c

r4679	r4680
130	130
131	131	static VIDEO_START( vega )
132	132	{
133		vega_vram = auto_malloc(0x14000*2);
	133	vega_vram = auto_alloc_array(machine, UINT32, 0x14000*2/4);
134	134	}
135	135
136	136	static VIDEO_UPDATE( vega )

src/mame/drivers/fromanc2.c

r4679	r4680
97	97	soundlatch_w(space, offset, (data >> 8) & 0xff);   // 1P (LEFT)
98	98	soundlatch2_w(space, offset, data & 0xff);         // 2P (RIGHT)
99	99
100		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_NMI, PULSE_LINE);
	100	cputag_set_input_line(space->machine, "audiocpu", INPUT_LINE_NMI, PULSE_LINE);
101	101	fromanc2_sndcpu_nmi_flag = 0;
102	102	}
103	103
r4679	r4680
194	194	{
195	195	fromanc2_datalatch1 = data;
196	196
197		cpu_set_input_line(space->machine->cpu[2], 0, HOLD_LINE);
	197	cputag_set_input_line(space->machine, "sub", 0, HOLD_LINE);
198	198	fromanc2_subcpu_int_flag = 0;
199	199	}
200	200
201	201	static READ16_HANDLER( fromanc2_subcpu_r )
202	202	{
203		cpu_set_input_line(space->machine->cpu[2], INPUT_LINE_NMI, PULSE_LINE);
	203	cputag_set_input_line(space->machine, "sub", INPUT_LINE_NMI, PULSE_LINE);
204	204	fromanc2_subcpu_nmi_flag = 0;
205	205
206	206	return (fromanc2_datalatch_2h << 8) | fromanc2_datalatch_2l;
r4679	r4680
259	259	//  MAIN Program (fromanc2, fromancr, fromanc4)
260	260	// ----------------------------------------------------------------------------
261	261
262		static ADDRESS_MAP_START( fromanc2_readmem_main, ADDRESS_SPACE_PROGRAM, 16 )
263		AM_RANGE(0x000000, 0x07ffff) AM_READ(SMH_ROM)            // MAIN ROM
	262	static ADDRESS_MAP_START( fromanc2_main_map, ADDRESS_SPACE_PROGRAM, 16 )
	263	AM_RANGE(0x000000, 0x07ffff) AM_ROM                           // MAIN ROM
264	264
265		AM_RANGE(0x802000, 0x802fff) AM_READNOP            // ???
	265	AM_RANGE(0x802000, 0x802fff) AM_READNOP                        // ???
	266	AM_RANGE(0x800000, 0x803fff) AM_WRITE(fromanc2_videoram_0_w)      // VRAM 0, 1 (1P)
	267	AM_RANGE(0x880000, 0x883fff) AM_WRITE(fromanc2_videoram_1_w)      // VRAM 2, 3 (1P)
	268	AM_RANGE(0x900000, 0x903fff) AM_WRITE(fromanc2_videoram_2_w)      // VRAM 0, 1 (2P)
	269	AM_RANGE(0x980000, 0x983fff) AM_WRITE(fromanc2_videoram_3_w)      // VRAM 2, 3 (2P)
266	270
267		AM_RANGE(0xa00000, 0xa00fff) AM_READ(fromanc2_paletteram_0_r)// PALETTE (1P)
268		AM_RANGE(0xa80000, 0xa80fff) AM_READ(fromanc2_paletteram_1_r)// PALETTE (2P)
	271	AM_RANGE(0xa00000, 0xa00fff) AM_READWRITE(fromanc2_paletteram_0_r, fromanc2_paletteram_0_w)   // PALETTE (1P)
	272	AM_RANGE(0xa80000, 0xa80fff) AM_READWRITE(fromanc2_paletteram_1_r, fromanc2_paletteram_1_w)   // PALETTE (2P)
269	273
270		AM_RANGE(0xd01100, 0xd01101) AM_READ_PORT("SYSTEM")
271		AM_RANGE(0xd01300, 0xd01301) AM_READ(fromanc2_subcpu_r    )   // SUB CPU READ
272		AM_RANGE(0xd01800, 0xd01801) AM_READ(fromanc2_keymatrix_r)   // INPUT KEY MATRIX
	274	AM_RANGE(0xd00000, 0xd00023) AM_WRITE(fromanc2_gfxreg_0_w)         // SCROLL REG (1P/2P)
	275	AM_RANGE(0xd00100, 0xd00123) AM_WRITE(fromanc2_gfxreg_2_w)         // SCROLL REG (1P/2P)
	276	AM_RANGE(0xd00200, 0xd00223) AM_WRITE(fromanc2_gfxreg_1_w)         // SCROLL REG (1P/2P)
	277	AM_RANGE(0xd00300, 0xd00323) AM_WRITE(fromanc2_gfxreg_3_w)         // SCROLL REG (1P/2P)
273	278
274		AM_RANGE(0xd80000, 0xd8ffff) AM_READ(SMH_RAM)            // WORK RAM
275		ADDRESS_MAP_END
	279	AM_RANGE(0xd00400, 0xd00413) AM_WRITENOP                     // ???
	280	AM_RANGE(0xd00500, 0xd00513) AM_WRITENOP                     // ???
276	281
277		static ADDRESS_MAP_START( fromanc2_writemem_main, ADDRESS_SPACE_PROGRAM, 16 )
278		AM_RANGE(0x000000, 0x07ffff) AM_WRITE(SMH_ROM)            // MAIN ROM
279
280		AM_RANGE(0x800000, 0x803fff) AM_WRITE(fromanc2_videoram_0_w)   // VRAM 0, 1 (1P)
281		AM_RANGE(0x880000, 0x883fff) AM_WRITE(fromanc2_videoram_1_w)   // VRAM 2, 3 (1P)
282		AM_RANGE(0x900000, 0x903fff) AM_WRITE(fromanc2_videoram_2_w)   // VRAM 0, 1 (2P)
283		AM_RANGE(0x980000, 0x983fff) AM_WRITE(fromanc2_videoram_3_w)   // VRAM 2, 3 (2P)
284
285		AM_RANGE(0xa00000, 0xa00fff) AM_WRITE(fromanc2_paletteram_0_w)// PALETTE (1P)
286		AM_RANGE(0xa80000, 0xa80fff) AM_WRITE(fromanc2_paletteram_1_w)// PALETTE (2P)
287
288		AM_RANGE(0xd00000, 0xd00023) AM_WRITE(fromanc2_gfxreg_0_w)   // SCROLL REG (1P/2P)
289		AM_RANGE(0xd00100, 0xd00123) AM_WRITE(fromanc2_gfxreg_2_w)   // SCROLL REG (1P/2P)
290		AM_RANGE(0xd00200, 0xd00223) AM_WRITE(fromanc2_gfxreg_1_w)   // SCROLL REG (1P/2P)
291		AM_RANGE(0xd00300, 0xd00323) AM_WRITE(fromanc2_gfxreg_3_w)   // SCROLL REG (1P/2P)
292
293		AM_RANGE(0xd00400, 0xd00413) AM_WRITENOP            // ???
294		AM_RANGE(0xd00500, 0xd00513) AM_WRITENOP            // ???
295
296		AM_RANGE(0xd01000, 0xd01001) AM_WRITE(fromanc2_sndcmd_w)      // SOUND REQ (1P/2P)
297		AM_RANGE(0xd01200, 0xd01201) AM_WRITE(fromanc2_subcpu_w)      // SUB CPU WRITE
298		AM_RANGE(0xd01400, 0xd01401) AM_WRITE(fromanc2_gfxbank_0_w)   // GFXBANK (1P)
299		AM_RANGE(0xd01500, 0xd01501) AM_WRITE(fromanc2_gfxbank_1_w)   // GFXBANK (2P)
300		AM_RANGE(0xd01600, 0xd01601) AM_WRITE(fromanc2_eeprom_w)      // EEPROM DATA
301		AM_RANGE(0xd01a00, 0xd01a01) AM_WRITE(fromanc2_portselect_w)   // PORT SELECT (1P/2P)
302
303		AM_RANGE(0xd80000, 0xd8ffff) AM_WRITE(SMH_RAM)            // WORK RAM
304		ADDRESS_MAP_END
305
306		static ADDRESS_MAP_START( fromancr_readmem_main, ADDRESS_SPACE_PROGRAM, 16 )
307		AM_RANGE(0x000000, 0x07ffff) AM_READ(SMH_ROM)            // MAIN ROM
308
309		AM_RANGE(0xa00000, 0xa00fff) AM_READ(fromancr_paletteram_0_r)// PALETTE (1P)
310		AM_RANGE(0xa80000, 0xa80fff) AM_READ(fromancr_paletteram_1_r)// PALETTE (2P)
311
	282	AM_RANGE(0xd01000, 0xd01001) AM_WRITE(fromanc2_sndcmd_w)         // SOUND REQ (1P/2P)
312	283	AM_RANGE(0xd01100, 0xd01101) AM_READ_PORT("SYSTEM")
313		AM_RANGE(0xd01300, 0xd01301) AM_READ(fromanc2_subcpu_r)      // SUB CPU READ
314		AM_RANGE(0xd01800, 0xd01801) AM_READ(fromanc2_keymatrix_r)   // INPUT KEY MATRIX
	284	AM_RANGE(0xd01200, 0xd01201) AM_WRITE(fromanc2_subcpu_w)         // SUB CPU WRITE
	285	AM_RANGE(0xd01300, 0xd01301) AM_READ(fromanc2_subcpu_r    )         // SUB CPU READ
	286	AM_RANGE(0xd01400, 0xd01401) AM_WRITE(fromanc2_gfxbank_0_w)         // GFXBANK (1P)
	287	AM_RANGE(0xd01500, 0xd01501) AM_WRITE(fromanc2_gfxbank_1_w)         // GFXBANK (2P)
	288	AM_RANGE(0xd01600, 0xd01601) AM_WRITE(fromanc2_eeprom_w)         // EEPROM DATA
	289	AM_RANGE(0xd01800, 0xd01801) AM_READ(fromanc2_keymatrix_r)         // INPUT KEY MATRIX
	290	AM_RANGE(0xd01a00, 0xd01a01) AM_WRITE(fromanc2_portselect_w)      // PORT SELECT (1P/2P)
315	291
316		AM_RANGE(0xd80000, 0xd8ffff) AM_READ(SMH_RAM)            // WORK RAM
	292	AM_RANGE(0xd80000, 0xd8ffff) AM_RAM                           // WORK RAM
317	293	ADDRESS_MAP_END
318	294
319		static ADDRESS_MAP_START( fromancr_writemem_main, ADDRESS_SPACE_PROGRAM, 16 )
320		AM_RANGE(0x000000, 0x07ffff) AM_WRITE(SMH_ROM)            // MAIN ROM
	295	static ADDRESS_MAP_START( fromancr_main_map, ADDRESS_SPACE_PROGRAM, 16 )
	296	AM_RANGE(0x000000, 0x07ffff) AM_ROM                           // MAIN ROM
321	297
322		AM_RANGE(0x800000, 0x803fff) AM_WRITE(fromancr_videoram_0_w)   // VRAM BG (1P/2P)
323		AM_RANGE(0x880000, 0x883fff) AM_WRITE(fromancr_videoram_1_w)   // VRAM FG (1P/2P)
324		AM_RANGE(0x900000, 0x903fff) AM_WRITE(fromancr_videoram_2_w)   // VRAM TEXT (1P/2P)
325		AM_RANGE(0x980000, 0x983fff) AM_WRITENOP            // VRAM Unused ?
	298	AM_RANGE(0x800000, 0x803fff) AM_WRITE(fromancr_videoram_0_w)      // VRAM BG (1P/2P)
	299	AM_RANGE(0x880000, 0x883fff) AM_WRITE(fromancr_videoram_1_w)      // VRAM FG (1P/2P)
	300	AM_RANGE(0x900000, 0x903fff) AM_WRITE(fromancr_videoram_2_w)      // VRAM TEXT (1P/2P)
	301	AM_RANGE(0x980000, 0x983fff) AM_WRITENOP                     // VRAM Unused ?
326	302
327		AM_RANGE(0xa00000, 0xa00fff) AM_WRITE(fromancr_paletteram_0_w)// PALETTE (1P)
328		AM_RANGE(0xa80000, 0xa80fff) AM_WRITE(fromancr_paletteram_1_w)// PALETTE (2P)
	303	AM_RANGE(0xa00000, 0xa00fff) AM_READWRITE(fromancr_paletteram_0_r, fromancr_paletteram_0_w)   // PALETTE (1P)
	304	AM_RANGE(0xa80000, 0xa80fff) AM_READWRITE(fromancr_paletteram_1_r, fromancr_paletteram_0_w)   // PALETTE (2P)
329	305
330		AM_RANGE(0xd00000, 0xd00023) AM_WRITE(fromancr_gfxreg_1_w)   // SCROLL REG (1P/2P)
331		AM_RANGE(0xd00100, 0xd00123) AM_WRITE(fromancr_gfxreg_0_w)   // SCROLL REG (1P/2P)
	306	AM_RANGE(0xd00000, 0xd00023) AM_WRITE(fromancr_gfxreg_1_w)         // SCROLL REG (1P/2P)
	307	AM_RANGE(0xd00200, 0xd002ff) AM_WRITENOP                     // ?
	308	AM_RANGE(0xd00400, 0xd00413) AM_WRITENOP                     // ???
	309	AM_RANGE(0xd00500, 0xd00513) AM_WRITENOP                     // ???
	310	AM_RANGE(0xd01000, 0xd01001) AM_WRITE(fromanc2_sndcmd_w)         // SOUND REQ (1P/2P)
	311	AM_RANGE(0xd00100, 0xd00123) AM_WRITE(fromancr_gfxreg_0_w)         // SCROLL REG (1P/2P)
	312	AM_RANGE(0xd01100, 0xd01101) AM_READ_PORT("SYSTEM")
	313	AM_RANGE(0xd01200, 0xd01201) AM_WRITE(fromanc2_subcpu_w)         // SUB CPU WRITE
	314	AM_RANGE(0xd01300, 0xd01301) AM_READ(fromanc2_subcpu_r)            // SUB CPU READ
	315	AM_RANGE(0xd01400, 0xd01401) AM_WRITENOP                     // COIN COUNTER ?
	316	AM_RANGE(0xd01600, 0xd01601) AM_WRITE(fromancr_eeprom_w)         // EEPROM DATA, GFXBANK (1P/2P)
	317	AM_RANGE(0xd01800, 0xd01801) AM_READ(fromanc2_keymatrix_r)         // INPUT KEY MATRIX
	318	AM_RANGE(0xd01a00, 0xd01a01) AM_WRITE(fromanc2_portselect_w)      // PORT SELECT (1P/2P)
332	319
333		AM_RANGE(0xd00200, 0xd002ff) AM_WRITENOP            // ?
334
335		AM_RANGE(0xd00400, 0xd00413) AM_WRITENOP            // ???
336		AM_RANGE(0xd00500, 0xd00513) AM_WRITENOP            // ???
337
338		AM_RANGE(0xd01000, 0xd01001) AM_WRITE(fromanc2_sndcmd_w)      // SOUND REQ (1P/2P)
339		AM_RANGE(0xd01200, 0xd01201) AM_WRITE(fromanc2_subcpu_w)      // SUB CPU WRITE
340		AM_RANGE(0xd01400, 0xd01401) AM_WRITENOP            // COIN COUNTER ?
341		AM_RANGE(0xd01600, 0xd01601) AM_WRITE(fromancr_eeprom_w)      // EEPROM DATA, GFXBANK (1P/2P)
342		AM_RANGE(0xd01a00, 0xd01a01) AM_WRITE(fromanc2_portselect_w)   // PORT SELECT (1P/2P)
343
344		AM_RANGE(0xd80000, 0xd8ffff) AM_WRITE(SMH_RAM)            // WORK RAM
	320	AM_RANGE(0xd80000, 0xd8ffff) AM_RAM                           // WORK RAM
345	321	ADDRESS_MAP_END
346	322
347		static ADDRESS_MAP_START( fromanc4_readmem_main, ADDRESS_SPACE_PROGRAM, 16 )
348		AM_RANGE(0x000000, 0x07ffff) AM_READ(SMH_ROM)            // MAIN ROM
349		AM_RANGE(0x400000, 0x7fffff) AM_READ(SMH_ROM)            // DATA ROM
	323	static ADDRESS_MAP_START( fromanc4_main_map, ADDRESS_SPACE_PROGRAM, 16 )
	324	AM_RANGE(0x000000, 0x07ffff) AM_ROM                        // MAIN ROM
	325	AM_RANGE(0x400000, 0x7fffff) AM_ROM                        // DATA ROM
350	326
351		AM_RANGE(0x800000, 0x81ffff) AM_READ(SMH_RAM)            // WORK RAM
	327	AM_RANGE(0x800000, 0x81ffff) AM_RAM                        // WORK RAM
352	328
353		AM_RANGE(0xdb0000, 0xdb0fff) AM_READ(fromanc4_paletteram_0_r)// PALETTE (1P)
354		AM_RANGE(0xdc0000, 0xdc0fff) AM_READ(fromanc4_paletteram_1_r)// PALETTE (2P)
355
356		AM_RANGE(0xd10000, 0xd10001) AM_READ(fromanc2_keymatrix_r)   // INPUT KEY MATRIX
357		AM_RANGE(0xd20000, 0xd20001) AM_READ_PORT("SYSTEM")
358
359		AM_RANGE(0xe5000c, 0xe5000d) AM_READNOP            // EXT-COMM PORT ?
360		ADDRESS_MAP_END
361
362		static ADDRESS_MAP_START( fromanc4_writemem_main, ADDRESS_SPACE_PROGRAM, 16 )
363		AM_RANGE(0x000000, 0x07ffff) AM_WRITE(SMH_ROM)            // MAIN ROM
364		AM_RANGE(0x400000, 0x7fffff) AM_WRITE(SMH_ROM)            // DATA ROM
365
366		AM_RANGE(0x800000, 0x81ffff) AM_WRITE(SMH_RAM)            // WORK RAM
367
368	329	AM_RANGE(0xd00000, 0xd00001) AM_WRITE(fromanc2_portselect_w)   // PORT SELECT (1P/2P)
369	330
370	331	AM_RANGE(0xd10000, 0xd10001) AM_WRITENOP            // ?
r4679	r4680
377	338	AM_RANGE(0xd90000, 0xd9ffff) AM_WRITE(fromanc4_videoram_1_w)   // VRAM BG (1P/2P)
378	339	AM_RANGE(0xda0000, 0xdaffff) AM_WRITE(fromanc4_videoram_2_w)   // VRAM TEXT (1P/2P)
379	340
380		AM_RANGE(0xdb0000, 0xdb0fff) AM_WRITE(fromanc4_paletteram_0_w)// PALETTE (1P)
381		AM_RANGE(0xdc0000, 0xdc0fff) AM_WRITE(fromanc4_paletteram_1_w)// PALETTE (2P)
	341	AM_RANGE(0xdb0000, 0xdb0fff) AM_READWRITE(fromanc4_paletteram_0_r, fromanc4_paletteram_0_w)   // PALETTE (1P)
	342	AM_RANGE(0xdc0000, 0xdc0fff) AM_READWRITE(fromanc4_paletteram_1_r, fromanc4_paletteram_0_w)   // PALETTE (2P)
382	343
	344	AM_RANGE(0xd10000, 0xd10001) AM_READ(fromanc2_keymatrix_r)   // INPUT KEY MATRIX
	345	AM_RANGE(0xd20000, 0xd20001) AM_READ_PORT("SYSTEM")
	346
383	347	AM_RANGE(0xe00000, 0xe0001d) AM_WRITE(fromanc4_gfxreg_0_w)   // SCROLL, GFXBANK (1P/2P)
384	348	AM_RANGE(0xe10000, 0xe1001d) AM_WRITE(fromanc4_gfxreg_1_w)   // SCROLL, GFXBANK (1P/2P)
385	349	AM_RANGE(0xe20000, 0xe2001d) AM_WRITE(fromanc4_gfxreg_2_w)   // SCROLL, GFXBANK (1P/2P)
r4679	r4680
388	352	AM_RANGE(0xe40000, 0xe40013) AM_WRITENOP            // ???
389	353
390	354	AM_RANGE(0xe50000, 0xe50009) AM_WRITENOP            // EXT-COMM PORT ?
	355	AM_RANGE(0xe5000c, 0xe5000d) AM_READNOP            // EXT-COMM PORT ?
391	356	ADDRESS_MAP_END
392	357
393	358
r4679	r4680
395	360	//  Z80 SUB Program (fromanc2, fromancr)
396	361	// ----------------------------------------------------------------------------
397	362
398		static ADDRESS_MAP_START( fromanc2_readmem_sub, ADDRESS_SPACE_PROGRAM, 8 )
399		AM_RANGE(0x0000, 0x3fff) AM_READ(SMH_ROM)               // ROM
400		AM_RANGE(0x4000, 0x7fff) AM_READ(SMH_BANK1)               // ROM(BANK)
401		AM_RANGE(0x8000, 0xbfff) AM_READ(SMH_RAM)               // RAM(WORK)
402		AM_RANGE(0xc000, 0xffff) AM_READ(SMH_BANK2)               // RAM(BANK)
	363	static ADDRESS_MAP_START( fromanc2_sub_map, ADDRESS_SPACE_PROGRAM, 8 )
	364	AM_RANGE(0x0000, 0x3fff) AM_ROM                        // ROM
	365	AM_RANGE(0x4000, 0x7fff) AM_RAMBANK(1)                  // ROM(BANK) (is this comment correct?  It was in the split address maps in a RAM configuration...
	366	AM_RANGE(0x8000, 0xbfff) AM_RAM                        // RAM(WORK)
	367	AM_RANGE(0xc000, 0xffff) AM_RAMBANK(2)                  // RAM(BANK)
403	368	ADDRESS_MAP_END
404	369
405		static ADDRESS_MAP_START( fromanc2_writemem_sub, ADDRESS_SPACE_PROGRAM, 8 )
406		AM_RANGE(0x0000, 0x3fff) AM_WRITE(SMH_ROM)               // ROM
407		AM_RANGE(0x4000, 0x7fff) AM_WRITE(SMH_BANK1)               // ROM(BANK)
408		AM_RANGE(0x8000, 0xbfff) AM_WRITE(SMH_RAM)               // RAM(WORK)
409		AM_RANGE(0xc000, 0xffff) AM_WRITE(SMH_BANK2)               // RAM(BANK)
410		ADDRESS_MAP_END
411
412	370	static ADDRESS_MAP_START( fromanc2_sub_io_map, ADDRESS_SPACE_IO, 8 )
413	371	ADDRESS_MAP_GLOBAL_MASK(0xff)
414	372	AM_RANGE(0x00, 0x00) AM_WRITE(fromanc2_subcpu_rombank_w)
r4679	r4680
422	380	//  Z80 Sound Program (fromanc2, fromancr, fromanc4)
423	381	// ----------------------------------------------------------------------------
424	382
425		static ADDRESS_MAP_START( fromanc2_readmem_sound, ADDRESS_SPACE_PROGRAM, 8 )
426		AM_RANGE(0x0000, 0xdfff) AM_READ(SMH_ROM)
427		AM_RANGE(0xe000, 0xffff) AM_READ(SMH_RAM)
	383	static ADDRESS_MAP_START( fromanc2_sound_map, ADDRESS_SPACE_PROGRAM, 8 )
	384	AM_RANGE(0x0000, 0xdfff) AM_ROM
	385	AM_RANGE(0xe000, 0xffff) AM_RAM
428	386	ADDRESS_MAP_END
429	387
430		static ADDRESS_MAP_START( fromanc2_writemem_sound, ADDRESS_SPACE_PROGRAM, 8 )
431		AM_RANGE(0x0000, 0xdfff) AM_WRITE(SMH_ROM)
432		AM_RANGE(0xe000, 0xffff) AM_WRITE(SMH_RAM)
433		ADDRESS_MAP_END
434
435	388	static ADDRESS_MAP_START( fromanc2_sound_io_map, ADDRESS_SPACE_IO, 8 )
436	389	ADDRESS_MAP_GLOBAL_MASK(0xff)
437	390	AM_RANGE(0x00, 0x00) AM_READWRITE(soundlatch_r, SMH_NOP)         // snd cmd (1P) / ?
r4679	r4680
599	552
600	553	static void irqhandler(const device_config *device, int irq)
601	554	{
602		cpu_set_input_line(device->machine->cpu[1], 0, irq ? ASSERT_LINE : CLEAR_LINE);
	555	cputag_set_input_line(device->machine, "audiocpu", 0, irq ? ASSERT_LINE : CLEAR_LINE);
603	556	}
604	557
605	558	static const ym2610_interface ym2610_config =
r4679	r4680
616	569
617	570	/* basic machine hardware */
618	571	MDRV_CPU_ADD("maincpu", M68000,32000000/2)      /* 16.00 MHz */
619		MDRV_CPU_PROGRAM_MAP(fromanc2_readmem_main,fromanc2_writemem_main)
	572	MDRV_CPU_PROGRAM_MAP(fromanc2_main_map,0)
620	573	MDRV_CPU_VBLANK_INT("lscreen", fromanc2_interrupt)
621	574
622	575	MDRV_CPU_ADD("audiocpu", Z80,32000000/4)      /* 8.00 MHz */
623		MDRV_CPU_PROGRAM_MAP(fromanc2_readmem_sound,fromanc2_writemem_sound)
	576	MDRV_CPU_PROGRAM_MAP(fromanc2_sound_map,0)
624	577	MDRV_CPU_IO_MAP(fromanc2_sound_io_map,0)
625	578
626	579	MDRV_CPU_ADD("sub", Z80,32000000/4)      /* 8.00 MHz */
627		MDRV_CPU_PROGRAM_MAP(fromanc2_readmem_sub,fromanc2_writemem_sub)
	580	MDRV_CPU_PROGRAM_MAP(fromanc2_sub_map,0)
628	581	MDRV_CPU_IO_MAP(fromanc2_sub_io_map,0)
629	582
630	583
r4679	r4680
668	621
669	622	/* basic machine hardware */
670	623	MDRV_CPU_ADD("maincpu", M68000,32000000/2)      /* 16.00 MHz */
671		MDRV_CPU_PROGRAM_MAP(fromancr_readmem_main,fromancr_writemem_main)
	624	MDRV_CPU_PROGRAM_MAP(fromancr_main_map,0)
672	625	MDRV_CPU_VBLANK_INT("lscreen", fromanc2_interrupt)
673	626
674	627	MDRV_CPU_ADD("audiocpu", Z80,32000000/4)      /* 8.00 MHz */
675		MDRV_CPU_PROGRAM_MAP(fromanc2_readmem_sound,fromanc2_writemem_sound)
	628	MDRV_CPU_PROGRAM_MAP(fromanc2_sound_map,0)
676	629	MDRV_CPU_IO_MAP(fromanc2_sound_io_map,0)
677	630
678	631	MDRV_CPU_ADD("sub", Z80,32000000/4)      /* 8.00 MHz */
679		MDRV_CPU_PROGRAM_MAP(fromanc2_readmem_sub,fromanc2_writemem_sub)
	632	MDRV_CPU_PROGRAM_MAP(fromanc2_sub_map,0)
680	633	MDRV_CPU_IO_MAP(fromanc2_sub_io_map,0)
681	634
682	635	MDRV_MACHINE_RESET(fromancr)
r4679	r4680
719	672
720	673	/* basic machine hardware */
721	674	MDRV_CPU_ADD("maincpu", M68000,32000000/2)      /* 16.00 MHz */
722		MDRV_CPU_PROGRAM_MAP(fromanc4_readmem_main,fromanc4_writemem_main)
	675	MDRV_CPU_PROGRAM_MAP(fromanc4_main_map,0)
723	676	MDRV_CPU_VBLANK_INT("lscreen", fromanc2_interrupt)
724	677
725	678	MDRV_CPU_ADD("audiocpu", Z80,32000000/4)      /* 8.00 MHz */
726		MDRV_CPU_PROGRAM_MAP(fromanc2_readmem_sound,fromanc2_writemem_sound)
	679	MDRV_CPU_PROGRAM_MAP(fromanc2_sound_map,0)
727	680	MDRV_CPU_IO_MAP(fromanc2_sound_io_map,0)
728	681
729	682	MDRV_MACHINE_RESET(fromanc4)
r4679	r4680
872	825	GAME( 1995, fromanc2, 0, fromanc2, fromanc2, fromanc2, ROT0, "Video System Co.", "Taisen Idol-Mahjong Final Romance 2 (Japan)", 0 )
873	826	GAME( 1995, fromancr, 0, fromancr, fromanc2, fromancr, ROT0, "Video System Co.", "Taisen Mahjong FinalRomance R (Japan)", 0 )
874	827	GAME( 1998, fromanc4, 0, fromanc4, fromanc4, fromanc4, ROT0, "Video System Co.", "Taisen Mahjong FinalRomance 4 (Japan)", 0 )
875

src/mame/drivers/gridlee.c

r4679	r4680
97	97	static UINT8 *rand17 = NULL;
98	98
99	99	/* local prototypes */
100		static void poly17_init(void);
	100	static void poly17_init(running_machine *machine);
101	101
102	102	/* local timers */
103	103	static emu_timer *irq_off;
r4679	r4680
113	113
114	114	static TIMER_CALLBACK( irq_off_tick )
115	115	{
116		cpu_set_input_line(machine->cpu[0], M6809_IRQ_LINE, CLEAR_LINE);
	116	cputag_set_input_line(machine, "maincpu", M6809_IRQ_LINE, CLEAR_LINE);
117	117	}
118	118
119	119
r4679	r4680
126	126	timer_adjust_oneshot(irq_timer, video_screen_get_time_until_pos(machine->primary_screen, param + 64, 0), param + 64);
127	127
128	128	/* IRQ starts on scanline 0, 64, 128, etc. */
129		cpu_set_input_line(machine->cpu[0], M6809_IRQ_LINE, ASSERT_LINE);
	129	cputag_set_input_line(machine, "maincpu", M6809_IRQ_LINE, ASSERT_LINE);
130	130
131	131	/* it will turn off on the next HBLANK */
132	132	timer_adjust_oneshot(irq_off, video_screen_get_time_until_pos(machine->primary_screen, param, BALSENTE_HBSTART), 0);
r4679	r4680
135	135
136	136	static TIMER_CALLBACK( firq_off_tick )
137	137	{
138		cpu_set_input_line(machine->cpu[0], M6809_FIRQ_LINE, CLEAR_LINE);
	138	cputag_set_input_line(machine, "maincpu", M6809_FIRQ_LINE, CLEAR_LINE);
139	139	}
140	140
141	141
r4679	r4680
145	145	timer_adjust_oneshot(firq_timer, video_screen_get_time_until_pos(machine->primary_screen, FIRQ_SCANLINE, 0), 0);
146	146
147	147	/* IRQ starts on scanline FIRQ_SCANLINE? */
148		cpu_set_input_line(machine->cpu[0], M6809_FIRQ_LINE, ASSERT_LINE);
	148	cputag_set_input_line(machine, "maincpu", M6809_FIRQ_LINE, ASSERT_LINE);
149	149
150	150	/* it will turn off on the next HBLANK */
151	151	timer_adjust_oneshot(firq_off, video_screen_get_time_until_pos(machine->primary_screen, FIRQ_SCANLINE, BALSENTE_HBSTART), 0);
r4679	r4680
154	154	static MACHINE_START( gridlee )
155	155	{
156	156	/* create the polynomial tables */
157		poly17_init();
	157	poly17_init(machine);
158	158
159	159	state_save_register_global_array(machine, last_analog_input);
160	160	state_save_register_global_array(machine, last_analog_output);
r4679	r4680
233	233	#define POLY17_SHR   10
234	234	#define POLY17_ADD   0x18000
235	235
236		static void poly17_init(void)
	236	static void poly17_init(running_machine *machine)
237	237	{
238	238	UINT32 i, x = 0;
239	239	UINT8 *p, *r;
240	240
241	241	/* allocate memory */
242		p = poly17 = auto_malloc(2 * (POLY17_SIZE + 1));
	242	p = poly17 = auto_alloc_array(machine, UINT8, 2 * (POLY17_SIZE + 1));
243	243	r = rand17 = poly17 + POLY17_SIZE + 1;
244	244
245	245	/* generate the polynomial */
r4679	r4680
311	311	*************************************/
312	312
313	313	/* CPU 1 read addresses */
314		static ADDRESS_MAP_START( readmem_cpu1, ADDRESS_SPACE_PROGRAM, 8 )
315		AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_RAM)
316		AM_RANGE(0x9500, 0x9501) AM_READ(analog_port_r)
317		AM_RANGE(0x9502, 0x9502) AM_READ_PORT("IN0")
318		AM_RANGE(0x9503, 0x9503) AM_READ_PORT("IN1")
319		AM_RANGE(0x9600, 0x9600) AM_READ_PORT("DSW")
320		AM_RANGE(0x9700, 0x9700) AM_READ_PORT("IN2")
321		AM_RANGE(0x9820, 0x9820) AM_READ(random_num_r)
322		AM_RANGE(0x9c00, 0x9cff) AM_READ(SMH_RAM)
323		AM_RANGE(0xa000, 0xffff) AM_READ(SMH_ROM)
324		ADDRESS_MAP_END
325
326
327		static ADDRESS_MAP_START( writemem_cpu1, ADDRESS_SPACE_PROGRAM, 8 )
328		AM_RANGE(0x0000, 0x07ff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram)
329		AM_RANGE(0x0800, 0x7fff) AM_WRITE(gridlee_videoram_w) AM_BASE(&videoram) AM_SIZE(&videoram_size)
	314	static ADDRESS_MAP_START( cpu1_map, ADDRESS_SPACE_PROGRAM, 8 )
	315	AM_RANGE(0x0000, 0x07ff) AM_RAM AM_BASE(&spriteram)
	316	AM_RANGE(0x0800, 0x7fff) AM_RAM_WRITE(gridlee_videoram_w) AM_BASE(&videoram) AM_SIZE(&videoram_size)
330	317	AM_RANGE(0x9000, 0x9000) AM_WRITE(led_0_w)
331	318	AM_RANGE(0x9010, 0x9010) AM_WRITE(led_1_w)
332	319	AM_RANGE(0x9020, 0x9020) AM_WRITE(gridlee_coin_counter_w)
r4679	r4680
334	321	AM_RANGE(0x9070, 0x9070) AM_WRITE(gridlee_cocktail_flip_w)
335	322	AM_RANGE(0x9200, 0x9200) AM_WRITE(gridlee_palette_select_w)
336	323	AM_RANGE(0x9380, 0x9380) AM_WRITE(watchdog_reset_w)
337		AM_RANGE(0x9700, 0x9700) AM_WRITENOP
	324	AM_RANGE(0x9500, 0x9501) AM_READ(analog_port_r)
	325	AM_RANGE(0x9502, 0x9502) AM_READ_PORT("IN0")
	326	AM_RANGE(0x9503, 0x9503) AM_READ_PORT("IN1")
	327	AM_RANGE(0x9600, 0x9600) AM_READ_PORT("DSW")
	328	AM_RANGE(0x9700, 0x9700) AM_READ_PORT("IN2") AM_WRITENOP
	329	AM_RANGE(0x9820, 0x9820) AM_READ(random_num_r)
338	330	AM_RANGE(0x9828, 0x993f) AM_WRITE(gridlee_sound_w)
339		AM_RANGE(0x9c00, 0x9cff) AM_WRITE(SMH_RAM) AM_BASE(&generic_nvram) AM_SIZE(&generic_nvram_size)
340		AM_RANGE(0xa000, 0xffff) AM_WRITE(SMH_ROM)
	331	AM_RANGE(0x9c00, 0x9cff) AM_RAM AM_BASE(&generic_nvram) AM_SIZE(&generic_nvram_size)
	332	AM_RANGE(0xa000, 0xffff) AM_ROM
341	333	ADDRESS_MAP_END
342	334
343	335
r4679	r4680
442	434
443	435	/* basic machine hardware */
444	436	MDRV_CPU_ADD("maincpu", M6809, BALSENTE_CPU_CLOCK)
445		MDRV_CPU_PROGRAM_MAP(readmem_cpu1,writemem_cpu1)
	437	MDRV_CPU_PROGRAM_MAP(cpu1_map,0)
446	438
447	439	MDRV_MACHINE_START(gridlee)
448	440	MDRV_MACHINE_RESET(gridlee)

src/mame/drivers/rallyx.c

r4679	r4680
214	214
215	215	static WRITE8_HANDLER( rallyx_interrupt_vector_w )
216	216	{
217		cpu_set_input_line_vector(space->machine->cpu[0], 0, data);
218		cpu_set_input_line(space->machine->cpu[0], 0, CLEAR_LINE);
	217	cpu_set_input_line_vector(cputag_get_cpu(space->machine, "maincpu"), 0, data);
	218	cputag_set_input_line(space->machine, "maincpu", 0, CLEAR_LINE);
219	219	}
220	220
221	221
r4679	r4680
243	243	break;
244	244
245	245	case 0x01:   /* INT ON */
246		cpu_interrupt_enable(space->machine->cpu[0],bit);
	246	cpu_interrupt_enable(cputag_get_cpu(space->machine, "maincpu"), bit);
247	247	if (!bit)
248		cpu_set_input_line(space->machine->cpu[0], 0, CLEAR_LINE);
	248	cputag_set_input_line(space->machine, "maincpu", 0, CLEAR_LINE);
249	249	break;
250	250
251	251	case 0x02:   /* SOUND ON */
r4679	r4680
287	287	break;
288	288
289	289	case 0x01:   /* INTST */
290		cpu_interrupt_enable(space->machine->cpu[0],bit);
	290	cpu_interrupt_enable(cputag_get_cpu(space->machine, "maincpu"), bit);
291	291	break;
292	292
293	293	case 0x02:   /* MUT */

src/mame/drivers/trucocl.c

r4679	r4680
54	54
55	55	static TIMER_CALLBACK( dac_irq )
56	56	{
57		cpu_set_input_line(machine->cpu[0], INPUT_LINE_NMI, PULSE_LINE );
	57	cputag_set_input_line(machine, "maincpu", INPUT_LINE_NMI, PULSE_LINE );
58	58	}
59	59
60	60	static WRITE8_DEVICE_HANDLER( audio_dac_w)

src/mame/drivers/bnstars.c

r4679	r4680
1266	1266	AM_RANGE(0xfec08000, 0xfec0ffff) AM_RAM_WRITE(ms32_bg0_ram_w) AM_BASE(&ms32_bg0_ram)
1267	1267
1268	1268	AM_RANGE(0xfee00000, 0xfee1ffff) AM_RAM
1269		AM_RANGE(0xffe00000, 0xffffffff) AM_READWRITE(SMH_BANK1, SMH_ROM)
	1269	AM_RANGE(0xffe00000, 0xffffffff) AM_READWRITE(SMH_BANK(1), SMH_ROM)
1270	1270	ADDRESS_MAP_END
1271	1271
1272	1272	#if 0
r4679	r4680
1290	1290	static void irq_init(running_machine *machine)
1291	1291	{
1292	1292	irqreq = 0;
1293		cpu_set_input_line(machine->cpu[0], 0, CLEAR_LINE);
1294		cpu_set_irq_callback(machine->cpu[0], irq_callback);
	1293	cputag_set_input_line(machine, "maincpu", 0, CLEAR_LINE);
	1294	cpu_set_irq_callback(cputag_get_cpu(machine, "maincpu"), irq_callback);
1295	1295	}
1296	1296
1297	1297	static void irq_raise(running_machine *machine, int level)
1298	1298	{
1299	1299	irqreq |= (1<<level);
1300		cpu_set_input_line(machine->cpu[0], 0, ASSERT_LINE);
	1300	cputag_set_input_line(machine, "maincpu", 0, ASSERT_LINE);
1301	1301	}
1302	1302
1303	1303

src/mame/drivers/blockhl.c

r4679	r4680
62	62
63	63	static WRITE8_HANDLER( blockhl_sh_irqtrigger_w )
64	64	{
65		cpu_set_input_line_and_vector(space->machine->cpu[1], 0, HOLD_LINE, 0xff);
	65	cputag_set_input_line_and_vector(space->machine, "audiocpu", 0, HOLD_LINE, 0xff);
66	66	}
67	67
68	68
r4679	r4680
79	79	AM_RANGE(0x0000, 0x3fff) AM_READWRITE(K052109_051960_r, K052109_051960_w)
80	80	AM_RANGE(0x4000, 0x57ff) AM_RAM
81	81	AM_RANGE(0x5800, 0x5fff) AM_READWRITE(bankedram_r, bankedram_w) AM_BASE(&ram)
82		AM_RANGE(0x6000, 0x7fff) AM_READWRITE(SMH_BANK1, SMH_ROM)
	82	AM_RANGE(0x6000, 0x7fff) AM_READWRITE(SMH_BANK(1), SMH_ROM)
83	83	AM_RANGE(0x8000, 0xffff) AM_ROM
84	84	ADDRESS_MAP_END
85	85
r4679	r4680
274	274	{
275	275	UINT8 *RAM = memory_region(machine, "maincpu");
276	276
277		konami_configure_set_lines(machine->cpu[0], blockhl_banking);
	277	konami_configure_set_lines(cputag_get_cpu(machine, "maincpu"), blockhl_banking);
278	278
279	279	paletteram = &RAM[0x18000];
280	280	}

src/mame/drivers/gcpinbal.c

r4679	r4680
46	46
47	47	static TIMER_CALLBACK( gcpinbal_interrupt1 )
48	48	{
49		cpu_set_input_line(machine->cpu[0],1,HOLD_LINE);
	49	cputag_set_input_line(machine, "maincpu", 1, HOLD_LINE);
50	50	}
51	51
52	52	#ifdef UNUSED_FUNCTION
r4679	r4680
55	55	// IRQ3 is from the M6585
56	56	//  if (!ADPCM_playing(0))
57	57	{
58		cpu_set_input_line(machine->cpu[0],3,HOLD_LINE);
	58	cputag_set_input_line(machine, "maincpu", 3, HOLD_LINE);
59	59	}
60	60	}
61	61	#endif
r4679	r4680
205	205	MEMORY STRUCTURES
206	206	***********************************************************/
207	207
208		static ADDRESS_MAP_START( gcpinbal_readmem, ADDRESS_SPACE_PROGRAM, 16 )
209		AM_RANGE(0x000000, 0x1fffff) AM_READ(SMH_ROM)
210		AM_RANGE(0xc00000, 0xc03fff) AM_READ(gcpinbal_tilemaps_word_r)
211		AM_RANGE(0xc80000, 0xc80fff) AM_READ(SMH_RAM)   /* sprite ram */
212		AM_RANGE(0xd00000, 0xd00fff) AM_READ(SMH_RAM)
213		AM_RANGE(0xd80000, 0xd800ff) AM_READ(ioc_r)
214		AM_RANGE(0xff0000, 0xffffff) AM_READ(SMH_RAM)   /* RAM */
	208	static ADDRESS_MAP_START( gcpinbal_map, ADDRESS_SPACE_PROGRAM, 16 )
	209	AM_RANGE(0x000000, 0x1fffff) AM_ROM
	210	AM_RANGE(0xc00000, 0xc03fff) AM_READWRITE(gcpinbal_tilemaps_word_r, gcpinbal_tilemaps_word_w) AM_BASE(&gcpinbal_tilemapram)
	211	AM_RANGE(0xc80000, 0xc80fff) AM_RAM AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)   /* sprite ram */
	212	AM_RANGE(0xd00000, 0xd00fff) AM_RAM_WRITE(paletteram16_RRRRGGGGBBBBRGBx_word_w) AM_BASE(&paletteram16)
	213	AM_RANGE(0xd80000, 0xd800ff) AM_READWRITE(ioc_r, ioc_w) AM_BASE(&gcpinbal_ioc_ram)
	214	AM_RANGE(0xff0000, 0xffffff) AM_RAM   /* RAM */
215	215	ADDRESS_MAP_END
216	216
217		static ADDRESS_MAP_START( gcpinbal_writemem, ADDRESS_SPACE_PROGRAM, 16 )
218		AM_RANGE(0x000000, 0x1fffff) AM_WRITE(SMH_ROM)
219		AM_RANGE(0xc00000, 0xc03fff) AM_WRITE(gcpinbal_tilemaps_word_w) AM_BASE(&gcpinbal_tilemapram)
220		AM_RANGE(0xc80000, 0xc80fff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)
221		AM_RANGE(0xd00000, 0xd00fff) AM_WRITE(paletteram16_RRRRGGGGBBBBRGBx_word_w) AM_BASE(&paletteram16)
222		AM_RANGE(0xd80000, 0xd800ff) AM_WRITE(ioc_w) AM_BASE(&gcpinbal_ioc_ram)
223		AM_RANGE(0xff0000, 0xffffff) AM_WRITE(SMH_RAM)
224		ADDRESS_MAP_END
225	217
226	218
227
228	219	/***********************************************************
229	220	INPUT PORTS, DIPs
230	221	***********************************************************/
r4679	r4680
379	370
380	371	/* basic machine hardware */
381	372	MDRV_CPU_ADD("maincpu", M68000, 32000000/2)   /* 16 MHz ? */
382		MDRV_CPU_PROGRAM_MAP(gcpinbal_readmem,gcpinbal_writemem)
	373	MDRV_CPU_PROGRAM_MAP(gcpinbal_map,0)
383	374	MDRV_CPU_VBLANK_INT("screen", gcpinbal_interrupt)
384	375
385	376	/* video hardware */

src/mame/drivers/diverboy.c

r4679	r4680
63	63	if (ACCESSING_BITS_0_7)
64	64	{
65	65	soundlatch_w(space,0,data & 0xff);
66		cpu_set_input_line(space->machine->cpu[1],0,HOLD_LINE);
	66	cputag_set_input_line(space->machine, "audiocpu", 0, HOLD_LINE);
67	67	}
68	68	}
69	69
r4679	r4680
77	77
78	78
79	79
80		static ADDRESS_MAP_START( diverboy_readmem, ADDRESS_SPACE_PROGRAM, 16 )
81		AM_RANGE(0x000000, 0x03ffff) AM_READ(SMH_ROM)
82		AM_RANGE(0x040000, 0x04ffff) AM_READ(SMH_RAM)
83		AM_RANGE(0x080000, 0x083fff) AM_READ(SMH_RAM)
	80	static ADDRESS_MAP_START( diverboy_map, ADDRESS_SPACE_PROGRAM, 16 )
	81	AM_RANGE(0x000000, 0x03ffff) AM_ROM
	82	AM_RANGE(0x040000, 0x04ffff) AM_RAM
	83	AM_RANGE(0x080000, 0x083fff) AM_RAM AM_BASE(&diverboy_spriteram) AM_SIZE(&diverboy_spriteram_size)
	84	AM_RANGE(0x100000, 0x100001) AM_WRITE(soundcmd_w)
	85	AM_RANGE(0x140000, 0x1407ff) AM_WRITE(paletteram16_xxxxBBBBGGGGRRRR_word_w) AM_BASE(&paletteram16)
84	86	AM_RANGE(0x180000, 0x180001) AM_READ_PORT("P1_P2")
85	87	AM_RANGE(0x180002, 0x180003) AM_READ_PORT("DSW")
86	88	AM_RANGE(0x180008, 0x180009) AM_READ_PORT("COINS")
87	89	//  AM_RANGE(0x18000a, 0x18000b) AM_READNOP
88		ADDRESS_MAP_END
89
90		static ADDRESS_MAP_START( diverboy_writemem, ADDRESS_SPACE_PROGRAM, 16 )
91		AM_RANGE(0x000000, 0x03ffff) AM_WRITE(SMH_ROM)
92		AM_RANGE(0x040000, 0x04ffff) AM_WRITE(SMH_RAM) /* main ram */
93		AM_RANGE(0x080000, 0x083fff) AM_WRITE(SMH_RAM) AM_BASE(&diverboy_spriteram) AM_SIZE(&diverboy_spriteram_size)
94		AM_RANGE(0x100000, 0x100001) AM_WRITE(soundcmd_w)
95		AM_RANGE(0x140000, 0x1407ff) AM_WRITE(paletteram16_xxxxBBBBGGGGRRRR_word_w) AM_BASE(&paletteram16)
96	90	//  AM_RANGE(0x18000c, 0x18000d) AM_WRITENOP
97	91	AM_RANGE(0x320000, 0x3207ff) AM_WRITE(SMH_RAM) /* ?? */
98	92	AM_RANGE(0x322000, 0x3227ff) AM_WRITE(SMH_RAM) /* ?? */
r4679	r4680
100	94	//  AM_RANGE(0x340002, 0x340003) AM_WRITENOP
101	95	ADDRESS_MAP_END
102	96
103		static ADDRESS_MAP_START( snd_readmem, ADDRESS_SPACE_PROGRAM, 8 )
104		AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM)
105		AM_RANGE(0x8000, 0x87ff) AM_READ(SMH_RAM)
106		AM_RANGE(0x9800, 0x9800) AM_DEVREAD("oki", okim6295_r)
	97	static ADDRESS_MAP_START( snd_map, ADDRESS_SPACE_PROGRAM, 8 )
	98	AM_RANGE(0x0000, 0x7fff) AM_ROM
	99	AM_RANGE(0x8000, 0x87ff) AM_RAM
	100	AM_RANGE(0x9000, 0x9000) AM_DEVWRITE("oki", okibank_w)
	101	AM_RANGE(0x9800, 0x9800) AM_DEVREADWRITE("oki", okim6295_r, okim6295_w)
107	102	AM_RANGE(0xa000, 0xa000) AM_READ(soundlatch_r)
108	103	ADDRESS_MAP_END
109	104
110		static ADDRESS_MAP_START( snd_writemem, ADDRESS_SPACE_PROGRAM, 8 )
111		AM_RANGE(0x0000, 0x7fff) AM_WRITE(SMH_ROM)
112		AM_RANGE(0x8000, 0x87ff) AM_WRITE(SMH_RAM)
113		AM_RANGE(0x9000, 0x9000) AM_DEVWRITE("oki", okibank_w)
114		AM_RANGE(0x9800, 0x9800) AM_DEVWRITE("oki", okim6295_w)
115		ADDRESS_MAP_END
116	105
117	106
118
119	107	static INPUT_PORTS_START( diverboy )
120	108	PORT_START("P1_P2")   // 0x180000.w
121	109	PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_PLAYER(1)   // unused ?
r4679	r4680
195	183
196	184	static MACHINE_DRIVER_START( diverboy )
197	185	MDRV_CPU_ADD("maincpu", M68000, 12000000) /* guess */
198		MDRV_CPU_PROGRAM_MAP(diverboy_readmem,diverboy_writemem)
	186	MDRV_CPU_PROGRAM_MAP(diverboy_map,0)
199	187	MDRV_CPU_VBLANK_INT("screen", irq6_line_hold)
200	188
201	189	MDRV_CPU_ADD("audiocpu", Z80, 4000000)
202		MDRV_CPU_PROGRAM_MAP(snd_readmem,snd_writemem)
	190	MDRV_CPU_PROGRAM_MAP(snd_map,0)
203	191
204	192	MDRV_GFXDECODE(diverboy)
205	193

src/mame/drivers/arcadia.c

r4679	r4680
72	72
73	73	static WRITE16_HANDLER( arcadia_multibios_change_game )
74	74	{
75		memory_install_read16_handler(space, 0x800000, 0x97ffff, 0, 0, (data == 0) ? SMH_BANK2 : SMH_NOP);
	75	memory_install_read16_handler(space, 0x800000, 0x97ffff, 0, 0, (read16_space_func)((data == 0) ? SMH_BANK(2) : SMH_NOP));
76	76	}
77	77
78	78
r4679	r4680
100	100	/* swap the write handlers between ROM and bank 1 based on the bit */
101	101	if ((data & 1) == 0)
102	102	/* overlay disabled, map RAM on 0x000000 */
103		memory_install_write16_handler(cpu_get_address_space(device->machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x000000, 0x07ffff, 0, 0, SMH_BANK1);
	103	memory_install_write16_handler(cputag_get_address_space(device->machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x000000, 0x07ffff, 0, 0, (write16_space_func)SMH_BANK(1));
104	104
105	105	else
106	106	/* overlay enabled, map Amiga system ROM on 0x000000 */
107		memory_install_write16_handler(cpu_get_address_space(device->machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x000000, 0x07ffff, 0, 0, SMH_UNMAP);
	107	memory_install_write16_handler(cputag_get_address_space(device->machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x000000, 0x07ffff, 0, 0, (write16_space_func)SMH_UNMAP);
108	108
109	109	/* bit 2 = Power Led on Amiga */
110	110	set_led_status(0, (data & 2) ? 0 : 1);
r4679	r4680
156	156
157	157	static INPUT_CHANGED( coin_changed_callback )
158	158	{
159		UINT8 *counter = param;
	159	UINT8 *counter = (UINT8 *)param;
160	160
161	161	/* check for a 0 -> 1 transition */
162	162	if (!oldval && newval && *counter < 3)

src/mame/drivers/segag80v.c

r4679	r4680
183	183	{
184	184	/* pressing the service switch sends an NMI */
185	185	if (newval)
186		cpu_set_input_line(field->port->machine->cpu[0], INPUT_LINE_NMI, PULSE_LINE);
	186	cputag_set_input_line(field->port->machine, "maincpu", INPUT_LINE_NMI, PULSE_LINE);
187	187	}
188	188
189	189
r4679	r4680
1318	1318
1319	1319	static DRIVER_INIT( elim2 )
1320	1320	{
1321		const address_space *iospace = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_IO);
	1321	const address_space *iospace = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_IO);
1322	1322
1323	1323	/* configure security */
1324	1324	sega_security(70);
r4679	r4680
1332	1332
1333	1333	static DRIVER_INIT( elim4 )
1334	1334	{
1335		const address_space *iospace = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_IO);
	1335	const address_space *iospace = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_IO);
1336	1336
1337	1337	/* configure security */
1338	1338	sega_security(76);
r4679	r4680
1350	1350
1351	1351	static DRIVER_INIT( spacfury )
1352	1352	{
1353		const address_space *iospace = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_IO);
	1353	const address_space *iospace = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_IO);
1354	1354
1355	1355	/* configure security */
1356	1356	sega_security(64);
r4679	r4680
1366	1366
1367	1367	static DRIVER_INIT( zektor )
1368	1368	{
1369		const address_space *iospace = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_IO);
	1369	const address_space *iospace = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_IO);
1370	1370	const device_config *ay = devtag_get_device(machine, "ay");
1371	1371
1372	1372	/* configure security */
r4679	r4680
1388	1388
1389	1389	static DRIVER_INIT( tacscan )
1390	1390	{
1391		const address_space *pgmspace = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM);
1392		const address_space *iospace = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_IO);
	1391	const address_space *pgmspace = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	1392	const address_space *iospace = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_IO);
1393	1393
1394	1394	/* configure security */
1395	1395	sega_security(76);
r4679	r4680
1407	1407
1408	1408	static DRIVER_INIT( startrek )
1409	1409	{
1410		const address_space *pgmspace = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM);
1411		const address_space *iospace = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_IO);
	1410	const address_space *pgmspace = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	1411	const address_space *iospace = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_IO);
1412	1412
1413	1413	/* configure security */
1414	1414	sega_security(64);

src/mame/drivers/carjmbre.c

r4679	r4680
53	53	VIDEO_UPDATE( carjmbre );
54	54
55	55
56		static ADDRESS_MAP_START( carjmbre_readmem, ADDRESS_SPACE_PROGRAM, 8 )
57		AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM)
58		AM_RANGE(0x8000, 0x87ff) AM_READ(SMH_RAM)
	56	static ADDRESS_MAP_START( carjmbre_map, ADDRESS_SPACE_PROGRAM, 8 )
	57	AM_RANGE(0x0000, 0x7fff) AM_ROM
	58	AM_RANGE(0x8000, 0x87ff) AM_RAM
59	59	AM_RANGE(0x8800, 0x8800) AM_READNOP         //?? possibly watchdog
60		AM_RANGE(0x9000, 0x97ff) AM_READ(SMH_RAM)
61		AM_RANGE(0xa000, 0xa000) AM_READ_PORT("P1")
62		AM_RANGE(0xa800, 0xa800) AM_READ_PORT("P2")
63		AM_RANGE(0xb800, 0xb800) AM_READ_PORT("DSW")
64		ADDRESS_MAP_END
65
66		static ADDRESS_MAP_START( carjmbre_writemem, ADDRESS_SPACE_PROGRAM, 8 )
67		AM_RANGE(0x0000, 0x7fff) AM_WRITE(SMH_ROM)
68		AM_RANGE(0x8000, 0x87ff) AM_WRITE(SMH_RAM)
69	60	AM_RANGE(0x8803, 0x8803) AM_WRITE(interrupt_enable_w)
70	61	AM_RANGE(0x8805, 0x8806) AM_WRITE(carjmbre_bgcolor_w)   //guess
71	62	AM_RANGE(0x8807, 0x8807) AM_WRITE(carjmbre_flipscreen_w)
72	63	AM_RANGE(0x8fc1, 0x8fc1) AM_WRITENOP         //overrun during initial screen clear
73	64	AM_RANGE(0x8fe1, 0x8fe1) AM_WRITENOP         //overrun during initial screen clear
74		AM_RANGE(0x9000, 0x97ff) AM_WRITE(carjmbre_videoram_w) AM_BASE(&videoram)
	65	AM_RANGE(0x9000, 0x97ff) AM_RAM_WRITE(carjmbre_videoram_w) AM_BASE(&videoram)
75	66	AM_RANGE(0x9800, 0x985f) AM_WRITE(SMH_RAM) AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
76	67	AM_RANGE(0x9880, 0x98df) AM_WRITE(SMH_RAM)         //spriteram mirror
77		AM_RANGE(0xb800, 0xb800) AM_WRITE(soundlatch_w)
	68	AM_RANGE(0xa000, 0xa000) AM_READ_PORT("P1")
	69	AM_RANGE(0xa800, 0xa800) AM_READ_PORT("P2")
	70	AM_RANGE(0xb800, 0xb800) AM_READ_PORT("DSW") AM_WRITE(soundlatch_w)
78	71	ADDRESS_MAP_END
79	72
80		static ADDRESS_MAP_START( carjmbre_sound_readmem, ADDRESS_SPACE_PROGRAM, 8 )
81		AM_RANGE(0x0000, 0x0fff) AM_READ(SMH_ROM)
	73	static ADDRESS_MAP_START( carjmbre_sound_map, ADDRESS_SPACE_PROGRAM, 8 )
	74	AM_RANGE(0x0000, 0x0fff) AM_ROM
82	75	AM_RANGE(0x1000, 0x10ff) AM_READNOP         //look to be stray reads from 10/12/14/16/18xx
83	76	AM_RANGE(0x1200, 0x12ff) AM_READNOP
84	77	AM_RANGE(0x1400, 0x14ff) AM_READNOP
85	78	AM_RANGE(0x1600, 0x16ff) AM_READNOP
86	79	AM_RANGE(0x1800, 0x18ff) AM_READNOP
87		AM_RANGE(0x2000, 0x27ff) AM_READ(SMH_RAM)
	80	AM_RANGE(0x2000, 0x27ff) AM_RAM
88	81	ADDRESS_MAP_END
89	82
90		static ADDRESS_MAP_START( carjmbre_sound_writemem, ADDRESS_SPACE_PROGRAM, 8 )
91		AM_RANGE(0x0000, 0x0fff) AM_WRITE(SMH_ROM)
92		AM_RANGE(0x2000, 0x27ff) AM_WRITE(SMH_RAM)
93		ADDRESS_MAP_END
94	83
95
96	84	static ADDRESS_MAP_START( carjmbre_sound_io_map, ADDRESS_SPACE_IO, 8 )
97	85	ADDRESS_MAP_GLOBAL_MASK(0xff)
98	86	AM_RANGE(0x00, 0x00) AM_READ(soundlatch_r)
r4679	r4680
181	169
182	170	/* basic machine hardware */
183	171	MDRV_CPU_ADD("maincpu", Z80,18432000/6)
184		MDRV_CPU_PROGRAM_MAP(carjmbre_readmem,carjmbre_writemem)
	172	MDRV_CPU_PROGRAM_MAP(carjmbre_map,0)
185	173	MDRV_CPU_VBLANK_INT("screen", nmi_line_pulse)
186	174
187	175	MDRV_CPU_ADD("audiocpu", Z80, 1500000)
188		MDRV_CPU_PROGRAM_MAP(carjmbre_sound_readmem,carjmbre_sound_writemem)
	176	MDRV_CPU_PROGRAM_MAP(carjmbre_sound_map,0)
189	177	MDRV_CPU_IO_MAP(carjmbre_sound_io_map,0)
190	178	MDRV_CPU_VBLANK_INT("screen", irq0_line_hold)
191	179

src/mame/drivers/superchs.c

r4679	r4680
90	90
91	91	if (ACCESSING_BITS_8_15)
92	92	{
93		cpu_set_input_line(space->machine->cpu[2], INPUT_LINE_RESET, (data &0x200) ? CLEAR_LINE : ASSERT_LINE);
94		if (data&0x8000) cpu_set_input_line(space->machine->cpu[0],3,HOLD_LINE); /* Guess */
	93	cputag_set_input_line(space->machine, "mcu", INPUT_LINE_RESET, (data &0x200) ? CLEAR_LINE : ASSERT_LINE);
	94	if (data&0x8000) cputag_set_input_line(space->machine, "maincpu", 3, HOLD_LINE); /* Guess */
95	95	}
96	96
97	97	if (ACCESSING_BITS_0_7)
r4679	r4680
222	222	/* This is guess work - the interrupts are in groups of 4, with each writing to a
223	223	different byte in this long word before the RTE.  I assume all but the last
224	224	(top) byte cause an IRQ with the final one being an ACK.  (Total guess but it works). */
225		if (mem_mask!=0xff000000)
226		cpu_set_input_line(space->machine->cpu[0],3,HOLD_LINE);
	225	if (mem_mask != 0xff000000)
	226	cputag_set_input_line(space->machine, "maincpu", 3, HOLD_LINE);
227	227	}
228	228
229	229	/***********************************************************
r4679	r4680
484	484	static DRIVER_INIT( superchs )
485	485	{
486	486	/* Speedup handlers */
487		memory_install_read32_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x100000, 0x100003, 0, 0, main_cycle_r);
488		memory_install_read16_handler(cpu_get_address_space(machine->cpu[2], ADDRESS_SPACE_PROGRAM), 0x80000a, 0x80000b, 0, 0, sub_cycle_r);
	487	memory_install_read32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x100000, 0x100003, 0, 0, main_cycle_r);
	488	memory_install_read16_handler(cputag_get_address_space(machine, "mcu", ADDRESS_SPACE_PROGRAM), 0x80000a, 0x80000b, 0, 0, sub_cycle_r);
489	489	}
490	490
491	491	GAMEL( 1992, superchs, 0, superchs, superchs, superchs, ROT0, "Taito America Corporation", "Super Chase - Criminal Termination (US)", 0, layout_superchs )

src/mame/drivers/bottom9.c

r4679	r4680
102	102
103	103	static WRITE8_HANDLER( bottom9_sh_irqtrigger_w )
104	104	{
105		cpu_set_input_line_and_vector(space->machine->cpu[1],0,HOLD_LINE,0xff);
	105	cputag_set_input_line_and_vector(space->machine, "audiocpu", 0, HOLD_LINE, 0xff);
106	106	}
107	107
108	108	static int nmienable;
r4679	r4680
147	147	AM_RANGE(0x2000, 0x27ff) AM_READWRITE(bottom9_bankedram2_r, bottom9_bankedram2_w) AM_BASE(&paletteram)
148	148	AM_RANGE(0x0000, 0x3fff) AM_READWRITE(K052109_051960_r, K052109_051960_w)
149	149	AM_RANGE(0x4000, 0x5fff) AM_RAM
150		AM_RANGE(0x6000, 0x7fff) AM_READWRITE(SMH_BANK1, SMH_ROM)
	150	AM_RANGE(0x6000, 0x7fff) AM_READWRITE(SMH_BANK(1), SMH_ROM)
151	151	AM_RANGE(0x8000, 0xffff) AM_ROM
152	152	ADDRESS_MAP_END
153	153

src/mame/drivers/flower.c

r4679	r4680
79	79
80	80	static WRITE8_HANDLER( flower_irq_ack )
81	81	{
82		cpu_set_input_line(space->machine->cpu[0], 0, CLEAR_LINE);
	82	cputag_set_input_line(space->machine, "maincpu", 0, CLEAR_LINE);
83	83	}
84	84
85	85	static WRITE8_HANDLER( sn_irq_enable_w )
86	86	{
87	87	*sn_irq_enable = data;
88	88
89		cpu_set_input_line(space->machine->cpu[2], 0, CLEAR_LINE);
	89	cputag_set_input_line(space->machine, "audiocpu", 0, CLEAR_LINE);
90	90	}
91	91
92	92	static INTERRUPT_GEN( sn_irq )
r4679	r4680
97	97
98	98	static WRITE8_HANDLER( sound_command_w )
99	99	{
100		soundlatch_w(space,0,data);
	100	soundlatch_w(space, 0, data);
101	101	if ((*sn_nmi_enable & 1) == 1)
102		cpu_set_input_line(space->machine->cpu[2], INPUT_LINE_NMI, PULSE_LINE);
	102	cputag_set_input_line(space->machine, "audiocpu", INPUT_LINE_NMI, PULSE_LINE);
103	103	}
104	104
105	105	static ADDRESS_MAP_START( flower_cpu1_2, ADDRESS_SPACE_PROGRAM, 8 )

src/mame/drivers/battlera.c

r4679	r4680
46	46
47	47	static WRITE8_HANDLER( battlera_sound_w )
48	48	{
49		if (offset==0) {
	49	if (offset == 0)
	50	{
50	51	soundlatch_w(space,0,data);
51		cpu_set_input_line(space->machine->cpu[1], 0, HOLD_LINE);
	52	cputag_set_input_line(space->machine, "audiocpu", 0, HOLD_LINE);
52	53	}
53	54	}
54	55
r4679	r4680
61	62
62	63	static READ8_HANDLER( control_data_r )
63	64	{
64		switch (control_port_select) {
	65	switch (control_port_select)
	66	{
65	67	case 0xfe: return input_port_read(space->machine, "IN0"); /* Player 1 */
66	68	case 0xfd: return input_port_read(space->machine, "IN1"); /* Player 2 */
67	69	case 0xfb: return input_port_read(space->machine, "IN2"); /* Coins */
r4679	r4680
100	102	static int toggle;
101	103
102	104	msm5205_data_w(device,msm5205next >> 4);
103		msm5205next<<=4;
	105	msm5205next <<= 4;
104	106
105	107	toggle = 1 - toggle;
106	108	if (toggle)
107		cpu_set_input_line(device->machine->cpu[1], 1, HOLD_LINE);
	109	cputag_set_input_line(device->machine, "audiocpu", 1, HOLD_LINE);
108	110	}
109	111
110	112	static WRITE8_HANDLER( battlera_adpcm_data_w )
111	113	{
112		msm5205next=data;
	114	msm5205next = data;
113	115	}
114	116
115	117	static WRITE8_DEVICE_HANDLER( battlera_adpcm_reset_w )
116	118	{
117		msm5205_reset_w(device,0);
	119	msm5205_reset_w(device, 0);
118	120	}
119	121
120	122	static ADDRESS_MAP_START( sound_map, ADDRESS_SPACE_PROGRAM, 8 )

src/mame/drivers/xain.c

r4679	r4680
208	208	/* FIRQ (IMS) fires every on every 8th scanline (except 0) */
209	209	if (!(vcount_old & 8) && (vcount & 8))
210	210	{
211		cpu_set_input_line(timer->machine->cpu[0], M6809_FIRQ_LINE, ASSERT_LINE);
	211	cputag_set_input_line(timer->machine, "maincpu", M6809_FIRQ_LINE, ASSERT_LINE);
212	212	}
213	213
214	214	/* NMI fires on scanline 248 (VBL) and is latched */
215	215	if (vcount == 0xf8)
216	216	{
217		cpu_set_input_line(timer->machine->cpu[0], INPUT_LINE_NMI, ASSERT_LINE);
	217	cputag_set_input_line(timer->machine, "maincpu", INPUT_LINE_NMI, ASSERT_LINE);
218	218	}
219	219
220	220	/* VBLANK input bit is held high from scanlines 248-255 */
r4679	r4680
242	242	static WRITE8_HANDLER( xain_sound_command_w )
243	243	{
244	244	soundlatch_w(space,offset,data);
245		cpu_set_input_line(space->machine->cpu[2],M6809_IRQ_LINE,HOLD_LINE);
	245	cputag_set_input_line(space->machine, "audiocpu", M6809_IRQ_LINE, HOLD_LINE);
246	246	}
247	247
248	248	static WRITE8_HANDLER( xain_main_irq_w )
r4679	r4680
250	250	switch (offset)
251	251	{
252	252	case 0: /* 0x3a09 - NMI clear */
253		cpu_set_input_line(space->machine->cpu[0],INPUT_LINE_NMI,CLEAR_LINE);
	253	cputag_set_input_line(space->machine, "maincpu", INPUT_LINE_NMI, CLEAR_LINE);
254	254	break;
255	255	case 1: /* 0x3a0a - FIRQ clear */
256		cpu_set_input_line(space->machine->cpu[0],M6809_FIRQ_LINE,CLEAR_LINE);
	256	cputag_set_input_line(space->machine, "maincpu", M6809_FIRQ_LINE, CLEAR_LINE);
257	257	break;
258	258	case 2: /* 0x3a0b - IRQ clear */
259		cpu_set_input_line(space->machine->cpu[0],M6809_IRQ_LINE,CLEAR_LINE);
	259	cputag_set_input_line(space->machine, "maincpu", M6809_IRQ_LINE, CLEAR_LINE);
260	260	break;
261	261	case 3: /* 0x3a0c - IRQB assert */
262		cpu_set_input_line(space->machine->cpu[1],M6809_IRQ_LINE,ASSERT_LINE);
	262	cputag_set_input_line(space->machine, "sub", M6809_IRQ_LINE, ASSERT_LINE);
263	263	break;
264	264	}
265	265	}
266	266
267	267	static WRITE8_HANDLER( xain_irqA_assert_w )
268	268	{
269		cpu_set_input_line(space->machine->cpu[0],M6809_IRQ_LINE,ASSERT_LINE);
	269	cputag_set_input_line(space->machine, "maincpu", M6809_IRQ_LINE, ASSERT_LINE);
270	270	}
271	271
272	272	static WRITE8_HANDLER( xain_irqB_clear_w )
273	273	{
274		cpu_set_input_line(space->machine->cpu[1],M6809_IRQ_LINE,CLEAR_LINE);
	274	cputag_set_input_line(space->machine, "sub", M6809_IRQ_LINE, CLEAR_LINE);
275	275	}
276	276
277	277	static READ8_HANDLER( xain_68705_r )
r4679	r4680
454	454	/* handler called by the 2203 emulator when the internal timers cause an IRQ */
455	455	static void irqhandler(const device_config *device, int irq)
456	456	{
457		cpu_set_input_line(device->machine->cpu[2],M6809_FIRQ_LINE,irq ? ASSERT_LINE : CLEAR_LINE);
	457	cputag_set_input_line(device->machine, "audiocpu", M6809_FIRQ_LINE, irq ? ASSERT_LINE : CLEAR_LINE);
458	458	}
459	459
460	460	static const ym2203_interface ym2203_config =

src/mame/drivers/gundealr.c

r4679	r4680
567	567	static DRIVER_INIT( yamyam )
568	568	{
569	569	input_ports_hack = 1;
570		memory_install_write8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xe000, 0xe000, 0, 0, yamyam_protection_w);
	570	memory_install_write8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xe000, 0xe000, 0, 0, yamyam_protection_w);
571	571	}
572	572
573	573

src/mame/drivers/namcos1.c

r4679	r4680
353	353
354	354	static WRITE8_HANDLER( namcos1_sub_firq_w )
355	355	{
356		cpu_set_input_line(space->machine->cpu[1], M6809_FIRQ_LINE, ASSERT_LINE);
	356	cputag_set_input_line(space->machine, "sub", M6809_FIRQ_LINE, ASSERT_LINE);
357	357	}
358	358
359	359	static WRITE8_HANDLER( irq_ack_w )
r4679	r4680
635	635
636	636
637	637	static INPUT_PORTS_START( tankfrc4 )
638
639		/* How are the controls mapped?  Coins 3 & 4 are right as shown below.  Hit F2 for test screen, then "9" for the controls test screen */
640		/* Start buttons are not used by the game & manual shows P1 buttons 2 & 3 (plus unused JAMMA pins 25 & 26) are P3 UP, DOWN, LEFT & RIGHT */
641		/* Manual shows P2 buttons 2 & 3 (plus unused JAMMA pins c & d) are P4 UP, DOWN, LEFT & RIGHT.  J23 & J24 are P3 button1 & P4 button1 */
642
643	638	PORT_INCLUDE( ns1 )
644	639
645	640	PORT_MODIFY( "CONTROL0" )
r4679	r4680
649	644	PORT_MODIFY( "CONTROL1" )
650	645	PORT_BIT( 0x7f, IP_ACTIVE_LOW, IPT_UNUSED )
651	646	PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_COIN4 )
	647
	648	PORT_START( "IN0" )
	649	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_PLAYER(1)
	650	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_PLAYER(1)
	651	PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_PLAYER(1)
	652	PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_PLAYER(1)
	653	PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(1) // and start1
	654	PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNUSED )
	655	PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNUSED )
	656	PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNUSED )
	657
	658	PORT_START( "IN1" )
	659	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_PLAYER(2)
	660	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_PLAYER(2)
	661	PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_PLAYER(2)
	662	PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_PLAYER(2)
	663	PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(2) // and start2
	664	PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNUSED )
	665	PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNUSED )
	666	PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNUSED )
	667
	668	PORT_START( "IN2" )
	669	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_PLAYER(3)
	670	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_PLAYER(3)
	671	PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_PLAYER(3)
	672	PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_PLAYER(3)
	673	PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(3) // and start3
	674	PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNUSED )
	675	PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNUSED )
	676	PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNUSED )
	677
	678	PORT_START( "IN3" )
	679	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_PLAYER(4)
	680	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_PLAYER(4)
	681	PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_PLAYER(4)
	682	PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_PLAYER(4)
	683	PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(4) // and start4
	684	PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNUSED )
	685	PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNUSED )
	686	PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNUSED )
652	687	INPUT_PORTS_END
653	688
654	689
655	690
	691
	692
656	693	static INPUT_PORTS_START( pacmania )
657	694	PORT_INCLUDE( ns1 )
658	695
r4679	r4680
1020	1057
1021	1058	static void namcos1_sound_interrupt( const device_config *device, int irq )
1022	1059	{
1023		cpu_set_input_line(device->machine->cpu[2], M6809_FIRQ_LINE, irq ? ASSERT_LINE : CLEAR_LINE);
	1060	cputag_set_input_line(device->machine, "audiocpu", M6809_FIRQ_LINE, irq ? ASSERT_LINE : CLEAR_LINE);
1024	1061	}
1025	1062
1026	1063	static const ym2151_interface ym2151_config =
r4679	r4680
2707	2744	GAME( 1990, soukobdx, boxyboy,  ns1,     boxyboy,  soukobdx, ROT0,   "Namco", "Souko Ban Deluxe (Japan)", 0 )
2708	2745	GAME( 1990, puzlclub, 0,        ns1,     puzlclub, puzlclub, ROT90,  "Namco", "Puzzle Club (Japan prototype)", 0 )
2709	2746	GAME( 1991, tankfrce, 0,        ns1,     ns1,      tankfrce, ROT0,   "Namco", "Tank Force (US, 2 Player)", 0 )
2710		GAME( 1991, tankfrc4, tankfrce, ns1,     tankfrc4, tankfrc4, ROT0,   "Namco", "Tank Force (US, 4 Player)", GAME_NOT_WORKING ) /* No controls */
	2747	GAME( 1991, tankfrc4, tankfrce, ns1,     tankfrc4, tankfrc4, ROT0,   "Namco", "Tank Force (US, 4 Player)", 0 )
2711	2748	GAME( 1991, tankfrcj, tankfrce, ns1,     ns1,      tankfrce, ROT0,   "Namco", "Tank Force (Japan)", 0 )
2712

src/mame/drivers/mainevt.c

r4679	r4680
23	23	#include "driver.h"
24	24	#include "cpu/z80/z80.h"
25	25	#include "cpu/hd6309/hd6309.h"
26		#include "deprecat.h"
27	26	#include "video/konamiic.h"
28	27	#include "cpu/m6809/m6809.h"
29	28	#include "sound/2151intf.h"
r4679	r4680
91	90
92	91	static WRITE8_HANDLER( mainevt_sh_irqtrigger_w )
93	92	{
94		cpu_set_input_line_and_vector(space->machine->cpu[1],0,HOLD_LINE,0xff);
	93	cputag_set_input_line_and_vector(space->machine, "audiocpu", 0, HOLD_LINE, 0xff);
95	94	}
96	95
97	96	static READ8_DEVICE_HANDLER( mainevt_sh_busy_r )
r4679	r4680
141	140	}
142	141
143	142
144		static ADDRESS_MAP_START( readmem, ADDRESS_SPACE_PROGRAM, 8 )
	143	static ADDRESS_MAP_START( mainevt_map, ADDRESS_SPACE_PROGRAM, 8 )
	144	AM_RANGE(0x1f80, 0x1f80) AM_WRITE(mainevt_bankswitch_w)
	145	AM_RANGE(0x1f84, 0x1f84) AM_WRITE(soundlatch_w)            /* probably */
	146	AM_RANGE(0x1f88, 0x1f88) AM_WRITE(mainevt_sh_irqtrigger_w)   /* probably */
	147	AM_RANGE(0x1f8c, 0x1f8d) AM_WRITENOP   /* ??? */
	148	AM_RANGE(0x1f90, 0x1f90) AM_WRITE(mainevt_coin_w)   /* coin counters + lamps */
	149
145	150	AM_RANGE(0x1f94, 0x1f94) AM_READ_PORT("SYSTEM")
146	151	AM_RANGE(0x1f95, 0x1f95) AM_READ_PORT("P1")
147	152	AM_RANGE(0x1f96, 0x1f96) AM_READ_PORT("P2")
r4679	r4680
151	156	AM_RANGE(0x1f9a, 0x1f9a) AM_READ_PORT("P4")
152	157	AM_RANGE(0x1f9b, 0x1f9b) AM_READ_PORT("DSW2")
153	158
154		AM_RANGE(0x0000, 0x3fff) AM_READ(K052109_051960_r)
155		AM_RANGE(0x4000, 0x5fff) AM_READ(SMH_RAM)
156		AM_RANGE(0x6000, 0x7fff) AM_READ(SMH_BANK1)
	159	AM_RANGE(0x0000, 0x3fff) AM_READWRITE(K052109_051960_r,K052109_051960_w)
	160
	161	AM_RANGE(0x4000, 0x5dff) AM_RAM
	162	AM_RANGE(0x5e00, 0x5fff) AM_RAM_WRITE(paletteram_xBBBBBGGGGGRRRRR_be_w) AM_BASE(&paletteram)
	163	AM_RANGE(0x6000, 0x7fff) AM_ROMBANK(1)
157	164	AM_RANGE(0x8000, 0xffff) AM_READ(SMH_ROM)
158	165	ADDRESS_MAP_END
159	166
160		static ADDRESS_MAP_START( writemem, ADDRESS_SPACE_PROGRAM, 8 )
	167
	168	static ADDRESS_MAP_START( devstors_map, ADDRESS_SPACE_PROGRAM, 8 )
161	169	AM_RANGE(0x1f80, 0x1f80) AM_WRITE(mainevt_bankswitch_w)
162	170	AM_RANGE(0x1f84, 0x1f84) AM_WRITE(soundlatch_w)            /* probably */
163	171	AM_RANGE(0x1f88, 0x1f88) AM_WRITE(mainevt_sh_irqtrigger_w)   /* probably */
164		AM_RANGE(0x1f8c, 0x1f8d) AM_WRITENOP   /* ??? */
165	172	AM_RANGE(0x1f90, 0x1f90) AM_WRITE(mainevt_coin_w)   /* coin counters + lamps */
	173	AM_RANGE(0x1fb2, 0x1fb2) AM_WRITE(dv_nmienable_w)
166	174
167		AM_RANGE(0x0000, 0x3fff) AM_WRITE(K052109_051960_w)
168		AM_RANGE(0x4000, 0x5dff) AM_WRITE(SMH_RAM)
169		AM_RANGE(0x5e00, 0x5fff) AM_WRITE(paletteram_xBBBBBGGGGGRRRRR_be_w) AM_BASE(&paletteram)
170		AM_RANGE(0x6000, 0xffff) AM_WRITE(SMH_ROM)
171		ADDRESS_MAP_END
172
173
174		static ADDRESS_MAP_START( dv_readmem, ADDRESS_SPACE_PROGRAM, 8 )
175	175	AM_RANGE(0x1f94, 0x1f94) AM_READ_PORT("SYSTEM")
176	176	AM_RANGE(0x1f95, 0x1f95) AM_READ_PORT("P1")
177	177	AM_RANGE(0x1f96, 0x1f96) AM_READ_PORT("P2")
178	178	AM_RANGE(0x1f97, 0x1f97) AM_READ_PORT("DSW1")
179	179	AM_RANGE(0x1f98, 0x1f98) AM_READ_PORT("DSW3")
180	180	AM_RANGE(0x1f9b, 0x1f9b) AM_READ_PORT("DSW2")
181		AM_RANGE(0x1fa0, 0x1fbf) AM_READ(K051733_r)
	181	AM_RANGE(0x1fa0, 0x1fbf) AM_READWRITE(K051733_r,K051733_w)
182	182
183		AM_RANGE(0x0000, 0x3fff) AM_READ(K052109_051960_r)
184		AM_RANGE(0x4000, 0x5fff) AM_READ(SMH_RAM)
185		AM_RANGE(0x6000, 0x7fff) AM_READ(SMH_BANK1)
186		AM_RANGE(0x8000, 0xffff) AM_READ(SMH_ROM)
187		ADDRESS_MAP_END
	183	AM_RANGE(0x0000, 0x3fff) AM_READWRITE(K052109_051960_r,K052109_051960_w)
188	184
189		static ADDRESS_MAP_START( dv_writemem, ADDRESS_SPACE_PROGRAM, 8 )
190		AM_RANGE(0x1f80, 0x1f80) AM_WRITE(mainevt_bankswitch_w)
191		AM_RANGE(0x1f84, 0x1f84) AM_WRITE(soundlatch_w)            /* probably */
192		AM_RANGE(0x1f88, 0x1f88) AM_WRITE(mainevt_sh_irqtrigger_w)   /* probably */
193		AM_RANGE(0x1f90, 0x1f90) AM_WRITE(mainevt_coin_w)   /* coin counters + lamps */
194		AM_RANGE(0x1fb2, 0x1fb2) AM_WRITE(dv_nmienable_w)
195		AM_RANGE(0x1fa0, 0x1fbf) AM_WRITE(K051733_w)
196
197		AM_RANGE(0x0000, 0x3fff) AM_WRITE(K052109_051960_w)
198		AM_RANGE(0x4000, 0x5dff) AM_WRITE(SMH_RAM)
199		AM_RANGE(0x5e00, 0x5fff) AM_WRITE(paletteram_xBBBBBGGGGGRRRRR_be_w) AM_BASE(&paletteram)
200		AM_RANGE(0x6000, 0xffff) AM_WRITE(SMH_ROM)
	185	AM_RANGE(0x4000, 0x5dff) AM_RAM
	186	AM_RANGE(0x5e00, 0x5fff) AM_RAM_WRITE(paletteram_xBBBBBGGGGGRRRRR_be_w) AM_BASE(&paletteram)
	187	AM_RANGE(0x6000, 0x7fff) AM_ROMBANK(1)
	188	AM_RANGE(0x8000, 0xffff) AM_ROM
201	189	ADDRESS_MAP_END
202	190
203	191
204		static ADDRESS_MAP_START( sound_readmem, ADDRESS_SPACE_PROGRAM, 8 )
205		AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM)
206		AM_RANGE(0x8000, 0x83ff) AM_READ(SMH_RAM)
	192	static ADDRESS_MAP_START( mainevt_sound_map, ADDRESS_SPACE_PROGRAM, 8 )
	193	AM_RANGE(0x0000, 0x7fff) AM_ROM
	194	AM_RANGE(0x8000, 0x83ff) AM_RAM
	195	AM_RANGE(0x9000, 0x9000) AM_DEVWRITE("upd", upd7759_port_w)
207	196	AM_RANGE(0xa000, 0xa000) AM_READ(soundlatch_r)
208		AM_RANGE(0xb000, 0xb00d) AM_DEVREAD("konami", k007232_r)
	197	AM_RANGE(0xb000, 0xb00d) AM_DEVREADWRITE("konami", k007232_r,k007232_w)
209	198	AM_RANGE(0xd000, 0xd000) AM_DEVREAD("upd", mainevt_sh_busy_r)
210		ADDRESS_MAP_END
211
212		static ADDRESS_MAP_START( sound_writemem, ADDRESS_SPACE_PROGRAM, 8 )
213		AM_RANGE(0x0000, 0x7fff) AM_WRITE(SMH_ROM)
214		AM_RANGE(0x8000, 0x83ff) AM_WRITE(SMH_RAM)
215		AM_RANGE(0xb000, 0xb00d) AM_DEVWRITE("konami", k007232_w)
216		AM_RANGE(0x9000, 0x9000) AM_DEVWRITE("upd", upd7759_port_w)
217	199	AM_RANGE(0xe000, 0xe000) AM_WRITE(mainevt_sh_irqcontrol_w)
218	200	AM_RANGE(0xf000, 0xf000) AM_WRITE(mainevt_sh_bankswitch_w)
219	201	ADDRESS_MAP_END
220	202
221		static ADDRESS_MAP_START( dv_sound_readmem, ADDRESS_SPACE_PROGRAM, 8 )
222		AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM)
223		AM_RANGE(0x8000, 0x83ff) AM_READ(SMH_RAM)
	203	static ADDRESS_MAP_START( devstors_sound_map, ADDRESS_SPACE_PROGRAM, 8 )
	204	AM_RANGE(0x0000, 0x7fff) AM_ROM
	205	AM_RANGE(0x8000, 0x83ff) AM_RAM
224	206	AM_RANGE(0xa000, 0xa000) AM_READ(soundlatch_r)
225		AM_RANGE(0xb000, 0xb00d) AM_DEVREAD("konami", k007232_r)
226		AM_RANGE(0xc000, 0xc001) AM_DEVREAD("ym", ym2151_r)
227		ADDRESS_MAP_END
228
229		static ADDRESS_MAP_START( dv_sound_writemem, ADDRESS_SPACE_PROGRAM, 8 )
230		AM_RANGE(0x0000, 0x7fff) AM_WRITE(SMH_ROM)
231		AM_RANGE(0x8000, 0x83ff) AM_WRITE(SMH_RAM)
232		AM_RANGE(0xb000, 0xb00d) AM_DEVWRITE("konami", k007232_w)
233		AM_RANGE(0xc000, 0xc001) AM_DEVWRITE("ym", ym2151_w)
	207	AM_RANGE(0xb000, 0xb00d) AM_DEVREADWRITE("konami", k007232_r,k007232_w)
	208	AM_RANGE(0xc000, 0xc001) AM_DEVREADWRITE("ym", ym2151_r,ym2151_w)
234	209	AM_RANGE(0xe000, 0xe000) AM_WRITE(devstor_sh_irqcontrol_w)
235	210	AM_RANGE(0xf000, 0xf000) AM_DEVWRITE("konami", dv_sh_bankswitch_w)
236	211	ADDRESS_MAP_END
237	212
238	213
239
240	214	/*****************************************************************************/
241	215
242	216	static INPUT_PORTS_START( mainevt )
r4679	r4680
423	397
424	398	/* basic machine hardware */
425	399	MDRV_CPU_ADD("maincpu", HD6309, 3000000*4)   /* ?? */
426		MDRV_CPU_PROGRAM_MAP(readmem,writemem)
	400	MDRV_CPU_PROGRAM_MAP(mainevt_map,0)
427	401	MDRV_CPU_VBLANK_INT("screen", mainevt_interrupt)
428	402
429	403	MDRV_CPU_ADD("audiocpu", Z80, 3579545)   /* 3.579545 MHz */
430		MDRV_CPU_PROGRAM_MAP(sound_readmem,sound_writemem)
431		MDRV_CPU_VBLANK_INT_HACK(nmi_line_pulse,8)   /* ??? */
	404	MDRV_CPU_PROGRAM_MAP(mainevt_sound_map,0)
	405	MDRV_CPU_PERIODIC_INT(nmi_line_pulse,8*60)   /* ??? */
432	406
433	407	/* video hardware */
434	408	MDRV_VIDEO_ATTRIBUTES(VIDEO_HAS_SHADOWS)
r4679	r4680
462	436
463	437	/* basic machine hardware */
464	438	MDRV_CPU_ADD("maincpu", HD6309, 3000000*4)   /* ?? */
465		MDRV_CPU_PROGRAM_MAP(dv_readmem,dv_writemem)
	439	MDRV_CPU_PROGRAM_MAP(devstors_map,0)
466	440	MDRV_CPU_VBLANK_INT("screen", dv_interrupt)
467	441
468	442	MDRV_CPU_ADD("audiocpu", Z80, 3579545)   /* 3.579545 MHz */
469		MDRV_CPU_PROGRAM_MAP(dv_sound_readmem,dv_sound_writemem)
470		MDRV_CPU_VBLANK_INT_HACK(irq0_line_hold,4)
	443	MDRV_CPU_PROGRAM_MAP(devstors_sound_map,0)
	444	MDRV_CPU_PERIODIC_INT(irq0_line_hold,4*60) /* ??? */
471	445
472	446	/* video hardware */
473	447	MDRV_VIDEO_ATTRIBUTES(VIDEO_HAS_SHADOWS)

src/mame/drivers/m62.c

r4679	r4680
170	170	}
171	171
172	172
173		static ADDRESS_MAP_START( kungfum_readmem, ADDRESS_SPACE_PROGRAM, 8 )
174		AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM)
175		AM_RANGE(0xd000, 0xefff) AM_READ(SMH_RAM)
176		ADDRESS_MAP_END
177
178		static ADDRESS_MAP_START( kungfum_writemem, ADDRESS_SPACE_PROGRAM, 8 )
179		AM_RANGE(0x0000, 0x7fff) AM_WRITE(SMH_ROM)
	173	static ADDRESS_MAP_START( kungfum_map, ADDRESS_SPACE_PROGRAM, 8 )
	174	AM_RANGE(0x0000, 0x7fff) AM_ROM
180	175	AM_RANGE(0xa000, 0xa000) AM_WRITE(m62_hscroll_low_w)
181	176	AM_RANGE(0xb000, 0xb000) AM_WRITE(m62_hscroll_high_w)
182		AM_RANGE(0xc000, 0xc0ff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
	177	AM_RANGE(0xc000, 0xc0ff) AM_WRITEONLY AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
183	178	/* Kung Fu Master is the only game in this driver to have separated (but */
184	179	/* contiguous) videoram and colorram. They are interleaved in all the others. */
185		AM_RANGE(0xd000, 0xdfff) AM_WRITE(kungfum_tileram_w) AM_BASE(&m62_tileram)
186		AM_RANGE(0xe000, 0xefff) AM_WRITE(SMH_RAM)
	180	AM_RANGE(0xd000, 0xdfff) AM_RAM_WRITE(kungfum_tileram_w) AM_BASE(&m62_tileram)
	181	AM_RANGE(0xe000, 0xefff) AM_RAM
187	182	ADDRESS_MAP_END
188	183
189		static ADDRESS_MAP_START( kungfum_readport, ADDRESS_SPACE_IO, 8 )
	184	static ADDRESS_MAP_START( kungfum_io_map, ADDRESS_SPACE_IO, 8 )
190	185	ADDRESS_MAP_GLOBAL_MASK(0xff)
191		AM_RANGE(0x00, 0x00) AM_READ_PORT("SYSTEM")
192		AM_RANGE(0x01, 0x01) AM_READ_PORT("P1")
	186	AM_RANGE(0x00, 0x00) AM_READ_PORT("SYSTEM") AM_WRITE(irem_sound_cmd_w)
	187	AM_RANGE(0x01, 0x01) AM_READ_PORT("P1") AM_WRITE(m62_flipscreen_w)   /* + coin counters */
193	188	AM_RANGE(0x02, 0x02) AM_READ_PORT("P2")
194	189	AM_RANGE(0x03, 0x03) AM_READ_PORT("DSW1")
195	190	AM_RANGE(0x04, 0x04) AM_READ_PORT("DSW2")
196	191	ADDRESS_MAP_END
197	192
198		static ADDRESS_MAP_START( kungfum_writeport, ADDRESS_SPACE_IO, 8 )
199		ADDRESS_MAP_GLOBAL_MASK(0xff)
200		AM_RANGE(0x00, 0x00) AM_WRITE(irem_sound_cmd_w)
201		AM_RANGE(0x01, 0x01) AM_WRITE(m62_flipscreen_w)   /* + coin counters */
	193	static ADDRESS_MAP_START( battroad_map, ADDRESS_SPACE_PROGRAM, 8 )
	194	AM_RANGE(0x0000, 0x7fff) AM_ROM
	195	AM_RANGE(0xa000, 0xbfff) AM_ROMBANK(1)
	196	AM_RANGE(0xc000, 0xc0ff) AM_WRITEONLY AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
	197	AM_RANGE(0xc800, 0xcfff) AM_RAM_WRITE(m62_textram_w) AM_BASE(&m62_textram)
	198	AM_RANGE(0xd000, 0xdfff) AM_RAM_WRITE(m62_tileram_w) AM_BASE(&m62_tileram)
	199	AM_RANGE(0xe000, 0xefff) AM_RAM
202	200	ADDRESS_MAP_END
203	201
204
205		static ADDRESS_MAP_START( battroad_readmem, ADDRESS_SPACE_PROGRAM, 8 )
206		AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM)
207		AM_RANGE(0xa000, 0xbfff) AM_READ(SMH_BANK1)
208		AM_RANGE(0xc800, 0xefff) AM_READ(SMH_RAM)
209		ADDRESS_MAP_END
210
211		static ADDRESS_MAP_START( battroad_writemem, ADDRESS_SPACE_PROGRAM, 8 )
212		AM_RANGE(0x0000, 0xbfff) AM_WRITE(SMH_ROM)
213		AM_RANGE(0xc000, 0xc0ff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
214		AM_RANGE(0xc800, 0xcfff) AM_WRITE(m62_textram_w) AM_BASE(&m62_textram)
215		AM_RANGE(0xd000, 0xdfff) AM_WRITE(m62_tileram_w) AM_BASE(&m62_tileram)
216		AM_RANGE(0xe000, 0xefff) AM_WRITE(SMH_RAM)
217		ADDRESS_MAP_END
218
219		static ADDRESS_MAP_START( battroad_writeport, ADDRESS_SPACE_IO, 8 )
	202	static ADDRESS_MAP_START( battroad_io_map, ADDRESS_SPACE_IO, 8 )
220	203	ADDRESS_MAP_GLOBAL_MASK(0xff)
221		AM_RANGE(0x00, 0x00) AM_WRITE(irem_sound_cmd_w)
222		AM_RANGE(0x01, 0x01) AM_WRITE(m62_flipscreen_w)   /* + coin counters */
	204	AM_RANGE(0x00, 0x00) AM_READ_PORT("SYSTEM") AM_WRITE(irem_sound_cmd_w)
	205	AM_RANGE(0x01, 0x01) AM_READ_PORT("P1") AM_WRITE(m62_flipscreen_w)   /* + coin counters */
	206	AM_RANGE(0x02, 0x02) AM_READ_PORT("P2")
	207	AM_RANGE(0x03, 0x03) AM_READ_PORT("DSW1")
	208	AM_RANGE(0x04, 0x04) AM_READ_PORT("DSW2")
223	209	AM_RANGE(0x80, 0x80) AM_WRITE(m62_vscroll_low_w)
224	210	AM_RANGE(0x81, 0x81) AM_WRITE(m62_hscroll_high_w)
225	211	AM_RANGE(0x82, 0x82) AM_WRITE(m62_hscroll_low_w)
226	212	AM_RANGE(0x83, 0x83) AM_WRITE(battroad_bankswitch_w)
227	213	ADDRESS_MAP_END
228	214
229
230		static ADDRESS_MAP_START( ldrun_readmem, ADDRESS_SPACE_PROGRAM, 8 )
231		AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM)
232		AM_RANGE(0xd000, 0xefff) AM_READ(SMH_RAM)
	215	static ADDRESS_MAP_START( ldrun_map, ADDRESS_SPACE_PROGRAM, 8 )
	216	AM_RANGE(0x0000, 0x7fff) AM_ROM
	217	AM_RANGE(0xc000, 0xc0ff) AM_WRITEONLY AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
	218	AM_RANGE(0xd000, 0xdfff) AM_RAM_WRITE(m62_tileram_w) AM_BASE(&m62_tileram)
	219	AM_RANGE(0xe000, 0xefff) AM_RAM
233	220	ADDRESS_MAP_END
234	221
235		static ADDRESS_MAP_START( ldrun_writemem, ADDRESS_SPACE_PROGRAM, 8 )
236		AM_RANGE(0x0000, 0x7fff) AM_WRITE(SMH_ROM)
237		AM_RANGE(0xc000, 0xc0ff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
238		AM_RANGE(0xd000, 0xdfff) AM_WRITE(m62_tileram_w) AM_BASE(&m62_tileram)
239		AM_RANGE(0xe000, 0xefff) AM_WRITE(SMH_RAM)
	222	static ADDRESS_MAP_START( ldrun2_map, ADDRESS_SPACE_PROGRAM, 8 )
	223	AM_RANGE(0x0000, 0x7fff) AM_ROM
	224	AM_RANGE(0x8000, 0x9fff) AM_ROMBANK(1)
	225	AM_RANGE(0xc000, 0xc0ff) AM_WRITEONLY AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
	226	AM_RANGE(0xd000, 0xdfff) AM_RAM_WRITE(m62_tileram_w) AM_BASE(&m62_tileram)
	227	AM_RANGE(0xe000, 0xefff) AM_RAM
240	228	ADDRESS_MAP_END
241	229
242
243		static ADDRESS_MAP_START( ldrun2_readmem, ADDRESS_SPACE_PROGRAM, 8 )
244		AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM)
245		AM_RANGE(0x8000, 0x9fff) AM_READ(SMH_BANK1)
246		AM_RANGE(0xd000, 0xefff) AM_READ(SMH_RAM)
247		ADDRESS_MAP_END
248
249		static ADDRESS_MAP_START( ldrun2_writemem, ADDRESS_SPACE_PROGRAM, 8 )
250		AM_RANGE(0x0000, 0x9fff) AM_WRITE(SMH_ROM)
251		AM_RANGE(0xc000, 0xc0ff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
252		AM_RANGE(0xd000, 0xdfff) AM_WRITE(m62_tileram_w) AM_BASE(&m62_tileram)
253		AM_RANGE(0xe000, 0xefff) AM_WRITE(SMH_RAM)
254		ADDRESS_MAP_END
255
256		static ADDRESS_MAP_START( ldrun2_readport, ADDRESS_SPACE_IO, 8 )
	230	static ADDRESS_MAP_START( ldrun2_io_map, ADDRESS_SPACE_IO, 8 )
257	231	ADDRESS_MAP_GLOBAL_MASK(0xff)
258		AM_RANGE(0x00, 0x00) AM_READ_PORT("SYSTEM")
259		AM_RANGE(0x01, 0x01) AM_READ_PORT("P1")
	232	AM_RANGE(0x00, 0x00) AM_READ_PORT("SYSTEM") AM_WRITE(irem_sound_cmd_w)
	233	AM_RANGE(0x01, 0x01) AM_READ_PORT("P1") AM_WRITE(m62_flipscreen_w)   /* + coin counters */
260	234	AM_RANGE(0x02, 0x02) AM_READ_PORT("P2")
261	235	AM_RANGE(0x03, 0x03) AM_READ_PORT("DSW1")
262	236	AM_RANGE(0x04, 0x04) AM_READ_PORT("DSW2")
263	237	AM_RANGE(0x80, 0x80) AM_READ(ldrun2_bankswitch_r)
264		ADDRESS_MAP_END
265
266		static ADDRESS_MAP_START( ldrun2_writeport, ADDRESS_SPACE_IO, 8 )
267		ADDRESS_MAP_GLOBAL_MASK(0xff)
268		AM_RANGE(0x00, 0x00) AM_WRITE(irem_sound_cmd_w)
269		AM_RANGE(0x01, 0x01) AM_WRITE(m62_flipscreen_w)   /* + coin counters */
270	238	AM_RANGE(0x80, 0x81) AM_WRITE(ldrun2_bankswitch_w)
271	239	ADDRESS_MAP_END
272	240
273
274		static ADDRESS_MAP_START( ldrun3_readmem, ADDRESS_SPACE_PROGRAM, 8 )
275		AM_RANGE(0x0000, 0xbfff) AM_READ(SMH_ROM)
	241	static ADDRESS_MAP_START( ldrun3_map, ADDRESS_SPACE_PROGRAM, 8 )
	242	AM_RANGE(0x0000, 0xbfff) AM_ROM
276	243	AM_RANGE(0xc800, 0xc800) AM_READ(ldrun3_prot_5_r)
277	244	AM_RANGE(0xcc00, 0xcc00) AM_READ(ldrun3_prot_7_r)
278	245	AM_RANGE(0xcfff, 0xcfff) AM_READ(ldrun3_prot_7_r)
279		AM_RANGE(0xd000, 0xefff) AM_READ(SMH_RAM)
	246	AM_RANGE(0xc000, 0xc0ff) AM_WRITEONLY AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
	247	AM_RANGE(0xd000, 0xdfff) AM_RAM_WRITE(m62_tileram_w) AM_BASE(&m62_tileram)
	248	AM_RANGE(0xd000, 0xefff) AM_RAM
280	249	ADDRESS_MAP_END
281	250
282		static ADDRESS_MAP_START( ldrun3_writemem, ADDRESS_SPACE_PROGRAM, 8 )
283		AM_RANGE(0x0000, 0xbfff) AM_WRITE(SMH_ROM)
284		AM_RANGE(0xc000, 0xc0ff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
285		AM_RANGE(0xd000, 0xdfff) AM_WRITE(m62_tileram_w) AM_BASE(&m62_tileram)
286		AM_RANGE(0xe000, 0xefff) AM_WRITE(SMH_RAM)
287		ADDRESS_MAP_END
288
289		static ADDRESS_MAP_START( ldrun3_writeport, ADDRESS_SPACE_IO, 8 )
	251	static ADDRESS_MAP_START( ldrun3_io_map, ADDRESS_SPACE_IO, 8 )
290	252	ADDRESS_MAP_GLOBAL_MASK(0xff)
291		AM_RANGE(0x00, 0x00) AM_WRITE(irem_sound_cmd_w)
292		AM_RANGE(0x01, 0x01) AM_WRITE(m62_flipscreen_w)   /* + coin counters */
	253	AM_RANGE(0x00, 0x00) AM_READ_PORT("SYSTEM") AM_WRITE(irem_sound_cmd_w)
	254	AM_RANGE(0x01, 0x01) AM_READ_PORT("P1") AM_WRITE(m62_flipscreen_w)   /* + coin counters */
	255	AM_RANGE(0x02, 0x02) AM_READ_PORT("P2")
	256	AM_RANGE(0x03, 0x03) AM_READ_PORT("DSW1")
	257	AM_RANGE(0x04, 0x04) AM_READ_PORT("DSW2")
293	258	AM_RANGE(0x80, 0x80) AM_WRITE(m62_vscroll_low_w)
294	259	AM_RANGE(0x81, 0x81) AM_WRITE(ldrun3_topbottom_mask_w)
295	260	ADDRESS_MAP_END
296	261
297
298		static ADDRESS_MAP_START( ldrun4_readmem, ADDRESS_SPACE_PROGRAM, 8 )
299		AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM)
300		AM_RANGE(0x8000, 0xbfff) AM_READ(SMH_BANK1)
301		AM_RANGE(0xd000, 0xefff) AM_READ(SMH_RAM)
302		ADDRESS_MAP_END
303
304		static ADDRESS_MAP_START( ldrun4_writemem, ADDRESS_SPACE_PROGRAM, 8 )
305		AM_RANGE(0x0000, 0xbfff) AM_WRITE(SMH_ROM)
306		AM_RANGE(0xc000, 0xc0ff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
	262	static ADDRESS_MAP_START( ldrun4_map, ADDRESS_SPACE_PROGRAM, 8 )
	263	AM_RANGE(0x0000, 0x7fff) AM_ROM
	264	AM_RANGE(0x8000, 0xbfff) AM_ROMBANK(1)
	265	AM_RANGE(0xc000, 0xc0ff) AM_WRITEONLY AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
307	266	AM_RANGE(0xc800, 0xc800) AM_WRITE(ldrun4_bankswitch_w)
308		AM_RANGE(0xd000, 0xdfff) AM_WRITE(m62_tileram_w) AM_BASE(&m62_tileram)
309		AM_RANGE(0xe000, 0xefff) AM_WRITE(SMH_RAM)
	267	AM_RANGE(0xd000, 0xdfff) AM_RAM_WRITE(m62_tileram_w) AM_BASE(&m62_tileram)
	268	AM_RANGE(0xe000, 0xefff) AM_RAM
310	269	ADDRESS_MAP_END
311	270
312		static ADDRESS_MAP_START( ldrun4_writeport, ADDRESS_SPACE_IO, 8 )
	271	static ADDRESS_MAP_START( ldrun4_io_map, ADDRESS_SPACE_IO, 8 )
313	272	ADDRESS_MAP_GLOBAL_MASK(0xff)
314		AM_RANGE(0x00, 0x00) AM_WRITE(irem_sound_cmd_w)
315		AM_RANGE(0x01, 0x01) AM_WRITE(m62_flipscreen_w)   /* + coin counters */
	273	AM_RANGE(0x00, 0x00) AM_READ_PORT("SYSTEM") AM_WRITE(irem_sound_cmd_w)
	274	AM_RANGE(0x01, 0x01) AM_READ_PORT("P1") AM_WRITE(m62_flipscreen_w)   /* + coin counters */
	275	AM_RANGE(0x02, 0x02) AM_READ_PORT("P2")
	276	AM_RANGE(0x03, 0x03) AM_READ_PORT("DSW1")
	277	AM_RANGE(0x04, 0x04) AM_READ_PORT("DSW2")
316	278	AM_RANGE(0x82, 0x82) AM_WRITE(m62_hscroll_high_w)
317	279	AM_RANGE(0x83, 0x83) AM_WRITE(m62_hscroll_low_w)
318	280	ADDRESS_MAP_END
319	281
320
321		static ADDRESS_MAP_START( lotlot_readmem, ADDRESS_SPACE_PROGRAM, 8 )
322		AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM)
323		AM_RANGE(0xa000, 0xafff) AM_READ(SMH_RAM)
324		AM_RANGE(0xd000, 0xefff) AM_READ(SMH_RAM)
	282	static ADDRESS_MAP_START( lotlot_map, ADDRESS_SPACE_PROGRAM, 8 )
	283	AM_RANGE(0x0000, 0x7fff) AM_ROM
	284	AM_RANGE(0xa000, 0xafff) AM_RAM_WRITE(m62_textram_w) AM_BASE(&m62_textram)
	285	AM_RANGE(0xc000, 0xc0ff) AM_WRITEONLY AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
	286	AM_RANGE(0xd000, 0xdfff) AM_RAM_WRITE(m62_tileram_w) AM_BASE(&m62_tileram)
	287	AM_RANGE(0xe000, 0xefff) AM_RAM
325	288	ADDRESS_MAP_END
326	289
327		static ADDRESS_MAP_START( lotlot_writemem, ADDRESS_SPACE_PROGRAM, 8 )
328		AM_RANGE(0x0000, 0x7fff) AM_WRITE(SMH_ROM)
329		AM_RANGE(0xa000, 0xafff) AM_WRITE(m62_textram_w) AM_BASE(&m62_textram)
330		AM_RANGE(0xc000, 0xc0ff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
331		AM_RANGE(0xd000, 0xdfff) AM_WRITE(m62_tileram_w) AM_BASE(&m62_tileram)
332		AM_RANGE(0xe000, 0xefff) AM_WRITE(SMH_RAM)
	290	static ADDRESS_MAP_START( kidniki_map, ADDRESS_SPACE_PROGRAM, 8 )
	291	AM_RANGE(0x0000, 0x7fff) AM_ROM
	292	AM_RANGE(0x8000, 0x9fff) AM_ROMBANK(1)
	293	AM_RANGE(0xa000, 0xafff) AM_RAM_WRITE(m62_tileram_w) AM_BASE(&m62_tileram)
	294	AM_RANGE(0xc000, 0xc0ff) AM_WRITEONLY AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
	295	AM_RANGE(0xd000, 0xdfff) AM_RAM_WRITE(m62_textram_w) AM_BASE(&m62_textram)
	296	AM_RANGE(0xe000, 0xefff) AM_RAM
333	297	ADDRESS_MAP_END
334	298
335
336		static ADDRESS_MAP_START( kidniki_readmem, ADDRESS_SPACE_PROGRAM, 8 )
337		AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM)
338		AM_RANGE(0x8000, 0x9fff) AM_READ(SMH_BANK1)
339		AM_RANGE(0xa000, 0xafff) AM_READ(SMH_RAM)
340		AM_RANGE(0xd000, 0xefff) AM_READ(SMH_RAM)
341		ADDRESS_MAP_END
342
343		static ADDRESS_MAP_START( kidniki_writemem, ADDRESS_SPACE_PROGRAM, 8 )
344		AM_RANGE(0x0000, 0x9fff) AM_WRITE(SMH_ROM)
345		AM_RANGE(0xa000, 0xafff) AM_WRITE(m62_tileram_w) AM_BASE(&m62_tileram)
346		AM_RANGE(0xc000, 0xc0ff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
347		AM_RANGE(0xd000, 0xdfff) AM_WRITE(m62_textram_w) AM_BASE(&m62_textram)
348		AM_RANGE(0xe000, 0xefff) AM_WRITE(SMH_RAM)
349		ADDRESS_MAP_END
350
351		static ADDRESS_MAP_START( kidniki_writeport, ADDRESS_SPACE_IO, 8 )
	299	static ADDRESS_MAP_START( kidniki_io_map, ADDRESS_SPACE_IO, 8 )
352	300	ADDRESS_MAP_GLOBAL_MASK(0xff)
353		AM_RANGE(0x00, 0x00) AM_WRITE(irem_sound_cmd_w)
354		AM_RANGE(0x01, 0x01) AM_WRITE(m62_flipscreen_w)   /* + coin counters */
	301	AM_RANGE(0x00, 0x00) AM_READ_PORT("SYSTEM") AM_WRITE(irem_sound_cmd_w)
	302	AM_RANGE(0x01, 0x01) AM_READ_PORT("P1") AM_WRITE(m62_flipscreen_w)   /* + coin counters */
	303	AM_RANGE(0x02, 0x02) AM_READ_PORT("P2")
	304	AM_RANGE(0x03, 0x03) AM_READ_PORT("DSW1")
	305	AM_RANGE(0x04, 0x04) AM_READ_PORT("DSW2")
355	306	AM_RANGE(0x80, 0x80) AM_WRITE(m62_hscroll_low_w)
356	307	AM_RANGE(0x81, 0x81) AM_WRITE(m62_hscroll_high_w)
357	308	AM_RANGE(0x82, 0x82) AM_WRITE(kidniki_text_vscroll_low_w)
r4679	r4680
360	311	AM_RANGE(0x85, 0x85) AM_WRITE(kidniki_bankswitch_w)
361	312	ADDRESS_MAP_END
362	313
363
364		static ADDRESS_MAP_START( spelunkr_readmem, ADDRESS_SPACE_PROGRAM, 8 )
365		AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM)
366		AM_RANGE(0x8000, 0x9fff) AM_READ(SMH_BANK1)
367		AM_RANGE(0xa000, 0xbfff) AM_READ(SMH_RAM)
368		AM_RANGE(0xc800, 0xcfff) AM_READ(SMH_RAM)
369		AM_RANGE(0xe000, 0xefff) AM_READ(SMH_RAM)
370		ADDRESS_MAP_END
371
372		static ADDRESS_MAP_START( spelunkr_writemem, ADDRESS_SPACE_PROGRAM, 8 )
373		AM_RANGE(0x0000, 0x9fff) AM_WRITE(SMH_ROM)
374		AM_RANGE(0xa000, 0xbfff) AM_WRITE(m62_tileram_w) AM_BASE(&m62_tileram)
375		AM_RANGE(0xc000, 0xc0ff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
376		AM_RANGE(0xc800, 0xcfff) AM_WRITE(m62_textram_w) AM_BASE(&m62_textram)
	314	static ADDRESS_MAP_START( spelunkr_map, ADDRESS_SPACE_PROGRAM, 8 )
	315	AM_RANGE(0x0000, 0x7fff) AM_ROM
	316	AM_RANGE(0x8000, 0x9fff) AM_ROMBANK(1)
	317	AM_RANGE(0xa000, 0xbfff) AM_RAM_WRITE(m62_tileram_w) AM_BASE(&m62_tileram)
	318	AM_RANGE(0xc000, 0xc0ff) AM_WRITEONLY AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
	319	AM_RANGE(0xc800, 0xcfff) AM_RAM_WRITE(m62_textram_w) AM_BASE(&m62_textram)
377	320	AM_RANGE(0xd000, 0xd000) AM_WRITE(m62_vscroll_low_w)
378	321	AM_RANGE(0xd001, 0xd001) AM_WRITE(m62_vscroll_high_w)
379	322	AM_RANGE(0xd002, 0xd002) AM_WRITE(m62_hscroll_low_w)
380	323	AM_RANGE(0xd003, 0xd003) AM_WRITE(m62_hscroll_high_w)
381	324	AM_RANGE(0xd004, 0xd004) AM_WRITE(spelunkr_bankswitch_w)
382	325	AM_RANGE(0xd005, 0xd005) AM_WRITE(spelunkr_palbank_w)
383		AM_RANGE(0xe000, 0xefff) AM_WRITE(SMH_RAM)
	326	AM_RANGE(0xe000, 0xefff) AM_RAM
384	327	ADDRESS_MAP_END
385	328
386
387		static ADDRESS_MAP_START( spelunk2_readmem, ADDRESS_SPACE_PROGRAM, 8 )
388		AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM)
389		AM_RANGE(0x8000, 0x8fff) AM_READ(SMH_BANK1)
390		AM_RANGE(0x9000, 0x9fff) AM_READ(SMH_BANK2)
391		AM_RANGE(0xa000, 0xbfff) AM_READ(SMH_RAM)
392		AM_RANGE(0xc800, 0xcfff) AM_READ(SMH_RAM)
393		AM_RANGE(0xe000, 0xefff) AM_READ(SMH_RAM)
394		ADDRESS_MAP_END
395
396		static ADDRESS_MAP_START( spelunk2_writemem, ADDRESS_SPACE_PROGRAM, 8 )
397		AM_RANGE(0x0000, 0x9fff) AM_WRITE(SMH_ROM)
398		AM_RANGE(0xa000, 0xbfff) AM_WRITE(m62_tileram_w) AM_BASE(&m62_tileram)
399		AM_RANGE(0xc000, 0xc0ff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
400		AM_RANGE(0xc800, 0xcfff) AM_WRITE(m62_textram_w) AM_BASE(&m62_textram)
	329	static ADDRESS_MAP_START( spelunk2_map, ADDRESS_SPACE_PROGRAM, 8 )
	330	AM_RANGE(0x0000, 0x7fff) AM_ROM
	331	AM_RANGE(0x8000, 0x8fff) AM_ROMBANK(1)
	332	AM_RANGE(0x9000, 0x9fff) AM_ROMBANK(2)
	333	AM_RANGE(0xa000, 0xbfff) AM_RAM_WRITE(m62_tileram_w) AM_BASE(&m62_tileram)
	334	AM_RANGE(0xc000, 0xc0ff) AM_WRITEONLY AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
	335	AM_RANGE(0xc800, 0xcfff) AM_RAM_WRITE(m62_textram_w) AM_BASE(&m62_textram)
401	336	AM_RANGE(0xd000, 0xd000) AM_WRITE(m62_vscroll_low_w)
402	337	AM_RANGE(0xd001, 0xd001) AM_WRITE(m62_hscroll_low_w)
403	338	AM_RANGE(0xd002, 0xd002) AM_WRITE(spelunk2_gfxport_w)
404	339	AM_RANGE(0xd003, 0xd003) AM_WRITE(spelunk2_bankswitch_w)
405		AM_RANGE(0xe000, 0xefff) AM_WRITE(SMH_RAM)
	340	AM_RANGE(0xe000, 0xefff) AM_RAM
406	341	ADDRESS_MAP_END
407	342
408
409		static ADDRESS_MAP_START( youjyudn_readmem, ADDRESS_SPACE_PROGRAM, 8 )
410		AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM)
411		AM_RANGE(0x8000, 0xbfff) AM_READ(SMH_BANK1)
412		AM_RANGE(0xc800, 0xcfff) AM_READ(SMH_RAM)
413		AM_RANGE(0xd000, 0xd7ff) AM_READ(SMH_RAM)
414		AM_RANGE(0xe000, 0xefff) AM_READ(SMH_RAM)
	343	static ADDRESS_MAP_START( youjyudn_map, ADDRESS_SPACE_PROGRAM, 8 )
	344	AM_RANGE(0x0000, 0x7fff) AM_ROM
	345	AM_RANGE(0x8000, 0xbfff) AM_ROMBANK(1)
	346	AM_RANGE(0xc000, 0xc0ff) AM_WRITEONLY AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
	347	AM_RANGE(0xc800, 0xcfff) AM_RAM_WRITE(m62_textram_w) AM_BASE(&m62_textram)
	348	AM_RANGE(0xd000, 0xd7ff) AM_RAM_WRITE(m62_tileram_w) AM_BASE(&m62_tileram)
	349	AM_RANGE(0xe000, 0xefff) AM_RAM
415	350	ADDRESS_MAP_END
416	351
417		static ADDRESS_MAP_START( youjyudn_writemem, ADDRESS_SPACE_PROGRAM, 8 )
418		AM_RANGE(0x0000, 0xbfff) AM_WRITE(SMH_ROM)
419		AM_RANGE(0xc000, 0xc0ff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
420		AM_RANGE(0xc800, 0xcfff) AM_WRITE(m62_textram_w) AM_BASE(&m62_textram)
421		AM_RANGE(0xd000, 0xd7ff) AM_WRITE(m62_tileram_w) AM_BASE(&m62_tileram)
422		AM_RANGE(0xe000, 0xefff) AM_WRITE(SMH_RAM)
423		ADDRESS_MAP_END
424
425		static ADDRESS_MAP_START( youjyudn_writeport, ADDRESS_SPACE_IO, 8 )
	352	static ADDRESS_MAP_START( youjyudn_io_map, ADDRESS_SPACE_IO, 8 )
426	353	ADDRESS_MAP_GLOBAL_MASK(0xff)
427		AM_RANGE(0x00, 0x00) AM_WRITE(irem_sound_cmd_w)
428		AM_RANGE(0x01, 0x01) AM_WRITE(m62_flipscreen_w)   /* + coin counters */
	354	AM_RANGE(0x00, 0x00) AM_READ_PORT("SYSTEM") AM_WRITE(irem_sound_cmd_w)
	355	AM_RANGE(0x01, 0x01) AM_READ_PORT("P1") AM_WRITE(m62_flipscreen_w)   /* + coin counters */
	356	AM_RANGE(0x02, 0x02) AM_READ_PORT("P2")
	357	AM_RANGE(0x03, 0x03) AM_READ_PORT("DSW1")
	358	AM_RANGE(0x04, 0x04) AM_READ_PORT("DSW2")
429	359	AM_RANGE(0x80, 0x80) AM_WRITE(m62_hscroll_high_w)
430	360	AM_RANGE(0x81, 0x81) AM_WRITE(m62_hscroll_low_w)
431	361	AM_RANGE(0x83, 0x83) AM_WRITE(youjyudn_bankswitch_w)
432	362	ADDRESS_MAP_END
433	363
434
435		static ADDRESS_MAP_START( horizon_readmem, ADDRESS_SPACE_PROGRAM, 8 )
436		AM_RANGE(0x0000, 0xbfff) AM_READ(SMH_ROM)
437		AM_RANGE(0xc000, 0xc1ff) AM_READ(SMH_RAM)
438		AM_RANGE(0xc800, 0xc83f) AM_READ(SMH_RAM)
439		AM_RANGE(0xd000, 0xdfff) AM_READ(SMH_RAM)
440		AM_RANGE(0xe000, 0xefff) AM_READ(SMH_RAM)
	364	static ADDRESS_MAP_START( horizon_map, ADDRESS_SPACE_PROGRAM, 8 )
	365	AM_RANGE(0x0000, 0xbfff) AM_ROM
	366	AM_RANGE(0xc000, 0xc1ff) AM_RAM AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
	367	AM_RANGE(0xc800, 0xc83f) AM_RAM_WRITE(horizon_scrollram_w) AM_BASE(&horizon_scrollram)
	368	AM_RANGE(0xd000, 0xdfff) AM_RAM_WRITE(m62_tileram_w) AM_BASE(&m62_tileram)
	369	AM_RANGE(0xe000, 0xefff) AM_RAM
441	370	ADDRESS_MAP_END
442	371
443		static ADDRESS_MAP_START( horizon_writemem, ADDRESS_SPACE_PROGRAM, 8 )
444		AM_RANGE(0x0000, 0xbfff) AM_WRITE(SMH_ROM)
445		AM_RANGE(0xc000, 0xc1ff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
446		AM_RANGE(0xc800, 0xc83f) AM_WRITE(horizon_scrollram_w) AM_BASE(&horizon_scrollram)
447		AM_RANGE(0xd000, 0xdfff) AM_WRITE(m62_tileram_w) AM_BASE(&m62_tileram)
448		AM_RANGE(0xe000, 0xefff) AM_WRITE(SMH_RAM)
449		ADDRESS_MAP_END
450	372
451
452	373	static INPUT_PORTS_START( common )
453	374	PORT_START("SYSTEM")
454	375	/* Start 1 & 2 also restarts and freezes the game with stop mode on
r4679	r4680
1013	934
1014	935	/* basic machine hardware */
1015	936	MDRV_CPU_ADD("maincpu", Z80, 24000000/6)
1016		MDRV_CPU_PROGRAM_MAP(ldrun_readmem,ldrun_writemem)
1017		MDRV_CPU_IO_MAP(kungfum_readport,kungfum_writeport)
	937	MDRV_CPU_PROGRAM_MAP(ldrun_map,0)
	938	MDRV_CPU_IO_MAP(kungfum_io_map,0)
1018	939	MDRV_CPU_VBLANK_INT("screen", irq0_line_hold)
1019	940
1020	941	/* video hardware */
r4679	r4680
1042	963	/* basic machine hardware */
1043	964	MDRV_IMPORT_FROM(ldrun)
1044	965	MDRV_CPU_REPLACE("maincpu", Z80, 18432000/6)
1045		MDRV_CPU_PROGRAM_MAP(kungfum_readmem,kungfum_writemem)
1046		MDRV_CPU_IO_MAP(kungfum_readport,kungfum_writeport)
	966	MDRV_CPU_PROGRAM_MAP(kungfum_map,0)
	967	MDRV_CPU_IO_MAP(kungfum_io_map,0)
1047	968
1048	969	/* video hardware */
1049	970	MDRV_SCREEN_MODIFY("screen")
r4679	r4680
1059	980	/* basic machine hardware */
1060	981	MDRV_IMPORT_FROM(ldrun)
1061	982	MDRV_CPU_REPLACE("maincpu", Z80, 18432000/6)
1062		MDRV_CPU_PROGRAM_MAP(battroad_readmem,battroad_writemem)
1063		MDRV_CPU_IO_MAP(kungfum_readport,battroad_writeport)
	983	MDRV_CPU_PROGRAM_MAP(battroad_map,0)
	984	MDRV_CPU_IO_MAP(battroad_io_map,0)
1064	985
1065	986	/* video hardware */
1066	987	MDRV_SCREEN_MODIFY("screen")
r4679	r4680
1079	1000	/* basic machine hardware */
1080	1001	MDRV_IMPORT_FROM(ldrun)
1081	1002	MDRV_CPU_MODIFY("maincpu")
1082		MDRV_CPU_PROGRAM_MAP(ldrun2_readmem,ldrun2_writemem)
1083		MDRV_CPU_IO_MAP(ldrun2_readport,ldrun2_writeport)
	1003	MDRV_CPU_PROGRAM_MAP(ldrun2_map,0)
	1004	MDRV_CPU_IO_MAP(ldrun2_io_map,0)
1084	1005
1085	1006	MDRV_VIDEO_START(ldrun2)
1086	1007	MDRV_VIDEO_UPDATE(ldrun)
r4679	r4680
1092	1013	/* basic machine hardware */
1093	1014	MDRV_IMPORT_FROM(ldrun)
1094	1015	MDRV_CPU_MODIFY("maincpu")
1095		MDRV_CPU_PROGRAM_MAP(ldrun3_readmem,ldrun3_writemem)
1096		MDRV_CPU_IO_MAP(kungfum_readport,ldrun3_writeport)
	1016	MDRV_CPU_PROGRAM_MAP(ldrun3_map,0)
	1017	MDRV_CPU_IO_MAP(ldrun3_io_map,0)
1097	1018
1098	1019	/* video hardware */
1099	1020	MDRV_GFXDECODE(ldrun3)
r4679	r4680
1107	1028	/* basic machine hardware */
1108	1029	MDRV_IMPORT_FROM(ldrun)
1109	1030	MDRV_CPU_MODIFY("maincpu")
1110		MDRV_CPU_PROGRAM_MAP(ldrun4_readmem,ldrun4_writemem)
1111		MDRV_CPU_IO_MAP(kungfum_readport,ldrun4_writeport)
	1031	MDRV_CPU_PROGRAM_MAP(ldrun4_map,0)
	1032	MDRV_CPU_IO_MAP(ldrun4_io_map,0)
1112	1033
1113	1034	/* video hardware */
1114	1035	MDRV_GFXDECODE(ldrun3)
r4679	r4680
1122	1043	/* basic machine hardware */
1123	1044	MDRV_IMPORT_FROM(ldrun)
1124	1045	MDRV_CPU_MODIFY("maincpu")
1125		MDRV_CPU_PROGRAM_MAP(lotlot_readmem,lotlot_writemem)
	1046	MDRV_CPU_PROGRAM_MAP(lotlot_map,0)
1126	1047
1127	1048	/* video hardware */
1128	1049	MDRV_GFXDECODE(lotlot)
r4679	r4680
1139	1060	/* basic machine hardware */
1140	1061	MDRV_IMPORT_FROM(ldrun)
1141	1062	MDRV_CPU_MODIFY("maincpu")
1142		MDRV_CPU_PROGRAM_MAP(kidniki_readmem,kidniki_writemem)
1143		MDRV_CPU_IO_MAP(kungfum_readport,kidniki_writeport)
	1063	MDRV_CPU_PROGRAM_MAP(kidniki_map,0)
	1064	MDRV_CPU_IO_MAP(kidniki_io_map,0)
1144	1065
1145	1066	/* video hardware */
1146	1067	MDRV_GFXDECODE(kidniki)
r4679	r4680
1155	1076	/* basic machine hardware */
1156	1077	MDRV_IMPORT_FROM(ldrun)
1157	1078	MDRV_CPU_MODIFY("maincpu")
1158		MDRV_CPU_PROGRAM_MAP(spelunkr_readmem,spelunkr_writemem)
	1079	MDRV_CPU_PROGRAM_MAP(spelunkr_map,0)
1159	1080
1160	1081	/* video hardware */
1161	1082	MDRV_GFXDECODE(spelunkr)
r4679	r4680
1170	1091	/* basic machine hardware */
1171	1092	MDRV_IMPORT_FROM(ldrun)
1172	1093	MDRV_CPU_MODIFY("maincpu")
1173		MDRV_CPU_PROGRAM_MAP(spelunk2_readmem,spelunk2_writemem)
	1094	MDRV_CPU_PROGRAM_MAP(spelunk2_map,0)
1174	1095
1175	1096	/* video hardware */
1176	1097	MDRV_GFXDECODE(spelunk2)
r4679	r4680
1187	1108	/* basic machine hardware */
1188	1109	MDRV_IMPORT_FROM(ldrun)
1189	1110	MDRV_CPU_REPLACE("maincpu", Z80, 18432000/6)
1190		MDRV_CPU_PROGRAM_MAP(youjyudn_readmem,youjyudn_writemem)
1191		MDRV_CPU_IO_MAP(kungfum_readport,youjyudn_writeport)
	1111	MDRV_CPU_PROGRAM_MAP(youjyudn_map,0)
	1112	MDRV_CPU_IO_MAP(youjyudn_io_map,0)
1192	1113
1193	1114	/* video hardware */
1194	1115	MDRV_SCREEN_MODIFY("screen")
r4679	r4680
1205	1126	/* basic machine hardware */
1206	1127	MDRV_IMPORT_FROM(ldrun)
1207	1128	MDRV_CPU_MODIFY("maincpu")
1208		MDRV_CPU_PROGRAM_MAP(horizon_readmem,horizon_writemem)
	1129	MDRV_CPU_PROGRAM_MAP(horizon_map,0)
1209	1130
1210	1131	/* video hardware */
1211	1132	MDRV_SCREEN_MODIFY("screen")

src/mame/drivers/astrocde.c

r4679	r4680
427	427	profpac_bank = data;
428	428
429	429	/* set the main banking */
430		memory_install_read8_handler(space, 0x4000, 0xbfff, 0, 0, SMH_BANK1);
	430	memory_install_read8_handler(space, 0x4000, 0xbfff, 0, 0, (read8_space_func)SMH_BANK(1));
431	431	memory_set_bankptr(space->machine, 1, memory_region(space->machine, "user1") + 0x8000 * bank);
432	432
433	433	/* bank 0 reads video RAM in the 4000-7FFF range */
r4679	r4680
443	443	/* if the bank is in range, map the appropriate bank */
444	444	if (bank < 0x28)
445	445	{
446		memory_install_read8_handler(space, 0x4000, 0x7fff, 0, 0, SMH_BANK2);
	446	memory_install_read8_handler(space, 0x4000, 0x7fff, 0, 0, (read8_space_func)SMH_BANK(2));
447	447	memory_set_bankptr(space->machine, 2, memory_region(space->machine, "user2") + 0x4000 * bank);
448	448	}
449	449	else
450		memory_install_read8_handler(space, 0x4000, 0x7fff, 0, 0, SMH_UNMAP);
	450	memory_install_read8_handler(space, 0x4000, 0x7fff, 0, 0, (read8_space_func)SMH_UNMAP);
451	451	}
452	452	}
453	453
454	454
455	455	static STATE_POSTLOAD( profbank_banksw_restore )
456	456	{
457		const address_space *space = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_IO);
	457	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_IO);
458	458
459	459	profpac_banksw_w(space, 0, profpac_bank);
460	460	}
r4679	r4680
1676	1676	static DRIVER_INIT( seawolf2 )
1677	1677	{
1678	1678	astrocade_video_config = 0x00;
1679		memory_install_write8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_IO), 0x40, 0x40, 0, 0xff18, seawolf2_sound_1_w);
1680		memory_install_write8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_IO), 0x41, 0x41, 0, 0xff18, seawolf2_sound_2_w);
1681		memory_install_write8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_IO), 0x42, 0x43, 0, 0xff18, seawolf2_lamps_w);
	1679	memory_install_write8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_IO), 0x40, 0x40, 0, 0xff18, seawolf2_sound_1_w);
	1680	memory_install_write8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_IO), 0x41, 0x41, 0, 0xff18, seawolf2_sound_2_w);
	1681	memory_install_write8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_IO), 0x42, 0x43, 0, 0xff18, seawolf2_lamps_w);
1682	1682	}
1683	1683
1684	1684
1685	1685	static DRIVER_INIT( ebases )
1686	1686	{
1687	1687	astrocade_video_config = AC_SOUND_PRESENT;
1688		memory_install_write8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_IO), 0x20, 0x20, 0, 0xff07, ebases_coin_w);
1689		memory_install_write8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_IO), 0x28, 0x28, 0, 0xff07, ebases_trackball_select_w);
	1688	memory_install_write8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_IO), 0x20, 0x20, 0, 0xff07, ebases_coin_w);
	1689	memory_install_write8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_IO), 0x28, 0x28, 0, 0xff07, ebases_trackball_select_w);
1690	1690	}
1691	1691
1692	1692
1693	1693	static DRIVER_INIT( spacezap )
1694	1694	{
1695	1695	astrocade_video_config = AC_SOUND_PRESENT;
1696		memory_install_read8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_IO), 0x13, 0x13, 0x03ff, 0xff00, spacezap_io_r);
	1696	memory_install_read8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_IO), 0x13, 0x13, 0x03ff, 0xff00, spacezap_io_r);
1697	1697	}
1698	1698
1699	1699
1700	1700	static DRIVER_INIT( wow )
1701	1701	{
1702	1702	astrocade_video_config = AC_SOUND_PRESENT | AC_LIGHTPEN_INTS | AC_STARS;
1703		memory_install_read8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_IO), 0x15, 0x15, 0x0fff, 0xff00, wow_io_r);
1704		memory_install_read8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_IO), 0x17, 0x17, 0xffff, 0xff00, wow_speech_r);
	1703	memory_install_read8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_IO), 0x15, 0x15, 0x0fff, 0xff00, wow_io_r);
	1704	memory_install_read8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_IO), 0x17, 0x17, 0xffff, 0xff00, wow_speech_r);
1705	1705	}
1706	1706
1707	1707
1708	1708	static DRIVER_INIT( gorf )
1709	1709	{
1710	1710	astrocade_video_config = AC_SOUND_PRESENT | AC_LIGHTPEN_INTS | AC_STARS;
1711		memory_install_read8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_IO), 0x15, 0x15, 0x0fff, 0xff00, gorf_io_1_r);
1712		memory_install_read8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_IO), 0x16, 0x16, 0x0fff, 0xff00, gorf_io_2_r);
1713		memory_install_read8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_IO), 0x17, 0x17, 0xffff, 0xff00, gorf_speech_r);
	1711	memory_install_read8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_IO), 0x15, 0x15, 0x0fff, 0xff00, gorf_io_1_r);
	1712	memory_install_read8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_IO), 0x16, 0x16, 0x0fff, 0xff00, gorf_io_2_r);
	1713	memory_install_read8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_IO), 0x17, 0x17, 0xffff, 0xff00, gorf_speech_r);
1714	1714	}
1715	1715
1716	1716
1717	1717	static DRIVER_INIT( robby )
1718	1718	{
1719	1719	astrocade_video_config = AC_SOUND_PRESENT;
1720		memory_install_read8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_IO), 0x15, 0x15, 0x0fff, 0xff00, robby_io_r);
	1720	memory_install_read8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_IO), 0x15, 0x15, 0x0fff, 0xff00, robby_io_r);
1721	1721	}
1722	1722
1723	1723
1724	1724	static DRIVER_INIT( profpac )
1725	1725	{
1726		const address_space *iospace = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_IO);
	1726	const address_space *iospace = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_IO);
1727	1727
1728	1728	astrocade_video_config = AC_SOUND_PRESENT;
1729	1729	memory_install_read8_handler(iospace, 0x14, 0x14, 0x0fff, 0xff00, profpac_io_1_r);
r4679	r4680
1737	1737
1738	1738	static DRIVER_INIT( demndrgn )
1739	1739	{
1740		const address_space *iospace = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_IO);
	1740	const address_space *iospace = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_IO);
1741	1741
1742	1742	astrocade_video_config = 0x00;
1743	1743	memory_install_read8_handler(iospace, 0x14, 0x14, 0x1fff, 0xff00, demndrgn_io_r);
r4679	r4680
1753	1753
1754	1754	static DRIVER_INIT( tenpindx )
1755	1755	{
1756		const address_space *iospace = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_IO);
	1756	const address_space *iospace = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_IO);
1757	1757
1758	1758	astrocade_video_config = 0x00;
1759	1759	memory_install_read_port_handler(iospace, 0x60, 0x60, 0x0000, 0xff00, "P60");

src/mame/drivers/megazone.c

r4679	r4680
75	75
76	76	static WRITE8_HANDLER( megazone_i8039_irq_w )
77	77	{
78		cpu_set_input_line(space->machine->cpu[2], 0, ASSERT_LINE);
	78	cputag_set_input_line(space->machine, "daccpu", 0, ASSERT_LINE);
79	79	}
80	80
81	81	static WRITE8_HANDLER( i8039_irqen_and_status_w )
82	82	{
83	83	if ((data & 0x80) == 0)
84		cpu_set_input_line(space->machine->cpu[2], 0, CLEAR_LINE);
	84	cputag_set_input_line(space->machine, "daccpu", 0, CLEAR_LINE);
85	85	i8039_status = (data & 0x70) >> 4;
86	86	}
87	87
r4679	r4680
92	92
93	93
94	94
95		static ADDRESS_MAP_START( readmem, ADDRESS_SPACE_PROGRAM, 8 )
96		AM_RANGE(0x2000, 0x2fff) AM_READ(SMH_RAM)
97		AM_RANGE(0x3000, 0x33ff) AM_READ(SMH_RAM)
98		AM_RANGE(0x3800, 0x3fff) AM_RAM AM_SHARE(1)
99		AM_RANGE(0x4000, 0xffff) AM_READ(SMH_ROM)      /* 4000->5FFF is a debug rom */
100		ADDRESS_MAP_END
101
102		static ADDRESS_MAP_START( writemem, ADDRESS_SPACE_PROGRAM, 8 )
	95	static ADDRESS_MAP_START( megazone_map, ADDRESS_SPACE_PROGRAM, 8 )
103	96	AM_RANGE(0x0000, 0x0001) AM_WRITE(megazone_coin_counter_w) /* coin counter 2, coin counter 1 */
104	97	AM_RANGE(0x0005, 0x0005) AM_WRITE(megazone_flipscreen_w)
105	98	AM_RANGE(0x0007, 0x0007) AM_WRITE(interrupt_enable_w)
106	99	AM_RANGE(0x0800, 0x0800) AM_WRITE(watchdog_reset_w)
107		AM_RANGE(0x1800, 0x1800) AM_WRITE(SMH_RAM) AM_BASE(&megazone_scrollx)
108		AM_RANGE(0x1000, 0x1000) AM_WRITE(SMH_RAM) AM_BASE(&megazone_scrolly)
109		AM_RANGE(0x2000, 0x23ff) AM_WRITE(SMH_RAM) AM_BASE(&videoram) AM_SIZE(&videoram_size)
110		AM_RANGE(0x2400, 0x27ff) AM_WRITE(SMH_RAM) AM_BASE(&megazone_videoram2) AM_SIZE(&megazone_videoram2_size)
111		AM_RANGE(0x2800, 0x2bff) AM_WRITE(SMH_RAM) AM_BASE(&colorram)
112		AM_RANGE(0x2c00, 0x2fff) AM_WRITE(SMH_RAM) AM_BASE(&megazone_colorram2)
113		AM_RANGE(0x3000, 0x33ff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
114		AM_RANGE(0x4000, 0xffff) AM_WRITE(SMH_ROM)
	100	AM_RANGE(0x1000, 0x1000) AM_WRITEONLY AM_BASE(&megazone_scrolly)
	101	AM_RANGE(0x1800, 0x1800) AM_WRITEONLY AM_BASE(&megazone_scrollx)
	102	AM_RANGE(0x2000, 0x23ff) AM_RAM AM_BASE(&videoram) AM_SIZE(&videoram_size)
	103	AM_RANGE(0x2400, 0x27ff) AM_RAM AM_BASE(&megazone_videoram2) AM_SIZE(&megazone_videoram2_size)
	104	AM_RANGE(0x2800, 0x2bff) AM_RAM AM_BASE(&colorram)
	105	AM_RANGE(0x2c00, 0x2fff) AM_RAM AM_BASE(&megazone_colorram2)
	106	AM_RANGE(0x3000, 0x33ff) AM_RAM AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
	107	AM_RANGE(0x3800, 0x3fff) AM_RAM AM_SHARE(1)
	108	AM_RANGE(0x4000, 0xffff) AM_ROM      /* 4000->5FFF is a debug rom */
115	109	ADDRESS_MAP_END
116	110
117		static ADDRESS_MAP_START( sound_readmem, ADDRESS_SPACE_PROGRAM, 8 )
118		AM_RANGE(0x0000, 0x1fff) AM_READ(SMH_ROM)
119		AM_RANGE(0x6000, 0x6000) AM_READ_PORT("IN0")  /* IO Coin */
120		AM_RANGE(0x6001, 0x6001) AM_READ_PORT("IN1")  /* P1 IO */
121		AM_RANGE(0x6002, 0x6002) AM_READ_PORT("IN2")  /* P2 IO */
	111	static ADDRESS_MAP_START( megazone_sound_map, ADDRESS_SPACE_PROGRAM, 8 )
	112	AM_RANGE(0x0000, 0x1fff) AM_ROM
	113	AM_RANGE(0x2000, 0x2000) AM_WRITE(megazone_i8039_irq_w)   /* START line. Interrupts 8039 */
	114	AM_RANGE(0x4000, 0x4000) AM_WRITE(soundlatch_w)         /* CODE  line. Command Interrupts 8039 */
	115	AM_RANGE(0x6000, 0x6000) AM_READ_PORT("IN0")           /* IO Coin */
	116	AM_RANGE(0x6001, 0x6001) AM_READ_PORT("IN1")           /* P1 IO */
	117	AM_RANGE(0x6002, 0x6002) AM_READ_PORT("IN2")           /* P2 IO */
122	118	AM_RANGE(0x8000, 0x8000) AM_READ_PORT("DSW1")
123	119	AM_RANGE(0x8001, 0x8001) AM_READ_PORT("DSW2")
	120	AM_RANGE(0xa000, 0xa000) AM_WRITENOP               /* INTMAIN - Interrupts main CPU (unused) */
	121	AM_RANGE(0xc000, 0xc000) AM_WRITENOP               /* INT (Actually is NMI) enable/disable (unused)*/
	122	AM_RANGE(0xc001, 0xc001) AM_WRITE(watchdog_reset_w)
124	123	AM_RANGE(0xe000, 0xe7ff) AM_RAM AM_SHARE(1)
125	124	ADDRESS_MAP_END
126	125
127		static ADDRESS_MAP_START( sound_writemem, ADDRESS_SPACE_PROGRAM, 8 )
128		AM_RANGE(0x0000, 0x1fff) AM_WRITE(SMH_ROM)
129		AM_RANGE(0x2000, 0x2000) AM_WRITE(megazone_i8039_irq_w)   /* START line. Interrupts 8039 */
130		AM_RANGE(0x4000, 0x4000) AM_WRITE(soundlatch_w)         /* CODE  line. Command Interrupts 8039 */
131		AM_RANGE(0xa000, 0xa000) AM_WRITE(SMH_RAM)            /* INTMAIN - Interrupts main CPU (unused) */
132		AM_RANGE(0xc000, 0xc000) AM_WRITE(SMH_RAM)            /* INT (Actually is NMI) enable/disable (unused)*/
133		AM_RANGE(0xc001, 0xc001) AM_WRITE(watchdog_reset_w)
134		ADDRESS_MAP_END
135
136		static ADDRESS_MAP_START( sound_io_map, ADDRESS_SPACE_IO, 8 )
	126	static ADDRESS_MAP_START( megazone_sound_io_map, ADDRESS_SPACE_IO, 8 )
137	127	ADDRESS_MAP_GLOBAL_MASK(0xff)
138	128	AM_RANGE(0x00, 0x00) AM_DEVWRITE("ay", ay8910_address_w)
139	129	AM_RANGE(0x00, 0x02) AM_DEVREAD("ay", ay8910_r)
140	130	AM_RANGE(0x02, 0x02) AM_DEVWRITE("ay", ay8910_data_w)
141	131	ADDRESS_MAP_END
142	132
143		static ADDRESS_MAP_START( i8039_readmem, ADDRESS_SPACE_PROGRAM, 8 )
144		AM_RANGE(0x0000, 0x0fff) AM_READ(SMH_ROM)
	133	static ADDRESS_MAP_START( megazone_i8039_map, ADDRESS_SPACE_PROGRAM, 8 )
	134	AM_RANGE(0x0000, 0x0fff) AM_ROM
145	135	ADDRESS_MAP_END
146	136
147		static ADDRESS_MAP_START( i8039_writemem, ADDRESS_SPACE_PROGRAM, 8 )
148		AM_RANGE(0x0000, 0x0fff) AM_WRITE(SMH_ROM)
149		ADDRESS_MAP_END
150
151		static ADDRESS_MAP_START( i8039_io_map, ADDRESS_SPACE_IO, 8 )
	137	static ADDRESS_MAP_START( megazone_i8039_io_map, ADDRESS_SPACE_IO, 8 )
152	138	AM_RANGE(0x00, 0xff) AM_READ(soundlatch_r)
153	139	AM_RANGE(MCS48_PORT_P1, MCS48_PORT_P1) AM_DEVWRITE("dac", dac_w)
154	140	AM_RANGE(MCS48_PORT_P2, MCS48_PORT_P2) AM_WRITE(i8039_irqen_and_status_w)
r4679	r4680
256	242
257	243	/* basic machine hardware */
258	244	MDRV_CPU_ADD("maincpu", M6809, 18432000/9)        /* 2 MHz */
259		MDRV_CPU_PROGRAM_MAP(readmem,writemem)
	245	MDRV_CPU_PROGRAM_MAP(megazone_map,0)
260	246	MDRV_CPU_VBLANK_INT("screen", irq0_line_hold)
261	247
262	248	MDRV_CPU_ADD("audiocpu", Z80,18432000/6)     /* Z80 Clock is derived from the H1 signal */
263		MDRV_CPU_PROGRAM_MAP(sound_readmem,sound_writemem)
264		MDRV_CPU_IO_MAP(sound_io_map,0)
	249	MDRV_CPU_PROGRAM_MAP(megazone_sound_map,0)
	250	MDRV_CPU_IO_MAP(megazone_sound_io_map,0)
265	251	MDRV_CPU_VBLANK_INT("screen", irq0_line_hold)
266	252
267	253	MDRV_CPU_ADD("daccpu", I8039,14318000/2)   /* 1/2 14MHz crystal */
268		MDRV_CPU_PROGRAM_MAP(i8039_readmem,i8039_writemem)
269		MDRV_CPU_IO_MAP(i8039_io_map,0)
	254	MDRV_CPU_PROGRAM_MAP(megazone_i8039_map,0)
	255	MDRV_CPU_IO_MAP(megazone_i8039_io_map,0)
270	256
271	257	MDRV_QUANTUM_TIME(HZ(900))
272	258

src/mame/drivers/deco156.c

r4679	r4680
34	34	static VIDEO_START( wcvol95 )
35	35	{
36	36	/* allocate the ram as 16-bit (we do it here because the CPU is 32-bit) */
37		deco16_pf1_data = auto_malloc(0x2000);
38		deco16_pf2_data = auto_malloc(0x2000);
39		deco16_pf1_rowscroll = auto_malloc(0x800);
40		deco16_pf2_rowscroll = auto_malloc(0x800);
41		deco16_pf12_control = auto_malloc(0x10);
42		paletteram16 =  auto_malloc(0x1000);
	37	deco16_pf1_data = auto_alloc_array(machine, UINT16, 0x2000/2);
	38	deco16_pf2_data = auto_alloc_array(machine, UINT16, 0x2000/2);
	39	deco16_pf1_rowscroll = auto_alloc_array(machine, UINT16, 0x800/2);
	40	deco16_pf2_rowscroll = auto_alloc_array(machine, UINT16, 0x800/2);
	41	deco16_pf12_control = auto_alloc_array(machine, UINT16, 0x10/2);
	42	paletteram16 =  auto_alloc_array(machine, UINT16, 0x1000/2);
43	43
44	44	/* and register the allocated ram so that save states still work */
45	45	state_save_register_global_pointer(machine, deco16_pf1_data, 0x2000/2);
r4679	r4680
640	640	{
641	641	UINT8 *rom = memory_region(machine, tag);
642	642	int length = memory_region_length(machine, tag);
643		UINT8 *buf1 = malloc_or_die(length);
	643	UINT8 *buf1 = alloc_array_or_die(UINT8, length);
644	644	UINT32 x;
645	645
646	646	for (x=0;x<length;x++)

src/mame/drivers/pass.c

r4679	r4680
117	117
118	118	/* end in video */
119	119
120		static WRITE16_HANDLER ( pass_soundwrite )
121		{
122		soundlatch_w(space,0,data & 0xff);
123		}
124
125	120	/* todo: check all memory regions actually readable / read from */
126		static ADDRESS_MAP_START( pass_readmem, ADDRESS_SPACE_PROGRAM, 16 )
127		AM_RANGE(0x000000, 0x03ffff) AM_READ(SMH_ROM)
128		AM_RANGE(0x080000, 0x083fff) AM_READ(SMH_RAM)
129		AM_RANGE(0x200000, 0x200fff) AM_READ(SMH_RAM)
130		AM_RANGE(0x210000, 0x213fff) AM_READ(SMH_RAM)
131		AM_RANGE(0x220000, 0x2203ff) AM_READ(SMH_RAM)
	121	static ADDRESS_MAP_START( pass_map, ADDRESS_SPACE_PROGRAM, 16 )
	122	AM_RANGE(0x000000, 0x03ffff) AM_ROM
	123	AM_RANGE(0x080000, 0x083fff) AM_RAM
	124	AM_RANGE(0x200000, 0x200fff) AM_RAM_WRITE(pass_bg_videoram_w) AM_BASE(&pass_bg_videoram) // Background
	125	AM_RANGE(0x210000, 0x213fff) AM_RAM_WRITE(pass_fg_videoram_w) AM_BASE(&pass_fg_videoram) // Foreground
	126	AM_RANGE(0x220000, 0x2203ff) AM_RAM_WRITE(paletteram16_xRRRRRGGGGGBBBBB_word_w) AM_BASE(&paletteram16)
	127	AM_RANGE(0x230000, 0x230001) AM_WRITE(soundlatch_word_w)
132	128	AM_RANGE(0x230100, 0x230101) AM_READ_PORT("DSW")
133	129	AM_RANGE(0x230200, 0x230201) AM_READ_PORT("INPUTS")
134	130	ADDRESS_MAP_END
135	131
136		static ADDRESS_MAP_START( pass_writemem, ADDRESS_SPACE_PROGRAM, 16 )
137		AM_RANGE(0x000000, 0x03ffff) AM_WRITE(SMH_ROM)
138		AM_RANGE(0x080000, 0x083fff) AM_WRITE(SMH_RAM)
139		AM_RANGE(0x200000, 0x200fff) AM_WRITE(pass_bg_videoram_w) AM_BASE(&pass_bg_videoram) // Background
140		AM_RANGE(0x210000, 0x213fff) AM_WRITE(pass_fg_videoram_w) AM_BASE(&pass_fg_videoram) // Foreground
141		AM_RANGE(0x220000, 0x2203ff) AM_WRITE(paletteram16_xRRRRRGGGGGBBBBB_word_w) AM_BASE(&paletteram16)
142		AM_RANGE(0x230000, 0x230001) AM_WRITE(pass_soundwrite)
143		ADDRESS_MAP_END
144
145	132	/* sound cpu */
146
147		static ADDRESS_MAP_START( pass_sound_readmem, ADDRESS_SPACE_PROGRAM, 8 )
148		AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM)
149		AM_RANGE(0xf800, 0xffff) AM_READ(SMH_RAM)
	133	static ADDRESS_MAP_START( pass_sound_map, ADDRESS_SPACE_PROGRAM, 8 )
	134	AM_RANGE(0x0000, 0x7fff) AM_ROM
	135	AM_RANGE(0xf800, 0xffff) AM_RAM
150	136	ADDRESS_MAP_END
151	137
152		static ADDRESS_MAP_START( pass_sound_writemem, ADDRESS_SPACE_PROGRAM, 8 )
153		AM_RANGE(0x0000, 0x7fff) AM_WRITE(SMH_ROM)
154		AM_RANGE(0xf800, 0xffff) AM_WRITE(SMH_RAM)
155		ADDRESS_MAP_END
156
157	138	static ADDRESS_MAP_START( pass_sound_io_map, ADDRESS_SPACE_IO, 8 )
158	139	ADDRESS_MAP_GLOBAL_MASK(0xff)
159	140	AM_RANGE(0x00, 0x00) AM_READ(soundlatch_r)
r4679	r4680
260	241	GFXDECODE_END
261	242
262	243	/* todo : is this correct? */
263
264
265
266	244	static MACHINE_DRIVER_START( pass )
267	245	/* basic machine hardware */
268	246	MDRV_CPU_ADD("maincpu", M68000, 14318180/2 )
269		MDRV_CPU_PROGRAM_MAP(pass_readmem,pass_writemem)
	247	MDRV_CPU_PROGRAM_MAP(pass_map,0)
270	248	MDRV_CPU_VBLANK_INT("screen", irq1_line_hold) /* all the same */
271	249
272	250	MDRV_CPU_ADD("audiocpu", Z80, 14318180/4 )
273		MDRV_CPU_PROGRAM_MAP(pass_sound_readmem,pass_sound_writemem)
	251	MDRV_CPU_PROGRAM_MAP(pass_sound_map,0)
274	252	MDRV_CPU_IO_MAP(pass_sound_io_map,0)
275		MDRV_CPU_VBLANK_INT("screen", irq0_line_hold)
	253	MDRV_CPU_PERIODIC_INT(irq0_line_hold,60) /* probably not accurate, unknown timing and generation (ym2203 sound chip?). */
276	254
277	255	/* video hardware */
278	256	MDRV_SCREEN_ADD("screen", RASTER)

src/mame/drivers/toki.c

r4679	r4680
61	61
62	62	static WRITE16_HANDLER( tokib_soundcommand16_w )
63	63	{
64		soundlatch_w(space,0,data & 0xff);
65		cpu_set_input_line(space->machine->cpu[1], 0, HOLD_LINE);
	64	soundlatch_w(space, 0, data & 0xff);
	65	cputag_set_input_line(space->machine, "audiocpu", 0, HOLD_LINE);
66	66	}
67	67
68	68	static READ16_HANDLER( pip16_r )
r4679	r4680
75	75
76	76	static void toki_adpcm_int (const device_config *device)
77	77	{
78		static int toggle=0;
	78	static int toggle = 0;
79	79
80		msm5205_data_w (device,msm5205next);
81		msm5205next>>=4;
	80	msm5205_data_w (device, msm5205next);
	81	msm5205next >>= 4;
82	82
83	83	toggle ^= 1;
84	84	if (toggle)
85		cpu_set_input_line(device->machine->cpu[1], INPUT_LINE_NMI, PULSE_LINE);
	85	cputag_set_input_line(device->machine, "audiocpu", INPUT_LINE_NMI, PULSE_LINE);
86	86	}
87	87
88	88	static WRITE8_DEVICE_HANDLER( toki_adpcm_control_w )
r4679	r4680
148	148
149	149	static ADDRESS_MAP_START( tokib_audio_map, ADDRESS_SPACE_PROGRAM, 8 )
150	150	AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM)
151		AM_RANGE(0x8000, 0xbfff) AM_READ(SMH_BANK1)
	151	AM_RANGE(0x8000, 0xbfff) AM_READ(SMH_BANK(1))
152	152	AM_RANGE(0x0000, 0xbfff) AM_WRITE(SMH_ROM)
153	153	AM_RANGE(0xe000, 0xe000) AM_DEVWRITE("msm", toki_adpcm_control_w)   /* MSM5205 + ROM bank */
154	154	AM_RANGE(0xe400, 0xe400) AM_WRITE(toki_adpcm_data_w)
r4679	r4680
729	729	static DRIVER_INIT( toki )
730	730	{
731	731	UINT8 *ROM = memory_region(machine, "oki");
732		UINT8 *buffer = malloc_or_die(0x20000);
	732	UINT8 *buffer = alloc_array_or_die(UINT8, 0x20000);
733	733	int i;
734	734
735	735	memcpy(buffer,ROM,0x20000);
r4679	r4680
746	746
747	747	static DRIVER_INIT( tokib )
748	748	{
749		UINT8 *temp = malloc_or_die(65536 * 2);
	749	UINT8 *temp = alloc_array_or_die(UINT8, 65536 * 2);
750	750	int i, offs, len;
751	751	UINT8 *rom;
752	752
r4679	r4680
808	808	/* Decrypt data for z80 program */
809	809	{
810	810	const address_space *space = cputag_get_address_space(machine, "audiocpu", ADDRESS_SPACE_PROGRAM);
811		UINT8 *decrypt = auto_malloc(0x20000);
	811	UINT8 *decrypt = auto_alloc_array(machine, UINT8, 0x20000);
812	812	UINT8 *rom = memory_region(machine, "audiocpu");
813	813	int i;
814	814
r4679	r4680
825	825
826	826	{
827	827	UINT8 *ROM = memory_region(machine, "oki");
828		UINT8 *buffer = malloc_or_die(0x20000);
	828	UINT8 *buffer = alloc_array_or_die(UINT8, 0x20000);
829	829	int i;
830	830
831	831	memcpy(buffer,ROM,0x20000);

src/mame/drivers/dwarfd.c

r4679	r4680
784	784	//      src[i] = src[i]&0xe0;
785	785	}
786	786
787		videobuf=auto_malloc(0x8000);
788		dwarfd_ram=auto_malloc(0x1000);
	787	videobuf=auto_alloc_array(machine, UINT8, 0x8000);
	788	dwarfd_ram=auto_alloc_array(machine, UINT8, 0x1000);
789	789	memset(videobuf,0,0x8000);
790	790	memset(dwarfd_ram,0,0x1000);
791	791

src/mame/drivers/40love.c

r4679	r4680
246	246
247	247	static TIMER_CALLBACK( nmi_callback )
248	248	{
249		if (sound_nmi_enable) cpu_set_input_line(machine->cpu[1], INPUT_LINE_NMI, PULSE_LINE);
	249	if (sound_nmi_enable) cputag_set_input_line(machine, "audiocpu", INPUT_LINE_NMI, PULSE_LINE);
250	250	else pending_nmi = 1;
251	251	}
252	252
r4679	r4680
266	266	sound_nmi_enable = 1;
267	267	if (pending_nmi)
268	268	{
269		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_NMI, PULSE_LINE);
	269	cputag_set_input_line(space->machine, "audiocpu", INPUT_LINE_NMI, PULSE_LINE);
270	270	pending_nmi = 0;
271	271	}
272	272	}

src/mame/drivers/junofrst.c

r4679	r4680
141	141	if (last == 0 && data == 1)
142	142	{
143	143	/* setting bit 0 low then high triggers IRQ on the sound CPU */
144		cpu_set_input_line_and_vector(space->machine->cpu[1],0,HOLD_LINE,0xff);
	144	cputag_set_input_line_and_vector(space->machine, "audiocpu", 0, HOLD_LINE, 0xff);
145	145	}
146	146
147	147	last = data;
r4679	r4680
150	150
151	151	static WRITE8_HANDLER( junofrst_i8039_irq_w )
152	152	{
153		cpu_set_input_line(space->machine->cpu[2], 0, ASSERT_LINE);
	153	cputag_set_input_line(space->machine, "mcu", 0, ASSERT_LINE);
154	154	}
155	155
156	156
157	157	static WRITE8_HANDLER( i8039_irqen_and_status_w )
158	158	{
159	159	if ((data & 0x80) == 0)
160		cpu_set_input_line(space->machine->cpu[2], 0, CLEAR_LINE);
	160	cputag_set_input_line(space->machine, "mcu", 0, CLEAR_LINE);
161	161	i8039_status = (data & 0x70) >> 4;
162	162	}
163	163
r4679	r4680
194	194	AM_RANGE(0x8060, 0x8060) AM_WRITE(junofrst_bankselect_w)
195	195	AM_RANGE(0x8070, 0x8073) AM_WRITE(junofrst_blitter_w)
196	196	AM_RANGE(0x8100, 0x8fff) AM_RAM
197		AM_RANGE(0x9000, 0x9fff) AM_READ(SMH_BANK1)
	197	AM_RANGE(0x9000, 0x9fff) AM_READ(SMH_BANK(1))
198	198	AM_RANGE(0xa000, 0xffff) AM_ROM
199	199	ADDRESS_MAP_END
200	200

src/mame/drivers/renegade.c

r4679	r4680
139	139
140	140	static STREAM_UPDATE( renegade_adpcm_callback )
141	141	{
142		struct renegade_adpcm_state *state = param;
	142	struct renegade_adpcm_state *state = (struct renegade_adpcm_state *)param;
143	143	stream_sample_t *dest = outputs[0];
144	144
145	145	while (state->playing && samples > 0)
r4679	r4680
216	216	static WRITE8_HANDLER( sound_w )
217	217	{
218	218	soundlatch_w(space, offset, data);
219		cpu_set_input_line(space->machine->cpu[1], M6809_IRQ_LINE, HOLD_LINE);
	219	cputag_set_input_line(space->machine, "audiocpu", M6809_IRQ_LINE, HOLD_LINE);
220	220	}
221	221
222	222	/********************************************************************************************/
r4679	r4680
535	535
536	536	/********************************************************************************************/
537	537
538		static ADDRESS_MAP_START( main_readmem, ADDRESS_SPACE_PROGRAM, 8 )
539		AM_RANGE(0x0000, 0x37ff) AM_READ(SMH_RAM)
540		AM_RANGE(0x3800, 0x3800) AM_READ_PORT("IN0")      /* Player#1 controls, P1,P2 start */
541		AM_RANGE(0x3801, 0x3801) AM_READ_PORT("IN1")      /* Player#2 controls, coin triggers */
542		AM_RANGE(0x3802, 0x3802) AM_READ_PORT("DSW2")   /* DIP2  various IO ports */
543		AM_RANGE(0x3803, 0x3803) AM_READ_PORT("DSW1")   /* DIP1 */
544		AM_RANGE(0x3804, 0x3804) AM_READ(mcu_r)
545		AM_RANGE(0x3805, 0x3805) AM_READ(mcu_reset_r)
546		AM_RANGE(0x4000, 0x7fff) AM_READ(SMH_BANK1)
547		AM_RANGE(0x8000, 0xffff) AM_READ(SMH_ROM)
548		ADDRESS_MAP_END
549
550		static ADDRESS_MAP_START( main_writemem, ADDRESS_SPACE_PROGRAM, 8 )
551		AM_RANGE(0x0000, 0x17ff) AM_WRITE(SMH_RAM)
552		AM_RANGE(0x1800, 0x1fff) AM_WRITE(renegade_videoram2_w) AM_BASE(&renegade_videoram2)
553		AM_RANGE(0x2000, 0x27ff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram)
554		AM_RANGE(0x2800, 0x2fff) AM_WRITE(renegade_videoram_w) AM_BASE(&videoram)
555		AM_RANGE(0x3000, 0x30ff) AM_WRITE(paletteram_xxxxBBBBGGGGRRRR_split1_w) AM_BASE(&paletteram)
556		AM_RANGE(0x3100, 0x31ff) AM_WRITE(paletteram_xxxxBBBBGGGGRRRR_split2_w) AM_BASE(&paletteram_2)
557		AM_RANGE(0x3800, 0x3800) AM_WRITE(renegade_scroll0_w)
558		AM_RANGE(0x3801, 0x3801) AM_WRITE(renegade_scroll1_w)
559		AM_RANGE(0x3802, 0x3802) AM_WRITE(sound_w)
560		AM_RANGE(0x3803, 0x3803) AM_WRITE(renegade_flipscreen_w)
561		AM_RANGE(0x3804, 0x3804) AM_WRITE(mcu_w)
562		AM_RANGE(0x3805, 0x3805) AM_WRITE(bankswitch_w)
	538	static ADDRESS_MAP_START( renegade_map, ADDRESS_SPACE_PROGRAM, 8 )
	539	AM_RANGE(0x0000, 0x17ff) AM_RAM
	540	AM_RANGE(0x1800, 0x1fff) AM_RAM_WRITE(renegade_videoram2_w) AM_BASE(&renegade_videoram2)
	541	AM_RANGE(0x2000, 0x27ff) AM_RAM AM_BASE(&spriteram)
	542	AM_RANGE(0x2800, 0x2fff) AM_RAM_WRITE(renegade_videoram_w) AM_BASE(&videoram)
	543	AM_RANGE(0x3000, 0x30ff) AM_RAM_WRITE(paletteram_xxxxBBBBGGGGRRRR_split1_w) AM_BASE(&paletteram)
	544	AM_RANGE(0x3100, 0x31ff) AM_RAM_WRITE(paletteram_xxxxBBBBGGGGRRRR_split2_w) AM_BASE(&paletteram_2)
	545	AM_RANGE(0x3800, 0x3800) AM_READ_PORT("IN0") AM_WRITE(renegade_scroll0_w)      /* Player#1 controls, P1,P2 start */
	546	AM_RANGE(0x3801, 0x3801) AM_READ_PORT("IN1") AM_WRITE(renegade_scroll1_w)      /* Player#2 controls, coin triggers */
	547	AM_RANGE(0x3802, 0x3802) AM_READ_PORT("DSW2") AM_WRITE(sound_w)   /* DIP2  various IO ports */
	548	AM_RANGE(0x3803, 0x3803) AM_READ_PORT("DSW1") AM_WRITE(renegade_flipscreen_w)   /* DIP1 */
	549	AM_RANGE(0x3804, 0x3804) AM_READWRITE(mcu_r,mcu_w)
	550	AM_RANGE(0x3805, 0x3805) AM_READWRITE(mcu_reset_r,bankswitch_w)
563	551	AM_RANGE(0x3806, 0x3806) AM_WRITENOP // ?? watchdog
564	552	AM_RANGE(0x3807, 0x3807) AM_WRITE(renegade_coin_counter_w)
565		AM_RANGE(0x4000, 0x7fff) AM_WRITE(SMH_ROM)
566		AM_RANGE(0x8000, 0xffff) AM_WRITE(SMH_ROM)
	553	AM_RANGE(0x4000, 0x7fff) AM_ROMBANK(1)
	554	AM_RANGE(0x8000, 0xffff) AM_ROM
567	555	ADDRESS_MAP_END
568	556
569		static ADDRESS_MAP_START( sound_readmem, ADDRESS_SPACE_PROGRAM, 8 )
570		AM_RANGE(0x0000, 0x0fff) AM_READ(SMH_RAM)
	557	static ADDRESS_MAP_START( renegade_sound_map, ADDRESS_SPACE_PROGRAM, 8 )
	558	AM_RANGE(0x0000, 0x0fff) AM_RAM
571	559	AM_RANGE(0x1000, 0x1000) AM_READ(soundlatch_r)
572		AM_RANGE(0x2800, 0x2801) AM_DEVREAD("ym", ym3526_r)
573		AM_RANGE(0x8000, 0xffff) AM_READ(SMH_ROM)
574		ADDRESS_MAP_END
575
576		static ADDRESS_MAP_START( sound_writemem, ADDRESS_SPACE_PROGRAM, 8 )
577		AM_RANGE(0x0000, 0x0fff) AM_WRITE(SMH_RAM)
578	560	AM_RANGE(0x1800, 0x1800) AM_WRITENOP // this gets written the same values as 0x2000
579	561	AM_RANGE(0x2000, 0x2000) AM_WRITE(adpcm_play_w)
580		AM_RANGE(0x2800, 0x2801) AM_DEVWRITE("ym", ym3526_w)
	562	AM_RANGE(0x2800, 0x2801) AM_DEVREADWRITE("ym", ym3526_r,ym3526_w)
581	563	AM_RANGE(0x3000, 0x3000) AM_WRITENOP /* adpcm related? stereo pan? */
582		AM_RANGE(0x8000, 0xffff) AM_WRITE(SMH_ROM)
	564	AM_RANGE(0x8000, 0xffff) AM_ROM
583	565	ADDRESS_MAP_END
584	566
585	567
r4679	r4680
779	761	/* handler called by the 3526 emulator when the internal timers cause an IRQ */
780	762	static void irqhandler(const device_config *device, int linestate)
781	763	{
782		cpu_set_input_line(device->machine->cpu[1], M6809_FIRQ_LINE, linestate);
	764	cputag_set_input_line(device->machine, "audiocpu", M6809_FIRQ_LINE, linestate);
783	765	}
784	766
785	767	static const ym3526_interface ym3526_config =
r4679	r4680
799	781
800	782	/* basic machine hardware */
801	783	MDRV_CPU_ADD("maincpu", M6502, 12000000/8)   /* 1.5 MHz (measured) */
802		MDRV_CPU_PROGRAM_MAP(main_readmem,main_writemem)
	784	MDRV_CPU_PROGRAM_MAP(renegade_map,0)
803	785	MDRV_CPU_VBLANK_INT_HACK(renegade_interrupt,2)
804	786
805	787	MDRV_CPU_ADD("audiocpu", M6809, 12000000/8)
806		MDRV_CPU_PROGRAM_MAP(sound_readmem,sound_writemem)
	788	MDRV_CPU_PROGRAM_MAP(renegade_sound_map,0)
807	789	/* IRQs are caused by the main CPU */
808	790	MDRV_MACHINE_START(renegade)
809	791	MDRV_MACHINE_RESET(renegade)

src/mame/drivers/sg1000a.c

r4679	r4680
231	231
232	232	static void vdp_interrupt(running_machine *machine, int state)
233	233	{
234		cpu_set_input_line(machine->cpu[0], INPUT_LINE_IRQ0, state);
	234	cputag_set_input_line(machine, "maincpu", INPUT_LINE_IRQ0, state);
235	235	}
236	236
237	237	static const TMS9928a_interface tms9928a_interface =

src/mame/drivers/galaga.c

r4679	r4680
992	992
993	993
994	994	/* bootleg 4th CPU replacing the 5xXX chips */
995		static ADDRESS_MAP_START( readmem4_galaga, ADDRESS_SPACE_PROGRAM, 8 )
	995	static ADDRESS_MAP_START( galaga_mem4, ADDRESS_SPACE_PROGRAM, 8 )
996	996	AM_RANGE(0x0000, 0x0fff) AM_READWRITE(SMH_ROM, SMH_ROM)
997	997	AM_RANGE(0x1000, 0x107f) AM_READWRITE(SMH_RAM, SMH_RAM)
998	998	ADDRESS_MAP_END
999	999
1000		static ADDRESS_MAP_START( readmem4_battles, ADDRESS_SPACE_PROGRAM, 8 )
	1000	static ADDRESS_MAP_START( battles_mem4, ADDRESS_SPACE_PROGRAM, 8 )
1001	1001	AM_RANGE(0x0000, 0x0fff) AM_READ(SMH_ROM)
1002	1002	AM_RANGE(0x4000, 0x4003) AM_READ(battles_input_port_r)
1003	1003	AM_RANGE(0x4001, 0x4001) AM_WRITE(battles_CPU4_coin_w)
r4679	r4680
1007	1007	AM_RANGE(0x8000, 0x80ff) AM_READWRITE(SMH_RAM, SMH_RAM)
1008	1008	ADDRESS_MAP_END
1009	1009
1010		static ADDRESS_MAP_START( readmem4_dzigzag, ADDRESS_SPACE_PROGRAM, 8 )
	1010	static ADDRESS_MAP_START( dzigzag_mem4, ADDRESS_SPACE_PROGRAM, 8 )
1011	1011	AM_RANGE(0x0000, 0x0fff) AM_READWRITE(SMH_ROM, SMH_ROM)
1012	1012	AM_RANGE(0x1000, 0x107f) AM_READWRITE(SMH_RAM, SMH_RAM)
1013	1013	AM_RANGE(0x4000, 0x4007) AM_READ(SMH_RAM)   // dip switches? bits 0 & 1 used
r4679	r4680
1750	1750	MDRV_CPU_REMOVE(CPUTAG_54XX)
1751	1751
1752	1752	MDRV_CPU_ADD("sub3", Z80, MASTER_CLOCK/6)   /* 3.072 MHz */
1753		MDRV_CPU_PROGRAM_MAP(readmem4_galaga,0)
	1753	MDRV_CPU_PROGRAM_MAP(galaga_mem4,0)
1754	1754
1755	1755	/* sound hardware */
1756	1756	MDRV_SOUND_REMOVE("discrete")
r4679	r4680
1824	1824	MDRV_CPU_REMOVE(CPUTAG_54XX)
1825	1825
1826	1826	MDRV_CPU_ADD("sub3", Z80, MASTER_CLOCK/6)   /* 3.072 MHz */
1827		MDRV_CPU_PROGRAM_MAP(readmem4_battles,0)
	1827	MDRV_CPU_PROGRAM_MAP(battles_mem4,0)
1828	1828	MDRV_CPU_VBLANK_INT("screen", battles_interrupt_4)
1829	1829
1830	1830	MDRV_MACHINE_RESET(battles)
r4679	r4680
1891	1891	MDRV_IMPORT_FROM(digdug)
1892	1892
1893	1893	MDRV_CPU_ADD("sub3", Z80, MASTER_CLOCK/6)   /* 3.072 MHz */
1894		MDRV_CPU_PROGRAM_MAP(readmem4_dzigzag,0)
	1894	MDRV_CPU_PROGRAM_MAP(dzigzag_mem4,0)
1895	1895	MACHINE_DRIVER_END
1896	1896
1897	1897
r4679	r4680
2922	2922	ROM_LOAD( "xvi_1bpr.5n",  0x0100, 0x0100, CRC(77245b66) SHA1(0c4d0bee858b97632411c440bea6948a74759746) )   /* timing - not used */
2923	2923	ROM_END
2924	2924
	2925	ROM_START( sxeviousj )
	2926	ROM_REGION( 0x10000, "maincpu", 0 )   /* 64k for the first CPU */
	2927	ROM_LOAD( "3p.bin",       0x0000, 0x1000, CRC(afbc3372) SHA1(9001856aad0f31b40443f21b7a895e4101684307) )
	2928	ROM_LOAD( "3m.bin",       0x1000, 0x1000, CRC(1854a5ee) SHA1(2fb4034d9d757376df59378df539bf41d99ed43e) )
	2929	ROM_LOAD( "cpu_2m.rom",   0x2000, 0x1000, CRC(294d5404) SHA1(ecc39fb2c0065a36f20541747089b4e30dfb99b1) )
	2930	ROM_LOAD( "cpu_2l.rom",   0x3000, 0x1000, CRC(6a44bf92) SHA1(0ca726f7f9528789f2a718df55e59406a283cdfa) )
	2931
	2932	ROM_REGION( 0x10000, "sub", 0 )   /* 64k for the second CPU */
	2933	ROM_LOAD( "cpu_3f.rom",   0x0000, 0x1000, CRC(d4bd3d81) SHA1(5831bb306bd650779207936bfd00f25864733abb) )
	2934	ROM_LOAD( "cpu_3j.rom",   0x1000, 0x1000, CRC(af06be5f) SHA1(5a020822387ab8c69214db961180760fa9853e6e) )
	2935
	2936	ROM_REGION( 0x10000, "sub2", 0 )
	2937	ROM_LOAD( "xvi_7.2c",     0x0000, 0x1000, CRC(dd35cf1c) SHA1(f8d1f8e019d8198308443c2e7e815d0d04b23d14) )
	2938
	2939	XEVIOUS_CUSTOMS
	2940
	2941	ROM_REGION( 0x1000, "gfx1", ROMREGION_DISPOSE )
	2942	ROM_LOAD( "xvi_12.3b",    0x0000, 0x1000, CRC(088c8b26) SHA1(9c3b61dfca2f84673a78f7f66e363777a8f47a59) )   /* foreground characters */
	2943
	2944	ROM_REGION( 0x2000, "gfx2", ROMREGION_DISPOSE )
	2945	ROM_LOAD( "xvi_13.3c",    0x0000, 0x1000, CRC(de60ba25) SHA1(32bc09be5ff8b52ee3a26e0ac3ebc2d4107badb7) )   /* bg pattern B0 */
	2946	ROM_LOAD( "xvi_14.3d",    0x1000, 0x1000, CRC(535cdbbc) SHA1(fb9ffe5fc43e0213231267e98d605d43c15f61e8) )   /* bg pattern B1 */
	2947
	2948	ROM_REGION( 0xa000, "gfx3", ROMREGION_DISPOSE )
	2949	ROM_LOAD( "xvi_15.4m",    0x0000, 0x2000, CRC(dc2c0ecb) SHA1(19ddbd9805f77f38c9a9a1bb30dba6c720b8609f) )   /* sprite set #1, planes 0/1 */
	2950	ROM_LOAD( "xvi_17.4p",    0x2000, 0x2000, CRC(dfb587ce) SHA1(acff2bf5cde85a16cdc98a52cdea11f77fadf25a) )   /* sprite set #2, planes 0/1 */
	2951	ROM_LOAD( "xvi_16.4n",    0x4000, 0x1000, CRC(605ca889) SHA1(3bf380ef76c03822a042ecc73b5edd4543c268ce) )   /* sprite set #3, planes 0/1 */
	2952	ROM_LOAD( "xvi_18.4r",    0x5000, 0x2000, CRC(02417d19) SHA1(b5f830dd2cf25cf154308d2e640f0ecdcda5d8cd) )   /* sprite set #1, plane 2, set #2, plane 2 */
	2953	/* 0x7000-0x8fff  will be unpacked from 0x5000-0x6fff */
	2954	ROM_FILL(                 0x9000, 0x1000, 0x00 )   // empty space to decode sprite set #3 as 3 bits per pixel
	2955
	2956	ROM_REGION( 0x4000, "gfx4", 0 )   /* background tilemaps */
	2957	ROM_LOAD( "xvi_9.2a",     0x0000, 0x1000, CRC(57ed9879) SHA1(3106d1aacff06cf78371bd19967141072b32b7d7) )
	2958	ROM_LOAD( "xvi_10.2b",    0x1000, 0x2000, CRC(ae3ba9e5) SHA1(49064b25667ffcd81137cd5e800df4b78b182a46) )
	2959	ROM_LOAD( "xvi_11.2c",    0x3000, 0x1000, CRC(31e244dd) SHA1(3f7eac12863697a98e1122111801606759e44b2a) )
	2960
	2961	ROM_REGION( 0x0b00, "proms", 0 )
	2962	ROM_LOAD( "xvi_8bpr.6a",  0x0000, 0x0100, CRC(5cc2727f) SHA1(0dc1e63a47a4cb0ba75f6f1e0c15e408bb0ee2a1) ) /* palette red component */
	2963	ROM_LOAD( "xvi_9bpr.6d",  0x0100, 0x0100, CRC(5c8796cc) SHA1(63015e3c0874afc6b1ca032f1ffb8f90562c77c8) ) /* palette green component */
	2964	ROM_LOAD( "xvi10bpr.6e",  0x0200, 0x0100, CRC(3cb60975) SHA1(c94d5a5dd4d8a08d6d39c051a4a722581b903f45) ) /* palette blue component */
	2965	ROM_LOAD( "xvi_7bpr.4h",  0x0300, 0x0200, CRC(22d98032) SHA1(ec6626828c79350417d08b98e9631ad35edd4a41) ) /* bg tiles lookup table low bits */
	2966	ROM_LOAD( "xvi_6bpr.4f",  0x0500, 0x0200, CRC(3a7599f0) SHA1(a4bdf58c190ca16fc7b976c97f41087a61fdb8b8) ) /* bg tiles lookup table high bits */
	2967	ROM_LOAD( "xvi_4bpr.3l",  0x0700, 0x0200, CRC(fd8b9d91) SHA1(87ddf0b9d723aabb422d6d416aa9ec6bc246bf34) ) /* sprite lookup table low bits */
	2968	ROM_LOAD( "xvi_5bpr.3m",  0x0900, 0x0200, CRC(bf906d82) SHA1(776168a73d3b9f0ce05610acc8a623deae0a572b) ) /* sprite lookup table high bits */
	2969
	2970	ROM_REGION( 0x0200, "namco", 0 )   /* sound PROMs */
	2971	ROM_LOAD( "xvi_2bpr.7n",  0x0000, 0x0100, CRC(550f06bc) SHA1(816a0fafa0b084ac11ae1af70a5186539376fc2a) )
	2972	ROM_LOAD( "xvi_1bpr.5n",  0x0100, 0x0100, CRC(77245b66) SHA1(0c4d0bee858b97632411c440bea6948a74759746) )   /* timing - not used */
	2973	ROM_END
	2974
2925	2975	/**********************************************************************************************
2926	2976	Dig Dug & clones
2927	2977	**********************************************************************************************/
r4679	r4680
3345	3395	GAME( 1982, xeviousb, xevious, xevious, xeviousb, xevious, ROT90, "Namco (Atari license)", "Xevious (Atari set 2)", GAME_SUPPORTS_SAVE )
3346	3396	GAME( 1982, xeviousc, xevious, xevious, xeviousa, xevious, ROT90, "Namco (Atari license)", "Xevious (Atari set 3)", GAME_SUPPORTS_SAVE )
3347	3397	GAME( 1984, sxevious, xevious, xevious, sxevious, xevious, ROT90, "Namco", "Super Xevious", GAME_SUPPORTS_SAVE )
	3398	GAME( 1984, sxeviousj,xevious, xevious, sxevious, xevious, ROT90, "Namco", "Super Xevious (Japan)", GAME_SUPPORTS_SAVE )
3348	3399
3349	3400	GAME( 1982, digdug,   0,       digdug,  digdug,   0,       ROT90, "Namco", "Dig Dug (rev 2)", GAME_SUPPORTS_SAVE )
3350	3401	GAME( 1982, digdugb,  digdug,  digdug,  digdug,   0,       ROT90, "Namco", "Dig Dug (rev 1)", GAME_SUPPORTS_SAVE )

src/mame/drivers/panicr.c

r4679	r4680
439	439
440	440	static DRIVER_INIT( panicr )
441	441	{
442		UINT8 *buf = malloc_or_die(0x80000);
	442	UINT8 *buf = alloc_array_or_die(UINT8, 0x80000);
443	443	UINT8 *rom;
444	444	int size;
445	445	int i;

src/mame/drivers/istellar.c

r4679	r4680
102	102	if (z80_2_nmi_enable)
103	103	{
104	104	logerror("Executing an NMI on CPU2\n");
105		cpu_set_input_line(space->machine->cpu[2], INPUT_LINE_NMI, PULSE_LINE);      /* Maybe this is a ASSERT_LINE, CLEAR_LINE combo? */
	105	cputag_set_input_line(space->machine, "sub", INPUT_LINE_NMI, PULSE_LINE);      /* Maybe this is a ASSERT_LINE, CLEAR_LINE combo? */
106	106	z80_2_nmi_enable = 0;
107	107	}
108	108	}
r4679	r4680
316	316	cpu_set_input_line(device, 0, ASSERT_LINE);
317	317
318	318	/* Interrupt presumably comes from the LDP's status strobe */
319		cpu_set_input_line(device->machine->cpu[2], 0, ASSERT_LINE);
	319	cputag_set_input_line(device->machine, "sub", 0, ASSERT_LINE);
320	320	}
321	321
322	322

src/mame/drivers/lasso.c

r4679	r4680
39	39	static INPUT_CHANGED( coin_inserted )
40	40	{
41	41	/* coin insertion causes an NMI */
42		cpu_set_input_line(field->port->machine->cpu[0], INPUT_LINE_NMI, newval ? CLEAR_LINE : ASSERT_LINE);
	42	cputag_set_input_line(field->port->machine, "maincpu", INPUT_LINE_NMI, newval ? CLEAR_LINE : ASSERT_LINE);
43	43	}
44	44
45	45
r4679	r4680
51	51	static WRITE8_HANDLER( sound_command_w )
52	52	{
53	53	soundlatch_w(space,offset,data);
54		generic_pulse_irq_line(space->machine->cpu[1], 0);
	54	generic_pulse_irq_line(cputag_get_cpu(space->machine, "audiocpu"), 0);
55	55	}
56	56
57	57	static WRITE8_HANDLER( pinbo_sound_command_w )
58	58	{
59	59	soundlatch_w(space,offset,data);
60		cpu_set_input_line(space->machine->cpu[1], 0, HOLD_LINE);
	60	cputag_set_input_line(space->machine, "audiocpu", 0, HOLD_LINE);
61	61	}
62	62
63	63	static READ8_HANDLER( sound_status_r )

src/mame/drivers/macs.c

r4679	r4680
590	590
591	591	static DRIVER_INIT(macs)
592	592	{
593		macs_ram1=auto_malloc(0x20000);
	593	macs_ram1=auto_alloc_array(machine, UINT8, 0x20000);
594	594	st0016_game=10|0x80;
595	595	}
596	596
597	597	static DRIVER_INIT(kisekaeh)
598	598	{
599		macs_ram1=auto_malloc(0x20000);
	599	macs_ram1=auto_alloc_array(machine, UINT8, 0x20000);
600	600	st0016_game=11|0x180;
601	601	}
602	602
603	603	static DRIVER_INIT(kisekaem)
604	604	{
605		macs_ram1=auto_malloc(0x20000);
	605	macs_ram1=auto_alloc_array(machine, UINT8, 0x20000);
606	606	st0016_game=10|0x180;
607	607	}
608	608

src/mame/drivers/nbmj8688.c

r4679	r4680
279	279	nb1413m3_type = NB1413M3_BARLINE;
280	280	}
281	281
282		static ADDRESS_MAP_START( readmem_mjsikaku, ADDRESS_SPACE_PROGRAM, 8 )
283		AM_RANGE(0x0000, 0xf7ff) AM_READ(SMH_ROM)
284		AM_RANGE(0xf800, 0xffff) AM_READ(SMH_RAM)
	282	static ADDRESS_MAP_START( mjsikaku_map, ADDRESS_SPACE_PROGRAM, 8 )
	283	AM_RANGE(0x0000, 0xf7ff) AM_ROM
	284	AM_RANGE(0xf800, 0xffff) AM_RAM AM_BASE(&nb1413m3_nvram) AM_SIZE(&nb1413m3_nvram_size)
285	285	ADDRESS_MAP_END
286	286
287		static ADDRESS_MAP_START( writemem_mjsikaku, ADDRESS_SPACE_PROGRAM, 8 )
288		AM_RANGE(0x0000, 0xf7ff) AM_WRITE(SMH_ROM)
289		AM_RANGE(0xf800, 0xffff) AM_WRITE(SMH_RAM) AM_BASE(&nb1413m3_nvram) AM_SIZE(&nb1413m3_nvram_size)
	287	static ADDRESS_MAP_START( secolove_map, ADDRESS_SPACE_PROGRAM, 8 )
	288	AM_RANGE(0x0000, 0xefff) AM_ROM
	289	AM_RANGE(0xf000, 0xf7ff) AM_RAM AM_BASE(&nb1413m3_nvram) AM_SIZE(&nb1413m3_nvram_size)
290	290	ADDRESS_MAP_END
291	291
292		static ADDRESS_MAP_START( readmem_secolove, ADDRESS_SPACE_PROGRAM, 8 )
293		AM_RANGE(0x0000, 0xefff) AM_READ(SMH_ROM)
294		AM_RANGE(0xf000, 0xf7ff) AM_READ(SMH_RAM)
	292	static ADDRESS_MAP_START( ojousan_map, ADDRESS_SPACE_PROGRAM, 8 )
	293	AM_RANGE(0x0000, 0x6fff) AM_ROM
	294	AM_RANGE(0x7000, 0x7fff) AM_RAM AM_BASE(&nb1413m3_nvram) AM_SIZE(&nb1413m3_nvram_size)
	295	AM_RANGE(0x8000, 0xffff) AM_ROM
295	296	ADDRESS_MAP_END
296	297
297		static ADDRESS_MAP_START( writemem_secolove, ADDRESS_SPACE_PROGRAM, 8 )
298		AM_RANGE(0x0000, 0xefff) AM_WRITE(SMH_ROM)
299		AM_RANGE(0xf000, 0xf7ff) AM_WRITE(SMH_RAM) AM_BASE(&nb1413m3_nvram) AM_SIZE(&nb1413m3_nvram_size)
300		ADDRESS_MAP_END
301	298
302		static ADDRESS_MAP_START( readmem_ojousan, ADDRESS_SPACE_PROGRAM, 8 )
303		AM_RANGE(0x0000, 0x6fff) AM_READ(SMH_ROM)
304		AM_RANGE(0x7000, 0x7fff) AM_READ(SMH_RAM)
305		AM_RANGE(0x8000, 0xffff) AM_READ(SMH_ROM)
306		ADDRESS_MAP_END
307
308		static ADDRESS_MAP_START( writemem_ojousan, ADDRESS_SPACE_PROGRAM, 8 )
309		AM_RANGE(0x0000, 0x6fff) AM_WRITE(SMH_ROM)
310		AM_RANGE(0x7000, 0x7fff) AM_WRITE(SMH_RAM) AM_BASE(&nb1413m3_nvram) AM_SIZE(&nb1413m3_nvram_size)
311		AM_RANGE(0x8000, 0xffff) AM_WRITE(SMH_ROM)
312		ADDRESS_MAP_END
313
314
315
316	299	static READ8_HANDLER( ff_r )
317	300	{
318	301	/* possibly because of a bug, reads from port 0xd0 must return 0xff
r4679	r4680
320	303	return 0xff;
321	304	}
322	305
323		static ADDRESS_MAP_START( readport_secolove, ADDRESS_SPACE_IO, 8 )
	306	static ADDRESS_MAP_START( secolove_io_map, ADDRESS_SPACE_IO, 8 )
324	307	ADDRESS_MAP_GLOBAL_MASK(0xff)
325	308	AM_RANGE(0x00, 0x7f) AM_READ(nb1413m3_sndrom_r)
326		AM_RANGE(0x81, 0x81) AM_DEVREAD("psg", ay8910_r)
327		AM_RANGE(0x90, 0x90) AM_READ(nb1413m3_inputport0_r)
328		AM_RANGE(0xa0, 0xa0) AM_READ(nb1413m3_inputport1_r)
329		AM_RANGE(0xb0, 0xb0) AM_READ(nb1413m3_inputport2_r)
330		AM_RANGE(0xd0, 0xd0) AM_READ(ff_r)   // irq ack? watchdog?
331		//  AM_RANGE(0xf0, 0xf0) AM_READ(nb1413m3_dipsw1_r)
332		//  AM_RANGE(0xf1, 0xf1) AM_READ(nb1413m3_dipsw2_r)
333		ADDRESS_MAP_END
334
335		static ADDRESS_MAP_START( writeport_secolove, ADDRESS_SPACE_IO, 8 )
336		ADDRESS_MAP_GLOBAL_MASK(0xff)
337	309	AM_RANGE(0x00, 0x00) AM_WRITE(nb1413m3_nmi_clock_w)
	310	AM_RANGE(0x81, 0x81) AM_DEVREAD("psg", ay8910_r)
338	311	AM_RANGE(0x82, 0x83) AM_DEVWRITE("psg", ay8910_data_address_w)
	312	AM_RANGE(0x90, 0x90) AM_READ(nb1413m3_inputport0_r)
339	313	AM_RANGE(0x90, 0x97) AM_WRITE(nbmj8688_blitter_w)
340		AM_RANGE(0xa0, 0xa0) AM_WRITE(nb1413m3_inputportsel_w)
341		AM_RANGE(0xb0, 0xb0) AM_WRITE(nb1413m3_sndrombank1_w)
	314	AM_RANGE(0xa0, 0xa0) AM_READWRITE(nb1413m3_inputport1_r,nb1413m3_inputportsel_w)
	315	AM_RANGE(0xb0, 0xb0) AM_READWRITE(nb1413m3_inputport2_r,nb1413m3_sndrombank1_w)
342	316	AM_RANGE(0xc0, 0xcf) AM_WRITE(nbmj8688_clut_w)
	317	AM_RANGE(0xd0, 0xd0) AM_READ(ff_r)   // irq ack? watchdog?
343	318	AM_RANGE(0xd0, 0xd0) AM_DEVWRITE("dac", DAC_WRITE)
344	319	AM_RANGE(0xe0, 0xe0) AM_WRITE(secolove_romsel_w)
	320	//  AM_RANGE(0xf0, 0xf0) AM_READ(nb1413m3_dipsw1_r)
	321	//  AM_RANGE(0xf1, 0xf1) AM_READ(nb1413m3_dipsw2_r)
345	322	AM_RANGE(0xf0, 0xf0) AM_WRITE(mjsikaku_scrolly_w)
346	323	ADDRESS_MAP_END
347	324
r4679	r4680
351	328	coin_counter_w(0,data & 0x02);
352	329	}
353	330
354		static ADDRESS_MAP_START( readport_barline, ADDRESS_SPACE_IO, 8 )
	331	static ADDRESS_MAP_START( barline_io_map, ADDRESS_SPACE_IO, 8 )
355	332	ADDRESS_MAP_GLOBAL_MASK(0xff)
356	333	//  AM_RANGE(0x00, 0x7f) AM_READ(nb1413m3_sndrom_r)
357		AM_RANGE(0x80, 0x81) AM_DEVREAD("psg", ym3812_r)
358		AM_RANGE(0x90, 0x90) AM_READ(nb1413m3_inputport0_r)
359		AM_RANGE(0xa0, 0xa0) AM_READ(nb1413m3_inputport1_r)
360		AM_RANGE(0xb0, 0xb0) AM_READ(nb1413m3_inputport2_r)
361		AM_RANGE(0xd0, 0xd0) AM_READ(ff_r)   // irq ack? watchdog?
362		AM_RANGE(0xf0, 0xf0) AM_READ(nb1413m3_dipsw1_r)
363		AM_RANGE(0xf1, 0xf1) AM_READ(nb1413m3_dipsw2_r)
364		ADDRESS_MAP_END
365
366		static ADDRESS_MAP_START( writeport_barline, ADDRESS_SPACE_IO, 8 )
367		ADDRESS_MAP_GLOBAL_MASK(0xff)
368	334	AM_RANGE(0x00, 0x00) AM_WRITE(nb1413m3_sndrombank1_w)
369	335	AM_RANGE(0x70, 0x70) AM_WRITE(nb1413m3_nmi_clock_w)
370		AM_RANGE(0x80, 0x81) AM_DEVWRITE("psg", ym3812_w)
	336	AM_RANGE(0x80, 0x81) AM_DEVREADWRITE("psg", ym3812_r,ym3812_w)
	337	AM_RANGE(0x90, 0x90) AM_READ(nb1413m3_inputport0_r)
371	338	AM_RANGE(0x90, 0x97) AM_WRITE(nbmj8688_blitter_w)
372		AM_RANGE(0xa0, 0xa0) AM_WRITE(nb1413m3_inputportsel_w)
373		AM_RANGE(0xb0, 0xb0) AM_WRITE(barline_output_w)
	339	AM_RANGE(0xa0, 0xa0) AM_READWRITE(nb1413m3_inputport1_r,nb1413m3_inputportsel_w)
	340	AM_RANGE(0xb0, 0xb0) AM_READWRITE(nb1413m3_inputport2_r,barline_output_w)
374	341	AM_RANGE(0xc0, 0xcf) AM_WRITE(nbmj8688_clut_w)
	342	AM_RANGE(0xd0, 0xd0) AM_READ(ff_r)   // irq ack? watchdog?
375	343	//  AM_RANGE(0xd0, 0xd0) AM_DEVWRITE("dac", DAC_WRITE) //not used
376	344	AM_RANGE(0xe0, 0xe0) AM_WRITE(secolove_romsel_w)
377		AM_RANGE(0xf0, 0xf0) AM_WRITE(mjsikaku_scrolly_w)
	345	AM_RANGE(0xf0, 0xf0) AM_READ(nb1413m3_dipsw1_r) AM_WRITE(mjsikaku_scrolly_w)
	346	AM_RANGE(0xf1, 0xf1) AM_READ(nb1413m3_dipsw2_r)
378	347	ADDRESS_MAP_END
379	348
380		static ADDRESS_MAP_START( writeport_crystalg, ADDRESS_SPACE_IO, 8 )
	349	static ADDRESS_MAP_START( crystalg_io_map, ADDRESS_SPACE_IO, 8 )
381	350	ADDRESS_MAP_GLOBAL_MASK(0xff)
	351	AM_RANGE(0x00, 0x7f) AM_READ(nb1413m3_sndrom_r)
382	352	AM_RANGE(0x00, 0x00) AM_WRITE(nb1413m3_nmi_clock_w)
	353	AM_RANGE(0x81, 0x81) AM_DEVREAD("psg", ay8910_r)
383	354	AM_RANGE(0x82, 0x83) AM_DEVWRITE("psg", ay8910_data_address_w)
	355	AM_RANGE(0x90, 0x90) AM_READ(nb1413m3_inputport0_r)
384	356	AM_RANGE(0x90, 0x97) AM_WRITE(nbmj8688_blitter_w)
385		AM_RANGE(0xa0, 0xa0) AM_WRITE(nb1413m3_inputportsel_w)
386		AM_RANGE(0xb0, 0xb0) AM_WRITE(nb1413m3_sndrombank1_w)
	357	AM_RANGE(0xa0, 0xa0) AM_READWRITE(nb1413m3_inputport1_r,nb1413m3_inputportsel_w)
	358	AM_RANGE(0xb0, 0xb0) AM_READWRITE(nb1413m3_inputport2_r,nb1413m3_sndrombank1_w)
387	359	AM_RANGE(0xc0, 0xcf) AM_WRITE(nbmj8688_clut_w)
	360	AM_RANGE(0xd0, 0xd0) AM_READ(ff_r)   // irq ack? watchdog?
388	361	AM_RANGE(0xd0, 0xd0) AM_DEVWRITE("dac", DAC_WRITE)
389	362	AM_RANGE(0xe0, 0xe0) AM_WRITE(crystalg_romsel_w)
	363	//  AM_RANGE(0xf0, 0xf0) AM_READ(nb1413m3_dipsw1_r)
390	364	//  AM_RANGE(0xf0, 0xf0) AM_WRITENOP
	365	//  AM_RANGE(0xf1, 0xf1) AM_READ(nb1413m3_dipsw2_r)
391	366	ADDRESS_MAP_END
392	367
393	368
394		static ADDRESS_MAP_START( readport_otonano, ADDRESS_SPACE_IO, 8 )
	369	static ADDRESS_MAP_START( otonano_io_map, ADDRESS_SPACE_IO, 8 )
395	370	ADDRESS_MAP_GLOBAL_MASK(0xff)
396	371	AM_RANGE(0x00, 0x7f) AM_READ(nb1413m3_sndrom_r)
397		AM_RANGE(0x80, 0x81) AM_DEVREAD("psg", ym3812_r)
398		AM_RANGE(0x90, 0x90) AM_READ(nb1413m3_inputport0_r)
399		AM_RANGE(0xa0, 0xa0) AM_READ(nb1413m3_inputport1_r)
400		AM_RANGE(0xb0, 0xb0) AM_READ(nb1413m3_inputport2_r)
401		AM_RANGE(0xd0, 0xd0) AM_READ(ff_r)   // irq ack? watchdog?
402		AM_RANGE(0xf0, 0xf0) AM_READ(nb1413m3_dipsw1_r)
403		AM_RANGE(0xf1, 0xf1) AM_READ(nb1413m3_dipsw2_r)
404		ADDRESS_MAP_END
405
406		static ADDRESS_MAP_START( writeport_otonano, ADDRESS_SPACE_IO, 8 )
407		ADDRESS_MAP_GLOBAL_MASK(0xff)
408	372	AM_RANGE(0x00, 0x00) AM_WRITE(nb1413m3_nmi_clock_w)
409	373	AM_RANGE(0x20, 0x3f) AM_WRITE(nbmj8688_clut_w)
410	374	AM_RANGE(0x50, 0x50) AM_WRITE(mjsikaku_romsel_w)
411	375	AM_RANGE(0x70, 0x77) AM_WRITE(nbmj8688_blitter_w)
412		AM_RANGE(0x80, 0x81) AM_DEVWRITE("psg", ym3812_w)
413		AM_RANGE(0xa0, 0xa0) AM_WRITE(nb1413m3_inputportsel_w)
414		AM_RANGE(0xb0, 0xb0) AM_WRITE(nb1413m3_sndrombank1_w)
	376	AM_RANGE(0x80, 0x81) AM_DEVREADWRITE("psg", ym3812_r,ym3812_w)
	377	AM_RANGE(0x90, 0x90) AM_READ(nb1413m3_inputport0_r)
	378	AM_RANGE(0xa0, 0xa0) AM_READWRITE(nb1413m3_inputport1_r,nb1413m3_inputportsel_w)
	379	AM_RANGE(0xb0, 0xb0) AM_READWRITE(nb1413m3_inputport2_r,nb1413m3_sndrombank1_w)
	380	AM_RANGE(0xd0, 0xd0) AM_READ(ff_r)   // irq ack? watchdog?
415	381	AM_RANGE(0xd0, 0xd0) AM_DEVWRITE("dac", DAC_WRITE)
416	382	AM_RANGE(0xe0, 0xe0) AM_WRITE(mjsikaku_gfxflag2_w)
417		AM_RANGE(0xf0, 0xf0) AM_WRITE(mjsikaku_scrolly_w)
	383	AM_RANGE(0xf0, 0xf0) AM_READWRITE(nb1413m3_dipsw1_r,mjsikaku_scrolly_w)
	384	AM_RANGE(0xf1, 0xf1) AM_READ(nb1413m3_dipsw2_r)
418	385	ADDRESS_MAP_END
419	386
420	387
421		static ADDRESS_MAP_START( readport_kaguya, ADDRESS_SPACE_IO, 8 )
	388	static ADDRESS_MAP_START( kaguya_io_map, ADDRESS_SPACE_IO, 8 )
422	389	ADDRESS_MAP_GLOBAL_MASK(0xff)
423	390	AM_RANGE(0x00, 0x7f) AM_READ(nb1413m3_sndrom_r)
	391	AM_RANGE(0x00, 0x00) AM_WRITE(nb1413m3_nmi_clock_w)
	392	AM_RANGE(0x20, 0x3f) AM_WRITE(nbmj8688_clut_w)
	393	AM_RANGE(0x50, 0x50) AM_WRITE(mjsikaku_romsel_w)
	394	AM_RANGE(0x70, 0x77) AM_WRITE(nbmj8688_blitter_w)
424	395	AM_RANGE(0x81, 0x81) AM_DEVREAD("psg", ay8910_r)
	396	AM_RANGE(0x82, 0x83) AM_DEVWRITE("psg", ay8910_data_address_w)
425	397	AM_RANGE(0x90, 0x90) AM_READ(nb1413m3_inputport0_r)
426		AM_RANGE(0xa0, 0xa0) AM_READ(nb1413m3_inputport1_r)
427		AM_RANGE(0xb0, 0xb0) AM_READ(nb1413m3_inputport2_r)
	398	AM_RANGE(0xa0, 0xa0) AM_READWRITE(nb1413m3_inputport1_r,nb1413m3_inputportsel_w)
	399	AM_RANGE(0xb0, 0xb0) AM_READWRITE(nb1413m3_inputport2_r,nb1413m3_sndrombank1_w)
428	400	AM_RANGE(0xd0, 0xd0) AM_READ(ff_r)   // irq ack? watchdog?
429		AM_RANGE(0xf0, 0xf0) AM_READ(nb1413m3_dipsw1_r)
	401	AM_RANGE(0xd0, 0xd0) AM_DEVWRITE("dac", DAC_WRITE)
	402	AM_RANGE(0xe0, 0xe0) AM_WRITE(mjsikaku_gfxflag2_w)
	403	AM_RANGE(0xf0, 0xf0) AM_READWRITE(nb1413m3_dipsw1_r,mjsikaku_scrolly_w)
430	404	AM_RANGE(0xf1, 0xf1) AM_READ(nb1413m3_dipsw2_r)
431	405	ADDRESS_MAP_END
432	406
433		static ADDRESS_MAP_START( writeport_kaguya, ADDRESS_SPACE_IO, 8 )
	407
	408	static ADDRESS_MAP_START( iemoto_io_map, ADDRESS_SPACE_IO, 8 )
434	409	ADDRESS_MAP_GLOBAL_MASK(0xff)
	410	AM_RANGE(0x00, 0x7f) AM_READ(nb1413m3_sndrom_r)
435	411	AM_RANGE(0x00, 0x00) AM_WRITE(nb1413m3_nmi_clock_w)
	412	AM_RANGE(0x10, 0x10) AM_WRITE(nb1413m3_sndrombank2_w)
436	413	AM_RANGE(0x20, 0x3f) AM_WRITE(nbmj8688_clut_w)
437		AM_RANGE(0x50, 0x50) AM_WRITE(mjsikaku_romsel_w)
438		AM_RANGE(0x70, 0x77) AM_WRITE(nbmj8688_blitter_w)
	414	AM_RANGE(0x40, 0x47) AM_WRITE(nbmj8688_blitter_w)
	415	AM_RANGE(0x50, 0x50) AM_WRITE(seiha_romsel_w)
	416	AM_RANGE(0x81, 0x81) AM_DEVREAD("psg", ay8910_r)
439	417	AM_RANGE(0x82, 0x83) AM_DEVWRITE("psg", ay8910_data_address_w)
440		AM_RANGE(0xa0, 0xa0) AM_WRITE(nb1413m3_inputportsel_w)
441		AM_RANGE(0xb0, 0xb0) AM_WRITE(nb1413m3_sndrombank1_w)
	418	AM_RANGE(0x90, 0x90) AM_READ(nb1413m3_inputport0_r)
	419	AM_RANGE(0xa0, 0xa0) AM_READWRITE(nb1413m3_inputport1_r,nb1413m3_inputportsel_w)
	420	AM_RANGE(0xb0, 0xb0) AM_READWRITE(nb1413m3_inputport2_r,nb1413m3_sndrombank1_w)
	421	AM_RANGE(0xd0, 0xd0) AM_READ(ff_r)   // irq ack? watchdog?
442	422	AM_RANGE(0xd0, 0xd0) AM_DEVWRITE("dac", DAC_WRITE)
443	423	AM_RANGE(0xe0, 0xe0) AM_WRITE(mjsikaku_gfxflag2_w)
	424	//  AM_RANGE(0xf0, 0xf0) AM_READ(nb1413m3_dipsw1_r)
	425	//  AM_RANGE(0xf1, 0xf1) AM_READ(nb1413m3_dipsw2_r)
444	426	AM_RANGE(0xf0, 0xf0) AM_WRITE(mjsikaku_scrolly_w)
445	427	ADDRESS_MAP_END
446	428
447	429
448		static ADDRESS_MAP_START( writeport_iemoto, ADDRESS_SPACE_IO, 8 )
	430	static ADDRESS_MAP_START( seiha_io_map, ADDRESS_SPACE_IO, 8 )
449	431	ADDRESS_MAP_GLOBAL_MASK(0xff)
	432	AM_RANGE(0x00, 0x7f) AM_READ(nb1413m3_sndrom_r)
450	433	AM_RANGE(0x00, 0x00) AM_WRITE(nb1413m3_nmi_clock_w)
451		AM_RANGE(0x20, 0x3f) AM_WRITE(nbmj8688_clut_w)
452	434	AM_RANGE(0x10, 0x10) AM_WRITE(nb1413m3_sndrombank2_w)
453		AM_RANGE(0x40, 0x47) AM_WRITE(nbmj8688_blitter_w)
	435	AM_RANGE(0x20, 0x3f) AM_WRITE(nbmj8688_clut_w)
454	436	AM_RANGE(0x50, 0x50) AM_WRITE(seiha_romsel_w)
	437	AM_RANGE(0x81, 0x81) AM_DEVREAD("psg", ay8910_r)
455	438	AM_RANGE(0x82, 0x83) AM_DEVWRITE("psg", ay8910_data_address_w)
456		AM_RANGE(0xa0, 0xa0) AM_WRITE(nb1413m3_inputportsel_w)
457		AM_RANGE(0xb0, 0xb0) AM_WRITE(nb1413m3_sndrombank1_w)
	439	AM_RANGE(0x90, 0x90) AM_READ(nb1413m3_inputport0_r)
	440	AM_RANGE(0x90, 0x97) AM_WRITE(nbmj8688_blitter_w)
	441	AM_RANGE(0xa0, 0xa0) AM_READWRITE(nb1413m3_inputport1_r,nb1413m3_inputportsel_w)
	442	AM_RANGE(0xb0, 0xb0) AM_READWRITE(nb1413m3_inputport2_r,nb1413m3_sndrombank1_w)
	443	AM_RANGE(0xd0, 0xd0) AM_READ(ff_r)   // irq ack? watchdog?
458	444	AM_RANGE(0xd0, 0xd0) AM_DEVWRITE("dac", DAC_WRITE)
459	445	AM_RANGE(0xe0, 0xe0) AM_WRITE(mjsikaku_gfxflag2_w)
	446	//  AM_RANGE(0xf0, 0xf0) AM_READ(nb1413m3_dipsw1_r)
	447	//  AM_RANGE(0xf1, 0xf1) AM_READ(nb1413m3_dipsw2_r)
460	448	AM_RANGE(0xf0, 0xf0) AM_WRITE(mjsikaku_scrolly_w)
461	449	ADDRESS_MAP_END
462	450
463
464		static ADDRESS_MAP_START( writeport_seiha, ADDRESS_SPACE_IO, 8 )
	451	static ADDRESS_MAP_START( mjgaiden_io_map, ADDRESS_SPACE_IO, 8 )
465	452	ADDRESS_MAP_GLOBAL_MASK(0xff)
	453	AM_RANGE(0x00, 0x7f) AM_READ(nb1413m3_sndrom_r)
466	454	AM_RANGE(0x00, 0x00) AM_WRITE(nb1413m3_nmi_clock_w)
467		AM_RANGE(0x10, 0x10) AM_WRITE(nb1413m3_sndrombank2_w)
468	455	AM_RANGE(0x20, 0x3f) AM_WRITE(nbmj8688_clut_w)
469		AM_RANGE(0x50, 0x50) AM_WRITE(seiha_romsel_w)
	456	AM_RANGE(0x50, 0x50) AM_WRITE(mjsikaku_romsel_w)
	457	AM_RANGE(0x81, 0x81) AM_DEVREAD("psg", ay8910_r)
470	458	AM_RANGE(0x82, 0x83) AM_DEVWRITE("psg", ay8910_data_address_w)
	459	AM_RANGE(0x90, 0x90) AM_READ(nb1413m3_inputport0_r)
471	460	AM_RANGE(0x90, 0x97) AM_WRITE(nbmj8688_blitter_w)
472		AM_RANGE(0xa0, 0xa0) AM_WRITE(nb1413m3_inputportsel_w)
473		AM_RANGE(0xb0, 0xb0) AM_WRITE(nb1413m3_sndrombank1_w)
	461	AM_RANGE(0xa0, 0xa0) AM_READWRITE(nb1413m3_inputport1_r,nb1413m3_inputportsel_w)
	462	AM_RANGE(0xb0, 0xb0) AM_READWRITE(nb1413m3_inputport2_r,nb1413m3_sndrombank1_w)
	463	AM_RANGE(0xd0, 0xd0) AM_READ(ff_r)   // irq ack? watchdog?
474	464	AM_RANGE(0xd0, 0xd0) AM_DEVWRITE("dac", DAC_WRITE)
475	465	AM_RANGE(0xe0, 0xe0) AM_WRITE(mjsikaku_gfxflag2_w)
	466	//  AM_RANGE(0xf0, 0xf0) AM_READ(nb1413m3_dipsw1_r)
	467	//  AM_RANGE(0xf1, 0xf1) AM_READ(nb1413m3_dipsw2_r)
476	468	AM_RANGE(0xf0, 0xf0) AM_WRITE(mjsikaku_scrolly_w)
477	469	ADDRESS_MAP_END
478	470
479		static ADDRESS_MAP_START( writeport_mjgaiden, ADDRESS_SPACE_IO, 8 )
480		ADDRESS_MAP_GLOBAL_MASK(0xff)
481		AM_RANGE(0x00, 0x00) AM_WRITE(nb1413m3_nmi_clock_w)
482		AM_RANGE(0x20, 0x3f) AM_WRITE(nbmj8688_clut_w)
483		AM_RANGE(0x50, 0x50) AM_WRITE(mjsikaku_romsel_w)
484		AM_RANGE(0x90, 0x97) AM_WRITE(nbmj8688_blitter_w)
485		AM_RANGE(0x82, 0x83) AM_DEVWRITE("psg", ay8910_data_address_w)
486		AM_RANGE(0xa0, 0xa0) AM_WRITE(nb1413m3_inputportsel_w)
487		AM_RANGE(0xb0, 0xb0) AM_WRITE(nb1413m3_sndrombank1_w)
488		AM_RANGE(0xd0, 0xd0) AM_DEVWRITE("dac", DAC_WRITE)
489		AM_RANGE(0xe0, 0xe0) AM_WRITE(mjsikaku_gfxflag2_w)
490		AM_RANGE(0xf0, 0xf0) AM_WRITE(mjsikaku_scrolly_w)
491		ADDRESS_MAP_END
492
493		static ADDRESS_MAP_START( writeport_p16bit_LCD, ADDRESS_SPACE_IO, 8 )
	471	static ADDRESS_MAP_START( p16bit_LCD_io_map, ADDRESS_SPACE_IO, 8 )
494	472	ADDRESS_MAP_GLOBAL_MASK(0xff)
	473	AM_RANGE(0x00, 0x7f) AM_READ(nb1413m3_sndrom_r)
495	474	AM_RANGE(0x00, 0x00) AM_WRITE(nb1413m3_nmi_clock_w)
496	475	AM_RANGE(0x42, 0x42) AM_WRITE(nbmj8688_HD61830B_0_data_w)
497	476	AM_RANGE(0x43, 0x43) AM_WRITE(nbmj8688_HD61830B_0_instr_w)
r4679	r4680
499	478	AM_RANGE(0x45, 0x45) AM_WRITE(nbmj8688_HD61830B_1_instr_w)
500	479	AM_RANGE(0x46, 0x46) AM_WRITE(nbmj8688_HD61830B_both_data_w)
501	480	AM_RANGE(0x47, 0x47) AM_WRITE(nbmj8688_HD61830B_both_instr_w)
	481	AM_RANGE(0x81, 0x81) AM_DEVREAD("psg", ay8910_r)
502	482	AM_RANGE(0x82, 0x83) AM_DEVWRITE("psg", ay8910_data_address_w)
	483	AM_RANGE(0x90, 0x90) AM_READ(nb1413m3_inputport0_r)
503	484	AM_RANGE(0x90, 0x97) AM_WRITE(nbmj8688_blitter_w)
504		AM_RANGE(0xa0, 0xa0) AM_WRITE(nb1413m3_inputportsel_w)
505		AM_RANGE(0xb0, 0xb0) AM_WRITE(nb1413m3_sndrombank1_w)
	485	AM_RANGE(0xa0, 0xa0) AM_READWRITE(nb1413m3_inputport1_r,nb1413m3_inputportsel_w)
	486	AM_RANGE(0xb0, 0xb0) AM_READWRITE(nb1413m3_inputport2_r,nb1413m3_sndrombank1_w)
506	487	AM_RANGE(0xc0, 0xcf) AM_WRITE(nbmj8688_clut_w)
	488	AM_RANGE(0xd0, 0xd0) AM_READ(ff_r)   // irq ack? watchdog?
507	489	AM_RANGE(0xd0, 0xd0) AM_DEVWRITE("dac", DAC_WRITE)
508	490	AM_RANGE(0xe0, 0xe0) AM_WRITE(secolove_romsel_w)
	491	//  AM_RANGE(0xf0, 0xf0) AM_READ(nb1413m3_dipsw1_r)
	492	//  AM_RANGE(0xf1, 0xf1) AM_READ(nb1413m3_dipsw2_r)
509	493	AM_RANGE(0xf0, 0xf0) AM_WRITE(mjsikaku_scrolly_w)
510	494	ADDRESS_MAP_END
511	495
512	496
513		static ADDRESS_MAP_START( readport_mjsikaku, ADDRESS_SPACE_IO, 8 )
	497	static ADDRESS_MAP_START( mjsikaku_io_map, ADDRESS_SPACE_IO, 8 )
514	498	ADDRESS_MAP_GLOBAL_MASK(0xff)
515	499	AM_RANGE(0x00, 0x7f) AM_READ(nb1413m3_sndrom_r)
516		AM_RANGE(0x90, 0x90) AM_READ(nb1413m3_inputport0_r)
517		AM_RANGE(0xa0, 0xa0) AM_READ(nb1413m3_inputport1_r)
518		AM_RANGE(0xb0, 0xb0) AM_READ(nb1413m3_inputport2_r)
519		AM_RANGE(0xd0, 0xd0) AM_READ(ff_r)   // irq ack? watchdog?
520		AM_RANGE(0xf0, 0xf0) AM_READ(nb1413m3_dipsw1_r)
521		AM_RANGE(0xf1, 0xf1) AM_READ(nb1413m3_dipsw2_r)
522		ADDRESS_MAP_END
523
524		static ADDRESS_MAP_START( writeport_mjsikaku, ADDRESS_SPACE_IO, 8 )
525		ADDRESS_MAP_GLOBAL_MASK(0xff)
526	500	AM_RANGE(0x00, 0x00) AM_WRITE(nb1413m3_nmi_clock_w)
527	501	AM_RANGE(0x10, 0x10) AM_WRITE(nb1413m3_sndrombank2_w)
528	502	AM_RANGE(0x20, 0x3f) AM_WRITE(nbmj8688_clut_w)
529	503	AM_RANGE(0x50, 0x50) AM_WRITE(mjsikaku_romsel_w)
530	504	AM_RANGE(0x60, 0x67) AM_WRITE(nbmj8688_blitter_w)
531		AM_RANGE(0x80, 0x81) AM_DEVWRITE("psg", ym3812_w)
532		AM_RANGE(0xa0, 0xa0) AM_WRITE(nb1413m3_inputportsel_w)
533		AM_RANGE(0xb0, 0xb0) AM_WRITE(nb1413m3_sndrombank1_w)
	505	AM_RANGE(0x80, 0x81) AM_DEVREADWRITE("psg", ym3812_r, ym3812_w)
	506	AM_RANGE(0x90, 0x90) AM_READ(nb1413m3_inputport0_r)
	507	AM_RANGE(0xa0, 0xa0) AM_READWRITE(nb1413m3_inputport1_r,nb1413m3_inputportsel_w)
	508	AM_RANGE(0xb0, 0xb0) AM_READWRITE(nb1413m3_inputport2_r,nb1413m3_sndrombank1_w)
	509	AM_RANGE(0xd0, 0xd0) AM_READ(ff_r)   // irq ack? watchdog?
534	510	AM_RANGE(0xd0, 0xd0) AM_DEVWRITE("dac", DAC_WRITE)
535	511	AM_RANGE(0xe0, 0xe0) AM_WRITE(mjsikaku_gfxflag2_w)
	512	AM_RANGE(0xf0, 0xf0) AM_READ(nb1413m3_dipsw1_r)
	513	AM_RANGE(0xf1, 0xf1) AM_READ(nb1413m3_dipsw2_r)
536	514	AM_RANGE(0xf0, 0xf0) AM_WRITE(mjsikaku_scrolly_w)
537	515	ADDRESS_MAP_END
538	516
539	517
540		static ADDRESS_MAP_START( readport_mmsikaku, ADDRESS_SPACE_IO, 8 )
	518	static ADDRESS_MAP_START( mmsikaku_io_map, ADDRESS_SPACE_IO, 8 )
541	519	ADDRESS_MAP_GLOBAL_MASK(0xff)
542	520	AM_RANGE(0x00, 0x7f) AM_READ(nb1413m3_sndrom_r)
543		AM_RANGE(0x81, 0x81) AM_DEVREAD("psg", ay8910_r)
544		AM_RANGE(0x90, 0x90) AM_READ(nb1413m3_inputport0_r)
545		AM_RANGE(0xa0, 0xa0) AM_READ(nb1413m3_inputport1_r)
546		AM_RANGE(0xb0, 0xb0) AM_READ(nb1413m3_inputport2_r)
547		AM_RANGE(0xd0, 0xd0) AM_READ(ff_r)   // irq ack? watchdog?
548		//  AM_RANGE(0xf0, 0xf0) AM_READ(nb1413m3_dipsw1_r)
549		//  AM_RANGE(0xf1, 0xf1) AM_READ(nb1413m3_dipsw2_r)
550		ADDRESS_MAP_END
551
552		static ADDRESS_MAP_START( writeport_mmsikaku, ADDRESS_SPACE_IO, 8 )
553		ADDRESS_MAP_GLOBAL_MASK(0xff)
554	521	AM_RANGE(0x00, 0x00) AM_WRITE(nb1413m3_nmi_clock_w)
555	522	AM_RANGE(0x10, 0x10) AM_WRITE(nb1413m3_sndrombank2_w)
556	523	AM_RANGE(0x20, 0x3f) AM_WRITE(nbmj8688_clut_w)
557		AM_RANGE(0x50, 0x50) AM_WRITE(mjsikaku_romsel_w)
558	524	AM_RANGE(0x40, 0x47) AM_WRITE(nbmj8688_blitter_w)
	525	AM_RANGE(0x50, 0x50) AM_WRITE(mjsikaku_romsel_w)
	526	AM_RANGE(0x81, 0x81) AM_DEVREAD("psg", ay8910_r)
559	527	AM_RANGE(0x82, 0x83) AM_DEVWRITE("psg", ay8910_data_address_w)
560		AM_RANGE(0xa0, 0xa0) AM_WRITE(nb1413m3_inputportsel_w)
561		AM_RANGE(0xb0, 0xb0) AM_WRITE(nb1413m3_sndrombank1_w)
	528	AM_RANGE(0x90, 0x90) AM_READ(nb1413m3_inputport0_r)
	529	AM_RANGE(0xa0, 0xa0) AM_READWRITE(nb1413m3_inputport1_r,nb1413m3_inputportsel_w)
	530	AM_RANGE(0xb0, 0xb0) AM_READWRITE(nb1413m3_inputport2_r,nb1413m3_sndrombank1_w)
	531	AM_RANGE(0xd0, 0xd0) AM_READ(ff_r)   // irq ack? watchdog?
562	532	AM_RANGE(0xd0, 0xd0) AM_DEVWRITE("dac", DAC_WRITE)
563	533	AM_RANGE(0xe0, 0xe0) AM_WRITE(mjsikaku_gfxflag2_w)
	534	//  AM_RANGE(0xf0, 0xf0) AM_READ(nb1413m3_dipsw1_r)
	535	//  AM_RANGE(0xf1, 0xf1) AM_READ(nb1413m3_dipsw2_r)
564	536	AM_RANGE(0xf0, 0xf0) AM_WRITE(mjsikaku_scrolly_w)
565	537	ADDRESS_MAP_END
566	538
567	539
568
569	540	static INPUT_PORTS_START( mjsikaku )
570	541	PORT_START("DSWA")
571	542	PORT_DIPNAME( 0x07, 0x07, DEF_STR( Difficulty ) )
r4679	r4680
3015	2986	/* basic machine hardware */
3016	2987	MDRV_IMPORT_FROM(NBMJDRV_256)
3017	2988	MDRV_CPU_MODIFY("maincpu")
3018		MDRV_CPU_PROGRAM_MAP(readmem_secolove, writemem_secolove)
3019		MDRV_CPU_IO_MAP(readport_secolove, writeport_crystalg)
	2989	MDRV_CPU_PROGRAM_MAP(secolove_map, 0)
	2990	MDRV_CPU_IO_MAP(crystalg_io_map, 0)
3020	2991	//  MDRV_CPU_VBLANK_INT_HACK(nb1413m3_interrupt, 96) // nmiclock = 2f
3021	2992	MACHINE_DRIVER_END
3022	2993
r4679	r4680
3026	2997	/* basic machine hardware */
3027	2998	MDRV_IMPORT_FROM(NBMJDRV_256)
3028	2999	MDRV_CPU_MODIFY("maincpu")
3029		MDRV_CPU_PROGRAM_MAP(readmem_secolove, writemem_secolove)
3030		MDRV_CPU_IO_MAP(readport_secolove, writeport_secolove)
	3000	MDRV_CPU_PROGRAM_MAP(secolove_map, 0)
	3001	MDRV_CPU_IO_MAP(secolove_io_map, 0)
3031	3002	//  MDRV_CPU_VBLANK_INT_HACK(nb1413m3_interrupt, 128)    // nmiclock = 60
3032	3003	MACHINE_DRIVER_END
3033	3004
r4679	r4680
3037	3008	/* basic machine hardware */
3038	3009	MDRV_IMPORT_FROM(NBMJDRV_4096)
3039	3010	MDRV_CPU_MODIFY("maincpu")
3040		MDRV_CPU_PROGRAM_MAP(readmem_secolove, writemem_secolove)
3041		MDRV_CPU_IO_MAP(readport_secolove, writeport_secolove)
	3011	MDRV_CPU_PROGRAM_MAP(secolove_map, 0)
	3012	MDRV_CPU_IO_MAP(secolove_io_map, 0)
3042	3013	//  MDRV_CPU_VBLANK_INT_HACK(nb1413m3_interrupt, 128)    // nmiclock = 60
3043	3014
3044	3015	/* video hardware */
r4679	r4680
3051	3022	/* basic machine hardware */
3052	3023	MDRV_IMPORT_FROM(mbmj_h12bit)
3053	3024	MDRV_CPU_MODIFY("maincpu")
3054		MDRV_CPU_IO_MAP(readport_barline, writeport_barline)
	3025	MDRV_CPU_IO_MAP(barline_io_map, 0)
3055	3026	//  MDRV_CPU_VBLANK_INT_HACK(nb1413m3_interrupt, 128)    // nmiclock = 60
3056	3027
3057	3028	MDRV_SOUND_REPLACE("psg", YM3812, 20000000/8)
r4679	r4680
3065	3036	/* basic machine hardware */
3066	3037	MDRV_IMPORT_FROM(NBMJDRV_65536)
3067	3038	MDRV_CPU_MODIFY("maincpu")
3068		MDRV_CPU_PROGRAM_MAP(readmem_secolove, writemem_secolove)
3069		MDRV_CPU_IO_MAP(readport_secolove, writeport_secolove)
	3039	MDRV_CPU_PROGRAM_MAP(secolove_map, 0)
	3040	MDRV_CPU_IO_MAP(secolove_io_map, 0)
3070	3041	//  MDRV_CPU_VBLANK_INT_HACK(nb1413m3_interrupt, 128)    // nmiclock = 60/40
3071	3042
3072	3043	/* video hardware */
r4679	r4680
3079	3050	/* basic machine hardware */
3080	3051	MDRV_CPU_ADD("maincpu", Z80, 5000000)   /* 5.00 MHz */
3081	3052	MDRV_CPU_VBLANK_INT("screen", nb1413m3_interrupt)
3082		MDRV_CPU_PROGRAM_MAP(readmem_secolove, writemem_secolove)
3083		MDRV_CPU_IO_MAP(readport_secolove, writeport_p16bit_LCD)
	3053	MDRV_CPU_PROGRAM_MAP(secolove_map, 0)
	3054	MDRV_CPU_IO_MAP(secolove_io_map, 0)
	3055	MDRV_CPU_IO_MAP(p16bit_LCD_io_map, 0)
3084	3056
3085	3057	MDRV_MACHINE_RESET(nb1413m3)
3086	3058	MDRV_NVRAM_HANDLER(nb1413m3)
r4679	r4680
3131	3103	/* basic machine hardware */
3132	3104	MDRV_IMPORT_FROM(NBMJDRV_65536)
3133	3105	MDRV_CPU_MODIFY("maincpu")
3134		MDRV_CPU_PROGRAM_MAP(readmem_secolove, writemem_secolove)
3135		MDRV_CPU_IO_MAP(readport_secolove, writeport_seiha)
	3106	MDRV_CPU_PROGRAM_MAP(secolove_map, 0)
	3107	MDRV_CPU_IO_MAP(seiha_io_map, 0)
3136	3108	//  MDRV_CPU_VBLANK_INT_HACK(nb1413m3_interrupt, 128)    // nmiclock = 60
3137	3109	MACHINE_DRIVER_END
3138	3110
3139	3111	static MACHINE_DRIVER_START( mjgaiden )
3140		/* basic machine hardware */
3141		MDRV_IMPORT_FROM(NBMJDRV_4096)
3142	3112
3143		MDRV_CPU_MODIFY("maincpu")
3144		MDRV_CPU_PROGRAM_MAP(readmem_ojousan, writemem_ojousan)
3145		MDRV_CPU_IO_MAP(readport_secolove, writeport_mjgaiden)
	3113	/* basic machine hardware */
	3114	MDRV_IMPORT_FROM(NBMJDRV_4096)
	3115
	3116	MDRV_CPU_MODIFY("maincpu")
	3117	MDRV_CPU_PROGRAM_MAP(ojousan_map, 0)
	3118	MDRV_CPU_IO_MAP(mjgaiden_io_map, 0)
3146	3119	MACHINE_DRIVER_END
3147	3120
3148	3121	static MACHINE_DRIVER_START( iemoto )
r4679	r4680
3150	3123	/* basic machine hardware */
3151	3124	MDRV_IMPORT_FROM(NBMJDRV_65536)
3152	3125	MDRV_CPU_MODIFY("maincpu")
3153		MDRV_CPU_PROGRAM_MAP(readmem_secolove, writemem_secolove)
3154		MDRV_CPU_IO_MAP(readport_secolove, writeport_iemoto)
	3126	MDRV_CPU_PROGRAM_MAP(secolove_map, 0)
	3127	MDRV_CPU_IO_MAP(iemoto_io_map, 0)
3155	3128	//  MDRV_CPU_VBLANK_INT_HACK(nb1413m3_interrupt, 128)    // nmiclock = 60
3156	3129	MACHINE_DRIVER_END
3157	3130
r4679	r4680
3161	3134	/* basic machine hardware */
3162	3135	MDRV_IMPORT_FROM(NBMJDRV_65536)
3163	3136	MDRV_CPU_MODIFY("maincpu")
3164		MDRV_CPU_PROGRAM_MAP(readmem_ojousan, writemem_ojousan)
3165		MDRV_CPU_IO_MAP(readport_secolove, writeport_iemoto)
	3137	MDRV_CPU_PROGRAM_MAP(ojousan_map, 0)
	3138	MDRV_CPU_IO_MAP(iemoto_io_map, 0)
3166	3139	//  MDRV_CPU_VBLANK_INT_HACK(nb1413m3_interrupt, 128)    // nmiclock = 60
3167	3140	MACHINE_DRIVER_END
3168	3141
r4679	r4680
3171	3144	/* basic machine hardware */
3172	3145	MDRV_IMPORT_FROM(NBMJDRV_4096)
3173	3146	MDRV_CPU_MODIFY("maincpu")
3174		MDRV_CPU_PROGRAM_MAP(readmem_mjsikaku, writemem_mjsikaku)
3175		MDRV_CPU_IO_MAP(readport_kaguya, writeport_kaguya)
	3147	MDRV_CPU_PROGRAM_MAP(mjsikaku_map, 0)
	3148	MDRV_CPU_IO_MAP(kaguya_io_map, 0)
3176	3149	//  MDRV_CPU_VBLANK_INT_HACK(nb1413m3_interrupt, 128)
3177	3150	MACHINE_DRIVER_END
3178	3151
r4679	r4680
3182	3155	/* basic machine hardware */
3183	3156	MDRV_IMPORT_FROM(NBMJDRV_4096)
3184	3157	MDRV_CPU_MODIFY("maincpu")
3185		MDRV_CPU_PROGRAM_MAP(readmem_mjsikaku, writemem_mjsikaku)
3186		MDRV_CPU_IO_MAP(readport_mjsikaku, writeport_mjsikaku)
	3158	MDRV_CPU_PROGRAM_MAP(mjsikaku_map, 0)
	3159	MDRV_CPU_IO_MAP(mjsikaku_io_map, 0)
3187	3160	//  MDRV_CPU_VBLANK_INT_HACK(nb1413m3_interrupt, 144)    // nmiclock = 70
3188	3161
3189	3162	/* sound hardware */
r4679	r4680
3197	3170	/* basic machine hardware */
3198	3171	MDRV_IMPORT_FROM(NBMJDRV_4096)
3199	3172	MDRV_CPU_MODIFY("maincpu")
3200		MDRV_CPU_PROGRAM_MAP(readmem_secolove, writemem_secolove)
3201		MDRV_CPU_IO_MAP(readport_mmsikaku, writeport_mmsikaku)
	3173	MDRV_CPU_PROGRAM_MAP(secolove_map, 0)
	3174	MDRV_CPU_IO_MAP(mmsikaku_io_map, 0)
3202	3175	//  MDRV_CPU_VBLANK_INT_HACK(nb1413m3_interrupt, 128)
3203	3176	MACHINE_DRIVER_END
3204	3177
r4679	r4680
3208	3181	/* basic machine hardware */
3209	3182	MDRV_IMPORT_FROM(mjsikaku)
3210	3183	MDRV_CPU_MODIFY("maincpu")
3211		MDRV_CPU_IO_MAP(readport_otonano, writeport_otonano)
	3184	MDRV_CPU_IO_MAP(otonano_io_map, 0)
3212	3185	MACHINE_DRIVER_END
3213	3186
3214	3187

src/mame/drivers/sbowling.c

r4679	r4680
104	104
105	105	static VIDEO_START(sbowling)
106	106	{
107		tmpbitmap = auto_bitmap_alloc(32*8,32*8,video_screen_get_format(machine->primary_screen));
	107	tmpbitmap = auto_bitmap_alloc(machine,32*8,32*8,video_screen_get_format(machine->primary_screen));
108	108	sb_tilemap = tilemap_create(machine, get_sb_tile_info, tilemap_scan_rows, 8, 8, 32, 32);
109	109	}
110	110

src/mame/drivers/psychic5.c

r4679	r4680
664	664
665	665	static void irqhandler(const device_config *device, int irq)
666	666	{
667		cpu_set_input_line(device->machine->cpu[1],0,irq ? ASSERT_LINE : CLEAR_LINE);
	667	cputag_set_input_line(device->machine, "audiocpu", 0, irq ? ASSERT_LINE : CLEAR_LINE);
668	668	}
669	669
670	670	static const ym2203_interface ym2203_config =

src/mame/drivers/taito_h.c

r4679	r4680
162	162	/* Handler called by the YM2610 emulator when the internal timers cause an IRQ */
163	163	static void irqhandler(const device_config *device, int irq)
164	164	{
165		cpu_set_input_line(device->machine->cpu[1],0,irq ? ASSERT_LINE : CLEAR_LINE);
	165	cputag_set_input_line(device->machine, "audiocpu", 0, irq ? ASSERT_LINE : CLEAR_LINE);
166	166	}
167	167
168	168	static const ym2610_interface ym2610_config =

src/mame/drivers/othunder.c

r4679	r4680
258	258
259	259	static void update_irq(running_machine *machine)
260	260	{
261		cpu_set_input_line(machine->cpu[0], 6, ad_irq ? ASSERT_LINE : CLEAR_LINE);
262		cpu_set_input_line(machine->cpu[0], 5, vblank_irq ? ASSERT_LINE : CLEAR_LINE);
	261	cputag_set_input_line(machine, "maincpu", 6, ad_irq ? ASSERT_LINE : CLEAR_LINE);
	262	cputag_set_input_line(machine, "maincpu", 5, vblank_irq ? ASSERT_LINE : CLEAR_LINE);
263	263	}
264	264
265	265	static WRITE16_HANDLER( irq_ack_w )
r4679	r4680
673	673	/* handler called by the YM2610 emulator when the internal timers cause an IRQ */
674	674	static void irqhandler(const device_config *device, int irq)
675	675	{
676		cpu_set_input_line(device->machine->cpu[1],0,irq ? ASSERT_LINE : CLEAR_LINE);
	676	cputag_set_input_line(device->machine, "audiocpu", 0, irq ? ASSERT_LINE : CLEAR_LINE);
677	677	}
678	678
679	679	static const ym2610_interface ym2610_config =

src/mame/drivers/ginganin.c

r4679	r4680
75	75	*/
76	76
77	77
78		static ADDRESS_MAP_START( readmem, ADDRESS_SPACE_PROGRAM, 16 )
79		AM_RANGE(0x000000, 0x01ffff) AM_READ(SMH_ROM)
80		AM_RANGE(0x020000, 0x023fff) AM_READ(SMH_RAM)
81		AM_RANGE(0x030000, 0x0307ff) AM_READ(SMH_RAM)
82		AM_RANGE(0x040000, 0x0407ff) AM_READ(SMH_RAM)
83		AM_RANGE(0x050000, 0x0507ff) AM_READ(SMH_RAM)
84		AM_RANGE(0x060000, 0x06000f) AM_READ(SMH_RAM)
85		AM_RANGE(0x068000, 0x06bfff) AM_READ(SMH_RAM)   /* bg lives in ROM */
	78	static ADDRESS_MAP_START( ginganin_map, ADDRESS_SPACE_PROGRAM, 16 )
	79	/* The ROM area: 10000-13fff is written with: 0000 0000 0000 0001, at startup only. Why? */
	80	AM_RANGE(0x000000, 0x01ffff) AM_ROM
	81	AM_RANGE(0x020000, 0x023fff) AM_RAM
	82	AM_RANGE(0x030000, 0x0307ff) AM_RAM_WRITE(ginganin_txtram16_w) AM_BASE(&ginganin_txtram16)
	83	AM_RANGE(0x040000, 0x0407ff) AM_RAM AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)
	84	AM_RANGE(0x050000, 0x0507ff) AM_RAM_WRITE(paletteram16_RRRRGGGGBBBBxxxx_word_w) AM_BASE(&paletteram16)
	85	AM_RANGE(0x060000, 0x06000f) AM_RAM_WRITE(ginganin_vregs16_w) AM_BASE(&ginganin_vregs16)
	86	AM_RANGE(0x068000, 0x06bfff) AM_RAM_WRITE(ginganin_fgram16_w) AM_BASE(&ginganin_fgram16)
86	87	AM_RANGE(0x070000, 0x070001) AM_READ_PORT("P1_P2")
87	88	AM_RANGE(0x070002, 0x070003) AM_READ_PORT("DSW")
88	89	ADDRESS_MAP_END
89	90
90		static ADDRESS_MAP_START( writemem, ADDRESS_SPACE_PROGRAM, 16 )
91		/* The ROM area: 10000-13fff is written with: 0000 0000 0000 0001, at startup only. Why? */
92		AM_RANGE(0x020000, 0x023fff) AM_WRITE(SMH_RAM)
93		AM_RANGE(0x030000, 0x0307ff) AM_WRITE(ginganin_txtram16_w) AM_BASE(&ginganin_txtram16)
94		AM_RANGE(0x040000, 0x0407ff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)
95		AM_RANGE(0x050000, 0x0507ff) AM_WRITE(paletteram16_RRRRGGGGBBBBxxxx_word_w) AM_BASE(&paletteram16)
96		AM_RANGE(0x060000, 0x06000f) AM_WRITE(ginganin_vregs16_w) AM_BASE(&ginganin_vregs16)
97		AM_RANGE(0x068000, 0x06bfff) AM_WRITE(ginganin_fgram16_w) AM_BASE(&ginganin_fgram16)
98		ADDRESS_MAP_END
99	91
100
101	92	/*
102	93	**
103	94	**              Sound cpu data
r4679	r4680
168	159	MC6840_register1 = data;
169	160	}
170	161
171		static ADDRESS_MAP_START( sound_readmem, ADDRESS_SPACE_PROGRAM, 8 )
172		AM_RANGE(0x0000, 0x07ff) AM_READ(SMH_RAM)
173		AM_RANGE(0x1800, 0x1800) AM_READ(soundlatch_r)
174		AM_RANGE(0x4000, 0xffff) AM_READ(SMH_ROM)
175		ADDRESS_MAP_END
176
177
178		static ADDRESS_MAP_START( sound_writemem, ADDRESS_SPACE_PROGRAM, 8 )
179		AM_RANGE(0x0000, 0x07ff) AM_WRITE(SMH_RAM)
	162	static ADDRESS_MAP_START( sound_map, ADDRESS_SPACE_PROGRAM, 8 )
	163	AM_RANGE(0x0000, 0x07ff) AM_RAM
180	164	AM_RANGE(0x0800, 0x0800) AM_WRITE(MC6840_control_port_0_w)   /* Takahiro Nogi. 1999/09/27 */
181	165	AM_RANGE(0x0801, 0x0801) AM_WRITE(MC6840_control_port_1_w)   /* Takahiro Nogi. 1999/09/27 */
182	166	AM_RANGE(0x0802, 0x0802) AM_WRITE(MC6840_write_port_0_w)      /* Takahiro Nogi. 1999/09/27 */
183	167	AM_RANGE(0x0803, 0x0803) AM_WRITE(MC6840_write_port_1_w)      /* Takahiro Nogi. 1999/09/27 */
	168	AM_RANGE(0x1800, 0x1800) AM_READ(soundlatch_r)
184	169	AM_RANGE(0x2000, 0x2001) AM_DEVWRITE("ym", y8950_w)
185	170	AM_RANGE(0x2800, 0x2801) AM_DEVWRITE("ay", ay8910_address_data_w)
	171	AM_RANGE(0x4000, 0xffff) AM_READ(SMH_ROM)
186	172	ADDRESS_MAP_END
187	173
188	174
r4679	r4680
341	327
342	328	/* basic machine hardware */
343	329	MDRV_CPU_ADD("maincpu", M68000, 6000000)   /* ? */
344		MDRV_CPU_PROGRAM_MAP(readmem,writemem)
	330	MDRV_CPU_PROGRAM_MAP(ginganin_map,0)
345	331	MDRV_CPU_VBLANK_INT("screen", irq1_line_hold) /* ? (vectors 1-7 cointain the same address) */
346	332
347	333	MDRV_CPU_ADD("audiocpu", M6809, 1000000)
348		MDRV_CPU_PROGRAM_MAP(sound_readmem,sound_writemem)
	334	MDRV_CPU_PROGRAM_MAP(sound_map,0)
349	335	MDRV_CPU_VBLANK_INT_HACK(ginganin_sound_interrupt,60)   /* Takahiro Nogi. 1999/09/27 (1 -> 60) */
350	336
351	337	/* video hardware */

src/mame/drivers/tail2nos.c

r4679	r4680
42	42	if (ACCESSING_BITS_0_7)
43	43	{
44	44	soundlatch_w(space,offset,data & 0xff);
45		cpu_set_input_line(space->machine->cpu[1],INPUT_LINE_NMI,PULSE_LINE);
	45	cputag_set_input_line(space->machine, "audiocpu", INPUT_LINE_NMI, PULSE_LINE);
46	46	}
47	47	}
48	48
r4679	r4680
70	70
71	71	static ADDRESS_MAP_START( main_map, ADDRESS_SPACE_PROGRAM, 16 )
72	72	AM_RANGE(0x000000, 0x03ffff) AM_ROM
73		AM_RANGE(0x200000, 0x27ffff) AM_READWRITE(SMH_BANK1, SMH_ROM)   /* extra ROM */
74		AM_RANGE(0x2c0000, 0x2dffff) AM_READWRITE(SMH_BANK2, SMH_ROM)
	73	AM_RANGE(0x200000, 0x27ffff) AM_READWRITE(SMH_BANK(1), SMH_ROM)   /* extra ROM */
	74	AM_RANGE(0x2c0000, 0x2dffff) AM_READWRITE(SMH_BANK(2), SMH_ROM)
75	75	AM_RANGE(0x400000, 0x41ffff) AM_READWRITE(tail2nos_zoomdata_r, tail2nos_zoomdata_w)
76	76	AM_RANGE(0x500000, 0x500fff) AM_READWRITE(tail2nos_K051316_0_r, tail2nos_K051316_0_w)
77	77	AM_RANGE(0x510000, 0x51001f) AM_WRITE(tail2nos_K051316_ctrl_0_w)
r4679	r4680
88	88	static ADDRESS_MAP_START( sound_map, ADDRESS_SPACE_PROGRAM, 8 )
89	89	AM_RANGE(0x0000, 0x77ff) AM_ROM
90	90	AM_RANGE(0x7800, 0x7fff) AM_RAM
91		AM_RANGE(0x8000, 0xffff) AM_READWRITE(SMH_BANK3, SMH_ROM)
	91	AM_RANGE(0x8000, 0xffff) AM_READWRITE(SMH_BANK(3), SMH_ROM)
92	92	ADDRESS_MAP_END
93	93
94	94	static ADDRESS_MAP_START( sound_port_map, ADDRESS_SPACE_IO, 8 )
r4679	r4680
215	215
216	216	static void irqhandler(const device_config *device, int irq)
217	217	{
218		cpu_set_input_line(device->machine->cpu[1],0,irq ? ASSERT_LINE : CLEAR_LINE);
	218	cputag_set_input_line(device->machine, "audiocpu", 0, irq ? ASSERT_LINE : CLEAR_LINE);
219	219	}
220	220
221	221	static const ym2608_interface ym2608_config =

src/mame/drivers/mrjong.c

r4679	r4680
56	56	extern VIDEO_UPDATE( mrjong );
57	57
58	58
59		static ADDRESS_MAP_START( readmem, ADDRESS_SPACE_PROGRAM, 8 )
60		AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM)
61		AM_RANGE(0x8000, 0x87ff) AM_READ(SMH_RAM)
62		AM_RANGE(0xa000, 0xa7ff) AM_READ(SMH_RAM)
63		AM_RANGE(0xe000, 0xe3ff) AM_READ(SMH_RAM)
64		AM_RANGE(0xe400, 0xe7ff) AM_READ(SMH_RAM)
	59	static ADDRESS_MAP_START( mrjong_map, ADDRESS_SPACE_PROGRAM, 8 )
	60	AM_RANGE(0x0000, 0x7fff) AM_ROM
	61	AM_RANGE(0x8000, 0x87ff) AM_RAM
	62	AM_RANGE(0xa000, 0xa7ff) AM_RAM
	63	AM_RANGE(0xe000, 0xe3ff) AM_RAM_WRITE(mrjong_videoram_w) AM_BASE(&videoram)
	64	AM_RANGE(0xe400, 0xe7ff) AM_RAM_WRITE(mrjong_colorram_w) AM_BASE(&colorram)
65	65	ADDRESS_MAP_END
66	66
67		static ADDRESS_MAP_START( writemem, ADDRESS_SPACE_PROGRAM, 8 )
68		AM_RANGE(0x0000, 0x7fff) AM_WRITE(SMH_ROM)
69		AM_RANGE(0x8000, 0x87ff) AM_WRITE(SMH_RAM)
70		AM_RANGE(0xa000, 0xa7ff) AM_WRITE(SMH_RAM)
71		AM_RANGE(0xe000, 0xe3ff) AM_WRITE(mrjong_videoram_w) AM_BASE(&videoram)
72		AM_RANGE(0xe400, 0xe7ff) AM_WRITE(mrjong_colorram_w) AM_BASE(&colorram)
73		AM_RANGE(0xe000, 0xe03f) AM_WRITE(SMH_RAM) AM_BASE(&spriteram) AM_SIZE(&spriteram_size)   /* here to initialize the pointer */
74		ADDRESS_MAP_END
75
76
77	67	static WRITE8_HANDLER( io_0x00_w )
78	68	{
79	69	mrjong_flipscreen_w(space, 0, ((data & 0x04) > 2));
r4679	r4680
85	75	}
86	76
87	77
88		static ADDRESS_MAP_START( io_map, ADDRESS_SPACE_IO, 8 )
	78	static ADDRESS_MAP_START( mrjong_io_map, ADDRESS_SPACE_IO, 8 )
89	79	ADDRESS_MAP_GLOBAL_MASK(0xff)
90	80	AM_RANGE(0x00, 0x00) AM_READ_PORT("P2") AM_WRITE(io_0x00_w)
91	81	AM_RANGE(0x01, 0x01) AM_READ_PORT("P1") AM_DEVWRITE("sn1", sn76496_w)
r4679	r4680
174	164
175	165	/* basic machine hardware */
176	166	MDRV_CPU_ADD("maincpu", Z80,15468000/6)   /* 2.578 MHz?? */
177		MDRV_CPU_PROGRAM_MAP(readmem,writemem)
178		MDRV_CPU_IO_MAP(io_map,0)
	167	MDRV_CPU_PROGRAM_MAP(mrjong_map,0)
	168	MDRV_CPU_IO_MAP(mrjong_io_map,0)
179	169	MDRV_CPU_VBLANK_INT("screen", nmi_line_pulse)
180	170
181	171	/* video hardware */

src/mame/drivers/meritm.c

r4679	r4680
10	10	Other: 2 Z80APIO (I/O and interrupt controllers)
11	11	1 8255 (I/O)
12	12
	13	CRT 252: addon board for CRT 250, stores question roms
	14
	15	CRT 258: addon board for CRT 250, contains UART and Microtouch touch screen controller
	16
13	17	CRT 260 additional components:
14	18	- Microtouch touch screen controller (SMT-3)
15	19	- PC16550 UART (for communication with touch screen controller)
r4679	r4680
30	34	Pit Boss Superstar (c)1990
31	35	*Pit Boss Superstar 30 (c)1993
32	36	Pit Boss Megastar (c)1994
	37	*Pit Boss Supertouch 30 (c)1993/4
33	38
34	39	CRT 260:
35		*Pit Boss Supertouch 30 (c)1994?
36	40	*Megatouch Video (c)1994?
37	41	*Megatouch II (c)1995
38	42	Megatouch III (c)1995
r4679	r4680
69	73	- clean up V9938 interrupt implementation
70	74	- finish inputs, dsw, outputs (lamps)
71	75	- problem with registering touches on the bottom of the screen (currently hacked to work)
72		- megat5: has jmp $0000 in the initialization code causing infinite loop, is rom bad?
73		- megat4st doesn't boot, protection problem?
	76	- megat5: has jmp $0000 in the initialization code causing infinite loop, rom U38 is dumped at half size / bad dump
	77	- for pbst30 only roms were found, it appears that two roms with graphics data were missing, using pitbossm roms for now
74	78	*/
75	79
76	80	#include "driver.h"
r4679	r4680
569	573	AM_RANGE(0xff, 0xff) AM_WRITE(meritm_crt250_bank_w)
570	574	ADDRESS_MAP_END
571	575
	576	static ADDRESS_MAP_START( meritm_crt250_crt258_io_map, ADDRESS_SPACE_IO, 8 )
	577	ADDRESS_MAP_GLOBAL_MASK(0xff)
	578	AM_RANGE(0x10, 0x10) AM_READWRITE(v9938_0_vram_r, v9938_0_vram_w)
	579	AM_RANGE(0x11, 0x11) AM_READWRITE(v9938_0_status_r, v9938_0_command_w)
	580	AM_RANGE(0x12, 0x12) AM_WRITE(v9938_0_palette_w)
	581	AM_RANGE(0x13, 0x13) AM_WRITE(v9938_0_register_w)
	582	AM_RANGE(0x20, 0x20) AM_READWRITE(v9938_1_vram_r, v9938_1_vram_w)
	583	AM_RANGE(0x21, 0x21) AM_READWRITE(v9938_1_status_r, v9938_1_command_w)
	584	AM_RANGE(0x22, 0x22) AM_WRITE(v9938_1_palette_w)
	585	AM_RANGE(0x23, 0x23) AM_WRITE(v9938_1_register_w)
	586	AM_RANGE(0x30, 0x33) AM_DEVREADWRITE("ppi8255", ppi8255_r, ppi8255_w)
	587	AM_RANGE(0x40, 0x43) AM_DEVREADWRITE("z80pio_0", z80pio_r, z80pio_w)
	588	AM_RANGE(0x50, 0x53) AM_DEVREADWRITE("z80pio_1", z80pio_r, z80pio_w)
	589	AM_RANGE(0x60, 0x67) AM_READWRITE(pc16552d_0_r,pc16552d_0_w)
	590	AM_RANGE(0x80, 0x80) AM_DEVREAD("ay", ay8910_r)
	591	AM_RANGE(0x80, 0x81) AM_DEVWRITE("ay", ay8910_address_data_w)
	592	AM_RANGE(0xff, 0xff) AM_WRITE(meritm_crt250_bank_w)
	593	ADDRESS_MAP_END
	594
572	595	static ADDRESS_MAP_START( meritm_map, ADDRESS_SPACE_PROGRAM, 8 )
573	596	AM_RANGE(0x0000, 0x7fff) AM_ROMBANK(1)
574	597	AM_RANGE(0x8000, 0xdfff) AM_ROMBANK(2)
r4679	r4680
676	699	PORT_DIPSETTING(    0x80, DEF_STR( On ) )
677	700	INPUT_PORTS_END
678	701
	702	static INPUT_PORTS_START(pbst30)
	703	PORT_INCLUDE(meritm_crt260)
	704
	705	PORT_MODIFY("DSW")
	706	PORT_DIPNAME( 0x01, 0x00, DEF_STR( Unknown ) )
	707	PORT_DIPSETTING(    0x00, DEF_STR( Off ) )
	708	PORT_DIPSETTING(    0x01, DEF_STR( On ) ) // when on, touch screen coordinates are mirrored?
	709	PORT_DIPNAME( 0x02, 0x02, "Enable casino games" )
	710	PORT_DIPSETTING(    0x00, DEF_STR( No ) )
	711	PORT_DIPSETTING(    0x02, DEF_STR( Yes ) )
	712	PORT_DIPNAME( 0x04, 0x00, DEF_STR( Unknown ) )
	713	PORT_DIPSETTING(    0x00, DEF_STR( Off ) )
	714	PORT_DIPSETTING(    0x04, DEF_STR( On ) )
	715	PORT_DIPNAME( 0x08, 0x00, DEF_STR( Unknown ) )
	716	PORT_DIPSETTING(    0x00, DEF_STR( Off ) )
	717	PORT_DIPSETTING(    0x08, DEF_STR( On ) )
	718	PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) ) // off 1 coin 0.5 credit, on 1 coin 1 credit
	719	PORT_DIPSETTING(    0x00, DEF_STR( Off ) )
	720	PORT_DIPSETTING(    0x10, DEF_STR( On ) )
	721	PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) )
	722	PORT_DIPSETTING(    0x00, DEF_STR( Off ) )
	723	PORT_DIPSETTING(    0x20, DEF_STR( On ) )
	724	PORT_DIPNAME( 0x40, 0x00, DEF_STR( Unknown ) )
	725	PORT_DIPSETTING(    0x00, DEF_STR( Off ) )
	726	PORT_DIPSETTING(    0x40, DEF_STR( On ) )
	727	PORT_DIPNAME( 0x80, 0x00, DEF_STR( Unknown ) )
	728	PORT_DIPSETTING(    0x00, DEF_STR( Off ) )
	729	PORT_DIPSETTING(    0x80, DEF_STR( On ) )
	730	INPUT_PORTS_END
	731
679	732	/*************************************
680	733	*
681	734	*  8255
r4679	r4680
755	808	static WRITE_LINE_DEVICE_HANDLER( meritm_audio_pio_interrupt )
756	809	{
757	810	//logerror( "PIO(0) interrupt line: %d, V = %d, H = %d\n", state, video_screen_get_vpos(0), video_screen_get_hpos(0) );
758		cpu_set_input_line(device->machine->cpu[0], 0, state);
	811	cputag_set_input_line(device->machine, "maincpu", 0, state);
759	812	}
760	813
761	814	static WRITE_LINE_DEVICE_HANDLER( meritm_io_pio_interrupt  )
762	815	{
763	816	//logerror( "PIO(1) interrupt line: %d, V = %d, H = %d\n", state, video_screen_get_vpos(0), video_screen_get_hpos(0) );
764		cpu_set_input_line(device->machine->cpu[0], 0, state);
	817	cputag_set_input_line(device->machine, "maincpu", 0, state);
765	818	}
766	819
767	820
r4679	r4680
846	899	state_save_register_global(machine, questions_loword_address);
847	900	};
848	901
	902	static MACHINE_START(meritm_crt250_crt252_crt258)
	903	{
	904	MACHINE_START_CALL(meritm_crt250_questions);
	905	pc16552d_init(machine, 0, UART_CLK, NULL, pc16650d_tx_callback);
	906	microtouch_init(machine, meritm_microtouch_tx_callback, meritm_touch_coord_transform);
	907	}
	908
849	909	static MACHINE_START(meritm_crt260)
850	910	{
851		meritm_ram = auto_malloc( 0x8000 );
	911	meritm_ram = auto_alloc_array(machine, UINT8, 0x8000 );
852	912	memset( meritm_ram, 0x8000, 0x00 );
853	913	memory_configure_bank(machine, 1, 0, 128, memory_region(machine, "maincpu"), 0x8000);
854	914	memory_configure_bank(machine, 2, 0, 128, memory_region(machine, "maincpu"), 0x8000);
r4679	r4680
930	990	MDRV_MACHINE_START(meritm_crt250_questions)
931	991	MACHINE_DRIVER_END
932	992
	993	static MACHINE_DRIVER_START(meritm_crt250_crt252_crt258)
	994	MDRV_IMPORT_FROM(meritm_crt250_questions)
	995	MDRV_CPU_MODIFY("maincpu")
	996	MDRV_CPU_IO_MAP(meritm_crt250_crt258_io_map,0)
	997	MDRV_MACHINE_START(meritm_crt250_crt252_crt258)
	998	MACHINE_DRIVER_END
	999
933	1000	static MACHINE_DRIVER_START(meritm_crt260)
934	1001	MDRV_IMPORT_FROM(meritm_crt250)
935	1002	MDRV_CPU_MODIFY("maincpu")
r4679	r4680
1057	1124	ROM_LOAD( "1",  0x80000, 0x40000, CRC(590a1565) SHA1(b80ea967b6153847b2594e9c59bfe87559022b6c) )
1058	1125	ROM_END
1059	1126
	1127
	1128	ROM_START( pbst30 ) /* Dallas DS1204V security key at U1 labeled 9234-10 U1-RO1 C1994 MII */
	1129	ROM_REGION( 0x80000, "maincpu", 0 )
	1130	ROM_LOAD( "9234-10-01_u9-r0",  0x00000, 0x10000, CRC(96f39c9a) SHA1(df698e94a5204cf050ceadc5c257ca5f68171114) )
	1131	ROM_LOAD( "5",  0x10000, 0x10000, BAD_DUMP CRC(853a1a99) SHA1(45e33442aa7e51c05c9ac8b8458937ee3ff4c21d) ) // taken from pitbossm
	1132	ROM_LOAD( "9234-10-01_u11-r0",  0x20000, 0x10000, CRC(835fa041) SHA1(2ae754c5fcf50548eb214902409217d1643c6eaa) )
	1133	ROM_LOAD( "7",  0x30000, 0x10000, BAD_DUMP CRC(b9fb4203) SHA1(84b514d9739d9c2ab1081cfc7cdedb41155ee038) ) // taken from pitbossm
	1134	ROM_LOAD( "9234-10-01_u14-r0",  0x50000, 0x10000, CRC(9b0873a4) SHA1(7362c6220aa4bf1a9ab7c11cb8a51587a2a0a992) )
	1135	ROM_LOAD( "9234-10-01_u15-r0",  0x60000, 0x10000, CRC(9fbd8582) SHA1(c0f68c8a7cdca34c8736cefc71767c421bcaba8a) )
	1136
	1137
	1138	ROM_REGION( 0xc0000, "user1", 0 ) // extra data / extra banks?
	1139	ROM_LOAD( "qs9234-01_u7-r0",  0x00000, 0x40000, CRC(c0534aaa) SHA1(4b3cbf03f29fd5b4b8fd423e73c0c8147692fa75) )
	1140	ROM_LOAD( "qs9234-01_u6-r0",  0x40000, 0x40000, CRC(fe2cd934) SHA1(623011dc53ed6eefefa0725dba6fd1efee2077c1) )
	1141	ROM_LOAD( "qs9234-01_u5-r0",  0x80000, 0x40000, CRC(293fe305) SHA1(8a551ae8fb4fa4bf329128be1bfd6f1c3ff5a366) )
	1142	ROM_END
	1143
	1144	ROM_START( pbst30b ) /* Dallas DS1204V security key at U1 labeled 9234-01 U1-RO1 C1993 MII */
	1145	ROM_REGION( 0x80000, "maincpu", 0 )
	1146	ROM_LOAD( "9234-00-01_u9-r0a",  0x00000, 0x10000, CRC(5f058f95) SHA1(98382935340a076bdb1b20c7f16c25b6084599fe) )
	1147	ROM_LOAD( "5",  0x10000, 0x10000, BAD_DUMP CRC(853a1a99) SHA1(45e33442aa7e51c05c9ac8b8458937ee3ff4c21d) ) // taken from pitbossm
	1148	ROM_LOAD( "9234-00-01_u11-r0a",  0x20000, 0x10000, CRC(79125fb5) SHA1(6ca4f33c363cfb6f5c0f23b8fcc8cfcc076f68b1) )
	1149	ROM_LOAD( "7",  0x30000, 0x10000, BAD_DUMP CRC(b9fb4203) SHA1(84b514d9739d9c2ab1081cfc7cdedb41155ee038) ) // taken from pitbossm
	1150	ROM_LOAD( "9234-00-01_u14-r0a",  0x50000, 0x10000, CRC(e83f91d5) SHA1(1d64c943787b239763f44be412ee7f5ad13eb37d) )
	1151	ROM_LOAD( "9234-00-01_u15-r0a",  0x60000, 0x10000, CRC(f10f0d39) SHA1(2b5d5a93adb5251e09160b10c067b6e70289f608) )
	1152
	1153
	1154	ROM_REGION( 0xc0000, "user1", 0 ) // extra data / extra banks?
	1155	ROM_LOAD( "qs9234-01_u7-r0",  0x00000, 0x40000, CRC(c0534aaa) SHA1(4b3cbf03f29fd5b4b8fd423e73c0c8147692fa75) )
	1156	ROM_LOAD( "qs9234-01_u6-r0",  0x40000, 0x40000, CRC(fe2cd934) SHA1(623011dc53ed6eefefa0725dba6fd1efee2077c1) )
	1157	ROM_LOAD( "qs9234-01_u5-r0",  0x80000, 0x40000, CRC(293fe305) SHA1(8a551ae8fb4fa4bf329128be1bfd6f1c3ff5a366) )
	1158	ROM_END
	1159
	1160
1060	1161	/*
1061	1162	Mega Touch
1062	1163	by Merit Industries
r4679	r4680
1367	1468	ROM_LOAD( "sc3981-0a.u51",  0x000, 0x117, CRC(4fc750d0) SHA1(d09ff7a8c66aeb5c49e9fec84bd1521e3f5d8d0a) )
1368	1469	ROM_END
1369	1470
	1471	static DRIVER_INIT(pbst30)
	1472	{
	1473	static const UINT8 pbst30b_ds1204_key[8] =
	1474	{ 0xf0, 0xaa, 0x0f, 0x0f, 0x55, 0x55, 0xff, 0xab };
	1475
	1476	static const UINT8 pbst30b_ds1204_nvram[16] =
	1477	{ 0x3e, 0x9a, 0x3c, 0x3f, 0x1d, 0x51, 0x72, 0xc9, 0x28, 0x2c, 0x1d, 0x2d, 0x0e, 0x56, 0x41, 0x00 };
	1478
	1479	ds1204_init(machine, pbst30b_ds1204_key, pbst30b_ds1204_nvram);
	1480
	1481	};
	1482
	1483	static DRIVER_INIT(pbst30b)
	1484	{
	1485	static const UINT8 megat3_ds1204_key[8] =
	1486	{ 0xf0, 0xaa, 0x0f, 0x0f, 0x55, 0x55, 0xff, 0xab };
	1487
	1488	static const UINT8 megat3_ds1204_nvram[16] =
	1489	{ 0xa9, 0xdb, 0x41, 0xf8, 0xe4, 0x42, 0x20, 0x6e, 0xde, 0xaf, 0x4f, 0x046, 0x3d, 0x55, 0x44, 0x00 };
	1490
	1491	ds1204_init(machine, megat3_ds1204_key, megat3_ds1204_nvram);
	1492
	1493	};
	1494
1370	1495	static DRIVER_INIT(megat3)
1371	1496	{
1372	1497	static const UINT8 megat3_ds1204_key[8] =
r4679	r4680
1389	1514
1390	1515	ds1204_init(machine, megat3_ds1204_key, megat3_ds1204_nvram);
1391	1516
1392		memory_install_readwrite8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xfff8, 0xffff, 0, 0, meritm_ds1644_r, meritm_ds1644_w );
	1517	memory_install_readwrite8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xfff8, 0xffff, 0, 0, meritm_ds1644_r, meritm_ds1644_w );
1393	1518
1394	1519	};
1395	1520
r4679	r4680
1408	1533
1409	1534	ds1204_init(machine, 0, megat4te_ds1204_nvram);
1410	1535
1411		memory_install_readwrite8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xfff8, 0xffff, 0, 0, meritm_ds1644_r, meritm_ds1644_w );
	1536	memory_install_readwrite8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xfff8, 0xffff, 0, 0, meritm_ds1644_r, meritm_ds1644_w );
1412	1537
1413	1538	};
1414	1539
r4679	r4680
1419	1544
1420	1545	ds1204_init(machine, 0, megat4te_ds1204_nvram);
1421	1546
1422		memory_install_readwrite8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xfff8, 0xffff, 0, 0, meritm_ds1644_r, meritm_ds1644_w );
	1547	memory_install_readwrite8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xfff8, 0xffff, 0, 0, meritm_ds1644_r, meritm_ds1644_w );
1423	1548
1424	1549	};
1425	1550
r4679	r4680
1449	1574	/* CRT 250 + question roms */
1450	1575	GAME( 1994, pitbossm,  0,      meritm_crt250_questions, pitbossm, 0, ROT0, "Merit", "Pit Boss Megastar", GAME_IMPERFECT_GRAPHICS )
1451	1576
	1577	/* CRT 250 + CRT 252 + CRT 258 */
	1578	GAME( 1994, pbst30,    0,      meritm_crt250_crt252_crt258, pbst30, pbst30,  ROT0, "Merit", "Pit Boss Supertouch 30", GAME_IMPERFECT_GRAPHICS )
	1579	GAME( 1993, pbst30b,   0,      meritm_crt250_crt252_crt258, pbst30, pbst30b, ROT0, "Merit", "Pit Boss Supertouch 30 (set 2)", GAME_IMPERFECT_GRAPHICS )
	1580
1452	1581	/* CRT 260 */
1453	1582	GAME( 1996, megat3,    0,      meritm_crt260, meritm_crt260, megat3,   ROT0, "Merit", "Megatouch III (9255-20-01 RON, Standard version)", GAME_IMPERFECT_GRAPHICS )
1454	1583	GAME( 1995, megat3a,   megat3, meritm_crt260, meritm_crt260, megat3,   ROT0, "Merit", "Megatouch III (9255-20-01 ROF, Standard version)", GAME_IMPERFECT_GRAPHICS )

src/mame/drivers/slapshot.c

r4679	r4680
182	182
183	183	static TIMER_CALLBACK( slapshot_interrupt6 )
184	184	{
185		cpu_set_input_line(machine->cpu[0],6,HOLD_LINE);
	185	cputag_set_input_line(machine, "maincpu", 6, HOLD_LINE);
186	186	}
187	187
188	188
189	189	static INTERRUPT_GEN( slapshot_interrupt )
190	190	{
191		timer_set(device->machine, cpu_clocks_to_attotime(device,200000-500), NULL, 0, slapshot_interrupt6);
192		cpu_set_input_line(device,5,HOLD_LINE);
	191	timer_set(device->machine, cpu_clocks_to_attotime(device, 200000 - 500), NULL, 0, slapshot_interrupt6);
	192	cpu_set_input_line(device, 5, HOLD_LINE);
193	193	}
194	194
195	195
r4679	r4680
220	220	static WRITE16_HANDLER( opwolf3_adc_req_w )
221	221	{
222	222	/* 4 writes a frame - one for each analogue port */
223		cpu_set_input_line(space->machine->cpu[0],3,HOLD_LINE);
	223	cputag_set_input_line(space->machine, "maincpu", 3, HOLD_LINE);
224	224	}
225	225
226	226	/*****************************************************
r4679	r4680
309	309	AM_RANGE(0xe00000, 0xe00007) AM_READWRITE(opwolf3_adc_r, opwolf3_adc_req_w)
310	310	ADDRESS_MAP_END
311	311
	312
312	313	/***************************************************************************/
313	314
314		static ADDRESS_MAP_START( z80_sound_readmem, ADDRESS_SPACE_PROGRAM, 8 )
315		AM_RANGE(0x0000, 0x3fff) AM_READ(SMH_ROM)
316		AM_RANGE(0x4000, 0x7fff) AM_READ(SMH_BANK10)
317		AM_RANGE(0xc000, 0xdfff) AM_READ(SMH_RAM)
318		AM_RANGE(0xe000, 0xe003) AM_DEVREAD("ym", ym2610_r)
319		AM_RANGE(0xe200, 0xe200) AM_READNOP
320		AM_RANGE(0xe201, 0xe201) AM_READ(taitosound_slave_comm_r)
321		AM_RANGE(0xea00, 0xea00) AM_READNOP
322		ADDRESS_MAP_END
323
324		static ADDRESS_MAP_START( z80_sound_writemem, ADDRESS_SPACE_PROGRAM, 8 )
325		AM_RANGE(0x0000, 0x7fff) AM_WRITE(SMH_ROM)
326		AM_RANGE(0xc000, 0xdfff) AM_WRITE(SMH_RAM)
327		AM_RANGE(0xe000, 0xe003) AM_DEVWRITE("ym", ym2610_w)
328		AM_RANGE(0xe200, 0xe200) AM_WRITE(taitosound_slave_port_w)
329		AM_RANGE(0xe201, 0xe201) AM_WRITE(taitosound_slave_comm_w)
	315	static ADDRESS_MAP_START( opwolf3_z80_sound_map, ADDRESS_SPACE_PROGRAM, 8 )
	316	AM_RANGE(0x0000, 0x3fff) AM_ROM
	317	AM_RANGE(0x4000, 0x7fff) AM_ROMBANK(10)
	318	AM_RANGE(0xc000, 0xdfff) AM_RAM
	319	AM_RANGE(0xe000, 0xe003) AM_DEVREADWRITE("ym", ym2610_r,ym2610_w)
	320	AM_RANGE(0xe200, 0xe200) AM_READNOP AM_WRITE(taitosound_slave_port_w)
	321	AM_RANGE(0xe201, 0xe201) AM_READWRITE(taitosound_slave_comm_r,taitosound_slave_comm_w)
330	322	AM_RANGE(0xe400, 0xe403) AM_WRITENOP /* pan */
	323	AM_RANGE(0xea00, 0xea00) AM_READNOP
331	324	AM_RANGE(0xee00, 0xee00) AM_WRITENOP /* ? */
332	325	AM_RANGE(0xf000, 0xf000) AM_WRITENOP /* ? */
333	326	AM_RANGE(0xf200, 0xf200) AM_WRITE(sound_bankswitch_w)
r4679	r4680
508	501	/* handler called by the YM2610 emulator when the internal timers cause an IRQ */
509	502	static void irqhandler(const device_config *device, int irq)
510	503	{
511		cpu_set_input_line(device->machine->cpu[1],0,irq ? ASSERT_LINE : CLEAR_LINE);
	504	cputag_set_input_line(device->machine, "audiocpu", 0, irq ? ASSERT_LINE : CLEAR_LINE);
512	505	}
513	506
514	507	static const ym2610_interface ym2610_config =
r4679	r4680
529	522	MDRV_CPU_VBLANK_INT("screen", slapshot_interrupt)
530	523
531	524	MDRV_CPU_ADD("audiocpu", Z80,32000000/8)   /* 4 MHz */
532		MDRV_CPU_PROGRAM_MAP(z80_sound_readmem,z80_sound_writemem)
	525	MDRV_CPU_PROGRAM_MAP(opwolf3_z80_sound_map,0)
533	526
534	527	MDRV_QUANTUM_TIME(HZ(600))
535	528
r4679	r4680
571	564	MDRV_CPU_VBLANK_INT("screen", slapshot_interrupt)
572	565
573	566	MDRV_CPU_ADD("audiocpu", Z80,32000000/8)   /* 4 MHz */
574		MDRV_CPU_PROGRAM_MAP(z80_sound_readmem,z80_sound_writemem)
	567	MDRV_CPU_PROGRAM_MAP(opwolf3_z80_sound_map,0)
575	568
576	569	MDRV_QUANTUM_TIME(HZ(600))
577	570

src/mame/drivers/koftball.c

r4679	r4680
271	271	#endif
272	272	static DRIVER_INIT(koftball)
273	273	{
274		colorram=auto_malloc(768);
	274	colorram=auto_alloc_array(machine, UINT8, 768);
275	275
276	276	#if NVRAM_HACK
277	277	{

src/mame/drivers/ertictac.c

r4679	r4680
36	36
37	37	static WRITE32_HANDLER(video_fifo_w)
38	38	{
39		vidFIFO[data>>24]=data&0xffffff;
	39	vidFIFO[data >> 24] = data & 0xffffff;
40	40	}
41	41
42	42	static READ32_HANDLER(IOCR_r)
r4679	r4680
52	52
53	53	static READ32_HANDLER(IRQSTA_r)
54	54	{
55		return (IRQSTA&(~2))|0x80;
	55	return (IRQSTA & (~2)) | 0x80;
56	56	}
57	57
58	58	static READ32_HANDLER(IRQRQA_r)
59	59	{
60		return (IRQSTA&IRQMSKA)|0x80;
	60	return (IRQSTA & IRQMSKA) | 0x80;
61	61	}
62	62
63	63	static WRITE32_HANDLER(IRQRQA_w)
64	64	{
65	65	if(ACCESSING_BITS_0_7)
66		IRQSTA&=~data;
	66	IRQSTA &= ~data;
67	67	}
68	68
69	69	static READ32_HANDLER(IRQMSKA_r)
r4679	r4680
74	74	static WRITE32_HANDLER(IRQMSKA_w)
75	75	{
76	76	if(ACCESSING_BITS_0_7)
77		IRQMSKA=(data&(~2))|0x80;
	77	IRQMSKA = (data & (~2)) | 0x80;
78	78	}
79	79
80	80	static READ32_HANDLER(IRQRQB_r)
81	81	{
82		return mame_rand(space->machine)&IRQMSKB; /* hack  0x20 - controls,  0x02 - ?sound? */
	82	return mame_rand(space->machine) & IRQMSKB; /* hack  0x20 - controls,  0x02 - ?sound? */
83	83	}
84	84
85	85	static READ32_HANDLER(IRQMSKB_r)
r4679	r4680
90	90	static WRITE32_HANDLER(IRQMSKB_w)
91	91	{
92	92	if(ACCESSING_BITS_0_7)
93		IRQMSKB=data;
	93	IRQMSKB = data;
94	94	}
95	95
96	96	static READ32_HANDLER(FIQMSK_r)
r4679	r4680
101	101	static WRITE32_HANDLER(FIQMSK_w)
102	102	{
103	103	if(ACCESSING_BITS_0_7)
104		FIQMSK=(data&(~0x2c))|0x80;
	104	FIQMSK = (data & (~0x2c)) | 0x80;
105	105	}
106	106
107	107	static READ32_HANDLER(T1low_r)
r4679	r4680
112	112	static WRITE32_HANDLER(T1low_w)
113	113	{
114	114	if(ACCESSING_BITS_0_7)
115		T1low=data;
	115	T1low = data;
116	116	}
117	117
118	118	static READ32_HANDLER(T1high_r)
r4679	r4680
123	123	static WRITE32_HANDLER(T1high_w)
124	124	{
125	125	if(ACCESSING_BITS_0_7)
126		T1high=data;
	126	T1high = data;
127	127	}
128	128
129	129	static void startTimer(running_machine *machine);
130	130
131	131	static TIMER_CALLBACK( ertictacTimer )
132	132	{
133		IRQSTA|=0x40;
134		if(IRQMSKA&0x40)
	133	IRQSTA |= 0x40;
	134	if(IRQMSKA & 0x40)
135	135	{
136		cpu_set_input_line(machine->cpu[0], ARM_IRQ_LINE, HOLD_LINE);
	136	cputag_set_input_line(machine, "maincpu", ARM_IRQ_LINE, HOLD_LINE);
137	137	}
138	138	startTimer(machine);
139	139	}
140	140
141	141	static void startTimer(running_machine *machine)
142	142	{
143		timer_set(machine, ATTOTIME_IN_USEC( ((T1low&0xff)|((T1high&0xff)<<8))>>4), NULL, 0, ertictacTimer);
	143	timer_set(machine, ATTOTIME_IN_USEC(((T1low & 0xff) | ((T1high & 0xff) << 8)) >> 4), NULL, 0, ertictacTimer);
144	144	}
145	145
146	146	static WRITE32_HANDLER(T1GO_w)

src/mame/drivers/xyonix.c

r4679	r4680
34	34
35	35	static WRITE8_HANDLER( xyonix_irqack_w )
36	36	{
37		cpu_set_input_line(space->machine->cpu[0], 0, CLEAR_LINE);
	37	cputag_set_input_line(space->machine, "maincpu", 0, CLEAR_LINE);
38	38	}
39	39
40	40

src/mame/drivers/cninja.c

r4679	r4680
61	61	static WRITE16_HANDLER( cninja_sound_w )
62	62	{
63	63	soundlatch_w(space,0,data&0xff);
64		cpu_set_input_line(space->machine->cpu[1],0,HOLD_LINE);
	64	cputag_set_input_line(space->machine, "audiocpu", 0, HOLD_LINE);
65	65	}
66	66
67	67	static WRITE16_HANDLER( stoneage_sound_w )
68	68	{
69	69	soundlatch_w(space,0,data&0xff);
70		cpu_set_input_line(space->machine->cpu[1],INPUT_LINE_NMI,PULSE_LINE);
	70	cputag_set_input_line(space->machine, "audiocpu", INPUT_LINE_NMI, PULSE_LINE);
71	71	}
72	72
73	73	static TIMER_CALLBACK( interrupt_gen )
r4679	r4680
75	75	int scanline = param;
76	76
77	77	/* Save state of scroll registers before the IRQ */
78		deco16_raster_display_list[deco16_raster_display_position++]=scanline;
79		deco16_raster_display_list[deco16_raster_display_position++]=deco16_pf12_control[1]&0xffff;
80		deco16_raster_display_list[deco16_raster_display_position++]=deco16_pf12_control[2]&0xffff;
81		deco16_raster_display_list[deco16_raster_display_position++]=deco16_pf12_control[3]&0xffff;
82		deco16_raster_display_list[deco16_raster_display_position++]=deco16_pf12_control[4]&0xffff;
83		deco16_raster_display_list[deco16_raster_display_position++]=deco16_pf34_control[1]&0xffff;
84		deco16_raster_display_list[deco16_raster_display_position++]=deco16_pf34_control[2]&0xffff;
85		deco16_raster_display_list[deco16_raster_display_position++]=deco16_pf34_control[3]&0xffff;
86		deco16_raster_display_list[deco16_raster_display_position++]=deco16_pf34_control[4]&0xffff;
	78	deco16_raster_display_list[deco16_raster_display_position++] = scanline;
	79	deco16_raster_display_list[deco16_raster_display_position++] = deco16_pf12_control[1] & 0xffff;
	80	deco16_raster_display_list[deco16_raster_display_position++] = deco16_pf12_control[2] & 0xffff;
	81	deco16_raster_display_list[deco16_raster_display_position++] = deco16_pf12_control[3] & 0xffff;
	82	deco16_raster_display_list[deco16_raster_display_position++] = deco16_pf12_control[4] & 0xffff;
	83	deco16_raster_display_list[deco16_raster_display_position++] = deco16_pf34_control[1] & 0xffff;
	84	deco16_raster_display_list[deco16_raster_display_position++] = deco16_pf34_control[2] & 0xffff;
	85	deco16_raster_display_list[deco16_raster_display_position++] = deco16_pf34_control[3] & 0xffff;
	86	deco16_raster_display_list[deco16_raster_display_position++] = deco16_pf34_control[4] & 0xffff;
87	87
88		cpu_set_input_line(machine->cpu[0], (cninja_irq_mask&0x10) ? 3 : 4, ASSERT_LINE);
89		timer_adjust_oneshot(raster_irq_timer,attotime_never,0);
	88	cputag_set_input_line(machine, "maincpu", (cninja_irq_mask&0x10) ? 3 : 4, ASSERT_LINE);
	89	timer_adjust_oneshot(raster_irq_timer, attotime_never, 0);
90	90	}
91	91
92	92	static READ16_HANDLER( cninja_irq_r )
r4679	r4680
97	97	return cninja_scanline;
98	98
99	99	case 2: /* Raster IRQ ACK - value read is not used */
100		cpu_set_input_line(space->machine->cpu[0], 3, CLEAR_LINE);
101		cpu_set_input_line(space->machine->cpu[0], 4, CLEAR_LINE);
	100	cputag_set_input_line(space->machine, "maincpu", 3, CLEAR_LINE);
	101	cputag_set_input_line(space->machine, "maincpu", 4, CLEAR_LINE);
102	102	return 0;
103	103	}
104	104
r4679	r4680
153	153
154	154	/**********************************************************************************/
155	155
156		static ADDRESS_MAP_START( cninja_readmem, ADDRESS_SPACE_PROGRAM, 16 )
157		AM_RANGE(0x000000, 0x0bffff) AM_READ(SMH_ROM)
158		AM_RANGE(0x144000, 0x144fff) AM_READ(SMH_RAM)
159		AM_RANGE(0x146000, 0x146fff) AM_READ(SMH_RAM)
160		AM_RANGE(0x14e000, 0x14e7ff) AM_READ(SMH_RAM)
161		AM_RANGE(0x154000, 0x154fff) AM_READ(SMH_RAM)
162		AM_RANGE(0x156000, 0x156fff) AM_READ(SMH_RAM)
163		AM_RANGE(0x15c000, 0x15c7ff) AM_READ(SMH_RAM)
164		AM_RANGE(0x15e000, 0x15e7ff) AM_READ(SMH_RAM)
165		AM_RANGE(0x184000, 0x187fff) AM_READ(SMH_RAM)
166		AM_RANGE(0x190000, 0x190007) AM_READ(cninja_irq_r)
167		AM_RANGE(0x19c000, 0x19dfff) AM_READ(SMH_RAM)
168		AM_RANGE(0x1a4000, 0x1a47ff) AM_READ(SMH_RAM) /* Sprites */
169		AM_RANGE(0x1bc000, 0x1bcfff) AM_READ(deco16_104_cninja_prot_r) /* Protection device */
170		ADDRESS_MAP_END
	156	static ADDRESS_MAP_START( cninja_map, ADDRESS_SPACE_PROGRAM, 16 )
	157	AM_RANGE(0x000000, 0x0bffff) AM_ROM
171	158
172		static ADDRESS_MAP_START( cninja_writemem, ADDRESS_SPACE_PROGRAM, 16 )
173		AM_RANGE(0x000000, 0x0bffff) AM_WRITE(SMH_ROM)
174
175	159	AM_RANGE(0x140000, 0x14000f) AM_WRITE(SMH_RAM) AM_BASE(&deco16_pf12_control)
176		AM_RANGE(0x144000, 0x144fff) AM_WRITE(deco16_pf1_data_w) AM_BASE(&deco16_pf1_data)
177		AM_RANGE(0x146000, 0x146fff) AM_WRITE(deco16_pf2_data_w) AM_BASE(&deco16_pf2_data)
	160	AM_RANGE(0x144000, 0x144fff) AM_RAM_WRITE(deco16_pf1_data_w) AM_BASE(&deco16_pf1_data)
	161	AM_RANGE(0x146000, 0x146fff) AM_RAM_WRITE(deco16_pf2_data_w) AM_BASE(&deco16_pf2_data)
178	162	AM_RANGE(0x14c000, 0x14c7ff) AM_WRITE(SMH_RAM) AM_BASE(&deco16_pf1_rowscroll)
179		AM_RANGE(0x14e000, 0x14e7ff) AM_WRITE(SMH_RAM) AM_BASE(&deco16_pf2_rowscroll)
	163	AM_RANGE(0x14e000, 0x14e7ff) AM_RAM AM_BASE(&deco16_pf2_rowscroll)
180	164
181	165	AM_RANGE(0x150000, 0x15000f) AM_WRITE(SMH_RAM) AM_BASE(&deco16_pf34_control)
182		AM_RANGE(0x154000, 0x154fff) AM_WRITE(deco16_pf3_data_w) AM_BASE(&deco16_pf3_data)
183		AM_RANGE(0x156000, 0x156fff) AM_WRITE(deco16_pf4_data_w) AM_BASE(&deco16_pf4_data)
184		AM_RANGE(0x15c000, 0x15c7ff) AM_WRITE(SMH_RAM) AM_BASE(&deco16_pf3_rowscroll)
185		AM_RANGE(0x15e000, 0x15e7ff) AM_WRITE(SMH_RAM) AM_BASE(&deco16_pf4_rowscroll)
	166	AM_RANGE(0x154000, 0x154fff) AM_RAM_WRITE(deco16_pf3_data_w) AM_BASE(&deco16_pf3_data)
	167	AM_RANGE(0x156000, 0x156fff) AM_RAM_WRITE(deco16_pf4_data_w) AM_BASE(&deco16_pf4_data)
	168	AM_RANGE(0x15c000, 0x15c7ff) AM_RAM AM_BASE(&deco16_pf3_rowscroll)
	169	AM_RANGE(0x15e000, 0x15e7ff) AM_RAM AM_BASE(&deco16_pf4_rowscroll)
186	170
187		AM_RANGE(0x184000, 0x187fff) AM_WRITE(SMH_RAM) AM_BASE(&cninja_ram) /* Main ram */
188		AM_RANGE(0x190000, 0x190007) AM_WRITE(cninja_irq_w)
189		AM_RANGE(0x19c000, 0x19dfff) AM_WRITE(deco16_nonbuffered_palette_w) AM_BASE(&paletteram16)
190		AM_RANGE(0x1a4000, 0x1a47ff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)
	171	AM_RANGE(0x184000, 0x187fff) AM_RAM AM_BASE(&cninja_ram)
	172	AM_RANGE(0x190000, 0x190007) AM_READWRITE(cninja_irq_r, cninja_irq_w)
	173	AM_RANGE(0x19c000, 0x19dfff) AM_RAM_WRITE(deco16_nonbuffered_palette_w) AM_BASE(&paletteram16)
	174
	175	AM_RANGE(0x1a4000, 0x1a47ff) AM_RAM AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)             /* Sprites */
191	176	AM_RANGE(0x1b4000, 0x1b4001) AM_WRITE(buffer_spriteram16_w) /* DMA flag */
192		AM_RANGE(0x1bc000, 0x1bc0ff) AM_WRITE(deco16_104_cninja_prot_w) AM_BASE(&deco16_prot_ram) /* Protection writes */
	177	AM_RANGE(0x1bc000, 0x1bc0ff) AM_WRITE(deco16_104_cninja_prot_w) AM_BASE(&deco16_prot_ram)       /* Protection writes */
	178	AM_RANGE(0x1bc000, 0x1bcfff) AM_READ(deco16_104_cninja_prot_r) AM_BASE(&deco16_prot_ram)       /* Protection device */
	179
193	180	AM_RANGE(0x308000, 0x308fff) AM_WRITENOP /* Bootleg only */
194	181	ADDRESS_MAP_END
195	182
196		static ADDRESS_MAP_START( edrandy_readmem, ADDRESS_SPACE_PROGRAM, 16 )
197		AM_RANGE(0x000000, 0x0fffff) AM_READ(SMH_ROM)
198		AM_RANGE(0x144000, 0x144fff) AM_READ(SMH_RAM)
199		AM_RANGE(0x144000, 0x144fff) AM_READ(SMH_RAM)
200		AM_RANGE(0x146000, 0x146fff) AM_READ(SMH_RAM)
201		AM_RANGE(0x14c000, 0x14c7ff) AM_READ(SMH_RAM)
202		AM_RANGE(0x14e000, 0x14e7ff) AM_READ(SMH_RAM)
203		AM_RANGE(0x154000, 0x154fff) AM_READ(SMH_RAM)
204		AM_RANGE(0x156000, 0x156fff) AM_READ(SMH_RAM)
205		AM_RANGE(0x15c000, 0x15c7ff) AM_READ(SMH_RAM)
206		AM_RANGE(0x15e000, 0x15e7ff) AM_READ(SMH_RAM)
207		AM_RANGE(0x188000, 0x189fff) AM_READ(SMH_RAM)
208		AM_RANGE(0x194000, 0x197fff) AM_READ(SMH_RAM)
209		AM_RANGE(0x198000, 0x1987ff) AM_READ(deco16_60_prot_r) /* Protection device */
210		AM_RANGE(0x1a4000, 0x1a4007) AM_READ(cninja_irq_r)
211		AM_RANGE(0x1bc000, 0x1bc7ff) AM_READ(SMH_RAM) /* Sprites */
212		ADDRESS_MAP_END
	183	static ADDRESS_MAP_START( edrandy_map, ADDRESS_SPACE_PROGRAM, 16 )
	184	AM_RANGE(0x000000, 0x0fffff) AM_ROM
213	185
214		static ADDRESS_MAP_START( edrandy_writemem, ADDRESS_SPACE_PROGRAM, 16 )
215		AM_RANGE(0x000000, 0x0fffff) AM_WRITE(SMH_ROM)
216
217	186	AM_RANGE(0x140000, 0x14000f) AM_WRITE(SMH_RAM) AM_BASE(&deco16_pf12_control)
218		AM_RANGE(0x144000, 0x144fff) AM_WRITE(deco16_pf1_data_w) AM_BASE(&deco16_pf1_data)
219		AM_RANGE(0x146000, 0x146fff) AM_WRITE(deco16_pf2_data_w) AM_BASE(&deco16_pf2_data)
220		AM_RANGE(0x14c000, 0x14c7ff) AM_WRITE(SMH_RAM) AM_BASE(&deco16_pf1_rowscroll)
221		AM_RANGE(0x14e000, 0x14e7ff) AM_WRITE(SMH_RAM) AM_BASE(&deco16_pf2_rowscroll)
	187	AM_RANGE(0x144000, 0x144fff) AM_RAM_WRITE(deco16_pf1_data_w) AM_BASE(&deco16_pf1_data)
	188	AM_RANGE(0x146000, 0x146fff) AM_RAM_WRITE(deco16_pf2_data_w) AM_BASE(&deco16_pf2_data)
	189	AM_RANGE(0x14c000, 0x14c7ff) AM_RAM AM_BASE(&deco16_pf1_rowscroll)
	190	AM_RANGE(0x14e000, 0x14e7ff) AM_RAM AM_BASE(&deco16_pf2_rowscroll)
222	191
223	192	AM_RANGE(0x150000, 0x15000f) AM_WRITE(SMH_RAM) AM_BASE(&deco16_pf34_control)
224		AM_RANGE(0x154000, 0x154fff) AM_WRITE(deco16_pf3_data_w) AM_BASE(&deco16_pf3_data)
225		AM_RANGE(0x156000, 0x156fff) AM_WRITE(deco16_pf4_data_w) AM_BASE(&deco16_pf4_data)
226		AM_RANGE(0x15c000, 0x15c7ff) AM_WRITE(SMH_RAM) AM_BASE(&deco16_pf3_rowscroll)
227		AM_RANGE(0x15e000, 0x15e7ff) AM_WRITE(SMH_RAM) AM_BASE(&deco16_pf4_rowscroll)
	193	AM_RANGE(0x154000, 0x154fff) AM_RAM_WRITE(deco16_pf3_data_w) AM_BASE(&deco16_pf3_data)
	194	AM_RANGE(0x156000, 0x156fff) AM_RAM_WRITE(deco16_pf4_data_w) AM_BASE(&deco16_pf4_data)
	195	AM_RANGE(0x15c000, 0x15c7ff) AM_RAM AM_BASE(&deco16_pf3_rowscroll)
	196	AM_RANGE(0x15e000, 0x15e7ff) AM_RAM AM_BASE(&deco16_pf4_rowscroll)
228	197
229		AM_RANGE(0x188000, 0x189fff) AM_WRITE(deco16_nonbuffered_palette_w) AM_BASE(&paletteram16)
230		AM_RANGE(0x194000, 0x197fff) AM_WRITE(SMH_RAM) AM_BASE(&cninja_ram) /* Main ram */
231		AM_RANGE(0x198000, 0x1987ff) AM_WRITE(deco16_60_prot_w) AM_BASE(&deco16_prot_ram) /* Protection writes */
	198	AM_RANGE(0x188000, 0x189fff) AM_RAM_WRITE(deco16_nonbuffered_palette_w) AM_BASE(&paletteram16)
	199	AM_RANGE(0x194000, 0x197fff) AM_RAM AM_BASE(&cninja_ram) /* Main ram */
	200	AM_RANGE(0x198000, 0x1987ff) AM_READWRITE(deco16_60_prot_r, deco16_60_prot_w) AM_BASE(&deco16_prot_ram) /* Protection device */
232	201	AM_RANGE(0x199550, 0x199551) AM_WRITENOP /* Looks like a bug in game code, a protection write is referenced off a5 instead of a6 and ends up here */
233	202	AM_RANGE(0x199750, 0x199751) AM_WRITENOP /* Looks like a bug in game code, a protection write is referenced off a5 instead of a6 and ends up here */
234	203
235		AM_RANGE(0x1a4000, 0x1a4007) AM_WRITE(cninja_irq_w)
	204	AM_RANGE(0x1a4000, 0x1a4007) AM_READWRITE(cninja_irq_r, cninja_irq_w)
236	205	AM_RANGE(0x1ac000, 0x1ac001) AM_WRITE(buffer_spriteram16_w) /* DMA flag */
237		AM_RANGE(0x1bc000, 0x1bc7ff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)
	206	AM_RANGE(0x1bc000, 0x1bc7ff) AM_RAM AM_BASE(&spriteram16) AM_SIZE(&spriteram_size) /* Sprites */
238	207	AM_RANGE(0x1bc800, 0x1bcfff) AM_WRITENOP /* Another bug in game code?  Sprite list can overrun.  Doesn't seem to mirror */
239	208	ADDRESS_MAP_END
240	209
241		static ADDRESS_MAP_START( robocop2_readmem, ADDRESS_SPACE_PROGRAM, 16 )
242		AM_RANGE(0x000000, 0x0fffff) AM_READ(SMH_ROM)
243		AM_RANGE(0x180000, 0x1807ff) AM_READ(SMH_RAM)
244		AM_RANGE(0x18c000, 0x18c7ff) AM_READ(robocop2_prot_r) /* Protection device */
245		AM_RANGE(0x1a8000, 0x1a9fff) AM_READ(SMH_RAM)
246		AM_RANGE(0x1b0000, 0x1b0007) AM_READ(cninja_irq_r)
247		AM_RANGE(0x1b8000, 0x1bbfff) AM_READ(SMH_RAM)
248		AM_RANGE(0x144000, 0x144fff) AM_READ(SMH_RAM)
249		AM_RANGE(0x146000, 0x146fff) AM_READ(SMH_RAM)
250		AM_RANGE(0x14c000, 0x14c7ff) AM_READ(SMH_RAM)
251		AM_RANGE(0x14e000, 0x14e7ff) AM_READ(SMH_RAM)
252		AM_RANGE(0x154000, 0x154fff) AM_READ(SMH_RAM)
253		AM_RANGE(0x156000, 0x156fff) AM_READ(SMH_RAM)
254		AM_RANGE(0x15c000, 0x15c7ff) AM_READ(SMH_RAM)
255		AM_RANGE(0x15e000, 0x15e7ff) AM_READ(SMH_RAM)
256		AM_RANGE(0x1f8000, 0x1f8001) AM_READ_PORT("DSW3") /* Dipswitch #3 */
257		ADDRESS_MAP_END
	210	static ADDRESS_MAP_START( robocop2_map, ADDRESS_SPACE_PROGRAM, 16 )
	211	AM_RANGE(0x000000, 0x0fffff) AM_ROM
258	212
259		static ADDRESS_MAP_START( robocop2_writemem, ADDRESS_SPACE_PROGRAM, 16 )
260		AM_RANGE(0x000000, 0x0fffff) AM_WRITE(SMH_ROM)
261	213	AM_RANGE(0x140000, 0x14000f) AM_WRITE(SMH_RAM) AM_BASE(&deco16_pf12_control)
262		AM_RANGE(0x144000, 0x144fff) AM_WRITE(deco16_pf1_data_w) AM_BASE(&deco16_pf1_data)
263		AM_RANGE(0x146000, 0x146fff) AM_WRITE(deco16_pf2_data_w) AM_BASE(&deco16_pf2_data)
264		AM_RANGE(0x14c000, 0x14c7ff) AM_WRITE(SMH_RAM) AM_BASE(&deco16_pf1_rowscroll)
265		AM_RANGE(0x14e000, 0x14e7ff) AM_WRITE(SMH_RAM) AM_BASE(&deco16_pf2_rowscroll)
	214	AM_RANGE(0x144000, 0x144fff) AM_RAM_WRITE(deco16_pf1_data_w) AM_BASE(&deco16_pf1_data)
	215	AM_RANGE(0x146000, 0x146fff) AM_RAM_WRITE(deco16_pf2_data_w) AM_BASE(&deco16_pf2_data)
	216	AM_RANGE(0x14c000, 0x14c7ff) AM_RAM AM_BASE(&deco16_pf1_rowscroll)
	217	AM_RANGE(0x14e000, 0x14e7ff) AM_RAM AM_BASE(&deco16_pf2_rowscroll)
266	218
267	219	AM_RANGE(0x150000, 0x15000f) AM_WRITE(SMH_RAM) AM_BASE(&deco16_pf34_control)
268		AM_RANGE(0x154000, 0x154fff) AM_WRITE(deco16_pf3_data_w) AM_BASE(&deco16_pf3_data)
269		AM_RANGE(0x156000, 0x156fff) AM_WRITE(deco16_pf4_data_w) AM_BASE(&deco16_pf4_data)
270		AM_RANGE(0x15c000, 0x15c7ff) AM_WRITE(SMH_RAM) AM_BASE(&deco16_pf3_rowscroll)
271		AM_RANGE(0x15e000, 0x15e7ff) AM_WRITE(SMH_RAM) AM_BASE(&deco16_pf4_rowscroll)
	220	AM_RANGE(0x154000, 0x154fff) AM_RAM_WRITE(deco16_pf3_data_w) AM_BASE(&deco16_pf3_data)
	221	AM_RANGE(0x156000, 0x156fff) AM_RAM_WRITE(deco16_pf4_data_w) AM_BASE(&deco16_pf4_data)
	222	AM_RANGE(0x15c000, 0x15c7ff) AM_RAM AM_BASE(&deco16_pf3_rowscroll)
	223	AM_RANGE(0x15e000, 0x15e7ff) AM_RAM AM_BASE(&deco16_pf4_rowscroll)
272	224
273		AM_RANGE(0x180000, 0x1807ff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)
274		AM_RANGE(0x18c064, 0x18c065) AM_WRITE(cninja_sound_w)
	225	AM_RANGE(0x180000, 0x1807ff) AM_RAM AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)
275	226	//  AM_RANGE(0x18c000, 0x18c0ff) AM_WRITE(cninja_loopback_w) /* Protection writes */
	227	AM_RANGE(0x18c000, 0x18c7ff) AM_READ(robocop2_prot_r) /* Protection device */
	228	AM_RANGE(0x18c064, 0x18c065) AM_WRITE(cninja_sound_w)
276	229	AM_RANGE(0x198000, 0x198001) AM_WRITE(buffer_spriteram16_w) /* DMA flag */
277		AM_RANGE(0x1a8000, 0x1a9fff) AM_WRITE(deco16_nonbuffered_palette_w) AM_BASE(&paletteram16)
278		AM_RANGE(0x1b0000, 0x1b0007) AM_WRITE(cninja_irq_w)
279		AM_RANGE(0x1b8000, 0x1bbfff) AM_WRITE(SMH_RAM) AM_BASE(&cninja_ram) /* Main ram */
	230	AM_RANGE(0x1a8000, 0x1a9fff) AM_RAM_WRITE(deco16_nonbuffered_palette_w) AM_BASE(&paletteram16)
	231	AM_RANGE(0x1b0000, 0x1b0007) AM_READWRITE(cninja_irq_r, cninja_irq_w)
	232	AM_RANGE(0x1b8000, 0x1bbfff) AM_RAM AM_BASE(&cninja_ram) /* Main ram */
280	233	AM_RANGE(0x1f0000, 0x1f0001) AM_WRITE(deco16_priority_w)
	234	AM_RANGE(0x1f8000, 0x1f8001) AM_READ_PORT("DSW3") /* Dipswitch #3 */
281	235	ADDRESS_MAP_END
282	236
283		static ADDRESS_MAP_START( mutantf_readmem, ADDRESS_SPACE_PROGRAM, 16 )
284		AM_RANGE(0x000000, 0x07ffff) AM_READ(SMH_ROM)
285		AM_RANGE(0x100000, 0x103fff) AM_READ(SMH_RAM)
286		AM_RANGE(0x120000, 0x1207ff) AM_READ(SMH_RAM)
287		AM_RANGE(0x140000, 0x1407ff) AM_READ(SMH_RAM)
288		AM_RANGE(0x160000, 0x161fff) AM_READ(SMH_RAM)
289		AM_RANGE(0x1a0000, 0x1a07ff) AM_READ(deco16_66_prot_r) /* Protection device */
290		AM_RANGE(0x1c0000, 0x1c0001) AM_READ(deco16_71_r)
291
292		AM_RANGE(0x304000, 0x305fff) AM_READ(SMH_RAM)
293		AM_RANGE(0x306000, 0x307fff) AM_READ(SMH_RAM)
294		AM_RANGE(0x308000, 0x3087ff) AM_READ(SMH_RAM)
295		AM_RANGE(0x30a000, 0x30a7ff) AM_READ(SMH_RAM)
296		AM_RANGE(0x314000, 0x315fff) AM_READ(SMH_RAM)
297		AM_RANGE(0x316000, 0x317fff) AM_READ(SMH_RAM)
298		AM_RANGE(0x318000, 0x3187ff) AM_READ(SMH_RAM)
299		AM_RANGE(0x31a000, 0x31a7ff) AM_READ(SMH_RAM)
300		AM_RANGE(0xad00ac, 0xad00ff) AM_READNOP /* Reads from here seem to be a game code bug */
301		ADDRESS_MAP_END
302
303		static ADDRESS_MAP_START( mutantf_writemem, ADDRESS_SPACE_PROGRAM, 16 )
304		AM_RANGE(0x000000, 0x07ffff) AM_WRITE(SMH_ROM)
305		AM_RANGE(0x100000, 0x103fff) AM_WRITE(SMH_RAM) /* Main ram */
306		AM_RANGE(0x120000, 0x1207ff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)
307		AM_RANGE(0x140000, 0x1407ff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16_2) AM_SIZE(&spriteram_2_size)
308		AM_RANGE(0x160000, 0x161fff) AM_WRITE(deco16_nonbuffered_palette_w) AM_BASE(&paletteram16)
	237	static ADDRESS_MAP_START( mutantf_map, ADDRESS_SPACE_PROGRAM, 16 )
	238	AM_RANGE(0x000000, 0x07ffff) AM_ROM
	239	AM_RANGE(0x100000, 0x103fff) AM_RAM
	240	AM_RANGE(0x120000, 0x1207ff) AM_RAM AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)
	241	AM_RANGE(0x140000, 0x1407ff) AM_RAM AM_BASE(&spriteram16_2) AM_SIZE(&spriteram_2_size)
	242	AM_RANGE(0x160000, 0x161fff) AM_RAM_WRITE(deco16_nonbuffered_palette_w) AM_BASE(&paletteram16)
309	243	AM_RANGE(0x180000, 0x180001) AM_WRITE(deco16_priority_w)
310	244	AM_RANGE(0x180002, 0x180003) AM_WRITENOP /* VBL irq ack */
311		AM_RANGE(0x1a0000, 0x1a07ff) AM_WRITE(deco16_66_prot_w) AM_BASE(&deco16_prot_ram) /* Protection writes */
312		AM_RANGE(0x1c0000, 0x1c0001) AM_WRITE(buffer_spriteram16_w)
	245	AM_RANGE(0x1a0000, 0x1a07ff) AM_READWRITE(deco16_66_prot_r, deco16_66_prot_w) AM_BASE(&deco16_prot_ram) /* Protection device */
	246	AM_RANGE(0x1c0000, 0x1c0001) AM_READWRITE(deco16_71_r, buffer_spriteram16_w)
313	247	AM_RANGE(0x1e0000, 0x1e0001) AM_WRITE(buffer_spriteram16_2_w)
314	248
315	249	AM_RANGE(0x300000, 0x30000f) AM_WRITE(SMH_RAM) AM_BASE(&deco16_pf12_control)
316		AM_RANGE(0x304000, 0x305fff) AM_WRITE(deco16_pf1_data_w) AM_BASE(&deco16_pf1_data)
317		AM_RANGE(0x306000, 0x307fff) AM_WRITE(deco16_pf2_data_w) AM_BASE(&deco16_pf2_data)
318		AM_RANGE(0x308000, 0x3087ff) AM_WRITE(SMH_RAM) AM_BASE(&deco16_pf1_rowscroll)
319		AM_RANGE(0x30a000, 0x30a7ff) AM_WRITE(SMH_RAM) AM_BASE(&deco16_pf2_rowscroll)
	250	AM_RANGE(0x304000, 0x305fff) AM_RAM_WRITE(deco16_pf1_data_w) AM_BASE(&deco16_pf1_data)
	251	AM_RANGE(0x306000, 0x307fff) AM_RAM_WRITE(deco16_pf2_data_w) AM_BASE(&deco16_pf2_data)
	252	AM_RANGE(0x308000, 0x3087ff) AM_RAM AM_BASE(&deco16_pf1_rowscroll)
	253	AM_RANGE(0x30a000, 0x30a7ff) AM_RAM AM_BASE(&deco16_pf2_rowscroll)
320	254
321	255	AM_RANGE(0x310000, 0x31000f) AM_WRITE(SMH_RAM) AM_BASE(&deco16_pf34_control)
322		AM_RANGE(0x314000, 0x315fff) AM_WRITE(deco16_pf3_data_w) AM_BASE(&deco16_pf3_data)
323		AM_RANGE(0x316000, 0x317fff) AM_WRITE(deco16_pf4_data_w) AM_BASE(&deco16_pf4_data)
324		AM_RANGE(0x318000, 0x3187ff) AM_WRITE(SMH_RAM) AM_BASE(&deco16_pf3_rowscroll)
325		AM_RANGE(0x31a000, 0x31a7ff) AM_WRITE(SMH_RAM) AM_BASE(&deco16_pf4_rowscroll)
	256	AM_RANGE(0x314000, 0x315fff) AM_RAM_WRITE(deco16_pf3_data_w) AM_BASE(&deco16_pf3_data)
	257	AM_RANGE(0x316000, 0x317fff) AM_RAM_WRITE(deco16_pf4_data_w) AM_BASE(&deco16_pf4_data)
	258	AM_RANGE(0x318000, 0x3187ff) AM_RAM AM_BASE(&deco16_pf3_rowscroll)
	259	AM_RANGE(0x31a000, 0x31a7ff) AM_RAM AM_BASE(&deco16_pf4_rowscroll)
	260
	261	AM_RANGE(0xad00ac, 0xad00ff) AM_READNOP /* Reads from here seem to be a game code bug */
326	262	ADDRESS_MAP_END
327	263
328	264	/******************************************************************************/
329	265
330		static ADDRESS_MAP_START( sound_readmem, ADDRESS_SPACE_PROGRAM, 8 )
331		AM_RANGE(0x000000, 0x00ffff) AM_READ(SMH_ROM)
332		AM_RANGE(0x100000, 0x100001) AM_DEVREAD("ym1", ym2203_r)
333		AM_RANGE(0x110000, 0x110001) AM_DEVREAD("ym2", ym2151_r)
334		AM_RANGE(0x120000, 0x120001) AM_DEVREAD("oki1", okim6295_r)
335		AM_RANGE(0x130000, 0x130001) AM_DEVREAD("oki2", okim6295_r)
	266	static ADDRESS_MAP_START( sound_map, ADDRESS_SPACE_PROGRAM, 8 )
	267	AM_RANGE(0x000000, 0x00ffff) AM_ROM
	268	AM_RANGE(0x100000, 0x100001) AM_DEVREADWRITE("ym1", ym2203_r, ym2203_w)
	269	AM_RANGE(0x110000, 0x110001) AM_DEVREADWRITE("ym2", ym2151_r, ym2151_w)
	270	AM_RANGE(0x120000, 0x120001) AM_DEVREADWRITE("oki1", okim6295_r, okim6295_w)
	271	AM_RANGE(0x130000, 0x130001) AM_DEVREADWRITE("oki2", okim6295_r, okim6295_w)
336	272	AM_RANGE(0x140000, 0x140001) AM_READ(soundlatch_r)
337		AM_RANGE(0x1f0000, 0x1f1fff) AM_READ(SMH_BANK8)
338		ADDRESS_MAP_END
339
340		static ADDRESS_MAP_START( sound_writemem, ADDRESS_SPACE_PROGRAM, 8 )
341		AM_RANGE(0x000000, 0x00ffff) AM_WRITE(SMH_ROM)
342		AM_RANGE(0x100000, 0x100001) AM_DEVWRITE("ym1", ym2203_w)
343		AM_RANGE(0x110000, 0x110001) AM_DEVWRITE("ym2", ym2151_w)
344		AM_RANGE(0x120000, 0x120001) AM_DEVWRITE("oki1", okim6295_w)
345		AM_RANGE(0x130000, 0x130001) AM_DEVWRITE("oki2", okim6295_w)
346		AM_RANGE(0x1f0000, 0x1f1fff) AM_WRITE(SMH_BANK8)
	273	AM_RANGE(0x1f0000, 0x1f1fff) AM_RAMBANK(8)
347	274	AM_RANGE(0x1fec00, 0x1fec01) AM_WRITE(h6280_timer_w)
348	275	AM_RANGE(0x1ff400, 0x1ff403) AM_WRITE(h6280_irq_status_w)
349	276	ADDRESS_MAP_END
350	277
351		static ADDRESS_MAP_START( sound_readmem_mutantf, ADDRESS_SPACE_PROGRAM, 8 )
352		AM_RANGE(0x000000, 0x00ffff) AM_READ(SMH_ROM)
353		AM_RANGE(0x100000, 0x100001) AM_READNOP
354		AM_RANGE(0x110000, 0x110001) AM_DEVREAD("ym", ym2151_r)
355		AM_RANGE(0x120000, 0x120001) AM_DEVREAD("oki1", okim6295_r)
356		AM_RANGE(0x130000, 0x130001) AM_DEVREAD("oki2", okim6295_r)
	278	static ADDRESS_MAP_START( sound_map_mutantf, ADDRESS_SPACE_PROGRAM, 8 )
	279	AM_RANGE(0x000000, 0x00ffff) AM_ROM
	280	AM_RANGE(0x100000, 0x100001) AM_READNOP AM_WRITENOP
	281	AM_RANGE(0x110000, 0x110001) AM_DEVREADWRITE("ym", ym2151_r, ym2151_w)
	282	AM_RANGE(0x120000, 0x120001) AM_DEVREADWRITE("oki1", okim6295_r, okim6295_w)
	283	AM_RANGE(0x130000, 0x130001) AM_DEVREADWRITE("oki2", okim6295_r, okim6295_w)
357	284	AM_RANGE(0x140000, 0x140001) AM_READ(soundlatch_r)
358		AM_RANGE(0x1f0000, 0x1f1fff) AM_READ(SMH_BANK8)
359		ADDRESS_MAP_END
360
361		static ADDRESS_MAP_START( sound_writemem_mutantf, ADDRESS_SPACE_PROGRAM, 8 )
362		AM_RANGE(0x000000, 0x00ffff) AM_WRITE(SMH_ROM)
363		AM_RANGE(0x100000, 0x100001) AM_WRITENOP
364		AM_RANGE(0x110000, 0x110001) AM_DEVWRITE("ym", ym2151_w)
365		AM_RANGE(0x120000, 0x120001) AM_DEVWRITE("oki1", okim6295_w)
366		AM_RANGE(0x130000, 0x130001) AM_DEVWRITE("oki2", okim6295_w)
367		AM_RANGE(0x1f0000, 0x1f1fff) AM_WRITE(SMH_BANK8)
	285	AM_RANGE(0x1f0000, 0x1f1fff) AM_RAMBANK(8)
368	286	AM_RANGE(0x1fec00, 0x1fec01) AM_WRITE(h6280_timer_w)
369	287	AM_RANGE(0x1ff400, 0x1ff403) AM_WRITE(h6280_irq_status_w)
370	288	ADDRESS_MAP_END
371	289
372		static ADDRESS_MAP_START( stoneage_s_readmem, ADDRESS_SPACE_PROGRAM, 8 )
373		AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM)
374		AM_RANGE(0x8000, 0x87ff) AM_READ(SMH_RAM)
375		AM_RANGE(0x8800, 0x8801) AM_DEVREAD("ym", ym2151_r)
	290	static ADDRESS_MAP_START( stoneage_s_map, ADDRESS_SPACE_PROGRAM, 8 )
	291	AM_RANGE(0x0000, 0x7fff) AM_ROM
	292	AM_RANGE(0x8000, 0x87ff) AM_RAM
	293	AM_RANGE(0x8800, 0x8801) AM_DEVREADWRITE("ym", ym2151_r, ym2151_w)
376	294	AM_RANGE(0xa000, 0xa000) AM_READ(soundlatch_r)
377		AM_RANGE(0x9800, 0x9800) AM_DEVREAD("oki1", okim6295_r)
	295	AM_RANGE(0x9800, 0x9800) AM_DEVREADWRITE("oki1", okim6295_r, okim6295_w)
378	296	ADDRESS_MAP_END
379	297
380		static ADDRESS_MAP_START( stoneage_s_writemem, ADDRESS_SPACE_PROGRAM, 8 )
381		AM_RANGE(0x0000, 0x7fff) AM_WRITE(SMH_ROM)
382		AM_RANGE(0x8000, 0x87ff) AM_WRITE(SMH_RAM)
383		AM_RANGE(0x8800, 0x8801) AM_DEVWRITE("ym", ym2151_w)
384		AM_RANGE(0x9800, 0x9800) AM_DEVWRITE("oki1", okim6295_w)
385		ADDRESS_MAP_END
386
387	298	/***********************************************************
388	299	Basic INPUT PORTS, DIPs
389	300	***********************************************************/
r4679	r4680
750	661
751	662	static void sound_irq(const device_config *device, int state)
752	663	{
753		cpu_set_input_line(device->machine->cpu[1],1,state); /* IRQ 2 */
	664	cputag_set_input_line(device->machine, "audiocpu", 1, state); /* IRQ 2 */
754	665	}
755	666
756	667	static void sound_irq2(const device_config *device, int state)
757	668	{
758		cpu_set_input_line(device->machine->cpu[1],0,state);
	669	cputag_set_input_line(device->machine, "audiocpu", 0, state);
759	670	}
760	671
761	672	static WRITE8_DEVICE_HANDLER( sound_bankswitch_w )
r4679	r4680
781	692
782	693	/* basic machine hardware */
783	694	MDRV_CPU_ADD("maincpu", M68000, 12000000)
784		MDRV_CPU_PROGRAM_MAP(cninja_readmem,cninja_writemem)
	695	MDRV_CPU_PROGRAM_MAP(cninja_map,0)
785	696	MDRV_CPU_VBLANK_INT("screen", irq5_line_hold)
786	697
787	698	MDRV_CPU_ADD("audiocpu", H6280,32220000/8)   /* Accurate */
788		MDRV_CPU_PROGRAM_MAP(sound_readmem,sound_writemem)
	699	MDRV_CPU_PROGRAM_MAP(sound_map,0)
789	700
790	701	MDRV_MACHINE_RESET(cninja)
791	702
r4679	r4680
829	740
830	741	/* basic machine hardware */
831	742	MDRV_CPU_ADD("maincpu", M68000, 12000000)
832		MDRV_CPU_PROGRAM_MAP(cninja_readmem,cninja_writemem)
	743	MDRV_CPU_PROGRAM_MAP(cninja_map,0)
833	744	MDRV_CPU_VBLANK_INT("screen", irq5_line_hold)
834	745
835	746	MDRV_CPU_ADD("audiocpu", Z80, 3579545)
836		MDRV_CPU_PROGRAM_MAP(stoneage_s_readmem,stoneage_s_writemem)
	747	MDRV_CPU_PROGRAM_MAP(stoneage_s_map,0)
837	748
838	749	MDRV_MACHINE_RESET(cninja)
839	750
r4679	r4680
874	785
875	786	/* basic machine hardware */
876	787	MDRV_CPU_ADD("maincpu", M68000, 12000000)
877		MDRV_CPU_PROGRAM_MAP(edrandy_readmem,edrandy_writemem)
	788	MDRV_CPU_PROGRAM_MAP(edrandy_map,0)
878	789	MDRV_CPU_VBLANK_INT("screen", irq5_line_hold)
879	790
880	791	MDRV_CPU_ADD("audiocpu", H6280,32220000/8)   /* Accurate */
881		MDRV_CPU_PROGRAM_MAP(sound_readmem,sound_writemem)
	792	MDRV_CPU_PROGRAM_MAP(sound_map,0)
882	793
883	794	MDRV_MACHINE_RESET(cninja)
884	795
r4679	r4680
922	833
923	834	/* basic machine hardware */
924	835	MDRV_CPU_ADD("maincpu", M68000, 14000000)
925		MDRV_CPU_PROGRAM_MAP(robocop2_readmem,robocop2_writemem)
	836	MDRV_CPU_PROGRAM_MAP(robocop2_map,0)
926	837	MDRV_CPU_VBLANK_INT("screen", irq5_line_hold)
927	838
928	839	MDRV_CPU_ADD("audiocpu", H6280,32220000/8)   /* Accurate */
929		MDRV_CPU_PROGRAM_MAP(sound_readmem,sound_writemem)
	840	MDRV_CPU_PROGRAM_MAP(sound_map,0)
930	841
931	842	MDRV_MACHINE_RESET(cninja)
932	843
r4679	r4680
973	884
974	885	/* basic machine hardware */
975	886	MDRV_CPU_ADD("maincpu", M68000, 14000000)
976		MDRV_CPU_PROGRAM_MAP(mutantf_readmem,mutantf_writemem)
	887	MDRV_CPU_PROGRAM_MAP(mutantf_map,0)
977	888	MDRV_CPU_VBLANK_INT("screen", irq6_line_hold)
978	889
979	890	MDRV_CPU_ADD("audiocpu", H6280,32220000/8)
980		MDRV_CPU_PROGRAM_MAP(sound_readmem_mutantf,sound_writemem_mutantf)
	891	MDRV_CPU_PROGRAM_MAP(sound_map_mutantf,0)
981	892
982	893	/* video hardware */
983	894	MDRV_VIDEO_ATTRIBUTES(VIDEO_BUFFERS_SPRITERAM )
r4679	r4680
1770	1681
1771	1682	static DRIVER_INIT( cninja )
1772	1683	{
1773		memory_install_write16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x1bc0a8, 0x1bc0a9, 0, 0, cninja_sound_w);
	1684	memory_install_write16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x1bc0a8, 0x1bc0a9, 0, 0, cninja_sound_w);
1774	1685	cninja_patch(machine);
1775	1686	}
1776	1687
1777	1688	static DRIVER_INIT( stoneage )
1778	1689	{
1779		memory_install_write16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x1bc0a8, 0x1bc0a9, 0, 0, stoneage_sound_w);
	1690	memory_install_write16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x1bc0a8, 0x1bc0a9, 0, 0, stoneage_sound_w);
1780	1691	}
1781	1692
1782	1693	static DRIVER_INIT( mutantf )

src/mame/drivers/pacland.c

r4679	r4680
194	194	static WRITE8_HANDLER( pacland_subreset_w )
195	195	{
196	196	int bit = !BIT(offset,11);
197		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_RESET, bit ? CLEAR_LINE : ASSERT_LINE);
	197	cputag_set_input_line(space->machine, "mcu", INPUT_LINE_RESET, bit ? CLEAR_LINE : ASSERT_LINE);
198	198	}
199	199
200	200	static WRITE8_HANDLER( pacland_flipscreen_w )
r4679	r4680
212	212	int port = offset & 2;
213	213	static const char *const portnames[] = { "DSWA", "DSWB", "IN0", "IN1" };
214	214	int r = (input_port_read(space->machine, portnames[port]) << shift) & 0xf0;
215		r |= (input_port_read(space->machine, portnames[port+1]) >> (4-shift)) & 0x0f;
	215	r |= (input_port_read(space->machine, portnames[port+1]) >> (4 - shift)) & 0x0f;
216	216
217	217	return r;
218	218	}
r4679	r4680
220	220	static WRITE8_HANDLER( pacland_coin_w )
221	221	{
222	222	coin_lockout_global_w(data & 1);
223		coin_counter_w(0,~data & 2);
224		coin_counter_w(1,~data & 4);
	223	coin_counter_w(0, ~data & 2);
	224	coin_counter_w(1, ~data & 4);
225	225	}
226	226
227	227	static WRITE8_HANDLER( pacland_led_w )
228	228	{
229		set_led_status(0,data & 0x08);
230		set_led_status(1,data & 0x10);
	229	set_led_status(0, data & 0x08);
	230	set_led_status(1, data & 0x10);
231	231	}
232	232
233	233	static WRITE8_HANDLER( pacland_irq_1_ctrl_w )
234	234	{
235		int bit = !BIT(offset,11);
236		cpu_interrupt_enable(space->machine->cpu[0],bit);
	235	int bit = !BIT(offset, 11);
	236	cpu_interrupt_enable(cputag_get_cpu(space->machine, "maincpu"), bit);
237	237	if (!bit)
238		cpu_set_input_line(space->machine->cpu[0], 0, CLEAR_LINE);
	238	cputag_set_input_line(space->machine, "maincpu", 0, CLEAR_LINE);
239	239	}
240	240
241	241	static WRITE8_HANDLER( pacland_irq_2_ctrl_w )
242	242	{
243		int bit = !BIT(offset,13);
244		cpu_interrupt_enable(space->machine->cpu[1],bit);
	243	int bit = !BIT(offset, 13);
	244	cpu_interrupt_enable(cputag_get_cpu(space->machine, "mcu"), bit);
245	245	if (!bit)
246		cpu_set_input_line(space->machine->cpu[1], 0, CLEAR_LINE);
	246	cputag_set_input_line(space->machine, "mcu", 0, CLEAR_LINE);
247	247	}
248	248
249	249
r4679	r4680
255	255	AM_RANGE(0x3800, 0x3801) AM_WRITE(pacland_scroll0_w)
256	256	AM_RANGE(0x3a00, 0x3a01) AM_WRITE(pacland_scroll1_w)
257	257	AM_RANGE(0x3c00, 0x3c00) AM_WRITE(pacland_bankswitch_w)
258		AM_RANGE(0x4000, 0x5fff) AM_READ(SMH_BANK1)
	258	AM_RANGE(0x4000, 0x5fff) AM_READ(SMH_BANK(1))
259	259	AM_RANGE(0x6800, 0x6bff) AM_DEVREADWRITE("namco", namcos1_cus30_r, namcos1_cus30_w)      /* PSG device, shared RAM */
260	260	AM_RANGE(0x7000, 0x7fff) AM_WRITE(pacland_irq_1_ctrl_w)
261	261	AM_RANGE(0x7800, 0x7fff) AM_READ(watchdog_reset_r)

src/mame/drivers/psikyo4.c

r4679	r4680
191	191	UINT32 length, size;
192	192	UINT8 *dat;
193	193
194		dat = eeprom_get_data_pointer(&length, &size);
	194	dat = (UINT8 *)eeprom_get_data_pointer(&length, &size);
195	195	memset(dat, 0, length * size);
196	196	}
197	197	}
r4679	r4680
391	391	set_hotgmck_pcm_bank(space->machine, 1);
392	392	}
393	393
394		static ADDRESS_MAP_START( ps4_readmem, ADDRESS_SPACE_PROGRAM, 32 )
395		AM_RANGE(0x00000000, 0x000fffff) AM_READ(SMH_ROM)   // program ROM (1 meg)
396		AM_RANGE(0x02000000, 0x021fffff) AM_READ(SMH_BANK1) // data ROM
397		AM_RANGE(0x03000000, 0x030037ff) AM_READ(SMH_RAM)
398		AM_RANGE(0x03003fe0, 0x03003fe3) AM_READ(ps4_eeprom_r)
	394	static ADDRESS_MAP_START( ps4_map, ADDRESS_SPACE_PROGRAM, 32 )
	395	AM_RANGE(0x00000000, 0x000fffff) AM_ROM      // program ROM (1 meg)
	396	AM_RANGE(0x02000000, 0x021fffff) AM_ROMBANK(1) // data ROM
	397	AM_RANGE(0x03000000, 0x030037ff) AM_RAM AM_BASE(&spriteram32) AM_SIZE(&spriteram_size)
	398	AM_RANGE(0x03003fe0, 0x03003fe3) AM_READWRITE(ps4_eeprom_r,ps4_eeprom_w)
399	399	AM_RANGE(0x03003fe4, 0x03003fe7) AM_READNOP // also writes to this address - might be vblank?
400		//  AM_RANGE(0x03003fe8, 0x03003fef) AM_READ(SMH_RAM) // vid regs?
401		AM_RANGE(0x03004000, 0x03005fff) AM_READ(SMH_RAM)
	400	//  AM_RANGE(0x03003fe4, 0x03003fe7) AM_WRITENOP // might be vblank?
	401	AM_RANGE(0x03003fe4, 0x03003fef) AM_RAM_WRITE(ps4_vidregs_w) AM_BASE(&psikyo4_vidregs) // vid regs?
	402	AM_RANGE(0x03003ff0, 0x03003ff3) AM_WRITE(ps4_screen1_brt_w) // screen 1 brightness
	403	AM_RANGE(0x03003ff4, 0x03003ff7) AM_WRITE(ps4_bgpen_1_dword_w) AM_BASE(&bgpen_1) // screen 1 clear colour
	404	AM_RANGE(0x03003ff8, 0x03003ffb) AM_WRITE(ps4_screen2_brt_w) // screen 2 brightness
	405	AM_RANGE(0x03003ffc, 0x03003fff) AM_WRITE(ps4_bgpen_2_dword_w) AM_BASE(&bgpen_2) // screen 2 clear colour
	406	AM_RANGE(0x03004000, 0x03005fff) AM_RAM_WRITE(ps4_paletteram32_RRRRRRRRGGGGGGGGBBBBBBBBxxxxxxxx_dword_w) AM_BASE(&paletteram32) // palette
402	407	AM_RANGE(0x05000000, 0x05000003) AM_DEVREAD8("ymf", ymf278b_r, 0xffffffff) // read YMF status
	408	AM_RANGE(0x05000000, 0x05000007) AM_DEVWRITE8("ymf", ymf278b_w, 0xffffffff)
403	409	AM_RANGE(0x05800000, 0x05800003) AM_READ_PORT("P1_P2")
404	410	AM_RANGE(0x05800004, 0x05800007) AM_READ_PORT("P3_P4")
405		AM_RANGE(0x06000000, 0x060fffff) AM_READ(SMH_RAM)   // main RAM (1 meg)
	411	AM_RANGE(0x05800008, 0x0580000b) AM_WRITEONLY AM_BASE(&ps4_io_select) // Used by Mahjong games to choose input (also maps normal loderndf inputs to offsets)
406	412
	413	AM_RANGE(0x06000000, 0x060fffff) AM_RAM   AM_BASE(&ps4_ram) // main RAM (1 meg)
	414
407	415	#if ROMTEST
408	416	AM_RANGE(0x05000004, 0x05000007) AM_READ(ps4_sample_r) // data for rom tests (Used to verify Sample rom)
409		AM_RANGE(0x03006000, 0x03007fff) AM_READ(SMH_BANK2) // data for rom tests (gfx), data is controlled by vidreg
	417	AM_RANGE(0x03006000, 0x03007fff) AM_ROMBANK(2) // data for rom tests (gfx), data is controlled by vidreg
410	418	#endif
411	419	ADDRESS_MAP_END
412	420
413		static ADDRESS_MAP_START( ps4_writemem, ADDRESS_SPACE_PROGRAM, 32 )
414		AM_RANGE(0x00000000, 0x000fffff) AM_WRITE(SMH_ROM)   // program ROM (1 meg)
415		AM_RANGE(0x03000000, 0x030037ff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram32) AM_SIZE(&spriteram_size)
416		AM_RANGE(0x03003fe0, 0x03003fe3) AM_WRITE(ps4_eeprom_w)
417		//  AM_RANGE(0x03003fe4, 0x03003fe7) AM_WRITENOP // might be vblank?
418		AM_RANGE(0x03003fe4, 0x03003fef) AM_WRITE(ps4_vidregs_w) AM_BASE(&psikyo4_vidregs) // vid regs?
419		AM_RANGE(0x03003ff0, 0x03003ff3) AM_WRITE(ps4_screen1_brt_w) // screen 1 brightness
420		AM_RANGE(0x03003ff4, 0x03003ff7) AM_WRITE(ps4_bgpen_1_dword_w) AM_BASE(&bgpen_1) // screen 1 clear colour
421		AM_RANGE(0x03003ff8, 0x03003ffb) AM_WRITE(ps4_screen2_brt_w) // screen 2 brightness
422		AM_RANGE(0x03003ffc, 0x03003fff) AM_WRITE(ps4_bgpen_2_dword_w) AM_BASE(&bgpen_2) // screen 2 clear colour
423		AM_RANGE(0x03004000, 0x03005fff) AM_WRITE(ps4_paletteram32_RRRRRRRRGGGGGGGGBBBBBBBBxxxxxxxx_dword_w) AM_BASE(&paletteram32) // palette
424		AM_RANGE(0x05000000, 0x05000007) AM_DEVWRITE8("ymf", ymf278b_w, 0xffffffff)
425		AM_RANGE(0x05800008, 0x0580000b) AM_WRITE(SMH_RAM) AM_BASE(&ps4_io_select) // Used by Mahjong games to choose input (also maps normal loderndf inputs to offsets)
426		AM_RANGE(0x06000000, 0x060fffff) AM_WRITE(SMH_RAM) AM_BASE(&ps4_ram)   // work RAM
427		ADDRESS_MAP_END
428
429	421	static void irqhandler(const device_config *device, int linestate)
430	422	{
431	423	if (linestate)
432		cpu_set_input_line(device->machine->cpu[0], 12, ASSERT_LINE);
	424	cputag_set_input_line(device->machine, "maincpu", 12, ASSERT_LINE);
433	425	else
434		cpu_set_input_line(device->machine->cpu[0], 12, CLEAR_LINE);
	426	cputag_set_input_line(device->machine, "maincpu", 12, CLEAR_LINE);
435	427	}
436	428
437	429	static const ymf278b_interface ymf278b_config =
r4679	r4680
442	434	static MACHINE_DRIVER_START( ps4big )
443	435	/* basic machine hardware */
444	436	MDRV_CPU_ADD("maincpu", SH2, MASTER_CLOCK/2)
445		MDRV_CPU_PROGRAM_MAP(ps4_readmem,ps4_writemem)
	437	MDRV_CPU_PROGRAM_MAP(ps4_map,0)
446	438	MDRV_CPU_VBLANK_INT("lscreen", psikyosh_interrupt)
447	439
448	440	MDRV_NVRAM_HANDLER(93C56)
r4679	r4680
1059	1051	set_hotgmck_pcm_bank(machine, 0);
1060	1052	set_hotgmck_pcm_bank(machine, 1);
1061	1053
1062		memory_install_write32_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x5800008, 0x580000b, 0, 0, hotgmck_pcm_bank_w );
	1054	memory_install_write32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x5800008, 0x580000b, 0, 0, hotgmck_pcm_bank_w );
1063	1055	state_save_register_postload(machine, hotgmck_pcm_bank_postload, (void *)0);
1064	1056	state_save_register_postload(machine, hotgmck_pcm_bank_postload, (void *)1);
1065	1057	}
r4679	r4680
1067	1059	static DRIVER_INIT( hotgmck )
1068	1060	{
1069	1061	UINT8 *RAM = memory_region(machine, "maincpu");
1070		memory_set_bankptr(machine, 1,&RAM[0x100000]);
	1062	memory_set_bankptr(machine, 1, &RAM[0x100000]);
1071	1063	install_hotgmck_pcm_bank(machine);   // Banked PCM ROM
1072	1064	}
1073	1065
1074	1066	static DRIVER_INIT( loderndf )
1075	1067	{
1076		memory_install_read32_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x6000020, 0x6000023, 0, 0, loderndf_speedup_r );
	1068	memory_install_read32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x6000020, 0x6000023, 0, 0, loderndf_speedup_r );
1077	1069	}
1078	1070
1079	1071	static DRIVER_INIT( loderdfa )
1080	1072	{
1081		memory_install_read32_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x6000020, 0x6000023, 0, 0, loderdfa_speedup_r );
	1073	memory_install_read32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x6000020, 0x6000023, 0, 0, loderdfa_speedup_r );
1082	1074	}
1083	1075
1084	1076	static DRIVER_INIT( hotdebut )
1085	1077	{
1086		memory_install_read32_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x600001c, 0x600001f, 0, 0, hotdebut_speedup_r );
	1078	memory_install_read32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x600001c, 0x600001f, 0, 0, hotdebut_speedup_r );
1087	1079	}
1088	1080
1089	1081

src/mame/drivers/wardner.c

r4679	r4680
141	141	const address_space *mainspace;
142	142	UINT8 *RAM = memory_region(space->machine, "maincpu");
143	143
144		mainspace = cpu_get_address_space(space->machine->cpu[0], ADDRESS_SPACE_PROGRAM);
	144	mainspace = cputag_get_address_space(space->machine, "maincpu", ADDRESS_SPACE_PROGRAM);
145	145	wardner_membank = data;
146	146
147	147	if (data)
148	148	{
149		memory_install_read8_handler(mainspace, 0x8000, 0xffff, 0, 0, SMH_BANK1);
	149	memory_install_read8_handler(mainspace, 0x8000, 0xffff, 0, 0, (read8_space_func)SMH_BANK(1));
150	150	switch (data)
151	151	{
152	152	case 2:  bankaddress = 0x10000; break;
r4679	r4680
163	163	else
164	164	{
165	165	memory_install_read8_handler(mainspace, 0x8000, 0x8fff, 0, 0, wardner_sprite_r);
166		memory_install_read8_handler(mainspace, 0xa000, 0xadff, 0, 0, SMH_BANK4);
167		memory_install_read8_handler(mainspace, 0xae00, 0xafff, 0, 0, SMH_BANK2);
168		memory_install_read8_handler(mainspace, 0xc000, 0xc7ff, 0, 0, SMH_BANK3);
	166	memory_install_read8_handler(mainspace, 0xa000, 0xadff, 0, 0, (read8_space_func)SMH_BANK(4));
	167	memory_install_read8_handler(mainspace, 0xae00, 0xafff, 0, 0, (read8_space_func)SMH_BANK(2));
	168	memory_install_read8_handler(mainspace, 0xc000, 0xc7ff, 0, 0, (read8_space_func)SMH_BANK(3));
169	169	memory_set_bankptr(space->machine, 1, &RAM[0x0000]);
170	170	memory_set_bankptr(space->machine, 2, rambase_ae00);
171	171	memory_set_bankptr(space->machine, 3, rambase_c000);
r4679	r4680
176	176
177	177	STATE_POSTLOAD( wardner_restore_bank )
178	178	{
179		const address_space *space = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM);
	179	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
180	180
181	181	wardner_ramrom_bank_sw(space,0,1);   /* Dummy value to ensure restoration */
182	182	wardner_ramrom_bank_sw(space,0,wardner_membank);
r4679	r4680
189	189	AM_RANGE(0x0000, 0x6fff) AM_ROM
190	190	AM_RANGE(0x7000, 0x7fff) AM_RAM
191	191
192		AM_RANGE(0x8000, 0xffff) AM_READ(SMH_BANK1) /* Overlapped RAM/Banked ROM - See below */
	192	AM_RANGE(0x8000, 0xffff) AM_READ(SMH_BANK(1)) /* Overlapped RAM/Banked ROM - See below */
193	193
194	194	AM_RANGE(0x8000, 0x8fff) AM_WRITE(wardner_sprite_w) AM_BASE((void *)&spriteram16) AM_SIZE(&spriteram_size)
195	195	AM_RANGE(0x9000, 0x9fff) AM_ROM
r4679	r4680
417	417	/* handler called by the 3812 emulator when the internal timers cause an IRQ */
418	418	static void irqhandler(const device_config *device, int linestate)
419	419	{
420		cpu_set_input_line(device->machine->cpu[1],0,linestate);
	420	cputag_set_input_line(device->machine, "audiocpu", 0, linestate);
421	421	}
422	422
423	423	static const ym3812_interface ym3812_config =

src/mame/drivers/rollrace.c

r4679	r4680
1	1	/***************************************************************************
2	2
	3	Fighting Roller (c) 1983 Kaneko
	4
3	5	Issues:
4	6	-sound effects missing
	7
5	8	***************************************************************************/
6	9
7	10	#include "driver.h"
r4679	r4680
34	37	/*  logerror("d900: %02X\n",data);*/
35	38	}
36	39
37		static ADDRESS_MAP_START( readmem, ADDRESS_SPACE_PROGRAM, 8 )
38		AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM)
39		AM_RANGE(0x8000, 0x9fff) AM_READ(SMH_ROM) /* only rollace2 */
40		AM_RANGE(0xc000, 0xcfff) AM_READ(SMH_RAM)
41		AM_RANGE(0xd900, 0xd900) AM_READ(ra_fake_d800_r) /* protection ??*/
42		AM_RANGE(0xe000, 0xe3ff) AM_READ(SMH_RAM)
43		AM_RANGE(0xe400, 0xe47f) AM_READ(SMH_RAM)
44		AM_RANGE(0xec00, 0xec0f) AM_READNOP /* Analog sound effects ??*/
45		AM_RANGE(0xf000, 0xf0ff) AM_READ(SMH_RAM)
	40	static ADDRESS_MAP_START( rollrace_map, ADDRESS_SPACE_PROGRAM, 8 )
	41	AM_RANGE(0x0000, 0x7fff) AM_ROM
	42	AM_RANGE(0x8000, 0x9fff) AM_ROM          /* only rollace2 */
	43	AM_RANGE(0xc000, 0xcfff) AM_RAM
	44	AM_RANGE(0xd806, 0xd806) AM_READNOP /* looks like a watchdog, bit4 checked*/
	45	AM_RANGE(0xd900, 0xd900) AM_READWRITE(ra_fake_d800_r,ra_fake_d800_w) /* protection ??*/
	46	AM_RANGE(0xe000, 0xe3ff) AM_RAM AM_BASE(&videoram) AM_SIZE(&videoram_size)
	47	AM_RANGE(0xe400, 0xe47f) AM_RAM AM_BASE(&colorram)
	48	AM_RANGE(0xe800, 0xe800) AM_WRITE(soundlatch_w)
	49	AM_RANGE(0xec00, 0xec0f) AM_NOP /* Analog sound effects ?? ec00 sound enable ?*/
	50	AM_RANGE(0xf000, 0xf0ff) AM_RAM AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
	51	AM_RANGE(0xf400, 0xf400) AM_WRITE(rollrace_backgroundcolor_w)
46	52	AM_RANGE(0xf800, 0xf800) AM_READ_PORT("P1")
47		AM_RANGE(0xf801, 0xf801) AM_READ_PORT("P2")
	53	AM_RANGE(0xf801, 0xf801) AM_READ_PORT("P2") AM_WRITE(rollrace_bkgpen_w)
	54	AM_RANGE(0xf802, 0xf802) AM_READ_PORT("SYSTEM") AM_WRITE(rollrace_backgroundpage_w)
	55	AM_RANGE(0xf803, 0xf803) AM_WRITE(rollrace_flipy_w)
48	56	AM_RANGE(0xf804, 0xf804) AM_READ_PORT("DSW1")
49		AM_RANGE(0xf802, 0xf802) AM_READ_PORT("SYSTEM")
50	57	AM_RANGE(0xf805, 0xf805) AM_READ_PORT("DSW2")
51		AM_RANGE(0xd806, 0xd806) AM_READNOP /* looks like a watchdog, bit4 checked*/
52		ADDRESS_MAP_END
53
54		static ADDRESS_MAP_START( writemem, ADDRESS_SPACE_PROGRAM, 8 )
55		AM_RANGE(0x0000, 0x7fff) AM_WRITE(SMH_ROM)
56		AM_RANGE(0x8000, 0x9fff) AM_WRITE(SMH_ROM)
57		AM_RANGE(0xc000, 0xcfff) AM_WRITE(SMH_RAM)
58		AM_RANGE(0xd900, 0xd900) AM_WRITE(ra_fake_d800_w) /* protection ?? */
59		AM_RANGE(0xe000, 0xe3ff) AM_WRITE(SMH_RAM) AM_BASE(&videoram) AM_SIZE(&videoram_size)
60		AM_RANGE(0xe400, 0xe47f) AM_WRITE(SMH_RAM) AM_BASE(&colorram)
61		AM_RANGE(0xe800, 0xe800) AM_WRITE(soundlatch_w)
62		AM_RANGE(0xec00, 0xec0f) AM_WRITENOP /* Analog sound effects ?? ec00 sound enable ?*/
63		AM_RANGE(0xf000, 0xf0ff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
64	58	AM_RANGE(0xfc00, 0xfc00) AM_WRITE(rollrace_flipx_w)
65	59	AM_RANGE(0xfc01, 0xfc01) AM_WRITE(interrupt_enable_w)
66	60	AM_RANGE(0xfc02, 0xfc03) AM_WRITENOP /* coin counters */
67	61	AM_RANGE(0xfc04, 0xfc05) AM_WRITE(rollrace_charbank_w)
68	62	AM_RANGE(0xfc06, 0xfc06) AM_WRITE(rollrace_spritebank_w)
69		AM_RANGE(0xf400, 0xf400) AM_WRITE(rollrace_backgroundcolor_w)
70		AM_RANGE(0xf801, 0xf801) AM_WRITE(rollrace_bkgpen_w)
71		AM_RANGE(0xf802, 0xf802) AM_WRITE(rollrace_backgroundpage_w)
72		AM_RANGE(0xf803, 0xf803) AM_WRITE(rollrace_flipy_w)
73	63	ADDRESS_MAP_END
74	64
75		static ADDRESS_MAP_START( readmem_snd, ADDRESS_SPACE_PROGRAM, 8 )
76		AM_RANGE(0x0000, 0x0fff) AM_READ(SMH_ROM)
77		AM_RANGE(0x2000, 0x2fff) AM_READ(SMH_RAM)
78		AM_RANGE(0x3000, 0x3000) AM_READ(soundlatch_r)
79		ADDRESS_MAP_END
80	65
81		static ADDRESS_MAP_START( writemem_snd, ADDRESS_SPACE_PROGRAM, 8 )
82		AM_RANGE(0x0000, 0x0fff) AM_WRITE(SMH_ROM)
83		AM_RANGE(0x2000, 0x2fff) AM_WRITE(SMH_RAM)
84		AM_RANGE(0x3000, 0x3000) AM_WRITE(interrupt_enable_w)
85		AM_RANGE(0x4000, 0x4001) AM_DEVWRITE("ay1", ay8910_address_data_w)
86		AM_RANGE(0x5000, 0x5001) AM_DEVWRITE("ay2", ay8910_address_data_w)
87		AM_RANGE(0x6000, 0x6001) AM_DEVWRITE("ay3", ay8910_address_data_w)
	66	static ADDRESS_MAP_START( rollrace_sound_map, ADDRESS_SPACE_PROGRAM, 8 )
	67	AM_RANGE(0x0000, 0x0fff) AM_ROM
	68	AM_RANGE(0x2000, 0x2fff) AM_RAM
	69	AM_RANGE(0x3000, 0x3000) AM_READWRITE(soundlatch_r,interrupt_enable_w)
	70	AM_RANGE(0x4000, 0x4001) AM_DEVWRITE("ay1", ay8910_address_data_w)
	71	AM_RANGE(0x5000, 0x5001) AM_DEVWRITE("ay2", ay8910_address_data_w)
	72	AM_RANGE(0x6000, 0x6001) AM_DEVWRITE("ay3", ay8910_address_data_w)
88	73	ADDRESS_MAP_END
89	74
90	75
r4679	r4680
180	165	static const gfx_layout charlayout =
181	166	{
182	167	8,8,   /* 8*8 characters */
183		256,   /* 256 characters */
184		3,     /* 3 bits per pixel */
185		{ 0,1024*8*8, 2*1024*8*8 }, /* the two bitplanes are separated */
	168	256,   /* 256 characters */
	169	3,     /* 3 bits per pixel */
	170	{ 0,1024*8*8, 2*1024*8*8 }, /* the two bitplanes are separated */
186	171	{ 0,1,2,3,4,5,6,7 },
187	172	{ 7*8, 6*8, 5*8, 4*8, 3*8, 2*8, 1*8, 0*8 },
188
189
190	173	8*8   /* every char takes 8 consecutive bytes */
191	174	};
192	175	static const gfx_layout charlayout2 =
193	176	{
194	177	8,8,   /* 8*8 characters */
195		1024,   /* 1024 characters */
196		3,     /* 3 bits per pixel */
197		{ 0,1024*8*8, 2*1024*8*8 }, /* the two bitplanes are separated */
	178	1024,   /* 1024 characters */
	179	3,     /* 3 bits per pixel */
	180	{ 0,1024*8*8, 2*1024*8*8 }, /* the two bitplanes are separated */
198	181	{ 0, 1, 2, 3, 4, 5, 6, 7 },
199	182	{ 7*8, 6*8, 5*8, 4*8, 3*8, 2*8, 1*8, 0*8 },
200
201	183	//  { 0*8, 1*8, 2*8, 3*8, 4*8, 5*8, 6*8, 7*8 },
202
203	184	8*8   /* every char takes 8 consecutive bytes */
204	185	};
205	186
206	187	static const gfx_layout spritelayout =
207	188	{
208		32,32,  /* 32*32 sprites */
209		64,   /* 64 sprites */
	189	32,32,  /* 32*32 sprites */
	190	64,   /* 64 sprites */
210	191	3,     /* 3 bits per pixel */
211		{ 0x4000*8, 0x2000*8, 0 }, /* the three bitplanes are separated */
	192	{ 0x4000*8, 0x2000*8, 0 }, /* the three bitplanes are separated */
212	193	{ 0, 1, 2, 3, 4, 5, 6, 7,
213	194	8*8+0, 8*8+1, 8*8+2, 8*8+3, 8*8+4, 8*8+5, 8*8+6, 8*8+7,16*8,16*8+1,16*8+2,16*8+3,16*8+4,16*8+5,16*8+6,16*8+7,24*8,24*8+1,24*8+2,24*8+3,24*8+4,24*8+5,24*8+6,24*8+7},
214	195
215	196	{ 0*8, 1*8, 2*8, 3*8, 4*8, 5*8, 6*8, 7*8,
216	197	32*8, 33*8, 34*8, 35*8, 36*8, 37*8, 38*8, 39*8,
217	198	64*8,65*8,66*8,67*8,68*8,69*8,70*8,71*8, 96*8,97*8,98*8,99*8,100*8,101*8,102*8,103*8 },
218
219		32*32    /* every sprite takes 128 consecutive bytes */
	199	32*32    /* every sprite takes 128 consecutive bytes */
220	200	};
221	201
222	202	static GFXDECODE_START( rollrace )
223		GFXDECODE_ENTRY( "gfx1", 0x0000, charlayout,   0,   32 ) /* foreground */
224		GFXDECODE_ENTRY( "gfx1", 0x0800, charlayout,   0,   32 )
225		GFXDECODE_ENTRY( "gfx1", 0x1000, charlayout,   0,   32 )
226		GFXDECODE_ENTRY( "gfx1", 0x1800, charlayout,   0,   32 )
227		GFXDECODE_ENTRY( "gfx2", 0x0000, charlayout2,   0,    32 ) /* for the road */
228		GFXDECODE_ENTRY( "gfx3", 0x0000, spritelayout,   0,    32 ) /* sprites */
229		GFXDECODE_ENTRY( "gfx4", 0x0000, spritelayout,   0,   32 )
230		GFXDECODE_ENTRY( "gfx5", 0x0000, spritelayout,   0,   32 )
231
	203	GFXDECODE_ENTRY( "gfx1", 0x0000, charlayout,   0,   32 ) /* foreground */
	204	GFXDECODE_ENTRY( "gfx1", 0x0800, charlayout,   0,   32 )
	205	GFXDECODE_ENTRY( "gfx1", 0x1000, charlayout,   0,   32 )
	206	GFXDECODE_ENTRY( "gfx1", 0x1800, charlayout,   0,   32 )
	207	GFXDECODE_ENTRY( "gfx2", 0x0000, charlayout2,   0,    32 ) /* for the road */
	208	GFXDECODE_ENTRY( "gfx3", 0x0000, spritelayout,   0,    32 ) /* sprites */
	209	GFXDECODE_ENTRY( "gfx4", 0x0000, spritelayout,   0,   32 )
	210	GFXDECODE_ENTRY( "gfx5", 0x0000, spritelayout,   0,   32 )
232	211	GFXDECODE_END
233	212
234	213	static MACHINE_DRIVER_START( rollrace )
235	214
236	215	/* basic machine hardware */
237	216	MDRV_CPU_ADD("maincpu", Z80,XTAL_24MHz/8) /* verified on pcb */
238		MDRV_CPU_PROGRAM_MAP(readmem,writemem)
	217	MDRV_CPU_PROGRAM_MAP(rollrace_map,0)
239	218	MDRV_CPU_VBLANK_INT("screen", nmi_line_pulse)
240	219
241	220	MDRV_CPU_ADD("audiocpu", Z80,XTAL_24MHz/16) /* verified on pcb */
242		MDRV_CPU_PROGRAM_MAP(readmem_snd,writemem_snd)
	221	MDRV_CPU_PROGRAM_MAP(rollrace_sound_map,0)
243	222	MDRV_CPU_VBLANK_INT_HACK(nmi_line_pulse,4)
244	223
245	224	/* video hardware */
r4679	r4680
427	406	ROM_LOAD( "8.6f", 0x0000, 0x1000, CRC(6ec3c545) SHA1(1a2477b9e1563734195b0743f5dbbb005e06022e) )
428	407	ROM_END
429	408
	409
430	410	GAME( 1983, fightrol, 0,        rollrace, rollrace, 0, ROT270, "[Kaneko] (Taito license)", "Fighting Roller", GAME_IMPERFECT_SOUND )
431	411	GAME( 1983, rollace,  fightrol, rollrace, rollrace, 0, ROT270, "[Kaneko] (Williams license)", "Roller Aces (set 1)", GAME_IMPERFECT_SOUND )
432	412	GAME( 1983, rollace2, fightrol, rollace2, rollrace, 0, ROT90,  "[Kaneko] (Williams license)", "Roller Aces (set 2)", GAME_IMPERFECT_SOUND )

src/mame/drivers/mirage.c

r4679	r4680
3	3	TODO:
4	4	-eeprom emulation? Software settings all changes if you toggle the "flip screen" dip-switch
5	5	-priorities.
	6	-sound banking is known to be imperfect.
6	7
7	8	Notes:To enter into Test Mode you need to keep pressed the Mahjong A button at start-up.
8	9	*/
r4679	r4680
174	175	}
175	176	}
176	177
177		static ADDRESS_MAP_START( mirage_readmem, ADDRESS_SPACE_PROGRAM, 16 )
178		AM_RANGE(0x000000, 0x07ffff) AM_READ(SMH_ROM)
179
180		AM_RANGE(0x100000, 0x101fff) AM_READ(SMH_RAM)
181		AM_RANGE(0x102000, 0x103fff) AM_READ(SMH_RAM)
182
183		AM_RANGE(0x110000, 0x110bff) AM_READ(SMH_RAM)
184		AM_RANGE(0x112000, 0x112bff) AM_READ(SMH_RAM)
185
186		AM_RANGE(0x120000, 0x1207ff) AM_READ(SMH_RAM)
187
188		AM_RANGE(0x130000, 0x1307ff) AM_READ(SMH_RAM)
189
190		//  AM_RANGE(0x140006, 0x140007) AM_READ(random_readers)
191
192		//  AM_RANGE(0x150006, 0x150007) AM_READNOP
193
194		AM_RANGE(0x16c006, 0x16c007) AM_READ(mirage_input_r)
195
196		AM_RANGE(0x16e002, 0x16e003) AM_READ_PORT("SYSTEM_IN")
197
198		AM_RANGE(0x170000, 0x173fff) AM_READ(SMH_RAM)
199		ADDRESS_MAP_END
200
201		static ADDRESS_MAP_START( mirage_writemem, ADDRESS_SPACE_PROGRAM, 16 )
202		AM_RANGE(0x000000, 0x07ffff) AM_WRITE(SMH_ROM)
203
	178	static ADDRESS_MAP_START( mirage_map, ADDRESS_SPACE_PROGRAM, 16 )
	179	AM_RANGE(0x000000, 0x07ffff) AM_ROM
204	180	/* tilemaps */
205		AM_RANGE(0x100000, 0x101fff) AM_WRITE(deco16_pf1_data_w) AM_BASE(&deco16_pf1_data) // 0x100000 - 0x101fff tested
206		AM_RANGE(0x102000, 0x103fff) AM_WRITE(deco16_pf2_data_w) AM_BASE(&deco16_pf2_data) // 0x102000 - 0x102fff tested
	181	AM_RANGE(0x100000, 0x101fff) AM_RAM_WRITE(deco16_pf1_data_w) AM_BASE(&deco16_pf1_data) // 0x100000 - 0x101fff tested
	182	AM_RANGE(0x102000, 0x103fff) AM_RAM_WRITE(deco16_pf2_data_w) AM_BASE(&deco16_pf2_data) // 0x102000 - 0x102fff tested
207	183	/* linescroll */
208		AM_RANGE(0x110000, 0x110bff) AM_WRITE(SMH_RAM) AM_BASE(&deco16_pf1_rowscroll)
209		AM_RANGE(0x112000, 0x112bff) AM_WRITE(SMH_RAM) AM_BASE(&deco16_pf2_rowscroll)
210
211		AM_RANGE(0x120000, 0x1207ff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16)
212
213		AM_RANGE(0x130000, 0x1307ff) AM_WRITE(paletteram16_xBBBBBGGGGGRRRRR_word_w) AM_BASE(&paletteram16)
214
	184	AM_RANGE(0x110000, 0x110bff) AM_RAM AM_BASE(&deco16_pf1_rowscroll)
	185	AM_RANGE(0x112000, 0x112bff) AM_RAM AM_BASE(&deco16_pf2_rowscroll)
	186	AM_RANGE(0x120000, 0x1207ff) AM_RAM AM_BASE(&spriteram16)
	187	AM_RANGE(0x130000, 0x1307ff) AM_RAM_WRITE(paletteram16_xBBBBBGGGGGRRRRR_word_w) AM_BASE(&paletteram16)
215	188	AM_RANGE(0x140000, 0x14000f) AM_DEVREADWRITE8("oki2", okim6295_r, okim6295_w, 0x00ff)
216	189	AM_RANGE(0x150000, 0x15000f) AM_DEVREADWRITE8("oki1", okim6295_r, okim6295_w, 0x00ff)
217
	190	//  AM_RANGE(0x140006, 0x140007) AM_READ(random_readers)
	191	//  AM_RANGE(0x150006, 0x150007) AM_READNOP
218	192	AM_RANGE(0x160000, 0x160001) AM_WRITENOP
219
220		AM_RANGE(0x168000, 0x16800f) AM_WRITE(SMH_RAM) AM_BASE(&deco16_pf12_control)
221
	193	AM_RANGE(0x168000, 0x16800f) AM_WRITEONLY AM_BASE(&deco16_pf12_control)
222	194	AM_RANGE(0x16a000, 0x16a001) AM_WRITENOP
223
224	195	AM_RANGE(0x16c000, 0x16c001) AM_WRITE(okim1_rombank_w)
225	196	AM_RANGE(0x16c002, 0x16c003) AM_WRITE(okim0_rombank_w)
226	197	AM_RANGE(0x16c004, 0x16c005) AM_WRITE(mirage_mux_w)
227
	198	AM_RANGE(0x16c006, 0x16c007) AM_READ(mirage_input_r)
228	199	AM_RANGE(0x16e000, 0x16e001) AM_WRITENOP
229
230		AM_RANGE(0x170000, 0x173fff) AM_WRITE(SMH_RAM)
	200	AM_RANGE(0x16e002, 0x16e003) AM_READ_PORT("SYSTEM_IN")
	201	AM_RANGE(0x170000, 0x173fff) AM_RAM
231	202	ADDRESS_MAP_END
232	203
233	204
234
235	205	static INPUT_PORTS_START( mirage )
236	206	PORT_START("SYSTEM_IN")
237	207	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_SERVICE1 )
r4679	r4680
357	327
358	328	/* basic machine hardware */
359	329	MDRV_CPU_ADD("maincpu", M68000, 28000000/2)
360		MDRV_CPU_PROGRAM_MAP(mirage_readmem,mirage_writemem)
	330	MDRV_CPU_PROGRAM_MAP(mirage_map,0)
361	331	MDRV_CPU_VBLANK_INT("screen", irq6_line_hold)
362	332
363	333	/* video hardware */
r4679	r4680
413	383	deco56_decrypt_gfx(machine, "gfx1");
414	384	}
415	385
416		GAME( 1994, mirage, 0,        mirage, mirage, mirage, ROT0, "Mitchell", "Mirage Youjuu Mahjongden (Japan)", GAME_IMPERFECT_GRAPHICS )
	386	GAME( 1994, mirage, 0,        mirage, mirage, mirage, ROT0, "Mitchell", "Mirage Youjuu Mahjongden (Japan)", GAME_IMPERFECT_GRAPHICS | GAME_IMPERFECT_SOUND )

src/mame/drivers/ddrible.c

r4679	r4680
125	125	}
126	126
127	127
128		static ADDRESS_MAP_START( readmem_cpu0, ADDRESS_SPACE_PROGRAM, 8 )
129		AM_RANGE(0x1800, 0x187f) AM_READ(SMH_RAM)         /* palette */
130		AM_RANGE(0x2000, 0x3fff) AM_READ(SMH_RAM)         /* Video RAM 1 + Object RAM 1 */
131		AM_RANGE(0x4000, 0x5fff) AM_READ(SMH_RAM)         /* shared RAM with CPU #1 */
132		AM_RANGE(0x6000, 0x7fff) AM_READ(SMH_RAM)         /* Video RAM 2 + Object RAM 2 */
133		AM_RANGE(0x8000, 0x9fff) AM_READ(SMH_BANK1)         /* banked ROM */
134		AM_RANGE(0xa000, 0xffff) AM_READ(SMH_ROM)         /* ROM */
	128	static ADDRESS_MAP_START( cpu0_map, ADDRESS_SPACE_PROGRAM, 8 )
	129	AM_RANGE(0x0000, 0x0004) AM_WRITE(K005885_0_w)                                    /* video registers (005885 #1) */
	130	AM_RANGE(0x0800, 0x0804) AM_WRITE(K005885_1_w)                                    /* video registers (005885 #2) */
	131	AM_RANGE(0x1800, 0x187f) AM_RAM AM_BASE(&paletteram)                              /* palette */
	132	AM_RANGE(0x2000, 0x2fff) AM_RAM_WRITE(ddrible_fg_videoram_w) AM_BASE(&ddrible_fg_videoram)   /* Video RAM 1 */
	133	AM_RANGE(0x3000, 0x3fff) AM_RAM AM_BASE(&ddrible_spriteram_1)                        /* Object RAM 1 */
	134	AM_RANGE(0x4000, 0x5fff) AM_RAM AM_BASE(&ddrible_sharedram)                           /* shared RAM with CPU #1 */
	135	AM_RANGE(0x6000, 0x6fff) AM_RAM_WRITE(ddrible_bg_videoram_w) AM_BASE(&ddrible_bg_videoram)   /* Video RAM 2 */
	136	AM_RANGE(0x7000, 0x7fff) AM_RAM AM_BASE(&ddrible_spriteram_2)                        /* Object RAM 2 */
	137	AM_RANGE(0x8000, 0x8000) AM_WRITE(ddrible_bankswitch_w)                              /* bankswitch control */
	138	AM_RANGE(0x8000, 0x9fff) AM_ROMBANK(1)                                          /* banked ROM */
	139	AM_RANGE(0x8000, 0xffff) AM_WRITE(SMH_ROM)                                       /* ROM */
	140	AM_RANGE(0xa000, 0xffff) AM_ROM                                                /* ROM */
135	141	ADDRESS_MAP_END
136	142
137
138		static ADDRESS_MAP_START( writemem_cpu0, ADDRESS_SPACE_PROGRAM, 8 )
139		AM_RANGE(0x0000, 0x0004) AM_WRITE(K005885_0_w)                        /* video registers (005885 #1) */
140		AM_RANGE(0x0800, 0x0804) AM_WRITE(K005885_1_w)                        /* video registers (005885 #2) */
141		AM_RANGE(0x1800, 0x187f) AM_WRITE(SMH_RAM) AM_BASE(&paletteram)
142		AM_RANGE(0x2000, 0x2fff) AM_WRITE(ddrible_fg_videoram_w) AM_BASE(&ddrible_fg_videoram)/* Video RAM 1 */
143		AM_RANGE(0x3000, 0x3fff) AM_WRITE(SMH_RAM) AM_BASE(&ddrible_spriteram_1)            /* Object RAM 1 */
144		AM_RANGE(0x4000, 0x5fff) AM_WRITE(SMH_RAM) AM_BASE(&ddrible_sharedram)            /* shared RAM with CPU #1 */
145		AM_RANGE(0x6000, 0x6fff) AM_WRITE(ddrible_bg_videoram_w) AM_BASE(&ddrible_bg_videoram)/* Video RAM 2 */
146		AM_RANGE(0x7000, 0x7fff) AM_WRITE(SMH_RAM) AM_BASE(&ddrible_spriteram_2)            /* Object RAM 2 + Work RAM */
147		AM_RANGE(0x8000, 0x8000) AM_WRITE(ddrible_bankswitch_w)                  /* bankswitch control */
148		AM_RANGE(0x8000, 0xffff) AM_WRITE(SMH_ROM)                           /* ROM */
149		ADDRESS_MAP_END
150
151		static ADDRESS_MAP_START( readmem_cpu1, ADDRESS_SPACE_PROGRAM, 8 )
152		AM_RANGE(0x0000, 0x1fff) AM_READ(ddrible_sharedram_r)      /* shared RAM with CPU #0 */
153		AM_RANGE(0x2000, 0x27ff) AM_READ(ddrible_snd_sharedram_r)   /* shared RAM with CPU #2 */
	143	static ADDRESS_MAP_START( cpu1_map, ADDRESS_SPACE_PROGRAM, 8 )
	144	AM_RANGE(0x0000, 0x1fff) AM_READWRITE(ddrible_sharedram_r, ddrible_sharedram_w)         /* shared RAM with CPU #0 */
	145	AM_RANGE(0x2000, 0x27ff) AM_READWRITE(ddrible_snd_sharedram_r, ddrible_snd_sharedram_w)   /* shared RAM with CPU #2 */
154	146	AM_RANGE(0x2800, 0x2800) AM_READ_PORT("DSW1")
155	147	AM_RANGE(0x2801, 0x2801) AM_READ_PORT("P1")
156	148	AM_RANGE(0x2802, 0x2802) AM_READ_PORT("P2")
157		AM_RANGE(0x2803, 0x2803) AM_READ_PORT("SYSTEM")            /* coinsw & start */
	149	AM_RANGE(0x2803, 0x2803) AM_READ_PORT("SYSTEM")                                 /* coinsw & start */
158	150	AM_RANGE(0x2c00, 0x2c00) AM_READ_PORT("DSW2")
159	151	AM_RANGE(0x3000, 0x3000) AM_READ_PORT("DSW3")
160		AM_RANGE(0x8000, 0xffff) AM_READ(SMH_ROM)               /* ROM */
	152	AM_RANGE(0x3400, 0x3400) AM_WRITE(ddrible_coin_counter_w)                        /* coin counters */
	153	AM_RANGE(0x3c00, 0x3c00) AM_WRITE(watchdog_reset_w)                              /* watchdog reset */
	154	AM_RANGE(0x8000, 0xffff) AM_ROM                                             /* ROM */
161	155	ADDRESS_MAP_END
162	156
163		static ADDRESS_MAP_START( writemem_cpu1, ADDRESS_SPACE_PROGRAM, 8 )
164		AM_RANGE(0x0000, 0x1fff) AM_WRITE(ddrible_sharedram_w)      /* shared RAM with CPU #0 */
165		AM_RANGE(0x2000, 0x27ff) AM_WRITE(ddrible_snd_sharedram_w)   /* shared RAM with CPU #2 */
166		AM_RANGE(0x3400, 0x3400) AM_WRITE(ddrible_coin_counter_w)      /* coin counters */
167		AM_RANGE(0x3c00, 0x3c00) AM_WRITE(watchdog_reset_w)         /* watchdog reset */
168		AM_RANGE(0x8000, 0xffff) AM_WRITE(SMH_ROM)               /* ROM */
	157	static ADDRESS_MAP_START( cpu2_map, ADDRESS_SPACE_PROGRAM, 8 )
	158	AM_RANGE(0x0000, 0x07ff) AM_RAM AM_BASE(&ddrible_snd_sharedram)      /* shared RAM with CPU #1 */
	159	AM_RANGE(0x1000, 0x1001) AM_DEVREADWRITE("ym", ym2203_r, ym2203_w)   /* YM2203 */
	160	AM_RANGE(0x3000, 0x3000) AM_DEVWRITE("vlm", vlm5030_data_w)         /* Speech data */
	161	AM_RANGE(0x8000, 0xffff) AM_ROM                              /* ROM */
169	162	ADDRESS_MAP_END
170	163
171		static ADDRESS_MAP_START( readmem_cpu2, ADDRESS_SPACE_PROGRAM, 8 )
172		AM_RANGE(0x0000, 0x07ff) AM_READ(SMH_RAM)               /* shared RAM with CPU #1 */
173		AM_RANGE(0x1000, 0x1001) AM_DEVREAD("ym", ym2203_r)      /* YM2203 */
174		AM_RANGE(0x8000, 0xffff) AM_READ(SMH_ROM)               /* ROM */
175		ADDRESS_MAP_END
176
177		static ADDRESS_MAP_START( writemem_cpu2, ADDRESS_SPACE_PROGRAM, 8 )
178		AM_RANGE(0x0000, 0x07ff) AM_WRITE(SMH_RAM) AM_BASE(&ddrible_snd_sharedram)   /* shared RAM with CPU #1 */
179		AM_RANGE(0x1000, 0x1001) AM_DEVWRITE("ym", ym2203_w)            /* YM2203 */
180		AM_RANGE(0x3000, 0x3000) AM_DEVWRITE("vlm", vlm5030_data_w)                  /* Speech data */
181		AM_RANGE(0x8000, 0xffff) AM_WRITE(SMH_ROM)                     /* ROM */
182		ADDRESS_MAP_END
183
184	164	static INPUT_PORTS_START( ddribble )
185	165	PORT_START("P1")
186	166	KONAMI8_B132(1)
r4679	r4680
283	263
284	264	/* basic machine hardware */
285	265	MDRV_CPU_ADD("maincpu", M6809,   XTAL_18_432MHz/12)   /* verified on pcb */
286		MDRV_CPU_PROGRAM_MAP(readmem_cpu0,writemem_cpu0)
	266	MDRV_CPU_PROGRAM_MAP(cpu0_map,0)
287	267	MDRV_CPU_VBLANK_INT("screen", ddrible_interrupt_0)
288	268
289	269	MDRV_CPU_ADD("cpu1", M6809,   XTAL_18_432MHz/12)   /* verified on pcb */
290		MDRV_CPU_PROGRAM_MAP(readmem_cpu1,writemem_cpu1)
	270	MDRV_CPU_PROGRAM_MAP(cpu1_map,0)
291	271	MDRV_CPU_VBLANK_INT("screen", ddrible_interrupt_1)
292	272
293	273	MDRV_CPU_ADD("cpu2", M6809,   XTAL_18_432MHz/12)   /* verified on pcb */
294		MDRV_CPU_PROGRAM_MAP(readmem_cpu2,writemem_cpu2)
	274	MDRV_CPU_PROGRAM_MAP(cpu2_map,0)
295	275
296	276	MDRV_QUANTUM_TIME(HZ(6000))   /* we need heavy synch */
297	277

src/mame/drivers/missile.c

r4679	r4680
405	405
406	406	/* assert the IRQ if not already asserted */
407	407	irq_state = (~curv >> 5) & 1;
408		cpu_set_input_line(machine->cpu[0], 0, irq_state ? ASSERT_LINE : CLEAR_LINE);
	408	cputag_set_input_line(machine, "maincpu", 0, irq_state ? ASSERT_LINE : CLEAR_LINE);
409	409
410	410	/* force an update while we're here */
411	411	video_screen_update_partial(machine->primary_screen, v_to_scanline(curv));
r4679	r4680
435	435
436	436	/* starting at scanline 224, the CPU runs at half speed */
437	437	if (curv == 224)
438		cpu_set_clock(machine->cpu[0], MASTER_CLOCK/16);
	438	cputag_set_clock(machine, "maincpu", MASTER_CLOCK/16);
439	439	else
440		cpu_set_clock(machine->cpu[0], MASTER_CLOCK/8);
	440	cputag_set_clock(machine, "maincpu", MASTER_CLOCK/8);
441	441
442	442	/* scanline for the next run */
443	443	curv ^= 224;
r4679	r4680
477	477	flipscreen = 0;
478	478
479	479	/* set up an opcode base handler since we use mapped handlers for RAM */
480		memory_set_direct_update_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), missile_direct_handler);
	480	memory_set_direct_update_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), missile_direct_handler);
481	481
482	482	/* create a timer to speed/slow the CPU */
483	483	cpu_timer = timer_alloc(machine, adjust_cpu_speed, NULL);
r4679	r4680
499	499
500	500	static MACHINE_RESET( missile )
501	501	{
502		cpu_set_input_line(machine->cpu[0], 0, CLEAR_LINE);
	502	cputag_set_input_line(machine, "maincpu", 0, CLEAR_LINE);
503	503	irq_state = 0;
504	504	}
505	505
r4679	r4680
706	706	{
707	707	if (irq_state)
708	708	{
709		cpu_set_input_line(space->machine->cpu[0], 0, CLEAR_LINE);
	709	cputag_set_input_line(space->machine, "maincpu", 0, CLEAR_LINE);
710	710	irq_state = 0;
711	711	}
712	712	}

src/mame/drivers/popper.c

r4679	r4680
97	97	PALETTE_INIT( popper );
98	98	VIDEO_START( popper );
99	99	VIDEO_UPDATE( popper );
100		static UINT8 *popper_sharedram;
101	100
102		static READ8_HANDLER( popper_sharedram_r )
103		{
104		return popper_sharedram[offset];
105		}
106	101
107	102	//e000                  e001                  e002                  e003
108	103	//76543210              76543210              76543210              76543210
r4679	r4680
151	146
152	147	static READ8_HANDLER( popper_soundcpu_nmi_r )
153	148	{
154		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_NMI, PULSE_LINE);
	149	cputag_set_input_line(space->machine, "audiocpu", INPUT_LINE_NMI, PULSE_LINE);
155	150	return 0;
156	151	}
157	152
158		static WRITE8_HANDLER( popper_sharedram_w )
159		{
160		popper_sharedram[offset]=data;
161		}
162
163		static ADDRESS_MAP_START( popper_readmem, ADDRESS_SPACE_PROGRAM, 8 )
164		AM_RANGE(0x0000, 0x5fff) AM_READ(SMH_ROM)
165		AM_RANGE(0xc000, 0xd7ff) AM_READ(SMH_RAM)
166		AM_RANGE(0xd800, 0xdfff) AM_READ(SMH_RAM)               //shared with sound cpu
	153	static ADDRESS_MAP_START( popper_map, ADDRESS_SPACE_PROGRAM, 8 )
	154	AM_RANGE(0x0000, 0x5fff) AM_ROM
	155	AM_RANGE(0xc000, 0xc1bf) AM_RAM
	156	AM_RANGE(0xc1c0, 0xc1ff) AM_RAM_WRITE(popper_ol_videoram_w) AM_BASE(&popper_ol_videoram)
	157	AM_RANGE(0xc200, 0xc61f) AM_RAM_WRITE(popper_videoram_w) AM_BASE(&popper_videoram)
	158	AM_RANGE(0xc620, 0xc9bf) AM_RAM
	159	AM_RANGE(0xc9c0, 0xc9ff) AM_RAM_WRITE(popper_ol_attribram_w) AM_BASE(&popper_ol_attribram)
	160	AM_RANGE(0xca00, 0xce1f) AM_RAM_WRITE(popper_attribram_w) AM_BASE(&popper_attribram)
	161	AM_RANGE(0xce20, 0xcfff) AM_RAM
	162	AM_RANGE(0xd000, 0xd7ff) AM_RAM AM_BASE(&popper_spriteram) AM_SIZE(&popper_spriteram_size)
	163	AM_RANGE(0xd800, 0xdfff) AM_RAM AM_SHARE(1)
167	164	AM_RANGE(0xe000, 0xe007) AM_READ(popper_input_ports_r)
168		AM_RANGE(0xe400, 0xe400) AM_READ(popper_soundcpu_nmi_r)
169		AM_RANGE(0xf800, 0xf800) AM_READNOP               //?? read once at startup
170		AM_RANGE(0xfc00, 0xfc00) AM_READNOP               //?? possibly watchdog
171		AM_RANGE(0xffff, 0xffff) AM_READNOP
172		ADDRESS_MAP_END
173
174		static ADDRESS_MAP_START( popper_writemem, ADDRESS_SPACE_PROGRAM, 8 )
175		AM_RANGE(0x0000, 0x5fff) AM_WRITE(SMH_ROM)
176		AM_RANGE(0xc000, 0xc1bf) AM_WRITE(SMH_RAM)
177		AM_RANGE(0xc1c0, 0xc1ff) AM_WRITE(popper_ol_videoram_w) AM_BASE(&popper_ol_videoram)
178		AM_RANGE(0xc200, 0xc61f) AM_WRITE(popper_videoram_w) AM_BASE(&popper_videoram)
179		AM_RANGE(0xc620, 0xc9bf) AM_WRITE(SMH_RAM)
180		AM_RANGE(0xc9c0, 0xc9ff) AM_WRITE(popper_ol_attribram_w) AM_BASE(&popper_ol_attribram)
181		AM_RANGE(0xca00, 0xce1f) AM_WRITE(popper_attribram_w) AM_BASE(&popper_attribram)
182		AM_RANGE(0xce20, 0xcfff) AM_WRITE(SMH_RAM)
183		AM_RANGE(0xd000, 0xd7ff) AM_WRITE(SMH_RAM) AM_BASE(&popper_spriteram) AM_SIZE(&popper_spriteram_size)
184		AM_RANGE(0xd800, 0xdfff) AM_WRITE(SMH_RAM) AM_BASE(&popper_sharedram)   //shared with sound cpu
185	165	AM_RANGE(0xe000, 0xe000) AM_WRITE(interrupt_enable_w)
186	166	AM_RANGE(0xe001, 0xe001) AM_WRITE(popper_flipscreen_w)
187	167	AM_RANGE(0xe002, 0xe002) AM_WRITE(popper_e002_w)            //?? seems to be graphic related
188	168	AM_RANGE(0xe003, 0xe003) AM_WRITE(popper_gfx_bank_w)
189	169	AM_RANGE(0xe004, 0xe007) AM_WRITENOP               //?? range cleared once when the SP is set
	170	AM_RANGE(0xe400, 0xe400) AM_READ(popper_soundcpu_nmi_r)
	171	AM_RANGE(0xf800, 0xf800) AM_READNOP               //?? read once at startup
	172	AM_RANGE(0xfc00, 0xfc00) AM_READNOP               //?? possibly watchdog
	173	AM_RANGE(0xffff, 0xffff) AM_READNOP
190	174	ADDRESS_MAP_END
191	175
192		static ADDRESS_MAP_START( popper_sound_readmem, ADDRESS_SPACE_PROGRAM, 8 )
193		AM_RANGE(0x0000, 0x0fff) AM_READ(SMH_ROM)
	176	static ADDRESS_MAP_START( popper_sound_map, ADDRESS_SPACE_PROGRAM, 8 )
	177	AM_RANGE(0x0000, 0x0fff) AM_ROM
	178	AM_RANGE(0x8000, 0x8001) AM_DEVWRITE("ay1", ay8910_address_data_w)
194	179	AM_RANGE(0x8002, 0x8002) AM_READNOP               //?? all read once at startup and the
	180	AM_RANGE(0x8002, 0x8002) AM_WRITENOP            //?? same writes as 0x8000 (mostly)
195	181	AM_RANGE(0x8003, 0x8003) AM_READNOP               //?? result ignored, looks like part
	182	AM_RANGE(0xa000, 0xa001) AM_DEVWRITE("ay2", ay8910_address_data_w)
196	183	AM_RANGE(0xa002, 0xa002) AM_READNOP               //?? of AY8910 initialisation
197		AM_RANGE(0xd800, 0xdfff) AM_READ(popper_sharedram_r)
	184	AM_RANGE(0xa002, 0xa002) AM_WRITENOP            //?? same writes as 0xa000
	185	AM_RANGE(0xd800, 0xdfff) AM_RAM AM_SHARE(1)
198	186	ADDRESS_MAP_END
199	187
200		static ADDRESS_MAP_START( popper_sound_writemem, ADDRESS_SPACE_PROGRAM, 8 )
201		AM_RANGE(0x0000, 0x0fff) AM_WRITE(SMH_ROM)
202		AM_RANGE(0x8000, 0x8001) AM_DEVWRITE("ay1", ay8910_address_data_w)
203		AM_RANGE(0x8002, 0x8002) AM_WRITENOP               //?? same writes as 0x8000 (mostly)
204		AM_RANGE(0xa000, 0xa001) AM_DEVWRITE("ay2", ay8910_address_data_w)
205		AM_RANGE(0xa002, 0xa002) AM_WRITENOP               //?? same writes as 0xa000
206		AM_RANGE(0xd800, 0xdfff) AM_WRITE(popper_sharedram_w)
207		ADDRESS_MAP_END
208
209	188	static INPUT_PORTS_START( popper )
210	189	PORT_START("IN0")
211	190	PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_BUTTON1 )
r4679	r4680
310	289
311	290	/* basic machine hardware */
312	291	MDRV_CPU_ADD("maincpu", Z80,18432000/6)
313		MDRV_CPU_PROGRAM_MAP(popper_readmem,popper_writemem)
	292	MDRV_CPU_PROGRAM_MAP(popper_map,0)
314	293	MDRV_CPU_VBLANK_INT("screen", nmi_line_pulse)
315	294
316	295	MDRV_CPU_ADD("audiocpu", Z80,18432000/12)
317		MDRV_CPU_PROGRAM_MAP(popper_sound_readmem,popper_sound_writemem)
	296	MDRV_CPU_PROGRAM_MAP(popper_sound_map,0)
318	297	MDRV_CPU_VBLANK_INT_HACK(irq0_line_hold,4)      //NMIs caused by the main CPU
319	298
320	299	MDRV_QUANTUM_TIME(HZ(1800))

src/mame/drivers/ladyfrog.c

r4679	r4680
87	87
88	88	static WRITE8_HANDLER( sound_cpu_reset_w )
89	89	{
90		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_RESET, (data&1 )? ASSERT_LINE : CLEAR_LINE);
	90	cputag_set_input_line(space->machine, "audiocpu", INPUT_LINE_RESET, (data & 1 ) ? ASSERT_LINE : CLEAR_LINE);
91	91	}
92	92
93	93	static TIMER_CALLBACK( nmi_callback )
94	94	{
95		if (sound_nmi_enable) cpu_set_input_line(machine->cpu[1],INPUT_LINE_NMI,PULSE_LINE);
	95	if (sound_nmi_enable) cputag_set_input_line(machine, "audiocpu", INPUT_LINE_NMI, PULSE_LINE);
96	96	else pending_nmi = 1;
97	97	}
98	98
99	99	static WRITE8_HANDLER( sound_command_w )
100	100	{
101		soundlatch_w(space,0,data);
102		timer_call_after_resynch(space->machine, NULL, data,nmi_callback);
	101	soundlatch_w(space, 0, data);
	102	timer_call_after_resynch(space->machine, NULL, data, nmi_callback);
103	103	}
104	104
105	105	static WRITE8_HANDLER( nmi_disable_w )
r4679	r4680
112	112	sound_nmi_enable = 1;
113	113	if (pending_nmi)
114	114	{
115		cpu_set_input_line(space->machine->cpu[1],INPUT_LINE_NMI,PULSE_LINE);
	115	cputag_set_input_line(space->machine, "audiocpu", INPUT_LINE_NMI, PULSE_LINE);
116	116	pending_nmi = 0;
117	117	}
118	118	}
r4679	r4680
142	142	return snd_flag | 0xfd;
143	143	}
144	144
145		static ADDRESS_MAP_START( readmem, ADDRESS_SPACE_PROGRAM, 8 )
146		AM_RANGE(0x0000, 0xbfff) AM_READ(SMH_ROM)
147		AM_RANGE(0xc000, 0xc07f) AM_READ(SMH_RAM)
148		AM_RANGE(0xc080, 0xc87f) AM_READ(ladyfrog_videoram_r)
149		AM_RANGE(0xd400, 0xd400) AM_READ(from_snd_r)
	145	static ADDRESS_MAP_START( ladyfrog_map, ADDRESS_SPACE_PROGRAM, 8 )
	146	AM_RANGE(0x0000, 0xbfff) AM_ROM
	147	AM_RANGE(0xc000, 0xc07f) AM_RAM
	148	AM_RANGE(0xc080, 0xc87f) AM_READ(ladyfrog_videoram_r) AM_WRITE(ladyfrog_videoram_w) AM_BASE(&videoram) AM_SIZE(&videoram_size)
	149	AM_RANGE(0xd000, 0xd000) AM_WRITE(ladyfrog_gfxctrl2_w)
	150	AM_RANGE(0xd400, 0xd400) AM_READ(from_snd_r) AM_WRITE(sound_command_w)
150	151	AM_RANGE(0xd401, 0xd401) AM_READ(snd_flag_r)
	152	AM_RANGE(0xd403, 0xd403) AM_WRITE(sound_cpu_reset_w)
151	153	AM_RANGE(0xd800, 0xd800) AM_READ_PORT("DSW1")
152	154	AM_RANGE(0xd801, 0xd801) AM_READ_PORT("DSW2")
153	155	AM_RANGE(0xd804, 0xd804) AM_READ_PORT("INPUTS")
154	156	AM_RANGE(0xd806, 0xd806) AM_READ_PORT("SYSTEM")
155		AM_RANGE(0xdc00, 0xdc9f) AM_READ(ladyfrog_spriteram_r)
156		AM_RANGE(0xdca0, 0xdcbf) AM_READ(ladyfrog_scrlram_r)
157		AM_RANGE(0xdcc0, 0xdcff) AM_READ(SMH_RAM)
158		AM_RANGE(0xdd00, 0xdeff) AM_READ(ladyfrog_palette_r)
	157	AM_RANGE(0xdc00, 0xdc9f) AM_READ(ladyfrog_spriteram_r) AM_WRITE(ladyfrog_spriteram_w)
	158	AM_RANGE(0xdca0, 0xdcbf) AM_READ(ladyfrog_scrlram_r)  AM_WRITE(ladyfrog_scrlram_w) AM_BASE(&ladyfrog_scrlram)
	159	AM_RANGE(0xdcc0, 0xdcff) AM_RAM
	160	AM_RANGE(0xdd00, 0xdeff) AM_READ(ladyfrog_palette_r)  AM_WRITE(ladyfrog_palette_w)
159	161	AM_RANGE(0xd0d0, 0xd0d0) AM_READNOP /* code jumps to ASCII text "Alfa tecnology"  @ $b7 */
160		AM_RANGE(0xe000, 0xffff) AM_READ(SMH_RAM)
161		ADDRESS_MAP_END
162
163
164		static ADDRESS_MAP_START( writemem, ADDRESS_SPACE_PROGRAM, 8 )
165		AM_RANGE(0x0000, 0xbfff) AM_WRITE(SMH_ROM)
166		AM_RANGE(0xc000, 0xc07f) AM_WRITE(SMH_RAM)
167		AM_RANGE(0xc080, 0xc87f) AM_WRITE(ladyfrog_videoram_w) AM_BASE(&videoram) AM_SIZE(&videoram_size)
168		AM_RANGE(0xd000, 0xd000) AM_WRITE(ladyfrog_gfxctrl2_w)
169		AM_RANGE(0xd400, 0xd400) AM_WRITE(sound_command_w)
170		AM_RANGE(0xd403, 0xd403) AM_WRITE(sound_cpu_reset_w)
171		AM_RANGE(0xdc00, 0xdc9f) AM_WRITE(ladyfrog_spriteram_w)
172		AM_RANGE(0xdca0, 0xdcbf) AM_WRITE(ladyfrog_scrlram_w) AM_BASE(&ladyfrog_scrlram)
173		AM_RANGE(0xdcc0, 0xdcff) AM_WRITE(SMH_RAM)
174		AM_RANGE(0xdd00, 0xdeff) AM_WRITE(ladyfrog_palette_w)
175	162	AM_RANGE(0xdf03, 0xdf03) AM_WRITE(ladyfrog_gfxctrl_w)
176		AM_RANGE(0xe000, 0xffff) AM_WRITE(SMH_RAM)
	163	AM_RANGE(0xe000, 0xffff) AM_RAM
177	164	ADDRESS_MAP_END
178	165
179
180		static ADDRESS_MAP_START( sound_readmem, ADDRESS_SPACE_PROGRAM, 8 )
181		AM_RANGE(0x0000, 0xbfff) AM_READ(SMH_ROM)
182		AM_RANGE(0xc000, 0xc7ff) AM_READ(SMH_RAM)
183		AM_RANGE(0xd000, 0xd000) AM_READ(soundlatch_r)
184		AM_RANGE(0xd200, 0xd200) AM_READNOP
185		AM_RANGE(0xe000, 0xefff) AM_READNOP
186		ADDRESS_MAP_END
187
188		static ADDRESS_MAP_START( sound_writemem, ADDRESS_SPACE_PROGRAM, 8 )
189		AM_RANGE(0x0000, 0xbfff) AM_WRITE(SMH_ROM)
190		AM_RANGE(0xc000, 0xc7ff) AM_WRITE(SMH_RAM)
	166	static ADDRESS_MAP_START( ladyfrog_sound_map, ADDRESS_SPACE_PROGRAM, 8 )
	167	AM_RANGE(0x0000, 0xbfff) AM_ROM
	168	AM_RANGE(0xc000, 0xc7ff) AM_RAM
191	169	AM_RANGE(0xc800, 0xc801) AM_WRITENOP
192	170	AM_RANGE(0xc802, 0xc803) AM_DEVWRITE("ay", ay8910_address_data_w)
193	171	AM_RANGE(0xc900, 0xc90d) AM_DEVWRITE("msm", msm5232_w)
194	172	AM_RANGE(0xca00, 0xca00) AM_WRITENOP
195	173	AM_RANGE(0xcb00, 0xcb00) AM_WRITENOP
196	174	AM_RANGE(0xcc00, 0xcc00) AM_WRITENOP
197		AM_RANGE(0xd000, 0xd000) AM_WRITE(to_main_w)
198		AM_RANGE(0xd200, 0xd200) AM_WRITE(nmi_enable_w)
	175	AM_RANGE(0xd000, 0xd000) AM_READ(soundlatch_r) AM_WRITE(to_main_w)
	176	AM_RANGE(0xd200, 0xd200) AM_READNOP AM_WRITE(nmi_enable_w)
199	177	AM_RANGE(0xd400, 0xd400) AM_WRITE(nmi_disable_w)
200	178	AM_RANGE(0xd600, 0xd600) AM_WRITENOP
201		AM_RANGE(0xe000, 0xefff) AM_WRITENOP
	179	AM_RANGE(0xe000, 0xefff) AM_NOP
202	180	ADDRESS_MAP_END
203	181
204	182
r4679	r4680
281	259
282	260	static MACHINE_DRIVER_START( ladyfrog )
283	261	MDRV_CPU_ADD("maincpu", Z80,8000000/2)
284		MDRV_CPU_PROGRAM_MAP(readmem,writemem)
	262	MDRV_CPU_PROGRAM_MAP(ladyfrog_map,0)
285	263	MDRV_CPU_VBLANK_INT("screen", irq0_line_hold)
286	264
287	265	MDRV_CPU_ADD("audiocpu", Z80,8000000/2)
288		MDRV_CPU_PROGRAM_MAP(sound_readmem,sound_writemem)
	266	MDRV_CPU_PROGRAM_MAP(ladyfrog_sound_map,0)
289	267	MDRV_CPU_VBLANK_INT_HACK(irq0_line_hold,2)
290	268
291	269	/* video hardware */
r4679	r4680
339	317	ROM_REGION( 0x10000, "audiocpu", 0 )
340	318	ROM_LOAD( "1.115",   0x0000, 0x8000, CRC(b0932498) SHA1(13d90698f2682e64ff3597c9267ca9d33a6d62ba) ) /* NY Captor*/
341	319
342		ROM_REGION( 0x60000, "gfx1", ROMREGION_DISPOSE |ROMREGION_INVERT )
	320	ROM_REGION( 0x60000, "gfx1", ROMREGION_DISPOSE | ROMREGION_INVERT )
343	321	ROM_LOAD( "3.32",   0x30000, 0x10000, CRC(8a27fc0a) SHA1(36e0365776e61ef830451e6351eca6b6c742086f) )
344	322	ROM_LOAD( "4.33",   0x40000, 0x10000, CRC(e1a137d3) SHA1(add8140a9366a0d343b611ced10c804d3fb04c03) )
345	323	ROM_LOAD( "5.34",   0x50000, 0x10000, CRC(7816925f) SHA1(037a69243b35e1739e5d7288e279d0d4289c61ed) )

src/mame/drivers/go2000.c

r4679	r4680
39	39
40	40	static WRITE16_HANDLER( sound_cmd_w )
41	41	{
42		soundlatch_w(space,offset,data & 0xff);
43		cpu_set_input_line(space->machine->cpu[1], 0, HOLD_LINE);
	42	soundlatch_w(space, offset, data & 0xff);
	43	cputag_set_input_line(space->machine, "soundcpu", 0, HOLD_LINE);
44	44	}
45	45
46	46	static ADDRESS_MAP_START( go2000_map, ADDRESS_SPACE_PROGRAM, 16 )
r4679	r4680
283	283
284	284	static MACHINE_RESET(go2000)
285	285	{
286		const address_space *space = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM);
	286	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
287	287	go2000_pcm_1_bankswitch_w(space, 0, 0);
288	288	}
289	289

src/mame/drivers/djboy.c

r4679	r4680
657	657
658	658	static WRITE8_HANDLER( trigger_nmi_on_cpu0 )
659	659	{
660		cpu_set_input_line(space->machine->cpu[0], INPUT_LINE_NMI, PULSE_LINE);
	660	cputag_set_input_line(space->machine, "maincpu", INPUT_LINE_NMI, PULSE_LINE);
661	661	}
662	662
663	663	static WRITE8_HANDLER( cpu0_bankswitch_w )
r4679	r4680
715	715
716	716	static WRITE8_HANDLER( trigger_nmi_on_sound_cpu2 )
717	717	{
718		soundlatch_w(space,0,data);
719		cpu_set_input_line(space->machine->cpu[2], INPUT_LINE_NMI, PULSE_LINE);
	718	soundlatch_w(space, 0, data);
	719	cputag_set_input_line(space->machine, "cpu2", INPUT_LINE_NMI, PULSE_LINE);
720	720	} /* trigger_nmi_on_sound_cpu2 */
721	721
722	722	static WRITE8_HANDLER( cpu2_bankswitch_w )
723	723	{
724	724	UINT8 *RAM = memory_region(space->machine, "cpu2");
725	725
726		if( data<3 )
	726	if( data < 3 )
727	727	{
728	728	RAM = &RAM[0x04000 * data];
729	729	}
730	730	else
731	731	{
732		RAM = &RAM[0x10000 + 0x4000*(data-3)];
	732	RAM = &RAM[0x10000 + 0x4000 * (data - 3)];
733	733	}
734		memory_set_bankptr(space->machine, 3,RAM);
	734	memory_set_bankptr(space->machine, 3, RAM);
735	735	}
736	736
737	737	/******************************************************************************/
738	738
739	739	static ADDRESS_MAP_START( cpu0_am, ADDRESS_SPACE_PROGRAM, 8 )
740	740	AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM)
741		AM_RANGE(0x8000, 0xafff) AM_READ(SMH_BANK4)
	741	AM_RANGE(0x8000, 0xafff) AM_READ(SMH_BANK(4))
742	742	AM_RANGE(0xb000, 0xbfff) AM_READWRITE( pandora_spriteram_r, pandora_spriteram_w )
743		AM_RANGE(0xc000, 0xdfff) AM_READ(SMH_BANK1)
	743	AM_RANGE(0xc000, 0xdfff) AM_READ(SMH_BANK(1))
744	744	AM_RANGE(0xe000, 0xefff) AM_READ(SMH_RAM) AM_WRITE(SMH_RAM) AM_BASE(&sharedram)
745	745	AM_RANGE(0xf000, 0xf7ff) AM_READ(SMH_RAM) AM_WRITE(SMH_RAM)
746	746	AM_RANGE(0xf800, 0xffff) AM_READ(SMH_RAM) AM_WRITE(SMH_RAM)
r4679	r4680
755	755
756	756	static ADDRESS_MAP_START( cpu1_am, ADDRESS_SPACE_PROGRAM, 8 )
757	757	AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM)
758		AM_RANGE(0x8000, 0xbfff) AM_READ(SMH_BANK2)
	758	AM_RANGE(0x8000, 0xbfff) AM_READ(SMH_BANK(2))
759	759	AM_RANGE(0xc000, 0xcfff) AM_READ(SMH_RAM) AM_WRITE(djboy_videoram_w) AM_BASE(&videoram)
760	760	AM_RANGE(0xd000, 0xd3ff) AM_READ(SMH_RAM) AM_WRITE(djboy_paletteram_w) AM_BASE(&paletteram)
761	761	AM_RANGE(0xd400, 0xd8ff) AM_READ(SMH_RAM) AM_WRITE(SMH_RAM)
r4679	r4680
778	778
779	779	static ADDRESS_MAP_START( cpu2_am, ADDRESS_SPACE_PROGRAM, 8 )
780	780	AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM)
781		AM_RANGE(0x8000, 0xbfff) AM_READ(SMH_BANK3)
	781	AM_RANGE(0x8000, 0xbfff) AM_READ(SMH_BANK(3))
782	782	AM_RANGE(0xc000, 0xdfff) AM_READ(SMH_RAM) AM_WRITE(SMH_RAM)
783	783	ADDRESS_MAP_END
784	784
r4679	r4680
1052	1052	GAME( 1989, djboy,  0,      djboy,   djboy, djboy,    ROT0, "Kaneko (American Sammy license)", "DJ Boy (set 1)", 0) // Sammy & Williams logos in FG ROM
1053	1053	GAME( 1989, djboya, djboy,  djboy,   djboy, djboy,    ROT0, "Kaneko (American Sammy license)", "DJ Boy (set 2)", 0) // Sammy & Williams logos in FG ROM
1054	1054	GAME( 1989, djboyj, djboy,  djboy,   djboy, djboyj,   ROT0, "Kaneko (Sega license)", "DJ Boy (Japan)", 0 ) // Sega logo in FG ROM
1055

src/mame/drivers/sidearms.c

r4679	r4680
85	85	}
86	86
87	87
88		static ADDRESS_MAP_START( readmem, ADDRESS_SPACE_PROGRAM, 8 )
89		AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM)
90		AM_RANGE(0x8000, 0xbfff) AM_READ(SMH_BANK1)
91		AM_RANGE(0xc800, 0xc800) AM_READ_PORT("SYSTEM")
92		AM_RANGE(0xc801, 0xc801) AM_READ_PORT("P1")
93		AM_RANGE(0xc802, 0xc802) AM_READ_PORT("P2")
	88	static ADDRESS_MAP_START( sidearms_map, ADDRESS_SPACE_PROGRAM, 8 )
	89	AM_RANGE(0x0000, 0x7fff) AM_ROM
	90	AM_RANGE(0x8000, 0xbfff) AM_ROMBANK(1)
	91	AM_RANGE(0xc000, 0xc3ff) AM_RAM_WRITE(paletteram_xxxxBBBBRRRRGGGG_split1_w) AM_BASE(&paletteram)
	92	AM_RANGE(0xc400, 0xc7ff) AM_RAM_WRITE(paletteram_xxxxBBBBRRRRGGGG_split2_w) AM_BASE(&paletteram_2)
	93	AM_RANGE(0xc800, 0xc800) AM_READ_PORT("SYSTEM") AM_WRITE(soundlatch_w)
	94	AM_RANGE(0xc801, 0xc801) AM_READ_PORT("P1") AM_WRITE(sidearms_bankswitch_w)
	95	AM_RANGE(0xc802, 0xc802) AM_READ_PORT("P2") AM_WRITE(watchdog_reset_w)
94	96	AM_RANGE(0xc803, 0xc803) AM_READ_PORT("DSW0")
95		AM_RANGE(0xc804, 0xc804) AM_READ_PORT("DSW1")
96		AM_RANGE(0xc805, 0xc805) AM_READ_PORT("DSW2")
97		AM_RANGE(0xd000, 0xffff) AM_READ(SMH_RAM)
98		ADDRESS_MAP_END
99
100		static ADDRESS_MAP_START( writemem, ADDRESS_SPACE_PROGRAM, 8 )
101		AM_RANGE(0x0000, 0xbfff) AM_WRITE(SMH_ROM)
102		AM_RANGE(0xc000, 0xc3ff) AM_WRITE(paletteram_xxxxBBBBRRRRGGGG_split1_w) AM_BASE(&paletteram)
103		AM_RANGE(0xc400, 0xc7ff) AM_WRITE(paletteram_xxxxBBBBRRRRGGGG_split2_w) AM_BASE(&paletteram_2)
104		AM_RANGE(0xc800, 0xc800) AM_WRITE(soundlatch_w)
105		AM_RANGE(0xc801, 0xc801) AM_WRITE(sidearms_bankswitch_w)
106		AM_RANGE(0xc802, 0xc802) AM_WRITE(watchdog_reset_w)
107		AM_RANGE(0xc804, 0xc804) AM_WRITE(sidearms_c804_w)
108		AM_RANGE(0xc805, 0xc805) AM_WRITE(sidearms_star_scrollx_w)
	97	AM_RANGE(0xc804, 0xc804) AM_READ_PORT("DSW1") AM_WRITE(sidearms_c804_w)
	98	AM_RANGE(0xc805, 0xc805) AM_READ_PORT("DSW2") AM_WRITE(sidearms_star_scrollx_w)
109	99	AM_RANGE(0xc806, 0xc806) AM_WRITE(sidearms_star_scrolly_w)
110		AM_RANGE(0xc808, 0xc809) AM_WRITE(SMH_RAM) AM_BASE(&sidearms_bg_scrollx)
111		AM_RANGE(0xc80a, 0xc80b) AM_WRITE(SMH_RAM) AM_BASE(&sidearms_bg_scrolly)
	100	AM_RANGE(0xc808, 0xc809) AM_WRITEONLY AM_BASE(&sidearms_bg_scrollx)
	101	AM_RANGE(0xc80a, 0xc80b) AM_WRITEONLY AM_BASE(&sidearms_bg_scrolly)
112	102	AM_RANGE(0xc80c, 0xc80c) AM_WRITE(sidearms_gfxctrl_w)   /* background and sprite enable */
113		AM_RANGE(0xd000, 0xd7ff) AM_WRITE(sidearms_videoram_w) AM_BASE(&videoram)
114		AM_RANGE(0xd800, 0xdfff) AM_WRITE(sidearms_colorram_w) AM_BASE(&colorram)
115		AM_RANGE(0xe000, 0xefff) AM_WRITE(SMH_RAM)
116		AM_RANGE(0xf000, 0xffff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
	103	AM_RANGE(0xd000, 0xd7ff) AM_RAM_WRITE(sidearms_videoram_w) AM_BASE(&videoram)
	104	AM_RANGE(0xd800, 0xdfff) AM_RAM_WRITE(sidearms_colorram_w) AM_BASE(&colorram)
	105	AM_RANGE(0xe000, 0xefff) AM_RAM
	106	AM_RANGE(0xf000, 0xffff) AM_RAM AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
117	107	ADDRESS_MAP_END
118	108
119
120		static ADDRESS_MAP_START( turtship_readmem, ADDRESS_SPACE_PROGRAM, 8 )
121		AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM)
122		AM_RANGE(0x8000, 0xbfff) AM_READ(SMH_BANK1)
123		AM_RANGE(0xc000, 0xe7ff) AM_READ(SMH_RAM)
	109	static ADDRESS_MAP_START( turtship_map, ADDRESS_SPACE_PROGRAM, 8 )
	110	AM_RANGE(0x0000, 0x7fff) AM_ROM
	111	AM_RANGE(0x8000, 0xbfff) AM_ROMBANK(1)
	112	AM_RANGE(0xc000, 0xcfff) AM_RAM
	113	AM_RANGE(0xd000, 0xdfff) AM_RAM AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
	114	AM_RANGE(0xe000, 0xe3ff) AM_RAM_WRITE(paletteram_xxxxBBBBRRRRGGGG_split1_w) AM_BASE(&paletteram)
	115	AM_RANGE(0xe400, 0xe7ff) AM_RAM_WRITE(paletteram_xxxxBBBBRRRRGGGG_split2_w) AM_BASE(&paletteram_2)
124	116	AM_RANGE(0xe800, 0xe807) AM_READ(turtship_ports_r)
125		AM_RANGE(0xf000, 0xffff) AM_READ(SMH_RAM)
126		ADDRESS_MAP_END
127
128		static ADDRESS_MAP_START( turtship_writemem, ADDRESS_SPACE_PROGRAM, 8 )
129		AM_RANGE(0x0000, 0xbfff) AM_WRITE(SMH_ROM)
130		AM_RANGE(0xc000, 0xcfff) AM_WRITE(SMH_RAM)
131		AM_RANGE(0xd000, 0xdfff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
132		AM_RANGE(0xe000, 0xe3ff) AM_WRITE(paletteram_xxxxBBBBRRRRGGGG_split1_w) AM_BASE(&paletteram)
133		AM_RANGE(0xe400, 0xe7ff) AM_WRITE(paletteram_xxxxBBBBRRRRGGGG_split2_w) AM_BASE(&paletteram_2)
134	117	AM_RANGE(0xe800, 0xe800) AM_WRITE(soundlatch_w)
135	118	AM_RANGE(0xe801, 0xe801) AM_WRITE(sidearms_bankswitch_w)
136	119	AM_RANGE(0xe802, 0xe802) AM_WRITE(watchdog_reset_w)
137	120	AM_RANGE(0xe804, 0xe804) AM_WRITE(sidearms_c804_w)
138	121	AM_RANGE(0xe805, 0xe805) AM_WRITE(sidearms_star_scrollx_w)
139	122	AM_RANGE(0xe806, 0xe806) AM_WRITE(sidearms_star_scrolly_w)
140		AM_RANGE(0xe808, 0xe809) AM_WRITE(SMH_RAM) AM_BASE(&sidearms_bg_scrollx)
141		AM_RANGE(0xe80a, 0xe80b) AM_WRITE(SMH_RAM) AM_BASE(&sidearms_bg_scrolly)
	123	AM_RANGE(0xe808, 0xe809) AM_WRITEONLY AM_BASE(&sidearms_bg_scrollx)
	124	AM_RANGE(0xe80a, 0xe80b) AM_WRITEONLY AM_BASE(&sidearms_bg_scrolly)
142	125	AM_RANGE(0xe80c, 0xe80c) AM_WRITE(sidearms_gfxctrl_w)   /* background and sprite enable */
143		AM_RANGE(0xf000, 0xf7ff) AM_WRITE(sidearms_videoram_w) AM_BASE(&videoram)
144		AM_RANGE(0xf800, 0xffff) AM_WRITE(sidearms_colorram_w) AM_BASE(&colorram)
	126	AM_RANGE(0xf000, 0xf7ff) AM_RAM_WRITE(sidearms_videoram_w) AM_BASE(&videoram)
	127	AM_RANGE(0xf800, 0xffff) AM_RAM_WRITE(sidearms_colorram_w) AM_BASE(&colorram)
145	128	ADDRESS_MAP_END
146	129
147
148		static ADDRESS_MAP_START( sound_readmem, ADDRESS_SPACE_PROGRAM, 8 )
149		AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM)
150		AM_RANGE(0xc000, 0xc7ff) AM_READ(SMH_RAM)
	130	static ADDRESS_MAP_START( sidearms_sound_map, ADDRESS_SPACE_PROGRAM, 8 )
	131	AM_RANGE(0x0000, 0x7fff) AM_ROM
	132	AM_RANGE(0xc000, 0xc7ff) AM_RAM
151	133	AM_RANGE(0xd000, 0xd000) AM_READ(soundlatch_r)
152		AM_RANGE(0xf000, 0xf001) AM_DEVREAD("ym1", ym2203_r)
153		AM_RANGE(0xf002, 0xf003) AM_DEVREAD("ym2", ym2203_r)
	134	AM_RANGE(0xf000, 0xf001) AM_DEVREADWRITE("ym1", ym2203_r,ym2203_w)
	135	AM_RANGE(0xf002, 0xf003) AM_DEVREADWRITE("ym2", ym2203_r,ym2203_w)
154	136	ADDRESS_MAP_END
155	137
156		static ADDRESS_MAP_START( sound_writemem, ADDRESS_SPACE_PROGRAM, 8 )
157		AM_RANGE(0x0000, 0x7fff) AM_WRITE(SMH_ROM)
158		AM_RANGE(0xc000, 0xc7ff) AM_WRITE(SMH_RAM)
159		AM_RANGE(0xf000, 0xf001) AM_DEVWRITE("ym1", ym2203_w)
160		AM_RANGE(0xf002, 0xf003) AM_DEVWRITE("ym2", ym2203_w)
161		ADDRESS_MAP_END
162
163	138	/* Whizz */
164	139
165	140	static WRITE8_HANDLER( whizz_bankswitch_w )
r4679	r4680
180	155	memory_set_bankptr(space->machine, 1,&RAM[bankaddress]);
181	156	}
182	157
183		static ADDRESS_MAP_START( whizz_readmem, ADDRESS_SPACE_PROGRAM, 8 )
184		AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM)
185		AM_RANGE(0x8000, 0xbfff) AM_READ(SMH_BANK1)
186		AM_RANGE(0xc800, 0xc800) AM_READ_PORT("DSW0")
187		AM_RANGE(0xc801, 0xc801) AM_READ_PORT("DSW1")
188		AM_RANGE(0xc802, 0xc802) AM_READ_PORT("DSW2")
189		AM_RANGE(0xc803, 0xc803) AM_READ_PORT("IN0")
190		AM_RANGE(0xc804, 0xc804) AM_READ_PORT("IN1")
191		AM_RANGE(0xc805, 0xc805) AM_READ_PORT("IN2")
	158	static ADDRESS_MAP_START( whizz_map, ADDRESS_SPACE_PROGRAM, 8 )
	159	AM_RANGE(0x0000, 0x7fff) AM_ROM
	160	AM_RANGE(0x8000, 0xbfff) AM_ROMBANK(1)
	161	AM_RANGE(0xc000, 0xc3ff) AM_RAM_WRITE(paletteram_xxxxBBBBRRRRGGGG_split1_w) AM_BASE(&paletteram)
	162	AM_RANGE(0xc400, 0xc7ff) AM_RAM_WRITE(paletteram_xxxxBBBBRRRRGGGG_split2_w) AM_BASE(&paletteram_2)
	163	AM_RANGE(0xc800, 0xc800) AM_READ_PORT("DSW0") AM_WRITE(soundlatch_w)
	164	AM_RANGE(0xc801, 0xc801) AM_READ_PORT("DSW1") AM_WRITE(whizz_bankswitch_w)
	165	AM_RANGE(0xc802, 0xc802) AM_READ_PORT("DSW2") AM_WRITE(watchdog_reset_w)
	166	AM_RANGE(0xc803, 0xc803) AM_READ_PORT("IN0") AM_WRITENOP
	167	AM_RANGE(0xc804, 0xc804) AM_READ_PORT("IN1") AM_WRITE(sidearms_c804_w)
	168	AM_RANGE(0xc805, 0xc805) AM_READ_PORT("IN2") AM_WRITENOP
192	169	AM_RANGE(0xc806, 0xc806) AM_READ_PORT("IN3")
193	170	AM_RANGE(0xc807, 0xc807) AM_READ_PORT("IN4")
194		AM_RANGE(0xd000, 0xffff) AM_READ(SMH_RAM)
195		ADDRESS_MAP_END
196
197		static ADDRESS_MAP_START( whizz_writemem, ADDRESS_SPACE_PROGRAM, 8 )
198		AM_RANGE(0x0000, 0xbfff) AM_WRITE(SMH_ROM)
199		AM_RANGE(0xc000, 0xc3ff) AM_WRITE(paletteram_xxxxBBBBRRRRGGGG_split1_w) AM_BASE(&paletteram)
200		AM_RANGE(0xc400, 0xc7ff) AM_WRITE(paletteram_xxxxBBBBRRRRGGGG_split2_w) AM_BASE(&paletteram_2)
201		AM_RANGE(0xc800, 0xc800) AM_WRITE(soundlatch_w)
202		AM_RANGE(0xc801, 0xc801) AM_WRITE(whizz_bankswitch_w)
203		AM_RANGE(0xc802, 0xc802) AM_WRITE(watchdog_reset_w)
204		AM_RANGE(0xc803, 0xc803) AM_WRITENOP /* ? */
205		AM_RANGE(0xc804, 0xc804) AM_WRITE(sidearms_c804_w)
206		AM_RANGE(0xc805, 0xc805) AM_WRITENOP /* ? */
	171	AM_RANGE(0xc808, 0xc809) AM_WRITEONLY AM_BASE(&sidearms_bg_scrollx)
	172	AM_RANGE(0xc80a, 0xc80b) AM_WRITEONLY AM_BASE(&sidearms_bg_scrolly)
207	173	AM_RANGE(0xe805, 0xe805) AM_WRITE(sidearms_star_scrollx_w)
208	174	AM_RANGE(0xe806, 0xe806) AM_WRITE(sidearms_star_scrolly_w)
209		AM_RANGE(0xc808, 0xc809) AM_WRITE(SMH_RAM) AM_BASE(&sidearms_bg_scrollx)
210		AM_RANGE(0xc80a, 0xc80b) AM_WRITE(SMH_RAM) AM_BASE(&sidearms_bg_scrolly)
211	175	AM_RANGE(0xc80c, 0xc80c) AM_WRITE(sidearms_gfxctrl_w)
212		AM_RANGE(0xd000, 0xd7ff) AM_WRITE(sidearms_videoram_w) AM_BASE(&videoram)
213		AM_RANGE(0xd800, 0xdfff) AM_WRITE(sidearms_colorram_w) AM_BASE(&colorram)
214		AM_RANGE(0xe000, 0xefff) AM_WRITE(SMH_RAM)
215		AM_RANGE(0xf000, 0xffff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
	176	AM_RANGE(0xd000, 0xd7ff) AM_RAM_WRITE(sidearms_videoram_w) AM_BASE(&videoram)
	177	AM_RANGE(0xd800, 0xdfff) AM_RAM_WRITE(sidearms_colorram_w) AM_BASE(&colorram)
	178	AM_RANGE(0xe000, 0xefff) AM_RAM
	179	AM_RANGE(0xf000, 0xffff) AM_RAM AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
216	180	ADDRESS_MAP_END
217	181
218		static ADDRESS_MAP_START( whizz_sound_readmem, ADDRESS_SPACE_PROGRAM, 8 )
219		AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM)
220		AM_RANGE(0xf800, 0xffff) AM_READ(SMH_RAM)
	182	static ADDRESS_MAP_START( whizz_sound_map, ADDRESS_SPACE_PROGRAM, 8 )
	183	AM_RANGE(0x0000, 0x7fff) AM_ROM
	184	AM_RANGE(0xf800, 0xffff) AM_RAM
221	185	ADDRESS_MAP_END
222	186
223		static ADDRESS_MAP_START( whizz_sound_writemem, ADDRESS_SPACE_PROGRAM, 8 )
224		AM_RANGE(0x0000, 0x7fff) AM_WRITE(SMH_ROM)
225		AM_RANGE(0xf800, 0xffff) AM_WRITE(SMH_RAM)
226		ADDRESS_MAP_END
227
228	187	static ADDRESS_MAP_START( whizz_io_map, ADDRESS_SPACE_IO, 8 )
229	188	ADDRESS_MAP_GLOBAL_MASK(0xff)
230	189	AM_RANGE(0x00, 0x01) AM_DEVREADWRITE("ym", ym2151_r, ym2151_w)
r4679	r4680
691	650	/* handler called by the 2203 emulator when the internal timers cause an IRQ */
692	651	static void irqhandler(const device_config *device, int irq)
693	652	{
694		cpu_set_input_line(device->machine->cpu[1],0,irq ? ASSERT_LINE : CLEAR_LINE);
	653	cputag_set_input_line(device->machine, "audiocpu", 0, irq ? ASSERT_LINE : CLEAR_LINE);
695	654	}
696	655
697	656	static const ym2203_interface ym2203_config =
r4679	r4680
713	672
714	673	/* basic machine hardware */
715	674	MDRV_CPU_ADD("maincpu", Z80, 4000000) /* 4 MHz (?) */
716		MDRV_CPU_PROGRAM_MAP(readmem,writemem)
	675	MDRV_CPU_PROGRAM_MAP(sidearms_map,0)
717	676	MDRV_CPU_VBLANK_INT("screen", irq0_line_hold)
718	677
719	678	MDRV_CPU_ADD("audiocpu", Z80, 4000000) /* 4 MHz (?) */
720		MDRV_CPU_PROGRAM_MAP(sound_readmem,sound_writemem)
	679	MDRV_CPU_PROGRAM_MAP(sidearms_sound_map,0)
721	680
722	681	/* video hardware */
723	682	MDRV_VIDEO_ATTRIBUTES(VIDEO_BUFFERS_SPRITERAM)
r4679	r4680
758	717
759	718	/* basic machine hardware */
760	719	MDRV_CPU_ADD("maincpu", Z80, 4000000) /* 4 MHz (?) */
761		MDRV_CPU_PROGRAM_MAP(turtship_readmem,turtship_writemem)
	720	MDRV_CPU_PROGRAM_MAP(turtship_map,0)
762	721	MDRV_CPU_VBLANK_INT("screen", irq0_line_hold)
763	722
764	723	MDRV_CPU_ADD("audiocpu", Z80, 4000000) /* 4 MHz (?) */
765		MDRV_CPU_PROGRAM_MAP(sound_readmem,sound_writemem)
	724	MDRV_CPU_PROGRAM_MAP(sidearms_sound_map,0)
766	725
767	726	/* video hardware */
768	727	MDRV_VIDEO_ATTRIBUTES(VIDEO_BUFFERS_SPRITERAM)
r4679	r4680
802	761
803	762	/* basic machine hardware */
804	763	MDRV_CPU_ADD("maincpu", Z80, 4000000)        /* 4 MHz (?) */
805		MDRV_CPU_PROGRAM_MAP(whizz_readmem,whizz_writemem)
	764	MDRV_CPU_PROGRAM_MAP(whizz_map,0)
806	765	MDRV_CPU_VBLANK_INT("screen", irq0_line_hold)
807	766
808	767	MDRV_CPU_ADD("audiocpu", Z80, 4000000)
809		MDRV_CPU_PROGRAM_MAP(whizz_sound_readmem,whizz_sound_writemem)
	768	MDRV_CPU_PROGRAM_MAP(whizz_sound_map,0)
810	769	MDRV_CPU_IO_MAP(whizz_io_map,0)
811	770	MDRV_CPU_VBLANK_INT("screen", irq0_line_hold)
812	771
r4679	r4680
1219	1178	GAME( 1989, dygera,   dyger,    turtship, dyger,    dyger,    ROT270, "Philko", "Dyger (Korea set 2)", 0 )
1220	1179	GAME( 1989, twinfalc, 0,        whizz,    whizz,    whizz,    ROT0,   "Philko (Poara Enterprises license)", "Twin Falcons", 0 )
1221	1180	GAME( 1989, whizz,    twinfalc, whizz,    whizz,    whizz,    ROT0,   "Philko", "Whizz", 0 )
1222
1223
1224

src/mame/drivers/taito_x.c

r4679	r4680
886	886	/* handler called by the YM2610 emulator when the internal timers cause an IRQ */
887	887	static void irqhandler(const device_config *device, int irq)
888	888	{
889		cpu_set_input_line(device->machine->cpu[1],0,irq ? ASSERT_LINE : CLEAR_LINE);
	889	cputag_set_input_line(device->machine, "audiocpu", 0, irq ? ASSERT_LINE : CLEAR_LINE);
890	890	}
891	891
892	892	static const ym2610_interface ym2610_config =
r4679	r4680
1302	1302
1303	1303	static DRIVER_INIT( kyustrkr )
1304	1304	{
1305		memory_install_write16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x900000, 0x90000f, 0, 0, kyustrkr_input_w);
	1305	memory_install_write16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x900000, 0x90000f, 0, 0, kyustrkr_input_w);
1306	1306	}
1307	1307
1308	1308

src/mame/drivers/jack.c

r4679	r4680
72	72
73	73	static WRITE8_HANDLER( jack_sh_command_w )
74	74	{
75		soundlatch_w(space,0,data);
76		cpu_set_input_line(space->machine->cpu[1], 0, HOLD_LINE);
	75	soundlatch_w(space, 0, data);
	76	cputag_set_input_line(space->machine, "audiocpu", 0, HOLD_LINE);
77	77	}
78	78
79	79
r4679	r4680
1336	1336	int A;
1337	1337	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
1338	1338	UINT8 *rom = memory_region(machine, "maincpu");
1339		UINT8 *decrypt = auto_malloc(0x4000);
	1339	UINT8 *decrypt = auto_alloc_array(machine, UINT8, 0x4000);
1340	1340	int data;
1341	1341
1342	1342	memory_set_decrypted_region(space, 0x0000, 0x3fff, decrypt);
r4679	r4680
1436	1436	}
1437	1437
1438	1438	// Set-up the weirdest questions read ever done
1439		memory_install_read8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xc000, 0xcfff, 0, 0, striv_question_r);
	1439	memory_install_read8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xc000, 0xcfff, 0, 0, striv_question_r);
1440	1440
1441	1441	// Nop out unused sprites writes
1442		memory_install_write8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xb000, 0xb0ff, 0, 0, SMH_NOP);
	1442	memory_install_write8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xb000, 0xb0ff, 0, 0, (write8_space_func)SMH_NOP);
1443	1443
1444	1444	timer_rate = 128;
1445	1445	}

src/mame/drivers/tumblep.c

r4679	r4680
136	136	AM_RANGE(0x120000, 0x120001) AM_DEVREADWRITE("oki", okim6295_r, okim6295_w)
137	137	AM_RANGE(0x130000, 0x130001) AM_NOP   /* This board only has 1 oki chip */
138	138	AM_RANGE(0x140000, 0x140001) AM_READ(soundlatch_r)
139		AM_RANGE(0x1f0000, 0x1f1fff) AM_READWRITE(SMH_BANK8, SMH_BANK8)
	139	AM_RANGE(0x1f0000, 0x1f1fff) AM_READWRITE(SMH_BANK(8), SMH_BANK(8))
140	140	AM_RANGE(0x1fec00, 0x1fec01) AM_WRITE(h6280_timer_w)
141	141	AM_RANGE(0x1ff400, 0x1ff403) AM_WRITE(h6280_irq_status_w)
142	142	ADDRESS_MAP_END

src/mame/drivers/dogfgt.c

r4679	r4680
32	32	/* bit 0 used but unknown */
33	33
34	34	if (data & 0x04)
35		cpu_set_input_line(space->machine->cpu[1],0,ASSERT_LINE);
	35	cputag_set_input_line(space->machine, "sub", 0, ASSERT_LINE);
36	36	}
37	37
38	38	static WRITE8_HANDLER( sub_irqack_w )
39	39	{
40		cpu_set_input_line(space->machine->cpu[1],0,CLEAR_LINE);
	40	cputag_set_input_line(space->machine, "sub", 0, CLEAR_LINE);
41	41	}
42	42
43	43
r4679	r4680
66	66
67	67
68	68
69		static ADDRESS_MAP_START( main_readmem, ADDRESS_SPACE_PROGRAM, 8 )
70		AM_RANGE(0x0000, 0x07ff) AM_READ(sharedram_r)
71		AM_RANGE(0x1800, 0x1800) AM_READ_PORT("P1")
72		AM_RANGE(0x1810, 0x1810) AM_READ_PORT("P2")
73		AM_RANGE(0x1820, 0x1820) AM_READ_PORT("DSW1")
74		AM_RANGE(0x1830, 0x1830) AM_READ_PORT("DSW2")
75		AM_RANGE(0x2000, 0x3fff) AM_READ(dogfgt_bitmapram_r)
76		AM_RANGE(0x8000, 0xffff) AM_READ(SMH_ROM)
77		ADDRESS_MAP_END
78
79		static ADDRESS_MAP_START( main_writemem, ADDRESS_SPACE_PROGRAM, 8 )
80		AM_RANGE(0x0000, 0x07ff) AM_WRITE(sharedram_w) AM_BASE(&sharedram)
	69	static ADDRESS_MAP_START( main_map, ADDRESS_SPACE_PROGRAM, 8 )
	70	AM_RANGE(0x0000, 0x07ff) AM_READWRITE(sharedram_r, sharedram_w) AM_BASE(&sharedram)
81	71	AM_RANGE(0x0f80, 0x0fdf) AM_WRITE(SMH_RAM) AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
82	72	AM_RANGE(0x1000, 0x17ff) AM_WRITE(dogfgt_bgvideoram_w) AM_BASE(&dogfgt_bgvideoram)
	73	AM_RANGE(0x1800, 0x1800) AM_READ_PORT("P1")
83	74	AM_RANGE(0x1800, 0x1800) AM_WRITE(dogfgt_1800_w)   /* text color, flip screen & coin counters */
	75	AM_RANGE(0x1810, 0x1810) AM_READ_PORT("P2")
84	76	AM_RANGE(0x1810, 0x1810) AM_WRITE(subirqtrigger_w)
	77	AM_RANGE(0x1820, 0x1820) AM_READ_PORT("DSW1")
85	78	AM_RANGE(0x1820, 0x1823) AM_WRITE(dogfgt_scroll_w)
86	79	AM_RANGE(0x1824, 0x1824) AM_WRITE(dogfgt_plane_select_w)
	80	AM_RANGE(0x1830, 0x1830) AM_READ_PORT("DSW2")
87	81	AM_RANGE(0x1830, 0x1830) AM_WRITE(dogfgt_soundlatch_w)
88	82	AM_RANGE(0x1840, 0x1840) AM_WRITE(dogfgt_soundcontrol_w)
89	83	AM_RANGE(0x1870, 0x187f) AM_WRITE(paletteram_BBGGGRRR_w) AM_BASE(&paletteram)
90		AM_RANGE(0x2000, 0x3fff) AM_WRITE(dogfgt_bitmapram_w)
91		AM_RANGE(0x8000, 0xffff) AM_WRITE(SMH_ROM)
	84	AM_RANGE(0x2000, 0x3fff) AM_READWRITE(dogfgt_bitmapram_r, dogfgt_bitmapram_w)
	85	AM_RANGE(0x8000, 0xffff) AM_ROM
92	86	ADDRESS_MAP_END
93	87
94		static ADDRESS_MAP_START( sub_readmem, ADDRESS_SPACE_PROGRAM, 8 )
95		AM_RANGE(0x0000, 0x07ff) AM_READ(SMH_RAM)
96		AM_RANGE(0x2000, 0x27ff) AM_READ(sharedram_r)
97		AM_RANGE(0x8000, 0xffff) AM_READ(SMH_ROM)
98		ADDRESS_MAP_END
99
100		static ADDRESS_MAP_START( sub_writemem, ADDRESS_SPACE_PROGRAM, 8 )
101		AM_RANGE(0x0000, 0x07ff) AM_WRITE(SMH_RAM)
102		AM_RANGE(0x2000, 0x27ff) AM_WRITE(sharedram_w)
	88	static ADDRESS_MAP_START( sub_map, ADDRESS_SPACE_PROGRAM, 8 )
	89	AM_RANGE(0x0000, 0x07ff) AM_RAM
	90	AM_RANGE(0x2000, 0x27ff) AM_READWRITE(sharedram_r, sharedram_w)
103	91	AM_RANGE(0x4000, 0x4000) AM_WRITE(sub_irqack_w)
104		AM_RANGE(0x8000, 0xffff) AM_WRITE(SMH_ROM)
	92	AM_RANGE(0x8000, 0xffff) AM_ROM
105	93	ADDRESS_MAP_END
106	94
107	95
r4679	r4680
232	220
233	221	/* basic machine hardware */
234	222	MDRV_CPU_ADD("maincpu", M6502, 1500000)   /* 1.5 MHz ???? */
235		MDRV_CPU_PROGRAM_MAP(main_readmem,main_writemem)
	223	MDRV_CPU_PROGRAM_MAP(main_map,0)
236	224	MDRV_CPU_VBLANK_INT_HACK(irq0_line_hold,16)   /* ? controls music tempo */
237	225
238	226	MDRV_CPU_ADD("sub", M6502, 1500000)   /* 1.5 MHz ???? */
239		MDRV_CPU_PROGRAM_MAP(sub_readmem,sub_writemem)
	227	MDRV_CPU_PROGRAM_MAP(sub_map,0)
240	228
241	229	MDRV_QUANTUM_TIME(HZ(6000))
242	230

src/mame/drivers/dietgo.c

r4679	r4680
32	32
33	33
34	34	/* Physical memory map (21 bits) */
35		static ADDRESS_MAP_START( sound_readmem, ADDRESS_SPACE_PROGRAM, 8 )
36		AM_RANGE(0x000000, 0x00ffff) AM_READ(SMH_ROM)
37		AM_RANGE(0x100000, 0x100001) AM_READNOP
38		AM_RANGE(0x110000, 0x110001) AM_DEVREAD("ym", ym2151_r)
39		AM_RANGE(0x120000, 0x120001) AM_DEVREAD("oki", okim6295_r)
40		AM_RANGE(0x130000, 0x130001) AM_READNOP /* This board only has 1 oki chip */
	35	static ADDRESS_MAP_START( sound_map, ADDRESS_SPACE_PROGRAM, 8 )
	36	AM_RANGE(0x000000, 0x00ffff) AM_ROM
	37	AM_RANGE(0x100000, 0x100001) AM_NOP      /* YM2203 - this board doesn't have one */
	38	AM_RANGE(0x110000, 0x110001) AM_DEVREADWRITE("ym", ym2151_r, ym2151_w)
	39	AM_RANGE(0x120000, 0x120001) AM_DEVREADWRITE("oki", okim6295_r, okim6295_w)
	40	AM_RANGE(0x130000, 0x130001) AM_NOP      /* This board only has 1 oki chip */
41	41	AM_RANGE(0x140000, 0x140001) AM_READ(soundlatch_r)
42		AM_RANGE(0x1f0000, 0x1f1fff) AM_READ(SMH_BANK8)
43		ADDRESS_MAP_END
44
45		static ADDRESS_MAP_START( sound_writemem, ADDRESS_SPACE_PROGRAM, 8 )
46		AM_RANGE(0x000000, 0x00ffff) AM_WRITE(SMH_ROM)
47		AM_RANGE(0x100000, 0x100001) AM_WRITENOP /* YM2203 - this board doesn't have one */
48		AM_RANGE(0x110000, 0x110001) AM_DEVWRITE("ym", ym2151_w)
49		AM_RANGE(0x120000, 0x120001) AM_DEVWRITE("oki", okim6295_w)
50		AM_RANGE(0x130000, 0x130001) AM_WRITENOP
51		AM_RANGE(0x1f0000, 0x1f1fff) AM_WRITE(SMH_BANK8)
	42	AM_RANGE(0x1f0000, 0x1f1fff) AM_RAMBANK(8)
52	43	AM_RANGE(0x1fec00, 0x1fec01) AM_WRITE(h6280_timer_w)
53	44	AM_RANGE(0x1ff400, 0x1ff403) AM_WRITE(h6280_irq_status_w)
54	45	ADDRESS_MAP_END
r4679	r4680
173	164
174	165	static void sound_irq(const device_config *device, int state)
175	166	{
176		cpu_set_input_line(device->machine->cpu[1],1,state); /* IRQ 2 */
	167	cputag_set_input_line(device->machine, "audiocpu", 1, state); /* IRQ 2 */
177	168	}
178	169
179	170	static const ym2151_interface ym2151_config =
r4679	r4680
188	179	MDRV_CPU_VBLANK_INT("screen", irq6_line_hold)
189	180
190	181	MDRV_CPU_ADD("audiocpu", H6280, XTAL_32_22MHz/4/3)   /* Custom chip 45; XIN is 32.220MHZ/4, verified on pcb */
191		MDRV_CPU_PROGRAM_MAP(sound_readmem,sound_writemem)
	182	MDRV_CPU_PROGRAM_MAP(sound_map,0)
192	183
193	184	/* video hardware */
194	185	MDRV_SCREEN_ADD("screen", RASTER)

src/mame/drivers/taitosj.c

r4679	r4680
181	181	static WRITE8_HANDLER( taitosj_soundcommand_w )
182	182	{
183	183	soundlatch_w(space,offset,data);
184		if (!sndnmi_disable) cpu_set_input_line(space->machine->cpu[1],INPUT_LINE_NMI,PULSE_LINE);
	184	if (!sndnmi_disable) cputag_set_input_line(space->machine, "audiocpu", INPUT_LINE_NMI, PULSE_LINE);
185	185	}
186	186
187	187	static UINT8 input_port_4_f0;
r4679	r4680
199	199
200	200	static ADDRESS_MAP_START( taitosj_main_nomcu_map, ADDRESS_SPACE_PROGRAM, 8 )
201	201	AM_RANGE(0x0000, 0x5fff) AM_ROM
202		AM_RANGE(0x6000, 0x7fff) AM_READWRITE(SMH_BANK1, SMH_ROM)
	202	AM_RANGE(0x6000, 0x7fff) AM_READWRITE(SMH_BANK(1), SMH_ROM)
203	203	AM_RANGE(0x8000, 0x87ff) AM_RAM
204	204	AM_RANGE(0x8800, 0x8800) AM_MIRROR(0x07fe) AM_READWRITE(taitosj_fake_data_r, taitosj_fake_data_w)
205	205	AM_RANGE(0x8801, 0x8801) AM_MIRROR(0x07fe) AM_READ(taitosj_fake_status_r)
r4679	r4680
239	239	/* only difference is taitosj_fake_ replaced with taitosj_mcu_ */
240	240	static ADDRESS_MAP_START( taitosj_main_mcu_map, ADDRESS_SPACE_PROGRAM, 8 )
241	241	AM_RANGE(0x0000, 0x5fff) AM_ROM
242		AM_RANGE(0x6000, 0x7fff) AM_READWRITE(SMH_BANK1, SMH_ROM)
	242	AM_RANGE(0x6000, 0x7fff) AM_READWRITE(SMH_BANK(1), SMH_ROM)
243	243	AM_RANGE(0x8000, 0x87ff) AM_RAM
244	244	AM_RANGE(0x8800, 0x8800) AM_MIRROR(0x07fe) AM_READWRITE(taitosj_mcu_data_r, taitosj_mcu_data_w)
245	245	AM_RANGE(0x8801, 0x8801) AM_MIRROR(0x07fe) AM_READ(taitosj_mcu_status_r)
r4679	r4680
302	302
303	303	static ADDRESS_MAP_START( kikstart_main_map, ADDRESS_SPACE_PROGRAM, 8 )
304	304	AM_RANGE(0x0000, 0x5fff) AM_ROM
305		AM_RANGE(0x6000, 0x7fff) AM_READWRITE(SMH_BANK1, SMH_ROM)
	305	AM_RANGE(0x6000, 0x7fff) AM_READWRITE(SMH_BANK(1), SMH_ROM)
306	306	AM_RANGE(0x8000, 0x87ff) AM_RAM
307	307	AM_RANGE(0x8800, 0x8800) AM_READWRITE(taitosj_mcu_data_r, taitosj_mcu_data_w)
308	308	AM_RANGE(0x8801, 0x8801) AM_READ(taitosj_mcu_status_r)
r4679	r4680
711	711	INPUT_PORTS_END
712	712
713	713	static INPUT_PORTS_START( piratpet )
714		COMMON_IN0
	714	PORT_INCLUDE( junglek )
715	715
716		COMMON_IN1 //Button 2 skips levels when Debug mode is on
	716	/* These 'skip' bits actually work no matter how you set the Debug Dip!          */
	717	/* If cabinet is upright -> only 1 set of controls -> only P1 Skip Next Level    */
	718	/* If cabinet is cocktal -> 2 sets of controls -> both Skip Next Level bits work */
	719	PORT_MODIFY("IN0")
	720	PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_Q) PORT_NAME("P1 Skip Next Level")   // Button 2 skips levels when Debug dips is on
717	721
718		COMMON_IN2
	722	PORT_MODIFY("IN1")
	723	PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_W) PORT_NAME("P2 Skip Next Level")   // Button 2 skips levels when Debug dips is on
719	724
720		COMMON_IN3(IP_ACTIVE_HIGH)
721
722		PORT_START("IN4")
723		PORT_BIT( 0x0f, IP_ACTIVE_LOW, IPT_UNKNOWN )
724		PORT_BIT( 0xf0, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_CUSTOM(input_port_4_f0_r, NULL)   // from sound CPU
725
726		PORT_START("DSW1")
727		PORT_DIPNAME( 0x03, 0x03, "Finish Bonus" )
728		PORT_DIPSETTING(    0x03, DEF_STR( None ) )
729		PORT_DIPSETTING(    0x02, "Timer x1" )
730		PORT_DIPSETTING(    0x01, "Timer x2" )
731		PORT_DIPSETTING(    0x00, "Timer x3" )
	725	PORT_MODIFY("DSW1")
732	726	PORT_DIPNAME( 0x04, 0x04, "Debug Mode" )
733	727	PORT_DIPSETTING(    0x04, DEF_STR( Off ) )
734	728	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
735		PORT_DIPNAME( 0x18, 0x18, DEF_STR( Lives ) )
736		PORT_DIPSETTING(    0x18, "3" )
737		PORT_DIPSETTING(    0x10, "4" )
738		PORT_DIPSETTING(    0x08, "5" )
739		PORT_DIPSETTING(    0x00, "6" )
740		PORT_SERVICE( 0x20, IP_ACTIVE_LOW )
741		PORT_DIPNAME( 0x40, 0x00, DEF_STR( Flip_Screen ) )
742		PORT_DIPSETTING(    0x00, DEF_STR( Off ) )
743		PORT_DIPSETTING(    0x40, DEF_STR( On ) )
744		PORT_DIPNAME( 0x80, 0x00, DEF_STR( Cabinet ) )
745		PORT_DIPSETTING(    0x00, DEF_STR( Upright ) )
746		PORT_DIPSETTING(    0x80, DEF_STR( Cocktail ) )
747	729
748		PORT_START("DSW2")      /* Coinage */
749		DSW2_PORT
750
751		PORT_START("DSW3")
	730	PORT_MODIFY("DSW3")
752	731	PORT_DIPNAME( 0x03, 0x03, DEF_STR( Bonus_Life ) )
753	732	PORT_DIPSETTING(    0x02, "10000" )
754	733	PORT_DIPSETTING(    0x01, "20000" )
r4679	r4680
763	742	PORT_DIPSETTING(    0x08, DEF_STR( Hard ) )
764	743	PORT_DIPSETTING(    0x04, DEF_STR( Harder ) )
765	744	PORT_DIPSETTING(    0x00, DEF_STR( Hardest ) )
766		PORT_DIPNAME( 0x20, 0x20, "Year Display" )
767		PORT_DIPSETTING(    0x00, DEF_STR( No ) )
768		PORT_DIPSETTING(    0x20, DEF_STR( Yes ) )
769	745	PORT_DIPNAME( 0x40, 0x40, "Free Game (Cheat)")
770	746	PORT_DIPSETTING(    0x40, DEF_STR( No ) )
771	747	PORT_DIPSETTING(    0x00, DEF_STR( Yes ) )
772		PORT_DIPNAME( 0x80, 0x80, DEF_STR( Coinage ) )
773		PORT_DIPSETTING(    0x80, "A and B" )
774		PORT_DIPSETTING(    0x00, "A only" )
775	748	INPUT_PORTS_END
776	749
777	750	static INPUT_PORTS_START( alpine )
r4679	r4680
2731	2704	init_common(machine);
2732	2705
2733	2706	/* install protection handler */
2734		memory_install_read8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xd48b, 0xd48b, 0, 0, spacecr_prot_r);
	2707	memory_install_read8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xd48b, 0xd48b, 0, 0, spacecr_prot_r);
2735	2708	}
2736	2709
2737	2710	static DRIVER_INIT( alpine )
r4679	r4680
2739	2712	init_common(machine);
2740	2713
2741	2714	/* install protection handlers */
2742		memory_install_read8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xd40b, 0xd40b, 0, 0, alpine_port_2_r);
2743		memory_install_write8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xd50f, 0xd50f, 0, 0, alpine_protection_w);
	2715	memory_install_read8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xd40b, 0xd40b, 0, 0, alpine_port_2_r);
	2716	memory_install_write8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xd50f, 0xd50f, 0, 0, alpine_protection_w);
2744	2717	}
2745	2718
2746	2719	static DRIVER_INIT( alpinea )
r4679	r4680
2748	2721	init_common(machine);
2749	2722
2750	2723	/* install protection handlers */
2751		memory_install_read8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xd40b, 0xd40b, 0, 0, alpine_port_2_r);
2752		memory_install_write8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xd50e, 0xd50e, 0, 0, alpinea_bankswitch_w);
	2724	memory_install_read8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xd40b, 0xd40b, 0, 0, alpine_port_2_r);
	2725	memory_install_write8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xd50e, 0xd50e, 0, 0, alpinea_bankswitch_w);
2753	2726	}
2754	2727
2755	2728	static DRIVER_INIT( junglhbr )
r4679	r4680
2757	2730	init_common(machine);
2758	2731
2759	2732	/* inverter on bits 0 and 1 */
2760		memory_install_write8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x9000, 0xbfff, 0, 0, junglhbr_characterram_w);
	2733	memory_install_write8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x9000, 0xbfff, 0, 0, junglhbr_characterram_w);
2761	2734	}
2762	2735
2763	2736	GAME( 1981, spaceskr, 0,        nomcu,    spaceskr,   taitosj, ROT0,   "Taito Corporation", "Space Seeker", GAME_SUPPORTS_SAVE )

src/mame/drivers/vigilant.c

r4679	r4680
73	73
74	74
75	75	static ADDRESS_MAP_START( vigilant_map, ADDRESS_SPACE_PROGRAM, 8 )
76		AM_RANGE(0x8000, 0xbfff) AM_READ(SMH_BANK1)      /* Fallthrough */
	76	AM_RANGE(0x8000, 0xbfff) AM_READ(SMH_BANK(1))      /* Fallthrough */
77	77	AM_RANGE(0x0000, 0x7fff) AM_ROM
78	78	AM_RANGE(0xc020, 0xc0df) AM_RAM_WRITE(SMH_RAM) AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
79	79	AM_RANGE(0xc800, 0xcfff) AM_RAM_WRITE(vigilant_paletteram_w) AM_BASE(&paletteram)
r4679	r4680
94	94	ADDRESS_MAP_END
95	95
96	96	static ADDRESS_MAP_START( kikcubic_map, ADDRESS_SPACE_PROGRAM, 8 )
97		AM_RANGE(0x8000, 0xbfff) AM_READ(SMH_BANK1)      /* Fallthrough */
	97	AM_RANGE(0x8000, 0xbfff) AM_READ(SMH_BANK(1))      /* Fallthrough */
98	98	AM_RANGE(0x0000, 0x7fff) AM_ROM
99	99	AM_RANGE(0xc000, 0xc0ff) AM_RAM AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
100	100	AM_RANGE(0xc800, 0xcaff) AM_RAM_WRITE(vigilant_paletteram_w) AM_BASE(&paletteram)

src/mame/drivers/kingobox.c

r4679	r4680
3	3	King of Boxer - (c) 1985 Woodplace Inc.
4	4	Ring King     - (c) 1985 Data East USA Inc. / Woodplace Inc.
5	5
6		Preliminary driver by:
	6	Driver by:
7	7	Ernesto Corvi
8	8	ernesto@imagina.com
9	9
r4679	r4680
40	40	extern VIDEO_START( ringking );
41	41	extern VIDEO_UPDATE( ringking );
42	42
43		static UINT8 *video_shared;
44		static UINT8 *sprite_shared;
45	43	int kingofb_nmi_enable = 0;
46	44
47		static READ8_HANDLER( video_shared_r ) {
48		return video_shared[offset];
	45	static WRITE8_HANDLER( video_interrupt_w )
	46	{
	47	cputag_set_input_line_and_vector(space->machine, "video", 0, HOLD_LINE, 0xff );
49	48	}
50	49
51		static WRITE8_HANDLER( video_shared_w ) {
52		video_shared[offset] = data;
	50	static WRITE8_HANDLER( sprite_interrupt_w )
	51	{
	52	cputag_set_input_line_and_vector(space->machine, "sprite", 0, HOLD_LINE, 0xff );
53	53	}
54	54
55		static READ8_HANDLER( sprite_shared_r ) {
56		return sprite_shared[offset];
57		}
58
59		static WRITE8_HANDLER( sprite_shared_w ) {
60		sprite_shared[offset] = data;
61		}
62
63		static WRITE8_HANDLER( video_interrupt_w ) {
64		cpu_set_input_line_and_vector(space->machine->cpu[1], 0, HOLD_LINE, 0xff );
65		}
66
67		static WRITE8_HANDLER( sprite_interrupt_w ) {
68		cpu_set_input_line_and_vector(space->machine->cpu[2], 0, HOLD_LINE, 0xff );
69		}
70
71		static WRITE8_HANDLER( scroll_interrupt_w ) {
	55	static WRITE8_HANDLER( scroll_interrupt_w )
	56	{
72	57	sprite_interrupt_w( space, offset, data );
73	58	*kingofb_scroll_y = data;
74	59	}
75	60
76		static WRITE8_HANDLER( sound_command_w ) {
	61	static WRITE8_HANDLER( sound_command_w )
	62	{
77	63	soundlatch_w( space, 0, data );
78		cpu_set_input_line_and_vector(space->machine->cpu[3], 0, HOLD_LINE, 0xff );
	64	cputag_set_input_line_and_vector(space->machine, "audiocpu", 0, HOLD_LINE, 0xff );
79	65	}
80	66
81	67
82		static ADDRESS_MAP_START( main_readmem, ADDRESS_SPACE_PROGRAM, 8 )
83		AM_RANGE(0x0000, 0xbfff) AM_READ(SMH_ROM)
84		AM_RANGE(0xc000, 0xc3ff) AM_READ(SMH_RAM) /* work ram */
85		AM_RANGE(0xe000, 0xe7ff) AM_READ(sprite_shared_r)
86		AM_RANGE(0xe800, 0xefff) AM_READ(video_shared_r)
87		AM_RANGE(0xf000, 0xf7ff) AM_READ(SMH_RAM) /* ???? */
88		AM_RANGE(0xfc00, 0xfc00) AM_READ_PORT("DSW1")
89		AM_RANGE(0xfc01, 0xfc01) AM_READ_PORT("DSW2")
90		AM_RANGE(0xfc02, 0xfc02) AM_READ_PORT("P1")
91		AM_RANGE(0xfc03, 0xfc03) AM_READ_PORT("P2")
92		AM_RANGE(0xfc04, 0xfc04) AM_READ_PORT("SYSTEM")
93		AM_RANGE(0xfc05, 0xfc05) AM_READ_PORT("EXTRA")
	68	static ADDRESS_MAP_START( kingobox_map, ADDRESS_SPACE_PROGRAM, 8 )
	69	AM_RANGE(0x0000, 0xbfff) AM_ROM
	70	AM_RANGE(0xc000, 0xc3ff) AM_RAM /* work ram */
	71	AM_RANGE(0xe000, 0xe7ff) AM_RAM AM_SHARE(2) /* shared with sprite cpu */
	72	AM_RANGE(0xe800, 0xefff) AM_RAM AM_SHARE(1) /* shared with video cpu */
	73	AM_RANGE(0xf000, 0xf7ff) AM_RAM /* ???? */
	74	AM_RANGE(0xf800, 0xf800) AM_WRITE(kingofb_f800_w)   /* NMI enable, palette bank */
	75	AM_RANGE(0xf801, 0xf801) AM_WRITENOP /* ???? */
	76	AM_RANGE(0xf802, 0xf802) AM_WRITEONLY AM_BASE(&kingofb_scroll_y)
	77	AM_RANGE(0xf803, 0xf803) AM_WRITE(scroll_interrupt_w)
	78	AM_RANGE(0xf804, 0xf804) AM_WRITE(video_interrupt_w)
	79	AM_RANGE(0xf807, 0xf807) AM_WRITE(sound_command_w) /* sound latch */
	80	AM_RANGE(0xfc00, 0xfc00) AM_READ_PORT("DSW1")
	81	AM_RANGE(0xfc01, 0xfc01) AM_READ_PORT("DSW2")
	82	AM_RANGE(0xfc02, 0xfc02) AM_READ_PORT("P1")
	83	AM_RANGE(0xfc03, 0xfc03) AM_READ_PORT("P2")
	84	AM_RANGE(0xfc04, 0xfc04) AM_READ_PORT("SYSTEM")
	85	AM_RANGE(0xfc05, 0xfc05) AM_READ_PORT("EXTRA")
94	86	ADDRESS_MAP_END
95	87
96		static ADDRESS_MAP_START( main_writemem, ADDRESS_SPACE_PROGRAM, 8 )
97		AM_RANGE(0x0000, 0xbfff) AM_WRITE(SMH_ROM)
98		AM_RANGE(0xc000, 0xc3ff) AM_WRITE(SMH_RAM) /* work ram */
99		AM_RANGE(0xe000, 0xe7ff) AM_WRITE(sprite_shared_w) /* shared with sprite cpu */
100		AM_RANGE(0xe800, 0xefff) AM_WRITE(video_shared_w) /* shared with video cpu */
101		AM_RANGE(0xf000, 0xf7ff) AM_WRITE(SMH_RAM) /* ???? */
102		AM_RANGE(0xf800, 0xf800) AM_WRITE(kingofb_f800_w)   /* NMI enable, palette bank */
103		AM_RANGE(0xf801, 0xf801) AM_WRITENOP /* ???? */
104		AM_RANGE(0xf802, 0xf802) AM_WRITE(SMH_RAM) AM_BASE(&kingofb_scroll_y)
105		AM_RANGE(0xf803, 0xf803) AM_WRITE(scroll_interrupt_w)
106		AM_RANGE(0xf804, 0xf804) AM_WRITE(video_interrupt_w)
107		AM_RANGE(0xf807, 0xf807) AM_WRITE(sound_command_w) /* sound latch */
	88	static ADDRESS_MAP_START( kingobox_video_map, ADDRESS_SPACE_PROGRAM, 8 )
	89	AM_RANGE(0x0000, 0x3fff) AM_ROM
	90	AM_RANGE(0x8000, 0x87ff) AM_RAM /* work ram */
	91	AM_RANGE(0xa000, 0xa7ff) AM_RAM AM_SHARE(1) /* shared with main */
	92	AM_RANGE(0xc000, 0xc0ff) AM_RAM_WRITE(kingofb_videoram_w) AM_BASE(&videoram) /* background vram */
	93	AM_RANGE(0xc400, 0xc4ff) AM_RAM_WRITE(kingofb_colorram_w) AM_BASE(&colorram) /* background colorram */
	94	AM_RANGE(0xc800, 0xcbff) AM_RAM_WRITE(kingofb_videoram2_w) AM_BASE(&kingofb_videoram2) /* foreground vram */
	95	AM_RANGE(0xcc00, 0xcfff) AM_RAM_WRITE(kingofb_colorram2_w) AM_BASE(&kingofb_colorram2) /* foreground colorram */
108	96	ADDRESS_MAP_END
109	97
110		static ADDRESS_MAP_START( video_readmem, ADDRESS_SPACE_PROGRAM, 8 )
111		AM_RANGE(0x0000, 0x3fff) AM_READ(SMH_ROM)
112		AM_RANGE(0x8000, 0x87ff) AM_READ(SMH_RAM) /* work ram */
113		AM_RANGE(0xa000, 0xa7ff) AM_READ(video_shared_r) /* shared with main */
114		AM_RANGE(0xc000, 0xc0ff) AM_READ(SMH_RAM) /* background vram */
115		AM_RANGE(0xc400, 0xc4ff) AM_READ(SMH_RAM) /* background colorram */
116		AM_RANGE(0xc800, 0xcbff) AM_READ(SMH_RAM) /* foreground vram */
117		AM_RANGE(0xcc00, 0xcfff) AM_READ(SMH_RAM) /* foreground colorram */
	98	static ADDRESS_MAP_START( kingobox_sprite_map, ADDRESS_SPACE_PROGRAM, 8 )
	99	AM_RANGE(0x0000, 0x1fff) AM_ROM
	100	AM_RANGE(0x8000, 0x87ff) AM_RAM /* work ram */
	101	AM_RANGE(0xa000, 0xa7ff) AM_RAM AM_SHARE(2) /* shared with main */
	102	AM_RANGE(0xc000, 0xc3ff) AM_RAM AM_BASE(&spriteram) AM_SIZE(&spriteram_size) /* sprite ram */
	103	AM_RANGE(0xc400, 0xc43f) AM_RAM  /* something related to scroll? */
118	104	ADDRESS_MAP_END
119	105
120		static ADDRESS_MAP_START( video_writemem, ADDRESS_SPACE_PROGRAM, 8 )
121		AM_RANGE(0x0000, 0x3fff) AM_WRITE(SMH_ROM)
122		AM_RANGE(0x8000, 0x87ff) AM_WRITE(SMH_RAM) /* work ram */
123		AM_RANGE(0xa000, 0xa7ff) AM_WRITE(video_shared_w) AM_BASE(&video_shared) /* shared with main */
124		AM_RANGE(0xc000, 0xc0ff) AM_WRITE(kingofb_videoram_w) AM_BASE(&videoram) /* background vram */
125		AM_RANGE(0xc400, 0xc4ff) AM_WRITE(kingofb_colorram_w) AM_BASE(&colorram) /* background colorram */
126		AM_RANGE(0xc800, 0xcbff) AM_WRITE(kingofb_videoram2_w) AM_BASE(&kingofb_videoram2) /* foreground vram */
127		AM_RANGE(0xcc00, 0xcfff) AM_WRITE(kingofb_colorram2_w) AM_BASE(&kingofb_colorram2) /* foreground colorram */
	106	static ADDRESS_MAP_START( kingobox_sound_map, ADDRESS_SPACE_PROGRAM, 8 )
	107	AM_RANGE(0x0000, 0xbfff) AM_ROM
	108	AM_RANGE(0x8000, 0x8000) AM_WRITENOP /* ??? */
	109	AM_RANGE(0xc000, 0xc3ff) AM_RAM /* work ram */
128	110	ADDRESS_MAP_END
129	111
130		static ADDRESS_MAP_START( sprite_readmem, ADDRESS_SPACE_PROGRAM, 8 )
131		AM_RANGE(0x0000, 0x1fff) AM_READ(SMH_ROM)
132		AM_RANGE(0x8000, 0x87ff) AM_READ(SMH_RAM) /* work ram */
133		AM_RANGE(0xa000, 0xa7ff) AM_READ(sprite_shared_r) /* shared with main */
134		AM_RANGE(0xc000, 0xc3ff) AM_READ(SMH_RAM) /* sprite ram */
135		AM_RANGE(0xc400, 0xc43f) AM_READ(SMH_RAM) /* something related to scroll? */
136		ADDRESS_MAP_END
137
138		static ADDRESS_MAP_START( sprite_writemem, ADDRESS_SPACE_PROGRAM, 8 )
139		AM_RANGE(0x0000, 0x1fff) AM_WRITE(SMH_ROM)
140		AM_RANGE(0x8000, 0x87ff) AM_WRITE(SMH_RAM) /* work ram */
141		AM_RANGE(0xa000, 0xa7ff) AM_WRITE(sprite_shared_w) AM_BASE(&sprite_shared) /* shared with main */
142		AM_RANGE(0xc000, 0xc3ff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram) AM_SIZE(&spriteram_size) /* sprite ram */
143		AM_RANGE(0xc400, 0xc43f) AM_WRITE(SMH_RAM)  /* something related to scroll? */
144		ADDRESS_MAP_END
145
146		static ADDRESS_MAP_START( sound_readmem, ADDRESS_SPACE_PROGRAM, 8 )
147		AM_RANGE(0x0000, 0xbfff) AM_READ(SMH_ROM)
148		AM_RANGE(0xc000, 0xc3ff) AM_READ(SMH_RAM) /* work ram */
149		ADDRESS_MAP_END
150
151		static ADDRESS_MAP_START( sound_writemem, ADDRESS_SPACE_PROGRAM, 8 )
152		AM_RANGE(0x8000, 0x8000) AM_WRITENOP /* ??? */
153		AM_RANGE(0x0000, 0xbfff) AM_WRITE(SMH_ROM)
154		AM_RANGE(0xc000, 0xc3ff) AM_WRITE(SMH_RAM) /* work ram */
155		ADDRESS_MAP_END
156
157		static ADDRESS_MAP_START( sound_io_map, ADDRESS_SPACE_IO, 8 )
	112	static ADDRESS_MAP_START( kingobox_sound_io_map, ADDRESS_SPACE_IO, 8 )
158	113	ADDRESS_MAP_GLOBAL_MASK(0xff)
159	114	AM_RANGE(0x00, 0x00) AM_DEVWRITE("dac", dac_w)
160	115	AM_RANGE(0x08, 0x08) AM_DEVREADWRITE("ay", ay8910_r, ay8910_data_w)
r4679	r4680
162	117	ADDRESS_MAP_END
163	118
164	119	/* Ring King */
165		static ADDRESS_MAP_START( rk_main_readmem, ADDRESS_SPACE_PROGRAM, 8 )
166		AM_RANGE(0x0000, 0xbfff) AM_READ(SMH_ROM)
167		AM_RANGE(0xc000, 0xc3ff) AM_READ(SMH_RAM) /* work ram */
168		AM_RANGE(0xc800, 0xcfff) AM_READ(sprite_shared_r)
169		AM_RANGE(0xd000, 0xd7ff) AM_READ(video_shared_r)
170		AM_RANGE(0xe000, 0xe000) AM_READ_PORT("DSW1")
171		AM_RANGE(0xe001, 0xe001) AM_READ_PORT("DSW2")
172		AM_RANGE(0xe002, 0xe002) AM_READ_PORT("P1")
173		AM_RANGE(0xe003, 0xe003) AM_READ_PORT("P2")
174		AM_RANGE(0xe004, 0xe004) AM_READ_PORT("SYSTEM")
175		AM_RANGE(0xe005, 0xe005) AM_READ_PORT("EXTRA")
176		AM_RANGE(0xf000, 0xf7ff) AM_READ(SMH_RAM) /* ???? */
	120	static ADDRESS_MAP_START( ringking_map, ADDRESS_SPACE_PROGRAM, 8 )
	121	AM_RANGE(0x0000, 0xbfff) AM_ROM
	122	AM_RANGE(0xc000, 0xc3ff) AM_RAM /* work ram */
	123	AM_RANGE(0xc800, 0xcfff) AM_RAM AM_SHARE(2) /* shared with sprite cpu */
	124	AM_RANGE(0xd000, 0xd7ff) AM_RAM AM_SHARE(1) /* shared with video cpu */
	125	AM_RANGE(0xd800, 0xd800) AM_WRITE(kingofb_f800_w)
	126	AM_RANGE(0xd801, 0xd801) AM_WRITE(sprite_interrupt_w)
	127	AM_RANGE(0xd802, 0xd802) AM_WRITE(video_interrupt_w)
	128	AM_RANGE(0xd803, 0xd803) AM_WRITE(sound_command_w)
	129	AM_RANGE(0xe000, 0xe000) AM_READ_PORT("DSW1")
	130	AM_RANGE(0xe001, 0xe001) AM_READ_PORT("DSW2")
	131	AM_RANGE(0xe002, 0xe002) AM_READ_PORT("P1")
	132	AM_RANGE(0xe003, 0xe003) AM_READ_PORT("P2")
	133	AM_RANGE(0xe004, 0xe004) AM_READ_PORT("SYSTEM")
	134	AM_RANGE(0xe005, 0xe005) AM_READ_PORT("EXTRA")
	135	AM_RANGE(0xe800, 0xe800) AM_WRITEONLY AM_BASE(&kingofb_scroll_y)
	136	AM_RANGE(0xf000, 0xf7ff) AM_RAM /* ???? */
177	137	ADDRESS_MAP_END
178	138
179		static ADDRESS_MAP_START( rk_main_writemem, ADDRESS_SPACE_PROGRAM, 8 )
180		AM_RANGE(0x0000, 0xbfff) AM_WRITE(SMH_ROM)
181		AM_RANGE(0xc000, 0xc3ff) AM_WRITE(SMH_RAM) /* work ram */
182		AM_RANGE(0xc800, 0xcfff) AM_WRITE(sprite_shared_w)
183		AM_RANGE(0xd000, 0xd7ff) AM_WRITE(video_shared_w)
184		AM_RANGE(0xd800, 0xd800) AM_WRITE(kingofb_f800_w)
185		AM_RANGE(0xd801, 0xd801) AM_WRITE(sprite_interrupt_w)
186		AM_RANGE(0xd802, 0xd802) AM_WRITE(video_interrupt_w)
187		AM_RANGE(0xd803, 0xd803) AM_WRITE(sound_command_w)
188		AM_RANGE(0xe800, 0xe800) AM_WRITE(SMH_RAM) AM_BASE(&kingofb_scroll_y)
189		AM_RANGE(0xf000, 0xf7ff) AM_WRITE(SMH_RAM) /* ???? */
	139	static ADDRESS_MAP_START( ringking_video_map, ADDRESS_SPACE_PROGRAM, 8 )
	140	AM_RANGE(0x0000, 0x3fff) AM_ROM
	141	AM_RANGE(0x8000, 0x87ff) AM_RAM /* work ram */
	142	AM_RANGE(0xc000, 0xc7ff) AM_RAM AM_SHARE(1) /* shared with main */
	143	AM_RANGE(0xa800, 0xa8ff) AM_RAM_WRITE(kingofb_videoram_w) AM_BASE(&videoram) /* background vram */
	144	AM_RANGE(0xac00, 0xacff) AM_RAM_WRITE(kingofb_colorram_w) AM_BASE(&colorram) /* background colorram */
	145	AM_RANGE(0xa000, 0xa3ff) AM_RAM_WRITE(kingofb_videoram2_w) AM_BASE(&kingofb_videoram2) /* foreground vram */
	146	AM_RANGE(0xa400, 0xa7ff) AM_RAM_WRITE(kingofb_colorram2_w) AM_BASE(&kingofb_colorram2) /* foreground colorram */
190	147	ADDRESS_MAP_END
191	148
192		static ADDRESS_MAP_START( rk_video_readmem, ADDRESS_SPACE_PROGRAM, 8 )
193		AM_RANGE(0x0000, 0x3fff) AM_READ(SMH_ROM)
194		AM_RANGE(0x8000, 0x87ff) AM_READ(SMH_RAM) /* work ram */
195		AM_RANGE(0xc000, 0xc7ff) AM_READ(video_shared_r) /* shared with main */
196		AM_RANGE(0xa800, 0xa8ff) AM_READ(SMH_RAM) /* background vram */
197		AM_RANGE(0xac00, 0xacff) AM_READ(SMH_RAM) /* background colorram */
198		AM_RANGE(0xa000, 0xa3ff) AM_READ(SMH_RAM) /* foreground vram */
199		AM_RANGE(0xa400, 0xa7ff) AM_READ(SMH_RAM) /* foreground colorram */
	149	static ADDRESS_MAP_START( ringking_sprite_map, ADDRESS_SPACE_PROGRAM, 8 )
	150	AM_RANGE(0x0000, 0x1fff) AM_ROM
	151	AM_RANGE(0x8000, 0x87ff) AM_RAM /* work ram */
	152	AM_RANGE(0xc800, 0xcfff) AM_RAM AM_SHARE(2) /* shared with main */
	153	AM_RANGE(0xa000, 0xa3ff) AM_RAM AM_BASE(&spriteram) AM_SIZE(&spriteram_size) /* sprite ram */
	154	AM_RANGE(0xa400, 0xa43f) AM_RAM /* something related to scroll? */
200	155	ADDRESS_MAP_END
201	156
202		static ADDRESS_MAP_START( rk_video_writemem, ADDRESS_SPACE_PROGRAM, 8 )
203		AM_RANGE(0x0000, 0x3fff) AM_WRITE(SMH_ROM)
204		AM_RANGE(0x8000, 0x87ff) AM_WRITE(SMH_RAM) /* work ram */
205		AM_RANGE(0xc000, 0xc7ff) AM_WRITE(video_shared_w) AM_BASE(&video_shared) /* shared with main */
206		AM_RANGE(0xa800, 0xa8ff) AM_WRITE(kingofb_videoram_w) AM_BASE(&videoram) /* background vram */
207		AM_RANGE(0xac00, 0xacff) AM_WRITE(kingofb_colorram_w) AM_BASE(&colorram) /* background colorram */
208		AM_RANGE(0xa000, 0xa3ff) AM_WRITE(kingofb_videoram2_w) AM_BASE(&kingofb_videoram2) /* foreground vram */
209		AM_RANGE(0xa400, 0xa7ff) AM_WRITE(kingofb_colorram2_w) AM_BASE(&kingofb_colorram2) /* foreground colorram */
210		ADDRESS_MAP_END
211
212		static ADDRESS_MAP_START( rk_sprite_readmem, ADDRESS_SPACE_PROGRAM, 8 )
213		AM_RANGE(0x0000, 0x1fff) AM_READ(SMH_ROM)
214		AM_RANGE(0x8000, 0x87ff) AM_READ(SMH_RAM) /* work ram */
215		AM_RANGE(0xc800, 0xcfff) AM_READ(sprite_shared_r) /* shared with main */
216		AM_RANGE(0xa000, 0xa3ff) AM_READ(SMH_RAM) /* sprite ram */
217		AM_RANGE(0xa400, 0xa43f) AM_READ(SMH_RAM) /* something related to scroll? */
218		ADDRESS_MAP_END
219
220		static ADDRESS_MAP_START( rk_sprite_writemem, ADDRESS_SPACE_PROGRAM, 8 )
221		AM_RANGE(0x0000, 0x1fff) AM_WRITE(SMH_ROM)
222		AM_RANGE(0x8000, 0x87ff) AM_WRITE(SMH_RAM) /* work ram */
223		AM_RANGE(0xc800, 0xcfff) AM_WRITE(sprite_shared_w) AM_BASE(&sprite_shared) /* shared with main */
224		AM_RANGE(0xa000, 0xa3ff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram) AM_SIZE(&spriteram_size) /* sprite ram */
225		AM_RANGE(0xa400, 0xa43f) AM_WRITE(SMH_RAM)  /* something related to scroll? */
226		ADDRESS_MAP_END
227
228		static ADDRESS_MAP_START( rk_sound_io_map, ADDRESS_SPACE_IO, 8 )
	157	static ADDRESS_MAP_START( ringking_sound_io_map, ADDRESS_SPACE_IO, 8 )
229	158	ADDRESS_MAP_GLOBAL_MASK(0xff)
230	159	AM_RANGE(0x00, 0x00) AM_DEVWRITE("dac", dac_w)
231	160	AM_RANGE(0x02, 0x02) AM_DEVREAD("ay", ay8910_r)
r4679	r4680
534	463	DEVCB_MEMORY_HANDLER("audiocpu", PROGRAM, soundlatch_r)
535	464	};
536	465
537		static INTERRUPT_GEN( kingofb_interrupt ) {
	466	static INTERRUPT_GEN( kingofb_interrupt )
	467	{
538	468
539	469	if ( kingofb_nmi_enable )
540	470	cpu_set_input_line(device, INPUT_LINE_NMI, PULSE_LINE);
r4679	r4680
544	474
545	475	/* basic machine hardware */
546	476	MDRV_CPU_ADD("maincpu", Z80, 4000000)        /* 4.0 MHz */
547		MDRV_CPU_PROGRAM_MAP(main_readmem,main_writemem)
	477	MDRV_CPU_PROGRAM_MAP(kingobox_map,0)
548	478	MDRV_CPU_VBLANK_INT("screen", kingofb_interrupt)
549	479
550	480	MDRV_CPU_ADD("video", Z80, 4000000)        /* 4.0 MHz */
551		MDRV_CPU_PROGRAM_MAP(video_readmem,video_writemem)
	481	MDRV_CPU_PROGRAM_MAP(kingobox_video_map,0)
552	482	MDRV_CPU_VBLANK_INT("screen", kingofb_interrupt)
553	483
554	484	MDRV_CPU_ADD("sprite", Z80, 4000000)        /* 4.0 MHz */
555		MDRV_CPU_PROGRAM_MAP(sprite_readmem,sprite_writemem)
	485	MDRV_CPU_PROGRAM_MAP(kingobox_sprite_map,0)
556	486	MDRV_CPU_VBLANK_INT("screen", kingofb_interrupt)
557	487
558	488	MDRV_CPU_ADD("audiocpu", Z80, 4000000)        /* 4.0 MHz */
559		MDRV_CPU_PROGRAM_MAP(sound_readmem,sound_writemem)
560		MDRV_CPU_IO_MAP(sound_io_map,0)
	489	MDRV_CPU_PROGRAM_MAP(kingobox_sound_map,0)
	490	MDRV_CPU_IO_MAP(ringking_sound_io_map,0)
561	491	MDRV_CPU_PERIODIC_INT(nmi_line_pulse, 6000)   /* Hz */
562	492
563	493	MDRV_QUANTUM_TIME(HZ(6000)) /* We really need heavy synching among the processors */
r4679	r4680
594	524
595	525	/* basic machine hardware */
596	526	MDRV_CPU_ADD("maincpu", Z80, 4000000)        /* 4.0 MHz */
597		MDRV_CPU_PROGRAM_MAP(rk_main_readmem,rk_main_writemem)
	527	MDRV_CPU_PROGRAM_MAP(ringking_map,0)
598	528	MDRV_CPU_VBLANK_INT("screen", kingofb_interrupt)
599	529
600	530	MDRV_CPU_ADD("video", Z80, 4000000)        /* 4.0 MHz */
601		MDRV_CPU_PROGRAM_MAP(rk_video_readmem,rk_video_writemem)
	531	MDRV_CPU_PROGRAM_MAP(ringking_video_map,0)
602	532	MDRV_CPU_VBLANK_INT("screen", kingofb_interrupt)
603	533
604	534	MDRV_CPU_ADD("sprite", Z80, 4000000)        /* 4.0 MHz */
605		MDRV_CPU_PROGRAM_MAP(rk_sprite_readmem,rk_sprite_writemem)
	535	MDRV_CPU_PROGRAM_MAP(ringking_sprite_map,0)
606	536	MDRV_CPU_VBLANK_INT("screen", kingofb_interrupt)
607	537
608	538	MDRV_CPU_ADD("audiocpu", Z80, 4000000)        /* 4.0 MHz */
609		MDRV_CPU_PROGRAM_MAP(sound_readmem,sound_writemem)
610		MDRV_CPU_IO_MAP(rk_sound_io_map,0)
	539	MDRV_CPU_PROGRAM_MAP(kingobox_sound_map,0)
	540	MDRV_CPU_IO_MAP(ringking_sound_io_map,0)
611	541	MDRV_CPU_PERIODIC_INT(nmi_line_pulse, 6000)   /* Hz */
612	542
613	543	MDRV_QUANTUM_TIME(HZ(6000)) /* We really need heavy synching among the processors */
r4679	r4680
889	819	GAME( 1985, ringkin2, kingofb, ringking, ringking, 0,        ROT90, "Data East USA", "Ring King (US set 2)", 0 )
890	820	GAME( 1985, ringkin3, kingofb, kingofb,  kingofb,  ringkin3, ROT90, "Data East USA", "Ring King (US set 3)", 0 )
891	821	GAME( 1985, ringkinw, kingofb, kingofb,  kingofb,  ringkinw, ROT90, "Woodplace", "Ring King (US, Woodplace license)", 0 )
892

src/mame/drivers/bfmsys85.c

r4679	r4680
226	226	for (i=0; i<8; i++)
227	227	if ( changed & (1 << i) )   Mechmtr_update(i, cycles, data & (1 << i) );
228	228
229		if ( data ) generic_pulse_irq_line(space->machine->cpu[0], M6809_FIRQ_LINE);
	229	if ( data ) generic_pulse_irq_line(cputag_get_cpu(space->machine, "maincpu"), M6809_FIRQ_LINE);
230	230	}
231	231	///////////////////////////////////////////////////////////////////////////
232	232

src/mame/drivers/galivan.c

r4679	r4680
54	54	UINT8 *RAM = memory_region(machine, "maincpu");
55	55
56	56	memory_set_bankptr(machine, 1,&RAM[0x10000]);
57		device_reset(machine->cpu[0]);
	57	device_reset(cputag_get_cpu(machine, "maincpu"));
58	58	//  layers = 0x60;
59	59	}
60	60
r4679	r4680
102	102
103	103
104	104
105		static ADDRESS_MAP_START( readmem, ADDRESS_SPACE_PROGRAM, 8 )
106		AM_RANGE(0x0000, 0xbfff) AM_READ(SMH_ROM)
107		AM_RANGE(0xc000, 0xdfff) AM_READ(SMH_BANK1)
108		AM_RANGE(0xe000, 0xffff) AM_READ(SMH_RAM)
109		ADDRESS_MAP_END
	105	static ADDRESS_MAP_START( galivan_map, ADDRESS_SPACE_PROGRAM, 8 )
	106	AM_RANGE(0x0000, 0xbfff) AM_ROM
110	107
111		static ADDRESS_MAP_START( writemem, ADDRESS_SPACE_PROGRAM, 8 )
112		AM_RANGE(0x0000, 0xbfff) AM_WRITE(SMH_ROM)
	108	// The next three entires need to be looked at.  It's ugly.
	109	AM_RANGE(0xc000, 0xdfff) AM_READ(SMH_BANK(1))
113	110	AM_RANGE(0xd800, 0xdbff) AM_WRITE(galivan_videoram_w) AM_BASE(&videoram) AM_SIZE(&videoram_size)
114	111	AM_RANGE(0xdc00, 0xdfff) AM_WRITE(galivan_colorram_w) AM_BASE(&colorram)
115		AM_RANGE(0xe000, 0xe0ff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
116		AM_RANGE(0xe100, 0xffff) AM_WRITE(SMH_RAM)
	112
	113	AM_RANGE(0xe000, 0xe0ff) AM_RAM AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
	114	AM_RANGE(0xe100, 0xffff) AM_RAM
117	115	ADDRESS_MAP_END
118	116
119		static ADDRESS_MAP_START( ninjemak_writemem, ADDRESS_SPACE_PROGRAM, 8 )
120		AM_RANGE(0x0000, 0xbfff) AM_WRITE(SMH_ROM)
	117	static ADDRESS_MAP_START( ninjemak_map, ADDRESS_SPACE_PROGRAM, 8 )
	118	AM_RANGE(0x0000, 0xbfff) AM_ROM
	119
	120	// The next three entires need to be looked at.  It's ugly.
	121	AM_RANGE(0xc000, 0xdfff) AM_READ(SMH_BANK(1))
121	122	AM_RANGE(0xd800, 0xd81f) AM_WRITE(ninjemak_videoreg_w)
122	123	AM_RANGE(0xd800, 0xdbff) AM_WRITE(galivan_videoram_w) AM_BASE(&videoram) AM_SIZE(&videoram_size)
123	124	AM_RANGE(0xdc00, 0xdfff) AM_WRITE(galivan_colorram_w) AM_BASE(&colorram)
124		AM_RANGE(0xe000, 0xe1ff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
125		AM_RANGE(0xe200, 0xffff) AM_WRITE(SMH_RAM)
	125
	126	AM_RANGE(0xe000, 0xe1ff) AM_RAM AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
	127	AM_RANGE(0xe200, 0xffff) AM_RAM
126	128	ADDRESS_MAP_END
127	129
128	130	static ADDRESS_MAP_START( io_map, ADDRESS_SPACE_IO, 8 )
r4679	r4680
153	155	//  AM_RANGE(0x87, 0x87) AM_WRITENOP         // ??
154	156	ADDRESS_MAP_END
155	157
156		static ADDRESS_MAP_START( sound_readmem, ADDRESS_SPACE_PROGRAM, 8 )
157		AM_RANGE(0x0000, 0xbfff) AM_READ(SMH_ROM)
158		AM_RANGE(0xc000, 0xc7ff) AM_READ(SMH_RAM)
	158	static ADDRESS_MAP_START( sound_map, ADDRESS_SPACE_PROGRAM, 8 )
	159	AM_RANGE(0x0000, 0xbfff) AM_ROM
	160	AM_RANGE(0xc000, 0xc7ff) AM_RAM
159	161	ADDRESS_MAP_END
160	162
161		static ADDRESS_MAP_START( sound_writemem, ADDRESS_SPACE_PROGRAM, 8 )
162		AM_RANGE(0x0000, 0xbfff) AM_WRITE(SMH_ROM)
163		AM_RANGE(0xc000, 0xc7ff) AM_WRITE(SMH_RAM)
164		ADDRESS_MAP_END
165
166	163	static ADDRESS_MAP_START( sound_io_map, ADDRESS_SPACE_IO, 8 )
167	164	ADDRESS_MAP_GLOBAL_MASK(0xff)
168	165	AM_RANGE(0x00, 0x01) AM_DEVWRITE("ym", ym3526_w)
r4679	r4680
441	438
442	439	/* basic machine hardware */
443	440	MDRV_CPU_ADD("maincpu", Z80,12000000/2)      /* 6 MHz? */
444		MDRV_CPU_PROGRAM_MAP(readmem,writemem)
	441	MDRV_CPU_PROGRAM_MAP(galivan_map,0)
445	442	MDRV_CPU_IO_MAP(io_map,0)
446	443	MDRV_CPU_VBLANK_INT("screen", irq0_line_hold)
447	444
448	445	MDRV_CPU_ADD("audiocpu", Z80,8000000/2)      /* 4 MHz? */
449		MDRV_CPU_PROGRAM_MAP(sound_readmem,sound_writemem)
	446	MDRV_CPU_PROGRAM_MAP(sound_map,0)
450	447	MDRV_CPU_IO_MAP(sound_io_map,0)
451	448	MDRV_CPU_PERIODIC_INT(irq0_line_hold, 7250)  /* timed interrupt, ?? Hz */
452	449
r4679	r4680
484	481
485	482	/* basic machine hardware */
486	483	MDRV_CPU_ADD("maincpu", Z80,12000000/2)      /* 6 MHz? */
487		MDRV_CPU_PROGRAM_MAP(readmem,ninjemak_writemem)
	484	MDRV_CPU_PROGRAM_MAP(ninjemak_map,0)
488	485	MDRV_CPU_IO_MAP(ninjemak_io_map,0)
489	486	MDRV_CPU_VBLANK_INT("screen", irq0_line_hold)
490	487
491	488	MDRV_CPU_ADD("audiocpu", Z80,8000000/2)      /* 4 MHz? */
492		MDRV_CPU_PROGRAM_MAP(sound_readmem,sound_writemem)
	489	MDRV_CPU_PROGRAM_MAP(sound_map,0)
493	490	MDRV_CPU_IO_MAP(sound_io_map,0)
494	491	MDRV_CPU_PERIODIC_INT(irq0_line_hold, 7250)   /* timed interrupt, ?? Hz */
495	492
r4679	r4680
987	984
988	985	static DRIVER_INIT( youmab )
989	986	{
990		memory_install_write8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_IO), 0x82, 0x82, 0, 0, youmab_extra_bank_w); // banks rom at 0x8000? writes 0xff and 0x00 before executing code there
991		memory_install_read8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x0000, 0x7fff, 0, 0, SMH_BANK3);
	987	memory_install_write8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_IO), 0x82, 0x82, 0, 0, youmab_extra_bank_w); // banks rom at 0x8000? writes 0xff and 0x00 before executing code there
	988	memory_install_read8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x0000, 0x7fff, 0, 0, (read8_space_func)SMH_BANK(3));
992	989	memory_set_bankptr(machine,  3, memory_region(machine, "maincpu") );
993		memory_install_read8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x8000, 0xbfff, 0, 0, SMH_BANK2);
	990	memory_install_read8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x8000, 0xbfff, 0, 0, (read8_space_func)SMH_BANK(2));
994	991	memory_set_bankptr(machine,  2, memory_region(machine, "user2") );
995	992
996		memory_install_write8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_IO), 0x81, 0x81, 0, 0, youmab_81_w); // ?? often, alternating values
997		memory_install_write8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_IO), 0x84, 0x84, 0, 0, youmab_84_w); // ?? often, sequence..
	993	memory_install_write8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_IO), 0x81, 0x81, 0, 0, youmab_81_w); // ?? often, alternating values
	994	memory_install_write8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_IO), 0x84, 0x84, 0, 0, youmab_84_w); // ?? often, sequence..
998	995
999		memory_install_write8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xd800, 0xd81f, 0, 0, SMH_NOP); // scrolling isn't here..
	996	memory_install_write8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xd800, 0xd81f, 0, 0, (write8_space_func)SMH_NOP); // scrolling isn't here..
1000	997
1001		memory_install_read8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_IO), 0x8a, 0x8a, 0, 0, youmab_8a_r); // ???
	998	memory_install_read8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_IO), 0x8a, 0x8a, 0, 0, youmab_8a_r); // ???
1002	999
1003	1000	}
1004	1001

src/mame/drivers/esripsys.c

r4679	r4680
78	78
79	79	static void ptm_irq(running_machine *machine, int state)
80	80	{
81		cpu_set_input_line(machine->cpu[ESRIPSYS_SOUND_CPU], M6809_FIRQ_LINE, state ? ASSERT_LINE : CLEAR_LINE);
	81	cputag_set_input_line(machine, "sound_cpu", M6809_FIRQ_LINE, state ? ASSERT_LINE : CLEAR_LINE);
82	82	}
83	83
84	84	static const ptm6840_interface ptm_intf =
r4679	r4680
130	130
131	131	static READ8_HANDLER( g_status_r )
132	132	{
133		int bank4 = BIT(get_rip_status(space->machine->cpu[ESRIPSYS_VIDEO_CPU]), 2);
	133	int bank4 = BIT(get_rip_status(cputag_get_cpu(space->machine, "video_cpu")), 2);
134	134	int vblank = video_screen_get_vblank(space->machine->primary_screen);
135	135
136	136	return (!vblank << 7) | (bank4 << 6) | (f_status & 0x2f);
r4679	r4680
146	146	bankaddress = 0x10000 + (data & 0x03) * 0x10000;
147	147	memory_set_bankptr(space->machine, 1, &rom[bankaddress]);
148	148
149		cpu_set_input_line(space->machine->cpu[ESRIPSYS_FRAME_CPU], M6809_FIRQ_LINE, data & 0x10 ? CLEAR_LINE : ASSERT_LINE);
150		cpu_set_input_line(space->machine->cpu[ESRIPSYS_FRAME_CPU], INPUT_LINE_NMI,  data & 0x80 ? CLEAR_LINE : ASSERT_LINE);
	149	cputag_set_input_line(space->machine, "frame_cpu", M6809_FIRQ_LINE, data & 0x10 ? CLEAR_LINE : ASSERT_LINE);
	150	cputag_set_input_line(space->machine, "frame_cpu", INPUT_LINE_NMI,  data & 0x80 ? CLEAR_LINE : ASSERT_LINE);
151	151
152		cpu_set_input_line(space->machine->cpu[ESRIPSYS_VIDEO_CPU], INPUT_LINE_RESET, data & 0x40 ? CLEAR_LINE : ASSERT_LINE);
	152	cputag_set_input_line(space->machine, "video_cpu", INPUT_LINE_RESET, data & 0x40 ? CLEAR_LINE : ASSERT_LINE);
153	153
154	154	/* /VBLANK IRQ acknowledge */
155	155	if (!(data & 0x20))
156		cpu_set_input_line(space->machine->cpu[ESRIPSYS_GAME_CPU], M6809_IRQ_LINE, CLEAR_LINE);
	156	cputag_set_input_line(space->machine, "game_cpu", M6809_IRQ_LINE, CLEAR_LINE);
157	157	}
158	158
159	159
r4679	r4680
179	179	static READ8_HANDLER( f_status_r )
180	180	{
181	181	int vblank = video_screen_get_vblank(space->machine->primary_screen);
182		UINT8 rip_status = get_rip_status(space->machine->cpu[ESRIPSYS_VIDEO_CPU]);
	182	UINT8 rip_status = get_rip_status(cputag_get_cpu(space->machine, "video_cpu"));
183	183
184	184	rip_status = (rip_status & 0x18) | (BIT(rip_status, 6) << 1) |  BIT(rip_status, 7);
185	185
r4679	r4680
378	378	}
379	379	case 0x02:
380	380	{
381		cpu_set_input_line(space->machine->cpu[ESRIPSYS_SOUND_CPU], INPUT_LINE_NMI, g_iodata & 4 ? CLEAR_LINE : ASSERT_LINE);
	381	cputag_set_input_line(space->machine, "sound_cpu", INPUT_LINE_NMI, g_iodata & 4 ? CLEAR_LINE : ASSERT_LINE);
382	382
383	383	if (!(g_to_s_latch2 & 1) && (g_iodata & 1))
384	384	{
r4679	r4680
386	386	u56a = 1;
387	387
388	388	/*...causing a sound CPU /IRQ */
389		cpu_set_input_line(space->machine->cpu[ESRIPSYS_SOUND_CPU], M6809_IRQ_LINE, ASSERT_LINE);
	389	cputag_set_input_line(space->machine, "sound_cpu", M6809_IRQ_LINE, ASSERT_LINE);
390	390	}
391	391
392	392	if (g_iodata & 2)
r4679	r4680
439	439	{
440	440	io_firq_status |= 2;
441	441	keypad_status |= 0x20;
442		cpu_set_input_line(field->port->machine->cpu[ESRIPSYS_GAME_CPU], M6809_FIRQ_LINE, HOLD_LINE);
	442	cputag_set_input_line(field->port->machine, "game_cpu", M6809_FIRQ_LINE, HOLD_LINE);
443	443	}
444	444	}
445	445
r4679	r4680
449	449	{
450	450	io_firq_status |= 2;
451	451	coin_latch = input_port_read(field->port->machine, "COINS") << 2;
452		cpu_set_input_line(field->port->machine->cpu[ESRIPSYS_GAME_CPU], M6809_FIRQ_LINE, HOLD_LINE);
	452	cputag_set_input_line(field->port->machine, "game_cpu", M6809_FIRQ_LINE, HOLD_LINE);
453	453	}
454	454	}
455	455
r4679	r4680
530	530	if (s_to_g_latch2 & 0x40)
531	531	{
532	532	u56a = 0;
533		cpu_set_input_line(space->machine->cpu[ESRIPSYS_SOUND_CPU], M6809_IRQ_LINE, CLEAR_LINE);
	533	cputag_set_input_line(space->machine, "sound_cpu", M6809_IRQ_LINE, CLEAR_LINE);
534	534	}
535	535
536	536	if (!(s_to_g_latch2 & 0x80) && (data & 0x80))
r4679	r4680
676	676	{
677	677	UINT8 *rom = memory_region(machine, "sound_data");
678	678
679		fdt_a = auto_malloc(FDT_RAM_SIZE);
680		fdt_b = auto_malloc(FDT_RAM_SIZE);
681		cmos_ram = auto_malloc(CMOS_RAM_SIZE);
	679	fdt_a = auto_alloc_array(machine, UINT8, FDT_RAM_SIZE);
	680	fdt_b = auto_alloc_array(machine, UINT8, FDT_RAM_SIZE);
	681	cmos_ram = auto_alloc_array(machine, UINT8, CMOS_RAM_SIZE);
682	682
683	683	ptm6840_config(machine, 0, &ptm_intf);
684	684

src/mame/drivers/nbmj8991.c

r4679	r4680
30	30
31	31	#include "driver.h"
32	32	#include "cpu/z80/z80.h"
33		#include "deprecat.h"
34	33	#include "nb1413m3.h"
35	34	#include "sound/ay8910.h"
36	35	#include "sound/3812intf.h"
r4679	r4680
67	66
68	67	static MACHINE_RESET( nbmj8991 )
69	68	{
70		if (machine->cpu[1] != NULL && cpu_get_type(machine->cpu[1]) == CPU_Z80)
	69	if (cputag_get_cpu(machine, "audiocpu") != NULL && cpu_get_type(cputag_get_cpu(machine, "audiocpu")) == CPU_Z80)
71	70	{
72	71	memory_configure_bank(machine, 1, 0, 4, memory_region(machine, "audiocpu") + 0x8000, 0x8000);
73	72	memory_set_bank(machine, 1, 0);
r4679	r4680
189	188	}
190	189
191	190
192		static ADDRESS_MAP_START( readmem_pstadium, ADDRESS_SPACE_PROGRAM, 8 )
193		AM_RANGE(0x0000, 0xefff) AM_READ(SMH_ROM)
194		AM_RANGE(0xf000, 0xf00f) AM_READ(nbmj8991_clut_r)
195		AM_RANGE(0xf200, 0xf3ff) AM_READ(SMH_RAM)
196		AM_RANGE(0xf800, 0xffff) AM_READ(SMH_RAM)
	191	static ADDRESS_MAP_START( pstadium_map, ADDRESS_SPACE_PROGRAM, 8 )
	192	AM_RANGE(0x0000, 0xefff) AM_ROM
	193	AM_RANGE(0xf000, 0xf00f) AM_READWRITE(nbmj8991_clut_r,nbmj8991_clut_w)
	194	AM_RANGE(0xf200, 0xf3ff) AM_RAM_WRITE(nbmj8991_palette_type3_w) AM_BASE(&paletteram)
	195	AM_RANGE(0xf800, 0xffff) AM_RAM AM_BASE(&nb1413m3_nvram) AM_SIZE(&nb1413m3_nvram_size)   // finalbny
197	196	ADDRESS_MAP_END
198	197
199		static ADDRESS_MAP_START( writemem_pstadium, ADDRESS_SPACE_PROGRAM, 8 )
200		AM_RANGE(0x0000, 0xefff) AM_WRITE(SMH_ROM)
201		AM_RANGE(0xf000, 0xf00f) AM_WRITE(nbmj8991_clut_w)
202		AM_RANGE(0xf200, 0xf3ff) AM_WRITE(nbmj8991_palette_type3_w) AM_BASE(&paletteram)
203		AM_RANGE(0xf800, 0xffff) AM_WRITE(SMH_RAM) AM_BASE(&nb1413m3_nvram) AM_SIZE(&nb1413m3_nvram_size)   // finalbny
	198	static ADDRESS_MAP_START( triplew1_map, ADDRESS_SPACE_PROGRAM, 8 )
	199	AM_RANGE(0x0000, 0xefff) AM_ROM
	200	AM_RANGE(0xf000, 0xf1ff) AM_RAM_WRITE(nbmj8991_palette_type3_w) AM_BASE(&paletteram)
	201	AM_RANGE(0xf200, 0xf20f) AM_READWRITE(nbmj8991_clut_r,nbmj8991_clut_w)
	202	AM_RANGE(0xf800, 0xffff) AM_RAM AM_BASE(&nb1413m3_nvram) AM_SIZE(&nb1413m3_nvram_size)   // mjgottub
204	203	ADDRESS_MAP_END
205	204
206		static ADDRESS_MAP_START( readmem_triplew1, ADDRESS_SPACE_PROGRAM, 8 )
207		AM_RANGE(0x0000, 0xefff) AM_READ(SMH_ROM)
208		AM_RANGE(0xf000, 0xf1ff) AM_READ(SMH_RAM)
209		AM_RANGE(0xf200, 0xf20f) AM_READ(nbmj8991_clut_r)
210		AM_RANGE(0xf800, 0xffff) AM_READ(SMH_RAM)
	205	static ADDRESS_MAP_START( triplew2_map, ADDRESS_SPACE_PROGRAM, 8 )
	206	AM_RANGE(0x0000, 0xefff) AM_ROM
	207	AM_RANGE(0xf000, 0xf1ff) AM_RAM_WRITE(nbmj8991_palette_type3_w) AM_BASE(&paletteram)
	208	AM_RANGE(0xf400, 0xf40f) AM_READWRITE(nbmj8991_clut_r,nbmj8991_clut_w)
	209	AM_RANGE(0xf800, 0xffff) AM_RAM
211	210	ADDRESS_MAP_END
212	211
213		static ADDRESS_MAP_START( writemem_triplew1, ADDRESS_SPACE_PROGRAM, 8 )
214		AM_RANGE(0x0000, 0xefff) AM_WRITE(SMH_ROM)
215		AM_RANGE(0xf000, 0xf1ff) AM_WRITE(nbmj8991_palette_type3_w) AM_BASE(&paletteram)
216		AM_RANGE(0xf200, 0xf20f) AM_WRITE(nbmj8991_clut_w)
217		AM_RANGE(0xf800, 0xffff) AM_WRITE(SMH_RAM) AM_BASE(&nb1413m3_nvram) AM_SIZE(&nb1413m3_nvram_size)   // mjgottub
	212	static ADDRESS_MAP_START( mjlstory_map, ADDRESS_SPACE_PROGRAM, 8 )
	213	AM_RANGE(0x0000, 0xefff) AM_ROM
	214	AM_RANGE(0xf200, 0xf3ff) AM_RAM_WRITE(nbmj8991_palette_type3_w) AM_BASE(&paletteram)
	215	AM_RANGE(0xf700, 0xf70f) AM_READWRITE(nbmj8991_clut_r,nbmj8991_clut_w)
	216	AM_RANGE(0xf800, 0xffff) AM_RAM
218	217	ADDRESS_MAP_END
219	218
220		static ADDRESS_MAP_START( readmem_triplew2, ADDRESS_SPACE_PROGRAM, 8 )
221		AM_RANGE(0x0000, 0xefff) AM_READ(SMH_ROM)
222		AM_RANGE(0xf000, 0xf1ff) AM_READ(SMH_RAM)
223		AM_RANGE(0xf400, 0xf40f) AM_READ(nbmj8991_clut_r)
224		AM_RANGE(0xf800, 0xffff) AM_READ(SMH_RAM)
	219	static ADDRESS_MAP_START( galkoku_map, ADDRESS_SPACE_PROGRAM, 8 )
	220	AM_RANGE(0x0000, 0xefff) AM_ROM
	221	AM_RANGE(0xf000, 0xf00f) AM_READWRITE(nbmj8991_clut_r,nbmj8991_clut_w)
	222	AM_RANGE(0xf400, 0xf5ff) AM_RAM_WRITE(nbmj8991_palette_type1_w) AM_BASE(&paletteram)
	223	AM_RANGE(0xf800, 0xffff) AM_RAM AM_BASE(&nb1413m3_nvram) AM_SIZE(&nb1413m3_nvram_size)   // hyouban
225	224	ADDRESS_MAP_END
226	225
227		static ADDRESS_MAP_START( writemem_triplew2, ADDRESS_SPACE_PROGRAM, 8 )
228		AM_RANGE(0x0000, 0xefff) AM_WRITE(SMH_ROM)
229		AM_RANGE(0xf000, 0xf1ff) AM_WRITE(nbmj8991_palette_type3_w) AM_BASE(&paletteram)
230		AM_RANGE(0xf400, 0xf40f) AM_WRITE(nbmj8991_clut_w)
231		AM_RANGE(0xf800, 0xffff) AM_WRITE(SMH_RAM)
	226	static ADDRESS_MAP_START( galkaika_map, ADDRESS_SPACE_PROGRAM, 8 )
	227	AM_RANGE(0x0000, 0xefff) AM_ROM
	228	AM_RANGE(0xf000, 0xf00f) AM_READWRITE(nbmj8991_clut_r,nbmj8991_clut_w)
	229	AM_RANGE(0xf400, 0xf5ff) AM_RAM_WRITE(nbmj8991_palette_type2_w) AM_BASE(&paletteram)
	230	AM_RANGE(0xf800, 0xffff) AM_RAM AM_BASE(&nb1413m3_nvram) AM_SIZE(&nb1413m3_nvram_size)   // tokimbsj
232	231	ADDRESS_MAP_END
233	232
234		static ADDRESS_MAP_START( readmem_mjlstory, ADDRESS_SPACE_PROGRAM, 8 )
235		AM_RANGE(0x0000, 0xefff) AM_READ(SMH_ROM)
236		AM_RANGE(0xf200, 0xf3ff) AM_READ(SMH_RAM)
237		AM_RANGE(0xf700, 0xf70f) AM_READ(nbmj8991_clut_r)
238		AM_RANGE(0xf800, 0xffff) AM_READ(SMH_RAM)
	233	static ADDRESS_MAP_START( tokyogal_map, ADDRESS_SPACE_PROGRAM, 8 )
	234	AM_RANGE(0x0000, 0xefff) AM_ROM
	235	AM_RANGE(0xf000, 0xf1ff) AM_RAM_WRITE(nbmj8991_palette_type2_w) AM_BASE(&paletteram)
	236	AM_RANGE(0xf400, 0xf40f) AM_READWRITE(nbmj8991_clut_r,nbmj8991_clut_w)
	237	AM_RANGE(0xf800, 0xffff) AM_RAM
239	238	ADDRESS_MAP_END
240	239
241		static ADDRESS_MAP_START( writemem_mjlstory, ADDRESS_SPACE_PROGRAM, 8 )
242		AM_RANGE(0x0000, 0xefff) AM_WRITE(SMH_ROM)
243		AM_RANGE(0xf200, 0xf3ff) AM_WRITE(nbmj8991_palette_type3_w) AM_BASE(&paletteram)
244		AM_RANGE(0xf700, 0xf70f) AM_WRITE(nbmj8991_clut_w)
245		AM_RANGE(0xf800, 0xffff) AM_WRITE(SMH_RAM)
	240	static ADDRESS_MAP_START( av2mj1bb_map, ADDRESS_SPACE_PROGRAM, 8 )
	241	AM_RANGE(0x0000, 0xefff) AM_ROM
	242	AM_RANGE(0xf000, 0xf1ff) AM_RAM_WRITE(nbmj8991_palette_type3_w) AM_BASE(&paletteram)
	243	AM_RANGE(0xf500, 0xf50f) AM_READWRITE(nbmj8991_clut_r,nbmj8991_clut_w)
	244	AM_RANGE(0xf800, 0xffff) AM_RAM
246	245	ADDRESS_MAP_END
247	246
248		static ADDRESS_MAP_START( readmem_galkoku, ADDRESS_SPACE_PROGRAM, 8 )
249		AM_RANGE(0x0000, 0xefff) AM_READ(SMH_ROM)
250		AM_RANGE(0xf000, 0xf00f) AM_READ(nbmj8991_clut_r)
251		AM_RANGE(0xf400, 0xf5ff) AM_READ(SMH_RAM)
252		AM_RANGE(0xf800, 0xffff) AM_READ(SMH_RAM)
	247	static ADDRESS_MAP_START( av2mj2rg_map, ADDRESS_SPACE_PROGRAM, 8 )
	248	AM_RANGE(0x0000, 0xefff) AM_ROM
	249	AM_RANGE(0xf000, 0xf00f) AM_READWRITE(nbmj8991_clut_r,nbmj8991_clut_w)
	250	AM_RANGE(0xf200, 0xf3ff) AM_RAM_WRITE(nbmj8991_palette_type3_w) AM_BASE(&paletteram)
	251	AM_RANGE(0xf800, 0xffff) AM_RAM
253	252	ADDRESS_MAP_END
254	253
255		static ADDRESS_MAP_START( writemem_galkoku, ADDRESS_SPACE_PROGRAM, 8 )
256		AM_RANGE(0x0000, 0xefff) AM_WRITE(SMH_ROM)
257		AM_RANGE(0xf000, 0xf00f) AM_WRITE(nbmj8991_clut_w)
258		AM_RANGE(0xf400, 0xf5ff) AM_WRITE(nbmj8991_palette_type1_w) AM_BASE(&paletteram)
259		AM_RANGE(0xf800, 0xffff) AM_WRITE(SMH_RAM) AM_BASE(&nb1413m3_nvram) AM_SIZE(&nb1413m3_nvram_size)   // hyouban
260		ADDRESS_MAP_END
261
262		static ADDRESS_MAP_START( readmem_galkaika, ADDRESS_SPACE_PROGRAM, 8 )
263		AM_RANGE(0x0000, 0xefff) AM_READ(SMH_ROM)
264		AM_RANGE(0xf000, 0xf00f) AM_READ(nbmj8991_clut_r)
265		AM_RANGE(0xf400, 0xf5ff) AM_READ(SMH_RAM)
266		AM_RANGE(0xf800, 0xffff) AM_READ(SMH_RAM)
267		ADDRESS_MAP_END
268
269		static ADDRESS_MAP_START( writemem_galkaika, ADDRESS_SPACE_PROGRAM, 8 )
270		AM_RANGE(0x0000, 0xefff) AM_WRITE(SMH_ROM)
271		AM_RANGE(0xf000, 0xf00f) AM_WRITE(nbmj8991_clut_w)
272		AM_RANGE(0xf400, 0xf5ff) AM_WRITE(nbmj8991_palette_type2_w) AM_BASE(&paletteram)
273		AM_RANGE(0xf800, 0xffff) AM_WRITE(SMH_RAM) AM_BASE(&nb1413m3_nvram) AM_SIZE(&nb1413m3_nvram_size)   // tokimbsj
274		ADDRESS_MAP_END
275
276		static ADDRESS_MAP_START( readmem_tokyogal, ADDRESS_SPACE_PROGRAM, 8 )
277		AM_RANGE(0x0000, 0xefff) AM_READ(SMH_ROM)
278		AM_RANGE(0xf000, 0xf1ff) AM_READ(SMH_RAM)
279		AM_RANGE(0xf400, 0xf40f) AM_READ(nbmj8991_clut_r)
280		AM_RANGE(0xf800, 0xffff) AM_READ(SMH_RAM)
281		ADDRESS_MAP_END
282
283		static ADDRESS_MAP_START( writemem_tokyogal, ADDRESS_SPACE_PROGRAM, 8 )
284		AM_RANGE(0x0000, 0xefff) AM_WRITE(SMH_ROM)
285		AM_RANGE(0xf000, 0xf1ff) AM_WRITE(nbmj8991_palette_type2_w) AM_BASE(&paletteram)
286		AM_RANGE(0xf400, 0xf40f) AM_WRITE(nbmj8991_clut_w)
287		AM_RANGE(0xf800, 0xffff) AM_WRITE(SMH_RAM)
288		ADDRESS_MAP_END
289
290		static ADDRESS_MAP_START( readmem_av2mj1bb, ADDRESS_SPACE_PROGRAM, 8 )
291		AM_RANGE(0x0000, 0xefff) AM_READ(SMH_ROM)
292		AM_RANGE(0xf000, 0xf1ff) AM_READ(SMH_RAM)
293		AM_RANGE(0xf500, 0xf50f) AM_READ(nbmj8991_clut_r)
294		AM_RANGE(0xf800, 0xffff) AM_READ(SMH_RAM)
295		ADDRESS_MAP_END
296
297		static ADDRESS_MAP_START( writemem_av2mj1bb, ADDRESS_SPACE_PROGRAM, 8 )
298		AM_RANGE(0x0000, 0xefff) AM_WRITE(SMH_ROM)
299		AM_RANGE(0xf000, 0xf1ff) AM_WRITE(nbmj8991_palette_type3_w) AM_BASE(&paletteram)
300		AM_RANGE(0xf500, 0xf50f) AM_WRITE(nbmj8991_clut_w)
301		AM_RANGE(0xf800, 0xffff) AM_WRITE(SMH_RAM)
302		ADDRESS_MAP_END
303
304		static ADDRESS_MAP_START( readmem_av2mj2rg, ADDRESS_SPACE_PROGRAM, 8 )
305		AM_RANGE(0x0000, 0xefff) AM_READ(SMH_ROM)
306		AM_RANGE(0xf000, 0xf00f) AM_READ(nbmj8991_clut_r)
307		AM_RANGE(0xf200, 0xf3ff) AM_READ(SMH_RAM)
308		AM_RANGE(0xf800, 0xffff) AM_READ(SMH_RAM)
309		ADDRESS_MAP_END
310
311		static ADDRESS_MAP_START( writemem_av2mj2rg, ADDRESS_SPACE_PROGRAM, 8 )
312		AM_RANGE(0x0000, 0xefff) AM_WRITE(SMH_ROM)
313		AM_RANGE(0xf000, 0xf00f) AM_WRITE(nbmj8991_clut_w)
314		AM_RANGE(0xf200, 0xf3ff) AM_WRITE(nbmj8991_palette_type3_w) AM_BASE(&paletteram)
315		AM_RANGE(0xf800, 0xffff) AM_WRITE(SMH_RAM)
316		ADDRESS_MAP_END
317
318
319		static ADDRESS_MAP_START( readport_galkoku, ADDRESS_SPACE_IO, 8 )
	254	static ADDRESS_MAP_START( galkoku_io_map, ADDRESS_SPACE_IO, 8 )
320	255	ADDRESS_MAP_GLOBAL_MASK(0xff)
321		AM_RANGE(0x00, 0x7f) AM_READ(nb1413m3_sndrom_r)
322		AM_RANGE(0x90, 0x90) AM_READ(nb1413m3_inputport0_r)
323		AM_RANGE(0xa0, 0xa0) AM_READ(nb1413m3_inputport1_r)
324		AM_RANGE(0xb0, 0xb0) AM_READ(nb1413m3_inputport2_r)
325		AM_RANGE(0xc0, 0xc0) AM_READ(nb1413m3_inputport3_r)
326		AM_RANGE(0xf0, 0xf0) AM_READ(nb1413m3_dipsw1_r)
327		AM_RANGE(0xf1, 0xf1) AM_READ(nb1413m3_dipsw2_r)
328		ADDRESS_MAP_END
329
330		static ADDRESS_MAP_START( writeport_galkoku, ADDRESS_SPACE_IO, 8 )
331		ADDRESS_MAP_GLOBAL_MASK(0xff)
332		AM_RANGE(0x00, 0x7f) AM_WRITE(nbmj8991_blitter_w)
	256	AM_RANGE(0x00, 0x7f) AM_READWRITE(nb1413m3_sndrom_r,nbmj8991_blitter_w)
333	257	AM_RANGE(0x80, 0x81) AM_DEVWRITE("fm", ym3812_w)
334		AM_RANGE(0xa0, 0xa0) AM_WRITE(nb1413m3_inputportsel_w)
335		AM_RANGE(0xb0, 0xb0) AM_WRITE(nb1413m3_sndrombank1_w)
336		AM_RANGE(0xc0, 0xc0) AM_WRITE(nb1413m3_nmi_clock_w)
	258	AM_RANGE(0x90, 0x90) AM_READ(nb1413m3_inputport0_r)
	259	AM_RANGE(0xa0, 0xa0) AM_READWRITE(nb1413m3_inputport1_r,nb1413m3_inputportsel_w)
	260	AM_RANGE(0xb0, 0xb0) AM_READWRITE(nb1413m3_inputport2_r,nb1413m3_sndrombank1_w)
	261	AM_RANGE(0xc0, 0xc0) AM_READWRITE(nb1413m3_inputport3_r,nb1413m3_nmi_clock_w)
337	262	AM_RANGE(0xd0, 0xd0) AM_DEVWRITE("dac", DAC_WRITE)
338	263	//  AM_RANGE(0xe0, 0xe0) AM_WRITENOP
339		AM_RANGE(0xf0, 0xf0) AM_WRITE(nb1413m3_outcoin_w)
340		ADDRESS_MAP_END
341
342		static ADDRESS_MAP_START( readport_hyouban, ADDRESS_SPACE_IO, 8 )
343		ADDRESS_MAP_GLOBAL_MASK(0xff)
344		AM_RANGE(0x00, 0x7f) AM_READ(nb1413m3_sndrom_r)
345		AM_RANGE(0x81, 0x81) AM_DEVREAD("fm", ay8910_r)
346		AM_RANGE(0x90, 0x90) AM_READ(nb1413m3_inputport0_r)
347		AM_RANGE(0xa0, 0xa0) AM_READ(nb1413m3_inputport1_r)
348		AM_RANGE(0xb0, 0xb0) AM_READ(nb1413m3_inputport2_r)
349		AM_RANGE(0xc0, 0xc0) AM_READ(nb1413m3_inputport3_r)
350		AM_RANGE(0xf0, 0xf0) AM_READ(nb1413m3_dipsw1_r)
	264	AM_RANGE(0xf0, 0xf0) AM_READWRITE(nb1413m3_dipsw1_r,nb1413m3_outcoin_w)
351	265	AM_RANGE(0xf1, 0xf1) AM_READ(nb1413m3_dipsw2_r)
352	266	ADDRESS_MAP_END
353	267
354		static ADDRESS_MAP_START( writeport_hyouban, ADDRESS_SPACE_IO, 8 )
	268	static ADDRESS_MAP_START( hyouban_io_map, ADDRESS_SPACE_IO, 8 )
355	269	ADDRESS_MAP_GLOBAL_MASK(0xff)
356		AM_RANGE(0x00, 0x7f) AM_WRITE(nbmj8991_blitter_w)
	270	AM_RANGE(0x00, 0x7f) AM_READWRITE(nb1413m3_sndrom_r,nbmj8991_blitter_w)
	271	AM_RANGE(0x81, 0x81) AM_DEVREAD("fm", ay8910_r)
357	272	AM_RANGE(0x82, 0x83) AM_DEVWRITE("fm", ay8910_data_address_w)
358		AM_RANGE(0xa0, 0xa0) AM_WRITE(nb1413m3_inputportsel_w)
359		AM_RANGE(0xb0, 0xb0) AM_WRITE(nb1413m3_sndrombank1_w)
360		AM_RANGE(0xc0, 0xc0) AM_WRITE(nb1413m3_nmi_clock_w)
	273	AM_RANGE(0x90, 0x90) AM_READ(nb1413m3_inputport0_r)
	274	AM_RANGE(0xa0, 0xa0) AM_READWRITE(nb1413m3_inputport1_r,nb1413m3_inputportsel_w)
	275	AM_RANGE(0xb0, 0xb0) AM_READWRITE(nb1413m3_inputport2_r,nb1413m3_sndrombank1_w)
	276	AM_RANGE(0xc0, 0xc0) AM_READWRITE(nb1413m3_inputport3_r,nb1413m3_nmi_clock_w)
361	277	AM_RANGE(0xd0, 0xd0) AM_DEVWRITE("dac", DAC_WRITE)
362	278	//  AM_RANGE(0xe0, 0xe0) AM_WRITENOP
363		AM_RANGE(0xf0, 0xf0) AM_WRITE(nb1413m3_outcoin_w)
	279	AM_RANGE(0xf0, 0xf0) AM_READWRITE(nb1413m3_dipsw1_r,nb1413m3_outcoin_w)
	280	AM_RANGE(0xf1, 0xf1) AM_READ(nb1413m3_dipsw2_r)
364	281	ADDRESS_MAP_END
365	282
366
367		static ADDRESS_MAP_START( readport_pstadium, ADDRESS_SPACE_IO, 8 )
	283	static ADDRESS_MAP_START( pstadium_io_map, ADDRESS_SPACE_IO, 8 )
368	284	ADDRESS_MAP_GLOBAL_MASK(0xff)
	285	AM_RANGE(0x00, 0x7f) AM_WRITE(nbmj8991_blitter_w)
	286	AM_RANGE(0x80, 0x80) AM_WRITE(nbmj8991_sound_w)
369	287	AM_RANGE(0x90, 0x90) AM_READ(nb1413m3_inputport0_r)
370		AM_RANGE(0xa0, 0xa0) AM_READ(nb1413m3_inputport1_r)
371		AM_RANGE(0xb0, 0xb0) AM_READ(nb1413m3_inputport2_r)
	288	AM_RANGE(0xa0, 0xa0) AM_READWRITE(nb1413m3_inputport1_r,nb1413m3_inputportsel_w)
	289	AM_RANGE(0xb0, 0xb0) AM_READ(nb1413m3_inputport2_r) //AM_WRITENOP
372	290	AM_RANGE(0xc0, 0xc0) AM_READ(nb1413m3_inputport3_r)
373		AM_RANGE(0xf0, 0xf0) AM_READ(nb1413m3_dipsw1_r)
	291	//  AM_RANGE(0xd0, 0xd0) AM_WRITENOP
	292	AM_RANGE(0xf0, 0xf0) AM_READWRITE(nb1413m3_dipsw1_r,nb1413m3_outcoin_w)
374	293	AM_RANGE(0xf8, 0xf8) AM_READ(nb1413m3_dipsw2_r)
375	294	ADDRESS_MAP_END
376	295
377		static ADDRESS_MAP_START( writeport_pstadium, ADDRESS_SPACE_IO, 8 )
	296	static ADDRESS_MAP_START( av2mj1bb_io_map, ADDRESS_SPACE_IO, 8 )
378	297	ADDRESS_MAP_GLOBAL_MASK(0xff)
379	298	AM_RANGE(0x00, 0x7f) AM_WRITE(nbmj8991_blitter_w)
380	299	AM_RANGE(0x80, 0x80) AM_WRITE(nbmj8991_sound_w)
381		AM_RANGE(0xa0, 0xa0) AM_WRITE(nb1413m3_inputportsel_w)
382		//  AM_RANGE(0xb0, 0xb0) AM_WRITENOP
	300	AM_RANGE(0x90, 0x90) AM_READ(nb1413m3_inputport0_r)
	301	AM_RANGE(0xa0, 0xa0) AM_READWRITE(nb1413m3_inputport1_r,nb1413m3_inputportsel_w)
	302	AM_RANGE(0xb0, 0xb0) AM_READWRITE(nb1413m3_inputport2_r,nb1413m3_vcrctrl_w)
	303	AM_RANGE(0xc0, 0xc0) AM_READ(nb1413m3_inputport3_r)
383	304	//  AM_RANGE(0xd0, 0xd0) AM_WRITENOP
384		AM_RANGE(0xf0, 0xf0) AM_WRITE(nb1413m3_outcoin_w)
385		ADDRESS_MAP_END
386
387
388		static ADDRESS_MAP_START( writeport_av2mj1bb, ADDRESS_SPACE_IO, 8 )
389		ADDRESS_MAP_GLOBAL_MASK(0xff)
390		AM_RANGE(0x00, 0x7f) AM_WRITE(nbmj8991_blitter_w)
391		AM_RANGE(0x80, 0x80) AM_WRITE(nbmj8991_sound_w)
392		AM_RANGE(0xa0, 0xa0) AM_WRITE(nb1413m3_inputportsel_w)
393		AM_RANGE(0xb0, 0xb0) AM_WRITE(nb1413m3_vcrctrl_w)
394		//  AM_RANGE(0xd0, 0xd0) AM_WRITENOP
	305	AM_RANGE(0xf0, 0xf0) AM_READ(nb1413m3_dipsw1_r)
395	306	//  AM_RANGE(0xf0, 0xf0) AM_WRITENOP
	307	AM_RANGE(0xf8, 0xf8) AM_READ(nb1413m3_dipsw2_r)
396	308	ADDRESS_MAP_END
397	309
398	310
399
400		static ADDRESS_MAP_START( sound_readmem_nbmj8991, ADDRESS_SPACE_PROGRAM, 8 )
401		AM_RANGE(0x0000, 0x77ff) AM_READ(SMH_ROM)
402		AM_RANGE(0x7800, 0x7fff) AM_READ(SMH_RAM)
403		AM_RANGE(0x8000, 0xffff) AM_READ(SMH_BANK1)
	311	static ADDRESS_MAP_START( nbmj8991_sound_map, ADDRESS_SPACE_PROGRAM, 8 )
	312	AM_RANGE(0x0000, 0x77ff) AM_ROM
	313	AM_RANGE(0x7800, 0x7fff) AM_RAM
	314	AM_RANGE(0x8000, 0xffff) AM_ROMBANK(1)
404	315	ADDRESS_MAP_END
405	316
406		static ADDRESS_MAP_START( sound_writemem_nbmj8991, ADDRESS_SPACE_PROGRAM, 8 )
407		AM_RANGE(0x0000, 0x77ff) AM_WRITE(SMH_ROM)
408		AM_RANGE(0x7800, 0x7fff) AM_WRITE(SMH_RAM)
409		ADDRESS_MAP_END
410
411
412		static ADDRESS_MAP_START( sound_readport_nbmj8991, ADDRESS_SPACE_IO, 8 )
	317	static ADDRESS_MAP_START( nbmj8991_sound_io_map, ADDRESS_SPACE_IO, 8 )
413	318	ADDRESS_MAP_GLOBAL_MASK(0xff)
414		AM_RANGE(0x00, 0x00) AM_READ(nbmj8991_sound_r)
415		ADDRESS_MAP_END
416
417		static ADDRESS_MAP_START( sound_writeport_nbmj8991, ADDRESS_SPACE_IO, 8 )
418		ADDRESS_MAP_GLOBAL_MASK(0xff)
419		AM_RANGE(0x00, 0x00) AM_DEVWRITE("dac1", DAC_WRITE)
	319	AM_RANGE(0x00, 0x00) AM_READ(nbmj8991_sound_r) AM_DEVWRITE("dac1", DAC_WRITE)
420	320	AM_RANGE(0x02, 0x02) AM_DEVWRITE("dac2", DAC_WRITE)
421	321	AM_RANGE(0x04, 0x04) AM_WRITE(nbmj8991_soundbank_w)
422	322	AM_RANGE(0x06, 0x06) AM_WRITENOP
r4679	r4680
1577	1477
1578	1478	/* basic machine hardware */
1579	1479	MDRV_CPU_ADD("maincpu", Z80, 25000000/5)      /* 5.00 MHz ? */
1580		MDRV_CPU_PROGRAM_MAP(readmem_galkoku, writemem_galkoku)
1581		MDRV_CPU_IO_MAP(readport_galkoku, writeport_galkoku)
1582		//  MDRV_CPU_VBLANK_INT_HACK(nb1413m3_interrupt, 128)
	1480	MDRV_CPU_PROGRAM_MAP(galkoku_map, 0)
	1481	MDRV_CPU_IO_MAP(galkoku_io_map, 0)
1583	1482	MDRV_CPU_VBLANK_INT("screen", nb1413m3_interrupt)
1584	1483
1585	1484	MDRV_MACHINE_RESET(nbmj8991)
r4679	r4680
1611	1510
1612	1511	/* basic machine hardware */
1613	1512	MDRV_CPU_ADD("maincpu", Z80, 6000000/2)   /* 3.00 MHz */
1614		MDRV_CPU_PROGRAM_MAP(readmem_pstadium, writemem_pstadium)
1615		MDRV_CPU_IO_MAP(readport_pstadium, writeport_pstadium)
	1513	MDRV_CPU_PROGRAM_MAP(pstadium_map, 0)
	1514	MDRV_CPU_IO_MAP(pstadium_io_map, 0)
1616	1515	MDRV_CPU_VBLANK_INT("screen", nb1413m3_interrupt)
1617	1516
1618	1517	MDRV_CPU_ADD("audiocpu", Z80, 4000000)               /* 4.00 MHz */
1619		MDRV_CPU_PROGRAM_MAP(sound_readmem_nbmj8991, sound_writemem_nbmj8991)
1620		MDRV_CPU_IO_MAP(sound_readport_nbmj8991, sound_writeport_nbmj8991)
1621		MDRV_CPU_VBLANK_INT_HACK(irq0_line_hold, 128)
	1518	MDRV_CPU_PROGRAM_MAP(nbmj8991_sound_map, 0)
	1519	MDRV_CPU_IO_MAP(nbmj8991_sound_io_map, 0)
	1520	MDRV_CPU_PERIODIC_INT(irq0_line_hold, 128*60) // ?
1622	1521
1623	1522	MDRV_MACHINE_RESET(nbmj8991)
1624	1523
r4679	r4680
1675	1574	/* basic machine hardware */
1676	1575	MDRV_IMPORT_FROM(nbmjdrv1)
1677	1576	MDRV_CPU_MODIFY("maincpu")
1678		MDRV_CPU_PROGRAM_MAP(readmem_galkaika, writemem_galkaika)
	1577	MDRV_CPU_PROGRAM_MAP(galkaika_map, 0)
1679	1578	MACHINE_DRIVER_END
1680	1579
1681	1580
r4679	r4680
1684	1583	/* basic machine hardware */
1685	1584	MDRV_IMPORT_FROM(nbmjdrv1)
1686	1585	MDRV_CPU_MODIFY("maincpu")
1687		MDRV_CPU_PROGRAM_MAP(readmem_tokyogal, writemem_tokyogal)
	1586	MDRV_CPU_PROGRAM_MAP(tokyogal_map, 0)
1688	1587	MACHINE_DRIVER_END
1689	1588
1690	1589
r4679	r4680
1693	1592	/* basic machine hardware */
1694	1593	MDRV_IMPORT_FROM(nbmjdrv1)
1695	1594	MDRV_CPU_MODIFY("maincpu")
1696		MDRV_CPU_PROGRAM_MAP(readmem_galkaika, writemem_galkaika)
	1595	MDRV_CPU_PROGRAM_MAP(galkaika_map, 0)
1697	1596
1698	1597	MDRV_NVRAM_HANDLER(nb1413m3)
1699	1598	MACHINE_DRIVER_END
r4679	r4680
1718	1617	/* basic machine hardware */
1719	1618	MDRV_IMPORT_FROM(nbmjdrv3)
1720	1619	MDRV_CPU_MODIFY("maincpu")
1721		MDRV_CPU_IO_MAP(readport_hyouban, writeport_hyouban)
	1620	MDRV_CPU_IO_MAP(hyouban_io_map, 0)
1722	1621
1723	1622	MDRV_NVRAM_HANDLER(nb1413m3)
1724	1623	MACHINE_DRIVER_END
r4679	r4680
1736	1635	/* basic machine hardware */
1737	1636	MDRV_IMPORT_FROM(nbmjdrv2)
1738	1637	MDRV_CPU_MODIFY("maincpu")
1739		MDRV_CPU_PROGRAM_MAP(readmem_triplew1, writemem_triplew1)
	1638	MDRV_CPU_PROGRAM_MAP(triplew1_map, 0)
1740	1639	MACHINE_DRIVER_END
1741	1640
1742	1641
r4679	r4680
1745	1644	/* basic machine hardware */
1746	1645	MDRV_IMPORT_FROM(nbmjdrv2)
1747	1646	MDRV_CPU_MODIFY("maincpu")
1748		MDRV_CPU_PROGRAM_MAP(readmem_triplew2, writemem_triplew2)
	1647	MDRV_CPU_PROGRAM_MAP(triplew2_map, 0)
1749	1648	MACHINE_DRIVER_END
1750	1649
1751	1650
r4679	r4680
1761	1660	/* basic machine hardware */
1762	1661	MDRV_IMPORT_FROM(nbmjdrv2)
1763	1662	MDRV_CPU_MODIFY("maincpu")
1764		MDRV_CPU_PROGRAM_MAP(readmem_mjlstory, writemem_mjlstory)
	1663	MDRV_CPU_PROGRAM_MAP(mjlstory_map, 0)
1765	1664	MACHINE_DRIVER_END
1766	1665
1767	1666
r4679	r4680
1792	1691	/* basic machine hardware */
1793	1692	MDRV_IMPORT_FROM(nbmjdrv2)
1794	1693	MDRV_CPU_MODIFY("maincpu")
1795		MDRV_CPU_PROGRAM_MAP(readmem_triplew1, writemem_triplew1)
	1694	MDRV_CPU_PROGRAM_MAP(triplew1_map, 0)
1796	1695
1797	1696	MDRV_NVRAM_HANDLER(nb1413m3)
1798	1697	MACHINE_DRIVER_END
r4679	r4680
1803	1702	/* basic machine hardware */
1804	1703	MDRV_IMPORT_FROM(nbmjdrv2)
1805	1704	MDRV_CPU_MODIFY("maincpu")
1806		MDRV_CPU_PROGRAM_MAP(readmem_av2mj1bb, writemem_av2mj1bb)
1807		MDRV_CPU_IO_MAP(readport_pstadium, writeport_av2mj1bb)
	1705	MDRV_CPU_PROGRAM_MAP(av2mj1bb_map, 0)
	1706	MDRV_CPU_IO_MAP(av2mj1bb_io_map, 0)
1808	1707	MACHINE_DRIVER_END
1809	1708
1810	1709
r4679	r4680
1813	1712	/* basic machine hardware */
1814	1713	MDRV_IMPORT_FROM(nbmjdrv2)
1815	1714	MDRV_CPU_MODIFY("maincpu")
1816		MDRV_CPU_PROGRAM_MAP(readmem_av2mj2rg, writemem_av2mj2rg)
1817		MDRV_CPU_IO_MAP(readport_pstadium, writeport_av2mj1bb)
	1715	MDRV_CPU_PROGRAM_MAP(av2mj2rg_map, 0)
	1716	MDRV_CPU_IO_MAP(av2mj1bb_io_map, 0)
1818	1717	MACHINE_DRIVER_END
1819	1718
1820	1719

src/mame/drivers/blockout.c

r4679	r4680
41	41	if (ACCESSING_BITS_0_7)
42	42	{
43	43	soundlatch_w(space,offset,data & 0xff);
44		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_NMI, PULSE_LINE);
	44	cputag_set_input_line(space->machine, "audiocpu", INPUT_LINE_NMI, PULSE_LINE);
45	45	}
46	46	}
47	47
r4679	r4680
171	171	/* handler called by the 2151 emulator when the internal timers cause an IRQ */
172	172	static void blockout_irq_handler(const device_config *device, int irq)
173	173	{
174		cpu_set_input_line_and_vector(device->machine->cpu[1],0,irq ? ASSERT_LINE : CLEAR_LINE,0xff);
	174	cputag_set_input_line_and_vector(device->machine, "audiocpu", 0, irq ? ASSERT_LINE : CLEAR_LINE, 0xff);
175	175	}
176	176
177	177	static const ym2151_interface ym2151_config =

src/mame/drivers/tsamurai.c

r4679	r4680
68	68	static int nmi_enabled;
69	69	static int sound_command1, sound_command2, sound_command3;
70	70
71		static WRITE8_HANDLER( nmi_enable_w ){
	71	static WRITE8_HANDLER( nmi_enable_w )
	72	{
72	73	nmi_enabled = data;
73	74	}
74	75
75		static INTERRUPT_GEN( samurai_interrupt ){
	76	static INTERRUPT_GEN( samurai_interrupt )
	77	{
76	78	if (nmi_enabled) cpu_set_input_line(device, INPUT_LINE_NMI, PULSE_LINE);
77	79	}
78	80
r4679	r4680
104	106	static WRITE8_HANDLER( sound_command1_w )
105	107	{
106	108	sound_command1 = data;
107		cpu_set_input_line(space->machine->cpu[1], 0, HOLD_LINE );
	109	cputag_set_input_line(space->machine, "audiocpu", 0, HOLD_LINE );
108	110	}
109	111
110	112	static WRITE8_HANDLER( sound_command2_w )
111	113	{
112	114	sound_command2 = data;
113		cpu_set_input_line(space->machine->cpu[2], 0, HOLD_LINE );
	115	cputag_set_input_line(space->machine, "audio2", 0, HOLD_LINE );
114	116	}
115	117
116	118	static WRITE8_HANDLER( sound_command3_w )
117	119	{
118	120	sound_command3 = data;
119		cpu_set_input_line(space->machine->cpu[3], 0, HOLD_LINE );
	121	cputag_set_input_line(space->machine, "audio3", 0, HOLD_LINE );
120	122	}
121	123
122	124	static WRITE8_HANDLER( flip_screen_w )
r4679	r4680
220	222	return sound_command1;
221	223	}
222	224
223		static READ8_HANDLER( sound_command2_r ){
	225	static READ8_HANDLER( sound_command2_r )
	226	{
224	227	return sound_command2;
225	228	}
226	229
227		static READ8_HANDLER( sound_command3_r ){
	230	static READ8_HANDLER( sound_command3_r )
	231	{
228	232	return sound_command3;
229	233	}
230	234
r4679	r4680
285	289	/*******************************************************************************/
286	290
287	291	static int vsgongf_sound_nmi_enabled;
288		static WRITE8_HANDLER( vsgongf_sound_nmi_enable_w ){
	292	static WRITE8_HANDLER( vsgongf_sound_nmi_enable_w )
	293	{
289	294	vsgongf_sound_nmi_enabled = data;
290	295	}
291	296
292		static INTERRUPT_GEN( vsgongf_sound_interrupt ){
	297	static INTERRUPT_GEN( vsgongf_sound_interrupt )
	298	{
293	299	if (vsgongf_sound_nmi_enabled) cpu_set_input_line(device, INPUT_LINE_NMI, PULSE_LINE);
294	300	}
295	301
296	302	/* what are these, protection of some kind? */
297	303
298		static READ8_HANDLER( vsgongf_a006_r ){
	304	static READ8_HANDLER( vsgongf_a006_r )
	305	{
299	306	/* sound CPU busy? */
300	307	if (!strcmp(space->machine->gamedrv->name,"vsgongf"))  return 0x80;
301	308	if (!strcmp(space->machine->gamedrv->name,"ringfgt"))  return 0x80;
r4679	r4680
305	312	return 0x00;
306	313	}
307	314
308		static READ8_HANDLER( vsgongf_a100_r ){
	315	static READ8_HANDLER( vsgongf_a100_r )
	316	{
309	317	/* protection? */
310	318	if (!strcmp(space->machine->gamedrv->name,"vsgongf"))  return 0xaa;
311	319	if (!strcmp(space->machine->gamedrv->name,"ringfgt"))  return 0x63;
r4679	r4680
315	323	return 0x00;
316	324	}
317	325
318		static WRITE8_HANDLER( vsgongf_sound_command_w ){
319		soundlatch_w( space, offset, data );
320		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_NMI, PULSE_LINE );
	326	static WRITE8_HANDLER( vsgongf_sound_command_w )
	327	{
	328	soundlatch_w(space, offset, data);
	329	cputag_set_input_line(space->machine, "audiocpu", INPUT_LINE_NMI, PULSE_LINE);
321	330	}
322	331
323	332	static ADDRESS_MAP_START( vsgongf_map, ADDRESS_SPACE_PROGRAM, 8 )

src/mame/drivers/deshoros.c

r4679	r4680
92	92	}
93	93
94	94	static ADDRESS_MAP_START( main_map, ADDRESS_SPACE_PROGRAM, 8 )
95		AM_RANGE(0x0000, 0x5fff) AM_READWRITE(SMH_BANK1, SMH_ROM)
	95	AM_RANGE(0x0000, 0x5fff) AM_READWRITE(SMH_BANK(1), SMH_ROM)
96	96	AM_RANGE(0x8000, 0x87ff) AM_RAM
97	97	AM_RANGE(0x9000, 0x900f) AM_READWRITE(io_r,io_w) AM_BASE(&io_ram) //i/o area
98	98	AM_RANGE(0xc000, 0xffff) AM_ROM
r4679	r4680
146	146	/*Is it there an IRQ mask?*/
147	147	static INTERRUPT_GEN( deshoros_irq )
148	148	{
149		cpu_set_input_line(device->machine->cpu[0], M6809_IRQ_LINE, HOLD_LINE);
	149	cputag_set_input_line(device->machine, "maincpu", M6809_IRQ_LINE, HOLD_LINE);
150	150	}
151	151
152	152	static MACHINE_RESET( deshoros )

src/mame/drivers/igs_m027.c

r4679	r4680
269	269	int i;
270	270	unsigned rom_size = 0x80000;
271	271	UINT8 *src = (UINT8 *) (memory_region(machine, "gfx1"));
272		UINT8 *result_data = malloc_or_die(rom_size);
	272	UINT8 *result_data = alloc_array_or_die(UINT8, rom_size);
273	273
274	274	for (i=0; i<rom_size; i++)
275	275	result_data[i] = src[BITSWAP24(i, 23,22,21,20,19,18,17,16,15,14,13,12,11,8,7,6,10,9,5,4,3,2,1,0)];

src/mame/drivers/splash.c

r4679	r4680
42	42	***************************************************************************/
43	43
44	44	#include "driver.h"
45		#include "deprecat.h"
46	45	#include "cpu/z80/z80.h"
47	46	#include "cpu/m68000/m68000.h"
48	47	#include "sound/2203intf.h"
r4679	r4680
62	61	extern int splash_bitmap_type;
63	62	extern int splash_sprite_attr2_shift;
64	63
65		READ16_HANDLER( splash_vram_r );
66	64	WRITE16_HANDLER( splash_vram_w );
67	65	VIDEO_START( splash );
68	66	VIDEO_UPDATE( splash );
r4679	r4680
70	68
71	69	static WRITE16_HANDLER( splash_sh_irqtrigger_w )
72	70	{
73		if (ACCESSING_BITS_0_7){
74		soundlatch_w(space,0,data & 0xff);
75		cpu_set_input_line(space->machine->cpu[1],0,HOLD_LINE);
	71	if (ACCESSING_BITS_0_7)
	72	{
	73	soundlatch_w(space, 0, data & 0xff);
	74	cputag_set_input_line(space->machine, "audiocpu", 0, HOLD_LINE);
76	75	}
77	76	}
78	77
79	78	static WRITE16_HANDLER( roldf_sh_irqtrigger_w )
80	79	{
81		if (ACCESSING_BITS_0_7){
82		soundlatch_w(space,0,data & 0xff);
83		cpu_set_input_line(space->machine->cpu[1],0,HOLD_LINE);
	80	if (ACCESSING_BITS_0_7)
	81	{
	82	soundlatch_w(space, 0, data & 0xff);
	83	cputag_set_input_line(space->machine, "audiocpu", 0, HOLD_LINE);
84	84	}
85	85
86	86	// give the z80 time to see it
87	87	cpu_spinuntil_time(space->cpu, ATTOTIME_IN_USEC(40));
88	88	}
89	89
90		static ADDRESS_MAP_START( splash_readmem, ADDRESS_SPACE_PROGRAM, 16 )
91		AM_RANGE(0x000000, 0x3fffff) AM_READ(SMH_ROM)         /* ROM */
92		AM_RANGE(0x800000, 0x83ffff) AM_READ(SMH_RAM)         /* Pixel Layer */
93		AM_RANGE(0x840000, 0x840001) AM_READ_PORT("DSW1")
94		AM_RANGE(0x840002, 0x840003) AM_READ_PORT("DSW2")
95		AM_RANGE(0x840004, 0x840005) AM_READ_PORT("P1")
96		AM_RANGE(0x840006, 0x840007) AM_READ_PORT("P2")
97		AM_RANGE(0x880000, 0x8817ff) AM_READ(splash_vram_r)      /* Video RAM */
98		AM_RANGE(0x881800, 0x881803) AM_READ(SMH_RAM)         /* Scroll registers */
99		AM_RANGE(0x881804, 0x881fff) AM_READ(SMH_RAM)         /* Work RAM */
100		AM_RANGE(0x8c0000, 0x8c0fff) AM_READ(SMH_RAM)         /* Palette */
101		AM_RANGE(0x900000, 0x900fff) AM_READ(SMH_RAM)         /* Sprite RAM */
102		AM_RANGE(0xffc000, 0xffffff) AM_READ(SMH_RAM)         /* Work RAM */
103		ADDRESS_MAP_END
104
105	90	static WRITE16_HANDLER( splash_coin_w )
106	91	{
107		if (ACCESSING_BITS_8_15){
108		switch ((offset >> 3)){
	92	if (ACCESSING_BITS_8_15)
	93	{
	94	switch ((offset >> 3))
	95	{
109	96	case 0x00:   /* Coin Lockouts */
110	97	case 0x01:
111	98	coin_lockout_w( (offset >> 3) & 0x01, (data & 0x0400) >> 8);
r4679	r4680
118	105	}
119	106	}
120	107
121		static ADDRESS_MAP_START( splash_writemem, ADDRESS_SPACE_PROGRAM, 16 )
122		AM_RANGE(0x000000, 0x3fffff) AM_WRITE(SMH_ROM)                              /* ROM */
123		AM_RANGE(0x800000, 0x83ffff) AM_WRITE(SMH_RAM) AM_BASE(&splash_pixelram)         /* Pixel Layer */
124		AM_RANGE(0x84000e, 0x84000f) AM_WRITE(splash_sh_irqtrigger_w)                     /* Sound command */
125		AM_RANGE(0x84000a, 0x84003b) AM_WRITE(splash_coin_w)                           /* Coin Counters + Coin Lockout */
126		AM_RANGE(0x880000, 0x8817ff) AM_WRITE(splash_vram_w) AM_BASE(&splash_videoram)            /* Video RAM */
127		AM_RANGE(0x881800, 0x881803) AM_WRITE(SMH_RAM) AM_BASE(&splash_vregs)                  /* Scroll registers */
128		AM_RANGE(0x881804, 0x881fff) AM_WRITE(SMH_RAM)                              /* Work RAM */
129		AM_RANGE(0x8c0000, 0x8c0fff) AM_WRITE(paletteram16_xRRRRRGGGGGBBBBB_word_w) AM_BASE(&paletteram16)/* Palette is xRRRRxGGGGxBBBBx */
130		AM_RANGE(0x900000, 0x900fff) AM_WRITE(SMH_RAM) AM_BASE(&splash_spriteram)               /* Sprite RAM */
131		AM_RANGE(0xffc000, 0xffffff) AM_WRITE(SMH_RAM)                              /* Work RAM */
	108	static ADDRESS_MAP_START( splash_map, ADDRESS_SPACE_PROGRAM, 16 )
	109	AM_RANGE(0x000000, 0x3fffff) AM_ROM                                       /* ROM */
	110	AM_RANGE(0x800000, 0x83ffff) AM_RAM AM_BASE(&splash_pixelram)                  /* Pixel Layer */
	111	AM_RANGE(0x840000, 0x840001) AM_READ_PORT("DSW1")
	112	AM_RANGE(0x840002, 0x840003) AM_READ_PORT("DSW2")
	113	AM_RANGE(0x840004, 0x840005) AM_READ_PORT("P1")
	114	AM_RANGE(0x840006, 0x840007) AM_READ_PORT("P2")
	115	AM_RANGE(0x84000e, 0x84000f) AM_WRITE(splash_sh_irqtrigger_w)                  /* Sound command */
	116	AM_RANGE(0x84000a, 0x84003b) AM_WRITE(splash_coin_w)                        /* Coin Counters + Coin Lockout */
	117	AM_RANGE(0x880000, 0x8817ff) AM_RAM_WRITE(splash_vram_w) AM_BASE(&splash_videoram)   /* Video RAM */
	118	AM_RANGE(0x881800, 0x881803) AM_RAM AM_BASE(&splash_vregs)                     /* Scroll registers */
	119	AM_RANGE(0x881804, 0x881fff) AM_RAM                                       /* Work RAM */
	120	AM_RANGE(0x8c0000, 0x8c0fff) AM_RAM_WRITE(paletteram16_xRRRRRGGGGGBBBBB_word_w) AM_BASE(&paletteram16)/* Palette is xRRRRxGGGGxBBBBx */
	121	AM_RANGE(0x900000, 0x900fff) AM_RAM AM_BASE(&splash_spriteram)                  /* Sprite RAM */
	122	AM_RANGE(0xffc000, 0xffffff) AM_RAM                                       /* Work RAM */
132	123	ADDRESS_MAP_END
133	124
134
135		static ADDRESS_MAP_START( splash_readmem_sound, ADDRESS_SPACE_PROGRAM, 8 )
136		AM_RANGE(0x0000, 0xd7ff) AM_READ(SMH_ROM)               /* ROM */
137		AM_RANGE(0xe800, 0xe800) AM_READ(soundlatch_r)            /* Sound latch */
138		AM_RANGE(0xf000, 0xf001) AM_DEVREAD("ym", ym3812_r)   /* YM3812 */
139		AM_RANGE(0xf800, 0xffff) AM_READ(SMH_RAM)               /* RAM */
140		ADDRESS_MAP_END
141
142		static WRITE8_HANDLER( splash_adpcm_data_w ){
	125	static WRITE8_HANDLER( splash_adpcm_data_w )
	126	{
143	127	adpcm_data = data;
144	128	}
145	129
r4679	r4680
149	133	adpcm_data = (adpcm_data << 4) & 0xf0;
150	134	}
151	135
152
153		static ADDRESS_MAP_START( splash_writemem_sound, ADDRESS_SPACE_PROGRAM, 8 )
154		AM_RANGE(0x0000, 0xd7ff) AM_WRITE(SMH_ROM)               /* ROM */
155		AM_RANGE(0xd800, 0xd800) AM_WRITE(splash_adpcm_data_w)      /* ADPCM data for the MSM5205 chip */
156		//  AM_RANGE(0xe000, 0xe000) AM_WRITENOP                 /* ??? */
157		AM_RANGE(0xf000, 0xf001) AM_DEVWRITE("ym", ym3812_w)   /* YM3812 */
158		AM_RANGE(0xf800, 0xffff) AM_WRITE(SMH_RAM)               /* RAM */
	136	static ADDRESS_MAP_START( splash_sound_map, ADDRESS_SPACE_PROGRAM, 8 )
	137	AM_RANGE(0x0000, 0xd7ff) AM_ROM                              /* ROM */
	138	AM_RANGE(0xd800, 0xd800) AM_WRITE(splash_adpcm_data_w)            /* ADPCM data for the MSM5205 chip */
	139	//  AM_RANGE(0xe000, 0xe000) AM_WRITENOP                                /* ??? */
	140	AM_RANGE(0xe800, 0xe800) AM_READ(soundlatch_r)                  /* Sound latch */
	141	AM_RANGE(0xf000, 0xf001) AM_DEVREADWRITE("ym", ym3812_r,ym3812_w)   /* YM3812 */
	142	AM_RANGE(0xf800, 0xffff) AM_RAM                              /* RAM */
159	143	ADDRESS_MAP_END
160	144
161	145	/* Return of Lady Frog Maps */
r4679	r4680
168	152	return ret;
169	153	}
170	154
171		static ADDRESS_MAP_START( roldfrog_readmem, ADDRESS_SPACE_PROGRAM, 16 )
172		AM_RANGE(0x000000, 0x3fffff) AM_READ(SMH_ROM)         /* ROM */
173		AM_RANGE(0x400000, 0x407fff) AM_ROM   AM_BASE(&roldfrog_protdata)               /* Protection Data */
174		AM_RANGE(0x408000, 0x4087ff) AM_READ(SMH_RAM)         /* Extra Ram */
175		AM_RANGE(0x800000, 0x83ffff) AM_READ(SMH_RAM)         /* Pixel Layer */
	155	static ADDRESS_MAP_START( roldfrog_map, ADDRESS_SPACE_PROGRAM, 16 )
	156	AM_RANGE(0x000000, 0x3fffff) AM_ROM                                       /* ROM */
	157	AM_RANGE(0x400000, 0x407fff) AM_ROM   AM_BASE(&roldfrog_protdata)                  /* Protection Data */
	158	AM_RANGE(0x408000, 0x4087ff) AM_RAM                                     /* Extra Ram */
	159	AM_RANGE(0x800000, 0x83ffff) AM_RAM AM_BASE(&splash_pixelram)                  /* Pixel Layer */
176	160	AM_RANGE(0x840000, 0x840001) AM_READ_PORT("DSW1")
177	161	AM_RANGE(0x840002, 0x840003) AM_READ_PORT("DSW2")
178	162	AM_RANGE(0x840004, 0x840005) AM_READ_PORT("P1")
179	163	AM_RANGE(0x840006, 0x840007) AM_READ_PORT("P2")
180		AM_RANGE(0x880000, 0x8817ff) AM_READ(splash_vram_r)      /* Video RAM */
181		AM_RANGE(0x881800, 0x881803) AM_READ(SMH_RAM)         /* Scroll registers */
182		AM_RANGE(0x881804, 0x881fff) AM_READ(SMH_RAM)         /* Work RAM */
183		AM_RANGE(0x8c0000, 0x8c0fff) AM_READ(SMH_RAM)         /* Palette */
	164	AM_RANGE(0x84000e, 0x84000f) AM_WRITE(roldf_sh_irqtrigger_w)                  /* Sound command */
	165	AM_RANGE(0x84000a, 0x84003b) AM_WRITE(splash_coin_w)                        /* Coin Counters + Coin Lockout */
	166	AM_RANGE(0x880000, 0x8817ff) AM_RAM_WRITE(splash_vram_w) AM_BASE(&splash_videoram)   /* Video RAM */
	167	AM_RANGE(0x881800, 0x881803) AM_RAM AM_BASE(&splash_vregs)                     /* Scroll registers */
	168	AM_RANGE(0x881804, 0x881fff) AM_RAM                                       /* Work RAM */
	169	AM_RANGE(0x8c0000, 0x8c0fff) AM_RAM_WRITE(paletteram16_xRRRRRGGGGGBBBBB_word_w) AM_BASE(&paletteram16)/* Palette is xRRRRxGGGGxBBBBx */
184	170	AM_RANGE(0xa00000, 0xa00001) AM_READ(roldfrog_bombs_r)
185		AM_RANGE(0xd00000, 0xd00fff) AM_READ(SMH_RAM)         /* Sprite RAM */
186		AM_RANGE(0xffc000, 0xffffff) AM_READ(SMH_RAM)         /* Work RAM */
	171	AM_RANGE(0xd00000, 0xd00fff) AM_RAM AM_BASE(&splash_spriteram)                  /* Sprite RAM */
	172	AM_RANGE(0xe00000, 0xe00001) AM_WRITEONLY AM_BASE(&roldfrog_bitmap_mode)         /* Bitmap Mode? */
	173	AM_RANGE(0xffc000, 0xffffff) AM_RAM                                       /* Work RAM */
187	174	ADDRESS_MAP_END
188	175
189		static ADDRESS_MAP_START( roldfrog_writemem, ADDRESS_SPACE_PROGRAM, 16 )
190		AM_RANGE(0x000000, 0x3fffff) AM_WRITE(SMH_ROM)                              /* ROM */
191		AM_RANGE(0x408000, 0x4087ff) AM_WRITE(SMH_RAM)                               /* Extra Ram */
192		AM_RANGE(0x800000, 0x83ffff) AM_WRITE(SMH_RAM) AM_BASE(&splash_pixelram)         /* Pixel Layer */
193		AM_RANGE(0x84000e, 0x84000f) AM_WRITE(roldf_sh_irqtrigger_w)                     /* Sound command */
194		AM_RANGE(0x84000a, 0x84003b) AM_WRITE(splash_coin_w)                           /* Coin Counters + Coin Lockout */
195		AM_RANGE(0x880000, 0x8817ff) AM_WRITE(splash_vram_w) AM_BASE(&splash_videoram)            /* Video RAM */
196		AM_RANGE(0x881800, 0x881803) AM_WRITE(SMH_RAM) AM_BASE(&splash_vregs)                  /* Scroll registers */
197		AM_RANGE(0x881804, 0x881fff) AM_WRITE(SMH_RAM)                              /* Work RAM */
198		AM_RANGE(0x8c0000, 0x8c0fff) AM_WRITE(paletteram16_xRRRRRGGGGGBBBBB_word_w) AM_BASE(&paletteram16)/* Palette is xRRRRxGGGGxBBBBx */
199		AM_RANGE(0xd00000, 0xd00fff) AM_WRITE(SMH_RAM) AM_BASE(&splash_spriteram)               /* Sprite RAM */
200		AM_RANGE(0xe00000, 0xe00001) AM_WRITE(SMH_RAM) AM_BASE(&roldfrog_bitmap_mode)               /* Bitmap Mode? */
201		AM_RANGE(0xffc000, 0xffffff) AM_WRITE(SMH_RAM)                              /* Work RAM */
202		ADDRESS_MAP_END
203	176
204
205
206
207		static ADDRESS_MAP_START( roldf_sound_map, ADDRESS_SPACE_PROGRAM, 8 )
	177	static ADDRESS_MAP_START( roldfrog_sound_map, ADDRESS_SPACE_PROGRAM, 8 )
208	178	AM_RANGE(0x0000, 0x6fff) AM_ROM
209	179	AM_RANGE(0x7000, 0x7fff) AM_RAM
210		AM_RANGE(0x8000, 0xffff) AM_REGION("audiocpu", 0x8000)   /* wrong, probably banked somehow */
	180	AM_RANGE(0x8000, 0xffff) AM_ROM AM_REGION("audiocpu", 0x8000)   /* wrong, probably banked somehow */
211	181	ADDRESS_MAP_END
212	182
213		static ADDRESS_MAP_START( roldf_sound_io_map, ADDRESS_SPACE_IO, 8 )
	183	static ADDRESS_MAP_START( roldfrog_sound_io_map, ADDRESS_SPACE_IO, 8 )
214	184	ADDRESS_MAP_GLOBAL_MASK(0xff)
215	185	AM_RANGE(0x12, 0x13) AM_DEVWRITE("ym", ym2203_w)
216	186	AM_RANGE(0x40, 0x40) AM_NOP   /* NMI ack */
217	187	AM_RANGE(0x70, 0x70) AM_READ(soundlatch_r)
218	188	ADDRESS_MAP_END
219	189
220		static ADDRESS_MAP_START( funystrp_readmem, ADDRESS_SPACE_PROGRAM, 16 )
221		AM_RANGE(0x000000, 0x01ffff) AM_READ(SMH_ROM)         /* ROM */
222		AM_RANGE(0x100000, 0x100fff) AM_READ(SMH_ROM)         /* protection? RAM */
223		AM_RANGE(0x800000, 0x83ffff) AM_READ(SMH_RAM)         /* Pixel Layer */
	190	static ADDRESS_MAP_START( funystrp_map, ADDRESS_SPACE_PROGRAM, 16 )
	191	AM_RANGE(0x000000, 0x01ffff) AM_ROM                                       /* ROM */
	192	AM_RANGE(0x100000, 0x100fff) AM_RAM                                       /* protection? RAM */
	193	AM_RANGE(0x800000, 0x83ffff) AM_RAM AM_BASE(&splash_pixelram)                  /* Pixel Layer */
	194	//  AM_RANGE(0x84000e, 0x84000f) AM_WRITE(splash_sh_irqtrigger_w)                       /* Sound command */
	195	AM_RANGE(0x84000a, 0x84003b) AM_WRITE(splash_coin_w)                        /* Coin Counters + Coin Lockout */
224	196	AM_RANGE(0x840000, 0x840001) AM_READ_PORT("DSW1")
225	197	AM_RANGE(0x840002, 0x840003) AM_READ_PORT("DSW2")
226	198	AM_RANGE(0x840004, 0x840005) AM_READ_PORT("P1")
227	199	AM_RANGE(0x840006, 0x840007) AM_READ_PORT("P2")
228		AM_RANGE(0x880000, 0x8817ff) AM_READ(splash_vram_r)      /* Video RAM */
229		AM_RANGE(0x881800, 0x881803) AM_READ(SMH_RAM)         /* Scroll registers */
230		AM_RANGE(0x881804, 0x881fff) AM_READ(SMH_RAM)         /* Work RAM */
231		AM_RANGE(0x8c0000, 0x8c0fff) AM_READ(SMH_RAM)         /* Palette */
232		AM_RANGE(0xD00000, 0xD01fff) AM_READ(SMH_RAM)         /* Sprite RAM */
233		AM_RANGE(0xff0000, 0xffffff) AM_READ(SMH_RAM)         /* Work RAM */
	200	AM_RANGE(0x880000, 0x8817ff) AM_RAM_WRITE(splash_vram_w) AM_BASE(&splash_videoram)   /* Video RAM */
	201	AM_RANGE(0x881800, 0x881803) AM_RAM AM_BASE(&splash_vregs)                     /* Scroll registers */
	202	AM_RANGE(0x881804, 0x881fff) AM_RAM                                       /* Work RAM */
	203	AM_RANGE(0x8c0000, 0x8c0fff) AM_RAM_WRITE(paletteram16_xRRRRRGGGGGBBBBB_word_w) AM_BASE(&paletteram16)/* Palette is xRRRRxGGGGxBBBBx */
	204	AM_RANGE(0xd00000, 0xd01fff) AM_RAM AM_BASE(&splash_spriteram)                  /* Sprite RAM */
	205	AM_RANGE(0xff0000, 0xffffff) AM_RAM                                       /* Work RAM */
234	206	ADDRESS_MAP_END
235	207
236		static ADDRESS_MAP_START( funystrp_writemem, ADDRESS_SPACE_PROGRAM, 16 )
237		AM_RANGE(0x000000, 0x01ffff) AM_WRITE(SMH_ROM)                              /* ROM */
238		AM_RANGE(0x100000, 0x100fff) AM_WRITE(SMH_RAM)                              /* protection? RAM */
239		AM_RANGE(0x800000, 0x83ffff) AM_WRITE(SMH_RAM) AM_BASE(&splash_pixelram)         /* Pixel Layer */
240		//  AM_RANGE(0x84000e, 0x84000f) AM_WRITE(splash_sh_irqtrigger_w)                           /* Sound command */
241		AM_RANGE(0x84000a, 0x84003b) AM_WRITE(splash_coin_w)                           /* Coin Counters + Coin Lockout */
242		AM_RANGE(0x880000, 0x8817ff) AM_WRITE(splash_vram_w) AM_BASE(&splash_videoram)            /* Video RAM */
243		AM_RANGE(0x881800, 0x881803) AM_WRITE(SMH_RAM) AM_BASE(&splash_vregs)                  /* Scroll registers */
244		AM_RANGE(0x881804, 0x881fff) AM_WRITE(SMH_RAM)                              /* Work RAM */
245		AM_RANGE(0x8c0000, 0x8c0fff) AM_WRITE(paletteram16_xRRRRRGGGGGBBBBB_word_w) AM_BASE(&paletteram16)/* Palette is xRRRRxGGGGxBBBBx */
246		AM_RANGE(0xd00000, 0xd01fff) AM_WRITE(SMH_RAM) AM_BASE(&splash_spriteram)               /* Sprite RAM */
247		AM_RANGE(0xff0000, 0xffffff) AM_WRITE(SMH_RAM)                              /* Work RAM */
248		ADDRESS_MAP_END
249	208
250	209	static INPUT_PORTS_START( splash )
251	210	PORT_START("DSW1")
r4679	r4680
436	395
437	396	/* basic machine hardware */
438	397	MDRV_CPU_ADD("maincpu", M68000,24000000/2)         /* 12 MHz (24/2) */
439		MDRV_CPU_PROGRAM_MAP(splash_readmem,splash_writemem)
	398	MDRV_CPU_PROGRAM_MAP(splash_map,0)
440	399	MDRV_CPU_VBLANK_INT("screen", irq6_line_hold)
441	400
442	401	MDRV_CPU_ADD("audiocpu", Z80,30000000/8)
443		MDRV_CPU_PROGRAM_MAP(splash_readmem_sound,splash_writemem_sound)
444		MDRV_CPU_VBLANK_INT_HACK(nmi_line_pulse,64)   /* needed for the msm5205 to play the samples */
	402	MDRV_CPU_PROGRAM_MAP(splash_sound_map,0)
	403	MDRV_CPU_PERIODIC_INT(nmi_line_pulse,60*64)   /* needed for the msm5205 to play the samples */
445	404
446	405	/* video hardware */
447	406	MDRV_SCREEN_ADD("screen", RASTER)
r4679	r4680
449	408	MDRV_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(2500) /* not accurate */)
450	409	MDRV_SCREEN_FORMAT(BITMAP_FORMAT_INDEXED16)
451	410	MDRV_SCREEN_SIZE(64*8, 64*8)
452		MDRV_SCREEN_VISIBLE_AREA(2*8, 49*8-1, 2*8, 32*8-1)
	411	MDRV_SCREEN_VISIBLE_AREA(2*8, 48*8-1, 2*8, 32*8-1)
453	412
454	413	MDRV_GFXDECODE(splash)
455	414	MDRV_PALETTE_LENGTH(2048)
r4679	r4680
489	448
490	449	/* basic machine hardware */
491	450	MDRV_CPU_ADD("maincpu", M68000,24000000/2)         /* 12 MHz - verified */
492		MDRV_CPU_PROGRAM_MAP(roldfrog_readmem,roldfrog_writemem)
	451	MDRV_CPU_PROGRAM_MAP(roldfrog_map,0)
493	452	MDRV_CPU_VBLANK_INT("screen", irq6_line_hold)
494	453
495	454	MDRV_CPU_ADD("audiocpu", Z80,3000000)         /* 3 MHz - verified */
496		MDRV_CPU_PROGRAM_MAP(roldf_sound_map,0)
497		MDRV_CPU_IO_MAP(roldf_sound_io_map,0)
498		//  MDRV_CPU_VBLANK_INT_HACK(nmi_line_pulse,64)  /* needed for the msm5205 to play the samples */
	455	MDRV_CPU_PROGRAM_MAP(roldfrog_sound_map,0)
	456	MDRV_CPU_IO_MAP(roldfrog_sound_io_map,0)
	457	//  MDRV_CPU_PERIODIC_INT(nmi_line_pulse,60*64)  /* needed for the msm5205 to play the samples */
499	458
500	459	/* video hardware */
501	460	MDRV_SCREEN_ADD("screen", RASTER)
r4679	r4680
503	462	MDRV_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(2500) /* not accurate */)
504	463	MDRV_SCREEN_FORMAT(BITMAP_FORMAT_INDEXED16)
505	464	MDRV_SCREEN_SIZE(64*8, 64*8)
506		MDRV_SCREEN_VISIBLE_AREA(2*8, 49*8-1, 2*8, 32*8-1)
	465	MDRV_SCREEN_VISIBLE_AREA(2*8, 48*8-1, 2*8, 32*8-1)
507	466	//  MDRV_SCREEN_VISIBLE_AREA(0*8, 64*8-1, 0*8, 64*8-1)
508	467
509	468	MDRV_GFXDECODE(splash)
r4679	r4680
529	488
530	489	/* basic machine hardware */
531	490	MDRV_CPU_ADD("maincpu", M68000,24000000/2)         /* 12 MHz (24/2) */
532		MDRV_CPU_PROGRAM_MAP(funystrp_readmem,funystrp_writemem)
	491	MDRV_CPU_PROGRAM_MAP(funystrp_map,0)
533	492	MDRV_CPU_VBLANK_INT("screen", irq6_line_hold)
534	493
535	494	//  MDRV_CPU_ADD("audiocpu", Z80,30000000/8)
536		//  MDRV_CPU_PROGRAM_MAP(splash_readmem_sound,splash_writemem_sound)
537		//  MDRV_CPU_VBLANK_INT_HACK(nmi_line_pulse,64)  /* needed for the msm5205 to play the samples */
	495	//  MDRV_CPU_PROGRAM_MAP(funystrp_sound_map,0)
	496	//  MDRV_CPU_PERIODIC_INT(nmi_line_pulse,60*64)  /* needed for the msm5205 to play the samples */
538	497
539	498	/* video hardware */
540	499	MDRV_SCREEN_ADD("screen", RASTER)
r4679	r4680
542	501	MDRV_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(2500) /* not accurate */)
543	502	MDRV_SCREEN_FORMAT(BITMAP_FORMAT_INDEXED16)
544	503	MDRV_SCREEN_SIZE(64*8, 64*8)
545		MDRV_SCREEN_VISIBLE_AREA(0*8, 47*8-1, 2*8, 32*8-1)
	504	MDRV_SCREEN_VISIBLE_AREA(0*8, 48*8-1, 2*8, 32*8-1)
546	505
547	506	MDRV_GFXDECODE(splash)
548	507	MDRV_PALETTE_LENGTH(2048)
r4679	r4680
858	817	ROM_LOAD16_BYTE( "12.u87",  0x000000, 0x010000, CRC(4ac173f3) SHA1(c211bc8528d26d5a96fce4b0ebfddf2aa6a257ef) )
859	818	ROM_LOAD16_BYTE( "13.u111", 0x000001, 0x010000, CRC(1358c60c) SHA1(7142aa6f94cfdfb1b70b37742201b2c213f85137) )
860	819
861		ROM_REGION( 0x080000, "cpu1", 0 )   /* Z80 code + sound data */
	820	ROM_REGION( 0x080000, "audiocpu", 0 )   /* Z80 code + sound data */
862	821	ROM_LOAD( "11.u130", 0x000000, 0x040000, CRC(e969ea2b) SHA1(54d5bb59e9909a6b7e66764f91e2f98f8f8832c5) )
863	822	ROM_LOAD( "10.u118", 0x040000, 0x040000, CRC(0894b936) SHA1(cd01eb86e403e20c56492185ecd9bb0f4f27867a) )
864	823

src/mame/drivers/jalmah.c

r4679	r4680
27	27	-kakumei/kakumei2:has weird text layer strings in test mode (like "#p control panel"),
28	28	unsure if this one is somehow related to the above daireika bug, it's a BTANB or something else.
29	29	-Check if urashima has a "mode 3" for the layer 0 tilemap;
30		-Complete the dip-switches for all the games;
31	30	-There could be timing issues caused by MCU simulation at $80004;
32	31	-Fix the sound banking, protection-related for the first version of the MCU
33	32	(should be somewhere on the work ram/shared ram)
r4679	r4680
40	39	-$f000e is bogus,maybe the program snippets can modify this value,or the MCU itself can
41	40	do that,returning the contents of D0 register seems enough for now...
42	41	Update: Improved it for the new mcu simulation,now it pulls all the values from 0x00 to
43		0x0f,it seems to be a MCU call snippet for the $f0000 work ram;
	42	0x0f, it seems to be a MCU call snippet for the $f0000 work ram;
44	43	-$f030e is a mirror for $f000e in urashima.
45	44	-I need more space for MCU code...that's why I've used an extra jmp when entering
46	45	into mcu code,so we can debug the first version freely without being teased about
47	46	memory space.
48	47	BTW,the real HW is using a sort of bankswitch or I'm missing something?
49		-$f0020 is for the sound program,same for all games,for example mjzoomin hasn't any clear
	48	-$f0020 is for the sound program,same for all games, for example mjzoomin hasn't any clear
50	49	write to $80040 area and the program jumps to $f0020 when there should be a sample.
51	50
52	51	============================================================================================
r4679	r4680
231	230	sc3_tilemap_2 = tilemap_create(machine, get_sc3_tile_info,range2_8x8,8,8,128,64);
232	231	sc3_tilemap_3 = tilemap_create(machine, get_sc3_tile_info,range3_8x8,8,8,64,128);
233	232
234		jm_scrollram = auto_malloc(0x80);
235		jm_vregs = auto_malloc(0x40);
	233	jm_scrollram = auto_alloc_array(machine, UINT16, 0x80/2);
	234	jm_vregs = auto_alloc_array(machine, UINT16, 0x40/2);
236	235
237	236	tilemap_set_transparent_pen(sc0_tilemap_0,15);
238	237	tilemap_set_transparent_pen(sc0_tilemap_1,15);
r4679	r4680
259	258	sc0_tilemap_0 = tilemap_create(machine, get_sc0_tile_info,range0_16x16,16,16,256,32);
260	259	sc3_tilemap_0 = tilemap_create(machine, get_sc3_tile_info,range2_8x8,8,8,128,64);
261	260
262		jm_scrollram = auto_malloc(0x80);
263		jm_vregs = auto_malloc(0x40);
	261	jm_scrollram = auto_alloc_array(machine, UINT16, 0x80/2);
	262	jm_vregs = auto_alloc_array(machine, UINT16, 0x40/2);
264	263
265	264	tilemap_set_transparent_pen(sc0_tilemap_0,15);
266	265	tilemap_set_transparent_pen(sc3_tilemap_0,15);
r4679	r4680
626	625	if(data & 4)
627	626	{
628	627	UINT32 i;
629		for(i=0;i<0x200;i+=2)
630		memory_write_word(space,0x88200+i,memory_read_word(space,0x88400+i));
	628	for(i = 0; i < 0x200; i += 2)
	629	memory_write_word(space, 0x88200 + i, memory_read_word(space, 0x88400 + i));
631	630	}
632	631	}
633	632
634	633	/*same as $f00c0 sub-routine,but with additional work-around,to remove from here...*/
635		static void daireika_palette_dma(running_machine *machine,UINT16 val)
	634	static void daireika_palette_dma(running_machine *machine, UINT16 val)
636	635	{
637		const address_space *space = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM);
638		UINT32 index_1,index_2,src_addr,tmp_addr;
	636	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	637	UINT32 index_1, index_2, src_addr, tmp_addr;
639	638	/*a0=301c0+jm_shared_ram[0x540/2] & 0xf00 */
640	639	/*a1=88000*/
641	640	src_addr = 0x301c0 + (val * 0x40);
642	641	//  popmessage("%08x",src_addr);
643		for(index_1=0;index_1<0x200;index_1+=0x20)
	642	for(index_1 = 0; index_1 < 0x200; index_1 += 0x20)
644	643	{
645	644	tmp_addr = src_addr;
646	645	src_addr = memory_read_dword(space,src_addr);
647	646
648		for(index_2=0;index_2<0x20;index_2+=2)
649		memory_write_word(space,0x88000+index_2+index_1,memory_read_word(space,src_addr+index_2));
	647	for(index_2 = 0; index_2 < 0x20; index_2 += 2)
	648	memory_write_word(space, 0x88000 + index_2 + index_1, memory_read_word(space, src_addr + index_2));
650	649
651	650	src_addr = tmp_addr + 4;
652	651	}
r4679	r4680
655	654	/*RAM-based protection handlings*/
656	655	static void daireika_mcu_run(running_machine *machine)
657	656	{
658		static UINT16 prg_prot,dma_old;
	657	static UINT16 prg_prot, dma_old;
659	658
660	659	if(((jm_shared_ram[0x550/2] & 0xf00) == 0x700) && ((jm_shared_ram[0x540/2] & 0xf00) != dma_old))
661	660	{
r4679	r4680
922	921	AM_RANGE(0x080010, 0x080011) AM_WRITE(jalmah_flip_screen_w)
923	922	//       0x080012, 0x080013  MCU write related,same for each game
924	923	//       0x080014, 0x080015  MCU write related,same for each game
925		/**/AM_RANGE(0x080016, 0x080017) AM_READ(SMH_RAM) AM_WRITE(urashima_dma_w)
	924	/**/AM_RANGE(0x080016, 0x080017) AM_RAM_WRITE(urashima_dma_w)
926	925	AM_RANGE(0x080018, 0x080019) AM_WRITE(jalmah_okibank_w)
927	926	AM_RANGE(0x08001a, 0x08001b) AM_WRITE(jalmah_okirom_w)
928		/**/AM_RANGE(0x08001c, 0x08001d) AM_READ(SMH_RAM) AM_WRITE(urashima_bank_w)
	927	/**/AM_RANGE(0x08001c, 0x08001d) AM_RAM_WRITE(urashima_bank_w)
929	928	AM_RANGE(0x080040, 0x080041) AM_DEVREADWRITE8("oki", okim6295_r, okim6295_w, 0x00ff)
930	929	//       0x084000, 0x084001  ?
931	930	AM_RANGE(0x088000, 0x0887ff) AM_RAM_WRITE(paletteram16_RRRRGGGGBBBBRGBx_word_w) AM_BASE(&paletteram16) /* Palette RAM */
r4679	r4680
2301	2300
2302	2301	static DRIVER_INIT( urashima )
2303	2302	{
2304		memory_install_read16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x80004, 0x80005, 0, 0, urashima_mcu_r );
2305		memory_install_write16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x80012, 0x80013, 0, 0, urashima_mcu_w );
	2303	memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x80004, 0x80005, 0, 0, urashima_mcu_r );
	2304	memory_install_write16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x80012, 0x80013, 0, 0, urashima_mcu_w );
2306	2305
2307	2306	mcu_prg = 0x12;
2308	2307	}
2309	2308
2310	2309	static DRIVER_INIT( daireika )
2311	2310	{
2312		memory_install_read16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x80004, 0x80005, 0, 0, daireika_mcu_r );
2313		memory_install_write16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x80012, 0x80013, 0, 0, daireika_mcu_w );
	2311	memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x80004, 0x80005, 0, 0, daireika_mcu_r );
	2312	memory_install_write16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x80012, 0x80013, 0, 0, daireika_mcu_w );
2314	2313
2315	2314	mcu_prg = 0x11;
2316	2315	}
2317	2316
2318	2317	static DRIVER_INIT( mjzoomin )
2319	2318	{
2320		memory_install_read16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x80004, 0x80005, 0, 0, mjzoomin_mcu_r );
2321		memory_install_write16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x80012, 0x80013, 0, 0, mjzoomin_mcu_w );
	2319	memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x80004, 0x80005, 0, 0, mjzoomin_mcu_r );
	2320	memory_install_write16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x80012, 0x80013, 0, 0, mjzoomin_mcu_w );
2322	2321
2323	2322	mcu_prg = 0x13;
2324	2323	}
2325	2324
2326	2325	static DRIVER_INIT( kakumei )
2327	2326	{
2328		memory_install_read16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x80004, 0x80005, 0, 0, kakumei_mcu_r );
	2327	memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x80004, 0x80005, 0, 0, kakumei_mcu_r );
2329	2328
2330	2329	mcu_prg = 0x21;
2331	2330	}
2332	2331
2333	2332	static DRIVER_INIT( kakumei2 )
2334	2333	{
2335		memory_install_read16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x80004, 0x80005, 0, 0, kakumei_mcu_r );
	2334	memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x80004, 0x80005, 0, 0, kakumei_mcu_r );
2336	2335
2337	2336	mcu_prg = 0x22;
2338	2337	}
2339	2338
2340	2339	static DRIVER_INIT( suchipi )
2341	2340	{
2342		memory_install_read16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x80004, 0x80005, 0, 0, suchipi_mcu_r );
	2341	memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x80004, 0x80005, 0, 0, suchipi_mcu_r );
	2342
2343	2343	mcu_prg = 0x23;
2344	2344	}
2345	2345
2346	2346	/*First version of the MCU*/
2347		GAME( 1989, urashima, 0, urashima,  urashima,   urashima, ROT0, "UPL",          "Otogizoushi Urashima Mahjong",         GAME_IMPERFECT_GRAPHICS | GAME_IMPERFECT_SOUND )
2348		GAME( 1989, daireika, 0, jalmah,    daireika,   daireika, ROT0, "Jaleco / NMK", "Mahjong Daireikai",                    GAME_IMPERFECT_GRAPHICS | GAME_IMPERFECT_SOUND )
2349		GAME( 1990, mjzoomin, 0, jalmah,    mjzoomin,   mjzoomin, ROT0, "Jaleco",       "Mahjong Channel Zoom In",              GAME_IMPERFECT_GRAPHICS | GAME_IMPERFECT_SOUND )
	2347	GAME( 1989, urashima, 0, urashima,  urashima,   urashima, ROT0, "UPL",          "Otogizoushi Urashima Mahjong (Japan)",         GAME_IMPERFECT_GRAPHICS | GAME_IMPERFECT_SOUND )
	2348	GAME( 1989, daireika, 0, jalmah,    daireika,   daireika, ROT0, "Jaleco / NMK", "Mahjong Daireikai (Japan)",                    GAME_IMPERFECT_GRAPHICS | GAME_IMPERFECT_SOUND )
	2349	GAME( 1990, mjzoomin, 0, jalmah,    mjzoomin,   mjzoomin, ROT0, "Jaleco",       "Mahjong Channel Zoom In (Japan)",              GAME_IMPERFECT_GRAPHICS | GAME_IMPERFECT_SOUND )
2350	2350	/*Second version of the MCU*/
2351		GAME( 1990, kakumei,  0, jalmah,    kakumei,    kakumei,  ROT0, "Jaleco",       "Mahjong Kakumei",                      GAME_IMPERFECT_GRAPHICS )
2352		GAME( 1992, kakumei2, 0, jalmah,    kakumei2,   kakumei2, ROT0, "Jaleco",       "Mahjong Kakumei 2 - Princess League",  GAME_IMPERFECT_GRAPHICS )
2353		GAME( 1993, suchipi,  0, jalmah,    suchipi,    suchipi,  ROT0, "Jaleco",       "Idol Janshi Suchie-Pai Special",       GAME_IMPERFECT_GRAPHICS )
	2351	GAME( 1990, kakumei,  0, jalmah,    kakumei,    kakumei,  ROT0, "Jaleco",       "Mahjong Kakumei (Japan)",                      GAME_IMPERFECT_GRAPHICS )
	2352	GAME( 1992, kakumei2, 0, jalmah,    kakumei2,   kakumei2, ROT0, "Jaleco",       "Mahjong Kakumei 2 - Princess League (Japan)",  GAME_IMPERFECT_GRAPHICS )
	2353	GAME( 1993, suchipi,  0, jalmah,    suchipi,    suchipi,  ROT0, "Jaleco",       "Idol Janshi Suchie-Pai Special (Japan)",       GAME_IMPERFECT_GRAPHICS )

src/mame/drivers/f1gp.c

r4679	r4680
73	73	if (ACCESSING_BITS_0_7)
74	74	{
75	75	pending_command = 1;
76		soundlatch_w(space,offset,data & 0xff);
77		cpu_set_input_line(space->machine->cpu[2], INPUT_LINE_NMI, PULSE_LINE);
	76	soundlatch_w(space, offset, data & 0xff);
	77	cputag_set_input_line(space->machine, "audiocpu", INPUT_LINE_NMI, PULSE_LINE);
78	78	}
79	79	}
80	80
r4679	r4680
90	90
91	91
92	92
93		static ADDRESS_MAP_START( f1gp_readmem1, ADDRESS_SPACE_PROGRAM, 16 )
94		AM_RANGE(0x000000, 0x03ffff) AM_READ(SMH_ROM)
	93	static ADDRESS_MAP_START( f1gp_cpu1_map, ADDRESS_SPACE_PROGRAM, 16 )
	94	AM_RANGE(0x000000, 0x03ffff) AM_ROM
95	95	AM_RANGE(0x100000, 0x2fffff) AM_READ(extrarom_r)
96	96	AM_RANGE(0xa00000, 0xbfffff) AM_READ(extrarom2_r)
97		AM_RANGE(0xc00000, 0xc3ffff) AM_READ(f1gp_zoomdata_r)
98		AM_RANGE(0xd00000, 0xd01fff) AM_READ(f1gp_rozvideoram_r)
99		AM_RANGE(0xd02000, 0xd03fff) AM_READ(f1gp_rozvideoram_r)   /* mirror */
100		AM_RANGE(0xd04000, 0xd05fff) AM_READ(f1gp_rozvideoram_r)   /* mirror */
101		AM_RANGE(0xd06000, 0xd07fff) AM_READ(f1gp_rozvideoram_r)   /* mirror */
102		AM_RANGE(0xe00000, 0xe03fff) AM_READ(SMH_RAM)
103		AM_RANGE(0xe04000, 0xe07fff) AM_READ(SMH_RAM)
104		AM_RANGE(0xf00000, 0xf003ff) AM_READ(SMH_RAM)
105		AM_RANGE(0xf10000, 0xf103ff) AM_READ(SMH_RAM)
106		AM_RANGE(0xff8000, 0xffbfff) AM_READ(SMH_RAM)
107		AM_RANGE(0xffc000, 0xffcfff) AM_READ(sharedram_r)
108		AM_RANGE(0xffd000, 0xffdfff) AM_READ(SMH_RAM)
109		AM_RANGE(0xffe000, 0xffefff) AM_READ(SMH_RAM)
	97	AM_RANGE(0xc00000, 0xc3ffff) AM_READWRITE(f1gp_zoomdata_r, f1gp_zoomdata_w)
	98	AM_RANGE(0xd00000, 0xd01fff) AM_READWRITE(f1gp_rozvideoram_r, f1gp_rozvideoram_w) AM_BASE(&f1gp_rozvideoram)
	99	AM_RANGE(0xd02000, 0xd03fff) AM_READWRITE(f1gp_rozvideoram_r, f1gp_rozvideoram_w) AM_BASE(&f1gp_rozvideoram) /* mirror */
	100	AM_RANGE(0xd04000, 0xd05fff) AM_READWRITE(f1gp_rozvideoram_r, f1gp_rozvideoram_w) AM_BASE(&f1gp_rozvideoram) /* mirror */
	101	AM_RANGE(0xd06000, 0xd07fff) AM_READWRITE(f1gp_rozvideoram_r, f1gp_rozvideoram_w) AM_BASE(&f1gp_rozvideoram) /* mirror */
	102	AM_RANGE(0xe00000, 0xe03fff) AM_RAM AM_BASE(&f1gp_spr1cgram) AM_SIZE(&f1gp_spr1cgram_size)            // SPR-1 CG RAM
	103	AM_RANGE(0xe04000, 0xe07fff) AM_RAM AM_BASE(&f1gp_spr2cgram) AM_SIZE(&f1gp_spr2cgram_size)            // SPR-2 CG RAM
	104	AM_RANGE(0xf00000, 0xf003ff) AM_RAM AM_BASE(&f1gp_spr1vram)                                    // SPR-1 VRAM
	105	AM_RANGE(0xf10000, 0xf103ff) AM_RAM AM_BASE(&f1gp_spr2vram)                                    // SPR-2 VRAM
	106	AM_RANGE(0xff8000, 0xffbfff) AM_RAM                                                      // WORK RAM-1
	107	AM_RANGE(0xffc000, 0xffcfff) AM_READWRITE(sharedram_r, sharedram_w) AM_BASE(&sharedram)               // DUAL RAM
	108	AM_RANGE(0xffd000, 0xffdfff) AM_RAM_WRITE(f1gp_fgvideoram_w) AM_BASE(&f1gp_fgvideoram)               // CHARACTER
	109	AM_RANGE(0xffe000, 0xffefff) AM_RAM_WRITE(paletteram16_xRRRRRGGGGGBBBBB_word_w) AM_BASE(&paletteram16)   // PALETTE
110	110	AM_RANGE(0xfff000, 0xfff001) AM_READ_PORT("INPUTS")
	111	AM_RANGE(0xfff000, 0xfff001) AM_WRITE(f1gp_gfxctrl_w)
111	112	//  AM_RANGE(0xfff002, 0xfff003)    analog wheel?
112	113	AM_RANGE(0xfff004, 0xfff005) AM_READ_PORT("DSW1")
	114	AM_RANGE(0xfff002, 0xfff005) AM_WRITE(f1gp_fgscroll_w)
113	115	AM_RANGE(0xfff006, 0xfff007) AM_READ_PORT("DSW2")
114	116	AM_RANGE(0xfff008, 0xfff009) AM_READ(command_pending_r)
115		AM_RANGE(0xfff050, 0xfff051) AM_READ_PORT("DSW3")
116		ADDRESS_MAP_END
117
118		static ADDRESS_MAP_START( f1gp_writemem1, ADDRESS_SPACE_PROGRAM, 16 )
119		AM_RANGE(0x000000, 0x03ffff) AM_WRITE(SMH_ROM)
120		AM_RANGE(0xc00000, 0xc3ffff) AM_WRITE(f1gp_zoomdata_w)
121		AM_RANGE(0xd00000, 0xd01fff) AM_WRITE(f1gp_rozvideoram_w) AM_BASE(&f1gp_rozvideoram)               // BACK VRAM
122		AM_RANGE(0xd02000, 0xd03fff) AM_WRITE(f1gp_rozvideoram_w)   /* mirror */
123		AM_RANGE(0xd04000, 0xd05fff) AM_WRITE(f1gp_rozvideoram_w)   /* mirror */
124		AM_RANGE(0xd06000, 0xd07fff) AM_WRITE(f1gp_rozvideoram_w)   /* mirror */
125		AM_RANGE(0xe00000, 0xe03fff) AM_WRITE(SMH_RAM) AM_BASE(&f1gp_spr1cgram) AM_SIZE(&f1gp_spr1cgram_size)      // SPR-1 CG RAM
126		AM_RANGE(0xe04000, 0xe07fff) AM_WRITE(SMH_RAM) AM_BASE(&f1gp_spr2cgram) AM_SIZE(&f1gp_spr2cgram_size)      // SPR-2 CG RAM
127		AM_RANGE(0xf00000, 0xf003ff) AM_WRITE(SMH_RAM) AM_BASE(&f1gp_spr1vram)                        // SPR-1 VRAM
128		AM_RANGE(0xf10000, 0xf103ff) AM_WRITE(SMH_RAM) AM_BASE(&f1gp_spr2vram)                        // SPR-2 VRAM
129		AM_RANGE(0xff8000, 0xffbfff) AM_WRITE(SMH_RAM)                                    // WORK RAM-1
130		AM_RANGE(0xffc000, 0xffcfff) AM_WRITE(sharedram_w) AM_BASE(&sharedram)                        // DUAL RAM
131		AM_RANGE(0xffd000, 0xffdfff) AM_WRITE(f1gp_fgvideoram_w) AM_BASE(&f1gp_fgvideoram)               // CHARACTER
132		AM_RANGE(0xffe000, 0xffefff) AM_WRITE(paletteram16_xRRRRRGGGGGBBBBB_word_w) AM_BASE(&paletteram16)   // PALETTE
133		AM_RANGE(0xfff000, 0xfff001) AM_WRITE(f1gp_gfxctrl_w)
134		AM_RANGE(0xfff002, 0xfff005) AM_WRITE(f1gp_fgscroll_w)
135	117	AM_RANGE(0xfff008, 0xfff009) AM_WRITE(sound_command_w)
136	118	AM_RANGE(0xfff040, 0xfff05f) AM_WRITE(SMH_RAM) AM_BASE(&K053936_0_ctrl)
	119	AM_RANGE(0xfff050, 0xfff051) AM_READ_PORT("DSW3")
137	120	ADDRESS_MAP_END
138	121
139		static ADDRESS_MAP_START( f1gp2_readmem1, ADDRESS_SPACE_PROGRAM, 16 )
140		AM_RANGE(0x000000, 0x03ffff) AM_READ(SMH_ROM)
	122	static ADDRESS_MAP_START( f1gp2_cpu1_map, ADDRESS_SPACE_PROGRAM, 16 )
	123	AM_RANGE(0x000000, 0x03ffff) AM_ROM
141	124	AM_RANGE(0x100000, 0x2fffff) AM_READ(extrarom_r)
142		AM_RANGE(0xa00000, 0xa07fff) AM_READ(SMH_RAM)
143		AM_RANGE(0xd00000, 0xd01fff) AM_READ(f1gp_rozvideoram_r)
144		AM_RANGE(0xe00000, 0xe00fff) AM_READ(SMH_RAM)
145		AM_RANGE(0xff8000, 0xffbfff) AM_READ(SMH_RAM)
146		AM_RANGE(0xffc000, 0xffcfff) AM_READ(sharedram_r)
147		AM_RANGE(0xffd000, 0xffdfff) AM_READ(SMH_RAM)
148		AM_RANGE(0xffe000, 0xffefff) AM_READ(SMH_RAM)
149		AM_RANGE(0xfff000, 0xfff001) AM_READ_PORT("INPUTS")
	125	AM_RANGE(0xa00000, 0xa07fff) AM_RAM AM_BASE(&f1gp2_sprcgram)                                       // SPR-1 CG RAM + SPR-2 CG RAM
	126	AM_RANGE(0xd00000, 0xd01fff) AM_READWRITE(f1gp_rozvideoram_r, f1gp_rozvideoram_w) AM_BASE(&f1gp_rozvideoram)   // BACK VRAM
	127	AM_RANGE(0xe00000, 0xe00fff) AM_RAM AM_BASE(&f1gp2_spritelist)                                       // not checked + SPR-1 VRAM + SPR-2 VRAM
	128	AM_RANGE(0xff8000, 0xffbfff) AM_RAM                                                            // WORK RAM-1
	129	AM_RANGE(0xffc000, 0xffcfff) AM_READWRITE(sharedram_r, sharedram_w) AM_BASE(&sharedram)                     // DUAL RAM
	130	AM_RANGE(0xffd000, 0xffdfff) AM_RAM_WRITE(f1gp_fgvideoram_w) AM_BASE(&f1gp_fgvideoram)                     // CHARACTER
	131	AM_RANGE(0xffe000, 0xffefff) AM_RAM_WRITE(paletteram16_xRRRRRGGGGGBBBBB_word_w) AM_BASE(&paletteram16)         // PALETTE
	132	AM_RANGE(0xfff000, 0xfff001) AM_READ_PORT("INPUTS") AM_WRITE(f1gp2_gfxctrl_w)
150	133	//  AM_RANGE(0xfff002, 0xfff003)    analog wheel?
151	134	AM_RANGE(0xfff004, 0xfff005) AM_READ_PORT("DSW1")
152	135	AM_RANGE(0xfff006, 0xfff007) AM_READ_PORT("DSW2")
153		AM_RANGE(0xfff008, 0xfff009) AM_READ(command_pending_r)
	136	AM_RANGE(0xfff008, 0xfff009) AM_READWRITE(command_pending_r, sound_command_w)
154	137	AM_RANGE(0xfff00a, 0xfff00b) AM_READ_PORT("DSW3")
155		ADDRESS_MAP_END
156
157		static ADDRESS_MAP_START( f1gp2_writemem1, ADDRESS_SPACE_PROGRAM, 16 )
158		AM_RANGE(0x000000, 0x03ffff) AM_WRITE(SMH_ROM)
159		AM_RANGE(0xa00000, 0xa07fff) AM_WRITE(SMH_RAM) AM_BASE(&f1gp2_sprcgram)                        // SPR-1 CG RAM + SPR-2 CG RAM
160		AM_RANGE(0xd00000, 0xd01fff) AM_WRITE(f1gp_rozvideoram_w) AM_BASE(&f1gp_rozvideoram)               // BACK VRAM
161		AM_RANGE(0xe00000, 0xe00fff) AM_WRITE(SMH_RAM) AM_BASE(&f1gp2_spritelist)                     // not checked + SPR-1 VRAM + SPR-2 VRAM
162		AM_RANGE(0xff8000, 0xffbfff) AM_WRITE(SMH_RAM)                                    // WORK RAM-1
163		AM_RANGE(0xffc000, 0xffcfff) AM_WRITE(sharedram_w) AM_BASE(&sharedram)                        // DUAL RAM
164		AM_RANGE(0xffd000, 0xffdfff) AM_WRITE(f1gp_fgvideoram_w) AM_BASE(&f1gp_fgvideoram)               // CHARACTER
165		AM_RANGE(0xffe000, 0xffefff) AM_WRITE(paletteram16_xRRRRRGGGGGBBBBB_word_w) AM_BASE(&paletteram16)   // PALETTE
166		AM_RANGE(0xfff000, 0xfff001) AM_WRITE(f1gp2_gfxctrl_w)
167		AM_RANGE(0xfff008, 0xfff009) AM_WRITE(sound_command_w)
168	138	AM_RANGE(0xfff020, 0xfff02f) AM_WRITE(SMH_RAM) AM_BASE(&K053936_0_ctrl)
169	139	AM_RANGE(0xfff044, 0xfff047) AM_WRITE(f1gp_fgscroll_w)
170	140	ADDRESS_MAP_END
171	141
172		static ADDRESS_MAP_START( readmem2, ADDRESS_SPACE_PROGRAM, 16 )
173		AM_RANGE(0x000000, 0x01ffff) AM_READ(SMH_ROM)
174		AM_RANGE(0xff8000, 0xffbfff) AM_READ(SMH_RAM)
175		AM_RANGE(0xffc000, 0xffcfff) AM_READ(sharedram_r)
	142	static ADDRESS_MAP_START( f1gp_cpu2_map, ADDRESS_SPACE_PROGRAM, 16 )
	143	AM_RANGE(0x000000, 0x01ffff) AM_ROM
	144	AM_RANGE(0xff8000, 0xffbfff) AM_RAM
	145	AM_RANGE(0xffc000, 0xffcfff) AM_READWRITE(sharedram_r, sharedram_w)
176	146	ADDRESS_MAP_END
177	147
178		static ADDRESS_MAP_START( writemem2, ADDRESS_SPACE_PROGRAM, 16 )
179		AM_RANGE(0x000000, 0x01ffff) AM_WRITE(SMH_ROM)
180		AM_RANGE(0xff8000, 0xffbfff) AM_WRITE(SMH_RAM)
181		AM_RANGE(0xffc000, 0xffcfff) AM_WRITE(sharedram_w)
	148	static ADDRESS_MAP_START( sound_map, ADDRESS_SPACE_PROGRAM, 8 )
	149	AM_RANGE(0x0000, 0x77ff) AM_ROM
	150	AM_RANGE(0x7800, 0x7fff) AM_RAM
	151	AM_RANGE(0x8000, 0xffff) AM_ROMBANK(1)
182	152	ADDRESS_MAP_END
183	153
184		static ADDRESS_MAP_START( sound_readmem, ADDRESS_SPACE_PROGRAM, 8 )
185		AM_RANGE(0x0000, 0x77ff) AM_READ(SMH_ROM)
186		AM_RANGE(0x7800, 0x7fff) AM_READ(SMH_RAM)
187		AM_RANGE(0x8000, 0xffff) AM_READ(SMH_BANK1)
188		ADDRESS_MAP_END
189
190		static ADDRESS_MAP_START( sound_writemem, ADDRESS_SPACE_PROGRAM, 8 )
191		AM_RANGE(0x0000, 0x77ff) AM_WRITE(SMH_ROM)
192		AM_RANGE(0x7800, 0x7fff) AM_WRITE(SMH_RAM)
193		AM_RANGE(0x8000, 0xffff) AM_WRITE(SMH_ROM)
194		ADDRESS_MAP_END
195
196	154	static ADDRESS_MAP_START( sound_io_map, ADDRESS_SPACE_IO, 8 )
197	155	ADDRESS_MAP_GLOBAL_MASK(0xff)
198	156	AM_RANGE(0x00, 0x00) AM_WRITE(f1gp_sh_bankswitch_w)   // f1gp
r4679	r4680
457	415
458	416	static void irqhandler(const device_config *device, int irq)
459	417	{
460		cpu_set_input_line(device->machine->cpu[2],0,irq ? ASSERT_LINE : CLEAR_LINE);
	418	cputag_set_input_line(device->machine, "audiocpu", 0, irq ? ASSERT_LINE : CLEAR_LINE);
461	419	}
462	420
463	421	static const ym2610_interface ym2610_config =
r4679	r4680
471	429
472	430	/* basic machine hardware */
473	431	MDRV_CPU_ADD("maincpu",M68000,XTAL_20MHz/2)   /* verified on pcb */
474		MDRV_CPU_PROGRAM_MAP(f1gp_readmem1,f1gp_writemem1)
	432	MDRV_CPU_PROGRAM_MAP(f1gp_cpu1_map,0)
475	433	MDRV_CPU_VBLANK_INT("screen", irq1_line_hold)
476	434
477	435	MDRV_CPU_ADD("sub", M68000,XTAL_20MHz/2)   /* verified on pcb */
478		MDRV_CPU_PROGRAM_MAP(readmem2,writemem2)
	436	MDRV_CPU_PROGRAM_MAP(f1gp_cpu2_map,0)
479	437	MDRV_CPU_VBLANK_INT("screen", irq1_line_hold)
480	438
481	439	MDRV_CPU_ADD("audiocpu", Z80,XTAL_20MHz/4)   /* verified on pcb */
482		MDRV_CPU_PROGRAM_MAP(sound_readmem,sound_writemem)
	440	MDRV_CPU_PROGRAM_MAP(sound_map,0)
483	441	MDRV_CPU_IO_MAP(sound_io_map,0)
484	442
485	443	MDRV_QUANTUM_TIME(HZ(6000)) /* 100 CPU slices per frame */
r4679	r4680
551	509	/* basic machine hardware */
552	510	MDRV_IMPORT_FROM(f1gp)
553	511	MDRV_CPU_MODIFY("maincpu")
554		MDRV_CPU_PROGRAM_MAP(f1gp2_readmem1,f1gp2_writemem1)
	512	MDRV_CPU_PROGRAM_MAP(f1gp2_cpu1_map,0)
555	513
556	514	/* video hardware */
557	515	MDRV_GFXDECODE(f1gp2)

src/mame/drivers/namcos2.c

r4679	r4680
575	575	*/
576	576
577	577	#define NAMCOS2_68K_DEFAULT_CPU_BOARD_AM \
578		AM_RANGE(0x200000, 0x3fffff) AM_READ(namcos2_68k_data_rom_r)\
579		AM_RANGE(0x400000, 0x41ffff) AM_READ(namco_tilemapvideoram16_r) AM_WRITE(namco_tilemapvideoram16_w) \
580		AM_RANGE(0x420000, 0x42003f) AM_READ(namco_tilemapcontrol16_r) AM_WRITE(namco_tilemapcontrol16_w) \
581		AM_RANGE(0x440000, 0x44ffff) AM_READ(namcos2_68k_video_palette_r) AM_WRITE(namcos2_68k_video_palette_w) AM_BASE(&namcos2_68k_palette_ram) AM_SIZE(&namcos2_68k_palette_size) \
582		AM_RANGE(0x460000, 0x460fff) AM_READ(namcos2_68k_dpram_word_r) AM_WRITE(namcos2_68k_dpram_word_w) \
583		AM_RANGE(0x468000, 0x468fff) AM_READ(namcos2_68k_dpram_word_r) AM_WRITE(namcos2_68k_dpram_word_w) /* mirror */ \
584		AM_RANGE(0x480000, 0x483fff) AM_READ(namcos2_68k_serial_comms_ram_r) AM_WRITE(namcos2_68k_serial_comms_ram_w) AM_BASE(&namcos2_68k_serial_comms_ram) \
585		AM_RANGE(0x4a0000, 0x4a000f) AM_READ(namcos2_68k_serial_comms_ctrl_r) AM_WRITE(namcos2_68k_serial_comms_ctrl_w)
	578	AM_RANGE(0x200000, 0x3fffff) AM_READ(namcos2_68k_data_rom_r) \
	579	AM_RANGE(0x400000, 0x41ffff) AM_READWRITE(namco_tilemapvideoram16_r,namco_tilemapvideoram16_w) \
	580	AM_RANGE(0x420000, 0x42003f) AM_READWRITE(namco_tilemapcontrol16_r,namco_tilemapcontrol16_w) \
	581	AM_RANGE(0x440000, 0x44ffff) AM_READWRITE(namcos2_68k_video_palette_r,namcos2_68k_video_palette_w) AM_BASE(&namcos2_68k_palette_ram) AM_SIZE(&namcos2_68k_palette_size) \
	582	AM_RANGE(0x460000, 0x460fff) AM_READWRITE(namcos2_68k_dpram_word_r,namcos2_68k_dpram_word_w) \
	583	AM_RANGE(0x468000, 0x468fff) AM_READWRITE(namcos2_68k_dpram_word_r,namcos2_68k_dpram_word_w) /* mirror */ \
	584	AM_RANGE(0x480000, 0x483fff) AM_READWRITE(namcos2_68k_serial_comms_ram_r,namcos2_68k_serial_comms_ram_w) AM_BASE(&namcos2_68k_serial_comms_ram) \
	585	AM_RANGE(0x4a0000, 0x4a000f) AM_READWRITE(namcos2_68k_serial_comms_ctrl_r,namcos2_68k_serial_comms_ctrl_w)
586	586
587	587	/*************************************************************/
588	588
589		static ADDRESS_MAP_START( common_default_am, ADDRESS_SPACE_PROGRAM, 16 )
590		NAMCOS2_68K_DEFAULT_CPU_BOARD_AM
591		AM_RANGE(0xc00000, 0xc03fff) AM_READ(namcos2_sprite_ram_r) AM_WRITE(namcos2_sprite_ram_w) AM_BASE(&namcos2_sprite_ram)
592		AM_RANGE(0xc40000, 0xc40001) AM_READ(namcos2_gfx_ctrl_r) AM_WRITE(namcos2_gfx_ctrl_w)
593		AM_RANGE(0xc80000, 0xc9ffff) AM_READ(namcos2_68k_roz_ram_r) AM_WRITE(namcos2_68k_roz_ram_w) AM_BASE(&namcos2_68k_roz_ram)
594		AM_RANGE(0xcc0000, 0xcc000f) AM_READ(namcos2_68k_roz_ctrl_r) AM_WRITE(namcos2_68k_roz_ctrl_w)
595		AM_RANGE(0xd00000, 0xd0000f) AM_READ(namcos2_68k_key_r) AM_WRITE(namcos2_68k_key_w)
	589	#define COMMON_DEFAULT_AM \
	590	NAMCOS2_68K_DEFAULT_CPU_BOARD_AM \
	591	AM_RANGE(0xc00000, 0xc03fff) AM_READWRITE(namcos2_sprite_ram_r,namcos2_sprite_ram_w) AM_BASE(&namcos2_sprite_ram) \
	592	AM_RANGE(0xc40000, 0xc40001) AM_READWRITE(namcos2_gfx_ctrl_r,namcos2_gfx_ctrl_w) \
	593	AM_RANGE(0xc80000, 0xc9ffff) AM_READWRITE(namcos2_68k_roz_ram_r,namcos2_68k_roz_ram_w) AM_BASE(&namcos2_68k_roz_ram) \
	594	AM_RANGE(0xcc0000, 0xcc000f) AM_READWRITE(namcos2_68k_roz_ctrl_r,namcos2_68k_roz_ctrl_w) \
	595	AM_RANGE(0xd00000, 0xd0000f) AM_READWRITE(namcos2_68k_key_r,namcos2_68k_key_w) \
	596
	597
	598	static ADDRESS_MAP_START( master_default_am, ADDRESS_SPACE_PROGRAM, 16 )
	599	AM_RANGE(0x000000, 0x03ffff) AM_ROM
	600	AM_RANGE(0x100000, 0x10ffff) AM_READWRITE(NAMCOS2_68K_MASTER_RAM_R,NAMCOS2_68K_MASTER_RAM_W)
	601	AM_RANGE(0x180000, 0x183fff) AM_READWRITE(NAMCOS2_68K_eeprom_R,NAMCOS2_68K_eeprom_W)
	602	AM_RANGE(0x1c0000, 0x1fffff) AM_READWRITE(namcos2_68k_master_C148_r,namcos2_68k_master_C148_w)
	603	COMMON_DEFAULT_AM
596	604	ADDRESS_MAP_END
597	605
598	606	static ADDRESS_MAP_START( slave_default_am, ADDRESS_SPACE_PROGRAM, 16 )
599		AM_RANGE(0x000000, 0x03ffff) AM_READ(SMH_ROM) AM_WRITE(SMH_ROM)
600		AM_RANGE(0x100000, 0x13ffff) AM_READ(NAMCOS2_68K_SLAVE_RAM_R) AM_WRITE(NAMCOS2_68K_SLAVE_RAM_W)
601		AM_RANGE(0x1c0000, 0x1fffff) AM_READ(namcos2_68k_slave_C148_r) AM_WRITE(namcos2_68k_slave_C148_w)
	607	AM_RANGE(0x000000, 0x03ffff) AM_ROM
	608	AM_RANGE(0x100000, 0x13ffff) AM_READWRITE(NAMCOS2_68K_SLAVE_RAM_R,NAMCOS2_68K_SLAVE_RAM_W)
	609	AM_RANGE(0x1c0000, 0x1fffff) AM_READWRITE(namcos2_68k_slave_C148_r,namcos2_68k_slave_C148_w)
	610	COMMON_DEFAULT_AM
602	611	ADDRESS_MAP_END
603	612
604		static ADDRESS_MAP_START( master_default_am, ADDRESS_SPACE_PROGRAM, 16 )
605		AM_RANGE(0x000000, 0x03ffff) AM_READ(SMH_ROM) AM_WRITE(SMH_ROM)
606		AM_RANGE(0x100000, 0x10ffff) AM_READ(NAMCOS2_68K_MASTER_RAM_R) AM_WRITE(NAMCOS2_68K_MASTER_RAM_W)
607		AM_RANGE(0x180000, 0x183fff) AM_READ(NAMCOS2_68K_eeprom_R) AM_WRITE(NAMCOS2_68K_eeprom_W)
608		AM_RANGE(0x1c0000, 0x1fffff) AM_READ(namcos2_68k_master_C148_r) AM_WRITE(namcos2_68k_master_C148_w)
609		ADDRESS_MAP_END
610	613
611	614	/*************************************************************/
612	615
613		static ADDRESS_MAP_START( common_finallap_am, ADDRESS_SPACE_PROGRAM, 16 )
614		AM_RANGE(0x300000, 0x33ffff) AM_READ(namcos2_flap_prot_r)
615		NAMCOS2_68K_DEFAULT_CPU_BOARD_AM
616		AM_RANGE(0x800000, 0x80ffff) AM_READ(namcos2_sprite_ram_r) AM_WRITE(namcos2_sprite_ram_w) AM_BASE(&namcos2_sprite_ram)
617		AM_RANGE(0x840000, 0x840001) AM_READ(namcos2_gfx_ctrl_r) AM_WRITE(namcos2_gfx_ctrl_w)
618		AM_RANGE(0x880000, 0x89ffff) AM_READ(namco_road16_r) AM_WRITE(namco_road16_w)
619		AM_RANGE(0x8c0000, 0x8c0001) AM_WRITENOP
620		ADDRESS_MAP_END
	616	#define COMMON_FINALLAP_AM \
	617	AM_RANGE(0x300000, 0x33ffff) AM_READ(namcos2_flap_prot_r) \
	618	NAMCOS2_68K_DEFAULT_CPU_BOARD_AM \
	619	AM_RANGE(0x800000, 0x80ffff) AM_READ(namcos2_sprite_ram_r) AM_WRITE(namcos2_sprite_ram_w) AM_BASE(&namcos2_sprite_ram) \
	620	AM_RANGE(0x840000, 0x840001) AM_READ(namcos2_gfx_ctrl_r) AM_WRITE(namcos2_gfx_ctrl_w) \
	621	AM_RANGE(0x880000, 0x89ffff) AM_READ(namco_road16_r) AM_WRITE(namco_road16_w) \
	622	AM_RANGE(0x8c0000, 0x8c0001) AM_WRITENOP \
621	623
	624
622	625	static ADDRESS_MAP_START( master_finallap_am, ADDRESS_SPACE_PROGRAM, 16 )
623		AM_RANGE(0x000000, 0x03ffff) AM_READ(SMH_ROM) AM_WRITE(SMH_ROM)
624		AM_RANGE(0x100000, 0x10ffff) AM_READ(NAMCOS2_68K_MASTER_RAM_R) AM_WRITE(NAMCOS2_68K_MASTER_RAM_W)
625		AM_RANGE(0x180000, 0x183fff) AM_READ(NAMCOS2_68K_eeprom_R) AM_WRITE(NAMCOS2_68K_eeprom_W)
626		AM_RANGE(0x1c0000, 0x1fffff) AM_READ(namcos2_68k_master_C148_r) AM_WRITE(namcos2_68k_master_C148_w)
	626	AM_RANGE(0x000000, 0x03ffff) AM_ROM
	627	AM_RANGE(0x100000, 0x10ffff) AM_READWRITE(NAMCOS2_68K_MASTER_RAM_R,NAMCOS2_68K_MASTER_RAM_W)
	628	AM_RANGE(0x180000, 0x183fff) AM_READWRITE(NAMCOS2_68K_eeprom_R,NAMCOS2_68K_eeprom_W)
	629	AM_RANGE(0x1c0000, 0x1fffff) AM_READWRITE(namcos2_68k_master_C148_r,namcos2_68k_master_C148_w)
	630	COMMON_FINALLAP_AM
627	631	ADDRESS_MAP_END
628	632
629	633	static ADDRESS_MAP_START( slave_finallap_am, ADDRESS_SPACE_PROGRAM, 16 )
630		AM_RANGE(0x000000, 0x03ffff) AM_READ(SMH_ROM) AM_WRITE(SMH_ROM)
631		AM_RANGE(0x100000, 0x13ffff) AM_READ(NAMCOS2_68K_SLAVE_RAM_R) AM_WRITE(NAMCOS2_68K_SLAVE_RAM_W)
632		AM_RANGE(0x1c0000, 0x1fffff) AM_READ(namcos2_68k_slave_C148_r) AM_WRITE(namcos2_68k_slave_C148_w)
	634	AM_RANGE(0x000000, 0x03ffff) AM_ROM
	635	AM_RANGE(0x100000, 0x13ffff) AM_READWRITE(NAMCOS2_68K_SLAVE_RAM_R,NAMCOS2_68K_SLAVE_RAM_W)
	636	AM_RANGE(0x1c0000, 0x1fffff) AM_READWRITE(namcos2_68k_slave_C148_r,namcos2_68k_slave_C148_w)
	637	COMMON_FINALLAP_AM
633	638	ADDRESS_MAP_END
634	639
635	640	/*************************************************************/
636	641
637		static ADDRESS_MAP_START( common_sgunner_am, ADDRESS_SPACE_PROGRAM, 16 )
638		NAMCOS2_68K_DEFAULT_CPU_BOARD_AM
639		AM_RANGE(0x800000, 0x8141ff) AM_READ(namco_obj16_r) AM_WRITE(namco_obj16_w)
640		AM_RANGE(0x818000, 0x818001) AM_WRITENOP
641		AM_RANGE(0xa00000, 0xa0000f) AM_READ(namcos2_68k_key_r) AM_WRITE(namcos2_68k_key_w)
642		ADDRESS_MAP_END
	642	#define COMMON_SGUNNER_AM \
	643	NAMCOS2_68K_DEFAULT_CPU_BOARD_AM \
	644	AM_RANGE(0x800000, 0x8141ff) AM_READWRITE(namco_obj16_r,namco_obj16_w) \
	645	AM_RANGE(0x818000, 0x818001) AM_WRITENOP \
	646	AM_RANGE(0xa00000, 0xa0000f) AM_READWRITE(namcos2_68k_key_r,namcos2_68k_key_w) \
643	647
	648
644	649	static ADDRESS_MAP_START( master_sgunner_am, ADDRESS_SPACE_PROGRAM, 16 )
645		AM_RANGE(0x000000, 0x03ffff) AM_READ(SMH_ROM) AM_WRITE(SMH_ROM)
646		AM_RANGE(0x100000, 0x10ffff) AM_READ(NAMCOS2_68K_MASTER_RAM_R) AM_WRITE(NAMCOS2_68K_MASTER_RAM_W)
647		AM_RANGE(0x180000, 0x183fff) AM_READ(NAMCOS2_68K_eeprom_R) AM_WRITE(NAMCOS2_68K_eeprom_W)
648		AM_RANGE(0x1c0000, 0x1fffff) AM_READ(namcos2_68k_master_C148_r) AM_WRITE(namcos2_68k_master_C148_w)
	650	AM_RANGE(0x000000, 0x03ffff) AM_ROM
	651	AM_RANGE(0x100000, 0x10ffff) AM_READWRITE(NAMCOS2_68K_MASTER_RAM_R,NAMCOS2_68K_MASTER_RAM_W)
	652	AM_RANGE(0x180000, 0x183fff) AM_READWRITE(NAMCOS2_68K_eeprom_R,NAMCOS2_68K_eeprom_W)
	653	AM_RANGE(0x1c0000, 0x1fffff) AM_READWRITE(namcos2_68k_master_C148_r,namcos2_68k_master_C148_w)
	654	COMMON_SGUNNER_AM
649	655	ADDRESS_MAP_END
650	656
651	657	static ADDRESS_MAP_START( slave_sgunner_am, ADDRESS_SPACE_PROGRAM, 16 )
652		AM_RANGE(0x000000, 0x03ffff) AM_READ(SMH_ROM) AM_WRITE(SMH_ROM)
653		AM_RANGE(0x100000, 0x13ffff) AM_READ(NAMCOS2_68K_SLAVE_RAM_R) AM_WRITE(NAMCOS2_68K_SLAVE_RAM_W)
654		AM_RANGE(0x1c0000, 0x1fffff) AM_READ(namcos2_68k_slave_C148_r) AM_WRITE(namcos2_68k_slave_C148_w)
	658	AM_RANGE(0x000000, 0x03ffff) AM_ROM
	659	AM_RANGE(0x100000, 0x13ffff) AM_READWRITE(NAMCOS2_68K_SLAVE_RAM_R,NAMCOS2_68K_SLAVE_RAM_W)
	660	AM_RANGE(0x1c0000, 0x1fffff) AM_READWRITE(namcos2_68k_slave_C148_r,namcos2_68k_slave_C148_w)
	661	COMMON_SGUNNER_AM
655	662	ADDRESS_MAP_END
656	663
657	664	/*************************************************************/
658	665
659		static ADDRESS_MAP_START( common_metlhawk_am, ADDRESS_SPACE_PROGRAM, 16 )
660		NAMCOS2_68K_DEFAULT_CPU_BOARD_AM
661		AM_RANGE(0xc00000, 0xc03fff) AM_READ(namcos2_sprite_ram_r) AM_WRITE(namcos2_sprite_ram_w) AM_BASE(&namcos2_sprite_ram)
662		AM_RANGE(0xc40000, 0xc4ffff) AM_READ(namco_rozvideoram16_r) AM_WRITE(namco_rozvideoram16_w)
663		AM_RANGE(0xd00000, 0xd0001f) AM_READ(namco_rozcontrol16_r) AM_WRITE(namco_rozcontrol16_w)
664		AM_RANGE(0xe00000, 0xe00001) AM_READ(namcos2_gfx_ctrl_r) AM_WRITE(namcos2_gfx_ctrl_w) /* ??? */
665		ADDRESS_MAP_END
	666	#define COMMON_METLHAWK_AM \
	667	NAMCOS2_68K_DEFAULT_CPU_BOARD_AM \
	668	AM_RANGE(0xc00000, 0xc03fff) AM_READWRITE(namcos2_sprite_ram_r,namcos2_sprite_ram_w) AM_BASE(&namcos2_sprite_ram) \
	669	AM_RANGE(0xc40000, 0xc4ffff) AM_READWRITE(namco_rozvideoram16_r,namco_rozvideoram16_w) \
	670	AM_RANGE(0xd00000, 0xd0001f) AM_READWRITE(namco_rozcontrol16_r,namco_rozcontrol16_w) \
	671	AM_RANGE(0xe00000, 0xe00001) AM_READWRITE(namcos2_gfx_ctrl_r,namcos2_gfx_ctrl_w) /* ??? */ \
666	672
	673
667	674	static ADDRESS_MAP_START( master_metlhawk_am, ADDRESS_SPACE_PROGRAM, 16 )
668		AM_RANGE(0x000000, 0x03ffff) AM_READ(SMH_ROM) AM_WRITE(SMH_ROM)
669		AM_RANGE(0x100000, 0x10ffff) AM_READ(NAMCOS2_68K_MASTER_RAM_R) AM_WRITE(NAMCOS2_68K_MASTER_RAM_W)
670		AM_RANGE(0x180000, 0x183fff) AM_READ(NAMCOS2_68K_eeprom_R) AM_WRITE(NAMCOS2_68K_eeprom_W)
671		AM_RANGE(0x1c0000, 0x1fffff) AM_READ(namcos2_68k_master_C148_r) AM_WRITE(namcos2_68k_master_C148_w)
	675	AM_RANGE(0x000000, 0x03ffff) AM_ROM
	676	AM_RANGE(0x100000, 0x10ffff) AM_READWRITE(NAMCOS2_68K_MASTER_RAM_R,NAMCOS2_68K_MASTER_RAM_W)
	677	AM_RANGE(0x180000, 0x183fff) AM_READWRITE(NAMCOS2_68K_eeprom_R,NAMCOS2_68K_eeprom_W)
	678	AM_RANGE(0x1c0000, 0x1fffff) AM_READWRITE(namcos2_68k_master_C148_r,namcos2_68k_master_C148_w)
	679	COMMON_METLHAWK_AM
672	680	ADDRESS_MAP_END
673	681
674	682	static ADDRESS_MAP_START( slave_metlhawk_am, ADDRESS_SPACE_PROGRAM, 16 )
675		AM_RANGE(0x000000, 0x03ffff) AM_READ(SMH_ROM) AM_WRITE(SMH_ROM)
676		AM_RANGE(0x100000, 0x13ffff) AM_READ(NAMCOS2_68K_SLAVE_RAM_R) AM_WRITE(NAMCOS2_68K_SLAVE_RAM_W)
677		AM_RANGE(0x1c0000, 0x1fffff) AM_READ(namcos2_68k_slave_C148_r) AM_WRITE(namcos2_68k_slave_C148_w)
	683	AM_RANGE(0x000000, 0x03ffff) AM_ROM
	684	AM_RANGE(0x100000, 0x13ffff) AM_READWRITE(NAMCOS2_68K_SLAVE_RAM_R,NAMCOS2_68K_SLAVE_RAM_W)
	685	AM_RANGE(0x1c0000, 0x1fffff) AM_READWRITE(namcos2_68k_slave_C148_r,namcos2_68k_slave_C148_w)
	686	COMMON_METLHAWK_AM
678	687	ADDRESS_MAP_END
679	688
680	689	/*************************************************************/
681	690
682		static ADDRESS_MAP_START( common_luckywld_am, ADDRESS_SPACE_PROGRAM, 16 )
683		NAMCOS2_68K_DEFAULT_CPU_BOARD_AM
684		AM_RANGE(0x800000, 0x8141ff) AM_READ(namco_obj16_r) AM_WRITE(namco_obj16_w)
685		AM_RANGE(0x818000, 0x818001) AM_READ(SMH_RAM) AM_WRITENOP /* enable? */
686		AM_RANGE(0x81a000, 0x81a001) AM_WRITENOP /* enable? */
687		AM_RANGE(0x840000, 0x840001) AM_READ(SMH_RAM)
688		AM_RANGE(0x900000, 0x900007) AM_READ(namco_spritepos16_r) AM_WRITE(namco_spritepos16_w)
689		AM_RANGE(0xa00000, 0xa1ffff) AM_READ(namco_road16_r) AM_WRITE(namco_road16_w)
690		AM_RANGE(0xc00000, 0xc0ffff) AM_READ(namco_rozvideoram16_r) AM_WRITE(namco_rozvideoram16_w)
691		AM_RANGE(0xd00000, 0xd0001f) AM_READ(namco_rozcontrol16_r) AM_WRITE(namco_rozcontrol16_w)
692		AM_RANGE(0xf00000, 0xf00007) AM_READ(namcos2_68k_key_r) AM_WRITE(namcos2_68k_key_w)
693		ADDRESS_MAP_END
	691	#define COMMON_LUCKYWLD_AM \
	692	NAMCOS2_68K_DEFAULT_CPU_BOARD_AM \
	693	AM_RANGE(0x800000, 0x8141ff) AM_READWRITE(namco_obj16_r,namco_obj16_w) \
	694	AM_RANGE(0x818000, 0x818001) AM_NOP /* enable? */ \
	695	AM_RANGE(0x81a000, 0x81a001) AM_WRITENOP /* enable? */ \
	696	AM_RANGE(0x840000, 0x840001) AM_READNOP \
	697	AM_RANGE(0x900000, 0x900007) AM_READWRITE(namco_spritepos16_r,namco_spritepos16_w) \
	698	AM_RANGE(0xa00000, 0xa1ffff) AM_READWRITE(namco_road16_r,namco_road16_w) \
	699	AM_RANGE(0xc00000, 0xc0ffff) AM_READWRITE(namco_rozvideoram16_r,namco_rozvideoram16_w) \
	700	AM_RANGE(0xd00000, 0xd0001f) AM_READWRITE(namco_rozcontrol16_r,namco_rozcontrol16_w) \
	701	AM_RANGE(0xf00000, 0xf00007) AM_READWRITE(namcos2_68k_key_r,namcos2_68k_key_w) \
694	702
	703
695	704	static ADDRESS_MAP_START( master_luckywld_am, ADDRESS_SPACE_PROGRAM, 16 )
696		AM_RANGE(0x000000, 0x03ffff) AM_READ(SMH_ROM) AM_WRITE(SMH_ROM)
697		AM_RANGE(0x100000, 0x10ffff) AM_READ(NAMCOS2_68K_MASTER_RAM_R) AM_WRITE(NAMCOS2_68K_MASTER_RAM_W)
698		AM_RANGE(0x180000, 0x183fff) AM_READ(NAMCOS2_68K_eeprom_R) AM_WRITE(NAMCOS2_68K_eeprom_W)
699		AM_RANGE(0x1c0000, 0x1fffff) AM_READ(namcos2_68k_master_C148_r) AM_WRITE(namcos2_68k_master_C148_w)
	705	AM_RANGE(0x000000, 0x03ffff) AM_ROM
	706	AM_RANGE(0x100000, 0x10ffff) AM_READWRITE(NAMCOS2_68K_MASTER_RAM_R,NAMCOS2_68K_MASTER_RAM_W)
	707	AM_RANGE(0x180000, 0x183fff) AM_READWRITE(NAMCOS2_68K_eeprom_R,NAMCOS2_68K_eeprom_W)
	708	AM_RANGE(0x1c0000, 0x1fffff) AM_READWRITE(namcos2_68k_master_C148_r,namcos2_68k_master_C148_w)
	709	COMMON_LUCKYWLD_AM
700	710	ADDRESS_MAP_END
701	711
702	712	static ADDRESS_MAP_START( slave_luckywld_am, ADDRESS_SPACE_PROGRAM, 16 )
703		AM_RANGE(0x000000, 0x03ffff) AM_READ(SMH_ROM) AM_WRITE(SMH_ROM)
704		AM_RANGE(0x100000, 0x13ffff) AM_READ(NAMCOS2_68K_SLAVE_RAM_R) AM_WRITE(NAMCOS2_68K_SLAVE_RAM_W)
705		AM_RANGE(0x1c0000, 0x1fffff) AM_READ(namcos2_68k_slave_C148_r) AM_WRITE(namcos2_68k_slave_C148_w)
	713	AM_RANGE(0x000000, 0x03ffff) AM_ROM
	714	AM_RANGE(0x100000, 0x13ffff) AM_READWRITE(NAMCOS2_68K_SLAVE_RAM_R,NAMCOS2_68K_SLAVE_RAM_W)
	715	AM_RANGE(0x1c0000, 0x1fffff) AM_READWRITE(namcos2_68k_slave_C148_r,namcos2_68k_slave_C148_w)
	716	COMMON_LUCKYWLD_AM
706	717	ADDRESS_MAP_END
707	718
708	719	/*************************************************************/
709	720	/* 6809 SOUND CPU Memory declarations                        */
710	721	/*************************************************************/
711	722
712		static ADDRESS_MAP_START( readmem_sound, ADDRESS_SPACE_PROGRAM, 8 )
713		AM_RANGE(0x0000, 0x3fff) AM_READ(BANKED_SOUND_ROM_R) /* banked */
714		AM_RANGE(0x4000, 0x4001) AM_DEVREAD("ym", ym2151_r)
715		AM_RANGE(0x5000, 0x6fff) AM_DEVREAD("c140", c140_r)
716		AM_RANGE(0x7000, 0x77ff) AM_READ(namcos2_dpram_byte_r)
717		AM_RANGE(0x7800, 0x7fff) AM_READ(namcos2_dpram_byte_r) /* mirror */
718		AM_RANGE(0x8000, 0x9fff) AM_READ(SMH_RAM)
719		AM_RANGE(0xd000, 0xffff) AM_READ(SMH_ROM)
720		ADDRESS_MAP_END
721
722		static ADDRESS_MAP_START( writemem_sound, ADDRESS_SPACE_PROGRAM, 8 )
723		AM_RANGE(0x0000, 0x3fff) AM_WRITE(SMH_ROM)
724		AM_RANGE(0x4000, 0x4001) AM_DEVWRITE("ym", ym2151_w)
725		AM_RANGE(0x5000, 0x6fff) AM_DEVWRITE("c140", c140_w)
726		AM_RANGE(0x7000, 0x77ff) AM_WRITE(namcos2_dpram_byte_w) AM_BASE(&namcos2_dpram)
727		AM_RANGE(0x7800, 0x7fff) AM_WRITE(namcos2_dpram_byte_w)   /* mirror */
728		AM_RANGE(0x8000, 0x9fff) AM_WRITE(SMH_RAM)
	723	static ADDRESS_MAP_START( sound_default_am, ADDRESS_SPACE_PROGRAM, 8 )
	724	AM_RANGE(0x0000, 0x3fff) AM_ROMBANK(6) /* banked */
	725	AM_RANGE(0x4000, 0x4001) AM_DEVREADWRITE("ym", ym2151_r,ym2151_w)
	726	AM_RANGE(0x5000, 0x6fff) AM_DEVREADWRITE("c140", c140_r,c140_w)
	727	AM_RANGE(0x7000, 0x77ff) AM_READWRITE(namcos2_dpram_byte_r,namcos2_dpram_byte_w) AM_BASE(&namcos2_dpram)
	728	AM_RANGE(0x7800, 0x7fff) AM_READWRITE(namcos2_dpram_byte_r,namcos2_dpram_byte_w) /* mirror */
	729	AM_RANGE(0x8000, 0x9fff) AM_RAM
729	730	AM_RANGE(0xa000, 0xbfff) AM_WRITENOP /* Amplifier enable on 1st write */
730	731	AM_RANGE(0xc000, 0xc001) AM_WRITE(namcos2_sound_bankselect_w)
731	732	AM_RANGE(0xd001, 0xd001) AM_WRITENOP /* Watchdog */
732	733	AM_RANGE(0xe000, 0xe000) AM_WRITENOP
733		AM_RANGE(0xc000, 0xffff) AM_WRITE(SMH_ROM)
	734	AM_RANGE(0xd000, 0xffff) AM_ROM
734	735	ADDRESS_MAP_END
735	736
	737
736	738	/*************************************************************/
737	739	/* 68705 IO CPU Memory declarations                          */
738	740	/*************************************************************/
739	741
740		static ADDRESS_MAP_START( readmem_mcu, ADDRESS_SPACE_PROGRAM, 8 )
	742	static ADDRESS_MAP_START( mcu_default_am, ADDRESS_SPACE_PROGRAM, 8 )
741	743	/* input ports and dips are mapped here */
742	744	AM_RANGE(0x0000, 0x0000) AM_READNOP /* Keep logging quiet */
743	745	AM_RANGE(0x0001, 0x0001) AM_READ(namcos2_input_port_0_r)
744	746	AM_RANGE(0x0002, 0x0002) AM_READ_PORT("MCUC")
745		AM_RANGE(0x0003, 0x0003) AM_READ(namcos2_mcu_port_d_r)
	747	AM_RANGE(0x0003, 0x0003) AM_READWRITE(namcos2_mcu_port_d_r,namcos2_mcu_port_d_w)
746	748	AM_RANGE(0x0007, 0x0007) AM_READ(namcos2_input_port_10_r)
747		AM_RANGE(0x0010, 0x0010) AM_READ(namcos2_mcu_analog_ctrl_r)
748		AM_RANGE(0x0011, 0x0011) AM_READ(namcos2_mcu_analog_port_r)
749		AM_RANGE(0x0008, 0x003f) AM_READ(SMH_RAM) /* Fill in register to stop logging */
750		AM_RANGE(0x0040, 0x01bf) AM_READ(SMH_RAM)
751		AM_RANGE(0x01c0, 0x1fff) AM_READ(SMH_ROM)
	749	AM_RANGE(0x0010, 0x0010) AM_READWRITE(namcos2_mcu_analog_ctrl_r,namcos2_mcu_analog_ctrl_w)
	750	AM_RANGE(0x0011, 0x0011) AM_READWRITE(namcos2_mcu_analog_port_r,namcos2_mcu_analog_port_w)
	751	AM_RANGE(0x0000, 0x003f) AM_RAM /* Fill in register to stop logging */
	752	AM_RANGE(0x0040, 0x01bf) AM_RAM
	753	AM_RANGE(0x01c0, 0x1fff) AM_ROM
752	754	AM_RANGE(0x2000, 0x2000) AM_READ_PORT("DSW")
753	755	AM_RANGE(0x3000, 0x3000) AM_READ(namcos2_input_port_12_r)
754	756	AM_RANGE(0x3001, 0x3001) AM_READ_PORT("MCUDI1")
755	757	AM_RANGE(0x3002, 0x3002) AM_READ_PORT("MCUDI2")
756	758	AM_RANGE(0x3003, 0x3003) AM_READ_PORT("MCUDI3")
757		AM_RANGE(0x5000, 0x57ff) AM_READ(namcos2_dpram_byte_r)
	759	AM_RANGE(0x5000, 0x57ff) AM_READWRITE(namcos2_dpram_byte_r,namcos2_dpram_byte_w) AM_BASE(&namcos2_dpram)
758	760	AM_RANGE(0x6000, 0x6fff) AM_READNOP /* watchdog */
759		AM_RANGE(0x8000, 0xffff) AM_READ(SMH_ROM)
	761	AM_RANGE(0x8000, 0xffff) AM_ROM
760	762	ADDRESS_MAP_END
761	763
762		static ADDRESS_MAP_START( writemem_mcu, ADDRESS_SPACE_PROGRAM, 8 )
763		AM_RANGE(0x0003, 0x0003) AM_WRITE(namcos2_mcu_port_d_w)
764		AM_RANGE(0x0010, 0x0010) AM_WRITE(namcos2_mcu_analog_ctrl_w)
765		AM_RANGE(0x0011, 0x0011) AM_WRITE(namcos2_mcu_analog_port_w)
766		AM_RANGE(0x0000, 0x003f) AM_WRITE(SMH_RAM) /* Fill in register to stop logging */
767		AM_RANGE(0x0040, 0x01bf) AM_WRITE(SMH_RAM)
768		AM_RANGE(0x01c0, 0x1fff) AM_WRITE(SMH_ROM)
769		AM_RANGE(0x5000, 0x57ff) AM_WRITE(namcos2_dpram_byte_w) AM_BASE(&namcos2_dpram)
770		AM_RANGE(0x8000, 0xffff) AM_WRITE(SMH_ROM)
771		ADDRESS_MAP_END
772	764
773	765	/*************************************************************/
774	766	/*                                                           */
r4679	r4680
1582	1574
1583	1575	static MACHINE_DRIVER_START( default )
1584	1576	MDRV_CPU_ADD("maincpu", M68000, 12288000)
1585		MDRV_CPU_PROGRAM_MAP(master_default_am,common_default_am)
	1577	MDRV_CPU_PROGRAM_MAP(master_default_am,0)
1586	1578	MDRV_CPU_VBLANK_INT("screen", namcos2_68k_master_vblank)
1587	1579
1588	1580	MDRV_CPU_ADD("slave", M68000, 12288000)
1589		MDRV_CPU_PROGRAM_MAP(slave_default_am,common_default_am)
	1581	MDRV_CPU_PROGRAM_MAP(slave_default_am,0)
1590	1582	MDRV_CPU_VBLANK_INT("screen", namcos2_68k_slave_vblank)
1591	1583
1592	1584	MDRV_CPU_ADD("audiocpu", M6809,3072000) // Sound handling
1593		MDRV_CPU_PROGRAM_MAP(readmem_sound,writemem_sound)
	1585	MDRV_CPU_PROGRAM_MAP(sound_default_am,0)
1594	1586	MDRV_CPU_VBLANK_INT_HACK(irq0_line_hold,2)
1595	1587	MDRV_CPU_PERIODIC_INT(irq1_line_hold, 120)
1596	1588
1597	1589	MDRV_CPU_ADD("mcu", HD63705,2048000) // I/O handling
1598		MDRV_CPU_PROGRAM_MAP(readmem_mcu,writemem_mcu)
	1590	MDRV_CPU_PROGRAM_MAP(mcu_default_am,0)
1599	1591	MDRV_CPU_VBLANK_INT("screen", irq0_line_hold)
1600	1592
1601	1593	MDRV_QUANTUM_TIME(HZ(6000)) /* CPU slices per frame */
r4679	r4680
1656	1648
1657	1649	static MACHINE_DRIVER_START( gollygho )
1658	1650	MDRV_CPU_ADD("maincpu", M68000, 12288000)
1659		MDRV_CPU_PROGRAM_MAP(master_default_am,common_default_am)
	1651	MDRV_CPU_PROGRAM_MAP(master_default_am,0)
1660	1652	MDRV_CPU_VBLANK_INT("screen", namcos2_68k_master_vblank)
1661	1653
1662	1654	MDRV_CPU_ADD("slave", M68000, 12288000)
1663		MDRV_CPU_PROGRAM_MAP(slave_default_am,common_default_am)
	1655	MDRV_CPU_PROGRAM_MAP(slave_default_am,0)
1664	1656	MDRV_CPU_VBLANK_INT("screen", namcos2_68k_slave_vblank)
1665	1657
1666	1658	MDRV_CPU_ADD("audiocpu", M6809,3072000) // Sound handling
1667		MDRV_CPU_PROGRAM_MAP(readmem_sound,writemem_sound)
	1659	MDRV_CPU_PROGRAM_MAP(sound_default_am,0)
1668	1660	MDRV_CPU_VBLANK_INT_HACK(irq0_line_hold,2)
1669	1661	MDRV_CPU_PERIODIC_INT(irq1_line_hold, 120)
1670	1662
1671	1663	MDRV_CPU_ADD("mcu", HD63705,2048000) // I/O handling
1672		MDRV_CPU_PROGRAM_MAP(readmem_mcu,writemem_mcu)
	1664	MDRV_CPU_PROGRAM_MAP(mcu_default_am,0)
1673	1665	MDRV_CPU_VBLANK_INT("screen", irq0_line_hold)
1674	1666
1675	1667	MDRV_QUANTUM_TIME(HZ(6000)) /* CPU slices per frame */
r4679	r4680
1706	1698
1707	1699	static MACHINE_DRIVER_START( finallap )
1708	1700	MDRV_CPU_ADD("maincpu", M68000, 12288000)
1709		MDRV_CPU_PROGRAM_MAP(master_finallap_am,common_finallap_am)
	1701	MDRV_CPU_PROGRAM_MAP(master_finallap_am,0)
1710	1702	MDRV_CPU_VBLANK_INT("screen", namcos2_68k_master_vblank)
1711	1703
1712	1704	MDRV_CPU_ADD("slave", M68000, 12288000)
1713		MDRV_CPU_PROGRAM_MAP(slave_finallap_am,common_finallap_am)
	1705	MDRV_CPU_PROGRAM_MAP(slave_finallap_am,0)
1714	1706	MDRV_CPU_VBLANK_INT("screen", namcos2_68k_slave_vblank)
1715	1707
1716	1708	MDRV_CPU_ADD("audiocpu", M6809,3072000) // Sound handling
1717		MDRV_CPU_PROGRAM_MAP(readmem_sound,writemem_sound)
	1709	MDRV_CPU_PROGRAM_MAP(sound_default_am,0)
1718	1710	MDRV_CPU_VBLANK_INT_HACK(irq0_line_hold,2)
1719	1711	MDRV_CPU_PERIODIC_INT(irq1_line_hold, 120)
1720	1712
1721	1713	MDRV_CPU_ADD("mcu", HD63705,2048000) // I/O handling
1722		MDRV_CPU_PROGRAM_MAP(readmem_mcu,writemem_mcu)
	1714	MDRV_CPU_PROGRAM_MAP(mcu_default_am,0)
1723	1715	MDRV_CPU_VBLANK_INT("screen", irq0_line_hold)
1724	1716
1725	1717	MDRV_QUANTUM_TIME(HZ(6000)) /* CPU slices per frame */
r4679	r4680
1756	1748
1757	1749	static MACHINE_DRIVER_START( sgunner )
1758	1750	MDRV_CPU_ADD("maincpu", M68000, 12288000)
1759		MDRV_CPU_PROGRAM_MAP(master_sgunner_am,common_sgunner_am)
	1751	MDRV_CPU_PROGRAM_MAP(master_sgunner_am,0)
1760	1752	MDRV_CPU_VBLANK_INT("screen", namcos2_68k_master_vblank)
1761	1753
1762	1754	MDRV_CPU_ADD("slave", M68000, 12288000)
1763		MDRV_CPU_PROGRAM_MAP(slave_sgunner_am,common_sgunner_am)
	1755	MDRV_CPU_PROGRAM_MAP(slave_sgunner_am,0)
1764	1756	MDRV_CPU_VBLANK_INT("screen", namcos2_68k_slave_vblank)
1765	1757
1766	1758	MDRV_CPU_ADD("audiocpu", M6809,3072000) // Sound handling
1767		MDRV_CPU_PROGRAM_MAP(readmem_sound,writemem_sound)
	1759	MDRV_CPU_PROGRAM_MAP(sound_default_am,0)
1768	1760	MDRV_CPU_VBLANK_INT_HACK(irq0_line_hold,2)
1769	1761	MDRV_CPU_PERIODIC_INT(irq1_line_hold, 120)
1770	1762
1771	1763	MDRV_CPU_ADD("mcu", HD63705,2048000) // I/O handling
1772		MDRV_CPU_PROGRAM_MAP(readmem_mcu,writemem_mcu)
	1764	MDRV_CPU_PROGRAM_MAP(mcu_default_am,0)
1773	1765	MDRV_CPU_VBLANK_INT("screen", irq0_line_hold)
1774	1766
1775	1767	MDRV_QUANTUM_TIME(HZ(6000)) /* CPU slices per frame */
r4679	r4680
1806	1798
1807	1799	static MACHINE_DRIVER_START( luckywld )
1808	1800	MDRV_CPU_ADD("maincpu", M68000, 12288000)
1809		MDRV_CPU_PROGRAM_MAP(master_luckywld_am,common_luckywld_am)
	1801	MDRV_CPU_PROGRAM_MAP(master_luckywld_am,0)
1810	1802	MDRV_CPU_VBLANK_INT("screen", namcos2_68k_master_vblank)
1811	1803
1812	1804	MDRV_CPU_ADD("slave", M68000, 12288000)
1813		MDRV_CPU_PROGRAM_MAP(slave_luckywld_am,common_luckywld_am)
	1805	MDRV_CPU_PROGRAM_MAP(slave_luckywld_am,0)
1814	1806	MDRV_CPU_VBLANK_INT("screen", namcos2_68k_slave_vblank)
1815	1807
1816	1808	MDRV_CPU_ADD("audiocpu", M6809,3072000) /* Sound handling */
1817		MDRV_CPU_PROGRAM_MAP(readmem_sound,writemem_sound)
	1809	MDRV_CPU_PROGRAM_MAP(sound_default_am,0)
1818	1810	MDRV_CPU_VBLANK_INT_HACK(irq0_line_hold,2)
1819	1811	MDRV_CPU_PERIODIC_INT(irq1_line_hold,120)
1820	1812
1821	1813	MDRV_CPU_ADD("mcu", HD63705,2048000) /* I/O handling */
1822		MDRV_CPU_PROGRAM_MAP(readmem_mcu,writemem_mcu)
	1814	MDRV_CPU_PROGRAM_MAP(mcu_default_am,0)
1823	1815	MDRV_CPU_VBLANK_INT("screen", irq0_line_hold)
1824	1816
1825	1817	MDRV_QUANTUM_TIME(HZ(6000)) /* CPU slices per frame */
r4679	r4680
1856	1848
1857	1849	static MACHINE_DRIVER_START( metlhawk )
1858	1850	MDRV_CPU_ADD("maincpu", M68000, 12288000)
1859		MDRV_CPU_PROGRAM_MAP(master_metlhawk_am,common_metlhawk_am)
	1851	MDRV_CPU_PROGRAM_MAP(master_metlhawk_am,0)
1860	1852	MDRV_CPU_VBLANK_INT("screen", namcos2_68k_master_vblank)
1861	1853
1862	1854	MDRV_CPU_ADD("slave", M68000, 12288000)
1863		MDRV_CPU_PROGRAM_MAP(slave_metlhawk_am,common_metlhawk_am)
	1855	MDRV_CPU_PROGRAM_MAP(slave_metlhawk_am,0)
1864	1856	MDRV_CPU_VBLANK_INT("screen", namcos2_68k_slave_vblank)
1865	1857
1866	1858	MDRV_CPU_ADD("audiocpu", M6809,3072000) /* Sound handling */
1867		MDRV_CPU_PROGRAM_MAP(readmem_sound,writemem_sound)
	1859	MDRV_CPU_PROGRAM_MAP(sound_default_am,0)
1868	1860	MDRV_CPU_VBLANK_INT_HACK(irq0_line_hold,2)
1869	1861	MDRV_CPU_PERIODIC_INT(irq1_line_hold,120)
1870	1862
1871	1863	MDRV_CPU_ADD("mcu", HD63705,2048000) /* I/O handling */
1872		MDRV_CPU_PROGRAM_MAP(readmem_mcu,writemem_mcu)
	1864	MDRV_CPU_PROGRAM_MAP(mcu_default_am,0)
1873	1865	MDRV_CPU_VBLANK_INT("screen", irq0_line_hold)
1874	1866
1875	1867	MDRV_QUANTUM_TIME(HZ(6000)) /* CPU slices per frame */
r4679	r4680
4399	4391	ROM_REGION( 0x400000, "gfx1", ROMREGION_DISPOSE ) /* Sprites */
4400	4392	ROM_LOAD( "bt1-obj0.bin",  0x000000, 0x80000, CRC(16b5dc04) SHA1(57cc4b7907442f922102fbd61e470c149f0379ac) )
4401	4393	ROM_LOAD( "bt1-obj1.bin",  0x080000, 0x80000, CRC(ae37a969) SHA1(524a8ef68a62f9168d356e6cd37a72a888ced202) )
4402		ROM_LOAD( "bt1-obj2.bin",  0x100000, 0x80000, NO_DUMP ) // missing?
	4394	ROM_LOAD( "bt1-obj2.bin",  0x100000, 0x80000, CRC(75f74871) SHA1(75c47a2132e21a2d82000bca137929bffecc96ef) )
4403	4395	ROM_LOAD( "bt1-obj3.bin",  0x180000, 0x80000, CRC(7fb23c05) SHA1(da97c595a3338021c1bc46f9668e1ec6c7985cea) )
4404	4396
4405	4397	ROM_REGION( 0x200000, "gfx2", ROMREGION_DISPOSE ) /* Tiles */
r4679	r4680
4903	4895	GAME( 1991, sgunnr2j, sgunner2, sgunner,  sgunner,  sgunner2, ROT0,   "Namco", "Steel Gunner 2 (Japan)", 0 )
4904	4896	GAME( 1991, cosmogng, 0,        default,  default,  cosmogng, ROT90,  "Namco", "Cosmo Gang the Video (US)", 0 )
4905	4897	GAME( 1991, cosmognj, cosmogng, default,  default,  cosmogng, ROT90,  "Namco", "Cosmo Gang the Video (Japan)", 0 )
4906		GAME( 1992, bubbletr, 0,        gollygho, bubbletr, bubbletr, ROT180, "Namco", "Bubble Trouble (Japan)",GAME_NOT_WORKING ) // incomplete dump
	4898	GAME( 1992, bubbletr, 0,        gollygho, bubbletr, bubbletr, ROT180, "Namco", "Bubble Trouble (Japan)",GAME_NOT_WORKING )
4907	4899	GAMEL(1992, finalap3, 0,        finallap, finalap3, finalap3, ROT0,   "Namco", "Final Lap 3 (World)", GAME_NOT_WORKING|GAME_IMPERFECT_GRAPHICS, layout_finallap  )
4908	4900	GAMEL(1992, finalp3j, finalap3, finallap, finalap3, finalap3, ROT0,   "Namco", "Final Lap 3 (Japan)", GAME_NOT_WORKING|GAME_IMPERFECT_GRAPHICS, layout_finallap  )
4909	4901	GAME( 1992, luckywld, 0,        luckywld, luckywld, luckywld, ROT0,   "Namco", "Lucky & Wild", 0 )

src/mame/drivers/buster.c

r4679	r4680
114	114	static DRIVER_INIT( buster )
115	115	{
116	116	UINT8 *ROM = memory_region(machine, "maincpu");
117		//  vram = auto_malloc(0x2000);
	117	//  vram = auto_alloc_array(machine, UINT8, 0x2000);
118	118	memcpy(buster_rom, ROM, 0x4000);
119	119	}
120	120

src/mame/drivers/m63.c

r4679	r4680
323	323
324	324	static WRITE8_HANDLER( snd_irq_w )
325	325	{
326		cpu_set_input_line(space->machine->cpu[1], 0, ASSERT_LINE);
	326	cputag_set_input_line(space->machine, "soundcpu", 0, ASSERT_LINE);
327	327	timer_call_after_resynch(space->machine, NULL, 0, NULL);
328	328	}
329	329
r4679	r4680
333	333	const device_config *ay2 = devtag_get_device(space->machine, "ay2");
334	334
335	335	if ((p2 & 0xf0) == 0xe0)
336		ay8910_address_w(ay1,0,offset);
	336	ay8910_address_w(ay1, 0, offset);
337	337	else if ((p2 & 0xf0) == 0xa0)
338		ay8910_data_w(ay1,0,offset);
	338	ay8910_data_w(ay1, 0, offset);
339	339	else if (ay2 != NULL && (p1 & 0xe0) == 0x60)
340		ay8910_address_w(ay2,0,offset);
	340	ay8910_address_w(ay2, 0, offset);
341	341	else if (ay2 != NULL && (p1 & 0xe0) == 0x40)
342		ay8910_data_w(ay2,0,offset);
	342	ay8910_data_w(ay2, 0, offset);
343	343	else if ((p2 & 0xf0) == 0x70 )
344		sound_status=offset;
	344	sound_status = offset;
345	345	}
346	346
347	347	static WRITE8_HANDLER( p1_w )
r4679	r4680
352	352	static WRITE8_HANDLER( p2_w )
353	353	{
354	354	p2 = data;
355		if((p2&0xf0)==0x50)
	355	if((p2 & 0xf0) == 0x50)
356	356	{
357		cpu_set_input_line(space->machine->cpu[1], 0, CLEAR_LINE);
	357	cputag_set_input_line(space->machine, "soundcpu", 0, CLEAR_LINE);
358	358	}
359	359	}
360	360
r4679	r4680
375	375
376	376	static READ8_HANDLER( snddata_r )
377	377	{
378		switch(p2&0xf0)
	378	switch(p2 & 0xf0)
379	379	{
380		case 0x60:   return soundlatch_r(space,0); ;
381		case 0x70:   return memory_region(space->machine, "user1")[((p1&0x1f)<<8)|offset];
	380	case 0x60:   return soundlatch_r(space, 0); ;
	381	case 0x70:   return memory_region(space->machine, "user1")[((p1 & 0x1f) << 8) | offset];
382	382	}
383	383	return 0xff;
384	384	}
r4679	r4680
687	687	MDRV_CPU_PROGRAM_MAP(fghtbskt_map,0)
688	688	MDRV_CPU_VBLANK_INT("screen", nmi_line_pulse)
689	689
690		MDRV_CPU_ADD("audiocpu", I8039,XTAL_12MHz/4)   /* ????? */
	690	MDRV_CPU_ADD("soundcpu", I8039,XTAL_12MHz/4)   /* ????? */
691	691	MDRV_CPU_PROGRAM_MAP(i8039_map,0)
692	692	MDRV_CPU_IO_MAP(i8039_port_map,0)
693	693	MDRV_CPU_PERIODIC_INT(snd_irq, 60/2)
r4679	r4680
856	856	ROM_LOAD( "fb10.6f",      0x8000, 0x2000, CRC(6b47efba) SHA1(cb55c7a9d5afe748c1c88f87dd1909e106932798) )
857	857	ROM_LOAD( "fb09.7f",      0xa000, 0x2000, CRC(be69e087) SHA1(be95ecafa494cb0787ee18eb3ecea4ad545a6ae3) )
858	858
859		ROM_REGION( 0x1000, "audiocpu", 0 )   /* 8039 */
	859	ROM_REGION( 0x1000, "soundcpu", 0 )   /* 8039 */
860	860	ROM_LOAD( "fb07.0b",      0x0000, 0x1000, CRC(50432dbd) SHA1(35a2218ed243bde47dbe06b5a11a65502ba734ea) )
861	861
862	862	ROM_REGION( 0x2000, "gfx1", ROMREGION_DISPOSE )

src/mame/drivers/tecmosys.c

r4679	r4680
299	299	{
300	300	if (ACCESSING_BITS_0_7)
301	301	{
302		soundlatch_w(space,0x00,data & 0xff);
303		cpu_set_input_line(space->machine->cpu[1],INPUT_LINE_NMI,PULSE_LINE);
	302	soundlatch_w(space, 0x00, data & 0xff);
	303	cputag_set_input_line(space->machine, "audiocpu", INPUT_LINE_NMI, PULSE_LINE);
304	304	}
305	305	}
306	306
r4679	r4680
559	559
560	560	static VIDEO_START(deroon)
561	561	{
562		sprite_bitmap = auto_bitmap_alloc(320,240,BITMAP_FORMAT_INDEXED16);
	562	sprite_bitmap = auto_bitmap_alloc(machine,320,240,BITMAP_FORMAT_INDEXED16);
563	563	bitmap_fill(sprite_bitmap, NULL, 0x4000);
564	564
565		tmp_tilemap_composebitmap = auto_bitmap_alloc(320,240,BITMAP_FORMAT_INDEXED16);
566		tmp_tilemap_renderbitmap = auto_bitmap_alloc(320,240,BITMAP_FORMAT_INDEXED16);
	565	tmp_tilemap_composebitmap = auto_bitmap_alloc(machine,320,240,BITMAP_FORMAT_INDEXED16);
	566	tmp_tilemap_renderbitmap = auto_bitmap_alloc(machine,320,240,BITMAP_FORMAT_INDEXED16);
567	567
568	568	bitmap_fill(tmp_tilemap_composebitmap, NULL, 0x0000);
569	569	bitmap_fill(tmp_tilemap_renderbitmap, NULL, 0x0000);
r4679	r4680
869	869	static void sound_irq(const device_config *device, int irq)
870	870	{
871	871	/* IRQ */
872		cpu_set_input_line(device->machine->cpu[1],0,irq ? ASSERT_LINE : CLEAR_LINE);
	872	cputag_set_input_line(device->machine, "audiocpu", 0, irq ? ASSERT_LINE : CLEAR_LINE);
873	873	}
874	874
875	875	static const ymf262_interface tecmosys_ymf262_interface =
r4679	r4680
1108	1108	GAME( 1995, deroon,      0, deroon, deroon, deroon,     ROT0, "Tecmo", "Deroon DeroDero", 0 )
1109	1109	GAME( 1996, tkdensho,    0, deroon, deroon, tkdensho,   ROT0, "Tecmo", "Touki Denshou -Angel Eyes- (VER. 960614)", 0 )
1110	1110	GAME( 1996, tkdensha,    tkdensho, deroon, deroon, tkdensha,   ROT0, "Tecmo", "Touki Denshou -Angel Eyes- (VER. 960427)", 0 )
1111

src/mame/drivers/polyplay.c

r4679	r4680
356	356
357	357	static TIMER_CALLBACK( polyplay_timer_callback )
358	358	{
359		cpu_set_input_line_and_vector(machine->cpu[0], 0, HOLD_LINE, 0x4c);
	359	cputag_set_input_line_and_vector(machine, "audiocpu", 0, HOLD_LINE, 0x4c);
360	360	}
361	361
362	362	/* game driver */

src/mame/drivers/exzisus.c

r4679	r4680
130	130	exzisus_sharedram_ac[offset] = data;
131	131	}
132	132
	133	// is it ok that cpub_reset refers to cpuc?
133	134	static WRITE8_HANDLER( exzisus_cpub_reset_w )
134	135	{
135		cpu_set_input_line(space->machine->cpu[3], INPUT_LINE_RESET, PULSE_LINE);
	136	cputag_set_input_line(space->machine, "cpuc", INPUT_LINE_RESET, PULSE_LINE);
136	137	}
137	138
138	139	#if 0
r4679	r4680
157	158
158	159	**************************************************************************/
159	160
160		static ADDRESS_MAP_START( cpua_readmem, ADDRESS_SPACE_PROGRAM, 8 )
161		AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM)
162		AM_RANGE(0x8000, 0xbfff) AM_READ(SMH_BANK2)
163		AM_RANGE(0xc000, 0xc5ff) AM_READ(exzisus_objectram_1_r)
164		AM_RANGE(0xc600, 0xdfff) AM_READ(exzisus_videoram_1_r)
165		AM_RANGE(0xe000, 0xefff) AM_READ(exzisus_sharedram_ac_r)
166		AM_RANGE(0xf800, 0xffff) AM_READ(exzisus_sharedram_ab_r)
167		ADDRESS_MAP_END
168
169		static ADDRESS_MAP_START( cpua_writemem, ADDRESS_SPACE_PROGRAM, 8 )
170		AM_RANGE(0x0000, 0xbfff) AM_WRITE(SMH_ROM)
171		AM_RANGE(0xc000, 0xc5ff) AM_WRITE(exzisus_objectram_1_w) AM_BASE(&exzisus_objectram1) AM_SIZE(&exzisus_objectram_size1)
172		AM_RANGE(0xc600, 0xdfff) AM_WRITE(exzisus_videoram_1_w) AM_BASE(&exzisus_videoram1)
173		AM_RANGE(0xe000, 0xefff) AM_WRITE(exzisus_sharedram_ac_w) AM_BASE(&exzisus_sharedram_ac)
	161	static ADDRESS_MAP_START( cpua_map, ADDRESS_SPACE_PROGRAM, 8 )
	162	AM_RANGE(0x0000, 0x7fff) AM_ROM
	163	AM_RANGE(0x8000, 0xbfff) AM_ROMBANK(2)
	164	AM_RANGE(0xc000, 0xc5ff) AM_READWRITE(exzisus_objectram_1_r, exzisus_objectram_1_w) AM_BASE(&exzisus_objectram1) AM_SIZE(&exzisus_objectram_size1)
	165	AM_RANGE(0xc600, 0xdfff) AM_READWRITE(exzisus_videoram_1_r, exzisus_videoram_1_w) AM_BASE(&exzisus_videoram1)
	166	AM_RANGE(0xe000, 0xefff) AM_READWRITE(exzisus_sharedram_ac_r, exzisus_sharedram_ac_w) AM_BASE(&exzisus_sharedram_ac)
174	167	AM_RANGE(0xf400, 0xf400) AM_WRITE(exzisus_cpua_bankswitch_w)
175	168	AM_RANGE(0xf404, 0xf404) AM_WRITE(exzisus_cpub_reset_w) // ??
176		AM_RANGE(0xf800, 0xffff) AM_WRITE(exzisus_sharedram_ab_w) AM_BASE(&exzisus_sharedram_ab)
	169	AM_RANGE(0xf800, 0xffff) AM_READWRITE(exzisus_sharedram_ab_r, exzisus_sharedram_ab_w) AM_BASE(&exzisus_sharedram_ab)
177	170	ADDRESS_MAP_END
178	171
179		static ADDRESS_MAP_START( cpub_readmem, ADDRESS_SPACE_PROGRAM, 8 )
180		AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM)
181		AM_RANGE(0x8000, 0xbfff) AM_READ(SMH_BANK1)
182		AM_RANGE(0xc000, 0xc5ff) AM_READ(exzisus_objectram_0_r)
183		AM_RANGE(0xc600, 0xdfff) AM_READ(exzisus_videoram_0_r)
184		AM_RANGE(0xe000, 0xefff) AM_READ(SMH_RAM)
185		AM_RANGE(0xf000, 0xf000) AM_READNOP
186		AM_RANGE(0xf001, 0xf001) AM_READ(taitosound_comm_r)
	172	static ADDRESS_MAP_START( cpub_map, ADDRESS_SPACE_PROGRAM, 8 )
	173	AM_RANGE(0x0000, 0x7fff) AM_ROM
	174	AM_RANGE(0x8000, 0xbfff) AM_ROMBANK(1)
	175	AM_RANGE(0xc000, 0xc5ff) AM_READWRITE(exzisus_objectram_0_r, exzisus_objectram_0_w) AM_BASE(&exzisus_objectram0) AM_SIZE(&exzisus_objectram_size0)
	176	AM_RANGE(0xc600, 0xdfff) AM_READWRITE(exzisus_videoram_0_r, exzisus_videoram_0_w) AM_BASE(&exzisus_videoram0)
	177	AM_RANGE(0xe000, 0xefff) AM_RAM
	178	AM_RANGE(0xf000, 0xf000) AM_READNOP AM_WRITE(taitosound_port_w)
	179	AM_RANGE(0xf001, 0xf001) AM_READWRITE(taitosound_comm_r, taitosound_comm_w)
187	180	AM_RANGE(0xf400, 0xf400) AM_READ_PORT("P1")
	181	AM_RANGE(0xf400, 0xf400) AM_WRITE(exzisus_cpub_bankswitch_w)
188	182	AM_RANGE(0xf401, 0xf401) AM_READ_PORT("P2")
189	183	AM_RANGE(0xf402, 0xf402) AM_READ_PORT("SYSTEM")
	184	AM_RANGE(0xf402, 0xf402) AM_WRITE(exzisus_coincounter_w)
190	185	AM_RANGE(0xf404, 0xf404) AM_READ_PORT("DSWA")
	186	AM_RANGE(0xf404, 0xf404) AM_WRITENOP // ??
191	187	AM_RANGE(0xf405, 0xf405) AM_READ_PORT("DSWB")
192		AM_RANGE(0xf800, 0xffff) AM_READ(exzisus_sharedram_ab_r)
	188	AM_RANGE(0xf800, 0xffff) AM_READWRITE(exzisus_sharedram_ab_r, exzisus_sharedram_ab_w)
193	189	ADDRESS_MAP_END
194	190
195		static ADDRESS_MAP_START( cpub_writemem, ADDRESS_SPACE_PROGRAM, 8 )
196		AM_RANGE(0x0000, 0xbfff) AM_WRITE(SMH_ROM)
197		AM_RANGE(0xc000, 0xc5ff) AM_WRITE(exzisus_objectram_0_w) AM_BASE(&exzisus_objectram0) AM_SIZE(&exzisus_objectram_size0)
198		AM_RANGE(0xc600, 0xdfff) AM_WRITE(exzisus_videoram_0_w) AM_BASE(&exzisus_videoram0)
199		AM_RANGE(0xe000, 0xefff) AM_WRITE(SMH_RAM)
200		AM_RANGE(0xf000, 0xf000) AM_WRITE(taitosound_port_w)
201		AM_RANGE(0xf001, 0xf001) AM_WRITE(taitosound_comm_w)
202		AM_RANGE(0xf400, 0xf400) AM_WRITE(exzisus_cpub_bankswitch_w)
203		AM_RANGE(0xf402, 0xf402) AM_WRITE(exzisus_coincounter_w)
204		AM_RANGE(0xf404, 0xf404) AM_WRITENOP // ??
205		AM_RANGE(0xf800, 0xffff) AM_WRITE(exzisus_sharedram_ab_w)
	191	static ADDRESS_MAP_START( cpuc_map, ADDRESS_SPACE_PROGRAM, 8 )
	192	AM_RANGE(0x0000, 0x7fff) AM_ROM
	193	AM_RANGE(0x8000, 0x85ff) AM_READWRITE(exzisus_objectram_1_r, exzisus_objectram_1_w)
	194	AM_RANGE(0x8600, 0x9fff) AM_READWRITE(exzisus_videoram_1_r, exzisus_videoram_1_w)
	195	AM_RANGE(0xa000, 0xafff) AM_READWRITE(exzisus_sharedram_ac_r, exzisus_sharedram_ac_w)
	196	AM_RANGE(0xb000, 0xbfff) AM_RAM
206	197	ADDRESS_MAP_END
207	198
208		static ADDRESS_MAP_START( cpuc_readmem, ADDRESS_SPACE_PROGRAM, 8 )
209		AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM)
210		AM_RANGE(0x8000, 0x85ff) AM_READ(exzisus_objectram_1_r)
211		AM_RANGE(0x8600, 0x9fff) AM_READ(exzisus_videoram_1_r)
212		AM_RANGE(0xa000, 0xafff) AM_READ(exzisus_sharedram_ac_r)
213		AM_RANGE(0xb000, 0xbfff) AM_READ(SMH_RAM)
	199	static ADDRESS_MAP_START( sound_map, ADDRESS_SPACE_PROGRAM, 8 )
	200	AM_RANGE(0x0000, 0x7fff) AM_ROM
	201	AM_RANGE(0x8000, 0x8fff) AM_RAM
	202	AM_RANGE(0x9000, 0x9001) AM_DEVREADWRITE("ym", ym2151_r, ym2151_w)
	203	AM_RANGE(0xa000, 0xa000) AM_READNOP AM_WRITE(taitosound_slave_port_w)
	204	AM_RANGE(0xa001, 0xa001) AM_READWRITE(taitosound_slave_comm_r, taitosound_slave_comm_w)
214	205	ADDRESS_MAP_END
215	206
216		static ADDRESS_MAP_START( cpuc_writemem, ADDRESS_SPACE_PROGRAM, 8 )
217		AM_RANGE(0x0000, 0x7fff) AM_WRITE(SMH_ROM)
218		AM_RANGE(0x8000, 0x85ff) AM_WRITE(exzisus_objectram_1_w)
219		AM_RANGE(0x8600, 0x9fff) AM_WRITE(exzisus_videoram_1_w)
220		AM_RANGE(0xa000, 0xafff) AM_WRITE(exzisus_sharedram_ac_w)
221		AM_RANGE(0xb000, 0xbfff) AM_WRITE(SMH_RAM)
222		ADDRESS_MAP_END
223	207
224		static ADDRESS_MAP_START( sound_readmem, ADDRESS_SPACE_PROGRAM, 8 )
225		AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM)
226		AM_RANGE(0x8000, 0x8fff) AM_READ(SMH_RAM)
227		AM_RANGE(0x9000, 0x9001) AM_DEVREAD("ym", ym2151_r)
228		AM_RANGE(0xa000, 0xa000) AM_READNOP
229		AM_RANGE(0xa001, 0xa001) AM_READ(taitosound_slave_comm_r)
230		ADDRESS_MAP_END
231
232		static ADDRESS_MAP_START( sound_writemem, ADDRESS_SPACE_PROGRAM, 8 )
233		AM_RANGE(0x0000, 0x7fff) AM_WRITE(SMH_ROM)
234		AM_RANGE(0x8000, 0x8fff) AM_WRITE(SMH_RAM)
235		AM_RANGE(0x9000, 0x9001) AM_DEVWRITE("ym", ym2151_w)
236		AM_RANGE(0xa000, 0xa000) AM_WRITE(taitosound_slave_port_w)
237		AM_RANGE(0xa001, 0xa001) AM_WRITE(taitosound_slave_comm_w)
238		ADDRESS_MAP_END
239
240
241	208	/***************************************************************************
242	209
243	210	Input Port(s)
r4679	r4680
311	278
312	279	static void irqhandler(const device_config *device, int irq)
313	280	{
314		cpu_set_input_line(device->machine->cpu[1], 0, irq ? ASSERT_LINE : CLEAR_LINE);
	281	cputag_set_input_line(device->machine, "audiocpu", 0, irq ? ASSERT_LINE : CLEAR_LINE);
315	282	}
316	283
317	284	static const ym2151_interface ym2151_config =
r4679	r4680
325	292
326	293	/* basic machine hardware */
327	294	MDRV_CPU_ADD("maincpu", Z80, 6000000)         /* 6 MHz ??? */
328		MDRV_CPU_PROGRAM_MAP(cpua_readmem,cpua_writemem)
	295	MDRV_CPU_PROGRAM_MAP(cpua_map,0)
329	296	MDRV_CPU_VBLANK_INT("screen", irq0_line_hold)
330	297
331	298	MDRV_CPU_ADD("audiocpu", Z80, 4000000)         /* 4 MHz ??? */
332		MDRV_CPU_PROGRAM_MAP(sound_readmem,sound_writemem)
	299	MDRV_CPU_PROGRAM_MAP(sound_map,0)
333	300
334	301	MDRV_CPU_ADD("cpub", Z80, 6000000)         /* 6 MHz ??? */
335		MDRV_CPU_PROGRAM_MAP(cpub_readmem,cpub_writemem)
	302	MDRV_CPU_PROGRAM_MAP(cpub_map,0)
336	303	MDRV_CPU_VBLANK_INT("screen", irq0_line_hold)
337	304
338	305	MDRV_CPU_ADD("cpuc", Z80, 6000000)         /* 6 MHz ??? */
339		MDRV_CPU_PROGRAM_MAP(cpuc_readmem,cpuc_writemem)
	306	MDRV_CPU_PROGRAM_MAP(cpuc_map,0)
340	307	MDRV_CPU_VBLANK_INT("screen", irq0_line_hold)
341	308
342	309	MDRV_QUANTUM_TIME(HZ(600))   /* 10 CPU slices per frame - enough for the sound CPU to read all commands */

src/mame/drivers/exidy440.c

r4679	r4680
266	266	{
267	267	/* if we got a coin, set the IRQ on the main CPU */
268	268	if (newval == 0)
269		cpu_set_input_line(field->port->machine->cpu[0], 0, ASSERT_LINE);
	269	cputag_set_input_line(field->port->machine, "maincpu", 0, ASSERT_LINE);
270	270	}
271	271
272	272
r4679	r4680
310	310	if (showdown_bank_data[0] != NULL)
311	311	{
312	312	if (bank == 0 && exidy440_bank != 0)
313		memory_install_read8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x4000, 0x7fff, 0, 0, showdown_bank0_r);
	313	memory_install_read8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x4000, 0x7fff, 0, 0, showdown_bank0_r);
314	314	else if (bank != 0 && exidy440_bank == 0)
315		memory_install_read8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x4000, 0x7fff, 0, 0, SMH_BANK1);
	315	memory_install_read8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x4000, 0x7fff, 0, 0, (read8_space_func)SMH_BANK(1));
316	316	}
317	317
318	318	/* select the bank and update the bank pointer */
r4679	r4680
344	344	static READ8_HANDLER( exidy440_input_port_3_r )
345	345	{
346	346	/* I/O1 accesses clear the CIRQ flip/flop */
347		cpu_set_input_line(space->machine->cpu[0], 0, CLEAR_LINE);
	347	cputag_set_input_line(space->machine, "maincpu", 0, CLEAR_LINE);
348	348	return input_port_read(space->machine, "IN3");
349	349	}
350	350
r4679	r4680
369	369	exidy440_sound_command_ack = 0;
370	370
371	371	/* cause an FIRQ on the sound CPU */
372		cpu_set_input_line(machine->cpu[1], 1, ASSERT_LINE);
	372	cputag_set_input_line(machine, "audiocpu", 1, ASSERT_LINE);
373	373	}
374	374
375	375
r4679	r4680
382	382	static WRITE8_HANDLER( exidy440_input_port_3_w )
383	383	{
384	384	/* I/O1 accesses clear the CIRQ flip/flop */
385		cpu_set_input_line(space->machine->cpu[0], 0, CLEAR_LINE);
	385	cputag_set_input_line(space->machine, "maincpu", 0, CLEAR_LINE);
386	386	}
387	387
388	388
r4679	r4680
485	485	AM_RANGE(0x2ea0, 0x2ebf) AM_READWRITE(sound_command_ack_r, SMH_NOP)
486	486	AM_RANGE(0x2ec0, 0x2eff) AM_NOP
487	487	AM_RANGE(0x3000, 0x3fff) AM_RAM
488		AM_RANGE(0x4000, 0x7fff) AM_READWRITE(SMH_BANK1, bankram_w)
	488	AM_RANGE(0x4000, 0x7fff) AM_READWRITE(SMH_BANK(1), bankram_w)
489	489	AM_RANGE(0x8000, 0xffff) AM_ROM
490	490	ADDRESS_MAP_END
491	491
r4679	r4680
1937	1937	{
1938	1938	DRIVER_INIT_CALL(exidy440);
1939	1939
1940		memory_install_read8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x2ec0, 0x2ec3, 0, 0, claypign_protection_r);
	1940	memory_install_read8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x2ec0, 0x2ec3, 0, 0, claypign_protection_r);
1941	1941	}
1942	1942
1943	1943
r4679	r4680
1946	1946	DRIVER_INIT_CALL(exidy440);
1947	1947
1948	1948	/* extra input ports and scrolling */
1949		memory_install_read8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x2ec5, 0x2ec5, 0, 0, topsecex_input_port_5_r);
1950		memory_install_read_port_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x2ec6, 0x2ec6, 0, 0, "AN0");
1951		memory_install_read_port_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x2ec7, 0x2ec7, 0, 0, "IN4");
	1949	memory_install_read8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x2ec5, 0x2ec5, 0, 0, topsecex_input_port_5_r);
	1950	memory_install_read_port_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x2ec6, 0x2ec6, 0, 0, "AN0");
	1951	memory_install_read_port_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x2ec7, 0x2ec7, 0, 0, "IN4");
1952	1952
1953		topsecex_yscroll = memory_install_write8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x2ec1, 0x2ec1, 0, 0, topsecex_yscroll_w);
	1953	topsecex_yscroll = memory_install_write8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x2ec1, 0x2ec1, 0, 0, topsecex_yscroll_w);
1954	1954	}
1955	1955
1956	1956

src/mame/drivers/tx1.c

r4679	r4680
73	73	/* Main CPU and Z80 synchronisation */
74	74	static WRITE16_HANDLER( z80_busreq_w )
75	75	{
76		cpu_set_input_line(space->machine->cpu[2], INPUT_LINE_HALT, (data & 1) ? CLEAR_LINE : ASSERT_LINE);
	76	cputag_set_input_line(space->machine, "audio_cpu", INPUT_LINE_HALT, (data & 1) ? CLEAR_LINE : ASSERT_LINE);
77	77	}
78	78
79	79	static WRITE16_HANDLER( resume_math_w )
80	80	{
81		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_TEST, ASSERT_LINE);
	81	cputag_set_input_line(space->machine, "math_cpu", INPUT_LINE_TEST, ASSERT_LINE);
82	82	}
83	83
84	84	static WRITE16_HANDLER( halt_math_w )
85	85	{
86		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_TEST, CLEAR_LINE);
	86	cputag_set_input_line(space->machine, "math_cpu", INPUT_LINE_TEST, CLEAR_LINE);
87	87	}
88	88
89	89	/* Z80 can trigger its own interrupts */
90	90	static WRITE8_HANDLER( z80_intreq_w )
91	91	{
92		cpu_set_input_line(space->machine->cpu[2], 0, HOLD_LINE);
	92	cputag_set_input_line(space->machine, "audio_cpu", 0, HOLD_LINE);
93	93	}
94	94
95	95	/* Periodic Z80 interrupt */
r4679	r4680
100	100
101	101	static READ16_HANDLER( z80_shared_r )
102	102	{
103		const address_space *cpu2space = cpu_get_address_space(space->machine->cpu[2], ADDRESS_SPACE_PROGRAM);
	103	const address_space *cpu2space = cputag_get_address_space(space->machine, "audio_cpu", ADDRESS_SPACE_PROGRAM);
104	104	return memory_read_byte(cpu2space, offset);
105	105	}
106	106
107	107	static WRITE16_HANDLER( z80_shared_w )
108	108	{
109		const address_space *cpu2space = cpu_get_address_space(space->machine->cpu[2], ADDRESS_SPACE_PROGRAM);
	109	const address_space *cpu2space = cputag_get_address_space(space->machine, "audio_cpu", ADDRESS_SPACE_PROGRAM);
110	110	memory_write_byte(cpu2space, offset, data & 0xff);
111	111	}
112	112

src/mame/drivers/thayers.c

r4679	r4680
45	45	{
46	46	if (!timer_int || !data_rdy_int || !ssi_data_request)
47	47	{
48		cpu_set_input_line(machine->cpu[0], INPUT_LINE_IRQ0, HOLD_LINE);
	48	cputag_set_input_line(machine, "maincpu", INPUT_LINE_IRQ0, HOLD_LINE);
49	49	}
50	50	else
51	51	{
52		cpu_set_input_line(machine->cpu[0], INPUT_LINE_IRQ0, CLEAR_LINE);
	52	cputag_set_input_line(machine, "maincpu", INPUT_LINE_IRQ0, CLEAR_LINE);
53	53	}
54	54	}
55	55
56	56	static TIMER_CALLBACK( intrq_tick )
57	57	{
58		cpu_set_input_line(machine->cpu[0], INPUT_LINE_IRQ0, CLEAR_LINE);
	58	cputag_set_input_line(machine, "maincpu", INPUT_LINE_IRQ0, CLEAR_LINE);
59	59	}
60	60
61	61	static WRITE8_HANDLER( intrq_w )
62	62	{
63	63	// T = 1.1 * R30 * C53 = 1.1 * 750K * 0.01uF = 8.25 ms
64	64
65		cpu_set_input_line(space->machine->cpu[0], INPUT_LINE_IRQ0, HOLD_LINE);
	65	cputag_set_input_line(space->machine, "maincpu", INPUT_LINE_IRQ0, HOLD_LINE);
66	66
67	67	timer_set(space->machine, ATTOTIME_IN_USEC(8250), NULL, 0, intrq_tick);
68	68	}
r4679	r4680
302	302
303	303	if (!BIT(data, 2) & cart_present)
304	304	{
305		cpu_set_input_line(space->machine->cpu[0], INPUT_LINE_NMI, HOLD_LINE);
	305	cputag_set_input_line(space->machine, "maincpu", INPUT_LINE_NMI, HOLD_LINE);
306	306	}
307	307	}
308	308
r4679	r4680
345	345	laserdisc_data_w(laserdisc, laserdisc_data);
346	346	}
347	347
348		switch (device_get_info_int(laserdisc, LDINFO_INT_TYPE))
	348	switch (laserdisc_get_type(laserdisc))
349	349	{
350		case LASERDISC_TYPE_PIONEER_PR7820:
351		pr7820_enter = BIT(data, 6) ? CLEAR_LINE : ASSERT_LINE;
	350	case LASERDISC_TYPE_PIONEER_PR7820:
	351	pr7820_enter = BIT(data, 6) ? CLEAR_LINE : ASSERT_LINE;
352	352
353		laserdisc_line_w(laserdisc, LASERDISC_LINE_ENTER, pr7820_enter);
	353	laserdisc_line_w(laserdisc, LASERDISC_LINE_ENTER, pr7820_enter);
354	354
355		// BIT(data, 7) is INT/_EXT, but there is no such input line in laserdsc.h
356		break;
	355	// BIT(data, 7) is INT/_EXT, but there is no such input line in laserdsc.h
	356	break;
357	357
358		case LASERDISC_TYPE_PIONEER_LDV1000:
359		laserdisc_line_w(laserdisc, LASERDISC_LINE_ENTER, BIT(data, 7) ? CLEAR_LINE : ASSERT_LINE);
360		break;
	358	case LASERDISC_TYPE_PIONEER_LDV1000:
	359	laserdisc_line_w(laserdisc, LASERDISC_LINE_ENTER, BIT(data, 7) ? CLEAR_LINE : ASSERT_LINE);
	360	break;
361	361	}
362	362	}
363	363
r4679	r4680
584	584
585	585	static CUSTOM_INPUT( laserdisc_enter_r )
586	586	{
587		switch (device_get_info_int(laserdisc, LDINFO_INT_TYPE))
	587	switch (laserdisc_get_type(laserdisc))
588	588	{
589	589	case LASERDISC_TYPE_PIONEER_PR7820:
590	590	return pr7820_enter;
r4679	r4680
598	598
599	599	static CUSTOM_INPUT( laserdisc_ready_r )
600	600	{
601		switch (device_get_info_int(laserdisc, LDINFO_INT_TYPE))
	601	switch (laserdisc_get_type(laserdisc))
602	602	{
603	603	case LASERDISC_TYPE_PIONEER_PR7820:
604	604	return (laserdisc_line_r(laserdisc, LASERDISC_LINE_READY) == ASSERT_LINE) ? 0 : 1;
r4679	r4680
741	741	pr7820_enter = 0;
742	742
743	743	newtype = (input_port_read(machine, "DSWB") & 0x18) ? LASERDISC_TYPE_PIONEER_LDV1000 : LASERDISC_TYPE_PIONEER_PR7820;
744		device_set_info_int(laserdisc, LDINFO_INT_TYPE, newtype);
	744	laserdisc_set_type(laserdisc, newtype);
745	745	}
746	746
747	747	/* COP400 Interface */

src/mame/drivers/topshoot.c

r4679	r4680
136	136	#include "driver.h"
137	137	#include "cpu/z80/z80.h"
138	138	#include "cpu/m68000/m68000.h"
	139	#include "sound/sn76496.h"
	140	#include "sound/2612intf.h"
	141
139	142	#include "genesis.h"
140	143
141	144
r4679	r4680
220	223	MDRV_CPU_ADD("maincpu", M68000, MASTER_CLOCK / 7)
221	224	MDRV_CPU_VBLANK_INT("screen", genesis_vblank_interrupt)
222	225
223		MDRV_CPU_ADD("soundcpu", Z80, MASTER_CLOCK / 15)
	226	MDRV_CPU_ADD("genesis_snd_z80", Z80, MASTER_CLOCK / 15)
224	227	MDRV_CPU_PROGRAM_MAP(genesis_z80_map, 0)
225	228	MDRV_CPU_VBLANK_INT("screen", irq0_line_hold) /* from vdp at scanline 0xe0 */
226	229
r4679	r4680
282	285	static DRIVER_INIT(topshoot)
283	286	{
284	287	/* hack -- fix vdp emulation instead */
285		memory_install_read16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xC00004, 0xC00005, 0, 0, vdp_fake_r);
	288	memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xC00004, 0xC00005, 0, 0, vdp_fake_r);
286	289
287	290	memory_set_bankptr(machine, 3, memory_region(machine, "maincpu") );
288	291	memory_set_bankptr(machine, 4, genesis_68k_ram );

src/mame/drivers/dassault.c

r4679	r4680
173	173
174	174	static WRITE16_HANDLER( dassault_sound_w )
175	175	{
176		soundlatch_w(space,0,data&0xff);
177		cpu_set_input_line(space->machine->cpu[2],0,HOLD_LINE); /* IRQ1 */
	176	soundlatch_w(space, 0, data & 0xff);
	177	cputag_set_input_line(space->machine, "audiocpu", 0, HOLD_LINE); /* IRQ1 */
178	178	}
179	179
180	180	/* The CPU-CPU irq controller is overlaid onto the end of the shared memory */
181	181	static READ16_HANDLER( dassault_irq_r )
182	182	{
183	183	switch (offset) {
184		case 0: cpu_set_input_line(space->machine->cpu[0], 5, CLEAR_LINE); break;
185		case 1: cpu_set_input_line(space->machine->cpu[1], 6, CLEAR_LINE); break;
	184	case 0: cputag_set_input_line(space->machine, "maincpu", 5, CLEAR_LINE); break;
	185	case 1: cputag_set_input_line(space->machine, "sub", 6, CLEAR_LINE); break;
186	186	}
187	187	return shared_ram[(0xffc/2)+offset]; /* The values probably don't matter */
188	188	}
189	189
190	190	static WRITE16_HANDLER( dassault_irq_w )
191	191	{
192		switch (offset) {
193		case 0: cpu_set_input_line(space->machine->cpu[0], 5, ASSERT_LINE); break;
194		case 1: cpu_set_input_line(space->machine->cpu[1], 6, ASSERT_LINE); break;
	192	switch (offset)
	193	{
	194	case 0: cputag_set_input_line(space->machine, "maincpu", 5, ASSERT_LINE); break;
	195	case 1: cputag_set_input_line(space->machine, "sub", 6, ASSERT_LINE); break;
195	196	}
196	197
197		COMBINE_DATA(&shared_ram[(0xffc/2)+offset]); /* The values probably don't matter */
	198	COMBINE_DATA(&shared_ram[(0xffc / 2) + offset]); /* The values probably don't matter */
198	199	}
199	200
200	201	static WRITE16_HANDLER( shared_ram_w )
r4679	r4680
209	210
210	211	/**********************************************************************************/
211	212
212		static ADDRESS_MAP_START( dassault_readmem, ADDRESS_SPACE_PROGRAM, 16 )
213		AM_RANGE(0x000000, 0x07ffff) AM_READ(SMH_ROM)
214		AM_RANGE(0x100000, 0x103fff) AM_READ(SMH_RAM)
215		AM_RANGE(0x1c0000, 0x1c000f) AM_READ(dassault_control_r)
216		AM_RANGE(0x200000, 0x201fff) AM_READ(SMH_RAM)
217		AM_RANGE(0x202000, 0x203fff) AM_READ(SMH_RAM)
218		AM_RANGE(0x240000, 0x240fff) AM_READ(SMH_RAM)
219		AM_RANGE(0x242000, 0x242fff) AM_READ(SMH_RAM)
220		AM_RANGE(0x3f8000, 0x3fbfff) AM_READ(SMH_RAM) /* Main ram */
221		AM_RANGE(0x3fc000, 0x3fcfff) AM_READ(SMH_RAM) /* Spriteram (2nd) */
222		AM_RANGE(0x3feffc, 0x3fefff) AM_READ(dassault_irq_r)
223		AM_RANGE(0x3fe000, 0x3fefff) AM_READ(shared_ram_r) /* Shared ram */
224		ADDRESS_MAP_END
	213	static ADDRESS_MAP_START( dassault_map, ADDRESS_SPACE_PROGRAM, 16 )
	214	AM_RANGE(0x000000, 0x07ffff) AM_ROM
225	215
226		static ADDRESS_MAP_START( dassault_writemem, ADDRESS_SPACE_PROGRAM, 16 )
227		AM_RANGE(0x000000, 0x07ffff) AM_WRITE(SMH_ROM)
228		AM_RANGE(0x100000, 0x103fff) AM_WRITE(deco16_nonbuffered_palette_w) AM_BASE(&paletteram16)
	216	AM_RANGE(0x100000, 0x103fff) AM_RAM_WRITE(deco16_nonbuffered_palette_w) AM_BASE(&paletteram16)
	217
229	218	AM_RANGE(0x140004, 0x140007) AM_WRITENOP /* ? */
230	219	AM_RANGE(0x180000, 0x180001) AM_WRITE(dassault_sound_w)
	220
	221	AM_RANGE(0x1c0000, 0x1c000f) AM_READ(dassault_control_r)
231	222	AM_RANGE(0x1c000a, 0x1c000b) AM_WRITE(deco16_priority_w)
232	223	AM_RANGE(0x1c000c, 0x1c000d) AM_WRITE(buffer_spriteram16_2_w)
233	224	AM_RANGE(0x1c000e, 0x1c000f) AM_WRITE(dassault_control_w)
234	225
235		AM_RANGE(0x200000, 0x201fff) AM_WRITE(deco16_pf1_data_w) AM_BASE(&deco16_pf1_data)
236		AM_RANGE(0x202000, 0x203fff) AM_WRITE(deco16_pf2_data_w) AM_BASE(&deco16_pf2_data)
	226	AM_RANGE(0x200000, 0x201fff) AM_RAM_WRITE(deco16_pf1_data_w) AM_BASE(&deco16_pf1_data)
	227	AM_RANGE(0x202000, 0x203fff) AM_RAM_WRITE(deco16_pf2_data_w) AM_BASE(&deco16_pf2_data)
237	228	AM_RANGE(0x212000, 0x212fff) AM_WRITE(SMH_RAM) AM_BASE(&deco16_pf2_rowscroll)
238	229	AM_RANGE(0x220000, 0x22000f) AM_WRITE(SMH_RAM) AM_BASE(&deco16_pf12_control)
239	230
240		AM_RANGE(0x240000, 0x240fff) AM_WRITE(deco16_pf3_data_w) AM_BASE(&deco16_pf3_data)
241		AM_RANGE(0x242000, 0x242fff) AM_WRITE(deco16_pf4_data_w) AM_BASE(&deco16_pf4_data)
	231	AM_RANGE(0x240000, 0x240fff) AM_RAM_WRITE(deco16_pf3_data_w) AM_BASE(&deco16_pf3_data)
	232	AM_RANGE(0x242000, 0x242fff) AM_RAM_WRITE(deco16_pf4_data_w) AM_BASE(&deco16_pf4_data)
242	233	AM_RANGE(0x252000, 0x252fff) AM_WRITE(SMH_RAM) AM_BASE(&deco16_pf4_rowscroll)
243	234	AM_RANGE(0x260000, 0x26000f) AM_WRITE(SMH_RAM) AM_BASE(&deco16_pf34_control)
244	235
245		AM_RANGE(0x3f8000, 0x3fbfff) AM_WRITE(SMH_RAM) AM_BASE(&dassault_ram)
246		AM_RANGE(0x3fc000, 0x3fcfff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16_2) AM_SIZE(&spriteram_2_size)
247		AM_RANGE(0x3feffc, 0x3fefff) AM_WRITE(dassault_irq_w)
248		AM_RANGE(0x3fe000, 0x3fefff) AM_WRITE(shared_ram_w) AM_BASE(&shared_ram)
	236	AM_RANGE(0x3f8000, 0x3fbfff) AM_RAM AM_BASE(&dassault_ram) /* Main ram */
	237	AM_RANGE(0x3fc000, 0x3fcfff) AM_RAM AM_BASE(&spriteram16_2) AM_SIZE(&spriteram_2_size) /* Spriteram (2nd) */
	238	AM_RANGE(0x3feffc, 0x3fefff) AM_READWRITE(dassault_irq_r, dassault_irq_w)
	239	AM_RANGE(0x3fe000, 0x3fefff) AM_READWRITE(shared_ram_r, shared_ram_w) AM_BASE(&shared_ram) /* Shared ram */
249	240	ADDRESS_MAP_END
250	241
251		static ADDRESS_MAP_START( dassault_sub_readmem, ADDRESS_SPACE_PROGRAM, 16 )
252		AM_RANGE(0x000000, 0x07ffff) AM_READ(SMH_ROM)
253		AM_RANGE(0x100004, 0x100005) AM_READ(dassault_sub_control_r)
254		AM_RANGE(0x3f8000, 0x3fbfff) AM_READ(SMH_RAM) /* Sub cpu ram */
255		AM_RANGE(0x3fc000, 0x3fcfff) AM_READ(SMH_RAM) /* Sprite ram */
256		AM_RANGE(0x3feffc, 0x3fefff) AM_READ(dassault_irq_r)
257		AM_RANGE(0x3fe000, 0x3fefff) AM_READ(shared_ram_r)
258		ADDRESS_MAP_END
	242	static ADDRESS_MAP_START( dassault_sub_map, ADDRESS_SPACE_PROGRAM, 16 )
	243	AM_RANGE(0x000000, 0x07ffff) AM_ROM
259	244
260		static ADDRESS_MAP_START( dassault_sub_writemem, ADDRESS_SPACE_PROGRAM, 16 )
261		AM_RANGE(0x000000, 0x07ffff) AM_WRITE(SMH_ROM)
262	245	AM_RANGE(0x100000, 0x100001) AM_WRITE(buffer_spriteram16_w)
263	246	AM_RANGE(0x100002, 0x100007) AM_WRITENOP /* ? */
264		AM_RANGE(0x3f8000, 0x3fbfff) AM_WRITE(SMH_RAM) AM_BASE(&dassault_ram2)
265		AM_RANGE(0x3fc000, 0x3fcfff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)
266		AM_RANGE(0x3feffc, 0x3fefff) AM_WRITE(dassault_irq_w)
267		AM_RANGE(0x3fe000, 0x3fefff) AM_WRITE(shared_ram_w)
	247	AM_RANGE(0x100004, 0x100005) AM_READ(dassault_sub_control_r)
	248
	249	AM_RANGE(0x3f8000, 0x3fbfff) AM_RAM AM_BASE(&dassault_ram2) /* Sub cpu ram */
	250	AM_RANGE(0x3fc000, 0x3fcfff) AM_RAM AM_BASE(&spriteram16) AM_SIZE(&spriteram_size) /* Sprite ram */
	251	AM_RANGE(0x3feffc, 0x3fefff) AM_READWRITE(dassault_irq_r, dassault_irq_w)
	252	AM_RANGE(0x3fe000, 0x3fefff) AM_READWRITE(shared_ram_r, shared_ram_w)
268	253	ADDRESS_MAP_END
269	254
270	255	/******************************************************************************/
271	256
272		static ADDRESS_MAP_START( sound_readmem, ADDRESS_SPACE_PROGRAM, 8 )
273		AM_RANGE(0x000000, 0x00ffff) AM_READ(SMH_ROM)
274		AM_RANGE(0x100000, 0x100001) AM_DEVREAD("ym1", ym2203_r)
275		AM_RANGE(0x110000, 0x110001) AM_DEVREAD("ym2", ym2151_r)
276		AM_RANGE(0x120000, 0x120001) AM_DEVREAD("oki1", okim6295_r)
277		AM_RANGE(0x130000, 0x130001) AM_DEVREAD("oki2", okim6295_r)
	257	static ADDRESS_MAP_START( sound_map, ADDRESS_SPACE_PROGRAM, 8 )
	258	AM_RANGE(0x000000, 0x00ffff) AM_ROM
	259	AM_RANGE(0x100000, 0x100001) AM_DEVREADWRITE("ym1", ym2203_r, ym2203_w)
	260	AM_RANGE(0x110000, 0x110001) AM_DEVREADWRITE("ym2", ym2151_r, ym2151_w)
	261	AM_RANGE(0x120000, 0x120001) AM_DEVREADWRITE("oki1", okim6295_r, okim6295_w)
	262	AM_RANGE(0x130000, 0x130001) AM_DEVREADWRITE("oki2", okim6295_r, okim6295_w)
278	263	AM_RANGE(0x140000, 0x140001) AM_READ(soundlatch_r)
279		AM_RANGE(0x1f0000, 0x1f1fff) AM_READ(SMH_BANK8)
280		ADDRESS_MAP_END
281
282		static ADDRESS_MAP_START( sound_writemem, ADDRESS_SPACE_PROGRAM, 8 )
283		AM_RANGE(0x000000, 0x00ffff) AM_WRITE(SMH_ROM)
284		AM_RANGE(0x100000, 0x100001) AM_DEVWRITE("ym1", ym2203_w)
285		AM_RANGE(0x110000, 0x110001) AM_DEVWRITE("ym2", ym2151_w)
286		AM_RANGE(0x120000, 0x120001) AM_DEVWRITE("oki1", okim6295_w)
287		AM_RANGE(0x130000, 0x130001) AM_DEVWRITE("oki2", okim6295_w)
288		AM_RANGE(0x1f0000, 0x1f1fff) AM_WRITE(SMH_BANK8)
	264	AM_RANGE(0x1f0000, 0x1f1fff) AM_RAMBANK(8)
289	265	AM_RANGE(0x1fec00, 0x1fec01) AM_WRITE(h6280_timer_w)
290	266	AM_RANGE(0x1ff400, 0x1ff403) AM_WRITE(h6280_irq_status_w)
291	267	ADDRESS_MAP_END
r4679	r4680
534	510
535	511	static void sound_irq(const device_config *device, int state)
536	512	{
537		cpu_set_input_line(device->machine->cpu[2],1,state);
	513	cputag_set_input_line(device->machine, "audiocpu", 1, state);
538	514	}
539	515
540	516	static WRITE8_DEVICE_HANDLER( sound_bankswitch_w )
r4679	r4680
555	531
556	532	/* basic machine hardware */
557	533	MDRV_CPU_ADD("maincpu", M68000, 14000000) /* Accurate */
558		MDRV_CPU_PROGRAM_MAP(dassault_readmem,dassault_writemem)
	534	MDRV_CPU_PROGRAM_MAP(dassault_map,0)
559	535	MDRV_CPU_VBLANK_INT("screen", irq4_line_hold)
560	536
561	537	MDRV_CPU_ADD("sub", M68000, 14000000) /* Accurate */
562		MDRV_CPU_PROGRAM_MAP(dassault_sub_readmem,dassault_sub_writemem)
	538	MDRV_CPU_PROGRAM_MAP(dassault_sub_map,0)
563	539	MDRV_CPU_VBLANK_INT("screen", irq5_line_hold)
564	540
565	541	MDRV_CPU_ADD("audiocpu", H6280,32220000/8)   /* Accurate */
566		MDRV_CPU_PROGRAM_MAP(sound_readmem,sound_writemem)
	542	MDRV_CPU_PROGRAM_MAP(sound_map,0)
567	543
568	544	MDRV_QUANTUM_TIME(HZ(8400)) /* 140 CPU slices per frame */
569	545
r4679	r4680
832	808	{
833	809	const UINT8 *src = memory_region(machine, "gfx1");
834	810	UINT8 *dst = memory_region(machine, "gfx2");
835		UINT8 *tmp = malloc_or_die(0x80000);
	811	UINT8 *tmp = alloc_array_or_die(UINT8, 0x80000);
836	812
837	813	/* Playfield 4 also has access to the char graphics, make things easier
838	814	by just copying the chars to both banks (if I just used a different gfx
r4679	r4680
845	821	free(tmp);
846	822
847	823	/* Save time waiting on vblank bit */
848		memory_install_read16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x3f8000, 0x3f8001, 0, 0, dassault_main_skip);
	824	memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x3f8000, 0x3f8001, 0, 0, dassault_main_skip);
849	825	}
850	826
851	827	static DRIVER_INIT( thndzone )
852	828	{
853	829	const UINT8 *src = memory_region(machine, "gfx1");
854	830	UINT8 *dst = memory_region(machine, "gfx2");
855		UINT8 *tmp = malloc_or_die(0x80000);
	831	UINT8 *tmp = alloc_array_or_die(UINT8, 0x80000);
856	832
857	833	/* Playfield 4 also has access to the char graphics, make things easier
858	834	by just copying the chars to both banks (if I just used a different gfx
r4679	r4680
865	841	free(tmp);
866	842
867	843	/* Save time waiting on vblank bit */
868		memory_install_read16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x3f8000, 0x3f8001, 0, 0, thndzone_main_skip);
	844	memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x3f8000, 0x3f8001, 0, 0, thndzone_main_skip);
869	845	}
870	846
871	847	/**********************************************************************************/

src/mame/drivers/merit.c

r4679	r4680
70	70	static MACHINE_START(merit)
71	71	{
72	72	question_address = 0;
73		ram_palette = auto_malloc(RAM_PALETTE_SIZE);
	73	ram_palette = auto_alloc_array(machine, UINT8, RAM_PALETTE_SIZE);
74	74
75	75	state_save_register_global_pointer(machine, ram_palette, RAM_PALETTE_SIZE);
76	76	state_save_register_global(machine, lscnblk);
r4679	r4680
248	248
249	249	static MC6845_ON_VSYNC_CHANGED(vsync_changed)
250	250	{
251		cpu_set_input_line(device->machine->cpu[0], 0, vsync ? ASSERT_LINE : CLEAR_LINE);
	251	cputag_set_input_line(device->machine, "maincpu", 0, vsync ? ASSERT_LINE : CLEAR_LINE);
252	252	}
253	253
254	254	static const mc6845_interface mc6845_intf =

src/mame/drivers/dambustr.c

r4679	r4680
30	30	}
31	31
32	32
33		static ADDRESS_MAP_START( dambustr_readmem, ADDRESS_SPACE_PROGRAM, 8 )
34		AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM)
35		AM_RANGE(0xc000, 0xc7ff) AM_READ(SMH_RAM)
36		AM_RANGE(0xd000, 0xd3ff) AM_READ(SMH_RAM)
	33	static ADDRESS_MAP_START( dambustr_map, ADDRESS_SPACE_PROGRAM, 8 )
	34	AM_RANGE(0x0000, 0x7fff) AM_ROM
	35
	36	AM_RANGE(0x8000, 0x8000) AM_WRITE(dambustr_bg_color_w)
	37	AM_RANGE(0x8001, 0x8001) AM_WRITE(dambustr_bg_split_line_w)
	38
	39	AM_RANGE(0xc000, 0xc7ff) AM_RAM
	40
	41	AM_RANGE(0xd000, 0xd3ff) AM_RAM_WRITE(galaxold_videoram_w) AM_BASE(&galaxold_videoram)
37	42	AM_RANGE(0xd400, 0xd7ff) AM_READ(galaxold_videoram_r)
38		AM_RANGE(0xd800, 0xd8ff) AM_READ(SMH_RAM)
39		AM_RANGE(0xe000, 0xe000) AM_READ_PORT("IN0")
40		AM_RANGE(0xe800, 0xefff) AM_READ_PORT("IN1")
41		AM_RANGE(0xf000, 0xf7ff) AM_READ_PORT("DSW")
42		AM_RANGE(0xf800, 0xffff) AM_READ(watchdog_reset_r)
43		ADDRESS_MAP_END
	43	AM_RANGE(0xd800, 0xd83f) AM_RAM_WRITE(galaxold_attributesram_w) AM_BASE(&galaxold_attributesram)
	44	AM_RANGE(0xd840, 0xd85f) AM_RAM AM_BASE(&galaxold_spriteram) AM_SIZE(&galaxold_spriteram_size)
	45	AM_RANGE(0xd860, 0xd87f) AM_RAM AM_BASE(&galaxold_bulletsram) AM_SIZE(&galaxold_bulletsram_size)
44	46
	47	AM_RANGE(0xd880, 0xd8ff) AM_RAM
45	48
46		static ADDRESS_MAP_START( dambustr_writemem, ADDRESS_SPACE_PROGRAM, 8 )
47		AM_RANGE(0x0000, 0x7fff) AM_WRITE(SMH_ROM)
48		AM_RANGE(0xc000, 0xc7ff) AM_WRITE(SMH_RAM)
49		AM_RANGE(0x8000, 0x8000) AM_WRITE(dambustr_bg_color_w)
50		AM_RANGE(0x8001, 0x8001) AM_WRITE(dambustr_bg_split_line_w)
51		AM_RANGE(0xd000, 0xd3ff) AM_WRITE(galaxold_videoram_w) AM_BASE(&galaxold_videoram)
52		AM_RANGE(0xd800, 0xd83f) AM_WRITE(galaxold_attributesram_w) AM_BASE(&galaxold_attributesram)
53		AM_RANGE(0xd840, 0xd85f) AM_WRITE(SMH_RAM) AM_BASE(&galaxold_spriteram) AM_SIZE(&galaxold_spriteram_size)
54		AM_RANGE(0xd860, 0xd87f) AM_WRITE(SMH_RAM) AM_BASE(&galaxold_bulletsram) AM_SIZE(&galaxold_bulletsram_size)
55		AM_RANGE(0xd880, 0xd8ff) AM_WRITE(SMH_RAM)
	49	AM_RANGE(0xe000, 0xe000) AM_READ_PORT("IN0")
56	50	AM_RANGE(0xe002, 0xe003) AM_WRITE(galaxold_coin_counter_w)
57	51	AM_RANGE(0xe004, 0xe007) AM_WRITE(galaxian_lfo_freq_w)
	52
	53	AM_RANGE(0xe800, 0xefff) AM_READ_PORT("IN1")
58	54	AM_RANGE(0xe800, 0xe802) AM_WRITE(galaxian_background_enable_w)
59	55	AM_RANGE(0xe803, 0xe803) AM_WRITE(dambustr_noise_enable_w)
60	56	AM_RANGE(0xe804, 0xe804) AM_WRITE(galaxian_shoot_enable_w)   // probably louder than normal shot
61	57	AM_RANGE(0xe805, 0xe805) AM_WRITE(galaxian_shoot_enable_w)   // normal shot (like Galaxian)
62	58	AM_RANGE(0xe806, 0xe807) AM_WRITE(galaxian_vol_w)
	59
	60	AM_RANGE(0xf000, 0xf7ff) AM_READ_PORT("DSW")
63	61	AM_RANGE(0xf001, 0xf001) AM_WRITE(galaxold_nmi_enable_w)
64	62	AM_RANGE(0xf004, 0xf004) AM_WRITE(galaxold_stars_enable_w)
65	63	AM_RANGE(0xf006, 0xf006) AM_WRITE(galaxold_flip_screen_x_w)
66	64	AM_RANGE(0xf007, 0xf007) AM_WRITE(galaxold_flip_screen_y_w)
	65
67	66	AM_RANGE(0xf800, 0xf800) AM_WRITE(galaxian_pitch_w)
	67	AM_RANGE(0xf800, 0xffff) AM_READ(watchdog_reset_r)
68	68	ADDRESS_MAP_END
69	69
70	70
r4679	r4680
185	185	static MACHINE_DRIVER_START( dambustr )
186	186	/* basic machine hardware */
187	187	MDRV_CPU_ADD("maincpu", Z80, 18432000/6)   /* 3.072 MHz */
188		MDRV_CPU_PROGRAM_MAP(dambustr_readmem, dambustr_writemem)
	188	MDRV_CPU_PROGRAM_MAP(dambustr_map, 0)
189	189
190	190	MDRV_MACHINE_RESET(galaxold)
191	191

src/mame/drivers/pingpong.c

r4679	r4680
	1	/***************************************************************************
	2
	3	Ping Pong (c) 1985 Konami
	4
	5	***************************************************************************/
	6
1	7	#include "driver.h"
2	8	#include "cpu/z80/z80.h"
3	9	#include "deprecat.h"
r4679	r4680
85	91	}
86	92	}
87	93
88		static ADDRESS_MAP_START( readmem, ADDRESS_SPACE_PROGRAM, 8 )
89		AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM)
90		AM_RANGE(0x8000, 0x87ff) AM_READ(SMH_RAM)
91		AM_RANGE(0x9000, 0x97ff) AM_READ(SMH_RAM)
	94	static ADDRESS_MAP_START( pingpong_map, ADDRESS_SPACE_PROGRAM, 8 )
	95	AM_RANGE(0x0000, 0x7fff) AM_ROM
	96	AM_RANGE(0x8000, 0x83ff) AM_RAM_WRITE(pingpong_colorram_w) AM_BASE(&colorram)
	97	AM_RANGE(0x8400, 0x87ff) AM_RAM_WRITE(pingpong_videoram_w) AM_BASE(&videoram)
	98	AM_RANGE(0x9000, 0x9002) AM_RAM
	99	AM_RANGE(0x9003, 0x9052) AM_RAM AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
	100	AM_RANGE(0x9053, 0x97ff) AM_RAM
92	101	AM_RANGE(0xa800, 0xa800) AM_READ_PORT("SYSTEM")
93	102	AM_RANGE(0xa880, 0xa880) AM_READ_PORT("INPUTS")
94	103	AM_RANGE(0xa900, 0xa900) AM_READ_PORT("DSW1")
95	104	AM_RANGE(0xa980, 0xa980) AM_READ_PORT("DSW2")
96		ADDRESS_MAP_END
97
98		static ADDRESS_MAP_START( writemem, ADDRESS_SPACE_PROGRAM, 8 )
99		AM_RANGE(0x0000, 0x7fff) AM_WRITE(SMH_ROM)
100		AM_RANGE(0x8000, 0x83ff) AM_WRITE(pingpong_colorram_w) AM_BASE(&colorram)
101		AM_RANGE(0x8400, 0x87ff) AM_WRITE(pingpong_videoram_w) AM_BASE(&videoram)
102		AM_RANGE(0x9000, 0x9002) AM_WRITE(SMH_RAM)
103		AM_RANGE(0x9003, 0x9052) AM_WRITE(SMH_RAM) AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
104		AM_RANGE(0x9053, 0x97ff) AM_WRITE(SMH_RAM)
105	105	AM_RANGE(0xa000, 0xa000) AM_WRITE(coin_w)   /* coin counters + irq enables */
106	106	AM_RANGE(0xa200, 0xa200) AM_WRITENOP      /* SN76496 data latch */
107	107	AM_RANGE(0xa400, 0xa400) AM_DEVWRITE("sn", sn76496_w)   /* trigger read */
r4679	r4680
457	457
458	458	/* basic machine hardware */
459	459	MDRV_CPU_ADD("cpu",Z80,18432000/6)      /* 3.072 MHz (probably) */
460		MDRV_CPU_PROGRAM_MAP(readmem,writemem)
	460	MDRV_CPU_PROGRAM_MAP(pingpong_map,0)
461	461	MDRV_CPU_VBLANK_INT_HACK(pingpong_interrupt,16)   /* 1 IRQ + 8 NMI */
462	462
463	463	/* video hardware */
r4679	r4680
594	594	ROM[i] = BITSWAP8(ROM[i],0,1,2,3,4,5,6,7);
595	595
596	596	/* questions banking handlers */
597		memory_install_write8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x4000, 0x4000, 0, 0, cashquiz_question_bank_high_w);
598		memory_install_write8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x4001, 0x4001, 0, 0, cashquiz_question_bank_low_w);
	597	memory_install_write8_handler(cputag_get_address_space(machine, "cpu", ADDRESS_SPACE_PROGRAM), 0x4000, 0x4000, 0, 0, cashquiz_question_bank_high_w);
	598	memory_install_write8_handler(cputag_get_address_space(machine, "cpu", ADDRESS_SPACE_PROGRAM), 0x4001, 0x4001, 0, 0, cashquiz_question_bank_low_w);
599	599
600	600	// 8 independents banks for questions
601		memory_install_read8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x5000, 0x50ff, 0, 0, SMH_BANK1);
602		memory_install_read8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x5100, 0x51ff, 0, 0, SMH_BANK2);
603		memory_install_read8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x5200, 0x52ff, 0, 0, SMH_BANK3);
604		memory_install_read8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x5300, 0x53ff, 0, 0, SMH_BANK4);
605		memory_install_read8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x5400, 0x54ff, 0, 0, SMH_BANK5);
606		memory_install_read8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x5500, 0x55ff, 0, 0, SMH_BANK6);
607		memory_install_read8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x5600, 0x56ff, 0, 0, SMH_BANK7);
608		memory_install_read8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x5700, 0x57ff, 0, 0, SMH_BANK8);
	601	memory_install_read8_handler(cputag_get_address_space(machine, "cpu", ADDRESS_SPACE_PROGRAM), 0x5000, 0x50ff, 0, 0, (read8_space_func)SMH_BANK(1));
	602	memory_install_read8_handler(cputag_get_address_space(machine, "cpu", ADDRESS_SPACE_PROGRAM), 0x5100, 0x51ff, 0, 0, (read8_space_func)SMH_BANK(2));
	603	memory_install_read8_handler(cputag_get_address_space(machine, "cpu", ADDRESS_SPACE_PROGRAM), 0x5200, 0x52ff, 0, 0, (read8_space_func)SMH_BANK(3));
	604	memory_install_read8_handler(cputag_get_address_space(machine, "cpu", ADDRESS_SPACE_PROGRAM), 0x5300, 0x53ff, 0, 0, (read8_space_func)SMH_BANK(4));
	605	memory_install_read8_handler(cputag_get_address_space(machine, "cpu", ADDRESS_SPACE_PROGRAM), 0x5400, 0x54ff, 0, 0, (read8_space_func)SMH_BANK(5));
	606	memory_install_read8_handler(cputag_get_address_space(machine, "cpu", ADDRESS_SPACE_PROGRAM), 0x5500, 0x55ff, 0, 0, (read8_space_func)SMH_BANK(6));
	607	memory_install_read8_handler(cputag_get_address_space(machine, "cpu", ADDRESS_SPACE_PROGRAM), 0x5600, 0x56ff, 0, 0, (read8_space_func)SMH_BANK(7));
	608	memory_install_read8_handler(cputag_get_address_space(machine, "cpu", ADDRESS_SPACE_PROGRAM), 0x5700, 0x57ff, 0, 0, (read8_space_func)SMH_BANK(8));
609	609
610	610	// setup default banks
611	611	for(i = 0; i < 8; i++)

src/mame/drivers/blstroid.c

r4679	r4680
33	33
34	34	static void update_interrupts(running_machine *machine)
35	35	{
36		cpu_set_input_line(machine->cpu[0], 1, atarigen_scanline_int_state ? ASSERT_LINE : CLEAR_LINE);
37		cpu_set_input_line(machine->cpu[0], 2, atarigen_video_int_state ? ASSERT_LINE : CLEAR_LINE);
38		cpu_set_input_line(machine->cpu[0], 4, atarigen_sound_int_state ? ASSERT_LINE : CLEAR_LINE);
	36	cputag_set_input_line(machine, "maincpu", 1, atarigen_scanline_int_state ? ASSERT_LINE : CLEAR_LINE);
	37	cputag_set_input_line(machine, "maincpu", 2, atarigen_video_int_state ? ASSERT_LINE : CLEAR_LINE);
	38	cputag_set_input_line(machine, "maincpu", 4, atarigen_sound_int_state ? ASSERT_LINE : CLEAR_LINE);
39	39	}
40	40
41	41

src/mame/drivers/gotya.c

r4679	r4680
39	39	#include "includes/gotya.h"
40	40
41	41
42		static ADDRESS_MAP_START( readmem, ADDRESS_SPACE_PROGRAM, 8 )
43		AM_RANGE(0x0000, 0x3fff) AM_READ(SMH_ROM)
44		AM_RANGE(0x5000, 0x5fff) AM_READ(SMH_RAM)
	42	static ADDRESS_MAP_START( gotya_map, ADDRESS_SPACE_PROGRAM, 8 )
	43	AM_RANGE(0x0000, 0x3fff) AM_ROM
	44	AM_RANGE(0x5000, 0x5fff) AM_RAM
45	45	AM_RANGE(0x6000, 0x6000) AM_READ_PORT("P1")
46	46	AM_RANGE(0x6001, 0x6001) AM_READ_PORT("P2")
47	47	AM_RANGE(0x6002, 0x6002) AM_READ_PORT("DSW")
48		AM_RANGE(0xc000, 0xd3ff) AM_READ(SMH_RAM)
49		ADDRESS_MAP_END
50
51		static ADDRESS_MAP_START( writemem, ADDRESS_SPACE_PROGRAM, 8 )
52		AM_RANGE(0x0000, 0x3fff) AM_WRITE(SMH_ROM)
53		AM_RANGE(0x5000, 0x5fff) AM_WRITE(SMH_RAM)
54	48	AM_RANGE(0x6004, 0x6004) AM_WRITE(gotya_video_control_w)
55	49	AM_RANGE(0x6005, 0x6005) AM_WRITE(gotya_soundlatch_w)
56	50	AM_RANGE(0x6006, 0x6006) AM_WRITE(SMH_RAM) AM_BASE(&gotya_scroll)
57	51	AM_RANGE(0x6007, 0x6007) AM_WRITE(watchdog_reset_w)
58		AM_RANGE(0xc000, 0xc7ff) AM_WRITE(gotya_videoram_w) AM_BASE(&videoram)
59		AM_RANGE(0xc800, 0xcfff) AM_WRITE(gotya_colorram_w) AM_BASE(&colorram)
60		AM_RANGE(0xd000, 0xd3df) AM_WRITE(SMH_RAM) AM_BASE(&gotya_videoram2)
61		AM_RANGE(0xd3e0, 0xd3ff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram)
	52	AM_RANGE(0xc000, 0xc7ff) AM_RAM_WRITE(gotya_videoram_w) AM_BASE(&videoram)
	53	AM_RANGE(0xc800, 0xcfff) AM_RAM_WRITE(gotya_colorram_w) AM_BASE(&colorram)
	54	AM_RANGE(0xd000, 0xd3df) AM_RAM AM_BASE(&gotya_videoram2)
	55	AM_RANGE(0xd3e0, 0xd3ff) AM_RAM AM_BASE(&spriteram)
62	56	ADDRESS_MAP_END
63	57
64	58
r4679	r4680
184	178
185	179	/* basic machine hardware */
186	180	MDRV_CPU_ADD("maincpu", Z80,18432000/6)   /* 3.072 MHz ??? */
187		MDRV_CPU_PROGRAM_MAP(readmem,writemem)
	181	MDRV_CPU_PROGRAM_MAP(gotya_map,0)
188	182	MDRV_CPU_VBLANK_INT("screen", irq0_line_hold)
189	183
190	184	/* video hardware */

src/mame/drivers/aztarac.c

r4679	r4680
36	36
37	37	static MACHINE_RESET( aztarac )
38	38	{
39		cpu_set_irq_callback(machine->cpu[0], aztarac_irq_callback);
	39	cpu_set_irq_callback(cputag_get_cpu(machine, "maincpu"), aztarac_irq_callback);
40	40	}
41	41
42	42

src/mame/drivers/tatsumi.c

r4679	r4680
188	188	static WRITE16_HANDLER(cyclwarr_sound_w)
189	189	{
190	190	soundlatch_w(space, 0, data >> 8);
191		cpu_set_input_line(space->machine->cpu[2], INPUT_LINE_NMI, PULSE_LINE);
	191	cputag_set_input_line(space->machine, "audiocpu", INPUT_LINE_NMI, PULSE_LINE);
192	192	}
193	193
194	194	/***************************************************************************/
r4679	r4680
829	829
830	830	static void sound_irq(const device_config *device, int state)
831	831	{
832		cpu_set_input_line(device->machine->cpu[2], INPUT_LINE_IRQ0, state);
	832	cputag_set_input_line(device->machine, "audiocpu", INPUT_LINE_IRQ0, state);
833	833	}
834	834
835	835	static const ym2151_interface ym2151_config =
r4679	r4680
844	844
845	845	static void apache3_68000_reset(const device_config *device)
846	846	{
847		cpu_set_input_line(device->machine->cpu[3], INPUT_LINE_RESET, PULSE_LINE);
	847	cputag_set_input_line(device->machine, "sub2", INPUT_LINE_RESET, PULSE_LINE);
848	848	}
849	849
850	850	static MACHINE_RESET( apache3 )
851	851	{
852		cpu_set_input_line(machine->cpu[3], INPUT_LINE_RESET, ASSERT_LINE); // TODO
	852	cputag_set_input_line(machine, "sub2", INPUT_LINE_RESET, ASSERT_LINE); // TODO
853	853
854	854	/* Hook the RESET line, which resets the Z80 */
855		device_set_info_fct(machine->cpu[1], CPUINFO_FCT_M68K_RESET_CALLBACK, (genf *)apache3_68000_reset);
	855	m68k_set_reset_callback(cputag_get_cpu(machine, "sub"), apache3_68000_reset);
856	856	}
857	857
858	858

src/mame/drivers/supbtime.c

r4679	r4680
53	53
54	54	static WRITE16_HANDLER( sound_w )
55	55	{
56		soundlatch_w(space,0,data & 0xff);
57		cpu_set_input_line(space->machine->cpu[1],0,HOLD_LINE);
	56	soundlatch_w(space, 0, data & 0xff);
	57	cputag_set_input_line(space->machine, "audiocpu", 0, HOLD_LINE);
58	58	}
59	59
60	60	/******************************************************************************/
r4679	r4680
311	311
312	312	static void sound_irq(const device_config *device, int state)
313	313	{
314		cpu_set_input_line(device->machine->cpu[1],1,state); /* IRQ 2 */
	314	cputag_set_input_line(device->machine, "audiocpu", 1, state); /* IRQ 2 */
315	315	}
316	316
317	317	static const ym2151_interface ym2151_config =

src/mame/drivers/toratora.c

r4679	r4680
122	122	int combined_state = pia6821_get_irq_a(device) | pia6821_get_irq_b(device);
123	123
124	124	logerror("GEN IRQ: %x\n", combined_state);
125		cpu_set_input_line(device->machine->cpu[0], 0, combined_state ? ASSERT_LINE : CLEAR_LINE);
	125	cputag_set_input_line(device->machine, "maincpu", 0, combined_state ? ASSERT_LINE : CLEAR_LINE);
126	126	}
127	127
128	128

src/mame/drivers/retofinv.c

r4679	r4680
40	40
41	41	static WRITE8_HANDLER( cpu1_reset_w )
42	42	{
43		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_RESET, data ? CLEAR_LINE : ASSERT_LINE);
	43	cputag_set_input_line(space->machine, "sub", INPUT_LINE_RESET, data ? CLEAR_LINE : ASSERT_LINE);
44	44	}
45	45
46	46	static WRITE8_HANDLER( cpu2_reset_w )
47	47	{
48		cpu_set_input_line(space->machine->cpu[2], INPUT_LINE_RESET, data ? CLEAR_LINE : ASSERT_LINE);
	48	cputag_set_input_line(space->machine, "audiocpu", INPUT_LINE_RESET, data ? CLEAR_LINE : ASSERT_LINE);
49	49	}
50	50
51	51	static WRITE8_HANDLER( mcu_reset_w )
52	52	{
53	53	/* the bootlegs don't have a MCU, so make sure it's there before trying to reset it */
54		if (space->machine->cpu[3] != NULL)
55		cpu_set_input_line(space->machine->cpu[3], INPUT_LINE_RESET, data ? CLEAR_LINE : ASSERT_LINE);
	54	if (cputag_get_cpu(space->machine, "68705") != NULL)
	55	cputag_set_input_line(space->machine, "68705", INPUT_LINE_RESET, data ? CLEAR_LINE : ASSERT_LINE);
56	56	}
57	57
58	58	static WRITE8_HANDLER( cpu2_m6000_w )
r4679	r4680
68	68	static WRITE8_HANDLER( soundcommand_w )
69	69	{
70	70	soundlatch_w(space, 0, data);
71		cpu_set_input_line(space->machine->cpu[2], 0, HOLD_LINE);
	71	cputag_set_input_line(space->machine, "audiocpu", 0, HOLD_LINE);
72	72	}
73	73
74	74	static WRITE8_HANDLER( irq0_ack_w )
75	75	{
76	76	int bit = data & 1;
77	77
78		cpu_interrupt_enable(space->machine->cpu[0],bit);
	78	cpu_interrupt_enable(cputag_get_cpu(space->machine, "maincpu"), bit);
79	79	if (!bit)
80		cpu_set_input_line(space->machine->cpu[0], 0, CLEAR_LINE);
	80	cputag_set_input_line(space->machine, "maincpu", 0, CLEAR_LINE);
81	81	}
82	82
83	83	static WRITE8_HANDLER( irq1_ack_w )
84	84	{
85	85	int bit = data & 1;
86	86
87		cpu_interrupt_enable(space->machine->cpu[1],bit);
	87	cpu_interrupt_enable(cputag_get_cpu(space->machine, "sub"), bit);
88	88	if (!bit)
89		cpu_set_input_line(space->machine->cpu[1], 0, CLEAR_LINE);
	89	cputag_set_input_line(space->machine, "sub", 0, CLEAR_LINE);
90	90	}
91	91
92	92	static WRITE8_HANDLER( coincounter_w )

src/mame/drivers/gbusters.c

r4679	r4680
104	104
105	105	static WRITE8_HANDLER( gbusters_sh_irqtrigger_w )
106	106	{
107		cpu_set_input_line_and_vector(space->machine->cpu[1],0,HOLD_LINE,0xff);
	107	cputag_set_input_line_and_vector(space->machine, "audiocpu", 0, HOLD_LINE, 0xff);
108	108	}
109	109
110	110	static WRITE8_DEVICE_HANDLER( gbusters_snd_bankswitch_w )
r4679	r4680
122	122	#endif
123	123	}
124	124
125		static ADDRESS_MAP_START( gbusters_readmem, ADDRESS_SPACE_PROGRAM, 8 )
	125	static ADDRESS_MAP_START( gbusters_map, ADDRESS_SPACE_PROGRAM, 8 )
	126	AM_RANGE(0x1f80, 0x1f80) AM_WRITE(gbusters_coin_counter_w)                  /* coin counters */
	127	AM_RANGE(0x1f84, 0x1f84) AM_WRITE(soundlatch_w)                           /* sound code # */
	128	AM_RANGE(0x1f88, 0x1f88) AM_WRITE(gbusters_sh_irqtrigger_w)                  /* cause interrupt on audio CPU */
	129	AM_RANGE(0x1f8c, 0x1f8c) AM_WRITE(watchdog_reset_w)                        /* watchdog reset */
126	130	AM_RANGE(0x1f90, 0x1f90) AM_READ_PORT("SYSTEM")
127	131	AM_RANGE(0x1f91, 0x1f91) AM_READ_PORT("P1")
128	132	AM_RANGE(0x1f92, 0x1f92) AM_READ_PORT("P2")
129	133	AM_RANGE(0x1f93, 0x1f93) AM_READ_PORT("DSW3")
130	134	AM_RANGE(0x1f94, 0x1f94) AM_READ_PORT("DSW1")
131	135	AM_RANGE(0x1f95, 0x1f95) AM_READ_PORT("DSW2")
132		AM_RANGE(0x0000, 0x3fff) AM_READ(K052109_051960_r)   /* tiles + sprites (RAM H21, G21 & H6) */
133		AM_RANGE(0x4000, 0x57ff) AM_READ(SMH_RAM)         /* RAM I12 */
134		AM_RANGE(0x5800, 0x5fff) AM_READ(bankedram_r)      /* palette + work RAM (RAM D16 & C16) */
135		AM_RANGE(0x6000, 0x7fff) AM_READ(SMH_BANK1)         /* banked ROM */
136		AM_RANGE(0x8000, 0xffff) AM_READ(SMH_ROM)         /* ROM 878n02.rom */
	136	AM_RANGE(0x1f98, 0x1f98) AM_WRITE(gbusters_1f98_w)                        /* enable gfx ROM read through VRAM */
	137	AM_RANGE(0x1f9c, 0x1f9c) AM_WRITE(gbusters_unknown_w)                     /* ??? */
	138	AM_RANGE(0x0000, 0x3fff) AM_READWRITE(K052109_051960_r, K052109_051960_w)      /* tiles + sprites (RAM H21, G21 & H6) */
	139	AM_RANGE(0x4000, 0x57ff) AM_RAM                                       /* RAM I12 */
	140	AM_RANGE(0x5800, 0x5fff) AM_READWRITE(bankedram_r, bankedram_w) AM_BASE(&ram)   /* palette + work RAM (RAM D16 & C16) */
	141	AM_RANGE(0x6000, 0x7fff) AM_ROMBANK(1)                                 /* banked ROM */
	142	AM_RANGE(0x8000, 0xffff) AM_ROM                                       /* ROM 878n02.rom */
137	143	ADDRESS_MAP_END
138	144
139		static ADDRESS_MAP_START( gbusters_writemem, ADDRESS_SPACE_PROGRAM, 8 )
140		AM_RANGE(0x1f80, 0x1f80) AM_WRITE(gbusters_coin_counter_w)   /* coin counters */
141		AM_RANGE(0x1f84, 0x1f84) AM_WRITE(soundlatch_w)            /* sound code # */
142		AM_RANGE(0x1f88, 0x1f88) AM_WRITE(gbusters_sh_irqtrigger_w)   /* cause interrupt on audio CPU */
143		AM_RANGE(0x1f8c, 0x1f8c) AM_WRITE(watchdog_reset_w)         /* watchdog reset */
144		AM_RANGE(0x1f98, 0x1f98) AM_WRITE(gbusters_1f98_w)         /* enable gfx ROM read through VRAM */
145		AM_RANGE(0x1f9c, 0x1f9c) AM_WRITE(gbusters_unknown_w)         /* ??? */
146		AM_RANGE(0x0000, 0x3fff) AM_WRITE(K052109_051960_w)         /* tiles + sprites (RAM H21, G21 & H6) */
147		AM_RANGE(0x4000, 0x57ff) AM_WRITE(SMH_RAM)               /* RAM I12 */
148		AM_RANGE(0x5800, 0x5fff) AM_WRITE(bankedram_w) AM_BASE(&ram)         /* palette + work RAM (RAM D16 & C16) */
149		AM_RANGE(0x6000, 0x7fff) AM_WRITE(SMH_ROM)               /* banked ROM */
150		AM_RANGE(0x8000, 0xffff) AM_WRITE(SMH_ROM)               /* ROM 878n02.rom */
	145	static ADDRESS_MAP_START( gbusters_sound_map, ADDRESS_SPACE_PROGRAM, 8 )
	146	AM_RANGE(0x0000, 0x7fff) AM_ROM                                       /* ROM 878h01.rom */
	147	AM_RANGE(0x8000, 0x87ff) AM_RAM                                       /* RAM */
	148	AM_RANGE(0xa000, 0xa000) AM_READ(soundlatch_r)                           /* soundlatch_r */
	149	AM_RANGE(0xb000, 0xb00d) AM_DEVREADWRITE("konami", k007232_r, k007232_w)      /* 007232 registers */
	150	AM_RANGE(0xc001, 0xc001) AM_DEVREAD("ym", ym2151_status_port_r)               /* YM 2151 */
	151	AM_RANGE(0xc000, 0xc001) AM_DEVREADWRITE("ym", ym2151_r, ym2151_w)            /* YM 2151 */
	152	AM_RANGE(0xf000, 0xf000) AM_DEVWRITE("konami", gbusters_snd_bankswitch_w)      /* 007232 bankswitch? */
151	153	ADDRESS_MAP_END
152	154
153		static ADDRESS_MAP_START( gbusters_readmem_sound, ADDRESS_SPACE_PROGRAM, 8 )
154		AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM)            /* ROM 878h01.rom */
155		AM_RANGE(0x8000, 0x87ff) AM_READ(SMH_RAM)            /* RAM */
156		AM_RANGE(0xa000, 0xa000) AM_READ(soundlatch_r)         /* soundlatch_r */
157		AM_RANGE(0xb000, 0xb00d) AM_DEVREAD("konami", k007232_r)   /* 007232 registers */
158		AM_RANGE(0xc001, 0xc001) AM_DEVREAD("ym", ym2151_status_port_r)   /* YM 2151 */
159		ADDRESS_MAP_END
160
161		static ADDRESS_MAP_START( gbusters_writemem_sound, ADDRESS_SPACE_PROGRAM, 8 )
162		AM_RANGE(0x0000, 0x7fff) AM_WRITE(SMH_ROM)               /* ROM 878h01.rom */
163		AM_RANGE(0x8000, 0x87ff) AM_WRITE(SMH_RAM)               /* RAM */
164		AM_RANGE(0xb000, 0xb00d) AM_DEVWRITE("konami", k007232_w)      /* 007232 registers */
165		AM_RANGE(0xc000, 0xc001) AM_DEVREADWRITE("ym", ym2151_r, ym2151_w)      /* YM 2151 */
166		AM_RANGE(0xf000, 0xf000) AM_DEVWRITE("konami", gbusters_snd_bankswitch_w)   /* 007232 bankswitch? */
167		ADDRESS_MAP_END
168
169	155	/***************************************************************************
170	156
171	157	Input Ports
r4679	r4680
245	231
246	232	/* basic machine hardware */
247	233	MDRV_CPU_ADD("maincpu", KONAMI, 3000000)   /* Konami custom 052526 */
248		MDRV_CPU_PROGRAM_MAP(gbusters_readmem,gbusters_writemem)
	234	MDRV_CPU_PROGRAM_MAP(gbusters_map,0)
249	235	MDRV_CPU_VBLANK_INT("screen", gbusters_interrupt)
250	236
251	237	MDRV_CPU_ADD("audiocpu", Z80, 3579545)      /* ? */
252		MDRV_CPU_PROGRAM_MAP(gbusters_readmem_sound,gbusters_writemem_sound)
	238	MDRV_CPU_PROGRAM_MAP(gbusters_sound_map,0)
253	239
254	240	MDRV_MACHINE_RESET(gbusters)
255	241
r4679	r4680
382	368	{
383	369	UINT8 *RAM = memory_region(machine, "maincpu");
384	370
385		konami_configure_set_lines(machine->cpu[0], gbusters_banking);
	371	konami_configure_set_lines(cputag_get_cpu(machine, "maincpu"), gbusters_banking);
386	372
387	373	/* mirror address for banked ROM */
388	374	memcpy(&RAM[0x18000], &RAM[0x10000], 0x08000 );

src/mame/drivers/dotrikun.c

r4679	r4680
23	23	#include "driver.h"
24	24	#include "cpu/z80/z80.h"
25	25
	26	/*---------------  External Function Prototypes  ---------------*/
26	27
27	28	VIDEO_UPDATE( dotrikun );
	29	VIDEO_START( dotrikun );
28	30	WRITE8_HANDLER( dotrikun_color_w );
29	31
	32	/*--------------------  Address / I/O Maps  --------------------*/
30	33
31		static ADDRESS_MAP_START( readmem, ADDRESS_SPACE_PROGRAM, 8 )
32		AM_RANGE(0x0000, 0x3fff) AM_READ(SMH_ROM)
33		AM_RANGE(0x8000, 0x87ff) AM_READ(SMH_RAM)
	34	static ADDRESS_MAP_START( dotrikun_map, ADDRESS_SPACE_PROGRAM, 8 )
	35	AM_RANGE(0x0000, 0x3fff) AM_ROM
	36	AM_RANGE(0x8000, 0x87ff) AM_RAM AM_BASE(&videoram) AM_SIZE(&videoram_size)
34	37	ADDRESS_MAP_END
35	38
36		static ADDRESS_MAP_START( writemem, ADDRESS_SPACE_PROGRAM, 8 )
37		AM_RANGE(0x0000, 0x3fff) AM_WRITE(SMH_ROM)
38		AM_RANGE(0x8000, 0x87ff) AM_WRITE(SMH_RAM) AM_BASE(&videoram) AM_SIZE(&videoram_size)
39		ADDRESS_MAP_END
40
41
42	39	static ADDRESS_MAP_START( io_map, ADDRESS_SPACE_IO, 8 )
43	40	ADDRESS_MAP_GLOBAL_MASK(0xff)
44	41	AM_RANGE(0x00, 0x00) AM_READ_PORT("INPUTS") AM_WRITE(dotrikun_color_w)
45	42	ADDRESS_MAP_END
46	43
	44	/*--------------------------  Inputs  --------------------------*/
	45
47	46	static INPUT_PORTS_START( dotrikun )
48	47	PORT_START("INPUTS")
49	48	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_UP )
r4679	r4680
56	55	PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_COIN1 )
57	56	INPUT_PORTS_END
58	57
	58	/*-------------------------  Machine  --------------------------*/
59	59
60	60	static MACHINE_DRIVER_START( dotrikun )
61	61
62	62	/* basic machine hardware */
63	63	MDRV_CPU_ADD("maincpu", Z80, 4000000)       /* 4 MHz */
64		MDRV_CPU_PROGRAM_MAP(readmem,writemem)
	64	MDRV_CPU_PROGRAM_MAP(dotrikun_map,0)
65	65	MDRV_CPU_IO_MAP(io_map,0)
66	66	MDRV_CPU_VBLANK_INT("screen", irq0_line_hold)
67	67
68	68	/* video hardware */
69	69	MDRV_VIDEO_UPDATE(dotrikun)
	70	MDRV_VIDEO_START(dotrikun)
70	71
71	72	MDRV_SCREEN_ADD("screen", RASTER)
72	73	MDRV_SCREEN_REFRESH_RATE(60)
r4679	r4680
96	97	ROM_END
97	98
98	99
99		GAME( 1990, dotrikun, 0,        dotrikun, dotrikun, 0, ROT0, "Sega", "Dottori Kun (new version)", GAME_NO_SOUND )
100		GAME( 1990, dotriku2, dotrikun, dotrikun, dotrikun, 0, ROT0, "Sega", "Dottori Kun (old version)", GAME_NO_SOUND )
	100	GAME( 1990, dotrikun, 0,        dotrikun, dotrikun, 0, ROT0, "Sega", "Dottori Kun (new version)", GAME_SUPPORTS_SAVE | GAME_NO_SOUND )
	101	GAME( 1990, dotriku2, dotrikun, dotrikun, dotrikun, 0, ROT0, "Sega", "Dottori Kun (old version)", GAME_SUPPORTS_SAVE | GAME_NO_SOUND )
101	102

src/mame/drivers/meadows.c

r4679	r4680
209	209
210	210	static INPUT_CHANGED( coin_inserted )
211	211	{
212		cpu_set_input_line_and_vector(field->port->machine->cpu[0], 0, (newval ? ASSERT_LINE : CLEAR_LINE), 0x82);
	212	cputag_set_input_line_and_vector(field->port->machine, "maincpu", 0, (newval ? ASSERT_LINE : CLEAR_LINE), 0x82);
213	213	}
214	214
215	215

src/mame/drivers/megaplay.c

r4679	r4680
41	41
42	42	#include "driver.h"
43	43	#include "cpu/z80/z80.h"
	44	#include "sound/sn76496.h"
	45
44	46	#include "deprecat.h"
45	47	#include "genesis.h"
46	48	#include "megadriv.h"
r4679	r4680
633	635	static WRITE8_HANDLER( megaplay_bios_6404_w )
634	636	{
635	637	if(((bios_6404 & 0x0c) == 0x00) && ((data & 0x0c) == 0x0c))
636		cpu_set_input_line(space->machine->cpu[0], INPUT_LINE_RESET, PULSE_LINE);
	638	cputag_set_input_line(space->machine, "maincpu", INPUT_LINE_RESET, PULSE_LINE);
637	639	bios_6404 = data;
638	640
639	641	//  logerror("BIOS: 0x6404 write: 0x%02x\n",data);
r4679	r4680
992	994	static DRIVER_INIT (megaplay)
993	995	{
994	996	/* to support the old code.. */
995		ic36_ram = auto_malloc(0x10000);
996		ic37_ram = auto_malloc(0x10000);
997		genesis_io_ram = auto_malloc(0x20);
	997	ic36_ram = auto_alloc_array(machine, UINT16, 0x10000/2);
	998	ic37_ram = auto_alloc_array(machine, UINT8, 0x10000);
	999	genesis_io_ram = auto_alloc_array(machine, UINT16, 0x20/2);
998	1000
999	1001	DRIVER_INIT_CALL(megadrij);
1000	1002	megplay_stat(machine);
1001	1003
1002	1004	/* for now ... */
1003		memory_install_readwrite16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xa10000, 0xa1001f, 0, 0, OLD_megaplay_genesis_io_r, OLD_megaplay_genesis_io_w);
	1005	memory_install_readwrite16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xa10000, 0xa1001f, 0, 0, OLD_megaplay_genesis_io_r, OLD_megaplay_genesis_io_w);
1004	1006
1005	1007	/* megaplay has ram shared with the bios cpu here */
1006		memory_install_readwrite8_handler(cpu_get_address_space(machine->cpu[1], ADDRESS_SPACE_PROGRAM), 0x2000, 0x3fff, 0, 0, SMH_BANK7, SMH_BANK7);
	1008	memory_install_readwrite8_handler(cputag_get_address_space(machine, "genesis_snd_z80", ADDRESS_SPACE_PROGRAM), 0x2000, 0x3fff, 0, 0, (read8_space_func)SMH_BANK(7), (write8_space_func)SMH_BANK(7));
1007	1009	memory_set_bankptr(machine, 7, &ic36_ram[0]);
1008	1010
1009	1011	/* instead of a RAM mirror the 68k sees the extra ram of the 2nd z80 too */
1010		memory_install_readwrite16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xa02000, 0xa03fff, 0, 0, megadriv_68k_read_z80_extra_ram, megadriv_68k_write_z80_extra_ram);
	1012	memory_install_readwrite16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xa02000, 0xa03fff, 0, 0, megadriv_68k_read_z80_extra_ram, megadriv_68k_write_z80_extra_ram);
1011	1013	}
1012	1014
1013	1015	/*

src/mame/drivers/srmp2.c

r4679	r4680
14	14
15	15	Supported games :
16	16	==================
	17	Super Real Mahjong Part1     (C) 1987 Seta
17	18	Super Real Mahjong Part2     (C) 1987 Seta
18	19	Super Real Mahjong Part3     (C) 1988 Seta
19	20	Mahjong Yuugi (set 1)        (C) 1990 Visco
r4679	r4680
22	23	Mahjong Pon Chin Kan (set 2) (C) 1991 Visco
23	24
24	25
25		Not supported game :
26		=====================
27		Super Real Mahjong Part1 (not dumped)
28
29
30	26	System specs :
31	27	===============
32	28	CPU       : 68000 (8MHz)
r4679	r4680
386	382	**************************************************************************/
387	383
388	384
389		static ADDRESS_MAP_START( srmp2_readmem, ADDRESS_SPACE_PROGRAM, 16 )
390		AM_RANGE(0x000000, 0x03ffff) AM_READ(SMH_ROM)
391		AM_RANGE(0x0c0000, 0x0c3fff) AM_READ(SMH_RAM)
392		AM_RANGE(0x140000, 0x143fff) AM_READ(SMH_RAM)            /* Sprites Code + X + Attr */
393		AM_RANGE(0x180000, 0x180607) AM_READ(SMH_RAM)            /* Sprites Y */
394		AM_RANGE(0x900000, 0x900001) AM_READ_PORT("SYSTEM")         /* Coinage */
395		AM_RANGE(0xa00000, 0xa00001) AM_READ(srmp2_input_1_r)      /* I/O port 1 */
396		AM_RANGE(0xa00002, 0xa00003) AM_READ(srmp2_input_2_r)      /* I/O port 2 */
	385	static ADDRESS_MAP_START( srmp2_map, ADDRESS_SPACE_PROGRAM, 16 )
	386	AM_RANGE(0x000000, 0x03ffff) AM_ROM
	387	AM_RANGE(0x0c0000, 0x0c3fff) AM_RAM AM_BASE(&generic_nvram16) AM_SIZE(&generic_nvram_size)
	388	AM_RANGE(0x140000, 0x143fff) AM_RAM AM_BASE(&spriteram16_2)      /* Sprites Code + X + Attr */
	389	AM_RANGE(0x180000, 0x180609) AM_RAM AM_BASE(&spriteram16)      /* Sprites Y */
	390	AM_RANGE(0x1c0000, 0x1c0001) AM_WRITENOP                  /* ??? */
	391	AM_RANGE(0x800000, 0x800001) AM_WRITE(srmp2_flags_w)         /* ADPCM bank, Color bank, etc. */
	392	AM_RANGE(0x900000, 0x900001) AM_READ_PORT("SYSTEM")            /* Coinage */
	393	AM_RANGE(0x900000, 0x900001) AM_WRITENOP                  /* ??? */
	394	AM_RANGE(0xa00000, 0xa00001) AM_READWRITE(srmp2_input_1_r,srmp2_input_1_w)   /* I/O port 1 */
	395	AM_RANGE(0xa00002, 0xa00003) AM_READWRITE(srmp2_input_2_r,srmp2_input_2_w)   /* I/O port 2 */
397	396	AM_RANGE(0xb00000, 0xb00001) AM_READ(srmp2_cchip_status_0_r)   /* Custom chip status ??? */
	397	AM_RANGE(0xb00000, 0xb00001) AM_DEVWRITE("msm", srmp2_adpcm_code_w)   /* ADPCM number */
398	398	AM_RANGE(0xb00002, 0xb00003) AM_READ(srmp2_cchip_status_1_r)   /* Custom chip status ??? */
	399	AM_RANGE(0xc00000, 0xc00001) AM_WRITENOP                  /* ??? */
	400	AM_RANGE(0xd00000, 0xd00001) AM_WRITENOP                  /* ??? */
	401	AM_RANGE(0xe00000, 0xe00001) AM_WRITENOP                  /* ??? */
399	402	AM_RANGE(0xf00000, 0xf00001) AM_DEVREAD8("ay", ay8910_r, 0x00ff)
400		ADDRESS_MAP_END
401
402		static ADDRESS_MAP_START( srmp2_writemem, ADDRESS_SPACE_PROGRAM, 16 )
403		AM_RANGE(0x000000, 0x03ffff) AM_WRITE(SMH_ROM)
404		AM_RANGE(0x0c0000, 0x0c3fff) AM_WRITE(SMH_RAM) AM_BASE(&generic_nvram16) AM_SIZE(&generic_nvram_size)
405		AM_RANGE(0x140000, 0x143fff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16_2)   /* Sprites Code + X + Attr */
406		AM_RANGE(0x180000, 0x180609) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16)   /* Sprites Y */
407		AM_RANGE(0x1c0000, 0x1c0001) AM_WRITENOP               /* ??? */
408		AM_RANGE(0x800000, 0x800001) AM_WRITE(srmp2_flags_w)            /* ADPCM bank, Color bank, etc. */
409		AM_RANGE(0x900000, 0x900001) AM_WRITENOP               /* ??? */
410		AM_RANGE(0xa00000, 0xa00001) AM_WRITE(srmp2_input_1_w)         /* I/O ??? */
411		AM_RANGE(0xa00002, 0xa00003) AM_WRITE(srmp2_input_2_w)         /* I/O ??? */
412		AM_RANGE(0xb00000, 0xb00001) AM_DEVWRITE("msm", srmp2_adpcm_code_w)         /* ADPCM number */
413		AM_RANGE(0xc00000, 0xc00001) AM_WRITENOP               /* ??? */
414		AM_RANGE(0xd00000, 0xd00001) AM_WRITENOP               /* ??? */
415		AM_RANGE(0xe00000, 0xe00001) AM_WRITENOP               /* ??? */
416	403	AM_RANGE(0xf00000, 0xf00003) AM_DEVWRITE8("ay", ay8910_address_data_w, 0x00ff)
417	404	ADDRESS_MAP_END
418	405
419	406
420		static ADDRESS_MAP_START( mjyuugi_readmem, ADDRESS_SPACE_PROGRAM, 16 )
421		AM_RANGE(0x000000, 0x07ffff) AM_READ(SMH_ROM)
422		AM_RANGE(0x100000, 0x100001) AM_READ_PORT("SYSTEM")         /* Coinage */
423		AM_RANGE(0x100010, 0x100011) AM_READNOP            /* ??? */
424		AM_RANGE(0x200000, 0x200001) AM_READNOP            /* ??? */
425		AM_RANGE(0x300000, 0x300001) AM_READNOP            /* ??? */
426		AM_RANGE(0x500000, 0x500001) AM_READ_PORT("DSW3-1")         /* DSW 3-1 */
427		AM_RANGE(0x500010, 0x500011) AM_READ_PORT("DSW3-2")         /* DSW 3-2 */
428		AM_RANGE(0x700000, 0x7003ff) AM_READ(SMH_RAM)
	407	static ADDRESS_MAP_START( mjyuugi_map, ADDRESS_SPACE_PROGRAM, 16 )
	408	AM_RANGE(0x000000, 0x07ffff) AM_ROM
	409	AM_RANGE(0x100000, 0x100001) AM_READ_PORT("SYSTEM")            /* Coinage */
	410	AM_RANGE(0x100000, 0x100001) AM_WRITE(mjyuugi_flags_w)         /* Coin Counter */
	411	AM_RANGE(0x100010, 0x100011) AM_READNOP                     /* ??? */
	412	AM_RANGE(0x100010, 0x100011) AM_WRITE(mjyuugi_adpcm_bank_w)      /* ADPCM bank, GFX bank */
	413	AM_RANGE(0x200000, 0x200001) AM_READNOP                     /* ??? */
	414	AM_RANGE(0x300000, 0x300001) AM_READNOP                     /* ??? */
	415	AM_RANGE(0x500000, 0x500001) AM_READ_PORT("DSW3-1")            /* DSW 3-1 */
	416	AM_RANGE(0x500010, 0x500011) AM_READ_PORT("DSW3-2")            /* DSW 3-2 */
	417	AM_RANGE(0x700000, 0x7003ff) AM_RAM_WRITE(paletteram16_xRRRRRGGGGGBBBBB_word_w) AM_BASE(&paletteram16)
429	418	AM_RANGE(0x800000, 0x800001) AM_READNOP            /* ??? */
430		AM_RANGE(0x900000, 0x900001) AM_READ(srmp2_input_1_r)      /* I/O port 1 */
431		AM_RANGE(0x900002, 0x900003) AM_READ(srmp2_input_2_r)      /* I/O port 2 */
	419	AM_RANGE(0x900000, 0x900001) AM_READWRITE(srmp2_input_1_r,srmp2_input_1_w)      /* I/O port 1 */
	420	AM_RANGE(0x900002, 0x900003) AM_READWRITE(srmp2_input_2_r,srmp2_input_2_w)      /* I/O port 2 */
432	421	AM_RANGE(0xa00000, 0xa00001) AM_READ(srmp2_cchip_status_0_r)   /* custom chip status ??? */
	422	AM_RANGE(0xa00000, 0xa00001) AM_DEVWRITE("msm", srmp2_adpcm_code_w)         /* ADPCM number */
433	423	AM_RANGE(0xa00002, 0xa00003) AM_READ(srmp2_cchip_status_1_r)   /* custom chip status ??? */
434	424	AM_RANGE(0xb00000, 0xb00001) AM_DEVREAD8("ay", ay8910_r, 0x00ff)
435		AM_RANGE(0xd00000, 0xd00609) AM_READ(SMH_RAM)            /* Sprites Y */
436		AM_RANGE(0xd02000, 0xd023ff) AM_READ(SMH_RAM)            /* ??? */
437		AM_RANGE(0xe00000, 0xe03fff) AM_READ(SMH_RAM)            /* Sprites Code + X + Attr */
438		AM_RANGE(0xffc000, 0xffffff) AM_READ(SMH_RAM)
439		ADDRESS_MAP_END
440
441		static ADDRESS_MAP_START( mjyuugi_writemem, ADDRESS_SPACE_PROGRAM, 16 )
442		AM_RANGE(0x000000, 0x07ffff) AM_WRITE(SMH_ROM)
443		AM_RANGE(0x100000, 0x100001) AM_WRITE(mjyuugi_flags_w)         /* Coin Counter */
444		AM_RANGE(0x100010, 0x100011) AM_WRITE(mjyuugi_adpcm_bank_w)      /* ADPCM bank, GFX bank */
445		AM_RANGE(0x700000, 0x7003ff) AM_WRITE(paletteram16_xRRRRRGGGGGBBBBB_word_w) AM_BASE(&paletteram16)
446		AM_RANGE(0x900000, 0x900001) AM_WRITE(srmp2_input_1_w)         /* I/O ??? */
447		AM_RANGE(0x900002, 0x900003) AM_WRITE(srmp2_input_2_w)         /* I/O ??? */
448		AM_RANGE(0xa00000, 0xa00001) AM_DEVWRITE("msm", srmp2_adpcm_code_w)         /* ADPCM number */
449	425	AM_RANGE(0xb00000, 0xb00003) AM_DEVWRITE8("ay", ay8910_address_data_w, 0x00ff)
450	426	AM_RANGE(0xc00000, 0xc00001) AM_WRITENOP               /* ??? */
451		AM_RANGE(0xd00000, 0xd00609) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16)   /* Sprites Y */
452		AM_RANGE(0xd02000, 0xd023ff) AM_WRITE(SMH_RAM)               /* ??? only writes $00fa */
453		AM_RANGE(0xe00000, 0xe03fff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16_2)   /* Sprites Code + X + Attr */
454		AM_RANGE(0xffc000, 0xffffff) AM_WRITE(SMH_RAM) AM_BASE(&generic_nvram16) AM_SIZE(&generic_nvram_size)
	427	AM_RANGE(0xd00000, 0xd00609) AM_RAM AM_BASE(&spriteram16)   /* Sprites Y */
	428	AM_RANGE(0xd02000, 0xd023ff) AM_RAM                     /* ??? only writes $00fa */
	429	AM_RANGE(0xe00000, 0xe03fff) AM_RAM   AM_BASE(&spriteram16_2)   /* Sprites Code + X + Attr */
	430	AM_RANGE(0xffc000, 0xffffff) AM_RAM AM_BASE(&generic_nvram16) AM_SIZE(&generic_nvram_size)
455	431	ADDRESS_MAP_END
456	432
457	433
r4679	r4680
562	538	}
563	539
564	540
565		static ADDRESS_MAP_START( srmp3_readmem, ADDRESS_SPACE_PROGRAM, 8 )
566		AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM)
567		AM_RANGE(0x8000, 0x9fff) AM_READ(SMH_BANK1)                  /* rom bank */
568		AM_RANGE(0xa000, 0xa7ff) AM_READ(SMH_RAM)                  /* work ram */
569		AM_RANGE(0xb000, 0xb303) AM_READ(SMH_RAM)                  /* Sprites Y */
570		AM_RANGE(0xc000, 0xdfff) AM_READ(SMH_RAM)                  /* Sprites Code + X + Attr */
571		AM_RANGE(0xe000, 0xffff) AM_READ(SMH_RAM)
	541	static ADDRESS_MAP_START( srmp3_map, ADDRESS_SPACE_PROGRAM, 8 )
	542	AM_RANGE(0x0000, 0x7fff) AM_ROM
	543	AM_RANGE(0x8000, 0x9fff) AM_ROMBANK(1)                     /* rom bank */
	544	AM_RANGE(0xa000, 0xa7ff) AM_RAM AM_BASE(&generic_nvram) AM_SIZE(&generic_nvram_size)   /* work ram */
	545	AM_RANGE(0xa800, 0xa800) AM_WRITENOP                     /* flag ? */
	546	AM_RANGE(0xb000, 0xb303) AM_RAM AM_BASE(&spriteram)            /* Sprites Y */
	547	AM_RANGE(0xb800, 0xb800) AM_WRITENOP                     /* flag ? */
	548	AM_RANGE(0xc000, 0xdfff) AM_RAM AM_BASE(&spriteram_2)         /* Sprites Code + X + Attr */
	549	AM_RANGE(0xe000, 0xffff) AM_RAM AM_BASE(&spriteram_3)
572	550	ADDRESS_MAP_END
573	551
574		static ADDRESS_MAP_START( srmp3_writemem, ADDRESS_SPACE_PROGRAM, 8 )
575		AM_RANGE(0x0000, 0x7fff) AM_WRITE(SMH_ROM)
576		AM_RANGE(0x8000, 0x9fff) AM_WRITE(SMH_ROM)                  /* rom bank */
577		AM_RANGE(0xa000, 0xa7ff) AM_WRITE(SMH_RAM) AM_BASE(&generic_nvram) AM_SIZE(&generic_nvram_size)   /* work ram */
578		AM_RANGE(0xa800, 0xa800) AM_WRITENOP                  /* flag ? */
579		AM_RANGE(0xb000, 0xb303) AM_WRITE(SMH_RAM) AM_BASE(&spriteram)         /* Sprites Y */
580		AM_RANGE(0xb800, 0xb800) AM_WRITENOP                  /* flag ? */
581		AM_RANGE(0xc000, 0xdfff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram_2)         /* Sprites Code + X + Attr */
582		AM_RANGE(0xe000, 0xffff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram_3)
583		ADDRESS_MAP_END
584
585	552	static ADDRESS_MAP_START( srmp3_io_map, ADDRESS_SPACE_IO, 8 )
586	553	ADDRESS_MAP_GLOBAL_MASK(0xff)
587	554	AM_RANGE(0x20, 0x20) AM_WRITENOP                        /* elapsed interrupt signal */
r4679	r4680
1059	1026
1060	1027	/* basic machine hardware */
1061	1028	MDRV_CPU_ADD("maincpu", M68000,16000000/2)            /* 8.00 MHz */
1062		MDRV_CPU_PROGRAM_MAP(srmp2_readmem,srmp2_writemem)
	1029	MDRV_CPU_PROGRAM_MAP(srmp2_map,0)
1063	1030	MDRV_CPU_VBLANK_INT_HACK(srmp2_interrupt,16)      /* Interrupt times is not understood */
1064	1031
1065	1032	MDRV_MACHINE_RESET(srmp2)
r4679	r4680
1098	1065
1099	1066	MDRV_CPU_ADD("maincpu", Z80, 3500000)      /* 3.50 MHz ? */
1100	1067	//      4000000,                /* 4.00 MHz ? */
1101		MDRV_CPU_PROGRAM_MAP(srmp3_readmem,srmp3_writemem)
	1068	MDRV_CPU_PROGRAM_MAP(srmp3_map,0)
1102	1069	MDRV_CPU_IO_MAP(srmp3_io_map,0)
1103	1070	MDRV_CPU_VBLANK_INT("screen", irq0_line_hold)
1104	1071
r4679	r4680
1136	1103
1137	1104	/* basic machine hardware */
1138	1105	MDRV_CPU_ADD("maincpu", M68000,16000000/2)            /* 8.00 MHz */
1139		MDRV_CPU_PROGRAM_MAP(mjyuugi_readmem,mjyuugi_writemem)
	1106	MDRV_CPU_PROGRAM_MAP(mjyuugi_map,0)
1140	1107	MDRV_CPU_VBLANK_INT_HACK(srmp2_interrupt,16)      /* Interrupt times is not understood */
1141	1108
1142	1109	MDRV_MACHINE_RESET(srmp2)

src/mame/drivers/m72.c

r4679	r4680
190	190	{
191	191	UINT16 val = ((UINT32) param) & 0xffff;
192	192	UINT16 offset = (((UINT32) param) >> 16) & 0xffff;
193		UINT16 *ram = ptr;
	193	UINT16 *ram = (UINT16 *)ptr;
194	194
195	195	ram[offset] = val;
196	196	}
r4679	r4680
327	327	const address_space *sndio = cputag_get_address_space(machine, "soundcpu", ADDRESS_SPACE_IO);
328	328	const device_config *dac = devtag_get_device(machine, "dac");
329	329
330		protection_ram = auto_malloc(0x10000);
331		memory_install_read16_handler(program, 0xb0000, 0xbffff, 0, 0, SMH_BANK1);
	330	protection_ram = auto_alloc_array(machine, UINT16, 0x10000/2);
	331	memory_install_read16_handler(program, 0xb0000, 0xbffff, 0, 0, (read16_space_func)SMH_BANK(1));
332	332	memory_install_write16_handler(program, 0xb0000, 0xb0fff, 0, 0, m72_main_mcu_w);
333	333	memory_set_bankptr(machine, 1, protection_ram);
334	334
r4679	r4680
697	697
698	698	static void install_protection_handler(running_machine *machine, const UINT8 *code,const UINT8 *crc)
699	699	{
700		protection_ram = auto_malloc(0x1000);
	700	protection_ram = auto_alloc_array(machine, UINT16, 0x1000/2);
701	701	protection_code = code;
702	702	protection_crc =  crc;
703		memory_install_read16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xb0000, 0xb0fff, 0, 0, SMH_BANK1);
704		memory_install_read16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xb0ffa, 0xb0ffb, 0, 0, protection_r);
705		memory_install_write16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xb0000, 0xb0fff, 0, 0, protection_w);
	703	memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xb0000, 0xb0fff, 0, 0, (read16_space_func)SMH_BANK(1));
	704	memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xb0ffa, 0xb0ffb, 0, 0, protection_r);
	705	memory_install_write16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xb0000, 0xb0fff, 0, 0, protection_w);
706	706	memory_set_bankptr(machine, 1, protection_ram);
707	707	}
708	708
r4679	r4680
710	710	{
711	711	install_protection_handler(machine, bchopper_code,bchopper_crc);
712	712
713		memory_install_write16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_IO), 0xc0, 0xc1, 0, 0, bchopper_sample_trigger_w);
	713	memory_install_write16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_IO), 0xc0, 0xc1, 0, 0, bchopper_sample_trigger_w);
714	714	}
715	715
716	716	static DRIVER_INIT( mrheli )
717	717	{
718	718	install_protection_handler(machine, bchopper_code,mrheli_crc);
719	719
720		memory_install_write16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_IO), 0xc0, 0xc1, 0, 0, bchopper_sample_trigger_w);
	720	memory_install_write16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_IO), 0xc0, 0xc1, 0, 0, bchopper_sample_trigger_w);
721	721	}
722	722
723	723	static DRIVER_INIT( nspirit )
724	724	{
725	725	install_protection_handler(machine, nspirit_code,nspirit_crc);
726	726
727		memory_install_write16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_IO), 0xc0, 0xc1, 0, 0, nspirit_sample_trigger_w);
	727	memory_install_write16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_IO), 0xc0, 0xc1, 0, 0, nspirit_sample_trigger_w);
728	728	}
729	729
730	730	static DRIVER_INIT( nspiritj )
731	731	{
732	732	install_protection_handler(machine, nspirit_code,nspiritj_crc);
733	733
734		memory_install_write16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_IO), 0xc0, 0xc1, 0, 0, nspirit_sample_trigger_w);
	734	memory_install_write16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_IO), 0xc0, 0xc1, 0, 0, nspirit_sample_trigger_w);
735	735	}
736	736
737	737	static DRIVER_INIT( imgfight )
738	738	{
739	739	install_protection_handler(machine, imgfight_code,imgfight_crc);
740	740
741		memory_install_write16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_IO), 0xc0, 0xc1, 0, 0, imgfight_sample_trigger_w);
	741	memory_install_write16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_IO), 0xc0, 0xc1, 0, 0, imgfight_sample_trigger_w);
742	742	}
743	743
744	744	static DRIVER_INIT( loht )
745	745	{
746	746	install_protection_handler(machine, loht_code,loht_crc);
747	747
748		memory_install_write16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_IO), 0xc0, 0xc1, 0, 0, loht_sample_trigger_w);
	748	memory_install_write16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_IO), 0xc0, 0xc1, 0, 0, loht_sample_trigger_w);
749	749
750	750	/* since we skip the startup tests, clear video RAM to prevent garbage on title screen */
751	751	memset(m72_videoram2,0,0x4000);
r4679	r4680
755	755	{
756	756	install_protection_handler(machine, xmultipl_code,xmultipl_crc);
757	757
758		memory_install_write16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_IO), 0xc0, 0xc1, 0, 0, xmultipl_sample_trigger_w);
	758	memory_install_write16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_IO), 0xc0, 0xc1, 0, 0, xmultipl_sample_trigger_w);
759	759	}
760	760
761	761	static DRIVER_INIT( dbreed72 )
762	762	{
763	763	install_protection_handler(machine, dbreed72_code,dbreed72_crc);
764	764
765		memory_install_write16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_IO), 0xc0, 0xc1, 0, 0, dbreed72_sample_trigger_w);
	765	memory_install_write16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_IO), 0xc0, 0xc1, 0, 0, dbreed72_sample_trigger_w);
766	766	}
767	767
768	768	static DRIVER_INIT( airduel )
769	769	{
770	770	install_protection_handler(machine, airduel_code,airduel_crc);
771	771
772		memory_install_write16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_IO), 0xc0, 0xc1, 0, 0, airduel_sample_trigger_w);
	772	memory_install_write16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_IO), 0xc0, 0xc1, 0, 0, airduel_sample_trigger_w);
773	773	}
774	774
775	775	static DRIVER_INIT( dkgenm72 )
776	776	{
777	777	install_protection_handler(machine, dkgenm72_code,dkgenm72_crc);
778	778
779		memory_install_write16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_IO), 0xc0, 0xc1, 0, 0, dkgenm72_sample_trigger_w);
	779	memory_install_write16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_IO), 0xc0, 0xc1, 0, 0, dkgenm72_sample_trigger_w);
780	780	}
781	781
782	782	static DRIVER_INIT( gallop )
783	783	{
784		memory_install_write16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_IO), 0xc0, 0xc1, 0, 0, gallop_sample_trigger_w);
	784	memory_install_write16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_IO), 0xc0, 0xc1, 0, 0, gallop_sample_trigger_w);
785	785	}
786	786
787	787

src/mame/drivers/r2dtank.c

r4679	r4680
78	78	int combined_state = pia6821_get_irq_a(pia0) | pia6821_get_irq_b(pia0) |
79	79	pia6821_get_irq_a(pia1) | pia6821_get_irq_b(pia1);
80	80
81		cpu_set_input_line(device->machine->cpu[0], M6809_IRQ_LINE,  combined_state ? ASSERT_LINE : CLEAR_LINE);
	81	cputag_set_input_line(device->machine, "maincpu", M6809_IRQ_LINE,  combined_state ? ASSERT_LINE : CLEAR_LINE);
82	82	}
83	83
84	84
r4679	r4680
102	102	static WRITE8_HANDLER( audio_command_w )
103	103	{
104	104	soundlatch_w(space, 0, ~data);
105		cpu_set_input_line(space->machine->cpu[1], M6800_IRQ_LINE, HOLD_LINE);
	105	cputag_set_input_line(space->machine, "audiocpu", M6800_IRQ_LINE, HOLD_LINE);
106	106
107	107	if (LOG_AUDIO_COMM) logerror("%08X   CPU#0  Audio Command Write: %x\n", cpu_get_pc(space->cpu), data^0xff);
108	108	}
r4679	r4680
124	124	data = 0x00;
125	125
126	126	soundlatch2_w(space, 0, data);
127		cpu_set_input_line(space->machine->cpu[0], M6809_IRQ_LINE, HOLD_LINE);
	127	cputag_set_input_line(space->machine, "maincpu", M6809_IRQ_LINE, HOLD_LINE);
128	128
129	129	if (LOG_AUDIO_COMM) logerror("%08X  CPU#1  Audio Answer Write: %x\n", cpu_get_pc(space->cpu), data);
130	130	}

src/mame/drivers/ohmygod.c

r4679	r4680
28	28
29	29	static int adpcm_bank_shift;
30	30	static int sndbank;
31		static int nosound_kludge_step;
32	31
33	32	static MACHINE_RESET( ohmygod )
34	33	{
r4679	r4680
36	35
37	36	sndbank = 0;
38	37	memcpy(rom + 0x20000,rom + 0x40000 + 0x20000 * sndbank,0x20000);
39
40		nosound_kludge_step = 0;
41	38	}
42	39
43	40	static WRITE16_HANDLER( ohmygod_ctrl_w )
r4679	r4680
60	57	}
61	58	}
62	59
63		static ADDRESS_MAP_START( readmem, ADDRESS_SPACE_PROGRAM, 16 )
64		AM_RANGE(0x000000, 0x07ffff) AM_READ(SMH_ROM)
65		AM_RANGE(0x300000, 0x303fff) AM_READ(SMH_RAM)
66		AM_RANGE(0x304000, 0x307fff) AM_READ(SMH_RAM)
67		AM_RANGE(0x308000, 0x30ffff) AM_READ(SMH_RAM)
68		AM_RANGE(0x600000, 0x6007ff) AM_READ(SMH_RAM)
69		AM_RANGE(0x700000, 0x703fff) AM_READ(SMH_RAM)
70		AM_RANGE(0x704000, 0x707fff) AM_READ(SMH_RAM)
71		AM_RANGE(0x708000, 0x70ffff) AM_READ(SMH_RAM)
	60	static ADDRESS_MAP_START( ohmygod_map, ADDRESS_SPACE_PROGRAM, 16 )
	61	AM_RANGE(0x000000, 0x07ffff) AM_ROM
	62	AM_RANGE(0x300000, 0x303fff) AM_RAM
	63	AM_RANGE(0x304000, 0x307fff) AM_RAM_WRITE(ohmygod_videoram_w) AM_BASE(&ohmygod_videoram)
	64	AM_RANGE(0x308000, 0x30ffff) AM_RAM
	65	AM_RANGE(0x400000, 0x400001) AM_WRITE(ohmygod_scrollx_w)
	66	AM_RANGE(0x400002, 0x400003) AM_WRITE(ohmygod_scrolly_w)
	67	AM_RANGE(0x600000, 0x6007ff) AM_RAM_WRITE(paletteram16_xGGGGGRRRRRBBBBB_word_w) AM_BASE(&paletteram16)
	68	AM_RANGE(0x700000, 0x703fff) AM_RAM AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)
	69	AM_RANGE(0x704000, 0x707fff) AM_RAM
	70	AM_RANGE(0x708000, 0x70ffff) AM_RAM    /* Work RAM */
72	71	AM_RANGE(0x800000, 0x800001) AM_READ_PORT("P1")
73	72	AM_RANGE(0x800002, 0x800003) AM_READ_PORT("P2")
	73	AM_RANGE(0x900000, 0x900001) AM_WRITE(ohmygod_ctrl_w)
74	74	AM_RANGE(0xa00000, 0xa00001) AM_READ_PORT("DSW1")
75	75	AM_RANGE(0xa00002, 0xa00003) AM_READ_PORT("DSW2")
76		AM_RANGE(0xb00000, 0xb00001) AM_DEVREAD8("oki", okim6295_r, 0x00ff)
	76	AM_RANGE(0xb00000, 0xb00001) AM_DEVREADWRITE8("oki", okim6295_r,okim6295_w, 0x00ff)
77	77	AM_RANGE(0xc00000, 0xc00001) AM_READ(watchdog_reset16_r)
78		ADDRESS_MAP_END
79
80		static ADDRESS_MAP_START( writemem, ADDRESS_SPACE_PROGRAM, 16 )
81		AM_RANGE(0x000000, 0x07ffff) AM_WRITE(SMH_ROM)
82		AM_RANGE(0x300000, 0x303fff) AM_WRITE(SMH_RAM)
83		AM_RANGE(0x304000, 0x307fff) AM_WRITE(ohmygod_videoram_w) AM_BASE(&ohmygod_videoram)
84		AM_RANGE(0x308000, 0x30ffff) AM_WRITE(SMH_RAM)
85		AM_RANGE(0x400000, 0x400001) AM_WRITE(ohmygod_scrollx_w)
86		AM_RANGE(0x400002, 0x400003) AM_WRITE(ohmygod_scrolly_w)
87		AM_RANGE(0x600000, 0x6007ff) AM_WRITE(paletteram16_xGGGGGRRRRRBBBBB_word_w) AM_BASE(&paletteram16)
88		AM_RANGE(0x700000, 0x703fff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)
89		AM_RANGE(0x704000, 0x707fff) AM_WRITE(SMH_RAM)
90		AM_RANGE(0x708000, 0x70ffff) AM_WRITE(SMH_RAM)   /* work RAM */
91		AM_RANGE(0x900000, 0x900001) AM_WRITE(ohmygod_ctrl_w)
92		AM_RANGE(0xb00000, 0xb00001) AM_DEVWRITE8("oki", okim6295_w, 0x00ff)
93	78	AM_RANGE(0xd00000, 0xd00001) AM_WRITE(ohmygod_spritebank_w)
94	79	ADDRESS_MAP_END
95	80
96	81
97
98	82	static INPUT_PORTS_START( ohmygod )
99	83	PORT_START("P1")
100	84	PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_PLAYER(1)
r4679	r4680
332	316
333	317	/* basic machine hardware */
334	318	MDRV_CPU_ADD("maincpu", M68000, 12000000)
335		MDRV_CPU_PROGRAM_MAP(readmem,writemem)
	319	MDRV_CPU_PROGRAM_MAP(ohmygod_map,0)
336	320	MDRV_CPU_VBLANK_INT("screen", irq1_line_hold)
337	321
338	322	MDRV_MACHINE_RESET(ohmygod)

src/mame/drivers/pokechmp.c

r4679	r4680
93	93
94	94	static WRITE8_HANDLER( pokechmp_sound_w )
95	95	{
96		soundlatch_w(space,0,data);
97		cpu_set_input_line(space->machine->cpu[1],INPUT_LINE_NMI,PULSE_LINE);
	96	soundlatch_w(space, 0, data);
	97	cputag_set_input_line(space->machine, "audiocpu", INPUT_LINE_NMI, PULSE_LINE);
98	98	}
99	99
100	100
r4679	r4680
111	111	}
112	112
113	113
114		static ADDRESS_MAP_START( readmem, ADDRESS_SPACE_PROGRAM, 8 )
115		AM_RANGE(0x0000, 0x07ff) AM_READ(SMH_RAM)
116		AM_RANGE(0x1800, 0x1800) AM_READ_PORT("P1")
117		AM_RANGE(0x1a00, 0x1a00) AM_READ_PORT("P2")
118		AM_RANGE(0x1c00, 0x1c00) AM_READ_PORT("DSW")
	114	static ADDRESS_MAP_START( pokechmp_map, ADDRESS_SPACE_PROGRAM, 8 )
	115	AM_RANGE(0x0000, 0x07ff) AM_RAM
	116	AM_RANGE(0x0800, 0x0fff) AM_RAM_WRITE(pokechmp_videoram_w) AM_BASE(&videoram)
	117	AM_RANGE(0x1000, 0x11ff) AM_RAM AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
119	118
120		/* Extra on Poke Champ (not on Pocket Gal) */
121		AM_RANGE(0x2000, 0x27ff) AM_READ(SMH_RAM)
122
123		AM_RANGE(0x4000, 0x5fff) AM_READ(SMH_BANK1)
124		AM_RANGE(0x6000, 0x7fff) AM_READ(SMH_BANK2)
125		AM_RANGE(0x8000, 0xffff) AM_READ(SMH_ROM)
126		ADDRESS_MAP_END
127
128		static ADDRESS_MAP_START( writemem, ADDRESS_SPACE_PROGRAM, 8 )
129		AM_RANGE(0x0000, 0x07ff) AM_WRITE(SMH_RAM)
130		AM_RANGE(0x0800, 0x0fff) AM_WRITE(pokechmp_videoram_w) AM_BASE(&videoram)
131		AM_RANGE(0x1000, 0x11ff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
	119	AM_RANGE(0x1800, 0x1800) AM_READ_PORT("P1")
132	120	AM_RANGE(0x1801, 0x1801) AM_WRITE(pokechmp_flipscreen_w)
	121	/* 1800 - 0x181f are unused BAC-06 registers, see video/dec0.c */
133	122	AM_RANGE(0x1802, 0x181f) AM_WRITENOP
134		/* 1800 - 0x181f are unused BAC-06 registers, see video/dec0.c */
135		AM_RANGE(0x1a00, 0x1a00) AM_WRITE(pokechmp_sound_w)
136		AM_RANGE(0x1c00, 0x1c00) AM_WRITE(pokechmp_bank_w)
137	123
	124	AM_RANGE(0x1a00, 0x1a00) AM_READ_PORT("P2") AM_WRITE(pokechmp_sound_w)
	125	AM_RANGE(0x1c00, 0x1c00) AM_READ_PORT("DSW") AM_WRITE(pokechmp_bank_w)
	126
138	127	/* Extra on Poke Champ (not on Pocket Gal) */
139		AM_RANGE(0x2000, 0x27ff) AM_WRITE(pokechmp_paletteram_w) AM_BASE(&paletteram)
	128	AM_RANGE(0x2000, 0x27ff) AM_RAM_WRITE(pokechmp_paletteram_w) AM_BASE(&paletteram)
140	129
141		AM_RANGE(0x4000, 0xffff) AM_WRITE(SMH_ROM)
	130	AM_RANGE(0x4000, 0x5fff) AM_ROMBANK(1)
	131	AM_RANGE(0x6000, 0x7fff) AM_ROMBANK(2)
	132	AM_RANGE(0x8000, 0xffff) AM_ROM
142	133	ADDRESS_MAP_END
143	134
	135
144	136	/***************************************************************************/
145	137
146		static ADDRESS_MAP_START( sound_readmem, ADDRESS_SPACE_PROGRAM, 8 )
147		AM_RANGE(0x0000, 0x07ff) AM_READ(SMH_RAM)
148		AM_RANGE(0x2800, 0x2800) AM_DEVREAD("oki", okim6295_r) // extra
149		AM_RANGE(0x3000, 0x3000) AM_READ(soundlatch_r)
150		//  AM_RANGE(0x3400, 0x3400) AM_READ(pokechmp_adpcm_reset_r)    /* ? not sure */
151		AM_RANGE(0x4000, 0x7fff) AM_READ(SMH_BANK3)
152		AM_RANGE(0x8000, 0xffff) AM_READ(SMH_ROM)
153		ADDRESS_MAP_END
154
155		static ADDRESS_MAP_START( sound_writemem, ADDRESS_SPACE_PROGRAM, 8 )
156		AM_RANGE(0x0000, 0x07ff) AM_WRITE(SMH_RAM)
	138	static ADDRESS_MAP_START( pokechmp_sound_map, ADDRESS_SPACE_PROGRAM, 8 )
	139	AM_RANGE(0x0000, 0x07ff) AM_RAM
157	140	AM_RANGE(0x0800, 0x0801) AM_DEVWRITE("ym1", ym2203_w)
158	141	AM_RANGE(0x1000, 0x1001) AM_DEVWRITE("ym2", ym3812_w)
159	142	AM_RANGE(0x1800, 0x1800) AM_WRITENOP   /* MSM5205 chip on Pocket Gal, not connected here? */
160	143	//  AM_RANGE(0x2000, 0x2000) AM_WRITE(pokechmp_sound_bank_w)/ * might still be sound bank */
161		AM_RANGE(0x2800, 0x2800) AM_DEVWRITE("oki", okim6295_w) // extra
162		AM_RANGE(0x4000, 0xffff) AM_WRITE(SMH_ROM)
	144	AM_RANGE(0x2800, 0x2800) AM_DEVREADWRITE("oki", okim6295_r,okim6295_w) // extra
	145	AM_RANGE(0x3000, 0x3000) AM_READ(soundlatch_r)
	146	//  AM_RANGE(0x3400, 0x3400) AM_READ(pokechmp_adpcm_reset_r)    /* ? not sure */
	147	AM_RANGE(0x4000, 0x7fff) AM_ROMBANK(3)
	148	AM_RANGE(0x8000, 0xffff) AM_ROM
163	149	ADDRESS_MAP_END
164	150
165	151
r4679	r4680
245	231
246	232	/* basic machine hardware */
247	233	MDRV_CPU_ADD("maincpu", M6502, 4000000)
248		MDRV_CPU_PROGRAM_MAP(readmem,writemem)
	234	MDRV_CPU_PROGRAM_MAP(pokechmp_map,0)
249	235	MDRV_CPU_VBLANK_INT("screen", nmi_line_pulse)
250	236
251	237	MDRV_CPU_ADD("audiocpu", M6502, 4000000)
252		MDRV_CPU_PROGRAM_MAP(sound_readmem,sound_writemem)
	238	MDRV_CPU_PROGRAM_MAP(pokechmp_sound_map,0)
253	239	MDRV_CPU_VBLANK_INT("screen", irq0_line_hold)
254	240
255	241	/* video hardware */

src/mame/drivers/snk68.c

r4679	r4680
120	120	if (ACCESSING_BITS_8_15)
121	121	{
122	122	soundlatch_w(space, 0, data >> 8);
123		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_NMI, PULSE_LINE);
	123	cputag_set_input_line(space->machine, "soundcpu", INPUT_LINE_NMI, PULSE_LINE);
124	124	}
125	125	}
126	126
r4679	r4680
587	587
588	588	static void irqhandler(const device_config *device, int irq)
589	589	{
590		cpu_set_input_line(device->machine->cpu[1],0,irq ? ASSERT_LINE : CLEAR_LINE);
	590	cputag_set_input_line(device->machine, "soundcpu", 0, irq ? ASSERT_LINE : CLEAR_LINE);
591	591	}
592	592
593	593	static const ym3812_interface ym3812_config =

src/mame/drivers/madalien.c

r4679	r4680
23	23	static INPUT_CHANGED( coin_inserted )
24	24	{
25	25	/* coin insertion causes an NMI */
26		cpu_set_input_line(field->port->machine->cpu[0], INPUT_LINE_NMI, newval ? CLEAR_LINE : ASSERT_LINE);
	26	cputag_set_input_line(field->port->machine, "maincpu", INPUT_LINE_NMI, newval ? CLEAR_LINE : ASSERT_LINE);
27	27	}
28	28
29	29
r4679	r4680
58	58
59	59	static WRITE8_HANDLER( madalien_sound_command_w )
60	60	{
61		cpu_set_input_line(space->machine->cpu[1], 0, ASSERT_LINE);
	61	cputag_set_input_line(space->machine, "audiocpu", 0, ASSERT_LINE);
62	62	soundlatch_w(space, offset, data);
63	63	}
64	64
65	65
66	66	static READ8_HANDLER(madalien_sound_command_r )
67	67	{
68		cpu_set_input_line(space->machine->cpu[1], 0, CLEAR_LINE);
	68	cputag_set_input_line(space->machine, "audiocpu", 0, CLEAR_LINE);
69	69	return soundlatch_r(space, offset);
70	70	}
71	71

src/mame/drivers/konamigv.c

r4679	r4680
547	547	intelflash_init( machine, 2, FLASH_FUJITSU_29F016A, NULL );
548	548	intelflash_init( machine, 3, FLASH_FUJITSU_29F016A, NULL );
549	549
550		memory_install_readwrite32_handler( cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x1f680080, 0x1f68008f, 0, 0, flash_r, flash_w );
551		memory_install_read32_handler     ( cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x1f6800c0, 0x1f6800c7, 0, 0, trackball_r );
552		memory_install_read32_handler     ( cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x1f6800c8, 0x1f6800cb, 0, 0, unknown_r ); /* ?? */
	550	memory_install_readwrite32_handler( cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x1f680080, 0x1f68008f, 0, 0, flash_r, flash_w );
	551	memory_install_read32_handler     ( cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x1f6800c0, 0x1f6800c7, 0, 0, trackball_r );
	552	memory_install_read32_handler     ( cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x1f6800c8, 0x1f6800cb, 0, 0, unknown_r ); /* ?? */
553	553
554	554	DRIVER_INIT_CALL(konamigv);
555	555	}
r4679	r4680
635	635	{
636	636	intelflash_init( machine, 0, FLASH_SHARP_LH28F400, NULL );
637	637
638		memory_install_readwrite32_handler( cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x1f680080, 0x1f68008f, 0, 0, btc_trackball_r, btc_trackball_w );
639		memory_install_write32_handler    ( cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x1f6800e0, 0x1f6800e3, 0, 0, SMH_NOP );
640		memory_install_readwrite32_handler( cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x1f380000, 0x1f3fffff, 0, 0, btcflash_r, btcflash_w );
	638	memory_install_readwrite32_handler( cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x1f680080, 0x1f68008f, 0, 0, btc_trackball_r, btc_trackball_w );
	639	memory_install_write32_handler    ( cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x1f6800e0, 0x1f6800e3, 0, 0, (write32_space_func)SMH_NOP );
	640	memory_install_readwrite32_handler( cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x1f380000, 0x1f3fffff, 0, 0, btcflash_r, btcflash_w );
641	641
642	642	DRIVER_INIT_CALL(konamigv);
643	643	}
r4679	r4680
691	691
692	692	static DRIVER_INIT( tokimosh )
693	693	{
694		memory_install_read32_handler ( cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x1f680080, 0x1f680083, 0, 0, tokimeki_serial_r );
695		memory_install_write32_handler( cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x1f680090, 0x1f680093, 0, 0, tokimeki_serial_w );
	694	memory_install_read32_handler ( cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x1f680080, 0x1f680083, 0, 0, tokimeki_serial_r );
	695	memory_install_write32_handler( cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x1f680090, 0x1f680093, 0, 0, tokimeki_serial_w );
696	696
697	697	DRIVER_INIT_CALL(konamigv);
698	698	}
r4679	r4680
722	722	{
723	723	intelflash_init( machine, 0, FLASH_SHARP_LH28F400, NULL );
724	724
725		memory_install_read_port_handler  ( cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x1f680080, 0x1f680083, 0, 0, "GUNX1" );
726		memory_install_read_port_handler  ( cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x1f680090, 0x1f680093, 0, 0, "GUNY1" );
727		memory_install_read_port_handler  ( cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x1f6800a0, 0x1f6800a3, 0, 0, "GUNX2" );
728		memory_install_read_port_handler  ( cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x1f6800b0, 0x1f6800b3, 0, 0, "GUNY2" );
729		memory_install_read_port_handler  ( cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x1f6800c0, 0x1f6800c3, 0, 0, "BUTTONS" );
730		memory_install_write32_handler    ( cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x1f6800e0, 0x1f6800e3, 0, 0, kdeadeye_0_w );
731		memory_install_readwrite32_handler( cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x1f380000, 0x1f3fffff, 0, 0, btcflash_r, btcflash_w );
	725	memory_install_read_port_handler  ( cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x1f680080, 0x1f680083, 0, 0, "GUNX1" );
	726	memory_install_read_port_handler  ( cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x1f680090, 0x1f680093, 0, 0, "GUNY1" );
	727	memory_install_read_port_handler  ( cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x1f6800a0, 0x1f6800a3, 0, 0, "GUNX2" );
	728	memory_install_read_port_handler  ( cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x1f6800b0, 0x1f6800b3, 0, 0, "GUNY2" );
	729	memory_install_read_port_handler  ( cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x1f6800c0, 0x1f6800c3, 0, 0, "BUTTONS" );
	730	memory_install_write32_handler    ( cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x1f6800e0, 0x1f6800e3, 0, 0, kdeadeye_0_w );
	731	memory_install_readwrite32_handler( cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x1f380000, 0x1f3fffff, 0, 0, btcflash_r, btcflash_w );
732	732
733	733	DRIVER_INIT_CALL(konamigv);
734	734	}

src/mame/drivers/firetrap.c

r4679	r4680
147	147	if (data==0x26) {
148	148	i8751_current_command=0;
149	149	i8751_return=0xff; /* This value is XOR'd and must equal 0 */
150		cpu_set_input_line_and_vector(space->machine->cpu[0],0,HOLD_LINE,0xff);
	150	cputag_set_input_line_and_vector(space->machine, "maincpu", 0, HOLD_LINE, 0xff);
151	151	return;
152	152	}
153	153
r4679	r4680
194	194	}
195	195
196	196	/* Signal main cpu task is complete */
197		cpu_set_input_line_and_vector(space->machine->cpu[0],0,HOLD_LINE,0xff);
	197	cputag_set_input_line_and_vector(space->machine, "maincpu", 0, HOLD_LINE, 0xff);
198	198	i8751_current_command=data;
199	199	}
200	200
201	201	static WRITE8_HANDLER( firetrap_sound_command_w )
202	202	{
203		soundlatch_w(space,offset,data);
204		cpu_set_input_line(space->machine->cpu[1],INPUT_LINE_NMI,PULSE_LINE);
	203	soundlatch_w(space, offset, data);
	204	cputag_set_input_line(space->machine, "audiocpu", INPUT_LINE_NMI, PULSE_LINE);
205	205	}
206	206
207	207	static WRITE8_HANDLER( firetrap_sound_2400_w )
r4679	r4680
216	216	UINT8 *RAM = memory_region(space->machine, "audiocpu");
217	217
218	218	bankaddress = 0x10000 + (data & 0x01) * 0x4000;
219		memory_set_bankptr(space->machine, 2,&RAM[bankaddress]);
	219	memory_set_bankptr(space->machine, 2, &RAM[bankaddress]);
220	220	}
221	221
222	222	static int msm5205next;
223	223
224	224	static void firetrap_adpcm_int (const device_config *device)
225	225	{
226		static int toggle=0;
	226	static int toggle = 0;
227	227
228		msm5205_data_w (device,msm5205next>>4);
229		msm5205next<<=4;
	228	msm5205_data_w(device, msm5205next >> 4);
	229	msm5205next <<= 4;
230	230
231	231	toggle ^= 1;
232	232	if (firetrap_irq_enable && toggle)
233		cpu_set_input_line (device->machine->cpu[1], M6502_IRQ_LINE, HOLD_LINE);
	233	cputag_set_input_line (device->machine, "audiocpu", M6502_IRQ_LINE, HOLD_LINE);
234	234	}
235	235
236	236	static WRITE8_HANDLER( firetrap_adpcm_data_w )
r4679	r4680
244	244	}
245	245
246	246
247		static ADDRESS_MAP_START( readmem, ADDRESS_SPACE_PROGRAM, 8 )
248		AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM)
249		AM_RANGE(0x8000, 0xbfff) AM_READ(SMH_BANK1)
250		AM_RANGE(0xc000, 0xe97f) AM_READ(SMH_RAM)
251		AM_RANGE(0xf010, 0xf010) AM_READ_PORT("IN0")
252		AM_RANGE(0xf011, 0xf011) AM_READ_PORT("IN1")
253		AM_RANGE(0xf012, 0xf012) AM_READ_PORT("IN2")
254		AM_RANGE(0xf013, 0xf013) AM_READ_PORT("DSW0")
255		AM_RANGE(0xf014, 0xf014) AM_READ_PORT("DSW1")
256		AM_RANGE(0xf016, 0xf016) AM_READ(firetrap_8751_r)
257		ADDRESS_MAP_END
258
259		static ADDRESS_MAP_START( writemem, ADDRESS_SPACE_PROGRAM, 8 )
260		AM_RANGE(0x0000, 0xbfff) AM_WRITE(SMH_ROM)
261		AM_RANGE(0xc000, 0xcfff) AM_WRITE(SMH_RAM)
262		AM_RANGE(0xd000, 0xd7ff) AM_WRITE(firetrap_bg1videoram_w) AM_BASE(&firetrap_bg1videoram)
263		AM_RANGE(0xd800, 0xdfff) AM_WRITE(firetrap_bg2videoram_w) AM_BASE(&firetrap_bg2videoram)
264		AM_RANGE(0xe000, 0xe7ff) AM_WRITE(firetrap_fgvideoram_w) AM_BASE(&firetrap_fgvideoram)
265		AM_RANGE(0xe800, 0xe97f) AM_WRITE(SMH_RAM) AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
	247	static ADDRESS_MAP_START( firetrap_map, ADDRESS_SPACE_PROGRAM, 8 )
	248	AM_RANGE(0x0000, 0x7fff) AM_ROM
	249	AM_RANGE(0x8000, 0xbfff) AM_ROMBANK(1)
	250	AM_RANGE(0xc000, 0xcfff) AM_RAM
	251	AM_RANGE(0xd000, 0xd7ff) AM_RAM_WRITE(firetrap_bg1videoram_w) AM_BASE(&firetrap_bg1videoram)
	252	AM_RANGE(0xd800, 0xdfff) AM_RAM_WRITE(firetrap_bg2videoram_w) AM_BASE(&firetrap_bg2videoram)
	253	AM_RANGE(0xe000, 0xe7ff) AM_RAM_WRITE(firetrap_fgvideoram_w) AM_BASE(&firetrap_fgvideoram)
	254	AM_RANGE(0xe800, 0xe97f) AM_RAM AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
266	255	AM_RANGE(0xf000, 0xf000) AM_WRITENOP   /* IRQ acknowledge */
267	256	AM_RANGE(0xf001, 0xf001) AM_WRITE(firetrap_sound_command_w)
268	257	AM_RANGE(0xf002, 0xf002) AM_WRITE(firetrap_bankselect_w)
r4679	r4680
273	262	AM_RANGE(0xf00a, 0xf00b) AM_WRITE(firetrap_bg1_scrolly_w)
274	263	AM_RANGE(0xf00c, 0xf00d) AM_WRITE(firetrap_bg2_scrollx_w)
275	264	AM_RANGE(0xf00e, 0xf00f) AM_WRITE(firetrap_bg2_scrolly_w)
276		ADDRESS_MAP_END
277
278		static ADDRESS_MAP_START( readmem_bootleg, ADDRESS_SPACE_PROGRAM, 8 )
279		AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM)
280		AM_RANGE(0x8000, 0xbfff) AM_READ(SMH_BANK1)
281		AM_RANGE(0xc000, 0xe97f) AM_READ(SMH_RAM)
282	265	AM_RANGE(0xf010, 0xf010) AM_READ_PORT("IN0")
283	266	AM_RANGE(0xf011, 0xf011) AM_READ_PORT("IN1")
284	267	AM_RANGE(0xf012, 0xf012) AM_READ_PORT("IN2")
285	268	AM_RANGE(0xf013, 0xf013) AM_READ_PORT("DSW0")
286	269	AM_RANGE(0xf014, 0xf014) AM_READ_PORT("DSW1")
287		AM_RANGE(0xf016, 0xf016) AM_READ(firetrap_8751_bootleg_r)
288		AM_RANGE(0xf800, 0xf8ff) AM_READ(SMH_ROM)   /* extra ROM in the bootleg with unprotection code */
	270	AM_RANGE(0xf016, 0xf016) AM_READ(firetrap_8751_r)
289	271	ADDRESS_MAP_END
290	272
291		static ADDRESS_MAP_START( writemem_bootleg, ADDRESS_SPACE_PROGRAM, 8 )
292		AM_RANGE(0x0000, 0xbfff) AM_WRITE(SMH_ROM)
293		AM_RANGE(0xc000, 0xcfff) AM_WRITE(SMH_RAM)
294		AM_RANGE(0xd000, 0xd7ff) AM_WRITE(firetrap_bg1videoram_w) AM_BASE(&firetrap_bg1videoram)
295		AM_RANGE(0xd800, 0xdfff) AM_WRITE(firetrap_bg2videoram_w) AM_BASE(&firetrap_bg2videoram)
296		AM_RANGE(0xe000, 0xe7ff) AM_WRITE(firetrap_fgvideoram_w) AM_BASE(&firetrap_fgvideoram)
297		AM_RANGE(0xe800, 0xe97f) AM_WRITE(SMH_RAM) AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
	273	static ADDRESS_MAP_START( firetrap_bootleg_map, ADDRESS_SPACE_PROGRAM, 8 )
	274	AM_RANGE(0x0000, 0x7fff) AM_ROM
	275	AM_RANGE(0x8000, 0xbfff) AM_ROMBANK(1)
	276	AM_RANGE(0xc000, 0xcfff) AM_RAM
	277	AM_RANGE(0xd000, 0xd7ff) AM_RAM_WRITE(firetrap_bg1videoram_w) AM_BASE(&firetrap_bg1videoram)
	278	AM_RANGE(0xd800, 0xdfff) AM_RAM_WRITE(firetrap_bg2videoram_w) AM_BASE(&firetrap_bg2videoram)
	279	AM_RANGE(0xe000, 0xe7ff) AM_RAM_WRITE(firetrap_fgvideoram_w) AM_BASE(&firetrap_fgvideoram)
	280	AM_RANGE(0xe800, 0xe97f) AM_RAM AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
298	281	AM_RANGE(0xf000, 0xf000) AM_WRITENOP   /* IRQ acknowledge */
299	282	AM_RANGE(0xf001, 0xf001) AM_WRITE(firetrap_sound_command_w)
300	283	AM_RANGE(0xf002, 0xf002) AM_WRITE(firetrap_bankselect_w)
r4679	r4680
305	288	AM_RANGE(0xf00a, 0xf00b) AM_WRITE(firetrap_bg1_scrolly_w)
306	289	AM_RANGE(0xf00c, 0xf00d) AM_WRITE(firetrap_bg2_scrollx_w)
307	290	AM_RANGE(0xf00e, 0xf00f) AM_WRITE(firetrap_bg2_scrolly_w)
308		AM_RANGE(0xf800, 0xf8ff) AM_WRITE(SMH_ROM)   /* extra ROM in the bootleg with unprotection code */
	291	AM_RANGE(0xf010, 0xf010) AM_READ_PORT("IN0")
	292	AM_RANGE(0xf011, 0xf011) AM_READ_PORT("IN1")
	293	AM_RANGE(0xf012, 0xf012) AM_READ_PORT("IN2")
	294	AM_RANGE(0xf013, 0xf013) AM_READ_PORT("DSW0")
	295	AM_RANGE(0xf014, 0xf014) AM_READ_PORT("DSW1")
	296	AM_RANGE(0xf016, 0xf016) AM_READ(firetrap_8751_bootleg_r)
	297	AM_RANGE(0xf800, 0xf8ff) AM_ROM /* extra ROM in the bootleg with unprotection code */
309	298	ADDRESS_MAP_END
310	299
311		static ADDRESS_MAP_START( sound_readmem, ADDRESS_SPACE_PROGRAM, 8 )
312		AM_RANGE(0x0000, 0x07ff) AM_READ(SMH_RAM)
313		AM_RANGE(0x3400, 0x3400) AM_READ(soundlatch_r)
314		AM_RANGE(0x4000, 0x7fff) AM_READ(SMH_BANK2)
315		AM_RANGE(0x8000, 0xffff) AM_READ(SMH_ROM)
316		ADDRESS_MAP_END
317
318		static ADDRESS_MAP_START( sound_writemem, ADDRESS_SPACE_PROGRAM, 8 )
319		AM_RANGE(0x0000, 0x07ff) AM_WRITE(SMH_RAM)
	300	static ADDRESS_MAP_START( sound_map, ADDRESS_SPACE_PROGRAM, 8 )
	301	AM_RANGE(0x0000, 0x07ff) AM_RAM
320	302	AM_RANGE(0x1000, 0x1001) AM_DEVWRITE("ym", ym3526_w)
321	303	AM_RANGE(0x2000, 0x2000) AM_WRITE(firetrap_adpcm_data_w)   /* ADPCM data for the MSM5205 chip */
322	304	AM_RANGE(0x2400, 0x2400) AM_WRITE(firetrap_sound_2400_w)
323	305	AM_RANGE(0x2800, 0x2800) AM_WRITE(firetrap_sound_bankselect_w)
324		AM_RANGE(0x4000, 0xffff) AM_WRITE(SMH_ROM)
	306	AM_RANGE(0x3400, 0x3400) AM_READ(soundlatch_r)
	307	AM_RANGE(0x4000, 0x7fff) AM_ROMBANK(2)
	308	AM_RANGE(0x8000, 0xffff) AM_ROM
325	309	ADDRESS_MAP_END
326	310
327	311
r4679	r4680
577	561
578	562	/* basic machine hardware */
579	563	MDRV_CPU_ADD("maincpu", Z80, 6000000)   /* 6 MHz */
580		MDRV_CPU_PROGRAM_MAP(readmem,writemem)
	564	MDRV_CPU_PROGRAM_MAP(firetrap_map,0)
581	565	MDRV_CPU_VBLANK_INT_HACK(firetrap,2)
582	566
583	567	MDRV_CPU_ADD("audiocpu", M6502,3072000/2)   /* 1.536 MHz? */
584		MDRV_CPU_PROGRAM_MAP(sound_readmem,sound_writemem)
	568	MDRV_CPU_PROGRAM_MAP(sound_map,0)
585	569	/* IRQs are caused by the ADPCM chip */
586	570	/* NMIs are caused by the main CPU */
587	571	MDRV_MACHINE_RESET(firetrap)
r4679	r4680
616	600
617	601	/* basic machine hardware */
618	602	MDRV_CPU_ADD("maincpu", Z80, 6000000)   /* 6 MHz */
619		MDRV_CPU_PROGRAM_MAP(readmem_bootleg,writemem_bootleg)
	603	MDRV_CPU_PROGRAM_MAP(firetrap_bootleg_map,0)
620	604	MDRV_CPU_VBLANK_INT("screen", bootleg)
621	605
622	606	MDRV_CPU_ADD("audiocpu", M6502,3072000/2) /* 1.536 MHz? */
623		MDRV_CPU_PROGRAM_MAP(sound_readmem,sound_writemem)
	607	MDRV_CPU_PROGRAM_MAP(sound_map,0)
624	608	/* IRQs are caused by the ADPCM chip */
625	609	/* NMIs are caused by the main CPU */
626	610

src/mame/drivers/crgolf.c

r4679	r4680
123	123
124	124	static TIMER_CALLBACK( main_to_sound_callback )
125	125	{
126		cpu_set_input_line(machine->cpu[1], INPUT_LINE_NMI, ASSERT_LINE);
	126	cputag_set_input_line(machine, "audiocpu", INPUT_LINE_NMI, ASSERT_LINE);
127	127	main_to_sound_data = param;
128	128	}
129	129
r4679	r4680
136	136
137	137	static READ8_HANDLER( main_to_sound_r )
138	138	{
139		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_NMI, CLEAR_LINE);
	139	cputag_set_input_line(space->machine, "audiocpu", INPUT_LINE_NMI, CLEAR_LINE);
140	140	return main_to_sound_data;
141	141	}
142	142
r4679	r4680
150	150
151	151	static TIMER_CALLBACK( sound_to_main_callback )
152	152	{
153		cpu_set_input_line(machine->cpu[0], INPUT_LINE_NMI, ASSERT_LINE);
	153	cputag_set_input_line(machine, "maincpu", INPUT_LINE_NMI, ASSERT_LINE);
154	154	sound_to_main_data = param;
155	155	}
156	156
r4679	r4680
163	163
164	164	static READ8_HANDLER( sound_to_main_r )
165	165	{
166		cpu_set_input_line(space->machine->cpu[0], INPUT_LINE_NMI, CLEAR_LINE);
	166	cputag_set_input_line(space->machine, "maincpu", INPUT_LINE_NMI, CLEAR_LINE);
167	167	return sound_to_main_data;
168	168	}
169	169
r4679	r4680
581	581	static DRIVER_INIT( crgolfhi )
582	582	{
583	583	const device_config *msm = devtag_get_device(machine, "msm");
584		memory_install_write8_device_handler(cpu_get_address_space(machine->cpu[1], ADDRESS_SPACE_PROGRAM), msm, 0xa000, 0xa003, 0, 0, crgolfhi_sample_w);
	584	memory_install_write8_device_handler(cputag_get_address_space(machine, "audiocpu", ADDRESS_SPACE_PROGRAM), msm, 0xa000, 0xa003, 0, 0, crgolfhi_sample_w);
585	585	}
586	586
587	587

src/mame/drivers/mastboy.c

r4679	r4680
641	641
642	642	static void mastboy_adpcm_int(const device_config *device)
643	643	{
644		msm5205_data_w (device,mastboy_m5205_next);
645		mastboy_m5205_next>>=4;
	644	msm5205_data_w(device, mastboy_m5205_next);
	645	mastboy_m5205_next >>= 4;
646	646
647	647	mastboy_m5205_part ^= 1;
648	648	if(!mastboy_m5205_part)
649		cpu_set_input_line(device->machine->cpu[0], INPUT_LINE_NMI, PULSE_LINE);
	649	cputag_set_input_line(device->machine, "maincpu", INPUT_LINE_NMI, PULSE_LINE);
650	650	}
651	651
652	652
r4679	r4680
661	661	static WRITE8_HANDLER( mastboy_irq0_ack_w )
662	662	{
663	663	mastboy_irq0_ack = data;
664		if ((data&1)==1) cpu_set_input_line(space->machine->cpu[0],0, CLEAR_LINE);
	664	if ((data & 1) == 1)
	665	cputag_set_input_line(space->machine, "maincpu", 0, CLEAR_LINE);
665	666	}
666	667
667	668	static INTERRUPT_GEN( mastboy_interrupt )
668	669	{
669		if ((mastboy_irq0_ack&1)==1)
	670	if ((mastboy_irq0_ack & 1) == 1)
670	671	{
671		cpu_set_input_line(device,0, ASSERT_LINE);
	672	cpu_set_input_line(device, 0, ASSERT_LINE);
672	673	}
673	674	}
674	675
675	676	/* Memory Maps */
676	677
677		static ADDRESS_MAP_START( readmem, ADDRESS_SPACE_PROGRAM, 8 )
678		AM_RANGE(0x0000, 0x3fff) AM_READ(SMH_ROM) // Internal ROM
679		AM_RANGE(0x4000, 0x7fff) AM_READ(SMH_ROM) // External ROM
680		AM_RANGE(0x8000, 0x8fff) AM_READ(SMH_RAM) // worl ram
681		AM_RANGE(0x9000, 0x9fff) AM_READ(SMH_RAM) // tilemap ram
682		AM_RANGE(0xa000, 0xa1ff) AM_READ(SMH_RAM) AM_MIRROR(0x0e00) // colour ram
683		AM_RANGE(0xc000, 0xffff) AM_READ(banked_ram_r) // mastboy bank area read
	678	static ADDRESS_MAP_START( mastboy_map, ADDRESS_SPACE_PROGRAM, 8 )
	679	AM_RANGE(0x0000, 0x3fff) AM_ROM // Internal ROM
	680	AM_RANGE(0x4000, 0x7fff) AM_ROM // External ROM
684	681
685		AM_RANGE(0xff000, 0xff7ff) AM_READ(mastboy_backupram_r)
	682	AM_RANGE(0x8000, 0x8fff) AM_RAM AM_BASE(&mastboy_workram)// work ram
	683	AM_RANGE(0x9000, 0x9fff) AM_RAM AM_BASE(&mastboy_tileram)// tilemap ram
	684	AM_RANGE(0xa000, 0xa1ff) AM_RAM AM_BASE(&mastboy_colram) AM_MIRROR(0x0e00)  // colour ram
	685
	686	AM_RANGE(0xc000, 0xffff) AM_READWRITE(banked_ram_r,banked_ram_w) // mastboy bank area read / write
	687
	688	AM_RANGE(0xff000, 0xff7ff) AM_READWRITE(mastboy_backupram_r,mastboy_backupram_w) AM_BASE(&generic_nvram) AM_SIZE(&generic_nvram_size)
	689
686	690	AM_RANGE(0xff800, 0xff807) AM_READ_PORT("P1")
687	691	AM_RANGE(0xff808, 0xff80f) AM_READ_PORT("P2")
688	692	AM_RANGE(0xff810, 0xff817) AM_READ_PORT("DSW1")
689	693	AM_RANGE(0xff818, 0xff81f) AM_READ_PORT("DSW2")
690		AM_RANGE(0xffc00, 0xfffff) AM_READ(SMH_RAM) // Internal RAM
691		ADDRESS_MAP_END
692	694
693		static ADDRESS_MAP_START( writemem, ADDRESS_SPACE_PROGRAM, 8 )
694		//ADDRESS_MAP_GLOBAL_MASK(0xffff)
695		AM_RANGE(0x0000, 0x3fff) AM_WRITE(SMH_ROM) // Internal ROM
696		AM_RANGE(0x4000, 0x7fff) AM_WRITE(SMH_ROM) // External  ROM
697		AM_RANGE(0x8000, 0x8fff) AM_WRITE(SMH_RAM) AM_BASE(&mastboy_workram)// work ram
698		AM_RANGE(0x9000, 0x9fff) AM_WRITE(SMH_RAM) AM_BASE(&mastboy_tileram)// tilemap ram
699		AM_RANGE(0xa000, 0xa1ff) AM_WRITE(SMH_RAM) AM_BASE(&mastboy_colram) AM_MIRROR(0x0e00)  // colour ram
700		AM_RANGE(0xc000, 0xffff) AM_WRITE(banked_ram_w) // mastboy bank area write
701
702		AM_RANGE(0xff000, 0xff7ff) AM_WRITE(mastboy_backupram_w) AM_BASE(&generic_nvram) AM_SIZE(&generic_nvram_size)
703	695	AM_RANGE(0xff820, 0xff827) AM_WRITE(mastboy_bank_w)
704	696	AM_RANGE(0xff828, 0xff828) AM_DEVWRITE("saa", saa1099_data_w)
705	697	AM_RANGE(0xff829, 0xff829) AM_DEVWRITE("saa", saa1099_control_w)
r4679	r4680
709	701	AM_RANGE(0xff83a, 0xff83a) AM_WRITE(msm5205_mastboy_m5205_sambit1_w)
710	702	AM_RANGE(0xff83b, 0xff83b) AM_DEVWRITE("msm", mastboy_msm5205_reset_w)
711	703	AM_RANGE(0xff83c, 0xff83c) AM_WRITE(backupram_enable_w)
712		AM_RANGE(0xffc00, 0xfffff) AM_WRITE(SMH_RAM) // Internal RAM
	704
	705	AM_RANGE(0xffc00, 0xfffff) AM_RAM // Internal RAM
713	706	ADDRESS_MAP_END
714	707
715	708	/* Ports */
r4679	r4680
725	718	return 0x00;
726	719	}
727	720
728		static ADDRESS_MAP_START( port_readmem, ADDRESS_SPACE_IO, 8 )
	721	static ADDRESS_MAP_START( mastboy_io_map, ADDRESS_SPACE_IO, 8 )
729	722	AM_RANGE(0x38, 0x38) AM_READ(mastboy_port_38_read)
730	723	AM_RANGE(0x39, 0x39) AM_READ(mastboy_nmi_read)
731	724	ADDRESS_MAP_END
r4679	r4680
864	857
865	858	static MACHINE_DRIVER_START( mastboy )
866	859	MDRV_CPU_ADD("maincpu", Z180, 12000000/2)   /* HD647180X0CP6-1M1R */
867		MDRV_CPU_PROGRAM_MAP(readmem,writemem)
868		MDRV_CPU_IO_MAP(port_readmem,0)
	860	MDRV_CPU_PROGRAM_MAP(mastboy_map,0)
	861	MDRV_CPU_IO_MAP(mastboy_io_map,0)
869	862	MDRV_CPU_VBLANK_INT("screen", mastboy_interrupt)
870	863
871	864	MDRV_NVRAM_HANDLER(generic_1fill)

src/mame/drivers/thedeep.c

r4679	r4680
46	46
47	47	static WRITE8_HANDLER( thedeep_sound_w )
48	48	{
49		soundlatch_w(space,0,data);
50		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_NMI, PULSE_LINE);
	49	soundlatch_w(space, 0, data);
	50	cputag_set_input_line(space->machine, "audiocpu", INPUT_LINE_NMI, PULSE_LINE);
51	51	}
52	52
53	53	static UINT8 protection_command, protection_data;
r4679	r4680
151	151
152	152	static ADDRESS_MAP_START( main_map, ADDRESS_SPACE_PROGRAM, 8 )
153	153	AM_RANGE(0x0000, 0x7fff) AM_ROM
154		AM_RANGE(0x8000, 0xbfff) AM_READWRITE(SMH_BANK1, SMH_ROM)   // ROM (banked)
	154	AM_RANGE(0x8000, 0xbfff) AM_READWRITE(SMH_BANK(1), SMH_ROM)   // ROM (banked)
155	155	AM_RANGE(0xc000, 0xcfff) AM_RAM
156	156	AM_RANGE(0xd000, 0xdfff) AM_RAM                           // RAM (MCU data copied here)
157	157	AM_RANGE(0xe000, 0xe000) AM_READWRITE(thedeep_protection_r, thedeep_protection_w   )   // To MCU
r4679	r4680
308	308
309	309	static void irqhandler(const device_config *device, int irq)
310	310	{
311		cpu_set_input_line(device->machine->cpu[1],0,irq ? ASSERT_LINE : CLEAR_LINE);
	311	cputag_set_input_line(device->machine, "audiocpu", 0, irq ? ASSERT_LINE : CLEAR_LINE);
312	312	}
313	313
314	314	static const ym2203_interface thedeep_ym2203_intf =

src/mame/drivers/oneshot.c

r4679	r4680
107	107
108	108
109	109
110		static ADDRESS_MAP_START( oneshot_readmem, ADDRESS_SPACE_PROGRAM, 16 )
111		AM_RANGE(0x000000, 0x03ffff) AM_READ(SMH_ROM)
112		AM_RANGE(0x080000, 0x087fff) AM_READ(SMH_RAM)
113		AM_RANGE(0x0c0000, 0x0c07ff) AM_READ(SMH_RAM)
114		AM_RANGE(0x120000, 0x120fff) AM_READ(SMH_RAM)
115		AM_RANGE(0x180000, 0x182fff) AM_READ(SMH_RAM)
	110	static ADDRESS_MAP_START( oneshot_map, ADDRESS_SPACE_PROGRAM, 16 )
	111	AM_RANGE(0x000000, 0x03ffff) AM_ROM
	112	AM_RANGE(0x080000, 0x087fff) AM_RAM
	113	AM_RANGE(0x0c0000, 0x0c07ff) AM_RAM_WRITE(paletteram16_xBBBBBGGGGGRRRRR_word_w) AM_BASE(&paletteram16)
	114	AM_RANGE(0x120000, 0x120fff) AM_RAM AM_BASE(&oneshot_sprites)
	115	AM_RANGE(0x180000, 0x180fff) AM_RAM_WRITE(oneshot_mid_videoram_w) AM_BASE(&oneshot_mid_videoram) // some people , girl etc.
	116	AM_RANGE(0x181000, 0x181fff) AM_RAM_WRITE(oneshot_fg_videoram_w) AM_BASE(&oneshot_fg_videoram) // credits etc.
	117	AM_RANGE(0x182000, 0x182fff) AM_RAM_WRITE(oneshot_bg_videoram_w) AM_BASE(&oneshot_bg_videoram) // credits etc.
	118	AM_RANGE(0x188000, 0x18800f) AM_WRITEONLY AM_BASE(&oneshot_scroll)   // scroll registers
116	119	AM_RANGE(0x190002, 0x190003) AM_READ(soundlatch_word_r)
	120	AM_RANGE(0x190010, 0x190011) AM_WRITE(soundlatch_word_w)
	121	AM_RANGE(0x190018, 0x190019) AM_DEVWRITE("oki", soundbank_w)
117	122	AM_RANGE(0x190026, 0x190027) AM_READ(oneshot_gun_x_p1_r)
118	123	AM_RANGE(0x19002e, 0x19002f) AM_READ(oneshot_gun_x_p2_r)
119	124	AM_RANGE(0x190036, 0x190037) AM_READ(oneshot_gun_y_p1_r)
r4679	r4680
125	130	AM_RANGE(0x19c034, 0x19c035) AM_READ_PORT("P2")
126	131	ADDRESS_MAP_END
127	132
128		static ADDRESS_MAP_START( oneshot_writemem, ADDRESS_SPACE_PROGRAM, 16 )
129		AM_RANGE(0x000000, 0x03ffff) AM_WRITE(SMH_ROM)
130		AM_RANGE(0x080000, 0x087fff) AM_WRITE(SMH_RAM)
131		AM_RANGE(0x0c0000, 0x0c07ff) AM_WRITE(paletteram16_xBBBBBGGGGGRRRRR_word_w) AM_BASE(&paletteram16)
132		AM_RANGE(0x120000, 0x120fff) AM_WRITE(SMH_RAM) AM_BASE(&oneshot_sprites)
133		AM_RANGE(0x180000, 0x180fff) AM_WRITE(oneshot_mid_videoram_w) AM_BASE(&oneshot_mid_videoram) // some people , girl etc.
134		AM_RANGE(0x181000, 0x181fff) AM_WRITE(oneshot_fg_videoram_w) AM_BASE(&oneshot_fg_videoram) // credits etc.
135		AM_RANGE(0x182000, 0x182fff) AM_WRITE(oneshot_bg_videoram_w) AM_BASE(&oneshot_bg_videoram) // credits etc.
136		AM_RANGE(0x188000, 0x18800f) AM_WRITE(SMH_RAM) AM_BASE(&oneshot_scroll)   // scroll registers???
137		AM_RANGE(0x190010, 0x190011) AM_WRITE(soundlatch_word_w)
138		AM_RANGE(0x190018, 0x190019) AM_DEVWRITE("oki", soundbank_w)
	133	static ADDRESS_MAP_START( oneshot_sound_map, ADDRESS_SPACE_PROGRAM, 8 )
	134	AM_RANGE(0x0000, 0x7fff) AM_ROM
	135	AM_RANGE(0x8000, 0x8000) AM_READWRITE(soundlatch_r,soundlatch_w)
	136	AM_RANGE(0x8001, 0x87ff) AM_RAM
	137	AM_RANGE(0xe000, 0xe001) AM_DEVREADWRITE("ym", ym3812_r,ym3812_w)
	138	AM_RANGE(0xe010, 0xe010) AM_DEVREADWRITE("oki", okim6295_r,okim6295_w)
139	139	ADDRESS_MAP_END
140	140
141		static ADDRESS_MAP_START( snd_readmem, ADDRESS_SPACE_PROGRAM, 8 )
142		AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM)
143		AM_RANGE(0x8000, 0x8000) AM_READ(soundlatch_r)
144		AM_RANGE(0x8001, 0x87ff) AM_READ(SMH_RAM)
145		AM_RANGE(0xe000, 0xe001) AM_DEVREAD("ym", ym3812_r)
146		AM_RANGE(0xe010, 0xe010) AM_DEVREAD("oki", okim6295_r)
147		ADDRESS_MAP_END
148	141
149		static ADDRESS_MAP_START( snd_writemem, ADDRESS_SPACE_PROGRAM, 8 )
150		AM_RANGE(0x0000, 0x7fff) AM_WRITE(SMH_ROM)
151		AM_RANGE(0x8000, 0x8000) AM_WRITE(soundlatch_w)
152		AM_RANGE(0x8001, 0x87ff) AM_WRITE(SMH_RAM)
153		AM_RANGE(0xe000, 0xe001) AM_DEVWRITE("ym", ym3812_w)
154		AM_RANGE(0xe010, 0xe010) AM_DEVWRITE("oki", okim6295_w)
155		ADDRESS_MAP_END
156
157	142	static INPUT_PORTS_START( oneshot )
158	143	PORT_START("DSW1")   /* DSW 1    (0x19c020.l -> 0x08006c.l) */
159	144	PORT_DIPNAME( 0x03, 0x00, DEF_STR( Coinage ) )      // 0x080084.l : credits (00-09)
r4679	r4680
352	337
353	338	static void irq_handler(const device_config *device, int irq)
354	339	{
355		cpu_set_input_line(device->machine->cpu[1], 0, irq ? ASSERT_LINE : CLEAR_LINE);
	340	cputag_set_input_line(device->machine, "audiocpu", 0, irq ? ASSERT_LINE : CLEAR_LINE);
356	341	}
357	342
358	343	static const ym3812_interface ym3812_config =
r4679	r4680
364	349
365	350	/* basic machine hardware */
366	351	MDRV_CPU_ADD("maincpu", M68000, 12000000)
367		MDRV_CPU_PROGRAM_MAP(oneshot_readmem,oneshot_writemem)
	352	MDRV_CPU_PROGRAM_MAP(oneshot_map,0)
368	353	MDRV_CPU_VBLANK_INT("screen", irq4_line_hold)
369	354
370	355	MDRV_CPU_ADD("audiocpu", Z80, 5000000)
371		MDRV_CPU_PROGRAM_MAP(snd_readmem, snd_writemem)
	356	MDRV_CPU_PROGRAM_MAP(oneshot_sound_map, 0)
372	357
373	358	MDRV_GFXDECODE(oneshot)
374	359

src/mame/drivers/rmhaihai.c

r4679	r4680
166	166
167	167	static MACHINE_RESET( themj )
168	168	{
169		themj_rombank_w(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_IO),0,0);
	169	themj_rombank_w(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_IO), 0, 0);
170	170	}
171	171
172	172
173	173
174		static ADDRESS_MAP_START( readmem, ADDRESS_SPACE_PROGRAM, 8 )
175		AM_RANGE(0x0000, 0x9fff) AM_READ(SMH_ROM)
176		AM_RANGE(0xa000, 0xa7ff) AM_READ(SMH_RAM)
177		AM_RANGE(0xa800, 0xb7ff) AM_READ(SMH_RAM)
178		AM_RANGE(0xc000, 0xdfff) AM_READ(SMH_ROM)
179		AM_RANGE(0xe000, 0xffff) AM_READ(SMH_ROM)   /* rmhaisei only */
180		ADDRESS_MAP_END
181
182		static ADDRESS_MAP_START( themj_readmem, ADDRESS_SPACE_PROGRAM, 8 )
183		AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM)
184		AM_RANGE(0x8000, 0x9fff) AM_READ(SMH_BANK1)
185		AM_RANGE(0xa000, 0xa7ff) AM_READ(SMH_RAM)
186		AM_RANGE(0xa800, 0xb7ff) AM_READ(SMH_RAM)
187		AM_RANGE(0xc000, 0xdfff) AM_READ(SMH_BANK2)
188		AM_RANGE(0xe000, 0xffff) AM_READ(SMH_ROM)
189		ADDRESS_MAP_END
190
191		static ADDRESS_MAP_START( writemem, ADDRESS_SPACE_PROGRAM, 8 )
192		AM_RANGE(0x0000, 0x9fff) AM_WRITE(SMH_ROM)
193		AM_RANGE(0xa000, 0xa7ff) AM_WRITE(SMH_RAM)
194		AM_RANGE(0xa800, 0xafff) AM_WRITE(rmhaihai_colorram_w) AM_BASE(&colorram)
195		AM_RANGE(0xb000, 0xb7ff) AM_WRITE(rmhaihai_videoram_w) AM_BASE(&videoram)
	174	static ADDRESS_MAP_START( rmhaihai_map, ADDRESS_SPACE_PROGRAM, 8 )
	175	AM_RANGE(0x0000, 0x9fff) AM_ROM
	176	AM_RANGE(0xa000, 0xa7ff) AM_RAM
	177	AM_RANGE(0xa800, 0xafff) AM_RAM_WRITE(rmhaihai_colorram_w) AM_BASE(&colorram)
	178	AM_RANGE(0xb000, 0xb7ff) AM_RAM_WRITE(rmhaihai_videoram_w) AM_BASE(&videoram)
196	179	AM_RANGE(0xb83c, 0xb83c) AM_WRITENOP   // ??
197	180	AM_RANGE(0xbc00, 0xbc00) AM_WRITENOP   // ??
198		AM_RANGE(0xc000, 0xdfff) AM_WRITE(SMH_ROM)
199		AM_RANGE(0xe000, 0xffff) AM_WRITE(SMH_ROM)   /* rmhaisei only */
	181	AM_RANGE(0xc000, 0xdfff) AM_ROM
	182	AM_RANGE(0xe000, 0xffff) AM_ROM         /* rmhaisei only */
200	183	ADDRESS_MAP_END
201	184
202		static ADDRESS_MAP_START( io_map, ADDRESS_SPACE_IO, 8 )
	185	static ADDRESS_MAP_START( rmhaihai_io_map, ADDRESS_SPACE_IO, 8 )
203	186	AM_RANGE(0x0000, 0x7fff) AM_READ(samples_r)
204	187	AM_RANGE(0x8000, 0x8000) AM_READWRITE(keyboard_r, SMH_NOP)   // ??
205	188	AM_RANGE(0x8001, 0x8001) AM_READWRITE(SMH_NOP, keyboard_w)   // ??
r4679	r4680
212	195	AM_RANGE(0xbc0c, 0xbc0c) AM_WRITENOP   // ??
213	196	ADDRESS_MAP_END
214	197
	198	static ADDRESS_MAP_START( themj_map, ADDRESS_SPACE_PROGRAM, 8 )
	199	AM_RANGE(0x0000, 0x7fff) AM_ROM
	200	AM_RANGE(0x8000, 0x9fff) AM_ROMBANK(1)
	201	AM_RANGE(0xa000, 0xa7ff) AM_RAM
	202	AM_RANGE(0xa800, 0xafff) AM_RAM_WRITE(rmhaihai_colorram_w) AM_BASE(&colorram)
	203	AM_RANGE(0xb000, 0xb7ff) AM_RAM_WRITE(rmhaihai_videoram_w) AM_BASE(&videoram)
	204	AM_RANGE(0xc000, 0xdfff) AM_ROMBANK(2)
	205	AM_RANGE(0xe000, 0xffff) AM_ROM
	206	ADDRESS_MAP_END
	207
215	208	static ADDRESS_MAP_START( themj_io_map, ADDRESS_SPACE_IO, 8 )
216	209	AM_RANGE(0x0000, 0x7fff) AM_READ(samples_r)
217	210	AM_RANGE(0x8000, 0x8000) AM_READWRITE(keyboard_r, SMH_NOP)   // ??
r4679	r4680
226	219	AM_RANGE(0xbc0c, 0xbc0c) AM_WRITENOP   // ??
227	220	ADDRESS_MAP_END
228	221
	222
229	223	static INPUT_PORTS_START( mjctrl )
230	224	PORT_START("KEY0")      // fake, handled by keyboard_r()
231	225	PORT_BIT( 0x0001, IP_ACTIVE_HIGH, IPT_MAHJONG_SMALL )
r4679	r4680
415	409	16*8
416	410	};
417	411
418		static GFXDECODE_START( 1 )
	412	static GFXDECODE_START( rmhaihai )
419	413	GFXDECODE_ENTRY( "gfx1", 0, charlayout, 0, 32 )
420	414	GFXDECODE_END
421	415
422		static GFXDECODE_START( 2 )
	416	static GFXDECODE_START( themj )
423	417	GFXDECODE_ENTRY( "gfx1", 0, charlayout, 0, 64 )
424	418	GFXDECODE_END
425	419
r4679	r4680
445	439
446	440	/* basic machine hardware */
447	441	MDRV_CPU_ADD("maincpu",Z80,20000000/4)   /* 5 MHz ??? */
448		MDRV_CPU_PROGRAM_MAP(readmem,writemem)
449		MDRV_CPU_IO_MAP(io_map,0)
	442	MDRV_CPU_PROGRAM_MAP(rmhaihai_map,0)
	443	MDRV_CPU_IO_MAP(rmhaihai_io_map,0)
450	444	MDRV_CPU_VBLANK_INT("screen", irq0_line_hold)
451	445
452	446	/* video hardware */
r4679	r4680
457	451	MDRV_SCREEN_SIZE(64*8, 32*8)
458	452	MDRV_SCREEN_VISIBLE_AREA(4*8, 60*8-1, 2*8, 30*8-1)
459	453
460		MDRV_GFXDECODE(1)
	454	MDRV_GFXDECODE(rmhaihai)
461	455	MDRV_PALETTE_LENGTH(0x100)
462	456
463	457	MDRV_PALETTE_INIT(RRRR_GGGG_BBBB)
r4679	r4680
482	476	MDRV_IMPORT_FROM(rmhaihai)
483	477
484	478	/* video hardware */
485		MDRV_GFXDECODE(2)
	479	MDRV_GFXDECODE(themj)
486	480	MDRV_PALETTE_LENGTH(0x200)
487	481	MACHINE_DRIVER_END
488	482
r4679	r4680
492	486	MDRV_IMPORT_FROM(rmhaihai)
493	487
494	488	MDRV_CPU_MODIFY("maincpu")
495		MDRV_CPU_PROGRAM_MAP(themj_readmem,writemem)
	489	MDRV_CPU_PROGRAM_MAP(themj_map,0)
496	490	MDRV_CPU_IO_MAP(themj_io_map,0)
497	491
498	492	MDRV_MACHINE_RESET(themj)
499	493
500	494	/* video hardware */
501		MDRV_GFXDECODE(2)
	495	MDRV_GFXDECODE(themj)
502	496	MDRV_PALETTE_LENGTH(0x200)
503	497	MACHINE_DRIVER_END
504	498

src/mame/drivers/topspeed.c

r4679	r4680
276	276	/* bit 0 enables cpu B */
277	277	/* however this fails when recovering from a save state
278	278	if cpu B is disabled !! */
279		cpu_set_input_line(machine->cpu[2], INPUT_LINE_RESET, (cpua_ctrl &0x1) ? CLEAR_LINE : ASSERT_LINE);
	279	cputag_set_input_line(machine, "sub", INPUT_LINE_RESET, (cpua_ctrl &0x1) ? CLEAR_LINE : ASSERT_LINE);
280	280
281	281	}
282	282
r4679	r4680
300	300
301	301	static TIMER_CALLBACK( topspeed_interrupt6  )
302	302	{
303		cpu_set_input_line(machine->cpu[0],6,HOLD_LINE);
	303	cputag_set_input_line(machine, "maincpu", 6, HOLD_LINE);
304	304	}
305	305
306	306	/* 68000 B */
307	307
308	308	static TIMER_CALLBACK( topspeed_cpub_interrupt6 )
309	309	{
310		cpu_set_input_line(machine->cpu[2],6,HOLD_LINE);   /* assumes Z80 sandwiched between the 68Ks */
	310	cputag_set_input_line(machine, "sub", 6, HOLD_LINE);   /* assumes Z80 sandwiched between the 68Ks */
311	311	}
312	312
313	313
r4679	r4680
628	628
629	629	static void irq_handler(const device_config *device, int irq)   /* assumes Z80 sandwiched between 68Ks */
630	630	{
631		cpu_set_input_line(device->machine->cpu[1],0,irq ? ASSERT_LINE : CLEAR_LINE);
	631	cputag_set_input_line(device->machine, "audiocpu", 0, irq ? ASSERT_LINE : CLEAR_LINE);
632	632	}
633	633
634	634	static const ym2151_interface ym2151_config =

src/mame/drivers/zr107.c

r4679	r4680
220	220	draw_7segment_led(bitmap, 3, 3, led_reg0);
221	221	draw_7segment_led(bitmap, 9, 3, led_reg1);
222	222
223		sharc_set_flag_input(screen->machine->cpu[2], 1, ASSERT_LINE);
	223	sharc_set_flag_input(cputag_get_cpu(screen->machine, "dsp"), 1, ASSERT_LINE);
224	224	return 0;
225	225	}
226	226
r4679	r4680
274	274	draw_7segment_led(bitmap, 3, 3, led_reg0);
275	275	draw_7segment_led(bitmap, 9, 3, led_reg1);
276	276
277		sharc_set_flag_input(screen->machine->cpu[2], 1, ASSERT_LINE);
	277	sharc_set_flag_input(cputag_get_cpu(screen->machine, "dsp"), 1, ASSERT_LINE);
278	278	return 0;
279	279	}
280	280
r4679	r4680
345	345	eeprom_write_bit((data & 0x01) ? 1 : 0);
346	346	eeprom_set_clock_line((data & 0x02) ? ASSERT_LINE : CLEAR_LINE);
347	347	eeprom_set_cs_line((data & 0x04) ? CLEAR_LINE : ASSERT_LINE);
348		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_RESET, (data & 0x10) ? CLEAR_LINE : ASSERT_LINE);
	348	cputag_set_input_line(space->machine, "audiocpu", INPUT_LINE_RESET, (data & 0x10) ? CLEAR_LINE : ASSERT_LINE);
349	349	mame_printf_debug("System register 0 = %02X\n", data);
350	350	break;
351	351
r4679	r4680
361	361	0x01 = ADDSCLK (ADC SCLK)
362	362	*/
363	363	if (data & 0x80)   /* CG Board 1 IRQ Ack */
364		cpu_set_input_line(space->machine->cpu[0], INPUT_LINE_IRQ1, CLEAR_LINE);
	364	cputag_set_input_line(space->machine, "maincpu", INPUT_LINE_IRQ1, CLEAR_LINE);
365	365	if (data & 0x40)   /* CG Board 0 IRQ Ack */
366		cpu_set_input_line(space->machine->cpu[0], INPUT_LINE_IRQ0, CLEAR_LINE);
	366	cputag_set_input_line(space->machine, "maincpu", INPUT_LINE_IRQ0, CLEAR_LINE);
367	367	set_cgboard_id((data >> 4) & 3);
368	368	adc083x_cs_write(space->machine, 0, (data >> 2) & 1);
369	369	adc083x_di_write(space->machine, 0, (data >> 1) & 1);
r4679	r4680
442	442	static MACHINE_START( zr107 )
443	443	{
444	444	/* set conservative DRC options */
445		ppcdrc_set_options(machine->cpu[0], PPCDRC_COMPATIBLE_OPTIONS);
	445	ppcdrc_set_options(cputag_get_cpu(machine, "maincpu"), PPCDRC_COMPATIBLE_OPTIONS);
446	446
447	447	/* configure fast RAM regions for DRC */
448		ppcdrc_add_fastram(machine->cpu[0], 0x00000000, 0x000fffff, FALSE, workram);
	448	ppcdrc_add_fastram(cputag_get_cpu(machine, "maincpu"), 0x00000000, 0x000fffff, FALSE, workram);
449	449	}
450	450
451	451	static ADDRESS_MAP_START( zr107_map, ADDRESS_SPACE_PROGRAM, 32 )
r4679	r4680
710	710	}
711	711	static MACHINE_RESET( zr107 )
712	712	{
713		cpu_set_input_line(machine->cpu[2], INPUT_LINE_RESET, ASSERT_LINE);
	713	cputag_set_input_line(machine, "dsp", INPUT_LINE_RESET, ASSERT_LINE);
714	714	}
715	715
716	716	static MACHINE_DRIVER_START( zr107 )
r4679	r4680
807	807
808	808	static TIMER_CALLBACK( irq_off )
809	809	{
810		cpu_set_input_line(machine->cpu[1], param, CLEAR_LINE);
	810	cputag_set_input_line(machine, "audiocpu", param, CLEAR_LINE);
811	811	}
812	812
813	813	static void sound_irq_callback(running_machine *machine, int irq)
814	814	{
815	815	int line = (irq == 0) ? INPUT_LINE_IRQ1 : INPUT_LINE_IRQ2;
816		cpu_set_input_line(machine->cpu[1], line, ASSERT_LINE);
	816	cputag_set_input_line(machine, "audiocpu", line, ASSERT_LINE);
817	817	timer_set(machine, ATTOTIME_IN_USEC(1), NULL, line, irq_off);
818	818	}
819	819
820	820	static void init_zr107(running_machine *machine)
821	821	{
822		sharc_dataram = auto_malloc(0x100000);
	822	sharc_dataram = auto_alloc_array(machine, UINT32, 0x100000/4);
823	823	led_reg0 = led_reg1 = 0x7f;
824	824	ccu_vcth = ccu_vctl = 0;
825	825

src/mame/drivers/amspdwy.c

r4679	r4680
79	79
80	80	static WRITE8_HANDLER( amspdwy_sound_w )
81	81	{
82		soundlatch_w(space,0,data);
83		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_NMI, PULSE_LINE);
	82	soundlatch_w(space, 0, data);
	83	cputag_set_input_line(space->machine, "audiocpu", INPUT_LINE_NMI, PULSE_LINE);
84	84	}
85	85
86	86	static ADDRESS_MAP_START( amspdwy_map, ADDRESS_SPACE_PROGRAM, 8 )
r4679	r4680
250	250
251	251	static void irq_handler(const device_config *device, int irq)
252	252	{
253		cpu_set_input_line(device->machine->cpu[1],0,irq ? ASSERT_LINE : CLEAR_LINE);
	253	cputag_set_input_line(device->machine, "audiocpu", 0, irq ? ASSERT_LINE : CLEAR_LINE);
254	254	}
255	255
256	256	static const ym2151_interface amspdwy_ym2151_interface =

src/mame/drivers/segae.c

r4679	r4680
316	316	#define SMS_VDP_VRAM(address) chip->vram[(address)&0x3fff]
317	317
318	318	#ifdef UNUSED_FUNCTION
319		static ADDRESS_MAP_START( sms_readmem, ADDRESS_SPACE_PROGRAM, 8 )
320		//  AM_RANGE(0x0000 , 0xbfff) AM_READ(SMH_ROM)
321		//  AM_RANGE(0xc000 , 0xdfff) AM_READ(SMH_RAM) AM_MIRROR(0x2000)
	319	static ADDRESS_MAP_START( sms_map, ADDRESS_SPACE_PROGRAM, 8 )
	320	//  AM_RANGE(0x0000 , 0xbfff) AM_ROM
	321	//  AM_RANGE(0xc000 , 0xdfff) AM_RAM AM_MIRROR(0x2000)
322	322	ADDRESS_MAP_END
323
324		static ADDRESS_MAP_START( sms_writemem, ADDRESS_SPACE_PROGRAM, 8 )
325		//  AM_RANGE(0x0000 , 0xbfff) AM_WRITE(SMH_ROM)
326		//  AM_RANGE(0xc000 , 0xdfff) AM_WRITE(SMH_RAM) AM_MIRROR(0x2000)
327		ADDRESS_MAP_END
328	323	#endif
329	324
330	325	/* we have to fill in the ROM addresses for systeme due to the encrypted games */
331		static ADDRESS_MAP_START( systeme_readmem, ADDRESS_SPACE_PROGRAM, 8 )
332		AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM)            /* Fixed ROM */
333		AM_RANGE(0x8000, 0xbfff) AM_READ(SMH_BANK1)            /* Banked ROM */
	326	static ADDRESS_MAP_START( systeme_map, ADDRESS_SPACE_PROGRAM, 8 )
	327	AM_RANGE(0x0000, 0x7fff) AM_ROM                        /* Fixed ROM */
	328	AM_RANGE(0x8000, 0xbfff) AM_ROMBANK(1)                  /* Banked ROM */
334	329
335		//  AM_RANGE(0x0000 , 0xbfff) AM_READ(SMH_ROM)
336		//  AM_RANGE(0xc000 , 0xdfff) AM_READ(SMH_RAM) AM_MIRROR(0x2000)
	330	//  AM_RANGE(0x0000 , 0xbfff) AM_ROM
	331	//  AM_RANGE(0xc000 , 0xdfff) AM_RAM     AM_MIRROR(0x2000)
337	332	ADDRESS_MAP_END
338	333
339		static ADDRESS_MAP_START( systeme_writemem, ADDRESS_SPACE_PROGRAM, 8 )
340		AM_RANGE(0x0000, 0x7fff) AM_WRITE(SMH_ROM)            /* Fixed ROM */
341
342		//  AM_RANGE(0x0000 , 0xbfff) AM_WRITE(SMH_ROM)
343		//  AM_RANGE(0xc000 , 0xdfff) AM_WRITE(SMH_RAM) AM_MIRROR(0x2000)
344		ADDRESS_MAP_END
345
346	334	static ADDRESS_MAP_START( sms_io_map, ADDRESS_SPACE_IO, 8 )
347	335	ADDRESS_MAP_GLOBAL_MASK(0xff)
348	336	ADDRESS_MAP_END
r4679	r4680
577	565
578	566	static int sms_vdp_cpu0_irq_callback(running_machine *machine, int status)
579	567	{
580		if (status==1)
581		cpu_set_input_line(machine->cpu[0],0,HOLD_LINE);
	568	if (status == 1)
	569	cputag_set_input_line(machine, "maincpu", 0, HOLD_LINE);
582	570	else
583		cpu_set_input_line(machine->cpu[0],0,CLEAR_LINE);
	571	cputag_set_input_line(machine, "maincpu", 0, CLEAR_LINE);
584	572
585	573	return 0;
586	574	}
587	575
588	576	static int sms_vdp_cpu1_irq_callback(running_machine *machine, int status)
589	577	{
590		if (status==1)
591		cpu_set_input_line(machine->cpu[1],0,HOLD_LINE);
	578	if (status == 1)
	579	cputag_set_input_line(machine, "genesis_snd_z80", 0, HOLD_LINE);
592	580	else
593		cpu_set_input_line(machine->cpu[1],0,CLEAR_LINE);
	581	cputag_set_input_line(machine, "genesis_snd_z80", 0, CLEAR_LINE);
594	582
595	583	return 0;
596	584	}
r4679	r4680
598	586
599	587	static int sms_vdp_cpu2_irq_callback(running_machine *machine, int status)
600	588	{
601		if (status==1)
602		cpu_set_input_line(machine->cpu[2],0,HOLD_LINE);
	589	if (status == 1)
	590	cputag_set_input_line(machine, "mtbios", 0, HOLD_LINE);
603	591	else
604		cpu_set_input_line(machine->cpu[2],0,CLEAR_LINE);
	592	cputag_set_input_line(machine, "mtbios", 0, CLEAR_LINE);
605	593
606	594	return 0;
607	595	}
r4679	r4680
658	646	{
659	647	struct sms_vdp *chip;
660	648
661		chip = auto_malloc(sizeof(*chip));
662		memset(chip, 0, sizeof(*chip));
	649	chip = auto_alloc_clear(machine, struct sms_vdp);
663	650
664	651	chip->vdp_type = type;
665	652
r4679	r4680
684	671	chip->regs[0xa] = 0;
685	672	/* b-f don't matter */
686	673	chip->readbuf = 0;
687		chip->vram = auto_malloc(0x4000);
688		memset(chip->vram,0x00,0x4000);
	674	chip->vram = auto_alloc_array_clear(machine, UINT8, 0x4000);
689	675
690	676	//printf("%d\n", (*chip->set_irq)(machine, 200));
691	677
692	678	if (chip->vdp_type==GG_VDP)
693	679	{
694		chip->cram = auto_malloc(0x0040);
695		memset(chip->cram,0x00,0x0040);
696		chip->cram_mamecolours = auto_malloc(0x0080);
697		memset(chip->cram_mamecolours,0x00,0x0080);
	680	chip->cram = auto_alloc_array_clear(machine, UINT8, 0x0040);
	681	chip->cram_mamecolours = auto_alloc_array_clear(machine, UINT16, 0x0080/2);
698	682	chip->gg_cram_latch = 0;
699	683	}
700	684	else
701	685	{
702		chip->cram = auto_malloc(0x0020);
703		memset(chip->cram,0x00,0x0020);
704		chip->cram_mamecolours = auto_malloc(0x0040);
705		memset(chip->cram_mamecolours,0x00,0x0040);
	686	chip->cram = auto_alloc_array_clear(machine, UINT8, 0x0020);
	687	chip->cram_mamecolours = auto_alloc_array(machine, UINT16, 0x0040/2);
706	688	}
707	689
708		chip->tile_renderline = auto_malloc(256+8);
	690	chip->tile_renderline = auto_alloc_array(machine, UINT8, 256+8);
709	691	memset(chip->tile_renderline,0x00,256+8);
710	692
711		chip->sprite_renderline = auto_malloc(256+32);
	693	chip->sprite_renderline = auto_alloc_array(machine, UINT8, 256+32);
712	694	memset(chip->sprite_renderline,0x00,256+32);
713	695
714	696	chip->writemode = 0;
715		chip->r_bitmap = auto_bitmap_alloc(256, 256, BITMAP_FORMAT_RGB15);
	697	chip->r_bitmap = auto_bitmap_alloc(machine, 256, 256, BITMAP_FORMAT_RGB15);
716	698
717	699	chip->sms_scanline_timer = timer_alloc(machine, sms_scanline_timer_callback, chip);
718	700
r4679	r4680
1279	1261	The position to get the H position also has to compensate for a few errors
1280	1262	*/
1281	1263	//  printf("num %d\n",num );
1282		struct sms_vdp *chip = ptr;
	1264	struct sms_vdp *chip = (struct sms_vdp *)ptr;
1283	1265
1284	1266	if (chip->sms_scanline_counter<(chip->sms_total_scanlines-1))
1285	1267	{
r4679	r4680
1456	1438	VIDEO_EOF(sms)
1457	1439	{
1458	1440	end_of_frame(machine, vdp1);
1459		//if (SMS_PAUSE_BUTTON) cpu_set_input_line(machine->cpu[0],INPUT_LINE_NMI,PULSE_LINE); // not on systeme!!!
	1441	//if (SMS_PAUSE_BUTTON) cputag_set_input_line(machine, , "maincpu", INPUT_LINE_NMI, PULSE_LINE); // not on systeme!!!
1460	1442	}
1461	1443	#endif
1462	1444
r4679	r4680
1846	1828
1847	1829
1848	1830	ROM_START( hangonjr )
1849		ROM_REGION( 0x30000, "z80", 0 )
	1831	ROM_REGION( 0x30000, "maincpu", 0 )
1850	1832	ROM_LOAD( "rom5.ic7",   0x00000, 0x08000, CRC(d63925a7) SHA1(699f222d9712fa42651c753fe75d7b60e016d3ad) ) /* Fixed Code */
1851	1833
1852	1834	/* The following are 8 0x4000 banks that get mapped to reads from 0x8000 - 0xbfff */
r4679	r4680
1857	1839	ROM_END
1858	1840
1859	1841	ROM_START( ridleofp )
1860		ROM_REGION( 0x30000, "z80", 0 )
	1842	ROM_REGION( 0x30000, "maincpu", 0 )
1861	1843	ROM_LOAD( "epr10426.bin",   0x00000, 0x08000, CRC(4404c7e7) SHA1(555f44786976a009d96a6395c9173929ad6138a7) ) /* Fixed Code */
1862	1844
1863	1845	/* The following are 8 0x4000 banks that get mapped to reads from 0x8000 - 0xbfff */
r4679	r4680
1868	1850	ROM_END
1869	1851
1870	1852	ROM_START( transfrm )
1871		ROM_REGION( 0x30000, "z80", 0 )
	1853	ROM_REGION( 0x30000, "maincpu", 0 )
1872	1854	ROM_LOAD( "ic7.top",   0x00000, 0x08000, CRC(ccf1d123) SHA1(5ade9b00e2a36d034fafdf1902d47a9a00e96fc4) ) /* Fixed Code */
1873	1855
1874	1856	/* The following are 8 0x4000 banks that get mapped to reads from 0x8000 - 0xbfff */
r4679	r4680
1879	1861	ROM_END
1880	1862
1881	1863	ROM_START( astrofl )
1882		ROM_REGION( 0x50000, "z80", 0 )
	1864	ROM_REGION( 0x50000, "maincpu", 0 )
1883	1865	ROM_LOAD( "epr-7723.ic7",   0x00000, 0x08000, CRC(66061137) SHA1(cb6a2c7864f9f87bbedfd4b1448ad6c2de65d6ca) ) /* encrypted */
1884	1866
1885	1867	/* The following are 8 0x4000 banks that get mapped to reads from 0x8000 - 0xbfff */
r4679	r4680
1891	1873
1892	1874
1893	1875	ROM_START( tetrisse )
1894		ROM_REGION( 0x30000, "z80", 0 )
	1876	ROM_REGION( 0x30000, "maincpu", 0 )
1895	1877	ROM_LOAD( "epr12213.7",   0x00000, 0x08000, CRC(ef3c7a38) SHA1(cbb91aef330ab1a37d3e21ecf1d008143d0dd7ec) ) /* Fixed Code */
1896	1878
1897	1879	/* The following are 8 0x4000 banks that get mapped to reads from 0x8000 - 0xbfff */
r4679	r4680
1903	1885
1904	1886
1905	1887	ROM_START( fantzn2 )
1906		ROM_REGION( 0x50000, "z80", 0 )
	1888	ROM_REGION( 0x50000, "maincpu", 0 )
1907	1889	ROM_LOAD( "epr-11416.ic7",   0x00000, 0x08000, CRC(76db7b7b) SHA1(d60e2961fc893dcb4445aed5f67515cbd25b610f) )   /* encrypted */
1908	1890
1909	1891	ROM_LOAD( "epr-11415.ic5",   0x10000, 0x10000, CRC(57b45681) SHA1(1ae6d0d58352e246a4ec4e1ce02b0417257d5d20) )
r4679	r4680
1916	1898	ROM_END
1917	1899
1918	1900	ROM_START( opaopa )
1919		ROM_REGION( 0x50000, "z80", 0 )
	1901	ROM_REGION( 0x50000, "maincpu", 0 )
1920	1902	ROM_LOAD( "epr11224.ic7",   0x00000, 0x08000, CRC(024b1244) SHA1(59a522ac3d98982cc4ddb1c81f9584d3da453649) ) /* encrypted */
1921	1903
1922	1904	/* The following are 8 0x4000 banks that get mapped to reads from 0x8000 - 0xbfff */
r4679	r4680
2041	2023
2042	2024
2043	2025	static MACHINE_DRIVER_START( systeme )
2044		MDRV_CPU_ADD("z80", Z80, 10738600/2) /* correct for hangonjr, and astroflash/transformer at least  */
2045		MDRV_CPU_PROGRAM_MAP(systeme_readmem,systeme_writemem)
	2026	MDRV_CPU_ADD("maincpu", Z80, 10738600/2) /* correct for hangonjr, and astroflash/transformer at least  */
	2027	MDRV_CPU_PROGRAM_MAP(systeme_map,0)
2046	2028	MDRV_CPU_IO_MAP(sms_io_map,0)
2047	2029
2048	2030	/* IRQ handled via the timers */
r4679	r4680
2156	2138	{
2157	2139	/* INIT THE PORTS *********************************************************************************************/
2158	2140
2159		const address_space *io = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_IO);
	2141	const address_space *io = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_IO);
2160	2142	const device_config *sn1 = devtag_get_device(machine, "sn1");
2161	2143	const device_config *sn2 = devtag_get_device(machine, "sn2");
2162	2144
r4679	r4680
2186	2168	/* INIT THE MEMMAP / BANKING *********************************************************************************/
2187	2169
2188	2170	/* catch any addresses that don't get mapped */
2189		//  memory_install_readwrite8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x0000, 0xffff, 0, 0, z80_unmapped_r, z80_unmapped_w);
	2171	//  memory_install_readwrite8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x0000, 0xffff, 0, 0, z80_unmapped_r, z80_unmapped_w);
2190	2172
2191	2173	/* fixed rom bank area */
2192		//  sms_rom = auto_malloc(0xc000);
2193		//  memory_install_readwrite8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x0000, 0xbfff, 0, 0, SMH_BANK1, SMH_UNMAP);
	2174	//  sms_rom = auto_alloc_array(machine, UINT8, 0xc000);
	2175	//  memory_install_readwrite8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x0000, 0xbfff, 0, 0, (read8_space_func)SMH_BANK(1), (write8_space_func)SMH_UNMAP);
2194	2176	//  memory_set_bankptr(machine,  1, sms_rom );
2195	2177
2196		memory_configure_bank(machine, 1, 0, 16, memory_region(machine, "z80") + 0x10000, 0x4000);
	2178	memory_configure_bank(machine, 1, 0, 16, memory_region(machine, "maincpu") + 0x10000, 0x4000);
2197	2179
2198	2180	/* alternate way of accessing video ram */
2199		memory_install_write8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x8000, 0xbfff, 0, 0, segasyse_videoram_w);
	2181	memory_install_write8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x8000, 0xbfff, 0, 0, segasyse_videoram_w);
2200	2182
2201	2183
2202	2184	//  memcpy(sms_rom, memory_region(machine, "user1"), 0x8000);
2203	2185
2204	2186	/* main ram area */
2205		sms_mainram = auto_malloc(0x4000);
2206		memory_install_readwrite8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xc000, 0xffff, 0, 0, SMH_BANK2, SMH_BANK2);
	2187	sms_mainram = auto_alloc_array(machine, UINT8, 0x4000);
	2188	memory_install_readwrite8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xc000, 0xffff, 0, 0, (read8_space_func)SMH_BANK(2), (write8_space_func)SMH_BANK(2));
2207	2189	memory_set_bankptr(machine,  2, sms_mainram );
2208	2190	memset(sms_mainram,0x00,0x4000);
2209	2191
r4679	r4680
2212	2194
2213	2195	void init_for_megadrive(running_machine *machine)
2214	2196	{
2215		md_sms_vdp = start_vdp(machine, GEN_VDP);
	2197	md_sms_vdp = (struct sms_vdp *)start_vdp(machine, GEN_VDP);
2216	2198	md_sms_vdp->set_irq = sms_vdp_cpu1_irq_callback;
2217	2199	md_sms_vdp->is_pal = 0;
2218	2200	md_sms_vdp->sms_total_scanlines = 262;
r4679	r4680
2226	2208	{
2227	2209	//  init_systeme_map(machine);
2228	2210
2229		vdp1 = start_vdp(machine, SMS2_VDP);
	2211	vdp1 = (struct sms_vdp *)start_vdp(machine, SMS2_VDP);
2230	2212	vdp1->set_irq = sms_vdp_cpu2_irq_callback;
2231	2213	vdp1->is_pal = 0;
2232	2214	vdp1->sms_total_scanlines = 262;
r4679	r4680
2234	2216	vdp1->chip_id = 1;
2235	2217
2236	2218	vdp1_vram_bank0 = vdp1->vram;
2237		vdp1_vram_bank1 = auto_malloc(0x4000);
	2219	vdp1_vram_bank1 = auto_alloc_array(machine, UINT8, 0x4000);
2238	2220	}
2239	2221
2240	2222	static DRIVER_INIT( segasyse )
2241	2223	{
2242	2224	init_systeme_map(machine);
2243	2225
2244		vdp1 = start_vdp(machine, SMS2_VDP);
	2226	vdp1 = (struct sms_vdp *)start_vdp(machine, SMS2_VDP);
2245	2227	//  vdp1->set_irq = sms_vdp_cpu0_irq_callback;
2246	2228	vdp1->is_pal = 0;
2247	2229	vdp1->sms_total_scanlines = 262;
r4679	r4680
2249	2231	vdp1->chip_id = 1;
2250	2232
2251	2233	vdp1_vram_bank0 = vdp1->vram;
2252		vdp1_vram_bank1 = auto_malloc(0x4000);
	2234	vdp1_vram_bank1 = auto_alloc_array(machine, UINT8, 0x4000);
2253	2235
2254	2236
2255		vdp2 = start_vdp(machine, SMS2_VDP);
	2237	vdp2 = (struct sms_vdp *)start_vdp(machine, SMS2_VDP);
2256	2238	vdp2->set_irq = sms_vdp_cpu0_irq_callback;
2257	2239	vdp2->is_pal = 0;
2258	2240	vdp2->sms_total_scanlines = 262;
r4679	r4680
2260	2242	vdp2->chip_id = 2;
2261	2243
2262	2244	vdp2_vram_bank0 = vdp2->vram;
2263		vdp2_vram_bank1 = auto_malloc(0x4000);
	2245	vdp2_vram_bank1 = auto_alloc_array(machine, UINT8, 0x4000);
2264	2246	}
2265	2247
2266	2248	/*- Hang On Jr. Specific -*/
r4679	r4680
2328	2310	{
2329	2311	DRIVER_INIT_CALL(segasyse);
2330	2312
2331		memory_install_read8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_IO), 0xf8, 0xf8, 0, 0, segae_ridleofp_port_f8_r);
2332		memory_install_write8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_IO), 0xfa, 0xfa, 0, 0, segae_ridleofp_port_fa_w);
	2313	memory_install_read8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_IO), 0xf8, 0xf8, 0, 0, segae_ridleofp_port_f8_r);
	2314	memory_install_write8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_IO), 0xfa, 0xfa, 0, 0, segae_ridleofp_port_fa_w);
2333	2315	}
2334	2316
2335	2317
r4679	r4680
2337	2319	{
2338	2320	DRIVER_INIT_CALL(segasyse);
2339	2321
2340		memory_install_read8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_IO), 0xf8, 0xf8, 0, 0, segae_hangonjr_port_f8_r);
2341		memory_install_write8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_IO), 0xfa, 0xfa, 0, 0, segae_hangonjr_port_fa_w);
	2322	memory_install_read8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_IO), 0xf8, 0xf8, 0, 0, segae_hangonjr_port_f8_r);
	2323	memory_install_write8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_IO), 0xfa, 0xfa, 0, 0, segae_hangonjr_port_fa_w);
2342	2324	}
2343	2325
2344	2326	static DRIVER_INIT( opaopa )
2345	2327	{
2346	2328	DRIVER_INIT_CALL(segasyse);
2347	2329
2348		mc8123_decrypt_rom(machine, "z80", "user1", 1, 8);
	2330	mc8123_decrypt_rom(machine, "maincpu", "user1", 1, 8);
2349	2331	}
2350	2332
2351	2333	static DRIVER_INIT( fantzn2 )
2352	2334	{
2353	2335	DRIVER_INIT_CALL(segasyse);
2354	2336
2355		mc8123_decrypt_rom(machine, "z80", "user1", 0, 0);
	2337	mc8123_decrypt_rom(machine, "maincpu", "user1", 0, 0);
2356	2338	}
2357	2339
2358	2340	static DRIVER_INIT( astrofl )
2359	2341	{
2360	2342	DRIVER_INIT_CALL(segasyse);
2361	2343
2362		astrofl_decode(machine, "z80");
	2344	astrofl_decode(machine, "maincpu");
2363	2345	}
2364	2346
2365	2347	GAME( 1985, hangonjr, 0,        systeme, hangonjr, hangonjr, ROT0,  "Sega", "Hang-On Jr.", 0 )

src/mame/drivers/fantland.c

r4679	r4680
81	81
82	82	static WRITE8_HANDLER( fantland_soundlatch_w )
83	83	{
84		soundlatch_w(space,0,data);
85		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_NMI, PULSE_LINE);
	84	soundlatch_w(space, 0, data);
	85	cputag_set_input_line(space->machine, "audiocpu", INPUT_LINE_NMI, PULSE_LINE);
86	86	}
87	87
88	88	static WRITE16_HANDLER( fantland_soundlatch_16_w )
r4679	r4680
864	864
865	865	static void galaxygn_sound_irq(const device_config *device, int line)
866	866	{
867		cpu_set_input_line_and_vector(device->machine->cpu[1], 0, line ? ASSERT_LINE : CLEAR_LINE, 0x80/4);
	867	cputag_set_input_line_and_vector(device->machine, "audiocpu", 0, line ? ASSERT_LINE : CLEAR_LINE, 0x80/4);
868	868	}
869	869
870	870	static const ym2151_interface galaxygn_ym2151_interface =
r4679	r4680
977	977
978	978	static void wheelrun_ym3526_irqhandler(const device_config *device, int state)
979	979	{
980		cpu_set_input_line(device->machine->cpu[1], INPUT_LINE_IRQ0, state);
	980	cputag_set_input_line(device->machine, "audiocpu", INPUT_LINE_IRQ0, state);
981	981	}
982	982
983	983	static const ym3526_interface wheelrun_ym3526_interface =

src/mame/drivers/ksys573.c

r4679	r4680
565	565	atapi_regs[ATAPI_REG_COUNTLOW] = atapi_xferlen & 0xff;
566	566	atapi_regs[ATAPI_REG_COUNTHIGH] = (atapi_xferlen>>8)&0xff;
567	567
568		timer_adjust_oneshot(atapi_timer, cpu_clocks_to_attotime(machine->cpu[0], (ATAPI_CYCLES_PER_SECTOR * (atapi_xferlen/2048))), 0);
	568	timer_adjust_oneshot(atapi_timer, cputag_clocks_to_attotime(machine, "maincpu", (ATAPI_CYCLES_PER_SECTOR * (atapi_xferlen/2048))), 0);
569	569	}
570	570	else
571	571	{
r4679	r4680
952	952	{
953	953	int i;
954	954
955		atapi_regs = auto_malloc( ATAPI_REG_MAX );
	955	atapi_regs = auto_alloc_array(machine, UINT8, ATAPI_REG_MAX );
956	956	memset(atapi_regs, 0, sizeof(atapi_regs));
957	957
958	958	atapi_regs[ATAPI_REG_CMDSTATUS] = 0;
r4679	r4680
980	980	}
981	981	add_exit_callback(machine, atapi_exit);
982	982
983		atapi_data = auto_malloc( ATAPI_DATA_SIZE );
	983	atapi_data = auto_alloc_array(machine, UINT8, ATAPI_DATA_SIZE );
984	984
985	985	state_save_register_global_pointer(machine,  atapi_regs, ATAPI_REG_MAX );
986	986	state_save_register_global_pointer(machine,  atapi_data, ATAPI_DATA_SIZE / 2 );
r4679	r4680
1032	1032	verboselog( machine, 2, "atapi_xfer_end: %d %d\n", atapi_xferlen, atapi_xfermod );
1033	1033
1034	1034	// set a transfer complete timer (Note: CYCLES_PER_SECTOR can't be lower than 2000 or the BIOS ends up "out of order")
1035		timer_adjust_oneshot(atapi_timer, cpu_clocks_to_attotime(machine->cpu[0], (ATAPI_CYCLES_PER_SECTOR * (atapi_xferlen/2048))), 0);
	1035	timer_adjust_oneshot(atapi_timer, cputag_clocks_to_attotime(machine, "maincpu", (ATAPI_CYCLES_PER_SECTOR * (atapi_xferlen/2048))), 0);
1036	1036	}
1037	1037
1038	1038	static UINT32 m_n_security_control;
r4679	r4680
1188	1188	static UINT64 psxcpu_gettotalcycles( running_machine *machine )
1189	1189	{
1190	1190	/* TODO: should return the start of the current tick. */
1191		return cpu_get_total_cycles(machine->cpu[0]) * 2;
	1191	return cputag_get_total_cycles(machine, "maincpu") * 2;
1192	1192	}
1193	1193
1194	1194	static int root_divider( int n_counter )
r4679	r4680
1740	1740
1741	1741	uPD4701_init( machine, 0 );
1742	1742
1743		memory_install_readwrite32_handler( cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x1f640000, 0x1f6400ff, 0, 0, ge765pwbba_r, ge765pwbba_w );
	1743	memory_install_readwrite32_handler( cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x1f640000, 0x1f6400ff, 0, 0, ge765pwbba_r, ge765pwbba_w );
1744	1744	}
1745	1745
1746	1746	/*
r4679	r4680
1851	1851
1852	1852	gx700pwfbf_output_callback = output_callback_func;
1853	1853
1854		memory_install_readwrite32_handler( cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x1f640000, 0x1f6400ff, 0, 0, gx700pwbf_io_r, gx700pwbf_io_w );
	1854	memory_install_readwrite32_handler( cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x1f640000, 0x1f6400ff, 0, 0, gx700pwbf_io_r, gx700pwbf_io_w );
1855	1855
1856	1856	state_save_register_global_array(machine,  gx700pwbf_output_data );
1857	1857	}
r4679	r4680
2094	2094	{
2095	2095	DRIVER_INIT_CALL(konami573);
2096	2096
2097		memory_install_readwrite32_handler( cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x1f600000, 0x1f6000ff, 0, 0, gtrfrks_io_r, gtrfrks_io_w );
	2097	memory_install_readwrite32_handler( cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x1f600000, 0x1f6000ff, 0, 0, gtrfrks_io_r, gtrfrks_io_w );
2098	2098	}
2099	2099
2100	2100	/* GX894 digital i/o */
r4679	r4680
2384	2384
2385	2385	gx894pwbba_output_callback = output_callback_func;
2386	2386
2387		memory_install_readwrite32_handler( cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x1f640000, 0x1f6400ff, 0, 0, gx894pwbba_r, gx894pwbba_w );
	2387	memory_install_readwrite32_handler( cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x1f640000, 0x1f6400ff, 0, 0, gx894pwbba_r, gx894pwbba_w );
2388	2388
2389	2389	gx894_ram_write_offset = 0;
2390	2390	gx894_ram_read_offset = 0;
2391		gx894_ram = auto_malloc( gx894_ram_size );
	2391	gx894_ram = auto_alloc_array(machine, UINT16,  gx894_ram_size/2);
2392	2392
2393	2393	ds2401_init( machine, 2, ds2401_xid ); /* todo: load this from roms */
2394	2394
r4679	r4680
2413	2413
2414	2414	gx894pwbba_init( machine, NULL );
2415	2415
2416		memory_install_readwrite32_handler( cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x1f600000, 0x1f6000ff, 0, 0, gtrfrks_io_r, gtrfrks_io_w );
	2416	memory_install_readwrite32_handler( cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x1f600000, 0x1f6000ff, 0, 0, gtrfrks_io_r, gtrfrks_io_w );
2417	2417	}
2418	2418
2419	2419	/* ddr solo */
r4679	r4680
2706	2706
2707	2707	gx894pwbba_init( machine, dmx_output_callback );
2708	2708
2709		memory_install_write32_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x1f600000, 0x1f6000ff, 0, 0, dmx_io_w );
	2709	memory_install_write32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x1f600000, 0x1f6000ff, 0, 0, dmx_io_w );
2710	2710	}
2711	2711
2712	2712	/* salary man champ */
r4679	r4680
3293	3293	ROM_REGION32_LE( 0x080000, "user1", 0 )
3294	3294	SYS573_BIOS_A
3295	3295
	3296	ROM_REGION( 0x080000, "cpu2", 0 ) /* memory card reader */
	3297	ROM_LOAD( "885a01.bin",   0x000000, 0x080000, CRC(e22d093f) SHA1(927f62f63b5caa7899392decacd12fea0e6fdbea) )
	3298
3296	3299	ROM_REGION( 0x0000224, "user2", 0 ) /* security cart eeprom */
3297	3300	ROM_LOAD( "ge885jaa.u1",  0x000000, 0x000224, BAD_DUMP CRC(cbc984c5) SHA1(6c0cd78a41000999b4ffbd9fb3707738b50a9b50) )
3298	3301
r4679	r4680
4011	4014	DISK_IMAGE_READONLY( "910jaa02", 0, SHA1(70851c383e3876c4a697a99706fbaae2dafcb0e0) )
4012	4015	ROM_END
4013	4016
	4017	ROM_START( dsfdr )
	4018	ROM_REGION32_LE( 0x080000, "user1", 0 )
	4019	SYS573_BIOS_A
	4020
	4021	ROM_REGION( 0x0000224, "user2", 0 ) /* install security cart eeprom */
	4022	ROM_LOAD( "gea37ja.u1",   0x000000, 0x000224, BAD_DUMP CRC(5321055e) SHA1(d06b0dca9caba8249d71340469ad9083b02fd087) )
	4023
	4024	ROM_REGION( 0x0001014, "user8", 0 ) /* game security cart eeprom */
	4025	ROM_LOAD( "gca37ja.u1",   0x000000, 0x001014, BAD_DUMP CRC(b6d9e7f9) SHA1(bc5f491de53a96d46745df09bc94e7853052296c) )
	4026
	4027	ROM_REGION( 0x1000000, "user3", 0 ) /* onboard flash */
	4028	ROM_FILL( 0x0000000, 0x1000000, 0xff )
	4029
	4030	ROM_REGION( 0x000008, "user9", 0 ) /* install security cart id */
	4031	ROM_LOAD( "gea37ja.u6",    0x000000, 0x000008, BAD_DUMP CRC(af09e43c) SHA1(d8372f2d6e0ae07061b496a2242a63e5bc2e54dc) )
	4032
	4033	ROM_REGION( 0x000008, "user10", 0 ) /* game security cart id */
	4034	ROM_LOAD( "gca37ja.u6",   0x000000, 0x000008, BAD_DUMP CRC(ce84419e) SHA1(839e8ee080ecfc79021a06417d930e8b32dfc6a1) )
	4035
	4036	DISK_REGION( "cdrom0" )
	4037	DISK_IMAGE_READONLY( "a37jaa02", 0, SHA1(c6a23b910e884aa0d4afc388dbc8379e0d09611a) )
	4038	ROM_END
	4039
4014	4040	ROM_START( dsftkd )
4015	4041	ROM_REGION32_LE( 0x080000, "user1", 0 )
4016	4042	SYS573_BIOS_A
r4679	r4680
4574	4600	GAME( 2000, ddr4mj,   ddr4m,    konami573, ddr,       ddrdigital, ROT0, "Konami", "Dance Dance Revolution 4th Mix (G*A33 VER. JAA)", GAME_IMPERFECT_GRAPHICS | GAME_IMPERFECT_SOUND | GAME_NOT_WORKING ) /* BOOT VER 1.8 */
4575	4601	GAME( 2000, ddr4ms,   sys573,   konami573, ddrsolo,   ddrsolo,    ROT0, "Konami", "Dance Dance Revolution 4th Mix Solo (G*A33 VER. ABA)", GAME_IMPERFECT_GRAPHICS | GAME_IMPERFECT_SOUND | GAME_NOT_WORKING ) /* BOOT VER 1.8 */
4576	4602	GAME( 2000, ddr4msj,  ddr4ms,   konami573, ddrsolo,   ddrsolo,    ROT0, "Konami", "Dance Dance Revolution 4th Mix Solo (G*A33 VER. JBA)", GAME_IMPERFECT_GRAPHICS | GAME_IMPERFECT_SOUND | GAME_NOT_WORKING ) /* BOOT VER 1.8 */
	4603	GAME( 2000, dsfdr,    sys573,   konami573, ddr,       ddrdigital, ROT0, "Konami", "Dancing Stage Featuring Disney's Rave (GCA37JAA)", GAME_IMPERFECT_GRAPHICS | GAME_IMPERFECT_SOUND | GAME_NOT_WORKING ) /* BOOT VER 1.8 */
4577	4604	GAME( 2000, ddrusa,   sys573,   konami573, ddr,       ddrdigital, ROT0, "Konami", "Dance Dance Revolution USA (G*A44 VER. UAA)", GAME_IMPERFECT_GRAPHICS | GAME_IMPERFECT_SOUND | GAME_NOT_WORKING ) /* BOOT VER 1.8 */
4578	4605	GAME( 2000, ddr4mp,   sys573,   konami573, ddr,       ddrdigital, ROT0, "Konami", "Dance Dance Revolution 4th Mix Plus (G*A34 VER. JAA)", GAME_IMPERFECT_GRAPHICS | GAME_IMPERFECT_SOUND | GAME_NOT_WORKING ) /* BOOT VER 1.9 */
4579	4606	GAME( 2000, ddr4mps,  sys573,   konami573, ddrsolo,   ddrsolo,    ROT0, "Konami", "Dance Dance Revolution 4th Mix Plus Solo (G*A34 VER. JAA)", GAME_IMPERFECT_GRAPHICS | GAME_IMPERFECT_SOUND | GAME_NOT_WORKING ) /* BOOT VER 1.9 */

src/mame/drivers/atarig1.c

r4679	r4680
51	51
52	52	static void update_interrupts(running_machine *machine)
53	53	{
54		cpu_set_input_line(machine->cpu[0], 1, atarigen_video_int_state ? ASSERT_LINE : CLEAR_LINE);
55		cpu_set_input_line(machine->cpu[0], 2, atarigen_sound_int_state ? ASSERT_LINE : CLEAR_LINE);
	54	cputag_set_input_line(machine, "maincpu", 1, atarigen_video_int_state ? ASSERT_LINE : CLEAR_LINE);
	55	cputag_set_input_line(machine, "maincpu", 2, atarigen_sound_int_state ? ASSERT_LINE : CLEAR_LINE);
56	56	}
57	57
58	58
r4679	r4680
193	193	static void pitfighb_cheap_slapstic_init(running_machine *machine)
194	194	{
195	195	/* install a read handler */
196		bslapstic_base = memory_install_read16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x038000, 0x03ffff, 0, 0, pitfighb_cheap_slapstic_r);
	196	bslapstic_base = memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x038000, 0x03ffff, 0, 0, pitfighb_cheap_slapstic_r);
197	197
198	198	/* allocate memory for a copy of bank 0 */
199		bslapstic_bank0 = auto_malloc(0x2000);
	199	bslapstic_bank0 = auto_alloc_array(machine, UINT8, 0x2000);
200	200	memcpy(bslapstic_bank0, bslapstic_base, 0x2000);
201	201
202	202	/* not primed by default */
r4679	r4680
746	746	ROM_LOAD( "136081-1027.15l",  0x000000, 0x10000, CRC(a59f381d) SHA1(b14e878340ad2adbf4f6d4fc331c58f62037c7c7) ) /* alphanumerics */
747	747
748	748	ROM_REGION16_BE( 0x200000, "gfx3", 0 )
749		/* missing 1st half on each rom */
750		//  ROM_LOAD16_BYTE( "136081-1065.65r", 0x080001, 0x40000, CRC(3bcad459) SHA1(08084fb9761ee8216b809a42eeb73c6c42e3b081) )
751		//  ROM_LOAD16_BYTE( "136081-1066.65n", 0x080000, 0x40000, CRC(d3a274ab) SHA1(9a791c5df45e317f7f88b384333d563b0ff566ea) )
752		//  ROM_LOAD16_BYTE( "136081-1067.70r", 0x180001, 0x40000, CRC(6e05d0a5) SHA1(ac5aaac3644af8c3ad852ce7f8b3248910df2e3a) )
753		//  ROM_LOAD16_BYTE( "136081-1068.70n", 0x180000, 0x40000, CRC(343ae455) SHA1(85d785f4e05ea74ca47df199c6b3f120028b9c37) )
	749	ROM_LOAD16_BYTE( "136081-1065.65r", 0x000001, 0x80000, CRC(6d3a834f) SHA1(6e153fee39b6a932aeb101e69e3557355a637c76) ) /* Same data as other sets, but in four mask roms */
	750	ROM_LOAD16_BYTE( "136081-1066.65n", 0x000000, 0x80000, CRC(0f7f5117) SHA1(e9d3d0db388a5f7d76de363018d92fa59bf8113a) )
	751	ROM_LOAD16_BYTE( "136081-1067.70r", 0x100001, 0x80000, CRC(ca4f75a8) SHA1(f8b8b03df4ad043a48970a0f8a4c3b85c7140493) )
	752	ROM_LOAD16_BYTE( "136081-1068.70n", 0x100000, 0x80000, CRC(85240517) SHA1(f3d5c0803a7958569d2f3b9c25c73d33defcabe7) )
754	753
755		ROM_LOAD16_BYTE( "136081-1001.65r",  0x000001, 0x20000, CRC(3af31444) SHA1(91fc02786b82abdf12ebdbaacdd1f158f8ce6d06) )
756		ROM_LOAD16_BYTE( "136081-1002.65n",  0x000000, 0x20000, CRC(f1d76a4c) SHA1(ca769d2cdd096f4a54f7bcaa4840fc9ffaabf499) )
757		ROM_LOAD16_BYTE( "136081-1003.70r",  0x040001, 0x20000, CRC(28c41c2a) SHA1(75cd527f98c8475e3b880f53c5a355d6c3bd8766) )
758		ROM_LOAD16_BYTE( "136081-1004.70n",  0x040000, 0x20000, CRC(977744da) SHA1(10f388eef999f702863e2b1a02a188df9a0a6086) )
759		ROM_LOAD16_BYTE( "136081-1005.75r",  0x080001, 0x20000, CRC(ae59aef2) SHA1(44eda8a01016f6911b47df973b9427ff9f2ecef0) )
760		ROM_LOAD16_BYTE( "136081-1006.75n",  0x080000, 0x20000, CRC(b6ccd77e) SHA1(f09a829143abd972699f3e671d4a1362fd362b19) )
761		ROM_LOAD16_BYTE( "136081-1007.90r",  0x0c0001, 0x20000, CRC(ba33b0c0) SHA1(be09ba8796d3db2a859a2776336c1e9acbdaee95) )
762		ROM_LOAD16_BYTE( "136081-1008.90n",  0x0c0000, 0x20000, CRC(09bd047c) SHA1(c283d526c7b08ce06e3981d1fc69433ea0dae657) )
763		ROM_LOAD16_BYTE( "136081-1009.100r", 0x100001, 0x20000, CRC(ab85b00b) SHA1(6c60b9b58ff93ffdd1cffc49c3ea67400d56bf61) )
764		ROM_LOAD16_BYTE( "136081-1010.100n", 0x100000, 0x20000, CRC(eca94bdc) SHA1(c474dfc9dc4460cd2f40cc6012214e760b133c0d) )
765		ROM_LOAD16_BYTE( "136081-1011.115r", 0x140001, 0x20000, CRC(a86582fd) SHA1(8b557622c53c8ff388248ea54d3cc85b0d77cafb) )
766		ROM_LOAD16_BYTE( "136081-1012.115n", 0x140000, 0x20000, CRC(efd1152d) SHA1(77d1752b76b079c9e834a8b73e8601873d3afdbe) )
767		ROM_LOAD16_BYTE( "136081-1013.120r", 0x180001, 0x20000, CRC(a141379e) SHA1(d4c98b364495e19e2e7bee5431834f38ba20a514) )
768		ROM_LOAD16_BYTE( "136081-1014.120n", 0x180000, 0x20000, CRC(93bfcc15) SHA1(4d8f6c8c279533b2fc35f87c3eb5ed614cb03248) )
769		ROM_LOAD16_BYTE( "136081-1015.130r", 0x1c0001, 0x20000, CRC(9378ad0b) SHA1(909f9879f5b8fc3ed0622fd27d903ccb1f7a90c6) )
770		ROM_LOAD16_BYTE( "136081-1016.130n", 0x1c0000, 0x20000, CRC(19c3fbe0) SHA1(ba28f71edb04387f009afe39bfe0ffeff8fbf5e9) )
	754	ROM_REGION( 0x40000, "adpcm", 0 )   /* 256k for ADPCM samples */
	755	ROM_LOAD( "136081-1061.7k",  0x00000, 0x10000, CRC(5b0468c6) SHA1(c910344622386e6be336fe04bc0be758ac6c59db) )
	756	ROM_LOAD( "136081-1062.7j",  0x10000, 0x10000, CRC(f73fe3cb) SHA1(547b5c4add617237c4c851751a27cda091fb7933) )
	757	ROM_LOAD( "136081-1063.7e",  0x20000, 0x10000, CRC(aa93421d) SHA1(f319057dadcb77a489d0bcffb24e0afe88adc769) )
	758	ROM_LOAD( "136081-1064.7d",  0x30000, 0x10000, CRC(33f045d5) SHA1(1fc7bedafeb3c1ffa0f115538cc300959c8d4601) )
771	759
	760	ROM_REGION( 0x0600, "proms", ROMREGION_DISPOSE )   /* microcode for growth renderer */
	761	ROM_LOAD( "136081-1040.30s",  0x0000, 0x0200, CRC(9b0f8b95) SHA1(d03987fe2d50a9f7769c600885bd1c7e1dee0789) )
	762	ROM_LOAD( "136081-1041.25s",  0x0200, 0x0200, CRC(f7ba6153) SHA1(d58792c9e9ea72d8f53f41ac1b420a86db6da3a3) )
	763	ROM_LOAD( "136081-1042.20s",  0x0400, 0x0200, CRC(3572fe68) SHA1(ab34ff337c16cd4d568cd2bd6a5063f5ed97368f) )
	764
	765	ROM_REGION( 0x1200, "plds", ROMREGION_DISPOSE )
	766	ROM_LOAD( "gal16v8a-136081-1043.15e",  0x0000, 0x0117, CRC(649d9c0d) SHA1(bba2f3cf4607946340de27157c799f6b84c48584) )
	767	ROM_LOAD( "gal16v8a-136079-1045.40p",  0x0200, 0x0117, CRC(535c4d2e) SHA1(a428eef81723546566216e6af0db3baebda9a1f2) )
	768	ROM_LOAD( "gal16v8a-136079-1046.65d",  0x0400, 0x0117, CRC(38b22b2c) SHA1(cf9051129a790f3427e1c6d74a5c66f16acbd4be) )
	769	ROM_LOAD( "gal16v8a-136079-1047.40s",  0x0600, 0x0117, CRC(20839904) SHA1(134d1b379b7708ce33fbbf75e5c879dad971cd22) )
	770	ROM_LOAD( "gal16v8a-136079-1048.125f", 0x0800, 0x0117, CRC(d16e8d6e) SHA1(61cc270d80cb34f63fc407e41b55f95d59717757) )
	771	ROM_LOAD( "gal16v8a-136079-1049.120f", 0x0a00, 0x0117, CRC(68440ab1) SHA1(2f4eabac27d9a5778fcba0d9aa47460bcb153378) )
	772	ROM_LOAD( "gal16v8a-136079-1050.115f", 0x0c00, 0x0117, CRC(20dc296a) SHA1(9179fca2efcdd0782bb15cbf1923670806755bc8) )
	773	ROM_LOAD( "gal16v8a-136079-1051.105f", 0x0e00, 0x0117, CRC(45f0cb5f) SHA1(a7043231f68374871253da50cfd905519f283d9e) )
	774	ROM_LOAD( "gal16v8a-136079-1052.30n",  0x1000, 0x0117, CRC(6b3d2669) SHA1(143178d9c36a87aa58034faea2e4d4038ae565e7) )
	775	ROM_END
	776
	777
	778	ROM_START( pitfigh5 )
	779	ROM_REGION( 0x80000, "maincpu", 0 )   /* 8*64k for 68000 code */
	780	ROM_LOAD16_BYTE( "136081-5028.05d", 0x00000, 0x10000, CRC(dd34b528) SHA1(806e01f3fd6a1335cdcfd2e41f04e9046fe433b5) )
	781	ROM_LOAD16_BYTE( "136081-5029.05b", 0x00001, 0x10000, CRC(b0ee9a09) SHA1(df85aeae2c497fbb22732704c2d581a3c195fcfb) )
	782	ROM_LOAD16_BYTE( "136081-5030.15d", 0x20000, 0x10000, CRC(6a094723) SHA1(a77046a8c5fab81cf0207122e494c32aab3b220d) )
	783	ROM_LOAD16_BYTE( "136081-5031.15b", 0x20001, 0x10000, CRC(47400d94) SHA1(07ba297a9b3ae574bc501a24fb6e46db7a5b3de5) )
	784
	785	ROM_REGION( 0x14000, "jsa", 0 )   /* 64k for 6502 code */
	786	ROM_LOAD( "136081-1060.1b", 0x10000, 0x4000, CRC(231d71d7) SHA1(24622eee5fe873ef81e1df2691bd7a1d3ea7ef6b) )
	787	ROM_CONTINUE(               0x04000, 0xc000 )
	788
	789	ROM_REGION( 0x0a0000, "gfx1", ROMREGION_DISPOSE )
	790	ROM_LOAD( "136081-1017.130m", 0x000000, 0x10000, CRC(ad3cfea5) SHA1(7b6fec131230e84ab87b7fc95f08989916f30e02) ) /* playfield, planes 0-3 odd */
	791	ROM_LOAD( "136081-1018.120m", 0x010000, 0x10000, CRC(1a0f8bcf) SHA1(b965e73246db9507d2ad42dfcb033692b43b9b7a) )
	792	ROM_LOAD( "136081-1021.90m",  0x040000, 0x10000, CRC(777efee3) SHA1(07591f11685c4c75c24c55fd242878253d32481b) ) /* playfield, planes 0-3 even */
	793	ROM_LOAD( "136081-1022.75m",  0x050000, 0x10000, CRC(524319d0) SHA1(6f47a69d7d4e2a8f79b7470138e8b4edd6d0b2bb) )
	794	ROM_LOAD( "136081-1025.45m",  0x080000, 0x10000, CRC(fc41691a) SHA1(4ef2f9093f20d27e1ba7d218b90ff6abb1f33646) ) /* playfield plane 4 */
	795
	796	ROM_REGION( 0x020000, "gfx2", ROMREGION_DISPOSE )
	797	ROM_LOAD( "136081-1027.15l",  0x000000, 0x10000, CRC(a59f381d) SHA1(b14e878340ad2adbf4f6d4fc331c58f62037c7c7) ) /* alphanumerics */
	798
	799	ROM_REGION16_BE( 0x200000, "gfx3", 0 )
	800	ROM_LOAD16_BYTE( "136081-1065.65r", 0x000001, 0x80000, CRC(6d3a834f) SHA1(6e153fee39b6a932aeb101e69e3557355a637c76) ) /* Same data as other sets, but in four mask roms */
	801	ROM_LOAD16_BYTE( "136081-1066.65n", 0x000000, 0x80000, CRC(0f7f5117) SHA1(e9d3d0db388a5f7d76de363018d92fa59bf8113a) )
	802	ROM_LOAD16_BYTE( "136081-1067.70r", 0x100001, 0x80000, CRC(ca4f75a8) SHA1(f8b8b03df4ad043a48970a0f8a4c3b85c7140493) )
	803	ROM_LOAD16_BYTE( "136081-1068.70n", 0x100000, 0x80000, CRC(85240517) SHA1(f3d5c0803a7958569d2f3b9c25c73d33defcabe7) )
	804
772	805	ROM_REGION( 0x40000, "adpcm", 0 )   /* 256k for ADPCM samples */
773	806	ROM_LOAD( "136081-1061.7k",  0x00000, 0x10000, CRC(5b0468c6) SHA1(c910344622386e6be336fe04bc0be758ac6c59db) )
774	807	ROM_LOAD( "136081-1062.7j",  0x10000, 0x10000, CRC(f73fe3cb) SHA1(547b5c4add617237c4c851751a27cda091fb7933) )
r4679	r4680
1052	1085	state_save_register_postload(machine, pitfighb_state_postload, NULL);
1053	1086	}
1054	1087	else if (slapstic != 0)
1055		atarigen_slapstic_init(machine->cpu[0], slapstic_base, 0, slapstic);
	1088	atarigen_slapstic_init(cputag_get_cpu(machine, "maincpu"), slapstic_base, 0, slapstic);
1056	1089	atarijsa_init(machine, "IN0", 0x4000);
1057	1090
1058	1091	atarig1_pitfight = is_pitfight;
r4679	r4680
1079	1112
1080	1113	GAME( 1990, pitfight, 0,        atarig1, pitfight, pitfigh7, ROT0, "Atari Games", "Pit Fighter (rev 7)", GAME_SUPPORTS_SAVE )
1081	1114	GAME( 1990, pitfigh6, pitfight, atarig1, pitfight, pitfighj, ROT0, "Atari Games", "Pit Fighter (rev 6)", GAME_SUPPORTS_SAVE )
	1115	GAME( 1990, pitfigh5, pitfight, atarig1, pitfight, pitfigh7, ROT0, "Atari Games", "Pit Fighter (rev 5)", GAME_SUPPORTS_SAVE )
1082	1116	GAME( 1990, pitfigh4, pitfight, atarig1, pitfight, pitfight, ROT0, "Atari Games", "Pit Fighter (rev 4)", GAME_SUPPORTS_SAVE )
1083	1117	GAME( 1990, pitfigh3, pitfight, atarig1, pitfight, pitfight, ROT0, "Atari Games", "Pit Fighter (rev 3)", GAME_SUPPORTS_SAVE )
1084	1118	GAME( 1990, pitfighj, pitfight, atarig1, pitfighj, pitfighj, ROT0, "Atari Games", "Pit Fighter (Japan, 2 players)", GAME_SUPPORTS_SAVE )

src/mame/drivers/sbrkout.c

r4679	r4680
117	117
118	118	/* if this is a rising edge of 16V, assert the CPU interrupt */
119	119	if (scanline % 32 == 16)
120		cpu_set_input_line(machine->cpu[0], 0, ASSERT_LINE);
	120	cputag_set_input_line(machine, "maincpu", 0, ASSERT_LINE);
121	121
122	122	/* update the DAC state */
123	123	dac_data_w(devtag_get_device(machine, "dac"), (videoram[0x380 + 0x11] & (scanline >> 2)) ? 255 : 0);
r4679	r4680
139	139
140	140	static WRITE8_HANDLER( irq_ack_w )
141	141	{
142		cpu_set_input_line(space->machine->cpu[0], 0, CLEAR_LINE);
	142	cputag_set_input_line(space->machine, "maincpu", 0, CLEAR_LINE);
143	143	}
144	144
145	145
r4679	r4680
183	183	static void update_nmi_state(running_machine *machine)
184	184	{
185	185	if ((pot_trigger[0] & ~pot_mask[0]) | (pot_trigger[1] & ~pot_mask[1]))
186		cpu_set_input_line(machine->cpu[0], INPUT_LINE_NMI, ASSERT_LINE);
	186	cputag_set_input_line(machine, "maincpu", INPUT_LINE_NMI, ASSERT_LINE);
187	187	else
188		cpu_set_input_line(machine->cpu[0], INPUT_LINE_NMI, CLEAR_LINE);
	188	cputag_set_input_line(machine, "maincpu", INPUT_LINE_NMI, CLEAR_LINE);
189	189	}
190	190
191	191

src/mame/drivers/segae.h

r4679	r4680
23	23	extern WRITE8_HANDLER( md_sms_vdp_data_w );
24	24	extern READ8_HANDLER( md_sms_vdp_ctrl_r );
25	25	extern WRITE8_HANDLER( md_sms_vdp_ctrl_w );
26		extern WRITE8_HANDLER( sms_sn76496_w );
27	26

src/mame/drivers/bladestl.c

r4679	r4680
91	91	static WRITE8_HANDLER( bladestl_sh_irqtrigger_w )
92	92	{
93	93	soundlatch_w(space, offset, data);
94		cpu_set_input_line(space->machine->cpu[1], M6809_IRQ_LINE, HOLD_LINE);
	94	cputag_set_input_line(space->machine, "audiocpu", M6809_IRQ_LINE, HOLD_LINE);
95	95	//logerror("(sound) write %02x\n", data);
96	96	}
97	97
r4679	r4680
127	127	AM_RANGE(0x2f80, 0x2f9f) AM_READWRITE(K051733_r, K051733_w)   /* Protection: 051733 */
128	128	AM_RANGE(0x2fc0, 0x2fc0) AM_WRITENOP            /* ??? */
129	129	AM_RANGE(0x4000, 0x5fff) AM_RAM                     /* Work RAM */
130		AM_RANGE(0x6000, 0x7fff) AM_READWRITE(SMH_BANK1, SMH_RAM)   /* banked ROM */
	130	AM_RANGE(0x6000, 0x7fff) AM_READWRITE(SMH_BANK(1), SMH_RAM)   /* banked ROM */
131	131	AM_RANGE(0x8000, 0xffff) AM_ROM
132	132	ADDRESS_MAP_END
133	133

src/mame/drivers/bwidow.c

r4679	r4680
305	305
306	306	static CUSTOM_INPUT( clock_r )
307	307	{
308		return (cpu_get_total_cycles(field->port->machine->cpu[0]) & 0x100) ? 1 : 0;
	308	return (cputag_get_total_cycles(field->port->machine, "maincpu") & 0x100) ? 1 : 0;
309	309	}
310	310
311	311
r4679	r4680
341	341
342	342	static WRITE8_HANDLER( irq_ack_w )
343	343	{
344		cpu_set_input_line(space->machine->cpu[0], 0, CLEAR_LINE);
	344	cputag_set_input_line(space->machine, "maincpu", 0, CLEAR_LINE);
345	345	}
346	346
347	347

src/mame/drivers/srumbler.c

r4679	r4680
53	53
54	54	static MACHINE_RESET( srumbler )
55	55	{
56		const address_space *space = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM);
	56	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
57	57	/* initialize banked ROM pointers */
58	58	srumbler_bankswitch_w(space,0,0);
59	59	}
r4679	r4680
66	66	cpu_set_input_line(device,M6809_FIRQ_LINE,HOLD_LINE);
67	67	}
68	68
69
70
71		static ADDRESS_MAP_START( readmem, ADDRESS_SPACE_PROGRAM, 8 )
72		AM_RANGE(0x0000, 0x3fff) AM_READ(SMH_RAM)   /* RAM (of 1 sort or another) */
73		AM_RANGE(0x4008, 0x4008) AM_READ_PORT("SYSTEM")
74		AM_RANGE(0x4009, 0x4009) AM_READ_PORT("P1")
75		AM_RANGE(0x400a, 0x400a) AM_READ_PORT("P2")
76		AM_RANGE(0x400b, 0x400b) AM_READ_PORT("DSW1")
77		AM_RANGE(0x400c, 0x400c) AM_READ_PORT("DSW2")
78		AM_RANGE(0x5000, 0x5fff) AM_READ(SMH_BANK6)   /* Banked ROM */
79		AM_RANGE(0x6000, 0x6fff) AM_READ(SMH_BANK7)   /* Banked ROM */
80		AM_RANGE(0x7000, 0x7fff) AM_READ(SMH_BANK8)   /* Banked ROM */
81		AM_RANGE(0x8000, 0x8fff) AM_READ(SMH_BANK9)   /* Banked ROM */
82		AM_RANGE(0x9000, 0x9fff) AM_READ(SMH_BANK10)   /* Banked ROM */
83		AM_RANGE(0xa000, 0xafff) AM_READ(SMH_BANK11)   /* Banked ROM */
84		AM_RANGE(0xb000, 0xbfff) AM_READ(SMH_BANK12)   /* Banked ROM */
85		AM_RANGE(0xc000, 0xcfff) AM_READ(SMH_BANK13)   /* Banked ROM */
86		AM_RANGE(0xd000, 0xdfff) AM_READ(SMH_BANK14)   /* Banked ROM */
87		AM_RANGE(0xe000, 0xefff) AM_READ(SMH_BANK15)   /* Banked ROM */
88		AM_RANGE(0xf000, 0xffff) AM_READ(SMH_BANK16)   /* Banked ROM */
89		ADDRESS_MAP_END
90
91	69	/*
92	70	The "scroll test" routine on the test screen appears to overflow and write
93	71	over the control registers (0x4000-0x4080) when it clears the screen.
r4679	r4680
98	76	Ignore the warnings about writing to unmapped memory.
99	77	*/
100	78
101		static ADDRESS_MAP_START( writemem, ADDRESS_SPACE_PROGRAM, 8 )
102		AM_RANGE(0x0000, 0x1dff) AM_WRITE(SMH_RAM)
103		AM_RANGE(0x1e00, 0x1fff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
104		AM_RANGE(0x2000, 0x3fff) AM_WRITE(srumbler_background_w) AM_BASE(&srumbler_backgroundram)
105		AM_RANGE(0x4008, 0x4008) AM_WRITE(srumbler_bankswitch_w)
106		AM_RANGE(0x4009, 0x4009) AM_WRITE(srumbler_4009_w)
	79	static ADDRESS_MAP_START( srumbler_map, ADDRESS_SPACE_PROGRAM, 8 )
	80	AM_RANGE(0x0000, 0x1dff) AM_RAM  /* RAM (of 1 sort or another) */
	81	AM_RANGE(0x1e00, 0x1fff) AM_RAM AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
	82	AM_RANGE(0x2000, 0x3fff) AM_RAM_WRITE(srumbler_background_w) AM_BASE(&srumbler_backgroundram)
	83	AM_RANGE(0x4008, 0x4008) AM_READ_PORT("SYSTEM") AM_WRITE(srumbler_bankswitch_w)
	84	AM_RANGE(0x4009, 0x4009) AM_READ_PORT("P1") AM_WRITE(srumbler_4009_w)
	85	AM_RANGE(0x400a, 0x400a) AM_READ_PORT("P2")
	86	AM_RANGE(0x400b, 0x400b) AM_READ_PORT("DSW1")
	87	AM_RANGE(0x400c, 0x400c) AM_READ_PORT("DSW2")
107	88	AM_RANGE(0x400a, 0x400d) AM_WRITE(srumbler_scroll_w)
108	89	AM_RANGE(0x400e, 0x400e) AM_WRITE(soundlatch_w)
109		AM_RANGE(0x5000, 0x5fff) AM_WRITE(srumbler_foreground_w) AM_BASE(&srumbler_foregroundram)
110		AM_RANGE(0x6000, 0x6fff) AM_WRITE(SMH_RAM) /* Video RAM 2 ??? (not used) */
	90	AM_RANGE(0x5000, 0x5fff) AM_ROMBANK(6)   AM_WRITE(srumbler_foreground_w) AM_BASE(&srumbler_foregroundram) /* Banked ROM */
	91	AM_RANGE(0x6000, 0x6fff) AM_ROMBANK(7)   /* Banked ROM */
	92	AM_RANGE(0x6000, 0x6fff) AM_WRITENOP    /* Video RAM 2 ??? (not used) */
	93	AM_RANGE(0x7000, 0x7fff) AM_ROMBANK(8)   /* Banked ROM */
111	94	AM_RANGE(0x7000, 0x73ff) AM_WRITE(paletteram_RRRRGGGGBBBBxxxx_be_w) AM_BASE(&paletteram)
112		AM_RANGE(0x7400, 0xffff) AM_WRITE(SMH_ROM)
	95	AM_RANGE(0x8000, 0x8fff) AM_ROMBANK(9)   /* Banked ROM */
	96	AM_RANGE(0x9000, 0x9fff) AM_ROMBANK(10)   /* Banked ROM */
	97	AM_RANGE(0xa000, 0xafff) AM_ROMBANK(11)   /* Banked ROM */
	98	AM_RANGE(0xb000, 0xbfff) AM_ROMBANK(12)   /* Banked ROM */
	99	AM_RANGE(0xc000, 0xcfff) AM_ROMBANK(13)   /* Banked ROM */
	100	AM_RANGE(0xd000, 0xdfff) AM_ROMBANK(14)   /* Banked ROM */
	101	AM_RANGE(0xe000, 0xefff) AM_ROMBANK(15)   /* Banked ROM */
	102	AM_RANGE(0xf000, 0xffff) AM_ROMBANK(16)   /* Banked ROM */
113	103	ADDRESS_MAP_END
114	104
115		static ADDRESS_MAP_START( sound_readmem, ADDRESS_SPACE_PROGRAM, 8 )
116		AM_RANGE(0xe000, 0xe000) AM_READ(soundlatch_r)
117		AM_RANGE(0xc000, 0xc7ff) AM_READ(SMH_RAM)
118		AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM)
119		ADDRESS_MAP_END
120
121		static ADDRESS_MAP_START( sound_writemem, ADDRESS_SPACE_PROGRAM, 8 )
122		AM_RANGE(0xc000, 0xc7ff) AM_WRITE(SMH_RAM)
	105	static ADDRESS_MAP_START( srumbler_sound_map, ADDRESS_SPACE_PROGRAM, 8 )
	106	AM_RANGE(0x0000, 0x7fff) AM_ROM
123	107	AM_RANGE(0x8000, 0x8001) AM_DEVWRITE("ym1", ym2203_w)
124	108	AM_RANGE(0xa000, 0xa001) AM_DEVWRITE("ym2", ym2203_w)
125		AM_RANGE(0x0000, 0x7fff) AM_WRITE(SMH_ROM)
	109	AM_RANGE(0xc000, 0xc7ff) AM_RAM
	110	AM_RANGE(0xe000, 0xe000) AM_READ(soundlatch_r)
126	111	ADDRESS_MAP_END
127	112
128	113
r4679	r4680
257	242
258	243	/* basic machine hardware */
259	244	MDRV_CPU_ADD("maincpu", M6809, 1500000)        /* 1.5 MHz (?) */
260		MDRV_CPU_PROGRAM_MAP(readmem,writemem)
	245	MDRV_CPU_PROGRAM_MAP(srumbler_map,0)
261	246	MDRV_CPU_VBLANK_INT_HACK(srumbler_interrupt,2)
262	247
263	248	MDRV_CPU_ADD("audiocpu", Z80, 3000000)        /* 3 MHz ??? */
264		MDRV_CPU_PROGRAM_MAP(sound_readmem,sound_writemem)
	249	MDRV_CPU_PROGRAM_MAP(srumbler_sound_map,0)
265	250	MDRV_CPU_VBLANK_INT_HACK(irq0_line_hold,4)
266	251
267	252	MDRV_MACHINE_RESET(srumbler)

src/mame/drivers/legionna.c

r4679	r4680
957	957	int len = 0x10000;
958	958
959	959	/*  rearrange gfx */
960		buffer = malloc_or_die(len);
	960	buffer = alloc_array_or_die(UINT8, len);
961	961	{
962	962	int i;
963	963	for (i = 0;i < len; i++)

src/mame/drivers/pbaction.c

r4679	r4680
86	86	static WRITE8_HANDLER( pbaction_sh_command_w )
87	87	{
88	88	soundlatch_w(space,offset,data);
89		cpu_set_input_line_and_vector(space->machine->cpu[1],0,HOLD_LINE,0x00);
	89	cputag_set_input_line_and_vector(space->machine, "audiocpu", 0, HOLD_LINE, 0x00);
90	90	}
91	91
92	92
93	93	static UINT8 *work_ram;
94	94
95	95
96		static ADDRESS_MAP_START( readmem, ADDRESS_SPACE_PROGRAM, 8 )
97		AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM)
98		AM_RANGE(0x8000, 0xbfff) AM_READ(SMH_ROM)
99		AM_RANGE(0xc000, 0xdfff) AM_READ(SMH_RAM)
100		AM_RANGE(0xe000, 0xe07f) AM_READ(SMH_RAM)
101		AM_RANGE(0xe400, 0xe5ff) AM_READ(SMH_RAM)
102		AM_RANGE(0xe600, 0xe600) AM_READ_PORT("P1")
	96	static ADDRESS_MAP_START( pbaction_map, ADDRESS_SPACE_PROGRAM, 8 )
	97	AM_RANGE(0x0000, 0x7fff) AM_ROM
	98	AM_RANGE(0x8000, 0xbfff) AM_ROM
	99	AM_RANGE(0xc000, 0xcfff) AM_RAM AM_BASE(&work_ram)
	100	AM_RANGE(0xd000, 0xd3ff) AM_RAM_WRITE(pbaction_videoram2_w) AM_BASE(&pbaction_videoram2)
	101	AM_RANGE(0xd400, 0xd7ff) AM_RAM_WRITE(pbaction_colorram2_w) AM_BASE(&pbaction_colorram2)
	102	AM_RANGE(0xd800, 0xdbff) AM_RAM_WRITE(pbaction_videoram_w) AM_BASE(&videoram)
	103	AM_RANGE(0xdc00, 0xdfff) AM_RAM_WRITE(pbaction_colorram_w) AM_BASE(&colorram)
	104	AM_RANGE(0xe000, 0xe07f) AM_RAM AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
	105	AM_RANGE(0xe400, 0xe5ff) AM_RAM_WRITE(paletteram_xxxxBBBBGGGGRRRR_le_w) AM_BASE(&paletteram)
	106	AM_RANGE(0xe600, 0xe600) AM_READ_PORT("P1") AM_WRITE(interrupt_enable_w)
103	107	AM_RANGE(0xe601, 0xe601) AM_READ_PORT("P2")
104	108	AM_RANGE(0xe602, 0xe602) AM_READ_PORT("SYSTEM")
105		AM_RANGE(0xe604, 0xe604) AM_READ_PORT("DSW1")
	109	AM_RANGE(0xe604, 0xe604) AM_READ_PORT("DSW1") AM_WRITE(pbaction_flipscreen_w)
106	110	AM_RANGE(0xe605, 0xe605) AM_READ_PORT("DSW2")
107		AM_RANGE(0xe606, 0xe606) AM_READNOP   /* ??? */
108		ADDRESS_MAP_END
109
110		static ADDRESS_MAP_START( writemem, ADDRESS_SPACE_PROGRAM, 8 )
111		AM_RANGE(0x0000, 0x7fff) AM_WRITE(SMH_ROM)
112		AM_RANGE(0x8000, 0xbfff) AM_WRITE(SMH_ROM)
113		AM_RANGE(0xc000, 0xcfff) AM_WRITE(SMH_RAM) AM_BASE(&work_ram)
114		AM_RANGE(0xd000, 0xd3ff) AM_WRITE(pbaction_videoram2_w) AM_BASE(&pbaction_videoram2)
115		AM_RANGE(0xd400, 0xd7ff) AM_WRITE(pbaction_colorram2_w) AM_BASE(&pbaction_colorram2)
116		AM_RANGE(0xd800, 0xdbff) AM_WRITE(pbaction_videoram_w) AM_BASE(&videoram)
117		AM_RANGE(0xdc00, 0xdfff) AM_WRITE(pbaction_colorram_w) AM_BASE(&colorram)
118		AM_RANGE(0xe000, 0xe07f) AM_WRITE(SMH_RAM) AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
119		AM_RANGE(0xe400, 0xe5ff) AM_WRITE(paletteram_xxxxBBBBGGGGRRRR_le_w) AM_BASE(&paletteram)
120		AM_RANGE(0xe600, 0xe600) AM_WRITE(interrupt_enable_w)
121		AM_RANGE(0xe604, 0xe604) AM_WRITE(pbaction_flipscreen_w)
122		AM_RANGE(0xe606, 0xe606) AM_WRITE(pbaction_scroll_w)
	111	AM_RANGE(0xe606, 0xe606) AM_READNOP   /* ??? */ AM_WRITE(pbaction_scroll_w)
123	112	AM_RANGE(0xe800, 0xe800) AM_WRITE(pbaction_sh_command_w)
124	113	ADDRESS_MAP_END
125	114
126		static ADDRESS_MAP_START( sound_readmem, ADDRESS_SPACE_PROGRAM, 8 )
127		AM_RANGE(0x0000, 0x1fff) AM_READ(SMH_ROM)
128		AM_RANGE(0x4000, 0x47ff) AM_READ(SMH_RAM)
	115	static ADDRESS_MAP_START( pbaction_sound_map, ADDRESS_SPACE_PROGRAM, 8 )
	116	AM_RANGE(0x0000, 0x1fff) AM_ROM
	117	AM_RANGE(0x4000, 0x47ff) AM_RAM
129	118	AM_RANGE(0x8000, 0x8000) AM_READ(soundlatch_r)
130		ADDRESS_MAP_END
131
132		static ADDRESS_MAP_START( sound_writemem, ADDRESS_SPACE_PROGRAM, 8 )
133		AM_RANGE(0x0000, 0x1fff) AM_WRITE(SMH_ROM)
134		AM_RANGE(0x4000, 0x47ff) AM_WRITE(SMH_RAM)
135	119	AM_RANGE(0xffff, 0xffff) AM_WRITENOP   /* watchdog? */
136	120	ADDRESS_MAP_END
137	121
138	122
139		static ADDRESS_MAP_START( sound_io_map, ADDRESS_SPACE_IO, 8 )
	123	static ADDRESS_MAP_START( pbaction_sound_io_map, ADDRESS_SPACE_IO, 8 )
140	124	ADDRESS_MAP_GLOBAL_MASK(0xff)
141	125	AM_RANGE(0x10, 0x11) AM_DEVWRITE("ay1", ay8910_address_data_w)
142	126	AM_RANGE(0x20, 0x21) AM_DEVWRITE("ay2", ay8910_address_data_w)
r4679	r4680
286	270
287	271	/* basic machine hardware */
288	272	MDRV_CPU_ADD("maincpu", Z80, 4000000)   /* 4 MHz? */
289		MDRV_CPU_PROGRAM_MAP(readmem,writemem)
	273	MDRV_CPU_PROGRAM_MAP(pbaction_map,0)
290	274	MDRV_CPU_VBLANK_INT("screen", nmi_line_pulse)
291	275
292	276	MDRV_CPU_ADD("audiocpu", Z80, 3072000)
293		MDRV_CPU_PROGRAM_MAP(sound_readmem,sound_writemem)
294		MDRV_CPU_IO_MAP(sound_io_map,0)
	277	MDRV_CPU_PROGRAM_MAP(pbaction_sound_map,0)
	278	MDRV_CPU_IO_MAP(pbaction_sound_io_map,0)
295	279	MDRV_CPU_VBLANK_INT_HACK(pbaction_interrupt,2)   /* ??? */
296	280	/* IRQs are caused by the main CPU */
297	281
r4679	r4680
437	421	pbaction_decode(machine, "maincpu");
438	422
439	423	/* install a protection (?) workaround */
440		memory_install_read8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xc000, 0xc000, 0, 0, pbactio3_prot_kludge_r );
	424	memory_install_read8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xc000, 0xc000, 0, 0, pbactio3_prot_kludge_r );
441	425	}
442	426
443	427

src/mame/drivers/re900.c

r4679	r4680
228	228
229	229	static void vdp_interrupt (running_machine *machine, int state)
230	230	{
231		cpu_set_input_line(machine->cpu[0], INPUT_LINE_NMI, state ? ASSERT_LINE : CLEAR_LINE );
	231	cputag_set_input_line(machine, "maincpu", INPUT_LINE_NMI, state ? ASSERT_LINE : CLEAR_LINE );
232	232	}
233	233
234	234

src/mame/drivers/funworld.c

r4679	r4680
3061	3061	rom[i] = BITSWAP8(rom[i], 7, 6, 5, 4, 3, 0, 1, 2);
3062	3062	}
3063	3063
3064		buffer = malloc_or_die(size);
	3064	buffer = alloc_array_or_die(UINT8, size);
3065	3065	memcpy(buffer, rom, size);
3066	3066
3067	3067
r4679	r4680
3080	3080	*   Graphics ROM decryption   *
3081	3081	******************************/
3082	3082
3083		buffer = malloc_or_die(sizeg);
	3083	buffer = alloc_array_or_die(UINT8, sizeg);
3084	3084	memcpy(buffer, gfxrom, sizeg);
3085	3085
3086	3086	/* address lines swap: fedcba9876543210 -> fedcb67584a39012 */
r4679	r4680
3105	3105	prom[i] = BITSWAP8(prom[i], 2, 3, 5, 4, 6, 7, 1, 0);
3106	3106	}
3107	3107
3108		buffer = malloc_or_die(sizep);
	3108	buffer = alloc_array_or_die(UINT8, sizep);
3109	3109	memcpy(buffer, prom, sizep);
3110	3110
3111	3111

src/mame/drivers/overdriv.c

r4679	r4680
7	7	Notes:
8	8	- Missing road (two unemulated K053250)
9	9	- Visible area and relative placement of sprites and tiles is most likely wrong.
10		- Test mode doesn't work well with 3 IRQ5 per frame, the ROM check doens't work
	10	- Test mode doesn't work well with 3 IRQ5 per frame, the ROM check doesn't work
11	11	and the coin A setting isn't shown. It's OK with 1 IRQ5 per frame.
12	12	- Some flickering sprites, this might be an interrupt/timing issue
13	13	- The screen is cluttered with sprites which aren't supposed to be visible,
r4679	r4680
26	26	#include "cpu/m6809/m6809.h"
27	27	#include "sound/2151intf.h"
28	28	#include "sound/k053260.h"
29
30	29	#include "overdriv.lh"
31	30
32
33	31	VIDEO_START( overdriv );
34	32	VIDEO_UPDATE( overdriv );
35	33
36	34
37
38
39	35	static READ16_HANDLER( K051316_0_msb_r )
40	36	{
41	37	return K051316_0_r(space,offset) << 8;
r4679	r4680
159	155	static MACHINE_RESET( overdriv )
160	156	{
161	157	/* start with cpu B halted */
162		cpu_set_input_line(machine->cpu[1], INPUT_LINE_RESET, ASSERT_LINE);
	158	cputag_set_input_line(machine, "sub", INPUT_LINE_RESET, ASSERT_LINE);
163	159	}
164	160
165	161	static WRITE16_HANDLER( cpuA_ctrl_w )
r4679	r4680
167	163	if (ACCESSING_BITS_0_7)
168	164	{
169	165	/* bit 0 probably enables the second 68000 */
170		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_RESET, (data & 0x01) ? CLEAR_LINE : ASSERT_LINE);
	166	cputag_set_input_line(space->machine, "maincpu", INPUT_LINE_RESET, (data & 0x01) ? CLEAR_LINE : ASSERT_LINE);
171	167
172	168	/* bit 1 is clear during service mode - function unknown */
173	169
174		set_led_status(0,data & 0x08);
175		coin_counter_w(0,data & 0x10);
176		coin_counter_w(1,data & 0x20);
	170	set_led_status(0, data & 0x08);
	171	coin_counter_w(0, data & 0x10);
	172	coin_counter_w(1, data & 0x20);
177	173
178	174	//logerror("%06x: write %04x to cpuA_ctrl_w\n",cpu_get_pc(space->cpu),data);
179	175	}
r4679	r4680
203	199	}
204	200
205	201
206		static UINT16 *sharedram;
207
208		static READ16_HANDLER( sharedram_r )
209		{
210		return sharedram[offset];
211		}
212
213		static WRITE16_HANDLER( sharedram_w )
214		{
215		COMBINE_DATA(&sharedram[offset]);
216		}
217
218
219
220	202	static READ8_DEVICE_HANDLER( overdriv_sound_r )
221	203	{
222	204	return k053260_r(device,2 + offset);
r4679	r4680
224	206
225	207	static WRITE16_HANDLER( overdriv_soundirq_w )
226	208	{
227		cpu_set_input_line(space->machine->cpu[2],M6809_IRQ_LINE,HOLD_LINE);
	209	cputag_set_input_line(space->machine, "audiocpu", M6809_IRQ_LINE, HOLD_LINE);
228	210	}
229	211
230	212	static WRITE16_HANDLER( overdriv_cpuB_irq5_w )
231	213	{
232		cpu_set_input_line(space->machine->cpu[1],5,HOLD_LINE);
	214	cputag_set_input_line(space->machine, "audiocpu", 5, HOLD_LINE);
233	215	}
234	216
235	217	static WRITE16_HANDLER( overdriv_cpuB_irq6_w )
236	218	{
237		cpu_set_input_line(space->machine->cpu[1],6,HOLD_LINE);
	219	cputag_set_input_line(space->machine, "audiocpu", 6, HOLD_LINE);
238	220	}
239	221
240	222
241	223
242	224
243		static ADDRESS_MAP_START( overdriv_readmem, ADDRESS_SPACE_PROGRAM, 16 )
244		AM_RANGE(0x000000, 0x03ffff) AM_READ(SMH_ROM)
245		AM_RANGE(0x040000, 0x043fff) AM_READ(SMH_RAM)
246		AM_RANGE(0x080000, 0x080fff) AM_READ(SMH_RAM)
	225	static ADDRESS_MAP_START( overdriv_master_map, ADDRESS_SPACE_PROGRAM, 16 )
	226	AM_RANGE(0x000000, 0x03ffff) AM_ROM
	227	AM_RANGE(0x040000, 0x043fff) AM_RAM               /* work RAM */
	228	AM_RANGE(0x080000, 0x080fff) AM_RAM_WRITE(paletteram16_xBBBBBGGGGGRRRRR_word_w) AM_BASE(&paletteram16)
247	229	AM_RANGE(0x0c0000, 0x0c0001) AM_READ_PORT("INPUTS")
248	230	AM_RANGE(0x0c0002, 0x0c0003) AM_READ_PORT("SYSTEM")
249		AM_RANGE(0x180000, 0x180001) AM_READ_PORT("PADDLE")
250		AM_RANGE(0x1d8000, 0x1d8003) AM_DEVREAD8("konami1", overdriv_sound_r, 0x00ff)   /* K053260 */
251		AM_RANGE(0x1e0000, 0x1e0003) AM_DEVREAD8("konami2", overdriv_sound_r, 0x00ff)   /* K053260 */
252		AM_RANGE(0x200000, 0x203fff) AM_READ(sharedram_r)
253		AM_RANGE(0x210000, 0x210fff) AM_READ(K051316_0_msb_r)
254		AM_RANGE(0x218000, 0x218fff) AM_READ(K051316_1_msb_r)
255		AM_RANGE(0x220000, 0x220fff) AM_READ(K051316_rom_0_msb_r)
256		AM_RANGE(0x228000, 0x228fff) AM_READ(K051316_rom_1_msb_r)
257		ADDRESS_MAP_END
258
259		static ADDRESS_MAP_START( overdriv_writemem, ADDRESS_SPACE_PROGRAM, 16 )
260		AM_RANGE(0x000000, 0x03ffff) AM_WRITE(SMH_ROM)
261		AM_RANGE(0x040000, 0x043fff) AM_WRITE(SMH_RAM)   /* work RAM */
262		AM_RANGE(0x080000, 0x080fff) AM_WRITE(paletteram16_xBBBBBGGGGGRRRRR_word_w) AM_BASE(&paletteram16)
263		AM_RANGE(0x0e0000, 0x0e0001) AM_WRITENOP   /* unknown (always 0x30) */
264		AM_RANGE(0x100000, 0x10001f) AM_WRITENOP   /* 053252? (LSB) */
	231	AM_RANGE(0x0e0000, 0x0e0001) AM_WRITENOP         /* unknown (always 0x30) */
	232	AM_RANGE(0x100000, 0x10001f) AM_WRITENOP         /* 053252? (LSB) */
265	233	AM_RANGE(0x140000, 0x140001) AM_WRITE(watchdog_reset16_w)
	234	AM_RANGE(0x180000, 0x180001) AM_READ_PORT("PADDLE")
266	235	AM_RANGE(0x1c0000, 0x1c001f) AM_WRITE(K051316_ctrl_0_msb_w)
267	236	AM_RANGE(0x1c8000, 0x1c801f) AM_WRITE(K051316_ctrl_1_msb_w)
268	237	AM_RANGE(0x1d0000, 0x1d001f) AM_WRITE(K053251_msb_w)
269		AM_RANGE(0x1d8000, 0x1d8003) AM_DEVWRITE8("konami1", k053260_w, 0x00ff)
270		AM_RANGE(0x1e0000, 0x1e0003) AM_DEVWRITE8("konami2", k053260_w, 0x00ff)
	238	AM_RANGE(0x1d8000, 0x1d8003) AM_DEVREADWRITE8("konami1", overdriv_sound_r, k053260_w, 0x00ff)   /* K053260 */
	239	AM_RANGE(0x1e0000, 0x1e0003) AM_DEVREADWRITE8("konami2", overdriv_sound_r, k053260_w, 0x00ff)   /* K053260 */
271	240	AM_RANGE(0x1e8000, 0x1e8001) AM_WRITE(overdriv_soundirq_w)
272	241	AM_RANGE(0x1f0000, 0x1f0001) AM_WRITE(cpuA_ctrl_w)   /* halt cpu B, coin counter, start lamp, other? */
273	242	AM_RANGE(0x1f8000, 0x1f8001) AM_WRITE(eeprom_w)
274		AM_RANGE(0x200000, 0x203fff) AM_WRITE(sharedram_w) AM_BASE(&sharedram)
275		AM_RANGE(0x210000, 0x210fff) AM_WRITE(K051316_0_msb_w)
276		AM_RANGE(0x218000, 0x218fff) AM_WRITE(K051316_1_msb_w)
	243	AM_RANGE(0x200000, 0x203fff) AM_RAM AM_SHARE(1)
	244	AM_RANGE(0x210000, 0x210fff) AM_READWRITE(K051316_0_msb_r,K051316_0_msb_w)
	245	AM_RANGE(0x218000, 0x218fff) AM_READWRITE(K051316_1_msb_r,K051316_1_msb_w)
	246	AM_RANGE(0x220000, 0x220fff) AM_READ(K051316_rom_0_msb_r)
	247	AM_RANGE(0x228000, 0x228fff) AM_READ(K051316_rom_1_msb_r)
277	248	AM_RANGE(0x230000, 0x230001) AM_WRITE(overdriv_cpuB_irq6_w)
278	249	AM_RANGE(0x238000, 0x238001) AM_WRITE(overdriv_cpuB_irq5_w)
279	250	ADDRESS_MAP_END
280	251
281
282		static ADDRESS_MAP_START( overdriv_readmem2, ADDRESS_SPACE_PROGRAM, 16 )
283		AM_RANGE(0x000000, 0x03ffff) AM_READ(SMH_ROM)
284		AM_RANGE(0x080000, 0x083fff) AM_READ(SMH_RAM)
285		AM_RANGE(0x0c0000, 0x0c1fff) AM_READ(SMH_RAM)
286		AM_RANGE(0x100000, 0x10000f) AM_READNOP   // K053250 #0
287		AM_RANGE(0x108000, 0x10800f) AM_READNOP   // K053250 #1
288		AM_RANGE(0x118000, 0x118fff) AM_READ(K053247_word_r)
	252	static ADDRESS_MAP_START( overdriv_slave_map, ADDRESS_SPACE_PROGRAM, 16 )
	253	AM_RANGE(0x000000, 0x03ffff) AM_ROM
	254	AM_RANGE(0x080000, 0x083fff) AM_RAM /* work RAM */
	255	AM_RANGE(0x0c0000, 0x0c1fff) AM_RAM
	256	AM_RANGE(0x100000, 0x10000f) AM_NOP   // K053250 #0
	257	AM_RANGE(0x108000, 0x10800f) AM_NOP   // K053250 #1
	258	AM_RANGE(0x118000, 0x118fff) AM_READWRITE(K053247_word_r,K053247_word_w)
289	259	AM_RANGE(0x120000, 0x120001) AM_READ(K053246_word_r)
290		AM_RANGE(0x128000, 0x128001) AM_READ(cpuB_ctrl_r)
291		AM_RANGE(0x200000, 0x203fff) AM_READ(sharedram_r)
292		AM_RANGE(0x208000, 0x20bfff) AM_READ(SMH_RAM)
293
	260	AM_RANGE(0x128000, 0x128001) AM_READWRITE(cpuB_ctrl_r,cpuB_ctrl_w)    /* enable K053247 ROM reading, plus something else */
	261	AM_RANGE(0x130000, 0x130007) AM_WRITE(K053246_word_w)
	262	AM_RANGE(0x200000, 0x203fff) AM_RAM AM_SHARE(1)
	263	AM_RANGE(0x208000, 0x20bfff) AM_RAM
294	264	AM_RANGE(0x218000, 0x219fff) AM_READNOP   // K053250 #0 gfx ROM read (LSB)
295	265	AM_RANGE(0x220000, 0x221fff) AM_READNOP   // K053250 #1 gfx ROM read (LSB)
296	266	ADDRESS_MAP_END
297	267
298		static ADDRESS_MAP_START( overdriv_writemem2, ADDRESS_SPACE_PROGRAM, 16 )
299		AM_RANGE(0x000000, 0x03ffff) AM_WRITE(SMH_ROM)
300		AM_RANGE(0x080000, 0x083fff) AM_WRITE(SMH_RAM)   /* work RAM */
301		AM_RANGE(0x0c0000, 0x0c1fff) AM_WRITE(SMH_RAM)
302		AM_RANGE(0x100000, 0x10000f) AM_WRITENOP   // K053250 #0
303		AM_RANGE(0x108000, 0x10800f) AM_WRITENOP   // K053250 #1
304		AM_RANGE(0x118000, 0x118fff) AM_WRITE(K053247_word_w)
305		AM_RANGE(0x128000, 0x128001) AM_WRITE(cpuB_ctrl_w)   /* enable K053247 ROM reading, plus something else */
306		AM_RANGE(0x130000, 0x130007) AM_WRITE(K053246_word_w)
307		AM_RANGE(0x200000, 0x203fff) AM_WRITE(sharedram_w)
308		AM_RANGE(0x208000, 0x20bfff) AM_WRITE(SMH_RAM)
	268	static ADDRESS_MAP_START( overdriv_sound_map, ADDRESS_SPACE_PROGRAM, 8 )
	269	AM_RANGE(0x0200, 0x0201) AM_DEVREADWRITE("ym", ym2151_r,ym2151_w)
	270	AM_RANGE(0x0400, 0x042f) AM_DEVREADWRITE("konami1", k053260_r,k053260_w)
	271	AM_RANGE(0x0600, 0x062f) AM_DEVREADWRITE("konami2", k053260_r,k053260_w)
	272	AM_RANGE(0x0800, 0x0fff) AM_RAM
	273	AM_RANGE(0x1000, 0xffff) AM_ROM
309	274	ADDRESS_MAP_END
310	275
311	276
312		static ADDRESS_MAP_START( overdriv_s_readmem, ADDRESS_SPACE_PROGRAM, 8 )
313		AM_RANGE(0x0200, 0x0201) AM_DEVREAD("ym", ym2151_r)
314		AM_RANGE(0x0400, 0x042f) AM_DEVREAD("konami1", k053260_r)
315		AM_RANGE(0x0600, 0x062f) AM_DEVREAD("konami2", k053260_r)
316		AM_RANGE(0x0800, 0x0fff) AM_READ(SMH_RAM)
317		AM_RANGE(0x1000, 0xffff) AM_READ(SMH_ROM)
318		ADDRESS_MAP_END
319
320		static ADDRESS_MAP_START( overdriv_s_writemem, ADDRESS_SPACE_PROGRAM, 8 )
321		AM_RANGE(0x0200, 0x0201) AM_DEVWRITE("ym", ym2151_w)
322		AM_RANGE(0x0400, 0x042f) AM_DEVWRITE("konami1", k053260_w)
323		AM_RANGE(0x0600, 0x062f) AM_DEVWRITE("konami2", k053260_w)
324		AM_RANGE(0x0800, 0x0fff) AM_WRITE(SMH_RAM)
325		AM_RANGE(0x1000, 0xffff) AM_WRITE(SMH_ROM)
326		ADDRESS_MAP_END
327
328	277	/* Both IPT_START1 assignments are needed. The game will reset during */
329	278	/* the "continue" sequence if the assignment on the first port        */
330	279	/* is missing.                                                        */
r4679	r4680
385	334
386	335	/* basic machine hardware */
387	336	MDRV_CPU_ADD("maincpu", M68000,24000000/2)   /* 12 MHz */
388		MDRV_CPU_PROGRAM_MAP(overdriv_readmem,overdriv_writemem)
	337	MDRV_CPU_PROGRAM_MAP(overdriv_master_map,0)
389	338	MDRV_CPU_VBLANK_INT_HACK(cpuA_interrupt,4)   /* ??? IRQ 4 is vblank, IRQ 5 of unknown origin */
390	339
391	340	MDRV_CPU_ADD("sub", M68000,24000000/2)   /* 12 MHz */
392		MDRV_CPU_PROGRAM_MAP(overdriv_readmem2,overdriv_writemem2)
	341	MDRV_CPU_PROGRAM_MAP(overdriv_slave_map,0)
393	342	MDRV_CPU_VBLANK_INT("screen", cpuB_interrupt)   /* IRQ 5 and 6 are generated by the main CPU. */
394	343	/* IRQ 5 is used only in test mode, to request the checksums of the gfx ROMs. */
395	344	MDRV_CPU_ADD("audiocpu", M6809,3579545/2)   /* 1.789 MHz?? This might be the right speed, but ROM testing */
396	345	/* takes a little too much (the counter wraps from 0000 to 9999). */
397	346	/* This might just mean that the video refresh rate is less than */
398	347	/* 60 fps, that's how I fixed it for now. */
399		MDRV_CPU_PROGRAM_MAP(overdriv_s_readmem,overdriv_s_writemem)
	348	MDRV_CPU_PROGRAM_MAP(overdriv_sound_map,0)
400	349
401	350	MDRV_QUANTUM_TIME(HZ(12000))
402	351
r4679	r4680
423	372	MDRV_SPEAKER_STANDARD_STEREO("lspeaker", "rspeaker")
424	373
425	374	MDRV_SOUND_ADD("ym", YM2151, 3579545)
426		MDRV_SOUND_ROUTE(0, "lspeaker", 1.0)
427		MDRV_SOUND_ROUTE(1, "rspeaker", 1.0)
	375	MDRV_SOUND_ROUTE(0, "lspeaker", 0.5)
	376	MDRV_SOUND_ROUTE(1, "rspeaker", 0.5)
428	377
429	378	MDRV_SOUND_ADD("konami1", K053260, 3579545)
430	379	MDRV_SOUND_CONFIG(k053260_config)
431		MDRV_SOUND_ROUTE(0, "lspeaker", 0.70)
432		MDRV_SOUND_ROUTE(1, "rspeaker", 0.70)
	380	MDRV_SOUND_ROUTE(0, "lspeaker", 0.35)
	381	MDRV_SOUND_ROUTE(1, "rspeaker", 0.35)
433	382
434	383	MDRV_SOUND_ADD("konami2", K053260, 3579545)
435	384	MDRV_SOUND_CONFIG(k053260_config)
436		MDRV_SOUND_ROUTE(0, "lspeaker", 0.70)
437		MDRV_SOUND_ROUTE(1, "rspeaker", 0.70)
	385	MDRV_SOUND_ROUTE(0, "lspeaker", 0.35)
	386	MDRV_SOUND_ROUTE(1, "rspeaker", 0.35)
438	387	MACHINE_DRIVER_END
439	388
440	389
r4679	r4680
484	433	ROM_END
485	434
486	435
487
488	436	static DRIVER_INIT( overdriv )
489	437	{
490	438	konami_rom_deinterleave_4(machine, "gfx1");
491	439	}
492	440
493	441
494
495		GAMEL( 1990, overdriv, 0, overdriv, overdriv, overdriv, ROT90, "Konami", "Over Drive", GAME_IMPERFECT_GRAPHICS, layout_overdriv )
	442	GAMEL( 1990, overdriv, 0, overdriv, overdriv, overdriv, ROT90, "Konami", "Over Drive", GAME_IMPERFECT_GRAPHICS | GAME_NOT_WORKING, layout_overdriv )

src/mame/drivers/thunderx.c

r4679	r4680
36	36
37	37	static TIMER_CALLBACK( thunderx_firq_callback )
38	38	{
39		cpu_set_input_line(machine->cpu[0], KONAMI_FIRQ_LINE, HOLD_LINE);
	39	cputag_set_input_line(machine, "maincpu", KONAMI_FIRQ_LINE, HOLD_LINE);
40	40	}
41	41
42	42
r4679	r4680
356	356
357	357	static WRITE8_HANDLER( thunderx_sh_irqtrigger_w )
358	358	{
359		cpu_set_input_line_and_vector(space->machine->cpu[1],0,HOLD_LINE,0xff);
	359	cputag_set_input_line_and_vector(space->machine, "audiocpu", 0, HOLD_LINE, 0xff);
360	360	}
361	361
362	362	static WRITE8_DEVICE_HANDLER( scontra_snd_bankswitch_w )
r4679	r4680
909	909	{
910	910	UINT8 *RAM = memory_region(machine, "maincpu");
911	911
912		konami_configure_set_lines(machine->cpu[0], thunderx_banking);
913		memory_set_bankptr(machine,  1, &RAM[0x10000] ); /* init the default bank */
	912	konami_configure_set_lines(cputag_get_cpu(machine, "maincpu"), thunderx_banking);
	913	memory_set_bankptr(machine, 1, &RAM[0x10000] ); /* init the default bank */
914	914
915	915	paletteram = &RAM[0x28000];
916	916	pmcram = &RAM[0x28800];

src/mame/drivers/spcforce.c

r4679	r4680
53	53
54	54	static READ8_HANDLER( spcforce_SN76496_select_r )
55	55	{
56		return spcforce_SN76496_select;
	56	if (~spcforce_SN76496_select & 0x40) return sn76496_ready_r(devtag_get_device(space->machine, "sn1"), 0 );
	57	if (~spcforce_SN76496_select & 0x20) return sn76496_ready_r(devtag_get_device(space->machine, "sn2"), 0 );
	58	if (~spcforce_SN76496_select & 0x10) return sn76496_ready_r(devtag_get_device(space->machine, "sn3"), 0 );
	59
	60	return 0;
57	61	}
58	62
59	63	static WRITE8_HANDLER( spcforce_SN76496_select_w )
r4679	r4680
74	78
75	79	static WRITE8_HANDLER( spcforce_soundtrigger_w )
76	80	{
77		cpu_set_input_line(space->machine->cpu[1], 0, (~data & 0x08) ? ASSERT_LINE : CLEAR_LINE);
	81	cputag_set_input_line(space->machine, "audiocpu", 0, (~data & 0x08) ? ASSERT_LINE : CLEAR_LINE);
78	82	}
79	83
80	84
81		static ADDRESS_MAP_START( readmem, ADDRESS_SPACE_PROGRAM, 8 )
82		AM_RANGE(0x0000, 0x3fff) AM_READ(SMH_ROM)
83		AM_RANGE(0x4000, 0x43ff) AM_READ(SMH_RAM)
84		AM_RANGE(0x7000, 0x7000) AM_READ_PORT("DSW")
85		AM_RANGE(0x7001, 0x7001) AM_READ_PORT("P1")
	85	static ADDRESS_MAP_START( spcforce_map, ADDRESS_SPACE_PROGRAM, 8 )
	86	AM_RANGE(0x0000, 0x3fff) AM_ROM
	87	AM_RANGE(0x4000, 0x43ff) AM_RAM
	88	AM_RANGE(0x7000, 0x7000) AM_READ_PORT("DSW") AM_WRITE(soundlatch_w)
	89	AM_RANGE(0x7001, 0x7001) AM_READ_PORT("P1") AM_WRITE(spcforce_soundtrigger_w)
86	90	AM_RANGE(0x7002, 0x7002) AM_READ_PORT("P2")
87		AM_RANGE(0x8000, 0x83ff) AM_READ(SMH_RAM)
88		AM_RANGE(0x9000, 0x93ff) AM_READ(SMH_RAM)
89		AM_RANGE(0xa000, 0xa3ff) AM_READ(SMH_RAM)
90		ADDRESS_MAP_END
91
92		static ADDRESS_MAP_START( writemem, ADDRESS_SPACE_PROGRAM, 8 )
93		AM_RANGE(0x0000, 0x3fff) AM_WRITE(SMH_ROM)
94		AM_RANGE(0x4000, 0x43ff) AM_WRITE(SMH_RAM)
95		AM_RANGE(0x7000, 0x7000) AM_WRITE(soundlatch_w)
96		AM_RANGE(0x7001, 0x7001) AM_WRITE(spcforce_soundtrigger_w)
97	91	AM_RANGE(0x700b, 0x700b) AM_WRITE(spcforce_flip_screen_w)
98	92	AM_RANGE(0x700e, 0x700e) AM_WRITE(interrupt_enable_w)
99	93	AM_RANGE(0x700f, 0x700f) AM_WRITENOP
100		AM_RANGE(0x8000, 0x83ff) AM_WRITE(SMH_RAM) AM_BASE(&videoram) AM_SIZE(&videoram_size)
101		AM_RANGE(0x9000, 0x93ff) AM_WRITE(SMH_RAM) AM_BASE(&colorram)
102		AM_RANGE(0xa000, 0xa3ff) AM_WRITE(SMH_RAM) AM_BASE(&spcforce_scrollram)
	94	AM_RANGE(0x8000, 0x83ff) AM_RAM AM_BASE(&videoram) AM_SIZE(&videoram_size)
	95	AM_RANGE(0x9000, 0x93ff) AM_RAM AM_BASE(&colorram)
	96	AM_RANGE(0xa000, 0xa3ff) AM_RAM AM_BASE(&spcforce_scrollram)
103	97	ADDRESS_MAP_END
104	98
105		static ADDRESS_MAP_START( sound_readmem, ADDRESS_SPACE_PROGRAM, 8 )
106		AM_RANGE(0x0000, 0x07ff) AM_READ(SMH_ROM)
	99	static ADDRESS_MAP_START( spcforce_sound_map, ADDRESS_SPACE_PROGRAM, 8 )
	100	AM_RANGE(0x0000, 0x07ff) AM_ROM
107	101	ADDRESS_MAP_END
108	102
109		static ADDRESS_MAP_START( sound_writemem, ADDRESS_SPACE_PROGRAM, 8 )
110		AM_RANGE(0x0000, 0x07ff) AM_WRITE(SMH_ROM)
111		ADDRESS_MAP_END
112
113		static ADDRESS_MAP_START( sound_io_map, ADDRESS_SPACE_IO, 8 )
	103	static ADDRESS_MAP_START( spcforce_sound_io_map, ADDRESS_SPACE_IO, 8 )
114	104	AM_RANGE(MCS48_PORT_BUS, MCS48_PORT_BUS) AM_READ(soundlatch_r)
115	105	AM_RANGE(MCS48_PORT_P1, MCS48_PORT_P1) AM_WRITE(spcforce_SN76496_latch_w)
116	106	AM_RANGE(MCS48_PORT_P2, MCS48_PORT_P2) AM_READWRITE(spcforce_SN76496_select_r, spcforce_SN76496_select_w)
r4679	r4680
255	245	/* basic machine hardware */
256	246	/* FIXME: The 8085A had a max clock of 6MHz, internally divided by 2! */
257	247	MDRV_CPU_ADD("maincpu", 8085A, 8000000 * 2)        /* 4.00 MHz??? */
258		MDRV_CPU_PROGRAM_MAP(readmem,writemem)
	248	MDRV_CPU_PROGRAM_MAP(spcforce_map,0)
259	249	MDRV_CPU_VBLANK_INT("screen", irq3_line_pulse)
260	250
261	251	MDRV_CPU_ADD("audiocpu", I8035, 6144000)      /* divisor ??? */
262		MDRV_CPU_PROGRAM_MAP(sound_readmem,sound_writemem)
263		MDRV_CPU_IO_MAP(sound_io_map,0)
	252	MDRV_CPU_PROGRAM_MAP(spcforce_sound_map,0)
	253	MDRV_CPU_IO_MAP(spcforce_sound_io_map,0)
264	254
265	255	/* video hardware */
266	256	MDRV_SCREEN_ADD("screen", RASTER)
r4679	r4680
368	358	GAME( 1980, spcforce, 0,        spcforce, spcforce, 0, ROT270, "Venture Line", "Space Force (set 1)", GAME_IMPERFECT_COLORS )
369	359	GAME( 19??, spcforc2, spcforce, spcforce, spcforc2, 0, ROT270, "Elcon (bootleg?)", "Space Force (set 2)", GAME_IMPERFECT_COLORS )
370	360	GAME( 1981, meteor,   spcforce, spcforce, spcforc2, 0, ROT270, "Venture Line", "Meteoroids", GAME_IMPERFECT_COLORS )
371

src/mame/drivers/nmg5.c

r4679	r4680
247	247	if (ACCESSING_BITS_0_7)
248	248	{
249	249	soundlatch_w(space,0,data & 0xff);
250		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_NMI, PULSE_LINE);
	250	cputag_set_input_line(space->machine, "soundcpu", INPUT_LINE_NMI, PULSE_LINE);
251	251	}
252	252	}
253	253
r4679	r4680
959	959
960	960	static void soundirq(const device_config *device, int state)
961	961	{
962		cpu_set_input_line(device->machine->cpu[1], 0, state);
	962	cputag_set_input_line(device->machine, "soundcpu", 0, state);
963	963	}
964	964
965	965	static const ym3812_interface ym3812_intf =

src/mame/drivers/mario.c

r4679	r4680
128	128
129	129	static READ8_DEVICE_HANDLER(mario_dma_read_byte)
130	130	{
131		const address_space *space = cpu_get_address_space(device->machine->cpu[0], ADDRESS_SPACE_PROGRAM);
	131	const address_space *space = cputag_get_address_space(device->machine, "maincpu", ADDRESS_SPACE_PROGRAM);
132	132	return memory_read_byte(space, offset);
133	133	}
134	134
135	135	static WRITE8_DEVICE_HANDLER(mario_dma_write_byte)
136	136	{
137		const address_space *space = cpu_get_address_space(device->machine->cpu[0], ADDRESS_SPACE_PROGRAM);
	137	const address_space *space = cputag_get_address_space(device->machine, "maincpu", ADDRESS_SPACE_PROGRAM);
138	138	memory_write_byte(space, offset, data);
139	139	}
140	140

src/mame/drivers/xmen.c

r4679	r4680
95	95	if (ACCESSING_BITS_0_7)
96	96	{
97	97	/* bit 0 = coin counter */
98		coin_counter_w(0,data & 0x01);
	98	coin_counter_w(0, data & 0x01);
99	99
100	100	/* bit 2 is data */
101	101	/* bit 3 is clock (active high) */
r4679	r4680
115	115
116	116	static READ16_HANDLER( sound_status_r )
117	117	{
118		return soundlatch2_r(space,0);
	118	return soundlatch2_r(space, 0);
119	119	}
120	120
121	121	static WRITE16_HANDLER( sound_cmd_w )
122	122	{
123		if (ACCESSING_BITS_0_7) {
	123	if (ACCESSING_BITS_0_7)
	124	{
124	125	data &= 0xff;
125	126	soundlatch_w(space, 0, data);
126	127	}
r4679	r4680
128	129
129	130	static WRITE16_HANDLER( sound_irq_w )
130	131	{
131		cpu_set_input_line(space->machine->cpu[1], 0, HOLD_LINE);
	132	cputag_set_input_line(space->machine, "audiocpu", 0, HOLD_LINE);
132	133	}
133	134
134	135	//int xmen_irqenabled;
135	136
136	137	static WRITE16_HANDLER( xmen_18fa00_w )
137	138	{
138		if(ACCESSING_BITS_0_7) {
	139	if(ACCESSING_BITS_0_7)
	140	{
139	141	/* bit 2 is interrupt enable */
140		interrupt_enable_w(space,0,data & 0x04);
	142	interrupt_enable_w(space, 0, data & 0x04);
141	143	//  xmen_irqenabled = data;
142	144	}
143	145	}
r4679	r4680
179	181
180	182	static ADDRESS_MAP_START( sound_map, ADDRESS_SPACE_PROGRAM, 8 )
181	183	AM_RANGE(0x0000, 0x7fff) AM_ROM
182		AM_RANGE(0x8000, 0xbfff) AM_READ(SMH_BANK4)
	184	AM_RANGE(0x8000, 0xbfff) AM_READ(SMH_BANK(4))
183	185	AM_RANGE(0x8000, 0xbfff) AM_WRITE(SMH_ROM)
184	186	AM_RANGE(0xc000, 0xdfff) AM_RAM
185	187	AM_RANGE(0xe000, 0xe22f) AM_DEVREADWRITE("konami", k054539_r, k054539_w)
r4679	r4680
250	252
251	253	static INPUT_PORTS_START( xmen )
252	254	PORT_START("P1_P3")
253		KONAMI16_LSB(1, IPT_BUTTON3, IPT_COIN1 )
254		KONAMI16_MSB(3, IPT_BUTTON3, IPT_COIN3 )
	255	KONAMI16_LSB_UDLR(1, IPT_BUTTON3, IPT_COIN1 )
	256	KONAMI16_MSB_UDLR(3, IPT_BUTTON3, IPT_COIN3 )
255	257
256	258	PORT_START("P2_P4")
257		KONAMI16_LSB(2, IPT_BUTTON3, IPT_COIN2 )
258		KONAMI16_MSB(4, IPT_BUTTON3, IPT_COIN4 )
	259	KONAMI16_LSB_UDLR(2, IPT_BUTTON3, IPT_COIN2 )
	260	KONAMI16_MSB_UDLR(4, IPT_BUTTON3, IPT_COIN4 )
259	261
260	262	PORT_START("EEPROM")
261	263	PORT_BIT( 0x003f, IP_ACTIVE_LOW, IPT_UNKNOWN )   /* unused? */
r4679	r4680
272	274
273	275	static INPUT_PORTS_START( xmen2p )
274	276	PORT_START("P1_P3")
275		KONAMI16_LSB(1, IPT_BUTTON3, IPT_COIN1 )
	277	KONAMI16_LSB_UDLR(1, IPT_BUTTON3, IPT_COIN1 )
276	278	PORT_BIT( 0xff00, IP_ACTIVE_LOW, IPT_UNUSED )
277	279
278	280	PORT_START("P2_P4")
279		KONAMI16_LSB(2, IPT_BUTTON3, IPT_COIN2 )
	281	KONAMI16_LSB_UDLR(2, IPT_BUTTON3, IPT_COIN2 )
280	282	PORT_BIT( 0xff00, IP_ACTIVE_LOW, IPT_UNUSED )
281	283
282	284	PORT_START("EEPROM")
r4679	r4680
301	303
302	304	static INPUT_PORTS_START( xmen6p )
303	305	PORT_START("P1_P3")
304		KONAMI16_LSB(1, IPT_BUTTON3, IPT_COIN1 )
305		KONAMI16_MSB(3, IPT_BUTTON3, IPT_COIN3 )
	306	KONAMI16_LSB_UDLR(1, IPT_BUTTON3, IPT_COIN1 )
	307	KONAMI16_MSB_UDLR(3, IPT_BUTTON3, IPT_COIN3 )
306	308
307	309	PORT_START("P2_P4")
308		KONAMI16_LSB(2, IPT_BUTTON3, IPT_COIN2 )
309		KONAMI16_MSB(4, IPT_BUTTON3, IPT_COIN4 )
	310	KONAMI16_LSB_UDLR(2, IPT_BUTTON3, IPT_COIN2 )
	311	KONAMI16_MSB_UDLR(4, IPT_BUTTON3, IPT_COIN4 )
310	312
311	313	PORT_START("P5_P6")
312		KONAMI16_LSB(5, IPT_BUTTON3, IPT_COIN5 )
313		KONAMI16_MSB(6, IPT_BUTTON3, IPT_COIN6 )
	314	KONAMI16_LSB_UDLR(5, IPT_BUTTON3, IPT_COIN5 )
	315	KONAMI16_MSB_UDLR(6, IPT_BUTTON3, IPT_COIN6 )
314	316
315	317	PORT_START("EEPROM")
316	318	PORT_BIT( 0x003f, IP_ACTIVE_LOW, IPT_UNKNOWN )   /* unused? */

src/mame/drivers/silkroad.c

r4679	r4680
345	345
346	346	src += tileoffset; len -=tileoffset;
347	347
348		buffer = malloc_or_die(len);
	348	buffer = alloc_array_or_die(UINT8, len);
349	349	{
350	350	int i;
351	351	for (i = 0;i < len; i++)

src/mame/drivers/wink.c

r4679	r4680
56	56
57	57	static WRITE8_HANDLER( sound_irq_w )
58	58	{
59		cpu_set_input_line(space->machine->cpu[1],0,HOLD_LINE);
	59	cputag_set_input_line(space->machine, "audiocpu", 0, HOLD_LINE);
60	60	//sync with sound cpu (but it still loses some soundlatches...)
61	61	//timer_call_after_resynch(space->machine, NULL, 0, NULL);
62	62	}
r4679	r4680
394	394	{
395	395	UINT32 i;
396	396	UINT8 *ROM = memory_region(machine, "maincpu");
397		UINT8 *buffer = malloc_or_die(0x8000);
	397	UINT8 *buffer = alloc_array_or_die(UINT8, 0x8000);
398	398
399	399	// protection module reverse engineered by HIGHWAYMAN
400	400

src/mame/drivers/lethal.c

r4679	r4680
259	259
260	260	static WRITE8_HANDLER( sound_irq_w )
261	261	{
262		cpu_set_input_line(space->machine->cpu[1], 0, HOLD_LINE);
	262	cputag_set_input_line(space->machine, "soundcpu", 0, HOLD_LINE);
263	263	}
264	264
265	265	static READ8_HANDLER( sound_status_r )
r4679	r4680
269	269
270	270	static void sound_nmi(const device_config *device)
271	271	{
272		cpu_set_input_line(device->machine->cpu[1], INPUT_LINE_NMI, PULSE_LINE);
	272	cputag_set_input_line(device->machine, "soundcpu", INPUT_LINE_NMI, PULSE_LINE);
273	273	}
274	274
275	275	static WRITE8_HANDLER( le_bankswitch_w )
r4679	r4680
481	481	}
482	482
483	483	static ADDRESS_MAP_START( le_main, ADDRESS_SPACE_PROGRAM, 8 )
484		AM_RANGE(0x0000, 0x1fff) AM_READ(SMH_BANK1) AM_WRITE(SMH_ROM)
	484	AM_RANGE(0x0000, 0x1fff) AM_READ(SMH_BANK(1)) AM_WRITE(SMH_ROM)
485	485	AM_RANGE(0x2000, 0x3fff) AM_RAM            // work RAM
486	486	AM_RANGE(0x4000, 0x403f) AM_WRITE(K056832_w)
487	487	AM_RANGE(0x4040, 0x404f) AM_WRITE(K056832_b_w)
r4679	r4680
497	497	AM_RANGE(0x40dc, 0x40dc) AM_WRITE(le_bankswitch_w)
498	498	AM_RANGE(0x47fe, 0x47ff) AM_WRITE(le_bgcolor_w)      // BG color
499	499	AM_RANGE(0x4800, 0x7fff) AM_READWRITE(le_4800_r, le_4800_w)   AM_BASE(&paletteram) // bankswitched: RAM and registers
500		AM_RANGE(0x8000, 0xffff) AM_READ(SMH_BANK2) AM_WRITE(SMH_ROM)
	500	AM_RANGE(0x8000, 0xffff) AM_READ(SMH_BANK(2)) AM_WRITE(SMH_ROM)
501	501	ADDRESS_MAP_END
502	502
503	503	static ADDRESS_MAP_START( le_sound, ADDRESS_SPACE_PROGRAM, 8 )
r4679	r4680
588	588	memory_set_bankptr(machine, 1, &prgrom[0x10000]);
589	589	memory_set_bankptr(machine, 2, &prgrom[0x48000]);
590	590	/* force reset again to read proper reset vector */
591		device_reset(machine->cpu[0]);
	591	device_reset(cputag_get_cpu(machine, "maincpu"));
592	592	}
593	593
594	594	static const gfx_layout lethal_6bpp =

src/mame/drivers/videopin.c

r4679	r4680
37	37	time_released = timer_get_time(machine);
38	38
39	39	if (!mask)
40		cpu_set_input_line(machine->cpu[0], INPUT_LINE_NMI, ASSERT_LINE);
	40	cputag_set_input_line(machine, "maincpu", INPUT_LINE_NMI, ASSERT_LINE);
41	41	}
42	42	else
43	43	time_pushed = timer_get_time(machine);
r4679	r4680
53	53
54	54	update_plunger(machine);
55	55
56		cpu_set_input_line(machine->cpu[0], 0, ASSERT_LINE);
	56	cputag_set_input_line(machine, "maincpu", 0, ASSERT_LINE);
57	57
58	58	scanline = scanline + 32;
59	59
r4679	r4680
134	134	if (i == 7)
135	135	set_led_status(0, data & 8);   /* start button */
136	136
137		cpu_set_input_line(space->machine->cpu[0], 0, CLEAR_LINE);
	137	cputag_set_input_line(space->machine, "maincpu", 0, CLEAR_LINE);
138	138	}
139	139
140	140
r4679	r4680
152	152	mask = ~data & 0x10;
153	153
154	154	if (mask)
155		cpu_set_input_line(device->machine->cpu[0], INPUT_LINE_NMI, CLEAR_LINE);
	155	cputag_set_input_line(device->machine, "maincpu", INPUT_LINE_NMI, CLEAR_LINE);
156	156
157	157	coin_lockout_global_w(~data & 0x08);
158	158

src/mame/drivers/exprraid.c

r4679	r4680
247	247
248	248	static WRITE8_HANDLER( sound_cpu_command_w )
249	249	{
250		soundlatch_w(space,0,data);
251		cpu_set_input_line(space->machine->cpu[1],INPUT_LINE_NMI,PULSE_LINE);
	250	soundlatch_w(space, 0, data);
	251	cputag_set_input_line(space->machine, "slave", INPUT_LINE_NMI, PULSE_LINE);
252	252	}
253	253
254	254	static READ8_HANDLER( vblank_r )
r4679	r4680
435	435	/* handler called by the 3812 emulator when the internal timers cause an IRQ */
436	436	static void irqhandler(const device_config *device, int linestate)
437	437	{
438		cpu_set_input_line_and_vector(device->machine->cpu[1],0,linestate,0xff);
	438	cputag_set_input_line_and_vector(device->machine, "slave", 0, linestate, 0xff);
439	439	}
440	440
441	441	static const ym3526_interface ym3526_config =
r4679	r4680
760	760
761	761	static DRIVER_INIT( wexpresb )
762	762	{
763		memory_install_read8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x3800, 0x3800, 0, 0, vblank_r);
	763	memory_install_read8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x3800, 0x3800, 0, 0, vblank_r);
764	764	exprraid_gfx_expand(machine);
765	765	}
766	766
767	767	static DRIVER_INIT( wexpresc )
768	768	{
769		memory_install_read8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xFFC0, 0xFFC0, 0, 0, vblank_r);
	769	memory_install_read8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xFFC0, 0xFFC0, 0, 0, vblank_r);
770	770	exprraid_gfx_expand(machine);
771	771	}
772	772

src/mame/drivers/tecmo16.c

r4679	r4680
61	61	{
62	62	if (ACCESSING_BITS_0_7)
63	63	{
64		soundlatch_w(space,0x00,data & 0xff);
65		cpu_set_input_line(space->machine->cpu[1],INPUT_LINE_NMI,PULSE_LINE);
	64	soundlatch_w(space, 0x00, data & 0xff);
	65	cputag_set_input_line(space->machine, "audiocpu", INPUT_LINE_NMI, PULSE_LINE);
66	66	}
67	67	}
68	68
r4679	r4680
388	388
389	389	static void irqhandler(const device_config *device, int irq)
390	390	{
391		cpu_set_input_line(device->machine->cpu[1],0,irq ? ASSERT_LINE : CLEAR_LINE);
	391	cputag_set_input_line(device->machine, "audiocpu", 0, irq ? ASSERT_LINE : CLEAR_LINE);
392	392	}
393	393
394	394	static const ym2151_interface ym2151_config =
r4679	r4680
478	478	ROM_LOAD( "fstarf08.rom", 0x00000, 0x20000, CRC(f0ad5693) SHA1(a0202801bb9f9c86175ca7989fbc9efa47183188) )
479	479	ROM_END
480	480
	481	ROM_START( fstarfrcj )
	482	ROM_REGION( 0x80000, "maincpu", 0 )
	483	ROM_LOAD16_BYTE( "1.bin", 0x00000, 0x40000, CRC(1905d85d) SHA1(83d244f13064b826ccf86b5a8158478452efbf7f) )
	484	ROM_LOAD16_BYTE( "2.bin", 0x00001, 0x40000, CRC(de9cfc39) SHA1(bd7943f366a3161222848c5f9b687a6ba8c1d43a) )
	485
	486	ROM_REGION( 0x10000, "audiocpu", 0 )
	487	ROM_LOAD( "fstarf07.rom", 0x00000, 0x10000, CRC(e0ad5de1) SHA1(677237341e837061b6cc02200c0752964caed907) )
	488
	489	ROM_REGION( 0x20000, "gfx1", ROMREGION_DISPOSE )
	490	ROM_LOAD( "fstarf03.rom", 0x00000, 0x20000, CRC(54375335) SHA1(d1af56a7c7fff877066dad3144d0b5147da28c6a) )
	491
	492	ROM_REGION( 0x100000, "gfx2", ROMREGION_DISPOSE )
	493	ROM_LOAD16_BYTE( "fstarf05.rom", 0x00000, 0x80000, CRC(77a281e7) SHA1(a87a90c2c856d45785cb56185b1a7dff3404b5cb) )
	494	ROM_LOAD16_BYTE( "fstarf04.rom", 0x00001, 0x80000, CRC(398a920d) SHA1(eecc167803f48517348d68ce70f15e87eac204bb) )
	495
	496	ROM_REGION( 0x100000, "gfx3", ROMREGION_DISPOSE )
	497	ROM_LOAD16_BYTE( "fstarf09.rom", 0x00000, 0x80000, CRC(d51341d2) SHA1(e46c319158046d407d4387cb2d8f0b6cfd7be576) )
	498	ROM_LOAD16_BYTE( "fstarf06.rom", 0x00001, 0x80000, CRC(07e40e87) SHA1(22867e52a8267ae8ae0ff0dba6bb846cb3e1b63d) )
	499
	500	ROM_REGION( 0x20000, "oki", 0 )
	501	ROM_LOAD( "fstarf08.rom", 0x00000, 0x20000, CRC(f0ad5693) SHA1(a0202801bb9f9c86175ca7989fbc9efa47183188) )
	502	ROM_END
	503
481	504	ROM_START( ginkun )
482	505	ROM_REGION( 0x80000, "maincpu", 0 )
483	506	ROM_LOAD16_BYTE( "ginkun01.i01", 0x00000, 0x40000, CRC(98946fd5) SHA1(e0b496d1fa5201d94a2a22243fe4b37d9ff7bc90) )
r4679	r4680
633	656
634	657	/******************************************************************************/
635	658
636		GAME( 1992, fstarfrc, 0, fstarfrc, fstarfrc, 0, ROT90, "Tecmo", "Final Star Force (US)", 0 )
637		GAME( 1992, riot,     0, riot,     riot,     0, ROT0,  "NMK",   "Riot", 0 )
638		GAME( 1995, ginkun,   0, ginkun,   ginkun,   0, ROT0,  "Tecmo", "Ganbare Ginkun", 0 )
	659	GAME( 1992, fstarfrc,  0,        fstarfrc, fstarfrc, 0, ROT90, "Tecmo", "Final Star Force (US)", 0 )
	660	GAME( 1992, fstarfrcj, fstarfrc, fstarfrc, fstarfrc, 0, ROT90, "Tecmo", "Final Star Force (Japan)", 0 )
	661	GAME( 1992, riot,      0,        riot,     riot,     0, ROT0,  "NMK",   "Riot", 0 )
	662	GAME( 1995, ginkun,    0,        ginkun,   ginkun,   0, ROT0,  "Tecmo", "Ganbare Ginkun", 0 )

src/mame/drivers/2mindril.c

r4679	r4680
393	393	/* WRONG,it does something with 60000c & 700002,likely to be called when the player throws the ball.*/
394	394	static void irqhandler(const device_config *device, int irq)
395	395	{
396		//  cpu_set_input_line(device->machine->cpu[0],5,irq ? ASSERT_LINE : CLEAR_LINE);
	396	//  cputag_set_input_line(device->machine, "maincpu", 5, irq ? ASSERT_LINE : CLEAR_LINE);
397	397	}
398	398
399	399	static const ym2610_interface ym2610_config =

src/mame/drivers/naughtyb.c

r4679	r4680
784	784	static DRIVER_INIT( popflame )
785	785	{
786	786	/* install a handler to catch protection checks */
787		memory_install_read8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x9000, 0x9000, 0, 0, popflame_protection_r);
	787	memory_install_read8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x9000, 0x9000, 0, 0, popflame_protection_r);
788	788	}
789	789
790	790	static int question_offset = 0;
r4679	r4680
813	813	static DRIVER_INIT( trvmstr )
814	814	{
815	815	/* install questions' handlers  */
816		memory_install_readwrite8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xc000, 0xc002, 0, 0, trvmstr_questions_r, trvmstr_questions_w);
	816	memory_install_readwrite8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xc000, 0xc002, 0, 0, trvmstr_questions_r, trvmstr_questions_w);
817	817	}
818	818
819	819

src/mame/drivers/runaway.c

r4679	r4680
33	33	/* assume Centipede-style interrupt timing */
34	34	int scanline = param;
35	35
36		cpu_set_input_line(machine->cpu[0], 0, (scanline & 32) ? ASSERT_LINE : CLEAR_LINE);
	36	cputag_set_input_line(machine, "maincpu", 0, (scanline & 32) ? ASSERT_LINE : CLEAR_LINE);
37	37
38	38	scanline += 32;
39	39
r4679	r4680
81	81
82	82	static WRITE8_HANDLER( runaway_irq_ack_w )
83	83	{
84		cpu_set_input_line(space->machine->cpu[0], 0, CLEAR_LINE);
	84	cputag_set_input_line(space->machine, "maincpu", 0, CLEAR_LINE);
85	85	}
86	86
87	87
88		static ADDRESS_MAP_START( readmem, ADDRESS_SPACE_PROGRAM, 8 )
89		AM_RANGE(0x0000, 0x03ff) AM_READ(SMH_RAM)
90		AM_RANGE(0x0400, 0x07ff) AM_READ(SMH_RAM)
91		AM_RANGE(0x3000, 0x3007) AM_READ(runaway_input_r)
92		AM_RANGE(0x4000, 0x4000) AM_READ_PORT("4000")
93		AM_RANGE(0x5000, 0x5000) AM_DEVREAD("earom", atari_vg_earom_r)
94		AM_RANGE(0x6000, 0x600f) AM_DEVREAD("pokey1", pokey_r)
95		AM_RANGE(0x7000, 0x700f) AM_DEVREAD("pokey2", pokey_r)
96		AM_RANGE(0x8000, 0xcfff) AM_READ(SMH_ROM)
97		AM_RANGE(0xf000, 0xffff) AM_READ(SMH_ROM)   /* for the interrupt vectors */
98		ADDRESS_MAP_END
99
100
101		static ADDRESS_MAP_START( writemem, ADDRESS_SPACE_PROGRAM, 8 )
102		AM_RANGE(0x0000, 0x03ff) AM_WRITE(SMH_RAM)
103		AM_RANGE(0x0400, 0x07bf) AM_WRITE(runaway_video_ram_w) AM_BASE(&runaway_video_ram)
104		AM_RANGE(0x07c0, 0x07ff) AM_WRITE(SMH_RAM) AM_BASE(&runaway_sprite_ram)
	88	static ADDRESS_MAP_START( runaway_map, ADDRESS_SPACE_PROGRAM, 8 )
	89	AM_RANGE(0x0000, 0x03ff) AM_RAM
	90	AM_RANGE(0x0400, 0x07bf) AM_RAM_WRITE(runaway_video_ram_w) AM_BASE(&runaway_video_ram)
	91	AM_RANGE(0x07c0, 0x07ff) AM_RAM AM_BASE(&runaway_sprite_ram)
105	92	AM_RANGE(0x1000, 0x1000) AM_WRITE(runaway_irq_ack_w)
106		AM_RANGE(0x1400, 0x143F) AM_DEVWRITE("earom", atari_vg_earom_w)
	93	AM_RANGE(0x1400, 0x143f) AM_DEVWRITE("earom", atari_vg_earom_w)
107	94	AM_RANGE(0x1800, 0x1800) AM_DEVWRITE("earom", atari_vg_earom_ctrl_w)
108	95	AM_RANGE(0x1c00, 0x1c0f) AM_WRITE(runaway_paletteram_w)
109	96	AM_RANGE(0x2000, 0x2000) AM_WRITENOP /* coin counter? */
110	97	AM_RANGE(0x2001, 0x2001) AM_WRITENOP /* coin counter? */
111	98	AM_RANGE(0x2003, 0x2004) AM_WRITE(runaway_led_w)
112	99	AM_RANGE(0x2005, 0x2005) AM_WRITE(runaway_tile_bank_w)
113		AM_RANGE(0x6000, 0x600f) AM_DEVWRITE("pokey1", pokey_w)
114		AM_RANGE(0x7000, 0x700f) AM_DEVWRITE("pokey2", pokey_w)
115		AM_RANGE(0x8000, 0xcfff) AM_WRITE(SMH_ROM)
	100
	101	AM_RANGE(0x3000, 0x3007) AM_READ(runaway_input_r)
	102	AM_RANGE(0x4000, 0x4000) AM_READ_PORT("4000")
	103	AM_RANGE(0x5000, 0x5000) AM_DEVREAD("earom", atari_vg_earom_r)
	104	AM_RANGE(0x6000, 0x600f) AM_DEVREADWRITE("pokey1", pokey_r,pokey_w)
	105	AM_RANGE(0x7000, 0x700f) AM_DEVREADWRITE("pokey2", pokey_r,pokey_w)
	106	AM_RANGE(0x8000, 0xcfff) AM_ROM
	107	AM_RANGE(0xf000, 0xffff) AM_ROM   /* for the interrupt vectors */
116	108	ADDRESS_MAP_END
117	109
118	110
r4679	r4680
363	355
364	356	/* basic machine hardware */
365	357	MDRV_CPU_ADD("maincpu", M6502, 12096000 / 8) /* ? */
366		MDRV_CPU_PROGRAM_MAP(readmem, writemem)
	358	MDRV_CPU_PROGRAM_MAP(runaway_map, 0)
367	359
368	360	MDRV_MACHINE_RESET(runaway)
369	361

src/mame/drivers/sothello.c

r4679	r4680
73	73
74	74	static TIMER_CALLBACK( subcpu_suspend )
75	75	{
76		cpu_suspend(machine->cpu[2],SUSPEND_REASON_HALT,1);
	76	cputag_suspend(machine, "sub", SUSPEND_REASON_HALT, 1);
77	77	}
78	78
79	79	static TIMER_CALLBACK( subcpu_resume )
80	80	{
81		cpu_resume(machine->cpu[2],SUSPEND_REASON_HALT);
82		cpu_set_input_line(machine->cpu[2], INPUT_LINE_NMI, PULSE_LINE);
	81	cputag_resume(machine, "sub", SUSPEND_REASON_HALT);
	82	cputag_set_input_line(machine, "sub", INPUT_LINE_NMI, PULSE_LINE);
83	83	}
84	84
85	85	static READ8_HANDLER( subcpu_halt_set )
r4679	r4680
165	165
166	166	static WRITE8_HANDLER(soundcpu_int_clear_w)
167	167	{
168		cpu_set_input_line(space->machine->cpu[1], 0, CLEAR_LINE );
	168	cputag_set_input_line(space->machine, "soundcpu", 0, CLEAR_LINE );
169	169	}
170	170
171	171	static ADDRESS_MAP_START( soundcpu_mem_map, ADDRESS_SPACE_PROGRAM, 8 )
r4679	r4680
187	187
188	188	static void unlock_shared_ram(const address_space *space)
189	189	{
190		if(!cpu_is_suspended(space->machine->cpu[2], SUSPEND_REASON_HALT))
	190	if(!cputag_is_suspended(space->machine, "sub", SUSPEND_REASON_HALT))
191	191	{
192	192	subcpu_status|=1;
193	193	}
r4679	r4680
292	292
293	293	static void irqhandler(const device_config *device, int irq)
294	294	{
295		cpu_set_input_line(device->machine->cpu[2],0,irq ? ASSERT_LINE : CLEAR_LINE);
	295	cputag_set_input_line(device->machine, "sub", 0, irq ? ASSERT_LINE : CLEAR_LINE);
296	296	}
297	297
298	298	static void sothello_vdp_interrupt(running_machine *machine, int i)
299	299	{
300		cpu_set_input_line (machine->cpu[0], 0, (i ? HOLD_LINE : CLEAR_LINE));
	300	cputag_set_input_line(machine, "maincpu", 0, (i ? HOLD_LINE : CLEAR_LINE));
301	301	}
302	302
303	303	static INTERRUPT_GEN( sothello_interrupt )
r4679	r4680
309	309	{
310	310	/* only 4 bits are used */
311	311	msm5205_data_w( device, msm_data & 0x0f );
312		cpu_set_input_line(device->machine->cpu[1], 0, ASSERT_LINE );
	312	cputag_set_input_line(device->machine, "soundcpu", 0, ASSERT_LINE );
313	313	}
314	314
315	315

src/mame/drivers/taitowlf.c

r4679	r4680
324	324	{
325	325	UINT8 data = at_pages[offset % 0x10];
326	326
327		switch(offset % 8) {
	327	switch(offset % 8)
	328	{
328	329	case 1:
329	330	data = dma_offset[(offset / 8) & 1][2];
330	331	break;
r4679	r4680
346	347	{
347	348	at_pages[offset % 0x10] = data;
348	349
349		switch(offset % 8) {
	350	switch(offset % 8)
	351	{
350	352	case 1:
351	353	dma_offset[(offset / 8) & 1][2] = data;
352	354	break;
r4679	r4680
365	367
366	368	static DMA8237_MEM_READ( pc_dma_read_byte )
367	369	{
368		const address_space *space = cpu_get_address_space(device->machine->cpu[0], ADDRESS_SPACE_PROGRAM);
	370	const address_space *space = cputag_get_address_space(device->machine, "maincpu", ADDRESS_SPACE_PROGRAM);
369	371	offs_t page_offset = (((offs_t) dma_offset[0][channel]) << 16)
370	372	& 0xFF0000;
371	373
r4679	r4680
375	377
376	378	static DMA8237_MEM_WRITE( pc_dma_write_byte )
377	379	{
378		const address_space *space = cpu_get_address_space(device->machine->cpu[0], ADDRESS_SPACE_PROGRAM);
	380	const address_space *space = cputag_get_address_space(device->machine, "maincpu", ADDRESS_SPACE_PROGRAM);
379	381	offs_t page_offset = (((offs_t) dma_offset[0][channel]) << 16)
380	382	& 0xFF0000;
381	383
r4679	r4680
525	527
526	528	static MACHINE_START(taitowlf)
527	529	{
528		cpu_set_irq_callback(machine->cpu[0], irq_callback);
	530	cpu_set_irq_callback(cputag_get_cpu(machine, "maincpu"), irq_callback);
529	531
530	532	taitowlf_devices.pit8254 = devtag_get_device( machine, "pit8254" );
531	533	taitowlf_devices.pic8259_1 = devtag_get_device( machine, "pic8259_1" );
r4679	r4680
546	548	*
547	549	*************************************************************/
548	550
549		static PIC8259_SET_INT_LINE( taitowlf_pic8259_1_set_int_line ) {
550		cpu_set_input_line(device->machine->cpu[0], 0, interrupt ? HOLD_LINE : CLEAR_LINE);
	551	static PIC8259_SET_INT_LINE( taitowlf_pic8259_1_set_int_line )
	552	{
	553	cputag_set_input_line(device->machine, "maincpu", 0, interrupt ? HOLD_LINE : CLEAR_LINE);
551	554	}
552	555
553	556
554		static PIC8259_SET_INT_LINE( taitowlf_pic8259_2_set_int_line ) {
	557	static PIC8259_SET_INT_LINE( taitowlf_pic8259_2_set_int_line )
	558	{
555	559	pic8259_set_irq_line( taitowlf_devices.pic8259_1, 2, interrupt);
556	560	}
557	561
r4679	r4680
639	643
640	644	static void set_gate_a20(running_machine *machine, int a20)
641	645	{
642		cpu_set_input_line(machine->cpu[0], INPUT_LINE_A20, a20);
	646	cputag_set_input_line(machine, "maincpu", INPUT_LINE_A20, a20);
643	647	}
644	648
645	649	static void keyboard_interrupt(running_machine *machine, int state)
r4679	r4680
652	656	pic8259_set_irq_line(taitowlf_devices.pic8259_2, 6, state);
653	657	}
654	658
655		static int taitowlf_get_out2(running_machine *machine) {
	659	static int taitowlf_get_out2(running_machine *machine)
	660	{
656	661	return pit8253_get_output(taitowlf_devices.pit8254, 2 );
657	662	}
658	663
r4679	r4680
661	666	KBDC8042_AT386, set_gate_a20, keyboard_interrupt, taitowlf_get_out2
662	667	};
663	668
664		static void taitowlf_set_keyb_int(running_machine *machine, int state) {
	669	static void taitowlf_set_keyb_int(running_machine *machine, int state)
	670	{
665	671	pic8259_set_irq_line(taitowlf_devices.pic8259_1, 1, state);
666	672	}
667	673
668	674	static DRIVER_INIT( taitowlf )
669	675	{
670		bios_ram = auto_malloc(0x10000);
	676	bios_ram = auto_alloc_array(machine, UINT32, 0x10000/4);
671	677
672	678	init_pc_common(machine, PCCOMMON_KEYBOARD_AT, taitowlf_set_keyb_int);
673	679	mc146818_init(machine, MC146818_STANDARD);

src/mame/drivers/toypop.c

r4679	r4680
156	156
157	157	static READ8_HANDLER( toypop_main_interrupt_enable_r )
158	158	{
159		cpu_interrupt_enable(space->machine->cpu[0],1);
	159	cpu_interrupt_enable(cputag_get_cpu(space->machine, "maincpu"), 1);
160	160	return 0;
161	161	}
162	162
163	163	static WRITE8_HANDLER( toypop_main_interrupt_enable_w )
164	164	{
165		cpu_interrupt_enable(space->machine->cpu[0],1);
166		cpu_set_input_line(space->machine->cpu[0], 0, CLEAR_LINE);
	165	cpu_interrupt_enable(cputag_get_cpu(space->machine, "maincpu"), 1);
	166	cputag_set_input_line(space->machine, "maincpu", 0, CLEAR_LINE);
167	167	}
168	168
169	169	static WRITE8_HANDLER( toypop_main_interrupt_disable_w )
170	170	{
171		cpu_interrupt_enable(space->machine->cpu[0],0);
	171	cpu_interrupt_enable(cputag_get_cpu(space->machine, "maincpu"), 0);
172	172	}
173	173
174	174	static WRITE8_HANDLER( toypop_sound_interrupt_enable_acknowledge_w )
175	175	{
176		cpu_interrupt_enable(space->machine->cpu[1],1);
177		cpu_set_input_line(space->machine->cpu[1], 0, CLEAR_LINE);
	176	cpu_interrupt_enable(cputag_get_cpu(space->machine, "audiocpu"), 1);
	177	cputag_set_input_line(space->machine, "audiocpu", 0, CLEAR_LINE);
178	178	}
179	179
180	180	static WRITE8_HANDLER( toypop_sound_interrupt_disable_w )
181	181	{
182		cpu_interrupt_enable(space->machine->cpu[1],0);
	182	cpu_interrupt_enable(cputag_get_cpu(space->machine, "audiocpu"), 0);
183	183	}
184	184
185	185	static INTERRUPT_GEN( toypop_main_interrupt )
186	186	{
187	187	irq0_line_assert(device);   // this also checks if irq is enabled - IMPORTANT!
188		// so don't replace with cpu_set_input_line(machine->cpu[0], 0, ASSERT_LINE);
	188	// so don't replace with cputag_set_input_line(machine, "maincpu", 0, ASSERT_LINE);
189	189
190		namcoio_set_irq_line(device->machine,0,PULSE_LINE);
191		namcoio_set_irq_line(device->machine,1,PULSE_LINE);
192		namcoio_set_irq_line(device->machine,2,PULSE_LINE);
	190	namcoio_set_irq_line(device->machine, 0, PULSE_LINE);
	191	namcoio_set_irq_line(device->machine, 1, PULSE_LINE);
	192	namcoio_set_irq_line(device->machine, 2, PULSE_LINE);
193	193	}
194	194
195	195	static WRITE8_HANDLER( toypop_sound_clear_w )
196	196	{
197		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_RESET, CLEAR_LINE);
	197	cputag_set_input_line(space->machine, "audiocpu", INPUT_LINE_RESET, CLEAR_LINE);
198	198	}
199	199
200	200	static WRITE8_HANDLER( toypop_sound_assert_w )
201	201	{
202		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_RESET, ASSERT_LINE);
	202	cputag_set_input_line(space->machine, "audiocpu", INPUT_LINE_RESET, ASSERT_LINE);
203	203	}
204	204
205	205	static WRITE8_HANDLER( toypop_m68000_clear_w )
206	206	{
207		cpu_set_input_line(space->machine->cpu[2], INPUT_LINE_RESET, CLEAR_LINE);
	207	cputag_set_input_line(space->machine, "sub", INPUT_LINE_RESET, CLEAR_LINE);
208	208	}
209	209
210	210	static WRITE8_HANDLER( toypop_m68000_assert_w )
211	211	{
212		cpu_set_input_line(space->machine->cpu[2], INPUT_LINE_RESET, ASSERT_LINE);
	212	cputag_set_input_line(space->machine, "sub", INPUT_LINE_RESET, ASSERT_LINE);
213	213	}
214	214
215	215	static TIMER_CALLBACK( disable_interrupts )
216	216	{
217		cpu_interrupt_enable(machine->cpu[0],0);
218		cpu_set_input_line(machine->cpu[0], 0, CLEAR_LINE);
219		cpu_interrupt_enable(machine->cpu[1],0);
220		cpu_set_input_line(machine->cpu[1], 0, CLEAR_LINE);
	217	cpu_interrupt_enable(cputag_get_cpu(machine, "maincpu"), 0);
	218	cputag_set_input_line(machine, "maincpu", 0, CLEAR_LINE);
	219	cpu_interrupt_enable(cputag_get_cpu(machine, "audiocpu"), 0);
	220	cputag_set_input_line(machine, "audiocpu", 0, CLEAR_LINE);
221	221	interrupt_enable_68k = 0;
222	222	}
223	223

src/mame/drivers/tumbleb.c

r4679	r4680
829	829
830	830	static ADDRESS_MAP_START( jumppop_sound_map, ADDRESS_SPACE_PROGRAM, 8 )
831	831	AM_RANGE(0x0000, 0x2fff) AM_ROM
832		AM_RANGE(0x8000, 0xbfff) AM_READ(SMH_BANK1)
	832	AM_RANGE(0x8000, 0xbfff) AM_READ(SMH_BANK(1))
833	833	AM_RANGE(0xf800, 0xffff) AM_RAM
834	834	ADDRESS_MAP_END
835	835
r4679	r4680
3574	3574
3575	3575	HCROM[0x1e228/2] = 0x4e75;
3576	3576
3577		memory_install_write16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x140000, 0x1407ff, 0, 0, SMH_NOP ); // kill palette writes as the interrupt code we don't have controls them
	3577	memory_install_write16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x140000, 0x1407ff, 0, 0, (write16_space_func)SMH_NOP ); // kill palette writes as the interrupt code we don't have controls them
3578	3578
3579	3579
3580	3580	{
r4679	r4680
3595	3595	static void suprtrio_decrypt_code(running_machine *machine)
3596	3596	{
3597	3597	UINT16 *rom = (UINT16 *)memory_region(machine, "maincpu");
3598		UINT16 *buf = malloc_or_die(0x80000);
	3598	UINT16 *buf = alloc_array_or_die(UINT16, 0x80000/2);
3599	3599	int i;
3600	3600
3601	3601	/* decrypt main ROMs */
r4679	r4680
3615	3615	static void suprtrio_decrypt_gfx(running_machine *machine)
3616	3616	{
3617	3617	UINT16 *rom = (UINT16 *)memory_region(machine, "gfx1");
3618		UINT16 *buf = malloc_or_die(0x100000);
	3618	UINT16 *buf = alloc_array_or_die(UINT16, 0x100000/2);
3619	3619	int i;
3620	3620
3621	3621	/* decrypt tiles */

src/mame/drivers/micro3d.c

r4679	r4680
151	151
152	152	static void duart_irq_handler(const device_config *device, UINT8 vector)
153	153	{
154		cpu_set_input_line_and_vector(device->machine->cpu[0], 3, HOLD_LINE, vector);
	154	cputag_set_input_line_and_vector(device->machine, "maincpu", 3, HOLD_LINE, vector);
155	155	};
156	156
157	157	static void duart_tx(const device_config *device, int channel, UINT8 data)
r4679	r4680
163	163	else
164	164	{
165	165	m68681_tx0 = data;
166		cpu_set_input_line(device->machine->cpu[2], MCS51_RX_LINE, HOLD_LINE);
	166	cputag_set_input_line(device->machine, "audiocpu", MCS51_RX_LINE, HOLD_LINE);
167	167	}
168	168	};
169	169
r4679	r4680
196	196	*/
197	197	static void duart_output_w(const device_config *device, UINT8 data)
198	198	{
199		cpu_set_input_line(device->machine->cpu[2], INPUT_LINE_RESET, data & 0x20 ? CLEAR_LINE : ASSERT_LINE);
	199	cputag_set_input_line(device->machine, "audiocpu", INPUT_LINE_RESET, data & 0x20 ? CLEAR_LINE : ASSERT_LINE);
200	200	}
201	201
202	202
r4679	r4680
336	336
337	337	if (m68901_base[IMASK_REG] & (bit << 8))              // If interrupt is not masked by MFD, trigger a 68k INT
338	338	{
339		cpu_set_input_line(machine->cpu[0], 4, HOLD_LINE);
	339	cputag_set_input_line(machine, "maincpu", 4, HOLD_LINE);
340	340	//    logerror("M68901 interrupt %d serviced.\n",source);
341	341	}
342	342	}
r4679	r4680
480	480
481	481	static READ16_HANDLER( tms_host_r )
482	482	{
483		return tms34010_host_r(space->machine->cpu[1], offset);
	483	return tms34010_host_r(cputag_get_cpu(space->machine, "vgb"), offset);
484	484	}
485	485
486	486	static WRITE16_HANDLER( tms_host_w )
487	487	{
488		tms34010_host_w(space->machine->cpu[1], offset, data);
	488	tms34010_host_w(cputag_get_cpu(space->machine, "vgb"), offset, data);
489	489	}
490	490
491	491
r4679	r4680
640	640	static MACHINE_RESET( micro3d )
641	641	{
642	642	/* TODO: Check. Also do this for the other CPUs? */
643		//  cpu_set_input_line(machine->cpu[2], INPUT_LINE_RESET, ASSERT_LINE);
	643	//  cputag_set_input_line(machine, "audiocpu", INPUT_LINE_RESET, ASSERT_LINE);
644	644
645	645	creg = 0;
646	646	ti_uart[STATUS] = 1;
r4679	r4680
692	692
693	693	static DRIVER_INIT( micro3d )
694	694	{
695		i8051_set_serial_tx_callback(machine->cpu[2], data_from_i8031);
696		i8051_set_serial_rx_callback(machine->cpu[2], data_to_i8031);
	695	i8051_set_serial_tx_callback(cputag_get_cpu(machine, "audiocpu"), data_from_i8031);
	696	i8051_set_serial_rx_callback(cputag_get_cpu(machine, "audiocpu"), data_to_i8031);
697	697
698	698	duart68681 = devtag_get_device( machine, "duart68681" );
699	699	}

src/mame/drivers/momoko.c

r4679	r4680
70	70
71	71	/****************************************************************************/
72	72
73		static ADDRESS_MAP_START( readmem, ADDRESS_SPACE_PROGRAM, 8 )
74		AM_RANGE(0x0000, 0xbfff) AM_READ(SMH_ROM)
75		AM_RANGE(0xc000, 0xcfff) AM_READ(SMH_RAM)
76
77		AM_RANGE(0xd064, 0xd0ff) AM_READ(SMH_RAM) /* sprite ram */
78
79		AM_RANGE(0xd400, 0xd400) AM_READ_PORT("IN0")
80		AM_RANGE(0xd402, 0xd402) AM_READ_PORT("IN1")
81		AM_RANGE(0xd406, 0xd406) AM_READ_PORT("DSW0")
82		AM_RANGE(0xd407, 0xd407) AM_READ_PORT("DSW1")
83
84		AM_RANGE(0xd800, 0xdbff) AM_READ(SMH_RAM)
85		AM_RANGE(0xe000, 0xe3ff) AM_READ(SMH_RAM) /* text */
86
87		AM_RANGE(0xf000, 0xffff) AM_READ(SMH_BANK1)
88		ADDRESS_MAP_END
89
90		static ADDRESS_MAP_START( writemem, ADDRESS_SPACE_PROGRAM, 8 )
91		AM_RANGE(0x0000, 0xbfff) AM_WRITE(SMH_ROM)
92		AM_RANGE(0xc000, 0xcfff) AM_WRITE(SMH_RAM)
93
94		AM_RANGE(0xd064, 0xd0ff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
95
96		AM_RANGE(0xd400, 0xd400) AM_WRITENOP /* interrupt ack? */
97		AM_RANGE(0xd402, 0xd402) AM_WRITE(momoko_flipscreen_w)
	73	static ADDRESS_MAP_START( momoko_map, ADDRESS_SPACE_PROGRAM, 8 )
	74	AM_RANGE(0x0000, 0xbfff) AM_ROM
	75	AM_RANGE(0xc000, 0xcfff) AM_RAM
	76	AM_RANGE(0xd064, 0xd0ff) AM_RAM AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
	77	AM_RANGE(0xd400, 0xd400) AM_READ_PORT("IN0") AM_WRITENOP /* interrupt ack? */
	78	AM_RANGE(0xd402, 0xd402) AM_READ_PORT("IN1") AM_WRITE(momoko_flipscreen_w)
98	79	AM_RANGE(0xd404, 0xd404) AM_WRITE(watchdog_reset_w)
99		AM_RANGE(0xd406, 0xd406) AM_WRITE(soundlatch_w)
100
101		AM_RANGE(0xd800, 0xdbff) AM_WRITE(paletteram_xxxxRRRRGGGGBBBB_be_w) AM_BASE(&paletteram)
102
	80	AM_RANGE(0xd406, 0xd406) AM_READ_PORT("DSW0") AM_WRITE(soundlatch_w)
	81	AM_RANGE(0xd407, 0xd407) AM_READ_PORT("DSW1")
	82	AM_RANGE(0xd800, 0xdbff) AM_RAM_WRITE(paletteram_xxxxRRRRGGGGBBBB_be_w) AM_BASE(&paletteram)
103	83	AM_RANGE(0xdc00, 0xdc00) AM_WRITE(momoko_fg_scrolly_w)
104	84	AM_RANGE(0xdc01, 0xdc01) AM_WRITE(momoko_fg_scrollx_w)
105	85	AM_RANGE(0xdc02, 0xdc02) AM_WRITE(momoko_fg_select_w)
106
107		AM_RANGE(0xe000, 0xe3ff) AM_WRITE(SMH_RAM) AM_BASE(&videoram) AM_SIZE(&videoram_size)
108
	86	AM_RANGE(0xe000, 0xe3ff) AM_RAM AM_BASE(&videoram) AM_SIZE(&videoram_size)
109	87	AM_RANGE(0xe800, 0xe800) AM_WRITE(momoko_text_scrolly_w)
110	88	AM_RANGE(0xe801, 0xe801) AM_WRITE(momoko_text_mode_w)
111
	89	AM_RANGE(0xf000, 0xffff) AM_ROMBANK(1)
112	90	AM_RANGE(0xf000, 0xf001) AM_WRITE(momoko_bg_scrolly_w) AM_BASE(&momoko_bg_scrolly)
113	91	AM_RANGE(0xf002, 0xf003) AM_WRITE(momoko_bg_scrollx_w) AM_BASE(&momoko_bg_scrollx)
114	92	AM_RANGE(0xf004, 0xf004) AM_WRITE(momoko_bg_read_bank_w)
r4679	r4680
116	94	AM_RANGE(0xf007, 0xf007) AM_WRITE(momoko_bg_priority_w)
117	95	ADDRESS_MAP_END
118	96
119		static ADDRESS_MAP_START( readmem_sound, ADDRESS_SPACE_PROGRAM, 8 )
120		AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM)
121		AM_RANGE(0x8000, 0x87ff) AM_READ(SMH_RAM)
122		AM_RANGE(0xa000, 0xa001) AM_DEVREAD("ym1", ym2203_r)
123		AM_RANGE(0xc000, 0xc001) AM_DEVREAD("ym2", ym2203_r)
124		ADDRESS_MAP_END
125
126		static ADDRESS_MAP_START( writemem_sound, ADDRESS_SPACE_PROGRAM, 8 )
127		AM_RANGE(0x0000, 0x7fff) AM_WRITE(SMH_ROM)
128		AM_RANGE(0x8000, 0x87ff) AM_WRITE(SMH_RAM)
	97	static ADDRESS_MAP_START( momoko_sound_map, ADDRESS_SPACE_PROGRAM, 8 )
	98	AM_RANGE(0x0000, 0x7fff) AM_ROM
	99	AM_RANGE(0x8000, 0x87ff) AM_RAM
129	100	AM_RANGE(0x9000, 0x9000) AM_WRITENOP /* unknown */
130		AM_RANGE(0xa000, 0xa001) AM_DEVWRITE("ym1", ym2203_w)
	101	AM_RANGE(0xa000, 0xa001) AM_DEVREADWRITE("ym1", ym2203_r,ym2203_w)
131	102	AM_RANGE(0xb000, 0xb000) AM_WRITENOP /* unknown */
132		AM_RANGE(0xc000, 0xc001) AM_DEVWRITE("ym2", ym2203_w)
	103	AM_RANGE(0xc000, 0xc001) AM_DEVREADWRITE("ym2", ym2203_r,ym2203_w)
133	104	ADDRESS_MAP_END
134	105
	106
135	107	/****************************************************************************/
136	108
137	109	static INPUT_PORTS_START( momoko )
r4679	r4680
273	245
274	246	/* basic machine hardware */
275	247	MDRV_CPU_ADD("maincpu", Z80, 5000000)   /* 5.0MHz */
276		MDRV_CPU_PROGRAM_MAP(readmem,writemem)
	248	MDRV_CPU_PROGRAM_MAP(momoko_map,0)
277	249	MDRV_CPU_VBLANK_INT("screen", irq0_line_hold)
278	250
279	251	MDRV_CPU_ADD("audiocpu", Z80, 2500000)   /* 2.5MHz */
280		MDRV_CPU_PROGRAM_MAP(readmem_sound,writemem_sound)
	252	MDRV_CPU_PROGRAM_MAP(momoko_sound_map,0)
281	253
282	254	/* video hardware */
283	255	MDRV_SCREEN_ADD("screen", RASTER)

src/mame/drivers/kchamp.c

r4679	r4680
82	82	static int nmi_enable = 0;
83	83	static int sound_nmi_enable = 0;
84	84
85		static ADDRESS_MAP_START( readmem, ADDRESS_SPACE_PROGRAM, 8 )
86		AM_RANGE(0x0000, 0xbfff) AM_READ(SMH_ROM)
87		AM_RANGE(0xc000, 0xcfff) AM_READ(SMH_RAM)
88		AM_RANGE(0xd000, 0xd3ff) AM_READ(SMH_RAM)
89		AM_RANGE(0xd400, 0xd7ff) AM_READ(SMH_RAM)
90		AM_RANGE(0xd800, 0xd8ff) AM_READ(SMH_RAM)
91		AM_RANGE(0xd900, 0xdfff) AM_READ(SMH_RAM)
92		AM_RANGE(0xe000, 0xffff) AM_READ(SMH_ROM)
93		ADDRESS_MAP_END
	85	/********************
	86	* VS Version        *
	87	********************/
94	88
95		static ADDRESS_MAP_START( writemem, ADDRESS_SPACE_PROGRAM, 8 )
96		AM_RANGE(0x0000, 0xbfff) AM_WRITE(SMH_ROM)
97		AM_RANGE(0xc000, 0xcfff) AM_WRITE(SMH_RAM)
98		AM_RANGE(0xd000, 0xd3ff) AM_WRITE(kchamp_videoram_w) AM_BASE(&videoram)
99		AM_RANGE(0xd400, 0xd7ff) AM_WRITE(kchamp_colorram_w) AM_BASE(&colorram)
100		AM_RANGE(0xd800, 0xd8ff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
101		AM_RANGE(0xd900, 0xdfff) AM_WRITE(SMH_RAM)
102		AM_RANGE(0xe000, 0xffff) AM_WRITE(SMH_ROM)
103		ADDRESS_MAP_END
104
105		static ADDRESS_MAP_START( sound_readmem, ADDRESS_SPACE_PROGRAM, 8 )
106		AM_RANGE(0x0000, 0x5fff) AM_READ(SMH_ROM)
107		AM_RANGE(0x6000, 0xffff) AM_READ(SMH_RAM)
108		ADDRESS_MAP_END
109
110		static ADDRESS_MAP_START( sound_writemem, ADDRESS_SPACE_PROGRAM, 8 )
111		AM_RANGE(0x0000, 0x5fff) AM_WRITE(SMH_ROM)
112		AM_RANGE(0x6000, 0xffff) AM_WRITE(SMH_RAM)
113		ADDRESS_MAP_END
114
115		static WRITE8_HANDLER( control_w ) {
	89	static WRITE8_HANDLER( control_w )
	90	{
116	91	nmi_enable = data & 1;
117	92	}
118	93
119		static WRITE8_HANDLER( sound_reset_w ) {
	94	static WRITE8_HANDLER( sound_reset_w )
	95	{
120	96	if ( !( data & 1 ) )
121		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_RESET, PULSE_LINE);
	97	cputag_set_input_line(space->machine, "audiocpu", INPUT_LINE_RESET, PULSE_LINE);
122	98	}
123	99
124		static WRITE8_DEVICE_HANDLER( sound_control_w ) {
	100	static WRITE8_DEVICE_HANDLER( sound_control_w )
	101	{
125	102	msm5205_reset_w( device, !( data & 1 ) );
126	103	sound_nmi_enable = ( ( data >> 1 ) & 1 );
127	104	}
128	105
129		static WRITE8_HANDLER( sound_command_w ) {
	106	static WRITE8_HANDLER( sound_command_w )
	107	{
130	108	soundlatch_w( space, 0, data );
131		cpu_set_input_line_and_vector(space->machine->cpu[1], 0, HOLD_LINE, 0xff );
	109	cputag_set_input_line_and_vector(space->machine, "audiocpu", 0, HOLD_LINE, 0xff );
132	110	}
133	111
134	112	static int msm_data = 0;
135	113	static int msm_play_lo_nibble = 1;
136	114
137		static WRITE8_HANDLER( sound_msm_w ) {
	115	static WRITE8_HANDLER( sound_msm_w )
	116	{
138	117	msm_data = data;
139	118	msm_play_lo_nibble = 1;
140	119	}
141	120
142		static ADDRESS_MAP_START( io_map, ADDRESS_SPACE_IO, 8 )
	121	static ADDRESS_MAP_START( kchampvs_map, ADDRESS_SPACE_PROGRAM, 8 )
	122	AM_RANGE(0x0000, 0xbfff) AM_ROM
	123	AM_RANGE(0xc000, 0xcfff) AM_RAM
	124	AM_RANGE(0xd000, 0xd3ff) AM_RAM_WRITE(kchamp_videoram_w) AM_BASE(&videoram)
	125	AM_RANGE(0xd400, 0xd7ff) AM_RAM_WRITE(kchamp_colorram_w) AM_BASE(&colorram)
	126	AM_RANGE(0xd800, 0xd8ff) AM_RAM AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
	127	AM_RANGE(0xd900, 0xdfff) AM_RAM
	128	AM_RANGE(0xe000, 0xffff) AM_ROM
	129	ADDRESS_MAP_END
	130
	131	static ADDRESS_MAP_START( kchampvs_io_map, ADDRESS_SPACE_IO, 8 )
143	132	ADDRESS_MAP_GLOBAL_MASK(0xff)
144	133	AM_RANGE(0x00, 0x00) AM_READ_PORT("P1") AM_WRITE(kchamp_flipscreen_w)
145	134	AM_RANGE(0x01, 0x01) AM_WRITE(control_w)
146	135	AM_RANGE(0x02, 0x02) AM_WRITE(sound_reset_w)
147	136	AM_RANGE(0x40, 0x40) AM_READ_PORT("P2") AM_WRITE(sound_command_w)
148	137	AM_RANGE(0x80, 0x80) AM_READ_PORT("SYSTEM")
149		AM_RANGE(0xC0, 0xC0) AM_READ_PORT("DSW")
	138	AM_RANGE(0xc0, 0xc0) AM_READ_PORT("DSW")
150	139	ADDRESS_MAP_END
151	140
152		static ADDRESS_MAP_START( sound_io_map, ADDRESS_SPACE_IO, 8 )
	141	static ADDRESS_MAP_START( kchampvs_sound_map, ADDRESS_SPACE_PROGRAM, 8 )
	142	AM_RANGE(0x0000, 0x5fff) AM_ROM
	143	AM_RANGE(0x6000, 0xffff) AM_RAM
	144	ADDRESS_MAP_END
	145
	146	static ADDRESS_MAP_START( kchampvs_sound_io_map, ADDRESS_SPACE_IO, 8 )
153	147	ADDRESS_MAP_GLOBAL_MASK(0xff)
154	148	AM_RANGE(0x00, 0x01) AM_DEVWRITE("ay1", ay8910_data_address_w)
155	149	AM_RANGE(0x01, 0x01) AM_READ(soundlatch_r)
r4679	r4680
158	152	AM_RANGE(0x05, 0x05) AM_DEVWRITE("msm", sound_control_w)
159	153	ADDRESS_MAP_END
160	154
	155
161	156	/********************
162	157	* 1 Player Version  *
163	158	********************/
164
165		static ADDRESS_MAP_START( kc_readmem, ADDRESS_SPACE_PROGRAM, 8 )
166		AM_RANGE(0x0000, 0xbfff) AM_READ(SMH_ROM)
167		AM_RANGE(0xc000, 0xdfff) AM_READ(SMH_RAM)
168		AM_RANGE(0xe000, 0xe3ff) AM_READ(SMH_RAM)
169		AM_RANGE(0xe400, 0xe7ff) AM_READ(SMH_RAM)
170		AM_RANGE(0xea00, 0xeaff) AM_READ(SMH_RAM)
171		AM_RANGE(0xeb00, 0xffff) AM_READ(SMH_RAM)
172		ADDRESS_MAP_END
173
174		static ADDRESS_MAP_START( kc_writemem, ADDRESS_SPACE_PROGRAM, 8 )
175		AM_RANGE(0x0000, 0xbfff) AM_WRITE(SMH_ROM)
176		AM_RANGE(0xc000, 0xdfff) AM_WRITE(SMH_RAM)
177		AM_RANGE(0xe000, 0xe3ff) AM_WRITE(kchamp_videoram_w) AM_BASE(&videoram)
178		AM_RANGE(0xe400, 0xe7ff) AM_WRITE(kchamp_colorram_w) AM_BASE(&colorram)
179		AM_RANGE(0xea00, 0xeaff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
180		AM_RANGE(0xeb00, 0xffff) AM_WRITE(SMH_RAM)
181		ADDRESS_MAP_END
182
183		static ADDRESS_MAP_START( kc_sound_readmem, ADDRESS_SPACE_PROGRAM, 8 )
184		AM_RANGE(0x0000, 0xdfff) AM_READ(SMH_ROM)
185		AM_RANGE(0xe000, 0xe2ff) AM_READ(SMH_RAM)
186		ADDRESS_MAP_END
187
188		static ADDRESS_MAP_START( kc_sound_writemem, ADDRESS_SPACE_PROGRAM, 8 )
189		AM_RANGE(0x0000, 0xdfff) AM_WRITE(SMH_ROM)
190		AM_RANGE(0xe000, 0xe2ff) AM_WRITE(SMH_RAM)
191		ADDRESS_MAP_END
192
193		static READ8_HANDLER( sound_reset_r ) {
194		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_RESET, PULSE_LINE);
	159	static READ8_HANDLER( sound_reset_r )
	160	{
	161	cputag_set_input_line(space->machine, "audiocpu", INPUT_LINE_RESET, PULSE_LINE);
195	162	return 0;
196	163	}
197	164
198		static WRITE8_HANDLER( kc_sound_control_w ) {
	165	static WRITE8_HANDLER( kc_sound_control_w )
	166	{
199	167	if ( offset == 0 )
200	168	sound_nmi_enable = ( ( data >> 7 ) & 1 );
201	169	//  else
202	170	//      DAC_set_volume(0,( data == 1 ) ? 255 : 0,0);
203	171	}
204	172
205		static ADDRESS_MAP_START( kc_io_map, ADDRESS_SPACE_IO, 8 )
	173	static ADDRESS_MAP_START( kchamp_map, ADDRESS_SPACE_PROGRAM, 8 )
	174	AM_RANGE(0x0000, 0xbfff) AM_ROM
	175	AM_RANGE(0xc000, 0xdfff) AM_RAM
	176	AM_RANGE(0xe000, 0xe3ff) AM_RAM_WRITE(kchamp_videoram_w) AM_BASE(&videoram)
	177	AM_RANGE(0xe400, 0xe7ff) AM_RAM_WRITE(kchamp_colorram_w) AM_BASE(&colorram)
	178	AM_RANGE(0xea00, 0xeaff) AM_RAM AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
	179	AM_RANGE(0xeb00, 0xffff) AM_RAM
	180	ADDRESS_MAP_END
	181
	182	static ADDRESS_MAP_START( kchamp_io_map, ADDRESS_SPACE_IO, 8 )
206	183	ADDRESS_MAP_GLOBAL_MASK(0xff)
207	184	AM_RANGE(0x80, 0x80) AM_READ_PORT("DSW") AM_WRITE(kchamp_flipscreen_w)
208	185	AM_RANGE(0x81, 0x81) AM_WRITE(control_w)
r4679	r4680
212	189	AM_RANGE(0xa8, 0xa8) AM_READWRITE(sound_reset_r, sound_command_w)
213	190	ADDRESS_MAP_END
214	191
215		static ADDRESS_MAP_START( kc_sound_io_map, ADDRESS_SPACE_IO, 8 )
	192	static ADDRESS_MAP_START( kchamp_sound_map, ADDRESS_SPACE_PROGRAM, 8 )
	193	AM_RANGE(0x0000, 0xdfff) AM_ROM
	194	AM_RANGE(0xe000, 0xe2ff) AM_RAM
	195	ADDRESS_MAP_END
	196
	197	static ADDRESS_MAP_START( kchamp_sound_io_map, ADDRESS_SPACE_IO, 8 )
216	198	ADDRESS_MAP_GLOBAL_MASK(0xff)
217	199	AM_RANGE(0x00, 0x01) AM_DEVWRITE("ay1", ay8910_data_address_w)
218	200	AM_RANGE(0x02, 0x03) AM_DEVWRITE("ay2", ay8910_data_address_w)
r4679	r4680
371	353
372	354
373	355
374		static INTERRUPT_GEN( kc_interrupt ) {
	356	static INTERRUPT_GEN( kc_interrupt )
	357	{
375	358
376	359	if ( nmi_enable )
377	360	cpu_set_input_line(device, INPUT_LINE_NMI, PULSE_LINE);
378	361	}
379	362
380		static void msmint(const device_config *device) {
	363	static void msmint(const device_config *device)
	364	{
381	365
382	366	static int counter = 0;
383	367
r4679	r4680
388	372
389	373	msm_play_lo_nibble ^= 1;
390	374
391		if ( !( counter ^= 1 ) ) {
392		if ( sound_nmi_enable ) {
393		cpu_set_input_line(device->machine->cpu[1], INPUT_LINE_NMI, PULSE_LINE );
	375	if ( !( counter ^= 1 ) )
	376	{
	377	if ( sound_nmi_enable )
	378	{
	379	cputag_set_input_line(device->machine, "audiocpu", INPUT_LINE_NMI, PULSE_LINE );
394	380	}
395	381	}
396	382	}
r4679	r4680
405	391	* 1 Player Version  *
406	392	********************/
407	393
408		static INTERRUPT_GEN( sound_int ) {
409
	394	static INTERRUPT_GEN( sound_int )
	395	{
410	396	if ( sound_nmi_enable )
411	397	cpu_set_input_line(device, INPUT_LINE_NMI, PULSE_LINE);
412	398	}
r4679	r4680
416	402
417	403	/* basic machine hardware */
418	404	MDRV_CPU_ADD("maincpu", Z80, 3000000)   /* 12MHz / 4 = 3.0 MHz */
419		MDRV_CPU_PROGRAM_MAP(readmem,writemem)
420		MDRV_CPU_IO_MAP(io_map,0)
	405	MDRV_CPU_PROGRAM_MAP(kchampvs_map,0)
	406	MDRV_CPU_IO_MAP(kchampvs_io_map,0)
421	407	MDRV_CPU_VBLANK_INT("screen", kc_interrupt)
422	408
423	409	MDRV_CPU_ADD("audiocpu", Z80, 3000000)   /* 12MHz / 4 = 3.0 MHz */
424		MDRV_CPU_PROGRAM_MAP(sound_readmem,sound_writemem)
425		MDRV_CPU_IO_MAP(sound_io_map,0)      /* irq's triggered from main cpu */
	410	MDRV_CPU_PROGRAM_MAP(kchampvs_sound_map,0)
	411	MDRV_CPU_IO_MAP(kchampvs_sound_io_map,0)      /* irq's triggered from main cpu */
426	412	/* nmi's from msm5205 */
427	413
428	414	/* video hardware */
r4679	r4680
462	448
463	449	/* basic machine hardware */
464	450	MDRV_CPU_ADD("maincpu", Z80, 3000000)   /* 12MHz / 4 = 3.0 MHz */
465		MDRV_CPU_PROGRAM_MAP(kc_readmem,kc_writemem)
466		MDRV_CPU_IO_MAP(kc_io_map,0)
	451	MDRV_CPU_PROGRAM_MAP(kchamp_map,0)
	452	MDRV_CPU_IO_MAP(kchamp_io_map,0)
467	453	MDRV_CPU_VBLANK_INT("screen", kc_interrupt)
468	454
469	455	MDRV_CPU_ADD("audiocpu", Z80, 3000000)   /* 12MHz / 4 = 3.0 MHz */
470		MDRV_CPU_PROGRAM_MAP(kc_sound_readmem,kc_sound_writemem)
471		MDRV_CPU_IO_MAP(kc_sound_io_map,0)
	456	MDRV_CPU_PROGRAM_MAP(kchamp_sound_map,0)
	457	MDRV_CPU_IO_MAP(kchamp_sound_io_map,0)
472	458	MDRV_CPU_PERIODIC_INT(sound_int, 125)   /* Hz */
473	459	/* irq's triggered from main cpu */
474	460	/* nmi's from 125 Hz clock */
r4679	r4680
498	484	MDRV_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.30)
499	485
500	486	MDRV_SOUND_ADD("dac", DAC, 0)
501		MDRV_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.50)
	487	MDRV_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.15) /* guess: using volume 0.50 makes the sound to clip a lot */
502	488	MACHINE_DRIVER_END
503	489
504	490
r4679	r4680
679	665	static DRIVER_INIT( kchampvs )
680	666	{
681	667	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
682		UINT8 *decrypted = auto_malloc(0x10000);
	668	UINT8 *decrypted = auto_alloc_array(machine, UINT8, 0x10000);
683	669	UINT8 *rom = memory_region(machine, "maincpu");
684	670	int A;
685	671

src/mame/drivers/olibochu.c

r4679	r4680
167	167	static int cmd;
168	168	int c;
169	169
170
171	170	if (offset == 0) cmd = (cmd & 0x00ff) | (data << 8);
172	171	else cmd = (cmd & 0xff00) | data;
173	172
r4679	r4680
178	177	}
179	178
180	179
181		static ADDRESS_MAP_START( readmem, ADDRESS_SPACE_PROGRAM, 8 )
182		AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM)
183		AM_RANGE(0x8000, 0x87ff) AM_READ(SMH_RAM)
	180	static ADDRESS_MAP_START( olibochu_map, ADDRESS_SPACE_PROGRAM, 8 )
	181	AM_RANGE(0x0000, 0x7fff) AM_ROM
	182	AM_RANGE(0x8000, 0x83ff) AM_RAM_WRITE(olibochu_videoram_w) AM_BASE(&videoram)
	183	AM_RANGE(0x8400, 0x87ff) AM_RAM_WRITE(olibochu_colorram_w) AM_BASE(&colorram)
184	184	AM_RANGE(0xa000, 0xa000) AM_READ_PORT("IN0")
185	185	AM_RANGE(0xa001, 0xa001) AM_READ_PORT("IN1")
186	186	AM_RANGE(0xa002, 0xa002) AM_READ_PORT("IN2")
187	187	AM_RANGE(0xa003, 0xa003) AM_READ_PORT("DSW0")
188	188	AM_RANGE(0xa004, 0xa004) AM_READ_PORT("DSW1")
189	189	AM_RANGE(0xa005, 0xa005) AM_READ_PORT("DSW2")
190		AM_RANGE(0xf000, 0xffff) AM_READ(SMH_RAM)
191		ADDRESS_MAP_END
192
193		static ADDRESS_MAP_START( writemem, ADDRESS_SPACE_PROGRAM, 8 )
194		AM_RANGE(0x0000, 0x7fff) AM_WRITE(SMH_ROM)
195		AM_RANGE(0x8000, 0x83ff) AM_WRITE(olibochu_videoram_w) AM_BASE(&videoram)
196		AM_RANGE(0x8400, 0x87ff) AM_WRITE(olibochu_colorram_w) AM_BASE(&colorram)
197	190	AM_RANGE(0xa800, 0xa801) AM_WRITE(sound_command_w)
198	191	AM_RANGE(0xa802, 0xa802) AM_WRITE(olibochu_flipscreen_w)   /* bit 6 = enable sound? */
199		AM_RANGE(0xf000, 0xffff) AM_WRITE(SMH_RAM)
200		AM_RANGE(0xf400, 0xf41f) AM_WRITE(SMH_RAM) AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
201		AM_RANGE(0xf440, 0xf47f) AM_WRITE(SMH_RAM) AM_BASE(&spriteram_2) AM_SIZE(&spriteram_2_size)
	192	AM_RANGE(0xf400, 0xf41f) AM_RAM AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
	193	AM_RANGE(0xf440, 0xf47f) AM_RAM AM_BASE(&spriteram_2) AM_SIZE(&spriteram_2_size)
	194	AM_RANGE(0xf000, 0xffff) AM_RAM
202	195	ADDRESS_MAP_END
203	196
204		static ADDRESS_MAP_START( sound_readmem, ADDRESS_SPACE_PROGRAM, 8 )
205		AM_RANGE(0x0000, 0x1fff) AM_READ(SMH_ROM)
206		AM_RANGE(0x6000, 0x63ff) AM_READ(SMH_RAM)
	197	static ADDRESS_MAP_START( olibochu_sound_map, ADDRESS_SPACE_PROGRAM, 8 )
	198	AM_RANGE(0x0000, 0x1fff) AM_ROM
	199	AM_RANGE(0x6000, 0x63ff) AM_RAM
207	200	AM_RANGE(0x7000, 0x7000) AM_READ(soundlatch_r)   /* likely ay8910 input port, not direct */
208		ADDRESS_MAP_END
209
210		static ADDRESS_MAP_START( sound_writemem, ADDRESS_SPACE_PROGRAM, 8 )
211		AM_RANGE(0x0000, 0x1fff) AM_WRITE(SMH_ROM)
212		AM_RANGE(0x6000, 0x63ff) AM_WRITE(SMH_RAM)
213	201	AM_RANGE(0x7000, 0x7001) AM_DEVWRITE("ay", ay8910_address_data_w)
214	202	ADDRESS_MAP_END
215	203
216	204
217
218	205	static INPUT_PORTS_START( olibochu )
219	206	PORT_START("IN0")
220	207	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_START1 )
r4679	r4680
367	354
368	355	/* basic machine hardware */
369	356	MDRV_CPU_ADD("maincpu", Z80, 4000000)   /* 4 MHz ?? */
370		MDRV_CPU_PROGRAM_MAP(readmem,writemem)
	357	MDRV_CPU_PROGRAM_MAP(olibochu_map,0)
371	358	MDRV_CPU_VBLANK_INT_HACK(olibochu_interrupt,2)
372	359
373	360	MDRV_CPU_ADD("audiocpu", Z80, 4000000)   /* 4 MHz ?? */
374		MDRV_CPU_PROGRAM_MAP(sound_readmem,sound_writemem)
375		MDRV_CPU_VBLANK_INT("screen", irq0_line_hold)
	361	MDRV_CPU_PROGRAM_MAP(olibochu_sound_map,0)
	362	MDRV_CPU_PERIODIC_INT(irq0_line_hold,60) //???
376	363
	364	//  MDRV_QUANTUM_PERFECT_CPU("maincpu")
	365
377	366	/* video hardware */
378	367	MDRV_SCREEN_ADD("screen", RASTER)
379	368	MDRV_SCREEN_REFRESH_RATE(60)

src/mame/drivers/ultratnk.c

r4679	r4680
29	29
30	30	static CUSTOM_INPUT( get_joystick )
31	31	{
32		UINT8 joy = input_port_read(field->port->machine, param) & 3;
	32	UINT8 joy = input_port_read(field->port->machine, (const char *)param) & 3;
33	33
34	34	if (joy == 1)
35	35	{
r4679	r4680
56	56	watchdog_enable(machine, input_port_read(machine, "IN0") & 0x40);
57	57
58	58	if (input_port_read(machine, "IN0") & 0x40)
59		cpu_set_input_line(machine->cpu[0], INPUT_LINE_NMI, PULSE_LINE);
	59	cputag_set_input_line(machine, "maincpu", INPUT_LINE_NMI, PULSE_LINE);
60	60
61	61	timer_set(machine, video_screen_get_time_until_pos(machine->primary_screen, scanline, 0), NULL, scanline, nmi_callback);
62	62	}

src/mame/drivers/m90.c

r4679	r4680
90	90
91	91	/***************************************************************************/
92	92
93		static ADDRESS_MAP_START( main_cpu, ADDRESS_SPACE_PROGRAM, 16 )
	93	static ADDRESS_MAP_START( m90_main_cpu_map, ADDRESS_SPACE_PROGRAM, 16 )
94	94	AM_RANGE(0x00000, 0x7ffff) AM_ROM
95	95	AM_RANGE(0x80000, 0x8ffff) AM_ROMBANK(1)   /* Quiz F1 only */
96	96	AM_RANGE(0xa0000, 0xa3fff) AM_RAM
r4679	r4680
99	99	AM_RANGE(0xffff0, 0xfffff) AM_ROM
100	100	ADDRESS_MAP_END
101	101
102		static ADDRESS_MAP_START( dynablsb_main_cpu, ADDRESS_SPACE_PROGRAM, 16 )
	102	static ADDRESS_MAP_START( dynablsb_main_cpu_map, ADDRESS_SPACE_PROGRAM, 16 )
103	103	AM_RANGE(0x00000, 0x3ffff) AM_ROM
104	104	AM_RANGE(0x6000e, 0x60fff) AM_RAM AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)
105	105	AM_RANGE(0xa0000, 0xa3fff) AM_RAM
r4679	r4680
108	108	AM_RANGE(0xffff0, 0xfffff) AM_ROM
109	109	ADDRESS_MAP_END
110	110
111		static ADDRESS_MAP_START( bomblord_main_cpu, ADDRESS_SPACE_PROGRAM, 16 )
	111	static ADDRESS_MAP_START( bomblord_main_cpu_map, ADDRESS_SPACE_PROGRAM, 16 )
112	112	AM_RANGE(0x00000, 0x7ffff) AM_ROM
113	113	AM_RANGE(0xa0000, 0xa3fff) AM_RAM
114	114	AM_RANGE(0xc000e, 0xc0fff) AM_RAM AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)
r4679	r4680
117	117	AM_RANGE(0xffff0, 0xfffff) AM_ROM
118	118	ADDRESS_MAP_END
119	119
120		static ADDRESS_MAP_START( main_cpu_io_map, ADDRESS_SPACE_IO, 16 )
	120	static ADDRESS_MAP_START( m90_main_cpu_io_map, ADDRESS_SPACE_IO, 16 )
121	121	AM_RANGE(0x00, 0x01) AM_WRITE(m72_sound_command_w)
122	122	AM_RANGE(0x00, 0x01) AM_READ_PORT("P1_P2")
123	123	AM_RANGE(0x02, 0x03) AM_WRITE(m90_coincounter_w)
r4679	r4680
128	128	AM_RANGE(0x80, 0x8f) AM_WRITE(m90_video_control_w)
129	129	ADDRESS_MAP_END
130	130
131		static ADDRESS_MAP_START( dynablsb_cpu_io, ADDRESS_SPACE_IO, 16 )
	131	static ADDRESS_MAP_START( dynablsb_cpu_io_map, ADDRESS_SPACE_IO, 16 )
132	132	AM_RANGE(0x00, 0x01) AM_WRITE(m72_sound_command_w)
133	133	AM_RANGE(0x00, 0x01) AM_READ_PORT("P1_P2")
134	134	AM_RANGE(0x02, 0x03) AM_WRITE(m90_coincounter_w)
r4679	r4680
142	142
143	143	/*****************************************************************************/
144	144
145		static ADDRESS_MAP_START( sound_readmem, ADDRESS_SPACE_PROGRAM, 8 )
146		AM_RANGE(0x0000, 0xefff) AM_READ(SMH_ROM)
147		AM_RANGE(0xf000, 0xffff) AM_READ(SMH_RAM)
	145	static ADDRESS_MAP_START( m90_sound_cpu_map, ADDRESS_SPACE_PROGRAM, 8 )
	146	AM_RANGE(0x0000, 0xefff) AM_ROM
	147	AM_RANGE(0xf000, 0xffff) AM_RAM
148	148	ADDRESS_MAP_END
149	149
150		static ADDRESS_MAP_START( sound_writemem, ADDRESS_SPACE_PROGRAM, 8 )
151		AM_RANGE(0x0000, 0xefff) AM_WRITE(SMH_ROM)
152		AM_RANGE(0xf000, 0xffff) AM_WRITE(SMH_RAM)
153		ADDRESS_MAP_END
154
155		static ADDRESS_MAP_START( sound_io_map, ADDRESS_SPACE_IO, 8 )
	150	static ADDRESS_MAP_START( m90_sound_cpu_io_map, ADDRESS_SPACE_IO, 8 )
156	151	ADDRESS_MAP_GLOBAL_MASK(0xff)
157	152	AM_RANGE(0x00, 0x01) AM_DEVREADWRITE("ym", ym2151_r, ym2151_w)
158	153	AM_RANGE(0x80, 0x80) AM_READ(soundlatch_r)
r4679	r4680
705	700	static MACHINE_DRIVER_START( m90 )
706	701	/* basic machine hardware */
707	702	MDRV_CPU_ADD("maincpu", V30,XTAL_32MHz/2/2) /* verified clock on cpu is 16Mhz but probably divided internally by 2 */
708		MDRV_CPU_PROGRAM_MAP(main_cpu,0)
709		MDRV_CPU_IO_MAP(main_cpu_io_map,0)
	703	MDRV_CPU_PROGRAM_MAP(m90_main_cpu_map,0)
	704	MDRV_CPU_IO_MAP(m90_main_cpu_io_map,0)
710	705	MDRV_CPU_VBLANK_INT("screen", m90_interrupt)
711	706
712	707	MDRV_CPU_ADD("soundcpu", Z80, XTAL_3_579545MHz) /* verified on pcb */
713		MDRV_CPU_PROGRAM_MAP(sound_readmem,sound_writemem)
714		MDRV_CPU_IO_MAP(sound_io_map,0)
	708	MDRV_CPU_PROGRAM_MAP(m90_sound_cpu_map,0)
	709	MDRV_CPU_IO_MAP(m90_sound_cpu_io_map,0)
715	710	MDRV_CPU_VBLANK_INT_HACK(nmi_line_pulse,128)   /* clocked by V1? (Vigilante) */
716	711	/* IRQs are generated by main Z80 and YM2151 */
717	712
r4679	r4680
786	781	/* basic machine hardware */
787	782	MDRV_CPU_ADD("maincpu", V30,XTAL_32MHz/2/2) /* verified clock on cpu is 16Mhz but probably divided internally by 2 */
788	783	MDRV_CPU_CONFIG(bomberman_config)
789
790		MDRV_CPU_PROGRAM_MAP(main_cpu,0)
791		MDRV_CPU_IO_MAP(main_cpu_io_map,0)
	784	MDRV_CPU_PROGRAM_MAP(m90_main_cpu_map,0)
	785	MDRV_CPU_IO_MAP(m90_main_cpu_io_map,0)
792	786	MDRV_CPU_VBLANK_INT("screen", m90_interrupt)
793	787
794	788	MDRV_CPU_ADD("soundcpu", Z80, XTAL_3_579545MHz) /* verified on pcb */
795		MDRV_CPU_PROGRAM_MAP(sound_readmem,sound_writemem)
796		MDRV_CPU_IO_MAP(sound_io_map,0)
	789	MDRV_CPU_PROGRAM_MAP(m90_sound_cpu_map,0)
	790	MDRV_CPU_IO_MAP(m90_sound_cpu_io_map,0)
797	791	MDRV_CPU_VBLANK_INT_HACK(nmi_line_pulse,128)   /* clocked by V1? (Vigilante) */
798	792	/* IRQs are generated by main Z80 and YM2151 */
799	793	MDRV_MACHINE_RESET(m72_sound)
r4679	r4680
831	825	/* basic machine hardware */
832	826	MDRV_CPU_ADD("maincpu", V30,XTAL_32MHz/2/2) /* verified clock on cpu is 16Mhz but probably divided internally by 2 */
833	827	MDRV_CPU_CONFIG(dynablaster_config)
834
835		MDRV_CPU_PROGRAM_MAP(main_cpu,0)
836		MDRV_CPU_IO_MAP(main_cpu_io_map,0)
	828	MDRV_CPU_PROGRAM_MAP(m90_main_cpu_map,0)
	829	MDRV_CPU_IO_MAP(m90_main_cpu_io_map,0)
837	830	MDRV_CPU_VBLANK_INT("screen", m90_interrupt)
838	831
839	832	MDRV_CPU_ADD("soundcpu", Z80, XTAL_3_579545MHz) /* verified on pcb */
840		MDRV_CPU_PROGRAM_MAP(sound_readmem,sound_writemem)
	833	MDRV_CPU_PROGRAM_MAP(m90_sound_cpu_map,0)
841	834	MDRV_CPU_IO_MAP(bbmanw_sound_io_map,0)
842	835	MDRV_CPU_VBLANK_INT_HACK(nmi_line_pulse,128)   /* clocked by V1? (Vigilante) */
843	836	/* IRQs are generated by main Z80 and YM2151 */
r4679	r4680
875	868
876	869	MDRV_IMPORT_FROM( bbmanw )
877	870	MDRV_CPU_MODIFY("soundcpu")
878		MDRV_CPU_PROGRAM_MAP(sound_readmem,sound_writemem)
879		MDRV_CPU_IO_MAP(sound_io_map,0)
	871	MDRV_CPU_PROGRAM_MAP(m90_sound_cpu_map,0)
	872	MDRV_CPU_IO_MAP(m90_sound_cpu_io_map,0)
880	873	MDRV_CPU_VBLANK_INT_HACK(nmi_line_pulse,128)   /* clocked by V1? (Vigilante) */
881	874	/* IRQs are generated by main Z80 and YM2151 */
882	875
r4679	r4680
887	880	MDRV_IMPORT_FROM( bbmanw )
888	881	MDRV_CPU_MODIFY("maincpu")
889	882	MDRV_CPU_CONFIG(no_table)
890		MDRV_CPU_PROGRAM_MAP(bomblord_main_cpu,0)
891		MDRV_CPU_IO_MAP(dynablsb_cpu_io,0)
	883	MDRV_CPU_PROGRAM_MAP(bomblord_main_cpu_map,0)
	884	MDRV_CPU_IO_MAP(dynablsb_cpu_io_map,0)
892	885
893	886	MDRV_VIDEO_START(bomblord)
894	887	MDRV_VIDEO_UPDATE(bomblord)
r4679	r4680
901	894
902	895	/* basic machine hardware */
903	896	MDRV_CPU_ADD("maincpu", V30,32000000/4)
904		MDRV_CPU_PROGRAM_MAP(dynablsb_main_cpu,0)
905		MDRV_CPU_IO_MAP(dynablsb_cpu_io,0)
	897	MDRV_CPU_PROGRAM_MAP(dynablsb_main_cpu_map,0)
	898	MDRV_CPU_IO_MAP(dynablsb_cpu_io_map,0)
906	899	MDRV_CPU_VBLANK_INT("screen", m90_interrupt)
907	900
908	901	MDRV_CPU_ADD("soundcpu", Z80, XTAL_3_579545MHz)   /* 3.579545 MHz */
909		MDRV_CPU_PROGRAM_MAP(sound_readmem,sound_writemem)
910		MDRV_CPU_IO_MAP(sound_io_map,0)
	902	MDRV_CPU_PROGRAM_MAP(m90_sound_cpu_map,0)
	903	MDRV_CPU_IO_MAP(m90_sound_cpu_io_map,0)
911	904	MDRV_CPU_VBLANK_INT_HACK(nmi_line_pulse,128)   /* clocked by V1? (Vigilante) */
912	905	/* IRQs are generated by main Z80 and YM2151 */
913	906	MDRV_MACHINE_RESET(m72_sound)

src/mame/drivers/taitogn.c

r4679	r4680
484	484
485	485	static void install_handlers(running_machine *machine, int mode)
486	486	{
487		const address_space *a = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM);
	487	const address_space *a = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
488	488	if(mode == 0) {
489	489	// Mode 0 has access to the subbios, the mn102 flash and the rf5c296 mem zone
490	490	memory_install_readwrite32_handler(a, 0x1f000000, 0x1f1fffff, 0, 0, flash_subbios_r, flash_subbios_w);
491	491	memory_install_readwrite32_handler(a, 0x1f200000, 0x1f2fffff, 0, 0, rf5c296_mem_r, rf5c296_mem_w);
492	492	memory_install_readwrite32_handler(a, 0x1f300000, 0x1f37ffff, 0, 0, flash_mn102_r, flash_mn102_w);
493		memory_install_readwrite32_handler(a, 0x1f380000, 0x1f5fffff, 0, 0, SMH_NOP, SMH_NOP);
	493	memory_install_readwrite32_handler(a, 0x1f380000, 0x1f5fffff, 0, 0, (read32_space_func)SMH_NOP, (write32_space_func)SMH_NOP);
494	494
495	495	} else {
496	496	// Mode 1 has access to the 3 samples flashes
r4679	r4680
703	703
704	704	if( param )
705	705	{
706		timer_adjust_oneshot( dip_timer, cpu_clocks_to_attotime( machine->cpu[0], 50 ), 0 );
	706	timer_adjust_oneshot(dip_timer, cputag_clocks_to_attotime(machine, "maincpu", 50), 0);
707	707	}
708	708	}
709	709
r4679	r4680
813	813	static DRIVER_INIT( coh3002t_mp )
814	814	{
815	815	DRIVER_INIT_CALL(coh3002t);
816		memory_install_read32_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x1fa10100, 0x1fa10103, 0, 0, gnet_mahjong_panel_r );
	816	memory_install_read32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x1fa10100, 0x1fa10103, 0, 0, gnet_mahjong_panel_r );
817	817	}
818	818
819	819	static MACHINE_RESET( coh3002t )

src/mame/drivers/tugboat.c

r4679	r4680
186	186
187	187	static TIMER_CALLBACK( interrupt_gen )
188	188	{
189		cpu_set_input_line(machine->cpu[0], 0, HOLD_LINE);
	189	cputag_set_input_line(machine, "maincpu", 0, HOLD_LINE);
190	190	timer_set(machine, video_screen_get_frame_period(machine->primary_screen), NULL, 0, interrupt_gen);
191	191	}
192	192

src/mame/drivers/kingdrby.c

r4679	r4680
242	242
243	243	static WRITE8_DEVICE_HANDLER( sound_cmd_w )
244	244	{
245		cpu_set_input_line(device->machine->cpu[2], INPUT_LINE_NMI, PULSE_LINE);
	245	cputag_set_input_line(device->machine, "soundcpu", INPUT_LINE_NMI, PULSE_LINE);
246	246	sound_cmd = data;
247	247	/* soundlatch is unneeded since we are already using perfect interleave. */
248	248	// soundlatch_w(space,0, data);

src/mame/drivers/gunbustr.c

r4679	r4680
64	64
65	65	static TIMER_CALLBACK( gunbustr_interrupt5 )
66	66	{
67		cpu_set_input_line(machine->cpu[0],5,HOLD_LINE);
	67	cputag_set_input_line(machine, "maincpu", 5, HOLD_LINE);
68	68	}
69	69
70	70	static INTERRUPT_GEN( gunbustr_interrupt )
r4679	r4680
174	174	MEMORY STRUCTURES
175	175	***********************************************************/
176	176
177		static ADDRESS_MAP_START( gunbustr_readmem, ADDRESS_SPACE_PROGRAM, 32 )
178		AM_RANGE(0x000000, 0x0fffff) AM_READ(SMH_ROM)
179		AM_RANGE(0x200000, 0x21ffff) AM_READ(SMH_RAM)   /* main CPUA ram */
180		AM_RANGE(0x300000, 0x301fff) AM_READ(SMH_RAM)   /* Sprite ram */
181		AM_RANGE(0x390000, 0x3907ff) AM_READ(SMH_RAM)   /* Sound shared ram */
	177	static ADDRESS_MAP_START( gunbustr_map, ADDRESS_SPACE_PROGRAM, 32 )
	178	AM_RANGE(0x000000, 0x0fffff) AM_ROM
	179	AM_RANGE(0x200000, 0x21ffff) AM_RAM AM_BASE(&gunbustr_ram)                              /* main CPUA ram */
	180	AM_RANGE(0x300000, 0x301fff) AM_RAM AM_BASE(&spriteram32) AM_SIZE(&spriteram_size)            /* Sprite ram */
	181	AM_RANGE(0x380000, 0x380003) AM_WRITE(motor_control_w)                                 /* motor, lamps etc. */
	182	AM_RANGE(0x390000, 0x3907ff) AM_RAM AM_BASE(&f3_shared_ram)                              /* Sound shared ram */
182	183	AM_RANGE(0x400000, 0x400003) AM_READ_PORT("P1_P2")
183	184	AM_RANGE(0x400004, 0x400007) AM_READ_PORT("SYSTEM")
184		AM_RANGE(0x500000, 0x500003) AM_READ(gunbustr_gun_r)   /* gun coord read */
185		AM_RANGE(0x800000, 0x80ffff) AM_READ(TC0480SCP_long_r)
186		AM_RANGE(0x830000, 0x83002f) AM_READ(TC0480SCP_ctrl_long_r)
187		AM_RANGE(0x900000, 0x901fff) AM_READ(SMH_RAM)   /* Palette ram */
188		AM_RANGE(0xc00000, 0xc03fff) AM_READ(SMH_RAM)   /* network ram ?? */
	185	AM_RANGE(0x400000, 0x400007) AM_WRITE(gunbustr_input_w)                                 /* eerom etc. */
	186	AM_RANGE(0x500000, 0x500003) AM_READWRITE(gunbustr_gun_r, gunbustr_gun_w)                  /* gun coord read */
	187	AM_RANGE(0x800000, 0x80ffff) AM_READWRITE(TC0480SCP_long_r, TC0480SCP_long_w)
	188	AM_RANGE(0x830000, 0x83002f) AM_READWRITE(TC0480SCP_ctrl_long_r, TC0480SCP_ctrl_long_w)
	189	AM_RANGE(0x900000, 0x901fff) AM_RAM_WRITE(gunbustr_palette_w) AM_BASE(&paletteram32)         /* Palette ram */
	190	AM_RANGE(0xc00000, 0xc03fff) AM_RAM                                                /* network ram ?? */
189	191	ADDRESS_MAP_END
190	192
191		static ADDRESS_MAP_START( gunbustr_writemem, ADDRESS_SPACE_PROGRAM, 32 )
192		AM_RANGE(0x000000, 0x0fffff) AM_WRITE(SMH_ROM)
193		AM_RANGE(0x200000, 0x21ffff) AM_WRITE(SMH_RAM) AM_BASE(&gunbustr_ram)
194		AM_RANGE(0x300000, 0x301fff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram32) AM_SIZE(&spriteram_size)
195		AM_RANGE(0x380000, 0x380003) AM_WRITE(motor_control_w)   /* motor, lamps etc. */
196		AM_RANGE(0x390000, 0x3907ff) AM_WRITE(SMH_RAM) AM_BASE(&f3_shared_ram)
197		AM_RANGE(0x400000, 0x400007) AM_WRITE(gunbustr_input_w)   /* eerom etc. */
198		AM_RANGE(0x500000, 0x500003) AM_WRITE(gunbustr_gun_w)   /* gun int request */
199		AM_RANGE(0x800000, 0x80ffff) AM_WRITE(TC0480SCP_long_w)
200		AM_RANGE(0x830000, 0x83002f) AM_WRITE(TC0480SCP_ctrl_long_w)
201		AM_RANGE(0x900000, 0x901fff) AM_WRITE(gunbustr_palette_w) AM_BASE(&paletteram32)
202		AM_RANGE(0xc00000, 0xc03fff) AM_WRITE(SMH_RAM)   /* network ram ?? */
203		ADDRESS_MAP_END
204
205	193	/***********************************************************
206	194	INPUT PORTS (dips in eprom)
207	195	***********************************************************/
r4679	r4680
361	349
362	350	/* basic machine hardware */
363	351	MDRV_CPU_ADD("maincpu", M68EC020, 16000000)   /* 16 MHz */
364		MDRV_CPU_PROGRAM_MAP(gunbustr_readmem,gunbustr_writemem)
	352	MDRV_CPU_PROGRAM_MAP(gunbustr_map,0)
365	353	MDRV_CPU_VBLANK_INT("screen", gunbustr_interrupt) /* VBL */
366	354
367	355	TAITO_F3_SOUND_SYSTEM_CPU(16000000)
r4679	r4680
431	419	static DRIVER_INIT( gunbustr )
432	420	{
433	421	/* Speedup handler */
434		memory_install_read32_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x203acc, 0x203acf, 0, 0, main_cycle_r);
	422	memory_install_read32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x203acc, 0x203acf, 0, 0, main_cycle_r);
435	423	}
436	424
437	425	GAME( 1992, gunbustr, 0,      gunbustr, gunbustr, gunbustr, ORIENTATION_FLIP_X, "Taito Corporation", "Gunbuster (Japan)", 0 )

src/mame/drivers/scotrsht.c

r4679	r4680
65	65
66	66	static WRITE8_HANDLER( scotrsht_soundlatch_w )
67	67	{
68		soundlatch_w(space,0,data);
69		cpu_set_input_line(space->machine->cpu[1], 0, HOLD_LINE);
	68	soundlatch_w(space, 0, data);
	69	cputag_set_input_line(space->machine, "audiocpu", 0, HOLD_LINE);
70	70	}
71	71
72	72	static ADDRESS_MAP_START( scotrsht_map, ADDRESS_SPACE_PROGRAM, 8 )

src/mame/drivers/taito_z.c

r4679	r4680
4193	4193	ROM_LOAD( "c09-23.14", 0x00000, 0x00100, CRC(fbf81f30) SHA1(c868452c334792345dcced075f6df69cff9e31ca) )   // road A/B internal priority
4194	4194	ROM_END
4195	4195
	4196	ROM_START( scin )
	4197	ROM_REGION( 0x80000, "maincpu", 0 )   /* 512K for 68000 code (CPU A) */
	4198	ROM_LOAD16_BYTE( "ic37.37", 0x00000, 0x20000, CRC(33fb159c) SHA1(b004a5249414f69768d8a951ded3c104ea107b32) )
	4199	ROM_LOAD16_BYTE( "ic40.38", 0x00001, 0x20000, CRC(657df3f2) SHA1(80e30961e2cdcb834d2cbd48803ace68acaab422) )
	4200	ROM_LOAD16_BYTE( "ic38.42", 0x40000, 0x20000, CRC(0a09b90b) SHA1(0970644a0d79ab3898187849bec6c7cf598652f3) )
	4201	ROM_LOAD16_BYTE( "ic41.39", 0x40001, 0x20000, CRC(43167b2a) SHA1(1e6f2a113deb57df869ec2ceb99d6a7ecfa5d7e5) )
	4202
	4203	ROM_REGION( 0x20000, "sub", 0 )   /* 128K for 68000 code (CPU B) */
	4204	ROM_LOAD16_BYTE( "c09-33.6", 0x00000, 0x10000, CRC(cf4e6c5b) SHA1(8d6720b605b8e0c7f0473ba452c79bf5efc2615d) ) /* Actual label is "C09 33*" */
	4205	ROM_LOAD16_BYTE( "c09-32.5", 0x00001, 0x10000, CRC(a4713719) SHA1(b1110e397d3407ec63975cdd92a23cbb16348200) ) /* Actual label is "C09 32*" */
	4206
	4207	ROM_REGION( 0x2c000, "audiocpu", 0 )   /* Z80 sound cpu */
	4208	ROM_LOAD( "c09-34.31",   0x00000, 0x04000, CRC(a21b3151) SHA1(f59c7b1ba5edf97d72670ee194ce9fdc5c5b9a58) )
	4209	ROM_CONTINUE(            0x10000, 0x1c000 )   /* banked stuff */
	4210
	4211	ROM_REGION( 0x80000, "gfx1", ROMREGION_DISPOSE )
	4212	ROM_LOAD( "c09-05.16", 0x00000, 0x80000, CRC(890b38f0) SHA1(b478c96214ce027926346a4653250c8ee8a98bdc) )   /* SCR 8x8 */
	4213
	4214	ROM_REGION( 0x200000, "gfx2", ROMREGION_DISPOSE )
	4215	ROM_LOAD32_BYTE( "c09-04.52", 0x000000, 0x080000, CRC(2cbb3c9b) SHA1(9e3d95f76f5f5d385b6a9516af781aefef1eb0ca) )   /* OBJ 16x8 */
	4216	ROM_LOAD32_BYTE( "c09-02.53", 0x000001, 0x080000, CRC(a83a0389) SHA1(932788b5b5f01326d0fbb2b9fdb94a8c7c004db3) )
	4217	ROM_LOAD32_BYTE( "c09-03.54", 0x000002, 0x080000, CRC(a31d0e80) SHA1(dfeff1b89dd7b3f19b26e77f2d66f6448cb00553) )
	4218	ROM_LOAD32_BYTE( "c09-01.55", 0x000003, 0x080000, CRC(64bfea10) SHA1(15ea43092027b1717d0f24fbe6ac2cdf11a7ddc6) )
	4219
	4220	ROM_REGION( 0x80000, "gfx3", 0 )   /* don't dispose */
	4221	ROM_LOAD( "c09-07.15", 0x00000, 0x80000, CRC(963bc82b) SHA1(e3558aecd1b82ddbf10ab2b71843a3664705f1f1) )   /* ROD, road lines */
	4222
	4223	ROM_REGION16_LE( 0x80000, "user1", 0 )
	4224	ROM_LOAD16_WORD( "c09-06.37", 0x00000, 0x80000, CRC(12df6d7b) SHA1(8ce742eb3f7eb6283b5ca32bb520d1cc7684d515) )   /* STY spritemap */
	4225
	4226	ROM_REGION( 0x180000, "ym", 0 )   /* ADPCM samples */
	4227	ROM_LOAD( "c09-14.42", 0x000000, 0x080000, CRC(ad78bf46) SHA1(4020744bbdc4b9ec3dee1a9d7b5ffa8def43d7b2) )
	4228	ROM_LOAD( "c09-13.43", 0x080000, 0x080000, CRC(d57c41d3) SHA1(3375a1fc6389840544b9fdb96b2fafbc8e3276e2) )
	4229	ROM_LOAD( "c09-12.44", 0x100000, 0x080000, CRC(56c99fa5) SHA1(3f9a6bc89d847cc4c99d35f98157ea3f187c0f98) )
	4230
	4231	ROM_REGION( 0x80000, "ym.deltat", 0 )   /* Delta-T samples */
	4232	ROM_LOAD( "c09-15.29", 0x00000, 0x80000, CRC(e63b9095) SHA1(c6ea670b5a90ab39429259ec1fefb2bde5d0213f) )
	4233
	4234	ROM_REGION( 0x10000, "user2", 0 )   /* unused ROMs */
	4235	ROM_LOAD( "c09-16.17", 0x00000, 0x10000, CRC(7245a6f6) SHA1(5bdde4e3bcde8c59dc84478c3cc079d7ef8ee9c5) )
	4236	ROM_LOAD( "c09-20.71", 0x00000, 0x00100, CRC(cd8ffd80) SHA1(133bcd291a3751bce5293cb6b685f87258e8db19) )   // road/sprite priority and palette select
	4237	ROM_LOAD( "c09-23.14", 0x00000, 0x00100, CRC(fbf81f30) SHA1(c868452c334792345dcced075f6df69cff9e31ca) )   // road A/B internal priority
	4238
	4239	ROM_END
	4240
4196	4241	ROM_START( nightstr )
4197	4242	ROM_REGION( 0x80000, "maincpu", 0 )   /* 512K for 68000 code (CPU A) */
4198	4243	ROM_LOAD16_BYTE( "b91-45.bin", 0x00000, 0x20000, CRC(7ad63421) SHA1(4ecfc3c8cd691d878e5d9212ccff0d225bb06bd9) )
r4679	r4680
4647	4692	GAMEL(1989, scia,     sci,      sci,      sci,      taitoz,   ROT0,               "Taito Corporation Japan", "Special Criminal Investigation (World set 2)", GAME_IMPERFECT_GRAPHICS, layout_contcirc )
4648	4693	GAMEL(1989, scij,     sci,      sci,      scij,     taitoz,   ROT0,               "Taito Corporation", "Special Criminal Investigation (Japan)", GAME_IMPERFECT_GRAPHICS, layout_contcirc )
4649	4694	GAMEL(1989, sciu,     sci,      sci,      sciu,     taitoz,   ROT0,               "Taito America Corporation", "Special Criminal Investigation (US)", GAME_IMPERFECT_GRAPHICS, layout_contcirc )
	4695	GAMEL(1991, scin,     sci,      sci,      sci,      taitoz,   ROT0,               "Taito Corporation Japan", "Special Criminal Investigation (Negro Torino hack)", GAME_IMPERFECT_GRAPHICS, layout_contcirc )
4650	4696	GAME( 1989, nightstr, 0,        nightstr, nightstr, taitoz,   ROT0,               "Taito Corporation Japan", "Night Striker (World)", GAME_IMPERFECT_GRAPHICS )
4651	4697	GAME( 1989, nghtstrj, nightstr, nightstr, nghtstrj, taitoz,   ROT0,               "Taito Corporation", "Night Striker (Japan)", GAME_IMPERFECT_GRAPHICS )
4652	4698	GAME( 1989, nghtstru, nightstr, nightstr, nghtstru, taitoz,   ROT0,               "Taito America Corporation", "Night Striker (US)", GAME_IMPERFECT_GRAPHICS )

src/mame/drivers/phoenix.c

r4679	r4680
39	39
40	40	static ADDRESS_MAP_START( phoenix_memory_map, ADDRESS_SPACE_PROGRAM, 8 )
41	41	AM_RANGE(0x0000, 0x3fff) AM_ROM
42		AM_RANGE(0x4000, 0x4fff) AM_READWRITE(SMH_BANK1, phoenix_videoram_w)   /* 2 pages selected by bit 0 of the video register */
	42	AM_RANGE(0x4000, 0x4fff) AM_READWRITE(SMH_BANK(1), phoenix_videoram_w)   /* 2 pages selected by bit 0 of the video register */
43	43	AM_RANGE(0x5000, 0x53ff) AM_WRITE(phoenix_videoreg_w)
44	44	AM_RANGE(0x5800, 0x5bff) AM_WRITE(phoenix_scroll_w)
45	45	AM_RANGE(0x6000, 0x63ff) AM_DEVWRITE("discrete", phoenix_sound_control_a_w)
r4679	r4680
50	50
51	51	static ADDRESS_MAP_START( pleiads_memory_map, ADDRESS_SPACE_PROGRAM, 8 )
52	52	AM_RANGE(0x0000, 0x3fff) AM_ROM
53		AM_RANGE(0x4000, 0x4fff) AM_READWRITE(SMH_BANK1, phoenix_videoram_w)   /* 2 pages selected by bit 0 of the video register */
	53	AM_RANGE(0x4000, 0x4fff) AM_READWRITE(SMH_BANK(1), phoenix_videoram_w)   /* 2 pages selected by bit 0 of the video register */
54	54	AM_RANGE(0x5000, 0x53ff) AM_WRITE(pleiads_videoreg_w)
55	55	AM_RANGE(0x5800, 0x5bff) AM_WRITE(phoenix_scroll_w)
56	56	AM_RANGE(0x6000, 0x63ff) AM_WRITE(pleiads_sound_control_a_w)
r4679	r4680
61	61
62	62	static ADDRESS_MAP_START( survival_memory_map, ADDRESS_SPACE_PROGRAM, 8 )
63	63	AM_RANGE(0x0000, 0x3fff) AM_ROM
64		AM_RANGE(0x4000, 0x4fff) AM_READWRITE(SMH_BANK1, phoenix_videoram_w)   /* 2 pages selected by bit 0 of the video register */
	64	AM_RANGE(0x4000, 0x4fff) AM_READWRITE(SMH_BANK(1), phoenix_videoram_w)   /* 2 pages selected by bit 0 of the video register */
65	65	AM_RANGE(0x5000, 0x53ff) AM_WRITE(phoenix_videoreg_w)
66	66	AM_RANGE(0x5800, 0x5bff) AM_WRITE(phoenix_scroll_w)
67	67	AM_RANGE(0x6800, 0x68ff) AM_DEVWRITE("ay", ay8910_address_w)
r4679	r4680
1058	1058	static DRIVER_INIT( condor )
1059	1059	{
1060	1060	/* additional inputs for coinage */
1061		memory_install_read_port_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x5000, 0x5000, 0, 0, "DSW1");
	1061	memory_install_read_port_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x5000, 0x5000, 0, 0, "DSW1");
1062	1062	}
1063	1063
1064	1064

src/mame/drivers/lastfght.c

r4679	r4680
80	80	for (i = 0; i < 2; i++)
81	81	lastfght_bitmap[i] = video_screen_auto_bitmap_alloc(machine->primary_screen);
82	82
83		colorram = auto_malloc(256*3);
	83	colorram = auto_alloc_array(machine, UINT8, 256*3);
84	84	}
85	85
86	86
r4679	r4680
455	455	generic_pulse_irq_line(device, 0);
456	456	break;
457	457	default:
458		cpu_set_input_line(device->machine->cpu[0], H8_METRO_TIMER_HACK, HOLD_LINE);
	458	cputag_set_input_line(device->machine, "maincpu", H8_METRO_TIMER_HACK, HOLD_LINE);
459	459	break;
460	460	}
461	461	}

src/mame/drivers/markham.c

r4679	r4680
29	29
30	30	/****************************************************************************/
31	31
32		static ADDRESS_MAP_START( readmem1, ADDRESS_SPACE_PROGRAM, 8 )
33		AM_RANGE(0x0000, 0x5fff) AM_READ(SMH_ROM)
	32	static ADDRESS_MAP_START( markham_master_map, ADDRESS_SPACE_PROGRAM, 8 )
	33	AM_RANGE(0x0000, 0x5fff) AM_ROM
34	34
35		AM_RANGE(0xc000, 0xc7ff) AM_READ(SMH_RAM)
36		AM_RANGE(0xc800, 0xcfff) AM_READ(SMH_RAM)
37		AM_RANGE(0xd000, 0xd7ff) AM_READ(SMH_RAM)
38		AM_RANGE(0xd800, 0xdfff) AM_READ(SMH_RAM) AM_SHARE(1)
	35	AM_RANGE(0xc000, 0xc7ff) AM_RAM
	36	AM_RANGE(0xc800, 0xcfff) AM_RAM AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
	37	AM_RANGE(0xd000, 0xd7ff) AM_RAM_WRITE(markham_videoram_w) AM_BASE(&videoram)
	38	AM_RANGE(0xd800, 0xdfff) AM_RAM AM_SHARE(1)
39	39
40	40	AM_RANGE(0xe000, 0xe000) AM_READ_PORT("DSW2")
41	41	AM_RANGE(0xe001, 0xe001) AM_READ_PORT("DSW1")
r4679	r4680
46	46
47	47	AM_RANGE(0xe005, 0xe005) AM_READ_PORT("SYSTEM")
48	48
49		ADDRESS_MAP_END
50
51		static ADDRESS_MAP_START( writemem1, ADDRESS_SPACE_PROGRAM, 8 )
52		AM_RANGE(0x0000, 0x5fff) AM_WRITE(SMH_ROM)
53
54		AM_RANGE(0xc000, 0xc7ff) AM_WRITE(SMH_RAM)
55		AM_RANGE(0xc800, 0xcfff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
56		AM_RANGE(0xd000, 0xd7ff) AM_WRITE(markham_videoram_w) AM_BASE(&videoram)
57		AM_RANGE(0xd800, 0xdfff) AM_WRITE(SMH_RAM) AM_SHARE(1)
58
59	49	AM_RANGE(0xe008, 0xe008) AM_WRITENOP /* coin counter? */
60
61	50	AM_RANGE(0xe009, 0xe009) AM_WRITENOP /* to CPU2 busreq */
62	51
63		AM_RANGE(0xe00c, 0xe00d) AM_WRITE(SMH_RAM) AM_BASE(&markham_xscroll)
	52	AM_RANGE(0xe00c, 0xe00d) AM_WRITEONLY AM_BASE(&markham_xscroll)
64	53	AM_RANGE(0xe00e, 0xe00e) AM_WRITE(markham_flipscreen_w)
65	54	ADDRESS_MAP_END
66	55
67		static ADDRESS_MAP_START( readmem2, ADDRESS_SPACE_PROGRAM, 8 )
68		AM_RANGE(0x0000, 0x5fff) AM_READ(SMH_ROM)
69		AM_RANGE(0x8000, 0x87ff) AM_READ(SMH_RAM) AM_SHARE(1)
70		ADDRESS_MAP_END
	56	static ADDRESS_MAP_START( markham_slave_map, ADDRESS_SPACE_PROGRAM, 8 )
	57	AM_RANGE(0x0000, 0x5fff) AM_ROM
	58	AM_RANGE(0x8000, 0x87ff) AM_RAM AM_SHARE(1)
71	59
72		static ADDRESS_MAP_START( writemem2, ADDRESS_SPACE_PROGRAM, 8 )
73		AM_RANGE(0x0000, 0x5fff) AM_WRITE(SMH_ROM)
74		AM_RANGE(0x8000, 0x87ff) AM_WRITE(SMH_RAM) AM_SHARE(1)
75
76	60	AM_RANGE(0xc000, 0xc000) AM_DEVWRITE("sn1", sn76496_w)
77	61	AM_RANGE(0xc001, 0xc001) AM_DEVWRITE("sn2", sn76496_w)
78	62
r4679	r4680
200	184
201	185	/* basic machine hardware */
202	186	MDRV_CPU_ADD("maincpu", Z80,8000000/2) /* 4.000MHz */
203		MDRV_CPU_PROGRAM_MAP(readmem1,writemem1)
	187	MDRV_CPU_PROGRAM_MAP(markham_master_map,0)
204	188	MDRV_CPU_VBLANK_INT("screen", irq0_line_hold)
205	189
206	190	MDRV_CPU_ADD("sub", Z80,8000000/2) /* 4.000MHz */
207		MDRV_CPU_PROGRAM_MAP(readmem2,writemem2)
	191	MDRV_CPU_PROGRAM_MAP(markham_slave_map,0)
208	192	MDRV_CPU_VBLANK_INT("screen", irq0_line_hold)
209	193
210	194	MDRV_QUANTUM_TIME(HZ(6000))

src/mame/drivers/msisaac.c

r4679	r4680
48	48
49	49	static TIMER_CALLBACK( nmi_callback )
50	50	{
51		if (sound_nmi_enable) cpu_set_input_line(machine->cpu[1],INPUT_LINE_NMI,PULSE_LINE);
	51	if (sound_nmi_enable) cputag_set_input_line(machine, "audiocpu", INPUT_LINE_NMI, PULSE_LINE);
52	52	else pending_nmi = 1;
53	53	}
54	54
r4679	r4680
68	68	sound_nmi_enable = 1;
69	69	if (pending_nmi)
70	70	{
71		cpu_set_input_line(space->machine->cpu[1],INPUT_LINE_NMI,PULSE_LINE);
	71	cputag_set_input_line(space->machine, "audiocpu", INPUT_LINE_NMI, PULSE_LINE);
72	72	pending_nmi = 0;
73	73	}
74	74	}
r4679	r4680
198	198	#endif
199	199	}
200	200
201		static ADDRESS_MAP_START( readmem, ADDRESS_SPACE_PROGRAM, 8 )
202		AM_RANGE(0x0000, 0xdfff) AM_READ(SMH_ROM)
203		AM_RANGE(0xe000, 0xe7ff) AM_READ(SMH_RAM)
	201	static ADDRESS_MAP_START( msisaac_map, ADDRESS_SPACE_PROGRAM, 8 )
	202	AM_RANGE(0x0000, 0xdfff) AM_ROM
	203	AM_RANGE(0xe000, 0xe7ff) AM_RAM
	204	AM_RANGE(0xe800, 0xefff) AM_RAM_WRITE(paletteram_xxxxRRRRGGGGBBBB_le_w) AM_BASE(&paletteram)
	205	AM_RANGE(0xf000, 0xf000) AM_WRITE(msisaac_bg2_textbank_w)
	206	AM_RANGE(0xf001, 0xf001) AM_WRITENOP                //???
	207	AM_RANGE(0xf002, 0xf002) AM_WRITENOP                //???
204	208
205		AM_RANGE(0xf0e0, 0xf0e0) AM_READ(msisaac_mcu_r)
206		AM_RANGE(0xf0e1, 0xf0e1) AM_READ(msisaac_mcu_status_r)
207
208		AM_RANGE(0xf080, 0xf080) AM_READ_PORT("DSW1")
209		AM_RANGE(0xf081, 0xf081) AM_READ_PORT("DSW2")
210		AM_RANGE(0xf082, 0xf082) AM_READ_PORT("DSW3")
211		AM_RANGE(0xf083, 0xf083) AM_READ_PORT("IN0")
212		AM_RANGE(0xf084, 0xf084) AM_READ_PORT("IN1")
213		//AM_RANGE(0xf086, 0xf086) AM_READ_PORT("IN2")
214		ADDRESS_MAP_END
215
216		static ADDRESS_MAP_START( writemem, ADDRESS_SPACE_PROGRAM, 8 )
217		AM_RANGE(0x0000, 0xdfff) AM_WRITE(SMH_ROM)
218		AM_RANGE(0xe000, 0xe7ff) AM_WRITE(SMH_RAM)
219
220		AM_RANGE(0xe800, 0xefff) AM_WRITE(paletteram_xxxxRRRRGGGGBBBB_le_w) AM_BASE(&paletteram)
221
222		//AM_RANGE(0xf400, 0xf43f) AM_WRITE(msisaac_fg_colorram_w) AM_BASE(&colorram)
223
224		AM_RANGE(0xf0a3, 0xf0a3) AM_WRITE(ms_unknown_w)         //???? written in interrupt routine
225
226	209	AM_RANGE(0xf060, 0xf060) AM_WRITE(sound_command_w)      //sound command
227	210	AM_RANGE(0xf061, 0xf061) AM_WRITENOP /*sound_reset*/   //????
228	211
229		AM_RANGE(0xf000, 0xf000) AM_WRITE(msisaac_bg2_textbank_w)
230		AM_RANGE(0xf001, 0xf001) AM_WRITE(SMH_RAM)          //???
231		AM_RANGE(0xf002, 0xf002) AM_WRITE(SMH_RAM)          //???
	212	AM_RANGE(0xf0a3, 0xf0a3) AM_WRITE(ms_unknown_w)         //???? written in interrupt routine
232	213
233	214	AM_RANGE(0xf0c0, 0xf0c0) AM_WRITE(msisaac_fg_scrollx_w)
234	215	AM_RANGE(0xf0c1, 0xf0c1) AM_WRITE(msisaac_fg_scrolly_w)
r4679	r4680
237	218	AM_RANGE(0xf0c4, 0xf0c4) AM_WRITE(msisaac_bg_scrollx_w)
238	219	AM_RANGE(0xf0c5, 0xf0c5) AM_WRITE(msisaac_bg_scrolly_w)
239	220
240		AM_RANGE(0xf0e0, 0xf0e0) AM_WRITE(msisaac_mcu_w)
	221	AM_RANGE(0xf0e0, 0xf0e0) AM_READWRITE(msisaac_mcu_r,msisaac_mcu_w)
	222	AM_RANGE(0xf0e1, 0xf0e1) AM_READ(msisaac_mcu_status_r)
241	223
242		AM_RANGE(0xf100, 0xf17f) AM_WRITE(SMH_RAM) AM_BASE(&spriteram)   //sprites
243		AM_RANGE(0xf400, 0xf7ff) AM_WRITE(msisaac_fg_videoram_w) AM_BASE(&videoram)
244		AM_RANGE(0xf800, 0xfbff) AM_WRITE(msisaac_bg2_videoram_w) AM_BASE(&msisaac_videoram2)
245		AM_RANGE(0xfc00, 0xffff) AM_WRITE(msisaac_bg_videoram_w) AM_BASE(&msisaac_videoram)
	224	AM_RANGE(0xf080, 0xf080) AM_READ_PORT("DSW1")
	225	AM_RANGE(0xf081, 0xf081) AM_READ_PORT("DSW2")
	226	AM_RANGE(0xf082, 0xf082) AM_READ_PORT("DSW3")
	227	AM_RANGE(0xf083, 0xf083) AM_READ_PORT("IN0")
	228	AM_RANGE(0xf084, 0xf084) AM_READ_PORT("IN1")
	229	//  AM_RANGE(0xf086, 0xf086) AM_READ_PORT("IN2")
246	230
247
	231	AM_RANGE(0xf100, 0xf17f) AM_RAM AM_BASE(&spriteram)   //sprites
	232	AM_RANGE(0xf400, 0xf7ff) AM_RAM_WRITE(msisaac_fg_videoram_w) AM_BASE(&videoram)
	233	AM_RANGE(0xf800, 0xfbff) AM_RAM_WRITE(msisaac_bg2_videoram_w) AM_BASE(&msisaac_videoram2)
	234	AM_RANGE(0xfc00, 0xffff) AM_RAM_WRITE(msisaac_bg_videoram_w) AM_BASE(&msisaac_videoram)
248	235	//  AM_RANGE(0xf801, 0xf801) AM_WRITE(msisaac_bgcolor_w)
249	236	//  AM_RANGE(0xfc00, 0xfc00) AM_WRITE(flip_screen_w)
250	237	//  AM_RANGE(0xfc03, 0xfc04) AM_WRITE(msisaac_coin_counter_w)
251	238	ADDRESS_MAP_END
252	239
253
254		static ADDRESS_MAP_START( readmem_sound, ADDRESS_SPACE_PROGRAM, 8 )
255		AM_RANGE(0x0000, 0x3fff) AM_READ(SMH_ROM)
256		AM_RANGE(0x4000, 0x47ff) AM_READ(SMH_RAM)
257		AM_RANGE(0xc000, 0xc000) AM_READ(soundlatch_r)
258		AM_RANGE(0xe000, 0xffff) AM_READNOP /*space for diagnostic ROM (not dumped, not reachable) */
259		ADDRESS_MAP_END
260
261
262	240	static int vol_ctrl[16];
263	241
264	242	static MACHINE_RESET( ta7630 )
r4679	r4680
309	287	//popmessage("SND1 0=%2x 1=%2x", snd_ctrl0, snd_ctrl1);
310	288	}
311	289
312
313
314		static ADDRESS_MAP_START( writemem_sound, ADDRESS_SPACE_PROGRAM, 8 )
315		AM_RANGE(0x0000, 0x3fff) AM_WRITE(SMH_ROM)
316		AM_RANGE(0x4000, 0x47ff) AM_WRITE(SMH_RAM)
317
	290	static ADDRESS_MAP_START( msisaac_sound_map, ADDRESS_SPACE_PROGRAM, 8 )
	291	AM_RANGE(0x0000, 0x3fff) AM_ROM
	292	AM_RANGE(0x4000, 0x47ff) AM_RAM
318	293	AM_RANGE(0x8000, 0x8001) AM_DEVWRITE("ay1", ay8910_address_data_w)
319	294	AM_RANGE(0x8002, 0x8003) AM_DEVWRITE("ay2", ay8910_address_data_w)
320	295	AM_RANGE(0x8010, 0x801d) AM_DEVWRITE("msm", msm5232_w)
321	296	AM_RANGE(0x8020, 0x8020) AM_DEVWRITE("msm", sound_control_0_w)
322	297	AM_RANGE(0x8030, 0x8030) AM_WRITE(sound_control_1_w)
323
	298	AM_RANGE(0xc000, 0xc000) AM_READ(soundlatch_r)
324	299	AM_RANGE(0xc001, 0xc001) AM_WRITE(nmi_enable_w)
325	300	AM_RANGE(0xc002, 0xc002) AM_WRITE(nmi_disable_w)
326	301	AM_RANGE(0xc003, 0xc003) AM_WRITENOP /*???*/ /* this is NOT mixer_enable */
327
	302	AM_RANGE(0xe000, 0xffff) AM_READNOP /*space for diagnostic ROM (not dumped, not reachable) */
328	303	ADDRESS_MAP_END
329	304
330	305	#ifdef USE_MCU
331	306
332		static ADDRESS_MAP_START( mcu_readmem, ADDRESS_SPACE_PROGRAM, 8 )
	307	static ADDRESS_MAP_START( msisaac_mcu_map, ADDRESS_SPACE_PROGRAM, 8 )
333	308	ADDRESS_MAP_GLOBAL_MASK(0x7ff)
334		AM_RANGE(0x0000, 0x0000) AM_READ(buggychl_68705_portA_r)
335		AM_RANGE(0x0001, 0x0001) AM_READ(buggychl_68705_portB_r)
336		AM_RANGE(0x0002, 0x0002) AM_READ(buggychl_68705_portC_r)
337		AM_RANGE(0x0010, 0x007f) AM_READ(SMH_RAM)
338		AM_RANGE(0x0080, 0x07ff) AM_READ(SMH_ROM)
339		ADDRESS_MAP_END
340
341		static ADDRESS_MAP_START( mcu_writemem, ADDRESS_SPACE_PROGRAM, 8 )
342		ADDRESS_MAP_GLOBAL_MASK(0x7ff)
343		AM_RANGE(0x0000, 0x0000) AM_WRITE(buggychl_68705_portA_w)
344		AM_RANGE(0x0001, 0x0001) AM_WRITE(buggychl_68705_portB_w)
345		AM_RANGE(0x0002, 0x0002) AM_WRITE(buggychl_68705_portC_w)
	309	AM_RANGE(0x0000, 0x0000) AM_READ(buggychl_68705_portA_r,buggychl_68705_portA_w)
	310	AM_RANGE(0x0001, 0x0001) AM_READ(buggychl_68705_portB_r,buggychl_68705_portB_w)
	311	AM_RANGE(0x0002, 0x0002) AM_READ(buggychl_68705_portC_r,buggychl_68705_portC_w)
346	312	AM_RANGE(0x0004, 0x0004) AM_WRITE(buggychl_68705_ddrA_w)
347	313	AM_RANGE(0x0005, 0x0005) AM_WRITE(buggychl_68705_ddrB_w)
348	314	AM_RANGE(0x0006, 0x0006) AM_WRITE(buggychl_68705_ddrC_w)
349		AM_RANGE(0x0010, 0x007f) AM_WRITE(SMH_RAM)
350		AM_RANGE(0x0080, 0x07ff) AM_WRITE(SMH_ROM)
	315	AM_RANGE(0x0010, 0x007f) AM_RAM
	316	AM_RANGE(0x0080, 0x07ff) AM_ROM
351	317	ADDRESS_MAP_END
352	318
353	319	#endif
r4679	r4680
513	479
514	480	/* basic machine hardware */
515	481	MDRV_CPU_ADD("maincpu", Z80, 4000000)
516		MDRV_CPU_PROGRAM_MAP(readmem,writemem)
	482	MDRV_CPU_PROGRAM_MAP(msisaac_map,0)
517	483	MDRV_CPU_VBLANK_INT("screen", irq0_line_hold)
518	484
519	485	MDRV_CPU_ADD("audiocpu", Z80, 4000000)
520		MDRV_CPU_PROGRAM_MAP(readmem_sound,writemem_sound)
	486	MDRV_CPU_PROGRAM_MAP(msisaac_sound_map,0)
521	487	MDRV_CPU_VBLANK_INT("screen", irq0_line_hold)   /* source of IRQs is unknown */
522	488
523	489	#ifdef USE_MCU
524	490	MDRV_CPU_ADD("mcu", M68705,8000000/2)  /* 4 MHz */
525		MDRV_CPU_PROGRAM_MAP(mcu_readmem,mcu_writemem)
	491	MDRV_CPU_PROGRAM_MAP(msisaac_mcu_map,0)
526	492	#endif
527	493
528	494	MDRV_MACHINE_RESET(ta7630)

src/mame/drivers/superqix.c

r4679	r4680
142	142	int i, len = memory_region_length(machine, "samples");
143	143
144	144	/* convert 8-bit unsigned samples to 8-bit signed */
145		samplebuf = auto_malloc(len * 2);
	145	samplebuf = auto_alloc_array(machine, INT16, len);
146	146	for (i = 0;i < len;i++)
147	147	samplebuf[i] = (INT8)(src[i] ^ 0x80) * 256;
148	148	}
r4679	r4680
295	295
296	296	static READ8_HANDLER( nmi_ack_r )
297	297	{
298		cpu_set_input_line(space->machine->cpu[0], INPUT_LINE_NMI, CLEAR_LINE);
	298	cputag_set_input_line(space->machine, "maincpu", INPUT_LINE_NMI, CLEAR_LINE);
299	299	return 0;
300	300	}
301	301
r4679	r4680
349	349	logerror("Z80 sends command %02x\n",param);
350	350	from_z80 = param;
351	351	from_mcu_pending = 0;
352		cpu_set_input_line(machine->cpu[1], 0, HOLD_LINE);
	352	cputag_set_input_line(machine, "mcu", 0, HOLD_LINE);
353	353	cpuexec_boost_interleave(machine, attotime_zero, ATTOTIME_IN_USEC(200));
354	354	}
355	355

src/mame/drivers/dday.c

r4679	r4680
71	71	READ8_HANDLER( dday_countdown_timer_r );
72	72
73	73
74		static ADDRESS_MAP_START( readmem, ADDRESS_SPACE_PROGRAM, 8 )
75		AM_RANGE(0x0000, 0x3fff) AM_READ(SMH_ROM)
76		AM_RANGE(0x5000, 0x5bff) AM_READ(SMH_RAM)
77		AM_RANGE(0x5c00, 0x5fff) AM_READ(dday_colorram_r)
78		AM_RANGE(0x6000, 0x63ff) AM_READ(SMH_RAM)
	74	static ADDRESS_MAP_START( dday_map, ADDRESS_SPACE_PROGRAM, 8 )
	75	AM_RANGE(0x0000, 0x3fff) AM_ROM
	76	AM_RANGE(0x4000, 0x4000) AM_WRITE(dday_sl_control_w)
	77	AM_RANGE(0x5000, 0x53ff) AM_RAM_WRITE(dday_textvideoram_w) AM_BASE(&dday_textvideoram)
	78	AM_RANGE(0x5400, 0x57ff) AM_RAM_WRITE(dday_fgvideoram_w) AM_BASE(&dday_fgvideoram)
	79	AM_RANGE(0x5800, 0x5bff) AM_RAM_WRITE(dday_bgvideoram_w) AM_BASE(&dday_bgvideoram)
	80	AM_RANGE(0x5c00, 0x5fff) AM_READWRITE(dday_colorram_r, dday_colorram_w) AM_BASE(&dday_colorram)
	81	AM_RANGE(0x6000, 0x63ff) AM_RAM
	82	AM_RANGE(0x6400, 0x6401) AM_MIRROR(0x000e) AM_DEVWRITE("ay1", ay8910_address_data_w)
	83	AM_RANGE(0x6800, 0x6801) AM_DEVWRITE("ay2", ay8910_address_data_w)
79	84	AM_RANGE(0x6c00, 0x6c00) AM_READ_PORT("BUTTONS")
80	85	AM_RANGE(0x7000, 0x7000) AM_READ_PORT("DSW0")
81	86	AM_RANGE(0x7400, 0x7400) AM_READ_PORT("DSW1")
82		AM_RANGE(0x7800, 0x7800) AM_READ(dday_countdown_timer_r)
	87	AM_RANGE(0x7800, 0x7800) AM_READWRITE(dday_countdown_timer_r, dday_control_w)
83	88	AM_RANGE(0x7c00, 0x7c00) AM_READ_PORT("PADDLE")
84	89	ADDRESS_MAP_END
85	90
86		static ADDRESS_MAP_START( writemem, ADDRESS_SPACE_PROGRAM, 8 )
87		AM_RANGE(0x0000, 0x3fff) AM_WRITE(SMH_ROM)
88		AM_RANGE(0x4000, 0x4000) AM_WRITE(dday_sl_control_w)
89		AM_RANGE(0x5000, 0x53ff) AM_WRITE(dday_textvideoram_w) AM_BASE(&dday_textvideoram)
90		AM_RANGE(0x5400, 0x57ff) AM_WRITE(dday_fgvideoram_w) AM_BASE(&dday_fgvideoram)
91		AM_RANGE(0x5800, 0x5bff) AM_WRITE(dday_bgvideoram_w) AM_BASE(&dday_bgvideoram)
92		AM_RANGE(0x5c00, 0x5fff) AM_WRITE(dday_colorram_w) AM_BASE(&dday_colorram)
93		AM_RANGE(0x6000, 0x63ff) AM_WRITE(SMH_RAM)
94		AM_RANGE(0x6400, 0x6401) AM_MIRROR(0x000e) AM_DEVWRITE("ay1", ay8910_address_data_w)
95		AM_RANGE(0x6800, 0x6801) AM_DEVWRITE("ay2", ay8910_address_data_w)
96		AM_RANGE(0x7800, 0x7800) AM_WRITE(dday_control_w)
97		ADDRESS_MAP_END
98	91
99	92
100
101	93	static INPUT_PORTS_START( dday )
102	94	PORT_START("BUTTONS")
103	95	PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_COIN1 )
r4679	r4680
244	236
245	237	/* basic machine hardware */
246	238	MDRV_CPU_ADD("maincpu", Z80, 2000000)     /* 2 MHz ? */
247		MDRV_CPU_PROGRAM_MAP(readmem,writemem)
	239	MDRV_CPU_PROGRAM_MAP(dday_map,0)
248	240
249	241	/* video hardware */
250	242	MDRV_SCREEN_ADD("screen", RASTER)

src/mame/drivers/cojag.c

r4679	r4680
369	369	jaguar_dsp_resume(machine);
370	370
371	371	/* halt the CPUs */
372		jaguargpu_ctrl_w(machine->cpu[1], G_CTRL, 0, 0xffffffff);
373		jaguardsp_ctrl_w(machine->cpu[2], D_CTRL, 0, 0xffffffff);
	372	jaguargpu_ctrl_w(cputag_get_cpu(machine, "gpu"), G_CTRL, 0, 0xffffffff);
	373	jaguardsp_ctrl_w(cputag_get_cpu(machine, "audiocpu"), D_CTRL, 0, 0xffffffff);
374	374
375	375	/* init the sound system */
376	376	cojag_sound_reset(machine);
r4679	r4680
419	419	jaguar_dsp_resume(space->machine);
420	420
421	421	/* halt the CPUs */
422		jaguargpu_ctrl_w(space->machine->cpu[1], G_CTRL, 0, 0xffffffff);
423		jaguardsp_ctrl_w(space->machine->cpu[2], D_CTRL, 0, 0xffffffff);
	422	jaguargpu_ctrl_w(cputag_get_cpu(space->machine, "gpu"), G_CTRL, 0, 0xffffffff);
	423	jaguardsp_ctrl_w(cputag_get_cpu(space->machine, "audiocpu"), D_CTRL, 0, 0xffffffff);
424	424	}
425	425
426	426	/* adjust banking */
r4679	r4680
443	443
444	444	static READ32_HANDLER( gpuctrl_r )
445	445	{
446		return jaguargpu_ctrl_r(space->machine->cpu[1], offset);
	446	return jaguargpu_ctrl_r(cputag_get_cpu(space->machine, "gpu"), offset);
447	447	}
448	448
449	449
450	450	static WRITE32_HANDLER( gpuctrl_w )
451	451	{
452		jaguargpu_ctrl_w(space->machine->cpu[1], offset, data, mem_mask);
	452	jaguargpu_ctrl_w(cputag_get_cpu(space->machine, "gpu"), offset, data, mem_mask);
453	453	}
454	454
455	455
r4679	r4680
462	462
463	463	static READ32_HANDLER( dspctrl_r )
464	464	{
465		return jaguardsp_ctrl_r(space->machine->cpu[2], offset);
	465	return jaguardsp_ctrl_r(cputag_get_cpu(space->machine, "audiocpu"), offset);
466	466	}
467	467
468	468
469	469	static WRITE32_HANDLER( dspctrl_w )
470	470	{
471		jaguardsp_ctrl_w(space->machine->cpu[2], offset, data, mem_mask);
	471	jaguardsp_ctrl_w(cputag_get_cpu(space->machine, "audiocpu"), offset, data, mem_mask);
472	472	}
473	473
474	474
r4679	r4680
1505	1505	static void cojag_common_init(running_machine *machine, UINT16 gpu_jump_offs, UINT16 spin_pc)
1506	1506	{
1507	1507	/* copy over the ROM */
1508		cojag_is_r3000 = (cpu_get_type(machine->cpu[0]) == CPU_R3041BE);
	1508	cojag_is_r3000 = (cpu_get_type(cputag_get_cpu(machine, "maincpu")) == CPU_R3041BE);
1509	1509
1510	1510	/* install synchronization hooks for GPU */
1511	1511	if (cojag_is_r3000)
1512		memory_install_write32_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x04f0b000 + gpu_jump_offs, 0x04f0b003 + gpu_jump_offs, 0, 0, gpu_jump_w);
	1512	memory_install_write32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x04f0b000 + gpu_jump_offs, 0x04f0b003 + gpu_jump_offs, 0, 0, gpu_jump_w);
1513	1513	else
1514		memory_install_write32_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xf0b000 + gpu_jump_offs, 0xf0b003 + gpu_jump_offs, 0, 0, gpu_jump_w);
1515		memory_install_read32_handler(cpu_get_address_space(machine->cpu[1], ADDRESS_SPACE_PROGRAM), 0xf03000 + gpu_jump_offs, 0xf03003 + gpu_jump_offs, 0, 0, gpu_jump_r);
	1514	memory_install_write32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xf0b000 + gpu_jump_offs, 0xf0b003 + gpu_jump_offs, 0, 0, gpu_jump_w);
	1515	memory_install_read32_handler(cputag_get_address_space(machine, "gpu", ADDRESS_SPACE_PROGRAM), 0xf03000 + gpu_jump_offs, 0xf03003 + gpu_jump_offs, 0, 0, gpu_jump_r);
1516	1516	gpu_jump_address = &jaguar_gpu_ram[gpu_jump_offs/4];
1517	1517	gpu_spin_pc = 0xf03000 + spin_pc;
1518	1518
r4679	r4680
1527	1527
1528	1528	#if ENABLE_SPEEDUP_HACKS
1529	1529	/* install speedup for main CPU */
1530		main_speedup = memory_install_write32_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xa02030, 0xa02033, 0, 0, area51_main_speedup_w);
	1530	main_speedup = memory_install_write32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xa02030, 0xa02033, 0, 0, area51_main_speedup_w);
1531	1531	#endif
1532	1532	}
1533	1533
r4679	r4680
1539	1539	#if ENABLE_SPEEDUP_HACKS
1540	1540	/* install speedup for main CPU */
1541	1541	main_speedup_max_cycles = 120;
1542		main_speedup = memory_install_read32_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x100062e8, 0x100062eb, 0, 0, cojagr3k_main_speedup_r);
	1542	main_speedup = memory_install_read32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x100062e8, 0x100062eb, 0, 0, cojagr3k_main_speedup_r);
1543	1543	#endif
1544	1544	}
1545	1545
r4679	r4680
1553	1553	#if ENABLE_SPEEDUP_HACKS
1554	1554	/* install speedup for main CPU */
1555	1555	main_speedup_max_cycles = 120;
1556		main_speedup = memory_install_read32_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x1000865c, 0x1000865f, 0, 0, cojagr3k_main_speedup_r);
	1556	main_speedup = memory_install_read32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x1000865c, 0x1000865f, 0, 0, cojagr3k_main_speedup_r);
1557	1557	#endif
1558	1558	}
1559	1559
r4679	r4680
1567	1567
1568	1568	#if ENABLE_SPEEDUP_HACKS
1569	1569	/* install speedup for main CPU */
1570		main_speedup = memory_install_write32_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xa19550, 0xa19557, 0, 0, area51mx_main_speedup_w);
	1570	main_speedup = memory_install_write32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xa19550, 0xa19557, 0, 0, area51mx_main_speedup_w);
1571	1571	#endif
1572	1572	}
1573	1573
r4679	r4680
1582	1582	#if ENABLE_SPEEDUP_HACKS
1583	1583	/* install speedup for main CPU */
1584	1584	main_speedup_max_cycles = 120;
1585		main_speedup = memory_install_read32_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x10006f0c, 0x10006f0f, 0, 0, cojagr3k_main_speedup_r);
	1585	main_speedup = memory_install_read32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x10006f0c, 0x10006f0f, 0, 0, cojagr3k_main_speedup_r);
1586	1586	#endif
1587	1587	}
1588	1588
r4679	r4680
1594	1594	#if ENABLE_SPEEDUP_HACKS
1595	1595	/* install speedup for main CPU */
1596	1596	main_speedup_max_cycles = 200;
1597		main_speedup = memory_install_read32_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x10021b60, 0x10021b63, 0, 0, cojagr3k_main_speedup_r);
	1597	main_speedup = memory_install_read32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x10021b60, 0x10021b63, 0, 0, cojagr3k_main_speedup_r);
1598	1598	#endif
1599	1599	}
1600	1600
r4679	r4680
1607	1607	/* install speedup for main CPU */
1608	1608	main_speedup_max_cycles = 200;
1609	1609	if (main_speedup_addr != 0)
1610		main_speedup = memory_install_read32_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), main_speedup_addr, main_speedup_addr + 3, 0, 0, cojagr3k_main_speedup_r);
1611		main_gpu_wait = memory_install_read32_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x0400d900, 0x0400d900 + 3, 0, 0, main_gpu_wait_r);
	1610	main_speedup = memory_install_read32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), main_speedup_addr, main_speedup_addr + 3, 0, 0, cojagr3k_main_speedup_r);
	1611	main_gpu_wait = memory_install_read32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x0400d900, 0x0400d900 + 3, 0, 0, main_gpu_wait_r);
1612	1612	#endif
1613	1613	}
1614	1614
r4679	r4680
1627	1627	#if ENABLE_SPEEDUP_HACKS
1628	1628	/* install speedup for main CPU */
1629	1629	main_speedup_max_cycles = 50;
1630		main_speedup = memory_install_read32_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x12005b34, 0x12005b37, 0, 0, cojagr3k_main_speedup_r);
	1630	main_speedup = memory_install_read32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x12005b34, 0x12005b37, 0, 0, cojagr3k_main_speedup_r);
1631	1631	#endif
1632	1632	}
1633	1633

src/mame/drivers/cyberbal.c

r4679	r4680
38	38
39	39	static void update_interrupts(running_machine *machine)
40	40	{
41		cpu_set_input_line(machine->cpu[0], 1, atarigen_sound_int_state ? ASSERT_LINE : CLEAR_LINE);
42		cpu_set_input_line(machine->cpu[2], 1, atarigen_video_int_state ? ASSERT_LINE : CLEAR_LINE);
	41	cputag_set_input_line(machine, "maincpu", 1, atarigen_sound_int_state ? ASSERT_LINE : CLEAR_LINE);
	42	cputag_set_input_line(machine, "extra", 1, atarigen_video_int_state ? ASSERT_LINE : CLEAR_LINE);
43	43	}
44	44
45	45
r4679	r4680
49	49	atarigen_slapstic_reset();
50	50	atarigen_interrupt_reset(update_interrupts);
51	51	atarigen_scanline_timer_reset(machine->primary_screen, cyberbal_scanline_update, 8);
52		atarigen_sound_io_reset(machine->cpu[1]);
	52	atarigen_sound_io_reset(cputag_get_cpu(machine, "audiocpu"));
53	53
54	54	cyberbal_sound_reset(machine);
55	55
56		/* CPU 2 doesn't run until reset */
57		cpu_set_input_line(machine->cpu[2], INPUT_LINE_RESET, ASSERT_LINE);
	56	/* Extra CPU (second M68k) doesn't run until reset */
	57	cputag_set_input_line(machine, "extra", INPUT_LINE_RESET, ASSERT_LINE);
58	58	}
59	59
60	60
61	61	static void cyberb2p_update_interrupts(running_machine *machine)
62	62	{
63		cpu_set_input_line(machine->cpu[0], 1, atarigen_video_int_state ? ASSERT_LINE : CLEAR_LINE);
64		cpu_set_input_line(machine->cpu[0], 3, atarigen_sound_int_state ? ASSERT_LINE : CLEAR_LINE);
	63	cputag_set_input_line(machine, "maincpu", 1, atarigen_video_int_state ? ASSERT_LINE : CLEAR_LINE);
	64	cputag_set_input_line(machine, "maincpu", 3, atarigen_sound_int_state ? ASSERT_LINE : CLEAR_LINE);
65	65	}
66	66
67	67
r4679	r4680
114	114
115	115	static WRITE16_HANDLER( p2_reset_w )
116	116	{
117		cpu_set_input_line(space->machine->cpu[2], INPUT_LINE_RESET, CLEAR_LINE);
	117	cputag_set_input_line(space->machine, "extra", INPUT_LINE_RESET, CLEAR_LINE);
118	118	}
119	119
120	120
r4679	r4680
972	972	static DRIVER_INIT( cyberbal )
973	973	{
974	974	atarigen_eeprom_default = default_eeprom;
975		atarigen_slapstic_init(machine->cpu[0], 0x018000, 0, 0);
	975	atarigen_slapstic_init(cputag_get_cpu(machine, "maincpu"), 0x018000, 0, 0);
976	976	}
977	977
978	978
979	979	static DRIVER_INIT( cyberbt )
980	980	{
981	981	atarigen_eeprom_default = default_eeprom;
982		atarigen_slapstic_init(machine->cpu[0], 0x018000, 0, 116);
	982	atarigen_slapstic_init(cputag_get_cpu(machine, "maincpu"), 0x018000, 0, 116);
983	983	}
984	984
985	985

src/mame/drivers/lockon.c

r4679	r4680
66	66	lockon_ctrl_reg = data & 0xff;
67	67
68	68	/* Bus mastering for shared access */
69		cpu_set_input_line(space->machine->cpu[GROUND_CPU], INPUT_LINE_HALT, data & 0x04 ? ASSERT_LINE : CLEAR_LINE);
70		cpu_set_input_line(space->machine->cpu[OBJECT_CPU], INPUT_LINE_HALT, data & 0x20 ? ASSERT_LINE : CLEAR_LINE);
71		cpu_set_input_line(space->machine->cpu[SOUND_CPU],  INPUT_LINE_HALT, data & 0x40 ? CLEAR_LINE : ASSERT_LINE);
	69	cputag_set_input_line(space->machine, "ground", INPUT_LINE_HALT, data & 0x04 ? ASSERT_LINE : CLEAR_LINE);
	70	cputag_set_input_line(space->machine, "object", INPUT_LINE_HALT, data & 0x20 ? ASSERT_LINE : CLEAR_LINE);
	71	cputag_set_input_line(space->machine, "audiocpu", INPUT_LINE_HALT, data & 0x40 ? CLEAR_LINE : ASSERT_LINE);
72	72	}
73	73
74	74	static READ16_HANDLER( main_gnd_r )
75	75	{
76		const address_space *gndspace = cpu_get_address_space(space->machine->cpu[GROUND_CPU], ADDRESS_SPACE_PROGRAM);
	76	const address_space *gndspace = cputag_get_address_space(space->machine, "ground", ADDRESS_SPACE_PROGRAM);
77	77	return memory_read_word(gndspace, V30_GND_ADDR | offset * 2);
78	78	}
79	79
80	80	static WRITE16_HANDLER( main_gnd_w )
81	81	{
82		const address_space *gndspace = cpu_get_address_space(space->machine->cpu[GROUND_CPU], ADDRESS_SPACE_PROGRAM);
	82	const address_space *gndspace = cputag_get_address_space(space->machine, "ground", ADDRESS_SPACE_PROGRAM);
83	83
84	84	if (ACCESSING_BITS_0_7)
85	85	memory_write_byte(gndspace, V30_GND_ADDR | (offset * 2 + 0), data);
r4679	r4680
89	89
90	90	static READ16_HANDLER( main_obj_r )
91	91	{
92		const address_space *objspace = cpu_get_address_space(space->machine->cpu[OBJECT_CPU], ADDRESS_SPACE_PROGRAM);
	92	const address_space *objspace = cputag_get_address_space(space->machine, "object", ADDRESS_SPACE_PROGRAM);
93	93	return memory_read_word(objspace, V30_OBJ_ADDR | offset * 2);
94	94	}
95	95
96	96	static WRITE16_HANDLER( main_obj_w )
97	97	{
98		const address_space *objspace = cpu_get_address_space(space->machine->cpu[OBJECT_CPU], ADDRESS_SPACE_PROGRAM);
	98	const address_space *objspace = cputag_get_address_space(space->machine, "object", ADDRESS_SPACE_PROGRAM);
99	99
100	100	if (ACCESSING_BITS_0_7)
101	101	memory_write_byte(objspace, V30_OBJ_ADDR | (offset * 2 + 0), data);
r4679	r4680
107	107	{
108	108	if (offset < 0x800)
109	109	{
110		const address_space *gndspace = cpu_get_address_space(space->machine->cpu[GROUND_CPU], ADDRESS_SPACE_PROGRAM);
111		const address_space *objspace = cpu_get_address_space(space->machine->cpu[OBJECT_CPU], ADDRESS_SPACE_PROGRAM);
	110	const address_space *gndspace = cputag_get_address_space(space->machine, "ground", ADDRESS_SPACE_PROGRAM);
	111	const address_space *objspace = cputag_get_address_space(space->machine, "object", ADDRESS_SPACE_PROGRAM);
112	112
113	113	if (ACCESSING_BITS_0_7)
114	114	memory_write_byte(gndspace, V30_GND_ADDR | (offset * 2 + 0), data);
r4679	r4680
124	124
125	125	static READ16_HANDLER( main_z80_r )
126	126	{
127		const address_space *sndspace = cpu_get_address_space(space->machine->cpu[SOUND_CPU], ADDRESS_SPACE_PROGRAM);
	127	const address_space *sndspace = cputag_get_address_space(space->machine, "audiocpu", ADDRESS_SPACE_PROGRAM);
128	128	return 0xff00 | memory_read_byte(sndspace, offset);
129	129	}
130	130
131	131	static WRITE16_HANDLER( main_z80_w )
132	132	{
133		const address_space *sndspace = cpu_get_address_space(space->machine->cpu[SOUND_CPU], ADDRESS_SPACE_PROGRAM);
	133	const address_space *sndspace = cputag_get_address_space(space->machine, "audiocpu", ADDRESS_SPACE_PROGRAM);
134	134	memory_write_byte(sndspace, offset, data);
135	135	}
136	136
r4679	r4680
425	425
426	426	static void ym2203_irq(const device_config *device, int irq)
427	427	{
428		cpu_set_input_line(device->machine->cpu[SOUND_CPU], 0, irq ? ASSERT_LINE : CLEAR_LINE );
	428	cputag_set_input_line(device->machine, "audiocpu", 0, irq ? ASSERT_LINE : CLEAR_LINE );
429	429	}
430	430
431	431	static WRITE8_DEVICE_HANDLER( ym2203_out_b )

src/mame/drivers/mappy.c

r4679	r4680
703	703	switch (offset & 0x0e)
704	704	{
705	705	case 0x00:   /* INT ON 2 */
706		cpu_interrupt_enable(space->machine->cpu[1],bit);
	706	cpu_interrupt_enable(cputag_get_cpu(space->machine, "sub"), bit);
707	707	if (!bit)
708		cpu_set_input_line(space->machine->cpu[1], 0, CLEAR_LINE);
	708	cputag_set_input_line(space->machine, "sub", 0, CLEAR_LINE);
709	709	break;
710	710
711	711	case 0x02:   /* INT ON */
712		cpu_interrupt_enable(space->machine->cpu[0],bit);
	712	cpu_interrupt_enable(cputag_get_cpu(space->machine, "maincpu"), bit);
713	713	if (!bit)
714		cpu_set_input_line(space->machine->cpu[0], 0, CLEAR_LINE);
	714	cputag_set_input_line(space->machine, "maincpu", 0, CLEAR_LINE);
715	715	break;
716	716
717	717	case 0x04:   /* n.c. */
r4679	r4680
727	727	break;
728	728
729	729	case 0x0a:   /* SUB RESET */
730		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_RESET, bit ? CLEAR_LINE : ASSERT_LINE);
	730	cputag_set_input_line(space->machine, "sub", INPUT_LINE_RESET, bit ? CLEAR_LINE : ASSERT_LINE);
731	731	break;
732	732
733	733	case 0x0c:   /* n.c. */
r4679	r4680
745	745	switch (offset & 0x0e)
746	746	{
747	747	case 0x00:
748		cpu_interrupt_enable(space->machine->cpu[1],bit);
	748	cpu_interrupt_enable(cputag_get_cpu(space->machine, "sub"), bit);
749	749	if (!bit)
750		cpu_set_input_line(space->machine->cpu[1], 0, CLEAR_LINE);
	750	cputag_set_input_line(space->machine, "sub", 0, CLEAR_LINE);
751	751	break;
752	752
753	753	case 0x02:
754		cpu_interrupt_enable(space->machine->cpu[0],bit);
	754	cpu_interrupt_enable(cputag_get_cpu(space->machine, "maincpu"), bit);
755	755	if (!bit)
756		cpu_set_input_line(space->machine->cpu[0], 0, CLEAR_LINE);
	756	cputag_set_input_line(space->machine, "maincpu", 0, CLEAR_LINE);
757	757	break;
758	758
759	759	case 0x04:
760		cpu_interrupt_enable(space->machine->cpu[2],bit);
	760	cpu_interrupt_enable(cputag_get_cpu(space->machine, "sub2"), bit);
761	761	if (!bit)
762		cpu_set_input_line(space->machine->cpu[2], 0, CLEAR_LINE);
	762	cputag_set_input_line(space->machine, "sub2", 0, CLEAR_LINE);
763	763	break;
764	764
765	765	case 0x06:
r4679	r4680
772	772	break;
773	773
774	774	case 0x0a:
775		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_RESET, bit ? CLEAR_LINE : ASSERT_LINE);
	775	cputag_set_input_line(space->machine, "sub", INPUT_LINE_RESET, bit ? CLEAR_LINE : ASSERT_LINE);
776	776	break;
777	777
778	778	case 0x0c:
779		cpu_set_input_line(space->machine->cpu[2], INPUT_LINE_RESET, bit ? CLEAR_LINE : ASSERT_LINE);
	779	cputag_set_input_line(space->machine, "sub2", INPUT_LINE_RESET, bit ? CLEAR_LINE : ASSERT_LINE);
780	780	break;
781	781
782	782	case 0x0e:
r4679	r4680
791	791	switch (offset & 0x0e)
792	792	{
793	793	case 0x00:   /* INT ON 2 */
794		cpu_interrupt_enable(space->machine->cpu[1],bit);
	794	cpu_interrupt_enable(cputag_get_cpu(space->machine, "sub"), bit);
795	795	if (!bit)
796		cpu_set_input_line(space->machine->cpu[1], 0, CLEAR_LINE);
	796	cputag_set_input_line(space->machine, "sub", 0, CLEAR_LINE);
797	797	break;
798	798
799	799	case 0x02:   /* INT ON */
800		cpu_interrupt_enable(space->machine->cpu[0],bit);
	800	cpu_interrupt_enable(cputag_get_cpu(space->machine, "maincpu"), bit);
801	801	if (!bit)
802		cpu_set_input_line(space->machine->cpu[0], 0, CLEAR_LINE);
	802	cputag_set_input_line(space->machine, "maincpu", 0, CLEAR_LINE);
803	803	break;
804	804
805	805	case 0x04:   /* FLIP */
r4679	r4680
816	816	break;
817	817
818	818	case 0x0a:   /* SUB RESET */
819		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_RESET, bit ? CLEAR_LINE : ASSERT_LINE);
	819	cputag_set_input_line(space->machine, "sub", INPUT_LINE_RESET, bit ? CLEAR_LINE : ASSERT_LINE);
820	820	break;
821	821
822	822	case 0x0c:   /* n.c. */
r4679	r4680
830	830
831	831	static MACHINE_RESET( superpac )
832	832	{
833		const address_space *space = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM);
	833	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
834	834	int i;
835	835
836	836	/* Reset all latches */
r4679	r4680
840	840
841	841	static MACHINE_RESET( phozon )
842	842	{
843		const address_space *space = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM);
	843	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
844	844	int i;
845	845
846	846	/* Reset all latches */
r4679	r4680
850	850
851	851	static MACHINE_RESET( mappy )
852	852	{
853		const address_space *space = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM);
	853	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
854	854	int i;
855	855
856	856	/* Reset all latches */
r4679	r4680
861	861	static INTERRUPT_GEN( mappy_interrupt_1 )
862	862	{
863	863	irq0_line_assert(device);   // this also checks if irq is enabled - IMPORTANT!
864		// so don't replace with cpu_set_input_line(machine->cpu[0], 0, ASSERT_LINE);
	864	// so don't replace with cputag_set_input_line(machine, "maincpu", 0, ASSERT_LINE);
865	865
866		namcoio_set_irq_line(device->machine,0,PULSE_LINE);
867		namcoio_set_irq_line(device->machine,1,PULSE_LINE);
	866	namcoio_set_irq_line(device->machine, 0, PULSE_LINE);
	867	namcoio_set_irq_line(device->machine, 1, PULSE_LINE);
868	868	}
869	869
870	870
r4679	r4680
2133	2133	the DAC might be built-in after all.
2134	2134	*/
2135	2135	const device_config *dac = devtag_get_device(machine, "dac");
2136		memory_install_write8_device_handler(cpu_get_address_space(machine->cpu[1], ADDRESS_SPACE_PROGRAM), dac, 0x0002, 0x0002, 0, 0, grobda_DAC_w );
	2136	memory_install_write8_device_handler(cputag_get_address_space(machine, "sub", ADDRESS_SPACE_PROGRAM), dac, 0x0002, 0x0002, 0, 0, grobda_DAC_w );
2137	2137
2138	2138	DRIVER_INIT_CALL(58_56);
2139	2139	}
r4679	r4680
2141	2141	static DRIVER_INIT( digdug2 )
2142	2142	{
2143	2143	/* appears to not use the watchdog */
2144		memory_install_write8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x8000, 0x8000, 0, 0, SMH_NOP);
	2144	memory_install_write8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x8000, 0x8000, 0, 0, (write8_space_func)SMH_NOP);
2145	2145	DRIVER_INIT_CALL(58_56);
2146	2146	}
2147	2147

src/mame/drivers/safarir.c

r4679	r4680
126	126	static TILE_GET_INFO( get_bg_tile_info )
127	127	{
128	128	int color;
129		const address_space *space = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM);
	129	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
130	130	UINT8 code = ram_r(space,tile_index | 0x400);
131	131
132	132	/* this is wrong */
r4679	r4680
142	142	static TILE_GET_INFO( get_fg_tile_info )
143	143	{
144	144	int color, flags;
145		const address_space *space = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM);
	145	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
146	146
147	147	UINT8 code = ram_r(space,tile_index);
148	148
r4679	r4680
186	186
187	187	static MACHINE_START( safarir )
188	188	{
189		ram_1 = auto_malloc(ram_size);
190		ram_2 = auto_malloc(ram_size);
	189	ram_1 = auto_alloc_array(machine, UINT8, ram_size);
	190	ram_2 = auto_alloc_array(machine, UINT8, ram_size);
191	191
192	192	/* setup for save states */
193	193	state_save_register_global_pointer(machine, ram_1, ram_size);

src/mame/drivers/rastan.c

r4679	r4680
359	359	/* handler called by the YM2151 emulator when the internal timers cause an IRQ */
360	360	static void irqhandler(const device_config *device, int irq)
361	361	{
362		cpu_set_input_line(device->machine->cpu[1],0,irq ? ASSERT_LINE : CLEAR_LINE);
	362	cputag_set_input_line(device->machine, "audiocpu", 0, irq ? ASSERT_LINE : CLEAR_LINE);
363	363	}
364	364
365	365	static const ym2151_interface ym2151_config =

src/mame/drivers/pntnpuzl.c

r4679	r4680
151	151	UINT32 length, size;
152	152	UINT8 *dat;
153	153
154		dat = eeprom_get_data_pointer(&length, &size);
	154	dat = (UINT8 *)eeprom_get_data_pointer(&length, &size);
155	155	memset(dat, 0, length * size);
156	156	}
157	157	}
r4679	r4680
186	186	/* vid */
187	187	static VIDEO_START( pntnpuzl )
188	188	{
189		pntnpuzl_3a0000ram=auto_malloc(0x100000);
	189	pntnpuzl_3a0000ram=auto_alloc_array(machine, UINT16, 0x100000/2);
190	190	}
191	191
192	192	static VIDEO_UPDATE( pntnpuzl )

src/mame/drivers/gijoe.c

r4679	r4680
151	151	static TIMER_CALLBACK( dmaend_callback )
152	152	{
153	153	if (cur_control2 & 0x0020)
154		cpu_set_input_line(machine->cpu[0], 6, HOLD_LINE);
	154	cputag_set_input_line(machine, "maincpu", 6, HOLD_LINE);
155	155	}
156	156
157	157	static INTERRUPT_GEN( gijoe_interrupt )
r4679	r4680
182	182
183	183	static WRITE16_HANDLER( sound_irq_w )
184	184	{
185		cpu_set_input_line(space->machine->cpu[1], 0, HOLD_LINE);
	185	cputag_set_input_line(space->machine, "audiocpu", 0, HOLD_LINE);
186	186	}
187	187
188	188	static READ16_HANDLER( sound_status_r )
r4679	r4680
192	192
193	193	static void sound_nmi(const device_config *device)
194	194	{
195		cpu_set_input_line(device->machine->cpu[1], INPUT_LINE_NMI, PULSE_LINE);
	195	cputag_set_input_line(device->machine, "audiocpu", INPUT_LINE_NMI, PULSE_LINE);
196	196	}
197	197
198	198	static MACHINE_START( gijoe )
r4679	r4680
203	203	}
204	204
205	205
206		static ADDRESS_MAP_START( readmem, ADDRESS_SPACE_PROGRAM, 16 )
207		AM_RANGE(0x000000, 0x0fffff) AM_READ(SMH_ROM)
208		AM_RANGE(0x100000, 0x100fff) AM_READ(SMH_RAM)         // Sprites
209		AM_RANGE(0x120000, 0x121fff) AM_READ(K056832_ram_word_r)   // Graphic planes
210		AM_RANGE(0x122000, 0x123fff) AM_READ(K056832_ram_word_r)   // Graphic planes mirror read
211		AM_RANGE(0x130000, 0x131fff) AM_READ(K056832_rom_word_r)   // Passthrough to tile roms
212		AM_RANGE(0x180000, 0x18ffff) AM_READ(SMH_RAM)         // Main RAM.  Spec. 180000-1803ff, 180400-187fff
213		AM_RANGE(0x190000, 0x190fff) AM_READ(SMH_RAM)
	206	static ADDRESS_MAP_START( gijoe_map, ADDRESS_SPACE_PROGRAM, 16 )
	207	AM_RANGE(0x000000, 0x0fffff) AM_ROM
	208	AM_RANGE(0x100000, 0x100fff) AM_RAM AM_BASE(&spriteram16)                        // Sprites
	209	AM_RANGE(0x110000, 0x110007) AM_WRITE(K053246_word_w)
	210	AM_RANGE(0x120000, 0x121fff) AM_READWRITE(K056832_ram_word_r, K056832_ram_word_w)      // Graphic planes
	211	AM_RANGE(0x122000, 0x123fff) AM_READWRITE(K056832_ram_word_r, K056832_ram_word_w)      // Graphic planes mirror read
	212	AM_RANGE(0x130000, 0x131fff) AM_READ(K056832_rom_word_r)                         // Passthrough to tile roms
	213	AM_RANGE(0x160000, 0x160007) AM_WRITE(K056832_b_word_w)                           // VSCCS (board dependent)
	214	AM_RANGE(0x170000, 0x170001) AM_WRITENOP                                    // Watchdog
	215	AM_RANGE(0x180000, 0x18ffff) AM_RAM AM_BASE(&gijoe_workram)               // Main RAM.  Spec. 180000-1803ff, 180400-187fff
	216	AM_RANGE(0x190000, 0x190fff) AM_RAM_WRITE(paletteram16_xBBBBBGGGGGRRRRR_word_w) AM_BASE(&paletteram16)
	217	AM_RANGE(0x1a0000, 0x1a001f) AM_WRITE(K053251_lsb_w)
	218	AM_RANGE(0x1b0000, 0x1b003f) AM_WRITE(K056832_word_w)
	219	AM_RANGE(0x1c000c, 0x1c000d) AM_WRITE(sound_cmd_w)
214	220	AM_RANGE(0x1c0014, 0x1c0015) AM_READ(sound_status_r)
215		AM_RANGE(0x1c0000, 0x1c001f) AM_READ(SMH_RAM)         // sound regs read fall through
	221	AM_RANGE(0x1c0000, 0x1c001f) AM_RAM
	222	AM_RANGE(0x1d0000, 0x1d0001) AM_WRITE(sound_irq_w)
216	223	AM_RANGE(0x1e0000, 0x1e0001) AM_READ_PORT("P1_P2")
217	224	AM_RANGE(0x1e0002, 0x1e0003) AM_READ_PORT("P3_P4")
218	225	AM_RANGE(0x1e4000, 0x1e4001) AM_READ_PORT("SYSTEM")
219	226	AM_RANGE(0x1e4002, 0x1e4003) AM_READ(control1_r)
220		AM_RANGE(0x1e8000, 0x1e8001) AM_READ(control2_r)
	227	AM_RANGE(0x1e8000, 0x1e8001) AM_READWRITE(control2_r, control2_w)
221	228	AM_RANGE(0x1f0000, 0x1f0001) AM_READ(K053246_word_r)
222	229	#if JOE_DEBUG
223	230	AM_RANGE(0x110000, 0x110007) AM_READ(K053246_reg_word_r)
r4679	r4680
227	234	#endif
228	235	ADDRESS_MAP_END
229	236
230		static ADDRESS_MAP_START( writemem, ADDRESS_SPACE_PROGRAM, 16 )
231		AM_RANGE(0x000000, 0x0fffff) AM_WRITE(SMH_ROM)
232		AM_RANGE(0x100000, 0x100fff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16)
233		AM_RANGE(0x110000, 0x110007) AM_WRITE(K053246_word_w)
234		AM_RANGE(0x120000, 0x121fff) AM_WRITE(K056832_ram_word_w)
235		AM_RANGE(0x122000, 0x123fff) AM_WRITE(K056832_ram_word_w)
236		AM_RANGE(0x130000, 0x131fff) AM_WRITE(SMH_ROM)
237		AM_RANGE(0x160000, 0x160007) AM_WRITE(K056832_b_word_w)   // VSCCS (board dependent)
238		AM_RANGE(0x170000, 0x170001) AM_WRITENOP         // Watchdog
239		AM_RANGE(0x180000, 0x18ffff) AM_WRITE(SMH_RAM) AM_BASE(&gijoe_workram)
240		AM_RANGE(0x190000, 0x190fff) AM_WRITE(paletteram16_xBBBBBGGGGGRRRRR_word_w) AM_BASE(&paletteram16)
241		AM_RANGE(0x1a0000, 0x1a001f) AM_WRITE(K053251_lsb_w)
242		AM_RANGE(0x1b0000, 0x1b003f) AM_WRITE(K056832_word_w)
243		AM_RANGE(0x1c000c, 0x1c000d) AM_WRITE(sound_cmd_w)
244		AM_RANGE(0x1c0000, 0x1c001f) AM_WRITE(SMH_RAM)         // sound regs write fall through
245		AM_RANGE(0x1d0000, 0x1d0001) AM_WRITE(sound_irq_w)
246		AM_RANGE(0x1e8000, 0x1e8001) AM_WRITE(control2_w)
247		ADDRESS_MAP_END
248
249		static ADDRESS_MAP_START( sound_readmem, ADDRESS_SPACE_PROGRAM, 8 )
250		AM_RANGE(0x0000, 0xebff) AM_READ(SMH_ROM)
251		AM_RANGE(0xf000, 0xf7ff) AM_READ(SMH_RAM)
252		AM_RANGE(0xf800, 0xfa2f) AM_DEVREAD("konami", k054539_r)
	237	static ADDRESS_MAP_START( sound_map, ADDRESS_SPACE_PROGRAM, 8 )
	238	AM_RANGE(0x0000, 0xebff) AM_ROM
	239	AM_RANGE(0xf000, 0xf7ff) AM_RAM
	240	AM_RANGE(0xf800, 0xfa2f) AM_DEVREADWRITE("konami", k054539_r, k054539_w)
	241	AM_RANGE(0xfc00, 0xfc00) AM_WRITE(soundlatch2_w)
253	242	AM_RANGE(0xfc02, 0xfc02) AM_READ(soundlatch_r)
254	243	ADDRESS_MAP_END
255	244
256		static ADDRESS_MAP_START( sound_writemem, ADDRESS_SPACE_PROGRAM, 8 )
257		AM_RANGE(0x0000, 0xebff) AM_WRITE(SMH_ROM)
258		AM_RANGE(0xf000, 0xf7ff) AM_WRITE(SMH_RAM)
259		AM_RANGE(0xf800, 0xfa2f) AM_DEVWRITE("konami", k054539_w)
260		AM_RANGE(0xfc00, 0xfc00) AM_WRITE(soundlatch2_w)
261		ADDRESS_MAP_END
262
263	245	static INPUT_PORTS_START( gijoe )
264	246	PORT_START("START")
265	247	PORT_BIT( 0x0001, IP_ACTIVE_LOW,  IPT_START1 )
r4679	r4680
310	292
311	293	/* basic machine hardware */
312	294	MDRV_CPU_ADD("maincpu", M68000, 16000000)   /* Confirmed */
313		MDRV_CPU_PROGRAM_MAP(readmem, writemem)
	295	MDRV_CPU_PROGRAM_MAP(gijoe_map,0)
314	296	MDRV_CPU_VBLANK_INT("screen", gijoe_interrupt)
315	297
316	298	MDRV_CPU_ADD("audiocpu", Z80, 8000000)   /* Amuse & confirmed. z80e */
317		MDRV_CPU_PROGRAM_MAP(sound_readmem,sound_writemem)
	299	MDRV_CPU_PROGRAM_MAP(sound_map,0)
318	300
319	301	MDRV_MACHINE_START(gijoe)
320	302	MDRV_NVRAM_HANDLER(gijoe)

src/mame/drivers/uapce.c

r4679	r4680
42	42
43	43	if ( diff & 0x40 )
44	44	{
45		cpu_set_input_line(space->machine->cpu[0], INPUT_LINE_RESET, (data & 0x40) ? CLEAR_LINE : ASSERT_LINE);
	45	cputag_set_input_line(space->machine, "maincpu", INPUT_LINE_RESET, (data & 0x40) ? CLEAR_LINE : ASSERT_LINE);
46	46	}
47	47
48	48	// bit 3 - enable 752 Hz (D-3) square wave output

src/mame/drivers/tigeroad.c

r4679	r4680
501	501	/* handler called by the 2203 emulator when the internal timers cause an IRQ */
502	502	static void irqhandler(const device_config *device, int irq)
503	503	{
504		cpu_set_input_line(device->machine->cpu[1],0,irq ? ASSERT_LINE : CLEAR_LINE);
	504	cputag_set_input_line(device->machine, "audiocpu", 0, irq ? ASSERT_LINE : CLEAR_LINE);
505	505	}
506	506
507	507	static const ym2203_interface ym2203_config =
r4679	r4680
770	770
771	771	static DRIVER_INIT( tigeroad )
772	772	{
773		memory_install_write16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xfe4002, 0xfe4003, 0, 0, tigeroad_soundcmd_w);
	773	memory_install_write16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xfe4002, 0xfe4003, 0, 0, tigeroad_soundcmd_w);
774	774	}
775	775
776	776	static DRIVER_INIT( f1dream )
777	777	{
778		memory_install_write16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xfe4002, 0xfe4003, 0, 0, f1dream_control_w);
	778	memory_install_write16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xfe4002, 0xfe4003, 0, 0, f1dream_control_w);
779	779	}
780	780
781	781

src/mame/drivers/looping.c

r4679	r4680
166	166
167	167	static TILE_GET_INFO( get_tile_info )
168	168	{
169		looping_state *state = machine->driver_data;
	169	looping_state *state = (looping_state *)machine->driver_data;
170	170	int tile_number = state->videoram[tile_index];
171	171	int color = state->colorram[(tile_index & 0x1f) * 2 + 1] & 0x07;
172	172	SET_TILE_INFO(0, tile_number, color, 0);
r4679	r4680
175	175
176	176	static VIDEO_START( looping )
177	177	{
178		looping_state *state = machine->driver_data;
	178	looping_state *state = (looping_state *)machine->driver_data;
179	179
180	180	state->bg_tilemap = tilemap_create(machine, get_tile_info, tilemap_scan_rows, 8,8, 32,32);
181	181
r4679	r4680
192	192
193	193	static WRITE8_HANDLER( flip_screen_x_w )
194	194	{
195		looping_state *state = space->machine->driver_data;
	195	looping_state *state = (looping_state *)space->machine->driver_data;
196	196	flip_screen_x_set(space->machine, ~data & 0x01);
197	197	tilemap_set_scrollx(state->bg_tilemap, 0, flip_screen_get(space->machine) ? 128 : 0);
198	198	}
r4679	r4680
200	200
201	201	static WRITE8_HANDLER( flip_screen_y_w )
202	202	{
203		looping_state *state = space->machine->driver_data;
	203	looping_state *state = (looping_state *)space->machine->driver_data;
204	204	flip_screen_y_set(space->machine, ~data & 0x01);
205	205	tilemap_set_scrollx(state->bg_tilemap, 0, flip_screen_get(space->machine) ? 128 : 0);
206	206	}
r4679	r4680
208	208
209	209	static WRITE8_HANDLER( looping_videoram_w )
210	210	{
211		looping_state *state = space->machine->driver_data;
	211	looping_state *state = (looping_state *)space->machine->driver_data;
212	212	state->videoram[offset] = data;
213	213	tilemap_mark_tile_dirty(state->bg_tilemap, offset);
214	214	}
r4679	r4680
216	216
217	217	static WRITE8_HANDLER( looping_colorram_w )
218	218	{
219		looping_state *state = space->machine->driver_data;
	219	looping_state *state = (looping_state *)space->machine->driver_data;
220	220	int i;
221	221
222	222	state->colorram[offset] = data;
r4679	r4680
246	246	static void draw_sprites(running_machine *machine, bitmap_t *bitmap, const rectangle *cliprect)
247	247	{
248	248	const UINT8 *source;
249		looping_state *state = machine->driver_data;
	249	looping_state *state = (looping_state *)machine->driver_data;
250	250
251	251	for (source = state->spriteram; source < state->spriteram + 0x40; source += 4)
252	252	{
r4679	r4680
276	276
277	277	static VIDEO_UPDATE( looping )
278	278	{
279		looping_state *state = screen->machine->driver_data;
	279	looping_state *state = (looping_state *)screen->machine->driver_data;
280	280	tilemap_draw(bitmap, cliprect, state->bg_tilemap, 0, 0);
281	281
282	282	draw_sprites(screen->machine, bitmap, cliprect);
r4679	r4680
293	293
294	294	static MACHINE_START( looping )
295	295	{
296		looping_state *state = machine->driver_data;
	296	looping_state *state = (looping_state *)machine->driver_data;
297	297	state_save_register_global_array(machine, state->sound);
298	298	}
299	299
r4679	r4680
314	314	static WRITE8_HANDLER( level2_irq_set )
315	315	{
316	316	if (!(data & 1))
317		cpu_set_input_line_and_vector(space->machine->cpu[0], 0, ASSERT_LINE, 4);
	317	cputag_set_input_line_and_vector(space->machine, "maincpu", 0, ASSERT_LINE, 4);
318	318	}
319	319
320	320
321	321	static WRITE8_HANDLER( main_irq_ack_w )
322	322	{
323	323	if (data == 0)
324		cpu_set_input_line(space->machine->cpu[0], 0, CLEAR_LINE);
	324	cputag_set_input_line(space->machine, "maincpu", 0, CLEAR_LINE);
325	325	}
326	326
327	327
328	328	static WRITE8_HANDLER( looping_souint_clr )
329	329	{
330	330	if (data == 0)
331		cpu_set_input_line(space->machine->cpu[1], 0, CLEAR_LINE);
	331	cputag_set_input_line(space->machine, "audiocpu", 0, CLEAR_LINE);
332	332	}
333	333
334	334
335	335	static void looping_spcint(const device_config *device, int state)
336	336	{
337		cpu_set_input_line_and_vector(device->machine->cpu[1], 0, state, 6);
	337	cputag_set_input_line_and_vector(device->machine, "audiocpu", 0, state, 6);
338	338	}
339	339
340	340
341	341	static WRITE8_HANDLER( looping_soundlatch_w )
342	342	{
343	343	soundlatch_w(space, offset, data);
344		cpu_set_input_line_and_vector(space->machine->cpu[1], 0, ASSERT_LINE, 4);
	344	cputag_set_input_line_and_vector(space->machine, "audiocpu", 0, ASSERT_LINE, 4);
345	345	}
346	346
347	347
r4679	r4680
365	365	0007 = AFA
366	366	*/
367	367
368		looping_state *state = device->machine->driver_data;
	368	looping_state *state = (looping_state *)device->machine->driver_data;
369	369	state->sound[offset + 1] = data ^ 1;
370	370	dac_data_w(device, ((state->sound[2] << 7) + (state->sound[3] << 6)) * state->sound[7]);
371	371	}
r4679	r4680
794	794	rom[i] = BITSWAP8(rom[i], 0,1,2,3,4,5,6,7);
795	795
796	796	/* install protection handlers */
797		memory_install_read8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x7000, 0x7007, 0, 0, protection_r);
	797	memory_install_read8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x7000, 0x7007, 0, 0, protection_r);
798	798	}
799	799
800	800
r4679	r4680
808	808	GAME( 1982, looping,  0,        looping, looping, looping, ROT90, "Venture Line", "Looping (set 1)", GAME_IMPERFECT_SOUND | GAME_SUPPORTS_SAVE )
809	809	GAME( 1982, loopinga, looping,  looping, looping, looping, ROT90, "Venture Line", "Looping (set 2)", GAME_IMPERFECT_SOUND | GAME_SUPPORTS_SAVE )
810	810	GAME( 1982, skybump,  0,        looping, skybump, looping, ROT90, "Venture Line", "Sky Bumper", GAME_IMPERFECT_SOUND | GAME_SUPPORTS_SAVE )
811

src/mame/drivers/segas32.c

r4679	r4680
401	401	v60_irq_timer[1] = timer_alloc(machine, signal_v60_irq_callback, NULL);
402	402
403	403	/* clear IRQ lines */
404		cpu_set_input_line(machine->cpu[0], 0, CLEAR_LINE);
	404	cputag_set_input_line(machine, "maincpu", 0, CLEAR_LINE);
405	405	}
406	406
407	407
r4679	r4680
422	422	for (vector = 0; vector < 5; vector++)
423	423	if (effirq & (1 << vector))
424	424	{
425		cpu_set_input_line_and_vector(machine->cpu[0], 0, ASSERT_LINE, vector);
	425	cputag_set_input_line_and_vector(machine, "maincpu", 0, ASSERT_LINE, vector);
426	426	break;
427	427	}
428	428
429	429	/* if we didn't find any, clear the interrupt line */
430	430	if (vector == 5)
431		cpu_set_input_line(machine->cpu[0], 0, CLEAR_LINE);
	431	cputag_set_input_line(machine, "maincpu", 0, CLEAR_LINE);
432	432	}
433	433
434	434
r4679	r4680
695	695	case 0x1c/2:
696	696	system32_displayenable[which] = (data & 0x02);
697	697	if (which == 0)
698		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_RESET, (data & 0x04) ? CLEAR_LINE : ASSERT_LINE);
	698	cputag_set_input_line(space->machine, "soundcpu", INPUT_LINE_RESET, (data & 0x04) ? CLEAR_LINE : ASSERT_LINE);
699	699	break;
700	700	}
701	701	}
r4679	r4680
1040	1040	for (vector = 0; vector < 3; vector++)
1041	1041	if (effirq & (1 << vector))
1042	1042	{
1043		cpu_set_input_line_and_vector(machine->cpu[1], 0, ASSERT_LINE, 2 * vector);
	1043	cputag_set_input_line_and_vector(machine, "soundcpu", 0, ASSERT_LINE, 2 * vector);
1044	1044	break;
1045	1045	}
1046	1046
1047	1047	/* if we didn't find any, clear the interrupt line */
1048	1048	if (vector == 3)
1049		cpu_set_input_line(machine->cpu[1], 0, CLEAR_LINE);
	1049	cputag_set_input_line(machine, "soundcpu", 0, CLEAR_LINE);
1050	1050	}
1051	1051
1052	1052
r4679	r4680
3787	3787	static DRIVER_INIT( arescue )
3788	3788	{
3789	3789	segas32_common_init(analog_custom_io_r, analog_custom_io_w, NULL);
3790		memory_install_readwrite16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xa00000, 0xa00007, 0, 0, arescue_dsp_r, arescue_dsp_w);
	3790	memory_install_readwrite16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xa00000, 0xa00007, 0, 0, arescue_dsp_r, arescue_dsp_w);
3791	3791
3792		dual_pcb_comms = auto_malloc(0x1000);
3793		memory_install_readwrite16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x810000, 0x810fff, 0, 0, dual_pcb_comms_r, dual_pcb_comms_w);
3794		memory_install_read16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x818000, 0x818003, 0, 0, dual_pcb_masterslave);
	3792	dual_pcb_comms = auto_alloc_array(machine, UINT16, 0x1000/2);
	3793	memory_install_readwrite16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x810000, 0x810fff, 0, 0, dual_pcb_comms_r, dual_pcb_comms_w);
	3794	memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x818000, 0x818003, 0, 0, dual_pcb_masterslave);
3795	3795
3796		memory_install_read16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x810000, 0x810001, 0, 0, arescue_handshake_r);
3797		memory_install_read16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x81000e, 0x81000f, 0, 0, arescue_slavebusy_r);
	3796	memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x810000, 0x810001, 0, 0, arescue_handshake_r);
	3797	memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x81000e, 0x81000f, 0, 0, arescue_slavebusy_r);
3798	3798	}
3799	3799
3800	3800
r4679	r4680
3803	3803	segas32_common_init(extra_custom_io_r, NULL, NULL);
3804	3804
3805	3805	/* install protection handlers */
3806		memory_install_read16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xa00100, 0xa0011f, 0, 0, arf_wakeup_protection_r);
3807		memory_install_readwrite16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xa00000, 0xa00fff, 0, 0, arabfgt_protection_r, arabfgt_protection_w);
	3806	memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xa00100, 0xa0011f, 0, 0, arf_wakeup_protection_r);
	3807	memory_install_readwrite16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xa00000, 0xa00fff, 0, 0, arabfgt_protection_r, arabfgt_protection_w);
3808	3808	}
3809	3809
3810	3810
r4679	r4680
3813	3813	segas32_common_init(extra_custom_io_r, NULL, NULL);
3814	3814
3815	3815	/* install protection handlers */
3816		system32_protram = auto_malloc (0x1000);
3817		memory_install_read16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x20ba00, 0x20ba07, 0, 0, brival_protection_r);
3818		memory_install_write16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xa00000, 0xa00fff, 0, 0, brival_protection_w);
	3816	system32_protram = auto_alloc_array(machine, UINT16, 0x1000/2);
	3817	memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x20ba00, 0x20ba07, 0, 0, brival_protection_r);
	3818	memory_install_write16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xa00000, 0xa00fff, 0, 0, brival_protection_w);
3819	3819	}
3820	3820
3821	3821
r4679	r4680
3824	3824	segas32_common_init(extra_custom_io_r, NULL, NULL);
3825	3825
3826	3826	/* install protection handlers */
3827		memory_install_readwrite16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xa00000, 0xa7ffff, 0, 0, darkedge_protection_r, darkedge_protection_w);
	3827	memory_install_readwrite16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xa00000, 0xa7ffff, 0, 0, darkedge_protection_r, darkedge_protection_w);
3828	3828	system32_prot_vblank = darkedge_fd1149_vblank;
3829	3829	}
3830	3830
r4679	r4680
3833	3833	segas32_common_init(NULL, NULL, NULL);
3834	3834
3835	3835	/* install protection handlers */
3836		memory_install_readwrite16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xa00000, 0xa7ffff, 0, 0, dbzvrvs_protection_r, dbzvrvs_protection_w);
	3836	memory_install_readwrite16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xa00000, 0xa7ffff, 0, 0, dbzvrvs_protection_r, dbzvrvs_protection_w);
3837	3837	}
3838	3838
3839	3839	static WRITE16_HANDLER( f1en_comms_echo_w )
r4679	r4680
3847	3847	{
3848	3848	segas32_common_init(analog_custom_io_r, analog_custom_io_w, NULL);
3849	3849
3850		dual_pcb_comms = auto_malloc(0x1000);
3851		memory_install_readwrite16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x810000, 0x810fff, 0, 0, dual_pcb_comms_r, dual_pcb_comms_w);
3852		memory_install_read16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x818000, 0x818003, 0, 0, dual_pcb_masterslave);
	3850	dual_pcb_comms = auto_alloc_array(machine, UINT16, 0x1000/2);
	3851	memory_install_readwrite16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x810000, 0x810fff, 0, 0, dual_pcb_comms_r, dual_pcb_comms_w);
	3852	memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x818000, 0x818003, 0, 0, dual_pcb_masterslave);
3853	3853
3854		memory_install_write16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x810048, 0x810049, 0, 0, f1en_comms_echo_w);
	3854	memory_install_write16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x810048, 0x810049, 0, 0, f1en_comms_echo_w);
3855	3855	}
3856	3856
3857	3857
r4679	r4680
3866	3866	segas32_common_init(extra_custom_io_r, NULL, NULL);
3867	3867
3868	3868	decrypt_ga2_protrom(machine);
3869		memory_install_readwrite16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xa00000, 0xa00fff, 0, 0, ga2_dpram_r, ga2_dpram_w);
	3869	memory_install_readwrite16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xa00000, 0xa00fff, 0, 0, ga2_dpram_r, ga2_dpram_w);
3870	3870	}
3871	3871
3872	3872
r4679	r4680
3942	3942	{
3943	3943	const device_config *multipcm = devtag_get_device(machine, "sega");
3944	3944	segas32_common_init(analog_custom_io_r, analog_custom_io_w, NULL);
3945		memory_install_write8_device_handler(cpu_get_address_space(machine->cpu[1], ADDRESS_SPACE_PROGRAM), multipcm, 0xb0, 0xbf, 0, 0, scross_bank_w);
	3945	memory_install_write8_device_handler(cputag_get_address_space(machine, "soundcpu", ADDRESS_SPACE_PROGRAM), multipcm, 0xb0, 0xbf, 0, 0, scross_bank_w);
3946	3946	}
3947	3947
3948	3948
r4679	r4680
3957	3957	segas32_common_init(sonic_custom_io_r, sonic_custom_io_w, NULL);
3958	3958
3959	3959	/* install protection handlers */
3960		memory_install_write16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x20E5C4, 0x20E5C5, 0, 0, sonic_level_load_protection);
	3960	memory_install_write16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x20E5C4, 0x20E5C5, 0, 0, sonic_level_load_protection);
3961	3961	}
3962	3962
3963	3963
r4679	r4680
3982	3982	static DRIVER_INIT( jleague )
3983	3983	{
3984	3984	segas32_common_init(NULL, NULL, NULL);
3985		memory_install_write16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x20F700, 0x20F705, 0, 0, jleague_protection_w);
	3985	memory_install_write16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x20F700, 0x20F705, 0, 0, jleague_protection_w);
3986	3986	}
3987	3987
3988	3988

src/mame/drivers/slapfght.c

r4679	r4680
408	408	int getstar_id;
409	409
410	410
411		static ADDRESS_MAP_START( perfrman_readmem, ADDRESS_SPACE_PROGRAM, 8 )
412		AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM)
413		AM_RANGE(0x8000, 0x87ff) AM_READ(SMH_RAM)
414		AM_RANGE(0x8800, 0x880f) AM_READ(slapfight_dpram_r)
415		AM_RANGE(0x8810, 0x8fff) AM_READ(SMH_BANK1)
416		AM_RANGE(0x9000, 0x97ff) AM_READ(SMH_RAM)
417		AM_RANGE(0x9800, 0x9fff) AM_READ(SMH_RAM)
418		AM_RANGE(0xa000, 0xa7ff) AM_READ(SMH_RAM)
	411	static ADDRESS_MAP_START( perfrman_map, ADDRESS_SPACE_PROGRAM, 8 )
	412	AM_RANGE(0x0000, 0x7fff) AM_ROM
	413	AM_RANGE(0x8000, 0x87ff) AM_RAM
	414	AM_RANGE(0x8800, 0x880f) AM_RAM AM_SHARE(1)
	415	AM_RANGE(0x8810, 0x8fff) AM_RAMBANK(1) /* Shared RAM with sound CPU */
	416	AM_RANGE(0x9000, 0x97ff) AM_RAM_WRITE(slapfight_videoram_w) AM_BASE(&videoram) AM_SIZE(&videoram_size)
	417	AM_RANGE(0x9800, 0x9fff) AM_RAM_WRITE(slapfight_colorram_w) AM_BASE(&colorram)
	418	AM_RANGE(0xa000, 0xa7ff) AM_RAM AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
419	419	ADDRESS_MAP_END
420	420
421		static ADDRESS_MAP_START( perfrman_writemem, ADDRESS_SPACE_PROGRAM, 8 )
422		AM_RANGE(0x0000, 0x7fff) AM_WRITE(SMH_ROM)
423		AM_RANGE(0x8000, 0x87ff) AM_WRITE(SMH_RAM)
424		AM_RANGE(0x8800, 0x880f) AM_WRITE(slapfight_dpram_w) AM_BASE(&slapfight_dpram) AM_SIZE(&slapfight_dpram_size)
425		AM_RANGE(0x8810, 0x8fff) AM_WRITE(SMH_BANK1)   /* Shared RAM with sound CPU */
426		AM_RANGE(0x9000, 0x97ff) AM_WRITE(slapfight_videoram_w) AM_BASE(&videoram) AM_SIZE(&videoram_size)
427		AM_RANGE(0x9800, 0x9fff) AM_WRITE(slapfight_colorram_w) AM_BASE(&colorram)
428		AM_RANGE(0xa000, 0xa7ff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
	421	static ADDRESS_MAP_START( tigerh_map, ADDRESS_SPACE_PROGRAM, 8 )
	422	AM_RANGE(0x0000, 0xbfff) AM_ROM
	423	AM_RANGE(0xc000, 0xc7ff) AM_RAM
	424	AM_RANGE(0xc800, 0xc80f) AM_RAM AM_SHARE(1)
	425	AM_RANGE(0xc810, 0xcfff) AM_RAM
	426	AM_RANGE(0xd000, 0xd7ff) AM_RAM_WRITE(slapfight_videoram_w) AM_BASE(&videoram) AM_SIZE(&videoram_size)
	427	AM_RANGE(0xd800, 0xdfff) AM_RAM_WRITE(slapfight_colorram_w) AM_BASE(&colorram)
	428	AM_RANGE(0xe000, 0xe7ff) AM_RAM AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
	429	AM_RANGE(0xe800, 0xe800) AM_WRITEONLY AM_BASE(&slapfight_scrollx_lo)
	430	AM_RANGE(0xe801, 0xe801) AM_WRITEONLY AM_BASE(&slapfight_scrollx_hi)
	431	AM_RANGE(0xe802, 0xe802) AM_WRITEONLY AM_BASE(&slapfight_scrolly)
	432	AM_RANGE(0xf000, 0xf7ff) AM_RAM_WRITE(slapfight_fixram_w) AM_BASE(&slapfight_videoram) AM_SIZE(&slapfight_videoram_size)
	433	AM_RANGE(0xf800, 0xffff) AM_RAM_WRITE(slapfight_fixcol_w) AM_BASE(&slapfight_colorram)
429	434	ADDRESS_MAP_END
430	435
431		static ADDRESS_MAP_START( tigerh_readmem, ADDRESS_SPACE_PROGRAM, 8 )
432		AM_RANGE(0x0000, 0xbfff) AM_READ(SMH_ROM)
433		AM_RANGE(0xc000, 0xc7ff) AM_READ(SMH_RAM)
434		AM_RANGE(0xc800, 0xc80f) AM_READ(slapfight_dpram_r)
435		AM_RANGE(0xc810, 0xcfff) AM_READ(SMH_RAM)
436		AM_RANGE(0xd000, 0xd7ff) AM_READ(SMH_RAM)
437		AM_RANGE(0xd800, 0xdfff) AM_READ(SMH_RAM)
438		AM_RANGE(0xf000, 0xf7ff) AM_READ(SMH_RAM)
439		AM_RANGE(0xf800, 0xffff) AM_READ(SMH_RAM)
440		ADDRESS_MAP_END
441
442		static ADDRESS_MAP_START( readmem, ADDRESS_SPACE_PROGRAM, 8 )
443		AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM)
444		AM_RANGE(0x8000, 0xbfff) AM_READ(SMH_BANK1)
445		AM_RANGE(0xc000, 0xc7ff) AM_READ(SMH_RAM)
446		AM_RANGE(0xc800, 0xc80f) AM_READ(slapfight_dpram_r)
447		AM_RANGE(0xc810, 0xcfff) AM_READ(SMH_RAM)
448		AM_RANGE(0xd000, 0xd7ff) AM_READ(SMH_RAM)
449		AM_RANGE(0xd800, 0xdfff) AM_READ(SMH_RAM)
450		AM_RANGE(0xe000, 0xe7ff) AM_READ(SMH_RAM)
	436	static ADDRESS_MAP_START( slapfght_map, ADDRESS_SPACE_PROGRAM, 8 )
	437	AM_RANGE(0x0000, 0x7fff) AM_ROM
	438	AM_RANGE(0x8000, 0xbfff) AM_ROMBANK(1)
	439	AM_RANGE(0xc000, 0xc7ff) AM_RAM
	440	AM_RANGE(0xc800, 0xc80f) AM_RAM AM_SHARE(1)
	441	AM_RANGE(0xc810, 0xcfff) AM_RAM
	442	AM_RANGE(0xd000, 0xd7ff) AM_RAM_WRITE(slapfight_videoram_w) AM_BASE(&videoram) AM_SIZE(&videoram_size)
	443	AM_RANGE(0xd800, 0xdfff) AM_RAM_WRITE(slapfight_colorram_w) AM_BASE(&colorram)
	444	AM_RANGE(0xe000, 0xe7ff) AM_RAM AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
	445	AM_RANGE(0xe800, 0xe800) AM_WRITEONLY AM_BASE(&slapfight_scrollx_lo)
	446	AM_RANGE(0xe801, 0xe801) AM_WRITEONLY AM_BASE(&slapfight_scrollx_hi)
	447	AM_RANGE(0xe802, 0xe802) AM_WRITEONLY AM_BASE(&slapfight_scrolly)
451	448	//  AM_RANGE(0xe803, 0xe803) AM_READ(mcu_r) // MCU lives here
452		AM_RANGE(0xf000, 0xf7ff) AM_READ(SMH_RAM)
453		AM_RANGE(0xf800, 0xffff) AM_READ(SMH_RAM)
	449	AM_RANGE(0xf000, 0xf7ff) AM_RAM_WRITE(slapfight_fixram_w) AM_BASE(&slapfight_videoram) AM_SIZE(&slapfight_videoram_size)
	450	AM_RANGE(0xf800, 0xffff) AM_RAM_WRITE(slapfight_fixcol_w) AM_BASE(&slapfight_colorram)
454	451	ADDRESS_MAP_END
455	452
456		static ADDRESS_MAP_START( writemem, ADDRESS_SPACE_PROGRAM, 8 )
457		AM_RANGE(0x0000, 0xbfff) AM_WRITE(SMH_ROM)
458		AM_RANGE(0xc000, 0xc7ff) AM_WRITE(SMH_RAM)
459		AM_RANGE(0xc800, 0xc80f) AM_WRITE(slapfight_dpram_w) AM_BASE(&slapfight_dpram) AM_SIZE(&slapfight_dpram_size)
460		AM_RANGE(0xc810, 0xcfff) AM_WRITE(SMH_RAM)
461		AM_RANGE(0xd000, 0xd7ff) AM_WRITE(slapfight_videoram_w) AM_BASE(&videoram) AM_SIZE(&videoram_size)
462		AM_RANGE(0xd800, 0xdfff) AM_WRITE(slapfight_colorram_w) AM_BASE(&colorram)
463		AM_RANGE(0xe000, 0xe7ff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
464		AM_RANGE(0xe800, 0xe800) AM_WRITE(SMH_RAM) AM_BASE(&slapfight_scrollx_lo)
465		AM_RANGE(0xe801, 0xe801) AM_WRITE(SMH_RAM) AM_BASE(&slapfight_scrollx_hi)
466		AM_RANGE(0xe802, 0xe802) AM_WRITE(SMH_RAM) AM_BASE(&slapfight_scrolly)
467		AM_RANGE(0xf000, 0xf7ff) AM_WRITE(slapfight_fixram_w) AM_BASE(&slapfight_videoram) AM_SIZE(&slapfight_videoram_size)
468		AM_RANGE(0xf800, 0xffff) AM_WRITE(slapfight_fixcol_w) AM_BASE(&slapfight_colorram)
469		ADDRESS_MAP_END
470
471		static ADDRESS_MAP_START( slapbtuk_readmem, ADDRESS_SPACE_PROGRAM, 8 )
472		AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM)
473		AM_RANGE(0x8000, 0xbfff) AM_READ(SMH_BANK1)
474		AM_RANGE(0xc000, 0xc7ff) AM_READ(SMH_RAM)
475		AM_RANGE(0xc800, 0xc80f) AM_READ(slapfight_dpram_r)
476		AM_RANGE(0xc810, 0xcfff) AM_READ(SMH_RAM)
477		AM_RANGE(0xd000, 0xd7ff) AM_READ(SMH_RAM)
478		AM_RANGE(0xd800, 0xdfff) AM_READ(SMH_RAM)
479		AM_RANGE(0xe000, 0xe7ff) AM_READ(SMH_RAM)
	453	static ADDRESS_MAP_START( slapbtuk_map, ADDRESS_SPACE_PROGRAM, 8 )
	454	AM_RANGE(0x0000, 0x7fff) AM_ROM
	455	AM_RANGE(0x8000, 0xbfff) AM_ROMBANK(1)
	456	AM_RANGE(0xc000, 0xc7ff) AM_RAM
	457	AM_RANGE(0xc800, 0xc80f) AM_RAM AM_SHARE(1)
	458	AM_RANGE(0xc810, 0xcfff) AM_RAM
	459	AM_RANGE(0xd000, 0xd7ff) AM_RAM_WRITE(slapfight_videoram_w) AM_BASE(&videoram) AM_SIZE(&videoram_size)
	460	AM_RANGE(0xd800, 0xdfff) AM_RAM_WRITE(slapfight_colorram_w) AM_BASE(&colorram)
	461	AM_RANGE(0xe000, 0xe7ff) AM_RAM AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
	462	AM_RANGE(0xe800, 0xe800) AM_WRITEONLY AM_BASE(&slapfight_scrollx_hi)
	463	AM_RANGE(0xe802, 0xe802) AM_WRITEONLY AM_BASE(&slapfight_scrolly)
	464	AM_RANGE(0xe803, 0xe803) AM_WRITEONLY AM_BASE(&slapfight_scrollx_lo)
480	465	//  AM_RANGE(0xe803, 0xe803) AM_READ(getstar_e803_r)
481		AM_RANGE(0xec00, 0xefff) AM_READ(SMH_ROM) // it reads a copy of the logo from here!
482		AM_RANGE(0xf000, 0xf7ff) AM_READ(SMH_RAM)
483		AM_RANGE(0xf800, 0xffff) AM_READ(SMH_RAM)
	466	AM_RANGE(0xec00, 0xefff) AM_ROM // it reads a copy of the logo from here!
	467	AM_RANGE(0xf000, 0xf7ff) AM_RAM_WRITE(slapfight_fixram_w) AM_BASE(&slapfight_videoram) AM_SIZE(&slapfight_videoram_size)
	468	AM_RANGE(0xf800, 0xffff) AM_RAM_WRITE(slapfight_fixcol_w) AM_BASE(&slapfight_colorram)
484	469	ADDRESS_MAP_END
485	470
486
487		static ADDRESS_MAP_START( slapbtuk_writemem, ADDRESS_SPACE_PROGRAM, 8 )
488		AM_RANGE(0x0000, 0xbfff) AM_WRITE(SMH_ROM)
489		AM_RANGE(0xc000, 0xc7ff) AM_WRITE(SMH_RAM)
490		AM_RANGE(0xc800, 0xc80f) AM_WRITE(slapfight_dpram_w) AM_BASE(&slapfight_dpram) AM_SIZE(&slapfight_dpram_size)
491		AM_RANGE(0xc810, 0xcfff) AM_WRITE(SMH_RAM)
492		AM_RANGE(0xd000, 0xd7ff) AM_WRITE(slapfight_videoram_w) AM_BASE(&videoram) AM_SIZE(&videoram_size)
493		AM_RANGE(0xd800, 0xdfff) AM_WRITE(slapfight_colorram_w) AM_BASE(&colorram)
494		AM_RANGE(0xe000, 0xe7ff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
495		AM_RANGE(0xe800, 0xe800) AM_WRITE(SMH_RAM) AM_BASE(&slapfight_scrollx_hi)
496		AM_RANGE(0xe802, 0xe802) AM_WRITE(SMH_RAM) AM_BASE(&slapfight_scrolly)
497		AM_RANGE(0xe803, 0xe803) AM_WRITE(SMH_RAM) AM_BASE(&slapfight_scrollx_lo)
498		AM_RANGE(0xf000, 0xf7ff) AM_WRITE(slapfight_fixram_w) AM_BASE(&slapfight_videoram) AM_SIZE(&slapfight_videoram_size)
499		AM_RANGE(0xf800, 0xffff) AM_WRITE(slapfight_fixcol_w) AM_BASE(&slapfight_colorram)
500		ADDRESS_MAP_END
501
502		static ADDRESS_MAP_START( io_map, ADDRESS_SPACE_IO, 8 )
	471	static ADDRESS_MAP_START( slapfght_io_map, ADDRESS_SPACE_IO, 8 )
503	472	ADDRESS_MAP_GLOBAL_MASK(0xff)
504	473	AM_RANGE(0x00, 0x00) AM_READWRITE(slapfight_port_00_r, slapfight_port_00_w)   /* status register */
505	474	AM_RANGE(0x01, 0x01) AM_WRITE(slapfight_port_01_w)
r4679	r4680
526	495	AM_RANGE(0x07, 0x07) AM_WRITE(slapfight_port_07_w)
527	496	ADDRESS_MAP_END
528	497
529		static ADDRESS_MAP_START( m68705_readmem, ADDRESS_SPACE_PROGRAM, 8 )
530		ADDRESS_MAP_GLOBAL_MASK(0x7ff)
531		AM_RANGE(0x0000, 0x0000) AM_READ(tigerh_68705_portA_r)
532		AM_RANGE(0x0001, 0x0001) AM_READ(tigerh_68705_portB_r)
533		AM_RANGE(0x0002, 0x0002) AM_READ(tigerh_68705_portC_r)
534		AM_RANGE(0x0010, 0x007f) AM_READ(SMH_RAM)
535		AM_RANGE(0x0080, 0x07ff) AM_READ(SMH_ROM)
536		ADDRESS_MAP_END
537
538		static ADDRESS_MAP_START( m68705_writemem, ADDRESS_SPACE_PROGRAM, 8 )
539		ADDRESS_MAP_GLOBAL_MASK(0x7ff)
540		AM_RANGE(0x0000, 0x0000) AM_WRITE(tigerh_68705_portA_w)
541		AM_RANGE(0x0001, 0x0001) AM_WRITE(tigerh_68705_portB_w)
542		AM_RANGE(0x0002, 0x0002) AM_WRITE(tigerh_68705_portC_w)
543		AM_RANGE(0x0004, 0x0004) AM_WRITE(tigerh_68705_ddrA_w)
544		AM_RANGE(0x0005, 0x0005) AM_WRITE(tigerh_68705_ddrB_w)
545		AM_RANGE(0x0006, 0x0006) AM_WRITE(tigerh_68705_ddrC_w)
546		AM_RANGE(0x0010, 0x007f) AM_WRITE(SMH_RAM)
547		AM_RANGE(0x0080, 0x07ff) AM_WRITE(SMH_ROM)
548		ADDRESS_MAP_END
549
550	498	static ADDRESS_MAP_START( tigerhb_io_map, ADDRESS_SPACE_IO, 8 )
551	499	ADDRESS_MAP_GLOBAL_MASK(0xff)
552	500	AM_RANGE(0x00, 0x00) AM_READWRITE(slapfight_port_00_r, slapfight_port_00_w)   /* status register */
r4679	r4680
556	504	AM_RANGE(0x07, 0x07) AM_WRITE(slapfight_port_07_w)
557	505	ADDRESS_MAP_END
558	506
559		static ADDRESS_MAP_START( perfrman_sound_readmem, ADDRESS_SPACE_PROGRAM, 8 )
560		AM_RANGE(0x0000, 0x1fff) AM_READ(SMH_ROM)
561		AM_RANGE(0x8800, 0x880f) AM_READ(slapfight_dpram_r)
562		AM_RANGE(0x8810, 0x8fff) AM_READ(SMH_BANK1)
563		AM_RANGE(0xa081, 0xa081) AM_DEVREAD("ay1", ay8910_r)
564		AM_RANGE(0xa091, 0xa091) AM_DEVREAD("ay2", ay8910_r)
	507	static ADDRESS_MAP_START( tigerh_m68705_map, ADDRESS_SPACE_PROGRAM, 8 )
	508	ADDRESS_MAP_GLOBAL_MASK(0x7ff)
	509	AM_RANGE(0x0000, 0x0000) AM_READWRITE(tigerh_68705_portA_r,tigerh_68705_portA_w)
	510	AM_RANGE(0x0001, 0x0001) AM_READWRITE(tigerh_68705_portB_r,tigerh_68705_portB_w)
	511	AM_RANGE(0x0002, 0x0002) AM_READWRITE(tigerh_68705_portC_r,tigerh_68705_portC_w)
	512	AM_RANGE(0x0004, 0x0004) AM_WRITE(tigerh_68705_ddrA_w)
	513	AM_RANGE(0x0005, 0x0005) AM_WRITE(tigerh_68705_ddrB_w)
	514	AM_RANGE(0x0006, 0x0006) AM_WRITE(tigerh_68705_ddrC_w)
	515	AM_RANGE(0x0010, 0x007f) AM_RAM
	516	AM_RANGE(0x0080, 0x07ff) AM_ROM
565	517	ADDRESS_MAP_END
566	518
567		static ADDRESS_MAP_START( perfrman_sound_writemem, ADDRESS_SPACE_PROGRAM, 8 )
568		AM_RANGE(0x0000, 0x1fff) AM_WRITE(SMH_ROM)
569		AM_RANGE(0x8800, 0x880f) AM_WRITE(slapfight_dpram_w)
570		AM_RANGE(0x8810, 0x8fff) AM_WRITE(SMH_BANK1)   /* Shared RAM with main CPU */
	519	static ADDRESS_MAP_START( perfrman_sound_map, ADDRESS_SPACE_PROGRAM, 8 )
	520	AM_RANGE(0x0000, 0x1fff) AM_ROM
	521	AM_RANGE(0x8800, 0x880f) AM_RAM AM_SHARE(1)
	522	AM_RANGE(0x8810, 0x8fff) AM_RAMBANK(1) /* Shared RAM with main CPU */
571	523	AM_RANGE(0xa080, 0xa080) AM_DEVWRITE("ay1", ay8910_address_w)
	524	AM_RANGE(0xa081, 0xa081) AM_DEVREAD("ay1", ay8910_r)
572	525	AM_RANGE(0xa082, 0xa082) AM_DEVWRITE("ay1", ay8910_data_w)
573	526	AM_RANGE(0xa090, 0xa090) AM_DEVWRITE("ay2", ay8910_address_w)
	527	AM_RANGE(0xa091, 0xa091) AM_DEVREAD("ay2", ay8910_r)
574	528	AM_RANGE(0xa092, 0xa092) AM_DEVWRITE("ay2", ay8910_data_w)
575	529	AM_RANGE(0xa0e0, 0xa0e0) AM_WRITE(getstar_sh_intenable_w) /* maybe a0f0 also -LE */
576	530	//  AM_RANGE(0xa0f0, 0xa0f0) AM_WRITENOP
577	531	ADDRESS_MAP_END
578	532
579		static ADDRESS_MAP_START( sound_readmem, ADDRESS_SPACE_PROGRAM, 8 )
580		AM_RANGE(0x0000, 0x1fff) AM_READ(SMH_ROM)
581		AM_RANGE(0xa081, 0xa081) AM_DEVREAD("ay1", ay8910_r)
582		AM_RANGE(0xa091, 0xa091) AM_DEVREAD("ay2", ay8910_r)
583		AM_RANGE(0xc800, 0xc80f) AM_READ(slapfight_dpram_r)
584		AM_RANGE(0xc810, 0xcfff) AM_READ(SMH_RAM)
585		AM_RANGE(0xd000, 0xffff) AM_READ(SMH_RAM)
586		ADDRESS_MAP_END
587
588		static ADDRESS_MAP_START( sound_writemem, ADDRESS_SPACE_PROGRAM, 8 )
589		AM_RANGE(0x0000, 0x1fff) AM_WRITE(SMH_ROM)
	533	static ADDRESS_MAP_START( slapfght_sound_map, ADDRESS_SPACE_PROGRAM, 8 )
	534	AM_RANGE(0x0000, 0x1fff) AM_ROM
590	535	AM_RANGE(0xa080, 0xa080) AM_DEVWRITE("ay1", ay8910_address_w)
	536	AM_RANGE(0xa081, 0xa081) AM_DEVREAD("ay1", ay8910_r)
591	537	AM_RANGE(0xa082, 0xa082) AM_DEVWRITE("ay1", ay8910_data_w)
592	538	AM_RANGE(0xa090, 0xa090) AM_DEVWRITE("ay2", ay8910_address_w)
	539	AM_RANGE(0xa091, 0xa091) AM_DEVREAD("ay2", ay8910_r)
593	540	AM_RANGE(0xa092, 0xa092) AM_DEVWRITE("ay2", ay8910_data_w)
594	541	AM_RANGE(0xa0e0, 0xa0e0) AM_WRITE(getstar_sh_intenable_w) /* maybe a0f0 also -LE */
595		AM_RANGE(0xc800, 0xc80f) AM_WRITE(slapfight_dpram_w)
596		AM_RANGE(0xc810, 0xcfff) AM_WRITE(SMH_RAM)
597		AM_RANGE(0xd000, 0xffff) AM_WRITE(SMH_RAM)
	542	//  AM_RANGE(0xa0f0, 0xa0f0) AM_WRITENOP
	543	AM_RANGE(0xc800, 0xc80f) AM_RAM AM_SHARE(1)
	544	AM_RANGE(0xc810, 0xcfff) AM_RAM
	545	AM_RANGE(0xd000, 0xffff) AM_RAM
598	546	ADDRESS_MAP_END
599	547
600	548
	549
601	550	static INPUT_PORTS_START( slapfght_generic )
602	551	PORT_START("IN0")
603	552	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_UP    ) PORT_8WAY
r4679	r4680
917	866
918	867	static VIDEO_EOF( perfrman )
919	868	{
920		const address_space *space = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM);
921		buffer_spriteram_w(space,0,0);
	869	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	870	buffer_spriteram_w(space, 0, 0);
922	871	}
923	872
924	873	static MACHINE_DRIVER_START( perfrman )
925	874
926	875	/* basic machine hardware */
927	876	MDRV_CPU_ADD("maincpu", Z80,16000000/4)         /* 4MHz ???, 16MHz Oscillator */
928		MDRV_CPU_PROGRAM_MAP(perfrman_readmem,perfrman_writemem)
929		MDRV_CPU_IO_MAP(io_map,0)
	877	MDRV_CPU_PROGRAM_MAP(perfrman_map,0)
	878	MDRV_CPU_IO_MAP(slapfght_io_map,0)
930	879	MDRV_CPU_VBLANK_INT("screen", irq0_line_hold)
931	880
932	881	MDRV_CPU_ADD("audiocpu", Z80,16000000/8)         /* 2MHz ???, 16MHz Oscillator */
933		MDRV_CPU_PROGRAM_MAP(perfrman_sound_readmem,perfrman_sound_writemem)
	882	MDRV_CPU_PROGRAM_MAP(perfrman_sound_map,0)
934	883	MDRV_CPU_VBLANK_INT_HACK(getstar_interrupt,4)   /* music speed, verified */
935	884
936	885	MDRV_QUANTUM_TIME(HZ(600))      /* 10 CPU slices per frame - enough for the sound CPU to read all commands */
r4679	r4680
972	921
973	922	/* basic machine hardware */
974	923	MDRV_CPU_ADD("maincpu", Z80, 6000000)
975		MDRV_CPU_PROGRAM_MAP(tigerh_readmem,writemem)
	924	MDRV_CPU_PROGRAM_MAP(tigerh_map,0)
976	925	MDRV_CPU_IO_MAP(tigerhb_io_map,0)
977	926	MDRV_CPU_VBLANK_INT("screen", irq0_line_hold)
978	927
979	928	MDRV_CPU_ADD("audiocpu", Z80, 6000000)
980		MDRV_CPU_PROGRAM_MAP(sound_readmem,sound_writemem)
	929	MDRV_CPU_PROGRAM_MAP(slapfght_sound_map,0)
981	930	MDRV_CPU_VBLANK_INT_HACK(nmi_line_pulse,6)    /* ??? */
982	931
983	932	MDRV_QUANTUM_TIME(HZ(600))   /* 10 CPU slices per frame - enough for the sound CPU to read all commands */
r4679	r4680
1018	967
1019	968	/* basic machine hardware */
1020	969	MDRV_CPU_ADD("maincpu", Z80, XTAL_36MHz/6) /* verified on pcb */
1021		MDRV_CPU_PROGRAM_MAP(tigerh_readmem,writemem)
	970	MDRV_CPU_PROGRAM_MAP(tigerh_map,0)
1022	971	MDRV_CPU_IO_MAP(tigerh_io_map,0)
1023	972	MDRV_CPU_VBLANK_INT("screen", irq0_line_hold)
1024	973
1025	974	MDRV_CPU_ADD("audiocpu", Z80, XTAL_36MHz/12) /* verified on pcb */
1026		MDRV_CPU_PROGRAM_MAP(sound_readmem,sound_writemem)
	975	MDRV_CPU_PROGRAM_MAP(slapfght_sound_map,0)
1027	976	MDRV_CPU_VBLANK_INT_HACK(nmi_line_pulse,6)    /* ??? */
1028	977
1029	978	MDRV_CPU_ADD("mcu", M68705,XTAL_36MHz/12) /* verified on pcb */
1030		MDRV_CPU_PROGRAM_MAP(m68705_readmem,m68705_writemem)
	979	MDRV_CPU_PROGRAM_MAP(tigerh_m68705_map,0)
1031	980
1032	981	MDRV_QUANTUM_TIME(HZ(600))   /* 10 CPU slices per frame - enough for the sound CPU to read all commands */
1033	982
r4679	r4680
1068	1017
1069	1018	/* basic machine hardware */
1070	1019	MDRV_CPU_ADD("maincpu",Z80, XTAL_36MHz/6) /* verified on pcb */
1071		MDRV_CPU_PROGRAM_MAP(readmem,writemem)
1072		MDRV_CPU_IO_MAP(io_map,0)
	1020	MDRV_CPU_PROGRAM_MAP(slapfght_map,0)
	1021	MDRV_CPU_IO_MAP(slapfght_io_map,0)
1073	1022	MDRV_CPU_VBLANK_INT("screen", irq0_line_hold)
1074	1023
1075	1024	MDRV_CPU_ADD("audiocpu", Z80, XTAL_36MHz/12) /* verified on pcb */
1076		MDRV_CPU_PROGRAM_MAP(sound_readmem,sound_writemem)
	1025	MDRV_CPU_PROGRAM_MAP(slapfght_sound_map,0)
1077	1026	MDRV_CPU_VBLANK_INT_HACK(getstar_interrupt, 3)
1078	1027
1079	1028	MDRV_QUANTUM_TIME(HZ(600))   /* 10 CPU slices per frame - enough for the sound CPU to read all commands */
r4679	r4680
1116	1065	/* basic machine hardware */
1117	1066	MDRV_IMPORT_FROM(slapfigh)
1118	1067	MDRV_CPU_MODIFY("maincpu")
1119		MDRV_CPU_PROGRAM_MAP(slapbtuk_readmem,slapbtuk_writemem)
	1068	MDRV_CPU_PROGRAM_MAP(slapbtuk_map,0)
1120	1069	MACHINE_DRIVER_END
1121	1070
1122	1071
r4679	r4680
1770	1719
1771	1720	static DRIVER_INIT( tigerh )
1772	1721	{
1773		memory_install_readwrite8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xe803, 0xe803, 0, 0, tigerh_mcu_r, tigerh_mcu_w  );
	1722	memory_install_readwrite8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xe803, 0xe803, 0, 0, tigerh_mcu_r, tigerh_mcu_w  );
1774	1723	}
1775	1724
1776	1725	static DRIVER_INIT( tigerhb )
1777	1726	{
1778		memory_install_readwrite8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xe803, 0xe803, 0, 0, tigerhb_e803_r, tigerhb_e803_w  );
	1727	memory_install_readwrite8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xe803, 0xe803, 0, 0, tigerhb_e803_r, tigerhb_e803_w  );
1779	1728	}
1780	1729
1781	1730
r4679	r4680
1833	1782	return 0;
1834	1783	}
1835	1784
1836		static READ8_HANDLER( gtstarb1_dpram_r )
1837		{
1838		/* requires this or it gets stuck with 'rom test' on screen */
1839		/* it is possible the program roms are slighly corrupt like the gfx roms, or
1840		that the bootleg simply shouldn't execute the code due to the modified roms */
1841		if (cpu_get_pc(space->cpu)==0x6d54) return 0xff;
1842		return slapfight_dpram[offset];
1843		}
1844
1845	1785	static void getstar_init( running_machine *machine )
1846	1786	{
1847		memory_install_readwrite8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xe803, 0xe803, 0, 0, getstar_e803_r, getstar_e803_w  );
	1787	memory_install_readwrite8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xe803, 0xe803, 0, 0, getstar_e803_r, getstar_e803_w  );
1848	1788	}
1849	1789
1850	1790	static DRIVER_INIT( getstar )
r4679	r4680
1861	1801
1862	1802	static DRIVER_INIT( gtstarb1 )
1863	1803	{
	1804	UINT8 *ROM = memory_region(machine, "maincpu");
	1805
1864	1806	getstar_id = GTSTARB1;
1865	1807	getstar_init(machine);
1866	1808
1867	1809	/* specific handlers for this bootleg */
1868		memory_install_read8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_IO), 0x0, 0x0, 0, 0, gtstarb1_port_0_read );
1869		memory_install_read8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xc800, 0xc80f, 0, 0, gtstarb1_dpram_r );
	1810	memory_install_read8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_IO), 0x0, 0x0, 0, 0, gtstarb1_port_0_read );
	1811	/* requires this or it gets stuck with 'rom test' on screen */
	1812	/* it is possible the program roms are slighly corrupt like the gfx roms, or
	1813	that the bootleg simply shouldn't execute the code due to the modified roms */
	1814	/* TODO: find & fix the cause of the following happening. */
	1815	ROM[0x6d56] = 0xc3; //jp instead of jp z
1870	1816	}
1871	1817
1872	1818	static DRIVER_INIT( gtstarb2 )
r4679	r4680
1903	1849	static DRIVER_INIT( slapfigh )
1904	1850	{
1905	1851	slapfigh_prot_pos = 0;
1906		memory_install_read8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xe803, 0xe803, 0, 0, slapfigh_mcu_r );
1907		//  memory_install_write8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xe803, 0xe803, 0, 0, getstar_mcu_w  );
	1852	memory_install_read8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xe803, 0xe803, 0, 0, slapfigh_mcu_r );
	1853	//  memory_install_write8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xe803, 0xe803, 0, 0, getstar_mcu_w  );
1908	1854	}
1909	1855
1910	1856
r4679	r4680
1926	1872	GAME( 1986, getstarj, getstar,  slapfigh, getstarj, getstarj, ROT0,   "Taito",   "Get Star (Japan)", GAME_NO_COCKTAIL )
1927	1873	GAME( 1986, gtstarb1, getstar,  slapfigh, getstarj, gtstarb1, ROT0,   "bootleg", "Get Star (bootleg set 1)", GAME_NO_COCKTAIL )
1928	1874	GAME( 1986, gtstarb2, getstar,  slapfigh, gtstarb2, gtstarb2, ROT0,   "bootleg", "Get Star (bootleg set 2)", GAME_NO_COCKTAIL )
1929

src/mame/drivers/astinvad.c

r4679	r4680
96	96
97	97	static VIDEO_START( spaceint )
98	98	{
99		colorram = auto_malloc(videoram_size);
	99	colorram = auto_alloc_array(machine, UINT8, videoram_size);
100	100	}
101	101
102	102
r4679	r4680
188	188
189	189	static TIMER_CALLBACK( kamikaze_int_off )
190	190	{
191		cpu_set_input_line(machine->cpu[0], 0, CLEAR_LINE);
	191	cputag_set_input_line(machine, "maincpu", 0, CLEAR_LINE);
192	192	}
193	193
194	194
195	195	static TIMER_CALLBACK( kamizake_int_gen )
196	196	{
197	197	/* interrupts are asserted on every state change of the 128V line */
198		cpu_set_input_line(machine->cpu[0], 0, ASSERT_LINE);
	198	cputag_set_input_line(machine, "maincpu", 0, ASSERT_LINE);
199	199	param ^= 128;
200	200	timer_adjust_oneshot(int_timer, video_screen_get_time_until_pos(machine->primary_screen, param, 0), param);
201	201
r4679	r4680
214	214	static INPUT_CHANGED( spaceint_coin_inserted )
215	215	{
216	216	/* coin insertion causes an NMI */
217		cpu_set_input_line(field->port->machine->cpu[0], INPUT_LINE_NMI, newval ? ASSERT_LINE : CLEAR_LINE);
	217	cputag_set_input_line(field->port->machine, "maincpu", INPUT_LINE_NMI, newval ? ASSERT_LINE : CLEAR_LINE);
218	218	}
219	219
220	220

src/mame/drivers/psikyosh.c

r4679	r4680
349	349	UINT32 length, size;
350	350	UINT8 *dat;
351	351
352		dat = eeprom_get_data_pointer(&length, &size);
	352	dat = (UINT8 *)eeprom_get_data_pointer(&length, &size);
353	353	memset(dat, 0, length * size);
354	354
355	355	if (use_factory_eeprom!=eeprom_0) /* Set the EEPROM to Factory Defaults for games needing them*/
r4679	r4680
435	435	{
436	436	if (!(data & 0x00c00000))
437	437	{
438		cpu_set_input_line(space->machine->cpu[0], 4, CLEAR_LINE);
	438	cputag_set_input_line(space->machine, "maincpu", 4, CLEAR_LINE);
439	439	}
440	440	}
441	441
r4679	r4680
479	479	#endif
480	480
481	481
482		static ADDRESS_MAP_START( ps3v1_readmem, ADDRESS_SPACE_PROGRAM, 32 )
483		AM_RANGE(0x00000000, 0x000fffff) AM_READ(SMH_ROM)   // program ROM (1 meg)
484		AM_RANGE(0x02000000, 0x021fffff) AM_READ(SMH_BANK1) // data ROM
485		AM_RANGE(0x03000000, 0x03003fff) AM_READ(SMH_RAM)   // sprites
486		AM_RANGE(0x03004000, 0x0300ffff) AM_READ(SMH_RAM)
487		AM_RANGE(0x03040000, 0x03044fff) AM_READ(SMH_RAM)
488		AM_RANGE(0x03050000, 0x030501ff) AM_READ(SMH_RAM)
489		AM_RANGE(0x0305ffdc, 0x0305ffdf) AM_READNOP // also writes to this address - might be vblank reads?
490		AM_RANGE(0x0305ffe0, 0x0305ffff) AM_READ(SMH_RAM) //  video registers
	482	static ADDRESS_MAP_START( ps3v1_map, ADDRESS_SPACE_PROGRAM, 32 )
	483	AM_RANGE(0x00000000, 0x000fffff) AM_ROM               // program ROM (1 meg)
	484	AM_RANGE(0x02000000, 0x021fffff) AM_ROMBANK(1) // data ROM
	485	AM_RANGE(0x03000000, 0x03003fff) AM_RAM AM_BASE(&spriteram32) AM_SIZE(&spriteram_size)   // sprites (might be a bit longer)
	486	AM_RANGE(0x03004000, 0x0300ffff) AM_RAM AM_BASE(&psikyosh_bgram) // backgrounds
	487	AM_RANGE(0x03040000, 0x03044fff) AM_RAM_WRITE(paletteram32_RRRRRRRRGGGGGGGGBBBBBBBBxxxxxxxx_dword_w) AM_BASE(&paletteram32) // palette..
	488	AM_RANGE(0x03050000, 0x030501ff) AM_RAM AM_BASE(&psikyosh_zoomram) // a gradient sometimes ...
	489	AM_RANGE(0x0305ffdc, 0x0305ffdf) AM_READNOP AM_WRITE(psikyosh_irqctrl_w) // also writes to this address - might be vblank reads?
	490	AM_RANGE(0x0305ffe0, 0x0305ffff) AM_RAM_WRITE(psikyosh_vidregs_w) AM_BASE(&psikyosh_vidregs) //  video registers
491	491	AM_RANGE(0x05000000, 0x05000003) AM_DEVREAD8("ymf", ymf278b_r, 0xffffffff) // read YMF status
	492	AM_RANGE(0x05000000, 0x05000007) AM_DEVWRITE8("ymf", ymf278b_w, 0xffffffff)
492	493	AM_RANGE(0x05800000, 0x05800003) AM_READ_PORT("INPUTS")
493		AM_RANGE(0x05800004, 0x05800007) AM_READ(psh_eeprom_r)
494		AM_RANGE(0x06000000, 0x060fffff) AM_READ(SMH_RAM) // main RAM (1 meg)
	494	AM_RANGE(0x05800004, 0x05800007) AM_READWRITE(psh_eeprom_r,psh_eeprom_w)
	495	AM_RANGE(0x06000000, 0x060fffff) AM_RAM   AM_BASE(&psh_ram) // main RAM (1 meg)
495	496
496	497	#if ROMTEST
497	498	AM_RANGE(0x05000004, 0x05000007) AM_READ(psh_sample_r) // data for rom tests (Used to verify Sample rom)
498		AM_RANGE(0x03060000, 0x0307ffff) AM_READ(SMH_BANK2) // data for rom tests (gfx), data is controlled by vidreg
499		AM_RANGE(0x04060000, 0x0407ffff) AM_READ(SMH_BANK2) // data for rom tests (gfx) (Mirrored?)
	499	AM_RANGE(0x03060000, 0x0307ffff) AM_ROMBANK(2) // data for rom tests (gfx), data is controlled by vidreg
	500	AM_RANGE(0x04060000, 0x0407ffff) AM_ROMBANK(2) // data for rom tests (gfx) (Mirrored?)
500	501	#endif
501	502	ADDRESS_MAP_END
502	503
503		static ADDRESS_MAP_START( ps3v1_writemem, ADDRESS_SPACE_PROGRAM, 32 )
504		AM_RANGE(0x00000000, 0x000fffff) AM_WRITE(SMH_ROM)   // program ROM (1 meg)
505		AM_RANGE(0x02000000, 0x021fffff) AM_WRITE(SMH_ROM) // data ROM
506		AM_RANGE(0x03000000, 0x03003fff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram32) AM_SIZE(&spriteram_size)   // sprites (might be a bit longer)
507		AM_RANGE(0x03004000, 0x0300ffff) AM_WRITE(SMH_RAM) AM_BASE(&psikyosh_bgram) // backgrounds
508		AM_RANGE(0x03040000, 0x03044fff) AM_WRITE(paletteram32_RRRRRRRRGGGGGGGGBBBBBBBBxxxxxxxx_dword_w) AM_BASE(&paletteram32) // palette..
509		AM_RANGE(0x03050000, 0x030501ff) AM_WRITE(SMH_RAM) AM_BASE(&psikyosh_zoomram) // a gradient sometimes ...
510		AM_RANGE(0x0305ffdc, 0x0305ffdf) AM_WRITE(psikyosh_irqctrl_w)
511		AM_RANGE(0x0305ffe0, 0x0305ffff) AM_WRITE(psikyosh_vidregs_w) AM_BASE(&psikyosh_vidregs) //  video registers
512		AM_RANGE(0x05000000, 0x05000007) AM_DEVWRITE8("ymf", ymf278b_w, 0xffffffff)
513		AM_RANGE(0x05800004, 0x05800007) AM_WRITE(psh_eeprom_w)
514		AM_RANGE(0x06000000, 0x060fffff) AM_WRITE(SMH_RAM) AM_BASE(&psh_ram) // work RAM
515		ADDRESS_MAP_END
516
517		static ADDRESS_MAP_START( ps5_readmem, ADDRESS_SPACE_PROGRAM, 32 )
518		AM_RANGE(0x00000000, 0x000fffff) AM_READ(SMH_ROM) // program ROM (1 meg)
	504	static ADDRESS_MAP_START( ps5_map, ADDRESS_SPACE_PROGRAM, 32 )
	505	AM_RANGE(0x00000000, 0x000fffff) AM_ROM // program ROM (1 meg)
519	506	AM_RANGE(0x03000000, 0x03000003) AM_READ_PORT("INPUTS")
520		AM_RANGE(0x03000004, 0x03000007) AM_READ_PORT("JP4")
	507	AM_RANGE(0x03000004, 0x03000007) AM_READ_PORT("JP4") AM_WRITE(psh_eeprom_w)
521	508	AM_RANGE(0x03100000, 0x03100003) AM_DEVREAD8("ymf", ymf278b_r, 0xffffffff)
522		AM_RANGE(0x04000000, 0x04003fff) AM_READ(SMH_RAM)   // sprites
523		AM_RANGE(0x04004000, 0x0400ffff) AM_READ(SMH_RAM)
524		AM_RANGE(0x04040000, 0x04044fff) AM_READ(SMH_RAM)
525		AM_RANGE(0x04050000, 0x040501ff) AM_READ(SMH_RAM)
526		AM_RANGE(0x0405ffdc, 0x0405ffdf) AM_READNOP // also writes to this address - might be vblank reads?
527		AM_RANGE(0x0405ffe0, 0x0405ffff) AM_READ(SMH_RAM) // video registers
528		AM_RANGE(0x05000000, 0x0507ffff) AM_READ(SMH_BANK1) // data ROM
529		AM_RANGE(0x06000000, 0x060fffff) AM_READ(SMH_RAM)
	509	AM_RANGE(0x03100000, 0x03100007) AM_DEVWRITE8("ymf", ymf278b_w, 0xffffffff)
	510	AM_RANGE(0x04000000, 0x04003fff) AM_RAM AM_BASE(&spriteram32) AM_SIZE(&spriteram_size)
	511	AM_RANGE(0x04004000, 0x0400ffff) AM_RAM AM_BASE(&psikyosh_bgram) // backgrounds
	512	AM_RANGE(0x04040000, 0x04044fff) AM_RAM_WRITE(paletteram32_RRRRRRRRGGGGGGGGBBBBBBBBxxxxxxxx_dword_w) AM_BASE(&paletteram32)
	513	AM_RANGE(0x04050000, 0x040501ff) AM_RAM AM_BASE(&psikyosh_zoomram)
	514	AM_RANGE(0x0405ffdc, 0x0405ffdf) AM_READNOP AM_WRITE(psikyosh_irqctrl_w) // also writes to this address - might be vblank reads?
	515	AM_RANGE(0x0405ffe0, 0x0405ffff) AM_RAM_WRITE(psikyosh_vidregs_w) AM_BASE(&psikyosh_vidregs) // video registers
	516	AM_RANGE(0x05000000, 0x0507ffff) AM_ROMBANK(1) // data ROM
	517	AM_RANGE(0x06000000, 0x060fffff) AM_RAM  AM_BASE(&psh_ram)
530	518
531	519	#if ROMTEST
532	520	AM_RANGE(0x03100004, 0x03100007) AM_READ(psh_sample_r) // data for rom tests (Used to verify Sample rom)
533		AM_RANGE(0x04060000, 0x0407ffff) AM_READ(SMH_BANK2) // data for rom tests (gfx), data is controlled by vidreg
	521	AM_RANGE(0x04060000, 0x0407ffff) AM_ROMBANK(2) // data for rom tests (gfx), data is controlled by vidreg
534	522	#endif
535	523	ADDRESS_MAP_END
536	524
537		static ADDRESS_MAP_START( ps5_writemem, ADDRESS_SPACE_PROGRAM, 32 )
538		AM_RANGE(0x00000000, 0x000fffff) AM_WRITE(SMH_ROM)   // program ROM (1 meg)
539		AM_RANGE(0x03000004, 0x03000007) AM_WRITE(psh_eeprom_w)
540		AM_RANGE(0x03100000, 0x03100007) AM_DEVWRITE8("ymf", ymf278b_w, 0xffffffff)
541		AM_RANGE(0x04000000, 0x04003fff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram32) AM_SIZE(&spriteram_size)
542		AM_RANGE(0x04004000, 0x0400ffff) AM_WRITE(SMH_RAM) AM_BASE(&psikyosh_bgram) // backgrounds
543		AM_RANGE(0x04040000, 0x04044fff) AM_WRITE(paletteram32_RRRRRRRRGGGGGGGGBBBBBBBBxxxxxxxx_dword_w) AM_BASE(&paletteram32)
544		AM_RANGE(0x04050000, 0x040501ff) AM_WRITE(SMH_RAM) AM_BASE(&psikyosh_zoomram)
545		AM_RANGE(0x0405ffdc, 0x0405ffdf) AM_WRITE(psikyosh_irqctrl_w)
546		AM_RANGE(0x0405ffe0, 0x0405ffff) AM_WRITE(psikyosh_vidregs_w) AM_BASE(&psikyosh_vidregs) // video registers
547		AM_RANGE(0x05000000, 0x0507ffff) AM_WRITE(SMH_ROM) // data ROM
548		AM_RANGE(0x06000000, 0x060fffff) AM_WRITE(SMH_RAM) AM_BASE(&psh_ram)
549		ADDRESS_MAP_END
550	525
551	526	static void irqhandler(const device_config *device, int linestate)
552	527	{
553	528	if (linestate)
554		cpu_set_input_line(device->machine->cpu[0], 12, ASSERT_LINE);
	529	cputag_set_input_line(device->machine, "maincpu", 12, ASSERT_LINE);
555	530	else
556		cpu_set_input_line(device->machine->cpu[0], 12, CLEAR_LINE);
	531	cputag_set_input_line(device->machine, "maincpu", 12, CLEAR_LINE);
557	532	}
558	533
559	534	static const ymf278b_interface ymf278b_config =
r4679	r4680
564	539	static MACHINE_DRIVER_START( psikyo3v1 )
565	540	/* basic machine hardware */
566	541	MDRV_CPU_ADD("maincpu", SH2, MASTER_CLOCK/2)
567		MDRV_CPU_PROGRAM_MAP(ps3v1_readmem,ps3v1_writemem)
	542	MDRV_CPU_PROGRAM_MAP(ps3v1_map,0)
568	543	MDRV_CPU_VBLANK_INT("screen", psikyosh_interrupt)
569	544
570	545	MDRV_NVRAM_HANDLER(93C56)
r4679	r4680
600	575	MDRV_IMPORT_FROM(psikyo3v1)
601	576
602	577	MDRV_CPU_MODIFY("maincpu")
603		MDRV_CPU_PROGRAM_MAP(ps5_readmem,ps5_writemem)
	578	MDRV_CPU_PROGRAM_MAP(ps5_map,0)
604	579	MACHINE_DRIVER_END
605	580
606	581	static MACHINE_DRIVER_START( psikyo5_240 )
r4679	r4680
608	583	MDRV_IMPORT_FROM(psikyo3v1)
609	584
610	585	MDRV_CPU_MODIFY("maincpu")
611		MDRV_CPU_PROGRAM_MAP(ps5_readmem,ps5_writemem)
	586	MDRV_CPU_PROGRAM_MAP(ps5_map,0)
612	587
613	588	/* It probably has a register to change visarea */
614	589	MDRV_SCREEN_MODIFY("screen")
r4679	r4680
1098	1073
1099	1074	static DRIVER_INIT( soldivid )
1100	1075	{
1101		sh2drc_set_options(machine->cpu[0], SH2DRC_FASTEST_OPTIONS);
1102		use_factory_eeprom=eeprom_0;
	1076	sh2drc_set_options(cputag_get_cpu(machine, "maincpu"), SH2DRC_FASTEST_OPTIONS);
	1077	use_factory_eeprom = eeprom_0;
1103	1078	}
1104	1079
1105	1080	static DRIVER_INIT( s1945ii )
1106	1081	{
1107		sh2drc_set_options(machine->cpu[0], SH2DRC_FASTEST_OPTIONS);
1108		use_factory_eeprom=eeprom_DEFAULT;
	1082	sh2drc_set_options(cputag_get_cpu(machine, "maincpu"), SH2DRC_FASTEST_OPTIONS);
	1083	use_factory_eeprom = eeprom_DEFAULT;
1109	1084	}
1110	1085
1111	1086	static DRIVER_INIT( daraku )
1112	1087	{
1113	1088	UINT8 *RAM = memory_region(machine, "maincpu");
1114		memory_set_bankptr(machine, 1,&RAM[0x100000]);
1115		sh2drc_set_options(machine->cpu[0], SH2DRC_FASTEST_OPTIONS);
1116		use_factory_eeprom=eeprom_DARAKU;
	1089	memory_set_bankptr(machine, 1, &RAM[0x100000]);
	1090	sh2drc_set_options(cputag_get_cpu(machine, "maincpu"), SH2DRC_FASTEST_OPTIONS);
	1091	use_factory_eeprom = eeprom_DARAKU;
1117	1092	}
1118	1093
1119	1094	static DRIVER_INIT( sbomberb )
1120	1095	{
1121		sh2drc_set_options(machine->cpu[0], SH2DRC_FASTEST_OPTIONS);
1122		use_factory_eeprom=eeprom_DEFAULT;
	1096	sh2drc_set_options(cputag_get_cpu(machine, "maincpu"), SH2DRC_FASTEST_OPTIONS);
	1097	use_factory_eeprom = eeprom_DEFAULT;
1123	1098	}
1124	1099
1125	1100	static DRIVER_INIT( gunbird2 )
1126	1101	{
1127	1102	UINT8 *RAM = memory_region(machine, "maincpu");
1128		memory_set_bankptr(machine, 1,&RAM[0x100000]);
1129		sh2drc_set_options(machine->cpu[0], SH2DRC_FASTEST_OPTIONS);
1130		use_factory_eeprom=eeprom_DEFAULT;
	1103	memory_set_bankptr(machine, 1, &RAM[0x100000]);
	1104	sh2drc_set_options(cputag_get_cpu(machine, "maincpu"), SH2DRC_FASTEST_OPTIONS);
	1105	use_factory_eeprom = eeprom_DEFAULT;
1131	1106	}
1132	1107
1133	1108	static DRIVER_INIT( s1945iii )
1134	1109	{
1135	1110	UINT8 *RAM = memory_region(machine, "maincpu");
1136		memory_set_bankptr(machine, 1,&RAM[0x100000]);
1137		sh2drc_set_options(machine->cpu[0], SH2DRC_FASTEST_OPTIONS);
1138		use_factory_eeprom=eeprom_S1945III;
	1111	memory_set_bankptr(machine, 1, &RAM[0x100000]);
	1112	sh2drc_set_options(cputag_get_cpu(machine, "maincpu"), SH2DRC_FASTEST_OPTIONS);
	1113	use_factory_eeprom = eeprom_S1945III;
1139	1114	}
1140	1115
1141	1116	static DRIVER_INIT( dragnblz )
1142	1117	{
1143		sh2drc_set_options(machine->cpu[0], SH2DRC_FASTEST_OPTIONS);
1144		use_factory_eeprom=eeprom_DRAGNBLZ;
	1118	sh2drc_set_options(cputag_get_cpu(machine, "maincpu"), SH2DRC_FASTEST_OPTIONS);
	1119	use_factory_eeprom = eeprom_DRAGNBLZ;
1145	1120	}
1146	1121
1147	1122	static DRIVER_INIT( gnbarich )
1148	1123	{
1149		sh2drc_set_options(machine->cpu[0], SH2DRC_FASTEST_OPTIONS);
1150		use_factory_eeprom=eeprom_GNBARICH;
	1124	sh2drc_set_options(cputag_get_cpu(machine, "maincpu"), SH2DRC_FASTEST_OPTIONS);
	1125	use_factory_eeprom = eeprom_GNBARICH;
1151	1126	}
1152	1127
1153	1128	static DRIVER_INIT( tgm2 )
1154	1129	{
1155		sh2drc_set_options(machine->cpu[0], SH2DRC_FASTEST_OPTIONS);
1156		use_factory_eeprom=eeprom_USER1;
	1130	sh2drc_set_options(cputag_get_cpu(machine, "maincpu"), SH2DRC_FASTEST_OPTIONS);
	1131	use_factory_eeprom = eeprom_USER1;
1157	1132	}
1158	1133
1159	1134	static DRIVER_INIT( mjgtaste )
1160	1135	{
1161		sh2drc_set_options(machine->cpu[0], SH2DRC_FASTEST_OPTIONS);
1162		use_factory_eeprom=eeprom_MJGTASTE;
	1136	sh2drc_set_options(cputag_get_cpu(machine, "maincpu"), SH2DRC_FASTEST_OPTIONS);
	1137	use_factory_eeprom = eeprom_MJGTASTE;
1163	1138	/* needs to install mahjong controls too (can select joystick in test mode tho) */
1164	1139	}
1165	1140

src/mame/drivers/boogwing.c

r4679	r4680
137	137	AM_RANGE(0x120000, 0x120001) AM_DEVREADWRITE("oki1", okim6295_r, okim6295_w)
138	138	AM_RANGE(0x130000, 0x130001) AM_DEVREADWRITE("oki2", okim6295_r, okim6295_w)
139	139	AM_RANGE(0x140000, 0x140001) AM_READ(soundlatch_r)
140		AM_RANGE(0x1f0000, 0x1f1fff) AM_READWRITE(SMH_BANK8, SMH_BANK8)
	140	AM_RANGE(0x1f0000, 0x1f1fff) AM_READWRITE(SMH_BANK(8), SMH_BANK(8))
141	141	AM_RANGE(0x1fec00, 0x1fec01) AM_WRITE(h6280_timer_w)
142	142	AM_RANGE(0x1ff400, 0x1ff403) AM_WRITE(h6280_irq_status_w)
143	143	ADDRESS_MAP_END
r4679	r4680
279	279
280	280	static void sound_irq(const device_config *device, int state)
281	281	{
282		cpu_set_input_line(device->machine->cpu[1],1,state); /* IRQ 2 */
	282	cputag_set_input_line(device->machine, "audiocpu", 1, state); /* IRQ 2 */
283	283	}
284	284
285	285	static WRITE8_DEVICE_HANDLER( sound_bankswitch_w )

src/mame/drivers/quizdna.c

r4679	r4680
41	41
42	42	/****************************************************************************/
43	43
44		static ADDRESS_MAP_START( quizdna_readmem, ADDRESS_SPACE_PROGRAM, 8 )
45		AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM)
46		AM_RANGE(0x8000, 0xbfff) AM_READ(SMH_BANK1)
47		AM_RANGE(0xc000, 0xffff) AM_READ(SMH_RAM)
48		ADDRESS_MAP_END
49
50		static ADDRESS_MAP_START( quizdna_writemem, ADDRESS_SPACE_PROGRAM, 8 )
51		AM_RANGE(0x0000, 0x7fff) AM_WRITE(SMH_ROM)
	44	static ADDRESS_MAP_START( quizdna_map, ADDRESS_SPACE_PROGRAM, 8 )
	45	AM_RANGE(0x0000, 0x7fff) AM_ROM
	46	AM_RANGE(0x8000, 0xbfff) AM_ROMBANK(1)
52	47	AM_RANGE(0x8000, 0x9fff) AM_WRITE(quizdna_fg_ram_w)
53	48	AM_RANGE(0xa000, 0xbfff) AM_WRITE(quizdna_bg_ram_w)
54		AM_RANGE(0xc000, 0xdfff) AM_WRITE(SMH_RAM)
55		AM_RANGE(0xe000, 0xe1ff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
56		AM_RANGE(0xe200, 0xefff) AM_WRITE(SMH_RAM)
57		AM_RANGE(0xf000, 0xffff) AM_WRITE(paletteram_xBGR_RRRR_GGGG_BBBB_w) AM_BASE(&paletteram)
	49	AM_RANGE(0xc000, 0xdfff) AM_RAM
	50	AM_RANGE(0xe000, 0xe1ff) AM_RAM AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
	51	AM_RANGE(0xe200, 0xefff) AM_RAM
	52	AM_RANGE(0xf000, 0xffff) AM_RAM_WRITE(paletteram_xBGR_RRRR_GGGG_BBBB_w) AM_BASE(&paletteram)
58	53	ADDRESS_MAP_END
59	54
60		static ADDRESS_MAP_START( gekiretu_writemem, ADDRESS_SPACE_PROGRAM, 8 )
61		AM_RANGE(0x0000, 0x7fff) AM_WRITE(SMH_ROM)
	55	static ADDRESS_MAP_START( gekiretu_map, ADDRESS_SPACE_PROGRAM, 8 )
	56	AM_RANGE(0x0000, 0x7fff) AM_ROM
	57	AM_RANGE(0x8000, 0xbfff) AM_ROMBANK(1)
62	58	AM_RANGE(0x8000, 0x9fff) AM_WRITE(quizdna_fg_ram_w)
63	59	AM_RANGE(0xa000, 0xbfff) AM_WRITE(quizdna_bg_ram_w)
64		AM_RANGE(0xc000, 0xdfff) AM_WRITE(SMH_RAM)
65		AM_RANGE(0xe000, 0xefff) AM_WRITE(paletteram_xBGR_RRRR_GGGG_BBBB_w) AM_BASE(&paletteram)
66		AM_RANGE(0xf000, 0xf1ff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
67		AM_RANGE(0xf200, 0xffff) AM_WRITE(SMH_RAM)
	60	AM_RANGE(0xc000, 0xdfff) AM_RAM
	61	AM_RANGE(0xe000, 0xefff) AM_RAM_WRITE(paletteram_xBGR_RRRR_GGGG_BBBB_w) AM_BASE(&paletteram)
	62	AM_RANGE(0xf000, 0xf1ff) AM_RAM AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
	63	AM_RANGE(0xf200, 0xffff) AM_RAM
68	64	ADDRESS_MAP_END
69	65
70	66	static ADDRESS_MAP_START( quizdna_io_map, ADDRESS_SPACE_IO, 8 )
r4679	r4680
460	456
461	457	/* basic machine hardware */
462	458	MDRV_CPU_ADD("maincpu", Z80, MCLK/2) /* 8.000 MHz */
463		MDRV_CPU_PROGRAM_MAP(quizdna_readmem,quizdna_writemem)
	459	MDRV_CPU_PROGRAM_MAP(quizdna_map,0)
464	460	MDRV_CPU_IO_MAP(quizdna_io_map,0)
465	461	MDRV_CPU_VBLANK_INT("screen", irq0_line_hold)
466	462
r4679	r4680
509	505	MDRV_IMPORT_FROM(quizdna)
510	506
511	507	MDRV_CPU_MODIFY("maincpu")
512		MDRV_CPU_PROGRAM_MAP(quizdna_readmem,gekiretu_writemem)
	508	MDRV_CPU_PROGRAM_MAP(gekiretu_map,0)
513	509	MDRV_CPU_IO_MAP(gekiretu_io_map,0)
514	510
515	511	MACHINE_DRIVER_END

src/mame/drivers/supertnk.c

r4679	r4680
159	159
160	160	static WRITE8_HANDLER( supertnk_interrupt_ack_w )
161	161	{
162		cpu_set_input_line(space->machine->cpu[0], 0, CLEAR_LINE);
	162	cputag_set_input_line(space->machine, "maincpu", 0, CLEAR_LINE);
163	163	}
164	164
165	165
r4679	r4680
172	172
173	173	static VIDEO_START( supertnk )
174	174	{
175		supertnk_videoram[0] = auto_malloc(supertnk_videoram_size);
176		supertnk_videoram[1] = auto_malloc(supertnk_videoram_size);
177		supertnk_videoram[2] = auto_malloc(supertnk_videoram_size);
	175	supertnk_videoram[0] = auto_alloc_array(machine, UINT8, supertnk_videoram_size);
	176	supertnk_videoram[1] = auto_alloc_array(machine, UINT8, supertnk_videoram_size);
	177	supertnk_videoram[2] = auto_alloc_array(machine, UINT8, supertnk_videoram_size);
178	178	}
179	179
180	180
r4679	r4680
274	274
275	275	static MACHINE_RESET( supertnk )
276	276	{
277		const address_space *space = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM);
	277	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
278	278	supertnk_bankswitch_0_w(space, 0, 0);
279	279	supertnk_bankswitch_1_w(space, 0, 0);
280	280

src/mame/drivers/darkhors.c

r4679	r4680
297	297	//  if (ACCESSING_BITS_16_31)    popmessage("%04X",data >> 16);
298	298	}
299	299
300		static ADDRESS_MAP_START( darkhors_readmem, ADDRESS_SPACE_PROGRAM, 32 )
301		AM_RANGE(0x000000, 0x0fffff) AM_READ( SMH_ROM               )
302		AM_RANGE(0x400000, 0x41ffff) AM_READ( SMH_RAM               )
303		AM_RANGE(0x4e0080, 0x4e0083) AM_READ_PORT("4e0080")
	300	static ADDRESS_MAP_START( darkhors_map, ADDRESS_SPACE_PROGRAM, 32 )
	301	AM_RANGE(0x000000, 0x0fffff) AM_ROM
	302	AM_RANGE(0x400000, 0x41ffff) AM_RAM
	303
	304	AM_RANGE(0x490040, 0x490043) AM_WRITE(darkhors_eeprom_w)
	305	AM_RANGE(0x4e0080, 0x4e0083) AM_READ_PORT("4e0080") AM_WRITE(darkhors_unk1_w)
	306
304	307	AM_RANGE(0x580000, 0x580003) AM_READ_PORT("580000")
305	308	AM_RANGE(0x580004, 0x580007) AM_READ_PORT("580004")
306		AM_RANGE(0x580008, 0x58000b) AM_READ( darkhors_input_sel_r      )
307		AM_RANGE(0x580084, 0x580087) AM_DEVREAD8( "oki", okim6295_r, 0xff000000   )
308		AM_RANGE(0x580200, 0x580203) AM_READ( SMH_NOP               )
	309	AM_RANGE(0x580008, 0x58000b) AM_READ(darkhors_input_sel_r)
	310	AM_RANGE(0x58000c, 0x58000f) AM_WRITE(darkhors_input_sel_w)
	311	AM_RANGE(0x580084, 0x580087) AM_DEVREADWRITE8( "oki", okim6295_r, okim6295_w, 0xff000000)
	312	AM_RANGE(0x580200, 0x580203) AM_READ(SMH_NOP)
309	313	AM_RANGE(0x580400, 0x580403) AM_READ_PORT("580400")
310	314	AM_RANGE(0x580420, 0x580423) AM_READ_PORT("580420")
311		AM_RANGE(0x800000, 0x87ffff) AM_READ( SMH_RAM               )
312		ADDRESS_MAP_END
313	315
314		static ADDRESS_MAP_START( darkhors_writemem, ADDRESS_SPACE_PROGRAM, 32 )
315		AM_RANGE(0x000000, 0x0fffff) AM_WRITE( SMH_ROM            )
316		AM_RANGE(0x400000, 0x41ffff) AM_WRITE( SMH_RAM            )
317		AM_RANGE(0x490040, 0x490043) AM_WRITE( darkhors_eeprom_w      )
318		AM_RANGE(0x58000c, 0x58000f) AM_WRITE( darkhors_input_sel_w      )
319		AM_RANGE(0x4e0080, 0x4e0083) AM_WRITE( darkhors_unk1_w         )
320		AM_RANGE(0x580084, 0x580087) AM_DEVWRITE8( "oki", okim6295_w, 0xff000000   )
321		AM_RANGE(0x800000, 0x86bfff) AM_WRITE( SMH_RAM            )
322		AM_RANGE(0x86c000, 0x86ffff) AM_WRITE( darkhors_tmapram_w      )   AM_BASE(&darkhors_tmapram)
323		AM_RANGE(0x870000, 0x873fff) AM_WRITE( darkhors_tmapram2_w      )   AM_BASE(&darkhors_tmapram2)
324		AM_RANGE(0x874000, 0x87dfff) AM_WRITE( SMH_RAM            )
325		AM_RANGE(0x87e000, 0x87ffff) AM_WRITE( SMH_RAM            )   AM_BASE(&spriteram32)
326		AM_RANGE(0x880000, 0x89ffff) AM_WRITE( paletteram32_xBBBBBGGGGGRRRRR_dword_w)   AM_BASE(&paletteram32)
327		AM_RANGE(0x8a0000, 0x8bffff) AM_WRITE( SMH_RAM            )   // this should still be palette ram!
328		AM_RANGE(0x8c0120, 0x8c012f) AM_WRITE( SMH_RAM            ) AM_BASE(&darkhors_tmapscroll)
329		AM_RANGE(0x8c0130, 0x8c013f) AM_WRITE( SMH_RAM            ) AM_BASE(&darkhors_tmapscroll2)
	316	AM_RANGE(0x800000, 0x86bfff) AM_RAM
	317	AM_RANGE(0x86c000, 0x86ffff) AM_RAM_WRITE(darkhors_tmapram_w) AM_BASE(&darkhors_tmapram)
	318	AM_RANGE(0x870000, 0x873fff) AM_RAM_WRITE(darkhors_tmapram2_w) AM_BASE(&darkhors_tmapram2)
	319	AM_RANGE(0x874000, 0x87dfff) AM_RAM
	320	AM_RANGE(0x87e000, 0x87ffff) AM_RAM AM_BASE(&spriteram32)
	321	AM_RANGE(0x880000, 0x89ffff) AM_WRITE(paletteram32_xBBBBBGGGGGRRRRR_dword_w) AM_BASE(&paletteram32)
	322	AM_RANGE(0x8a0000, 0x8bffff) AM_WRITE(SMH_RAM)   // this should still be palette ram!
	323	AM_RANGE(0x8c0120, 0x8c012f) AM_WRITE(SMH_RAM) AM_BASE(&darkhors_tmapscroll)
	324	AM_RANGE(0x8c0130, 0x8c013f) AM_WRITE(SMH_RAM) AM_BASE(&darkhors_tmapscroll2)
330	325	ADDRESS_MAP_END
331	326
332	327
r4679	r4680
584	579
585	580	static MACHINE_DRIVER_START( darkhors )
586	581	MDRV_CPU_ADD("maincpu", M68EC020, 12000000) // 36MHz/3 ??
587		MDRV_CPU_PROGRAM_MAP(darkhors_readmem,darkhors_writemem)
	582	MDRV_CPU_PROGRAM_MAP(darkhors_map,0)
588	583	MDRV_CPU_VBLANK_INT_HACK(darkhors,3)
589	584
590	585	MDRV_NVRAM_HANDLER(darkhors)

src/mame/drivers/bishjan.c

r4679	r4680
213	213	tilemap_set_scrolldy( tmap_1, -1, +1 );
214	214	tilemap_set_scrolldy( tmap_2, -1, +1 );
215	215
216		bishjan_videoram_1_lo = auto_malloc(0x80 * 0x40);
217		bishjan_videoram_1_hi = auto_malloc(0x80 * 0x40);
	216	bishjan_videoram_1_lo = auto_alloc_array(machine, UINT8, 0x80 * 0x40);
	217	bishjan_videoram_1_hi = auto_alloc_array(machine, UINT8, 0x80 * 0x40);
218	218
219		bishjan_videoram_2_lo = auto_malloc(0x80 * 0x40);
220		bishjan_videoram_2_hi = auto_malloc(0x80 * 0x40);
	219	bishjan_videoram_2_lo = auto_alloc_array(machine, UINT8, 0x80 * 0x40);
	220	bishjan_videoram_2_hi = auto_alloc_array(machine, UINT8, 0x80 * 0x40);
221	221
222		bishjan_scrollram_1_lo = auto_malloc(0x200);
223		bishjan_scrollram_1_hi = auto_malloc(0x200);
	222	bishjan_scrollram_1_lo = auto_alloc_array(machine, UINT8, 0x200);
	223	bishjan_scrollram_1_hi = auto_alloc_array(machine, UINT8, 0x200);
224	224
225		bishjan_scrollram_2_lo = auto_malloc(0x200);
226		bishjan_scrollram_2_hi = auto_malloc(0x200);
	225	bishjan_scrollram_2_lo = auto_alloc_array(machine, UINT8, 0x200);
	226	bishjan_scrollram_2_hi = auto_alloc_array(machine, UINT8, 0x200);
227	227
228		bishjan_videoram_2_hi = auto_malloc(0x80 * 0x40);
	228	bishjan_videoram_2_hi = auto_alloc_array(machine, UINT8, 0x80 * 0x40);
229	229
230		colorram = auto_malloc(256*3);
	230	colorram = auto_alloc_array(machine, UINT8, 256*3);
231	231	}
232	232
233	233	static VIDEO_UPDATE( bishjan )
r4679	r4680
818	818	generic_pulse_irq_line(device, 0);
819	819	break;
820	820	default:
821		cpu_set_input_line(device->machine->cpu[0], H8_METRO_TIMER_HACK, HOLD_LINE);
	821	cputag_set_input_line(device->machine, "maincpu", H8_METRO_TIMER_HACK, HOLD_LINE);
822	822	break;
823	823	}
824	824	}

src/mame/drivers/offtwall.c

r4679	r4680
33	33
34	34	static void update_interrupts(running_machine *machine)
35	35	{
36		cpu_set_input_line(machine->cpu[0], 4, atarigen_scanline_int_state ? ASSERT_LINE : CLEAR_LINE);
37		cpu_set_input_line(machine->cpu[0], 6, atarigen_sound_int_state ? ASSERT_LINE : CLEAR_LINE);
	36	cputag_set_input_line(machine, "maincpu", 4, atarigen_scanline_int_state ? ASSERT_LINE : CLEAR_LINE);
	37	cputag_set_input_line(machine, "maincpu", 6, atarigen_sound_int_state ? ASSERT_LINE : CLEAR_LINE);
38	38	}
39	39
40	40
r4679	r4680
94	94	if (ACCESSING_BITS_0_7)
95	95	{
96	96	/* bit 4 resets the sound CPU */
97		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_RESET, (data & 0x10) ? CLEAR_LINE : ASSERT_LINE);
	97	cputag_set_input_line(space->machine, "jsa", INPUT_LINE_RESET, (data & 0x10) ? CLEAR_LINE : ASSERT_LINE);
98	98	if (!(data & 0x10)) atarijsa_reset();
99	99	}
100	100
r4679	r4680
495	495	atarijsa_init(machine, "260010", 0x0040);
496	496
497	497	/* install son-of-slapstic workarounds */
498		spritecache_count = memory_install_read16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x3fde42, 0x3fde43, 0, 0, spritecache_count_r);
499		bankswitch_base = memory_install_read16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x037ec2, 0x037f39, 0, 0, bankswitch_r);
500		unknown_verify_base = memory_install_read16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x3fdf1e, 0x3fdf1f, 0, 0, unknown_verify_r);
	498	spritecache_count = memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x3fde42, 0x3fde43, 0, 0, spritecache_count_r);
	499	bankswitch_base = memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x037ec2, 0x037f39, 0, 0, bankswitch_r);
	500	unknown_verify_base = memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x3fdf1e, 0x3fdf1f, 0, 0, unknown_verify_r);
501	501	}
502	502
503	503
r4679	r4680
507	507	atarijsa_init(machine, "260010", 0x0040);
508	508
509	509	/* install son-of-slapstic workarounds */
510		spritecache_count = memory_install_read16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x3fde42, 0x3fde43, 0, 0, spritecache_count_r);
511		bankswitch_base = memory_install_read16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x037eca, 0x037f43, 0, 0, bankswitch_r);
512		unknown_verify_base = memory_install_read16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x3fdf24, 0x3fdf25, 0, 0, unknown_verify_r);
	510	spritecache_count = memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x3fde42, 0x3fde43, 0, 0, spritecache_count_r);
	511	bankswitch_base = memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x037eca, 0x037f43, 0, 0, bankswitch_r);
	512	unknown_verify_base = memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x3fdf24, 0x3fdf25, 0, 0, unknown_verify_r);
513	513	}
514	514
515	515

src/mame/drivers/upscope.c

r4679	r4680
89	89	/* swap the write handlers between ROM and bank 1 based on the bit */
90	90	if ((data & 1) == 0)
91	91	/* overlay disabled, map RAM on 0x000000 */
92		memory_install_write16_handler(cpu_get_address_space(device->machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x000000, 0x07ffff, 0, 0, SMH_BANK1);
	92	memory_install_write16_handler(cputag_get_address_space(device->machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x000000, 0x07ffff, 0, 0, (write16_space_func)SMH_BANK(1));
93	93
94	94	else
95	95	/* overlay enabled, map Amiga system ROM on 0x000000 */
96		memory_install_write16_handler(cpu_get_address_space(device->machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x000000, 0x07ffff, 0, 0, SMH_UNMAP);
	96	memory_install_write16_handler(cputag_get_address_space(device->machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x000000, 0x07ffff, 0, 0, (write16_space_func)SMH_UNMAP);
97	97	}
98	98
99	99
r4679	r4680
388	388
389	389	/* allocate NVRAM */
390	390	generic_nvram_size = 0x100;
391		generic_nvram = auto_malloc(generic_nvram_size);
	391	generic_nvram = auto_alloc_array(machine, UINT8, generic_nvram_size);
392	392
393	393	/* set up memory */
394	394	memory_configure_bank(machine, 1, 0, 1, amiga_chip_ram, 0);

src/mame/drivers/esh.c

r4679	r4680
130	130	static WRITE8_HANDLER(nmi_line_w)
131	131	{
132	132	if (data == 0x00)
133		cpu_set_input_line(space->machine->cpu[0], INPUT_LINE_NMI, ASSERT_LINE);
	133	cputag_set_input_line(space->machine, "maincpu", INPUT_LINE_NMI, ASSERT_LINE);
134	134	if (data == 0x01)
135		cpu_set_input_line(space->machine->cpu[0], INPUT_LINE_NMI, CLEAR_LINE);
	135	cputag_set_input_line(space->machine, "maincpu", INPUT_LINE_NMI, CLEAR_LINE);
136	136
137	137	if (data != 0x00 && data != 0x01)
138	138	logerror("NMI line got a weird value!\n");
r4679	r4680
260	260
261	261	static TIMER_CALLBACK( irq_stop )
262	262	{
263		cpu_set_input_line(machine->cpu[0], 0, CLEAR_LINE);
	263	cputag_set_input_line(machine, "maincpu", 0, CLEAR_LINE);
264	264	}
265	265
266	266	static INTERRUPT_GEN( vblank_callback_esh )

src/mame/drivers/equites.c

r4679	r4680
410	410
411	411	static TIMER_CALLBACK( equites_nmi_callback )
412	412	{
413		cpu_set_input_line(machine->cpu[1], INPUT_LINE_NMI, ASSERT_LINE);
	413	cputag_set_input_line(machine, "audiocpu", INPUT_LINE_NMI, ASSERT_LINE);
414	414	}
415	415
416	416
r4679	r4680
443	443	switch (offset)
444	444	{
445	445	case 0:   // c0f8: NMI ack (written by NMI handler)
446		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_NMI, CLEAR_LINE);
	446	cputag_set_input_line(space->machine, "audiocpu", INPUT_LINE_NMI, CLEAR_LINE);
447	447	break;
448	448
449	449	case 1: // c0f9: RST75 trigger (written by NMI handler)
450	450	// Note: solder pad CP3 on the pcb would allow to disable this
451		generic_pulse_irq_line(space->machine->cpu[1], I8085_RST75_LINE);
	451	generic_pulse_irq_line(cputag_get_cpu(space->machine, "audiocpu"), I8085_RST75_LINE);
452	452	break;
453	453
454	454	case 2: // c0fa: INTR trigger (written by NMI handler)
455	455	// verified on PCB:
456		cpu_set_input_line(space->machine->cpu[1], I8085_INTR_LINE, HOLD_LINE);
	456	cputag_set_input_line(space->machine, "audiocpu", I8085_INTR_LINE, HOLD_LINE);
457	457	break;
458	458
459	459	case 3: // c0fb: n.c.
r4679	r4680
700	700
701	701	static WRITE16_HANDLER( mcu_halt_assert_w )
702	702	{
703		cpu_set_input_line(space->machine->cpu[2], INPUT_LINE_HALT, ASSERT_LINE);
	703	cputag_set_input_line(space->machine, "mcu", INPUT_LINE_HALT, ASSERT_LINE);
704	704	}
705	705
706	706	static WRITE16_HANDLER( mcu_halt_clear_w )
707	707	{
708		cpu_set_input_line(space->machine->cpu[2], INPUT_LINE_HALT, CLEAR_LINE);
	708	cputag_set_input_line(space->machine, "mcu", INPUT_LINE_HALT, CLEAR_LINE);
709	709	}
710	710
711	711
r4679	r4680
1848	1848	unpack_region(machine, "gfx3");
1849	1849
1850	1850	// install special handlers for unknown device (protection?)
1851		memory_install_write16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x580000, 0x580001, 0, 0, gekisou_unknown_0_w);
1852		memory_install_write16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x5a0000, 0x5a0001, 0, 0, gekisou_unknown_1_w);
	1851	memory_install_write16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x580000, 0x580001, 0, 0, gekisou_unknown_0_w);
	1852	memory_install_write16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x5a0000, 0x5a0001, 0, 0, gekisou_unknown_1_w);
1853	1853	}
1854	1854
1855	1855	static DRIVER_INIT( splndrbt )
r4679	r4680
1862	1862	unpack_region(machine, "gfx3");
1863	1863
1864	1864	#if HVOLTAGE_DEBUG
1865		memory_install_read16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x000038, 0x000039, 0, 0, hvoltage_debug_r);
	1865	memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x000038, 0x000039, 0, 0, hvoltage_debug_r);
1866	1866	#endif
1867	1867	}
1868	1868
r4679	r4680
1881	1881	// Splendor Blast Hardware
1882	1882	GAME( 1985, splndrbt, 0,        splndrbt, splndrbt, splndrbt, ROT0,  "Alpha Denshi Co.", "Splendor Blast", GAME_IMPERFECT_SOUND | GAME_IMPERFECT_GRAPHICS )
1883	1883	GAME( 1985, hvoltage, 0,        splndrbt, hvoltage, hvoltage, ROT0,  "Alpha Denshi Co.", "High Voltage", GAME_IMPERFECT_SOUND | GAME_IMPERFECT_GRAPHICS )
1884
1885		/******************************************************************************/

src/mame/drivers/neodrvr.c

r4679	r4680
7482	7482	neogeo_fixed_layer_bank_type = 2;
7483	7483	DRIVER_INIT_CALL(neogeo);
7484	7484	install_pvc_protection(machine);
7485		memory_install_read16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xc00000, 0xc7ffff, 0, 0, SMH_BANK6 );  // 512k bios
	7485	memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xc00000, 0xc7ffff, 0, 0, (read16_space_func)SMH_BANK(6) );  // 512k bios
7486	7486	}
7487	7487
7488	7488	static DRIVER_INIT( kof2003 )
r4679	r4680
7555	7555	kof2000_neogeo_gfx_decrypt(machine, 0xac);
7556	7556
7557	7557	/* install some extra RAM */
7558		extra_ram = auto_malloc(0x2000);
	7558	extra_ram = auto_alloc_array(machine, UINT16, 0x2000/2);
7559	7559	state_save_register_global_pointer(machine, extra_ram, 0x2000 / 2);
7560	7560
7561		memory_install_readwrite16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x200000, 0x201fff, 0, 0, SMH_BANK8, SMH_BANK8);
	7561	memory_install_readwrite16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x200000, 0x201fff, 0, 0, (read16_space_func)SMH_BANK(8), (write16_space_func)SMH_BANK(8));
7562	7562	memory_set_bankptr(machine, NEOGEO_BANK_EXTRA_RAM, extra_ram);
7563	7563
7564		//  memory_install_read_port_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x280000, 0x280001, 0, 0, "IN5");
7565		//  memory_install_read_port_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x2c0000, 0x2c0001, 0, 0, "IN6");
	7564	//  memory_install_read_port_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x280000, 0x280001, 0, 0, "IN5");
	7565	//  memory_install_read_port_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x2c0000, 0x2c0001, 0, 0, "IN6");
7566	7566
7567	7567	DRIVER_INIT_CALL(neogeo);
7568	7568	}
r4679	r4680
7572	7572	UINT16* extra_ram;
7573	7573
7574	7574	/* install some extra RAM */
7575		extra_ram = auto_malloc(0x2000);
	7575	extra_ram = auto_alloc_array(machine, UINT16, 0x2000/2);
7576	7576	state_save_register_global_pointer(machine, extra_ram, 0x2000 / 2);
7577	7577
7578		memory_install_readwrite16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x200000, 0x201fff, 0, 0, SMH_BANK8, SMH_BANK8);
	7578	memory_install_readwrite16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x200000, 0x201fff, 0, 0, (read16_space_func)SMH_BANK(8), (write16_space_func)SMH_BANK(8));
7579	7579	memory_set_bankptr(machine, NEOGEO_BANK_EXTRA_RAM, extra_ram);
7580	7580
7581		memory_install_read_port_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x280000, 0x280001, 0, 0, "IN5");
7582		memory_install_read_port_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x2c0000, 0x2c0001, 0, 0, "IN6");
	7581	memory_install_read_port_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x280000, 0x280001, 0, 0, "IN5");
	7582	memory_install_read_port_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x2c0000, 0x2c0001, 0, 0, "IN6");
7583	7583
7584	7584	DRIVER_INIT_CALL(neogeo);
7585	7585	}
r4679	r4680
7587	7587	static DRIVER_INIT( kog )
7588	7588	{
7589	7589	/* overlay cartridge ROM */
7590		memory_install_read_port_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x0ffffe, 0x0fffff, 0, 0, "JUMPER");
	7590	memory_install_read_port_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x0ffffe, 0x0fffff, 0, 0, "JUMPER");
7591	7591
7592	7592	kog_px_decrypt(machine);
7593	7593	neogeo_bootleg_sx_decrypt(machine, 1);
r4679	r4680
7715	7715	GAME( 2000, kof2000,  neogeo,   neogeo,   neogeo,   kof2000,  ROT0, "SNK", "The King of Fighters 2000" , 0 ) /* Encrypted Code & GFX */
7716	7716	GAME( 2000, kof2000n, kof2000,  neogeo,   neogeo,   kof2000n, ROT0, "SNK", "The King of Fighters 2000 (not encrypted)" , 0 ) /* Encrypted GFX */
7717	7717	GAME( 2001, zupapa,   neogeo,   neogeo,   neogeo,   zupapa,   ROT0, "SNK", "Zupapa!" , 0 )   /* Encrypted GFX */
7718		GAME( 2001, sengoku3, neogeo,   neogeo,   neogeo,   sengoku3, ROT0, "Noise Factory / SNK", "Sengoku 3" , 0 )   /* Encrypted GFX */
	7718	GAME( 2001, sengoku3, neogeo,   neogeo,   neogeo,   sengoku3, ROT0, "Noise Factory / SNK", "Sengoku 3 / Sengoku Densho 2001" , 0 )   /* Encrypted GFX */
7719	7719	GAME( 2001, kof2001,  neogeo,   neogeo,   neogeo,   kof2001,  ROT0, "Eolith / SNK", "The King of Fighters 2001 (set 1)" , 0 ) /* Encrypted GFX */
7720	7720	GAME( 2001, kof2001h, kof2001,  neogeo,   neogeo,   kof2001,  ROT0, "Eolith / SNK", "The King of Fighters 2001 (set 2)" , 0 ) /* Encrypted GFX */
7721	7721	GAME( 2003, cthd2003, kof2001,  neogeo,   neogeo,   cthd2003, ROT0, "bootleg", "Crouching Tiger Hidden Dragon 2003 (The King of Fighters 2001 bootleg)", 0 ) /* Protected Hack / Bootleg of kof2001 */
r4679	r4680
7781	7781	GAME( 1996, twinspri, neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "ADK",              "Twinkle Star Sprites", 0 )
7782	7782	GAME( 1996, zintrckb, neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "hack / bootleg",   "Zintrick / Oshidashi Zentrix (hack / bootleg)", 0 )
7783	7783
7784		/* Aicom */
	7784	/* Aicom (was a part of Sammy) / Yumekobo (changed name in 1996) */
	7785	GAME( 1992, viewpoin, neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "Sammy / Aicom", "Viewpoint", 0 )
7785	7786	GAME( 1994, janshin,  neogeo,   neogeo,   mjneogeo, neogeo,   ROT0, "Aicom", "Jyanshin Densetsu - Quest of Jongmaster", 0 )
7786	7787	GAME( 1995, pulstar,  neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "Aicom", "Pulstar", 0 )
	7788	GAME( 1998, blazstar, neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "Yumekobo", "Blazing Star", 0 )
	7789	GAME( 1999, preisle2, neogeo,   neogeo,   neogeo,   preisle2, ROT0, "Yumekobo", "Prehistoric Isle 2" , 0 ) /* Encrypted GFX */
7787	7790
7788	7791	/* Data East Corporation */
7789	7792	GAME( 1993, spinmast, neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "Data East Corporation", "Spin Master / Miracle Adventure", 0 )
r4679	r4680
7811	7814	GAME( 1990, minasan,  neogeo,   neogeo,   mjneogeo, neogeo,   ROT0, "Monolith Corp.", "Minnasanno Okagesamadesu", 0 )
7812	7815	GAME( 1991, bakatono, neogeo,   neogeo,   mjneogeo, neogeo,   ROT0, "Monolith Corp.", "Bakatonosama Mahjong Manyuki", 0 )
7813	7816
7814		/* Nazca */
	7817	/* Nazca (later acquired by SNK) */
7815	7818	GAME( 1996, turfmast, neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "Nazca", "Neo Turf Masters / Big Tournament Golf", 0 )
7816	7819	GAME( 1996, mslug,    neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "Nazca", "Metal Slug - Super Vehicle-001", 0 )
7817	7820
r4679	r4680
7821	7824	/* Psikyo */
7822	7825	GAME( 1999, s1945p,   neogeo,   neogeo,   neogeo,   s1945p,   ROT0, "Psikyo", "Strikers 1945 Plus" , 0 )   /* Encrypted GFX */
7823	7826
7824		/* Sammy */
7825		GAME( 1992, viewpoin, neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "Sammy", "Viewpoint", 0 )
7826
7827	7827	/* Saurus */
7828	7828	GAME( 1995, quizkof,  neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "Saurus", "Quiz King of Fighters", 0 )
7829	7829	GAME( 1995, stakwin,  neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "Saurus", "Stakes Winner / Stakes Winner - GI kinzen seihae no michi", 0 )
r4679	r4680
7856	7856	/* Tecmo */
7857	7857	GAME( 1996, tws96,    neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "Tecmo", "Tecmo World Soccer '96", 0 )
7858	7858
7859		/* Yumekobo */
7860		GAME( 1998, blazstar, neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "Yumekobo", "Blazing Star", 0 )
7861		GAME( 1999, preisle2, neogeo,   neogeo,   neogeo,   preisle2, ROT0, "Yumekobo", "Prehistoric Isle 2" , 0 ) /* Encrypted GFX */
7862
7863	7859	/* Viccom */
7864	7860	GAME( 1994, fightfev, neogeo,   neogeo,   neogeo,   neogeo,   ROT0, "Viccom", "Fight Fever (set 1)", 0 )
7865	7861	GAME( 1994, fightfeva, fightfev, neogeo,   neogeo,   neogeo,   ROT0, "Viccom", "Fight Fever (set 2)", 0 )

src/mame/drivers/mirax.c

r4679	r4680
79	79	//audio tester
80	80	if(input_code_pressed_once(KEYCODE_Q))
81	81	{
82		cpu_set_input_line(screen->machine->cpu[0], INPUT_LINE_NMI, PULSE_LINE);
	82	cputag_set_input_line(screen->machine, "maincpu", INPUT_LINE_NMI, PULSE_LINE);
83	83	}
84	84	#endif
85	85	return 0;
r4679	r4680
112	112
113	113	static WRITE8_DEVICE_HANDLER(ay_sel)
114	114	{
115		if(cpu_get_previouspc(device->machine->cpu[0])==0x309)
	115	if(cpu_get_previouspc(cputag_get_cpu(device->machine, "maincpu"))==0x309)
116	116	{
117	117	ay8910_address_w(device,0,nAyCtrl);
118	118	ay8910_data_w(device,0,nAyData);

src/mame/drivers/gradius3.c

r4679	r4680
83	83	static MACHINE_RESET( gradius3 )
84	84	{
85	85	/* start with cpu B halted */
86		cpu_set_input_line(machine->cpu[1], INPUT_LINE_RESET, ASSERT_LINE);
	86	cputag_set_input_line(machine, "sub", INPUT_LINE_RESET, ASSERT_LINE);
87	87	irqAen = 0;
88	88	irqBmask = 0;
89	89	}
r4679	r4680
102	102	gradius3_priority = data & 0x04;
103	103
104	104	/* bit 3 enables cpu B */
105		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_RESET, (data & 0x08) ? CLEAR_LINE : ASSERT_LINE);
	105	cputag_set_input_line(space->machine, "sub", INPUT_LINE_RESET, (data & 0x08) ? CLEAR_LINE : ASSERT_LINE);
106	106
107	107	/* bit 5 enables irq */
108	108	irqAen = data & 0x20;
r4679	r4680
143	143	if (irqBmask & 4)
144	144	{
145	145	logerror("%04x trigger cpu B irq 4 %02x\n",cpu_get_pc(space->cpu),data);
146		cpu_set_input_line(space->machine->cpu[1],4,HOLD_LINE);
	146	cputag_set_input_line(space->machine, "sub", 4, HOLD_LINE);
147	147	}
148	148	else
149	149	logerror("%04x MISSED cpu B irq 4 %02x\n",cpu_get_pc(space->cpu),data);
r4679	r4680
157	157
158	158	static WRITE16_HANDLER( sound_irq_w )
159	159	{
160		cpu_set_input_line_and_vector(space->machine->cpu[2],0,HOLD_LINE,0xff);
	160	cputag_set_input_line_and_vector(space->machine, "audiocpu", 0, HOLD_LINE, 0xff);
161	161	}
162	162
163	163	static WRITE8_DEVICE_HANDLER( sound_bank_w )

src/mame/drivers/omegrace.c

r4679	r4680
234	234
235	235	static MACHINE_RESET( omegrace )
236	236	{
237		const address_space *space = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM);
	237	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
238	238	/* Omega Race expects the vector processor to be ready. */
239	239	avgdvg_reset_w(space, 0, 0);
240	240	}
r4679	r4680
317	317	static WRITE8_HANDLER( omegrace_soundlatch_w )
318	318	{
319	319	soundlatch_w (space, offset, data);
320		cpu_set_input_line(space->machine->cpu[1], 0, HOLD_LINE);
	320	cputag_set_input_line(space->machine, "audiocpu", 0, HOLD_LINE);
321	321	}
322	322
323	323

src/mame/drivers/decocass.c

r4679	r4680
1048	1048	int A;
1049	1049
1050	1050	/* allocate memory and mark all RAM regions with their decrypted pointers */
1051		decrypted = auto_malloc(0x10000);
	1051	decrypted = auto_alloc_array(machine, UINT8, 0x10000);
1052	1052	memory_set_decrypted_region(space, 0x0000, 0xc7ff, &decrypted[0x0000]);
1053	1053	memory_set_decrypted_region(space, 0xd000, 0xdbff, &decrypted[0xd000]);
1054	1054	memory_set_decrypted_region(space, 0xf000, 0xffff, &decrypted[0xf000]);
r4679	r4680
1067	1067	{
1068	1068	int romlength = memory_region_length(machine, "user3");
1069	1069	UINT8 *rom = memory_region(machine, "user3");
1070		UINT8 *decrypted2 = auto_malloc(romlength);
	1070	UINT8 *decrypted2 = auto_alloc_array(machine, UINT8, romlength);
1071	1071	int i;
1072	1072
1073	1073	/* standard init */
r4679	r4680
1078	1078	decrypted2[i] = swap_bits_5_6(rom[i]);
1079	1079
1080	1080	/* convert charram to a banked ROM */
1081		memory_install_readwrite8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x6000, 0xafff, 0, 0, SMH_BANK1, decocass_de0091_w);
	1081	memory_install_readwrite8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x6000, 0xafff, 0, 0, (read8_space_func)SMH_BANK(1), decocass_de0091_w);
1082	1082	memory_configure_bank(machine, 1, 0, 1, decocass_charram, 0);
1083	1083	memory_configure_bank(machine, 1, 1, 1, memory_region(machine, "user3"), 0);
1084	1084	memory_configure_bank_decrypted(machine, 1, 0, 1, &decrypted[0x6000], 0);
r4679	r4680
1086	1086	memory_set_bank(machine, 1, 0);
1087	1087
1088	1088	/* install the bank selector */
1089		memory_install_write8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xe900, 0xe900, 0, 0, decocass_e900_w);
	1089	memory_install_write8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xe900, 0xe900, 0, 0, decocass_e900_w);
1090	1090	}
1091	1091
1092	1092

src/mame/drivers/mystwarr.c

r4679	r4680
281	281
282	282	static WRITE16_HANDLER( sound_irq_w )
283	283	{
284		cpu_set_input_line(space->machine->cpu[1], 0, HOLD_LINE);
	284	cputag_set_input_line(space->machine, "soundcpu", 0, HOLD_LINE);
285	285	}
286	286
287	287	static READ16_HANDLER( sound_status_r )
r4679	r4680
371	371
372	372	/* 68000 memory handlers */
373	373	/* Mystic Warriors */
374		static ADDRESS_MAP_START( readmem, ADDRESS_SPACE_PROGRAM, 16 )
375		AM_RANGE(0x000000, 0x1fffff) AM_READ(SMH_ROM)   // main program
376		AM_RANGE(0x200000, 0x20ffff) AM_READ(SMH_RAM)
377		AM_RANGE(0x400000, 0x40ffff) AM_READ(K053247_scattered_word_r)
	374	static ADDRESS_MAP_START( mystwarr_map, ADDRESS_SPACE_PROGRAM, 16 )
	375	AM_RANGE(0x000000, 0x1fffff) AM_ROM   // main program
	376	AM_RANGE(0x200000, 0x20ffff) AM_RAM AM_BASE(&gx_workram)
	377	AM_RANGE(0x400000, 0x40ffff) AM_READWRITE(K053247_scattered_word_r,K053247_scattered_word_w) AM_BASE(&spriteram16)
	378	AM_RANGE(0x480000, 0x4800ff) AM_WRITE(K055555_word_w)
378	379	AM_RANGE(0x482000, 0x48200f) AM_READ(K055673_rom_word_r)
	380	AM_RANGE(0x482010, 0x48201f) AM_WRITE(K053247_reg_word_w)
	381	AM_RANGE(0x484000, 0x484007) AM_WRITE(K053246_word_w)
	382	AM_RANGE(0x48a000, 0x48a01f) AM_WRITE(K054338_word_w)
	383	AM_RANGE(0x48c000, 0x48c03f) AM_WRITE(K056832_word_w)
	384	AM_RANGE(0x490000, 0x490001) AM_WRITE(mweeprom_w)
	385	AM_RANGE(0x492000, 0x492001) AM_WRITENOP   // watchdog
379	386	AM_RANGE(0x494000, 0x494001) AM_READ_PORT("P1_P2")
380	387	AM_RANGE(0x494002, 0x494003) AM_READ_PORT("P3_P4")
381	388	AM_RANGE(0x496000, 0x496001) AM_READ(mmcoins_r)
382	389	AM_RANGE(0x496002, 0x496003) AM_READ(mweeprom_r)
	390	AM_RANGE(0x49800c, 0x49800d) AM_WRITE(sound_cmd1_w)
	391	AM_RANGE(0x49800e, 0x49800f) AM_WRITE(sound_cmd2_w)
383	392	AM_RANGE(0x498014, 0x498015) AM_READ(sound_status_r)
384		AM_RANGE(0x498000, 0x49801f) AM_READ(SMH_RAM)
385		AM_RANGE(0x600000, 0x601fff) AM_READ(K056832_ram_word_r)
386		AM_RANGE(0x602000, 0x603fff) AM_READ(K056832_ram_word_r)   // tilemap RAM mirror read(essential)
	393	AM_RANGE(0x498000, 0x49801f) AM_RAM
	394	AM_RANGE(0x49a000, 0x49a001) AM_WRITE(sound_irq_w)
	395	AM_RANGE(0x49c000, 0x49c01f) AM_WRITE(K053252_word_w)
	396	AM_RANGE(0x49e000, 0x49e007) AM_WRITE(irq_ack_w)   // VSCCS (custom)
	397	AM_RANGE(0x600000, 0x601fff) AM_READWRITE(K056832_ram_word_r,K056832_ram_word_w)
	398	AM_RANGE(0x602000, 0x603fff) AM_READWRITE(K056832_ram_word_r,K056832_ram_word_w)   // tilemap RAM mirror read(essential)
387	399	AM_RANGE(0x680000, 0x683fff) AM_READ(K056832_mw_rom_word_r)
388		AM_RANGE(0x700000, 0x701fff) AM_READ(SMH_RAM)
	400	AM_RANGE(0x700000, 0x701fff) AM_RAM_WRITE(paletteram16_xrgb_word_be_w) AM_BASE(&paletteram16)
389	401	#if MW_DEBUG
390	402	AM_RANGE(0x480000, 0x4800ff) AM_READ(K055555_word_r)
391	403	AM_RANGE(0x482010, 0x48201f) AM_READ(K053247_reg_word_r)
r4679	r4680
396	408	#endif
397	409	ADDRESS_MAP_END
398	410
399		static ADDRESS_MAP_START( writemem, ADDRESS_SPACE_PROGRAM, 16 )
400		AM_RANGE(0x200000, 0x20ffff) AM_WRITE(SMH_RAM) AM_BASE(&gx_workram)
401		AM_RANGE(0x400000, 0x40ffff) AM_WRITE(K053247_scattered_word_w) AM_BASE(&spriteram16)
402		AM_RANGE(0x480000, 0x4800ff) AM_WRITE(K055555_word_w)
403		AM_RANGE(0x482010, 0x48201f) AM_WRITE(K053247_reg_word_w)
404		AM_RANGE(0x484000, 0x484007) AM_WRITE(K053246_word_w)
405		AM_RANGE(0x48a000, 0x48a01f) AM_WRITE(K054338_word_w)
406		AM_RANGE(0x48c000, 0x48c03f) AM_WRITE(K056832_word_w)
407		AM_RANGE(0x490000, 0x490001) AM_WRITE(mweeprom_w)
408		AM_RANGE(0x492000, 0x492001) AM_WRITENOP   // watchdog
409		AM_RANGE(0x49800c, 0x49800d) AM_WRITE(sound_cmd1_w)
410		AM_RANGE(0x49800e, 0x49800f) AM_WRITE(sound_cmd2_w)
411		AM_RANGE(0x498000, 0x49801f) AM_WRITE(SMH_RAM)
412		AM_RANGE(0x49a000, 0x49a001) AM_WRITE(sound_irq_w)
413		AM_RANGE(0x49c000, 0x49c01f) AM_WRITE(K053252_word_w)
414		AM_RANGE(0x49e000, 0x49e007) AM_WRITE(irq_ack_w)   // VSCCS (custom)
415		AM_RANGE(0x600000, 0x601fff) AM_WRITE(K056832_ram_word_w)
416		AM_RANGE(0x602000, 0x603fff) AM_WRITE(K056832_ram_word_w)   // tilemap RAM mirror write(essential)
417		AM_RANGE(0x700000, 0x701fff) AM_WRITE(paletteram16_xrgb_word_be_w) AM_BASE(&paletteram16)
418		ADDRESS_MAP_END
419
420	411	/* Metamorphic Force */
421		static ADDRESS_MAP_START( mmreadmem, ADDRESS_SPACE_PROGRAM, 16 )
422		AM_RANGE(0x000000, 0x1fffff) AM_READ(SMH_ROM)   // main program
423		AM_RANGE(0x200000, 0x20ffff) AM_READ(SMH_RAM)
424		AM_RANGE(0x210000, 0x210fff) AM_READ(K053247_word_r)
425		AM_RANGE(0x211000, 0x21ffff) AM_READ(SMH_RAM)
	412	static ADDRESS_MAP_START( metamrph_map, ADDRESS_SPACE_PROGRAM, 16 )
	413	AM_RANGE(0x000000, 0x1fffff) AM_ROM   // main program
	414	AM_RANGE(0x200000, 0x20ffff) AM_RAM AM_BASE(&gx_workram)
	415	AM_RANGE(0x210000, 0x210fff) AM_READWRITE(K053247_word_r,K053247_word_w)
	416	AM_RANGE(0x211000, 0x21ffff) AM_RAM
	417	AM_RANGE(0x240000, 0x240007) AM_WRITE(K053246_word_w)
426	418	AM_RANGE(0x244000, 0x24400f) AM_READ(K055673_rom_word_r)
427		AM_RANGE(0x24c000, 0x24ffff) AM_READ(K053250_0_ram_r)
428		AM_RANGE(0x250000, 0x25000f) AM_READ(K053250_0_r)
	419	AM_RANGE(0x244010, 0x24401f) AM_WRITE(K053247_reg_word_w)
	420	AM_RANGE(0x24c000, 0x24ffff) AM_READWRITE(K053250_0_ram_r,K053250_0_ram_w) // "LVC RAM" (53250_ram)
	421	AM_RANGE(0x250000, 0x25000f) AM_READWRITE(K053250_0_r,K053250_0_w)
	422	AM_RANGE(0x254000, 0x25401f) AM_WRITE(K054338_word_w)
	423	AM_RANGE(0x258000, 0x2580ff) AM_WRITE(K055555_word_w)
	424	AM_RANGE(0x260000, 0x26001f) AM_WRITE(K053252_word_w)
	425	AM_RANGE(0x264000, 0x264001) AM_WRITE(sound_irq_w)
	426	AM_RANGE(0x26800c, 0x26800d) AM_WRITE(sound_cmd1_w)
	427	AM_RANGE(0x26800e, 0x26800f) AM_WRITE(sound_cmd2_w)
429	428	AM_RANGE(0x268014, 0x268015) AM_READ(sound_status_r)
430		AM_RANGE(0x268000, 0x26801f) AM_READ(SMH_RAM)
	429	AM_RANGE(0x268000, 0x26801f) AM_RAM
	430	AM_RANGE(0x26c000, 0x26c007) AM_WRITE(K056832_b_word_w)
	431	AM_RANGE(0x270000, 0x27003f) AM_WRITE(K056832_word_w)
431	432	AM_RANGE(0x274000, 0x274001) AM_READ_PORT("P1_P3")
432	433	AM_RANGE(0x274002, 0x274003) AM_READ_PORT("P2_P4")
433	434	AM_RANGE(0x278000, 0x278001) AM_READ(mmcoins_r)
434	435	AM_RANGE(0x278002, 0x278003) AM_READ(vseeprom_r)
435	436	AM_RANGE(0x27c000, 0x27c001) AM_READNOP   // watchdog lives here
436		AM_RANGE(0x300000, 0x301fff) AM_READ(K056832_ram_word_r)
437		AM_RANGE(0x302000, 0x303fff) AM_READ(K056832_ram_word_r)   // tilemap RAM mirror read(essential)
	437	AM_RANGE(0x27c000, 0x27c001) AM_WRITE(mmeeprom_w)
	438	AM_RANGE(0x300000, 0x301fff) AM_READWRITE(K056832_ram_word_r,K056832_ram_word_w)
	439	AM_RANGE(0x302000, 0x303fff) AM_READWRITE(K056832_ram_word_r,K056832_ram_word_w)   // tilemap RAM mirror read/write (essential)
438	440	AM_RANGE(0x310000, 0x311fff) AM_READ(K056832_mw_rom_word_r)
439	441	AM_RANGE(0x320000, 0x321fff) AM_READ(K053250_0_rom_r)
440		AM_RANGE(0x330000, 0x331fff) AM_READ(SMH_RAM)
	442	AM_RANGE(0x330000, 0x331fff) AM_RAM_WRITE(paletteram16_xrgb_word_be_w) AM_BASE(&paletteram16)
441	443	#if MW_DEBUG
442	444	AM_RANGE(0x240000, 0x240007) AM_READ(K053246_reg_word_r)
443	445	AM_RANGE(0x244010, 0x24401f) AM_READ(K053247_reg_word_r)
r4679	r4680
449	451	#endif
450	452	ADDRESS_MAP_END
451	453
452		static ADDRESS_MAP_START( mmwritemem, ADDRESS_SPACE_PROGRAM, 16 )
453		AM_RANGE(0x200000, 0x20ffff) AM_WRITE(SMH_RAM) AM_BASE(&gx_workram)
454		AM_RANGE(0x210000, 0x210fff) AM_WRITE(K053247_word_w)
455		AM_RANGE(0x211000, 0x21ffff) AM_WRITE(SMH_RAM)
	454	/* Violent Storm */
	455	static ADDRESS_MAP_START( viostorm_map, ADDRESS_SPACE_PROGRAM, 16 )
	456	AM_RANGE(0x000000, 0x1fffff) AM_ROM      // main program
	457	AM_RANGE(0x200000, 0x20ffff) AM_RAM AM_BASE(&gx_workram)
	458	AM_RANGE(0x210000, 0x210fff) AM_READWRITE(K053247_word_r,K053247_word_w)
	459	AM_RANGE(0x211000, 0x21ffff) AM_RAM
456	460	AM_RANGE(0x240000, 0x240007) AM_WRITE(K053246_word_w)
	461	AM_RANGE(0x244000, 0x24400f) AM_READ(K055673_rom_word_r)
457	462	AM_RANGE(0x244010, 0x24401f) AM_WRITE(K053247_reg_word_w)
458		AM_RANGE(0x24c000, 0x24ffff) AM_WRITE(K053250_0_ram_w)   // "LVC RAM" (53250_ram)
459		AM_RANGE(0x250000, 0x25000f) AM_WRITE(K053250_0_w)
	463	AM_RANGE(0x24c000, 0x24ffff) AM_RAM      // K053250_0_ram_r / K053250_0_ram_w
	464	AM_RANGE(0x250000, 0x25000f) AM_RAM      // K053250_0_r / K053250_0_w
460	465	AM_RANGE(0x254000, 0x25401f) AM_WRITE(K054338_word_w)
461	466	AM_RANGE(0x258000, 0x2580ff) AM_WRITE(K055555_word_w)
	467	AM_RANGE(0x25c000, 0x25c03f) AM_READWRITE(K055550_word_r,K055550_word_w)
462	468	AM_RANGE(0x260000, 0x26001f) AM_WRITE(K053252_word_w)
463	469	AM_RANGE(0x264000, 0x264001) AM_WRITE(sound_irq_w)
464	470	AM_RANGE(0x26800c, 0x26800d) AM_WRITE(sound_cmd1_w)
465	471	AM_RANGE(0x26800e, 0x26800f) AM_WRITE(sound_cmd2_w)
466		AM_RANGE(0x268000, 0x26801f) AM_WRITE(SMH_RAM)
467		AM_RANGE(0x26C000, 0x26C007) AM_WRITE(K056832_b_word_w)
468		AM_RANGE(0x270000, 0x27003f) AM_WRITE(K056832_word_w)
469		AM_RANGE(0x27C000, 0x27C001) AM_WRITE(mmeeprom_w)
470		AM_RANGE(0x300000, 0x301fff) AM_WRITE(K056832_ram_word_w)
471		AM_RANGE(0x302000, 0x303fff) AM_WRITE(K056832_ram_word_w)   // tilemap RAM mirror write(essential)
472		AM_RANGE(0x330000, 0x331fff) AM_WRITE(paletteram16_xrgb_word_be_w) AM_BASE(&paletteram16)
473		ADDRESS_MAP_END
474
475		/* Violent Storm */
476		static ADDRESS_MAP_START( vsreadmem, ADDRESS_SPACE_PROGRAM, 16 )
477		AM_RANGE(0x000000, 0x1fffff) AM_READ(SMH_ROM)      // main program
478		AM_RANGE(0x200000, 0x20ffff) AM_READ(SMH_RAM)
479		AM_RANGE(0x210000, 0x210fff) AM_READ(K053247_word_r)
480		AM_RANGE(0x211000, 0x21ffff) AM_READ(SMH_RAM)
481		AM_RANGE(0x244000, 0x24400f) AM_READ(K055673_rom_word_r)
482		AM_RANGE(0x24c000, 0x24ffff) AM_READ(SMH_RAM)      // K053250_0_ram_r
483		AM_RANGE(0x250000, 0x25000f) AM_READ(SMH_RAM)      // K053250_0_r
484		AM_RANGE(0x25c000, 0x25c03f) AM_READ(K055550_word_r)
485	472	AM_RANGE(0x268014, 0x268015) AM_READ(sound_status_r)
486		AM_RANGE(0x268000, 0x26801f) AM_READ(SMH_RAM)
	473	AM_RANGE(0x268000, 0x26801f) AM_RAM
	474	AM_RANGE(0x26c000, 0x26c007) AM_WRITE(K056832_b_word_w)
	475	AM_RANGE(0x270000, 0x27003f) AM_WRITE(K056832_word_w)
487	476	AM_RANGE(0x274000, 0x274001) AM_READ_PORT("P1_P3")
488	477	AM_RANGE(0x274002, 0x274003) AM_READ_PORT("P2_P4")
489	478	AM_RANGE(0x278000, 0x278001) AM_READ(mmcoins_r)
490	479	AM_RANGE(0x278002, 0x278003) AM_READ(vseeprom_r)
491	480	AM_RANGE(0x27c000, 0x27c001) AM_READNOP      // watchdog lives here
492		AM_RANGE(0x300000, 0x301fff) AM_READ(K056832_ram_word_r)
493		AM_RANGE(0x302000, 0x303fff) AM_READ(K056832_ram_word_r) // tilemap RAM mirror read(essential)
494		AM_RANGE(0x304000, 0x3041ff) AM_READ(SMH_RAM)
	481	AM_RANGE(0x27c000, 0x27c001) AM_WRITE(mmeeprom_w)
	482	AM_RANGE(0x300000, 0x301fff) AM_READWRITE(K056832_ram_word_r,K056832_ram_word_w)
	483	AM_RANGE(0x302000, 0x303fff) AM_READWRITE(K056832_ram_word_r,K056832_ram_word_w) // tilemap RAM mirror read(essential)
	484	AM_RANGE(0x304000, 0x3041ff) AM_RAM
495	485	AM_RANGE(0x310000, 0x311fff) AM_READ(K056832_mw_rom_word_r)
496		AM_RANGE(0x330000, 0x331fff) AM_READ(SMH_RAM)
	486	AM_RANGE(0x330000, 0x331fff) AM_RAM_WRITE(paletteram16_xrgb_word_be_w) AM_BASE(&paletteram16)
497	487	#if MW_DEBUG
498	488	AM_RANGE(0x240000, 0x240007) AM_READ(K053246_reg_word_r)
499	489	AM_RANGE(0x244010, 0x24401f) AM_READ(K053247_reg_word_r)
r4679	r4680
505	495	#endif
506	496	ADDRESS_MAP_END
507	497
508		static ADDRESS_MAP_START( vswritemem, ADDRESS_SPACE_PROGRAM, 16 )
509		AM_RANGE(0x200000, 0x20ffff) AM_WRITE(SMH_RAM) AM_BASE(&gx_workram)
510		AM_RANGE(0x210000, 0x210fff) AM_WRITE(K053247_word_w)
511		AM_RANGE(0x211000, 0x21ffff) AM_WRITE(SMH_RAM)
512		AM_RANGE(0x240000, 0x240007) AM_WRITE(K053246_word_w)
513		AM_RANGE(0x244010, 0x24401f) AM_WRITE(K053247_reg_word_w)
514		AM_RANGE(0x24c000, 0x24ffff) AM_WRITE(SMH_RAM)         // K053250_0_ram_w
515		AM_RANGE(0x250000, 0x25000f) AM_WRITE(SMH_RAM)         // K053250_0_w
516		AM_RANGE(0x254000, 0x25401f) AM_WRITE(K054338_word_w)
517		AM_RANGE(0x258000, 0x2580ff) AM_WRITE(K055555_word_w)
518		AM_RANGE(0x25c000, 0x25c03f) AM_WRITE(K055550_word_w)
519		AM_RANGE(0x260000, 0x26001f) AM_WRITE(K053252_word_w)
520		AM_RANGE(0x264000, 0x264001) AM_WRITE(sound_irq_w)
521		AM_RANGE(0x26800c, 0x26800d) AM_WRITE(sound_cmd1_w)
522		AM_RANGE(0x26800e, 0x26800f) AM_WRITE(sound_cmd2_w)
523		AM_RANGE(0x268000, 0x26801f) AM_WRITE(SMH_RAM)
524		AM_RANGE(0x26C000, 0x26C007) AM_WRITE(K056832_b_word_w)
525		AM_RANGE(0x270000, 0x27003f) AM_WRITE(K056832_word_w)
526		AM_RANGE(0x27C000, 0x27C001) AM_WRITE(mmeeprom_w)
527		AM_RANGE(0x300000, 0x301fff) AM_WRITE(K056832_ram_word_w)
528		AM_RANGE(0x302000, 0x303fff) AM_WRITE(K056832_ram_word_w) // tilemap RAM mirror write(essential)
529		AM_RANGE(0x304000, 0x3041ff) AM_WRITE(SMH_RAM)
530		AM_RANGE(0x330000, 0x331fff) AM_WRITE(paletteram16_xrgb_word_be_w) AM_BASE(&paletteram16)
531		ADDRESS_MAP_END
532
533	498	// Martial Champion specific interfaces
534	499	static READ16_HANDLER( K053247_martchmp_word_r )
535	500	{
r4679	r4680
581	546	}
582	547
583	548	/* Martial Champion */
584		static ADDRESS_MAP_START( mcreadmem, ADDRESS_SPACE_PROGRAM, 16 )
585		AM_RANGE(0x000000, 0x0fffff) AM_READ(SMH_ROM)         // main program
586		AM_RANGE(0x100000, 0x10ffff) AM_READ(SMH_RAM)         // work RAM
587		AM_RANGE(0x300000, 0x3fffff) AM_READ(SMH_ROM)         // data ROM
588		AM_RANGE(0x402000, 0x40200f) AM_READ(K055673_rom_word_r)   // sprite ROM readback
589		AM_RANGE(0x412000, 0x412001) AM_READ(mccontrol_r)
	549	static ADDRESS_MAP_START( martchmp_map, ADDRESS_SPACE_PROGRAM, 16 )
	550	AM_RANGE(0x000000, 0x0fffff) AM_ROM                           // main program
	551	AM_RANGE(0x100000, 0x10ffff) AM_RAM AM_BASE(&gx_workram)         // work RAM
	552	AM_RANGE(0x300000, 0x3fffff) AM_ROM                           // data ROM
	553	AM_RANGE(0x400000, 0x4000ff) AM_WRITE(K055555_word_w)            // PCU2
	554	AM_RANGE(0x402000, 0x40200f) AM_READ(K055673_rom_word_r)         // sprite ROM readback
	555	AM_RANGE(0x402010, 0x40201f) AM_WRITE(K053247_reg_word_w)         // OBJSET2
	556	AM_RANGE(0x404000, 0x404007) AM_WRITE(K053246_word_w)            // OBJSET1
	557	AM_RANGE(0x40a000, 0x40a01f) AM_WRITE(K054338_word_w)            // CLTC
	558	AM_RANGE(0x40c000, 0x40c03f) AM_WRITE(K056832_word_w)            // VACSET
	559	AM_RANGE(0x40e000, 0x40e03f) AM_WRITE(K053990_martchmp_word_w)       // protection
	560	AM_RANGE(0x410000, 0x410001) AM_WRITE(mweeprom_w)
	561	AM_RANGE(0x412000, 0x412001) AM_READWRITE(mccontrol_r,mccontrol_w)
590	562	AM_RANGE(0x414000, 0x414001) AM_READ_PORT("P1_P2")
591	563	AM_RANGE(0x414002, 0x414003) AM_READ_PORT("P3_P4")
592		AM_RANGE(0x416000, 0x416001) AM_READ(mmcoins_r)         // coin
593		AM_RANGE(0x416002, 0x416003) AM_READ(mweeprom_r)         // eeprom read
594		AM_RANGE(0x418014, 0x418015) AM_READ(sound_status_r)      // z80 status
595		AM_RANGE(0x418000, 0x41801f) AM_READ(SMH_RAM)         // sound regs fall through
596		AM_RANGE(0x480000, 0x483fff) AM_READ(K053247_martchmp_word_r)// sprite RAM
597		AM_RANGE(0x600000, 0x601fff) AM_READ(SMH_RAM)         // palette RAM
598		AM_RANGE(0x680000, 0x681fff) AM_READ(K056832_ram_word_r)   // tilemap RAM
599		AM_RANGE(0x682000, 0x683fff) AM_READ(K056832_ram_word_r)   // tilemap RAM mirror read(essential)
600		AM_RANGE(0x700000, 0x703fff) AM_READ(K056832_mw_rom_word_r)   // tile ROM readback
	564	AM_RANGE(0x416000, 0x416001) AM_READ(mmcoins_r)                  // coin
	565	AM_RANGE(0x416002, 0x416003) AM_READ(mweeprom_r)               // eeprom read
	566	AM_RANGE(0x418014, 0x418015) AM_READ(sound_status_r)            // z80 status
	567	AM_RANGE(0x41800c, 0x41800d) AM_WRITE(sound_cmd1_w)
	568	AM_RANGE(0x41800e, 0x41800f) AM_WRITE(sound_cmd2_w)
	569	AM_RANGE(0x418000, 0x41801f) AM_RAM                           // sound regs fall through
	570	AM_RANGE(0x41a000, 0x41a001) AM_WRITE(sound_irq_w)
	571	AM_RANGE(0x41c000, 0x41c01f) AM_WRITE(K053252_word_w)            // CCU
	572	AM_RANGE(0x41e000, 0x41e007) AM_WRITE(K056832_b_word_w)            // VSCCS
	573	AM_RANGE(0x480000, 0x483fff) AM_READWRITE(K053247_martchmp_word_r,K053247_martchmp_word_w) AM_BASE(&spriteram16)   // sprite RAM
	574	AM_RANGE(0x600000, 0x601fff) AM_RAM_WRITE(paletteram16_xrgb_word_be_w) AM_BASE(&paletteram16)                  // palette RAM
	575	AM_RANGE(0x680000, 0x681fff) AM_READWRITE(K056832_ram_word_r,K056832_ram_word_w)   // tilemap RAM
	576	AM_RANGE(0x682000, 0x683fff) AM_READWRITE(K056832_ram_word_r,K056832_ram_word_w)   // tilemap RAM mirror read/write (essential)
	577	AM_RANGE(0x700000, 0x703fff) AM_READ(K056832_mw_rom_word_r)         // tile ROM readback
601	578	#if MW_DEBUG
602	579	AM_RANGE(0x400000, 0x4000ff) AM_READ(K055555_word_r)
603	580	AM_RANGE(0x402010, 0x40201f) AM_READ(K053247_reg_word_r)
r4679	r4680
609	586	#endif
610	587	ADDRESS_MAP_END
611	588
612		static ADDRESS_MAP_START( mcwritemem, ADDRESS_SPACE_PROGRAM, 16 )
613		AM_RANGE(0x100000, 0x10ffff) AM_WRITE(SMH_RAM) AM_BASE(&gx_workram)
614		AM_RANGE(0x400000, 0x4000ff) AM_WRITE(K055555_word_w)      // PCU2
615		AM_RANGE(0x402010, 0x40201f) AM_WRITE(K053247_reg_word_w)   // OBJSET2
616		AM_RANGE(0x404000, 0x404007) AM_WRITE(K053246_word_w)      // OBJSET1
617		AM_RANGE(0x40a000, 0x40a01f) AM_WRITE(K054338_word_w)      // CLTC
618		AM_RANGE(0x40c000, 0x40c03f) AM_WRITE(K056832_word_w)      // VACSET
619		AM_RANGE(0x40e000, 0x40e03f) AM_WRITE(K053990_martchmp_word_w) // protection
620		AM_RANGE(0x410000, 0x410001) AM_WRITE(mweeprom_w)
621		AM_RANGE(0x412000, 0x412001) AM_WRITE(mccontrol_w)
622		AM_RANGE(0x41c000, 0x41c01f) AM_WRITE(K053252_word_w)      // CCU
623		AM_RANGE(0x41e000, 0x41e007) AM_WRITE(K056832_b_word_w)   // VSCCS
624		AM_RANGE(0x41800c, 0x41800d) AM_WRITE(sound_cmd1_w)
625		AM_RANGE(0x41800e, 0x41800f) AM_WRITE(sound_cmd2_w)
626		AM_RANGE(0x418000, 0x41801f) AM_WRITE(SMH_RAM)         // sound regs fall through
627		AM_RANGE(0x41a000, 0x41a001) AM_WRITE(sound_irq_w)
628		AM_RANGE(0x480000, 0x483fff) AM_WRITE(K053247_martchmp_word_w) AM_BASE(&spriteram16)
629		AM_RANGE(0x600000, 0x601fff) AM_WRITE(paletteram16_xrgb_word_be_w) AM_BASE(&paletteram16)
630		AM_RANGE(0x680000, 0x681fff) AM_WRITE(K056832_ram_word_w)
631		AM_RANGE(0x682000, 0x683fff) AM_WRITE(K056832_ram_word_w)   // tilemap RAM mirror write(essential)
632		ADDRESS_MAP_END
633
634	589	/* Ultimate Battler Dadandarn */
635		static ADDRESS_MAP_START( dddreadmem, ADDRESS_SPACE_PROGRAM, 16 )
636		AM_RANGE(0x000000, 0x1fffff) AM_READ(SMH_ROM)   // main program and data ROM
637		AM_RANGE(0x400000, 0x40ffff) AM_READ(K053247_scattered_word_r)
638		AM_RANGE(0x410000, 0x411fff) AM_READ(K056832_ram_word_r)   // tilemap RAM
639		AM_RANGE(0x412000, 0x413fff) AM_READ(K056832_ram_word_r) // tilemap RAM mirror read(essential)
640		AM_RANGE(0x420000, 0x421fff) AM_READ(SMH_RAM)
	590	static ADDRESS_MAP_START( dadandrn_map, ADDRESS_SPACE_PROGRAM, 16 )
	591	AM_RANGE(0x000000, 0x1fffff) AM_ROM                     // main program and data ROM
	592	AM_RANGE(0x400000, 0x40ffff) AM_READWRITE(K053247_scattered_word_r,K053247_scattered_word_w) AM_BASE(&spriteram16)
	593	AM_RANGE(0x410000, 0x411fff) AM_READWRITE(K056832_ram_word_r,K056832_ram_word_w)   // tilemap RAM
	594	AM_RANGE(0x412000, 0x413fff) AM_READWRITE(K056832_ram_word_r,K056832_ram_word_w)    // tilemap RAM mirror read/write (essential)
	595	AM_RANGE(0x420000, 0x421fff) AM_RAM_WRITE(paletteram16_xrgb_word_be_w) AM_BASE(&paletteram16)
	596	AM_RANGE(0x430000, 0x430007) AM_WRITE(K053246_word_w)
641	597	AM_RANGE(0x440000, 0x443fff) AM_READ(K056832_mw_rom_word_r)
642	598	AM_RANGE(0x450000, 0x45000f) AM_READ(K055673_rom_word_r)
643		AM_RANGE(0x470000, 0x470fff) AM_READ(SMH_RAM)
	599	AM_RANGE(0x450010, 0x45001f) AM_WRITE(K053247_reg_word_w)
	600	AM_RANGE(0x460000, 0x46001f) AM_WRITEONLY AM_BASE(&K053936_0_ctrl)
	601	AM_RANGE(0x470000, 0x470fff) AM_RAM AM_BASE(&K053936_0_linectrl)
	602	AM_RANGE(0x480000, 0x48003f) AM_WRITE(K056832_word_w)      // VACSET
	603	AM_RANGE(0x482000, 0x482007) AM_WRITE(K056832_b_word_w)   // VSCCS
	604	AM_RANGE(0x484000, 0x484003) AM_WRITE(ddd_053936_clip_w)
	605	AM_RANGE(0x486000, 0x48601f) AM_WRITE(K053252_word_w)
	606	AM_RANGE(0x48a00c, 0x48a00d) AM_WRITE(sound_cmd1_msb_w)
	607	AM_RANGE(0x48a00e, 0x48a00f) AM_WRITE(sound_cmd2_msb_w)
644	608	AM_RANGE(0x48a014, 0x48a015) AM_READ(sound_status_msb_r)
645		AM_RANGE(0x48a000, 0x48a01f) AM_READ(SMH_RAM)   // sound regs fall-through
	609	AM_RANGE(0x48a000, 0x48a01f) AM_RAM               // sound regs fall-through
	610	AM_RANGE(0x48c000, 0x48c01f) AM_WRITE(K054338_word_w)
646	611	AM_RANGE(0x48e000, 0x48e001) AM_READ(dddcoins_r)   // bit 3 (0x8) is test switch
647	612	AM_RANGE(0x48e020, 0x48e021) AM_READ(dddeeprom_r)
648		AM_RANGE(0x600000, 0x60ffff) AM_READ(SMH_RAM)
649		AM_RANGE(0x680000, 0x68003f) AM_READ(K055550_word_r)
	613	AM_RANGE(0x600000, 0x60ffff) AM_RAM AM_BASE(&gx_workram)
	614	AM_RANGE(0x680000, 0x68003f) AM_READWRITE(K055550_word_r,K055550_word_w)
	615	AM_RANGE(0x6a0000, 0x6a0001) AM_WRITE(mmeeprom_w)
	616	AM_RANGE(0x6c0000, 0x6c0001) AM_WRITE(ddd_053936_enable_w)
	617	AM_RANGE(0x6e0000, 0x6e0001) AM_WRITE(sound_irq_w)
650	618	AM_RANGE(0x800000, 0x87ffff) AM_READ(ddd_053936_tilerom_0_r)   // 256k tilemap readback
651	619	AM_RANGE(0xa00000, 0xa7ffff) AM_READ(ddd_053936_tilerom_1_r) // 128k tilemap readback
652	620	AM_RANGE(0xc00000, 0xdfffff) AM_READ(ddd_053936_tilerom_2_r)   // tile character readback
	621	AM_RANGE(0xe00000, 0xe00001) AM_WRITENOP   // watchdog
653	622	#if MW_DEBUG
654	623	AM_RANGE(0x430000, 0x430007) AM_READ(K053246_reg_word_r)
655	624	AM_RANGE(0x450010, 0x45001f) AM_READ(K053247_reg_word_r)
r4679	r4680
661	630	#endif
662	631	ADDRESS_MAP_END
663	632
664		static ADDRESS_MAP_START( dddwritemem, ADDRESS_SPACE_PROGRAM, 16 )
665		AM_RANGE(0x400000, 0x40ffff) AM_WRITE(K053247_scattered_word_w) AM_BASE(&spriteram16)
666		AM_RANGE(0x410000, 0x411fff) AM_WRITE(K056832_ram_word_w)
667		AM_RANGE(0x412000, 0x413fff) AM_WRITE(K056832_ram_word_w)   // tile RAM mirror write(essential)
668		AM_RANGE(0x420000, 0x421fff) AM_WRITE(paletteram16_xrgb_word_be_w) AM_BASE(&paletteram16)
	633	/* Gaiapolis */
	634	// a00000 = the 128k tilemap
	635	// 800000 = the 256k tilemap
	636	// c00000 = 936 tiles (7fffff window)
	637	static ADDRESS_MAP_START( gaiapols_map, ADDRESS_SPACE_PROGRAM, 16 )
	638	AM_RANGE(0x000000, 0x2fffff) AM_ROM                        // main program
	639	AM_RANGE(0x400000, 0x40ffff) AM_READWRITE(K053247_scattered_word_r,K053247_scattered_word_w) AM_BASE(&spriteram16)
	640	AM_RANGE(0x410000, 0x411fff) AM_READWRITE(K056832_ram_word_r,K056832_ram_word_w)      // tilemap RAM
	641	AM_RANGE(0x412000, 0x413fff) AM_READWRITE(K056832_ram_word_r,K056832_ram_word_w)       // tilemap RAM mirror read / write (essential)
	642	AM_RANGE(0x420000, 0x421fff) AM_RAM_WRITE(paletteram16_xrgb_word_be_w) AM_BASE(&paletteram16)
669	643	AM_RANGE(0x430000, 0x430007) AM_WRITE(K053246_word_w)
	644	AM_RANGE(0x440000, 0x441fff) AM_READ(K056832_mw_rom_word_r)
	645	AM_RANGE(0x450000, 0x45000f) AM_READ(K055673_rom_word_r)
670	646	AM_RANGE(0x450010, 0x45001f) AM_WRITE(K053247_reg_word_w)
671		AM_RANGE(0x460000, 0x46001f) AM_WRITE(SMH_RAM) AM_BASE(&K053936_0_ctrl)
672		AM_RANGE(0x470000, 0x470fff) AM_WRITE(SMH_RAM) AM_BASE(&K053936_0_linectrl)
673		AM_RANGE(0x480000, 0x48003f) AM_WRITE(K056832_word_w)      // VACSET
674		AM_RANGE(0x482000, 0x482007) AM_WRITE(K056832_b_word_w)   // VSCCS
	647	AM_RANGE(0x460000, 0x46001f) AM_WRITEONLY AM_BASE(&K053936_0_ctrl)
	648	AM_RANGE(0x470000, 0x470fff) AM_RAM AM_BASE(&K053936_0_linectrl)
	649	AM_RANGE(0x480000, 0x48003f) AM_WRITE(K056832_word_w)         // VACSET
	650	AM_RANGE(0x482000, 0x482007) AM_WRITE(K056832_b_word_w)         // VSCCS
675	651	AM_RANGE(0x484000, 0x484003) AM_WRITE(ddd_053936_clip_w)
676	652	AM_RANGE(0x486000, 0x48601f) AM_WRITE(K053252_word_w)
677	653	AM_RANGE(0x488000, 0x4880ff) AM_WRITE(K055555_word_w)
678	654	AM_RANGE(0x48a00c, 0x48a00d) AM_WRITE(sound_cmd1_msb_w)
679	655	AM_RANGE(0x48a00e, 0x48a00f) AM_WRITE(sound_cmd2_msb_w)
680		AM_RANGE(0x48a000, 0x48a01f) AM_WRITE(SMH_RAM)   // sound regs fall-through
	656	AM_RANGE(0x48a014, 0x48a015) AM_READ(sound_status_msb_r)
	657	AM_RANGE(0x48a000, 0x48a01f) AM_RAM                        // sound regs fall-through
681	658	AM_RANGE(0x48c000, 0x48c01f) AM_WRITE(K054338_word_w)
682		AM_RANGE(0x600000, 0x60ffff) AM_WRITE(SMH_RAM) AM_BASE(&gx_workram)
683		AM_RANGE(0x680000, 0x68003f) AM_WRITE(K055550_word_w)
	659	AM_RANGE(0x48e000, 0x48e001) AM_READ(dddcoins_r)            // bit 3 (0x8) is test switch
	660	AM_RANGE(0x48e020, 0x48e021) AM_READ(dddeeprom_r)
	661	AM_RANGE(0x600000, 0x60ffff) AM_RAM AM_BASE(&gx_workram)
	662	AM_RANGE(0x660000, 0x6600ff) AM_READWRITE(K054000_lsb_r,K054000_lsb_w)
684	663	AM_RANGE(0x6a0000, 0x6a0001) AM_WRITE(mmeeprom_w)
685	664	AM_RANGE(0x6c0000, 0x6c0001) AM_WRITE(ddd_053936_enable_w)
686	665	AM_RANGE(0x6e0000, 0x6e0001) AM_WRITE(sound_irq_w)
687		AM_RANGE(0xe00000, 0xe00001) AM_WRITENOP   // watchdog
688		ADDRESS_MAP_END
689
690		/* Gaiapolis */
691		// a00000 = the 128k tilemap
692		// 800000 = the 256k tilemap
693		// c00000 = 936 tiles (7fffff window)
694		static ADDRESS_MAP_START( gaiareadmem, ADDRESS_SPACE_PROGRAM, 16 )
695		AM_RANGE(0x000000, 0x2fffff) AM_READ(SMH_ROM)   // main program
696		AM_RANGE(0x400000, 0x40ffff) AM_READ(K053247_scattered_word_r)
697		AM_RANGE(0x410000, 0x411fff) AM_READ(K056832_ram_word_r)   // tilemap RAM
698		AM_RANGE(0x412000, 0x413fff) AM_READ(K056832_ram_word_r) // tilemap RAM mirror read(essential)
699		AM_RANGE(0x420000, 0x421fff) AM_READ(SMH_RAM)
700		AM_RANGE(0x440000, 0x441fff) AM_READ(K056832_mw_rom_word_r)
701		AM_RANGE(0x450000, 0x45000f) AM_READ(K055673_rom_word_r)
702		AM_RANGE(0x470000, 0x470fff) AM_READ(SMH_RAM)
703		AM_RANGE(0x48a014, 0x48a015) AM_READ(sound_status_msb_r)
704		AM_RANGE(0x48a000, 0x48a01f) AM_READ(SMH_RAM)   // sound regs fall-through
705		AM_RANGE(0x48e000, 0x48e001) AM_READ(dddcoins_r)   // bit 3 (0x8) is test switch
706		AM_RANGE(0x48e020, 0x48e021) AM_READ(dddeeprom_r)
707		AM_RANGE(0x600000, 0x60ffff) AM_READ(SMH_RAM)
708		AM_RANGE(0x660000, 0x6600ff) AM_READ(K054000_lsb_r)
709	666	AM_RANGE(0x800000, 0x87ffff) AM_READ(gai_053936_tilerom_0_r)   // 256k tilemap readback
710		AM_RANGE(0xa00000, 0xa7ffff) AM_READ(ddd_053936_tilerom_1_r) // 128k tilemap readback
	667	AM_RANGE(0xa00000, 0xa7ffff) AM_READ(ddd_053936_tilerom_1_r)    // 128k tilemap readback
711	668	AM_RANGE(0xc00000, 0xdfffff) AM_READ(gai_053936_tilerom_2_r)   // tile character readback
	669	AM_RANGE(0xe00000, 0xe00001) AM_WRITENOP    // watchdog
712	670	#if MW_DEBUG
713	671	AM_RANGE(0x430000, 0x430007) AM_READ(K053246_reg_word_r)
714	672	AM_RANGE(0x450010, 0x45001f) AM_READ(K053247_reg_word_r)
r4679	r4680
720	678	#endif
721	679	ADDRESS_MAP_END
722	680
723		static ADDRESS_MAP_START( gaiawritemem, ADDRESS_SPACE_PROGRAM, 16 )
724		AM_RANGE(0x400000, 0x40ffff) AM_WRITE(K053247_scattered_word_w) AM_BASE(&spriteram16)
725		AM_RANGE(0x410000, 0x411fff) AM_WRITE(K056832_ram_word_w)
726		AM_RANGE(0x412000, 0x413fff) AM_WRITE(K056832_ram_word_w)   // tilemap RAM mirror write(essential)
727		AM_RANGE(0x412000, 0x4120ff) AM_WRITE(SMH_RAM)
728		AM_RANGE(0x420000, 0x421fff) AM_WRITE(paletteram16_xrgb_word_be_w) AM_BASE(&paletteram16)
729		AM_RANGE(0x430000, 0x430007) AM_WRITE(K053246_word_w)
730		AM_RANGE(0x450010, 0x45001f) AM_WRITE(K053247_reg_word_w)
731		AM_RANGE(0x460000, 0x46001f) AM_WRITE(SMH_RAM) AM_BASE(&K053936_0_ctrl)
732		AM_RANGE(0x470000, 0x470fff) AM_WRITE(SMH_RAM) AM_BASE(&K053936_0_linectrl)
733		AM_RANGE(0x480000, 0x48003f) AM_WRITE(K056832_word_w)      // VACSET
734		AM_RANGE(0x482000, 0x482007) AM_WRITE(K056832_b_word_w)   // VSCCS
735		AM_RANGE(0x484000, 0x484003) AM_WRITE(ddd_053936_clip_w)
736		AM_RANGE(0x486000, 0x48601f) AM_WRITE(K053252_word_w)
737		AM_RANGE(0x488000, 0x4880ff) AM_WRITE(K055555_word_w)
738		AM_RANGE(0x48a00c, 0x48a00d) AM_WRITE(sound_cmd1_msb_w)
739		AM_RANGE(0x48a00e, 0x48a00f) AM_WRITE(sound_cmd2_msb_w)
740		AM_RANGE(0x48a000, 0x48a01f) AM_WRITE(SMH_RAM)   // sound regs fall-through
741		AM_RANGE(0x48c000, 0x48c01f) AM_WRITE(K054338_word_w)
742		AM_RANGE(0x600000, 0x60ffff) AM_WRITE(SMH_RAM) AM_BASE(&gx_workram)
743		AM_RANGE(0x660000, 0x6600ff) AM_WRITE(K054000_lsb_w)
744		AM_RANGE(0x6a0000, 0x6a0001) AM_WRITE(mmeeprom_w)
745		AM_RANGE(0x6c0000, 0x6c0001) AM_WRITE(ddd_053936_enable_w)
746		AM_RANGE(0x6e0000, 0x6e0001) AM_WRITE(sound_irq_w)
747		AM_RANGE(0xe00000, 0xe00001) AM_WRITENOP    // watchdog
748		ADDRESS_MAP_END
749
750	681	/**********************************************************************************/
751	682
752	683	static int cur_sound_region;
r4679	r4680
770	701	quite similar to xexex/gijoe/asterix's sound.
771	702	*/
772	703
773		static ADDRESS_MAP_START( sound_readmem, ADDRESS_SPACE_PROGRAM, 8 )
774		AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM)
775		AM_RANGE(0x8000, 0xbfff) AM_READ(SMH_BANK2)
776		AM_RANGE(0xc000, 0xdfff) AM_READ(SMH_RAM)
777		AM_RANGE(0xe000, 0xe22f) AM_DEVREAD("konami1", k054539_r)
778		AM_RANGE(0xe230, 0xe3ff) AM_READ(SMH_RAM)
779		AM_RANGE(0xe400, 0xe62f) AM_DEVREAD("konami2", k054539_r)
780		AM_RANGE(0xe630, 0xe7ff) AM_READ(SMH_RAM)
781		AM_RANGE(0xf002, 0xf002) AM_READ(soundlatch_r)
782		AM_RANGE(0xf003, 0xf003) AM_READ(soundlatch2_r)
783		ADDRESS_MAP_END
784
785		static ADDRESS_MAP_START( sound_writemem, ADDRESS_SPACE_PROGRAM, 8 )
	704	static ADDRESS_MAP_START( mystwarr_sound_map, ADDRESS_SPACE_PROGRAM, 8 )
	705	AM_RANGE(0x0000, 0x7fff) AM_ROM
	706	AM_RANGE(0x8000, 0xbfff) AM_ROMBANK(2)
786	707	AM_RANGE(0x0000, 0xbfff) AM_WRITENOP
787		AM_RANGE(0xc000, 0xdfff) AM_WRITE(SMH_RAM)
788		AM_RANGE(0xe000, 0xe22f) AM_DEVWRITE("konami1", k054539_w)
789		AM_RANGE(0xe230, 0xe3ff) AM_WRITE(SMH_RAM)
790		AM_RANGE(0xe400, 0xe62f) AM_DEVWRITE("konami2", k054539_w)
791		AM_RANGE(0xe630, 0xe7ff) AM_WRITE(SMH_RAM)
	708	AM_RANGE(0xc000, 0xdfff) AM_RAM
	709	AM_RANGE(0xe000, 0xe22f) AM_DEVREADWRITE("konami1", k054539_r,k054539_w)
	710	AM_RANGE(0xe230, 0xe3ff) AM_RAM
	711	AM_RANGE(0xe400, 0xe62f) AM_DEVREADWRITE("konami2", k054539_r,k054539_w)
	712	AM_RANGE(0xe630, 0xe7ff) AM_RAM
792	713	AM_RANGE(0xf000, 0xf000) AM_WRITE(soundlatch3_w)
	714	AM_RANGE(0xf002, 0xf002) AM_READ(soundlatch_r)
	715	AM_RANGE(0xf003, 0xf003) AM_READ(soundlatch2_r)
793	716	AM_RANGE(0xf800, 0xf800) AM_WRITE(sound_bankswitch_w)
794	717	AM_RANGE(0xfff0, 0xfff3) AM_WRITENOP   // unknown write
795	718	ADDRESS_MAP_END
796	719
	720
797	721	static const k054539_interface k054539_config =
798	722	{
799	723	"shared"
r4679	r4680
924	848
925	849	/* basic machine hardware */
926	850	MDRV_CPU_ADD("maincpu", M68000, 16000000)   /* 16 MHz (confirmed) */
927		MDRV_CPU_PROGRAM_MAP(readmem,writemem)
	851	MDRV_CPU_PROGRAM_MAP(mystwarr_map,0)
928	852	MDRV_CPU_VBLANK_INT_HACK(mystwarr_interrupt, 3)
929	853
930	854	MDRV_CPU_ADD("soundcpu", Z80, 8000000)
931		MDRV_CPU_PROGRAM_MAP(sound_readmem,sound_writemem)
	855	MDRV_CPU_PROGRAM_MAP(mystwarr_sound_map,0)
932	856	MDRV_CPU_PERIODIC_INT(nmi_line_pulse, 480)
933	857
934	858	MDRV_QUANTUM_TIME(HZ(1920))
r4679	r4680
974	898
975	899	/* basic machine hardware */
976	900	MDRV_CPU_MODIFY("maincpu")
977		MDRV_CPU_PROGRAM_MAP(vsreadmem,vswritemem)
	901	MDRV_CPU_PROGRAM_MAP(viostorm_map,0)
978	902	MDRV_CPU_VBLANK_INT_HACK(metamrph_interrupt, 40)
979	903
980	904	/* video hardware */
r4679	r4680
994	918
995	919	/* basic machine hardware */
996	920	MDRV_CPU_MODIFY("maincpu")
997		MDRV_CPU_PROGRAM_MAP(mmreadmem,mmwritemem)
	921	MDRV_CPU_PROGRAM_MAP(metamrph_map,0)
998	922	MDRV_CPU_VBLANK_INT_HACK(metamrph_interrupt, 40)
999	923
1000	924	/* video hardware */
r4679	r4680
1014	938
1015	939	/* basic machine hardware */
1016	940	MDRV_CPU_MODIFY("maincpu")
1017		MDRV_CPU_PROGRAM_MAP(dddreadmem, dddwritemem)
	941	MDRV_CPU_PROGRAM_MAP(dadandrn_map, 0)
1018	942	MDRV_CPU_VBLANK_INT("screen", ddd_interrupt)
1019	943
1020	944	MDRV_GFXDECODE(dadandrn)
r4679	r4680
1036	960
1037	961	/* basic machine hardware */
1038	962	MDRV_CPU_MODIFY("maincpu")
1039		MDRV_CPU_PROGRAM_MAP(gaiareadmem,gaiawritemem)
	963	MDRV_CPU_PROGRAM_MAP(gaiapols_map,0)
1040	964	MDRV_CPU_VBLANK_INT("screen", ddd_interrupt)
1041	965
1042	966	MDRV_GFXDECODE(gaiapols)
r4679	r4680
1061	985
1062	986	/* basic machine hardware */
1063	987	MDRV_CPU_MODIFY("maincpu")
1064		MDRV_CPU_PROGRAM_MAP(mcreadmem,mcwritemem)
	988	MDRV_CPU_PROGRAM_MAP(martchmp_map,0)
1065	989	MDRV_CPU_VBLANK_INT_HACK(mchamp_interrupt, 2)
1066	990
1067	991	MDRV_VIDEO_ATTRIBUTES(VIDEO_HAS_SHADOWS | VIDEO_HAS_HIGHLIGHTS | VIDEO_UPDATE_BEFORE_VBLANK)

src/mame/drivers/fromance.c

r4679	r4680
180	180
181	181	/* generate an NMI if we're out of data */
182	182	if (!fromance_vclk_left)
183		cpu_set_input_line(device->machine->cpu[1], INPUT_LINE_NMI, PULSE_LINE);
	183	cputag_set_input_line(device->machine, "sub", INPUT_LINE_NMI, PULSE_LINE);
184	184	}
185	185
186	186
r4679	r4680
236	236	*
237	237	*************************************/
238	238
239		static ADDRESS_MAP_START( nekkyoku_readmem_main, ADDRESS_SPACE_PROGRAM, 8 )
240		AM_RANGE(0x0000, 0xbfff) AM_READ(SMH_ROM)
241		AM_RANGE(0xc000, 0xdfff) AM_READ(SMH_RAM)
242		AM_RANGE(0xf000, 0xf000) AM_READ_PORT("SERVICE")
243		AM_RANGE(0xf001, 0xf001) AM_READ(fromance_keymatrix_r)
244		AM_RANGE(0xf002, 0xf002) AM_READ_PORT("COIN")
245		AM_RANGE(0xf003, 0xf003) AM_READ(fromance_busycheck_main_r)
	239	static ADDRESS_MAP_START( nekkyoku_main_map, ADDRESS_SPACE_PROGRAM, 8 )
	240	AM_RANGE(0x0000, 0xbfff) AM_ROM
	241	AM_RANGE(0xc000, 0xdfff) AM_RAM
	242	AM_RANGE(0xf000, 0xf000) AM_READ_PORT("SERVICE") AM_WRITE(fromance_portselect_w)
	243	AM_RANGE(0xf001, 0xf001) AM_READ(fromance_keymatrix_r) AM_WRITENOP
	244	AM_RANGE(0xf002, 0xf002) AM_READ_PORT("COIN") AM_WRITE(fromance_coinctr_w)
	245	AM_RANGE(0xf003, 0xf003) AM_READWRITE(fromance_busycheck_main_r, fromance_commanddata_w)
246	246	AM_RANGE(0xf004, 0xf004) AM_READ_PORT("DSW2")
247	247	AM_RANGE(0xf005, 0xf005) AM_READ_PORT("DSW1")
248	248	ADDRESS_MAP_END
249	249
250		static ADDRESS_MAP_START( nekkyoku_writemem_main, ADDRESS_SPACE_PROGRAM, 8 )
251		AM_RANGE(0x0000, 0xbfff) AM_WRITE(SMH_ROM)
252		AM_RANGE(0xc000, 0xdfff) AM_WRITE(SMH_RAM)
253		AM_RANGE(0xf000, 0xf000) AM_WRITE(fromance_portselect_w)
254		AM_RANGE(0xf001, 0xf001) AM_WRITENOP
255		AM_RANGE(0xf002, 0xf002) AM_WRITE(fromance_coinctr_w)
256		AM_RANGE(0xf003, 0xf003) AM_WRITE(fromance_commanddata_w)
257		ADDRESS_MAP_END
258
259
260		static ADDRESS_MAP_START( fromance_readmem_main, ADDRESS_SPACE_PROGRAM, 8 )
261		AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM)
262		AM_RANGE(0xc000, 0xdfff) AM_READ(SMH_RAM)
	250	static ADDRESS_MAP_START( fromance_main_map, ADDRESS_SPACE_PROGRAM, 8 )
	251	AM_RANGE(0x0000, 0x7fff) AM_ROM
	252	AM_RANGE(0xc000, 0xdfff) AM_RAM
263	253	AM_RANGE(0x9e89, 0x9e89) AM_READNOP         // unknown (idolmj)
264		AM_RANGE(0xe000, 0xe000) AM_READ_PORT("SERVICE")
	254	AM_RANGE(0xe000, 0xe000) AM_READ_PORT("SERVICE") AM_WRITE(fromance_portselect_w)
265	255	AM_RANGE(0xe001, 0xe001) AM_READ(fromance_keymatrix_r)
266		AM_RANGE(0xe002, 0xe002) AM_READ_PORT("COIN")
267		AM_RANGE(0xe003, 0xe003) AM_READ(fromance_busycheck_main_r)
	256	AM_RANGE(0xe002, 0xe002) AM_READ_PORT("COIN") AM_WRITE(fromance_coinctr_w)
	257	AM_RANGE(0xe003, 0xe003) AM_READWRITE(fromance_busycheck_main_r, fromance_commanddata_w)
268	258	AM_RANGE(0xe004, 0xe004) AM_READ_PORT("DSW2")
269	259	AM_RANGE(0xe005, 0xe005) AM_READ_PORT("DSW1")
270	260	ADDRESS_MAP_END
271	261
272		static ADDRESS_MAP_START( fromance_writemem_main, ADDRESS_SPACE_PROGRAM, 8 )
273		AM_RANGE(0x0000, 0x7fff) AM_WRITE(SMH_ROM)
274		AM_RANGE(0xc000, 0xdfff) AM_WRITE(SMH_RAM)
275		AM_RANGE(0xe000, 0xe000) AM_WRITE(fromance_portselect_w)
276		AM_RANGE(0xe002, 0xe002) AM_WRITE(fromance_coinctr_w)
277		AM_RANGE(0xe003, 0xe003) AM_WRITE(fromance_commanddata_w)
278		ADDRESS_MAP_END
279	262
280	263
281
282	264	/*************************************
283	265	*
284	266	*  Slave CPU memory handlers
285	267	*
286	268	*************************************/
287	269
288		static ADDRESS_MAP_START( nekkyoku_readmem_sub, ADDRESS_SPACE_PROGRAM, 8 )
289		AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM)
290		AM_RANGE(0x8000, 0xbfff) AM_READ(SMH_BANK1)
291		AM_RANGE(0xc000, 0xefff) AM_READ(fromance_videoram_r)
292		AM_RANGE(0xf000, 0xf7ff) AM_READ(SMH_RAM)
293		AM_RANGE(0xf800, 0xffff) AM_READ(fromance_paletteram_r)
	270	static ADDRESS_MAP_START( nekkyoku_sub_map, ADDRESS_SPACE_PROGRAM, 8 )
	271	AM_RANGE(0x0000, 0x7fff) AM_ROM
	272	AM_RANGE(0x8000, 0xbfff) AM_ROMBANK(1)
	273	AM_RANGE(0xc000, 0xefff) AM_READWRITE(fromance_videoram_r, fromance_videoram_w)
	274	AM_RANGE(0xf000, 0xf7ff) AM_RAM
	275	AM_RANGE(0xf800, 0xffff) AM_READWRITE(fromance_paletteram_r, fromance_paletteram_w)
294	276	ADDRESS_MAP_END
295	277
296		static ADDRESS_MAP_START( nekkyoku_writemem_sub, ADDRESS_SPACE_PROGRAM, 8 )
297		AM_RANGE(0x0000, 0x7fff) AM_WRITE(SMH_ROM)
298		AM_RANGE(0x8000, 0xbfff) AM_WRITE(SMH_ROM)
299		AM_RANGE(0xc000, 0xefff) AM_WRITE(fromance_videoram_w)
300		AM_RANGE(0xf000, 0xf7ff) AM_WRITE(SMH_RAM)
301		AM_RANGE(0xf800, 0xffff) AM_WRITE(fromance_paletteram_w)
	278	static ADDRESS_MAP_START( fromance_sub_map, ADDRESS_SPACE_PROGRAM, 8 )
	279	AM_RANGE(0x0000, 0x7fff) AM_ROM
	280	AM_RANGE(0x8000, 0xbfff) AM_ROMBANK(1)
	281	AM_RANGE(0xc000, 0xc7ff) AM_RAM
	282	AM_RANGE(0xc800, 0xcfff) AM_READWRITE(fromance_paletteram_r, fromance_paletteram_w)
	283	AM_RANGE(0xd000, 0xffff) AM_READWRITE(fromance_videoram_r, fromance_videoram_w)
302	284	ADDRESS_MAP_END
303	285
304	286
305		static ADDRESS_MAP_START( fromance_readmem_sub, ADDRESS_SPACE_PROGRAM, 8 )
306		AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM)
307		AM_RANGE(0x8000, 0xbfff) AM_READ(SMH_BANK1)
308		AM_RANGE(0xc000, 0xc7ff) AM_READ(SMH_RAM)
309		AM_RANGE(0xc800, 0xcfff) AM_READ(fromance_paletteram_r)
310		AM_RANGE(0xd000, 0xffff) AM_READ(fromance_videoram_r)
311		ADDRESS_MAP_END
312	287
313		static ADDRESS_MAP_START( fromance_writemem_sub, ADDRESS_SPACE_PROGRAM, 8 )
314		AM_RANGE(0x0000, 0x7fff) AM_WRITE(SMH_ROM)
315		AM_RANGE(0x8000, 0xbfff) AM_WRITE(SMH_ROM)
316		AM_RANGE(0xc000, 0xc7ff) AM_WRITE(SMH_RAM)
317		AM_RANGE(0xc800, 0xcfff) AM_WRITE(fromance_paletteram_w)
318		AM_RANGE(0xd000, 0xffff) AM_WRITE(fromance_videoram_w)
319		ADDRESS_MAP_END
320
321
322
323	288	/*************************************
324	289	*
325	290	*  Slave CPU port handlers
r4679	r4680
1012	977
1013	978	/* basic machine hardware */
1014	979	MDRV_CPU_ADD("maincpu", Z80,12000000/2)      /* 6.00 Mhz ? */
1015		MDRV_CPU_PROGRAM_MAP(nekkyoku_readmem_main,nekkyoku_writemem_main)
	980	MDRV_CPU_PROGRAM_MAP(nekkyoku_main_map,0)
1016	981	MDRV_CPU_VBLANK_INT("screen", irq0_line_hold)
1017	982
1018	983	MDRV_CPU_ADD("sub", Z80,12000000/2)      /* 6.00 Mhz ? */
1019		MDRV_CPU_PROGRAM_MAP(nekkyoku_readmem_sub,nekkyoku_writemem_sub)
	984	MDRV_CPU_PROGRAM_MAP(nekkyoku_sub_map,0)
1020	985	MDRV_CPU_IO_MAP(nekkyoku_sub_io_map,0)
1021	986
1022	987	MDRV_MACHINE_RESET(fromance)
r4679	r4680
1050	1015
1051	1016	/* basic machine hardware */
1052	1017	MDRV_CPU_ADD("maincpu", Z80,12000000/2)      /* 6.00 Mhz ? */
1053		MDRV_CPU_PROGRAM_MAP(fromance_readmem_main,fromance_writemem_main)
	1018	MDRV_CPU_PROGRAM_MAP(fromance_main_map,0)
1054	1019	MDRV_CPU_VBLANK_INT("screen", irq0_line_hold)
1055	1020
1056	1021	MDRV_CPU_ADD("sub", Z80,12000000/2)      /* 6.00 Mhz ? */
1057		MDRV_CPU_PROGRAM_MAP(fromance_readmem_sub,fromance_writemem_sub)
	1022	MDRV_CPU_PROGRAM_MAP(fromance_sub_map,0)
1058	1023	MDRV_CPU_IO_MAP(idolmj_sub_io_map,0)
1059	1024
1060	1025	MDRV_MACHINE_RESET(fromance)
r4679	r4680
1088	1053
1089	1054	/* basic machine hardware */
1090	1055	MDRV_CPU_ADD("maincpu", Z80,12000000/2)      /* 6.00 Mhz ? */
1091		MDRV_CPU_PROGRAM_MAP(fromance_readmem_main,fromance_writemem_main)
	1056	MDRV_CPU_PROGRAM_MAP(fromance_main_map,0)
1092	1057	MDRV_CPU_VBLANK_INT("screen", irq0_line_hold)
1093	1058
1094	1059	MDRV_CPU_ADD("sub", Z80,12000000/2)      /* 6.00 Mhz ? */
1095		MDRV_CPU_PROGRAM_MAP(fromance_readmem_sub,fromance_writemem_sub)
	1060	MDRV_CPU_PROGRAM_MAP(fromance_sub_map,0)
1096	1061	MDRV_CPU_IO_MAP(fromance_sub_io_map,0)
1097	1062
1098	1063	MDRV_MACHINE_RESET(fromance)
r4679	r4680
1342	1307	GAME( 1990, daiyogen,        0, fromance, daiyogen, 0, ROT0, "Video System Co.", "Mahjong Daiyogen (Japan)", 0 )
1343	1308	GAME( 1991, nmsengen,        0, fromance, nmsengen, 0, ROT0, "Video System Co.", "Nekketsu Mahjong Sengen! AFTER 5 (Japan)", 0 )
1344	1309	GAME( 1991, fromance,        0, fromance, fromance, 0, ROT0, "Video System Co.", "Idol-Mahjong Final Romance (Japan)", 0 )
1345

src/mame/drivers/dlair.c

r4679	r4680
84	84
85	85	static void dleuro_interrupt(const device_config *device, int state)
86	86	{
87		cpu_set_input_line(device->machine->cpu[0], 0, state);
	87	cputag_set_input_line(device->machine, "maincpu", 0, state);
88	88	}
89	89
90	90
r4679	r4680
194	194	if (laserdisc_type == LASERDISC_TYPE_VARIABLE)
195	195	{
196	196	int newtype = (input_port_read(machine, "DSW2") & 0x08) ? LASERDISC_TYPE_PIONEER_LDV1000 : LASERDISC_TYPE_PIONEER_PR7820;
197		device_set_info_int(laserdisc, LDINFO_INT_TYPE, newtype);
	197	laserdisc_set_type(laserdisc, newtype);
198	198	}
199	199	}
200	200
r4679	r4680
297	297
298	298	static CUSTOM_INPUT( laserdisc_status_r )
299	299	{
300		switch (device_get_info_int(laserdisc, LDINFO_INT_TYPE))
	300	switch (laserdisc_get_type(laserdisc))
301	301	{
302	302	case LASERDISC_TYPE_PIONEER_PR7820:
303	303	return 0;
r4679	r4680
314	314
315	315	static CUSTOM_INPUT( laserdisc_command_r )
316	316	{
317		switch (device_get_info_int(laserdisc, LDINFO_INT_TYPE))
	317	switch (laserdisc_get_type(laserdisc))
318	318	{
319	319	case LASERDISC_TYPE_PIONEER_PR7820:
320	320	return (laserdisc_line_r(laserdisc, LASERDISC_LINE_READY) == ASSERT_LINE) ? 0 : 1;

src/mame/drivers/irobot.c

r4679	r4680
102	102
103	103	static WRITE8_HANDLER( irobot_clearirq_w )
104	104	{
105		cpu_set_input_line(space->machine->cpu[0], M6809_IRQ_LINE ,CLEAR_LINE);
	105	cputag_set_input_line(space->machine, "maincpu", M6809_IRQ_LINE ,CLEAR_LINE);
106	106	}
107	107
108	108
109	109	static WRITE8_HANDLER( irobot_clearfirq_w )
110	110	{
111		cpu_set_input_line(space->machine->cpu[0], M6809_FIRQ_LINE ,CLEAR_LINE);
	111	cputag_set_input_line(space->machine, "maincpu", M6809_FIRQ_LINE ,CLEAR_LINE);
112	112	}
113	113
114	114
r4679	r4680
121	121
122	122	static ADDRESS_MAP_START( readmem, ADDRESS_SPACE_PROGRAM, 8 )
123	123	AM_RANGE(0x0000, 0x07ff) AM_READ(SMH_RAM)
124		AM_RANGE(0x0800, 0x0fff) AM_READ(SMH_BANK2)
	124	AM_RANGE(0x0800, 0x0fff) AM_READ(SMH_BANK(2))
125	125	AM_RANGE(0x1000, 0x103f) AM_READ_PORT("IN0")
126	126	AM_RANGE(0x1040, 0x1040) AM_READ_PORT("IN1")
127	127	AM_RANGE(0x1080, 0x1080) AM_READ(irobot_status_r)
r4679	r4680
131	131	AM_RANGE(0x1400, 0x143f) AM_READ(quad_pokey_r)
132	132	AM_RANGE(0x1c00, 0x1fff) AM_READ(SMH_RAM)
133	133	AM_RANGE(0x2000, 0x3fff) AM_READ(irobot_sharedmem_r)
134		AM_RANGE(0x4000, 0x5fff) AM_READ(SMH_BANK1)
	134	AM_RANGE(0x4000, 0x5fff) AM_READ(SMH_BANK(1))
135	135	AM_RANGE(0x6000, 0xffff) AM_READ(SMH_ROM)
136	136	ADDRESS_MAP_END
137	137
138	138
139	139	static ADDRESS_MAP_START( writemem, ADDRESS_SPACE_PROGRAM, 8 )
140	140	AM_RANGE(0x0000, 0x07ff) AM_WRITE(SMH_RAM)
141		AM_RANGE(0x0800, 0x0fff) AM_WRITE(SMH_BANK2)
	141	AM_RANGE(0x0800, 0x0fff) AM_WRITE(SMH_BANK(2))
142	142	AM_RANGE(0x1100, 0x1100) AM_WRITE(irobot_clearirq_w)
143	143	AM_RANGE(0x1140, 0x1140) AM_WRITE(irobot_statwr_w)
144	144	AM_RANGE(0x1180, 0x1180) AM_WRITE(irobot_out0_w)

src/mame/drivers/skykid.c

r4679	r4680
80	80	static WRITE8_HANDLER( skykid_subreset_w )
81	81	{
82	82	int bit = !BIT(offset,11);
83		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_RESET, bit ? CLEAR_LINE : ASSERT_LINE);
	83	cputag_set_input_line(space->machine, "mcu", INPUT_LINE_RESET, bit ? CLEAR_LINE : ASSERT_LINE);
84	84	}
85	85
86	86	static WRITE8_HANDLER( skykid_bankswitch_w )
r4679	r4680
91	91	static WRITE8_HANDLER( skykid_irq_1_ctrl_w )
92	92	{
93	93	int bit = !BIT(offset,11);
94		cpu_interrupt_enable(space->machine->cpu[0],bit);
	94	cpu_interrupt_enable(cputag_get_cpu(space->machine, "maincpu"), bit);
95	95	if (!bit)
96		cpu_set_input_line(space->machine->cpu[0], 0, CLEAR_LINE);
	96	cputag_set_input_line(space->machine, "maincpu", 0, CLEAR_LINE);
97	97	}
98	98
99	99	static WRITE8_HANDLER( skykid_irq_2_ctrl_w )
100	100	{
101	101	int bit = !BIT(offset,13);
102		cpu_interrupt_enable(space->machine->cpu[1],bit);
	102	cpu_interrupt_enable(cputag_get_cpu(space->machine, "mcu"), bit);
103	103	if (!bit)
104		cpu_set_input_line(space->machine->cpu[1], 0, CLEAR_LINE);
	104	cputag_set_input_line(space->machine, "mcu", 0, CLEAR_LINE);
105	105	}
106	106
107	107	static MACHINE_START( skykid )
r4679	r4680
115	115
116	116
117	117	static ADDRESS_MAP_START( skykid_map, ADDRESS_SPACE_PROGRAM, 8 )
118		AM_RANGE(0x0000, 0x1fff) AM_READ(SMH_BANK1)            /* banked ROM */
	118	AM_RANGE(0x0000, 0x1fff) AM_READ(SMH_BANK(1))            /* banked ROM */
119	119	AM_RANGE(0x2000, 0x2fff) AM_READWRITE(skykid_videoram_r,skykid_videoram_w) AM_BASE(&skykid_videoram)/* Video RAM (background) */
120	120	AM_RANGE(0x4000, 0x47ff) AM_READWRITE(skykid_textram_r,skykid_textram_w) AM_BASE(&skykid_textram)   /* video RAM (text layer) */
121	121	AM_RANGE(0x4800, 0x5fff) AM_RAM AM_BASE(&skykid_spriteram)   /* RAM + Sprite RAM */

src/mame/drivers/klax.c

r4679	r4680
33	33
34	34	static void update_interrupts(running_machine *machine)
35	35	{
36		cpu_set_input_line(machine->cpu[0], 4, atarigen_video_int_state || atarigen_scanline_int_state ? ASSERT_LINE : CLEAR_LINE);
	36	cputag_set_input_line(machine, "maincpu", 4, atarigen_video_int_state || atarigen_scanline_int_state ? ASSERT_LINE : CLEAR_LINE);
37	37	}
38	38
39	39
r4679	r4680
41	41	{
42	42	/* generate 32V signals */
43	43	if ((scanline & 32) == 0 && !(input_port_read(screen->machine, "P1") & 0x800))
44		atarigen_scanline_int_gen(screen->machine->cpu[0]);
	44	atarigen_scanline_int_gen(cputag_get_cpu(screen->machine, "maincpu"));
45	45	}
46	46
47	47
r4679	r4680
74	74	*
75	75	*************************************/
76	76
77		static ADDRESS_MAP_START( main_readmem, ADDRESS_SPACE_PROGRAM, 16 )
78		AM_RANGE(0x000000, 0x03ffff) AM_READ(SMH_ROM)
79		AM_RANGE(0x0e0000, 0x0e0fff) AM_READ(atarigen_eeprom_r)
80		AM_RANGE(0x260000, 0x260001) AM_READ_PORT("P1")
81		AM_RANGE(0x260002, 0x260003) AM_READ_PORT("P2")
82		AM_RANGE(0x270000, 0x270001) AM_DEVREAD8("oki", okim6295_r, 0x00ff)
83		AM_RANGE(0x3e0000, 0x3e07ff) AM_READ(SMH_RAM)
84		AM_RANGE(0x3f0000, 0x3f3fff) AM_READ(SMH_RAM)
85		ADDRESS_MAP_END
86
87
88		static ADDRESS_MAP_START( main_writemem, ADDRESS_SPACE_PROGRAM, 16 )
89		AM_RANGE(0x000000, 0x03ffff) AM_WRITE(SMH_ROM)
90		AM_RANGE(0x0e0000, 0x0e0fff) AM_WRITE(atarigen_eeprom_w) AM_BASE(&atarigen_eeprom) AM_SIZE(&atarigen_eeprom_size)
	77	static ADDRESS_MAP_START( klax_map, ADDRESS_SPACE_PROGRAM, 16 )
	78	AM_RANGE(0x000000, 0x03ffff) AM_ROM
	79	AM_RANGE(0x0e0000, 0x0e0fff) AM_READWRITE(atarigen_eeprom_r,atarigen_eeprom_w) AM_BASE(&atarigen_eeprom) AM_SIZE(&atarigen_eeprom_size)
91	80	AM_RANGE(0x1f0000, 0x1fffff) AM_WRITE(atarigen_eeprom_enable_w)
92		AM_RANGE(0x260000, 0x260001) AM_WRITE(klax_latch_w)
93		AM_RANGE(0x270000, 0x270001) AM_DEVWRITE8("oki", okim6295_w, 0x00ff)
	81	AM_RANGE(0x260000, 0x260001) AM_READ_PORT("P1") AM_WRITE(klax_latch_w)
	82	AM_RANGE(0x260002, 0x260003) AM_READ_PORT("P2")
	83	AM_RANGE(0x270000, 0x270001) AM_DEVREADWRITE8("oki", okim6295_r,okim6295_w, 0x00ff)
94	84	AM_RANGE(0x2e0000, 0x2e0001) AM_WRITE(watchdog_reset16_w)
95	85	AM_RANGE(0x360000, 0x360001) AM_WRITE(interrupt_ack_w)
96		AM_RANGE(0x3e0000, 0x3e07ff) AM_WRITE(atarigen_expanded_666_paletteram_w) AM_BASE(&paletteram16)
97		AM_RANGE(0x3f0000, 0x3f0f7f) AM_WRITE(atarigen_playfield_w) AM_BASE(&atarigen_playfield)
98		AM_RANGE(0x3f0f80, 0x3f0fff) AM_WRITE(atarimo_0_slipram_w) AM_BASE(&atarimo_0_slipram)
99		AM_RANGE(0x3f1000, 0x3f1fff) AM_WRITE(atarigen_playfield_upper_w) AM_BASE(&atarigen_playfield_upper)
100		AM_RANGE(0x3f2000, 0x3f27ff) AM_WRITE(atarimo_0_spriteram_w) AM_BASE(&atarimo_0_spriteram)
101		AM_RANGE(0x3f2800, 0x3f3fff) AM_WRITE(SMH_RAM)
	86	AM_RANGE(0x3e0000, 0x3e07ff) AM_RAM_WRITE(atarigen_expanded_666_paletteram_w) AM_BASE(&paletteram16)
	87	AM_RANGE(0x3f0000, 0x3f0f7f) AM_RAM_WRITE(atarigen_playfield_w) AM_BASE(&atarigen_playfield)
	88	AM_RANGE(0x3f0f80, 0x3f0fff) AM_RAM_WRITE(atarimo_0_slipram_w) AM_BASE(&atarimo_0_slipram)
	89	AM_RANGE(0x3f1000, 0x3f1fff) AM_RAM_WRITE(atarigen_playfield_upper_w) AM_BASE(&atarigen_playfield_upper)
	90	AM_RANGE(0x3f2000, 0x3f27ff) AM_RAM_WRITE(atarimo_0_spriteram_w) AM_BASE(&atarimo_0_spriteram)
	91	AM_RANGE(0x3f2800, 0x3f3fff) AM_RAM
102	92	ADDRESS_MAP_END
103	93
104	94
105
106	95	/*************************************
107	96	*
108	97	*  Port definitions
r4679	r4680
170	159
171	160	/* basic machine hardware */
172	161	MDRV_CPU_ADD("maincpu", M68000, ATARI_CLOCK_14MHz/2)
173		MDRV_CPU_PROGRAM_MAP(main_readmem,main_writemem)
	162	MDRV_CPU_PROGRAM_MAP(klax_map,0)
174	163	MDRV_CPU_VBLANK_INT("screen", atarigen_video_int_gen)
175	164
176	165	MDRV_MACHINE_RESET(klax)

src/mame/drivers/quizpani.c

r4679	r4680
47	47	extern VIDEO_START( quizpani );
48	48	extern VIDEO_UPDATE( quizpani );
49	49
50		static ADDRESS_MAP_START( quizpani_readmem, ADDRESS_SPACE_PROGRAM, 16 )
51		AM_RANGE(0x000000, 0x07ffff) AM_READ(SMH_ROM)
	50	static ADDRESS_MAP_START( quizpani_map, ADDRESS_SPACE_PROGRAM, 16 )
	51	AM_RANGE(0x000000, 0x07ffff) AM_ROM
52	52	AM_RANGE(0x100000, 0x100001) AM_READ_PORT("SYSTEM")
53	53	AM_RANGE(0x100002, 0x100003) AM_READ_PORT("P1_P2")
54	54	AM_RANGE(0x100008, 0x100009) AM_READ_PORT("DSW1")
55	55	AM_RANGE(0x10000a, 0x10000b) AM_READ_PORT("DSW2")
56		AM_RANGE(0x104000, 0x104001) AM_DEVREAD8("oki", okim6295_r, 0x00ff)
57		AM_RANGE(0x108000, 0x1083ff) AM_READ(SMH_RAM)
58		AM_RANGE(0x110000, 0x113fff) AM_READ(SMH_RAM)
59		AM_RANGE(0x180000, 0x18ffff) AM_READ(SMH_RAM)
60		AM_RANGE(0x200000, 0x33ffff) AM_READ(SMH_ROM)
61		ADDRESS_MAP_END
62
63		static ADDRESS_MAP_START( quizpani_writemem, ADDRESS_SPACE_PROGRAM, 16 )
64		AM_RANGE(0x000000, 0x07ffff) AM_WRITE(SMH_ROM)
65	56	AM_RANGE(0x100014, 0x100015) AM_WRITENOP
66		AM_RANGE(0x100016, 0x100017) AM_WRITENOP /* IRQ eanble? */
	57	AM_RANGE(0x100016, 0x100017) AM_WRITENOP /* IRQ enable? */
67	58	AM_RANGE(0x100018, 0x100019) AM_WRITE(quizpani_tilesbank_w)
68		AM_RANGE(0x104000, 0x104001) AM_DEVWRITE8("oki", okim6295_w, 0x00ff)
	59	AM_RANGE(0x104000, 0x104001) AM_DEVREADWRITE8("oki", okim6295_r,okim6295_w, 0x00ff)
69	60	AM_RANGE(0x104020, 0x104027) AM_WRITE(NMK112_okibank_lsb_w)
70		AM_RANGE(0x108000, 0x1083ff) AM_WRITE(paletteram16_RRRRGGGGBBBBRGBx_word_w) AM_BASE(&paletteram16)
	61	AM_RANGE(0x108000, 0x1083ff) AM_RAM_WRITE(paletteram16_RRRRGGGGBBBBRGBx_word_w) AM_BASE(&paletteram16)
71	62	AM_RANGE(0x108400, 0x1085ff) AM_WRITENOP
72		AM_RANGE(0x10c000, 0x10c007) AM_WRITE(SMH_RAM) AM_BASE(&quizpani_scrollreg)
	63	AM_RANGE(0x10c000, 0x10c007) AM_RAM AM_BASE(&quizpani_scrollreg)
73	64	AM_RANGE(0x10c008, 0x10c403) AM_WRITENOP
74		AM_RANGE(0x110000, 0x113fff) AM_WRITE(quizpani_bg_videoram_w) AM_BASE(&quizpani_bg_videoram)
75		AM_RANGE(0x11c000, 0x11ffff) AM_WRITE(quizpani_txt_videoram_w) AM_BASE(&quizpani_txt_videoram)
76		AM_RANGE(0x180000, 0x18ffff) AM_WRITE(SMH_RAM)
77		AM_RANGE(0x200000, 0x33ffff) AM_WRITE(SMH_ROM)
	65	AM_RANGE(0x110000, 0x113fff) AM_RAM_WRITE(quizpani_bg_videoram_w) AM_BASE(&quizpani_bg_videoram)
	66	AM_RANGE(0x11c000, 0x11ffff) AM_RAM_WRITE(quizpani_txt_videoram_w) AM_BASE(&quizpani_txt_videoram)
	67	AM_RANGE(0x180000, 0x18ffff) AM_RAM
	68	AM_RANGE(0x200000, 0x33ffff) AM_ROM
78	69	ADDRESS_MAP_END
79	70
	71
80	72	static INPUT_PORTS_START( quizpani )
81	73	PORT_START("SYSTEM")
82	74	PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_COIN1 )
r4679	r4680
249	241
250	242	static MACHINE_DRIVER_START( quizpani )
251	243	MDRV_CPU_ADD("maincpu", M68000, 10000000)
252		MDRV_CPU_PROGRAM_MAP(quizpani_readmem,quizpani_writemem)
	244	MDRV_CPU_PROGRAM_MAP(quizpani_map,0)
253	245	MDRV_CPU_VBLANK_INT("screen", irq4_line_hold)
254	246	MDRV_CPU_PERIODIC_INT(irq1_line_hold,164) // music tempo
255	247

src/mame/drivers/halleys.c

r4679	r4680
1004	1004	if (i==0 || (i==4 && !data))
1005	1005	{
1006	1006	blitter_busy = 0;
1007		if (firq_level) cpu_set_input_line(space->machine->cpu[0], M6809_FIRQ_LINE, ASSERT_LINE); // make up delayed FIRQ's
	1007	if (firq_level) cputag_set_input_line(space->machine, "maincpu", M6809_FIRQ_LINE, ASSERT_LINE); // make up delayed FIRQ's
1008	1008	}
1009	1009	else
1010	1010	{
r4679	r4680
1505	1505	fftail = (fftail + 1) & (MAX_SOUNDS - 1);
1506	1506	latch_delay = (latch_data) ? 0 : 4;
1507	1507	soundlatch_w( cpu_get_address_space(device, ADDRESS_SPACE_PROGRAM), 0, latch_data);
1508		cpu_set_input_line(device->machine->cpu[1], INPUT_LINE_NMI, PULSE_LINE);
	1508	cputag_set_input_line(device->machine, "audiocpu", INPUT_LINE_NMI, PULSE_LINE);
1509	1509	}
1510	1510
1511	1511	// clear collision list of this frame unconditionally
r4679	r4680
1545	1545	fftail = (fftail + 1) & (MAX_SOUNDS - 1);
1546	1546	latch_delay = (latch_data) ? 0 : 4;
1547	1547	soundlatch_w(cpu_get_address_space(device, ADDRESS_SPACE_PROGRAM), 0, latch_data);
1548		cpu_set_input_line(device->machine->cpu[1], INPUT_LINE_NMI, PULSE_LINE);
	1548	cputag_set_input_line(device->machine, "audiocpu", INPUT_LINE_NMI, PULSE_LINE);
1549	1549	}
1550	1550	break;
1551	1551
r4679	r4680
1573	1573	io_ram[0x9c] = data;
1574	1574
1575	1575	if (firq_level) firq_level--;
1576		cpu_set_input_line(space->machine->cpu[0], M6809_FIRQ_LINE, CLEAR_LINE);
	1576	cputag_set_input_line(space->machine, "maincpu", M6809_FIRQ_LINE, CLEAR_LINE);
1577	1577	}
1578	1578
1579	1579
r4679	r4680
1622	1622	//**************************************************************************
1623	1623	// Memory Maps
1624	1624
1625		static ADDRESS_MAP_START( readmem, ADDRESS_SPACE_PROGRAM, 8 )
1626		AM_RANGE(0x0000, 0x0fff) AM_READ(blitter_r)
1627		AM_RANGE(0x1000, 0xefff) AM_READ(SMH_ROM)
1628		AM_RANGE(0xf000, 0xfeff) AM_READ(SMH_RAM)        // work ram
	1625	static ADDRESS_MAP_START( halleys_map, ADDRESS_SPACE_PROGRAM, 8 )
	1626	AM_RANGE(0x0000, 0x0fff) AM_READWRITE(blitter_r, blitter_w) AM_BASE(&blitter_ram) AM_SIZE(&blitter_ramsize)
	1627	AM_RANGE(0x1f00, 0x1fff) AM_WRITE(bgtile_w)      // background tiles?(Ben Bero Beh only)
	1628	AM_RANGE(0x1000, 0xefff) AM_ROM
	1629	AM_RANGE(0xf000, 0xfeff) AM_RAM               // work ram
1629	1630
1630	1631	AM_RANGE(0xff66, 0xff66) AM_READ(collision_id_r) // HACK: collision detection bypass(Halley's Comet only)
1631	1632	AM_RANGE(0xff71, 0xff71) AM_READ(blitter_status_r)
1632	1633	AM_RANGE(0xff80, 0xff83) AM_READ(io_mirror_r)
	1634	AM_RANGE(0xff8a, 0xff8a) AM_WRITE(soundcommand_w)
1633	1635	AM_RANGE(0xff90, 0xff90) AM_READ_PORT("IN0")   // coin/start
1634	1636	AM_RANGE(0xff91, 0xff91) AM_READ_PORT("IN1")   // player 1
1635	1637	AM_RANGE(0xff92, 0xff92) AM_READ_PORT("IN2")   // player 2
r4679	r4680
1638	1640	AM_RANGE(0xff95, 0xff95) AM_READ_PORT("DSW1")   // dipswitch 4
1639	1641	AM_RANGE(0xff96, 0xff96) AM_READ_PORT("DSW2")   // dipswitch 3
1640	1642	AM_RANGE(0xff97, 0xff97) AM_READ_PORT("DSW3")   // dipswitch 2
1641		AM_RANGE(0xff00, 0xffbf) AM_READ(SMH_RAM)      // I/O read fall-through
	1643	AM_RANGE(0xff9c, 0xff9c) AM_WRITE(firq_ack_w)
	1644	AM_RANGE(0xff00, 0xffbf) AM_RAM AM_BASE(&io_ram) AM_SIZE(&io_ramsize)   // I/O write fall-through
1642	1645
1643		AM_RANGE(0xffc0, 0xffdf) AM_READ(SMH_RAM)      // palette read
	1646	AM_RANGE(0xffc0, 0xffdf) AM_RAM_WRITE(halleys_paletteram_IIRRGGBB_w) AM_BASE(&paletteram)
1644	1647	AM_RANGE(0xffe0, 0xffff) AM_READ(vector_r)
1645	1648	ADDRESS_MAP_END
1646	1649
1647	1650
1648		static ADDRESS_MAP_START( writemem, ADDRESS_SPACE_PROGRAM, 8 )
1649		AM_RANGE(0x0000, 0x0fff) AM_WRITE(blitter_w) AM_BASE(&blitter_ram) AM_SIZE(&blitter_ramsize)
1650		AM_RANGE(0x1f00, 0x1fff) AM_WRITE(bgtile_w)      // background tiles?(Ben Bero Beh only)
1651		AM_RANGE(0x1000, 0xefff) AM_WRITE(SMH_ROM)
1652		AM_RANGE(0xf000, 0xfeff) AM_WRITE(SMH_RAM)      // work ram
1653
1654		AM_RANGE(0xff8a, 0xff8a) AM_WRITE(soundcommand_w)
1655		AM_RANGE(0xff9c, 0xff9c) AM_WRITE(firq_ack_w)
1656		AM_RANGE(0xff00, 0xffbf) AM_WRITE(SMH_RAM) AM_BASE(&io_ram) AM_SIZE(&io_ramsize)   // I/O write fall-through
1657
1658		AM_RANGE(0xffc0, 0xffdf) AM_WRITE(halleys_paletteram_IIRRGGBB_w) AM_BASE(&paletteram)
1659		AM_RANGE(0xffe0, 0xffff) AM_WRITE(SMH_ROM)
1660		ADDRESS_MAP_END
1661
1662
1663		static ADDRESS_MAP_START( sound_readmem, ADDRESS_SPACE_PROGRAM, 8 )
1664		AM_RANGE(0x0000, 0x3fff) AM_READ(SMH_ROM)
1665		AM_RANGE(0x4000, 0x47ff) AM_READ(SMH_RAM)
1666		AM_RANGE(0x4801, 0x4801) AM_DEVREAD("ay2", ay8910_r)
1667		AM_RANGE(0x4803, 0x4803) AM_DEVREAD("ay3", ay8910_r)
1668		AM_RANGE(0x4805, 0x4805) AM_DEVREAD("ay4", ay8910_r)
	1651	static ADDRESS_MAP_START( sound_map, ADDRESS_SPACE_PROGRAM, 8 )
	1652	AM_RANGE(0x0000, 0x3fff) AM_ROM
	1653	AM_RANGE(0x4000, 0x47ff) AM_RAM
	1654	AM_RANGE(0x4801, 0x4801) AM_DEVREADWRITE("ay2", ay8910_r, ay8910_address_data_w)
	1655	AM_RANGE(0x4803, 0x4803) AM_DEVREADWRITE("ay3", ay8910_r, ay8910_address_data_w)
	1656	AM_RANGE(0x4805, 0x4805) AM_DEVREADWRITE("ay4", ay8910_r, ay8910_address_data_w)
1669	1657	AM_RANGE(0x5000, 0x5000) AM_READ(soundlatch_r)
1670		AM_RANGE(0xe000, 0xefff) AM_READ(SMH_ROM)      // space for diagnostic ROM
	1658	AM_RANGE(0xe000, 0xefff) AM_ROM // space for diagnostic ROM
1671	1659	ADDRESS_MAP_END
1672	1660
1673	1661
1674		static ADDRESS_MAP_START( sound_writemem, ADDRESS_SPACE_PROGRAM, 8 )
1675		AM_RANGE(0x0000, 0x3fff) AM_WRITE(SMH_ROM)
1676		AM_RANGE(0x4000, 0x47ff) AM_WRITE(SMH_RAM)
1677		AM_RANGE(0x4800, 0x4801) AM_DEVWRITE("ay2", ay8910_address_data_w)
1678		AM_RANGE(0x4802, 0x4803) AM_DEVWRITE("ay3", ay8910_address_data_w)
1679		AM_RANGE(0x4804, 0x4805) AM_DEVWRITE("ay4", ay8910_address_data_w)
1680		AM_RANGE(0xe000, 0xefff) AM_WRITE(SMH_ROM)
1681		ADDRESS_MAP_END
1682
1683
1684	1662	//**************************************************************************
1685	1663	// Port Maps
1686	1664
r4679	r4680
1946	1924
1947	1925	static MACHINE_DRIVER_START( halleys )
1948	1926	MDRV_CPU_ADD("maincpu", M6809, XTAL_19_968MHz/12) /* verified on pcb */
1949		MDRV_CPU_PROGRAM_MAP(readmem, writemem)
	1927	MDRV_CPU_PROGRAM_MAP(halleys_map,0)
1950	1928	MDRV_CPU_VBLANK_INT_HACK(halleys_interrupt, 4)
1951	1929
1952	1930	MDRV_CPU_ADD("audiocpu", Z80, XTAL_6MHz/2) /* verified on pcb */
1953		MDRV_CPU_PROGRAM_MAP(sound_readmem, sound_writemem)
	1931	MDRV_CPU_PROGRAM_MAP(sound_map,0)
1954	1932	MDRV_CPU_PERIODIC_INT(irq0_line_hold, (double)6000000/(4*16*16*10*16))
1955	1933
1956	1934	MDRV_MACHINE_RESET(halleys)
r4679	r4680
2148	2126
2149	2127
2150	2128	// allocate memory for unpacked graphics
2151		buf = auto_malloc(0x100000);
	2129	buf = auto_alloc_array(machine, UINT8, 0x100000);
2152	2130	gfx_plane02 = buf;
2153	2131	gfx_plane13 = buf + 0x80000;
2154	2132
2155	2133
2156	2134	// allocate memory for render layers
2157		buf = auto_malloc(SCREEN_BYTESIZE * MAX_LAYERS);
	2135	buf = auto_alloc_array(machine, UINT8, SCREEN_BYTESIZE * MAX_LAYERS);
2158	2136	for (i=0; i<MAX_LAYERS; buf+=SCREEN_BYTESIZE, i++) render_layer[i] = (UINT16*)buf;
2159	2137
2160	2138
2161	2139	// allocate memory for pre-processed ROMs
2162		gfx1_base = auto_malloc(0x20000);
	2140	gfx1_base = auto_alloc_array(machine, UINT8, 0x20000);
2163	2141
2164	2142
2165	2143	// allocate memory for alpha table
2166		alpha_table = auto_malloc(sizeof(UINT32) * 0x10000);
	2144	alpha_table = auto_alloc_array(machine, UINT32, 0x10000);
2167	2145
2168	2146
2169	2147	// allocate memory for internal palette
2170		internal_palette = auto_malloc(sizeof(UINT32) * PALETTE_SIZE);
	2148	internal_palette = auto_alloc_array(machine, UINT32, PALETTE_SIZE);
2171	2149
2172	2150
2173	2151	// allocate memory for hardware collision list
2174		collision_list = auto_malloc(MAX_SPRITES);
	2152	collision_list = auto_alloc_array(machine, UINT8, MAX_SPRITES);
2175	2153
2176	2154
2177	2155	// decrypt main program ROM

src/mame/drivers/gomoku.c

r4679	r4680
38	38	}
39	39
40	40
41		static ADDRESS_MAP_START( readmem_gomoku, ADDRESS_SPACE_PROGRAM, 8 )
42		AM_RANGE(0x0000, 0x47ff) AM_READ(SMH_ROM)
43		AM_RANGE(0x4800, 0x4fff) AM_READ(SMH_RAM)
44		AM_RANGE(0x5000, 0x53ff) AM_READ(SMH_RAM)
45		AM_RANGE(0x5400, 0x57ff) AM_READ(SMH_RAM)
46		AM_RANGE(0x5800, 0x58ff) AM_READ(SMH_RAM)
47		AM_RANGE(0x7800, 0x7807) AM_READ(input_port_r)
48		ADDRESS_MAP_END
49
50		static ADDRESS_MAP_START( writemem_gomoku, ADDRESS_SPACE_PROGRAM, 8 )
51		AM_RANGE(0x0000, 0x47ff) AM_WRITE(SMH_ROM)
52		AM_RANGE(0x4800, 0x4fff) AM_WRITE(SMH_RAM)
53		AM_RANGE(0x5000, 0x53ff) AM_WRITE(gomoku_videoram_w) AM_BASE(&gomoku_videoram)
54		AM_RANGE(0x5400, 0x57ff) AM_WRITE(gomoku_colorram_w) AM_BASE(&gomoku_colorram)
55		AM_RANGE(0x5800, 0x58ff) AM_WRITE(gomoku_bgram_w) AM_BASE(&gomoku_bgram)
	41	static ADDRESS_MAP_START( gomoku_map, ADDRESS_SPACE_PROGRAM, 8 )
	42	AM_RANGE(0x0000, 0x47ff) AM_ROM
	43	AM_RANGE(0x4800, 0x4fff) AM_RAM
	44	AM_RANGE(0x5000, 0x53ff) AM_RAM_WRITE(gomoku_videoram_w) AM_BASE(&gomoku_videoram)
	45	AM_RANGE(0x5400, 0x57ff) AM_RAM_WRITE(gomoku_colorram_w) AM_BASE(&gomoku_colorram)
	46	AM_RANGE(0x5800, 0x58ff) AM_RAM_WRITE(gomoku_bgram_w) AM_BASE(&gomoku_bgram)
56	47	AM_RANGE(0x6000, 0x601f) AM_WRITE(gomoku_sound1_w) AM_BASE(&gomoku_soundregs1)
57	48	AM_RANGE(0x6800, 0x681f) AM_WRITE(gomoku_sound2_w) AM_BASE(&gomoku_soundregs2)
58	49	AM_RANGE(0x7000, 0x7000) AM_WRITENOP
59	50	AM_RANGE(0x7001, 0x7001) AM_WRITE(gomoku_flipscreen_w)
60	51	AM_RANGE(0x7002, 0x7002) AM_WRITE(gomoku_bg_dispsw_w)
61	52	AM_RANGE(0x7003, 0x7007) AM_WRITENOP
	53	AM_RANGE(0x7800, 0x7807) AM_READ(input_port_r)
62	54	AM_RANGE(0x7800, 0x7800) AM_WRITENOP
63	55	ADDRESS_MAP_END
64	56
r4679	r4680
128	120	static MACHINE_DRIVER_START( gomoku )
129	121	/* basic machine hardware */
130	122	MDRV_CPU_ADD("maincpu", Z80, 18432000/12)       /* 1.536 MHz ? */
131		MDRV_CPU_PROGRAM_MAP(readmem_gomoku, writemem_gomoku)
	123	MDRV_CPU_PROGRAM_MAP(gomoku_map,0)
132	124	MDRV_CPU_VBLANK_INT("screen", irq0_line_hold)
133	125
134	126	/* video hardware */

src/mame/drivers/djmain.c

r4679	r4680
238	238	if (pending_vb_int && !DISABLE_VB_INT)
239	239	{
240	240	pending_vb_int = 0;
241		cpu_set_input_line(space->machine->cpu[0], M68K_IRQ_4, HOLD_LINE);
	241	cputag_set_input_line(space->machine, "maincpu", M68K_IRQ_4, HOLD_LINE);
242	242	}
243	243	}
244	244	}
r4679	r4680
450	450	if (state != CLEAR_LINE)
451	451	{
452	452	//logerror("IDE interrupt asserted\n");
453		cpu_set_input_line(device->machine->cpu[0], M68K_IRQ_1, HOLD_LINE);
	453	cputag_set_input_line(device->machine, "maincpu", M68K_IRQ_1, HOLD_LINE);
454	454	}
455	455	else
456	456	{
457	457	//logerror("IDE interrupt cleared\n");
458		cpu_set_input_line(device->machine->cpu[0], M68K_IRQ_1, CLEAR_LINE);
	458	cputag_set_input_line(device->machine, "maincpu", M68K_IRQ_1, CLEAR_LINE);
459	459	}
460	460	}
461	461

src/mame/drivers/ssfindo.c

r4679	r4680
259	259	PS7500_IO[IRQSTA]|=0x20;
260	260	if(PS7500_IO[IRQMSKA]&0x20)
261	261	{
262		generic_pulse_irq_line(machine->cpu[0], ARM7_IRQ_LINE);
	262	generic_pulse_irq_line(cputag_get_cpu(machine, "maincpu"), ARM7_IRQ_LINE);
263	263	}
264	264	}
265	265
r4679	r4680
278	278	PS7500_IO[IRQSTA]|=0x40;
279	279	if(PS7500_IO[IRQMSKA]&0x40)
280	280	{
281		generic_pulse_irq_line(machine->cpu[0], ARM7_IRQ_LINE);
	281	generic_pulse_irq_line(cputag_get_cpu(machine, "maincpu"), ARM7_IRQ_LINE);
282	282	}
283	283	}
284	284

src/mame/drivers/firetrk.c

r4679	r4680
27	27	watchdog_enable(machine, !enable);
28	28
29	29	/* change CPU clock speed according to service switch change */
30		cpu_set_clock(machine->cpu[0], enable ? (MASTER_CLOCK/12) : (MASTER_CLOCK/16));
	30	cputag_set_clock(machine, "maincpu", enable ? (MASTER_CLOCK/12) : (MASTER_CLOCK/16));
31	31	}
32	32
33	33
r4679	r4680
66	66	{
67	67	int scanline = param;
68	68
69		generic_pulse_irq_line(machine->cpu[0], 0);
	69	generic_pulse_irq_line(cputag_get_cpu(machine, "maincpu"), 0);
70	70
71	71	/* IRQs are generated by inverse 16V signal */
72	72	scanline += 32;

src/mame/drivers/peplus.c

r4679	r4680
659	659	static VIDEO_START( peplus )
660	660	{
661	661	bg_tilemap = tilemap_create(machine, get_bg_tile_info, tilemap_scan_rows, 8, 8, 40, 25);
662		palette_ram = auto_malloc(0x3000);
	662	palette_ram = auto_alloc_array(machine, UINT8, 0x3000);
663	663	memset(palette_ram, 0, 0x3000);
664		palette_ram2 = auto_malloc(0x3000);
	664	palette_ram2 = auto_alloc_array(machine, UINT8, 0x3000);
665	665	memset(palette_ram2, 0, 0x3000);
666	666	}
667	667
r4679	r4680
791	791	static CUSTOM_INPUT( peplus_input_r )
792	792	{
793	793	UINT8 inp_ret = 0x00;
794		UINT8 inp_read = input_port_read(field->port->machine, param);
	794	UINT8 inp_read = input_port_read(field->port->machine, (const char *)param);
795	795
796	796	if (inp_read & 0x01) inp_ret = 0x01;
797	797	if (inp_read & 0x02) inp_ret = 0x02;

src/mame/drivers/segas24.c

r4679	r4680
689	689	int changed = resetcontrol ^ prev_resetcontrol;
690	690	if(changed & 2) {
691	691	if(resetcontrol & 2) {
692		cpu_set_input_line(machine->cpu[1], INPUT_LINE_HALT, CLEAR_LINE);
693		cpu_set_input_line(machine->cpu[1], INPUT_LINE_RESET, PULSE_LINE);
	692	cputag_set_input_line(machine, "sub", INPUT_LINE_HALT, CLEAR_LINE);
	693	cputag_set_input_line(machine, "sub", INPUT_LINE_RESET, PULSE_LINE);
694	694	//          mame_printf_debug("enable 2nd cpu!\n");
695	695	//          debugger_break(machine);
696	696	s24_fd1094_machine_init(machine);
697	697
698	698	} else
699		cpu_set_input_line(machine->cpu[1], INPUT_LINE_HALT, ASSERT_LINE);
	699	cputag_set_input_line(machine, "sub", INPUT_LINE_HALT, ASSERT_LINE);
700	700	}
701	701	if(changed & 4)
702	702	devtag_reset(machine, "ym");
r4679	r4680
802	802	{
803	803	irq_timer_pend0 = irq_timer_pend1 = 1;
804	804	if(irq_allow0 & (1 << IRQ_TIMER))
805		cpu_set_input_line(machine->cpu[0], IRQ_TIMER+1, ASSERT_LINE);
	805	cputag_set_input_line(machine, "maincpu", IRQ_TIMER+1, ASSERT_LINE);
806	806	if(irq_allow1 & (1 << IRQ_TIMER))
807		cpu_set_input_line(machine->cpu[1], IRQ_TIMER+1, ASSERT_LINE);
	807	cputag_set_input_line(machine, "sub", IRQ_TIMER+1, ASSERT_LINE);
808	808	}
809	809
810	810	static TIMER_CALLBACK( irq_timer_clear_cb )
811	811	{
812	812	irq_sprite = irq_vblank = 0;
813		cpu_set_input_line(machine->cpu[0], IRQ_VBLANK+1, CLEAR_LINE);
814		cpu_set_input_line(machine->cpu[0], IRQ_SPRITE+1, CLEAR_LINE);
815		cpu_set_input_line(machine->cpu[1], IRQ_VBLANK+1, CLEAR_LINE);
816		cpu_set_input_line(machine->cpu[1], IRQ_SPRITE+1, CLEAR_LINE);
	813	cputag_set_input_line(machine, "maincpu", IRQ_VBLANK+1, CLEAR_LINE);
	814	cputag_set_input_line(machine, "maincpu", IRQ_SPRITE+1, CLEAR_LINE);
	815	cputag_set_input_line(machine, "sub", IRQ_VBLANK+1, CLEAR_LINE);
	816	cputag_set_input_line(machine, "sub", IRQ_SPRITE+1, CLEAR_LINE);
817	817	}
818	818
819	819	static void irq_init(running_machine *machine)
r4679	r4680
860	860	case 2:
861	861	irq_allow0 = data;
862	862	irq_timer_pend0 = 0;
863		cpu_set_input_line(space->machine->cpu[0], IRQ_TIMER+1, CLEAR_LINE);
864		cpu_set_input_line(space->machine->cpu[0], IRQ_YM2151+1, irq_yms && (irq_allow0 & (1 << IRQ_YM2151)) ? ASSERT_LINE : CLEAR_LINE);
865		cpu_set_input_line(space->machine->cpu[0], IRQ_VBLANK+1, irq_vblank && (irq_allow0 & (1 << IRQ_VBLANK)) ? ASSERT_LINE : CLEAR_LINE);
866		cpu_set_input_line(space->machine->cpu[0], IRQ_SPRITE+1, irq_sprite && (irq_allow0 & (1 << IRQ_SPRITE)) ? ASSERT_LINE : CLEAR_LINE);
	863	cputag_set_input_line(space->machine, "maincpu", IRQ_TIMER+1, CLEAR_LINE);
	864	cputag_set_input_line(space->machine, "maincpu", IRQ_YM2151+1, irq_yms && (irq_allow0 & (1 << IRQ_YM2151)) ? ASSERT_LINE : CLEAR_LINE);
	865	cputag_set_input_line(space->machine, "maincpu", IRQ_VBLANK+1, irq_vblank && (irq_allow0 & (1 << IRQ_VBLANK)) ? ASSERT_LINE : CLEAR_LINE);
	866	cputag_set_input_line(space->machine, "maincpu", IRQ_SPRITE+1, irq_sprite && (irq_allow0 & (1 << IRQ_SPRITE)) ? ASSERT_LINE : CLEAR_LINE);
867	867	break;
868	868	case 3:
869	869	irq_allow1 = data;
870	870	irq_timer_pend1 = 0;
871		cpu_set_input_line(space->machine->cpu[1], IRQ_TIMER+1, CLEAR_LINE);
872		cpu_set_input_line(space->machine->cpu[1], IRQ_YM2151+1, irq_yms && (irq_allow1 & (1 << IRQ_YM2151)) ? ASSERT_LINE : CLEAR_LINE);
873		cpu_set_input_line(space->machine->cpu[1], IRQ_VBLANK+1, irq_vblank && (irq_allow1 & (1 << IRQ_VBLANK)) ? ASSERT_LINE : CLEAR_LINE);
874		cpu_set_input_line(space->machine->cpu[1], IRQ_SPRITE+1, irq_sprite && (irq_allow1 & (1 << IRQ_SPRITE)) ? ASSERT_LINE : CLEAR_LINE);
	871	cputag_set_input_line(space->machine, "sub", IRQ_TIMER+1, CLEAR_LINE);
	872	cputag_set_input_line(space->machine, "sub", IRQ_YM2151+1, irq_yms && (irq_allow1 & (1 << IRQ_YM2151)) ? ASSERT_LINE : CLEAR_LINE);
	873	cputag_set_input_line(space->machine, "sub", IRQ_VBLANK+1, irq_vblank && (irq_allow1 & (1 << IRQ_VBLANK)) ? ASSERT_LINE : CLEAR_LINE);
	874	cputag_set_input_line(space->machine, "sub", IRQ_SPRITE+1, irq_sprite && (irq_allow1 & (1 << IRQ_SPRITE)) ? ASSERT_LINE : CLEAR_LINE);
875	875	break;
876	876	}
877	877	}
r4679	r4680
900	900	}
901	901	case 2:
902	902	irq_timer_pend0 = 0;
903		cpu_set_input_line(space->machine->cpu[0], IRQ_TIMER+1, CLEAR_LINE);
	903	cputag_set_input_line(space->machine, "maincpu", IRQ_TIMER+1, CLEAR_LINE);
904	904	break;
905	905	case 3:
906	906	irq_timer_pend1 = 0;
907		cpu_set_input_line(space->machine->cpu[1], IRQ_TIMER+1, CLEAR_LINE);
	907	cputag_set_input_line(space->machine, "sub", IRQ_TIMER+1, CLEAR_LINE);
908	908	break;
909	909	}
910	910	return 0xffff;
r4679	r4680
927	927	mask = 1 << irq;
928	928
929	929	if(irq_allow0 & mask)
930		cpu_set_input_line(device->machine->cpu[0], 1+irq, ASSERT_LINE);
	930	cputag_set_input_line(device->machine, "maincpu", 1+irq, ASSERT_LINE);
931	931
932	932	if(irq_allow1 & mask)
933		cpu_set_input_line(device->machine->cpu[1], 1+irq, ASSERT_LINE);
	933	cputag_set_input_line(device->machine, "sub", 1+irq, ASSERT_LINE);
934	934
935	935	if(!cpu_getiloops(device)) {
936	936	// Ensure one index pulse every 20 frames
r4679	r4680
945	945	static void irq_ym(const device_config *device, int irq)
946	946	{
947	947	irq_yms = irq;
948		cpu_set_input_line(device->machine->cpu[0], IRQ_YM2151+1, irq_yms && (irq_allow0 & (1 << IRQ_YM2151)) ? ASSERT_LINE : CLEAR_LINE);
949		cpu_set_input_line(device->machine->cpu[1], IRQ_YM2151+1, irq_yms && (irq_allow1 & (1 << IRQ_YM2151)) ? ASSERT_LINE : CLEAR_LINE);
	948	cputag_set_input_line(device->machine, "maincpu", IRQ_YM2151+1, irq_yms && (irq_allow0 & (1 << IRQ_YM2151)) ? ASSERT_LINE : CLEAR_LINE);
	949	cputag_set_input_line(device->machine, "sub", IRQ_YM2151+1, irq_yms && (irq_allow1 & (1 << IRQ_YM2151)) ? ASSERT_LINE : CLEAR_LINE);
950	950	}
951	951
952	952
r4679	r4680
1095	1095
1096	1096	static MACHINE_RESET( system24 )
1097	1097	{
1098		cpu_set_input_line(machine->cpu[1], INPUT_LINE_HALT, ASSERT_LINE);
	1098	cputag_set_input_line(machine, "sub", INPUT_LINE_HALT, ASSERT_LINE);
1099	1099	prev_resetcontrol = resetcontrol = 0x06;
1100	1100	fdc_init();
1101	1101	curbank = 0;

src/mame/drivers/mustache.c

r4679	r4680
176	176
177	177	static TIMER_CALLBACK( clear_irq_cb )
178	178	{
179		cpu_set_input_line(machine->cpu[0], 0, CLEAR_LINE);
	179	cputag_set_input_line(machine, "maincpu", 0, CLEAR_LINE);
180	180	}
181	181
182	182	static INTERRUPT_GEN( assert_irq )
r4679	r4680
265	265	int G2 = memory_region_length(machine, "gfx2")/2;
266	266	UINT8 *gfx1 = memory_region(machine, "gfx1");
267	267	UINT8 *gfx2 = memory_region(machine, "gfx2");
268		UINT8 *buf=malloc_or_die(G2*2);
	268	UINT8 *buf=alloc_array_or_die(UINT8, G2*2);
269	269
270	270	/* BG data lines */
271	271	for (i=0;i<G1; i++)

src/mame/drivers/namcoic.c

r4679	r4680
57	57	{
58	58	int i;
59	59	mTilemapInfo.gfxbank = gfxbank;
60		mTilemapInfo.maskBaseAddr = maskBaseAddr;
	60	mTilemapInfo.maskBaseAddr = (UINT8 *)maskBaseAddr;
61	61	mTilemapInfo.cb = cb;
62		mTilemapInfo.videoram = auto_malloc( 0x10000*2 );
	62	mTilemapInfo.videoram = auto_alloc_array(machine, UINT16,  0x10000 );
63	63
64	64	/* four scrolling tilemaps */
65	65	mTilemapInfo.tmap[0] = tilemap_create(machine, get_tile_info0,tilemap_scan_rows,8,8,64,64);
r4679	r4680
910	910	}
911	911
912	912	void
913		namco_obj_init( int gfxbank, int palXOR, int (*codeToTile)( int code ) )
	913	namco_obj_init( running_machine *machine, int gfxbank, int palXOR, int (*codeToTile)( int code ) )
914	914	{
915	915	mGfxC355 = gfxbank;
916	916	mPalXOR = palXOR;
r4679	r4680
922	922	{
923	923	mpCodeToTile = DefaultCodeToTile;
924	924	}
925		spriteram16 = auto_malloc(0x20000);
	925	spriteram16 = auto_alloc_array(machine, UINT16, 0x20000/2);
926	926	memset( spriteram16, 0, 0x20000 ); /* needed for Nebulas Ray */
927	927	memset( mSpritePos,0x00,sizeof(mSpritePos) );
928	928	} /* namcosC355_init */
r4679	r4680
1130	1130	mRozGfxBank = gfxbank;
1131	1131	mRozMaskRegion = maskregion;
1132	1132
1133		rozbank16 = auto_malloc(0x10);
1134		rozvideoram16 = auto_malloc(0x20000);
1135		rozcontrol16 = auto_malloc(0x20);
	1133	rozbank16 = auto_alloc_array(machine, UINT16, 0x10/2);
	1134	rozvideoram16 = auto_alloc_array(machine, UINT16, 0x20000/2);
	1135	rozcontrol16 = auto_alloc_array(machine, UINT16, 0x20/2);
1136	1136
1137	1137	for( i=0; i<ROZ_TILEMAP_COUNT; i++ )
1138	1138	{
r4679	r4680
1580	1580	mbRoadNeedTransparent = 0;
1581	1581	mRoadGfxBank = gfxbank;
1582	1582
1583		mpRoadRAM = auto_malloc(0x20000);
	1583	mpRoadRAM = auto_alloc_array(machine, UINT16, 0x20000/2);
1584	1584
1585	1585	pGfx = gfx_element_alloc( machine, &RoadTileLayout, 0x10000+(UINT8 *)mpRoadRAM, 0x3f, 0xf00);
1586	1586
r4679	r4680
1603	1603	void
1604	1604	namco_road_draw(running_machine *machine, bitmap_t *bitmap, const rectangle *cliprect, int pri )
1605	1605	{
1606		const UINT8 *clut = (void *)memory_region(machine, "user3");
	1606	const UINT8 *clut = (const UINT8 *)memory_region(machine, "user3");
1607	1607	bitmap_t *pSourceBitmap;
1608	1608	unsigned yscroll;
1609	1609	int i;

src/mame/drivers/ddayjlc.c

r4679	r4680
173	173	static WRITE8_HANDLER( sound_w )
174	174	{
175	175	soundlatch_w(space,offset,data);
176		cpu_set_input_line_and_vector(space->machine->cpu[1], 0, HOLD_LINE, 0xff);
	176	cputag_set_input_line_and_vector(space->machine, "audiocpu", 0, HOLD_LINE, 0xff);
177	177	}
178	178
179	179	static WRITE8_HANDLER( i8257_CH0_w )
r4679	r4680
556	556	{
557	557	UINT32 oldaddr, newadr, length,j;
558	558	UINT8 *src, *dst, *temp;
559		temp = malloc_or_die(0x10000);
	559	temp = alloc_array_or_die(UINT8, 0x10000);
560	560	src = temp;
561	561	dst = memory_region(machine, "gfx1");
562	562	length = memory_region_length(machine, "gfx1");

src/mame/drivers/segas16a.c

r4679	r4680
246	246
247	247	static MACHINE_RESET( system16a )
248	248	{
249		fd1094_machine_init(machine->cpu[0]);
	249	fd1094_machine_init(cputag_get_cpu(machine, "maincpu"));
250	250
251	251	/* if we have a fake i8751 handler, disable the actual 8751 */
252	252	if (i8751_vblank_hook != NULL)
r4679	r4680
380	380	0= Sound is disabled
381	381	1= sound is enabled
382	382	*/
383		cpu_set_input_line(device->machine->cpu[1], INPUT_LINE_NMI, (data & 0x80) ? CLEAR_LINE : ASSERT_LINE);
	383	cputag_set_input_line(device->machine, "soundcpu", INPUT_LINE_NMI, (data & 0x80) ? CLEAR_LINE : ASSERT_LINE);
384	384	segaic16_tilemap_set_colscroll(device->machine, 0, ~data & 0x04);
385	385	segaic16_tilemap_set_rowscroll(device->machine, 0, ~data & 0x02);
386	386	}
r4679	r4680
432	432	D1 = /RESET line on 7751
433	433	D0 = /IRQ line on 7751
434	434	*/
435		cpu_set_input_line(device->machine->cpu[2], INPUT_LINE_RESET, (data & 0x01) ? CLEAR_LINE : ASSERT_LINE);
436		cpu_set_input_line(device->machine->cpu[2], 0, (data & 0x02) ? CLEAR_LINE : ASSERT_LINE);
	435	cputag_set_input_line(device->machine, "n7751", INPUT_LINE_RESET, (data & 0x01) ? CLEAR_LINE : ASSERT_LINE);
	436	cputag_set_input_line(device->machine, "n7751", 0, (data & 0x02) ? CLEAR_LINE : ASSERT_LINE);
437	437	cpuexec_boost_interleave(device->machine, attotime_zero, ATTOTIME_IN_USEC(100));
438	438	}
439	439
r4679	r4680
512	512	UINT8 min = workram[0x202/2] & 0xff;
513	513
514	514	/* signal a VBLANK to the main CPU */
515		cpu_set_input_line(machine->cpu[0], 4, HOLD_LINE);
	515	cputag_set_input_line(machine, "maincpu", 4, HOLD_LINE);
516	516
517	517	/* out of time? set the flag */
518	518	if (tick == 0 && sec == 0 && min == 0)
r4679	r4680
551	551
552	552	static void quartet_i8751_sim(running_machine *machine)
553	553	{
554		const address_space *space = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM);
	554	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
555	555	/* signal a VBLANK to the main CPU */
556		cpu_set_input_line(machine->cpu[0], 4, HOLD_LINE);
	556	cputag_set_input_line(machine, "maincpu", 4, HOLD_LINE);
557	557
558	558	/* X scroll values */
559	559	segaic16_textram_0_w(space, 0xff8/2, workram[0x0d14/2], 0xffff);

src/mame/drivers/neogeo.c

r4679	r4680
312	312
313	313	static void update_interrupts(running_machine *machine)
314	314	{
315		cpu_set_input_line(machine->cpu[0], 1, vblank_interrupt_pending ? ASSERT_LINE : CLEAR_LINE);
316		cpu_set_input_line(machine->cpu[0], 2, display_position_interrupt_pending ? ASSERT_LINE : CLEAR_LINE);
317		cpu_set_input_line(machine->cpu[0], 3, irq3_pending ? ASSERT_LINE : CLEAR_LINE);
	315	cputag_set_input_line(machine, "maincpu", 1, vblank_interrupt_pending ? ASSERT_LINE : CLEAR_LINE);
	316	cputag_set_input_line(machine, "maincpu", 2, display_position_interrupt_pending ? ASSERT_LINE : CLEAR_LINE);
	317	cputag_set_input_line(machine, "maincpu", 3, irq3_pending ? ASSERT_LINE : CLEAR_LINE);
318	318	}
319	319
320	320
r4679	r4680
400	400
401	401	static void audio_cpu_irq(const device_config *device, int assert)
402	402	{
403		cpu_set_input_line(device->machine->cpu[1], 0, assert ? ASSERT_LINE : CLEAR_LINE);
	403	cputag_set_input_line(device->machine, "audiocpu", 0, assert ? ASSERT_LINE : CLEAR_LINE);
404	404	}
405	405
406	406
407	407	static void audio_cpu_assert_nmi(running_machine *machine)
408	408	{
409		cpu_set_input_line(machine->cpu[1], INPUT_LINE_NMI, ASSERT_LINE);
	409	cputag_set_input_line(machine, "audiocpu", INPUT_LINE_NMI, ASSERT_LINE);
410	410	}
411	411
412	412
413	413	static WRITE8_HANDLER( audio_cpu_clear_nmi_w )
414	414	{
415		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_NMI, CLEAR_LINE);
	415	cputag_set_input_line(space->machine, "audiocpu", INPUT_LINE_NMI, CLEAR_LINE);
416	416	}
417	417
418	418
r4679	r4680
550	550
551	551	static CUSTOM_INPUT( get_calendar_status )
552	552	{
553		const address_space *space = cpu_get_address_space(field->port->machine->cpu[0], ADDRESS_SPACE_PROGRAM);
	553	const address_space *space = cputag_get_address_space(field->port->machine, "maincpu", ADDRESS_SPACE_PROGRAM);
554	554	return (pd4990a_databit_r(space, 0) << 1) | pd4990a_testbit_r(space, 0);
555	555	}
556	556
r4679	r4680
601	601	#define MEMCARD_SIZE   0x0800
602	602
603	603
604		static void memcard_init(void)
605		{
606		memcard_data = auto_malloc(MEMCARD_SIZE);
607		memset(memcard_data, 0, MEMCARD_SIZE);
608		}
609
610
611	604	static CUSTOM_INPUT( get_memcard_status )
612	605	{
613	606	/* D0 and D1 are memcard presence indicators, D2 indicates memcard
r4679	r4680
708	701	{
709	702	UINT32 ret = audio_result;
710	703
711		//  if (LOG_CPU_COMM) logerror("MAIN CPU PC %06x: audio_result_r %02x\n", cpu_get_pc(field->port->machine->cpu[0]), ret);
	704	//  if (LOG_CPU_COMM) logerror("MAIN CPU PC %06x: audio_result_r %02x\n", cpu_get_pc(cputag_get_cpu(field->port->machine, "maincpu")), ret);
712	705
713	706	return ret;
714	707	}
r4679	r4680
775	768
776	769	static void main_cpu_banking_init(running_machine *machine)
777	770	{
778		const address_space *mainspace = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM);
	771	const address_space *mainspace = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
779	772
780	773	/* create vector banks */
781	774	memory_configure_bank(machine, NEOGEO_BANK_VECTORS, 0, 1, memory_region(machine, "mainbios"), 0);
r4679	r4680
859	852	{
860	853	audio_cpu_rom_source_last = audio_cpu_rom_source;
861	854
862		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_RESET, PULSE_LINE);
	855	cputag_set_input_line(space->machine, "audiocpu", INPUT_LINE_RESET, PULSE_LINE);
863	856
864	857	if (LOG_AUDIO_CPU_BANKING) logerror("Audio CPU PC %03x: selectign %s ROM\n", cpu_get_pc(space->cpu), audio_cpu_rom_source ? "CARTRIDGE" : "BIOS");
865	858	}
r4679	r4680
909	902	set_audio_cpu_banking(machine);
910	903
911	904	audio_cpu_rom_source_last = 0;
912		set_audio_cpu_rom_source(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0);
	905	set_audio_cpu_rom_source(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0);
913	906	}
914	907
915	908
r4679	r4680
1061	1054	_set_main_cpu_bank_address(machine);
1062	1055	_set_main_cpu_vector_table_source(machine);
1063	1056	set_audio_cpu_banking(machine);
1064		_set_audio_cpu_rom_source(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM));
	1057	_set_audio_cpu_rom_source(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM));
1065	1058	set_outputs();
1066	1059	}
1067	1060
r4679	r4680
1082	1075	calendar_init(machine);
1083	1076
1084	1077	/* initialize the memcard data structure */
1085		memcard_init();
	1078	memcard_data = auto_alloc_array_clear(machine, UINT8, MEMCARD_SIZE);
1086	1079
1087	1080	/* start with an IRQ3 - but NOT on a reset */
1088	1081	irq3_pending = 1;
r4679	r4680
1122	1115	static MACHINE_RESET( neogeo )
1123	1116	{
1124	1117	offs_t offs;
1125		const address_space *space = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM);
	1118	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
1126	1119
1127	1120	/* reset system control registers */
1128	1121	for (offs = 0; offs < 8; offs++)
1129	1122	system_control_w(space, offs, 0, 0x00ff);
1130		device_reset(machine->cpu[0]);
	1123	device_reset(cputag_get_cpu(machine, "maincpu"));
1131	1124
1132	1125	neogeo_reset_rng();
1133	1126

src/mame/drivers/konamigx.c

r4679	r4680
441	441	if (konamigx_wrport1_1 & 0x10)
442	442	{
443	443	gx_rdport1_3 &= ~8;
444		cpu_set_input_line(space->machine->cpu[0], 4, HOLD_LINE);
	444	cputag_set_input_line(space->machine, "maincpu", 4, HOLD_LINE);
445	445	}
446	446	}
447	447	else
r4679	r4680
553	553	{
554	554	// enable 68k
555	555	// clear the halt condition and reset the 68000
556		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_HALT, CLEAR_LINE);
557		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_RESET, PULSE_LINE);
	556	cputag_set_input_line(space->machine, "soundcpu", INPUT_LINE_HALT, CLEAR_LINE);
	557	cputag_set_input_line(space->machine, "soundcpu", INPUT_LINE_RESET, PULSE_LINE);
558	558	}
559	559	else
560	560	{
561	561	// disable 68k
562		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_HALT, ASSERT_LINE);
	562	cputag_set_input_line(space->machine, "soundcpu", INPUT_LINE_HALT, ASSERT_LINE);
563	563	}
564	564
565	565	K053246_set_OBJCHA_line((data&0x100000) ? ASSERT_LINE : CLEAR_LINE);
r4679	r4680
622	622	// vblank interrupt ACK
623	623	if (ACCESSING_BITS_24_31)
624	624	{
625		cpu_set_input_line(space->machine->cpu[0], 1, CLEAR_LINE);
	625	cputag_set_input_line(space->machine, "maincpu", 1, CLEAR_LINE);
626	626	gx_syncen |= 0x20;
627	627	}
628	628
629	629	// hblank interrupt ACK
630	630	if (ACCESSING_BITS_8_15)
631	631	{
632		cpu_set_input_line(space->machine->cpu[0], 2, CLEAR_LINE);
	632	cputag_set_input_line(space->machine, "maincpu", 2, CLEAR_LINE);
633	633	gx_syncen |= 0x40;
634	634	}
635	635	}
r4679	r4680
659	659
660	660	// lower OBJINT-REQ flag and trigger interrupt
661	661	gx_rdport1_3 &= ~0x80;
662		cpu_set_input_line(machine->cpu[0], 3, HOLD_LINE);
	662	cputag_set_input_line(machine, "maincpu", 3, HOLD_LINE);
663	663	}
664	664	}
665	665
r4679	r4680
817	817
818	818	if (reg == 7)
819	819	{
820		cpu_set_input_line(machine->cpu[1], 1, HOLD_LINE);
	820	cputag_set_input_line(machine, "soundcpu", 1, HOLD_LINE);
821	821	}
822	822	}
823	823
r4679	r4680
1090	1090	if (konamigx_wrport1_1 & 0x10)
1091	1091	{
1092	1092	gx_rdport1_3 &= ~8;
1093		cpu_set_input_line(space->machine->cpu[0], 4, HOLD_LINE);
	1093	cputag_set_input_line(space->machine, "maincpu", 4, HOLD_LINE);
1094	1094	}
1095	1095
1096	1096	// don't accidentally do a phony command
r4679	r4680
1234	1234
1235	1235	static READ16_HANDLER(tms57002_data_word_r)
1236	1236	{
1237		return tms57002_data_r(space->machine->cpu[2], 0);
	1237	return tms57002_data_r(cputag_get_cpu(space->machine, "dasp"), 0);
1238	1238	}
1239	1239
1240	1240	static WRITE16_HANDLER(tms57002_data_word_w)
1241	1241	{
1242	1242	if (ACCESSING_BITS_0_7)
1243		tms57002_data_w(space->machine->cpu[2], 0, data);
	1243	tms57002_data_w(cputag_get_cpu(space->machine, "dasp"), 0, data);
1244	1244	}
1245	1245
1246	1246	static READ16_HANDLER(tms57002_status_word_r)
1247	1247	{
1248		return (tms57002_dready_r(space->machine->cpu[2], 0) ? 4 : 0) |
1249		(tms57002_empty_r(space->machine->cpu[2], 0) ? 1 : 0);
	1248	return (tms57002_dready_r(cputag_get_cpu(space->machine, "dasp"), 0) ? 4 : 0) |
	1249	(tms57002_empty_r(cputag_get_cpu(space->machine, "dasp"), 0) ? 1 : 0);
1250	1250	}
1251	1251
1252	1252	static WRITE16_HANDLER(tms57002_control_word_w)
1253	1253	{
1254	1254	if (ACCESSING_BITS_0_7)
1255	1255	{
1256		tms57002_pload_w(space->machine->cpu[2], 0, data & 4);
1257		tms57002_cload_w(space->machine->cpu[2], 0, data & 8);
1258		cpu_set_input_line(space->machine->cpu[2], INPUT_LINE_RESET, !(data & 16) ? ASSERT_LINE : CLEAR_LINE);
	1256	tms57002_pload_w(cputag_get_cpu(space->machine, "dasp"), 0, data & 4);
	1257	tms57002_cload_w(cputag_get_cpu(space->machine, "dasp"), 0, data & 8);
	1258	cputag_set_input_line(space->machine, "dasp", INPUT_LINE_RESET, !(data & 16) ? ASSERT_LINE : CLEAR_LINE);
1259	1259	}
1260	1260	}
1261	1261
r4679	r4680
3332	3332	memset(sndto020, 0, 16);
3333	3333
3334	3334	// sound CPU initially disabled?
3335		cpu_set_input_line(machine->cpu[1], INPUT_LINE_HALT, ASSERT_LINE);
3336		cpu_set_input_line(machine->cpu[2], INPUT_LINE_RESET, ASSERT_LINE);
	3335	cputag_set_input_line(machine, "sound", INPUT_LINE_HALT, ASSERT_LINE);
	3336	cputag_set_input_line(machine, "dasp", INPUT_LINE_RESET, ASSERT_LINE);
3337	3337
3338	3338	if (!strcmp(machine->gamedrv->name, "tkmmpzdm"))
3339	3339	{
r4679	r4680
3431	3431	switch (gameDefs[i].special)
3432	3432	{
3433	3433	case 1:   // LE2 guns
3434		memory_install_read32_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xd44000, 0xd44003, 0, 0, le2_gun_H_r );
3435		memory_install_read32_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xd44004, 0xd44007, 0, 0, le2_gun_V_r );
	3434	memory_install_read32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xd44000, 0xd44003, 0, 0, le2_gun_H_r );
	3435	memory_install_read32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xd44004, 0xd44007, 0, 0, le2_gun_V_r );
3436	3436	break;
3437	3437
3438	3438	case 2:   // tkmmpzdm hack
r4679	r4680
3468	3468	break;
3469	3469
3470	3470	case 7:   // install type 4 Xilinx protection for non-type 3/4 games
3471		memory_install_write32_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xcc0000, 0xcc0007, 0, 0, type4_prot_w );
	3471	memory_install_write32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xcc0000, 0xcc0007, 0, 0, type4_prot_w );
3472	3472	break;
3473	3473
3474	3474	case 8: // tbyahhoo
r4679	r4680
3488	3488	switch (readback)
3489	3489	{
3490	3490	case BPP5:
3491		memory_install_read32_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xd4a000, 0xd4a00f, 0, 0, gx5bppspr_r);
	3491	memory_install_read32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xd4a000, 0xd4a00f, 0, 0, gx5bppspr_r);
3492	3492	break;
3493	3493
3494	3494	case BPP66:
3495		memory_install_read32_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xd00000, 0xd01fff, 0, 0, K056832_6bpp_rom_long_r);
	3495	memory_install_read32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xd00000, 0xd01fff, 0, 0, K056832_6bpp_rom_long_r);
3496	3496
3497	3497	case BPP6:
3498		memory_install_read32_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xd4a000, 0xd4a00f, 0, 0, gx6bppspr_r);
	3498	memory_install_read32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xd4a000, 0xd4a00f, 0, 0, gx6bppspr_r);
3499	3499	break;
3500	3500	}
3501	3501

src/mame/drivers/segahang.c

r4679	r4680
264	264
265	265	static WRITE8_DEVICE_HANDLER( sound_latch_w )
266	266	{
267		const address_space *space = cpu_get_address_space(device->machine->cpu[0], ADDRESS_SPACE_PROGRAM);
	267	const address_space *space = cputag_get_address_space(device->machine, "maincpu", ADDRESS_SPACE_PROGRAM);
268	268	soundlatch_w(space, offset, data);
269	269	}
270	270
r4679	r4680
301	301	/* D2 : SCONT1 - Tilemap origin bit 1 */
302	302	/* D1 : SCONT0 - Tilemap origin bit 0 */
303	303	/* D0 : MUTE (1= audio on, 0= audio off) */
304		cpu_set_input_line(device->machine->cpu[2], INPUT_LINE_NMI, (data & 0x80) ? CLEAR_LINE : ASSERT_LINE);
	304	cputag_set_input_line(device->machine, "soundcpu", INPUT_LINE_NMI, (data & 0x80) ? CLEAR_LINE : ASSERT_LINE);
305	305	segaic16_tilemap_set_colscroll(device->machine, 0, ~data & 0x04);
306	306	segaic16_tilemap_set_rowscroll(device->machine, 0, ~data & 0x02);
307	307	sound_global_enable(data & 0x01);
r4679	r4680
314	314	/* D6 : INTR line on second CPU */
315	315	/* D5 : RESET line on second CPU */
316	316	/* D3-D2 : ADC_SELECT */
317		cpu_set_input_line(device->machine->cpu[1], 4, (data & 0x40) ? CLEAR_LINE : ASSERT_LINE);
318		cpu_set_input_line(device->machine->cpu[1], INPUT_LINE_RESET, (data & 0x20) ? ASSERT_LINE : CLEAR_LINE);
	317	cputag_set_input_line(device->machine, "sub", 4, (data & 0x40) ? CLEAR_LINE : ASSERT_LINE);
	318	cputag_set_input_line(device->machine, "sub", INPUT_LINE_RESET, (data & 0x20) ? ASSERT_LINE : CLEAR_LINE);
319	319	adc_select = (data >> 2) & 3;
320	320	}
321	321
r4679	r4680
368	368
369	369	static void sound_irq(const device_config *device, int irq)
370	370	{
371		cpu_set_input_line(device->machine->cpu[2], 0, irq ? ASSERT_LINE : CLEAR_LINE);
	371	cputag_set_input_line(device->machine, "soundcpu", 0, irq ? ASSERT_LINE : CLEAR_LINE);
372	372	}
373	373
374	374
r4679	r4680
1733	1733	{
1734	1734	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
1735	1735	UINT16 *rom = (UINT16 *)memory_region(machine, "maincpu");
1736		UINT16 *decrypt = (UINT16 *)auto_malloc(0x40000);
	1736	UINT16 *decrypt = auto_alloc_array(machine, UINT16, 0x40000/2);
1737	1737
1738	1738	hangon_generic_init();
1739	1739	memory_set_decrypted_region(space, 0x000000, 0x03ffff, decrypt);
r4679	r4680
1747	1747	{
1748	1748	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
1749	1749	UINT16 *rom = (UINT16 *)memory_region(machine, "maincpu");
1750		UINT16 *decrypt = (UINT16 *)auto_malloc(0x40000);
	1750	UINT16 *decrypt = auto_alloc_array(machine, UINT16, 0x40000/2);
1751	1751
1752	1752	hangon_generic_init();
1753	1753	memory_set_decrypted_region(space, 0x000000, 0x03ffff, decrypt);

src/mame/drivers/sprcros2.c

r4679	r4680
70	70	PALETTE_INIT( sprcros2 );
71	71	VIDEO_START( sprcros2 );
72	72	VIDEO_UPDATE( sprcros2 );
73		static UINT8 *sprcros2_sharedram;
74	73	UINT8 sprcros2_m_port7 = 0;
75	74	static UINT8 sprcros2_s_port3 = 0;
76	75
77		static READ8_HANDLER( sprcros2_sharedram_r )
78		{
79		return sprcros2_sharedram[offset];
80		}
81	76
82		static WRITE8_HANDLER( sprcros2_sharedram_w )
83		{
84		sprcros2_sharedram[offset]=data;
85		}
86	77
87	78	static WRITE8_HANDLER( sprcros2_m_port7_w )
88	79	{
89		UINT8 *RAM = memory_region(space->machine, "maincpu");
	80	UINT8 *RAM = memory_region(space->machine, "master");
90	81
91	82	//76543210
92	83	//x------- unused
r4679	r4680
107	98
108	99	static WRITE8_HANDLER( sprcros2_s_port3_w )
109	100	{
110		UINT8 *RAM = memory_region(space->machine, "audiocpu");
	101	UINT8 *RAM = memory_region(space->machine, "slave");
111	102
112	103	//76543210
113	104	//xxxx---- unused
r4679	r4680
121	112	sprcros2_s_port3 = data;
122	113	}
123	114
124		static ADDRESS_MAP_START( sprcros2_m_readmem, ADDRESS_SPACE_PROGRAM, 8 )
125		AM_RANGE(0x0000, 0xbfff) AM_READ(SMH_ROM)
126		AM_RANGE(0xc000, 0xdfff) AM_READ(SMH_BANK1)
127		AM_RANGE(0xe000, 0xf7ff) AM_READ(SMH_RAM)
128		AM_RANGE(0xf800, 0xffff) AM_READ(SMH_RAM)                  //shared with slave cpu
	115	static ADDRESS_MAP_START( sprcros2_master_map, ADDRESS_SPACE_PROGRAM, 8 )
	116	AM_RANGE(0x0000, 0xbfff) AM_ROM
	117	AM_RANGE(0xc000, 0xdfff) AM_ROMBANK(1)
	118	AM_RANGE(0xe000, 0xe7ff) AM_RAM_WRITE(sprcros2_fgvideoram_w) AM_BASE(&sprcros2_fgvideoram)
	119	AM_RANGE(0xe800, 0xe817) AM_RAM                  //always zero
	120	AM_RANGE(0xe818, 0xe83f) AM_RAM AM_BASE(&sprcros2_spriteram) AM_SIZE(&sprcros2_spriteram_size)
	121	AM_RANGE(0xe840, 0xefff) AM_RAM                  //always zero
	122	AM_RANGE(0xf000, 0xf7ff) AM_RAM
	123	AM_RANGE(0xf800, 0xffff) AM_RAM AM_SHARE(1)         //shared with slave cpu
129	124	ADDRESS_MAP_END
130	125
131		static ADDRESS_MAP_START( sprcros2_m_writemem, ADDRESS_SPACE_PROGRAM, 8 )
132		AM_RANGE(0x0000, 0xbfff) AM_WRITE(SMH_ROM)
133		AM_RANGE(0xc000, 0xdfff) AM_WRITE(SMH_BANK1)
134		AM_RANGE(0xe000, 0xe7ff) AM_WRITE(sprcros2_fgvideoram_w) AM_BASE(&sprcros2_fgvideoram)
135		AM_RANGE(0xe800, 0xe817) AM_WRITE(SMH_RAM)                  //always zero
136		AM_RANGE(0xe818, 0xe83f) AM_WRITE(SMH_RAM) AM_BASE(&sprcros2_spriteram) AM_SIZE(&sprcros2_spriteram_size)
137		AM_RANGE(0xe840, 0xefff) AM_WRITE(SMH_RAM)                  //always zero
138		AM_RANGE(0xf000, 0xf7ff) AM_WRITE(SMH_RAM)
139		AM_RANGE(0xf800, 0xffff) AM_WRITE(SMH_RAM) AM_BASE(&sprcros2_sharedram)   //shared with slave cpu
140		ADDRESS_MAP_END
141
142		static ADDRESS_MAP_START( io_map, ADDRESS_SPACE_IO, 8 )
	126	static ADDRESS_MAP_START( sprcros2_master_io_map, ADDRESS_SPACE_IO, 8 )
143	127	ADDRESS_MAP_GLOBAL_MASK(0xff)
144	128	AM_RANGE(0x00, 0x00) AM_READ_PORT("P1") AM_DEVWRITE("sn1", sn76496_w)
145	129	AM_RANGE(0x01, 0x01) AM_READ_PORT("P2") AM_DEVWRITE("sn2", sn76496_w)
r4679	r4680
149	133	AM_RANGE(0x07, 0x07) AM_WRITE(sprcros2_m_port7_w)
150	134	ADDRESS_MAP_END
151	135
152		static ADDRESS_MAP_START( sprcros2_s_readmem, ADDRESS_SPACE_PROGRAM, 8 )
153		AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM)
154		AM_RANGE(0x8000, 0xbfff) AM_READ(SMH_ROM)
155		AM_RANGE(0xc000, 0xdfff) AM_READ(SMH_BANK2)
156		AM_RANGE(0xe000, 0xf7ff) AM_READ(SMH_RAM)
157		AM_RANGE(0xf800, 0xffff) AM_READ(sprcros2_sharedram_r)
	136	static ADDRESS_MAP_START( sprcros2_slave_map, ADDRESS_SPACE_PROGRAM, 8 )
	137	AM_RANGE(0x0000, 0xbfff) AM_ROM
	138	AM_RANGE(0xc000, 0xdfff) AM_ROMBANK(2)
	139	AM_RANGE(0xe000, 0xe7ff) AM_RAM_WRITE(sprcros2_bgvideoram_w) AM_BASE(&sprcros2_bgvideoram)
	140	AM_RANGE(0xe800, 0xefff) AM_RAM                  //always zero
	141	AM_RANGE(0xf000, 0xf7ff) AM_RAM
	142	AM_RANGE(0xf800, 0xffff) AM_RAM AM_SHARE(1)
158	143	ADDRESS_MAP_END
159	144
160		static ADDRESS_MAP_START( sprcros2_s_writemem, ADDRESS_SPACE_PROGRAM, 8 )
161		AM_RANGE(0x0000, 0x7fff) AM_WRITE(SMH_ROM)
162		AM_RANGE(0x8000, 0xbfff) AM_WRITE(SMH_ROM)
163		AM_RANGE(0xc000, 0xdfff) AM_WRITE(SMH_BANK2)
164		AM_RANGE(0xe000, 0xe7ff) AM_WRITE(sprcros2_bgvideoram_w) AM_BASE(&sprcros2_bgvideoram)
165		AM_RANGE(0xe800, 0xefff) AM_WRITE(SMH_RAM)                  //always zero
166		AM_RANGE(0xf000, 0xf7ff) AM_WRITE(SMH_RAM)
167		AM_RANGE(0xf800, 0xffff) AM_WRITE(sprcros2_sharedram_w)
168		ADDRESS_MAP_END
169
170		static ADDRESS_MAP_START( audio_io_map, ADDRESS_SPACE_IO, 8 )
	145	static ADDRESS_MAP_START( sprcros2_slave_io_map, ADDRESS_SPACE_IO, 8 )
171	146	ADDRESS_MAP_GLOBAL_MASK(0xff)
172	147	AM_RANGE(0x00, 0x00) AM_WRITE(sprcros2_bgscrollx_w)
173	148	AM_RANGE(0x01, 0x01) AM_WRITE(sprcros2_bgscrolly_w)
r4679	r4680
295	270	static MACHINE_DRIVER_START( sprcros2 )
296	271
297	272	/* basic machine hardware */
298		MDRV_CPU_ADD("maincpu", Z80,10000000/2)
299		MDRV_CPU_PROGRAM_MAP(sprcros2_m_readmem,sprcros2_m_writemem)
300		MDRV_CPU_IO_MAP(io_map,0)
	273	MDRV_CPU_ADD("master", Z80,10000000/2)
	274	MDRV_CPU_PROGRAM_MAP(sprcros2_master_map,0)
	275	MDRV_CPU_IO_MAP(sprcros2_master_io_map,0)
301	276	MDRV_CPU_VBLANK_INT_HACK(sprcros2_m_interrupt,2)   //1 nmi + 1 irq
302	277
303		MDRV_CPU_ADD("audiocpu", Z80,10000000/2)
304		MDRV_CPU_PROGRAM_MAP(sprcros2_s_readmem,sprcros2_s_writemem)
305		MDRV_CPU_IO_MAP(audio_io_map,0)
	278	MDRV_CPU_ADD("slave", Z80,10000000/2)
	279	MDRV_CPU_PROGRAM_MAP(sprcros2_slave_map,0)
	280	MDRV_CPU_IO_MAP(sprcros2_slave_io_map,0)
306	281	MDRV_CPU_VBLANK_INT_HACK(sprcros2_s_interrupt,2)   //2 nmis
307	282
308	283	MDRV_MACHINE_START(sprcros2)
r4679	r4680
336	311	MACHINE_DRIVER_END
337	312
338	313	ROM_START( sprcros2 )
339		ROM_REGION( 0x14000, "maincpu", 0 )
	314	ROM_REGION( 0x14000, "master", 0 )
340	315	ROM_LOAD( "scm-03.10g", 0x00000, 0x4000, CRC(b9757908) SHA1(d59cb2aac1b6268fc766306850f5711d4a12d897) )
341	316	ROM_LOAD( "scm-02.10j", 0x04000, 0x4000, CRC(849c5c87) SHA1(0e02c4990e371d6a290efa53301818e769648945) )
342	317	ROM_LOAD( "scm-01.10k", 0x08000, 0x4000, CRC(385a62de) SHA1(847bf9d97ab3fa8949d9198e4e509948a940d6aa) )
343	318
344	319	ROM_LOAD( "scm-00.10l", 0x10000, 0x4000, CRC(13fa3684) SHA1(611b7a237e394f285dcc5beb027dacdbdd58a7a0) )   //banked into c000-dfff
345	320
346		ROM_REGION( 0x14000, "audiocpu", 0 )
	321	ROM_REGION( 0x14000, "slave", 0 )
347	322	ROM_LOAD( "scs-30.5f",  0x00000, 0x4000, CRC(c0a40e41) SHA1(e74131b353855749258dffa45091c825ccdbf05a) )
348	323	ROM_LOAD( "scs-29.5h",  0x04000, 0x4000, CRC(83d49fa5) SHA1(7112110df2f382bbc0e651adcec975054a485b9b) )
349	324	ROM_LOAD( "scs-28.5j",  0x08000, 0x4000, CRC(480d351f) SHA1(d1b86f441ae0e58b30e0f089ab25de219d5f30e3) )
r4679	r4680
373	348
374	349	/* this is probably an old revision */
375	350	ROM_START( sprcrs2a )
376		ROM_REGION( 0x14000, "maincpu", 0 )
	351	ROM_REGION( 0x14000, "master", 0 )
377	352	ROM_LOAD( "15.bin",     0x00000, 0x4000, CRC(b9d02558) SHA1(775404c6c7648d9dab02b496541739ea700cd481) )
378	353	ROM_LOAD( "scm-02.10j", 0x04000, 0x4000, CRC(849c5c87) SHA1(0e02c4990e371d6a290efa53301818e769648945) )
379	354	ROM_LOAD( "scm-01.10k", 0x08000, 0x4000, CRC(385a62de) SHA1(847bf9d97ab3fa8949d9198e4e509948a940d6aa) )
380	355
381	356	ROM_LOAD( "scm-00.10l", 0x10000, 0x4000, CRC(13fa3684) SHA1(611b7a237e394f285dcc5beb027dacdbdd58a7a0) )   //banked into c000-dfff
382	357
383		ROM_REGION( 0x14000, "audiocpu", 0 )
	358	ROM_REGION( 0x14000, "slave", 0 )
384	359	ROM_LOAD( "scs-30.5f",  0x00000, 0x4000, CRC(c0a40e41) SHA1(e74131b353855749258dffa45091c825ccdbf05a) )
385	360	ROM_LOAD( "scs-29.5h",  0x04000, 0x4000, CRC(83d49fa5) SHA1(7112110df2f382bbc0e651adcec975054a485b9b) )
386	361	ROM_LOAD( "scs-28.5j",  0x08000, 0x4000, CRC(480d351f) SHA1(d1b86f441ae0e58b30e0f089ab25de219d5f30e3) )

src/mame/drivers/statriv2.c

r4679	r4680
1070	1070
1071	1071	static DRIVER_INIT( laserdisc )
1072	1072	{
1073		const address_space *iospace = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_IO);
	1073	const address_space *iospace = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_IO);
1074	1074	memory_install_readwrite8_handler(iospace, 0x28, 0x2b, 0, 0, laserdisc_io_r, laserdisc_io_w);
1075	1075	}
1076	1076

src/mame/drivers/dorachan.c

r4679	r4680
32	32	{
33	33	UINT8 ret = 0;
34	34
35		switch (cpu_get_previouspc(field->port->machine->cpu[0]))
	35	switch (cpu_get_previouspc(cputag_get_cpu(field->port->machine, "maincpu")))
36	36	{
37	37	case 0x70ce: ret = 0xf2; break;
38	38	case 0x72a2: ret = 0xd5; break;
39	39	case 0x72b5: ret = 0xcb; break;
40	40
41	41	default:
42		mame_printf_debug("unhandled $2400 read @ %x\n",cpu_get_previouspc(field->port->machine->cpu[0]));
	42	mame_printf_debug("unhandled $2400 read @ %x\n", cpu_get_previouspc(cputag_get_cpu(field->port->machine, "maincpu")));
43	43	break;
44	44	}
45	45

src/mame/drivers/thunderj.c

r4679	r4680
33	33
34	34	static void update_interrupts(running_machine *machine)
35	35	{
36		cpu_set_input_line(machine->cpu[0], 4, atarigen_scanline_int_state ? ASSERT_LINE : CLEAR_LINE);
37		cpu_set_input_line(machine->cpu[1], 4, atarigen_scanline_int_state ? ASSERT_LINE : CLEAR_LINE);
38		cpu_set_input_line(machine->cpu[0], 6, atarigen_sound_int_state ? ASSERT_LINE : CLEAR_LINE);
	36	cputag_set_input_line(machine, "maincpu", 4, atarigen_scanline_int_state ? ASSERT_LINE : CLEAR_LINE);
	37	cputag_set_input_line(machine, "extra", 4, atarigen_scanline_int_state ? ASSERT_LINE : CLEAR_LINE);
	38	cputag_set_input_line(machine, "maincpu", 6, atarigen_sound_int_state ? ASSERT_LINE : CLEAR_LINE);
39	39	}
40	40
41	41
r4679	r4680
74	74	{
75	75	/* 0 means hold CPU 2's reset low */
76	76	if (data & 1)
77		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_RESET, CLEAR_LINE);
	77	cputag_set_input_line(space->machine, "extra", INPUT_LINE_RESET, CLEAR_LINE);
78	78	else
79		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_RESET, ASSERT_LINE);
	79	cputag_set_input_line(space->machine, "extra", INPUT_LINE_RESET, ASSERT_LINE);
80	80
81	81	/* bits 2-5 are the alpha bank */
82	82	if (thunderj_alpha_tile_bank != ((data >> 2) & 7))

src/mame/drivers/ultraman.c

r4679	r4680
101	101	static WRITE16_HANDLER( sound_cmd_w )
102	102	{
103	103	if (ACCESSING_BITS_0_7)
104		soundlatch_w(space,0,data & 0xff);
	104	soundlatch_w(space, 0, data & 0xff);
105	105	}
106	106
107	107	static WRITE16_HANDLER( sound_irq_trigger_w )
108	108	{
109	109	if (ACCESSING_BITS_0_7)
110		cpu_set_input_line(space->machine->cpu[1],INPUT_LINE_NMI,PULSE_LINE);
	110	cputag_set_input_line(space->machine, "audiocpu", INPUT_LINE_NMI, PULSE_LINE);
111	111	}
112	112
113	113

src/mame/drivers/parodius.c

r4679	r4680
101	101
102	102	static WRITE8_HANDLER( parodius_sh_irqtrigger_w )
103	103	{
104		cpu_set_input_line_and_vector(space->machine->cpu[1],0,HOLD_LINE,0xff);
	104	cputag_set_input_line_and_vector(space->machine, "audiocpu", 0, HOLD_LINE, 0xff);
105	105	}
106	106
107	107	#if 0
r4679	r4680
117	117
118	118	static TIMER_CALLBACK( nmi_callback )
119	119	{
120		cpu_set_input_line(machine->cpu[1], INPUT_LINE_NMI, ASSERT_LINE);
	120	cputag_set_input_line(machine, "audiocpu", INPUT_LINE_NMI, ASSERT_LINE);
121	121	}
122	122
123	123	static WRITE8_HANDLER( sound_arm_nmi_w )
124	124	{
125	125	//  sound_nmi_enabled = 1;
126		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_NMI, CLEAR_LINE);
127		timer_set(space->machine, ATTOTIME_IN_USEC(50), NULL,0,nmi_callback);   /* kludge until the K053260 is emulated correctly */
	126	cputag_set_input_line(space->machine, "audiocpu", INPUT_LINE_NMI, CLEAR_LINE);
	127	timer_set(space->machine, ATTOTIME_IN_USEC(50), NULL, 0, nmi_callback);   /* kludge until the K053260 is emulated correctly */
128	128	}
129	129
130	130	/********************************************/
131	131
132		static ADDRESS_MAP_START( parodius_readmem, ADDRESS_SPACE_PROGRAM, 8 )
133		AM_RANGE(0x0000, 0x07ff) AM_READ(bankedram_r)
134		AM_RANGE(0x0800, 0x1fff) AM_READ(SMH_RAM)
	132	static ADDRESS_MAP_START( parodius_map, ADDRESS_SPACE_PROGRAM, 8 )
	133	AM_RANGE(0x0000, 0x07ff) AM_READWRITE(bankedram_r,bankedram_w) AM_BASE(&ram)
	134	AM_RANGE(0x0800, 0x1fff) AM_RAM
135	135	AM_RANGE(0x3f8c, 0x3f8c) AM_READ_PORT("P1")
136	136	AM_RANGE(0x3f8d, 0x3f8d) AM_READ_PORT("P2")
137	137	AM_RANGE(0x3f8e, 0x3f8e) AM_READ_PORT("DSW3")
138	138	AM_RANGE(0x3f8f, 0x3f8f) AM_READ_PORT("DSW1")
139	139	AM_RANGE(0x3f90, 0x3f90) AM_READ_PORT("DSW2")
140		AM_RANGE(0x3fa0, 0x3faf) AM_READ(K053244_r)
141		AM_RANGE(0x3fc0, 0x3fc0) AM_READ(watchdog_reset_r)
142		AM_RANGE(0x3fcc, 0x3fcd) AM_DEVREAD("konami", parodius_sound_r)   /* K053260 */
143		AM_RANGE(0x2000, 0x27ff) AM_READ(parodius_052109_053245_r)
144		AM_RANGE(0x2000, 0x5fff) AM_READ(K052109_r)
145		AM_RANGE(0x6000, 0x9fff) AM_READ(SMH_BANK1)         /* banked ROM */
146		AM_RANGE(0xa000, 0xffff) AM_READ(SMH_ROM)         /* ROM */
147		ADDRESS_MAP_END
148
149		static ADDRESS_MAP_START( parodius_writemem, ADDRESS_SPACE_PROGRAM, 8 )
150		AM_RANGE(0x0000, 0x07ff) AM_WRITE(bankedram_w) AM_BASE(&ram)
151		AM_RANGE(0x0800, 0x1fff) AM_WRITE(SMH_RAM)
152		AM_RANGE(0x3fa0, 0x3faf) AM_WRITE(K053244_w)
	140	AM_RANGE(0x3fa0, 0x3faf) AM_READWRITE(K053244_r,K053244_w)
153	141	AM_RANGE(0x3fb0, 0x3fbf) AM_WRITE(K053251_w)
154		AM_RANGE(0x3fc0, 0x3fc0) AM_WRITE(parodius_3fc0_w)
	142	AM_RANGE(0x3fc0, 0x3fc0) AM_READWRITE(watchdog_reset_r,parodius_3fc0_w)
155	143	AM_RANGE(0x3fc4, 0x3fc4) AM_WRITE(parodius_videobank_w)
156	144	AM_RANGE(0x3fc8, 0x3fc8) AM_WRITE(parodius_sh_irqtrigger_w)
157		AM_RANGE(0x3fcc, 0x3fcd) AM_DEVWRITE("konami", k053260_w)
158		AM_RANGE(0x2000, 0x27ff) AM_WRITE(parodius_052109_053245_w)
159		AM_RANGE(0x2000, 0x5fff) AM_WRITE(K052109_w)
160		AM_RANGE(0x6000, 0x9fff) AM_WRITE(SMH_ROM)               /* banked ROM */
161		AM_RANGE(0xa000, 0xffff) AM_WRITE(SMH_ROM)               /* ROM */
	145	AM_RANGE(0x3fcc, 0x3fcd) AM_DEVREADWRITE("konami", parodius_sound_r,k053260_w)   /* K053260 */
	146	AM_RANGE(0x2000, 0x27ff) AM_READWRITE(parodius_052109_053245_r,parodius_052109_053245_w)
	147	AM_RANGE(0x2000, 0x5fff) AM_READWRITE(K052109_r,K052109_w)
	148	AM_RANGE(0x6000, 0x9fff) AM_ROMBANK(1)         /* banked ROM */
	149	AM_RANGE(0xa000, 0xffff) AM_ROM               /* ROM */
162	150	ADDRESS_MAP_END
163	151
164		static ADDRESS_MAP_START( parodius_readmem_sound, ADDRESS_SPACE_PROGRAM, 8 )
165		AM_RANGE(0x0000, 0xefff) AM_READ(SMH_ROM)
166		AM_RANGE(0xf000, 0xf7ff) AM_READ(SMH_RAM)
167		AM_RANGE(0xf800, 0xf801) AM_DEVREAD("ym", ym2151_r)
168		AM_RANGE(0xfc00, 0xfc2f) AM_DEVREAD("konami", k053260_r)
169		ADDRESS_MAP_END
170
171		static ADDRESS_MAP_START( parodius_writemem_sound, ADDRESS_SPACE_PROGRAM, 8 )
172		AM_RANGE(0x0000, 0xefff) AM_WRITE(SMH_ROM)
173		AM_RANGE(0xf000, 0xf7ff) AM_WRITE(SMH_RAM)
174		AM_RANGE(0xf800, 0xf801) AM_DEVWRITE("ym", ym2151_w)
	152	static ADDRESS_MAP_START( parodius_sound_map, ADDRESS_SPACE_PROGRAM, 8 )
	153	AM_RANGE(0x0000, 0xefff) AM_ROM
	154	AM_RANGE(0xf000, 0xf7ff) AM_RAM
	155	AM_RANGE(0xf800, 0xf801) AM_DEVREADWRITE("ym", ym2151_r,ym2151_w)
175	156	AM_RANGE(0xfa00, 0xfa00) AM_WRITE(sound_arm_nmi_w)
176		AM_RANGE(0xfc00, 0xfc2f) AM_DEVWRITE("konami", k053260_w)
	157	AM_RANGE(0xfc00, 0xfc2f) AM_DEVREADWRITE("konami", k053260_r,k053260_w)
177	158	ADDRESS_MAP_END
178	159
	160
179	161	/***************************************************************************
180	162
181	163	Input Ports
r4679	r4680
245	227
246	228	/* basic machine hardware */
247	229	MDRV_CPU_ADD("maincpu", KONAMI, 3000000)      /* 053248 */
248		MDRV_CPU_PROGRAM_MAP(parodius_readmem,parodius_writemem)
	230	MDRV_CPU_PROGRAM_MAP(parodius_map,0)
249	231	MDRV_CPU_VBLANK_INT("screen", parodius_interrupt)
250	232
251	233	MDRV_CPU_ADD("audiocpu", Z80, 3579545)
252		MDRV_CPU_PROGRAM_MAP(parodius_readmem_sound,parodius_writemem_sound)
	234	MDRV_CPU_PROGRAM_MAP(parodius_sound_map,0)
253	235	/* NMIs are triggered by the 053260 */
254	236
255	237	MDRV_MACHINE_RESET(parodius)
r4679	r4680
351	333	{
352	334	UINT8 *RAM = memory_region(machine, "maincpu");
353	335
354		konami_configure_set_lines(machine->cpu[0], parodius_banking);
	336	konami_configure_set_lines(cputag_get_cpu(machine, "maincpu"), parodius_banking);
355	337
356	338	paletteram = &memory_region(machine, "maincpu")[0x48000];
357	339

src/mame/drivers/ladybug.c

r4679	r4680
150	150	static INPUT_CHANGED( coin1_inserted )
151	151	{
152	152	/* left coin insertion causes an NMI */
153		cpu_set_input_line(field->port->machine->cpu[0], INPUT_LINE_NMI, newval ? ASSERT_LINE : CLEAR_LINE);
	153	cputag_set_input_line(field->port->machine, "maincpu", INPUT_LINE_NMI, newval ? ASSERT_LINE : CLEAR_LINE);
154	154	}
155	155
156	156	static INPUT_CHANGED( coin2_inserted )
157	157	{
158	158	/* right coin insertion causes an IRQ */
159	159	if (newval)
160		cpu_set_input_line(field->port->machine->cpu[0], 0, HOLD_LINE);
	160	cputag_set_input_line(field->port->machine, "maincpu", 0, HOLD_LINE);
161	161	}
162	162
163	163
r4679	r4680
963	963
964	964	offs_t i;
965	965	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
966		UINT8 *decrypted = auto_malloc(0x6000);
	966	UINT8 *decrypted = auto_alloc_array(machine, UINT8, 0x6000);
967	967	UINT8 *rom = memory_region(machine, "maincpu");
968	968	UINT8 *table = memory_region(machine, "user1");
969	969

src/mame/drivers/blueprnt.c

r4679	r4680
86	86	static WRITE8_HANDLER( blueprnt_sound_command_w )
87	87	{
88	88	soundlatch_w(space, offset, data);
89		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_NMI, PULSE_LINE);
	89	cputag_set_input_line(space->machine, "audiocpu", INPUT_LINE_NMI, PULSE_LINE);
90	90	}
91	91
92	92	static WRITE8_HANDLER( blueprnt_coin_counter_w )

src/mame/drivers/combatsc.c

r4679	r4680
219	219
220	220	static WRITE8_HANDLER( combasc_sh_irqtrigger_w )
221	221	{
222		cpu_set_input_line_and_vector(space->machine->cpu[1],0,HOLD_LINE,0xff);
	222	cputag_set_input_line_and_vector(space->machine, "audiocpu", 0, HOLD_LINE, 0xff);
223	223	}
224	224
225	225	static READ8_DEVICE_HANDLER( combasc_busy_r )
r4679	r4680
249	249	static int boost = 1;
250	250	int status = ym2203_r(device,offset);
251	251
252		if (cpu_get_pc(device->machine->cpu[1]) == 0x334)
	252	if (cpu_get_pc(cputag_get_cpu(device->machine, "audiocpu")) == 0x334)
253	253	{
254	254	if (boost)
255	255	{
256	256	boost = 0;
257		timer_adjust_periodic(combasc_interleave_timer, attotime_zero, 0, cpu_clocks_to_attotime(device->machine->cpu[1],80));
	257	timer_adjust_periodic(combasc_interleave_timer, attotime_zero, 0, cputag_clocks_to_attotime(device->machine, "audiocpu", 80));
258	258	}
259	259	else if (status & 2)
260	260	{
r4679	r4680
268	268
269	269	/****************************************************************************/
270	270
271		static ADDRESS_MAP_START( combasc_readmem, ADDRESS_SPACE_PROGRAM, 8 )
272		AM_RANGE(0x0020, 0x005f) AM_READ(combasc_scrollram_r)
273		AM_RANGE(0x0200, 0x0201) AM_READ(protection_r)
	271	static ADDRESS_MAP_START( combasc_map, ADDRESS_SPACE_PROGRAM, 8 )
	272	AM_RANGE(0x0000, 0x0007) AM_WRITE(combasc_pf_control_w)
	273	AM_RANGE(0x0020, 0x005f) AM_READWRITE(combasc_scrollram_r, combasc_scrollram_w)
	274	//  AM_RANGE(0x0060, 0x00ff) AM_WRITE(SMH_RAM)                 /* RAM */
	275
	276	AM_RANGE(0x0200, 0x0201) AM_READWRITE(protection_r, protection_w)
	277	AM_RANGE(0x0206, 0x0206) AM_WRITE(protection_clock_w)
	278
274	279	AM_RANGE(0x0400, 0x0400) AM_READ_PORT("IN0")
275	280	AM_RANGE(0x0401, 0x0401) AM_READ_PORT("DSW3")         /* DSW #3 */
276	281	AM_RANGE(0x0402, 0x0402) AM_READ_PORT("DSW1")         /* DSW #1 */
277	282	AM_RANGE(0x0403, 0x0403) AM_READ_PORT("DSW2")         /* DSW #2 */
278	283	AM_RANGE(0x0404, 0x0407) AM_READ(trackball_r)         /* 1P & 2P controls / trackball */
279		AM_RANGE(0x0600, 0x06ff) AM_READ(SMH_RAM)            /* palette */
280		AM_RANGE(0x0800, 0x1fff) AM_READ(SMH_RAM)
281		AM_RANGE(0x2000, 0x3fff) AM_READ(combasc_video_r)
282		AM_RANGE(0x4000, 0x7fff) AM_READ(SMH_BANK1)            /* banked ROM area */
283		AM_RANGE(0x8000, 0xffff) AM_READ(SMH_ROM)            /* ROM */
284		ADDRESS_MAP_END
285
286		static ADDRESS_MAP_START( combasc_writemem, ADDRESS_SPACE_PROGRAM, 8 )
287		AM_RANGE(0x0000, 0x0007) AM_WRITE(combasc_pf_control_w)
288		AM_RANGE(0x0020, 0x005f) AM_WRITE(combasc_scrollram_w)
289		//  AM_RANGE(0x0060, 0x00ff) AM_WRITE(SMH_RAM)                 /* RAM */
290		AM_RANGE(0x0200, 0x0201) AM_WRITE(protection_w)
291		AM_RANGE(0x0206, 0x0206) AM_WRITE(protection_clock_w)
292	284	AM_RANGE(0x0408, 0x0408) AM_WRITE(combasc_coin_counter_w)   /* coin counters */
293	285	AM_RANGE(0x040c, 0x040c) AM_WRITE(combasc_vreg_w)
294	286	AM_RANGE(0x0410, 0x0410) AM_WRITE(combasc_bankselect_w)
295	287	AM_RANGE(0x0414, 0x0414) AM_WRITE(soundlatch_w)
296	288	AM_RANGE(0x0418, 0x0418) AM_WRITE(combasc_sh_irqtrigger_w)
297	289	AM_RANGE(0x041c, 0x041c) AM_WRITE(watchdog_reset_w)         /* watchdog reset? */
298		AM_RANGE(0x0600, 0x06ff) AM_WRITE(SMH_RAM) AM_BASE(&paletteram)
299		AM_RANGE(0x0800, 0x1fff) AM_WRITE(SMH_RAM)               /* RAM */
300		AM_RANGE(0x2000, 0x3fff) AM_WRITE(combasc_video_w)
301		AM_RANGE(0x4000, 0x7fff) AM_WRITE(SMH_ROM)               /* banked ROM area */
302		AM_RANGE(0x8000, 0xffff) AM_WRITE(SMH_ROM)               /* ROM */
303		ADDRESS_MAP_END
304	290
305		static ADDRESS_MAP_START( combascb_readmem, ADDRESS_SPACE_PROGRAM, 8 )
306		AM_RANGE(0x0000, 0x04ff) AM_READ(SMH_RAM)
307		AM_RANGE(0x0600, 0x06ff) AM_READ(SMH_RAM)   /* palette */
308		AM_RANGE(0x0800, 0x1fff) AM_READ(SMH_RAM)
309		AM_RANGE(0x2000, 0x3fff) AM_READ(combasc_video_r)
310		AM_RANGE(0x4000, 0x7fff) AM_READ(SMH_BANK1)            /* banked ROM/RAM area */
311		AM_RANGE(0x8000, 0xffff) AM_READ(SMH_ROM)            /* ROM */
	291	AM_RANGE(0x0600, 0x06ff) AM_RAM AM_BASE(&paletteram)      /* palette */
	292	AM_RANGE(0x0800, 0x1fff) AM_RAM                        /* RAM */
	293	AM_RANGE(0x2000, 0x3fff) AM_READWRITE(combasc_video_r, combasc_video_w)
	294	AM_RANGE(0x4000, 0x7fff) AM_ROMBANK(1)                  /* banked ROM area */
	295	AM_RANGE(0x8000, 0xffff) AM_ROM                        /* ROM */
312	296	ADDRESS_MAP_END
313	297
314		static ADDRESS_MAP_START( combascb_writemem, ADDRESS_SPACE_PROGRAM, 8 )
315		AM_RANGE(0x0000, 0x04ff) AM_WRITE(SMH_RAM)
	298	static ADDRESS_MAP_START( combascb_map, ADDRESS_SPACE_PROGRAM, 8 )
	299	AM_RANGE(0x0000, 0x04ff) AM_RAM
316	300	AM_RANGE(0x0500, 0x0500) AM_WRITE(combascb_bankselect_w)
317		AM_RANGE(0x0600, 0x06ff) AM_WRITE(SMH_RAM) AM_BASE(&paletteram)
318		AM_RANGE(0x0800, 0x1fff) AM_WRITE(SMH_RAM)
319		AM_RANGE(0x2000, 0x3fff) AM_WRITE(combasc_video_w)
320		AM_RANGE(0x4000, 0x7fff) AM_WRITE(SMH_BANK1) /* banked ROM/RAM area */
321		AM_RANGE(0x8000, 0xffff) AM_WRITE(SMH_ROM)            /* ROM */
	301	AM_RANGE(0x0600, 0x06ff) AM_RAM AM_BASE(&paletteram)      /* palette */
	302	AM_RANGE(0x0800, 0x1fff) AM_RAM
	303	AM_RANGE(0x2000, 0x3fff) AM_READWRITE(combasc_video_r, combasc_video_w)
	304	AM_RANGE(0x4000, 0x7fff) AM_ROMBANK(1)                  /* banked ROM/RAM area */
	305	AM_RANGE(0x8000, 0xffff) AM_ROM                        /* ROM */
322	306	ADDRESS_MAP_END
323	307
324	308	#if 0
325		static ADDRESS_MAP_START( readmem_sound, ADDRESS_SPACE_PROGRAM, 8 )
326		AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM)               /* ROM */
327		AM_RANGE(0x8000, 0x87ef) AM_READ(SMH_RAM)               /* RAM */
328		AM_RANGE(0x87f0, 0x87ff) AM_READ(SMH_RAM)               /* ??? */
329		AM_RANGE(0x9000, 0x9001) AM_DEVREAD("ym", ym2203_r)   /* YM 2203 */
330		AM_RANGE(0x9008, 0x9009) AM_DEVREAD("ym", ym2203_r)   /* ??? */
331		AM_RANGE(0xa000, 0xa000) AM_READ(soundlatch_r)            /* soundlatch_r? */
332		AM_RANGE(0x8800, 0xfffb) AM_READ(SMH_ROM)               /* ROM? */
333		AM_RANGE(0xfffc, 0xffff) AM_READ(SMH_RAM)               /* ??? */
	309	static ADDRESS_MAP_START( sound_map, ADDRESS_SPACE_PROGRAM, 8 )
	310	AM_RANGE(0x0000, 0x7fff) AM_ROM                              /* ROM */
	311	AM_RANGE(0x8000, 0x87ef) AM_RAM                              /* RAM */
	312	AM_RANGE(0x87f0, 0x87ff) AM_RAM                              /* ??? */
	313	AM_RANGE(0x9000, 0x9001) AM_DEVREADWRITE("ym", ym2203_r, ym2203_w)   /* YM 2203 */
	314	AM_RANGE(0x9008, 0x9009) AM_DEVREAD("ym", ym2203_r)               /* ??? */
	315	AM_RANGE(0xa000, 0xa000) AM_READ(soundlatch_r)                  /* soundlatch_r? */
	316	AM_RANGE(0x8800, 0xfffb) AM_ROM                              /* ROM? */
	317	AM_RANGE(0xfffc, 0xffff) AM_RAM                              /* ??? */
334	318	ADDRESS_MAP_END
335
336		static ADDRESS_MAP_START( writemem_sound, ADDRESS_SPACE_PROGRAM, 8 )
337		AM_RANGE(0x0000, 0x7fff) AM_WRITE(SMH_ROM)            /* ROM */
338		AM_RANGE(0x8000, 0x87ef) AM_WRITE(SMH_RAM)            /* RAM */
339		AM_RANGE(0x87f0, 0x87ff) AM_WRITE(SMH_RAM)            /* ??? */
340		AM_RANGE(0x9000, 0x9001) AM_DEVWRITE("ym", ym2203_w)   /* YM 2203 */
341		//AM_RANGE(0x9800, 0x9800) AM_WRITE(combasc_unknown_w_1)    /* OKIM5205? */
342		//AM_RANGE(0xa800, 0xa800) AM_WRITE(combasc_unknown_w_2)    /* OKIM5205? */
343		AM_RANGE(0x8800, 0xfffb) AM_WRITE(SMH_ROM)            /* ROM */
344		AM_RANGE(0xfffc, 0xffff) AM_WRITE(SMH_RAM)            /* ??? */
345		ADDRESS_MAP_END
346	319	#endif
347	320
348		static ADDRESS_MAP_START( combasc_readmem_sound, ADDRESS_SPACE_PROGRAM, 8 )
349		AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM)               /* ROM */
350		AM_RANGE(0x8000, 0x87ff) AM_READ(SMH_RAM)               /* RAM */
351		AM_RANGE(0xb000, 0xb000) AM_DEVREAD("upd", combasc_busy_r)   /* upd7759 busy? */
352		AM_RANGE(0xd000, 0xd000) AM_READ(soundlatch_r)            /* soundlatch_r? */
353		AM_RANGE(0xe000, 0xe001) AM_DEVREAD("ym", combasc_ym2203_r)   /* YM 2203 intercepted */
354		ADDRESS_MAP_END
	321	static ADDRESS_MAP_START( combasc_sound_map, ADDRESS_SPACE_PROGRAM, 8 )
	322	AM_RANGE(0x0000, 0x7fff) AM_ROM                                    /* ROM */
	323	AM_RANGE(0x8000, 0x87ff) AM_RAM                                    /* RAM */
355	324
356		static ADDRESS_MAP_START( combasc_writemem_sound, ADDRESS_SPACE_PROGRAM, 8 )
357		AM_RANGE(0x0000, 0x7fff) AM_WRITE(SMH_ROM)            /* ROM */
358		AM_RANGE(0x8000, 0x87ff) AM_WRITE(SMH_RAM)            /* RAM */
359		AM_RANGE(0x9000, 0x9000) AM_DEVWRITE("upd", combasc_play_w)         /* upd7759 play voice */
360		AM_RANGE(0xa000, 0xa000) AM_DEVWRITE("upd", upd7759_port_w)         /* upd7759 voice select */
361		AM_RANGE(0xc000, 0xc000) AM_DEVWRITE("upd", combasc_voice_reset_w)   /* upd7759 reset? */
362		AM_RANGE(0xe000, 0xe001) AM_DEVWRITE("ym", ym2203_w)   /* YM 2203 */
	325	AM_RANGE(0x9000, 0x9000) AM_DEVWRITE("upd", combasc_play_w)               /* upd7759 play voice */
	326	AM_RANGE(0xa000, 0xa000) AM_DEVWRITE("upd", upd7759_port_w)               /* upd7759 voice select */
	327	AM_RANGE(0xb000, 0xb000) AM_DEVREAD("upd", combasc_busy_r)               /* upd7759 busy? */
	328	AM_RANGE(0xc000, 0xc000) AM_DEVWRITE("upd", combasc_voice_reset_w)         /* upd7759 reset? */
	329
	330	AM_RANGE(0xd000, 0xd000) AM_READ(soundlatch_r)                        /* soundlatch_r? */
	331	AM_RANGE(0xe000, 0xe001) AM_DEVREADWRITE("ym", combasc_ym2203_r, ym2203_w)   /* YM 2203 intercepted */
363	332	ADDRESS_MAP_END
364	333
365	334
r4679	r4680
581	550
582	551	/* basic machine hardware */
583	552	MDRV_CPU_ADD("maincpu", HD6309, 3000000*4)   /* 3 MHz? */
584		MDRV_CPU_PROGRAM_MAP(combasc_readmem,combasc_writemem)
	553	MDRV_CPU_PROGRAM_MAP(combasc_map,0)
585	554	MDRV_CPU_VBLANK_INT("screen", irq0_line_hold)
586	555
587	556	MDRV_CPU_ADD("audiocpu", Z80,3579545)   /* 3.579545 MHz */
588		MDRV_CPU_PROGRAM_MAP(combasc_readmem_sound,combasc_writemem_sound)
	557	MDRV_CPU_PROGRAM_MAP(combasc_sound_map,0)
589	558
590	559	MDRV_QUANTUM_TIME(HZ(1200))
591	560
r4679	r4680
622	591
623	592	/* basic machine hardware */
624	593	MDRV_CPU_ADD("maincpu", HD6309, 3000000*4)   /* 3 MHz? */
625		MDRV_CPU_PROGRAM_MAP(combascb_readmem,combascb_writemem)
	594	MDRV_CPU_PROGRAM_MAP(combascb_map,0)
626	595	MDRV_CPU_VBLANK_INT("screen", irq0_line_hold)
627	596
628	597	MDRV_CPU_ADD("audiocpu", Z80,3579545)   /* 3.579545 MHz */
629		MDRV_CPU_PROGRAM_MAP(combasc_readmem_sound,combasc_writemem_sound) /* FAKE */
	598	MDRV_CPU_PROGRAM_MAP(combasc_sound_map,0) /* FAKE */
630	599
631	600	MDRV_QUANTUM_TIME(HZ(1200))
632	601
r4679	r4680
832	801	static DRIVER_INIT( combasc )
833	802	{
834	803	/* joystick instead of trackball */
835		memory_install_read_port_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x0404, 0x0404, 0, 0, "IN1");
	804	memory_install_read_port_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x0404, 0x0404, 0, 0, "IN1");
836	805
837	806	combasc_init_common(machine);
838	807	}

src/mame/drivers/quizpun2.c

r4679	r4680
119	119
120	120	***************************************************************************/
121	121
	122	typedef enum { STATE_IDLE = 0, STATE_ADDR_R, STATE_ROM_R, STATE_EEPROM_R, STATE_EEPROM_W } prot_state;
122	123	static struct {
123		enum { STATE_IDLE = 0, STATE_ADDR_R, STATE_ROM_R, STATE_EEPROM_R, STATE_EEPROM_W } state;
	124	prot_state state;
124	125	int wait_param;
125	126	int param;
126	127	int cmd;
r4679	r4680
280	281
281	282	static WRITE8_HANDLER( quizpun2_irq_ack )
282	283	{
283		cpu_set_input_line(space->machine->cpu[0], INPUT_LINE_IRQ0, CLEAR_LINE);
	284	cputag_set_input_line(space->machine, "maincpu", INPUT_LINE_IRQ0, CLEAR_LINE);
284	285	}
285	286
286	287	static WRITE8_HANDLER( quizpun2_soundlatch_w )
287	288	{
288	289	soundlatch_w(space, 0, data);
289		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_NMI, PULSE_LINE);
	290	cputag_set_input_line(space->machine, "audiocpu", INPUT_LINE_NMI, PULSE_LINE);
290	291	}
291	292
292	293	static ADDRESS_MAP_START( quizpun2_map, ADDRESS_SPACE_PROGRAM, 8 )

src/mame/drivers/rockrage.c

r4679	r4680
87	87	static WRITE8_HANDLER( rockrage_sh_irqtrigger_w )
88	88	{
89	89	soundlatch_w(space, offset, data);
90		cpu_set_input_line(space->machine->cpu[1],M6809_IRQ_LINE,HOLD_LINE);
	90	cputag_set_input_line(space->machine, "audiocpu", M6809_IRQ_LINE, HOLD_LINE);
91	91	}
92	92
93		static READ8_DEVICE_HANDLER( rockrage_VLM5030_busy_r ) {
	93	static READ8_DEVICE_HANDLER( rockrage_VLM5030_busy_r )
	94	{
94	95	return ( vlm5030_bsy(device) ? 1 : 0 );
95	96	}
96	97
97		static WRITE8_DEVICE_HANDLER( rockrage_speech_w ) {
	98	static WRITE8_DEVICE_HANDLER( rockrage_speech_w )
	99	{
98	100	/* bit2 = data bus enable */
99	101	vlm5030_rst( device, ( data >> 1 ) & 0x01 );
100	102	vlm5030_st( device, ( data >> 0 ) & 0x01 );
101	103	}
102	104
103		static ADDRESS_MAP_START( rockrage_readmem, ADDRESS_SPACE_PROGRAM, 8 )
104		AM_RANGE(0x0000, 0x1fff) AM_READ(K007342_r)         /* Color RAM + Video RAM */
105		AM_RANGE(0x2000, 0x21ff) AM_READ(K007420_r)         /* Sprite RAM */
106		AM_RANGE(0x2200, 0x23ff) AM_READ(K007342_scroll_r)   /* Scroll RAM */
107		AM_RANGE(0x2400, 0x247f) AM_READ(SMH_RAM)         /* Palette */
	105	static ADDRESS_MAP_START( rockrage_map, ADDRESS_SPACE_PROGRAM, 8 )
	106	AM_RANGE(0x0000, 0x1fff) AM_READWRITE(K007342_r,K007342_w)               /* Color RAM + Video RAM */
	107	AM_RANGE(0x2000, 0x21ff) AM_READWRITE(K007420_r,K007420_w)               /* Sprite RAM */
	108	AM_RANGE(0x2200, 0x23ff) AM_READWRITE(K007342_scroll_r,K007342_scroll_w)   /* Scroll RAM */
	109	AM_RANGE(0x2400, 0x247f) AM_RAM AM_BASE(&paletteram)                  /* Palette */
	110	AM_RANGE(0x2600, 0x2607) AM_WRITE(K007342_vreg_w)                     /* Video Registers */
	111	AM_RANGE(0x2e00, 0x2e00) AM_READ_PORT("SYSTEM")
108	112	AM_RANGE(0x2e01, 0x2e01) AM_READ_PORT("P1")
109	113	AM_RANGE(0x2e02, 0x2e02) AM_READ_PORT("P2")
110	114	AM_RANGE(0x2e03, 0x2e03) AM_READ_PORT("DSW2")
111	115	AM_RANGE(0x2e40, 0x2e40) AM_READ_PORT("DSW1")
112		AM_RANGE(0x2e00, 0x2e00) AM_READ_PORT("SYSTEM")
113		AM_RANGE(0x4000, 0x5fff) AM_READ(SMH_RAM)         /* RAM */
114		AM_RANGE(0x6000, 0x7fff) AM_READ(SMH_BANK1)         /* banked ROM */
115		AM_RANGE(0x8000, 0xffff) AM_READ(SMH_ROM)         /* ROM */
	116	AM_RANGE(0x2e80, 0x2e80) AM_WRITE(rockrage_sh_irqtrigger_w)               /* cause interrupt on audio CPU */
	117	AM_RANGE(0x2ec0, 0x2ec0) AM_WRITE(watchdog_reset_w)                     /* watchdog reset */
	118	AM_RANGE(0x2f00, 0x2f00) AM_WRITE(rockrage_vreg_w)                     /* ??? */
	119	AM_RANGE(0x2f40, 0x2f40) AM_WRITE(rockrage_bankswitch_w)               /* bankswitch control */
	120	AM_RANGE(0x4000, 0x5fff) AM_RAM                                    /* RAM */
	121	AM_RANGE(0x6000, 0x7fff) AM_ROMBANK(1)                              /* banked ROM */
	122	AM_RANGE(0x8000, 0xffff) AM_ROM                                    /* ROM */
116	123	ADDRESS_MAP_END
117	124
118		static ADDRESS_MAP_START( rockrage_writemem, ADDRESS_SPACE_PROGRAM, 8 )
119		AM_RANGE(0x0000, 0x1fff) AM_WRITE(K007342_w)            /* Color RAM + Video RAM */
120		AM_RANGE(0x2000, 0x21ff) AM_WRITE(K007420_w)            /* Sprite RAM */
121		AM_RANGE(0x2200, 0x23ff) AM_WRITE(K007342_scroll_w)      /* Scroll RAM */
122		AM_RANGE(0x2400, 0x247f) AM_WRITE(SMH_RAM) AM_BASE(&paletteram)/* palette */
123		AM_RANGE(0x2600, 0x2607) AM_WRITE(K007342_vreg_w)         /* Video Registers */
124		AM_RANGE(0x2e80, 0x2e80) AM_WRITE(rockrage_sh_irqtrigger_w)/* cause interrupt on audio CPU */
125		AM_RANGE(0x2ec0, 0x2ec0) AM_WRITE(watchdog_reset_w)      /* watchdog reset */
126		AM_RANGE(0x2f00, 0x2f00) AM_WRITE(rockrage_vreg_w)      /* ??? */
127		AM_RANGE(0x2f40, 0x2f40) AM_WRITE(rockrage_bankswitch_w)   /* bankswitch control */
128		AM_RANGE(0x4000, 0x5fff) AM_WRITE(SMH_RAM)            /* RAM */
129		AM_RANGE(0x6000, 0x7fff) AM_WRITE(SMH_RAM)            /* banked ROM */
130		AM_RANGE(0x8000, 0xffff) AM_WRITE(SMH_ROM)            /* ROM */
	125	static ADDRESS_MAP_START( rockrage_sound_map, ADDRESS_SPACE_PROGRAM, 8 )
	126	AM_RANGE(0x2000, 0x2000) AM_DEVWRITE("vlm", vlm5030_data_w)             /* VLM5030 */
	127	AM_RANGE(0x3000, 0x3000) AM_DEVREAD("vlm", rockrage_VLM5030_busy_r)         /* VLM5030 */
	128	AM_RANGE(0x4000, 0x4000) AM_DEVWRITE("vlm", rockrage_speech_w)            /* VLM5030 */
	129	AM_RANGE(0x5000, 0x5000) AM_READ(soundlatch_r)                        /* soundlatch_r */
	130	AM_RANGE(0x6000, 0x6001) AM_DEVREADWRITE("ym", ym2151_r,ym2151_w)         /* YM 2151 */
	131	AM_RANGE(0x7000, 0x77ff) AM_RAM                                    /* RAM */
	132	AM_RANGE(0x8000, 0xffff) AM_ROM                                    /* ROM */
131	133	ADDRESS_MAP_END
132	134
133		static ADDRESS_MAP_START( rockrage_readmem_sound, ADDRESS_SPACE_PROGRAM, 8 )
134		AM_RANGE(0x3000, 0x3000) AM_DEVREAD("vlm", rockrage_VLM5030_busy_r)/* VLM5030 */
135		AM_RANGE(0x5000, 0x5000) AM_READ(soundlatch_r)         /* soundlatch_r */
136		AM_RANGE(0x6000, 0x6001) AM_DEVREAD("ym", ym2151_r)   /* YM 2151 */
137		AM_RANGE(0x7000, 0x77ff) AM_READ(SMH_RAM)            /* RAM */
138		AM_RANGE(0x8000, 0xffff) AM_READ(SMH_ROM)            /* ROM */
139		ADDRESS_MAP_END
140
141		static ADDRESS_MAP_START( rockrage_writemem_sound, ADDRESS_SPACE_PROGRAM, 8 )
142		AM_RANGE(0x2000, 0x2000) AM_DEVWRITE("vlm", vlm5030_data_w)          /* VLM5030 */
143		AM_RANGE(0x4000, 0x4000) AM_DEVWRITE("vlm", rockrage_speech_w)         /* VLM5030 */
144		AM_RANGE(0x6000, 0x6001) AM_DEVWRITE("ym", ym2151_w)      /* YM 2151 */
145		AM_RANGE(0x7000, 0x77ff) AM_WRITE(SMH_RAM)               /* RAM */
146		AM_RANGE(0x8000, 0xffff) AM_WRITE(SMH_ROM)               /* ROM */
147		ADDRESS_MAP_END
148
149	135	/***************************************************************************
150	136
151	137	Input Ports
r4679	r4680
286	272
287	273	/* basic machine hardware */
288	274	MDRV_CPU_ADD("maincpu", HD6309, 3000000*4)      /* 24MHz/8 */
289		MDRV_CPU_PROGRAM_MAP(rockrage_readmem,rockrage_writemem)
	275	MDRV_CPU_PROGRAM_MAP(rockrage_map,0)
290	276	MDRV_CPU_VBLANK_INT("screen", rockrage_interrupt)
291	277
292	278	MDRV_CPU_ADD("audiocpu", M6809, 1500000)      /* 24MHz/16 */
293		MDRV_CPU_PROGRAM_MAP(rockrage_readmem_sound,rockrage_writemem_sound)
	279	MDRV_CPU_PROGRAM_MAP(rockrage_sound_map,0)
294	280
295	281	/* video hardware */
296	282	MDRV_SCREEN_ADD("screen", RASTER)

src/mame/drivers/stvinit.c

r4679	r4680
119	119	void install_stvbios_speedups(running_machine *machine)
120	120	{
121	121	// flushes 0 & 1 on both CPUs are for the BIOS speedups
122		sh2drc_add_pcflush(machine->cpu[0], 0x60154b2);
123		sh2drc_add_pcflush(machine->cpu[0], 0x6013aee);
	122	sh2drc_add_pcflush(cputag_get_cpu(machine, "maincpu"), 0x60154b2);
	123	sh2drc_add_pcflush(cputag_get_cpu(machine, "maincpu"), 0x6013aee);
124	124
125		sh2drc_add_pcflush(machine->cpu[1], 0x60154b2);
126		sh2drc_add_pcflush(machine->cpu[1], 0x6013aee);
	125	sh2drc_add_pcflush(cputag_get_cpu(machine, "slave"), 0x60154b2);
	126	sh2drc_add_pcflush(cputag_get_cpu(machine, "slave"), 0x6013aee);
127	127	}
128	128
129	129	DRIVER_INIT(shienryu)
r4679	r4680
132	132	stv_default_eeprom_length = sizeof(shienryu_default_eeprom);
133	133
134	134	// master
135		sh2drc_add_pcflush(machine->cpu[0], 0x60041c6);
	135	sh2drc_add_pcflush(cputag_get_cpu(machine, "maincpu"), 0x60041c6);
136	136	// slave
137		sh2drc_add_pcflush(machine->cpu[1], 0x600440e);
	137	sh2drc_add_pcflush(cputag_get_cpu(machine, "slave"), 0x600440e);
138	138
139	139	DRIVER_INIT_CALL(stv);
140	140	}
r4679	r4680
149	149	(loops for 263473 instructions)
150	150	*/
151	151	// master
152		sh2drc_add_pcflush(machine->cpu[0], 0x6018640);
	152	sh2drc_add_pcflush(cputag_get_cpu(machine, "maincpu"), 0x6018640);
153	153	// slave
154		sh2drc_add_pcflush(machine->cpu[1], 0x6018c6e);
	154	sh2drc_add_pcflush(cputag_get_cpu(machine, "slave"), 0x6018c6e);
155	155
156	156	DRIVER_INIT_CALL(stv);
157	157
r4679	r4680
179	179
180	180	(loops for 288688 instructions)
181	181	*/
182		sh2drc_add_pcflush(machine->cpu[0], 0x6010160);
	182	sh2drc_add_pcflush(cputag_get_cpu(machine, "maincpu"), 0x6010160);
183	183
184	184	DRIVER_INIT_CALL(stv);
185	185	}
r4679	r4680
205	205
206	206	DRIVER_INIT(puyosun)
207	207	{
208		sh2drc_add_pcflush(machine->cpu[0], 0x6021cf0);
	208	sh2drc_add_pcflush(cputag_get_cpu(machine, "maincpu"), 0x6021cf0);
209	209
210		sh2drc_add_pcflush(machine->cpu[1], 0x60236fe);
	210	sh2drc_add_pcflush(cputag_get_cpu(machine, "slave"), 0x60236fe);
211	211
212	212	DRIVER_INIT_CALL(stv);
213	213
r4679	r4680
227	227
228	228	DRIVER_INIT(mausuke)
229	229	{
230		sh2drc_add_pcflush(machine->cpu[0], 0x60461A0);
	230	sh2drc_add_pcflush(cputag_get_cpu(machine, "maincpu"), 0x60461A0);
231	231
232	232	DRIVER_INIT_CALL(stv);
233	233
r4679	r4680
237	237
238	238	DRIVER_INIT(cottonbm)
239	239	{
240		//  sh2drc_add_pcflush(machine->cpu[0], 0x6030ee2);
241		//  sh2drc_add_pcflush(machine->cpu[1], 0x6032b52);
	240	//  sh2drc_add_pcflush(cputag_get_cpu(machine, "maincpu"), 0x6030ee2);
	241	//  sh2drc_add_pcflush(cputag_get_cpu(machine, "slave"), 0x6032b52);
242	242
243	243	DRIVER_INIT_CALL(stv);
244	244
r4679	r4680
247	247
248	248	DRIVER_INIT(cotton2)
249	249	{
250		sh2drc_add_pcflush(machine->cpu[0], 0x6031c7a);
251		sh2drc_add_pcflush(machine->cpu[1], 0x60338ea);
	250	sh2drc_add_pcflush(cputag_get_cpu(machine, "maincpu"), 0x6031c7a);
	251	sh2drc_add_pcflush(cputag_get_cpu(machine, "slave"), 0x60338ea);
252	252
253	253	DRIVER_INIT_CALL(stv);
254	254
r4679	r4680
258	258	DRIVER_INIT(dnmtdeka)
259	259	{
260	260	// install all 3 speedups on both master and slave
261		sh2drc_add_pcflush(machine->cpu[0], 0x6027c90);
262		sh2drc_add_pcflush(machine->cpu[0], 0xd04);
263		sh2drc_add_pcflush(machine->cpu[0], 0x60051f2);
	261	sh2drc_add_pcflush(cputag_get_cpu(machine, "maincpu"), 0x6027c90);
	262	sh2drc_add_pcflush(cputag_get_cpu(machine, "maincpu"), 0xd04);
	263	sh2drc_add_pcflush(cputag_get_cpu(machine, "maincpu"), 0x60051f2);
264	264
265		sh2drc_add_pcflush(machine->cpu[1], 0x6027c90);
266		sh2drc_add_pcflush(machine->cpu[1], 0xd04);
267		sh2drc_add_pcflush(machine->cpu[1], 0x60051f2);
	265	sh2drc_add_pcflush(cputag_get_cpu(machine, "slave"), 0x6027c90);
	266	sh2drc_add_pcflush(cputag_get_cpu(machine, "slave"), 0xd04);
	267	sh2drc_add_pcflush(cputag_get_cpu(machine, "slave"), 0x60051f2);
268	268
269	269	DRIVER_INIT_CALL(stv);
270	270	}
r4679	r4680
272	272	DRIVER_INIT(diehard)
273	273	{
274	274	// install all 3 speedups on both master and slave
275		sh2drc_add_pcflush(machine->cpu[0], 0x6027c98);
276		sh2drc_add_pcflush(machine->cpu[0], 0xd04);
277		sh2drc_add_pcflush(machine->cpu[0], 0x60051f2);
	275	sh2drc_add_pcflush(cputag_get_cpu(machine, "maincpu"), 0x6027c98);
	276	sh2drc_add_pcflush(cputag_get_cpu(machine, "maincpu"), 0xd04);
	277	sh2drc_add_pcflush(cputag_get_cpu(machine, "maincpu"), 0x60051f2);
278	278
279		sh2drc_add_pcflush(machine->cpu[1], 0x6027c98);
280		sh2drc_add_pcflush(machine->cpu[1], 0xd04);
281		sh2drc_add_pcflush(machine->cpu[1], 0x60051f2);
	279	sh2drc_add_pcflush(cputag_get_cpu(machine, "slave"), 0x6027c98);
	280	sh2drc_add_pcflush(cputag_get_cpu(machine, "slave"), 0xd04);
	281	sh2drc_add_pcflush(cputag_get_cpu(machine, "slave"), 0x60051f2);
282	282
283	283	DRIVER_INIT_CALL(stv);
284	284	}
285	285
286	286	DRIVER_INIT(fhboxers)
287	287	{
288		sh2drc_add_pcflush(machine->cpu[0], 0x60041c2);
289		sh2drc_add_pcflush(machine->cpu[0], 0x600bb0a);
290		sh2drc_add_pcflush(machine->cpu[0], 0x600b31e);
	288	sh2drc_add_pcflush(cputag_get_cpu(machine, "maincpu"), 0x60041c2);
	289	sh2drc_add_pcflush(cputag_get_cpu(machine, "maincpu"), 0x600bb0a);
	290	sh2drc_add_pcflush(cputag_get_cpu(machine, "maincpu"), 0x600b31e);
291	291
292	292	DRIVER_INIT_CALL(stv);
293	293	}
r4679	r4680
311	311
312	312	DRIVER_INIT( groovef )
313	313	{
314		sh2drc_add_pcflush(machine->cpu[0], 0x6005e7c);
315		sh2drc_add_pcflush(machine->cpu[0], 0x6005e86);
316		sh2drc_add_pcflush(machine->cpu[0], 0x60a4970);
	314	sh2drc_add_pcflush(cputag_get_cpu(machine, "maincpu"), 0x6005e7c);
	315	sh2drc_add_pcflush(cputag_get_cpu(machine, "maincpu"), 0x6005e86);
	316	sh2drc_add_pcflush(cputag_get_cpu(machine, "maincpu"), 0x60a4970);
317	317
318		sh2drc_add_pcflush(machine->cpu[1], 0x60060c2);
	318	sh2drc_add_pcflush(cputag_get_cpu(machine, "slave"), 0x60060c2);
319	319
320	320	/* prevent game from hanging on startup -- todo: remove these hacks */
321		memory_install_read32_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x60ca6cc, 0x60ca6cf, 0, 0, groovef_hack2_r );
322		memory_install_read32_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x60fffcc, 0x60fffcf, 0, 0, groovef_hack1_r );
	321	memory_install_read32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x60ca6cc, 0x60ca6cf, 0, 0, groovef_hack2_r );
	322	memory_install_read32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x60fffcc, 0x60fffcf, 0, 0, groovef_hack1_r );
323	323
324	324	DRIVER_INIT_CALL(stv);
325	325
r4679	r4680
364	364
365	365	DRIVER_INIT( danchih )
366	366	{
367		sh2drc_add_pcflush(machine->cpu[0], 0x6028b28);
368		sh2drc_add_pcflush(machine->cpu[0], 0x6028c8e);
369		sh2drc_add_pcflush(machine->cpu[1], 0x602ae26);
	367	sh2drc_add_pcflush(cputag_get_cpu(machine, "maincpu"), 0x6028b28);
	368	sh2drc_add_pcflush(cputag_get_cpu(machine, "maincpu"), 0x6028c8e);
	369	sh2drc_add_pcflush(cputag_get_cpu(machine, "slave"), 0x602ae26);
370	370
371	371	/* prevent game from hanging on title screen -- todo: remove these hacks */
372		memory_install_read32_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x60ffcbc, 0x60ffcbf, 0, 0, danchih_hack_r );
	372	memory_install_read32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x60ffcbc, 0x60ffcbf, 0, 0, danchih_hack_r );
373	373
374	374	DRIVER_INIT_CALL(stv);
375	375
r4679	r4680
407	407
408	408	DRIVER_INIT( astrass )
409	409	{
410		sh2drc_add_pcflush(machine->cpu[0], 0x60011b8);
411		sh2drc_add_pcflush(machine->cpu[0], 0x605b9da);
	410	sh2drc_add_pcflush(cputag_get_cpu(machine, "maincpu"), 0x60011b8);
	411	sh2drc_add_pcflush(cputag_get_cpu(machine, "maincpu"), 0x605b9da);
412	412
413		memory_install_read32_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x06000770, 0x06000773, 0, 0, astrass_hack_r );
	413	memory_install_read32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x06000770, 0x06000773, 0, 0, astrass_hack_r );
414	414
415	415	install_astrass_protection(machine);
416	416
r4679	r4680
419	419
420	420	DRIVER_INIT(thunt)
421	421	{
422		sh2drc_add_pcflush(machine->cpu[0], 0x602A024);
423		sh2drc_add_pcflush(machine->cpu[0], 0x6013EEA);
424		sh2drc_add_pcflush(machine->cpu[1], 0x602AAF8);
	422	sh2drc_add_pcflush(cputag_get_cpu(machine, "maincpu"), 0x602A024);
	423	sh2drc_add_pcflush(cputag_get_cpu(machine, "maincpu"), 0x6013EEA);
	424	sh2drc_add_pcflush(cputag_get_cpu(machine, "slave"), 0x602AAF8);
425	425
426	426	DRIVER_INIT_CALL(stv);
427	427
r4679	r4680
430	430
431	431	DRIVER_INIT(sandor)
432	432	{
433		sh2drc_add_pcflush(machine->cpu[0], 0x602a0f8);
434		sh2drc_add_pcflush(machine->cpu[0], 0x6013fbe);
435		sh2drc_add_pcflush(machine->cpu[1], 0x602abcc);
	433	sh2drc_add_pcflush(cputag_get_cpu(machine, "maincpu"), 0x602a0f8);
	434	sh2drc_add_pcflush(cputag_get_cpu(machine, "maincpu"), 0x6013fbe);
	435	sh2drc_add_pcflush(cputag_get_cpu(machine, "slave"), 0x602abcc);
436	436
437	437	DRIVER_INIT_CALL(stv);
438	438	minit_boost_timeslice = sinit_boost_timeslice = ATTOTIME_IN_USEC(1);
r4679	r4680
441	441
442	442	DRIVER_INIT(grdforce)
443	443	{
444		sh2drc_add_pcflush(machine->cpu[0], 0x6041e32);
445		sh2drc_add_pcflush(machine->cpu[1], 0x6043aa2);
	444	sh2drc_add_pcflush(cputag_get_cpu(machine, "maincpu"), 0x6041e32);
	445	sh2drc_add_pcflush(cputag_get_cpu(machine, "slave"), 0x6043aa2);
446	446
447	447	DRIVER_INIT_CALL(stv);
448	448
r4679	r4680
451	451
452	452	DRIVER_INIT(batmanfr)
453	453	{
454		sh2drc_add_pcflush(machine->cpu[0], 0x60121c0);
455		sh2drc_add_pcflush(machine->cpu[1], 0x60125bc);
	454	sh2drc_add_pcflush(cputag_get_cpu(machine, "maincpu"), 0x60121c0);
	455	sh2drc_add_pcflush(cputag_get_cpu(machine, "slave"), 0x60125bc);
456	456
457	457	DRIVER_INIT_CALL(stv);
458	458
r4679	r4680
462	462
463	463	DRIVER_INIT(colmns97)
464	464	{
465		sh2drc_add_pcflush(machine->cpu[1], 0x60298a2);
	465	sh2drc_add_pcflush(cputag_get_cpu(machine, "slave"), 0x60298a2);
466	466
467	467	DRIVER_INIT_CALL(stv);
468	468
r4679	r4680
472	472
473	473	DRIVER_INIT(winterht)
474	474	{
475		sh2drc_add_pcflush(machine->cpu[0], 0x6098aea);
476		sh2drc_add_pcflush(machine->cpu[1], 0x609ae4e);
	475	sh2drc_add_pcflush(cputag_get_cpu(machine, "maincpu"), 0x6098aea);
	476	sh2drc_add_pcflush(cputag_get_cpu(machine, "slave"), 0x609ae4e);
477	477
478	478	DRIVER_INIT_CALL(stv);
479	479
r4679	r4680
482	482
483	483	DRIVER_INIT(seabass)
484	484	{
485		sh2drc_add_pcflush(machine->cpu[0], 0x602cbfa);
486		sh2drc_add_pcflush(machine->cpu[1], 0x60321ee);
	485	sh2drc_add_pcflush(cputag_get_cpu(machine, "maincpu"), 0x602cbfa);
	486	sh2drc_add_pcflush(cputag_get_cpu(machine, "slave"), 0x60321ee);
487	487
488	488	DRIVER_INIT_CALL(stv);
489	489
r4679	r4680
492	492
493	493	DRIVER_INIT(vfremix)
494	494	{
495		sh2drc_add_pcflush(machine->cpu[0], 0x602c30c);
496		sh2drc_add_pcflush(machine->cpu[1], 0x604c332);
	495	sh2drc_add_pcflush(cputag_get_cpu(machine, "maincpu"), 0x602c30c);
	496	sh2drc_add_pcflush(cputag_get_cpu(machine, "slave"), 0x604c332);
497	497
498	498	DRIVER_INIT_CALL(stv);
499	499
r4679	r4680
502	502
503	503	DRIVER_INIT(sss)
504	504	{
505		sh2drc_add_pcflush(machine->cpu[0], 0x6026398);
506		sh2drc_add_pcflush(machine->cpu[1], 0x6028cd6);
	505	sh2drc_add_pcflush(cputag_get_cpu(machine, "maincpu"), 0x6026398);
	506	sh2drc_add_pcflush(cputag_get_cpu(machine, "slave"), 0x6028cd6);
507	507
508	508	install_standard_protection(machine);
509	509
r4679	r4680
514	514
515	515	DRIVER_INIT(othellos)
516	516	{
517		sh2drc_add_pcflush(machine->cpu[0], 0x602bcbe);
518		sh2drc_add_pcflush(machine->cpu[1], 0x602d92e);
	517	sh2drc_add_pcflush(cputag_get_cpu(machine, "maincpu"), 0x602bcbe);
	518	sh2drc_add_pcflush(cputag_get_cpu(machine, "slave"), 0x602d92e);
519	519
520	520	DRIVER_INIT_CALL(stv);
521	521
r4679	r4680
525	525
526	526	DRIVER_INIT(sasissu)
527	527	{
528		sh2drc_add_pcflush(machine->cpu[1], 0x60710be);
	528	sh2drc_add_pcflush(cputag_get_cpu(machine, "slave"), 0x60710be);
529	529
530	530	DRIVER_INIT_CALL(stv);
531	531
r4679	r4680
534	534
535	535	DRIVER_INIT(gaxeduel)
536	536	{
537		sh2drc_add_pcflush(machine->cpu[0], 0x6012ee4);
	537	sh2drc_add_pcflush(cputag_get_cpu(machine, "maincpu"), 0x6012ee4);
538	538
539	539	DRIVER_INIT_CALL(stv);
540	540	}
541	541
542	542	DRIVER_INIT(suikoenb)
543	543	{
544		sh2drc_add_pcflush(machine->cpu[0], 0x6013f7a);
	544	sh2drc_add_pcflush(cputag_get_cpu(machine, "maincpu"), 0x6013f7a);
545	545
546	546	DRIVER_INIT_CALL(stv);
547	547	}
r4679	r4680
556	556
557	557	DRIVER_INIT(znpwfv)
558	558	{
559		sh2drc_add_pcflush(machine->cpu[0], 0x6012ec2);
560		sh2drc_add_pcflush(machine->cpu[1], 0x60175a6);
	559	sh2drc_add_pcflush(cputag_get_cpu(machine, "maincpu"), 0x6012ec2);
	560	sh2drc_add_pcflush(cputag_get_cpu(machine, "slave"), 0x60175a6);
561	561
562	562	DRIVER_INIT_CALL(stv);
563	563	minit_boost_timeslice = sinit_boost_timeslice = ATTOTIME_IN_NSEC(500);
r4679	r4680
565	565
566	566	DRIVER_INIT(twcup98)
567	567	{
568		sh2drc_add_pcflush(machine->cpu[0], 0x605edde);
569		sh2drc_add_pcflush(machine->cpu[1], 0x6062bca);
	568	sh2drc_add_pcflush(cputag_get_cpu(machine, "maincpu"), 0x605edde);
	569	sh2drc_add_pcflush(cputag_get_cpu(machine, "slave"), 0x6062bca);
570	570
571	571	DRIVER_INIT_CALL(stv);
572	572	install_standard_protection(machine);
r4679	r4680
576	576
577	577	DRIVER_INIT(smleague)
578	578	{
579		sh2drc_add_pcflush(machine->cpu[0], 0x6063bf4);
580		sh2drc_add_pcflush(machine->cpu[1], 0x6062bca);
	579	sh2drc_add_pcflush(cputag_get_cpu(machine, "maincpu"), 0x6063bf4);
	580	sh2drc_add_pcflush(cputag_get_cpu(machine, "slave"), 0x6062bca);
581	581
582	582	DRIVER_INIT_CALL(stv);
583	583
r4679	r4680
586	586
587	587	DRIVER_INIT(finlarch)
588	588	{
589		sh2drc_add_pcflush(machine->cpu[0], 0x6064d60);
	589	sh2drc_add_pcflush(cputag_get_cpu(machine, "maincpu"), 0x6064d60);
590	590
591	591	DRIVER_INIT_CALL(stv);
592	592
r4679	r4680
594	594
595	595	DRIVER_INIT(maruchan)
596	596	{
597		sh2drc_add_pcflush(machine->cpu[0], 0x601ba46);
598		sh2drc_add_pcflush(machine->cpu[1], 0x601ba46);
	597	sh2drc_add_pcflush(cputag_get_cpu(machine, "maincpu"), 0x601ba46);
	598	sh2drc_add_pcflush(cputag_get_cpu(machine, "slave"), 0x601ba46);
599	599
600	600	DRIVER_INIT_CALL(stv);
601	601
r4679	r4680
604	604
605	605	DRIVER_INIT(pblbeach)
606	606	{
607		sh2drc_add_pcflush(machine->cpu[0], 0x605eb78);
	607	sh2drc_add_pcflush(cputag_get_cpu(machine, "maincpu"), 0x605eb78);
608	608
609	609	DRIVER_INIT_CALL(stv);
610	610	}
611	611
612	612	DRIVER_INIT(shanhigw)
613	613	{
614		sh2drc_add_pcflush(machine->cpu[0], 0x6020c5c);
	614	sh2drc_add_pcflush(cputag_get_cpu(machine, "maincpu"), 0x6020c5c);
615	615
616	616	DRIVER_INIT_CALL(stv);
617	617	}
618	618
619	619	DRIVER_INIT(elandore)
620	620	{
621		sh2drc_add_pcflush(machine->cpu[0], 0x604eac0);
622		sh2drc_add_pcflush(machine->cpu[1], 0x605340a);
	621	sh2drc_add_pcflush(cputag_get_cpu(machine, "maincpu"), 0x604eac0);
	622	sh2drc_add_pcflush(cputag_get_cpu(machine, "slave"), 0x605340a);
623	623
624	624	install_standard_protection(machine);
625	625
r4679	r4680
630	630
631	631	DRIVER_INIT(rsgun)
632	632	{
633		sh2drc_add_pcflush(machine->cpu[0], 0x6034d04);
634		sh2drc_add_pcflush(machine->cpu[1], 0x6036152);
	633	sh2drc_add_pcflush(cputag_get_cpu(machine, "maincpu"), 0x6034d04);
	634	sh2drc_add_pcflush(cputag_get_cpu(machine, "slave"), 0x6036152);
635	635
636	636	install_standard_protection(machine);
637	637
r4679	r4680
655	655
656	656	DRIVER_INIT(nameclv3)
657	657	{
658		sh2drc_add_pcflush(machine->cpu[0], 0x601eb4c);
659		sh2drc_add_pcflush(machine->cpu[1], 0x602b80e);
	658	sh2drc_add_pcflush(cputag_get_cpu(machine, "maincpu"), 0x601eb4c);
	659	sh2drc_add_pcflush(cputag_get_cpu(machine, "slave"), 0x602b80e);
660	660
661	661	DRIVER_INIT_CALL(stv);
662	662	}

src/mame/drivers/ttchamp.c

r4679	r4680
123	123	static ADDRESS_MAP_START( ttchamp_map, ADDRESS_SPACE_PROGRAM, 16 )
124	124	AM_RANGE(0x00000, 0x0ffff) AM_RAM
125	125	AM_RANGE(0x10000, 0x1ffff) AM_RAM AM_BASE(&peno_vram)
126		AM_RANGE(0x20000, 0x7ffff) AM_READ(SMH_BANK1) // ?
127		AM_RANGE(0x80000, 0xfffff) AM_READ(SMH_BANK2) // ?
	126	AM_RANGE(0x20000, 0x7ffff) AM_READ(SMH_BANK(1)) // ?
	127	AM_RANGE(0x80000, 0xfffff) AM_READ(SMH_BANK(2)) // ?
128	128	ADDRESS_MAP_END
129	129
130	130	static ADDRESS_MAP_START( ttchamp_io, ADDRESS_SPACE_IO, 16 )

src/mame/drivers/egghunt.c

r4679	r4680
146	146	static VIDEO_START(egghunt)
147	147	{
148	148	bg_tilemap = tilemap_create(machine, get_bg_tile_info,tilemap_scan_rows,8,8,64, 32);
149		egghunt_bgram = auto_malloc(0x1000);
150		egghunt_spram = auto_malloc(0x1000);
	149	egghunt_bgram = auto_alloc_array(machine, UINT8, 0x1000);
	150	egghunt_spram = auto_alloc_array(machine, UINT8, 0x1000);
151	151	}
152	152
153	153	static VIDEO_UPDATE(egghunt)
r4679	r4680
173	173
174	174	static WRITE8_HANDLER( egghunt_soundlatch_w )
175	175	{
176		soundlatch_w(space,0,data);
177		cpu_set_input_line(space->machine->cpu[1],0,HOLD_LINE);
	176	soundlatch_w(space, 0, data);
	177	cputag_set_input_line(space->machine, "audiocpu", 0, HOLD_LINE);
178	178	}
179	179
180	180	static READ8_DEVICE_HANDLER( egghunt_okibanking_r )
r4679	r4680
188	188	okim6295_set_bank_base(device, (data & 0x10) ? 0x40000 : 0);
189	189	}
190	190
191		static ADDRESS_MAP_START( readmem, ADDRESS_SPACE_PROGRAM, 8 )
192		AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM)
193		AM_RANGE(0xc000, 0xcfff) AM_READ(SMH_RAM)
194		AM_RANGE(0xd000, 0xdfff) AM_READ(egghunt_bgram_r)
195		AM_RANGE(0xe000, 0xffff) AM_READ(SMH_RAM)
	191	static ADDRESS_MAP_START( egghunt_map, ADDRESS_SPACE_PROGRAM, 8 )
	192	AM_RANGE(0x0000, 0x7fff) AM_ROM
	193	AM_RANGE(0xc000, 0xc7ff) AM_RAM_WRITE(paletteram_xRRRRRGGGGGBBBBB_le_w) AM_BASE(&paletteram)
	194	AM_RANGE(0xc800, 0xcfff) AM_RAM_WRITE(egghunt_atram_w) AM_BASE(&egghunt_atram)
	195	AM_RANGE(0xd000, 0xdfff) AM_READWRITE(egghunt_bgram_r, egghunt_bgram_w)
	196	AM_RANGE(0xe000, 0xffff) AM_RAM
196	197	ADDRESS_MAP_END
197	198
198		static ADDRESS_MAP_START( writemem, ADDRESS_SPACE_PROGRAM, 8 )
199		AM_RANGE(0x0000, 0x7fff) AM_WRITE(SMH_ROM)
200		AM_RANGE(0xc000, 0xc7ff) AM_WRITE(paletteram_xRRRRRGGGGGBBBBB_le_w) AM_BASE(&paletteram)
201		AM_RANGE(0xc800, 0xcfff) AM_WRITE(egghunt_atram_w) AM_BASE(&egghunt_atram)
202		AM_RANGE(0xd000, 0xdfff) AM_WRITE(egghunt_bgram_w)
203		AM_RANGE(0xe000, 0xffff) AM_WRITE(SMH_RAM)
204		ADDRESS_MAP_END
205	199
206
207	200	static ADDRESS_MAP_START( io_map, ADDRESS_SPACE_IO, 8 )
208	201	ADDRESS_MAP_GLOBAL_MASK(0xff)
209	202	AM_RANGE(0x00, 0x00) AM_READ_PORT("DSW1") AM_WRITE(egghunt_vidram_bank_w)
r4679	r4680
215	208	AM_RANGE(0x07, 0x07) AM_WRITENOP
216	209	ADDRESS_MAP_END
217	210
218		static ADDRESS_MAP_START( sound_readmem, ADDRESS_SPACE_PROGRAM, 8 )
219		AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM)
	211	static ADDRESS_MAP_START( sound_map, ADDRESS_SPACE_PROGRAM, 8 )
	212	AM_RANGE(0x0000, 0x7fff) AM_ROM
220	213	AM_RANGE(0xe000, 0xe000) AM_READ(soundlatch_r)
221		AM_RANGE(0xe004, 0xe004) AM_DEVREAD("oki", okim6295_r)
222		AM_RANGE(0xf000, 0xffff) AM_READ(SMH_RAM)
223		ADDRESS_MAP_END
224
225		static ADDRESS_MAP_START( sound_writemem, ADDRESS_SPACE_PROGRAM, 8 )
226		AM_RANGE(0x0000, 0x7fff) AM_WRITE(SMH_ROM)
227	214	AM_RANGE(0xe001, 0xe001) AM_DEVREADWRITE("oki", egghunt_okibanking_r, egghunt_okibanking_w)
228		AM_RANGE(0xe004, 0xe004) AM_DEVWRITE("oki", okim6295_w)
229		AM_RANGE(0xf000, 0xffff) AM_WRITE(SMH_RAM)
	215	AM_RANGE(0xe004, 0xe004) AM_DEVREADWRITE("oki", okim6295_r, okim6295_w)
	216	AM_RANGE(0xf000, 0xffff) AM_RAM
230	217	ADDRESS_MAP_END
231	218
232	219
r4679	r4680
379	366	static MACHINE_DRIVER_START( egghunt )
380	367	/* basic machine hardware */
381	368	MDRV_CPU_ADD("maincpu", Z80,12000000/2)       /* 6 MHz ?*/
382		MDRV_CPU_PROGRAM_MAP(readmem,writemem)
	369	MDRV_CPU_PROGRAM_MAP(egghunt_map,0)
383	370	MDRV_CPU_IO_MAP(io_map,0)
384	371	MDRV_CPU_VBLANK_INT("screen", irq0_line_hold) // or 2 like mitchell.c?
385	372
386	373	MDRV_CPU_ADD("audiocpu", Z80,12000000/2)       /* 6 MHz ?*/
387		MDRV_CPU_PROGRAM_MAP(sound_readmem,sound_writemem)
	374	MDRV_CPU_PROGRAM_MAP(sound_map,0)
388	375
389	376	MDRV_MACHINE_RESET(egghunt)
390	377
r4679	r4680
434	421	ROM_END
435	422
436	423	GAME( 1995, egghunt, 0, egghunt, egghunt, 0, ROT0, "Invi Image", "Egg Hunt", 0 )
437

src/mame/drivers/buggychl.c

r4679	r4680
100	100
101	101	static TIMER_CALLBACK( nmi_callback )
102	102	{
103		if (sound_nmi_enable) cpu_set_input_line(machine->cpu[1],INPUT_LINE_NMI,PULSE_LINE);
	103	if (sound_nmi_enable) cputag_set_input_line(machine, "audiocpu", INPUT_LINE_NMI, PULSE_LINE);
104	104	else pending_nmi = 1;
105	105	}
106	106
107	107	static WRITE8_HANDLER( sound_command_w )
108	108	{
109		soundlatch_w(space,0,data);
110		timer_call_after_resynch(space->machine, NULL, data,nmi_callback);
	109	soundlatch_w(space, 0, data);
	110	timer_call_after_resynch(space->machine, NULL, data, nmi_callback);
111	111	}
112	112
113	113	static WRITE8_HANDLER( nmi_disable_w )
r4679	r4680
120	120	sound_nmi_enable = 1;
121	121	if (pending_nmi)
122	122	{
123		cpu_set_input_line(space->machine->cpu[1],INPUT_LINE_NMI,PULSE_LINE);
	123	cputag_set_input_line(space->machine, "audiocpu", INPUT_LINE_NMI, PULSE_LINE);
124	124	pending_nmi = 0;
125	125	}
126	126	}
r4679	r4680
132	132
133	133
134	134
135		static ADDRESS_MAP_START( readmem, ADDRESS_SPACE_PROGRAM, 8 )
136		AM_RANGE(0x0000, 0x3fff) AM_READ(SMH_ROM)      /* A22-04 (23) */
137		AM_RANGE(0x4000, 0x7fff) AM_READ(SMH_ROM)      /* A22-05 (22) */
138		AM_RANGE(0x8000, 0x87ff) AM_READ(SMH_RAM)      /* 6116 SRAM (36) */
139		AM_RANGE(0x8800, 0x8fff) AM_READ(SMH_RAM)      /* 6116 SRAM (35) */
140		AM_RANGE(0xa000, 0xbfff) AM_READ(SMH_BANK1)
141		AM_RANGE(0xc800, 0xcfff) AM_READ(SMH_RAM)
142		AM_RANGE(0xd400, 0xd400) AM_READ(buggychl_mcu_r)
	135	static ADDRESS_MAP_START( buggychl_map, ADDRESS_SPACE_PROGRAM, 8 )
	136	AM_RANGE(0x0000, 0x3fff) AM_ROM /* A22-04 (23) */
	137	AM_RANGE(0x4000, 0x7fff) AM_ROM /* A22-05 (22) */
	138	AM_RANGE(0x8000, 0x87ff) AM_RAM /* 6116 SRAM (36) */
	139	AM_RANGE(0x8800, 0x8fff) AM_RAM /* 6116 SRAM (35) */
	140	AM_RANGE(0x9000, 0x9fff) AM_WRITE(buggychl_sprite_lookup_w)
	141	AM_RANGE(0xa000, 0xbfff) AM_READWRITE(SMH_BANK(1), buggychl_chargen_w) AM_BASE(&buggychl_character_ram)
	142	AM_RANGE(0xc800, 0xcfff) AM_RAM AM_BASE(&videoram) AM_SIZE(&videoram_size)
	143	AM_RANGE(0xd100, 0xd100) AM_WRITE(buggychl_ctrl_w)
	144	AM_RANGE(0xd200, 0xd200) AM_WRITE(bankswitch_w)
	145	AM_RANGE(0xd300, 0xd300) AM_WRITE(watchdog_reset_w)
	146	AM_RANGE(0xd303, 0xd303) AM_WRITE(buggychl_sprite_lookup_bank_w)
	147	AM_RANGE(0xd400, 0xd400) AM_READWRITE(buggychl_mcu_r, buggychl_mcu_w)
143	148	AM_RANGE(0xd401, 0xd401) AM_READ(buggychl_mcu_status_r)
	149	AM_RANGE(0xd500, 0xd57f) AM_WRITE(SMH_RAM) AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
144	150	AM_RANGE(0xd600, 0xd600) AM_READ_PORT("DSW1")
145	151	AM_RANGE(0xd601, 0xd601) AM_READ_PORT("DSW2")
146	152	AM_RANGE(0xd602, 0xd602) AM_READ_PORT("DSW3")
r4679	r4680
149	155	AM_RANGE(0xd609, 0xd609) AM_READ_PORT("IN1")   /* coin + accelerator */
150	156	//  AM_RANGE(0xd60a, 0xd60a) // other inputs, not used?
151	157	//  AM_RANGE(0xd60b, 0xd60b) // other inputs, not used?
152		ADDRESS_MAP_END
153
154		static ADDRESS_MAP_START( writemem, ADDRESS_SPACE_PROGRAM, 8 )
155		AM_RANGE(0x0000, 0x3fff) AM_WRITE(SMH_ROM) /* A22-04 (23) */
156		AM_RANGE(0x4000, 0x7fff) AM_WRITE(SMH_ROM) /* A22-05 (22) */
157		AM_RANGE(0x8000, 0x87ff) AM_WRITE(SMH_RAM) /* 6116 SRAM (36) */
158		AM_RANGE(0x8800, 0x8fff) AM_WRITE(SMH_RAM) /* 6116 SRAM (35) */
159		AM_RANGE(0x9000, 0x9fff) AM_WRITE(buggychl_sprite_lookup_w)
160		AM_RANGE(0xa000, 0xbfff) AM_WRITE(buggychl_chargen_w) AM_BASE(&buggychl_character_ram)
161		AM_RANGE(0xc800, 0xcfff) AM_WRITE(SMH_RAM) AM_BASE(&videoram) AM_SIZE(&videoram_size)
162		//  AM_RANGE(0xd000, 0xd000) // horizon
163		AM_RANGE(0xd100, 0xd100) AM_WRITE(buggychl_ctrl_w)
164		AM_RANGE(0xd200, 0xd200) AM_WRITE(bankswitch_w)
165		AM_RANGE(0xd300, 0xd300) AM_WRITE(watchdog_reset_w)
166		//  AM_RANGE(0xd301, 0xd301)
167		//  AM_RANGE(0xd302, 0xd302) // reset mcu
168		AM_RANGE(0xd303, 0xd303) AM_WRITE(buggychl_sprite_lookup_bank_w)
169		//  AM_RANGE(0xd304, 0xd307) // sccon 1-4
170		AM_RANGE(0xd400, 0xd400) AM_WRITE(buggychl_mcu_w)
171		AM_RANGE(0xd500, 0xd57f) AM_WRITE(SMH_RAM) AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
172	158	AM_RANGE(0xd610, 0xd610) AM_WRITE(sound_command_w)
173		//  AM_RANGE(0xd613, 0xd613) // reset sound cpu & sound chips
174	159	AM_RANGE(0xd618, 0xd618) AM_WRITENOP   /* accelerator clear */
175	160	AM_RANGE(0xd700, 0xd7ff) AM_WRITE(paletteram_xxxxRRRRGGGGBBBB_be_w) AM_BASE(&paletteram)
176	161	AM_RANGE(0xd840, 0xd85f) AM_WRITE(SMH_RAM) AM_BASE(&buggychl_scrollv)
r4679	r4680
179	164	AM_RANGE(0xdc06, 0xdc06) AM_WRITE(buggychl_bg_scrollx_w)
180	165	ADDRESS_MAP_END
181	166
182		static ADDRESS_MAP_START( sound_readmem, ADDRESS_SPACE_PROGRAM, 8 )
183		AM_RANGE(0x0000, 0x3fff) AM_READ(SMH_ROM)
184		AM_RANGE(0x4000, 0x47ff) AM_READ(SMH_RAM)
185		AM_RANGE(0x5000, 0x5000) AM_READ(soundlatch_r)
186		//  AM_RANGE(0x5001, 0x5001) AM_READ(SMH_RAM)   /* is command pending? */
187		AM_RANGE(0xe000, 0xefff) AM_READ(SMH_ROM)   /* space for diagnostics ROM */
188		ADDRESS_MAP_END
189
190		static ADDRESS_MAP_START( sound_writemem, ADDRESS_SPACE_PROGRAM, 8 )
191		AM_RANGE(0x0000, 0x3fff) AM_WRITE(SMH_ROM)
192		AM_RANGE(0x4000, 0x47ff) AM_WRITE(SMH_RAM)
	167	static ADDRESS_MAP_START( sound_map, ADDRESS_SPACE_PROGRAM, 8 )
	168	AM_RANGE(0x0000, 0x3fff) AM_ROM
	169	AM_RANGE(0x4000, 0x47ff) AM_RAM
193	170	AM_RANGE(0x4800, 0x4801) AM_DEVWRITE("ay1", ay8910_address_data_w)
194	171	AM_RANGE(0x4802, 0x4803) AM_DEVWRITE("ay2", ay8910_address_data_w)
195	172	AM_RANGE(0x4810, 0x481d) AM_DEVWRITE("msm", msm5232_w)
196		AM_RANGE(0x4820, 0x4820) AM_WRITE(SMH_RAM)   /* VOL/BAL   for the 7630 on the MSM5232 output */
197		AM_RANGE(0x4830, 0x4830) AM_WRITE(SMH_RAM)   /* TRBL/BASS for the 7630 on the MSM5232 output  */
198		//  AM_RANGE(0x5000, 0x5000) AM_WRITE(SMH_RAM)  /* to main cpu */
	173	AM_RANGE(0x4820, 0x4820) AM_RAM   /* VOL/BAL   for the 7630 on the MSM5232 output */
	174	AM_RANGE(0x4830, 0x4830) AM_RAM   /* TRBL/BASS for the 7630 on the MSM5232 output  */
	175	AM_RANGE(0x5000, 0x5000) AM_READ(soundlatch_r)
	176	//  AM_RANGE(0x5001, 0x5001) AM_READ(SMH_RAM)   /* is command pending? */
199	177	AM_RANGE(0x5001, 0x5001) AM_WRITE(nmi_enable_w)
200	178	AM_RANGE(0x5002, 0x5002) AM_WRITE(nmi_disable_w)
201	179	AM_RANGE(0x5003, 0x5003) AM_WRITE(sound_enable_w)
202		AM_RANGE(0xe000, 0xefff) AM_WRITE(SMH_ROM)
	180	AM_RANGE(0xe000, 0xefff) AM_ROM   /* space for diagnostics ROM */
203	181	ADDRESS_MAP_END
204	182
205		static ADDRESS_MAP_START( mcu_readmem, ADDRESS_SPACE_PROGRAM, 8 )
	183	static ADDRESS_MAP_START( mcu_map, ADDRESS_SPACE_PROGRAM, 8 )
206	184	ADDRESS_MAP_GLOBAL_MASK(0x7ff)
207		AM_RANGE(0x0000, 0x0000) AM_READ(buggychl_68705_portA_r)
208		AM_RANGE(0x0001, 0x0001) AM_READ(buggychl_68705_portB_r)
209		AM_RANGE(0x0002, 0x0002) AM_READ(buggychl_68705_portC_r)
210		AM_RANGE(0x0010, 0x007f) AM_READ(SMH_RAM)
211		AM_RANGE(0x0080, 0x07ff) AM_READ(SMH_ROM)
212		ADDRESS_MAP_END
213
214		static ADDRESS_MAP_START( mcu_writemem, ADDRESS_SPACE_PROGRAM, 8 )
215		ADDRESS_MAP_GLOBAL_MASK(0x7ff)
216		AM_RANGE(0x0000, 0x0000) AM_WRITE(buggychl_68705_portA_w)
217		AM_RANGE(0x0001, 0x0001) AM_WRITE(buggychl_68705_portB_w)
218		AM_RANGE(0x0002, 0x0002) AM_WRITE(buggychl_68705_portC_w)
	185	AM_RANGE(0x0000, 0x0000) AM_READWRITE(buggychl_68705_portA_r, buggychl_68705_portA_w)
	186	AM_RANGE(0x0001, 0x0001) AM_READWRITE(buggychl_68705_portB_r, buggychl_68705_portB_w)
	187	AM_RANGE(0x0002, 0x0002) AM_READWRITE(buggychl_68705_portC_r, buggychl_68705_portC_w)
219	188	AM_RANGE(0x0004, 0x0004) AM_WRITE(buggychl_68705_ddrA_w)
220	189	AM_RANGE(0x0005, 0x0005) AM_WRITE(buggychl_68705_ddrB_w)
221	190	AM_RANGE(0x0006, 0x0006) AM_WRITE(buggychl_68705_ddrC_w)
222		AM_RANGE(0x0010, 0x007f) AM_WRITE(SMH_RAM)
223		AM_RANGE(0x0080, 0x07ff) AM_WRITE(SMH_ROM)
	191	AM_RANGE(0x0010, 0x007f) AM_RAM
	192	AM_RANGE(0x0080, 0x07ff) AM_ROM
224	193	ADDRESS_MAP_END
225	194
226	195	/******************************************************************************/
r4679	r4680
406	375
407	376	/* basic machine hardware */
408	377	MDRV_CPU_ADD("maincpu", Z80, 4000000) /* 4 MHz??? */
409		MDRV_CPU_PROGRAM_MAP(readmem,writemem)
	378	MDRV_CPU_PROGRAM_MAP(buggychl_map,0)
410	379	MDRV_CPU_VBLANK_INT("screen", irq0_line_hold)
411	380
412	381	MDRV_CPU_ADD("audiocpu", Z80, 4000000) /* 4 MHz??? */
413		MDRV_CPU_PROGRAM_MAP(sound_readmem,sound_writemem)
	382	MDRV_CPU_PROGRAM_MAP(sound_map,0)
414	383	MDRV_CPU_VBLANK_INT_HACK(irq0_line_hold,60)   /* irq is timed, tied to the cpu clock and not to vblank */
415	384	/* nmi is caused by the main cpu */
416	385
417	386	MDRV_CPU_ADD("mcu", M68705,8000000/2)  /* 4 MHz */
418		MDRV_CPU_PROGRAM_MAP(mcu_readmem,mcu_writemem)
	387	MDRV_CPU_PROGRAM_MAP(mcu_map,0)
419	388
420	389	/* video hardware */
421	390	MDRV_SCREEN_ADD("screen", RASTER)

src/mame/drivers/segac2.c

r4679	r4680
68	68
69	69	#include "driver.h"
70	70	#include "cpu/m68000/m68000.h"
71		//#include "genesis.h"
72		#include "megadriv.h"
73	71	#include "sound/okim6295.h"
74	72	#include "sound/sn76496.h"
75	73	#include "sound/2612intf.h"
76	74	#include "sound/upd7759.h"
77	75
	76	#include "megadriv.h"
	77
78	78	#define XL1_CLOCK         640000
79	79	#define XL2_CLOCK         53693175
80	80
r4679	r4680
1315	1315	static void  segac2_irq2_interrupt(const device_config *device, int state)
1316	1316	{
1317	1317	//printf("sound irq %d\n", state);
1318		cpu_set_input_line(device->machine->cpu[0], 2, state ? ASSERT_LINE : CLEAR_LINE);
	1318	cputag_set_input_line(device->machine, "maincpu", 2, state ? ASSERT_LINE : CLEAR_LINE);
1319	1319	}
1320	1320	static const ym3438_interface ym3438_intf =
1321	1321	{
r4679	r4680
1341	1341	VIDEO_START_CALL(megadriv);
1342	1342
1343	1343
1344		megadrive_vdp_palette_lookup = auto_malloc(0x1000);
1345		megadrive_vdp_palette_lookup_sprite = auto_malloc(0x1000);
1346		megadrive_vdp_palette_lookup_shadow = auto_malloc(0x1000);
1347		megadrive_vdp_palette_lookup_highlight = auto_malloc(0x1000);
	1344	megadrive_vdp_palette_lookup = auto_alloc_array(machine, UINT16, 0x1000/2);
	1345	megadrive_vdp_palette_lookup_sprite = auto_alloc_array(machine, UINT16, 0x1000/2);
	1346	megadrive_vdp_palette_lookup_shadow = auto_alloc_array(machine, UINT16, 0x1000/2);
	1347	megadrive_vdp_palette_lookup_highlight = auto_alloc_array(machine, UINT16, 0x1000/2);
1348	1348	}
1349	1349
1350	1350	static VIDEO_UPDATE(segac2_new)
r4679	r4680
1826	1826	prot_func = func;
1827	1827
1828	1828	genvdp_use_cram = 0;
1829		genesis_has_z80 = 0;
1830	1829	genesis_always_irq6 = 1;
1831	1830	genesis_other_hacks = 0;
1832	1831
1833	1832	if (upd != NULL)
1834		memory_install_write16_device_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), upd, 0x880000, 0x880001, 0, 0x13fefe, segac2_upd7759_w);
	1833	memory_install_write16_device_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), upd, 0x880000, 0x880001, 0, 0x13fefe, segac2_upd7759_w);
1835	1834	}
1836	1835
1837	1836
r4679	r4680
2088	2087	{
2089	2088	/* disable the palette bank switching from the protection chip */
2090	2089	segac2_common_init(machine, NULL);
2091		memory_install_write16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x800000, 0x800001, 0, 0, SMH_NOP);
	2090	memory_install_write16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x800000, 0x800001, 0, 0, (write16_space_func)SMH_NOP);
2092	2091	}
2093	2092
2094	2093	static DRIVER_INIT( borench )
r4679	r4680
2176	2175	{
2177	2176	segac2_common_init(machine, prot_func_pclub);
2178	2177
2179		memory_install_read16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x880120, 0x880121, 0, 0, printer_r );/*Print Club Vol.1*/
2180		memory_install_read16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x880124, 0x880125, 0, 0, printer_r );/*Print Club Vol.2*/
2181		memory_install_write16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x880124, 0x880125, 0, 0, print_club_camera_w);
	2178	memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x880120, 0x880121, 0, 0, printer_r );/*Print Club Vol.1*/
	2179	memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x880124, 0x880125, 0, 0, printer_r );/*Print Club Vol.2*/
	2180	memory_install_write16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x880124, 0x880125, 0, 0, print_club_camera_w);
2182	2181	}
2183	2182
2184	2183	static DRIVER_INIT( pclubjv2 )
2185	2184	{
2186	2185	segac2_common_init(machine, prot_func_pclubjv2);
2187	2186
2188		memory_install_read16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x880120, 0x880121, 0, 0, printer_r );/*Print Club Vol.1*/
2189		memory_install_read16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x880124, 0x880125, 0, 0, printer_r );/*Print Club Vol.2*/
2190		memory_install_write16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x880124, 0x880125, 0, 0, print_club_camera_w);
	2187	memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x880120, 0x880121, 0, 0, printer_r );/*Print Club Vol.1*/
	2188	memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x880124, 0x880125, 0, 0, printer_r );/*Print Club Vol.2*/
	2189	memory_install_write16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x880124, 0x880125, 0, 0, print_club_camera_w);
2191	2190	}
2192	2191
2193	2192	static DRIVER_INIT( pclubjv4 )
2194	2193	{
2195	2194	segac2_common_init(machine, prot_func_pclubjv4);
2196	2195
2197		memory_install_read16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x880120, 0x880121, 0, 0, printer_r );/*Print Club Vol.1*/
2198		memory_install_read16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x880124, 0x880125, 0, 0, printer_r );/*Print Club Vol.2*/
2199		memory_install_write16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x880124, 0x880125, 0, 0, print_club_camera_w);
	2196	memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x880120, 0x880121, 0, 0, printer_r );/*Print Club Vol.1*/
	2197	memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x880124, 0x880125, 0, 0, printer_r );/*Print Club Vol.2*/
	2198	memory_install_write16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x880124, 0x880125, 0, 0, print_club_camera_w);
2200	2199	}
2201	2200
2202	2201	static DRIVER_INIT( pclubjv5 )
2203	2202	{
2204	2203	segac2_common_init(machine, prot_func_pclubjv5);
2205	2204
2206		memory_install_read16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x880120, 0x880121, 0, 0, printer_r );/*Print Club Vol.1*/
2207		memory_install_read16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x880124, 0x880125, 0, 0, printer_r );/*Print Club Vol.2*/
2208		memory_install_write16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x880124, 0x880125, 0, 0, print_club_camera_w);
	2205	memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x880120, 0x880121, 0, 0, printer_r );/*Print Club Vol.1*/
	2206	memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x880124, 0x880125, 0, 0, printer_r );/*Print Club Vol.2*/
	2207	memory_install_write16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x880124, 0x880125, 0, 0, print_club_camera_w);
2209	2208	}
2210	2209
2211	2210

src/mame/drivers/gotcha.c

r4679	r4680
106	106
107	107
108	108
109		static ADDRESS_MAP_START( readmem, ADDRESS_SPACE_PROGRAM, 16 )
110		AM_RANGE(0x000000, 0x07ffff) AM_READ(SMH_ROM)
111		AM_RANGE(0x120000, 0x12ffff) AM_READ(SMH_RAM)
112		AM_RANGE(0x140000, 0x1405ff) AM_READ(SMH_RAM)
113		AM_RANGE(0x160000, 0x1607ff) AM_READ(SMH_RAM)
114		AM_RANGE(0x180000, 0x180001) AM_READ_PORT("INPUTS")
115		AM_RANGE(0x180002, 0x180003) AM_READ_PORT("SYSTEM")
116		AM_RANGE(0x180004, 0x180005) AM_READ_PORT("DSW")
117		ADDRESS_MAP_END
118
119		static ADDRESS_MAP_START( writemem, ADDRESS_SPACE_PROGRAM, 16 )
120		AM_RANGE(0x000000, 0x07ffff) AM_WRITE(SMH_ROM)
	109	static ADDRESS_MAP_START( gotcha_map, ADDRESS_SPACE_PROGRAM, 16 )
	110	AM_RANGE(0x000000, 0x07ffff) AM_ROM
121	111	AM_RANGE(0x100000, 0x100001) AM_WRITE(soundlatch_word_w)
122	112	AM_RANGE(0x100002, 0x100003) AM_WRITE(gotcha_lamps_w)
123	113	AM_RANGE(0x100004, 0x100005) AM_DEVWRITE("oki", gotcha_oki_bank_w)
124		AM_RANGE(0x120000, 0x12ffff) AM_WRITE(SMH_RAM)
125		AM_RANGE(0x140000, 0x1405ff) AM_WRITE(paletteram16_xRRRRRGGGGGBBBBB_word_w) AM_BASE(&paletteram16)
126		AM_RANGE(0x160000, 0x1607ff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)
	114	AM_RANGE(0x120000, 0x12ffff) AM_RAM
	115	AM_RANGE(0x140000, 0x1405ff) AM_RAM_WRITE(paletteram16_xRRRRRGGGGGBBBBB_word_w) AM_BASE(&paletteram16)
	116	AM_RANGE(0x160000, 0x1607ff) AM_RAM AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)
	117	AM_RANGE(0x180000, 0x180001) AM_READ_PORT("INPUTS")
	118	AM_RANGE(0x180002, 0x180003) AM_READ_PORT("SYSTEM")
	119	AM_RANGE(0x180004, 0x180005) AM_READ_PORT("DSW")
127	120	AM_RANGE(0x300000, 0x300001) AM_WRITE(gotcha_gfxbank_select_w)
128	121	AM_RANGE(0x300002, 0x300009) AM_WRITE(gotcha_scroll_w)
129	122	//  { 0x30000c, 0x30000d,
r4679	r4680
133	126	ADDRESS_MAP_END
134	127
135	128
136		static ADDRESS_MAP_START( sound_readmem, ADDRESS_SPACE_PROGRAM, 8 )
137		AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM)
138		AM_RANGE(0xc000, 0xc001) AM_DEVREAD("ym", ym2151_r)
	129	static ADDRESS_MAP_START( sound_map, ADDRESS_SPACE_PROGRAM, 8 )
	130	AM_RANGE(0x0000, 0x7fff) AM_ROM
	131	AM_RANGE(0xc000, 0xc001) AM_DEVREADWRITE("ym", ym2151_r, ym2151_w)
	132	AM_RANGE(0xc002, 0xc003) AM_DEVWRITE("oki", okim6295_w)   // TWO addresses!
139	133	AM_RANGE(0xc006, 0xc006) AM_READ(soundlatch_r)
140		AM_RANGE(0xd000, 0xd7ff) AM_READ(SMH_RAM)
	134	AM_RANGE(0xd000, 0xd7ff) AM_RAM
141	135	ADDRESS_MAP_END
142	136
143		static ADDRESS_MAP_START( sound_writemem, ADDRESS_SPACE_PROGRAM, 8 )
144		AM_RANGE(0x0000, 0x7fff) AM_WRITE(SMH_ROM)
145		AM_RANGE(0xc000, 0xc001) AM_DEVWRITE("ym", ym2151_w)
146		AM_RANGE(0xc002, 0xc003) AM_DEVWRITE("oki", okim6295_w)   // TWO addresses!
147		AM_RANGE(0xd000, 0xd7ff) AM_WRITE(SMH_RAM)
148		ADDRESS_MAP_END
149	137
150	138
151
152	139	static INPUT_PORTS_START( gotcha )
153	140	PORT_START("INPUTS")
154	141	PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(1)
r4679	r4680
262	249
263	250	static void irqhandler(const device_config *device, int linestate)
264	251	{
265		cpu_set_input_line(device->machine->cpu[1],0,linestate);
	252	cputag_set_input_line(device->machine, "audiocpu", 0, linestate);
266	253	}
267	254
268	255	static const ym2151_interface ym2151_config =
r4679	r4680
276	263
277	264	/* basic machine hardware */
278	265	MDRV_CPU_ADD("maincpu", M68000,14318180)   /* 14.31818 MHz */
279		MDRV_CPU_PROGRAM_MAP(readmem,writemem)
	266	MDRV_CPU_PROGRAM_MAP(gotcha_map,0)
280	267	MDRV_CPU_VBLANK_INT("screen", irq6_line_hold)
281	268
282	269	MDRV_CPU_ADD("audiocpu", Z80,6000000)   /* 6 MHz */
283		MDRV_CPU_PROGRAM_MAP(sound_readmem,sound_writemem)
	270	MDRV_CPU_PROGRAM_MAP(sound_map,0)
284	271	//  MDRV_CPU_VBLANK_INT("screen", nmi_line_pulse)
285	272
286	273	/* video hardware */

src/mame/drivers/starshp1.c

r4679	r4680
164	164	}
165	165
166	166
167		static ADDRESS_MAP_START( readmem, ADDRESS_SPACE_PROGRAM, 8 )
168		AM_RANGE(0x0000, 0x00ff) AM_READ(SMH_RAM) AM_MIRROR(0x100)
169		AM_RANGE(0x2c00, 0x3fff) AM_READ(SMH_ROM)
	167	static ADDRESS_MAP_START( starshp1_map, ADDRESS_SPACE_PROGRAM, 8 )
	168	AM_RANGE(0x0000, 0x00ff) AM_RAM AM_MIRROR(0x100)
	169	AM_RANGE(0x2c00, 0x3fff) AM_ROM
170	170	AM_RANGE(0xa000, 0xa000) AM_READ_PORT("SYSTEM")
171	171	AM_RANGE(0xb000, 0xb000) AM_READ_PORT("VBLANK")
172		AM_RANGE(0xc400, 0xc400) AM_READ_PORT("COINAGE")
173		AM_RANGE(0xd800, 0xd800) AM_READ(starshp1_rng_r)
174		AM_RANGE(0xf000, 0xffff) AM_READ(SMH_ROM)
175		ADDRESS_MAP_END
176
177		static ADDRESS_MAP_START( writemem, ADDRESS_SPACE_PROGRAM, 8 )
178		AM_RANGE(0x0000, 0x00ff) AM_WRITE(SMH_RAM) AM_MIRROR(0x100)
179		AM_RANGE(0x2c00, 0x3fff) AM_WRITE(SMH_ROM)
180	172	AM_RANGE(0xc300, 0xc3ff) AM_WRITE(starshp1_sspic_w) /* spaceship picture */
	173	AM_RANGE(0xc400, 0xc400) AM_READ_PORT("COINAGE")
181	174	AM_RANGE(0xc400, 0xc4ff) AM_WRITE(starshp1_ssadd_w) /* spaceship address */
182		AM_RANGE(0xc800, 0xc9ff) AM_WRITE(starshp1_playfield_w) AM_BASE(&starshp1_playfield_ram)
183		AM_RANGE(0xcc00, 0xcc0f) AM_WRITE(SMH_RAM) AM_BASE(&starshp1_hpos_ram)
184		AM_RANGE(0xd000, 0xd00f) AM_WRITE(SMH_RAM) AM_BASE(&starshp1_vpos_ram)
185		AM_RANGE(0xd400, 0xd40f) AM_WRITE(SMH_RAM) AM_BASE(&starshp1_obj_ram)
	175	AM_RANGE(0xc800, 0xc9ff) AM_RAM_WRITE(starshp1_playfield_w) AM_BASE(&starshp1_playfield_ram)
	176	AM_RANGE(0xcc00, 0xcc0f) AM_WRITEONLY AM_BASE(&starshp1_hpos_ram)
	177	AM_RANGE(0xd000, 0xd00f) AM_WRITEONLY AM_BASE(&starshp1_vpos_ram)
	178	AM_RANGE(0xd400, 0xd40f) AM_WRITEONLY AM_BASE(&starshp1_obj_ram)
	179	AM_RANGE(0xd800, 0xd800) AM_READ(starshp1_rng_r)
186	180	AM_RANGE(0xd800, 0xd80f) AM_WRITE(starshp1_collision_reset_w)
187	181	AM_RANGE(0xdc00, 0xdc0f) AM_WRITE(starshp1_misc_w)
188	182	AM_RANGE(0xdd00, 0xdd0f) AM_WRITE(starshp1_analog_in_w)
189	183	AM_RANGE(0xde00, 0xde0f) AM_DEVWRITE("discrete", starshp1_audio_w)
190	184	AM_RANGE(0xdf00, 0xdf0f) AM_DEVWRITE("discrete", starshp1_analog_out_w)
191		AM_RANGE(0xf000, 0xffff) AM_WRITE(SMH_ROM)
	185	AM_RANGE(0xf000, 0xffff) AM_ROM
192	186	ADDRESS_MAP_END
193	187
194	188
r4679	r4680
304	298	/* basic machine hardware */
305	299
306	300	MDRV_CPU_ADD("maincpu", M6502, STARSHP1_CPU_CLOCK)
307		MDRV_CPU_PROGRAM_MAP(readmem, writemem)
	301	MDRV_CPU_PROGRAM_MAP(starshp1_map, 0)
308	302	MDRV_CPU_VBLANK_INT("screen", starshp1_interrupt)
309	303
310	304	/* video hardware */

src/mame/drivers/pandoras.c

r4679	r4680
38	38	VIDEO_START( pandoras );
39	39	VIDEO_UPDATE( pandoras );
40	40
41		static INTERRUPT_GEN( pandoras_interrupt_a ){
	41	static INTERRUPT_GEN( pandoras_master_interrupt )
	42	{
42	43	if (irq_enable_a)
43	44	cpu_set_input_line(device, M6809_IRQ_LINE, HOLD_LINE);
44	45	}
45	46
46		static INTERRUPT_GEN( pandoras_interrupt_b ){
	47	static INTERRUPT_GEN( pandoras_slave_interrupt )
	48	{
47	49	if (irq_enable_b)
48	50	cpu_set_input_line(device, M6809_IRQ_LINE, HOLD_LINE);
49	51	}
50	52
51		static WRITE8_HANDLER( pandoras_int_control_w ){
	53	static WRITE8_HANDLER( pandoras_int_control_w )
	54	{
52	55	/*  byte 0: irq enable (CPU A)
53	56	byte 2: coin counter 1
54	57	byte 3: coin counter 2
r4679	r4680
58	61
59	62	other bytes unknown */
60	63
61		switch (offset){
62		case 0x00:   if (!data) cpu_set_input_line(space->machine->cpu[0], M6809_IRQ_LINE, CLEAR_LINE);
	64	switch (offset)
	65	{
	66	case 0x00:   if (!data) cputag_set_input_line(space->machine, "maincpu", M6809_IRQ_LINE, CLEAR_LINE);
63	67	irq_enable_a = data;
64	68	break;
65	69	case 0x02:   coin_counter_w(0,data & 0x01);
r4679	r4680
68	72	break;
69	73	case 0x05:   pandoras_flipscreen_w(space, 0, data);
70	74	break;
71		case 0x06:   if (!data) cpu_set_input_line(space->machine->cpu[1], M6809_IRQ_LINE, CLEAR_LINE);
	75	case 0x06:   if (!data) cputag_set_input_line(space->machine, "sub", M6809_IRQ_LINE, CLEAR_LINE);
72	76	irq_enable_b = data;
73	77	break;
74		case 0x07:   cpu_set_input_line(space->machine->cpu[1],INPUT_LINE_NMI,PULSE_LINE);
	78	case 0x07:   cputag_set_input_line(space->machine, "sub",INPUT_LINE_NMI,PULSE_LINE);
75	79	break;
76	80
77	81	default:
r4679	r4680
79	83	}
80	84	}
81	85
82		static WRITE8_HANDLER( pandoras_cpua_irqtrigger_w ){
83		if (!firq_old_data_a && data){
84		cpu_set_input_line(space->machine->cpu[0],M6809_FIRQ_LINE,HOLD_LINE);
	86	static WRITE8_HANDLER( pandoras_cpua_irqtrigger_w )
	87	{
	88	if (!firq_old_data_a && data)
	89	{
	90	cputag_set_input_line(space->machine, "maincpu", M6809_FIRQ_LINE, HOLD_LINE);
85	91	}
86	92
87	93	firq_old_data_a = data;
88	94	}
89	95
90		static WRITE8_HANDLER( pandoras_cpub_irqtrigger_w ){
91		if (!firq_old_data_b && data){
92		cpu_set_input_line(space->machine->cpu[1],M6809_FIRQ_LINE,HOLD_LINE);
	96	static WRITE8_HANDLER( pandoras_cpub_irqtrigger_w )
	97	{
	98	if (!firq_old_data_b && data)
	99	{
	100	cputag_set_input_line(space->machine, "sub", M6809_FIRQ_LINE, HOLD_LINE);
93	101	}
94	102
95	103	firq_old_data_b = data;
r4679	r4680
97	105
98	106	static WRITE8_HANDLER( pandoras_i8039_irqtrigger_w )
99	107	{
100		cpu_set_input_line(space->machine->cpu[3], 0, ASSERT_LINE);
	108	cputag_set_input_line(space->machine, "mcu", 0, ASSERT_LINE);
101	109	}
102	110
103	111	static WRITE8_HANDLER( i8039_irqen_and_status_w )
104	112	{
105	113	/* bit 7 enables IRQ */
106	114	if ((data & 0x80) == 0)
107		cpu_set_input_line(space->machine->cpu[3], 0, CLEAR_LINE);
	115	cputag_set_input_line(space->machine, "mcu", 0, CLEAR_LINE);
108	116
109	117	/* bit 5 goes to 8910 port A */
110	118	i8039_status = (data & 0x20) >> 5;
r4679	r4680
112	120
113	121	static WRITE8_HANDLER( pandoras_z80_irqtrigger_w )
114	122	{
115		cpu_set_input_line_and_vector(space->machine->cpu[2],0,HOLD_LINE,0xff);
	123	cputag_set_input_line_and_vector(space->machine, "audiocpu", 0, HOLD_LINE, 0xff);
116	124	}
117	125
118	126
119	127
120		static ADDRESS_MAP_START( pandoras_readmem_a, ADDRESS_SPACE_PROGRAM, 8 )
121		AM_RANGE(0x0000, 0x0fff) AM_READ(SMH_RAM) AM_SHARE(1)   /* Work RAM (Shared with CPU B) */
122		AM_RANGE(0x1000, 0x13ff) AM_READ(SMH_RAM) AM_SHARE(2)    /* Color RAM (shared with CPU B) */
123		AM_RANGE(0x1400, 0x17ff) AM_READ(SMH_RAM) AM_SHARE(3)   /* Video RAM (shared with CPU B) */
124		AM_RANGE(0x4000, 0x5fff) AM_READ(SMH_ROM)            /* space for diagnostic ROM */
125		AM_RANGE(0x6000, 0x67ff) AM_READ(SMH_RAM) AM_SHARE(4)   /* Shared RAM with CPU B */
126		AM_RANGE(0x8000, 0xffff) AM_READ(SMH_ROM)            /* ROM */
	128	static ADDRESS_MAP_START( pandoras_master_map, ADDRESS_SPACE_PROGRAM, 8 )
	129	AM_RANGE(0x0000, 0x0fff) AM_RAM AM_SHARE(1) AM_BASE(&spriteram)                   /* Work RAM (Shared with CPU B) */
	130	AM_RANGE(0x1000, 0x13ff) AM_RAM_WRITE(pandoras_cram_w) AM_SHARE(2) AM_BASE(&colorram)   /* Color RAM (shared with CPU B) */
	131	AM_RANGE(0x1400, 0x17ff) AM_RAM_WRITE(pandoras_vram_w) AM_SHARE(3) AM_BASE(&videoram)   /* Video RAM (shared with CPU B) */
	132	AM_RANGE(0x1800, 0x1807) AM_WRITE(pandoras_int_control_w)                        /* INT control */
	133	AM_RANGE(0x1a00, 0x1a00) AM_WRITE(pandoras_scrolly_w)                           /* bg scroll */
	134	AM_RANGE(0x1c00, 0x1c00) AM_WRITE(pandoras_z80_irqtrigger_w)                     /* cause INT on the Z80 */
	135	AM_RANGE(0x1e00, 0x1e00) AM_WRITE(soundlatch_w)                                 /* sound command to the Z80 */
	136	AM_RANGE(0x2000, 0x2000) AM_WRITE(pandoras_cpub_irqtrigger_w)                     /* cause FIRQ on CPU B */
	137	AM_RANGE(0x2001, 0x2001) AM_WRITE(watchdog_reset_w)                              /* watchdog reset */
	138	AM_RANGE(0x4000, 0x5fff) AM_ROM                                             /* space for diagnostic ROM */
	139	AM_RANGE(0x6000, 0x67ff) AM_RAM AM_SHARE(4)                                  /* Shared RAM with CPU B */
	140	AM_RANGE(0x8000, 0xffff) AM_ROM                                             /* ROM */
127	141	ADDRESS_MAP_END
128	142
129		static ADDRESS_MAP_START( pandoras_writemem_a, ADDRESS_SPACE_PROGRAM, 8 )
130		AM_RANGE(0x0000, 0x0fff) AM_WRITE(SMH_RAM) AM_SHARE(1) AM_BASE(&spriteram) /* Work RAM (Shared with CPU B) */
131		AM_RANGE(0x1000, 0x13ff) AM_WRITE(pandoras_cram_w) AM_SHARE(2) AM_BASE(&colorram)               /* Color RAM (shared with CPU B) */
132		AM_RANGE(0x1400, 0x17ff) AM_WRITE(pandoras_vram_w) AM_SHARE(3) AM_BASE(&videoram)               /* Video RAM (shared with CPU B) */
133		AM_RANGE(0x1800, 0x1807) AM_WRITE(pandoras_int_control_w)                  /* INT control */
134		AM_RANGE(0x1a00, 0x1a00) AM_WRITE(pandoras_scrolly_w)                     /* bg scroll */
135		AM_RANGE(0x1c00, 0x1c00) AM_WRITE(pandoras_z80_irqtrigger_w)               /* cause INT on the Z80 */
136		AM_RANGE(0x1e00, 0x1e00) AM_WRITE(soundlatch_w)                        /* sound command to the Z80 */
137		AM_RANGE(0x2000, 0x2000) AM_WRITE(pandoras_cpub_irqtrigger_w)               /* cause FIRQ on CPU B */
138		AM_RANGE(0x2001, 0x2001) AM_WRITE(watchdog_reset_w)                     /* watchdog reset */
139		AM_RANGE(0x4000, 0x5fff) AM_WRITE(SMH_ROM)                           /* see notes */
140		AM_RANGE(0x6000, 0x67ff) AM_WRITE(SMH_RAM) AM_SHARE(4) /* Shared RAM with CPU B */
141		AM_RANGE(0x8000, 0xffff) AM_WRITE(SMH_ROM)                           /* ROM */
142		ADDRESS_MAP_END
143
144		static ADDRESS_MAP_START( pandoras_readmem_b, ADDRESS_SPACE_PROGRAM, 8 )
145		AM_RANGE(0x0000, 0x0fff) AM_READ(SMH_RAM) AM_SHARE(1)/* Work RAM (Shared with CPU A) */
146		AM_RANGE(0x1000, 0x13ff) AM_READ(SMH_RAM) AM_SHARE(2)       /* Color RAM (shared with CPU A) */
147		AM_RANGE(0x1400, 0x17ff) AM_READ(SMH_RAM) AM_SHARE(3)    /* Video RAM (shared with CPU A) */
	143	static ADDRESS_MAP_START( pandoras_slave_map, ADDRESS_SPACE_PROGRAM, 8 )
	144	AM_RANGE(0x0000, 0x0fff) AM_RAM AM_SHARE(1)                                    /* Work RAM (Shared with CPU A) */
	145	AM_RANGE(0x1000, 0x13ff) AM_RAM_WRITE(pandoras_cram_w) AM_SHARE(2)                   /* Color RAM (shared with CPU A) */
	146	AM_RANGE(0x1400, 0x17ff) AM_RAM_WRITE(pandoras_vram_w) AM_SHARE(3)                   /* Video RAM (shared with CPU A) */
148	147	AM_RANGE(0x1800, 0x1800) AM_READ_PORT("DSW1")
	148	AM_RANGE(0x1800, 0x1807) AM_WRITE(pandoras_int_control_w)                        /* INT control */
149	149	AM_RANGE(0x1a00, 0x1a00) AM_READ_PORT("SYSTEM")
150	150	AM_RANGE(0x1a01, 0x1a01) AM_READ_PORT("P1")
151	151	AM_RANGE(0x1a02, 0x1a02) AM_READ_PORT("P2")
152	152	AM_RANGE(0x1a03, 0x1a03) AM_READ_PORT("DSW3")
153	153	AM_RANGE(0x1c00, 0x1c00) AM_READ_PORT("DSW2")
154		//  AM_RANGE(0x1e00, 0x1e00) AM_READNOP              /* ??? seems to be important */
155		AM_RANGE(0xc000, 0xc7ff) AM_READ(SMH_RAM) AM_SHARE(4)   /* Shared RAM with the CPU A */
156		AM_RANGE(0xe000, 0xffff) AM_READ(SMH_ROM)            /* ROM */
	154	//  AM_RANGE(0x1e00, 0x1e00) AM_READNOP                                                     /* ??? seems to be important */
	155	AM_RANGE(0x8000, 0x8000) AM_WRITE(watchdog_reset_w)                              /* watchdog reset */
	156	AM_RANGE(0xa000, 0xa000) AM_WRITE(pandoras_cpua_irqtrigger_w)                     /* cause FIRQ on CPU A */
	157	AM_RANGE(0xc000, 0xc7ff) AM_RAM AM_SHARE(4)                                    /* Shared RAM with the CPU A */
	158	AM_RANGE(0xe000, 0xffff) AM_ROM                                             /* ROM */
157	159	ADDRESS_MAP_END
158	160
159		static ADDRESS_MAP_START( pandoras_writemem_b, ADDRESS_SPACE_PROGRAM, 8 )
160		AM_RANGE(0x0000, 0x0fff) AM_WRITE(SMH_RAM)   AM_SHARE(1) /* Work RAM (Shared with CPU A) */
161		AM_RANGE(0x1000, 0x13ff) AM_WRITE(pandoras_cram_w) AM_SHARE(2)       /* Color RAM (shared with CPU A) */
162		AM_RANGE(0x1400, 0x17ff) AM_WRITE(pandoras_vram_w) AM_SHARE(3)       /* Video RAM (shared with CPU A) */
163		AM_RANGE(0x1800, 0x1807) AM_WRITE(pandoras_int_control_w)   /* INT control */
164		AM_RANGE(0x8000, 0x8000) AM_WRITE(watchdog_reset_w)      /* watchdog reset */
165		AM_RANGE(0xa000, 0xa000) AM_WRITE(pandoras_cpua_irqtrigger_w)/* cause FIRQ on CPU A */
166		AM_RANGE(0xc000, 0xc7ff) AM_WRITE(SMH_RAM) AM_SHARE(4)   /* Shared RAM with the CPU A */
167		AM_RANGE(0xe000, 0xffff) AM_WRITE(SMH_ROM)            /* ROM */
	161	static ADDRESS_MAP_START( pandoras_sound_map, ADDRESS_SPACE_PROGRAM, 8 )
	162	AM_RANGE(0x0000, 0x1fff) AM_ROM                                             /* ROM */
	163	AM_RANGE(0x2000, 0x23ff) AM_RAM                                             /* RAM */
	164	AM_RANGE(0x4000, 0x4000) AM_READ(soundlatch_r)                                 /* soundlatch_r */
	165	AM_RANGE(0x6000, 0x6000) AM_DEVWRITE("ay", ay8910_address_w)                     /* AY-8910 */
	166	AM_RANGE(0x6001, 0x6001) AM_DEVREAD("ay", ay8910_r)                              /* AY-8910 */
	167	AM_RANGE(0x6002, 0x6002) AM_DEVWRITE("ay", ay8910_data_w)                        /* AY-8910 */
	168	AM_RANGE(0x8000, 0x8000) AM_WRITE(pandoras_i8039_irqtrigger_w)                     /* cause INT on the 8039 */
	169	AM_RANGE(0xa000, 0xa000) AM_WRITE(soundlatch2_w)                              /* sound command to the 8039 */
168	170	ADDRESS_MAP_END
169	171
170		static ADDRESS_MAP_START( pandoras_readmem_snd, ADDRESS_SPACE_PROGRAM, 8 )
171		AM_RANGE(0x0000, 0x1fff) AM_READ(SMH_ROM)            /* ROM */
172		AM_RANGE(0x2000, 0x23ff) AM_READ(SMH_RAM)            /* RAM */
173		AM_RANGE(0x4000, 0x4000) AM_READ(soundlatch_r)         /* soundlatch_r */
174		AM_RANGE(0x6001, 0x6001) AM_DEVREAD("ay", ay8910_r)   /* AY-8910 */
	172	static ADDRESS_MAP_START( pandoras_i8039_map, ADDRESS_SPACE_PROGRAM, 8 )
	173	AM_RANGE(0x0000, 0x0fff) AM_ROM
175	174	ADDRESS_MAP_END
176	175
177		static ADDRESS_MAP_START( pandoras_writemem_snd, ADDRESS_SPACE_PROGRAM, 8 )
178		AM_RANGE(0x0000, 0x1fff) AM_WRITE(SMH_ROM)            /* ROM */
179		AM_RANGE(0x2000, 0x23ff) AM_WRITE(SMH_RAM)            /* RAM */
180		AM_RANGE(0x6000, 0x6000) AM_DEVWRITE("ay", ay8910_address_w)/* AY-8910 */
181		AM_RANGE(0x6002, 0x6002) AM_DEVWRITE("ay", ay8910_data_w)   /* AY-8910 */
182		AM_RANGE(0x8000, 0x8000) AM_WRITE(pandoras_i8039_irqtrigger_w)/* cause INT on the 8039 */
183		AM_RANGE(0xa000, 0xa000) AM_WRITE(soundlatch2_w)         /* sound command to the 8039 */
184		ADDRESS_MAP_END
185
186		static ADDRESS_MAP_START( i8039_readmem, ADDRESS_SPACE_PROGRAM, 8 )
187		AM_RANGE(0x0000, 0x0fff) AM_READ(SMH_ROM)
188		ADDRESS_MAP_END
189
190		static ADDRESS_MAP_START( i8039_writemem, ADDRESS_SPACE_PROGRAM, 8 )
191		AM_RANGE(0x0000, 0x0fff) AM_WRITE(SMH_ROM)
192		ADDRESS_MAP_END
193
194		static ADDRESS_MAP_START( i8039_io_map, ADDRESS_SPACE_IO, 8 )
	176	static ADDRESS_MAP_START( pandoras_i8039_io_map, ADDRESS_SPACE_IO, 8 )
195	177	AM_RANGE(0x00, 0xff) AM_READ(soundlatch2_r)
196	178	AM_RANGE(MCS48_PORT_P1, MCS48_PORT_P1) AM_DEVWRITE("dac", dac_w)
197	179	AM_RANGE(MCS48_PORT_P2, MCS48_PORT_P2) AM_WRITE(i8039_irqen_and_status_w)
r4679	r4680
337	319
338	320	/* basic machine hardware */
339	321	MDRV_CPU_ADD("maincpu", M6809,18432000/6)   /* CPU A */
340		MDRV_CPU_PROGRAM_MAP(pandoras_readmem_a,pandoras_writemem_a)
341		MDRV_CPU_VBLANK_INT("screen", pandoras_interrupt_a)
	322	MDRV_CPU_PROGRAM_MAP(pandoras_master_map,0)
	323	MDRV_CPU_VBLANK_INT("screen", pandoras_master_interrupt)
342	324
343		MDRV_CPU_ADD("sub", M6809,18432000/6)   /* CPU B */
344		MDRV_CPU_PROGRAM_MAP(pandoras_readmem_b,pandoras_writemem_b)
345		MDRV_CPU_VBLANK_INT("screen", pandoras_interrupt_b)
	325	MDRV_CPU_ADD("sub", M6809,18432000/6)      /* CPU B */
	326	MDRV_CPU_PROGRAM_MAP(pandoras_slave_map,0)
	327	MDRV_CPU_VBLANK_INT("screen", pandoras_slave_interrupt)
346	328
347	329	MDRV_CPU_ADD("audiocpu", Z80,14318000/8)
348		MDRV_CPU_PROGRAM_MAP(pandoras_readmem_snd,pandoras_writemem_snd)
	330	MDRV_CPU_PROGRAM_MAP(pandoras_sound_map,0)
349	331
350	332	MDRV_CPU_ADD("mcu", I8039,14318000/2)
351		MDRV_CPU_PROGRAM_MAP(i8039_readmem,i8039_writemem)
352		MDRV_CPU_IO_MAP(i8039_io_map,0)
	333	MDRV_CPU_PROGRAM_MAP(pandoras_i8039_map,0)
	334	MDRV_CPU_IO_MAP(pandoras_i8039_io_map,0)
353	335
354	336	MDRV_QUANTUM_TIME(HZ(3000))   /* slices per frame */
355	337

src/mame/drivers/taito_f2.c

r4679	r4680
609	609
610	610	static TIMER_CALLBACK( taitof2_interrupt6 )
611	611	{
612		cpu_set_input_line(machine->cpu[0],6,HOLD_LINE);
	612	cputag_set_input_line(machine, "maincpu", 6, HOLD_LINE);
613	613	}
614	614
615	615	static INTERRUPT_GEN( taitof2_interrupt )
616	616	{
617		timer_set(device->machine, cpu_clocks_to_attotime(device,500), NULL, 0, taitof2_interrupt6);
	617	timer_set(device->machine, cpu_clocks_to_attotime(device, 500), NULL, 0, taitof2_interrupt6);
618	618	cpu_set_input_line(device, 5, HOLD_LINE);
619	619	}
620	620
r4679	r4680
639	639
640	640	static READ8_HANDLER( driveout_sound_command_r)
641	641	{
642		cpu_set_input_line(space->machine->cpu[1],0,CLEAR_LINE);
	642	cputag_set_input_line(space->machine, "audiocpu", 0, CLEAR_LINE);
643	643	//  logerror("sound IRQ OFF (sound command=%02x)\n",driveout_sound_latch);
644	644	return driveout_sound_latch;
645	645	}
r4679	r4680
667	667	if (ACCESSING_BITS_8_15)
668	668	{
669	669	data >>= 8;
670		if (offset==0)
	670	if (offset == 0)
671	671	{
672	672	nibble = data & 1;
673	673	}
r4679	r4680
679	679	}
680	680	else
681	681	{
682		driveout_sound_latch = ((data<<4) & 0xf0) | (driveout_sound_latch & 0x0f);
683		cpu_set_input_line (space->machine->cpu[1], 0, ASSERT_LINE);
	682	driveout_sound_latch = ((data << 4) & 0xf0) | (driveout_sound_latch & 0x0f);
	683	cputag_set_input_line (space->machine, "audiocpu", 0, ASSERT_LINE);
684	684	}
685	685	}
686	686	}
r4679	r4680
3129	3129	/* handler called by the YM2610 emulator when the internal timers cause an IRQ */
3130	3130	static void irq_handler(const device_config *device, int irq)
3131	3131	{
3132		cpu_set_input_line(device->machine->cpu[1],0,irq ? ASSERT_LINE : CLEAR_LINE);
	3132	cputag_set_input_line(device->machine, "audiocpu", 0, irq ? ASSERT_LINE : CLEAR_LINE);
3133	3133	}
3134	3134
3135	3135	static const ym2610_interface ym2610_config =

src/mame/drivers/gottlieb.c

r4679	r4680
257	257	if (laserdisc != NULL)
258	258	{
259	259	/* attach to the I/O ports */
260		memory_install_read8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x05805, 0x05807, 0, 0x07f8, laserdisc_status_r);
261		memory_install_write8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x05805, 0x05805, 0, 0x07f8, laserdisc_command_w);   /* command for the player */
262		memory_install_write8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x05806, 0x05806, 0, 0x07f8, laserdisc_select_w);
	260	memory_install_read8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x05805, 0x05807, 0, 0x07f8, laserdisc_status_r);
	261	memory_install_write8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x05805, 0x05805, 0, 0x07f8, laserdisc_command_w);   /* command for the player */
	262	memory_install_write8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x05806, 0x05806, 0, 0x07f8, laserdisc_select_w);
263	263
264	264	/* allocate a timer for serial transmission, and one for philips code processing */
265	265	laserdisc_bit_timer = timer_alloc(machine, laserdisc_bit_callback, NULL);
266	266	laserdisc_philips_timer = timer_alloc(machine, laserdisc_philips_callback, NULL);
267	267
268	268	/* create some audio RAM */
269		laserdisc_audio_buffer = auto_malloc(AUDIORAM_SIZE);
	269	laserdisc_audio_buffer = auto_alloc_array(machine, UINT8, AUDIORAM_SIZE);
270	270	laserdisc_status = 0x38;
271	271
272	272	/* more save state registration */
r4679	r4680
305	305
306	306	static CUSTOM_INPUT( analog_delta_r )
307	307	{
308		const char *string = param;
	308	const char *string = (const char *)param;
309	309	int which = string[0] - '0';
310	310
311	311	return input_port_read(field->port->machine, &string[1]) - track[which];
r4679	r4680
664	664
665	665	static TIMER_CALLBACK( nmi_clear )
666	666	{
667		cpu_set_input_line(machine->cpu[0], INPUT_LINE_NMI, CLEAR_LINE);
	667	cputag_set_input_line(machine, "maincpu", INPUT_LINE_NMI, CLEAR_LINE);
668	668	}
669	669
670	670
r4679	r4680
1933	1933	MDRV_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.0)
1934	1934	MACHINE_DRIVER_END
1935	1935
	1936	static MACHINE_DRIVER_START( screwloo )
	1937	MDRV_IMPORT_FROM(gottlieb2)
1936	1938
	1939	MDRV_VIDEO_START(screwloo)
	1940	MACHINE_DRIVER_END
1937	1941
	1942
1938	1943	/*************************************
1939	1944	*
1940	1945	*  ROM definitions
r4679	r4680
2540	2545	static DRIVER_INIT( stooges )
2541	2546	{
2542	2547	DRIVER_INIT_CALL(ramtiles);
2543		memory_install_write8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x05803, 0x05803, 0, 0x07f8, stooges_output_w);
	2548	memory_install_write8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x05803, 0x05803, 0, 0x07f8, stooges_output_w);
2544	2549	}
2545	2550
	2551	static DRIVER_INIT( screwloo )
	2552	{
	2553	gottlieb_gfxcharlo = 0;
	2554	gottlieb_gfxcharhi = 1;
	2555	}
2546	2556
2547	2557	static DRIVER_INIT( vidvince )
2548	2558	{
r4679	r4680
2550	2560	gottlieb_gfxcharhi = 0;
2551	2561	}
2552	2562
2553
2554
2555	2563	/*************************************
2556	2564	*
2557	2565	*  Game drivers
r4679	r4680
2578	2586	GAME( 1984, curvebal, 0,        gottlieb1, curvebal, romtiles, ROT270, "Mylstar", "Curve Ball", 0 )
2579	2587
2580	2588	/* games using rev 2 sound board */
2581		GAME( 1983, screwloo, 0,        gottlieb2, screwloo, romtiles, ROT0,   "Mylstar", "Screw Loose (prototype)", 0 )
	2589	GAME( 1983, screwloo, 0,        screwloo, screwloo, screwloo, ROT0,   "Mylstar", "Screw Loose (prototype)", 0 )
2582	2590	GAME( 1983, mach3,    0,        g2laser,   mach3,    romtiles, ROT0,   "Mylstar", "M.A.C.H. 3", 0 )
2583	2591	GAME( 1984, cobram3,  0,        g2laser,   mach3,    romtiles, ROT0,   "Data East","Cobra Command (M.A.C.H. 3 hardware)", GAME_NOT_WORKING )
2584	2592	GAME( 1984, usvsthem, 0,        g2laser,   usvsthem, romtiles, ROT0,   "Mylstar", "Us vs. Them", 0 )

src/mame/drivers/sandscrp.c

r4679	r4680
105	105	static void update_irq_state(running_machine *machine)
106	106	{
107	107	if (vblank_irq || sprite_irq || unknown_irq)
108		cpu_set_input_line(machine->cpu[0], 1, ASSERT_LINE);
	108	cputag_set_input_line(machine, "maincpu", 1, ASSERT_LINE);
109	109	else
110		cpu_set_input_line(machine->cpu[0], 1, CLEAR_LINE);
	110	cputag_set_input_line(machine, "maincpu", 1, CLEAR_LINE);
111	111	}
112	112
113	113
r4679	r4680
197	197	{
198	198	latch1_full = 1;
199	199	soundlatch_w(space, 0, data & 0xff);
200		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_NMI, PULSE_LINE);
	200	cputag_set_input_line(space->machine, "audiocpu", INPUT_LINE_NMI, PULSE_LINE);
201	201	cpu_spinuntil_time(space->cpu, ATTOTIME_IN_USEC(100));   // Allow the other cpu to reply
202	202	}
203	203	}
r4679	r4680
265	265
266	266	static ADDRESS_MAP_START( sandscrp_soundmem, ADDRESS_SPACE_PROGRAM, 8 )
267	267	AM_RANGE(0x0000, 0x7fff) AM_ROM      // ROM
268		AM_RANGE(0x8000, 0xbfff) AM_READWRITE(SMH_BANK1, SMH_ROM)   // Banked ROM
	268	AM_RANGE(0x8000, 0xbfff) AM_READWRITE(SMH_BANK(1), SMH_ROM)   // Banked ROM
269	269	AM_RANGE(0xc000, 0xdfff) AM_RAM      // RAM
270	270	ADDRESS_MAP_END
271	271
r4679	r4680
414	414
415	415	static void irq_handler(const device_config *device, int irq)
416	416	{
417		cpu_set_input_line(device->machine->cpu[1],0,irq ? ASSERT_LINE : CLEAR_LINE);
	417	cputag_set_input_line(device->machine, "audiocpu", 0, irq ? ASSERT_LINE : CLEAR_LINE);
418	418	}
419	419
420	420	static const ym2203_interface ym2203_intf_sandscrp =

src/mame/drivers/gpworld.c

r4679	r4680
407	407
408	408	static TIMER_CALLBACK( irq_stop )
409	409	{
410		cpu_set_input_line(machine->cpu[0], 0, CLEAR_LINE);
	410	cputag_set_input_line(machine, "maincpu", 0, CLEAR_LINE);
411	411	}
412	412
413	413	static INTERRUPT_GEN( vblank_callback_gpworld )

src/mame/drivers/ddragon.c

r4679	r4680
153	153
154	154	/* on the rising edge of VBLK (vcount == F8), signal an NMI */
155	155	if (vcount == 0xf8)
156		cpu_set_input_line(timer->machine->cpu[0], INPUT_LINE_NMI, ASSERT_LINE);
	156	cputag_set_input_line(timer->machine, "maincpu", INPUT_LINE_NMI, ASSERT_LINE);
157	157
158	158	/* set 1ms signal on rising edge of vcount & 8 */
159	159	if (!(vcount_old & 8) && (vcount & 8))
160		cpu_set_input_line(timer->machine->cpu[0], M6809_FIRQ_LINE, ASSERT_LINE);
	160	cputag_set_input_line(timer->machine, "maincpu", M6809_FIRQ_LINE, ASSERT_LINE);
161	161	}
162	162
163	163
r4679	r4680
212	212	if (data & 0x10)
213	213	dd_sub_cpu_busy = 0;
214	214	else if (dd_sub_cpu_busy == 0)
215		cpu_set_input_line(space->machine->cpu[1], sprite_irq, (sprite_irq == INPUT_LINE_NMI) ? PULSE_LINE : HOLD_LINE);
	215	cputag_set_input_line(space->machine, "sub", sprite_irq, (sprite_irq == INPUT_LINE_NMI) ? PULSE_LINE : HOLD_LINE);
216	216
217	217	memory_set_bank(space->machine, 1, (data & 0xe0) >> 5);
218	218	}
r4679	r4680
287	287	if (data & 0x10)
288	288	dd_sub_cpu_busy = 0;
289	289	else if (dd_sub_cpu_busy == 0)
290		cpu_set_input_line(space->machine->cpu[1], sprite_irq, (sprite_irq == INPUT_LINE_NMI) ? PULSE_LINE : HOLD_LINE);
	290	cputag_set_input_line(space->machine, "sub", sprite_irq, (sprite_irq == INPUT_LINE_NMI) ? PULSE_LINE : HOLD_LINE);
291	291
292	292	memory_set_bank(space->machine, 1, newbank);
293	293	if (newbank == 4 && oldbank != 4)
294	294	memory_install_readwrite8_handler(space, 0x4000, 0x7fff, 0, 0, darktowr_mcu_bank_r, darktowr_mcu_bank_w);
295	295	else if (newbank != 4 && oldbank == 4)
296		memory_install_readwrite8_handler(space, 0x4000, 0x7fff, 0, 0, SMH_BANK1, SMH_BANK1);
	296	memory_install_readwrite8_handler(space, 0x4000, 0x7fff, 0, 0, (read8_space_func)SMH_BANK(1), (write8_space_func)SMH_BANK(1));
297	297	}
298	298
299	299
r4679	r4680
309	309	switch (offset)
310	310	{
311	311	case 0: /* 380b - NMI ack */
312		cpu_set_input_line(space->machine->cpu[0], INPUT_LINE_NMI, CLEAR_LINE);
	312	cputag_set_input_line(space->machine, "maincpu", INPUT_LINE_NMI, CLEAR_LINE);
313	313	break;
314	314
315	315	case 1: /* 380c - FIRQ ack */
316		cpu_set_input_line(space->machine->cpu[0], M6809_FIRQ_LINE, CLEAR_LINE);
	316	cputag_set_input_line(space->machine, "maincpu", M6809_FIRQ_LINE, CLEAR_LINE);
317	317	break;
318	318
319	319	case 2: /* 380d - IRQ ack */
320		cpu_set_input_line(space->machine->cpu[0], M6809_IRQ_LINE, CLEAR_LINE);
	320	cputag_set_input_line(space->machine, "maincpu", M6809_IRQ_LINE, CLEAR_LINE);
321	321	break;
322	322
323	323	case 3: /* 380e - SND irq */
r4679	r4680
334	334
335	335	static WRITE8_HANDLER( ddragon2_sub_irq_ack_w )
336	336	{
337		cpu_set_input_line(space->machine->cpu[1], sprite_irq, CLEAR_LINE );
	337	cputag_set_input_line(space->machine, "sub", sprite_irq, CLEAR_LINE );
338	338	}
339	339
340	340
341	341	static WRITE8_HANDLER( ddragon2_sub_irq_w )
342	342	{
343		cpu_set_input_line(space->machine->cpu[0], M6809_IRQ_LINE, ASSERT_LINE);
	343	cputag_set_input_line(space->machine, "maincpu", M6809_IRQ_LINE, ASSERT_LINE);
344	344	}
345	345
346	346
r4679	r4680
387	387	it's quite obvious from the Double Dragon 2 code, below). */
388	388	if (data & 3)
389	389	{
390		cpu_set_input_line(space->machine->cpu[0], M6809_IRQ_LINE, ASSERT_LINE);
391		cpu_set_input_line(space->machine->cpu[1], sprite_irq, CLEAR_LINE);
	390	cputag_set_input_line(space->machine, "maincpu", M6809_IRQ_LINE, ASSERT_LINE);
	391	cputag_set_input_line(space->machine, "sub", sprite_irq, CLEAR_LINE);
392	392	}
393	393	}
394	394	}
r4679	r4680
413	413
414	414	static WRITE8_HANDLER( ddragon_spriteram_w )
415	415	{
416		if (space->cpu == space->machine->cpu[1] && offset == 0)
	416	if (space->cpu == cputag_get_cpu(space->machine, "sub") && offset == 0)
417	417	dd_sub_cpu_busy = 1;
418	418
419	419	ddragon_spriteram[offset] = data;
r4679	r4680
566	566	/* might not be 100% accurate, check bits written */
567	567	static WRITE8_HANDLER( ddragnba_port_w )
568	568	{
569		cpu_set_input_line(space->machine->cpu[0],M6809_IRQ_LINE,ASSERT_LINE);
570		cpu_set_input_line(space->machine->cpu[1],sprite_irq, CLEAR_LINE );
	569	cputag_set_input_line(space->machine, "maincpu", M6809_IRQ_LINE, ASSERT_LINE);
	570	cputag_set_input_line(space->machine, "sub", sprite_irq, CLEAR_LINE );
571	571	}
572	572
573	573	static ADDRESS_MAP_START( ddragnba_sub_portmap, ADDRESS_SPACE_IO, 8 )
r4679	r4680
1965	1965	sound_irq = M6809_IRQ_LINE;
1966	1966	ym_irq = M6809_FIRQ_LINE;
1967	1967	technos_video_hw = 0;
1968		memory_install_write8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x3808, 0x3808, 0, 0, darktowr_bankswitch_w);
	1968	memory_install_write8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x3808, 0x3808, 0, 0, darktowr_bankswitch_w);
1969	1969	}
1970	1970
1971	1971
r4679	r4680
1977	1977	sound_irq = M6809_IRQ_LINE;
1978	1978	ym_irq = M6809_FIRQ_LINE;
1979	1979	technos_video_hw = 0;
1980		memory_install_write8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x3808, 0x3808, 0, 0, toffy_bankswitch_w);
	1980	memory_install_write8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x3808, 0x3808, 0, 0, toffy_bankswitch_w);
1981	1981
1982	1982	/* the program rom has a simple bitswap encryption */
1983	1983	rom = memory_region(machine, "maincpu");

src/mame/drivers/acommand.c

r4679	r4680
155	155	tx_tilemap = tilemap_create(machine, ac_get_tx_tile_info,tilemap_scan_cols,8,8,512,32);
156	156	bg_tilemap = tilemap_create(machine, ac_get_bg_tile_info,bg_scan,16,16,256,16);
157	157
158		ac_vregs = auto_malloc(0x80);
	158	ac_vregs = auto_alloc_array(machine, UINT16, 0x80/2);
159	159
160	160	tilemap_set_transparent_pen(tx_tilemap,15);
161	161	}

src/mame/drivers/asterix.c

r4679	r4680
110	110
111	111	static READ8_DEVICE_HANDLER( asterix_sound_r )
112	112	{
113		return k053260_r(device,2 + offset);
	113	return k053260_r(device, 2 + offset);
114	114	}
115	115
116	116	static TIMER_CALLBACK( nmi_callback )
117	117	{
118		cpu_set_input_line(machine->cpu[1], INPUT_LINE_NMI, ASSERT_LINE);
	118	cputag_set_input_line(machine, "audiocpu", INPUT_LINE_NMI, ASSERT_LINE);
119	119	}
120	120
121	121	static WRITE8_HANDLER( sound_arm_nmi_w )
122	122	{
123		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_NMI, CLEAR_LINE);
124		timer_set(space->machine, ATTOTIME_IN_USEC(5), NULL,0,nmi_callback);
	123	cputag_set_input_line(space->machine, "audiocpu", INPUT_LINE_NMI, CLEAR_LINE);
	124	timer_set(space->machine, ATTOTIME_IN_USEC(5), NULL, 0, nmi_callback);
125	125	}
126	126
127	127	static WRITE16_HANDLER( sound_irq_w )
128	128	{
129		cpu_set_input_line(space->machine->cpu[1], 0, HOLD_LINE);
	129	cputag_set_input_line(space->machine, "audiocpu", 0, HOLD_LINE);
130	130	}
131	131
132	132	// Check the routine at 7f30 in the ead version.
r4679	r4680
137	137
138	138	static WRITE16_HANDLER( protection_w )
139	139	{
140		COMBINE_DATA(prot+offset);
	140	COMBINE_DATA(prot + offset);
141	141
142	142	if (offset == 1)
143	143	{

src/mame/drivers/tubep.c

r4679	r4680
168	168
169	169	static WRITE8_HANDLER( main_cpu_irq_line_clear_w )
170	170	{
171		cpu_set_input_line(space->machine->cpu[0], 0, CLEAR_LINE);
	171	cputag_set_input_line(space->machine, "maincpu", 0, CLEAR_LINE);
172	172	logerror("CPU#0 VBLANK int clear at scanline=%3i\n", curr_scanline);
173	173	return;
174	174	}
r4679	r4680
204	204
205	205	static WRITE8_HANDLER( second_cpu_irq_line_clear_w )
206	206	{
207		cpu_set_input_line(space->machine->cpu[1], 0, CLEAR_LINE);
	207	cputag_set_input_line(space->machine, "slave", 0, CLEAR_LINE);
208	208	logerror("CPU#1 VBLANK int clear at scanline=%3i\n", curr_scanline);
209	209	return;
210	210	}
r4679	r4680
239	239
240	240	static READ8_HANDLER( tubep_sound_irq_ack )
241	241	{
242		cpu_set_input_line(space->machine->cpu[2], 0, CLEAR_LINE);
	242	cputag_set_input_line(space->machine, "soundcpu", 0, CLEAR_LINE);
243	243	return 0;
244	244	}
245	245
r4679	r4680
271	271	{
272	272	int scanline = param;
273	273
274		curr_scanline = scanline;//for debugging
	274	curr_scanline = scanline;//for debugging
275	275
276
277	276	/* CPU #0 interrupt */
278	277	/* activates at the start of VBLANK signal which happens at the beginning of scaline number 240 */
279		if (scanline==240)
	278	if (scanline == 240)
280	279	{
281	280	logerror("VBLANK CPU#0\n");
282		cpu_set_input_line(machine->cpu[0], 0, ASSERT_LINE);
	281	cputag_set_input_line(machine, "maincpu", 0, ASSERT_LINE);
283	282	}
284	283
285	284
286	285	/* CPU #1 interrupt */
287	286	/* activates at the _end_ of VBLANK signal which happens at the beginning of scanline number 16 */
288		if (scanline==16)
	287	if (scanline == 16)
289	288	{
290	289	logerror("/VBLANK CPU#1\n");
291		cpu_set_input_line(machine->cpu[1], 0, ASSERT_LINE);
	290	cputag_set_input_line(machine, "slave", 0, ASSERT_LINE);
292	291	}
293	292
294	293
295	294	/* CPU #3 MS2010-A NMI */
296	295	/* activates at the _end_ of VBLANK signal which happens at the beginning of scanline number 16 */
297		if (scanline==16)
	296	if (scanline == 16)
298	297	{
299	298	logerror("/nmi CPU#3\n");
300	299	tubep_vblank_end(); /* switch buffered sprite RAM page */
301		cpu_set_input_line(machine->cpu[3], INPUT_LINE_NMI, ASSERT_LINE);
	300	cputag_set_input_line(machine, "nsc", INPUT_LINE_NMI, ASSERT_LINE);
302	301	}
303	302	/* CPU #3 MS2010-A NMI */
304	303	/* deactivates at the start of VBLANK signal which happens at the beginning of scanline number 240*/
305		if (scanline==240)
	304	if (scanline == 240)
306	305	{
307	306	logerror("CPU#3 nmi clear\n");
308		cpu_set_input_line(machine->cpu[3], INPUT_LINE_NMI, CLEAR_LINE);
	307	cputag_set_input_line(machine, "nsc", INPUT_LINE_NMI, CLEAR_LINE);
309	308	}
310	309
311	310
312	311	/* sound CPU interrupt */
313	312	/* activates whenever line V6 from video part goes lo->hi that is when the scanline becomes 64 and 192 */
314		if ((scanline==64) || (scanline==192))
	313	if ((scanline == 64) || (scanline == 192))
315	314	{
316		cpu_set_input_line(machine->cpu[2],0,ASSERT_LINE);   /* sound cpu interrupt (music tempo) */
	315	cputag_set_input_line(machine, "soundcpu", 0, ASSERT_LINE);   /* sound cpu interrupt (music tempo) */
317	316	}
318	317
319	318
320	319	video_screen_update_partial(machine->primary_screen, video_screen_get_vpos(machine->primary_screen));
321	320
322		//debug
323		logerror("scanline=%3i scrgetvpos(0)=%3i\n",scanline,video_screen_get_vpos(machine->primary_screen));
	321	//debug
	322	logerror("scanline=%3i scrgetvpos(0)=%3i\n",scanline,video_screen_get_vpos(machine->primary_screen));
324	323
325		scanline ++;
326		if (scanline>=264)
327		scanline=0;
	324	scanline++;
	325	if (scanline >= 264)
	326	scanline = 0;
328	327
329	328	timer_adjust_oneshot(interrupt_timer, video_screen_get_time_until_pos(machine->primary_screen, scanline, 0), scanline);
330	329	}
r4679	r4680
406	405	static WRITE8_HANDLER( rjammer_soundlatch_w )
407	406	{
408	407	sound_latch = data;
409		cpu_set_input_line(space->machine->cpu[2], INPUT_LINE_NMI, PULSE_LINE);
	408	cputag_set_input_line(space->machine, "soundcpu", INPUT_LINE_NMI, PULSE_LINE);
410	409	}
411	410
412	411
r4679	r4680
453	452	{
454	453	int scanline = param;
455	454
456		curr_scanline = scanline;//for debugging
	455	curr_scanline = scanline;//for debugging
457	456
458
459	457	/* CPU #0 interrupt */
460	458	/* activates at the start of VBLANK signal which happens at the beginning of scaline number 240 */
461		if (scanline==240)
	459	if (scanline == 240)
462	460	{
463	461	logerror("VBLANK CPU#0\n");
464		cpu_set_input_line(machine->cpu[0], 0, ASSERT_LINE);
	462	cputag_set_input_line(machine, "maincpu", 0, ASSERT_LINE);
465	463	}
466	464
467	465
468	466	/* CPU #1 interrupt */
469	467	/* activates at the _end_ of VBLANK signal which happens at the beginning of scanline number 16 */
470		if (scanline==16)
	468	if (scanline == 16)
471	469	{
472	470	logerror("/VBLANK CPU#1\n");
473		cpu_set_input_line(machine->cpu[1], 0, HOLD_LINE);
	471	cputag_set_input_line(machine, "slave", 0, HOLD_LINE);
474	472	}
475	473
476	474
477	475	/* CPU #3 MS2010-A NMI */
478	476	/* activates at the _end_ of VBLANK signal which happens at the beginning of scanline number 16 */
479		if (scanline==16)
	477	if (scanline == 16)
480	478	{
481	479	logerror("/nmi CPU#3\n");
482	480	tubep_vblank_end(); /* switch buffered sprite RAM page */
483		cpu_set_input_line(machine->cpu[3], INPUT_LINE_NMI, ASSERT_LINE);
	481	cputag_set_input_line(machine, "nsc", INPUT_LINE_NMI, ASSERT_LINE);
484	482	}
485	483	/* CPU #3 MS2010-A NMI */
486	484	/* deactivates at the start of VBLANK signal which happens at the beginning of scanline number 240*/
487		if (scanline==240)
	485	if (scanline == 240)
488	486	{
489	487	logerror("CPU#3 nmi clear\n");
490		cpu_set_input_line(machine->cpu[3], INPUT_LINE_NMI, CLEAR_LINE);
	488	cputag_set_input_line(machine, "nsc", INPUT_LINE_NMI, CLEAR_LINE);
491	489	}
492	490
493	491
494	492	/* sound CPU interrupt */
495	493	/* activates whenever line V6 from video part goes lo->hi that is when the scanline becomes 64 and 192 */
496		if ((scanline==64) || (scanline==192))
	494	if ((scanline == 64) || (scanline == 192))
497	495	{
498		cpu_set_input_line(machine->cpu[2],0,ASSERT_LINE);   /* sound cpu interrupt (music tempo) */
	496	cputag_set_input_line(machine, "soundcpu", 0, ASSERT_LINE);   /* sound cpu interrupt (music tempo) */
499	497	}
500	498
501	499
502	500	video_screen_update_partial(machine->primary_screen, video_screen_get_vpos(machine->primary_screen));
503	501
504		logerror("scanline=%3i scrgetvpos(0)=%3i\n",scanline,video_screen_get_vpos(machine->primary_screen));
	502	logerror("scanline=%3i scrgetvpos(0)=%3i\n", scanline, video_screen_get_vpos(machine->primary_screen));
505	503
506		scanline ++;
507		if (scanline>=264)
508		scanline=0;
	504	scanline++;
	505	if (scanline >= 264)
	506	scanline = 0;
509	507
510	508	timer_adjust_oneshot(interrupt_timer, video_screen_get_time_until_pos(machine->primary_screen, scanline, 0), scanline);
511	509	}
r4679	r4680
553	551	{
554	552	/* bit 0 of data selects voice frequency on MSM5205 */
555	553	// 0 -4 KHz; 1- 8KHz
556		if (data&1)
557		msm5205_playmode_w(device,MSM5205_S48_4B);   /* 8 KHz */
	554	if (data & 1)
	555	msm5205_playmode_w(device, MSM5205_S48_4B);   /* 8 KHz */
558	556	else
559		msm5205_playmode_w(device,MSM5205_S96_4B);   /* 4 KHz */
	557	msm5205_playmode_w(device, MSM5205_S96_4B);   /* 4 KHz */
560	558
561	559	return;
562	560	}
r4679	r4680
564	562
565	563	static void rjammer_adpcm_vck (const device_config *device)
566	564	{
567		ls74 = (ls74+1) & 1;
	565	ls74 = (ls74 + 1) & 1;
568	566
569		if (ls74==1)
	567	if (ls74 == 1)
570	568	{
571		msm5205_data_w(device, (ls377>>0) & 15 );
572		cpu_set_input_line(device->machine->cpu[2], 0, ASSERT_LINE );
	569	msm5205_data_w(device, (ls377 >> 0) & 15 );
	570	cputag_set_input_line(device->machine, "soundcpu", 0, ASSERT_LINE );
573	571	}
574	572	else
575	573	{
576		msm5205_data_w(device, (ls377>>4) & 15 );
	574	msm5205_data_w(device, (ls377 >> 4) & 15 );
577	575	}
578	576
579	577	}
r4679	r4680
591	589	I do it here because this port (0x80) is first one accessed
592	590	in the interrupt routine.
593	591	*/
594		cpu_set_input_line(space->machine->cpu[2], 0, CLEAR_LINE );
	592	cputag_set_input_line(space->machine, "soundcpu", 0, CLEAR_LINE );
595	593	return;
596	594	}
597	595
r4679	r4680
1215	1213	GAME( 1984, tubep,   0,      tubep,   tubep,   0, ROT0, "Nichibutsu + Fujitek", "Tube Panic", GAME_SUPPORTS_SAVE )
1216	1214	GAME( 1984, tubepb,  tubep,  tubepb,  tubepb,  0, ROT0, "bootleg", "Tube Panic (bootleg)", GAME_SUPPORTS_SAVE )
1217	1215	GAME( 1984, rjammer, 0,      rjammer, rjammer, 0, ROT0, "Nichibutsu + Alice", "Roller Jammer", GAME_SUPPORTS_SAVE )
1218

src/mame/drivers/ppmast93.c

r4679	r4680
165	165
166	166	static ADDRESS_MAP_START( ppmast93_cpu1_map, ADDRESS_SPACE_PROGRAM, 8 )
167	167	AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM) AM_WRITENOP AM_REGION("maincpu", 0x10000)
168		AM_RANGE(0x8000, 0xbfff) AM_READ(SMH_BANK1)
	168	AM_RANGE(0x8000, 0xbfff) AM_READ(SMH_BANK(1))
169	169	AM_RANGE(0xd000, 0xd7ff) AM_RAM_WRITE(ppmast93_bgram_w) AM_BASE(&ppmast93_bgram) AM_SHARE(1)
170	170	AM_RANGE(0xd800, 0xdfff) AM_WRITENOP
171	171	AM_RANGE(0xf000, 0xf7ff) AM_RAM_WRITE(ppmast93_fgram_w) AM_BASE(&ppmast93_fgram) AM_SHARE(2)

src/mame/drivers/homedata.c

r4679	r4680
327	327
328	328	static WRITE8_HANDLER( mrokumei_sound_cmd_w )
329	329	{
330		soundlatch_w(space,offset,data);
331		cpu_set_input_line(space->machine->cpu[1],0,HOLD_LINE);
	330	soundlatch_w(space, offset, data);
	331	cputag_set_input_line(space->machine, "audiocpu", 0, HOLD_LINE);
332	332	}
333	333
334	334
r4679	r4680
388	388
389	389	static MACHINE_RESET( reikaids_upd7807 )
390	390	{
391		const address_space *space = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM);
	391	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
392	392	/* on reset, ports are set as input (high impedance), therefore 0xff output */
393	393	reikaids_which=homedata_priority;
394	394	reikaids_upd7807_portc_w(space,0,0xff);
r4679	r4680
535	535
536	536	static MACHINE_RESET( pteacher_upd7807 )
537	537	{
538		const address_space *space = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM);
	538	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
539	539	/* on reset, ports are set as input (high impedance), therefore 0xff output */
540	540	pteacher_upd7807_portc_w(space,0,0xff);
541	541	}
r4679	r4680
565	565	/********************************************************************************/
566	566
567	567
568		static ADDRESS_MAP_START( mrokumei_readmem, ADDRESS_SPACE_PROGRAM, 8 )
569		AM_RANGE(0x0000, 0x3fff) AM_READ(SMH_RAM) /* videoram */
570		AM_RANGE(0x4000, 0x5fff) AM_READ(SMH_RAM)
571		AM_RANGE(0x6000, 0x6fff) AM_READ(SMH_RAM) /* work ram */
572		AM_RANGE(0x7000, 0x77ff) AM_READ(SMH_RAM) /* hourouki expects this to act as RAM */
573		AM_RANGE(0x7800, 0x7800) AM_READ(SMH_RAM) /* only used to store the result of the ROM check */
	568	static ADDRESS_MAP_START( mrokumei_map, ADDRESS_SPACE_PROGRAM, 8 )
	569	AM_RANGE(0x0000, 0x3fff) AM_RAM_WRITE(mrokumei_videoram_w) AM_BASE(&videoram)
	570	AM_RANGE(0x4000, 0x5fff) AM_RAM
	571	AM_RANGE(0x6000, 0x6fff) AM_RAM /* work ram */
	572	AM_RANGE(0x7000, 0x77ff) AM_RAM /* hourouki expects this to act as RAM */
	573	AM_RANGE(0x7800, 0x7800) AM_RAM /* only used to store the result of the ROM check */
574	574	AM_RANGE(0x7801, 0x7802) AM_READ(mrokumei_keyboard_r)   // also vblank and active page
575	575	AM_RANGE(0x7803, 0x7803) AM_READ_PORT("IN0")         // coin, service
576	576	AM_RANGE(0x7804, 0x7804) AM_READ_PORT("DSW1")         // DSW1
577	577	AM_RANGE(0x7805, 0x7805) AM_READ_PORT("DSW2")         // DSW2
578		AM_RANGE(0x7ffe, 0x7ffe) AM_READNOP   // ??? read every vblank, value discarded
579		AM_RANGE(0x8000, 0xffff) AM_READ(SMH_ROM)
580		ADDRESS_MAP_END
581
582		static ADDRESS_MAP_START( mrokumei_writemem, ADDRESS_SPACE_PROGRAM, 8 )
583		AM_RANGE(0x0000, 0x3fff) AM_WRITE(mrokumei_videoram_w) AM_BASE(&videoram)
584		AM_RANGE(0x4000, 0x5fff) AM_WRITE(SMH_RAM)
585		AM_RANGE(0x6000, 0x6fff) AM_WRITE(SMH_RAM)
586		AM_RANGE(0x7000, 0x77ff) AM_WRITE(SMH_RAM)
587		AM_RANGE(0x7800, 0x7800) AM_WRITE(SMH_RAM) /* only used to store the result of the ROM check */
588	578	AM_RANGE(0x7ff0, 0x7ffd) AM_WRITE(SMH_RAM) AM_BASE(&homedata_vreg)
	579	AM_RANGE(0x7ffe, 0x7ffe) AM_READNOP   // ??? read every vblank, value discarded
589	580	AM_RANGE(0x8000, 0x8000) AM_WRITE(mrokumei_blitter_start_w)   // in some games also ROM bank switch to access service ROM
590	581	AM_RANGE(0x8001, 0x8001) AM_WRITE(mrokumei_keyboard_select_w)
591	582	AM_RANGE(0x8002, 0x8002) AM_WRITE(mrokumei_sound_cmd_w)
592	583	AM_RANGE(0x8003, 0x8003) AM_DEVWRITE("sn", sn76496_w)
593	584	AM_RANGE(0x8006, 0x8006) AM_WRITE(homedata_blitter_param_w)
594	585	AM_RANGE(0x8007, 0x8007) AM_WRITE(mrokumei_blitter_bank_w)
595		AM_RANGE(0x8000, 0xffff) AM_WRITE(SMH_ROM)
	586	AM_RANGE(0x8000, 0xffff) AM_ROM
596	587	ADDRESS_MAP_END
597	588
	589	static ADDRESS_MAP_START( mrokumei_writemem, ADDRESS_SPACE_PROGRAM, 8 )
	590	ADDRESS_MAP_END
	591
598	592	static ADDRESS_MAP_START( mrokumei_sound_readmem, ADDRESS_SPACE_PROGRAM, 8 )
599	593	AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM)
600	594	ADDRESS_MAP_END
r4679	r4680
620	614	AM_RANGE(0x7801, 0x7801) AM_READ_PORT("IN0")
621	615	AM_RANGE(0x7802, 0x7802) AM_READ_PORT("IN1")
622	616	AM_RANGE(0x7803, 0x7803) AM_READ(reikaids_io_r)   // coin, blitter, upd7807
623		AM_RANGE(0x8000, 0xbfff) AM_READ(SMH_BANK1)
	617	AM_RANGE(0x8000, 0xbfff) AM_READ(SMH_BANK(1))
624	618	AM_RANGE(0xc000, 0xffff) AM_READ(SMH_ROM)
625	619	ADDRESS_MAP_END
626	620
r4679	r4680
640	634	ADDRESS_MAP_END
641	635
642	636	static ADDRESS_MAP_START( reikaids_upd7807_readmem, ADDRESS_SPACE_PROGRAM, 8 )
643		AM_RANGE(0x0000, 0xfeff) AM_READ(SMH_BANK2)   /* External ROM (Banked) */
	637	AM_RANGE(0x0000, 0xfeff) AM_READ(SMH_BANK(2))   /* External ROM (Banked) */
644	638	AM_RANGE(0xff00, 0xffff) AM_READ(SMH_RAM)   /* Internal RAM */
645	639	ADDRESS_MAP_END
646	640
r4679	r4680
666	660	AM_RANGE(0x7800, 0x7800) AM_READ(SMH_RAM)
667	661	AM_RANGE(0x7801, 0x7801) AM_READ(pteacher_io_r)   // vblank, visible page
668	662	AM_RANGE(0x7ff2, 0x7ff2) AM_READ(pteacher_snd_r)
669		AM_RANGE(0x8000, 0xbfff) AM_READ(SMH_BANK1)
	663	AM_RANGE(0x8000, 0xbfff) AM_READ(SMH_BANK(1))
670	664	AM_RANGE(0xc000, 0xffff) AM_READ(SMH_ROM)
671	665	ADDRESS_MAP_END
672	666
r4679	r4680
687	681	ADDRESS_MAP_END
688	682
689	683	static ADDRESS_MAP_START( pteacher_upd7807_readmem, ADDRESS_SPACE_PROGRAM, 8 )
690		AM_RANGE(0x0000, 0xfeff) AM_READ(SMH_BANK2)   /* External ROM (Banked) */
	684	AM_RANGE(0x0000, 0xfeff) AM_READ(SMH_BANK(2))   /* External ROM (Banked) */
691	685	AM_RANGE(0xff00, 0xffff) AM_READ(SMH_RAM)   /* Internal RAM */
692	686	ADDRESS_MAP_END
693	687
r4679	r4680
1211	1205
1212	1206	/* basic machine hardware */
1213	1207	MDRV_CPU_ADD("maincpu", M6809, 16000000/4)   /* 4MHz ? */
1214		MDRV_CPU_PROGRAM_MAP(mrokumei_readmem,mrokumei_writemem)
	1208	MDRV_CPU_PROGRAM_MAP(mrokumei_map,0)
1215	1209	MDRV_CPU_VBLANK_INT("screen", homedata_irq)   /* also triggered by the blitter */
1216	1210
1217	1211	MDRV_CPU_ADD("audiocpu", Z80, 16000000/4)   /* 4MHz ? */
r4679	r4680
1785	1779	/* it seems that Mahjong Jogakuen runs on the same board as the others,
1786	1780	but with just these two addresses swapped. Instead of creating a new
1787	1781	MachineDriver, I just fix them here. */
1788		memory_install_write8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x8007, 0x8007, 0, 0, pteacher_blitter_bank_w);
1789		memory_install_write8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x8005, 0x8005, 0, 0, pteacher_gfx_bank_w);
	1782	memory_install_write8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x8007, 0x8007, 0, 0, pteacher_blitter_bank_w);
	1783	memory_install_write8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x8005, 0x8005, 0, 0, pteacher_gfx_bank_w);
1790	1784	}
1791	1785
1792	1786	static DRIVER_INIT( mjikaga )
1793	1787	{
1794	1788	/* Mahjong Ikagadesuka is different as well. */
1795		memory_install_read8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x7802, 0x7802, 0, 0, pteacher_snd_r);
1796		memory_install_write8_handler(cpu_get_address_space(machine->cpu[1], ADDRESS_SPACE_PROGRAM), 0x0123, 0x0123, 0, 0, pteacher_snd_answer_w);
	1789	memory_install_read8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x7802, 0x7802, 0, 0, pteacher_snd_r);
	1790	memory_install_write8_handler(cputag_get_address_space(machine, "audiocpu", ADDRESS_SPACE_PROGRAM), 0x0123, 0x0123, 0, 0, pteacher_snd_answer_w);
1797	1791	}
1798	1792
1799	1793	static DRIVER_INIT( reikaids )
r4679	r4680
1823	1817	GAME( 1990, lemnangl, 0, lemnangl, pteacher, 0,          ROT0, "Home Data", "Mahjong Lemon Angel (Japan)", 0 )
1824	1818
1825	1819	GAME( 1991?,mjikaga,  0, lemnangl, mjikaga,  mjikaga,    ROT0, "Mitchell",  "Mahjong Ikaga Desu ka (Japan)", GAME_NOT_WORKING | GAME_NO_SOUND )
1826

src/mame/drivers/exidy.c

r4679	r4680
1386	1386	exidy_color_latch[0] = 0x09;
1387	1387
1388	1388	/* the ROM is actually mapped high */
1389		memory_install_read8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xf800, 0xffff, 0, 0, SMH_BANK1);
	1389	memory_install_read8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xf800, 0xffff, 0, 0, (read8_space_func)SMH_BANK(1));
1390	1390	memory_set_bankptr(machine, 1, memory_region(machine, "maincpu") + 0xf800);
1391	1391	}
1392	1392
r4679	r4680
1417	1417
1418	1418	static DRIVER_INIT( fax )
1419	1419	{
1420		const address_space *space = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM);
	1420	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
1421	1421
1422	1422	exidy_video_config(0x04, 0x04, TRUE);
1423	1423

src/mame/drivers/xxmissio.c

r4679	r4680
53	53
54	54	case 0x40:
55	55	xxmissio_status &= ~0x08;
56		cpu_set_input_line_and_vector(space->machine->cpu[1],0,HOLD_LINE,0x10);
	56	cputag_set_input_line_and_vector(space->machine, "sub", 0, HOLD_LINE, 0x10);
57	57	break;
58	58
59	59	case 0x80:
r4679	r4680
76	76
77	77	case 0x80:
78	78	xxmissio_status &= ~0x04;
79		cpu_set_input_line_and_vector(space->machine->cpu[0],0,HOLD_LINE,0x10);
	79	cputag_set_input_line_and_vector(space->machine, "maincpu", 0, HOLD_LINE, 0x10);
80	80	break;
81	81	}
82	82	}

src/mame/drivers/mugsmash.c

r4679	r4680
63	63	switch (offset)
64	64	{
65	65	case 1:
66		soundlatch_w(space,1,data&0xff);
67		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_NMI, PULSE_LINE );
	66	soundlatch_w(space, 1, data & 0xff);
	67	cputag_set_input_line(space->machine, "audiocpu", INPUT_LINE_NMI, PULSE_LINE );
68	68	break;
69	69
70	70	default:
r4679	r4680
179	179	}
180	180	#endif
181	181
182		static ADDRESS_MAP_START( mugsmash_readmem, ADDRESS_SPACE_PROGRAM, 16 )
183		AM_RANGE(0x000000, 0x07ffff) AM_READ(SMH_ROM)
184		AM_RANGE(0x080000, 0x080fff) AM_READ(SMH_RAM)
185		AM_RANGE(0x082000, 0x082fff) AM_READ(SMH_RAM)
186		AM_RANGE(0x100000, 0x1001ff) AM_READ(SMH_RAM)
187		AM_RANGE(0x100200, 0x1005ff) AM_READ(SMH_RAM)
188		AM_RANGE(0x1c0000, 0x1c3fff) AM_READ(SMH_RAM)
189		AM_RANGE(0x1c4000, 0x1cffff) AM_READ(SMH_RAM)
190		AM_RANGE(0x200000, 0x201fff) AM_READ(SMH_RAM)
191		AM_RANGE(0x202000, 0x203fff) AM_READ(SMH_RAM)
	182	static ADDRESS_MAP_START( mugsmash_map, ADDRESS_SPACE_PROGRAM, 16 )
	183	AM_RANGE(0x000000, 0x07ffff) AM_ROM
	184	AM_RANGE(0x080000, 0x080fff) AM_RAM_WRITE(mugsmash_videoram1_w) AM_BASE(&mugsmash_videoram1)
	185	AM_RANGE(0x082000, 0x082fff) AM_RAM_WRITE(mugsmash_videoram2_w) AM_BASE(&mugsmash_videoram2)
	186	AM_RANGE(0x0c0000, 0x0c0007) AM_WRITE(mugsmash_reg_w) AM_BASE(&mugsmash_regs1)    /* video registers*/
	187	AM_RANGE(0x100000, 0x1005ff) AM_RAM_WRITE(paletteram16_xRRRRRGGGGGBBBBB_word_w) AM_BASE(&paletteram16)
	188	AM_RANGE(0x140000, 0x140007) AM_WRITE(mugsmash_reg2_w) AM_BASE(&mugsmash_regs2) /* sound + ? */
	189	AM_RANGE(0x1c0000, 0x1c3fff) AM_RAM /* main ram? */
	190	AM_RANGE(0x1c4000, 0x1cffff) AM_RAM
	191	AM_RANGE(0x200000, 0x203fff) AM_RAM AM_BASE(&mugs_spriteram) /* sprite ram */
192	192	#if USE_FAKE_INPUT_PORTS
193	193	AM_RANGE(0x180000, 0x180007) AM_READ(mugsmash_input_ports_r)
194	194	#else
r4679	r4680
199	199	#endif
200	200	ADDRESS_MAP_END
201	201
202		static ADDRESS_MAP_START( mugsmash_writemem, ADDRESS_SPACE_PROGRAM, 16 )
203		AM_RANGE(0x000000, 0x07ffff) AM_WRITE(SMH_ROM)
204		AM_RANGE(0x080000, 0x080fff) AM_WRITE(mugsmash_videoram1_w) AM_BASE(&mugsmash_videoram1)
205		AM_RANGE(0x082000, 0x082fff) AM_WRITE(mugsmash_videoram2_w) AM_BASE(&mugsmash_videoram2)
206		AM_RANGE(0x0C0000, 0x0C0007) AM_WRITE(mugsmash_reg_w) AM_BASE(&mugsmash_regs1)    /* video registers*/
207		AM_RANGE(0x100000, 0x1005ff) AM_WRITE(paletteram16_xRRRRRGGGGGBBBBB_word_w) AM_BASE(&paletteram16)
208		AM_RANGE(0x140000, 0x140007) AM_WRITE(mugsmash_reg2_w) AM_BASE(&mugsmash_regs2) /* sound + ? */
209		AM_RANGE(0x1c0000, 0x1c3fff) AM_WRITE(SMH_RAM) /* main ram? */
210		AM_RANGE(0x1c4000, 0x1cffff) AM_WRITE(SMH_RAM)
211		AM_RANGE(0x200000, 0x203fff) AM_WRITE(SMH_RAM) AM_BASE(&mugs_spriteram) /* sprite ram */
212		ADDRESS_MAP_END
213
214		static ADDRESS_MAP_START( snd_readmem, ADDRESS_SPACE_PROGRAM, 8 )
215		AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM)
216		AM_RANGE(0x8000, 0x87ff) AM_READ(SMH_RAM)
217		AM_RANGE(0x8800, 0x8801) AM_DEVREAD("ym", ym2151_r)
218		AM_RANGE(0x9800, 0x9800) AM_DEVREAD("oki", okim6295_r)
	202	static ADDRESS_MAP_START( mugsmash_sound_map, ADDRESS_SPACE_PROGRAM, 8 )
	203	AM_RANGE(0x0000, 0x7fff) AM_ROM
	204	AM_RANGE(0x8000, 0x87ff) AM_RAM
	205	AM_RANGE(0x8800, 0x8801) AM_DEVREADWRITE("ym", ym2151_r,ym2151_w)
	206	AM_RANGE(0x9800, 0x9800) AM_DEVREADWRITE("oki", okim6295_r,okim6295_w)
219	207	AM_RANGE(0xa000, 0xa000) AM_READ(soundlatch_r)
220	208	ADDRESS_MAP_END
221	209
222		static ADDRESS_MAP_START( snd_writemem, ADDRESS_SPACE_PROGRAM, 8 )
223		AM_RANGE(0x0000, 0x7fff) AM_WRITE(SMH_ROM)
224		AM_RANGE(0x8000, 0x87ff) AM_WRITE(SMH_RAM)
225		AM_RANGE(0x8800, 0x8801) AM_DEVWRITE("ym", ym2151_w)
226		AM_RANGE(0x9800, 0x9800) AM_DEVWRITE("oki", okim6295_w)
227		ADDRESS_MAP_END
228	210
229
230	211	#define MUGSMASH_PLAYER_INPUT( player, start ) \
231	212	PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_PLAYER(player) PORT_8WAY \
232	213	PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_PLAYER(player) PORT_8WAY \
r4679	r4680
417	398
418	399	static void irq_handler(const device_config *device, int irq)
419	400	{
420		cpu_set_input_line(device->machine->cpu[1], 0 , irq ? ASSERT_LINE : CLEAR_LINE );
	401	cputag_set_input_line(device->machine, "audiocpu", 0 , irq ? ASSERT_LINE : CLEAR_LINE );
421	402	}
422	403
423	404	static const ym2151_interface ym2151_config =
r4679	r4680
427	408
428	409	static MACHINE_DRIVER_START( mugsmash )
429	410	MDRV_CPU_ADD("maincpu", M68000, 12000000)
430		MDRV_CPU_PROGRAM_MAP(mugsmash_readmem,mugsmash_writemem)
	411	MDRV_CPU_PROGRAM_MAP(mugsmash_map,0)
431	412	MDRV_CPU_VBLANK_INT("screen", irq6_line_hold)
432	413
433	414	MDRV_CPU_ADD("audiocpu", Z80, 4000000)   /* Guess */
434		MDRV_CPU_PROGRAM_MAP(snd_readmem,snd_writemem)
	415	MDRV_CPU_PROGRAM_MAP(mugsmash_sound_map,0)
435	416
436		MDRV_GFXDECODE(mugsmash)
437
438
439	417	MDRV_SCREEN_ADD("screen", RASTER)
440	418	MDRV_SCREEN_REFRESH_RATE(60)
441	419	MDRV_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(0))
442	420	MDRV_SCREEN_FORMAT(BITMAP_FORMAT_INDEXED16)
443	421	MDRV_SCREEN_SIZE(40*8, 32*8)
444	422	MDRV_SCREEN_VISIBLE_AREA(0*8, 40*8-1, 1*8, 31*8-1)
	423	MDRV_GFXDECODE(mugsmash)
445	424
446	425	MDRV_PALETTE_LENGTH(0x300)
447	426

src/mame/drivers/pcktgal.c

r4679	r4680
31	31	{
32	32	UINT8 *RAM = memory_region(space->machine, "maincpu");
33	33
34		if (data & 1) { memory_set_bankptr(space->machine, 1,&RAM[0x4000]); }
35		else { memory_set_bankptr(space->machine, 1,&RAM[0x10000]); }
	34	if (data & 1) { memory_set_bankptr(space->machine, 1, &RAM[0x4000]); }
	35	else { memory_set_bankptr(space->machine, 1, &RAM[0x10000]); }
36	36
37		if (data & 2) { memory_set_bankptr(space->machine, 2,&RAM[0x6000]); }
38		else { memory_set_bankptr(space->machine, 2,&RAM[0x12000]); }
	37	if (data & 2) { memory_set_bankptr(space->machine, 2, &RAM[0x6000]); }
	38	else { memory_set_bankptr(space->machine, 2, &RAM[0x12000]); }
39	39	}
40	40
41	41	static WRITE8_HANDLER( pcktgal_sound_bank_w )
r4679	r4680
45	45
46	46	static WRITE8_HANDLER( pcktgal_sound_w )
47	47	{
48		soundlatch_w(space,0,data);
49		cpu_set_input_line(space->machine->cpu[1],INPUT_LINE_NMI,PULSE_LINE);
	48	soundlatch_w(space, 0, data);
	49	cputag_set_input_line(space->machine, "audiocpu", INPUT_LINE_NMI, PULSE_LINE);
50	50	}
51	51
52	52	static int msm5205next;
r4679	r4680
60	60
61	61	toggle = 1 - toggle;
62	62	if (toggle)
63		cpu_set_input_line(device->machine->cpu[1],M6502_IRQ_LINE,HOLD_LINE);
	63	cputag_set_input_line(device->machine, "audiocpu", M6502_IRQ_LINE, HOLD_LINE);
64	64	}
65	65
66	66	static WRITE8_HANDLER( pcktgal_adpcm_data_w )
r4679	r4680
76	76
77	77	/***************************************************************************/
78	78
79		static ADDRESS_MAP_START( readmem, ADDRESS_SPACE_PROGRAM, 8 )
80		AM_RANGE(0x0000, 0x07ff) AM_READ(SMH_RAM)
	79	static ADDRESS_MAP_START( pcktgal_map, ADDRESS_SPACE_PROGRAM, 8 )
	80	AM_RANGE(0x0000, 0x07ff) AM_RAM
	81	AM_RANGE(0x0800, 0x0fff) AM_RAM_WRITE(pcktgal_videoram_w) AM_BASE(&videoram)
	82	AM_RANGE(0x1000, 0x11ff) AM_RAM AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
81	83	AM_RANGE(0x1800, 0x1800) AM_READ_PORT("P1")
82		AM_RANGE(0x1a00, 0x1a00) AM_READ_PORT("P2")
83		AM_RANGE(0x1c00, 0x1c00) AM_READ_PORT("DSW")
84		AM_RANGE(0x4000, 0x5fff) AM_READ(SMH_BANK1)
85		AM_RANGE(0x6000, 0x7fff) AM_READ(SMH_BANK2)
86		AM_RANGE(0x8000, 0xffff) AM_READ(SMH_ROM)
87		ADDRESS_MAP_END
88
89		static ADDRESS_MAP_START( writemem, ADDRESS_SPACE_PROGRAM, 8 )
90		AM_RANGE(0x0000, 0x07ff) AM_WRITE(SMH_RAM)
91		AM_RANGE(0x0800, 0x0fff) AM_WRITE(pcktgal_videoram_w) AM_BASE(&videoram)
92		AM_RANGE(0x1000, 0x11ff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
93	84	AM_RANGE(0x1801, 0x1801) AM_WRITE(pcktgal_flipscreen_w)
94	85	/* 1800 - 0x181f are unused BAC-06 registers, see video/dec0.c */
95		AM_RANGE(0x1a00, 0x1a00) AM_WRITE(pcktgal_sound_w)
96		AM_RANGE(0x1c00, 0x1c00) AM_WRITE(pcktgal_bank_w)
97		AM_RANGE(0x4000, 0xffff) AM_WRITE(SMH_ROM)
	86	AM_RANGE(0x1a00, 0x1a00) AM_READ_PORT("P2") AM_WRITE(pcktgal_sound_w)
	87	AM_RANGE(0x1c00, 0x1c00) AM_READ_PORT("DSW") AM_WRITE(pcktgal_bank_w)
	88	AM_RANGE(0x4000, 0x5fff) AM_ROMBANK(1)
	89	AM_RANGE(0x6000, 0x7fff) AM_ROMBANK(2)
	90	AM_RANGE(0x8000, 0xffff) AM_ROM
98	91	ADDRESS_MAP_END
99	92
	93
100	94	/***************************************************************************/
101	95
102		static ADDRESS_MAP_START( sound_readmem, ADDRESS_SPACE_PROGRAM, 8 )
103		AM_RANGE(0x0000, 0x07ff) AM_READ(SMH_RAM)
104		AM_RANGE(0x3000, 0x3000) AM_READ(soundlatch_r)
105		AM_RANGE(0x3400, 0x3400) AM_DEVREAD("msm", pcktgal_adpcm_reset_r)   /* ? not sure */
106		AM_RANGE(0x4000, 0x7fff) AM_READ(SMH_BANK3)
107		AM_RANGE(0x8000, 0xffff) AM_READ(SMH_ROM)
108		ADDRESS_MAP_END
109
110		static ADDRESS_MAP_START( sound_writemem, ADDRESS_SPACE_PROGRAM, 8 )
111		AM_RANGE(0x0000, 0x07ff) AM_WRITE(SMH_RAM)
	96	static ADDRESS_MAP_START( pcktgal_sound_map, ADDRESS_SPACE_PROGRAM, 8 )
	97	AM_RANGE(0x0000, 0x07ff) AM_RAM
112	98	AM_RANGE(0x0800, 0x0801) AM_DEVWRITE("ym1", ym2203_w)
113	99	AM_RANGE(0x1000, 0x1001) AM_DEVWRITE("ym2", ym3812_w)
114	100	AM_RANGE(0x1800, 0x1800) AM_WRITE(pcktgal_adpcm_data_w)   /* ADPCM data for the MSM5205 chip */
115	101	AM_RANGE(0x2000, 0x2000) AM_WRITE(pcktgal_sound_bank_w)
116		AM_RANGE(0x4000, 0xffff) AM_WRITE(SMH_ROM)
	102	AM_RANGE(0x3000, 0x3000) AM_READ(soundlatch_r)
	103	AM_RANGE(0x3400, 0x3400) AM_DEVREAD("msm", pcktgal_adpcm_reset_r)   /* ? not sure */
	104	AM_RANGE(0x4000, 0x7fff) AM_ROMBANK(3)
	105	AM_RANGE(0x8000, 0xffff) AM_ROM
117	106	ADDRESS_MAP_END
118	107
	108
119	109	/***************************************************************************/
120	110
121	111	static INPUT_PORTS_START( pcktgal )
r4679	r4680
235	225
236	226	/* basic machine hardware */
237	227	MDRV_CPU_ADD("maincpu", M6502, 2000000)
238		MDRV_CPU_PROGRAM_MAP(readmem,writemem)
	228	MDRV_CPU_PROGRAM_MAP(pcktgal_map,0)
239	229	MDRV_CPU_VBLANK_INT("screen", nmi_line_pulse)
240	230
241	231	MDRV_CPU_ADD("audiocpu", M6502, 1500000)
242		MDRV_CPU_PROGRAM_MAP(sound_readmem,sound_writemem)
	232	MDRV_CPU_PROGRAM_MAP(pcktgal_sound_map,0)
243	233	/* IRQs are caused by the ADPCM chip */
244	234	/* NMIs are caused by the main CPU */
245	235
r4679	r4680
425	415	{
426	416	int A;
427	417	const address_space *space = cputag_get_address_space(machine, "audiocpu", ADDRESS_SPACE_PROGRAM);
428		UINT8 *decrypted = auto_malloc(0x10000);
	418	UINT8 *decrypted = auto_alloc_array(machine, UINT8, 0x10000);
429	419	UINT8 *rom = memory_region(machine, "audiocpu");
430	420
431	421	memory_set_decrypted_region(space, 0x8000, 0xffff, decrypted);

src/mame/drivers/hyhoo.c

r4679	r4680
55	55	}
56	56
57	57
58		static ADDRESS_MAP_START( readmem_hyhoo, ADDRESS_SPACE_PROGRAM, 8 )
59		AM_RANGE(0x0000, 0xefff) AM_READ(SMH_ROM)
60		AM_RANGE(0xf000, 0xffff) AM_READ(SMH_RAM)
	58	static ADDRESS_MAP_START( hyhoo_map, ADDRESS_SPACE_PROGRAM, 8 )
	59	AM_RANGE(0x0000, 0xefff) AM_ROM
	60	AM_RANGE(0xf000, 0xffff) AM_RAM AM_BASE(&nb1413m3_nvram) AM_SIZE(&nb1413m3_nvram_size)
61	61	ADDRESS_MAP_END
62	62
63		static ADDRESS_MAP_START( writemem_hyhoo, ADDRESS_SPACE_PROGRAM, 8 )
64		AM_RANGE(0x0000, 0xefff) AM_WRITE(SMH_ROM)
65		AM_RANGE(0xf000, 0xffff) AM_WRITE(SMH_RAM) AM_BASE(&nb1413m3_nvram) AM_SIZE(&nb1413m3_nvram_size)
66		ADDRESS_MAP_END
67
68	63	static ADDRESS_MAP_START( hyhoo_io_map, ADDRESS_SPACE_IO, 8 )
69	64	ADDRESS_MAP_GLOBAL_MASK(0xff)
70	65	//  AM_RANGE(0x00, 0x00) AM_WRITE(nb1413m3_nmi_clock_w)
r4679	r4680
261	256
262	257	/* basic machine hardware */
263	258	MDRV_CPU_ADD("maincpu", Z80, 5000000/1)   /* 5.00 MHz ?? */
264		MDRV_CPU_PROGRAM_MAP(readmem_hyhoo, writemem_hyhoo)
	259	MDRV_CPU_PROGRAM_MAP(hyhoo_map,0)
265	260	MDRV_CPU_IO_MAP(hyhoo_io_map,0)
266	261	MDRV_CPU_VBLANK_INT("screen", nb1413m3_interrupt)
267	262

src/mame/drivers/hng64.c

r4679	r4680
3	3	Driver by David Haywood, ElSemi, and Andrew Gardner.
4	4	Rasterizing code provided in part by Andrew Zaferakis.
5	5
	6
6	7	Notes:
7	8	* The top board is likely identical for all revisions and all "versions" of the hardware.
8	9	It contains the main MIPS CPU and a secondary communications KL5C80.
r4679	r4680
15	16	It probably has a lot to do with the network (Roads Edge network connectors are on this board).
16	17	And since it can return any value at any time, it may be responsible for fatfurwa's missing palette.
17	18	* The Toshiba CPU datasheet is here : http://www.semicon.toshiba.co.jp/openb2b/websearch/productDetails.jsp?partKey=TMP87CH40N
18		* The internal ROM needs dumping.  Rumor has it, it's the same MCU as in Naomi hardware...
19	19
20	20	* From the Roads Edge manual : "The Network Check screen will be displayed for about 40 seconds whether
21	21	the cabinet is connected for communication competition or not.  After this,
r4679	r4680
44	44	* upgrade to modern video timing.
45	45
46	46	3d:
47		* Find where the remainder of the 3d display list information is 'hiding' (FIFO?)
	47	* Find where the remainder of the 3d display list information is 'hiding'
	48	-- should the 3d 'ram' be treated like a fifo, instead of like RAM (see Dreamcast etc.)
48	49	* Remaining 3d bits - glowing, etc.
49	50	* Populate the display buffers
50	51	* Does the hng64 do perspective-correct texture mapping?  Doesn't look like it...
r4679	r4680
60	61	*/
61	62
62	63	/*
63		Known games on this system
64
65		Beast Busters 2nd Nightmare ( http://emustatus.rainemu.com/games/bbustr2nd.htm )
66		Buriki One ( http://emustatus.rainemu.com/games/buriki1.htm )
67		Fatal Fury: Wild Ambition ( http://emustatus.rainemu.com/games/ffurywa.htm )
68		Roads Edge / Round Trip? ( http://emustatus.rainemu.com/games/redge.htm )
69		Samurai Shodown 64 ( http://emustatus.rainemu.com/games/sams64.htm )
70		Samurai Shodown: Warrior's Rage ( http://emustatus.rainemu.com/games/samswr.htm )
71		Xtreme Rally / Offbeat Racer ( http://emustatus.rainemu.com/games/xrally.htm )
72		*/
73
74		/*
75	64	NeoGeo Hyper 64 (Main Board)
76	65	SNK, 1997
77	66
r4679	r4680
463	452	#include "deprecat.h"
464	453	#include "cpu/mips/mips3.h"
465	454
	455	static int hng64_boothack = 0;
466	456	static UINT32 *rombase;
467	457	static UINT32 *hng_mainram;
468	458	static UINT32 *hng_cart;
469	459	static UINT32 *hng64_dualport;
470	460	static UINT32 *hng64_sram;
471	461	static UINT16 *hng64_soundram;
	462	static UINT32 *hng64_sysregs;
472	463
473	464	// Stuff from over in video...
474	465	extern tilemap *hng64_tilemap0, *hng64_tilemap1, *hng64_tilemap2, *hng64_tilemap3 ;
r4679	r4680
627	618	//if (a != 0)
628	619	//  popmessage("Alpha is not zero!") ;
629	620
630		palette_set_color(space->machine,offset,MAKE_RGB(r,g,b));
	621	// sams64 / sams64_2 never write a palette, why not?
	622	if (hng64_boothack!=1)
	623	palette_set_color(space->machine,offset,MAKE_RGB(r,g,b));
631	624	}
632	625
633		static READ32_HANDLER( hng64_port_read )
	626	static READ32_HANDLER( hng64_sysregs_r )
634	627	{
635		logerror("HNG64 port read (PC=%08x) 0x%08x\n", cpu_get_pc(space->cpu),offset*4);
	628	mame_system_time systime;
	629	mame_get_base_datetime(space->machine, &systime);
636	630
637		if(offset==0x421) return 0x00000002;
638		if(offset==0x441) return hng64_interrupt_level_request;
	631	//if(((offset*4) & 0xff00) == 0x2100)
	632	//  printf("HNG64 port read (PC=%08x) 0x%08x\n", cpu_get_pc(space->cpu),offset*4);
639	633
640		if(offset==0x85b) return 0x00000010;
	634	switch(offset*4)
	635	{
	636	case 0x001c: return mame_rand(space->machine); // hng64 hangs on start-up if zero.
	637	//case 0x106c:
	638	//case 0x107c:
	639	case 0x1084: return 0x00000002; //???
	640	//case 0x108c:
	641	case 0x1104: return hng64_interrupt_level_request;
	642	case 0x1254: return 0x00000000; //dma status, 0x800
	643	/* 4-bit RTC */
	644	case 0x2104: return (systime.local_time.second % 10);
	645	case 0x210c: return (systime.local_time.second / 10);
	646	case 0x2114: return (systime.local_time.minute % 10);
	647	case 0x211c: return (systime.local_time.minute / 10);
	648	case 0x2124: return (systime.local_time.hour % 10);
	649	case 0x212c: return (systime.local_time.hour / 10);
	650	case 0x2134: return (systime.local_time.mday % 10);
	651	case 0x213c: return (systime.local_time.mday / 10);
	652	case 0x2144: return ((systime.local_time.month+1) % 10);
	653	case 0x214c: return ((systime.local_time.month+1) / 10);
	654	case 0x2154: return (systime.local_time.year%10);
	655	case 0x215c: return ((systime.local_time.year%100)/10);
	656	case 0x2164: return (systime.local_time.weekday);
641	657
642		return mame_rand(space->machine)&0xffffffff;
	658	case 0x216c: return 0x00000010; //enables "system log reader"
	659
	660	case 0x217c: return 0; //RTC status?
	661	}
	662
	663	//printf("%08x\n",offset*4);
	664
	665	//return mame_rand(space->machine)&0xffffffff;
	666	return hng64_sysregs[offset];
643	667	}
644	668
	669	/* preliminary dma code, dma is used to copy program code -> ram */
	670	static INT32 hng_dma_start,hng_dma_dst,hng_dma_len;
645	671
646		/* preliminary dma code, dma is used to copy program code -> ram */
647		static int hng_dma_start,hng_dma_dst,hng_dma_len;
648	672	static void hng64_do_dma (const address_space *space)
649	673	{
650		logerror("Performing DMA Start %08x Len %08x Dst %08x\n",hng_dma_start, hng_dma_len, hng_dma_dst);
	674	printf("Performing DMA Start %08x Len %08x Dst %08x\n",hng_dma_start, hng_dma_len, hng_dma_dst);
651	675
652		while (hng_dma_len>0)
	676	while (hng_dma_len>=0)
653	677	{
654	678	UINT32 dat;
655	679
r4679	r4680
659	683	hng_dma_dst+=4;
660	684	hng_dma_len--;
661	685	}
662
663		hng_dma_start+=4;
664		hng_dma_dst+=4;
665	686	}
666	687
	688	/*
	689	//  AM_RANGE(0x1F70100C, 0x1F70100F) AM_WRITENOP        // ?? often
	690	//  AM_RANGE(0x1F70101C, 0x1F70101F) AM_WRITENOP        // ?? often
	691	//  AM_RANGE(0x1F70106C, 0x1F70106F) AM_WRITENOP        // fatfur,strange
	692	//  AM_RANGE(0x1F701084, 0x1F701087) AM_RAM
	693	//  AM_RANGE(0x1F70111C, 0x1F70111F) AM_WRITENOP        // irq ack
667	694
668		static WRITE32_HANDLER( hng_dma_start_w )
669		{
670		logerror ("DMA Start Write %08x\n",data);
671		hng_dma_start = data;
672		}
	695	//  AM_RANGE(0x1F70124C, 0x1F70124F) AM_WRITENOP        // dma related?
	696	//  AM_RANGE(0x1F70125C, 0x1F70125F) AM_WRITENOP        // dma related?
	697	//  AM_RANGE(0x1F7021C4, 0x1F7021C7) AM_WRITENOP        // ?? often
673	698
674		static WRITE32_HANDLER( hng_dma_dst_w )
675		{
676		logerror ("DMA Dst Write %08x\n",data);
677		hng_dma_dst = data;
678		}
	699	*/
679	700
680		static WRITE32_HANDLER( hng_dma_len_w )
	701	static WRITE32_HANDLER( hng64_sysregs_w )
681	702	{
682		logerror ("DMA Len Write %08x\n",data);
683		hng_dma_len = data;
684		hng64_do_dma(space);
685
	703	COMBINE_DATA (&hng64_sysregs[offset]);
	704	switch(offset*4)
	705	{
	706	case 0x111c: /* irq ack */ break;
	707	case 0x1204: hng_dma_start = hng64_sysregs[offset]; break;
	708	case 0x1214: hng_dma_dst = hng64_sysregs[offset]; break;
	709	case 0x1224:
	710	hng_dma_len = hng64_sysregs[offset];
	711	hng64_do_dma(space);
	712	break;
	713	default:
	714	logerror("HNG64 writing to SYSTEM Registers 0x%08x == 0x%08x. (PC=%08x)\n", offset*4, hng64_sysregs[offset], cpu_get_pc(space->cpu));
	715	}
686	716	}
687	717
688		#ifdef UNUSED_FUNCTION
689		READ32_HANDLER( hng64_videoram_r )
690		{
691		return hng64_videoram[offset];
692		}
693
694		WRITE32_HANDLER( hng64_mainram_w )
695		{
696		COMBINE_DATA (&hng_mainram[offset]);
697		}
698
699		READ32_HANDLER( hng64_cart_r )
700		{
701		return hng_cart[offset];
702		}
703		#endif
704
705	718	static READ32_HANDLER( hng64_sram_r )
706	719	{
707	720	logerror("HNG64 reading from SRAM 0x%08x == 0x%08x. (PC=%08x)\n", offset*4, hng64_sram[offset], cpu_get_pc(space->cpu));
r4679	r4680
720	733	COMBINE_DATA (&hng64_dualport[offset]);
721	734	}
722	735
	736
723	737	static READ32_HANDLER( hng64_dualport_r )
724	738	{
	739	static int toggle = 0;
	740
725	741	logerror("dualport R %08x %08x (PC=%08x)\n", offset*4, hng64_dualport[offset], cpu_get_pc(space->cpu));
726	742
727	743	// These hacks create some red marks for the boot-up sequence
728	744	switch (offset*4)
729	745	{
730	746	//SamSho64
731		//      case 0x00:  toggi^=1; if (toggi==1) {return 0x00000400;} else {return 0x00000300;};
	747	case 0x00:
	748	{
	749
	750	if (hng64_boothack == 1) // ss64
	751	{
	752	toggle^=1; if (toggle==1) {return 0x00000400;} else {return 0x00000300;};
	753	}
	754	else if (hng64_boothack == 2) // ffwa
	755	{
	756	return 0x00000400;
	757	}
	758
	759	return mame_rand(space->machine);
	760	}
	761
732	762	//RoadsEdge
733	763	//      case 0x00:  return input_port_read(space->machine, "IPT_TEST");
734	764
735		//Fatfurwa
736		case 0x00:  return 0x00000400;
	765
737	766	case 0x04:  return input_port_read(space->machine, "SYSTEM");
738	767	case 0x08:  return input_port_read(space->machine, "P1_P2");
739	768
r4679	r4680
777	806
778	807
779	808	// The 3d 'display list'
	809	// is it a fifo?
	810	// sams64 / sams64_2 access it in a very different way to fatal fury...
780	811	static WRITE32_HANDLER( dl_w )
781	812	{
782	813	COMBINE_DATA (&hng64_dl[offset]) ;
	814	}
783	815
784		// !!! There are a few other writes over 0x80 as well - don't forget about those someday !!!
	816	#if 0
	817	static READ32_HANDLER( dl_r )
	818	{
785	819
786		// This method of finding the 85 writes and switching banks seems to work
787		//  the problem is when there are a lot of things to be drawn (more than what can fit in 2*0x80)
788		//  the list doesn't fit anymore, and parts aren't drawn every frame.
789	820
790		if (offset == 0x85)
791		{
792		// Only if it's VALID
793		if ((INT32)hng64_dl[offset] == 1 || (INT32)hng64_dl[offset] == 2)
794		activeBuffer = (INT32)hng64_dl[offset] - 1 ;      // Subtract 1 to fit into my array...
795		}
	821	//  mame_printf_debug("dl R (%08x) : %x %x\n", cpu_get_pc(space->cpu), offset, hng64_dl[offset]) ;
	822	//  usrintf_showmessage("dl R (%08x) : %x %x", cpu_get_pc(space->cpu), offset, hng64_dl[offset]) ;
	823	return hng64_dl[offset] ;
	824	}
	825	#endif
796	826
797		if (offset <= 0x80)
798		hng64_dls[activeBuffer][offset] = hng64_dl[offset] ;
	827	// A read at 0x20300217 ONLY happens if there are more display lists than what are readily available.
799	828
800		// For some reason, if the value at 0x86 and'ed with 0x02 is non-zero, the software just keeps
801		//   checking 0x86 until and'ing it with 2 returns 0...  What could change 0x86 if cpu0 is in this infinite loop?
802		//   Why 0x2?  And why (see below) does a read of 0x86 only happen when there is data 'hiding'
803		//   in the display list?
	829	// Some kind of buffering of the display lists, or 'render current buffer' write?
	830	static WRITE32_HANDLER( dl_control_w )
	831	{
	832	if (activeBuffer==0 || activeBuffer==1)
	833	memcpy(&hng64_dls[activeBuffer][0],&hng64_dl[0],0x200);
804	834
805		// Sends the program into an infinite loop...
806		//  if (offset == 0x85 && hng64_dl[offset] == 0x1)      // Just before the second half of the writes
807		//      hng64_dl[0x86] = 0x2 ;                          // set 0x86 to 2 (so it drops into the loop)
	835	// Only if it's VALID (hack)
	836	if (data == 1 || data == 2)
	837	activeBuffer = data - 1;
808	838
809		//  mame_printf_debug("dl W (%08x) : %.8x %.8x\n", cpu_get_pc(space->cpu), offset, hng64_dl[offset]) ;
810	839	}
811	840
812		static READ32_HANDLER( dl_r )
813		{
814		// A read of 0x86 ONLY happens if there are more display lists than what are readily available.
815		// (PC = 8006fe1c)
816	841
817		//  mame_printf_debug("dl R (%08x) : %x %x\n", cpu_get_pc(space->cpu), offset, hng64_dl[offset]) ;
818		//  usrintf_showmessage("dl R (%08x) : %x %x", cpu_get_pc(space->cpu), offset, hng64_dl[offset]) ;
819		return hng64_dl[offset] ;
820		}
821	842
822	843	#ifdef UNUSED_FUNCTION
823	844	WRITE32_HANDLER( activate_3d_buffer )
r4679	r4680
847	868	if (offset == 0x0000000b)
848	869	{
849	870	sprintf(writeString, "%s %.8x ", writeString, hng64_tcram[offset]) ;
850		//      popmessage("%s", writeString) ;
	871	//      _("%s", writeString) ;
851	872	}
852	873	*/
853	874	}
r4679	r4680
903	924	AM_RANGE(0x04000000, 0x05ffffff) AM_WRITENOP AM_ROM AM_REGION("user3",0) AM_BASE(&hng_cart)
904	925
905	926	// Ports
906		AM_RANGE(0x1F700000, 0x1F702fff) AM_READ(hng64_port_read)
	927	AM_RANGE(0x1f700000, 0x1f702fff) AM_READWRITE(hng64_sysregs_r,hng64_sysregs_w) AM_BASE(&hng64_sysregs)
907	928
908		//  AM_RANGE(0x1F70100C, 0x1F70100F) AM_WRITENOP        // ?? often
909		//  AM_RANGE(0x1F70101C, 0x1F70101F) AM_WRITENOP        // ?? often
910		//  AM_RANGE(0x1F70106C, 0x1F70106F) AM_WRITENOP        // fatfur,strange
911		//  AM_RANGE(0x1F701084, 0x1F701087) AM_RAM
912		//  AM_RANGE(0x1F70111C, 0x1F70111F) AM_WRITENOP        // irq ack
913		AM_RANGE(0x1F701204, 0x1F701207) AM_WRITE(hng_dma_start_w)
914		AM_RANGE(0x1F701214, 0x1F701217) AM_WRITE(hng_dma_dst_w)
915		AM_RANGE(0x1F701224, 0x1F701227) AM_WRITE(hng_dma_len_w)
916		//  AM_RANGE(0x1F70124C, 0x1F70124F) AM_WRITENOP        // dma related?
917		//  AM_RANGE(0x1F70125C, 0x1F70125F) AM_WRITENOP        // dma related?
918		//  AM_RANGE(0x1F7021C4, 0x1F7021C7) AM_WRITENOP        // ?? often
919
920	929	// SRAM.  Coin data, Player Statistics, etc.
921	930	AM_RANGE(0x1F800000, 0x1F803fff) AM_READWRITE(hng64_sram_r, hng64_sram_w) AM_BASE(&hng64_sram)
922	931
r4679	r4680
933	942	AM_RANGE(0x20190000, 0x20190037) AM_RAM AM_BASE(&hng64_videoregs)                           // Video Registers
934	943	AM_RANGE(0x20200000, 0x20203fff) AM_READWRITE(SMH_RAM,hng64_pal_w) AM_BASE(&paletteram32)         // Palette
935	944	AM_RANGE(0x20208000, 0x2020805f) AM_READWRITE(tcram_r, tcram_w) AM_BASE(&hng64_tcram)            // Transition Control
936		AM_RANGE(0x20300000, 0x2030ffff) AM_READWRITE(dl_r, dl_w) AM_BASE(&hng64_dl)                  // 3d Display List
	945	AM_RANGE(0x20300000, 0x203001ff) AM_WRITE(dl_w) AM_BASE(&hng64_dl)                  // 3d Display List
	946	AM_RANGE(0x20300214, 0x20300217) AM_WRITE(dl_control_w)
937	947
938	948	// 3d?
939	949	//  AM_RANGE(0x30000000, 0x3000002f) AM_READWRITE(q2_r, q2_w) AM_BASE(&hng64_q2)
r4679	r4680
1242	1252
1243	1253
1244	1254	static ADDRESS_MAP_START( hng_sound_map, ADDRESS_SPACE_PROGRAM, 16 )
1245		AM_RANGE(0x00000, 0x3ffff) AM_READ(SMH_BANK2)
1246		AM_RANGE(0xe0000, 0xfffff) AM_READ(SMH_BANK1)
	1255	AM_RANGE(0x00000, 0x3ffff) AM_READ(SMH_BANK(2))
	1256	AM_RANGE(0xe0000, 0xfffff) AM_READ(SMH_BANK(1))
1247	1257	ADDRESS_MAP_END
1248	1258
1249	1259
r4679	r4680
1324	1334
1325	1335
1326	1336
1327		/* the 4bpp gfx encoding is annoying */
1328
1329		static const gfx_layout hng64_4_even_layout =
	1337	static const gfx_layout hng64_8x8x4_tilelayout =
1330	1338	{
1331	1339	8,8,
1332	1340	RGN_FRAC(1,1),
1333	1341	4,
1334	1342	{ 0,1,2,3 },
1335		{ 40, 44, 8,12,  32,36,    0,4},
1336		{ 0*64, 1*64, 2*64, 3*64, 4*64, 5*64, 6*64, 7*64 },
1337		8*64
	1343	{ 24, 28, 8,12,  16,20,    0,4},
	1344	{ 0*32, 1*32, 2*32, 3*32, 4*32, 5*32, 6*32, 7*32 },
	1345	8*32
1338	1346	};
1339	1347
1340		static const gfx_layout hng64_4_odd_layout =
	1348	static const gfx_layout hng64_8x8x8_tilelayout =
1341	1349	{
1342	1350	8,8,
1343	1351	RGN_FRAC(1,1),
1344		4,
1345		{ 0,1,2,3 },
1346		{  56,60, 24, 28,  48,52,   16, 20 },
1347
1348
1349		{ 0*64, 1*64, 2*64, 3*64, 4*64, 5*64, 6*64, 7*64 },
1350		8*64
	1352	8,
	1353	{ 0,1,2,3,4,5,6,7 },
	1354	{ 24, 8, 16, 0, 256+24, 256+8, 256+16, 256+0},
	1355	{ 0*32, 1*32, 2*32, 3*32, 4*32, 5*32, 6*32, 7*32 },
	1356	16*32
1351	1357	};
1352	1358
1353
1354		static const gfx_layout hng64_4_16_layout =
	1359	static const gfx_layout hng64_16x16x4_tilelayout =
1355	1360	{
1356	1361	16,16,
1357	1362	RGN_FRAC(1,1),
1358	1363	4,
1359	1364	{ 0,1,2,3 },
1360		{  56,60, 24, 28,  48,52,   16, 20,40, 44, 8,12,  32,36,    0,4 },
	1365	{ 24, 28, 8,12,  16,20,    0,4,
	1366	256+24,256+28,256+8,256+12,256+16,256+20,256+0,256+4
1361	1367
1362
1363		{ 0*64, 1*64, 2*64, 3*64, 4*64, 5*64, 6*64, 7*64,8*64,9*64,10*64,11*64,12*64,13*64,14*64,15*64 },
1364		16*64
	1368	},
	1369	{ 0*32, 1*32, 2*32, 3*32, 4*32, 5*32, 6*32, 7*32, 16*32,17*32,18*32,19*32,20*32,21*32,22*32,23*32 },
	1370	32*32
1365	1371	};
1366	1372
1367	1373
1368		static const gfx_layout hng64_layout =
	1374	static const gfx_layout hng64_16x16x8_tilelayout =
1369	1375	{
1370		8,8,
	1376	16,16,
1371	1377	RGN_FRAC(1,1),
1372	1378	8,
1373	1379	{ 0,1,2,3,4,5,6,7 },
1374		{ 56, 24, 48,16,  40, 8,  32, 0 },
1375		{ 0*64, 1*64, 2*64, 3*64, 4*64, 5*64, 6*64, 7*64 },
1376		8*64
	1380	{ 24, 8, 16, 0,
	1381	256+24, 256+8, 256+16, 256+0,
	1382	1024+24,1024+8,1024+16,1024+0,
	1383	1280+24,1280+8,1280+16,1280+0,
	1384	},
	1385	{ 0*32, 1*32, 2*32, 3*32, 4*32, 5*32, 6*32, 7*32,
	1386	16*32,17*32,18*32,19*32,20*32,21*32,22*32,22*32,23*32
	1387	},
	1388	64*32
1377	1389	};
1378	1390
	1391	static const gfx_layout hng64_16x16x4_spritelayout =
	1392	{
	1393	16,16,
	1394	RGN_FRAC(1,1),
	1395	4,
	1396	{ 0,1,2,3 },
	1397	{  56,60, 24, 28,  48,52,   16, 20,40, 44, 8,12,  32,36,    0,4 },
	1398	{ 0*64, 1*64, 2*64, 3*64, 4*64, 5*64, 6*64, 7*64,8*64,9*64,10*64,11*64,12*64,13*64,14*64,15*64 },
	1399	16*64
	1400	};
1379	1401
1380		static const gfx_layout hng64_16_layout =
	1402	static const gfx_layout hng64_16x16x8_spritelayout =
1381	1403	{
1382	1404	16,16,
1383	1405	RGN_FRAC(1,1),
r4679	r4680
1391	1413	};
1392	1414
1393	1415
	1416	static const UINT32 texlayout_xoffset[1024] =
	1417	{
	1418	STEP1024(0,8),
	1419
	1420	};
	1421
	1422	static const UINT32 texlayout_yoffset[512] =
	1423	{
	1424	STEP512(0,8192),
	1425	};
	1426
	1427	static const gfx_layout hng64_texlayout =
	1428	{
	1429	1024, 512,
	1430	RGN_FRAC(1,1),
	1431	8,
	1432	{ 0,1,2,3,4,5,6,7 },
	1433	EXTENDED_XOFFS,
	1434	EXTENDED_YOFFS,
	1435	1024*512*8,
	1436	texlayout_xoffset,
	1437	texlayout_yoffset
	1438	};
	1439
	1440
1394	1441	static GFXDECODE_START( hng64 )
1395		GFXDECODE_ENTRY( "gfx1", 0, hng64_4_even_layout, 0x0, 0x100 ) /* scrolltiles */
1396		GFXDECODE_ENTRY( "gfx1", 0, hng64_4_odd_layout,  0x0, 0x100 ) /* scrolltiles */
1397		GFXDECODE_ENTRY( "gfx1", 0, hng64_layout,        0x0, 0x10 )  /* scrolltiles */
1398		GFXDECODE_ENTRY( "gfx1", 0, hng64_16_layout,     0x0, 0x10 )  /* scroll tiles */
1399		GFXDECODE_ENTRY( "gfx2", 0, hng64_4_16_layout,   0x0, 0x100 ) /* sprite tiles */
1400		GFXDECODE_ENTRY( "gfx2", 0, hng64_16_layout,     0x0, 0x10 )  /* sprite tiles */
	1442
	1443	/* tilemap tiles */
	1444	GFXDECODE_ENTRY( "scrtile", 0, hng64_8x8x4_tilelayout,  0x0, 0x100 )
	1445	GFXDECODE_ENTRY( "scrtile", 0, hng64_8x8x8_tilelayout,  0x0, 0x10 )
	1446	GFXDECODE_ENTRY( "scrtile", 0, hng64_16x16x4_tilelayout,0x0, 0x100 )
	1447	GFXDECODE_ENTRY( "scrtile", 0, hng64_16x16x8_tilelayout,0x0, 0x10 )
	1448
	1449	/* sprite tiles */
	1450	GFXDECODE_ENTRY( "sprtile", 0, hng64_16x16x4_spritelayout, 0x0, 0x100 )
	1451	GFXDECODE_ENTRY( "sprtile", 0, hng64_16x16x8_spritelayout, 0x0, 0x10 )
	1452
	1453	GFXDECODE_ENTRY( "textures", 0, hng64_texlayout,     0x0, 0x10 )  /* textures */
1401	1454	GFXDECODE_END
1402	1455
	1456	static void hng64_reorder(UINT8* gfxregion, size_t gfxregionsize)
	1457	{
	1458	// by default 2 4bpp tiles are stored in each 8bpp tile, this makes decoding in MAME harder than it needs to be
	1459	// reorder them
	1460	UINT8* buffer;
	1461	int i;
	1462	UINT8 tilesize = 4*8; // 4 bytes per line, 8 lines
	1463
	1464	buffer = alloc_array_or_die(UINT8, gfxregionsize);
	1465
	1466	for (i=0;i<gfxregionsize/2;i+=tilesize)
	1467	{
	1468	memcpy((buffer+i*2)+tilesize, gfxregion+i,                   tilesize);
	1469	memcpy((buffer+i*2),          gfxregion+i+(gfxregionsize/2), tilesize);
	1470	}
	1471
	1472	memcpy(gfxregion, buffer, gfxregionsize);
	1473
	1474	free (buffer);
	1475
	1476	}
	1477
	1478
	1479	static DRIVER_INIT( hng64_reorder_gfx )
	1480	{
	1481	hng64_reorder(memory_region(machine,"scrtile"), memory_region_length(machine, "scrtile"));
	1482	}
	1483
	1484
	1485
1403	1486	static DRIVER_INIT( hng64 )
1404	1487	{
1405		hng64_soundram=auto_malloc(0x200000);
	1488	hng64_soundram=auto_alloc_array(machine, UINT16, 0x200000/2);
	1489	DRIVER_INIT_CALL(hng64_reorder_gfx);
1406	1490	}
1407	1491
1408	1492	static DRIVER_INIT(hng64_fght)
1409	1493	{
1410		no_machine_error_code=0x01010101;
	1494	no_machine_error_code=0x01000000;
1411	1495	DRIVER_INIT_CALL(hng64);
1412	1496	}
1413	1497
	1498	static DRIVER_INIT( fatfurwa )
	1499	{
	1500	DRIVER_INIT_CALL(hng64_fght);
	1501	hng64_boothack = 2;
	1502	}
	1503
	1504	static DRIVER_INIT( ss64 )
	1505	{
	1506	DRIVER_INIT_CALL(hng64_fght);
	1507	hng64_boothack = 1;
	1508	}
	1509
	1510
1414	1511	static DRIVER_INIT(hng64_race)
1415	1512	{
1416		no_machine_error_code=0x02020202;
	1513	no_machine_error_code=0x02000000;
1417	1514	DRIVER_INIT_CALL(hng64);
1418	1515	}
1419	1516
	1517	static DRIVER_INIT(hng64_shoot)
	1518	{
	1519	hng64_boothack = 2;
	1520	no_machine_error_code=0x03000000;
	1521	DRIVER_INIT_CALL(hng64);
	1522	}
1420	1523
1421	1524
	1525
1422	1526	/* ?? */
1423	1527	static const mips3_config config =
1424	1528	{
r4679	r4680
1428	1532
1429	1533	static TIMER_CALLBACK( irq_stop )
1430	1534	{
1431		cpu_set_input_line(machine->cpu[0], 0, CLEAR_LINE);
	1535	cputag_set_input_line(machine, "maincpu", 0, CLEAR_LINE);
1432	1536	}
1433	1537
1434	1538	static INTERRUPT_GEN( irq_start )
r4679	r4680
1454	1558	static MACHINE_START(hyperneo)
1455	1559	{
1456	1560	/* set the fastest DRC options */
1457		mips3drc_set_options(machine->cpu[0], MIPS3DRC_FASTEST_OPTIONS + MIPS3DRC_STRICT_VERIFY);
	1561	mips3drc_set_options(cputag_get_cpu(machine, "maincpu"), MIPS3DRC_FASTEST_OPTIONS + MIPS3DRC_STRICT_VERIFY);
1458	1562
1459	1563	/* configure fast RAM regions for DRC */
1460		mips3drc_add_fastram(machine->cpu[0], 0x00000000, 0x00ffffff, FALSE, hng_mainram);
1461		mips3drc_add_fastram(machine->cpu[0], 0x04000000, 0x05ffffff, TRUE,  hng_cart);
1462		mips3drc_add_fastram(machine->cpu[0], 0x1fc00000, 0x1fc7ffff, TRUE,  rombase);
	1564	mips3drc_add_fastram(cputag_get_cpu(machine, "maincpu"), 0x00000000, 0x00ffffff, FALSE, hng_mainram);
	1565	mips3drc_add_fastram(cputag_get_cpu(machine, "maincpu"), 0x04000000, 0x05ffffff, TRUE,  hng_cart);
	1566	mips3drc_add_fastram(cputag_get_cpu(machine, "maincpu"), 0x1fc00000, 0x1fc7ffff, TRUE,  rombase);
1463	1567	}
1464	1568
1465	1569
r4679	r4680
1472	1576	UINT8 *RAM = (UINT8*)hng64_soundram;
1473	1577	memory_set_bankptr(machine, 1,&RAM[0x1e0000]);
1474	1578	memory_set_bankptr(machine, 2,&RAM[0x001000]); // where..
1475		cpu_set_input_line(machine->cpu[1], INPUT_LINE_HALT, ASSERT_LINE);
1476		cpu_set_input_line(machine->cpu[1], INPUT_LINE_RESET, ASSERT_LINE);
	1579	cputag_set_input_line(machine, "audiocpu", INPUT_LINE_HALT, ASSERT_LINE);
	1580	cputag_set_input_line(machine, "audiocpu", INPUT_LINE_RESET, ASSERT_LINE);
1477	1581
1478	1582
1479	1583	/* Comm CPU */
1480	1584	KL5C80_init();
1481	1585
1482	1586	/* 1 meg of virtual address space for the com cpu */
1483		hng64_com_virtual_mem = auto_malloc(0x100000);
1484		hng64_com_op_base     = auto_malloc(0x10000);
	1587	hng64_com_virtual_mem = auto_alloc_array(machine, UINT8, 0x100000);
	1588	hng64_com_op_base     = auto_alloc_array(machine, UINT8, 0x10000);
1485	1589
1486	1590	/* Fill up virtual memory with ROM */
1487	1591	for (i = 0x0; i < 0x100000; i++)
1488	1592	hng64_com_virtual_mem[i] = rom[i] ;
1489	1593
1490	1594	KL5C80_virtual_mem_sync();
1491		memory_set_direct_update_handler(cpu_get_address_space(machine->cpu[2], ADDRESS_SPACE_PROGRAM), KL5C80_direct_handler);
	1595	memory_set_direct_update_handler(cputag_get_address_space(machine, "comm", ADDRESS_SPACE_PROGRAM), KL5C80_direct_handler);
1492	1596
1493		cpu_set_input_line(machine->cpu[2], INPUT_LINE_RESET, PULSE_LINE);     // reset the CPU and let 'er rip
1494		//  cpu_set_input_line(machine->cpu[2], INPUT_LINE_HALT, ASSERT_LINE);     // hold on there pardner...
	1597	cputag_set_input_line(machine, "comm", INPUT_LINE_RESET, PULSE_LINE);     // reset the CPU and let 'er rip
	1598	//  cputag_set_input_line(machine, "comm", INPUT_LINE_HALT, ASSERT_LINE);     // hold on there pardner...
1495	1599
1496	1600
1497	1601
r4679	r4680
1541	1645	ROM_LOAD ( "rom1.bin",  0x080000, 0x01ff32,  CRC(4a6832dc) SHA1(ae504f7733c2f40450157cd1d3b85bc83fac8569) )
1542	1646
1543	1647	/* To placate MAME */
1544		ROM_REGION32_LE( 0x2000000, "user3", ROMREGION_ERASEFF ) /* Program Code, mapped at ??? maybe banked?  LE? */
1545		ROM_REGION( 0x4000, "gfx1", ROMREGION_DISPOSE | ROMREGION_ERASEFF )
1546		ROM_REGION( 0x4000, "gfx2", ROMREGION_DISPOSE | ROMREGION_ERASEFF )
1547		ROM_REGION( 0x1000000, "gfx3", ROMREGION_ERASEFF )
1548		ROM_REGION16_BE( 0x0c00000, "gfx4", ROMREGION_ERASEFF )
	1648	ROM_REGION32_LE( 0x2000000, "user3", ROMREGION_ERASEFF )
	1649	ROM_REGION( 0x4000, "scrtile", ROMREGION_DISPOSE | ROMREGION_ERASEFF )
	1650	ROM_REGION( 0x4000, "sprtile", ROMREGION_DISPOSE | ROMREGION_ERASEFF )
	1651	ROM_REGION( 0x1000000, "textures", ROMREGION_ERASEFF )
	1652	ROM_REGION16_BE( 0x0c00000, "verts", ROMREGION_ERASEFF )
1549	1653	ROM_REGION( 0x1000000, "samples", ROMREGION_ERASEFF ) /* Sound Samples? */
1550	1654	ROM_END
1551	1655
r4679	r4680
1560	1664	ROM_LOAD ( "rom1.bin",  0x080000, 0x01ff32,  CRC(4a6832dc) SHA1(ae504f7733c2f40450157cd1d3b85bc83fac8569) )
1561	1665	/* END BIOS */
1562	1666
1563		ROM_REGION32_LE( 0x2000000, "user3", 0 ) /* Program Code, mapped at ??? maybe banked?  LE? */
	1667	ROM_REGION32_LE( 0x2000000, "user3", 0 )
1564	1668	ROM_LOAD32_WORD( "001pr01b.81", 0x0000000, 0x400000, CRC(effbac30) SHA1(c1bddf3e511a8950f65ac7e452f81dbc4b7fd977) )
1565	1669	ROM_LOAD32_WORD( "001pr02b.82", 0x0000002, 0x400000, CRC(b9aa4ad3) SHA1(9ab3c896dbdc45560b7127486e2db6ca3b15a057) )
1566	1670
1567	1671	/* Scroll Characters 8x8x8 / 16x16x8 */
1568		ROM_REGION( 0x1000000, "gfx1", ROMREGION_DISPOSE )
1569		ROM_LOAD32_BYTE( "001sc01a.41", 0x0000000, 0x400000, CRC(084395a1) SHA1(8bfea8fd3981fd45dcc04bd74840a5948aaf06a8) )
1570		ROM_LOAD32_BYTE( "001sc02a.42", 0x0000001, 0x400000, CRC(51dd19e3) SHA1(eeb3634294a049a357a75ee00aa9fce65b737395) )
1571		ROM_LOAD32_BYTE( "001sc03a.43", 0x0000002, 0x400000, CRC(0b6f3e19) SHA1(3b6dfd0f0633b0d8b629815920edfa39d92336bf) )
1572		ROM_LOAD32_BYTE( "001sc04a.44", 0x0000003, 0x400000, CRC(256c8c1c) SHA1(85935eea3722ec92f8d922f527c2e049c4185aa3) )
	1672	ROM_REGION( 0x1000000, "scrtile", ROMREGION_DISPOSE )
	1673	ROM_LOAD16_BYTE( "001sc01a.41", 0x0000000, 0x400000, CRC(084395a1) SHA1(8bfea8fd3981fd45dcc04bd74840a5948aaf06a8) )
	1674	ROM_LOAD16_BYTE( "001sc02a.42", 0x0000001, 0x400000, CRC(51dd19e3) SHA1(eeb3634294a049a357a75ee00aa9fce65b737395) )
	1675	ROM_LOAD16_BYTE( "001sc03a.43", 0x0800000, 0x400000, CRC(0b6f3e19) SHA1(3b6dfd0f0633b0d8b629815920edfa39d92336bf) )
	1676	ROM_LOAD16_BYTE( "001sc04a.44", 0x0800001, 0x400000, CRC(256c8c1c) SHA1(85935eea3722ec92f8d922f527c2e049c4185aa3) )
1573	1677
1574	1678	/* Sprite Characters - 8x8x8 / 16x16x8 */
1575		ROM_REGION( 0x1000000, "gfx2", ROMREGION_DISPOSE )
	1679	ROM_REGION( 0x1000000, "sprtile", ROMREGION_DISPOSE )
1576	1680	ROM_LOAD32_BYTE( "001sp01a.53",0x0000000, 0x400000, CRC(7a469453) SHA1(3738ca76f538243bb23ffd23a42b2a0558882889) )
1577	1681	ROM_LOAD32_BYTE( "001sp02a.54",0x0000001, 0x400000, CRC(6b9a3de0) SHA1(464c652f7b193326e3a871dfe751dd83c14284eb) )
1578	1682	ROM_LOAD32_BYTE( "001sp03a.55",0x0000002, 0x400000, CRC(efbbd391) SHA1(7447c481ba6f9ba154d48a4b160dd24157891d35) )
1579	1683	ROM_LOAD32_BYTE( "001sp04a.56",0x0000003, 0x400000, CRC(1a0eb173) SHA1(a69b786a9957197d1cc950ab046c57c18ca07ea7) )
1580	1684
1581	1685	/* Textures - 1024x1024x8 pages */
1582		ROM_REGION( 0x1000000, "gfx3", 0 )
	1686	ROM_REGION( 0x1000000, "textures", 0 )
1583	1687	/* note: same roms are at different positions on the board, repeated a total of 4 times*/
1584	1688	ROM_LOAD( "001tx01a.1", 0x0000000, 0x400000, CRC(f6539bb9) SHA1(57fc5583d56846be93d6f5784acd20fc149c70a5) )
1585	1689	ROM_LOAD( "001tx02a.2", 0x0400000, 0x400000, CRC(f1d139d3) SHA1(f120243f4d55f38b10bf8d1aa861cdc546a24c80) )
r4679	r4680
1599	1703	ROM_LOAD( "001tx04a.16",0x0c00000, 0x400000, CRC(288a5bd5) SHA1(24e05db681894eb31cdc049cf42c1f9d7347bd0c) )
1600	1704
1601	1705	/* X,Y,Z Vertex ROMs */
1602		ROM_REGION( 0x0c00000, "gfx4", ROMREGION_NODISPOSE )
	1706	ROM_REGION( 0x0c00000, "verts", ROMREGION_NODISPOSE )
1603	1707	ROMX_LOAD( "001vt01a.17", 0x0000000, 0x400000, CRC(1a748e1b) SHA1(376d40baa3b94890d4740045d053faf208fe43db), ROM_GROUPWORD | ROM_SKIP(4) )
1604	1708	ROMX_LOAD( "001vt02a.18", 0x0000002, 0x400000, CRC(449f94d0) SHA1(2228690532d82d2661285aeb4260689b027597cb), ROM_GROUPWORD | ROM_SKIP(4) )
1605	1709	ROMX_LOAD( "001vt03a.19", 0x0000004, 0x400000, CRC(50ac8639) SHA1(dd2d3689466990a7c479bb8f11bd930ea45e47b5), ROM_GROUPWORD | ROM_SKIP(4) )
r4679	r4680
1610	1714	ROM_END
1611	1715
1612	1716
1613		ROM_START( sams64_2 )
1614	1717
	1718	ROM_START( sams64 )
1615	1719	/* BIOS */
1616	1720	ROM_REGION32_BE( 0x0100000, "user1", 0 ) /* 512k for R4300 BIOS code */
1617	1721	ROM_LOAD ( "brom1.bin", 0x000000, 0x080000,  CRC(a30dd3de) SHA1(3e2fd0a56214e6f5dcb93687e409af13d065ea30) )
r4679	r4680
1620	1724	ROM_LOAD ( "rom1.bin",  0x080000, 0x01ff32,  CRC(4a6832dc) SHA1(ae504f7733c2f40450157cd1d3b85bc83fac8569) )
1621	1725	/* END BIOS */
1622	1726
1623		ROM_REGION32_LE( 0x2000000, "user3", 0 ) /* Program Code, mapped at ??? maybe banked?  LE? */
	1727	ROM_REGION32_LE( 0x2000000, "user3", 0 )
	1728	ROM_LOAD32_WORD( "002-pro1a.81", 0x0000000, 0x400000, CRC(e5b907c5) SHA1(83637ffaa9031d41a5bed3397a519d1dfa8052cb) )
	1729	ROM_LOAD32_WORD( "002-pro2a.82", 0x0000002, 0x400000, CRC(803ed2eb) SHA1(666db47886a316e68b911311e5db3bc0f5b8a34d) )
	1730	ROM_LOAD32_WORD( "002-pro3a.83", 0x0800000, 0x400000, CRC(582156a7) SHA1(a7bbbd472a53072cbfaed5d41d4265123c9e3f3d) )
	1731	ROM_LOAD32_WORD( "002-pro4a.84", 0x0800002, 0x400000, CRC(5a8291e9) SHA1(ec1e5a5a0ba37393e8b93d78b4ac855109d45ec9) )
	1732
	1733	/* Scroll Characters 8x8x8 / 16x16x8 */
	1734	ROM_REGION( 0x2000000, "scrtile", ROMREGION_DISPOSE )
	1735	ROM_LOAD16_BYTE( "002-sc01a.41", 0x0000000, 0x400000, CRC(77c3df69) SHA1(813d57814acccd2c04c951e58ac87cf7413bdf58) )
	1736	ROM_LOAD16_BYTE( "002-sc02a.42", 0x0000001, 0x400000, CRC(60065174) SHA1(624c2e20abb53b2466df4ce2ffa9e20273798e92) )
	1737	ROM_LOAD16_BYTE( "002-sc05a.45", 0x0800000, 0x400000, CRC(fd242bee) SHA1(b1fad97987da21c77d6c460bbed6f0dd18905ed4) )
	1738	ROM_LOAD16_BYTE( "002-sc06a.46", 0x0800001, 0x400000, CRC(87afc297) SHA1(47d5eaae88ce501fbbd5a2d7305c1d6acadfb13e) )
	1739	ROM_LOAD16_BYTE( "002-sc03a.43", 0x1000000, 0x400000, CRC(5d4a5289) SHA1(7a1576fdd344825cb05866c156d17b18f562a336) )
	1740	ROM_LOAD16_BYTE( "002-sc04a.44", 0x1000001, 0x400000, CRC(aa5536fa) SHA1(09a50a29561ac97c564243da879bd7c4cf8c3cee) )
	1741	ROM_LOAD16_BYTE( "002-sc07a.47", 0x1800000, 0x400000, CRC(e01e8a95) SHA1(b132214ef2b33a46cb605ea8f2193e77d9464881) )
	1742	ROM_LOAD16_BYTE( "002-sc08a.48", 0x1800001, 0x400000, CRC(a17464d0) SHA1(2e6b73b1e0983b2b01455b0f4d6dc7c3845adb69) )
	1743
	1744	/* Sprite Characters - 8x8x8 / 16x16x8 */
	1745	ROM_REGION( 0x2000000, "sprtile", ROMREGION_DISPOSE )
	1746	ROM_LOAD32_BYTE( "002-sp01a.53",0x0000000, 0x400000, CRC(c73cf9b4) SHA1(7c34fa1bc03cd366d473dbf3e316a6434ee5ec60) )
	1747	ROM_LOAD32_BYTE( "002-sp02a.54",0x0000001, 0x400000, CRC(04b0ecc8) SHA1(893e522324dd41dfcd2217974a6740e6bc3ea1d3) )
	1748	ROM_LOAD32_BYTE( "002-sp03a.55",0x0000002, 0x400000, CRC(13c80b74) SHA1(ad6c1690ebcde0d8237201ea43eb162cd5308ccb) )
	1749	ROM_LOAD32_BYTE( "002-sp04a.56",0x0000003, 0x400000, CRC(b1a6a06d) SHA1(1b11ee7cec46d0c99dc6310ee8221fa2de33c359) )
	1750	ROM_LOAD32_BYTE( "002-sp05a.57",0x1000000, 0x400000, CRC(fa71e825) SHA1(adfa8b5a8ec703d4f04285c47f2618a294c90ec5) )
	1751	ROM_LOAD32_BYTE( "002-sp06a.58",0x1000001, 0x400000, CRC(1bcfe48e) SHA1(8d85b1eb33fea48e5c6597d2fcbec903ecdad9d9) )
	1752	ROM_LOAD32_BYTE( "002-sp07a.59",0x1000002, 0x400000, CRC(a5049bd7) SHA1(123e32c22f53d6e55ee1d1deb4ab40891004c6fd) )
	1753	ROM_LOAD32_BYTE( "002-sp08a.60",0x1000003, 0x400000, CRC(c2e57813) SHA1(e7a21df1f94ed959a53da9dc4667863ee77bf676) )
	1754
	1755	/* Textures - 1024x1024x8 pages */
	1756	ROM_REGION( 0x1000000, "textures", 0 )
	1757	/* note: same roms are at different positions on the board, repeated a total of 4 times*/
	1758	ROM_LOAD( "002-tx01a.13", 0x0000000, 0x400000, CRC(233749b5) SHA1(7c93681bbd5f4246e0dc50d26108f04e9b248d0d) )
	1759	ROM_LOAD( "002-tx02a.14", 0x0400000, 0x400000, CRC(d5074be2) SHA1(c33e9b9f0d21ad5ad31d8f988b3c7378d374fc1b) )
	1760	ROM_LOAD( "002-tx03a.15", 0x0800000, 0x400000, CRC(68c313f7) SHA1(90ce8d0d19a994647c7167e3b256ff31647e575a) )
	1761	ROM_LOAD( "002-tx04a.16", 0x0c00000, 0x400000, CRC(f7dac24f) SHA1(1215354f28cbeb9fc38f6a7acae450ad5f34bb6a) )
	1762
	1763
	1764	/* X,Y,Z Vertex ROMs */
	1765	ROM_REGION( 0x1800000, "verts", ROMREGION_NODISPOSE )
	1766	ROMX_LOAD( "002-vt01a.17", 0x0000000, 0x400000, CRC(403fd7fd) SHA1(9bdadbeb4cd13c4c4e89a1c233af9eaaa46f8fdf), ROM_GROUPWORD | ROM_SKIP(4) )
	1767	ROMX_LOAD( "002-vt02a.18", 0x0000002, 0x400000, CRC(e1885905) SHA1(6b16083c50e887aebe2baf95bf56697c239970f2), ROM_GROUPWORD | ROM_SKIP(4) )
	1768	ROMX_LOAD( "002-vt03a.19", 0x0000004, 0x400000, CRC(2074a6a6) SHA1(9a5e8259d1e19d2b43878c24ca06afba5ee5e316), ROM_GROUPWORD | ROM_SKIP(4) )
	1769	ROMX_LOAD( "002-vt04a.20", 0x0400000, 0x400000, CRC(aefc4d94) SHA1(f9d8222d4320ccf9f3c7c0ef307e03c8f34ea530), ROM_GROUPWORD | ROM_SKIP(4) )
	1770	ROMX_LOAD( "002-vt05a.21", 0x0400002, 0x400000, CRC(d32ee9cb) SHA1(a768dfc15899924eb05eccbf8e85cb29c7b60396), ROM_GROUPWORD | ROM_SKIP(4) )
	1771	ROMX_LOAD( "002-vt06a.22", 0x0400004, 0x400000, CRC(13bf3636) SHA1(7c704bf66b571350207bccc7a2d6ed1ec9de4cd5), ROM_GROUPWORD | ROM_SKIP(4) )
	1772
	1773	ROM_REGION( 0x1000000, "samples", ROMREGION_DISPOSE ) /* Sound Samples? */
	1774	ROM_LOAD( "002-sd01a.77", 0x0000000, 0x400000, CRC(6215036b) SHA1(ded71dce98b7f7ef78ef32d966a292bbf0d15332) )
	1775	ROM_LOAD( "002-sd02a.78", 0x0400000, 0x400000, CRC(32b28310) SHA1(5b80750a66c12b035b493d06e3842741a3334d0f) )
	1776	ROM_LOAD( "002-sd03a.79", 0x0800000, 0x400000, CRC(53591413) SHA1(36c7efa1aced0ca38b3ce7b95af28755973698f3) )
	1777	ROM_END
	1778
	1779
	1780	ROM_START( xrally )
	1781	/* BIOS */
	1782	ROM_REGION32_BE( 0x0100000, "user1", 0 ) /* 512k for R4300 BIOS code */
	1783	ROM_LOAD ( "brom1.bin", 0x000000, 0x080000,  CRC(a30dd3de) SHA1(3e2fd0a56214e6f5dcb93687e409af13d065ea30) )
	1784	ROM_REGION( 0x0100000, "user2", 0 ) /* KL5C80 BIOS and unknown ROM */
	1785	ROM_LOAD ( "from1.bin", 0x000000, 0x080000,  CRC(6b933005) SHA1(e992747f46c48b66e5509fe0adf19c91250b00c7) )
	1786	ROM_LOAD ( "rom1.bin",  0x080000, 0x01ff32,  CRC(4a6832dc) SHA1(ae504f7733c2f40450157cd1d3b85bc83fac8569) )
	1787	/* END BIOS */
	1788
	1789	ROM_REGION32_LE( 0x2000000, "user3", 0 )
	1790	ROM_LOAD32_WORD( "003-pr01a.81", 0x0000000, 0x400000, CRC(4e160388) SHA1(08fba66d0f0dab47f7db5bc7d411f4fc0e8219c8) )
	1791	ROM_LOAD32_WORD( "003-pr02a.82", 0x0000002, 0x400000, CRC(c4dd4f18) SHA1(4db0e6d5cabd9e4f82d5905556174b9eff8ad4d9) )
	1792
	1793	/* Scroll Characters 8x8x8 / 16x16x8 */
	1794	ROM_REGION( 0x1000000, "scrtile", ROMREGION_DISPOSE )
	1795	ROM_LOAD16_BYTE( "003-sc01a.41", 0x0000000, 0x400000, CRC(bc608584) SHA1(fa4b618eb36f302f58cefea7c50618a8318927d6) )
	1796	ROM_LOAD16_BYTE( "003-sc02a.42", 0x0000001, 0x400000, CRC(c810e9e2) SHA1(4f0d35d9b0af2a4b66253e467c0d30a519c904b6) )
	1797	ROM_LOAD16_BYTE( "003-sc03a.43", 0x0800000, 0x400000, CRC(12724653) SHA1(5e40947086883d64db84ac51a1b29efa2f173f58) )
	1798	ROM_LOAD16_BYTE( "003-sc04a.44", 0x0800001, 0x400000, CRC(b0062c4d) SHA1(73c75b59dc1463ad80f805191f4605a6b4b1c321) )
	1799
	1800	/* Sprite Characters - 8x8x8 / 16x16x8 */
	1801	ROM_REGION( 0x1000000, "sprtile", ROMREGION_DISPOSE )
	1802	ROM_LOAD32_BYTE( "003-sp01a.53",0x0000000, 0x400000, CRC(12a329dc) SHA1(00929f3c460cce5a3657dec73d467731e59de564) )
	1803	ROM_LOAD32_BYTE( "003-sp02a.54",0x0000001, 0x400000, CRC(ee9e5338) SHA1(681c2f34a2f292ce14fcbef4447ede7b949c7117) )
	1804	ROM_LOAD32_BYTE( "003-sp03a.55",0x0000002, 0x400000, CRC(6fa8dff9) SHA1(500bd128e6568e9491e52676775e9239adc332fe) )
	1805	ROM_LOAD32_BYTE( "003-sp04a.56",0x0000003, 0x400000, CRC(a98eec07) SHA1(de0c7db56b851daa369f37088bd536933372346f) )
	1806
	1807	/* Textures - 1024x1024x8 pages */
	1808	ROM_REGION( 0x2000000, "textures", 0 )
	1809	/* note: same roms are at different positions on the board, repeated a total of 4 times*/
	1810	ROM_LOAD( "003-tx01a.13", 0x0000000, 0x400000, CRC(83ea2178) SHA1(931898f57564b8b9975e06df5ccfd8c84fc2fbe3) )
	1811	ROM_LOAD( "003-tx02a.14", 0x0400000, 0x400000, CRC(7912f4be) SHA1(bca44c1415a25f2349857b2246e3ee7abe709a84) )
	1812	ROM_LOAD( "003-tx03a.15", 0x0800000, 0x400000, CRC(a319c94e) SHA1(14d720cdd8b9411fd82a7b4b33ee5dbfdd01c9f8) )
	1813	ROM_LOAD( "003-tx04a.16", 0x0c00000, 0x400000, CRC(16d7805b) SHA1(4cc7b2375832c2f9f20fe882e604a2a52bf07f6f) )
	1814
	1815	/* X,Y,Z Vertex ROMs */
	1816	ROM_REGION( 0x1800000, "verts", ROMREGION_NODISPOSE )
	1817	ROMX_LOAD( "003-vt01a.17", 0x0000000, 0x400000, CRC(3e5e275d) SHA1(74f5ec88c258bc224e271f7abeb02d6485e27d8c), ROM_GROUPWORD | ROM_SKIP(4) )
	1818	ROMX_LOAD( "003-vt02a.18", 0x0000002, 0x400000, CRC(da7b956e) SHA1(c57cbb8c51145ae224faba5b6a1a7e61cb2bee64), ROM_GROUPWORD | ROM_SKIP(4) )
	1819	ROMX_LOAD( "003-vt03a.19", 0x0000004, 0x400000, CRC(4fe72cb7) SHA1(9f8e662f0656f201924834d1ee78498d4223745e), ROM_GROUPWORD | ROM_SKIP(4) )
	1820
	1821	ROM_REGION( 0x1000000, "samples", ROMREGION_DISPOSE ) /* Sound Samples? */
	1822	ROM_LOAD( "003-sd01a.77", 0x0000000, 0x400000, CRC(c43898ff) SHA1(0e49b87181b56c62a674d255d326f761942b99b1) )
	1823	ROM_LOAD( "003-sd02a.78", 0x0400000, 0x400000, CRC(079a3d5a) SHA1(a97b052de69fee7d605cae30f5a228e6ffeabb26) )
	1824	ROM_LOAD( "003-sd03a.79", 0x0800000, 0x400000, CRC(96c0991a) SHA1(01be872b3e307258236fe96a544417dd8a0bc8bd) )
	1825	ROM_END
	1826
	1827
	1828	ROM_START( bbust2 )
	1829	/* BIOS */
	1830	ROM_REGION32_BE( 0x0100000, "user1", 0 ) /* 512k for R4300 BIOS code */
	1831	ROM_LOAD ( "brom1.bin", 0x000000, 0x080000,  CRC(a30dd3de) SHA1(3e2fd0a56214e6f5dcb93687e409af13d065ea30) )
	1832	ROM_REGION( 0x0100000, "user2", 0 ) /* KL5C80 BIOS and unknown ROM */
	1833	ROM_LOAD ( "from1.bin", 0x000000, 0x080000,  CRC(6b933005) SHA1(e992747f46c48b66e5509fe0adf19c91250b00c7) )
	1834	ROM_LOAD ( "rom1.bin",  0x080000, 0x01ff32,  CRC(4a6832dc) SHA1(ae504f7733c2f40450157cd1d3b85bc83fac8569) )
	1835	/* END BIOS */
	1836
	1837	ROM_REGION32_LE( 0x2000000, "user3", 0 )
	1838	ROM_LOAD32_WORD( "004-pr01a.81", 0x0000000, 0x400000, CRC(7b836ece) SHA1(7a4a08251f1dd66c368ac203f5a006266e77f73d) )
	1839	ROM_LOAD32_WORD( "004-pr02a.82", 0x0000002, 0x400000, CRC(8c55a988) SHA1(d9a61ac3d8550ce0ee6aab374c9f024912163180) )
	1840	ROM_LOAD32_WORD( "004-pr03a.83", 0x0800000, 0x400000, CRC(f25a82dd) SHA1(74c0a03021ef424e0b9c3c818be297d2967b3012) )
	1841	ROM_LOAD32_WORD( "004-pr04a.84", 0x0800002, 0x400000, CRC(9258312b) SHA1(fabac42c8a033e85d503be56f266f9386adff10b) )
	1842
	1843	/* Scroll Characters 8x8x8 / 16x16x8 */
	1844	ROM_REGION( 0x1000000, "scrtile", ROMREGION_DISPOSE )
	1845	ROM_LOAD16_BYTE( "004-sc01a.41", 0x0000000, 0x400000, CRC(0b52987e) SHA1(3c7b0ce9416dea8db4cf63431166fcfa7c3bb168) )
	1846	ROM_LOAD16_BYTE( "004-sc02a.42", 0x0000001, 0x400000, CRC(6b55309d) SHA1(87761deed6d842075bbe13abc444ac502274eeba) )
	1847	ROM_LOAD16_BYTE( "004-sc03a.43", 0x0800000, 0x400000, CRC(17302f01) SHA1(5b6a927c520e421aa31b9162d3e47b06069b4bd0) )
	1848	ROM_LOAD16_BYTE( "004-sc04a.44", 0x0800001, 0x400000, CRC(db31d73c) SHA1(8a6847e367e87a081cd1499294935c45f1fb4794) )
	1849
	1850	/* Sprite Characters - 8x8x8 / 16x16x8 */
	1851	ROM_REGION( 0x2000000, "sprtile", ROMREGION_DISPOSE )
	1852	ROM_LOAD32_BYTE( "004-sp01a.53",0x0000000, 0x400000, CRC(72fe73c3) SHA1(82825705076c40558d414653386e3bf1d0693008) )
	1853	ROM_LOAD32_BYTE( "004-sp02a.54",0x0000001, 0x400000, CRC(1ece1cff) SHA1(78d88e96df979a834b5af091d3feda8b9cd466e0) )
	1854	ROM_LOAD32_BYTE( "004-sp03a.55",0x0000002, 0x400000, CRC(9049ab14) SHA1(0a19ccbd82f000eba19a0b407fa5765db0464cca) )
	1855	ROM_LOAD32_BYTE( "004-sp04a.56",0x0000003, 0x400000, CRC(8f7fb914) SHA1(dd1709881bf1d9e233b4e794c0e2ce28d265f855) )
	1856	ROM_LOAD32_BYTE( "004-sp05a.57",0x1000000, 0x400000, CRC(440ce760) SHA1(f6f256334c32fe7d25448fba73f8966c4c5b1cba) )
	1857	ROM_LOAD32_BYTE( "004-sp06a.58",0x1000001, 0x400000, CRC(fc24d2e5) SHA1(073dcb21ec6cf9c6a81987a54c0e27a2db499341) )
	1858	ROM_LOAD32_BYTE( "004-sp07a.59",0x1000002, 0x400000, CRC(bc580b81) SHA1(c668d0524fdc53c6ba2f3e5120f2dee7ce4279bb) )
	1859	ROM_LOAD32_BYTE( "004-sp08a.60",0x1000003, 0x400000, CRC(d6c69bea) SHA1(24508c0ed0ca135316aec1c8239e8b755070384a) )
	1860
	1861	/* Textures - 1024x1024x8 pages */
	1862	ROM_REGION( 0x1000000, "textures", 0 )
	1863	/* note: same roms are at different positions on the board, repeated a total of 4 times*/
	1864	ROM_LOAD( "004-tx01a.13", 0x0000000, 0x400000, CRC(12a78a20) SHA1(a5c1c8841cd0cb5efbf7408d908fa10a743e5c6f) )
	1865	ROM_LOAD( "004-tx02a.14", 0x0400000, 0x400000, CRC(a36c6c34) SHA1(3e4ad293b064a7c05aa23447ff5f17010cae2863) )
	1866	ROM_LOAD( "004-tx03a.15", 0x0800000, 0x400000, CRC(f46377c0) SHA1(bfa6fc3ab89599a4443577d18578569ad55774bd) )
	1867	ROM_LOAD( "004-tx04a.16", 0x0c00000, 0x400000, CRC(b5f0ef01) SHA1(646bfb17b9e81aecf8db33d3a021f7769b262eda) )
	1868
	1869	/* X,Y,Z Vertex ROMs */
	1870	ROM_REGION( 0x1800000, "verts", ROMREGION_NODISPOSE )
	1871	ROMX_LOAD( "004-vt01a.17", 0x0000000, 0x400000, CRC(25ebbf9b) SHA1(b7c3fb9ee9cf75824d908e7a94970282f1845d5d), ROM_GROUPWORD | ROM_SKIP(4) )
	1872	ROMX_LOAD( "004-vt02a.18", 0x0000002, 0x400000, CRC(279fc216) SHA1(eb90cc347745491c1d1b1fb611fd6e227310731c), ROM_GROUPWORD | ROM_SKIP(4) )
	1873	ROMX_LOAD( "004-vt03a.19", 0x0000004, 0x400000, CRC(e0cf6a42) SHA1(dd09b3d05739cf030c820cd7dbaea2e7262764ab), ROM_GROUPWORD | ROM_SKIP(4) )
	1874
	1875	ROM_REGION( 0x1000000, "samples", ROMREGION_DISPOSE ) /* Sound Samples? */
	1876	ROM_LOAD( "004-sd01a.77", 0x0000000, 0x400000, CRC(2ef868bd) SHA1(0a1ef002efe6738698ebe98a1c3695b151fdd282) )
	1877	ROM_LOAD( "004-sd02a.78", 0x0400000, 0x400000, CRC(07fb3135) SHA1(56cc8e29ba9b13f82a4c9248bff02e2b7a0c49b0) )
	1878	ROM_LOAD( "004-sd03a.79", 0x0800000, 0x400000, CRC(42571f1d) SHA1(425cbd3f7c8aea1c0f057ea8f186acffb0091dc0) )
	1879	ROM_END
	1880
	1881
	1882	ROM_START( sams64_2 )
	1883	/* BIOS */
	1884	ROM_REGION32_BE( 0x0100000, "user1", 0 ) /* 512k for R4300 BIOS code */
	1885	ROM_LOAD ( "brom1.bin", 0x000000, 0x080000,  CRC(a30dd3de) SHA1(3e2fd0a56214e6f5dcb93687e409af13d065ea30) )
	1886	ROM_REGION( 0x0100000, "user2", 0 ) /* KL5C80 BIOS and unknown ROM */
	1887	ROM_LOAD ( "from1.bin", 0x000000, 0x080000,  CRC(6b933005) SHA1(e992747f46c48b66e5509fe0adf19c91250b00c7) )
	1888	ROM_LOAD ( "rom1.bin",  0x080000, 0x01ff32,  CRC(4a6832dc) SHA1(ae504f7733c2f40450157cd1d3b85bc83fac8569) )
	1889	/* END BIOS */
	1890
	1891	ROM_REGION32_LE( 0x2000000, "user3", 0 )
1624	1892	ROM_LOAD32_WORD( "005pr01a.81", 0x0000000, 0x400000, CRC(a69d7700) SHA1(a580783a109bc3e24248d70bcd67f62dd7d8a5dd) )
1625	1893	ROM_LOAD32_WORD( "005pr02a.82", 0x0000002, 0x400000, CRC(38b9e6b3) SHA1(d1dad8247d920cc66854a0096e1c7845842d2e1c) )
1626	1894	ROM_LOAD32_WORD( "005pr03a.83", 0x0800000, 0x400000, CRC(0bc738a8) SHA1(79893b0e1c4a31e02ab385c4382684245975ae8f) )
r4679	r4680
1631	1899	ROM_LOAD32_WORD( "005pr08a.88", 0x1800002, 0x400000, CRC(d094eb67) SHA1(3edc8d608c631a05223e1d05157cd3daf2d6597a) )
1632	1900
1633	1901	/* Scroll Characters 8x8x8 / 16x16x8 */
1634		ROM_REGION( 0x4000000, "gfx1", ROMREGION_DISPOSE )
1635		ROM_LOAD32_BYTE( "005sc01a.97",  0x0000000, 0x800000, CRC(7f11cda9) SHA1(5fbdabd8423e9723a6ec38f8503e6ca7f4f69fdd) )
1636		ROM_LOAD32_BYTE( "005sc02a.99",  0x0000001, 0x800000, CRC(87d1e1a7) SHA1(00f2ef46ce64ab715add8cd47745c57944286f81) )
1637		ROM_LOAD32_BYTE( "005sc03a.101", 0x0000002, 0x800000, CRC(a5d4c535) SHA1(089a3cd07701f025024ce73b7b4d38063c33a59f) )
1638		ROM_LOAD32_BYTE( "005sc04a.103", 0x0000003, 0x800000, CRC(14930d77) SHA1(b4c613a8896e21fe2cac0595dd1ea30dc7fce0bd) )
1639		ROM_LOAD32_BYTE( "005sc05a.98",  0x2000000, 0x800000, CRC(4475a3f8) SHA1(f099baf766ee00d166cfa8402baa0b6ea25a0010) )
1640		ROM_LOAD32_BYTE( "005sc06a.100", 0x2000001, 0x800000, CRC(41c0fbbd) SHA1(1d9ac01c9499a6202ee59d15d498ec34edc05888) )
1641		ROM_LOAD32_BYTE( "005sc07a.102", 0x2000002, 0x800000, CRC(3505b198) SHA1(2fdfdd5a1f6f31f5fb1c0af70047108d1df44af2) )
1642		ROM_LOAD32_BYTE( "005sc08a.104", 0x2000003, 0x800000, CRC(3139e413) SHA1(38210541379ddeba8c0b9ef8fa5430c0090db7c7) )
	1902	ROM_REGION( 0x4000000, "scrtile", ROMREGION_DISPOSE )
	1903	ROM_LOAD16_BYTE( "005sc01a.97",  0x0000000, 0x800000, CRC(7f11cda9) SHA1(5fbdabd8423e9723a6ec38f8503e6ca7f4f69fdd) )
	1904	ROM_LOAD16_BYTE( "005sc02a.99",  0x0000001, 0x800000, CRC(87d1e1a7) SHA1(00f2ef46ce64ab715add8cd47745c57944286f81) )
	1905	ROM_LOAD16_BYTE( "005sc05a.98",  0x1000000, 0x800000, CRC(4475a3f8) SHA1(f099baf766ee00d166cfa8402baa0b6ea25a0010) )
	1906	ROM_LOAD16_BYTE( "005sc06a.100", 0x1000001, 0x800000, CRC(41c0fbbd) SHA1(1d9ac01c9499a6202ee59d15d498ec34edc05888) )
	1907	ROM_LOAD16_BYTE( "005sc03a.101", 0x2000000, 0x800000, CRC(a5d4c535) SHA1(089a3cd07701f025024ce73b7b4d38063c33a59f) )
	1908	ROM_LOAD16_BYTE( "005sc04a.103", 0x2000001, 0x800000, CRC(14930d77) SHA1(b4c613a8896e21fe2cac0595dd1ea30dc7fce0bd) )
	1909	ROM_LOAD16_BYTE( "005sc07a.102", 0x3000000, 0x800000, CRC(3505b198) SHA1(2fdfdd5a1f6f31f5fb1c0af70047108d1df44af2) )
	1910	ROM_LOAD16_BYTE( "005sc08a.104", 0x3000001, 0x800000, CRC(3139e413) SHA1(38210541379ddeba8c0b9ef8fa5430c0090db7c7) )
1643	1911
1644	1912	/* Sprite Characters - 8x8x8 / 16x16x8 */
1645		ROM_REGION( 0x4000000, "gfx2", ROMREGION_DISPOSE )
	1913	ROM_REGION( 0x4000000, "sprtile", ROMREGION_DISPOSE )
1646	1914	ROM_LOAD32_BYTE( "005sp01a.105",0x0000000, 0x800000, CRC(68eefee5) SHA1(d95bd7b549900500633af07544423b0062ac07ce) )
1647	1915	ROM_LOAD32_BYTE( "005sp02a.109",0x0000001, 0x800000, CRC(5d9a49b9) SHA1(50768c496a3e0b4379e121349f32edec4f18652f) )
1648	1916	ROM_LOAD32_BYTE( "005sp03a.113",0x0000002, 0x800000, CRC(9b6530fe) SHA1(398433b98578a6b4b950afc4d6318916376e0760) )
r4679	r4680
1653	1921	ROM_LOAD32_BYTE( "005sp08a.118",0x2000003, 0x400000, CRC(05486fbc) SHA1(747d9ae03ce999be4ab697753e93c90ea85b7d44) )
1654	1922
1655	1923	/* Textures - 1024x1024x8 pages */
1656		ROM_REGION( 0x1000000, "gfx3", 0 )
	1924	ROM_REGION( 0x1000000, "textures", 0 )
1657	1925	/* note: same roms are at different positions on the board, repeated a total of 4 times*/
1658	1926	ROM_LOAD( "005tx01a.1", 0x0000000, 0x400000, CRC(05a4ceb7) SHA1(2dfc46a70c0a957ed0931a4c4df90c341aafff70) )
1659	1927	ROM_LOAD( "005tx02a.2", 0x0400000, 0x400000, CRC(b7094c69) SHA1(aed9a624166f6f1a2eb4e746c61f9f46f1929283) )
r4679	r4680
1673	1941	ROM_LOAD( "005tx04a.16",0x0c00000, 0x400000, CRC(6be50882) SHA1(1f99717cfa69076b258a0c52d66be007fd820374) )
1674	1942
1675	1943	/* X,Y,Z Vertex ROMs */
1676		ROM_REGION( 0x1800000, "gfx4", ROMREGION_NODISPOSE )
	1944	ROM_REGION( 0x1800000, "verts", ROMREGION_NODISPOSE )
1677	1945	ROMX_LOAD( "005vt01a.17", 0x0000000, 0x400000, CRC(48a61479) SHA1(ef982b1ecc6dfca2ad989391afcc1b3d1e7fe652), ROM_GROUPWORD | ROM_SKIP(4) )
1678	1946	ROMX_LOAD( "005vt02a.18", 0x0000002, 0x400000, CRC(ba9100c8) SHA1(f7704fb8e5310ea7d0e6ae6b8935717ec9119b6d), ROM_GROUPWORD | ROM_SKIP(4) )
1679	1947	ROMX_LOAD( "005vt03a.19", 0x0000004, 0x400000, CRC(f54a28de) SHA1(c445cf7fee71a516065cf37e05b898208f48b17e), ROM_GROUPWORD | ROM_SKIP(4) )
r4679	r4680
1699	1967	ROM_LOAD ( "rom1.bin",  0x080000, 0x01ff32,  CRC(4a6832dc) SHA1(ae504f7733c2f40450157cd1d3b85bc83fac8569) )
1700	1968	/* END BIOS */
1701	1969
1702		ROM_REGION32_LE( 0x2000000, "user3", 0 ) /* Program Code, mapped at ??? maybe banked?  LE? */
	1970	ROM_REGION32_LE( 0x2000000, "user3", 0 )
1703	1971	ROM_LOAD32_WORD( "006pr01a.81", 0x0000000, 0x400000, CRC(3830efa1) SHA1(9d8c941ccb6cbe8d138499cf9d335db4ac7a9ec0) )
1704	1972	ROM_LOAD32_WORD( "006pr02a.82", 0x0000002, 0x400000, CRC(8d5de84e) SHA1(e3ae014263f370c2836f62ab323f1560cb3a9cf0) )
1705	1973	ROM_LOAD32_WORD( "006pr03a.83", 0x0800000, 0x400000, CRC(c811b458) SHA1(7d94e0df501fb086b2e5cf08905d7a3adc2c6472) )
1706	1974	ROM_LOAD32_WORD( "006pr04a.84", 0x0800002, 0x400000, CRC(de708d6c) SHA1(2c9848e7bbf61c574370f9ecab5f5a6ba63339fd) )
1707	1975
1708	1976	/* Scroll Characters 8x8x8 / 16x16x8 */
1709		ROM_REGION( 0x4000000, "gfx1", ROMREGION_DISPOSE )
1710		ROM_LOAD32_BYTE( "006sc01a.97", 0x0000000, 0x800000, CRC(f13dffad) SHA1(86363aeae176fd4204e446c13a028da919dc2069) )
1711		ROM_LOAD32_BYTE( "006sc02a.99", 0x0000001, 0x800000, CRC(be79d42a) SHA1(f3eb950a62e2df1de116af9434027439f1305e1f) )
1712		ROM_LOAD32_BYTE( "006sc03a.101",0x0000002, 0x800000, CRC(16918b73) SHA1(ad0c751a301fe3c95fca19473869dfd55fb6b0de) )
1713		ROM_LOAD32_BYTE( "006sc04a.103",0x0000003, 0x800000, CRC(9b63cd98) SHA1(62519a3a531c4493a5a85dc01ca69413977120ca) )
1714		ROM_LOAD32_BYTE( "006sc05a.98", 0x2000000, 0x800000, CRC(0487297b) SHA1(d3fa4d691559327739c96717312faf09b498001d) )
1715		ROM_LOAD32_BYTE( "006sc06a.100",0x2000001, 0x800000, CRC(34a76c31) SHA1(be05dc75afb7cde65ba5d29c0e66a7b1b62c41cb) )
1716		ROM_LOAD32_BYTE( "006sc07a.102",0x2000002, 0x800000, CRC(7a1c371e) SHA1(1cd4ad66dd007adc9ab0c29720cbf9955c7337e0) )
1717		ROM_LOAD32_BYTE( "006sc08a.104",0x2000003, 0x800000, CRC(88232ade) SHA1(4ae2a572c3525087f77c95185e8697a1fc720512) )
	1977	ROM_REGION( 0x4000000, "scrtile", ROMREGION_DISPOSE )
	1978	ROM_LOAD16_BYTE( "006sc01a.97", 0x0000000, 0x800000, CRC(f13dffad) SHA1(86363aeae176fd4204e446c13a028da919dc2069) )
	1979	ROM_LOAD16_BYTE( "006sc02a.99", 0x0000001, 0x800000, CRC(be79d42a) SHA1(f3eb950a62e2df1de116af9434027439f1305e1f) )
	1980	ROM_LOAD16_BYTE( "006sc05a.98", 0x1000000, 0x800000, CRC(0487297b) SHA1(d3fa4d691559327739c96717312faf09b498001d) )
	1981	ROM_LOAD16_BYTE( "006sc06a.100",0x1000001, 0x800000, CRC(34a76c31) SHA1(be05dc75afb7cde65ba5d29c0e66a7b1b62c41cb) )
	1982	ROM_LOAD16_BYTE( "006sc03a.101",0x2000000, 0x800000, CRC(16918b73) SHA1(ad0c751a301fe3c95fca19473869dfd55fb6b0de) )
	1983	ROM_LOAD16_BYTE( "006sc04a.103",0x2000001, 0x800000, CRC(9b63cd98) SHA1(62519a3a531c4493a5a85dc01ca69413977120ca) )
	1984	ROM_LOAD16_BYTE( "006sc07a.102",0x3000000, 0x800000, CRC(7a1c371e) SHA1(1cd4ad66dd007adc9ab0c29720cbf9955c7337e0) )
	1985	ROM_LOAD16_BYTE( "006sc08a.104",0x3000001, 0x800000, CRC(88232ade) SHA1(4ae2a572c3525087f77c95185e8697a1fc720512) )
1718	1986
1719	1987	/* Sprite Characters - 8x8x8 / 16x16x8 */
1720		ROM_REGION( 0x4000000, "gfx2", ROMREGION_DISPOSE )
	1988	ROM_REGION( 0x4000000, "sprtile", ROMREGION_DISPOSE )
1721	1989	ROM_LOAD32_BYTE( "006sp01a.105",0x0000000, 0x800000, CRC(087b8c49) SHA1(bb1eb2baef7da91f904bf45414f21dd6bac30749) )
1722	1990	ROM_LOAD32_BYTE( "006sp02a.109",0x0000001, 0x800000, CRC(da28631e) SHA1(ea7e2d9195cfa4f954f4d542296eec1323223653) )
1723	1991	ROM_LOAD32_BYTE( "006sp03a.113",0x0000002, 0x800000, CRC(bb87b55b) SHA1(8644ebb356ae158244a6e03254b0212cb359e167) )
r4679	r4680
1728	1996	ROM_LOAD32_BYTE( "006sp08a.118",0x2000003, 0x800000, CRC(9c3044ac) SHA1(24b28bcc6be51ab3ff59c2894094cd03ec377d84) )
1729	1997
1730	1998	/* Textures - 1024x1024x8 pages */
1731		ROM_REGION( 0x1000000, "gfx3", 0 )
	1999	ROM_REGION( 0x1000000, "textures", 0 )
1732	2000	/* note: same roms are at different positions on the board, repeated a total of 4 times*/
1733	2001	ROM_LOAD( "006tx01a.1", 0x0000000, 0x400000, CRC(ab4c1747) SHA1(2c097bd38f1a92c4b6534992f6bf29fd6dc2d265) )
1734	2002	ROM_LOAD( "006tx02a.2", 0x0400000, 0x400000, CRC(7854a229) SHA1(dba23c1b793dd0308ac1088c819543fff334a57e) )
r4679	r4680
1748	2016	ROM_LOAD( "006tx04a.16",0x0c00000, 0x400000, CRC(82d61652) SHA1(28303ae9e2545a4cb0b5843f9e73407754f41e9e) )
1749	2017
1750	2018	/* X,Y,Z Vertex ROMs */
1751		ROM_REGION16_BE( 0x0c00000, "gfx4", ROMREGION_NODISPOSE )
	2019	ROM_REGION16_BE( 0x0c00000, "verts", ROMREGION_NODISPOSE )
1752	2020	ROMX_LOAD( "006vt01a.17", 0x0000000, 0x400000, CRC(5c20ed4c) SHA1(df679f518292d70b9f23d2bddabf975d56b96910), ROM_GROUPWORD | ROM_SKIP(4) )
1753	2021	ROMX_LOAD( "006vt02a.18", 0x0000002, 0x400000, CRC(150eb717) SHA1(9acb067346eb386256047c0f1d24dc8fcc2118ca), ROM_GROUPWORD | ROM_SKIP(4) )
1754	2022	ROMX_LOAD( "006vt03a.19", 0x0000004, 0x400000, CRC(021cfcaf) SHA1(fb8b5f50d3490b31f0a4c3e6d3ae1b98bae41c97), ROM_GROUPWORD | ROM_SKIP(4) )
r4679	r4680
1761	2029	ROM_END
1762	2030
1763	2031	ROM_START( buriki )
1764
1765	2032	/* BIOS */
1766	2033	ROM_REGION32_BE( 0x0100000, "user1", 0 ) /* 512k for R4300 BIOS code */
1767	2034	ROM_LOAD ( "brom1.bin", 0x000000, 0x080000,  CRC(a30dd3de) SHA1(3e2fd0a56214e6f5dcb93687e409af13d065ea30) )
r4679	r4680
1770	2037	ROM_LOAD ( "rom1.bin",  0x080000, 0x01ff32,  CRC(4a6832dc) SHA1(ae504f7733c2f40450157cd1d3b85bc83fac8569) )
1771	2038	/* END BIOS */
1772	2039
1773		ROM_REGION32_LE( 0x2000000, "user3", 0 ) /* Program Code, mapped at ??? maybe banked?  LE? */
	2040	ROM_REGION32_LE( 0x2000000, "user3", 0 )
1774	2041	ROM_LOAD32_WORD( "007pr01b.81", 0x0000000, 0x400000, CRC(a31202f5) SHA1(c657729b292d394ced021a0201a1c5608a7118ba) )
1775	2042	ROM_LOAD32_WORD( "007pr02b.82", 0x0000002, 0x400000, CRC(a563fed6) SHA1(9af9a021beb814e35df968abe5a99225a124b5eb) )
1776	2043	ROM_LOAD32_WORD( "007pr03a.83", 0x0800000, 0x400000, CRC(da5f6105) SHA1(5424cf5289cef66e301e968b4394e551918fe99b) )
r4679	r4680
1779	2046	ROM_LOAD32_WORD( "007pr06a.86", 0x1000002, 0x400000, CRC(0620fccc) SHA1(e0bffc56b019c79276a4ef5ec7354edda15b0889) )
1780	2047
1781	2048	/* Scroll Characters 8x8x8 / 16x16x8 */
1782		ROM_REGION( 0x4000000, "gfx1", ROMREGION_DISPOSE )
1783		ROM_LOAD32_BYTE( "007sc01a.97", 0x0000000, 0x800000, CRC(4e8300db) SHA1(f1c9e6fddc10efc8f2a530027cca062f48b8c8d4) )
1784		ROM_LOAD32_BYTE( "007sc02a.99", 0x0000001, 0x800000, CRC(d5855944) SHA1(019c0bd2f8de7ffddd53df6581b40940262f0053) )
1785		ROM_LOAD32_BYTE( "007sc03a.101",0x0000002, 0x800000, CRC(ff45c9b5) SHA1(ddcc2a10ccac62eb1f3671172ad1a4d163714fca) )
1786		ROM_LOAD32_BYTE( "007sc04a.103",0x0000003, 0x800000, CRC(e4cb59e9) SHA1(4e07ff374890217466a53d5bfb1fa99eb7402360) )
1787		ROM_LOAD32_BYTE( "007sc05a.98", 0x2000000, 0x400000, CRC(27f848c1) SHA1(2ee9cca4e68e56c7c17c8e2d7e0f55a34a5960bd) )
1788		ROM_LOAD32_BYTE( "007sc06a.100",0x2000001, 0x400000, CRC(c39e9b4c) SHA1(3c8a0494c2a6866ecc0df2c551619c57ee072440) )
1789		ROM_LOAD32_BYTE( "007sc07a.102",0x2000002, 0x400000, CRC(753e7e3d) SHA1(39b2e9fd23878d8fc4f98fe88b466e963d8fc959) )
1790		ROM_LOAD32_BYTE( "007sc08a.104",0x2000003, 0x400000, CRC(b605928e) SHA1(558042b84115273fa581606daafba0e9688fa002) )
	2049	ROM_REGION( 0x4000000, "scrtile", ROMREGION_DISPOSE )
	2050	ROM_LOAD16_BYTE( "007sc01a.97", 0x0000000, 0x800000, CRC(4e8300db) SHA1(f1c9e6fddc10efc8f2a530027cca062f48b8c8d4) )
	2051	ROM_LOAD16_BYTE( "007sc02a.99", 0x0000001, 0x800000, CRC(d5855944) SHA1(019c0bd2f8de7ffddd53df6581b40940262f0053) )
	2052	ROM_LOAD16_BYTE( "007sc05a.98", 0x1000000, 0x400000, CRC(27f848c1) SHA1(2ee9cca4e68e56c7c17c8e2d7e0f55a34a5960bd) )
	2053	ROM_LOAD16_BYTE( "007sc06a.100",0x1000001, 0x400000, CRC(c39e9b4c) SHA1(3c8a0494c2a6866ecc0df2c551619c57ee072440) )
	2054	ROM_LOAD16_BYTE( "007sc03a.101",0x2000000, 0x800000, CRC(ff45c9b5) SHA1(ddcc2a10ccac62eb1f3671172ad1a4d163714fca) )
	2055	ROM_LOAD16_BYTE( "007sc04a.103",0x2000001, 0x800000, CRC(e4cb59e9) SHA1(4e07ff374890217466a53d5bfb1fa99eb7402360) )
	2056	ROM_LOAD16_BYTE( "007sc07a.102",0x3000000, 0x400000, CRC(753e7e3d) SHA1(39b2e9fd23878d8fc4f98fe88b466e963d8fc959) )
	2057	ROM_LOAD16_BYTE( "007sc08a.104",0x3000001, 0x400000, CRC(b605928e) SHA1(558042b84115273fa581606daafba0e9688fa002) )
1791	2058
1792	2059	/* Sprite Characters - 8x8x8 / 16x16x8 */
1793		ROM_REGION( 0x4000000, "gfx2", ROMREGION_DISPOSE )
	2060	ROM_REGION( 0x4000000, "sprtile", ROMREGION_DISPOSE )
1794	2061	ROM_LOAD32_BYTE( "007sp01a.105",0x0000000, 0x800000, CRC(160acae6) SHA1(37c15e1d2544ec6f3b61d06200345d6abdd28edf) )
1795	2062	ROM_LOAD32_BYTE( "007sp02a.109",0x0000001, 0x800000, CRC(1a55331d) SHA1(0b03d5c7312e01874365b31f1ff3d9766abd00f1) )
1796	2063	ROM_LOAD32_BYTE( "007sp03a.113",0x0000002, 0x800000, CRC(3f308444) SHA1(0acd52312c15a2ed3bacf60a2fd820cb09ebbb55) )
r4679	r4680
1801	2068	ROM_LOAD32_BYTE( "007sp08a.118",0x2000003, 0x400000, CRC(7a158c67) SHA1(d66f4920a513208d45b908a1934d9afb894debf1) )
1802	2069
1803	2070	/* Textures - 1024x1024x8 pages */
1804		ROM_REGION( 0x1000000, "gfx3", 0 )
	2071	ROM_REGION( 0x1000000, "textures", 0 )
1805	2072	/* note: same roms are at different positions on the board, repeated a total of 4 times*/
1806	2073	ROM_LOAD( "007tx01a.1", 0x0000000, 0x400000, CRC(a7774075) SHA1(4f3da9af131a7efb0f0a5180da57c19c65fffb82) )
1807	2074	ROM_LOAD( "007tx02a.2", 0x0400000, 0x400000, CRC(bc05d5fd) SHA1(84e3fafcebdeb1e2ffae80785949c973a14055d8) )
r4679	r4680
1821	2088	ROM_LOAD( "007tx04a.16",0x0c00000, 0x400000, CRC(02aa3f46) SHA1(1fca89c70586f8ebcdf669ecac121afa5cdf623f) )
1822	2089
1823	2090	/* X,Y,Z Vertex ROMs */
1824		ROM_REGION16_BE( 0x0c00000, "gfx4", ROMREGION_NODISPOSE )
	2091	ROM_REGION16_BE( 0x0c00000, "verts", ROMREGION_NODISPOSE )
1825	2092	ROMX_LOAD( "007vt01a.17", 0x0000000, 0x400000, CRC(f78a0376) SHA1(fde4ddd4bf326ae5f1ed10311c237b13b62e060c), ROM_GROUPWORD | ROM_SKIP(4) )
1826	2093	ROMX_LOAD( "007vt02a.18", 0x0000002, 0x400000, CRC(f365f608) SHA1(035fd9b829b7720c4aee6fdf204c080e6157994f), ROM_GROUPWORD | ROM_SKIP(4) )
1827	2094	ROMX_LOAD( "007vt03a.19", 0x0000004, 0x400000, CRC(ba05654d) SHA1(b7fe532732c0af7860c8eded3c5abd304d74e08e), ROM_GROUPWORD | ROM_SKIP(4) )
r4679	r4680
1838	2105
1839	2106	/* Games */
1840	2107	GAME( 1997, roadedge, hng64,  hng64, hng64, hng64_race, ROT0, "SNK", "Roads Edge / Round Trip (rev.B)",     GAME_NOT_WORKING|GAME_NO_SOUND )   /* 001 */
1841		/* Samurai Shodown 64           002 */
1842		/* Xtreme Rally / Offbeat Racer 003 */
1843		/* Beast Busters 2nd Nightmare  004 */
1844		GAME( 1998, sams64_2, hng64,  hng64, hng64, hng64_fght, ROT0, "SNK", "Samurai Shodown: Warrior's Rage",     GAME_NOT_WORKING|GAME_NO_SOUND )   /* 005 */
1845		GAME( 1998, fatfurwa, hng64,  hng64, hng64, hng64_fght, ROT0, "SNK", "Fatal Fury: Wild Ambition (rev.A)", GAME_NOT_WORKING|GAME_NO_SOUND )   /* 006 */
1846		GAME( 1999, buriki,   hng64,  hng64, hng64, hng64_fght, ROT0, "SNK", "Buriki One (rev.B)",              GAME_NOT_WORKING|GAME_NO_SOUND )   /* 007 */
	2108	GAME( 1998, sams64,   hng64,  hng64, hng64, ss64,       ROT0, "SNK", "Samurai Shodown 64 / Samurai Spirits 64",     GAME_NOT_WORKING|GAME_NO_SOUND )   /* 002 */
	2109	GAME( 1998, xrally,   hng64,  hng64, hng64, hng64_race, ROT0, "SNK", "Xtreme Rally / Off Beat Racer!",     GAME_NOT_WORKING|GAME_NO_SOUND )   /* 003 */
	2110	GAME( 1998, bbust2,   hng64,  hng64, hng64, hng64_shoot,ROT0, "SNK", "Beast Busters 2nd Nightmare",     GAME_NOT_WORKING|GAME_NO_SOUND )   /* 004 */
	2111	GAME( 1998, sams64_2, hng64,  hng64, hng64, ss64,       ROT0, "SNK", "Samurai Shodown: Warrior's Rage / Samurai Spirits 2: Asura Zanmaden",     GAME_NOT_WORKING|GAME_NO_SOUND )   /* 005 */
	2112	GAME( 1998, fatfurwa, hng64,  hng64, hng64, fatfurwa,   ROT0, "SNK", "Fatal Fury: Wild Ambition (rev.A)", GAME_NOT_WORKING|GAME_NO_SOUND )   /* 006 */
	2113	GAME( 1999, buriki,   hng64,  hng64, hng64, fatfurwa,   ROT0, "SNK", "Buriki One (rev.B)",              GAME_NOT_WORKING|GAME_NO_SOUND )   /* 007 */
1847	2114

src/mame/drivers/solomon.c

r4679	r4680
24	24
25	25	static WRITE8_HANDLER( solomon_sh_command_w )
26	26	{
27		soundlatch_w(space,offset,data);
28		cpu_set_input_line(space->machine->cpu[1],INPUT_LINE_NMI,PULSE_LINE);
	27	soundlatch_w(space, offset, data);
	28	cputag_set_input_line(space->machine, "audiocpu", INPUT_LINE_NMI, PULSE_LINE);
29	29	}
30	30
31	31	/* this is checked on the title screen and when you reach certain scores in the game
r4679	r4680
34	34
35	35	static READ8_HANDLER( solomon_0xe603_r )
36	36	{
37		if (cpu_get_pc(space->cpu)==0x161) // all the time .. return 0 to act as before  for coin / startup etc.
	37	if (cpu_get_pc(space->cpu) == 0x161) // all the time .. return 0 to act as before  for coin / startup etc.
38	38	{
39	39	return 0;
40	40	}
41		else if (cpu_get_pc(space->cpu)==0x4cf0) // stop it clearing the screen at certain scores
	41	else if (cpu_get_pc(space->cpu) == 0x4cf0) // stop it clearing the screen at certain scores
42	42	{
43	43	return (cpu_get_reg(space->cpu, Z80_BC) & 0x08);
44	44	}
45	45	else
46	46	{
47		mame_printf_debug("unhandled solomon_0xe603_r %04x\n",cpu_get_pc(space->cpu));
	47	mame_printf_debug("unhandled solomon_0xe603_r %04x\n", cpu_get_pc(space->cpu));
48	48	return 0;
49	49	}
50	50	}

src/mame/drivers/macrossp.c

r4679	r4680
354	354	if (ACCESSING_BITS_16_31)
355	355	{
356	356	//logerror("%08x write soundcmd %08x (%08x)\n",cpu_get_pc(space->cpu),data,mem_mask);
357		soundlatch_word_w(space,0,data >> 16,0xffff);
	357	soundlatch_word_w(space, 0, data >> 16, 0xffff);
358	358	sndpending = 1;
359		cpu_set_input_line(space->machine->cpu[1],2,HOLD_LINE);
	359	cputag_set_input_line(space->machine, "audiocpu", 2, HOLD_LINE);
360	360	/* spin for a while to let the sound CPU read the command */
361	361	cpu_spinuntil_time(space->cpu, ATTOTIME_IN_USEC(50));
362	362	}
r4679	r4680
366	366	{
367	367	//  logerror("%06x read soundcmd\n",cpu_get_pc(space->cpu));
368	368	sndpending = 0;
369		return soundlatch_word_r(space,offset,mem_mask);
	369	return soundlatch_word_r(space, offset, mem_mask);
370	370	}
371	371
372	372	static INT32 fade_effect,old_fade;
r4679	r4680
404	404
405	405	/*** MEMORY MAPS *************************************************************/
406	406
407		static ADDRESS_MAP_START( readmem, ADDRESS_SPACE_PROGRAM, 32 )
408		AM_RANGE(0x000000, 0x3fffff) AM_READ(SMH_ROM)
409
410		AM_RANGE(0x800000, 0x802fff) AM_READ(SMH_RAM)
411
412		AM_RANGE(0x900000, 0x903fff) AM_READ(SMH_RAM)
413		AM_RANGE(0x908000, 0x90bfff) AM_READ(SMH_RAM)
414		AM_RANGE(0x910000, 0x913fff) AM_READ(SMH_RAM)
415		AM_RANGE(0x918000, 0x91bfff) AM_READ(SMH_RAM)
416
417		AM_RANGE(0xa00000, 0xa03fff) AM_READ(SMH_RAM)
418
419		AM_RANGE(0xb00000, 0xb00003) AM_READ_PORT("INPUTS")
420		AM_RANGE(0xb00004, 0xb00007) AM_READ(macrossp_soundstatus_r)
421		AM_RANGE(0xb0000c, 0xb0000f) AM_READ_PORT("DSW")
422
423		AM_RANGE(0xf00000, 0xf1ffff) AM_READ(SMH_RAM)
424
425		//  AM_RANGE(0xfe0000, 0xfe0003) AM_READNOP
426		ADDRESS_MAP_END
427
428		static ADDRESS_MAP_START( writemem, ADDRESS_SPACE_PROGRAM, 32 )
429		AM_RANGE(0x000000, 0x3fffff) AM_WRITE(SMH_ROM)
430		AM_RANGE(0x800000, 0x802fff) AM_WRITE(SMH_RAM) AM_BASE(&macrossp_spriteram) AM_SIZE(&spriteram_size)
431
	407	static ADDRESS_MAP_START( macrossp_map, ADDRESS_SPACE_PROGRAM, 32 )
	408	AM_RANGE(0x000000, 0x3fffff) AM_ROM
	409	AM_RANGE(0x800000, 0x802fff) AM_RAM AM_BASE(&macrossp_spriteram) AM_SIZE(&spriteram_size)
432	410	/* SCR A Layer */
433		AM_RANGE(0x900000, 0x903fff) AM_WRITE(macrossp_scra_videoram_w) AM_BASE(&macrossp_scra_videoram)
434		AM_RANGE(0x904200, 0x9043ff) AM_WRITE(SMH_RAM) /* W/O? */
435		AM_RANGE(0x905000, 0x90500b) AM_WRITE(SMH_RAM) AM_BASE(&macrossp_scra_videoregs) /* W/O? */
	411	AM_RANGE(0x900000, 0x903fff) AM_RAM_WRITE(macrossp_scra_videoram_w) AM_BASE(&macrossp_scra_videoram)
	412	AM_RANGE(0x904200, 0x9043ff) AM_WRITEONLY /* W/O? */
	413	AM_RANGE(0x905000, 0x90500b) AM_WRITEONLY AM_BASE(&macrossp_scra_videoregs) /* W/O? */
436	414	/* SCR B Layer */
437		AM_RANGE(0x908000, 0x90bfff) AM_WRITE(macrossp_scrb_videoram_w) AM_BASE(&macrossp_scrb_videoram)
438		AM_RANGE(0x90c200, 0x90c3ff) AM_WRITE(SMH_RAM) /* W/O? */
439		AM_RANGE(0x90d000, 0x90d00b) AM_WRITE(SMH_RAM) AM_BASE(&macrossp_scrb_videoregs) /* W/O? */
	415	AM_RANGE(0x908000, 0x90bfff) AM_RAM_WRITE(macrossp_scrb_videoram_w) AM_BASE(&macrossp_scrb_videoram)
	416	AM_RANGE(0x90c200, 0x90c3ff) AM_WRITEONLY /* W/O? */
	417	AM_RANGE(0x90d000, 0x90d00b) AM_WRITEONLY AM_BASE(&macrossp_scrb_videoregs) /* W/O? */
440	418	/* SCR C Layer */
441		AM_RANGE(0x910000, 0x913fff) AM_WRITE(macrossp_scrc_videoram_w) AM_BASE(&macrossp_scrc_videoram)
442		AM_RANGE(0x914200, 0x9143ff) AM_WRITE(SMH_RAM) /* W/O? */
443		AM_RANGE(0x915000, 0x91500b) AM_WRITE(SMH_RAM) AM_BASE(&macrossp_scrc_videoregs) /* W/O? */
	419	AM_RANGE(0x910000, 0x913fff) AM_RAM_WRITE(macrossp_scrc_videoram_w) AM_BASE(&macrossp_scrc_videoram)
	420	AM_RANGE(0x914200, 0x9143ff) AM_WRITEONLY /* W/O? */
	421	AM_RANGE(0x915000, 0x91500b) AM_WRITEONLY AM_BASE(&macrossp_scrc_videoregs) /* W/O? */
444	422	/* Text Layer */
445		AM_RANGE(0x918000, 0x91bfff) AM_WRITE(macrossp_text_videoram_w) AM_BASE(&macrossp_text_videoram)
446		AM_RANGE(0x91c200, 0x91c3ff) AM_WRITE(SMH_RAM) /* W/O? */
447		AM_RANGE(0x91d000, 0x91d00b) AM_WRITE(SMH_RAM) AM_BASE(&macrossp_text_videoregs) /* W/O? */
	423	AM_RANGE(0x918000, 0x91bfff) AM_RAM_WRITE(macrossp_text_videoram_w) AM_BASE(&macrossp_text_videoram)
	424	AM_RANGE(0x91c200, 0x91c3ff) AM_WRITEONLY /* W/O? */
	425	AM_RANGE(0x91d000, 0x91d00b) AM_WRITEONLY AM_BASE(&macrossp_text_videoregs) /* W/O? */
448	426
449		AM_RANGE(0xa00000, 0xa03fff) AM_WRITE(paletteram32_macrossp_w) AM_BASE(&paletteram32)
	427	AM_RANGE(0xa00000, 0xa03fff) AM_RAM_WRITE(paletteram32_macrossp_w) AM_BASE(&paletteram32)
450	428
451		AM_RANGE(0xb00004, 0xb00007) AM_WRITENOP   // irq related?
	429	AM_RANGE(0xb00000, 0xb00003) AM_READ_PORT("INPUTS")
	430	AM_RANGE(0xb00004, 0xb00007) AM_READ(macrossp_soundstatus_r) AM_WRITENOP // irq related?
452	431	AM_RANGE(0xb00008, 0xb0000b) AM_WRITENOP   // irq related?
453		AM_RANGE(0xb0000c, 0xb0000f) AM_WRITENOP
	432	AM_RANGE(0xb0000c, 0xb0000f) AM_READ_PORT("DSW") AM_WRITENOP
454	433	AM_RANGE(0xb00010, 0xb00013) AM_WRITE(macrossp_palette_fade_w)   // macrossp palette fade
455	434	AM_RANGE(0xb00020, 0xb00023) AM_WRITENOP
456	435
457	436	AM_RANGE(0xc00000, 0xc00003) AM_WRITE(macrossp_soundcmd_w)
458	437
459		AM_RANGE(0xf00000, 0xf1ffff) AM_WRITE(SMH_RAM) AM_BASE(&macrossp_mainram) /* Main Ram */
460
461		//  AM_RANGE(0xfe0000, 0xfe0003) AM_WRITENOP
	438	AM_RANGE(0xf00000, 0xf1ffff) AM_RAM AM_BASE(&macrossp_mainram) /* Main Ram */
	439	//  AM_RANGE(0xfe0000, 0xfe0003) AM_NOP
462	440	ADDRESS_MAP_END
463	441
464
465		static ADDRESS_MAP_START( sound_map, ADDRESS_SPACE_PROGRAM, 16 )
	442	static ADDRESS_MAP_START( macrossp_sound_map, ADDRESS_SPACE_PROGRAM, 16 )
466	443	AM_RANGE(0x000000, 0x0fffff) AM_ROM
467	444	AM_RANGE(0x200000, 0x207fff) AM_RAM
468	445	AM_RANGE(0x400000, 0x40007f) AM_DEVREADWRITE8("ensoniq", es5506_r, es5506_w, 0x00ff)
r4679	r4680
613	590
614	591	/* IRQ lines 1 & 4 on the sound 68000 are definitely triggered by the ES5506,
615	592	but I haven't noticed the ES5506 ever assert the line - maybe only used when developing the game? */
616		//  cpu_set_input_line(device->cpu[1],1,irq ? ASSERT_LINE : CLEAR_LINE);
	593	//  cputag_set_input_line(device, "audiocpu", 1, irq ? ASSERT_LINE : CLEAR_LINE);
617	594	}
618	595
619	596	static const es5506_interface es5506_config =
r4679	r4680
629	606	static MACHINE_DRIVER_START( macrossp )
630	607	/* basic machine hardware */
631	608	MDRV_CPU_ADD("maincpu", M68EC020, 50000000/2)   /* 25 MHz */
632		MDRV_CPU_PROGRAM_MAP(readmem,writemem)
	609	MDRV_CPU_PROGRAM_MAP(macrossp_map,0)
633	610	MDRV_CPU_VBLANK_INT("screen", irq3_line_hold) // there are others ...
634	611
635	612	MDRV_CPU_ADD("audiocpu", M68000, 32000000/2)   /* 16 MHz */
636		MDRV_CPU_PROGRAM_MAP(sound_map,0)
	613	MDRV_CPU_PROGRAM_MAP(macrossp_sound_map,0)
637	614
638	615	/* video hardware */
639	616	MDRV_SCREEN_ADD("screen", RASTER)
r4679	r4680
786	763
787	764	static DRIVER_INIT( macrossp )
788	765	{
789		memory_install_write32_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xf10158, 0xf1015b, 0, 0, macrossp_speedup_w );
	766	memory_install_write32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xf10158, 0xf1015b, 0, 0, macrossp_speedup_w );
790	767	}
791	768
792	769	static DRIVER_INIT( quizmoon )
793	770	{
794	771	#ifdef UNUSED_FUNCTION
795		memory_install_write32_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xf00020, 0xf00023, 0, 0, quizmoon_speedup_w );
	772	memory_install_write32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xf00020, 0xf00023, 0, 0, quizmoon_speedup_w );
796	773	#endif
797	774	}
798	775

src/mame/drivers/gladiatr.c

r4679	r4680
272	272	{
273	273	UINT8 *rom = memory_region(machine, "audiocpu") + 0x10000;
274	274	memory_set_bankptr(machine, 2,rom);
275		device_reset(machine->cpu[2]);
	275	device_reset(cputag_get_cpu(machine, "audiocpu"));
276	276	}
277	277	}
278	278
r4679	r4680
287	287	static void gladiator_ym_irq(const device_config *device, int irq)
288	288	{
289	289	/* NMI IRQ is not used by gladiator sound program */
290		cpu_set_input_line(device->machine->cpu[1], INPUT_LINE_NMI, irq ? ASSERT_LINE : CLEAR_LINE);
	290	cputag_set_input_line(device->machine, "sub", INPUT_LINE_NMI, irq ? ASSERT_LINE : CLEAR_LINE);
291	291	}
292	292
293	293	/*Sound Functions*/
r4679	r4680
306	306	static WRITE8_HANDLER( glad_cpu_sound_command_w )
307	307	{
308	308	soundlatch_w(space,0,data);
309		cpu_set_input_line(space->machine->cpu[2], INPUT_LINE_NMI, ASSERT_LINE);
	309	cputag_set_input_line(space->machine, "audiocpu", INPUT_LINE_NMI, ASSERT_LINE);
310	310	}
311	311
312	312	static READ8_HANDLER( glad_cpu_sound_command_r )
313	313	{
314		cpu_set_input_line(space->machine->cpu[2], INPUT_LINE_NMI, CLEAR_LINE);
	314	cputag_set_input_line(space->machine, "audiocpu", INPUT_LINE_NMI, CLEAR_LINE);
315	315	return soundlatch_r(space,0);
316	316	}
317	317
r4679	r4680
325	325	/* !!!!! patch to IRQ timming for 2nd CPU !!!!! */
326	326	static WRITE8_HANDLER( gladiatr_irq_patch_w )
327	327	{
328		cpu_set_input_line(space->machine->cpu[1],0,HOLD_LINE);
	328	cputag_set_input_line(space->machine, "audiocpu", 0, HOLD_LINE);
329	329	}
330	330	#endif
331	331
r4679	r4680
1047	1047	}
1048	1048	}
1049	1049
1050		memory_install_read8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xf6a3,0xf6a3,0,0, f6a3_r );
	1050	memory_install_read8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xf6a3,0xf6a3,0,0, f6a3_r );
1051	1051	}
1052	1052
1053	1053

src/mame/drivers/imolagp.c

r4679	r4680
113	113	}
114	114	static READ8_HANDLER( trigger_slave_nmi_r )
115	115	{
116		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_NMI, PULSE_LINE);
	116	cputag_set_input_line(space->machine, "slave", INPUT_LINE_NMI, PULSE_LINE);
117	117	return 0;
118	118	}
119	119
r4679	r4680
164	164	int i;
165	165	for( i=0; i<3; i++ )
166	166	{
167		imola_videoram[i] = auto_malloc(0x4000);
	167	imola_videoram[i] = auto_alloc_array(machine, UINT8, 0x4000);
168	168	memset( imola_videoram[i], 0x00, 0x4000 );
169	169	}
170	170	InitializeColors(machine);

src/mame/drivers/puckpkmn.c

r4679	r4680
44	44
45	45	#include "driver.h"
46	46	#include "cpu/m68000/m68000.h"
	47	#include "sound/okim6295.h"
	48	#include "sound/sn76496.h"
	49	#include "sound/2612intf.h"
	50
47	51	#include "genesis.h"
48	52
49	53	#define MASTER_CLOCK      53693100
r4679	r4680
126	130	INPUT_PORTS_END
127	131
128	132
129		static ADDRESS_MAP_START( puckpkmn_readmem, ADDRESS_SPACE_PROGRAM, 16 )
130		AM_RANGE(0x000000, 0x1fffff) AM_READ(SMH_ROM)               /* Main 68k Program Roms */
	133	static ADDRESS_MAP_START( puckpkmn_map, ADDRESS_SPACE_PROGRAM, 16 )
	134	AM_RANGE(0x000000, 0x1fffff) AM_ROM                                       /* Main 68k Program Roms */
131	135	AM_RANGE(0x700010, 0x700011) AM_READ_PORT("P2")
132	136	AM_RANGE(0x700012, 0x700013) AM_READ_PORT("P1")
133	137	AM_RANGE(0x700014, 0x700015) AM_READ_PORT("UNK")
134	138	AM_RANGE(0x700016, 0x700017) AM_READ_PORT("DSW1")
135	139	AM_RANGE(0x700018, 0x700019) AM_READ_PORT("DSW2")
136		AM_RANGE(0x700022, 0x700023) AM_DEVREAD8("oki", okim6295_r, 0x00ff)   /* M6295 Sound Chip Status Register */
137		AM_RANGE(0xa04000, 0xa04003) AM_DEVREAD8("ym", ym3438_r, 0xffff)         /* Ym3438 Sound Chip Status Register */
138		AM_RANGE(0xc00000, 0xc0001f) AM_READ(genesis_vdp_r)            /* VDP Access */
139		AM_RANGE(0xe00000, 0xe1ffff) AM_READ(SMH_BANK1)               /* VDP sees the roms here */
140		AM_RANGE(0xfe0000, 0xfeffff) AM_READ(SMH_BANK2)               /* VDP sees the ram here */
141		AM_RANGE(0xff0000, 0xffffff) AM_READ(SMH_RAM)               /* Main Ram */
	140	AM_RANGE(0x700022, 0x700023) AM_DEVREADWRITE8("oki", okim6295_r,okim6295_w, 0x00ff)   /* M6295 Sound Chip Status Register/Writes */
	141	AM_RANGE(0xa04000, 0xa04003) AM_DEVREADWRITE8("ym", ym3438_r,ym3438_w, 0xffff)      /* Ym3438 Sound Chip Status Register */
	142	AM_RANGE(0xc00000, 0xc0001f) AM_READWRITE(genesis_vdp_r,genesis_vdp_w)            /* VDP Access */
	143	AM_RANGE(0xe00000, 0xe1ffff) AM_ROMBANK(1)                                 /* VDP sees the roms here */
	144	AM_RANGE(0xfe0000, 0xfeffff) AM_RAMBANK(2)                                 /* VDP sees the ram here */
	145	AM_RANGE(0xff0000, 0xffffff) AM_RAM AM_BASE(&main_ram)                        /* Main Ram */
142	146
143		/* Unknown reads: */
144		//  AM_RANGE(0xa10000, 0xa10001) AM_READNOP                   /* ? once */
145		AM_RANGE(0xa10002, 0xa10005) AM_READNOP               /* ? alternative way of reading inputs ? */
146		AM_RANGE(0xa11100, 0xa11101) AM_READNOP               /* ? */
	147	/* Unknown reads/writes: */
	148	AM_RANGE(0xa00000, 0xa00551) AM_WRITENOP                                 /* ? */
	149	//  AM_RANGE(0xa10000, 0xa10001) AM_READNOP                                             /* ? once */
	150	AM_RANGE(0xa10002, 0xa10005) AM_NOP                                       /* ? alternative way of reading inputs ? */
	151	AM_RANGE(0xa11100, 0xa11101) AM_NOP                                       /* ? */
	152	//  AM_RANGE(0xa10008, 0xa1000d) AM_WRITENOP                                            /* ? once */
	153	//  AM_RANGE(0xa14000, 0xa14003) AM_WRITENOP                                            /* ? once */
	154	AM_RANGE(0xa11200, 0xa11201) AM_WRITENOP                                 /* ? */
147	155	ADDRESS_MAP_END
148	156
149		static ADDRESS_MAP_START( puckpkmn_writemem, ADDRESS_SPACE_PROGRAM, 16 )
150		AM_RANGE(0x000000, 0x1fffff) AM_WRITE(SMH_ROM)               /* Main 68k Program Roms */
151		AM_RANGE(0x700022, 0x700023) AM_DEVWRITE8("oki", okim6295_w, 0x00ff)      /* M6295 Sound Chip Writes */
152		AM_RANGE(0xa04000, 0xa04003) AM_DEVWRITE8("ym", ym3438_w, 0xffff)         /* Ym3438 Sound Chip Writes */
153		AM_RANGE(0xc00000, 0xc0001f) AM_WRITE(genesis_vdp_w)            /* VDP Access */
154		AM_RANGE(0xff0000, 0xffffff) AM_WRITE(SMH_RAM) AM_BASE(&main_ram)      /* Main Ram */
155	157
156		/* Unknown writes: */
157		AM_RANGE(0xa00000, 0xa00551) AM_WRITE(SMH_RAM)               /* ? */
158		AM_RANGE(0xa10002, 0xa10005) AM_WRITENOP               /* ? alternative way of reading inputs ? */
159		//  AM_RANGE(0xa10008, 0xa1000d) AM_WRITENOP                    /* ? once */
160		//  AM_RANGE(0xa14000, 0xa14003) AM_WRITENOP                    /* ? once */
161		AM_RANGE(0xa11100, 0xa11101) AM_WRITENOP               /* ? */
162		AM_RANGE(0xa11200, 0xa11201) AM_WRITENOP               /* ? */
163		ADDRESS_MAP_END
164
165
166	158	static const ym3438_interface ym3438_intf =
167	159	{
168	160	genesis_irq2_interrupt      /* IRQ handler */
r4679	r4680
172	164
173	165	/* basic machine hardware */
174	166	MDRV_CPU_ADD("maincpu",M68000, MASTER_CLOCK/7)       /*???*/
175		MDRV_CPU_PROGRAM_MAP(puckpkmn_readmem,puckpkmn_writemem)
	167	MDRV_CPU_PROGRAM_MAP(puckpkmn_map,0)
176	168	MDRV_CPU_VBLANK_INT("screen", genesis_vblank_interrupt)
177	169
178	170	MDRV_MACHINE_START(genesis)

src/mame/drivers/moo.c

r4679	r4680
169	169	static TIMER_CALLBACK( dmaend_callback )
170	170	{
171	171	if (cur_control2 & 0x800)
172		cpu_set_input_line(machine->cpu[0], 4, HOLD_LINE);
	172	cputag_set_input_line(machine, "maincpu", 4, HOLD_LINE);
173	173	}
174	174
175	175	static INTERRUPT_GEN(moo_interrupt)
r4679	r4680
215	215
216	216	static WRITE16_HANDLER( sound_irq_w )
217	217	{
218		cpu_set_input_line(space->machine->cpu[1], 0, HOLD_LINE);
	218	cputag_set_input_line(space->machine, "soundcpu", 0, HOLD_LINE);
219	219	}
220	220
221	221	static READ16_HANDLER( sound_status_r )
r4679	r4680
225	225
226	226	static WRITE8_HANDLER( sound_bankswitch_w )
227	227	{
228		memory_set_bankptr(space->machine, 2, memory_region(space->machine, "soundcpu") + 0x10000 + (data&0xf)*0x4000);
	228	memory_set_bankptr(space->machine, 1, memory_region(space->machine, "soundcpu") + 0x10000 + (data&0xf)*0x4000);
229	229	}
230	230
231	231
r4679	r4680
296	296	okim6295_set_bank_base(device, (data & 0x0f)* 0x40000);
297	297	}
298	298
299		static ADDRESS_MAP_START( readmem, ADDRESS_SPACE_PROGRAM, 16 )
300		AM_RANGE(0x000000, 0x07ffff) AM_READ(SMH_ROM)
	299	static ADDRESS_MAP_START( moo_map, ADDRESS_SPACE_PROGRAM, 16 )
	300	AM_RANGE(0x000000, 0x07ffff) AM_ROM
	301	AM_RANGE(0x0c0000, 0x0c003f) AM_WRITE(K056832_word_w)
	302	AM_RANGE(0x0c2000, 0x0c2007) AM_WRITE(K053246_word_w)
	303
301	304	AM_RANGE(0x0c4000, 0x0c4001) AM_READ(K053246_word_r)
	305	AM_RANGE(0x0ca000, 0x0ca01f) AM_WRITE(K054338_word_w)      /* K054338 alpha blending engine */
	306	AM_RANGE(0x0cc000, 0x0cc01f) AM_WRITE(K053251_lsb_w)
	307	AM_RANGE(0x0ce000, 0x0ce01f) AM_WRITE(moo_prot_w)
	308	AM_RANGE(0x0d0000, 0x0d001f) AM_WRITEONLY               /* CCU regs (ignored) */
	309	AM_RANGE(0x0d4000, 0x0d4001) AM_WRITE(sound_irq_w)
	310	AM_RANGE(0x0d600c, 0x0d600d) AM_WRITE(sound_cmd1_w)
	311	AM_RANGE(0x0d600e, 0x0d600f) AM_WRITE(sound_cmd2_w)
302	312	AM_RANGE(0x0d6014, 0x0d6015) AM_READ(sound_status_r)
303		AM_RANGE(0x0d6000, 0x0d601f) AM_READ(SMH_RAM)         /* sound regs fall through */
	313	AM_RANGE(0x0d6000, 0x0d601f) AM_RAM                     /* sound regs fall through */
	314	AM_RANGE(0x0d8000, 0x0d8007) AM_WRITE(K056832_b_word_w)      /* VSCCS regs */
304	315	AM_RANGE(0x0da000, 0x0da001) AM_READ_PORT("P1_P3")
305	316	AM_RANGE(0x0da002, 0x0da003) AM_READ_PORT("P2_P4")
306	317	AM_RANGE(0x0dc000, 0x0dc001) AM_READ_PORT("IN0")
307	318	AM_RANGE(0x0dc002, 0x0dc003) AM_READ(control1_r)
308		AM_RANGE(0x0de000, 0x0de001) AM_READ(control2_r)
309		AM_RANGE(0x100000, 0x17ffff) AM_READ(SMH_ROM)
310		AM_RANGE(0x180000, 0x18ffff) AM_READ(SMH_RAM)         /* Work RAM */
311		AM_RANGE(0x190000, 0x19ffff) AM_READ(SMH_RAM)         /* Sprite RAM */
312		AM_RANGE(0x1a0000, 0x1a1fff) AM_READ(K056832_ram_word_r)   /* Graphic planes */
313		AM_RANGE(0x1a2000, 0x1a3fff) AM_READ(K056832_ram_word_r)   /* Graphic planes mirror */
	319	AM_RANGE(0x0de000, 0x0de001) AM_READWRITE(control2_r,control2_w)
	320	AM_RANGE(0x100000, 0x17ffff) AM_ROM
	321	AM_RANGE(0x180000, 0x18ffff) AM_RAM   AM_BASE(&workram)      /* Work RAM */
	322	AM_RANGE(0x190000, 0x19ffff) AM_RAM AM_BASE(&spriteram16)   /* Sprite RAM */
	323	AM_RANGE(0x1a0000, 0x1a1fff) AM_READWRITE(K056832_ram_word_r,K056832_ram_word_w)   /* Graphic planes */
	324	AM_RANGE(0x1a2000, 0x1a3fff) AM_READWRITE(K056832_ram_word_r,K056832_ram_word_w)   /* Graphic planes mirror */
314	325	AM_RANGE(0x1b0000, 0x1b1fff) AM_READ(K056832_rom_word_r)   /* Passthrough to tile roms */
315		AM_RANGE(0x1c0000, 0x1c1fff) AM_READ(SMH_RAM)
	326	AM_RANGE(0x1c0000, 0x1c1fff) AM_RAM_WRITE(paletteram16_xrgb_word_be_w) AM_BASE(&paletteram16)
316	327	#if MOO_DEBUG
317	328	AM_RANGE(0x0c0000, 0x0c003f) AM_READ(K056832_word_r)
318	329	AM_RANGE(0x0c2000, 0x0c2007) AM_READ(K053246_reg_word_r)
319	330	AM_RANGE(0x0ca000, 0x0ca01f) AM_READ(K054338_word_r)
320	331	AM_RANGE(0x0cc000, 0x0cc01f) AM_READ(K053251_lsb_r)
321		AM_RANGE(0x0d0000, 0x0d001f) AM_READ(SMH_RAM)
	332	AM_RANGE(0x0d0000, 0x0d001f) AM_RAM
322	333	AM_RANGE(0x0d8000, 0x0d8007) AM_READ(K056832_b_word_r)
323	334	#endif
324	335	ADDRESS_MAP_END
325	336
326		static ADDRESS_MAP_START( writemem, ADDRESS_SPACE_PROGRAM, 16 )
327		AM_RANGE(0x000000, 0x07ffff) AM_WRITE(SMH_ROM)
	337	static ADDRESS_MAP_START( moobl_map, ADDRESS_SPACE_PROGRAM, 16 )
	338	AM_RANGE(0x000000, 0x07ffff) AM_ROM
328	339	AM_RANGE(0x0c0000, 0x0c003f) AM_WRITE(K056832_word_w)
329	340	AM_RANGE(0x0c2000, 0x0c2007) AM_WRITE(K053246_word_w)
330		AM_RANGE(0x0ca000, 0x0ca01f) AM_WRITE(K054338_word_w)      /* K054338 alpha blending engine */
331		AM_RANGE(0x0cc000, 0x0cc01f) AM_WRITE(K053251_lsb_w)
332		AM_RANGE(0x0ce000, 0x0ce01f) AM_WRITE(moo_prot_w)
333		AM_RANGE(0x0d0000, 0x0d001f) AM_WRITE(SMH_RAM)         /* CCU regs (ignored) */
334		AM_RANGE(0x0d4000, 0x0d4001) AM_WRITE(sound_irq_w)
335		AM_RANGE(0x0d600c, 0x0d600d) AM_WRITE(sound_cmd1_w)
336		AM_RANGE(0x0d600e, 0x0d600f) AM_WRITE(sound_cmd2_w)
337		AM_RANGE(0x0d6000, 0x0d601f) AM_WRITE(SMH_RAM)         /* sound regs fall through */
338		AM_RANGE(0x0d8000, 0x0d8007) AM_WRITE(K056832_b_word_w)   /* VSCCS regs */
339		AM_RANGE(0x0de000, 0x0de001) AM_WRITE(control2_w)
340		AM_RANGE(0x100000, 0x17ffff) AM_WRITE(SMH_ROM)
341		AM_RANGE(0x180000, 0x18ffff) AM_WRITE(SMH_RAM) AM_BASE(&workram)
342		AM_RANGE(0x190000, 0x19ffff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16)
343		AM_RANGE(0x1a0000, 0x1a1fff) AM_WRITE(K056832_ram_word_w)   /* Graphic planes */
344		AM_RANGE(0x1a2000, 0x1a3fff) AM_WRITE(K056832_ram_word_w)   /* Graphic planes mirror */
345		AM_RANGE(0x1c0000, 0x1c1fff) AM_WRITE(paletteram16_xrgb_word_be_w) AM_BASE(&paletteram16)
346		ADDRESS_MAP_END
347
348		static ADDRESS_MAP_START( readmembl, ADDRESS_SPACE_PROGRAM, 16 )
349		AM_RANGE(0x000000, 0x07ffff) AM_READ(SMH_ROM)
350		AM_RANGE(0x0c2f00, 0x0c2f01) AM_READNOP              /* heck if I know, but it's polled constantly */
	341	AM_RANGE(0x0c2f00, 0x0c2f01) AM_READNOP                  /* heck if I know, but it's polled constantly */
351	342	AM_RANGE(0x0c4000, 0x0c4001) AM_READ(K053246_word_r)
352		AM_RANGE(0x0d6ffe, 0x0d6fff) AM_DEVREAD8("oki", okim6295_r, 0x00ff)
	343	AM_RANGE(0x0ca000, 0x0ca01f) AM_WRITE(K054338_word_w)       /* K054338 alpha blending engine */
	344	AM_RANGE(0x0cc000, 0x0cc01f) AM_WRITE(K053251_lsb_w)
	345	AM_RANGE(0x0d0000, 0x0d001f) AM_WRITEONLY                  /* CCU regs (ignored) */
	346	AM_RANGE(0x0d6ffc, 0x0d6ffd) AM_DEVWRITE("oki", moobl_oki_bank_w)
	347	AM_RANGE(0x0d6ffe, 0x0d6fff) AM_DEVREADWRITE8("oki", okim6295_r,okim6295_w, 0x00ff)
	348	AM_RANGE(0x0d8000, 0x0d8007) AM_WRITE(K056832_b_word_w)     /* VSCCS regs */
353	349	AM_RANGE(0x0da000, 0x0da001) AM_READ_PORT("P1_P3")
354	350	AM_RANGE(0x0da002, 0x0da003) AM_READ_PORT("P2_P4")
355	351	AM_RANGE(0x0dc000, 0x0dc001) AM_READ_PORT("IN0")
356	352	AM_RANGE(0x0dc002, 0x0dc003) AM_READ(control1_r)
357		AM_RANGE(0x0de000, 0x0de001) AM_READ(control2_r)
358		AM_RANGE(0x100000, 0x17ffff) AM_READ(SMH_ROM)
359		AM_RANGE(0x180000, 0x18ffff) AM_READ(SMH_RAM)              /* Work RAM */
360		AM_RANGE(0x190000, 0x19ffff) AM_READ(SMH_RAM)              /* Sprite RAM */
361		AM_RANGE(0x1a0000, 0x1a1fff) AM_READ(K056832_ram_word_r)     /* Graphic planes */
362		AM_RANGE(0x1a2000, 0x1a3fff) AM_READ(K056832_ram_word_r)   /* Graphic planes mirror */
	353	AM_RANGE(0x0de000, 0x0de001) AM_READWRITE(control2_r,control2_w)
	354	AM_RANGE(0x100000, 0x17ffff) AM_ROM
	355	AM_RANGE(0x180000, 0x18ffff) AM_RAM AM_BASE(&workram)       /* Work RAM */
	356	AM_RANGE(0x190000, 0x19ffff) AM_RAM AM_BASE(&spriteram16)     /* Sprite RAM */
	357	AM_RANGE(0x1a0000, 0x1a1fff) AM_READWRITE(K056832_ram_word_r,K056832_ram_word_w) /* Graphic planes */
	358	AM_RANGE(0x1a2000, 0x1a3fff) AM_READWRITE(K056832_ram_word_r,K056832_ram_word_w)   /* Graphic planes mirror */
363	359	AM_RANGE(0x1b0000, 0x1b1fff) AM_READ(K056832_rom_word_r)   /* Passthrough to tile roms */
364		AM_RANGE(0x1c0000, 0x1c1fff) AM_READ(SMH_RAM)
	360	AM_RANGE(0x1c0000, 0x1c1fff) AM_RAM_WRITE(paletteram16_xrgb_word_be_w) AM_BASE(&paletteram16)
365	361	ADDRESS_MAP_END
366	362
367		static ADDRESS_MAP_START( writemembl, ADDRESS_SPACE_PROGRAM, 16 )
368		AM_RANGE(0x000000, 0x07ffff) AM_WRITE(SMH_ROM)
	363	static ADDRESS_MAP_START( bucky_map, ADDRESS_SPACE_PROGRAM, 16 )
	364	AM_RANGE(0x000000, 0x07ffff) AM_ROM
	365	AM_RANGE(0x080000, 0x08ffff) AM_RAM
	366	AM_RANGE(0x090000, 0x09ffff) AM_RAM AM_BASE(&spriteram16)   /* Sprite RAM */
	367	AM_RANGE(0x0a0000, 0x0affff) AM_RAM                     /* extra sprite RAM? */
369	368	AM_RANGE(0x0c0000, 0x0c003f) AM_WRITE(K056832_word_w)
370	369	AM_RANGE(0x0c2000, 0x0c2007) AM_WRITE(K053246_word_w)
371		AM_RANGE(0x0ca000, 0x0ca01f) AM_WRITE(K054338_word_w)         /* K054338 alpha blending engine */
372		AM_RANGE(0x0cc000, 0x0cc01f) AM_WRITE(K053251_lsb_w)
373		AM_RANGE(0x0d0000, 0x0d001f) AM_WRITE(SMH_RAM)              /* CCU regs (ignored) */
374		AM_RANGE(0x0d6ffc, 0x0d6ffd) AM_DEVWRITE("oki", moobl_oki_bank_w)
375		AM_RANGE(0x0d6ffe, 0x0d6fff) AM_DEVWRITE8("oki", okim6295_w, 0x00ff)
376		AM_RANGE(0x0d8000, 0x0d8007) AM_WRITE(K056832_b_word_w)       /* VSCCS regs */
377		AM_RANGE(0x0de000, 0x0de001) AM_WRITE(control2_w)
378		AM_RANGE(0x100000, 0x17ffff) AM_WRITE(SMH_ROM)
379		AM_RANGE(0x180000, 0x18ffff) AM_WRITE(SMH_RAM) AM_BASE(&workram)
380		AM_RANGE(0x190000, 0x19ffff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16)
381		AM_RANGE(0x1a0000, 0x1a1fff) AM_WRITE(K056832_ram_word_w)   /* Graphic planes */
382		AM_RANGE(0x1a2000, 0x1a3fff) AM_WRITE(K056832_ram_word_w)   /* Graphic planes mirror */
383		AM_RANGE(0x1c0000, 0x1c1fff) AM_WRITE(paletteram16_xrgb_word_be_w) AM_BASE(&paletteram16)
384		ADDRESS_MAP_END
385
386		static ADDRESS_MAP_START( buckyreadmem, ADDRESS_SPACE_PROGRAM, 16 )
387		AM_RANGE(0x000000, 0x07ffff) AM_READ(SMH_ROM)
388		AM_RANGE(0x080000, 0x08ffff) AM_READ(SMH_RAM)
389		AM_RANGE(0x090000, 0x09ffff) AM_READ(SMH_RAM)         /* Sprite RAM */
390		AM_RANGE(0x0a0000, 0x0affff) AM_READ(SMH_RAM)         /* extra sprite RAM? */
391	370	AM_RANGE(0x0c4000, 0x0c4001) AM_READ(K053246_word_r)
392		AM_RANGE(0x0d2000, 0x0d20ff) AM_READ(K054000_lsb_r)
	371	AM_RANGE(0x0ca000, 0x0ca01f) AM_WRITE(K054338_word_w)      /* K054338 alpha blending engine */
	372	AM_RANGE(0x0cc000, 0x0cc01f) AM_WRITE(K053251_lsb_w)
	373	AM_RANGE(0x0ce000, 0x0ce01f) AM_WRITE(moo_prot_w)
	374	AM_RANGE(0x0d0000, 0x0d001f) AM_WRITEONLY               /* CCU regs (ignored) */
	375	AM_RANGE(0x0d2000, 0x0d20ff) AM_READWRITE(K054000_lsb_r,K054000_lsb_w)
	376	AM_RANGE(0x0d4000, 0x0d4001) AM_WRITE(sound_irq_w)
	377	AM_RANGE(0x0d600c, 0x0d600d) AM_WRITE(sound_cmd1_w)
	378	AM_RANGE(0x0d600e, 0x0d600f) AM_WRITE(sound_cmd2_w)
393	379	AM_RANGE(0x0d6014, 0x0d6015) AM_READ(sound_status_r)
394		AM_RANGE(0x0d6000, 0x0d601f) AM_READ(SMH_RAM)         /* sound regs fall through */
	380	AM_RANGE(0x0d6000, 0x0d601f) AM_RAM                     /* sound regs fall through */
	381	AM_RANGE(0x0d8000, 0x0d8007) AM_WRITE(K056832_b_word_w)      /* VSCCS regs */
395	382	AM_RANGE(0x0da000, 0x0da001) AM_READ_PORT("P1_P3")
396	383	AM_RANGE(0x0da002, 0x0da003) AM_READ_PORT("P2_P4")
397	384	AM_RANGE(0x0dc000, 0x0dc001) AM_READ_PORT("IN0")
398	385	AM_RANGE(0x0dc002, 0x0dc003) AM_READ(control1_r)
399		AM_RANGE(0x0de000, 0x0de001) AM_READ(control2_r)
400		AM_RANGE(0x180000, 0x181fff) AM_READ(K056832_ram_word_r)   /* Graphic planes */
401		AM_RANGE(0x182000, 0x183fff) AM_READ(K056832_ram_word_r)   /* Graphic planes mirror */
402		AM_RANGE(0x184000, 0x187fff) AM_READ(SMH_RAM)         /* extra tile RAM? */
	386	AM_RANGE(0x0de000, 0x0de001) AM_READWRITE(control2_r,control2_w)
	387	AM_RANGE(0x180000, 0x181fff) AM_READWRITE(K056832_ram_word_r,K056832_ram_word_w)   /* Graphic planes */
	388	AM_RANGE(0x182000, 0x183fff) AM_READWRITE(K056832_ram_word_r,K056832_ram_word_w)   /* Graphic planes mirror */
	389	AM_RANGE(0x184000, 0x187fff) AM_RAM                     /* extra tile RAM? */
403	390	AM_RANGE(0x190000, 0x191fff) AM_READ(K056832_rom_word_r)   /* Passthrough to tile roms */
404		AM_RANGE(0x1b0000, 0x1b3fff) AM_READ(SMH_RAM)
405		AM_RANGE(0x200000, 0x23ffff) AM_READ(SMH_ROM)         /* data */
	391	AM_RANGE(0x1b0000, 0x1b3fff) AM_RAM_WRITE(paletteram16_xrgb_word_be_w) AM_BASE(&paletteram16)
	392	AM_RANGE(0x200000, 0x23ffff) AM_ROM                     /* data */
406	393	#if MOO_DEBUG
407	394	AM_RANGE(0x0c0000, 0x0c003f) AM_READ(K056832_word_r)
408	395	AM_RANGE(0x0c2000, 0x0c2007) AM_READ(K053246_reg_word_r)
409	396	AM_RANGE(0x0ca000, 0x0ca01f) AM_READ(K054338_word_r)
410	397	AM_RANGE(0x0cc000, 0x0cc01f) AM_READ(K053251_lsb_r)
411		AM_RANGE(0x0d0000, 0x0d001f) AM_READ(SMH_RAM)
	398	AM_RANGE(0x0d0000, 0x0d001f) AM_RAM
412	399	AM_RANGE(0x0d8000, 0x0d8007) AM_READ(K056832_b_word_r)
413	400	#endif
414	401	ADDRESS_MAP_END
415	402
416		static ADDRESS_MAP_START( buckywritemem, ADDRESS_SPACE_PROGRAM, 16 )
417		AM_RANGE(0x000000, 0x07ffff) AM_WRITE(SMH_ROM)
418		AM_RANGE(0x080000, 0x08ffff) AM_WRITE(SMH_RAM)
419		AM_RANGE(0x090000, 0x09ffff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16)   /* Sprite RAM */
420		AM_RANGE(0x0a0000, 0x0affff) AM_WRITE(SMH_RAM)         /* extra sprite RAM? */
421		AM_RANGE(0x0c0000, 0x0c003f) AM_WRITE(K056832_word_w)
422		AM_RANGE(0x0c2000, 0x0c2007) AM_WRITE(K053246_word_w)
423		AM_RANGE(0x0ca000, 0x0ca01f) AM_WRITE(K054338_word_w)      /* K054338 alpha blending engine */
424		AM_RANGE(0x0cc000, 0x0cc01f) AM_WRITE(K053251_lsb_w)
425		AM_RANGE(0x0ce000, 0x0ce01f) AM_WRITE(moo_prot_w)
426		AM_RANGE(0x0d0000, 0x0d001f) AM_WRITE(SMH_RAM)         /* CCU regs (ignored) */
427		AM_RANGE(0x0d2000, 0x0d20ff) AM_WRITE(K054000_lsb_w)
428		AM_RANGE(0x0d4000, 0x0d4001) AM_WRITE(sound_irq_w)
429		AM_RANGE(0x0d600c, 0x0d600d) AM_WRITE(sound_cmd1_w)
430		AM_RANGE(0x0d600e, 0x0d600f) AM_WRITE(sound_cmd2_w)
431		AM_RANGE(0x0d6000, 0x0d601f) AM_WRITE(SMH_RAM)         /* sound regs fall through */
432		AM_RANGE(0x0d8000, 0x0d8007) AM_WRITE(K056832_b_word_w)   /* VSCCS regs */
433		AM_RANGE(0x0de000, 0x0de001) AM_WRITE(control2_w)
434		AM_RANGE(0x180000, 0x181fff) AM_WRITE(K056832_ram_word_w)   /* Graphic planes */
435		AM_RANGE(0x182000, 0x183fff) AM_WRITE(K056832_ram_word_w)   /* Graphic planes mirror */
436		AM_RANGE(0x184000, 0x187fff) AM_WRITE(SMH_RAM)         /* extra tile RAM? */
437		AM_RANGE(0x1b0000, 0x1b3fff) AM_WRITE(paletteram16_xrgb_word_be_w) AM_BASE(&paletteram16)
438		AM_RANGE(0x200000, 0x23ffff) AM_WRITE(SMH_ROM)
439		ADDRESS_MAP_END
440
441		static ADDRESS_MAP_START( sound_readmem, ADDRESS_SPACE_PROGRAM, 8 )
442		AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM)
443		AM_RANGE(0x8000, 0xbfff) AM_READ(SMH_BANK2)
444		AM_RANGE(0xc000, 0xdfff) AM_READ(SMH_RAM)
445		AM_RANGE(0xe000, 0xe22f) AM_DEVREAD("konami", k054539_r)
446		AM_RANGE(0xec00, 0xec01) AM_DEVREAD("ym", ym2151_r)
	403	static ADDRESS_MAP_START( sound_map, ADDRESS_SPACE_PROGRAM, 8 )
	404	AM_RANGE(0x0000, 0x7fff) AM_ROM
	405	AM_RANGE(0x8000, 0xbfff) AM_ROMBANK(1)
	406	AM_RANGE(0xc000, 0xdfff) AM_RAM
	407	AM_RANGE(0xe000, 0xe22f) AM_DEVREADWRITE("konami", k054539_r,k054539_w)
	408	AM_RANGE(0xec00, 0xec01) AM_DEVREADWRITE("ym", ym2151_r,ym2151_w)
	409	AM_RANGE(0xf000, 0xf000) AM_WRITE(soundlatch3_w)
447	410	AM_RANGE(0xf002, 0xf002) AM_READ(soundlatch_r)
448	411	AM_RANGE(0xf003, 0xf003) AM_READ(soundlatch2_r)
449		ADDRESS_MAP_END
450
451		static ADDRESS_MAP_START( sound_writemem, ADDRESS_SPACE_PROGRAM, 8 )
452		AM_RANGE(0x0000, 0xbfff) AM_WRITE(SMH_ROM)
453		AM_RANGE(0xc000, 0xdfff) AM_WRITE(SMH_RAM)
454		AM_RANGE(0xe000, 0xe22f) AM_DEVWRITE("konami", k054539_w)
455		AM_RANGE(0xec00, 0xec01) AM_DEVWRITE("ym", ym2151_w)
456		AM_RANGE(0xf000, 0xf000) AM_WRITE(soundlatch3_w)
457	412	AM_RANGE(0xf800, 0xf800) AM_WRITE(sound_bankswitch_w)
458	413	ADDRESS_MAP_END
459	414
460
461	415	static INPUT_PORTS_START( moo )
462	416	PORT_START("IN0")
463	417	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 )
r4679	r4680
524	478
525	479	/* basic machine hardware */
526	480	MDRV_CPU_ADD("maincpu", M68000, 16000000)
527		MDRV_CPU_PROGRAM_MAP(readmem,writemem)
	481	MDRV_CPU_PROGRAM_MAP(moo_map,0)
528	482	MDRV_CPU_VBLANK_INT("screen", moo_interrupt)
529	483
530	484	MDRV_CPU_ADD("soundcpu", Z80, 8000000)
531		MDRV_CPU_PROGRAM_MAP(sound_readmem,sound_writemem)
	485	MDRV_CPU_PROGRAM_MAP(sound_map,0)
532	486
533	487	MDRV_MACHINE_START(moo)
534	488	MDRV_MACHINE_RESET(moo)
r4679	r4680
566	520
567	521	/* basic machine hardware */
568	522	MDRV_CPU_ADD("maincpu", M68000, 16100000)
569		MDRV_CPU_PROGRAM_MAP(readmembl,writemembl)
	523	MDRV_CPU_PROGRAM_MAP(moobl_map,0)
570	524	MDRV_CPU_VBLANK_INT("screen", moobl_interrupt)
571	525
572	526	MDRV_MACHINE_START(moo)
r4679	r4680
601	555	MDRV_IMPORT_FROM(moo)
602	556
603	557	MDRV_CPU_MODIFY("maincpu")
604		MDRV_CPU_PROGRAM_MAP(buckyreadmem,buckywritemem)
	558	MDRV_CPU_PROGRAM_MAP(bucky_map,0)
605	559
606	560	/* video hardware */
607	561	MDRV_PALETTE_LENGTH(4096)

src/mame/drivers/goindol.c

r4679	r4680
96	96
97	97
98	98
99		static ADDRESS_MAP_START( readmem, ADDRESS_SPACE_PROGRAM, 8 )
100		AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM)
101		AM_RANGE(0x8000, 0xbfff) AM_READ(SMH_BANK1)
102		AM_RANGE(0xc000, 0xc7ff) AM_READ(SMH_RAM)
103		AM_RANGE(0xc800, 0xc800) AM_READNOP   // watchdog?
104		AM_RANGE(0xd000, 0xefff) AM_READ(SMH_RAM)
	99	static ADDRESS_MAP_START( goindol_map, ADDRESS_SPACE_PROGRAM, 8 )
	100	AM_RANGE(0x0000, 0x7fff) AM_ROM
	101	AM_RANGE(0x8000, 0xbfff) AM_ROMBANK(1)
	102	AM_RANGE(0xc000, 0xc7ff) AM_RAM AM_BASE(&ram)
	103	AM_RANGE(0xc800, 0xc800) AM_READNOP AM_WRITE(soundlatch_w) // watchdog?
	104	AM_RANGE(0xc810, 0xc810) AM_WRITE(goindol_bankswitch_w)
	105	AM_RANGE(0xc820, 0xd820) AM_READ_PORT("DIAL") AM_WRITE(SMH_RAM) AM_BASE(&goindol_fg_scrolly)
	106	AM_RANGE(0xc830, 0xd830) AM_READ_PORT("P1") AM_WRITE(SMH_RAM) AM_BASE(&goindol_fg_scrollx)
	107	AM_RANGE(0xc834, 0xc834) AM_READ_PORT("P2")
	108	AM_RANGE(0xd000, 0xd03f) AM_RAM AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
	109	AM_RANGE(0xd040, 0xd7ff) AM_RAM
	110	AM_RANGE(0xd800, 0xdfff) AM_RAM_WRITE(goindol_bg_videoram_w) AM_BASE(&goindol_bg_videoram) AM_SIZE(&goindol_bg_videoram_size)
	111	AM_RANGE(0xe000, 0xe03f) AM_RAM AM_BASE(&spriteram_2)
	112	AM_RANGE(0xe040, 0xe7ff) AM_RAM
	113	AM_RANGE(0xe800, 0xefff) AM_RAM_WRITE(goindol_fg_videoram_w) AM_BASE(&goindol_fg_videoram) AM_SIZE(&goindol_fg_videoram_size)
105	114	AM_RANGE(0xf000, 0xf000) AM_READ_PORT("DSW1")
106	115	AM_RANGE(0xf422, 0xf422) AM_READ(prot_f422_r)
107	116	AM_RANGE(0xf800, 0xf800) AM_READ_PORT("DSW2")
108		AM_RANGE(0xc834, 0xc834) AM_READ_PORT("P2")
109		AM_RANGE(0xc820, 0xc820) AM_READ_PORT("DIAL")
110		AM_RANGE(0xc830, 0xc830) AM_READ_PORT("P1")
111		AM_RANGE(0xe000, 0xefff) AM_READ(SMH_RAM)
112		ADDRESS_MAP_END
113
114		static ADDRESS_MAP_START( writemem, ADDRESS_SPACE_PROGRAM, 8 )
115		AM_RANGE(0x0000, 0xbfff) AM_WRITE(SMH_ROM)
116		AM_RANGE(0xc000, 0xc7ff) AM_WRITE(SMH_RAM) AM_BASE(&ram)
117		AM_RANGE(0xc810, 0xc810) AM_WRITE(goindol_bankswitch_w)
118		AM_RANGE(0xc820, 0xd820) AM_WRITE(SMH_RAM) AM_BASE(&goindol_fg_scrolly)
119		AM_RANGE(0xc830, 0xd830) AM_WRITE(SMH_RAM) AM_BASE(&goindol_fg_scrollx)
120		AM_RANGE(0xc800, 0xc800) AM_WRITE(soundlatch_w)
121		AM_RANGE(0xd000, 0xd03f) AM_WRITE(SMH_RAM) AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
122		AM_RANGE(0xd040, 0xd7ff) AM_WRITE(SMH_RAM)
123		AM_RANGE(0xd800, 0xdfff) AM_WRITE(goindol_bg_videoram_w) AM_BASE(&goindol_bg_videoram) AM_SIZE(&goindol_bg_videoram_size)
124		AM_RANGE(0xe000, 0xe03f) AM_WRITE(SMH_RAM) AM_BASE(&spriteram_2)
125		AM_RANGE(0xe040, 0xe7ff) AM_WRITE(SMH_RAM)
126		AM_RANGE(0xe800, 0xefff) AM_WRITE(goindol_fg_videoram_w) AM_BASE(&goindol_fg_videoram) AM_SIZE(&goindol_fg_videoram_size)
127	117	AM_RANGE(0xfc44, 0xfc44) AM_WRITE(prot_fc44_w)
128	118	AM_RANGE(0xfc66, 0xfc66) AM_WRITE(prot_fc66_w)
129	119	AM_RANGE(0xfcb0, 0xfcb0) AM_WRITE(prot_fcb0_w)
130	120	AM_RANGE(0xfd99, 0xfd99) AM_WRITE(prot_fd99_w)
131	121	ADDRESS_MAP_END
132	122
133		static ADDRESS_MAP_START( sound_readmem, ADDRESS_SPACE_PROGRAM, 8 )
134		AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM)
135		AM_RANGE(0xc000, 0xc7ff) AM_READ(SMH_RAM)
	123	static ADDRESS_MAP_START( sound_map, ADDRESS_SPACE_PROGRAM, 8 )
	124	AM_RANGE(0x0000, 0x7fff) AM_ROM
	125	AM_RANGE(0xa000, 0xa001) AM_DEVWRITE("ym", ym2203_w)
	126	AM_RANGE(0xc000, 0xc7ff) AM_RAM
136	127	AM_RANGE(0xd800, 0xd800) AM_READ(soundlatch_r)
137	128	ADDRESS_MAP_END
138	129
139		static ADDRESS_MAP_START( sound_writemem, ADDRESS_SPACE_PROGRAM, 8 )
140		AM_RANGE(0x0000, 0x7fff) AM_WRITE(SMH_ROM)
141		AM_RANGE(0xc000, 0xc7ff) AM_WRITE(SMH_RAM)
142		AM_RANGE(0xa000, 0xa001) AM_DEVWRITE("ym", ym2203_w)
143		ADDRESS_MAP_END
144	130
145
146	131	static INPUT_PORTS_START( goindol )
147	132	PORT_START("P1")
148	133	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_8WAY
r4679	r4680
247	232
248	233	/* basic machine hardware */
249	234	MDRV_CPU_ADD("maincpu", Z80, 6000000)        /* 6 MHz (?) */
250		MDRV_CPU_PROGRAM_MAP(readmem,writemem)
	235	MDRV_CPU_PROGRAM_MAP(goindol_map,0)
251	236	MDRV_CPU_VBLANK_INT("screen", irq0_line_hold)
252	237
253	238	MDRV_CPU_ADD("audiocpu", Z80, 4000000)
254		MDRV_CPU_PROGRAM_MAP(sound_readmem,sound_writemem)
	239	MDRV_CPU_PROGRAM_MAP(sound_map,0)
255	240	MDRV_CPU_VBLANK_INT_HACK(irq0_line_hold,4)
256	241
257	242	/* video hardware */

src/mame/drivers/eolith16.c

r4679	r4680
102	102
103	103	static VIDEO_START( eolith16 )
104	104	{
105		vram = auto_malloc(0x10000*2);
	105	vram = auto_alloc_array(machine, UINT16, 0x10000);
106	106	}
107	107
108	108	static VIDEO_UPDATE( eolith16 )

src/mame/drivers/taito_l.c

r4679	r4680
137	137	{
138	138	int i;
139	139
140		taitol_rambanks = auto_malloc(0x1000*12);
141		palette_ram = auto_malloc(0x1000);
142		empty_ram = auto_malloc(0x1000);
	140	taitol_rambanks = auto_alloc_array(machine, UINT8, 0x1000*12);
	141	palette_ram = auto_alloc_array(machine, UINT8, 0x1000);
	142	empty_ram = auto_alloc_array(machine, UINT8, 0x1000);
143	143
144	144	for(i=0;i<3;i++)
145	145	irq_adr_table[i] = 0;
r4679	r4680
314	314
315	315	// fix Plotting test mode
316	316	if ((irq_enable & (1 << last_irq_level)) == 0)
317		cpu_set_input_line(space->machine->cpu[0], 0, CLEAR_LINE);
	317	cputag_set_input_line(space->machine, "maincpu", 0, CLEAR_LINE);
318	318	}
319	319
320	320	static READ8_HANDLER( irq_enable_r )
r4679	r4680
866	866
867	867	static WRITE8_HANDLER (evilston_snd_w)
868	868	{
869		shared_ram[0x7fe]=data&0x7f;
870		cpu_set_input_line(space->machine->cpu[1],INPUT_LINE_NMI,PULSE_LINE);
	869	shared_ram[0x7fe] = data & 0x7f;
	870	cputag_set_input_line(space->machine, "audiocpu", INPUT_LINE_NMI, PULSE_LINE);
871	871	}
872	872
873	873	static ADDRESS_MAP_START( evilston_map, ADDRESS_SPACE_PROGRAM, 8 )
r4679	r4680
1877	1877
1878	1878	static void irqhandler(const device_config *device, int irq)
1879	1879	{
1880		cpu_set_input_line(device->machine->cpu[1],0,irq ? ASSERT_LINE : CLEAR_LINE);
	1880	cputag_set_input_line(device->machine, "audiocpu", 0, irq ? ASSERT_LINE : CLEAR_LINE);
1881	1881	}
1882	1882
1883	1883	static WRITE8_DEVICE_HANDLER( portA_w )
r4679	r4680
1889	1889
1890	1890	cur_bank = data & 0x03;
1891	1891	bankaddress = 0x10000 + (cur_bank-1) * 0x4000;
1892		memory_set_bankptr(device->machine, 7,&RAM[bankaddress]);
1893		//logerror ("YM2203 bank change val=%02x  pc=%04x\n",cur_bank, cpu_get_pc(space->cpu) );
	1892	memory_set_bankptr(device->machine, 7, &RAM[bankaddress]);
	1893	//logerror ("YM2203 bank change val=%02x  pc=%04x\n", cur_bank, cpu_get_pc(space->cpu) );
1894	1894	}
1895	1895	}
1896	1896
r4679	r4680
2761	2761	{
2762	2762	UINT8 *ROM = memory_region(machine, "audiocpu");
2763	2763	ROM[0x72]=0x45;   /* reti -> retn  ('dead' loop @ $1104 )*/
2764		memory_install_write8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xa7fe, 0xa7fe, 0, 0, evilston_snd_w);
	2764	memory_install_write8_handler(cputag_get_address_space(machine, "audiocpu", ADDRESS_SPACE_PROGRAM), 0xa7fe, 0xa7fe, 0, 0, evilston_snd_w);
2765	2765	}
2766	2766
2767	2767

src/mame/drivers/groundfx.c

r4679	r4680
107	107
108	108	static TIMER_CALLBACK( groundfx_interrupt5 )
109	109	{
110		cpu_set_input_line(machine->cpu[0],5,HOLD_LINE); //from 5... ADC port
	110	cputag_set_input_line(machine, "maincpu", 5, HOLD_LINE); //from 5... ADC port
111	111	}
112	112
113	113
r4679	r4680
117	117
118	118	static const UINT8 default_eeprom[128]=
119	119	{
120		0x02,0x01,0x11,0x12,0x01,0x01,0x01,0x00,0x80,0x80,0x30,0x01,0x00,0x00,0x62,0x45,
121		0xe0,0xa0,0xff,0x28,0xff,0xff,0xfa,0xd7,0x33,0x28,0x00,0x00,0x33,0x28,0x00,0x00,
122		0x00,0x00,0x00,0x00,0x00,0x00,0xe0,0xa0,0xff,0x28,0xff,0xff,0xff,0xff,0xfa,0xd7,
123		0x33,0x28,0x00,0x00,0x33,0x28,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xff,0xff,
124		0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
125		0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
126		0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
	120	0x62,0x11,0x00,0x00,0x00,0x00,0x01,0x00,0x80,0x80,0x30,0x05,0x00,0x00,0x96,0x14,
	121	0x17,0x70,0x35,0xcd,0x75,0x30,0x24,0xaa,0x75,0x30,0x51,0xd9,0x75,0x30,0x2d,0x2b,
	122	0x75,0x30,0x51,0xb9,0x00,0x00,0xe0,0xa0,0x17,0x70,0x35,0xcd,0x75,0x30,0x24,0xaa,
	123	0x75,0x30,0x51,0xd9,0x75,0x30,0x2d,0x2b,0x75,0x30,0x51,0xb9,0x00,0x00,0xff,0xff,
	124	0x17,0x70,0x35,0xcd,0x75,0x30,0x24,0xaa,0x75,0x30,0x51,0xd9,0x75,0x30,0x2d,0x2b,
	125	0x75,0x30,0x51,0xb9,0xff,0xff,0xff,0xff,0x17,0x70,0x35,0xcd,0x75,0x30,0x24,0xaa,
	126	0x75,0x30,0x51,0xd9,0x75,0x30,0x2d,0x2b,0x75,0x30,0x51,0xb9,0xff,0xff,0xff,0xff,
127	127	0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff
128	128	};
129	129
r4679	r4680
249	249	MEMORY STRUCTURES
250	250	***********************************************************/
251	251
252		static ADDRESS_MAP_START( groundfx_readmem, ADDRESS_SPACE_PROGRAM, 32 )
253		AM_RANGE(0x000000, 0x1fffff) AM_READ(SMH_ROM)
254		AM_RANGE(0x200000, 0x21ffff) AM_READ(SMH_RAM)   /* main CPUA ram */
255		AM_RANGE(0x300000, 0x303fff) AM_READ(SMH_RAM)   /* sprite ram */
	252	static ADDRESS_MAP_START( groundfx_map, ADDRESS_SPACE_PROGRAM, 32 )
	253	AM_RANGE(0x000000, 0x1fffff) AM_ROM
	254	AM_RANGE(0x200000, 0x21ffff) AM_RAM   AM_BASE(&groundfx_ram) /* main CPUA ram */
	255	AM_RANGE(0x300000, 0x303fff) AM_RAM   AM_BASE(&spriteram32) AM_SIZE(&spriteram_size) /* sprite ram */
	256	AM_RANGE(0x400000, 0x400003) AM_WRITE(motor_control_w)   /* gun vibration */
256	257	AM_RANGE(0x500000, 0x500003) AM_READ_PORT("BUTTONS")
257	258	AM_RANGE(0x500004, 0x500007) AM_READ_PORT("SYSTEM")
258		AM_RANGE(0x600000, 0x600003) AM_READ(groundfx_adc_r)
259		AM_RANGE(0x700000, 0x7007ff) AM_READ(SMH_RAM)
260		AM_RANGE(0x800000, 0x80ffff) AM_READ(TC0480SCP_long_r)     /* tilemaps */
261		AM_RANGE(0x830000, 0x83002f) AM_READ(TC0480SCP_ctrl_long_r)   // debugging
262		AM_RANGE(0x900000, 0x90ffff) AM_READ(TC0100SCN_long_r)   /* piv tilemaps */
263		AM_RANGE(0x920000, 0x92000f) AM_READ(TC0100SCN_ctrl_long_r)
264		AM_RANGE(0xa00000, 0xa0ffff) AM_READ(SMH_RAM) /* palette ram */
265		AM_RANGE(0xb00000, 0xb003ff) AM_READ(SMH_RAM)   // ?? single bytes
266		AM_RANGE(0xc00000, 0xc00007) AM_READNOP /* Network? */
267		ADDRESS_MAP_END
268
269		static ADDRESS_MAP_START( groundfx_writemem, ADDRESS_SPACE_PROGRAM, 32 )
270		AM_RANGE(0x000000, 0x1fffff) AM_WRITE(SMH_ROM)
271		AM_RANGE(0x200000, 0x21ffff) AM_WRITE(SMH_RAM) AM_BASE(&groundfx_ram)
272		AM_RANGE(0x300000, 0x303fff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram32) AM_SIZE(&spriteram_size)
273		AM_RANGE(0x400000, 0x400003) AM_WRITE(motor_control_w)   /* gun vibration */
274	259	AM_RANGE(0x500000, 0x500007) AM_WRITE(groundfx_input_w)   /* eeprom etc. */
275		AM_RANGE(0x600000, 0x600003) AM_WRITE(groundfx_adc_w)
276		AM_RANGE(0x700000, 0x7007ff) AM_WRITE(SMH_RAM) AM_BASE(&f3_shared_ram)
277		AM_RANGE(0x800000, 0x80ffff) AM_WRITE(TC0480SCP_long_w)     /* tilemaps */
278		AM_RANGE(0x830000, 0x83002f) AM_WRITE(TC0480SCP_ctrl_long_w)
279		AM_RANGE(0x900000, 0x90ffff) AM_WRITE(TC0100SCN_long_w)   /* piv tilemaps */
280		AM_RANGE(0x920000, 0x92000f) AM_WRITE(TC0100SCN_ctrl_long_w)
281		AM_RANGE(0xa00000, 0xa0ffff) AM_WRITE(color_ram_w) AM_BASE(&paletteram32)
282		AM_RANGE(0xb00000, 0xb003ff) AM_WRITE(SMH_RAM)   // single bytes, blending ??
	260	AM_RANGE(0x600000, 0x600003) AM_READWRITE(groundfx_adc_r,groundfx_adc_w)
	261	AM_RANGE(0x700000, 0x7007ff) AM_RAM AM_BASE(&f3_shared_ram)
	262	AM_RANGE(0x800000, 0x80ffff) AM_READWRITE(TC0480SCP_long_r,TC0480SCP_long_w)     /* tilemaps */
	263	AM_RANGE(0x830000, 0x83002f) AM_READWRITE(TC0480SCP_ctrl_long_r,TC0480SCP_ctrl_long_w)   // debugging
	264	AM_RANGE(0x900000, 0x90ffff) AM_READWRITE(TC0100SCN_long_r,TC0100SCN_long_w)   /* piv tilemaps */
	265	AM_RANGE(0x920000, 0x92000f) AM_READWRITE(TC0100SCN_ctrl_long_r,TC0100SCN_ctrl_long_w)
	266	AM_RANGE(0xa00000, 0xa0ffff) AM_RAM_WRITE(color_ram_w) AM_BASE(&paletteram32) /* palette ram */
	267	AM_RANGE(0xb00000, 0xb003ff) AM_RAM                  // ?? single bytes, blending ??
	268	AM_RANGE(0xc00000, 0xc00007) AM_READNOP /* Network? */
283	269	AM_RANGE(0xd00000, 0xd00003) AM_WRITE(rotate_control_w)   /* perhaps port based rotate control? */
284	270	/* f00000 is seat control? */
285	271	ADDRESS_MAP_END
r4679	r4680
397	383
398	384	/* basic machine hardware */
399	385	MDRV_CPU_ADD("maincpu", M68EC020, 16000000)   /* 16 MHz */
400		MDRV_CPU_PROGRAM_MAP(groundfx_readmem,groundfx_writemem)
	386	MDRV_CPU_PROGRAM_MAP(groundfx_map,0)
401	387	MDRV_CPU_VBLANK_INT("screen", groundfx_interrupt)
402	388
403	389	TAITO_F3_SOUND_SYSTEM_CPU(16000000)
r4679	r4680
486	472	int data;
487	473
488	474	/* Speedup handlers */
489		memory_install_read32_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x20b574, 0x20b577, 0, 0, irq_speedup_r_groundfx);
	475	memory_install_read32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x20b574, 0x20b577, 0, 0, irq_speedup_r_groundfx);
490	476
491	477	/* make piv tile GFX format suitable for gfxdecode */
492	478	offset = size/2;

src/mame/drivers/fastlane.c

r4679	r4680
80	80
81	81
82	82
83		static ADDRESS_MAP_START( fastlane_readmem, ADDRESS_SPACE_PROGRAM, 8 )
84		AM_RANGE(0x0000, 0x005f) AM_READ(SMH_RAM)
	83	static ADDRESS_MAP_START( fastlane_map, ADDRESS_SPACE_PROGRAM, 8 )
	84	AM_RANGE(0x0000, 0x005f) AM_RAM_WRITE(k007121_registers_w) AM_BASE(&fastlane_k007121_regs)   /* 007121 registers */
85	85	AM_RANGE(0x0800, 0x0800) AM_READ_PORT("DSW3")
86	86	AM_RANGE(0x0801, 0x0801) AM_READ_PORT("P2")
87	87	AM_RANGE(0x0802, 0x0802) AM_READ_PORT("P1")
88	88	AM_RANGE(0x0803, 0x0803) AM_READ_PORT("SYSTEM")
89	89	AM_RANGE(0x0900, 0x0900) AM_READ_PORT("DSW1")
90	90	AM_RANGE(0x0901, 0x0901) AM_READ_PORT("DSW2")
91		AM_RANGE(0x0d00, 0x0d0d) AM_DEVREAD("konami1", fastlane_k007232_r)/* 007232 registers (chip 1) */
92		AM_RANGE(0x0e00, 0x0e0d) AM_DEVREAD("konami2", fastlane_k007232_r)/* 007232 registers (chip 2) */
93		AM_RANGE(0x0f00, 0x0f1f) AM_READ(K051733_r)         /* 051733 (protection) */
94		AM_RANGE(0x1000, 0x1fff) AM_READ(SMH_RAM)         /* Palette RAM/Work RAM */
95		AM_RANGE(0x2000, 0x3fff) AM_READ(SMH_RAM)         /* Video RAM + Sprite RAM */
96		AM_RANGE(0x4000, 0x7fff) AM_READ(SMH_BANK1)         /* banked ROM */
97		AM_RANGE(0x8000, 0xffff) AM_READ(SMH_ROM)         /* ROM */
	91	AM_RANGE(0x0b00, 0x0b00) AM_WRITE(watchdog_reset_w)                                 /* watchdog reset */
	92	AM_RANGE(0x0c00, 0x0c00) AM_WRITE(fastlane_bankswitch_w)                           /* bankswitch control */
	93	AM_RANGE(0x0d00, 0x0d0d) AM_DEVREADWRITE("konami1", fastlane_k007232_r, fastlane_k007232_w)   /* 007232 registers (chip 1) */
	94	AM_RANGE(0x0e00, 0x0e0d) AM_DEVREADWRITE("konami2", fastlane_k007232_r, fastlane_k007232_w)   /* 007232 registers (chip 2) */
	95	AM_RANGE(0x0f00, 0x0f1f) AM_READWRITE(K051733_r, K051733_w)                           /* 051733 (protection) */
	96	AM_RANGE(0x1000, 0x17ff) AM_RAM AM_BASE(&paletteram)                              /* Palette RAM */
	97	AM_RANGE(0x1800, 0x1fff) AM_RAM                                                /* Work RAM */
	98	AM_RANGE(0x2000, 0x27ff) AM_RAM_WRITE(fastlane_vram1_w) AM_BASE(&fastlane_videoram1)       /* Video RAM (chip 1) */
	99	AM_RANGE(0x2800, 0x2fff) AM_RAM_WRITE(fastlane_vram2_w) AM_BASE(&fastlane_videoram2)       /* Video RAM (chip 2) */
	100	AM_RANGE(0x3000, 0x3fff) AM_RAM AM_BASE(&spriteram)                                 /* Sprite RAM */
	101	AM_RANGE(0x4000, 0x7fff) AM_ROMBANK(1)                                          /* banked ROM */
	102	AM_RANGE(0x8000, 0xffff) AM_ROM                                                /* ROM */
98	103	ADDRESS_MAP_END
99	104
100		static ADDRESS_MAP_START( fastlane_writemem, ADDRESS_SPACE_PROGRAM, 8 )
101		AM_RANGE(0x0000, 0x005f) AM_WRITE(k007121_registers_w) AM_BASE(&fastlane_k007121_regs)/* 007121 registers */
102		AM_RANGE(0x0b00, 0x0b00) AM_WRITE(watchdog_reset_w)      /* watchdog reset */
103		AM_RANGE(0x0c00, 0x0c00) AM_WRITE(fastlane_bankswitch_w)   /* bankswitch control */
104		AM_RANGE(0x0d00, 0x0d0d) AM_DEVWRITE("konami1", fastlane_k007232_w)   /* 007232 registers (chip 1) */
105		AM_RANGE(0x0e00, 0x0e0d) AM_DEVWRITE("konami2", fastlane_k007232_w)   /* 007232 registers (chip 2) */
106		AM_RANGE(0x0f00, 0x0f1f) AM_WRITE(K051733_w)            /* 051733 (protection) */
107		AM_RANGE(0x1000, 0x17ff) AM_WRITE(SMH_RAM) AM_BASE(&paletteram)/* palette RAM */
108		AM_RANGE(0x1800, 0x1fff) AM_WRITE(SMH_RAM)            /* Work RAM */
109		AM_RANGE(0x2000, 0x27ff) AM_WRITE(fastlane_vram1_w) AM_BASE(&fastlane_videoram1)
110		AM_RANGE(0x2800, 0x2fff) AM_WRITE(fastlane_vram2_w) AM_BASE(&fastlane_videoram2)
111		AM_RANGE(0x3000, 0x3fff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram)   /* Sprite RAM */
112		AM_RANGE(0x4000, 0xffff) AM_WRITE(SMH_ROM)            /* ROM/banked ROM */
113		ADDRESS_MAP_END
114
115	105	/***************************************************************************
116	106
117	107	Input Ports
r4679	r4680
217	207
218	208	/* basic machine hardware */
219	209	MDRV_CPU_ADD("maincpu", HD6309, 3000000*4)      /* 24MHz/8? */
220		MDRV_CPU_PROGRAM_MAP(fastlane_readmem,fastlane_writemem)
	210	MDRV_CPU_PROGRAM_MAP(fastlane_map,0)
221	211	MDRV_CPU_VBLANK_INT_HACK(fastlane_interrupt,16)   /* 1 IRQ + ??? NMI (generated by the 007121) */
222	212
223	213	/* video hardware */

src/mame/drivers/gamecstl.c

r4679	r4680
379	379	{
380	380	UINT8 data = at_pages[offset % 0x10];
381	381
382		switch(offset % 8) {
	382	switch(offset % 8)
	383	{
383	384	case 1:
384	385	data = dma_offset[(offset / 8) & 1][2];
385	386	break;
r4679	r4680
401	402	{
402	403	at_pages[offset % 0x10] = data;
403	404
404		switch(offset % 8) {
	405	switch(offset % 8)
	406	{
405	407	case 1:
406	408	dma_offset[(offset / 8) & 1][2] = data;
407	409	break;
r4679	r4680
420	422
421	423	static DMA8237_MEM_READ( pc_dma_read_byte )
422	424	{
423		const address_space *space = cpu_get_address_space(device->machine->cpu[0], ADDRESS_SPACE_PROGRAM);
	425	const address_space *space = cputag_get_address_space(device->machine, "maincpu", ADDRESS_SPACE_PROGRAM);
424	426	offs_t page_offset = (((offs_t) dma_offset[0][channel]) << 16)
425	427	& 0xFF0000;
426	428
r4679	r4680
430	432
431	433	static DMA8237_MEM_WRITE( pc_dma_write_byte )
432	434	{
433		const address_space *space = cpu_get_address_space(device->machine->cpu[0], ADDRESS_SPACE_PROGRAM);
	435	const address_space *space = cputag_get_address_space(device->machine, "maincpu", ADDRESS_SPACE_PROGRAM);
434	436	offs_t page_offset = (((offs_t) dma_offset[0][channel]) << 16)
435	437	& 0xFF0000;
436	438
r4679	r4680
591	593	{
592	594	memory_set_bankptr(machine, 1, memory_region(machine, "user1") + 0x30000);
593	595
594		cpu_set_irq_callback(machine->cpu[0], irq_callback);
	596	cpu_set_irq_callback(cputag_get_cpu(machine, "maincpu"), irq_callback);
595	597	}
596	598
597	599
r4679	r4680
601	603	*
602	604	*************************************************************/
603	605
604		static PIC8259_SET_INT_LINE( gamecstl_pic8259_1_set_int_line ) {
605		cpu_set_input_line(device->machine->cpu[0], 0, interrupt ? HOLD_LINE : CLEAR_LINE);
	606	static PIC8259_SET_INT_LINE( gamecstl_pic8259_1_set_int_line )
	607	{
	608	cputag_set_input_line(device->machine, "maincpu", 0, interrupt ? HOLD_LINE : CLEAR_LINE);
606	609	}
607	610
608	611
609		static PIC8259_SET_INT_LINE( gamecstl_pic8259_2_set_int_line ) {
	612	static PIC8259_SET_INT_LINE( gamecstl_pic8259_2_set_int_line )
	613	{
610	614	pic8259_set_irq_line( gamecstl_devices.pic8259_1, 2, interrupt);
611	615	}
612	616
r4679	r4680
694	698
695	699	static void set_gate_a20(running_machine *machine, int a20)
696	700	{
697		cpu_set_input_line(machine->cpu[0], INPUT_LINE_A20, a20);
	701	cputag_set_input_line(machine, "maincpu", INPUT_LINE_A20, a20);
698	702	}
699	703
700	704	static void keyboard_interrupt(running_machine *machine, int state)
r4679	r4680
707	711	pic8259_set_irq_line( gamecstl_devices.pic8259_2, 6, state);
708	712	}
709	713
710		static int gamecstl_get_out2(running_machine *machine) {
	714	static int gamecstl_get_out2(running_machine *machine)
	715	{
711	716	return pit8253_get_output( gamecstl_devices.pit8254, 2 );
712	717	}
713	718
r4679	r4680
716	721	KBDC8042_AT386, set_gate_a20, keyboard_interrupt, gamecstl_get_out2
717	722	};
718	723
719		static void gamecstl_set_keyb_int(running_machine *machine, int state) {
	724	static void gamecstl_set_keyb_int(running_machine *machine, int state)
	725	{
720	726	pic8259_set_irq_line(gamecstl_devices.pic8259_1, 1, state);
721	727	}
722	728
723	729	static DRIVER_INIT( gamecstl )
724	730	{
725		bios_ram = auto_malloc(0x10000);
	731	bios_ram = auto_alloc_array(machine, UINT32, 0x10000/4);
726	732
727	733	init_pc_common(machine, PCCOMMON_KEYBOARD_AT, gamecstl_set_keyb_int);
728	734	mc146818_init(machine, MC146818_STANDARD);
r4679	r4680
761	767
762	768	GAME(2002, gamecstl, 0,   gamecstl, gamecstl, gamecstl,   ROT0,   "Cristaltec",  "GameCristal", GAME_NOT_WORKING | GAME_NO_SOUND)
763	769	GAME(2002, gamecst2, gamecstl, gamecstl, gamecstl, gamecstl, ROT0, "Cristaltec", "GameCristal (version 2.613)", GAME_NOT_WORKING | GAME_NO_SOUND)
764

src/mame/drivers/kangaroo.c

r4679	r4680
187	187	static MACHINE_START( kangaroo_mcu )
188	188	{
189	189	MACHINE_START_CALL(kangaroo);
190		memory_install_readwrite8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xef00, 0xefff, 0, 0, mcu_sim_r, mcu_sim_w);
	190	memory_install_readwrite8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xef00, 0xefff, 0, 0, mcu_sim_r, mcu_sim_w);
191	191	kangaroo_clock = 0;
192	192	}
193	193
r4679	r4680
205	205	/* the copy protection. */
206	206	/* Anyway, what I do here is just immediately generate the NMI, so the game */
207	207	/* properly starts. */
208		cpu_set_input_line(machine->cpu[0], INPUT_LINE_NMI, PULSE_LINE);
	208	cputag_set_input_line(machine, "maincpu", INPUT_LINE_NMI, PULSE_LINE);
209	209	}
210	210
211	211

src/mame/drivers/cabal.c

r4679	r4680
118	118
119	119	static WRITE16_HANDLER( cabalbl_sound_irq_trigger_word_w )
120	120	{
121		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_NMI, PULSE_LINE );
	121	cputag_set_input_line(space->machine, "audiocpu", INPUT_LINE_NMI, PULSE_LINE );
122	122	}
123	123
124	124
r4679	r4680
464	464
465	465	static void irqhandler(const device_config *device, int irq)
466	466	{
467		cpu_set_input_line(device->machine->cpu[1],0,irq ? ASSERT_LINE : CLEAR_LINE);
	467	cputag_set_input_line(device->machine, "audiocpu", 0, irq ? ASSERT_LINE : CLEAR_LINE);
468	468	}
469	469
470	470	static const ym2151_interface cabalbl_ym2151_interface =
r4679	r4680
786	786	ROM_END
787	787
788	788
	789	// alternate bootleg
	790	// this is much closer to the original, the only real difference is the soundcpu has been pre-decrypted,
	791	// with the encrypted/decrypted data split across the rom
	792	// based on stickers present on the board it appears to have been manufactured by 'TAB-Austria' and is marked 'CA02'
789	793
	794	ROM_START( cabalbl2 )
	795	ROM_REGION( 0x50000, "maincpu", 0 )   /* 64k for cpu code */
	796	ROM_LOAD16_BYTE( "c9.bin",    0x00000, 0x10000, CRC(00abbe0c) SHA1(bacf17444abfb4f56248ff56e37b0aa2b1a3800d) )
	797	ROM_LOAD16_BYTE( "c7.bin",    0x00001, 0x10000, CRC(44736281) SHA1(1d6da95ef96d9c02aea70791e1cb87b70097d5ed) )
	798	ROM_LOAD16_BYTE( "c8.bin",    0x20000, 0x10000, CRC(d763a47c) SHA1(146d8082a404b6eddaf2dc9ba41a997949c17f8a) )
	799	ROM_LOAD16_BYTE( "c6.bin",    0x20001, 0x10000, CRC(96d5e8af) SHA1(ed7d854f08e87db5ae6cf526eafa029dfd2bfb9f) )
	800
	801	ROM_REGION( 0x10000, "audiocpu", 0 )   /* 64k for sound cpu code */
	802	ROM_LOAD( "c4.bin",    0x2000, 0x2000, CRC(82f9f296) SHA1(2769ffdc28f003684e77d4806be07b87d50be31c) )
	803	ROM_CONTINUE(0x0000,0x2000)
	804	ROM_IGNORE(0x4000)
	805	ROM_LOAD( "c3.bin",    0x8000, 0x8000,  CRC(d9defcbf) SHA1(f26b10b1dbe5aa6446f70fd18e5f1379455578ec) )
	806
	807	ROM_REGION( 0x4000,  "gfx1", ROMREGION_DISPOSE )
	808	ROM_LOAD( "c5.bin",           0x00000, 0x04000, CRC(183e4834) SHA1(05ab0c388be8701930a9de437978206cda6fed68) ) /* characters */
	809	ROM_CONTINUE(0x0000,0x4000)
	810
	811	ROM_REGION( 0x80000, "gfx2", ROMREGION_DISPOSE )
	812	ROM_LOAD16_BYTE( "c14.bin",   0x00000, 0x10000, CRC(1023319b) SHA1(38fcc8159776b82779b3163329b07c61be939fae) )
	813	ROM_LOAD16_BYTE( "c10.bin",   0x00001, 0x10000, CRC(3b6d2b09) SHA1(4cdcd22836dce4ee6348c4e6df7c6360d12ef912) )
	814	ROM_LOAD16_BYTE( "c15.bin",   0x20000, 0x10000, CRC(420b0801) SHA1(175be6e3ca3cb98672e4cdbc9b5f5b007bc531c9) )
	815	ROM_LOAD16_BYTE( "c11.bin",   0x20001, 0x10000, CRC(77bc7a60) SHA1(4d148241835f6a6b63f66494636c09a1fc1d3c06) )
	816	ROM_LOAD16_BYTE( "c16.bin",   0x40000, 0x10000, CRC(543fcb37) SHA1(78c40f6a78a8b9ca9f73fc67fc87f78b15e7abbe) )
	817	ROM_LOAD16_BYTE( "c12.bin",   0x40001, 0x10000, CRC(0bc50075) SHA1(565eb59b41f71fb69f62397f9747f5ae18b83009) )
	818	ROM_LOAD16_BYTE( "c17.bin",   0x60000, 0x10000, CRC(d28d921e) SHA1(e133de5129a33ca9ff449948a959621bbfc58c11) )
	819	ROM_LOAD16_BYTE( "c13.bin",   0x60001, 0x10000, CRC(67e4fe47) SHA1(15620fc5e985a249677da333b77331e40d2b24ab) )
	820
	821	ROM_REGION( 0x80000, "gfx3", ROMREGION_DISPOSE )
	822	ROM_LOAD16_BYTE( "c18.bin",   0x00000, 0x10000, CRC(34d3cac8) SHA1(a6a2304fb576267db2c72cfbf0a3f66740ebe60e) )
	823	ROM_LOAD16_BYTE( "c22.bin",   0x00001, 0x10000, CRC(4e49c28e) SHA1(ea74443a9423b14611a1f97e44692badfedd0ead) )
	824	ROM_LOAD16_BYTE( "c19.bin",   0x20000, 0x10000, CRC(7065e840) SHA1(baa8cd28be60c678d782ecfabde6cd5e36480415) )
	825	ROM_LOAD16_BYTE( "c23.bin",   0x20001, 0x10000, CRC(6a0e739d) SHA1(e3f4f5b4587f573426ec00417f33e94a257c77e6) )
	826	ROM_LOAD16_BYTE( "c20.bin",   0x40000, 0x10000, CRC(0e1ec30e) SHA1(4b1f092fc1e92da0f92e55d1548db7961a13f717) )
	827	ROM_LOAD16_BYTE( "c24.bin",   0x40001, 0x10000, CRC(581a50c1) SHA1(5afd65c15a0a63a54727e6d882011f0718a9fefc) )
	828	ROM_LOAD16_BYTE( "c21.bin",   0x60000, 0x10000, CRC(55c44764) SHA1(7fad1f2084664b5b4d1384c8081371b0c79c4f5e) )
	829	ROM_LOAD16_BYTE( "c25.bin",   0x60001, 0x10000, CRC(702735c9) SHA1(e4ac799dc85ff5b7c8e578611605989c78f9e8b3) )
	830
	831	ROM_REGION( 0x20000, "adpcm", 0 )   /* Samples */
	832	ROM_LOAD( "c2.bin",           0x00000, 0x10000, CRC(850406b4) SHA1(23ac1650c6d6f35607a5264b3aa89868401a645a) )
	833	ROM_LOAD( "c1.bin",           0x10000, 0x10000, CRC(8b3e0789) SHA1(b1450db1b1bada237c90930623e4def321099f13) )
	834	ROM_END
	835
	836
	837
	838	void seibu_sound_bootleg(running_machine *machine,const char *cpu,int length)
	839	{
	840	const address_space *space = cputag_get_address_space(machine, cpu, ADDRESS_SPACE_PROGRAM);
	841	UINT8 *decrypt = auto_alloc_array(machine, UINT8, length);
	842	UINT8 *rom = memory_region(machine, cpu);
	843
	844	memory_set_decrypted_region(space, 0x0000, (length < 0x10000) ? (length - 1) : 0x1fff, decrypt);
	845
	846	memcpy(decrypt, rom+length, length);
	847
	848	if (length > 0x10000)
	849	memory_configure_bank_decrypted(machine, 1, 0, (length - 0x10000) / 0x8000, decrypt + 0x10000, 0x8000);
	850	}
	851
	852
	853
790	854	static DRIVER_INIT( cabal )
791	855	{
792	856	seibu_sound_decrypt(machine,"audiocpu",0x2000);
793	857	seibu_adpcm_decrypt(machine,"adpcm");
794	858	}
795	859
	860	static DRIVER_INIT( cabalbl2 )
	861	{
	862	seibu_sound_bootleg(machine,"audiocpu",0x2000);
	863	seibu_adpcm_decrypt(machine,"adpcm");
	864	}
796	865
797		GAME( 1988, cabal,   0,     cabal,   cabalj,   cabal,  ROT0, "Tad Corporation", "Cabal (World, Joystick version)", 0 )
798		GAME( 1989, cabala,  cabal, cabal,   cabalj,   cabal,  ROT0, "Tad Corporation (Alpha Trading license)", "Cabal (Alpha Trading)", 0 ) // korea?
799		GAME( 1988, cabalbl, cabal, cabalbl, cabalbl,  0,      ROT0, "[Tad Corporation] (Red Corporation bootleg)", "Cabal (bootleg of Joystick version)", GAME_IMPERFECT_SOUND )
800	866
	867	GAME( 1988, cabal,   0,     cabal,   cabalj,   cabal,   ROT0, "Tad Corporation", "Cabal (World, Joystick version)", 0 )
	868	GAME( 1989, cabala,  cabal, cabal,   cabalj,   cabal,   ROT0, "Tad Corporation (Alpha Trading license)", "Cabal (Alpha Trading)", 0 ) // korea?
	869	GAME( 1988, cabalbl, cabal, cabalbl, cabalbl,  0,       ROT0, "[Tad Corporation] (Red Corporation bootleg)", "Cabal (bootleg of Joystick version, set 1, alternate sound hardware)", GAME_IMPERFECT_SOUND )
	870	GAME( 1988, cabalbl2,cabal, cabal,   cabalj,   cabalbl2,ROT0, "bootleg", "Cabal (bootleg of Joystick version, set 2)", 0 )
	871
801	872	GAME( 1988, cabalus, cabal, cabal,   cabalt,   cabal,  ROT0, "Tad (Fabtek license)", "Cabal (US set 1, Trackball version)", 0 )
802	873	GAME( 1988, cabalus2,cabal, cabal,   cabalt,   cabal,  ROT0, "Tad (Fabtek license)", "Cabal (US set 2, Trackball version)", 0 )

src/mame/drivers/cidelsa.c

r4679	r4680
10	10
11	11	static CDP1802_MODE_READ( cidelsa_mode_r )
12	12	{
13		cidelsa_state *state = device->machine->driver_data;
	13	cidelsa_state *state = (cidelsa_state *)device->machine->driver_data;
14	14
15	15	return state->cdp1802_mode;
16	16	}
r4679	r4680
29	29
30	30	static CDP1802_Q_WRITE( cidelsa_q_w )
31	31	{
32		cidelsa_state *state = device->machine->driver_data;
	32	cidelsa_state *state = (cidelsa_state *)device->machine->driver_data;
33	33
34	34	state->cdp1802_q = level;
35	35	}
r4679	r4680
66	66
67	67	static WRITE8_DEVICE_HANDLER( draco_sound_g_w )
68	68	{
69		cidelsa_state *state = device->machine->driver_data;
	69	cidelsa_state *state = (cidelsa_state *)device->machine->driver_data;
70	70
71	71	/*
72	72
r4679	r4680
97	97
98	98	static READ8_HANDLER( draco_sound_in_r )
99	99	{
100		cidelsa_state *state = space->machine->driver_data;
	100	cidelsa_state *state = (cidelsa_state *)space->machine->driver_data;
101	101
102	102	return ~(state->draco_sound) & 0x07;
103	103	}
104	104
105	105	static READ8_HANDLER( draco_sound_ay8910_r )
106	106	{
107		cidelsa_state *state = space->machine->driver_data;
	107	cidelsa_state *state = (cidelsa_state *)space->machine->driver_data;
108	108
109	109	return state->draco_ay_latch;
110	110	}
111	111
112	112	static WRITE8_HANDLER( draco_sound_ay8910_w )
113	113	{
114		cidelsa_state *state = space->machine->driver_data;
	114	cidelsa_state *state = (cidelsa_state *)space->machine->driver_data;
115	115
116	116	state->draco_ay_latch = data;
117	117	}
r4679	r4680
171	171	7   SONIDO C -> COP402 IN2
172	172	*/
173	173
174		cidelsa_state *state = space->machine->driver_data;
	174	cidelsa_state *state = (cidelsa_state *)space->machine->driver_data;
175	175
176	176	state->draco_sound = (data & 0xe0) >> 5;
177	177	}
r4679	r4680
308	308
309	309	static CUSTOM_INPUT( cdp1869_pcb_r )
310	310	{
311		cidelsa_state *state = field->port->machine->driver_data;
	311	cidelsa_state *state = (cidelsa_state *)field->port->machine->driver_data;
312	312
313	313	return state->cdp1869_pcb;
314	314	}
315	315
316	316	static CUSTOM_INPUT( cdp1869_predisplay_r )
317	317	{
318		cidelsa_state *state = field->port->machine->driver_data;
	318	cidelsa_state *state = (cidelsa_state *)field->port->machine->driver_data;
319	319
320	320	return state->cdp1869_prd;
321	321	}
r4679	r4680
466	466
467	467	static TIMER_CALLBACK( set_cpu_mode )
468	468	{
469		cidelsa_state *state = machine->driver_data;
	469	cidelsa_state *state = (cidelsa_state *)machine->driver_data;
470	470
471	471	state->cdp1802_mode = CDP1802_MODE_RUN;
472	472	}
473	473
474	474	static MACHINE_START( cidelsa )
475	475	{
476		cidelsa_state *state = machine->driver_data;
	476	cidelsa_state *state = (cidelsa_state *)machine->driver_data;
477	477
478	478	/* reset the CPU */
479	479	state->cdp1802_mode = CDP1802_MODE_RESET;
r4679	r4680
485	485
486	486	static MACHINE_START( draco )
487	487	{
488		cidelsa_state *state = machine->driver_data;
	488	cidelsa_state *state = (cidelsa_state *)machine->driver_data;
489	489
490	490	MACHINE_START_CALL( cidelsa );
491	491

src/mame/drivers/tickee.c

r4679	r4680
58	58	static TIMER_CALLBACK( trigger_gun_interrupt )
59	59	{
60	60	/* fire the IRQ at the correct moment */
61		cpu_set_input_line(machine->cpu[0], param, ASSERT_LINE);
	61	cputag_set_input_line(machine, "maincpu", param, ASSERT_LINE);
62	62	}
63	63
64	64
65	65	static TIMER_CALLBACK( clear_gun_interrupt )
66	66	{
67	67	/* clear the IRQ on the next scanline? */
68		cpu_set_input_line(machine->cpu[0], param, CLEAR_LINE);
	68	cputag_set_input_line(machine, "maincpu", param, CLEAR_LINE);
69	69	}
70	70
71	71

src/mame/drivers/hotblock.c

r4679	r4680
117	117
118	118	static VIDEO_START(hotblock)
119	119	{
120		hotblock_pal=auto_malloc(0x10000);
	120	hotblock_pal=auto_alloc_array(machine, UINT8, 0x10000);
121	121	}
122	122
123	123	static VIDEO_UPDATE(hotblock)

src/mame/drivers/srmp5.c

r4679	r4680
577	577	static DRIVER_INIT(srmp5)
578	578	{
579	579	st0016_game=9;
580		tileram = (UINT16 *)auto_malloc(0x100000);
581		sprram  = (UINT16 *)auto_malloc(0x080000);
582		palram  = (UINT16 *)auto_malloc(0x040000);
	580	tileram = auto_alloc_array(machine, UINT16, 0x100000/2);
	581	sprram  = auto_alloc_array(machine, UINT16, 0x080000/2);
	582	palram  = auto_alloc_array(machine, UINT16, 0x040000/2);
583	583	#ifdef DEBUG_CHAR
584	584	memset(tileduty, 1, 0x2000);
585	585	#endif

src/mame/drivers/suprloco.c

r4679	r4680
32	32
33	33	static WRITE8_HANDLER( suprloco_soundport_w )
34	34	{
35		soundlatch_w(space,0,data);
36		cpu_set_input_line(space->machine->cpu[1],INPUT_LINE_NMI,PULSE_LINE);
	35	soundlatch_w(space, 0, data);
	36	cputag_set_input_line(space->machine, "audiocpu", INPUT_LINE_NMI, PULSE_LINE);
37	37	/* spin for a while to let the Z80 read the command (fixes hanging sound in Regulus) */
38	38	cpu_spinuntil_time(space->cpu, ATTOTIME_IN_USEC(50));
39	39	}

src/mame/drivers/m92.c

r4679	r4680
254	254	if (scanline == m92_raster_irq_position)
255	255	{
256	256	video_screen_update_partial(machine->primary_screen, scanline);
257		cpu_set_input_line_and_vector(machine->cpu[0], 0, HOLD_LINE, M92_IRQ_2);
	257	cputag_set_input_line_and_vector(machine, "maincpu", 0, HOLD_LINE, M92_IRQ_2);
258	258	}
259	259
260	260	/* VBLANK interrupt */
261	261	else if (scanline == video_screen_get_visible_area(machine->primary_screen)->max_y + 1)
262	262	{
263	263	video_screen_update_partial(machine->primary_screen, scanline);
264		cpu_set_input_line_and_vector(machine->cpu[0], 0, HOLD_LINE, M92_IRQ_0);
	264	cputag_set_input_line_and_vector(machine, "maincpu", 0, HOLD_LINE, M92_IRQ_0);
265	265	}
266	266
267	267	/* adjust for next scanline */
r4679	r4680
329	329	}
330	330
331	331	if (irqvector & 0x2)      /* YM2151 has precedence */
332		cpu_set_input_line_vector(machine->cpu[1], 0, 0x18);
	332	cpu_set_input_line_vector(cputag_get_cpu(machine, "soundcpu"), 0, 0x18);
333	333	else if (irqvector & 0x1)   /* V30 */
334		cpu_set_input_line_vector(machine->cpu[1], 0, 0x19);
	334	cpu_set_input_line_vector(cputag_get_cpu(machine, "soundcpu"), 0, 0x19);
335	335
336	336	if (irqvector == 0)   /* no IRQs pending */
337		cpu_set_input_line(machine->cpu[1], 0, CLEAR_LINE);
	337	cputag_set_input_line(machine, "soundcpu", 0, CLEAR_LINE);
338	338	else   /* IRQ pending */
339		cpu_set_input_line(machine->cpu[1], 0, ASSERT_LINE);
	339	cputag_set_input_line(machine, "soundcpu", 0, ASSERT_LINE);
340	340	}
341	341
342	342	static WRITE16_HANDLER( m92_soundlatch_w )
r4679	r4680
364	364	static WRITE16_HANDLER( m92_sound_status_w )
365	365	{
366	366	COMBINE_DATA(&sound_status);
367		cpu_set_input_line_and_vector(space->machine->cpu[0], 0, HOLD_LINE, M92_IRQ_3);
	367	cputag_set_input_line_and_vector(space->machine, "maincpu", 0, HOLD_LINE, M92_IRQ_3);
368	368	}
369	369
370	370	/*****************************************************************************/
r4679	r4680
910	910
911	911	void m92_sprite_interrupt(running_machine *machine)
912	912	{
913		cpu_set_input_line_and_vector(machine->cpu[0], 0, HOLD_LINE, M92_IRQ_1);
	913	cputag_set_input_line_and_vector(machine, "maincpu", 0, HOLD_LINE, M92_IRQ_1);
914	914	}
915	915
916	916	static MACHINE_DRIVER_START( m92 )
r4679	r4680
1968	1968
1969	1969	if (hasbanks)
1970	1970	{
1971		memcpy(RAM+0xffff0,RAM+0x7fff0,0x10); /* Start vector */
	1971	memcpy(RAM + 0xffff0, RAM + 0x7fff0, 0x10); /* Start vector */
1972	1972	bankaddress = 0xa0000; /* Initial bank */
1973	1973	set_m92_bank(machine);
1974	1974
1975	1975	/* Mirror used by In The Hunt for protection */
1976		memcpy(RAM+0xc0000,RAM+0x00000,0x10000);
1977		memory_set_bankptr(machine, 2,&RAM[0xc0000]);
	1976	memcpy(RAM + 0xc0000, RAM + 0x00000, 0x10000);
	1977	memory_set_bankptr(machine, 2, &RAM[0xc0000]);
1978	1978	}
1979	1979
1980	1980	RAM = memory_region(machine, "soundcpu");
1981		memcpy(RAM+0xffff0, RAM+0x1fff0, 0x10); /* Sound cpu Start vector */
	1981	memcpy(RAM + 0xffff0, RAM + 0x1fff0, 0x10); /* Sound cpu Start vector */
1982	1982
1983		m92_game_kludge=0;
1984		m92_irq_vectorbase=0x80;
1985		m92_sprite_buffer_busy=1;
	1983	m92_game_kludge = 0;
	1984	m92_irq_vectorbase = 0x80;
	1985	m92_sprite_buffer_busy = 1;
1986	1986
1987	1987	setvector_callback(machine, NULL, VECTOR_INIT);
1988	1988	}
r4679	r4680
2015	2015	static DRIVER_INIT( rtypeleo )
2016	2016	{
2017	2017	init_m92(machine, 1);
2018		m92_irq_vectorbase=0x20;
	2018	m92_irq_vectorbase = 0x20;
2019	2019	}
2020	2020
2021	2021	static DRIVER_INIT( rtypelej )
2022	2022	{
2023	2023	init_m92(machine, 1);
2024		m92_irq_vectorbase=0x20;
	2024	m92_irq_vectorbase = 0x20;
2025	2025	}
2026	2026
2027	2027	static DRIVER_INIT( majtitl2 )
r4679	r4680
2029	2029	init_m92(machine, 1);
2030	2030
2031	2031	/* This game has an eprom on the game board */
2032		memory_install_readwrite16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xf0000, 0xf3fff, 0, 0, m92_eeprom_r, m92_eeprom_w);
	2032	memory_install_readwrite16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xf0000, 0xf3fff, 0, 0, m92_eeprom_r, m92_eeprom_w);
2033	2033
2034		m92_game_kludge=2;
	2034	m92_game_kludge = 2;
2035	2035	}
2036	2036
2037	2037	static DRIVER_INIT( kaiteids )
r4679	r4680
2048	2048	static DRIVER_INIT( lethalth )
2049	2049	{
2050	2050	init_m92(machine, 0);
2051		m92_irq_vectorbase=0x20;
	2051	m92_irq_vectorbase = 0x20;
2052	2052
2053	2053	/* NOP out the bankswitcher */
2054		memory_install_write16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_IO), 0x20, 0x21, 0, 0, SMH_NOP);
	2054	memory_install_write16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_IO), 0x20, 0x21, 0, 0, (write16_space_func)SMH_NOP);
2055	2055	}
2056	2056
2057	2057	static DRIVER_INIT( nbbatman )
r4679	r4680
2060	2060
2061	2061	init_m92(machine, 1);
2062	2062
2063		memcpy(RAM+0x80000,RAM+0x100000,0x20000);
	2063	memcpy(RAM + 0x80000, RAM + 0x100000, 0x20000);
2064	2064	}
2065	2065
2066	2066	static DRIVER_INIT( ssoldier )
2067	2067	{
2068	2068	init_m92(machine, 1);
2069		m92_irq_vectorbase=0x20;
	2069	m92_irq_vectorbase = 0x20;
2070	2070	/* main CPU expects an answer even before writing the first command */
2071	2071	sound_status = 0x80;
2072	2072	}
r4679	r4680
2074	2074	static DRIVER_INIT( psoldier )
2075	2075	{
2076	2076	init_m92(machine, 1);
2077		m92_irq_vectorbase=0x20;
	2077	m92_irq_vectorbase = 0x20;
2078	2078	/* main CPU expects an answer even before writing the first command */
2079	2079	sound_status = 0x80;
2080	2080	}
r4679	r4680
2088	2088	{
2089	2089	UINT8 *RAM = memory_region(machine, "maincpu");
2090	2090	init_m92(machine, 1);
2091		memcpy(RAM+0x80000,RAM+0x100000,0x20000);
	2091	memcpy(RAM + 0x80000, RAM + 0x100000, 0x20000);
2092	2092	}
2093	2093
2094	2094	/***************************************************************************/

src/mame/drivers/vendetta.c

r4679	r4680
209	209	{
210	210	if ( select & 1 )
211	211	{
212		memory_install_readwrite8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), video_banking_base + 0x2000, video_banking_base + 0x2fff, 0, 0, SMH_BANK4, paletteram_xBBBBBGGGGGRRRRR_be_w );
213		memory_install_readwrite8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), video_banking_base + 0x0000, video_banking_base + 0x0fff, 0, 0, K053247_r, K053247_w );
	212	memory_install_readwrite8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), video_banking_base + 0x2000, video_banking_base + 0x2fff, 0, 0, (read8_space_func)SMH_BANK(4), paletteram_xBBBBBGGGGGRRRRR_be_w );
	213	memory_install_readwrite8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), video_banking_base + 0x0000, video_banking_base + 0x0fff, 0, 0, K053247_r, K053247_w );
214	214	memory_set_bankptr(machine, 4, paletteram);
215	215	}
216	216	else
217	217	{
218		memory_install_readwrite8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), video_banking_base + 0x2000, video_banking_base + 0x2fff, 0, 0, vendetta_K052109_r, vendetta_K052109_w );
219		memory_install_readwrite8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), video_banking_base + 0x0000, video_banking_base + 0x0fff, 0, 0, K052109_r, K052109_w );
	218	memory_install_readwrite8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), video_banking_base + 0x2000, video_banking_base + 0x2fff, 0, 0, vendetta_K052109_r, vendetta_K052109_w );
	219	memory_install_readwrite8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), video_banking_base + 0x0000, video_banking_base + 0x0fff, 0, 0, K052109_r, K052109_w );
220	220	}
221	221	}
222	222
r4679	r4680
239	239
240	240	static TIMER_CALLBACK( z80_nmi_callback )
241	241	{
242		cpu_set_input_line(machine->cpu[1], INPUT_LINE_NMI, ASSERT_LINE );
	242	cputag_set_input_line(machine, "audiocpu", INPUT_LINE_NMI, ASSERT_LINE );
243	243	}
244	244
245	245	static WRITE8_HANDLER( z80_arm_nmi_w )
246	246	{
247		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_NMI, CLEAR_LINE );
	247	cputag_set_input_line(space->machine, "audiocpu", INPUT_LINE_NMI, CLEAR_LINE );
248	248
249	249	timer_set( space->machine, ATTOTIME_IN_USEC( 25 ), NULL, 0, z80_nmi_callback );
250	250	}
251	251
252	252	static WRITE8_HANDLER( z80_irq_w )
253	253	{
254		cpu_set_input_line_and_vector(space->machine->cpu[1], 0, HOLD_LINE, 0xff );
	254	cputag_set_input_line_and_vector(space->machine, "audiocpu", 0, HOLD_LINE, 0xff );
255	255	}
256	256
257	257	static READ8_HANDLER( vendetta_sound_interrupt_r )
258	258	{
259		cpu_set_input_line_and_vector(space->machine->cpu[1], 0, HOLD_LINE, 0xff );
	259	cputag_set_input_line_and_vector(space->machine, "audiocpu", 0, HOLD_LINE, 0xff );
260	260	return 0x00;
261	261	}
262	262
r4679	r4680
701	701
702	702	static MACHINE_RESET( vendetta )
703	703	{
704		konami_configure_set_lines(machine->cpu[0], vendetta_banking);
	704	konami_configure_set_lines(cputag_get_cpu(machine, "maincpu"), vendetta_banking);
705	705
706	706	paletteram = &memory_region(machine, "maincpu")[0x48000];
707	707	irq_enabled = 0;

src/mame/drivers/fcombat.c

r4679	r4680
61	61	static INPUT_CHANGED( coin_inserted )
62	62	{
63	63	/* coin insertion causes an NMI */
64		cpu_set_input_line(field->port->machine->cpu[0], INPUT_LINE_NMI, newval ? CLEAR_LINE : ASSERT_LINE);
	64	cputag_set_input_line(field->port->machine, "maincpu", INPUT_LINE_NMI, newval ? CLEAR_LINE : ASSERT_LINE);
65	65	}
66	66
67	67
r4679	r4680
322	322	UINT8 *src, *dst, *temp;
323	323
324	324	/* allocate some temporary space */
325		temp = malloc_or_die(0x10000);
	325	temp = alloc_array_or_die(UINT8, 0x10000);
326	326
327	327	/* make a temporary copy of the character data */
328	328	src = temp;

src/mame/drivers/destroyr.c

r4679	r4680
39	39
40	40	if (destroyr_potmask[dial])
41	41	{
42		cpu_set_input_line(machine->cpu[0], INPUT_LINE_NMI, PULSE_LINE);
	42	cputag_set_input_line(machine, "maincpu", INPUT_LINE_NMI, PULSE_LINE);
43	43	}
44	44	}
45	45
r4679	r4680
88	88
89	89	static WRITE8_HANDLER( destroyr_interrupt_ack_w )
90	90	{
91		cpu_set_input_line(space->machine->cpu[0], 0, CLEAR_LINE);
	91	cputag_set_input_line(space->machine, "maincpu", 0, CLEAR_LINE);
92	92	}
93	93
94	94

src/mame/drivers/segas16b.c

r4679	r4680
950	950
951	951	static const segaic16_memory_map_entry rom_171_5358_info_small[] =
952	952	{
953		{ 0x3d/2, 0x00000, 0x04000, 0xffc000,      ~0, misc_io_r,             misc_io_w,             NULL,                  "I/O space" },
954		{ 0x39/2, 0x00000, 0x01000, 0xfff000,      ~0, SMH_BANK10,          segaic16_paletteram_w, &paletteram16,         "color RAM" },
955		{ 0x35/2, 0x00000, 0x10000, 0xfe0000,      ~0, SMH_BANK11,          segaic16_tileram_0_w,  &segaic16_tileram_0,   "tile RAM" },
956		{ 0x35/2, 0x10000, 0x01000, 0xfef000,      ~0, SMH_BANK12,          segaic16_textram_0_w,  &segaic16_textram_0,   "text RAM" },
957		{ 0x31/2, 0x00000, 0x00800, 0xfff800,      ~0, SMH_BANK13,          SMH_BANK13,          &segaic16_spriteram_0, "object RAM" },
958		{ 0x2d/2, 0x00000, 0x04000, 0xffc000,      ~0, SMH_BANK14,          SMH_BANK14,          &workram,              "work RAM" },
959		{ 0x29/2, 0x00000, 0x20000, 0xfe0000, 0x20000, SMH_BANK15,          SMH_UNMAP,           NULL,                  "ROM 2" },
960		{ 0x25/2, 0x00000, 0x20000, 0xfe0000, 0x10000, SMH_BANK16,          SMH_UNMAP,           NULL,                  "ROM 1" },
961		{ 0x21/2, 0x00000, 0x20000, 0xfe0000, 0x00000, SMH_BANK17,          SMH_UNMAP,           NULL,                  "ROM 0" },
	953	{ 0x3d/2, 0x00000, 0x04000, 0xffc000,      ~0, misc_io_r,                       misc_io_w,                        NULL,                  "I/O space" },
	954	{ 0x39/2, 0x00000, 0x01000, 0xfff000,      ~0, (read16_space_func)SMH_BANK(10), segaic16_paletteram_w,            &paletteram16,         "color RAM" },
	955	{ 0x35/2, 0x00000, 0x10000, 0xfe0000,      ~0, (read16_space_func)SMH_BANK(11), segaic16_tileram_0_w,             &segaic16_tileram_0,   "tile RAM" },
	956	{ 0x35/2, 0x10000, 0x01000, 0xfef000,      ~0, (read16_space_func)SMH_BANK(12), segaic16_textram_0_w,             &segaic16_textram_0,   "text RAM" },
	957	{ 0x31/2, 0x00000, 0x00800, 0xfff800,      ~0, (read16_space_func)SMH_BANK(13), (write16_space_func)SMH_BANK(13), &segaic16_spriteram_0, "object RAM" },
	958	{ 0x2d/2, 0x00000, 0x04000, 0xffc000,      ~0, (read16_space_func)SMH_BANK(14), (write16_space_func)SMH_BANK(14), &workram,              "work RAM" },
	959	{ 0x29/2, 0x00000, 0x20000, 0xfe0000, 0x20000, (read16_space_func)SMH_BANK(15), (write16_space_func)SMH_UNMAP,    NULL,                  "ROM 2" },
	960	{ 0x25/2, 0x00000, 0x20000, 0xfe0000, 0x10000, (read16_space_func)SMH_BANK(16), (write16_space_func)SMH_UNMAP,    NULL,                  "ROM 1" },
	961	{ 0x21/2, 0x00000, 0x20000, 0xfe0000, 0x00000, (read16_space_func)SMH_BANK(17), (write16_space_func)SMH_UNMAP,    NULL,                  "ROM 0" },
962	962	{ 0 }
963	963	};
964	964
965	965	static const segaic16_memory_map_entry rom_171_5358_info[] =
966	966	{
967		{ 0x3d/2, 0x00000, 0x04000, 0xffc000,      ~0, misc_io_r,             misc_io_w,             NULL,                  "I/O space" },
968		{ 0x39/2, 0x00000, 0x01000, 0xfff000,      ~0, SMH_BANK10,          segaic16_paletteram_w, &paletteram16,         "color RAM" },
969		{ 0x35/2, 0x00000, 0x10000, 0xfe0000,      ~0, SMH_BANK11,          segaic16_tileram_0_w,  &segaic16_tileram_0,   "tile RAM" },
970		{ 0x35/2, 0x10000, 0x01000, 0xfef000,      ~0, SMH_BANK12,          segaic16_textram_0_w,  &segaic16_textram_0,   "text RAM" },
971		{ 0x31/2, 0x00000, 0x00800, 0xfff800,      ~0, SMH_BANK13,          SMH_BANK13,          &segaic16_spriteram_0, "object RAM" },
972		{ 0x2d/2, 0x00000, 0x04000, 0xffc000,      ~0, SMH_BANK14,          SMH_BANK14,          &workram,              "work RAM" },
973		{ 0x29/2, 0x00000, 0x20000, 0xfe0000, 0x40000, SMH_BANK15,          SMH_UNMAP,           NULL,                  "ROM 2" },
974		{ 0x25/2, 0x00000, 0x20000, 0xfe0000, 0x20000, SMH_BANK16,          SMH_UNMAP,           NULL,                  "ROM 1" },
975		{ 0x21/2, 0x00000, 0x20000, 0xfe0000, 0x00000, SMH_BANK17,          SMH_UNMAP,           NULL,                  "ROM 0" },
	967	{ 0x3d/2, 0x00000, 0x04000, 0xffc000,      ~0, misc_io_r,                       misc_io_w,                        NULL,                  "I/O space" },
	968	{ 0x39/2, 0x00000, 0x01000, 0xfff000,      ~0, (read16_space_func)SMH_BANK(10), segaic16_paletteram_w,            &paletteram16,         "color RAM" },
	969	{ 0x35/2, 0x00000, 0x10000, 0xfe0000,      ~0, (read16_space_func)SMH_BANK(11), segaic16_tileram_0_w,             &segaic16_tileram_0,   "tile RAM" },
	970	{ 0x35/2, 0x10000, 0x01000, 0xfef000,      ~0, (read16_space_func)SMH_BANK(12), segaic16_textram_0_w,             &segaic16_textram_0,   "text RAM" },
	971	{ 0x31/2, 0x00000, 0x00800, 0xfff800,      ~0, (read16_space_func)SMH_BANK(13), (write16_space_func)SMH_BANK(13), &segaic16_spriteram_0, "object RAM" },
	972	{ 0x2d/2, 0x00000, 0x04000, 0xffc000,      ~0, (read16_space_func)SMH_BANK(14), (write16_space_func)SMH_BANK(14), &workram,              "work RAM" },
	973	{ 0x29/2, 0x00000, 0x20000, 0xfe0000, 0x40000, (read16_space_func)SMH_BANK(15), (write16_space_func)SMH_UNMAP,    NULL,                  "ROM 2" },
	974	{ 0x25/2, 0x00000, 0x20000, 0xfe0000, 0x20000, (read16_space_func)SMH_BANK(16), (write16_space_func)SMH_UNMAP,    NULL,                  "ROM 1" },
	975	{ 0x21/2, 0x00000, 0x20000, 0xfe0000, 0x00000, (read16_space_func)SMH_BANK(17), (write16_space_func)SMH_UNMAP,    NULL,                  "ROM 0" },
976	976	{ 0 }
977	977	};
978	978
979	979	static const segaic16_memory_map_entry rom_171_5704_info[] =
980	980	{
981		{ 0x3d/2, 0x00000, 0x04000, 0xffc000,      ~0, misc_io_r,             misc_io_w,             NULL,                  "I/O space" },
982		{ 0x39/2, 0x00000, 0x01000, 0xfff000,      ~0, SMH_BANK10,          segaic16_paletteram_w, &paletteram16,         "color RAM" },
983		{ 0x35/2, 0x00000, 0x10000, 0xfe0000,      ~0, SMH_BANK11,          segaic16_tileram_0_w,  &segaic16_tileram_0,   "tile RAM" },
984		{ 0x35/2, 0x10000, 0x01000, 0xfef000,      ~0, SMH_BANK12,          segaic16_textram_0_w,  &segaic16_textram_0,   "text RAM" },
985		{ 0x31/2, 0x00000, 0x00800, 0xfff800,      ~0, SMH_BANK13,          SMH_BANK13,          &segaic16_spriteram_0, "object RAM" },
986		{ 0x2d/2, 0x00000, 0x04000, 0xffc000,      ~0, SMH_BANK14,          SMH_BANK14,          &workram,              "work RAM" },
987		{ 0x29/2, 0x00000, 0x10000, 0xff0000,      ~0, NULL,                  rom_5704_bank_w,       NULL,                  "tile bank" },
988		{ 0x25/2, 0x00000, 0x80000, 0xfc0000, 0x80000, SMH_BANK16,          SMH_UNMAP,           NULL,                  "ROM 1" },
989		{ 0x21/2, 0x00000, 0x80000, 0xfc0000, 0x00000, SMH_BANK17,          SMH_UNMAP,           NULL,                  "ROM 0" },
	981	{ 0x3d/2, 0x00000, 0x04000, 0xffc000,      ~0, misc_io_r,                       misc_io_w,                        NULL,                  "I/O space" },
	982	{ 0x39/2, 0x00000, 0x01000, 0xfff000,      ~0, (read16_space_func)SMH_BANK(10), segaic16_paletteram_w,            &paletteram16,         "color RAM" },
	983	{ 0x35/2, 0x00000, 0x10000, 0xfe0000,      ~0, (read16_space_func)SMH_BANK(11), segaic16_tileram_0_w,             &segaic16_tileram_0,   "tile RAM" },
	984	{ 0x35/2, 0x10000, 0x01000, 0xfef000,      ~0, (read16_space_func)SMH_BANK(12), segaic16_textram_0_w,             &segaic16_textram_0,   "text RAM" },
	985	{ 0x31/2, 0x00000, 0x00800, 0xfff800,      ~0, (read16_space_func)SMH_BANK(13), (write16_space_func)SMH_BANK(13), &segaic16_spriteram_0, "object RAM" },
	986	{ 0x2d/2, 0x00000, 0x04000, 0xffc000,      ~0, (read16_space_func)SMH_BANK(14), (write16_space_func)SMH_BANK(14), &workram,              "work RAM" },
	987	{ 0x29/2, 0x00000, 0x10000, 0xff0000,      ~0, NULL,                            rom_5704_bank_w,                  NULL,                  "tile bank" },
	988	{ 0x25/2, 0x00000, 0x80000, 0xfc0000, 0x80000, (read16_space_func)SMH_BANK(16), (write16_space_func)SMH_UNMAP,    NULL,                  "ROM 1" },
	989	{ 0x21/2, 0x00000, 0x80000, 0xfc0000, 0x00000, (read16_space_func)SMH_BANK(17), (write16_space_func)SMH_UNMAP,    NULL,                  "ROM 0" },
990	990	{ 0 }
991	991	};
992	992
993	993	static const segaic16_memory_map_entry rom_atomicp_info[] =
994	994	{
995		{ 0x3d/2, 0x00000, 0x04000, 0xffc000,      ~0, misc_io_r,             misc_io_w,             NULL,                  "I/O space" },
996		{ 0x39/2, 0x00000, 0x01000, 0xfff000,      ~0, SMH_BANK10,          segaic16_paletteram_w, &paletteram16,         "color RAM" },
997		{ 0x35/2, 0x00000, 0x10000, 0xfe0000,      ~0, SMH_BANK11,          segaic16_tileram_0_w,  &segaic16_tileram_0,   "tile RAM" },
998		{ 0x35/2, 0x10000, 0x01000, 0xfef000,      ~0, SMH_BANK12,          segaic16_textram_0_w,  &segaic16_textram_0,   "text RAM" },
999		{ 0x31/2, 0x00000, 0x00800, 0xfff800,      ~0, SMH_BANK13,          SMH_BANK13,          &segaic16_spriteram_0, "object RAM" },
1000		{ 0x2d/2, 0x00000, 0x04000, 0xffc000,      ~0, SMH_BANK14,          SMH_BANK14,          &workram,              "work RAM" },
1001		{ 0x29/2, 0x00000, 0x10000, 0xff0000,      ~0, NULL,                  rom_5704_bank_w,       NULL,                  "tile bank" },
1002		{ 0x25/2, 0x00000, 0x10000, 0xff0000,      ~0, NULL,                  atomicp_sound_w,       NULL,                  "sound" },
1003		{ 0x21/2, 0x00000, 0x80000, 0xfc0000, 0x00000, SMH_BANK17,          SMH_UNMAP,           NULL,                  "ROM 0" },
	995	{ 0x3d/2, 0x00000, 0x04000, 0xffc000,      ~0, misc_io_r,                       misc_io_w,                        NULL,                  "I/O space" },
	996	{ 0x39/2, 0x00000, 0x01000, 0xfff000,      ~0, (read16_space_func)SMH_BANK(10), segaic16_paletteram_w,            &paletteram16,         "color RAM" },
	997	{ 0x35/2, 0x00000, 0x10000, 0xfe0000,      ~0, (read16_space_func)SMH_BANK(11), segaic16_tileram_0_w,             &segaic16_tileram_0,   "tile RAM" },
	998	{ 0x35/2, 0x10000, 0x01000, 0xfef000,      ~0, (read16_space_func)SMH_BANK(12), segaic16_textram_0_w,             &segaic16_textram_0,   "text RAM" },
	999	{ 0x31/2, 0x00000, 0x00800, 0xfff800,      ~0, (read16_space_func)SMH_BANK(13), (write16_space_func)SMH_BANK(13), &segaic16_spriteram_0, "object RAM" },
	1000	{ 0x2d/2, 0x00000, 0x04000, 0xffc000,      ~0, (read16_space_func)SMH_BANK(14), (write16_space_func)SMH_BANK(14), &workram,              "work RAM" },
	1001	{ 0x29/2, 0x00000, 0x10000, 0xff0000,      ~0, NULL,                            rom_5704_bank_w,                  NULL,                  "tile bank" },
	1002	{ 0x25/2, 0x00000, 0x10000, 0xff0000,      ~0, NULL,                            atomicp_sound_w,                  NULL,                  "sound" },
	1003	{ 0x21/2, 0x00000, 0x80000, 0xfc0000, 0x00000, (read16_space_func)SMH_BANK(17), (write16_space_func)SMH_UNMAP,    NULL,                  "ROM 0" },
1004	1004	{ 0 }
1005	1005	};
1006	1006
1007	1007	static const segaic16_memory_map_entry rom_171_5797_info[] =
1008	1008	{
1009		{ 0x3d/2, 0x00000, 0x04000, 0xffc000,      ~0, misc_io_r,             misc_io_w,             NULL,                  "I/O space" },
1010		{ 0x39/2, 0x00000, 0x01000, 0xfff000,      ~0, SMH_BANK10,          segaic16_paletteram_w, &paletteram16,         "color RAM" },
1011		{ 0x35/2, 0x00000, 0x10000, 0xfe0000,      ~0, SMH_BANK11,          segaic16_tileram_0_w,  &segaic16_tileram_0,   "tile RAM" },
1012		{ 0x35/2, 0x10000, 0x01000, 0xfef000,      ~0, SMH_BANK12,          segaic16_textram_0_w,  &segaic16_textram_0,   "text RAM" },
1013		{ 0x31/2, 0x00000, 0x00800, 0xfff800,      ~0, SMH_BANK13,          SMH_BANK13,          &segaic16_spriteram_0, "object RAM" },
1014		{ 0x2d/2, 0x00000, 0x04000, 0xffc000,      ~0, SMH_BANK14,          SMH_BANK14,          &workram,              "work RAM" },
1015		{ 0x29/2, 0x00000, 0x10000, 0xff0000,      ~0, unknown_rgn2_r,        unknown_rgn2_w,        NULL,                  "???" },
1016		{ 0x25/2, 0x00000, 0x04000, 0xffc000,      ~0, rom_5797_bank_math_r,  rom_5797_bank_math_w,  NULL,                  "tile bank/math" },
1017		{ 0x21/2, 0x00000, 0x80000, 0xf80000, 0x00000, SMH_BANK17,          SMH_UNMAP,           NULL,                  "ROM 0" },
	1009	{ 0x3d/2, 0x00000, 0x04000, 0xffc000,      ~0, misc_io_r,                       misc_io_w,                        NULL,                  "I/O space" },
	1010	{ 0x39/2, 0x00000, 0x01000, 0xfff000,      ~0, (read16_space_func)SMH_BANK(10), segaic16_paletteram_w,            &paletteram16,         "color RAM" },
	1011	{ 0x35/2, 0x00000, 0x10000, 0xfe0000,      ~0, (read16_space_func)SMH_BANK(11), segaic16_tileram_0_w,             &segaic16_tileram_0,   "tile RAM" },
	1012	{ 0x35/2, 0x10000, 0x01000, 0xfef000,      ~0, (read16_space_func)SMH_BANK(12), segaic16_textram_0_w,             &segaic16_textram_0,   "text RAM" },
	1013	{ 0x31/2, 0x00000, 0x00800, 0xfff800,      ~0, (read16_space_func)SMH_BANK(13), (write16_space_func)SMH_BANK(13), &segaic16_spriteram_0, "object RAM" },
	1014	{ 0x2d/2, 0x00000, 0x04000, 0xffc000,      ~0, (read16_space_func)SMH_BANK(14), (write16_space_func)SMH_BANK(14), &workram,              "work RAM" },
	1015	{ 0x29/2, 0x00000, 0x10000, 0xff0000,      ~0, unknown_rgn2_r,                  unknown_rgn2_w,                   NULL,                  "???" },
	1016	{ 0x25/2, 0x00000, 0x04000, 0xffc000,      ~0, rom_5797_bank_math_r,            rom_5797_bank_math_w,             NULL,                  "tile bank/math" },
	1017	{ 0x21/2, 0x00000, 0x80000, 0xf80000, 0x00000, (read16_space_func)SMH_BANK(17), (write16_space_func)SMH_UNMAP,    NULL,                  "ROM 0" },
1018	1018	{ 0 }
1019	1019	};
1020	1020
r4679	r4680
1039	1039	{
1040	1040	if (has_sound_cpu)
1041	1041	{
1042		const address_space *space = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM);
	1042	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
1043	1043	soundlatch_w(space, 0, data & 0xff);
1044		cpu_set_input_line(machine->cpu[1], 0, HOLD_LINE);
	1044	cputag_set_input_line(machine, "soundcpu", 0, HOLD_LINE);
1045	1045	}
1046	1046	}
1047	1047
r4679	r4680
1052	1052	rom_board = _rom_board;
1053	1053
1054	1054	/* allocate memory for regions not autmatically assigned */
1055		segaic16_spriteram_0 = auto_malloc(0x00800);
1056		paletteram16         = auto_malloc(0x01000);
1057		segaic16_tileram_0   = auto_malloc(0x10000);
1058		segaic16_textram_0   = auto_malloc(0x01000);
1059		workram              = auto_malloc(0x04000);
	1055	segaic16_spriteram_0 = auto_alloc_array(machine, UINT16, 0x00800/2);
	1056	paletteram16         = auto_alloc_array(machine, UINT16, 0x01000/2);
	1057	segaic16_tileram_0   = auto_alloc_array(machine, UINT16, 0x10000/2);
	1058	segaic16_textram_0   = auto_alloc_array(machine, UINT16, 0x01000/2);
	1059	workram              = auto_alloc_array(machine, UINT16, 0x04000/2);
1060	1060
1061	1061	/* init the memory mapper */
1062	1062	segaic16_memory_mapper_init(cputag_get_cpu(machine, "maincpu"), region_info_list[rom_board], sound_w, NULL);
r4679	r4680
1100	1100	segaic16_memory_mapper_config(machine, i8751_initial_config);
1101	1101	segaic16_tilemap_reset(machine, 0);
1102	1102
1103		fd1094_machine_init(machine->cpu[0]);
	1103	fd1094_machine_init(cputag_get_cpu(machine, "maincpu"));
1104	1104
1105	1105	/* if we have a fake i8751 handler, disable the actual 8751 */
1106	1106	if (i8751_vblank_hook != NULL)
r4679	r4680
1114	1114
1115	1115	static TIMER_CALLBACK( atomicp_sound_irq )
1116	1116	{
1117		cpu_set_input_line(machine->cpu[0], 2, HOLD_LINE);
	1117	cputag_set_input_line(machine, "maincpu", 2, HOLD_LINE);
1118	1118	}
1119	1119
1120	1120
r4679	r4680
1347	1347	static void upd7759_generate_nmi(const device_config *device, int state)
1348	1348	{
1349	1349	if (state)
1350		cpu_set_input_line(device->machine->cpu[1], INPUT_LINE_NMI, PULSE_LINE);
	1350	cputag_set_input_line(device->machine, "soundcpu", INPUT_LINE_NMI, PULSE_LINE);
1351	1351	}
1352	1352
1353	1353
r4679	r4680
1355	1355	static WRITE8_HANDLER( mcu_data_w )
1356	1356	{
1357	1357	mcu_data = data;
1358		generic_pulse_irq_line(space->machine->cpu[2], 1);
	1358	generic_pulse_irq_line(cputag_get_cpu(space->machine, "mcu"), 1);
1359	1359	}
1360	1360	#endif
1361	1361
r4679	r4680
1383	1383
1384	1384	static void altbeast_common_i8751_sim(running_machine *machine, offs_t soundoffs, offs_t inputoffs)
1385	1385	{
1386		const address_space *space = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM);
	1386	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
1387	1387	UINT16 temp;
1388	1388
1389	1389	/* signal a VBLANK to the main CPU */
1390		cpu_set_input_line(machine->cpu[0], 4, HOLD_LINE);
	1390	cputag_set_input_line(machine, "maincpu", 4, HOLD_LINE);
1391	1391
1392	1392	/* set tile banks */
1393	1393	rom_5704_bank_w(space, 1, workram[0x3094/2] & 0x00ff, 0x00ff);
r4679	r4680
1422	1422
1423	1423	static void ddux_i8751_sim(running_machine *machine)
1424	1424	{
1425		const address_space *space = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM);
	1425	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
1426	1426	UINT16 temp;
1427	1427
1428	1428	/* signal a VBLANK to the main CPU */
1429		cpu_set_input_line(machine->cpu[0], 4, HOLD_LINE);
	1429	cputag_set_input_line(machine, "maincpu", 4, HOLD_LINE);
1430	1430
1431	1431	/* process any new sound data */
1432	1432	temp = workram[0x0bd0/2];
r4679	r4680
1458	1458
1459	1459	static void goldnaxe_i8751_sim(running_machine *machine)
1460	1460	{
1461		const address_space *space = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM);
	1461	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
1462	1462	UINT16 temp;
1463	1463
1464	1464	/* signal a VBLANK to the main CPU */
1465		cpu_set_input_line(machine->cpu[0], 4, HOLD_LINE);
	1465	cputag_set_input_line(machine, "maincpu", 4, HOLD_LINE);
1466	1466
1467	1467	/* they periodically clear the data at 2cd8,2cda,2cdc,2cde and expect the MCU to fill it in */
1468	1468	if (workram[0x2cd8/2] == 0 && workram[0x2cda/2] == 0 && workram[0x2cdc/2] == 0 && workram[0x2cde/2] == 0)
r4679	r4680
1489	1489
1490	1490	static void tturf_i8751_sim(running_machine *machine)
1491	1491	{
1492		const address_space *space = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM);
	1492	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
1493	1493	UINT16 temp;
1494	1494
1495	1495	/* signal a VBLANK to the main CPU */
1496		cpu_set_input_line(machine->cpu[0], 4, HOLD_LINE);
	1496	cputag_set_input_line(machine, "maincpu", 4, HOLD_LINE);
1497	1497
1498	1498	/* process any new sound data */
1499	1499	temp = workram[0x01d0/2];
r4679	r4680
1512	1512
1513	1513	static void wb3_i8751_sim(running_machine *machine)
1514	1514	{
1515		const address_space *space = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM);
	1515	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
1516	1516	UINT16 temp;
1517	1517
1518	1518	/* signal a VBLANK to the main CPU */
1519		cpu_set_input_line(machine->cpu[0], 4, HOLD_LINE);
	1519	cputag_set_input_line(machine, "maincpu", 4, HOLD_LINE);
1520	1520
1521	1521	/* process any new sound data */
1522	1522	temp = workram[0x0008/2];
r4679	r4680
1530	1530
1531	1531	static void wrestwar_i8751_sim(running_machine *machine)
1532	1532	{
1533		const address_space *space = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM);
	1533	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
1534	1534	UINT16 temp;
1535	1535
1536	1536	/* signal a VBLANK to the main CPU */
1537		cpu_set_input_line(machine->cpu[0], 4, HOLD_LINE);
	1537	cputag_set_input_line(machine, "maincpu", 4, HOLD_LINE);
1538	1538
1539	1539	/* process any new sound data */
1540	1540	temp = workram[0x208e/2];

src/mame/drivers/feversoc.c

r4679	r4680
229	229
230	230	static INTERRUPT_GEN( feversoc_irq )
231	231	{
232		cpu_set_input_line(device->machine->cpu[0], 8, HOLD_LINE );
	232	cputag_set_input_line(device->machine, "maincpu", 8, HOLD_LINE );
233	233	}
234	234
235	235	static MACHINE_DRIVER_START( feversoc )

src/mame/drivers/wwfwfest.c

r4679	r4680
103	103	static WRITE16_HANDLER( wwfwfest_irq_ack_w )
104	104	{
105	105	if (offset == 0)
106		cpu_set_input_line(space->machine->cpu[0], 3, CLEAR_LINE);
	106	cputag_set_input_line(space->machine, "maincpu", 3, CLEAR_LINE);
107	107
108	108	else
109		cpu_set_input_line(space->machine->cpu[0], 2, CLEAR_LINE);
	109	cputag_set_input_line(space->machine, "maincpu", 2, CLEAR_LINE);
110	110	}
111	111
112	112	static WRITE16_HANDLER( wwfwfest_flipscreen_w )
r4679	r4680
166	166	static WRITE16_HANDLER ( wwfwfest_soundwrite )
167	167	{
168	168	soundlatch_w(space,1,data & 0xff);
169		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_NMI, PULSE_LINE );
	169	cputag_set_input_line(space->machine, "audiocpu", INPUT_LINE_NMI, PULSE_LINE );
170	170	}
171	171
172	172	/*******************************************************************************
r4679	r4680
178	178	/* DIPs are spread accross the other input ports */
179	179	static CUSTOM_INPUT( dsw_3f_r )
180	180	{
181		const char *tag = param;
	181	const char *tag = (const char *)param;
182	182	return input_port_read(field->port->machine, tag) & 0x3f;
183	183	}
184	184
185	185	static CUSTOM_INPUT( dsw_c0_r )
186	186	{
187		const char *tag = param;
	187	const char *tag = (const char *)param;
188	188	return (input_port_read(field->port->machine, tag) & 0xc0) >> 6;
189	189	}
190	190
r4679	r4680
352	352	{
353	353	if (scanline > 0)
354	354	video_screen_update_partial(timer->machine->primary_screen, scanline - 1);
355		cpu_set_input_line(timer->machine->cpu[0], 2, ASSERT_LINE);
	355	cputag_set_input_line(timer->machine, "maincpu", 2, ASSERT_LINE);
356	356	}
357	357
358	358	/* Vblank is raised on scanline 248 */
359	359	if (scanline == 248)
360	360	{
361	361	video_screen_update_partial(timer->machine->primary_screen, scanline - 1);
362		cpu_set_input_line(timer->machine->cpu[0], 3, ASSERT_LINE);
	362	cputag_set_input_line(timer->machine, "maincpu", 3, ASSERT_LINE);
363	363	}
364	364	}
365	365
r4679	r4680
371	371
372	372	static void dd3_ymirq_handler(const device_config *device, int irq)
373	373	{
374		cpu_set_input_line(device->machine->cpu[1], 0 , irq ? ASSERT_LINE : CLEAR_LINE );
	374	cputag_set_input_line(device->machine, "audiocpu", 0 , irq ? ASSERT_LINE : CLEAR_LINE );
375	375	}
376	376
377	377	static const ym2151_interface ym2151_config =
r4679	r4680
381	381
382	382	static VIDEO_EOF( wwfwfest )
383	383	{
384		const address_space *space = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM);
	384	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
385	385
386	386	buffer_spriteram16_w(space,0,0,0xffff);
387	387	}

src/mame/drivers/pktgaldx.c

r4679	r4680
47	47
48	48	bootleg todo:
49	49
50		Sound.
51	50	Fix GFX glitches in background of girls after each level.
52	51	Tidy up code.
53	52
r4679	r4680
80	79	static ADDRESS_MAP_START( pktgaldx_map, ADDRESS_SPACE_PROGRAM, 16 )
81	80	AM_RANGE(0x000000, 0x07ffff) AM_ROM
82	81
83		AM_RANGE(0x100000, 0x100fff) AM_READ(SMH_RAM) AM_WRITE(deco16_pf1_data_w) AM_BASE(&deco16_pf1_data)
84		AM_RANGE(0x102000, 0x102fff) AM_READ(SMH_RAM) AM_WRITE(deco16_pf2_data_w) AM_BASE(&deco16_pf2_data)
85		AM_RANGE(0x110000, 0x1107ff) AM_READ(SMH_RAM) AM_WRITE(SMH_RAM) AM_BASE(&deco16_pf1_rowscroll)
86		AM_RANGE(0x112000, 0x1127ff) AM_READ(SMH_RAM) AM_WRITE(SMH_RAM) AM_BASE(&deco16_pf2_rowscroll)
	82	AM_RANGE(0x100000, 0x100fff) AM_RAM_WRITE(deco16_pf1_data_w) AM_BASE(&deco16_pf1_data)
	83	AM_RANGE(0x102000, 0x102fff) AM_RAM_WRITE(deco16_pf2_data_w) AM_BASE(&deco16_pf2_data)
	84	AM_RANGE(0x110000, 0x1107ff) AM_RAM AM_BASE(&deco16_pf1_rowscroll)
	85	AM_RANGE(0x112000, 0x1127ff) AM_RAM AM_BASE(&deco16_pf2_rowscroll)
87	86
88	87	AM_RANGE(0x120000, 0x1207ff) AM_RAM AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)
89	88	AM_RANGE(0x130000, 0x130fff) AM_RAM_WRITE(deco16_nonbuffered_palette_w) AM_BASE(&paletteram16)
r4679	r4680
93	92	AM_RANGE(0x150000, 0x15000f) AM_DEVWRITE8("oki2", okim6295_w, 0x00ff)
94	93	AM_RANGE(0x150006, 0x150007) AM_DEVREAD8("oki2", okim6295_r, 0x00ff)
95	94
96		AM_RANGE(0x161800, 0x16180f) AM_WRITE(SMH_RAM) AM_BASE(&deco16_pf12_control)
	95	AM_RANGE(0x161800, 0x16180f) AM_WRITEONLY AM_BASE(&deco16_pf12_control)
97	96	AM_RANGE(0x164800, 0x164801) AM_DEVWRITE("oki2", pktgaldx_oki_bank_w)
98		AM_RANGE(0x167800, 0x167fff) AM_READ(deco16_104_pktgaldx_prot_r) AM_WRITE(deco16_104_pktgaldx_prot_w) AM_BASE(&deco16_prot_ram)
	97	AM_RANGE(0x167800, 0x167fff) AM_READWRITE(deco16_104_pktgaldx_prot_r,deco16_104_pktgaldx_prot_w) AM_BASE(&deco16_prot_ram)
99	98	AM_RANGE(0x170000, 0x17ffff) AM_RAM
100	99	ADDRESS_MAP_END
101	100
r4679	r4680
107	106	return 0xffff;
108	107	}
109	108
110		static WRITE16_HANDLER( paletteram16_xRGB_w )
111		{
112		int pen;
113		int r,g,b;
114		UINT32 paldat;
115
116		COMBINE_DATA(&paletteram16[offset]);
117
118		pen = offset/2;
119
120		paldat = (paletteram16[pen*2] << 16) | (paletteram16[pen*2+1] << 0);
121
122		r = ((paldat & 0x000000ff) >>0);
123		g = ((paldat & 0x0000ff00) >>8);
124		b = ((paldat & 0x00ff0000) >>16);
125
126		palette_set_color(space->machine,pen,MAKE_RGB(r,g,b));
127		}
128
129	109	static READ16_HANDLER( pckgaldx_protection_r )
130	110	{
131	111	logerror("pckgaldx_protection_r address %06x\n",cpu_get_pc(space->cpu));
132	112	return -1;
133	113	}
134	114
135
136
137		static ADDRESS_MAP_START( pktgaldb_readmem, ADDRESS_SPACE_PROGRAM, 16 )
138
139		AM_RANGE(0x000000, 0x0fffff) AM_READ(SMH_ROM)
140		AM_RANGE(0x100000, 0x100fff) AM_READ(SMH_RAM)
141		AM_RANGE(0x102000, 0x102fff) AM_READ(SMH_RAM)
142		AM_RANGE(0x130000, 0x130fff) AM_READ(SMH_RAM)
143		AM_RANGE(0x120000, 0x123fff) AM_READ(SMH_RAM)
144
145		AM_RANGE(0x140006, 0x140007) AM_READ(pckgaldx_unknown_r) // sound?
146		AM_RANGE(0x150006, 0x150007) AM_READ(pckgaldx_unknown_r) // sound?
147
148		//  AM_RANGE(0x160000, 0x167fff) AM_READ(SMH_RAM)
149		AM_RANGE(0x170000, 0x17ffff) AM_READ(SMH_RAM)
150
151	115	/*
152	116	cpu #0 (PC=0000A0DE): unmapped program memory word read from 00167DB2 & FFFF
153	117	cpu #0 (PC=00009DFA): unmapped program memory word read from 00167C4C & FFFF
r4679	r4680
158	122	cpu #0 (PC=0000923C): unmapped program memory word read from 00167DB2 & 00FF
159	123	*/
160	124
161		/* do the 300000 addresses somehow interact with the protection addresses on this bootleg? */
	125	/* do the 300000 addresses somehow interact with the protection addresses on this bootleg? */
	126	/* or maybe protection writes go to sound ... */
162	127
163		AM_RANGE(0x16500A, 0x16500b) AM_READ(pckgaldx_unknown_r)
	128	static ADDRESS_MAP_START( pktgaldb_map, ADDRESS_SPACE_PROGRAM, 16 )
	129	AM_RANGE(0x000000, 0x0fffff) AM_ROM
	130	AM_RANGE(0x100000, 0x100fff) AM_RAM AM_BASE(&pcktgaldb_fgram) // fgram on original?
	131	AM_RANGE(0x102000, 0x102fff) AM_RAM // bgram on original?
	132	AM_RANGE(0x120000, 0x123fff) AM_RAM AM_BASE(&pcktgaldb_sprites)
164	133
	134	AM_RANGE(0x130000, 0x130fff) AM_RAM // palette on original?
	135
	136	AM_RANGE(0x140000, 0x14000f) AM_DEVWRITE8("oki1", okim6295_w, 0x00ff)
	137	AM_RANGE(0x140006, 0x140007) AM_DEVREAD8("oki1", okim6295_r, 0x00ff)
	138	AM_RANGE(0x150000, 0x15000f) AM_DEVWRITE8("oki2", okim6295_w, 0x00ff)
	139	AM_RANGE(0x150006, 0x150007) AM_DEVREAD8("oki2", okim6295_r, 0x00ff)
	140
	141	//  AM_RANGE(0x160000, 0x167fff) AM_RAM
	142	AM_RANGE(0x164800, 0x164801) AM_DEVWRITE("oki2", pktgaldx_oki_bank_w)
	143	AM_RANGE(0x160000, 0x167fff) AM_WRITENOP
	144	AM_RANGE(0x16500a, 0x16500b) AM_READ(pckgaldx_unknown_r)
	145
165	146	/* should we really be using these to read the i/o in the BOOTLEG?
166	147	these look like i/o through protection ... */
167	148	AM_RANGE(0x167842, 0x167843) AM_READ_PORT("INPUTS")
r4679	r4680
171	152	AM_RANGE(0x167d10, 0x167d11) AM_READ(pckgaldx_protection_r) // check code at 6ea
172	153	AM_RANGE(0x167d1a, 0x167d1b) AM_READ(pckgaldx_protection_r) // check code at 7C4
173	154
174		AM_RANGE(0x300000, 0x30000f) AM_READ(SMH_RAM) // ??
	155	AM_RANGE(0x170000, 0x17ffff) AM_RAM
175	156
176		AM_RANGE(0x330000, 0x330bff) AM_READ(SMH_RAM)
177		ADDRESS_MAP_END
	157	AM_RANGE(0x300000, 0x30000f) AM_RAM // ??
178	158
179
180		static ADDRESS_MAP_START( pktgaldb_writemem, ADDRESS_SPACE_PROGRAM, 16 )
181
182		AM_RANGE(0x000000, 0x0fffff) AM_WRITE(SMH_ROM)
183		AM_RANGE(0x100000, 0x100fff) AM_WRITE(SMH_RAM) AM_BASE(&pcktgaldb_fgram) // fgram on original?
184		AM_RANGE(0x102000, 0x102fff) AM_WRITE(SMH_RAM) // bgram on original?
185		AM_RANGE(0x120000, 0x123fff) AM_WRITE(SMH_RAM)AM_BASE(&pcktgaldb_sprites)
186		AM_RANGE(0x130000, 0x130fff) AM_WRITE(SMH_RAM) // palette on original?
187		AM_RANGE(0x140000, 0x140003) AM_WRITE(SMH_RAM) // sound?
188		AM_RANGE(0x140008, 0x140009) AM_WRITE(SMH_RAM) // sound?
189		AM_RANGE(0x150000, 0x150003) AM_WRITE(SMH_RAM) // sound?
190
191		/* or maybe protection writes go to sound ... */
192		AM_RANGE(0x160000, 0x167fff) AM_WRITE(SMH_RAM)
193		//cpu #0 (PC=00009246): unmapped program memory word write to 00167942 = 0000 & FFFF
194		//cpu #0 (PC=0000924E): unmapped program memory word write to  = 0000 & FFFF
195		AM_RANGE(0x16500a, 0x16500b) AM_WRITE(SMH_RAM)
196		AM_RANGE(0x166800, 0x166801) AM_WRITE(SMH_RAM)
197		AM_RANGE(0x167942, 0x167943) AM_WRITE(SMH_RAM)
198
199		AM_RANGE(0x170000, 0x17ffff) AM_WRITE(SMH_RAM)
200
201		AM_RANGE(0x300000, 0x30000f) AM_WRITE(SMH_RAM)
202
203		AM_RANGE(0x330000, 0x330bff) AM_WRITE(paletteram16_xRGB_w) AM_BASE(&paletteram16) // extra colours?
	159	AM_RANGE(0x330000, 0x330bff) AM_RAM_WRITE(paletteram16_xbgr_word_be_w) AM_BASE(&paletteram16) // extra colours?
204	160	ADDRESS_MAP_END
205	161
	162
206	163	/**********************************************************************************/
207	164
208	165	static INPUT_PORTS_START( pktgaldx )
r4679	r4680
379	336	static MACHINE_DRIVER_START( pktgaldb )
380	337	/* basic machine hardware */
381	338	MDRV_CPU_ADD("maincpu", M68000, 16000000)
382		MDRV_CPU_PROGRAM_MAP(pktgaldb_readmem,pktgaldb_writemem)
	339	MDRV_CPU_PROGRAM_MAP(pktgaldb_map,0)
383	340	MDRV_CPU_VBLANK_INT("screen", irq6_line_hold)
384	341
385	342	/* video hardware */
r4679	r4680
397	354	MDRV_VIDEO_UPDATE(pktgaldb)
398	355
399	356	/* sound hardware */
	357	MDRV_SPEAKER_STANDARD_STEREO("lspeaker", "rspeaker")
	358
	359	MDRV_SOUND_ADD("oki1", OKIM6295, 32220000/32)
	360	MDRV_SOUND_CONFIG(okim6295_interface_pin7high)
	361	MDRV_SOUND_ROUTE(ALL_OUTPUTS, "lspeaker", 0.75)
	362	MDRV_SOUND_ROUTE(ALL_OUTPUTS, "rspeaker", 0.75)
	363
	364	MDRV_SOUND_ADD("oki2", OKIM6295, 32220000/16)
	365	MDRV_SOUND_CONFIG(okim6295_interface_pin7high)
	366	MDRV_SOUND_ROUTE(ALL_OUTPUTS, "lspeaker", 0.60)
	367	MDRV_SOUND_ROUTE(ALL_OUTPUTS, "rspeaker", 0.60)
400	368	MACHINE_DRIVER_END
401	369
402	370
r4679	r4680
441	409	ROM_LOAD16_BYTE ("4.bin", 0x00000, 0x80000, CRC(67ce30aa) SHA1(c5228ed19eebbfb6d5f7cbfcb99734d9fcd5aba3) )
442	410	ROM_LOAD16_BYTE( "5.bin", 0x00001, 0x80000, CRC(64cb4c33) SHA1(02f988f558113dd9a77079dee59e23583394fa98) )
443	411
444		ROM_REGION( 0x20000, "oki1", 0 ) /* Oki samples */
445		ROM_LOAD( "kg01.14f",    0x00000, 0x20000, CRC(8a106263) SHA1(229ab17403c2b8f4e89a90a8cda2f3c3a4b55d9e) ) // 1.bin on the bootleg
446
447	412	ROM_REGION( 0x400000, "gfx1", 0 )
448	413	ROM_LOAD16_BYTE( "11.bin",    0x000000, 0x80000, CRC(a8c8f1fd) SHA1(9fd5fa500967a1bd692abdbeef89ce195c8aecd4) )
449	414	ROM_LOAD16_BYTE( "6.bin",     0x000001, 0x80000, CRC(0e3335a1) SHA1(2d6899336302d222e8404dde159e64911a8f94e6) )
r4679	r4680
452	417	ROM_LOAD16_BYTE( "9.bin",     0x200001, 0x80000, CRC(078f371c) SHA1(5b510a0f7f50c55cce1ffcc8f2e9c3432b23e352) )
453	418	ROM_LOAD16_BYTE( "8.bin",     0x200000, 0x80000, CRC(40f5a032) SHA1(c2ad585ddbc3ef40c6214cb30b4d78a2cd0a9446) )
454	419
	420	ROM_REGION( 0x20000, "oki1", 0 ) /* Oki samples */
	421	ROM_LOAD( "kg01.14f",    0x00000, 0x20000, CRC(8a106263) SHA1(229ab17403c2b8f4e89a90a8cda2f3c3a4b55d9e) ) // 1.bin on the bootleg
	422
455	423	ROM_REGION( 0x100000, "oki2", 0 ) /* Oki samples (banked?) */
456	424	ROM_LOAD( "3.bin",    0x00000, 0x80000, CRC(4638747b) SHA1(56d79cd8d4d7b41b71f1e942b5a5bf1bafc5c6e7) )
457	425	ROM_LOAD( "2.bin",    0x80000, 0x80000, CRC(f841d995) SHA1(0ef2f8fd9be62b979862c3688e7aad34c7b0404d) )
r4679	r4680
467	435
468	436	GAME( 1992, pktgaldx, 0,        pktgaldx, pktgaldx, pktgaldx,  ROT0, "Data East Corporation", "Pocket Gal Deluxe (Euro v3.00)", 0 )
469	437	GAME( 1993, pktgaldj, pktgaldx, pktgaldx, pktgaldx, pktgaldx,  ROT0, "Nihon System",          "Pocket Gal Deluxe (Japan v3.00)", 0 )
470		GAME( 1992, pktgaldb, pktgaldx, pktgaldb, pktgaldx, 0,         ROT0, "bootleg",               "Pocket Gal Deluxe (Euro v3.00, bootleg)", GAME_IMPERFECT_GRAPHICS | GAME_NO_SOUND )
	438	GAME( 1992, pktgaldb, pktgaldx, pktgaldb, pktgaldx, 0,         ROT0, "bootleg",               "Pocket Gal Deluxe (Euro v3.00, bootleg)", GAME_IMPERFECT_GRAPHICS )

src/mame/drivers/timeplt.c

r4679	r4680
78	78	{
79	79	nmi_enable = data & 1;
80	80	if (!nmi_enable)
81		cpu_set_input_line(space->machine->cpu[0], INPUT_LINE_NMI, CLEAR_LINE);
	81	cputag_set_input_line(space->machine, "maincpu", INPUT_LINE_NMI, CLEAR_LINE);
82	82	}
83	83
84	84

src/mame/drivers/multigam.c

r4679	r4680
215	215	if ( --multigam3_mmc3_scanline_counter == -1 )
216	216	{
217	217	multigam3_mmc3_scanline_counter = multigam3_mmc3_scanline_latch;
218		generic_pulse_irq_line(device->machine->cpu[0], 0);
	218	generic_pulse_irq_line(cputag_get_cpu(device->machine, "maincpu"), 0);
219	219	}
220	220	}
221	221	}
r4679	r4680
368	368	memcpy(&dst[0x8000], &src[0xa0000 + 0x3c000], 0x4000);
369	369	memcpy(&dst[0xc000], &src[0xa0000 + 0x3c000], 0x4000);
370	370
371		memory_install_write8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x8000, 0xffff, 0, 0, multigam3_mmc3_rom_switch_w );
	371	memory_install_write8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x8000, 0xffff, 0, 0, multigam3_mmc3_rom_switch_w );
372	372
373	373	memory_set_bankptr(machine, 1, multigmc_mmc3_6000_ram);
374	374
r4679	r4680
535	535
536	536	static void ppu_irq( const device_config *device, int *ppu_regs )
537	537	{
538		cpu_set_input_line(device->machine->cpu[0], INPUT_LINE_NMI, PULSE_LINE );
	538	cputag_set_input_line(device->machine, "maincpu", INPUT_LINE_NMI, PULSE_LINE );
539	539	}
540	540
541	541	/* our ppu interface                                            */
r4679	r4680
575	575
576	576	static MACHINE_RESET( multigm3 )
577	577	{
578		const address_space *space = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM);
	578	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
579	579	/* reset the ppu */
580	580	multigm3_switch_prg_rom(space, 0, 0x01 );
581	581	};
r4679	r4680
703	703
704	704	static DRIVER_INIT( multigam )
705	705	{
706		const address_space *space = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM);
	706	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
707	707	multigam_switch_prg_rom( space, 0x0, 0x01 );
708	708	}
709	709
r4679	r4680
718	718
719	719	static DRIVER_INIT(multigm3)
720	720	{
721		const address_space *space = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM);
	721	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
722	722
723	723	const UINT8 decode[16]  = { 0x09, 0x08, 0x07, 0x06, 0x05, 0x04, 0x03, 0x02, 0x01, 0x00, 0x0f, 0x0e, 0x0d, 0x0c, 0x0b, 0x0a };
724	724
725	725	multigm3_decrypt(memory_region(machine, "maincpu"), memory_region_length(machine, "maincpu"), decode );
726	726	multigm3_decrypt(memory_region(machine, "user1"), memory_region_length(machine, "user1"), decode );
727	727
728		multigmc_mmc3_6000_ram = auto_malloc(0x2000);
	728	multigmc_mmc3_6000_ram = auto_alloc_array(machine, UINT8, 0x2000);
729	729
730	730	multigam_switch_prg_rom( space, 0x0, 0x01 );
731	731	}

src/mame/drivers/atarigx2.c

r4679	r4680
50	50
51	51	static void update_interrupts(running_machine *machine)
52	52	{
53		cpu_set_input_line(machine->cpu[0], 4, atarigen_video_int_state ? ASSERT_LINE : CLEAR_LINE);
54		cpu_set_input_line(machine->cpu[0], 5, atarigen_sound_int_state ? ASSERT_LINE : CLEAR_LINE);
	53	cputag_set_input_line(machine, "maincpu", 4, atarigen_video_int_state ? ASSERT_LINE : CLEAR_LINE);
	54	cputag_set_input_line(machine, "maincpu", 5, atarigen_sound_int_state ? ASSERT_LINE : CLEAR_LINE);
55	55	}
56	56
57	57
r4679	r4680
136	136
137	137	/* lower byte */
138	138	if (ACCESSING_BITS_16_23)
139		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_RESET, (data & 0x100000) ? CLEAR_LINE : ASSERT_LINE);
	139	cputag_set_input_line(space->machine, "jsa", INPUT_LINE_RESET, (data & 0x100000) ? CLEAR_LINE : ASSERT_LINE);
140	140	}
141	141
142	142
r4679	r4680
2107	2107	atarigx2_motion_object_base = 0x400;
2108	2108	atarigx2_motion_object_mask = 0x3ff;
2109	2109
2110		memory_install_read32_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xca0fc0, 0xca0fc3, 0, 0, rrreveng_prot_r);
	2110	memory_install_read32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xca0fc0, 0xca0fc3, 0, 0, rrreveng_prot_r);
2111	2111	}
2112	2112
2113	2113

src/mame/drivers/fuukifg2.c

r4679	r4680
84	84	if (ACCESSING_BITS_0_7)
85	85	{
86	86	soundlatch_w(space,0,data & 0xff);
87		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_NMI, PULSE_LINE);
	87	cputag_set_input_line(space->machine, "audiocpu", INPUT_LINE_NMI, PULSE_LINE);
88	88	//      cpu_spinuntil_time(space->cpu, ATTOTIME_IN_USEC(50));   // Allow the other CPU to reply
89	89	cpuexec_boost_interleave(space->machine, attotime_zero, ATTOTIME_IN_USEC(50)); // Fixes glitching in rasters
90	90	}
91	91	}
92	92
93		static ADDRESS_MAP_START( fuuki16_readmem, ADDRESS_SPACE_PROGRAM, 16 )
94		AM_RANGE(0x000000, 0x0fffff) AM_READ(SMH_ROM               )   // ROM
95		AM_RANGE(0x400000, 0x40ffff) AM_READ(SMH_RAM               )   // RAM
96		AM_RANGE(0x500000, 0x507fff) AM_READ(SMH_RAM               )   // Layers
97		AM_RANGE(0x600000, 0x601fff) AM_MIRROR(0x008000) AM_READ(SMH_RAM   )   // Sprites, mirrored?
98		AM_RANGE(0x700000, 0x703fff) AM_READ(SMH_RAM               )   // Palette
	93	static ADDRESS_MAP_START( fuuki16_map, ADDRESS_SPACE_PROGRAM, 16 )
	94	AM_RANGE(0x000000, 0x0fffff) AM_ROM                                                      // ROM
	95	AM_RANGE(0x400000, 0x40ffff) AM_RAM                                                      // RAM
	96	AM_RANGE(0x500000, 0x501fff) AM_RAM_WRITE(fuuki16_vram_0_w) AM_BASE(&fuuki16_vram_0)               // Layers
	97	AM_RANGE(0x502000, 0x503fff) AM_RAM_WRITE(fuuki16_vram_1_w) AM_BASE(&fuuki16_vram_1)               //
	98	AM_RANGE(0x504000, 0x505fff) AM_RAM_WRITE(fuuki16_vram_2_w) AM_BASE(&fuuki16_vram_2)               //
	99	AM_RANGE(0x506000, 0x507fff) AM_RAM_WRITE(fuuki16_vram_3_w) AM_BASE(&fuuki16_vram_3)               //
	100	AM_RANGE(0x600000, 0x601fff) AM_MIRROR(0x008000) AM_RAM AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)   // Sprites, mirrored?
	101	AM_RANGE(0x700000, 0x703fff) AM_RAM_WRITE(paletteram16_xRRRRRGGGGGBBBBB_word_w) AM_BASE(&paletteram16)   // Palette
99	102	AM_RANGE(0x800000, 0x800001) AM_READ_PORT("SYSTEM")
100	103	AM_RANGE(0x810000, 0x810001) AM_READ_PORT("P1_P2")
101	104	AM_RANGE(0x880000, 0x880001) AM_READ_PORT("DSW")
102		AM_RANGE(0x8c0000, 0x8c001f) AM_READ(SMH_RAM               )   // Video Registers
103		/**/AM_RANGE(0x8d0000, 0x8d0003) AM_READ(SMH_RAM             )   //
104		/**/AM_RANGE(0x8e0000, 0x8e0001) AM_READ(SMH_RAM             )   //
	105	AM_RANGE(0x8a0000, 0x8a0001) AM_WRITE(fuuki16_sound_command_w)                                 // To Sound CPU
	106	AM_RANGE(0x8c0000, 0x8c001f) AM_RAM_WRITE(fuuki16_vregs_w) AM_BASE(&fuuki16_vregs )                  // Video Registers
	107	/**/AM_RANGE(0x8d0000, 0x8d0003) AM_RAM AM_BASE(&fuuki16_unknown)                                 //
	108	/**/AM_RANGE(0x8e0000, 0x8e0001) AM_RAM AM_BASE(&fuuki16_priority)                                 //
105	109	ADDRESS_MAP_END
106	110
107		static ADDRESS_MAP_START( fuuki16_writemem, ADDRESS_SPACE_PROGRAM, 16 )
108		AM_RANGE(0x000000, 0x0fffff) AM_WRITE(SMH_ROM                     )   // ROM
109		AM_RANGE(0x400000, 0x40ffff) AM_WRITE(SMH_RAM                     )   // RAM
110		AM_RANGE(0x500000, 0x501fff) AM_WRITE(fuuki16_vram_0_w) AM_BASE(&fuuki16_vram_0   )   // Layers
111		AM_RANGE(0x502000, 0x503fff) AM_WRITE(fuuki16_vram_1_w) AM_BASE(&fuuki16_vram_1   )   //
112		AM_RANGE(0x504000, 0x505fff) AM_WRITE(fuuki16_vram_2_w) AM_BASE(&fuuki16_vram_2   )   //
113		AM_RANGE(0x506000, 0x507fff) AM_WRITE(fuuki16_vram_3_w) AM_BASE(&fuuki16_vram_3   )   //
114		AM_RANGE(0x506000, 0x507fff) AM_WRITE(SMH_RAM                     )   //
115		AM_RANGE(0x600000, 0x601fff) AM_MIRROR(0x008000) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16) AM_SIZE(&spriteram_size   )   // Sprites, mirrored?
116		AM_RANGE(0x700000, 0x703fff) AM_WRITE(paletteram16_xRRRRRGGGGGBBBBB_word_w) AM_BASE(&paletteram16   )   // Palette
117		AM_RANGE(0x8c0000, 0x8c001f) AM_WRITE(fuuki16_vregs_w) AM_BASE(&fuuki16_vregs )   // Video Registers
118		AM_RANGE(0x8a0000, 0x8a0001) AM_WRITE(fuuki16_sound_command_w         )   // To Sound CPU
119		AM_RANGE(0x8d0000, 0x8d0003) AM_WRITE(SMH_RAM) AM_BASE(&fuuki16_unknown      )   //
120		AM_RANGE(0x8e0000, 0x8e0001) AM_WRITE(SMH_RAM) AM_BASE(&fuuki16_priority      )   //
121		ADDRESS_MAP_END
122	111
123
124	112	/***************************************************************************
125	113
126	114
r4679	r4680
147	135	okim6295_set_bank_base(device, ((data & 6) >> 1) * 0x40000);
148	136	}
149	137
150		static ADDRESS_MAP_START( fuuki16_sound_readmem, ADDRESS_SPACE_PROGRAM, 8 )
151		AM_RANGE(0x0000, 0x5fff) AM_READ(SMH_ROM      )   // ROM
152		AM_RANGE(0x6000, 0x7fff) AM_READ(SMH_RAM      )   // RAM
153		AM_RANGE(0x8000, 0xffff) AM_READ(SMH_BANK1      )   // Banked ROM
	138	static ADDRESS_MAP_START( fuuki16_sound_map, ADDRESS_SPACE_PROGRAM, 8 )
	139	AM_RANGE(0x0000, 0x5fff) AM_ROM         // ROM
	140	AM_RANGE(0x6000, 0x7fff) AM_RAM         // RAM
	141	AM_RANGE(0x8000, 0xffff) AM_ROMBANK(1)   // Banked ROM
154	142	ADDRESS_MAP_END
155	143
156		static ADDRESS_MAP_START( fuuki16_sound_writemem, ADDRESS_SPACE_PROGRAM, 8 )
157		AM_RANGE(0x0000, 0x5fff) AM_WRITE(SMH_ROM      )   // ROM
158		AM_RANGE(0x6000, 0x7fff) AM_WRITE(SMH_RAM      )   // RAM
159		AM_RANGE(0x8000, 0xffff) AM_WRITE(SMH_ROM      )   // Banked ROM
160		ADDRESS_MAP_END
161
162	144	static ADDRESS_MAP_START( fuuki16_sound_io_map, ADDRESS_SPACE_IO, 8 )
163	145	ADDRESS_MAP_GLOBAL_MASK(0xff)
164	146	AM_RANGE(0x00, 0x00) AM_WRITE(fuuki16_sound_rombank_w    )   // ROM Bank
r4679	r4680
407	389
408	390	static void soundirq(const device_config *device, int state)
409	391	{
410		cpu_set_input_line(device->machine->cpu[1], 0, state);
	392	cputag_set_input_line(device->machine, "audiocpu", 0, state);
411	393	}
412	394
413	395	static const ym3812_interface fuuki16_ym3812_intf =
r4679	r4680
429	411
430	412	static TIMER_CALLBACK( level_1_interrupt_callback )
431	413	{
432		cpu_set_input_line(machine->cpu[0], 1, HOLD_LINE);
	414	cputag_set_input_line(machine, "maincpu", 1, HOLD_LINE);
433	415	timer_set(machine, video_screen_get_time_until_pos(machine->primary_screen, 248, 0), NULL, 0, level_1_interrupt_callback);
434	416	}
435	417
436	418
437	419	static TIMER_CALLBACK( vblank_interrupt_callback )
438	420	{
439		cpu_set_input_line(machine->cpu[0], 3, HOLD_LINE);   // VBlank IRQ
	421	cputag_set_input_line(machine, "maincpu", 3, HOLD_LINE);   // VBlank IRQ
440	422	timer_set(machine, video_screen_get_time_until_vblank_start(machine->primary_screen), NULL, 0, vblank_interrupt_callback);
441	423	}
442	424
443	425
444	426	static TIMER_CALLBACK( raster_interrupt_callback )
445	427	{
446		cpu_set_input_line(machine->cpu[0], 5, HOLD_LINE);   // Raster Line IRQ
	428	cputag_set_input_line(machine, "maincpu", 5, HOLD_LINE);   // Raster Line IRQ
447	429	video_screen_update_partial(machine->primary_screen, video_screen_get_vpos(machine->primary_screen));
448	430	timer_adjust_oneshot(raster_interrupt_timer, video_screen_get_frame_period(machine->primary_screen), 0);
449	431	}
r4679	r4680
469	451
470	452	/* basic machine hardware */
471	453	MDRV_CPU_ADD("maincpu", M68000, 16000000)
472		MDRV_CPU_PROGRAM_MAP(fuuki16_readmem,fuuki16_writemem)
	454	MDRV_CPU_PROGRAM_MAP(fuuki16_map,0)
473	455
474	456	MDRV_CPU_ADD("audiocpu", Z80, 3000000)   /* ? */
475		MDRV_CPU_PROGRAM_MAP(fuuki16_sound_readmem,fuuki16_sound_writemem)
	457	MDRV_CPU_PROGRAM_MAP(fuuki16_sound_map,0)
476	458	MDRV_CPU_IO_MAP(fuuki16_sound_io_map,0)
477	459
478	460	MDRV_MACHINE_START(fuuki16)

src/mame/drivers/nwk-tr.c

r4679	r4680
417	417	return 1;
418	418	}
419	419
420		K001604_char_ram[chip] = auto_malloc(0x200000);
	420	K001604_char_ram[chip] = auto_alloc_array(machine, UINT32, 0x200000/4);
421	421
422		K001604_tile_ram[chip] = auto_malloc(0x20000);
	422	K001604_tile_ram[chip] = auto_alloc_array(machine, UINT32, 0x20000/4);
423	423
424		K001604_reg[chip] = auto_malloc(0x400);
	424	K001604_reg[chip] = auto_alloc_array(machine, UINT32, 0x400/4);
425	425
426	426	if (chip == 0)
427	427	{
r4679	r4680
649	649
650	650	static void voodoo_vblank_0(const device_config *device, int param)
651	651	{
652		cpu_set_input_line(device->machine->cpu[0], INPUT_LINE_IRQ0, ASSERT_LINE);
	652	cputag_set_input_line(device->machine, "maincpu", INPUT_LINE_IRQ0, ASSERT_LINE);
653	653	}
654	654
655	655	static VIDEO_START( nwktr )
r4679	r4680
754	754	{
755	755	if (data & 0x80)   // CG Board 1 IRQ Ack
756	756	{
757		//cpu_set_input_line(space->machine->cpu[0], INPUT_LINE_IRQ1, CLEAR_LINE);
	757	//cputag_set_input_line(space->machine, "maincpu", INPUT_LINE_IRQ1, CLEAR_LINE);
758	758	}
759	759	if (data & 0x40)   // CG Board 0 IRQ Ack
760	760	{
761		//cpu_set_input_line(space->machine->cpu[0], INPUT_LINE_IRQ0, CLEAR_LINE);
	761	//cputag_set_input_line(space->machine, "maincpu", INPUT_LINE_IRQ0, CLEAR_LINE);
762	762	}
763	763	}
764	764	return;
r4679	r4680
770	770	static int lanc2_ram_w = 0;
771	771	static UINT8 *lanc2_ram;
772	772
773		static void lanc2_init(void)
	773	static void lanc2_init(running_machine *machine)
774	774	{
775	775	fpga_uploaded = 0;
776	776	lanc2_ram_r = 0;
777	777	lanc2_ram_w = 0;
778		lanc2_ram = auto_malloc(0x8000);
	778	lanc2_ram = auto_alloc_array(machine, UINT8, 0x8000);
779	779	}
780	780
781	781	static READ32_HANDLER( lanc1_r )
r4679	r4680
890	890	static MACHINE_START( nwktr )
891	891	{
892	892	/* set conservative DRC options */
893		ppcdrc_set_options(machine->cpu[0], PPCDRC_COMPATIBLE_OPTIONS);
	893	ppcdrc_set_options(cputag_get_cpu(machine, "maincpu"), PPCDRC_COMPATIBLE_OPTIONS);
894	894
895	895	/* configure fast RAM regions for DRC */
896		ppcdrc_add_fastram(machine->cpu[0], 0x00000000, 0x003fffff, FALSE, work_ram);
	896	ppcdrc_add_fastram(cputag_get_cpu(machine, "maincpu"), 0x00000000, 0x003fffff, FALSE, work_ram);
897	897	}
898	898
899	899	static ADDRESS_MAP_START( nwktr_map, ADDRESS_SPACE_PROGRAM, 32 )
r4679	r4680
1024	1024
1025	1025	static MACHINE_RESET( nwktr )
1026	1026	{
1027		cpu_set_input_line(machine->cpu[2], INPUT_LINE_RESET, ASSERT_LINE);
	1027	cputag_set_input_line(machine, "dsp", INPUT_LINE_RESET, ASSERT_LINE);
1028	1028	}
1029	1029
1030	1030	static MACHINE_DRIVER_START( nwktr )
r4679	r4680
1077	1077	static void sound_irq_callback(running_machine *machine, int irq)
1078	1078	{
1079	1079	if (irq == 0)
1080		generic_pulse_irq_line(machine->cpu[1], INPUT_LINE_IRQ1);
	1080	generic_pulse_irq_line(cputag_get_cpu(machine, "audiocpu"), INPUT_LINE_IRQ1);
1081	1081	else
1082		generic_pulse_irq_line(machine->cpu[1], INPUT_LINE_IRQ2);
	1082	generic_pulse_irq_line(cputag_get_cpu(machine, "audiocpu"), INPUT_LINE_IRQ2);
1083	1083	}
1084	1084
1085	1085	static DRIVER_INIT(nwktr)
r4679	r4680
1087	1087	init_konami_cgboard(machine, 1, CGBOARD_TYPE_NWKTR);
1088	1088	set_cgboard_texture_bank(machine, 0, 5, memory_region(machine, "user5"));
1089	1089
1090		sharc_dataram = auto_malloc(0x100000);
	1090	sharc_dataram = auto_alloc_array(machine, UINT32, 0x100000/4);
1091	1091	led_reg0 = led_reg1 = 0x7f;
1092	1092
1093	1093	K056800_init(machine, sound_irq_callback);
1094	1094	K033906_init(machine);
1095	1095
1096		//  device_set_info_fct(machine->cpu[0], CPUINFO_FCT_SPU_TX_HANDLER, (genf *)jamma_jvs_w);
1097		//  device_set_info_fct(machine->cpu[0], CPUINFO_FCT_SPU_RX_HANDLER, (genf *)jamma_jvs_r);
1098
1099	1096	adc1213x_init(0, adc12138_input_callback);
1100		lanc2_init();
	1097	lanc2_init(machine);
1101	1098	}
1102	1099
1103	1100

src/mame/drivers/circus.c

r4679	r4680
55	55
56	56
57	57
58		static ADDRESS_MAP_START( readmem, ADDRESS_SPACE_PROGRAM, 8 )
59		AM_RANGE(0x0000, 0x01ff) AM_READ(SMH_RAM)
60		AM_RANGE(0x1000, 0x1fff) AM_READ(SMH_ROM)
61		AM_RANGE(0x4000, 0x43ff) AM_READ(SMH_RAM)
62		AM_RANGE(0x8000, 0x8000) AM_READ(SMH_RAM)
	58	static ADDRESS_MAP_START( circus_map, ADDRESS_SPACE_PROGRAM, 8 )
	59	AM_RANGE(0x0000, 0x01ff) AM_RAM
	60	AM_RANGE(0x1000, 0x1fff) AM_ROM
	61	AM_RANGE(0x2000, 0x2000) AM_WRITE(circus_clown_x_w)
	62	AM_RANGE(0x3000, 0x3000) AM_WRITE(circus_clown_y_w)
	63	AM_RANGE(0x4000, 0x43ff) AM_RAM_WRITE(circus_videoram_w) AM_BASE(&videoram)
	64	AM_RANGE(0x8000, 0x8000) AM_RAM_WRITE(circus_clown_z_w)
63	65	AM_RANGE(0xa000, 0xa000) AM_READ_PORT("INPUTS")
64	66	AM_RANGE(0xc000, 0xc000) AM_READ_PORT("DSW")
65	67	AM_RANGE(0xd000, 0xd000) AM_READ_PORT("PADDLE")
66	68	//  AM_RANGE(0xd000, 0xd000) AM_READ(ripcord_IN2_r)
67		AM_RANGE(0xf000, 0xffff) AM_READ(SMH_ROM)
	69	AM_RANGE(0xf000, 0xffff) AM_ROM
68	70	ADDRESS_MAP_END
69	71
70		static ADDRESS_MAP_START( writemem, ADDRESS_SPACE_PROGRAM, 8 )
71		AM_RANGE(0x0000, 0x01ff) AM_WRITE(SMH_RAM)
72		AM_RANGE(0x1000, 0x1fff) AM_WRITE(SMH_ROM)
73		AM_RANGE(0x2000, 0x2000) AM_WRITE(circus_clown_x_w)
74		AM_RANGE(0x3000, 0x3000) AM_WRITE(circus_clown_y_w)
75		AM_RANGE(0x4000, 0x43ff) AM_WRITE(circus_videoram_w) AM_BASE(&videoram)
76		AM_RANGE(0x8000, 0x8000) AM_WRITE(circus_clown_z_w)
77		AM_RANGE(0xf000, 0xffff) AM_WRITE(SMH_ROM)
78		ADDRESS_MAP_END
79	72
80
81	73	static INPUT_PORTS_START( circus )
82	74	PORT_START("INPUTS")
83	75	PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_START1 )
r4679	r4680
277	269
278	270	/* basic machine hardware */
279	271	MDRV_CPU_ADD("maincpu", M6502, XTAL_11_289MHz / 16) /* 705.562kHz */
280		MDRV_CPU_PROGRAM_MAP(readmem,writemem)
	272	MDRV_CPU_PROGRAM_MAP(circus_map,0)
281	273	MDRV_CPU_VBLANK_INT("screen", irq0_line_hold)
282	274
283	275	/* video hardware */
r4679	r4680
312	304
313	305	/* basic machine hardware */
314	306	MDRV_CPU_ADD("maincpu", M6502, XTAL_11_289MHz / 16) /* 705.562kHz */
315		MDRV_CPU_PROGRAM_MAP(readmem,writemem)
	307	MDRV_CPU_PROGRAM_MAP(circus_map,0)
316	308	MDRV_CPU_VBLANK_INT("screen", irq0_line_hold)
317	309
318	310	/* video hardware */
r4679	r4680
346	338
347	339	/* basic machine hardware */
348	340	MDRV_CPU_ADD("maincpu", M6502, XTAL_11_289MHz / 16) /* 705.562kHz */
349		MDRV_CPU_PROGRAM_MAP(readmem,writemem)
	341	MDRV_CPU_PROGRAM_MAP(circus_map,0)
350	342	MDRV_CPU_VBLANK_INT_HACK(irq0_line_hold,2)
351	343
352	344	/* video hardware */
r4679	r4680
380	372
381	373	/* basic machine hardware */
382	374	MDRV_CPU_ADD("maincpu", M6502, XTAL_11_289MHz / 16) /* 705.562kHz */
383		MDRV_CPU_PROGRAM_MAP(readmem,writemem)
	375	MDRV_CPU_PROGRAM_MAP(circus_map,0)
384	376	//MDRV_CPU_VBLANK_INT("screen", ripcord_interrupt) //AT
385	377
386	378	/* video hardware */

src/mame/drivers/vcombat.c

r4679	r4680
199	199	if (bus_hold)
200	200	{
201	201	fprintf(stderr, "M0 asserting bus HOLD to i860 %s\n", device->tag);
202		i860_set_pin(device->token, DEC_PIN_BUS_HOLD, 1);
	202	i860_set_pin(device, DEC_PIN_BUS_HOLD, 1);
203	203	}
204	204	else
205	205	{
206	206	fprintf(stderr, "M0 clearing bus HOLD to i860 %s\n", device->tag);
207		i860_set_pin(device->token, DEC_PIN_BUS_HOLD, 0);
	207	i860_set_pin(device, DEC_PIN_BUS_HOLD, 0);
208	208	}
209	209
210	210	if (reset)
211	211	{
212	212	fprintf(stderr, "M0 asserting RESET to i860 %s\n", device->tag);
213		i860_set_pin(device->token, DEC_PIN_RESET, 1);
	213	i860_set_pin(device, DEC_PIN_RESET, 1);
214	214	}
215	215	else
216		i860_set_pin(device->token, DEC_PIN_RESET, 0);
	216	i860_set_pin(device, DEC_PIN_RESET, 0);
217	217	}
218	218
219	219	static WRITE16_HANDLER( wiggle_i860p0_pins_w )
r4679	r4680
379	379	/* Setup the Bt476 VGA RAMDAC palette chip */
380	380	tlc34076_reset(6);
381	381
382		i860_set_pin(cputag_get_cpu(machine, "vid_0")->token, DEC_PIN_BUS_HOLD, 1);
383		i860_set_pin(cputag_get_cpu(machine, "vid_1")->token, DEC_PIN_BUS_HOLD, 1);
	382	i860_set_pin(cputag_get_cpu(machine, "vid_0"), DEC_PIN_BUS_HOLD, 1);
	383	i860_set_pin(cputag_get_cpu(machine, "vid_1"), DEC_PIN_BUS_HOLD, 1);
384	384
385	385	crtc_select = 0;
386	386	}
r4679	r4680
390	390	/* Setup the Bt476 VGA RAMDAC palette chip */
391	391	tlc34076_reset(6);
392	392
393		i860_set_pin(cputag_get_cpu(machine, "vid_0")->token, DEC_PIN_BUS_HOLD, 1);
	393	i860_set_pin(cputag_get_cpu(machine, "vid_0"), DEC_PIN_BUS_HOLD, 1);
394	394
395	395	crtc_select = 0;
396	396	}
r4679	r4680
426	426	memory_set_direct_update_handler(cputag_get_address_space(machine, "vid_1", ADDRESS_SPACE_PROGRAM), vid_1_direct_handler);
427	427
428	428	/* Allocate the 68000 framebuffers */
429		m68k_framebuffer[0] = auto_malloc(0x8000 * sizeof(UINT16));
430		m68k_framebuffer[1] = auto_malloc(0x8000 * sizeof(UINT16));
	429	m68k_framebuffer[0] = auto_alloc_array(machine, UINT16, 0x8000);
	430	m68k_framebuffer[1] = auto_alloc_array(machine, UINT16, 0x8000);
431	431
432	432	/* First i860 */
433		i860_framebuffer[0][0] = auto_malloc(0x8000 * sizeof(UINT16));
434		i860_framebuffer[0][1] = auto_malloc(0x8000 * sizeof(UINT16));
	433	i860_framebuffer[0][0] = auto_alloc_array(machine, UINT16, 0x8000);
	434	i860_framebuffer[0][1] = auto_alloc_array(machine, UINT16, 0x8000);
435	435
436	436	/* Second i860 */
437		i860_framebuffer[1][0] = auto_malloc(0x8000 * sizeof(UINT16));
438		i860_framebuffer[1][1] = auto_malloc(0x8000 * sizeof(UINT16));
	437	i860_framebuffer[1][0] = auto_alloc_array(machine, UINT16, 0x8000);
	438	i860_framebuffer[1][1] = auto_alloc_array(machine, UINT16, 0x8000);
439	439
440	440	/* pc==4016 : jump 4038 ... There's something strange about how it waits at 402e (interrupts all masked out)
441	441	I think what is happening here is that M0 snags the first time
r4679	r4680
456	456	static DRIVER_INIT( shadfgtr )
457	457	{
458	458	/* Allocate th 68000 frame buffers */
459		m68k_framebuffer[0] = auto_malloc(0x8000 * sizeof(UINT16));
460		m68k_framebuffer[1] = auto_malloc(0x8000 * sizeof(UINT16));
	459	m68k_framebuffer[0] = auto_alloc_array(machine, UINT16, 0x8000);
	460	m68k_framebuffer[1] = auto_alloc_array(machine, UINT16, 0x8000);
461	461
462	462	/* Only one i860 */
463		i860_framebuffer[0][0] = auto_malloc(0x8000 * sizeof(UINT16));
464		i860_framebuffer[0][1] = auto_malloc(0x8000 * sizeof(UINT16));
	463	i860_framebuffer[0][0] = auto_alloc_array(machine, UINT16, 0x8000);
	464	i860_framebuffer[0][1] = auto_alloc_array(machine, UINT16, 0x8000);
465	465	i860_framebuffer[1][0] = NULL;
466	466	i860_framebuffer[1][1] = NULL;
467	467

src/mame/drivers/shangha3.c

r4679	r4680
56	56	static int count;
57	57	static const int result[] = { 0x0,0x1,0x3,0x7,0xf,0xe,0xc,0x8,0x0};
58	58
59		logerror("PC %04x: read 20004e\n",cpu_get_pc(space->cpu));
	59	logerror("PC %04x: read 20004e\n",cpu_get_pc(space->cpu));
60	60
61	61	return result[count++ % 9];
62	62	}
63	63	static WRITE16_HANDLER( shangha3_prot_w )
64	64	{
65		logerror("PC %04x: write %02x to 20004e\n",cpu_get_pc(space->cpu),data);
	65	logerror("PC %04x: write %02x to 20004e\n",cpu_get_pc(space->cpu),data);
66	66	}
67	67
68	68
r4679	r4680
119	119	{
120	120	if (ACCESSING_BITS_0_7)
121	121	{
122		soundlatch_w(space,0,data & 0xff);
123		cpu_set_input_line_and_vector(space->machine->cpu[1],0,HOLD_LINE,0xff);   /* RST 38h */
	122	soundlatch_w(space, 0, data & 0xff);
	123	cputag_set_input_line_and_vector(space->machine, "audiocpu", 0, HOLD_LINE, 0xff);   /* RST 38h */
124	124	}
125	125	}
126	126
127	127
128	128
129		static ADDRESS_MAP_START( shangha3_readmem, ADDRESS_SPACE_PROGRAM, 16 )
130		AM_RANGE(0x000000, 0x07ffff) AM_READ(SMH_ROM)
131		AM_RANGE(0x100000, 0x100fff) AM_READ(SMH_RAM)
	129	static ADDRESS_MAP_START( shangha3_map, ADDRESS_SPACE_PROGRAM, 16 )
	130	AM_RANGE(0x000000, 0x07ffff) AM_ROM
	131	AM_RANGE(0x100000, 0x100fff) AM_RAM_WRITE(paletteram16_RRRRRGGGGGBBBBBx_word_w) AM_BASE(&paletteram16)
132	132	AM_RANGE(0x200000, 0x200001) AM_READ_PORT("INPUTS")
133	133	AM_RANGE(0x200002, 0x200003) AM_READ_PORT("SYSTEM")
134		AM_RANGE(0x20001e, 0x20001f) AM_DEVREAD8("ay", ay8910_r, 0x00ff)
135		AM_RANGE(0x20004e, 0x20004f) AM_READ(shangha3_prot_r)
136		AM_RANGE(0x20006e, 0x20006f) AM_DEVREAD8("oki", okim6295_r, 0x00ff)
137		AM_RANGE(0x300000, 0x30ffff) AM_READ(SMH_RAM)
138		ADDRESS_MAP_END
139
140		static ADDRESS_MAP_START( shangha3_writemem, ADDRESS_SPACE_PROGRAM, 16 )
141		AM_RANGE(0x000000, 0x07ffff) AM_WRITE(SMH_ROM)
142		AM_RANGE(0x100000, 0x100fff) AM_WRITE(paletteram16_RRRRRGGGGGBBBBBx_word_w) AM_BASE(&paletteram16)
143	134	AM_RANGE(0x200008, 0x200009) AM_WRITE(shangha3_blitter_go_w)
144	135	AM_RANGE(0x20000a, 0x20000b) AM_WRITENOP   /* irq ack? */
145	136	AM_RANGE(0x20000c, 0x20000d) AM_WRITE(shangha3_coinctrl_w)
	137	AM_RANGE(0x20001e, 0x20001f) AM_DEVREAD8("ay", ay8910_r, 0x00ff)
146	138	AM_RANGE(0x20002e, 0x20002f) AM_DEVWRITE8("ay", ay8910_data_w, 0x00ff)
147	139	AM_RANGE(0x20003e, 0x20003f) AM_DEVWRITE8("ay", ay8910_address_w, 0x00ff)
148		AM_RANGE(0x20004e, 0x20004f) AM_WRITE(shangha3_prot_w)
149		AM_RANGE(0x20006e, 0x20006f) AM_DEVWRITE8("oki", okim6295_w, 0x00ff)
150		AM_RANGE(0x300000, 0x30ffff) AM_WRITE(SMH_RAM) AM_BASE(&shangha3_ram) AM_SIZE(&shangha3_ram_size)   /* gfx & work ram */
	140	AM_RANGE(0x20004e, 0x20004f) AM_READWRITE(shangha3_prot_r,shangha3_prot_w)
	141	AM_RANGE(0x20006e, 0x20006f) AM_DEVREADWRITE8("oki", okim6295_r,okim6295_w, 0x00ff)
	142	AM_RANGE(0x300000, 0x30ffff) AM_RAM AM_BASE(&shangha3_ram) AM_SIZE(&shangha3_ram_size)   /* gfx & work ram */
151	143	AM_RANGE(0x340000, 0x340001) AM_WRITE(shangha3_flipscreen_w)
152	144	AM_RANGE(0x360000, 0x360001) AM_WRITE(shangha3_gfxlist_addr_w)
153	145	ADDRESS_MAP_END
154	146
155
156		static ADDRESS_MAP_START( heberpop_readmem, ADDRESS_SPACE_PROGRAM, 16 )
157		AM_RANGE(0x000000, 0x0fffff) AM_READ(SMH_ROM)
158		AM_RANGE(0x100000, 0x100fff) AM_READ(SMH_RAM)
	147	static ADDRESS_MAP_START( heberpop_map, ADDRESS_SPACE_PROGRAM, 16 )
	148	AM_RANGE(0x000000, 0x0fffff) AM_ROM
	149	AM_RANGE(0x100000, 0x100fff) AM_RAM_WRITE(paletteram16_RRRRRGGGGGBBBBBx_word_w) AM_BASE(&paletteram16)
159	150	AM_RANGE(0x200000, 0x200001) AM_READ_PORT("INPUTS")
160	151	AM_RANGE(0x200002, 0x200003) AM_READ_PORT("SYSTEM")
161	152	AM_RANGE(0x200004, 0x200005) AM_READ_PORT("DSW")
162		AM_RANGE(0x300000, 0x30ffff) AM_READ(SMH_RAM)
163		AM_RANGE(0x800000, 0xb7ffff) AM_READ(heberpop_gfxrom_r)
164		ADDRESS_MAP_END
165
166		static ADDRESS_MAP_START( heberpop_writemem, ADDRESS_SPACE_PROGRAM, 16 )
167		AM_RANGE(0x000000, 0x0fffff) AM_WRITE(SMH_ROM)
168		AM_RANGE(0x100000, 0x100fff) AM_WRITE(paletteram16_RRRRRGGGGGBBBBBx_word_w) AM_BASE(&paletteram16)
169	153	AM_RANGE(0x200008, 0x200009) AM_WRITE(shangha3_blitter_go_w)
170	154	AM_RANGE(0x20000a, 0x20000b) AM_WRITENOP   /* irq ack? */
171	155	AM_RANGE(0x20000c, 0x20000d) AM_WRITE(heberpop_coinctrl_w)
172	156	AM_RANGE(0x20000e, 0x20000f) AM_WRITE(heberpop_sound_command_w)
173		AM_RANGE(0x300000, 0x30ffff) AM_WRITE(SMH_RAM) AM_BASE(&shangha3_ram) AM_SIZE(&shangha3_ram_size)   /* gfx & work ram */
	157	AM_RANGE(0x300000, 0x30ffff) AM_RAM AM_BASE(&shangha3_ram) AM_SIZE(&shangha3_ram_size)   /* gfx & work ram */
174	158	AM_RANGE(0x340000, 0x340001) AM_WRITE(shangha3_flipscreen_w)
175	159	AM_RANGE(0x360000, 0x360001) AM_WRITE(shangha3_gfxlist_addr_w)
	160	AM_RANGE(0x800000, 0xb7ffff) AM_READ(heberpop_gfxrom_r)
176	161	ADDRESS_MAP_END
177	162
178		static ADDRESS_MAP_START( blocken_readmem, ADDRESS_SPACE_PROGRAM, 16 )
179		AM_RANGE(0x000000, 0x0fffff) AM_READ(SMH_ROM)
	163	static ADDRESS_MAP_START( blocken_map, ADDRESS_SPACE_PROGRAM, 16 )
	164	AM_RANGE(0x000000, 0x0fffff) AM_ROM
180	165	AM_RANGE(0x100000, 0x100001) AM_READ_PORT("INPUTS")
181	166	AM_RANGE(0x100002, 0x100003) AM_READ_PORT("SYSTEM")
182	167	AM_RANGE(0x100004, 0x100005) AM_READ_PORT("DSW")
183		AM_RANGE(0x200000, 0x200fff) AM_READ(SMH_RAM)
184		AM_RANGE(0x300000, 0x30ffff) AM_READ(SMH_RAM)
185		AM_RANGE(0x800000, 0xb7ffff) AM_READ(heberpop_gfxrom_r)
186		ADDRESS_MAP_END
187
188		static ADDRESS_MAP_START( blocken_writemem, ADDRESS_SPACE_PROGRAM, 16 )
189		AM_RANGE(0x000000, 0x0fffff) AM_WRITE(SMH_ROM)
190	168	AM_RANGE(0x100008, 0x100009) AM_WRITE(shangha3_blitter_go_w)
191	169	AM_RANGE(0x10000a, 0x10000b) AM_WRITENOP   /* irq ack? */
192	170	AM_RANGE(0x10000c, 0x10000d) AM_WRITE(blocken_coinctrl_w)
193	171	AM_RANGE(0x10000e, 0x10000f) AM_WRITE(heberpop_sound_command_w)
194		AM_RANGE(0x200000, 0x200fff) AM_WRITE(paletteram16_RRRRRGGGGGBBBBBx_word_w) AM_BASE(&paletteram16)
195		AM_RANGE(0x300000, 0x30ffff) AM_WRITE(SMH_RAM) AM_BASE(&shangha3_ram) AM_SIZE(&shangha3_ram_size)   /* gfx & work ram */
	172	AM_RANGE(0x200000, 0x200fff) AM_RAM_WRITE(paletteram16_RRRRRGGGGGBBBBBx_word_w) AM_BASE(&paletteram16)
	173	AM_RANGE(0x300000, 0x30ffff) AM_RAM AM_BASE(&shangha3_ram) AM_SIZE(&shangha3_ram_size)   /* gfx & work ram */
196	174	AM_RANGE(0x340000, 0x340001) AM_WRITE(shangha3_flipscreen_w)
197	175	AM_RANGE(0x360000, 0x360001) AM_WRITE(shangha3_gfxlist_addr_w)
	176	AM_RANGE(0x800000, 0xb7ffff) AM_READ(heberpop_gfxrom_r)
198	177	ADDRESS_MAP_END
199	178
200	179
201		static ADDRESS_MAP_START( heberpop_sound_readmem, ADDRESS_SPACE_PROGRAM, 8 )
202		AM_RANGE(0x0000, 0xf7ff) AM_READ(SMH_ROM)
203		AM_RANGE(0xf800, 0xffff) AM_READ(SMH_RAM)
	180	static ADDRESS_MAP_START( heberpop_sound_map, ADDRESS_SPACE_PROGRAM, 8 )
	181	AM_RANGE(0x0000, 0xf7ff) AM_ROM
	182	AM_RANGE(0xf800, 0xffff) AM_RAM
204	183	ADDRESS_MAP_END
205	184
206		static ADDRESS_MAP_START( heberpop_sound_writemem, ADDRESS_SPACE_PROGRAM, 8 )
207		AM_RANGE(0x0000, 0xf7ff) AM_WRITE(SMH_ROM)
208		AM_RANGE(0xf800, 0xffff) AM_WRITE(SMH_RAM)
209		ADDRESS_MAP_END
210
211
212	185	static ADDRESS_MAP_START( heberpop_sound_io_map, ADDRESS_SPACE_IO, 8 )
213	186	ADDRESS_MAP_GLOBAL_MASK(0xff)
214	187	AM_RANGE(0x00, 0x03) AM_DEVREADWRITE("ym", ym3438_r, ym3438_w)
r4679	r4680
494	467
495	468	static void irqhandler(const device_config *device, int linestate)
496	469	{
497		cpu_set_input_line(device->machine->cpu[1], INPUT_LINE_NMI, linestate);
	470	cputag_set_input_line(device->machine, "audiocpu", INPUT_LINE_NMI, linestate);
498	471	}
499	472
500	473	static const ym3438_interface ym3438_config =
r4679	r4680
507	480
508	481	/* basic machine hardware */
509	482	MDRV_CPU_ADD("maincpu", M68000, 8000000)
510		MDRV_CPU_PROGRAM_MAP(shangha3_readmem,shangha3_writemem)
	483	MDRV_CPU_PROGRAM_MAP(shangha3_map,0)
511	484	MDRV_CPU_VBLANK_INT("screen", irq4_line_hold)
512	485
513	486	/* video hardware */
514		MDRV_VIDEO_ATTRIBUTES(VIDEO_HAS_SHADOWS )
	487	MDRV_VIDEO_ATTRIBUTES(VIDEO_HAS_SHADOWS)
515	488
516	489	MDRV_SCREEN_ADD("screen", RASTER)
517	490	MDRV_SCREEN_REFRESH_RATE(60)
r4679	r4680
543	516
544	517	/* basic machine hardware */
545	518	MDRV_CPU_ADD("maincpu", M68000, 8000000)
546		MDRV_CPU_PROGRAM_MAP(heberpop_readmem,heberpop_writemem)
	519	MDRV_CPU_PROGRAM_MAP(heberpop_map,0)
547	520	MDRV_CPU_VBLANK_INT("screen", irq4_line_hold)
548	521
549	522	MDRV_CPU_ADD("audiocpu", Z80, 6000000)   /* 6 MHz ??? */
550		MDRV_CPU_PROGRAM_MAP(heberpop_sound_readmem,heberpop_sound_writemem)
	523	MDRV_CPU_PROGRAM_MAP(heberpop_sound_map,0)
551	524	MDRV_CPU_IO_MAP(heberpop_sound_io_map,0)   /* NMI triggered by YM3438 */
552	525
553	526	/* video hardware */
r4679	r4680
584	557
585	558	/* basic machine hardware */
586	559	MDRV_CPU_ADD("maincpu", M68000, 8000000)
587		MDRV_CPU_PROGRAM_MAP(blocken_readmem,blocken_writemem)
	560	MDRV_CPU_PROGRAM_MAP(blocken_map,0)
588	561	MDRV_CPU_VBLANK_INT("screen", irq4_line_hold)
589	562
590	563	MDRV_CPU_ADD("audiocpu", Z80, 6000000)   /* 6 MHz ??? */
591		MDRV_CPU_PROGRAM_MAP(heberpop_sound_readmem,heberpop_sound_writemem)
	564	MDRV_CPU_PROGRAM_MAP(heberpop_sound_map,0)
592	565	MDRV_CPU_IO_MAP(heberpop_sound_io_map,0)   /* NMI triggered by YM3438 */
593	566
594	567	/* video hardware */
r4679	r4680
698	671	{
699	672	shangha3_do_shadows = 1;
700	673	}
	674
701	675	static DRIVER_INIT( heberpop )
702	676	{
703	677	shangha3_do_shadows = 0;

src/mame/drivers/pkscram.c

r4679	r4680
73	73
74	74	if (!(out & 0x2000) && interrupt_line_active)
75	75	{
76		cpu_set_input_line(space->machine->cpu[0], 1, CLEAR_LINE);
	76	cputag_set_input_line(space->machine, "maincpu", 1, CLEAR_LINE);
77	77	interrupt_line_active = 0;
78	78	}
79	79
r4679	r4680
193	193
194	194	static TIMER_CALLBACK( scanline_callback )
195	195	{
196		if (param==interrupt_scanline)
	196	if (param == interrupt_scanline)
197	197	{
198		if (out&0x2000)
199		cpu_set_input_line(machine->cpu[0], 1, ASSERT_LINE);
200		timer_adjust_oneshot(scanline_timer, video_screen_get_time_until_pos(machine->primary_screen, param+1, 0), param+1);
	198	if (out & 0x2000)
	199	cputag_set_input_line(machine, "maincpu", 1, ASSERT_LINE);
	200	timer_adjust_oneshot(scanline_timer, video_screen_get_time_until_pos(machine->primary_screen, param + 1, 0), param+1);
201	201	interrupt_line_active = 1;
202	202	}
203	203	else
204	204	{
205	205	if (interrupt_line_active)
206		cpu_set_input_line(machine->cpu[0], 1, CLEAR_LINE);
	206	cputag_set_input_line(machine, "maincpu", 1, CLEAR_LINE);
207	207	timer_adjust_oneshot(scanline_timer, video_screen_get_time_until_pos(machine->primary_screen, interrupt_scanline, 0), interrupt_scanline);
208	208	interrupt_line_active = 0;
209	209	}
r4679	r4680
246	246	static void irqhandler(const device_config *device, int irq)
247	247	{
248	248	if(out & 0x10)
249		cpu_set_input_line(device->machine->cpu[0],2,irq ? ASSERT_LINE : CLEAR_LINE);
	249	cputag_set_input_line(device->machine, "maincpu", 2, irq ? ASSERT_LINE : CLEAR_LINE);
250	250	}
251	251
252	252	static const ym2203_interface ym2203_config =

src/mame/drivers/vastar.c

r4679	r4680
86	86	static MACHINE_RESET( vastar )
87	87	{
88	88	/* we must start with the second CPU halted */
89		cpu_set_input_line(machine->cpu[1], INPUT_LINE_RESET, ASSERT_LINE);
	89	cputag_set_input_line(machine, "sub", INPUT_LINE_RESET, ASSERT_LINE);
90	90	}
91	91
92	92	static WRITE8_HANDLER( vastar_hold_cpu2_w )
93	93	{
94	94	/* I'm not sure that this works exactly like this */
95	95	if (data & 1)
96		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_RESET, CLEAR_LINE);
	96	cputag_set_input_line(space->machine, "sub", INPUT_LINE_RESET, CLEAR_LINE);
97	97	else
98		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_RESET, ASSERT_LINE);
	98	cputag_set_input_line(space->machine, "sub", INPUT_LINE_RESET, ASSERT_LINE);
99	99	}
100	100
101	101	static READ8_HANDLER( vastar_sharedram_r )

src/mame/drivers/taotaido.c

r4679	r4680
84	84	if (ACCESSING_BITS_0_7)
85	85	{
86	86	pending_command = 1;
87		soundlatch_w(space,offset,data & 0xff);
88		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_NMI, PULSE_LINE);
	87	soundlatch_w(space, offset, data & 0xff);
	88	cputag_set_input_line(space->machine, "audiocpu", INPUT_LINE_NMI, PULSE_LINE);
89	89	}
90	90	}
91	91	static ADDRESS_MAP_START( main_map, ADDRESS_SPACE_PROGRAM, 16 )
r4679	r4680
132	132	static ADDRESS_MAP_START( sound_map, ADDRESS_SPACE_PROGRAM, 8 )
133	133	AM_RANGE(0x0000, 0x77ff) AM_ROM
134	134	AM_RANGE(0x7800, 0x7fff) AM_RAM
135		AM_RANGE(0x8000, 0xffff) AM_READWRITE(SMH_BANK1, SMH_ROM)
	135	AM_RANGE(0x8000, 0xffff) AM_READWRITE(SMH_BANK(1), SMH_ROM)
136	136	ADDRESS_MAP_END
137	137
138	138	static ADDRESS_MAP_START( sound_port_map, ADDRESS_SPACE_IO, 8 )
r4679	r4680
322	322
323	323	static void irqhandler(const device_config *device, int irq)
324	324	{
325		cpu_set_input_line(device->machine->cpu[1],0,irq ? ASSERT_LINE : CLEAR_LINE);
	325	cputag_set_input_line(device->machine, "audiocpu", 0, irq ? ASSERT_LINE : CLEAR_LINE);
326	326	}
327	327
328	328	static const ym2610_interface ym2610_config =

src/mame/drivers/fortecar.c

r4679	r4680
101	101
102	102	static ADDRESS_MAP_START( fortecar_map, ADDRESS_SPACE_PROGRAM, 8 )
103	103	AM_RANGE(0x0000, 0xbfff) AM_ROM
104		AM_RANGE(0xc000, 0xc7ff) AM_READWRITE(SMH_BANK1, SMH_ROM) //bank
	104	AM_RANGE(0xc000, 0xc7ff) AM_READWRITE(SMH_BANK(1), SMH_ROM) //bank
105	105	AM_RANGE(0xd000, 0xd7ff) AM_RAM
106	106	AM_RANGE(0xd800, 0xffff) AM_RAM AM_BASE(&fortecar_ram)
107	107	ADDRESS_MAP_END

src/mame/drivers/relief.c

r4679	r4680
45	45
46	46	static void update_interrupts(running_machine *machine)
47	47	{
48		cpu_set_input_line(machine->cpu[0], 4, atarigen_scanline_int_state ? ASSERT_LINE : CLEAR_LINE);
	48	cputag_set_input_line(machine, "maincpu", 4, atarigen_scanline_int_state ? ASSERT_LINE : CLEAR_LINE);
49	49	}
50	50
51	51

src/mame/drivers/taito_f3.c

r4679	r4680
121	121
122	122	static WRITE32_HANDLER( f3_sound_reset_0_w )
123	123	{
124		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_RESET, CLEAR_LINE);
	124	cputag_set_input_line(space->machine, "audiocpu", INPUT_LINE_RESET, CLEAR_LINE);
125	125	}
126	126
127	127	static WRITE32_HANDLER( f3_sound_reset_1_w )
128	128	{
129		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_RESET, ASSERT_LINE);
	129	cputag_set_input_line(space->machine, "audiocpu", INPUT_LINE_RESET, ASSERT_LINE);
130	130	}
131	131
132	132	static WRITE32_HANDLER( f3_sound_bankswitch_w )
r4679	r4680
361	361
362	362	static TIMER_CALLBACK( f3_interrupt3 )
363	363	{
364		cpu_set_input_line(machine->cpu[0], 3, HOLD_LINE);   // some signal from video hardware?
	364	cputag_set_input_line(machine, "maincpu", 3, HOLD_LINE);   // some signal from video hardware?
365	365	}
366	366
367	367	static INTERRUPT_GEN( f3_interrupt2 )
r4679	r4680
373	373	static MACHINE_RESET( f3 )
374	374	{
375	375	taito_f3_soundsystem_reset(machine);
376		cpu_set_input_line(machine->cpu[1], INPUT_LINE_RESET, ASSERT_LINE);
	376	cputag_set_input_line(machine, "audiocpu", INPUT_LINE_RESET, ASSERT_LINE);
377	377
378	378	f3_68681_reset(machine);
379	379	}
r4679	r4680
3669	3669	}
3670	3670	}
3671	3671
3672		memory_install_read32_device_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), oki, 0x4a001c, 0x4a001f, 0, 0, bubsympb_oki_r );
3673		memory_install_write32_device_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), oki, 0x4a001c, 0x4a001f, 0, 0, bubsympb_oki_w );
	3672	memory_install_read32_device_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), oki, 0x4a001c, 0x4a001f, 0, 0, bubsympb_oki_r );
	3673	memory_install_write32_device_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), oki, 0x4a001c, 0x4a001f, 0, 0, bubsympb_oki_w );
3674	3674	}
3675	3675
3676	3676

src/mame/drivers/jpmsys5.c

r4679	r4680
81	81
82	82	static void tms_interrupt(running_machine *machine, int state)
83	83	{
84		cpu_set_input_line(machine->cpu[0], INT_TMS34061, state);
	84	cputag_set_input_line(machine, "maincpu", INT_TMS34061, state);
85	85	}
86	86
87	87	static const struct tms34061_interface tms34061intf =
r4679	r4680
460	460
461	461	static void ptm_irq(running_machine *machine, int state)
462	462	{
463		cpu_set_input_line(machine->cpu[0], INT_6840PTM, state ? ASSERT_LINE : CLEAR_LINE);
	463	cputag_set_input_line(machine, "maincpu", INT_6840PTM, state ? ASSERT_LINE : CLEAR_LINE);
464	464	}
465	465
466	466	static const ptm6840_interface ptm_intf =
r4679	r4680
480	480
481	481	static WRITE_LINE_DEVICE_HANDLER( acia_irq )
482	482	{
483		cpu_set_input_line(device->machine->cpu[0], INT_6850ACIA, state ? CLEAR_LINE : ASSERT_LINE);
	483	cputag_set_input_line(device->machine, "maincpu", INT_6850ACIA, state ? CLEAR_LINE : ASSERT_LINE);
484	484	}
485	485
486	486	/* Clocks are incorrect */

src/mame/drivers/gaelco2.c

r4679	r4680
56	56	MANIAC SQUARE (FINAL)
57	57	============================================================================*/
58	58
59		static ADDRESS_MAP_START( maniacsq_readmem, ADDRESS_SPACE_PROGRAM, 16 )
60		AM_RANGE(0x000000, 0x03ffff) AM_READ(SMH_ROM)         /* ROM */
61		AM_RANGE(0x202890, 0x2028ff) AM_DEVREAD("gaelco", gaelcosnd_r)      /* Sound Registers */
62		AM_RANGE(0x200000, 0x20ffff) AM_READ(SMH_RAM)         /* Video RAM */
63		AM_RANGE(0x210000, 0x211fff) AM_READ(SMH_RAM)         /* Palette */
64		AM_RANGE(0x218004, 0x218009) AM_READ(SMH_RAM)         /* Video Registers */
65		AM_RANGE(0x300000, 0x300001) AM_READ_PORT("IN0")      /* DSW #1 + Input 1P */
66		AM_RANGE(0x300002, 0x300003) AM_READ_PORT("IN1")      /* DSW #2 + Input 2P */
67		AM_RANGE(0x320000, 0x320001) AM_READ_PORT("COIN")      /* COINSW + SERVICESW */
68		AM_RANGE(0xfe0000, 0xfeffff) AM_READ(SMH_RAM)         /* Work RAM */
	59	static ADDRESS_MAP_START( maniacsq_map, ADDRESS_SPACE_PROGRAM, 16 )
	60	AM_RANGE(0x000000, 0x03ffff) AM_ROM                                                            /* ROM */
	61	AM_RANGE(0x202890, 0x2028ff) AM_DEVREADWRITE("gaelco", gaelcosnd_r, gaelcosnd_w) AM_BASE(&gaelco_sndregs)      /* Sound Registers */
	62	AM_RANGE(0x200000, 0x20ffff) AM_RAM_WRITE(gaelco2_vram_w) AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)      /* Video RAM */
	63	AM_RANGE(0x210000, 0x211fff) AM_RAM_WRITE(gaelco2_palette_w) AM_BASE(&paletteram16)                        /* Palette */
	64	AM_RANGE(0x218004, 0x218009) AM_RAM AM_BASE(&gaelco2_vregs)                                          /* Video Registers */
	65	AM_RANGE(0x300000, 0x300001) AM_READ_PORT("IN0")                                                /* DSW #1 + Input 1P */
	66	AM_RANGE(0x300002, 0x300003) AM_READ_PORT("IN1")                                                /* DSW #2 + Input 2P */
	67	AM_RANGE(0x30004a, 0x30004b) AM_WRITENOP                                                      /* Sound muting? */
	68	AM_RANGE(0x320000, 0x320001) AM_READ_PORT("COIN")                                                /* COINSW + SERVICESW */
	69	AM_RANGE(0x500000, 0x500001) AM_WRITE(gaelco2_coin_w)                                             /* Coin lockout + counters */
	70	AM_RANGE(0xfe0000, 0xfeffff) AM_RAM                                                            /* Work RAM */
69	71	ADDRESS_MAP_END
70	72
71		static ADDRESS_MAP_START( maniacsq_writemem, ADDRESS_SPACE_PROGRAM, 16 )
72		AM_RANGE(0x000000, 0x03ffff) AM_WRITE(SMH_ROM)                     /* ROM */
73		AM_RANGE(0x202890, 0x2028ff) AM_DEVWRITE("gaelco", gaelcosnd_w) AM_BASE(&gaelco_sndregs)      /* Sound Registers */
74		AM_RANGE(0x200000, 0x20ffff) AM_WRITE(gaelco2_vram_w) AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)   /* Video RAM */
75		AM_RANGE(0x210000, 0x211fff) AM_WRITE(gaelco2_palette_w) AM_BASE(&paletteram16)   /* Palette */
76		AM_RANGE(0x218004, 0x218009) AM_WRITE(SMH_RAM) AM_BASE(&gaelco2_vregs)         /* Video Registers */
77		AM_RANGE(0x30004a, 0x30004b) AM_WRITENOP                     /* Sound muting? */
78		AM_RANGE(0x500000, 0x500001) AM_WRITE(gaelco2_coin_w)                  /* Coin lockout + counters */
79		AM_RANGE(0xfe0000, 0xfeffff) AM_WRITE(SMH_RAM)                     /* Work RAM */
80		ADDRESS_MAP_END
81	73
82
83	74	static INPUT_PORTS_START( maniacsq )
84	75	PORT_START("IN0")
85	76	PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_8WAY PORT_PLAYER(1)
r4679	r4680
167	158	static MACHINE_DRIVER_START( maniacsq )
168	159	/* basic machine hardware */
169	160	MDRV_CPU_ADD("maincpu", M68000, 26000000/2)      /* 13 MHz? */
170		MDRV_CPU_PROGRAM_MAP(maniacsq_readmem, maniacsq_writemem)
	161	MDRV_CPU_PROGRAM_MAP(maniacsq_map,0)
171	162	MDRV_CPU_VBLANK_INT("screen", irq6_line_hold)
172	163
173	164	/* video hardware */
r4679	r4680
223	214	static READ16_HANDLER(p2_gun_x) {return (input_port_read(space->machine, "LIGHT1_X") * 320 / 0x100) + 1;}
224	215	static READ16_HANDLER(p2_gun_y) {return (input_port_read(space->machine, "LIGHT1_Y") * 240 / 0x100) - 4;}
225	216
226		static ADDRESS_MAP_START( bang_readmem, ADDRESS_SPACE_PROGRAM, 16 )
227		AM_RANGE(0x000000, 0x0fffff) AM_READ(SMH_ROM) /* ROM */
228		AM_RANGE(0x202890, 0x2028ff) AM_DEVREAD("gaelco", gaelcosnd_r) /* Sound Registers */
229		AM_RANGE(0x200000, 0x20ffff) AM_READ(SMH_RAM) /* Video RAM */
230		AM_RANGE(0x210000, 0x211fff) AM_READ(SMH_RAM) /* Palette */
231		AM_RANGE(0x218004, 0x218009) AM_READ(SMH_RAM) /* Video Registers */
	217	static ADDRESS_MAP_START( bang_map, ADDRESS_SPACE_PROGRAM, 16 )
	218	AM_RANGE(0x000000, 0x0fffff) AM_ROM                                                         /* ROM */
	219	AM_RANGE(0x202890, 0x2028ff) AM_DEVREADWRITE("gaelco", gaelcosnd_r, gaelcosnd_w) AM_BASE(&gaelco_sndregs)   /* Sound Registers */
	220	AM_RANGE(0x200000, 0x20ffff) AM_RAM_WRITE(gaelco2_vram_w) AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)   /* Video RAM */
	221	AM_RANGE(0x210000, 0x211fff) AM_RAM_WRITE(gaelco2_palette_w) AM_BASE(&paletteram16)                     /* Palette */
	222	AM_RANGE(0x218004, 0x218009) AM_READ(SMH_RAM)                                                 /* Video Registers */
	223	AM_RANGE(0x218004, 0x218007) AM_WRITE(SMH_RAM) AM_BASE(&gaelco2_vregs)                              /* Video Registers */
	224	AM_RANGE(0x218008, 0x218009) AM_WRITENOP                                                   /* CLR INT Video */
232	225	AM_RANGE(0x300000, 0x300001) AM_READ_PORT("P1")
233		AM_RANGE(0x300002, 0x300003) AM_READNOP /* Random number generator? */
	226	AM_RANGE(0x300002, 0x300003) AM_READNOP                                                    /* Random number generator? */
	227	AM_RANGE(0x300000, 0x300003) AM_WRITE(gaelco2_coin2_w)                                          /* Coin Counters */
	228	AM_RANGE(0x300008, 0x300009) AM_WRITE(gaelco2_eeprom_data_w)                                    /* EEPROM data */
	229	AM_RANGE(0x30000a, 0x30000b) AM_WRITE(gaelco2_eeprom_sk_w)                                       /* EEPROM serial clock */
	230	AM_RANGE(0x30000c, 0x30000d) AM_WRITE(gaelco2_eeprom_cs_w)                                       /* EEPROM chip select */
234	231	AM_RANGE(0x300010, 0x300011) AM_READ_PORT("P2")
235	232	AM_RANGE(0x300020, 0x300021) AM_READ_PORT("COIN")
236		AM_RANGE(0x310000, 0x310001) AM_READ(p1_gun_x)/* Gun 1P X */
237		AM_RANGE(0x310002, 0x310003) AM_READ(p2_gun_x)/* Gun 2P X */
238		AM_RANGE(0x310004, 0x310005) AM_READ(p1_gun_y)/* Gun 1P Y */
239		AM_RANGE(0x310006, 0x310007) AM_READ(p2_gun_y)/* Gun 2P Y */
240		AM_RANGE(0xfe0000, 0xfeffff) AM_READ(SMH_RAM) /* Work RAM */
	233	AM_RANGE(0x310000, 0x310001) AM_READ(p1_gun_x) AM_WRITE(bang_clr_gun_int_w)                           /* Gun 1P X */ /* CLR INT Gun */
	234	AM_RANGE(0x310002, 0x310003) AM_READ(p2_gun_x)                                                /* Gun 2P X */
	235	AM_RANGE(0x310004, 0x310005) AM_READ(p1_gun_y)                                                /* Gun 1P Y */
	236	AM_RANGE(0x310006, 0x310007) AM_READ(p2_gun_y)                                                /* Gun 2P Y */
	237	AM_RANGE(0xfe0000, 0xfeffff) AM_RAM                                                         /* Work RAM */
241	238	ADDRESS_MAP_END
242	239
243		static ADDRESS_MAP_START( bang_writemem, ADDRESS_SPACE_PROGRAM, 16 )
244		AM_RANGE(0x000000, 0x0fffff) AM_WRITE(SMH_ROM)                     /* ROM */
245		AM_RANGE(0x202890, 0x2028ff) AM_DEVWRITE("gaelco", gaelcosnd_w) AM_BASE(&gaelco_sndregs)      /* Sound Registers */
246		AM_RANGE(0x200000, 0x20ffff) AM_WRITE(gaelco2_vram_w) AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)   /* Video RAM */
247		AM_RANGE(0x210000, 0x211fff) AM_WRITE(gaelco2_palette_w) AM_BASE(&paletteram16)   /* Palette */
248		AM_RANGE(0x218004, 0x218007) AM_WRITE(SMH_RAM) AM_BASE(&gaelco2_vregs)   /* Video Registers */
249		AM_RANGE(0x218008, 0x218009) AM_WRITENOP                     /* CLR INT Video */
250		AM_RANGE(0x300000, 0x300003) AM_WRITE(gaelco2_coin2_w)               /* Coin Counters */
251		AM_RANGE(0x300008, 0x300009) AM_WRITE(gaelco2_eeprom_data_w)         /* EEPROM data */
252		AM_RANGE(0x30000a, 0x30000b) AM_WRITE(gaelco2_eeprom_sk_w)            /* EEPROM serial clock */
253		AM_RANGE(0x30000c, 0x30000d) AM_WRITE(gaelco2_eeprom_cs_w)            /* EEPROM chip select */
254		AM_RANGE(0x310000, 0x310001) AM_WRITE(bang_clr_gun_int_w)            /* CLR INT Gun */
255		AM_RANGE(0xfe0000, 0xfeffff) AM_WRITE(SMH_RAM)                     /* Work RAM */
256		ADDRESS_MAP_END
257	240
258
259	241	static INPUT_PORTS_START( bang )
260	242	PORT_START("P1")
261	243	PORT_BIT( 0x0080, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_IMPULSE(1) PORT_PLAYER(1)
r4679	r4680
295	277	static MACHINE_DRIVER_START( bang )
296	278	/* basic machine hardware */
297	279	MDRV_CPU_ADD("maincpu", M68000, 30000000/2)         /* 15 MHz */
298		MDRV_CPU_PROGRAM_MAP(bang_readmem, bang_writemem)
	280	MDRV_CPU_PROGRAM_MAP(bang_map,0)
299	281	MDRV_CPU_VBLANK_INT_HACK(bang_interrupt, 6)
300	282
301	283	MDRV_NVRAM_HANDLER(gaelco2)
r4679	r4680
389	371	============================================================================*/
390	372
391	373
392		static ADDRESS_MAP_START( alighunt_readmem, ADDRESS_SPACE_PROGRAM, 16 )
393		AM_RANGE(0x000000, 0x0fffff) AM_READ(SMH_ROM)         /* ROM */
394		AM_RANGE(0x202890, 0x2028ff) AM_DEVREAD("gaelco", gaelcosnd_r)      /* Sound Registers */
395		AM_RANGE(0x200000, 0x20ffff) AM_READ(SMH_RAM)         /* Video RAM */
396		AM_RANGE(0x210000, 0x211fff) AM_READ(SMH_RAM)         /* Palette */
397		AM_RANGE(0x218004, 0x218009) AM_READ(SMH_RAM)         /* Video Registers */
398		AM_RANGE(0x300000, 0x300001) AM_READ_PORT("IN0")      /* DSW #1 + Input 1P */
399		AM_RANGE(0x300002, 0x300003) AM_READ_PORT("IN1")      /* DSW #2 + Input 2P */
400		AM_RANGE(0x320000, 0x320001) AM_READ_PORT("COIN")      /* COINSW + SERVICESW */
401		AM_RANGE(0xfe0000, 0xfeffff) AM_READ(SMH_RAM)         /* Work RAM */
	374	static ADDRESS_MAP_START( alighunt_map, ADDRESS_SPACE_PROGRAM, 16 )
	375	AM_RANGE(0x000000, 0x0fffff) AM_ROM                                                            /* ROM */
	376	AM_RANGE(0x202890, 0x2028ff) AM_DEVREADWRITE("gaelco", gaelcosnd_r, gaelcosnd_w) AM_BASE(&gaelco_sndregs)      /* Sound Registers */
	377	AM_RANGE(0x200000, 0x20ffff) AM_RAM_WRITE(gaelco2_vram_w) AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)      /* Video RAM */
	378	AM_RANGE(0x210000, 0x211fff) AM_RAM_WRITE(gaelco2_palette_w) AM_BASE(&paletteram16)                        /* Palette */
	379	AM_RANGE(0x218004, 0x218009) AM_RAM AM_BASE(&gaelco2_vregs)                                          /* Video Registers */
	380	AM_RANGE(0x300000, 0x300001) AM_READ_PORT("IN0")                                                /* DSW #1 + Input 1P */
	381	AM_RANGE(0x300002, 0x300003) AM_READ_PORT("IN1")                                                /* DSW #2 + Input 2P */
	382	AM_RANGE(0x320000, 0x320001) AM_READ_PORT("COIN")                                                /* COINSW + SERVICESW */
	383	AM_RANGE(0x500000, 0x500001) AM_WRITE(gaelco2_coin_w)                                             /* Coin lockout + counters */
	384	AM_RANGE(0x500006, 0x500007) AM_WRITENOP                                                      /* ??? */
	385	AM_RANGE(0xfe0000, 0xfeffff) AM_RAM                                                            /* Work RAM */
402	386	ADDRESS_MAP_END
403	387
404		static ADDRESS_MAP_START( alighunt_writemem, ADDRESS_SPACE_PROGRAM, 16 )
405		AM_RANGE(0x000000, 0x0fffff) AM_WRITE(SMH_ROM)                     /* ROM */
406		AM_RANGE(0x202890, 0x2028ff) AM_DEVWRITE("gaelco", gaelcosnd_w) AM_BASE(&gaelco_sndregs)      /* Sound Registers */
407		AM_RANGE(0x200000, 0x20ffff) AM_WRITE(gaelco2_vram_w) AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)   /* Video RAM */
408		AM_RANGE(0x210000, 0x211fff) AM_WRITE(gaelco2_palette_w) AM_BASE(&paletteram16)   /* Palette */
409		AM_RANGE(0x218004, 0x218009) AM_WRITE(SMH_RAM) AM_BASE(&gaelco2_vregs)         /* Video Registers */
410		AM_RANGE(0x500000, 0x500001) AM_WRITE(gaelco2_coin_w)                  /* Coin lockout + counters */
411		AM_RANGE(0x500006, 0x500007) AM_WRITENOP                     /* ??? */
412		AM_RANGE(0xfe0000, 0xfeffff) AM_WRITE(SMH_RAM)                     /* Work RAM */
413		ADDRESS_MAP_END
414	388
415
416	389	static INPUT_PORTS_START( alighunt )
417	390	PORT_START("IN0")
418	391	PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_8WAY PORT_PLAYER(1)
r4679	r4680
499	472	static MACHINE_DRIVER_START( alighunt )
500	473	/* basic machine hardware */
501	474	MDRV_CPU_ADD("maincpu", M68000, 24000000/2)         /* 12 MHz */
502		MDRV_CPU_PROGRAM_MAP(alighunt_readmem, alighunt_writemem)
	475	MDRV_CPU_PROGRAM_MAP(alighunt_map,0)
503	476	MDRV_CPU_VBLANK_INT("screen", irq6_line_hold)
504	477
505	478	/* video hardware */
r4679	r4680
610	583	return 0x0200;
611	584	}
612	585
613		static ADDRESS_MAP_START( touchgo_readmem, ADDRESS_SPACE_PROGRAM, 16 )
614		AM_RANGE(0x000000, 0x0fffff) AM_READ(SMH_ROM)         /* ROM */
615		AM_RANGE(0x202890, 0x2028ff) AM_DEVREAD("gaelco", gaelcosnd_r)      /* Sound Registers */
616		AM_RANGE(0x200000, 0x20ffff) AM_READ(SMH_RAM)         /* Video RAM */
617		AM_RANGE(0x210000, 0x211fff) AM_READ(SMH_RAM)         /* Palette */
618		AM_RANGE(0x218004, 0x218009) AM_READ(SMH_RAM)         /* Video Registers */
619		AM_RANGE(0x300000, 0x300001) AM_READ_PORT("IN0")      /* DSW #1 + Input 1P */
620		AM_RANGE(0x300002, 0x300003) AM_READ_PORT("IN1")      /* DSW #2 + Input 2P */
621		AM_RANGE(0x300004, 0x300005) AM_READ_PORT("IN2")      /* COINSW + Input 3P */
622		AM_RANGE(0x300006, 0x300007) AM_READ_PORT("IN3")      /* SERVICESW + Input 4P */
623		AM_RANGE(0xfefffa, 0xfefffb) AM_READ(dallas_kludge_r)   /* DS5002FP related patch */
624		AM_RANGE(0xfe0000, 0xfeffff) AM_READ(SMH_RAM)         /* Work RAM */
	586	static ADDRESS_MAP_START( touchgo_map, ADDRESS_SPACE_PROGRAM, 16 )
	587	AM_RANGE(0x000000, 0x0fffff) AM_ROM                                                               /* ROM */
	588	AM_RANGE(0x202890, 0x2028ff) AM_DEVREADWRITE("gaelco", gaelcosnd_r, gaelcosnd_w) AM_BASE(&gaelco_sndregs)         /* Sound Registers */
	589	AM_RANGE(0x200000, 0x20ffff) AM_RAM_WRITE(gaelco2_vram_w) AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)         /* Video RAM */
	590	AM_RANGE(0x210000, 0x211fff) AM_RAM_WRITE(gaelco2_palette_w) AM_BASE(&paletteram16)                           /* Palette */
	591	AM_RANGE(0x218004, 0x218009) AM_RAM AM_BASE(&gaelco2_vregs)                                             /* Video Registers */
	592	AM_RANGE(0x300000, 0x300001) AM_READ_PORT("IN0")                                                   /* DSW #1 + Input 1P */
	593	AM_RANGE(0x300002, 0x300003) AM_READ_PORT("IN1")                                                   /* DSW #2 + Input 2P */
	594	AM_RANGE(0x300004, 0x300005) AM_READ_PORT("IN2")                                                   /* COINSW + Input 3P */
	595	AM_RANGE(0x300006, 0x300007) AM_READ_PORT("IN3")                                                   /* SERVICESW + Input 4P */
	596	AM_RANGE(0x500000, 0x50001f) AM_WRITE(touchgo_coin_w)                                                /* Coin counters */
	597	AM_RANGE(0xfefffa, 0xfefffb) AM_READWRITE(dallas_kludge_r, SMH_RAM)                                       /* DS5002FP related patch */
	598	AM_RANGE(0xfe0000, 0xfeffff) AM_RAM                                                               /* Work RAM */
625	599	ADDRESS_MAP_END
626	600
627		static ADDRESS_MAP_START( touchgo_writemem, ADDRESS_SPACE_PROGRAM, 16 )
628		AM_RANGE(0x000000, 0x0fffff) AM_WRITE(SMH_ROM)                     /* ROM */
629		AM_RANGE(0x202890, 0x2028ff) AM_DEVWRITE("gaelco", gaelcosnd_w) AM_BASE(&gaelco_sndregs)      /* Sound Registers */
630		AM_RANGE(0x200000, 0x20ffff) AM_WRITE(gaelco2_vram_w) AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)   /* Video RAM */
631		AM_RANGE(0x210000, 0x211fff) AM_WRITE(gaelco2_palette_w) AM_BASE(&paletteram16)   /* Palette */
632		AM_RANGE(0x218004, 0x218009) AM_WRITE(SMH_RAM) AM_BASE(&gaelco2_vregs)         /* Video Registers */
633		AM_RANGE(0x500000, 0x50001f) AM_WRITE(touchgo_coin_w)                  /* Coin counters */
634		AM_RANGE(0xfe0000, 0xfeffff) AM_WRITE(SMH_RAM)                     /* Work RAM */
635		ADDRESS_MAP_END
636	601
637
638	602	static INPUT_PORTS_START( touchgo )
639	603	PORT_START("IN0")
640	604	PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_8WAY PORT_PLAYER(1)
r4679	r4680
751	715	static MACHINE_DRIVER_START( touchgo )
752	716	/* basic machine hardware */
753	717	MDRV_CPU_ADD("maincpu", M68000, 32000000/2)         /* 16 MHz */
754		MDRV_CPU_PROGRAM_MAP(touchgo_readmem, touchgo_writemem)
	718	MDRV_CPU_PROGRAM_MAP(touchgo_map,0)
755	719	MDRV_CPU_VBLANK_INT("lscreen", irq6_line_hold)
756	720
757	721	/* video hardware */
r4679	r4680
884	848	SNOW BOARD
885	849	============================================================================*/
886	850
887		static ADDRESS_MAP_START( snowboar_readmem, ADDRESS_SPACE_PROGRAM, 16 )
888		AM_RANGE(0x000000, 0x0fffff) AM_READ(SMH_ROM)         /* ROM */
889		AM_RANGE(0x202890, 0x2028ff) AM_DEVREAD("gaelco", gaelcosnd_r)      /* Sound Registers */
890		AM_RANGE(0x200000, 0x20ffff) AM_READ(SMH_RAM)         /* Video RAM */
891		AM_RANGE(0x210000, 0x211fff) AM_READ(SMH_RAM)         /* Palette */
892		AM_RANGE(0x212000, 0x213fff) AM_READ(SMH_RAM)         /* Extra RAM */
893		AM_RANGE(0x218004, 0x218009) AM_READ(SMH_RAM)         /* Video Registers */
	851	static ADDRESS_MAP_START( snowboar_map, ADDRESS_SPACE_PROGRAM, 16 )
	852	AM_RANGE(0x000000, 0x0fffff) AM_ROM                                                                  /* ROM */
	853	AM_RANGE(0x202890, 0x2028ff) AM_DEVREADWRITE("gaelco", gaelcosnd_r, gaelcosnd_w) AM_BASE(&gaelco_sndregs)            /* Sound Registers */
	854	AM_RANGE(0x200000, 0x20ffff) AM_RAM_WRITE(gaelco2_vram_w) AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)            /* Video RAM */
	855	AM_RANGE(0x210000, 0x211fff) AM_RAM_WRITE(gaelco2_palette_w) AM_BASE(&paletteram16)                              /* Palette */
	856	AM_RANGE(0x212000, 0x213fff) AM_RAM                                                                  /* Extra RAM */
	857	AM_RANGE(0x218004, 0x218009) AM_RAM AM_BASE(&gaelco2_vregs)                                                /* Video Registers */
894	858	AM_RANGE(0x300000, 0x300001) AM_READ_PORT("P1")
	859	AM_RANGE(0x300000, 0x300003) AM_WRITE(gaelco2_coin2_w)                                                   /* Coin Counters */
	860	AM_RANGE(0x300008, 0x300009) AM_WRITE(gaelco2_eeprom_data_w)                                             /* EEPROM data */
	861	AM_RANGE(0x30000a, 0x30000b) AM_WRITE(gaelco2_eeprom_sk_w)                                                /* EEPROM serial clock */
	862	AM_RANGE(0x30000c, 0x30000d) AM_WRITE(gaelco2_eeprom_cs_w)                                                /* EEPROM chip select */
895	863	AM_RANGE(0x300010, 0x300011) AM_READ_PORT("P2")
896	864	AM_RANGE(0x300020, 0x300021) AM_READ_PORT("COIN")
897		AM_RANGE(0x310000, 0x31ffff) AM_READ(snowboar_protection_r)/* Protection */
898		AM_RANGE(0xfe0000, 0xfeffff) AM_READ(SMH_RAM)         /* Work RAM */
	865	AM_RANGE(0x310000, 0x31ffff) AM_READWRITE(snowboar_protection_r,snowboar_protection_w) AM_BASE(&snowboar_protection)   /* Protection */
	866	AM_RANGE(0xfe0000, 0xfeffff) AM_RAM                                                                  /* Work RAM */
899	867	ADDRESS_MAP_END
900	868
901		static ADDRESS_MAP_START( snowboar_writemem, ADDRESS_SPACE_PROGRAM, 16 )
902		AM_RANGE(0x000000, 0x0fffff) AM_WRITE(SMH_ROM)                     /* ROM */
903		AM_RANGE(0x202890, 0x2028ff) AM_DEVWRITE("gaelco", gaelcosnd_w) AM_BASE(&gaelco_sndregs)      /* Sound Registers */
904		AM_RANGE(0x200000, 0x20ffff) AM_WRITE(gaelco2_vram_w) AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)   /* Video RAM */
905		AM_RANGE(0x210000, 0x211fff) AM_WRITE(gaelco2_palette_w) AM_BASE(&paletteram16)   /* Palette */
906		AM_RANGE(0x212000, 0x213fff) AM_WRITE(SMH_RAM)                     /* Extra RAM */
907		AM_RANGE(0x218004, 0x218009) AM_WRITE(SMH_RAM) AM_BASE(&gaelco2_vregs)         /* Video Registers */
908		AM_RANGE(0x300000, 0x300003) AM_WRITE(gaelco2_coin2_w)               /* Coin Counters */
909		AM_RANGE(0x300008, 0x300009) AM_WRITE(gaelco2_eeprom_data_w)            /* EEPROM data */
910		AM_RANGE(0x30000a, 0x30000b) AM_WRITE(gaelco2_eeprom_sk_w)            /* EEPROM serial clock */
911		AM_RANGE(0x30000c, 0x30000d) AM_WRITE(gaelco2_eeprom_cs_w)            /* EEPROM chip select */
912		AM_RANGE(0x310000, 0x31ffff) AM_WRITE(snowboar_protection_w) AM_BASE(&snowboar_protection)/* Protection */
913		AM_RANGE(0xfe0000, 0xfeffff) AM_WRITE(SMH_RAM)                     /* Work RAM */
914		ADDRESS_MAP_END
915	869
916
917	870	static INPUT_PORTS_START( snowboar )
918	871	PORT_START("P1")
919	872	PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_8WAY PORT_PLAYER(1)
r4679	r4680
955	908	static MACHINE_DRIVER_START( snowboar )
956	909	/* basic machine hardware */
957	910	MDRV_CPU_ADD("maincpu", M68000, 30000000/2)         /* 15 MHz */
958		MDRV_CPU_PROGRAM_MAP(snowboar_readmem, snowboar_writemem)
	911	MDRV_CPU_PROGRAM_MAP(snowboar_map,0)
959	912	MDRV_CPU_VBLANK_INT("screen", irq6_line_hold)
960	913
961	914	MDRV_NVRAM_HANDLER(gaelco2)
r4679	r4680
1081	1034	WORLD RALLY 2
1082	1035	============================================================================*/
1083	1036
1084		static ADDRESS_MAP_START( wrally2_readmem, ADDRESS_SPACE_PROGRAM, 16 )
1085		AM_RANGE(0x000000, 0x0fffff) AM_READ(SMH_ROM)         /* ROM */
1086		AM_RANGE(0x202890, 0x2028ff) AM_DEVREAD("gaelco", gaelcosnd_r)      /* Sound Registers */
1087		AM_RANGE(0x200000, 0x20ffff) AM_READ(SMH_RAM)         /* Video RAM */
1088		AM_RANGE(0x210000, 0x211fff) AM_READ(SMH_RAM)         /* Palette */
1089		AM_RANGE(0x212000, 0x213fff) AM_READ(SMH_RAM)         /* Extra RAM */
1090		AM_RANGE(0x218004, 0x218009) AM_READ(SMH_RAM)         /* Video Registers */
1091		AM_RANGE(0x300000, 0x300001) AM_READ_PORT("IN0")      /* DIPSW #2 + Inputs 1P */
1092		AM_RANGE(0x300002, 0x300003) AM_READ_PORT("IN1")      /* DIPSW #1 */
1093		AM_RANGE(0x300004, 0x300005) AM_READ_PORT("IN2")      /* Inputs 2P + COINSW */
1094		AM_RANGE(0x300006, 0x300007) AM_READ_PORT("IN3")      /* SERVICESW */
1095		AM_RANGE(0xfe0000, 0xfeffff) AM_READ(SMH_RAM)         /* Work RAM */
	1037	static ADDRESS_MAP_START( wrally2_map, ADDRESS_SPACE_PROGRAM, 16 )
	1038	AM_RANGE(0x000000, 0x0fffff) AM_ROM                                                         /* ROM */
	1039	AM_RANGE(0x202890, 0x2028ff) AM_DEVREADWRITE("gaelco", gaelcosnd_r, gaelcosnd_w) AM_BASE(&gaelco_sndregs)   /* Sound Registers */
	1040	AM_RANGE(0x200000, 0x20ffff) AM_RAM_WRITE(gaelco2_vram_w) AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)   /* Video RAM */
	1041	AM_RANGE(0x210000, 0x211fff) AM_RAM_WRITE(gaelco2_palette_w) AM_BASE(&paletteram16)                     /* Palette */
	1042	AM_RANGE(0x212000, 0x213fff) AM_RAM                                                         /* Extra RAM */
	1043	AM_RANGE(0x218004, 0x218009) AM_RAM AM_BASE(&gaelco2_vregs)                                       /* Video Registers */
	1044	AM_RANGE(0x300000, 0x300001) AM_READ_PORT("IN0")                                             /* DIPSW #2 + Inputs 1P */
	1045	AM_RANGE(0x300002, 0x300003) AM_READ_PORT("IN1")                                             /* DIPSW #1 */
	1046	AM_RANGE(0x300004, 0x300005) AM_READ_PORT("IN2")                                             /* Inputs 2P + COINSW */
	1047	AM_RANGE(0x300006, 0x300007) AM_READ_PORT("IN3")                                             /* SERVICESW */
	1048	AM_RANGE(0x400000, 0x400011) AM_WRITE(wrally2_coin_w)                                          /* Coin Counters */
	1049	AM_RANGE(0x400028, 0x400029) AM_WRITE(wrally2_adc_clk)                                          /* ADCs clock-in line */
	1050	AM_RANGE(0x400030, 0x400031) AM_WRITE(wrally2_adc_cs)                                          /* ADCs chip select line */
	1051	AM_RANGE(0xfe0000, 0xfeffff) AM_RAM                                                         /* Work RAM */
1096	1052	ADDRESS_MAP_END
1097	1053
1098		static ADDRESS_MAP_START( wrally2_writemem, ADDRESS_SPACE_PROGRAM, 16 )
1099		AM_RANGE(0x000000, 0x0fffff) AM_WRITE(SMH_ROM)                           /* ROM */
1100		AM_RANGE(0x202890, 0x2028ff) AM_DEVWRITE("gaelco", gaelcosnd_w) AM_BASE(&gaelco_sndregs)      /* Sound Registers */
1101		AM_RANGE(0x200000, 0x20ffff) AM_WRITE(gaelco2_vram_w) AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)   /* Video RAM */
1102		AM_RANGE(0x210000, 0x211fff) AM_WRITE(gaelco2_palette_w) AM_BASE(&paletteram16)   /* Palette */
1103		AM_RANGE(0x212000, 0x213fff) AM_WRITE(SMH_RAM)                           /* Extra RAM */
1104		AM_RANGE(0x218004, 0x218009) AM_WRITE(SMH_RAM) AM_BASE(&gaelco2_vregs)         /* Video Registers */
1105		AM_RANGE(0x400000, 0x400011) AM_WRITE(wrally2_coin_w)                     /* Coin Counters */
1106		AM_RANGE(0x400028, 0x400029) AM_WRITE(wrally2_adc_clk)                           /* ADCs clock-in line */
1107		AM_RANGE(0x400030, 0x400031) AM_WRITE(wrally2_adc_cs)                           /* ADCs chip select line */
1108		AM_RANGE(0xfe0000, 0xfeffff) AM_WRITE(SMH_RAM)                           /* Work RAM */
1109		ADDRESS_MAP_END
1110	1054
1111
1112	1055	static INPUT_PORTS_START( wrally2 )
1113	1056	PORT_START("IN0")
1114	1057	PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_8WAY PORT_PLAYER(1)
r4679	r4680
1207	1150	static MACHINE_DRIVER_START( wrally2 )
1208	1151	/* basic machine hardware */
1209	1152	MDRV_CPU_ADD("maincpu", M68000, 26000000/2)         /* 13 MHz */
1210		MDRV_CPU_PROGRAM_MAP(wrally2_readmem, wrally2_writemem)
	1153	MDRV_CPU_PROGRAM_MAP(wrally2_map,0)
1211	1154	MDRV_CPU_VBLANK_INT("lscreen", irq6_line_hold)
1212	1155
1213	1156	MDRV_NVRAM_HANDLER(gaelco2)

src/mame/drivers/homerun.c

r4679	r4680
81	81
82	82	static ADDRESS_MAP_START( homerun_memmap, ADDRESS_SPACE_PROGRAM, 8 )
83	83	AM_RANGE(0x0000, 0x3fff) AM_ROM
84		AM_RANGE(0x4000, 0x7fff) AM_READ(SMH_BANK1)
	84	AM_RANGE(0x4000, 0x7fff) AM_READ(SMH_BANK(1))
85	85	AM_RANGE(0x8000, 0x9fff) AM_RAM_WRITE(homerun_videoram_w) AM_BASE(&homerun_videoram)
86	86	AM_RANGE(0xa000, 0xa0ff) AM_RAM AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
87	87	AM_RANGE(0xb000, 0xb0ff) AM_WRITE(homerun_color_w)

src/mame/drivers/guab.c

r4679	r4680
59	59
60	60	static void ptm_irq(running_machine *machine, int state)
61	61	{
62		cpu_set_input_line(machine->cpu[0], INT_6840PTM, state);
	62	cputag_set_input_line(machine, "maincpu", INT_6840PTM, state);
63	63	}
64	64
65	65	static const ptm6840_interface ptm_intf =
r4679	r4680
83	83
84	84	static void tms_interrupt(running_machine *machine, int state)
85	85	{
86		cpu_set_input_line(machine->cpu[0], INT_TMS34061, state);
	86	cputag_set_input_line(machine, "maincpu", INT_TMS34061, state);
87	87	}
88	88
89	89	static const struct tms34061_interface tms34061intf =
r4679	r4680
350	350	}
351	351
352	352	fdc.status |= DATA_REQUEST;
353		cpu_set_input_line(machine->cpu[0], INT_FLOPPYCTRL, ASSERT_LINE);
	353	cputag_set_input_line(machine, "maincpu", INT_FLOPPYCTRL, ASSERT_LINE);
354	354	}
355	355
356	356
r4679	r4680
444	444	fdc.sector));
445	445
446	446	/* Trigger a DRQ interrupt on the CPU */
447		cpu_set_input_line(space->machine->cpu[0], INT_FLOPPYCTRL, ASSERT_LINE);
	447	cputag_set_input_line(space->machine, "maincpu", INT_FLOPPYCTRL, ASSERT_LINE);
448	448	fdc.status |= DATA_REQUEST;
449	449	break;
450	450	}
r4679	r4680
489	489	fdc.data = data;
490	490
491	491	/* Clear the DRQ */
492		cpu_set_input_line(space->machine->cpu[0], INT_FLOPPYCTRL, CLEAR_LINE);
	492	cputag_set_input_line(space->machine, "maincpu", INT_FLOPPYCTRL, CLEAR_LINE);
493	493
494	494	/* Queue an event to write the data if write command was specified */
495	495	if (fdc.cmd & 0x20)
r4679	r4680
526	526	retval = fdc.data;
527	527
528	528	/* Clear the DRQ */
529		cpu_set_input_line(space->machine->cpu[0], INT_FLOPPYCTRL, CLEAR_LINE);
	529	cputag_set_input_line(space->machine, "maincpu", INT_FLOPPYCTRL, CLEAR_LINE);
530	530	fdc.status &= ~DATA_REQUEST;
531	531	break;
532	532	}
r4679	r4680
572	572	if (newval == 0)
573	573	{
574	574	UINT32 credit;
575		const address_space *space = cpu_get_address_space(field->port->machine->cpu[0], ADDRESS_SPACE_PROGRAM);
	575	const address_space *space = cputag_get_address_space(field->port->machine, "maincpu", ADDRESS_SPACE_PROGRAM);
576	576
577	577	/* Get the current credit value and add the new coin value */
578	578	credit = memory_read_dword(space, 0x8002c) + (UINT32)(FPTR)param;

src/mame/drivers/baraduke.c

r4679	r4680
170	170
171	171	static WRITE8_HANDLER( baraduke_irq_ack_w )
172	172	{
173		cpu_set_input_line(space->machine->cpu[0], 0, CLEAR_LINE);
	173	cputag_set_input_line(space->machine, "maincpu", 0, CLEAR_LINE);
174	174	}
175	175
176	176

src/mame/drivers/champbas.c

r4679	r4680
130	130	{
131	131	int bit = data & 1;
132	132
133		cpu_interrupt_enable(space->machine->cpu[0],bit);
	133	cpu_interrupt_enable(cputag_get_cpu(space->machine, "maincpu"), bit);
134	134	if (!bit)
135		cpu_set_input_line(space->machine->cpu[0], 0, CLEAR_LINE);
	135	cputag_set_input_line(space->machine, "maincpu", 0, CLEAR_LINE);
136	136	}
137	137
138	138
139	139	static TIMER_CALLBACK( exctsccr_fm_callback )
140	140	{
141		cpu_set_input_line_and_vector(machine->cpu[1], 0, HOLD_LINE, 0xff );
	141	cputag_set_input_line_and_vector(machine, "audiocpu", 0, HOLD_LINE, 0xff);
142	142	}
143	143
144	144	static MACHINE_START( exctsccr )

src/mame/drivers/ssozumo.c

r4679	r4680
8	8	***************************************************************************/
9	9
10	10	#include "driver.h"
11		#include "deprecat.h"
12	11	#include "cpu/m6502/m6502.h"
13	12	#include "cpu/m6809/m6809.h"
14	13	#include "sound/ay8910.h"
r4679	r4680
29	28	extern VIDEO_START( ssozumo );
30	29	extern VIDEO_UPDATE( ssozumo );
31	30
32
33		static INTERRUPT_GEN( ssozumo_interrupt )
34		{
35		static int coin;
36
37		if ((input_port_read(device->machine, "P1") & 0xc0) != 0xc0)
38		{
39		if (coin == 0)
40		{
41		coin = 1;
42		nmi_line_pulse(device);
43		return;
44		}
45		}
46		else coin = 0;
47
48		irq0_line_hold(device);
49		}
50
51
52	31	static WRITE8_HANDLER( ssozumo_sh_command_w )
53	32	{
54		soundlatch_w(space, offset, data);
55		cpu_set_input_line(space->machine->cpu[1], M6502_IRQ_LINE, HOLD_LINE);
	33	soundlatch_w(space, 0, data);
	34	cputag_set_input_line(space->machine, "audiocpu", M6502_IRQ_LINE, HOLD_LINE);
56	35	}
57	36
58	37
59		static ADDRESS_MAP_START( readmem, ADDRESS_SPACE_PROGRAM, 8 )
60		AM_RANGE(0x0000, 0x077f) AM_READ(SMH_RAM)
61
62		AM_RANGE(0x2000, 0x27ff) AM_READ(SMH_RAM)
63		AM_RANGE(0x3000, 0x31ff) AM_READ(SMH_RAM)
64
65		AM_RANGE(0x4000, 0x4000) AM_READ_PORT("P1")
66		AM_RANGE(0x4010, 0x4010) AM_READ_PORT("P2")
67		AM_RANGE(0x4020, 0x4020) AM_READ_PORT("DSW2")
	38	static ADDRESS_MAP_START( ssozumo_map, ADDRESS_SPACE_PROGRAM, 8 )
	39	AM_RANGE(0x0000, 0x077f) AM_RAM
	40	AM_RANGE(0x0780, 0x07ff) AM_RAM AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
	41	AM_RANGE(0x2000, 0x23ff) AM_RAM_WRITE(ssozumo_videoram2_w) AM_BASE(&ssozumo_videoram2)
	42	AM_RANGE(0x2400, 0x27ff) AM_RAM_WRITE(ssozumo_colorram2_w) AM_BASE(&ssozumo_colorram2)
	43	AM_RANGE(0x3000, 0x31ff) AM_RAM_WRITE(ssozumo_videoram_w) AM_BASE(&videoram)
	44	AM_RANGE(0x3200, 0x33ff) AM_RAM_WRITE(ssozumo_colorram_w) AM_BASE(&colorram)
	45	AM_RANGE(0x3400, 0x35ff) AM_RAM
	46	AM_RANGE(0x3600, 0x37ff) AM_RAM
	47	AM_RANGE(0x4000, 0x4000) AM_READ_PORT("P1") AM_WRITE(ssozumo_flipscreen_w)
	48	AM_RANGE(0x4010, 0x4010) AM_READ_PORT("P2") AM_WRITE(ssozumo_sh_command_w)
	49	AM_RANGE(0x4020, 0x4020) AM_READ_PORT("DSW2") AM_WRITE(ssozumo_scroll_w)
68	50	AM_RANGE(0x4030, 0x4030) AM_READ_PORT("DSW1")
69
70		AM_RANGE(0x6000, 0xffff) AM_READ(SMH_ROM)
	51	//  AM_RANGE(0x4030, 0x4030) AM_WRITEONLY
	52	AM_RANGE(0x4050, 0x407f) AM_RAM_WRITE(ssozumo_paletteram_w) AM_BASE(&paletteram)
	53	AM_RANGE(0x6000, 0xffff) AM_ROM
71	54	ADDRESS_MAP_END
72	55
73
74		static ADDRESS_MAP_START( writemem, ADDRESS_SPACE_PROGRAM, 8 )
75		AM_RANGE(0x0000, 0x077f) AM_WRITE(SMH_RAM)
76
77		AM_RANGE(0x0780, 0x07ff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
78		AM_RANGE(0x2000, 0x23ff) AM_WRITE(ssozumo_videoram2_w) AM_BASE(&ssozumo_videoram2)
79		AM_RANGE(0x2400, 0x27ff) AM_WRITE(ssozumo_colorram2_w) AM_BASE(&ssozumo_colorram2)
80		AM_RANGE(0x3000, 0x31ff) AM_WRITE(ssozumo_videoram_w) AM_BASE(&videoram)
81		AM_RANGE(0x3200, 0x33ff) AM_WRITE(ssozumo_colorram_w) AM_BASE(&colorram)
82		AM_RANGE(0x3400, 0x35ff) AM_WRITE(SMH_RAM)
83		AM_RANGE(0x3600, 0x37ff) AM_WRITE(SMH_RAM)
84
85		AM_RANGE(0x4000, 0x4000) AM_WRITE(ssozumo_flipscreen_w)
86		AM_RANGE(0x4010, 0x4010) AM_WRITE(ssozumo_sh_command_w)
87		AM_RANGE(0x4020, 0x4020) AM_WRITE(ssozumo_scroll_w)
88		//  AM_RANGE(0x4030, 0x4030) AM_WRITE(SMH_RAM)
89		AM_RANGE(0x4050, 0x407f) AM_WRITE(ssozumo_paletteram_w) AM_BASE(&paletteram)
90
91		AM_RANGE(0x6000, 0xffff) AM_WRITE(SMH_ROM)
92		ADDRESS_MAP_END
93
94
95		static ADDRESS_MAP_START( sound_readmem, ADDRESS_SPACE_PROGRAM, 8 )
96		AM_RANGE(0x0000, 0x01ff) AM_READ(SMH_RAM)
97		AM_RANGE(0x2007, 0x2007) AM_READ(soundlatch_r)
98		AM_RANGE(0x4000, 0xffff) AM_READ(SMH_ROM)
99		ADDRESS_MAP_END
100
101
102		static ADDRESS_MAP_START( sound_writemem, ADDRESS_SPACE_PROGRAM, 8 )
103		AM_RANGE(0x0000, 0x01ff) AM_WRITE(SMH_RAM)
	56	static ADDRESS_MAP_START( ssozumo_sound_map, ADDRESS_SPACE_PROGRAM, 8 )
	57	AM_RANGE(0x0000, 0x01ff) AM_RAM
104	58	AM_RANGE(0x2000, 0x2001) AM_DEVWRITE("ay1", ay8910_data_address_w)
105	59	AM_RANGE(0x2002, 0x2003) AM_DEVWRITE("ay2", ay8910_data_address_w)
106	60	AM_RANGE(0x2004, 0x2004) AM_DEVWRITE("dac", dac_signed_w)
107	61	AM_RANGE(0x2005, 0x2005) AM_WRITE(interrupt_enable_w)
108		AM_RANGE(0x4000, 0xffff) AM_WRITE(SMH_ROM)
	62	AM_RANGE(0x2007, 0x2007) AM_READ(soundlatch_r)
	63	AM_RANGE(0x4000, 0xffff) AM_ROM
109	64	ADDRESS_MAP_END
110	65
	66	static INPUT_CHANGED( coin_inserted )
	67	{
	68	cputag_set_input_line(field->port->machine, "maincpu", INPUT_LINE_NMI, newval ? CLEAR_LINE : ASSERT_LINE);
	69	}
111	70
112	71	static INPUT_PORTS_START( ssozumo )
113	72	PORT_START("P1")   /* IN0 */
r4679	r4680
117	76	PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_8WAY
118	77	PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON1 )
119	78	PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON2 )
120		PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_COIN2 )
121		PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_COIN1 )
	79	PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_COIN2 ) PORT_CHANGED(coin_inserted, 0)
	80	PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_CHANGED(coin_inserted, 0)
122	81
123	82	PORT_START("P2")   /* IN1 */
124	83	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_8WAY PORT_PLAYER(2)
r4679	r4680
232	191
233	192	/* basic machine hardware */
234	193	MDRV_CPU_ADD("maincpu", M6502, 1200000)   /* 1.2 MHz ???? */
235		MDRV_CPU_PROGRAM_MAP(readmem,writemem)
236		MDRV_CPU_VBLANK_INT("screen", ssozumo_interrupt)
	194	MDRV_CPU_PROGRAM_MAP(ssozumo_map,0)
	195	MDRV_CPU_VBLANK_INT("screen", irq0_line_hold)
237	196
238	197	MDRV_CPU_ADD("audiocpu", M6502, 975000)       /* 975 kHz ?? */
239		MDRV_CPU_PROGRAM_MAP(sound_readmem,sound_writemem)
240		MDRV_CPU_VBLANK_INT_HACK(nmi_line_pulse,16)   /* IRQs are triggered by the main CPU */
	198	MDRV_CPU_PROGRAM_MAP(ssozumo_sound_map,0)
	199	MDRV_CPU_PERIODIC_INT(nmi_line_pulse,60*16)   /* not accurate */
241	200
242	201	/* video hardware */
243	202	MDRV_SCREEN_ADD("screen", RASTER)

src/mame/drivers/beaminv.c

r4679	r4680
82	82	int next_interrupt_number;
83	83	int next_vpos;
84	84
85		cpu_set_input_line(machine->cpu[0], 0, HOLD_LINE);
	85	cputag_set_input_line(machine, "maincpu", 0, HOLD_LINE);
86	86
87	87	/* set up for next interrupt */
88	88	next_interrupt_number = (interrupt_number + 1) % INTERRUPTS_PER_FRAME;

src/mame/drivers/m107.c

r4679	r4680
75	75	if (scanline == m107_raster_irq_position)
76	76	{
77	77	video_screen_update_partial(machine->primary_screen, scanline);
78		cpu_set_input_line_and_vector(machine->cpu[0], 0, HOLD_LINE, M107_IRQ_2);
	78	cputag_set_input_line_and_vector(machine, "maincpu", 0, HOLD_LINE, M107_IRQ_2);
79	79	}
80	80
81	81	/* VBLANK interrupt */
82	82	else if (scanline == video_screen_get_visible_area(machine->primary_screen)->max_y + 1)
83	83	{
84	84	video_screen_update_partial(machine->primary_screen, scanline);
85		cpu_set_input_line_and_vector(machine->cpu[0], 0, HOLD_LINE, M107_IRQ_0);
	85	cputag_set_input_line_and_vector(machine, "maincpu", 0, HOLD_LINE, M107_IRQ_0);
86	86	}
87	87
88	88	/* adjust for next scanline */
r4679	r4680
119	119	}
120	120
121	121	if (irqvector & 0x2)      /* YM2151 has precedence */
122		cpu_set_input_line_vector(machine->cpu[1],0,0x18);
	122	cpu_set_input_line_vector(cputag_get_cpu(machine, "soundcpu"), 0, 0x18);
123	123	else if (irqvector & 0x1)   /* V30 */
124		cpu_set_input_line_vector(machine->cpu[1],0,0x19);
	124	cpu_set_input_line_vector(cputag_get_cpu(machine, "soundcpu"), 0, 0x19);
125	125
126	126	if (irqvector == 0)   /* no IRQs pending */
127		cpu_set_input_line(machine->cpu[1],0,CLEAR_LINE);
	127	cputag_set_input_line(machine, "soundcpu", 0, CLEAR_LINE);
128	128	else   /* IRQ pending */
129		cpu_set_input_line(machine->cpu[1],0,ASSERT_LINE);
	129	cputag_set_input_line(machine, "soundcpu", 0, ASSERT_LINE);
130	130	}
131	131
132	132	static WRITE16_HANDLER( m107_soundlatch_w )
133	133	{
134		timer_call_after_resynch(space->machine, NULL, V30_ASSERT,setvector_callback);
	134	timer_call_after_resynch(space->machine, NULL, V30_ASSERT, setvector_callback);
135	135	soundlatch_w(space, 0, data & 0xff);
136	136	//      logerror("soundlatch_w %02x\n",data);
137	137	}
r4679	r4680
156	156	static WRITE16_HANDLER( m107_sound_status_w )
157	157	{
158	158	COMBINE_DATA(&sound_status);
159		cpu_set_input_line_and_vector(space->machine->cpu[0], 0, HOLD_LINE, M107_IRQ_3);
	159	cputag_set_input_line_and_vector(space->machine, "maincpu", 0, HOLD_LINE, M107_IRQ_3);
160	160	}
161	161
162	162	/*****************************************************************************/
r4679	r4680
629	629	{
630	630	UINT8 *RAM = memory_region(machine, "maincpu");
631	631
632		memcpy(RAM+0xffff0,RAM+0x7fff0,0x10); /* Start vector */
633		memory_set_bankptr(machine, 1,&RAM[0xa0000]); /* Initial bank */
	632	memcpy(RAM + 0xffff0, RAM + 0x7fff0, 0x10); /* Start vector */
	633	memory_set_bankptr(machine, 1, &RAM[0xa0000]); /* Initial bank */
634	634
635	635	RAM = memory_region(machine, "soundcpu");
636		memcpy(RAM+0xffff0,RAM+0x1fff0,0x10); /* Sound cpu Start vector */
	636	memcpy(RAM + 0xffff0,RAM + 0x1fff0, 0x10); /* Sound cpu Start vector */
637	637
638		m107_irq_vectorbase=0x20;
	638	m107_irq_vectorbase = 0x20;
639	639	m107_spritesystem = 1;
640	640	}
641	641
r4679	r4680
643	643	{
644	644	UINT8 *RAM = memory_region(machine, "maincpu");
645	645
646		memcpy(RAM+0xffff0,RAM+0x7fff0,0x10); /* Start vector */
647		memory_set_bankptr(machine, 1,&RAM[0xa0000]); /* Initial bank */
	646	memcpy(RAM + 0xffff0, RAM + 0x7fff0, 0x10); /* Start vector */
	647	memory_set_bankptr(machine, 1, &RAM[0xa0000]); /* Initial bank */
648	648
649	649	RAM = memory_region(machine, "soundcpu");
650		memcpy(RAM+0xffff0,RAM+0x1fff0,0x10); /* Sound cpu Start vector */
	650	memcpy(RAM + 0xffff0, RAM + 0x1fff0, 0x10); /* Sound cpu Start vector */
651	651
652		m107_irq_vectorbase=0x80;
	652	m107_irq_vectorbase = 0x80;
653	653	m107_spritesystem = 0;
654	654	}
655	655
r4679	r4680
657	657	{
658	658	UINT8 *RAM = memory_region(machine, "maincpu");
659	659
660		memcpy(RAM+0xffff0,RAM+0x7fff0,0x10); /* Start vector */
661		memory_set_bankptr(machine, 1,&RAM[0xa0000]); /* Initial bank */
	660	memcpy(RAM + 0xffff0, RAM + 0x7fff0, 0x10); /* Start vector */
	661	memory_set_bankptr(machine, 1, &RAM[0xa0000]); /* Initial bank */
662	662
663	663	RAM = memory_region(machine, "soundcpu");
664		memcpy(RAM+0xffff0,RAM+0x1fff0,0x10); /* Sound cpu Start vector */
	664	memcpy(RAM + 0xffff0, RAM + 0x1fff0, 0x10); /* Sound cpu Start vector */
665	665
666	666
667		m107_irq_vectorbase=0x80;
	667	m107_irq_vectorbase = 0x80;
668	668	m107_spritesystem = 0;
669	669	}
670	670

src/mame/drivers/ninjaw.c

r4679	r4680
213	213	/* bit 0 enables cpu B */
214	214	/* however this fails when recovering from a save state
215	215	if cpu B is disabled !! */
216		cpu_set_input_line(machine->cpu[2], INPUT_LINE_RESET, (cpua_ctrl &0x1) ? CLEAR_LINE : ASSERT_LINE);
	216	cputag_set_input_line(machine, "sub", INPUT_LINE_RESET, (cpua_ctrl &0x1) ? CLEAR_LINE : ASSERT_LINE);
217	217
218	218	}
219	219
r4679	r4680
283	283	MEMORY STRUCTURES
284	284	***********************************************************/
285	285
286		static ADDRESS_MAP_START( ninjaw_readmem, ADDRESS_SPACE_PROGRAM, 16 )
287		AM_RANGE(0x000000, 0x0bffff) AM_READ(SMH_ROM)
288		AM_RANGE(0x0c0000, 0x0cffff) AM_READ(SMH_RAM)   /* main ram */
289		AM_RANGE(0x200000, 0x200001) AM_READ8(TC0220IOC_portreg_r, 0x00ff)
290		AM_RANGE(0x200002, 0x200003) AM_READ8(TC0220IOC_port_r, 0x00ff)
291		AM_RANGE(0x220000, 0x220003) AM_READ(ninjaw_sound_r)
292		AM_RANGE(0x280000, 0x293fff) AM_READ(TC0100SCN_word_0_r)   /* tilemaps (1st screen) */
293		AM_RANGE(0x2a0000, 0x2a000f) AM_READ(TC0100SCN_ctrl_word_0_r)
294		AM_RANGE(0x2c0000, 0x2d3fff) AM_READ(TC0100SCN_word_1_r)   /* tilemaps (2nd screen) */
295		AM_RANGE(0x2e0000, 0x2e000f) AM_READ(TC0100SCN_ctrl_word_1_r)
296		AM_RANGE(0x300000, 0x313fff) AM_READ(TC0100SCN_word_2_r)   /* tilemaps (3rd screen) */
297		AM_RANGE(0x320000, 0x32000f) AM_READ(TC0100SCN_ctrl_word_2_r)
298		AM_RANGE(0x340000, 0x340007) AM_READ(TC0110PCR_word_r)      /* palette (1st screen) */
299		AM_RANGE(0x350000, 0x350007) AM_READ(TC0110PCR_word_1_r)   /* palette (2nd screen) */
300		AM_RANGE(0x360000, 0x360007) AM_READ(TC0110PCR_word_2_r)   /* palette (3rd screen) */
301		ADDRESS_MAP_END
302
303		static ADDRESS_MAP_START( ninjaw_writemem, ADDRESS_SPACE_PROGRAM, 16 )
304		AM_RANGE(0x000000, 0x0bffff) AM_WRITE(SMH_ROM)
305		AM_RANGE(0x0c0000, 0x0cffff) AM_WRITE(SMH_RAM)
306		AM_RANGE(0x200000, 0x200001) AM_WRITE8(TC0220IOC_portreg_w, 0x00ff)
307		AM_RANGE(0x200002, 0x200003) AM_WRITE8(TC0220IOC_port_w, 0x00ff)
	286	static ADDRESS_MAP_START( ninjaw_master_map, ADDRESS_SPACE_PROGRAM, 16 )
	287	AM_RANGE(0x000000, 0x0bffff) AM_ROM
	288	AM_RANGE(0x0c0000, 0x0cffff) AM_RAM                                          /* main ram */
	289	AM_RANGE(0x200000, 0x200001) AM_READWRITE8(TC0220IOC_portreg_r,TC0220IOC_portreg_w, 0x00ff)
	290	AM_RANGE(0x200002, 0x200003) AM_READWRITE8(TC0220IOC_port_r,TC0220IOC_port_w, 0x00ff)
308	291	AM_RANGE(0x210000, 0x210001) AM_WRITE(cpua_ctrl_w)
309		AM_RANGE(0x220000, 0x220003) AM_WRITE(ninjaw_sound_w)
	292	AM_RANGE(0x220000, 0x220003) AM_READWRITE(ninjaw_sound_r,ninjaw_sound_w)
310	293	AM_RANGE(0x240000, 0x24ffff) AM_RAM AM_SHARE(1)
311	294	AM_RANGE(0x260000, 0x263fff) AM_RAM AM_SHARE(2) AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)
312		AM_RANGE(0x280000, 0x293fff) AM_WRITE(TC0100SCN_triple_screen_w)   /* tilemaps (all screens) */
313		AM_RANGE(0x2a0000, 0x2a000f) AM_WRITE(TC0100SCN_ctrl_word_0_w)
314		AM_RANGE(0x2c0000, 0x2d3fff) AM_WRITE(TC0100SCN_word_1_w)   /* tilemaps (2nd screen) */
315		AM_RANGE(0x2e0000, 0x2e000f) AM_WRITE(TC0100SCN_ctrl_word_1_w)
316		AM_RANGE(0x300000, 0x313fff) AM_WRITE(TC0100SCN_word_2_w)   /* tilemaps (3rd screen) */
317		AM_RANGE(0x320000, 0x32000f) AM_WRITE(TC0100SCN_ctrl_word_2_w)
318		AM_RANGE(0x340000, 0x340007) AM_WRITE(TC0110PCR_step1_word_w)      /* palette (1st screen) */
319		AM_RANGE(0x350000, 0x350007) AM_WRITE(TC0110PCR_step1_word_1_w)   /* palette (2nd screen) */
320		AM_RANGE(0x360000, 0x360007) AM_WRITE(TC0110PCR_step1_word_2_w)   /* palette (3rd screen) */
	295	AM_RANGE(0x280000, 0x293fff) AM_READWRITE(TC0100SCN_word_0_r,TC0100SCN_triple_screen_w)   /* tilemaps (1st screen/all screens) */
	296	AM_RANGE(0x2a0000, 0x2a000f) AM_READWRITE(TC0100SCN_ctrl_word_0_r,TC0100SCN_ctrl_word_0_w)
	297	AM_RANGE(0x2c0000, 0x2d3fff) AM_READWRITE(TC0100SCN_word_1_r,TC0100SCN_word_1_w)      /* tilemaps (2nd screen) */
	298	AM_RANGE(0x2e0000, 0x2e000f) AM_READWRITE(TC0100SCN_ctrl_word_1_r,TC0100SCN_ctrl_word_1_w)
	299	AM_RANGE(0x300000, 0x313fff) AM_READWRITE(TC0100SCN_word_2_r,TC0100SCN_word_2_w)      /* tilemaps (3rd screen) */
	300	AM_RANGE(0x320000, 0x32000f) AM_READWRITE(TC0100SCN_ctrl_word_2_r,TC0100SCN_ctrl_word_2_w)
	301	AM_RANGE(0x340000, 0x340007) AM_READWRITE(TC0110PCR_word_r,TC0110PCR_step1_word_w)      /* palette (1st screen) */
	302	AM_RANGE(0x350000, 0x350007) AM_READWRITE(TC0110PCR_word_1_r,TC0110PCR_step1_word_1_w)   /* palette (2nd screen) */
	303	AM_RANGE(0x360000, 0x360007) AM_READWRITE(TC0110PCR_word_2_r,TC0110PCR_step1_word_2_w)   /* palette (3rd screen) */
321	304	ADDRESS_MAP_END
322	305
323	306	// NB there could be conflicts between which cpu writes what to the
324	307	// palette, as our interleaving won't match the original board.
325	308
326		static ADDRESS_MAP_START( ninjaw_cpub_readmem, ADDRESS_SPACE_PROGRAM, 16 )
327		AM_RANGE(0x000000, 0x05ffff) AM_READ(SMH_ROM)
328		AM_RANGE(0x080000, 0x08ffff) AM_READ(SMH_RAM)   /* main ram */
329		AM_RANGE(0x200000, 0x200001) AM_READ8(TC0220IOC_portreg_r, 0x00ff)
330		AM_RANGE(0x200002, 0x200003) AM_READ8(TC0220IOC_port_r, 0x00ff)
331		AM_RANGE(0x280000, 0x293fff) AM_READ(TC0100SCN_word_0_r)   /* tilemaps (1st screen) */
332		AM_RANGE(0x340000, 0x340007) AM_READ(TC0110PCR_word_r)      /* palette (1st screen) */
333		AM_RANGE(0x350000, 0x350007) AM_READ(TC0110PCR_word_1_r)   /* palette (2nd screen) */
334		AM_RANGE(0x360000, 0x360007) AM_READ(TC0110PCR_word_2_r)   /* palette (3rd screen) */
335		ADDRESS_MAP_END
336
337		static ADDRESS_MAP_START( ninjaw_cpub_writemem, ADDRESS_SPACE_PROGRAM, 16 )
338		AM_RANGE(0x000000, 0x05ffff) AM_WRITE(SMH_ROM)
339		AM_RANGE(0x080000, 0x08ffff) AM_WRITE(SMH_RAM)
340		AM_RANGE(0x200000, 0x200001) AM_WRITE8(TC0220IOC_portreg_w, 0x00ff)
341		AM_RANGE(0x200002, 0x200003) AM_WRITE8(TC0220IOC_port_w, 0x00ff)
	309	static ADDRESS_MAP_START( ninjaw_slave_map, ADDRESS_SPACE_PROGRAM, 16 )
	310	AM_RANGE(0x000000, 0x05ffff) AM_ROM
	311	AM_RANGE(0x080000, 0x08ffff) AM_RAM   /* main ram */
	312	AM_RANGE(0x200000, 0x200001) AM_READWRITE8(TC0220IOC_portreg_r,TC0220IOC_portreg_w, 0x00ff)
	313	AM_RANGE(0x200002, 0x200003) AM_READWRITE8(TC0220IOC_port_r,TC0220IOC_port_w, 0x00ff)
342	314	AM_RANGE(0x240000, 0x24ffff) AM_RAM AM_SHARE(1)
343	315	AM_RANGE(0x260000, 0x263fff) AM_RAM AM_SHARE(2)
344		AM_RANGE(0x280000, 0x293fff) AM_WRITE(TC0100SCN_triple_screen_w)   /* tilemaps (all screens) */
345		AM_RANGE(0x340000, 0x340007) AM_WRITE(TC0110PCR_step1_word_w)      /* palette (1st screen) */
346		AM_RANGE(0x350000, 0x350007) AM_WRITE(TC0110PCR_step1_word_1_w)   /* palette (2nd screen) */
347		AM_RANGE(0x360000, 0x360007) AM_WRITE(TC0110PCR_step1_word_2_w)   /* palette (3rd screen) */
	316	AM_RANGE(0x280000, 0x293fff) AM_READWRITE(TC0100SCN_word_0_r,TC0100SCN_triple_screen_w)   /* tilemaps (1st screen/all screens) */
	317	AM_RANGE(0x340000, 0x340007) AM_READWRITE(TC0110PCR_word_r,TC0110PCR_step1_word_w)      /* palette (1st screen) */
	318	AM_RANGE(0x350000, 0x350007) AM_READWRITE(TC0110PCR_word_1_r,TC0110PCR_step1_word_1_w)   /* palette (2nd screen) */
	319	AM_RANGE(0x360000, 0x360007) AM_READWRITE(TC0110PCR_word_2_r,TC0110PCR_step1_word_2_w)   /* palette (3rd screen) */
348	320	ADDRESS_MAP_END
349	321
350
351		static ADDRESS_MAP_START( darius2_readmem, ADDRESS_SPACE_PROGRAM, 16 )
352		AM_RANGE(0x000000, 0x0bffff) AM_READ(SMH_ROM)
353		AM_RANGE(0x0c0000, 0x0cffff) AM_READ(SMH_RAM)   /* main ram */
354		AM_RANGE(0x200000, 0x200001) AM_READ8(TC0220IOC_portreg_r, 0x00ff)
355		AM_RANGE(0x200002, 0x200003) AM_READ8(TC0220IOC_port_r, 0x00ff)
356		AM_RANGE(0x220000, 0x220003) AM_READ(ninjaw_sound_r)
357		AM_RANGE(0x280000, 0x293fff) AM_READ(TC0100SCN_word_0_r)   /* tilemaps (1st screen) */
358		AM_RANGE(0x2a0000, 0x2a000f) AM_READ(TC0100SCN_ctrl_word_0_r)
359		AM_RANGE(0x2c0000, 0x2d3fff) AM_READ(TC0100SCN_word_1_r)   /* tilemaps (2nd screen) */
360		AM_RANGE(0x2e0000, 0x2e000f) AM_READ(TC0100SCN_ctrl_word_1_r)
361		AM_RANGE(0x300000, 0x313fff) AM_READ(TC0100SCN_word_2_r)   /* tilemaps (3rd screen) */
362		AM_RANGE(0x320000, 0x32000f) AM_READ(TC0100SCN_ctrl_word_2_r)
363		AM_RANGE(0x340000, 0x340007) AM_READ(TC0110PCR_word_r)      /* palette (1st screen) */
364		AM_RANGE(0x350000, 0x350007) AM_READ(TC0110PCR_word_1_r)   /* palette (2nd screen) */
365		AM_RANGE(0x360000, 0x360007) AM_READ(TC0110PCR_word_2_r)   /* palette (3rd screen) */
366		ADDRESS_MAP_END
367
368		static ADDRESS_MAP_START( darius2_writemem, ADDRESS_SPACE_PROGRAM, 16 )
369		AM_RANGE(0x000000, 0x0bffff) AM_WRITE(SMH_ROM)
370		AM_RANGE(0x0c0000, 0x0cffff) AM_WRITE(SMH_RAM)
371		AM_RANGE(0x200000, 0x200001) AM_WRITE8(TC0220IOC_portreg_w, 0x00ff)
372		AM_RANGE(0x200002, 0x200003) AM_WRITE8(TC0220IOC_port_w, 0x00ff)
	322	static ADDRESS_MAP_START( darius2_master_map, ADDRESS_SPACE_PROGRAM, 16 )
	323	AM_RANGE(0x000000, 0x0bffff) AM_ROM
	324	AM_RANGE(0x0c0000, 0x0cffff) AM_RAM                     /* main ram */
	325	AM_RANGE(0x200000, 0x200001) AM_READWRITE8(TC0220IOC_portreg_r,TC0220IOC_portreg_w, 0x00ff)
	326	AM_RANGE(0x200002, 0x200003) AM_READWRITE8(TC0220IOC_port_r,TC0220IOC_port_w, 0x00ff)
373	327	AM_RANGE(0x210000, 0x210001) AM_WRITE(cpua_ctrl_w)
374		AM_RANGE(0x220000, 0x220003) AM_WRITE(ninjaw_sound_w)
	328	AM_RANGE(0x220000, 0x220003) AM_READWRITE(ninjaw_sound_r,ninjaw_sound_w)
375	329	AM_RANGE(0x240000, 0x24ffff) AM_RAM AM_SHARE(1)
376	330	AM_RANGE(0x260000, 0x263fff) AM_RAM AM_SHARE(2) AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)
377		AM_RANGE(0x280000, 0x293fff) AM_WRITE(TC0100SCN_triple_screen_w)   /* tilemaps (all screens) */
378		AM_RANGE(0x2a0000, 0x2a000f) AM_WRITE(TC0100SCN_ctrl_word_0_w)
379		AM_RANGE(0x2c0000, 0x2d3fff) AM_WRITE(TC0100SCN_word_1_w)   /* tilemaps (2nd screen) */
380		AM_RANGE(0x2e0000, 0x2e000f) AM_WRITE(TC0100SCN_ctrl_word_1_w)
381		AM_RANGE(0x300000, 0x313fff) AM_WRITE(TC0100SCN_word_2_w)   /* tilemaps (3rd screen) */
382		AM_RANGE(0x320000, 0x32000f) AM_WRITE(TC0100SCN_ctrl_word_2_w)
383		AM_RANGE(0x340000, 0x340007) AM_WRITE(TC0110PCR_step1_word_w)      /* palette (1st screen) */
384		AM_RANGE(0x350000, 0x350007) AM_WRITE(TC0110PCR_step1_word_1_w)   /* palette (2nd screen) */
385		AM_RANGE(0x360000, 0x360007) AM_WRITE(TC0110PCR_step1_word_2_w)   /* palette (3rd screen) */
	331	AM_RANGE(0x280000, 0x293fff) AM_READWRITE(TC0100SCN_word_0_r,TC0100SCN_triple_screen_w)   /* tilemaps (1st screen/all screens) */
	332	AM_RANGE(0x2a0000, 0x2a000f) AM_READWRITE(TC0100SCN_ctrl_word_0_r,TC0100SCN_ctrl_word_0_w)
	333	AM_RANGE(0x2c0000, 0x2d3fff) AM_READWRITE(TC0100SCN_word_1_r,TC0100SCN_word_1_w)      /* tilemaps (2nd screen) */
	334	AM_RANGE(0x2e0000, 0x2e000f) AM_READWRITE(TC0100SCN_ctrl_word_1_r,TC0100SCN_ctrl_word_1_w)
	335	AM_RANGE(0x300000, 0x313fff) AM_READWRITE(TC0100SCN_word_2_r,TC0100SCN_word_2_w)      /* tilemaps (3rd screen) */
	336	AM_RANGE(0x320000, 0x32000f) AM_READWRITE(TC0100SCN_ctrl_word_2_r,TC0100SCN_ctrl_word_2_w)
	337	AM_RANGE(0x340000, 0x340007) AM_READWRITE(TC0110PCR_word_r,TC0110PCR_step1_word_w)      /* palette (1st screen) */
	338	AM_RANGE(0x350000, 0x350007) AM_READWRITE(TC0110PCR_word_1_r,TC0110PCR_step1_word_1_w)   /* palette (2nd screen) */
	339	AM_RANGE(0x360000, 0x360007) AM_READWRITE(TC0110PCR_word_2_r,TC0110PCR_step1_word_2_w)   /* palette (3rd screen) */
386	340	ADDRESS_MAP_END
387	341
388		static ADDRESS_MAP_START( darius2_cpub_readmem, ADDRESS_SPACE_PROGRAM, 16 )
389		AM_RANGE(0x000000, 0x05ffff) AM_READ(SMH_ROM)
390		AM_RANGE(0x080000, 0x08ffff) AM_READ(SMH_RAM)   /* main ram */
391		AM_RANGE(0x200000, 0x200001) AM_READ8(TC0220IOC_portreg_r, 0x00ff)
392		AM_RANGE(0x200002, 0x200003) AM_READ8(TC0220IOC_port_r, 0x00ff)
393		AM_RANGE(0x280000, 0x293fff) AM_READ(TC0100SCN_word_0_r)   /* tilemaps (1st screen) */
394		ADDRESS_MAP_END
395
396		static ADDRESS_MAP_START( darius2_cpub_writemem, ADDRESS_SPACE_PROGRAM, 16 )
397		AM_RANGE(0x000000, 0x05ffff) AM_WRITE(SMH_ROM)
398		AM_RANGE(0x080000, 0x08ffff) AM_WRITE(SMH_RAM)
399		AM_RANGE(0x200000, 0x200001) AM_WRITE8(TC0220IOC_portreg_w, 0x00ff)
400		AM_RANGE(0x200002, 0x200003) AM_WRITE8(TC0220IOC_port_w, 0x00ff)
	342	static ADDRESS_MAP_START( darius2_slave_map, ADDRESS_SPACE_PROGRAM, 16 )
	343	AM_RANGE(0x000000, 0x05ffff) AM_ROM
	344	AM_RANGE(0x080000, 0x08ffff) AM_RAM                                          /* main ram */
	345	AM_RANGE(0x200000, 0x200001) AM_READWRITE8(TC0220IOC_portreg_r,TC0220IOC_portreg_w, 0x00ff)
	346	AM_RANGE(0x200002, 0x200003) AM_READWRITE8(TC0220IOC_port_r,TC0220IOC_port_w, 0x00ff)
401	347	AM_RANGE(0x240000, 0x24ffff) AM_RAM AM_SHARE(1)
402	348	AM_RANGE(0x260000, 0x263fff) AM_RAM AM_SHARE(2)
403		AM_RANGE(0x280000, 0x293fff) AM_WRITE(TC0100SCN_triple_screen_w)   /* tilemaps (all screens) */
	349	AM_RANGE(0x280000, 0x293fff) AM_READWRITE(TC0100SCN_word_0_r,TC0100SCN_triple_screen_w)   /* tilemaps (1st screen/all screens) */
404	350	ADDRESS_MAP_END
405	351
406	352
407	353	/***************************************************************************/
408	354
409		static ADDRESS_MAP_START( z80_sound_readmem, ADDRESS_SPACE_PROGRAM, 8 )
410		AM_RANGE(0x0000, 0x3fff) AM_READ(SMH_ROM)
411		AM_RANGE(0x4000, 0x7fff) AM_READ(SMH_BANK10)
412		AM_RANGE(0xc000, 0xdfff) AM_READ(SMH_RAM)
413		AM_RANGE(0xe000, 0xe003) AM_DEVREAD("ym", ym2610_r)
414		AM_RANGE(0xe200, 0xe200) AM_READNOP
415		AM_RANGE(0xe201, 0xe201) AM_READ(taitosound_slave_comm_r)
416		AM_RANGE(0xea00, 0xea00) AM_READNOP
417		ADDRESS_MAP_END
418
419		static ADDRESS_MAP_START( z80_sound_writemem, ADDRESS_SPACE_PROGRAM, 8 )
420		AM_RANGE(0x0000, 0x7fff) AM_WRITE(SMH_ROM)
421		AM_RANGE(0xc000, 0xdfff) AM_WRITE(SMH_RAM)
422		AM_RANGE(0xe000, 0xe003) AM_DEVWRITE("ym", ym2610_w)
423		AM_RANGE(0xe200, 0xe200) AM_WRITE(taitosound_slave_port_w)
424		AM_RANGE(0xe201, 0xe201) AM_WRITE(taitosound_slave_comm_w)
	355	static ADDRESS_MAP_START( ninjaw_sound_map, ADDRESS_SPACE_PROGRAM, 8 )
	356	AM_RANGE(0x0000, 0x3fff) AM_ROM
	357	AM_RANGE(0x4000, 0x7fff) AM_ROMBANK(10)
	358	AM_RANGE(0xc000, 0xdfff) AM_RAM
	359	AM_RANGE(0xe000, 0xe003) AM_DEVREADWRITE("ym", ym2610_r,ym2610_w)
	360	AM_RANGE(0xe200, 0xe200) AM_READNOP AM_WRITE(taitosound_slave_port_w)
	361	AM_RANGE(0xe201, 0xe201) AM_READWRITE(taitosound_slave_comm_r,taitosound_slave_comm_w)
425	362	AM_RANGE(0xe400, 0xe403) AM_WRITE(ninjaw_pancontrol) /* pan */
	363	AM_RANGE(0xea00, 0xea00) AM_READNOP
426	364	AM_RANGE(0xee00, 0xee00) AM_WRITENOP /* ? */
427	365	AM_RANGE(0xf000, 0xf000) AM_WRITENOP /* ? */
428	366	AM_RANGE(0xf200, 0xf200) AM_WRITE(sound_bankswitch_w)
r4679	r4680
567	505	/* handler called by the YM2610 emulator when the internal timers cause an IRQ */
568	506	static void irqhandler(const device_config *device, int irq)
569	507	{
570		cpu_set_input_line(device->machine->cpu[1],0,irq ? ASSERT_LINE : CLEAR_LINE);
	508	cputag_set_input_line(device->machine, "audiocpu", 0, irq ? ASSERT_LINE : CLEAR_LINE);
571	509	}
572	510
573	511	static const ym2610_interface ym2610_config =
r4679	r4680
626	564
627	565	/* basic machine hardware */
628	566	MDRV_CPU_ADD("maincpu", M68000,16000000/2)   /* 8 MHz ? */
629		MDRV_CPU_PROGRAM_MAP(ninjaw_readmem,ninjaw_writemem)
	567	MDRV_CPU_PROGRAM_MAP(ninjaw_master_map,0)
630	568	MDRV_CPU_VBLANK_INT("lscreen", irq4_line_hold)
631	569
632	570	MDRV_CPU_ADD("audiocpu", Z80,16000000/4)   /* 16/4 MHz ? */
633		MDRV_CPU_PROGRAM_MAP(z80_sound_readmem,z80_sound_writemem)
	571	MDRV_CPU_PROGRAM_MAP(ninjaw_sound_map,0)
634	572
635	573	MDRV_CPU_ADD("sub", M68000,16000000/2)   /* 8 MHz ? */
636		MDRV_CPU_PROGRAM_MAP(ninjaw_cpub_readmem,ninjaw_cpub_writemem)
	574	MDRV_CPU_PROGRAM_MAP(ninjaw_slave_map,0)
637	575	MDRV_CPU_VBLANK_INT("lscreen", irq4_line_hold)
638	576
639	577	MDRV_QUANTUM_TIME(HZ(6000))   /* CPU slices */
r4679	r4680
699	637
700	638	/* basic machine hardware */
701	639	MDRV_CPU_ADD("maincpu", M68000,16000000/2)   /* 8 MHz ? */
702		MDRV_CPU_PROGRAM_MAP(darius2_readmem,darius2_writemem)
	640	MDRV_CPU_PROGRAM_MAP(darius2_master_map,0)
703	641	MDRV_CPU_VBLANK_INT("lscreen", irq4_line_hold)
704	642
705	643	MDRV_CPU_ADD("audiocpu", Z80,16000000/4)   /* 4 MHz ? */
706		MDRV_CPU_PROGRAM_MAP(z80_sound_readmem,z80_sound_writemem)
	644	MDRV_CPU_PROGRAM_MAP(ninjaw_sound_map,0)
707	645
708	646	MDRV_CPU_ADD("sub", M68000,16000000/2)   /* 8 MHz ? */
709		MDRV_CPU_PROGRAM_MAP(darius2_cpub_readmem,darius2_cpub_writemem)
	647	MDRV_CPU_PROGRAM_MAP(darius2_slave_map,0)
710	648	MDRV_CPU_VBLANK_INT("lscreen", irq4_line_hold)
711	649
712	650	MDRV_QUANTUM_TIME(HZ(6000))   /* CPU slices */

src/mame/drivers/matmania.c

r4679	r4680
42	42	static WRITE8_HANDLER( matmania_sh_command_w )
43	43	{
44	44	soundlatch_w(space,offset,data);
45		cpu_set_input_line(space->machine->cpu[1],M6502_IRQ_LINE,HOLD_LINE);
	45	cputag_set_input_line(space->machine, "audiocpu", M6502_IRQ_LINE, HOLD_LINE);
46	46	}
47	47
48	48	static WRITE8_HANDLER( maniach_sh_command_w )
49	49	{
50		soundlatch_w(space,offset,data);
51		cpu_set_input_line(space->machine->cpu[1],M6809_IRQ_LINE,HOLD_LINE);
	50	soundlatch_w(space, offset, data);
	51	cputag_set_input_line(space->machine, "audiocpu", M6809_IRQ_LINE, HOLD_LINE);
52	52	}
53	53
54	54
55	55
56		static ADDRESS_MAP_START( matmania_readmem, ADDRESS_SPACE_PROGRAM, 8 )
57		AM_RANGE(0x0000, 0x077f) AM_READ(SMH_RAM)
58		AM_RANGE(0x1000, 0x17ff) AM_READ(SMH_RAM)
59		AM_RANGE(0x2000, 0x27ff) AM_READ(SMH_RAM)
60		AM_RANGE(0x3000, 0x3000) AM_READ_PORT("IN0")
61		AM_RANGE(0x3010, 0x3010) AM_READ_PORT("IN1")
62		AM_RANGE(0x3020, 0x3020) AM_READ_PORT("DSW2")
63		AM_RANGE(0x3030, 0x3030) AM_READ_PORT("DSW1")
64		AM_RANGE(0x4000, 0xffff) AM_READ(SMH_ROM)
65		ADDRESS_MAP_END
66
67		static ADDRESS_MAP_START( matmania_writemem, ADDRESS_SPACE_PROGRAM, 8 )
68		AM_RANGE(0x0000, 0x077f) AM_WRITE(SMH_RAM)
69		AM_RANGE(0x0780, 0x07df) AM_WRITE(SMH_RAM) AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
70		AM_RANGE(0x1000, 0x13ff) AM_WRITE(SMH_RAM) AM_BASE(&matmania_videoram2) AM_SIZE(&matmania_videoram2_size)
71		AM_RANGE(0x1400, 0x17ff) AM_WRITE(SMH_RAM) AM_BASE(&matmania_colorram2)
72		AM_RANGE(0x2000, 0x21ff) AM_WRITE(SMH_RAM) AM_BASE(&videoram) AM_SIZE(&videoram_size)
73		AM_RANGE(0x2200, 0x23ff) AM_WRITE(SMH_RAM) AM_BASE(&colorram)
74		AM_RANGE(0x2400, 0x25ff) AM_WRITE(SMH_RAM) AM_BASE(&matmania_videoram3) AM_SIZE(&matmania_videoram3_size)
75		AM_RANGE(0x2600, 0x27ff) AM_WRITE(SMH_RAM) AM_BASE(&matmania_colorram3)
76		AM_RANGE(0x3000, 0x3000) AM_WRITE(SMH_RAM) AM_BASE(&matmania_pageselect)
77		AM_RANGE(0x3010, 0x3010) AM_WRITE(matmania_sh_command_w)
78		AM_RANGE(0x3020, 0x3020) AM_WRITE(SMH_RAM) AM_BASE(&matmania_scroll)
79		//  AM_RANGE(0x3030, 0x3030) AM_WRITENOP /* ?? */
	56	static ADDRESS_MAP_START( matmania_map, ADDRESS_SPACE_PROGRAM, 8 )
	57	AM_RANGE(0x0000, 0x077f) AM_RAM
	58	AM_RANGE(0x0780, 0x07df) AM_WRITEONLY AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
	59	AM_RANGE(0x1000, 0x13ff) AM_RAM AM_BASE(&matmania_videoram2) AM_SIZE(&matmania_videoram2_size)
	60	AM_RANGE(0x1400, 0x17ff) AM_RAM AM_BASE(&matmania_colorram2)
	61	AM_RANGE(0x2000, 0x21ff) AM_RAM AM_BASE(&videoram) AM_SIZE(&videoram_size)
	62	AM_RANGE(0x2200, 0x23ff) AM_RAM AM_BASE(&colorram)
	63	AM_RANGE(0x2400, 0x25ff) AM_RAM AM_BASE(&matmania_videoram3) AM_SIZE(&matmania_videoram3_size)
	64	AM_RANGE(0x2600, 0x27ff) AM_RAM AM_BASE(&matmania_colorram3)
	65	AM_RANGE(0x3000, 0x3000) AM_READ_PORT("IN0") AM_WRITEONLY AM_BASE(&matmania_pageselect)
	66	AM_RANGE(0x3010, 0x3010) AM_READ_PORT("IN1") AM_WRITE(matmania_sh_command_w)
	67	AM_RANGE(0x3020, 0x3020) AM_READ_PORT("DSW2") AM_WRITEONLY AM_BASE(&matmania_scroll)
	68	AM_RANGE(0x3030, 0x3030) AM_READ_PORT("DSW1") AM_WRITENOP /* ?? */
80	69	AM_RANGE(0x3050, 0x307f) AM_WRITE(matmania_paletteram_w) AM_BASE(&paletteram)
81		AM_RANGE(0x4000, 0xffff) AM_WRITE(SMH_ROM)
	70	AM_RANGE(0x4000, 0xffff) AM_ROM
82	71	ADDRESS_MAP_END
83	72
84		static ADDRESS_MAP_START( maniach_readmem, ADDRESS_SPACE_PROGRAM, 8 )
85		AM_RANGE(0x0000, 0x077f) AM_READ(SMH_RAM)
86		AM_RANGE(0x1000, 0x17ff) AM_READ(SMH_RAM)
87		AM_RANGE(0x2000, 0x27ff) AM_READ(SMH_RAM)
88		AM_RANGE(0x3000, 0x3000) AM_READ_PORT("IN0")
89		AM_RANGE(0x3010, 0x3010) AM_READ_PORT("IN1")
90		AM_RANGE(0x3020, 0x3020) AM_READ_PORT("DSW2")
91		AM_RANGE(0x3030, 0x3030) AM_READ_PORT("DSW1")
92		AM_RANGE(0x3040, 0x3040) AM_READ(maniach_mcu_r)
	73	static ADDRESS_MAP_START( maniach_map, ADDRESS_SPACE_PROGRAM, 8 )
	74	AM_RANGE(0x0000, 0x077f) AM_RAM
	75	AM_RANGE(0x0780, 0x07df) AM_RAM AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
	76	AM_RANGE(0x1000, 0x13ff) AM_RAM AM_BASE(&matmania_videoram2) AM_SIZE(&matmania_videoram2_size)
	77	AM_RANGE(0x1400, 0x17ff) AM_RAM AM_BASE(&matmania_colorram2)
	78	AM_RANGE(0x2000, 0x21ff) AM_RAM AM_BASE(&videoram) AM_SIZE(&videoram_size)
	79	AM_RANGE(0x2200, 0x23ff) AM_RAM AM_BASE(&colorram)
	80	AM_RANGE(0x2400, 0x25ff) AM_RAM AM_BASE(&matmania_videoram3) AM_SIZE(&matmania_videoram3_size)
	81	AM_RANGE(0x2600, 0x27ff) AM_RAM AM_BASE(&matmania_colorram3)
	82	AM_RANGE(0x3000, 0x3000) AM_READ_PORT("IN0") AM_WRITEONLY AM_BASE(&matmania_pageselect)
	83	AM_RANGE(0x3010, 0x3010) AM_READ_PORT("IN1") AM_WRITE(maniach_sh_command_w)
	84	AM_RANGE(0x3020, 0x3020) AM_READ_PORT("DSW2") AM_WRITEONLY AM_BASE(&matmania_scroll)
	85	AM_RANGE(0x3030, 0x3030) AM_READ_PORT("DSW1") AM_WRITENOP   /* ?? */
	86	AM_RANGE(0x3040, 0x3040) AM_READWRITE(maniach_mcu_r,maniach_mcu_w)
93	87	AM_RANGE(0x3041, 0x3041) AM_READ(maniach_mcu_status_r)
94		AM_RANGE(0x4000, 0xffff) AM_READ(SMH_ROM)
95		ADDRESS_MAP_END
96
97		static ADDRESS_MAP_START( maniach_writemem, ADDRESS_SPACE_PROGRAM, 8 )
98		AM_RANGE(0x0000, 0x077f) AM_WRITE(SMH_RAM)
99		AM_RANGE(0x0780, 0x07df) AM_WRITE(SMH_RAM) AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
100		AM_RANGE(0x1000, 0x13ff) AM_WRITE(SMH_RAM) AM_BASE(&matmania_videoram2) AM_SIZE(&matmania_videoram2_size)
101		AM_RANGE(0x1400, 0x17ff) AM_WRITE(SMH_RAM) AM_BASE(&matmania_colorram2)
102		AM_RANGE(0x2000, 0x21ff) AM_WRITE(SMH_RAM) AM_BASE(&videoram) AM_SIZE(&videoram_size)
103		AM_RANGE(0x2200, 0x23ff) AM_WRITE(SMH_RAM) AM_BASE(&colorram)
104		AM_RANGE(0x2400, 0x25ff) AM_WRITE(SMH_RAM) AM_BASE(&matmania_videoram3) AM_SIZE(&matmania_videoram3_size)
105		AM_RANGE(0x2600, 0x27ff) AM_WRITE(SMH_RAM) AM_BASE(&matmania_colorram3)
106		AM_RANGE(0x3000, 0x3000) AM_WRITE(SMH_RAM) AM_BASE(&matmania_pageselect)
107		AM_RANGE(0x3010, 0x3010) AM_WRITE(maniach_sh_command_w)
108		AM_RANGE(0x3020, 0x3020) AM_WRITE(SMH_RAM) AM_BASE(&matmania_scroll)
109		AM_RANGE(0x3030, 0x3030) AM_WRITENOP   /* ?? */
110		AM_RANGE(0x3040, 0x3040) AM_WRITE(maniach_mcu_w)
111	88	AM_RANGE(0x3050, 0x307f) AM_WRITE(matmania_paletteram_w) AM_BASE(&paletteram)
112		AM_RANGE(0x4000, 0xffff) AM_WRITE(SMH_ROM)
	89	AM_RANGE(0x4000, 0xffff) AM_ROM
113	90	ADDRESS_MAP_END
114	91
115		static ADDRESS_MAP_START( sound_readmem, ADDRESS_SPACE_PROGRAM, 8 )
116		AM_RANGE(0x0000, 0x01ff) AM_READ(SMH_RAM)
117		AM_RANGE(0x2007, 0x2007) AM_READ(soundlatch_r)
118		AM_RANGE(0x8000, 0xffff) AM_READ(SMH_ROM)
119		ADDRESS_MAP_END
120	92
121		static ADDRESS_MAP_START( sound_writemem, ADDRESS_SPACE_PROGRAM, 8 )
122		AM_RANGE(0x0000, 0x01ff) AM_WRITE(SMH_RAM)
	93	static ADDRESS_MAP_START( matmania_sound_map, ADDRESS_SPACE_PROGRAM, 8 )
	94	AM_RANGE(0x0000, 0x01ff) AM_RAM
123	95	AM_RANGE(0x2000, 0x2001) AM_DEVWRITE("ay1", ay8910_data_address_w)
124	96	AM_RANGE(0x2002, 0x2003) AM_DEVWRITE("ay2", ay8910_data_address_w)
125	97	AM_RANGE(0x2004, 0x2004) AM_DEVWRITE("dac", dac_signed_w)
126		AM_RANGE(0x8000, 0xffff) AM_WRITE(SMH_ROM)
	98	AM_RANGE(0x2007, 0x2007) AM_READ(soundlatch_r)
	99	AM_RANGE(0x8000, 0xffff) AM_ROM
127	100	ADDRESS_MAP_END
128	101
129		static ADDRESS_MAP_START( maniach_sound_readmem, ADDRESS_SPACE_PROGRAM, 8 )
130		AM_RANGE(0x0000, 0x0fff) AM_READ(SMH_RAM)
131		AM_RANGE(0x2004, 0x2004) AM_READ(soundlatch_r)
132		AM_RANGE(0x4000, 0xffff) AM_READ(SMH_ROM)
133		ADDRESS_MAP_END
134
135		static ADDRESS_MAP_START( maniach_sound_writemem, ADDRESS_SPACE_PROGRAM, 8 )
136		AM_RANGE(0x0000, 0x0fff) AM_WRITE(SMH_RAM)
	102	static ADDRESS_MAP_START( maniach_sound_map, ADDRESS_SPACE_PROGRAM, 8 )
	103	AM_RANGE(0x0000, 0x0fff) AM_RAM
137	104	AM_RANGE(0x2000, 0x2001) AM_DEVWRITE("ym", ym3526_w)
138	105	AM_RANGE(0x2002, 0x2002) AM_DEVWRITE("dac", dac_signed_w)
139		AM_RANGE(0x4000, 0xffff) AM_WRITE(SMH_ROM)
	106	AM_RANGE(0x2004, 0x2004) AM_READ(soundlatch_r)
	107	AM_RANGE(0x4000, 0xffff) AM_ROM
140	108	ADDRESS_MAP_END
141	109
142		static ADDRESS_MAP_START( mcu_readmem, ADDRESS_SPACE_PROGRAM, 8 )
143		ADDRESS_MAP_GLOBAL_MASK(0x7ff)
144		AM_RANGE(0x0000, 0x0000) AM_READ(maniach_68705_portA_r)
145		AM_RANGE(0x0001, 0x0001) AM_READ(maniach_68705_portB_r)
146		AM_RANGE(0x0002, 0x0002) AM_READ(maniach_68705_portC_r)
147		AM_RANGE(0x0010, 0x007f) AM_READ(SMH_RAM)
148		AM_RANGE(0x0080, 0x07ff) AM_READ(SMH_ROM)
149		ADDRESS_MAP_END
150	110
151		static ADDRESS_MAP_START( mcu_writemem, ADDRESS_SPACE_PROGRAM, 8 )
	111	static ADDRESS_MAP_START( maniach_mcu_map, ADDRESS_SPACE_PROGRAM, 8 )
152	112	ADDRESS_MAP_GLOBAL_MASK(0x7ff)
153		AM_RANGE(0x0000, 0x0000) AM_WRITE(maniach_68705_portA_w)
154		AM_RANGE(0x0001, 0x0001) AM_WRITE(maniach_68705_portB_w)
155		AM_RANGE(0x0002, 0x0002) AM_WRITE(maniach_68705_portC_w)
	113	AM_RANGE(0x0000, 0x0000) AM_READWRITE(maniach_68705_portA_r,maniach_68705_portA_w)
	114	AM_RANGE(0x0001, 0x0001) AM_READWRITE(maniach_68705_portB_r,maniach_68705_portB_w)
	115	AM_RANGE(0x0002, 0x0002) AM_READWRITE(maniach_68705_portC_r,maniach_68705_portC_w)
156	116	AM_RANGE(0x0004, 0x0004) AM_WRITE(maniach_68705_ddrA_w)
157	117	AM_RANGE(0x0005, 0x0005) AM_WRITE(maniach_68705_ddrB_w)
158	118	AM_RANGE(0x0006, 0x0006) AM_WRITE(maniach_68705_ddrC_w)
159		AM_RANGE(0x0010, 0x007f) AM_WRITE(SMH_RAM)
160		AM_RANGE(0x0080, 0x07ff) AM_WRITE(SMH_ROM)
	119	AM_RANGE(0x0010, 0x007f) AM_RAM
	120	AM_RANGE(0x0080, 0x07ff) AM_ROM
161	121	ADDRESS_MAP_END
162	122
163	123
164
165	124	static INPUT_PORTS_START( matmania )
166	125	PORT_START("IN0")
167	126	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_8WAY
r4679	r4680
313	272
314	273	/* basic machine hardware */
315	274	MDRV_CPU_ADD("maincpu", M6502, 1500000)   /* 1.5 MHz ???? */
316		MDRV_CPU_PROGRAM_MAP(matmania_readmem,matmania_writemem)
	275	MDRV_CPU_PROGRAM_MAP(matmania_map,0)
317	276	MDRV_CPU_VBLANK_INT("screen", irq0_line_hold)
318	277
319	278	MDRV_CPU_ADD("audiocpu", M6502, 1200000)   /* 1.2 MHz ???? */
320		MDRV_CPU_PROGRAM_MAP(sound_readmem,sound_writemem)
	279	MDRV_CPU_PROGRAM_MAP(matmania_sound_map,0)
321	280	MDRV_CPU_VBLANK_INT_HACK(nmi_line_pulse,15)   /* ???? */
322	281	/* IRQs are caused by the main CPU */
323	282	MDRV_QUANTUM_TIME(HZ(600))
r4679	r4680
355	314	/* handler called by the 3526 emulator when the internal timers cause an IRQ */
356	315	static void irqhandler(const device_config *device, int linestate)
357	316	{
358		cpu_set_input_line(device->machine->cpu[1],1,linestate);
	317	cputag_set_input_line(device->machine, "audiocpu", 1, linestate);
359	318	}
360	319
361	320	static const ym3526_interface ym3526_config =
r4679	r4680
368	327
369	328	/* basic machine hardware */
370	329	MDRV_CPU_ADD("maincpu", M6502, 1500000)   /* 1.5 MHz ???? */
371		MDRV_CPU_PROGRAM_MAP(maniach_readmem,maniach_writemem)
	330	MDRV_CPU_PROGRAM_MAP(maniach_map,0)
372	331	MDRV_CPU_VBLANK_INT("screen", irq0_line_hold)
373	332
374	333	MDRV_CPU_ADD("audiocpu", M6809, 1500000)   /* 1.5 MHz ???? */
375		MDRV_CPU_PROGRAM_MAP(maniach_sound_readmem,maniach_sound_writemem)
	334	MDRV_CPU_PROGRAM_MAP(maniach_sound_map,0)
376	335	/* IRQs are caused by the main CPU */
	336
377	337	MDRV_CPU_ADD("mcu", M68705, 1500000*2)   /* (don't know really how fast, but it doesn't need to even be this fast) */
378		MDRV_CPU_PROGRAM_MAP(mcu_readmem,mcu_writemem)
	338	MDRV_CPU_PROGRAM_MAP(maniach_mcu_map,0)
379	339
380	340	MDRV_QUANTUM_TIME(HZ(6000))   /* 100 CPU slice per frame - high interleaving to sync main and mcu */
381	341

src/mame/drivers/arkanoid.c

r4679	r4680
1127	1127
1128	1128	static void arkanoid_bootleg_init( running_machine *machine )
1129	1129	{
1130		memory_install_read8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xf002, 0xf002, 0, 0, arkanoid_bootleg_f002_r );
1131		memory_install_write8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xd018, 0xd018, 0, 0, arkanoid_bootleg_d018_w );
1132		memory_install_read8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xd008, 0xd008, 0, 0, arkanoid_bootleg_d008_r );
	1130	memory_install_read8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xf002, 0xf002, 0, 0, arkanoid_bootleg_f002_r );
	1131	memory_install_write8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xd018, 0xd018, 0, 0, arkanoid_bootleg_d018_w );
	1132	memory_install_read8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xd008, 0xd008, 0, 0, arkanoid_bootleg_d008_r );
1133	1133	}
1134	1134
1135	1135	static DRIVER_INIT( arkangc )

src/mame/drivers/twin16.c

r4679	r4680
94	94
95	95	/******************************************************************************************/
96	96
97		#define COMRAM_r               SMH_BANK1
98		#define COMRAM_w               SMH_BANK1
	97	#define COMRAM_r               SMH_BANK(1)
	98	#define COMRAM_w               SMH_BANK(1)
99	99
100	100	/* Read/Write Handlers */
101	101
r4679	r4680
1249	1249	// sprite, tile data
1250	1250
1251	1251	int i;
1252		UINT16 *temp = malloc_or_die(0x200000);
	1252	UINT16 *temp = alloc_array_or_die(UINT16, 0x200000/2);
1253	1253
1254	1254	twin16_gfx_rom = (UINT16 *)memory_region(machine, "gfx2");
1255	1255	memcpy( temp, twin16_gfx_rom, 0x200000 );

src/mame/drivers/megasys1.c

r4679	r4680
169	169	}
170	170
171	171
172		static ADDRESS_MAP_START( readmem_A, ADDRESS_SPACE_PROGRAM, 16 )
	172	static ADDRESS_MAP_START( megasys1A_map, ADDRESS_SPACE_PROGRAM, 16 )
173	173	ADDRESS_MAP_GLOBAL_MASK(0xfffff)
174		AM_RANGE(0x000000, 0x05ffff) AM_READ(SMH_ROM)
	174	AM_RANGE(0x000000, 0x05ffff) AM_ROM
175	175	AM_RANGE(0x080000, 0x080001) AM_READ_PORT("SYSTEM")
176	176	AM_RANGE(0x080002, 0x080003) AM_READ_PORT("P1")
177	177	AM_RANGE(0x080004, 0x080005) AM_READ_PORT("P2")
178	178	AM_RANGE(0x080006, 0x080007) AM_READ_PORT("DSW")
179	179	AM_RANGE(0x080008, 0x080009) AM_READ(soundlatch2_word_r)   /* from sound cpu */
180		AM_RANGE(0x084000, 0x084fff) AM_READ(SMH_RAM)
181		AM_RANGE(0x088000, 0x0887ff) AM_READ(SMH_RAM)
182		AM_RANGE(0x08e000, 0x08ffff) AM_READ(SMH_RAM)
183		AM_RANGE(0x090000, 0x093fff) AM_READ(SMH_RAM)
184		AM_RANGE(0x094000, 0x097fff) AM_READ(SMH_RAM)
185		AM_RANGE(0x098000, 0x09bfff) AM_READ(SMH_RAM)
186		AM_RANGE(0x0f0000, 0x0fffff) AM_READ(SMH_RAM)
	180	AM_RANGE(0x084000, 0x0843ff) AM_RAM_WRITE(megasys1_vregs_A_w) AM_BASE(&megasys1_vregs)
	181	AM_RANGE(0x088000, 0x0887ff) AM_RAM_WRITE(paletteram16_RRRRGGGGBBBBRGBx_word_w) AM_BASE(&paletteram16)
	182	AM_RANGE(0x08e000, 0x08ffff) AM_RAM AM_BASE(&megasys1_objectram)
	183	AM_RANGE(0x090000, 0x093fff) AM_RAM_WRITE(megasys1_scrollram_0_w) AM_BASE(&megasys1_scrollram[0])
	184	AM_RANGE(0x094000, 0x097fff) AM_RAM_WRITE(megasys1_scrollram_1_w) AM_BASE(&megasys1_scrollram[1])
	185	AM_RANGE(0x098000, 0x09bfff) AM_RAM_WRITE(megasys1_scrollram_2_w) AM_BASE(&megasys1_scrollram[2])
	186	AM_RANGE(0x0f0000, 0x0fffff) AM_RAM AM_BASE(&megasys1_ram)
187	187	ADDRESS_MAP_END
188	188
189		static ADDRESS_MAP_START( writemem_A, ADDRESS_SPACE_PROGRAM, 16 )
190		ADDRESS_MAP_GLOBAL_MASK(0xfffff)
191		AM_RANGE(0x000000, 0x05ffff) AM_WRITE(SMH_ROM)
192		AM_RANGE(0x084000, 0x0843ff) AM_WRITE(megasys1_vregs_A_w) AM_BASE(&megasys1_vregs)
193		AM_RANGE(0x088000, 0x0887ff) AM_WRITE(paletteram16_RRRRGGGGBBBBRGBx_word_w) AM_BASE(&paletteram16)
194		AM_RANGE(0x08e000, 0x08ffff) AM_WRITE(SMH_RAM) AM_BASE(&megasys1_objectram)
195		AM_RANGE(0x090000, 0x093fff) AM_WRITE(megasys1_scrollram_0_w) AM_BASE(&megasys1_scrollram[0])
196		AM_RANGE(0x094000, 0x097fff) AM_WRITE(megasys1_scrollram_1_w) AM_BASE(&megasys1_scrollram[1])
197		AM_RANGE(0x098000, 0x09bfff) AM_WRITE(megasys1_scrollram_2_w) AM_BASE(&megasys1_scrollram[2])
198		AM_RANGE(0x0f0000, 0x0fffff) AM_WRITE(SMH_RAM) AM_BASE(&megasys1_ram)
199		ADDRESS_MAP_END
200	189
201
202
203	190	/***************************************************************************
204	191	[ Main CPU - System B ]
205	192	***************************************************************************/
r4679	r4680
258	245	static WRITE16_HANDLER( ip_select_w )
259	246	{
260	247	COMBINE_DATA(&ip_select);
261		cpu_set_input_line(space->machine->cpu[0],2,HOLD_LINE);
	248	cputag_set_input_line(space->machine, "maincpu", 2, HOLD_LINE);
262	249	}
263	250
264	251
265		static ADDRESS_MAP_START( readmem_B, ADDRESS_SPACE_PROGRAM, 16 )
	252	static ADDRESS_MAP_START( megasys1B_map, ADDRESS_SPACE_PROGRAM, 16 )
266	253	ADDRESS_MAP_GLOBAL_MASK(0xfffff)
267		AM_RANGE(0x000000, 0x03ffff) AM_READ(SMH_ROM)
268		AM_RANGE(0x044000, 0x044fff) AM_READ(SMH_RAM)
269		AM_RANGE(0x048000, 0x0487ff) AM_READ(SMH_RAM)
270		AM_RANGE(0x04e000, 0x04ffff) AM_READ(SMH_RAM)
271		AM_RANGE(0x050000, 0x053fff) AM_READ(SMH_RAM)
272		AM_RANGE(0x054000, 0x057fff) AM_READ(SMH_RAM)
273		AM_RANGE(0x058000, 0x05bfff) AM_READ(SMH_RAM)
274		AM_RANGE(0x060000, 0x07ffff) AM_READ(SMH_RAM)
275		AM_RANGE(0x080000, 0x0bffff) AM_READ(SMH_ROM)
276		AM_RANGE(0x0e0000, 0x0e0001) AM_READ(ip_select_r)
	254	AM_RANGE(0x000000, 0x03ffff) AM_ROM
	255	AM_RANGE(0x044000, 0x0443ff) AM_RAM_WRITE(megasys1_vregs_A_w) AM_BASE(&megasys1_vregs)
	256	AM_RANGE(0x048000, 0x0487ff) AM_RAM_WRITE(paletteram16_RRRRGGGGBBBBRGBx_word_w) AM_BASE(&paletteram16)
	257	AM_RANGE(0x04e000, 0x04ffff) AM_RAM AM_BASE(&megasys1_objectram)
	258	AM_RANGE(0x050000, 0x053fff) AM_RAM_WRITE(megasys1_scrollram_0_w) AM_BASE(&megasys1_scrollram[0])
	259	AM_RANGE(0x054000, 0x057fff) AM_RAM_WRITE(megasys1_scrollram_1_w) AM_BASE(&megasys1_scrollram[1])
	260	AM_RANGE(0x058000, 0x05bfff) AM_RAM_WRITE(megasys1_scrollram_2_w) AM_BASE(&megasys1_scrollram[2])
	261	AM_RANGE(0x060000, 0x07ffff) AM_RAM AM_BASE(&megasys1_ram)
	262	AM_RANGE(0x080000, 0x0bffff) AM_ROM
	263	AM_RANGE(0x0e0000, 0x0e0001) AM_READWRITE(ip_select_r,ip_select_w)
277	264	ADDRESS_MAP_END
278	265
279		static ADDRESS_MAP_START( writemem_B, ADDRESS_SPACE_PROGRAM, 16 )
280		ADDRESS_MAP_GLOBAL_MASK(0xfffff)
281		AM_RANGE(0x000000, 0x03ffff) AM_WRITE(SMH_ROM)
282		AM_RANGE(0x044000, 0x0443ff) AM_WRITE(megasys1_vregs_A_w) AM_BASE(&megasys1_vregs)
283		AM_RANGE(0x048000, 0x0487ff) AM_WRITE(paletteram16_RRRRGGGGBBBBRGBx_word_w) AM_BASE(&paletteram16)
284		AM_RANGE(0x04e000, 0x04ffff) AM_WRITE(SMH_RAM) AM_BASE(&megasys1_objectram)
285		AM_RANGE(0x050000, 0x053fff) AM_WRITE(megasys1_scrollram_0_w) AM_BASE(&megasys1_scrollram[0])
286		AM_RANGE(0x054000, 0x057fff) AM_WRITE(megasys1_scrollram_1_w) AM_BASE(&megasys1_scrollram[1])
287		AM_RANGE(0x058000, 0x05bfff) AM_WRITE(megasys1_scrollram_2_w) AM_BASE(&megasys1_scrollram[2])
288		AM_RANGE(0x060000, 0x07ffff) AM_WRITE(SMH_RAM) AM_BASE(&megasys1_ram)
289		AM_RANGE(0x080000, 0x0bffff) AM_WRITE(SMH_ROM)
290		AM_RANGE(0x0e0000, 0x0e0001) AM_WRITE(ip_select_w)
291		ADDRESS_MAP_END
292	266
293
294
295	267	/***************************************************************************
296	268	[ Main CPU - System C ]
297	269	***************************************************************************/
r4679	r4680
300	272	#define INTERRUPT_NUM_C   INTERRUPT_NUM_B
301	273	#define interrupt_C      interrupt_B
302	274
303		static ADDRESS_MAP_START( readmem_C, ADDRESS_SPACE_PROGRAM, 16 )
	275	static ADDRESS_MAP_START( megasys1C_map, ADDRESS_SPACE_PROGRAM, 16 )
304	276	ADDRESS_MAP_GLOBAL_MASK(0x1fffff)
305		AM_RANGE(0x000000, 0x07ffff) AM_READ(SMH_ROM)
306		AM_RANGE(0x0c0000, 0x0cffff) AM_READ(megasys1_vregs_C_r)
307		AM_RANGE(0x0d2000, 0x0d3fff) AM_READ(SMH_RAM)
308		AM_RANGE(0x0e0000, 0x0e3fff) AM_READ(SMH_RAM)
309		AM_RANGE(0x0e8000, 0x0ebfff) AM_READ(SMH_RAM)
310		AM_RANGE(0x0f0000, 0x0f3fff) AM_READ(SMH_RAM)
311		AM_RANGE(0x0f8000, 0x0f87ff) AM_READ(SMH_RAM)
312		AM_RANGE(0x0d8000, 0x0d8001) AM_READ(ip_select_r)
313		AM_RANGE(0x1f0000, 0x1fffff) AM_READ(SMH_RAM)
	277	AM_RANGE(0x000000, 0x07ffff) AM_ROM
	278	AM_RANGE(0x0c0000, 0x0cffff) AM_READWRITE(megasys1_vregs_C_r,megasys1_vregs_C_w) AM_BASE(&megasys1_vregs)
	279	AM_RANGE(0x0d2000, 0x0d3fff) AM_RAM AM_BASE(&megasys1_objectram)
	280	AM_RANGE(0x0e0000, 0x0e3fff) AM_RAM_WRITE(megasys1_scrollram_0_w) AM_BASE(&megasys1_scrollram[0])
	281	AM_RANGE(0x0e8000, 0x0ebfff) AM_RAM_WRITE(megasys1_scrollram_1_w) AM_BASE(&megasys1_scrollram[1])
	282	AM_RANGE(0x0f0000, 0x0f3fff) AM_RAM_WRITE(megasys1_scrollram_2_w) AM_BASE(&megasys1_scrollram[2])
	283	AM_RANGE(0x0f8000, 0x0f87ff) AM_RAM_WRITE(paletteram16_RRRRGGGGBBBBRGBx_word_w) AM_BASE(&paletteram16)
	284	AM_RANGE(0x0d8000, 0x0d8001) AM_READWRITE(ip_select_r,ip_select_w)
	285	AM_RANGE(0x1f0000, 0x1fffff) AM_RAM AM_BASE(&megasys1_ram)
314	286	ADDRESS_MAP_END
315	287
316		static ADDRESS_MAP_START( writemem_C, ADDRESS_SPACE_PROGRAM, 16 )
317		ADDRESS_MAP_GLOBAL_MASK(0x1fffff)
318		AM_RANGE(0x000000, 0x07ffff) AM_WRITE(SMH_ROM)
319		AM_RANGE(0x0c0000, 0x0cffff) AM_WRITE(megasys1_vregs_C_w) AM_BASE(&megasys1_vregs)
320		AM_RANGE(0x0d2000, 0x0d3fff) AM_WRITE(SMH_RAM) AM_BASE(&megasys1_objectram)
321		AM_RANGE(0x0e0000, 0x0e3fff) AM_WRITE(megasys1_scrollram_0_w) AM_BASE(&megasys1_scrollram[0])
322		AM_RANGE(0x0e8000, 0x0ebfff) AM_WRITE(megasys1_scrollram_1_w) AM_BASE(&megasys1_scrollram[1])
323		AM_RANGE(0x0f0000, 0x0f3fff) AM_WRITE(megasys1_scrollram_2_w) AM_BASE(&megasys1_scrollram[2])
324		AM_RANGE(0x0f8000, 0x0f87ff) AM_WRITE(paletteram16_RRRRGGGGBBBBRGBx_word_w) AM_BASE(&paletteram16)
325		AM_RANGE(0x0d8000, 0x0d8001) AM_WRITE(ip_select_w)
326		AM_RANGE(0x1f0000, 0x1fffff) AM_WRITE(SMH_RAM) AM_BASE(&megasys1_ram)
327		ADDRESS_MAP_END
328	288
329
330
331
332	289	/***************************************************************************
333	290	[ Main CPU - System D ]
334	291	***************************************************************************/
r4679	r4680
338	295	cpu_set_input_line(device, 2, HOLD_LINE);
339	296	}
340	297
341		static ADDRESS_MAP_START( readmem_D, ADDRESS_SPACE_PROGRAM, 16 )
342		AM_RANGE(0x000000, 0x03ffff) AM_READ(SMH_ROM)
343		AM_RANGE(0x0c0000, 0x0c9fff) AM_READ(SMH_RAM)
344		AM_RANGE(0x0ca000, 0x0cbfff) AM_READ(SMH_RAM)
345		AM_RANGE(0x0d0000, 0x0d3fff) AM_READ(SMH_RAM)
346		AM_RANGE(0x0d4000, 0x0d7fff) AM_READ(SMH_RAM)
347		AM_RANGE(0x0d8000, 0x0d87ff) AM_MIRROR(0x3000) AM_READ(SMH_RAM)
	298	static ADDRESS_MAP_START( megasys1D_map, ADDRESS_SPACE_PROGRAM, 16 )
	299	AM_RANGE(0x000000, 0x03ffff) AM_ROM
	300	AM_RANGE(0x0c0000, 0x0c9fff) AM_RAM_WRITE(megasys1_vregs_D_w) AM_BASE(&megasys1_vregs)
	301	AM_RANGE(0x0ca000, 0x0cbfff) AM_RAM AM_BASE(&megasys1_objectram)
	302	AM_RANGE(0x0d0000, 0x0d3fff) AM_RAM_WRITE(megasys1_scrollram_1_w) AM_BASE(&megasys1_scrollram[1])
	303	AM_RANGE(0x0d4000, 0x0d7fff) AM_RAM_WRITE(megasys1_scrollram_2_w) AM_BASE(&megasys1_scrollram[2])
	304	AM_RANGE(0x0d8000, 0x0d87ff) AM_MIRROR(0x3000) AM_RAM_WRITE(paletteram16_RRRRRGGGGGBBBBBx_word_w) AM_BASE(&paletteram16)
348	305	AM_RANGE(0x0e0000, 0x0e0001) AM_READ_PORT("DSW")
349		AM_RANGE(0x0e8000, 0x0ebfff) AM_READ(SMH_RAM)
	306	AM_RANGE(0x0e8000, 0x0ebfff) AM_RAM_WRITE(megasys1_scrollram_0_w) AM_BASE(&megasys1_scrollram[0])
350	307	AM_RANGE(0x0f0000, 0x0f0001) AM_READ_PORT("SYSTEM")
351		AM_RANGE(0x0f8000, 0x0f8001) AM_DEVREAD8("oki1", okim6295_r, 0x00ff)
352		//  { 0x100000, 0x100001  protection
353		AM_RANGE(0x1f0000, 0x1fffff) AM_READ(SMH_RAM)
	308	AM_RANGE(0x0f8000, 0x0f8001) AM_DEVREADWRITE8("oki1", okim6295_r,okim6295_w, 0x00ff)
	309	//  AM_RANGE(0x100000, 0x100001) // protection
	310	AM_RANGE(0x1f0000, 0x1fffff) AM_RAM AM_BASE(&megasys1_ram)
354	311	ADDRESS_MAP_END
355	312
356		static ADDRESS_MAP_START( writemem_D, ADDRESS_SPACE_PROGRAM, 16 )
357		AM_RANGE(0x000000, 0x03ffff) AM_WRITE(SMH_ROM)
358		AM_RANGE(0x0c0000, 0x0c9fff) AM_WRITE(megasys1_vregs_D_w) AM_BASE(&megasys1_vregs)
359		AM_RANGE(0x0ca000, 0x0cbfff) AM_WRITE(SMH_RAM) AM_BASE(&megasys1_objectram)
360		AM_RANGE(0x0d0000, 0x0d3fff) AM_WRITE(megasys1_scrollram_1_w) AM_BASE(&megasys1_scrollram[1])
361		AM_RANGE(0x0d4000, 0x0d7fff) AM_WRITE(megasys1_scrollram_2_w) AM_BASE(&megasys1_scrollram[2])
362		AM_RANGE(0x0d8000, 0x0d87ff) AM_MIRROR(0x3000) AM_WRITE(paletteram16_RRRRRGGGGGBBBBBx_word_w) AM_BASE(&paletteram16)
363		AM_RANGE(0x0e8000, 0x0ebfff) AM_WRITE(megasys1_scrollram_0_w) AM_BASE(&megasys1_scrollram[0])
364		AM_RANGE(0x0f8000, 0x0f8001) AM_DEVWRITE8("oki1", okim6295_w, 0x00ff)
365		//  { 0x100000, 0x100001  protection
366		AM_RANGE(0x1f0000, 0x1fffff) AM_WRITE(SMH_RAM) AM_BASE(&megasys1_ram)
367		ADDRESS_MAP_END
368	313
369
370	314	/*************************************
371	315	*
372	316	*  Sound CPU memory handlers
r4679	r4680
428	372	static void megasys1_sound_irq(const device_config *device, int irq)
429	373	{
430	374	if (irq)
431		cpu_set_input_line(device->machine->cpu[1], 4, HOLD_LINE);
	375	cputag_set_input_line(device->machine, "soundcpu", 4, HOLD_LINE);
432	376	}
433	377
434	378	static READ8_DEVICE_HANDLER( oki_status_r )
r4679	r4680
444	388	***************************************************************************/
445	389
446	390
447		static ADDRESS_MAP_START( sound_readmem_A, ADDRESS_SPACE_PROGRAM, 16 )
448		AM_RANGE(0x000000, 0x01ffff) AM_READ(SMH_ROM)
	391	static ADDRESS_MAP_START( megasys1A_sound_map, ADDRESS_SPACE_PROGRAM, 16 )
	392	AM_RANGE(0x000000, 0x01ffff) AM_ROM
449	393	AM_RANGE(0x040000, 0x040001) AM_READ(soundlatch_word_r)
450		AM_RANGE(0x080000, 0x080003) AM_DEVREAD8("ym", ym2151_r, 0x00ff)
451		AM_RANGE(0x0a0000, 0x0a0001) AM_DEVREAD8("oki1", oki_status_r, 0x00ff)
452		AM_RANGE(0x0c0000, 0x0c0001) AM_DEVREAD8("oki2", oki_status_r, 0x00ff)
453		AM_RANGE(0x0e0000, 0x0fffff) AM_READ(SMH_RAM)
454		ADDRESS_MAP_END
455
456		static ADDRESS_MAP_START( sound_writemem_A, ADDRESS_SPACE_PROGRAM, 16 )
457		AM_RANGE(0x000000, 0x01ffff) AM_WRITE(SMH_ROM)
458	394	AM_RANGE(0x060000, 0x060001) AM_WRITE(soundlatch2_word_w)   // to main cpu
459		AM_RANGE(0x080000, 0x080003) AM_DEVWRITE8("ym", ym2151_w, 0x00ff)
	395	AM_RANGE(0x080000, 0x080003) AM_DEVREADWRITE8("ym", ym2151_r,ym2151_w, 0x00ff)
	396	AM_RANGE(0x0a0000, 0x0a0001) AM_DEVREAD8("oki1", oki_status_r, 0x00ff)
460	397	AM_RANGE(0x0a0000, 0x0a0003) AM_DEVWRITE8("oki1", okim6295_w, 0x00ff)
	398	AM_RANGE(0x0c0000, 0x0c0001) AM_DEVREAD8("oki2", oki_status_r, 0x00ff)
461	399	AM_RANGE(0x0c0000, 0x0c0003) AM_DEVWRITE8("oki2", okim6295_w, 0x00ff)
462		AM_RANGE(0x0e0000, 0x0fffff) AM_WRITE(SMH_RAM)
	400	AM_RANGE(0x0e0000, 0x0fffff) AM_RAM
463	401	ADDRESS_MAP_END
464	402
465	403
466
467
468
469
470	404	/***************************************************************************
471	405	[ Sound CPU - System B / C ]
472	406	***************************************************************************/
473	407
474	408
475		static ADDRESS_MAP_START( sound_readmem_B, ADDRESS_SPACE_PROGRAM, 16 )
476		AM_RANGE(0x000000, 0x01ffff) AM_READ(SMH_ROM)
477		AM_RANGE(0x040000, 0x040001) AM_READ(soundlatch_word_r)   /* from main cpu */
478		AM_RANGE(0x060000, 0x060001) AM_READ(soundlatch_word_r)   /* from main cpu */
479		AM_RANGE(0x080000, 0x080003) AM_DEVREAD8("ym", ym2151_r, 0x00ff)
	409	static ADDRESS_MAP_START( megasys1B_sound_map, ADDRESS_SPACE_PROGRAM, 16 )
	410	AM_RANGE(0x000000, 0x01ffff) AM_ROM
	411	AM_RANGE(0x040000, 0x040001) AM_READWRITE(soundlatch_word_r,soundlatch2_word_w)   /* from/to main cpu */
	412	AM_RANGE(0x060000, 0x060001) AM_READWRITE(soundlatch_word_r,soundlatch2_word_w)   /* from/to main cpu */
	413	AM_RANGE(0x080000, 0x080003) AM_DEVREADWRITE8("ym", ym2151_r,ym2151_w, 0x00ff)
480	414	AM_RANGE(0x0a0000, 0x0a0001) AM_DEVREAD8("oki1", oki_status_r, 0x00ff)
481		AM_RANGE(0x0c0000, 0x0c0001) AM_DEVREAD8("oki2", oki_status_r, 0x00ff)
482		AM_RANGE(0x0e0000, 0x0effff) AM_READ(SMH_RAM)
483		ADDRESS_MAP_END
484
485		static ADDRESS_MAP_START( sound_writemem_B, ADDRESS_SPACE_PROGRAM, 16 )
486		AM_RANGE(0x000000, 0x01ffff) AM_WRITE(SMH_ROM   )
487		AM_RANGE(0x040000, 0x040001) AM_WRITE(soundlatch2_word_w)   /* to main cpu */
488		AM_RANGE(0x060000, 0x060001) AM_WRITE(soundlatch2_word_w)   /* to main cpu */
489		AM_RANGE(0x080000, 0x080003) AM_DEVWRITE8("ym", ym2151_w, 0x00ff)
490	415	AM_RANGE(0x0a0000, 0x0a0003) AM_DEVWRITE8("oki1", okim6295_w, 0x00ff)
	416	AM_RANGE(0x0c0000, 0x0c0001) AM_DEVREAD8("oki2", oki_status_r, 0x00ff)
491	417	AM_RANGE(0x0c0000, 0x0c0003) AM_DEVWRITE8("oki2", okim6295_w, 0x00ff)
492		AM_RANGE(0x0e0000, 0x0effff) AM_WRITE(SMH_RAM)
	418	AM_RANGE(0x0e0000, 0x0effff) AM_RAM
493	419	ADDRESS_MAP_END
494	420
495	421
496
497
498
499
500	422	/***************************************************************************
501	423	[ Sound CPU - System Z ]
502	424	***************************************************************************/
503	425
504	426
505	427
506		static ADDRESS_MAP_START( sound_readmem_z80, ADDRESS_SPACE_PROGRAM, 8 )
507		AM_RANGE(0x0000, 0x3fff) AM_READ(SMH_ROM)
508		AM_RANGE(0xc000, 0xc7ff) AM_READ(SMH_RAM)
	428	static ADDRESS_MAP_START( z80_sound_map, ADDRESS_SPACE_PROGRAM, 8 )
	429	AM_RANGE(0x0000, 0x3fff) AM_ROM
	430	AM_RANGE(0xc000, 0xc7ff) AM_RAM
509	431	AM_RANGE(0xe000, 0xe000) AM_READ(soundlatch_r)
510		ADDRESS_MAP_END
511
512		static ADDRESS_MAP_START( sound_writemem_z80, ADDRESS_SPACE_PROGRAM, 8 )
513		AM_RANGE(0x0000, 0x3fff) AM_WRITE(SMH_ROM)
514		AM_RANGE(0xc000, 0xc7ff) AM_WRITE(SMH_RAM)
515	432	AM_RANGE(0xf000, 0xf000) AM_WRITENOP /* ?? */
516	433	ADDRESS_MAP_END
517	434
518		static ADDRESS_MAP_START( sound_io_map, ADDRESS_SPACE_IO, 8 )
	435	static ADDRESS_MAP_START( z80_sound_io_map, ADDRESS_SPACE_IO, 8 )
519	436	ADDRESS_MAP_GLOBAL_MASK(0xff)
520	437	AM_RANGE(0x00, 0x01) AM_DEVREADWRITE("ym", ym2203_r, ym2203_w)
521	438	ADDRESS_MAP_END
r4679	r4680
1470	1387	}
1471	1388	}
1472	1389
1473		cpu_set_input_line(space->machine->cpu[0],4,HOLD_LINE);
	1390	cputag_set_input_line(space->machine, "maincpu", 4, HOLD_LINE);
1474	1391	}
1475	1392
1476	1393	/*************************************
r4679	r4680
1539	1456
1540	1457	/* basic machine hardware */
1541	1458	MDRV_CPU_ADD("maincpu", M68000, SYS_A_CPU_CLOCK) /* 6MHz verified */
1542		MDRV_CPU_PROGRAM_MAP(readmem_A,writemem_A)
	1459	MDRV_CPU_PROGRAM_MAP(megasys1A_map,0)
1543	1460	MDRV_CPU_VBLANK_INT_HACK(interrupt_A,INTERRUPT_NUM_A)
1544	1461
1545	1462	MDRV_CPU_ADD("soundcpu", M68000, SOUND_CPU_CLOCK) /* 7MHz verified */
1546		MDRV_CPU_PROGRAM_MAP(sound_readmem_A,sound_writemem_A)
	1463	MDRV_CPU_PROGRAM_MAP(megasys1A_sound_map,0)
1547	1464
1548	1465	MDRV_QUANTUM_TIME(HZ(120000))
1549	1466
r4679	r4680
1595	1512
1596	1513	MDRV_CPU_REPLACE("maincpu", M68000, SYS_B_CPU_CLOCK) /* 8MHz */
1597	1514	MDRV_CPU_MODIFY("maincpu")
1598		MDRV_CPU_PROGRAM_MAP(readmem_B,writemem_B)
	1515	MDRV_CPU_PROGRAM_MAP(megasys1B_map,0)
1599	1516	MDRV_CPU_VBLANK_INT_HACK(interrupt_B,INTERRUPT_NUM_B)
1600	1517
1601	1518	MDRV_CPU_MODIFY("soundcpu")
1602		MDRV_CPU_PROGRAM_MAP(sound_readmem_B,sound_writemem_B)
	1519	MDRV_CPU_PROGRAM_MAP(megasys1B_sound_map,0)
1603	1520	MACHINE_DRIVER_END
1604	1521
1605	1522	static MACHINE_DRIVER_START( system_B_hayaosi1 )
r4679	r4680
1625	1542	MDRV_IMPORT_FROM(system_A)
1626	1543	MDRV_CPU_REPLACE("maincpu", M68000, SYS_C_CPU_CLOCK) /* 12MHz */
1627	1544	MDRV_CPU_MODIFY("maincpu")
1628		MDRV_CPU_PROGRAM_MAP(readmem_C,writemem_C)
	1545	MDRV_CPU_PROGRAM_MAP(megasys1C_map,0)
1629	1546	MDRV_CPU_VBLANK_INT_HACK(interrupt_C,INTERRUPT_NUM_C)
1630	1547
1631	1548	MDRV_CPU_MODIFY("soundcpu")
1632		MDRV_CPU_PROGRAM_MAP(sound_readmem_B,sound_writemem_B)
	1549	MDRV_CPU_PROGRAM_MAP(megasys1B_sound_map,0)
1633	1550	MACHINE_DRIVER_END
1634	1551
1635	1552
r4679	r4680
1648	1565
1649	1566	/* basic machine hardware */
1650	1567	MDRV_CPU_ADD("maincpu", M68000, SYS_D_CPU_CLOCK)   /* 8MHz */
1651		MDRV_CPU_PROGRAM_MAP(readmem_D,writemem_D)
	1568	MDRV_CPU_PROGRAM_MAP(megasys1D_map,0)
1652	1569	MDRV_CPU_VBLANK_INT("screen", interrupt_D)
1653	1570
1654	1571	MDRV_MACHINE_RESET(megasys1)
r4679	r4680
1692	1609
1693	1610	static void irq_handler(const device_config *device, int irq)
1694	1611	{
1695		cpu_set_input_line(device->machine->cpu[1],0,irq ? ASSERT_LINE : CLEAR_LINE);
	1612	cputag_set_input_line(device->machine, "soundcpu", 0, irq ? ASSERT_LINE : CLEAR_LINE);
1696	1613	}
1697	1614
1698	1615
r4679	r4680
1710	1627
1711	1628	/* basic machine hardware */
1712	1629	MDRV_CPU_ADD("maincpu", M68000, SYS_A_CPU_CLOCK) /* 6MHz (12MHz / 2) */
1713		MDRV_CPU_PROGRAM_MAP(readmem_A,writemem_A)
	1630	MDRV_CPU_PROGRAM_MAP(megasys1A_map,0)
1714	1631	MDRV_CPU_VBLANK_INT_HACK(interrupt_A,INTERRUPT_NUM_A)
1715	1632
1716	1633	MDRV_CPU_ADD("audiocpu", Z80, 3000000) /* OSC 12MHz divided by 4 ??? */
1717		MDRV_CPU_PROGRAM_MAP(sound_readmem_z80,sound_writemem_z80)
1718		MDRV_CPU_IO_MAP(sound_io_map,0)
	1634	MDRV_CPU_PROGRAM_MAP(z80_sound_map,0)
	1635	MDRV_CPU_IO_MAP(z80_sound_io_map,0)
1719	1636
1720	1637	/* video hardware */
1721	1638	MDRV_SCREEN_ADD("screen", RASTER)
r4679	r4680
3663	3580	| ((rom[i] & 0x48) << 1)
3664	3581	| ((rom[i] & 0x10) << 2);
3665	3582
3666		buffer = malloc_or_die(size);
	3583	buffer = alloc_array_or_die(UINT8, size);
3667	3584
3668	3585	memcpy(buffer,rom,size);
3669	3586
r4679	r4680
3692	3609	for (i = 0;i < size;i++)
3693	3610	rom[i] =   BITSWAP8(rom[i],0x4,0x3,0x5,0x7,0x6,0x2,0x1,0x0);
3694	3611
3695		buffer = malloc_or_die(size);
	3612	buffer = alloc_array_or_die(UINT8, size);
3696	3613
3697	3614	memcpy(buffer,rom,size);
3698	3615
r4679	r4680
3841	3758	RAM[0x438/2] = 0x4e71;   //
3842	3759
3843	3760	/* the sound code writes oki commands to both the lsb and msb */
3844		memory_install_write16_device_handler(cpu_get_address_space(machine->cpu[1], ADDRESS_SPACE_PROGRAM), oki1, 0xa0000, 0xa0003, 0, 0, okim6295_both_w);
3845		memory_install_write16_device_handler(cpu_get_address_space(machine->cpu[1], ADDRESS_SPACE_PROGRAM), oki2, 0xc0000, 0xc0003, 0, 0, okim6295_both_w);
	3761	memory_install_write16_device_handler(cputag_get_address_space(machine, "soundcpu", ADDRESS_SPACE_PROGRAM), oki1, 0xa0000, 0xa0003, 0, 0, okim6295_both_w);
	3762	memory_install_write16_device_handler(cputag_get_address_space(machine, "soundcpu", ADDRESS_SPACE_PROGRAM), oki2, 0xc0000, 0xc0003, 0, 0, okim6295_both_w);
3846	3763	}
3847	3764
3848	3765	static DRIVER_INIT( peekaboo )
3849	3766	{
3850		memory_install_readwrite16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x100000, 0x100001, 0, 0, protection_peekaboo_r, protection_peekaboo_w);
	3767	memory_install_readwrite16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x100000, 0x100001, 0, 0, protection_peekaboo_r, protection_peekaboo_w);
3851	3768	}
3852	3769
3853	3770	static DRIVER_INIT( phantasm )
r4679	r4680
3892	3809	astyanax_rom_decode(machine, "maincpu");
3893	3810
3894	3811	/* Sprite RAM is mirrored */
3895		memory_install_readwrite16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x8c000, 0x8cfff, 0, 0, soldamj_spriteram16_r, soldamj_spriteram16_w);
	3812	memory_install_readwrite16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x8c000, 0x8cfff, 0, 0, soldamj_spriteram16_r, soldamj_spriteram16_w);
3896	3813	}
3897	3814
3898	3815	static DRIVER_INIT( soldam )
r4679	r4680
3900	3817	phantasm_rom_decode(machine, "maincpu");
3901	3818
3902	3819	/* Sprite RAM is mirrored */
3903		memory_install_readwrite16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x8c000, 0x8cfff, 0, 0, soldamj_spriteram16_r, soldamj_spriteram16_w);
	3820	memory_install_readwrite16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x8c000, 0x8cfff, 0, 0, soldamj_spriteram16_r, soldamj_spriteram16_w);
3904	3821	}
3905	3822
3906	3823
r4679	r4680
3924	3841	UINT16 *ROM = (UINT16*)memory_region(machine, "maincpu");
3925	3842	ROM[0x00744/2] = 0x4e71;
3926	3843
3927		memory_install_read16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xe0000, 0xe000f, 0, 0, monkelf_input_r);
	3844	memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xe0000, 0xe000f, 0, 0, monkelf_input_r);
3928	3845
3929	3846	megasys1_ram += 0x10000/2;
3930	3847
r4679	r4680
3968	3885	GAME( 1993, cybattlr, 0,        system_C,          cybattlr, cybattlr, ROT90,  "Jaleco", "Cybattler", 0 )
3969	3886	GAME( 1993, hayaosi1, 0,        system_B_hayaosi1, hayaosi1, hayaosi1, ROT0,   "Jaleco", "Hayaoshi Quiz Ouza Ketteisen - The King Of Quiz", GAME_IMPERFECT_GRAPHICS )
3970	3887	GAME( 1993, peekaboo, 0,        system_D,          peekaboo, peekaboo, ROT0,   "Jaleco", "Peek-a-Boo!", 0 )
3971

src/mame/drivers/crshrace.c

r4679	r4680
171	171	{
172	172	pending_command = 1;
173	173	soundlatch_w(space,offset,data & 0xff);
174		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_NMI, PULSE_LINE);
	174	cputag_set_input_line(space->machine, "audiocpu", INPUT_LINE_NMI, PULSE_LINE);
175	175	}
176	176	}
177	177
r4679	r4680
187	187
188	188
189	189
190		static ADDRESS_MAP_START( readmem, ADDRESS_SPACE_PROGRAM, 16 )
191		AM_RANGE(0x000000, 0x07ffff) AM_READ(SMH_ROM)
	190	static ADDRESS_MAP_START( crshrace_map, ADDRESS_SPACE_PROGRAM, 16 )
	191	AM_RANGE(0x000000, 0x07ffff) AM_ROM
192	192	AM_RANGE(0x300000, 0x3fffff) AM_READ(extrarom1_r)
193	193	AM_RANGE(0x400000, 0x4fffff) AM_READ(extrarom2_r)
194	194	AM_RANGE(0x500000, 0x5fffff) AM_READ(extrarom2_r)   /* mirror */
195		AM_RANGE(0xa00000, 0xa0ffff) AM_READ(SMH_RAM)
196		AM_RANGE(0xd00000, 0xd01fff) AM_READ(SMH_RAM)
197		AM_RANGE(0xe00000, 0xe01fff) AM_READ(SMH_RAM)
198		AM_RANGE(0xfe0000, 0xfeffff) AM_READ(SMH_RAM)
199		AM_RANGE(0xffd000, 0xffdfff) AM_READ(SMH_RAM)
200		AM_RANGE(0xffe000, 0xffefff) AM_READ(SMH_RAM)
201		AM_RANGE(0xfff000, 0xfff001) AM_READ_PORT("P1")
	195	AM_RANGE(0xa00000, 0xa0ffff) AM_RAM AM_BASE(&spriteram16_2) AM_SIZE(&spriteram_2_size)
	196	AM_RANGE(0xd00000, 0xd01fff) AM_RAM_WRITE(crshrace_videoram1_w) AM_BASE(&crshrace_videoram1)
	197	AM_RANGE(0xe00000, 0xe01fff) AM_RAM AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)
	198	AM_RANGE(0xfe0000, 0xfeffff) AM_RAM
	199	AM_RANGE(0xffc000, 0xffc001) AM_WRITE(crshrace_roz_bank_w)
	200	AM_RANGE(0xffd000, 0xffdfff) AM_RAM_WRITE(crshrace_videoram2_w) AM_BASE(&crshrace_videoram2)
	201	AM_RANGE(0xffe000, 0xffefff) AM_RAM_WRITE(paletteram16_xGGGGGBBBBBRRRRR_word_w) AM_BASE(&paletteram16)
	202	AM_RANGE(0xfff000, 0xfff001) AM_READ_PORT("P1") AM_WRITE(crshrace_gfxctrl_w)
202	203	AM_RANGE(0xfff002, 0xfff003) AM_READ_PORT("P2")
203	204	AM_RANGE(0xfff004, 0xfff005) AM_READ_PORT("DSW0")
204	205	AM_RANGE(0xfff006, 0xfff007) AM_READ_PORT("DSW2")
	206	AM_RANGE(0xfff008, 0xfff009) AM_WRITE(sound_command_w)
205	207	AM_RANGE(0xfff00a, 0xfff00b) AM_READ_PORT("DSW1")
206	208	AM_RANGE(0xfff00e, 0xfff00f) AM_READ_PORT("P3")
207		ADDRESS_MAP_END
208
209		static ADDRESS_MAP_START( writemem, ADDRESS_SPACE_PROGRAM, 16 )
210		AM_RANGE(0x000000, 0x07ffff) AM_WRITE(SMH_ROM)
211		AM_RANGE(0xa00000, 0xa0ffff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16_2) AM_SIZE(&spriteram_2_size)         // RAM-5
212		AM_RANGE(0xd00000, 0xd01fff) AM_WRITE(crshrace_videoram1_w) AM_BASE(&crshrace_videoram1)            // RAM-3 H/L
213		AM_RANGE(0xe00000, 0xe01fff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)            // RAM-6
214		AM_RANGE(0xffc000, 0xffc001) AM_WRITE(crshrace_roz_bank_w)
215		AM_RANGE(0xfe0000, 0xfeffff) AM_WRITE(SMH_RAM)   /* work RAM */                        // RAM-1 H/L
216		AM_RANGE(0xffd000, 0xffdfff) AM_WRITE(crshrace_videoram2_w) AM_BASE(&crshrace_videoram2)            // RAM-2 H/L
217		AM_RANGE(0xffe000, 0xffefff) AM_WRITE(paletteram16_xGGGGGBBBBBRRRRR_word_w) AM_BASE(&paletteram16)   // RAM-4 H/L
218		AM_RANGE(0xfff000, 0xfff001) AM_WRITE(crshrace_gfxctrl_w)
219		AM_RANGE(0xfff008, 0xfff009) AM_WRITE(sound_command_w)
220	209	AM_RANGE(0xfff020, 0xfff03f) AM_WRITE(SMH_RAM) AM_BASE(&K053936_0_ctrl)
221	210	AM_RANGE(0xfff044, 0xfff047) AM_WRITE(SMH_RAM)   // ??? moves during race
222	211	ADDRESS_MAP_END
223	212
224		static ADDRESS_MAP_START( sound_readmem, ADDRESS_SPACE_PROGRAM, 8 )
225		AM_RANGE(0x0000, 0x77ff) AM_READ(SMH_ROM)
226		AM_RANGE(0x7800, 0x7fff) AM_READ(SMH_RAM)
227		AM_RANGE(0x8000, 0xffff) AM_READ(SMH_BANK1)
	213	static ADDRESS_MAP_START( sound_map, ADDRESS_SPACE_PROGRAM, 8 )
	214	AM_RANGE(0x0000, 0x77ff) AM_ROM
	215	AM_RANGE(0x7800, 0x7fff) AM_RAM
	216	AM_RANGE(0x8000, 0xffff) AM_ROMBANK(1)
228	217	ADDRESS_MAP_END
229	218
230		static ADDRESS_MAP_START( sound_writemem, ADDRESS_SPACE_PROGRAM, 8 )
231		AM_RANGE(0x0000, 0x77ff) AM_WRITE(SMH_ROM)
232		AM_RANGE(0x7800, 0x7fff) AM_WRITE(SMH_RAM)
233		AM_RANGE(0x8000, 0xffff) AM_WRITE(SMH_ROM)
234		ADDRESS_MAP_END
235
236	219	static ADDRESS_MAP_START( sound_io_map, ADDRESS_SPACE_IO, 8 )
237	220	ADDRESS_MAP_GLOBAL_MASK(0xff)
238	221	AM_RANGE(0x00, 0x00) AM_WRITE(crshrace_sh_bankswitch_w)
r4679	r4680
445	428
446	429	static void irqhandler(const device_config *device, int irq)
447	430	{
448		cpu_set_input_line(device->machine->cpu[1],0,irq ? ASSERT_LINE : CLEAR_LINE);
	431	cputag_set_input_line(device->machine, "audiocpu", 0, irq ? ASSERT_LINE : CLEAR_LINE);
449	432	}
450	433
451	434	static const ym2610_interface ym2610_config =
r4679	r4680
459	442
460	443	/* basic machine hardware */
461	444	MDRV_CPU_ADD("maincpu", M68000,16000000)   /* 16 MHz ??? */
462		MDRV_CPU_PROGRAM_MAP(readmem,writemem)
	445	MDRV_CPU_PROGRAM_MAP(crshrace_map,0)
463	446	MDRV_CPU_VBLANK_INT("screen", irq1_line_hold)
464	447
465	448	MDRV_CPU_ADD("audiocpu", Z80,4000000)   /* 4 MHz ??? */
466		MDRV_CPU_PROGRAM_MAP(sound_readmem,sound_writemem)
	449	MDRV_CPU_PROGRAM_MAP(sound_map,0)
467	450	MDRV_CPU_IO_MAP(sound_io_map,0)
468	451
469	452	/* video hardware */

src/mame/drivers/airbustr.c

r4679	r4680
277	277
278	278	static WRITE8_HANDLER( master_nmi_trigger_w )
279	279	{
280		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_NMI, PULSE_LINE);
	280	cputag_set_input_line(space->machine, "slave", INPUT_LINE_NMI, PULSE_LINE);
281	281	}
282	282
283	283	static void airbustr_bankswitch(running_machine *machine, const char *cpu, int bank, int data)
r4679	r4680
334	334	{
335	335	soundlatch_w(space, 0, data);
336	336	soundlatch_status = 1;   // soundlatch has been written
337		cpu_set_input_line(space->machine->cpu[2], INPUT_LINE_NMI, PULSE_LINE);   // cause a nmi to sub cpu
	337	cputag_set_input_line(space->machine, "audiocpu", INPUT_LINE_NMI, PULSE_LINE);   // cause a nmi to sub cpu
338	338	}
339	339
340	340	static WRITE8_HANDLER( soundcommand2_w )
r4679	r4680
598	598
599	599	static MACHINE_RESET( airbustr )
600	600	{
601		const address_space *space = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM);
	601	const address_space *space = cputag_get_address_space(machine, "master", ADDRESS_SPACE_PROGRAM);
602	602	soundlatch_status = soundlatch2_status = 0;
603	603	master_addr = 0xff;
604	604	slave_addr = 0xfd;
r4679	r4680
770	770
771	771	static DRIVER_INIT( airbustr )
772	772	{
773		memory_install_read8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xe000, 0xefff, 0, 0, devram_r); // protection device lives here
	773	memory_install_read8_handler(cputag_get_address_space(machine, "master", ADDRESS_SPACE_PROGRAM), 0xe000, 0xefff, 0, 0, devram_r); // protection device lives here
774	774	}
775	775
776	776

src/mame/drivers/pacman.c

r4679	r4680
397	397
398	398	static WRITE8_HANDLER( pacman_interrupt_vector_w )
399	399	{
400		cpu_set_input_line_vector(space->machine->cpu[0], 0, data);
401		cpu_set_input_line(space->machine->cpu[0], 0, CLEAR_LINE);
	400	cpu_set_input_line_vector(cputag_get_cpu(space->machine, "maincpu"), 0, data);
	401	cputag_set_input_line(space->machine, "maincpu", 0, CLEAR_LINE);
402	402	}
403	403
404	404
r4679	r4680
477	477
478	478	static WRITE8_HANDLER( piranha_interrupt_vector_w)
479	479	{
480		if (data==0xfa) data=0x78;
481		if (data==0xfc) data=0xfc;
482		cpu_set_input_line_vector(space->machine->cpu[0], 0, data );
	480	if (data == 0xfa) data = 0x78;
	481	if (data == 0xfc) data = 0xfc;
	482	cpu_set_input_line_vector(cputag_get_cpu(space->machine, "maincpu"), 0, data );
483	483	}
484	484
485	485
486	486	static WRITE8_HANDLER( nmouse_interrupt_vector_w)
487	487	{
488		if (data==0xbf) data=0x3c;
489		if (data==0xc6) data=0x40;
490		if (data==0xfc) data=0xfc;
491		cpu_set_input_line_vector(space->machine->cpu[0], 0, data );
	488	if (data == 0xbf) data = 0x3c;
	489	if (data == 0xc6) data = 0x40;
	490	if (data == 0xfc) data = 0xfc;
	491	cpu_set_input_line_vector(cputag_get_cpu(space->machine, "maincpu"), 0, data );
492	492	}
493	493
494	494
r4679	r4680
5301	5301	static void maketrax_rom_decode(running_machine *machine)
5302	5302	{
5303	5303	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
5304		UINT8 *decrypted = auto_malloc(0x4000);
	5304	UINT8 *decrypted = auto_alloc_array(machine, UINT8, 0x4000);
5305	5305	UINT8 *rom = memory_region(machine, "maincpu");
5306	5306
5307	5307	/* patch protection using a copy of the opcodes so ROM checksum */
r4679	r4680
5324	5324	static DRIVER_INIT( maketrax )
5325	5325	{
5326	5326	/* set up protection handlers */
5327		memory_install_read8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x5080, 0x50bf, 0, 0, maketrax_special_port2_r);
5328		memory_install_read8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x50c0, 0x50ff, 0, 0, maketrax_special_port3_r);
	5327	memory_install_read8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x5080, 0x50bf, 0, 0, maketrax_special_port2_r);
	5328	memory_install_read8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x50c0, 0x50ff, 0, 0, maketrax_special_port3_r);
5329	5329
5330	5330	maketrax_rom_decode(machine);
5331	5331	}
r4679	r4680
5333	5333	static void korosuke_rom_decode(running_machine *machine)
5334	5334	{
5335	5335	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
5336		UINT8 *decrypted = auto_malloc(0x4000);
	5336	UINT8 *decrypted = auto_alloc_array(machine, UINT8, 0x4000);
5337	5337	UINT8 *rom = memory_region(machine, "maincpu");
5338	5338
5339	5339	/* patch protection using a copy of the opcodes so ROM checksum */
r4679	r4680
5356	5356	static DRIVER_INIT( korosuke )
5357	5357	{
5358	5358	/* set up protection handlers */
5359		memory_install_read8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x5080, 0x5080, 0, 0, korosuke_special_port2_r);
5360		memory_install_read8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x50c0, 0x50ff, 0, 0, korosuke_special_port3_r);
	5359	memory_install_read8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x5080, 0x5080, 0, 0, korosuke_special_port2_r);
	5360	memory_install_read8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x50c0, 0x50ff, 0, 0, korosuke_special_port3_r);
5361	5361
5362	5362	korosuke_rom_decode(machine);
5363	5363	}
r4679	r4680
5692	5692	static DRIVER_INIT( cannonbp )
5693	5693	{
5694	5694	/* extra memory */
5695		memory_install_readwrite8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x4800, 0x4bff, 0, 0, SMH_BANK5, SMH_BANK5);
5696		memory_set_bankptr(machine, 5, auto_malloc(0x400));
	5695	memory_install_readwrite8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x4800, 0x4bff, 0, 0, (read8_space_func)SMH_BANK(5), (write8_space_func)SMH_BANK(5));
	5696	memory_set_bankptr(machine, 5, auto_alloc_array(machine, UINT8, 0x400));
5697	5697
5698	5698	/* protection? */
5699		memory_install_read8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x3000, 0x3fff, 0, 0, cannonbp_protection_r);
	5699	memory_install_read8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x3000, 0x3fff, 0, 0, cannonbp_protection_r);
5700	5700	}
5701	5701
5702	5702
r4679	r4680
5707	5707	*************************************/
5708	5708
5709	5709	/*          rom       parent    machine   inp       init */
5710		GAME( 1980, puckman,  0,        pacman,   pacman,   0,        ROT90,  "Namco", "PuckMan (Japan set 1, Probably Bootleg)", GAME_SUPPORTS_SAVE )
	5710	GAME( 1980, puckman,  0,        pacman,   pacman,   0,        ROT90,  "Namco", "PuckMan (Japan set 1)", GAME_SUPPORTS_SAVE )
5711	5711	GAME( 1980, puckmana, puckman,  pacman,   pacman,   0,        ROT90,  "Namco", "PuckMan (Japan set 2)", GAME_SUPPORTS_SAVE )
5712	5712	GAME( 1980, puckmanf, puckman,  pacman,   pacman,   0,        ROT90,  "Namco", "PuckMan (Japan set 1 with speedup hack)", GAME_SUPPORTS_SAVE )
5713	5713	GAME( 1980, puckmanh, puckman,  pacman,   pacman,   0,        ROT90,  "hack", "Puckman (Falcom?)", GAME_SUPPORTS_SAVE )

src/mame/drivers/dcheese.c

r4679	r4680
83	83	void dcheese_signal_irq(running_machine *machine, int which)
84	84	{
85	85	irq_state[which] = 1;
86		update_irq_state(machine->cpu[0]);
	86	update_irq_state(cputag_get_cpu(machine, "maincpu"));
87	87	}
88	88
89	89
r4679	r4680
103	103
104	104	static MACHINE_START( dcheese )
105	105	{
106		cpu_set_irq_callback(machine->cpu[0], irq_callback);
	106	cpu_set_irq_callback(cputag_get_cpu(machine, "maincpu"), irq_callback);
107	107
108	108	state_save_register_global_array(machine, irq_state);
109	109	state_save_register_global(machine, soundlatch_full);
r4679	r4680
145	145	{
146	146	/* write the latch and set the IRQ */
147	147	soundlatch_full = 1;
148		cpu_set_input_line(space->machine->cpu[1], 0, ASSERT_LINE);
	148	cputag_set_input_line(space->machine, "audiocpu", 0, ASSERT_LINE);
149	149	soundlatch_w(space, 0, data & 0xff);
150	150	}
151	151	}
r4679	r4680
162	162	{
163	163	/* read the latch and clear the IRQ */
164	164	soundlatch_full = 0;
165		cpu_set_input_line(space->machine->cpu[1], 0, CLEAR_LINE);
	165	cputag_set_input_line(space->machine, "audiocpu", 0, CLEAR_LINE);
166	166	return soundlatch_r(space, 0);
167	167	}
168	168
r4679	r4680
805	805	GAME( 1994, fredmemj, fredmem, fredmem, fredmem, dcheese, ROT0,  "Coastal Amusements", "Fred Flintstones' Memory Match (Japan, High Score version, 3/20/95)", GAME_SUPPORTS_SAVE )
806	806	GAME( 1994, fredmemc, fredmem, fredmem, fredmem, dcheese, ROT0,  "Coastal Amusements", "Fred Flintstones' Memory Match (Mandarin Chinese, 3/17/95)", GAME_SUPPORTS_SAVE )
807	807	GAME( 1994, fredmesp, fredmem, fredmem, fredmem, dcheese, ROT0,  "Coastal Amusements", "Fred Flintstones' Memory Match (Spanish, 3/17/95)", GAME_SUPPORTS_SAVE )
808

src/mame/drivers/chqflag.c

r4679	r4680
56	56	/* bit 5 = memory bank select */
57	57	if (data & 0x20)
58	58	{
59		memory_install_readwrite8_handler(space, 0x1800, 0x1fff, 0, 0, SMH_BANK5, paletteram_xBBBBBGGGGGRRRRR_be_w);
	59	memory_install_readwrite8_handler(space, 0x1800, 0x1fff, 0, 0, (read8_space_func)SMH_BANK(5), paletteram_xBBBBBGGGGGRRRRR_be_w);
60	60	memory_set_bankptr(space->machine, 5, paletteram);
61	61
62	62	if (K051316_readroms)
r4679	r4680
66	66	}
67	67	else
68	68	{
69		memory_install_readwrite8_handler(space, 0x1000, 0x17ff, 0, 0, SMH_BANK1, SMH_BANK1);            /* RAM */
70		memory_install_readwrite8_handler(space, 0x1800, 0x1fff, 0, 0, SMH_BANK2, SMH_BANK2);            /* RAM */
	69	memory_install_readwrite8_handler(space, 0x1000, 0x17ff, 0, 0, (read8_space_func)SMH_BANK(1), (write8_space_func)SMH_BANK(1));            /* RAM */
	70	memory_install_readwrite8_handler(space, 0x1800, 0x1fff, 0, 0, (read8_space_func)SMH_BANK(2), (write8_space_func)SMH_BANK(2));            /* RAM */
71	71	}
72	72
73	73	/* other bits unknown/unused */
r4679	r4680
88	88	else
89	89	memory_install_read8_handler(space, 0x2800, 0x2fff, 0, 0, K051316_1_r);      /* 051316 */
90	90
91		/* Bits 3-7 probably control palette dimming in a similar way to TMNT2/Saunset Riders, */
	91	/* Bits 3-7 probably control palette dimming in a similar way to TMNT2/Sunset Riders, */
92	92	/* however I don't have enough evidence to determine the exact behaviour. */
93	93	/* Bits 3 and 7 are set in night stages, where the background should get darker and */
94	94	/* the headlight (which have the shadow bit set) become highlights */
r4679	r4680
140	140
141	141	static WRITE8_HANDLER( chqflag_sh_irqtrigger_w )
142	142	{
143		cpu_set_input_line(space->machine->cpu[1],0,HOLD_LINE);
	143	soundlatch2_w(space, 0, data);
	144	cputag_set_input_line(space->machine, "audiocpu", 0, HOLD_LINE);
144	145	}
145	146
146	147
147	148	/****************************************************************************/
148	149
149		static ADDRESS_MAP_START( chqflag_readmem, ADDRESS_SPACE_PROGRAM, 8 )
150		AM_RANGE(0x0000, 0x0fff) AM_READ(SMH_RAM)               /* RAM */
151		AM_RANGE(0x1000, 0x17ff) AM_READ(SMH_BANK1)               /* banked RAM (RAM/051316 (chip 1)) */
152		AM_RANGE(0x1800, 0x1fff) AM_READ(SMH_BANK2)               /* palette + RAM */
153		AM_RANGE(0x2000, 0x2007) AM_READ(K051937_r)               /* Sprite control registers */
154		AM_RANGE(0x2400, 0x27ff) AM_READ(K051960_r)               /* Sprite RAM */
155		AM_RANGE(0x2800, 0x2fff) AM_READ(SMH_BANK3)               /* 051316 zoom/rotation (chip 2) */
156		AM_RANGE(0x3100, 0x3100) AM_READ_PORT("DSW1")            /* DIPSW #1  */
157		AM_RANGE(0x3200, 0x3200) AM_READ_PORT("IN1")            /* COINSW, STARTSW, test mode */
158		AM_RANGE(0x3201, 0x3201) AM_READ_PORT("IN0")            /* DIPSW #3, SW 4 */
159		AM_RANGE(0x3203, 0x3203) AM_READ_PORT("DSW2")            /* DIPSW #2 */
160		AM_RANGE(0x3400, 0x341f) AM_READ(K051733_r)               /* 051733 (protection) */
161		AM_RANGE(0x3701, 0x3701) AM_READ_PORT("IN2")            /* Brake + Shift + ? */
162		AM_RANGE(0x3702, 0x3702) AM_READ(analog_read_r)            /* accelerator/wheel */
163		AM_RANGE(0x4000, 0x7fff) AM_READ(SMH_BANK4)               /* banked ROM */
164		AM_RANGE(0x8000, 0xffff) AM_READ(SMH_ROM)               /* ROM */
	150	static ADDRESS_MAP_START( chqflag_map, ADDRESS_SPACE_PROGRAM, 8 )
	151	AM_RANGE(0x0000, 0x0fff) AM_RAM                                    /* RAM */
	152	AM_RANGE(0x1000, 0x17ff) AM_RAMBANK(1)                              /* banked RAM (RAM/051316 (chip 1)) */
	153	AM_RANGE(0x1800, 0x1fff) AM_RAMBANK(2)                              /* palette + RAM */
	154	AM_RANGE(0x2000, 0x2007) AM_READWRITE(K051937_r, K051937_w)               /* Sprite control registers */
	155	AM_RANGE(0x2400, 0x27ff) AM_READWRITE(K051960_r, K051960_w)               /* Sprite RAM */
	156	AM_RANGE(0x2800, 0x2fff) AM_READWRITE(SMH_BANK(3), K051316_1_w)            /* 051316 zoom/rotation (chip 2) */
	157	AM_RANGE(0x3000, 0x3000) AM_WRITE(soundlatch_w)                        /* sound code # */
	158	AM_RANGE(0x3001, 0x3001) AM_WRITE(chqflag_sh_irqtrigger_w)               /* cause interrupt on audio CPU */
	159	AM_RANGE(0x3002, 0x3002) AM_WRITE(chqflag_bankswitch_w)                  /* bankswitch control */
	160	AM_RANGE(0x3003, 0x3003) AM_WRITE(chqflag_vreg_w)                     /* enable K051316 ROM reading */
	161	AM_RANGE(0x3100, 0x3100) AM_READ_PORT("DSW1")                        /* DIPSW #1  */
	162	AM_RANGE(0x3200, 0x3200) AM_READ_PORT("IN1")                        /* COINSW, STARTSW, test mode */
	163	AM_RANGE(0x3201, 0x3201) AM_READ_PORT("IN0")                        /* DIPSW #3, SW 4 */
	164	AM_RANGE(0x3203, 0x3203) AM_READ_PORT("DSW2")                        /* DIPSW #2 */
	165	AM_RANGE(0x3300, 0x3300) AM_WRITE(watchdog_reset_w)                     /* watchdog timer */
	166	AM_RANGE(0x3400, 0x341f) AM_READWRITE(K051733_r, K051733_w)               /* 051733 (protection) */
	167	AM_RANGE(0x3500, 0x350f) AM_WRITE(K051316_ctrl_0_w)                     /* 051316 control registers (chip 1) */
	168	AM_RANGE(0x3600, 0x360f) AM_WRITE(K051316_ctrl_1_w)                     /* 051316 control registers (chip 2) */
	169	AM_RANGE(0x3700, 0x3700) AM_WRITE(select_analog_ctrl_w)                  /* select accelerator/wheel */
	170	AM_RANGE(0x3701, 0x3701) AM_READ_PORT("IN2")                        /* Brake + Shift + ? */
	171	AM_RANGE(0x3702, 0x3702) AM_READWRITE(analog_read_r, select_analog_ctrl_w)   /* accelerator/wheel */
	172	AM_RANGE(0x4000, 0x7fff) AM_ROMBANK(4)                              /* banked ROM */
	173	AM_RANGE(0x8000, 0xffff) AM_ROM                                    /* ROM */
165	174	ADDRESS_MAP_END
166	175
167		static ADDRESS_MAP_START( chqflag_writemem, ADDRESS_SPACE_PROGRAM, 8 )
168		AM_RANGE(0x0000, 0x0fff) AM_WRITE(SMH_RAM)               /* RAM */
169		AM_RANGE(0x1000, 0x17ff) AM_WRITE(SMH_BANK1)            /* banked RAM (RAM/051316 (chip 1)) */
170		AM_RANGE(0x1800, 0x1fff) AM_WRITE(SMH_BANK2)               /* palette + RAM */
171		AM_RANGE(0x2000, 0x2007) AM_WRITE(K051937_w)               /* Sprite control registers */
172		AM_RANGE(0x2400, 0x27ff) AM_WRITE(K051960_w)               /* Sprite RAM */
173		AM_RANGE(0x2800, 0x2fff) AM_WRITE(K051316_1_w)            /* 051316 zoom/rotation (chip 2) */
174		AM_RANGE(0x3000, 0x3000) AM_WRITE(soundlatch_w)            /* sound code # */
175		AM_RANGE(0x3001, 0x3001) AM_WRITE(chqflag_sh_irqtrigger_w)   /* cause interrupt on audio CPU */
176		AM_RANGE(0x3002, 0x3002) AM_WRITE(chqflag_bankswitch_w)      /* bankswitch control */
177		AM_RANGE(0x3003, 0x3003) AM_WRITE(chqflag_vreg_w)            /* enable K051316 ROM reading */
178		AM_RANGE(0x3300, 0x3300) AM_WRITE(watchdog_reset_w)         /* watchdog timer */
179		AM_RANGE(0x3400, 0x341f) AM_WRITE(K051733_w)               /* 051733 (protection) */
180		AM_RANGE(0x3500, 0x350f) AM_WRITE(K051316_ctrl_0_w)         /* 051316 control registers (chip 1) */
181		AM_RANGE(0x3600, 0x360f) AM_WRITE(K051316_ctrl_1_w)         /* 051316 control registers (chip 2) */
182		AM_RANGE(0x3700, 0x3700) AM_WRITE(select_analog_ctrl_w)      /* select accelerator/wheel */
183		AM_RANGE(0x3702, 0x3702) AM_WRITE(select_analog_ctrl_w)      /* select accelerator/wheel (mirror?) */
184		AM_RANGE(0x4000, 0x7fff) AM_WRITE(SMH_ROM)               /* banked ROM */
185		AM_RANGE(0x8000, 0xffff) AM_WRITE(SMH_ROM)               /* ROM */
186		ADDRESS_MAP_END
187
188		static ADDRESS_MAP_START( chqflag_readmem_sound, ADDRESS_SPACE_PROGRAM, 8 )
189		AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM)            /* ROM */
190		AM_RANGE(0x8000, 0x87ff) AM_READ(SMH_RAM)            /* RAM */
191		AM_RANGE(0xa000, 0xa00d) AM_DEVREAD("konami1", k007232_r)   /* 007232 (chip 1) */
192		AM_RANGE(0xb000, 0xb00d) AM_DEVREAD("konami2", k007232_r)   /* 007232 (chip 2) */
193		AM_RANGE(0xc000, 0xc001) AM_DEVREAD("ym", ym2151_r)   /* YM2151 */
194		AM_RANGE(0xd000, 0xd000) AM_READ(soundlatch_r)         /* soundlatch_r */
195		//AM_RANGE(0xe000, 0xe000) AM_READNOP                /* ??? */
196		ADDRESS_MAP_END
197
198	176	static WRITE8_HANDLER( k007232_bankswitch_w )
199	177	{
200	178	int bank_A, bank_B;
r4679	r4680
210	188	k007232_set_bank( devtag_get_device(space->machine, "konami2"), bank_A, bank_B );
211	189	}
212	190
213		static ADDRESS_MAP_START( chqflag_writemem_sound, ADDRESS_SPACE_PROGRAM, 8 )
214		AM_RANGE(0x0000, 0x7fff) AM_WRITE(SMH_ROM)               /* ROM */
215		AM_RANGE(0x8000, 0x87ff) AM_WRITE(SMH_RAM)               /* RAM */
216		AM_RANGE(0x9000, 0x9000) AM_WRITE(k007232_bankswitch_w)      /* 007232 bankswitch */
217		AM_RANGE(0xa000, 0xa00d) AM_DEVWRITE("konami1", k007232_w)      /* 007232 (chip 1) */
218		AM_RANGE(0xa01c, 0xa01c) AM_DEVWRITE("konami2", k007232_extvolume_w)/* extra volume, goes to the 007232 w/ A11 */
219		/* selecting a different latch for the external port */
220		AM_RANGE(0xb000, 0xb00d) AM_DEVWRITE("konami2", k007232_w)      /* 007232 (chip 2) */
221		AM_RANGE(0xc000, 0xc001) AM_DEVWRITE("ym", ym2151_w)      /* YM2151 */
	191	static ADDRESS_MAP_START( chqflag_sound_map, ADDRESS_SPACE_PROGRAM, 8 )
	192	AM_RANGE(0x0000, 0x7fff) AM_ROM /* ROM */
	193	AM_RANGE(0x8000, 0x87ff) AM_RAM /* RAM */
	194	AM_RANGE(0x9000, 0x9000) AM_WRITE(k007232_bankswitch_w)   /* 007232 bankswitch */
	195	AM_RANGE(0xa000, 0xa00d) AM_DEVREADWRITE("konami1", k007232_r, k007232_w)   /* 007232 (chip 1) */
	196	AM_RANGE(0xa01c, 0xa01c) AM_DEVWRITE("konami2", k007232_extvolume_w)   /* extra volume, goes to the 007232 w/ A11 */
	197	AM_RANGE(0xb000, 0xb00d) AM_DEVREADWRITE("konami2", k007232_r, k007232_w)   /* 007232 (chip 2) */
	198	AM_RANGE(0xc000, 0xc001) AM_DEVREADWRITE("ym", ym2151_r, ym2151_w)   /* YM2151 */
	199	AM_RANGE(0xd000, 0xd000) AM_READ(soundlatch_r)         /* soundlatch_r */
	200	AM_RANGE(0xe000, 0xe000) AM_READ(soundlatch2_r)         /* engine sound volume */
222	201	AM_RANGE(0xf000, 0xf000) AM_WRITENOP               /* ??? */
223	202	ADDRESS_MAP_END
224	203
r4679	r4680
311	290
312	291	static void chqflag_ym2151_irq_w(const device_config *device, int data)
313	292	{
314		cpu_set_input_line(device->machine->cpu[1],INPUT_LINE_NMI,PULSE_LINE);
	293	cputag_set_input_line(device->machine, "audiocpu", INPUT_LINE_NMI, data ? ASSERT_LINE : CLEAR_LINE);
315	294	}
316	295
317	296
r4679	r4680
350	329
351	330	/* basic machine hardware */
352	331	MDRV_CPU_ADD("maincpu", KONAMI,XTAL_24MHz/8)   /* 052001 (verified on pcb) */
353		MDRV_CPU_PROGRAM_MAP(chqflag_readmem,chqflag_writemem)
	332	MDRV_CPU_PROGRAM_MAP(chqflag_map,0)
354	333	MDRV_CPU_VBLANK_INT_HACK(chqflag_interrupt,16)   /* ? */
355	334
356	335	MDRV_CPU_ADD("audiocpu", Z80, XTAL_3_579545MHz) /* verified on pcb */
357		MDRV_CPU_PROGRAM_MAP(chqflag_readmem_sound,chqflag_writemem_sound)
	336	MDRV_CPU_PROGRAM_MAP(chqflag_sound_map,0)
358	337
359	338	MDRV_QUANTUM_TIME(HZ(600))
360	339

src/mame/drivers/bwing.c

r4679	r4680
73	73	latch_data = sound_fifo[fftail];
74	74	fftail = (fftail + 1) & (MAX_SOUNDS - 1);
75	75	soundlatch_w(cpu_get_address_space(device, ADDRESS_SPACE_PROGRAM), 0, latch_data);
76		cpu_set_input_line(device->machine->cpu[2], DECO16_IRQ_LINE, HOLD_LINE); // SNDREQ
	76	cputag_set_input_line(device->machine, "audiocpu", DECO16_IRQ_LINE, HOLD_LINE); // SNDREQ
77	77	}
78	78	break;
79	79
r4679	r4680
98	98
99	99	static WRITE8_HANDLER( bwp12_sharedram1_w ) { bwp1_sharedram1[offset] = bwp2_sharedram1[offset] = data; }
100	100	static WRITE8_HANDLER( bwp3_u8F_w ) { bwp3_u8F_d = data; } // prepares custom chip for various operations
101		static WRITE8_HANDLER( bwp3_nmiack_w ) { cpu_set_input_line(space->machine->cpu[2], INPUT_LINE_NMI, CLEAR_LINE); }
	101	static WRITE8_HANDLER( bwp3_nmiack_w ) { cputag_set_input_line(space->machine, "audiocpu", INPUT_LINE_NMI, CLEAR_LINE); }
102	102	static WRITE8_HANDLER( bwp3_nmimask_w ) { bwp3_nmimask = data & 0x80; }
103	103
104	104
r4679	r4680
119	119	switch (offset)
120	120	{
121	121	// MSSTB
122		case 0: cpu_set_input_line(space->machine->cpu[1], M6809_IRQ_LINE, ASSERT_LINE); break;
	122	case 0: cputag_set_input_line(space->machine, "sub", M6809_IRQ_LINE, ASSERT_LINE); break;
123	123
124	124	// IRQACK
125		case 1: cpu_set_input_line(space->machine->cpu[0], M6809_IRQ_LINE, CLEAR_LINE); break;
	125	case 1: cputag_set_input_line(space->machine, "maincpu", M6809_IRQ_LINE, CLEAR_LINE); break;
126	126
127	127	// FIRQACK
128		case 2: cpu_set_input_line(space->machine->cpu[0], M6809_FIRQ_LINE, CLEAR_LINE); break;
	128	case 2: cputag_set_input_line(space->machine, "maincpu", M6809_FIRQ_LINE, CLEAR_LINE); break;
129	129
130	130	// NMIACK
131		case 3: cpu_set_input_line(space->machine->cpu[0], INPUT_LINE_NMI, CLEAR_LINE); break;
	131	case 3: cputag_set_input_line(space->machine, "maincpu", INPUT_LINE_NMI, CLEAR_LINE); break;
132	132
133	133	// SWAP(bank-swaps sprite RAM between 1800 & 1900; ignored bc. they're treated as a single chunk.)
134	134	case 4: break;
r4679	r4680
136	136	// SNDREQ
137	137	case 5:
138	138	if (data == 0x80) // protection trick to screw CPU1 & 3
139		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_NMI, ASSERT_LINE); // SNMI
	139	cputag_set_input_line(space->machine, "sub", INPUT_LINE_NMI, ASSERT_LINE); // SNMI
140	140	else
141	141	if (ffcount < MAX_SOUNDS)
142	142	{
r4679	r4680
163	163	{
164	164	switch (offset)
165	165	{
166		case 0: cpu_set_input_line(space->machine->cpu[0], M6809_IRQ_LINE, ASSERT_LINE); break; // SMSTB
	166	case 0: cputag_set_input_line(space->machine, "maincpu", M6809_IRQ_LINE, ASSERT_LINE); break; // SMSTB
167	167
168		case 1: cpu_set_input_line(space->machine->cpu[1], M6809_FIRQ_LINE, CLEAR_LINE); break;
	168	case 1: cputag_set_input_line(space->machine, "sub", M6809_FIRQ_LINE, CLEAR_LINE); break;
169	169
170		case 2: cpu_set_input_line(space->machine->cpu[1], M6809_IRQ_LINE, CLEAR_LINE); break;
	170	case 2: cputag_set_input_line(space->machine, "sub", M6809_IRQ_LINE, CLEAR_LINE); break;
171	171
172		case 3: cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_NMI, CLEAR_LINE); break;
	172	case 3: cputag_set_input_line(space->machine, "sub", INPUT_LINE_NMI, CLEAR_LINE); break;
173	173	}
174	174
175	175	#if BW_DEBUG
r4679	r4680
181	181	// CPU Memory Maps
182	182
183	183	// Main CPU
184		static ADDRESS_MAP_START( bwp1_readmem, ADDRESS_SPACE_PROGRAM, 8 )
	184	static ADDRESS_MAP_START( bwp1_map, ADDRESS_SPACE_PROGRAM, 8 )
185	185	AM_RANGE(0x1b00, 0x1b07) AM_READ(bwp1_io_r)
186		AM_RANGE(0x0000, 0x1fff) AM_READ(SMH_RAM)
187		AM_RANGE(0x2000, 0x3fff) AM_READ(bwing_scrollram_r)
188		AM_RANGE(0x4000, 0xffff) AM_READ(SMH_ROM)
	186	AM_RANGE(0x0000, 0x07ff) AM_RAM_WRITE(bwp12_sharedram1_w) AM_BASE(&bwp1_sharedram1)
	187	AM_RANGE(0x0800, 0x0fff) AM_RAM
	188	AM_RANGE(0x1000, 0x13ff) AM_RAM_WRITE(bwing_videoram_w) AM_BASE(&videoram)
	189	AM_RANGE(0x1400, 0x17ff) AM_RAM
	190	AM_RANGE(0x1800, 0x19ff) AM_RAM_WRITE(bwing_spriteram_w) AM_BASE(&buffered_spriteram)
	191	AM_RANGE(0x1a00, 0x1aff) AM_RAM_WRITE(bwing_paletteram_w) AM_BASE(&paletteram)
	192	AM_RANGE(0x1b00, 0x1b07) AM_RAM_WRITE(bwing_scrollreg_w)
	193	AM_RANGE(0x1c00, 0x1c07) AM_RAM_WRITE(bwp1_ctrl_w)
	194	AM_RANGE(0x2000, 0x3fff) AM_READWRITE(bwing_scrollram_r, bwing_scrollram_w)
	195	AM_RANGE(0x4000, 0xffff) AM_ROM // "B-Wings US" writes to 9631-9632(debug?)
189	196	ADDRESS_MAP_END
190	197
191		static ADDRESS_MAP_START( bwp1_writemem, ADDRESS_SPACE_PROGRAM, 8 )
192		AM_RANGE(0x0000, 0x07ff) AM_WRITE(bwp12_sharedram1_w) AM_BASE(&bwp1_sharedram1)
193		AM_RANGE(0x0800, 0x0fff) AM_WRITE(SMH_RAM)
194		AM_RANGE(0x1000, 0x13ff) AM_WRITE(bwing_videoram_w) AM_BASE(&videoram)
195		AM_RANGE(0x1800, 0x19ff) AM_WRITE(bwing_spriteram_w) AM_BASE(&buffered_spriteram)
196		AM_RANGE(0x1a00, 0x1aff) AM_WRITE(bwing_paletteram_w) AM_BASE(&paletteram)
197		AM_RANGE(0x1b00, 0x1b07) AM_WRITE(bwing_scrollreg_w)
198		AM_RANGE(0x1c00, 0x1c07) AM_WRITE(bwp1_ctrl_w)
199		AM_RANGE(0x2000, 0x3fff) AM_WRITE(bwing_scrollram_w)
200		AM_RANGE(0x1000, 0x1fff) AM_WRITE(SMH_RAM) // falls through
201		AM_RANGE(0x4000, 0xffff) AM_WRITENOP // "B-Wings US" writes to 9631-9632(debug?)
202		ADDRESS_MAP_END
203	198
204
205	199	// Sub CPU
206		static ADDRESS_MAP_START( bwp2_readmem, ADDRESS_SPACE_PROGRAM, 8 )
207		AM_RANGE(0x0000, 0x0fff) AM_READ(SMH_RAM)
208		AM_RANGE(0xa000, 0xffff) AM_READ(SMH_ROM)
209		ADDRESS_MAP_END
210
211		static ADDRESS_MAP_START( bwp2_writemem, ADDRESS_SPACE_PROGRAM, 8 )
212		AM_RANGE(0x0000, 0x07ff) AM_WRITE(bwp12_sharedram1_w) AM_BASE(&bwp2_sharedram1)
213		AM_RANGE(0x0800, 0x0fff) AM_WRITE(SMH_RAM)
	200	static ADDRESS_MAP_START( bwp2_map, ADDRESS_SPACE_PROGRAM, 8 )
	201	AM_RANGE(0x0000, 0x07ff) AM_RAM_WRITE(bwp12_sharedram1_w) AM_BASE(&bwp2_sharedram1)
	202	AM_RANGE(0x0800, 0x0fff) AM_RAM
214	203	AM_RANGE(0x1800, 0x1803) AM_WRITE(bwp2_ctrl_w)
215		AM_RANGE(0xa000, 0xffff) AM_WRITE(SMH_ROM)
	204	AM_RANGE(0xa000, 0xffff) AM_ROM
216	205	ADDRESS_MAP_END
217	206
218	207
219	208	// Sound CPU
220		static ADDRESS_MAP_START( bwp3_readmem, ADDRESS_SPACE_PROGRAM, 8 )
221		AM_RANGE(0x0000, 0x01ff) AM_READ(SMH_RAM)
222		AM_RANGE(0xa000, 0xa000) AM_READ(soundlatch_r)
223		AM_RANGE(0xe000, 0xffff) AM_READ(SMH_ROM)
224		ADDRESS_MAP_END
225
226		static ADDRESS_MAP_START( bwp3_writemem, ADDRESS_SPACE_PROGRAM, 8 )
227		AM_RANGE(0x0000, 0x01ff) AM_WRITE(SMH_RAM)
	209	static ADDRESS_MAP_START( bwp3_map, ADDRESS_SPACE_PROGRAM, 8 )
	210	AM_RANGE(0x0000, 0x01ff) AM_RAM
228	211	AM_RANGE(0x0200, 0x0200) AM_DEVWRITE("dac", dac_signed_w)
229	212	AM_RANGE(0x1000, 0x1000) AM_WRITE(bwp3_nmiack_w)
230	213	AM_RANGE(0x2000, 0x2000) AM_DEVWRITE("ay1", ay8910_data_w)
231	214	AM_RANGE(0x4000, 0x4000) AM_DEVWRITE("ay1", ay8910_address_w)
232	215	AM_RANGE(0x6000, 0x6000) AM_DEVWRITE("ay2", ay8910_data_w)
233	216	AM_RANGE(0x8000, 0x8000) AM_DEVWRITE("ay2", ay8910_address_w)
	217	AM_RANGE(0xa000, 0xa000) AM_READ(soundlatch_r)
234	218	AM_RANGE(0xd000, 0xd000) AM_WRITE(bwp3_nmimask_w)
235		AM_RANGE(0xe000, 0xffff) AM_WRITE(SMH_ROM) AM_BASE(&bwp3_rombase) AM_SIZE(&bwp3_romsize)
	219	AM_RANGE(0xe000, 0xffff) AM_ROM AM_BASE(&bwp3_rombase) AM_SIZE(&bwp3_romsize)
236	220	ADDRESS_MAP_END
237	221
238	222
r4679	r4680
387	371
388	372	// basic machine hardware
389	373	MDRV_CPU_ADD("maincpu", M6809, 2000000)
390		MDRV_CPU_PROGRAM_MAP(bwp1_readmem, bwp1_writemem)
	374	MDRV_CPU_PROGRAM_MAP(bwp1_map, 0)
391	375	MDRV_CPU_VBLANK_INT_HACK(bwp1_interrupt, 3)
392	376
393	377	MDRV_CPU_ADD("sub", M6809, 2000000)
394		MDRV_CPU_PROGRAM_MAP(bwp2_readmem, bwp2_writemem)
	378	MDRV_CPU_PROGRAM_MAP(bwp2_map, 0)
395	379	//  MDRV_CPU_VBLANK_INT("screen", irq1_line_assert) // vblank triggers FIRQ on CPU2 by design (unused)
396	380
397	381	MDRV_CPU_ADD("audiocpu", DECO16, 2000000)
398		MDRV_CPU_PROGRAM_MAP(bwp3_readmem, bwp3_writemem)
	382	MDRV_CPU_PROGRAM_MAP(bwp3_map, 0)
399	383	MDRV_CPU_IO_MAP(bwp3_io_map,0)
400	384	MDRV_CPU_PERIODIC_INT(bwp3_interrupt, 1000)
401	385
r4679	r4680
625	609
626	610	GAME( 1984, zaviga,       0, bwing, bwing, bwing, ROT90, "Data East Corporation", "Zaviga", 0 )
627	611	GAME( 1984, zavigaj, zaviga, bwing, bwing, bwing, ROT90, "Data East Corporation", "Zaviga (Japan)", 0 )
628

src/mame/drivers/srmp6.c

r4679	r4680
126	126
127	127	static VIDEO_START(srmp6)
128	128	{
129		tileram = auto_malloc(0x100000*16);
	129	tileram = auto_alloc_array(machine, UINT16, 0x100000*16/2);
130	130	memset(tileram,0x00,(0x100000*16));
131	131
132		dmaram = auto_malloc(0x100);
	132	dmaram = auto_alloc_array(machine, UINT16, 0x100/2);
133	133
134		sprram_old = auto_malloc(0x80000);
	134	sprram_old = auto_alloc_array(machine, UINT16, 0x80000/2);
135	135	memset(sprram_old, 0, 0x80000);
136	136
137	137	/* create the char set (gfx will then be updated dynamically from RAM) */
r4679	r4680
513	513	static ADDRESS_MAP_START( srmp6, ADDRESS_SPACE_PROGRAM, 16 )
514	514	AM_RANGE(0x000000, 0x0fffff) AM_ROM
515	515	AM_RANGE(0x200000, 0x23ffff) AM_RAM               // work RAM
516		AM_RANGE(0x600000, 0x7fffff) AM_READ(SMH_BANK1)      // banked ROM (used by ROM check)
	516	AM_RANGE(0x600000, 0x7fffff) AM_READ(SMH_BANK(1))      // banked ROM (used by ROM check)
517	517	AM_RANGE(0x800000, 0x9fffff) AM_ROM AM_REGION("user1", 0)
518	518
519	519	AM_RANGE(0x300000, 0x300005) AM_READWRITE(srmp6_inputs_r, srmp6_input_select_w)      // inputs

src/mame/drivers/sf.c

r4679	r4680
52	52	{
53	53	if (ACCESSING_BITS_0_7)
54	54	{
55		soundlatch_w(space,offset,data & 0xff);
56		cpu_set_input_line(space->machine->cpu[1],INPUT_LINE_NMI,PULSE_LINE);
	55	soundlatch_w(space, offset, data & 0xff);
	56	cputag_set_input_line(space->machine, "audiocpu", INPUT_LINE_NMI, PULSE_LINE);
57	57	}
58	58	}
59	59
r4679	r4680
191	191
192	192
193	193
194		static ADDRESS_MAP_START( readmem, ADDRESS_SPACE_PROGRAM, 16 )
195		AM_RANGE(0x000000, 0x04ffff) AM_READ(SMH_ROM)
196		AM_RANGE(0x800000, 0x800fff) AM_READ(SMH_RAM)
	194	static ADDRESS_MAP_START( sf_map, ADDRESS_SPACE_PROGRAM, 16 )
	195	AM_RANGE(0x000000, 0x04ffff) AM_ROM
	196	AM_RANGE(0x800000, 0x800fff) AM_RAM_WRITE(sf_videoram_w) AM_BASE(&sf_videoram) AM_SIZE(&videoram_size)
	197	AM_RANGE(0xb00000, 0xb007ff) AM_RAM_WRITE(paletteram16_xxxxRRRRGGGGBBBB_word_w) AM_BASE(&paletteram16)
197	198	AM_RANGE(0xc00000, 0xc00001) AM_READ_PORT("COINS")
198	199	AM_RANGE(0xc00002, 0xc00003) AM_READ_PORT("IN0")
199	200	AM_RANGE(0xc00004, 0xc00005) AM_READ(button1_r)
r4679	r4680
202	203	AM_RANGE(0xc0000a, 0xc0000b) AM_READ_PORT("DSW2")
203	204	AM_RANGE(0xc0000c, 0xc0000d) AM_READ_PORT("SYSTEM")
204	205	AM_RANGE(0xc0000e, 0xc0000f) AM_READ(dummy_r)
205		AM_RANGE(0xff8000, 0xffdfff) AM_READ(SMH_RAM)
206		AM_RANGE(0xffe000, 0xffffff) AM_READ(SMH_RAM)
	206	AM_RANGE(0xc00010, 0xc00011) AM_WRITE(sf_coin_w)
	207	AM_RANGE(0xc00014, 0xc00015) AM_WRITE(sf_fg_scroll_w)
	208	AM_RANGE(0xc00018, 0xc00019) AM_WRITE(sf_bg_scroll_w)
	209	AM_RANGE(0xc0001a, 0xc0001b) AM_WRITE(sf_gfxctrl_w)
	210	AM_RANGE(0xc0001c, 0xc0001d) AM_WRITE(soundcmd_w)
	211	AM_RANGE(0xc0001e, 0xc0001f) AM_WRITE(protection_w)
	212	AM_RANGE(0xff8000, 0xffdfff) AM_RAM
	213	AM_RANGE(0xffe000, 0xffffff) AM_RAM AM_BASE(&sf_objectram)
207	214	ADDRESS_MAP_END
208	215
209		static ADDRESS_MAP_START( readmemus, ADDRESS_SPACE_PROGRAM, 16 )
210		AM_RANGE(0x000000, 0x04ffff) AM_READ(SMH_ROM)
211		AM_RANGE(0x800000, 0x800fff) AM_READ(SMH_RAM)
	216	static ADDRESS_MAP_START( sfus_map, ADDRESS_SPACE_PROGRAM, 16 )
	217	AM_RANGE(0x000000, 0x04ffff) AM_ROM
	218	AM_RANGE(0x800000, 0x800fff) AM_RAM_WRITE(sf_videoram_w) AM_BASE(&sf_videoram) AM_SIZE(&videoram_size)
	219	AM_RANGE(0xb00000, 0xb007ff) AM_RAM_WRITE(paletteram16_xxxxRRRRGGGGBBBB_word_w) AM_BASE(&paletteram16)
212	220	AM_RANGE(0xc00000, 0xc00001) AM_READ_PORT("IN0")
213	221	AM_RANGE(0xc00002, 0xc00003) AM_READ_PORT("IN1")
214	222	AM_RANGE(0xc00004, 0xc00005) AM_READ(dummy_r)
r4679	r4680
217	225	AM_RANGE(0xc0000a, 0xc0000b) AM_READ_PORT("DSW2")
218	226	AM_RANGE(0xc0000c, 0xc0000d) AM_READ_PORT("SYSTEM")
219	227	AM_RANGE(0xc0000e, 0xc0000f) AM_READ(dummy_r)
220		AM_RANGE(0xff8000, 0xffdfff) AM_READ(SMH_RAM)
221		AM_RANGE(0xffe000, 0xffffff) AM_READ(SMH_RAM)
	228	AM_RANGE(0xc00010, 0xc00011) AM_WRITE(sf_coin_w)
	229	AM_RANGE(0xc00014, 0xc00015) AM_WRITE(sf_fg_scroll_w)
	230	AM_RANGE(0xc00018, 0xc00019) AM_WRITE(sf_bg_scroll_w)
	231	AM_RANGE(0xc0001a, 0xc0001b) AM_WRITE(sf_gfxctrl_w)
	232	AM_RANGE(0xc0001c, 0xc0001d) AM_WRITE(soundcmd_w)
	233	AM_RANGE(0xc0001e, 0xc0001f) AM_WRITE(protection_w)
	234	AM_RANGE(0xff8000, 0xffdfff) AM_RAM
	235	AM_RANGE(0xffe000, 0xffffff) AM_RAM AM_BASE(&sf_objectram)
222	236	ADDRESS_MAP_END
223	237
224		static ADDRESS_MAP_START( readmemjp, ADDRESS_SPACE_PROGRAM, 16 )
225		AM_RANGE(0x000000, 0x04ffff) AM_READ(SMH_ROM)
226		AM_RANGE(0x800000, 0x800fff) AM_READ(SMH_RAM)
	238	static ADDRESS_MAP_START( sfjp_map, ADDRESS_SPACE_PROGRAM, 16 )
	239	AM_RANGE(0x000000, 0x04ffff) AM_ROM
	240	AM_RANGE(0x800000, 0x800fff) AM_RAM_WRITE(sf_videoram_w) AM_BASE(&sf_videoram) AM_SIZE(&videoram_size)
	241	AM_RANGE(0xb00000, 0xb007ff) AM_RAM_WRITE(paletteram16_xxxxRRRRGGGGBBBB_word_w) AM_BASE(&paletteram16)
227	242	AM_RANGE(0xc00000, 0xc00001) AM_READ_PORT("COINS")
228	243	AM_RANGE(0xc00002, 0xc00003) AM_READ_PORT("P1")
229	244	AM_RANGE(0xc00004, 0xc00005) AM_READ_PORT("P2")
r4679	r4680
232	247	AM_RANGE(0xc0000a, 0xc0000b) AM_READ_PORT("DSW2")
233	248	AM_RANGE(0xc0000c, 0xc0000d) AM_READ_PORT("SYSTEM")
234	249	AM_RANGE(0xc0000e, 0xc0000f) AM_READ(dummy_r)
235		AM_RANGE(0xff8000, 0xffdfff) AM_READ(SMH_RAM)
236		AM_RANGE(0xffe000, 0xffffff) AM_READ(SMH_RAM)
237		ADDRESS_MAP_END
238
239		static ADDRESS_MAP_START( writemem, ADDRESS_SPACE_PROGRAM, 16 )
240		AM_RANGE(0x000000, 0x04ffff) AM_WRITE(SMH_ROM)
241		AM_RANGE(0x800000, 0x800fff) AM_WRITE(sf_videoram_w) AM_BASE(&sf_videoram) AM_SIZE(&videoram_size)
242		AM_RANGE(0xb00000, 0xb007ff) AM_WRITE(paletteram16_xxxxRRRRGGGGBBBB_word_w) AM_BASE(&paletteram16)
243	250	AM_RANGE(0xc00010, 0xc00011) AM_WRITE(sf_coin_w)
244	251	AM_RANGE(0xc00014, 0xc00015) AM_WRITE(sf_fg_scroll_w)
245	252	AM_RANGE(0xc00018, 0xc00019) AM_WRITE(sf_bg_scroll_w)
246	253	AM_RANGE(0xc0001a, 0xc0001b) AM_WRITE(sf_gfxctrl_w)
247	254	AM_RANGE(0xc0001c, 0xc0001d) AM_WRITE(soundcmd_w)
248	255	AM_RANGE(0xc0001e, 0xc0001f) AM_WRITE(protection_w)
249		AM_RANGE(0xff8000, 0xffdfff) AM_WRITE(SMH_RAM)
250		AM_RANGE(0xffe000, 0xffffff) AM_WRITE(SMH_RAM) AM_BASE(&sf_objectram)
	256	AM_RANGE(0xff8000, 0xffdfff) AM_RAM
	257	AM_RANGE(0xffe000, 0xffffff) AM_RAM AM_BASE(&sf_objectram)
251	258	ADDRESS_MAP_END
252	259
253		static ADDRESS_MAP_START( sound_readmem, ADDRESS_SPACE_PROGRAM, 8 )
254		AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM)
255		AM_RANGE(0xc000, 0xc7ff) AM_READ(SMH_RAM)
	260	static ADDRESS_MAP_START( sound_map, ADDRESS_SPACE_PROGRAM, 8 )
	261	AM_RANGE(0x0000, 0x7fff) AM_ROM
	262	AM_RANGE(0xc000, 0xc7ff) AM_RAM
256	263	AM_RANGE(0xc800, 0xc800) AM_READ(soundlatch_r)
257		AM_RANGE(0xe000, 0xe001) AM_DEVREAD("ym", ym2151_r)
	264	AM_RANGE(0xe000, 0xe001) AM_DEVREADWRITE("ym", ym2151_r,ym2151_w)
258	265	ADDRESS_MAP_END
259	266
260		static ADDRESS_MAP_START( sound_writemem, ADDRESS_SPACE_PROGRAM, 8 )
261		AM_RANGE(0x0000, 0x7fff) AM_WRITE(SMH_ROM)
262		AM_RANGE(0xc000, 0xc7ff) AM_WRITE(SMH_RAM)
263		AM_RANGE(0xe000, 0xe001) AM_DEVWRITE("ym", ym2151_w)
264		ADDRESS_MAP_END
265
266
267		static ADDRESS_MAP_START( sound2_readmem, ADDRESS_SPACE_PROGRAM, 8 )
268		AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM)
269		AM_RANGE(0x8000, 0xffff) AM_READ(SMH_BANK1)
270		ADDRESS_MAP_END
271
272	267	/* Yes, _no_ ram */
273		static ADDRESS_MAP_START( sound2_writemem, ADDRESS_SPACE_PROGRAM, 8 )
274		/*  AM_RANGE(0x0000, 0xffff) AM_WRITE(SMH_ROM) avoid cluttering up error.log */
275		AM_RANGE(0x0000, 0xffff) AM_WRITENOP
	268	static ADDRESS_MAP_START( sound2_map, ADDRESS_SPACE_PROGRAM, 8 )
	269	AM_RANGE(0x0000, 0x7fff) AM_ROM
	270	AM_RANGE(0x8000, 0xffff) AM_ROMBANK(1)
	271	AM_RANGE(0x0000, 0xffff) AM_WRITENOP /* avoid cluttering up error.log */
276	272	ADDRESS_MAP_END
277	273
278	274	static ADDRESS_MAP_START( sound2_io_map, ADDRESS_SPACE_IO, 8 )
r4679	r4680
795	791
796	792	static void irq_handler(const device_config *device, int irq)
797	793	{
798		cpu_set_input_line(device->machine->cpu[1],0,irq ? ASSERT_LINE : CLEAR_LINE);
	794	cputag_set_input_line(device->machine, "audiocpu", 0, irq ? ASSERT_LINE : CLEAR_LINE);
799	795	}
800	796
801	797	static const ym2151_interface ym2151_config =
r4679	r4680
813	809
814	810	/* basic machine hardware */
815	811	MDRV_CPU_ADD("maincpu", M68000, 8000000)   /* 8 MHz ? (xtal is 16MHz) */
816		MDRV_CPU_PROGRAM_MAP(readmem,writemem)
	812	MDRV_CPU_PROGRAM_MAP(sf_map,0)
817	813	MDRV_CPU_VBLANK_INT("screen", irq1_line_hold)
818	814
819	815	MDRV_CPU_ADD("audiocpu", Z80, 3579545)   /* ? xtal is 3.579545MHz */
820		MDRV_CPU_PROGRAM_MAP(sound_readmem,sound_writemem)
	816	MDRV_CPU_PROGRAM_MAP(sound_map,0)
821	817	/* NMIs are caused by the main CPU */
822	818
823	819	MDRV_CPU_ADD("audio2", Z80, 3579545)   /* ? xtal is 3.579545MHz */
824		MDRV_CPU_PROGRAM_MAP(sound2_readmem,sound2_writemem)
	820	MDRV_CPU_PROGRAM_MAP(sound2_map,0)
825	821	MDRV_CPU_IO_MAP(sound2_io_map,0)
826	822	MDRV_CPU_PERIODIC_INT(irq0_line_hold,8000)
827	823
r4679	r4680
864	860	/* basic machine hardware */
865	861	MDRV_IMPORT_FROM(sf)
866	862	MDRV_CPU_MODIFY("maincpu")
867		MDRV_CPU_PROGRAM_MAP(readmemus,writemem)
	863	MDRV_CPU_PROGRAM_MAP(sfus_map,0)
868	864	MACHINE_DRIVER_END
869	865
870	866
r4679	r4680
873	869	/* basic machine hardware */
874	870	MDRV_IMPORT_FROM(sf)
875	871	MDRV_CPU_MODIFY("maincpu")
876		MDRV_CPU_PROGRAM_MAP(readmemjp,writemem)
	872	MDRV_CPU_PROGRAM_MAP(sfjp_map,0)
877	873	MACHINE_DRIVER_END
878	874
879	875
r4679	r4680
1030	1026	ROM_LOAD( "sf-00.bin", 0x00000, 0x20000, CRC(4b733845) SHA1(f7ff46e02f8ce6682d6e573588271bae2edfa90f) )
1031	1027	ROM_LOAD( "sf-01.bin", 0x20000, 0x20000, CRC(86e0f0d5) SHA1(7cef8056f83dac15f1b47d7be705d26170858337) )
1032	1028
	1029	ROM_REGION( 0x0800, "mcu", 0 ) /* 68705 MCU */
	1030	ROM_LOAD( "68705.bin",   0x0000, 0x0800, NO_DUMP )
	1031
1033	1032	ROM_REGION( 0x080000, "gfx1", ROMREGION_DISPOSE )
1034	1033	ROM_LOAD( "sf-39.bin", 0x000000, 0x020000, CRC(cee3d292) SHA1(a8c22f1dc81976e8dd5d6c70361c61fa3f9f89d6) ) /* Background b planes 0-1*/
1035	1034	ROM_LOAD( "sf-38.bin", 0x020000, 0x020000, CRC(2ea99676) SHA1(5f3eb77e75f0ee27fb8fc7bab2819b3fdd480206) )
r4679	r4680
1141	1140	GAME( 1987, sfus, sf, sfus, sfus, 0, ROT0, "Capcom", "Street Fighter (US)", 0 )
1142	1141	GAME( 1987, sfjp, sf, sfjp, sfjp, 0, ROT0, "Capcom", "Street Fighter (Japan)", 0 )
1143	1142	GAME( 1987, sfp,  sf, sfp,  sf,   0, ROT0, "Capcom", "Street Fighter (prototype)", 0 )
1144

src/mame/drivers/lsasquad.c

r4679	r4680
168	168	/* other bits unknown */
169	169	}
170	170
171		static ADDRESS_MAP_START( readmem, ADDRESS_SPACE_PROGRAM, 8 )
172		AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM)
173		AM_RANGE(0x8000, 0x9fff) AM_READ(SMH_BANK1)
174		AM_RANGE(0xa000, 0xe5ff) AM_READ(SMH_RAM)
	171	static ADDRESS_MAP_START( lsasquad_map, ADDRESS_SPACE_PROGRAM, 8 )
	172	AM_RANGE(0x0000, 0x7fff) AM_ROM
	173	AM_RANGE(0x8000, 0x9fff) AM_ROMBANK(1)
	174	AM_RANGE(0xa000, 0xbfff) AM_RAM   /* SRAM */
	175	AM_RANGE(0xc000, 0xdfff) AM_RAM AM_BASE(&videoram) AM_SIZE(&videoram_size)   /* SCREEN RAM */
	176	AM_RANGE(0xe000, 0xe3ff) AM_RAM AM_BASE(&lsasquad_scrollram)   /* SCROLL RAM */
	177	AM_RANGE(0xe400, 0xe5ff) AM_RAM AM_BASE(&spriteram) AM_SIZE(&spriteram_size)   /* OBJECT RAM */
175	178	AM_RANGE(0xe800, 0xe800) AM_READ_PORT("DSWA")
176	179	AM_RANGE(0xe801, 0xe801) AM_READ_PORT("DSWB")
177	180	AM_RANGE(0xe802, 0xe802) AM_READ_PORT("DSWC")
r4679	r4680
180	183	AM_RANGE(0xe805, 0xe805) AM_READ_PORT("P2")
181	184	AM_RANGE(0xe806, 0xe806) AM_READ_PORT("START")
182	185	AM_RANGE(0xe807, 0xe807) AM_READ_PORT("SERVICE")
183		AM_RANGE(0xec00, 0xec00) AM_READ(lsasquad_sound_result_r)
	186	AM_RANGE(0xea00, 0xea00) AM_WRITE(lsasquad_bankswitch_w)
	187	AM_RANGE(0xec00, 0xec00) AM_READWRITE(lsasquad_sound_result_r,lsasquad_sound_command_w)
184	188	AM_RANGE(0xec01, 0xec01) AM_READ(lsasquad_sound_status_r)
185		AM_RANGE(0xee00, 0xee00) AM_READ(lsasquad_mcu_r)
	189	AM_RANGE(0xee00, 0xee00) AM_READWRITE(lsasquad_mcu_r,lsasquad_mcu_w)
186	190	ADDRESS_MAP_END
187	191
188		static ADDRESS_MAP_START( writemem, ADDRESS_SPACE_PROGRAM, 8 )
189		AM_RANGE(0x0000, 0x9fff) AM_WRITE(SMH_ROM)
190		AM_RANGE(0xa000, 0xbfff) AM_WRITE(SMH_RAM)   /* SRAM */
191		AM_RANGE(0xc000, 0xdfff) AM_WRITE(SMH_RAM) AM_BASE(&videoram) AM_SIZE(&videoram_size)   /* SCREEN RAM */
192		AM_RANGE(0xe000, 0xe3ff) AM_WRITE(SMH_RAM) AM_BASE(&lsasquad_scrollram)   /* SCROLL RAM */
193		AM_RANGE(0xe400, 0xe5ff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram) AM_SIZE(&spriteram_size)   /* OBJECT RAM */
194		AM_RANGE(0xea00, 0xea00) AM_WRITE(lsasquad_bankswitch_w)
195		AM_RANGE(0xec00, 0xec00) AM_WRITE(lsasquad_sound_command_w)
196		AM_RANGE(0xee00, 0xee00) AM_WRITE(lsasquad_mcu_w)
197		ADDRESS_MAP_END
198
199		static ADDRESS_MAP_START( sound_readmem, ADDRESS_SPACE_PROGRAM, 8 )
200		AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM)
201		AM_RANGE(0x8000, 0x87ff) AM_READ(SMH_RAM)
202		AM_RANGE(0xa000, 0xa001) AM_DEVREAD("ym", ym2203_r)
203		AM_RANGE(0xd000, 0xd000) AM_READ(lsasquad_sh_sound_command_r)
204		AM_RANGE(0xd800, 0xd800) AM_READ(lsasquad_sound_status_r)
205		AM_RANGE(0xe000, 0xefff) AM_READ(SMH_ROM)   /* space for diagnostic ROM? */
206		ADDRESS_MAP_END
207
208		static ADDRESS_MAP_START( sound_writemem, ADDRESS_SPACE_PROGRAM, 8 )
209		AM_RANGE(0x0000, 0x7fff) AM_WRITE(SMH_ROM)
210		AM_RANGE(0x8000, 0x87ff) AM_WRITE(SMH_RAM)
211		AM_RANGE(0xa000, 0xa001) AM_DEVWRITE("ym", ym2203_w)
	192	static ADDRESS_MAP_START( lsasquad_sound_map, ADDRESS_SPACE_PROGRAM, 8 )
	193	AM_RANGE(0x0000, 0x7fff) AM_ROM
	194	AM_RANGE(0x8000, 0x87ff) AM_RAM
	195	AM_RANGE(0xa000, 0xa001) AM_DEVREADWRITE("ym", ym2203_r,ym2203_w)
212	196	AM_RANGE(0xc000, 0xc001) AM_DEVWRITE("ay", ay8910_address_data_w)
213		AM_RANGE(0xd000, 0xd000) AM_WRITE(lsasquad_sh_result_w)
	197	AM_RANGE(0xd000, 0xd000) AM_READWRITE(lsasquad_sh_sound_command_r,lsasquad_sh_result_w)
214	198	AM_RANGE(0xd400, 0xd400) AM_WRITE(lsasquad_sh_nmi_disable_w)
215	199	AM_RANGE(0xd800, 0xd800) AM_WRITE(lsasquad_sh_nmi_enable_w)
216		AM_RANGE(0xe000, 0xefff) AM_WRITE(SMH_ROM)   /* space for diagnostic ROM? */
	200	AM_RANGE(0xd800, 0xd800) AM_READ(lsasquad_sound_status_r)
	201	AM_RANGE(0xe000, 0xefff) AM_ROM      /* space for diagnostic ROM? */
217	202	ADDRESS_MAP_END
218	203
219		static ADDRESS_MAP_START( m68705_readmem, ADDRESS_SPACE_PROGRAM, 8 )
	204	static ADDRESS_MAP_START( lsasquad_m68705_map, ADDRESS_SPACE_PROGRAM, 8 )
220	205	ADDRESS_MAP_GLOBAL_MASK(0x7ff)
221		AM_RANGE(0x0000, 0x0000) AM_READ(lsasquad_68705_portA_r)
222		AM_RANGE(0x0001, 0x0001) AM_READ(lsasquad_68705_portB_r)
	206	AM_RANGE(0x0000, 0x0000) AM_READWRITE(lsasquad_68705_portA_r,lsasquad_68705_portA_w)
	207	AM_RANGE(0x0001, 0x0001) AM_READWRITE(lsasquad_68705_portB_r,lsasquad_68705_portB_w)
223	208	AM_RANGE(0x0002, 0x0002) AM_READ(lsasquad_mcu_status_r)
224		AM_RANGE(0x0010, 0x007f) AM_READ(SMH_RAM)
225		AM_RANGE(0x0080, 0x07ff) AM_READ(SMH_ROM)
226		ADDRESS_MAP_END
227
228		static ADDRESS_MAP_START( m68705_writemem, ADDRESS_SPACE_PROGRAM, 8 )
229		ADDRESS_MAP_GLOBAL_MASK(0x7ff)
230		AM_RANGE(0x0000, 0x0000) AM_WRITE(lsasquad_68705_portA_w)
231		AM_RANGE(0x0001, 0x0001) AM_WRITE(lsasquad_68705_portB_w)
232	209	AM_RANGE(0x0004, 0x0004) AM_WRITE(lsasquad_68705_ddrA_w)
233	210	AM_RANGE(0x0005, 0x0005) AM_WRITE(lsasquad_68705_ddrB_w)
234		AM_RANGE(0x0010, 0x007f) AM_WRITE(SMH_RAM)
235		AM_RANGE(0x0080, 0x07ff) AM_WRITE(SMH_ROM)
	211	AM_RANGE(0x0010, 0x007f) AM_RAM
	212	AM_RANGE(0x0080, 0x07ff) AM_ROM
236	213	ADDRESS_MAP_END
237	214
238	215
239
240	216	static INPUT_PORTS_START( lsasquad )
241	217	PORT_START("DSWA")
242	218	PORT_DIPNAME( 0x01, 0x00, DEF_STR( Cabinet ) )
r4679	r4680
362	338
363	339	/* DAIKAIJU */
364	340
365		static ADDRESS_MAP_START( mem_daikaiju, ADDRESS_SPACE_PROGRAM, 8 )
	341	static ADDRESS_MAP_START( daikaiju_map, ADDRESS_SPACE_PROGRAM, 8 )
366	342	AM_RANGE(0x0000, 0x7fff) AM_ROM
367		AM_RANGE(0x8000, 0x9fff) AM_READ(SMH_BANK1)
	343	AM_RANGE(0x8000, 0x9fff) AM_READ(SMH_BANK(1))
368	344	AM_RANGE(0xa000, 0xbfff) AM_RAM   /* SRAM */
369	345	AM_RANGE(0xc000, 0xdfff) AM_RAM AM_BASE(&videoram) AM_SIZE(&videoram_size)   /* SCREEN RAM */
370	346	AM_RANGE(0xe000, 0xe3ff) AM_RAM AM_BASE(&lsasquad_scrollram)   /* SCROLL RAM */
r4679	r4680
382	358	AM_RANGE(0xee00, 0xee00) AM_READWRITE(daikaiju_mcu_r, daikaiju_mcu_w)
383	359	ADDRESS_MAP_END
384	360
385		static ADDRESS_MAP_START( sound_mem_daikaiju, ADDRESS_SPACE_PROGRAM, 8 )
	361	static ADDRESS_MAP_START( daikaiju_sound_map, ADDRESS_SPACE_PROGRAM, 8 )
386	362	AM_RANGE(0x0000, 0x7fff) AM_ROM
387	363	AM_RANGE(0x8000, 0x87ff) AM_RAM
388	364	AM_RANGE(0xa000, 0xa001) AM_DEVREADWRITE("ym", ym2203_r, ym2203_w)
r4679	r4680
529	505
530	506	static void irqhandler(const device_config *device, int irq)
531	507	{
532		cpu_set_input_line(device->machine->cpu[1],0,irq ? ASSERT_LINE : CLEAR_LINE);
	508	cputag_set_input_line(device->machine, "audiocpu", 0, irq ? ASSERT_LINE : CLEAR_LINE);
533	509	}
534	510
535	511	static WRITE8_DEVICE_HANDLER( unk )
r4679	r4680
556	532
557	533	/* basic machine hardware */
558	534	MDRV_CPU_ADD("maincpu", Z80, 6000000)   /* 6 MHz? */
559		MDRV_CPU_PROGRAM_MAP(readmem,writemem)
	535	MDRV_CPU_PROGRAM_MAP(lsasquad_map,0)
560	536	MDRV_CPU_VBLANK_INT("screen", irq0_line_hold)
561	537
562	538	MDRV_CPU_ADD("audiocpu", Z80, 4000000)   /* 4 MHz? */
563		MDRV_CPU_PROGRAM_MAP(sound_readmem,sound_writemem)
	539	MDRV_CPU_PROGRAM_MAP(lsasquad_sound_map,0)
564	540	/* IRQs are triggered by the YM2203 */
565	541	MDRV_CPU_ADD("mcu", M68705,4000000)   /* ? */
566		MDRV_CPU_PROGRAM_MAP(m68705_readmem,m68705_writemem)
	542	MDRV_CPU_PROGRAM_MAP(lsasquad_m68705_map,0)
567	543
568	544	MDRV_QUANTUM_TIME(HZ(30000))   /* 500 CPU slices per frame - an high value to ensure proper */
569	545	/* synchronization of the CPUs */
r4679	r4680
601	577
602	578	/* basic machine hardware */
603	579	MDRV_CPU_ADD("maincpu", Z80, 6000000)
604		MDRV_CPU_PROGRAM_MAP(mem_daikaiju, 0)
	580	MDRV_CPU_PROGRAM_MAP(daikaiju_map, 0)
605	581	MDRV_CPU_VBLANK_INT("screen", irq0_line_hold)
606	582
607	583	MDRV_CPU_ADD("audiocpu", Z80, 3000000)
608		MDRV_CPU_PROGRAM_MAP(sound_mem_daikaiju, 0)
	584	MDRV_CPU_PROGRAM_MAP(daikaiju_sound_map, 0)
609	585	/* IRQs are triggered by the YM2203 */
610	586
611	587	MDRV_QUANTUM_TIME(HZ(30000))   /* 500 CPU slices per frame - an high value to ensure proper */

src/mame/drivers/konamim2.c

r4679	r4680
318	318	if (data & 0x800000)
319	319	{
320	320	mame_printf_debug("CPU '%s': CPU1 IRQ at %08X\n", space->cpu->tag, cpu_get_pc(space->cpu));
321		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_IRQ0, ASSERT_LINE);
	321	cputag_set_input_line(space->machine, "sub", INPUT_LINE_IRQ0, ASSERT_LINE);
322	322	}
323	323
324	324	unk20004 = (UINT32)(data);
r4679	r4680
413	413	{
414	414	if (data & U64(0x100000000))
415	415	{
416		cpu_set_input_line(space->machine->cpu[0], INPUT_LINE_RESET, PULSE_LINE);
	416	cputag_set_input_line(space->machine, "maincpu", INPUT_LINE_RESET, PULSE_LINE);
417	417	unk3 = 0;
418	418	}
419	419	}
r4679	r4680
1075	1075
1076	1076	if (ACCESSING_BITS_32_63)
1077	1077	{
1078		r = (UINT64)((space->cpu != space->machine->cpu[0]) ? 0x80000000 : 0);
	1078	r = (UINT64)((space->cpu != cputag_get_cpu(space->machine, "maincpu")) ? 0x80000000 : 0);
1079	1079	//r |= 0x40000000;  // sets Video-LowRes !?
1080	1080	return r << 32;
1081	1081	}

src/mame/drivers/cball.c

r4679	r4680
56	56	{
57	57	int scanline = param;
58	58
59		generic_pulse_irq_line(machine->cpu[0], 0);
	59	generic_pulse_irq_line(cputag_get_cpu(machine, "maincpu"), 0);
60	60
61	61	scanline = scanline + 32;
62	62

src/mame/drivers/cave.c

r4679	r4680
99	99	static void update_irq_state(running_machine *machine)
100	100	{
101	101	if (vblank_irq || sound_irq || unknown_irq)
102		cpu_set_input_line(machine->cpu[0], irq_level, ASSERT_LINE);
	102	cputag_set_input_line(machine, "maincpu", irq_level, ASSERT_LINE);
103	103	else
104		cpu_set_input_line(machine->cpu[0], irq_level, CLEAR_LINE);
	104	cputag_set_input_line(machine, "maincpu", irq_level, CLEAR_LINE);
105	105	}
106	106
107	107	static TIMER_CALLBACK( cave_vblank_start )
r4679	r4680
223	223	//  sound_flag1 = 1;
224	224	//  sound_flag2 = 1;
225	225	soundlatch_word_w(space,offset,data,mem_mask);
226		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_NMI, PULSE_LINE);
	226	cputag_set_input_line(space->machine, "audiocpu", INPUT_LINE_NMI, PULSE_LINE);
227	227	cpu_spinuntil_time(space->cpu, ATTOTIME_IN_USEC(50));   // Allow the other cpu to reply
228	228	}
229	229
r4679	r4680
462	462	Dangun Feveron
463	463	***************************************************************************/
464	464
465		static ADDRESS_MAP_START( dfeveron_readmem, ADDRESS_SPACE_PROGRAM, 16 )
466		AM_RANGE(0x000000, 0x0fffff) AM_READ(SMH_ROM            )   // ROM
467		AM_RANGE(0x100000, 0x10ffff) AM_READ(SMH_RAM            )   // RAM
468		AM_RANGE(0x300000, 0x300003) AM_DEVREAD8("ymz", ymz280b_r, 0x00ff)   // YMZ280
469		/**/AM_RANGE(0x400000, 0x407fff) AM_READ(SMH_RAM            )   // Sprites
470		/**/AM_RANGE(0x408000, 0x40ffff) AM_READ(SMH_RAM            )   // Sprites?
471		/**/AM_RANGE(0x500000, 0x507fff) AM_READ(SMH_RAM            )   // Layer 0
472		/**/AM_RANGE(0x600000, 0x607fff) AM_READ(SMH_RAM            )   // Layer 1
473		/**/AM_RANGE(0x708000, 0x708fff) AM_READ(SMH_RAM            )   // Palette
474		/**/AM_RANGE(0x710000, 0x710fff) AM_READ(SMH_RAM            )   // ?
475		AM_RANGE(0x800000, 0x800007) AM_READ(cave_irq_cause_r      )   // IRQ Cause
476		/**/AM_RANGE(0x900000, 0x900005) AM_READ(SMH_RAM            )   // Layer 0 Control
477		/**/AM_RANGE(0xa00000, 0xa00005) AM_READ(SMH_RAM            )   // Layer 1 Control
478		AM_RANGE(0xb00000, 0xb00001) AM_READ_PORT("IN0"            )   // Inputs
479		AM_RANGE(0xb00002, 0xb00003) AM_READ_PORT("IN1"            )   // Inputs + EEPROM
	465	static ADDRESS_MAP_START( dfeveron_map, ADDRESS_SPACE_PROGRAM, 16 )
	466	AM_RANGE(0x000000, 0x0fffff) AM_ROM                                             // ROM
	467	AM_RANGE(0x100000, 0x10ffff) AM_RAM                                             // RAM
	468	AM_RANGE(0x300000, 0x300003) AM_DEVREADWRITE8("ymz", ymz280b_r, ymz280b_w, 0x00ff)         // YMZ280
	469	/**/AM_RANGE(0x400000, 0x407fff) AM_RAM AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)         // Sprites
	470	/**/AM_RANGE(0x408000, 0x40ffff) AM_RAM AM_BASE(&cave_spriteram16_2)                     // Sprites?
	471	/**/AM_RANGE(0x500000, 0x507fff) AM_RAM_WRITE(cave_vram_0_w) AM_BASE(&cave_vram_0)            // Layer 0
	472	/**/AM_RANGE(0x600000, 0x607fff) AM_RAM_WRITE(cave_vram_1_w) AM_BASE(&cave_vram_1)            // Layer 1
	473	/**/AM_RANGE(0x708000, 0x708fff) AM_RAM AM_BASE(&paletteram16) AM_SIZE(&cave_paletteram_size)   // Palette
	474	/**/AM_RANGE(0x710000, 0x710bff) AM_READ(SMH_RAM)                                    // ?
	475	AM_RANGE(0x710c00, 0x710fff) AM_RAM                                             // ?
	476	AM_RANGE(0x800000, 0x800007) AM_READ(cave_irq_cause_r)                              // IRQ Cause
	477	AM_RANGE(0x800000, 0x80007f) AM_WRITE(SMH_RAM) AM_BASE(&cave_videoregs)                  // Video Regs
	478	/**/AM_RANGE(0x900000, 0x900005) AM_RAM AM_BASE(&cave_vctrl_0)                           // Layer 0 Control
	479	/**/AM_RANGE(0xa00000, 0xa00005) AM_RAM AM_BASE(&cave_vctrl_1)                           // Layer 1 Control
	480	AM_RANGE(0xb00000, 0xb00001) AM_READ_PORT("IN0")                                 // Inputs
	481	AM_RANGE(0xb00002, 0xb00003) AM_READ_PORT("IN1")                                 // Inputs + EEPROM
	482	AM_RANGE(0xc00000, 0xc00001) AM_WRITE(cave_eeprom_msb_w)                           // EEPROM
480	483	ADDRESS_MAP_END
481	484
482		static ADDRESS_MAP_START( dfeveron_writemem, ADDRESS_SPACE_PROGRAM, 16 )
483		AM_RANGE(0x000000, 0x0fffff) AM_WRITE(SMH_ROM                  )   // ROM
484		AM_RANGE(0x100000, 0x10ffff) AM_WRITE(SMH_RAM                  )   // RAM
485		AM_RANGE(0x300000, 0x300003) AM_DEVWRITE8("ymz", ymz280b_w, 0x00ff)   // YMZ280
486		AM_RANGE(0x400000, 0x407fff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)   // Sprites
487		AM_RANGE(0x408000, 0x40ffff) AM_WRITE(SMH_RAM) AM_BASE(&cave_spriteram16_2)
488		AM_RANGE(0x500000, 0x507fff) AM_WRITE(cave_vram_0_w) AM_BASE(&cave_vram_0   )   // Layer 0
489		AM_RANGE(0x600000, 0x607fff) AM_WRITE(cave_vram_1_w) AM_BASE(&cave_vram_1   )   // Layer 1
490		AM_RANGE(0x708000, 0x708fff) AM_WRITE(SMH_RAM) AM_BASE(&paletteram16) AM_SIZE(&cave_paletteram_size)   // Palette
491		AM_RANGE(0x710c00, 0x710fff) AM_WRITE(SMH_RAM                        )   // ?
492		AM_RANGE(0x800000, 0x80007f) AM_WRITE(SMH_RAM) AM_BASE(&cave_videoregs      )   // Video Regs
493		AM_RANGE(0x900000, 0x900005) AM_WRITE(SMH_RAM) AM_BASE(&cave_vctrl_0      )   // Layer 0 Control
494		AM_RANGE(0xa00000, 0xa00005) AM_WRITE(SMH_RAM) AM_BASE(&cave_vctrl_1      )   // Layer 1 Control
495		AM_RANGE(0xc00000, 0xc00001) AM_WRITE(cave_eeprom_msb_w                  )   // EEPROM
496		ADDRESS_MAP_END
497	485
498
499	486	/***************************************************************************
500	487	Dodonpachi
501	488	***************************************************************************/
502	489
503		static ADDRESS_MAP_START( ddonpach_readmem, ADDRESS_SPACE_PROGRAM, 16 )
504		AM_RANGE(0x000000, 0x0fffff) AM_READ(SMH_ROM            )   // ROM
505		AM_RANGE(0x100000, 0x10ffff) AM_READ(SMH_RAM            )   // RAM
506		AM_RANGE(0x300000, 0x300003) AM_DEVREAD8("ymz", ymz280b_r, 0x00ff)   // YMZ280
507		/**/AM_RANGE(0x400000, 0x407fff) AM_READ(SMH_RAM            )   // Sprites
508		/**/AM_RANGE(0x408000, 0x40ffff) AM_READ(SMH_RAM            )   // Sprites?
509		/**/AM_RANGE(0x500000, 0x507fff) AM_READ(SMH_RAM            )   // Layer 0
510		/**/AM_RANGE(0x600000, 0x607fff) AM_READ(SMH_RAM            )   // Layer 1
511		/**/AM_RANGE(0x700000, 0x70ffff) AM_READ(SMH_RAM            )   // Layer 2
512		AM_RANGE(0x800000, 0x800007) AM_READ(cave_irq_cause_r      )   // IRQ Cause
513		/**/AM_RANGE(0x900000, 0x900005) AM_READ(SMH_RAM            )   // Layer 0 Control
514		/**/AM_RANGE(0xa00000, 0xa00005) AM_READ(SMH_RAM            )   // Layer 1 Control
515		/**/AM_RANGE(0xb00000, 0xb00005) AM_READ(SMH_RAM            )   // Layer 2 Control
516		/**/AM_RANGE(0xc00000, 0xc0ffff) AM_READ(SMH_RAM            )   // Palette
517		AM_RANGE(0xd00000, 0xd00001) AM_READ_PORT("IN0"            )   // Inputs
518		AM_RANGE(0xd00002, 0xd00003) AM_READ_PORT("IN1"            )   // Inputs + EEPROM
	490	static ADDRESS_MAP_START( ddonpach_map, ADDRESS_SPACE_PROGRAM, 16 )
	491	AM_RANGE(0x000000, 0x0fffff) AM_ROM                                             // ROM
	492	AM_RANGE(0x100000, 0x10ffff) AM_RAM                                             // RAM
	493	AM_RANGE(0x300000, 0x300003) AM_DEVREADWRITE8("ymz", ymz280b_r, ymz280b_w, 0x00ff)         // YMZ280
	494	/**/AM_RANGE(0x400000, 0x407fff) AM_RAM AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)         // Sprites
	495	/**/AM_RANGE(0x408000, 0x40ffff) AM_RAM AM_BASE(&cave_spriteram16_2)                     // Sprites?
	496	/**/AM_RANGE(0x500000, 0x507fff) AM_RAM_WRITE(cave_vram_0_w) AM_BASE(&cave_vram_0)            // Layer 0
	497	/**/AM_RANGE(0x600000, 0x607fff) AM_RAM_WRITE(cave_vram_1_w) AM_BASE(&cave_vram_1)            // Layer 1
	498	/**/AM_RANGE(0x700000, 0x70ffff) AM_RAM_WRITE(cave_vram_2_8x8_w) AM_BASE(&cave_vram_2)         // Layer 2
	499	AM_RANGE(0x800000, 0x800007) AM_READ(cave_irq_cause_r)                              // IRQ Cause
	500	AM_RANGE(0x800000, 0x80007f) AM_WRITE(SMH_RAM) AM_BASE(&cave_videoregs)                  // Video Regs
	501	/**/AM_RANGE(0x900000, 0x900005) AM_RAM AM_BASE(&cave_vctrl_0)                           // Layer 0 Control
	502	/**/AM_RANGE(0xa00000, 0xa00005) AM_RAM AM_BASE(&cave_vctrl_1)                           // Layer 1 Control
	503	/**/AM_RANGE(0xb00000, 0xb00005) AM_RAM AM_BASE(&cave_vctrl_2)                           // Layer 2 Control
	504	/**/AM_RANGE(0xc00000, 0xc0ffff) AM_RAM AM_BASE(&paletteram16) AM_SIZE(&cave_paletteram_size)   // Palette
	505	AM_RANGE(0xd00000, 0xd00001) AM_READ_PORT("IN0"            )                        // Inputs
	506	AM_RANGE(0xd00002, 0xd00003) AM_READ_PORT("IN1"            )                        // Inputs + EEPROM
	507	AM_RANGE(0xe00000, 0xe00001) AM_WRITE(cave_eeprom_msb_w)                           // EEPROM
519	508	ADDRESS_MAP_END
520	509
521		static ADDRESS_MAP_START( ddonpach_writemem, ADDRESS_SPACE_PROGRAM, 16 )
522		AM_RANGE(0x000000, 0x0fffff) AM_WRITE(SMH_ROM                     )   // ROM
523		AM_RANGE(0x100000, 0x10ffff) AM_WRITE(SMH_RAM                     )   // RAM
524		AM_RANGE(0x300000, 0x300003) AM_DEVWRITE8("ymz", ymz280b_w, 0x00ff)   // YMZ280
525		AM_RANGE(0x400000, 0x407fff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)   // Sprites
526		AM_RANGE(0x408000, 0x40ffff) AM_WRITE(SMH_RAM) AM_BASE(&cave_spriteram16_2      )
527		AM_RANGE(0x500000, 0x507fff) AM_WRITE(cave_vram_0_w) AM_BASE(&cave_vram_0      )   // Layer 0
528		AM_RANGE(0x600000, 0x607fff) AM_WRITE(cave_vram_1_w) AM_BASE(&cave_vram_1      )   // Layer 1
529		AM_RANGE(0x700000, 0x70ffff) AM_WRITE(cave_vram_2_8x8_w) AM_BASE(&cave_vram_2   )   // Layer 2
530		AM_RANGE(0x800000, 0x80007f) AM_WRITE(SMH_RAM) AM_BASE(&cave_videoregs         )   // Video Regs
531		AM_RANGE(0x900000, 0x900005) AM_WRITE(SMH_RAM) AM_BASE(&cave_vctrl_0         )   // Layer 0 Control
532		AM_RANGE(0xa00000, 0xa00005) AM_WRITE(SMH_RAM) AM_BASE(&cave_vctrl_1         )   // Layer 1 Control
533		AM_RANGE(0xb00000, 0xb00005) AM_WRITE(SMH_RAM) AM_BASE(&cave_vctrl_2         )   // Layer 2 Control
534		AM_RANGE(0xc00000, 0xc0ffff) AM_WRITE(SMH_RAM) AM_BASE(&paletteram16) AM_SIZE(&cave_paletteram_size)   // Palette
535		AM_RANGE(0xe00000, 0xe00001) AM_WRITE(cave_eeprom_msb_w                     )   // EEPROM
536		ADDRESS_MAP_END
537	510
538
539	511	/***************************************************************************
540	512	Donpachi
541	513	***************************************************************************/
r4679	r4680
565	537	}
566	538	#endif
567	539
568		static ADDRESS_MAP_START( donpachi_readmem, ADDRESS_SPACE_PROGRAM, 16 )
569		AM_RANGE(0x000000, 0x07ffff) AM_READ(SMH_ROM               )   // ROM
570		AM_RANGE(0x100000, 0x10ffff) AM_READ(SMH_RAM               )   // RAM
571		AM_RANGE(0x200000, 0x207fff) AM_READ(SMH_RAM               )   // Layer 1
572		AM_RANGE(0x300000, 0x307fff) AM_READ(SMH_RAM               )   // Layer 0
573		AM_RANGE(0x400000, 0x407fff) AM_READ(SMH_RAM               )   // Layer 2
574		AM_RANGE(0x500000, 0x507fff) AM_READ(SMH_RAM               )   // Sprites
575		AM_RANGE(0x508000, 0x50ffff) AM_READ(SMH_RAM               )   // Sprites?
576		/**/AM_RANGE(0x600000, 0x600005) AM_READ(SMH_RAM               )   // Layer 0 Control
577		/**/AM_RANGE(0x700000, 0x700005) AM_READ(SMH_RAM               )   // Layer 1 Control
578		/**/AM_RANGE(0x800000, 0x800005) AM_READ(SMH_RAM               )   // Layer 2 Control
579		AM_RANGE(0x900000, 0x90007f) AM_READ(donpachi_videoregs_r      )   // Video Regs
580		/**/AM_RANGE(0xa08000, 0xa08fff) AM_READ(SMH_RAM               )   // Palette
581		AM_RANGE(0xb00000, 0xb00001) AM_DEVREAD8("oki1", okim6295_r, 0x00ff   )   // M6295
582		AM_RANGE(0xb00010, 0xb00011) AM_DEVREAD8("oki2", okim6295_r, 0x00ff   )   //
583		AM_RANGE(0xc00000, 0xc00001) AM_READ_PORT("IN0"               )   // Inputs
584		AM_RANGE(0xc00002, 0xc00003) AM_READ_PORT("IN1"               )   // Inputs + EEPROM
	540	static ADDRESS_MAP_START( donpachi_map, ADDRESS_SPACE_PROGRAM, 16 )
	541	AM_RANGE(0x000000, 0x07ffff) AM_ROM                                                   // ROM
	542	AM_RANGE(0x100000, 0x10ffff) AM_RAM                                                   // RAM
	543	AM_RANGE(0x200000, 0x207fff) AM_RAM_WRITE(cave_vram_1_w) AM_BASE(&cave_vram_1)                  // Layer 1
	544	AM_RANGE(0x300000, 0x307fff) AM_RAM_WRITE(cave_vram_0_w) AM_BASE(&cave_vram_0)                  // Layer 0
	545	AM_RANGE(0x400000, 0x407fff) AM_RAM_WRITE(cave_vram_2_8x8_w) AM_BASE(&cave_vram_2)               // Layer 2
	546	AM_RANGE(0x500000, 0x507fff) AM_RAM AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)               // Sprites
	547	AM_RANGE(0x508000, 0x50ffff) AM_RAM AM_BASE(&cave_spriteram16_2)                           // Sprites?
	548	/**/AM_RANGE(0x600000, 0x600005) AM_RAM AM_BASE(&cave_vctrl_1)                                 // Layer 1 Control
	549	/**/AM_RANGE(0x700000, 0x700005) AM_RAM AM_BASE(&cave_vctrl_0)                                 // Layer 0 Control
	550	/**/AM_RANGE(0x800000, 0x800005) AM_RAM AM_BASE(&cave_vctrl_2)                                 // Layer 2 Control
	551	AM_RANGE(0x900000, 0x90007f) AM_READWRITE(donpachi_videoregs_r, SMH_RAM) AM_BASE(&cave_videoregs)   // Video Regs
	552	/**/AM_RANGE(0xa08000, 0xa08fff) AM_RAM AM_BASE(&paletteram16) AM_SIZE(&cave_paletteram_size)         // Palette
	553	AM_RANGE(0xb00000, 0xb00003) AM_DEVREADWRITE8("oki1", okim6295_r, okim6295_w, 0x00ff)            // M6295
	554	AM_RANGE(0xb00010, 0xb00013) AM_DEVREADWRITE8("oki2", okim6295_r, okim6295_w, 0x00ff)            //
	555	AM_RANGE(0xb00020, 0xb0002f) AM_WRITE(NMK112_okibank_lsb_w)                                 //
	556	AM_RANGE(0xc00000, 0xc00001) AM_READ_PORT("IN0")                                       // Inputs
	557	AM_RANGE(0xc00002, 0xc00003) AM_READ_PORT("IN1")                                       // Inputs + EEPROM
	558	AM_RANGE(0xd00000, 0xd00001) AM_WRITE(cave_eeprom_msb_w)                                 // EEPROM
585	559	ADDRESS_MAP_END
586	560
587		static ADDRESS_MAP_START( donpachi_writemem, ADDRESS_SPACE_PROGRAM, 16 )
588		AM_RANGE(0x000000, 0x07ffff) AM_WRITE(SMH_ROM                     )   // ROM
589		AM_RANGE(0x100000, 0x10ffff) AM_WRITE(SMH_RAM                     )   // RAM
590		AM_RANGE(0x200000, 0x207fff) AM_WRITE(cave_vram_1_w) AM_BASE(&cave_vram_1      )   // Layer 1
591		AM_RANGE(0x300000, 0x307fff) AM_WRITE(cave_vram_0_w) AM_BASE(&cave_vram_0      )   // Layer 0
592		AM_RANGE(0x400000, 0x407fff) AM_WRITE(cave_vram_2_8x8_w) AM_BASE(&cave_vram_2   )   // Layer 2
593		AM_RANGE(0x500000, 0x507fff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16) AM_SIZE(&spriteram_size   )   // Sprites
594		AM_RANGE(0x508000, 0x50ffff) AM_WRITE(SMH_RAM) AM_BASE(&cave_spriteram16_2      )
595		AM_RANGE(0x600000, 0x600005) AM_WRITE(SMH_RAM) AM_BASE(&cave_vctrl_1         )   // Layer 1 Control
596		AM_RANGE(0x700000, 0x700005) AM_WRITE(SMH_RAM) AM_BASE(&cave_vctrl_0         )   // Layer 0 Control
597		AM_RANGE(0x800000, 0x800005) AM_WRITE(SMH_RAM) AM_BASE(&cave_vctrl_2         )   // Layer 2 Control
598		AM_RANGE(0x900000, 0x90007f) AM_WRITE(SMH_RAM) AM_BASE(&cave_videoregs         )   // Video Regs
599		AM_RANGE(0xa08000, 0xa08fff) AM_WRITE(SMH_RAM) AM_BASE(&paletteram16) AM_SIZE(&cave_paletteram_size)   // Palette
600		AM_RANGE(0xb00000, 0xb00003) AM_DEVWRITE8("oki1", okim6295_w, 0x00ff      )   // M6295
601		AM_RANGE(0xb00010, 0xb00013) AM_DEVWRITE8("oki2", okim6295_w, 0x00ff      )   //
602		AM_RANGE(0xb00020, 0xb0002f) AM_WRITE(NMK112_okibank_lsb_w            )   //
603		AM_RANGE(0xd00000, 0xd00001) AM_WRITE(cave_eeprom_msb_w               )   // EEPROM
604		ADDRESS_MAP_END
605	561
606
607	562	/***************************************************************************
608	563	Esprade
609	564	***************************************************************************/
610	565
611		static ADDRESS_MAP_START( esprade_readmem, ADDRESS_SPACE_PROGRAM, 16 )
612		AM_RANGE(0x000000, 0x0fffff) AM_READ(SMH_ROM            )   // ROM
613		AM_RANGE(0x100000, 0x10ffff) AM_READ(SMH_RAM            )   // RAM
614		AM_RANGE(0x300000, 0x300003) AM_DEVREAD8("ymz", ymz280b_r, 0x00ff)   // YMZ280
615		/**/AM_RANGE(0x400000, 0x407fff) AM_READ(SMH_RAM            )   // Sprites
616		/**/AM_RANGE(0x408000, 0x40ffff) AM_READ(SMH_RAM            )   // Sprites?
617		/**/AM_RANGE(0x500000, 0x507fff) AM_READ(SMH_RAM            )   // Layer 0
618		/**/AM_RANGE(0x600000, 0x607fff) AM_READ(SMH_RAM            )   // Layer 1
619		/**/AM_RANGE(0x700000, 0x707fff) AM_READ(SMH_RAM            )   // Layer 2
620		AM_RANGE(0x800000, 0x800007) AM_READ(cave_irq_cause_r      )   // IRQ Cause
621		/**/AM_RANGE(0x900000, 0x900005) AM_READ(SMH_RAM            )   // Layer 0 Control
622		/**/AM_RANGE(0xa00000, 0xa00005) AM_READ(SMH_RAM            )   // Layer 1 Control
623		/**/AM_RANGE(0xb00000, 0xb00005) AM_READ(SMH_RAM            )   // Layer 2 Control
624		/**/AM_RANGE(0xc00000, 0xc0ffff) AM_READ(SMH_RAM            )   // Palette
	566	static ADDRESS_MAP_START( esprade_map, ADDRESS_SPACE_PROGRAM, 16 )
	567	AM_RANGE(0x000000, 0x0fffff) AM_ROM                                             // ROM
	568	AM_RANGE(0x100000, 0x10ffff) AM_RAM                                             // RAM
	569	AM_RANGE(0x300000, 0x300003) AM_DEVREADWRITE8("ymz", ymz280b_r, ymz280b_w, 0x00ff)         // YMZ280
	570	/**/AM_RANGE(0x400000, 0x407fff) AM_RAM AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)         // Sprites
	571	/**/AM_RANGE(0x408000, 0x40ffff) AM_RAM AM_BASE(&cave_spriteram16_2)                     // Sprites?
	572	/**/AM_RANGE(0x500000, 0x507fff) AM_RAM_WRITE(cave_vram_0_w) AM_BASE(&cave_vram_0)            // Layer 0
	573	/**/AM_RANGE(0x600000, 0x607fff) AM_RAM_WRITE(cave_vram_1_w) AM_BASE(&cave_vram_1)            // Layer 1
	574	/**/AM_RANGE(0x700000, 0x707fff) AM_RAM_WRITE(cave_vram_2_w) AM_BASE(&cave_vram_2)            // Layer 2
	575	AM_RANGE(0x800000, 0x800007) AM_READ(cave_irq_cause_r)                              // IRQ Cause
	576	AM_RANGE(0x800000, 0x80007f) AM_WRITE(SMH_RAM) AM_BASE(&cave_videoregs)                  // Video Regs
	577	/**/AM_RANGE(0x900000, 0x900005) AM_RAM AM_BASE(&cave_vctrl_0)                           // Layer 0 Control
	578	/**/AM_RANGE(0xa00000, 0xa00005) AM_RAM AM_BASE(&cave_vctrl_1)                           // Layer 1 Control
	579	/**/AM_RANGE(0xb00000, 0xb00005) AM_RAM AM_BASE(&cave_vctrl_2)                           // Layer 2 Control
	580	/**/AM_RANGE(0xc00000, 0xc0ffff) AM_RAM AM_BASE(&paletteram16) AM_SIZE(&cave_paletteram_size)   // Palette
625	581	AM_RANGE(0xd00000, 0xd00001) AM_READ_PORT("IN0"            )   // Inputs
626	582	AM_RANGE(0xd00002, 0xd00003) AM_READ_PORT("IN1"            )   // Inputs + EEPROM
627		ADDRESS_MAP_END
628
629		static ADDRESS_MAP_START( esprade_writemem, ADDRESS_SPACE_PROGRAM, 16 )
630		AM_RANGE(0x000000, 0x0fffff) AM_WRITE(SMH_ROM                  )   // ROM
631		AM_RANGE(0x100000, 0x10ffff) AM_WRITE(SMH_RAM                  )   // RAM
632		AM_RANGE(0x300000, 0x300003) AM_DEVWRITE8("ymz", ymz280b_w, 0x00ff)   // YMZ280
633		AM_RANGE(0x400000, 0x407fff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)   // Sprites
634		AM_RANGE(0x408000, 0x40ffff) AM_WRITE(SMH_RAM) AM_BASE(&cave_spriteram16_2)   // Sprites?
635		AM_RANGE(0x500000, 0x507fff) AM_WRITE(cave_vram_0_w) AM_BASE(&cave_vram_0   )   // Layer 0
636		AM_RANGE(0x600000, 0x607fff) AM_WRITE(cave_vram_1_w) AM_BASE(&cave_vram_1   )   // Layer 1
637		AM_RANGE(0x700000, 0x707fff) AM_WRITE(cave_vram_2_w) AM_BASE(&cave_vram_2   )   // Layer 2
638		AM_RANGE(0x800000, 0x80007f) AM_WRITE(SMH_RAM) AM_BASE(&cave_videoregs      )   // Video Regs
639		AM_RANGE(0x900000, 0x900005) AM_WRITE(SMH_RAM) AM_BASE(&cave_vctrl_0      )   // Layer 0 Control
640		AM_RANGE(0xa00000, 0xa00005) AM_WRITE(SMH_RAM) AM_BASE(&cave_vctrl_1      )   // Layer 1 Control
641		AM_RANGE(0xb00000, 0xb00005) AM_WRITE(SMH_RAM) AM_BASE(&cave_vctrl_2      )   // Layer 2 Control
642		AM_RANGE(0xc00000, 0xc0ffff) AM_WRITE(SMH_RAM) AM_BASE(&paletteram16) AM_SIZE(&cave_paletteram_size)   // Palette
643	583	AM_RANGE(0xe00000, 0xe00001) AM_WRITE(cave_eeprom_msb_w            )   // EEPROM
644	584	ADDRESS_MAP_END
645	585
r4679	r4680
648	588	Gaia Crusaders
649	589	***************************************************************************/
650	590
651		static ADDRESS_MAP_START( gaia_readmem, ADDRESS_SPACE_PROGRAM, 16 )
652		AM_RANGE(0x000000, 0x0fffff) AM_READ(SMH_ROM            )   // ROM
653		AM_RANGE(0x100000, 0x10ffff) AM_READ(SMH_RAM            )   // RAM
654		AM_RANGE(0x300000, 0x300003) AM_DEVREAD8("ymz", ymz280b_r, 0x00ff)   // YMZ280
655		AM_RANGE(0x400000, 0x407fff) AM_READ(SMH_RAM            )   // Sprite bank 1
656		AM_RANGE(0x408000, 0x40ffff) AM_READ(SMH_RAM            )   // Sprite bank 2
657		AM_RANGE(0x500000, 0x507fff) AM_READ(SMH_RAM            )   // Layer 0
658		AM_RANGE(0x508000, 0x50ffff) AM_READ(SMH_RAM            )   // More Layer 0, Tested but not used?
659		AM_RANGE(0x600000, 0x607fff) AM_READ(SMH_RAM            )   // Layer 1
660		AM_RANGE(0x608000, 0x60ffff) AM_READ(SMH_RAM            )   // More Layer 1, Tested but not used?
661		AM_RANGE(0x700000, 0x707fff) AM_READ(SMH_RAM            )   // Layer 2
662		AM_RANGE(0x708000, 0x70ffff) AM_READ(SMH_RAM            )   // More Layer 2, Tested but not used?
663		AM_RANGE(0x800000, 0x800007) AM_READ(cave_irq_cause_r      )   // IRQ Cause
664		/**/AM_RANGE(0x900000, 0x900005) AM_READ(SMH_RAM            )   // Layer 0 Control
665		/**/AM_RANGE(0xa00000, 0xa00005) AM_READ(SMH_RAM            )   // Layer 1 Control
666		/**/AM_RANGE(0xb00000, 0xb00005) AM_READ(SMH_RAM            )   // Layer 2 Control
667		AM_RANGE(0xc00000, 0xc0ffff) AM_READ(SMH_RAM            )   // Palette
668		AM_RANGE(0xd00010, 0xd00011) AM_READ_PORT("IN0"            )   // Inputs
669		AM_RANGE(0xd00012, 0xd00013) AM_READ_PORT("IN1"            )   // Inputs
670		AM_RANGE(0xd00014, 0xd00015) AM_READ_PORT("DSW"            )   // Dips
	591	static ADDRESS_MAP_START( gaia_map, ADDRESS_SPACE_PROGRAM, 16 )
	592	AM_RANGE(0x000000, 0x0fffff) AM_ROM                                             // ROM
	593	AM_RANGE(0x100000, 0x10ffff) AM_RAM                                             // RAM
	594	AM_RANGE(0x300000, 0x300003) AM_DEVREADWRITE8("ymz", ymz280b_r, ymz280b_w, 0x00ff)         // YMZ280
	595	AM_RANGE(0x400000, 0x407fff) AM_RAM AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)         // Sprite bank 1
	596	AM_RANGE(0x408000, 0x40ffff) AM_RAM AM_BASE(&cave_spriteram16_2)                     // Sprite bank 2
	597	AM_RANGE(0x500000, 0x507fff) AM_RAM_WRITE(cave_vram_0_w) AM_BASE(&cave_vram_0)            // Layer 0
	598	AM_RANGE(0x508000, 0x50ffff) AM_RAM                                             // More Layer 0, Tested but not used?
	599	AM_RANGE(0x600000, 0x607fff) AM_RAM_WRITE(cave_vram_1_w) AM_BASE(&cave_vram_1)            // Layer 1
	600	AM_RANGE(0x608000, 0x60ffff) AM_RAM                                             // More Layer 1, Tested but not used?
	601	AM_RANGE(0x700000, 0x707fff) AM_RAM_WRITE(cave_vram_2_w) AM_BASE(&cave_vram_2)            // Layer 2
	602	AM_RANGE(0x708000, 0x70ffff) AM_RAM                                             // More Layer 2, Tested but not used?
	603	AM_RANGE(0x800000, 0x800007) AM_READ(cave_irq_cause_r)                              // IRQ Cause
	604	AM_RANGE(0x800000, 0x80007f) AM_WRITE(SMH_RAM) AM_BASE(&cave_videoregs)                  // Video Regs
	605	/**/AM_RANGE(0x900000, 0x900005) AM_RAM AM_BASE(&cave_vctrl_0)                           // Layer 0 Control
	606	/**/AM_RANGE(0xa00000, 0xa00005) AM_RAM AM_BASE(&cave_vctrl_1)                           // Layer 1 Control
	607	/**/AM_RANGE(0xb00000, 0xb00005) AM_RAM AM_BASE(&cave_vctrl_2)                           // Layer 2 Control
	608	AM_RANGE(0xc00000, 0xc0ffff) AM_RAM AM_BASE(&paletteram16) AM_SIZE(&cave_paletteram_size)   // Palette
	609	AM_RANGE(0xd00010, 0xd00011) AM_READ_PORT("IN0")                                 // Inputs
	610	AM_RANGE(0xd00010, 0xd00011) AM_WRITE(gaia_coin_lsb_w)                              // Coin counter only
	611	AM_RANGE(0xd00012, 0xd00013) AM_READ_PORT("IN1")                                 // Inputs
	612	AM_RANGE(0xd00014, 0xd00015) AM_READ_PORT("DSW")                                 // Dips
	613	AM_RANGE(0xd00014, 0xd00015) AM_WRITE(watchdog_reset16_w)                           // Watchdog?
671	614	ADDRESS_MAP_END
672	615
673		static ADDRESS_MAP_START( gaia_writemem, ADDRESS_SPACE_PROGRAM, 16 )
674		AM_RANGE(0x000000, 0x0fffff) AM_WRITE(SMH_ROM                  )   // ROM
675		AM_RANGE(0x100000, 0x10ffff) AM_WRITE(SMH_RAM                  )   // RAM
676		AM_RANGE(0x300000, 0x300003) AM_DEVWRITE8("ymz", ymz280b_w, 0x00ff   )   // YMZ280
677		AM_RANGE(0x400000, 0x407fff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16) AM_SIZE(&spriteram_size   )   // Sprite bank 1
678		AM_RANGE(0x408000, 0x40ffff) AM_WRITE(SMH_RAM) AM_BASE(&cave_spriteram16_2   )   // Sprite bank 2
679		AM_RANGE(0x500000, 0x507fff) AM_WRITE(cave_vram_0_w) AM_BASE(&cave_vram_0   )   // Layer 0
680		AM_RANGE(0x508000, 0x50ffff) AM_WRITE(SMH_RAM                        )   // More Layer 0, Tested but not used?
681		AM_RANGE(0x600000, 0x607fff) AM_WRITE(cave_vram_1_w) AM_BASE(&cave_vram_1   )   // Layer 1
682		AM_RANGE(0x608000, 0x60ffff) AM_WRITE(SMH_RAM                        )   // More Layer 1, Tested but not used?
683		AM_RANGE(0x700000, 0x707fff) AM_WRITE(cave_vram_2_w) AM_BASE(&cave_vram_2   )   // Layer 2
684		AM_RANGE(0x708000, 0x70ffff) AM_WRITE(SMH_RAM                        )   // More Layer 2, Tested but not used?
685		AM_RANGE(0x800000, 0x80007f) AM_WRITE(SMH_RAM) AM_BASE(&cave_videoregs      )   // Video Regs
686		AM_RANGE(0x900000, 0x900005) AM_WRITE(SMH_RAM) AM_BASE(&cave_vctrl_0      )   // Layer 0 Control
687		AM_RANGE(0xa00000, 0xa00005) AM_WRITE(SMH_RAM) AM_BASE(&cave_vctrl_1      )   // Layer 1 Control
688		AM_RANGE(0xb00000, 0xb00005) AM_WRITE(SMH_RAM) AM_BASE(&cave_vctrl_2      )   // Layer 2 Control
689		AM_RANGE(0xc00000, 0xc0ffff) AM_WRITE(SMH_RAM) AM_BASE(&paletteram16) AM_SIZE(&cave_paletteram_size)   // Palette
690		AM_RANGE(0xd00010, 0xd00011) AM_WRITE(gaia_coin_lsb_w            )   // Coin counter only
691		AM_RANGE(0xd00014, 0xd00015) AM_WRITE(watchdog_reset16_w         )   // Watchdog?
692		ADDRESS_MAP_END
693	616
694
695	617	/***************************************************************************
696	618	Guwange
697	619	***************************************************************************/
698	620
699		static ADDRESS_MAP_START( guwange_readmem, ADDRESS_SPACE_PROGRAM, 16 )
700		AM_RANGE(0x000000, 0x0fffff) AM_READ(SMH_ROM            )   // ROM
701		AM_RANGE(0x200000, 0x20ffff) AM_READ(SMH_RAM            )   // RAM
702		AM_RANGE(0x300000, 0x300007) AM_READ(cave_irq_cause_r      )   // IRQ Cause
703		/**/AM_RANGE(0x400000, 0x407fff) AM_READ(SMH_RAM            )   // Sprites
704		/**/AM_RANGE(0x408000, 0x40ffff) AM_READ(SMH_RAM            )   // Sprites?
705		/**/AM_RANGE(0x500000, 0x507fff) AM_READ(SMH_RAM            )   // Layer 0
706		/**/AM_RANGE(0x600000, 0x607fff) AM_READ(SMH_RAM            )   // Layer 1
707		/**/AM_RANGE(0x700000, 0x707fff) AM_READ(SMH_RAM            )   // Layer 2
708		AM_RANGE(0x800000, 0x800003) AM_DEVREAD8("ymz", ymz280b_r, 0x00ff)   // YMZ280
709		/**/AM_RANGE(0x900000, 0x900005) AM_READ(SMH_RAM            )   // Layer 0 Control
710		/**/AM_RANGE(0xa00000, 0xa00005) AM_READ(SMH_RAM            )   // Layer 1 Control
711		/**/AM_RANGE(0xb00000, 0xb00005) AM_READ(SMH_RAM            )   // Layer 2 Control
712		/**/AM_RANGE(0xc00000, 0xc0ffff) AM_READ(SMH_RAM            )   // Palette
713		AM_RANGE(0xd00010, 0xd00011) AM_READ_PORT("IN0"            )   // Inputs
714		AM_RANGE(0xd00012, 0xd00013) AM_READ_PORT("IN1"            )   // Inputs + EEPROM
	621	static ADDRESS_MAP_START( guwange_map, ADDRESS_SPACE_PROGRAM, 16 )
	622	AM_RANGE(0x000000, 0x0fffff) AM_ROM                                             // ROM
	623	AM_RANGE(0x200000, 0x20ffff) AM_RAM                                             // RAM
	624	AM_RANGE(0x300000, 0x300007) AM_READ(cave_irq_cause_r)                              // IRQ Cause
	625	AM_RANGE(0x300000, 0x30007f) AM_WRITE(SMH_RAM) AM_BASE(&cave_videoregs)                  // Video Regs
	626	/**/AM_RANGE(0x400000, 0x407fff) AM_RAM AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)         // Sprites
	627	/**/AM_RANGE(0x408000, 0x40ffff) AM_RAM AM_BASE(&cave_spriteram16_2)                     // Sprites?
	628	/**/AM_RANGE(0x500000, 0x507fff) AM_RAM_WRITE(cave_vram_0_w) AM_BASE(&cave_vram_0)            // Layer 0
	629	/**/AM_RANGE(0x600000, 0x607fff) AM_RAM_WRITE(cave_vram_1_w) AM_BASE(&cave_vram_1)            // Layer 1
	630	/**/AM_RANGE(0x700000, 0x707fff) AM_RAM_WRITE(cave_vram_2_w) AM_BASE(&cave_vram_2)            // Layer 2
	631	AM_RANGE(0x800000, 0x800003) AM_DEVREADWRITE8("ymz", ymz280b_r, ymz280b_w, 0x00ff)         // YMZ280
	632	/**/AM_RANGE(0x900000, 0x900005) AM_RAM AM_BASE(&cave_vctrl_0)                           // Layer 0 Control
	633	/**/AM_RANGE(0xa00000, 0xa00005) AM_RAM AM_BASE(&cave_vctrl_1)                           // Layer 1 Control
	634	/**/AM_RANGE(0xb00000, 0xb00005) AM_RAM AM_BASE(&cave_vctrl_2)                           // Layer 2 Control
	635	/**/AM_RANGE(0xc00000, 0xc0ffff) AM_RAM AM_BASE(&paletteram16) AM_SIZE(&cave_paletteram_size)   // Palette
	636	AM_RANGE(0xd00010, 0xd00011) AM_READ_PORT("IN0")                                 // Inputs
	637	AM_RANGE(0xd00010, 0xd00011) AM_WRITE(cave_eeprom_lsb_w)                           // EEPROM
	638	AM_RANGE(0xd00012, 0xd00013) AM_READ_PORT("IN1")                                 // Inputs + EEPROM
	639	//  AM_RANGE(0xd00012, 0xd00013) AM_WRITE(SMH_NOP)                                              // ?
	640	//  AM_RANGE(0xd00014, 0xd00015) AM_WRITE(SMH_NOP)                                              // ? $800068 in dfeveron ? probably Watchdog
715	641	ADDRESS_MAP_END
716	642
717		static ADDRESS_MAP_START( guwange_writemem, ADDRESS_SPACE_PROGRAM, 16 )
718		AM_RANGE(0x000000, 0x0fffff) AM_WRITE(SMH_ROM                  )   // ROM
719		AM_RANGE(0x200000, 0x20ffff) AM_WRITE(SMH_RAM                  )   // RAM
720		AM_RANGE(0x300000, 0x30007f) AM_WRITE(SMH_RAM) AM_BASE(&cave_videoregs      )   // Video Regs
721		AM_RANGE(0x400000, 0x407fff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)   // Sprites
722		AM_RANGE(0x408000, 0x40ffff) AM_WRITE(SMH_RAM) AM_BASE(&cave_spriteram16_2   )
723		AM_RANGE(0x500000, 0x507fff) AM_WRITE(cave_vram_0_w) AM_BASE(&cave_vram_0   )   // Layer 0
724		AM_RANGE(0x600000, 0x607fff) AM_WRITE(cave_vram_1_w) AM_BASE(&cave_vram_1   )   // Layer 1
725		AM_RANGE(0x700000, 0x707fff) AM_WRITE(cave_vram_2_w) AM_BASE(&cave_vram_2   )   // Layer 2
726		AM_RANGE(0x800000, 0x800003) AM_DEVWRITE8("ymz", ymz280b_w, 0x00ff   )   // YMZ280
727		AM_RANGE(0x900000, 0x900005) AM_WRITE(SMH_RAM) AM_BASE(&cave_vctrl_0      )   // Layer 0 Control
728		AM_RANGE(0xa00000, 0xa00005) AM_WRITE(SMH_RAM) AM_BASE(&cave_vctrl_1      )   // Layer 1 Control
729		AM_RANGE(0xb00000, 0xb00005) AM_WRITE(SMH_RAM) AM_BASE(&cave_vctrl_2      )   // Layer 2 Control
730		AM_RANGE(0xc00000, 0xc0ffff) AM_WRITE(SMH_RAM) AM_BASE(&paletteram16) AM_SIZE(&cave_paletteram_size)   // Palette
731		AM_RANGE(0xd00010, 0xd00011) AM_WRITE(cave_eeprom_lsb_w            )   // EEPROM
732		//  AM_RANGE(0xd00012, 0xd00013) AM_WRITE(SMH_NOP                       )   // ?
733		//  AM_RANGE(0xd00014, 0xd00015) AM_WRITE(SMH_NOP                       )   // ? $800068 in dfeveron ? probably Watchdog
734		ADDRESS_MAP_END
735	643
736
737	644	/***************************************************************************
738	645	Hotdog Storm
739	646	***************************************************************************/
740	647
741		static ADDRESS_MAP_START( hotdogst_readmem, ADDRESS_SPACE_PROGRAM, 16 )
742		AM_RANGE(0x000000, 0x0fffff) AM_READ(SMH_ROM            )   // ROM
743		AM_RANGE(0x300000, 0x30ffff) AM_READ(SMH_RAM            )   // RAM
744		/**/AM_RANGE(0x408000, 0x408fff) AM_READ(SMH_RAM            )   // Palette
745		/**/AM_RANGE(0x880000, 0x887fff) AM_READ(SMH_RAM            )   // Layer 0
746		/**/AM_RANGE(0x900000, 0x907fff) AM_READ(SMH_RAM            )   // Layer 1
747		/**/AM_RANGE(0x980000, 0x987fff) AM_READ(SMH_RAM            )   // Layer 2
748		AM_RANGE(0xa80000, 0xa80007) AM_READ(cave_irq_cause_r      )   // IRQ Cause
749		//  AM_RANGE(0xa8006e, 0xa8006f) AM_READ(soundlatch_ack_r       )   // From Sound CPU
750		/**/AM_RANGE(0xb00000, 0xb00005) AM_READ(SMH_RAM            )   // Layer 0 Control
751		/**/AM_RANGE(0xb80000, 0xb80005) AM_READ(SMH_RAM            )   // Layer 1 Control
752		/**/AM_RANGE(0xc00000, 0xc00005) AM_READ(SMH_RAM            )   // Layer 2 Control
753		AM_RANGE(0xc80000, 0xc80001) AM_READ_PORT("IN0"            )   // Inputs
754		AM_RANGE(0xc80002, 0xc80003) AM_READ_PORT("IN1"            )   // Inputs + EEPROM
755		/**/AM_RANGE(0xf00000, 0xf07fff) AM_READ(SMH_RAM            )   // Sprites
756		/**/AM_RANGE(0xf08000, 0xf0ffff) AM_READ(SMH_RAM            )   // Sprites?
	648	static ADDRESS_MAP_START( hotdogst_map, ADDRESS_SPACE_PROGRAM, 16 )
	649	AM_RANGE(0x000000, 0x0fffff) AM_ROM                                             // ROM
	650	AM_RANGE(0x300000, 0x30ffff) AM_RAM                                             // RAM
	651	/**/AM_RANGE(0x408000, 0x408fff) AM_RAM AM_BASE(&paletteram16) AM_SIZE(&cave_paletteram_size)   // Palette
	652	/**/AM_RANGE(0x880000, 0x887fff) AM_RAM_WRITE(cave_vram_0_w) AM_BASE(&cave_vram_0)            // Layer 0
	653	/**/AM_RANGE(0x900000, 0x907fff) AM_RAM_WRITE(cave_vram_1_w) AM_BASE(&cave_vram_1)            // Layer 1
	654	/**/AM_RANGE(0x980000, 0x987fff) AM_RAM_WRITE(cave_vram_2_w) AM_BASE(&cave_vram_2)            // Layer 2
	655	AM_RANGE(0xa80000, 0xa80007) AM_READ(cave_irq_cause_r)                              // IRQ Cause
	656	//  AM_RANGE(0xa8006e, 0xa8006f) AM_READ(soundlatch_ack_r)                                      // From Sound CPU
	657	AM_RANGE(0xa8006e, 0xa8006f) AM_WRITE(sound_cmd_w)                                 // To Sound CPU
	658	AM_RANGE(0xa80000, 0xa8007f) AM_WRITE(SMH_RAM) AM_BASE(&cave_videoregs)                  // Video Regs
	659	/**/AM_RANGE(0xb00000, 0xb00005) AM_RAM AM_BASE(&cave_vctrl_0)                           // Layer 0 Control
	660	/**/AM_RANGE(0xb80000, 0xb80005) AM_RAM AM_BASE(&cave_vctrl_1)                           // Layer 1 Control
	661	/**/AM_RANGE(0xc00000, 0xc00005) AM_RAM AM_BASE(&cave_vctrl_2)                           // Layer 2 Control
	662	AM_RANGE(0xc80000, 0xc80001) AM_READ_PORT("IN0")                                 // Inputs
	663	AM_RANGE(0xc80002, 0xc80003) AM_READ_PORT("IN1")                                 // Inputs + EEPROM
	664	AM_RANGE(0xd00000, 0xd00001) AM_WRITE(hotdogst_eeprom_msb_w)                        // EEPROM
	665	AM_RANGE(0xd00002, 0xd00003) AM_WRITE(SMH_NOP)                                    // ???
	666	/**/AM_RANGE(0xf00000, 0xf07fff) AM_RAM AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)         // Sprites
	667	/**/AM_RANGE(0xf08000, 0xf0ffff) AM_RAM AM_BASE(&cave_spriteram16_2)                     // Sprites?
757	668	ADDRESS_MAP_END
758	669
759		static ADDRESS_MAP_START( hotdogst_writemem, ADDRESS_SPACE_PROGRAM, 16 )
760		AM_RANGE(0x000000, 0x0fffff) AM_WRITE(SMH_ROM                  )   // ROM
761		AM_RANGE(0x300000, 0x30ffff) AM_WRITE(SMH_RAM                  )   // RAM
762		AM_RANGE(0x408000, 0x408fff) AM_WRITE(SMH_RAM) AM_BASE(&paletteram16) AM_SIZE(&cave_paletteram_size)   // Palette
763		AM_RANGE(0x880000, 0x887fff) AM_WRITE(cave_vram_0_w) AM_BASE(&cave_vram_0   )   // Layer 0
764		AM_RANGE(0x900000, 0x907fff) AM_WRITE(cave_vram_1_w) AM_BASE(&cave_vram_1   )   // Layer 1
765		AM_RANGE(0x980000, 0x987fff) AM_WRITE(cave_vram_2_w) AM_BASE(&cave_vram_2   )   // Layer 2
766		AM_RANGE(0xa8006e, 0xa8006f) AM_WRITE(sound_cmd_w                     )   // To Sound CPU
767		AM_RANGE(0xa80000, 0xa8007f) AM_WRITE(SMH_RAM) AM_BASE(&cave_videoregs      )   // Video Regs
768		AM_RANGE(0xb00000, 0xb00005) AM_WRITE(SMH_RAM) AM_BASE(&cave_vctrl_0      )   // Layer 0 Control
769		AM_RANGE(0xb80000, 0xb80005) AM_WRITE(SMH_RAM) AM_BASE(&cave_vctrl_1      )   // Layer 1 Control
770		AM_RANGE(0xc00000, 0xc00005) AM_WRITE(SMH_RAM) AM_BASE(&cave_vctrl_2      )   // Layer 2 Control
771		AM_RANGE(0xd00000, 0xd00001) AM_WRITE(hotdogst_eeprom_msb_w               )   // EEPROM
772		AM_RANGE(0xd00002, 0xd00003) AM_WRITE(SMH_NOP                        )   // ???
773		AM_RANGE(0xf00000, 0xf07fff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)   // Sprites
774		AM_RANGE(0xf08000, 0xf0ffff) AM_WRITE(SMH_RAM) AM_BASE(&cave_spriteram16_2)
775		ADDRESS_MAP_END
776	670
777
778	671	/***************************************************************************
779	672	Koro Koro Quest
780	673	***************************************************************************/
r4679	r4680
842	735	return hopper ? 1 : 0;
843	736	}
844	737
845		static ADDRESS_MAP_START( korokoro_readmem, ADDRESS_SPACE_PROGRAM, 16 )
846		AM_RANGE(0x000000, 0x07ffff) AM_READ( SMH_ROM            )   // ROM
847		//  AM_RANGE(0x100000, 0x107fff) AM_READ( SMH_RAM               )   // Layer 0
848		//  AM_RANGE(0x140000, 0x140005) AM_READ( SMH_RAM               )   // Layer 0 Control
849		//  AM_RANGE(0x180000, 0x187fff) AM_READ( SMH_RAM               )   // Sprites
850		AM_RANGE(0x1c0000, 0x1c0007) AM_READ( cave_irq_cause_r      )   // IRQ Cause
851		//  AM_RANGE(0x200000, 0x207fff) AM_READ( SMH_RAM               )   // Palette
852		//  AM_RANGE(0x240000, 0x240003) AM_DEVREAD8( "ymz", ymz280b_r, 0x00ff )   // YMZ280
853		AM_RANGE(0x280000, 0x280001) AM_READ_PORT("IN0"            )   // Inputs + ???
854		AM_RANGE(0x280002, 0x280003) AM_READ_PORT("IN1"            )   // Inputs + EEPROM
855		AM_RANGE(0x300000, 0x30ffff) AM_READ( SMH_RAM            )   // RAM
	738	static ADDRESS_MAP_START( korokoro_map, ADDRESS_SPACE_PROGRAM, 16 )
	739	AM_RANGE(0x000000, 0x07ffff) AM_ROM                                                      // ROM
	740	//  AM_RANGE(0x100000, 0x107fff) AM_READ(SMH_RAM)                                                           // Layer 0
	741	AM_RANGE(0x100000, 0x107fff) AM_WRITE(cave_vram_0_w) AM_BASE(&cave_vram_0)                        // Layer 0
	742	//  AM_RANGE(0x140000, 0x140005) AM_READ(SMH_RAM)                                                           // Layer 0 Control
	743	AM_RANGE(0x140000, 0x140005) AM_WRITE(SMH_RAM) AM_BASE(&cave_vctrl_0)                           // Layer 0 Control
	744	//  AM_RANGE(0x180000, 0x187fff) AM_READ(SMH_RAM)                                                           // Sprites
	745	AM_RANGE(0x180000, 0x187fff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)         // Sprites
	746	AM_RANGE(0x1c0000, 0x1c0007) AM_READ(cave_irq_cause_r)                                       // IRQ Cause
	747	AM_RANGE(0x1c0000, 0x1c007f) AM_WRITE(SMH_RAM) AM_BASE(&cave_videoregs)                           // Video Regs
	748	//  AM_RANGE(0x200000, 0x207fff) AM_READ(SMH_RAM)                                                           // Palette
	749	AM_RANGE(0x200000, 0x207fff) AM_WRITE(SMH_RAM) AM_BASE(&paletteram16) AM_SIZE(&cave_paletteram_size)   // Palette
	750	//  AM_RANGE(0x240000, 0x240003) AM_DEVREAD8( "ymz", ymz280b_r, 0x00ff)                                     // YMZ280
	751	AM_RANGE(0x240000, 0x240003) AM_DEVWRITE8( "ymz", ymz280b_w, 0x00ff)                           // YMZ280
	752	AM_RANGE(0x280000, 0x280001) AM_READ_PORT("IN0")                                          // Inputs + ???
	753	AM_RANGE(0x280002, 0x280003) AM_READ_PORT("IN1")                                          // Inputs + EEPROM
	754	AM_RANGE(0x280008, 0x280009) AM_WRITE(korokoro_leds_w)
	755	AM_RANGE(0x28000a, 0x28000b) AM_WRITE(korokoro_eeprom_msb_w)                                 // EEPROM
	756	AM_RANGE(0x28000c, 0x28000d) AM_WRITE(SMH_NOP)                                             // 0 (watchdog?)
	757	AM_RANGE(0x300000, 0x30ffff) AM_RAM                                                      // RAM
856	758	ADDRESS_MAP_END
857	759
858		static ADDRESS_MAP_START( korokoro_writemem, ADDRESS_SPACE_PROGRAM, 16 )
859		AM_RANGE(0x000000, 0x07ffff) AM_WRITE( SMH_ROM            )   // ROM
860		AM_RANGE(0x100000, 0x107fff) AM_WRITE( cave_vram_0_w      ) AM_BASE( &cave_vram_0      )   // Layer 0
861		AM_RANGE(0x140000, 0x140005) AM_WRITE( SMH_RAM            ) AM_BASE( &cave_vctrl_0   )   // Layer 0 Control
862		AM_RANGE(0x180000, 0x187fff) AM_WRITE( SMH_RAM            ) AM_BASE( &spriteram16      ) AM_SIZE(&spriteram_size   )   // Sprites
863		AM_RANGE(0x1c0000, 0x1c007f) AM_WRITE( SMH_RAM            ) AM_BASE( &cave_videoregs   )   // Video Regs
864		AM_RANGE(0x200000, 0x207fff) AM_WRITE( SMH_RAM   ) AM_BASE(&paletteram16) AM_SIZE(&cave_paletteram_size)   // Palette
865		AM_RANGE(0x240000, 0x240003) AM_DEVWRITE8( "ymz", ymz280b_w, 0x00ff)   // YMZ280
866		AM_RANGE(0x280008, 0x280009) AM_WRITE( korokoro_leds_w         )
867		AM_RANGE(0x28000a, 0x28000b) AM_WRITE( korokoro_eeprom_msb_w   )   // EEPROM
868		AM_RANGE(0x28000c, 0x28000d) AM_WRITE( SMH_NOP               )   // 0 (watchdog?)
869		AM_RANGE(0x300000, 0x30ffff) AM_WRITE( SMH_RAM               )   // RAM
870		ADDRESS_MAP_END
871	760
872
873	761	/***************************************************************************
874	762	Mazinger Z
875	763	***************************************************************************/
876	764
877		static ADDRESS_MAP_START( mazinger_readmem, ADDRESS_SPACE_PROGRAM, 16 )
878		AM_RANGE(0x000000, 0x07ffff) AM_READ(SMH_ROM            )   // ROM
879		AM_RANGE(0x100000, 0x10ffff) AM_READ(SMH_RAM            )   // RAM
880		/**/AM_RANGE(0x200000, 0x207fff) AM_READ(SMH_RAM            )   // Sprites
881		/**/AM_RANGE(0x208000, 0x20ffff) AM_READ(SMH_RAM            )   // Sprites?
882		AM_RANGE(0x300000, 0x300007) AM_READ(cave_irq_cause_r      )   // IRQ Cause
883		AM_RANGE(0x30006e, 0x30006f) AM_READ(soundlatch_ack_r      )   // From Sound CPU
884		/**/AM_RANGE(0x404000, 0x407fff) AM_READ(SMH_RAM            )   // Layer 1
885		/**/AM_RANGE(0x504000, 0x507fff) AM_READ(SMH_RAM            )   // Layer 0
886		/**/AM_RANGE(0x600000, 0x600005) AM_READ(SMH_RAM            )   // Layer 1 Control
887		/**/AM_RANGE(0x700000, 0x700005) AM_READ(SMH_RAM            )   // Layer 0 Control
888		AM_RANGE(0x800000, 0x800001) AM_READ_PORT("IN0"            )   // Inputs
889		AM_RANGE(0x800002, 0x800003) AM_READ_PORT("IN1"            )   // Inputs + EEPROM
890		/**/AM_RANGE(0xc08000, 0xc0ffff) AM_READ(SMH_RAM            )   // Palette
891		AM_RANGE(0xd00000, 0xd7ffff) AM_READ(SMH_BANK1            )   // ROM
	765	static ADDRESS_MAP_START( mazinger_map, ADDRESS_SPACE_PROGRAM, 16 )
	766	AM_RANGE(0x000000, 0x07ffff) AM_ROM                                             // ROM
	767	AM_RANGE(0x100000, 0x10ffff) AM_RAM                                             // RAM
	768	/**/AM_RANGE(0x200000, 0x207fff) AM_RAM AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)         // Sprites
	769	/**/AM_RANGE(0x208000, 0x20ffff) AM_RAM AM_BASE(&cave_spriteram16_2)                     // Sprites?
	770	AM_RANGE(0x300000, 0x300007) AM_READ(cave_irq_cause_r)                              // IRQ Cause
	771	AM_RANGE(0x300068, 0x300069) AM_WRITE(watchdog_reset16_w)                           // Watchdog
	772	AM_RANGE(0x30006e, 0x30006f) AM_READWRITE(soundlatch_ack_r, sound_cmd_w)               // From Sound CPU
	773	AM_RANGE(0x300000, 0x30007f) AM_WRITE(SMH_RAM) AM_BASE(&cave_videoregs)                  // Video Regs
	774	AM_RANGE(0x400000, 0x407fff) AM_RAM_WRITE(cave_vram_1_8x8_w) AM_BASE(&cave_vram_1)         // Layer 1
	775	/**/AM_RANGE(0x500000, 0x507fff) AM_RAM_WRITE(cave_vram_0_8x8_w) AM_BASE(&cave_vram_0)         // Layer 0
	776	/**/AM_RANGE(0x600000, 0x600005) AM_RAM AM_BASE(&cave_vctrl_1)                           // Layer 1 Control
	777	/**/AM_RANGE(0x700000, 0x700005) AM_RAM AM_BASE(&cave_vctrl_0)                           // Layer 0 Control
	778	AM_RANGE(0x800000, 0x800001) AM_READ_PORT("IN0")                                 // Inputs
	779	AM_RANGE(0x800002, 0x800003) AM_READ_PORT("IN1")                                 // Inputs + EEPROM
	780	AM_RANGE(0x900000, 0x900001) AM_WRITE(cave_eeprom_msb_w)                           // EEPROM
	781	/**/AM_RANGE(0xc08000, 0xc0ffff) AM_RAM AM_BASE(&paletteram16) AM_SIZE(&cave_paletteram_size)   // Palette
	782	AM_RANGE(0xd00000, 0xd7ffff) AM_ROMBANK(1)                                       // ROM
892	783	ADDRESS_MAP_END
893	784
894		static ADDRESS_MAP_START( mazinger_writemem, ADDRESS_SPACE_PROGRAM, 16 )
895		AM_RANGE(0x000000, 0x07ffff) AM_WRITE(SMH_ROM                     )   // ROM
896		AM_RANGE(0x100000, 0x10ffff) AM_WRITE(SMH_RAM                     )   // RAM
897		AM_RANGE(0x200000, 0x207fff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)   // Sprites
898		AM_RANGE(0x208000, 0x20ffff) AM_WRITE(SMH_RAM) AM_BASE(&cave_spriteram16_2)
899		AM_RANGE(0x300068, 0x300069) AM_WRITE(watchdog_reset16_w            )   // Watchdog
900		AM_RANGE(0x30006e, 0x30006f) AM_WRITE(sound_cmd_w                  )   // To Sound CPU
901		AM_RANGE(0x300000, 0x30007f) AM_WRITE(SMH_RAM) AM_BASE(&cave_videoregs   )   // Video Regs
902		AM_RANGE(0x400000, 0x407fff) AM_WRITE(cave_vram_1_8x8_w) AM_BASE(&cave_vram_1   )   // Layer 1
903		AM_RANGE(0x500000, 0x507fff) AM_WRITE(cave_vram_0_8x8_w) AM_BASE(&cave_vram_0   )   // Layer 0
904		AM_RANGE(0x600000, 0x600005) AM_WRITE(SMH_RAM) AM_BASE(&cave_vctrl_1         )   // Layer 1 Control
905		AM_RANGE(0x700000, 0x700005) AM_WRITE(SMH_RAM) AM_BASE(&cave_vctrl_0         )   // Layer 0 Control
906		AM_RANGE(0x900000, 0x900001) AM_WRITE(cave_eeprom_msb_w               )   // EEPROM
907		AM_RANGE(0xc08000, 0xc0ffff) AM_WRITE(SMH_RAM) AM_BASE(&paletteram16) AM_SIZE(&cave_paletteram_size)   // Palette
908		AM_RANGE(0xd00000, 0xd7ffff) AM_WRITE(SMH_ROM                     )   // ROM
909		ADDRESS_MAP_END
910	785
911
912	786	/***************************************************************************
913	787	Metamoqester
914	788	***************************************************************************/
915	789
916		static ADDRESS_MAP_START( metmqstr_readmem, ADDRESS_SPACE_PROGRAM, 16 )
917		AM_RANGE(0x000000, 0x07ffff) AM_READ(SMH_ROM            )   // ROM
918		AM_RANGE(0x100000, 0x17ffff) AM_READ(SMH_ROM            )   // ROM
919		AM_RANGE(0x200000, 0x27ffff) AM_READ(SMH_ROM            )   // ROM
920		AM_RANGE(0x408000, 0x408fff) AM_READ(SMH_RAM            )   // Palette
921		AM_RANGE(0x600000, 0x600001) AM_READ(watchdog_reset16_r      )   // Watchdog?
922		AM_RANGE(0x880000, 0x887fff) AM_READ(SMH_RAM            )   // Layer 2
923		AM_RANGE(0x888000, 0x88ffff) AM_READ(SMH_RAM            )   //
924		AM_RANGE(0x900000, 0x907fff) AM_READ(SMH_RAM            )   // Layer 1
925		AM_RANGE(0x908000, 0x90ffff) AM_READ(SMH_RAM            )   //
926		AM_RANGE(0x980000, 0x987fff) AM_READ(SMH_RAM            )   // Layer 0
927		AM_RANGE(0x988000, 0x98ffff) AM_READ(SMH_RAM            )   //
928		AM_RANGE(0xa80000, 0xa80007) AM_READ(cave_irq_cause_r      )   // IRQ Cause
929		AM_RANGE(0xa8006c, 0xa8006d) AM_READ(soundflags_ack_r      )   // Communication
930		AM_RANGE(0xa8006e, 0xa8006f) AM_READ(soundlatch_ack_r      )   // From Sound CPU
931		/**/AM_RANGE(0xb00000, 0xb00005) AM_READ(SMH_RAM            )   // Layer 0 Control
932		/**/AM_RANGE(0xb80000, 0xb80005) AM_READ(SMH_RAM            )   // Layer 1 Control
933		/**/AM_RANGE(0xc00000, 0xc00005) AM_READ(SMH_RAM            )   // Layer 2 Control
934		AM_RANGE(0xc80000, 0xc80001) AM_READ_PORT("IN0"            )   // Inputs
935		AM_RANGE(0xc80002, 0xc80003) AM_READ_PORT("IN1"            )   // Inputs + EEPROM
936		AM_RANGE(0xf00000, 0xf07fff) AM_READ(SMH_RAM            )   // Sprites
937		AM_RANGE(0xf08000, 0xf0ffff) AM_READ(SMH_RAM            )   // RAM
	790	static ADDRESS_MAP_START( metmqstr_map, ADDRESS_SPACE_PROGRAM, 16 )
	791	AM_RANGE(0x000000, 0x07ffff) AM_ROM                                             // ROM
	792	AM_RANGE(0x100000, 0x17ffff) AM_ROM                                             // ROM
	793	AM_RANGE(0x200000, 0x27ffff) AM_ROM                                             // ROM
	794	AM_RANGE(0x408000, 0x408fff) AM_RAM AM_BASE(&paletteram16) AM_SIZE(&cave_paletteram_size)   // Palette
	795	AM_RANGE(0x600000, 0x600001) AM_READ(watchdog_reset16_r)   // Watchdog?
	796	AM_RANGE(0x880000, 0x887fff) AM_RAM_WRITE(cave_vram_2_w) AM_BASE(&cave_vram_2)            // Layer 2
	797	AM_RANGE(0x888000, 0x88ffff) AM_RAM                                             //
	798	AM_RANGE(0x900000, 0x907fff) AM_RAM_WRITE(cave_vram_2_w) AM_BASE(&cave_vram_2)            // Layer 1
	799	AM_RANGE(0x908000, 0x90ffff) AM_RAM                                             //
	800	AM_RANGE(0x980000, 0x987fff) AM_RAM_WRITE(cave_vram_2_w) AM_BASE(&cave_vram_2)            // Layer 0
	801	AM_RANGE(0x988000, 0x98ffff) AM_RAM                                             //
	802	AM_RANGE(0xa80000, 0xa80007) AM_READ(cave_irq_cause_r)                              // IRQ Cause
	803	AM_RANGE(0xa80068, 0xa80069) AM_WRITE(watchdog_reset16_w)                           // Watchdog?
	804	AM_RANGE(0xa8006c, 0xa8006d) AM_READWRITE(soundflags_ack_r, SMH_NOP)                  // Communication
	805	AM_RANGE(0xa8006e, 0xa8006f) AM_READWRITE(soundlatch_ack_r, sound_cmd_w)               // From Sound CPU
	806	AM_RANGE(0xa80000, 0xa8007f) AM_WRITE(SMH_RAM) AM_BASE(&cave_videoregs)                  // Video Regs
	807	/**/AM_RANGE(0xb00000, 0xb00005) AM_RAM AM_BASE(&cave_vctrl_2)                           // Layer 2 Control
	808	/**/AM_RANGE(0xb80000, 0xb80005) AM_RAM AM_BASE(&cave_vctrl_1)                           // Layer 1 Control
	809	/**/AM_RANGE(0xc00000, 0xc00005) AM_RAM AM_BASE(&cave_vctrl_0)                           // Layer 0 Control
	810	AM_RANGE(0xc80000, 0xc80001) AM_READ_PORT("IN0")                                 // Inputs
	811	AM_RANGE(0xc80002, 0xc80003) AM_READ_PORT("IN1")                                 // Inputs + EEPROM
	812	AM_RANGE(0xd00000, 0xd00001) AM_WRITE(metmqstr_eeprom_msb_w)                        // EEPROM
	813	AM_RANGE(0xf00000, 0xf07fff) AM_RAM AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)         // Sprites
	814	AM_RANGE(0xf08000, 0xf0ffff) AM_RAM AM_BASE(&cave_spriteram16_2)                     // RAM
938	815	ADDRESS_MAP_END
939	816
940		static ADDRESS_MAP_START( metmqstr_writemem, ADDRESS_SPACE_PROGRAM, 16 )
941		AM_RANGE(0x000000, 0x07ffff) AM_WRITE(SMH_ROM                  )   // ROM
942		AM_RANGE(0x100000, 0x17ffff) AM_WRITE(SMH_ROM                  )   // ROM
943		AM_RANGE(0x200000, 0x27ffff) AM_WRITE(SMH_ROM                  )   // ROM
944		AM_RANGE(0x408000, 0x408fff) AM_WRITE(SMH_RAM) AM_BASE(&paletteram16) AM_SIZE(&cave_paletteram_size)   // Palette
945		AM_RANGE(0x880000, 0x887fff) AM_WRITE(cave_vram_2_w) AM_BASE(&cave_vram_2   )   // Layer 2
946		AM_RANGE(0x888000, 0x88ffff) AM_WRITE(SMH_RAM                        )   //
947		AM_RANGE(0x900000, 0x907fff) AM_WRITE(cave_vram_1_w) AM_BASE(&cave_vram_1   )   // Layer 1
948		AM_RANGE(0x908000, 0x90ffff) AM_WRITE(SMH_RAM                        )   //
949		AM_RANGE(0x980000, 0x987fff) AM_WRITE(cave_vram_0_w) AM_BASE(&cave_vram_0   )   // Layer 0
950		AM_RANGE(0x988000, 0x98ffff) AM_WRITE(SMH_RAM                        )   //
951		AM_RANGE(0xa80068, 0xa80069) AM_WRITE(watchdog_reset16_w               )   // Watchdog?
952		AM_RANGE(0xa8006c, 0xa8006d) AM_WRITE(SMH_NOP                        )   // ?
953		AM_RANGE(0xa8006e, 0xa8006f) AM_WRITE(sound_cmd_w                     )   // To Sound CPU
954		AM_RANGE(0xa80000, 0xa8007f) AM_WRITE(SMH_RAM) AM_BASE(&cave_videoregs      )   // Video Regs
955		AM_RANGE(0xb00000, 0xb00005) AM_WRITE(SMH_RAM) AM_BASE(&cave_vctrl_2      )   // Layer 2 Control
956		AM_RANGE(0xb80000, 0xb80005) AM_WRITE(SMH_RAM) AM_BASE(&cave_vctrl_1      )   // Layer 1 Control
957		AM_RANGE(0xc00000, 0xc00005) AM_WRITE(SMH_RAM) AM_BASE(&cave_vctrl_0      )   // Layer 0 Control
958		AM_RANGE(0xd00000, 0xd00001) AM_WRITE(metmqstr_eeprom_msb_w               )   // EEPROM
959		AM_RANGE(0xf00000, 0xf07fff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)   // Sprites
960		AM_RANGE(0xf08000, 0xf0ffff) AM_WRITE(SMH_RAM) AM_BASE(&cave_spriteram16_2)
961		ADDRESS_MAP_END
962	817
963
964	818	/***************************************************************************
965	819	Power Instinct 2
966	820	***************************************************************************/
r4679	r4680
990	844	static WRITE16_HANDLER( pwrinst2_vctrl_2_w )   { vctrl_w(cave_vctrl_2, offset, data, mem_mask); }
991	845	static WRITE16_HANDLER( pwrinst2_vctrl_3_w )   { vctrl_w(cave_vctrl_3, offset, data, mem_mask); }
992	846
993		static ADDRESS_MAP_START( pwrinst2_readmem, ADDRESS_SPACE_PROGRAM, 16 )
994		AM_RANGE(0x000000, 0x1fffff) AM_READ(SMH_ROM               )   // ROM
995		AM_RANGE(0x400000, 0x40ffff) AM_READ(SMH_RAM               )   // RAM
996		AM_RANGE(0x500000, 0x500001) AM_READ_PORT("IN0"               )   // Inputs
997		AM_RANGE(0x500002, 0x500003) AM_READ_PORT("IN1"               )   //
998		AM_RANGE(0x600000, 0x6fffff) AM_READ(SMH_ROM) AM_REGION("user1", 0)   // extra data ROM space
999		AM_RANGE(0x800000, 0x807fff) AM_READ(SMH_RAM               )   // Layer 2
1000		AM_RANGE(0x880000, 0x887fff) AM_READ(SMH_RAM               )   // Layer 0
1001		AM_RANGE(0x900000, 0x907fff) AM_READ(SMH_RAM               )   // Layer 1
1002		AM_RANGE(0x980000, 0x987fff) AM_READ(SMH_RAM               )   // Layer 3
1003		AM_RANGE(0xa00000, 0xa07fff) AM_READ(SMH_RAM               )   // Sprites
1004		AM_RANGE(0xa08000, 0xa0ffff) AM_READ(SMH_RAM               )   // Sprites?
1005		AM_RANGE(0xa10000, 0xa1ffff) AM_READ(SMH_RAM               )   // Sprites?
1006		/**/AM_RANGE(0xb00000, 0xb00005) AM_READ(SMH_RAM               )   // Layer 2 Control
1007		/**/AM_RANGE(0xb80000, 0xb80005) AM_READ(SMH_RAM               )   // Layer 0 Control
1008		/**/AM_RANGE(0xc00000, 0xc00005) AM_READ(SMH_RAM               )   // Layer 1 Control
1009		/**/AM_RANGE(0xc80000, 0xc80005) AM_READ(SMH_RAM               )   // Layer 3 Control
1010		AM_RANGE(0xa80000, 0xa8007f) AM_READ(donpachi_videoregs_r      )   // Video Regs
1011		AM_RANGE(0xd80000, 0xd80001) AM_READ(soundlatch_ack_r         )   // ? From Sound CPU
1012		AM_RANGE(0xe80000, 0xe80001) AM_READ(pwrinst2_eeprom_r         )   // EEPROM
1013		AM_RANGE(0xf00000, 0xf04fff) AM_READ(SMH_RAM               )   // Palette
	847	static ADDRESS_MAP_START( pwrinst2_map, ADDRESS_SPACE_PROGRAM, 16 )
	848	AM_RANGE(0x000000, 0x1fffff) AM_ROM                                                   // ROM
	849	AM_RANGE(0x400000, 0x40ffff) AM_RAM                                                   // RAM
	850	AM_RANGE(0x500000, 0x500001) AM_READ_PORT("IN0")                                       // Inputs
	851	AM_RANGE(0x500002, 0x500003) AM_READ_PORT("IN1")                                       //
	852	AM_RANGE(0x600000, 0x6fffff) AM_READ(SMH_ROM) AM_REGION("user1", 0)                           // extra data ROM space
	853	AM_RANGE(0x700000, 0x700001) AM_WRITE(cave_eeprom_msb_w)                                 // EEPROM
	854	AM_RANGE(0x800000, 0x807fff) AM_RAM_WRITE(cave_vram_2_w) AM_BASE(&cave_vram_2)                  // Layer 2
	855	AM_RANGE(0x880000, 0x887fff) AM_RAM_WRITE(cave_vram_0_w) AM_BASE(&cave_vram_0)                  // Layer 0
	856	AM_RANGE(0x900000, 0x907fff) AM_RAM_WRITE(cave_vram_1_w) AM_BASE(&cave_vram_1)                  // Layer 1
	857	AM_RANGE(0x980000, 0x987fff) AM_RAM_WRITE(cave_vram_3_8x8_w) AM_BASE(&cave_vram_3)               // Layer 3
	858	AM_RANGE(0xa00000, 0xa07fff) AM_RAM AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)               // Sprites
	859	AM_RANGE(0xa08000, 0xa0ffff) AM_RAM AM_BASE(&cave_spriteram16_2)                           // Sprites?
	860	AM_RANGE(0xa10000, 0xa1ffff) AM_RAM                                                   // Sprites?
	861	AM_RANGE(0xa80000, 0xa8007f) AM_READWRITE(donpachi_videoregs_r, SMH_RAM) AM_BASE(&cave_videoregs)   // Video Regs
	862	/**/AM_RANGE(0xb00000, 0xb00005) AM_RAM_WRITE(pwrinst2_vctrl_2_w) AM_BASE(&cave_vctrl_2)            // Layer 2 Control
	863	/**/AM_RANGE(0xb80000, 0xb80005) AM_RAM_WRITE(pwrinst2_vctrl_0_w) AM_BASE(&cave_vctrl_0)            // Layer 0 Control
	864	/**/AM_RANGE(0xc00000, 0xc00005) AM_RAM_WRITE(pwrinst2_vctrl_1_w) AM_BASE(&cave_vctrl_1)            // Layer 1 Control
	865	/**/AM_RANGE(0xc80000, 0xc80005) AM_RAM_WRITE(pwrinst2_vctrl_3_w) AM_BASE(&cave_vctrl_3)            // Layer 3 Control
	866	AM_RANGE(0xd80000, 0xd80001) AM_READ(soundlatch_ack_r)                                    // ? From Sound CPU
	867	AM_RANGE(0xe00000, 0xe00001) AM_WRITE(sound_cmd_w)                                       // To Sound CPU
	868	AM_RANGE(0xe80000, 0xe80001) AM_READ(pwrinst2_eeprom_r)                                    // EEPROM
	869	AM_RANGE(0xf00000, 0xf04fff) AM_RAM AM_BASE(&paletteram16) AM_SIZE(&cave_paletteram_size)         // Palette
1014	870	ADDRESS_MAP_END
1015	871
1016		static ADDRESS_MAP_START( pwrinst2_writemem, ADDRESS_SPACE_PROGRAM, 16 )
1017		AM_RANGE(0x000000, 0x1fffff) AM_WRITE(SMH_ROM                        )   // ROM
1018		AM_RANGE(0x400000, 0x40ffff) AM_WRITE(SMH_RAM                        )   // RAM
1019		AM_RANGE(0x700000, 0x700001) AM_WRITE(cave_eeprom_msb_w                  )   // EEPROM
1020		AM_RANGE(0x800000, 0x807fff) AM_WRITE(cave_vram_2_w) AM_BASE(&cave_vram_2   )   // Layer 2
1021		AM_RANGE(0x880000, 0x887fff) AM_WRITE(cave_vram_0_w) AM_BASE(&cave_vram_0   )   // Layer 0
1022		AM_RANGE(0x900000, 0x907fff) AM_WRITE(cave_vram_1_w) AM_BASE(&cave_vram_1   )   // Layer 1
1023		AM_RANGE(0x980000, 0x987fff) AM_WRITE(cave_vram_3_8x8_w) AM_BASE(&cave_vram_3)   // Layer 3
1024		AM_RANGE(0xa00000, 0xa07fff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16) AM_SIZE(&spriteram_size   )   // Sprites
1025		AM_RANGE(0xa08000, 0xa0ffff) AM_WRITE(SMH_RAM) AM_BASE(&cave_spriteram16_2)
1026		AM_RANGE(0xa10000, 0xa1ffff) AM_WRITE(SMH_RAM                        )   // Sprites?
1027		AM_RANGE(0xa80000, 0xa8007f) AM_WRITE(SMH_RAM) AM_BASE(&cave_videoregs      )   // Video Regs
1028		AM_RANGE(0xb00000, 0xb00005) AM_WRITE(pwrinst2_vctrl_2_w) AM_BASE(&cave_vctrl_2         )   // Layer 2 Control
1029		AM_RANGE(0xb80000, 0xb80005) AM_WRITE(pwrinst2_vctrl_0_w) AM_BASE(&cave_vctrl_0         )   // Layer 0 Control
1030		AM_RANGE(0xc00000, 0xc00005) AM_WRITE(pwrinst2_vctrl_1_w) AM_BASE(&cave_vctrl_1         )   // Layer 1 Control
1031		AM_RANGE(0xc80000, 0xc80005) AM_WRITE(pwrinst2_vctrl_3_w) AM_BASE(&cave_vctrl_3         )   // Layer 3 Control
1032		AM_RANGE(0xe00000, 0xe00001) AM_WRITE(sound_cmd_w                     )   // To Sound CPU
1033		AM_RANGE(0xf00000, 0xf04fff) AM_WRITE(SMH_RAM) AM_BASE(&paletteram16) AM_SIZE(&cave_paletteram_size)   // Palette
1034		ADDRESS_MAP_END
1035	872
1036
1037	873	/***************************************************************************
1038	874	Sailor Moon
1039	875	***************************************************************************/
r4679	r4680
1058	894	return irq_cause;
1059	895	}
1060	896
1061		static ADDRESS_MAP_START( sailormn_readmem, ADDRESS_SPACE_PROGRAM, 16 )
1062		AM_RANGE(0x000000, 0x07ffff) AM_READ(SMH_ROM            )   // ROM
1063		AM_RANGE(0x100000, 0x10ffff) AM_READ(SMH_RAM            )   // RAM
1064		AM_RANGE(0x110000, 0x110001) AM_READ(SMH_RAM            )   // (agallet)
1065		AM_RANGE(0x200000, 0x3fffff) AM_READ(SMH_ROM            )   // ROM
1066		AM_RANGE(0x400000, 0x407fff) AM_READ(SMH_RAM            )   // (agallet)
1067		AM_RANGE(0x408000, 0x40bfff) AM_READ(SMH_RAM            )   // Palette
1068		AM_RANGE(0x40c000, 0x40ffff) AM_READ(SMH_RAM            )   // (agallet)
1069		AM_RANGE(0x410000, 0x410001) AM_READ(SMH_RAM            )   // (agallet)
1070		AM_RANGE(0x500000, 0x507fff) AM_READ(SMH_RAM            )   // Sprites
1071		AM_RANGE(0x508000, 0x50ffff) AM_READ(SMH_RAM            )   // Sprites?
1072		AM_RANGE(0x510000, 0x510001) AM_READ(SMH_RAM            )   // (agallet)
1073		AM_RANGE(0x600000, 0x600001) AM_READ(sailormn_input0_r      )   // Inputs + Watchdog!
1074		AM_RANGE(0x600002, 0x600003) AM_READ_PORT("IN1"            )   // Inputs + EEPROM
1075		AM_RANGE(0x800000, 0x887fff) AM_READ(SMH_RAM            )   // Layer 0
1076		AM_RANGE(0x880000, 0x887fff) AM_READ(SMH_RAM            )   // Layer 1
1077		AM_RANGE(0x900000, 0x907fff) AM_READ(SMH_RAM            )   // Layer 2
1078		AM_RANGE(0x908000, 0x908001) AM_READ(SMH_RAM            )   // (agallet)
1079		/**/AM_RANGE(0xa00000, 0xa00005) AM_READ(SMH_RAM            )   // Layer 0 Control
1080		/**/AM_RANGE(0xa80000, 0xa80005) AM_READ(SMH_RAM            )   // Layer 1 Control
1081		/**/AM_RANGE(0xb00000, 0xb00005) AM_READ(SMH_RAM            )   // Layer 2 Control
1082		AM_RANGE(0xb80000, 0xb80007) AM_READ(cave_irq_cause_r      )   // IRQ Cause (bit 2 tested!)
1083		AM_RANGE(0xb8006c, 0xb8006d) AM_READ(soundflags_ack_r      )   // Communication
1084		AM_RANGE(0xb8006e, 0xb8006f) AM_READ(soundlatch_ack_r      )   // From Sound CPU
	897	static ADDRESS_MAP_START( sailormn_map, ADDRESS_SPACE_PROGRAM, 16 )
	898	AM_RANGE(0x000000, 0x07ffff) AM_ROM                                                   // ROM
	899	AM_RANGE(0x100000, 0x10ffff) AM_RAM                                                   // RAM
	900	AM_RANGE(0x110000, 0x110001) AM_RAM                                                   // (agallet)
	901	AM_RANGE(0x200000, 0x3fffff) AM_ROM                                                   // ROM
	902	AM_RANGE(0x400000, 0x407fff) AM_RAM                                                   // (agallet)
	903	AM_RANGE(0x408000, 0x40bfff) AM_RAM AM_BASE(&paletteram16) AM_SIZE(&cave_paletteram_size)         // Palette
	904	AM_RANGE(0x40c000, 0x40ffff) AM_RAM                                                   // (agallet)
	905	AM_RANGE(0x410000, 0x410001) AM_RAM                                                   // (agallet)
	906	AM_RANGE(0x500000, 0x507fff) AM_RAM AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)               // Sprites
	907	AM_RANGE(0x508000, 0x50ffff) AM_RAM AM_BASE(&cave_spriteram16_2)                           // Sprites?
	908	AM_RANGE(0x510000, 0x510001) AM_RAM                                                   // (agallet)
	909	AM_RANGE(0x600000, 0x600001) AM_READ(sailormn_input0_r)                                    // Inputs + Watchdog!
	910	AM_RANGE(0x600002, 0x600003) AM_READ_PORT("IN1")                                       // Inputs + EEPROM
	911	AM_RANGE(0x700000, 0x700001) AM_WRITE(sailormn_eeprom_msb_w)                              // EEPROM
	912	AM_RANGE(0x800000, 0x887fff) AM_RAM_WRITE(cave_vram_0_w) AM_BASE(&cave_vram_0)                  // Layer 0
	913	AM_RANGE(0x880000, 0x887fff) AM_RAM_WRITE(cave_vram_1_w) AM_BASE(&cave_vram_1)                  // Layer 1
	914	AM_RANGE(0x900000, 0x907fff) AM_RAM_WRITE(cave_vram_2_w) AM_BASE(&cave_vram_2)                  // Layer 2
	915	AM_RANGE(0x908000, 0x908001) AM_RAM                                                   // (agallet)
	916	/**/AM_RANGE(0xa00000, 0xa00005) AM_RAM AM_BASE(&cave_vctrl_0)                                 // Layer 0 Control
	917	/**/AM_RANGE(0xa80000, 0xa80005) AM_RAM AM_BASE(&cave_vctrl_1)                                 // Layer 1 Control
	918	/**/AM_RANGE(0xb00000, 0xb00005) AM_RAM AM_BASE(&cave_vctrl_2)                                 // Layer 2 Control
	919	AM_RANGE(0xb80000, 0xb80007) AM_READ(cave_irq_cause_r)                                    // IRQ Cause (bit 2 tested!)
	920	AM_RANGE(0xb8006c, 0xb8006d) AM_READ(soundflags_ack_r)                                    // Communication
	921	AM_RANGE(0xb8006e, 0xb8006f) AM_READ(soundlatch_ack_r)                                    // From Sound CPU
	922	AM_RANGE(0xb8006e, 0xb8006f) AM_WRITE(sound_cmd_w)                                       // To Sound CPU
	923	AM_RANGE(0xb80000, 0xb8007f) AM_WRITE(SMH_RAM) AM_BASE(&cave_videoregs)                        // Video Regs
1085	924	ADDRESS_MAP_END
1086	925
1087		static ADDRESS_MAP_START( sailormn_writemem, ADDRESS_SPACE_PROGRAM, 16 )
1088		AM_RANGE(0x000000, 0x07ffff) AM_WRITE(SMH_ROM                        )   // ROM
1089		AM_RANGE(0x100000, 0x10ffff) AM_WRITE(SMH_RAM                        )   // RAM
1090		AM_RANGE(0x110000, 0x110001) AM_WRITE(SMH_RAM                        )   // (agallet)
1091		AM_RANGE(0x200000, 0x3fffff) AM_WRITE(SMH_ROM                        )   // ROM
1092		AM_RANGE(0x400000, 0x407fff) AM_WRITE(SMH_RAM                        )   // (agallet)
1093		AM_RANGE(0x408000, 0x40bfff) AM_WRITE(SMH_RAM) AM_BASE(&paletteram16) AM_SIZE(&cave_paletteram_size)   // Palette
1094		AM_RANGE(0x40c000, 0x40ffff) AM_WRITE(SMH_RAM                        )   // (agallet)
1095		AM_RANGE(0x410000, 0x410001) AM_WRITE(SMH_RAM                        )   // (agallet)
1096		AM_RANGE(0x500000, 0x507fff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)   // Sprites
1097		AM_RANGE(0x508000, 0x50ffff) AM_WRITE(SMH_RAM) AM_BASE(&cave_spriteram16_2)
1098		AM_RANGE(0x510000, 0x510001) AM_WRITE(SMH_RAM                        )   // (agallet)
1099		AM_RANGE(0x700000, 0x700001) AM_WRITE(sailormn_eeprom_msb_w               )   // EEPROM
1100		AM_RANGE(0x800000, 0x807fff) AM_WRITE(cave_vram_0_w) AM_BASE(&cave_vram_0   )   // Layer 0
1101		AM_RANGE(0x880000, 0x887fff) AM_WRITE(cave_vram_1_w) AM_BASE(&cave_vram_1   )   // Layer 1
1102		AM_RANGE(0x900000, 0x907fff) AM_WRITE(cave_vram_2_w) AM_BASE(&cave_vram_2   )   // Layer 2
1103		AM_RANGE(0x908000, 0x908001) AM_WRITE(SMH_RAM                        )   // (agallet)
1104		AM_RANGE(0xa00000, 0xa00005) AM_WRITE(SMH_RAM) AM_BASE(&cave_vctrl_0      )   // Layer 0 Control
1105		AM_RANGE(0xa80000, 0xa80005) AM_WRITE(SMH_RAM) AM_BASE(&cave_vctrl_1      )   // Layer 1 Control
1106		AM_RANGE(0xb00000, 0xb00005) AM_WRITE(SMH_RAM) AM_BASE(&cave_vctrl_2      )   // Layer 2 Control
1107		AM_RANGE(0xb8006e, 0xb8006f) AM_WRITE(sound_cmd_w                     )   // To Sound CPU
1108		AM_RANGE(0xb80000, 0xb8007f) AM_WRITE(SMH_RAM) AM_BASE(&cave_videoregs      )   // Video Regs
1109		ADDRESS_MAP_END
1110	926
1111
1112	927	/***************************************************************************
1113	928	Uo Poko
1114	929	***************************************************************************/
1115	930
1116		static ADDRESS_MAP_START( uopoko_readmem, ADDRESS_SPACE_PROGRAM, 16 )
1117		AM_RANGE(0x000000, 0x0fffff) AM_READ(SMH_ROM            )   // ROM
1118		AM_RANGE(0x100000, 0x10ffff) AM_READ(SMH_RAM            )   // RAM
1119		AM_RANGE(0x300000, 0x300003) AM_DEVREAD8("ymz", ymz280b_r, 0x00ff)   // YMZ280
1120		/**/AM_RANGE(0x400000, 0x407fff) AM_READ(SMH_RAM            )   // Sprites
1121		/**/AM_RANGE(0x408000, 0x40ffff) AM_READ(SMH_RAM            )   // Sprites?
1122		/**/AM_RANGE(0x500000, 0x507fff) AM_READ(SMH_RAM            )   // Layer 0
1123		AM_RANGE(0x600000, 0x600007) AM_READ(cave_irq_cause_r      )   // IRQ Cause
1124		/**/AM_RANGE(0x700000, 0x700005) AM_READ(SMH_RAM            )   // Layer 0 Control
1125		/**/AM_RANGE(0x800000, 0x80ffff) AM_READ(SMH_RAM            )   // Palette
1126		AM_RANGE(0x900000, 0x900001) AM_READ_PORT("IN0"            )   // Inputs
1127		AM_RANGE(0x900002, 0x900003) AM_READ_PORT("IN1"            )   // Inputs + EEPROM
	931	static ADDRESS_MAP_START( uopoko_map, ADDRESS_SPACE_PROGRAM, 16 )
	932	AM_RANGE(0x000000, 0x0fffff) AM_ROM                                             // ROM
	933	AM_RANGE(0x100000, 0x10ffff) AM_RAM                                             // RAM
	934	AM_RANGE(0x300000, 0x300003) AM_DEVREADWRITE8("ymz", ymz280b_r, ymz280b_w, 0x00ff)         // YMZ280
	935	/**/AM_RANGE(0x400000, 0x407fff) AM_RAM AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)         // Sprites
	936	/**/AM_RANGE(0x408000, 0x40ffff) AM_RAM AM_BASE(&cave_spriteram16_2)                     // Sprites?
	937	/**/AM_RANGE(0x500000, 0x507fff) AM_RAM_WRITE(cave_vram_0_w) AM_BASE(&cave_vram_0)            // Layer 0
	938	AM_RANGE(0x600000, 0x600007) AM_READ(cave_irq_cause_r)                              // IRQ Cause
	939	AM_RANGE(0x600000, 0x60007f) AM_WRITE(SMH_RAM) AM_BASE(&cave_videoregs)                  // Video Regs
	940	/**/AM_RANGE(0x700000, 0x700005) AM_RAM AM_BASE(&cave_vctrl_0)                           // Layer 0 Control
	941	/**/AM_RANGE(0x800000, 0x80ffff) AM_RAM AM_BASE(&paletteram16) AM_SIZE(&cave_paletteram_size)   // Palette
	942	AM_RANGE(0x900000, 0x900001) AM_READ_PORT("IN0")                                 // Inputs
	943	AM_RANGE(0x900002, 0x900003) AM_READ_PORT("IN1")                                 // Inputs + EEPROM
	944	AM_RANGE(0xa00000, 0xa00001) AM_WRITE(cave_eeprom_msb_w)                           // EEPROM
1128	945	ADDRESS_MAP_END
1129	946
1130		static ADDRESS_MAP_START( uopoko_writemem, ADDRESS_SPACE_PROGRAM, 16 )
1131		AM_RANGE(0x000000, 0x0fffff) AM_WRITE(SMH_ROM                  )   // ROM
1132		AM_RANGE(0x100000, 0x10ffff) AM_WRITE(SMH_RAM                  )   // RAM
1133		AM_RANGE(0x300000, 0x300003) AM_DEVWRITE8("ymz", ymz280b_w, 0x00ff)   // YMZ280
1134		AM_RANGE(0x400000, 0x407fff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)   // Sprites
1135		AM_RANGE(0x408000, 0x40ffff) AM_WRITE(SMH_RAM) AM_BASE(&cave_spriteram16_2   )
1136		AM_RANGE(0x500000, 0x507fff) AM_WRITE(cave_vram_0_w) AM_BASE(&cave_vram_0   )   // Layer 0
1137		AM_RANGE(0x600000, 0x60007f) AM_WRITE(SMH_RAM) AM_BASE(&cave_videoregs      )   // Video Regs
1138		AM_RANGE(0x700000, 0x700005) AM_WRITE(SMH_RAM) AM_BASE(&cave_vctrl_0      )   // Layer 0 Control
1139		AM_RANGE(0x800000, 0x80ffff) AM_WRITE(SMH_RAM) AM_BASE(&paletteram16) AM_SIZE(&cave_paletteram_size)   // Palette
1140		AM_RANGE(0xa00000, 0xa00001) AM_WRITE(cave_eeprom_msb_w            )   // EEPROM
1141		ADDRESS_MAP_END
1142	947
1143	948
1144
1145	949	/***************************************************************************
1146	950
1147	951
r4679	r4680
1172	976	memcpy(RAM + 0x20000 * 1, RAM + 0x40000 + 0x20000 * bank2, 0x20000);
1173	977	}
1174	978
1175		static ADDRESS_MAP_START( hotdogst_sound_readmem, ADDRESS_SPACE_PROGRAM, 8 )
1176		AM_RANGE(0x0000, 0x3fff) AM_READ(SMH_ROM   )   // ROM
1177		AM_RANGE(0x4000, 0x7fff) AM_READ(SMH_BANK2   )   // ROM (Banked)
1178		AM_RANGE(0xe000, 0xffff) AM_READ(SMH_RAM   )   // RAM
	979	static ADDRESS_MAP_START( hotdogst_sound_map, ADDRESS_SPACE_PROGRAM, 8 )
	980	AM_RANGE(0x0000, 0x3fff) AM_ROM                        // ROM
	981	AM_RANGE(0x4000, 0x7fff) AM_ROMBANK(2)                  // ROM (Banked)
	982	AM_RANGE(0xe000, 0xffff) AM_RAM                        // RAM
1179	983	ADDRESS_MAP_END
1180	984
1181		static ADDRESS_MAP_START( hotdogst_sound_writemem, ADDRESS_SPACE_PROGRAM, 8 )
1182		AM_RANGE(0x0000, 0x3fff) AM_WRITE(SMH_ROM   )   // ROM
1183		AM_RANGE(0x4000, 0x7fff) AM_WRITE(SMH_ROM   )   // ROM (Banked)
1184		AM_RANGE(0xe000, 0xffff) AM_WRITE(SMH_RAM   )   // RAM
1185		ADDRESS_MAP_END
1186
1187		static ADDRESS_MAP_START( hotdogst_sound_readport, ADDRESS_SPACE_IO, 8 )
	985	static ADDRESS_MAP_START( hotdogst_sound_portmap, ADDRESS_SPACE_IO, 8 )
1188	986	ADDRESS_MAP_GLOBAL_MASK(0xff)
1189		AM_RANGE(0x30, 0x30) AM_READ(soundlatch_lo_r         )   // From Main CPU
1190		AM_RANGE(0x40, 0x40) AM_READ(soundlatch_hi_r         )   //
1191		AM_RANGE(0x50, 0x51) AM_DEVREAD("ym", ym2203_r   )   //
1192		AM_RANGE(0x60, 0x60) AM_DEVREAD("oki", okim6295_r)   // M6295
	987	AM_RANGE(0x00, 0x00) AM_WRITE(hotdogst_rombank_w)               // ROM bank
	988	AM_RANGE(0x30, 0x30) AM_READ(soundlatch_lo_r)                  // From Main CPU
	989	AM_RANGE(0x40, 0x40) AM_READ(soundlatch_hi_r)                  //
	990	AM_RANGE(0x50, 0x51) AM_DEVREADWRITE("ym", ym2203_r, ym2203_w)      //
	991	AM_RANGE(0x60, 0x60) AM_DEVREADWRITE("oki", okim6295_r, okim6295_w)   // M6295
	992	AM_RANGE(0x70, 0x70) AM_WRITE(hotdogst_okibank_w)               // Samples bank
1193	993	ADDRESS_MAP_END
1194	994
1195		static ADDRESS_MAP_START( hotdogst_sound_writeport, ADDRESS_SPACE_IO, 8 )
1196		ADDRESS_MAP_GLOBAL_MASK(0xff)
1197		AM_RANGE(0x00, 0x00) AM_WRITE(hotdogst_rombank_w      )   // ROM bank
1198		AM_RANGE(0x50, 0x51) AM_DEVWRITE("ym", ym2203_w   )   //
1199		AM_RANGE(0x60, 0x60) AM_DEVWRITE("oki", okim6295_w)   // M6295
1200		AM_RANGE(0x70, 0x70) AM_WRITE(hotdogst_okibank_w      )   // Samples bank
1201		ADDRESS_MAP_END
1202	995
1203
1204	996	/***************************************************************************
1205	997	Mazinger Z
1206	998	***************************************************************************/
r4679	r4680
1214	1006	memory_set_bankptr(space->machine, 2, &RAM[ 0x4000 * bank ]);
1215	1007	}
1216	1008
1217		static ADDRESS_MAP_START( mazinger_sound_readmem, ADDRESS_SPACE_PROGRAM, 8 )
1218		AM_RANGE(0x0000, 0x3fff) AM_READ(SMH_ROM   )   // ROM
1219		AM_RANGE(0x4000, 0x7fff) AM_READ(SMH_BANK2   )   // ROM (Banked)
1220		AM_RANGE(0xc000, 0xc7ff) AM_READ(SMH_RAM   )   // RAM
1221		AM_RANGE(0xf800, 0xffff) AM_READ(SMH_RAM   )   // RAM
	1009	static ADDRESS_MAP_START( mazinger_sound_map, ADDRESS_SPACE_PROGRAM, 8 )
	1010	AM_RANGE(0x0000, 0x3fff) AM_ROM                        // ROM
	1011	AM_RANGE(0x4000, 0x7fff) AM_ROMBANK(2)                  // ROM (Banked)
	1012	AM_RANGE(0xc000, 0xc7ff) AM_RAM                        // RAM
	1013	AM_RANGE(0xf800, 0xffff) AM_RAM                        // RAM
1222	1014	ADDRESS_MAP_END
1223	1015
1224		static ADDRESS_MAP_START( mazinger_sound_writemem, ADDRESS_SPACE_PROGRAM, 8 )
1225		AM_RANGE(0x0000, 0x3fff) AM_WRITE(SMH_ROM   )   // ROM
1226		AM_RANGE(0x4000, 0x7fff) AM_WRITE(SMH_ROM   )   // ROM (Banked)
1227		AM_RANGE(0xc000, 0xc7ff) AM_WRITE(SMH_RAM   )   // RAM
1228		AM_RANGE(0xf800, 0xffff) AM_WRITE(SMH_RAM   )   // RAM
1229		ADDRESS_MAP_END
1230
1231		static ADDRESS_MAP_START( mazinger_sound_readport, ADDRESS_SPACE_IO, 8 )
	1016	static ADDRESS_MAP_START( mazinger_sound_portmap, ADDRESS_SPACE_IO, 8 )
1232	1017	ADDRESS_MAP_GLOBAL_MASK(0xff)
1233		AM_RANGE(0x30, 0x30) AM_READ(soundlatch_lo_r         )   // From Main CPU
1234		AM_RANGE(0x52, 0x53) AM_DEVREAD("ym", ym2203_r   )   // YM2203
	1018	AM_RANGE(0x00, 0x00) AM_WRITE(mazinger_rombank_w)         // ROM bank
	1019	AM_RANGE(0x10, 0x10) AM_WRITE(soundlatch_ack_w)            // To Main CPU
	1020	AM_RANGE(0x30, 0x30) AM_READ(soundlatch_lo_r)            // From Main CPU
	1021	AM_RANGE(0x50, 0x51) AM_DEVWRITE("ym", ym2203_w)         // YM2203
	1022	AM_RANGE(0x52, 0x53) AM_DEVREAD("ym", ym2203_r)            // YM2203
	1023	AM_RANGE(0x70, 0x70) AM_DEVWRITE("oki", okim6295_w)         // M6295
	1024	AM_RANGE(0x74, 0x74) AM_WRITE(hotdogst_okibank_w)         // Samples bank
1235	1025	ADDRESS_MAP_END
1236	1026
1237		static ADDRESS_MAP_START( mazinger_sound_writeport, ADDRESS_SPACE_IO, 8 )
1238		ADDRESS_MAP_GLOBAL_MASK(0xff)
1239		AM_RANGE(0x00, 0x00) AM_WRITE(mazinger_rombank_w      )   // ROM bank
1240		AM_RANGE(0x10, 0x10) AM_WRITE(soundlatch_ack_w         )   // To Main CPU
1241		AM_RANGE(0x50, 0x51) AM_DEVWRITE("ym", ym2203_w   )   // YM2203
1242		AM_RANGE(0x70, 0x70) AM_DEVWRITE("oki", okim6295_w)   // M6295
1243		AM_RANGE(0x74, 0x74) AM_WRITE(hotdogst_okibank_w      )   // Samples bank
1244		ADDRESS_MAP_END
1245	1027
1246
1247	1028	/***************************************************************************
1248	1029	Metamoqester
1249	1030	***************************************************************************/
r4679	r4680
1275	1056	memcpy(ROM + 0x20000 * 1, ROM + 0x40000 + 0x20000 * bank2, 0x20000);
1276	1057	}
1277	1058
1278		static ADDRESS_MAP_START( metmqstr_sound_readmem, ADDRESS_SPACE_PROGRAM, 8 )
1279		AM_RANGE(0x0000, 0x3fff) AM_READ(SMH_ROM   )   // ROM
1280		AM_RANGE(0x4000, 0x7fff) AM_READ(SMH_BANK1   )   // ROM (Banked)
1281		AM_RANGE(0xe000, 0xffff) AM_READ(SMH_RAM   )   // RAM
	1059	static ADDRESS_MAP_START( metmqstr_sound_map, ADDRESS_SPACE_PROGRAM, 8 )
	1060	AM_RANGE(0x0000, 0x3fff) AM_ROM                        // ROM
	1061	AM_RANGE(0x4000, 0x7fff) AM_ROMBANK(1)                  // ROM (Banked)
	1062	AM_RANGE(0xe000, 0xffff) AM_RAM                        // RAM
1282	1063	ADDRESS_MAP_END
1283	1064
1284		static ADDRESS_MAP_START( metmqstr_sound_writemem, ADDRESS_SPACE_PROGRAM, 8 )
1285		AM_RANGE(0x0000, 0x3fff) AM_WRITE(SMH_ROM   )   // ROM
1286		AM_RANGE(0x4000, 0x7fff) AM_WRITE(SMH_ROM   )   // ROM (Banked)
1287		AM_RANGE(0xe000, 0xffff) AM_WRITE(SMH_RAM   )   // RAM
1288		ADDRESS_MAP_END
1289
1290		static ADDRESS_MAP_START( metmqstr_sound_readport, ADDRESS_SPACE_IO, 8 )
	1065	static ADDRESS_MAP_START( metmqstr_sound_portmap, ADDRESS_SPACE_IO, 8 )
1291	1066	ADDRESS_MAP_GLOBAL_MASK(0xff)
1292		AM_RANGE(0x20, 0x20) AM_READ(soundflags_r            )   // Communication
1293		AM_RANGE(0x30, 0x30) AM_READ(soundlatch_lo_r         )   // From Main CPU
1294		AM_RANGE(0x40, 0x40) AM_READ(soundlatch_hi_r         )   //
1295		AM_RANGE(0x50, 0x51) AM_DEVREAD("ym", ym2151_r   )   // YM2151
	1067	AM_RANGE(0x00, 0x00) AM_WRITE(metmqstr_rombank_w)            // Rom Bank
	1068	AM_RANGE(0x20, 0x20) AM_READ(soundflags_r)                  // Communication
	1069	AM_RANGE(0x30, 0x30) AM_READ(soundlatch_lo_r)               // From Main CPU
	1070	AM_RANGE(0x40, 0x40) AM_READ(soundlatch_hi_r)               //
	1071	AM_RANGE(0x50, 0x51) AM_DEVREADWRITE("ym", ym2151_r, ym2151_w)   // YM2151
	1072	AM_RANGE(0x60, 0x60) AM_DEVWRITE("oki1", okim6295_w)         // M6295 #0
	1073	AM_RANGE(0x70, 0x70) AM_WRITE(metmqstr_okibank0_w)            // Samples Bank #0
	1074	AM_RANGE(0x80, 0x80) AM_DEVWRITE("oki2", okim6295_w)         // M6295 #1
	1075	AM_RANGE(0x90, 0x90) AM_WRITE(metmqstr_okibank1_w)            // Samples Bank #1
1296	1076	ADDRESS_MAP_END
1297	1077
1298		static ADDRESS_MAP_START( metmqstr_sound_writeport, ADDRESS_SPACE_IO, 8 )
1299		ADDRESS_MAP_GLOBAL_MASK(0xff)
1300		AM_RANGE(0x00, 0x00) AM_WRITE(metmqstr_rombank_w      )   // Rom Bank
1301		AM_RANGE(0x50, 0x51) AM_DEVWRITE("ym", ym2151_w   )   // YM2151
1302		AM_RANGE(0x60, 0x60) AM_DEVWRITE("oki1", okim6295_w)   // M6295 #0
1303		AM_RANGE(0x70, 0x70) AM_WRITE(metmqstr_okibank0_w      )   // Samples Bank #0
1304		AM_RANGE(0x80, 0x80) AM_DEVWRITE("oki2", okim6295_w)   // M6295 #1
1305		AM_RANGE(0x90, 0x90) AM_WRITE(metmqstr_okibank1_w      )   // Samples Bank #1
1306		ADDRESS_MAP_END
1307	1078
1308
1309	1079	/***************************************************************************
1310	1080	Power Instinct 2
1311	1081	***************************************************************************/
r4679	r4680
1319	1089	memory_set_bankptr(space->machine, 1, &ROM[ 0x4000 * bank ]);
1320	1090	}
1321	1091
1322		static ADDRESS_MAP_START( pwrinst2_sound_readmem, ADDRESS_SPACE_PROGRAM, 8 )
1323		AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM   )   // ROM
1324		AM_RANGE(0x8000, 0xbfff) AM_READ(SMH_BANK1   )   // ROM (Banked)
1325		AM_RANGE(0xe000, 0xffff) AM_READ(SMH_RAM   )   // RAM
	1092	static ADDRESS_MAP_START( pwrinst2_sound_map, ADDRESS_SPACE_PROGRAM, 8 )
	1093	AM_RANGE(0x0000, 0x7fff) AM_ROM                        // ROM
	1094	AM_RANGE(0x8000, 0xbfff) AM_ROMBANK(1)                  // ROM (Banked)
	1095	AM_RANGE(0xe000, 0xffff) AM_RAM                        // RAM
1326	1096	ADDRESS_MAP_END
1327	1097
1328		static ADDRESS_MAP_START( pwrinst2_sound_writemem, ADDRESS_SPACE_PROGRAM, 8 )
1329		AM_RANGE(0x0000, 0x7fff) AM_WRITE(SMH_ROM   )   // ROM
1330		AM_RANGE(0x8000, 0xbfff) AM_WRITE(SMH_ROM   )   // ROM (Banked)
1331		AM_RANGE(0xe000, 0xffff) AM_WRITE(SMH_RAM   )   // RAM
1332		ADDRESS_MAP_END
1333
1334		static ADDRESS_MAP_START( pwrinst2_sound_readport, ADDRESS_SPACE_IO, 8 )
	1098	static ADDRESS_MAP_START( pwrinst2_sound_portmap, ADDRESS_SPACE_IO, 8 )
1335	1099	ADDRESS_MAP_GLOBAL_MASK(0xff)
1336		AM_RANGE(0x00, 0x00) AM_DEVREAD("oki1", okim6295_r      )   // M6295
1337		AM_RANGE(0x08, 0x08) AM_DEVREAD("oki2", okim6295_r      )   //
1338		AM_RANGE(0x40, 0x41) AM_DEVREAD("ym", ym2203_r   )   //
1339		AM_RANGE(0x60, 0x60) AM_READ(soundlatch_hi_r         )   // From Main CPU
1340		AM_RANGE(0x70, 0x70) AM_READ(soundlatch_lo_r         )   //
	1100	AM_RANGE(0x00, 0x00) AM_DEVREADWRITE("oki1", okim6295_r, okim6295_w)   // M6295
	1101	AM_RANGE(0x08, 0x08) AM_DEVREADWRITE("oki2", okim6295_r, okim6295_w)   //
	1102	AM_RANGE(0x10, 0x17) AM_WRITE(NMK112_okibank_w)                     // Samples bank
	1103	AM_RANGE(0x40, 0x41) AM_DEVREADWRITE("ym", ym2203_r, ym2203_w)         //
	1104	AM_RANGE(0x50, 0x50) AM_WRITE(soundlatch_ack_w)                     // To Main CPU
	1105	//  AM_RANGE(0x51, 0x51) AM_WRITE(SMH_NOP)                                  // ?? volume
	1106	AM_RANGE(0x80, 0x80) AM_WRITE(pwrinst2_rombank_w)                  // ROM bank
	1107	AM_RANGE(0x60, 0x60) AM_READ(soundlatch_hi_r)                     // From Main CPU
	1108	AM_RANGE(0x70, 0x70) AM_READ(soundlatch_lo_r)                     //
1341	1109	ADDRESS_MAP_END
1342	1110
1343		static ADDRESS_MAP_START( pwrinst2_sound_writeport, ADDRESS_SPACE_IO, 8 )
1344		ADDRESS_MAP_GLOBAL_MASK(0xff)
1345		AM_RANGE(0x00, 0x00) AM_DEVWRITE("oki1", okim6295_w         )   // M6295
1346		AM_RANGE(0x08, 0x08) AM_DEVWRITE("oki2", okim6295_w         )   //
1347		AM_RANGE(0x10, 0x17) AM_WRITE(NMK112_okibank_w         )   // Samples bank
1348		AM_RANGE(0x40, 0x41) AM_DEVWRITE("ym", ym2203_w   )   //
1349		AM_RANGE(0x50, 0x50) AM_WRITE(soundlatch_ack_w         )   // To Main CPU
1350		//  AM_RANGE(0x51, 0x51) AM_WRITE(SMH_NOP                   )   // ?? volume
1351		AM_RANGE(0x80, 0x80) AM_WRITE(pwrinst2_rombank_w      )   // ROM bank
1352		ADDRESS_MAP_END
1353	1111
1354
1355	1112	/***************************************************************************
1356	1113	Sailor Moon
1357	1114	***************************************************************************/
r4679	r4680
1393	1150	memcpy(RAM + 0x20000 * 1, RAM + 0x40000 + 0x20000 * bank2, 0x20000);
1394	1151	}
1395	1152
1396		static ADDRESS_MAP_START( sailormn_sound_readmem, ADDRESS_SPACE_PROGRAM, 8 )
1397		AM_RANGE(0x0000, 0x3fff) AM_READ(SMH_ROM      )   // ROM
1398		AM_RANGE(0x4000, 0x7fff) AM_READ(SMH_BANK1      )   // ROM (Banked)
1399		AM_RANGE(0xc000, 0xdfff) AM_READ(mirror_ram_r   )   // RAM
1400		AM_RANGE(0xe000, 0xffff) AM_READ(mirror_ram_r   )   // Mirrored RAM (agallet)
	1153	static ADDRESS_MAP_START( sailormn_sound_map, ADDRESS_SPACE_PROGRAM, 8 )
	1154	AM_RANGE(0x0000, 0x3fff) AM_ROM                                             // ROM
	1155	AM_RANGE(0x4000, 0x7fff) AM_ROMBANK(1)                                       // ROM (Banked)
	1156	AM_RANGE(0xc000, 0xdfff) AM_READWRITE(mirror_ram_r, mirror_ram_w) AM_BASE(&mirror_ram)   // RAM
	1157	AM_RANGE(0xe000, 0xffff) AM_READWRITE(mirror_ram_r, mirror_ram_w)                  // Mirrored RAM (agallet)
1401	1158	ADDRESS_MAP_END
1402	1159
1403		static ADDRESS_MAP_START( sailormn_sound_writemem, ADDRESS_SPACE_PROGRAM, 8 )
1404		AM_RANGE(0x0000, 0x3fff) AM_WRITE(SMH_ROM               )   // ROM
1405		AM_RANGE(0x4000, 0x7fff) AM_WRITE(SMH_ROM               )   // ROM (Banked)
1406		AM_RANGE(0xc000, 0xdfff) AM_WRITE(mirror_ram_w) AM_BASE(&mirror_ram)   // RAM
1407		AM_RANGE(0xe000, 0xffff) AM_WRITE(mirror_ram_w            )   // Mirrored RAM (agallet)
1408		ADDRESS_MAP_END
1409
1410		static ADDRESS_MAP_START( sailormn_sound_readport, ADDRESS_SPACE_IO, 8 )
	1160	static ADDRESS_MAP_START( sailormn_sound_portmap, ADDRESS_SPACE_IO, 8 )
1411	1161	ADDRESS_MAP_GLOBAL_MASK(0xff)
1412		AM_RANGE(0x20, 0x20) AM_READ(soundflags_r            )   // Communication
1413		AM_RANGE(0x30, 0x30) AM_READ(soundlatch_lo_r         )   // From Main CPU
1414		AM_RANGE(0x40, 0x40) AM_READ(soundlatch_hi_r         )   //
1415		AM_RANGE(0x50, 0x51) AM_DEVREAD("ym", ym2151_r   )   // YM2151
1416		AM_RANGE(0x60, 0x60) AM_DEVREAD("oki1", okim6295_r      )   // M6295 #0
1417		AM_RANGE(0x80, 0x80) AM_DEVREAD("oki2", okim6295_r      )   // M6295 #1
	1162	AM_RANGE(0x00, 0x00) AM_WRITE(sailormn_rombank_w)                  // Rom Bank
	1163	AM_RANGE(0x10, 0x10) AM_WRITE(soundlatch_ack_w)                     // To Main CPU
	1164	AM_RANGE(0x20, 0x20) AM_READ(soundflags_r)                        // Communication
	1165	AM_RANGE(0x30, 0x30) AM_READ(soundlatch_lo_r)                     // From Main CPU
	1166	AM_RANGE(0x40, 0x40) AM_READ(soundlatch_hi_r)                     //
	1167	AM_RANGE(0x50, 0x51) AM_DEVREADWRITE("ym", ym2151_r, ym2151_w)         // YM2151
	1168	AM_RANGE(0x60, 0x60) AM_DEVREADWRITE("oki1", okim6295_r, okim6295_w)   // M6295 #0
	1169	AM_RANGE(0x70, 0x70) AM_WRITE(sailormn_okibank0_w)                  // Samples Bank #0
	1170	AM_RANGE(0x80, 0x80) AM_DEVREADWRITE("oki2", okim6295_r, okim6295_w)   // M6295 #1
	1171	AM_RANGE(0xc0, 0xc0) AM_WRITE(sailormn_okibank1_w)                  // Samples Bank #1
1418	1172	ADDRESS_MAP_END
1419	1173
1420		static ADDRESS_MAP_START( sailormn_sound_writeport, ADDRESS_SPACE_IO, 8 )
1421		ADDRESS_MAP_GLOBAL_MASK(0xff)
1422		AM_RANGE(0x00, 0x00) AM_WRITE(sailormn_rombank_w      )   // Rom Bank
1423		AM_RANGE(0x10, 0x10) AM_WRITE(soundlatch_ack_w         )   // To Main CPU
1424		AM_RANGE(0x50, 0x51) AM_DEVWRITE("ym", ym2151_w   )   // YM2151
1425		AM_RANGE(0x60, 0x60) AM_DEVWRITE("oki1", okim6295_w         )   // M6295 #0
1426		AM_RANGE(0x70, 0x70) AM_WRITE(sailormn_okibank0_w      )   // Samples Bank #0
1427		AM_RANGE(0x80, 0x80) AM_DEVWRITE("oki2", okim6295_w         )   // M6295 #1
1428		AM_RANGE(0xc0, 0xc0) AM_WRITE(sailormn_okibank1_w      )   // Samples Bank #1
1429		ADDRESS_MAP_END
1430	1174
1431	1175
1432
1433	1176	/***************************************************************************
1434	1177
1435	1178
r4679	r4680
1938	1681
1939	1682	static void irqhandler(const device_config *device, int irq)
1940	1683	{
1941		cpu_set_input_line(device->machine->cpu[1],0,irq ? ASSERT_LINE : CLEAR_LINE);
	1684	cputag_set_input_line(device->machine, "audiocpu", 0, irq ? ASSERT_LINE : CLEAR_LINE);
1942	1685	}
1943	1686
1944	1687	static const ym2151_interface ym2151_config =
r4679	r4680
1965	1708
1966	1709	/* basic machine hardware */
1967	1710	MDRV_CPU_ADD("maincpu", M68000, XTAL_16MHz)
1968		MDRV_CPU_PROGRAM_MAP(dfeveron_readmem,dfeveron_writemem)
	1711	MDRV_CPU_PROGRAM_MAP(dfeveron_map,0)
1969	1712	MDRV_CPU_VBLANK_INT("screen", cave_interrupt)
1970	1713
1971	1714	MDRV_MACHINE_RESET(cave)
r4679	r4680
2004	1747
2005	1748	/* basic machine hardware */
2006	1749	MDRV_CPU_ADD("maincpu", M68000, XTAL_16MHz)
2007		MDRV_CPU_PROGRAM_MAP(ddonpach_readmem,ddonpach_writemem)
	1750	MDRV_CPU_PROGRAM_MAP(ddonpach_map,0)
2008	1751	MDRV_CPU_VBLANK_INT("screen", cave_interrupt)
2009	1752
2010	1753	MDRV_MACHINE_RESET(cave)
r4679	r4680
2043	1786
2044	1787	/* basic machine hardware */
2045	1788	MDRV_CPU_ADD("maincpu", M68000, XTAL_16MHz)
2046		MDRV_CPU_PROGRAM_MAP(donpachi_readmem,donpachi_writemem)
	1789	MDRV_CPU_PROGRAM_MAP(donpachi_map,0)
2047	1790	MDRV_CPU_VBLANK_INT("screen", cave_interrupt)
2048	1791
2049	1792	MDRV_MACHINE_RESET(cave)
r4679	r4680
2087	1830
2088	1831	/* basic machine hardware */
2089	1832	MDRV_CPU_ADD("maincpu", M68000, XTAL_16MHz)
2090		MDRV_CPU_PROGRAM_MAP(esprade_readmem,esprade_writemem)
	1833	MDRV_CPU_PROGRAM_MAP(esprade_map,0)
2091	1834	MDRV_CPU_VBLANK_INT("screen", cave_interrupt)
2092	1835
2093	1836	MDRV_MACHINE_RESET(cave)
r4679	r4680
2126	1869
2127	1870	/* basic machine hardware */
2128	1871	MDRV_CPU_ADD("maincpu", M68000, XTAL_16MHz)
2129		MDRV_CPU_PROGRAM_MAP(gaia_readmem,gaia_writemem)
	1872	MDRV_CPU_PROGRAM_MAP(gaia_map,0)
2130	1873	MDRV_CPU_VBLANK_INT("screen", cave_interrupt)
2131	1874
2132	1875	MDRV_MACHINE_RESET(cave)
r4679	r4680
2164	1907
2165	1908	/* basic machine hardware */
2166	1909	MDRV_CPU_ADD("maincpu", M68000, XTAL_16MHz)
2167		MDRV_CPU_PROGRAM_MAP(guwange_readmem,guwange_writemem)
	1910	MDRV_CPU_PROGRAM_MAP(guwange_map,0)
2168	1911	MDRV_CPU_VBLANK_INT("screen", cave_interrupt)
2169	1912
2170	1913	MDRV_MACHINE_RESET(cave)
r4679	r4680
2202	1945
2203	1946	/* basic machine hardware */
2204	1947	MDRV_CPU_ADD("maincpu", M68000, XTAL_16MHz)
2205		MDRV_CPU_PROGRAM_MAP(hotdogst_readmem,hotdogst_writemem)
	1948	MDRV_CPU_PROGRAM_MAP(hotdogst_map,0)
2206	1949	MDRV_CPU_VBLANK_INT("screen", cave_interrupt)
2207	1950
2208	1951	MDRV_CPU_ADD("audiocpu", Z80, XTAL_4MHz)
2209		MDRV_CPU_PROGRAM_MAP(hotdogst_sound_readmem,hotdogst_sound_writemem)
2210		MDRV_CPU_IO_MAP(hotdogst_sound_readport,hotdogst_sound_writeport)
	1952	MDRV_CPU_PROGRAM_MAP(hotdogst_sound_map,0)
	1953	MDRV_CPU_IO_MAP(hotdogst_sound_portmap,0)
2211	1954
2212	1955	MDRV_MACHINE_RESET(cave)
2213	1956	MDRV_NVRAM_HANDLER(cave)
r4679	r4680
2256	1999
2257	2000	/* basic machine hardware */
2258	2001	MDRV_CPU_ADD("maincpu", M68000, XTAL_16MHz)
2259		MDRV_CPU_PROGRAM_MAP(korokoro_readmem,korokoro_writemem)
	2002	MDRV_CPU_PROGRAM_MAP(korokoro_map,0)
2260	2003	MDRV_CPU_VBLANK_INT("screen", cave_interrupt)
2261	2004
2262	2005	MDRV_MACHINE_RESET(cave)
r4679	r4680
2295	2038
2296	2039	/* basic machine hardware */
2297	2040	MDRV_CPU_ADD("maincpu", M68000, XTAL_16MHz)
2298		MDRV_CPU_PROGRAM_MAP(mazinger_readmem,mazinger_writemem)
	2041	MDRV_CPU_PROGRAM_MAP(mazinger_map,0)
2299	2042	MDRV_CPU_VBLANK_INT("screen", cave_interrupt)
2300	2043
2301	2044	MDRV_CPU_ADD("audiocpu", Z80, XTAL_4MHz) // Bidirectional communication
2302		MDRV_CPU_PROGRAM_MAP(mazinger_sound_readmem,mazinger_sound_writemem)
2303		MDRV_CPU_IO_MAP(mazinger_sound_readport,mazinger_sound_writeport)
	2045	MDRV_CPU_PROGRAM_MAP(mazinger_sound_map,0)
	2046	MDRV_CPU_IO_MAP(mazinger_sound_portmap,0)
2304	2047
2305	2048	MDRV_WATCHDOG_TIME_INIT(SEC(3))   /* a guess, and certainly wrong */
2306	2049
r4679	r4680
2351	2094
2352	2095	/* basic machine hardware */
2353	2096	MDRV_CPU_ADD("maincpu", M68000, XTAL_32MHz / 2)
2354		MDRV_CPU_PROGRAM_MAP(metmqstr_readmem,metmqstr_writemem)
	2097	MDRV_CPU_PROGRAM_MAP(metmqstr_map,0)
2355	2098	MDRV_CPU_VBLANK_INT("screen", cave_interrupt)
2356	2099
2357	2100	MDRV_CPU_ADD("audiocpu", Z80, XTAL_32MHz / 4)
2358		MDRV_CPU_PROGRAM_MAP(metmqstr_sound_readmem,metmqstr_sound_writemem)
2359		MDRV_CPU_IO_MAP(metmqstr_sound_readport,metmqstr_sound_writeport)
	2101	MDRV_CPU_PROGRAM_MAP(metmqstr_sound_map,0)
	2102	MDRV_CPU_IO_MAP(metmqstr_sound_portmap,0)
2360	2103
2361	2104	MDRV_WATCHDOG_TIME_INIT(SEC(3))   /* a guess, and certainly wrong */
2362	2105
r4679	r4680
2408	2151
2409	2152	/* basic machine hardware */
2410	2153	MDRV_CPU_ADD("maincpu", M68000, XTAL_16MHz)   /* 16 MHz */
2411		MDRV_CPU_PROGRAM_MAP(pwrinst2_readmem,pwrinst2_writemem)
	2154	MDRV_CPU_PROGRAM_MAP(pwrinst2_map,0)
2412	2155	MDRV_CPU_VBLANK_INT("screen", cave_interrupt)
2413	2156
2414	2157	MDRV_CPU_ADD("audiocpu", Z80,XTAL_16MHz / 2)   /* 8 MHz */
2415		MDRV_CPU_PROGRAM_MAP(pwrinst2_sound_readmem,pwrinst2_sound_writemem)
2416		MDRV_CPU_IO_MAP(pwrinst2_sound_readport,pwrinst2_sound_writeport)
	2158	MDRV_CPU_PROGRAM_MAP(pwrinst2_sound_map,0)
	2159	MDRV_CPU_IO_MAP(pwrinst2_sound_portmap,0)
2417	2160
2418	2161	MDRV_MACHINE_RESET(cave)
2419	2162	MDRV_NVRAM_HANDLER(cave)
r4679	r4680
2467	2210
2468	2211	/* basic machine hardware */
2469	2212	MDRV_CPU_ADD("maincpu", M68000, XTAL_16MHz)
2470		MDRV_CPU_PROGRAM_MAP(sailormn_readmem,sailormn_writemem)
	2213	MDRV_CPU_PROGRAM_MAP(sailormn_map,0)
2471	2214	MDRV_CPU_VBLANK_INT("screen", cave_interrupt)
2472	2215
2473	2216	MDRV_CPU_ADD("audiocpu", Z80, XTAL_8MHz) // Bidirectional Communication
2474		MDRV_CPU_PROGRAM_MAP(sailormn_sound_readmem,sailormn_sound_writemem)
2475		MDRV_CPU_IO_MAP(sailormn_sound_readport,sailormn_sound_writeport)
	2217	MDRV_CPU_PROGRAM_MAP(sailormn_sound_map,0)
	2218	MDRV_CPU_IO_MAP(sailormn_sound_portmap,0)
2476	2219
2477	2220	//  MDRV_QUANTUM_TIME(HZ(600))
2478	2221
r4679	r4680
2521	2264
2522	2265	/* basic machine hardware */
2523	2266	MDRV_CPU_ADD("maincpu", M68000, XTAL_16MHz)
2524		MDRV_CPU_PROGRAM_MAP(uopoko_readmem,uopoko_writemem)
	2267	MDRV_CPU_PROGRAM_MAP(uopoko_map,0)
2525	2268	MDRV_CPU_VBLANK_INT("screen", cave_interrupt)
2526	2269
2527	2270	MDRV_NVRAM_HANDLER(cave)
r4679	r4680
4085	3828	unpack_sprites(machine);
4086	3829
4087	3830	//  Speed Hack
4088		memory_install_read16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xb80000, 0xb80001, 0, 0, agallet_irq_cause_r);
	3831	memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xb80000, 0xb80001, 0, 0, agallet_irq_cause_r);
4089	3832	}
4090	3833
4091	3834	static DRIVER_INIT( dfeveron )
r4679	r4680
4204	3947	init_cave(machine);
4205	3948
4206	3949	/* decrypt sprites */
4207		buffer = malloc_or_die(len);
	3950	buffer = alloc_array_or_die(UINT8, len);
4208	3951	{
4209	3952	int i;
4210	3953	for (i = 0;i < len; i++)
r4679	r4680
4247	3990
4248	3991	init_cave(machine);
4249	3992
4250		buffer = malloc_or_die(len);
	3993	buffer = alloc_array_or_die(UINT8, len);
4251	3994	{
4252	3995	for(i=0; i<len/2; i++)       {
4253	3996	j = BITSWAP24(i,23,22,21,20,19,18,17,16,15,14,13,12,11,10,9,8,7, 2,4,6,1,5,3, 0);
r4679	r4680
4293	4036	init_cave(machine);
4294	4037
4295	4038	/* decrypt sprites */
4296		buffer = malloc_or_die(len);
	4039	buffer = alloc_array_or_die(UINT8, len);
4297	4040	{
4298	4041	int i;
4299	4042	for (i = 0;i < len; i++)

src/mame/drivers/cham24.c

r4679	r4680
213	213
214	214	static void ppu_irq( const device_config *device, int *ppu_regs )
215	215	{
216		cpu_set_input_line(device->machine->cpu[0], INPUT_LINE_NMI, PULSE_LINE );
	216	cputag_set_input_line(device->machine, "maincpu", INPUT_LINE_NMI, PULSE_LINE );
217	217	}
218	218
219	219	/* our ppu interface                                            */

src/mame/drivers/dooyong.c

r4679	r4680
82	82
83	83	***************************************************************************/
84	84
85		static ADDRESS_MAP_START( lastday_readmem, ADDRESS_SPACE_PROGRAM, 8 )
86		AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM)
87		AM_RANGE(0x8000, 0xbfff) AM_READ(SMH_BANK1)
	85	static ADDRESS_MAP_START( lastday_map, ADDRESS_SPACE_PROGRAM, 8 )
	86	AM_RANGE(0x0000, 0x7fff) AM_ROM
	87	AM_RANGE(0x8000, 0xbfff) AM_ROMBANK(1)
	88	AM_RANGE(0xc000, 0xc007) AM_WRITE(dooyong_bgscroll8_w)
	89	AM_RANGE(0xc008, 0xc00f) AM_WRITE(dooyong_fgscroll8_w)
88	90	AM_RANGE(0xc010, 0xc010) AM_READ_PORT("SYSTEM")
	91	AM_RANGE(0xc010, 0xc010) AM_WRITE(lastday_ctrl_w)   /* coin counter, flip screen */
89	92	AM_RANGE(0xc011, 0xc011) AM_READ_PORT("P1")
	93	AM_RANGE(0xc011, 0xc011) AM_WRITE(lastday_bankswitch_w)
90	94	AM_RANGE(0xc012, 0xc012) AM_READ_PORT("P2")
	95	AM_RANGE(0xc012, 0xc012) AM_WRITE(soundlatch_w)
91	96	AM_RANGE(0xc013, 0xc013) AM_READ_PORT("DSWA")
92	97	AM_RANGE(0xc014, 0xc014) AM_READ_PORT("DSWB")
93		AM_RANGE(0xc800, 0xffff) AM_READ(SMH_RAM)
	98	AM_RANGE(0xc800, 0xcfff) AM_RAM_WRITE(paletteram_xxxxBBBBGGGGRRRR_le_w) AM_BASE(&paletteram)
	99	AM_RANGE(0xd000, 0xdfff) AM_RAM_WRITE(dooyong_txvideoram8_w) AM_BASE(&dooyong_txvideoram)
	100	AM_RANGE(0xe000, 0xefff) AM_RAM
	101	AM_RANGE(0xf000, 0xffff) AM_RAM AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
94	102	ADDRESS_MAP_END
95	103
96		static ADDRESS_MAP_START( lastday_writemem, ADDRESS_SPACE_PROGRAM, 8 )
97		AM_RANGE(0x0000, 0xbfff) AM_WRITE(SMH_ROM)
98		AM_RANGE(0xc000, 0xc007) AM_WRITE(dooyong_bgscroll8_w)
99		AM_RANGE(0xc008, 0xc00f) AM_WRITE(dooyong_fgscroll8_w)
100		AM_RANGE(0xc010, 0xc010) AM_WRITE(lastday_ctrl_w)   /* coin counter, flip screen */
101		AM_RANGE(0xc011, 0xc011) AM_WRITE(lastday_bankswitch_w)
102		AM_RANGE(0xc012, 0xc012) AM_WRITE(soundlatch_w)
103		AM_RANGE(0xc800, 0xcfff) AM_WRITE(paletteram_xxxxBBBBGGGGRRRR_le_w) AM_BASE(&paletteram)
104		AM_RANGE(0xd000, 0xdfff) AM_WRITE(dooyong_txvideoram8_w) AM_BASE(&dooyong_txvideoram)
105		AM_RANGE(0xe000, 0xefff) AM_WRITE(SMH_RAM)
106		AM_RANGE(0xf000, 0xffff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
107		ADDRESS_MAP_END
108
109		static ADDRESS_MAP_START( pollux_readmem, ADDRESS_SPACE_PROGRAM, 8 )
110		AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM)
111		AM_RANGE(0x8000, 0xbfff) AM_READ(SMH_BANK1)
112		AM_RANGE(0xc000, 0xefff) AM_READ(SMH_RAM)
113		AM_RANGE(0xf000, 0xf000) AM_READ_PORT("DSWA")
	104	static ADDRESS_MAP_START( pollux_map, ADDRESS_SPACE_PROGRAM, 8 )
	105	AM_RANGE(0x0000, 0x7fff) AM_ROM
	106	AM_RANGE(0x8000, 0xbfff) AM_ROMBANK(1)
	107	AM_RANGE(0xc000, 0xcfff) AM_RAM
	108	AM_RANGE(0xd000, 0xdfff) AM_RAM AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
	109	AM_RANGE(0xe000, 0xefff) AM_RAM_WRITE(dooyong_txvideoram8_w) AM_BASE(&dooyong_txvideoram)
	110	AM_RANGE(0xf000, 0xf000) AM_READ_PORT("DSWA") AM_WRITE(lastday_bankswitch_w)
114	111	AM_RANGE(0xf001, 0xf001) AM_READ_PORT("DSWB")
115	112	AM_RANGE(0xf002, 0xf002) AM_READ_PORT("P1")
116	113	AM_RANGE(0xf003, 0xf003) AM_READ_PORT("P2")
117	114	AM_RANGE(0xf004, 0xf004) AM_READ_PORT("SYSTEM")
118		AM_RANGE(0xf800, 0xffff) AM_READ(SMH_RAM)
119		ADDRESS_MAP_END
120
121		static ADDRESS_MAP_START( pollux_writemem, ADDRESS_SPACE_PROGRAM, 8 )
122		AM_RANGE(0x0000, 0xbfff) AM_WRITE(SMH_ROM)
123		AM_RANGE(0xc000, 0xcfff) AM_WRITE(SMH_RAM)
124		AM_RANGE(0xd000, 0xdfff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
125		AM_RANGE(0xe000, 0xefff) AM_WRITE(dooyong_txvideoram8_w) AM_BASE(&dooyong_txvideoram)
126		AM_RANGE(0xf000, 0xf000) AM_WRITE(lastday_bankswitch_w)
127	115	AM_RANGE(0xf008, 0xf008) AM_WRITE(pollux_ctrl_w)   /* coin counter, flip screen */
128	116	AM_RANGE(0xf010, 0xf010) AM_WRITE(soundlatch_w)
129	117	AM_RANGE(0xf018, 0xf01f) AM_WRITE(dooyong_bgscroll8_w)
130	118	AM_RANGE(0xf020, 0xf027) AM_WRITE(dooyong_fgscroll8_w)
131		AM_RANGE(0xf800, 0xffff) AM_WRITE(paletteram_xRRRRRGGGGGBBBBB_le_w) AM_BASE(&paletteram)
	119	AM_RANGE(0xf800, 0xffff) AM_RAM_WRITE(paletteram_xRRRRRGGGGGBBBBB_le_w) AM_BASE(&paletteram)
132	120	ADDRESS_MAP_END
133	121
134		static ADDRESS_MAP_START( gulfstrm_readmem, ADDRESS_SPACE_PROGRAM, 8 )
135		AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM)
136		AM_RANGE(0x8000, 0xbfff) AM_READ(SMH_BANK1)
137		AM_RANGE(0xc000, 0xefff) AM_READ(SMH_RAM)
	122	static ADDRESS_MAP_START( gulfstrm_map, ADDRESS_SPACE_PROGRAM, 8 )
	123	AM_RANGE(0x0000, 0x7fff) AM_ROM
	124	AM_RANGE(0x8000, 0xbfff) AM_ROMBANK(1)
	125	AM_RANGE(0xc000, 0xcfff) AM_RAM
	126	AM_RANGE(0xd000, 0xdfff) AM_RAM AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
	127	AM_RANGE(0xe000, 0xefff) AM_RAM_WRITE(dooyong_txvideoram8_w) AM_BASE(&dooyong_txvideoram)
138	128	AM_RANGE(0xf000, 0xf000) AM_READ_PORT("DSWA")
	129	AM_RANGE(0xf000, 0xf000) AM_WRITE(lastday_bankswitch_w)
139	130	AM_RANGE(0xf001, 0xf001) AM_READ_PORT("DSWB")
140	131	AM_RANGE(0xf002, 0xf002) AM_READ_PORT("P2")
141	132	AM_RANGE(0xf003, 0xf003) AM_READ_PORT("P1")
142	133	AM_RANGE(0xf004, 0xf004) AM_READ_PORT("SYSTEM")
143		AM_RANGE(0xf800, 0xffff) AM_READ(SMH_RAM)
	134	AM_RANGE(0xf008, 0xf008) AM_WRITE(pollux_ctrl_w)   /* coin counter, flip screen */
	135	AM_RANGE(0xf010, 0xf010) AM_WRITE(soundlatch_w)
	136	AM_RANGE(0xf018, 0xf01f) AM_WRITE(dooyong_bgscroll8_w)
	137	AM_RANGE(0xf020, 0xf027) AM_WRITE(dooyong_fgscroll8_w)
	138	AM_RANGE(0xf800, 0xffff) AM_RAM_WRITE(paletteram_xRRRRRGGGGGBBBBB_le_w) AM_BASE(&paletteram)
144	139	ADDRESS_MAP_END
145	140
146		static ADDRESS_MAP_START( bluehawk_readmem, ADDRESS_SPACE_PROGRAM, 8 )
147		AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM)
148		AM_RANGE(0x8000, 0xbfff) AM_READ(SMH_BANK1)
	141	static ADDRESS_MAP_START( bluehawk_map, ADDRESS_SPACE_PROGRAM, 8 )
	142	AM_RANGE(0x0000, 0x7fff) AM_ROM
	143	AM_RANGE(0x8000, 0xbfff) AM_ROMBANK(1)
149	144	AM_RANGE(0xc000, 0xc000) AM_READ_PORT("DSWA")
	145	AM_RANGE(0xc000, 0xc000) AM_WRITE(flip_screen_w)
150	146	AM_RANGE(0xc001, 0xc001) AM_READ_PORT("DSWB")
151	147	AM_RANGE(0xc002, 0xc002) AM_READ_PORT("P1")
152	148	AM_RANGE(0xc003, 0xc003) AM_READ_PORT("P2")
153	149	AM_RANGE(0xc004, 0xc004) AM_READ_PORT("SYSTEM")
154		AM_RANGE(0xc800, 0xffff) AM_READ(SMH_RAM)
155		ADDRESS_MAP_END
156
157		static ADDRESS_MAP_START( bluehawk_writemem, ADDRESS_SPACE_PROGRAM, 8 )
158		AM_RANGE(0x0000, 0xbfff) AM_WRITE(SMH_ROM)
159		AM_RANGE(0xc000, 0xc000) AM_WRITE(flip_screen_w)
160	150	AM_RANGE(0xc008, 0xc008) AM_WRITE(lastday_bankswitch_w)
161	151	AM_RANGE(0xc010, 0xc010) AM_WRITE(soundlatch_w)
162	152	AM_RANGE(0xc018, 0xc01f) AM_WRITE(dooyong_fg2scroll8_w)
163	153	AM_RANGE(0xc040, 0xc047) AM_WRITE(dooyong_bgscroll8_w)
164	154	AM_RANGE(0xc048, 0xc04f) AM_WRITE(dooyong_fgscroll8_w)
165		AM_RANGE(0xc800, 0xcfff) AM_WRITE(paletteram_xRRRRRGGGGGBBBBB_le_w) AM_BASE(&paletteram)
166		AM_RANGE(0xd000, 0xdfff) AM_WRITE(dooyong_txvideoram8_w) AM_BASE(&dooyong_txvideoram)
167		AM_RANGE(0xe000, 0xefff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
168		AM_RANGE(0xf000, 0xffff) AM_WRITE(SMH_RAM)
	155	AM_RANGE(0xc800, 0xcfff) AM_RAM_WRITE(paletteram_xRRRRRGGGGGBBBBB_le_w) AM_BASE(&paletteram)
	156	AM_RANGE(0xd000, 0xdfff) AM_RAM_WRITE(dooyong_txvideoram8_w) AM_BASE(&dooyong_txvideoram)
	157	AM_RANGE(0xe000, 0xefff) AM_RAM AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
	158	AM_RANGE(0xf000, 0xffff) AM_RAM
169	159	ADDRESS_MAP_END
170	160
171		static ADDRESS_MAP_START( flytiger_readmem, ADDRESS_SPACE_PROGRAM, 8 )
172		AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM)
173		AM_RANGE(0x8000, 0xbfff) AM_READ(SMH_BANK1)
174		AM_RANGE(0xc000, 0xcfff) AM_READ(SMH_RAM)
175		AM_RANGE(0xd000, 0xdfff) AM_READ(SMH_RAM)
	161	static ADDRESS_MAP_START( flytiger_map, ADDRESS_SPACE_PROGRAM, 8 )
	162	AM_RANGE(0x0000, 0x7fff) AM_ROM
	163	AM_RANGE(0x8000, 0xbfff) AM_ROMBANK(1)
	164	AM_RANGE(0xc000, 0xcfff) AM_RAM AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
	165	AM_RANGE(0xd000, 0xdfff) AM_RAM
176	166	AM_RANGE(0xe000, 0xe000) AM_READ_PORT("P1")
	167	AM_RANGE(0xe000, 0xe000) AM_WRITE(lastday_bankswitch_w)
177	168	AM_RANGE(0xe002, 0xe002) AM_READ_PORT("P2")
178	169	AM_RANGE(0xe004, 0xe004) AM_READ_PORT("SYSTEM")
179	170	AM_RANGE(0xe006, 0xe006) AM_READ_PORT("DSWA")
180	171	AM_RANGE(0xe008, 0xe008) AM_READ_PORT("DSWB")
181		AM_RANGE(0xe800, 0xefff) AM_READ(SMH_RAM)
182		AM_RANGE(0xf000, 0xf7ff) AM_READ(SMH_RAM)
183		AM_RANGE(0xf800, 0xffff) AM_READ(SMH_RAM)
184		ADDRESS_MAP_END
185
186		static ADDRESS_MAP_START( flytiger_writemem, ADDRESS_SPACE_PROGRAM, 8 )
187		AM_RANGE(0x0000, 0xbfff) AM_WRITE(SMH_ROM)
188		AM_RANGE(0xc000, 0xcfff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
189		AM_RANGE(0xd000, 0xdfff) AM_WRITE(SMH_RAM)
190		AM_RANGE(0xe000, 0xe000) AM_WRITE(lastday_bankswitch_w)
191	172	AM_RANGE(0xe010, 0xe010) AM_WRITE(flytiger_ctrl_w)   /* coin counter, flip screen */
192	173	AM_RANGE(0xe020, 0xe020) AM_WRITE(soundlatch_w)
193	174	AM_RANGE(0xe030, 0xe037) AM_WRITE(dooyong_bgscroll8_w)
194	175	AM_RANGE(0xe040, 0xe047) AM_WRITE(dooyong_fgscroll8_w)
195		AM_RANGE(0xe800, 0xefff) AM_WRITE(paletteram_xRRRRRGGGGGBBBBB_le_w) AM_BASE(&paletteram)
196		AM_RANGE(0xf000, 0xffff) AM_WRITE(dooyong_txvideoram8_w) AM_BASE(&dooyong_txvideoram)
	176	AM_RANGE(0xe800, 0xefff) AM_RAM_WRITE(paletteram_xRRRRRGGGGGBBBBB_le_w) AM_BASE(&paletteram)
	177	AM_RANGE(0xf000, 0xffff) AM_RAM_WRITE(dooyong_txvideoram8_w) AM_BASE(&dooyong_txvideoram)
197	178	ADDRESS_MAP_END
198	179
199		static ADDRESS_MAP_START( primella_readmem, ADDRESS_SPACE_PROGRAM, 8 )
200		AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM)
201		AM_RANGE(0x8000, 0xbfff) AM_READ(SMH_BANK1)
202		AM_RANGE(0xc000, 0xcfff) AM_READ(SMH_RAM)
203		AM_RANGE(0xd000, 0xd3ff) AM_READ(SMH_RAM)
204		AM_RANGE(0xe000, 0xefff) AM_READ(SMH_RAM)
	180	static ADDRESS_MAP_START( primella_map, ADDRESS_SPACE_PROGRAM, 8 )
	181	AM_RANGE(0x0000, 0x7fff) AM_ROM
	182	AM_RANGE(0x8000, 0xbfff) AM_ROMBANK(1)
	183	AM_RANGE(0xc000, 0xcfff) AM_RAM
	184	AM_RANGE(0xd000, 0xd3ff) AM_RAM /* what is this? looks like a palette? scratchpad RAM maybe? */
	185	AM_RANGE(0xe000, 0xefff) AM_RAM_WRITE(dooyong_txvideoram8_w) AM_BASE(&dooyong_txvideoram)
	186	AM_RANGE(0xf000, 0xf7ff) AM_WRITE(paletteram_xRRRRRGGGGGBBBBB_le_w) AM_BASE(&paletteram)
205	187	AM_RANGE(0xf800, 0xf800) AM_READ_PORT("DSWA")
	188	AM_RANGE(0xf800, 0xf800) AM_WRITE(primella_ctrl_w)   /* bank switch, flip screen etc */
206	189	AM_RANGE(0xf810, 0xf810) AM_READ_PORT("DSWB")
	190	AM_RANGE(0xf810, 0xf810) AM_WRITE(soundlatch_w)
207	191	AM_RANGE(0xf820, 0xf820) AM_READ_PORT("P1")
208	192	AM_RANGE(0xf830, 0xf830) AM_READ_PORT("P2")
209	193	AM_RANGE(0xf840, 0xf840) AM_READ_PORT("SYSTEM")
210		ADDRESS_MAP_END
211
212		static ADDRESS_MAP_START( primella_writemem, ADDRESS_SPACE_PROGRAM, 8 )
213		AM_RANGE(0x0000, 0xbfff) AM_WRITE(SMH_ROM)
214		AM_RANGE(0xc000, 0xcfff) AM_WRITE(SMH_RAM)
215		AM_RANGE(0xd000, 0xd3ff) AM_WRITE(SMH_RAM)   /* what is this? looks like a palette? scratchpad RAM maybe? */
216		AM_RANGE(0xe000, 0xefff) AM_WRITE(dooyong_txvideoram8_w) AM_BASE(&dooyong_txvideoram)
217		AM_RANGE(0xf000, 0xf7ff) AM_WRITE(paletteram_xRRRRRGGGGGBBBBB_le_w) AM_BASE(&paletteram)
218		AM_RANGE(0xf800, 0xf800) AM_WRITE(primella_ctrl_w)   /* bank switch, flip screen etc */
219		AM_RANGE(0xf810, 0xf810) AM_WRITE(soundlatch_w)
220	194	AM_RANGE(0xfc00, 0xfc07) AM_WRITE(dooyong_bgscroll8_w)
221	195	AM_RANGE(0xfc08, 0xfc0f) AM_WRITE(dooyong_fgscroll8_w)
222	196	ADDRESS_MAP_END
223	197
224		static ADDRESS_MAP_START( rshark_readmem, ADDRESS_SPACE_PROGRAM, 16 )
	198	static ADDRESS_MAP_START( rshark_map, ADDRESS_SPACE_PROGRAM, 16 )
225	199	ADDRESS_MAP_GLOBAL_MASK(0xfffff)   /* super-x needs this and is similar */
226		AM_RANGE(0x000000, 0x03ffff) AM_READ(SMH_ROM)
227		AM_RANGE(0x040000, 0x04cfff) AM_READ(SMH_RAM)
228		AM_RANGE(0x04d000, 0x04dfff) AM_READ(SMH_RAM)
229		AM_RANGE(0x04e000, 0x04ffff) AM_READ(SMH_RAM)
	200	AM_RANGE(0x000000, 0x03ffff) AM_ROM
	201	AM_RANGE(0x040000, 0x04cfff) AM_RAM
	202	AM_RANGE(0x04d000, 0x04dfff) AM_RAM AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)
	203	AM_RANGE(0x04e000, 0x04ffff) AM_RAM
230	204	AM_RANGE(0x0c0002, 0x0c0003) AM_READ_PORT("DSW")
231	205	AM_RANGE(0x0c0004, 0x0c0005) AM_READ_PORT("P1_P2")
232	206	AM_RANGE(0x0c0006, 0x0c0007) AM_READ_PORT("SYSTEM")
233		ADDRESS_MAP_END
234
235		static ADDRESS_MAP_START( rshark_writemem, ADDRESS_SPACE_PROGRAM, 16 )
236		ADDRESS_MAP_GLOBAL_MASK(0xfffff)   /* super-x needs this and is similar */
237		AM_RANGE(0x000000, 0x03ffff) AM_WRITE(SMH_ROM)
238		AM_RANGE(0x040000, 0x04cfff) AM_WRITE(SMH_RAM)
239		AM_RANGE(0x04d000, 0x04dfff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)
240		AM_RANGE(0x04e000, 0x04ffff) AM_WRITE(SMH_RAM)
241	207	AM_RANGE(0x0c4000, 0x0c400f) AM_WRITE(dooyong_bgscroll16_w)
242	208	AM_RANGE(0x0c4010, 0x0c401f) AM_WRITE(dooyong_bg2scroll16_w)
243	209	AM_RANGE(0x0c8000, 0x0c8fff) AM_WRITE(paletteram16_xRRRRRGGGGGBBBBB_word_w) AM_BASE(&paletteram16)
r4679	r4680
247	213	AM_RANGE(0x0cc010, 0x0cc01f) AM_WRITE(dooyong_fg2scroll16_w)
248	214	ADDRESS_MAP_END
249	215
250		static ADDRESS_MAP_START( superx_readmem, ADDRESS_SPACE_PROGRAM, 16 )
	216	static ADDRESS_MAP_START( superx_map, ADDRESS_SPACE_PROGRAM, 16 )
251	217	ADDRESS_MAP_GLOBAL_MASK(0xfffff)
252		AM_RANGE(0x000000, 0x03ffff) AM_READ(SMH_ROM)
253		AM_RANGE(0x0d0000, 0x0dcfff) AM_READ(SMH_RAM)
254		AM_RANGE(0x0dd000, 0x0ddfff) AM_READ(SMH_RAM)
255		AM_RANGE(0x0de000, 0x0dffff) AM_READ(SMH_RAM)
	218	AM_RANGE(0x000000, 0x03ffff) AM_ROM
	219	AM_RANGE(0x0d0000, 0x0dcfff) AM_RAM
	220	AM_RANGE(0x0dd000, 0x0ddfff) AM_RAM AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)
	221	AM_RANGE(0x0de000, 0x0dffff) AM_RAM
256	222	AM_RANGE(0x080002, 0x080003) AM_READ_PORT("DSW")
257	223	AM_RANGE(0x080004, 0x080005) AM_READ_PORT("P1_P2")
258	224	AM_RANGE(0x080006, 0x080007) AM_READ_PORT("SYSTEM")
259		ADDRESS_MAP_END
260
261		static ADDRESS_MAP_START( superx_writemem, ADDRESS_SPACE_PROGRAM, 16 )
262		ADDRESS_MAP_GLOBAL_MASK(0xfffff)
263		AM_RANGE(0x000000, 0x03ffff) AM_WRITE(SMH_ROM)
264		AM_RANGE(0x0d0000, 0x0dcfff) AM_WRITE(SMH_RAM)
265		AM_RANGE(0x0dd000, 0x0ddfff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)
266		AM_RANGE(0x0de000, 0x0dffff) AM_WRITE(SMH_RAM)
267	225	AM_RANGE(0x084000, 0x08400f) AM_WRITE(dooyong_bgscroll16_w)
268	226	AM_RANGE(0x084010, 0x08401f) AM_WRITE(dooyong_bg2scroll16_w)
269	227	AM_RANGE(0x088000, 0x088fff) AM_WRITE(paletteram16_xRRRRRGGGGGBBBBB_word_w) AM_BASE(&paletteram16)
r4679	r4680
273	231	AM_RANGE(0x08c010, 0x08c01f) AM_WRITE(dooyong_fg2scroll16_w)
274	232	ADDRESS_MAP_END
275	233
276		static ADDRESS_MAP_START( popbingo_readmem, ADDRESS_SPACE_PROGRAM, 16 )
	234	static ADDRESS_MAP_START( popbingo_map, ADDRESS_SPACE_PROGRAM, 16 )
277	235	ADDRESS_MAP_GLOBAL_MASK(0xfffff)
278		AM_RANGE(0x000000, 0x03ffff) AM_READ(SMH_ROM)
279		AM_RANGE(0x040000, 0x04cfff) AM_READ(SMH_RAM)
280		AM_RANGE(0x04d000, 0x04dfff) AM_READ(SMH_RAM) // sprites
281		AM_RANGE(0x04e000, 0x04ffff) AM_READ(SMH_RAM)
	236	AM_RANGE(0x000000, 0x03ffff) AM_ROM
	237	AM_RANGE(0x040000, 0x04cfff) AM_RAM
	238	AM_RANGE(0x04d000, 0x04dfff) AM_RAM AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)
	239	AM_RANGE(0x04e000, 0x04ffff) AM_RAM
282	240	AM_RANGE(0x0c0002, 0x0c0003) AM_READ_PORT("DSW")
283	241	AM_RANGE(0x0c0004, 0x0c0005) AM_READ_PORT("P1_P2")
284	242	AM_RANGE(0x0c0006, 0x0c0007) AM_READ_PORT("SYSTEM")
285		ADDRESS_MAP_END
286
287		static ADDRESS_MAP_START( popbingo_writemem, ADDRESS_SPACE_PROGRAM, 16 )
288		ADDRESS_MAP_GLOBAL_MASK(0xfffff)
289		AM_RANGE(0x000000, 0x03ffff) AM_WRITE(SMH_ROM)
290		AM_RANGE(0x040000, 0x04cfff) AM_WRITE(SMH_RAM)
291		AM_RANGE(0x04d000, 0x04dfff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)
292		AM_RANGE(0x04e000, 0x04ffff) AM_WRITE(SMH_RAM)
293	243	AM_RANGE(0x0c0012, 0x0c0013) AM_WRITE(soundlatch_word_w)
294	244	AM_RANGE(0x0c0014, 0x0c0015) AM_WRITE(rshark_ctrl_w)
295	245	AM_RANGE(0x0c0018, 0x0c001b) AM_WRITENOP // ?
r4679	r4680
301	251	AM_RANGE(0x0dc000, 0x0dc01f) AM_RAM // registers of some kind?
302	252	ADDRESS_MAP_END
303	253
304		static ADDRESS_MAP_START( lastday_sound_readmem, ADDRESS_SPACE_PROGRAM, 8 )
305		AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM)
306		AM_RANGE(0xc000, 0xc7ff) AM_READ(SMH_RAM)
	254	static ADDRESS_MAP_START( lastday_sound_map, ADDRESS_SPACE_PROGRAM, 8 )
	255	AM_RANGE(0x0000, 0x7fff) AM_ROM
	256	AM_RANGE(0xc000, 0xc7ff) AM_RAM
307	257	AM_RANGE(0xc800, 0xc800) AM_READ(soundlatch_r)
308		AM_RANGE(0xf000, 0xf001) AM_DEVREAD("ym1", ym2203_r)
309		AM_RANGE(0xf002, 0xf003) AM_DEVREAD("ym1", ym2203_r)
	258	AM_RANGE(0xf000, 0xf001) AM_DEVREADWRITE("ym1", ym2203_r, ym2203_w)
	259	AM_RANGE(0xf002, 0xf003) AM_DEVREADWRITE("ym1", ym2203_r, ym2203_w)
310	260	ADDRESS_MAP_END
311	261
312		static ADDRESS_MAP_START( lastday_sound_writemem, ADDRESS_SPACE_PROGRAM, 8 )
313		AM_RANGE(0x0000, 0x7fff) AM_WRITE(SMH_ROM)
314		AM_RANGE(0xc000, 0xc7ff) AM_WRITE(SMH_RAM)
315		AM_RANGE(0xf000, 0xf001) AM_DEVWRITE("ym1", ym2203_w)
316		AM_RANGE(0xf002, 0xf003) AM_DEVWRITE("ym2", ym2203_w)
317		ADDRESS_MAP_END
318
319		static ADDRESS_MAP_START( pollux_sound_readmem, ADDRESS_SPACE_PROGRAM, 8 )
320		AM_RANGE(0x0000, 0xefff) AM_READ(SMH_ROM)
321		AM_RANGE(0xf000, 0xf7ff) AM_READ(SMH_RAM)
	262	static ADDRESS_MAP_START( pollux_sound_map, ADDRESS_SPACE_PROGRAM, 8 )
	263	AM_RANGE(0x0000, 0xefff) AM_ROM
	264	AM_RANGE(0xf000, 0xf7ff) AM_RAM
322	265	AM_RANGE(0xf800, 0xf800) AM_READ(soundlatch_r)
323		AM_RANGE(0xf802, 0xf803) AM_DEVREAD("ym1", ym2203_r)
324		AM_RANGE(0xf804, 0xf805) AM_DEVREAD("ym2", ym2203_r)
	266	AM_RANGE(0xf802, 0xf803) AM_DEVREADWRITE("ym1", ym2203_r, ym2203_w)
	267	AM_RANGE(0xf804, 0xf805) AM_DEVREADWRITE("ym2", ym2203_r, ym2203_w)
325	268	ADDRESS_MAP_END
326	269
327		static ADDRESS_MAP_START( pollux_sound_writemem, ADDRESS_SPACE_PROGRAM, 8 )
328		AM_RANGE(0x0000, 0xefff) AM_WRITE(SMH_ROM)
329		AM_RANGE(0xf000, 0xf7ff) AM_WRITE(SMH_RAM)
330		AM_RANGE(0xf802, 0xf803) AM_DEVWRITE("ym1", ym2203_w)
331		AM_RANGE(0xf804, 0xf805) AM_DEVWRITE("ym2", ym2203_w)
332		ADDRESS_MAP_END
333
334		static ADDRESS_MAP_START( bluehawk_sound_readmem, ADDRESS_SPACE_PROGRAM, 8 )
335		AM_RANGE(0x0000, 0xefff) AM_READ(SMH_ROM)
336		AM_RANGE(0xf000, 0xf7ff) AM_READ(SMH_RAM)
	270	static ADDRESS_MAP_START( bluehawk_sound_map, ADDRESS_SPACE_PROGRAM, 8 )
	271	AM_RANGE(0x0000, 0xefff) AM_ROM
	272	AM_RANGE(0xf000, 0xf7ff) AM_RAM
337	273	AM_RANGE(0xf800, 0xf800) AM_READ(soundlatch_r)
338		AM_RANGE(0xf808, 0xf809) AM_DEVREAD("ym", ym2151_r)
339		AM_RANGE(0xf80a, 0xf80a) AM_DEVREAD("oki", okim6295_r)
	274	AM_RANGE(0xf808, 0xf809) AM_DEVREADWRITE("ym", ym2151_r, ym2151_w)
	275	AM_RANGE(0xf80a, 0xf80a) AM_DEVREADWRITE("oki", okim6295_r, okim6295_w)
340	276	ADDRESS_MAP_END
341	277
342		static ADDRESS_MAP_START( bluehawk_sound_writemem, ADDRESS_SPACE_PROGRAM, 8 )
343		AM_RANGE(0x0000, 0xefff) AM_WRITE(SMH_ROM)
344		AM_RANGE(0xf000, 0xf7ff) AM_WRITE(SMH_RAM)
345		AM_RANGE(0xf808, 0xf809) AM_DEVWRITE("ym", ym2151_w)
346		AM_RANGE(0xf80a, 0xf80a) AM_DEVWRITE("oki", okim6295_w)
347		ADDRESS_MAP_END
348
349	278	/***************************************************************************
350	279
351	280	Z80 Generic port definitions
r4679	r4680
805	734
806	735	static void irqhandler(const device_config *device, int irq)
807	736	{
808		cpu_set_input_line(device->machine->cpu[1],0,irq ? ASSERT_LINE : CLEAR_LINE);
	737	cputag_set_input_line(device->machine, "audiocpu", 0, irq ? ASSERT_LINE : CLEAR_LINE);
809	738	}
810	739
811	740	static READ8_DEVICE_HANDLER( unk_r )
r4679	r4680
887	816
888	817	/* basic machine hardware */
889	818	MDRV_CPU_ADD("maincpu", Z80, 8000000)   /* ??? */
890		MDRV_CPU_PROGRAM_MAP(lastday_readmem,lastday_writemem)
	819	MDRV_CPU_PROGRAM_MAP(lastday_map,0)
891	820	MDRV_CPU_VBLANK_INT("screen", irq0_line_hold)
892	821
893	822	MDRV_CPU_ADD("audiocpu", Z80, 4000000)   /* ??? */
894		MDRV_CPU_PROGRAM_MAP(lastday_sound_readmem,lastday_sound_writemem)
	823	MDRV_CPU_PROGRAM_MAP(lastday_sound_map,0)
895	824
896	825	MDRV_MACHINE_START(lastday)
897	826
r4679	r4680
920	849
921	850	/* basic machine hardware */
922	851	MDRV_CPU_ADD("maincpu", Z80, 8000000)   /* ??? */
923		MDRV_CPU_PROGRAM_MAP(gulfstrm_readmem,pollux_writemem)
	852	MDRV_CPU_PROGRAM_MAP(gulfstrm_map,0)
924	853	MDRV_CPU_VBLANK_INT("screen", irq0_line_hold)
925	854
926	855	MDRV_CPU_ADD("audiocpu", Z80, 4000000)   /* ??? */
927		MDRV_CPU_PROGRAM_MAP(lastday_sound_readmem,lastday_sound_writemem)
	856	MDRV_CPU_PROGRAM_MAP(lastday_sound_map,0)
928	857
929	858	MDRV_MACHINE_START(lastday)
930	859
r4679	r4680
953	882
954	883	/* basic machine hardware */
955	884	MDRV_CPU_ADD("maincpu", Z80, 8000000)   /* ??? */
956		MDRV_CPU_PROGRAM_MAP(pollux_readmem,pollux_writemem)
	885	MDRV_CPU_PROGRAM_MAP(pollux_map,0)
957	886	MDRV_CPU_VBLANK_INT("screen", irq0_line_hold)
958	887
959	888	MDRV_CPU_ADD("audiocpu", Z80, 4000000)   /* ??? */
960		MDRV_CPU_PROGRAM_MAP(pollux_sound_readmem,pollux_sound_writemem)
	889	MDRV_CPU_PROGRAM_MAP(pollux_sound_map,0)
961	890
962	891	MDRV_MACHINE_START(lastday)
963	892
r4679	r4680
986	915
987	916	/* basic machine hardware */
988	917	MDRV_CPU_ADD("maincpu", Z80, 8000000)   /* ??? */
989		MDRV_CPU_PROGRAM_MAP(bluehawk_readmem,bluehawk_writemem)
	918	MDRV_CPU_PROGRAM_MAP(bluehawk_map,0)
990	919	MDRV_CPU_VBLANK_INT("screen", irq0_line_hold)
991	920
992	921	MDRV_CPU_ADD("audiocpu", Z80, 4000000)   /* ??? */
993		MDRV_CPU_PROGRAM_MAP(bluehawk_sound_readmem,bluehawk_sound_writemem)
	922	MDRV_CPU_PROGRAM_MAP(bluehawk_sound_map,0)
994	923
995	924	MDRV_MACHINE_START(lastday)
996	925
r4679	r4680
1019	948
1020	949	/* basic machine hardware */
1021	950	MDRV_CPU_ADD("maincpu", Z80, 8000000)   /* ??? */
1022		MDRV_CPU_PROGRAM_MAP(flytiger_readmem,flytiger_writemem)
	951	MDRV_CPU_PROGRAM_MAP(flytiger_map,0)
1023	952	MDRV_CPU_VBLANK_INT("screen", irq0_line_hold)
1024	953
1025	954	MDRV_CPU_ADD("audiocpu", Z80, 4000000)   /* ??? */
1026		MDRV_CPU_PROGRAM_MAP(bluehawk_sound_readmem,bluehawk_sound_writemem)
	955	MDRV_CPU_PROGRAM_MAP(bluehawk_sound_map,0)
1027	956
1028	957	MDRV_MACHINE_START(lastday)
1029	958
r4679	r4680
1052	981
1053	982	/* basic machine hardware */
1054	983	MDRV_CPU_ADD("maincpu", Z80, 8000000)   /* ??? */
1055		MDRV_CPU_PROGRAM_MAP(primella_readmem,primella_writemem)
	984	MDRV_CPU_PROGRAM_MAP(primella_map,0)
1056	985	MDRV_CPU_VBLANK_INT("screen", irq0_line_hold)
1057	986
1058	987	MDRV_CPU_ADD("audiocpu", Z80, 4000000)   /* ??? */
1059		MDRV_CPU_PROGRAM_MAP(bluehawk_sound_readmem,bluehawk_sound_writemem)
	988	MDRV_CPU_PROGRAM_MAP(bluehawk_sound_map,0)
1060	989
1061	990	MDRV_MACHINE_START(lastday)
1062	991
r4679	r4680
1091	1020
1092	1021	/* basic machine hardware */
1093	1022	MDRV_CPU_ADD("maincpu", M68000, 8000000)   /* measured on super-x */
1094		MDRV_CPU_PROGRAM_MAP(rshark_readmem,rshark_writemem)
	1023	MDRV_CPU_PROGRAM_MAP(rshark_map,0)
1095	1024	MDRV_CPU_VBLANK_INT_HACK(rshark_interrupt,2)   /* 5 and 6 */
1096	1025
1097	1026	MDRV_CPU_ADD("audiocpu", Z80, 4000000)   /* measured on super-x */
1098		MDRV_CPU_PROGRAM_MAP(bluehawk_sound_readmem,bluehawk_sound_writemem)
	1027	MDRV_CPU_PROGRAM_MAP(bluehawk_sound_map,0)
1099	1028
1100	1029	/* video hardware */
1101	1030	MDRV_VIDEO_ATTRIBUTES(VIDEO_BUFFERS_SPRITERAM)
r4679	r4680
1122	1051
1123	1052	/* basic machine hardware */
1124	1053	MDRV_CPU_ADD("maincpu", M68000, 8000000)   /* measured on super-x */
1125		MDRV_CPU_PROGRAM_MAP(superx_readmem,superx_writemem)
	1054	MDRV_CPU_PROGRAM_MAP(superx_map,0)
1126	1055	MDRV_CPU_VBLANK_INT_HACK(rshark_interrupt,2)   /* 5 and 6 */
1127	1056
1128	1057	MDRV_CPU_ADD("audiocpu", Z80, 4000000)   /* measured on super-x */
1129		MDRV_CPU_PROGRAM_MAP(bluehawk_sound_readmem,bluehawk_sound_writemem)
	1058	MDRV_CPU_PROGRAM_MAP(bluehawk_sound_map,0)
1130	1059
1131	1060	/* video hardware */
1132	1061	MDRV_VIDEO_ATTRIBUTES(VIDEO_BUFFERS_SPRITERAM)
r4679	r4680
1153	1082
1154	1083	/* basic machine hardware */
1155	1084	MDRV_CPU_ADD("maincpu", M68000, 10000000)
1156		MDRV_CPU_PROGRAM_MAP(popbingo_readmem,popbingo_writemem)
	1085	MDRV_CPU_PROGRAM_MAP(popbingo_map,0)
1157	1086	MDRV_CPU_VBLANK_INT_HACK(rshark_interrupt,2)   /* 5 and 6 */
1158	1087
1159	1088	MDRV_CPU_ADD("audiocpu", Z80, 4000000)   /* measured on super-x */
1160		MDRV_CPU_PROGRAM_MAP(bluehawk_sound_readmem,bluehawk_sound_writemem)
	1089	MDRV_CPU_PROGRAM_MAP(bluehawk_sound_map,0)
1161	1090
1162	1091	/* video hardware */
1163	1092	MDRV_VIDEO_ATTRIBUTES(VIDEO_BUFFERS_SPRITERAM)

src/mame/drivers/brkthru.c

r4679	r4680
72	72	static WRITE8_HANDLER( brkthru_1803_w )
73	73	{
74	74	/* bit 0 = NMI enable */
75		cpu_interrupt_enable(space->machine->cpu[0], ~data & 1);
	75	cpu_interrupt_enable(cputag_get_cpu(space->machine, "maincpu"), ~data & 1);
76	76
77	77	/* bit 1 = ? maybe IRQ acknowledge */
78	78	}
79	79	static WRITE8_HANDLER( darwin_0803_w )
80	80	{
81	81	/* bit 0 = NMI enable */
82		/*cpu_interrupt_enable(space->machine->cpu[1], ~data & 1);*/
	82	/*cpu_interrupt_enable(cputag_get_cpu(space->machine, "audiocpu"), ~data & 1);*/
83	83	logerror("0803 %02X\n",data);
84		cpu_interrupt_enable(space->machine->cpu[0], data & 1);
	84	cpu_interrupt_enable(cputag_get_cpu(space->machine, "maincpu"), data & 1);
85	85	/* bit 1 = ? maybe IRQ acknowledge */
86	86	}
87	87
88	88	static WRITE8_HANDLER( brkthru_soundlatch_w )
89	89	{
90	90	soundlatch_w(space,offset,data);
91		cpu_set_input_line(space->machine->cpu[1],INPUT_LINE_NMI,PULSE_LINE);
	91	cputag_set_input_line(space->machine, "audiocpu", INPUT_LINE_NMI, PULSE_LINE);
92	92	}
93	93
94	94	static INPUT_CHANGED( coin_inserted )
95	95	{
96	96	/* coin insertion causes an IRQ */
97		cpu_set_input_line(field->port->machine->cpu[0], 0, newval ? CLEAR_LINE : ASSERT_LINE);
	97	cputag_set_input_line(field->port->machine, "maincpu", 0, newval ? CLEAR_LINE : ASSERT_LINE);
98	98	}
99	99
100	100
r4679	r4680
324	324	/* handler called by the 3812 emulator when the internal timers cause an IRQ */
325	325	static void irqhandler(const device_config *device, int linestate)
326	326	{
327		cpu_set_input_line(device->machine->cpu[1],M6809_IRQ_LINE,linestate);
	327	cputag_set_input_line(device->machine, "audiocpu", M6809_IRQ_LINE, linestate);
328	328	}
329	329
330	330	static const ym3526_interface ym3526_config =

src/mame/drivers/williams.c

r4679	r4680
527	527	const device_config *pia_1 = devtag_get_device(space->machine, "pia_1");
528	528
529	529	/* this routine dynamically installs the memory mapped above from c000-cfff */
530		memory_install_write8_handler    (space, 0xc000, 0xc00f, 0, 0x03e0, SMH_BANK4);
	530	memory_install_write8_handler    (space, 0xc000, 0xc00f, 0, 0x03e0, (write8_space_func)SMH_BANK(4));
531	531	memory_install_write8_handler    (space, 0xc010, 0xc01f, 0, 0x03e0, defender_video_control_w);
532	532	memory_install_write8_handler    (space, 0xc3ff, 0xc3ff, 0, 0,      williams_watchdog_reset_w);
533		memory_install_readwrite8_handler(space, 0xc400, 0xc4ff, 0, 0x0300, SMH_BANK3, williams_cmos_w);
	533	memory_install_readwrite8_handler(space, 0xc400, 0xc4ff, 0, 0x0300, (read8_space_func)SMH_BANK(3), williams_cmos_w);
534	534	memory_install_read8_handler     (space, 0xc800, 0xcbff, 0, 0x03e0, williams_video_counter_r);
535	535	memory_install_readwrite8_device_handler(space, pia_1, 0xcc00, 0xcc03, 0, 0x03e0, pia6821_r, pia6821_w);
536	536	memory_install_readwrite8_device_handler(space, pia_0, 0xcc04, 0xcc07, 0, 0x03e0, pia6821_r, pia6821_w);
r4679	r4680
547	547	*************************************/
548	548
549	549	static ADDRESS_MAP_START( williams_map, ADDRESS_SPACE_PROGRAM, 8 )
550		AM_RANGE(0x0000, 0x8fff) AM_READWRITE(SMH_BANK1, SMH_RAM) AM_BASE(&williams_videoram)
	550	AM_RANGE(0x0000, 0x8fff) AM_READWRITE(SMH_BANK(1), SMH_RAM) AM_BASE(&williams_videoram)
551	551	AM_RANGE(0x9000, 0xbfff) AM_RAM
552	552	AM_RANGE(0xc000, 0xc00f) AM_MIRROR(0x03f0) AM_WRITE(SMH_RAM) AM_BASE(&paletteram)
553	553	AM_RANGE(0xc804, 0xc807) AM_MIRROR(0x00f0) AM_DEVREADWRITE("pia_0", pia6821_r, pia6821_w)
r4679	r4680
562	562
563	563
564	564	static ADDRESS_MAP_START( williams_extra_ram_map, ADDRESS_SPACE_PROGRAM, 8 )
565		AM_RANGE(0x0000, 0x8fff) AM_READWRITE(SMH_BANK1, SMH_RAM) AM_BASE(&williams_videoram)
	565	AM_RANGE(0x0000, 0x8fff) AM_READWRITE(SMH_BANK(1), SMH_RAM) AM_BASE(&williams_videoram)
566	566	AM_RANGE(0x9000, 0xbfff) AM_RAM
567	567	AM_RANGE(0xc000, 0xc00f) AM_MIRROR(0x03f0) AM_WRITE(SMH_RAM) AM_BASE(&paletteram)
568	568	AM_RANGE(0xc804, 0xc807) AM_MIRROR(0x00f0) AM_DEVREADWRITE("pia_0", pia6821_r, pia6821_w)
r4679	r4680
585	585	*************************************/
586	586
587	587	static ADDRESS_MAP_START( blaster_map, ADDRESS_SPACE_PROGRAM, 8 )
588		AM_RANGE(0x0000, 0x3fff) AM_READWRITE(SMH_BANK1, SMH_RAM) AM_BASE(&williams_videoram)
589		AM_RANGE(0x4000, 0x8fff) AM_READWRITE(SMH_BANK2, SMH_RAM)
	588	AM_RANGE(0x0000, 0x3fff) AM_READWRITE(SMH_BANK(1), SMH_RAM) AM_BASE(&williams_videoram)
	589	AM_RANGE(0x4000, 0x8fff) AM_READWRITE(SMH_BANK(2), SMH_RAM)
590	590	AM_RANGE(0xbb00, 0xbbff) AM_WRITE(SMH_RAM) AM_BASE(&blaster_palette_0)
591	591	AM_RANGE(0xbc00, 0xbcff) AM_WRITE(SMH_RAM) AM_BASE(&blaster_scanline_control)
592	592	AM_RANGE(0x9000, 0xbfff) AM_RAM
r4679	r4680
613	613	*************************************/
614	614
615	615	static ADDRESS_MAP_START( williams2_map, ADDRESS_SPACE_PROGRAM, 8 )
616		AM_RANGE(0x0000, 0x7fff) AM_READWRITE(SMH_BANK1, SMH_RAM) AM_BASE(&williams_videoram)
	616	AM_RANGE(0x0000, 0x7fff) AM_READWRITE(SMH_BANK(1), SMH_RAM) AM_BASE(&williams_videoram)
617	617	AM_RANGE(0x8000, 0xbfff) AM_RAM
618	618	AM_RANGE(0xc000, 0xc7ff) AM_RAM_WRITE(williams2_tileram_w) AM_BASE(&williams2_tileram)
619	619	AM_RANGE(0xc800, 0xc87f) AM_WRITE(williams2_bank_select_w)
r4679	r4680
635	635
636	636
637	637	static ADDRESS_MAP_START( williams2_extra_ram_map, ADDRESS_SPACE_PROGRAM, 8 )
638		AM_RANGE(0x0000, 0x7fff) AM_READWRITE(SMH_BANK1, SMH_RAM) AM_BASE(&williams_videoram)
	638	AM_RANGE(0x0000, 0x7fff) AM_READWRITE(SMH_BANK(1), SMH_RAM) AM_BASE(&williams_videoram)
639	639	AM_RANGE(0x8000, 0xbfff) AM_RAM
640	640	AM_RANGE(0xc000, 0xc7ff) AM_RAM_WRITE(williams2_tileram_w) AM_BASE(&williams2_tileram)
641	641	AM_RANGE(0xc800, 0xc87f) AM_WRITE(williams2_bank_select_w)
r4679	r4680
2723	2723	CONFIGURE_BLITTER(WILLIAMS_BLITTER_NONE, 0x0000);
2724	2724
2725	2725	/* install a handler to catch protection checks */
2726		mayday_protection = memory_install_read8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xa190, 0xa191, 0, 0, mayday_protection_r);
	2726	mayday_protection = memory_install_read8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xa190, 0xa191, 0, 0, mayday_protection_r);
2727	2727	}
2728	2728
2729	2729
r4679	r4680
2757	2757	CONFIGURE_BLITTER(WILLIAMS_BLITTER_SC01, 0xc000);
2758	2758
2759	2759	/* bubbles has a full 8-bit-wide CMOS */
2760		memory_install_write8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xcc00, 0xcfff, 0, 0, bubbles_cmos_w);
	2760	memory_install_write8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xcc00, 0xcfff, 0, 0, bubbles_cmos_w);
2761	2761	}
2762	2762
2763	2763
r4679	r4680
2798	2798	CONFIGURE_BLITTER(WILLIAMS_BLITTER_SC01, 0xc000);
2799	2799
2800	2800	/* add a third PIA */
2801		memory_install_readwrite8_device_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), pia_3, 0xc808, 0xc80b, 0, 0, pia6821_r, pia6821_w);
	2801	memory_install_readwrite8_device_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), pia_3, 0xc808, 0xc80b, 0, 0, pia6821_r, pia6821_w);
2802	2802
2803	2803	/* install extra input handlers */
2804		memory_install_read_port_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xc800, 0xc800, 0, 0, "AN0");
2805		memory_install_read_port_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xc801, 0xc801, 0, 0, "AN1");
2806		memory_install_read_port_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xc802, 0xc802, 0, 0, "AN2");
2807		memory_install_read_port_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xc803, 0xc803, 0, 0, "AN3");
	2804	memory_install_read_port_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xc800, 0xc800, 0, 0, "AN0");
	2805	memory_install_read_port_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xc801, 0xc801, 0, 0, "AN1");
	2806	memory_install_read_port_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xc802, 0xc802, 0, 0, "AN2");
	2807	memory_install_read_port_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xc803, 0xc803, 0, 0, "AN3");
2808	2808	}
2809	2809
2810	2810
2811	2811	static DRIVER_INIT( alienar )
2812	2812	{
2813	2813	CONFIGURE_BLITTER(WILLIAMS_BLITTER_SC01, 0xc000);
2814		memory_install_write8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xcbff, 0xcbff, 0, 0, SMH_NOP);
	2814	memory_install_write8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xcbff, 0xcbff, 0, 0, (write8_space_func)SMH_NOP);
2815	2815	}
2816	2816
2817	2817
2818	2818	static DRIVER_INIT( alienaru )
2819	2819	{
2820	2820	CONFIGURE_BLITTER(WILLIAMS_BLITTER_SC01, 0xc000);
2821		memory_install_write8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xcbff, 0xcbff, 0, 0, SMH_NOP);
	2821	memory_install_write8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xcbff, 0xcbff, 0, 0, (write8_space_func)SMH_NOP);
2822	2822	}
2823	2823
2824	2824

src/mame/drivers/fuukifg3.c

r4679	r4680
255	255
256	256	// Lines with empty comment are for debug only
257	257
258		static ADDRESS_MAP_START( fuuki32_readmem, ADDRESS_SPACE_PROGRAM, 32 )
259		AM_RANGE(0x000000, 0x1fffff) AM_READ(SMH_ROM)
260		AM_RANGE(0x400000, 0x40ffff) AM_READ(SMH_RAM) // Work RAM
261		AM_RANGE(0x410000, 0x41ffff) AM_READ(SMH_RAM) // Work RAM (used by asurabus)
262		AM_RANGE(0x500000, 0x501fff) AM_READ(SMH_RAM) // Tilemap 1
263		AM_RANGE(0x502000, 0x503fff) AM_READ(SMH_RAM) // Tilemap 2
264		AM_RANGE(0x504000, 0x505fff) AM_READ(SMH_RAM) // Tilemap bg
265		AM_RANGE(0x506000, 0x507fff) AM_READ(SMH_RAM) // Tilemap bg2
266		AM_RANGE(0x508000, 0x517fff) AM_READ(SMH_RAM) // More tilemap, or linescroll? Seems to be empty all of the time
267		AM_RANGE(0x600000, 0x601fff) AM_READ(SMH_RAM) // Sprites
	258	static ADDRESS_MAP_START( fuuki32_map, ADDRESS_SPACE_PROGRAM, 32 )
	259	AM_RANGE(0x000000, 0x1fffff) AM_ROM                                                      // ROM
268	260
269		AM_RANGE(0x700000, 0x703fff) AM_READ(SMH_RAM) // Palette
	261	AM_RANGE(0x400000, 0x40ffff) AM_RAM                                                      // Work RAM
	262	AM_RANGE(0x410000, 0x41ffff) AM_RAM                                                      // Work RAM (used by asurabus)
270	263
271		AM_RANGE(0x800000, 0x800003) AM_READ_PORT("800000") // Coin
272		AM_RANGE(0x810000, 0x810003) AM_READ_PORT("810000") // Player Inputs
273		AM_RANGE(0x880000, 0x880003) AM_READ_PORT("880000") // Service + DIPS
274		AM_RANGE(0x890000, 0x890003) AM_READ_PORT("890000") // More DIPS
	264	AM_RANGE(0x500000, 0x501fff) AM_RAM_WRITE(fuuki32_vram_0_w) AM_BASE(&fuuki32_vram_0)               // Tilemap 1
	265	AM_RANGE(0x502000, 0x503fff) AM_RAM_WRITE(fuuki32_vram_1_w) AM_BASE(&fuuki32_vram_1)               // Tilemap 2
	266	AM_RANGE(0x504000, 0x505fff) AM_RAM_WRITE(fuuki32_vram_2_w) AM_BASE(&fuuki32_vram_2)               // Tilemap bg
	267	AM_RANGE(0x506000, 0x507fff) AM_RAM_WRITE(fuuki32_vram_3_w) AM_BASE(&fuuki32_vram_3)               // Tilemap bg2
	268	AM_RANGE(0x508000, 0x517fff) AM_RAM                                                      // More tilemap, or linescroll? Seems to be empty all of the time
275	269
276		AM_RANGE(0x8c0000, 0x8c001f) AM_READ(SMH_RAM)// Video Registers
	270	AM_RANGE(0x600000, 0x601fff) AM_RAM AM_BASE(&spriteram32) AM_SIZE(&spriteram_size)                  // Sprites
	271	AM_RANGE(0x700000, 0x703fff) AM_RAM_WRITE(paletteram32_xRRRRRGGGGGBBBBB_dword_w) AM_BASE(&paletteram32)   // Palette
277	272
278		/**/AM_RANGE(0x8d0000, 0x8d0003) AM_READ(SMH_RAM) // Flipscreen Related
279		/**/AM_RANGE(0x8e0000, 0x8e0003) AM_READ(SMH_RAM) // Controls layer order
	273	AM_RANGE(0x800000, 0x800003) AM_READ_PORT("800000") AM_WRITENOP                                 // Coin
	274	AM_RANGE(0x810000, 0x810003) AM_READ_PORT("810000") AM_WRITENOP                                 // Player Inputs
	275	AM_RANGE(0x880000, 0x880003) AM_READ_PORT("880000")                                          // Service + DIPS
	276	AM_RANGE(0x890000, 0x890003) AM_READ_PORT("890000")                                          // More DIPS
280	277
281		AM_RANGE(0x903fe0, 0x903fff) AM_READ(snd_020_r) // Shared with Z80
282		//  AM_RANGE(0x903fe0, 0x903fe3) AM_READ(fuuki32_sound_command_r) // Shared with Z80
283		//  AM_RANGE(0x903fe4, 0x903fff) AM_READ(SMH_RAM) // ??
284		ADDRESS_MAP_END
	278	AM_RANGE(0x8c0000, 0x8c001f) AM_RAM_WRITE(fuuki32_vregs_w) AM_BASE(&fuuki32_vregs)                  // Video Registers
285	279
286		static ADDRESS_MAP_START( fuuki32_writemem, ADDRESS_SPACE_PROGRAM, 32 )
287		AM_RANGE(0x000000, 0x1fffff) AM_WRITE(SMH_ROM)
288		AM_RANGE(0x400000, 0x40ffff) AM_WRITE(SMH_RAM) // Work RAM
289		AM_RANGE(0x410000, 0x41ffff) AM_WRITE(SMH_RAM) // Work RAM
290		AM_RANGE(0x500000, 0x501fff) AM_WRITE(fuuki32_vram_0_w) AM_BASE(&fuuki32_vram_0) // Tilemap 1
291		AM_RANGE(0x502000, 0x503fff) AM_WRITE(fuuki32_vram_1_w) AM_BASE(&fuuki32_vram_1) // Tilemap 2
292		AM_RANGE(0x504000, 0x505fff) AM_WRITE(fuuki32_vram_2_w) AM_BASE(&fuuki32_vram_2) // Tilemap bg
293		AM_RANGE(0x506000, 0x507fff) AM_WRITE(fuuki32_vram_3_w) AM_BASE(&fuuki32_vram_3) // Tilemap bg2
294		AM_RANGE(0x508000, 0x517fff) AM_WRITE(SMH_RAM) // More tilemap, or linescroll? Seems to be empty all of the time
	280	AM_RANGE(0x8d0000, 0x8d0003) AM_RAM                                                    // Flipscreen Related
	281	/**/AM_RANGE(0x8e0000, 0x8e0003) AM_RAM AM_BASE(&fuuki32_priority)                                  // Controls layer order
295	282
296		AM_RANGE(0x600000, 0x601fff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram32) AM_SIZE(&spriteram_size   )   // Sprites
297		AM_RANGE(0x700000, 0x703fff) AM_WRITE(paletteram32_xRRRRRGGGGGBBBBB_dword_w) AM_BASE(&paletteram32) // Palette
	283	AM_RANGE(0x903fe0, 0x903fff) AM_READWRITE(snd_020_r, snd_020_w)                               // Shared with Z80
	284	//  AM_RANGE(0x903fe0, 0x903fe3) AM_READ(fuuki32_sound_command_r)                                           // Shared with Z80
	285	//  AM_RANGE(0x903fe4, 0x903fff) AM_READ(SMH_RAM)                                                           // ??
298	286
299		AM_RANGE(0x800000, 0x800003) AM_WRITENOP // Clear buffered inputs
300		AM_RANGE(0x810000, 0x810003) AM_WRITENOP // Clear buffered inputs
301
302		AM_RANGE(0x8c0000, 0x8c001f) AM_WRITE(fuuki32_vregs_w) AM_BASE(&fuuki32_vregs)   // Video Registers
303
304		AM_RANGE(0x8d0000, 0x8d0003) AM_WRITE(SMH_RAM) // Flipscreen Related
305		AM_RANGE(0x8e0000, 0x8e0003) AM_WRITE(SMH_RAM) AM_BASE(&fuuki32_priority) // Controls layer order
306
307		AM_RANGE(0x903fe0, 0x903fff) AM_WRITE(snd_020_w) // z80 comms
308
309	287	AM_RANGE(0xa00000, 0xa00003) AM_WRITE(SMH_RAM) AM_BASE(&fuuki32_tilebank)
310	288	ADDRESS_MAP_END
311	289
r4679	r4680
334	312	fuuki32_shared_ram[offset] = data;
335	313	}
336	314
337		static ADDRESS_MAP_START( fuuki32_sound_readmem, ADDRESS_SPACE_PROGRAM, 8 )
338		AM_RANGE(0x0000, 0x5fff) AM_READ(SMH_ROM      )   // ROM
339		AM_RANGE(0x6000, 0x6fff) AM_READ(SMH_RAM      )   // RAM
340		AM_RANGE(0x7ff0, 0x7fff) AM_READ(snd_z80_r)
341		AM_RANGE(0x8000, 0xffff) AM_READ(SMH_BANK1      )   // ROM
	315	static ADDRESS_MAP_START( fuuki32_sound_map, ADDRESS_SPACE_PROGRAM, 8 )
	316	AM_RANGE(0x0000, 0x5fff) AM_ROM                        // ROM
	317	AM_RANGE(0x6000, 0x6fff) AM_RAM                        // RAM
	318	AM_RANGE(0x7ff0, 0x7fff) AM_READWRITE(snd_z80_r, snd_z80_w)
	319	AM_RANGE(0x8000, 0xffff) AM_ROMBANK(1)                  // ROM
342	320	ADDRESS_MAP_END
343	321
344		static ADDRESS_MAP_START( fuuki32_sound_writemem, ADDRESS_SPACE_PROGRAM, 8 )
345		AM_RANGE(0x0000, 0x5fff) AM_WRITE(SMH_ROM      )   // ROM
346		AM_RANGE(0x6000, 0x6fff) AM_WRITE(SMH_RAM      )   // RAM
347		AM_RANGE(0x7ff0, 0x7fff) AM_WRITE(snd_z80_w)
348		AM_RANGE(0x8000, 0xffff) AM_WRITE(SMH_ROM      )   // ROM
349		ADDRESS_MAP_END
350
351	322	static ADDRESS_MAP_START( fuuki32_sound_io_map, ADDRESS_SPACE_IO, 8 )
352	323	ADDRESS_MAP_GLOBAL_MASK(0xff)
353	324	AM_RANGE(0x00, 0x00) AM_WRITE(fuuki32_sound_bw_w)
r4679	r4680
541	512
542	513	static TIMER_CALLBACK( level_1_interrupt_callback )
543	514	{
544		cpu_set_input_line(machine->cpu[0], 1, HOLD_LINE);
	515	cputag_set_input_line(machine, "maincpu", 1, HOLD_LINE);
545	516	timer_set(machine, video_screen_get_time_until_pos(machine->primary_screen, 248, 0), NULL, 0, level_1_interrupt_callback);
546	517	}
547	518
548	519
549	520	static TIMER_CALLBACK( vblank_interrupt_callback )
550	521	{
551		cpu_set_input_line(machine->cpu[0], 3, HOLD_LINE);   // VBlank IRQ
	522	cputag_set_input_line(machine, "maincpu", 3, HOLD_LINE);   // VBlank IRQ
552	523	timer_set(machine, video_screen_get_time_until_vblank_start(machine->primary_screen), NULL, 0, vblank_interrupt_callback);
553	524	}
554	525
555	526
556	527	static TIMER_CALLBACK( raster_interrupt_callback )
557	528	{
558		cpu_set_input_line(machine->cpu[0], 5, HOLD_LINE);   // Raster Line IRQ
	529	cputag_set_input_line(machine, "maincpu", 5, HOLD_LINE);   // Raster Line IRQ
559	530	video_screen_update_partial(machine->primary_screen, video_screen_get_vpos(machine->primary_screen));
560	531	timer_adjust_oneshot(raster_interrupt_timer, video_screen_get_frame_period(machine->primary_screen), 0);
561	532	}
r4679	r4680
579	550
580	551	static void irqhandler(const device_config *device, int irq)
581	552	{
582		cpu_set_input_line(device->machine->cpu[1], 0, irq ? ASSERT_LINE : CLEAR_LINE);
	553	cputag_set_input_line(device->machine, "soundcpu", 0, irq ? ASSERT_LINE : CLEAR_LINE);
583	554	}
584	555
585	556	static const ymf278b_interface fuuki32_ymf278b_interface =
r4679	r4680
591	562
592	563	/* basic machine hardware */
593	564	MDRV_CPU_ADD("maincpu", M68EC020, CPU_CLOCK) /* 20MHz verified */
594		MDRV_CPU_PROGRAM_MAP(fuuki32_readmem,fuuki32_writemem)
	565	MDRV_CPU_PROGRAM_MAP(fuuki32_map,0)
595	566
596	567	MDRV_CPU_ADD("soundcpu", Z80, SOUND_CPU_CLOCK) /* 6MHz verified */
597		MDRV_CPU_PROGRAM_MAP(fuuki32_sound_readmem,fuuki32_sound_writemem)
	568	MDRV_CPU_PROGRAM_MAP(fuuki32_sound_map,0)
598	569	MDRV_CPU_IO_MAP(fuuki32_sound_io_map,0)
599	570
600	571	MDRV_MACHINE_START(fuuki32)
r4679	r4680
732	703
733	704	GAME( 1998, asurabld,   0, fuuki32, asurabld, 0, ROT0, "Fuuki", "Asura Blade - Sword of Dynasty (Japan)", GAME_IMPERFECT_GRAPHICS )
734	705	GAME( 2000, asurabus,   0, fuuki32, asurabld, 0, ROT0, "Fuuki", "Asura Buster - Eternal Warriors (Japan)", GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND ) // sounds loop forever?
735

src/mame/drivers/dec8.c

r4679	r4680
41	41	#include "cpu/hd6309/hd6309.h"
42	42	#include "cpu/m6809/m6809.h"
43	43	#include "cpu/m6502/m6502.h"
	44	#include "cpu/mcs51/mcs51.h"
44	45	#include "sound/2203intf.h"
45	46	#include "sound/3812intf.h"
46	47	#include "sound/3526intf.h"
r4679	r4680
56	57	/* Only used by ghostb, gondo, garyoret, other games can control buffering */
57	58	static VIDEO_EOF( dec8 )
58	59	{
59		const address_space *space = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM);
60		buffer_spriteram_w(space,0,0);
	60	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	61	buffer_spriteram_w(space, 0, 0);
61	62	}
62	63
63	64	static READ8_HANDLER( i8751_h_r )
64	65	{
65		return i8751_return>>8; /* MSB */
	66	return i8751_return >> 8; /* MSB */
66	67	}
67	68
68	69	static READ8_HANDLER( i8751_l_r )
69	70	{
70		return i8751_return&0xff; /* LSB */
	71	return i8751_return & 0xff; /* LSB */
71	72	}
72	73
73	74	static WRITE8_HANDLER( i8751_reset_w )
74	75	{
75		i8751_return=0;
	76	i8751_return = 0;
76	77	}
77	78
78	79	/******************************************************************************/
r4679	r4680
81	82	{
82	83	int val = 1 << input_port_read(space->machine, "AN0");
83	84
84		switch (offset) {
	85	switch (offset)
	86	{
85	87	case 0: /* Rotary low byte */
86	88	return ~(val & 0xff);
87	89	case 1: /* Joystick = bottom 4 bits, rotary = top 4 */
r4679	r4680
94	96	{
95	97	int val = 1 << input_port_read(space->machine, "AN1");
96	98
97		switch (offset) {
	99	switch (offset)
	100	{
98	101	case 0: /* Rotary low byte */
99	102	return ~(val & 0xff);
100	103	case 1: /* Joystick = bottom 4 bits, rotary = top 4 */
r4679	r4680
105	108
106	109	/******************************************************************************/
107	110
	111	/***************************************************
	112	*
	113	* Hook-up for games that we have a proper MCU dump.
	114	*
	115	***************************************************/
	116
	117	static WRITE8_HANDLER( meikyuh_i8751_w )
	118	{
	119	switch (offset)
	120	{
	121	case 0: /* High byte */
	122	i8751_value = (i8751_value & 0xff) | (data << 8);
	123	break;
	124	case 1: /* Low byte */
	125	i8751_value = (i8751_value & 0xff00) | data;
	126	cputag_set_input_line(space->machine, "mcu", MCS51_INT1_LINE, ASSERT_LINE);
	127	break;
	128	}
	129	}
	130
	131	/********************************
	132	*
	133	* MCU simulations
	134	*
	135	********************************/
	136
108	137	static WRITE8_HANDLER( ghostb_i8751_w )
109	138	{
110		i8751_return=0;
	139	i8751_return = 0;
111	140
112		switch (offset) {
	141	switch (offset)
	142	{
113	143	case 0: /* High byte */
114		i8751_value=(i8751_value&0xff) | (data<<8);
	144	i8751_value = (i8751_value & 0xff) | (data << 8);
115	145	break;
116	146	case 1: /* Low byte */
117		i8751_value=(i8751_value&0xff00) | data;
	147	i8751_value = (i8751_value & 0xff00) | data;
118	148	break;
119	149	}
120	150
121		if (i8751_value==0x00aa) i8751_return=0x655;
122		if (i8751_value==0x021a) i8751_return=0x6e5; /* Ghostbusters ID */
123		if (i8751_value==0x021b) i8751_return=0x6e4; /* Meikyuu Hunter G ID */
	151	if (i8751_value == 0x00aa) i8751_return = 0x655;
	152	if (i8751_value == 0x021a) i8751_return = 0x6e5; /* Ghostbusters ID */
	153	if (i8751_value == 0x021b) i8751_return = 0x6e4; /* Meikyuu Hunter G ID */
124	154	}
125	155
	156
	157
126	158	static WRITE8_HANDLER( srdarwin_i8751_w )
127	159	{
128		static int coins,latch;
129		i8751_return=0;
	160	static int coins, latch;
	161	i8751_return = 0;
130	162
131		switch (offset) {
	163	switch (offset)
	164	{
132	165	case 0: /* High byte */
133		i8751_value=(i8751_value&0xff) | (data<<8);
	166	i8751_value = (i8751_value & 0xff) | (data << 8);
134	167	break;
135	168	case 1: /* Low byte */
136		i8751_value=(i8751_value&0xff00) | data;
	169	i8751_value = (i8751_value & 0xff00) | data;
137	170	break;
138	171	}
139	172
140		if (i8751_value==0x0000) {i8751_return=0;coins=0;}
141		if (i8751_value==0x3063) i8751_return=0x9c; /* Protection - Japanese version */
142		if (i8751_value==0x306b) i8751_return=0x94; /* Protection - World version */
143		if ((i8751_value&0xff00)==0x4000) i8751_return=i8751_value; /* Coinage settings */
144		if (i8751_value==0x5000) i8751_return=((coins / 10) << 4) | (coins % 10); /* Coin request */
145		if (i8751_value==0x6000) {i8751_value=-1; coins--; } /* Coin clear */
	173	if (i8751_value == 0x0000) {i8751_return = 0; coins = 0;}
	174	if (i8751_value == 0x3063) i8751_return = 0x9c;            /* Protection - Japanese version */
	175	if (i8751_value == 0x306b) i8751_return = 0x94;            /* Protection - World version */
	176	if ((i8751_value & 0xff00) == 0x4000) i8751_return = i8751_value;   /* Coinage settings */
	177	if (i8751_value == 0x5000) i8751_return =((coins / 10) << 4) | (coins % 10);   /* Coin request */
	178	if (i8751_value == 0x6000) {i8751_value = -1; coins--; }   /* Coin clear */
146	179	/* Nb:  Command 0x4000 for setting coinage options is not supported */
147		if ((input_port_read(space->machine, "FAKE") & 1) == 1) latch=1;
148		if ((input_port_read(space->machine, "FAKE") & 1) != 1 && latch) {coins++; latch=0;}
	180	if ((input_port_read(space->machine, "FAKE") & 1) == 1) latch = 1;
	181	if ((input_port_read(space->machine, "FAKE") & 1) != 1 && latch) {coins++; latch = 0;}
149	182
150	183	/* This next value is the index to a series of tables,
151	184	each table controls the end of level bad guy, wrong values crash the
r4679	r4680
183	216	but Boss #6 is uncomfirmed as correct.
184	217
185	218	*/
186		if (i8751_value==0x8000) i8751_return=0xf580 +  0; /* Boss #1: Snake + Bees */
187		if (i8751_value==0x8001) i8751_return=0xf580 + 30; /* Boss #2: 4 Corners */
188		if (i8751_value==0x8002) i8751_return=0xf580 + 26; /* Boss #3: Clock */
189		if (i8751_value==0x8003) i8751_return=0xf580 +  2; /* Boss #4: Pyramid */
190		if (i8751_value==0x8004) i8751_return=0xf580 +  6; /* Boss #5: Snake + Head Combo */
191		if (i8751_value==0x8005) i8751_return=0xf580 + 24; /* Boss #6: LED Panels */
192		if (i8751_value==0x8006) i8751_return=0xf580 + 28; /* Boss #7: Dragon */
193		if (i8751_value==0x8007) i8751_return=0xf580 + 32; /* Boss #8: Teleport */
194		if (i8751_value==0x8008) i8751_return=0xf580 + 38; /* Boss #9: Octopus (Pincer) */
195		if (i8751_value==0x8009) i8751_return=0xf580 + 40; /* Boss #10: Bird */
196		if (i8751_value==0x800a) i8751_return=0xf580 + 42; /* End Game(bad address?) */
	219	if (i8751_value == 0x8000) i8751_return = 0xf580 +  0; /* Boss #1: Snake + Bees */
	220	if (i8751_value == 0x8001) i8751_return = 0xf580 + 30; /* Boss #2: 4 Corners */
	221	if (i8751_value == 0x8002) i8751_return = 0xf580 + 26; /* Boss #3: Clock */
	222	if (i8751_value == 0x8003) i8751_return = 0xf580 +  2; /* Boss #4: Pyramid */
	223	if (i8751_value == 0x8004) i8751_return = 0xf580 +  6; /* Boss #5: Snake + Head Combo */
	224	if (i8751_value == 0x8005) i8751_return = 0xf580 + 24; /* Boss #6: LED Panels */
	225	if (i8751_value == 0x8006) i8751_return = 0xf580 + 28; /* Boss #7: Dragon */
	226	if (i8751_value == 0x8007) i8751_return = 0xf580 + 32; /* Boss #8: Teleport */
	227	if (i8751_value == 0x8008) i8751_return = 0xf580 + 38; /* Boss #9: Octopus (Pincer) */
	228	if (i8751_value == 0x8009) i8751_return = 0xf580 + 40; /* Boss #10: Bird */
	229	if (i8751_value == 0x800a) i8751_return = 0xf580 + 42; /* End Game(bad address?) */
197	230	}
198	231
199	232	static WRITE8_HANDLER( gondo_i8751_w )
200	233	{
201		static int coin1,coin2,latch,snd;
202		i8751_return=0;
	234	static int coin1, coin2, latch,snd;
	235	i8751_return = 0;
203	236
204		switch (offset) {
	237	switch (offset)
	238	{
205	239	case 0: /* High byte */
206		i8751_value=(i8751_value&0xff) | (data<<8);
207		if (int_enable) cpu_set_input_line (space->machine->cpu[0], M6809_IRQ_LINE, HOLD_LINE); /* IRQ on *high* byte only */
	240	i8751_value = (i8751_value & 0xff) | (data << 8);
	241	if (int_enable)
	242	cputag_set_input_line (space->machine, "maincpu", M6809_IRQ_LINE, HOLD_LINE); /* IRQ on *high* byte only */
208	243	break;
209	244	case 1: /* Low byte */
210		i8751_value=(i8751_value&0xff00) | data;
	245	i8751_value = (i8751_value & 0xff00) | data;
211	246	break;
212	247	}
213	248
214	249	/* Coins are controlled by the i8751 */
215		if ((input_port_read(space->machine, "I8751") & 3) == 3) latch=1;
216		if ((input_port_read(space->machine, "I8751") & 1) != 1 && latch) {coin1++; snd=1; latch=0;}
217		if ((input_port_read(space->machine, "I8751") & 2) != 2 && latch) {coin2++; snd=1; latch=0;}
	250	if ((input_port_read(space->machine, "I8751") & 3) == 3) latch = 1;
	251	if ((input_port_read(space->machine, "I8751") & 1) != 1 && latch) {coin1++; snd = 1; latch = 0;}
	252	if ((input_port_read(space->machine, "I8751") & 2) != 2 && latch) {coin2++; snd = 1; latch = 0;}
218	253
219	254	/* Work out return values */
220		if (i8751_value==0x0000) {i8751_return=0; coin1=coin2=snd=0;}
221		if (i8751_value==0x038a)  i8751_return=0x375; /* Makyou Senshi ID */
222		if (i8751_value==0x038b)  i8751_return=0x374; /* Gondomania ID */
223		if ((i8751_value>>8)==0x04)  i8751_return=0x40f; /* Coinage settings (Not supported) */
224		if ((i8751_value>>8)==0x05) {i8751_return=0x500 | ((coin1 / 10) << 4) | (coin1 % 10);  } /* Coin 1 */
225		if ((i8751_value>>8)==0x06 && coin1 && !offset) {i8751_return=0x600; coin1--; } /* Coin 1 clear */
226		if ((i8751_value>>8)==0x07) {i8751_return=0x700 | ((coin2 / 10) << 4) | (coin2 % 10);  } /* Coin 2 */
227		if ((i8751_value>>8)==0x08 && coin2 && !offset) {i8751_return=0x800; coin2--; } /* Coin 2 clear */
	255	if (i8751_value == 0x0000) {i8751_return = 0; coin1 = coin2 = snd = 0;}
	256	if (i8751_value == 0x038a)  i8751_return = 0x375; /* Makyou Senshi ID */
	257	if (i8751_value == 0x038b)  i8751_return = 0x374; /* Gondomania ID */
	258	if ((i8751_value >> 8) == 0x04)  i8751_return = 0x40f; /* Coinage settings (Not supported) */
	259	if ((i8751_value >> 8) == 0x05) {i8751_return = 0x500 | ((coin1 / 10) << 4) | (coin1 % 10);  } /* Coin 1 */
	260	if ((i8751_value >> 8) == 0x06 && coin1 && !offset) {i8751_return = 0x600; coin1--; } /* Coin 1 clear */
	261	if ((i8751_value >> 8) == 0x07) {i8751_return = 0x700 | ((coin2 / 10) << 4) | (coin2 % 10);  } /* Coin 2 */
	262	if ((i8751_value >> 8) == 0x08 && coin2 && !offset) {i8751_return = 0x800; coin2--; } /* Coin 2 clear */
228	263	/* Commands 0x9xx do nothing */
229		if ((i8751_value>>8)==0x0a) {i8751_return=0xa00 | snd; if (snd) snd=0; }
	264	if ((i8751_value >> 8) == 0x0a) {i8751_return = 0xa00 | snd; if (snd) snd = 0; }
230	265	}
231	266
232	267	static WRITE8_HANDLER( shackled_i8751_w )
233	268	{
234		static int coin1,coin2,latch=0;
235		i8751_return=0;
	269	static int coin1, coin2, latch = 0;
	270	i8751_return = 0;
236	271
237		switch (offset) {
	272	switch (offset)
	273	{
238	274	case 0: /* High byte */
239		i8751_value=(i8751_value&0xff) | (data<<8);
240		cpu_set_input_line (space->machine->cpu[1], M6809_FIRQ_LINE, HOLD_LINE); /* Signal main cpu */
	275	i8751_value = (i8751_value & 0xff) | (data << 8);
	276	cputag_set_input_line(space->machine, "sub", M6809_FIRQ_LINE, HOLD_LINE); /* Signal main cpu */
241	277	break;
242	278	case 1: /* Low byte */
243		i8751_value=(i8751_value&0xff00) | data;
	279	i8751_value = (i8751_value & 0xff00) | data;
244	280	break;
245	281	}
246	282
247	283	/* Coins are controlled by the i8751 */
248		if (/*(input_port_read(space->machine, "IN2") & 3) == 3*/!latch) {latch=1;coin1=coin2=0;}
249		if ((input_port_read(space->machine, "IN2") & 1) != 1 && latch) {coin1=1; latch=0;}
250		if ((input_port_read(space->machine, "IN2") & 2) != 2 && latch) {coin2=1; latch=0;}
	284	if (/*(input_port_read(space->machine, "IN2") & 3) == 3*/!latch) {latch = 1; coin1 = coin2 = 0;}
	285	if ((input_port_read(space->machine, "IN2") & 1) != 1 && latch)  {coin1 = 1; latch = 0;}
	286	if ((input_port_read(space->machine, "IN2") & 2) != 2 && latch)  {coin2 = 1; latch = 0;}
251	287
252		if (i8751_value==0x0050) i8751_return=0; /* Breywood ID */
253		if (i8751_value==0x0051) i8751_return=0; /* Shackled ID */
254		if (i8751_value==0x0102) i8751_return=0; /* ?? */
255		if (i8751_value==0x0101) i8751_return=0; /* ?? */
256		if (i8751_value==0x8101) i8751_return=((coin2 / 10) << 4) | (coin2 % 10) |
257		((((coin1 / 10) << 4) | (coin1 % 10))<<8); /* Coins */
	288	if (i8751_value == 0x0050) i8751_return = 0; /* Breywood ID */
	289	if (i8751_value == 0x0051) i8751_return = 0; /* Shackled ID */
	290	if (i8751_value == 0x0102) i8751_return = 0; /* ?? */
	291	if (i8751_value == 0x0101) i8751_return = 0; /* ?? */
	292	if (i8751_value == 0x8101) i8751_return = ((coin2 / 10) << 4) | (coin2 % 10) |
	293	((((coin1 / 10) << 4) | (coin1 % 10)) << 8); /* Coins */
258	294	}
259	295
260	296	static WRITE8_HANDLER( lastmiss_i8751_w )
261	297	{
262		static int coin,latch=0,snd;
263		i8751_return=0;
	298	static int coin, latch = 0, snd;
	299	i8751_return = 0;
264	300
265		switch (offset) {
	301	switch (offset)
	302	{
266	303	case 0: /* High byte */
267		i8751_value=(i8751_value&0xff) | (data<<8);
268		cpu_set_input_line (space->machine->cpu[0], M6809_FIRQ_LINE, HOLD_LINE); /* Signal main cpu */
	304	i8751_value = (i8751_value & 0xff) | (data << 8);
	305	cputag_set_input_line(space->machine, "maincpu", M6809_FIRQ_LINE, HOLD_LINE); /* Signal main cpu */
269	306	break;
270	307	case 1: /* Low byte */
271		i8751_value=(i8751_value&0xff00) | data;
	308	i8751_value = (i8751_value & 0xff00) | data;
272	309	break;
273	310	}
274	311
275		if(offset==0)
	312	if(offset == 0)
276	313	{
277	314	/* Coins are controlled by the i8751 */
278		if ((input_port_read(space->machine, "IN2") & 3) == 3 && !latch) latch=1;
279		if ((input_port_read(space->machine, "IN2") & 3) != 3 && latch) {coin++; latch=0;snd=0x400;i8751_return=0x400;return;}
280		if (i8751_value==0x007a) i8751_return=0x0185; /* Japan ID code */
281		if (i8751_value==0x007b) i8751_return=0x0184; /* USA ID code */
282		if (i8751_value==0x0001) {coin=snd=0;}//???
283		if (i8751_value==0x0000) {i8751_return=0x0184;}//???
284		if (i8751_value==0x0401) i8751_return=0x0184; //???
285		if ((i8751_value>>8)==0x01) i8751_return=0x0184; /* Coinage setup */
286		if ((i8751_value>>8)==0x02) {i8751_return=snd | ((coin / 10) << 4) | (coin % 10); snd=0;} /* Coin return */
287		if ((i8751_value>>8)==0x03 && coin) {i8751_return=0; coin--; } /* Coin clear */
	315	if ((input_port_read(space->machine, "IN2") & 3) == 3 && !latch) latch = 1;
	316	if ((input_port_read(space->machine, "IN2") & 3) != 3 && latch) {coin++; latch = 0; snd = 0x400; i8751_return = 0x400; return;}
	317	if (i8751_value == 0x007a) i8751_return = 0x0185; /* Japan ID code */
	318	if (i8751_value == 0x007b) i8751_return = 0x0184; /* USA ID code */
	319	if (i8751_value == 0x0001) {coin = snd = 0;}//???
	320	if (i8751_value == 0x0000) {i8751_return = 0x0184;}//???
	321	if (i8751_value == 0x0401) i8751_return = 0x0184; //???
	322	if ((i8751_value >> 8) == 0x01) i8751_return = 0x0184; /* Coinage setup */
	323	if ((i8751_value >> 8) == 0x02) {i8751_return = snd | ((coin / 10) << 4) | (coin % 10); snd = 0;} /* Coin return */
	324	if ((i8751_value >> 8) == 0x03 && coin) {i8751_return = 0; coin--; } /* Coin clear */
288	325	}
289	326	}
290	327
291	328	static WRITE8_HANDLER( csilver_i8751_w )
292	329	{
293		static int coin,latch=0,snd;
294		i8751_return=0;
	330	static int coin, latch = 0, snd;
	331	i8751_return = 0;
295	332
296		switch (offset) {
	333	switch (offset)
	334	{
297	335	case 0: /* High byte */
298		i8751_value=(i8751_value&0xff) | (data<<8);
299		cpu_set_input_line (space->machine->cpu[0], M6809_FIRQ_LINE, HOLD_LINE); /* Signal main cpu */
	336	i8751_value = (i8751_value & 0xff) | (data << 8);
	337	cputag_set_input_line (space->machine, "maincpu", M6809_FIRQ_LINE, HOLD_LINE); /* Signal main cpu */
300	338	break;
301	339	case 1: /* Low byte */
302		i8751_value=(i8751_value&0xff00) | data;
	340	i8751_value = (i8751_value & 0xff00) | data;
303	341	break;
304	342	}
305	343
306		if(offset==0)
	344	if(offset == 0)
307	345	{
308	346	/* Coins are controlled by the i8751 */
309		if ((input_port_read(space->machine, "IN2") & 3) == 3 && !latch) latch=1;
310		if ((input_port_read(space->machine, "IN2") & 3) != 3 && latch) {coin++; latch=0; snd=0x1200; i8751_return=0x1200;return;}
	347	if ((input_port_read(space->machine, "IN2") & 3) == 3 && !latch) latch = 1;
	348	if ((input_port_read(space->machine, "IN2") & 3) != 3 && latch) {coin++; latch = 0; snd = 0x1200; i8751_return = 0x1200; return;}
311	349
312		if (i8751_value==0x054a) {i8751_return=~(0x4a); coin=0; snd=0;} /* Captain Silver (Japan) ID */
313		if (i8751_value==0x054c) {i8751_return=~(0x4c); coin=0; snd=0;} /* Captain Silver (World) ID */
314		if ((i8751_value>>8)==0x01) i8751_return=0; /* Coinage - Not Supported */
315		if ((i8751_value>>8)==0x02) {i8751_return=snd | coin; snd=0; } /* Coin Return */
316		if ((i8751_value>>8)==0x03 && coin) {i8751_return=0; coin--;} /* Coin Clear */
	350	if (i8751_value == 0x054a) {i8751_return = ~(0x4a); coin = 0; snd = 0;} /* Captain Silver (Japan) ID */
	351	if (i8751_value == 0x054c) {i8751_return = ~(0x4c); coin = 0; snd = 0;} /* Captain Silver (World) ID */
	352	if ((i8751_value >> 8) == 0x01) i8751_return = 0; /* Coinage - Not Supported */
	353	if ((i8751_value >> 8) == 0x02) {i8751_return = snd | coin; snd = 0; } /* Coin Return */
	354	if ((i8751_value >> 8) == 0x03 && coin) {i8751_return = 0; coin--;} /* Coin Clear */
317	355	}
318	356	}
319	357
320	358	static WRITE8_HANDLER( garyoret_i8751_w )
321	359	{
322		static int coin1,coin2,latch;
323		i8751_return=0;
	360	static int coin1, coin2, latch;
	361	i8751_return = 0;
324	362
325		switch (offset) {
	363	switch (offset)
	364	{
326	365	case 0: /* High byte */
327		i8751_value=(i8751_value&0xff) | (data<<8);
	366	i8751_value = (i8751_value & 0xff) | (data << 8);
328	367	break;
329	368	case 1: /* Low byte */
330		i8751_value=(i8751_value&0xff00) | data;
	369	i8751_value = (i8751_value & 0xff00) | data;
331	370	break;
332	371	}
333	372
334	373	/* Coins are controlled by the i8751 */
335	374	if ((input_port_read(space->machine, "I8751") & 3) == 3) latch=1;
336		if ((input_port_read(space->machine, "I8751") & 1) != 1 && latch) {coin1++; latch=0;}
337		if ((input_port_read(space->machine, "I8751") & 2) != 2 && latch) {coin2++; latch=0;}
	375	if ((input_port_read(space->machine, "I8751") & 1) != 1 && latch) {coin1++; latch = 0;}
	376	if ((input_port_read(space->machine, "I8751") & 2) != 2 && latch) {coin2++; latch = 0;}
338	377
339	378	/* Work out return values */
340		if ((i8751_value>>8)==0x00) {i8751_return=0; coin1=coin2=0;}
341		if ((i8751_value>>8)==0x01)  i8751_return=0x59a; /* ID */
342		if ((i8751_value>>8)==0x04)  i8751_return=i8751_value; /* Coinage settings (Not supported) */
343		if ((i8751_value>>8)==0x05) {i8751_return=0x00 | ((coin1 / 10) << 4) | (coin1 % 10);  } /* Coin 1 */
344		if ((i8751_value>>8)==0x06 && coin1 && !offset) {i8751_return=0x600; coin1--; } /* Coin 1 clear */
	379	if ((i8751_value >> 8) == 0x00) {i8751_return = 0; coin1 = coin2 = 0;}
	380	if ((i8751_value >> 8) == 0x01)  i8751_return = 0x59a; /* ID */
	381	if ((i8751_value >> 8) == 0x04)  i8751_return = i8751_value; /* Coinage settings (Not supported) */
	382	if ((i8751_value >> 8) == 0x05) {i8751_return = 0x00 | ((coin1 / 10) << 4) | (coin1 % 10);  } /* Coin 1 */
	383	if ((i8751_value >> 8) == 0x06 && coin1 && !offset) {i8751_return = 0x600; coin1--; } /* Coin 1 clear */
345	384	}
346	385
347	386	/******************************************************************************/
r4679	r4680
369	408	*/
370	409
371	410	bankaddress = 0x10000 + (data >> 4) * 0x4000;
372		memory_set_bankptr(space->machine, 1,&RAM[bankaddress]);
	411	memory_set_bankptr(space->machine, 1, &RAM[bankaddress]);
373	412
374		if (data&1) int_enable=1; else int_enable=0;
375		if (data&2) nmi_enable=1; else nmi_enable=0;
	413	if (data & 1) int_enable =1; else int_enable = 0;
	414	if (data & 2) nmi_enable =1; else nmi_enable = 0;
376	415	flip_screen_set(space->machine, data & 0x08);
377	416	}
378	417
r4679	r4680
387	426	Bit 0x40 - Unused.
388	427	Bit 0x80 - Hold subcpu reset line high if clear, else low?  (Not needed anyway)
389	428	*/
390		memory_set_bankptr(space->machine, 1,&RAM[0x10000 + (data & 0x0f) * 0x4000]);
	429	memory_set_bankptr(space->machine, 1, &RAM[0x10000 + (data & 0x0f) * 0x4000]);
391	430	}
392	431
393	432	static WRITE8_HANDLER( dec8_sound_w )
394	433	{
395		soundlatch_w(space,0,data);
396		cpu_set_input_line(space->machine->cpu[1],INPUT_LINE_NMI,PULSE_LINE);
	434	soundlatch_w(space, 0, data);
	435	cputag_set_input_line(space->machine, "audiocpu", INPUT_LINE_NMI, PULSE_LINE);
397	436	}
398	437
399		static WRITE8_HANDLER( oscar_sound_w )
400		{
401		soundlatch_w(space,0,data);
402		cpu_set_input_line(space->machine->cpu[2],INPUT_LINE_NMI,PULSE_LINE);
403		}
404
405	438	static void csilver_adpcm_int(const device_config *device)
406	439	{
407		static int toggle =0;
	440	static int toggle = 0;
408	441
409	442	toggle ^= 1;
410	443	if (toggle)
411		cpu_set_input_line(device->machine->cpu[2],M6502_IRQ_LINE,HOLD_LINE);
	444	cputag_set_input_line(device->machine, "audiocpu", M6502_IRQ_LINE, HOLD_LINE);
412	445
413		msm5205_data_w (device,msm5205next>>4);
414		msm5205next<<=4;
	446	msm5205_data_w(device, msm5205next >> 4);
	447	msm5205next <<= 4;
415	448	}
416	449
417	450	static READ8_DEVICE_HANDLER( csilver_adpcm_reset_r )
418	451	{
419		msm5205_reset_w(device,0);
	452	msm5205_reset_w(device, 0);
420	453	return 0;
421	454	}
422	455
r4679	r4680
429	462	{
430	463	UINT8 *RAM = memory_region(space->machine, "audiocpu");
431	464
432		if (data&8) { memory_set_bankptr(space->machine, 3,&RAM[0x14000]); }
433		else { memory_set_bankptr(space->machine, 3,&RAM[0x10000]); }
	465	if (data & 8)
	466	memory_set_bankptr(space->machine, 3, &RAM[0x14000]);
	467	else
	468	memory_set_bankptr(space->machine, 3, &RAM[0x10000]);
434	469	}
435	470
436	471	/******************************************************************************/
r4679	r4680
438	473	static WRITE8_HANDLER( oscar_int_w )
439	474	{
440	475	/* Deal with interrupts, coins also generate NMI to CPU 0 */
441		switch (offset) {
	476	switch (offset)
	477	{
442	478	case 0: /* IRQ2 */
443		cpu_set_input_line(space->machine->cpu[1],M6809_IRQ_LINE,ASSERT_LINE);
	479	cputag_set_input_line(space->machine, "sub", M6809_IRQ_LINE, ASSERT_LINE);
444	480	return;
445	481	case 1: /* IRC 1 */
446		cpu_set_input_line(space->machine->cpu[0],M6809_IRQ_LINE,CLEAR_LINE);
	482	cputag_set_input_line(space->machine, "maincpu", M6809_IRQ_LINE, CLEAR_LINE);
447	483	return;
448	484	case 2: /* IRQ 1 */
449		cpu_set_input_line(space->machine->cpu[0],M6809_IRQ_LINE,ASSERT_LINE);
	485	cputag_set_input_line(space->machine, "maincpu", M6809_IRQ_LINE, ASSERT_LINE);
450	486	return;
451	487	case 3: /* IRC 2 */
452		cpu_set_input_line(space->machine->cpu[1],M6809_IRQ_LINE,CLEAR_LINE);
	488	cputag_set_input_line(space->machine, "sub", M6809_IRQ_LINE, CLEAR_LINE);
453	489	return;
454	490	}
455	491	}
r4679	r4680
461	497	/* This is correct, but the cpus in Shackled need an interleave of about 5000!
462	498	With lower interleave CPU 0 misses an interrupt at the start of the game
463	499	(The last interrupt has not finished and been ack'd when the new one occurs */
464		switch (offset) {
	500	switch (offset)
	501	{
465	502	case 0: /* CPU 2 - IRQ acknowledge */
466		cpu_set_input_line(space->machine->cpu[1],M6809_IRQ_LINE,CLEAR_LINE);
	503	cputag_set_input_line(space->machine, "sub", M6809_IRQ_LINE, CLEAR_LINE);
467	504	return;
468	505	case 1: /* CPU 1 - IRQ acknowledge */
469		cpu_set_input_line(space->machine->cpu[0],M6809_IRQ_LINE,CLEAR_LINE);
	506	cputag_set_input_line(space->machine, "maincpu", M6809_IRQ_LINE, CLEAR_LINE);
470	507	return;
471	508	case 2: /* i8751 - FIRQ acknowledge */
472	509	return;
473	510	case 3: /* IRQ 1 */
474		cpu_set_input_line(space->machine->cpu[0],M6809_IRQ_LINE,ASSERT_LINE);
	511	cputag_set_input_line(space->machine, "maincpu", M6809_IRQ_LINE, ASSERT_LINE);
475	512	return;
476	513	case 4: /* IRQ 2 */
477		cpu_set_input_line(space->machine->cpu[1],M6809_IRQ_LINE,ASSERT_LINE);
	514	cputag_set_input_line(space->machine, "sub", M6809_IRQ_LINE, ASSERT_LINE);
478	515	return;
479	516	}
480	517	#endif
481	518
482		switch (offset) {
	519	switch (offset)
	520	{
483	521	case 0: /* CPU 2 - IRQ acknowledge */
484	522	return;
485	523	case 1: /* CPU 1 - IRQ acknowledge */
r4679	r4680
487	525	case 2: /* i8751 - FIRQ acknowledge */
488	526	return;
489	527	case 3: /* IRQ 1 */
490		cpu_set_input_line (space->machine->cpu[0], M6809_IRQ_LINE, HOLD_LINE);
	528	cputag_set_input_line (space->machine, "maincpu", M6809_IRQ_LINE, HOLD_LINE);
491	529	return;
492	530	case 4: /* IRQ 2 */
493		cpu_set_input_line (space->machine->cpu[1], M6809_IRQ_LINE, HOLD_LINE);
	531	cputag_set_input_line (space->machine, "sub", M6809_IRQ_LINE, HOLD_LINE);
494	532	return;
495	533	}
496	534	}
r4679	r4680
498	536	/******************************************************************************/
499	537
500	538	static READ8_HANDLER( shackled_sprite_r ) { return spriteram[offset]; }
501		static WRITE8_HANDLER( shackled_sprite_w ) { spriteram[offset]=data; }
502		static WRITE8_HANDLER( flip_screen_w ) {   flip_screen_set(space->machine, data); }
	539	static WRITE8_HANDLER( shackled_sprite_w ) { spriteram[offset] = data; }
	540	static WRITE8_HANDLER( flip_screen_w ) { flip_screen_set(space->machine, data); }
503	541
504	542	/******************************************************************************/
505	543
506		static ADDRESS_MAP_START( cobra_readmem, ADDRESS_SPACE_PROGRAM, 8 )
507		AM_RANGE(0x0000, 0x07ff) AM_READ(SMH_RAM)
508		AM_RANGE(0x0800, 0x0fff) AM_READ(dec8_pf0_data_r)
509		AM_RANGE(0x1000, 0x17ff) AM_READ(dec8_pf1_data_r)
510		AM_RANGE(0x1800, 0x2fff) AM_READ(SMH_RAM)
511		AM_RANGE(0x3000, 0x31ff) AM_READ(SMH_RAM)
	544	static ADDRESS_MAP_START( cobra_map, ADDRESS_SPACE_PROGRAM, 8 )
	545	AM_RANGE(0x0000, 0x07ff) AM_RAM
	546	AM_RANGE(0x0800, 0x0fff) AM_READWRITE(dec8_pf0_data_r, dec8_pf0_data_w) AM_BASE(&dec8_pf0_data)
	547	AM_RANGE(0x1000, 0x17ff) AM_READWRITE(dec8_pf1_data_r, dec8_pf1_data_w) AM_BASE(&dec8_pf1_data)
	548	AM_RANGE(0x1800, 0x1fff) AM_RAM
	549	AM_RANGE(0x2000, 0x27ff) AM_RAM_WRITE(dec8_videoram_w) AM_BASE(&videoram) AM_SIZE(&videoram_size)
	550	AM_RANGE(0x2800, 0x2fff) AM_RAM AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
	551	AM_RANGE(0x3000, 0x31ff) AM_RAM_WRITE(paletteram_xxxxBBBBGGGGRRRR_be_w) AM_BASE(&paletteram)
	552	AM_RANGE(0x3200, 0x37ff) AM_WRITE(SMH_RAM) /* Unused */
512	553	AM_RANGE(0x3800, 0x3800) AM_READ_PORT("IN0")   /* Player 1 */
513	554	AM_RANGE(0x3801, 0x3801) AM_READ_PORT("IN1")   /* Player 2 */
514	555	AM_RANGE(0x3802, 0x3802) AM_READ_PORT("DSW0")   /* Dip 1 */
515	556	AM_RANGE(0x3803, 0x3803) AM_READ_PORT("DSW1")   /* Dip 2 */
516		AM_RANGE(0x3a00, 0x3a00) AM_READ_PORT("IN2")   /* VBL & coins */
517		AM_RANGE(0x4000, 0x7fff) AM_READ(SMH_BANK1)
518		AM_RANGE(0x8000, 0xffff) AM_READ(SMH_ROM)
519		ADDRESS_MAP_END
520
521		static ADDRESS_MAP_START( cobra_writemem, ADDRESS_SPACE_PROGRAM, 8 )
522		AM_RANGE(0x0000, 0x07ff) AM_WRITE(SMH_RAM)
523		AM_RANGE(0x0800, 0x0fff) AM_WRITE(dec8_pf0_data_w) AM_BASE(&dec8_pf0_data)
524		AM_RANGE(0x1000, 0x17ff) AM_WRITE(dec8_pf1_data_w) AM_BASE(&dec8_pf1_data)
525		AM_RANGE(0x1800, 0x1fff) AM_WRITE(SMH_RAM)
526		AM_RANGE(0x2000, 0x27ff) AM_WRITE(dec8_videoram_w) AM_BASE(&videoram) AM_SIZE(&videoram_size)
527		AM_RANGE(0x2800, 0x2fff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
528		AM_RANGE(0x3000, 0x31ff) AM_WRITE(paletteram_xxxxBBBBGGGGRRRR_be_w) AM_BASE(&paletteram)
529		AM_RANGE(0x3200, 0x37ff) AM_WRITE(SMH_RAM) /* Unused */
530	557	AM_RANGE(0x3800, 0x381f) AM_WRITE(dec8_bac06_0_w)
	558	AM_RANGE(0x3a00, 0x3a00) AM_READ_PORT("IN2")   /* VBL & coins */
531	559	AM_RANGE(0x3a00, 0x3a1f) AM_WRITE(dec8_bac06_1_w)
532	560	AM_RANGE(0x3c00, 0x3c00) AM_WRITE(dec8_bank_w)
533	561	AM_RANGE(0x3c02, 0x3c02) AM_WRITE(buffer_spriteram_w) /* DMA */
534	562	AM_RANGE(0x3e00, 0x3e00) AM_WRITE(dec8_sound_w)
535		AM_RANGE(0x4000, 0xffff) AM_WRITE(SMH_ROM)
	563	AM_RANGE(0x4000, 0x7fff) AM_ROMBANK(1)
	564	AM_RANGE(0x8000, 0xffff) AM_ROM
536	565	ADDRESS_MAP_END
537	566
538		static ADDRESS_MAP_START( ghostb_readmem, ADDRESS_SPACE_PROGRAM, 8 )
539		AM_RANGE(0x0000, 0x1fff) AM_READ(SMH_RAM)
540		AM_RANGE(0x1800, 0x1fff) AM_READ(SMH_RAM)
541		AM_RANGE(0x2000, 0x27ff) AM_READ(dec8_pf0_data_r)
542		AM_RANGE(0x2800, 0x2dff) AM_READ(SMH_RAM)
543		AM_RANGE(0x3000, 0x37ff) AM_READ(SMH_RAM)
	567	static ADDRESS_MAP_START( ghostb_map, ADDRESS_SPACE_PROGRAM, 8 )
	568	AM_RANGE(0x0000, 0x0fff) AM_RAM
	569	AM_RANGE(0x1000, 0x17ff) AM_RAM
	570	AM_RANGE(0x1800, 0x1fff) AM_RAM_WRITE(dec8_videoram_w) AM_BASE(&videoram) AM_SIZE(&videoram_size)
	571	AM_RANGE(0x2000, 0x27ff) AM_READWRITE(dec8_pf0_data_r, dec8_pf0_data_w) AM_BASE(&dec8_pf0_data)
	572	AM_RANGE(0x2800, 0x2bff) AM_RAM
	573	AM_RANGE(0x2c00, 0x2dff) AM_RAM AM_BASE(&dec8_row)
	574	AM_RANGE(0x2e00, 0x2fff) AM_RAM /* Unused */
	575	AM_RANGE(0x3000, 0x37ff) AM_RAM AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
544	576	AM_RANGE(0x3800, 0x3800) AM_READ_PORT("IN0")   /* Player 1 */
	577	AM_RANGE(0x3800, 0x3800) AM_WRITE(dec8_sound_w)
545	578	AM_RANGE(0x3801, 0x3801) AM_READ_PORT("IN1")   /* Player 2 */
546	579	AM_RANGE(0x3802, 0x3802) AM_READ_PORT("IN2")   /* Player 3 */
547	580	AM_RANGE(0x3803, 0x3803) AM_READ_PORT("DSW0")   /* Start buttons + VBL */
548	581	AM_RANGE(0x3820, 0x3820) AM_READ_PORT("DSW1")   /* Dip */
	582	AM_RANGE(0x3820, 0x383f) AM_WRITE(dec8_bac06_0_w)
549	583	AM_RANGE(0x3840, 0x3840) AM_READ(i8751_h_r)
	584	AM_RANGE(0x3840, 0x3840) AM_WRITE(ghostb_bank_w)
550	585	AM_RANGE(0x3860, 0x3860) AM_READ(i8751_l_r)
551		AM_RANGE(0x4000, 0x7fff) AM_READ(SMH_BANK1)
552		AM_RANGE(0x8000, 0xffff) AM_READ(SMH_ROM)
	586	AM_RANGE(0x3860, 0x3861) AM_WRITE(ghostb_i8751_w)
	587	AM_RANGE(0x4000, 0x7fff) AM_ROMBANK(1)
	588	AM_RANGE(0x8000, 0xffff) AM_ROM
553	589	ADDRESS_MAP_END
554	590
555		static ADDRESS_MAP_START( ghostb_writemem, ADDRESS_SPACE_PROGRAM, 8 )
556		AM_RANGE(0x0000, 0x0fff) AM_WRITE(SMH_RAM)
557		AM_RANGE(0x1000, 0x17ff) AM_WRITE(SMH_RAM)
558		AM_RANGE(0x1800, 0x1fff) AM_WRITE(dec8_videoram_w) AM_BASE(&videoram) AM_SIZE(&videoram_size)
559		AM_RANGE(0x2000, 0x27ff) AM_WRITE(dec8_pf0_data_w) AM_BASE(&dec8_pf0_data)
560		AM_RANGE(0x2800, 0x2bff) AM_WRITE(SMH_RAM) /* Scratch ram for rowscroll? */
561		AM_RANGE(0x2c00, 0x2dff) AM_WRITE(SMH_RAM) AM_BASE(&dec8_row)
562		AM_RANGE(0x2e00, 0x2fff) AM_WRITE(SMH_RAM) /* Unused */
563		AM_RANGE(0x3000, 0x37ff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
	591	static ADDRESS_MAP_START( meikyuh_map, ADDRESS_SPACE_PROGRAM, 8 )
	592	AM_RANGE(0x0000, 0x0fff) AM_RAM
	593	AM_RANGE(0x1000, 0x17ff) AM_RAM
	594	AM_RANGE(0x1800, 0x1fff) AM_RAM_WRITE(dec8_videoram_w) AM_BASE(&videoram) AM_SIZE(&videoram_size)
	595	AM_RANGE(0x2000, 0x27ff) AM_READWRITE(dec8_pf0_data_r, dec8_pf0_data_w) AM_BASE(&dec8_pf0_data)
	596	AM_RANGE(0x2800, 0x2bff) AM_RAM
	597	AM_RANGE(0x2c00, 0x2dff) AM_RAM AM_BASE(&dec8_row)
	598	AM_RANGE(0x2e00, 0x2fff) AM_RAM /* Unused */
	599	AM_RANGE(0x3000, 0x37ff) AM_RAM AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
	600	AM_RANGE(0x3800, 0x3800) AM_READ_PORT("IN0")   /* Player 1 */
564	601	AM_RANGE(0x3800, 0x3800) AM_WRITE(dec8_sound_w)
	602	AM_RANGE(0x3801, 0x3801) AM_READ_PORT("IN1")   /* Player 2 */
	603	AM_RANGE(0x3802, 0x3802) AM_READ_PORT("IN2")   /* Player 3 */
	604	AM_RANGE(0x3803, 0x3803) AM_READ_PORT("DSW0")   /* Start buttons + VBL */
	605	AM_RANGE(0x3820, 0x3820) AM_READ_PORT("DSW1")   /* Dip */
565	606	AM_RANGE(0x3820, 0x383f) AM_WRITE(dec8_bac06_0_w)
	607	AM_RANGE(0x3840, 0x3840) AM_READ(i8751_h_r)
566	608	AM_RANGE(0x3840, 0x3840) AM_WRITE(ghostb_bank_w)
567		AM_RANGE(0x3860, 0x3861) AM_WRITE(ghostb_i8751_w)
568		AM_RANGE(0x4000, 0xffff) AM_WRITE(SMH_ROM)
	609	AM_RANGE(0x3860, 0x3860) AM_READ(i8751_l_r)
	610	AM_RANGE(0x3860, 0x3861) AM_WRITE(meikyuh_i8751_w)
	611	AM_RANGE(0x4000, 0x7fff) AM_ROMBANK(1)
	612	AM_RANGE(0x8000, 0xffff) AM_ROM
569	613	ADDRESS_MAP_END
570	614
571		static ADDRESS_MAP_START( srdarwin_readmem, ADDRESS_SPACE_PROGRAM, 8 )
572		AM_RANGE(0x0000, 0x13ff) AM_READ(SMH_RAM)
573		AM_RANGE(0x1400, 0x17ff) AM_READ(dec8_pf0_data_r)
574		AM_RANGE(0x2000, 0x2000) AM_READ(i8751_h_r)
575		AM_RANGE(0x2001, 0x2001) AM_READ(i8751_l_r)
576		AM_RANGE(0x3800, 0x3800) AM_READ_PORT("DSW0")   /* Dip 1 */
577		AM_RANGE(0x3801, 0x3801) AM_READ_PORT("IN0")   /* Player 1 */
578		AM_RANGE(0x3802, 0x3802) AM_READ_PORT("IN1")   /* Player 2 (cocktail) + VBL */
579		AM_RANGE(0x3803, 0x3803) AM_READ_PORT("DSW1")   /* Dip 2 */
580		AM_RANGE(0x4000, 0x7fff) AM_READ(SMH_BANK1)
581		AM_RANGE(0x8000, 0xffff) AM_READ(SMH_ROM)
582		ADDRESS_MAP_END
583
584		static ADDRESS_MAP_START( srdarwin_writemem, ADDRESS_SPACE_PROGRAM, 8 )
585		AM_RANGE(0x0000, 0x05ff) AM_WRITE(SMH_RAM)
586		AM_RANGE(0x0600, 0x07ff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram)
587		AM_RANGE(0x0800, 0x0fff) AM_WRITE(srdarwin_videoram_w) AM_BASE(&videoram) AM_SIZE(&spriteram_size)
588		AM_RANGE(0x1000, 0x13ff) AM_WRITE(SMH_RAM)
589		AM_RANGE(0x1400, 0x17ff) AM_WRITE(dec8_pf0_data_w) AM_BASE(&dec8_pf0_data)
	615	static ADDRESS_MAP_START( srdarwin_map, ADDRESS_SPACE_PROGRAM, 8 )
	616	AM_RANGE(0x0000, 0x05ff) AM_RAM
	617	AM_RANGE(0x0600, 0x07ff) AM_RAM AM_BASE(&spriteram)
	618	AM_RANGE(0x0800, 0x0fff) AM_RAM_WRITE(srdarwin_videoram_w) AM_BASE(&videoram) AM_SIZE(&spriteram_size)
	619	AM_RANGE(0x1000, 0x13ff) AM_RAM
	620	AM_RANGE(0x1400, 0x17ff) AM_READWRITE(dec8_pf0_data_r, dec8_pf0_data_w) AM_BASE(&dec8_pf0_data)
590	621	AM_RANGE(0x1800, 0x1801) AM_WRITE(srdarwin_i8751_w)
591	622	AM_RANGE(0x1802, 0x1802) AM_WRITE(i8751_reset_w)      /* Maybe.. */
592	623	AM_RANGE(0x1803, 0x1803) AM_WRITENOP            /* NMI ack */
593	624	AM_RANGE(0x1804, 0x1804) AM_WRITE(buffer_spriteram_w) /* DMA */
594	625	AM_RANGE(0x1805, 0x1806) AM_WRITE(srdarwin_control_w) /* Scroll & Bank */
595		AM_RANGE(0x2000, 0x2000) AM_WRITE(dec8_sound_w)       /* Sound */
596		AM_RANGE(0x2001, 0x2001) AM_WRITE(flip_screen_w)  /* Flipscreen */
	626	AM_RANGE(0x2000, 0x2000) AM_READWRITE(i8751_h_r, dec8_sound_w)   /* Sound */
	627	AM_RANGE(0x2001, 0x2001) AM_READWRITE(i8751_l_r, flip_screen_w)      /* Flipscreen */
597	628	AM_RANGE(0x2800, 0x288f) AM_WRITE(paletteram_xxxxBBBBGGGGRRRR_split1_w) AM_BASE(&paletteram)
598	629	AM_RANGE(0x3000, 0x308f) AM_WRITE(paletteram_xxxxBBBBGGGGRRRR_split2_w) AM_BASE(&paletteram_2)
599		AM_RANGE(0x4000, 0xffff) AM_WRITE(SMH_ROM)
	630	AM_RANGE(0x3800, 0x3800) AM_READ_PORT("DSW0")   /* Dip 1 */
	631	AM_RANGE(0x3801, 0x3801) AM_READ_PORT("IN0")   /* Player 1 */
	632	AM_RANGE(0x3802, 0x3802) AM_READ_PORT("IN1")   /* Player 2 (cocktail) + VBL */
	633	AM_RANGE(0x3803, 0x3803) AM_READ_PORT("DSW1")   /* Dip 2 */
	634	AM_RANGE(0x4000, 0x7fff) AM_ROMBANK(1)
	635	AM_RANGE(0x8000, 0xffff) AM_ROM
600	636	ADDRESS_MAP_END
601	637
602		static ADDRESS_MAP_START( gondo_readmem, ADDRESS_SPACE_PROGRAM, 8 )
603		AM_RANGE(0x0000, 0x17ff) AM_READ(SMH_RAM)
604		AM_RANGE(0x1800, 0x1fff) AM_READ(SMH_RAM)
605		AM_RANGE(0x2000, 0x27ff) AM_READ(dec8_pf0_data_r)
606		AM_RANGE(0x2800, 0x2bff) AM_READ(SMH_RAM)
607		AM_RANGE(0x2c00, 0x2fff) AM_READ(SMH_RAM)
608		AM_RANGE(0x3000, 0x37ff) AM_READ(SMH_RAM)         /* Sprites */
	638	static ADDRESS_MAP_START( gondo_map, ADDRESS_SPACE_PROGRAM, 8 )
	639	AM_RANGE(0x0000, 0x17ff) AM_RAM
	640	AM_RANGE(0x1800, 0x1fff) AM_RAM_WRITE(dec8_videoram_w) AM_BASE(&videoram) AM_SIZE(&videoram_size)
	641	AM_RANGE(0x2000, 0x27ff) AM_READWRITE(dec8_pf0_data_r, dec8_pf0_data_w) AM_BASE(&dec8_pf0_data)
	642	AM_RANGE(0x2800, 0x2bff) AM_RAM_WRITE(paletteram_xxxxBBBBGGGGRRRR_split1_w) AM_BASE(&paletteram)
	643	AM_RANGE(0x2c00, 0x2fff) AM_RAM_WRITE(paletteram_xxxxBBBBGGGGRRRR_split2_w) AM_BASE(&paletteram_2)
	644	AM_RANGE(0x3000, 0x37ff) AM_RAM AM_BASE(&spriteram) AM_SIZE(&spriteram_size)   /* Sprites */
609	645	AM_RANGE(0x3800, 0x3800) AM_READ_PORT("DSW0")      /* Dip 1 */
610	646	AM_RANGE(0x3801, 0x3801) AM_READ_PORT("DSW1")      /* Dip 2 */
611	647	AM_RANGE(0x380a, 0x380b) AM_READ(gondo_player_1_r)   /* Player 1 rotary */
612	648	AM_RANGE(0x380c, 0x380d) AM_READ(gondo_player_2_r)   /* Player 2 rotary */
613	649	AM_RANGE(0x380e, 0x380e) AM_READ_PORT("IN3")      /* VBL */
614	650	AM_RANGE(0x380f, 0x380f) AM_READ_PORT("IN2")      /* Fire buttons */
615		AM_RANGE(0x3838, 0x3838) AM_READ(i8751_h_r)
616		AM_RANGE(0x3839, 0x3839) AM_READ(i8751_l_r)
617		AM_RANGE(0x4000, 0x7fff) AM_READ(SMH_BANK1)
618		AM_RANGE(0x8000, 0xffff) AM_READ(SMH_ROM)
619		ADDRESS_MAP_END
620
621		static ADDRESS_MAP_START( gondo_writemem, ADDRESS_SPACE_PROGRAM, 8 )
622		AM_RANGE(0x0000, 0x17ff) AM_WRITE(SMH_RAM)
623		AM_RANGE(0x1800, 0x1fff) AM_WRITE(dec8_videoram_w) AM_BASE(&videoram) AM_SIZE(&videoram_size)
624		AM_RANGE(0x2000, 0x27ff) AM_WRITE(dec8_pf0_data_w) AM_BASE(&dec8_pf0_data)
625		AM_RANGE(0x2800, 0x2bff) AM_WRITE(paletteram_xxxxBBBBGGGGRRRR_split1_w) AM_BASE(&paletteram)
626		AM_RANGE(0x2c00, 0x2fff) AM_WRITE(paletteram_xxxxBBBBGGGGRRRR_split2_w) AM_BASE(&paletteram_2)
627		AM_RANGE(0x3000, 0x37ff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
628	651	AM_RANGE(0x3810, 0x3810) AM_WRITE(dec8_sound_w)
629	652	AM_RANGE(0x3818, 0x382f) AM_WRITE(gondo_scroll_w)
630	653	AM_RANGE(0x3830, 0x3830) AM_WRITE(ghostb_bank_w) /* Bank + NMI enable */
	654	AM_RANGE(0x3838, 0x3838) AM_READ(i8751_h_r)
	655	AM_RANGE(0x3839, 0x3839) AM_READ(i8751_l_r)
631	656	AM_RANGE(0x383a, 0x383b) AM_WRITE(gondo_i8751_w)
632		AM_RANGE(0x4000, 0xffff) AM_WRITE(SMH_ROM)
	657	AM_RANGE(0x4000, 0x7fff) AM_ROMBANK(1)
	658	AM_RANGE(0x8000, 0xffff) AM_ROM
633	659	ADDRESS_MAP_END
634	660
635		static ADDRESS_MAP_START( oscar_readmem, ADDRESS_SPACE_PROGRAM, 8 )
636		AM_RANGE(0x0000, 0x0eff) AM_READ(SMH_RAM) AM_SHARE(1)
637		AM_RANGE(0x0f00, 0x0fff) AM_READ(SMH_RAM)
638		AM_RANGE(0x1000, 0x1fff) AM_READ(SMH_RAM) AM_SHARE(2)
639		AM_RANGE(0x2000, 0x27ff) AM_READ(SMH_RAM)
640		AM_RANGE(0x2800, 0x2fff) AM_READ(dec8_pf0_data_r)
641		AM_RANGE(0x3000, 0x37ff) AM_READ(SMH_RAM)      /* Sprites */
642		AM_RANGE(0x3800, 0x3bff) AM_READ(SMH_RAM)
	661	static ADDRESS_MAP_START( oscar_map, ADDRESS_SPACE_PROGRAM, 8 )
	662	AM_RANGE(0x0000, 0x0eff) AM_RAM AM_SHARE(1)
	663	AM_RANGE(0x0f00, 0x0fff) AM_RAM
	664	AM_RANGE(0x1000, 0x1fff) AM_RAM AM_SHARE(2)
	665	AM_RANGE(0x2000, 0x27ff) AM_RAM_WRITE(dec8_videoram_w) AM_BASE(&videoram) AM_SIZE(&videoram_size)
	666	AM_RANGE(0x2800, 0x2fff) AM_READWRITE(dec8_pf0_data_r, dec8_pf0_data_w) AM_BASE(&dec8_pf0_data)
	667	AM_RANGE(0x3000, 0x37ff) AM_RAM AM_BASE(&spriteram) AM_SIZE(&spriteram_size) /* Sprites */
	668	AM_RANGE(0x3800, 0x3bff) AM_RAM_WRITE(paletteram_xxxxBBBBGGGGRRRR_be_w) AM_BASE(&paletteram)
643	669	AM_RANGE(0x3c00, 0x3c00) AM_READ_PORT("IN0")
644	670	AM_RANGE(0x3c01, 0x3c01) AM_READ_PORT("IN1")
645	671	AM_RANGE(0x3c02, 0x3c02) AM_READ_PORT("IN2")   /* VBL & coins */
646	672	AM_RANGE(0x3c03, 0x3c03) AM_READ_PORT("DSW0")   /* Dip 1 */
647	673	AM_RANGE(0x3c04, 0x3c04) AM_READ_PORT("DSW1")
648		AM_RANGE(0x4000, 0x7fff) AM_READ(SMH_BANK1)
649		AM_RANGE(0x8000, 0xffff) AM_READ(SMH_ROM)
650		ADDRESS_MAP_END
651
652		static ADDRESS_MAP_START( oscar_writemem, ADDRESS_SPACE_PROGRAM, 8 )
653		AM_RANGE(0x0000, 0x0eff) AM_WRITE(SMH_RAM) AM_SHARE(1)
654		AM_RANGE(0x0f00, 0x0fff) AM_WRITE(SMH_RAM)
655		AM_RANGE(0x1000, 0x1fff) AM_WRITE(SMH_RAM) AM_SHARE(2)
656		AM_RANGE(0x2000, 0x27ff) AM_WRITE(dec8_videoram_w) AM_BASE(&videoram) AM_SIZE(&videoram_size)
657		AM_RANGE(0x2800, 0x2fff) AM_WRITE(dec8_pf0_data_w) AM_BASE(&dec8_pf0_data)
658		AM_RANGE(0x3000, 0x37ff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
659		AM_RANGE(0x3800, 0x3bff) AM_WRITE(paletteram_xxxxBBBBGGGGRRRR_be_w) AM_BASE(&paletteram)
660	674	AM_RANGE(0x3c00, 0x3c1f) AM_WRITE(dec8_bac06_0_w)
661	675	AM_RANGE(0x3c80, 0x3c80) AM_WRITE(buffer_spriteram_w)   /* DMA */
662	676	AM_RANGE(0x3d00, 0x3d00) AM_WRITE(dec8_bank_w)         /* BNKS */
663		AM_RANGE(0x3d80, 0x3d80) AM_WRITE(oscar_sound_w)       /* SOUN */
	677	AM_RANGE(0x3d80, 0x3d80) AM_WRITE(dec8_sound_w)       /* SOUN */
664	678	AM_RANGE(0x3e00, 0x3e00) AM_WRITENOP             /* COINCL */
665	679	AM_RANGE(0x3e80, 0x3e83) AM_WRITE(oscar_int_w)
666		AM_RANGE(0x4000, 0xffff) AM_WRITE(SMH_ROM)
	680	AM_RANGE(0x4000, 0x7fff) AM_ROMBANK(1)
	681	AM_RANGE(0x8000, 0xffff) AM_ROM
667	682	ADDRESS_MAP_END
668	683
669		static ADDRESS_MAP_START( oscar_sub_readmem, ADDRESS_SPACE_PROGRAM, 8 )
670		AM_RANGE(0x0000, 0x0eff) AM_READ(SMH_RAM) AM_SHARE(1)
671		AM_RANGE(0x0f00, 0x0fff) AM_READ(SMH_RAM)
672		AM_RANGE(0x1000, 0x1fff) AM_READ(SMH_RAM) AM_SHARE(2)
673		AM_RANGE(0x4000, 0xffff) AM_READ(SMH_ROM)
674		ADDRESS_MAP_END
675
676		static ADDRESS_MAP_START( oscar_sub_writemem, ADDRESS_SPACE_PROGRAM, 8 )
677		AM_RANGE(0x0000, 0x0eff) AM_WRITE(SMH_RAM) AM_SHARE(1)
678		AM_RANGE(0x0f00, 0x0fff) AM_WRITE(SMH_RAM)
679		AM_RANGE(0x1000, 0x1fff) AM_WRITE(SMH_RAM) AM_SHARE(2)
	684	static ADDRESS_MAP_START( oscar_sub_map, ADDRESS_SPACE_PROGRAM, 8 )
	685	AM_RANGE(0x0000, 0x0eff) AM_RAM AM_SHARE(1)
	686	AM_RANGE(0x0f00, 0x0fff) AM_RAM
	687	AM_RANGE(0x1000, 0x1fff) AM_RAM AM_SHARE(2)
680	688	AM_RANGE(0x3e80, 0x3e83) AM_WRITE(oscar_int_w)
681		AM_RANGE(0x4000, 0xffff) AM_WRITE(SMH_ROM)
	689	AM_RANGE(0x4000, 0xffff) AM_ROM
682	690	ADDRESS_MAP_END
683	691
684		static ADDRESS_MAP_START( lastmiss_readmem, ADDRESS_SPACE_PROGRAM, 8 )
685		AM_RANGE(0x0000, 0x0fff) AM_READ(SMH_RAM) AM_SHARE(1)
686		AM_RANGE(0x1000, 0x13ff) AM_READ(SMH_RAM) AM_SHARE(3)
687		AM_RANGE(0x1400, 0x17ff) AM_READ(SMH_RAM) AM_SHARE(4)
	692	static ADDRESS_MAP_START( lastmiss_map, ADDRESS_SPACE_PROGRAM, 8 )
	693	AM_RANGE(0x0000, 0x0fff) AM_RAM AM_SHARE(1)
	694	AM_RANGE(0x1000, 0x13ff) AM_RAM_WRITE(paletteram_xxxxBBBBGGGGRRRR_split1_w) AM_SHARE(3) AM_BASE(&paletteram)
	695	AM_RANGE(0x1400, 0x17ff) AM_RAM_WRITE(paletteram_xxxxBBBBGGGGRRRR_split2_w) AM_SHARE(4) AM_BASE(&paletteram_2)
688	696	AM_RANGE(0x1800, 0x1800) AM_READ_PORT("IN0")
689	697	AM_RANGE(0x1801, 0x1801) AM_READ_PORT("IN1")
690	698	AM_RANGE(0x1802, 0x1802) AM_READ_PORT("IN2")
691	699	AM_RANGE(0x1803, 0x1803) AM_READ_PORT("DSW0")   /* Dip 1 */
692	700	AM_RANGE(0x1804, 0x1804) AM_READ_PORT("DSW1")   /* Dip 2 */
693		AM_RANGE(0x1806, 0x1806) AM_READ(i8751_h_r)
694		AM_RANGE(0x1807, 0x1807) AM_READ(i8751_l_r)
695		AM_RANGE(0x2000, 0x27ff) AM_READ(SMH_RAM)
696		AM_RANGE(0x2800, 0x2fff) AM_READ(SMH_RAM)
697		AM_RANGE(0x3000, 0x37ff) AM_READ(SMH_RAM) AM_SHARE(2)
698		AM_RANGE(0x3800, 0x3fff) AM_READ(dec8_pf0_data_r)
699		AM_RANGE(0x4000, 0x7fff) AM_READ(SMH_BANK1)
700		AM_RANGE(0x8000, 0xffff) AM_READ(SMH_ROM)
701		ADDRESS_MAP_END
702
703		static ADDRESS_MAP_START( lastmiss_writemem, ADDRESS_SPACE_PROGRAM, 8 )
704		AM_RANGE(0x0000, 0x0fff) AM_WRITE(SMH_RAM) AM_SHARE(1)
705		AM_RANGE(0x1000, 0x13ff) AM_WRITE(paletteram_xxxxBBBBGGGGRRRR_split1_w) AM_SHARE(3) AM_BASE(&paletteram)
706		AM_RANGE(0x1400, 0x17ff) AM_WRITE(paletteram_xxxxBBBBGGGGRRRR_split2_w) AM_SHARE(4) AM_BASE(&paletteram_2)
707	701	AM_RANGE(0x1800, 0x1804) AM_WRITE(shackled_int_w)
708	702	AM_RANGE(0x1805, 0x1805) AM_WRITE(buffer_spriteram_w) /* DMA */
709		AM_RANGE(0x1807, 0x1807) AM_WRITE(flip_screen_w)
	703	AM_RANGE(0x1806, 0x1806) AM_READ(i8751_h_r)
	704	AM_RANGE(0x1807, 0x1807) AM_READWRITE(i8751_l_r, flip_screen_w)
710	705	AM_RANGE(0x1809, 0x1809) AM_WRITE(lastmiss_scrollx_w) /* Scroll LSB */
711	706	AM_RANGE(0x180b, 0x180b) AM_WRITE(lastmiss_scrolly_w) /* Scroll LSB */
712		AM_RANGE(0x180c, 0x180c) AM_WRITE(oscar_sound_w)
	707	AM_RANGE(0x180c, 0x180c) AM_WRITE(dec8_sound_w)
713	708	AM_RANGE(0x180d, 0x180d) AM_WRITE(lastmiss_control_w) /* Bank switch + Scroll MSB */
714	709	AM_RANGE(0x180e, 0x180f) AM_WRITE(lastmiss_i8751_w)
715		AM_RANGE(0x2000, 0x27ff) AM_WRITE(dec8_videoram_w) AM_BASE(&videoram) AM_SIZE(&videoram_size)
716		AM_RANGE(0x2800, 0x2fff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
717		AM_RANGE(0x3000, 0x37ff) AM_WRITE(SMH_RAM) AM_SHARE(2)
718		AM_RANGE(0x3800, 0x3fff) AM_WRITE(dec8_pf0_data_w) AM_BASE(&dec8_pf0_data)
719		AM_RANGE(0x4000, 0xffff) AM_WRITE(SMH_ROM)
	710	AM_RANGE(0x2000, 0x27ff) AM_RAM_WRITE(dec8_videoram_w) AM_BASE(&videoram) AM_SIZE(&videoram_size)
	711	AM_RANGE(0x2800, 0x2fff) AM_RAM AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
	712	AM_RANGE(0x3000, 0x37ff) AM_RAM AM_SHARE(2)
	713	AM_RANGE(0x3800, 0x3fff) AM_READWRITE(dec8_pf0_data_r, dec8_pf0_data_w) AM_BASE(&dec8_pf0_data)
	714	AM_RANGE(0x4000, 0x7fff) AM_ROMBANK(1)
	715	AM_RANGE(0x8000, 0xffff) AM_ROM
720	716	ADDRESS_MAP_END
721	717
722		static ADDRESS_MAP_START( lastmiss_sub_readmem, ADDRESS_SPACE_PROGRAM, 8 )
723		AM_RANGE(0x0000, 0x0fff) AM_READ(SMH_RAM) AM_SHARE(1)
724		AM_RANGE(0x1000, 0x13ff) AM_READ(SMH_RAM) AM_SHARE(3)
725		AM_RANGE(0x1400, 0x17ff) AM_READ(SMH_RAM) AM_SHARE(4)
	718	static ADDRESS_MAP_START( lastmiss_sub_map, ADDRESS_SPACE_PROGRAM, 8 )
	719	AM_RANGE(0x0000, 0x0fff) AM_RAM AM_SHARE(1)
	720	AM_RANGE(0x1000, 0x13ff) AM_RAM_WRITE(paletteram_xxxxBBBBGGGGRRRR_split1_w) AM_SHARE(3)
	721	AM_RANGE(0x1400, 0x17ff) AM_RAM_WRITE(paletteram_xxxxBBBBGGGGRRRR_split2_w) AM_SHARE(4)
726	722	AM_RANGE(0x1800, 0x1800) AM_READ_PORT("IN0")
727	723	AM_RANGE(0x1801, 0x1801) AM_READ_PORT("IN1")
728	724	AM_RANGE(0x1802, 0x1802) AM_READ_PORT("IN2")
729	725	AM_RANGE(0x1803, 0x1803) AM_READ_PORT("DSW0")   /* Dip 1 */
730	726	AM_RANGE(0x1804, 0x1804) AM_READ_PORT("DSW1")   /* Dip 2 */
731		AM_RANGE(0x2000, 0x27ff) AM_READ(SMH_RAM)
732		AM_RANGE(0x3000, 0x37ff) AM_READ(SMH_RAM) AM_SHARE(2)
733		AM_RANGE(0x3800, 0x3fff) AM_READ(dec8_pf0_data_r)
734		AM_RANGE(0x4000, 0xffff) AM_READ(SMH_ROM)
735		ADDRESS_MAP_END
736
737		static ADDRESS_MAP_START( lastmiss_sub_writemem, ADDRESS_SPACE_PROGRAM, 8 )
738		AM_RANGE(0x0000, 0x0fff) AM_WRITE(SMH_RAM) AM_SHARE(1)
739		AM_RANGE(0x1000, 0x13ff) AM_WRITE(paletteram_xxxxBBBBGGGGRRRR_split1_w) AM_SHARE(3)
740		AM_RANGE(0x1400, 0x17ff) AM_WRITE(paletteram_xxxxBBBBGGGGRRRR_split2_w) AM_SHARE(4)
741	727	AM_RANGE(0x1800, 0x1804) AM_WRITE(shackled_int_w)
742	728	AM_RANGE(0x1805, 0x1805) AM_WRITE(buffer_spriteram_w) /* DMA */
743	729	AM_RANGE(0x1807, 0x1807) AM_WRITE(flip_screen_w)
744		AM_RANGE(0x180c, 0x180c) AM_WRITE(oscar_sound_w)
745		AM_RANGE(0x2000, 0x27ff) AM_WRITE(dec8_videoram_w)
	730	AM_RANGE(0x180c, 0x180c) AM_WRITE(dec8_sound_w)
	731	AM_RANGE(0x2000, 0x27ff) AM_READ(SMH_RAM) AM_WRITE(dec8_videoram_w)
746	732	AM_RANGE(0x2800, 0x2fff) AM_WRITE(shackled_sprite_w)
747		AM_RANGE(0x3000, 0x37ff) AM_WRITE(SMH_RAM) AM_SHARE(2)
748		AM_RANGE(0x3800, 0x3fff) AM_WRITE(dec8_pf0_data_w)
749		AM_RANGE(0x4000, 0xffff) AM_WRITE(SMH_ROM)
	733	AM_RANGE(0x3000, 0x37ff) AM_RAM AM_SHARE(2)
	734	AM_RANGE(0x3800, 0x3fff) AM_READWRITE(dec8_pf0_data_r, dec8_pf0_data_w)
	735	AM_RANGE(0x4000, 0xffff) AM_ROM
750	736	ADDRESS_MAP_END
751	737
752		static ADDRESS_MAP_START( shackled_readmem, ADDRESS_SPACE_PROGRAM, 8 )
753		AM_RANGE(0x0000, 0x0fff) AM_READ(SMH_RAM) AM_SHARE(1)
754		AM_RANGE(0x1000, 0x13ff) AM_READ(SMH_RAM) AM_SHARE(3)
755		AM_RANGE(0x1400, 0x17ff) AM_READ(SMH_RAM) AM_SHARE(4)
	738	static ADDRESS_MAP_START( shackled_map, ADDRESS_SPACE_PROGRAM, 8 )
	739	AM_RANGE(0x0000, 0x0fff) AM_RAM AM_SHARE(1)
	740	AM_RANGE(0x1000, 0x13ff) AM_RAM_WRITE(paletteram_xxxxBBBBGGGGRRRR_split1_w) AM_SHARE(3) AM_BASE(&paletteram)
	741	AM_RANGE(0x1400, 0x17ff) AM_RAM_WRITE(paletteram_xxxxBBBBGGGGRRRR_split2_w) AM_SHARE(4) AM_BASE(&paletteram_2)
756	742	AM_RANGE(0x1800, 0x1800) AM_READ_PORT("IN0")
757	743	AM_RANGE(0x1801, 0x1801) AM_READ_PORT("IN1")
758	744	AM_RANGE(0x1802, 0x1802) AM_READ_PORT("IN2")
759	745	AM_RANGE(0x1803, 0x1803) AM_READ_PORT("DSW0")
760	746	AM_RANGE(0x1804, 0x1804) AM_READ_PORT("DSW1")
761		AM_RANGE(0x2000, 0x27ff) AM_READ(SMH_RAM)
762		AM_RANGE(0x2800, 0x2fff) AM_READ(shackled_sprite_r)
763		AM_RANGE(0x3000, 0x37ff) AM_READ(SMH_RAM) AM_SHARE(2)
764		AM_RANGE(0x3800, 0x3fff) AM_READ(dec8_pf0_data_r)
765		AM_RANGE(0x4000, 0x7fff) AM_READ(SMH_BANK1)
766		AM_RANGE(0x8000, 0xffff) AM_READ(SMH_ROM)
767		ADDRESS_MAP_END
768
769		static ADDRESS_MAP_START( shackled_writemem, ADDRESS_SPACE_PROGRAM, 8 )
770		AM_RANGE(0x0000, 0x0fff) AM_WRITE(SMH_RAM) AM_SHARE(1)
771		AM_RANGE(0x1000, 0x13ff) AM_WRITE(paletteram_xxxxBBBBGGGGRRRR_split1_w) AM_SHARE(3) AM_BASE(&paletteram)
772		AM_RANGE(0x1400, 0x17ff) AM_WRITE(paletteram_xxxxBBBBGGGGRRRR_split2_w) AM_SHARE(4) AM_BASE(&paletteram_2)
773	747	AM_RANGE(0x1800, 0x1804) AM_WRITE(shackled_int_w)
774	748	AM_RANGE(0x1805, 0x1805) AM_WRITE(buffer_spriteram_w) /* DMA */
775	749	AM_RANGE(0x1807, 0x1807) AM_WRITE(flip_screen_w)
776	750	AM_RANGE(0x1809, 0x1809) AM_WRITE(lastmiss_scrollx_w) /* Scroll LSB */
777	751	AM_RANGE(0x180b, 0x180b) AM_WRITE(lastmiss_scrolly_w) /* Scroll LSB */
778		AM_RANGE(0x180c, 0x180c) AM_WRITE(oscar_sound_w)
	752	AM_RANGE(0x180c, 0x180c) AM_WRITE(dec8_sound_w)
779	753	AM_RANGE(0x180d, 0x180d) AM_WRITE(shackled_control_w) /* Bank switch + Scroll MSB */
780		AM_RANGE(0x2000, 0x27ff) AM_WRITE(dec8_videoram_w)
781		AM_RANGE(0x2800, 0x2fff) AM_WRITE(shackled_sprite_w)
782		AM_RANGE(0x3000, 0x37ff) AM_WRITE(SMH_RAM) AM_SHARE(2)
783		AM_RANGE(0x3800, 0x3fff) AM_WRITE(dec8_pf0_data_w) AM_BASE(&dec8_pf0_data)
784		AM_RANGE(0x4000, 0xffff) AM_WRITE(SMH_ROM)
	754	AM_RANGE(0x2000, 0x27ff) AM_READ(SMH_RAM) AM_WRITE(dec8_videoram_w)
	755	AM_RANGE(0x2800, 0x2fff) AM_READWRITE(shackled_sprite_r, shackled_sprite_w)
	756	AM_RANGE(0x3000, 0x37ff) AM_RAM AM_SHARE(2)
	757	AM_RANGE(0x3800, 0x3fff) AM_READWRITE(dec8_pf0_data_r, dec8_pf0_data_w) AM_BASE(&dec8_pf0_data)
	758	AM_RANGE(0x4000, 0x7fff) AM_ROMBANK(1)
	759	AM_RANGE(0x8000, 0xffff) AM_ROM
785	760	ADDRESS_MAP_END
786	761
787		static ADDRESS_MAP_START( shackled_sub_readmem, ADDRESS_SPACE_PROGRAM, 8 )
788		AM_RANGE(0x0000, 0x0fff) AM_READ(SMH_RAM) AM_SHARE(1)
789		AM_RANGE(0x1000, 0x13ff) AM_READ(SMH_RAM) AM_SHARE(3)
790		AM_RANGE(0x1400, 0x17ff) AM_READ(SMH_RAM) AM_SHARE(4)
	762	static ADDRESS_MAP_START( shackled_sub_map, ADDRESS_SPACE_PROGRAM, 8 )
	763	AM_RANGE(0x0000, 0x0fff) AM_RAM AM_SHARE(1)
	764	AM_RANGE(0x1000, 0x13ff) AM_RAM_WRITE(paletteram_xxxxBBBBGGGGRRRR_split1_w) AM_SHARE(3)
	765	AM_RANGE(0x1400, 0x17ff) AM_RAM_WRITE(paletteram_xxxxBBBBGGGGRRRR_split2_w) AM_SHARE(4)
791	766	AM_RANGE(0x1800, 0x1800) AM_READ_PORT("IN0")
792	767	AM_RANGE(0x1801, 0x1801) AM_READ_PORT("IN1")
793	768	AM_RANGE(0x1802, 0x1802) AM_READ_PORT("IN2")
794	769	AM_RANGE(0x1803, 0x1803) AM_READ_PORT("DSW0")
795	770	AM_RANGE(0x1804, 0x1804) AM_READ_PORT("DSW1")
796		AM_RANGE(0x1806, 0x1806) AM_READ(i8751_h_r)
797		AM_RANGE(0x1807, 0x1807) AM_READ(i8751_l_r)
798		AM_RANGE(0x2000, 0x27ff) AM_READ(SMH_RAM)
799		AM_RANGE(0x2800, 0x2fff) AM_READ(SMH_RAM)
800		AM_RANGE(0x3000, 0x37ff) AM_READ(SMH_RAM) AM_SHARE(2)
801		AM_RANGE(0x3800, 0x3fff) AM_READ(dec8_pf0_data_r)
802		AM_RANGE(0x4000, 0xffff) AM_READ(SMH_ROM)
803		ADDRESS_MAP_END
804
805		static ADDRESS_MAP_START( shackled_sub_writemem, ADDRESS_SPACE_PROGRAM, 8 )
806		AM_RANGE(0x0000, 0x0fff) AM_WRITE(SMH_RAM) AM_SHARE(1)
807		AM_RANGE(0x1000, 0x13ff) AM_WRITE(paletteram_xxxxBBBBGGGGRRRR_split1_w) AM_SHARE(3)
808		AM_RANGE(0x1400, 0x17ff) AM_WRITE(paletteram_xxxxBBBBGGGGRRRR_split2_w) AM_SHARE(4)
809	771	AM_RANGE(0x1800, 0x1804) AM_WRITE(shackled_int_w)
810	772	AM_RANGE(0x1805, 0x1805) AM_WRITE(buffer_spriteram_w) /* DMA */
811		AM_RANGE(0x1807, 0x1807) AM_WRITE(flip_screen_w)
	773	AM_RANGE(0x1806, 0x1806) AM_READ(i8751_h_r)
	774	AM_RANGE(0x1807, 0x1807) AM_READWRITE(i8751_l_r, flip_screen_w)
812	775	AM_RANGE(0x1809, 0x1809) AM_WRITE(lastmiss_scrollx_w) /* Scroll LSB */
813	776	AM_RANGE(0x180b, 0x180b) AM_WRITE(lastmiss_scrolly_w) /* Scroll LSB */
814		AM_RANGE(0x180c, 0x180c) AM_WRITE(oscar_sound_w)
	777	AM_RANGE(0x180c, 0x180c) AM_WRITE(dec8_sound_w)
815	778	AM_RANGE(0x180d, 0x180d) AM_WRITE(shackled_control_w) /* Bank switch + Scroll MSB */
816	779	AM_RANGE(0x180e, 0x180f) AM_WRITE(shackled_i8751_w)
817		AM_RANGE(0x2000, 0x27ff) AM_WRITE(dec8_videoram_w) AM_BASE(&videoram) AM_SIZE(&videoram_size)
818		AM_RANGE(0x2800, 0x2fff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
819		AM_RANGE(0x3000, 0x37ff) AM_WRITE(SMH_RAM) AM_SHARE(2)
820		AM_RANGE(0x3800, 0x3fff) AM_WRITE(dec8_pf0_data_w)
821		AM_RANGE(0x4000, 0xffff) AM_WRITE(SMH_ROM)
	780	AM_RANGE(0x2000, 0x27ff) AM_RAM_WRITE(dec8_videoram_w) AM_BASE(&videoram) AM_SIZE(&videoram_size)
	781	AM_RANGE(0x2800, 0x2fff) AM_RAM AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
	782	AM_RANGE(0x3000, 0x37ff) AM_RAM AM_SHARE(2)
	783	AM_RANGE(0x3800, 0x3fff) AM_READWRITE(dec8_pf0_data_r, dec8_pf0_data_w)
	784	AM_RANGE(0x4000, 0xffff) AM_ROM
822	785	ADDRESS_MAP_END
823	786
824		static ADDRESS_MAP_START( csilver_readmem, ADDRESS_SPACE_PROGRAM, 8 )
825		AM_RANGE(0x0000, 0x0fff) AM_READ(SMH_RAM) AM_SHARE(1)
826		AM_RANGE(0x1000, 0x13ff) AM_READ(SMH_RAM) AM_SHARE(3)
827		AM_RANGE(0x1400, 0x17ff) AM_READ(SMH_RAM) AM_SHARE(4)
	787	static ADDRESS_MAP_START( csilver_map, ADDRESS_SPACE_PROGRAM, 8 )
	788	AM_RANGE(0x0000, 0x0fff) AM_RAM AM_SHARE(1)
	789	AM_RANGE(0x1000, 0x13ff) AM_RAM_WRITE(paletteram_xxxxBBBBGGGGRRRR_split1_w) AM_SHARE(3) AM_BASE(&paletteram)
	790	AM_RANGE(0x1400, 0x17ff) AM_RAM_WRITE(paletteram_xxxxBBBBGGGGRRRR_split2_w) AM_SHARE(4) AM_BASE(&paletteram_2)
828	791	AM_RANGE(0x1800, 0x1800) AM_READ_PORT("IN1")
829	792	AM_RANGE(0x1801, 0x1801) AM_READ_PORT("IN0")
830	793	AM_RANGE(0x1803, 0x1803) AM_READ_PORT("IN2")
831	794	AM_RANGE(0x1804, 0x1804) AM_READ_PORT("DSW1")   /* Dip 2 */
832		AM_RANGE(0x1805, 0x1805) AM_READ_PORT("DSW0")   /* Dip 1 */
833		AM_RANGE(0x1c00, 0x1c00) AM_READ(i8751_h_r)
834		AM_RANGE(0x1e00, 0x1e00) AM_READ(i8751_l_r)
835		AM_RANGE(0x2000, 0x27ff) AM_READ(SMH_RAM)
836		AM_RANGE(0x2800, 0x2fff) AM_READ(shackled_sprite_r)
837		AM_RANGE(0x3000, 0x37ff) AM_READ(SMH_RAM) AM_SHARE(2)
838		AM_RANGE(0x3800, 0x3fff) AM_READ(dec8_pf0_data_r)
839		AM_RANGE(0x4000, 0x7fff) AM_READ(SMH_BANK1)
840		AM_RANGE(0x8000, 0xffff) AM_READ(SMH_ROM)
841		ADDRESS_MAP_END
842
843		static ADDRESS_MAP_START( csilver_writemem, ADDRESS_SPACE_PROGRAM, 8 )
844		AM_RANGE(0x0000, 0x0fff) AM_WRITE(SMH_RAM) AM_SHARE(1)
845		AM_RANGE(0x1000, 0x13ff) AM_WRITE(paletteram_xxxxBBBBGGGGRRRR_split1_w) AM_SHARE(3) AM_BASE(&paletteram)
846		AM_RANGE(0x1400, 0x17ff) AM_WRITE(paletteram_xxxxBBBBGGGGRRRR_split2_w) AM_SHARE(4) AM_BASE(&paletteram_2)
847	795	AM_RANGE(0x1800, 0x1804) AM_WRITE(shackled_int_w)
848		AM_RANGE(0x1805, 0x1805) AM_WRITE(buffer_spriteram_w) /* DMA */
	796	AM_RANGE(0x1805, 0x1805) AM_READ_PORT("DSW0") AM_WRITE(buffer_spriteram_w) /* Dip 1, DMA */
849	797	AM_RANGE(0x1807, 0x1807) AM_WRITE(flip_screen_w)
850	798	AM_RANGE(0x1808, 0x180b) AM_WRITE(dec8_scroll2_w)
851		AM_RANGE(0x180c, 0x180c) AM_WRITE(oscar_sound_w)
	799	AM_RANGE(0x180c, 0x180c) AM_WRITE(dec8_sound_w)
852	800	AM_RANGE(0x180d, 0x180d) AM_WRITE(csilver_control_w)
853	801	AM_RANGE(0x180e, 0x180f) AM_WRITE(csilver_i8751_w)
854		AM_RANGE(0x2000, 0x27ff) AM_WRITE(dec8_videoram_w)
855		AM_RANGE(0x2800, 0x2fff) AM_WRITE(shackled_sprite_w)
856		AM_RANGE(0x3000, 0x37ff) AM_WRITE(SMH_RAM) AM_SHARE(2)
857		AM_RANGE(0x3800, 0x3fff) AM_WRITE(dec8_pf0_data_w) AM_BASE(&dec8_pf0_data)
858		AM_RANGE(0x4000, 0xffff) AM_WRITE(SMH_ROM)
	802	AM_RANGE(0x1c00, 0x1c00) AM_READ(i8751_h_r)
	803	AM_RANGE(0x1e00, 0x1e00) AM_READ(i8751_l_r)
	804	AM_RANGE(0x2000, 0x27ff) AM_READ(SMH_RAM) AM_WRITE(dec8_videoram_w)
	805	AM_RANGE(0x2800, 0x2fff) AM_READWRITE(shackled_sprite_r, shackled_sprite_w)
	806	AM_RANGE(0x3000, 0x37ff) AM_RAM AM_SHARE(2)
	807	AM_RANGE(0x3800, 0x3fff) AM_READWRITE(dec8_pf0_data_r, dec8_pf0_data_w) AM_BASE(&dec8_pf0_data)
	808	AM_RANGE(0x4000, 0x7fff) AM_ROMBANK(1)
	809	AM_RANGE(0x8000, 0xffff) AM_ROM
859	810	ADDRESS_MAP_END
860	811
861		static ADDRESS_MAP_START( csilver_sub_readmem, ADDRESS_SPACE_PROGRAM, 8 )
862		AM_RANGE(0x0000, 0x0fff) AM_READ(SMH_RAM) AM_SHARE(1)
863		AM_RANGE(0x1000, 0x13ff) AM_READ(SMH_RAM) AM_SHARE(3)
864		AM_RANGE(0x1400, 0x17ff) AM_READ(SMH_RAM) AM_SHARE(4)
	812	static ADDRESS_MAP_START( csilver_sub_map, ADDRESS_SPACE_PROGRAM, 8 )
	813	AM_RANGE(0x0000, 0x0fff) AM_RAM AM_SHARE(1)
	814	AM_RANGE(0x1000, 0x13ff) AM_RAM_WRITE(paletteram_xxxxBBBBGGGGRRRR_split1_w) AM_SHARE(3)
	815	AM_RANGE(0x1400, 0x17ff) AM_RAM_WRITE(paletteram_xxxxBBBBGGGGRRRR_split2_w) AM_SHARE(4)
865	816	AM_RANGE(0x1803, 0x1803) AM_READ_PORT("IN2")
866	817	AM_RANGE(0x1804, 0x1804) AM_READ_PORT("DSW1")
867		AM_RANGE(0x1805, 0x1805) AM_READ_PORT("DSW0")
868		AM_RANGE(0x2000, 0x27ff) AM_READ(SMH_RAM)
869		AM_RANGE(0x2800, 0x2fff) AM_READ(SMH_RAM)
870		AM_RANGE(0x3000, 0x37ff) AM_READ(SMH_RAM) AM_SHARE(2)
871		AM_RANGE(0x3800, 0x3fff) AM_READ(dec8_pf0_data_r)
872		AM_RANGE(0x4000, 0xffff) AM_READ(SMH_ROM)
873		ADDRESS_MAP_END
874
875		static ADDRESS_MAP_START( csilver_sub_writemem, ADDRESS_SPACE_PROGRAM, 8 )
876		AM_RANGE(0x0000, 0x0fff) AM_WRITE(SMH_RAM) AM_SHARE(1)
877		AM_RANGE(0x1000, 0x13ff) AM_WRITE(paletteram_xxxxBBBBGGGGRRRR_split1_w) AM_SHARE(3)
878		AM_RANGE(0x1400, 0x17ff) AM_WRITE(paletteram_xxxxBBBBGGGGRRRR_split2_w) AM_SHARE(4)
879	818	AM_RANGE(0x1800, 0x1804) AM_WRITE(shackled_int_w)
880		AM_RANGE(0x1805, 0x1805) AM_WRITE(buffer_spriteram_w) /* DMA */
881		AM_RANGE(0x180c, 0x180c) AM_WRITE(oscar_sound_w)
882		AM_RANGE(0x2000, 0x27ff) AM_WRITE(dec8_videoram_w) AM_BASE(&videoram) AM_SIZE(&videoram_size)
883		AM_RANGE(0x2800, 0x2fff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
884		AM_RANGE(0x3000, 0x37ff) AM_WRITE(SMH_RAM) AM_SHARE(2)
885		AM_RANGE(0x3800, 0x3fff) AM_WRITE(dec8_pf0_data_w)
886		AM_RANGE(0x4000, 0xffff) AM_WRITE(SMH_ROM)
	819	AM_RANGE(0x1805, 0x1805) AM_READ_PORT("DSW0") AM_WRITE(buffer_spriteram_w) /* DMA */
	820	AM_RANGE(0x180c, 0x180c) AM_WRITE(dec8_sound_w)
	821	AM_RANGE(0x2000, 0x27ff) AM_RAM_WRITE(dec8_videoram_w) AM_BASE(&videoram) AM_SIZE(&videoram_size)
	822	AM_RANGE(0x2800, 0x2fff) AM_RAM AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
	823	AM_RANGE(0x3000, 0x37ff) AM_RAM AM_SHARE(2)
	824	AM_RANGE(0x3800, 0x3fff) AM_READWRITE(dec8_pf0_data_r, dec8_pf0_data_w)
	825	AM_RANGE(0x4000, 0xffff) AM_ROM
887	826	ADDRESS_MAP_END
888	827
889		static ADDRESS_MAP_START( garyoret_readmem, ADDRESS_SPACE_PROGRAM, 8 )
890		AM_RANGE(0x0000, 0x17ff) AM_READ(SMH_RAM)
891		AM_RANGE(0x1800, 0x1fff) AM_READ(SMH_RAM)
892		AM_RANGE(0x2000, 0x27ff) AM_READ(dec8_pf0_data_r)
893		AM_RANGE(0x2800, 0x2bff) AM_READ(SMH_RAM)
894		AM_RANGE(0x2c00, 0x2fff) AM_READ(SMH_RAM)
895		AM_RANGE(0x3000, 0x37ff) AM_READ(SMH_RAM)      /* Sprites */
	828	static ADDRESS_MAP_START( garyoret_map, ADDRESS_SPACE_PROGRAM, 8 )
	829	AM_RANGE(0x0000, 0x17ff) AM_RAM
	830	AM_RANGE(0x1800, 0x1fff) AM_RAM_WRITE(dec8_videoram_w) AM_BASE(&videoram) AM_SIZE(&videoram_size)
	831	AM_RANGE(0x2000, 0x27ff) AM_READWRITE(dec8_pf0_data_r, dec8_pf0_data_w) AM_BASE(&dec8_pf0_data)
	832	AM_RANGE(0x2800, 0x2bff) AM_RAM_WRITE(paletteram_xxxxBBBBGGGGRRRR_split1_w) AM_BASE(&paletteram)
	833	AM_RANGE(0x2c00, 0x2fff) AM_RAM_WRITE(paletteram_xxxxBBBBGGGGRRRR_split2_w) AM_BASE(&paletteram_2)
	834	AM_RANGE(0x3000, 0x37ff) AM_RAM AM_BASE(&spriteram) AM_SIZE(&spriteram_size) /* Sprites */
896	835	AM_RANGE(0x3800, 0x3800) AM_READ_PORT("DSW0")   /* Dip 1 */
897	836	AM_RANGE(0x3801, 0x3801) AM_READ_PORT("DSW1")   /* Dip 2 */
898	837	AM_RANGE(0x3808, 0x3808) AM_READNOP      /* ? */
899	838	AM_RANGE(0x380a, 0x380a) AM_READ_PORT("IN1")   /* Player 2 + VBL */
900	839	AM_RANGE(0x380b, 0x380b) AM_READ_PORT("IN0")   /* Player 1 */
901		AM_RANGE(0x383a, 0x383a) AM_READ(i8751_h_r)
902		AM_RANGE(0x383b, 0x383b) AM_READ(i8751_l_r)
903		AM_RANGE(0x4000, 0x7fff) AM_READ(SMH_BANK1)
904		AM_RANGE(0x8000, 0xffff) AM_READ(SMH_ROM)
905		ADDRESS_MAP_END
906
907		static ADDRESS_MAP_START( garyoret_writemem, ADDRESS_SPACE_PROGRAM, 8 )
908		AM_RANGE(0x0000, 0x17ff) AM_WRITE(SMH_RAM)
909		AM_RANGE(0x1800, 0x1fff) AM_WRITE(dec8_videoram_w) AM_BASE(&videoram) AM_SIZE(&videoram_size)
910		AM_RANGE(0x2000, 0x27ff) AM_WRITE(dec8_pf0_data_w) AM_BASE(&dec8_pf0_data)
911		AM_RANGE(0x2800, 0x2bff) AM_WRITE(paletteram_xxxxBBBBGGGGRRRR_split1_w) AM_BASE(&paletteram)
912		AM_RANGE(0x2c00, 0x2fff) AM_WRITE(paletteram_xxxxBBBBGGGGRRRR_split2_w) AM_BASE(&paletteram_2)
913		AM_RANGE(0x3000, 0x37ff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
914	840	AM_RANGE(0x3810, 0x3810) AM_WRITE(dec8_sound_w)
915	841	AM_RANGE(0x3818, 0x382f) AM_WRITE(gondo_scroll_w)
916	842	AM_RANGE(0x3830, 0x3830) AM_WRITE(ghostb_bank_w) /* Bank + NMI enable */
917	843	AM_RANGE(0x3838, 0x3839) AM_WRITE(garyoret_i8751_w)
918		AM_RANGE(0x4000, 0xffff) AM_WRITE(SMH_ROM)
	844	AM_RANGE(0x383a, 0x383a) AM_READ(i8751_h_r)
	845	AM_RANGE(0x383b, 0x383b) AM_READ(i8751_l_r)
	846	AM_RANGE(0x4000, 0x7fff) AM_ROMBANK(1)
	847	AM_RANGE(0x8000, 0xffff) AM_ROM
919	848	ADDRESS_MAP_END
920	849
921	850	/******************************************************************************/
922	851
923	852	/* Used for Cobra Command, Maze Hunter, Super Real Darwin etc */
924		static ADDRESS_MAP_START( dec8_s_readmem, ADDRESS_SPACE_PROGRAM, 8 )
925		AM_RANGE(0x0000, 0x05ff) AM_READ(SMH_RAM)
926		AM_RANGE(0x6000, 0x6000) AM_READ(soundlatch_r)
927		AM_RANGE(0x8000, 0xffff) AM_READ(SMH_ROM)
928		ADDRESS_MAP_END
929
930		static ADDRESS_MAP_START( dec8_s_writemem, ADDRESS_SPACE_PROGRAM, 8 )
931		AM_RANGE(0x0000, 0x05ff) AM_WRITE(SMH_RAM)
	853	static ADDRESS_MAP_START( dec8_s_map, ADDRESS_SPACE_PROGRAM, 8 )
	854	AM_RANGE(0x0000, 0x05ff) AM_RAM
932	855	AM_RANGE(0x2000, 0x2001) AM_DEVWRITE("ym1", ym2203_w)
933	856	AM_RANGE(0x4000, 0x4001) AM_DEVWRITE("ym2", ym3812_w)
934		AM_RANGE(0x8000, 0xffff) AM_WRITE(SMH_ROM)
	857	AM_RANGE(0x6000, 0x6000) AM_READ(soundlatch_r)
	858	AM_RANGE(0x8000, 0xffff) AM_ROM
935	859	ADDRESS_MAP_END
936	860
937	861	/* Used by Gondomania, Psycho-Nics Oscar & Garyo Retsuden */
938		static ADDRESS_MAP_START( oscar_s_writemem, ADDRESS_SPACE_PROGRAM, 8 )
939		AM_RANGE(0x0000, 0x05ff) AM_WRITE(SMH_RAM)
	862	static ADDRESS_MAP_START( oscar_s_map, ADDRESS_SPACE_PROGRAM, 8 )
	863	AM_RANGE(0x0000, 0x05ff) AM_RAM
940	864	AM_RANGE(0x2000, 0x2001) AM_DEVWRITE("ym1", ym2203_w)
941	865	AM_RANGE(0x4000, 0x4001) AM_DEVWRITE("ym2", ym3526_w)
942		AM_RANGE(0x8000, 0xffff) AM_WRITE(SMH_ROM)
	866	AM_RANGE(0x6000, 0x6000) AM_READ(soundlatch_r)
	867	AM_RANGE(0x8000, 0xffff) AM_ROM
943	868	ADDRESS_MAP_END
944	869
945	870	/* Used by Last Mission, Shackled & Breywood */
946		static ADDRESS_MAP_START( ym3526_s_readmem, ADDRESS_SPACE_PROGRAM, 8 )
947		AM_RANGE(0x0000, 0x05ff) AM_READ(SMH_RAM)
948		AM_RANGE(0x3000, 0x3000) AM_READ(soundlatch_r)
949		AM_RANGE(0x8000, 0xffff) AM_READ(SMH_ROM)
950		ADDRESS_MAP_END
951
952		static ADDRESS_MAP_START( ym3526_s_writemem, ADDRESS_SPACE_PROGRAM, 8 )
953		AM_RANGE(0x0000, 0x05ff) AM_WRITE(SMH_RAM)
	871	static ADDRESS_MAP_START( ym3526_s_map, ADDRESS_SPACE_PROGRAM, 8 )
	872	AM_RANGE(0x0000, 0x05ff) AM_RAM
954	873	AM_RANGE(0x0800, 0x0801) AM_DEVWRITE("ym1", ym2203_w)
955	874	AM_RANGE(0x1000, 0x1001) AM_DEVWRITE("ym2", ym3526_w)
956		AM_RANGE(0x8000, 0xffff) AM_WRITE(SMH_ROM)
957		ADDRESS_MAP_END
958
959		/* Captain Silver - same sound system as Pocket Gal */
960		static ADDRESS_MAP_START( csilver_s_readmem, ADDRESS_SPACE_PROGRAM, 8 )
961		AM_RANGE(0x0000, 0x07ff) AM_READ(SMH_RAM)
962	875	AM_RANGE(0x3000, 0x3000) AM_READ(soundlatch_r)
963		AM_RANGE(0x3400, 0x3400) AM_DEVREAD("msm", csilver_adpcm_reset_r)   /* ? not sure */
964		AM_RANGE(0x4000, 0x7fff) AM_READ(SMH_BANK3)
965		AM_RANGE(0x8000, 0xffff) AM_READ(SMH_ROM)
	876	AM_RANGE(0x8000, 0xffff) AM_ROM
966	877	ADDRESS_MAP_END
967	878
968		static ADDRESS_MAP_START( csilver_s_writemem, ADDRESS_SPACE_PROGRAM, 8 )
969		AM_RANGE(0x0000, 0x07ff) AM_WRITE(SMH_RAM)
	879	/* Captain Silver - same sound system as Pocket Gal */
	880	static ADDRESS_MAP_START( csilver_s_map, ADDRESS_SPACE_PROGRAM, 8 )
	881	AM_RANGE(0x0000, 0x07ff) AM_RAM
970	882	AM_RANGE(0x0800, 0x0801) AM_DEVWRITE("ym1", ym2203_w)
971	883	AM_RANGE(0x1000, 0x1001) AM_DEVWRITE("ym2", ym3526_w)
972	884	AM_RANGE(0x1800, 0x1800) AM_WRITE(csilver_adpcm_data_w)   /* ADPCM data for the MSM5205 chip */
973	885	AM_RANGE(0x2000, 0x2000) AM_WRITE(csilver_sound_bank_w)
974		AM_RANGE(0x4000, 0xffff) AM_WRITE(SMH_ROM)
	886	AM_RANGE(0x3000, 0x3000) AM_READ(soundlatch_r)
	887	AM_RANGE(0x3400, 0x3400) AM_DEVREAD("msm", csilver_adpcm_reset_r)   /* ? not sure */
	888	AM_RANGE(0x4000, 0x7fff) AM_ROMBANK(3)
	889	AM_RANGE(0x8000, 0xffff) AM_ROM
975	890	ADDRESS_MAP_END
976	891
977	892	/******************************************************************************/
978	893
	894	static READ8_HANDLER( dec8_mcu_from_main_r )
	895	{
	896	switch (offset)
	897	{
	898	case 0:
	899	return ((i8751_value & 0xff00) >> 8);
	900	case 1:
	901	cputag_set_input_line(space->machine, "mcu", MCS51_INT1_LINE, CLEAR_LINE);
	902	return i8751_value & 0xff;
	903	}
	904
	905	return 0; //compile safe.
	906	}
	907
	908	static WRITE8_HANDLER( dec8_mcu_to_main_w )
	909	{
	910	switch (offset)
	911	{
	912	case 0: /* High byte */
	913	i8751_return = (i8751_return & 0xff) | (data << 8);
	914	break;
	915	case 1: /* Low byte */
	916	i8751_return = (i8751_return & 0xff00) | data;
	917	break;
	918	}
	919	}
	920
	921	static ADDRESS_MAP_START( dec8_mcu_io_map, ADDRESS_SPACE_IO, 8 )
	922	AM_RANGE(MCS51_PORT_P0,MCS51_PORT_P1) AM_READWRITE(dec8_mcu_from_main_r,dec8_mcu_to_main_w)
	923	AM_RANGE(MCS51_PORT_P2,MCS51_PORT_P2) AM_WRITENOP
	924	AM_RANGE(MCS51_PORT_P3,MCS51_PORT_P3) AM_READ_PORT("I8751") AM_WRITENOP
	925	ADDRESS_MAP_END
	926
	927	/******************************************************************************/
	928
979	929	#define PLAYER1_JOYSTICK /* Player 1 controls */ \
980	930	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_8WAY \
981	931	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_8WAY \
r4679	r4680
1150	1100	PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_START3 )
1151	1101	INPUT_PORTS_END
1152	1102
	1103	/* same but with coin latches hooked up with the irqs since we have a MCU dump. */
	1104	static INPUT_CHANGED( coin_inserted )
	1105	{
	1106	if(newval)
	1107	cputag_set_input_line(field->port->machine, "maincpu", M6809_IRQ_LINE, HOLD_LINE);
	1108	}
	1109
	1110	static INPUT_PORTS_START( meikyuh )
	1111	PORT_INCLUDE(ghostb)
	1112
	1113	PORT_MODIFY("I8751")   /* hooked up on the i8751 */
	1114	PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_COIN4 ) PORT_IMPULSE(1) PORT_CHANGED(coin_inserted, 0)
	1115	PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_COIN3 ) PORT_IMPULSE(1) PORT_CHANGED(coin_inserted, 0)
	1116	PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_COIN2 ) PORT_IMPULSE(1) PORT_CHANGED(coin_inserted, 0)
	1117	PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_IMPULSE(1) PORT_CHANGED(coin_inserted, 0)
	1118	INPUT_PORTS_END
	1119
1153	1120	static INPUT_PORTS_START( srdarwin )
1154	1121	PORT_START("IN0")
1155	1122	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_8WAY
r4679	r4680
1970	1937	/* handler called by the 3812 emulator when the internal timers cause an IRQ */
1971	1938	static void irqhandler(const device_config *device, int linestate)
1972	1939	{
1973		cpu_set_input_line(device->machine->cpu[1],0,linestate); /* M6502_IRQ_LINE */
	1940	cputag_set_input_line(device->machine, "audiocpu", 0, linestate); /* M6502_IRQ_LINE */
1974	1941	}
1975	1942
1976		static void oscar_irqhandler(const device_config *device, int linestate)
1977		{
1978		cpu_set_input_line(device->machine->cpu[2],0,linestate); /* M6502_IRQ_LINE */
1979		}
1980
1981	1943	static const ym3526_interface ym3526_config =
1982	1944	{
1983	1945	irqhandler
1984	1946	};
1985	1947
1986		static const ym3526_interface oscar_ym3526_interface =
1987		{
1988		oscar_irqhandler
1989		};
1990
1991	1948	static const ym3812_interface ym3812_config =
1992	1949	{
1993	1950	irqhandler
r4679	r4680
2004	1961	static INTERRUPT_GEN( ghostb_interrupt )
2005	1962	{
2006	1963	static int latch[4];
2007		int i8751_out=input_port_read(device->machine, "I8751");
	1964	int i8751_out = input_port_read(device->machine, "I8751");
2008	1965
2009	1966	/* Ghostbusters coins are controlled by the i8751 */
2010		if ((i8751_out & 0x8) == 0x8) latch[0]=1;
2011		if ((i8751_out & 0x4) == 0x4) latch[1]=1;
2012		if ((i8751_out & 0x2) == 0x2) latch[2]=1;
2013		if ((i8751_out & 0x1) == 0x1) latch[3]=1;
	1967	if ((i8751_out & 0x8) == 0x8) latch[0] = 1;
	1968	if ((i8751_out & 0x4) == 0x4) latch[1] = 1;
	1969	if ((i8751_out & 0x2) == 0x2) latch[2] = 1;
	1970	if ((i8751_out & 0x1) == 0x1) latch[3] = 1;
2014	1971
2015		if (((i8751_out & 0x8) != 0x8) && latch[0]) {latch[0]=0; cpu_set_input_line(device,M6809_IRQ_LINE,HOLD_LINE); i8751_return=0x8001; } /* Player 1 coin */
2016		if (((i8751_out & 0x4) != 0x4) && latch[1]) {latch[1]=0; cpu_set_input_line(device,M6809_IRQ_LINE,HOLD_LINE); i8751_return=0x4001; } /* Player 2 coin */
2017		if (((i8751_out & 0x2) != 0x2) && latch[2]) {latch[2]=0; cpu_set_input_line(device,M6809_IRQ_LINE,HOLD_LINE); i8751_return=0x2001; } /* Player 3 coin */
2018		if (((i8751_out & 0x1) != 0x1) && latch[3]) {latch[3]=0; cpu_set_input_line(device,M6809_IRQ_LINE,HOLD_LINE); i8751_return=0x1001; } /* Service */
	1972	if (((i8751_out & 0x8) != 0x8) && latch[0]) {latch[0] = 0; cpu_set_input_line(device,M6809_IRQ_LINE,HOLD_LINE); i8751_return = 0x8001; } /* Player 1 coin */
	1973	if (((i8751_out & 0x4) != 0x4) && latch[1]) {latch[1] = 0; cpu_set_input_line(device,M6809_IRQ_LINE,HOLD_LINE); i8751_return = 0x4001; } /* Player 2 coin */
	1974	if (((i8751_out & 0x2) != 0x2) && latch[2]) {latch[2] = 0; cpu_set_input_line(device,M6809_IRQ_LINE,HOLD_LINE); i8751_return = 0x2001; } /* Player 3 coin */
	1975	if (((i8751_out & 0x1) != 0x1) && latch[3]) {latch[3] = 0; cpu_set_input_line(device,M6809_IRQ_LINE,HOLD_LINE); i8751_return = 0x1001; } /* Service */
2019	1976
2020	1977	if (nmi_enable) cpu_set_input_line(device, INPUT_LINE_NMI, PULSE_LINE); /* VBL */
2021	1978	}
r4679	r4680
2029	1986	/* Coins generate NMI's */
2030	1987	static INTERRUPT_GEN( oscar_interrupt )
2031	1988	{
2032		static int latch=1;
	1989	static int latch = 1;
2033	1990
2034		if ((input_port_read(device->machine, "IN2") & 0x7) == 0x7) latch=1;
2035		if (latch && (input_port_read(device->machine, "IN2") & 0x7) != 0x7) {
2036		latch=0;
	1991	if ((input_port_read(device->machine, "IN2") & 0x7) == 0x7) latch = 1;
	1992	if (latch && (input_port_read(device->machine, "IN2") & 0x7) != 0x7)
	1993	{
	1994	latch = 0;
2037	1995	cpu_set_input_line(device, INPUT_LINE_NMI, PULSE_LINE);
2038	1996	}
2039	1997	}
r4679	r4680
2044	2002
2045	2003	/* basic machine hardware */
2046	2004	MDRV_CPU_ADD("maincpu", M6809, 2000000)
2047		MDRV_CPU_PROGRAM_MAP(cobra_readmem,cobra_writemem)
	2005	MDRV_CPU_PROGRAM_MAP(cobra_map,0)
2048	2006	MDRV_CPU_VBLANK_INT("screen", nmi_line_pulse)
2049	2007
2050	2008	MDRV_CPU_ADD("audiocpu", M6502, 1500000)
2051		MDRV_CPU_PROGRAM_MAP(dec8_s_readmem,dec8_s_writemem)
	2009	MDRV_CPU_PROGRAM_MAP(dec8_s_map,0)
2052	2010	/* NMIs are caused by the main CPU */
2053	2011
2054	2012	/* video hardware */
r4679	r4680
2085	2043
2086	2044	/* basic machine hardware */
2087	2045	MDRV_CPU_ADD("maincpu", HD6309, 3000000*4)
2088		MDRV_CPU_PROGRAM_MAP(ghostb_readmem,ghostb_writemem)
	2046	MDRV_CPU_PROGRAM_MAP(ghostb_map,0)
2089	2047	MDRV_CPU_VBLANK_INT("screen", ghostb_interrupt)
2090	2048
2091	2049	MDRV_CPU_ADD("audiocpu", M6502, 1500000)
2092		MDRV_CPU_PROGRAM_MAP(dec8_s_readmem,dec8_s_writemem)
	2050	MDRV_CPU_PROGRAM_MAP(dec8_s_map,0)
2093	2051	/* NMIs are caused by the main CPU */
2094	2052
2095	2053	/* video hardware */
r4679	r4680
2124	2082	MDRV_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.70)
2125	2083	MACHINE_DRIVER_END
2126	2084
	2085	/* these two will be unified one day... */
	2086	static MACHINE_DRIVER_START( meikyuh )
	2087	MDRV_IMPORT_FROM( ghostb )
	2088	MDRV_CPU_MODIFY("maincpu")
	2089	MDRV_CPU_PROGRAM_MAP(meikyuh_map,0)
	2090	MDRV_CPU_VBLANK_INT("screen", gondo_interrupt)
	2091
	2092	MDRV_CPU_ADD("mcu", I8751, 3000000*4)
	2093	MDRV_CPU_IO_MAP(dec8_mcu_io_map,0)
	2094	MACHINE_DRIVER_END
	2095
	2096
2127	2097	static MACHINE_DRIVER_START( srdarwin )
2128	2098
2129	2099	/* basic machine hardware */
2130	2100	MDRV_CPU_ADD("maincpu", M6809,2000000)  /* MC68A09EP */
2131		MDRV_CPU_PROGRAM_MAP(srdarwin_readmem,srdarwin_writemem)
	2101	MDRV_CPU_PROGRAM_MAP(srdarwin_map,0)
2132	2102	MDRV_CPU_VBLANK_INT("screen", nmi_line_pulse)
2133	2103
2134	2104	MDRV_CPU_ADD("audiocpu", M6502, 1500000)
2135		MDRV_CPU_PROGRAM_MAP(dec8_s_readmem,dec8_s_writemem)
	2105	MDRV_CPU_PROGRAM_MAP(dec8_s_map,0)
2136	2106	/* NMIs are caused by the main CPU */
2137	2107
2138	2108	/* video hardware */
r4679	r4680
2169	2139
2170	2140	/* basic machine hardware */
2171	2141	MDRV_CPU_ADD("maincpu", HD6309,3000000*4) /* HD63C09EP */
2172		MDRV_CPU_PROGRAM_MAP(gondo_readmem,gondo_writemem)
	2142	MDRV_CPU_PROGRAM_MAP(gondo_map,0)
2173	2143	MDRV_CPU_VBLANK_INT("screen", gondo_interrupt)
2174	2144
2175	2145	MDRV_CPU_ADD("audiocpu", M6502, 1500000)
2176		MDRV_CPU_PROGRAM_MAP(dec8_s_readmem,oscar_s_writemem)
	2146	MDRV_CPU_PROGRAM_MAP(oscar_s_map,0)
2177	2147	/* NMIs are caused by the main CPU */
2178	2148
2179	2149	/* video hardware */
r4679	r4680
2211	2181
2212	2182	/* basic machine hardware */
2213	2183	MDRV_CPU_ADD("maincpu", HD6309, XTAL_12MHz/2) /* verified on pcb */
2214		MDRV_CPU_PROGRAM_MAP(oscar_readmem,oscar_writemem)
	2184	MDRV_CPU_PROGRAM_MAP(oscar_map,0)
2215	2185	MDRV_CPU_VBLANK_INT("screen", oscar_interrupt)
2216	2186
2217	2187	MDRV_CPU_ADD("sub", HD6309, XTAL_12MHz/2) /* verified on pcb */
2218		MDRV_CPU_PROGRAM_MAP(oscar_sub_readmem,oscar_sub_writemem)
	2188	MDRV_CPU_PROGRAM_MAP(oscar_sub_map,0)
2219	2189
2220	2190	MDRV_CPU_ADD("audiocpu", M6502, XTAL_12MHz/8)
2221		MDRV_CPU_PROGRAM_MAP(dec8_s_readmem,oscar_s_writemem)
	2191	MDRV_CPU_PROGRAM_MAP(oscar_s_map,0)
2222	2192	/* NMIs are caused by the main CPU */
2223	2193	MDRV_QUANTUM_TIME(HZ(2400)) /* 40 CPU slices per frame */
2224	2194
r4679	r4680
2248	2218	MDRV_SOUND_ROUTE(3, "mono", 0.20)
2249	2219
2250	2220	MDRV_SOUND_ADD("ym2", YM3526, XTAL_12MHz/4) /* verified on pcb */
2251		MDRV_SOUND_CONFIG(oscar_ym3526_interface)
	2221	MDRV_SOUND_CONFIG(ym3526_config)
2252	2222	MDRV_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.70)
2253	2223	MACHINE_DRIVER_END
2254	2224
r4679	r4680
2256	2226
2257	2227	/* basic machine hardware */
2258	2228	MDRV_CPU_ADD("maincpu", M6809, 2000000)
2259		MDRV_CPU_PROGRAM_MAP(lastmiss_readmem,lastmiss_writemem)
	2229	MDRV_CPU_PROGRAM_MAP(lastmiss_map,0)
2260	2230
2261	2231	MDRV_CPU_ADD("sub", M6809, 2000000)
2262		MDRV_CPU_PROGRAM_MAP(lastmiss_sub_readmem,lastmiss_sub_writemem)
	2232	MDRV_CPU_PROGRAM_MAP(lastmiss_sub_map,0)
2263	2233
2264	2234	MDRV_CPU_ADD("audiocpu", M6502, 1500000)
2265		MDRV_CPU_PROGRAM_MAP(ym3526_s_readmem,ym3526_s_writemem)
	2235	MDRV_CPU_PROGRAM_MAP(ym3526_s_map,0)
2266	2236	/* NMIs are caused by the main CPU */
2267	2237	MDRV_QUANTUM_TIME(HZ(12000))
2268	2238
r4679	r4680
2292	2262	MDRV_SOUND_ROUTE(3, "mono", 0.20)
2293	2263
2294	2264	MDRV_SOUND_ADD("ym2", YM3526, 3000000)
2295		MDRV_SOUND_CONFIG(oscar_ym3526_interface)
	2265	MDRV_SOUND_CONFIG(ym3526_config)
2296	2266	MDRV_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.70)
2297	2267	MACHINE_DRIVER_END
2298	2268
r4679	r4680
2300	2270
2301	2271	/* basic machine hardware */
2302	2272	MDRV_CPU_ADD("maincpu", M6809, 2000000)
2303		MDRV_CPU_PROGRAM_MAP(shackled_readmem,shackled_writemem)
	2273	MDRV_CPU_PROGRAM_MAP(shackled_map,0)
2304	2274
2305	2275	MDRV_CPU_ADD("sub", M6809, 2000000)
2306		MDRV_CPU_PROGRAM_MAP(shackled_sub_readmem,shackled_sub_writemem)
	2276	MDRV_CPU_PROGRAM_MAP(shackled_sub_map,0)
2307	2277
2308	2278	MDRV_CPU_ADD("audiocpu", M6502, 1500000)
2309		MDRV_CPU_PROGRAM_MAP(ym3526_s_readmem,ym3526_s_writemem)
	2279	MDRV_CPU_PROGRAM_MAP(ym3526_s_map,0)
2310	2280	/* NMIs are caused by the main CPU */
2311	2281	MDRV_QUANTUM_TIME(HZ(4800))
2312	2282
r4679	r4680
2336	2306	MDRV_SOUND_ROUTE(3, "mono", 0.20)
2337	2307
2338	2308	MDRV_SOUND_ADD("ym2", YM3526, 3000000)
2339		MDRV_SOUND_CONFIG(oscar_ym3526_interface)
	2309	MDRV_SOUND_CONFIG(ym3526_config)
2340	2310	MDRV_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.70)
2341	2311	MACHINE_DRIVER_END
2342	2312
r4679	r4680
2344	2314
2345	2315	/* basic machine hardware */
2346	2316	MDRV_CPU_ADD("maincpu", M6809, XTAL_12MHz/8) /* verified on pcb */
2347		MDRV_CPU_PROGRAM_MAP(csilver_readmem,csilver_writemem)
	2317	MDRV_CPU_PROGRAM_MAP(csilver_map,0)
2348	2318
2349	2319	MDRV_CPU_ADD("sub", M6809, XTAL_12MHz/8) /* verified on pcb */
2350		MDRV_CPU_PROGRAM_MAP(csilver_sub_readmem,csilver_sub_writemem)
	2320	MDRV_CPU_PROGRAM_MAP(csilver_sub_map,0)
2351	2321	MDRV_CPU_VBLANK_INT("screen", nmi_line_pulse)
2352	2322
2353	2323	MDRV_CPU_ADD("audiocpu", M6502, XTAL_12MHz/8) /* verified on pcb */
2354		MDRV_CPU_PROGRAM_MAP(csilver_s_readmem,csilver_s_writemem)
	2324	MDRV_CPU_PROGRAM_MAP(csilver_s_map,0)
2355	2325	/* NMIs are caused by the main CPU */
2356	2326	MDRV_QUANTUM_TIME(HZ(6000))
2357	2327
r4679	r4680
2381	2351	MDRV_SOUND_ROUTE(3, "mono", 0.20)
2382	2352
2383	2353	MDRV_SOUND_ADD("ym2", YM3526, XTAL_12MHz/4) /* verified on pcb */
2384		MDRV_SOUND_CONFIG(oscar_ym3526_interface)
	2354	MDRV_SOUND_CONFIG(ym3526_config)
2385	2355	MDRV_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.70)
2386	2356
2387	2357	MDRV_SOUND_ADD("msm", MSM5205, XTAL_384kHz) /* verified on pcb */
r4679	r4680
2393	2363
2394	2364	/* basic machine hardware */
2395	2365	MDRV_CPU_ADD("maincpu", HD6309,3000000*4) /* HD63C09EP */
2396		MDRV_CPU_PROGRAM_MAP(garyoret_readmem,garyoret_writemem)
	2366	MDRV_CPU_PROGRAM_MAP(garyoret_map,0)
2397	2367	MDRV_CPU_VBLANK_INT("screen", gondo_interrupt)
2398	2368
2399	2369	MDRV_CPU_ADD("audiocpu", M6502, 1500000)
2400		MDRV_CPU_PROGRAM_MAP(dec8_s_readmem,oscar_s_writemem)
	2370	MDRV_CPU_PROGRAM_MAP(oscar_s_map,0)
2401	2371	/* NMIs are caused by the main CPU */
2402	2372
2403	2373	/* video hardware */
r4679	r4680
2506	2476	ROM_REGION( 2*0x10000, "audiocpu", 0 )   /* 64K for sound CPU + 64k for decrypted opcodes */
2507	2477	ROM_LOAD( "dz-06.rom", 0x8000, 0x8000, CRC(798f56df) SHA1(aee33cd0c102015114e17f6cb98945e7cc806f55) )
2508	2478
2509		ROM_REGION( 0x1000, "cpu2", 0 )   /* ID8751H MCU */
	2479	ROM_REGION( 0x1000, "mcu", 0 )   /* ID8751H MCU */
2510	2480	ROM_LOAD( "id8751h.mcu", 0x0000, 0x1000, NO_DUMP )
2511	2481
2512	2482	ROM_REGION( 0x08000, "gfx1", ROMREGION_DISPOSE )   /* characters */
r4679	r4680
2544	2514	ROM_REGION( 2*0x10000, "audiocpu", 0 )   /* 64K for sound CPU + 64k for decrypted opcodes */
2545	2515	ROM_LOAD( "dz-06.rom", 0x8000, 0x8000, CRC(798f56df) SHA1(aee33cd0c102015114e17f6cb98945e7cc806f55) )
2546	2516
2547		ROM_REGION( 0x1000, "cpu2", 0 )   /* ID8751H MCU */
	2517	ROM_REGION( 0x1000, "mcu", 0 )   /* ID8751H MCU */
2548	2518	ROM_LOAD( "id8751h.mcu", 0x0000, 0x1000, NO_DUMP )
2549	2519
2550	2520	ROM_REGION( 0x08000, "gfx1", ROMREGION_DISPOSE )   /* characters */
r4679	r4680
2667	2637	ROM_REGION( 0x10000, "audiocpu", 0 )
2668	2638	ROM_LOAD( "dw-05.5f", 0x8000, 0x8000, CRC(c28c4d82) SHA1(ad88506bcbc9763e39d6e6bb25ef2bd6aa929f30) )
2669	2639
2670		ROM_REGION( 0x1000, "cpu2", 0 )   /* ID8751H MCU */
2671		ROM_LOAD( "id8751h.mcu", 0x0000, 0x1000, NO_DUMP )
	2640	ROM_REGION( 0x1000, "mcu", 0 )   /* ID8751H MCU */
	2641	ROM_LOAD( "dw.1b", 0x0000, 0x1000, CRC(28e9ced9) SHA1(a3d6dfa1e44fa93c0f30fa0a88b6dd3d6e5c4dda) )
2672	2642
2673	2643	ROM_REGION( 0x08000, "gfx1", ROMREGION_DISPOSE )   /* characters */
2674	2644	ROM_LOAD( "dw-00.16b", 0x00000, 0x8000, CRC(3d25f15c) SHA1(590518460d069bc235b5efebec81731d7a2375de) )
r4679	r4680
2762	2732	ROM_REGION( 0x10000, "audiocpu", 0 )
2763	2733	ROM_LOAD( "27256.5f", 0x8000, 0x8000, CRC(c28c4d82) SHA1(ad88506bcbc9763e39d6e6bb25ef2bd6aa929f30) )
2764	2734
2765		ROM_REGION( 0x1000, "cpu2", 0 )   /* ID8751H MCU */
2766		ROM_LOAD( "id8751h.mcu", 0x0000, 0x1000, NO_DUMP )
	2735	ROM_REGION( 0x1000, "mcu", 0 )   /* ID8751H MCU */
	2736	ROM_LOAD( "dw.1b", 0x0000, 0x1000, CRC(28e9ced9) SHA1(a3d6dfa1e44fa93c0f30fa0a88b6dd3d6e5c4dda) )
2767	2737
2768	2738	ROM_REGION( 0x08000, "gfx1", ROMREGION_DISPOSE )   /* characters */
2769	2739	ROM_LOAD( "27256.16b", 0x00000, 0x8000, CRC(3d25f15c) SHA1(590518460d069bc235b5efebec81731d7a2375de) )
r4679	r4680
2798	2768	ROM_REGION( 2*0x10000, "audiocpu", 0 )   /* 64K for sound CPU + 64k for decrypted opcodes */
2799	2769	ROM_LOAD( "dy04.d7", 0x8000, 0x8000, CRC(2ae3591c) SHA1(f21b06d84e2c3d3895be0812024641fd006e45cf) )
2800	2770
2801		ROM_REGION( 0x1000, "cpu2", 0 )   /* ID8751H MCU */
	2771	ROM_REGION( 0x1000, "mcu", 0 )   /* ID8751H MCU */
2802	2772	ROM_LOAD( "id8751h.mcu", 0x0000, 0x1000, NO_DUMP )
2803	2773
2804	2774	ROM_REGION( 0x08000, "gfx1", ROMREGION_DISPOSE )   /* characters */
r4679	r4680
2835	2805	ROM_REGION( 2*0x10000, "audiocpu", 0 )   /* 64K for sound CPU + 64k for decrypted opcodes */
2836	2806	ROM_LOAD( "dy04.d7", 0x8000, 0x8000, CRC(2ae3591c) SHA1(f21b06d84e2c3d3895be0812024641fd006e45cf) )
2837	2807
2838		ROM_REGION( 0x1000, "cpu2", 0 )   /* ID8751H MCU */
	2808	ROM_REGION( 0x1000, "mcu", 0 )   /* ID8751H MCU */
2839	2809	ROM_LOAD( "id8751h.mcu", 0x0000, 0x1000, NO_DUMP )
2840	2810
2841	2811	ROM_REGION( 0x08000, "gfx1", ROMREGION_DISPOSE )   /* characters */
r4679	r4680
2873	2843	ROM_REGION( 0x10000, "audiocpu", 0 )
2874	2844	ROM_LOAD( "dt-05.256", 0x8000, 0x8000, CRC(ec08aa29) SHA1(ce83974ae095d9518d1ebf9f7e712f0cbc2c1b42) )
2875	2845
2876		ROM_REGION( 0x1000, "cpu2", 0 )   /* ID8751H MCU */
	2846	ROM_REGION( 0x1000, "mcu", 0 )   /* ID8751H MCU */
2877	2847	ROM_LOAD( "id8751h.mcu", 0x0000, 0x1000, NO_DUMP )
2878	2848
2879	2849	ROM_REGION( 0x08000, "gfx1", ROMREGION_DISPOSE )   /* characters */
r4679	r4680
2917	2887	ROM_REGION( 0x10000, "audiocpu", 0 )
2918	2888	ROM_LOAD( "ds05",      0x8000, 0x8000, CRC(e6e28ca9) SHA1(3b1f8219331db1910bfb428f8964f8fc1063df6f) )
2919	2889
2920		ROM_REGION( 0x1000, "cpu2", 0 )   /* ID8751H MCU */
	2890	ROM_REGION( 0x1000, "mcu", 0 )   /* ID8751H MCU */
2921	2891	ROM_LOAD( "id8751h.mcu", 0x0000, 0x1000, NO_DUMP )
2922	2892
2923	2893	ROM_REGION( 0x08000, "gfx1", ROMREGION_DISPOSE )   /* characters */
r4679	r4680
2967	2937	ROM_REGION( 2*0x10000, "audiocpu", 0 )   /* 64K for sound CPU + 64k for decrypted opcodes */
2968	2938	ROM_LOAD( "ed12", 0x8000, 0x8000, CRC(432031c5) SHA1(af2deea48b98eb0f9e85a4fb1486021f999f9abd) )
2969	2939
2970		ROM_REGION( 0x1000, "cpu3", 0 )   /* ID8751H MCU */
	2940	ROM_REGION( 0x1000, "mcu", 0 )   /* ID8751H MCU */
2971	2941	ROM_LOAD( "id8751h.mcu", 0x0000, 0x1000, NO_DUMP )
2972	2942
2973	2943	ROM_REGION( 0x08000, "gfx1", ROMREGION_DISPOSE )   /* characters */
r4679	r4680
2997	2967	ROM_REGION( 2*0x10000, "audiocpu", 0 )   /* 64K for sound CPU + 64k for decrypted opcodes */
2998	2968	ROM_LOAD( "ed12", 0x8000, 0x8000,  CRC(432031c5) SHA1(af2deea48b98eb0f9e85a4fb1486021f999f9abd) )
2999	2969
3000		ROM_REGION( 0x1000, "cpu3", 0 )   /* ID8751H MCU */
	2970	ROM_REGION( 0x1000, "mcu", 0 )   /* ID8751H MCU */
3001	2971	ROM_LOAD( "id8751h.mcu", 0x0000, 0x1000, NO_DUMP )
3002	2972
3003	2973	ROM_REGION( 0x08000, "gfx1", ROMREGION_DISPOSE )   /* characters */
r4679	r4680
3030	3000	ROM_REGION( 2*0x10000, "audiocpu", 0 )   /* 64K for sound CPU + 64k for decrypted opcodes */
3031	3001	ROM_LOAD( "ed12", 0x8000, 0x8000, CRC(432031c5) SHA1(af2deea48b98eb0f9e85a4fb1486021f999f9abd) )
3032	3002
3033		ROM_REGION( 0x1000, "cpu3", 0 )   /* ID8751H MCU */
	3003	ROM_REGION( 0x1000, "mcu", 0 )   /* ID8751H MCU */
3034	3004	ROM_LOAD( "id8751h.mcu", 0x0000, 0x1000, NO_DUMP )
3035	3005
3036	3006	ROM_REGION( 0x08000, "gfx1", ROMREGION_DISPOSE )   /* characters */
r4679	r4680
3063	3033	ROM_REGION( 2*0x10000, "audiocpu", 0 )   /* 64K for sound CPU + 64k for decrypted opcodes */
3064	3034	ROM_LOAD( "ed12", 0x8000, 0x8000, CRC(432031c5) SHA1(af2deea48b98eb0f9e85a4fb1486021f999f9abd) )
3065	3035
3066		ROM_REGION( 0x1000, "cpu3", 0 )   /* ID8751H MCU */
	3036	ROM_REGION( 0x1000, "mcu", 0 )   /* ID8751H MCU */
3067	3037	ROM_LOAD( "id8751h.mcu", 0x0000, 0x1000, NO_DUMP )
3068	3038
3069	3039	ROM_REGION( 0x08000, "gfx1", ROMREGION_DISPOSE )   /* characters */
r4679	r4680
3096	3066	ROM_REGION( 0x10000, "audiocpu", 0 )
3097	3067	ROM_LOAD( "dl05-.5h",    0x8000, 0x8000, CRC(1a5df8c0) SHA1(83d36b1d5fb87f50c44f3110804d6bbdbbc0da99) )
3098	3068
3099		ROM_REGION( 0x1000, "cpu3", 0 )   /* ID8751H MCU */
	3069	ROM_REGION( 0x1000, "mcu", 0 )   /* ID8751H MCU */
3100	3070	ROM_LOAD( "id8751h.mcu", 0x0000, 0x1000, NO_DUMP )
3101	3071
3102	3072	ROM_REGION( 0x08000, "gfx1", ROMREGION_DISPOSE )   /* characters */
r4679	r4680
3132	3102	ROM_REGION( 0x10000, "audiocpu", 0 )
3133	3103	ROM_LOAD( "dl05-.5h",    0x8000, 0x8000, CRC(1a5df8c0) SHA1(83d36b1d5fb87f50c44f3110804d6bbdbbc0da99) )
3134	3104
3135		ROM_REGION( 0x1000, "cpu3", 0 )   /* ID8751H MCU */
	3105	ROM_REGION( 0x1000, "mcu", 0 )   /* ID8751H MCU */
3136	3106	ROM_LOAD( "id8751h.mcu", 0x0000, 0x1000, NO_DUMP )
3137	3107
3138	3108	ROM_REGION( 0x08000, "gfx1", ROMREGION_DISPOSE )   /* characters */
r4679	r4680
3168	3138	ROM_REGION( 0x10000, "audiocpu", 0 )
3169	3139	ROM_LOAD( "dl05-.5h",    0x8000, 0x8000, CRC(1a5df8c0) SHA1(83d36b1d5fb87f50c44f3110804d6bbdbbc0da99) )
3170	3140
3171		ROM_REGION( 0x1000, "cpu3", 0 )   /* ID8751H MCU */
	3141	ROM_REGION( 0x1000, "mcu", 0 )   /* ID8751H MCU */
3172	3142	ROM_LOAD( "id8751h.mcu", 0x0000, 0x1000, NO_DUMP )
3173	3143
3174	3144	ROM_REGION( 0x08000, "gfx1", ROMREGION_DISPOSE )   /* characters */
r4679	r4680
3207	3177	ROM_REGION( 0x10000, "audiocpu", 0 )
3208	3178	ROM_LOAD( "dk-07.rom", 0x08000, 0x08000, CRC(887e4bcc) SHA1(6427396080e9cd8647adff47c8ed04593a14268c) )
3209	3179
3210		ROM_REGION( 0x1000, "cpu3", 0 )   /* ID8751H MCU */
	3180	ROM_REGION( 0x1000, "mcu", 0 )   /* ID8751H MCU */
3211	3181	ROM_LOAD( "id8751h.mcu", 0x0000, 0x1000, NO_DUMP )
3212	3182
3213	3183	ROM_REGION( 0x08000, "gfx1", ROMREGION_DISPOSE )   /* characters */
r4679	r4680
3244	3214	ROM_REGION( 0x10000, "audiocpu", 0 )
3245	3215	ROM_LOAD( "2.bin", 0x8000, 0x8000,  CRC(4a471c38) SHA1(963ed7b6afeefdfc2cf0d65b0998f973330e6495) )
3246	3216
3247		ROM_REGION( 0x1000, "cpu3", 0 )   /* ID8751H MCU */
	3217	ROM_REGION( 0x1000, "mcu", 0 )   /* ID8751H MCU */
3248	3218	ROM_LOAD( "id8751h.mcu", 0x0000, 0x1000, NO_DUMP )
3249	3219
3250	3220	ROM_REGION( 0x08000, "gfx1", ROMREGION_DISPOSE )   /* characters */
r4679	r4680
3327	3297	ROM_LOAD( "dx05.3f", 0x10000, 0x08000,  CRC(eb32cf25) SHA1(9390c88033259c65eb15320e31f5d696970987cc) )
3328	3298	ROM_CONTINUE(   0x08000, 0x08000 )
3329	3299
3330		ROM_REGION( 0x1000, "cpu3", 0 )   /* ID8751H MCU */
	3300	ROM_REGION( 0x1000, "mcu", 0 )   /* ID8751H MCU */
3331	3301	ROM_LOAD( "id8751h.mcu", 0x0000, 0x1000, NO_DUMP ) // dx-8.19a ?
3332	3302
3333	3303	ROM_REGION( 0x08000, "gfx1", ROMREGION_DISPOSE )   /* characters */
r4679	r4680
3365	3335	ROM_LOAD( "dx05.a6", 0x10000, 0x08000,  CRC(eb32cf25) SHA1(9390c88033259c65eb15320e31f5d696970987cc) )
3366	3336	ROM_CONTINUE(   0x08000, 0x08000 )
3367	3337
3368		ROM_REGION( 0x1000, "cpu3", 0 )   /* ID8751H MCU */
	3338	ROM_REGION( 0x1000, "mcu", 0 )   /* ID8751H MCU */
3369	3339	ROM_LOAD( "id8751h.mcu", 0x0000, 0x1000, NO_DUMP )
3370	3340
3371	3341	ROM_REGION( 0x08000, "gfx1", ROMREGION_DISPOSE )   /* characters */
r4679	r4680
3400	3370	ROM_REGION( 0x10000, "audiocpu", 0 )
3401	3371	ROM_LOAD( "dv05", 0x08000, 0x08000, CRC(c97c347f) SHA1(a1b22733dc15d524af97db3e608a82503a49b182) )
3402	3372
3403		ROM_REGION( 0x1000, "cpu2", 0 )   /* ID8751H MCU */
	3373	ROM_REGION( 0x1000, "mcu", 0 )   /* ID8751H MCU */
3404	3374	ROM_LOAD( "id8751h.mcu", 0x0000, 0x1000, NO_DUMP )
3405	3375
3406	3376	ROM_REGION( 0x08000, "gfx1", ROMREGION_DISPOSE )   /* characters */
r4679	r4680
3450	3420
3451	3421	/* bits 5 and 6 of the opcodes are swapped */
3452	3422	rom = memory_region(machine, "audiocpu");
3453		decrypt = auto_malloc(0x8000);
	3423	decrypt = auto_alloc_array(machine, UINT8, 0x8000);
3454	3424
3455	3425	memory_set_decrypted_region(space, 0x8000, 0xffff, decrypt);
3456	3426
r4679	r4680
3477	3447	GAME( 1988, cobracmj, cobracom, cobracom, cobracom, 0,       ROT0,   "Data East Corporation", "Cobra-Command (Japan)", 0 )
3478	3448	GAME( 1987, ghostb,   0,        ghostb,   ghostb,   ghostb,  ROT0,   "Data East USA", "The Real Ghostbusters (US 2 Players)", 0 )
3479	3449	GAME( 1987, ghostb3,  ghostb,   ghostb,   ghostb3,  ghostb,  ROT0,   "Data East USA", "The Real Ghostbusters (US 3 Players)", 0 )
3480		GAME( 1987, meikyuh,  ghostb,   ghostb,   ghostb,   meikyuh, ROT0,   "Data East Corporation", "Meikyuu Hunter G (Japan, set 1)", 0 )
3481		GAME( 1987, meikyuha, ghostb,   ghostb,   ghostb,   meikyuh, ROT0,   "Data East Corporation", "Meikyuu Hunter G (Japan, set 2)", 0 )
	3450	GAME( 1987, meikyuh,  ghostb,   meikyuh,  meikyuh,  meikyuh, ROT0,   "Data East Corporation", "Meikyuu Hunter G (Japan, set 1)", 0 )
	3451	GAME( 1987, meikyuha, ghostb,   meikyuh,  meikyuh,  meikyuh, ROT0,   "Data East Corporation", "Meikyuu Hunter G (Japan, set 2)", 0 )
3482	3452	GAME( 1987, srdarwin, 0,        srdarwin, srdarwin, deco222, ROT270, "Data East Corporation", "Super Real Darwin (World)", 0 )
3483	3453	GAME( 1987, srdarwnj, srdarwin, srdarwin, srdarwin, deco222, ROT270, "Data East Corporation", "Super Real Darwin (Japan)", 0 )
3484	3454	GAME( 1987, gondo,    0,        gondo,    gondo,    0,       ROT270, "Data East USA", "Gondomania (US)", 0 )

src/mame/drivers/rcorsair.c

r4679	r4680
1	1	/* Red Corsair */
2	2
	3	/* skeleton driver */
3	4	/* This driver is not being worked on by the original author.
4	5	Somebody will probably need to do extensive research on the
5	6	PCB to establish what the custom block actually contains,
r4679	r4680
53	54	#include "driver.h"
54	55	#include "cpu/i8085/i8085.h"
55	56
56		static ADDRESS_MAP_START( readmem, ADDRESS_SPACE_PROGRAM, 8 )
57		AM_RANGE(0x0000, 0x1fff) AM_READ(SMH_ROM)
	57	static ADDRESS_MAP_START( rcorsair_map, ADDRESS_SPACE_PROGRAM, 8 )
	58	AM_RANGE(0x0000, 0x1fff) AM_ROM
58	59	ADDRESS_MAP_END
59	60
60		static ADDRESS_MAP_START( writemem, ADDRESS_SPACE_PROGRAM, 8 )
61		AM_RANGE(0x0000, 0x1fff) AM_WRITE(SMH_ROM)
62		ADDRESS_MAP_END
63
64	61	static INPUT_PORTS_START( inports )
65	62	PORT_START("IN0")
66	63	PORT_DIPNAME(   0x01, 0x01, DEF_STR( Unknown ) )
r4679	r4680
120	117	program code, unknown type */
121	118
122	119	MDRV_CPU_ADD("maincpu", 8085A,8000000)       /* Sound CPU? */
123		MDRV_CPU_PROGRAM_MAP(readmem,writemem)
	120	MDRV_CPU_PROGRAM_MAP(rcorsair_map,0)
124	121	//  MDRV_CPU_VBLANK_INT("screen", irq0_line_hold)
125	122
126	123	MDRV_SCREEN_ADD("screen", RASTER)

src/mame/drivers/slotcarn.c

r4679	r4680
145	145
146	146	static MC6845_ON_VSYNC_CHANGED(vsync_changed)
147	147	{
148		cpu_set_input_line(device->machine->cpu[0], 0, vsync ? ASSERT_LINE : CLEAR_LINE);
	148	cputag_set_input_line(device->machine, "maincpu", 0, vsync ? ASSERT_LINE : CLEAR_LINE);
149	149	}
150	150
151	151	static const mc6845_interface mc6845_intf =
r4679	r4680
532	532
533	533	static MACHINE_START(merit)
534	534	{
535		ram_palette = auto_malloc(RAM_PALETTE_SIZE);
	535	ram_palette = auto_alloc_array(machine, UINT8, RAM_PALETTE_SIZE);
536	536	state_save_register_global_pointer(machine, ram_palette, RAM_PALETTE_SIZE);
537	537	}
538	538

src/mame/drivers/tbowl.c

r4679	r4680
68	68	bankaddress = 0x10000 + ((data & 0xf8) << 8);
69	69
70	70
71		memory_set_bankptr(space->machine, 2,&RAM[bankaddress]);
	71	memory_set_bankptr(space->machine, 2, &RAM[bankaddress]);
72	72	}
73	73
74	74	/*** Shared Ram Handlers
r4679	r4680
87	87
88	88	static WRITE8_HANDLER( tbowl_sound_command_w )
89	89	{
90		soundlatch_w(space,offset,data);
91		cpu_set_input_line(space->machine->cpu[2],INPUT_LINE_NMI,PULSE_LINE);
	90	soundlatch_w(space, offset, data);
	91	cputag_set_input_line(space->machine, "audiocpu", INPUT_LINE_NMI, PULSE_LINE);
92	92	}
93	93
94	94
r4679	r4680
110	110	AM_RANGE(0xc000, 0xdfff) AM_RAM_WRITE(tbowl_bgvideoram_w) AM_BASE(&tbowl_bgvideoram)
111	111	AM_RANGE(0xe000, 0xefff) AM_RAM_WRITE(tbowl_txvideoram_w) AM_BASE(&tbowl_txvideoram)
112	112	//  AM_RANGE(0xf000, 0xf000) AM_WRITE(unknown_write) * written during start-up, not again */
113		AM_RANGE(0xf000, 0xf7ff) AM_READWRITE(SMH_BANK1, SMH_ROM)
	113	AM_RANGE(0xf000, 0xf7ff) AM_READWRITE(SMH_BANK(1), SMH_ROM)
114	114	AM_RANGE(0xf800, 0xfbff) AM_READWRITE(shared_r, shared_w) AM_BASE(&shared_ram) /* check */
115	115	AM_RANGE(0xfc00, 0xfc00) AM_READ_PORT("P1") AM_WRITE(tbowlb_bankswitch_w)
116	116	AM_RANGE(0xfc01, 0xfc01) AM_READ_PORT("P2")
r4679	r4680
141	141	static WRITE8_HANDLER ( tbowl_trigger_nmi )
142	142	{
143	143	/* trigger NMI on 6206B's Cpu? (guess but seems to work..) */
144		cpu_set_input_line(space->machine->cpu[0], INPUT_LINE_NMI, PULSE_LINE);
	144	cputag_set_input_line(space->machine, "maincpu", INPUT_LINE_NMI, PULSE_LINE);
145	145	}
146	146
147	147	static ADDRESS_MAP_START( 6206C_map, ADDRESS_SPACE_PROGRAM, 8 )
r4679	r4680
150	150	AM_RANGE(0xc000, 0xd7ff) AM_WRITE(SMH_RAM)
151	151	AM_RANGE(0xd800, 0xdfff) AM_WRITE(SMH_RAM) AM_BASE(&tbowl_spriteram)
152	152	AM_RANGE(0xe000, 0xefff) AM_RAM_WRITE(paletteram_xxxxBBBBRRRRGGGG_be_w) AM_BASE(&paletteram) // 2x palettes, one for each monitor?
153		AM_RANGE(0xf000, 0xf7ff) AM_READWRITE(SMH_BANK2, SMH_ROM)
	153	AM_RANGE(0xf000, 0xf7ff) AM_READWRITE(SMH_BANK(2), SMH_ROM)
154	154	AM_RANGE(0xf800, 0xfbff) AM_READWRITE(shared_r, shared_w)
155	155	AM_RANGE(0xfc00, 0xfc00) AM_WRITE(tbowlc_bankswitch_w)
156	156	AM_RANGE(0xfc01, 0xfc01) AM_WRITENOP /* ? */
r4679	r4680
444	444
445	445	static void irqhandler(const device_config *device, int linestate)
446	446	{
447		cpu_set_input_line(device->machine->cpu[2],0,linestate);
	447	cputag_set_input_line(device->machine, "audiocpu", 0, linestate);
448	448	}
449	449
450	450	static const ym3812_interface ym3812_config =

src/mame/drivers/battlane.c

r4679	r4680
59	59	/*
60	60	if (~battlane_cpu_control & 0x08)
61	61	{
62		cpu_set_input_line(space->machine->cpu[0], INPUT_LINE_NMI, PULSE_LINE);
63		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_NMI, PULSE_LINE);
	62	cputag_set_input_line(space->machine, "maincpu", INPUT_LINE_NMI, PULSE_LINE);
	63	cputag_set_input_line(space->machine, "sub", INPUT_LINE_NMI, PULSE_LINE);
64	64	}
65	65	*/
66	66
r4679	r4680
68	68	CPU2's SWI will trigger an 6809 IRQ on the master by resetting 0x04
69	69	Master will respond by setting the bit back again
70	70	*/
71		cpu_set_input_line(space->machine->cpu[0], M6809_IRQ_LINE,  data & 0x04 ? CLEAR_LINE : HOLD_LINE);
	71	cputag_set_input_line(space->machine, "maincpu", M6809_IRQ_LINE,  data & 0x04 ? CLEAR_LINE : HOLD_LINE);
72	72
73	73	/*
74	74	Slave function call (e.g. ROM test):
r4679	r4680
86	86	FA96: 27 FA       BEQ   $FA92   ; Wait for bit to be set
87	87	*/
88	88
89		cpu_set_input_line(space->machine->cpu[1], M6809_IRQ_LINE, data & 0x02 ? CLEAR_LINE : HOLD_LINE);
	89	cputag_set_input_line(space->machine, "sub", M6809_IRQ_LINE, data & 0x02 ? CLEAR_LINE : HOLD_LINE);
90	90	}
91	91
92	92	static ADDRESS_MAP_START( battlane_map, ADDRESS_SPACE_PROGRAM, 8 )
r4679	r4680
110	110	if (~battlane_cpu_control & 0x08)
111	111	{
112	112	cpu_set_input_line(device, INPUT_LINE_NMI, PULSE_LINE);
113		cpu_set_input_line(device->machine->cpu[1], INPUT_LINE_NMI, PULSE_LINE);
	113	cputag_set_input_line(device->machine, "sub", INPUT_LINE_NMI, PULSE_LINE);
114	114	}
115	115	}
116	116
r4679	r4680
242	242
243	243	static void irqhandler(const device_config *device, int irq)
244	244	{
245		cpu_set_input_line(device->machine->cpu[0], M6809_FIRQ_LINE, irq ? ASSERT_LINE : CLEAR_LINE);
	245	cputag_set_input_line(device->machine, "maincpu", M6809_FIRQ_LINE, irq ? ASSERT_LINE : CLEAR_LINE);
246	246	}
247	247
248	248	static const ym3526_interface ym3526_config =

src/mame/drivers/atarigt.c

r4679	r4680
56	56
57	57	static void update_interrupts(running_machine *machine)
58	58	{
59		cpu_set_input_line(machine->cpu[0], 3, atarigen_sound_int_state    ? ASSERT_LINE : CLEAR_LINE);
60		cpu_set_input_line(machine->cpu[0], 4, atarigen_video_int_state    ? ASSERT_LINE : CLEAR_LINE);
61		cpu_set_input_line(machine->cpu[0], 6, atarigen_scanline_int_state ? ASSERT_LINE : CLEAR_LINE);
	59	cputag_set_input_line(machine, "maincpu", 3, atarigen_sound_int_state    ? ASSERT_LINE : CLEAR_LINE);
	60	cputag_set_input_line(machine, "maincpu", 4, atarigen_video_int_state    ? ASSERT_LINE : CLEAR_LINE);
	61	cputag_set_input_line(machine, "maincpu", 6, atarigen_scanline_int_state ? ASSERT_LINE : CLEAR_LINE);
62	62	}
63	63
64	64
r4679	r4680
79	79
80	80	static void cage_irq_callback(running_machine *machine, int reason)
81	81	{
82		const address_space *space = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM);
	82	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
83	83
84	84	if (reason)
85		atarigen_sound_int_gen(machine->cpu[0]);
	85	atarigen_sound_int_gen(cputag_get_cpu(machine, "maincpu"));
86	86	else
87	87	atarigen_sound_int_ack_w(space,0,0,0xffff);
88	88	}
r4679	r4680
1250	1250	protection_w = tmek_protection_w;
1251	1251
1252	1252	/* temp hack */
1253		memory_install_write32_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xd72000, 0xd75fff, 0, 0, tmek_pf_w);
	1253	memory_install_write32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xd72000, 0xd75fff, 0, 0, tmek_pf_w);
1254	1254	}
1255	1255
1256	1256

src/mame/drivers/bigfghtr.c

r4679	r4680
274	274
275	275	static VIDEO_EOF( bigfghtr )
276	276	{
277		const address_space *space = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM);
278		buffer_spriteram16_w(space,0,0,0xffff);
	277	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
	278	buffer_spriteram16_w(space, 0, 0, 0xffff);
279	279	}
280	280
281	281
r4679	r4680
624	624
625	625	GAME( 1989, skyrobo,        0, bigfghtr, bigfghtr, skyrobo,  ROT0, "Nichibutsu", "Sky Robo",GAME_NOT_WORKING | GAME_UNEMULATED_PROTECTION)
626	626	GAME( 1989, bigfghtr, skyrobo, bigfghtr, bigfghtr, bigfghtr, ROT0, "Nichibutsu", "Tatakae! Big Fighter",GAME_NOT_WORKING | GAME_UNEMULATED_PROTECTION)
627

src/mame/drivers/genesis.c

r4679	r4680
15	15	#include "cpu/z80/z80.h"
16	16	#include "cpu/m68000/m68000.h"
17	17	#include "sound/2612intf.h"
	18	#include "sound/sn76496.h"
	19
18	20	#include "genesis.h"
19	21
20	22	#define MASTER_CLOCK      53693100
r4679	r4680
72	74	/* call this whenever the interrupt state has changed */
73	75	static void update_interrupts(running_machine *machine)
74	76	{
75		cpu_set_input_line(machine->cpu[0], 2, irq2_int ? ASSERT_LINE : CLEAR_LINE);
76		cpu_set_input_line(machine->cpu[0], 4, scanline_int ? ASSERT_LINE : CLEAR_LINE);
77		cpu_set_input_line(machine->cpu[0], 6, vblank_int ? ASSERT_LINE : CLEAR_LINE);
	77	cputag_set_input_line(machine, "maincpu", 2, irq2_int ? ASSERT_LINE : CLEAR_LINE);
	78	cputag_set_input_line(machine, "maincpu", 4, scanline_int ? ASSERT_LINE : CLEAR_LINE);
	79	cputag_set_input_line(machine, "maincpu", 6, vblank_int ? ASSERT_LINE : CLEAR_LINE);
78	80	}
79	81
80	82
r4679	r4680
151	153	MACHINE_RESET( genesis )
152	154	{
153	155	/* C2 doesn't have a Z80, so we can't just assume */
154		if (machine->cpu[1] != NULL && cpu_get_type(machine->cpu[1]) == CPU_Z80)
	156	if (cputag_get_cpu(machine, "genesis_snd_z80") != NULL && cpu_get_type(cputag_get_cpu(machine, "genesis_snd_z80")) == CPU_Z80)
155	157	{
156	158	/* the following ensures that the Z80 begins without running away from 0 */
157	159	/* 0x76 is just a forced 'halt' as soon as the CPU is initially run */
158	160	genesis_z80_ram[0] = 0x76;
159	161	genesis_z80_ram[0x38] = 0x76;
160	162
161		cpu_set_input_line(machine->cpu[1], INPUT_LINE_HALT, ASSERT_LINE);
	163	cputag_set_input_line(machine, "genesis_snd_z80", INPUT_LINE_HALT, ASSERT_LINE);
162	164
163	165	z80running = 0;
164	166	}
r4679	r4680
206	208	if (data == 0x100)
207	209	{
208	210	z80running = 0;
209		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_HALT, ASSERT_LINE);   /* halt Z80 */
	211	cputag_set_input_line(space->machine, "genesis_snd_z80", INPUT_LINE_HALT, ASSERT_LINE);   /* halt Z80 */
210	212	/* logerror("z80 stopped by 68k BusReq\n"); */
211	213	}
212	214	else
r4679	r4680
214	216	z80running = 1;
215	217	//          memory_set_bankptr(space->machine, 1, &genesis_z80_ram[0]);
216	218
217		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_HALT, CLEAR_LINE);
	219	cputag_set_input_line(space->machine, "genesis_snd_z80", INPUT_LINE_HALT, CLEAR_LINE);
218	220	/* logerror("z80 started, BusReq ends\n"); */
219	221	}
220	222	return;
221	223	case 0x100:                  /* Z80 CPU Reset */
222	224	if (data == 0x00)
223	225	{
224		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_HALT, ASSERT_LINE);
225		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_RESET, PULSE_LINE);
	226	cputag_set_input_line(space->machine, "genesis_snd_z80", INPUT_LINE_HALT, ASSERT_LINE);
	227	cputag_set_input_line(space->machine, "genesis_snd_z80", INPUT_LINE_RESET, PULSE_LINE);
226	228
227		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_HALT, ASSERT_LINE);
	229	cputag_set_input_line(space->machine, "genesis_snd_z80", INPUT_LINE_HALT, ASSERT_LINE);
228	230	/* logerror("z80 reset, ram is %p\n", &genesis_z80_ram[0]); */
229	231	z80running = 0;
230	232	return;
r4679	r4680
465	467	}
466	468
467	469	#if 0
468		static ADDRESS_MAP_START( genesis_readmem, ADDRESS_SPACE_PROGRAM, 16 )
469		AM_RANGE(0x000000, 0x3fffff) AM_READ(SMH_ROM)               /* Cartridge Program Rom */
470		AM_RANGE(0xa10000, 0xa1001f) AM_READ(genesis_io_r)            /* Genesis Input */
471		AM_RANGE(0xa00000, 0xa0ffff) AM_READ(genesis_68k_to_z80_r)
472		AM_RANGE(0xc00000, 0xc0001f) AM_READ(genesis_vdp_r)            /* VDP Access */
473		AM_RANGE(0xfe0000, 0xfeffff) AM_READ(SMH_BANK3)            /* Main Ram */
474		AM_RANGE(0xff0000, 0xffffff) AM_READ(SMH_RAM)               /* Main Ram */
475		ADDRESS_MAP_END
476
477
478		static ADDRESS_MAP_START( genesis_writemem, ADDRESS_SPACE_PROGRAM, 16 )
479		AM_RANGE(0x000000, 0x3fffff) AM_WRITE(SMH_ROM)               /* Cartridge Program Rom */
480		AM_RANGE(0xa10000, 0xa1001f) AM_WRITE(genesis_io_w) AM_BASE(&genesis_io_ram)            /* Genesis Input */
	470	static ADDRESS_MAP_START( genesis_map, ADDRESS_SPACE_PROGRAM, 16 )
	471	AM_RANGE(0x000000, 0x3fffff) AM_ROM                                                /* Cartridge Program Rom */
	472	AM_RANGE(0xa00000, 0xa0ffff) AM_READWRITE(genesis_68k_to_z80_r, genesis_68k_to_z80_w)
	473	AM_RANGE(0xa10000, 0xa1001f) AM_READWRITE(genesis_io_r, genesis_io_w) AM_BASE(&genesis_io_ram)   /* Genesis Input */
481	474	AM_RANGE(0xa11000, 0xa11203) AM_WRITE(genesis_ctrl_w)
482		AM_RANGE(0xa00000, 0xa0ffff) AM_WRITE(genesis_68k_to_z80_w)
483		AM_RANGE(0xc00000, 0xc0001f) AM_WRITE(genesis_vdp_w)            /* VDP Access */
484		AM_RANGE(0xfe0000, 0xfeffff) AM_WRITE(SMH_BANK3)            /* Main Ram */
485		AM_RANGE(0xff0000, 0xffffff) AM_WRITE(SMH_RAM) AM_BASE(&genesis_68k_ram)/* Main Ram */
	475	AM_RANGE(0xc00000, 0xc0001f) AM_READWRITE(genesis_vdp_r, genesis_vdp_w)                     /* VDP Access */
	476	AM_RANGE(0xfe0000, 0xfeffff) AM_RAMBANK(3)                                          /* Main Ram */
	477	AM_RANGE(0xff0000, 0xffffff) AM_RAM AM_BASE(&genesis_68k_ram)                           /* Main Ram */
486	478	ADDRESS_MAP_END
487	479	#endif
488	480
r4679	r4680
586	578
587	579
588	580	#if 0
589		static ADDRESS_MAP_START( genesis_z80_readmem, ADDRESS_SPACE_PROGRAM, 8 )
590		AM_RANGE(0x0000, 0x1fff) AM_READ(SMH_BANK1)
591		AM_RANGE(0x2000, 0x3fff) AM_READ(SMH_BANK2) /* mirror */
592		AM_RANGE(0x4000, 0x7fff) AM_READ(genesis_z80_r)
	581	static ADDRESS_MAP_START( genesis_z80_map, ADDRESS_SPACE_PROGRAM, 8 )
	582	AM_RANGE(0x0000, 0x1fff) AM_RAMBANK(1) AM_BASE(&genesis_z80_ram)
	583	AM_RANGE(0x2000, 0x3fff) AM_RAMBANK(2)   /* mirror */
	584	AM_RANGE(0x4000, 0x7fff) AM_READWRITE(genesis_z80_r, genesis_z80_w)
593	585	AM_RANGE(0x8000, 0xffff) AM_READ(genesis_z80_bank_r)
594		ADDRESS_MAP_END
595
596		static ADDRESS_MAP_START( genesis_z80_writemem, ADDRESS_SPACE_PROGRAM, 8 )
597		AM_RANGE(0x0000, 0x1fff) AM_WRITE(SMH_BANK1) AM_BASE(&genesis_z80_ram)
598		AM_RANGE(0x2000, 0x3fff) AM_WRITE(SMH_BANK2) /* mirror */
599		AM_RANGE(0x4000, 0x7fff) AM_WRITE(genesis_z80_w)
600	586	// AM_RANGE(0x8000, 0xffff) AM_WRITE(genesis_z80_bank_w)
601	587	ADDRESS_MAP_END
602	588
603	589	static MACHINE_DRIVER_START( genesis_base )
604	590	/*basic machine hardware */
605	591	MDRV_CPU_ADD("maincpu", M68000, MASTER_CLOCK / 7)
606		MDRV_CPU_PROGRAM_MAP(genesis_readmem, genesis_writemem)
	592	MDRV_CPU_PROGRAM_MAP(genesis_map,0)
607	593	MDRV_CPU_VBLANK_INT("screen", genesis_vblank_interrupt)
608	594
609	595	MDRV_CPU_ADD("soundcpu", Z80, MASTER_CLOCK / 15)
610		MDRV_CPU_PROGRAM_MAP(genesis_z80_readmem, genesis_z80_writemem)
	596	MDRV_CPU_PROGRAM_MAP(genesis_z80_map,0)
611	597	MDRV_CPU_VBLANK_INT("screen", irq0_line_hold) /* from vdp at scanline 0xe0 */
612	598
613	599	MDRV_QUANTUM_TIME(HZ(6000))

src/mame/drivers/thepit.c

r4679	r4680
1046	1046	static DRIVER_INIT( rtriv )
1047	1047	{
1048	1048	// Set-up the weirdest questions read ever done
1049		memory_install_read8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x4000, 0x4fff, 0, 0, rtriv_question_r);
	1049	memory_install_read8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x4000, 0x4fff, 0, 0, rtriv_question_r);
1050	1050	}
1051	1051
1052	1052

src/mame/drivers/trvmadns.c

r4679	r4680
184	184	{
185	185	if(cpu_get_previouspc(space->cpu)==0x29e9)// || cpu_get_previouspc(space->cpu)==0x1b3f) //29f5
186	186	{
187		cpu_set_input_line(space->machine->cpu[0], 0, HOLD_LINE);
	187	cputag_set_input_line(space->machine, "maincpu", 0, HOLD_LINE);
188	188	}
189	189	//      else
190	190	//          printf("%x \n", cpu_get_previouspc(space->cpu));
r4679	r4680
198	198
199	199	static ADDRESS_MAP_START( cpu_map, ADDRESS_SPACE_PROGRAM, 8 )
200	200	AM_RANGE(0x0000, 0x5fff) AM_ROM
201		AM_RANGE(0x6000, 0x6fff) AM_READ(SMH_BANK1)
202		AM_RANGE(0x7000, 0x7fff) AM_READ(SMH_BANK2)
	201	AM_RANGE(0x6000, 0x6fff) AM_READ(SMH_BANK(1))
	202	AM_RANGE(0x7000, 0x7fff) AM_READ(SMH_BANK(2))
203	203	AM_RANGE(0x6000, 0x7fff) AM_WRITE(trvmadns_gfxram_w) AM_BASE(&trvmadns_gfxram)
204	204	AM_RANGE(0x8000, 0x87ff) AM_RAM
205	205	AM_RANGE(0xc000, 0xc01f) AM_RAM_WRITE(paletteram_xxxxBBBBRRRRGGGG_le_w) AM_BASE(&paletteram)

src/mame/drivers/cloud9.c

r4679	r4680
141	141	/* assert the IRQ if not already asserted */
142	142	if (!irq_state)
143	143	{
144		cpu_set_input_line(machine->cpu[0], 0, ASSERT_LINE);
	144	cputag_set_input_line(machine, "maincpu", 0, ASSERT_LINE);
145	145	irq_state = 1;
146	146	}
147	147
r4679	r4680
202	202	schedule_next_irq(machine, 0-64);
203	203
204	204	/* allocate backing memory for the NVRAM */
205		generic_nvram = auto_malloc(generic_nvram_size);
	205	generic_nvram = auto_alloc_array(machine, UINT8, generic_nvram_size);
206	206
207	207	/* setup for save states */
208	208	state_save_register_global(machine, irq_state);
r4679	r4680
212	212
213	213	static MACHINE_RESET( cloud9 )
214	214	{
215		cpu_set_input_line(machine->cpu[0], 0, CLEAR_LINE);
	215	cputag_set_input_line(machine, "maincpu", 0, CLEAR_LINE);
216	216	irq_state = 0;
217	217	}
218	218
r4679	r4680
228	228	{
229	229	if (irq_state)
230	230	{
231		cpu_set_input_line(space->machine->cpu[0], 0, CLEAR_LINE);
	231	cputag_set_input_line(space->machine, "maincpu", 0, CLEAR_LINE);
232	232	irq_state = 0;
233	233	}
234	234	}
r4679	r4680
303	303	static ADDRESS_MAP_START( cloud9_map, ADDRESS_SPACE_PROGRAM, 8 )
304	304	AM_RANGE(0x0000, 0x0001) AM_WRITE(cloud9_bitmode_addr_w)
305	305	AM_RANGE(0x0002, 0x0002) AM_READWRITE(cloud9_bitmode_r, cloud9_bitmode_w)
306		AM_RANGE(0x0000, 0x4fff) AM_READWRITE(SMH_BANK1, cloud9_videoram_w)
	306	AM_RANGE(0x0000, 0x4fff) AM_READWRITE(SMH_BANK(1), cloud9_videoram_w)
307	307	AM_RANGE(0x5000, 0x53ff) AM_RAM AM_BASE(&spriteram)
308	308	AM_RANGE(0x5400, 0x547f) AM_WRITE(watchdog_reset_w)
309	309	AM_RANGE(0x5480, 0x54ff) AM_WRITE(irq_ack_w)

src/mame/drivers/rpunch.c

r4679	r4680
147	147	static void ym2151_irq_gen(const device_config *device, int state)
148	148	{
149	149	ym2151_irq = state;
150		cpu_set_input_line(device->machine->cpu[1], 0, (ym2151_irq | sound_busy) ? ASSERT_LINE : CLEAR_LINE);
	150	cputag_set_input_line(device->machine, "audiocpu", 0, (ym2151_irq | sound_busy) ? ASSERT_LINE : CLEAR_LINE);
151	151	}
152	152
153	153
r4679	r4680
181	181	{
182	182	sound_busy = 1;
183	183	sound_data = param;
184		cpu_set_input_line(machine->cpu[1], 0, (ym2151_irq | sound_busy) ? ASSERT_LINE : CLEAR_LINE);
	184	cputag_set_input_line(machine, "audiocpu", 0, (ym2151_irq | sound_busy) ? ASSERT_LINE : CLEAR_LINE);
185	185	}
186	186
187	187
r4679	r4680
195	195	static READ8_HANDLER( sound_command_r )
196	196	{
197	197	sound_busy = 0;
198		cpu_set_input_line(space->machine->cpu[1], 0, (ym2151_irq | sound_busy) ? ASSERT_LINE : CLEAR_LINE);
	198	cputag_set_input_line(space->machine, "audiocpu", 0, (ym2151_irq | sound_busy) ? ASSERT_LINE : CLEAR_LINE);
199	199	return sound_data;
200	200	}
201	201

src/mame/drivers/bingoc.c

r4679	r4680
77	77	static WRITE16_HANDLER( main_sound_latch_w )
78	78	{
79	79	soundlatch_w(space,0,data&0xff);
80		cpu_set_input_line(space->machine->cpu[1],INPUT_LINE_NMI,PULSE_LINE);
	80	cputag_set_input_line(space->machine, "soundcpu", INPUT_LINE_NMI, PULSE_LINE);
81	81	}
82	82	#endif
83	83
r4679	r4680
180	180	ROM_END
181	181
182	182	GAME( 1989, bingoc,  0,    bingoc, bingoc,  0, ROT0, "Sega", "Bingo Circus (Rev. A 891001)", GAME_NOT_WORKING )
183

src/mame/drivers/changela.c

r4679	r4680
130	130	}
131	131
132	132
133		static ADDRESS_MAP_START( mcu_readmem, ADDRESS_SPACE_PROGRAM, 8 )
	133	static ADDRESS_MAP_START( mcu_map, ADDRESS_SPACE_PROGRAM, 8 )
134	134	ADDRESS_MAP_GLOBAL_MASK(0x7ff)
135		AM_RANGE(0x0000, 0x0000) AM_READ(changela_68705_portA_r)
136		AM_RANGE(0x0001, 0x0001) AM_READ(changela_68705_portB_r)
137		AM_RANGE(0x0002, 0x0002) AM_READ(changela_68705_portC_r)
	135	AM_RANGE(0x0000, 0x0000) AM_READWRITE(changela_68705_portA_r, changela_68705_portA_w)
	136	AM_RANGE(0x0001, 0x0001) AM_READWRITE(changela_68705_portB_r, changela_68705_portB_w)
	137	AM_RANGE(0x0002, 0x0002) AM_READWRITE(changela_68705_portC_r, changela_68705_portC_w)
138	138
139		AM_RANGE(0x0000, 0x007f) AM_READ(SMH_RAM)
140		AM_RANGE(0x0080, 0x07ff) AM_READ(SMH_ROM)
141		ADDRESS_MAP_END
142
143		static ADDRESS_MAP_START( mcu_writemem, ADDRESS_SPACE_PROGRAM, 8 )
144		ADDRESS_MAP_GLOBAL_MASK(0x7ff)
145		AM_RANGE(0x0000, 0x0000) AM_WRITE(changela_68705_portA_w)
146		AM_RANGE(0x0001, 0x0001) AM_WRITE(changela_68705_portB_w)
147		AM_RANGE(0x0002, 0x0002) AM_WRITE(changela_68705_portC_w)
148	139	AM_RANGE(0x0004, 0x0004) AM_WRITE(changela_68705_ddrA_w)
149	140	AM_RANGE(0x0005, 0x0005) AM_WRITE(changela_68705_ddrB_w)
150	141	AM_RANGE(0x0006, 0x0006) AM_WRITE(changela_68705_ddrC_w)
151	142
152		AM_RANGE(0x0000, 0x007f) AM_WRITE(SMH_RAM)
153		AM_RANGE(0x0080, 0x07ff) AM_WRITE(SMH_ROM)
	143	AM_RANGE(0x0000, 0x007f) AM_RAM
	144	AM_RANGE(0x0080, 0x07ff) AM_ROM
154	145	ADDRESS_MAP_END
155	146
156	147
r4679	r4680
250	241	}
251	242
252	243
253		static ADDRESS_MAP_START( readmem, ADDRESS_SPACE_PROGRAM, 8 )
254		AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM)
255		AM_RANGE(0x8000, 0x83ff) AM_READ(SMH_RAM)            /* OBJ0 RAM */
256		AM_RANGE(0x9000, 0x97ff) AM_READ(SMH_RAM)            /* OBJ1 RAM */
257		AM_RANGE(0xb000, 0xbfff) AM_READ(SMH_ROM)
	244	static ADDRESS_MAP_START( changela_map, ADDRESS_SPACE_PROGRAM, 8 )
	245	AM_RANGE(0x0000, 0x7fff) AM_ROM
	246	AM_RANGE(0x8000, 0x83ff) AM_RAM AM_BASE(&spriteram) /* OBJ0 RAM */
	247	AM_RANGE(0x9000, 0x97ff) AM_RAM AM_BASE(&videoram)   /* OBJ1 RAM */
	248	AM_RANGE(0xa000, 0xa07f) AM_WRITE(changela_colors_w) AM_BASE(&colorram)   /* Color 93419 RAM 64x9(nine!!!) bits A0-used as the 8-th bit data input (d0-d7->normal, a0->d8) */
	249	AM_RANGE(0xb000, 0xbfff) AM_ROM
258	250
259		AM_RANGE(0xc000, 0xc7ff) AM_READ(changela_mem_device_r)         /* RAM4 (River Bed RAM); RAM5 (Tree RAM) */
	251	AM_RANGE(0xc000, 0xc7ff) AM_READWRITE(changela_mem_device_r, changela_mem_device_w)   /* RAM4 (River Bed RAM); RAM5 (Tree RAM) */
260	252
261		AM_RANGE(0xd000, 0xd000) AM_DEVREAD("ay1", ay8910_r)
262		AM_RANGE(0xd010, 0xd010) AM_DEVREAD("ay2", ay8910_r)
263
264		/* LS139 - U24 */
265		AM_RANGE(0xd024, 0xd024) AM_READ(changela_24_r)
266		AM_RANGE(0xd025, 0xd025) AM_READ(changela_25_r)
267		AM_RANGE(0xd028, 0xd028) AM_READ(mcu_r)
268		AM_RANGE(0xd02c, 0xd02c) AM_READ(changela_2c_r)
269		AM_RANGE(0xd02d, 0xd02d) AM_READ(changela_2d_r)
270
271		AM_RANGE(0xd030, 0xd030) AM_READ(changela_30_r)
272		AM_RANGE(0xd031, 0xd031) AM_READ(changela_31_r)
273
274		AM_RANGE(0xf000, 0xf7ff) AM_READ(SMH_RAM)   /* RAM2 (Processor RAM) */
275		ADDRESS_MAP_END
276
277
278		static ADDRESS_MAP_START( writemem, ADDRESS_SPACE_PROGRAM, 8 )
279		AM_RANGE(0x0000, 0x7fff) AM_WRITE(SMH_ROM)             /* Processor ROM */
280		AM_RANGE(0x8000, 0x83ff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram)    /* OBJ0 RAM (A10 = GND )*/
281		AM_RANGE(0x9000, 0x97ff) AM_WRITE(SMH_RAM) AM_BASE(&videoram)      /* OBJ1 RAM */
282		AM_RANGE(0xa000, 0xa07f) AM_WRITE(changela_colors_w) AM_BASE(&colorram)      /* Color 93419 RAM 64x9(nine!!!) bits A0-used as the 8-th bit data input (d0-d7->normal, a0->d8) */
283		AM_RANGE(0xb000, 0xbfff) AM_WRITE(SMH_ROM)            /* Processor ROM */
284
285		AM_RANGE(0xc000, 0xc7ff) AM_WRITE(changela_mem_device_w)         /* River-Tree RAMs, slope ROM, tree ROM */
286
287	253	/* LS138 - U16 */
288	254	AM_RANGE(0xc800, 0xc800) AM_WRITENOP            /* not connected */
289	255	AM_RANGE(0xc900, 0xc900) AM_WRITE(changela_mem_device_select_w)   /* selects the memory device to be accessible at 0xc000-0xc7ff */
290	256	AM_RANGE(0xca00, 0xca00) AM_WRITE(changela_slope_rom_addr_hi_w)
291	257	AM_RANGE(0xcb00, 0xcb00) AM_WRITE(changela_slope_rom_addr_lo_w)
292	258
293		AM_RANGE(0xd000, 0xd001) AM_DEVWRITE("ay1", ay8910_address_data_w)
294		AM_RANGE(0xd010, 0xd011) AM_DEVWRITE("ay2", ay8910_address_data_w)
	259	AM_RANGE(0xd000, 0xd001) AM_DEVREADWRITE("ay1", ay8910_r, ay8910_address_data_w)
	260	AM_RANGE(0xd010, 0xd011) AM_DEVREADWRITE("ay2", ay8910_r, ay8910_address_data_w)
295	261
296	262	/* LS259 - U44 */
297	263	AM_RANGE(0xd020, 0xd020) AM_WRITE(changela_collision_reset_0)
298	264	AM_RANGE(0xd021, 0xd022) AM_WRITE(changela_coin_counter_w)
299	265	//AM_RANGE(0xd023, 0xd023) AM_WRITENOP
300		AM_RANGE(0xd024, 0xd024) AM_WRITE(mcu_PC0_w)
301		AM_RANGE(0xd025, 0xd025) AM_WRITE(changela_collision_reset_1)
	266
	267	/* LS139 - U24 */
	268	AM_RANGE(0xd024, 0xd024) AM_READWRITE(changela_24_r, mcu_PC0_w)
	269	AM_RANGE(0xd025, 0xd025) AM_READWRITE(changela_25_r, changela_collision_reset_1)
302	270	AM_RANGE(0xd026, 0xd026) AM_WRITENOP
	271	AM_RANGE(0xd028, 0xd028) AM_READ(mcu_r)
	272	AM_RANGE(0xd02c, 0xd02c) AM_READ(changela_2c_r)
	273	AM_RANGE(0xd02d, 0xd02d) AM_READ(changela_2d_r)
303	274
304		AM_RANGE(0xd030, 0xd030) AM_WRITE(mcu_w)
305		AM_RANGE(0xe000, 0xe000) AM_WRITE(watchdog_reset_w)      /* Watchdog */
306		AM_RANGE(0xf000, 0xf7ff) AM_WRITE(SMH_RAM)            /* Processor RAM */
	275	AM_RANGE(0xd030, 0xd030) AM_READWRITE(changela_30_r, mcu_w)
	276	AM_RANGE(0xd031, 0xd031) AM_READ(changela_31_r)
	277
	278	AM_RANGE(0xe000, 0xe000) AM_WRITE(watchdog_reset_w)   /* Watchdog */
	279
	280	AM_RANGE(0xf000, 0xf7ff) AM_RAM   /* RAM2 (Processor RAM) */
307	281	ADDRESS_MAP_END
308	282
309	283
r4679	r4680
477	451	cpu_set_input_line_and_vector(device, 0, HOLD_LINE, vector);
478	452
479	453	/* it seems the V8 == Vblank and it is connected to the INT on the 68705 */
480		//so we should cause an INT on the cpu 1 here, as well.
	454	//so we should cause an INT on the MCU cpu here, as well.
481	455	//but only once per frame !
482	456	if (vector == 0xdf) /* only on vblank */
483		generic_pulse_irq_line(device->machine->cpu[1], 0);
	457	generic_pulse_irq_line(cputag_get_cpu(device->machine, "mcu"), 0);
484	458
485	459	}
486	460
487	461	static MACHINE_DRIVER_START( changela )
488	462
489	463	MDRV_CPU_ADD("maincpu", Z80,5000000)
490		MDRV_CPU_PROGRAM_MAP(readmem,writemem)
	464	MDRV_CPU_PROGRAM_MAP(changela_map,0)
491	465	MDRV_CPU_VBLANK_INT_HACK(chl_interrupt,4)
492	466
493	467	MDRV_CPU_ADD("mcu", M68705,2500000)
494		MDRV_CPU_PROGRAM_MAP(mcu_readmem,mcu_writemem)
	468	MDRV_CPU_PROGRAM_MAP(mcu_map,0)
495	469
496	470	MDRV_MACHINE_RESET(changela)
497	471

src/mame/drivers/crimfght.c

r4679	r4680
36	36	static WRITE8_HANDLER( crimfght_sh_irqtrigger_w )
37	37	{
38	38	soundlatch_w(space,offset,data);
39		cpu_set_input_line_and_vector(space->machine->cpu[1],0,HOLD_LINE,0xff);
	39	cputag_set_input_line_and_vector(space->machine, "audiocpu", 0, HOLD_LINE, 0xff);
40	40	}
41	41
42	42	static WRITE8_DEVICE_HANDLER( crimfght_snd_bankswitch_w )
r4679	r4680
52	52
53	53	/********************************************/
54	54
55		static ADDRESS_MAP_START( crimfght_readmem, ADDRESS_SPACE_PROGRAM, 8 )
56		AM_RANGE(0x0000, 0x03ff) AM_READ(SMH_BANK1)         /* banked RAM */
57		AM_RANGE(0x0400, 0x1fff) AM_READ(SMH_RAM)         /* RAM */
	55	static ADDRESS_MAP_START( crimfght_map, ADDRESS_SPACE_PROGRAM, 8 )
	56	AM_RANGE(0x0000, 0x03ff) AM_RAMBANK(1)               /* banked RAM */
	57	AM_RANGE(0x0400, 0x1fff) AM_RAM                                    /* RAM */
58	58	AM_RANGE(0x3f80, 0x3f80) AM_READ_PORT("SYSTEM")
59	59	AM_RANGE(0x3f81, 0x3f81) AM_READ_PORT("P1")
60	60	AM_RANGE(0x3f82, 0x3f82) AM_READ_PORT("P2")
r4679	r4680
63	63	AM_RANGE(0x3f85, 0x3f85) AM_READ_PORT("P3")
64	64	AM_RANGE(0x3f86, 0x3f86) AM_READ_PORT("P4")
65	65	AM_RANGE(0x3f87, 0x3f87) AM_READ_PORT("DSW1")
66		AM_RANGE(0x3f88, 0x3f88) AM_READ(watchdog_reset_r)   /* watchdog reset */
67		AM_RANGE(0x2000, 0x5fff) AM_READ(K052109_051960_r)   /* video RAM + sprite RAM */
68		AM_RANGE(0x6000, 0x7fff) AM_READ(SMH_BANK2)         /* banked ROM */
69		AM_RANGE(0x8000, 0xffff) AM_READ(SMH_ROM)         /* ROM */
70		ADDRESS_MAP_END
71
72		static ADDRESS_MAP_START( crimfght_writemem, ADDRESS_SPACE_PROGRAM, 8 )
73		AM_RANGE(0x0000, 0x03ff) AM_WRITE(SMH_BANK1)               /* banked RAM */
74		AM_RANGE(0x0400, 0x1fff) AM_WRITE(SMH_RAM)               /* RAM */
75		AM_RANGE(0x3f88, 0x3f88) AM_WRITE(crimfght_coin_w)         /* coin counters */
	66	AM_RANGE(0x3f88, 0x3f88) AM_READWRITE(watchdog_reset_r, crimfght_coin_w)   /* watchdog reset */
76	67	AM_RANGE(0x3f8c, 0x3f8c) AM_WRITE(crimfght_sh_irqtrigger_w)   /* cause interrupt on audio CPU? */
77		AM_RANGE(0x2000, 0x5fff) AM_WRITE(K052109_051960_w)         /* video RAM + sprite RAM */
78		AM_RANGE(0x6000, 0x7fff) AM_WRITE(SMH_ROM)               /* banked ROM */
79		AM_RANGE(0x8000, 0xffff) AM_WRITE(SMH_ROM)               /* ROM */
	68	AM_RANGE(0x2000, 0x5fff) AM_READWRITE(K052109_051960_r, K052109_051960_w)   /* video RAM + sprite RAM */
	69	AM_RANGE(0x6000, 0x7fff) AM_ROMBANK(2)                  /* banked ROM */
	70	AM_RANGE(0x8000, 0xffff) AM_ROM                                    /* ROM */
80	71	ADDRESS_MAP_END
81	72
82		static ADDRESS_MAP_START( crimfght_readmem_sound, ADDRESS_SPACE_PROGRAM, 8 )
83		AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM)            /* ROM 821l01.h4 */
84		AM_RANGE(0x8000, 0x87ff) AM_READ(SMH_RAM)            /* RAM */
85		AM_RANGE(0xa000, 0xa001) AM_DEVREAD("ym", ym2151_r)   /* YM2151 */
86		AM_RANGE(0xc000, 0xc000) AM_READ(soundlatch_r)         /* soundlatch_r */
87		AM_RANGE(0xe000, 0xe00d) AM_DEVREAD("konami", k007232_r)   /* 007232 registers */
	73	static ADDRESS_MAP_START( crimfght_sound_map, ADDRESS_SPACE_PROGRAM, 8 )
	74	AM_RANGE(0x0000, 0x7fff) AM_ROM                                    /* ROM 821l01.h4 */
	75	AM_RANGE(0x8000, 0x87ff) AM_RAM                                    /* RAM */
	76	AM_RANGE(0xa000, 0xa001) AM_DEVREADWRITE("ym", ym2151_r, ym2151_w)         /* YM2151 */
	77	AM_RANGE(0xc000, 0xc000) AM_READ(soundlatch_r)                        /* soundlatch_r */
	78	AM_RANGE(0xe000, 0xe00d) AM_DEVREADWRITE("konami", k007232_r, k007232_w)   /* 007232 registers */
88	79	ADDRESS_MAP_END
89	80
90		static ADDRESS_MAP_START( crimfght_writemem_sound, ADDRESS_SPACE_PROGRAM, 8 )
91		AM_RANGE(0x0000, 0x7fff) AM_WRITE(SMH_ROM)               /* ROM 821l01.h4 */
92		AM_RANGE(0x8000, 0x87ff) AM_WRITE(SMH_RAM)               /* RAM */
93		AM_RANGE(0xa000, 0xa001) AM_DEVWRITE("ym", ym2151_w)   /* YM2151 */
94		AM_RANGE(0xe000, 0xe00d) AM_DEVWRITE("konami", k007232_w)      /* 007232 registers */
95		ADDRESS_MAP_END
96
97	81	/***************************************************************************
98	82
99	83	Input Ports
r4679	r4680
232	216
233	217	/* basic machine hardware */
234	218	MDRV_CPU_ADD("maincpu", KONAMI, 3000000)      /* ? */
235		MDRV_CPU_PROGRAM_MAP(crimfght_readmem,crimfght_writemem)
	219	MDRV_CPU_PROGRAM_MAP(crimfght_map,0)
236	220	MDRV_CPU_VBLANK_INT("screen", irq0_line_hold)
237	221
238	222	MDRV_CPU_ADD("audiocpu", Z80, 3579545)   /* verified with PCB */
239		MDRV_CPU_PROGRAM_MAP(crimfght_readmem_sound,crimfght_writemem_sound)
	223	MDRV_CPU_PROGRAM_MAP(crimfght_sound_map,0)
240	224
241	225	MDRV_MACHINE_RESET(crimfght)
242	226
r4679	r4680
360	344	/* bit 5 = select work RAM or palette */
361	345	if (lines & 0x20)
362	346	{
363		memory_install_readwrite8_handler(cpu_get_address_space(device, ADDRESS_SPACE_PROGRAM), 0x0000, 0x03ff, 0, 0, SMH_BANK3, paletteram_xBBBBBGGGGGRRRRR_be_w);
	347	memory_install_readwrite8_handler(cpu_get_address_space(device, ADDRESS_SPACE_PROGRAM), 0x0000, 0x03ff, 0, 0, (read8_space_func)SMH_BANK(3), paletteram_xBBBBBGGGGGRRRRR_be_w);
364	348	memory_set_bankptr(device->machine, 3, paletteram);
365	349	}
366	350	else
367		memory_install_readwrite8_handler(cpu_get_address_space(device, ADDRESS_SPACE_PROGRAM), 0x0000, 0x03ff, 0, 0, SMH_BANK1, SMH_BANK1);                        /* RAM */
	351	memory_install_readwrite8_handler(cpu_get_address_space(device, ADDRESS_SPACE_PROGRAM), 0x0000, 0x03ff, 0, 0, (read8_space_func)SMH_BANK(1), (write8_space_func)SMH_BANK(1));                        /* RAM */
368	352
369	353	/* bit 6 = enable char ROM reading through the video RAM */
370	354	K052109_set_RMRD_line((lines & 0x40) ? ASSERT_LINE : CLEAR_LINE);
r4679	r4680
377	361	{
378	362	UINT8 *RAM = memory_region(machine, "maincpu");
379	363
380		konami_configure_set_lines(machine->cpu[0], crimfght_banking);
	364	konami_configure_set_lines(cputag_get_cpu(machine, "maincpu"), crimfght_banking);
381	365
382	366	/* init the default bank */
383	367	memory_set_bankptr(machine,  2, &RAM[0x10000] );

src/mame/drivers/rabbit.c

r4679	r4680
339	339	{
340	340	/* the tilemaps are bigger than the regions the cpu can see, need to allocate the ram here */
341	341	/* or maybe not for this game/hw .... */
342		rabbit_tilemap_ram[0] = auto_malloc(0x20000);
343		rabbit_tilemap_ram[1] = auto_malloc(0x20000);
344		rabbit_tilemap_ram[2] = auto_malloc(0x20000);
345		rabbit_tilemap_ram[3] = auto_malloc(0x20000);
346		memset(rabbit_tilemap_ram[0], 0, 0x20000);
347		memset(rabbit_tilemap_ram[1], 0, 0x20000);
348		memset(rabbit_tilemap_ram[2], 0, 0x20000);
349		memset(rabbit_tilemap_ram[3], 0, 0x20000);
	342	rabbit_tilemap_ram[0] = auto_alloc_array_clear(machine, UINT32, 0x20000/4);
	343	rabbit_tilemap_ram[1] = auto_alloc_array_clear(machine, UINT32, 0x20000/4);
	344	rabbit_tilemap_ram[2] = auto_alloc_array_clear(machine, UINT32, 0x20000/4);
	345	rabbit_tilemap_ram[3] = auto_alloc_array_clear(machine, UINT32, 0x20000/4);
350	346
351	347	rabbit_tilemap[0] = tilemap_create(machine, get_rabbit_tilemap0_tile_info,tilemap_scan_rows,16, 16, 128,32);
352	348	rabbit_tilemap[1] = tilemap_create(machine, get_rabbit_tilemap1_tile_info,tilemap_scan_rows,16, 16, 128,32);
r4679	r4680
356	352	tilemap_set_transparent_pen(rabbit_tilemap[1],0x0);
357	353	tilemap_set_transparent_pen(rabbit_tilemap[2],0x0);
358	354	tilemap_set_transparent_pen(rabbit_tilemap[3],0x0);
359		rabbit_sprite_bitmap = auto_bitmap_alloc(0x1000,0x1000,video_screen_get_format(machine->primary_screen));
	355	rabbit_sprite_bitmap = auto_bitmap_alloc(machine,0x1000,0x1000,video_screen_get_format(machine->primary_screen));
360	356	rabbit_sprite_clip.min_x = 0;
361	357	rabbit_sprite_clip.max_x = 0x1000-1;
362	358	rabbit_sprite_clip.min_y = 0;
r4679	r4680
483	479	return mame_rand(space->machine);
484	480	}
485	481
486		static ADDRESS_MAP_START( rabbit_readmem, ADDRESS_SPACE_PROGRAM, 32 )
487		AM_RANGE(0x000000, 0x1fffff) AM_READ(SMH_ROM)
488		AM_RANGE(0x200000, 0x200003) AM_READ_PORT("INPUTS")
489		AM_RANGE(0x400010, 0x400013) AM_READ(randomrabbits) // gfx chip status?
490		AM_RANGE(0x400980, 0x400983) AM_READ(randomrabbits) // sound chip status?
491		AM_RANGE(0x400984, 0x400987) AM_READ(randomrabbits) // sound chip status?
492		AM_RANGE(0x440000, 0x47ffff) AM_READ(SMH_BANK1) // roms read from here during testing
493		/* tilemaps */
494		AM_RANGE(0x480000, 0x483fff) AM_READ(rabbit_tilemap0_r)
495		AM_RANGE(0x484000, 0x487fff) AM_READ(rabbit_tilemap1_r)
496		AM_RANGE(0x488000, 0x48bfff) AM_READ(rabbit_tilemap2_r)
497		AM_RANGE(0x48c000, 0x48ffff) AM_READ(rabbit_tilemap3_r)
498		AM_RANGE(0x494000, 0x49ffff) AM_READ(SMH_RAM)
499		AM_RANGE(0x4a0000, 0x4affff) AM_READ(SMH_RAM) /* palette */
500		AM_RANGE(0xff0000, 0xffffff) AM_READ(SMH_RAM)
501		ADDRESS_MAP_END
502
503	482	/* rom bank is used when testing roms, not currently hooked up */
504	483	static WRITE32_HANDLER ( rabbit_rombank_w )
505	484	{
r4679	r4680
593	572
594	573	static TIMER_CALLBACK( rabbit_blit_done )
595	574	{
596		cpu_set_input_line(machine->cpu[0], rabbit_bltirqlevel, HOLD_LINE);
	575	cputag_set_input_line(machine, "maincpu", rabbit_bltirqlevel, HOLD_LINE);
597	576	}
598	577
599	578	static void rabbit_do_blit(running_machine *machine)
r4679	r4680
718	697	}
719	698	}
720	699
721		static ADDRESS_MAP_START( rabbit_writemem, ADDRESS_SPACE_PROGRAM, 32 )
	700	static ADDRESS_MAP_START( rabbit_map, ADDRESS_SPACE_PROGRAM, 32 )
	701	AM_RANGE(0x000000, 0x1fffff) AM_ROM
722	702	AM_RANGE(0x000000, 0x000003) AM_WRITENOP // bug in code / emulation?
723	703	AM_RANGE(0x000010, 0x000013) AM_WRITENOP // bug in code / emulation?
724	704	AM_RANGE(0x000024, 0x000027) AM_WRITENOP // bug in code / emulation?
725		AM_RANGE(0x00719C, 0x00719F) AM_WRITENOP // bug in code / emulation?
726		AM_RANGE(0x000000, 0x1fffff) AM_WRITE(SMH_ROM)
727		AM_RANGE(0x200000, 0x200003) AM_WRITE(rabbit_eeprom_write)
	705	AM_RANGE(0x00719c, 0x00719f) AM_WRITENOP // bug in code / emulation?
	706	AM_RANGE(0x200000, 0x200003) AM_READ_PORT("INPUTS") AM_WRITE(rabbit_eeprom_write)
	707	AM_RANGE(0x400010, 0x400013) AM_READ(randomrabbits) // gfx chip status?
	708	AM_RANGE(0x400980, 0x400983) AM_READ(randomrabbits) // sound chip status?
	709	AM_RANGE(0x400984, 0x400987) AM_READ(randomrabbits) // sound chip status?
728	710	/* this lot are probably gfxchip/blitter etc. related */
729		AM_RANGE(0x400010, 0x400013) AM_WRITE(SMH_RAM) AM_BASE( &rabbit_viewregs0 )
730		AM_RANGE(0x400100, 0x400117) AM_WRITE(SMH_RAM) AM_BASE( &rabbit_tilemap_regs[0] ) // tilemap regs1
731		AM_RANGE(0x400120, 0x400137) AM_WRITE(SMH_RAM) AM_BASE( &rabbit_tilemap_regs[1] ) // tilemap regs2
732		AM_RANGE(0x400140, 0x400157) AM_WRITE(SMH_RAM) AM_BASE( &rabbit_tilemap_regs[2] ) // tilemap regs3
733		AM_RANGE(0x400160, 0x400177) AM_WRITE(SMH_RAM) AM_BASE( &rabbit_tilemap_regs[3] ) // tilemap regs4
734		AM_RANGE(0x400200, 0x40021b) AM_WRITE(SMH_RAM) AM_BASE( &rabbit_spriteregs ) // sprregs?
	711	AM_RANGE(0x400010, 0x400013) AM_WRITEONLY AM_BASE( &rabbit_viewregs0 )
	712	AM_RANGE(0x400100, 0x400117) AM_WRITEONLY AM_BASE( &rabbit_tilemap_regs[0] ) // tilemap regs1
	713	AM_RANGE(0x400120, 0x400137) AM_WRITEONLY AM_BASE( &rabbit_tilemap_regs[1] ) // tilemap regs2
	714	AM_RANGE(0x400140, 0x400157) AM_WRITEONLY AM_BASE( &rabbit_tilemap_regs[2] ) // tilemap regs3
	715	AM_RANGE(0x400160, 0x400177) AM_WRITEONLY AM_BASE( &rabbit_tilemap_regs[3] ) // tilemap regs4
	716	AM_RANGE(0x400200, 0x40021b) AM_WRITEONLY AM_BASE( &rabbit_spriteregs ) // sprregs?
735	717	AM_RANGE(0x400300, 0x400303) AM_WRITE(rabbit_rombank_w) // used during rom testing, rombank/area select + something else?
736		AM_RANGE(0x400400, 0x400413) AM_WRITE(SMH_RAM) AM_BASE( &rabbit_viewregs6 ) // some global controls? (brightness etc.?)
737		AM_RANGE(0x400500, 0x400503) AM_WRITE(SMH_RAM) AM_BASE( &rabbit_viewregs7 )
	718	AM_RANGE(0x400400, 0x400413) AM_WRITEONLY AM_BASE( &rabbit_viewregs6 ) // some global controls? (brightness etc.?)
	719	AM_RANGE(0x400500, 0x400503) AM_WRITEONLY AM_BASE( &rabbit_viewregs7 )
738	720	AM_RANGE(0x400700, 0x40070f) AM_WRITE(rabbit_blitter_w) AM_BASE( &rabbit_blitterregs )
739		AM_RANGE(0x400800, 0x40080f) AM_WRITE(SMH_RAM) AM_BASE( &rabbit_viewregs9 ) // never changes?
	721	AM_RANGE(0x400800, 0x40080f) AM_WRITEONLY AM_BASE( &rabbit_viewregs9 ) // never changes?
740	722	AM_RANGE(0x400900, 0x40098f) AM_WRITE(rabbit_audio_w)
741	723	/* hmm */
742		AM_RANGE(0x479700, 0x479713) AM_WRITE(SMH_RAM) AM_BASE( &rabbit_viewregs10 )
	724	AM_RANGE(0x479700, 0x479713) AM_WRITEONLY AM_BASE( &rabbit_viewregs10 )
	725
	726	AM_RANGE(0x440000, 0x47ffff) AM_ROMBANK(1) // roms read from here during testing
743	727	/* tilemaps */
744		AM_RANGE(0x480000, 0x483fff) AM_WRITE(rabbit_tilemap0_w)
745		AM_RANGE(0x484000, 0x487fff) AM_WRITE(rabbit_tilemap1_w)
746		AM_RANGE(0x488000, 0x48bfff) AM_WRITE(rabbit_tilemap2_w)
747		AM_RANGE(0x48c000, 0x48ffff) AM_WRITE(rabbit_tilemap3_w)
748		AM_RANGE(0x494000, 0x497fff) AM_WRITE(SMH_RAM) AM_BASE(&rabbit_spriteram) // sprites?
749		AM_RANGE(0x4a0000, 0x4affff) AM_WRITE(rabbit_paletteram_dword_w) AM_BASE(&paletteram32)
750		AM_RANGE(0xff0000, 0xffffff) AM_WRITE(SMH_RAM)
	728	AM_RANGE(0x480000, 0x483fff) AM_READWRITE(rabbit_tilemap0_r,rabbit_tilemap0_w)
	729	AM_RANGE(0x484000, 0x487fff) AM_READWRITE(rabbit_tilemap1_r,rabbit_tilemap1_w)
	730	AM_RANGE(0x488000, 0x48bfff) AM_READWRITE(rabbit_tilemap2_r,rabbit_tilemap2_w)
	731	AM_RANGE(0x48c000, 0x48ffff) AM_READWRITE(rabbit_tilemap3_r,rabbit_tilemap3_w)
	732	AM_RANGE(0x494000, 0x497fff) AM_RAM AM_BASE(&rabbit_spriteram) // sprites?
	733	AM_RANGE(0x4a0000, 0x4affff) AM_RAM_WRITE(rabbit_paletteram_dword_w) AM_BASE(&paletteram32)
	734	AM_RANGE(0xff0000, 0xffffff) AM_RAM
751	735	ADDRESS_MAP_END
752	736
753	737	/* tmmjprd has a different memory map */
754	738
755		static ADDRESS_MAP_START( tmmjprd_readmem, ADDRESS_SPACE_PROGRAM, 32 )
756		AM_RANGE(0x000000, 0x1fffff) AM_READ(SMH_ROM)
757		AM_RANGE(0x200010, 0x200013) AM_READ(randomrabbits) // gfx chip status?
758		AM_RANGE(0x200980, 0x200983) AM_READ(randomrabbits) // sound chip status?
759		AM_RANGE(0x200984, 0x200987) AM_READ(randomrabbits) // sound chip status?
760		AM_RANGE(0x280000, 0x283fff) AM_READ(rabbit_tilemap0_r)
761		AM_RANGE(0x284000, 0x287fff) AM_READ(rabbit_tilemap1_r)
762		AM_RANGE(0x288000, 0x28bfff) AM_READ(rabbit_tilemap2_r)
763		AM_RANGE(0x28c000, 0x28ffff) AM_READ(rabbit_tilemap3_r)
764		AM_RANGE(0x290000, 0x29ffff) AM_READ(SMH_RAM)
765		AM_RANGE(0x400000, 0x400003) AM_READ_PORT("INPUTS")
766		AM_RANGE(0xf00000, 0xffffff) AM_READ(SMH_RAM)
767		ADDRESS_MAP_END
768
769	739	static WRITE32_HANDLER( tmmjprd_paletteram_dword_w )
770	740	{
771	741	int r,g,b;
r4679	r4680
778	748	palette_set_color(space->machine,(offset^0xff)+0x2000,MAKE_RGB(r,g,b));
779	749	}
780	750
781
782		static ADDRESS_MAP_START( tmmjprd_writemem, ADDRESS_SPACE_PROGRAM, 32 )
783		AM_RANGE(0x000000, 0x1fffff) AM_WRITE(SMH_ROM)
784		/* check these are used .. */
785		//  AM_RANGE(0x200010, 0x200013) AM_WRITE(SMH_RAM) AM_BASE( &rabbit_viewregs0 )
786		AM_RANGE(0x200100, 0x200117) AM_WRITE(SMH_RAM) AM_BASE( &rabbit_tilemap_regs[0] ) // tilemap regs1
787		AM_RANGE(0x200120, 0x200137) AM_WRITE(SMH_RAM) AM_BASE( &rabbit_tilemap_regs[1] ) // tilemap regs2
788		AM_RANGE(0x200140, 0x200157) AM_WRITE(SMH_RAM) AM_BASE( &rabbit_tilemap_regs[2] ) // tilemap regs3
789		AM_RANGE(0x200160, 0x200177) AM_WRITE(SMH_RAM) AM_BASE( &rabbit_tilemap_regs[3] ) // tilemap regs4
790		AM_RANGE(0x200200, 0x20021b) AM_WRITE(SMH_RAM) AM_BASE( &rabbit_spriteregs ) // sprregs?
	751	static ADDRESS_MAP_START( tmmjprd_map, ADDRESS_SPACE_PROGRAM, 32 )
	752	AM_RANGE(0x000000, 0x1fffff) AM_ROM
	753	AM_RANGE(0x200010, 0x200013) AM_READ(randomrabbits) // gfx chip status?
	754	AM_RANGE(0x200980, 0x200983) AM_READ(randomrabbits) // sound chip status?
	755	AM_RANGE(0x200984, 0x200987) AM_READ(randomrabbits) // sound chip status?
	756	/* check these are used .. */
	757	//  AM_RANGE(0x200010, 0x200013) AM_WRITEONLY AM_BASE( &rabbit_viewregs0 )
	758	AM_RANGE(0x200100, 0x200117) AM_WRITEONLY AM_BASE( &rabbit_tilemap_regs[0] ) // tilemap regs1
	759	AM_RANGE(0x200120, 0x200137) AM_WRITEONLY AM_BASE( &rabbit_tilemap_regs[1] ) // tilemap regs2
	760	AM_RANGE(0x200140, 0x200157) AM_WRITEONLY AM_BASE( &rabbit_tilemap_regs[2] ) // tilemap regs3
	761	AM_RANGE(0x200160, 0x200177) AM_WRITEONLY AM_BASE( &rabbit_tilemap_regs[3] ) // tilemap regs4
	762	AM_RANGE(0x200200, 0x20021b) AM_WRITEONLY AM_BASE( &rabbit_spriteregs ) // sprregs?
791	763	//  AM_RANGE(0x200300, 0x200303) AM_WRITE(rabbit_rombank_w) // used during rom testing, rombank/area select + something else?
792		//  AM_RANGE(0x200400, 0x200413) AM_WRITE(SMH_RAM) AM_BASE( &rabbit_viewregs6 ) // some global controls? (brightness etc.?)
793		//  AM_RANGE(0x200500, 0x200503) AM_WRITE(SMH_RAM) AM_BASE( &rabbit_viewregs7 )
	764	//  AM_RANGE(0x200400, 0x200413) AM_WRITEONLY AM_BASE( &rabbit_viewregs6 ) // some global controls? (brightness etc.?)
	765	//  AM_RANGE(0x200500, 0x200503) AM_WRITEONLY AM_BASE( &rabbit_viewregs7 )
794	766	//  AM_RANGE(0x200700, 0x20070f) AM_WRITE(rabbit_blitter_w) AM_BASE( &rabbit_blitterregs )
795		//  AM_RANGE(0x200800, 0x20080f) AM_WRITE(SMH_RAM) AM_BASE( &rabbit_viewregs9 ) // never changes?
	767	//  AM_RANGE(0x200800, 0x20080f) AM_WRITEONLY AM_BASE( &rabbit_viewregs9 ) // never changes?
796	768	//  AM_RANGE(0x200900, 0x20098f) AM_WRITE(rabbit_audio_w)
797	769	/* hmm */
798		//  AM_RANGE(0x279700, 0x279713) AM_WRITE(SMH_RAM) AM_BASE( &rabbit_viewregs10 )
	770	//  AM_RANGE(0x279700, 0x279713) AM_WRITEONLY AM_BASE( &rabbit_viewregs10 )
799	771	/* tilemaps */
800		AM_RANGE(0x280000, 0x283fff) AM_WRITE(rabbit_tilemap0_w)
801		AM_RANGE(0x284000, 0x287fff) AM_WRITE(rabbit_tilemap1_w)
802		AM_RANGE(0x288000, 0x28bfff) AM_WRITE(rabbit_tilemap2_w)
803		AM_RANGE(0x28c000, 0x28ffff) AM_WRITE(rabbit_tilemap3_w)
	772	AM_RANGE(0x280000, 0x283fff) AM_READWRITE(rabbit_tilemap0_r,rabbit_tilemap0_w)
	773	AM_RANGE(0x284000, 0x287fff) AM_READWRITE(rabbit_tilemap1_r,rabbit_tilemap1_w)
	774	AM_RANGE(0x288000, 0x28bfff) AM_READWRITE(rabbit_tilemap2_r,rabbit_tilemap2_w)
	775	AM_RANGE(0x28c000, 0x28ffff) AM_READWRITE(rabbit_tilemap3_r,rabbit_tilemap3_w)
804	776	/* ?? is palette ram shared with sprites in this case or just a different map */
805		AM_RANGE(0x290000, 0x29bfff) AM_WRITE(SMH_RAM) AM_BASE(&rabbit_spriteram)
806		AM_RANGE(0x29c000, 0x29ffff) AM_WRITE(tmmjprd_paletteram_dword_w) AM_BASE(&paletteram32)
807		AM_RANGE(0x400000, 0x400003) AM_WRITE(rabbit_eeprom_write)
808		AM_RANGE(0xf00000, 0xffffff) AM_WRITE(SMH_RAM)
	777	AM_RANGE(0x290000, 0x29bfff) AM_RAM AM_BASE(&rabbit_spriteram)
	778	AM_RANGE(0x29c000, 0x29ffff) AM_RAM_WRITE(tmmjprd_paletteram_dword_w) AM_BASE(&paletteram32)
	779
	780	AM_RANGE(0x400000, 0x400003) AM_READ_PORT("INPUTS") AM_WRITE(rabbit_eeprom_write)
	781	AM_RANGE(0xf00000, 0xffffff) AM_RAM
809	782	ADDRESS_MAP_END
810	783
	784
811	785	static INPUT_PORTS_START( rabbit )
812	786	PORT_START("INPUTS")
813	787	PORT_BIT( 0x00000001, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_CUSTOM(eeprom_bit_r, NULL)   // as per code at 4d932
r4679	r4680
1048	1022
1049	1023	static MACHINE_DRIVER_START( rabbit )
1050	1024	MDRV_CPU_ADD("maincpu",M68EC020,24000000) /* 24 MHz */
1051		MDRV_CPU_PROGRAM_MAP(rabbit_readmem,rabbit_writemem)
	1025	MDRV_CPU_PROGRAM_MAP(rabbit_map,0)
1052	1026	MDRV_CPU_VBLANK_INT_HACK(rabbit_interrupts,262)
1053	1027	/* (rabbit) */
1054	1028	/*  lev 1 : 0x64 : 0000 027c -
r4679	r4680
1108	1082
1109	1083	/* the tilemaps are bigger than the regions the cpu can see, need to allocate the ram here */
1110	1084	/* or maybe not for this game/hw .... */
1111		rabbit_tilemap_ram[0] = auto_malloc(0x20000);
1112		rabbit_tilemap_ram[1] = auto_malloc(0x20000);
1113		rabbit_tilemap_ram[2] = auto_malloc(0x20000);
1114		rabbit_tilemap_ram[3] = auto_malloc(0x20000);
1115		memset(rabbit_tilemap_ram[0], 0, 0x20000);
1116		memset(rabbit_tilemap_ram[1], 0, 0x20000);
1117		memset(rabbit_tilemap_ram[2], 0, 0x20000);
1118		memset(rabbit_tilemap_ram[3], 0, 0x20000);
	1085	rabbit_tilemap_ram[0] = auto_alloc_array_clear(machine, UINT32, 0x20000/4);
	1086	rabbit_tilemap_ram[1] = auto_alloc_array_clear(machine, UINT32, 0x20000/4);
	1087	rabbit_tilemap_ram[2] = auto_alloc_array_clear(machine, UINT32, 0x20000/4);
	1088	rabbit_tilemap_ram[3] = auto_alloc_array_clear(machine, UINT32, 0x20000/4);
1119	1089
1120	1090	rabbit_tilemap[0] = tilemap_create(machine, get_tmmjprd_tilemap0_tile_info,tilemap_scan_rows, 8, 8, 64, 64);
1121	1091	rabbit_tilemap[1] = tilemap_create(machine, get_tmmjprd_tilemap1_tile_info,tilemap_scan_rows,16, 16, 64, 64);
r4679	r4680
1125	1095	tilemap_set_transparent_pen(rabbit_tilemap[1],0x0);
1126	1096	tilemap_set_transparent_pen(rabbit_tilemap[2],0x0);
1127	1097	tilemap_set_transparent_pen(rabbit_tilemap[3],0x0);
1128		rabbit_sprite_bitmap = auto_bitmap_alloc(0x1000,0x1000,video_screen_get_format(machine->primary_screen));
	1098	rabbit_sprite_bitmap = auto_bitmap_alloc(machine,0x1000,0x1000,video_screen_get_format(machine->primary_screen));
1129	1099	rabbit_sprite_clip.min_x = 0;
1130	1100	rabbit_sprite_clip.max_x = 0x1000-1;
1131	1101	rabbit_sprite_clip.min_y = 0;
r4679	r4680
1177	1147	static MACHINE_DRIVER_START( tmmjprd )
1178	1148	MDRV_IMPORT_FROM(rabbit)
1179	1149	MDRV_CPU_MODIFY("maincpu")
1180		MDRV_CPU_PROGRAM_MAP(tmmjprd_readmem,tmmjprd_writemem)
	1150	MDRV_CPU_PROGRAM_MAP(tmmjprd_map,0)
1181	1151	MDRV_CPU_VBLANK_INT_HACK(tmmjprd_interrupt,2)
1182	1152
1183	1153	MDRV_VIDEO_START(tmmjprd)

src/mame/drivers/asuka.c

r4679	r4680
243	243
244	244	static TIMER_CALLBACK( cadash_interrupt5 )
245	245	{
246		cpu_set_input_line(machine->cpu[0], 5, HOLD_LINE);
	246	cputag_set_input_line(machine, "maincpu", 5, HOLD_LINE);
247	247	}
248	248
249	249	static INTERRUPT_GEN( cadash_interrupt )
r4679	r4680
755	755
756	756	static void irq_handler(const device_config *device, int irq)
757	757	{
758		cpu_set_input_line(device->machine->cpu[1],0,irq ? ASSERT_LINE : CLEAR_LINE);
	758	cputag_set_input_line(device->machine, "audiocpu", 0, irq ? ASSERT_LINE : CLEAR_LINE);
759	759	}
760	760
761	761	static const ym2610_interface ym2610_config =

src/mame/drivers/triplhnt.c

r4679	r4680
32	32	{
33	33	triplhnt_hit_code = code;
34	34
35		cpu_set_input_line(machine->cpu[0], 0, HOLD_LINE);
	35	cputag_set_input_line(machine, "maincpu", 0, HOLD_LINE);
36	36	}
37	37
38	38

src/mame/drivers/pooyan.c

r4679	r4680
44	44	{
45	45	irq_enable = data & 1;
46	46	if (!irq_enable)
47		cpu_set_input_line(space->machine->cpu[0], INPUT_LINE_NMI, CLEAR_LINE);
	47	cputag_set_input_line(space->machine, "audiocpu", INPUT_LINE_NMI, CLEAR_LINE);
48	48	}
49	49
50	50

src/mame/drivers/hvyunit.c

r4679	r4680
310	310
311	311	static WRITE8_HANDLER( trigger_nmi_on_sound_cpu2 )
312	312	{
313		soundlatch_w(space,0,data);
314		cpu_set_input_line(space->machine->cpu[2], INPUT_LINE_NMI, PULSE_LINE);
	313	soundlatch_w(space, 0, data);
	314	cputag_set_input_line(space->machine, "suoundcpu", INPUT_LINE_NMI, PULSE_LINE);
315	315	}
316	316
317	317
318	318	static WRITE8_HANDLER( trigger_nmi_on_sub_cpu)
319	319	{
320		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_NMI, PULSE_LINE);
	320	cputag_set_input_line(space->machine, "sub", INPUT_LINE_NMI, PULSE_LINE);
321	321	}
322	322
323	323	static WRITE8_HANDLER( main_bankswitch_w )
r4679	r4680
345	345
346	346	static ADDRESS_MAP_START( main_memory, ADDRESS_SPACE_PROGRAM, 8 )
347	347	AM_RANGE(0x0000, 0x7fff) AM_ROM
348		AM_RANGE(0x8000, 0xbfff) AM_READ(SMH_BANK1)
	348	AM_RANGE(0x8000, 0xbfff) AM_READ(SMH_BANK(1))
349	349	AM_RANGE(0xc000, 0xcfff) AM_READWRITE( pandora_spriteram_r, pandora_spriteram_w )
350	350	AM_RANGE(0xd000, 0xdfff) AM_RAM
351	351	AM_RANGE(0xe000, 0xefff) AM_RAM AM_SHARE(1)
r4679	r4680
381	381
382	382	static ADDRESS_MAP_START( sub_memory, ADDRESS_SPACE_PROGRAM, 8 )
383	383	AM_RANGE(0x0000, 0x7fff) AM_ROM
384		AM_RANGE(0x8000, 0xbfff) AM_READ(SMH_BANK2)
	384	AM_RANGE(0x8000, 0xbfff) AM_READ(SMH_BANK(2))
385	385	AM_RANGE(0xc000, 0xc3ff) AM_RAM_WRITE(hu_videoram_w) AM_BASE(&videoram)
386	386	AM_RANGE(0xc400, 0xc7ff) AM_RAM_WRITE(hu_colorram_w) AM_BASE(&colorram)
387	387	AM_RANGE(0xd000, 0xd1ff) AM_RAM_WRITE(paletteram_xxxxRRRRGGGGBBBB_split2_w) AM_BASE(&paletteram_2)
r4679	r4680
418	418
419	419	static ADDRESS_MAP_START( sound_memory, ADDRESS_SPACE_PROGRAM, 8 )
420	420	AM_RANGE(0x0000, 0x7fff) AM_ROM
421		AM_RANGE(0x8000, 0xbfff) AM_READ(SMH_BANK3)
	421	AM_RANGE(0x8000, 0xbfff) AM_READ(SMH_BANK(3))
422	422	AM_RANGE(0xc000, 0xc7ff) AM_RAM
423	423	ADDRESS_MAP_END
424	424
r4679	r4680
693	693	GAME( 1988, hvyunit, 0,        hvyunit, hvyunit, 0, ROT0, "Kaneko / Taito", "Heavy Unit (World)" ,GAME_NOT_WORKING )
694	694	GAME( 1988, hvyunitj, hvyunit, hvyunit, hvyunit, 0, ROT0, "Kaneko / Taito", "Heavy Unit (Japan, Newer)" ,GAME_NOT_WORKING )
695	695	GAME( 1988, hvyunito, hvyunit, hvyunit, hvyunit, 0, ROT0, "Kaneko / Taito", "Heavy Unit (Japan, Older)" ,GAME_NOT_WORKING )
696
697

src/mame/drivers/backfire.c

r4679	r4680
48	48	static VIDEO_START(backfire)
49	49	{
50	50	/* allocate the ram as 16-bit (we do it here because the CPU is 32-bit) */
51		deco16_pf1_data = auto_malloc(0x2000);
52		deco16_pf2_data = auto_malloc(0x2000);
53		deco16_pf3_data = auto_malloc(0x2000);
54		deco16_pf4_data = auto_malloc(0x2000);
55		deco16_pf1_rowscroll = auto_malloc(0x0800);
56		deco16_pf2_rowscroll = auto_malloc(0x0800);
57		deco16_pf3_rowscroll = auto_malloc(0x0800);
58		deco16_pf4_rowscroll = auto_malloc(0x0800);
59		deco16_pf12_control = auto_malloc(0x10);
60		deco16_pf34_control = auto_malloc(0x10);
	51	deco16_pf1_data = auto_alloc_array(machine, UINT16, 0x2000/2);
	52	deco16_pf2_data = auto_alloc_array(machine, UINT16, 0x2000/2);
	53	deco16_pf3_data = auto_alloc_array(machine, UINT16, 0x2000/2);
	54	deco16_pf4_data = auto_alloc_array(machine, UINT16, 0x2000/2);
	55	deco16_pf1_rowscroll = auto_alloc_array(machine, UINT16, 0x0800/2);
	56	deco16_pf2_rowscroll = auto_alloc_array(machine, UINT16, 0x0800/2);
	57	deco16_pf3_rowscroll = auto_alloc_array(machine, UINT16, 0x0800/2);
	58	deco16_pf4_rowscroll = auto_alloc_array(machine, UINT16, 0x0800/2);
	59	deco16_pf12_control = auto_alloc_array(machine, UINT16, 0x10/2);
	60	deco16_pf34_control =auto_alloc_array(machine,  UINT16, 0x10/2);
61	61
62	62	/* and register the allocated ram so that save states still work */
63	63	state_save_register_global_pointer(machine, deco16_pf1_data, 0x2000/2);
r4679	r4680
83	83	deco16_set_tilemap_bank_callback(2, backfire_bank_callback);
84	84	deco16_set_tilemap_bank_callback(3, backfire_bank_callback);
85	85
86		backfire_left =  auto_bitmap_alloc(80*8, 32*8, BITMAP_FORMAT_INDEXED16);
87		backfire_right = auto_bitmap_alloc(80*8, 32*8, BITMAP_FORMAT_INDEXED16);
	86	backfire_left =  auto_bitmap_alloc(machine, 80*8, 32*8, BITMAP_FORMAT_INDEXED16);
	87	backfire_right = auto_bitmap_alloc(machine, 80*8, 32*8, BITMAP_FORMAT_INDEXED16);
88	88	}
89	89
90	90	static void draw_sprites(running_machine *machine,bitmap_t *bitmap,const rectangle *cliprect, UINT32 *backfire_spriteram32, int region)
r4679	r4680
628	628	{
629	629	UINT8 *rom = memory_region(machine, "ymz");
630	630	int length = 0x200000; // only the first rom is swapped on backfire!
631		UINT8 *buf1 = malloc_or_die(length);
	631	UINT8 *buf1 = alloc_array_or_die(UINT8, length);
632	632	UINT32 x;
633	633
634	634	for (x=0;x<length;x++)
r4679	r4680
666	666	deco56_decrypt_gfx(machine, "gfx1"); /* 141 */
667	667	deco56_decrypt_gfx(machine, "gfx2"); /* 141 */
668	668	deco156_decrypt(machine);
669		cpu_set_clockscale(machine->cpu[0], 4.0f); /* core timings aren't accurate */
	669	cpu_set_clockscale(cputag_get_cpu(machine, "maincpu"), 4.0f); /* core timings aren't accurate */
670	670	descramble_sound(machine);
671		memory_install_read32_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x0170018, 0x017001b, 0, 0, backfire_speedup_r );
	671	memory_install_read32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x0170018, 0x017001b, 0, 0, backfire_speedup_r );
672	672	}
673	673
674	674	GAME( 1995, backfire, 0,        backfire,      backfire, backfire, ROT0, "Data East Corporation", "Backfire! (set 1)", 0 )

src/mame/drivers/cubeqst.c

r4679	r4680
35	35	#define CUBEQST_HBLANK      320
36	36	#define CUBEQST_VCOUNT      280
37	37
38		enum cpu_indices
39		{
40		MAIN_CPU   = 0,
41		ROTATE_CPU = 1,
42		LINE_CPU   = 2,
43		SOUND_CPU  = 3,
44		};
45	38
46
47	39	/*************************************
48	40	*
49	41	*  Statics
r4679	r4680
72	64	static VIDEO_START( cubeqst )
73	65	{
74	66	video_field = 0;
75		depth_buffer = auto_malloc(512);
	67	depth_buffer = auto_alloc_array(machine, UINT8, 512);
76	68	}
77	69
78	70	/* TODO: Use resistor values */
r4679	r4680
80	72	{
81	73	int i;
82	74
83		colormap = auto_malloc(65536 * sizeof(colormap[0]));
	75	colormap = auto_alloc_array(machine, rgb_t, 65536);
84	76	for (i = 0; i < 65536; ++i)
85	77	{
86	78	UINT8 a, r, g, b, y;
r4679	r4680
118	110	for (y = cliprect->min_y; y <= cliprect->max_y; ++y)
119	111	{
120	112	int i;
121		int num_entries = cubeqcpu_get_ptr_ram_val(screen->machine->cpu[LINE_CPU], y);
122		UINT32 *stk_ram = cubeqcpu_get_stack_ram(screen->machine->cpu[LINE_CPU]);
	113	int num_entries = cubeqcpu_get_ptr_ram_val(cputag_get_cpu(screen->machine, "line_cpu"), y);
	114	UINT32 *stk_ram = cubeqcpu_get_stack_ram(cputag_get_cpu(screen->machine, "line_cpu"));
123	115	UINT32 *dest = BITMAP_ADDR32(bitmap, y, 0);
124	116	UINT32 pen;
125	117
r4679	r4680
248	240
249	241	static TIMER_CALLBACK( delayed_bank_swap )
250	242	{
251		cubeqcpu_swap_line_banks(machine->cpu[LINE_CPU]);
	243	cubeqcpu_swap_line_banks(cputag_get_cpu(machine, "line_cpu"));
252	244
253	245	/* TODO: This is a little dubious */
254		cubeqcpu_clear_stack(machine->cpu[LINE_CPU]);
	246	cubeqcpu_clear_stack(cputag_get_cpu(machine, "line_cpu"));
255	247	}
256	248
257	249
r4679	r4680
383	375
384	376	static READ16_HANDLER( read_rotram )
385	377	{
386		return cubeqcpu_rotram_r(space->machine->cpu[ROTATE_CPU], offset, mem_mask);
	378	return cubeqcpu_rotram_r(cputag_get_cpu(space->machine, "rotate_cpu"), offset, mem_mask);
387	379	}
388	380
389	381	static WRITE16_HANDLER( write_rotram )
390	382	{
391		cubeqcpu_rotram_w(space->machine->cpu[ROTATE_CPU], offset, data, mem_mask);
	383	cubeqcpu_rotram_w(cputag_get_cpu(space->machine, "rotate_cpu"), offset, data, mem_mask);
392	384	}
393	385
394	386	static READ16_HANDLER( read_sndram )
395	387	{
396		return cubeqcpu_sndram_r(space->machine->cpu[SOUND_CPU], offset, mem_mask);
	388	return cubeqcpu_sndram_r(cputag_get_cpu(space->machine, "sound_cpu"), offset, mem_mask);
397	389	}
398	390
399	391	static WRITE16_HANDLER( write_sndram )
400	392	{
401		cubeqcpu_sndram_w(space->machine->cpu[SOUND_CPU], offset, data, mem_mask);
	393	cubeqcpu_sndram_w(cputag_get_cpu(space->machine, "sound_cpu"), offset, data, mem_mask);
402	394	}
403	395
404	396	static ADDRESS_MAP_START( m68k_program_map, ADDRESS_SPACE_PROGRAM, 16 )

src/mame/drivers/rollerg.c

r4679	r4680
61	61
62	62	static WRITE8_HANDLER( soundirq_w )
63	63	{
64		cpu_set_input_line_and_vector(space->machine->cpu[1],0,HOLD_LINE,0xff);
	64	cputag_set_input_line_and_vector(space->machine, "audiocpu", 0, HOLD_LINE, 0xff);
65	65	}
66	66
67	67	static TIMER_CALLBACK( nmi_callback )
68	68	{
69		cpu_set_input_line(machine->cpu[1], INPUT_LINE_NMI, ASSERT_LINE);
	69	cputag_set_input_line(machine, "audiocpu", INPUT_LINE_NMI, ASSERT_LINE);
70	70	}
71	71
72	72	static WRITE8_HANDLER( sound_arm_nmi_w )
73	73	{
74		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_NMI, CLEAR_LINE);
	74	cputag_set_input_line(space->machine, "audiocpu", INPUT_LINE_NMI, CLEAR_LINE);
75	75	timer_set(space->machine, ATTOTIME_IN_USEC(50), NULL,0,nmi_callback);   /* kludge until the K053260 is emulated correctly */
76	76	}
77	77
r4679	r4680
80	80	return 0x7f;
81	81	}
82	82
83		static ADDRESS_MAP_START( readmem, ADDRESS_SPACE_PROGRAM, 8 )
84		AM_RANGE(0x0020, 0x0020) AM_READ(watchdog_reset_r)
85		AM_RANGE(0x0030, 0x0031) AM_DEVREAD("konami", rollerg_sound_r)   /* K053260 */
	83	static ADDRESS_MAP_START( rollerg_map, ADDRESS_SPACE_PROGRAM, 8 )
	84	AM_RANGE(0x0010, 0x0010) AM_WRITE(rollerg_0010_w)
	85	AM_RANGE(0x0020, 0x0020) AM_READWRITE(watchdog_reset_r,watchdog_reset_w)
	86	AM_RANGE(0x0030, 0x0031) AM_DEVREADWRITE("konami", rollerg_sound_r,k053260_w)   /* K053260 */
	87	AM_RANGE(0x0040, 0x0040) AM_WRITE(soundirq_w)
86	88	AM_RANGE(0x0050, 0x0050) AM_READ_PORT("P1")
87	89	AM_RANGE(0x0051, 0x0051) AM_READ_PORT("P2")
88	90	AM_RANGE(0x0052, 0x0052) AM_READ_PORT("DSW3")
89	91	AM_RANGE(0x0053, 0x0053) AM_READ_PORT("DSW1")
90	92	AM_RANGE(0x0060, 0x0060) AM_READ_PORT("DSW2")
91	93	AM_RANGE(0x0061, 0x0061) AM_READ(pip_r)            /* ????? */
92		AM_RANGE(0x0300, 0x030f) AM_READ(K053244_r)
93		AM_RANGE(0x0800, 0x0fff) AM_READ(rollerg_K051316_r)
94		AM_RANGE(0x1000, 0x17ff) AM_READ(K053245_r)
95		AM_RANGE(0x1800, 0x1fff) AM_READ(SMH_RAM)
96		AM_RANGE(0x2000, 0x3aff) AM_READ(SMH_RAM)
97		AM_RANGE(0x4000, 0x7fff) AM_READ(SMH_BANK1)
98		AM_RANGE(0x8000, 0xffff) AM_READ(SMH_ROM)
99		ADDRESS_MAP_END
100
101		static ADDRESS_MAP_START( writemem, ADDRESS_SPACE_PROGRAM, 8 )
102		AM_RANGE(0x0010, 0x0010) AM_WRITE(rollerg_0010_w)
103		AM_RANGE(0x0020, 0x0020) AM_WRITE(watchdog_reset_w)
104		AM_RANGE(0x0030, 0x0031) AM_DEVWRITE("konami", k053260_w)
105		AM_RANGE(0x0040, 0x0040) AM_WRITE(soundirq_w)
106	94	AM_RANGE(0x0100, 0x010f) AM_WRITENOP   /* 053252? */
107	95	AM_RANGE(0x0200, 0x020f) AM_WRITE(K051316_ctrl_0_w)
108		AM_RANGE(0x0300, 0x030f) AM_WRITE(K053244_w)
109		AM_RANGE(0x0800, 0x0fff) AM_WRITE(K051316_0_w)
110		AM_RANGE(0x1000, 0x17ff) AM_WRITE(K053245_w)
111		AM_RANGE(0x1800, 0x1fff) AM_WRITE(paletteram_xBBBBBGGGGGRRRRR_be_w) AM_BASE(&paletteram)
112		AM_RANGE(0x2000, 0x3aff) AM_WRITE(SMH_RAM)
113		AM_RANGE(0x4000, 0xffff) AM_WRITE(SMH_ROM)
	96	AM_RANGE(0x0300, 0x030f) AM_READWRITE(K053244_r,K053244_w)
	97	AM_RANGE(0x0800, 0x0fff) AM_READWRITE(rollerg_K051316_r,K051316_0_w)
	98	AM_RANGE(0x1000, 0x17ff) AM_READWRITE(K053245_r,K053245_w)
	99	AM_RANGE(0x1800, 0x1fff) AM_RAM_WRITE(paletteram_xBBBBBGGGGGRRRRR_be_w) AM_BASE(&paletteram)
	100	AM_RANGE(0x2000, 0x3aff) AM_RAM
	101	AM_RANGE(0x4000, 0x7fff) AM_ROMBANK(1)
	102	AM_RANGE(0x8000, 0xffff) AM_ROM
114	103	ADDRESS_MAP_END
115	104
116		static ADDRESS_MAP_START( readmem_sound, ADDRESS_SPACE_PROGRAM, 8 )
117		AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM)
118		AM_RANGE(0x8000, 0x87ff) AM_READ(SMH_RAM)
119		AM_RANGE(0xa000, 0xa02f) AM_DEVREAD("konami", k053260_r)
120		AM_RANGE(0xc000, 0xc001) AM_DEVREAD("ym", ym3812_r)
121		ADDRESS_MAP_END
122
123		static ADDRESS_MAP_START( writemem_sound, ADDRESS_SPACE_PROGRAM, 8 )
124		AM_RANGE(0x0000, 0x7fff) AM_WRITE(SMH_ROM)
125		AM_RANGE(0x8000, 0x87ff) AM_WRITE(SMH_RAM)
126		AM_RANGE(0xa000, 0xa02f) AM_DEVWRITE("konami", k053260_w)
127		AM_RANGE(0xc000, 0xc001) AM_DEVWRITE("ym", ym3812_w)
	105	static ADDRESS_MAP_START( rollerg_sound_map, ADDRESS_SPACE_PROGRAM, 8 )
	106	AM_RANGE(0x0000, 0x7fff) AM_ROM
	107	AM_RANGE(0x8000, 0x87ff) AM_RAM
	108	AM_RANGE(0xa000, 0xa02f) AM_DEVREADWRITE("konami", k053260_r,k053260_w)
	109	AM_RANGE(0xc000, 0xc001) AM_DEVREADWRITE("ym", ym3812_r,ym3812_w)
128	110	AM_RANGE(0xfc00, 0xfc00) AM_WRITE(sound_arm_nmi_w)
129	111	ADDRESS_MAP_END
130	112
r4679	r4680
239	221
240	222	/* basic machine hardware */
241	223	MDRV_CPU_ADD("maincpu", KONAMI, 3000000)      /* ? */
242		MDRV_CPU_PROGRAM_MAP(readmem,writemem)
	224	MDRV_CPU_PROGRAM_MAP(rollerg_map,0)
243	225	MDRV_CPU_VBLANK_INT("screen", irq0_line_hold)
244	226
245	227	MDRV_CPU_ADD("audiocpu", Z80, 3579545)
246		MDRV_CPU_PROGRAM_MAP(readmem_sound,writemem_sound)
	228	MDRV_CPU_PROGRAM_MAP(rollerg_sound_map,0)
247	229	/* NMIs are generated by the 053260 */
248	230	MDRV_MACHINE_RESET(rollerg)
249	231
r4679	r4680
341	323
342	324	static MACHINE_RESET( rollerg )
343	325	{
344		konami_configure_set_lines(machine->cpu[0], rollerg_banking);
	326	konami_configure_set_lines(cputag_get_cpu(machine, "maincpu"), rollerg_banking);
345	327
346	328	readzoomroms = 0;
347	329	}

src/mame/drivers/sidepckt.c

r4679	r4680
32	32
33	33	static WRITE8_HANDLER( sound_cpu_command_w )
34	34	{
35		soundlatch_w(space,offset,data);
36		cpu_set_input_line(space->machine->cpu[1],INPUT_LINE_NMI,PULSE_LINE);
	35	soundlatch_w(space, offset, data);
	36	cputag_set_input_line(space->machine, "audiocpu", INPUT_LINE_NMI, PULSE_LINE);
37	37	}
38	38
39	39	static READ8_HANDLER( sidepckt_i8751_r )
r4679	r4680
48	48	static const int table_3[]={0xbd,0x73,0x80,0xbd,0x73,0xa7,0xbd,0x73,0xe0,0x7e,0x72,0x56,0xff,0xff,0xff,0xff};
49	49	static int current_ptr=0,current_table=0,in_math=0,math_param;
50	50
51		cpu_set_input_line(space->machine->cpu[0],M6809_FIRQ_LINE,HOLD_LINE); /* i8751 triggers FIRQ on main cpu */
	51	cputag_set_input_line(space->machine, "maincpu", M6809_FIRQ_LINE, HOLD_LINE); /* i8751 triggers FIRQ on main cpu */
52	52
53	53	/* This function takes multiple parameters */
54	54	if (in_math==1) {
r4679	r4680
89	89	static const int table_3[]={0xbd,0x71,0xc8,0xbd,0x71,0xef,0xbd,0x72,0x28,0x7e,0x70,0x9e,0xff,0xff,0xff,0xff};
90	90	static int current_ptr=0,current_table=0,in_math,math_param;
91	91
92		cpu_set_input_line(space->machine->cpu[0],M6809_FIRQ_LINE,HOLD_LINE); /* i8751 triggers FIRQ on main cpu */
	92	cputag_set_input_line(space->machine, "maincpu", M6809_FIRQ_LINE, HOLD_LINE); /* i8751 triggers FIRQ on main cpu */
93	93
94	94	/* This function takes multiple parameters */
95	95	if (in_math==1) {
r4679	r4680
125	125
126	126	/******************************************************************************/
127	127
128		static ADDRESS_MAP_START( readmem, ADDRESS_SPACE_PROGRAM, 8 )
129		AM_RANGE(0x0000, 0x0fff) AM_READ(SMH_RAM)
130		AM_RANGE(0x1000, 0x13ff) AM_READ(SMH_RAM)
131		AM_RANGE(0x1800, 0x1bff) AM_READ(SMH_RAM)
132		AM_RANGE(0x2000, 0x20ff) AM_READ(SMH_RAM)
	128	static ADDRESS_MAP_START( sidepckt_map, ADDRESS_SPACE_PROGRAM, 8 )
	129	AM_RANGE(0x0000, 0x0fff) AM_RAM
	130	AM_RANGE(0x1000, 0x13ff) AM_RAM_WRITE(sidepckt_videoram_w) AM_BASE(&videoram) AM_SIZE(&videoram_size)
	131	AM_RANGE(0x1400, 0x17ff) AM_RAM // ???
	132	AM_RANGE(0x1800, 0x1bff) AM_RAM_WRITE(sidepckt_colorram_w) AM_BASE(&colorram)
	133	AM_RANGE(0x1c00, 0x1fff) AM_RAM // ???
	134	AM_RANGE(0x2000, 0x20ff) AM_RAM AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
	135	AM_RANGE(0x2100, 0x24ff) AM_RAM // ???
133	136	AM_RANGE(0x3000, 0x3000) AM_READ_PORT("P1")
134	137	AM_RANGE(0x3001, 0x3001) AM_READ_PORT("P2")
135	138	AM_RANGE(0x3002, 0x3002) AM_READ_PORT("DSW1")
136	139	AM_RANGE(0x3003, 0x3003) AM_READ_PORT("DSW2")
137		AM_RANGE(0x3014, 0x3014) AM_READ(sidepckt_i8751_r)
138		AM_RANGE(0x4000, 0xffff) AM_READ(SMH_ROM)
139		ADDRESS_MAP_END
140
141		static ADDRESS_MAP_START( writemem, ADDRESS_SPACE_PROGRAM, 8 )
142		AM_RANGE(0x0000, 0x0fff) AM_WRITE(SMH_RAM)
143		AM_RANGE(0x1000, 0x13ff) AM_WRITE(sidepckt_videoram_w) AM_BASE(&videoram) AM_SIZE(&videoram_size)
144		AM_RANGE(0x1800, 0x1bff) AM_WRITE(sidepckt_colorram_w) AM_BASE(&colorram)
145		AM_RANGE(0x2000, 0x20ff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
146	140	AM_RANGE(0x3004, 0x3004) AM_WRITE(sound_cpu_command_w)
147		AM_RANGE(0x300c, 0x300c) AM_WRITE(sidepckt_flipscreen_w)
148		AM_RANGE(0x3018, 0x3018) AM_WRITE(sidepckt_i8751_w)
149		AM_RANGE(0x4000, 0xffff) AM_WRITE(SMH_ROM)
	141	AM_RANGE(0x300c, 0x300c) AM_READNOP AM_WRITE(sidepckt_flipscreen_w)
	142	//  AM_RANGE(0x3014, 0x3014) //i8751 read
	143	//  AM_RANGE(0x3018, 0x3018) //i8751 write
	144	AM_RANGE(0x4000, 0xffff) AM_ROM
150	145	ADDRESS_MAP_END
151	146
152		static ADDRESS_MAP_START( j_writemem, ADDRESS_SPACE_PROGRAM, 8 )
153		AM_RANGE(0x0000, 0x0fff) AM_WRITE(SMH_RAM)
154		AM_RANGE(0x1000, 0x13ff) AM_WRITE(sidepckt_videoram_w) AM_BASE(&videoram) AM_SIZE(&videoram_size)
155		AM_RANGE(0x1800, 0x1bff) AM_WRITE(sidepckt_colorram_w) AM_BASE(&colorram)
156		AM_RANGE(0x2000, 0x20ff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram) AM_SIZE(&spriteram_size)
157		AM_RANGE(0x3004, 0x3004) AM_WRITE(sound_cpu_command_w)
158		AM_RANGE(0x300c, 0x300c) AM_WRITE(sidepckt_flipscreen_w)
159		AM_RANGE(0x3018, 0x3018) AM_WRITE(sidepctj_i8751_w)
160		AM_RANGE(0x4000, 0xffff) AM_WRITE(SMH_ROM)
	147	static ADDRESS_MAP_START( sound_map, ADDRESS_SPACE_PROGRAM, 8 )
	148	AM_RANGE(0x0000, 0x0fff) AM_RAM
	149	AM_RANGE(0x1000, 0x1001) AM_DEVWRITE("ym1", ym2203_w)
	150	AM_RANGE(0x2000, 0x2001) AM_DEVWRITE("ym2", ym3526_w)
	151	AM_RANGE(0x3000, 0x3000) AM_READ(soundlatch_r)
	152	AM_RANGE(0x8000, 0xffff) AM_ROM
161	153	ADDRESS_MAP_END
162	154
163		static ADDRESS_MAP_START( sound_readmem, ADDRESS_SPACE_PROGRAM, 8 )
164		AM_RANGE(0x0000, 0x0fff) AM_READ(SMH_RAM)
165		AM_RANGE(0x3000, 0x3000) AM_READ(soundlatch_r)
166		AM_RANGE(0x8000, 0xffff) AM_READ(SMH_ROM)
167		ADDRESS_MAP_END
168	155
169		static ADDRESS_MAP_START( sound_writemem, ADDRESS_SPACE_PROGRAM, 8 )
170		AM_RANGE(0x0000, 0x0fff) AM_WRITE(SMH_RAM)
171		AM_RANGE(0x1000, 0x1001) AM_DEVWRITE("ym1", ym2203_w)
172		AM_RANGE(0x2000, 0x2001) AM_DEVWRITE("ym2", ym3526_w)
173		AM_RANGE(0x8000, 0xffff) AM_WRITE(SMH_ROM)
174		ADDRESS_MAP_END
175
176	156	/******************************************************************************/
177	157
178	158	static INPUT_PORTS_START( sidepckt )
r4679	r4680
277	257	/* handler called by the 3526 emulator when the internal timers cause an IRQ */
278	258	static void irqhandler(const device_config *device, int linestate)
279	259	{
280		cpu_set_input_line(device->machine->cpu[1],0,linestate);
	260	cputag_set_input_line(device->machine, "audiocpu", 0, linestate);
281	261	}
282	262
283	263	static const ym3526_interface ym3526_config =
r4679	r4680
291	271
292	272	/* basic machine hardware */
293	273	MDRV_CPU_ADD("maincpu", M6809, 2000000)        /* 2 MHz */
294		MDRV_CPU_PROGRAM_MAP(readmem,writemem)
	274	MDRV_CPU_PROGRAM_MAP(sidepckt_map,0)
295	275	MDRV_CPU_VBLANK_INT("screen", nmi_line_pulse)
296	276
297	277	MDRV_CPU_ADD("audiocpu", M6502, 1500000)        /* 1.5 MHz */
298		MDRV_CPU_PROGRAM_MAP(sound_readmem,sound_writemem)
	278	MDRV_CPU_PROGRAM_MAP(sound_map,0)
299	279	/* NMIs are triggered by the main cpu */
300	280
301	281	/* video hardware */
r4679	r4680
325	305	MACHINE_DRIVER_END
326	306
327	307
328		static MACHINE_DRIVER_START( sidepctj )
329
330		/* basic machine hardware */
331		MDRV_CPU_ADD("maincpu", M6809, 2000000)        /* 2 MHz */
332		MDRV_CPU_PROGRAM_MAP(readmem,j_writemem)
333		MDRV_CPU_VBLANK_INT("screen", nmi_line_pulse)
334
335		MDRV_CPU_ADD("audiocpu", M6502, 1500000)        /* 1.5 MHz */
336		MDRV_CPU_PROGRAM_MAP(sound_readmem,sound_writemem)
337		/* NMIs are triggered by the main cpu */
338
339		/* video hardware */
340		MDRV_SCREEN_ADD("screen", RASTER)
341		MDRV_SCREEN_REFRESH_RATE(58)
342		MDRV_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(2500) /* not accurate */  /* VERIFY:  May be 55 or 56 */)
343		MDRV_SCREEN_FORMAT(BITMAP_FORMAT_INDEXED16)
344		MDRV_SCREEN_SIZE(32*8, 32*8)
345		MDRV_SCREEN_VISIBLE_AREA(0*8, 32*8-1, 2*8, 30*8-1)
346
347		MDRV_GFXDECODE(sidepckt)
348		MDRV_PALETTE_LENGTH(256)
349
350		MDRV_PALETTE_INIT(sidepckt)
351		MDRV_VIDEO_START(sidepckt)
352		MDRV_VIDEO_UPDATE(sidepckt)
353
354		/* sound hardware */
355		MDRV_SPEAKER_STANDARD_MONO("mono")
356
357		MDRV_SOUND_ADD("ym1", YM2203, 1500000)
358		MDRV_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.25)
359
360		MDRV_SOUND_ADD("ym2", YM3526, 3000000)
361		MDRV_SOUND_CONFIG(ym3526_config)
362		MDRV_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.0)
363		MACHINE_DRIVER_END
364
365	308	/***************************************************************************
366	309
367	310	Game driver(s)
r4679	r4680
375	318	ROM_REGION( 0x10000, "audiocpu", 0 )
376	319	ROM_LOAD( "dh04.bin",     0x08000, 0x8000, CRC(d076e62e) SHA1(720ff1a6a58697b4a9c7c4f31c24a2cf8a04900a) )
377	320
	321	ROM_REGION( 0x10000, "mcu", 0 ) //i8751 MCU
	322	ROM_LOAD( "i8751.mcu",     0x00000, 0x8000, NO_DUMP )
	323
378	324	ROM_REGION( 0x18000, "gfx1", ROMREGION_DISPOSE )
379	325	ROM_LOAD( "sp_07.bin",    0x00000, 0x8000, CRC(9d6f7969) SHA1(583852be0861a89c63ce09eb39146ec379b9e12d) ) /* characters */
380	326	ROM_LOAD( "sp_06.bin",    0x08000, 0x8000, CRC(580e4e43) SHA1(de152a5d4fbc52d80e3eb9af17835ecb6258d45e) )
r4679	r4680
397	343	ROM_REGION( 0x10000, "audiocpu", 0 )
398	344	ROM_LOAD( "dh04.bin",     0x08000, 0x8000, CRC(d076e62e) SHA1(720ff1a6a58697b4a9c7c4f31c24a2cf8a04900a) )
399	345
	346	ROM_REGION( 0x10000, "mcu", 0 ) //i8751 MCU
	347	ROM_LOAD( "i8751.mcu",     0x00000, 0x8000, NO_DUMP )
	348
400	349	ROM_REGION( 0x18000, "gfx1", ROMREGION_DISPOSE )
401	350	ROM_LOAD( "dh07.bin",     0x00000, 0x8000, CRC(7d0ce858) SHA1(3a158f218a762e6841d2611f41ace67a1afefb35) ) /* characters */
402	351	ROM_LOAD( "dh06.bin",     0x08000, 0x8000, CRC(b86ddf72) SHA1(7596dd1b646971d8df1bc4fd157ccf161a712d59) )
r4679	r4680
436	385	ROM_END
437	386
438	387
	388	static DRIVER_INIT( sidepckt )
	389	{
	390	memory_install_read8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x3014, 0x3014, 0, 0, sidepckt_i8751_r );
	391	memory_install_write8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x3018, 0x3018, 0, 0, sidepckt_i8751_w  );
	392	}
439	393
440		GAME( 1986, sidepckt, 0,        sidepckt, sidepckt, 0, ROT0, "Data East Corporation", "Side Pocket (World)", 0 )
441		GAME( 1986, sidepctj, sidepckt, sidepctj, sidepckt, 0, ROT0, "Data East Corporation", "Side Pocket (Japan)", 0 )
442		GAME( 1986, sidepctb, sidepckt, sidepckt, sidepckt, 0, ROT0, "bootleg", "Side Pocket (bootleg)", 0 )
	394	static DRIVER_INIT( sidepctj )
	395	{
	396	memory_install_read8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x3014, 0x3014, 0, 0, sidepckt_i8751_r );
	397	memory_install_write8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x3018, 0x3018, 0, 0, sidepctj_i8751_w  );
	398	}
	399
	400
	401	GAME( 1986, sidepckt, 0,        sidepckt, sidepckt, sidepckt, ROT0, "Data East Corporation", "Side Pocket (World)", 0 )
	402	GAME( 1986, sidepctj, sidepckt, sidepckt, sidepckt, sidepctj, ROT0, "Data East Corporation", "Side Pocket (Japan)", 0 )
	403	GAME( 1986, sidepctb, sidepckt, sidepckt, sidepckt, 0,        ROT0, "bootleg", "Side Pocket (bootleg)", 0 )

src/mame/drivers/starwars.c

r4679	r4680
56	56	/* ESB-specific */
57	57	if (starwars_is_esb)
58	58	{
59		const address_space *space = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM);
	59	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
60	60
61	61	/* reset the slapstic */
62	62	slapstic_reset();
r4679	r4680
81	81
82	82	static WRITE8_HANDLER( irq_ack_w )
83	83	{
84		cpu_set_input_line(space->machine->cpu[0], M6809_IRQ_LINE, CLEAR_LINE);
	84	cputag_set_input_line(space->machine, "maincpu", M6809_IRQ_LINE, CLEAR_LINE);
85	85	}
86	86
87	87
r4679	r4680
496	496	static DRIVER_INIT( starwars )
497	497	{
498	498	/* X2212 nvram */
499		generic_nvram = auto_malloc(generic_nvram_size);
	499	generic_nvram = auto_alloc_array(machine, UINT8, generic_nvram_size);
500	500
501	501	/* prepare the mathbox */
502	502	starwars_is_esb = 0;
r4679	r4680
513	513	UINT8 *rom = memory_region(machine, "maincpu");
514	514
515	515	/* X2212 nvram */
516		generic_nvram = auto_malloc(generic_nvram_size);
	516	generic_nvram = auto_alloc_array(machine, UINT8, generic_nvram_size);
517	517
518	518	/* init the slapstic */
519	519	slapstic_init(machine, 101);
r4679	r4680
521	521	slapstic_base = &rom[0x08000];
522	522
523	523	/* install an opcode base handler */
524		memory_set_direct_update_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), esb_setdirect);
	524	memory_set_direct_update_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), esb_setdirect);
525	525
526	526	/* install read/write handlers for it */
527		memory_install_readwrite8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x8000, 0x9fff, 0, 0, esb_slapstic_r, esb_slapstic_w);
	527	memory_install_readwrite8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x8000, 0x9fff, 0, 0, esb_slapstic_r, esb_slapstic_w);
528	528
529	529	/* install additional banking */
530		memory_install_read8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0xa000, 0xffff, 0, 0, SMH_BANK2);
	530	memory_install_read8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xa000, 0xffff, 0, 0, (read8_space_func)SMH_BANK(2));
531	531
532	532	/* prepare the matrix processor */
533	533	starwars_is_esb = 1;

src/mame/drivers/wolfpack.c

r4679	r4680
35	35	{
36	36	int scanline = param;
37	37
38		cpu_set_input_line(machine->cpu[0], INPUT_LINE_NMI, PULSE_LINE);
	38	cputag_set_input_line(machine, "maincpu", INPUT_LINE_NMI, PULSE_LINE);
39	39
40	40	scanline += 64;
41	41

src/mame/drivers/pirates.c

r4679	r4680
155	155	602e and 62a6 */
156	156	/* For Genix, see 6576 for setting values and 67c2,d3b4 and dbc2 for tests. */
157	157
158		if (cpu_get_pc(field->port->machine->cpu[0]) == 0x6134)
	158	if (cpu_get_pc(cputag_get_cpu(field->port->machine, "main")) == 0x6134)
159	159	{
160	160	bit = prot & 1;
161	161	prot = (prot >> 1) | (bit << 7);
162	162	}
163		else if (cpu_get_pc(field->port->machine->cpu[0]) == 0x6020)
	163	else if (cputag_get_cpu(field->port->machine, "main")) == 0x6020)
164	164	bit = 0;
165		else if (cpu_get_pc(field->port->machine->cpu[0]) == 0x6168)
	165	else if (cputag_get_cpu(field->port->machine, "main")) == 0x6168)
166	166	bit = 0;
167		else if (cpu_get_pc(field->port->machine->cpu[0]) == 0x61cc)
	167	else if (cputag_get_cpu(field->port->machine, "main")) == 0x61cc)
168	168	bit = 1;
169	169	else
170	170	#endif
r4679	r4680
177	177
178	178	/* Memory Maps */
179	179
180		static ADDRESS_MAP_START( pirates_readmem, ADDRESS_SPACE_PROGRAM, 16 )
181		AM_RANGE(0x000000, 0x0fffff) AM_READ(SMH_ROM)
182		AM_RANGE(0x100000, 0x10ffff) AM_READ(SMH_RAM)
	180	static ADDRESS_MAP_START( pirates_map, ADDRESS_SPACE_PROGRAM, 16 )
	181	AM_RANGE(0x000000, 0x0fffff) AM_ROM
	182	AM_RANGE(0x100000, 0x10ffff) AM_RAM // main ram
183	183	AM_RANGE(0x300000, 0x300001) AM_READ_PORT("INPUTS")
184	184	AM_RANGE(0x400000, 0x400001) AM_READ_PORT("SYSTEM")
185		//  AM_RANGE(0x500000, 0x5007ff) AM_READ(SMH_RAM)
186		AM_RANGE(0x800000, 0x803fff) AM_READ(SMH_RAM)
187		//  AM_RANGE(0x900000, 0x903fff) AM_READ(SMH_RAM)
188		AM_RANGE(0xa00000, 0xa00001) AM_DEVREAD8("oki", okim6295_r, 0x00ff)
189		ADDRESS_MAP_END
190
191		static ADDRESS_MAP_START( pirates_writemem, ADDRESS_SPACE_PROGRAM, 16 )
192		AM_RANGE(0x000000, 0x0fffff) AM_WRITE(SMH_ROM)
193		AM_RANGE(0x100000, 0x10ffff) AM_WRITE(SMH_RAM) // main ram
194		AM_RANGE(0x500000, 0x5007ff) AM_WRITE(SMH_RAM) AM_BASE(&pirates_spriteram)
195		//  AM_RANGE(0x500800, 0x50080f) AM_WRITE(SMH_RAM)
	185	//  AM_RANGE(0x500000, 0x5007ff) AM_RAM
	186	AM_RANGE(0x500000, 0x5007ff) AM_WRITEONLY AM_BASE(&pirates_spriteram)
	187	//  AM_RANGE(0x500800, 0x50080f) AM_WRITENOP
196	188	AM_RANGE(0x600000, 0x600001) AM_WRITE(pirates_out_w)
197		AM_RANGE(0x700000, 0x700001) AM_WRITE(SMH_RAM) AM_BASE(&pirates_scroll)   // scroll reg
198		AM_RANGE(0x800000, 0x803fff) AM_WRITE(paletteram16_xRRRRRGGGGGBBBBB_word_w) AM_BASE(&paletteram16)
199		AM_RANGE(0x900000, 0x90017f) AM_WRITE(SMH_RAM)  // more of tilemaps ?
200		AM_RANGE(0x900180, 0x90137f) AM_WRITE(pirates_tx_tileram_w) AM_BASE(&pirates_tx_tileram)
201		AM_RANGE(0x901380, 0x902a7f) AM_WRITE(pirates_fg_tileram_w) AM_BASE(&pirates_fg_tileram)
202		//  AM_RANGE(0x902580, 0x902a7f) AM_WRITE(SMH_RAM)  // more of tilemaps ?
203		AM_RANGE(0x902a80, 0x904187) AM_WRITE(pirates_bg_tileram_w) AM_BASE(&pirates_bg_tileram)
204		//  AM_RANGE(0x903c80, 0x904187) AM_WRITE(SMH_RAM)  // more of tilemaps ?
205		AM_RANGE(0xa00000, 0xa00001) AM_DEVWRITE8("oki", okim6295_w, 0x00ff)
	189	AM_RANGE(0x700000, 0x700001) AM_WRITEONLY AM_BASE(&pirates_scroll)   // scroll reg
	190	AM_RANGE(0x800000, 0x803fff) AM_RAM_WRITE(paletteram16_xRRRRRGGGGGBBBBB_word_w) AM_BASE(&paletteram16)
	191	AM_RANGE(0x900000, 0x90017f) AM_RAM  // more of tilemaps ?
	192	AM_RANGE(0x900180, 0x90137f) AM_RAM_WRITE(pirates_tx_tileram_w) AM_BASE(&pirates_tx_tileram)
	193	AM_RANGE(0x901380, 0x902a7f) AM_RAM_WRITE(pirates_fg_tileram_w) AM_BASE(&pirates_fg_tileram)
	194	//  AM_RANGE(0x902580, 0x902a7f) AM_RAM  // more of tilemaps ?
	195	AM_RANGE(0x902a80, 0x904187) AM_RAM_WRITE(pirates_bg_tileram_w) AM_BASE(&pirates_bg_tileram)
	196	//  AM_RANGE(0x903c80, 0x904187) AM_RAM  // more of tilemaps ?
	197	AM_RANGE(0xa00000, 0xa00001) AM_DEVREADWRITE8("oki", okim6295_r,okim6295_w, 0x00ff)
206	198	ADDRESS_MAP_END
207	199
208	200
209
210	201	/* Input Ports */
211	202
212	203	static INPUT_PORTS_START( pirates )
r4679	r4680
286	277
287	278	static MACHINE_DRIVER_START( pirates )
288	279	MDRV_CPU_ADD("maincpu", M68000, 16000000) /* 16mhz */
289		MDRV_CPU_PROGRAM_MAP(pirates_readmem,pirates_writemem)
	280	MDRV_CPU_PROGRAM_MAP(pirates_map,0)
290	281	MDRV_CPU_VBLANK_INT("screen", irq1_line_hold)
291	282
292	283	MDRV_NVRAM_HANDLER(pirates)
r4679	r4680
370	361
371	362	rom_size = memory_region_length(machine, "maincpu");
372	363
373		buf = malloc_or_die(rom_size);
	364	buf = alloc_array_or_die(UINT16, rom_size/2);
374	365
375	366	rom = (UINT16 *)memory_region(machine, "maincpu");
376	367	memcpy (buf, rom, rom_size);
r4679	r4680
399	390
400	391	rom_size = memory_region_length(machine, "gfx1");
401	392
402		buf = malloc_or_die(rom_size);
	393	buf = alloc_array_or_die(UINT8, rom_size);
403	394
404	395	rom = memory_region(machine, "gfx1");
405	396	memcpy (buf, rom, rom_size);
r4679	r4680
423	414
424	415	rom_size = memory_region_length(machine, "gfx2");
425	416
426		buf = malloc_or_die(rom_size);
	417	buf = alloc_array_or_die(UINT8, rom_size);
427	418
428	419	rom = memory_region(machine, "gfx2");
429	420	memcpy (buf, rom, rom_size);
r4679	r4680
448	439
449	440	rom_size = memory_region_length(machine, "oki");
450	441
451		buf = malloc_or_die(rom_size);
	442	buf = alloc_array_or_die(UINT8, rom_size);
452	443
453	444	rom = memory_region(machine, "oki");
454	445	memcpy (buf, rom, rom_size);
r4679	r4680
486	477
487	478	/* If this value is increased then something has gone wrong and the protection failed */
488	479	/* Write-protect it for now */
489		memory_install_read16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x109e98, 0x109e9b, 0, 0, genix_prot_r );
	480	memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x109e98, 0x109e9b, 0, 0, genix_prot_r );
490	481	}
491	482
492	483

src/mame/drivers/tankbatt.c

r4679	r4680
106	106	tankbatt_sound_enable = !data;
107	107	if (data != 0)
108	108	{
109		cpu_set_input_line(space->machine->cpu[0], 0, CLEAR_LINE);
110		cpu_set_input_line(space->machine->cpu[0], INPUT_LINE_NMI, CLEAR_LINE);
	109	cputag_set_input_line(space->machine, "maincpu", 0, CLEAR_LINE);
	110	cputag_set_input_line(space->machine, "maincpu", INPUT_LINE_NMI, CLEAR_LINE);
111	111	}
112	112	/* hack - turn off the engine noise if the normal game nmi's are disabled */
113	113	if (data) sample_stop (devtag_get_device(space->machine, "samples"), 2);
r4679	r4680
119	119	tankbatt_nmi_enable = data;
120	120	if (data != 0)
121	121	{
122		cpu_set_input_line(space->machine->cpu[0], 0, CLEAR_LINE);
123		cpu_set_input_line(space->machine->cpu[0], INPUT_LINE_NMI, CLEAR_LINE);
	122	cputag_set_input_line(space->machine, "maincpu", 0, CLEAR_LINE);
	123	cputag_set_input_line(space->machine, "maincpu", INPUT_LINE_NMI, CLEAR_LINE);
124	124	}
125	125	//  interrupt_enable_w (offset, data);
126	126	}

src/mame/drivers/exerion.c

r4679	r4680
39	39	static INPUT_CHANGED( coin_inserted )
40	40	{
41	41	/* coin insertion causes an NMI */
42		cpu_set_input_line(field->port->machine->cpu[0], INPUT_LINE_NMI, newval ? CLEAR_LINE : ASSERT_LINE);
	42	cputag_set_input_line(field->port->machine, "maincpu", INPUT_LINE_NMI, newval ? CLEAR_LINE : ASSERT_LINE);
43	43	}
44	44
45	45
r4679	r4680
417	417	UINT8 *src, *dst, *temp;
418	418
419	419	/* allocate some temporary space */
420		temp = malloc_or_die(0x10000);
	420	temp = alloc_array_or_die(UINT8, 0x10000);
421	421
422	422	/* make a temporary copy of the character data */
423	423	src = temp;

src/mame/drivers/mosaic.c

r4679	r4680
96	96
97	97
98	98
99		static ADDRESS_MAP_START( readmem, ADDRESS_SPACE_PROGRAM, 8 )
100		AM_RANGE(0x00000, 0x0ffff) AM_READ(SMH_ROM)
101		AM_RANGE(0x20000, 0x21fff) AM_READ(SMH_RAM)
102		AM_RANGE(0x22000, 0x23fff) AM_READ(SMH_RAM)
103		AM_RANGE(0x24000, 0x241ff) AM_READ(SMH_RAM)
	99	static ADDRESS_MAP_START( mosaic_map, ADDRESS_SPACE_PROGRAM, 8 )
	100	AM_RANGE(0x00000, 0x0ffff) AM_ROM
	101	AM_RANGE(0x20000, 0x21fff) AM_RAM
	102	AM_RANGE(0x22000, 0x22fff) AM_RAM_WRITE(mosaic_bgvideoram_w) AM_BASE(&mosaic_bgvideoram)
	103	AM_RANGE(0x23000, 0x23fff) AM_RAM_WRITE(mosaic_fgvideoram_w) AM_BASE(&mosaic_fgvideoram)
	104	AM_RANGE(0x24000, 0x241ff) AM_RAM_WRITE(paletteram_xRRRRRGGGGGBBBBB_le_w) AM_BASE(&paletteram)
104	105	ADDRESS_MAP_END
105	106
106		static ADDRESS_MAP_START( writemem, ADDRESS_SPACE_PROGRAM, 8 )
107		AM_RANGE(0x00000, 0x0ffff) AM_WRITE(SMH_ROM)
108		AM_RANGE(0x20000, 0x21fff) AM_WRITE(SMH_RAM)
109		AM_RANGE(0x22000, 0x22fff) AM_WRITE(mosaic_bgvideoram_w) AM_BASE(&mosaic_bgvideoram)
110		AM_RANGE(0x23000, 0x23fff) AM_WRITE(mosaic_fgvideoram_w) AM_BASE(&mosaic_fgvideoram)
111		AM_RANGE(0x24000, 0x241ff) AM_WRITE(paletteram_xRRRRRGGGGGBBBBB_le_w) AM_BASE(&paletteram)
	107	static ADDRESS_MAP_START( gfire2_map, ADDRESS_SPACE_PROGRAM, 8 )
	108	AM_RANGE(0x00000, 0x0ffff) AM_ROM
	109	AM_RANGE(0x10000, 0x17fff) AM_RAM
	110	AM_RANGE(0x22000, 0x22fff) AM_RAM_WRITE(mosaic_bgvideoram_w) AM_BASE(&mosaic_bgvideoram)
	111	AM_RANGE(0x23000, 0x23fff) AM_RAM_WRITE(mosaic_fgvideoram_w) AM_BASE(&mosaic_fgvideoram)
	112	AM_RANGE(0x24000, 0x241ff) AM_RAM_WRITE(paletteram_xRRRRRGGGGGBBBBB_le_w) AM_BASE(&paletteram)
112	113	ADDRESS_MAP_END
113	114
114		static ADDRESS_MAP_START( gfire2_readmem, ADDRESS_SPACE_PROGRAM, 8 )
115		AM_RANGE(0x00000, 0x0ffff) AM_READ(SMH_ROM)
116		AM_RANGE(0x10000, 0x17fff) AM_READ(SMH_RAM)
117		AM_RANGE(0x22000, 0x23fff) AM_READ(SMH_RAM)
118		AM_RANGE(0x24000, 0x241ff) AM_READ(SMH_RAM)
119		ADDRESS_MAP_END
120
121		static ADDRESS_MAP_START( gfire2_writemem, ADDRESS_SPACE_PROGRAM, 8 )
122		AM_RANGE(0x00000, 0x0ffff) AM_WRITE(SMH_ROM)
123		AM_RANGE(0x10000, 0x17fff) AM_WRITE(SMH_RAM)
124		AM_RANGE(0x22000, 0x22fff) AM_WRITE(mosaic_bgvideoram_w) AM_BASE(&mosaic_bgvideoram)
125		AM_RANGE(0x23000, 0x23fff) AM_WRITE(mosaic_fgvideoram_w) AM_BASE(&mosaic_fgvideoram)
126		AM_RANGE(0x24000, 0x241ff) AM_WRITE(paletteram_xRRRRRGGGGGBBBBB_le_w) AM_BASE(&paletteram)
127		ADDRESS_MAP_END
128
129
130		static ADDRESS_MAP_START( io_map, ADDRESS_SPACE_IO, 8 )
	115	static ADDRESS_MAP_START( mosaic_io_map, ADDRESS_SPACE_IO, 8 )
131	116	ADDRESS_MAP_GLOBAL_MASK(0xff)
132	117	AM_RANGE(0x00, 0x3f) AM_WRITENOP   /* Z180 internal registers */
133	118	AM_RANGE(0x30, 0x30) AM_READNOP   /* Z180 internal registers */
r4679	r4680
275	260
276	261	static MACHINE_DRIVER_START( mosaic )
277	262	MDRV_CPU_ADD("maincpu", Z180, 7000000)   /* ??? */
278		MDRV_CPU_PROGRAM_MAP(readmem,writemem)
279		MDRV_CPU_IO_MAP(io_map,0)
	263	MDRV_CPU_PROGRAM_MAP(mosaic_map,0)
	264	MDRV_CPU_IO_MAP(mosaic_io_map,0)
280	265	MDRV_CPU_VBLANK_INT("screen", irq0_line_hold)
281	266
282	267	/* video hardware */
r4679	r4680
304	289	static MACHINE_DRIVER_START( gfire2 )
305	290	MDRV_IMPORT_FROM(mosaic)
306	291	MDRV_CPU_MODIFY("maincpu")
307		MDRV_CPU_PROGRAM_MAP(gfire2_readmem,gfire2_writemem)
	292	MDRV_CPU_PROGRAM_MAP(gfire2_map,0)
308	293	MDRV_CPU_IO_MAP(gfire2_io_map,0)
309	294	MACHINE_DRIVER_END
310	295

src/mame/drivers/segas18.c

r4679	r4680
92	92
93	93	static const segaic16_memory_map_entry rom_171_shad_info[] =
94	94	{
95		{ 0x3d/2, 0x00000, 0x04000, 0xffc000,      ~0, misc_io_r,      misc_io_w,             NULL,                  "I/O space" },
96		{ 0x39/2, 0x00000, 0x02000, 0xffe000,      ~0, SMH_BANK10,     segaic16_paletteram_w, &paletteram16,         "color RAM" },
97		{ 0x35/2, 0x00000, 0x10000, 0xfe0000,      ~0, SMH_BANK11,     segaic16_tileram_0_w,  &segaic16_tileram_0,   "tile RAM" },
98		{ 0x35/2, 0x10000, 0x01000, 0xfef000,      ~0, SMH_BANK12,     segaic16_textram_0_w,  &segaic16_textram_0,   "text RAM" },
99		{ 0x31/2, 0x00000, 0x00800, 0xfff800,      ~0, SMH_BANK13,     SMH_BANK13,            &segaic16_spriteram_0, "object RAM" },
100		{ 0x2d/2, 0x00000, 0x04000, 0xffc000,      ~0, SMH_BANK14,     SMH_BANK14,            &workram,              "work RAM" },
101		{ 0x29/2, 0x00000, 0x10000, 0xff0000,      ~0, NULL,           NULL,                  NULL,                  "????" },
102		{ 0x25/2, 0x00000, 0x00010, 0xfffff0,      ~0, genesis_vdp_r,  genesis_vdp_w,         NULL,                  "VDP" },
103		{ 0x21/2, 0x00000, 0x80000, 0xf80000, 0x00000, SMH_BANK17,     SMH_UNMAP,             NULL,                  "ROM 0" },
	95	{ 0x3d/2, 0x00000, 0x04000, 0xffc000,      ~0, misc_io_r,                       misc_io_w,                        NULL,                  "I/O space" },
	96	{ 0x39/2, 0x00000, 0x02000, 0xffe000,      ~0, (read16_space_func)SMH_BANK(10), segaic16_paletteram_w,            &paletteram16,         "color RAM" },
	97	{ 0x35/2, 0x00000, 0x10000, 0xfe0000,      ~0, (read16_space_func)SMH_BANK(11), segaic16_tileram_0_w,             &segaic16_tileram_0,   "tile RAM" },
	98	{ 0x35/2, 0x10000, 0x01000, 0xfef000,      ~0, (read16_space_func)SMH_BANK(12), segaic16_textram_0_w,             &segaic16_textram_0,   "text RAM" },
	99	{ 0x31/2, 0x00000, 0x00800, 0xfff800,      ~0, (read16_space_func)SMH_BANK(13), (write16_space_func)SMH_BANK(13), &segaic16_spriteram_0, "object RAM" },
	100	{ 0x2d/2, 0x00000, 0x04000, 0xffc000,      ~0, (read16_space_func)SMH_BANK(14), (write16_space_func)SMH_BANK(14), &workram,              "work RAM" },
	101	{ 0x29/2, 0x00000, 0x10000, 0xff0000,      ~0, NULL,                            NULL,                             NULL,                  "????" },
	102	{ 0x25/2, 0x00000, 0x00010, 0xfffff0,      ~0, genesis_vdp_r,                   genesis_vdp_w,                    NULL,                  "VDP" },
	103	{ 0x21/2, 0x00000, 0x80000, 0xf80000, 0x00000, (read16_space_func)SMH_BANK(17), (write16_space_func)SMH_UNMAP,    NULL,                  "ROM 0" },
104	104	{ 0 }
105	105	};
106	106
107	107	static const segaic16_memory_map_entry rom_171_5874_info[] =
108	108	{
109		{ 0x3d/2, 0x00000, 0x04000, 0xffc000,      ~0, misc_io_r,      misc_io_w,             NULL,                  "I/O space" },
110		{ 0x39/2, 0x00000, 0x02000, 0xffe000,      ~0, SMH_BANK10,     segaic16_paletteram_w, &paletteram16,         "color RAM" },
111		{ 0x35/2, 0x00000, 0x10000, 0xfe0000,      ~0, SMH_BANK11,     segaic16_tileram_0_w,  &segaic16_tileram_0,   "tile RAM" },
112		{ 0x35/2, 0x10000, 0x01000, 0xfef000,      ~0, SMH_BANK12,     segaic16_textram_0_w,  &segaic16_textram_0,   "text RAM" },
113		{ 0x31/2, 0x00000, 0x00800, 0xfff800,      ~0, SMH_BANK13,     SMH_BANK13,            &segaic16_spriteram_0, "object RAM" },
114		{ 0x2d/2, 0x00000, 0x04000, 0xffc000,      ~0, SMH_BANK14,     SMH_BANK14,            &workram,              "work RAM" },
115		{ 0x29/2, 0x00000, 0x00010, 0xfffff0,      ~0, genesis_vdp_r,  genesis_vdp_w,         NULL,                  "VDP" },
116		{ 0x25/2, 0x00000, 0x80000, 0xf80000, 0x80000, SMH_BANK16,     SMH_UNMAP,             NULL,                  "ROM 1" },
117		{ 0x21/2, 0x00000, 0x80000, 0xf80000, 0x00000, SMH_BANK17,     SMH_UNMAP,             NULL,                  "ROM 0" },
	109	{ 0x3d/2, 0x00000, 0x04000, 0xffc000,      ~0, misc_io_r,                       misc_io_w,                        NULL,                  "I/O space" },
	110	{ 0x39/2, 0x00000, 0x02000, 0xffe000,      ~0, (read16_space_func)SMH_BANK(10), segaic16_paletteram_w,            &paletteram16,         "color RAM" },
	111	{ 0x35/2, 0x00000, 0x10000, 0xfe0000,      ~0, (read16_space_func)SMH_BANK(11), segaic16_tileram_0_w,             &segaic16_tileram_0,   "tile RAM" },
	112	{ 0x35/2, 0x10000, 0x01000, 0xfef000,      ~0, (read16_space_func)SMH_BANK(12), segaic16_textram_0_w,             &segaic16_textram_0,   "text RAM" },
	113	{ 0x31/2, 0x00000, 0x00800, 0xfff800,      ~0, (read16_space_func)SMH_BANK(13), (write16_space_func)SMH_BANK(13), &segaic16_spriteram_0, "object RAM" },
	114	{ 0x2d/2, 0x00000, 0x04000, 0xffc000,      ~0, (read16_space_func)SMH_BANK(14), (write16_space_func)SMH_BANK(14), &workram,              "work RAM" },
	115	{ 0x29/2, 0x00000, 0x00010, 0xfffff0,      ~0, genesis_vdp_r,                   genesis_vdp_w,                    NULL,                  "VDP" },
	116	{ 0x25/2, 0x00000, 0x80000, 0xf80000, 0x80000, (read16_space_func)SMH_BANK(16), (write16_space_func)SMH_UNMAP,    NULL,                  "ROM 1" },
	117	{ 0x21/2, 0x00000, 0x80000, 0xf80000, 0x00000, (read16_space_func)SMH_BANK(17), (write16_space_func)SMH_UNMAP,    NULL,                  "ROM 0" },
118	118	{ 0 }
119	119	};
120	120
121	121	static const segaic16_memory_map_entry rom_171_5987_info[] =
122	122	{
123		{ 0x3d/2, 0x00000, 0x04000, 0xffc000,      ~0, misc_io_r,      misc_io_w,             NULL,                  "I/O space" },
124		{ 0x39/2, 0x00000, 0x02000, 0xffe000,      ~0, SMH_BANK10,     segaic16_paletteram_w, &paletteram16,         "color RAM" },
125		{ 0x35/2, 0x00000, 0x10000, 0xfe0000,      ~0, SMH_BANK11,     segaic16_tileram_0_w,  &segaic16_tileram_0,   "tile RAM" },
126		{ 0x35/2, 0x10000, 0x01000, 0xfef000,      ~0, SMH_BANK12,     segaic16_textram_0_w,  &segaic16_textram_0,   "text RAM" },
127		{ 0x31/2, 0x00000, 0x00800, 0xfff800,      ~0, SMH_BANK13,     SMH_BANK13,            &segaic16_spriteram_0, "object RAM" },
128		{ 0x2d/2, 0x00000, 0x04000, 0xffc000,      ~0, SMH_BANK14,     SMH_BANK14,            &workram,              "work RAM" },
129		{ 0x29/2, 0x00000, 0x00010, 0xfffff0,      ~0, genesis_vdp_r,  genesis_vdp_w,         NULL,                  "VDP" },
130		{ 0x25/2, 0x00000, 0x80000, 0xf80000, 0x80000, SMH_BANK16,     rom_5987_bank_w,       NULL,                  "ROM 1/banking" },
131		{ 0x21/2, 0x00000, 0x100000,0xf00000, 0x00000, SMH_BANK17,     SMH_UNMAP,             NULL,                  "ROM 0" },
	123	{ 0x3d/2, 0x00000, 0x04000, 0xffc000,      ~0, misc_io_r,                       misc_io_w,                        NULL,                  "I/O space" },
	124	{ 0x39/2, 0x00000, 0x02000, 0xffe000,      ~0, (read16_space_func)SMH_BANK(10), segaic16_paletteram_w,            &paletteram16,         "color RAM" },
	125	{ 0x35/2, 0x00000, 0x10000, 0xfe0000,      ~0, (read16_space_func)SMH_BANK(11), segaic16_tileram_0_w,             &segaic16_tileram_0,   "tile RAM" },
	126	{ 0x35/2, 0x10000, 0x01000, 0xfef000,      ~0, (read16_space_func)SMH_BANK(12), segaic16_textram_0_w,             &segaic16_textram_0,   "text RAM" },
	127	{ 0x31/2, 0x00000, 0x00800, 0xfff800,      ~0, (read16_space_func)SMH_BANK(13), (write16_space_func)SMH_BANK(13), &segaic16_spriteram_0, "object RAM" },
	128	{ 0x2d/2, 0x00000, 0x04000, 0xffc000,      ~0, (read16_space_func)SMH_BANK(14), (write16_space_func)SMH_BANK(14), &workram,              "work RAM" },
	129	{ 0x29/2, 0x00000, 0x00010, 0xfffff0,      ~0, genesis_vdp_r,                   genesis_vdp_w,                    NULL,                  "VDP" },
	130	{ 0x25/2, 0x00000, 0x80000, 0xf80000, 0x80000, (read16_space_func)SMH_BANK(16), rom_5987_bank_w,                  NULL,                  "ROM 1/banking" },
	131	{ 0x21/2, 0x00000, 0x100000,0xf00000, 0x00000, (read16_space_func)SMH_BANK(17), (write16_space_func)SMH_UNMAP,    NULL,                  "ROM 0" },
132	132	{ 0 }
133	133	};
134	134
r4679	r4680
149	149
150	150	static void sound_w(running_machine *machine, UINT8 data)
151	151	{
152		const address_space *space = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM);
	152	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
153	153	soundlatch_w(space, 0, data & 0xff);
154		cpu_set_input_line(machine->cpu[1], INPUT_LINE_NMI, PULSE_LINE);
	154	cputag_set_input_line(machine, "soundcpu", INPUT_LINE_NMI, PULSE_LINE);
155	155	}
156	156
157	157
r4679	r4680
167	167	rom_board = _rom_board;
168	168
169	169	/* allocate memory for regions not autmatically assigned */
170		segaic16_spriteram_0 = auto_malloc(0x00800);
171		paletteram16         = auto_malloc(0x04000);
172		segaic16_tileram_0   = auto_malloc(0x10000);
173		segaic16_textram_0   = auto_malloc(0x01000);
174		workram              = auto_malloc(0x04000);
	170	segaic16_spriteram_0 = auto_alloc_array(machine, UINT16, 0x00800/2);
	171	paletteram16         = auto_alloc_array(machine, UINT16, 0x04000/2);
	172	segaic16_tileram_0   = auto_alloc_array(machine, UINT16, 0x10000/2);
	173	segaic16_textram_0   = auto_alloc_array(machine, UINT16, 0x01000/2);
	174	workram              = auto_alloc_array(machine, UINT16, 0x04000/2);
175	175
176	176	/* init the memory mapper */
177	177	segaic16_memory_mapper_init(cputag_get_cpu(machine, "maincpu"), region_info_list[rom_board], sound_w, sound_r);
r4679	r4680
202	202	{
203	203	segaic16_memory_mapper_reset(machine);
204	204	segaic16_tilemap_reset(machine, 0);
205		fd1094_machine_init(machine->cpu[0]);
	205	fd1094_machine_init(cputag_get_cpu(machine, "maincpu"));
206	206
207	207	/* if we are running with a real live 8751, we need to boost the interleave at startup */
208		if (machine->cpu[2] != NULL && cpu_get_type(machine->cpu[2]) == CPU_I8751)
	208	if (cputag_get_cpu(machine, "mcu") != NULL && cpu_get_type(cputag_get_cpu(machine, "mcu")) == CPU_I8751)
209	209	timer_call_after_resynch(machine, NULL, 0, boost_interleave);
210	210	}
211	211
r4679	r4680
561	561	static WRITE8_HANDLER( mcu_data_w )
562	562	{
563	563	mcu_data = data;
564		cpu_set_input_line(space->machine->cpu[2], MCS51_INT1_LINE, HOLD_LINE);
	564	cputag_set_input_line(space->machine, "mcu", MCS51_INT1_LINE, HOLD_LINE);
565	565	}
566	566
567	567

src/mame/drivers/ltcasino.c

r4679	r4680
54	54	}
55	55
56	56
57		static ADDRESS_MAP_START( readmem, ADDRESS_SPACE_PROGRAM, 8 )
58		AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_RAM)
59		AM_RANGE(0x8000, 0xcfff) AM_READ(SMH_ROM)
60		AM_RANGE(0xd000, 0xd7ff) AM_READ(SMH_RAM)
61		AM_RANGE(0xd800, 0xdfff) AM_READ(SMH_RAM)
	57	static ADDRESS_MAP_START( ltcasino_map, ADDRESS_SPACE_PROGRAM, 8 )
	58	AM_RANGE(0x0000, 0x7fff) AM_RAM
	59	AM_RANGE(0x8000, 0xcfff) AM_ROM
	60	AM_RANGE(0xd000, 0xd7ff) AM_RAM_WRITE(ltcasino_tile_num_w) AM_BASE(&ltcasino_tile_num_ram)
	61	AM_RANGE(0xd800, 0xdfff) AM_RAM
	62	AM_RANGE(0xe000, 0xe7ff) AM_RAM_WRITE(ltcasino_tile_atr_w) AM_BASE(&ltcasino_tile_atr_ram)
	63	AM_RANGE(0xe800, 0xebff) AM_RAM
62	64
63		AM_RANGE(0xe000, 0xe7ff) AM_READ(SMH_RAM)
64		AM_RANGE(0xe800, 0xebff) AM_READ(SMH_RAM)
65
66	65	AM_RANGE(0xec00, 0xec00) AM_READ_PORT("IN0")
67	66	AM_RANGE(0xec01, 0xec01) AM_READ_PORT("IN1")
68	67	AM_RANGE(0xec02, 0xec02) AM_READ_PORT("IN2")
r4679	r4680
72	71
73	72	AM_RANGE(0xec20, 0xec20) AM_DEVREAD("ay", ay8910_r)
74	73	AM_RANGE(0xec21, 0xec21) AM_READ_PORT("BUTTONS") //ltcasino -> pc: F3F3 (A in service) and F3FD (B in service)
	74	AM_RANGE(0xec20, 0xec21) AM_DEVWRITE("ay", ay8910_data_address_w)
75	75	AM_RANGE(0xec3e, 0xec3e) AM_READNOP //not used
76
77		AM_RANGE(0xf000, 0xffff) AM_READ(SMH_ROM)
	76	AM_RANGE(0xec30, 0xec3f) AM_RAM
	77	AM_RANGE(0xf000, 0xffff) AM_ROM
78	78	ADDRESS_MAP_END
79	79
80		static ADDRESS_MAP_START( writemem, ADDRESS_SPACE_PROGRAM, 8 )
81		AM_RANGE(0x0000, 0x7fff) AM_WRITE(SMH_RAM)
82		AM_RANGE(0x8000, 0xcfff) AM_WRITE(SMH_ROM)
83	80
84		AM_RANGE(0xd000, 0xd7ff) AM_WRITE(ltcasino_tile_num_w) AM_BASE(&ltcasino_tile_num_ram)
85		AM_RANGE(0xd800, 0xdfff) AM_WRITE(SMH_RAM)
86		AM_RANGE(0xe000, 0xe7ff) AM_WRITE(ltcasino_tile_atr_w) AM_BASE(&ltcasino_tile_atr_ram)
87		AM_RANGE(0xe800, 0xebff) AM_WRITE(SMH_RAM)
88
89		AM_RANGE(0xec20, 0xec21) AM_DEVWRITE("ay", ay8910_data_address_w)
90
91		AM_RANGE(0xec30, 0xec3f) AM_WRITE(SMH_RAM)
92		AM_RANGE(0xf000, 0xffff) AM_WRITE(SMH_ROM)
93		ADDRESS_MAP_END
94
95
96	81	static INPUT_PORTS_START( ltcasino )
97	82	PORT_START("IN0") /* Q in service */
98	83	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_CODE(KEYCODE_Z) PORT_NAME("Hold 1")
r4679	r4680
648	633	static MACHINE_DRIVER_START( ltcasino )
649	634	/* basic machine hardware */
650	635	MDRV_CPU_ADD("maincpu", M6502,2000000)       /* ? MHz */
651		MDRV_CPU_PROGRAM_MAP(readmem,writemem)
	636	MDRV_CPU_PROGRAM_MAP(ltcasino_map,0)
652	637	MDRV_CPU_VBLANK_INT("screen", irq0_line_hold)
653	638
654	639	/* video hardware */

src/mame/drivers/crospang.c

r4679	r4680
63	63
64	64	/* main cpu */
65	65
66		static ADDRESS_MAP_START( crospang_readmem, ADDRESS_SPACE_PROGRAM, 16 )
67		AM_RANGE(0x000000, 0x0fffff) AM_READ(SMH_ROM)
68		AM_RANGE(0x120000, 0x1207ff) AM_READ(SMH_RAM)
69		AM_RANGE(0x122000, 0x1227ff) AM_READ(SMH_RAM)
70		AM_RANGE(0x200000, 0x2005ff) AM_READ(SMH_RAM)
71		AM_RANGE(0x210000, 0x2107ff) AM_READ(SMH_RAM)
72		AM_RANGE(0x280000, 0x280001) AM_READ_PORT("P1_P2")
73		AM_RANGE(0x280002, 0x280003) AM_READ_PORT("COIN")
74		AM_RANGE(0x280004, 0x280005) AM_READ_PORT("DSW")
75		AM_RANGE(0x320000, 0x32ffff) AM_READ(SMH_RAM)
76		ADDRESS_MAP_END
77
78		static ADDRESS_MAP_START( crospang_writemem, ADDRESS_SPACE_PROGRAM, 16 )
79		AM_RANGE(0x000000, 0x0fffff) AM_WRITENOP // writes to rom quite often
	66	static ADDRESS_MAP_START( crospang_map, ADDRESS_SPACE_PROGRAM, 16 )
	67	AM_RANGE(0x000000, 0x0fffff) AM_READ(SMH_ROM) AM_WRITENOP // writes to rom quite often
80	68	AM_RANGE(0x100000, 0x100001) AM_WRITENOP
81	69	AM_RANGE(0x100002, 0x100003) AM_WRITE(crospang_fg_scrolly_w)
82	70	AM_RANGE(0x100004, 0x100005) AM_WRITE(crospang_bg_scrollx_w)
83	71	AM_RANGE(0x100006, 0x100007) AM_WRITE(crospang_bg_scrolly_w)
84	72	AM_RANGE(0x100008, 0x100009) AM_WRITE(crospang_fg_scrollx_w)
85	73	AM_RANGE(0x10000e, 0x10000f) AM_WRITENOP
86		AM_RANGE(0x120000, 0x1207ff) AM_WRITE(crospang_fg_videoram_w) AM_BASE(&crospang_fg_videoram)
87		AM_RANGE(0x122000, 0x1227ff) AM_WRITE(crospang_bg_videoram_w) AM_BASE(&crospang_bg_videoram)
88		AM_RANGE(0x200000, 0x2005ff) AM_WRITE(paletteram16_xRRRRRGGGGGBBBBB_word_w) AM_BASE(&paletteram16)
89		AM_RANGE(0x210000, 0x2107ff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)
	74	AM_RANGE(0x120000, 0x1207ff) AM_RAM_WRITE(crospang_fg_videoram_w) AM_BASE(&crospang_fg_videoram)
	75	AM_RANGE(0x122000, 0x1227ff) AM_RAM_WRITE(crospang_bg_videoram_w) AM_BASE(&crospang_bg_videoram)
	76	AM_RANGE(0x200000, 0x2005ff) AM_RAM_WRITE(paletteram16_xRRRRRGGGGGBBBBB_word_w) AM_BASE(&paletteram16)
	77	AM_RANGE(0x210000, 0x2107ff) AM_RAM AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)
90	78	AM_RANGE(0x270000, 0x270001) AM_WRITE(crospang_soundlatch_w)
91		AM_RANGE(0x320000, 0x32ffff) AM_WRITE(SMH_RAM)
92		ADDRESS_MAP_END
93
94		static ADDRESS_MAP_START( bestri_readmem, ADDRESS_SPACE_PROGRAM, 16 )
95		AM_RANGE(0x000000, 0x0fffff) AM_READ(SMH_ROM)
96		AM_RANGE(0x120000, 0x1207ff) AM_READ(SMH_RAM)
97		AM_RANGE(0x122000, 0x1227ff) AM_READ(SMH_RAM)
98		AM_RANGE(0x200000, 0x2005ff) AM_READ(SMH_RAM)
99		AM_RANGE(0x210000, 0x2107ff) AM_READ(SMH_RAM)
100	79	AM_RANGE(0x280000, 0x280001) AM_READ_PORT("P1_P2")
101	80	AM_RANGE(0x280002, 0x280003) AM_READ_PORT("COIN")
102	81	AM_RANGE(0x280004, 0x280005) AM_READ_PORT("DSW")
103		AM_RANGE(0x3a0000, 0x3affff) AM_READ(SMH_RAM)
	82	AM_RANGE(0x320000, 0x32ffff) AM_RAM
104	83	ADDRESS_MAP_END
105	84
106		static ADDRESS_MAP_START( bestri_writemem, ADDRESS_SPACE_PROGRAM, 16 )
107		AM_RANGE(0x000000, 0x0fffff) AM_WRITENOP // writes to rom quite often
	85	static ADDRESS_MAP_START( bestri_map, ADDRESS_SPACE_PROGRAM, 16 )
	86	AM_RANGE(0x000000, 0x0fffff) AM_READ(SMH_ROM) AM_WRITENOP // writes to rom quite often
108	87
109	88	AM_RANGE(0x100004, 0x100005) AM_WRITE(bestri_fg_scrollx_w)
110	89	AM_RANGE(0x100006, 0x100007) AM_WRITE(bestri_fg_scrolly_w)
r4679	r4680
112	91	AM_RANGE(0x10000c, 0x10000d) AM_WRITE(bestri_bg_scrollx_w)
113	92	AM_RANGE(0x10000e, 0x10000f) AM_WRITE(bestri_tilebank_w)
114	93
115		AM_RANGE(0x120000, 0x1207ff) AM_WRITE(crospang_fg_videoram_w) AM_BASE(&crospang_fg_videoram)
116		AM_RANGE(0x122000, 0x1227ff) AM_WRITE(crospang_bg_videoram_w) AM_BASE(&crospang_bg_videoram)
117		AM_RANGE(0x200000, 0x2005ff) AM_WRITE(paletteram16_xRRRRRGGGGGBBBBB_word_w) AM_BASE(&paletteram16)
118		AM_RANGE(0x210000, 0x2107ff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)
	94	AM_RANGE(0x120000, 0x1207ff) AM_RAM_WRITE(crospang_fg_videoram_w) AM_BASE(&crospang_fg_videoram)
	95	AM_RANGE(0x122000, 0x1227ff) AM_RAM_WRITE(crospang_bg_videoram_w) AM_BASE(&crospang_bg_videoram)
	96	AM_RANGE(0x200000, 0x2005ff) AM_RAM_WRITE(paletteram16_xRRRRRGGGGGBBBBB_word_w) AM_BASE(&paletteram16)
	97	AM_RANGE(0x210000, 0x2107ff) AM_RAM AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)
119	98	AM_RANGE(0x270000, 0x270001) AM_WRITE(crospang_soundlatch_w)
120	99	AM_RANGE(0x270004, 0x270005) AM_WRITENOP
	100	AM_RANGE(0x280000, 0x280001) AM_READ_PORT("P1_P2")
	101	AM_RANGE(0x280002, 0x280003) AM_READ_PORT("COIN")
	102	AM_RANGE(0x280004, 0x280005) AM_READ_PORT("DSW")
121	103
122
123
124		AM_RANGE(0x3a0000, 0x3affff) AM_WRITE(SMH_RAM)
	104	AM_RANGE(0x3a0000, 0x3affff) AM_RAM
125	105	ADDRESS_MAP_END
126	106
127	107	/* sound cpu */
128	108
129		static ADDRESS_MAP_START( crospang_sound_readmem, ADDRESS_SPACE_PROGRAM, 8 )
130		AM_RANGE(0x0000, 0xbfff) AM_READ(SMH_ROM)
131		AM_RANGE(0xc000, 0xc7ff) AM_READ(SMH_RAM)
	109	static ADDRESS_MAP_START( crospang_sound_map, ADDRESS_SPACE_PROGRAM, 8 )
	110	AM_RANGE(0x0000, 0xbfff) AM_ROM
	111	AM_RANGE(0xc000, 0xc7ff) AM_RAM
132	112	ADDRESS_MAP_END
133	113
134		static ADDRESS_MAP_START( crospang_sound_writemem, ADDRESS_SPACE_PROGRAM, 8 )
135		AM_RANGE(0x0000, 0xbfff) AM_WRITE(SMH_ROM)
136		AM_RANGE(0xc000, 0xc7ff) AM_WRITE(SMH_RAM)
137		ADDRESS_MAP_END
138
139	114	static ADDRESS_MAP_START( crospang_sound_io_map, ADDRESS_SPACE_IO, 8 )
140	115	ADDRESS_MAP_GLOBAL_MASK(0xff)
141	116	AM_RANGE(0x00, 0x01) AM_DEVREADWRITE("ym", ym3812_r, ym3812_w)
r4679	r4680
317	292
318	293	static void irqhandler(const device_config *device, int linestate)
319	294	{
320		cpu_set_input_line(device->machine->cpu[1],0,linestate);
	295	cputag_set_input_line(device->machine, "audiocpu", 0, linestate);
321	296	}
322	297
323	298	static const ym3812_interface ym3812_config =
r4679	r4680
329	304
330	305	/* basic machine hardware */
331	306	MDRV_CPU_ADD("maincpu", M68000, 14318180/2)
332		MDRV_CPU_PROGRAM_MAP(crospang_readmem,crospang_writemem)
	307	MDRV_CPU_PROGRAM_MAP(crospang_map,0)
333	308	MDRV_CPU_VBLANK_INT("screen", irq6_line_hold)
334	309
335	310	MDRV_CPU_ADD("audiocpu", Z80, 14318180/4)
336		MDRV_CPU_PROGRAM_MAP(crospang_sound_readmem,crospang_sound_writemem)
	311	MDRV_CPU_PROGRAM_MAP(crospang_sound_map,0)
337	312	MDRV_CPU_IO_MAP(crospang_sound_io_map,0)
338	313
339	314	/* video hardware */
r4679	r4680
366	341
367	342	/* basic machine hardware */
368	343	MDRV_CPU_ADD("maincpu", M68000, 14318180/2)
369		MDRV_CPU_PROGRAM_MAP(bestri_readmem,bestri_writemem)
	344	MDRV_CPU_PROGRAM_MAP(bestri_map,0)
370	345	MDRV_CPU_VBLANK_INT("screen", irq6_line_hold)
371	346
372	347	MDRV_CPU_ADD("audiocpu", Z80, 14318180/4)
373		MDRV_CPU_PROGRAM_MAP(crospang_sound_readmem,crospang_sound_writemem)
	348	MDRV_CPU_PROGRAM_MAP(crospang_sound_map,0)
374	349	MDRV_CPU_IO_MAP(crospang_sound_io_map,0)
375	350
376	351	/* video hardware */

src/mame/drivers/royalmah.c

r4679	r4680
422	422	static ADDRESS_MAP_START( royalmah_map, ADDRESS_SPACE_PROGRAM, 8 )
423	423	AM_RANGE( 0x0000, 0x6fff ) AM_READWRITE( SMH_ROM, royalmah_rom_w )
424	424	AM_RANGE( 0x7000, 0x7fff ) AM_RAM AM_BASE(&generic_nvram) AM_SIZE(&generic_nvram_size)
425		AM_RANGE( 0x8000, 0xffff ) AM_READ( SMH_BANK1 )   // banked ROMs not present in royalmah
	425	AM_RANGE( 0x8000, 0xffff ) AM_READ( SMH_BANK(1) )   // banked ROMs not present in royalmah
426	426	AM_RANGE( 0x8000, 0xffff ) AM_WRITE( SMH_RAM ) AM_BASE(&videoram)
427	427	ADDRESS_MAP_END
428	428
r4679	r4680
432	432	AM_RANGE( 0x7000, 0x77ff ) AM_RAM AM_BASE(&generic_nvram) AM_SIZE(&generic_nvram_size)
433	433	AM_RANGE( 0x7800, 0x7fff ) AM_RAM
434	434	AM_RANGE( 0x8000, 0x8000 ) AM_READ( mjapinky_dsw_r )
435		AM_RANGE( 0x8000, 0xffff ) AM_READ( SMH_BANK1 )
	435	AM_RANGE( 0x8000, 0xffff ) AM_READ( SMH_BANK(1) )
436	436	AM_RANGE( 0x8000, 0xffff ) AM_WRITE( SMH_RAM ) AM_BASE(&videoram)
437	437	ADDRESS_MAP_END
438	438
r4679	r4680
666	666
667	667	static WRITE8_HANDLER( jansou_sound_w )
668	668	{
669		soundlatch_w(space,0,data);
670		cpu_set_input_line(space->machine->cpu[1], INPUT_LINE_NMI, PULSE_LINE);
	669	soundlatch_w(space, 0, data);
	670	cputag_set_input_line(space->machine, "audiocpu", INPUT_LINE_NMI, PULSE_LINE);
671	671	}
672	672
673	673
r4679	r4680
709	709	AM_RANGE( 0x0000, 0x5fff) AM_ROM
710	710	AM_RANGE( 0x6000, 0x6fff ) AM_RAMBANK(3)   // nvram
711	711	AM_RANGE( 0x7000, 0x7fff ) AM_RAMBANK(2)   // banked nvram
712		AM_RANGE( 0x8000, 0xffff ) AM_READ(SMH_BANK1)
	712	AM_RANGE( 0x8000, 0xffff ) AM_READ(SMH_BANK(1))
713	713	AM_RANGE( 0x8000, 0xffff ) AM_WRITE(SMH_RAM) AM_BASE(&videoram)
714	714	ADDRESS_MAP_END
715	715
r4679	r4680
981	981	AM_RANGE( 0x6ff1, 0x6ff1 ) AM_WRITE( mjderngr_palbank_w )
982	982	AM_RANGE( 0x6ff3, 0x6ff3 ) AM_WRITE( mjtensin_6ff3_w )
983	983	AM_RANGE( 0x7000, 0x7fff ) AM_RAM AM_BASE(&generic_nvram) AM_SIZE(&generic_nvram_size)
984		AM_RANGE( 0x8000, 0xffff ) AM_READ( SMH_BANK1 )
	984	AM_RANGE( 0x8000, 0xffff ) AM_READ( SMH_BANK(1) )
985	985	AM_RANGE( 0x8000, 0xffff ) AM_WRITE( SMH_RAM ) AM_BASE(&videoram)
986	986	ADDRESS_MAP_END
987	987
r4679	r4680
1051	1051	AM_RANGE( 0x7fe3, 0x7fe3 ) AM_WRITE( cafetime_7fe3_w )
1052	1052	AM_RANGE( 0x7fe4, 0x7fe4 ) AM_READ( cafetime_7fe4_r )
1053	1053	AM_RANGE( 0x7ff0, 0x7fff ) AM_DEVREADWRITE("rtc", msm6242_r, msm6242_w)
1054		AM_RANGE( 0x8000, 0xffff ) AM_READ( SMH_BANK1 )
	1054	AM_RANGE( 0x8000, 0xffff ) AM_READ( SMH_BANK(1) )
1055	1055	AM_RANGE( 0x8000, 0xffff ) AM_WRITE( SMH_RAM ) AM_BASE(&videoram)
1056	1056	ADDRESS_MAP_END
1057	1057
r4679	r4680
4602	4602	static DRIVER_INIT( janptr96 )
4603	4603	{
4604	4604	generic_nvram_size = 0x1000 * 9;
4605		generic_nvram = auto_malloc( generic_nvram_size );
	4605	generic_nvram = auto_alloc_array(machine, UINT8, generic_nvram_size );
4606	4606
4607	4607	memory_set_bankptr(machine, 3,generic_nvram);
4608	4608	}

src/mame/drivers/coolridr.c

r4679	r4680
239	239	static MACHINE_RESET ( coolridr )
240	240	{
241	241
242		//  cpu_set_input_line(machine->cpu[0], INPUT_LINE_HALT, ASSERT_LINE);
243		cpu_set_input_line(machine->cpu[1], INPUT_LINE_HALT, ASSERT_LINE);
	242	//  cputag_set_input_line(machine, "maincpu", INPUT_LINE_HALT, ASSERT_LINE);
	243	cputag_set_input_line(machine, "soundcpu", INPUT_LINE_HALT, ASSERT_LINE);
244	244
245	245	}
246	246
r4679	r4680
322	322
323	323	static DRIVER_INIT( coolridr )
324	324	{
325		memory_install_read32_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x60d88a4, 0x060d88a7, 0, 0, coolridr_hack_r );
	325	memory_install_read32_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x60d88a4, 0x060d88a7, 0, 0, coolridr_hack_r );
326	326	}
327	327
328	328	GAME( 1995, coolridr,    0, coolridr,    0,    coolridr, ROT0,  "Sega", "Cool Riders",GAME_NOT_WORKING|GAME_NO_SOUND )

src/mame/drivers/darkmist.c

r4679	r4680
60	60
61	61	static ADDRESS_MAP_START( memmap, ADDRESS_SPACE_PROGRAM, 8 )
62	62	AM_RANGE(0x0000, 0x7fff) AM_ROM
63		AM_RANGE(0x8000, 0xbfff) AM_READ(SMH_BANK1)
	63	AM_RANGE(0x8000, 0xbfff) AM_READ(SMH_BANK(1))
64	64	AM_RANGE(0xc801, 0xc801) AM_READ_PORT("P1")
65	65	AM_RANGE(0xc802, 0xc802) AM_READ_PORT("P2")
66	66	AM_RANGE(0xc803, 0xc803) AM_READ_PORT("START")
r4679	r4680
336	336
337	337	static void decrypt_gfx(running_machine *machine)
338	338	{
339		UINT8 *buf = malloc_or_die(0x40000);
	339	UINT8 *buf = alloc_array_or_die(UINT8, 0x40000);
340	340	UINT8 *rom;
341	341	int size;
342	342	int i;
r4679	r4680
426	426	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
427	427	int i, len;
428	428	UINT8 *ROM = memory_region(machine, "maincpu");
429		UINT8 *buffer = malloc_or_die(0x10000);
430		UINT8 *decrypt = auto_malloc(0x8000);
	429	UINT8 *buffer = alloc_array_or_die(UINT8, 0x10000);
	430	UINT8 *decrypt = auto_alloc_array(machine, UINT8, 0x8000);
431	431
432	432	decrypt_gfx(machine);
433	433

src/mame/drivers/mquake.c

r4679	r4680
38	38	/* swap the write handlers between ROM and bank 1 based on the bit */
39	39	if ((data & 1) == 0)
40	40	/* overlay disabled, map RAM on 0x000000 */
41		memory_install_write16_handler(cpu_get_address_space(device->machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x000000, 0x07ffff, 0, 0, SMH_BANK1);
	41	memory_install_write16_handler(cputag_get_address_space(device->machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x000000, 0x07ffff, 0, 0, (write16_space_func)SMH_BANK(1));
42	42
43	43	else
44	44	/* overlay enabled, map Amiga system ROM on 0x000000 */
45		memory_install_write16_handler(cpu_get_address_space(device->machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x000000, 0x07ffff, 0, 0, SMH_UNMAP);
	45	memory_install_write16_handler(cputag_get_address_space(device->machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x000000, 0x07ffff, 0, 0, (write16_space_func)SMH_UNMAP);
46	46	}
47	47
48	48

src/mame/drivers/funybubl.c

r4679	r4680
63	63
64	64	static WRITE8_HANDLER ( funybubl_vidram_bank_w )
65	65	{
66		if ((data&1) == 0)
67		memory_set_bankptr(space->machine, 1,&funybubl_banked_videoram[0x000000]);
	66	if ((data & 1) == 0)
	67	memory_set_bankptr(space->machine, 1, &funybubl_banked_videoram[0x000000]);
68	68	else
69		memory_set_bankptr(space->machine, 1,&funybubl_banked_videoram[0x001000]);
	69	memory_set_bankptr(space->machine, 1 ,&funybubl_banked_videoram[0x001000]);
70	70	}
71	71
72	72	static WRITE8_HANDLER ( funybubl_cpurombank_w )
73	73	{
74	74	UINT8 *rom = memory_region(space->machine, "maincpu");
75	75
76		memory_set_bankptr(space->machine, 2,&rom[0x10000+0x4000*(data&0x3f)]);
	76	memory_set_bankptr(space->machine, 2, &rom[0x10000 + 0x4000 * (data & 0x3f)]);
77	77	}
78	78
79	79
80	80
81	81	static WRITE8_HANDLER( funybubl_soundcommand_w )
82	82	{
83		soundlatch_w(space,0,data);
84		cpu_set_input_line(space->machine->cpu[1],0, HOLD_LINE);
	83	soundlatch_w(space, 0, data);
	84	cputag_set_input_line(space->machine, "audiocpu", 0, HOLD_LINE);
85	85	}
86	86
87	87	static WRITE8_DEVICE_HANDLER( funybubl_oki_bank_sw )
r4679	r4680
90	90	}
91	91
92	92
93		static ADDRESS_MAP_START( readmem, ADDRESS_SPACE_PROGRAM, 8 )
94		AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM)
95		AM_RANGE(0x8000, 0xbfff) AM_READ(SMH_BANK2)   // banked port 1?
96		AM_RANGE(0xc400, 0xc7ff) AM_READ(SMH_RAM)
97		AM_RANGE(0xc800, 0xcfff) AM_READ(SMH_RAM)
98		AM_RANGE(0xd000, 0xdfff) AM_READ(SMH_BANK1)   // banked port 0?
99		AM_RANGE(0xe000, 0xffff) AM_READ(SMH_RAM)
	93	static ADDRESS_MAP_START( funybubl_map, ADDRESS_SPACE_PROGRAM, 8 )
	94	AM_RANGE(0x0000, 0x7fff) AM_ROM
	95	AM_RANGE(0x8000, 0xbfff) AM_ROMBANK(2) // banked port 1?
	96	AM_RANGE(0xc400, 0xcfff) AM_RAM_WRITE(funybubl_paldatawrite) AM_BASE(&funybubl_paletteram) // palette
	97	AM_RANGE(0xd000, 0xdfff) AM_RAMBANK(1) // banked port 0?
	98	AM_RANGE(0xe000, 0xffff) AM_RAM
100	99	ADDRESS_MAP_END
101	100
102		static ADDRESS_MAP_START( writemem, ADDRESS_SPACE_PROGRAM, 8 )
103		AM_RANGE(0x0000, 0x7fff) AM_WRITE(SMH_ROM)
104		AM_RANGE(0x8000, 0xbfff) AM_WRITE(SMH_ROM)
105		AM_RANGE(0xc400, 0xcfff) AM_WRITE(funybubl_paldatawrite) AM_BASE(&funybubl_paletteram) // palette
106		AM_RANGE(0xd000, 0xdfff) AM_WRITE(SMH_BANK1)   // banked port 0?
107		AM_RANGE(0xe000, 0xffff) AM_WRITE(SMH_RAM)
108		ADDRESS_MAP_END
109
110	101	static ADDRESS_MAP_START( io_map, ADDRESS_SPACE_IO, 8 )
111	102	ADDRESS_MAP_GLOBAL_MASK(0xff)
112	103	AM_RANGE(0x00, 0x00) AM_READ_PORT("SYSTEM") AM_WRITE(funybubl_vidram_bank_w)   // vidram bank
r4679	r4680
120	111
121	112	/* Sound CPU */
122	113
123		static ADDRESS_MAP_START( soundreadmem, ADDRESS_SPACE_PROGRAM, 8 )
124		AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM)
125		AM_RANGE(0x8000, 0x87ff) AM_READ(SMH_RAM)
126		AM_RANGE(0x9800, 0x9800) AM_DEVREAD("oki", okim6295_r)
	114	static ADDRESS_MAP_START( sound_map, ADDRESS_SPACE_PROGRAM, 8 )
	115	AM_RANGE(0x0000, 0x7fff) AM_ROM
	116	AM_RANGE(0x8000, 0x87ff) AM_RAM
	117	AM_RANGE(0x9000, 0x9000) AM_DEVWRITE("oki", funybubl_oki_bank_sw)
	118	AM_RANGE(0x9800, 0x9800) AM_DEVREADWRITE("oki", okim6295_r, okim6295_w)
127	119	AM_RANGE(0xa000, 0xa000) AM_READ(soundlatch_r)
128	120	ADDRESS_MAP_END
129	121
130		static ADDRESS_MAP_START( soundwritemem, ADDRESS_SPACE_PROGRAM, 8 )
131		AM_RANGE(0x0000, 0x7fff) AM_WRITE(SMH_ROM)
132		AM_RANGE(0x8000, 0x87ff) AM_WRITE(SMH_RAM)
133		AM_RANGE(0x9000, 0x9000) AM_DEVWRITE("oki", funybubl_oki_bank_sw)
134		AM_RANGE(0x9800, 0x9800) AM_DEVWRITE("oki", okim6295_w)
135		ADDRESS_MAP_END
136	122
137	123
138
139	124	static INPUT_PORTS_START( funybubl )
140	125	PORT_START("SYSTEM")   /* System inputs */
141	126	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 )
r4679	r4680
228	213
229	214	static DRIVER_INIT( funybubl )
230	215	{
231		funybubl_banked_videoram = auto_malloc (0x2000);
	216	funybubl_banked_videoram = auto_alloc_array(machine, UINT8, 0x2000);
232	217
233	218	memory_set_bankptr(machine, 1,&funybubl_banked_videoram[0x000000]);
234	219	}
r4679	r4680
238	223	static MACHINE_DRIVER_START( funybubl )
239	224	/* basic machine hardware */
240	225	MDRV_CPU_ADD("maincpu", Z80,12000000/2)       /* 6 MHz?? */
241		MDRV_CPU_PROGRAM_MAP(readmem,writemem)
	226	MDRV_CPU_PROGRAM_MAP(funybubl_map,0)
242	227	MDRV_CPU_IO_MAP(io_map,0)
243	228	MDRV_CPU_VBLANK_INT("screen", irq0_line_hold)
244	229
245	230	MDRV_CPU_ADD("audiocpu", Z80,8000000/2)       /* 4 MHz?? */
246		MDRV_CPU_PROGRAM_MAP(soundreadmem,soundwritemem)
	231	MDRV_CPU_PROGRAM_MAP(sound_map,0)
247	232
248	233	/* video hardware */
249	234	MDRV_SCREEN_ADD("screen", RASTER)

src/mame/drivers/shisen.c

r4679	r4680
48	48
49	49
50	50
51		static ADDRESS_MAP_START( readmem, ADDRESS_SPACE_PROGRAM, 8 )
52		AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM)
53		AM_RANGE(0x8000, 0xbfff) AM_READ(SMH_BANK1)
54		AM_RANGE(0xc800, 0xcaff) AM_READ(SMH_RAM)
55		AM_RANGE(0xd000, 0xffff) AM_READ(SMH_RAM)
	51	static ADDRESS_MAP_START( shisen_map, ADDRESS_SPACE_PROGRAM, 8 )
	52	AM_RANGE(0x0000, 0x7fff) AM_ROM
	53	AM_RANGE(0x8000, 0xbfff) AM_ROMBANK(1)
	54	AM_RANGE(0xc800, 0xcaff) AM_RAM_WRITE(sichuan2_paletteram_w) AM_BASE(&paletteram)
	55	AM_RANGE(0xd000, 0xdfff) AM_RAM_WRITE(sichuan2_videoram_w) AM_BASE(&videoram)
	56	AM_RANGE(0xe000, 0xffff) AM_RAM
56	57	ADDRESS_MAP_END
57	58
58		static ADDRESS_MAP_START( writemem, ADDRESS_SPACE_PROGRAM, 8 )
59		AM_RANGE(0x0000, 0xbfff) AM_WRITE(SMH_ROM)
60		AM_RANGE(0xc800, 0xcaff) AM_WRITE(sichuan2_paletteram_w) AM_BASE(&paletteram)
61		AM_RANGE(0xd000, 0xdfff) AM_WRITE(sichuan2_videoram_w) AM_BASE(&videoram)
62		AM_RANGE(0xe000, 0xffff) AM_WRITE(SMH_RAM)
63		ADDRESS_MAP_END
64
65		static ADDRESS_MAP_START( io_map, ADDRESS_SPACE_IO, 8 )
	59	static ADDRESS_MAP_START( shisen_io_map, ADDRESS_SPACE_IO, 8 )
66	60	ADDRESS_MAP_GLOBAL_MASK(0xff)
67	61	AM_RANGE(0x00, 0x00) AM_READWRITE(sichuan2_dsw1_r, sichuan2_coin_w)
68	62	AM_RANGE(0x01, 0x01) AM_READ_PORT("DSW2") AM_WRITE(m72_sound_command_byte_w)
r4679	r4680
71	65	AM_RANGE(0x04, 0x04) AM_READ_PORT("COIN")
72	66	ADDRESS_MAP_END
73	67
74		static ADDRESS_MAP_START( sound_readmem, ADDRESS_SPACE_PROGRAM, 8 )
75		AM_RANGE(0x0000, 0x3fff) AM_READ(SMH_ROM)
76		AM_RANGE(0xfd00, 0xffff) AM_READ(SMH_RAM)
	68	static ADDRESS_MAP_START( shisen_sound_map, ADDRESS_SPACE_PROGRAM, 8 )
	69	AM_RANGE(0x0000, 0x3fff) AM_ROM
	70	AM_RANGE(0xfd00, 0xffff) AM_RAM
77	71	ADDRESS_MAP_END
78	72
79		static ADDRESS_MAP_START( sound_writemem, ADDRESS_SPACE_PROGRAM, 8 )
80		AM_RANGE(0x0000, 0x3fff) AM_WRITE(SMH_ROM)
81		AM_RANGE(0xfd00, 0xffff) AM_WRITE(SMH_RAM)
82		ADDRESS_MAP_END
83
84		static ADDRESS_MAP_START( sound_io_map, ADDRESS_SPACE_IO, 8 )
	73	static ADDRESS_MAP_START( shisen_sound_io_map, ADDRESS_SPACE_IO, 8 )
85	74	ADDRESS_MAP_GLOBAL_MASK(0xff)
86	75	AM_RANGE(0x00, 0x01) AM_DEVREADWRITE("ym", ym2151_r, ym2151_w)
87	76	AM_RANGE(0x80, 0x80) AM_READ(soundlatch_r)
r4679	r4680
230	219
231	220	/* basic machine hardware */
232	221	MDRV_CPU_ADD("maincpu", Z80, 6000000)   /* 6 MHz ? */
233		MDRV_CPU_PROGRAM_MAP(readmem,writemem)
234		MDRV_CPU_IO_MAP(io_map,0)
	222	MDRV_CPU_PROGRAM_MAP(shisen_map,0)
	223	MDRV_CPU_IO_MAP(shisen_io_map,0)
235	224	MDRV_CPU_VBLANK_INT("screen", irq0_line_hold)
236	225
237	226	MDRV_CPU_ADD("soundcpu", Z80, 3579645)
238		MDRV_CPU_PROGRAM_MAP(sound_readmem,sound_writemem)
239		MDRV_CPU_IO_MAP(sound_io_map,0)
	227	MDRV_CPU_PROGRAM_MAP(shisen_sound_map,0)
	228	MDRV_CPU_IO_MAP(shisen_sound_io_map,0)
240	229	MDRV_CPU_VBLANK_INT_HACK(nmi_line_pulse,128)   /* clocked by V1? (Vigilante) */
241	230	/* IRQs are generated by main Z80 and YM2151 */
242	231
r4679	r4680
261	250
262	251	MDRV_SOUND_ADD("ym", YM2151, 3579545)
263	252	MDRV_SOUND_CONFIG(ym2151_config)
264		MDRV_SOUND_ROUTE(0, "lspeaker", 1.0)
265		MDRV_SOUND_ROUTE(1, "rspeaker", 1.0)
	253	MDRV_SOUND_ROUTE(0, "lspeaker", 0.5)
	254	MDRV_SOUND_ROUTE(1, "rspeaker", 0.5)
266	255
267	256	MDRV_SOUND_ADD("dac", DAC, 0)
268		MDRV_SOUND_ROUTE(ALL_OUTPUTS, "lspeaker", 0.50)
269		MDRV_SOUND_ROUTE(ALL_OUTPUTS, "rspeaker", 0.50)
	257	MDRV_SOUND_ROUTE(ALL_OUTPUTS, "lspeaker", 0.25)
	258	MDRV_SOUND_ROUTE(ALL_OUTPUTS, "rspeaker", 0.25)
270	259	MACHINE_DRIVER_END
271	260
272	261

src/mame/drivers/tutankhm.c

r4679	r4680
49	49	{
50	50	irq_enable = data & 1;
51	51	if (!irq_enable)
52		cpu_set_input_line(space->machine->cpu[0], 0, CLEAR_LINE);
	52	cputag_set_input_line(space->machine, "maincpu", 0, CLEAR_LINE);
53	53	}
54	54
55	55

src/mame/drivers/nmk16.c

r4679	r4680
320	320
321	321	/***************************************************************************/
322	322
323		static ADDRESS_MAP_START( vandyke_readmem, ADDRESS_SPACE_PROGRAM, 16 )
324		AM_RANGE(0x000000, 0x03ffff) AM_READ(SMH_ROM)
	323	static ADDRESS_MAP_START( vandyke_map, ADDRESS_SPACE_PROGRAM, 16 )
	324	AM_RANGE(0x000000, 0x03ffff) AM_ROM
325	325	AM_RANGE(0x080000, 0x080001) AM_READ_PORT("IN0")
326	326	AM_RANGE(0x080002, 0x080003) AM_READ_PORT("IN1")
327	327	AM_RANGE(0x080008, 0x080009) AM_READ_PORT("DSW1")
328	328	AM_RANGE(0x08000a, 0x08000b) AM_READ_PORT("DSW2")
329	329	AM_RANGE(0x08000e, 0x08000f) AM_READ(NMK004_r)
330		AM_RANGE(0x088000, 0x0887ff) AM_READ(SMH_RAM)
331		AM_RANGE(0x090000, 0x093fff) AM_READ(nmk_bgvideoram_r)
332		AM_RANGE(0x09d000, 0x09d7ff) AM_READ(nmk_txvideoram_r)
333		AM_RANGE(0x0f0000, 0x0fffff) AM_RAM AM_BASE(&nmk16_mainram)
334		ADDRESS_MAP_END
335
336		static ADDRESS_MAP_START( vandyke_writemem, ADDRESS_SPACE_PROGRAM, 16 )
337		AM_RANGE(0x000000, 0x03ffff) AM_WRITE(SMH_ROM)
338	330	AM_RANGE(0x080016, 0x080017) AM_WRITENOP   /* IRQ enable? */
339	331	AM_RANGE(0x080018, 0x080019) AM_WRITE(nmk_tilebank_w)
340	332	AM_RANGE(0x08001e, 0x08001f) AM_WRITE(NMK004_w)
341		AM_RANGE(0x088000, 0x0887ff) AM_WRITE(paletteram16_RRRRGGGGBBBBRGBx_word_w) AM_BASE(&paletteram16)
	333	AM_RANGE(0x088000, 0x0887ff) AM_RAM_WRITE(paletteram16_RRRRGGGGBBBBRGBx_word_w) AM_BASE(&paletteram16)
342	334	AM_RANGE(0x08c000, 0x08c007) AM_WRITE(vandyke_scroll_w)
343		AM_RANGE(0x090000, 0x093fff) AM_WRITE(nmk_bgvideoram_w) AM_BASE(&nmk_bgvideoram)
344		AM_RANGE(0x094000, 0x097fff) AM_WRITE(SMH_RAM) /* what is this */
345		AM_RANGE(0x09d000, 0x09d7ff) AM_WRITE(nmk_txvideoram_w) AM_BASE(&nmk_txvideoram)
	335	AM_RANGE(0x090000, 0x093fff) AM_RAM_WRITE(nmk_bgvideoram_w) AM_BASE(&nmk_bgvideoram)
	336	AM_RANGE(0x094000, 0x097fff) AM_RAM /* what is this? */
	337	AM_RANGE(0x09d000, 0x09d7ff) AM_RAM_WRITE(nmk_txvideoram_w) AM_BASE(&nmk_txvideoram)
	338	AM_RANGE(0x0f0000, 0x0fffff) AM_RAM AM_BASE(&nmk16_mainram)
346	339	ADDRESS_MAP_END
347	340
348
349		static ADDRESS_MAP_START( manybloc_readmem, ADDRESS_SPACE_PROGRAM, 16 )
350		AM_RANGE(0x000000, 0x03ffff) AM_READ(SMH_ROM)
	341	static ADDRESS_MAP_START( manybloc_map, ADDRESS_SPACE_PROGRAM, 16 )
	342	AM_RANGE(0x000000, 0x03ffff) AM_ROM
351	343	AM_RANGE(0x080000, 0x080001) AM_READ_PORT("IN0")
352	344	AM_RANGE(0x080002, 0x080003) AM_READ_PORT("IN1")
353	345	AM_RANGE(0x080004, 0x080005) AM_READ_PORT("DSW1")
354		AM_RANGE(0x08001e, 0x08001f) AM_READ(soundlatch2_word_r)
355		AM_RANGE(0x088000, 0x0883ff) AM_READ(SMH_RAM)
356		AM_RANGE(0x090000, 0x093fff) AM_READ(nmk_bgvideoram_r)
357		AM_RANGE(0x09c000, 0x09cfff) AM_READ(SMH_RAM)
358		AM_RANGE(0x09d000, 0x09d7ff) AM_READ(nmk_txvideoram_r)
359		AM_RANGE(0x0f0000, 0x0fffff) AM_RAM AM_BASE(&nmk16_mainram)
360		ADDRESS_MAP_END
361
362		static ADDRESS_MAP_START( manybloc_writemem, ADDRESS_SPACE_PROGRAM, 16 )
363		AM_RANGE(0x000000, 0x03ffff) AM_WRITE(SMH_ROM)
364	346	AM_RANGE(0x080010, 0x080011) AM_WRITENOP         /* See notes at the top of the driver */
365	347	AM_RANGE(0x080012, 0x080013) AM_WRITENOP         /* See notes at the top of the driver */
366	348	AM_RANGE(0x080014, 0x080015) AM_WRITE(nmk_flipscreen_w)
367	349	AM_RANGE(0x08001c, 0x08001d) AM_WRITENOP         /* See notes at the top of the driver */
368		AM_RANGE(0x08001e, 0x08001f) AM_WRITE(soundlatch_word_w)
369		AM_RANGE(0x088000, 0x0883ff) AM_WRITE(paletteram16_RRRRGGGGBBBBRGBx_word_w) AM_BASE(&paletteram16)
370		AM_RANGE(0x090000, 0x093fff) AM_WRITE(nmk_bgvideoram_w) AM_BASE(&nmk_bgvideoram)
371		AM_RANGE(0x09c000, 0x09cfff) AM_WRITE(manybloc_scroll_w) AM_BASE(&gunnail_scrollram)
372		AM_RANGE(0x09d000, 0x09d7ff) AM_WRITE(nmk_txvideoram_w) AM_BASE(&nmk_txvideoram)
	350	AM_RANGE(0x08001e, 0x08001f) AM_READWRITE(soundlatch2_word_r,soundlatch_word_w)
	351	AM_RANGE(0x088000, 0x0883ff) AM_RAM_WRITE(paletteram16_RRRRGGGGBBBBRGBx_word_w) AM_BASE(&paletteram16)
	352	AM_RANGE(0x090000, 0x093fff) AM_RAM_WRITE(nmk_bgvideoram_w) AM_BASE(&nmk_bgvideoram)
	353	AM_RANGE(0x09c000, 0x09cfff) AM_RAM_WRITE(manybloc_scroll_w) AM_BASE(&gunnail_scrollram)
	354	AM_RANGE(0x09d000, 0x09d7ff) AM_RAM_WRITE(nmk_txvideoram_w) AM_BASE(&nmk_txvideoram)
	355	AM_RANGE(0x0f0000, 0x0fffff) AM_RAM AM_BASE(&nmk16_mainram)
373	356	ADDRESS_MAP_END
374	357
375		static ADDRESS_MAP_START( tharrier_sound_readmem, ADDRESS_SPACE_PROGRAM, 8 )
376		AM_RANGE(0x0000, 0xbfff) AM_READ(SMH_ROM)
377		AM_RANGE(0xc000, 0xc7ff) AM_READ(SMH_RAM)
378		AM_RANGE(0xf000, 0xf000) AM_READ(soundlatch_r)
379		AM_RANGE(0xf400, 0xf400) AM_DEVREAD("oki1", okim6295_r)
380		AM_RANGE(0xf500, 0xf500) AM_DEVREAD("oki2", okim6295_r)
381		ADDRESS_MAP_END
382
383		static ADDRESS_MAP_START( tharrier_sound_writemem, ADDRESS_SPACE_PROGRAM, 8 )
384		AM_RANGE(0x0000, 0xbfff) AM_WRITE(SMH_ROM)
385		AM_RANGE(0xc000, 0xc7ff) AM_WRITE(SMH_RAM)
386		AM_RANGE(0xf000, 0xf000) AM_WRITE(soundlatch2_w)
387		AM_RANGE(0xf400, 0xf400) AM_DEVWRITE("oki1", okim6295_w)
388		AM_RANGE(0xf500, 0xf500) AM_DEVWRITE("oki2", okim6295_w)
389		AM_RANGE(0xf600, 0xf600) AM_WRITE(tharrier_oki6295_bankswitch_0_w)
390		AM_RANGE(0xf700, 0xf700) AM_WRITE(tharrier_oki6295_bankswitch_1_w)
391		ADDRESS_MAP_END
392
393		static ADDRESS_MAP_START( tharrier_sound_io_map, ADDRESS_SPACE_IO, 8 )
394		ADDRESS_MAP_GLOBAL_MASK(0xff)
395		AM_RANGE(0x00, 0x01) AM_DEVREADWRITE("ym", ym2203_r, ym2203_w)
396		ADDRESS_MAP_END
397
398		static ADDRESS_MAP_START( tharrier_readmem, ADDRESS_SPACE_PROGRAM, 16 )
399		AM_RANGE(0x000000, 0x03ffff) AM_READ(SMH_ROM)
	358	static ADDRESS_MAP_START( tharrier_map, ADDRESS_SPACE_PROGRAM, 16 )
	359	AM_RANGE(0x000000, 0x03ffff) AM_ROM
400	360	AM_RANGE(0x080000, 0x080001) AM_READ_PORT("IN0")
401	361	AM_RANGE(0x080002, 0x080003) AM_READ(tharrier_mcu_r) // AM_READ_PORT("IN1")
402	362	AM_RANGE(0x080004, 0x080005) AM_READ_PORT("DSW1")
403	363	AM_RANGE(0x08000e, 0x08000f) AM_READ(soundlatch2_word_r)   /* from Z80 */
404		AM_RANGE(0x080202, 0x080203) AM_READ_PORT("IN2")
405
406		AM_RANGE(0x088000, 0x0883ff) AM_READ(SMH_RAM)
407		AM_RANGE(0x090000, 0x093fff) AM_READ(nmk_bgvideoram_r)
408		AM_RANGE(0x09d000, 0x09d7ff) AM_READ(nmk_txvideoram_r)
409		AM_RANGE(0x0f0000, 0x0fffff) AM_RAM_WRITE(nmk16_mainram_strange_w) AM_BASE(&nmk16_mainram)
410		ADDRESS_MAP_END
411
412		static ADDRESS_MAP_START( tharrier_writemem, ADDRESS_SPACE_PROGRAM, 16 )
413		AM_RANGE(0x000000, 0x03ffff) AM_WRITE(SMH_ROM)
414	364	AM_RANGE(0x080010, 0x080011) AM_WRITE(tharrier_mcu_control_w)
415	365	AM_RANGE(0x080012, 0x080013) AM_WRITENOP
416	366	//  AM_RANGE(0x080014, 0x080015) AM_WRITE(nmk_flipscreen_w)
417	367	//  AM_RANGE(0x080018, 0x080019) AM_WRITE(nmk_tilebank_w)
418	368	AM_RANGE(0x08001e, 0x08001f) AM_WRITE(soundlatch_word_w)
419		AM_RANGE(0x088000, 0x0883ff) AM_WRITE(paletteram16_RRRRGGGGBBBBRGBx_word_w) AM_BASE(&paletteram16)
	369	AM_RANGE(0x080202, 0x080203) AM_READ_PORT("IN2")
	370	AM_RANGE(0x088000, 0x0883ff) AM_RAM_WRITE(paletteram16_RRRRGGGGBBBBRGBx_word_w) AM_BASE(&paletteram16)
420	371	//  AM_RANGE(0x08c000, 0x08c007) AM_WRITE(nmk_scroll_w)
421		AM_RANGE(0x090000, 0x093fff) AM_WRITE(nmk_bgvideoram_w) AM_BASE(&nmk_bgvideoram)
422		AM_RANGE(0x09c000, 0x09c7ff) AM_WRITENOP /* Unused txvideoram area? */
423		AM_RANGE(0x09d000, 0x09d7ff) AM_WRITE(nmk_txvideoram_w) AM_BASE(&nmk_txvideoram)
	372	AM_RANGE(0x090000, 0x093fff) AM_RAM_WRITE(nmk_bgvideoram_w) AM_BASE(&nmk_bgvideoram)
	373	AM_RANGE(0x09c000, 0x09c7ff) AM_RAM /* Unused txvideoram area? */
	374	AM_RANGE(0x09d000, 0x09d7ff) AM_RAM_WRITE(nmk_txvideoram_w) AM_BASE(&nmk_txvideoram)
	375	AM_RANGE(0x0f0000, 0x0fffff) AM_RAM_WRITE(nmk16_mainram_strange_w) AM_BASE(&nmk16_mainram)
424	376	ADDRESS_MAP_END
425	377
	378	static ADDRESS_MAP_START( tharrier_sound_map, ADDRESS_SPACE_PROGRAM, 8 )
	379	AM_RANGE(0x0000, 0xbfff) AM_ROM
	380	AM_RANGE(0xc000, 0xc7ff) AM_RAM
	381	AM_RANGE(0xf000, 0xf000) AM_READWRITE(soundlatch_r,soundlatch2_w)
	382	AM_RANGE(0xf400, 0xf400) AM_DEVREADWRITE("oki1", okim6295_r,okim6295_w)
	383	AM_RANGE(0xf500, 0xf500) AM_DEVREADWRITE("oki2", okim6295_r,okim6295_w)
	384	AM_RANGE(0xf600, 0xf600) AM_WRITE(tharrier_oki6295_bankswitch_0_w)
	385	AM_RANGE(0xf700, 0xf700) AM_WRITE(tharrier_oki6295_bankswitch_1_w)
	386	ADDRESS_MAP_END
	387
	388	static ADDRESS_MAP_START( tharrier_sound_io_map, ADDRESS_SPACE_IO, 8 )
	389	ADDRESS_MAP_GLOBAL_MASK(0xff)
	390	AM_RANGE(0x00, 0x01) AM_DEVREADWRITE("ym", ym2203_r, ym2203_w)
	391	ADDRESS_MAP_END
	392
426	393	//Read input port 1 030c8/  BAD
427	394	//3478  GOOD
428	395
r4679	r4680
479	446	ADDRESS_MAP_END
480	447
481	448
482		static ADDRESS_MAP_START( acrobatm_readmem, ADDRESS_SPACE_PROGRAM, 16 )
483		AM_RANGE(0x00000, 0x3ffff) AM_READ(SMH_ROM)
484
	449	static ADDRESS_MAP_START( acrobatm_map, ADDRESS_SPACE_PROGRAM, 16 )
	450	AM_RANGE(0x00000, 0x3ffff) AM_ROM
485	451	AM_RANGE(0x80000, 0x8ffff) AM_RAM AM_BASE(&nmk16_mainram)
486
487	452	AM_RANGE(0xc0000, 0xc0001) AM_READ_PORT("IN0")
488	453	AM_RANGE(0xc0002, 0xc0003) AM_READ_PORT("IN1")
489	454	AM_RANGE(0xc0008, 0xc0009) AM_READ_PORT("DSW1")
490	455	AM_RANGE(0xc000a, 0xc000b) AM_READ_PORT("DSW2")
491	456	AM_RANGE(0xc000e, 0xc000f) AM_READ(NMK004_r)
492		AM_RANGE(0xc4000, 0xc45ff) AM_READ(SMH_RAM)
493		AM_RANGE(0xcc000, 0xcffff) AM_READ(nmk_bgvideoram_r)
494		AM_RANGE(0xd4000, 0xd47ff) AM_READ(nmk_txvideoram_r)
495		ADDRESS_MAP_END
496
497		static ADDRESS_MAP_START( acrobatm_writemem, ADDRESS_SPACE_PROGRAM, 16 )
498		AM_RANGE(0x00000, 0x3ffff) AM_WRITE(SMH_ROM)
499	457	AM_RANGE(0xc0014, 0xc0015) AM_WRITE(nmk_flipscreen_w)
500	458	AM_RANGE(0xc0016, 0xc0017) AM_WRITENOP
501	459	AM_RANGE(0xc0018, 0xc0019) AM_WRITE(nmk_tilebank_w)
502	460	AM_RANGE(0xc001e, 0xc001f) AM_WRITE(NMK004_w)
503		AM_RANGE(0xc4000, 0xc45ff) AM_WRITE(paletteram16_RRRRGGGGBBBBxxxx_word_w) AM_BASE(&paletteram16)
504		AM_RANGE(0xc8000, 0xc8007) AM_WRITE(nmk_scroll_w)
505		AM_RANGE(0xcc000, 0xcffff) AM_WRITE(nmk_bgvideoram_w) AM_BASE(&nmk_bgvideoram)
506		AM_RANGE(0xd4000, 0xd47ff) AM_WRITE(nmk_txvideoram_w) AM_BASE(&nmk_txvideoram)
	461	AM_RANGE(0xc4000, 0xc45ff) AM_RAM_WRITE(paletteram16_RRRRGGGGBBBBxxxx_word_w) AM_BASE(&paletteram16)
	462	AM_RANGE(0xc8000, 0xc8007) AM_RAM_WRITE(nmk_scroll_w)
	463	AM_RANGE(0xcc000, 0xcffff) AM_RAM_WRITE(nmk_bgvideoram_w) AM_BASE(&nmk_bgvideoram)
	464	AM_RANGE(0xd4000, 0xd47ff) AM_RAM_WRITE(nmk_txvideoram_w) AM_BASE(&nmk_txvideoram)
507	465	ADDRESS_MAP_END
508	466
509		static ADDRESS_MAP_START( bioship_readmem, ADDRESS_SPACE_PROGRAM, 16 )
510		AM_RANGE(0x000000, 0x03ffff) AM_READ(SMH_ROM)
	467	static ADDRESS_MAP_START( bioship_map, ADDRESS_SPACE_PROGRAM, 16 )
	468	AM_RANGE(0x000000, 0x03ffff) AM_ROM
511	469	AM_RANGE(0x080000, 0x080001) AM_READ_PORT("IN0")
512	470	AM_RANGE(0x080002, 0x080003) AM_READ_PORT("IN1")
513	471	AM_RANGE(0x080008, 0x080009) AM_READ_PORT("DSW1")
514	472	AM_RANGE(0x08000a, 0x08000b) AM_READ_PORT("DSW2")
515	473	AM_RANGE(0x08000e, 0x08000f) AM_READ(NMK004_r)
516		AM_RANGE(0x088000, 0x0887ff) AM_READ(SMH_RAM)
517		AM_RANGE(0x090000, 0x093fff) AM_READ(nmk_bgvideoram_r)
518		AM_RANGE(0x09c000, 0x09c7ff) AM_READ(nmk_txvideoram_r)
519		AM_RANGE(0x0f0000, 0x0fffff) AM_RAM AM_BASE(&nmk16_mainram)
520		ADDRESS_MAP_END
521
522		static ADDRESS_MAP_START( bioship_writemem, ADDRESS_SPACE_PROGRAM, 16 )
523		AM_RANGE(0x000000, 0x03ffff) AM_WRITE(SMH_ROM)
524	474	//  AM_RANGE(0x080014, 0x080015) AM_WRITE(nmk_flipscreen_w)
525	475	AM_RANGE(0x08001e, 0x08001f) AM_WRITE(NMK004_w)
526	476	AM_RANGE(0x084000, 0x084001) AM_WRITE(bioship_bank_w)
527		AM_RANGE(0x088000, 0x0887ff) AM_WRITE(paletteram16_RRRRGGGGBBBBRGBx_word_w) AM_BASE(&paletteram16)
528		AM_RANGE(0x08c000, 0x08c007) AM_WRITE(bioshipbg_scroll_w)
529		AM_RANGE(0x08c010, 0x08c017) AM_WRITE(bioship_scroll_w)
530		AM_RANGE(0x090000, 0x093fff) AM_WRITE(nmk_bgvideoram_w) AM_BASE(&nmk_bgvideoram)
531		AM_RANGE(0x09c000, 0x09c7ff) AM_WRITE(nmk_txvideoram_w) AM_BASE(&nmk_txvideoram)
	477	AM_RANGE(0x088000, 0x0887ff) AM_RAM_WRITE(paletteram16_RRRRGGGGBBBBRGBx_word_w) AM_BASE(&paletteram16)
	478	AM_RANGE(0x08c000, 0x08c007) AM_RAM_WRITE(bioshipbg_scroll_w)
	479	AM_RANGE(0x08c010, 0x08c017) AM_RAM_WRITE(bioship_scroll_w)
	480	AM_RANGE(0x090000, 0x093fff) AM_RAM_WRITE(nmk_bgvideoram_w) AM_BASE(&nmk_bgvideoram)
	481	AM_RANGE(0x09c000, 0x09c7ff) AM_RAM_WRITE(nmk_txvideoram_w) AM_BASE(&nmk_txvideoram)
	482	AM_RANGE(0x0f0000, 0x0fffff) AM_RAM AM_BASE(&nmk16_mainram)
532	483	ADDRESS_MAP_END
533	484
534	485	/******************************************************************************************
r4679	r4680
920	871	mcu_run(timer->machine,0);
921	872	}
922	873
923		static ADDRESS_MAP_START( tdragon_readmem, ADDRESS_SPACE_PROGRAM, 16 )
924		AM_RANGE(0x000000, 0x03ffff) AM_READ(SMH_ROM)
	874	static ADDRESS_MAP_START( tdragon_map, ADDRESS_SPACE_PROGRAM, 16 )
	875	AM_RANGE(0x000000, 0x03ffff) AM_ROM
925	876	AM_RANGE(0x044022, 0x044023) AM_READNOP  /* No Idea */
926		//  AM_RANGE(0x0b0000, 0x0b7fff) AM_READ(SMH_RAM) /* Work RAM */
927		//  AM_RANGE(0x0b8000, 0x0b8fff) AM_READ(SMH_RAM) /* Sprite RAM */
928		//  AM_RANGE(0x0b9000, 0x0bdfff) AM_READ(SMH_RAM) /* Work RAM */
929		//  AM_RANGE(0x0be000, 0x0befff) AM_READ(SMH_RAM) /* Work RAM */
930		//  AM_RANGE(0x0bf000, 0x0bffff) AM_READ(SMH_RAM) /* Work RAM */
	877	//  AM_RANGE(0x0b0000, 0x0b7fff) AM_RAM    /* Work RAM */
	878	//  AM_RANGE(0x0b8000, 0x0b8fff) AM_RAM AM_BASE(&spriteram16) AM_SIZE(&spriteram_size) /* Sprite RAM */
	879	//  AM_RANGE(0x0b9000, 0x0bdfff) AM_RAM AM_BASE(&nmk16_mcu_work_ram)   /* Work RAM */
	880	//  AM_RANGE(0x0be000, 0x0befff) AM_READWRITE(mcu_shared_r,tdragon_mcu_shared_w) AM_BASE(&nmk16_mcu_shared_ram)  /* Work RAM */
	881	//  AM_RANGE(0x0bf000, 0x0bffff) AM_RAM    /* Work RAM */
931	882	AM_RANGE(0x0b0000, 0x0bffff) AM_RAM_WRITE( tdragon_mainram_w ) AM_BASE(&nmk16_mainram)
932
933
934		AM_RANGE(0x0c8000, 0x0c87ff) AM_READ(SMH_RAM)  /* Palette RAM */
935	883	AM_RANGE(0x0c0000, 0x0c0001) AM_READ_PORT("IN0")
936	884	AM_RANGE(0x0c0002, 0x0c0003) AM_READ_PORT("IN1")
937	885	AM_RANGE(0x0c0008, 0x0c0009) AM_READ_PORT("DSW1")
938	886	AM_RANGE(0x0c000a, 0x0c000b) AM_READ_PORT("DSW2")
939	887	AM_RANGE(0x0c000e, 0x0c000f) AM_READ(NMK004_r)
940		AM_RANGE(0x0cc000, 0x0cffff) AM_READ(nmk_bgvideoram_r)
941		AM_RANGE(0x0d0000, 0x0d07ff) AM_READ(nmk_txvideoram_r)
942		ADDRESS_MAP_END
943
944		static ADDRESS_MAP_START( tdragon_writemem, ADDRESS_SPACE_PROGRAM, 16 )
945		AM_RANGE(0x000000, 0x03ffff) AM_WRITE(SMH_ROM)
946		//  AM_RANGE(0x0b0000, 0x0b7fff) AM_WRITE(SMH_RAM)    /* Work RAM */
947		//  AM_RANGE(0x0b8000, 0x0b8fff) AM_WRITE(SMH_RAM) AM_BASE(&spriteram16) AM_SIZE(&spriteram_size) /* Sprite RAM */
948		//  AM_RANGE(0x0b9000, 0x0bdfff) AM_WRITE(SMH_RAM) AM_BASE(&nmk16_mcu_work_ram)   /* Work RAM */
949		//  AM_RANGE(0x0be000, 0x0befff) AM_READWRITE(mcu_shared_r,tdragon_mcu_shared_w) AM_BASE(&nmk16_mcu_shared_ram)  /* Work RAM */
950		//  AM_RANGE(0x0bf000, 0x0bffff) AM_WRITE(SMH_RAM)    /* Work RAM */
951	888	AM_RANGE(0x0c0014, 0x0c0015) AM_WRITE(nmk_flipscreen_w) /* Maybe */
952	889	AM_RANGE(0x0c0018, 0x0c0019) AM_WRITE(nmk_tilebank_w) /* Tile Bank ? */
953	890	AM_RANGE(0x0c001e, 0x0c001f) AM_WRITE(NMK004_w)
954		AM_RANGE(0x0c4000, 0x0c4007) AM_WRITE(nmk_scroll_w)
955		AM_RANGE(0x0c8000, 0x0c87ff) AM_WRITE(paletteram16_RRRRGGGGBBBBRGBx_word_w) AM_BASE(&paletteram16)
956		AM_RANGE(0x0cc000, 0x0cffff) AM_WRITE(nmk_bgvideoram_w) AM_BASE(&nmk_bgvideoram)
957		AM_RANGE(0x0d0000, 0x0d07ff) AM_WRITE(nmk_txvideoram_w) AM_BASE(&nmk_txvideoram)
	891	AM_RANGE(0x0c4000, 0x0c4007) AM_RAM_WRITE(nmk_scroll_w)
	892	AM_RANGE(0x0c8000, 0x0c87ff) AM_RAM_WRITE(paletteram16_RRRRGGGGBBBBRGBx_word_w) AM_BASE(&paletteram16)
	893	AM_RANGE(0x0cc000, 0x0cffff) AM_RAM_WRITE(nmk_bgvideoram_w) AM_BASE(&nmk_bgvideoram)
	894	AM_RANGE(0x0d0000, 0x0d07ff) AM_RAM_WRITE(nmk_txvideoram_w) AM_BASE(&nmk_txvideoram)
958	895	ADDRESS_MAP_END
959	896
960		static ADDRESS_MAP_START( tdragonb_writemem, ADDRESS_SPACE_PROGRAM, 16 )
961		AM_RANGE(0x000000, 0x03ffff) AM_WRITE(SMH_ROM)
	897	static ADDRESS_MAP_START( tdragonb_map, ADDRESS_SPACE_PROGRAM, 16 )
	898	AM_RANGE(0x000000, 0x03ffff) AM_ROM
	899	AM_RANGE(0x044022, 0x044023) AM_READNOP  /* No Idea */
962	900	AM_RANGE(0x0b0000, 0x0bffff) AM_RAM AM_BASE(&nmk16_mainram)
	901	AM_RANGE(0x0c0000, 0x0c0001) AM_READ_PORT("IN0")
	902	AM_RANGE(0x0c0002, 0x0c0003) AM_READ_PORT("IN1")
	903	AM_RANGE(0x0c0008, 0x0c0009) AM_READ_PORT("DSW1")
	904	AM_RANGE(0x0c000a, 0x0c000b) AM_READ_PORT("DSW2")
963	905	AM_RANGE(0x0c0014, 0x0c0015) AM_WRITE(nmk_flipscreen_w) /* Maybe */
964	906	AM_RANGE(0x0c0018, 0x0c0019) AM_WRITE(nmk_tilebank_w) /* Tile Bank ? */
965	907	AM_RANGE(0x0c001e, 0x0c001f) AM_WRITE(seibu_main_mustb_w)
966		AM_RANGE(0x0c4000, 0x0c4007) AM_WRITE(nmk_scroll_w)
967		AM_RANGE(0x0c8000, 0x0c87ff) AM_WRITE(paletteram16_RRRRGGGGBBBBRGBx_word_w) AM_BASE(&paletteram16)
968		AM_RANGE(0x0cc000, 0x0cffff) AM_WRITE(nmk_bgvideoram_w) AM_BASE(&nmk_bgvideoram)
969		AM_RANGE(0x0d0000, 0x0d07ff) AM_WRITE(nmk_txvideoram_w) AM_BASE(&nmk_txvideoram)
	908	AM_RANGE(0x0c4000, 0x0c4007) AM_RAM_WRITE(nmk_scroll_w)
	909	AM_RANGE(0x0c8000, 0x0c87ff) AM_RAM_WRITE(paletteram16_RRRRGGGGBBBBRGBx_word_w) AM_BASE(&paletteram16)
	910	AM_RANGE(0x0cc000, 0x0cffff) AM_RAM_WRITE(nmk_bgvideoram_w) AM_BASE(&nmk_bgvideoram)
	911	AM_RANGE(0x0d0000, 0x0d07ff) AM_RAM_WRITE(nmk_txvideoram_w) AM_BASE(&nmk_txvideoram)
970	912	ADDRESS_MAP_END
971	913
972		static ADDRESS_MAP_START( ssmissin_readmem, ADDRESS_SPACE_PROGRAM, 16 )
973		AM_RANGE(0x000000, 0x03ffff) AM_READ(SMH_ROM)
	914	static ADDRESS_MAP_START( ssmissin_map, ADDRESS_SPACE_PROGRAM, 16 )
	915	AM_RANGE(0x000000, 0x03ffff) AM_ROM
974	916	AM_RANGE(0x0b0000, 0x0bffff) AM_RAM AM_BASE(&nmk16_mainram)
975		AM_RANGE(0x0c8000, 0x0c87ff) AM_READ(SMH_RAM)  /* Palette RAM */
976	917	AM_RANGE(0x0c0000, 0x0c0001) AM_READ_PORT("IN0")
977	918	AM_RANGE(0x0c0004, 0x0c0005) AM_READ_PORT("IN1")
978	919	AM_RANGE(0x0c0006, 0x0c0007) AM_READ_PORT("DSW1")
979	920	//  AM_RANGE(0x0c000e, 0x0c000f) AM_READ(??)
980		AM_RANGE(0x0cc000, 0x0cffff) AM_READ(nmk_bgvideoram_r)
981		AM_RANGE(0x0d0000, 0x0d07ff) AM_READ(nmk_txvideoram_r)
982		AM_RANGE(0x0d0800, 0x0d0fff) AM_READ(nmk_txvideoram_r)
983		AM_RANGE(0x0d1000, 0x0d17ff) AM_READ(nmk_txvideoram_r)
984		ADDRESS_MAP_END
985
986		static ADDRESS_MAP_START( ssmissin_writemem, ADDRESS_SPACE_PROGRAM, 16 )
987		AM_RANGE(0x000000, 0x03ffff) AM_WRITE(SMH_ROM)
988	921	AM_RANGE(0x0c0014, 0x0c0015) AM_WRITE(nmk_flipscreen_w) /* Maybe */
989	922	AM_RANGE(0x0c0018, 0x0c0019) AM_WRITE(nmk_tilebank_w) /* Tile Bank ? */
990	923	AM_RANGE(0x0c001e, 0x0c001f) AM_WRITE(ssmissin_sound_w)
991		AM_RANGE(0x0c4000, 0x0c4007) AM_WRITE(nmk_scroll_w)
992		AM_RANGE(0x0c8000, 0x0c87ff) AM_WRITE(paletteram16_RRRRGGGGBBBBRGBx_word_w) AM_BASE(&paletteram16)
993		AM_RANGE(0x0cc000, 0x0cffff) AM_WRITE(nmk_bgvideoram_w) AM_BASE(&nmk_bgvideoram)
994		AM_RANGE(0x0d0000, 0x0d07ff) AM_WRITE(nmk_txvideoram_w) AM_BASE(&nmk_txvideoram)
995		AM_RANGE(0x0d0800, 0x0d0fff) AM_WRITE(nmk_txvideoram_w) //mirror for airattck
996		AM_RANGE(0x0d1000, 0x0d17ff) AM_WRITE(nmk_txvideoram_w) //mirror for airattck
	924	AM_RANGE(0x0c4000, 0x0c4007) AM_RAM_WRITE(nmk_scroll_w)
	925	AM_RANGE(0x0c8000, 0x0c87ff) AM_RAM_WRITE(paletteram16_RRRRGGGGBBBBRGBx_word_w) AM_BASE(&paletteram16)
	926	AM_RANGE(0x0cc000, 0x0cffff) AM_RAM_WRITE(nmk_bgvideoram_w) AM_BASE(&nmk_bgvideoram)
	927	AM_RANGE(0x0d0000, 0x0d07ff) AM_RAM_WRITE(nmk_txvideoram_w) AM_BASE(&nmk_txvideoram)
	928	AM_RANGE(0x0d0800, 0x0d0fff) AM_RAM_WRITE(nmk_txvideoram_w) //mirror for airattck
	929	AM_RANGE(0x0d1000, 0x0d17ff) AM_RAM_WRITE(nmk_txvideoram_w) //mirror for airattck
997	930	ADDRESS_MAP_END
998	931
999
1000
1001		static ADDRESS_MAP_START( ssmissin_sound_readmem, ADDRESS_SPACE_PROGRAM, 8 )
1002		AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM)
1003		AM_RANGE(0x8000, 0x87ff) AM_READ(SMH_RAM)
1004		AM_RANGE(0x9800, 0x9800) AM_DEVREAD("oki1", okim6295_r)
	932	static ADDRESS_MAP_START( ssmissin_sound_map, ADDRESS_SPACE_PROGRAM, 8 )
	933	AM_RANGE(0x0000, 0x7fff) AM_ROM
	934	AM_RANGE(0x8000, 0x87ff) AM_RAM
	935	AM_RANGE(0x9000, 0x9000) AM_WRITE(ssmissin_soundbank_w)
	936	AM_RANGE(0x9800, 0x9800) AM_DEVREADWRITE("oki1", okim6295_r,okim6295_w)
1005	937	AM_RANGE(0xa000, 0xa000) AM_READ(soundlatch_r)
1006	938	ADDRESS_MAP_END
1007	939
1008		static ADDRESS_MAP_START( ssmissin_sound_writemem, ADDRESS_SPACE_PROGRAM, 8 )
1009		AM_RANGE(0x0000, 0x7fff) AM_WRITE(SMH_ROM)
1010		AM_RANGE(0x8000, 0x87ff) AM_WRITE(SMH_RAM)
1011		AM_RANGE(0x9000, 0x9000) AM_WRITE(ssmissin_soundbank_w)
1012		AM_RANGE(0x9800, 0x9800) AM_DEVWRITE("oki1", okim6295_w)
1013		ADDRESS_MAP_END
1014
1015
1016		static ADDRESS_MAP_START( strahl_readmem, ADDRESS_SPACE_PROGRAM, 16 )
1017		AM_RANGE(0x00000, 0x3ffff) AM_READ(SMH_ROM)
	940	static ADDRESS_MAP_START( strahl_map, ADDRESS_SPACE_PROGRAM, 16 )
	941	AM_RANGE(0x00000, 0x3ffff) AM_ROM
1018	942	AM_RANGE(0x80000, 0x80001) AM_READ_PORT("IN0")
1019	943	AM_RANGE(0x80002, 0x80003) AM_READ_PORT("IN1")
1020	944	AM_RANGE(0x80008, 0x80009) AM_READ_PORT("DSW1")
1021	945	AM_RANGE(0x8000a, 0x8000b) AM_READ_PORT("DSW2")
1022	946	AM_RANGE(0x8000e, 0x8000f) AM_READ(NMK004_r)
1023		AM_RANGE(0x8c000, 0x8c7ff) AM_READ(SMH_RAM)
1024		AM_RANGE(0x90000, 0x93fff) AM_READ(nmk_bgvideoram_r)
1025		AM_RANGE(0x94000, 0x97fff) AM_READ(nmk_fgvideoram_r)
1026		AM_RANGE(0x9c000, 0x9c7ff) AM_READ(nmk_txvideoram_r)
1027		AM_RANGE(0xf0000, 0xfffff) AM_RAM AM_BASE(&nmk16_mainram)
1028		ADDRESS_MAP_END
1029
1030		static ADDRESS_MAP_START( strahl_writemem, ADDRESS_SPACE_PROGRAM, 16 )
1031		AM_RANGE(0x00000, 0x3ffff) AM_WRITE(SMH_ROM)
1032	947	AM_RANGE(0x80014, 0x80015) AM_WRITE(nmk_flipscreen_w)
1033	948	AM_RANGE(0x80016, 0x80017) AM_WRITENOP   /* IRQ enable? */
1034	949	AM_RANGE(0x8001e, 0x8001f) AM_WRITE(NMK004_w)
1035		AM_RANGE(0x84000, 0x84007) AM_WRITE(nmk_scroll_w)
1036		AM_RANGE(0x88000, 0x88007) AM_WRITE(nmk_scroll_2_w)
1037		AM_RANGE(0x8c000, 0x8c7ff) AM_WRITE(paletteram16_RRRRGGGGBBBBxxxx_word_w) AM_BASE(&paletteram16)
1038		AM_RANGE(0x90000, 0x93fff) AM_WRITE(nmk_bgvideoram_w) AM_BASE(&nmk_bgvideoram)
1039		AM_RANGE(0x94000, 0x97fff) AM_WRITE(nmk_fgvideoram_w) AM_BASE(&nmk_fgvideoram)
1040		AM_RANGE(0x9c000, 0x9c7ff) AM_WRITE(nmk_txvideoram_w) AM_BASE(&nmk_txvideoram)
	950	AM_RANGE(0x84000, 0x84007) AM_RAM_WRITE(nmk_scroll_w)
	951	AM_RANGE(0x88000, 0x88007) AM_RAM_WRITE(nmk_scroll_2_w)
	952	AM_RANGE(0x8c000, 0x8c7ff) AM_RAM_WRITE(paletteram16_RRRRGGGGBBBBxxxx_word_w) AM_BASE(&paletteram16)
	953	AM_RANGE(0x90000, 0x93fff) AM_RAM_WRITE(nmk_bgvideoram_w) AM_BASE(&nmk_bgvideoram)
	954	AM_RANGE(0x94000, 0x97fff) AM_RAM_WRITE(nmk_fgvideoram_w) AM_BASE(&nmk_fgvideoram)
	955	AM_RANGE(0x9c000, 0x9c7ff) AM_RAM_WRITE(nmk_txvideoram_w) AM_BASE(&nmk_txvideoram)
	956	AM_RANGE(0xf0000, 0xfffff) AM_RAM AM_BASE(&nmk16_mainram)
1041	957	ADDRESS_MAP_END
1042	958
1043		static ADDRESS_MAP_START( macross_readmem, ADDRESS_SPACE_PROGRAM, 16 )
1044		AM_RANGE(0x000000, 0x07ffff) AM_READ(SMH_ROM)
	959	static ADDRESS_MAP_START( macross_map, ADDRESS_SPACE_PROGRAM, 16 )
	960	AM_RANGE(0x000000, 0x07ffff) AM_ROM
1045	961	AM_RANGE(0x080000, 0x080001) AM_READ_PORT("IN0")
1046	962	AM_RANGE(0x080002, 0x080003) AM_READ_PORT("IN1")
1047	963	AM_RANGE(0x080008, 0x080009) AM_READ_PORT("DSW1")
1048	964	AM_RANGE(0x08000a, 0x08000b) AM_READ_PORT("DSW2")
1049	965	AM_RANGE(0x08000e, 0x08000f) AM_READ(NMK004_r)
1050		AM_RANGE(0x088000, 0x0887ff) AM_READ(SMH_RAM)
1051		AM_RANGE(0x090000, 0x093fff) AM_READ(nmk_bgvideoram_r)
1052		AM_RANGE(0x09c000, 0x09c7ff) AM_READ(nmk_txvideoram_r)
1053		AM_RANGE(0x0f0000, 0x0fffff) AM_RAM_WRITE(nmk16_mainram_strange_w) AM_BASE(&nmk16_mainram)
1054		ADDRESS_MAP_END
1055
1056		static ADDRESS_MAP_START( macross_writemem, ADDRESS_SPACE_PROGRAM, 16 )
1057		AM_RANGE(0x000000, 0x07ffff) AM_WRITE(SMH_ROM)
1058	966	AM_RANGE(0x080014, 0x080015) AM_WRITE(nmk_flipscreen_w)
1059	967	AM_RANGE(0x080016, 0x080017) AM_WRITENOP   /* IRQ enable? */
1060	968	AM_RANGE(0x080018, 0x080019) AM_WRITE(nmk_tilebank_w)
1061	969	AM_RANGE(0x08001e, 0x08001f) AM_WRITE(NMK004_w)
1062		AM_RANGE(0x088000, 0x0887ff) AM_WRITE(paletteram16_RRRRGGGGBBBBRGBx_word_w) AM_BASE(&paletteram16)
1063		AM_RANGE(0x08c000, 0x08c007) AM_WRITE(nmk_scroll_w)
1064		AM_RANGE(0x090000, 0x093fff) AM_WRITE(nmk_bgvideoram_w) AM_BASE(&nmk_bgvideoram)
1065		AM_RANGE(0x09c000, 0x09c7ff) AM_WRITE(nmk_txvideoram_w) AM_BASE(&nmk_txvideoram)
	970	AM_RANGE(0x088000, 0x0887ff) AM_RAM_WRITE(paletteram16_RRRRGGGGBBBBRGBx_word_w) AM_BASE(&paletteram16)
	971	AM_RANGE(0x08c000, 0x08c007) AM_RAM_WRITE(nmk_scroll_w)
	972	AM_RANGE(0x090000, 0x093fff) AM_RAM_WRITE(nmk_bgvideoram_w) AM_BASE(&nmk_bgvideoram)
	973	AM_RANGE(0x09c000, 0x09c7ff) AM_RAM_WRITE(nmk_txvideoram_w) AM_BASE(&nmk_txvideoram)
	974	AM_RANGE(0x0f0000, 0x0fffff) AM_RAM_WRITE(nmk16_mainram_strange_w) AM_BASE(&nmk16_mainram)
1066	975	ADDRESS_MAP_END
1067	976
1068	977	static ADDRESS_MAP_START( gunnail_map, ADDRESS_SPACE_PROGRAM, 16 )
r4679	r4680
1085	994	AM_RANGE(0x0f0000, 0x0fffff) AM_RAM AM_BASE(&nmk16_mainram)
1086	995	ADDRESS_MAP_END
1087	996
1088		static ADDRESS_MAP_START( macross2_readmem, ADDRESS_SPACE_PROGRAM, 16 )
1089		AM_RANGE(0x000000, 0x07ffff) AM_READ(SMH_ROM)
	997	static ADDRESS_MAP_START( macross2_map, ADDRESS_SPACE_PROGRAM, 16 )
	998	AM_RANGE(0x000000, 0x07ffff) AM_ROM
1090	999	AM_RANGE(0x100000, 0x100001) AM_READ_PORT("IN0")
1091	1000	AM_RANGE(0x100002, 0x100003) AM_READ_PORT("IN1")
1092	1001	AM_RANGE(0x100008, 0x100009) AM_READ_PORT("DSW1")
1093	1002	AM_RANGE(0x10000a, 0x10000b) AM_READ_PORT("DSW2")
1094	1003	AM_RANGE(0x10000e, 0x10000f) AM_READ(soundlatch2_word_r)   /* from Z80 */
1095		AM_RANGE(0x120000, 0x1207ff) AM_READ(SMH_RAM)
1096		AM_RANGE(0x140000, 0x14ffff) AM_READ(nmk_bgvideoram_r)
1097		AM_RANGE(0x170000, 0x170fff) AM_READ(nmk_txvideoram_r)
1098		AM_RANGE(0x171000, 0x171fff) AM_READ(nmk_txvideoram_r)   /* mirror */
1099		AM_RANGE(0x1f0000, 0x1fffff) AM_RAM AM_BASE(&nmk16_mainram)
1100		ADDRESS_MAP_END
1101
1102		static ADDRESS_MAP_START( macross2_writemem, ADDRESS_SPACE_PROGRAM, 16 )
1103		AM_RANGE(0x000000, 0x07ffff) AM_WRITE(SMH_ROM)
1104	1004	AM_RANGE(0x100014, 0x100015) AM_WRITE(nmk_flipscreen_w)
1105	1005	AM_RANGE(0x100016, 0x100017) AM_WRITE(macross2_sound_reset_w)   /* Z80 reset */
1106	1006	AM_RANGE(0x100018, 0x100019) AM_WRITE(nmk_tilebank_w)
1107	1007	AM_RANGE(0x10001e, 0x10001f) AM_WRITE(macross2_sound_command_w)   /* to Z80 */
1108		AM_RANGE(0x120000, 0x1207ff) AM_WRITE(paletteram16_RRRRGGGGBBBBRGBx_word_w) AM_BASE(&paletteram16)
1109		AM_RANGE(0x130000, 0x130007) AM_WRITE(nmk_scroll_w)
	1008	AM_RANGE(0x120000, 0x1207ff) AM_RAM_WRITE(paletteram16_RRRRGGGGBBBBRGBx_word_w) AM_BASE(&paletteram16)
	1009	AM_RANGE(0x130000, 0x130007) AM_RAM_WRITE(nmk_scroll_w)
1110	1010	AM_RANGE(0x130008, 0x1307ff) AM_WRITENOP   /* 0 only? */
1111		AM_RANGE(0x140000, 0x14ffff) AM_WRITE(nmk_bgvideoram_w) AM_BASE(&nmk_bgvideoram)
1112		AM_RANGE(0x170000, 0x170fff) AM_WRITE(nmk_txvideoram_w) AM_BASE(&nmk_txvideoram)
1113		AM_RANGE(0x171000, 0x171fff) AM_WRITE(nmk_txvideoram_w)   /* mirror */
	1011	AM_RANGE(0x140000, 0x14ffff) AM_RAM_WRITE(nmk_bgvideoram_w) AM_BASE(&nmk_bgvideoram)
	1012	AM_RANGE(0x170000, 0x170fff) AM_RAM_WRITE(nmk_txvideoram_w) AM_BASE(&nmk_txvideoram)
	1013	AM_RANGE(0x171000, 0x171fff) AM_RAM_WRITE(nmk_txvideoram_w)   /* mirror */
	1014	AM_RANGE(0x1f0000, 0x1fffff) AM_RAM AM_BASE(&nmk16_mainram)
1114	1015	ADDRESS_MAP_END
1115	1016
1116		static ADDRESS_MAP_START( raphero_writemem, ADDRESS_SPACE_PROGRAM, 16 )
1117		AM_RANGE(0x000000, 0x07ffff) AM_WRITE(SMH_ROM)
	1017	static ADDRESS_MAP_START( raphero_map, ADDRESS_SPACE_PROGRAM, 16 )
	1018	AM_RANGE(0x000000, 0x07ffff) AM_ROM
	1019	AM_RANGE(0x100000, 0x100001) AM_READ_PORT("IN0")
	1020	AM_RANGE(0x100002, 0x100003) AM_READ_PORT("IN1")
	1021	AM_RANGE(0x100008, 0x100009) AM_READ_PORT("DSW1")
	1022	AM_RANGE(0x10000a, 0x10000b) AM_READ_PORT("DSW2")
	1023	AM_RANGE(0x10000e, 0x10000f) AM_READ(soundlatch2_word_r)   /* from Z80 */
1118	1024	AM_RANGE(0x100014, 0x100015) AM_WRITE(nmk_flipscreen_w)
1119		AM_RANGE(0x100016, 0x100017) AM_WRITENOP   /* IRQ eanble? */
	1025	AM_RANGE(0x100016, 0x100017) AM_WRITENOP   /* IRQ enable or z80 sound reset like in Macross 2? */
1120	1026	AM_RANGE(0x100018, 0x100019) AM_WRITE(nmk_tilebank_w)
1121		AM_RANGE(0x10001e, 0x10001f) AM_WRITE(macross2_sound_command_w)   /* to sound cpu */
1122		AM_RANGE(0x120000, 0x1207ff) AM_WRITE(paletteram16_RRRRGGGGBBBBRGBx_word_w) AM_BASE(&paletteram16)
1123		AM_RANGE(0x130000, 0x1307ff) AM_WRITE(nmk_scroll_3_w) AM_BASE(&gunnail_scrollram)
1124		AM_RANGE(0x140000, 0x14ffff) AM_WRITE(nmk_bgvideoram_w) AM_BASE(&nmk_bgvideoram)
1125		AM_RANGE(0x170000, 0x170fff) AM_WRITE(nmk_txvideoram_w) AM_BASE(&nmk_txvideoram)
1126		AM_RANGE(0x171000, 0x171fff) AM_WRITE(nmk_txvideoram_w)   /* mirror */
	1027	AM_RANGE(0x10001e, 0x10001f) AM_WRITE(macross2_sound_command_w)   /* to Z80 */
	1028	AM_RANGE(0x120000, 0x1207ff) AM_RAM_WRITE(paletteram16_RRRRGGGGBBBBRGBx_word_w) AM_BASE(&paletteram16)
	1029	AM_RANGE(0x130000, 0x1307ff) AM_RAM_WRITE(nmk_scroll_3_w) AM_BASE(&gunnail_scrollram)
	1030	AM_RANGE(0x140000, 0x14ffff) AM_RAM_WRITE(nmk_bgvideoram_w) AM_BASE(&nmk_bgvideoram)
	1031	AM_RANGE(0x170000, 0x170fff) AM_RAM_WRITE(nmk_txvideoram_w) AM_BASE(&nmk_txvideoram)
	1032	AM_RANGE(0x171000, 0x171fff) AM_RAM_WRITE(nmk_txvideoram_w)   /* mirror */
	1033	AM_RANGE(0x1f0000, 0x1fffff) AM_RAM AM_BASE(&nmk16_mainram)
1127	1034	ADDRESS_MAP_END
1128	1035
1129	1036	#if 0
r4679	r4680
1148	1055
1149	1056	static ADDRESS_MAP_START( raphero_sound_mem_map, ADDRESS_SPACE_PROGRAM, 8 )
1150	1057	AM_RANGE( 0x0000, 0x7fff ) AM_ROM
1151		AM_RANGE( 0x8000, 0xbfff ) AM_READ( SMH_BANK1 )
	1058	AM_RANGE( 0x8000, 0xbfff ) AM_READ( SMH_BANK(1) )
1152	1059	AM_RANGE( 0xc000, 0xc001 ) AM_DEVREADWRITE("ym", ym2203_r, ym2203_w )
1153	1060	AM_RANGE( 0xc800, 0xc800 ) AM_DEVREADWRITE( "oki1", okim6295_r, okim6295_w )
1154	1061	AM_RANGE( 0xc808, 0xc808 ) AM_DEVREADWRITE( "oki2", okim6295_r, okim6295_w )
r4679	r4680
1159	1066	AM_RANGE( 0xe000, 0xffff ) AM_RAM
1160	1067	ADDRESS_MAP_END
1161	1068
1162		static ADDRESS_MAP_START( macross2_sound_readmem, ADDRESS_SPACE_PROGRAM, 8 )
1163		AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM)
1164		AM_RANGE(0x8000, 0xbfff) AM_READ(SMH_BANK1)   /* banked ROM */
	1069	static ADDRESS_MAP_START( macross2_sound_map, ADDRESS_SPACE_PROGRAM, 8 )
	1070	AM_RANGE(0x0000, 0x7fff) AM_ROM
	1071	AM_RANGE(0x8000, 0xbfff) AM_ROMBANK(1)   /* banked ROM */
1165	1072	AM_RANGE(0xa000, 0xa000) AM_READNOP   /* IRQ ack? watchdog? */
1166		AM_RANGE(0xc000, 0xdfff) AM_READ(SMH_RAM)
1167		AM_RANGE(0xf000, 0xf000) AM_READ(soundlatch_r)   /* from 68000 */
1168		ADDRESS_MAP_END
1169
1170		static ADDRESS_MAP_START( macross2_sound_writemem, ADDRESS_SPACE_PROGRAM, 8 )
1171		AM_RANGE(0x0000, 0xbfff) AM_WRITE(SMH_ROM)
1172		AM_RANGE(0xc000, 0xdfff) AM_WRITE(SMH_RAM)
	1073	AM_RANGE(0xc000, 0xdfff) AM_RAM
1173	1074	AM_RANGE(0xe001, 0xe001) AM_WRITE(macross2_sound_bank_w)
1174		AM_RANGE(0xf000, 0xf000) AM_WRITE(soundlatch2_w)   /* to 68000 */
	1075	AM_RANGE(0xf000, 0xf000) AM_READWRITE(soundlatch_r,soundlatch2_w)   /* from 68000 */
1175	1076	ADDRESS_MAP_END
1176	1077
1177	1078	static ADDRESS_MAP_START( macross2_sound_io_map, ADDRESS_SPACE_IO, 8 )
r4679	r4680
1182	1083	AM_RANGE(0x90, 0x97) AM_WRITE(NMK112_okibank_w)
1183	1084	ADDRESS_MAP_END
1184	1085
1185		static ADDRESS_MAP_START( bjtwin_readmem, ADDRESS_SPACE_PROGRAM, 16 )
1186		AM_RANGE(0x000000, 0x07ffff) AM_READ(SMH_ROM)
	1086	static ADDRESS_MAP_START( bjtwin_map, ADDRESS_SPACE_PROGRAM, 16 )
	1087	AM_RANGE(0x000000, 0x07ffff) AM_ROM
1187	1088	AM_RANGE(0x080000, 0x080001) AM_READ_PORT("IN0")
1188	1089	AM_RANGE(0x080002, 0x080003) AM_READ_PORT("IN1")
1189	1090	AM_RANGE(0x080008, 0x080009) AM_READ_PORT("DSW1")
1190	1091	AM_RANGE(0x08000a, 0x08000b) AM_READ_PORT("DSW2")
1191		AM_RANGE(0x084000, 0x084001) AM_DEVREAD8("oki1", okim6295_r, 0x00ff)
1192		AM_RANGE(0x084010, 0x084011) AM_DEVREAD8("oki2", okim6295_r, 0x00ff)
1193		AM_RANGE(0x088000, 0x0887ff) AM_READ(SMH_RAM)
1194		AM_RANGE(0x09c000, 0x09cfff) AM_READ(nmk_bgvideoram_r)
1195		AM_RANGE(0x09d000, 0x09dfff) AM_READ(nmk_bgvideoram_r)   /* mirror */
1196		ADDRESS_MAP_END
1197
1198		static ADDRESS_MAP_START( bjtwin_writemem, ADDRESS_SPACE_PROGRAM, 16 )
1199		AM_RANGE(0x000000, 0x07ffff) AM_WRITE(SMH_ROM)
1200	1092	AM_RANGE(0x080014, 0x080015) AM_WRITE(nmk_flipscreen_w)
1201		AM_RANGE(0x084000, 0x084001) AM_DEVWRITE8("oki1", okim6295_w, 0x00ff)
1202		AM_RANGE(0x084010, 0x084011) AM_DEVWRITE8("oki2", okim6295_w, 0x00ff)
	1093	AM_RANGE(0x084000, 0x084001) AM_DEVREADWRITE8("oki1", okim6295_r,okim6295_w, 0x00ff)
	1094	AM_RANGE(0x084010, 0x084011) AM_DEVREADWRITE8("oki2", okim6295_r,okim6295_w, 0x00ff)
1203	1095	AM_RANGE(0x084020, 0x08402f) AM_WRITE(NMK112_okibank_lsb_w)
1204		AM_RANGE(0x088000, 0x0887ff) AM_WRITE(paletteram16_RRRRGGGGBBBBRGBx_word_w) AM_BASE(&paletteram16)
1205	1096	AM_RANGE(0x094000, 0x094001) AM_WRITE(nmk_tilebank_w)
1206	1097	AM_RANGE(0x094002, 0x094003) AM_WRITENOP   /* IRQ enable? */
1207		AM_RANGE(0x09c000, 0x09cfff) AM_WRITE(nmk_bgvideoram_w) AM_BASE(&nmk_bgvideoram)
1208		AM_RANGE(0x09d000, 0x09dfff) AM_WRITE(nmk_bgvideoram_w)   /* mirror */
	1098	AM_RANGE(0x088000, 0x0887ff) AM_RAM_WRITE(paletteram16_RRRRGGGGBBBBRGBx_word_w) AM_BASE(&paletteram16)
	1099	AM_RANGE(0x09c000, 0x09cfff) AM_RAM_WRITE(nmk_bgvideoram_w) AM_BASE(&nmk_bgvideoram)
	1100	AM_RANGE(0x09d000, 0x09dfff) AM_RAM_WRITE(nmk_bgvideoram_w)   /* mirror */
1209	1101	AM_RANGE(0x0f0000, 0x0fffff) AM_RAM AM_BASE(&nmk16_mainram)
1210	1102	ADDRESS_MAP_END
1211	1103
1212
1213	1104	static INPUT_PORTS_START( vandyke )
1214	1105	PORT_START("IN0")
1215	1106	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 )
r4679	r4680
3596	3487
3597	3488	/* basic machine hardware */
3598	3489	MDRV_CPU_ADD("maincpu", M68000, 10000000) /* 10 MHz */
3599		MDRV_CPU_PROGRAM_MAP(tharrier_readmem,tharrier_writemem)
	3490	MDRV_CPU_PROGRAM_MAP(tharrier_map,0)
3600	3491	MDRV_CPU_VBLANK_INT_HACK(nmk_interrupt,2)
3601	3492	MDRV_CPU_PERIODIC_INT(irq1_line_hold,112)/* ???????? */
3602	3493
3603	3494	MDRV_CPU_ADD("audiocpu", Z80, 3000000)
3604		MDRV_CPU_PROGRAM_MAP(tharrier_sound_readmem,tharrier_sound_writemem)
	3495	MDRV_CPU_PROGRAM_MAP(tharrier_sound_map,0)
3605	3496	MDRV_CPU_IO_MAP(tharrier_sound_io_map,0)
3606	3497
3607	3498	MDRV_MACHINE_RESET(mustang_sound)
r4679	r4680
3645	3536
3646	3537	/* basic machine hardware */
3647	3538	MDRV_CPU_ADD("maincpu", M68000, 10000000) /* 10? MHz - check */
3648		MDRV_CPU_PROGRAM_MAP(manybloc_readmem,manybloc_writemem)
	3539	MDRV_CPU_PROGRAM_MAP(manybloc_map,0)
3649	3540	MDRV_CPU_VBLANK_INT_HACK(nmk_interrupt,2)
3650	3541	MDRV_CPU_PERIODIC_INT(irq1_line_hold,56)/* this needs to equal the framerate on this, rather than being double it .. */
3651	3542
3652	3543	MDRV_CPU_ADD("audiocpu", Z80, 3000000)
3653		MDRV_CPU_PROGRAM_MAP(tharrier_sound_readmem,tharrier_sound_writemem)
	3544	MDRV_CPU_PROGRAM_MAP(tharrier_sound_map,0)
3654	3545	MDRV_CPU_IO_MAP(tharrier_sound_io_map,0)
3655	3546
3656	3547	/* video hardware */
r4679	r4680
3818	3709
3819	3710	/* basic machine hardware */
3820	3711	MDRV_CPU_ADD("maincpu", M68000, BIOSHIP_CRYSTAL1 ) /* 10.0 MHz (verified) */
3821		MDRV_CPU_PROGRAM_MAP(bioship_readmem,bioship_writemem)
	3712	MDRV_CPU_PROGRAM_MAP(bioship_map,0)
3822	3713	MDRV_CPU_VBLANK_INT_HACK(nmk_interrupt,2)
3823	3714	MDRV_CPU_PERIODIC_INT(irq1_line_hold,112)/* ???????? */
3824	3715
r4679	r4680
3862	3753
3863	3754	/* basic machine hardware */
3864	3755	MDRV_CPU_ADD("maincpu", M68000, XTAL_10MHz) /* 68000p12 running at 10Mhz, verified on pcb */
3865		MDRV_CPU_PROGRAM_MAP(vandyke_readmem,vandyke_writemem)
	3756	MDRV_CPU_PROGRAM_MAP(vandyke_map,0)
3866	3757	MDRV_CPU_VBLANK_INT_HACK(nmk_interrupt,2)
3867	3758	MDRV_CPU_PERIODIC_INT(irq1_line_hold,112)/* ???????? */
3868	3759
r4679	r4680
3906	3797
3907	3798	/* basic machine hardware */
3908	3799	MDRV_CPU_ADD("maincpu", M68000, 10000000) /* 10 MHz ? */
3909		MDRV_CPU_PROGRAM_MAP(vandyke_readmem,vandyke_writemem)
	3800	MDRV_CPU_PROGRAM_MAP(vandyke_map,0)
3910	3801	MDRV_CPU_VBLANK_INT_HACK(nmk_interrupt,2)
3911	3802	MDRV_CPU_PERIODIC_INT(irq1_line_hold,112)/* ???????? */
3912	3803
r4679	r4680
3942	3833
3943	3834	/* basic machine hardware */
3944	3835	MDRV_CPU_ADD("maincpu", M68000, 10000000) /* 10 MHz (verified on pcb) */
3945		MDRV_CPU_PROGRAM_MAP(acrobatm_readmem,acrobatm_writemem)
	3836	MDRV_CPU_PROGRAM_MAP(acrobatm_map,0)
3946	3837	MDRV_CPU_VBLANK_INT_HACK(nmk_interrupt,2)
3947	3838	MDRV_CPU_PERIODIC_INT(irq1_line_hold,112)/* ???????? */
3948	3839
r4679	r4680
3988	3879
3989	3880	/* basic machine hardware */
3990	3881	MDRV_CPU_ADD("maincpu", M68000, 10000000)
3991		MDRV_CPU_PROGRAM_MAP(tdragon_readmem,tdragonb_writemem)
	3882	MDRV_CPU_PROGRAM_MAP(tdragonb_map,0)
3992	3883	//MDRV_CPU_VBLANK_INT("screen", irq4_line_hold)
3993	3884	MDRV_CPU_VBLANK_INT_HACK(nmk_interrupt,2)
3994	3885	MDRV_CPU_PERIODIC_INT(irq1_line_hold,112)/* ?? drives music */
r4679	r4680
4020	3911
4021	3912	/* basic machine hardware */
4022	3913	MDRV_CPU_ADD("maincpu", M68000, XTAL_8MHz) /* verified on pcb */
4023		MDRV_CPU_PROGRAM_MAP(tdragon_readmem,tdragon_writemem)
	3914	MDRV_CPU_PROGRAM_MAP(tdragon_map,0)
4024	3915	MDRV_CPU_VBLANK_INT_HACK(nmk_interrupt,2)
4025	3916	//MDRV_CPU_VBLANK_INT("screen", irq4_line_hold)
4026	3917	MDRV_CPU_PERIODIC_INT(irq1_line_hold,112)/* ?? drives music */
r4679	r4680
4066	3957
4067	3958	/* basic machine hardware */
4068	3959	MDRV_CPU_ADD("maincpu", M68000, 8000000) /* 8 Mhz */
4069		MDRV_CPU_PROGRAM_MAP(ssmissin_readmem,ssmissin_writemem)
	3960	MDRV_CPU_PROGRAM_MAP(ssmissin_map,0)
4070	3961	MDRV_CPU_VBLANK_INT("screen", irq4_line_hold)
4071	3962	MDRV_CPU_PERIODIC_INT(irq1_line_hold,112) /* input related */
4072	3963
4073	3964	MDRV_CPU_ADD("audiocpu", Z80, 8000000/2) /* 4 Mhz */
4074		MDRV_CPU_PROGRAM_MAP(ssmissin_sound_readmem,ssmissin_sound_writemem)
	3965	MDRV_CPU_PROGRAM_MAP(ssmissin_sound_map,0)
4075	3966
4076	3967	MDRV_MACHINE_RESET(nmk16)
4077	3968
r4679	r4680
4103	3994
4104	3995	/* basic machine hardware */
4105	3996	MDRV_CPU_ADD("maincpu", M68000, 12000000) /* 12 MHz ? */
4106		MDRV_CPU_PROGRAM_MAP(strahl_readmem,strahl_writemem)
	3997	MDRV_CPU_PROGRAM_MAP(strahl_map,0)
4107	3998	MDRV_CPU_VBLANK_INT_HACK(nmk_interrupt,2)
4108	3999	MDRV_CPU_PERIODIC_INT(irq1_line_hold,112)/* ???????? */
4109	4000
r4679	r4680
4194	4085
4195	4086	/* basic machine hardware */
4196	4087	MDRV_CPU_ADD("maincpu", M68000, 10000000) /* 10 MHz ? */
4197		MDRV_CPU_PROGRAM_MAP(macross_readmem,macross_writemem)
	4088	MDRV_CPU_PROGRAM_MAP(macross_map,0)
4198	4089	MDRV_CPU_VBLANK_INT("screen", irq4_line_hold)
4199	4090	MDRV_CPU_PERIODIC_INT(irq1_line_hold,112)/* ???????? */
4200	4091
r4679	r4680
4284	4175
4285	4176	/* basic machine hardware */
4286	4177	MDRV_CPU_ADD("maincpu", M68000, 10000000) /* 10 MHz ? */
4287		MDRV_CPU_PROGRAM_MAP(macross2_readmem,macross2_writemem)
	4178	MDRV_CPU_PROGRAM_MAP(macross2_map,0)
4288	4179	MDRV_CPU_VBLANK_INT("screen", irq4_line_hold)
4289	4180	MDRV_CPU_PERIODIC_INT(irq1_line_hold,112)/* ???????? */
4290	4181
4291	4182	MDRV_CPU_ADD("audiocpu", Z80, 4000000) /* 4 MHz ? */
4292		MDRV_CPU_PROGRAM_MAP(macross2_sound_readmem,macross2_sound_writemem)
	4183	MDRV_CPU_PROGRAM_MAP(macross2_sound_map,0)
4293	4184	MDRV_CPU_IO_MAP(macross2_sound_io_map,0)
4294	4185
4295	4186	MDRV_MACHINE_RESET(nmk16)
r4679	r4680
4329	4220
4330	4221	/* basic machine hardware */
4331	4222	MDRV_CPU_ADD("maincpu", M68000, 10000000) /* 10 MHz  */
4332		MDRV_CPU_PROGRAM_MAP(macross2_readmem,macross2_writemem)
	4223	MDRV_CPU_PROGRAM_MAP(macross2_map,0)
4333	4224	MDRV_CPU_VBLANK_INT("screen", irq4_line_hold)
4334	4225	MDRV_CPU_PERIODIC_INT(irq1_line_hold,112)/* ???????? */
4335	4226
4336	4227	MDRV_CPU_ADD("audiocpu", Z80, 4000000) /* 4 MHz  */
4337		MDRV_CPU_PROGRAM_MAP(macross2_sound_readmem,macross2_sound_writemem)
	4228	MDRV_CPU_PROGRAM_MAP(macross2_sound_map,0)
4338	4229	MDRV_CPU_IO_MAP(macross2_sound_io_map,0)
4339	4230
4340	4231	MDRV_MACHINE_RESET(nmk16)
r4679	r4680
4374	4265
4375	4266	/* basic machine hardware */
4376	4267	MDRV_CPU_ADD("maincpu", M68000, 14000000) /* 14 MHz measured */
4377		MDRV_CPU_PROGRAM_MAP(macross2_readmem,raphero_writemem)
	4268	MDRV_CPU_PROGRAM_MAP(raphero_map,0)
4378	4269	MDRV_CPU_VBLANK_INT("screen", irq4_line_hold)
4379	4270	MDRV_CPU_PERIODIC_INT(irq1_line_hold,112)/* ???????? */
4380	4271
r4679	r4680
4418	4309
4419	4310	/* basic machine hardware */
4420	4311	MDRV_CPU_ADD("maincpu", M68000, 10000000) /* verified on pcb */
4421		MDRV_CPU_PROGRAM_MAP(bjtwin_readmem,bjtwin_writemem)
	4312	MDRV_CPU_PROGRAM_MAP(bjtwin_map,0)
4422	4313	MDRV_CPU_VBLANK_INT("screen", irq4_line_hold)
4423	4314	MDRV_CPU_PERIODIC_INT(irq1_line_hold,112)/* ?? drives music */
4424	4315
r4679	r4680
4693	4584	static DRIVER_INIT (vandykeb)
4694	4585	{
4695	4586	memory_install_read16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x08000e, 0x08000f, 0, 0, vandykeb_r );
4696		memory_install_write16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x08001e, 0x08001f, 0, 0, SMH_NOP );
	4587	memory_install_write16_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM), 0x08001e, 0x08001f, 0, 0, (write16_space_func)SMH_NOP );
4697	4588	}
4698	4589
4699	4590
r4679	r4680
5091	4982	int i;
5092	4983	UINT8 *RAM = memory_region( machine, "maincpu" );
5093	4984	size_t  size = memory_region_length( machine, "maincpu" );
5094		UINT8 *buffer = malloc_or_die( size );
	4985	UINT8 *buffer = alloc_array_or_die(UINT8, size );
5095	4986
5096	4987	memcpy( buffer, RAM, size );
5097	4988	for( i = 0; i < size; i++ )

src/mame/drivers/m10.c

r4679	r4680
131	131	static WRITE8_DEVICE_HANDLER(ic8j1_output_changed)
132	132	{
133	133	LOG(("ic8j1: %d %d\n", data, video_screen_get_vpos(device->machine->primary_screen)));
134		cpu_set_input_line(device->machine->cpu[0], 0, !data ? CLEAR_LINE : ASSERT_LINE);
	134	cputag_set_input_line(device->machine, "maincpu", 0, !data ? CLEAR_LINE : ASSERT_LINE);
135	135	}
136	136
137	137	static WRITE8_DEVICE_HANDLER(ic8j2_output_changed)
r4679	r4680
191	191
192	192	static MACHINE_RESET( irem )
193	193	{
194		m10_state *state = machine->driver_data;
	194	m10_state *state = (m10_state *)machine->driver_data;
195	195
196	196	state_save_register_global(machine, state->bottomline);
197	197	state_save_register_global(machine, state->flip);
r4679	r4680
225	225	static WRITE8_HANDLER( m10_ctrl_w )
226	226	{
227	227	const device_config *samples = devtag_get_device(space->machine, "samples");
228		m10_state *state = space->machine->driver_data;
	228	m10_state *state = (m10_state *)space->machine->driver_data;
229	229
230	230	#if DEBUG
231	231	if (data & 0x40)
r4679	r4680
302	302
303	303	static WRITE8_HANDLER( m11_ctrl_w )
304	304	{
305		m10_state *state = space->machine->driver_data;
	305	m10_state *state = (m10_state *)space->machine->driver_data;
306	306
307	307	#if DEBUG
308	308	if (data & 0x4C)
r4679	r4680
335	335
336	336	static WRITE8_HANDLER( m15_ctrl_w )
337	337	{
338		m10_state *state = space->machine->driver_data;
	338	m10_state *state = (m10_state *)space->machine->driver_data;
339	339
340	340	#if DEBUG
341	341	if (data & 0xF0)
r4679	r4680
475	475	static READ8_HANDLER( m11_a700_r )
476	476	{
477	477	//LOG(("rd:%d\n",video_screen_get_vpos(space->machine->primary_screen)));
478		//cpu_set_input_line(space->machine->cpu[0], 0, CLEAR_LINE);
	478	//cputag_set_input_line(space->machine, "maincpu", 0, CLEAR_LINE);
479	479	LOG(("clear\n"));
480	480	ttl74123_clear_w(devtag_get_device(space->machine, "ic8j1"), 0, 0);
481	481	ttl74123_clear_w(devtag_get_device(space->machine, "ic8j1"), 0, 1);
r4679	r4680
491	491	static INPUT_CHANGED( coin_inserted )
492	492	{
493	493	/* coin insertion causes an NMI */
494		cpu_set_input_line(field->port->machine->cpu[0], INPUT_LINE_NMI, newval ? ASSERT_LINE : CLEAR_LINE);
	494	cputag_set_input_line(field->port->machine, "maincpu", INPUT_LINE_NMI, newval ? ASSERT_LINE : CLEAR_LINE);
495	495	}
496	496
497	497
r4679	r4680
499	499	{
500	500	if (param==0)
501	501	{
502		cpu_set_input_line(machine->cpu[0], 0, ASSERT_LINE);
	502	cputag_set_input_line(machine, "maincpu", 0, ASSERT_LINE);
503	503	timer_set(machine, video_screen_get_time_until_pos(machine->primary_screen, IREMM10_VBSTART+16, 0), NULL, 1,interrupt_callback);
504	504	}
505	505	if (param==1)
506	506	{
507		cpu_set_input_line(machine->cpu[0], 0, ASSERT_LINE);
	507	cputag_set_input_line(machine, "maincpu", 0, ASSERT_LINE);
508	508	timer_set(machine, video_screen_get_time_until_pos(machine->primary_screen, IREMM10_VBSTART+24, 0), NULL, 2,interrupt_callback);
509	509	}
510	510	if (param==-1)
511		cpu_set_input_line(machine->cpu[0], 0, CLEAR_LINE);
	511	cputag_set_input_line(machine, "maincpu", 0, CLEAR_LINE);
512	512
513	513	}
514	514
r4679	r4680
916	916	static DRIVER_INIT( andromed )
917	917	{
918	918	int i;
919		m10_state *state = machine->driver_data;
	919	m10_state *state = (m10_state *)machine->driver_data;
920	920
921	921	for (i=0x1c00;i<0x2000;i++)
922	922	state->rom[i]=0x60;
r4679	r4680
925	925	static DRIVER_INIT( ipminva1 )
926	926	{
927	927	int i;
928		m10_state *state = machine->driver_data;
	928	m10_state *state = (m10_state *)machine->driver_data;
929	929
930	930	for (i=0x1400;i<0x17ff;i++)
931	931	state->rom[i]=0x60;

src/tools/src2html.c

r4679	r4680
181	181	static int output_file(file_type type, int srcrootlen, int dstrootlen, const astring *srcfile, const astring *dstfile, int link_to_file, const astring *tempheader, const astring *tempfooter);
182	182
183	183	/* HTML helpers */
184		static core_file *create_file_and_output_header(const astring *filename, const astring *template, const astring *path);
185		static void output_footer_and_close_file(core_file *file, const astring *template, const astring *path);
	184	static core_file *create_file_and_output_header(const astring *filename, const astring *templatefile, const astring *path);
	185	static void output_footer_and_close_file(core_file *file, const astring *templatefile, const astring *path);
186	186
187	187	/* path helpers */
188	188	static const astring *normalized_subpath(const astring *path, int start);
r4679	r4680
216	216	/* include path? */
217	217	if (arg[0] == '-' && arg[1] == 'I')
218	218	{
219		*incpathhead = malloc(sizeof(**incpathhead));
	219	*incpathhead = (include_path *)malloc(sizeof(**incpathhead));
220	220	if (*incpathhead != NULL)
221	221	{
222	222	(*incpathhead)->next = NULL;
r4679	r4680
252	252	/* read the template file into an astring */
253	253	if (core_fload(astring_c(tempfilename), &buffer, &bufsize) == FILERR_NONE)
254	254	{
255		tempheader = astring_dupch(buffer, bufsize);
	255	tempheader = astring_dupch((const char *)buffer, bufsize);
256	256	free(buffer);
257	257	}
258	258
r4679	r4680
353	353	while ((entry = osd_readdir(dir)) != NULL)
354	354	if (entry->type == entry_type && entry->name[0] != '.')
355	355	{
356		list_entry *lentry = malloc(sizeof(*lentry));
	356	list_entry *lentry = (list_entry *)malloc(sizeof(*lentry));
357	357	lentry->name = astring_dupc(entry->name);
358	358	lentry->next = list;
359	359	list = lentry;
r4679	r4680
368	368	continue;
369	369
370	370	/* allocate memory for sorting */
371		listarray = malloc(sizeof(list_entry *) * found);
	371	listarray = (list_entry **)malloc(sizeof(list_entry *) * found);
372	372	found = 0;
373	373	for (curlist = list; curlist != NULL; curlist = curlist->next)
374	374	listarray[found++] = curlist;
r4679	r4680
734	734	HTML file with a standard header
735	735	-------------------------------------------------*/
736	736
737		static core_file *create_file_and_output_header(const astring *filename, const astring *template, const astring *path)
	737	static core_file *create_file_and_output_header(const astring *filename, const astring *templatefile, const astring *path)
738	738	{
739	739	astring *modified;
740	740	core_file *file;
r4679	r4680
744	744	return NULL;
745	745
746	746	/* print a header */
747		modified = astring_dup(template);
	747	modified = astring_dup(templatefile);
748	748	astring_replacec(modified, 0, "<!--PATH-->", astring_c(path));
749	749	core_fwrite(file, astring_c(modified), astring_len(modified));
750	750
r4679	r4680
759	759	standard footer to an HTML file and close it
760	760	-------------------------------------------------*/
761	761
762		static void output_footer_and_close_file(core_file *file, const astring *template, const astring *path)
	762	static void output_footer_and_close_file(core_file *file, const astring *templatefile, const astring *path)
763	763	{
764	764	astring *modified;
765	765
766		modified = astring_dup(template);
	766	modified = astring_dup(templatefile);
767	767	astring_replacec(modified, 0, "<!--PATH-->", astring_c(path));
768	768	core_fwrite(file, astring_c(modified), astring_len(modified));
769	769	astring_free(modified);

src/tools/jedutil.c

r4679	r4680
99	99	fseek(file, 0, SEEK_END);
100	100	srcbuflen = ftell(file);
101	101	fseek(file, 0, SEEK_SET);
102		srcbuf = malloc(srcbuflen);
	102	srcbuf = (UINT8 *)malloc(srcbuflen);
103	103	if (!srcbuf)
104	104	{
105	105	fprintf(stderr, "Unable to allocate %d bytes for the source!\n", (int)srcbuflen);
r4679	r4680
243	243
244	244	/* generate the output */
245	245	dstbuflen = jedbin_output(&jed, NULL, 0);
246		dstbuf = malloc(dstbuflen);
	246	dstbuf = (UINT8 *)malloc(dstbuflen);
247	247	if (!dstbuf)
248	248	{
249	249	fprintf(stderr, "Unable to allocate %d bytes for the target buffer!\n", (int)dstbuflen);
r4679	r4680
270	270
271	271	/* generate the output */
272	272	dstbuflen = jed_output(&jed, NULL, 0);
273		dstbuf = malloc(dstbuflen);
	273	dstbuf = (UINT8 *)malloc(dstbuflen);
274	274	if (!dstbuf)
275	275	{
276	276	fprintf(stderr, "Unable to allocate %d bytes for the target buffer!\n", (int)dstbuflen);

src/tools/ldverify.c

r4679	r4680
123	123
124	124	static int read_avi(void *file, int frame, bitmap_t *bitmap, INT16 *lsound, INT16 *rsound, int *samples)
125	125	{
126		const avi_movie_info *aviinfo = avi_get_movie_info(file);
	126	const avi_movie_info *aviinfo = avi_get_movie_info((avi_file *)file);
127	127	UINT32 firstsample = ((UINT64)aviinfo->audio_samplerate * (UINT64)frame * (UINT64)aviinfo->video_sampletime + aviinfo->video_timescale - 1) / (UINT64)aviinfo->video_timescale;
128	128	UINT32 lastsample = ((UINT64)aviinfo->audio_samplerate * (UINT64)(frame + 1) * (UINT64)aviinfo->video_sampletime + aviinfo->video_timescale - 1) / (UINT64)aviinfo->video_timescale;
129	129	avi_error avierr;
130	130
131	131	/* read the frame */
132		avierr = avi_read_video_frame_yuy16(file, frame, bitmap);
	132	avierr = avi_read_video_frame_yuy16((avi_file *)file, frame, bitmap);
133	133	if (avierr != AVIERR_NONE)
134	134	return FALSE;
135	135
136	136	/* read the samples */
137		avierr = avi_read_sound_samples(file, 0, firstsample, lastsample - firstsample, lsound);
138		avierr = avi_read_sound_samples(file, 1, firstsample, lastsample - firstsample, rsound);
	137	avierr = avi_read_sound_samples((avi_file *)file, 0, firstsample, lastsample - firstsample, lsound);
	138	avierr = avi_read_sound_samples((avi_file *)file, 1, firstsample, lastsample - firstsample, rsound);
139	139	if (avierr != AVIERR_NONE)
140	140	return FALSE;
141	141	*samples = lastsample - firstsample;
r4679	r4680
149	149
150	150	static void close_avi(void *file)
151	151	{
152		avi_close(file);
	152	avi_close((avi_file *)file);
153	153	}
154	154
155	155
r4679	r4680
247	247	avconfig.audio[1] = &rsound[*samples];
248	248
249	249	/* configure the decompressor for this frame */
250		chd_codec_config(file, AV_CODEC_DECOMPRESS_CONFIG, &avconfig);
	250	chd_codec_config((chd_file *)file, AV_CODEC_DECOMPRESS_CONFIG, &avconfig);
251	251
252	252	/* read the frame */
253		chderr = chd_read(file, frame * interlace_factor + fieldnum, NULL);
	253	chderr = chd_read((chd_file *)file, frame * interlace_factor + fieldnum, NULL);
254	254	if (chderr != CHDERR_NONE)
255	255	return FALSE;
256	256
r4679	r4680
267	267
268	268	static void close_chd(void *file)
269	269	{
270		chd_close(file);
	270	chd_close((chd_file *)file);
271	271	}
272	272
273	273
r4679	r4680
723	723	}
724	724
725	725	/* allocate sound buffers */
726		lsound = malloc(info.samplerate * sizeof(*lsound));
727		rsound = malloc(info.samplerate * sizeof(*rsound));
	726	lsound = (INT16 *)malloc(info.samplerate * sizeof(*lsound));
	727	rsound = (INT16 *)malloc(info.samplerate * sizeof(*rsound));
728	728	if (lsound == NULL || rsound == NULL)
729	729	{
730	730	isavi ? close_avi(file) : close_chd(file);

src/tools/regrep.c

r4679	r4680
151	151	static summary_file *sort_file_list(void);
152	152
153	153	/* HTML helpers */
154		static core_file *create_file_and_output_header(const astring *filename, const astring *template, const astring *title);
155		static void output_footer_and_close_file(core_file *file, const astring *template, const astring *title);
	154	static core_file *create_file_and_output_header(const astring *filename, const astring *templatefile, const astring *title);
	155	static void output_footer_and_close_file(core_file *file, const astring *templatefile, const astring *title);
156	156
157	157	/* report generators */
158	158	static void output_report(const astring *dirname, const astring *tempheader, const astring *tempfooter, summary_file *filelist);
r4679	r4680
240	240	/* read the template file into an astring */
241	241	if (core_fload(astring_c(tempfilename), &buffer, &bufsize) == FILERR_NONE)
242	242	{
243		tempheader = astring_dupch(buffer, bufsize);
	243	tempheader = astring_dupch((const char *)buffer, bufsize);
244	244	free(buffer);
245	245	}
246	246
r4679	r4680
299	299	return file;
300	300
301	301	/* didn't find one -- allocate */
302		file = malloc(sizeof(*file));
	302	file = (summary_file *)malloc(sizeof(*file));
303	303	if (file == NULL)
304	304	return NULL;
305	305	memset(file, 0, sizeof(*file));
r4679	r4680
376	376	char *dirname = trim_string(linestart + 4);
377	377
378	378	/* allocate a copy of the string */
379		lists[index].dir = malloc(strlen(dirname) + 1);
	379	lists[index].dir = (char *)malloc(strlen(dirname) + 1);
380	380	if (lists[index].dir == NULL)
381	381	goto error;
382	382	strcpy(lists[index].dir, dirname);
r4679	r4680
413	413	if (curfile->textsize[index] + (curptr - linestart) + 1 >= curfile->textalloc[index])
414	414	{
415	415	curfile->textalloc[index] = curfile->textsize[index] + (curptr - linestart) + 256;
416		curfile->text[index] = realloc(curfile->text[index], curfile->textalloc[index]);
	416	curfile->text[index] = (char *)realloc(curfile->text[index], curfile->textalloc[index]);
417	417	if (curfile->text[index] == NULL)
418	418	{
419	419	fprintf(stderr, "Unable to allocate memory for text\n");
r4679	r4680
542	542	numfiles++;
543	543
544	544	/* allocate an array of files */
545		filearray = malloc(numfiles * sizeof(*filearray));
	545	filearray = (summary_file **)malloc(numfiles * sizeof(*filearray));
546	546	if (filearray == NULL)
547	547	{
548	548	fprintf(stderr, "Out of memory!\n");
r4679	r4680
584	584	HTML file with a standard header
585	585	-------------------------------------------------*/
586	586
587		static core_file *create_file_and_output_header(const astring *filename, const astring *template, const astring *title)
	587	static core_file *create_file_and_output_header(const astring *filename, const astring *templatefile, const astring *title)
588	588	{
589	589	astring *modified;
590	590	core_file *file;
r4679	r4680
594	594	return NULL;
595	595
596	596	/* print a header */
597		modified = astring_dup(template);
	597	modified = astring_dup(templatefile);
598	598	astring_replacec(modified, 0, "<!--TITLE-->", astring_c(title));
599	599	core_fwrite(file, astring_c(modified), astring_len(modified));
600	600
r4679	r4680
609	609	standard footer to an HTML file and close it
610	610	-------------------------------------------------*/
611	611
612		static void output_footer_and_close_file(core_file *file, const astring *template, const astring *title)
	612	static void output_footer_and_close_file(core_file *file, const astring *templatefile, const astring *title)
613	613	{
614	614	astring *modified;
615	615
616		modified = astring_dup(template);
	616	modified = astring_dup(templatefile);
617	617	astring_replacec(modified, 0, "<!--TITLE-->", astring_c(title));
618	618	core_fwrite(file, astring_c(modified), astring_len(modified));
619	619	astring_free(modified);
r4679	r4680
904	904	/* load the source image */
905	905	pngerr = png_read_bitmap(file, &bitmaps[bitmapcount++]);
906	906	core_fclose(file);
907		if (pngerr != FILERR_NONE)
	907	if (pngerr != PNGERR_NONE)
908	908	goto error;
909	909	}
910	910
r4679	r4680
976	976	goto error;
977	977	pngerr = png_write_bitmap(file, NULL, finalbitmap, 0, NULL);
978	978	core_fclose(file);
979		if (pngerr != FILERR_NONE)
	979	if (pngerr != PNGERR_NONE)
980	980	goto error;
981	981
982	982	/* if we get here, we are error free */

src/tools/ldresample.c

r4679	r4680
129	129	}
130	130
131	131	/* allocate sound buffers */
132		info->lsound = malloc(info->samplerate * sizeof(*info->lsound));
133		info->rsound = malloc(info->samplerate * sizeof(*info->rsound));
	132	info->lsound = (INT16 *)malloc(info->samplerate * sizeof(*info->lsound));
	133	info->rsound = (INT16 *)malloc(info->samplerate * sizeof(*info->rsound));
134	134	if (info->lsound == NULL || info->rsound == NULL)
135	135	{
136	136	fprintf(stderr, "Out of memory allocating sound buffers of %d bytes\n", (INT32)(info->samplerate * sizeof(*info->rsound)));

src/tools/chdman.c

r4679	r4680
519	519	outputfile = argv[3];
520	520
521	521	/* allocate a cache */
522		cache = malloc(hunksize);
	522	cache = (UINT8 *)malloc(hunksize);
523	523	if (cache == NULL)
524	524	{
525	525	fprintf(stderr, "Out of memory allocating temporary buffer\n");
r4679	r4680
933	933	/* allocate space for the frame data */
934	934	if (height == 524/2 || height == 624/2)
935	935	{
936		ldframedata = malloc(numframes * VBI_PACKED_BYTES);
	936	ldframedata = (UINT8 *)malloc(numframes * VBI_PACKED_BYTES);
937	937	if (ldframedata == NULL)
938	938	{
939	939	fprintf(stderr, "Out of memory allocating frame metadata\n");
r4679	r4680
961	961	avconfig.channels = channels;
962	962	for (chnum = 0; chnum < channels; chnum++)
963	963	{
964		avconfig.audio[chnum] = malloc(max_samples_per_frame * 2);
	964	avconfig.audio[chnum] = (INT16 *)malloc(max_samples_per_frame * 2);
965	965	if (avconfig.audio[chnum] == NULL)
966	966	{
967	967	fprintf(stderr, "Out of memory allocating temporary audio buffer\n");
r4679	r4680
1143	1143	}
1144	1144
1145	1145	/* alloc and zero buffer*/
1146		cache = malloc(hunksize);
	1146	cache = (UINT8 *)malloc(hunksize);
1147	1147	if (cache == NULL)
1148	1148	{
1149	1149	fprintf(stderr, "Error allocating memory buffer\n");
r4679	r4680
1608	1608	avconfig.actsamples = &numsamples;
1609	1609	for (chnum = 0; chnum < channels; chnum++)
1610	1610	{
1611		avconfig.audio[chnum] = malloc(avconfig.maxsamples * 2);
	1611	avconfig.audio[chnum] = (INT16 *)malloc(avconfig.maxsamples * 2);
1612	1612	if (avconfig.audio[chnum] == NULL)
1613	1613	{
1614	1614	fprintf(stderr, "Out of memory allocating temporary audio buffer\n");
r4679	r4680
1954	1954	avconfig.video = &fakebitmap;
1955	1955
1956	1956	/* allocate memory for VBI data */
1957		vbidata = malloc(header.totalhunks * VBI_PACKED_BYTES);
	1957	vbidata = (UINT8 *)malloc(header.totalhunks * VBI_PACKED_BYTES);
1958	1958	if (vbidata == NULL)
1959	1959	{
1960	1960	fprintf(stderr, "Out of memory allocating VBI data\n");
r4679	r4680
2762	2762	/* if it's text, strip any trailing Ctrl-Z and CR/LF and add a trailing NULL */
2763	2763	if (param)
2764	2764	{
2765		metadata = realloc(metadata, metalength + 1);
	2765	metadata = (UINT8 *)realloc(metadata, metalength + 1);
2766	2766	if (metadata == NULL)
2767	2767	{
2768	2768	fprintf(stderr, "Out of memory preparing metadata\n");
r4679	r4680
2838	2838
2839	2839	/* get the header */
2840	2840	header = chd_get_header(chd);
2841		cache = malloc(header->hunkbytes);
	2841	cache = (UINT8 *)malloc(header->hunkbytes);
2842	2842	if (cache == NULL)
2843	2843	{
2844	2844	err = CHDERR_OUT_OF_MEMORY;
r4679	r4680
2909	2909
2910	2910	/* get the header */
2911	2911	header = chd_get_header(chd);
2912		cache = malloc(header->hunkbytes);
	2912	cache = (UINT8 *)malloc(header->hunkbytes);
2913	2913	if (cache == NULL)
2914	2914	{
2915	2915	err = CHDERR_OUT_OF_MEMORY;
r4679	r4680
2918	2918
2919	2919	/* get the source CHD header */
2920	2920	source_header = chd_get_header(source);
2921		source_cache = malloc(source_header->hunkbytes);
	2921	source_cache = (UINT8 *)malloc(source_header->hunkbytes);
2922	2922	if (source_cache == NULL)
2923	2923	{
2924	2924	err = CHDERR_OUT_OF_MEMORY;
r4679	r4680
3166	3166	{ "-addmetatext",   do_addmeta, TRUE },
3167	3167	{ "-addmetabin",    do_addmeta, FALSE },
3168	3168	};
3169		extern char build_version[];
	3169	extern const char build_version[];
3170	3170	int i;
3171	3171
3172	3172	/* print the header */

src/tools/romcmp.c

r4679	r4680
405	405	else fullname[0] = 0;
406	406	strcat(fullname,file->name);
407	407
408		if ((file->buf = malloc(file->size)) == 0)
	408	if ((file->buf = (unsigned char *)malloc(file->size)) == 0)
409	409	{
410	410	printf("%s: out of memory!\n",file->name);
411	411	return;
r4679	r4680
522	522	else
523	523	strcpy(file->name,zipent->filename);
524	524	file->size = zipent->uncompressed_length;
525		if ((file->buf = malloc(file->size)) == 0)
	525	if ((file->buf = (unsigned char *)malloc(file->size)) == 0)
526	526	printf("%s: out of memory!\n",file->name);
527	527	else
528	528	{

src/osd/windows/output.c

r4679	r4680
228	228	}
229	229
230	230	// add us to the end
231		*client = (registered_client *)malloc_or_die(sizeof(**client));
	231	*client = alloc_or_die(registered_client);
232	232	(*client)->next = NULL;
233	233	(*client)->id = id;
234	234	(*client)->hwnd = hwnd;
r4679	r4680
287	287
288	288	// allocate memory for the message
289	289	datalen = sizeof(*temp) + strlen(name);
290		temp = (copydata_id_string *)malloc_or_die(datalen);
	290	temp = (copydata_id_string *)alloc_array_or_die(UINT8, datalen);
291	291	temp->id = id;
292	292	strcpy(temp->string, name);
293	293

src/osd/windows/windows.mak

r4679	r4680
207	207	# add the windows libraries
208	208	LIBS += -luser32 -lgdi32 -lddraw -ldsound -ldxguid -lwinmm -ladvapi32 -lcomctl32 -lshlwapi
209	209
	210	ifdef CPP_COMPILE
	211	LIBS += -lsupc++
	212	endif
	213
210	214	ifeq ($(DIRECTINPUT),8)
211	215	LIBS += -ldinput8
212	216	CCOMFLAGS += -DDIRECTINPUT_VERSION=0x0800

src/osd/windows/winprefix.h

r4679	r4680
13	13	#include <stdlib.h>
14	14	#include <malloc.h>
15	15
	16	#ifdef __cplusplus
	17	extern "C" {
	18	#endif
	19
16	20	// override malloc/calloc/realloc/free to track file/line
17	21	void *malloc_file_line(size_t size, const char *file, int line);
18	22	void *calloc_file_line(size_t size, size_t count, const char *FILE, int line);
19	23	void *realloc_file_line(void *memory, size_t size, const char *file, int line);
20	24	void free_file_line(void *memory, const char *file, int line);
21	25
	26	#ifdef __cplusplus
	27	};
	28	#endif
	29
22	30	#undef malloc
23	31	#define malloc(x) malloc_file_line(x, __FILE__, __LINE__)
24	32	#undef calloc

src/osd/windows/drawgdi.c

r4679	r4680
89	89	int i;
90	90
91	91	// allocate memory for our structures
92		gdi = (gdi_info *)malloc_or_die(sizeof(*gdi));
93		memset(gdi, 0, sizeof(*gdi));
	92	gdi = alloc_clear_or_die(gdi_info);
94	93	window->drawdata = gdi;
95	94
96	95	// fill in the bitmap info header

src/osd/windows/d3d8intf.c

r4679	r4680
104	104	}
105	105
106	106	// allocate an object to hold our data
107		d3dptr = (d3d *)malloc_or_die(sizeof(*d3dptr));
	107	d3dptr = alloc_or_die(d3d);
108	108	d3dptr->version = 8;
109	109	d3dptr->d3dobj = d3d8;
110	110	d3dptr->dllhandle = dllhandle;

src/osd/windows/d3d9intf.c

r4679	r4680
102	102	}
103	103
104	104	// allocate an object to hold our data
105		d3dptr = (d3d *)malloc_or_die(sizeof(*d3dptr));
	105	d3dptr = alloc_or_die(d3d);
106	106	d3dptr->version = 9;
107	107	d3dptr->d3dobj = d3d9;
108	108	d3dptr->dllhandle = dllhandle;

src/osd/windows/input.c

r4679	r4680
794	794	device_info *devinfo;
795	795
796	796	// allocate memory for the device object
797		devinfo = (device_info *)malloc_or_die(sizeof(*devinfo));
798		memset(devinfo, 0, sizeof(*devinfo));
	797	devinfo = alloc_clear_or_die(device_info);
799	798	devinfo->head = devlist_head_ptr;
800	799	devinfo->machine = machine;
801	800
r4679	r4680
1267	1266	return utf8_from_tstring(namestring);
1268	1267
1269	1268	// otherwise, allocate space to add the suffix
1270		combined = (TCHAR *)malloc_or_die(sizeof(TCHAR) * (_tcslen(namestring) + 1 + _tcslen(suffix) + 1));
	1269	combined = alloc_array_or_die(TCHAR, _tcslen(namestring) + 1 + _tcslen(suffix) + 1);
1271	1270	_tcscpy(combined, namestring);
1272	1271	_tcscat(combined, TEXT(" "));
1273	1272	_tcscat(combined, suffix);
r4679	r4680
1652	1651	goto error;
1653	1652	if (device_count == 0)
1654	1653	goto error;
1655		devlist = (RAWINPUTDEVICELIST *)malloc_or_die(device_count * sizeof(*devlist));
	1654	devlist = alloc_array_or_die(RAWINPUTDEVICELIST, device_count);
1656	1655	if ((*get_rawinput_device_list)(devlist, &device_count, sizeof(*devlist)) == -1)
1657	1656	goto error;
1658	1657
r4679	r4680
1732	1731	// determine the length of the device name, allocate it, and fetch it
1733	1732	if ((*get_rawinput_device_info)(device->hDevice, RIDI_DEVICENAME, NULL, &name_length) != 0)
1734	1733	goto error;
1735		tname = (TCHAR *)malloc_or_die(name_length * sizeof(*tname));
	1734	tname = alloc_array_or_die(TCHAR, name_length);
1736	1735	if ((*get_rawinput_device_info)(device->hDevice, RIDI_DEVICENAME, tname, &name_length) == -1)
1737	1736	goto error;
1738	1737
r4679	r4680
1796	1795	return name;
1797	1796
1798	1797	// allocate a temporary string and concatenate the base path plus the name
1799		regpath = (TCHAR *)malloc_or_die(sizeof(*regpath) * (_tcslen(basepath) + 1 + _tcslen(name)));
	1798	regpath = alloc_array_or_die(TCHAR, _tcslen(basepath) + 1 + _tcslen(name));
1800	1799	_tcscpy(regpath, basepath);
1801	1800	chdst = regpath + _tcslen(regpath);
1802	1801
r4679	r4680
1908	1907	chsrc++;
1909	1908	else
1910	1909	chsrc = regstring;
1911		name = (TCHAR *)malloc_or_die(sizeof(*name) * (_tcslen(chsrc) + 1));
	1910	name = alloc_array_or_die(TCHAR, _tcslen(chsrc) + 1);
1912	1911	_tcscpy(name, chsrc);
1913	1912
1914	1913	exit:
r4679	r4680
2129	2128	return NULL;
2130	2129
2131	2130	// allocate a buffer
2132		buffer = (TCHAR *)malloc_or_die(datalen + sizeof(*buffer));
	2131	buffer = alloc_array_or_die(TCHAR, datalen + sizeof(*buffer));
2133	2132	buffer[datalen / sizeof(*buffer)] = 0;
2134	2133
2135	2134	// now get the actual data

src/osd/windows/ledutil.c

r4679	r4680
381	381	return 1;
382	382
383	383	// allocate memory
384		entry = malloc(sizeof(*entry));
	384	entry = (id_map_entry *)malloc(sizeof(*entry));
385	385	if (entry == NULL)
386	386	return 0;
387	387
388		string = malloc(strlen(data->string) + 1);
	388	string = (char *)malloc(strlen(data->string) + 1);
389	389	if (string == NULL)
390	390	{
391	391	free(entry);

src/osd/windows/debugwin.c

r4679	r4680
503	503	RECT work_bounds;
504	504
505	505	// allocate memory
506		info = (debugwin_info *)malloc_or_die(sizeof(*info));
507		memset(info, 0, sizeof(*info));
	506	info = alloc_clear_or_die(debugwin_info);
508	507
509	508	// create the window
510	509	info->handler = handler;
r4679	r4680
2242	2241
2243	2242	/* if it doesn't exist, add a new one */
2244	2243	if (bpindex == -1)
2245		sprintf(command, "bpset %X", address);
	2244	sprintf(command, "bpset 0x%X", address);
2246	2245	else
2247		sprintf(command, "bpclear %X", bpindex);
	2246	sprintf(command, "bpclear 0x%X", bpindex);
2248	2247	debug_console_execute_command(info->machine, command, 1);
2249	2248	}
2250	2249	}

src/osd/windows/drawdd.c

r4679	r4680
249	249	dd_info *dd;
250	250
251	251	// allocate memory for our structures
252		dd = (dd_info *)malloc_or_die(sizeof(*dd));
253		memset(dd, 0, sizeof(*dd));
	252	dd = alloc_clear_or_die(dd_info);
254	253	window->drawdata = dd;
255	254
256	255	// configure the adapter for the mode we want

src/osd/windows/video.c

r4679	r4680
255	255	assert(result);
256	256
257	257	// allocate a new monitor info
258		monitor = (win_monitor_info *)malloc_or_die(sizeof(*monitor));
259		memset(monitor, 0, sizeof(*monitor));
	258	monitor = alloc_clear_or_die(win_monitor_info);
260	259
261	260	// copy in the data
262	261	monitor->handle = handle;
r4679	r4680
439	438	static void load_effect_overlay(running_machine *machine, const char *filename)
440	439	{
441	440	const device_config *screen;
442		char *tempstr = (char *)malloc_or_die(strlen(filename) + 5);
	441	char *tempstr = alloc_array_or_die(char, strlen(filename) + 5);
443	442	char *dest;
444	443
445	444	// append a .PNG extension

src/osd/windows/window.c

r4679	r4680
582	582	assert(GetCurrentThreadId() == main_threadid);
583	583
584	584	// allocate a new window object
585		window = (win_window_info *)malloc_or_die(sizeof(*window));
586		memset(window, 0, sizeof(*window));
	585	window = alloc_clear_or_die(win_window_info);
587	586	window->maxwidth = config->width;
588	587	window->maxheight = config->height;
589	588	window->refresh = config->refresh;

src/osd/windows/winalloc.c

r4679	r4680
155	155	rounded_size = ((size + PAGE_SIZE - 1) / PAGE_SIZE) * PAGE_SIZE;
156	156
157	157	// reserve that much memory, plus two guard pages
158		page_base = VirtualAlloc(NULL, rounded_size + 2 * PAGE_SIZE, MEM_RESERVE, PAGE_NOACCESS);
	158	page_base = (UINT8 *)VirtualAlloc(NULL, rounded_size + 2 * PAGE_SIZE, MEM_RESERVE, PAGE_NOACCESS);
159	159	if (page_base == NULL)
160	160	return NULL;
161	161
162	162	// now allow access to everything but the first and last pages
163		page_base = VirtualAlloc(page_base + PAGE_SIZE, rounded_size, MEM_COMMIT, PAGE_READWRITE);
	163	page_base = (UINT8 *)VirtualAlloc(page_base + PAGE_SIZE, rounded_size, MEM_COMMIT, PAGE_READWRITE);
164	164	if (page_base == NULL)
165	165	return NULL;
166	166

src/osd/windows/drawd3d.c

r4679	r4680
500	500	d3d_info *d3d;
501	501
502	502	// allocate memory for our structures
503		d3d = (d3d_info *)malloc_or_die(sizeof(*d3d));
504		memset(d3d, 0, sizeof(*d3d));
	503	d3d = alloc_clear_or_die(d3d_info);
505	504	window->drawdata = d3d;
506	505
507	506	// experimental: load a PNG to use for vector rendering; it is treated
r4679	r4680
1658	1657	HRESULT result;
1659	1658
1660	1659	// allocate a new texture
1661		texture = (texture_info *)malloc_or_die(sizeof(*texture));
1662		memset(texture, 0, sizeof(*texture));
	1660	texture = alloc_clear_or_die(texture_info);
1663	1661
1664	1662	// fill in the core data
1665	1663	texture->hash = texture_compute_hash(texsource, flags);

src/emu/romload.h

r4679	r4680
328	328	chd_file *get_disk_handle(const char *region);
329	329
330	330	/* set a pointer to the CHD file associated with the given region */
331		void set_disk_handle(const char *region, mame_file *file, chd_file *chd);
	331	void set_disk_handle(running_machine *machine, const char *region, mame_file *file, chd_file *chd);
332	332
333	333
334	334	#endif   /* __ROMLOAD_H__ */

src/emu/config.c

r4679	r4680
92	92	config_type **ptype;
93	93
94	94	/* allocate a new type */
95		newtype = (config_type *)auto_malloc(sizeof(*newtype));
	95	newtype = auto_alloc(machine, config_type);
96	96	newtype->next = NULL;
97	97	newtype->name = nodename;
98	98	newtype->load = load;

src/emu/debug/debugcpu.c

r4679	r4680
158	158	int regnum;
159	159
160	160	/* allocate and reset globals */
161		machine->debugcpu_data = global = (debugcpu_private *)auto_malloc(sizeof(*global));
162		memset(global, 0, sizeof(*global));
	161	machine->debugcpu_data = global = auto_alloc_clear(machine, debugcpu_private);
163	162	global->execution_state = EXECUTION_STATE_STOPPED;
164	163	global->bpindex = 1;
165	164	global->wpindex = 1;
r4679	r4680
190	189	cpu_debug_data *info;
191	190
192	191	/* allocate some information */
193		info = (cpu_debug_data *)auto_malloc(sizeof(*info));
194		memset(info, 0, sizeof(*info));
	192	info = auto_alloc_clear(machine, cpu_debug_data);
195	193	classheader->debug = info;
196	194
197	195	/* reset the PC data */
r4679	r4680
983	981	assert_always(device != NULL, "debug_cpu_breakpoint_set() called with invalid cpu!");
984	982
985	983	/* allocate breakpoint */
986		bp = (debug_cpu_breakpoint *)malloc_or_die(sizeof(*bp));
	984	bp = alloc_or_die(debug_cpu_breakpoint);
987	985	bp->index = global->bpindex++;
988	986	bp->enabled = TRUE;
989	987	bp->address = address;
r4679	r4680
991	989	bp->action = NULL;
992	990	if (action != NULL)
993	991	{
994		bp->action = (char *)malloc_or_die(strlen(action) + 1);
	992	bp->action = alloc_array_or_die(char, strlen(action) + 1);
995	993	strcpy(bp->action, action);
996	994	}
997	995
r4679	r4680
1087	1085	{
1088	1086	debugcpu_private *global = space->machine->debugcpu_data;
1089	1087	cpu_debug_data *info = cpu_get_debug_data(space->cpu);
1090		debug_cpu_watchpoint *wp = (debug_cpu_watchpoint *)malloc_or_die(sizeof(*wp));
	1088	debug_cpu_watchpoint *wp = alloc_or_die(debug_cpu_watchpoint);
1091	1089
1092	1090	/* fill in the structure */
1093	1091	wp->index = global->wpindex++;
r4679	r4680
1099	1097	wp->action = NULL;
1100	1098	if (action != NULL)
1101	1099	{
1102		wp->action = (char *)malloc_or_die(strlen(action) + 1);
	1100	wp->action = alloc_array_or_die(char, strlen(action) + 1);
1103	1101	strcpy(wp->action, action);
1104	1102	}
1105	1103
r4679	r4680
1245	1243	info->trace.trace_over_target = ~0;
1246	1244	if (action != NULL)
1247	1245	{
1248		info->trace.action = (char *)malloc_or_die(strlen(action) + 1);
	1246	info->trace.action = alloc_array_or_die(char, strlen(action) + 1);
1249	1247	strcpy(info->trace.action, action);
1250	1248	}
1251	1249
r4679	r4680
1313	1311	if (numspots > 0)
1314	1312	{
1315	1313	/* allocate memory for hotspots */
1316		info->hotspots = (debug_hotspot_entry *)malloc_or_die(sizeof(*info->hotspots) * numspots);
	1314	info->hotspots = alloc_array_or_die(debug_hotspot_entry, numspots);
1317	1315	memset(info->hotspots, 0xff, sizeof(*info->hotspots) * numspots);
1318	1316
1319	1317	/* fill in the info */

src/emu/debug/debugvw.c

r4679	r4680
342	342	debugvw_private *global;
343	343
344	344	/* allocate memory for our globals */
345		global = machine->debugvw_data = (debugvw_private *)auto_malloc(sizeof(*machine->debugvw_data));
346		memset(global, 0, sizeof(*global));
	345	global = machine->debugvw_data = auto_alloc_clear(machine, debugvw_private);
347	346
348	347	/* register for some manual cleanup */
349	348	add_exit_callback(machine, debug_view_exit);
r4679	r4680
1053	1052
1054	1053	/* determine the string and allocate a subview large enough */
1055	1054	astring_printf(tempstring, "CPU '%s' (%s)", cpu->tag, cpu_get_name(cpu));
1056		subview = (registers_subview_item *)auto_malloc(sizeof(*subview) + astring_len(tempstring));
1057		memset(subview, 0, sizeof(*subview));
	1055	subview = (registers_subview_item *)auto_alloc_array_clear(machine, UINT8, sizeof(*subview) + astring_len(tempstring));
1058	1056
1059	1057	/* populate the subview */
1060	1058	subview->next = NULL;
r4679	r4680
1523	1521
1524	1522	/* determine the string and allocate a subview large enough */
1525	1523	astring_printf(tempstring, "CPU '%s' (%s)", cpu->tag, cpu_get_name(cpu));
1526		subview = (disasm_subview_item *)auto_malloc(sizeof(*subview) + astring_len(tempstring));
1527		memset(subview, 0, sizeof(*subview));
	1524	subview = (disasm_subview_item *)auto_alloc_array_clear(machine, UINT8, sizeof(*subview) + astring_len(tempstring));
1528	1525
1529	1526	/* populate the subview */
1530	1527	subview->next = NULL;
r4679	r4680
1881	1878	/* allocate address array */
1882	1879	if (dasmdata->byteaddress != NULL)
1883	1880	free(dasmdata->byteaddress);
1884		dasmdata->byteaddress = (offs_t *)malloc_or_die(sizeof(dasmdata->byteaddress[0]) * dasmdata->allocated.y);
	1881	dasmdata->byteaddress = alloc_array_or_die(offs_t, dasmdata->allocated.y);
1885	1882
1886	1883	/* allocate disassembly buffer */
1887	1884	if (dasmdata->dasm != NULL)
1888	1885	free(dasmdata->dasm);
1889		dasmdata->dasm = (char *)malloc_or_die(sizeof(dasmdata->dasm[0]) * dasmdata->allocated.x * dasmdata->allocated.y);
	1886	dasmdata->dasm = alloc_array_or_die(char, dasmdata->allocated.x * dasmdata->allocated.y);
1890	1887	}
1891	1888
1892	1889	/* iterate over lines */
r4679	r4680
2446	2443
2447	2444	/* determine the string and allocate a subview large enough */
2448	2445	astring_printf(tempstring, "CPU '%s' (%s) %s memory", cpu->tag, cpu_get_name(cpu), space->name);
2449		subview = (memory_subview_item *)auto_malloc(sizeof(*subview) + astring_len(tempstring));
2450		memset(subview, 0, sizeof(*subview));
	2446	subview = (memory_subview_item *)auto_alloc_array_clear(machine, UINT8, sizeof(*subview) + astring_len(tempstring));
2451	2447
2452	2448	/* populate the subview */
2453	2449	subview->next = NULL;
r4679	r4680
2476	2472
2477	2473	/* determine the string and allocate a subview large enough */
2478	2474	astring_printf(tempstring, "Region '%s'", rgntag);
2479		subview = (memory_subview_item *)auto_malloc(sizeof(*subview) + astring_len(tempstring));
2480		memset(subview, 0, sizeof(*subview));
	2475	subview = (memory_subview_item *)auto_alloc_array_clear(machine, UINT8, sizeof(*subview) + astring_len(tempstring));
2481	2476
2482	2477	/* populate the subview */
2483	2478	subview->next = NULL;
r4679	r4680
2514	2509
2515	2510	/* determine the string and allocate a subview large enough */
2516	2511	astring_printf(tempstring, "%s", strrchr(name, '/') + 1);
2517		subview = (memory_subview_item *)auto_malloc(sizeof(*subview) + astring_len(tempstring));
2518		memset(subview, 0, sizeof(*subview));
	2512	subview = (memory_subview_item *)auto_alloc_array_clear(machine, UINT8, sizeof(*subview) + astring_len(tempstring));
2519	2513
2520	2514	/* populate the subview */
2521	2515	subview->next = NULL;

src/emu/debug/debugcon.c

r4679	r4680
404	404	assert_always(mame_get_phase(machine) == MAME_PHASE_INIT, "Can only call debug_console_register_command() at init time!");
405	405	assert_always((machine->debug_flags & DEBUG_FLAG_ENABLED) != 0, "Cannot call debug_console_register_command() when debugger is not running");
406	406
407		cmd = (debug_command *)auto_malloc(sizeof(*cmd));
408		memset(cmd, 0, sizeof(*cmd));
	407	cmd = auto_alloc_clear(machine, debug_command);
409	408
410	409	/* fill in the command */
411	410	strcpy(cmd->command, command);

src/emu/debug/debugcmt.c

r4679	r4680
110	110	if (numcpu > 0)
111	111	{
112	112	/* allocate enough comment groups for the total # of cpu's */
113		debug_comments = (comment_group*) auto_malloc(numcpu * sizeof(comment_group));
114		memset(debug_comments, 0, numcpu * sizeof(comment_group));
	113	debug_comments = auto_alloc_array_clear(machine, comment_group, numcpu);
115	114
116	115	/* automatically load em up */
117	116	debug_comment_load(machine);
r4679	r4680
137	136	int match = 0;
138	137
139	138	/* Create a new item to insert into the list */
140		debug_comment *insert_me = (debug_comment*) malloc_or_die(sizeof(debug_comment));
	139	debug_comment *insert_me = alloc_or_die(debug_comment);
141	140	insert_me->color = color;
142	141	insert_me->is_valid = 1;
143	142	insert_me->address = addr;

src/emu/cpu/h83002/h8_16.c

r4679	r4680
291	291	case 16: // IRQ4
292	292	case 17: // IRQ5
293	293	if (h8->per_regs[0xF8]&0x10) res = 1; break;
	294	case 53: // SCI0 Rx
	295	if (h8->per_regs[0xB2]&0x40) res = 1; break;
	296	case 57: // SCI1 Rx
	297	if (h8->per_regs[0xBA]&0x40) res = 1; break;
294	298	}
295	299	return res;
296	300	}

src/emu/cpu/h83002/h8_8.c

r4679	r4680
73	73	return h8_disasm(buffer, pc, oprom, opram, 0xffff);
74	74	}
75	75
76		static void h8_300_InterruptRequest(h83xx_state *h8, UINT8 source)
	76	static void h8_300_InterruptRequest(h83xx_state *h8, UINT8 source, UINT8 mode)
77	77	{
78		if(source>31)
	78	if (source>31)
79	79	{
80		h8->h8_IRQrequestH |= (1<<(source-32));
	80	if (mode)
	81	{
	82	h8->h8_IRQrequestH |= (1<<(source-32));
	83	}
	84	else
	85	{
	86	h8->h8_IRQrequestH &= ~(1<<(source-32));
	87	}
81	88	}
82	89	else
83	90	{
84		h8->h8_IRQrequestL |= (1<<source);
	91	if (mode)
	92	{
	93	h8->h8_IRQrequestL |= (1<<source);
	94	}
	95	else
	96	{
	97	h8->h8_IRQrequestL &= ~(1<<source);
	98	}
85	99	}
86	100	}
87	101
r4679	r4680
267	281	h8_set_ccr(h8, h8_get_ccr(h8) | 0x40);
268	282	h8->pc = h8_mem_read16(h8, vectornr * 2) & 0xffff;
269	283
270		// I couldn't find timing info for exceptions, so this is a guess (based on JSR/BSR)
271		H8_IFETCH_TIMING(2);
272		H8_STACK_TIMING(2);
	284	// these timings are still approximations but much better than before
	285	H8_IFETCH_TIMING(8);   // 24 cycles
	286	H8_STACK_TIMING(3);   // 12 cycles
273	287	}
274	288
275	289	static int h8_get_priority(h83xx_state *h8, UINT8 bit)
r4679	r4680
277	291	int res = 0;
278	292	switch(bit)
279	293	{
280		case 12: // IRQ0
281		if (h8->per_regs[0xF8]&0x80) res = 1; break;
282		case 13: // IRQ1
283		if (h8->per_regs[0xF8]&0x40) res = 1; break;
284		case 14: // IRQ2
285		case 15: // IRQ3
286		if (h8->per_regs[0xF8]&0x20) res = 1; break;
287		case 16: // IRQ4
288		case 17: // IRQ5
289		if (h8->per_regs[0xF8]&0x10) res = 1; break;
	294	case 3: // NMI
	295	res = 2; break;
	296	case 4: // IRQ0
	297	if (h8->per_regs[0xc7]&0x01) res = 1; break;
	298	case 5: // IRQ1
	299	if (h8->per_regs[0xc7]&0x02) res = 1; break;
	300	case 6: // IRQ2
	301	if (h8->per_regs[0xc7]&0x04) res = 1; break;
	302	case 7: // IRQ3
	303	if (h8->per_regs[0xc7]&0x08) res = 1; break;
	304	case 8: // IRQ4
	305	if (h8->per_regs[0xc7]&0x10) res = 1; break;
	306	case 9: // IRQ5
	307	if (h8->per_regs[0xc7]&0x20) res = 1; break;
	308	case 10: // IRQ6
	309	if (h8->per_regs[0xc7]&0x40) res = 1; break;
	310	case 11: // IRQ7
	311	if (h8->per_regs[0xc7]&0x80) res = 1; break;
	312	case 28: // SCI0 Rx
	313	if (h8->per_regs[0xda]&0x40) res = 1; break;
	314	case 32: // SCI1 Rx
	315	if (h8->per_regs[0x8a]&0x40) res = 1; break;
290	316	}
291	317	return res;
292	318	}
293	319
294	320	static void h8_check_irqs(h83xx_state *h8)
295	321	{
296		int lv = -1;
	322	int lv = 0;
297	323
298		if (h8->h8iflag == 0)
	324	if (h8->h8iflag != 0)
299	325	{
300		lv = 0;
	326	lv = 2;
301	327	}
302	328
303	329	// any interrupts wanted and can accept ?
r4679	r4680
312	338	if (h8_get_priority(h8, bit) >= lv)
313	339	{
314	340	// mask off
315		h8->h8_IRQrequestL &= ~(1<<bit);
316	341	source = bit;
317	342	}
318	343	}
r4679	r4680
325	350	if (h8_get_priority(h8, bit + 32) >= lv)
326	351	{
327	352	// mask off
328		h8->h8_IRQrequestH &= ~(1<<bit);
329	353	source = bit + 32;
330	354	}
331	355	}
r4679	r4680
367	391	case CPUINFO_INT_REGISTER + H8_E6:         h8->regs[6] = info->i;                     break;
368	392	case CPUINFO_INT_REGISTER + H8_E7:         h8->regs[7] = info->i;                     break;
369	393
370		case CPUINFO_INT_INPUT_STATE + H8_NMI:      if (info->i) h8_300_InterruptRequest(h8, 3);      break;
371		case CPUINFO_INT_INPUT_STATE + H8_IRQ0:      if (info->i) h8_300_InterruptRequest(h8, 4);      break;
372		case CPUINFO_INT_INPUT_STATE + H8_IRQ1:      if (info->i) h8_300_InterruptRequest(h8, 5);      break;
373		case CPUINFO_INT_INPUT_STATE + H8_IRQ2:      if (info->i) h8_300_InterruptRequest(h8, 6);      break;
374		case CPUINFO_INT_INPUT_STATE + H8_IRQ3:      if (info->i) h8_300_InterruptRequest(h8, 7);      break;
375		case CPUINFO_INT_INPUT_STATE + H8_IRQ4:      if (info->i) h8_300_InterruptRequest(h8, 8);      break;
376		case CPUINFO_INT_INPUT_STATE + H8_IRQ5:      if (info->i) h8_300_InterruptRequest(h8, 9);      break;
377		case CPUINFO_INT_INPUT_STATE + H8_IRQ6:      if (info->i) h8_300_InterruptRequest(h8, 10);      break;
378		case CPUINFO_INT_INPUT_STATE + H8_IRQ7:      if (info->i) h8_300_InterruptRequest(h8, 11);      break;
	394	case CPUINFO_INT_INPUT_STATE + H8_NMI:      h8_300_InterruptRequest(h8, 3, info->i);      break;
	395	case CPUINFO_INT_INPUT_STATE + H8_IRQ0:      h8_300_InterruptRequest(h8, 4, info->i);      break;
	396	case CPUINFO_INT_INPUT_STATE + H8_IRQ1:      h8_300_InterruptRequest(h8, 5, info->i);      break;
	397	case CPUINFO_INT_INPUT_STATE + H8_IRQ2:      h8_300_InterruptRequest(h8, 6, info->i);      break;
	398	case CPUINFO_INT_INPUT_STATE + H8_IRQ3:      h8_300_InterruptRequest(h8, 7, info->i);      break;
	399	case CPUINFO_INT_INPUT_STATE + H8_IRQ4:      h8_300_InterruptRequest(h8, 8, info->i);      break;
	400	case CPUINFO_INT_INPUT_STATE + H8_IRQ5:      h8_300_InterruptRequest(h8, 9, info->i);      break;
	401	case CPUINFO_INT_INPUT_STATE + H8_IRQ6:      h8_300_InterruptRequest(h8, 10, info->i);      break;
	402	case CPUINFO_INT_INPUT_STATE + H8_IRQ7:      h8_300_InterruptRequest(h8, 11, info->i);      break;
379	403
380		case CPUINFO_INT_INPUT_STATE + H8_SCI_0_RX:   if (info->i) h8_300_InterruptRequest(h8, 28);      break;
381		case CPUINFO_INT_INPUT_STATE + H8_SCI_1_RX:   if (info->i) h8_300_InterruptRequest(h8, 32);      break;
	404	case CPUINFO_INT_INPUT_STATE + H8_SCI_0_RX:   h8_300_InterruptRequest(h8, 28, info->i);      break;
	405	case CPUINFO_INT_INPUT_STATE + H8_SCI_1_RX:   h8_300_InterruptRequest(h8, 32, info->i);      break;
382	406
383	407	default:
384	408	fatalerror("h8_set_info unknown request %x", state);

src/emu/cpu/h83002/h8ops.h

r4679	r4680
1258	1258	if(opcode == 0x5670)
1259	1259	{
1260	1260	// restore CCR
1261		udata16 = h8_mem_read16(h8, h8_getreg32(h8, H8_SP));
	1261	udata8 = (UINT8)h8_mem_read16(h8, h8_getreg32(h8, H8_SP));
1262	1262	h8_setreg32(h8, H8_SP, h8_getreg32(h8, H8_SP)+2);
1263	1263
1264	1264	// check if PC is 16 or 24/32 bits wide
r4679	r4680
1279	1279	h8->pc = udata32;
1280	1280	}
1281	1281	// must do this last, because set_ccr() does a check_irq()
1282		h8_set_ccr(h8, (UINT8)udata16);
	1282	h8_set_ccr(h8, udata8);
1283	1283	H8_IFETCH_TIMING(2);
1284	1284	H8_STACK_TIMING(2);
1285	1285	H8_IOP_TIMING(2);

src/emu/cpu/m68000/m68000.h

r4679	r4680
61	61	M68K_GENPCBASE = REG_GENPCBASE
62	62	};
63	63
64		enum
65		{
66		CPUINFO_FCT_M68K_RESET_CALLBACK = CPUINFO_FCT_CPU_SPECIFIC,
67		CPUINFO_FCT_M68K_CMPILD_CALLBACK,
68		CPUINFO_FCT_M68K_RTE_CALLBACK,
69		CPUINFO_FCT_M68K_TAS_CALLBACK
70		};
71
72	64	typedef void (*m68k_bkpt_ack_func)(const device_config *device, UINT32 data);
73	65	typedef void (*m68k_reset_func)(const device_config *device);
74	66	typedef void (*m68k_cmpild_func)(const device_config *device, UINT32 data, UINT8 reg);
r4679	r4680
94	86
95	87	unsigned int m68k_disassemble_raw(char* str_buff, unsigned int pc, const unsigned char* opdata, const unsigned char* argdata, unsigned int cpu_type);
96	88
	89	void m68k_set_reset_callback(const device_config *device, m68k_reset_func callback);
	90	void m68k_set_cmpild_callback(const device_config *device, m68k_cmpild_func callback);
	91	void m68k_set_rte_callback(const device_config *device, m68k_rte_func callback);
	92	void m68k_set_tas_callback(const device_config *device, m68k_tas_func callback);
	93
97	94	#endif /* __M68000_H__ */

src/emu/cpu/m68000/m68kcpu.c

r4679	r4680
757	757	case CPUINFO_INT_INPUT_STATE + INPUT_LINE_NMI:
758	758	set_irq_line(m68k, state - CPUINFO_INT_INPUT_STATE, info->i);
759	759	break;
760
761		/* --- the following bits of info are set as pointers to data or functions --- */
762		case CPUINFO_FCT_M68K_RESET_CALLBACK:      m68k->reset_instr_callback = (m68k_reset_func)info->f; break;
763		case CPUINFO_FCT_M68K_CMPILD_CALLBACK:      m68k->cmpild_instr_callback = (m68k_cmpild_func)info->f; break;
764		case CPUINFO_FCT_M68K_RTE_CALLBACK:         m68k->rte_instr_callback = (m68k_rte_func)info->f; break;
765		case CPUINFO_FCT_M68K_TAS_CALLBACK:         m68k->tas_instr_callback = (m68k_tas_func)info->f; break;
766	760	}
767	761	}
768	762
r4679	r4680
980	974
981	975
982	976
	977
	978	void m68k_set_reset_callback(const device_config *device, m68k_reset_func callback)
	979	{
	980	m68ki_cpu_core *m68k = get_safe_token(device);
	981	m68k->reset_instr_callback = callback;
	982	}
	983
	984	void m68k_set_cmpild_callback(const device_config *device, m68k_cmpild_func callback)
	985	{
	986	m68ki_cpu_core *m68k = get_safe_token(device);
	987	m68k->cmpild_instr_callback = callback;
	988	}
	989
	990	void m68k_set_rte_callback(const device_config *device, m68k_rte_func callback)
	991	{
	992	m68ki_cpu_core *m68k = get_safe_token(device);
	993	m68k->rte_instr_callback = callback;
	994	}
	995
	996	void m68k_set_tas_callback(const device_config *device, m68k_tas_func callback)
	997	{
	998	m68ki_cpu_core *m68k = get_safe_token(device);
	999	m68k->tas_instr_callback = callback;
	1000	}
	1001
	1002
983	1003	/****************************************************************************
984	1004	* 68000 section
985	1005	****************************************************************************/

src/emu/cpu/tms34010/tms34010.c

r4679	r4680
704	704	timer_adjust_oneshot(tms->scantimer, attotime_zero, 0);
705	705
706	706	/* allocate the shiftreg */
707		tms->shiftreg = (UINT16 *)auto_malloc(SHIFTREG_SIZE);
	707	tms->shiftreg = auto_alloc_array(device->machine, UINT16, SHIFTREG_SIZE/2);
708	708
709	709	state_save_register_device_item(device, 0, tms->pc);
710	710	state_save_register_device_item(device, 0, tms->st);

src/emu/cpu/m37710/m37710.c

r4679	r4680
62	62
63	63	/* interrupt control mapping */
64	64
	65	extern const int m37710_irq_levels[M37710_LINE_MAX];
65	66	const int m37710_irq_levels[M37710_LINE_MAX] =
66	67	{
67	68	// maskable

src/emu/cpu/m37710/m37710op.h

r4679	r4680
2721	2721	OP(249, OP_RLA   ( IMM         ) ) /* RLA imm     */
2722	2722	OP(2c2, OP_LDT   ( IMM         ) ) /* LDT imm     */
2723	2723
	2724	extern TABLE_OPCODES;
2724	2725	TABLE_OPCODES =
2725	2726	{
2726	2727	O(00),O(01),O(02),O(03),O(04),O(05),O(06),O(07),
r4679	r4680
2757	2758	O(f8),O(f9),O(fa),O(fb),O(fc),O(fd),O(fe),O(ff)
2758	2759	};
2759	2760
	2761	extern TABLE_OPCODES2;
2760	2762	TABLE_OPCODES2 =
2761	2763	{
2762	2764	O(200),O(101),O(200),O(103),O(200),O(105),O(200),O(107),
r4679	r4680
2793	2795	O(200),O(200),O(200),O(200),O(200),O(200),O(200),O(200)
2794	2796	};
2795	2797
	2798	extern TABLE_OPCODES3;
2796	2799	TABLE_OPCODES3 =
2797	2800	{
2798	2801	O(200),O(200),O(200),O(203),O(200),O(205),O(200),O(200),

src/emu/cpu/sharc/sharc.c

r4679	r4680
445	445
446	446	build_opcode_table();
447	447
448		cpustate->internal_ram = (UINT16 *)auto_malloc(2 * 0x10000 * sizeof(UINT16));      // 2x 128KB
	448	cpustate->internal_ram = auto_alloc_array(device->machine, UINT16, 2 * 0x10000);      // 2x 128KB
449	449	cpustate->internal_ram_block0 = &cpustate->internal_ram[0];
450	450	cpustate->internal_ram_block1 = &cpustate->internal_ram[0x20000/2];
451	451

src/emu/cpu/z180/z180.c

r4679	r4680
2067	2067	int oldval, newval, val;
2068	2068	UINT8 *padd, *padc, *psub, *psbc;
2069	2069	/* allocate big flag arrays once */
2070		SZHVC_add = (UINT8 *)auto_malloc(2*256*256);
2071		SZHVC_sub = (UINT8 *)auto_malloc(2*256*256);
	2070	SZHVC_add = auto_alloc_array(device->machine, UINT8, 2*256*256);
	2071	SZHVC_sub = auto_alloc_array(device->machine, UINT8, 2*256*256);
2072	2072	padd = &SZHVC_add[   0*256];
2073	2073	padc = &SZHVC_add[256*256];
2074	2074	psub = &SZHVC_sub[   0*256];

src/emu/cpu/drcfe.c

r4679	r4680
97	97	if (desc != NULL)
98	98	drcfe->desc_free_list = desc->next;
99	99	else
100		desc = (opcode_desc *)malloc_or_die(sizeof(*desc));
	100	desc = alloc_or_die(opcode_desc);
101	101	return desc;
102	102	}
103	103
r4679	r4680
128	128	drcfe_state *drcfe;
129	129
130	130	/* allocate some memory to hold the state */
131		drcfe = (drcfe_state *)malloc_or_die(sizeof(*drcfe));
132		memset(drcfe, 0, sizeof(*drcfe));
	131	drcfe = alloc_clear_or_die(drcfe_state);
133	132
134	133	/* allocate the description array */
135		drcfe->desc_array = (opcode_desc **)malloc_or_die((config->window_end + config->window_start + 2) * sizeof(*drcfe->desc_array));
136		memset(drcfe->desc_array, 0, (config->window_end + config->window_start + 2) * sizeof(*drcfe->desc_array));
	134	drcfe->desc_array = alloc_array_clear_or_die(opcode_desc *, config->window_end + config->window_start + 2);
137	135
138	136	/* copy in configuration information */
139	137	drcfe->window_start = config->window_start;

src/emu/cpu/cubeqcpu/cubeqcpu.c

r4679	r4680
326	326	cpustate->program = memory_find_address_space(device, ADDRESS_SPACE_PROGRAM);
327	327
328	328	/* Allocate RAM shared with 68000 */
329		cpustate->sram = (UINT16 *)auto_malloc(4096);
	329	cpustate->sram = auto_alloc_array(device->machine, UINT16, 4096/2);
330	330
331	331	cquestsnd_state_register(device);
332	332	}
r4679	r4680
392	392	memset(cpustate, 0, sizeof(*cpustate));
393	393
394	394	/* Allocate RAM */
395		cpustate->dram = (UINT16 *)auto_malloc(16384 * sizeof(UINT16));  /* Shared with 68000 */
396		cpustate->sram = (UINT16 *)auto_malloc(2048 * sizeof(UINT16));   /* Private */
	395	cpustate->dram = auto_alloc_array(device->machine, UINT16, 16384);  /* Shared with 68000 */
	396	cpustate->sram = auto_alloc_array(device->machine, UINT16, 2048);   /* Private */
397	397
398	398	cpustate->device = device;
399	399	cpustate->lindevice = cputag_get_cpu(device->machine, rotconfig->lin_cpu_tag);
r4679	r4680
475	475	memset(cpustate, 0, sizeof(*cpustate));
476	476
477	477	/* Allocate RAM */
478		cpustate->sram = (UINT16 *)auto_malloc(4096 * sizeof(UINT16));      /* Shared with rotate CPU */
479		cpustate->ptr_ram = (UINT8 *)auto_malloc(1024);                    /* Pointer RAM */
480		cpustate->e_stack = (UINT32 *)auto_malloc(32768 * sizeof(UINT32));  /* Stack DRAM: 32kx20 */
481		cpustate->o_stack = (UINT32 *)auto_malloc(32768 * sizeof(UINT32));  /* Stack DRAM: 32kx20 */
	478	cpustate->sram = auto_alloc_array(device->machine, UINT16, 4096);      /* Shared with rotate CPU */
	479	cpustate->ptr_ram = auto_alloc_array(device->machine, UINT8, 1024);                    /* Pointer RAM */
	480	cpustate->e_stack = auto_alloc_array(device->machine, UINT32, 32768);  /* Stack DRAM: 32kx20 */
	481	cpustate->o_stack = auto_alloc_array(device->machine, UINT32, 32768);  /* Stack DRAM: 32kx20 */
482	482
483	483	cpustate->device = device;
484	484	cpustate->rotdevice = cputag_get_cpu(device->machine, linconfig->rot_cpu_tag);

src/emu/cpu/x86log.c

r4679	r4680
91	91	x86log_context *log;
92	92
93	93	/* allocate the log */
94		log = (x86log_context *)malloc_or_die(sizeof(*log));
95		memset(log, 0, sizeof(*log));
	94	log = alloc_clear_or_die(x86log_context);
96	95
97	96	/* allocate the filename */
98	97	log->filename = astring_dupc(filename);

src/emu/cpu/se3208/se3208.c

r4679	r4680
1705	1705	{
1706	1706	int i;
1707	1707	if(!OpTable)
1708		OpTable=(_OP *)malloc_or_die(sizeof(_OP)*0x10000);
	1708	OpTable=alloc_array_or_die(_OP, 0x10000);
1709	1709	for(i=0;i<0x10000;++i)
1710	1710	OpTable[i]=DecodeOp(i);
1711	1711	}

src/emu/cpu/i860/i860dec.c

r4679	r4680
309	309
310	310	/* This is the external interface for asserting/deasserting pins on
311	311	the i860.  */
312		void i860_set_pin (i860s *cpustate, int pin, int val)
	312	void i860_set_pin (const device_config *device, int pin, int val)
313	313	{
	314	i860s *cpustate = get_safe_token(device);
314	315	if (pin == DEC_PIN_BUS_HOLD)
315	316	cpustate->pin_bus_hold = val;
316	317	else if (pin == DEC_PIN_RESET)

src/emu/cpu/i860/i860.c

r4679	r4680
31	31	cpustate->device = device;
32	32	cpustate->program = memory_find_address_space(device, ADDRESS_SPACE_PROGRAM);
33	33	reset_i860(cpustate);
34		i860_set_pin(cpustate, DEC_PIN_BUS_HOLD, 0);
35		i860_set_pin(cpustate, DEC_PIN_RESET, 0);
	34	i860_set_pin(device, DEC_PIN_BUS_HOLD, 0);
	35	i860_set_pin(device, DEC_PIN_RESET, 0);
36	36	cpustate->single_stepping = 0;
37	37
38	38	state_save_register_device_item_array(device, 0, cpustate->iregs);

src/emu/cpu/i860/i860.h

r4679	r4680
198	198
199	199	/* This is the external interface for asserting/deasserting a pin on
200	200	the i860.  */
201		extern void i860_set_pin(i860_state_t*, int, int);
	201	extern void i860_set_pin(const device_config *, int, int);
202	202
203	203	/* Hard or soft reset.  */
204	204	extern void reset_i860(i860_state_t*);

src/emu/cpu/mcs51/mcs51dasm.c

r4679	r4680
282	282
283	283	static const char *get_data_address( const char **mem_names, UINT8 arg )
284	284	{
285		static char buffer[32];
	285	static char buffer_array[4][32];
	286	static int whichbuf;
	287	char *buffer = &buffer_array[++whichbuf % 4][0];
286	288
287	289	if (mem_names[arg] == NULL)
288	290	sprintf(buffer,"$%02X",arg);

src/emu/cpu/i386/i386.c

r4679	r4680
391	391	}
392	392	}
393	393
394		static void build_cycle_table(void)
	394	static void build_cycle_table(running_machine *machine)
395	395	{
396	396	int i, j;
397	397	for (j=0; j < X86_NUM_CPUS; j++)
398	398	{
399		cycle_table_rm[j] = (UINT8 *)auto_malloc(sizeof(UINT8) * CYCLES_NUM_OPCODES);
400		cycle_table_pm[j] = (UINT8 *)auto_malloc(sizeof(UINT8) * CYCLES_NUM_OPCODES);
	399	cycle_table_rm[j] = auto_alloc_array(machine, UINT8, CYCLES_NUM_OPCODES);
	400	cycle_table_pm[j] = auto_alloc_array(machine, UINT8, CYCLES_NUM_OPCODES);
401	401
402	402	for (i=0; i < sizeof(x86_cycle_table)/sizeof(X86_CYCLE_TABLE); i++)
403	403	{
r4679	r4680
507	507	static const int regs32[8] = {EAX,ECX,EDX,EBX,ESP,EBP,ESI,EDI};
508	508	i386_state *cpustate = get_safe_token(device);
509	509
510		build_cycle_table();
	510	build_cycle_table(device->machine);
511	511
512	512	for( i=0; i < 256; i++ ) {
513	513	int c=0;

src/emu/cpu/mc68hc11/mc68hc11.c

r4679	r4680
356	356	}
357	357
358	358	cpustate->internal_ram_size = 1280;      /* FIXME: this is for MC68HC11M0 */
359		cpustate->internal_ram = (UINT8 *)auto_malloc(cpustate->internal_ram_size);
	359	cpustate->internal_ram = auto_alloc_array(device->machine, UINT8, cpustate->internal_ram_size);
360	360
361	361	cpustate->reg_position = 0;
362	362	cpustate->ram_position = 0x100;

src/emu/cpu/tlcs900/tlcs900.c

r4679	r4680
9	9	TODO:
10	10	- review cycle counts
11	11	- implement the remaining internal mcu features
12		- add support for 900 and 900/M modes
	12	- at support for 900 and 900/M modes
13	13
14	14	*******************************************************************/
15	15

src/emu/cpu/drcbec.c

r4679	r4680
283	283
284	284	static UINT64 immediate_zero = 0;
285	285
	286	extern const drcbe_interface drcbe_c_be_interface;
286	287	const drcbe_interface drcbe_c_be_interface =
287	288	{
288	289	drcbec_alloc,

src/emu/cpu/cop400/cop400.c

r4679	r4680
897	897	cpustate->d_mask = d_mask;
898	898	cpustate->in_mask = in_mask;
899	899
900		/* set clock divider */
901
902		device_set_info_int(device, CPUINFO_INT_CLOCK_DIVIDER, cpustate->intf->cki);
903
904	900	/* allocate serial timer */
905	901
906	902	cpustate->serial_timer = timer_alloc(device->machine, serial_tick, cpustate);
r4679	r4680
1360	1356	static CPU_GET_INFO( cop400 )
1361	1357	{
1362	1358	cop400_state *cpustate = (device != NULL && device->token != NULL) ? get_safe_token(device) : NULL;
	1359	cop400_interface *intf = (device != NULL && device->static_config != NULL) ? (cop400_interface *)device->static_config : NULL;
1363	1360
1364	1361	switch (state)
1365	1362	{
r4679	r4680
1369	1366	case CPUINFO_INT_DEFAULT_IRQ_VECTOR:         info->i = 0;                                 break;
1370	1367	case CPUINFO_INT_ENDIANNESS:               info->i = ENDIANNESS_LITTLE;                     break;
1371	1368	case CPUINFO_INT_CLOCK_MULTIPLIER:            info->i = 1;                                 break;
1372		case CPUINFO_INT_CLOCK_DIVIDER:               info->i = 16;                                 break;
	1369	case CPUINFO_INT_CLOCK_DIVIDER:               info->i = (intf != NULL) ? intf->cki : 16;            break;
1373	1370	case CPUINFO_INT_MIN_INSTRUCTION_BYTES:         info->i = 1;                                 break;
1374	1371	case CPUINFO_INT_MAX_INSTRUCTION_BYTES:         info->i = 2;                                 break;
1375	1372	case CPUINFO_INT_MIN_CYCLES:               info->i = 1;                                 break;

src/emu/cpu/jaguar/jaguar.c

r4679	r4680
367	367	}
368	368
369	369	/* fill in the mirror table */
370		mirror_table = (UINT16 *)malloc_or_die(65536 * sizeof(mirror_table[0]));
	370	mirror_table = alloc_array_or_die(UINT16, 65536);
371	371	for (i = 0; i < 65536; i++)
372	372	mirror_table[i] = ((i >> 15) & 0x0001) | ((i >> 13) & 0x0002) |
373	373	((i >> 11) & 0x0004) | ((i >> 9)  & 0x0008) |
r4679	r4680
379	379	((i << 13) & 0x4000) | ((i << 15) & 0x8000);
380	380
381	381	/* fill in the condition table */
382		condition_table = (UINT8 *)malloc_or_die(32 * 8 * sizeof(condition_table[0]));
	382	condition_table = alloc_array_or_die(UINT8, 32 * 8);
383	383	for (i = 0; i < 8; i++)
384	384	for (j = 0; j < 32; j++)
385	385	{

src/emu/cpu/i8085/i8085.c

r4679	r4680
182	182	I8085_STATE_ENTRY(GENPC, "%04X", PC.w.l, 0xffff, CPUSTATE_NOSHOW)
183	183	//  I8085_STATE_ENTRY(GENPCBASE, "%04X", prvpc.w.l, 0xffff, CPUSTATE_NOSHOW)
184	184
185		I8085_STATE_ENTRY(SP,  "%04X", PC.w.l, 0xffff, 0)
186		I8085_STATE_ENTRY(GENSP, "%04X", PC.w.l, 0xffff, CPUSTATE_NOSHOW)
	185	I8085_STATE_ENTRY(SP,  "%04X", SP.w.l, 0xffff, 0)
	186	I8085_STATE_ENTRY(GENSP, "%04X", SP.w.l, 0xffff, CPUSTATE_NOSHOW)
187	187
188	188	I8085_STATE_ENTRY(A, "%02X", AF.b.l, 0xff, CPUSTATE_NOSHOW)
189	189	I8085_STATE_ENTRY(B, "%02X", BC.b.h, 0xff, CPUSTATE_NOSHOW)

src/emu/cpu/vtlb.c

r4679	r4680
60	60	vtlb_state *vtlb;
61	61
62	62	/* allocate memory for the core structure */
63		vtlb = (vtlb_state *)malloc_or_die(sizeof(*vtlb));
64		memset(vtlb, 0, sizeof(*vtlb));
	63	vtlb = alloc_clear_or_die(vtlb_state);
65	64
66	65	/* fill in CPU information */
67	66	vtlb->device = cpu;
r4679	r4680
78	77	assert(vtlb->addrwidth > vtlb->pageshift);
79	78
80	79	/* allocate the entry array */
81		vtlb->live = (offs_t *)malloc_or_die(sizeof(vtlb->live[0]) * (fixed_entries + dynamic_entries));
82		memset(vtlb->live, 0, sizeof(vtlb->live[0]) * (fixed_entries + dynamic_entries));
	80	vtlb->live = alloc_array_clear_or_die(offs_t, fixed_entries + dynamic_entries);
83	81	state_save_register_device_item_pointer(cpu, space, vtlb->live, fixed_entries + dynamic_entries);
84	82
85	83	/* allocate the lookup table */
86		vtlb->table = (vtlb_entry *)malloc_or_die(sizeof(vtlb->table[0]) << (vtlb->addrwidth - vtlb->pageshift));
87		memset(vtlb->table, 0, sizeof(vtlb->table[0]) << (vtlb->addrwidth - vtlb->pageshift));
	84	vtlb->table = alloc_array_clear_or_die(vtlb_entry, 1 << (vtlb->addrwidth - vtlb->pageshift));
88	85	state_save_register_device_item_pointer(cpu, space, vtlb->table, 1 << (vtlb->addrwidth - vtlb->pageshift));
89	86
90	87	/* allocate the fixed page count array */
91	88	if (fixed_entries > 0)
92	89	{
93		vtlb->fixedpages = (int *)malloc_or_die(sizeof(vtlb->fixedpages[0]) * fixed_entries);
94		memset(vtlb->fixedpages, 0, sizeof(vtlb->fixedpages[0]) * fixed_entries);
	90	vtlb->fixedpages = alloc_array_clear_or_die(int, fixed_entries);
95	91	state_save_register_device_item_pointer(cpu, space, vtlb->fixedpages, fixed_entries);
96	92	}
97	93	return vtlb;

src/emu/cpu/sh2/sh2comn.c

r4679	r4680
712	712	sh2->dma_timer[1] = timer_alloc(device->machine, sh2_dmac_callback, sh2);
713	713	timer_adjust_oneshot(sh2->dma_timer[1], attotime_never, 0);
714	714
715		sh2->m = (UINT32 *)auto_malloc(0x200);
	715	sh2->m = auto_alloc_array(device->machine, UINT32, 0x200/4);
716	716
717	717	if(conf)
718	718	{

src/emu/cpu/sh2/sh2.c

r4679	r4680
2247	2247	static CPU_INIT( sh2 )
2248	2248	{
2249	2249	/* allocate the core memory */
2250		sh2 = auto_malloc(sizeof(SH2));
2251		memset(sh2, 0, sizeof(SH2));
	2250	sh2 = auto_alloc_clear(device->machine, SH2);
2252	2251
2253	2252	/* initialize the common core parts */
2254	2253	sh2_common_init(sh2, device, irqcallback);

src/emu/cpu/sh4/sh4.c

r4679	r4680
3646	3646	case CPUINFO_STR_REGISTER + SH4_XF14:         sh4->xf[14] = info->i; break;
3647	3647	case CPUINFO_STR_REGISTER + SH4_XF15:         sh4->xf[15] = info->i; break;
3648	3648	#endif
3649
3650		case CPUINFO_INT_SH4_IRLn_INPUT:            sh4_set_irln_input(device, info->i); break;
3651		case CPUINFO_INT_SH4_FRT_INPUT:               sh4_set_frt_input(device, info->i); break;
3652
3653		/* --- the following bits of info are set as pointers to data or functions --- */
3654		case CPUINFO_FCT_SH4_FTCSR_READ_CALLBACK:      sh4->ftcsr_read_callback = (void (*) (UINT32 ))info->f; break;
3655		case CPUINFO_PTR_SH4_EXTERNAL_DDT_DMA:         sh4_dma_ddt(sh4, (struct sh4_ddt_dma *)info->f); break;
3656	3649	}
3657	3650	}
3658	3651
	3652	void sh4_set_ftcsr_callback(const device_config *device, sh4_ftcsr_callback callback)
	3653	{
	3654	SH4 *sh4 = get_safe_token(device);
	3655	sh4->ftcsr_read_callback = callback;
	3656	}
	3657
	3658
3659	3659	#if 0
3660	3660	/*When OC index mode is off (CCR.OIX = 0)*/
3661	3661	static ADDRESS_MAP_START( sh4_internal_map, ADDRESS_SPACE_PROGRAM, 64 )
r4679	r4680
3923	3923	case CPUINFO_STR_REGISTER + SH4_XF14:         sprintf(info->s, "XF14 :%08X %f", FP_XS(14),(double)FP_XFS(14)); break;
3924	3924	case CPUINFO_STR_REGISTER + SH4_XF15:         sprintf(info->s, "XF15 :%08X %f", FP_XS(15),(double)FP_XFS(15)); break; //%01.2e
3925	3925	#endif
3926		case CPUINFO_FCT_SH4_FTCSR_READ_CALLBACK:      info->f = (genf*)sh4->ftcsr_read_callback; break;
3927
3928	3926	}
3929	3927	}

src/emu/cpu/sh4/sh4comn.h

r4679	r4680
144	144	void sh4_swap_fp_registers(SH4 *sh4);
145	145	void sh4_default_exception_priorities(SH4 *sh4); // setup default priorities for exceptions
146	146	void sh4_parse_configuration(SH4 *sh4, const struct sh4_config *conf);
147		void sh4_dma_ddt(SH4 *sh4, struct sh4_ddt_dma *s);
148	147	void sh4_set_irq_line(SH4 *sh4, int irqline, int state); // set state of external interrupt line
149		void sh4_set_frt_input(const device_config *device, int state);
150		void sh4_set_irln_input(const device_config *device, int value);
151	148	#ifdef LSB_FIRST
152	149	void sh4_swap_fp_couples(SH4 *sh4);
153	150	#endif

src/emu/cpu/sh4/sh4.h

r4679	r4680
56	56
57	57	enum
58	58	{
59		CPUINFO_INT_SH4_IRLn_INPUT = CPUINFO_INT_CPU_SPECIFIC,
60		CPUINFO_INT_SH4_FRT_INPUT
61		};
62
63		enum
64		{
65		CPUINFO_FCT_SH4_FTCSR_READ_CALLBACK = CPUINFO_FCT_CPU_SPECIFIC,
66		CPUINFO_PTR_SH4_EXTERNAL_DDT_DMA = CPUINFO_PTR_CPU_SPECIFIC,
67		};
68
69		enum
70		{
71	59	SH4_IOPORT_16=8*0,
72	60	SH4_IOPORT_4=8*1,
73	61	// future use
r4679	r4680
101	89	int mode;
102	90	};
103	91
	92	typedef void (*sh4_ftcsr_callback)(UINT32);
	93
104	94	extern CPU_GET_INFO( sh4 );
105	95	#define CPU_SH4 CPU_GET_INFO_NAME( sh4 )
106	96
r4679	r4680
109	99
110	100	extern unsigned DasmSH4( char *dst, unsigned pc, UINT16 opcode );
111	101
	102	void sh4_set_frt_input(const device_config *device, int state);
	103	void sh4_set_irln_input(const device_config *device, int value);
	104	void sh4_set_ftcsr_callback(const device_config *device, sh4_ftcsr_callback callback);
	105	void sh4_dma_ddt(const device_config *device, struct sh4_ddt_dma *s);
	106
112	107	#endif /* __SH4_H__ */
113	108

src/emu/cpu/sh4/sh4comn.c

r4679	r4680
1182	1182	sh4->rtc_timer = timer_alloc(device->machine, sh4_rtc_timer_callback, sh4);
1183	1183	timer_adjust_oneshot(sh4->rtc_timer, attotime_never, 0);
1184	1184
1185		sh4->m = (UINT32 *)auto_malloc(16384*4);
	1185	sh4->m = auto_alloc_array(device->machine, UINT32, 16384);
1186	1186	}
1187	1187
1188		void sh4_dma_ddt(SH4 *sh4, struct sh4_ddt_dma *s)
	1188	void sh4_dma_ddt(const device_config *device, struct sh4_ddt_dma *s)
1189	1189	{
1190		UINT32 chcr;
1191		UINT32 *p32bits;
1192		UINT64 *p32bytes;
1193		UINT32 pos,len,siz;
	1190	SH4 *sh4 = get_safe_token(device);
	1191	UINT32 chcr;
	1192	UINT32 *p32bits;
	1193	UINT64 *p32bytes;
	1194	UINT32 pos,len,siz;
1194	1195
1195	1196	if (sh4->dma_timer_active[s->channel])
1196	1197	return;

src/emu/cpu/g65816/g65816.c

r4679	r4680
396	396	case CPUINFO_INT_REGISTER + G65816_E:         g65816_set_reg(cpustate, G65816_E, info->i);      break;
397	397	case CPUINFO_INT_REGISTER + G65816_NMI_STATE:   g65816_set_reg(cpustate, G65816_NMI_STATE, info->i); break;
398	398	case CPUINFO_INT_REGISTER + G65816_IRQ_STATE:   g65816_set_reg(cpustate, G65816_IRQ_STATE, info->i); break;
399
400		/* --- the following bits of info are set as pointers to data or functions --- */
401		case CPUINFO_FCT_G65816_READVECTOR_CALLBACK:   READ_VECTOR = (read8_space_func) info->f;   break;
402	399	}
403	400	}
404	401
405	402
406	403
	404	void g65816_set_read_vector_callback(const device_config *device, read8_space_func read_vector)
	405	{
	406	g65816i_cpu_struct *cpustate = get_safe_token(device);
	407	READ_VECTOR = read_vector;
	408	}
	409
407	410	/**************************************************************************
408	411	* Generic get_info
409	412	**************************************************************************/
r4679	r4680
470	473	case CPUINFO_FCT_BURN:                     info->burn = NULL;                  break;
471	474	case CPUINFO_FCT_DISASSEMBLE:               info->disassemble = CPU_DISASSEMBLE_NAME(g65816);      break;
472	475	case CPUINFO_PTR_INSTRUCTION_COUNTER:         info->icount = &cpustate->ICount;         break;
473		case CPUINFO_FCT_G65816_READVECTOR_CALLBACK:   info->f = (genf *) READ_VECTOR;         break;
474	476
475	477	case CPUINFO_FCT_READOP:                  info->readop = CPU_READOP_NAME(g65816);         break;
476	478

src/emu/cpu/g65816/g65816op.h

r4679	r4680
2253	2253
2254	2254
2255	2255
	2256	extern TABLE_OPCODES;
2256	2257	TABLE_OPCODES =
2257	2258	{
2258	2259	O(00),O(01),O(02),O(03),O(04),O(05),O(06),O(07),

src/emu/cpu/g65816/g65816.h

r4679	r4680
58	58	G65816_NMI_STATE, G65816_IRQ_STATE
59	59	};
60	60
61		enum
62		{
63		CPUINFO_FCT_G65816_READVECTOR_CALLBACK = CPUINFO_FCT_CPU_SPECIFIC
64		};
65
66	61	/* Main interface function */
67	62	CPU_GET_INFO( g65816 );
68	63	#define CPU_G65816 CPU_GET_INFO_NAME( g65816 )
69	64
	65	void g65816_set_read_vector_callback(const device_config *device, read8_space_func read_vector);
70	66
71	67
72	68	/* ======================================================================== */

src/emu/cpu/mips/r3000.c

r4679	r4680
301	301	r3000_state *r3000 = get_safe_token(device);
302	302
303	303	/* allocate memory */
304		r3000->icache = (UINT32 *)auto_malloc(configdata->icache);
305		r3000->dcache = (UINT32 *)auto_malloc(configdata->dcache);
	304	r3000->icache = auto_alloc_array(device->machine, UINT32, configdata->icache/4);
	305	r3000->dcache = auto_alloc_array(device->machine, UINT32, configdata->dcache/4);
306	306
307	307	r3000->icache_size = configdata->icache;
308	308	r3000->dcache_size = configdata->dcache;

src/emu/cpu/mips/psx.c

r4679	r4680
1316	1316	}
1317	1317	else
1318	1318	{
1319		memory_install_readwrite32_handler( space, 0x1f800000, 0x1f8003ff, 0, 0, (read32_space_func)SMH_BANK32, (write32_space_func)SMH_BANK32 );
	1319	memory_install_readwrite32_handler( space, 0x1f800000, 0x1f8003ff, 0, 0, (read32_space_func)SMH_BANK(32), (write32_space_func)SMH_BANK(32) );
1320	1320
1321	1321	memory_set_bankptr(space->machine,  32, psxcpu->dcache );
1322	1322	}

src/emu/cpu/mips/mips3.c

r4679	r4680
2137	2137	static CPU_INIT( r4600be )
2138	2138	{
2139	2139	size_t memsize = mips3com_init(&mips3.core, MIPS3_TYPE_R4600, TRUE, device, index, clock, irqcallback, NULL);
2140		void *memory = auto_malloc(memsize);
	2140	void *memory = auto_alloc_array(device->machine, UINT8, memsize);
2141	2141	mips3com_init(&mips3.core, MIPS3_TYPE_R4600, TRUE, index, clock, irqcallback, memory);
2142	2142	}
2143	2143
2144	2144	static CPU_INIT( r4600le )
2145	2145	{
2146	2146	size_t memsize = mips3com_init(&mips3.core, MIPS3_TYPE_R4600, FALSE, device, index, clock, irqcallback, NULL);
2147		void *memory = auto_malloc(memsize);
	2147	void *memory = auto_alloc_array(device->machine, UINT8, memsize);
2148	2148	mips3com_init(&mips3.core, MIPS3_TYPE_R4600, FALSE, index, clock, irqcallback, memory);
2149	2149	}
2150	2150
r4679	r4680
2193	2193	static CPU_INIT( r4650be )
2194	2194	{
2195	2195	size_t memsize = mips3com_init(&mips3.core, MIPS3_TYPE_R4650, TRUE, device, index, clock, irqcallback, NULL);
2196		void *memory = auto_malloc(memsize);
	2196	void *memory = auto_alloc_array(device->machine, UINT8, memsize);
2197	2197	mips3com_init(&mips3.core, MIPS3_TYPE_R4650, TRUE, index, clock, irqcallback, memory);
2198	2198	}
2199	2199
2200	2200	static CPU_INIT( r4650le )
2201	2201	{
2202	2202	size_t memsize = mips3com_init(&mips3.core, MIPS3_TYPE_R4650, FALSE, device, index, clock, irqcallback, NULL);
2203		void *memory = auto_malloc(memsize);
	2203	void *memory = auto_alloc_array(device->machine, UINT8, memsize);
2204	2204	mips3com_init(&mips3.core, MIPS3_TYPE_R4650, FALSE, index, clock, irqcallback, memory);
2205	2205	}
2206	2206
r4679	r4680
2249	2249	static CPU_INIT( r4700be )
2250	2250	{
2251	2251	size_t memsize = mips3com_init(&mips3.core, MIPS3_TYPE_R4700, TRUE, device, index, clock, irqcallback, NULL);
2252		void *memory = auto_malloc(memsize);
	2252	void *memory = auto_alloc_array(device->machine, UINT8, memsize);
2253	2253	mips3com_init(&mips3.core, MIPS3_TYPE_R4700, TRUE, index, clock, irqcallback, memory);
2254	2254	}
2255	2255
2256	2256	static CPU_INIT( r4700le )
2257	2257	{
2258	2258	size_t memsize = mips3com_init(&mips3.core, MIPS3_TYPE_R4700, FALSE, device, index, clock, irqcallback, NULL);
2259		void *memory = auto_malloc(memsize);
	2259	void *memory = auto_alloc_array(device->machine, UINT8, memsize);
2260	2260	mips3com_init(&mips3.core, MIPS3_TYPE_R4700, FALSE, index, clock, irqcallback, memory);
2261	2261	}
2262	2262
r4679	r4680
2306	2306	static CPU_INIT( r5000be )
2307	2307	{
2308	2308	size_t memsize = mips3com_init(&mips3.core, MIPS3_TYPE_R5000, TRUE, device, index, clock, irqcallback, NULL);
2309		void *memory = auto_malloc(memsize);
	2309	void *memory = auto_alloc_array(device->machine, UINT8, memsize);
2310	2310	mips3com_init(&mips3.core, MIPS3_TYPE_R5000, TRUE, index, clock, irqcallback, memory);
2311	2311	}
2312	2312
2313	2313	static CPU_INIT( r5000le )
2314	2314	{
2315	2315	size_t memsize = mips3com_init(&mips3.core, MIPS3_TYPE_R5000, FALSE, device, index, clock, irqcallback, NULL);
2316		void *memory = auto_malloc(memsize);
	2316	void *memory = auto_alloc_array(device->machine, UINT8, memsize);
2317	2317	mips3com_init(&mips3.core, MIPS3_TYPE_R5000, FALSE, index, clock, irqcallback, memory);
2318	2318	}
2319	2319
r4679	r4680
2362	2362	static CPU_INIT( qed5271be )
2363	2363	{
2364	2364	size_t memsize = mips3com_init(&mips3.core, MIPS3_TYPE_QED5271, TRUE, device, index, clock, irqcallback, NULL);
2365		void *memory = auto_malloc(memsize);
	2365	void *memory = auto_alloc_array(device->machine, UINT8, memsize);
2366	2366	mips3com_init(&mips3.core, MIPS3_TYPE_QED5271, TRUE, index, clock, irqcallback, memory);
2367	2367	}
2368	2368
2369	2369	static CPU_INIT( qed5271le )
2370	2370	{
2371	2371	size_t memsize = mips3com_init(&mips3.core, MIPS3_TYPE_QED5271, FALSE, device, index, clock, irqcallback, NULL);
2372		void *memory = auto_malloc(memsize);
	2372	void *memory = auto_alloc_array(device->machine, UINT8, memsize);
2373	2373	mips3com_init(&mips3.core, MIPS3_TYPE_QED5271, FALSE, index, clock, irqcallback, memory);
2374	2374	}
2375	2375
r4679	r4680
2418	2418	static CPU_INIT( rm7000be )
2419	2419	{
2420	2420	size_t memsize = mips3com_init(&mips3.core, MIPS3_TYPE_RM7000, TRUE, device, index, clock, irqcallback, NULL);
2421		void *memory = auto_malloc(memsize);
	2421	void *memory = auto_alloc_array(device->machine, UINT8, memsize);
2422	2422	mips3com_init(&mips3.core, MIPS3_TYPE_RM7000, TRUE, index, clock, irqcallback, memory);
2423	2423	}
2424	2424
2425	2425	static CPU_INIT( rm7000le )
2426	2426	{
2427	2427	size_t memsize = mips3com_init(&mips3.core, MIPS3_TYPE_RM7000, FALSE, device, index, clock, irqcallback, NULL);
2428		void *memory = auto_malloc(memsize);
	2428	void *memory = auto_alloc_array(device->machine, UINT8, memsize);
2429	2429	mips3com_init(&mips3.core, MIPS3_TYPE_RM7000, FALSE, index, clock, irqcallback, memory);
2430	2430	}
2431	2431

src/emu/cpu/z80/z80daisy.c

r4679	r4680
29	29	/* create a linked list of devices */
30	30	for ( ; daisy->devname != NULL; daisy++)
31	31	{
32		*tailptr = (z80_daisy_state *)auto_malloc(sizeof(**tailptr));
	32	*tailptr = auto_alloc(cpudevice->machine, z80_daisy_state);
33	33	(*tailptr)->next = NULL;
34	34	(*tailptr)->device = devtag_get_device(cpudevice->machine, device_inherit_tag(tempstring, cpudevice->tag, daisy->devname));
35	35	if ((*tailptr)->device == NULL)

src/emu/cpu/esrip/esrip.c

r4679	r4680
260	260	cpustate->draw = _config->draw;
261	261
262	262	/* Allocate image pointer table RAM */
263		cpustate->ipt_ram = (UINT16 *)auto_malloc(IPT_RAM_SIZE);
	263	cpustate->ipt_ram = auto_alloc_array(device->machine, UINT16, IPT_RAM_SIZE/2);
264	264
265	265	cpustate->device = device;
266	266	cpustate->program = memory_find_address_space(device, ADDRESS_SPACE_PROGRAM);
267	267
268	268	/* Create the instruction decode lookup table */
269		cpustate->optable = (UINT8 *)auto_malloc(65536);
	269	cpustate->optable = auto_alloc_array(device->machine, UINT8, 65536);
270	270	make_ops(cpustate);
271	271
272	272	/* Register stuff for state saving */

src/emu/cpu/asap/asap.c

r4679	r4680
217	217	static void jsr_c0(asap_state *);
218	218	static void trapf(asap_state *);
219	219
220		static void (*const opcodetable[32][4])(asap_state *) =
	220	typedef void (*asap_ophandler)(asap_state *);
	221
	222	static const asap_ophandler opcodetable[32][4] =
221	223	{
222	224	{   trap0,      trap0,      trap0,      trap0      },
223	225	{   NULL,      NULL,      NULL,      NULL      },
r4679	r4680
407	409	INITIALIZATION AND SHUTDOWN
408	410	***************************************************************************/
409	411
410		static void init_tables(void)
	412	static void init_tables(running_machine *machine)
411	413	{
412	414	/* allocate opcode table */
413	415	if (!opcode)
414		opcode = (void (**)(asap_state *))auto_malloc(32 * 32 * 2 * sizeof(void *));
	416	opcode = auto_alloc_array(machine, asap_ophandler, 32 * 32 * 2);
415	417
416	418	/* fill opcode table */
417	419	if (opcode)
r4679	r4680
439	441	asap_state *asap = get_safe_token(device);
440	442	int i;
441	443
442		init_tables();
	444	init_tables(device->machine);
443	445	for (i = 0; i < REGBASE; i++)
444	446	asap->src2val[i] = i;
445	447	asap->irq_callback = irqcallback;

src/emu/cpu/tms32025/tms32025.c

r4679	r4680
1719	1719	{
1720	1720	tms32025_state *cpustate = get_safe_token(device);
1721	1721
1722		cpustate->intRAM = (UINT16 *)auto_malloc(0x800*2);
	1722	cpustate->intRAM = auto_alloc_array(device->machine, UINT16, 0x800);
1723	1723	cpustate->irq_callback = irqcallback;
1724	1724	cpustate->device = device;
1725	1725	cpustate->program = memory_find_address_space(device, ADDRESS_SPACE_PROGRAM);

src/emu/cpu/mb86233/mb86233.c

r4679	r4680
118	118	cpustate->fifo_write_cb = _config->fifo_write_cb;
119	119	}
120	120
121		cpustate->RAM = (UINT32 *)auto_malloc(2 * 0x200 * sizeof(UINT32));      /* 2x 2KB */
	121	cpustate->RAM = auto_alloc_array(device->machine, UINT32, 2 * 0x200);      /* 2x 2KB */
122	122	memset( cpustate->RAM, 0, 2 * 0x200 * sizeof(UINT32) );
123	123	cpustate->ARAM = &cpustate->RAM[0];
124	124	cpustate->BRAM = &cpustate->RAM[0x200];

src/emu/cpu/drcbex86.c

r4679	r4680
222	222	***************************************************************************/
223	223
224	224	/* globally-accessible interface to the backend */
	225	extern const drcbe_interface drcbe_x86_be_interface;
225	226	const drcbe_interface drcbe_x86_be_interface =
226	227	{
227	228	drcbex86_alloc,

src/emu/cpu/konami/konami.c

r4679	r4680
504	504	}
505	505
506	506
	507	void konami_configure_set_lines(const device_config *device, konami_set_lines_func func)
	508	{
	509	konami_state *cpustate = get_safe_token(device);
	510	cpustate->setlines_callback = func;
	511	}
	512
	513
507	514	/**************************************************************************
508	515	* Generic set_info
509	516	**************************************************************************/
r4679	r4680
529	536	case CPUINFO_INT_REGISTER + KONAMI_X:         X = info->i;                     break;
530	537	case CPUINFO_INT_REGISTER + KONAMI_Y:         Y = info->i;                     break;
531	538	case CPUINFO_INT_REGISTER + KONAMI_DP:         DP = info->i;                     break;
532
533		/* --- the following bits of info are set as pointers to data or functions --- */
534		case CPUINFO_FCT_KONAMI_SETLINES_CALLBACK:      cpustate->setlines_callback = (konami_set_lines_func)info->f; break;
535	539	}
536	540	}
537	541
r4679	r4680
595	599	case CPUINFO_FCT_BURN:                     info->burn = NULL;                        break;
596	600	case CPUINFO_FCT_DISASSEMBLE:               info->disassemble = CPU_DISASSEMBLE_NAME(konami);break;
597	601	case CPUINFO_PTR_INSTRUCTION_COUNTER:         info->icount = &cpustate->icount;            break;
598		case CPUINFO_FCT_KONAMI_SETLINES_CALLBACK:      info->f = (genf *)cpustate->setlines_callback;   break;
599	602
600	603	/* --- the following bits of info are returned as NULL-terminated strings --- */
601	604	case CPUINFO_STR_NAME:                     strcpy(info->s, "KONAMI");            break;

src/emu/cpu/konami/konami.h

r4679	r4680
15	15	KONAMI_DP
16	16	};
17	17
18		enum
19		{
20		CPUINFO_FCT_KONAMI_SETLINES_CALLBACK = CPUINFO_FCT_CPU_SPECIFIC
21		};
22
23	18	#define KONAMI_SETLINES_CALLBACK(name) void name(const device_config *device, int lines)
24	19
25	20	#define KONAMI_IRQ_LINE   0   /* IRQ line number */
r4679	r4680
31	26
32	27	CPU_DISASSEMBLE( konami );
33	28
	29	void konami_configure_set_lines(const device_config *device, konami_set_lines_func func);
34	30
35		INLINE void konami_configure_set_lines(const device_config *device, konami_set_lines_func func)
36		{
37		device_set_info_fct(device, CPUINFO_FCT_KONAMI_SETLINES_CALLBACK, (genf *)func);
38		}
39	31
40	32	#endif /* __KONAMI_H__ */

src/emu/streams.c

r4679	r4680
165	165	***************************************************************************/
166	166
167	167	static STATE_POSTLOAD( stream_postload );
168		static void allocate_resample_buffers(streams_private *strdata, sound_stream *stream);
169		static void allocate_output_buffers(streams_private *strdata, sound_stream *stream);
170		static void recompute_sample_rate_data(streams_private *strdata, sound_stream *stream);
	168	static void allocate_resample_buffers(running_machine *machine, sound_stream *stream);
	169	static void allocate_output_buffers(running_machine *machine, sound_stream *stream);
	170	static void recompute_sample_rate_data(running_machine *machine, sound_stream *stream);
171	171	static void generate_samples(sound_stream *stream, int samples);
172	172	static stream_sample_t *generate_resampled_data(stream_input *input, UINT32 numsamples);
173	173
r4679	r4680
218	218	streams_private *strdata;
219	219
220	220	/* allocate memory for our private data */
221		strdata = (streams_private *)auto_malloc(sizeof(*strdata));
222		memset(strdata, 0, sizeof(*strdata));
	221	strdata = auto_alloc_clear(machine, streams_private);
223	222
224	223	/* reset globals */
225	224	strdata->stream_tailptr = &strdata->stream_head;
r4679	r4680
311	310	stream->new_sample_rate = 0;
312	311
313	312	/* recompute all the data */
314		recompute_sample_rate_data(strdata, stream);
	313	recompute_sample_rate_data(machine, stream);
315	314
316	315	/* reset our sample indexes to the current time */
317	316	stream->output_sampindex = (INT64)stream->output_sampindex * (INT64)stream->sample_rate / old_rate;
r4679	r4680
343	342	char statetag[30];
344	343
345	344	/* allocate memory */
346		stream = (sound_stream *)auto_malloc(sizeof(*stream));
347		memset(stream, 0, sizeof(*stream));
	345	stream = auto_alloc_clear(device->machine, sound_stream);
348	346
349	347	VPRINTF(("stream_create(%d, %d, %d) => %p\n", inputs, outputs, sample_rate, stream));
350	348
r4679	r4680
365	363	/* allocate space for the inputs */
366	364	if (inputs > 0)
367	365	{
368		stream->input = (stream_input *)auto_malloc(inputs * sizeof(*stream->input));
369		memset(stream->input, 0, inputs * sizeof(*stream->input));
370		stream->input_array = (stream_sample_t **)auto_malloc(inputs * sizeof(*stream->input_array));
371		memset(stream->input_array, 0, inputs * sizeof(*stream->input_array));
	366	stream->input = auto_alloc_array_clear(device->machine, stream_input, inputs);
	367	stream->input_array = auto_alloc_array_clear(device->machine, stream_sample_t *, inputs);
372	368	}
373	369
374	370	/* initialize the state of each input */
r4679	r4680
382	378	/* allocate space for the outputs */
383	379	if (outputs > 0)
384	380	{
385		stream->output = (stream_output *)auto_malloc(outputs * sizeof(*stream->output));
386		memset(stream->output, 0, outputs * sizeof(*stream->output));
387		stream->output_array = (stream_sample_t **)auto_malloc(outputs * sizeof(*stream->output_array));
388		memset(stream->output_array, 0, outputs * sizeof(*stream->output_array));
	381	stream->output = auto_alloc_array_clear(device->machine, stream_output, outputs);
	382	stream->output_array = auto_alloc_array_clear(device->machine, stream_sample_t *, outputs);
389	383	}
390	384
391	385	/* initialize the state of each output */
r4679	r4680
402	396
403	397	/* force an update to the sample rates; this will cause everything to be recomputed
404	398	and will generate the initial resample buffers for our inputs */
405		recompute_sample_rate_data(strdata, stream);
	399	recompute_sample_rate_data(device->machine, stream);
406	400
407	401	/* set up the initial output buffer positions now that we have data */
408	402	stream->output_base_sampindex = -stream->max_samples_per_update;
r4679	r4680
497	491	input->source->dependents++;
498	492
499	493	/* update sample rates now that we know the input */
500		recompute_sample_rate_data(stream->device->machine->streams_data, stream);
	494	recompute_sample_rate_data(stream->device->machine, stream);
501	495	}
502	496
503	497
r4679	r4680
702	696	int outputnum;
703	697
704	698	/* recompute the same rate information */
705		recompute_sample_rate_data(strdata, stream);
	699	recompute_sample_rate_data(machine, stream);
706	700
707	701	/* make sure our output buffers are fully cleared */
708	702	for (outputnum = 0; outputnum < stream->outputs; outputnum++)
r4679	r4680
720	714	resample buffer sizes and expand if necessary
721	715	-------------------------------------------------*/
722	716
723		static void allocate_resample_buffers(streams_private *strdata, sound_stream *stream)
	717	static void allocate_resample_buffers(running_machine *machine, sound_stream *stream)
724	718	{
725	719	/* compute the target number of samples */
726	720	INT32 bufsize = 2 * stream->max_samples_per_update;
r4679	r4680
737	731	for (inputnum = 0; inputnum < stream->inputs; inputnum++)
738	732	{
739	733	stream_input *input = &stream->input[inputnum];
740		input->resample = (stream_sample_t *)auto_realloc(input->resample, stream->resample_bufalloc * sizeof(input->resample[0]));
	734	input->resample = auto_extend_array(machine, input->resample, stream_sample_t, stream->resample_bufalloc);
741	735	}
742	736	}
743	737	}
r4679	r4680
748	742	output buffer sizes and expand if necessary
749	743	-------------------------------------------------*/
750	744
751		static void allocate_output_buffers(streams_private *strdata, sound_stream *stream)
	745	static void allocate_output_buffers(running_machine *machine, sound_stream *stream)
752	746	{
753	747	/* compute the target number of samples */
754	748	INT32 bufsize = OUTPUT_BUFFER_UPDATES * stream->max_samples_per_update;
r4679	r4680
767	761	for (outputnum = 0; outputnum < stream->outputs; outputnum++)
768	762	{
769	763	stream_output *output = &stream->output[outputnum];
770		output->buffer = (stream_sample_t *)auto_realloc(output->buffer, stream->output_bufalloc * sizeof(output->buffer[0]));
	764	output->buffer = auto_extend_array(machine, output->buffer, stream_sample_t, stream->output_bufalloc);
771	765	memset(&output->buffer[oldsize], 0, (stream->output_bufalloc - oldsize) * sizeof(output->buffer[0]));
772	766	}
773	767	}
r4679	r4680
780	774	by this stream
781	775	-------------------------------------------------*/
782	776
783		static void recompute_sample_rate_data(streams_private *strdata, sound_stream *stream)
	777	static void recompute_sample_rate_data(running_machine *machine, sound_stream *stream)
784	778	{
	779	streams_private *strdata = machine->streams_data;
785	780	int inputnum;
786	781
787	782	/* recompute the timing parameters */
r4679	r4680
789	784	stream->max_samples_per_update = (strdata->update_attoseconds + stream->attoseconds_per_sample - 1) / stream->attoseconds_per_sample;
790	785
791	786	/* update resample and output buffer sizes */
792		allocate_resample_buffers(strdata, stream);
793		allocate_output_buffers(strdata, stream);
	787	allocate_resample_buffers(machine, stream);
	788	allocate_output_buffers(machine, stream);
794	789
795	790	/* iterate over each input */
796	791	for (inputnum = 0; inputnum < stream->inputs; inputnum++)

src/emu/video/resnet.c

r4679	r4680
260	260
261	261	/* parse input parameters */
262	262
263		o  = (double *)malloc_or_die( sizeof(double) * (1<<MAX_RES_PER_NET) *  MAX_NETS);
264		os = (double *)malloc_or_die( sizeof(double) * (1<<MAX_RES_PER_NET) *  MAX_NETS);
	263	o  = alloc_array_or_die(double, (1<<MAX_RES_PER_NET) *  MAX_NETS);
	264	os = alloc_array_or_die(double, (1<<MAX_RES_PER_NET) *  MAX_NETS);
265	265
266	266	networks_no = 0;
267	267	for (n = 0; n < MAX_NETS; n++)
r4679	r4680
700	700	int i,j,k;
701	701	rgb_t *rgb;
702	702
703		rgb = (rgb_t *)malloc_or_die((rdi->end - rdi->start + 1)*sizeof(rgb_t));
	703	rgb = alloc_array_or_die(rgb_t, rdi->end - rdi->start + 1);
704	704	for (i=rdi->start; i<=rdi->end; i++)
705	705	{
706	706	UINT8 t[3] = {0,0,0};

src/emu/video/tms9928a.c

r4679	r4680
200	200
201	201	/* Video RAM */
202	202	tms.vramsize = intf->vram;
203		tms.vMem = (UINT8*) auto_malloc (intf->vram);
204		memset (tms.vMem, 0, intf->vram);
	203	tms.vMem = auto_alloc_array_clear(machine, UINT8, intf->vram);
205	204
206	205	/* Sprite back buffer */
207		tms.dBackMem = (UINT8*)auto_malloc (IMAGE_SIZE);
	206	tms.dBackMem = auto_alloc_array(machine, UINT8, IMAGE_SIZE);
208	207
209	208	/* back bitmap */
210		tms.tmpbmp = auto_bitmap_alloc (256, 192, video_screen_get_format(machine->primary_screen));
	209	tms.tmpbmp = auto_bitmap_alloc (machine, 256, 192, video_screen_get_format(machine->primary_screen));
211	210
212	211	TMS9928A_reset ();
213	212	tms.LimitSprites = 1;

src/emu/video/tms34061.c

r4679	r4680
84	84	tms34061.vrammask = tms34061.intf.vramsize - 1;
85	85
86	86	/* allocate memory for VRAM */
87		tms34061.vram = (UINT8 *)auto_malloc(tms34061.intf.vramsize + 256 * 2);
88		memset(tms34061.vram, 0, tms34061.intf.vramsize + 256 * 2);
	87	tms34061.vram = auto_alloc_array_clear(machine, UINT8, tms34061.intf.vramsize + 256 * 2);
89	88	/* not really a save state, just there for debugging purposes */
90	89	state_save_register_global_pointer(machine, tms34061.vram, tms34061.intf.vramsize);
91	90
92	91	/* allocate memory for latch RAM */
93		tms34061.latchram = (UINT8 *)auto_malloc(tms34061.intf.vramsize + 256 * 2);
94		memset(tms34061.latchram, 0, tms34061.intf.vramsize + 256 * 2);
	92	tms34061.latchram = auto_alloc_array_clear(machine, UINT8, tms34061.intf.vramsize + 256 * 2);
95	93
96	94	/* add some buffer space for VRAM and latch RAM */
97	95	tms34061.vram += 256;

src/emu/video/v9938.c

r4679	r4680
164	164	PALETTE_INIT_CALL(v9938);
165	165
166	166	/* set up YJK table */
167		pal_indYJK = (UINT16 *)auto_malloc(0x20000 * sizeof(UINT16));
	167	pal_indYJK = auto_alloc_array(machine, UINT16, 0x20000);
168	168
169	169	LOG(("Building YJK table for V9958 screens, may take a while ... \n"));
170	170	i = 0;
r4679	r4680
494	494	vdp->size_old = -1;
495	495
496	496	/* allocate VRAM */
497		vdp->vram = (UINT8 *)auto_malloc (0x20000);
498		memset (vdp->vram, 0, 0x20000);
	497	vdp->vram = auto_alloc_array_clear(machine, UINT8, 0x20000);
499	498	if (vdp->vram_size < 0x20000)
500	499	{
501	500	/* set unavailable RAM to 0xff */
r4679	r4680
504	503
505	504	/* do we have expanded memory? */
506	505	if (vdp->vram_size > 0x20000)
507		{
508		vdp->vram_exp = (UINT8 *)auto_malloc (0x10000);
509		memset (vdp->vram_exp, 0, 0x10000);
510		}
	506	vdp->vram_exp = auto_alloc_array_clear(machine, UINT8, 0x10000);
511	507	else
512	508	vdp->vram_exp = NULL;
513	509

src/emu/video/vector.c

r4679	r4680
184	184	vector_index = 0;
185	185
186	186	/* allocate memory for tables */
187		vector_list = (point *)auto_malloc (MAX_POINTS * sizeof (vector_list[0]));
	187	vector_list = auto_alloc_array(machine, point, MAX_POINTS);
188	188	}
189	189
190	190

src/emu/video/voodoo.c

r4679	r4680
4471	4471
4472	4472	/* create a multiprocessor work queue */
4473	4473	v->poly = poly_alloc(device->machine, 64, sizeof(poly_extra_data), 0);
4474		v->thread_stats = (stats_block *)auto_malloc(sizeof(v->thread_stats[0]) * WORK_MAX_THREADS);
	4474	v->thread_stats = auto_alloc_array(device->machine, stats_block, WORK_MAX_THREADS);
4475	4475
4476	4476	/* create a table of precomputed 1/n and log2(n) values */
4477	4477	/* n ranges from 1.0000 to 2.0000 */
r4679	r4680
4565	4565	if (config->type <= VOODOO_2)
4566	4566	{
4567	4567	/* separate FB/TMU memory */
4568		fbmem = auto_malloc(config->fbmem << 20);
4569		tmumem[0] = auto_malloc(config->tmumem0 << 20);
4570		tmumem[1] = (config->tmumem1 != 0) ? auto_malloc(config->tmumem1 << 20) : NULL;
	4568	fbmem = auto_alloc_array(device->machine, UINT8, config->fbmem << 20);
	4569	tmumem[0] = auto_alloc_array(device->machine, UINT8, config->tmumem0 << 20);
	4570	tmumem[1] = (config->tmumem1 != 0) ? auto_alloc_array(device->machine, UINT8, config->tmumem1 << 20) : NULL;
4571	4571	}
4572	4572	else
4573	4573	{
4574	4574	/* shared memory */
4575		tmumem[0] = tmumem[1] = fbmem = auto_malloc(config->fbmem << 20);
	4575	tmumem[0] = tmumem[1] = fbmem = auto_alloc_array(device->machine, UINT8, config->fbmem << 20);
4576	4576	tmumem0 = config->fbmem;
4577	4577	}
4578	4578
r4679	r4680
4643	4643
4644	4644
4645	4645	/*-------------------------------------------------
4646		device set info callback
4647		-------------------------------------------------*/
4648
4649		static DEVICE_SET_INFO( voodoo )
4650		{
4651		switch (state)
4652		{
4653		/* no parameters to set */
4654		}
4655		}
4656
4657
4658		/*-------------------------------------------------
4659	4646	device get info callback
4660	4647	-------------------------------------------------*/
4661	4648
r4679	r4680
4670	4657	case DEVINFO_INT_CLASS:               info->i = DEVICE_CLASS_VIDEO;         break;
4671	4658
4672	4659	/* --- the following bits of info are returned as pointers to data or functions --- */
4673		case DEVINFO_FCT_SET_INFO:            info->set_info = DEVICE_SET_INFO_NAME(voodoo); break;
4674	4660	case DEVINFO_FCT_START:               info->start = DEVICE_START_NAME(voodoo); break;
4675	4661	case DEVINFO_FCT_STOP:               info->stop = DEVICE_STOP_NAME(voodoo); break;
4676	4662	case DEVINFO_FCT_RESET:               info->reset = DEVICE_RESET_NAME(voodoo);break;

src/emu/video/generic.c

r4679	r4680
367	367
368	368	Spriteram size _must_ be declared in the memory map:
369	369
370		{ 0x120000, 0x1207ff, SMH_BANK2, &spriteram, &spriteram_size },
	370	{ 0x120000, 0x1207ff, SMH_BANK(2), &spriteram, &spriteram_size },
371	371
372	372	Then the video driver must draw the sprites from the buffered_spriteram
373	373	pointer.  The function buffer_spriteram_w() is used to simulate hardware
r4679	r4680
706	706	pal4bit(((data >> 4) & 0x0c) | i));
707	707	}
708	708
	709	/*-------------------------------------------------
	710	II-BB-GG-RR writes
	711	-------------------------------------------------*/
709	712
	713	WRITE8_HANDLER( paletteram_IIBBGGRR_w )
	714	{
	715	int i = (data >> 6) & 3;
710	716
	717	paletteram[offset] = data;
	718	palette_set_color_rgb(space->machine, offset, pal4bit(((data << 2) & 0x0c) | i),
	719	pal4bit(((data >> 0) & 0x0c) | i),
	720	pal4bit(((data >> 2) & 0x0c) | i));
	721	}
	722
	723
	724
711	725	/***************************************************************************
712	726	4-4-4 RGB PALETTE WRITE HANDLERS
713	727	***************************************************************************/

src/emu/video/generic.h

r4679	r4680
145	145	WRITE8_HANDLER( paletteram_BBGGGRRR_w );
146	146	WRITE8_HANDLER( paletteram_RRRGGGBB_w );
147	147	WRITE8_HANDLER( paletteram_BBGGRRII_w );
	148	WRITE8_HANDLER( paletteram_IIBBGGRR_w );
148	149
149	150	/* 4-4-4 RGB palette write handlers */
150	151	WRITE8_HANDLER( paletteram_xxxxBBBBGGGGRRRR_le_w );

src/emu/video/s2636.c

r4679	r4680
117	117	*
118	118	*************************************/
119	119
120		s2636_t *s2636_config(UINT8 *work_ram, int screen_height, int screen_width, int y_offset, int x_offset)
	120	s2636_t *s2636_config(running_machine *machine, UINT8 *work_ram, int screen_height, int screen_width, int y_offset, int x_offset)
121	121	{
122	122	s2636_t *s2636;
123	123
124	124	/* allocate the object that holds the state */
125		s2636 = (s2636_t *)auto_malloc(sizeof(*s2636));
	125	s2636 = auto_alloc(machine, s2636_t);
126	126
127	127	s2636->work_ram = work_ram;
128	128	s2636->y_offset = y_offset;
129	129	s2636->x_offset = x_offset;
130	130
131		s2636->bitmap = auto_bitmap_alloc(screen_width, screen_height, BITMAP_FORMAT_INDEXED16);
132		s2636->collision_bitmap = auto_bitmap_alloc(screen_width, screen_height, BITMAP_FORMAT_INDEXED16);
	131	s2636->bitmap = auto_bitmap_alloc(machine, screen_width, screen_height, BITMAP_FORMAT_INDEXED16);
	132	s2636->collision_bitmap = auto_bitmap_alloc(machine, screen_width, screen_height, BITMAP_FORMAT_INDEXED16);
133	133
134	134	return s2636;
135	135	}

src/emu/video/poly.c

r4679	r4680
333	333	poly_manager *poly;
334	334
335	335	/* allocate the manager itself */
336		poly = (poly_manager *)malloc_or_die(sizeof(*poly));
337		memset(poly, 0, sizeof(*poly));
	336	poly = alloc_clear_or_die(poly_manager);
338	337	poly->flags = flags;
339	338
340	339	/* allocate polygons */
r4679	r4680
1314	1313	*itemsize = ((*itemsize + CACHE_LINE_SIZE - 1) / CACHE_LINE_SIZE) * CACHE_LINE_SIZE;
1315	1314
1316	1315	/* allocate the array */
1317		ptrarray = (void **)malloc_or_die(sizeof(*ptrarray) * itemcount);
1318		memset(ptrarray, 0, sizeof(*ptrarray) * itemcount);
	1316	ptrarray = alloc_array_clear_or_die(void *, itemcount);
1319	1317
1320	1318	/* allocate the actual items */
1321		ptrarray[0] = malloc_or_die(*itemsize * itemcount);
1322		memset(ptrarray[0], 0, *itemsize * itemcount);
	1319	ptrarray[0] = alloc_array_clear_or_die(UINT8, *itemsize * itemcount);
1323	1320
1324	1321	/* initialize the pointer array */
1325	1322	for (itemnum = 1; itemnum < itemcount; itemnum++)

src/emu/video/mc6845.c

r4679	r4680
885	885	}
886	886
887	887
888		static DEVICE_SET_INFO( mc6845 )
889		{
890		switch (state)
891		{
892		/* no parameters to set */
893		}
894		}
895
896
897	888	DEVICE_GET_INFO( mc6845 )
898	889	{
899	890	switch (state)
r4679	r4680
904	895	case DEVINFO_INT_CLASS:                     info->i = DEVICE_CLASS_PERIPHERAL;         break;
905	896
906	897	/* --- the following bits of info are returned as pointers to functions --- */
907		case DEVINFO_FCT_SET_INFO:                  info->set_info = DEVICE_SET_INFO_NAME(mc6845); break;
908	898	case DEVINFO_FCT_START:                     info->start = DEVICE_START_NAME(mc6845);   break;
909	899	case DEVINFO_FCT_STOP:                     /* Nothing */                        break;
910	900	case DEVINFO_FCT_RESET:                     info->reset = DEVICE_RESET_NAME(mc6845);   break;

src/emu/video/s2636.h

r4679	r4680
14	14	#define S2636_IS_PIXEL_DRAWN(p)      (((p) & 0x08) ? TRUE : FALSE)
15	15	#define S2636_PIXEL_COLOR(p)      ((p) & 0x07)
16	16
17		s2636_t *s2636_config(UINT8 *work_ram, int screen_height, int screen_width, int y_offset, int x_offset);
	17	s2636_t *s2636_config(running_machine *machine, UINT8 *work_ram, int screen_height, int screen_width, int y_offset, int x_offset);
18	18
19	19	/* returns a BITMAP_FORMAT_INDEXED16 bitmap the size of the screen
20	20	D0-D2 of each pixel is the pixel color

src/emu/tilemap.c

r4679	r4680
303	303	tilemap_tailptr  = &tilemap_list;
304	304	tilemap_instance = 0;
305	305
306		priority_bitmap = auto_bitmap_alloc(screen_width, screen_height, BITMAP_FORMAT_INDEXED8);
	306	priority_bitmap = auto_bitmap_alloc(machine, screen_width, screen_height, BITMAP_FORMAT_INDEXED8);
307	307	add_exit_callback(machine, tilemap_exit);
308	308	}
309	309	}
r4679	r4680
324	324	int group;
325	325
326	326	/* allocate the tilemap itself */
327		tmap = (tilemap *)malloc_or_die(sizeof(*tmap));
328		memset(tmap, 0, sizeof(*tmap));
	327	tmap = alloc_clear_or_die(tilemap);
329	328
330	329	/* fill in the basic metrics */
331	330	tmap->machine = machine;
r4679	r4680
354	353	/* initialize scroll information */
355	354	tmap->scrollrows = 1;
356	355	tmap->scrollcols = 1;
357		tmap->rowscroll = (INT32 *)malloc_or_die(tmap->height * sizeof(*tmap->rowscroll));
358		memset(tmap->rowscroll, 0, tmap->height * sizeof(*tmap->rowscroll));
359		tmap->colscroll = (INT32 *)malloc_or_die(tmap->width * sizeof(*tmap->colscroll));
360		memset(tmap->colscroll, 0, tmap->width * sizeof(*tmap->colscroll));
	356	tmap->rowscroll = alloc_array_clear_or_die(INT32, tmap->height);
	357	tmap->colscroll = alloc_array_clear_or_die(INT32, tmap->width);
361	358
362	359	/* allocate the pixel data cache */
363	360	tmap->pixmap = bitmap_alloc(tmap->width, tmap->height, BITMAP_FORMAT_INDEXED16);
364	361
365	362	/* allocate transparency mapping data */
366		tmap->tileflags = (UINT8 *)malloc_or_die(tmap->max_logical_index);
	363	tmap->tileflags = alloc_array_or_die(UINT8, tmap->max_logical_index);
367	364	tmap->flagsmap = bitmap_alloc(tmap->width, tmap->height, BITMAP_FORMAT_INDEXED8);
368		tmap->pen_to_flags = (UINT8 *)malloc_or_die(sizeof(tmap->pen_to_flags[0]) * MAX_PEN_TO_FLAGS * TILEMAP_NUM_GROUPS);
369		memset(tmap->pen_to_flags, 0, sizeof(tmap->pen_to_flags[0]) * MAX_PEN_TO_FLAGS * TILEMAP_NUM_GROUPS);
	365	tmap->pen_to_flags = alloc_array_clear_or_die(UINT8, MAX_PEN_TO_FLAGS * TILEMAP_NUM_GROUPS);
370	366	for (group = 0; group < TILEMAP_NUM_GROUPS; group++)
371	367	tilemap_map_pens_to_layer(tmap, group, 0, 0, TILEMAP_PIXEL_LAYER0);
372	368
r4679	r4680
1157	1153	tmap->max_memory_index++;
1158	1154
1159	1155	/* allocate the necessary mappings */
1160		tmap->memory_to_logical = (tilemap_logical_index *)malloc_or_die(tmap->max_memory_index * sizeof(*tmap->memory_to_logical));
1161		tmap->logical_to_memory = (tilemap_memory_index *)malloc_or_die(tmap->max_logical_index * sizeof(*tmap->logical_to_memory));
	1156	tmap->memory_to_logical = alloc_array_or_die(tilemap_logical_index, tmap->max_memory_index);
	1157	tmap->logical_to_memory = alloc_array_or_die(tilemap_memory_index, tmap->max_logical_index);
1162	1158
1163	1159	/* update the mappings */
1164	1160	mappings_update(tmap);

src/emu/uiinput.c

r4679	r4680
76	76	void ui_input_init(running_machine *machine)
77	77	{
78	78	/* create the private data */
79		machine->ui_input_data = (ui_input_private *)auto_malloc(sizeof(*machine->ui_input_data));
80		memset(machine->ui_input_data, 0, sizeof(*machine->ui_input_data));
	79	machine->ui_input_data = auto_alloc_clear(machine, ui_input_private);
81	80	machine->ui_input_data->current_mouse_x = -1;
82	81	machine->ui_input_data->current_mouse_y = -1;
83	82

src/emu/uimenu.c

r4679	r4680
448	448	ui_menu *menu;
449	449
450	450	/* allocate and clear memory for the menu and the state */
451		menu = (ui_menu *)malloc_or_die(sizeof(*menu));
452		memset(menu, 0, sizeof(*menu));
	451	menu = alloc_clear_or_die(ui_menu);
453	452
454	453	/* initialize the state */
455	454	menu->machine = machine;
r4679	r4680
652	651	(*menu->destroy_state)(menu, menu->state);
653	652	free(menu->state);
654	653	}
655		menu->state = malloc_or_die(size);
	654	menu->state = alloc_array_clear_or_die(UINT8, size);
656	655	menu->destroy_state = destroy_state;
657		memset(menu->state, 0, size);
658	656
659	657	return menu->state;
660	658	}
r4679	r4680
681	679	}
682	680
683	681	/* allocate a new pool */
684		pool = (ui_menu_pool *)malloc_or_die(sizeof(*pool) + UI_MENU_POOL_SIZE);
685		memset(pool, 0, sizeof(*pool));
	682	pool = (ui_menu_pool *)alloc_array_clear_or_die(UINT8, sizeof(*pool) + UI_MENU_POOL_SIZE);
686	683
687	684	/* wire it up */
688	685	pool->next = menu->pool;
r4679	r4680
1514	1511
1515	1512	/* add crosshair options menu */
1516	1513	if (crosshair_get_usage(machine))
1517		ui_menu_item_append(menu, "Crosshair Options", NULL, 0, menu_crosshair);
	1514	ui_menu_item_append(menu, "Crosshair Options", NULL, 0, (void *)menu_crosshair);
1518	1515
1519	1516	/* add cheat menu */
1520	1517	if (options_get_bool(mame_options(), OPTION_CHEAT) && cheat_get_next_menu_entry(machine, NULL, NULL, NULL, NULL) != NULL)
r4679	r4680
3080	3077	if (event != NULL && event->itemref != NULL)
3081	3078	{
3082	3079	crosshair_user_settings settings;
3083		crosshair_item_data *data = event->itemref;
	3080	crosshair_item_data *data = (crosshair_item_data *)event->itemref;
3084	3081	int changed = FALSE;
3085	3082	int set_def = FALSE;
3086	3083	int newval = data->cur;
r4679	r4680
3196	3193	if (settings.mode == CROSSHAIR_VISIBILITY_AUTO) use_auto = TRUE;
3197	3194
3198	3195	/* CROSSHAIR_ITEM_VIS - allocate a data item and fill it */
3199		data = ui_menu_pool_alloc(menu, sizeof(*data));
	3196	data = (crosshair_item_data *)ui_menu_pool_alloc(menu, sizeof(*data));
3200	3197	data->type = CROSSHAIR_ITEM_VIS;
3201	3198	data->player = player;
3202	3199	data->min = CROSSHAIR_VISIBILITY_OFF;
r4679	r4680
3215	3212	ui_menu_item_append(menu, temp_text, vis_text[settings.mode], flags, data);
3216	3213
3217	3214	/* CROSSHAIR_ITEM_PIC - allocate a data item and fill it */
3218		data = ui_menu_pool_alloc(menu, sizeof(*data));
	3215	data = (crosshair_item_data *)ui_menu_pool_alloc(menu, sizeof(*data));
3219	3216	data->type = CROSSHAIR_ITEM_PIC;
3220	3217	data->player = player;
3221	3218	data->last_name[0] = 0;
r4679	r4680
3302	3299	crosshair_get_user_settings(machine, 0, &settings);
3303	3300
3304	3301	/* CROSSHAIR_ITEM_AUTO_TIME - allocate a data item and fill it */
3305		data = ui_menu_pool_alloc(menu, sizeof(*data));
	3302	data = (crosshair_item_data *)ui_menu_pool_alloc(menu, sizeof(*data));
3306	3303	data->type = CROSSHAIR_ITEM_AUTO_TIME;
3307	3304	data->min = CROSSHAIR_VISIBILITY_AUTOTIME_MIN;
3308	3305	data->max = CROSSHAIR_VISIBILITY_AUTOTIME_MAX;

src/emu/audit.c

r4679	r4680
88	88	if (records > 0)
89	89	{
90	90	/* allocate memory for the records */
91		*audit = (audit_record *)malloc_or_die(sizeof(**audit) * records);
92		memset(*audit, 0, sizeof(**audit) * records);
	91	*audit = alloc_array_clear_or_die(audit_record, records);
93	92	record = *audit;
94	93
95	94	/* iterate over ROM sources and regions */
r4679	r4680
174	173	goto skip;
175	174
176	175	/* allocate memory for the records */
177		*audit = (audit_record *)malloc_or_die(sizeof(**audit) * records);
178		memset(*audit, 0, sizeof(**audit) * records);
	176	*audit = alloc_array_clear_or_die(audit_record, records);
179	177	record = *audit;
180	178
181	179	/* now iterate over sample entries */

src/emu/video.c

r4679	r4680
434	434	assert_always(spriteram_size != 0, "Video buffers spriteram but spriteram_size is 0");
435	435
436	436	/* allocate memory for the back buffer */
437		buffered_spriteram = (UINT8 *)auto_malloc(spriteram_size);
	437	buffered_spriteram = auto_alloc_array(machine, UINT8, spriteram_size);
438	438
439	439	/* register for saving it */
440	440	state_save_register_global_pointer(machine, buffered_spriteram, spriteram_size);
r4679	r4680
443	443	if (spriteram_2_size)
444	444	{
445	445	/* allocate memory */
446		buffered_spriteram_2 = (UINT8 *)auto_malloc(spriteram_2_size);
	446	buffered_spriteram_2 = auto_alloc_array(machine, UINT8, spriteram_2_size);
447	447
448	448	/* register for saving it */
449	449	state_save_register_global_pointer(machine, buffered_spriteram_2, spriteram_2_size);
r4679	r4680
1302	1302
1303	1303
1304	1304	/*-------------------------------------------------
1305		video_screen_set_info - device set info
1306		callback
1307		-------------------------------------------------*/
1308
1309		static DEVICE_SET_INFO( video_screen )
1310		{
1311		switch (state)
1312		{
1313		/* no parameters to set */
1314		}
1315		}
1316
1317
1318		/*-------------------------------------------------
1319	1305	video_screen_get_info - device get info
1320	1306	callback
1321	1307	-------------------------------------------------*/
r4679	r4680
1330	1316	case DEVINFO_INT_CLASS:               info->i = DEVICE_CLASS_VIDEO;         break;
1331	1317
1332	1318	/* --- the following bits of info are returned as pointers to data or functions --- */
1333		case DEVINFO_FCT_SET_INFO:            info->set_info = DEVICE_SET_INFO_NAME(video_screen); break;
1334	1319	case DEVINFO_FCT_START:               info->start = DEVICE_START_NAME(video_screen); break;
1335	1320	case DEVINFO_FCT_STOP:               info->stop = DEVICE_STOP_NAME(video_screen); break;
1336	1321	case DEVINFO_FCT_RESET:               /* Nothing */                     break;

src/emu/memory.c

r4679	r4680
441	441	return;
442	442
443	443	/* allocate a new entry and fill it */
444		(*refptr) = (bank_reference *)malloc_or_die(sizeof(**refptr));
	444	(*refptr) = alloc_or_die(bank_reference);
445	445	(*refptr)->next = NULL;
446	446	(*refptr)->space = space;
447	447	}
r4679	r4680
712	712	add_exit_callback(machine, memory_exit);
713	713
714	714	/* allocate our private data */
715		memdata = machine->memory_data = (memory_private *)auto_malloc(sizeof(*machine->memory_data));
716		memset(memdata, 0, sizeof(*memdata));
	715	memdata = machine->memory_data = auto_alloc_clear(machine, memory_private);
717	716
718	717	/* build up the cpudata array with info about all CPUs and address spaces */
719	718	memory_init_spaces(machine);
r4679	r4680
769	768	const addrmap_token *internal_map;
770	769	address_map *map;
771	770
772		map = (address_map *)malloc_or_die(sizeof(*map));
773		memset(map, 0, sizeof(*map));
	771	map = alloc_clear_or_die(address_map);
774	772
775	773	/* append the internal CPU map (first so it takes priority) */
776	774	internal_map = (const addrmap_token *)device_get_info_ptr(device, CPUINFO_PTR_INTERNAL_MEMORY_MAP + spacenum);
r4679	r4680
1494	1492	int spacenum;
1495	1493
1496	1494	/* create a global watchpoint-filled table */
1497		memdata->wptable = (UINT8 *)auto_malloc(1 << LEVEL1_BITS);
	1495	memdata->wptable = auto_alloc_array(machine, UINT8, 1 << LEVEL1_BITS);
1498	1496	memset(memdata->wptable, STATIC_WATCHPOINT, 1 << LEVEL1_BITS);
1499	1497
1500	1498	/* loop over CPUs */
r4679	r4680
1502	1500	for (spacenum = 0; spacenum < ADDRESS_SPACES; spacenum++)
1503	1501	if (cpu_get_addrbus_width(device, spacenum) > 0)
1504	1502	{
1505		address_space *space = (address_space *)malloc_or_die(sizeof(*space));
	1503	address_space *space = alloc_clear_or_die(address_space);
1506	1504	int logbits = cpu_get_logaddr_width(device, spacenum);
1507	1505	int ashift = cpu_get_addrbus_shift(device, spacenum);
1508	1506	int abits = cpu_get_addrbus_width(device, spacenum);
r4679	r4680
1516	1514	logbits = abits;
1517	1515
1518	1516	/* determine the address and data bits */
1519		memset(space, 0, sizeof(*space));
1520	1517	space->machine = machine;
1521	1518	space->cpu = device;
1522	1519	space->name = address_space_names[spacenum];
r4679	r4680
1536	1533	space->log_unmap = TRUE;
1537	1534
1538	1535	/* allocate subtable information; we malloc this manually because it will be realloc'ed */
1539		space->read.subtable = (subtable_data *)auto_malloc(sizeof(*space->read.subtable) * SUBTABLE_COUNT);
1540		memset(space->read.subtable, 0, sizeof(*space->read.subtable) * SUBTABLE_COUNT);
1541		space->write.subtable = (subtable_data *)auto_malloc(sizeof(*space->write.subtable) * SUBTABLE_COUNT);
1542		memset(space->write.subtable, 0, sizeof(*space->write.subtable) * SUBTABLE_COUNT);
	1536	space->read.subtable = auto_alloc_array_clear(machine, subtable_data, SUBTABLE_COUNT);
	1537	space->write.subtable = auto_alloc_array_clear(machine, subtable_data, SUBTABLE_COUNT);
1543	1538
1544	1539	/* allocate the handler table */
1545		space->read.handlers[0] = (handler_data *)auto_malloc(sizeof(*space->read.handlers[0]) * ARRAY_LENGTH(space->read.handlers));
1546		memset(space->read.handlers[0], 0, sizeof(*space->read.handlers[0]) * ARRAY_LENGTH(space->read.handlers));
1547		space->write.handlers[0] = (handler_data *)auto_malloc(sizeof(*space->write.handlers[0]) * ARRAY_LENGTH(space->write.handlers));
1548		memset(space->write.handlers[0], 0, sizeof(*space->write.handlers[0]) * ARRAY_LENGTH(space->write.handlers));
	1540	space->read.handlers[0] = auto_alloc_array_clear(machine, handler_data, ARRAY_LENGTH(space->read.handlers));
	1541	space->write.handlers[0] = auto_alloc_array_clear(machine, handler_data, ARRAY_LENGTH(space->write.handlers));
1549	1542	for (entrynum = 1; entrynum < ARRAY_LENGTH(space->read.handlers); entrynum++)
1550	1543	{
1551	1544	space->read.handlers[entrynum] = space->read.handlers[0] + entrynum;
r4679	r4680
1568	1561	space->write.handlers[STATIC_WATCHPOINT]->bytemask = ~0;
1569	1562
1570	1563	/* allocate memory; these aren't auto-malloc'ed as we need to expand them */
1571		space->read.table = (UINT8 *)malloc_or_die(1 << LEVEL1_BITS);
1572		space->write.table = (UINT8 *)malloc_or_die(1 << LEVEL1_BITS);
	1564	space->read.table = alloc_array_or_die(UINT8, 1 << LEVEL1_BITS);
	1565	space->write.table = alloc_array_or_die(UINT8, 1 << LEVEL1_BITS);
1573	1566
1574	1567	/* initialize everything to unmapped */
1575	1568	memset(space->read.table, STATIC_UNMAP, 1 << LEVEL1_BITS);
r4679	r4680
2059	2052
2060	2053	/* start a new range */
2061	2054	case ADDRMAP_TOKEN_RANGE:
2062		entry = *entryptr = (address_map_entry *)malloc_or_die(sizeof(**entryptr));
	2055	entry = *entryptr = alloc_clear_or_die(address_map_entry);
2063	2056	entryptr = &entry->next;
2064		memset(entry, 0, sizeof(*entry));
2065	2057	TOKEN_GET_UINT64_UNPACK2(tokens, entry->addrstart, 32, entry->addrend, 32);
2066	2058	break;
2067	2059
r4679	r4680
3030	3022	if (range != NULL)
3031	3023	space->direct.freerangelist = range->next;
3032	3024	else
3033		range = (direct_range *)malloc_or_die(sizeof(*range));
	3025	range = alloc_or_die(direct_range);
3034	3026
3035	3027	/* fill in the range */
3036	3028	table_derive_range(&space->read, byteaddress, &range->bytestart, &range->byteend);
r4679	r4680
3102	3094	bytestoalloc += byteend - bytestart + 1;
3103	3095
3104	3096	/* allocate and clear the memory */
3105		block = (memory_block *)malloc_or_die(bytestoalloc);
3106		memset(block, 0, bytestoalloc);
	3097	block = (memory_block *)alloc_array_clear_or_die(UINT8, bytestoalloc);
3107	3098	if (allocatemem)
3108	3099	memory = block + 1;
3109	3100

src/emu/video.h

r4679	r4680
52	52	#define video_screen_get_format(screen)   (((screen_config *)(screen)->inline_config)->format)
53	53
54	54	/* allocates a bitmap that has the same dimensions and format as the passed in screen */
55		#define video_screen_auto_bitmap_alloc(screen)   auto_bitmap_alloc(video_screen_get_width(screen), video_screen_get_height(screen), video_screen_get_format(screen))
	55	#define video_screen_auto_bitmap_alloc(screen)   auto_bitmap_alloc(screen->machine, video_screen_get_width(screen), video_screen_get_height(screen), video_screen_get_format(screen))
56	56
57	57
58	58

src/emu/memory.h

r4679	r4680
442	442	#define SMH_ROM                     ((void *)STATIC_ROM)
443	443	#define SMH_NOP                     ((void *)STATIC_NOP)
444	444	#define SMH_UNMAP                  ((void *)STATIC_UNMAP)
445		#define SMH_BANK(n)                  ((void *)(STATIC_BANK1 + (n) - 1))
446		#define SMH_BANK1                  SMH_BANK(1)
447		#define SMH_BANK2                  SMH_BANK(2)
448		#define SMH_BANK3                  SMH_BANK(3)
449		#define SMH_BANK4                  SMH_BANK(4)
450		#define SMH_BANK5                  SMH_BANK(5)
451		#define SMH_BANK6                  SMH_BANK(6)
452		#define SMH_BANK7                  SMH_BANK(7)
453		#define SMH_BANK8                  SMH_BANK(8)
454		#define SMH_BANK9                  SMH_BANK(9)
455		#define SMH_BANK10                  SMH_BANK(10)
456		#define SMH_BANK11                  SMH_BANK(11)
457		#define SMH_BANK12                  SMH_BANK(12)
458		#define SMH_BANK13                  SMH_BANK(13)
459		#define SMH_BANK14                  SMH_BANK(14)
460		#define SMH_BANK15                  SMH_BANK(15)
461		#define SMH_BANK16                  SMH_BANK(16)
462		#define SMH_BANK17                  SMH_BANK(17)
463		#define SMH_BANK18                  SMH_BANK(18)
464		#define SMH_BANK19                  SMH_BANK(19)
465		#define SMH_BANK20                  SMH_BANK(20)
466		#define SMH_BANK21                  SMH_BANK(21)
467		#define SMH_BANK22                  SMH_BANK(22)
468		#define SMH_BANK23                  SMH_BANK(23)
469		#define SMH_BANK24                  SMH_BANK(24)
470		#define SMH_BANK25                  SMH_BANK(25)
471		#define SMH_BANK26                  SMH_BANK(26)
472		#define SMH_BANK27                  SMH_BANK(27)
473		#define SMH_BANK28                  SMH_BANK(28)
474		#define SMH_BANK29                  SMH_BANK(29)
475		#define SMH_BANK30                  SMH_BANK(30)
476		#define SMH_BANK31                  SMH_BANK(31)
477		#define SMH_BANK32                  SMH_BANK(32)
	445	#define SMH_BANK(n)                  ((void *)(FPTR)(STATIC_BANK1 + (n) - 1))
478	446
479	447
480	448	/* helper macro for merging data with the memory mask */

src/emu/restrack.c

r4679	r4680
197	197	freeing memory
198	198	-------------------------------------------------*/
199	199
200		void *auto_malloc_file_line(size_t size, const char *file, int line)
	200	void *auto_malloc_file_line(running_machine *machine, size_t size, const char *file, int line)
201	201	{
202	202	void *result = pool_malloc_file_line(current_pool(), size, file, line);
203	203	#ifdef MAME_DEBUG
r4679	r4680
212	212	freeing memory
213	213	-------------------------------------------------*/
214	214
215		void *auto_realloc_file_line(void *ptr, size_t size, const char *file, int line)
	215	void *auto_realloc_file_line(running_machine *machine, void *ptr, size_t size, const char *file, int line)
216	216	{
217	217	object_pool *pool = current_pool();
218	218	if (ptr != NULL)
r4679	r4680
236	236	string
237	237	-------------------------------------------------*/
238	238
239		char *auto_strdup_file_line(const char *str, const char *file, int line)
	239	char *auto_strdup_file_line(running_machine *machine, const char *str, const char *file, int line)
240	240	{
241	241	return pool_strdup_file_line(current_pool(), str, file, line);
242	242	}
r4679	r4680
247	247	auto-freeing string if str is null
248	248	-------------------------------------------------*/
249	249
250		char *auto_strdup_allow_null_file_line(const char *str, const char *file, int line)
	250	char *auto_strdup_allow_null_file_line(running_machine *machine, const char *str, const char *file, int line)
251	251	{
252		return (str != NULL) ? auto_strdup_file_line(str, file, line) : NULL;
	252	return (str != NULL) ? auto_strdup_file_line(machine, str, file, line) : NULL;
253	253	}
254	254
255	255
r4679	r4680
258	258	auto-freeing astring
259	259	-------------------------------------------------*/
260	260
261		astring *auto_astring_alloc_file_line(const char *file, int line)
	261	astring *auto_astring_alloc_file_line(running_machine *machine, const char *file, int line)
262	262	{
263	263	return (astring *)restrack_register_object(OBJTYPE_ASTRING, astring_alloc(), 0, file, line);
264	264	}
r4679	r4680
269	269	auto-freeing bitmap
270	270	-------------------------------------------------*/
271	271
272		bitmap_t *auto_bitmap_alloc_file_line(int width, int height, bitmap_format format, const char *file, int line)
	272	bitmap_t *auto_bitmap_alloc_file_line(running_machine *machine, int width, int height, bitmap_format format, const char *file, int line)
273	273	{
274	274	return (bitmap_t *)restrack_register_object(OBJTYPE_BITMAP, bitmap_alloc(width, height, format), width * height, file, line);
275	275	}

src/emu/mame.c

r4679	r4680
458	458	assert_always(mame_get_phase(machine) == MAME_PHASE_INIT, "Can only call add_frame_callback at init time!");
459	459
460	460	/* allocate memory */
461		cb = (callback_item *)malloc_or_die(sizeof(*cb));
	461	cb = alloc_or_die(callback_item);
462	462
463	463	/* add us to the end of the list */
464	464	cb->func.frame = callback;
r4679	r4680
481	481	assert_always(mame_get_phase(machine) == MAME_PHASE_INIT, "Can only call add_reset_callback at init time!");
482	482
483	483	/* allocate memory */
484		cb = (callback_item *)malloc_or_die(sizeof(*cb));
	484	cb = alloc_or_die(callback_item);
485	485
486	486	/* add us to the end of the list */
487	487	cb->func.reset = callback;
r4679	r4680
504	504	assert_always(mame_get_phase(machine) == MAME_PHASE_INIT, "Can only call add_pause_callback at init time!");
505	505
506	506	/* allocate memory */
507		cb = (callback_item *)malloc_or_die(sizeof(*cb));
	507	cb = alloc_or_die(callback_item);
508	508
509	509	/* add us to the end of the list */
510	510	cb->func.pause = callback;
r4679	r4680
527	527	assert_always(mame_get_phase(machine) == MAME_PHASE_INIT, "Can only call add_exit_callback at init time!");
528	528
529	529	/* allocate memory */
530		cb = (callback_item *)malloc_or_die(sizeof(*cb));
	530	cb = alloc_or_die(callback_item);
531	531
532	532	/* add us to the head of the list */
533	533	cb->func.exit = callback;
r4679	r4680
782	782	fatalerror("memory_region_alloc called with duplicate region name \"%s\"\n", name);
783	783
784	784	/* allocate the region */
785		info = (region_info *)malloc_or_die(sizeof(*info) + length);
	785	info = (region_info *)alloc_array_or_die(UINT8, sizeof(*info) + length);
786	786	info->next = NULL;
787	787	info->name = astring_dupc(name);
788	788	info->length = length;
r4679	r4680
1247	1247
1248	1248	assert_always(mame_get_phase(machine) == MAME_PHASE_INIT, "Can only call add_logerror_callback at init time!");
1249	1249
1250		cb = (callback_item *)auto_malloc(sizeof(*cb));
	1250	cb = auto_alloc(machine, callback_item);
1251	1251	cb->func.log = callback;
1252	1252	cb->next = NULL;
1253	1253

src/emu/inptport.c

r4679	r4680
630	630	time_t basetime;
631	631
632	632	/* allocate memory for our data structure */
633		machine->input_port_data = (input_port_private *)auto_malloc(sizeof(*machine->input_port_data));
634		memset(machine->input_port_data, 0, sizeof(*machine->input_port_data));
	633	machine->input_port_data = auto_alloc_clear(machine, input_port_private);
635	634	portdata = machine->input_port_data;
636	635
637	636	/* add an exit callback and a frame callback */
r4679	r4680
1506	1505	for (typenum = 0; typenum < ARRAY_LENGTH(core_types); typenum++)
1507	1506	{
1508	1507	/* allocate memory for the state and link it to the end of the list */
1509		*stateptr = (input_type_state *)auto_malloc(sizeof(**stateptr));
1510		memset(*stateptr, 0, sizeof(**stateptr));
	1508	*stateptr = auto_alloc_clear(machine, input_type_state);
1511	1509
1512	1510	/* copy the type description and link the previous description to it */
1513	1511	(*stateptr)->typedesc = core_types[typenum];
r4679	r4680
1556	1554	input_port_state *portstate;
1557	1555
1558	1556	/* allocate a new input_port_info structure */
1559		portstate = (input_port_state *)auto_malloc(sizeof(*portstate));
1560		memset(portstate, 0, sizeof(*portstate));
	1557	portstate = auto_alloc_clear(machine, input_port_state);
1561	1558	((input_port_config *)port)->state = portstate;
1562	1559	((input_port_config *)port)->machine = machine;
1563	1560
r4679	r4680
1573	1570	int seqtype;
1574	1571
1575	1572	/* allocate a new input_field_info structure */
1576		fieldstate = (input_field_state *)auto_malloc(sizeof(*fieldstate));
1577		memset(fieldstate, 0, sizeof(*fieldstate));
	1573	fieldstate = auto_alloc_clear(machine, input_field_state);
1578	1574	((input_field_config *)field)->state = fieldstate;
1579	1575
1580	1576	/* fill in the basic values */
r4679	r4680
1619	1615	astring *name = mess_get_keyboard_key_name(field);
1620	1616	if (name != NULL)
1621	1617	{
1622		field->state->name = auto_strdup(astring_c(name));
	1618	field->state->name = auto_strdup(machine, astring_c(name));
1623	1619	astring_free(name);
1624	1620	}
1625	1621	}
r4679	r4680
1720	1716	input_port_value mask;
1721	1717
1722	1718	/* allocate memory */
1723		info = (callback_field_info *)auto_malloc(sizeof(*info));
1724		memset(info, 0, sizeof(*info));
	1719	info = auto_alloc_clear(field->port->machine, callback_field_info);
1725	1720
1726	1721	/* fill in the data */
1727	1722	info->field = field;
r4679	r4680
1743	1738	input_port_value mask;
1744	1739
1745	1740	/* allocate memory */
1746		state = (analog_field_state *)auto_malloc(sizeof(*state));
1747		memset(state, 0, sizeof(*state));
	1741	state = auto_alloc_clear(field->port->machine, analog_field_state);
1748	1742
1749	1743	/* compute the shift amount and number of bits */
1750	1744	for (mask = field->mask; !(mask & 1); mask >>= 1)
r4679	r4680
2958	2952	input_port_config *config;
2959	2953
2960	2954	/* allocate memory */
2961		config = (input_port_config *)malloc_or_die(sizeof(*config));
2962		memset(config, 0, sizeof(*config));
	2955	config = alloc_clear_or_die(input_port_config);
2963	2956
2964	2957	/* add it to the tail */
2965	2958	for (tailptr = listhead; *tailptr != NULL; tailptr = &(*tailptr)->next) ;
r4679	r4680
3020	3013	int seqtype;
3021	3014
3022	3015	/* allocate memory */
3023		config = (input_field_config *)malloc_or_die(sizeof(*config));
3024		memset(config, 0, sizeof(*config));
	3016	config = alloc_clear_or_die(input_field_config);
3025	3017
3026	3018	/* fill in the basic field values */
3027	3019	config->port = port;
r4679	r4680
3128	3120	input_setting_config *config;
3129	3121
3130	3122	/* allocate memory */
3131		config = (input_setting_config *)malloc_or_die(sizeof(*config));
3132		memset(config, 0, sizeof(*config));
	3123	config = alloc_clear_or_die(input_setting_config);
3133	3124
3134	3125	/* fill in the basic setting values */
3135	3126	config->field = field;
r4679	r4680
3188	3179	const char *comma, *colon, *number;
3189	3180
3190	3181	/* allocate a new entry */
3191		*tailptr = (input_field_diplocation *)malloc_or_die(sizeof(**tailptr));
3192		memset(*tailptr, 0, sizeof(**tailptr));
	3182	*tailptr = alloc_clear_or_die(input_field_diplocation);
3193	3183	entries++;
3194	3184
3195	3185	/* find the end of this entry */
r4679	r4680
3208	3198	/* allocate and copy the name if it is present */
3209	3199	if (colon != NULL)
3210	3200	{
3211		(*tailptr)->swname = lastname = (char *)malloc_or_die(colon - tempbuf + 1);
	3201	(*tailptr)->swname = lastname = alloc_array_or_die(char, colon - tempbuf + 1);
3212	3202	strncpy(lastname, tempbuf, colon - tempbuf);
3213	3203	lastname[colon - tempbuf] = 0;
3214	3204	number = colon + 1;
r4679	r4680
3223	3213	error_buf_append(errorbuf, errorbuflen, "Switch location '%s' missing switch name!\n", location);
3224	3214	lastname = (char *)"UNK";
3225	3215	}
3226		(*tailptr)->swname = namecopy = (char *)malloc_or_die(strlen(lastname) + 1);
	3216	(*tailptr)->swname = namecopy = alloc_array_or_die(char, strlen(lastname) + 1);
3227	3217	strcpy(namecopy, lastname);
3228	3218	}
3229	3219
r4679	r4680
3455	3445	int remapnum;
3456	3446
3457	3447	/* allocate tables */
3458		oldtable = (input_code *)malloc_or_die(count * sizeof(*oldtable));
3459		newtable = (input_code *)malloc_or_die(count * sizeof(*newtable));
	3448	oldtable = alloc_array_or_die(input_code, count);
	3449	newtable = alloc_array_or_die(input_code, count);
3460	3450
3461	3451	/* build up the remap table */
3462	3452	count = 0;

src/emu/rendfont.c

r4679	r4680
141	141	render_font *font;
142	142
143	143	/* allocate and clear memory */
144		font = (render_font *)malloc_or_die(sizeof(*font));
145		memset(font, 0, sizeof(*font));
	144	font = alloc_clear_or_die(render_font);
146	145
147	146	/* attempt to load the cached version of the font first */
148	147	if (filename != NULL && render_font_load_cached_bdf(font, filename) == 0)
r4679	r4680
150	149
151	150	/* if we failed, clean up and realloc */
152	151	render_font_free(font);
153		font = (render_font *)malloc_or_die(sizeof(*font));
154		memset(font, 0, sizeof(*font));
	152	font = alloc_clear_or_die(render_font);
155	153
156	154	/* load the raw data instead */
157	155	filerr = mame_fopen_ram(font_uismall, sizeof(font_uismall), OPEN_FLAG_READ, &ramfile);
r4679	r4680
434	432
435	433	/* determine the file size and allocate memory */
436	434	font->rawsize = mame_fsize(file);
437		data = (char *)malloc_or_die(font->rawsize + 1);
	435	data = alloc_array_clear_or_die(char, font->rawsize + 1);
438	436
439	437	/* read and hash the first chunk */
440	438	bytes = mame_fread(file, data, MIN(CACHED_BDF_HASH_SIZE, font->rawsize));
r4679	r4680
583	581
584	582	/* if we don't have a subtable yet, make one */
585	583	if (font->chars[charnum / 256] == NULL)
586		{
587		font->chars[charnum / 256] = (render_font_char *)malloc_or_die(256 * sizeof(font->chars[0][0]));
588		memset(font->chars[charnum / 256], 0, 256 * sizeof(font->chars[0][0]));
589		}
	584	font->chars[charnum / 256] = alloc_array_clear_or_die(render_font_char, 256);
590	585
591	586	/* fill in the entry */
592	587	ch = &font->chars[charnum / 256][charnum % 256];
r4679	r4680
642	637	goto error;
643	638
644	639	/* now read the rest of the data */
645		data = (UINT8 *)malloc_or_die(filesize - CACHED_HEADER_SIZE);
	640	data = alloc_array_or_die(UINT8, filesize - CACHED_HEADER_SIZE);
646	641	bytes_read = mame_fread(file, data, filesize - CACHED_HEADER_SIZE);
647	642	if (bytes_read != filesize - CACHED_HEADER_SIZE)
648	643	goto error;
r4679	r4680
657	652
658	653	/* if we don't have a subtable yet, make one */
659	654	if (font->chars[chnum / 256] == NULL)
660		{
661		font->chars[chnum / 256] = (render_font_char *)malloc_or_die(256 * sizeof(font->chars[0][0]));
662		memset(font->chars[chnum / 256], 0, 256 * sizeof(font->chars[0][0]));
663		}
	655	font->chars[chnum / 256] = alloc_array_clear_or_die(render_font_char, 256);
664	656
665	657	/* fill in the entry */
666	658	ch = &font->chars[chnum / 256][chnum % 256];
r4679	r4680
728	720	}
729	721
730	722	/* allocate an array to hold the character data */
731		chartable = (UINT8 *)malloc_or_die(numchars * CACHED_CHAR_SIZE);
732		memset(chartable, 0, numchars * CACHED_CHAR_SIZE);
	723	chartable = alloc_array_clear_or_die(UINT8, numchars * CACHED_CHAR_SIZE);
733	724
734	725	/* allocate a temp buffer to compress into */
735		tempbuffer = (UINT8 *)malloc_or_die(65536);
	726	tempbuffer = alloc_array_or_die(UINT8, 65536);
736	727
737	728	/* write the header */
738	729	dest = tempbuffer;

src/emu/devintrf.c

r4679	r4680
111	111	configlen = (UINT32)devtype_get_info_int(type, DEVINFO_INT_INLINE_CONFIG_BYTES);
112	112
113	113	/* allocate a new device */
114		device = (device_config *)malloc_or_die(sizeof(*device) + strlen(tag) + configlen);
	114	device = (device_config *)alloc_array_or_die(UINT8, sizeof(*device) + strlen(tag) + configlen);
115	115
116	116	/* populate device relationships */
117	117	device->next = NULL;
r4679	r4680
122	122	/* populate device properties */
123	123	device->type = type;
124	124	device->devclass = (device_class)(INT32)devtype_get_info_int(type, DEVINFO_INT_CLASS);
125		device->set_info = (device_set_info_func)devtype_get_info_fct(type, DEVINFO_FCT_SET_INFO);
126	125	device->execute = NULL;
127	126
128	127	/* populate device configuration */
r4679	r4680
555	554	fatalerror("Device %s specifies a 0 token length!\n", device_get_name(device));
556	555
557	556	/* allocate memory for the token */
558		device->token = malloc_or_die(device->tokenbytes);
559		memset(device->token, 0, device->tokenbytes);
	557	device->token = alloc_array_clear_or_die(UINT8, device->tokenbytes);
560	558
561	559	/* fill in the remaining runtime fields */
562	560	device->execute = (device_execute_func)device_get_info_fct(device, DEVINFO_FCT_EXECUTE);
r4679	r4680
856	854
857	855
858	856	/***************************************************************************
859		DEVICE INFORMATION SETTERS
	857	DEFAULT HANDLERS
860	858	***************************************************************************/
861	859
862	860	/*-------------------------------------------------
863		device_set_info_int - set an integer state
864		value for an allocated device
865		-------------------------------------------------*/
866
867		void device_set_info_int(const device_config *device, UINT32 state, INT64 data)
868		{
869		deviceinfo info;
870
871		assert(device != NULL);
872		assert(device->token != NULL);
873		assert(device->type != NULL);
874		assert(state >= DEVINFO_INT_FIRST && state <= DEVINFO_INT_LAST);
875
876		/* set the value */
877		info.i = data;
878		(*device->set_info)(device, state, &info);
879		}
880
881
882		/*-------------------------------------------------
883		device_set_info_ptr - set a pointer state
884		value for an allocated device
885		-------------------------------------------------*/
886
887		void device_set_info_ptr(const device_config *device, UINT32 state, void *data)
888		{
889		deviceinfo info;
890
891		assert(device != NULL);
892		assert(device->token != NULL);
893		assert(device->type != NULL);
894		assert(state >= DEVINFO_PTR_FIRST && state <= DEVINFO_PTR_LAST);
895
896		/* set the value */
897		info.p = data;
898		(*device->set_info)(device, state, &info);
899		}
900
901
902		/*-------------------------------------------------
903		device_set_info_fct - set a function pointer
904		state value for an allocated device
905		-------------------------------------------------*/
906
907		void device_set_info_fct(const device_config *device, UINT32 state, genf *data)
908		{
909		deviceinfo info;
910
911		assert(device != NULL);
912		assert(device->token != NULL);
913		assert(device->type != NULL);
914		assert(state >= DEVINFO_FCT_FIRST && state <= DEVINFO_FCT_LAST);
915
916		/* set the value */
917		info.f = data;
918		(*device->set_info)(device, state, &info);
919		}
920
921
922
923		/***************************************************************************
924		DEVICE INFORMATION SETTERS
925		***************************************************************************/
926
927		/*-------------------------------------------------
928	861	set_default_string - compute a default string
929	862	if none is provided
930	863	-------------------------------------------------*/

src/emu/machine/timekpr.c

r4679	r4680
308	308	c->month = make_bcd( systime.local_time.month + 1 );
309	309	c->year = make_bcd( systime.local_time.year % 100 );
310	310	c->century = make_bcd( systime.local_time.year / 100 );
311		c->data = (UINT8 *)auto_malloc( c->size );
	311	c->data = auto_alloc_array( device->machine, UINT8, c->size );
312	312
313	313	c->default_data = device->region;
314	314	if (c->default_data != NULL)
r4679	r4680
447	447	}
448	448
449	449	/*-------------------------------------------------
450		device set info callback
451		-------------------------------------------------*/
452
453		static DEVICE_SET_INFO(timekeeper)
454		{
455		switch (state)
456		{
457		/* no parameters to set */
458		}
459		}
460
461		/*-------------------------------------------------
462	450	device get info callback
463	451	-------------------------------------------------*/
464	452
r4679	r4680
472	460	case DEVINFO_INT_CLASS:               info->i = DEVICE_CLASS_PERIPHERAL; break;
473	461
474	462	/* --- the following bits of info are returned as pointers to data or functions --- */
475		case DEVINFO_FCT_SET_INFO:            info->set_info = DEVICE_SET_INFO_NAME(timekeeper); break;
476	463	case DEVINFO_FCT_START:               info->start = DEVICE_START_NAME(timekeeper); break;
477	464	case DEVINFO_FCT_STOP:               /* nothing */ break;
478	465	case DEVINFO_FCT_RESET:               info->reset = DEVICE_RESET_NAME(timekeeper); break;

src/emu/machine/x76f100.c

r4679	r4680
84	84
85	85	if( data == NULL )
86	86	{
87		data = (UINT8 *)auto_malloc(
	87	data = auto_alloc_array( machine, UINT8,
88	88	SIZE_RESPONSE_TO_RESET +
89	89	SIZE_READ_PASSWORD +
90	90	SIZE_WRITE_PASSWORD +

src/emu/machine/6526cia.c

r4679	r4680
861	861
862	862
863	863	/*-------------------------------------------------
864		DEVICE_SET_INFO( cia6526 )
865		-------------------------------------------------*/
866
867		static DEVICE_SET_INFO( cia6526 )
868		{
869		switch (state)
870		{
871		/* no parameters to set */
872		}
873		}
874
875
876		/*-------------------------------------------------
877	864	DEVICE_GET_INFO( cia6526r1 )
878	865	-------------------------------------------------*/
879	866
r4679	r4680
887	874	case DEVINFO_INT_CLASS:                     info->i = DEVICE_CLASS_PERIPHERAL;         break;
888	875
889	876	/* --- the following bits of info are returned as pointers to data or functions --- */
890		case DEVINFO_FCT_SET_INFO:                  info->set_info = DEVICE_SET_INFO_NAME(cia6526); break;
891	877	case DEVINFO_FCT_START:                     info->start = DEVICE_START_NAME(cia);      break;
892	878	case DEVINFO_FCT_STOP:                     /* Nothing */                        break;
893	879	case DEVINFO_FCT_RESET:                     info->reset = DEVICE_RESET_NAME(cia);      break;

src/emu/machine/74123.c

r4679	r4680
217	217	}
218	218
219	219
220		static DEVICE_SET_INFO( ttl74123 )
221		{
222		switch (state)
223		{
224		/* no parameters to set */
225		}
226		}
227
228
229	220	DEVICE_GET_INFO( ttl74123 )
230	221	{
231	222	switch (state)
r4679	r4680
236	227	case DEVINFO_INT_CLASS:                     info->i = DEVICE_CLASS_PERIPHERAL;               break;
237	228
238	229	/* --- the following bits of info are returned as pointers to data or functions --- */
239		case DEVINFO_FCT_SET_INFO:                  info->set_info = DEVICE_SET_INFO_NAME(ttl74123);    break;
240	230	case DEVINFO_FCT_START:                     info->start = DEVICE_START_NAME(ttl74123);         break;
241	231	case DEVINFO_FCT_STOP:                     /* Nothing */                              break;
242	232	case DEVINFO_FCT_RESET:                     info->reset = DEVICE_RESET_NAME(ttl74123);         break;

src/emu/machine/idectrl.c

r4679	r4680
1880	1880
1881	1881
1882	1882	/*-------------------------------------------------
1883		device set info callback
1884		-------------------------------------------------*/
1885
1886		static DEVICE_SET_INFO( ide_controller )
1887		{
1888		switch (state)
1889		{
1890		/* no parameters to set */
1891		}
1892		}
1893
1894
1895		/*-------------------------------------------------
1896	1883	device get info callback
1897	1884	-------------------------------------------------*/
1898	1885
r4679	r4680
1906	1893	case DEVINFO_INT_CLASS:               info->i = DEVICE_CLASS_PERIPHERAL;      break;
1907	1894
1908	1895	/* --- the following bits of info are returned as pointers to data or functions --- */
1909		case DEVINFO_FCT_SET_INFO:            info->set_info = DEVICE_SET_INFO_NAME(ide_controller); break;
1910	1896	case DEVINFO_FCT_START:               info->start = DEVICE_START_NAME(ide_controller); break;
1911	1897	case DEVINFO_FCT_STOP:               info->stop = DEVICE_STOP_NAME(ide_controller); break;
1912	1898	case DEVINFO_FCT_RESET:               info->reset = DEVICE_RESET_NAME(ide_controller);break;

src/emu/machine/6821pia.c

r4679	r4680
1319	1319
1320	1320
1321	1321	/*-------------------------------------------------
1322		DEVICE_SET_INFO( pia )
1323		-------------------------------------------------*/
1324
1325		static DEVICE_SET_INFO( pia )
1326		{
1327		switch(state)
1328		{
1329		}
1330		}
1331
1332
1333		/*-------------------------------------------------
1334	1322	DEVICE_GET_INFO( pia6821 )
1335	1323	-------------------------------------------------*/
1336	1324
r4679	r4680
1344	1332	case DEVINFO_INT_CLASS:                     info->i = DEVICE_CLASS_PERIPHERAL;         break;
1345	1333
1346	1334	/* --- the following bits of info are returned as pointers to data or functions --- */
1347		case DEVINFO_FCT_SET_INFO:                  info->set_info = DEVICE_SET_INFO_NAME(pia); break;
1348	1335	case DEVINFO_FCT_START:                     info->start = DEVICE_START_NAME(pia);      break;
1349	1336	case DEVINFO_FCT_STOP:                     /* Nothing */                        break;
1350	1337	case DEVINFO_FCT_RESET:                     info->reset = DEVICE_RESET_NAME(pia);      break;

src/emu/machine/68681.c

r4679	r4680
607	607	}
608	608
609	609	/*-------------------------------------------------
610		device set info callback
611		-------------------------------------------------*/
612
613		static DEVICE_SET_INFO(duart68681)
614		{
615		switch (state)
616		{
617		/* no parameters to set */
618		}
619		}
620
621		/*-------------------------------------------------
622	610	device get info callback
623	611	-------------------------------------------------*/
624	612
r4679	r4680
632	620	case DEVINFO_INT_CLASS:               info->i = DEVICE_CLASS_PERIPHERAL;      break;
633	621
634	622	/* --- the following bits of info are returned as pointers to data or functions --- */
635		case DEVINFO_FCT_SET_INFO:            info->set_info = DEVICE_SET_INFO_NAME(duart68681); break;
636	623	case DEVINFO_FCT_START:               info->start = DEVICE_START_NAME(duart68681); break;
637	624	case DEVINFO_FCT_STOP:               /* nothing */ break;
638	625	case DEVINFO_FCT_RESET:               info->reset = DEVICE_RESET_NAME(duart68681);break;

src/emu/machine/6532riot.c

r4679	r4680
491	491	}
492	492
493	493
494		static DEVICE_SET_INFO( riot6532 )
495		{
496		switch (state)
497		{
498		/* no parameters to set */
499		}
500		}
501
502
503	494	DEVICE_GET_INFO( riot6532 )
504	495	{
505	496	switch (state)
r4679	r4680
510	501	case DEVINFO_INT_CLASS:                     info->i = DEVICE_CLASS_PERIPHERAL;      break;
511	502
512	503	/* --- the following bits of info are returned as pointers to data or functions --- */
513		case DEVINFO_FCT_SET_INFO:                  info->set_info = DEVICE_SET_INFO_NAME(riot6532); break;
514	504	case DEVINFO_FCT_START:                     info->start = DEVICE_START_NAME(riot6532);break;
515	505	case DEVINFO_FCT_STOP:                     /* Nothing */                     break;
516	506	case DEVINFO_FCT_RESET:                     info->reset = DEVICE_RESET_NAME(riot6532);break;

src/emu/machine/6522via.c

r4679	r4680
1133	1133
1134	1134
1135	1135	/*-------------------------------------------------
1136		DEVICE_SET_INFO( via6522 )
1137		-------------------------------------------------*/
1138
1139		static DEVICE_SET_INFO( via6522 )
1140		{
1141		switch (state)
1142		{
1143		/* no parameters to set */
1144		}
1145		}
1146
1147
1148		/*-------------------------------------------------
1149	1136	DEVICE_GET_INFO( via6522 )
1150	1137	-------------------------------------------------*/
1151	1138
r4679	r4680
1159	1146	case DEVINFO_INT_CLASS:                     info->i = DEVICE_CLASS_PERIPHERAL;         break;
1160	1147
1161	1148	/* --- the following bits of info are returned as pointers to data or functions --- */
1162		case DEVINFO_FCT_SET_INFO:                  info->set_info = DEVICE_SET_INFO_NAME(via6522); break;
1163	1149	case DEVINFO_FCT_START:                     info->start = DEVICE_START_NAME(via6522);   break;
1164	1150	case DEVINFO_FCT_STOP:                     /* Nothing */                        break;
1165	1151	case DEVINFO_FCT_RESET:                     info->reset = DEVICE_RESET_NAME(via6522);   break;

src/emu/machine/z80dma.c

r4679	r4680
481	481	}
482	482
483	483
484		static DEVICE_SET_INFO( z80dma )
485		{
486		switch (state)
487		{
488		/* no parameters to set */
489		}
490		}
491
492
493	484	DEVICE_GET_INFO( z80dma )
494	485	{
495	486	switch (state)
r4679	r4680
500	491	case DEVINFO_INT_CLASS:                     info->i = DEVICE_CLASS_PERIPHERAL;      break;
501	492
502	493	/* --- the following bits of info are returned as pointers to data or functions --- */
503		case DEVINFO_FCT_SET_INFO:                  info->set_info = DEVICE_SET_INFO_NAME(z80dma); break;
504	494	case DEVINFO_FCT_START:                     info->start = DEVICE_START_NAME(z80dma);break;
505	495	case DEVINFO_FCT_STOP:                     /* Nothing */                     break;
506	496	case DEVINFO_FCT_RESET:                     info->reset = DEVICE_RESET_NAME(z80dma);break;

src/emu/machine/8255ppi.c

r4679	r4680
552	552	}
553	553
554	554
555		static DEVICE_SET_INFO( ppi8255 ) {
556		switch ( state ) {
557		/* no parameters to set */
558		}
559		}
560
561
562	555	DEVICE_GET_INFO(ppi8255) {
563	556	switch ( state ) {
564	557	/* --- the following bits of info are returned as 64-bit signed integers --- */
r4679	r4680
567	560	case DEVINFO_INT_CLASS:                  info->i = DEVICE_CLASS_PERIPHERAL;         break;
568	561
569	562	/* --- the following bits of info are returned as pointers to data or functions --- */
570		case DEVINFO_FCT_SET_INFO:               info->set_info = DEVICE_SET_INFO_NAME(ppi8255);   break;
571	563	case DEVINFO_FCT_START:                  info->start = DEVICE_START_NAME(ppi8255);   break;
572	564	case DEVINFO_FCT_STOP:                  /* nothing */                        break;
573	565	case DEVINFO_FCT_RESET:                  info->reset = DEVICE_RESET_NAME(ppi8255);   break;

src/emu/machine/x76f041.c

r4679	r4680
115	115
116	116	if( data == NULL )
117	117	{
118		data = (UINT8 *)auto_malloc(
	118	data = auto_alloc_array( machine, UINT8,
119	119	SIZE_RESPONSE_TO_RESET +
120	120	SIZE_READ_PASSWORD +
121	121	SIZE_WRITE_PASSWORD +

src/emu/machine/smc91c9x.c

r4679	r4680
590	590
591	591
592	592	/*-------------------------------------------------
593		device set info callback
594		-------------------------------------------------*/
595
596		static DEVICE_SET_INFO( smc91c9x )
597		{
598		switch (state)
599		{
600		/* no parameters to set */
601		}
602		}
603
604
605		/*-------------------------------------------------
606	593	device get info callback
607	594	-------------------------------------------------*/
608	595
r4679	r4680
616	603	case DEVINFO_INT_CLASS:               info->i = DEVICE_CLASS_PERIPHERAL;      break;
617	604
618	605	/* --- the following bits of info are returned as pointers to data or functions --- */
619		case DEVINFO_FCT_SET_INFO:            info->set_info = DEVICE_SET_INFO_NAME(smc91c9x); break;
620	606	case DEVINFO_FCT_START:               info->start = DEVICE_START_NAME(smc91c9x); break;
621	607	case DEVINFO_FCT_RESET:               info->reset = DEVICE_RESET_NAME(smc91c9x);break;
622	608

src/emu/machine/8257dma.c

r4679	r4680
397	397	}
398	398
399	399
400		static DEVICE_SET_INFO( dma8257 )
401		{
402		switch (state)
403		{
404		/* no parameters to set */
405		}
406		}
407
408
409	400	DEVICE_GET_INFO( dma8257 )
410	401	{
411	402	switch (state)
r4679	r4680
416	407	case DEVINFO_INT_CLASS:                     info->i = DEVICE_CLASS_PERIPHERAL;      break;
417	408
418	409	/* --- the following bits of info are returned as pointers to data or functions --- */
419		case DEVINFO_FCT_SET_INFO:                  info->set_info = DEVICE_SET_INFO_NAME(dma8257); break;
420	410	case DEVINFO_FCT_START:                     info->start = DEVICE_START_NAME(dma8257);break;
421	411	case DEVINFO_FCT_STOP:                     /* Nothing */                     break;
422	412	case DEVINFO_FCT_RESET:                     info->reset = DEVICE_RESET_NAME(dma8257);break;

src/emu/machine/z80pio.c

r4679	r4680
580	580	}
581	581
582	582
583		static DEVICE_SET_INFO( z80pio )
584		{
585		switch (state)
586		{
587		/* no parameters to set */
588		}
589		}
590
591
592	583	DEVICE_GET_INFO( z80pio )
593	584	{
594	585	switch (state)
r4679	r4680
599	590	case DEVINFO_INT_CLASS:                     info->i = DEVICE_CLASS_PERIPHERAL;      break;
600	591
601	592	/* --- the following bits of info are returned as pointers to data or functions --- */
602		case DEVINFO_FCT_SET_INFO:                  info->set_info = DEVICE_SET_INFO_NAME(z80pio); break;
603	593	case DEVINFO_FCT_START:                     info->start = DEVICE_START_NAME(z80pio);break;
604	594	case DEVINFO_FCT_STOP:                     /* Nothing */                     break;
605	595	case DEVINFO_FCT_RESET:                     info->reset = DEVICE_RESET_NAME(z80pio);break;

src/emu/machine/i2cmem.c

r4679	r4680
53	53	int shift;
54	54	int devsel;
55	55	int byteaddr;
56		unsigned char *data;
	56	UINT8 *data;
57	57	int data_size;
58		unsigned char *page;
	58	UINT8 *page;
59	59	int page_offset;
60	60	int page_size;
61	61	};
r4679	r4680
71	71
72	72	static struct i2cmem_chip i2cmem[ I2CMEM_MAXCHIP ];
73	73
74		void i2cmem_init( running_machine *machine, int chip, int slave_address, int page_size, int data_size, unsigned char *data )
	74	void i2cmem_init( running_machine *machine, int chip, int slave_address, int page_size, int data_size, UINT8 *data )
75	75	{
76	76	struct i2cmem_chip *c;
77		unsigned char *page = NULL;
	77	UINT8 *page = NULL;
78	78
79	79	if( chip >= I2CMEM_MAXCHIP )
80	80	{
r4679	r4680
86	86
87	87	if( data == NULL )
88	88	{
89		data = (unsigned char *)auto_malloc( data_size );
	89	data = auto_alloc_array( machine, UINT8, data_size );
90	90	}
91	91
92	92	if( page_size > 0 )
93	93	{
94		page = (unsigned char *)auto_malloc( page_size );
	94	page = auto_alloc_array( machine, UINT8, page_size );
95	95	}
96	96
97	97	c->slave_address = slave_address;

src/emu/machine/eepromdev.c

r4679	r4680
361	361
362	362	static DEVICE_NVRAM( eeprom )
363	363	{
364		const eeprom_config *config = device->inline_config;
	364	const eeprom_config *config = (const eeprom_config *)device->inline_config;
365	365
366	366	if (read_or_write)
367	367	eepromdev_save(device, file);
r4679	r4680
384	384	assert(device->machine != NULL);
385	385	assert(device->machine->config != NULL);
386	386
387		config = device->inline_config;
	387	config = (const eeprom_config *)device->inline_config;
388	388
389	389	c->intf = config->pinterface;
390	390
r4679	r4680
422	422	{
423	423	}
424	424
425		static DEVICE_SET_INFO(eeprom)
426		{
427		switch (state)
428		{
429		/* no parameters to set */
430		}
431		}
432
433	425	DEVICE_GET_INFO(eeprom)
434	426	{
435	427	switch (state)
r4679	r4680
440	432	case DEVINFO_INT_CLASS:               info->i = DEVICE_CLASS_PERIPHERAL; break;
441	433
442	434	/* --- the following bits of info are returned as pointers to data or functions --- */
443		case DEVINFO_FCT_SET_INFO:            info->set_info = DEVICE_SET_INFO_NAME(eeprom); break;
444	435	case DEVINFO_FCT_START:               info->start = DEVICE_START_NAME(eeprom); break;
445	436	case DEVINFO_FCT_STOP:               /* nothing */ break;
446	437	case DEVINFO_FCT_RESET:               info->reset = DEVICE_RESET_NAME(eeprom); break;

src/emu/machine/f3853.c

r4679	r4680
208	208	}
209	209
210	210
211		static DEVICE_SET_INFO( f3853 )
212		{
213		switch ( state )
214		{
215		}
216		}
217
218
219	211	DEVICE_GET_INFO( f3853 )
220	212	{
221	213	switch ( state )
r4679	r4680
226	218	case DEVINFO_INT_CLASS:                  info->i = DEVICE_CLASS_PERIPHERAL;            break;
227	219
228	220	/* --- the following bits of info are returned as pointers to data or functions --- */
229		case DEVINFO_FCT_SET_INFO:               info->set_info = DEVICE_SET_INFO_NAME(f3853);   break;
230	221	case DEVINFO_FCT_START:                  info->start = DEVICE_START_NAME(f3853);         break;
231	222	case DEVINFO_FCT_STOP:                  /* nothing */                           break;
232	223	case DEVINFO_FCT_RESET:                  info->reset = DEVICE_RESET_NAME(f3853);         break;

src/emu/machine/msm6242.c

r4679	r4680
162	162	}
163	163
164	164
165		static DEVICE_SET_INFO( msm6242 )
166		{
167		switch (state)
168		{
169		/* no parameters to set */
170		}
171		}
172
173
174	165	DEVICE_GET_INFO( msm6242 )
175	166	{
176	167	switch (state)
r4679	r4680
181	172	case DEVINFO_INT_CLASS:                     info->i = DEVICE_CLASS_TIMER;            break;
182	173
183	174	/* --- the following bits of info are returned as pointers to data or functions --- */
184		case DEVINFO_FCT_SET_INFO:                  info->set_info = DEVICE_SET_INFO_NAME(msm6242); break;
185	175	case DEVINFO_FCT_START:                     info->start = DEVICE_START_NAME(msm6242);   break;
186	176	case DEVINFO_FCT_STOP:                     /* Nothing */                        break;
187	177	case DEVINFO_FCT_RESET:                     /* Nothing */                        break;

src/emu/machine/6850acia.c

r4679	r4680
819	819
820	820
821	821	/*-------------------------------------------------
822		DEVICE_SET_INFO( acia6850 )
823		-------------------------------------------------*/
824
825		static DEVICE_SET_INFO( acia6850 )
826		{
827		switch (state)
828		{
829		/* no parameters to set */
830		}
831		}
832
833
834		/*-------------------------------------------------
835	822	DEVICE_GET_INFO( acia6850 )
836	823	-------------------------------------------------*/
837	824
r4679	r4680
845	832	case DEVINFO_INT_CLASS:                     info->i = DEVICE_CLASS_PERIPHERAL;            break;
846	833
847	834	/* --- the following bits of info are returned as pointers to data or functions --- */
848		case DEVINFO_FCT_SET_INFO:                  info->set_info = DEVICE_SET_INFO_NAME(acia6850); break;
849	835	case DEVINFO_FCT_START:                     info->start = DEVICE_START_NAME(acia6850);      break;
850	836	case DEVINFO_FCT_STOP:                     /* Nothing */                           break;
851	837	case DEVINFO_FCT_RESET:                     info->reset = DEVICE_RESET_NAME(acia6850);      break;

src/emu/machine/wd33c93.c

r4679	r4680
798	798	/* allocate a timer for commands */
799	799	scsi_data.cmd_timer = timer_alloc(machine, wd33c93_complete_cb, NULL);
800	800
801		scsi_data.temp_input = (UINT8 *)auto_malloc( TEMP_INPUT_LEN );
	801	scsi_data.temp_input = auto_alloc_array( machine, UINT8, TEMP_INPUT_LEN );
802	802
803	803	//  state_save_register_item_array(machine, "wd33c93", NULL, 0, scsi_data);
804	804	}

src/emu/machine/pic8259.c

r4679	r4680
427	427	}
428	428
429	429
430		static DEVICE_SET_INFO( pic8259 ) {
431		switch ( state ) {
432		/* no parameters to set */
433		}
434		}
435
436
437	430	DEVICE_GET_INFO( pic8259 ) {
438	431	switch ( state ) {
439	432	/* --- the following bits of info are returned as 64-bit signed integers --- */
r4679	r4680
442	435	case DEVINFO_INT_CLASS:                  info->i = DEVICE_CLASS_PERIPHERAL;         break;
443	436
444	437	/* --- the following bits of info are returned as pointers to data or functions --- */
445		case DEVINFO_FCT_SET_INFO:               info->set_info = DEVICE_SET_INFO_NAME(pic8259);   break;
446	438	case DEVINFO_FCT_START:                  info->start = DEVICE_START_NAME(pic8259);   break;
447	439	case DEVINFO_FCT_STOP:                  /* nothing */                        break;
448	440	case DEVINFO_FCT_RESET:                  info->reset = DEVICE_RESET_NAME(pic8259);   break;

src/emu/machine/laserdsc.h

r4679	r4680
25	25	/* types of players supported */
26	26	enum
27	27	{
	28	LASERDISC_TYPE_UNKNOWN,
28	29	LASERDISC_TYPE_PIONEER_PR7820,         /* Pioneer PR-7820 */
29	30	LASERDISC_TYPE_PIONEER_PR8210,         /* Pioneer PR-8210 / LD-V1100 */
30	31	LASERDISC_TYPE_SIMUTREK_SPECIAL,      /* Pioneer PR-8210 with mods */
r4679	r4680
54	55	#define LASERDISC_CODE_LINE18      18         /* 24-bit line 18 code */
55	56	#define LASERDISC_CODE_LINE1718      1718      /* 24-bit best of line 17/18 code */
56	57
57		/* device configuration */
58		enum
59		{
60		LDINFO_INT_TYPE = DEVINFO_INT_DEVICE_SPECIFIC
61		};
62	58
63	59
64
65	60	/***************************************************************************
66	61	TYPE DEFINITIONS
67	62	***************************************************************************/
r4679	r4680
228	223	#define SOUND_LASERDISC DEVICE_GET_INFO_NAME(laserdisc_sound)
229	224	DEVICE_GET_INFO( laserdisc_sound );
230	225
	226	/* type setter */
	227	int laserdisc_get_type(const device_config *device);
	228	void laserdisc_set_type(const device_config *device, int type);
231	229
	230
232	231	#endif    /* __LASERDSC_H__ */

src/emu/machine/ldcore.c

r4679	r4680
1349	1349	ldcore->chdtracks = totalhunks / 2;
1350	1350
1351	1351	/* allocate memory for the precomputed per-frame metadata */
1352		ldcore->vbidata = (UINT8 *)auto_malloc(totalhunks * VBI_PACKED_BYTES);
	1352	ldcore->vbidata = auto_alloc_array(device->machine, UINT8, totalhunks * VBI_PACKED_BYTES);
1353	1353	err = chd_get_metadata(ldcore->disc, AV_LD_METADATA_TAG, 0, ldcore->vbidata, totalhunks * VBI_PACKED_BYTES, &vbilength, NULL, NULL);
1354	1354	if (err != CHDERR_NONE || vbilength != totalhunks * VBI_PACKED_BYTES)
1355	1355	fatalerror("Precomputed VBI metadata missing or incorrect size");
r4679	r4680
1378	1378	frame_data *frame = &ldcore->frame[index];
1379	1379
1380	1380	/* first allocate a YUY16 bitmap at 2x the height */
1381		frame->bitmap = auto_bitmap_alloc(ldcore->width, ldcore->height * 2, BITMAP_FORMAT_YUY16);
	1381	frame->bitmap = auto_bitmap_alloc(device->machine, ldcore->width, ldcore->height * 2, BITMAP_FORMAT_YUY16);
1382	1382	fillbitmap_yuy16(frame->bitmap, 40, 109, 240);
1383	1383
1384	1384	/* make a copy of the bitmap that clips out the VBI and horizontal blanking areas */
1385		frame->visbitmap = (bitmap_t *)auto_malloc(sizeof(*frame->visbitmap));
	1385	frame->visbitmap = auto_alloc(device->machine, bitmap_t);
1386	1386	*frame->visbitmap = *frame->bitmap;
1387	1387	frame->visbitmap->base = BITMAP_ADDR16(frame->visbitmap, 44, frame->bitmap->width * 8 / 720);
1388	1388	frame->visbitmap->height -= 44;
r4679	r4680
1390	1390	}
1391	1391
1392	1392	/* allocate an empty frame of the same size */
1393		ldcore->emptyframe = auto_bitmap_alloc(ldcore->width, ldcore->height * 2, BITMAP_FORMAT_YUY16);
	1393	ldcore->emptyframe = auto_bitmap_alloc(device->machine, ldcore->width, ldcore->height * 2, BITMAP_FORMAT_YUY16);
1394	1394	fillbitmap_yuy16(ldcore->emptyframe, 0, 128, 128);
1395	1395
1396	1396	/* allocate texture for rendering */
r4679	r4680
1410	1410	if (ldcore->config.overwidth > 0 && ldcore->config.overheight > 0 && ldcore->config.overupdate != NULL)
1411	1411	{
1412	1412	ldcore->overenable = TRUE;
1413		ldcore->overbitmap[0] = auto_bitmap_alloc(ldcore->config.overwidth, ldcore->config.overheight, (bitmap_format)ldcore->config.overformat);
1414		ldcore->overbitmap[1] = auto_bitmap_alloc(ldcore->config.overwidth, ldcore->config.overheight, (bitmap_format)ldcore->config.overformat);
	1413	ldcore->overbitmap[0] = auto_bitmap_alloc(device->machine, ldcore->config.overwidth, ldcore->config.overheight, (bitmap_format)ldcore->config.overformat);
	1414	ldcore->overbitmap[1] = auto_bitmap_alloc(device->machine, ldcore->config.overwidth, ldcore->config.overheight, (bitmap_format)ldcore->config.overformat);
1415	1415	ldcore->overtex = render_texture_alloc(NULL, NULL);
1416	1416	if (ldcore->overtex == NULL)
1417	1417	fatalerror("Out of memory allocating overlay texture");
r4679	r4680
1435	1435	/* allocate audio buffers */
1436	1436	ldcore->audiomaxsamples = ((UINT64)ldcore->samplerate * 1000000 + ldcore->fps_times_1million - 1) / ldcore->fps_times_1million;
1437	1437	ldcore->audiobufsize = ldcore->audiomaxsamples * 4;
1438		ldcore->audiobuffer[0] = (INT16 *)auto_malloc(ldcore->audiobufsize * sizeof(ldcore->audiobuffer[0][0]));
1439		ldcore->audiobuffer[1] = (INT16 *)auto_malloc(ldcore->audiobufsize * sizeof(ldcore->audiobuffer[1][0]));
	1438	ldcore->audiobuffer[0] = auto_alloc_array(device->machine, INT16, ldcore->audiobufsize);
	1439	ldcore->audiobuffer[1] = auto_alloc_array(device->machine, INT16, ldcore->audiobufsize);
1440	1440	}
1441	1441
1442	1442
r4679	r4680
1470	1470	ld->device = device;
1471	1471
1472	1472	/* allocate memory for the core state */
1473		ld->core = (ldcore_data *)auto_malloc(sizeof(*ld->core));
1474		memset(ld->core, 0, sizeof(*ld->core));
	1473	ld->core = auto_alloc_clear(device->machine, ldcore_data);
1475	1474	ldcore = ld->core;
1476	1475
1477	1476	/* determine the maximum player-specific state size and allocate it */
1478	1477	statesize = 0;
1479	1478	for (index = 0; index < ARRAY_LENGTH(player_interfaces); index++)
1480	1479	statesize = MAX(statesize, player_interfaces[index]->statesize);
1481		ld->player = (ldplayer_data *)auto_malloc(statesize);
1482		memset(ld->player, 0, statesize);
	1480	ld->player = (ldplayer_data *)auto_alloc_array_clear(device->machine, UINT8, statesize);
1483	1481
1484	1482	/* copy config data to the live state */
1485	1483	ldcore->config = *config;
r4679	r4680
1578	1576	device set info callback
1579	1577	-------------------------------------------------*/
1580	1578
1581		static DEVICE_SET_INFO( laserdisc )
	1579	int laserdisc_get_type(const device_config *device)
1582	1580	{
1583	1581	laserdisc_state *ld = get_safe_token(device);
1584		switch (state)
	1582	if (ld->core != NULL)
	1583	return ld->core->config.type;
	1584	return LASERDISC_TYPE_UNKNOWN;
	1585	}
	1586
	1587	void laserdisc_set_type(const device_config *device, int type)
	1588	{
	1589	laserdisc_state *ld = get_safe_token(device);
	1590	if (ld->core != NULL && ld->core->config.type != type)
1585	1591	{
1586		/* --- the following bits of info are set as 64-bit signed integers --- */
1587		case LDINFO_INT_TYPE:
1588		if (ld != NULL && ld->core != NULL && ld->core->config.type != info->i)
1589		{
1590		ld->core->config.type = info->i;
1591		device_reset(device);
1592		}
1593		break;
	1592	ld->core->config.type = type;
	1593	device_reset(device);
1594	1594	}
1595	1595	}
1596	1596
r4679	r4680
1632	1632	case DEVINFO_INT_TOKEN_BYTES:         info->i = sizeof(laserdisc_state);               break;
1633	1633	case DEVINFO_INT_INLINE_CONFIG_BYTES:   info->i = sizeof(laserdisc_config);               break;
1634	1634	case DEVINFO_INT_CLASS:               info->i = DEVICE_CLASS_VIDEO;                  break;
1635		case LDINFO_INT_TYPE:               info->i = config->type;                        break;
1636	1635
1637	1636	/* --- the following bits of info are returned as pointers --- */
1638	1637	case DEVINFO_PTR_ROM_REGION:         info->romregion = (intf != NULL) ? intf->romregion : NULL; break;
1639	1638	case DEVINFO_PTR_MACHINE_CONFIG:      info->machine_config = (intf != NULL) ? intf->machine_config : NULL; break;
1640	1639
1641	1640	/* --- the following bits of info are returned as pointers to data or functions --- */
1642		case DEVINFO_FCT_SET_INFO:            info->set_info = DEVICE_SET_INFO_NAME(laserdisc);    break;
1643	1641	case DEVINFO_FCT_START:               info->start = DEVICE_START_NAME(laserdisc);       break;
1644	1642	case DEVINFO_FCT_STOP:               info->stop = DEVICE_STOP_NAME(laserdisc);          break;
1645	1643	case DEVINFO_FCT_RESET:               info->reset = DEVICE_RESET_NAME(laserdisc);         break;

src/emu/machine/intelfsh.c

r4679	r4680
125	125	}
126	126	if( data == NULL )
127	127	{
128		data = auto_malloc( c->size );
	128	data = auto_alloc_array( machine, UINT8, c->size );
129	129	memset( data, 0xff, c->size );
130	130	}
131	131

src/emu/machine/x2212.c

r4679	r4680
88	88	assert(device->machine != NULL);
89	89	assert(device->machine->config != NULL);
90	90
91		c->sram = (UINT8 *)auto_malloc( SIZE_DATA );
92		c->e2prom = (UINT8 *)auto_malloc( SIZE_DATA );
	91	c->sram = auto_alloc_array( device->machine, UINT8, SIZE_DATA );
	92	c->e2prom = auto_alloc_array( device->machine, UINT8, SIZE_DATA );
93	93	c->store = 1;
94	94	c->array_recall = 1;
95	95
r4679	r4680
144	144	}
145	145
146	146	/*-------------------------------------------------
147		device set info callback
148		-------------------------------------------------*/
149
150		static DEVICE_SET_INFO(x2212)
151		{
152		switch (state)
153		{
154		/* no parameters to set */
155		}
156		}
157
158		/*-------------------------------------------------
159	147	device get info callback
160	148	-------------------------------------------------*/
161	149
r4679	r4680
169	157	case DEVINFO_INT_CLASS:               info->i = DEVICE_CLASS_PERIPHERAL; break;
170	158
171	159	/* --- the following bits of info are returned as pointers to data or functions --- */
172		case DEVINFO_FCT_SET_INFO:            info->set_info = DEVICE_SET_INFO_NAME(x2212); break;
173	160	case DEVINFO_FCT_START:               info->start = DEVICE_START_NAME(x2212); break;
174	161	case DEVINFO_FCT_STOP:               /* nothing */ break;
175	162	case DEVINFO_FCT_RESET:               info->reset = DEVICE_RESET_NAME(x2212); break;

src/emu/machine/at28c16.c

r4679	r4680
137	137	assert(device->machine != NULL);
138	138	assert(device->machine->config != NULL);
139	139
140		c->data = (UINT8 *)auto_malloc( SIZE_DATA );
141		c->id = (UINT8 *)auto_malloc( SIZE_ID );
	140	c->data = auto_alloc_array( device->machine, UINT8, SIZE_DATA );
	141	c->id = auto_alloc_array( device->machine, UINT8, SIZE_ID );
142	142	c->a9_12v = 0;
143	143	c->oe_12v = 0;
144	144	c->last_write = -1;
r4679	r4680
205	205	}
206	206
207	207	/*-------------------------------------------------
208		device set info callback
209		-------------------------------------------------*/
210
211		static DEVICE_SET_INFO(at28c16)
212		{
213		switch (state)
214		{
215		/* no parameters to set */
216		}
217		}
218
219		/*-------------------------------------------------
220	208	device get info callback
221	209	-------------------------------------------------*/
222	210
r4679	r4680
230	218	case DEVINFO_INT_CLASS:               info->i = DEVICE_CLASS_PERIPHERAL; break;
231	219
232	220	/* --- the following bits of info are returned as pointers to data or functions --- */
233		case DEVINFO_FCT_SET_INFO:            info->set_info = DEVICE_SET_INFO_NAME(at28c16); break;
234	221	case DEVINFO_FCT_START:               info->start = DEVICE_START_NAME(at28c16); break;
235	222	case DEVINFO_FCT_STOP:               /* nothing */ break;
236	223	case DEVINFO_FCT_RESET:               info->reset = DEVICE_RESET_NAME(at28c16); break;

src/emu/machine/scsi.c

r4679	r4680
105	105
106	106	SCSIInstance *SCSIMalloc( running_machine *machine, const SCSIClass *scsiClass )
107	107	{
108		SCSIInstance *scsiInstance = (SCSIInstance *) malloc_or_die( SCSISizeof( scsiClass ) );
	108	SCSIInstance *scsiInstance = alloc_or_die(SCSIInstance);
109	109	scsiInstance->scsiClass = scsiClass;
110	110	scsiInstance->machine = machine;
111	111	return scsiInstance;

src/emu/machine/latch8.c

r4679	r4680
235	235	}
236	236
237	237
238		static DEVICE_SET_INFO( latch8 )
239		{
240		switch (state)
241		{
242		/* no parameters to set */
243		}
244		}
245
246
247	238	DEVICE_GET_INFO( latch8 )
248	239	{
249	240	switch (state)
r4679	r4680
254	245	case DEVINFO_INT_CLASS:                     info->i = DEVICE_CLASS_PERIPHERAL;      break;
255	246
256	247	/* --- the following bits of info are returned as pointers to data or functions --- */
257		case DEVINFO_FCT_SET_INFO:                  info->set_info = DEVICE_SET_INFO_NAME(latch8); break;
258	248	case DEVINFO_FCT_START:                     info->start = DEVICE_START_NAME(latch8);break;
259	249	case DEVINFO_FCT_STOP:                     /* Nothing */                     break;
260	250	case DEVINFO_FCT_RESET:                     info->reset = DEVICE_RESET_NAME(latch8);break;

src/emu/machine/8237dma.c

r4679	r4680
417	417	}
418	418
419	419
420		static DEVICE_SET_INFO( dma8237 ) {
421		switch ( state ) {
422		/* no parameters to set */
423		}
424		}
425
426
427	420	DEVICE_GET_INFO( dma8237 ) {
428	421	switch ( state ) {
429	422	/* --- the following bits of info are returned as 64-bit signed integers --- */
r4679	r4680
432	425	case DEVINFO_INT_CLASS:                  info->i = DEVICE_CLASS_PERIPHERAL;         break;
433	426
434	427	/* --- the following bits of info are returned as pointers to data or functions --- */
435		case DEVINFO_FCT_SET_INFO:               info->set_info = DEVICE_SET_INFO_NAME(dma8237);   break;
436	428	case DEVINFO_FCT_START:                  info->start = DEVICE_START_NAME(dma8237);   break;
437	429	case DEVINFO_FCT_STOP:                  /* nothing */                        break;
438	430	case DEVINFO_FCT_RESET:                  info->reset = DEVICE_RESET_NAME(dma8237);   break;

src/emu/machine/cdp1852.c

r4679	r4680
218	218	case DEVINFO_INT_CLASS:                     info->i = DEVICE_CLASS_PERIPHERAL;         break;
219	219
220	220	/* --- the following bits of info are returned as pointers to data or functions --- */
221		case DEVINFO_FCT_SET_INFO:                  /* Nothing */                        break;
222	221	case DEVINFO_FCT_START:                     info->start = DEVICE_START_NAME(cdp1852);   break;
223	222	case DEVINFO_FCT_STOP:                     /* Nothing */                        break;
224	223	case DEVINFO_FCT_RESET:                     info->reset = DEVICE_RESET_NAME(cdp1852);   break;

src/emu/machine/z80sio.c

r4679	r4680
811	811	}
812	812
813	813
814		static DEVICE_SET_INFO( z80sio )
815		{
816		switch (state)
817		{
818		/* no parameters to set */
819		}
820		}
821
822
823	814	DEVICE_GET_INFO( z80sio )
824	815	{
825	816	switch (state)
r4679	r4680
830	821	case DEVINFO_INT_CLASS:                     info->i = DEVICE_CLASS_PERIPHERAL;      break;
831	822
832	823	/* --- the following bits of info are returned as pointers to data or functions --- */
833		case DEVINFO_FCT_SET_INFO:                  info->set_info = DEVICE_SET_INFO_NAME(z80sio); break;
834	824	case DEVINFO_FCT_START:                     info->start = DEVICE_START_NAME(z80sio);break;
835	825	case DEVINFO_FCT_STOP:                     /* Nothing */                     break;
836	826	case DEVINFO_FCT_RESET:                     info->reset = DEVICE_RESET_NAME(z80sio);break;

src/emu/machine/microtch.c

r4679	r4680
91	91	{
92	92	ty = 0x4000 - ty;
93	93
94		microtouch_send_format_table_packet(0xc0, tx, ty);
	94	microtouch_send_format_table_packet(0xc8, tx, ty);
95	95	microtouch.last_touch_state = 1;
96	96	microtouch.last_x = tx;
97	97	microtouch.last_y = ty;
r4679	r4680
102	102	if ( microtouch.last_touch_state == 1 )
103	103	{
104	104	microtouch.last_touch_state = 0;
105		microtouch_send_format_table_packet(0x80, microtouch.last_x, microtouch.last_y);
	105	microtouch_send_format_table_packet(0x88, microtouch.last_x, microtouch.last_y);
106	106	}
107	107	}
108	108	};

src/emu/machine/pci.c

r4679	r4680
241	241
242	242
243	243	/*-------------------------------------------------
244		device set info callback
245		-------------------------------------------------*/
246
247		static DEVICE_SET_INFO( pci_bus )
248		{
249		switch (state)
250		{
251		/* no parameters to set */
252		}
253		}
254
255
256		/*-------------------------------------------------
257	244	device get info callback
258	245	-------------------------------------------------*/
259	246
r4679	r4680
267	254	case DEVINFO_INT_CLASS:               info->i = DEVICE_CLASS_PERIPHERAL;      break;
268	255
269	256	/* --- the following bits of info are returned as pointers to data or functions --- */
270		case DEVINFO_FCT_SET_INFO:            info->set_info = DEVICE_SET_INFO_NAME(pci_bus); break;
271	257	case DEVINFO_FCT_START:               info->start = DEVICE_START_NAME(pci_bus); break;
272	258	case DEVINFO_FCT_RESET:               info->reset = DEVICE_RESET_NAME(pci_bus);break;
273	259

src/emu/machine/i2cmemdev.c

r4679	r4680
375	375	assert( device->machine != NULL );
376	376	assert( device->machine->config != NULL );
377	377
378		config = device->inline_config;
	378	config = (const i2cmem_config *)device->inline_config;
379	379
380	380	c->scl = 0;
381	381	c->sdaw = 0;
r4679	r4680
393	393
394	394	if( config != NULL )
395	395	{
396		c->data = auto_malloc( config->data_size );
397		if( config->data != NULL )
398		memcpy(c->data, config->data, config->data_size);
	396	c->data = auto_alloc_array( device->machine, UINT8, config->data_size );
	397	memcpy(c->data, config->data, config->data_size);
399	398
400	399	if( config->page_size > 0 )
401		page = auto_malloc( config->page_size );
	400	page = auto_alloc_array( device->machine, UINT8, config->page_size );
402	401
403	402	c->slave_address = config->slave_address;
404	403	c->data_size = config->data_size;
r4679	r4680
432	431
433	432	static DEVICE_NVRAM( i2cmem )
434	433	{
435		const i2cmem_config *config = device->inline_config;
	434	const i2cmem_config *config = (const i2cmem_config *)device->inline_config;
436	435	i2cmem_state *c = get_safe_token( device );
437	436
438	437	if( read_or_write )
r4679	r4680
451	450	}
452	451
453	452	/*-------------------------------------------------
454		device set info callback
455		-------------------------------------------------*/
456
457		static DEVICE_SET_INFO( i2cmem )
458		{
459		switch ( state )
460		{
461		/* no parameters to set */
462		}
463		}
464
465		/*-------------------------------------------------
466	453	device get info callback
467	454	-------------------------------------------------*/
468	455
r4679	r4680
476	463	case DEVINFO_INT_CLASS:               info->i = DEVICE_CLASS_PERIPHERAL; break;
477	464
478	465	/* --- the following bits of info are returned as pointers to data or functions --- */
479		case DEVINFO_FCT_SET_INFO:            info->set_info = DEVICE_SET_INFO_NAME( i2cmem ); break;
480	466	case DEVINFO_FCT_START:               info->start = DEVICE_START_NAME( i2cmem ); break;
481	467	case DEVINFO_FCT_STOP:               /* nothing */ break;
482	468	case DEVINFO_FCT_RESET:               info->reset = DEVICE_RESET_NAME( i2cmem ); break;

src/emu/machine/z80ctc.c

r4679	r4680
516	516	}
517	517
518	518
519		static DEVICE_SET_INFO( z80ctc )
520		{
521		switch (state)
522		{
523		/* no parameters to set */
524		}
525		}
526
527
528	519	DEVICE_GET_INFO( z80ctc )
529	520	{
530	521	switch (state)
r4679	r4680
535	526	case DEVINFO_INT_CLASS:                     info->i = DEVICE_CLASS_PERIPHERAL;      break;
536	527
537	528	/* --- the following bits of info are returned as pointers to data or functions --- */
538		case DEVINFO_FCT_SET_INFO:                  info->set_info = DEVICE_SET_INFO_NAME(z80ctc); break;
539	529	case DEVINFO_FCT_START:                     info->start = DEVICE_START_NAME(z80ctc);break;
540	530	case DEVINFO_FCT_STOP:                     /* Nothing */                     break;
541	531	case DEVINFO_FCT_RESET:                     info->reset = DEVICE_RESET_NAME(z80ctc);break;

src/emu/machine/pit8253.c

r4679	r4680
1119	1119	}
1120	1120
1121	1121
1122		static DEVICE_SET_INFO( pit8253 ) {
1123		switch ( state ) {
1124		/* no parameters to set */
1125		}
1126		}
1127
1128
1129	1122	DEVICE_GET_INFO( pit8253 ) {
1130	1123	switch ( state ) {
1131	1124	/* --- the following bits of info are returned as 64-bit signed integers --- */
r4679	r4680
1134	1127	case DEVINFO_INT_CLASS:                  info->i = DEVICE_CLASS_PERIPHERAL;         break;
1135	1128
1136	1129	/* --- the following bits of info are returned as pointers to data or functions --- */
1137		case DEVINFO_FCT_SET_INFO:               info->set_info = DEVICE_SET_INFO_NAME(pit8253);   break;
1138	1130	case DEVINFO_FCT_START:                  info->start = DEVICE_START_NAME(pit8253);   break;
1139	1131	case DEVINFO_FCT_STOP:                  /* nothing */                        break;
1140	1132	case DEVINFO_FCT_RESET:                  info->reset = DEVICE_RESET_NAME(pit8253);   break;

src/emu/machine/mc146818.c

r4679	r4680
199	199
200	200	void mc146818_init(running_machine *machine, MC146818_TYPE type)
201	201	{
202		mc146818 = (struct mc146818_chip *)auto_malloc(sizeof(*mc146818));
203		memset(mc146818, 0, sizeof(*mc146818));
	202	mc146818 = auto_alloc_clear(machine, struct mc146818_chip);
204	203	mc146818->type = type;
205	204	mc146818->last_refresh = timer_get_time(machine);
206	205	timer_pulse(machine, ATTOTIME_IN_HZ(1), NULL, 0, mc146818_timer);

src/emu/restrack.h

r4679	r4680
59	59
60	60
61	61	/* allocate memory and fatalerror if there's a problem */
62		#define malloc_or_die(s)         malloc_or_die_file_line(s, __FILE__, __LINE__)
	62	#define alloc_or_die(t)               ((t *)malloc_or_die_file_line(sizeof(t), __FILE__, __LINE__))
	63	#define alloc_clear_or_die(t)         ((t *)memset(malloc_or_die_file_line(sizeof(t), __FILE__, __LINE__), 0, sizeof(t)))
	64	#define alloc_array_or_die(t, c)      ((t *)malloc_or_die_file_line((c) * sizeof(t), __FILE__, __LINE__))
	65	#define alloc_array_clear_or_die(t, c)    ((t *)memset(malloc_or_die_file_line((c) * sizeof(t), __FILE__, __LINE__), 0, (c) * sizeof(t)))
63	66	void *malloc_or_die_file_line(size_t size, const char *file, int line) ATTR_MALLOC;
64	67
	68
65	69	/* allocate memory that will be freed at the next end_resource_tracking */
66		#define auto_malloc(s)            auto_malloc_file_line(s, __FILE__, __LINE__)
67		void *auto_malloc_file_line(size_t size, const char *file, int line) ATTR_MALLOC;
	70	#define auto_alloc(m, t)            ((t *)auto_malloc_file_line(m, sizeof(t), __FILE__, __LINE__))
	71	#define auto_alloc_clear(m, t)         ((t *)memset(auto_malloc_file_line(m, sizeof(t), __FILE__, __LINE__), 0, sizeof(t)))
	72	#define auto_alloc_array(m, t, c)      ((t *)auto_malloc_file_line(m, (c) * sizeof(t), __FILE__, __LINE__))
	73	#define auto_alloc_array_clear(m, t, c) ((t *)memset(auto_malloc_file_line(m, (c) * sizeof(t), __FILE__, __LINE__), 0, (c) * sizeof(t)))
	74	void *auto_malloc_file_line(running_machine *machine, size_t size, const char *file, int line) ATTR_MALLOC;
68	75
69	76	/* allocate memory that will be freed at the next end_resource_tracking */
70		#define auto_realloc(p, s)         auto_realloc_file_line(p, s, __FILE__, __LINE__)
71		void *auto_realloc_file_line(void *ptr, size_t size, const char *file, int line) ATTR_MALLOC;
	77	#define auto_extend_array(m, p, t, c)   ((t *)auto_realloc_file_line(m, p, (c) * sizeof(t), __FILE__, __LINE__))
	78	void *auto_realloc_file_line(running_machine *machine, void *ptr, size_t size, const char *file, int line) ATTR_MALLOC;
72	79
73	80	/* allocate memory and duplicate a string that will be freed at the next end_resource_tracking */
74		#define auto_strdup(s)            auto_strdup_file_line(s, __FILE__, __LINE__)
75		char *auto_strdup_file_line(const char *str, const char *file, int line) ATTR_MALLOC;
	81	#define auto_strdup(m, s)            auto_strdup_file_line(m, s, __FILE__, __LINE__)
	82	char *auto_strdup_file_line(running_machine *machine, const char *str, const char *file, int line) ATTR_MALLOC;
76	83
77	84	/* auto_strdup() variant that tolerates NULL */
78		#define auto_strdup_allow_null(s)   auto_strdup_allow_null_file_line(s, __FILE__, __LINE__)
79		char *auto_strdup_allow_null_file_line(const char *str, const char *file, int line) ATTR_MALLOC;
	85	#define auto_strdup_allow_null(m, s)   auto_strdup_allow_null_file_line(m, s, __FILE__, __LINE__)
	86	char *auto_strdup_allow_null_file_line(running_machine *machine, const char *str, const char *file, int line) ATTR_MALLOC;
80	87
81	88	/* allocate a bitmap that will be freed at the next end_resource_tracking */
82		#define auto_astring_alloc()      auto_astring_alloc_file_line(__FILE__, __LINE__)
83		astring *auto_astring_alloc_file_line(const char *file, int line);
	89	#define auto_astring_alloc(m)         auto_astring_alloc_file_line(m, __FILE__, __LINE__)
	90	astring *auto_astring_alloc_file_line(running_machine *machine, const char *file, int line);
84	91
85	92	/* allocate a bitmap that will be freed at the next end_resource_tracking */
86		#define auto_bitmap_alloc(w,h,f)   auto_bitmap_alloc_file_line(w, h, f, __FILE__, __LINE__)
87		bitmap_t *auto_bitmap_alloc_file_line(int width, int height, bitmap_format format, const char *file, int line);
	93	#define auto_bitmap_alloc(m, w, h, f)   auto_bitmap_alloc_file_line(m, w, h, f, __FILE__, __LINE__)
	94	bitmap_t *auto_bitmap_alloc_file_line(running_machine *machine, int width, int height, bitmap_format format, const char *file, int line);
88	95
89	96
90	97	#endif /* __RESTRACK_H__ */

src/emu/devintrf.h

r4679	r4680
68	68	/* --- the following bits of info are returned as pointers to functions --- */
69	69	DEVINFO_FCT_FIRST = 0x20000,
70	70
71		DEVINFO_FCT_SET_INFO = DEVINFO_FCT_FIRST,      /* R/O: device_set_info_func */
72		DEVINFO_FCT_START,                        /* R/O: device_start_func */
	71	DEVINFO_FCT_START = DEVINFO_FCT_FIRST,         /* R/O: device_start_func */
73	72	DEVINFO_FCT_STOP,                        /* R/O: device_stop_func */
74	73	DEVINFO_FCT_RESET,                        /* R/O: device_reset_func */
75	74	DEVINFO_FCT_EXECUTE,                     /* R/O: device_execute_func */
r4679	r4680
105	104	#define DEVICE_GET_INFO(name)      void DEVICE_GET_INFO_NAME(name)(const device_config *device, UINT32 state, deviceinfo *info)
106	105	#define DEVICE_GET_INFO_CALL(name)   DEVICE_GET_INFO_NAME(name)(device, state, info)
107	106
108		#define DEVICE_SET_INFO_NAME(name)   device_set_info_##name
109		#define DEVICE_SET_INFO(name)      void DEVICE_SET_INFO_NAME(name)(const device_config *device, UINT32 state, const deviceinfo *info)
110		#define DEVICE_SET_INFO_CALL(name)   DEVICE_SET_INFO_NAME(name)(device, state, info)
111
112	107	#define DEVICE_START_NAME(name)      device_start_##name
113	108	#define DEVICE_START(name)         void DEVICE_START_NAME(name)(const device_config *device)
114	109	#define DEVICE_START_CALL(name)      DEVICE_START_NAME(name)(device)
r4679	r4680
148	143	#define devtag_get_info_fct(mach,tag,state)               device_get_info_fct(devtag_get_device(mach, tag), state)
149	144	#define devtag_get_info_string(mach,tag,state)            device_get_info_string(devtag_get_device(mach, tag), state)
150	145
151		#define devtag_set_info_int(mach,tag,state,data)         device_set_info_int(devtag_get_device(mach, tag), state, data)
152		#define devtag_set_info_ptr(mach,tag,state,data)         device_set_info_ptr(devtag_get_device(mach, tag), state, data)
153		#define devtag_set_info_fct(mach,tag,state,data)         device_set_info_fct(devtag_get_device(mach, tag), state, data)
154	146
155
156	147	/* shorthand for getting standard data about device types */
157	148	#define devtype_get_name(type)                        devtype_get_info_string(type, DEVINFO_STR_NAME)
158	149	#define devtype_get_family(type)                      devtype_get_info_string(type, DEVINFO_STR_FAMILY)
r4679	r4680
189	180
190	181	/* device interface function types */
191	182	typedef void (*device_get_info_func)(const device_config *device, UINT32 state, deviceinfo *info);
192		typedef void (*device_set_info_func)(const device_config *device, UINT32 state, const deviceinfo *info);
193	183	typedef void (*device_start_func)(const device_config *device);
194	184	typedef void (*device_stop_func)(const device_config *device);
195	185	typedef INT32 (*device_execute_func)(const device_config *device, INT32 clocks);
r4679	r4680
211	201	genf *              f;                  /* generic function pointers */
212	202	char *               s;                  /* generic strings */
213	203
214		device_set_info_func    set_info;            /* DEVINFO_FCT_SET_INFO */
215	204	device_start_func      start;               /* DEVINFO_FCT_START */
216	205	device_stop_func      stop;               /* DEVINFO_FCT_STOP */
217	206	device_reset_func      reset;               /* DEVINFO_FCT_RESET */
r4679	r4680
236	225	/* device properties (always valid) */
237	226	device_type            type;               /* device type */
238	227	device_class         devclass;            /* device class */
239		device_set_info_func    set_info;            /* quick pointer to set_info callback */
240	228
241	229	/* device configuration (always valid) */
242	230	UINT32               clock;               /* device clock */
r4679	r4680
369	357	const char *devtype_get_info_string(device_type type, UINT32 state);
370	358
371	359
372
373		/* ----- device information setters ----- */
374
375		/* set an integer state value for an allocated device */
376		void device_set_info_int(const device_config *device, UINT32 state, INT64 data);
377
378		/* set a pointer state value for an allocated device */
379		void device_set_info_ptr(const device_config *device, UINT32 state, void *data);
380
381		/* set a function pointer state value for an allocated device */
382		void device_set_info_fct(const device_config *device, UINT32 state, genf *data);
383
384
385	360	#endif   /* __DEVINTRF_H__ */

src/emu/cpuexec.c

r4679	r4680
223	223	attotime min_quantum;
224	224
225	225	/* allocate global state */
226		machine->cpuexec_data = (cpuexec_private *)auto_malloc(sizeof(*machine->cpuexec_data));
227		memset(machine->cpuexec_data, 0, sizeof(*machine->cpuexec_data));
	226	machine->cpuexec_data = auto_alloc_clear(machine, cpuexec_private);
228	227
229	228	/* set the core scheduling quantum */
230	229	min_quantum = machine->config->minimum_quantum;
r4679	r4680
627	626	cpu_set_info - device set info callback
628	627	-------------------------------------------------*/
629	628
630		static DEVICE_SET_INFO( cpu )
	629	void cpu_set_info(const device_config *device, UINT32 state, UINT64 value)
631	630	{
632	631	cpu_class_header *header = cpu_get_class_header(device);
633	632	cpu_set_info_func set_info;
r4679	r4680
652	651	{
653	652	if (state >= CPUINFO_INT_REGISTER && state <= CPUINFO_INT_REGISTER_LAST)
654	653	{
655		set_register_value(device, classdata->state->baseptr, classdata->regstate[state - CPUINFO_INT_REGISTER], info->i);
	654	set_register_value(device, classdata->state->baseptr, classdata->regstate[state - CPUINFO_INT_REGISTER], value);
656	655	return;
657	656	}
658	657	}
659	658	}
660	659
661	660	/* integer data */
	661	assert(state >= DEVINFO_INT_FIRST && state <= DEVINFO_INT_LAST);
662	662	if (state >= DEVINFO_INT_FIRST && state <= DEVINFO_INT_LAST)
663	663	{
664		cinfo.i = info->i;
	664	cinfo.i = value;
665	665	(*set_info)(device, state, &cinfo);
666	666	}
667
668		/* pointer data */
669		else if ((state >= DEVINFO_PTR_FIRST && state <= DEVINFO_PTR_LAST) ||
670		(state >= DEVINFO_FCT_FIRST && state <= DEVINFO_FCT_LAST) ||
671		(state >= DEVINFO_STR_FIRST && state <= DEVINFO_STR_LAST))
672		{
673		cinfo.p = info->p;
674		(*set_info)(device, state, &cinfo);
675		}
676	667	break;
677	668	}
678	669	}
r4679	r4680
701	692	case DEVINFO_INT_CLASS:               info->i = DEVICE_CLASS_CPU_CHIP;         break;
702	693
703	694	/* --- the following bits of info are returned as pointers to data or functions --- */
704		case DEVINFO_FCT_SET_INFO:            info->set_info = DEVICE_SET_INFO_NAME(cpu); break;
705	695	case DEVINFO_FCT_START:               info->start = DEVICE_START_NAME(cpu);       break;
706	696	case DEVINFO_FCT_STOP:               info->stop = DEVICE_STOP_NAME(cpu);       break;
707	697	case DEVINFO_FCT_RESET:               info->reset = DEVICE_RESET_NAME(cpu);       break;
r4679	r4680
1515	1505	switch (state)
1516	1506	{
1517	1507	case PULSE_LINE:
1518		device_set_info_int(device, CPUINFO_INT_INPUT_STATE + param, ASSERT_LINE);
1519		device_set_info_int(device, CPUINFO_INT_INPUT_STATE + param, CLEAR_LINE);
	1508	cpu_set_info(device, CPUINFO_INT_INPUT_STATE + param, ASSERT_LINE);
	1509	cpu_set_info(device, CPUINFO_INT_INPUT_STATE + param, CLEAR_LINE);
1520	1510	break;
1521	1511
1522	1512	case HOLD_LINE:
1523	1513	case ASSERT_LINE:
1524		device_set_info_int(device, CPUINFO_INT_INPUT_STATE + param, ASSERT_LINE);
	1514	cpu_set_info(device, CPUINFO_INT_INPUT_STATE + param, ASSERT_LINE);
1525	1515	break;
1526	1516
1527	1517	case CLEAR_LINE:
1528		device_set_info_int(device, CPUINFO_INT_INPUT_STATE + param, CLEAR_LINE);
	1518	cpu_set_info(device, CPUINFO_INT_INPUT_STATE + param, CLEAR_LINE);
1529	1519	break;
1530	1520
1531	1521	default:
r4679	r4680
1562	1552	if (inputline->curstate == HOLD_LINE)
1563	1553	{
1564	1554	LOG(("->set_irq_line('%s',%d,%d)\n", device->tag, irqline, CLEAR_LINE));
1565		device_set_info_int(device, CPUINFO_INT_INPUT_STATE + irqline, CLEAR_LINE);
	1555	cpu_set_info(device, CPUINFO_INT_INPUT_STATE + irqline, CLEAR_LINE);
1566	1556	inputline->curstate = CLEAR_LINE;
1567	1557	}
1568	1558

src/emu/rendlay.c

r4679	r4680
217	217
218	218	INLINE const char *copy_string(const char *string)
219	219	{
220		char *newstring = (char *)malloc_or_die(strlen(string) + 1);
	220	char *newstring = alloc_array_or_die(char, strlen(string) + 1);
221	221	strcpy(newstring, string);
222	222	return newstring;
223	223	}
r4679	r4680
1509	1509	return NULL;
1510	1510
1511	1511	/* allocate the layout group object first */
1512		file = (layout_file *)malloc_or_die(sizeof(*file));
1513		memset(file, 0, sizeof(*file));
	1512	file = alloc_clear_or_die(layout_file);
1514	1513
1515	1514	/* find the layout node */
1516	1515	mamelayoutnode = xml_get_sibling(rootnode->child, "mamelayout");
r4679	r4680
1579	1578	int first;
1580	1579
1581	1580	/* allocate a new element */
1582		element = (layout_element *)malloc_or_die(sizeof(*element));
1583		memset(element, 0, sizeof(*element));
	1581	element = alloc_clear_or_die(layout_element);
1584	1582
1585	1583	/* extract the name */
1586	1584	name = xml_get_attribute_string_with_subst(config, elemnode, "name", NULL);
r4679	r4680
1642	1640	}
1643	1641
1644	1642	/* allocate an array of element textures for the states */
1645		element->elemtex = (element_texture *)malloc_or_die((element->maxstate + 1) * sizeof(element->elemtex[0]));
	1643	element->elemtex = alloc_array_or_die(element_texture, element->maxstate + 1);
1646	1644	for (state = 0; state <= element->maxstate; state++)
1647	1645	{
1648	1646	element->elemtex[state].element = element;
r4679	r4680
1668	1666	element_component *component;
1669	1667
1670	1668	/* allocate memory for the component */
1671		component = (element_component *)malloc_or_die(sizeof(*component));
1672		memset(component, 0, sizeof(*component));
	1669	component = alloc_clear_or_die(element_component);
1673	1670
1674	1671	/* fetch common data */
1675	1672	component->state = xml_get_attribute_int_with_subst(config, compnode, "state", -1);
r4679	r4680
1699	1696
1700	1697	/* allocate a copy of the string */
1701	1698	component->type = COMPONENT_TYPE_TEXT;
1702		string = (char *)malloc_or_die(strlen(text) + 1);
	1699	string = alloc_array_or_die(char, strlen(text) + 1);
1703	1700	strcpy(string, text);
1704	1701	component->string = string;
1705	1702	}
r4679	r4680
1756	1753	int layer;
1757	1754
1758	1755	/* first allocate memory */
1759		view = (layout_view *)malloc_or_die(sizeof(*view));
1760		memset(view, 0, sizeof(*view));
	1756	view = alloc_clear_or_die(layout_view);
1761	1757
1762	1758	/* allocate a copy of the name */
1763	1759	view->name = copy_string(xml_get_attribute_string_with_subst(config, viewnode, "name", ""));
r4679	r4680
1810	1806	const char *name;
1811	1807
1812	1808	/* allocate a new item */
1813		item = (view_item *)malloc_or_die(sizeof(*item));
1814		memset(item, 0, sizeof(*item));
	1809	item = alloc_clear_or_die(view_item);
1815	1810
1816	1811	/* allocate a copy of the output name */
1817	1812	item->output_name = copy_string(xml_get_attribute_string_with_subst(config, itemnode, "name", ""));

src/emu/cpuintrf.h

r4679	r4680
349	349	#define cpu_get_flags_string(cpu)         device_get_info_string(cpu, CPUINFO_STR_FLAGS)
350	350	#define cpu_get_irq_string(cpu, irq)      device_get_info_string(cpu, CPUINFO_STR_IRQ_STATE + (irq))
351	351	#define cpu_get_reg_string(cpu, reg)      device_get_info_string(cpu, CPUINFO_STR_REGISTER + (reg))
352		#define cpu_set_reg(cpu, reg, val)         device_set_info_int(cpu, CPUINFO_INT_REGISTER + (reg), (val))
353	352
	353	#define cpu_set_reg(cpu, reg, val)         cpu_set_info(cpu, CPUINFO_INT_REGISTER + (reg), (val))
354	354
355	355
	356
356	357	/***************************************************************************
357	358	TYPE DEFINITIONS
358	359	***************************************************************************/
r4679	r4680
448	449	};
449	450
450	451
	452	void cpu_set_info(const device_config *device, UINT32 state, UINT64 value);
451	453
452	454	#endif   /* __CPUINTRF_H__ */

src/emu/output.c

r4679	r4680
78	78
79	79	INLINE const char *copy_string(const char *string)
80	80	{
81		char *newstring = (char *)malloc_or_die(strlen(string) + 1);
	81	char *newstring = alloc_array_or_die(char, strlen(string) + 1);
82	82	strcpy(newstring, string);
83	83	return newstring;
84	84	}
r4679	r4680
118	118
119	119	INLINE output_item *create_new_item(const char *outname, INT32 value)
120	120	{
121		output_item *item = (output_item *)malloc_or_die(sizeof(*item));
	121	output_item *item = alloc_or_die(output_item);
122	122	UINT32 hash = get_hash(outname);
123	123
124	124	/* fill in the data */
r4679	r4680
343	343	/* find the end of the list and add to it */
344	344	while (*headptr != NULL)
345	345	headptr = &(*headptr)->next;
346		*headptr = (output_notify *)malloc_or_die(sizeof(**headptr));
	346	*headptr = alloc_or_die(output_notify);
347	347
348	348	/* fill in the new record */
349	349	(*headptr)->next = NULL;

src/emu/sound/sp0256.c

r4679	r4680
1201	1201	/* -------------------------------------------------------------------- */
1202	1202	/*  Allocate a scratch buffer for generating ~10kHz samples.             */
1203	1203	/* -------------------------------------------------------------------- */
1204		sp->scratch = (INT16 *)malloc_or_die(SCBUF_SIZE * sizeof(INT16));
	1204	sp->scratch = auto_alloc_array(device->machine, INT16, SCBUF_SIZE);
1205	1205	sp->sc_head = sp->sc_tail = 0;
1206	1206
1207	1207	/* -------------------------------------------------------------------- */
r4679	r4680
1220	1220	sp0256_bitrevbuff(sp->rom, 0, 0xffff);
1221	1221	}
1222	1222
1223		static DEVICE_STOP( sp0256 )
1224		{
1225		sp0256_state *sp = get_safe_token(device);
1226		free( sp->scratch );
1227		}
1228
1229	1223	static void sp0256_reset(sp0256_state *sp)
1230	1224	{
1231	1225	/* ---------------------------------------------------------------- */
r4679	r4680
1364	1358
1365	1359	/* --- the following bits of info are returned as pointers to data or functions --- */
1366	1360	case DEVINFO_FCT_START:                     info->start = DEVICE_START_NAME( sp0256 );         break;
1367		case DEVINFO_FCT_STOP:                     info->stop = DEVICE_STOP_NAME( sp0256 );         break;
1368	1361	case DEVINFO_FCT_RESET:                     info->reset = DEVICE_RESET_NAME( sp0256 );         break;
1369	1362
1370	1363	/* --- the following bits of info are returned as NULL-terminated strings --- */

src/emu/sound/tms5110.c

r4679	r4680
181	181	{
182	182	struct tms5110 *tms;
183	183
184		tms = (struct tms5110 *)malloc_or_die(sizeof(*tms));
185		memset(tms, 0, sizeof(*tms));
	184	tms = alloc_clear_or_die(struct tms5110);
186	185
187	186	tms->device = device;
188	187	tms5110_set_variant(tms, variant);

src/emu/sound/k051649.c

r4679	r4680
65	65	}
66	66
67	67	/* build a table to divide by the number of voices */
68		static void make_mixer_table(k051649_state *info, int voices)
	68	static void make_mixer_table(running_machine *machine, k051649_state *info, int voices)
69	69	{
70	70	int count = voices * 256;
71	71	int i;
72	72	int gain = 8;
73	73
74	74	/* allocate memory */
75		info->mixer_table = (INT16 *)auto_malloc(512 * voices * sizeof(INT16));
	75	info->mixer_table = auto_alloc_array(machine, INT16, 512 * voices);
76	76
77	77	/* find the middle of the table */
78	78	info->mixer_lookup = info->mixer_table + (256 * voices);
r4679	r4680
145	145	info->mclock = device->clock;
146	146
147	147	/* allocate a buffer to mix into - 1 second's worth should be more than enough */
148		info->mixer_buffer = (short *)auto_malloc(2 * sizeof(short) * info->rate);
	148	info->mixer_buffer = auto_alloc_array(device->machine, short, 2 * info->rate);
149	149
150	150	/* build the mixer table */
151		make_mixer_table(info, 5);
	151	make_mixer_table(device->machine, info, 5);
152	152	}
153	153
154	154	static DEVICE_RESET( k051649 )

src/emu/sound/k054539.c

r4679	r4680
455	455	info->k054539_flags |= K054539_UPDATE_AT_KEYON; //* make it default until proven otherwise
456	456
457	457	// Real size of 0x4000, the addon is to simplify the reverb buffer computations
458		info->ram = (unsigned char *)auto_malloc(0x4000*2+device->clock/50*2);
	458	info->ram = auto_alloc_array(device->machine, unsigned char, 0x4000*2+device->clock/50*2);
459	459	info->reverb_pos = 0;
460	460	info->cur_ptr = 0;
461	461	memset(info->ram, 0, 0x4000*2+device->clock/50*2);

src/emu/sound/c140.c

r4679	r4680
496	496	}
497	497
498	498	/* allocate a pair of buffers to mix into - 1 second's worth should be more than enough */
499		info->mixer_buffer_left = (INT16 *)auto_malloc(2 * sizeof(INT16)*info->sample_rate );
	499	info->mixer_buffer_left = auto_alloc_array(device->machine, INT16, 2 * info->sample_rate);
500	500	info->mixer_buffer_right = info->mixer_buffer_left + info->sample_rate;
501	501	}
502	502

src/emu/sound/qsound.c

r4679	r4680
239	239	ch=(ch+1)&0x0f;   /* strange ... */
240	240	chip->channel[ch].bank=(value&0x7f)<<16;
241	241	#ifdef MAME_DEBUG
242		if (!value & 0x8000)
	242	if (!(value & 0x8000))
243	243	popmessage("Register3=%04x",value);
244	244	#endif
245	245

src/emu/sound/cem3394.c

r4679	r4680
344	344	chip->filter_zero_freq = intf->filter_zero_freq;
345	345
346	346	/* allocate memory for a mixer buffer and external buffer (1 second should do it!) */
347		chip->mixer_buffer = (INT16 *)auto_malloc(chip->sample_rate * sizeof(INT16));
348		chip->external_buffer = (INT16 *)auto_malloc(chip->sample_rate * sizeof(INT16));
	347	chip->mixer_buffer = auto_alloc_array(device->machine, INT16, chip->sample_rate);
	348	chip->external_buffer = auto_alloc_array(device->machine, INT16, chip->sample_rate);
349	349
350	350	state_save_register_device_item_array(device, 0, chip->values);
351	351	state_save_register_device_item(device, 0, chip->wave_select);

src/emu/sound/sidvoice.c

r4679	r4680
26	26
27	27	static const UINT32 noiseSeed = 0x7ffff8;
28	28
29		void sidInitMixerEngine(void)
	29	void sidInitMixerEngine(running_machine *machine)
30	30	{
31	31	UINT16 uk;
32	32	INT32 si, sj    ;
r4679	r4680
34	34	/* 8-bit volume modulation tables. */
35	35	float filterAmpl = 0.7f;
36	36
37		ampMod1x8=(INT8*) auto_malloc(256*256);
	37	ampMod1x8=auto_alloc_array(machine, INT8, 256*256);
38	38
39	39	uk = 0;
40	40	for ( si = 0; si < 256; si++ )

src/emu/sound/sidvoice.h

r4679	r4680
107	107	INT8 sidWaveCalcNormal(sidOperator* pVoice);
108	108
109	109	void sidInitWaveformTables(SIDTYPE type);
110		void sidInitMixerEngine(void);
	110	void sidInitMixerEngine(running_machine *machine);
111	111
112	112	#if 0
113	113	extern ptr2sidVoidFunc sid6581ModeNormalTable[16];

src/emu/sound/ymz280b.c

r4679	r4680
659	659	chip->stream = stream_create(device, 0, 2, INTERNAL_SAMPLE_RATE, chip, ymz280b_update);
660	660
661	661	/* allocate memory */
662		chip->scratch = (INT16 *)auto_malloc(sizeof(chip->scratch[0]) * MAX_SAMPLE_CHUNK);
	662	chip->scratch = auto_alloc_array(device->machine, INT16, MAX_SAMPLE_CHUNK);
663	663
664	664	/* state save */
665	665	{

src/emu/sound/k005289.c

r4679	r4680
71	71	}
72	72
73	73	/* build a table to divide by the number of voices */
74		static void make_mixer_table(k005289_state *info, int voices)
	74	static void make_mixer_table(running_machine *machine, k005289_state *info, int voices)
75	75	{
76	76	int count = voices * 128;
77	77	int i;
78	78	int gain = 16;
79	79
80	80	/* allocate memory */
81		info->mixer_table = (INT16 *)auto_malloc(256 * voices * sizeof(INT16));
	81	info->mixer_table = auto_alloc_array(machine, INT16, 256 * voices);
82	82
83	83	/* find the middle of the table */
84	84	info->mixer_lookup = info->mixer_table + (128 * voices);
r4679	r4680
171	171	info->mclock = device->clock;
172	172
173	173	/* allocate a pair of buffers to mix into - 1 second's worth should be more than enough */
174		info->mixer_buffer = (short *)auto_malloc(2 * sizeof(short) * info->rate);
	174	info->mixer_buffer = auto_alloc_array(device->machine, short, 2 * info->rate);
175	175
176	176	/* build the mixer table */
177		make_mixer_table(info, 2);
	177	make_mixer_table(device->machine, info, 2);
178	178
179	179	info->sound_prom = device->region;
180	180

src/emu/sound/votrax.c

r4679	r4680
30	30	int    volume;
31	31	sound_stream *    channel;
32	32
33		struct loaded_sample *sample;
	33	loaded_sample *sample;
34	34	UINT32      pos;
35	35	UINT32      frac;
36	36	UINT32      step;
r4679	r4680
116	116	votrax_state *votrax = get_safe_token(device);
117	117
118	118	votrax->device = device;
119		votrax->samples = readsamples(VotraxTable,"votrax");
	119	votrax->samples = readsamples(device->machine,VotraxTable,"votrax");
120	120	votrax->frequency = 8000;
121	121	votrax->volume = 230;
122	122

src/emu/sound/aica.c

r4679	r4680
647	647	}
648	648
649	649	AICALFO_Init(device->machine);
650		AICA->buffertmpl=(signed int*) auto_malloc(44100*sizeof(signed int));
651		AICA->buffertmpr=(signed int*) auto_malloc(44100*sizeof(signed int));
652		memset(AICA->buffertmpl,0,44100*sizeof(signed int));
653		memset(AICA->buffertmpr,0,44100*sizeof(signed int));
	650	AICA->buffertmpl=auto_alloc_array_clear(device->machine, signed int, 44100);
	651	AICA->buffertmpr=auto_alloc_array_clear(device->machine, signed int, 44100);
654	652
655	653	// no "pend"
656	654	AICA[0].udata.data[0xa0/2] = 0;

src/emu/sound/sn76496.c

r4679	r4680
32	32	23/04/2007 : Lord Nightmare
33	33	Major update, implement all three different noise generation algorithms and a
34	34	set_variant call to discern among them.
35
	35
36	36	28/04/2009 : Lord Nightmare
37	37	Add READY line readback; cleaned up struct a bit. Cleaned up comments.
38	38	Add more TODOs. Fixed some unsaved savestate related stuff.
39	39
40	40	TODO: * Implement a function for setting stereo regs for the game gear.
41		Requires making the core support both mono and stereo, and have
42		a select register which determines which channels go where.
43		* Implement the TMS9919 and SN94624, which are earlier versions,
44		possibly lacking the /8 clock divider, of the SN76489, and hence
45		would have a max clock of 500Khz and 4 clocks per sample, as
46		opposed to max of 4Mhz and 32 clocks per sample on the SN76489A
47		* Implement the T6W28; has registers in a weird order, needs writes
48		to be 'sanitized' first. Also is stereo, similar to game gear.
49		* Implement the NCR 7496; Is probably 100% compatible with SN76496,
50		but the whitenoise taps could be different. Needs someone with a
51		Tandy 1200 or whatever it was which uses this to run some tests.
52		* Factor out common code so that the SAA1099 can share some code.
	41	Requires making the core support both mono and stereo, and have
	42	a select register which determines which channels go where.
	43	* Implement the TMS9919 and SN94624, which are earlier versions,
	44	possibly lacking the /8 clock divider, of the SN76489, and hence
	45	would have a max clock of 500Khz and 4 clocks per sample, as
	46	opposed to max of 4Mhz and 32 clocks per sample on the SN76489A
	47	* Implement the T6W28; has registers in a weird order, needs writes
	48	to be 'sanitized' first. Also is stereo, similar to game gear.
	49	* Implement the NCR 7496; Is probably 100% compatible with SN76496,
	50	but the whitenoise taps could be different. Needs someone with a
	51	Tandy 1200 or whatever it was which uses this to run some tests.
	52	* Factor out common code so that the SAA1099 can share some code.
53	53	***************************************************************************/
54	54
55	55	#include "sndintrf.h"
r4679	r4680
111	111	/* update the output buffer before changing the registers */
112	112	stream_update(R->Channel);
113	113
114		/* set number of cycles until READY is active; this is always one 'sample', i.e. it equals the clock divider exactly; until the clock divider is fully supported, we delay until one sample has played */
	114	/* set number of cycles until READY is active; this is always one
	115	'sample', i.e. it equals the clock divider exactly; until the
	116	clock divider is fully supported, we delay until one sample has
	117	played. The fact that this below is '2' and not '1' is because
	118	of a ?race condition? in the mess crvision driver, where after
	119	any sample is played at all, no matter what, the cycles_to_ready
	120	ends up never being not ready, unless this value is greater than
	121	1. Once the full clock divider stuff is written, this should no
	122	longer be an issue. */
115	123	R->CyclestoREADY = 2;
116	124
117	125	if (data & 0x80)
r4679	r4680
154	162	/* N/512,N/1024,N/2048,Tone #3 output */
155	163	R->Period[3] = ((n&3) == 3) ? 2 * R->Period[2] : (STEP << (5+(n&3)));
156	164	/* Reset noise shifter */
157		R->RNG = R->FeedbackMask;
	165	R->RNG = R->FeedbackMask;
158	166	R->Output[3] = R->RNG & 1;
159	167	}
160	168	break;
r4679	r4680
171	179
172	180
173	181	/* If the volume is 0, increase the counter; this is more or less
174		a speedup hack for when silence is to be output */
	182	a speedup hack for when silence is to be output */
175	183	for (i = 0;i < 4;i++)
176	184	{
177	185	if (R->Volume[i] == 0)
178	186	{
179		/* note that I do count += samples, NOT count = samples + 1.
180		You might think it's the same since the volume is 0, but doing
181		the latter could cause interferencies when the program is
182		rapidly modulating the volume. */
	187	/* note that I do count += samples, NOT count = samples + 1.
	188	You might think it's the same since the volume is 0, but doing
	189	the latter could cause interferencies when the program is
	190	rapidly modulating the volume. */
183	191	if (R->Count[i] <= samples*STEP) R->Count[i] += samples*STEP;
184	192	}
185	193	}
r4679	r4680
189	197	int vol[4];
190	198	unsigned int out;
191	199	int left;
192
	200
193	201	/* decrement Cycles to READY by one */
194	202	if (R->CyclestoREADY >0) R->CyclestoREADY--;
195	203
r4679	r4680
201	209	{
202	210	if (R->Output[i]) vol[i] += R->Count[i];
203	211	R->Count[i] -= STEP;
204		/* Period[i] is the half period of the square wave. Here, in each
205		loop I add Period[i] twice, so that at the end of the loop the
206		square wave is in the same status (0 or 1) it was at the start.
207		vol[i] is also incremented by Period[i], since the wave has been 1
208		exactly half of the time, regardless of the initial position.
209		If we exit the loop in the middle, Output[i] has to be inverted
210		and vol[i] incremented only if the exit status of the square
211		wave is 1. */
	212	/* Period[i] is the half period of the square wave. Here, in each
	213	loop I add Period[i] twice, so that at the end of the loop the
	214	square wave is in the same status (0 or 1) it was at the start.
	215	vol[i] is also incremented by Period[i], since the wave has been 1
	216	exactly half of the time, regardless of the initial position.
	217	If we exit the loop in the middle, Output[i] has to be inverted
	218	and vol[i] incremented only if the exit status of the square
	219	wave is 1. */
212	220	while (R->Count[i] <= 0)
213	221	{
214	222	R->Count[i] += R->Period[i];

src/emu/sound/wave.c

r4679	r4680
34	34	state = cassette_get_state(image);
35	35
36	36	state &= CASSETTE_MASK_UISTATE | CASSETTE_MASK_MOTOR | CASSETTE_MASK_SPEAKER;
37
	37
38	38	if (image_exists(image) && (ALWAYS_PLAY_SOUND || (state == (CASSETTE_PLAY | CASSETTE_MOTOR_ENABLED | CASSETTE_SPEAKER_ENABLED))))
39	39	{
40	40	cassette = cassette_get_image(image);

src/emu/sound/sid.c

r4679	r4680
166	166	float resDyMin;
167	167	float resDy;
168	168
169		filterTable = auto_malloc(sizeof(*filterTable) * 0x800);
170		bandPassParam = auto_malloc(sizeof(*bandPassParam) * 0x800);
	169	filterTable = auto_alloc_array(machine, float, 0x800);
	170	bandPassParam = auto_alloc_array(machine, float, 0x800);
171	171
172	172	uk = 0;
173	173	for ( rk = 0; rk < 0x800; rk++ )
r4679	r4680
233	233
234	234	This->filter.Enabled = TRUE;
235	235
236		sidInitMixerEngine();
	236	sidInitMixerEngine(This->device->machine);
237	237	filterTableInit(This->device->machine);
238	238
239	239	sidInitWaveformTables(This->type);

src/emu/sound/ymf271.c

r4679	r4680
1568	1568	return 0;
1569	1569	}
1570	1570
1571		static void init_tables(void)
	1571	static void init_tables(running_machine *machine)
1572	1572	{
1573	1573	int i,j;
1574	1574
1575	1575	for (i=0; i < ARRAY_LENGTH(wavetable); i++)
1576	1576	{
1577		wavetable[i] = (INT16 *)auto_malloc(SIN_LEN * sizeof(INT16));
	1577	wavetable[i] = auto_alloc_array(machine, INT16, SIN_LEN);
1578	1578	}
1579	1579
1580	1580	for (i=0; i < SIN_LEN; i++)
r4679	r4680
1652	1652	alfo_table[3][i] = (i < (LFO_LENGTH/2)) ? ALFO_MAX-tri_wave : tri_wave;
1653	1653	}
1654	1654
1655		mix = (INT32 *)auto_malloc(48000*2*sizeof(*mix));
	1655	mix = auto_alloc_array(machine, INT32, 48000*2);
1656	1656	}
1657	1657
1658	1658	static void init_state(YMF271Chip *chip, const device_config *device)
r4679	r4680
1741	1741	devcb_resolve_read8(&chip->ext_mem_read, ext_read, device);
1742	1742	devcb_resolve_write8(&chip->ext_mem_write, ext_write, device);
1743	1743
1744		init_tables();
	1744	init_tables(device->machine);
1745	1745	init_state(chip, device);
1746	1746	}
1747	1747

src/emu/sound/ay8910.c

r4679	r4680
743	743	ay8910_context *info = (ay8910_context *)infoptr;
744	744
745	745	if (info == NULL)
746		{
747		info = (ay8910_context *)auto_malloc(sizeof(*info));
748		memset(info, 0, sizeof(*info));
749		}
	746	info = auto_alloc_clear(device->machine, ay8910_context);
	747
750	748	info->device = device;
751	749	info->intf = intf;
752	750	devcb_resolve_read8(&info->portAread, &intf->portAread, device);

src/emu/sound/cdda.c

r4679	r4680
59	59	cdda_info *info = get_safe_token(device);
60	60
61	61	/* allocate an audio cache */
62		info->audio_cache = (UINT8 *)auto_malloc( CD_MAX_SECTOR_DATA * MAX_SECTORS );
	62	info->audio_cache = auto_alloc_array( device->machine, UINT8, CD_MAX_SECTOR_DATA * MAX_SECTORS );
63	63
64	64	intf = (const struct CDDAinterface *)device->static_config;
65	65

src/emu/sound/discrete.c

r4679	r4680
292	292	discrete_log("discrete_start() - Sanity check counted %d nodes", info->node_count);
293	293
294	294	/* allocate memory for the array of actual nodes */
295		info->node_list = (node_description *)auto_malloc(info->node_count * sizeof(info->node_list[0]));
296		memset(info->node_list, 0, info->node_count * sizeof(info->node_list[0]));
	295	info->node_list = auto_alloc_array_clear(device->machine, node_description, info->node_count);
297	296
298	297	/* allocate memory for the node execution order array */
299		info->running_order = (node_description **)auto_malloc(info->node_count * sizeof(info->running_order[0]));
300		memset(info->running_order, 0, info->node_count * sizeof(info->running_order[0]));
	298	info->running_order = auto_alloc_array_clear(device->machine, node_description *, info->node_count);
301	299
302	300	/* allocate memory to hold pointers to nodes by index */
303		info->indexed_node = (node_description **)auto_malloc(DISCRETE_MAX_NODES * sizeof(info->indexed_node[0]));
304		memset(info->indexed_node, 0, DISCRETE_MAX_NODES * sizeof(info->indexed_node[0]));
	301	info->indexed_node = auto_alloc_array_clear(device->machine, node_description *, DISCRETE_MAX_NODES);
305	302
306	303	/* initialize the node data */
307	304	init_nodes(info, intf, device);
r4679	r4680
605	602
606	603	/* allocate memory if necessary */
607	604	if (node->module.contextsize)
608		{
609		node->context = auto_malloc(node->module.contextsize);
610		memset(node->context, 0, node->module.contextsize);
611		}
	605	node->context = auto_alloc_array_clear(device->machine, UINT8, node->module.contextsize);
612	606
613	607	/* if we are an stream input node, track that */
614	608	if (block->type == DSS_INPUT_STREAM)

src/emu/sound/samples.c

r4679	r4680
25	25	const device_config *device;
26	26	int         numchannels;   /* how many channels */
27	27	sample_channel *channel;/* array of channels */
28		struct loaded_samples *samples;/* array of samples */
	28	loaded_samples *samples;/* array of samples */
29	29	};
30	30
31	31
r4679	r4680
50	50	read_wav_sample - read a WAV file as a sample
51	51	-------------------------------------------------*/
52	52
53		static int read_wav_sample(mame_file *f, struct loaded_sample *sample)
	53	static int read_wav_sample(running_machine *machine, mame_file *f, loaded_sample *sample)
54	54	{
55	55	unsigned long offset = 0;
56	56	UINT32 length, rate, filesize;
r4679	r4680
153	153	unsigned char *tempptr;
154	154	int sindex;
155	155
156		sample->data = (INT16 *)auto_malloc(sizeof(*sample->data) * length);
	156	sample->data = auto_alloc_array(machine, INT16, length);
157	157	mame_fread(f, sample->data, length);
158	158
159	159	/* convert 8-bit data to signed samples */
r4679	r4680
164	164	else
165	165	{
166	166	/* 16-bit data is fine as-is */
167		sample->data = (INT16 *)auto_malloc(sizeof(*sample->data) * (length/2));
	167	sample->data = auto_alloc_array(machine, INT16, length/2);
168	168	mame_fread(f, sample->data, length);
169	169	sample->length /= 2;
170	170	if (ENDIANNESS_NATIVE != ENDIANNESS_LITTLE)
r4679	r4680
179	179	readsamples - load all samples
180	180	-------------------------------------------------*/
181	181
182		struct loaded_samples *readsamples(const char *const *samplenames, const char *basename)
	182	loaded_samples *readsamples(running_machine *machine, const char *const *samplenames, const char *basename)
183	183	{
184		struct loaded_samples *samples;
	184	loaded_samples *samples;
185	185	int skipfirst = 0;
186	186	int i;
187	187
r4679	r4680
201	201	return NULL;
202	202
203	203	/* allocate the array */
204		samples = (struct loaded_samples *)auto_malloc(sizeof(struct loaded_samples) + (i-1) * sizeof(struct loaded_sample));
205		memset(samples, 0, sizeof(struct loaded_samples) + (i-1) * sizeof(struct loaded_sample));
	204	samples = (loaded_samples *)auto_alloc_array_clear(machine, UINT8, sizeof(loaded_samples) + (i-1) * sizeof(loaded_sample));
206	205	samples->total = i;
207	206
208	207	/* load the samples */
r4679	r4680
223	222	}
224	223	if (filerr == FILERR_NONE)
225	224	{
226		read_wav_sample(f, &samples->sample[i]);
	225	read_wav_sample(machine, f, &samples->sample[i]);
227	226	mame_fclose(f);
228	227	}
229	228
r4679	r4680
243	242	{
244	243	samples_info *info = get_safe_token(device);
245	244	sample_channel *chan;
246		struct loaded_sample *sample;
	245	loaded_sample *sample;
247	246
248	247	/* if samples are disabled, just return quietly */
249	248	if (info->samples == NULL)
r4679	r4680
450	449	/* attach any samples that were loaded and playing */
451	450	if (chan->source_num >= 0 && chan->source_num < info->samples->total)
452	451	{
453		struct loaded_sample *sample = &info->samples->sample[chan->source_num];
	452	loaded_sample *sample = &info->samples->sample[chan->source_num];
454	453	chan->source = sample->data;
455	454	chan->source_length = sample->length;
456	455	if (!sample->data)
r4679	r4680
482	481
483	482	/* read audio samples */
484	483	if (intf->samplenames)
485		info->samples = readsamples(intf->samplenames,device->machine->gamedrv->name);
	484	info->samples = readsamples(device->machine, intf->samplenames,device->machine->gamedrv->name);
486	485
487	486	/* allocate channels */
488	487	info->numchannels = intf->channels;
489	488	assert(info->numchannels < MAX_CHANNELS);
490		info->channel = (sample_channel *)auto_malloc(sizeof(*info->channel) * info->numchannels);
	489	info->channel = auto_alloc_array(device->machine, sample_channel, info->numchannels);
491	490	for (i = 0; i < info->numchannels; i++)
492	491	{
493	492	info->channel[i].stream = stream_create(device, 0, 1, device->machine->sample_rate, &info->channel[i], sample_update_sound);

src/emu/sound/scsp.c

r4679	r4680
648	648	}
649	649
650	650	LFO_Init(device->machine);
651		SCSP->buffertmpl=(signed int*) auto_malloc(44100*sizeof(signed int));
652		SCSP->buffertmpr=(signed int*) auto_malloc(44100*sizeof(signed int));
653		memset(SCSP->buffertmpl,0,44100*sizeof(signed int));
654		memset(SCSP->buffertmpr,0,44100*sizeof(signed int));
	651	SCSP->buffertmpl=auto_alloc_array_clear(device->machine, signed int, 44100);
	652	SCSP->buffertmpr=auto_alloc_array_clear(device->machine, signed int, 44100);
655	653
656	654	// no "pend"
657	655	SCSP[0].udata.data[0x20/2] = 0;

src/emu/sound/samples.h

r4679	r4680
3	3	#ifndef __SAMPLES_H__
4	4	#define __SAMPLES_H__
5	5
6		struct loaded_sample
	6	typedef struct _loaded_sample loaded_sample;
	7	struct _loaded_sample
7	8	{
8	9	int         length;         /* length in samples */
9	10	int         frequency;      /* frequency of the sample */
10	11	INT16 *     data;           /* 16-bit signed data */
11	12	};
12	13
13		struct loaded_samples
	14	typedef struct _loaded_samples loaded_samples;
	15	struct _loaded_samples
14	16	{
15	17	int         total;          /* number of samples */
16		struct loaded_sample sample[1]; /* array of samples */
	18	loaded_sample sample[1]; /* array of samples */
17	19	};
18	20
19	21	typedef struct _samples_interface samples_interface;
r4679	r4680
38	40
39	41	/* helper function that reads samples from disk - this can be used by other */
40	42	/* drivers as well (e.g. a sound chip emulator needing drum samples) */
41		struct loaded_samples *readsamples(const char *const *samplenames, const char *name);
	43	loaded_samples *readsamples(running_machine *machine, const char *const *samplenames, const char *name);
42	44
43	45	DEVICE_GET_INFO( samples );
44	46	#define SOUND_SAMPLES DEVICE_GET_INFO_NAME( samples )

src/emu/sound/ics2115.c

r4679	r4680
459	459	chip->rom = device->region;
460	460	chip->timer[0].timer = timer_alloc(device->machine, timer_cb_0, chip);
461	461	chip->timer[1].timer = timer_alloc(device->machine, timer_cb_1, chip);
462		chip->ulaw = (INT16 *)auto_malloc(256*sizeof(INT16));
	462	chip->ulaw = auto_alloc_array(device->machine, INT16, 256);
463	463	chip->stream = stream_create(device, 0, 2, 33075, chip, update);
464	464
465	465	for(i=0; i<256; i++) {

src/emu/sound/dmadac.c

r4679	r4680
106	106	dmadac_state *info = get_safe_token(device);
107	107
108	108	/* allocate a clear a buffer */
109		info->buffer = (INT16 *)auto_malloc(sizeof(info->buffer[0]) * BUFFER_SIZE);
110		memset(info->buffer, 0, sizeof(info->buffer[0]) * BUFFER_SIZE);
	109	info->buffer = auto_alloc_array_clear(device->machine, INT16, BUFFER_SIZE);
111	110
112	111	/* reset the state */
113	112	info->volume = 0x100;

src/emu/sound/filter.c

r4679	r4680
2	2	#include "filter.h"
3	3
4	4	static filter* filter_alloc(void) {
5		filter* f = (filter *)malloc_or_die(sizeof(filter));
	5	filter* f = alloc_or_die(filter);
6	6	return f;
7	7	}
8	8
r4679	r4680
20	20
21	21	filter_state* filter_state_alloc(void) {
22	22	int i;
23		filter_state* s = (filter_state *)malloc_or_die(sizeof(filter_state));
	23	filter_state* s = alloc_or_die(filter_state);
24	24	s->prev_mac = 0;
25	25	for(i=0;i<FILTER_ORDER_MAX;++i)
26	26	s->xprev[i] = 0;

src/emu/sound/es5506.c

r4679	r4680
194	194	int i;
195	195
196	196	/* allocate ulaw lookup table */
197		chip->ulaw_lookup = (INT16 *)auto_malloc(sizeof(chip->ulaw_lookup[0]) << ULAW_MAXBITS);
	197	chip->ulaw_lookup = auto_alloc_array(chip->device->machine, INT16, 1 << ULAW_MAXBITS);
198	198
199	199	/* generate ulaw lookup table */
200	200	for (i = 0; i < (1 << ULAW_MAXBITS); i++)
r4679	r4680
213	213	}
214	214
215	215	/* allocate volume lookup table */
216		chip->volume_lookup = (UINT16 *)auto_malloc(sizeof(chip->volume_lookup[0]) * 4096);
	216	chip->volume_lookup = auto_alloc_array(chip->device->machine, UINT16, 4096);
217	217
218	218	/* generate ulaw lookup table */
219	219	for (i = 0; i < 4096; i++)
r4679	r4680
842	842	if (LOG_COMMANDS && !eslog)
843	843	eslog = fopen("es.log", "w");
844	844
845		/* compute the tables */
846		compute_tables(chip);
847
848	845	/* create the stream */
849	846	chip->stream = stream_create(device, 0, 2, device->clock / (16*32), chip, es5506_update);
850	847
r4679	r4680
860	857	chip->irq_callback = intf->irq_callback;
861	858	chip->irqv = 0x80;
862	859
	860	/* compute the tables */
	861	compute_tables(chip);
	862
863	863	/* init the voices */
864	864	accum_mask = (sndtype == SOUND_ES5506) ? 0xffffffff : 0x7fffffff;
865	865	for (j = 0; j < 32; j++)
r4679	r4680
873	873	}
874	874
875	875	/* allocate memory */
876		chip->scratch = (INT32 *)auto_malloc(sizeof(chip->scratch[0]) * 2 * MAX_SAMPLE_CHUNK);
	876	chip->scratch = auto_alloc_array(device->machine, INT32, 2 * MAX_SAMPLE_CHUNK);
877	877
878	878	/* success */
879	879	}

src/emu/sound/ymf278b.c

r4679	r4680
676	676	chip->irq_line = CLEAR_LINE;
677	677	chip->clock = device->clock;
678	678
679		mix = (INT32 *)auto_malloc(44100*2*sizeof(*mix));
	679	mix = auto_alloc_array(device->machine, INT32, 44100*2);
680	680	}
681	681
682	682	static DEVICE_START( ymf278b )

src/emu/sound/psx.c

r4679	r4680
35	35	#define SAMPLES_PER_BLOCK ( 28 )
36	36	#define PITCH_SHIFT ( 12 )
37	37
	38	typedef enum { e_attack = 0, e_decay, e_sustain, e_sustainEnd, e_release, e_releaseend } sound_envstate;
	39
38	40	struct psxinfo
39	41	{
40	42	const psx_spu_interface *intf;
r4679	r4680
66	68	UINT16 m_p_n_pitch[ MAX_CHANNEL ];
67	69	UINT16 m_p_n_address[ MAX_CHANNEL ];
68	70	UINT16 m_p_n_envelopestate[ MAX_CHANNEL ];
69		enum envstate { e_attack = 0, e_decay, e_sustain, e_sustainEnd, e_release, e_releaseend } m_envstate;
	71	sound_envstate m_envstate;
70	72	UINT16 m_p_n_attackdecaysustain[ MAX_CHANNEL ];
71	73	UINT16 m_p_n_sustainrelease[ MAX_CHANNEL ];
72	74	UINT16 m_p_n_adsrvolume[ MAX_CHANNEL ];
r4679	r4680
329	331	chip->m_p_n_effect[ n_effect ] = 0;
330	332	}
331	333
332		chip->m_p_n_spuram = (UINT16 *)auto_malloc( SPU_RAM_SIZE );
	334	chip->m_p_n_spuram = auto_alloc_array( device->machine, UINT16, SPU_RAM_SIZE/2 );
333	335
334	336	state_save_register_device_item( device, 0, chip->m_n_mainvolumeleft );
335	337	state_save_register_device_item( device, 0, chip->m_n_mainvolumeright );

src/emu/sound/k053260.c

r4679	r4680
233	233	for ( i = 0; i < 0x30; i++ )
234	234	ic->regs[i] = 0;
235	235
236		ic->delta_table = ( UINT32 * )auto_malloc( 0x1000 * sizeof( UINT32 ) );
	236	ic->delta_table = auto_alloc_array( device->machine, UINT32, 0x1000 );
237	237
238	238	ic->channel = stream_create( device, 0, 2, rate, ic, k053260_update );
239	239

src/emu/sound/segapcm.c

r4679	r4680
93	93	segapcm_state *spcm = get_safe_token(device);
94	94
95	95	spcm->rom = (const UINT8 *)device->region;
96		spcm->ram = (UINT8 *)auto_malloc(0x800);
	96	spcm->ram = auto_alloc_array(device->machine, UINT8, 0x800);
97	97
98	98	memset(spcm->ram, 0xff, 0x800);
99	99

src/emu/sound/namco.c

r4679	r4680
117	117
118	118
119	119	/* build the decoded waveform table */
120		static void build_decoded_waveform(namco_sound *chip, UINT8 *rgnbase)
	120	static void build_decoded_waveform(running_machine *machine, namco_sound *chip, UINT8 *rgnbase)
121	121	{
122	122	INT16 *p;
123	123	int size;
r4679	r4680
139	139	size = 32 * 8;      /* 32 samples, 8 waveforms */
140	140	}
141	141
142		p = (INT16 *)auto_malloc(size * MAX_VOLUME * sizeof (INT16));
	142	p = auto_alloc_array(machine, INT16, size * MAX_VOLUME);
143	143
144	144	for (v = 0; v < MAX_VOLUME; v++)
145	145	{
r4679	r4680
388	388	logerror("Namco: freq fractional bits = %d: internal freq = %d, output freq = %d\n", chip->f_fracbits, chip->namco_clock, chip->sample_rate);
389	389
390	390	/* build the waveform table */
391		build_decoded_waveform(chip, device->region);
	391	build_decoded_waveform(device->machine, chip, device->region);
392	392
393	393	/* get stream channels */
394	394	if (intf->stereo)

src/emu/sound/tms5220.c

r4679	r4680
179	179	{
180	180	struct tms5220 *tms;
181	181
182		tms = (struct tms5220 *)malloc_or_die(sizeof(*tms));
183		memset(tms, 0, sizeof(*tms));
	182	tms = alloc_clear_or_die(struct tms5220);
184	183
185	184	tms->device = device;
186	185	state_save_register_device_item_array(device, 0, tms->fifo);

src/emu/inputseq.c

r4679	r4680
511	511
512	512	int input_seq_from_tokens(const char *string, input_seq *seq)
513	513	{
514		char *strcopy = (char *)malloc_or_die(strlen(string) + 1);
	514	char *strcopy = alloc_array_or_die(char, strlen(string) + 1);
515	515	char *str = strcopy;
516	516	int result = FALSE;
517	517

src/emu/ui.c

r4679	r4680
98	98	static UINT32 handler_load_save(running_machine *machine, UINT32 state);
99	99
100	100	/* slider controls */
101		static slider_state *slider_alloc(const char *title, INT32 minval, INT32 defval, INT32 maxval, INT32 incval, slider_update update, void *arg);
	101	static slider_state *slider_alloc(running_machine *machine, const char *title, INT32 minval, INT32 defval, INT32 maxval, INT32 incval, slider_update update, void *arg);
102	102	static slider_state *slider_init(running_machine *machine);
103	103	static INT32 slider_volume(running_machine *machine, void *arg, astring *string, INT32 newval);
104	104	static INT32 slider_mixervol(running_machine *machine, void *arg, astring *string, INT32 newval);
r4679	r4680
1397	1397	slider_alloc - allocate a new slider entry
1398	1398	-------------------------------------------------*/
1399	1399
1400		static slider_state *slider_alloc(const char *title, INT32 minval, INT32 defval, INT32 maxval, INT32 incval, slider_update update, void *arg)
	1400	static slider_state *slider_alloc(running_machine *machine, const char *title, INT32 minval, INT32 defval, INT32 maxval, INT32 incval, slider_update update, void *arg)
1401	1401	{
1402	1402	int size = sizeof(slider_state) + strlen(title);
1403		slider_state *state = (slider_state *)auto_malloc(size);
1404		memset(state, 0, size);
	1403	slider_state *state = (slider_state *)auto_alloc_array_clear(machine, UINT8, size);
1405	1404
1406	1405	state->minval = minval;
1407	1406	state->defval = defval;
r4679	r4680
1431	1430	int numitems, item;
1432	1431
1433	1432	/* add overall volume */
1434		*tailptr = slider_alloc("Master Volume", -32, 0, 0, 1, slider_volume, NULL);
	1433	*tailptr = slider_alloc(machine, "Master Volume", -32, 0, 0, 1, slider_volume, NULL);
1435	1434	tailptr = &(*tailptr)->next;
1436	1435
1437	1436	/* add per-channel volume */
r4679	r4680
1445	1444	maxval = 2 * defval;
1446	1445
1447	1446	astring_printf(string, "%s Volume", sound_get_user_gain_name(machine, item));
1448		*tailptr = slider_alloc(astring_c(string), 0, defval, maxval, 20, slider_mixervol, (void *)(FPTR)item);
	1447	*tailptr = slider_alloc(machine, astring_c(string), 0, defval, maxval, 20, slider_mixervol, (void *)(FPTR)item);
1449	1448	tailptr = &(*tailptr)->next;
1450	1449	}
1451	1450
r4679	r4680
1455	1454	if (field->type == IPT_ADJUSTER)
1456	1455	{
1457	1456	void *param = (void *)field;
1458		*tailptr = slider_alloc(field->name, 0, field->defvalue, 100, 1, slider_adjuster, param);
	1457	*tailptr = slider_alloc(machine, field->name, 0, field->defvalue, 100, 1, slider_adjuster, param);
1459	1458	tailptr = &(*tailptr)->next;
1460	1459	}
1461	1460
r4679	r4680
1466	1465	if (machine->cpu[item] != NULL)
1467	1466	{
1468	1467	astring_printf(string, "Overclock CPU %s", machine->cpu[item]->tag);
1469		*tailptr = slider_alloc(astring_c(string), 10, 1000, 2000, 1, slider_overclock, (void *)(FPTR)item);
	1468	*tailptr = slider_alloc(machine, astring_c(string), 10, 1000, 2000, 1, slider_overclock, (void *)(FPTR)item);
1470	1469	tailptr = &(*tailptr)->next;
1471	1470	}
1472	1471	}
r4679	r4680
1485	1484	if (options_get_bool(mame_options(), OPTION_CHEAT))
1486	1485	{
1487	1486	astring_printf(string, "%s Refresh Rate", slider_get_screen_desc(device));
1488		*tailptr = slider_alloc(astring_c(string), -10000, 0, 10000, 1000, slider_refresh, param);
	1487	*tailptr = slider_alloc(machine, astring_c(string), -10000, 0, 10000, 1000, slider_refresh, param);
1489	1488	tailptr = &(*tailptr)->next;
1490	1489	}
1491	1490
1492	1491	/* add standard brightness/contrast/gamma controls per-screen */
1493	1492	astring_printf(string, "%s Brightness", slider_get_screen_desc(device));
1494		*tailptr = slider_alloc(astring_c(string), 100, 1000, 2000, 10, slider_brightness, param);
	1493	*tailptr = slider_alloc(machine, astring_c(string), 100, 1000, 2000, 10, slider_brightness, param);
1495	1494	tailptr = &(*tailptr)->next;
1496	1495	astring_printf(string, "%s Contrast", slider_get_screen_desc(device));
1497		*tailptr = slider_alloc(astring_c(string), 100, 1000, 2000, 50, slider_contrast, param);
	1496	*tailptr = slider_alloc(machine, astring_c(string), 100, 1000, 2000, 50, slider_contrast, param);
1498	1497	tailptr = &(*tailptr)->next;
1499	1498	astring_printf(string, "%s Gamma", slider_get_screen_desc(device));
1500		*tailptr = slider_alloc(astring_c(string), 100, 1000, 3000, 50, slider_gamma, param);
	1499	*tailptr = slider_alloc(machine, astring_c(string), 100, 1000, 3000, 50, slider_gamma, param);
1501	1500	tailptr = &(*tailptr)->next;
1502	1501
1503	1502	/* add scale and offset controls per-screen */
1504	1503	astring_printf(string, "%s Horiz Stretch", slider_get_screen_desc(device));
1505		*tailptr = slider_alloc(astring_c(string), 500, (defxscale == 0) ? 1000 : defxscale, 1500, 2, slider_xscale, param);
	1504	*tailptr = slider_alloc(machine, astring_c(string), 500, (defxscale == 0) ? 1000 : defxscale, 1500, 2, slider_xscale, param);
1506	1505	tailptr = &(*tailptr)->next;
1507	1506	astring_printf(string, "%s Horiz Position", slider_get_screen_desc(device));
1508		*tailptr = slider_alloc(astring_c(string), -500, defxoffset, 500, 2, slider_xoffset, param);
	1507	*tailptr = slider_alloc(machine, astring_c(string), -500, defxoffset, 500, 2, slider_xoffset, param);
1509	1508	tailptr = &(*tailptr)->next;
1510	1509	astring_printf(string, "%s Vert Stretch", slider_get_screen_desc(device));
1511		*tailptr = slider_alloc(astring_c(string), 500, (defyscale == 0) ? 1000 : defyscale, 1500, 2, slider_yscale, param);
	1510	*tailptr = slider_alloc(machine, astring_c(string), 500, (defyscale == 0) ? 1000 : defyscale, 1500, 2, slider_yscale, param);
1512	1511	tailptr = &(*tailptr)->next;
1513	1512	astring_printf(string, "%s Vert Position", slider_get_screen_desc(device));
1514		*tailptr = slider_alloc(astring_c(string), -500, defyoffset, 500, 2, slider_yoffset, param);
	1513	*tailptr = slider_alloc(machine, astring_c(string), -500, defyoffset, 500, 2, slider_yoffset, param);
1515	1514	tailptr = &(*tailptr)->next;
1516	1515	}
1517	1516
r4679	r4680
1528	1527
1529	1528	/* add scale and offset controls per-overlay */
1530	1529	astring_printf(string, "%s Horiz Stretch", slider_get_laserdisc_desc(device));
1531		*tailptr = slider_alloc(astring_c(string), 500, (defxscale == 0) ? 1000 : defxscale, 1500, 2, slider_overxscale, param);
	1530	*tailptr = slider_alloc(machine, astring_c(string), 500, (defxscale == 0) ? 1000 : defxscale, 1500, 2, slider_overxscale, param);
1532	1531	tailptr = &(*tailptr)->next;
1533	1532	astring_printf(string, "%s Horiz Position", slider_get_laserdisc_desc(device));
1534		*tailptr = slider_alloc(astring_c(string), -500, defxoffset, 500, 2, slider_overxoffset, param);
	1533	*tailptr = slider_alloc(machine, astring_c(string), -500, defxoffset, 500, 2, slider_overxoffset, param);
1535	1534	tailptr = &(*tailptr)->next;
1536	1535	astring_printf(string, "%s Vert Stretch", slider_get_laserdisc_desc(device));
1537		*tailptr = slider_alloc(astring_c(string), 500, (defyscale == 0) ? 1000 : defyscale, 1500, 2, slider_overyscale, param);
	1536	*tailptr = slider_alloc(machine, astring_c(string), 500, (defyscale == 0) ? 1000 : defyscale, 1500, 2, slider_overyscale, param);
1538	1537	tailptr = &(*tailptr)->next;
1539	1538	astring_printf(string, "%s Vert Position", slider_get_laserdisc_desc(device));
1540		*tailptr = slider_alloc(astring_c(string), -500, defyoffset, 500, 2, slider_overyoffset, param);
	1539	*tailptr = slider_alloc(machine, astring_c(string), -500, defyoffset, 500, 2, slider_overyoffset, param);
1541	1540	tailptr = &(*tailptr)->next;
1542	1541	}
1543	1542	}
r4679	r4680
1548	1547	if (scrconfig->type == SCREEN_TYPE_VECTOR)
1549	1548	{
1550	1549	/* add flicker control */
1551		*tailptr = slider_alloc("Vector Flicker", 0, 0, 1000, 10, slider_flicker, NULL);
	1550	*tailptr = slider_alloc(machine, "Vector Flicker", 0, 0, 1000, 10, slider_flicker, NULL);
1552	1551	tailptr = &(*tailptr)->next;
1553		*tailptr = slider_alloc("Beam Width", 10, 100, 1000, 10, slider_beam, NULL);
	1552	*tailptr = slider_alloc(machine, "Beam Width", 10, 100, 1000, 10, slider_beam, NULL);
1554	1553	tailptr = &(*tailptr)->next;
1555	1554	break;
1556	1555	}
r4679	r4680
1564	1563	{
1565	1564	void *param = (void *)field;
1566	1565	astring_printf(string, "Crosshair Scale %s", (field->crossaxis == CROSSHAIR_AXIS_X) ? "X" : "Y");
1567		*tailptr = slider_alloc(astring_c(string), -3000, 1000, 3000, 100, slider_crossscale, param);
	1566	*tailptr = slider_alloc(machine, astring_c(string), -3000, 1000, 3000, 100, slider_crossscale, param);
1568	1567	tailptr = &(*tailptr)->next;
1569	1568	astring_printf(string, "Crosshair Offset %s", (field->crossaxis == CROSSHAIR_AXIS_X) ? "X" : "Y");
1570		*tailptr = slider_alloc(astring_c(string), -3000, 0, 3000, 100, slider_crossoffset, param);
	1569	*tailptr = slider_alloc(machine, astring_c(string), -3000, 0, 3000, 100, slider_crossoffset, param);
1571	1570	tailptr = &(*tailptr)->next;
1572	1571	}
1573	1572	#endif
r4679	r4680
1995	1994	#ifdef MAME_DEBUG
1996	1995	static INT32 slider_crossscale(running_machine *machine, void *arg, astring *string, INT32 newval)
1997	1996	{
1998		input_field_config *field = arg;
	1997	input_field_config *field = (input_field_config *)arg;
1999	1998
2000	1999	if (newval != SLIDER_NOCHANGE)
2001	2000	field->crossscale = (float)newval * 0.001f;
r4679	r4680
2014	2013	#ifdef MAME_DEBUG
2015	2014	static INT32 slider_crossoffset(running_machine *machine, void *arg, astring *string, INT32 newval)
2016	2015	{
2017		input_field_config *field = arg;
	2016	input_field_config *field = (input_field_config *)arg;
2018	2017
2019	2018	if (newval != SLIDER_NOCHANGE)
2020	2019	field->crossoffset = (float)newval * 0.001f;

src/emu/debugger.c

r4679	r4680
75	75
76	76	/* allocate a new entry for our global list */
77	77	add_exit_callback(machine, debugger_exit);
78		entry = (machine_entry *)malloc_or_die(sizeof(*entry));
	78	entry = alloc_or_die(machine_entry);
79	79	entry->next = machine_list;
80	80	entry->machine = machine;
81	81	machine_list = entry;

src/emu/sound.c

r4679	r4680
202	202	VPRINTF(("total speakers = %d\n", speaker_output_count(machine->config)));
203	203
204	204	/* allocate memory for mix buffers */
205		leftmix = (INT32 *)auto_malloc(machine->sample_rate * sizeof(*leftmix));
206		rightmix = (INT32 *)auto_malloc(machine->sample_rate * sizeof(*rightmix));
207		finalmix = (INT16 *)auto_malloc(machine->sample_rate * sizeof(*finalmix));
	205	leftmix = auto_alloc_array(machine, INT32, machine->sample_rate);
	206	rightmix = auto_alloc_array(machine, INT32, machine->sample_rate);
	207	finalmix = auto_alloc_array(machine, INT16, machine->sample_rate);
208	208
209	209	/* allocate a global timer for sound timing */
210	210	sound_update_timer = timer_alloc(machine, sound_update, NULL);
r4679	r4680
341	341
342	342	/* allocate a new route */
343	343	for (routeptr = &config->routelist; *routeptr != NULL; routeptr = &(*routeptr)->next) ;
344		*routeptr = (sound_route *)malloc_or_die(sizeof(**routeptr));
	344	*routeptr = alloc_or_die(sound_route);
345	345	(*routeptr)->next = NULL;
346	346	(*routeptr)->output = output;
347	347	(*routeptr)->input = input;
r4679	r4680
387	387
388	388	/* --- the following bits of info are returned as pointers to data or functions --- */
389	389	case DEVINFO_FCT_START:               info->start = DEVICE_START_NAME(sound);    break;
390		case DEVINFO_FCT_SET_INFO:            info->set_info = NULL;                  break;
391	390	case DEVINFO_FCT_CUSTOM_CONFIG:         info->custom_config = DEVICE_CUSTOM_CONFIG_NAME(sound);   break;
392	391
393	392	/* --- the following bits of info are returned as NULL-terminated strings --- */
r4679	r4680
452	451	{
453	452	info->mixer_stream = stream_create(curspeak, info->inputs, 1, machine->sample_rate, info, mixer_update);
454	453	state_save_register_postload(machine, mixer_postload, info->mixer_stream);
455		info->input = (speaker_input *)auto_malloc(info->inputs * sizeof(*info->input));
	454	info->input = auto_alloc_array(machine, speaker_input, info->inputs);
456	455	info->inputs = 0;
457	456	}
458	457	else
r4679	r4680
491	490	/* fill in the input data on this speaker */
492	491	speakerinfo->input[speakerinfo->inputs].gain = route->gain;
493	492	speakerinfo->input[speakerinfo->inputs].default_gain = route->gain;
494		speakerinfo->input[speakerinfo->inputs].name = auto_strdup(astring_c(tempstring));
	493	speakerinfo->input[speakerinfo->inputs].name = auto_strdup(machine, astring_c(tempstring));
495	494
496	495	/* connect the output to the input */
497	496	if (stream_device_output_to_stream_output(sound, outputnum, &stream, &streamoutput))
r4679	r4680
861	860	static DEVICE_STOP( speaker_output )
862	861	{
863	862	#ifdef MAME_DEBUG
864		speaker_info *info = device->token;
	863	speaker_info *info = (speaker_info *)device->token;
865	864
866	865	/* log the maximum sample values for all speakers */
867	866	if (info->max_sample > 0)

src/emu/driver.c

r4679	r4680
114	114	int shufnum;
115	115
116	116	/* allocate a temporary list */
117		templist = (const game_driver **)malloc_or_die(driver_list_get_count(driverlist) * sizeof(*templist));
	117	templist = alloc_array_or_die(const game_driver *, driver_list_get_count(driverlist));
118	118
119	119	/* build up a list of valid entries */
120	120	for (drvnum = driver_count = 0; driverlist[drvnum] != NULL; drvnum++)
r4679	r4680
145	145	}
146	146
147	147	/* allocate some temp memory */
148		penalty = (int *)malloc_or_die(matches * sizeof(*penalty));
	148	penalty = alloc_array_or_die(int, matches);
149	149
150	150	/* initialize everyone's states */
151	151	for (matchnum = 0; matchnum < matches; matchnum++)

src/emu/input.c

r4679	r4680
423	423	static int joystick_map_parse(const char *mapstring, joystick_map *map);
424	424	static void joystick_map_print(const char *header, const char *origstring, const joystick_map *map);
425	425	static void input_code_reset_axes(void);
	426	static int input_code_check_axis(input_device_item *item, input_code code);
426	427
427	428
428	429
r4679	r4680
730	731	assert(devclass != DEVICE_CLASS_INVALID && devclass < DEVICE_CLASS_MAXIMUM);
731	732
732	733	/* allocate a new device */
733		devlist->list = (input_device *)auto_realloc(devlist->list, (devlist->count + 1) * sizeof(devlist->list[0]));
	734	devlist->list = auto_extend_array(machine, devlist->list, input_device, devlist->count + 1);
734	735	device = &devlist->list[devlist->count++];
735	736	memset(device, 0, sizeof(*device));
736	737
737	738	/* fill in the data */
738	739	device->machine = machine;
739		device->name = astring_cpyc(auto_astring_alloc(), name);
	740	device->name = astring_cpyc(auto_astring_alloc(machine), name);
740	741	device->devclass = devclass;
741	742	device->devindex = devlist->count - 1;
742	743	device->internal = internal;
r4679	r4680
779	780	assert(device->item[itemid] == NULL);
780	781
781	782	/* allocate a new item and copy data into it */
782		item = (input_device_item *)auto_malloc(sizeof(*item));
783		memset(item, 0, sizeof(*item));
	783	item = auto_alloc_clear(device->machine, input_device_item);
784	784	device->item[itemid] = item;
785	785	device->maxitem = MAX(device->maxitem, itemid);
786	786
787	787	/* copy in the data passed in from the item list */
788	788	item->devclass = device->devclass;
789	789	item->devindex = device->devindex;
790		item->name = astring_cpyc(auto_astring_alloc(), name);
	790	item->name = astring_cpyc(auto_astring_alloc(device->machine), name);
791	791	item->token = NULL;
792	792	item->internal = internal;
793	793	item->itemclass = input_item_standard_class(device->devclass, itemid_std);
r4679	r4680
798	798	if (itemid > ITEM_ID_MAXIMUM)
799	799	{
800	800	/* copy the item name, removing spaces/underscores and making all caps */
801		item->token = astring_toupper(astring_cpyc(auto_astring_alloc(), name));
	801	item->token = astring_toupper(astring_cpyc(auto_astring_alloc(device->machine), name));
802	802	astring_delchr(item->token, ' ');
803	803	astring_delchr(item->token, '_');
804	804	}
r4679	r4680
999	999	if (item != NULL)
1000	1000	{
1001	1001	input_code code = device_item_to_code(device, itemid);
1002		INT32 curval, diff;
1003	1002
1004	1003	/* if the item is natively a switch, poll it */
1005	1004	if (item->itemclass == ITEM_CLASS_SWITCH)
r4679	r4680
1010	1009	continue;
1011	1010	}
1012	1011
1013		/* poll the current value */
1014		curval = input_code_value(code);
1015
1016		/* if we've already reported this one, don't bother */
1017		if (item->memory == INVALID_AXIS_VALUE)
	1012	/* skip if there is not enough axis movement */
	1013	if (!input_code_check_axis(item, code))
1018	1014	continue;
1019	1015
1020		/* compute the diff against memory */
1021		diff = curval - item->memory;
1022		if (diff < 0)
1023		diff = -diff;
1024
1025		/* for absolute axes, look for 25% of maximum */
1026		if (item->itemclass == ITEM_CLASS_ABSOLUTE)
1027		{
1028		if (diff > (INPUT_ABSOLUTE_MAX - INPUT_ABSOLUTE_MIN) / 4)
1029		item->memory = INVALID_AXIS_VALUE;
1030		else
1031		continue;
1032		}
1033
1034		/* for relative axes, look for ~20 pixels movement */
1035		else if (item->itemclass == ITEM_CLASS_RELATIVE)
1036		{
1037		if (diff > 20 * INPUT_RELATIVE_PER_PIXEL)
1038		item->memory = INVALID_AXIS_VALUE;
1039		else
1040		continue;
1041		}
1042
1043	1016	/* otherwise, poll axes digitally */
1044	1017	code = INPUT_CODE_SET_ITEMCLASS(code, ITEM_CLASS_SWITCH);
1045	1018
r4679	r4680
1124	1097
1125	1098
1126	1099	/*-------------------------------------------------
	1100	input_code_check_axis - see if axis has
	1101	move far enough
	1102	-------------------------------------------------*/
	1103
	1104	static int input_code_check_axis(input_device_item *item, input_code code)
	1105	{
	1106	INT32 curval, diff;
	1107
	1108	/* poll the current value */
	1109	curval = input_code_value(code);
	1110
	1111	/* if we've already reported this one, don't bother */
	1112	if (item->memory == INVALID_AXIS_VALUE)
	1113	return FALSE;
	1114
	1115	/* ignore min/max for lightguns */
	1116	/* so the selection will not be affected by a gun going out of range */
	1117	if ((INPUT_CODE_DEVCLASS(code) == DEVICE_CLASS_LIGHTGUN)
	1118	&& (INPUT_CODE_ITEMID(code) == ITEM_ID_XAXIS || INPUT_CODE_ITEMID(code) == ITEM_ID_YAXIS)
	1119	&& (curval == INPUT_ABSOLUTE_MAX || curval == INPUT_ABSOLUTE_MIN))
	1120	return FALSE;
	1121
	1122	/* compute the diff against memory */
	1123	diff = curval - item->memory;
	1124	if (diff < 0)
	1125	diff = -diff;
	1126
	1127	/* for absolute axes, look for 25% of maximum */
	1128	if (item->itemclass == ITEM_CLASS_ABSOLUTE && diff > (INPUT_ABSOLUTE_MAX - INPUT_ABSOLUTE_MIN) / 4)
	1129	{
	1130	item->memory = INVALID_AXIS_VALUE;
	1131	return TRUE;
	1132	}
	1133
	1134	/* for relative axes, look for ~20 pixels movement */
	1135	if (item->itemclass == ITEM_CLASS_RELATIVE && diff > 20 * INPUT_RELATIVE_PER_PIXEL)
	1136	{
	1137	item->memory = INVALID_AXIS_VALUE;
	1138	return TRUE;
	1139	}
	1140
	1141	return FALSE;
	1142	}
	1143
	1144
	1145	/*-------------------------------------------------
1127	1146	input_code_reset_axes - reset axes memory
1128	1147	-------------------------------------------------*/
1129	1148
r4679	r4680
1195	1214	if (item != NULL)
1196	1215	{
1197	1216	input_code code = device_item_to_code(device, itemid);
1198		INT32 curval, diff;
1199	1217
1200		/* skip any switches or already-reported axes */
	1218	/* skip any switches */
1201	1219	if (item->itemclass == ITEM_CLASS_SWITCH)
1202	1220	continue;
1203	1221
1204		/* poll the current value */
1205		curval = input_code_value(code);
1206
1207		/* if we've already reported this one, don't bother */
1208		if (item->memory == INVALID_AXIS_VALUE)
1209		continue;
1210
1211		/* compute the diff against memory */
1212		diff = curval - item->memory;
1213		if (diff < 0)
1214		diff = -diff;
1215
1216		/* for absolute axes, look for 25% of maximum */
1217		if (item->itemclass == ITEM_CLASS_ABSOLUTE && diff > (INPUT_ABSOLUTE_MAX - INPUT_ABSOLUTE_MIN) / 4)
1218		{
1219		item->memory = INVALID_AXIS_VALUE;
	1222	/* check if there is enough axis movement */
	1223	if (input_code_check_axis(item, code))
1220	1224	return code;
1221		}
1222
1223		/* for relative axes, look for ~20 pixels movement */
1224		if (item->itemclass == ITEM_CLASS_RELATIVE && diff > 20 * INPUT_RELATIVE_PER_PIXEL)
1225		{
1226		item->memory = INVALID_AXIS_VALUE;
1227		return code;
1228		}
1229	1225	}
1230	1226	}
1231	1227	}

src/emu/driver.h

r4679	r4680
189	189	GAMEL(YEAR,NAME,PARENT,MACHINE,INPUT,INIT,MONITOR,COMPANY,FULLNAME,FLAGS,((const char *)0))
190	190
191	191	#define GAMEL(YEAR,NAME,PARENT,MACHINE,INPUT,INIT,MONITOR,COMPANY,FULLNAME,FLAGS,LAYOUT)   \
192		const game_driver driver_##NAME =               \
	192	extern const game_driver driver_##NAME;      \
	193	const game_driver driver_##NAME =         \
193	194	{                                 \
194	195	__FILE__,                        \
195	196	#PARENT,                        \

src/emu/drawgfx.c

r4679	r4680
90	90	gfx_element *gfx;
91	91
92	92	/* allocate memory for the gfx_element structure */
93		gfx = (gfx_element *)malloc_or_die(sizeof(*gfx));
94		memset(gfx, 0, sizeof(*gfx));
	93	gfx = alloc_clear_or_die(gfx_element);
95	94
96	95	/* fill in the data */
97	96	gfx->width = width;
r4679	r4680
120	119	}
121	120	else
122	121	{
123		UINT32 *buffer = (UINT32 *)malloc_or_die(sizeof(buffer[0]) * gfx->layout.width);
	122	UINT32 *buffer = alloc_array_or_die(UINT32, gfx->layout.width);
124	123	memcpy(buffer, gfx->layout.extxoffs, sizeof(gfx->layout.extxoffs[0]) * gfx->layout.width);
125	124	gfx->layout.extxoffs = buffer;
126	125	}
r4679	r4680
135	134	}
136	135	else
137	136	{
138		UINT32 *buffer = (UINT32 *)malloc_or_die(sizeof(buffer[0]) * gfx->layout.height);
	137	UINT32 *buffer = alloc_array_or_die(UINT32, gfx->layout.height);
139	138	memcpy(buffer, gfx->layout.extyoffs, sizeof(gfx->layout.extyoffs[0]) * gfx->layout.height);
140	139	gfx->layout.extyoffs = buffer;
141	140	}
r4679	r4680
143	142
144	143	/* allocate a pen usage array for entries with 32 pens or less */
145	144	if (gfx->color_depth <= 32)
146		gfx->pen_usage = (UINT32 *)malloc_or_die(gfx->total_elements * sizeof(*gfx->pen_usage));
	145	gfx->pen_usage = alloc_array_or_die(UINT32, gfx->total_elements);
147	146
148	147	/* allocate a dirty array */
149		gfx->dirty = (UINT8 *)malloc_or_die(gfx->total_elements * sizeof(*gfx->dirty));
	148	gfx->dirty = alloc_array_or_die(UINT8, gfx->total_elements);
150	149	memset(gfx->dirty, 1, gfx->total_elements * sizeof(*gfx->dirty));
151	150
152	151	/* raw graphics case */
r4679	r4680
173	172	gfx->char_modulo = gfx->line_modulo * gfx->origheight;
174	173
175	174	/* allocate memory for the data */
176		gfx->gfxdata = (UINT8 *)malloc_or_die(gfx->total_elements * gfx->char_modulo);
	175	gfx->gfxdata = alloc_array_or_die(UINT8, gfx->total_elements * gfx->char_modulo);
177	176	}
178	177
179	178	return gfx;

src/emu/drawgfx.h

r4679	r4680
82	82	#define STEP8(START,STEP)      STEP4(START,STEP),STEP4((START)+4*(STEP),STEP)
83	83	#define STEP16(START,STEP)      STEP8(START,STEP),STEP8((START)+8*(STEP),STEP)
84	84	#define STEP32(START,STEP)      STEP16(START,STEP),STEP16((START)+16*(STEP),STEP)
	85	#define STEP64(START,STEP)      STEP32(START,STEP),STEP32((START)+32*(STEP),STEP)
	86	#define STEP128(START,STEP)      STEP64(START,STEP),STEP64((START)+64*(STEP),STEP)
	87	#define STEP256(START,STEP)      STEP128(START,STEP),STEP128((START)+128*(STEP),STEP)
	88	#define STEP512(START,STEP)      STEP256(START,STEP),STEP256((START)+256*(STEP),STEP)
	89	#define STEP1024(START,STEP)   STEP512(START,STEP),STEP512((START)+512*(STEP),STEP)
	90	#define STEP2048(START,STEP)   STEP1024(START,STEP),STEP1024((START)+1024*(STEP),STEP)
85	91
	92
86	93	/* these macros are used for declaring gfx_decode_entry_entry info arrays. */
87	94	#define GFXDECODE_EXTERN( name ) extern const gfx_decode_entry gfxdecodeinfo_##name[]
88	95	#define GFXDECODE_START( name ) const gfx_decode_entry gfxdecodeinfo_##name[] = {

src/emu/render.c

r4679	r4680
343	343	if (result != NULL)
344	344	container_item_free_list = result->next;
345	345	else
346		result = (container_item *)malloc_or_die(sizeof(*result));
	346	result = alloc_or_die(container_item);
347	347
348	348	memset(result, 0, sizeof(*result));
349	349	return result;
r4679	r4680
375	375	if (result != NULL)
376	376	render_primitive_free_list = result->next;
377	377	else
378		result = (render_primitive *)malloc_or_die(sizeof(*result));
	378	result = alloc_or_die(render_primitive);
379	379
380	380	/* clear to 0 */
381	381	memset(result, 0, sizeof(*result));
r4679	r4680
426	426	if (ref != NULL)
427	427	render_ref_free_list = ref->next;
428	428	else
429		ref = (render_ref *)malloc_or_die(sizeof(*ref));
	429	ref = alloc_or_die(render_ref);
430	430
431	431	/* set the refptr and link us into the list */
432	432	ref->refptr = refptr;
r4679	r4680
1073	1073	int listnum;
1074	1074
1075	1075	/* allocate memory for the target */
1076		target = (render_target *)malloc_or_die(sizeof(*target));
1077		memset(target, 0, sizeof(*target));
	1076	target = alloc_clear_or_die(render_target);
1078	1077
1079	1078	/* add it to the end of the list */
1080	1079	for (nextptr = &targetlist; *nextptr != NULL; nextptr = &(*nextptr)->next) ;
r4679	r4680
2433	2432	int texnum;
2434	2433
2435	2434	/* allocate a new group */
2436		texture = (render_texture *)malloc_or_die(sizeof(*texture) * TEXTURE_GROUP_SIZE);
2437		memset(texture, 0, sizeof(*texture) * TEXTURE_GROUP_SIZE);
	2435	texture = alloc_array_clear_or_die(render_texture, TEXTURE_GROUP_SIZE);
2438	2436
2439	2437	/* add them to the list */
2440	2438	for (texnum = 0; texnum < TEXTURE_GROUP_SIZE; texnum++)
r4679	r4680
2770	2768	int color;
2771	2769
2772	2770	/* allocate and clear memory */
2773		container = (render_container *)malloc_or_die(sizeof(*container));
2774		memset(container, 0, sizeof(*container));
	2771	container = alloc_clear_or_die(render_container);
2775	2772
2776	2773	/* default values */
2777	2774	container->brightness = 1.0f;

src/emu/clifront.c

r4679	r4680
440	440
441	441	int cli_info_listbrothers(core_options *options, const char *gamename)
442	442	{
443		UINT8 *didit = (UINT8 *)malloc_or_die(driver_list_get_count(drivers));
	443	UINT8 *didit = alloc_array_or_die(UINT8, driver_list_get_count(drivers));
444	444	astring *filename = astring_alloc();
445	445	int drvindex, count = 0;
446	446

src/emu/state.c

r4679	r4680
165	165
166	166	void state_init(running_machine *machine)
167	167	{
168		machine->state_data = (state_private *)auto_malloc(sizeof(*machine->state_data));
169		memset(machine->state_data, 0, sizeof(*machine->state_data));
	168	machine->state_data = auto_alloc_clear(machine, state_private);
170	169	}
171	170
172	171
r4679	r4680
264	263
265	264	/* didn't find one; allocate a new one */
266	265	next = *entryptr;
267		*entryptr = (state_entry *)malloc_or_die(sizeof(**entryptr));
268		memset(*entryptr, 0, sizeof(**entryptr));
	266	*entryptr = alloc_clear_or_die(state_entry);
269	267
270	268	/* fill in the rest */
271	269	(*entryptr)->next      = next;
r4679	r4680
314	312	fatalerror("Duplicate save state function (%p, %p)", param, func);
315	313
316	314	/* allocate a new entry */
317		*cbptr = (state_callback *)malloc_or_die(sizeof(state_callback));
	315	*cbptr = alloc_or_die(state_callback);
318	316
319	317	/* fill it in */
320	318	(*cbptr)->next         = NULL;
r4679	r4680
345	343	fatalerror("Duplicate save state function (%p, %p)", param, func);
346	344
347	345	/* allocate a new entry */
348		*cbptr = (state_callback *)malloc_or_die(sizeof(state_callback));
	346	*cbptr = alloc_or_die(state_callback);
349	347
350	348	/* fill it in */
351	349	(*cbptr)->next          = NULL;

src/emu/timer.c

r4679	r4680
300	300	int i;
301	301
302	302	/* allocate global data */
303		global = machine->timer_data = (timer_private *)auto_malloc(sizeof(*global));
304		memset(global, 0, sizeof(*global));
	303	global = machine->timer_data = auto_alloc_clear(machine, timer_private);
305	304
306	305	/* we need to wait until the first call to timer_cyclestorun before using real CPU times */
307	306	global->exec.basetime = attotime_zero;
r4679	r4680
704	703	void timer_device_adjust_oneshot(const device_config *timer, attotime duration, INT32 param)
705	704	{
706	705	#ifdef MAME_DEBUG
707		timer_config *config = timer->inline_config;
	706	timer_config *config = (timer_config *)timer->inline_config;
708	707
709	708	/* doesn't make sense for scanline timers */
710	709	assert(config->type != TIMER_TYPE_SCANLINE);
r4679	r4680
757	756	{
758	757	timer_state *state = get_safe_token(timer);
759	758	#ifdef MAME_DEBUG
760		timer_config *config = timer->inline_config;
	759	timer_config *config = (timer_config *)timer->inline_config;
761	760
762	761	/* doesn't make sense for scanline timers */
763	762	assert(config->type != TIMER_TYPE_SCANLINE);
r4679	r4680
821	820	{
822	821	timer_state *state = get_safe_token(timer);
823	822	#ifdef MAME_DEBUG
824		timer_config *config = timer->inline_config;
	823	timer_config *config = (timer_config *)timer->inline_config;
825	824
826	825	/* doesn't make sense for scanline timers */
827	826	assert(config->type != TIMER_TYPE_SCANLINE);
r4679	r4680
891	890	{
892	891	timer_state *state = get_safe_token(timer);
893	892	#ifdef MAME_DEBUG
894		timer_config *config = timer->inline_config;
	893	timer_config *config = (timer_config *)timer->inline_config;
895	894
896	895	/* doesn't make sense for scanline timers */
897	896	assert(config->type != TIMER_TYPE_SCANLINE);
r4679	r4680
916	915	{
917	916	timer_state *state = get_safe_token(timer);
918	917	#ifdef MAME_DEBUG
919		timer_config *config = timer->inline_config;
	918	timer_config *config = (timer_config *)timer->inline_config;
920	919
921	920	/* doesn't make sense for scanline timers */
922	921	assert(config->type != TIMER_TYPE_SCANLINE);
r4679	r4680
1273	1272
1274	1273
1275	1274	/*-------------------------------------------------
1276		timer_set_info - device set info callback
1277		-------------------------------------------------*/
1278
1279		static DEVICE_SET_INFO( timer )
1280		{
1281		switch (state)
1282		{
1283		/* no parameters to set */
1284		}
1285		}
1286
1287
1288		/*-------------------------------------------------
1289	1275	timer_get_info - device get info callback
1290	1276	-------------------------------------------------*/
1291	1277
r4679	r4680
1299	1285	case DEVINFO_INT_CLASS:               info->i = DEVICE_CLASS_TIMER;         break;
1300	1286
1301	1287	/* --- the following bits of info are returned as pointers to data or functions --- */
1302		case DEVINFO_FCT_SET_INFO:            info->set_info = DEVICE_SET_INFO_NAME(timer); break;
1303	1288	case DEVINFO_FCT_START:               info->start = DEVICE_START_NAME(timer); break;
1304	1289	case DEVINFO_FCT_STOP:               /* Nothing */                     break;
1305	1290	case DEVINFO_FCT_RESET:               /* Nothing */                     break;

src/emu/mconfig.c

r4679	r4680
69	69	machine_config *config;
70	70
71	71	/* allocate a new configuration object */
72		config = (machine_config *)malloc_or_die(sizeof(*config));
73		memset(config, 0, sizeof(*config));
	72	config = alloc_clear_or_die(machine_config);
74	73
75	74	/* parse tokens into the config */
76	75	machine_config_detokenize(config, tokens, NULL, 0);

src/emu/emupal.c

r4679	r4680
95	95
96	96	void palette_init(running_machine *machine)
97	97	{
98		palette_private *palette = (palette_private *)auto_malloc(sizeof(*palette));
	98	palette_private *palette = auto_alloc_clear(machine, palette_private);
99	99	const device_config *device = video_screen_first(machine->config);
100	100	bitmap_format format;
101	101
r4679	r4680
113	113	add_exit_callback(machine, palette_exit);
114	114
115	115	/* reset all our data */
116		memset(palette, 0, sizeof(*palette));
117	116	palette->format = format;
118	117
119	118	/* determine the color mode */
r4679	r4680
146	145
147	146	/* set up save/restore of the palette */
148	147	numcolors = palette_get_num_colors(machine->palette);
149		palette->save_pen = (pen_t *)auto_malloc(sizeof(*palette->save_pen) * numcolors);
150		palette->save_bright = (float *)auto_malloc(sizeof(*palette->save_bright) * numcolors);
	148	palette->save_pen = auto_alloc_array(machine, pen_t, numcolors);
	149	palette->save_bright = auto_alloc_array(machine, float, numcolors);
151	150	state_save_register_global_pointer(machine, palette->save_pen, numcolors);
152	151	state_save_register_global_pointer(machine, palette->save_bright, numcolors);
153	152	state_save_register_presave(machine, palette_presave, palette);
r4679	r4680
330	329	assert(palettesize > 0);
331	330
332	331	/* allocate the colortable */
333		ctable = (colortable_t *)auto_malloc(sizeof(*ctable));
334		memset(ctable, 0, sizeof(*ctable));
	332	ctable = auto_alloc_clear(machine, colortable_t);
335	333
336	334	/* fill in the basics */
337	335	ctable->machine = machine;
r4679	r4680
339	337	ctable->palentries = palettesize;
340	338
341	339	/* allocate the raw colortable */
342		ctable->raw = (UINT16 *)auto_malloc(ctable->entries * sizeof(*ctable->raw));
	340	ctable->raw = auto_alloc_array(machine, UINT16, ctable->entries);
343	341	for (index = 0; index < ctable->entries; index++)
344	342	ctable->raw[index] = index % ctable->palentries;
345	343	state_save_register_global_pointer(machine, ctable->raw, ctable->entries);
346	344
347	345	/* allocate the palette */
348		ctable->palette = (rgb_t *)auto_malloc(ctable->palentries * sizeof(*ctable->palette));
	346	ctable->palette = auto_alloc_array(machine, rgb_t, ctable->palentries);
349	347	for (index = 0; index < ctable->palentries; index++)
350	348	ctable->palette[index] = MAKE_ARGB(0x80,0xff,0xff,0xff);
351	349	state_save_register_global_pointer(machine, ctable->palette, ctable->palentries);
r4679	r4680
660	658	{
661	659	case BITMAP_FORMAT_INDEXED16:
662	660	/* create a dummy 1:1 mapping */
663		machine->pens = pentable = (pen_t *)auto_malloc((total_colors + 2) * sizeof(machine->pens[0]));
	661	machine->pens = pentable = auto_alloc_array(machine, pen_t, total_colors + 2);
664	662	for (i = 0; i < total_colors + 2; i++)
665	663	pentable[i] = i;
666	664	break;
r4679	r4680
690	688	/* if we have shadows, allocate shadow tables */
691	689	if (machine->config->video_attributes & VIDEO_HAS_SHADOWS)
692	690	{
693		pen_t *table = (pen_t *)auto_malloc(65536 * sizeof(*table));
	691	pen_t *table = auto_alloc_array(machine, pen_t, 65536);
694	692	int i;
695	693
696	694	/* palettized mode gets a single 64k table in slots 0 and 2 */
r4679	r4680
713	711	/* if we have hilights, allocate shadow tables */
714	712	if (machine->config->video_attributes & VIDEO_HAS_HIGHLIGHTS)
715	713	{
716		pen_t *table = (pen_t *)auto_malloc(65536 * sizeof(*table));
	714	pen_t *table = auto_alloc_array(machine, pen_t, 65536);
717	715	int i;
718	716
719	717	/* palettized mode gets a single 64k table in slots 1 and 3 */

src/emu/cheat.c

r4679	r4680
371	371	add_exit_callback(machine, cheat_exit);
372	372
373	373	/* allocate memory */
374		cheatinfo = (cheat_private *)auto_malloc(sizeof(*cheatinfo));
375		memset(cheatinfo, 0, sizeof(*cheatinfo));
	374	cheatinfo = auto_alloc_clear(machine, cheat_private);
376	375	machine->cheat_data = cheatinfo;
377	376
378	377	/* load the cheat file */
r4679	r4680
1061	1060	}
1062	1061
1063	1062	/* allocate memory for the cheat */
1064		cheat = (cheat_entry *)malloc_or_die(sizeof(*cheat) + (tempcount - 1) * sizeof(cheat->tempvar));
1065		memset(cheat, 0, sizeof(*cheat) + (tempcount - 1) * sizeof(cheat->tempvar));
	1063	cheat = (cheat_entry *)alloc_array_clear_or_die(UINT8, sizeof(*cheat) + (tempcount - 1) * sizeof(cheat->tempvar));
1066	1064	cheat->numtemp = tempcount;
1067	1065
1068	1066	/* get the description */
r4679	r4680
1232	1230	cheat_parameter *param;
1233	1231
1234	1232	/* allocate memory for it */
1235		param = (cheat_parameter *)malloc_or_die(sizeof(*param));
1236		memset(param, 0, sizeof(*param));
	1233	param = alloc_clear_or_die(cheat_parameter);
1237	1234
1238	1235	/* read the core attributes */
1239	1236	param->minval = xml_get_attribute_int(paramnode, "min", 0);
r4679	r4680
1250	1247	parameter_item *curitem;
1251	1248
1252	1249	/* allocate memory for it */
1253		curitem = (parameter_item *)malloc_or_die(sizeof(*curitem));
1254		memset(curitem, 0, sizeof(*curitem));
	1250	curitem = alloc_clear_or_die(parameter_item);
1255	1251
1256	1252	/* check for NULL text */
1257	1253	if (itemnode->value == NULL || itemnode->value[0] == 0)
r4679	r4680
1361	1357	const char *state;
1362	1358
1363	1359	/* allocate memory for it */
1364		script = (cheat_script *)malloc_or_die(sizeof(*script));
1365		memset(script, 0, sizeof(*script));
	1360	script = alloc_clear_or_die(cheat_script);
1366	1361
1367	1362	/* read the core attributes */
1368	1363	script->state = SCRIPT_STATE_RUN;
r4679	r4680
1476	1471	EXPRERR experr;
1477	1472
1478	1473	/* allocate memory for it */
1479		entry = (script_entry *)malloc_or_die(sizeof(*entry));
1480		memset(entry, 0, sizeof(*entry));
	1474	entry = alloc_clear_or_die(script_entry);
1481	1475
1482	1476	/* read the condition if present */
1483	1477	expression = xml_get_attribute_string(entrynode, "condition", NULL);
r4679	r4680
1546	1540	output_argument *curarg;
1547	1541
1548	1542	/* allocate memory for it */
1549		curarg = (output_argument *)malloc_or_die(sizeof(*curarg));
1550		memset(curarg, 0, sizeof(*curarg));
	1543	curarg = alloc_clear_or_die(output_argument);
1551	1544
1552	1545	/* first extract attributes */
1553	1546	curarg->count = xml_get_attribute_int(argnode, "count", 1);

src/emu/validity.c

r4679	r4680
233	233
234	234	/* determine how many total bytes we need */
235	235	total_bytes = sizeof(*table) + entries * sizeof(table->entry[0]) + hashsize * sizeof(table->hash[0]);
236		table = (quark_table *)auto_malloc(total_bytes);
	236	table = (quark_table *)alloc_array_or_die(UINT8, total_bytes);
237	237
238	238	/* fill in the details */
239	239	table->entries = entries;
r4679	r4680
292	292	}
293	293
294	294
	295	/*-------------------------------------------------
	296	quark_tables_free - free allocated tables
	297	-------------------------------------------------*/
295	298
	299	static void quark_tables_free(void)
	300	{
	301	if (source_table != NULL)
	302	free(source_table);
	303	source_table = NULL;
	304
	305	if (name_table != NULL)
	306	free(name_table);
	307	name_table = NULL;
	308
	309	if (description_table != NULL)
	310	free(description_table);
	311	description_table = NULL;
	312
	313	if (roms_table != NULL)
	314	free(roms_table);
	315	roms_table = NULL;
	316
	317	if (defstr_table != NULL)
	318	free(defstr_table);
	319	defstr_table = NULL;
	320	}
	321
	322
	323
296	324	/***************************************************************************
297	325	VALIDATION FUNCTIONS
298	326	***************************************************************************/
r4679	r4680
1718	1746
1719	1747	end_resource_tracking();
1720	1748	exit_resource_tracking();
	1749	quark_tables_free();
1721	1750
1722	1751	return error;
1723	1752	}

src/emu/romload.c

r4679	r4680
115	115	file associated with the given region
116	116	-------------------------------------------------*/
117	117
118		void set_disk_handle(const char *region, mame_file *file, chd_file *chdfile)
	118	void set_disk_handle(running_machine *machine, const char *region, mame_file *file, chd_file *chdfile)
119	119	{
120	120	open_chd chd = { 0 };
121	121
r4679	r4680
125	125	chd.origfile = file;
126	126
127	127	/* we're okay, add to the list of disks */
128		*chd_list_tailptr = (open_chd *)auto_malloc(sizeof(**chd_list_tailptr));
	128	*chd_list_tailptr = auto_alloc(machine, open_chd);
129	129	**chd_list_tailptr = chd;
130	130	chd_list_tailptr = &(*chd_list_tailptr)->next;
131	131	}
r4679	r4680
757	757
758	758	/* use a temporary buffer for complex loads */
759	759	tempbufsize = MIN(TEMPBUFFER_MAX_SIZE, numbytes);
760		tempbuf = (UINT8 *)malloc_or_die(tempbufsize);
	760	tempbuf = alloc_array_or_die(UINT8, tempbufsize);
761	761
762	762	/* chunky reads for complex loads */
763	763	skip += groupsize;
r4679	r4680
1225	1225
1226	1226	/* we're okay, add to the list of disks */
1227	1227	LOG(("Assigning to handle %d\n", DISK_GETINDEX(romp)));
1228		*chd_list_tailptr = (open_chd *)auto_malloc(sizeof(**chd_list_tailptr));
	1228	*chd_list_tailptr = auto_alloc(romdata->machine, open_chd);
1229	1229	**chd_list_tailptr = chd;
1230	1230	chd_list_tailptr = &(*chd_list_tailptr)->next;
1231	1231	}

src/mess/uimess.c

r4679	r4680
90	90	void ui_mess_init(running_machine *machine)
91	91	{
92	92	/* allocate memory for our data structure */
93		machine->ui_mess_data = auto_malloc(sizeof(*machine->ui_mess_data));
94		memset(machine->ui_mess_data, 0, sizeof(*machine->ui_mess_data));
	93	machine->ui_mess_data = auto_alloc_clear(machine, ui_mess_private);
95	94
96	95	/* retrieve options */
97	96	machine->ui_mess_data->use_natural_keyboard = options_get_bool(mame_options(), OPTION_NATURAL_KEYBOARD);

src/mess/mess.c

r4679	r4680
87	87	/* if we have RAM, allocate it */
88	88	if (mess_ram_size > 0)
89	89	{
90		mess_ram = (UINT8 *) auto_malloc(mess_ram_size);
	90	mess_ram = auto_alloc_array_clear(machine, UINT8, mess_ram_size);
91	91	memset(mess_ram, mess_ram_default_value, mess_ram_size);
92	92
93	93	state_save_register_item(machine, "mess", NULL, 0, mess_ram_size);

src/mess/tools/castool/stubs.c

r4679	r4680
220	220	freeing memory
221	221	-------------------------------------------------*/
222	222
223		void *auto_malloc_file_line(size_t size, const char *file, int line)
	223	void *auto_malloc_file_line(running_machine *machine, size_t size, const char *file, int line)
224	224	{
225	225	void *result = pool_malloc_file_line(current_pool(), size, file, line);
226	226	#ifdef MAME_DEBUG
r4679	r4680
235	235	freeing memory
236	236	-------------------------------------------------*/
237	237
238		void *auto_realloc_file_line(void *ptr, size_t size, const char *file, int line)
	238	void *auto_realloc_file_line(running_machine *machine, void *ptr, size_t size, const char *file, int line)
239	239	{
240	240	object_pool *pool = current_pool();
241	241	if (ptr != NULL)
r4679	r4680
259	259	string
260	260	-------------------------------------------------*/
261	261
262		char *auto_strdup_file_line(const char *str, const char *file, int line)
	262	char *auto_strdup_file_line(running_machine *machine, const char *str, const char *file, int line)
263	263	{
264	264	return pool_strdup_file_line(current_pool(), str, file, line);
265	265	}
r4679	r4680
270	270	auto-freeing string if str is null
271	271	-------------------------------------------------*/
272	272
273		char *auto_strdup_allow_null_file_line(const char *str, const char *file, int line)
	273	char *auto_strdup_allow_null_file_line(running_machine *machine, const char *str, const char *file, int line)
274	274	{
275		return (str != NULL) ? auto_strdup_file_line(str, file, line) : NULL;
	275	return (str != NULL) ? auto_strdup_file_line(machine, str, file, line) : NULL;
276	276	}
277	277
278	278
r4679	r4680
281	281	auto-freeing astring
282	282	-------------------------------------------------*/
283	283
284		astring *auto_astring_alloc_file_line(const char *file, int line)
	284	astring *auto_astring_alloc_file_line(running_machine *machine, const char *file, int line)
285	285	{
286	286	return (astring *)restrack_register_object(OBJTYPE_ASTRING, astring_alloc(), 0, file, line);
287	287	}
r4679	r4680
310	310	}
311	311
312	312
	313	void *malloc_or_die_file_line(size_t size, const char *file, int line)
	314	{
	315	return malloc(size);
	316	}

src/mess/audio/mac.c

r4679	r4680
104	104	mac_sound *token = get_token(device);
105	105
106	106	memset(token, 0, sizeof(*token));
107		token->snd_cache = auto_malloc(SND_CACHE_SIZE * sizeof(*token->snd_cache));
	107	token->snd_cache = auto_alloc_array(device->machine, UINT8, SND_CACHE_SIZE);
108	108	token->mac_stream = stream_create(device, 0, 1, MAC_SAMPLE_RATE, 0, mac_sound_update);
109	109	}
110	110

src/mess/audio/vic6560.c

r4679	r4680
236	236	/* buffer for fastest played sample for 5 second
237	237	* so we have enough data for min 5 second */
238	238	noisesize = NOISE_FREQUENCY_MAX * NOISE_BUFFER_SIZE_SEC;
239		noise = (INT8*) auto_malloc (noisesize * sizeof (noise[0]));
	239	noise = auto_alloc_array(device->machine, INT8, noisesize);
240	240	{
241	241	int noiseshift = 0x7ffff8;
242	242	char data;
r4679	r4680
271	271
272	272	if (tonesize > 0)
273	273	{
274		tone = (INT16*) auto_malloc (tonesize * sizeof (tone[0]));
	274	tone = auto_alloc_array(device->machine, INT16, tonesize);
275	275
276	276	for (i = 0; i < tonesize; i++)
277	277	{

src/mess/audio/lynx.c

r4679	r4680
306	306	}
307	307	}
308	308
309		static void lynx_audio_init(void)
	309	static void lynx_audio_init(running_machine *machine)
310	310	{
311	311	int i;
312		shift_mask = (int *) auto_malloc(512 * sizeof(int));
	312	shift_mask = auto_alloc_array(machine, int, 512);
313	313	assert(shift_mask);
314	314
315		shift_xor = (int *) auto_malloc(4096 * sizeof(int));
	315	shift_xor = auto_alloc_array(machine, int, 4096);
316	316	assert(shift_xor);
317	317
318	318	for (i=0; i<512; i++)
r4679	r4680
361	361
362	362	usec_per_sample = 1000000 / device->machine->sample_rate;
363	363
364		lynx_audio_init();
	364	lynx_audio_init(device->machine);
365	365	}
366	366
367	367
r4679	r4680
371	371
372	372	usec_per_sample = 1000000 / device->machine->sample_rate;
373	373
374		lynx_audio_init();
	374	lynx_audio_init(device->machine);
375	375	}
376	376
377	377

src/mess/audio/ted7360.c

r4679	r4680
162	162	/* buffer for fastest played sample for 5 second
163	163	* so we have enough data for min 5 second */
164	164	noisesize = NOISE_FREQUENCY_MAX * NOISE_BUFFER_SIZE_SEC;
165		noise = (UINT8*) auto_malloc (noisesize * sizeof (noise[0]));
	165	noise = auto_alloc_array(device->machine, UINT8, noisesize);
166	166
167	167	{
168	168	int noiseshift = 0x7ffff8;

src/mess/image.c

r4679	r4680
190	190	/* allocate the private structure */
191	191	private_size = sizeof(*machine->images_data) + ((count - 1)
192	192	* sizeof(machine->images_data->slots[0]));
193		machine->images_data = (images_private *) auto_malloc(private_size);
	193	machine->images_data = (images_private *) auto_alloc_array_clear(machine, char, private_size);
194	194	memset(machine->images_data, '\0', private_size);
195	195
196	196	/* some setup */
r4679	r4680
229	229	for (i = 0; i < format_count; i++)
230	230	{
231	231	/* allocate a new format */
232		format = auto_malloc(sizeof(*format));
233		memset(format, 0, sizeof(*format));
	232	format = auto_alloc_clear(machine, image_device_format);
234	233
235	234	/* populate it */
236	235	format->index      = i;
237		format->name      = auto_strdup(device_get_info_string(slot->dev, DEVINFO_STR_IMAGE_CREATE_OPTNAME + i));
238		format->description   = auto_strdup(device_get_info_string(slot->dev, DEVINFO_STR_IMAGE_CREATE_OPTDESC + i));
239		format->extensions   = auto_strdup(device_get_info_string(slot->dev, DEVINFO_STR_IMAGE_CREATE_OPTEXTS + i));
	236	format->name      = auto_strdup(machine, device_get_info_string(slot->dev, DEVINFO_STR_IMAGE_CREATE_OPTNAME + i));
	237	format->description   = auto_strdup(machine, device_get_info_string(slot->dev, DEVINFO_STR_IMAGE_CREATE_OPTDESC + i));
	238	format->extensions   = auto_strdup(machine, device_get_info_string(slot->dev, DEVINFO_STR_IMAGE_CREATE_OPTEXTS + i));
240	239	format->optspec      = device_get_info_ptr(slot->dev, DEVINFO_PTR_IMAGE_CREATE_OPTSPEC + i);
241	240
242	241	/* and append it to the list */
r4679	r4680
1142	1141	*dest = '\0';
1143	1142	size = (UINT32) image_length(image);
1144	1143
1145		buf = (UINT8 *) malloc_or_die(size);
	1144	buf = alloc_array_or_die(UINT8, size);
1146	1145
1147	1146	/* read the file */
1148	1147	image_fseek(image, 0, SEEK_SET);

src/mess/video/vic6560.c

r4679	r4680
141	141	int width = video_screen_get_width(screen);
142	142	int height = video_screen_get_height(screen);
143	143
144		vic6560_bitmap = auto_bitmap_alloc(width, height, BITMAP_FORMAT_INDEXED16);
	144	vic6560_bitmap = auto_bitmap_alloc(machine, width, height, BITMAP_FORMAT_INDEXED16);
145	145	}
146	146
147	147	WRITE8_HANDLER ( vic6560_port_w )

src/mess/video/pdp1.c

r4679	r4680
56	56	VIDEO_START( pdp1 )
57	57	{
58	58	/* alloc bitmaps for our private fun */
59		panel_bitmap = auto_bitmap_alloc(panel_window_width, panel_window_height, BITMAP_FORMAT_INDEXED16);
60		typewriter_bitmap = auto_bitmap_alloc(typewriter_window_width, typewriter_window_height, BITMAP_FORMAT_INDEXED16);
	59	panel_bitmap = auto_bitmap_alloc(machine, panel_window_width, panel_window_height, BITMAP_FORMAT_INDEXED16);
	60	typewriter_bitmap = auto_bitmap_alloc(machine, typewriter_window_width, typewriter_window_height, BITMAP_FORMAT_INDEXED16);
61	61
62	62	/* set up out bitmaps */
63	63	pdp1_draw_panel_backdrop(machine, panel_bitmap);
r4679	r4680
65	65	bitmap_fill(typewriter_bitmap, &typewriter_bitmap_bounds, pen_typewriter_bg);
66	66
67	67	/* initialize CRT */
68		video_start_crt(pen_crt_num_levels, crt_window_offset_x, crt_window_offset_y, crt_window_width, crt_window_height);
	68	video_start_crt(machine, pen_crt_num_levels, crt_window_offset_x, crt_window_offset_y, crt_window_width, crt_window_height);
69	69	}
70	70
71	71

src/mess/video/cpschngr.c

r4679	r4680
573	573	palette_set_color(machine,i,MAKE_RGB(0,0,0));
574	574	}
575	575
576		cps1_buffered_obj = auto_malloc (cps1_obj_size);
577		memset(cps1_buffered_obj, 0x00, cps1_obj_size);
	576	cps1_buffered_obj = auto_alloc_array_clear(machine, UINT16, cps1_obj_size / sizeof(UINT16));
578	577
579	578	memset(cps1_gfxram, 0, cps1_gfxram_size);   /* Clear GFX RAM */
580	579	memset(cps1_cps_a_regs, 0, 0x40);   /* Clear CPS-A registers */

src/mess/video/apple2gs.c

r4679	r4680
19	19	{
20	20	apple2gs_bordercolor = 0;
21	21	apple2_video_start(machine, apple2gs_slowmem, 0x20000, 0, 8);
22		apple2gs_legacy_gfx = auto_bitmap_alloc(560, 192, BITMAP_FORMAT_INDEXED16);
	22	apple2gs_legacy_gfx = auto_bitmap_alloc(machine, 560, 192, BITMAP_FORMAT_INDEXED16);
23	23
24	24	state_save_register_item(machine, "BORDERCLR", NULL, 0, apple2gs_bordercolor);
25	25	}

src/mess/video/apple3.c

r4679	r4680
71	71	int i, j;
72	72	UINT32 v;
73	73
74		char_mem = auto_malloc(0x800);
	74	char_mem = auto_alloc_array(machine, UINT8, 0x800);
75	75	memset(char_mem, 0, 0x800);
76	76
77		hgr_map = auto_malloc(192 * sizeof(*hgr_map));
	77	hgr_map = auto_alloc_array(machine, UINT32, 192);
78	78	for (i = 0; i < 24; i++)
79	79	{
80	80	v = text_map[i] - 0x0400;

src/mess/video/i82720.c

r4679	r4680
1414	1414	gdc_mess.mode = intf->mode;
1415	1415
1416	1416	/* Video RAM */
1417		gdc_mess.vram = (UINT16*)auto_malloc (gdc_mess.vramsize * sizeof(UINT16) );
1418		memset (gdc_mess.vram, 0, gdc_mess.vramsize*sizeof(UINT16) );
	1417	gdc_mess.vram = auto_alloc_array_clear(machine, UINT16, gdc_mess.vramsize);
1419	1418
1420	1419	/* back bitmap */
1421	1420
1422		gdc_mess.tmpbmp = auto_bitmap_alloc (640, 400, BITMAP_FORMAT_INDEXED16);
	1421	gdc_mess.tmpbmp = auto_bitmap_alloc (machine, 640, 400, BITMAP_FORMAT_INDEXED16);
1423	1422	gdc_fifo_reset(&gdc);
1424	1423	videoram_size = gdc_mess.vramsize;
1425	1424

src/mess/video/cdp1862.c

r4679	r4680
142	142	assert(cdp1862->screen != NULL);
143	143
144	144	/* allocate the temporary bitmap */
145		cdp1862->bitmap = auto_bitmap_alloc(video_screen_get_width(cdp1862->screen), video_screen_get_height(cdp1862->screen), video_screen_get_format(cdp1862->screen));
	145	cdp1862->bitmap = auto_bitmap_alloc(device->machine, video_screen_get_width(cdp1862->screen), video_screen_get_height(cdp1862->screen), video_screen_get_format(cdp1862->screen));
146	146
147	147	/* initialize the palette */
148	148	cdp1862_init_palette(device);

src/mess/video/pocketc.c

r4679	r4680
52	52	VIDEO_START( pocketc )
53	53	{
54	54	videoram_size = 6 * 2 + 24;
55		videoram = (UINT8*)auto_malloc (videoram_size);
	55	videoram = auto_alloc_array(machine, UINT8, videoram_size);
56	56	}
57	57
58	58

src/mess/video/newport.c

r4679	r4680
181	181	nREX3_DrawMode1 = 0x3002f001;
182	182	nREX3_DCBMode = 0x00000780;
183	183	nREX3_Kludge_SkipLine = 0;
184		video_base = auto_malloc( (1280+64) * (1024+64) * 4 );
185		memset( video_base, 0x00, (1280+64) * (1024+64) * 4 );
	184	video_base = auto_alloc_array_clear(machine, UINT32, (1280+64) * (1024+64));
186	185	}
187	186
188	187	VIDEO_UPDATE( newport )

src/mess/video/pc_vga.c

r4679	r4680
616	616	else
617	617	{
618	618	memory_set_bankptr(machine,1, vga.memory);
619		memory_install_read8_handler(space,  0xa0000, 0xbffff, 0, 0, SMH_BANK1 );
620		memory_install_write8_handler(space, 0xa0000, 0xbffff, 0, 0, SMH_BANK1 );
	619	memory_install_read8_handler(space,  0xa0000, 0xbffff, 0, 0, SMH_BANK(1) );
	620	memory_install_write8_handler(space, 0xa0000, 0xbffff, 0, 0, SMH_BANK(1) );
621	621	}
622	622	break;
623	623
r4679	r4680
635	635	else
636	636	{
637	637	memory_set_bankptr(machine,1, vga.memory);
638		memory_install_read64_handler(space,  0xa0000, 0xbffff, 0, 0, SMH_BANK1 );
639		memory_install_write64_handler(space, 0xa0000, 0xbffff, 0, 0, SMH_BANK1 );
	638	memory_install_read64_handler(space,  0xa0000, 0xbffff, 0, 0, SMH_BANK(1) );
	639	memory_install_write64_handler(space, 0xa0000, 0xbffff, 0, 0, SMH_BANK(1) );
640	640	}
641	641	break;
642	642
r4679	r4680
1124	1124	vga.svga_intf.crtc_regcount = 0x19;
1125	1125	}
1126	1126
1127		vga.memory         = (UINT8 *) auto_malloc(vga.svga_intf.vram_size);
1128		vga.fontdirty      = (UINT8 *) auto_malloc(0x800);
1129		vga.sequencer.data   = (UINT8 *) auto_malloc(vga.svga_intf.seq_regcount);
1130		vga.crtc.data      = (UINT8 *) auto_malloc(vga.svga_intf.crtc_regcount);
1131		vga.gc.data         = (UINT8 *) auto_malloc(vga.svga_intf.gc_regcount);
	1127	vga.memory         = auto_alloc_array(machine, UINT8, vga.svga_intf.vram_size);
	1128	vga.fontdirty      = auto_alloc_array(machine, UINT8, 0x800);
	1129	vga.sequencer.data   = auto_alloc_array(machine, UINT8, vga.svga_intf.seq_regcount);
	1130	vga.crtc.data      = auto_alloc_array(machine, UINT8, vga.svga_intf.crtc_regcount);
	1131	vga.gc.data         = auto_alloc_array(machine, UINT8, vga.svga_intf.gc_regcount);
1132	1132	memset(vga.memory, '\0', vga.svga_intf.vram_size);
1133	1133	memset(vga.fontdirty, '\0', 0x800);
1134	1134	memset(vga.sequencer.data, '\0', vga.svga_intf.seq_regcount);

src/mess/video/tmc600.c

r4679	r4680
129	129
130	130	/* allocate memory */
131	131
132		state->page_ram = auto_malloc(TMC600_PAGE_RAM_SIZE);
133		state->color_ram = auto_malloc(TMC600_PAGE_RAM_SIZE);
	132	state->page_ram = auto_alloc_array(machine, UINT8, TMC600_PAGE_RAM_SIZE);
	133	state->color_ram = auto_alloc_array(machine, UINT8, TMC600_PAGE_RAM_SIZE);
134	134
135	135	/* find devices */
136	136

src/mess/video/advision.c

r4679	r4680
22	22	advision_state *state = machine->driver_data;
23	23
24	24	state->video_hpos = 0;
25		state->display = auto_malloc(8 * 8 * 256);
	25	state->display = auto_alloc_array(machine, UINT8, 8 * 8 * 256);
26	26	memset(state->display, 0, 8 * 8 * 256);
27	27	}
28	28

src/mess/video/abc800.c

r4679	r4680
203	203
204	204	/* allocate memory */
205	205
206		state->charram = auto_malloc(ABC800M_CHAR_RAM_SIZE);
	206	state->charram = auto_alloc_array(machine, UINT8, ABC800M_CHAR_RAM_SIZE);
207	207
208	208	/* find devices */
209	209
r4679	r4680
229	229
230	230	/* allocate memory */
231	231
232		state->charram = auto_malloc(ABC800C_CHAR_RAM_SIZE);
	232	state->charram = auto_alloc_array(machine, UINT8, ABC800C_CHAR_RAM_SIZE);
233	233
234	234	/* find memory regions */
235	235

src/mess/video/aim65.c

r4679	r4680
131	131
132	132	/*
133	133	videoram_size = 600 * 10 * 2;
134		printerRAM = (UINT16*)auto_malloc (videoram_size );
	134	printerRAM = auto_alloc_array(machine, UINT16, videoram_size / 2);
135	135	memset(printerRAM, 0, videoram_size);
136	136	printer_x = 0;
137	137	printer_y = 0;

src/mess/video/arcadia.c

r4679	r4680
350	350	const device_config *screen = video_screen_first(machine->config);
351	351	int width = video_screen_get_width(screen);
352	352	int height = video_screen_get_height(screen);
353		arcadia_video.bitmap = auto_bitmap_alloc(width, height, BITMAP_FORMAT_INDEXED16);
	353	arcadia_video.bitmap = auto_bitmap_alloc(machine, width, height, BITMAP_FORMAT_INDEXED16);
354	354	}
355	355	}
356	356

src/mess/video/m6847.c

r4679	r4680
1824	1824	v = &variants[cfg->type];
1825	1825
1826	1826	/* allocate instance */
1827		m6847 = auto_malloc(sizeof(*m6847));
1828		memset(m6847, 0, sizeof(*m6847));
	1827	m6847 = auto_alloc_clear(machine, m6847_vdg);
1829	1828	set_dirty();
1830	1829
1831	1830	/* copy configuration */

src/mess/video/cgenie.c

r4679	r4680
34	34
35	35	VIDEO_START_CALL(generic_bitmapped);
36	36
37		dlybitmap = auto_bitmap_alloc(width, height, BITMAP_FORMAT_INDEXED16);
	37	dlybitmap = auto_bitmap_alloc(machine, width, height, BITMAP_FORMAT_INDEXED16);
38	38	}
39	39
40	40	/***************************************************************************

src/mess/video/x68k.c

r4679	r4680
1044	1044	{
1045	1045	int gfx_index;
1046	1046
1047		x68k_text_bitmap = auto_bitmap_alloc(1024,1024,BITMAP_FORMAT_INDEXED16);
1048		x68k_gfx_big_bitmap = auto_bitmap_alloc(1024,1024,BITMAP_FORMAT_INDEXED16);
1049		x68k_gfx_0_bitmap_16 = auto_bitmap_alloc(512,512,BITMAP_FORMAT_INDEXED16);
1050		x68k_gfx_1_bitmap_16 = auto_bitmap_alloc(512,512,BITMAP_FORMAT_INDEXED16);
1051		x68k_gfx_2_bitmap_16 = auto_bitmap_alloc(512,512,BITMAP_FORMAT_INDEXED16);
1052		x68k_gfx_3_bitmap_16 = auto_bitmap_alloc(512,512,BITMAP_FORMAT_INDEXED16);
1053		x68k_gfx_0_bitmap_256 = auto_bitmap_alloc(512,512,BITMAP_FORMAT_INDEXED16);
1054		x68k_gfx_1_bitmap_256 = auto_bitmap_alloc(512,512,BITMAP_FORMAT_INDEXED16);
1055		x68k_gfx_0_bitmap_65536 = auto_bitmap_alloc(512,512,BITMAP_FORMAT_INDEXED16);
	1047	x68k_text_bitmap = auto_bitmap_alloc(machine, 1024,1024,BITMAP_FORMAT_INDEXED16);
	1048	x68k_gfx_big_bitmap = auto_bitmap_alloc(machine, 1024,1024,BITMAP_FORMAT_INDEXED16);
	1049	x68k_gfx_0_bitmap_16 = auto_bitmap_alloc(machine, 512,512,BITMAP_FORMAT_INDEXED16);
	1050	x68k_gfx_1_bitmap_16 = auto_bitmap_alloc(machine, 512,512,BITMAP_FORMAT_INDEXED16);
	1051	x68k_gfx_2_bitmap_16 = auto_bitmap_alloc(machine, 512,512,BITMAP_FORMAT_INDEXED16);
	1052	x68k_gfx_3_bitmap_16 = auto_bitmap_alloc(machine, 512,512,BITMAP_FORMAT_INDEXED16);
	1053	x68k_gfx_0_bitmap_256 = auto_bitmap_alloc(machine, 512,512,BITMAP_FORMAT_INDEXED16);
	1054	x68k_gfx_1_bitmap_256 = auto_bitmap_alloc(machine, 512,512,BITMAP_FORMAT_INDEXED16);
	1055	x68k_gfx_0_bitmap_65536 = auto_bitmap_alloc(machine, 512,512,BITMAP_FORMAT_INDEXED16);
1056	1056
1057	1057	for (gfx_index = 0; gfx_index < MAX_GFX_ELEMENTS; gfx_index++)
1058	1058	if (machine->gfx[gfx_index] == 0)

src/mess/video/spectrum.c

r4679	r4680
32	32	spectrum_frame_number = 0;
33	33	spectrum_flash_invert = 0;
34	34
35		EventList_Initialise(30000);
	35	EventList_Initialise(machine, 30000);
36	36
37	37	retrace_cycles = SPEC_RETRACE_CYCLES;
38	38
r4679	r4680
44	44	spectrum_frame_number = 0;
45	45	spectrum_flash_invert = 0;
46	46
47		EventList_Initialise(30000);
	47	EventList_Initialise(machine, 30000);
48	48
49	49	retrace_cycles = SPEC128_RETRACE_CYCLES;
50	50	}

src/mess/video/tx0.c

r4679	r4680
42	42	VIDEO_START( tx0 )
43	43	{
44	44	/* alloc bitmaps for our private fun */
45		panel_bitmap = auto_bitmap_alloc(panel_window_width, panel_window_height, BITMAP_FORMAT_INDEXED16);
46		typewriter_bitmap = auto_bitmap_alloc(typewriter_window_width, typewriter_window_height, BITMAP_FORMAT_INDEXED16);
	45	panel_bitmap = auto_bitmap_alloc(machine, panel_window_width, panel_window_height, BITMAP_FORMAT_INDEXED16);
	46	typewriter_bitmap = auto_bitmap_alloc(machine, typewriter_window_width, typewriter_window_height, BITMAP_FORMAT_INDEXED16);
47	47
48	48	/* set up out bitmaps */
49	49	tx0_draw_panel_backdrop(machine, panel_bitmap);
r4679	r4680
51	51	bitmap_fill(typewriter_bitmap, &typewriter_bitmap_bounds, pen_typewriter_bg);
52	52
53	53	/* initialize CRT */
54		video_start_crt(pen_crt_num_levels, crt_window_offset_x, crt_window_offset_y, crt_window_width, crt_window_height);
	54	video_start_crt(machine, pen_crt_num_levels, crt_window_offset_x, crt_window_offset_y, crt_window_width, crt_window_height);
55	55	}
56	56
57	57

src/mess/video/crtc6845.c

r4679	r4680
108	108	struct mscrtc6845 *crtc;
109	109	int idx;
110	110
111		crtc = auto_malloc(sizeof(struct mscrtc6845));
112		memset(crtc, 0, sizeof(*crtc));
	111	crtc = auto_alloc_clear(machine, struct mscrtc6845);
113	112	crtc->cursor_time = attotime_to_double(timer_get_time(machine));
114	113	crtc->config = *config;
115	114	mscrtc6845 = crtc;

src/mess/video/pc8801.c

r4679	r4680
100	100	int width = video_screen_get_width(screen);
101	101	int height = video_screen_get_height(screen);
102	102
103		wbm1 = auto_bitmap_alloc(width, height, BITMAP_FORMAT_INDEXED16);
104		wbm2 = auto_bitmap_alloc(width, height, BITMAP_FORMAT_INDEXED16);
	103	wbm1 = auto_bitmap_alloc(machine, width, height, BITMAP_FORMAT_INDEXED16);
	104	wbm2 = auto_bitmap_alloc(machine, width, height, BITMAP_FORMAT_INDEXED16);
105	105	pc8801_is_24KHz=hireso;
106	106	crtcON=0;
107	107	textON=1;
r4679	r4680
112	112	dmac_addr[2]=dmac_size[2]=0;
113	113	dmac_flag=dmac_status=0;
114	114
115		gVRAM = (UINT8*) auto_malloc(0xc000);
116		pc88sr_textRAM = (UINT8*) auto_malloc(0x1000);
117		attr_tmp = auto_malloc(sizeof(unsigned short)*80*25);
118		attr_old = auto_malloc(sizeof(unsigned short)*80*100);
119		text_old = auto_malloc(sizeof(unsigned short)*80*100);
120		graph_dirty = auto_malloc(80*100);
	115	gVRAM = auto_alloc_array(machine, UINT8, 0xc000);
	116	pc88sr_textRAM = auto_alloc_array(machine, UINT8, 0x1000);
	117	attr_tmp = auto_alloc_array(machine, UINT16, 80*25);
	118	attr_old = auto_alloc_array(machine, UINT16, 80*100);
	119	text_old = auto_alloc_array(machine, UINT16, 80*100);
	120	graph_dirty = auto_alloc_array(machine, char, 80*100);
121	121
122	122	memset(gVRAM,0,0xc000);
123	123	memset(pc88sr_textRAM,0,0x1000);
r4679	r4680
279	279	switch(selected_vram) {
280	280	#define XXX(n) \
281	281	case (n+1): \
282		rh5 = SMH_BANK5; \
283		rh6 = SMH_BANK6; \
	282	rh5 = SMH_BANK(5); \
	283	rh6 = SMH_BANK(6); \
284	284	wh5 = write_gvram##n##_bank5; \
285	285	wh6 = write_gvram##n##_bank6; \
286	286	memory_set_bankptr(machine, 5, gVRAM + 0x4000*n ); \

src/mess/video/mekd2.c

r4679	r4680
46	46	VIDEO_START( mekd2 )
47	47	{
48	48	videoram_size = 6 * 2 + 24;
49		videoram = (UINT8*)auto_malloc (videoram_size);
	49	videoram = auto_alloc_array(machine, UINT8, videoram_size);
50	50	}
51	51
52	52

src/mess/video/channelf.c

r4679	r4680
42	42	VIDEO_START( channelf )
43	43	{
44	44	videoram_size = 0x2000;
45		videoram = auto_malloc(videoram_size);
	45	videoram = auto_alloc_array(machine, UINT8, videoram_size);
46	46	}
47	47
48	48	static int recalc_palette_offset(int reg1, int reg2)

src/mess/video/pc_mda.c

r4679	r4680
105	105	switch(buswidth)
106	106	{
107	107	case 8:
108		memory_install_read8_handler(space, 0xb0000, 0xb0fff, 0, 0x07000, SMH_BANK11 );
	108	memory_install_read8_handler(space, 0xb0000, 0xb0fff, 0, 0x07000, SMH_BANK(11) );
109	109	memory_install_write8_handler(space, 0xb0000, 0xb0fff, 0, 0x07000, pc_video_videoram_w );
110	110	memory_install_read8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_IO), 0x3b0, 0x3bf, 0, 0, pc_MDA_r );
111	111	memory_install_write8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_IO), 0x3b0, 0x3bf, 0, 0, pc_MDA_w );
r4679	r4680
121	121	mda.chr_gen = memory_region( machine, "gfx1" );
122	122
123	123	videoram_size = 0x1000;   /* This is actually 0x1000 in reality */
124		videoram = auto_malloc(videoram_size);
	124	videoram = auto_alloc_array(machine, UINT8, videoram_size);
125	125	memory_set_bankptr(machine,11, videoram);
126	126	}
127	127
r4679	r4680
455	455	switch(buswidth)
456	456	{
457	457	case 8:
458		memory_install_read8_handler(space, 0xb0000, 0xbffff, 0, 0, SMH_BANK11 );
	458	memory_install_read8_handler(space, 0xb0000, 0xbffff, 0, 0, SMH_BANK(11) );
459	459	memory_install_write8_handler(space, 0xb0000, 0xbffff, 0, 0, pc_video_videoram_w );
460	460	memory_install_read8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_IO), 0x3b0, 0x3bf, 0, 0, pc_hercules_r );
461	461	memory_install_write8_handler(cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_IO), 0x3b0, 0x3bf, 0, 0, pc_hercules_w );
r4679	r4680
471	471	mda.chr_gen = memory_region( machine, "gfx1" );
472	472
473	473	videoram_size = 0x10000;
474		videoram = auto_malloc(videoram_size);
	474	videoram = auto_alloc_array(machine, UINT8, videoram_size);
475	475	memory_set_bankptr(machine,11, videoram);
476	476	}
477	477

src/mess/video/vdc8563.c

r4679	r4680
207	207
208	208	VIDEO_START( vdc8563 )
209	209	{
210		vdc.ram=(UINT8*) auto_malloc(0x20000);
211		vdc.dirty=vdc.ram+0x10000;
	210	vdc.ram = auto_alloc_array(machine, UINT8, 0x20000);
	211	vdc.dirty = vdc.ram + 0x10000;
212	212	}
213	213
214	214	#define CHAR_WIDTH (((vdc.reg[0x16]&0xf0)>>4)+1)

src/mess/video/coco3.c

r4679	r4680
802	802	const UINT8 *rom;
803	803
804	804	/* allocate video */
805		video = auto_malloc(sizeof(*video));
806		memset(video, 0, sizeof(*video));
	805	video = auto_alloc_clear(machine, coco3_video);
807	806	coco3_set_dirty();
808	807
809	808	/* initialize palette */

src/mess/video/pc_cga.c

r4679	r4680
307	307
308	308	The correct value for hue will usually be a multiple of 128.
309	309	*/
310		static void ntsc_decoder_init(struct ntsc_decoder *ntsc, int period, int hue)
	310	static void ntsc_decoder_init(running_machine *machine, struct ntsc_decoder *ntsc, int period, int hue)
311	311	{
312	312	int j;
313	313
314	314	ntsc->period = period;
315		ntsc->I_filter = auto_malloc(period * sizeof(int));
316		ntsc->Q_filter = auto_malloc(period * sizeof(int));
317		ntsc->Y_buffer = auto_malloc(period * sizeof(int));
318		ntsc->I_buffer = auto_malloc(period * sizeof(int));
319		ntsc->Q_buffer = auto_malloc(period * sizeof(int));
	315	ntsc->I_filter = auto_alloc_array(machine, int, period);
	316	ntsc->Q_filter = auto_alloc_array(machine, int, period);
	317	ntsc->Y_buffer = auto_alloc_array(machine, int, period);
	318	ntsc->I_buffer = auto_alloc_array(machine, int, period);
	319	ntsc->Q_buffer = auto_alloc_array(machine, int, period);
320	320	ntsc_clear(ntsc);
321	321	for (j=0;j<period;++j)
322	322	{
r4679	r4680
476	476	switch(buswidth)
477	477	{
478	478	case 8:
479		memory_install_read8_handler(space, 0xb8000, 0xbbfff, 0, 0x04000, SMH_BANK11 );
	479	memory_install_read8_handler(space, 0xb8000, 0xbbfff, 0, 0x04000, SMH_BANK(11) );
480	480	memory_install_write8_handler(space, 0xb8000, 0xbbfff, 0, 0x04000, pc_video_videoram_w );
481	481	memory_install_read8_handler(spaceio, 0x3d0, 0x3df, 0, 0, pc_cga8_r );
482	482	memory_install_write8_handler(spaceio, 0x3d0, 0x3df, 0, 0, pc_cga8_w );
483	483	break;
484	484
485	485	case 16:
486		memory_install_read16_handler(space, 0xb8000, 0xbbfff, 0, 0x04000, SMH_BANK11 );
	486	memory_install_read16_handler(space, 0xb8000, 0xbbfff, 0, 0x04000, SMH_BANK(11) );
487	487	memory_install_write16_handler(space, 0xb8000, 0xbbfff, 0, 0x04000, pc_video_videoram16le_w );
488	488	memory_install_read16_handler(spaceio, 0x3d0, 0x3df, 0, 0, pc_cga16le_r );
489	489	memory_install_write16_handler(spaceio, 0x3d0, 0x3df, 0, 0, pc_cga16le_w );
490	490	break;
491	491
492	492	case 32:
493		memory_install_read32_handler(space, 0xb8000, 0xbbfff, 0, 0x04000, SMH_BANK11 );
	493	memory_install_read32_handler(space, 0xb8000, 0xbbfff, 0, 0x04000, SMH_BANK(11) );
494	494	memory_install_write32_handler(space, 0xb8000, 0xbbfff, 0, 0x04000, pc_video_videoram32_w );
495	495	memory_install_read32_handler(spaceio, 0x3d0, 0x3df, 0, 0, pc_cga32le_r );
496	496	memory_install_write32_handler(spaceio, 0x3d0, 0x3df, 0, 0, pc_cga32le_w );
r4679	r4680
503	503
504	504	videoram_size = 0x4000;
505	505
506		videoram = auto_malloc(videoram_size);
	506	videoram = auto_alloc_array(machine, UINT8, videoram_size);
507	507
508	508	memory_set_bankptr(machine,11, videoram);
509	509
510	510	internal_pc_cga_video_start(machine, M6845_PERSONALITY_GENUINE);
511	511
512		ntsc_decoder_init( &ntsc, 8, 256 );
	512	ntsc_decoder_init( machine, &ntsc, 8, 256 );
513	513	}
514	514
515	515
r4679	r4680
1637	1637	static VIDEO_START( pc1512 )
1638	1638	{
1639	1639	videoram_size = 0x10000;
1640		videoram = auto_malloc( videoram_size );
	1640	videoram = auto_alloc_array(machine, UINT8, videoram_size );
1641	1641	memory_set_bankptr(machine,1,videoram + videoram_offset[0]);
1642	1642
1643	1643	memset( &pc1512, 0, sizeof ( pc1512 ) );

src/mess/video/microtan.c

r4679	r4680
44	44	bg_tilemap = tilemap_create(machine, get_bg_tile_info, tilemap_scan_rows,
45	45	8, 16, 32, 16);
46	46
47		microtan_chunky_buffer = auto_malloc(videoram_size);
	47	microtan_chunky_buffer = auto_alloc_array(machine, UINT8, videoram_size);
48	48	memset(microtan_chunky_buffer, 0, videoram_size);
49	49	microtan_chunky_graphics = 0;
50	50	}

src/mess/video/smsvdp.c

r4679	r4680
223	223	*/
224	224	smsvdp.VRAM = memory_region_alloc( machine, "gfx1", VRAM_SIZE, ROM_REQUIRED );
225	225	smsvdp.CRAM = memory_region_alloc( machine, "gfx2", MAX_CRAM_SIZE, ROM_REQUIRED );
226		smsvdp.line_buffer = auto_malloc( 256 * 5 * sizeof(int) );
	226	smsvdp.line_buffer = auto_alloc_array(machine, int, 256 * 5);
227	227	memset( smsvdp.line_buffer, 0, 256 * 5 * sizeof(int) );
228	228
229	229	/* Clear RAM */
r4679	r4680
235	235
236	236	smsvdp.cram_mask = ( IS_GAMEGEAR_VDP && ! smsvdp.gg_sms_mode ) ? ( GG_CRAM_SIZE - 1 ) : ( SMS_CRAM_SIZE - 1 );
237	237
238		smsvdp.collision_buffer = auto_malloc(SMS_X_PIXELS);
	238	smsvdp.collision_buffer = auto_alloc_array(machine, UINT8, SMS_X_PIXELS);
239	239
240	240	/* Make temp bitmap for rendering */
241		tmpbitmap = auto_bitmap_alloc(width, height, BITMAP_FORMAT_INDEXED32);
	241	tmpbitmap = auto_bitmap_alloc(machine, width, height, BITMAP_FORMAT_INDEXED32);
242	242
243		smsvdp.prev_bitmap = auto_bitmap_alloc(width, height, BITMAP_FORMAT_INDEXED32);
	243	smsvdp.prev_bitmap = auto_bitmap_alloc(machine, width, height, BITMAP_FORMAT_INDEXED32);
244	244
245	245	set_display_settings( machine );
246	246

src/mess/video/pc_ega.c

r4679	r4680
616	616	switch(buswidth)
617	617	{
618	618	case 8:
619		memory_install_read8_handler(space, 0xa0000, 0xaffff, 0, 0, SMH_BANK11 );
620		memory_install_read8_handler(space, 0xb0000, 0xb7fff, 0, 0, SMH_BANK12 );
621		memory_install_read8_handler(space, 0xb8000, 0xbffff, 0, 0, SMH_BANK13 );
	619	memory_install_read8_handler(space, 0xa0000, 0xaffff, 0, 0, SMH_BANK(11) );
	620	memory_install_read8_handler(space, 0xb0000, 0xb7fff, 0, 0, SMH_BANK(12) );
	621	memory_install_read8_handler(space, 0xb8000, 0xbffff, 0, 0, SMH_BANK(13) );
622	622	memory_install_write8_handler(space, 0xa0000, 0xbffff, 0, 0, pc_ega_videoram_w );
623	623	memory_install_read8_handler(spaceio, 0x3b0, 0x3bb, 0, 0, pc_ega8_3b0_r );
624	624	memory_install_write8_handler(spaceio, 0x3b0, 0x3bb, 0, 0, pc_ega8_3b0_w );
r4679	r4680
629	629	break;
630	630
631	631	case 16:
632		memory_install_read16_handler(space, 0xa0000, 0xaffff, 0, 0, SMH_BANK11 );
633		memory_install_read16_handler(space, 0xb0000, 0xb7fff, 0, 0, SMH_BANK12 );
634		memory_install_read16_handler(space, 0xb8000, 0xbffff, 0, 0, SMH_BANK13 );
	632	memory_install_read16_handler(space, 0xa0000, 0xaffff, 0, 0, SMH_BANK(11) );
	633	memory_install_read16_handler(space, 0xb0000, 0xb7fff, 0, 0, SMH_BANK(12) );
	634	memory_install_read16_handler(space, 0xb8000, 0xbffff, 0, 0, SMH_BANK(13) );
635	635	memory_install_write16_handler(space, 0xa0000, 0xbffff, 0, 0, pc_ega_videoram16le_w );
636	636	memory_install_read16_handler(spaceio, 0x3b0, 0x3bb, 0, 0, pc_ega16le_3b0_r );
637	637	memory_install_write16_handler(spaceio, 0x3b0, 0x3bb, 0, 0, pc_ega16le_3b0_w );
r4679	r4680
642	642	break;
643	643
644	644	case 32:
645		memory_install_read32_handler(space, 0xa0000, 0xaffff, 0, 0, SMH_BANK11 );
646		memory_install_read32_handler(space, 0xb0000, 0xb7fff, 0, 0, SMH_BANK12 );
647		memory_install_read32_handler(space, 0xb8000, 0xbffff, 0, 0, SMH_BANK13 );
	645	memory_install_read32_handler(space, 0xa0000, 0xaffff, 0, 0, SMH_BANK(11) );
	646	memory_install_read32_handler(space, 0xb0000, 0xb7fff, 0, 0, SMH_BANK(12) );
	647	memory_install_read32_handler(space, 0xb8000, 0xbffff, 0, 0, SMH_BANK(13) );
648	648	memory_install_write32_handler(space, 0xa0000, 0xbffff, 0, 0, pc_ega_videoram32le_w );
649	649	memory_install_read32_handler(spaceio, 0x3b0, 0x3bb, 0, 0, pc_ega32le_3b0_r );
650	650	memory_install_write32_handler(spaceio, 0x3b0, 0x3bb, 0, 0, pc_ega32le_3b0_w );

src/mess/video/special.c

r4679	r4680
89	89
90	90	VIDEO_START( specimx )
91	91	{
92		specimx_colorram = auto_malloc (0x3000);
	92	specimx_colorram = auto_alloc_array(machine, UINT8, 0x3000);
93	93	memset(specimx_colorram,0x70,0x3000);
94	94	}
95	95

src/mess/video/cdp1864.c

r4679	r4680
430	430	assert(cdp1864->screen != NULL);
431	431
432	432	/* allocate the temporary bitmap */
433		cdp1864->bitmap = auto_bitmap_alloc(video_screen_get_width(cdp1864->screen), video_screen_get_height(cdp1864->screen), video_screen_get_format(cdp1864->screen));
	433	cdp1864->bitmap = auto_bitmap_alloc(device->machine, video_screen_get_width(cdp1864->screen), video_screen_get_height(cdp1864->screen), video_screen_get_format(cdp1864->screen));
434	434	bitmap_fill(cdp1864->bitmap, 0, CDP1864_BACKGROUND_COLOR_SEQUENCE[cdp1864->bgcolor] + 8);
435	435
436	436	/* initialize the palette */

src/mess/video/ssystem3.c

r4679	r4680
54	54	{
55	55	// artwork seams to need this
56	56	videoram_size = 6 * 2 + 24;
57		videoram = (UINT8*) auto_malloc (videoram_size);
	57	videoram = auto_alloc_array(machine, UINT8, videoram_size);
58	58	}
59	59
60	60

src/mess/video/avigo.c

r4679	r4680
115	115	avigo_screen_column = 0;
116	116
117	117	/* allocate video memory */
118		avigo_video_memory = auto_malloc(((AVIGO_SCREEN_WIDTH>>3)*AVIGO_SCREEN_HEIGHT));
	118	avigo_video_memory = auto_alloc_array(machine, UINT8, ((AVIGO_SCREEN_WIDTH>>3)*AVIGO_SCREEN_HEIGHT));
119	119	machine->gfx[0] = stylus_pointer = gfx_element_alloc(machine, &pointerlayout, pointermask, machine->config->total_colors / 16, 0);
120	120
121	121	stylus_pointer->total_colors = 3;

src/mess/video/vic6567.c

r4679	r4680
715	715	int width = video_screen_get_width(screen);
716	716	int height = video_screen_get_height(screen);
717	717
718		vic2.bitmap = auto_bitmap_alloc(width, height, BITMAP_FORMAT_INDEXED16);
	718	vic2.bitmap = auto_bitmap_alloc(machine, width, height, BITMAP_FORMAT_INDEXED16);
719	719
720	720	if (vic2.vic3) {
721		vic2.screen[0] = (UINT8*)auto_malloc (sizeof (UINT8) * 216 * 656 / 8);
	721	vic2.screen[0] = auto_alloc_array(machine, UINT8, 216 * 656 / 8);
722	722
723	723	for (i = 1; i < 216; i++)
724	724	vic2.screen[i] = vic2.screen[i - 1] + 656 / 8;
725	725	} else {
726		vic2.screen[0] = (UINT8*)auto_malloc (sizeof (UINT8) * 216 * 336 / 8);
	726	vic2.screen[0] = auto_alloc_array(machine, UINT8, 216 * 336 / 8);
727	727
728	728	for (i = 1; i < 216; i++)
729	729	vic2.screen[i] = vic2.screen[i - 1] + 336 / 8;

src/mess/video/comx35.c

r4679	r4680
103	103
104	104	// allocate memory
105	105
106		state->pageram = auto_malloc(COMX35_PAGERAM_SIZE);
107		state->charram = auto_malloc(COMX35_CHARRAM_SIZE);
108		state->videoram = auto_malloc(COMX35_VIDEORAM_SIZE);
	106	state->pageram = auto_alloc_array(machine, UINT8, COMX35_PAGERAM_SIZE);
	107	state->charram = auto_alloc_array(machine, UINT8, COMX35_CHARRAM_SIZE);
	108	state->videoram = auto_alloc_array(machine, UINT8, COMX35_VIDEORAM_SIZE);
109	109
110	110	// register for save state
111	111

src/mess/video/abc802.c

r4679	r4680
219	219
220	220	/* allocate memory */
221	221
222		state->charram = auto_malloc(ABC802_CHAR_RAM_SIZE);
	222	state->charram = auto_alloc_array(machine, UINT8, ABC802_CHAR_RAM_SIZE);
223	223
224	224	/* find devices */
225	225

src/mess/video/odyssey2.c

r4679	r4680
614	614	control_status = 0;
615	615	iff = 0;
616	616
617		tmp_bitmap = auto_bitmap_alloc( width, height, video_screen_get_format(screen) );
	617	tmp_bitmap = auto_bitmap_alloc( machine, width, height, video_screen_get_format(screen) );
618	618
619	619	i824x_line_timer = timer_alloc(machine,  i824x_scanline_callback, NULL );
620	620	timer_adjust_periodic( i824x_line_timer, video_screen_get_time_until_pos(machine->primary_screen, 1, I824X_START_ACTIVE_SCAN ), 0, video_screen_get_scan_period( machine->primary_screen ) );

src/mess/video/apple2.c

r4679	r4680
382	382	a2_videoram = vram;
383	383
384	384	/* 2^3 dependent pixels * 2 color sets * 2 offsets */
385		hires_artifact_map = auto_malloc(sizeof(UINT16) * 8 * 2 * 2);
	385	hires_artifact_map = auto_alloc_array(machine, UINT16, 8 * 2 * 2);
386	386
387	387	/* 2^4 dependent pixels */
388		dhires_artifact_map = auto_malloc(sizeof(UINT16) * 16);
	388	dhires_artifact_map = auto_alloc_array(machine, UINT16, 16);
389	389
390	390	/* build hires artifact map */
391	391	for (i = 0; i < 8; i++)

src/mess/video/abc806.c

r4679	r4680
450	450
451	451	/* allocate memory */
452	452
453		state->charram = auto_malloc(ABC806_CHAR_RAM_SIZE);
454		state->colorram = auto_malloc(ABC806_ATTR_RAM_SIZE);
	453	state->charram = auto_alloc_array(machine, UINT8, ABC806_CHAR_RAM_SIZE);
	454	state->colorram = auto_alloc_array(machine, UINT8, ABC806_ATTR_RAM_SIZE);
455	455
456	456	/* register for state saving */
457	457

src/mess/video/tms3556.c

r4679	r4680
239	239
240	240	tms3556 core init (called at video init time)
241	241	*/
242		void tms3556_init(int vram_size)
	242	void tms3556_init(running_machine *machine, int vram_size)
243	243	{
244	244	memset(&vdp, 0, sizeof (vdp));
245	245
246	246	vdp.vram_size = vram_size;
247	247
248	248	/* allocate VRAM */
249		vdp.vram = auto_malloc(0x10000);
	249	vdp.vram = auto_alloc_array(machine, UINT8, 0x10000);
250	250	memset (vdp.vram, 0, 0x10000);
251	251	if (vdp.vram_size < 0x10000)
252	252	{

src/mess/video/crt.c

r4679	r4680
61	61
62	62	video init
63	63	*/
64		int video_start_crt(int num_levels, int offset_x, int offset_y, int width, int height)
	64	int video_start_crt(running_machine *machine, int num_levels, int offset_x, int offset_y, int width, int height)
65	65	{
66	66	int i;
67	67
r4679	r4680
72	72	window_height = height;
73	73
74	74	/* alloc the arrays */
75		list = auto_malloc(window_width * window_height * sizeof(point));
	75	list = auto_alloc_array(machine, point, window_width * window_height);
76	76
77		list_head = auto_malloc(window_height * sizeof(int));
	77	list_head = auto_alloc_array(machine, int, window_height);
78	78
79	79	/* fill with black and set up list as empty */
80	80	for (i=0; i<(window_width * window_height); i++)

src/mess/video/ti85.c

r4679	r4680
145	145	return;
146	146	}
147	147
148		ti85_frames = (UINT8 *) auto_malloc(ti_number_of_frames*ti_video_memory_size*sizeof (UINT8));
149		memset (ti85_frames, 0, sizeof(UINT8)*ti_number_of_frames*ti_video_memory_size);
	148	ti85_frames = auto_alloc_array_clear(machine, UINT8, ti_number_of_frames*ti_video_memory_size);
150	149	}
151	150
152	151	VIDEO_START( ti85 )

src/mess/video/tms3556.h

r4679	r4680
7	7	READ8_HANDLER(tms3556_reg_r);
8	8	WRITE8_HANDLER(tms3556_reg_w);
9	9
10		extern void tms3556_init(int vram_size);
	10	extern void tms3556_init(running_machine *machine, int vram_size);
11	11	extern void tms3556_reset(void);
12	12	extern void tms3556_interrupt(void);
13	13

src/mess/video/ted7360.c

r4679	r4680
956	956	/* cursorelement->colortable = cursorcolortable; */
957	957	cursorcolortable[1] = 1;
958	958	cursorelement->total_colors = 2;
959		ted7360_bitmap = auto_bitmap_alloc(width, height, BITMAP_FORMAT_INDEXED16);
	959	ted7360_bitmap = auto_bitmap_alloc(machine, width, height, BITMAP_FORMAT_INDEXED16);
960	960	}
961	961
962	962	static void ted7360_draw_character (running_machine *machine, int ybegin, int yend, int ch, int yoff, int xoff,

src/mess/video/crt.h

r4679	r4680
12	12
13	13	/*----------- defined in video/crt.c -----------*/
14	14
15		int video_start_crt(int num_levels, int offset_x, int offset_y, int width, int height);
	15	int video_start_crt(running_machine *machine, int num_levels, int offset_x, int offset_y, int width, int height);
16	16	void crt_plot(int x, int y);
17	17	VIDEO_EOF( crt );
18	18	VIDEO_UPDATE( crt );

src/mess/video/hd66421.c

r4679	r4680
126	126	{
127	127	_logerror( 0, ("video_start_hd66421\n"));
128	128	memset( &lcd, 0, sizeof( lcd));
129		lcd.ram = auto_malloc( HD66421_RAM_SIZE);
	129	lcd.ram = auto_alloc_array(machine, UINT8, HD66421_RAM_SIZE);
130	130	hd66421_state_save(machine);
131	131	}
132	132

src/mess/video/pecom.c

r4679	r4680
101	101
102	102	/* allocate memory */
103	103
104		state->page_ram = auto_malloc(PECOM_PAGE_RAM_SIZE);
105		state->charram = auto_malloc(0x800);
	104	state->page_ram = auto_alloc_array(machine, UINT8, PECOM_PAGE_RAM_SIZE);
	105	state->charram = auto_alloc_array(machine, UINT8, 0x800);
106	106
107	107	/* find devices */
108	108

src/mess/video/vc4000.c

r4679	r4680
101	101	if ((i&0x18)==0x18) background_collision[i]|=0x10;
102	102	}
103	103
104		vc4000_video.bitmap = auto_bitmap_alloc(width, height, BITMAP_FORMAT_INDEXED16);
	104	vc4000_video.bitmap = auto_bitmap_alloc(machine, width, height, BITMAP_FORMAT_INDEXED16);
105	105	}
106	106
107	107	#define STICKCENTRE   (105)

src/mess/video/733_asr.c

r4679	r4680
174	174	int height = video_screen_get_height(screen);
175	175	const rectangle *visarea = video_screen_get_visible_area(screen);
176	176
177		asr[unit].bitmap = auto_bitmap_alloc(width, height, BITMAP_FORMAT_INDEXED16);
	177	asr[unit].bitmap = auto_bitmap_alloc(machine, width, height, BITMAP_FORMAT_INDEXED16);
178	178
179	179	bitmap_fill(asr[unit].bitmap, visarea, 0);
180	180

src/mess/video/cdp1861.c

r4679	r4680
255	255	assert(cdp1861->screen != NULL);
256	256
257	257	/* allocate the temporary bitmap */
258		cdp1861->bitmap = auto_bitmap_alloc(video_screen_get_width(cdp1861->screen), video_screen_get_height(cdp1861->screen), video_screen_get_format(cdp1861->screen));
	258	cdp1861->bitmap = auto_bitmap_alloc(device->machine, video_screen_get_width(cdp1861->screen), video_screen_get_height(cdp1861->screen), video_screen_get_format(cdp1861->screen));
259	259
260	260	/* create the timers */
261	261	cdp1861->int_timer = timer_alloc(device->machine, cdp1861_int_tick, (void *)device);

src/mess/video/k1ge.c

r4679	r4680
833	833	k1ge->hblank_on_timer = timer_alloc( device->machine, k1ge_hblank_on_timer_callback, (void *) device );
834	834	k1ge->screen = devtag_get_device( device->machine, k1ge->intf->screen_tag );
835	835	k1ge->vram = memory_region( device->machine, k1ge->intf->vram_tag );
836		k1ge->bitmap = auto_bitmap_alloc( video_screen_get_width(k1ge->screen), video_screen_get_height(k1ge->screen), video_screen_get_format(k1ge->screen) );
	836	k1ge->bitmap = auto_bitmap_alloc( device->machine, video_screen_get_width(k1ge->screen), video_screen_get_height(k1ge->screen), video_screen_get_format(k1ge->screen) );
837	837	k1ge->draw = k1ge_draw;
838	838	}
839	839

src/mess/video/kc.c

r4679	r4680
577	577	}
578	578	#endif
579	579
580		static void kc85_common_vh_start(void)
	580	static void kc85_common_vh_start(running_machine *machine)
581	581	{
582	582	kc85_blink_state = 0;
583		EventList_Initialise(30000);
	583	EventList_Initialise(machine, 30000);
584	584	}
585	585
586	586	static unsigned char *kc85_4_display_video_ram;
r4679	r4680
589	589
590	590	VIDEO_START( kc85_4 )
591	591	{
592		kc85_common_vh_start();
	592	kc85_common_vh_start(machine);
593	593
594		kc85_4_video_ram = auto_malloc(
	594	kc85_4_video_ram = auto_alloc_array(machine, UINT8,
595	595	(KC85_4_SCREEN_COLOUR_RAM_SIZE*2) +
596	596	(KC85_4_SCREEN_PIXEL_RAM_SIZE*2));
597	597
r4679	r4680
694	694
695	695	VIDEO_START( kc85_3 )
696	696	{
697		kc85_common_vh_start();
	697	kc85_common_vh_start(machine);
698	698	}
699	699
700	700

src/mess/includes/msx_slot.h

r4679	r4680
149	149	int slot_type;
150	150	int mem_type;
151	151	char name[32];
152		int (*init)(slot_state*, int page, UINT8 *mem, int size);
	152	int (*init)(running_machine *machine, slot_state*, int page, UINT8 *mem, int size);
153	153	void (*reset)(running_machine *machine, slot_state*);
154	154	void (*map)(running_machine *machine, slot_state*, int page);
155	155	void (*write)(running_machine *machine, slot_state*, UINT16, UINT8);
r4679	r4680
215	215	};
216	216
217	217	#define MSX_SLOT_INIT(nm)          static int \
218		slot_##nm##_init (slot_state *state, int page, UINT8 *mem, int size)
	218	slot_##nm##_init (running_machine *machine, slot_state *state, int page, UINT8 *mem, int size)
219	219	#define MSX_SLOT_MAP(nm)         \
220	220	static void slot_##nm##_map (running_machine *machine, slot_state *state, int page)
221	221	#define MSX_SLOT_WRITE(nm)         \

src/mess/messdriv.c

r4679	r4680
100	100	DRIVER( vsaturn )   /* JVC V-Saturn                              */
101	101	DRIVER( hisaturn )   /* Hitachi HiSaturn                           */
102	102
103		DRIVER( dcjp )      /* 1998 Sega Dreamcast (Japan) */
104		DRIVER( dc )      /* 1999 Sega Dreamcast (USA) */
105		DRIVER( dceu )      /* 1999 Sega Dreamcast (Europe) */
106		DRIVER( dcdev )      /* 1998 Sega HKT-0120 Sega Dreamcast Development Box */
	103	//0131u1   DRIVER( dcjp )      /* 1998 Sega Dreamcast (Japan) */
	104	//0131u1   DRIVER( dc )      /* 1999 Sega Dreamcast (USA) */
	105	//0131u1   DRIVER( dceu )      /* 1999 Sega Dreamcast (Europe) */
	106	//0131u1   DRIVER( dcdev )      /* 1998 Sega HKT-0120 Sega Dreamcast Development Box */
107	107
108	108	/* BALLY */
109	109	DRIVER( astrocde )   /* Bally Astrocade                           */
r4679	r4680
216	216	DRIVER( z88 )      /*                                       */
217	217
218	218	/* AMSTRAD */
219		DRIVER( cpc464 )   /* Amstrad (Schneider in Germany) 1984            */
220		DRIVER( cpc664 )   /* Amstrad (Schneider in Germany) 1985            */
221		DRIVER( cpc6128 )   /* Amstrad (Schneider in Germany) 1985            */
222		DRIVER( cpc6128s )   /* Amstrad (Schneider in Germany) 1985            */
223		DRIVER( cpc6128f )   /* Amstrad (Schneider in Germany) 1985 (AZERTY)      */
224		DRIVER( cpc464p )   /* Amstrad CPC464  Plus - 1990                  */
225		DRIVER( cpc6128p )   /* Amstrad CPC6128 Plus - 1990                  */
226		DRIVER( gx4000 )   /* Amstrad GX4000 - 1990                     */
227		DRIVER( kccomp )   /* VEB KC compact                           */
228		DRIVER( al520ex )   /* Patisonic Aleste 520EX (1993)               */
229		DRIVER( pcw8256 )   /* 198? PCW8256                              */
230		DRIVER( pcw8512 )   /* 198? PCW8512                              */
231		DRIVER( pcw9256 )   /* 198? PCW9256                              */
232		DRIVER( pcw9512 )   /* 198? PCW9512 (+)                           */
233		DRIVER( pcw10 )    /* 198? PCW10                              */
234		DRIVER( pcw16 )      /* 1995 PCW16                              */
235		DRIVER( nc100 )      /* 1992 NC100                              */
236		DRIVER( nc200 )      /* 1993 NC200                              */
	219	//0131u1   DRIVER( cpc464 )   /* Amstrad (Schneider in Germany) 1984            */
	220	//0131u1   DRIVER( cpc664 )   /* Amstrad (Schneider in Germany) 1985            */
	221	//0131u1   DRIVER( cpc6128 )   /* Amstrad (Schneider in Germany) 1985            */
	222	//0131u1   DRIVER( cpc6128s )   /* Amstrad (Schneider in Germany) 1985            */
	223	//0131u1   DRIVER( cpc6128f )   /* Amstrad (Schneider in Germany) 1985 (AZERTY)      */
	224	//0131u1   DRIVER( cpc464p )   /* Amstrad CPC464  Plus - 1990                  */
	225	//0131u1   DRIVER( cpc6128p )   /* Amstrad CPC6128 Plus - 1990                  */
	226	//0131u1   DRIVER( gx4000 )   /* Amstrad GX4000 - 1990                     */
	227	//0131u1   DRIVER( kccomp )   /* VEB KC compact                           */
	228	//0131u1   DRIVER( al520ex )   /* Patisonic Aleste 520EX (1993)               */
	229	//0131u1   DRIVER( pcw8256 )   /* 198? PCW8256                              */
	230	//0131u1   DRIVER( pcw8512 )   /* 198? PCW8512                              */
	231	//0131u1   DRIVER( pcw9256 )   /* 198? PCW9256                              */
	232	//0131u1   DRIVER( pcw9512 )   /* 198? PCW9512 (+)                           */
	233	//0131u1   DRIVER( pcw10 )    /* 198? PCW10                              */
	234	//0131u1   DRIVER( pcw16 )      /* 1995 PCW16                              */
	235	//0131u1   DRIVER( nc100 )      /* 1992 NC100                              */
	236	//0131u1   DRIVER( nc200 )      /* 1993 NC200                              */
237	237
238	238	/* APPLE */
239		DRIVER( apple1 )   /* Jul 1976 Apple 1                           */
240		DRIVER( apple2 )   /* Apr 1977 Apple ][                        */
241		DRIVER( apple2p )   /* Jun 1979 Apple ][+                        */
242		DRIVER( apple2jp )   /* ??? ???? Apple ][j+                        */
243		DRIVER( apple2e )   /* Jan 1983 Apple //e                        */
244		DRIVER( apple2ee )   /* Mar 1985 Apple //e Enhanced                  */
245		DRIVER( apple2ep )   /* Jan 1987 Apple //e Platinum                  */
246		DRIVER( apple2c )   /* Apr 1984 Apple //c                        */
247		DRIVER( apple2c0 )   /* ??? 1985 Apple //c (3.5 ROM)                  */
248		DRIVER( apple2c3 )   /* Sep 1986 Apple //c (Original Mem. Exp.)         */
249		DRIVER( apple2c4 )   /* ??? 198? Apple //c (rev 4)                  */
250		DRIVER( apple2cp )   /* Sep 1988 Apple //c+                        */
251		DRIVER( apple2gsr0 )   /* Sep 1986 Apple IIgs ROM00               */
252		DRIVER( apple2gsr1 )   /* Sep 1987 Apple IIgs ROM01               */
253		DRIVER( apple2gs )   /* Aug 1989 Apple IIgs ROM03                  */
254		DRIVER( apple2gsr3p )   /* ??? 198? Apple IIgs ROM03 prototype         */
255		DRIVER( apple2gsr4p )   /* ??? 1989 Apple IIgs ROM04 prototype         */
256		DRIVER( apple3 )   /* May 1980 Apple ///                        */
	239	//0131u1   DRIVER( apple1 )   /* Jul 1976 Apple 1                           */
	240	//0131u1   DRIVER( apple2 )   /* Apr 1977 Apple ][                        */
	241	//0131u1   DRIVER( apple2p )   /* Jun 1979 Apple ][+                        */
	242	//0131u1   DRIVER( apple2jp )   /* ??? ???? Apple ][j+                        */
	243	//0131u1   DRIVER( apple2e )   /* Jan 1983 Apple //e                        */
	244	//0131u1   DRIVER( apple2ee )   /* Mar 1985 Apple //e Enhanced                  */
	245	//0131u1   DRIVER( apple2ep )   /* Jan 1987 Apple //e Platinum                  */
	246	//0131u1   DRIVER( apple2c )   /* Apr 1984 Apple //c                        */
	247	//0131u1   DRIVER( apple2c0 )   /* ??? 1985 Apple //c (3.5 ROM)                  */
	248	//0131u1   DRIVER( apple2c3 )   /* Sep 1986 Apple //c (Original Mem. Exp.)         */
	249	//0131u1   DRIVER( apple2c4 )   /* ??? 198? Apple //c (rev 4)                  */
	250	//0131u1   DRIVER( apple2cp )   /* Sep 1988 Apple //c+                        */
	251	//0131u1   DRIVER( apple2gsr0 )   /* Sep 1986 Apple IIgs ROM00               */
	252	//0131u1   DRIVER( apple2gsr1 )   /* Sep 1987 Apple IIgs ROM01               */
	253	//0131u1   DRIVER( apple2gs )   /* Aug 1989 Apple IIgs ROM03                  */
	254	//0131u1   DRIVER( apple2gsr3p )   /* ??? 198? Apple IIgs ROM03 prototype         */
	255	//0131u1   DRIVER( apple2gsr4p )   /* ??? 1989 Apple IIgs ROM04 prototype         */
	256	//0131u1   DRIVER( apple3 )   /* May 1980 Apple ///                        */
257	257	/* Dec 1983 Apple ///+                        */
258		DRIVER( ace100 )   /* ??? 1982 Franklin Ace 100                  */
259		DRIVER( laser128 )   /* ??? 1987 Laser 128                        */
260		DRIVER( las128ex )   /* ??? 1987 Laser 128 EX                     */
261		DRIVER( las3000 )   /* ??? 1983 Laser 3000                        */
262		DRIVER( ivelultr )   /* Ivasim Ivel Ultra                        */
	258	//0131u1   DRIVER( ace100 )   /* ??? 1982 Franklin Ace 100                  */
	259	//0131u1   DRIVER( laser128 )   /* ??? 1987 Laser 128                        */
	260	//0131u1   DRIVER( las128ex )   /* ??? 1987 Laser 128 EX                     */
	261	//0131u1   DRIVER( las3000 )   /* ??? 1983 Laser 3000                        */
	262	//0131u1   DRIVER( ivelultr )   /* Ivasim Ivel Ultra                        */
263	263
264	264	/*
265	265	* Lisa              January          1983
266	266	* Lisa 2              January          1984
267	267	* Macintosh XL        January          1985
268	268	*/
269		DRIVER( lisa2 )      /* 1984 Apple Lisa 2                        */
270		DRIVER( lisa210 )   /* 1984 Apple Lisa 2/10                        */
271		DRIVER( macxl )      /* 1984 Apple Macintosh XL                     */
	269	//0131u1   DRIVER( lisa2 )      /* 1984 Apple Lisa 2                        */
	270	//0131u1   DRIVER( lisa210 )   /* 1984 Apple Lisa 2/10                        */
	271	//0131u1   DRIVER( macxl )      /* 1984 Apple Macintosh XL                     */
272	272	/*
273	273	* Macintosh         January            1984
274	274	* Macintosh 512k      July?            1984
r4679	r4680
277	277	* Macintosh SE         March            1987
278	278	* Macintosh II         March            1987
279	279	*/
280		DRIVER( mac128k )   /* 1984 Apple Macintosh                        */
281		DRIVER( mac512k )   /* 1985 Apple Macintosh 512k                  */
282		DRIVER( mac512ke )   /* 1986 Apple Macintosh 512ke                  */
283		DRIVER( macplus )   /* 1986 Apple Macintosh Plus                  */
284		DRIVER( macse )      /* 1987 Apple Macintosh SE                     */
285		DRIVER( macclasc )   /* 1990 Apple Macintosh Classic                  */
	280	//0131u1    DRIVER( mac128k )   /* 1984 Apple Macintosh                        */
	281	//0131u1   DRIVER( mac512k )   /* 1985 Apple Macintosh 512k                  */
	282	//0131u1   DRIVER( mac512ke )   /* 1986 Apple Macintosh 512ke                  */
	283	//0131u1   DRIVER( macplus )   /* 1986 Apple Macintosh Plus                  */
	284	//0131u1   DRIVER( macse )      /* 1987 Apple Macintosh SE                     */
	285	//0131u1   DRIVER( macclasc )   /* 1990 Apple Macintosh Classic                  */
286	286	//   DRIVER( maclc )      /* 1990 Apple Macintosh LC                     */
287	287
288	288	/* ATARI */
r4679	r4680
315	315	DRIVER( sym1 )      /* Synertek SYM-1                           */
316	316	DRIVER( aim65 )      /* Rockwell AIM65                           */
317	317
318		DRIVER( pet2001 )   /* PET 2001                                 */
319		DRIVER( pet2001n )   /* PET 2001-N                              */
320		DRIVER( pet2001b )   /* PET 2001-B                              */
321		DRIVER( cbm30 )      /* CBM 30xx                                 */
322		DRIVER( cbm30b )   /* CBM 30xx (Business keyboard)                  */
323		DRIVER( cbm30nor )   /* CBM 30xx (Norway, Business keyboard)            */
324		DRIVER( pet40on )   /* PET 40xx (Basic 4, no CRTC, Normal keyboard)      */
325		DRIVER( pet40ob )   /* PET 40xx (Basic 4, no CRTC, Business keyboard)   */
326		DRIVER( pet40n )   /* PET 40xx (Basic 4, CRTC 60Hz, 40 columns)      */
327		DRIVER( pet40b )   /* PET 40xx (Basic 4, CRTC 60Hz, 80 columns)      */
328		DRIVER( cbm40o )   /* CBM 40xx (Basic 4, no CRTC, Normal keyboard)      */
329		DRIVER( cbm40ob )   /* CBM 40xx (Basic 4, no CRTC, Business keyboard)   */
330		DRIVER( cbm40n )   /* CBM 40xx (Basic 4, CRTC 50Hz, 40 columns)      */
331		DRIVER( cbm40b )   /* CBM 40xx (Basic 4, CRTC 50Hz, 80 columns)      */
332		DRIVER( pet80 )      /* PET 80xx (Basic 4, CRTC 60Hz, 80 columns)      */
333		DRIVER( cbm80 )      /* CBM 80xx (Basic 4, CRTC 50Hz, 80 columns)      */
334		DRIVER( cbm80ger )   /* CBM 80xx (Germany, Basic 4, CRTC 50Hz, 80 cols)   */
335		DRIVER( cbm80hun )   /* CBM 80xx (Hungary, Basic 4, CRTC 50Hz, 80 cols)   */
336		DRIVER( cbm80swe )   /* CBM 80xx (Sweden, Basic 4, CRTC 50Hz, 80 cols)   */
337		DRIVER( cbm8296 )   /* CBM 8296 (Basic 4, CRTC 50Hz, 80 columns)      */
338		DRIVER( cbm8296d )   /* CBM 8296D                              */
339		DRIVER( superpet )   /* SuperPET                                 */
340		DRIVER( sp9000 )   /* CBM SP9000 / MiniMainFrame 9000               */
341		DRIVER( mmf9000s )   /* MiniMainFrame 9000 (Sweden)                  */
	318	//0131u1   DRIVER( pet2001 )   /* PET 2001                                 */
	319	//0131u1   DRIVER( pet2001n )   /* PET 2001-N                              */
	320	//0131u1   DRIVER( pet2001b )   /* PET 2001-B                              */
	321	//0131u1   DRIVER( cbm30 )      /* CBM 30xx                                 */
	322	//0131u1   DRIVER( cbm30b )   /* CBM 30xx (Business keyboard)                  */
	323	//0131u1   DRIVER( cbm30nor )   /* CBM 30xx (Norway, Business keyboard)            */
	324	//0131u1   DRIVER( pet40on )   /* PET 40xx (Basic 4, no CRTC, Normal keyboard)      */
	325	//0131u1   DRIVER( pet40ob )   /* PET 40xx (Basic 4, no CRTC, Business keyboard)   */
	326	//0131u1   DRIVER( pet40n )   /* PET 40xx (Basic 4, CRTC 60Hz, 40 columns)      */
	327	//0131u1   DRIVER( pet40b )   /* PET 40xx (Basic 4, CRTC 60Hz, 80 columns)      */
	328	//0131u1   DRIVER( cbm40o )   /* CBM 40xx (Basic 4, no CRTC, Normal keyboard)      */
	329	//0131u1   DRIVER( cbm40ob )   /* CBM 40xx (Basic 4, no CRTC, Business keyboard)   */
	330	//0131u1   DRIVER( cbm40n )   /* CBM 40xx (Basic 4, CRTC 50Hz, 40 columns)      */
	331	//0131u1   DRIVER( cbm40b )   /* CBM 40xx (Basic 4, CRTC 50Hz, 80 columns)      */
	332	//0131u1   DRIVER( pet80 )      /* PET 80xx (Basic 4, CRTC 60Hz, 80 columns)      */
	333	//0131u1   DRIVER( cbm80 )      /* CBM 80xx (Basic 4, CRTC 50Hz, 80 columns)      */
	334	//0131u1   DRIVER( cbm80ger )   /* CBM 80xx (Germany, Basic 4, CRTC 50Hz, 80 cols)   */
	335	//0131u1   DRIVER( cbm80hun )   /* CBM 80xx (Hungary, Basic 4, CRTC 50Hz, 80 cols)   */
	336	//0131u1   DRIVER( cbm80swe )   /* CBM 80xx (Sweden, Basic 4, CRTC 50Hz, 80 cols)   */
	337	//0131u1   DRIVER( cbm8296 )   /* CBM 8296 (Basic 4, CRTC 50Hz, 80 columns)      */
	338	//0131u1   DRIVER( cbm8296d )   /* CBM 8296D                              */
	339	//0131u1   DRIVER( superpet )   /* SuperPET                                 */
	340	//0131u1   DRIVER( sp9000 )   /* CBM SP9000 / MiniMainFrame 9000               */
	341	//0131u1   DRIVER( mmf9000s )   /* MiniMainFrame 9000 (Sweden)                  */
342	342
343		DRIVER( vic1001 )   /* Commodore VIC-1001 (Japan)                  */
344		DRIVER( vic20 )      /* Commodore VIC 20 (NTSC)                     */
345		DRIVER( vic20cr )   /* Commodore VIC 20CR (NTSC)                  */
346		DRIVER( vic20i )   /* Commodore VIC 20 (NTSC, IEEE488 Interface)      */
347		DRIVER( vic20v )   /* Commodore VIC 20 (NTSC, VC1540)               */
348		DRIVER( vic20pal )   /* Commodore VIC 20 (PAL)                     */
349		DRIVER( vic20crp )   /* Commodore VIC 20CR (PAL)                     */
350		DRIVER( vic20plv )   /* Commodore VIC 20 (PAL, VC1541)               */
351		DRIVER( vc20 )      /* Commodore VIC 20 (PAL, Germany)               */
352		DRIVER( vc20v )      /* Commodore VIC 20 (PAL, VC1541)               */
353		DRIVER( vic20swe )   /* Commodore VIC 20 (Swedish Expanson Kit)         */
	343	//0131u1   DRIVER( vic1001 )   /* Commodore VIC-1001 (Japan)                  */
	344	//0131u1   DRIVER( vic20 )      /* Commodore VIC 20 (NTSC)                     */
	345	//0131u1   DRIVER( vic20cr )   /* Commodore VIC 20CR (NTSC)                  */
	346	//0131u1   DRIVER( vic20i )   /* Commodore VIC 20 (NTSC, IEEE488 Interface)      */
	347	//0131u1   DRIVER( vic20v )   /* Commodore VIC 20 (NTSC, VC1540)               */
	348	//0131u1   DRIVER( vic20pal )   /* Commodore VIC 20 (PAL)                     */
	349	//0131u1   DRIVER( vic20crp )   /* Commodore VIC 20CR (PAL)                     */
	350	//0131u1   DRIVER( vic20plv )   /* Commodore VIC 20 (PAL, VC1541)               */
	351	//0131u1   DRIVER( vc20 )      /* Commodore VIC 20 (PAL, Germany)               */
	352	//0131u1   DRIVER( vc20v )      /* Commodore VIC 20 (PAL, VC1541)               */
	353	//0131u1   DRIVER( vic20swe )   /* Commodore VIC 20 (Swedish Expanson Kit)         */
354	354
355		DRIVER( max )      /* Commodore Max Machine (Japan)               */
356		DRIVER( c64 )      /* Commodore 64 (NTSC)                        */
357		DRIVER( c64pal )   /* Commodore 64 (PAL)                        */
358		DRIVER( c64jpn )   /* Commodore 64 (Japan)                        */
359		DRIVER( c64swe )   /* Commodore 64 (Sweden)                     */
360		DRIVER( vic64s )   /* Commodore VIC 64S (Sweden)                  */
361		DRIVER( pet64 )      /* Commodore PET 64                           */
362		DRIVER( cbm4064 )   /* Commodore CBM 4064                        */
363		DRIVER( edu64 )      /* Commodore Educator 64                     */
364		DRIVER( sx64 )      /* Commodore SX-64 Executive Machine (PAL)         */
365		DRIVER( vip64 )      /* Commodore VIP64 (SX64, PAL, Swedish)            */
	355	//0131u1   DRIVER( max )      /* Commodore Max Machine (Japan)               */
	356	//0131u1   DRIVER( c64 )      /* Commodore 64 (NTSC)                        */
	357	//0131u1   DRIVER( c64pal )   /* Commodore 64 (PAL)                        */
	358	//0131u1   DRIVER( c64jpn )   /* Commodore 64 (Japan)                        */
	359	//0131u1   DRIVER( c64swe )   /* Commodore 64 (Sweden)                     */
	360	//0131u1   DRIVER( vic64s )   /* Commodore VIC 64S (Sweden)                  */
	361	//0131u1   DRIVER( pet64 )      /* Commodore PET 64                           */
	362	//0131u1   DRIVER( cbm4064 )   /* Commodore CBM 4064                        */
	363	//0131u1   DRIVER( edu64 )      /* Commodore Educator 64                     */
	364	//0131u1   DRIVER( sx64 )      /* Commodore SX-64 Executive Machine (PAL)         */
	365	//0131u1   DRIVER( vip64 )      /* Commodore VIP64 (SX64, PAL, Swedish)            */
366	366	//   DRIVER( dx64 )      /* Commodore DX-64 - Prototype                  */
367		DRIVER( c64c )      /* Commodore 64C (NTSC)                        */
368		DRIVER( c64cpal )   /* Commodore 64C (PAL)                        */
369		DRIVER( c64g )      /* Commodore 64G (PAL)                        */
370		DRIVER( c64gs )      /* Commodore 64 Games System                  */
	367	//0131u1   DRIVER( c64c )      /* Commodore 64C (NTSC)                        */
	368	//0131u1   DRIVER( c64cpal )   /* Commodore 64C (PAL)                        */
	369	//0131u1   DRIVER( c64g )      /* Commodore 64G (PAL)                        */
	370	//0131u1   DRIVER( c64gs )      /* Commodore 64 Games System                  */
371	371
372		DRIVER( b500 )      /* Commodore B500                           */
373		DRIVER( b128 )      /* Commodore B128                           */
374		DRIVER( b256 )      /* Commodore B256                           */
375		DRIVER( cbm610 )   /* Commodore CBM 610                        */
376		DRIVER( cbm620 )   /* Commodore CBM 620                        */
377		DRIVER( cbm620hu )   /* Commodore CBM 620 (Hungary)                  */
378		DRIVER( b128hp )   /* Commodore B128HP                           */
379		DRIVER( b256hp )   /* Commodore B256HP                           */
380		DRIVER( bx256hp )   /* Commodore BX256HP                        */
381		DRIVER( cbm710 )   /* Commodore CBM 710                        */
382		DRIVER( cbm720 )   /* Commodore CBM 720                        */
383		DRIVER( cbm720se )   /* Commodore CBM 720 (Sweden / Finland)            */
384		DRIVER( p500 )      /* Commodore P500 (proto, a.k.a. C128-40, PET-II)   */
	372	//0131u1   DRIVER( b500 )      /* Commodore B500                           */
	373	//0131u1   DRIVER( b128 )      /* Commodore B128                           */
	374	//0131u1   DRIVER( b256 )      /* Commodore B256                           */
	375	//0131u1   DRIVER( cbm610 )   /* Commodore CBM 610                        */
	376	//0131u1   DRIVER( cbm620 )   /* Commodore CBM 620                        */
	377	//0131u1   DRIVER( cbm620hu )   /* Commodore CBM 620 (Hungary)                  */
	378	//0131u1   DRIVER( b128hp )   /* Commodore B128HP                           */
	379	//0131u1   DRIVER( b256hp )   /* Commodore B256HP                           */
	380	//0131u1   DRIVER( bx256hp )   /* Commodore BX256HP                        */
	381	//0131u1   DRIVER( cbm710 )   /* Commodore CBM 710                        */
	382	//0131u1   DRIVER( cbm720 )   /* Commodore CBM 720                        */
	383	//0131u1   DRIVER( cbm720se )   /* Commodore CBM 720 (Sweden / Finland)            */
	384	//0131u1   DRIVER( p500 )      /* Commodore P500 (proto, a.k.a. C128-40, PET-II)   */
385	385
386		DRIVER( c16 )      /* Commodore 16                              */
387		DRIVER( c16c )      /* Commodore 16  c1551                        */
388		DRIVER( c16v )      /* Commodore 16  vc1541                        */
389		DRIVER( c16hun )   /* Commodore 16 Novotrade (Hungarian Character Set)   */
390		DRIVER( c116 )      /* Commodore 116                           */
391		DRIVER( c116c )      /* Commodore 116  c1551                        */
392		DRIVER( c116v )      /* Commodore 116  vc1541                     */
393		DRIVER( plus4 )      /* Commodore +4                              */
394		DRIVER( plus4c )   /* Commodore +4  c1551                        */
395		DRIVER( plus4v )   /* Commodore +4  vc1541                        */
396		DRIVER( c232 )      /* Commodore 232 - Prototype                  */
397		DRIVER( c264 )      /* Commodore 264 - Prototype                  */
398		DRIVER( c364 )      /* Commodore V364 - Prototype                  */
	386	//0131u1   DRIVER( c16 )      /* Commodore 16                              */
	387	//0131u1   DRIVER( c16c )      /* Commodore 16  c1551                        */
	388	//0131u1   DRIVER( c16v )      /* Commodore 16  vc1541                        */
	389	//0131u1   DRIVER( c16hun )   /* Commodore 16 Novotrade (Hungarian Character Set)   */
	390	//0131u1   DRIVER( c116 )      /* Commodore 116                           */
	391	//0131u1   DRIVER( c116c )      /* Commodore 116  c1551                        */
	392	//0131u1   DRIVER( c116v )      /* Commodore 116  vc1541                     */
	393	//0131u1   DRIVER( plus4 )      /* Commodore +4                              */
	394	//0131u1   DRIVER( plus4c )   /* Commodore +4  c1551                        */
	395	//0131u1   DRIVER( plus4v )   /* Commodore +4  vc1541                        */
	396	//0131u1   DRIVER( c232 )      /* Commodore 232 - Prototype                  */
	397	//0131u1   DRIVER( c264 )      /* Commodore 264 - Prototype                  */
	398	//0131u1   DRIVER( c364 )      /* Commodore V364 - Prototype                  */
399	399
400		DRIVER( c128 )      /* Commodore 128 - NTSC                        */
401		DRIVER( c128cr )   /* Commodore 128CR - NTSC (proto?)               */
402		DRIVER( c128fin )   /* Commodore 128 - PAL (Finnish)               */
403		DRIVER( c128fra )   /* Commodore 128 - PAL (French)                  */
404		DRIVER( c128ger )   /* Commodore 128 - PAL (German)                  */
405		DRIVER( c128nor )   /* Commodore 128 - PAL (Norwegian)               */
406		DRIVER( c128d )      /* Commodore 128D - PAL                        */
407		DRIVER( c128dpr )   /* Commodore 128D - NTSC (proto)               */
408		DRIVER( c128dcr )   /* Commodore 128DCR - NTSC                     */
409		DRIVER( c128drde )   /* Commodore 128DCR - PAL (German)               */
410		DRIVER( c128drit )   /* Commodore 128DCR - PAL (Italian)               */
411		DRIVER( c128drsw )   /* Commodore 128DCR - PAL (Swedish)               */
	400	//0131u1   DRIVER( c128 )      /* Commodore 128 - NTSC                        */
	401	//0131u1   DRIVER( c128cr )   /* Commodore 128CR - NTSC (proto?)               */
	402	//0131u1   DRIVER( c128fin )   /* Commodore 128 - PAL (Finnish)               */
	403	//0131u1   DRIVER( c128fra )   /* Commodore 128 - PAL (French)                  */
	404	//0131u1   DRIVER( c128ger )   /* Commodore 128 - PAL (German)                  */
	405	//0131u1   DRIVER( c128nor )   /* Commodore 128 - PAL (Norwegian)               */
	406	//0131u1   DRIVER( c128d )      /* Commodore 128D - PAL                        */
	407	//0131u1   DRIVER( c128dpr )   /* Commodore 128D - NTSC (proto)               */
	408	//0131u1   DRIVER( c128dcr )   /* Commodore 128DCR - NTSC                     */
	409	//0131u1   DRIVER( c128drde )   /* Commodore 128DCR - PAL (German)               */
	410	//0131u1   DRIVER( c128drit )   /* Commodore 128DCR - PAL (Italian)               */
	411	//0131u1   DRIVER( c128drsw )   /* Commodore 128DCR - PAL (Swedish)               */
412	412
413		DRIVER( a500n )      /* Commodore Amiga 500 - NTSC                  */
414		DRIVER( a500p )      /* Commodore Amiga 500 - PAL                  */
415		DRIVER( a1000n )   /* Commodore Amiga 1000 - NTSC                  */
416		DRIVER( a1000p )   /* Commodore Amiga 1000 - PAL                  */
417		DRIVER( cdtv )      /* Commodore CDTV                           */
418		DRIVER( a1200n )   /* Commodore Amiga 1200 - NTSC                  */
419		DRIVER( a1200p )   /* Commodore Amiga 1200 - PAL                  */
420		DRIVER( cd32 )      /* Commodore Amiga CD32                        */
	413	//0131u1   DRIVER( a500n )      /* Commodore Amiga 500 - NTSC                  */
	414	//0131u1   DRIVER( a500p )      /* Commodore Amiga 500 - PAL                  */
	415	//0131u1   DRIVER( a1000n )   /* Commodore Amiga 1000 - NTSC                  */
	416	//0131u1   DRIVER( a1000p )   /* Commodore Amiga 1000 - PAL                  */
	417	//0131u1   DRIVER( cdtv )      /* Commodore CDTV                           */
	418	//0131u1   DRIVER( a1200n )   /* Commodore Amiga 1200 - NTSC                  */
	419	//0131u1   DRIVER( a1200p )   /* Commodore Amiga 1200 - PAL                  */
	420	//0131u1   DRIVER( cd32 )      /* Commodore Amiga CD32                        */
421	421
422		DRIVER( c65 )      /* 1991 C65 / C64DX (Prototype, NTSC)            */
423		DRIVER( c64dx )      /* 1991 C65 / C64DX (Prototype, German PAL)         */
	422	//0131u1   DRIVER( c65 )      /* 1991 C65 / C64DX (Prototype, NTSC)            */
	423	//0131u1   DRIVER( c64dx )      /* 1991 C65 / C64DX (Prototype, German PAL)         */
424	424
425	425	/* EPSON */
426	426	DRIVER( px4 )      /* 1985 Epson PX-4                           */
r4679	r4680
475	475	DRIVER( osborne1 )   /* 1981 Osborne-1                           */
476	476
477	477	/* SINCLAIR RESEARCH */
478		DRIVER( zx80 )      /* 1980 Sinclair ZX-80                        */
479		DRIVER( zx81 )      /* 1981 Sinclair ZX-81                        */
480		DRIVER( ts1000 )   /* 1982 Timex Sinclair 1000                     */
481		DRIVER( ts1500 )   /* Timex Sinclair 1500                        */
482		DRIVER( ringo470 )   /* Ringo 470                              */
483		DRIVER( pc8300 )   /* Your Computer - PC8300                     */
484		DRIVER( pow3000 )   /* Creon Enterprises - Power 3000               */
485		DRIVER( lambda )   /* Lambda 8300                              */
486		DRIVER( tk85 )      /* Microdigital TK85                         */
	478	//0131u1   DRIVER( zx80 )      /* 1980 Sinclair ZX-80                        */
	479	//0131u1   DRIVER( zx81 )      /* 1981 Sinclair ZX-81                        */
	480	//0131u1   DRIVER( ts1000 )   /* 1982 Timex Sinclair 1000                     */
	481	//0131u1   DRIVER( ts1500 )   /* Timex Sinclair 1500                        */
	482	//0131u1   DRIVER( ringo470 )   /* Ringo 470                              */
	483	//0131u1   DRIVER( pc8300 )   /* Your Computer - PC8300                     */
	484	//0131u1   DRIVER( pow3000 )   /* Creon Enterprises - Power 3000               */
	485	//0131u1   DRIVER( lambda )   /* Lambda 8300                              */
	486	//0131u1   DRIVER( tk85 )      /* Microdigital TK85                         */
487	487
488		DRIVER( spectrum )/* 1982 ZX Spectrum                           */
489		DRIVER( spec80k ) /* 1987 ZX Spectrum 80k                     */
490		DRIVER( specide ) /* 1995 ZX Spectrum IDE                     */
491		DRIVER( inves )      /* 1986 Inves Spectrum 48K+                     */
492		DRIVER( tk90x )      /* 1985 TK90x Color Computer                  */
493		DRIVER( tk95 )      /* 1986 TK95 Color Computer                     */
494		DRIVER( tc2048 )   /* 198? TC2048                              */
495		DRIVER( ts2068 )   /* 1983 TS2068                              */
496		DRIVER( uk2086 )   /* 1986 UK2086                              */
	488	//0131u1   DRIVER( spectrum )/* 1982 ZX Spectrum                           */
	489	//0131u1   DRIVER( spec80k ) /* 1987 ZX Spectrum 80k                     */
	490	//0131u1   DRIVER( specide ) /* 1995 ZX Spectrum IDE                     */
	491	//0131u1   DRIVER( inves )      /* 1986 Inves Spectrum 48K+                     */
	492	//0131u1   DRIVER( tk90x )      /* 1985 TK90x Color Computer                  */
	493	//0131u1   DRIVER( tk95 )      /* 1986 TK95 Color Computer                     */
	494	//0131u1   DRIVER( tc2048 )   /* 198? TC2048                              */
	495	//0131u1   DRIVER( ts2068 )   /* 1983 TS2068                              */
	496	//0131u1   DRIVER( uk2086 )   /* 1986 UK2086                              */
497	497
498		DRIVER( spec128 )     /* 1986 ZX Spectrum 128                        */
499		DRIVER( specpls2 )   /* 1986 ZX Spectrum +2                        */
500		DRIVER( specpl2a )   /* 1987 ZX Spectrum +2a                        */
501		DRIVER( specpls3 )   /* 1987 ZX Spectrum +3                        */
502		DRIVER( specpl3e )   /* 2000 ZX Spectrum +3e                        */
503		DRIVER( sp3e8bit )   /* 2002 ZX Spectrum +3e   8bit IDE         */
504		DRIVER( sp3ezcf )     /* 2002 ZX Spectrum +3e   ZXCF               */
505		DRIVER( sp3eata )     /* 2002 ZX Spectrum +3e   ZXATASP           */
506		DRIVER( scorpion )
507		DRIVER( pentagon )
	498	//0131u1   DRIVER( spec128 )     /* 1986 ZX Spectrum 128                        */
	499	//0131u1   DRIVER( specpls2 )   /* 1986 ZX Spectrum +2                        */
	500	//0131u1   DRIVER( specpl2a )   /* 1987 ZX Spectrum +2a                        */
	501	//0131u1   DRIVER( specpls3 )   /* 1987 ZX Spectrum +3                        */
	502	//0131u1   DRIVER( specpl3e )   /* 2000 ZX Spectrum +3e                        */
	503	//0131u1   DRIVER( sp3e8bit )   /* 2002 ZX Spectrum +3e   8bit IDE         */
	504	//0131u1   DRIVER( sp3ezcf )     /* 2002 ZX Spectrum +3e   ZXCF               */
	505	//0131u1   DRIVER( sp3eata )     /* 2002 ZX Spectrum +3e   ZXATASP           */
	506	//0131u1   DRIVER( scorpion )
	507	//0131u1   DRIVER( pentagon )
508	508
509		DRIVER( ql )      /* 1984 Sinclair QL   (UK)                     */
510		DRIVER( ql_us )      /* 1984 Sinclair QL   (USA)                     */
511		DRIVER( ql_es )      /* 1984 Sinclair QL   (Spain)                     */
512		DRIVER( ql_fr )      /* 1984 Sinclair QL   (France)                  */
513		DRIVER( ql_de )      /* 1984 Sinclair QL   (Germany)                  */
514		DRIVER( ql_it )      /* 1984 Sinclair QL   (Italy)                     */
515		DRIVER( ql_se )      /* 1984 Sinclair QL   (Sweden)                  */
516		DRIVER( ql_dk )      /* 1984 Sinclair QL   (Denmark)                  */
517		DRIVER( ql_gr )      /* 1984 Sinclair QL   (Greece)                  */
	509	//0131u1   DRIVER( ql )      /* 1984 Sinclair QL   (UK)                     */
	510	//0131u1   DRIVER( ql_us )      /* 1984 Sinclair QL   (USA)                     */
	511	//0131u1   DRIVER( ql_es )      /* 1984 Sinclair QL   (Spain)                     */
	512	//0131u1   DRIVER( ql_fr )      /* 1984 Sinclair QL   (France)                  */
	513	//0131u1   DRIVER( ql_de )      /* 1984 Sinclair QL   (Germany)                  */
	514	//0131u1   DRIVER( ql_it )      /* 1984 Sinclair QL   (Italy)                     */
	515	//0131u1   DRIVER( ql_se )      /* 1984 Sinclair QL   (Sweden)                  */
	516	//0131u1   DRIVER( ql_dk )      /* 1984 Sinclair QL   (Denmark)                  */
	517	//0131u1   DRIVER( ql_gr )      /* 1984 Sinclair QL   (Greece)                  */
518	518	//   DRIVER( tonto )
519	519	//   DRIVER( megaopd )
520	520
r4679	r4680
679	679	DRIVER( laser700 )   /* 1984? Laser 700                           */
680	680
681	681	/* TANGERINE */
682		DRIVER( microtan )   /* 1979 Microtan 65                           */
	682	//0131u1   DRIVER( microtan )   /* 1979 Microtan 65                           */
683	683
684		DRIVER( oric1 )      /* 1983 Oric 1                              */
685		DRIVER( orica )      /* 1984 Oric Atmos                           */
686		DRIVER( prav8d )   /* 1985 Pravetz 8D                           */
687		DRIVER( prav8dd )   /* 1989 Pravetz 8D (Disk ROM)                  */
688		DRIVER( telstrat )   /* ??? Oric Telestrat/Stratos                  */
	684	//0131u1   DRIVER( oric1 )      /* 1983 Oric 1                              */
	685	//0131u1   DRIVER( orica )      /* 1984 Oric Atmos                           */
	686	//0131u1   DRIVER( prav8d )   /* 1985 Pravetz 8D                           */
	687	//0131u1   DRIVER( prav8dd )   /* 1989 Pravetz 8D (Disk ROM)                  */
	688	//0131u1   DRIVER( telstrat )   /* ??? Oric Telestrat/Stratos                  */
689	689
690	690	/* PHILIPS */
691	691	DRIVER( p2000t )   /* 1980 P2000T                              */
r4679	r4680
882	882	DRIVER( c2717 )      /* Consul 2717 (PMD-85.2 clone)            */
883	883
884	884	/* Microkey */
885		DRIVER( primoa32 )   /* Primo A-32                              */
886		DRIVER( primoa48 )   /* Primo A-48                              */
887		DRIVER( primoa64 )   /* Primo A-64                              */
888		DRIVER( primob32 )   /* Primo B-32                              */
889		DRIVER( primob48 )   /* Primo B-48                              */
890		DRIVER( primob64 )   /* Primo B-64                              */
891		DRIVER( primoc64 )   /* Primo C-64                              */
	885	//0131u1   DRIVER( primoa32 )   /* Primo A-32                              */
	886	//0131u1   DRIVER( primoa48 )   /* Primo A-48                              */
	887	//0131u1   DRIVER( primoa64 )   /* Primo A-64                              */
	888	//0131u1   DRIVER( primob32 )   /* Primo B-32                              */
	889	//0131u1   DRIVER( primob48 )   /* Primo B-48                              */
	890	//0131u1   DRIVER( primob64 )   /* Primo B-64                              */
	891	//0131u1   DRIVER( primoc64 )   /* Primo C-64                              */
892	892
893	893	/* Team Concepts */
894	894	/* CPU not known, else should be easy, look into drivers/comquest.c */
r4679	r4680
963	963	DRIVER( gamecom )   /* Tiger Game.com                           */
964	964
965	965	/* Thomson */
966		DRIVER( t9000 )      /* 1980 Thomson T9000 (TO7 prototype)            */
967		DRIVER( to7 )      /* 1982 Thomson TO7                           */
968		DRIVER( to770 )      /* 1984 Thomson TO7/70                        */
969		DRIVER( to770a )   /* 198? Thomson TO7/70 arabic version            */
970		DRIVER( mo5 )      /* 1984 Thomson MO5                           */
971		DRIVER( mo5e )      /* 1986 Thomson MO5E (export version)            */
972		DRIVER( to9 )      /* 1985 Thomson T09                           */
973		DRIVER( to8 )      /* 1986 Thomson T08                           */
974		DRIVER( to8d )      /* 1987 Thomson T08D                        */
975		DRIVER( to9p )      /* 1986 Thomson T09+                        */
976		DRIVER( mo6 )      /* 1986 Thomson MO6                           */
977		DRIVER( mo5nr )      /* 1986 Thomson MO5 NR                        */
978		DRIVER( pro128 )   /* 1986 Olivetti Prodest PC 128                  */
	966	//0131u1   DRIVER( t9000 )      /* 1980 Thomson T9000 (TO7 prototype)            */
	967	//0131u1   DRIVER( to7 )      /* 1982 Thomson TO7                           */
	968	//0131u1   DRIVER( to770 )      /* 1984 Thomson TO7/70                        */
	969	//0131u1   DRIVER( to770a )   /* 198? Thomson TO7/70 arabic version            */
	970	//0131u1   DRIVER( mo5 )      /* 1984 Thomson MO5                           */
	971	//0131u1   DRIVER( mo5e )      /* 1986 Thomson MO5E (export version)            */
	972	//0131u1   DRIVER( to9 )      /* 1985 Thomson T09                           */
	973	//0131u1   DRIVER( to8 )      /* 1986 Thomson T08                           */
	974	//0131u1   DRIVER( to8d )      /* 1987 Thomson T08D                        */
	975	//0131u1   DRIVER( to9p )      /* 1986 Thomson T09+                        */
	976	//0131u1   DRIVER( mo6 )      /* 1986 Thomson MO6                           */
	977	//0131u1   DRIVER( mo5nr )      /* 1986 Thomson MO5 NR                        */
	978	//0131u1   DRIVER( pro128 )   /* 1986 Olivetti Prodest PC 128                  */
979	979
980	980	/* Cybiko, Inc. */
981	981	//   DRIVER( cybikov1 )   /* Cybiko Wireless Intertainment System - Classic V1 */
r4679	r4680
1082	1082	/* Spectrum clones */
1083	1083
1084	1084	/* ICE-Felix */
1085		DRIVER( hc85 )    /* 1985 HC-85                                */
1086		DRIVER( hc90 )    /* 1990 HC-90                                */
1087		DRIVER( hc91 )    /* 1991 HC-91                                */
1088		DRIVER( hc128 )   /* 1991 HC-128                             */
1089		DRIVER( hc2000 )  /* 1992 HC-2000                             */
	1085	//0131u1   DRIVER( hc85 )    /* 1985 HC-85                                */
	1086	//0131u1   DRIVER( hc90 )    /* 1990 HC-90                                */
	1087	//0131u1   DRIVER( hc91 )    /* 1991 HC-91                                */
	1088	//0131u1   DRIVER( hc128 )   /* 1991 HC-128                             */
	1089	//0131u1   DRIVER( hc2000 )  /* 1992 HC-2000                             */
1090	1090
1091		DRIVER( cip01 )   /* 1987 CIP-01                             */
1092		DRIVER( cip03 )   /* 1988 CIP-03                             */
1093		DRIVER( jet )     /* 1990 JET                                */
	1091	//0131u1   DRIVER( cip01 )   /* 1987 CIP-01                             */
	1092	//0131u1   DRIVER( cip03 )   /* 1988 CIP-03                             */
	1093	//0131u1   DRIVER( jet )     /* 1990 JET                                */
1094	1094
1095	1095	/* Didaktik Skalica */
1096		DRIVER( dgama87)  /* 1987 Didaktik Gama 87          */
1097		DRIVER( dgama88)  /* 1988 Didaktik Gama 88          */
1098		DRIVER( dgama89)  /* 1989 Didaktik Gama 89          */
1099		DRIVER( didakt90) /* 1990 Didaktik Skalica 90       */
1100		DRIVER( didakm91) /* 1991 Didaktik M 91             */
1101		DRIVER( didaktk)  /* 1992 Didaktik Kompakt          */
1102		DRIVER( didakm93) /* 1993 Didaktik M 93             */
	1096	//0131u1   DRIVER( dgama87)  /* 1987 Didaktik Gama 87          */
	1097	//0131u1   DRIVER( dgama88)  /* 1988 Didaktik Gama 88          */
	1098	//0131u1   DRIVER( dgama89)  /* 1989 Didaktik Gama 89          */
	1099	//0131u1   DRIVER( didakt90) /* 1990 Didaktik Skalica 90       */
	1100	//0131u1   DRIVER( didakm91) /* 1991 Didaktik M 91             */
	1101	//0131u1   DRIVER( didaktk)  /* 1992 Didaktik Kompakt          */
	1102	//0131u1   DRIVER( didakm93) /* 1993 Didaktik M 93             */
1103	1103
1104		DRIVER( mistrum ) /* 1988 Mistrum                              */
	1104	//0131u1   DRIVER( mistrum ) /* 1988 Mistrum                              */
1105	1105
1106	1106	/* Russian clones */
1107		DRIVER( blitz )     /* 1990 Blic                     */
1108		DRIVER( byte )      /* 1990 Byte                     */
1109		DRIVER( orizon )    /* 199? Orizon-Micro             */
1110		DRIVER( quorum48 )  /* 1993 Kvorum 48K               */
1111		DRIVER( magic6 )    /* 1993 Magic 6                  */
1112		DRIVER( compani1 )  /* 1990 Kompanion 1              */
	1107	//0131u1   DRIVER( blitz )     /* 1990 Blic                     */
	1108	//0131u1   DRIVER( byte )      /* 1990 Byte                     */
	1109	//0131u1   DRIVER( orizon )    /* 199? Orizon-Micro             */
	1110	//0131u1   DRIVER( quorum48 )  /* 1993 Kvorum 48K               */
	1111	//0131u1   DRIVER( magic6 )    /* 1993 Magic 6                  */
	1112	//0131u1   DRIVER( compani1 )  /* 1990 Kompanion 1              */
1113	1113
1114	1114	/* Kramer */
1115	1115	DRIVER(kramermc) /* 1987 Kramer MC            */

src/mess/artworkx.c

r4679	r4680
54	54	len += strlen(strs[i]) + 1;
55	55	}
56	56
57		override_artfile = auto_malloc(len);
	57	override_artfile = auto_alloc_array(img->machine, char, len);
58	58	override_artfile[len - 1] = '\0';
59	59
60	60	/* now actually concatenate the strings */

src/mess/machine/strata.c

r4679	r4680
80	80	strata[id].mode = FM_NORMAL;
81	81	strata[id].status = 0x80;
82	82	strata[id].master_lock = 0;
83		strata[id].data_ptr = auto_malloc(FEEPROM_SIZE + WRBUF_SIZE + PROT_REGS_SIZE + BLOCKLOCK_SIZE);
	83	strata[id].data_ptr = auto_alloc_array(machine, UINT8, FEEPROM_SIZE + WRBUF_SIZE + PROT_REGS_SIZE + BLOCKLOCK_SIZE);
84	84	strata[id].wrbuf = strata[id].data_ptr + FEEPROM_SIZE;
85	85	strata[id].prot_regs = strata[id].wrbuf + WRBUF_SIZE;
86	86	strata[id].blocklock = strata[id].prot_regs + PROT_REGS_SIZE;

src/mess/machine/pdp1.c

r4679	r4680
322	322	};
323	323
324	324	/* set up memory regions */
325		pdp1_memory = auto_malloc(0x40000);
	325	pdp1_memory = auto_alloc_array(machine, int, 0x40000 / sizeof(int));
326	326
327	327	/* set up our font */
328	328	dst = memory_region(machine, "gfx1");

src/mess/machine/ataricrt.c

r4679	r4680
37	37	/* install RAM */
38	38	ram_top = MIN(mess_ram_size, ram_size) - 1;
39	39	memory_install_read8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM),
40		0x0000, ram_top, 0, 0, SMH_BANK2);
	40	0x0000, ram_top, 0, 0, SMH_BANK(2));
41	41	memory_install_write8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM),
42		0x0000, ram_top, 0, 0, SMH_BANK2);
	42	0x0000, ram_top, 0, 0, SMH_BANK(2));
43	43	memory_set_bankptr(machine, 2, mess_ram);
44	44	}
45	45
r4679	r4680
72	72	}
73	73
74	74	memory_install_read8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x8000, 0xbfff, 0, 0,
75		read_addr ? SMH_BANK1 : SMH_NOP);
	75	read_addr ? SMH_BANK(1) : SMH_NOP);
76	76	memory_install_write8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x8000, 0xbfff, 0, 0,
77		write_addr ? SMH_BANK1 : SMH_NOP);
	77	write_addr ? SMH_BANK(1) : SMH_NOP);
78	78	if (read_addr)
79	79	memory_set_bankptr(machine, 1, read_addr);
80	80	if (write_addr)
r4679	r4680
114	114	/* install RAM */
115	115	ram_top = MIN(mess_ram_size, ram_size) - 1;
116	116	memory_install_read8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM),
117		0x0000, ram_top, 0, 0, SMH_BANK2);
	117	0x0000, ram_top, 0, 0, SMH_BANK(2));
118	118	memory_install_write8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM),
119		0x0000, ram_top, 0, 0, SMH_BANK2);
	119	0x0000, ram_top, 0, 0, SMH_BANK(2));
120	120	memory_set_bankptr(machine, 2, mess_ram);
121	121
122	122	/* cartridge */

src/mess/machine/hp48.c

r4679	r4680
1147	1147	/* internal RAM */
1148	1148	ram_size = HP48_GX_MODEL ? (128 * 1024) : (32 * 1024);
1149	1149	generic_nvram_size = 2 * ram_size;
1150		generic_nvram = auto_malloc( generic_nvram_size );
	1150	generic_nvram = auto_alloc_array(machine, UINT8, generic_nvram_size);
1151	1151	ram = (UINT8*) generic_nvram;
1152	1152
1153	1153	/* ROM load */
1154	1154	rom_size = HP48_S_SERIES ? (256 * 1024) : (512 * 1024);
1155		rom = auto_malloc( 2 * rom_size );
	1155	rom = auto_alloc_array(machine, UINT8, 2 * rom_size);
1156	1156	hp48_decode_nibble( rom, memory_region( machine, "maincpu" ), rom_size );
1157	1157
1158	1158	/* init state */
r4679	r4680
1174	1174
1175	1175	/* internal RAM */
1176	1176	hp48_modules[1].off_mask = 2 * ram_size - 1;
1177		hp48_modules[1].read     = SMH_BANK1;
1178		hp48_modules[1].write    = SMH_BANK1;
	1177	hp48_modules[1].read     = SMH_BANK(1);
	1178	hp48_modules[1].write    = SMH_BANK(1);
1179	1179	hp48_modules[1].data     = ram;
1180	1180
1181	1181	if ( HP48_G_SERIES )
r4679	r4680
1188	1188
1189	1189	/* ROM */
1190	1190	hp48_modules[5].off_mask = 2 * rom_size - 1;
1191		hp48_modules[5].read     = SMH_BANK5;
	1191	hp48_modules[5].read     = SMH_BANK(5);
1192	1192	hp48_modules[5].write    = SMH_NOP;
1193	1193	hp48_modules[5].data     = rom;
1194	1194

src/mess/machine/apple3.c

r4679	r4680
390	390	}
391	391	else
392	392	{
393		memory_install_read8_handler(space, 0xC000, 0xC0FF, 0, 0, SMH_BANK8);
	393	memory_install_read8_handler(space, 0xC000, 0xC0FF, 0, 0, SMH_BANK(8));
394	394	if (via_0_a & 0x08)
395	395	memory_install_write8_handler(space, 0xC000, 0xC0FF, 0, 0, SMH_UNMAP);
396	396	else
397		memory_install_write8_handler(space, 0xC000, 0xC0FF, 0, 0, SMH_BANK8);
	397	memory_install_write8_handler(space, 0xC000, 0xC0FF, 0, 0, SMH_BANK(8));
398	398	apple3_setbank(machine,8, ~0, 0x4000);
399	399	}
400	400
r4679	r4680
406	406	}
407	407	else
408	408	{
409		memory_install_read8_handler(space, 0xC100, 0xC4FF, 0, 0, SMH_BANK9);
	409	memory_install_read8_handler(space, 0xC100, 0xC4FF, 0, 0, SMH_BANK(9));
410	410	if (via_0_a & 0x08)
411	411	memory_install_write8_handler(space, 0xC100, 0xC4FF, 0, 0, SMH_UNMAP);
412	412	else
413		memory_install_write8_handler(space, 0xC100, 0xC4FF, 0, 0, SMH_BANK9);
	413	memory_install_write8_handler(space, 0xC100, 0xC4FF, 0, 0, SMH_BANK(9));
414	414	apple3_setbank(machine,9, ~0, 0x4100);
415	415	}
416	416
417	417	/* install bank 10 (C500-C7FF) */
418		memory_install_read8_handler(space, 0xC500, 0xC7FF, 0, 0, SMH_BANK10);
	418	memory_install_read8_handler(space, 0xC500, 0xC7FF, 0, 0, SMH_BANK(10));
419	419	if (via_0_a & 0x08)
420	420	memory_install_write8_handler(space, 0xC500, 0xC7FF, 0, 0, SMH_UNMAP);
421	421	else
422		memory_install_write8_handler(space, 0xC500, 0xC7FF, 0, 0, SMH_BANK10);
	422	memory_install_write8_handler(space, 0xC500, 0xC7FF, 0, 0, SMH_BANK(10));
423	423	apple3_setbank(machine,10, ~0, 0x4500);
424	424
425	425	/* install bank 11 (C800-CFFF) */
r4679	r4680
430	430	}
431	431	else
432	432	{
433		memory_install_read8_handler(space, 0xC800, 0xCFFF, 0, 0, SMH_BANK11);
	433	memory_install_read8_handler(space, 0xC800, 0xCFFF, 0, 0, SMH_BANK(11));
434	434	if (via_0_a & 0x08)
435	435	memory_install_write8_handler(space, 0xC800, 0xCFFF, 0, 0, SMH_UNMAP);
436	436	else
437		memory_install_write8_handler(space, 0xC800, 0xCFFF, 0, 0, SMH_BANK11);
	437	memory_install_write8_handler(space, 0xC800, 0xCFFF, 0, 0, SMH_BANK(11));
438	438	apple3_setbank(machine,11, ~0, 0x4800);
439	439	}
440	440
441	441	/* install bank 6 (D000-EFFF) */
442		memory_install_read8_handler(space, 0xD000, 0xEFFF, 0, 0, SMH_BANK6);
	442	memory_install_read8_handler(space, 0xD000, 0xEFFF, 0, 0, SMH_BANK(6));
443	443	if (via_0_a & 0x08)
444	444	memory_install_write8_handler(space, 0xD000, 0xEFFF, 0, 0, SMH_UNMAP);
445	445	else
446		memory_install_write8_handler(space, 0xD000, 0xEFFF, 0, 0, SMH_BANK6);
	446	memory_install_write8_handler(space, 0xD000, 0xEFFF, 0, 0, SMH_BANK(6));
447	447	apple3_setbank(machine,6, ~0, 0x5000);
448	448
449	449	/* install bank 7 (F000-FFFF) */
450		memory_install_read8_handler(space, 0xF000, 0xFFFF, 0, 0, SMH_BANK7);
	450	memory_install_read8_handler(space, 0xF000, 0xFFFF, 0, 0, SMH_BANK(7));
451	451	if (via_0_a & 0x09)
452	452	memory_install_write8_handler(space, 0xF000, 0xFFFF, 0, 0, SMH_UNMAP);
453	453	else
454		memory_install_write8_handler(space, 0xF000, 0xFFFF, 0, 0, SMH_BANK7);
	454	memory_install_write8_handler(space, 0xF000, 0xFFFF, 0, 0, SMH_BANK(7));
455	455	if (via_0_a & 0x01)
456	456	memory_set_bankptr(machine,7, memory_region(machine, "maincpu"));
457	457	else

src/mess/machine/c65.c

r4679	r4680
461	461	expansion_ram_end = 0x80000 + (mess_ram_size - 128*1024) - 1;
462	462
463	463	memory_install_read8_handler(space, expansion_ram_begin, expansion_ram_end,
464		0, 0, (data == 0x00) ? SMH_BANK16 : SMH_NOP);
	464	0, 0, (data == 0x00) ? SMH_BANK(16) : SMH_NOP);
465	465	memory_install_write8_handler(space, expansion_ram_begin, expansion_ram_end,
466		0, 0, (data == 0x00) ? SMH_BANK16 : SMH_NOP);
	466	0, 0, (data == 0x00) ? SMH_BANK(16) : SMH_NOP);
467	467
468	468	if (data == 0x00)
469	469	memory_set_bankptr(space->machine, 16, mess_ram + 128*1024);
r4679	r4680
613	613	{
614	614	memory_set_bankptr (machine, 8, c64_colorram + 0x400);
615	615	memory_set_bankptr (machine, 9, c64_colorram + 0x400);
616		rh = SMH_BANK8;
617		wh = SMH_BANK9;
	616	rh = SMH_BANK(8);
	617	wh = SMH_BANK(9);
618	618	}
619	619	else
620	620	{
r4679	r4680
713	713	}
714	714	else
715	715	{
716		rh8 = SMH_BANK8;
717		wh9 = SMH_BANK9;
	716	rh8 = SMH_BANK(8);
	717	wh9 = SMH_BANK(9);
718	718	memory_set_bankptr (machine, 8, c64_colorram+0x400);
719	719	memory_set_bankptr (machine, 9, c64_colorram+0x400);
720	720	}
r4679	r4680
724	724	else
725	725	{
726	726	c65_io_on = 0;
727		rh4 = SMH_BANK4;
728		wh5 = SMH_BANK5;
	727	rh4 = SMH_BANK(4);
	728	wh5 = SMH_BANK(5);
729	729	memory_set_bankptr(machine, 5, c64_memory+0xd000);
730	730	memory_set_bankptr(machine, 7, c64_memory+0xd800);
731	731	memory_set_bankptr(machine, 9, c64_memory+0xdc00);
r4679	r4680
804	804
805	805	static void c65_common_driver_init (running_machine *machine)
806	806	{
807		c64_memory = auto_malloc(0x10000);
808		memset(c64_memory, 0, 0x10000);
	807	c64_memory = auto_alloc_array_clear(machine, UINT8, 0x10000);
809	808	memory_set_bankptr(machine, 11, c64_memory + 0x00000);
810	809	memory_set_bankptr(machine, 12, c64_memory + 0x08000);
811	810	memory_set_bankptr(machine, 13, c64_memory + 0x0a000);

src/mess/machine/at45dbxx.c

r4679	r4680
100	100	case TYPE_AT45DB161 : flash->pages = 4096; flash->page_size = 528; flash->devid = 0x28; break;
101	101	}
102	102	flash->size = flash->pages * flash->page_size;
103		flash->data = auto_malloc( flash->size);
104		flash->buffer1 = auto_malloc( flash->page_size);
105		flash->buffer2 = auto_malloc( flash->page_size);
	103	flash->data = auto_alloc_array(device->machine, UINT8, flash->size);
	104	flash->buffer1 = auto_alloc_array(device->machine, UINT8, flash->page_size);
	105	flash->buffer2 = auto_alloc_array(device->machine, UINT8, flash->page_size);
106	106
107	107	// data
108	108	state_save_register_item_pointer(device->machine, "at45dbxx", device->tag, 0, flash->data, flash->size);

src/mess/machine/msx_slot.c

r4679	r4680
40	40	case 4:
41	41	memory_set_bankptr (machine,4, mem);
42	42	memory_set_bankptr (machine,5, mem + 0x1ff8);
43		memory_install_read8_handler(space, 0x7ff8, 0x7fff, 0, 0, SMH_BANK5);
	43	memory_install_read8_handler(space, 0x7ff8, 0x7fff, 0, 0, SMH_BANK(5));
44	44	break;
45	45	case 5:
46	46	memory_set_bankptr (machine,6, mem);
47	47	memory_set_bankptr (machine,7, mem + 0x1800);
48		memory_install_read8_handler(space, 0x9800, 0x9fff, 0, 0, SMH_BANK7);
	48	memory_install_read8_handler(space, 0x9800, 0x9fff, 0, 0, SMH_BANK(7));
49	49	break;
50	50	case 6:
51	51	memory_set_bankptr (machine,8, mem);
52	52	memory_set_bankptr (machine,9, mem + 0x1800);
53		memory_install_read8_handler(space, 0xb800, 0xbfff, 0, 0, SMH_BANK9);
	53	memory_install_read8_handler(space, 0xb800, 0xbfff, 0, 0, SMH_BANK(9));
54	54	break;
55	55	case 7:
56	56	memory_set_bankptr (machine,10, mem);
r4679	r4680
105	105
106	106	MSX_SLOT_INIT(ram)
107	107	{
108		state->mem = auto_malloc (size);
	108	state->mem = auto_alloc_array(machine, UINT8, size);
109	109	memset (state->mem, 0, size);
110	110	state->type = SLOT_RAM;
111	111	state->start_page = page;
r4679	r4680
151	151	"1mb, 2mb or 4mb\n");
152	152	return 1;
153	153	}
154		state->mem = auto_malloc (size);
	154	state->mem = auto_alloc_array(machine, UINT8, size);
155	155	memset (state->mem, 0, size);
156	156
157	157	#ifdef MONMSX
r4679	r4680
384	384	msx_cpu_setbank (machine, 5, state->mem + state->banks[2] * 0x2000);
385	385	msx_cpu_setbank (machine, 6, state->mem + state->banks[3] * 0x2000);
386	386	memory_install_read8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x9800, 0x9fff, 0, 0,
387		state->cart.scc.active ? konami_scc_bank5 : SMH_BANK7);
	387	state->cart.scc.active ? konami_scc_bank5 : SMH_BANK(7));
388	388	break;
389	389	case 3:
390	390	msx_cpu_setbank (machine, 7, state->mem + state->banks[0] * 0x2000);
r4679	r4680
618	618	static const char sramfile[] = "ascii8";
619	619	int banks;
620	620
621		state->cart.sram.mem = auto_malloc (0x2000);
	621	state->cart.sram.mem = auto_alloc_array(machine, UINT8, 0x2000);
622	622	if (size > 0x100000)
623	623	{
624	624	logerror ("ascii8_sram: warning: truncating to 1mb\n");
r4679	r4680
783	783	static const char sramfile[] = "ascii16";
784	784	int banks;
785	785
786		state->cart.sram.mem = auto_malloc (0x4000);
	786	state->cart.sram.mem = auto_alloc_array(machine, UINT8, 0x4000);
787	787
788	788	if (size > 0x200000)
789	789	{
r4679	r4680
1046	1046	state->size = size;
1047	1047	state->mem = mem;
1048	1048
1049		p = auto_malloc (0x4000);
	1049	p = auto_alloc_array(machine, UINT8, 0x4000);
1050	1050	memset (p, 0, 0x4000);
1051	1051	state->cart.sram.mem = p;
1052	1052	if (!state->sramfile)
r4679	r4680
1618	1618	if (!strncmp ((char*)mem + 0x18, "PAC2", 4))
1619	1619	{
1620	1620	state->cart.fmpac.sram_support = 1;
1621		p = auto_malloc (0x4000);
	1621	p = auto_alloc_array(machine, UINT8, 0x4000);
1622	1622	memset (p, 0, 0x2000);
1623	1623	memset (p + 0x2000, 0xff, 0x2000);
1624	1624	state->cart.fmpac.mem = p;
r4679	r4680
2157	2157	{
2158	2158	UINT8 *p;
2159	2159
2160		p = auto_malloc (0x20000);
	2160	p = auto_alloc_array(machine, UINT8, 0x20000);
2161	2161	memset (p, 0, 0x20000);
2162	2162
2163	2163	state->mem = p;
r4679	r4680
2262	2262	msx_cpu_setbank (machine, 5, state->mem + state->banks[2] * 0x2000);
2263	2263	msx_cpu_setbank (machine, 6, state->mem + state->banks[3] * 0x2000);
2264	2264	memory_install_read8_handler(space, 0x9800, 0x9fff, 0, 0,
2265		state->cart.sccp.scc_active ? soundcartridge_scc : SMH_BANK7);
	2265	state->cart.sccp.scc_active ? soundcartridge_scc : SMH_BANK(7));
2266	2266	memory_install_read8_handler(space, 0xb800, 0xbfff, 0, 0,
2267		state->cart.sccp.sccp_active ? soundcartridge_sccp : SMH_BANK9);
	2267	state->cart.sccp.sccp_active ? soundcartridge_sccp : SMH_BANK(9));
2268	2268	break;
2269	2269	case 3:
2270	2270	msx_cpu_setbank (machine, 7, state->mem + state->banks[0] * 0x2000);

src/mess/machine/pc1350.c

r4679	r4680
122	122
123	123	timer_set(machine, ATTOTIME_IN_SEC(1), NULL, 0, pc1350_power_up);
124	124
125		memory_install_read8_handler(space, 0x6000, 0x6fff, 0, 0, SMH_BANK1);
126		memory_install_write8_handler(space, 0x6000, 0x6fff, 0, 0, SMH_BANK1);
	125	memory_install_read8_handler(space, 0x6000, 0x6fff, 0, 0, SMH_BANK(1));
	126	memory_install_write8_handler(space, 0x6000, 0x6fff, 0, 0, SMH_BANK(1));
127	127	memory_set_bankptr(machine, 1, &mess_ram[0x0000]);
128	128
129	129	if (mess_ram_size >= 0x3000)
130	130	{
131		memory_install_read8_handler(space, 0x4000, 0x5fff, 0, 0, SMH_BANK2);
132		memory_install_write8_handler(space, 0x4000, 0x5fff, 0, 0, SMH_BANK2);
	131	memory_install_read8_handler(space, 0x4000, 0x5fff, 0, 0, SMH_BANK(2));
	132	memory_install_write8_handler(space, 0x4000, 0x5fff, 0, 0, SMH_BANK(2));
133	133	memory_set_bankptr(machine, 2, &mess_ram[0x1000]);
134	134	}
135	135	else
r4679	r4680
140	140
141	141	if (mess_ram_size >= 0x5000)
142	142	{
143		memory_install_read8_handler(space, 0x2000, 0x3fff, 0, 0, SMH_BANK3);
144		memory_install_write8_handler(space, 0x2000, 0x3fff, 0, 0, SMH_BANK3);
	143	memory_install_read8_handler(space, 0x2000, 0x3fff, 0, 0, SMH_BANK(3));
	144	memory_install_write8_handler(space, 0x2000, 0x3fff, 0, 0, SMH_BANK(3));
145	145	memory_set_bankptr(machine, 3, &mess_ram[0x3000]);
146	146	}
147	147	else

src/mess/machine/gb.c

r4679	r4680
319	319	memory_set_bankptr(machine, 5, ROMMap[ROMBank00] ? ROMMap[ROMBank00] : gb_dummy_rom_bank );
320	320	memory_set_bankptr(machine, 10, ROMMap[ROMBank00] ? ROMMap[ROMBank00] + 0x0100 : gb_dummy_rom_bank + 0x0100 );
321	321
322		sgb_tile_data = auto_malloc( 0x2000 );
	322	sgb_tile_data = auto_alloc_array_clear(machine, UINT8, 0x2000 );
323	323	memset( sgb_tile_data, 0, 0x2000 );
324	324
325	325	/* Initialize the Sound Registers */
r4679	r4680
1457	1457	{
1458	1458	int I;
1459	1459
1460		gb_dummy_rom_bank = auto_malloc( 0x4000 );
	1460	gb_dummy_rom_bank = auto_alloc_array( device->machine, UINT8, 0x4000 );
1461	1461	memset( gb_dummy_rom_bank, 0xFF, 0x4000 );
1462	1462
1463		gb_dummy_ram_bank = auto_malloc( 0x2000 );
	1463	gb_dummy_ram_bank = auto_alloc_array( device->machine, UINT8, 0x2000 );
1464	1464	memset( gb_dummy_ram_bank, 0x00, 0x2000 );
1465	1465
1466	1466	for(I = 0; I < MAX_ROMBANK; I++)
r4679	r4680
1632	1632	}
1633	1633
1634	1634	/* Claim memory */
1635		gb_cart = auto_malloc( filesize );
	1635	gb_cart = auto_alloc_array( image->machine, UINT8, filesize );
1636	1636
1637	1637	/* Read cartridge */
1638	1638	if ( image_fread( image, gb_cart, filesize ) != filesize )
r4679	r4680
1867	1867	if (RAMBanks && MBCType)
1868	1868	{
1869	1869	/* Claim memory */
1870		gb_cart_ram = auto_malloc( RAMBanks * 0x2000 );
	1870	gb_cart_ram = auto_alloc_array( image->machine, UINT8, RAMBanks * 0x2000 );
1871	1871
1872	1872	for (I = 0; I < RAMBanks; I++)
1873	1873	{
r4679	r4680
1889	1889	/* If there's an RTC claim memory to store the RTC contents */
1890	1890	if ( CartType & TIMER )
1891	1891	{
1892		MBC3RTCData = auto_malloc( 0x2000 );
	1892	MBC3RTCData = auto_alloc_array(image->machine, UINT8, 0x2000 );
1893	1893	}
1894	1894
1895	1895	if ( MBCType == MBC_TAMA5 )
1896	1896	{
1897		MBC3RTCData = auto_malloc( 0x2000 );
	1897	MBC3RTCData = auto_alloc_array(image->machine, UINT8, 0x2000 );
1898	1898	memset( gbTama5Memory, 0xFF, sizeof(gbTama5Memory) );
1899	1899	}
1900	1900
r4679	r4680
2174	2174	}
2175	2175
2176	2176	/* Claim memory */
2177		gb_cart = auto_malloc( filesize );
	2177	gb_cart = auto_alloc_array(image->machine, UINT8, filesize);
2178	2178
2179	2179	/* Read cartridge */
2180	2180	if (image_fread (image, gb_cart, filesize) != filesize)

src/mess/machine/gamecom.c

r4679	r4680
82	82	/* intialize the empty dummy bank */
83	83	if ( dummy_bank == NULL )
84	84	{
85		dummy_bank = auto_malloc( 8 * 1024 );
	85	dummy_bank = auto_alloc_array(machine, UINT8, 8 * 1024 );
86	86	}
87	87	memset( dummy_bank, 0xff, 8 * 1024 );
88	88	cartridge = NULL;
r4679	r4680
662	662	/* allocate memory on first load of a cartridge */
663	663	if ( cartridge1 == NULL )
664	664	{
665		cartridge1 = auto_malloc( 2048 * 1024 );
	665	cartridge1 = auto_alloc_array(image->machine, UINT8, 2048 * 1024 );
666	666	}
667	667	filesize = image_length( image );
668	668	switch( filesize )

src/mess/machine/smartmed.c

r4679	r4680
157	157	smartmedia[id].page_total_size = get_UINT32BE(custom_header.page_total_size);
158	158	smartmedia[id].num_pages = get_UINT32BE(custom_header.num_pages);
159	159	smartmedia[id].log2_pages_per_block = get_UINT32BE(custom_header.log2_pages_per_block);
160		smartmedia[id].data_ptr = auto_malloc(smartmedia[id].page_total_size*smartmedia[id].num_pages);
	160	smartmedia[id].data_ptr = auto_alloc_array(image->machine, UINT8, smartmedia[id].page_total_size*smartmedia[id].num_pages);
161	161	smartmedia[id].mode = SM_M_INIT;
162	162	smartmedia[id].pointer_mode = SM_PM_A;
163	163	smartmedia[id].page_addr = 0;
r4679	r4680
166	166	if (!image_is_writable(image))
167	167	smartmedia[id].status |= 0x80;
168	168	smartmedia[id].accumulated_status = 0;
169		smartmedia[id].pagereg = auto_malloc(smartmedia[id].page_total_size);
	169	smartmedia[id].pagereg = auto_alloc_array(image->machine, UINT8, smartmedia[id].page_total_size);
170	170	smartmedia[id].id[0] = smartmedia[id].id[1] = 0;
171	171
172	172	image_fread(image, smartmedia[id].id, 2);
r4679	r4680
202	202	smartmedia[id].byte_addr = 0;
203	203	smartmedia[id].status = 0x40;
204	204	smartmedia[id].accumulated_status = 0;
205		smartmedia[id].pagereg = auto_malloc(smartmedia[id].page_total_size);
	205	smartmedia[id].pagereg = auto_alloc_array(image->machine, UINT8, smartmedia[id].page_total_size);
206	206	smartmedia[id].id[0] = smartmedia[id].id[1] = 0;
207	207	smartmedia[id].mp_opcode = 0;
208	208

src/mess/machine/radio86.c

r4679	r4680
40	40	DRIVER_INIT(radioram)
41	41	{
42	42	DRIVER_INIT_CALL(radio86);
43		radio_ram_disk = auto_malloc(0x20000);
	43	radio_ram_disk = auto_alloc_array(machine, UINT8, 0x20000);
44	44	memset(radio_ram_disk,0,0x20000);
45	45	}
46	46	static READ8_DEVICE_HANDLER (radio86_8255_portb_r2 )

src/mess/machine/advision.c

r4679	r4680
31	31	/* configure EA banking */
32	32	memory_configure_bank(machine, 1, 0, 1, memory_region(machine, "bios"), 0);
33	33	memory_configure_bank(machine, 1, 1, 1, memory_region(machine, I8048_TAG), 0);
34		memory_install_readwrite8_handler(cputag_get_address_space(machine, I8048_TAG, ADDRESS_SPACE_PROGRAM), 0x0000, 0x03ff, 0, 0, SMH_BANK1, SMH_BANK1);
	34	memory_install_readwrite8_handler(cputag_get_address_space(machine, I8048_TAG, ADDRESS_SPACE_PROGRAM), 0x0000, 0x03ff, 0, 0, SMH_BANK(1), SMH_BANK(1));
35	35	memory_set_bank(machine, 1, 0);
36	36	}
37	37
r4679	r4680
40	40	advision_state *state = machine->driver_data;
41	41
42	42	/* allocate external RAM */
43		state->extram = auto_malloc(0x400);
	43	state->extram = auto_alloc_array(machine, UINT8, 0x400);
44	44
45	45	/* enable internal ROM */
46	46	cputag_set_input_line(machine, I8048_TAG, MCS48_INPUT_EA, CLEAR_LINE);

src/mess/machine/b2m.c

r4679	r4680
63	63	UINT8 *rom;
64	64	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
65	65
66		memory_install_write8_handler(space, 0x0000, 0x27ff, 0, 0, SMH_BANK1);
67		memory_install_write8_handler(space, 0x2800, 0x2fff, 0, 0, SMH_BANK2);
68		memory_install_write8_handler(space, 0x3000, 0x6fff, 0, 0, SMH_BANK3);
69		memory_install_write8_handler(space, 0x7000, 0xdfff, 0, 0, SMH_BANK4);
70		memory_install_write8_handler(space, 0xe000, 0xffff, 0, 0, SMH_BANK5);
	66	memory_install_write8_handler(space, 0x0000, 0x27ff, 0, 0, SMH_BANK(1));
	67	memory_install_write8_handler(space, 0x2800, 0x2fff, 0, 0, SMH_BANK(2));
	68	memory_install_write8_handler(space, 0x3000, 0x6fff, 0, 0, SMH_BANK(3));
	69	memory_install_write8_handler(space, 0x7000, 0xdfff, 0, 0, SMH_BANK(4));
	70	memory_install_write8_handler(space, 0xe000, 0xffff, 0, 0, SMH_BANK(5));
71	71
72	72	rom = memory_region(machine, "maincpu");
73	73	switch(bank) {

src/mess/machine/aim65.c

r4679	r4680
171	171	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
172	172
173	173	/* Init RAM */
174		memory_install_readwrite8_handler(space, 0, mess_ram_size - 1, 0, 0, SMH_BANK1, SMH_BANK1);
	174	memory_install_readwrite8_handler(space, 0, mess_ram_size - 1, 0, 0, SMH_BANK(1), SMH_BANK(1));
175	175	memory_set_bankptr(machine, 1, mess_ram);
176	176
177	177	if (mess_ram_size < 4 * 1024)

src/mess/machine/vc1541.c

r4679	r4680
1498	1498	offset_init (format);
1499	1499
1500	1500	/* Claim memory */
1501		temp_copy = auto_malloc(filesize);
	1501	temp_copy = auto_alloc_array(machine, UINT8, filesize);
1502	1502
1503	1503	if ((image_fread( image, temp_copy, filesize ) != filesize) || !filesize)
1504	1504	return INIT_FAIL;

src/mess/machine/pmd85.c

r4679	r4680
59	59	}
60	60	else
61	61	{
62		memory_install_write8_handler(space, 0x0000, 0x0fff, 0, 0, SMH_BANK1);
63		memory_install_write8_handler(space, 0x1000, 0x1fff, 0, 0, SMH_BANK2);
64		memory_install_write8_handler(space, 0x2000, 0x2fff, 0, 0, SMH_BANK3);
65		memory_install_write8_handler(space, 0x3000, 0x3fff, 0, 0, SMH_BANK4);
66		memory_install_write8_handler(space, 0x4000, 0x7fff, 0, 0, SMH_BANK5);
	62	memory_install_write8_handler(space, 0x0000, 0x0fff, 0, 0, SMH_BANK(1));
	63	memory_install_write8_handler(space, 0x1000, 0x1fff, 0, 0, SMH_BANK(2));
	64	memory_install_write8_handler(space, 0x2000, 0x2fff, 0, 0, SMH_BANK(3));
	65	memory_install_write8_handler(space, 0x3000, 0x3fff, 0, 0, SMH_BANK(4));
	66	memory_install_write8_handler(space, 0x4000, 0x7fff, 0, 0, SMH_BANK(5));
67	67
68		memory_install_read8_handler(space, 0x1000, 0x1fff, 0, 0, SMH_BANK2);
69		memory_install_read8_handler(space, 0x3000, 0x3fff, 0, 0, SMH_BANK4);
	68	memory_install_read8_handler(space, 0x1000, 0x1fff, 0, 0, SMH_BANK(2));
	69	memory_install_read8_handler(space, 0x3000, 0x3fff, 0, 0, SMH_BANK(4));
70	70
71	71	memory_set_bankptr(machine, 1, mess_ram);
72	72	memory_set_bankptr(machine, 2, mess_ram + 0x1000);
r4679	r4680
101	101	}
102	102	else
103	103	{
104		memory_install_write8_handler(space, 0x0000, 0x0fff, 0, 0, SMH_BANK1);
105		memory_install_write8_handler(space, 0x2000, 0x2fff, 0, 0, SMH_BANK3);
	104	memory_install_write8_handler(space, 0x0000, 0x0fff, 0, 0, SMH_BANK(1));
	105	memory_install_write8_handler(space, 0x2000, 0x2fff, 0, 0, SMH_BANK(3));
106	106
107	107	memory_set_bankptr(machine, 1, mess_ram);
108	108	memory_set_bankptr(machine, 2, mess_ram + 0x1000);
r4679	r4680
169	169	}
170	170	else
171	171	{
172		memory_install_write8_handler(space, 0x0000, 0x0fff, 0, 0, SMH_BANK1);
173		memory_install_write8_handler(space, 0x1000, 0x33ff, 0, 0, SMH_BANK2);
174		memory_install_write8_handler(space, 0x3400, 0x3fff, 0, 0, SMH_BANK3);
	172	memory_install_write8_handler(space, 0x0000, 0x0fff, 0, 0, SMH_BANK(1));
	173	memory_install_write8_handler(space, 0x1000, 0x33ff, 0, 0, SMH_BANK(2));
	174	memory_install_write8_handler(space, 0x3400, 0x3fff, 0, 0, SMH_BANK(3));
175	175
176	176	memory_set_bankptr(machine, 1, mess_ram);
177	177	memory_set_bankptr(machine, 2, mess_ram + 0x1000);
r4679	r4680
197	197	}
198	198	else
199	199	{
200		memory_install_write8_handler(space, 0x0000, 0x3fff, 0, 0, SMH_BANK1);
	200	memory_install_write8_handler(space, 0x0000, 0x3fff, 0, 0, SMH_BANK(1));
201	201
202	202	memory_set_bankptr(machine, 1, mess_ram);
203	203	memory_set_bankptr(machine, 2, mess_ram + 0x4000);
r4679	r4680
220	220	}
221	221	else
222	222	{
223		memory_install_write8_handler(space, 0x0000, 0x3fff, 0, 0, SMH_BANK1);
	223	memory_install_write8_handler(space, 0x0000, 0x3fff, 0, 0, SMH_BANK(1));
224	224	memory_set_bankptr(machine, 1, mess_ram);
225	225	memory_set_bankptr(machine, 2, mess_ram + 0x4000);
226	226	}

src/mess/machine/sst39vfx.c

r4679	r4680
65	65	case TYPE_SST39VF020  : flash->size = 256 * 1024; break;
66	66	case TYPE_SST39VF400A : flash->size = 512 * 1024; break;
67	67	}
68		flash->data = auto_malloc( flash->size);
	68	flash->data = auto_alloc_array(device->machine, UINT8, flash->size);
69	69	#ifdef LSB_FIRST
70	70	if (config->cpu_endianess != ENDIANNESS_LITTLE) flash->swap = config->cpu_datawidth / 8; else flash->swap = 0;
71	71	#else

src/mess/machine/c128.c

r4679	r4680
233	233	}
234	234	else
235	235	{
236		rh = SMH_BANK5;
	236	rh = SMH_BANK(5);
237	237	c128_write_io = 0;
238	238	if ((!charen && (loram || hiram)))
239	239	memory_set_bankptr (machine, 13, c64_chargen);
r4679	r4680
476	476	else
477	477	{
478	478	c128_write_io = 0;
479		rh = SMH_BANK13;
	479	rh = SMH_BANK(13);
480	480	}
481	481	c128_set_m8502_read_handler(machine, 0xd000, 0xdfff, rh);
482	482

src/mess/machine/ay3600.c

r4679	r4680
322	322	int AY3600_init(running_machine *machine)
323	323	{
324	324	/* Init the key remapping table */
325		ay3600_keys = auto_malloc(AY3600_KEYS_LENGTH * sizeof(*ay3600_keys));
326		memset(ay3600_keys, 0, AY3600_KEYS_LENGTH * sizeof(*ay3600_keys));
	325	ay3600_keys = auto_alloc_array_clear(machine, unsigned int, AY3600_KEYS_LENGTH);
327	326
328	327	/* We poll the keyboard periodically to scan the keys.  This is
329	328	actually consistent with how the AY-3600 keyboard controller works. */

src/mess/machine/pet.c

r4679	r4680
418	418	}
419	419	else
420	420	{
421		rh = SMH_BANK7;
	421	rh = SMH_BANK(7);
422	422	if (!(data & 2))
423		wh = SMH_BANK7;
	423	wh = SMH_BANK(7);
424	424	else
425	425	wh = SMH_NOP;
426	426	}
427	427	memory_install_read8_handler(space, 0xe800, 0xefff, 0, 0, rh);
428	428	memory_install_write8_handler(space, 0xe800, 0xefff, 0, 0, wh);
429	429
430		memory_install_write8_handler(space, 0xc000, 0xe7ff, 0, 0, (data & 2) == 0 ? SMH_BANK6 : SMH_NOP);
431		memory_install_write8_handler(space, 0xf000, 0xffef, 0, 0, (data & 2) == 0 ? SMH_BANK8 : SMH_NOP);
432		memory_install_write8_handler(space, 0xfff1, 0xffff, 0, 0, (data & 2) == 0 ? SMH_BANK9 : SMH_NOP);
	430	memory_install_write8_handler(space, 0xc000, 0xe7ff, 0, 0, (data & 2) == 0 ? SMH_BANK(6) : SMH_NOP);
	431	memory_install_write8_handler(space, 0xf000, 0xffef, 0, 0, (data & 2) == 0 ? SMH_BANK(8) : SMH_NOP);
	432	memory_install_write8_handler(space, 0xfff1, 0xffff, 0, 0, (data & 2) == 0 ? SMH_BANK(9) : SMH_NOP);
433	433
434	434	if (data & 0x20)
435	435	{
r4679	r4680
440	440	else
441	441	{
442	442	if (!(data & 1))
443		wh = SMH_BANK1;
	443	wh = SMH_BANK(1);
444	444	else
445	445	wh = SMH_NOP;
446	446	}
447	447	memory_install_write8_handler(space, 0x8000, 0x8fff, 0, 0, wh);
448	448
449		memory_install_write8_handler(space, 0x9000, 0x9fff, 0, 0, (data & 1) == 0 ? SMH_BANK2 : SMH_NOP);
450		memory_install_write8_handler(space, 0xa000, 0xafff, 0, 0, (data & 1) == 0 ? SMH_BANK3 : SMH_NOP);
451		memory_install_write8_handler(space, 0xb000, 0xbfff, 0, 0, (data & 1) == 0 ? SMH_BANK4 : SMH_NOP);
	449	memory_install_write8_handler(space, 0x9000, 0x9fff, 0, 0, (data & 1) == 0 ? SMH_BANK(2) : SMH_NOP);
	450	memory_install_write8_handler(space, 0xa000, 0xafff, 0, 0, (data & 1) == 0 ? SMH_BANK(3) : SMH_NOP);
	451	memory_install_write8_handler(space, 0xb000, 0xbfff, 0, 0, (data & 1) == 0 ? SMH_BANK(4) : SMH_NOP);
452	452
453	453
454	454	if (data & 4)
r4679	r4680
595	595	state->superpet = 0;
596	596	state->cbm8096 = 0;
597	597
598		memory_install_read8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x0000, mess_ram_size - 1, 0, 0, SMH_BANK10);
599		memory_install_write8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x0000, mess_ram_size - 1, 0, 0, SMH_BANK10);
	598	memory_install_read8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x0000, mess_ram_size - 1, 0, 0, SMH_BANK(10));
	599	memory_install_write8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x0000, mess_ram_size - 1, 0, 0, SMH_BANK(10));
600	600	memory_set_bankptr (machine, 10, pet_memory);
601	601
602	602	if (mess_ram_size < 0x8000)
r4679	r4680
658	658	pet_common_driver_init(machine);
659	659	state->superpet = 1;
660	660
661		superpet_memory = auto_malloc(0x10000);
	661	superpet_memory = auto_alloc_array(machine, UINT8, 0x10000);
662	662
663	663	memory_configure_bank(machine, 1, 0, 16, superpet_memory, 0x1000);
664	664	memory_set_bank(machine, 1, 0);

src/mess/machine/c16.c

r4679	r4680
521	521	memory_set_bankptr (machine, 6, mess_ram + (0x8000 % mess_ram_size));
522	522	memory_set_bankptr (machine, 7, mess_ram + (0xc000 % mess_ram_size));
523	523
524		memory_install_write8_handler(space, 0xff20, 0xff3d, 0, 0, SMH_BANK10);
525		memory_install_write8_handler(space, 0xff40, 0xffff, 0, 0, SMH_BANK11);
	524	memory_install_write8_handler(space, 0xff20, 0xff3d, 0, 0, SMH_BANK(10));
	525	memory_install_write8_handler(space, 0xff40, 0xffff, 0, 0, SMH_BANK(11));
526	526	memory_set_bankptr (machine, 10, mess_ram + (0xff20 % mess_ram_size));
527	527	memory_set_bankptr (machine, 11, mess_ram + (0xff40 % mess_ram_size));
528	528
r4679	r4680
530	530	}
531	531	else
532	532	{
533		memory_install_write8_handler(space, 0x4000, 0xfcff, 0, 0, SMH_BANK10);
	533	memory_install_write8_handler(space, 0x4000, 0xfcff, 0, 0, SMH_BANK(10));
534	534	memory_set_bankptr (machine, 10, mess_ram + (0x4000 % mess_ram_size));
535	535
536	536	ted7360_set_dma (ted7360_dma_read, ted7360_dma_read_rom);

src/mess/machine/oric.c

r4679	r4680
468	468
469	469	memory_install_read8_handler(space, 0x0300, 0x030f, 0, 0, oric_IO_r);
470	470	memory_install_read8_device_handler(space, fdc, 0x0310, 0x031f, 0, 0, applefdc_r);
471		memory_install_read8_handler(space, 0x0320, 0x03ff, 0, 0, SMH_BANK4);
	471	memory_install_read8_handler(space, 0x0320, 0x03ff, 0, 0, SMH_BANK(4));
472	472
473	473	memory_install_write8_handler(space, 0x0300, 0x030f, 0, 0, oric_IO_w);
474	474	memory_install_write8_device_handler(space, fdc, 0x0310, 0x031f, 0, 0, applefdc_w);
r4679	r4680
484	484	{
485	485	switch(i) {
486	486	case 1:
487		memory_install_read8_handler(space, 0xc000, 0xdfff, 0, 0, rd ? SMH_BANK1 : SMH_NOP);
488		memory_install_write8_handler(space, 0xc000, 0xdfff, 0, 0, wr ? SMH_BANK5 : SMH_UNMAP);
	487	memory_install_read8_handler(space, 0xc000, 0xdfff, 0, 0, rd ? SMH_BANK(1) : SMH_NOP);
	488	memory_install_write8_handler(space, 0xc000, 0xdfff, 0, 0, wr ? SMH_BANK(5) : SMH_UNMAP);
489	489	break;
490	490	case 2:
491		memory_install_read8_handler(space, 0xe000, 0xf7ff, 0, 0, rd ? SMH_BANK2 : SMH_NOP);
492		memory_install_write8_handler(space, 0xe000, 0xf7ff, 0, 0, wr ? SMH_BANK6 : SMH_UNMAP);
	491	memory_install_read8_handler(space, 0xe000, 0xf7ff, 0, 0, rd ? SMH_BANK(2) : SMH_NOP);
	492	memory_install_write8_handler(space, 0xe000, 0xf7ff, 0, 0, wr ? SMH_BANK(6) : SMH_UNMAP);
493	493	break;
494	494	case 3:
495		memory_install_read8_handler(space, 0xf800, 0xffff, 0, 0, rd ? SMH_BANK3 : SMH_NOP);
	495	memory_install_read8_handler(space, 0xf800, 0xffff, 0, 0, rd ? SMH_BANK(3) : SMH_NOP);
496	496	break;
497	497	}
498	498	}
r4679	r4680
562	562
563	563	memory_install_read8_handler(space, 0x0300, 0x030f, 0, 0, oric_IO_r);
564	564	memory_install_read8_device_handler(space, fdc, 0x0310, 0x031f, 0, 0, applefdc_r);
565		memory_install_read8_handler(space, 0x0320, 0x03ff, 0, 0, SMH_BANK4);
	565	memory_install_read8_handler(space, 0x0320, 0x03ff, 0, 0, SMH_BANK(4));
566	566
567	567	memory_install_write8_handler(space, 0x0300, 0x030f, 0, 0, oric_IO_w);
568	568	memory_install_write8_device_handler(space, fdc, 0x0310, 0x031f, 0, 0, applefdc_w);
r4679	r4680
1110	1110
1111	1111	oric_is_telestrat = 0;
1112	1112
1113		oric_ram_0x0c000 = auto_malloc(16384);
	1113	oric_ram_0x0c000 = auto_alloc_array(machine, char, 16384);
1114	1114	}
1115	1115
1116	1116
r4679	r4680
1339	1339	{
1340	1340	case TELESTRAT_MEM_BLOCK_RAM:
1341	1341	{
1342		rh = SMH_BANK1;
1343		wh = SMH_BANK2;
	1342	rh = SMH_BANK(1);
	1343	wh = SMH_BANK(2);
1344	1344	memory_set_bankptr(machine, 1, mem_block->ptr);
1345	1345	memory_set_bankptr(machine, 2, mem_block->ptr);
1346	1346	}
r4679	r4680
1348	1348
1349	1349	case TELESTRAT_MEM_BLOCK_ROM:
1350	1350	{
1351		rh = SMH_BANK1;
	1351	rh = SMH_BANK(1);
1352	1352	wh = SMH_NOP;
1353	1353	memory_set_bankptr(machine, 1, mem_block->ptr);
1354	1354	}
r4679	r4680
1467	1467
1468	1468	/* initialise overlay ram */
1469	1469	telestrat_blocks[0].MemType = TELESTRAT_MEM_BLOCK_RAM;
1470		telestrat_blocks[0].ptr = (unsigned char *) auto_malloc(16384);
	1470	telestrat_blocks[0].ptr = auto_alloc_array(machine, UINT8, 16384);
1471	1471
1472	1472	telestrat_blocks[1].MemType = TELESTRAT_MEM_BLOCK_RAM;
1473		telestrat_blocks[1].ptr = (unsigned char *) auto_malloc(16384);
	1473	telestrat_blocks[1].ptr = auto_alloc_array(machine, UINT8, 16384);
1474	1474	telestrat_blocks[2].MemType = TELESTRAT_MEM_BLOCK_RAM;
1475		telestrat_blocks[2].ptr = (unsigned char *) auto_malloc(16384);
	1475	telestrat_blocks[2].ptr = auto_alloc_array(machine, UINT8, 16384);
1476	1476
1477	1477	/* initialise default cartridge */
1478	1478	telestrat_blocks[3].MemType = TELESTRAT_MEM_BLOCK_ROM;
1479	1479	telestrat_blocks[3].ptr = memory_region(machine, "maincpu")+0x010000;
1480	1480
1481	1481	telestrat_blocks[4].MemType = TELESTRAT_MEM_BLOCK_RAM;
1482		telestrat_blocks[4].ptr = (unsigned char *) auto_malloc(16384);
	1482	telestrat_blocks[4].ptr = auto_alloc_array(machine, UINT8, 16384);
1483	1483
1484	1484	/* initialise default cartridge */
1485	1485	telestrat_blocks[5].MemType = TELESTRAT_MEM_BLOCK_ROM;

src/mess/machine/vector06.c

r4679	r4680
214	214	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
215	215
216	216	cpu_set_irq_callback(cputag_get_cpu(machine, "maincpu"), vector06_irq_callback);
217		memory_install_read8_handler (space, 0x0000, 0x7fff, 0, 0, SMH_BANK1);
218		memory_install_write8_handler(space, 0x0000, 0x7fff, 0, 0, SMH_BANK2);
219		memory_install_read8_handler (space, 0x8000, 0xffff, 0, 0, SMH_BANK3);
220		memory_install_write8_handler(space, 0x8000, 0xffff, 0, 0, SMH_BANK4);
	217	memory_install_read8_handler (space, 0x0000, 0x7fff, 0, 0, SMH_BANK(1));
	218	memory_install_write8_handler(space, 0x0000, 0x7fff, 0, 0, SMH_BANK(2));
	219	memory_install_read8_handler (space, 0x8000, 0xffff, 0, 0, SMH_BANK(3));
	220	memory_install_write8_handler(space, 0x8000, 0xffff, 0, 0, SMH_BANK(4));
221	221
222	222	memory_set_bankptr(machine, 1, memory_region(machine, "maincpu") + 0x10000);
223	223	memory_set_bankptr(machine, 2, mess_ram + 0x0000);

src/mess/machine/99_usbsm.c

r4679	r4680
74	74	*/
75	75	void ti99_usbsm_init(running_machine *machine)
76	76	{
77		ti99_usbsm_RAM = auto_malloc(0x100000);
	77	ti99_usbsm_RAM = auto_alloc_array(machine, UINT16, 0x100000/2);
78	78	}
79	79
80	80	/*

src/mess/machine/electron.c

r4679	r4680
214	214	}
215	215	else
216	216	{
217		memory_install_read8_handler( space, 0x8000, 0xbfff, 0, 0, SMH_BANK2 );
	217	memory_install_read8_handler( space, 0x8000, 0xbfff, 0, 0, SMH_BANK(2) );
218	218	}
219	219	memory_set_bank(space->machine, 2, electron_ula.rompage);
220	220	}

src/mess/machine/pc_hdc.c

r4679	r4680
184	184	hdc_control = 0;
185	185	hdc_set_irq = hdc_set_irq_func;
186	186
187		buffer = auto_malloc(17*4*512);
	187	buffer = auto_alloc_array(machine, UINT8, 17*4*512);
188	188
189	189	/* init for all boards */
190	190	for (i = 0; i < MAX_BOARD; i++)

src/mess/machine/orion.c

r4679	r4680
339	339	bank_select = (orionz80_dispatcher & 0x0c) >> 2;
340	340	segment_select = orionz80_dispatcher & 0x03;
341	341
342		memory_install_write8_handler(space, 0x0000, 0x3fff, 0, 0, SMH_BANK1);
	342	memory_install_write8_handler(space, 0x0000, 0x3fff, 0, 0, SMH_BANK(1));
343	343	if ((orionz80_dispatcher & 0x80)==0)
344	344	{ // dispatcher on
345	345	memory_set_bankptr(machine, 1, mess_ram + 0x10000 * bank_select + segment_select * 0x4000 );
r4679	r4680
397	397	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
398	398
399	399	memory_install_write8_handler(space, 0x0000, 0x3fff, 0, 0, SMH_UNMAP);
400		memory_install_write8_handler(space, 0x4000, 0xefff, 0, 0, SMH_BANK2);
401		memory_install_write8_handler(space, 0xf000, 0xf3ff, 0, 0, SMH_BANK3);
	400	memory_install_write8_handler(space, 0x4000, 0xefff, 0, 0, SMH_BANK(2));
	401	memory_install_write8_handler(space, 0xf000, 0xf3ff, 0, 0, SMH_BANK(3));
402	402
403	403	memory_install_write8_handler(space, 0xf400, 0xf4ff, 0, 0, orion128_system_w);
404	404	memory_install_write8_handler(space, 0xf500, 0xf5ff, 0, 0, orion128_romdisk_w);
r4679	r4680
503	503	{
504	504	page = orionpro_128_page & 7;
505	505	}
506		memory_install_write8_handler(space, 0x0000, 0x1fff, 0, 0, SMH_BANK1);
507		memory_install_write8_handler(space, 0x2000, 0x3fff, 0, 0, SMH_BANK2);
508		memory_install_write8_handler(space, 0x4000, 0x7fff, 0, 0, SMH_BANK3);
509		memory_install_write8_handler(space, 0x8000, 0xbfff, 0, 0, SMH_BANK4);
510		memory_install_write8_handler(space, 0xc000, 0xefff, 0, 0, SMH_BANK5);
511		memory_install_write8_handler(space, 0xf000, 0xf3ff, 0, 0, SMH_BANK6);
512		memory_install_write8_handler(space, 0xf400, 0xf7ff, 0, 0, SMH_BANK7);
513		memory_install_write8_handler(space, 0xf800, 0xffff, 0, 0, SMH_BANK8);
	506	memory_install_write8_handler(space, 0x0000, 0x1fff, 0, 0, SMH_BANK(1));
	507	memory_install_write8_handler(space, 0x2000, 0x3fff, 0, 0, SMH_BANK(2));
	508	memory_install_write8_handler(space, 0x4000, 0x7fff, 0, 0, SMH_BANK(3));
	509	memory_install_write8_handler(space, 0x8000, 0xbfff, 0, 0, SMH_BANK(4));
	510	memory_install_write8_handler(space, 0xc000, 0xefff, 0, 0, SMH_BANK(5));
	511	memory_install_write8_handler(space, 0xf000, 0xf3ff, 0, 0, SMH_BANK(6));
	512	memory_install_write8_handler(space, 0xf400, 0xf7ff, 0, 0, SMH_BANK(7));
	513	memory_install_write8_handler(space, 0xf800, 0xffff, 0, 0, SMH_BANK(8));
514	514
515	515
516	516	if ((orionpro_dispatcher & 0x01)==0x00)

src/mess/machine/amigakbd.c

r4679	r4680
101	101	void amigakbd_init( running_machine *machine )
102	102	{
103	103	/* allocate a keyboard buffer */
104		key_buf = auto_malloc( KEYBOARD_BUFFER_SIZE );
	104	key_buf = auto_alloc_array(machine, UINT8, KEYBOARD_BUFFER_SIZE );
105	105	key_buf_pos = 0;
106	106	key_cur_pos = 0;
107	107	kbd_timer = timer_alloc(machine, kbd_update_callback, NULL);

src/mess/machine/abcbus.c

r4679	r4680
21	21	/* create a linked list of devices */
22	22	for ( ; daisy->devtype != NULL; daisy++)
23	23	{
24		*tailptr = auto_malloc(sizeof(**tailptr));
	24	*tailptr = auto_alloc(machine, abcbus_daisy_state);
25	25	(*tailptr)->next = NULL;
26	26	(*tailptr)->device = devtag_get_device(machine, device_inherit_tag(tempstring, cputag, daisy->devname));
27	27	if ((*tailptr)->device == NULL)

src/mess/machine/a7800.c

r4679	r4680
87	87	memory_set_bankptr(machine, 7, &ROM[0x2000]);      /* MAINRAM */
88	88
89	89	/* Brutal hack put in as a consequence of new memory system; fix this */
90		memory_install_read8_handler(space, 0x0480, 0x04FF, 0, 0, SMH_BANK10);
91		memory_install_write8_handler(space, 0x0480, 0x04FF, 0, 0, SMH_BANK10);
	90	memory_install_read8_handler(space, 0x0480, 0x04FF, 0, 0, SMH_BANK(10));
	91	memory_install_write8_handler(space, 0x0480, 0x04FF, 0, 0, SMH_BANK(10));
92	92	memory_set_bankptr(machine, 10, ROM + 0x0480);
93		memory_install_read8_handler(space, 0x1800, 0x27FF, 0, 0, SMH_BANK11);
94		memory_install_write8_handler(space, 0x1800, 0x27FF, 0, 0, SMH_BANK11);
	93	memory_install_read8_handler(space, 0x1800, 0x27FF, 0, 0, SMH_BANK(11));
	94	memory_install_write8_handler(space, 0x1800, 0x27FF, 0, 0, SMH_BANK(11));
95	95	memory_set_bankptr(machine, 11, ROM + 0x1800);
96	96	}
97	97
r4679	r4680
207	207	a7800_cart_bkup = NULL;
208	208
209	209	/* Allocate memory for BIOS bank switching */
210		a7800_bios_bkup = (UINT8*) auto_malloc(0x4000);
211		a7800_cart_bkup = (UINT8*) auto_malloc(0x4000);
	210	a7800_bios_bkup = auto_alloc_array(device->machine, UINT8, 0x4000);
	211	a7800_cart_bkup = auto_alloc_array(device->machine, UINT8, 0x4000);
212	212
213	213	/* save the BIOS so we can switch it in and out */
214	214	memcpy( a7800_bios_bkup, memory + 0xC000, 0x4000 );

src/mess/machine/nascom1.c

r4679	r4680
322	322
323	323	case 16 * 1024:
324	324	memory_install_readwrite8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM),
325		0x1400, 0x4fff, 0, 0, SMH_BANK1, SMH_BANK1);
	325	0x1400, 0x4fff, 0, 0, SMH_BANK(1), SMH_BANK(1));
326	326	memory_install_readwrite8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM),
327	327	0x5000, 0xafff, 0, 0, SMH_NOP, SMH_NOP);
328	328	memory_set_bankptr(machine, 1, mess_ram);
r4679	r4680
330	330
331	331	case 32 * 1024:
332	332	memory_install_readwrite8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM),
333		0x1400, 0x8fff, 0, 0, SMH_BANK1, SMH_BANK1);
	333	0x1400, 0x8fff, 0, 0, SMH_BANK(1), SMH_BANK(1));
334	334	memory_install_readwrite8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM),
335	335	0x9000, 0xafff, 0, 0, SMH_NOP, SMH_NOP);
336	336	memory_set_bankptr(machine, 1, mess_ram);
r4679	r4680
338	338
339	339	case 40 * 1024:
340	340	memory_install_readwrite8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM),
341		0x1400, 0xafff, 0, 0, SMH_BANK1, SMH_BANK1);
	341	0x1400, 0xafff, 0, 0, SMH_BANK(1), SMH_BANK(1));
342	342	memory_set_bankptr(machine, 1, mess_ram);
343	343	break;
344	344	}

src/mess/machine/amigacrt.c

r4679	r4680
142	142	}
143	143
144	144	/* setup the cart ram */
145		ar_ram = auto_malloc(0x4000);
	145	ar_ram = auto_alloc_array(machine, UINT8, 0x4000);
146	146	memset(ar_ram, 0, 0x4000);
147	147
148	148	/* Install ROM */
149		memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xf00000, 0xf7ffff, 0, 0, SMH_BANK2);
	149	memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xf00000, 0xf7ffff, 0, 0, SMH_BANK(2));
150	150	memory_install_write16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xf00000, 0xf7ffff, 0, 0, SMH_ROM);
151	151
152	152	/* Install RAM */
153		memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x9fc000, 0x9fffff, 0, 0, SMH_BANK3);
154		memory_install_write16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x9fc000, 0x9fffff, 0, 0, SMH_BANK3);
	153	memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x9fc000, 0x9fffff, 0, 0, SMH_BANK(3));
	154	memory_install_write16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x9fc000, 0x9fffff, 0, 0, SMH_BANK(3));
155	155
156	156	/* Configure Banks */
157	157	memory_set_bankptr(machine, 2, memory_region(machine, "user2"));
r4679	r4680
236	236	}
237	237
238	238	/* overlay disabled, map RAM on 0x000000 */
239		memory_install_write16_handler(space, 0x000000, amiga_chip_ram_size - 1, 0, mirror_mask, SMH_BANK1);
	239	memory_install_write16_handler(space, 0x000000, amiga_chip_ram_size - 1, 0, mirror_mask, SMH_BANK(1));
240	240	}
241	241	}
242	242
r4679	r4680
350	350	}
351	351
352	352	/* setup the cart ram */
353		ar_ram = auto_malloc(0x10000);
	353	ar_ram = auto_alloc_array_clear(machine, UINT8,0x10000);
354	354
355		memset(ar_ram, 0, 0x10000);
356
357	355	if ( ar3 )
358	356	{
359	357	mirror = 0;
r4679	r4680
361	359	}
362	360
363	361	/* Install ROM */
364		memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x400000, 0x400000+size, 0, mirror, SMH_BANK2);
	362	memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x400000, 0x400000+size, 0, mirror, SMH_BANK(2));
365	363	memory_install_write16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x400000, 0x400000+size, 0, mirror, SMH_ROM);
366	364
367	365	/* Install RAM */
368		memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x440000, 0x44ffff, 0, 0, SMH_BANK3);
369		memory_install_write16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x440000, 0x44ffff, 0, 0, SMH_BANK3);
	366	memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x440000, 0x44ffff, 0, 0, SMH_BANK(3));
	367	memory_install_write16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x440000, 0x44ffff, 0, 0, SMH_BANK(3));
370	368
371	369	/* Install Custom chip monitor */
372	370	//   memory_install_read16_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xdff000, 0xdff1ff, 0, 0, amiga_ar23_custom_r);

src/mess/machine/osborne1.c

r4679	r4680
518	518	{
519	519	memset( &osborne1, 0, sizeof( osborne1 ) );
520	520
521		osborne1.empty_4K = auto_malloc( 0x1000 );
	521	osborne1.empty_4K = auto_alloc_array(machine, UINT8, 0x1000 );
522	522	memset( osborne1.empty_4K, 0xFF, 0x1000 );
523	523
524	524	/* Configure the 6850 ACIA */

src/mess/machine/vtech1.c

r4679	r4680
93	93	case 22 * 1024:
94	94	case 32 * 1024:
95	95	/* install 16KB memory expansion */
96		memory_install_read8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), base, base + 0x3fff, 0, 0, SMH_BANK2);
97		memory_install_write8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), base, base + 0x3fff, 0, 0, SMH_BANK2);
	96	memory_install_read8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), base, base + 0x3fff, 0, 0, SMH_BANK(2));
	97	memory_install_write8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), base, base + 0x3fff, 0, 0, SMH_BANK(2));
98	98	memory_configure_bank(machine, 2, 0, 1, mess_ram + base - 0x7800, 0);
99	99	memory_set_bank(machine, 2, 0);
100	100
r4679	r4680
107	107	/* 64KB/4MB memory expansion */
108	108
109	109	/* install fixed first bank */
110		memory_install_read8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x8000, 0xbfff, 0, 0, SMH_BANK2);
111		memory_install_write8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x8000, 0xbfff, 0, 0, SMH_BANK2);
	110	memory_install_read8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x8000, 0xbfff, 0, 0, SMH_BANK(2));
	111	memory_install_write8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x8000, 0xbfff, 0, 0, SMH_BANK(2));
112	112	memory_configure_bank(machine, 2, 0, 1, mess_ram + 0x800, 0);
113	113	memory_set_bank(machine, 2, 0);
114	114
115	115	/* install the others, dynamically banked in */
116		memory_install_read8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xc000, 0xffff, 0, 0, SMH_BANK3);
117		memory_install_write8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xc000, 0xffff, 0, 0, SMH_BANK3);
	116	memory_install_read8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xc000, 0xffff, 0, 0, SMH_BANK(3));
	117	memory_install_write8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xc000, 0xffff, 0, 0, SMH_BANK(3));
118	118	memory_configure_bank(machine, 3, 0, (mess_ram_size - 0x4800) / 0x4000, mess_ram + 0x4800, 0x4000);
119	119	memory_set_bank(machine, 3, 0);
120	120	break;

src/mess/machine/amstrad.c

r4679	r4680
1401	1401	return pc;
1402	1402	}
1403	1403
1404		static void multiface_init(void)
	1404	static void multiface_init(running_machine *machine)
1405	1405	{
1406	1406	/* after a reset the multiface is visible */
1407	1407	multiface_flags = MULTIFACE_VISIBLE;
1408	1408
1409	1409	/* allocate ram */
1410		multiface_ram = (unsigned char *)auto_malloc(8192);
	1410	multiface_ram = auto_alloc_array(machine, UINT8, 8192);
1411	1411	}
1412	1412
1413	1413	/* call when a system reset is done */
r4679	r4680
1662	1662	}
1663	1663	else
1664	1664	{
1665		memory_install_read8_handler(space, 0x4000, 0x5fff, 0, 0, SMH_BANK3);
1666		memory_install_read8_handler(space, 0x6000, 0x7fff, 0, 0, SMH_BANK4);
1667		memory_install_write8_handler(space, 0x4000, 0x5fff, 0, 0, SMH_BANK11);
1668		memory_install_write8_handler(space, 0x6000, 0x7fff, 0, 0, SMH_BANK12);
	1665	memory_install_read8_handler(space, 0x4000, 0x5fff, 0, 0, SMH_BANK(3));
	1666	memory_install_read8_handler(space, 0x6000, 0x7fff, 0, 0, SMH_BANK(4));
	1667	memory_install_write8_handler(space, 0x4000, 0x5fff, 0, 0, SMH_BANK(11));
	1668	memory_install_write8_handler(space, 0x6000, 0x7fff, 0, 0, SMH_BANK(12));
1669	1669	}
1670	1670
1671	1671	if(AmstradCPC_RamBanks[0] != NULL)
r4679	r4680
3228	3228	amstrad_GateArray_RamConfiguration = 0;
3229	3229	amstrad_CRTC_HS_Counter = 2;
3230	3230
3231		memory_install_read8_handler(space, 0x0000, 0x1fff, 0, 0, SMH_BANK1);
3232		memory_install_read8_handler(space, 0x2000, 0x3fff, 0, 0, SMH_BANK2);
	3231	memory_install_read8_handler(space, 0x0000, 0x1fff, 0, 0, SMH_BANK(1));
	3232	memory_install_read8_handler(space, 0x2000, 0x3fff, 0, 0, SMH_BANK(2));
3233	3233
3234		memory_install_read8_handler(space, 0x4000, 0x5fff, 0, 0, SMH_BANK3);
3235		memory_install_read8_handler(space, 0x6000, 0x7fff, 0, 0, SMH_BANK4);
	3234	memory_install_read8_handler(space, 0x4000, 0x5fff, 0, 0, SMH_BANK(3));
	3235	memory_install_read8_handler(space, 0x6000, 0x7fff, 0, 0, SMH_BANK(4));
3236	3236
3237		memory_install_read8_handler(space, 0x8000, 0x9fff, 0, 0, SMH_BANK5);
3238		memory_install_read8_handler(space, 0xa000, 0xbfff, 0, 0, SMH_BANK6);
	3237	memory_install_read8_handler(space, 0x8000, 0x9fff, 0, 0, SMH_BANK(5));
	3238	memory_install_read8_handler(space, 0xa000, 0xbfff, 0, 0, SMH_BANK(6));
3239	3239
3240		memory_install_read8_handler(space, 0xc000, 0xdfff, 0, 0, SMH_BANK7);
3241		memory_install_read8_handler(space, 0xe000, 0xffff, 0, 0, SMH_BANK8);
	3240	memory_install_read8_handler(space, 0xc000, 0xdfff, 0, 0, SMH_BANK(7));
	3241	memory_install_read8_handler(space, 0xe000, 0xffff, 0, 0, SMH_BANK(8));
3242	3242
3243		memory_install_write8_handler(space, 0x0000, 0x1fff, 0, 0, SMH_BANK9);
3244		memory_install_write8_handler(space, 0x2000, 0x3fff, 0, 0, SMH_BANK10);
	3243	memory_install_write8_handler(space, 0x0000, 0x1fff, 0, 0, SMH_BANK(9));
	3244	memory_install_write8_handler(space, 0x2000, 0x3fff, 0, 0, SMH_BANK(10));
3245	3245
3246		memory_install_write8_handler(space, 0x4000, 0x5fff, 0, 0, SMH_BANK11);
3247		memory_install_write8_handler(space, 0x6000, 0x7fff, 0, 0, SMH_BANK12);
	3246	memory_install_write8_handler(space, 0x4000, 0x5fff, 0, 0, SMH_BANK(11));
	3247	memory_install_write8_handler(space, 0x6000, 0x7fff, 0, 0, SMH_BANK(12));
3248	3248
3249		memory_install_write8_handler(space, 0x8000, 0x9fff, 0, 0, SMH_BANK13);
3250		memory_install_write8_handler(space, 0xa000, 0xbfff, 0, 0, SMH_BANK14);
	3249	memory_install_write8_handler(space, 0x8000, 0x9fff, 0, 0, SMH_BANK(13));
	3250	memory_install_write8_handler(space, 0xa000, 0xbfff, 0, 0, SMH_BANK(14));
3251	3251
3252		memory_install_write8_handler(space, 0xc000, 0xdfff, 0, 0, SMH_BANK15);
3253		memory_install_write8_handler(space, 0xe000, 0xffff, 0, 0, SMH_BANK16);
	3252	memory_install_write8_handler(space, 0xc000, 0xdfff, 0, 0, SMH_BANK(15));
	3253	memory_install_write8_handler(space, 0xe000, 0xffff, 0, 0, SMH_BANK(16));
3254	3254
3255	3255	device_reset(cputag_get_cpu(space->machine, "maincpu"));
3256	3256	if ( amstrad_system_type == SYSTEM_CPC || amstrad_system_type == SYSTEM_ALESTE )
r4679	r4680
3304	3304	amstrad_reset_machine(machine);
3305	3305	//   amstrad_init_palette(machine);
3306	3306
3307		multiface_init();
	3307	multiface_init(machine);
3308	3308
3309	3309	}
3310	3310

src/mess/machine/sms.c

r4679	r4680
1012	1012	/* Create a new memory region to hold the ROM. */
1013	1013	/* Make sure the region holds only complete (0x4000) rom banks */
1014	1014	sms_cartridge[index].size = (size&0x3FFF) ? (((size>>14)+1)<<14) : size;
1015		sms_cartridge[index].ROM = auto_malloc( sms_cartridge[index].size );
	1015	sms_cartridge[index].ROM = auto_alloc_array(image->machine, UINT8, sms_cartridge[index].size );
1016	1016
1017		sms_cartridge[index].cartSRAM = auto_malloc( NVRAM_SIZE );
	1017	sms_cartridge[index].cartSRAM = auto_alloc_array(image->machine, UINT8, NVRAM_SIZE );
1018	1018
1019	1019	/* Load ROM banks */
1020	1020	size = image_fread(image, sms_cartridge[index].ROM, size);
r4679	r4680
1062	1062	{
1063	1063	sms_cartridge[index].features |= CF_ONCART_RAM;
1064	1064	sms_cartridge[index].ram_size = 0x2000;
1065		sms_cartridge[index].cartRAM = auto_malloc( sms_cartridge[index].ram_size );
	1065	sms_cartridge[index].cartRAM = auto_alloc_array(image->machine, UINT8, sms_cartridge[index].ram_size );
1066	1066	}
1067	1067	}
1068	1068	else
r4679	r4680
1096	1096	if ( sms_cartridge[index].features & CF_CODEMASTERS_MAPPER )
1097	1097	{
1098	1098	sms_cartridge[index].ram_size = 0x10000;
1099		sms_cartridge[index].cartRAM = auto_malloc( sms_cartridge[index].ram_size );
	1099	sms_cartridge[index].cartRAM = auto_alloc_array(image->machine, UINT8, sms_cartridge[index].ram_size );
1100	1100	sms_cartridge[index].ram_page = 0;
1101	1101	}
1102	1102

src/mess/machine/llc.c

r4679	r4680
124	124	memory_install_write8_handler(space, 0x6000, 0xbfff, 0, 0, SMH_UNMAP);
125	125	memory_set_bankptr(machine, 3, memory_region(machine, "maincpu") + 0x6000);
126	126
127		memory_install_write8_handler(space, 0xc000, 0xffff, 0, 0, SMH_BANK4);
	127	memory_install_write8_handler(space, 0xc000, 0xffff, 0, 0, SMH_BANK(4));
128	128	memory_set_bankptr(machine, 4, mess_ram + 0xc000);
129	129
130	130	}
r4679	r4680
133	133	{
134	134	const address_space *mem_space = cputag_get_address_space(space->machine, "maincpu", ADDRESS_SPACE_PROGRAM);
135	135
136		memory_install_write8_handler(mem_space, 0x0000, 0xbfff, 0, 0, SMH_BANK1);
	136	memory_install_write8_handler(mem_space, 0x0000, 0xbfff, 0, 0, SMH_BANK(1));
137	137	memory_set_bankptr(space->machine, 1, mess_ram);
138	138
139		memory_install_write8_handler(mem_space, 0x4000, 0x5fff, 0, 0, SMH_BANK2);
	139	memory_install_write8_handler(mem_space, 0x4000, 0x5fff, 0, 0, SMH_BANK(2));
140	140	memory_set_bankptr(space->machine, 2, mess_ram + 0x4000);
141	141
142		memory_install_write8_handler(mem_space, 0x6000, 0xbfff, 0, 0, SMH_BANK3);
	142	memory_install_write8_handler(mem_space, 0x6000, 0xbfff, 0, 0, SMH_BANK(3));
143	143	memory_set_bankptr(space->machine, 3, mess_ram + 0x6000);
144	144
145		memory_install_write8_handler(mem_space, 0xc000, 0xffff, 0, 0, SMH_BANK4);
	145	memory_install_write8_handler(mem_space, 0xc000, 0xffff, 0, 0, SMH_BANK(4));
146	146	memory_set_bankptr(space->machine, 4, mess_ram + 0xc000);
147	147
148	148	}
r4679	r4680
155	155	memory_install_write8_handler(mem_space, 0x4000, 0x5fff, 0, 0, SMH_UNMAP);
156	156	memory_set_bankptr(space->machine, 2, memory_region(space->machine, "maincpu") + 0x10000);
157	157	} else {
158		memory_install_write8_handler(mem_space, 0x4000, 0x5fff, 0, 0, SMH_BANK2);
	158	memory_install_write8_handler(mem_space, 0x4000, 0x5fff, 0, 0, SMH_BANK(2));
159	159	memory_set_bankptr(space->machine, 2, mess_ram + 0x4000);
160	160	}
161	161

src/mess/machine/comx35.c

r4679	r4680
370	370	break;
371	371
372	372	case BANK_FLOPPY:
373		memory_install_readwrite8_handler(program, 0xc000, 0xdfff, 0, 0, SMH_BANK1, SMH_UNMAP);
	373	memory_install_readwrite8_handler(program, 0xc000, 0xdfff, 0, 0, SMH_BANK(1), SMH_UNMAP);
374	374	break;
375	375
376	376	case BANK_PRINTER_PARALLEL:
377		memory_install_readwrite8_handler(program, 0xc000, 0xc7ff, 0, 0, SMH_BANK1, SMH_UNMAP);
	377	memory_install_readwrite8_handler(program, 0xc000, 0xc7ff, 0, 0, SMH_BANK(1), SMH_UNMAP);
378	378	memory_install_readwrite8_handler(program, 0xc800, 0xdfff, 0, 0, SMH_UNMAP, SMH_UNMAP);
379	379	break;
380	380
381	381	case BANK_PRINTER_PARALLEL_FM:
382		memory_install_readwrite8_handler(program, 0xc000, 0xcfff, 0, 0, SMH_BANK1, SMH_UNMAP);
	382	memory_install_readwrite8_handler(program, 0xc000, 0xcfff, 0, 0, SMH_BANK(1), SMH_UNMAP);
383	383	memory_install_readwrite8_handler(program, 0xd000, 0xdfff, 0, 0, SMH_UNMAP, SMH_UNMAP);
384	384	break;
385	385
386	386	case BANK_PRINTER_SERIAL:
387		memory_install_readwrite8_handler(program, 0xc000, 0xc7ff, 0, 0, SMH_BANK1, SMH_UNMAP);
	387	memory_install_readwrite8_handler(program, 0xc000, 0xc7ff, 0, 0, SMH_BANK(1), SMH_UNMAP);
388	388	memory_install_readwrite8_handler(program, 0xc800, 0xdfff, 0, 0, SMH_UNMAP, SMH_UNMAP);
389	389	break;
390	390
391	391	case BANK_PRINTER_THERMAL:
392		memory_install_readwrite8_handler(program, 0xc000, 0xcfff, 0, 0, SMH_BANK1, SMH_UNMAP);
	392	memory_install_readwrite8_handler(program, 0xc000, 0xcfff, 0, 0, SMH_BANK(1), SMH_UNMAP);
393	393	memory_install_readwrite8_handler(program, 0xd000, 0xdfff, 0, 0, SMH_UNMAP, SMH_UNMAP);
394	394	break;
395	395
r4679	r4680
401	401	{
402	402	const device_config *mc6845 = devtag_get_device(machine, MC6845_TAG);
403	403
404		memory_install_readwrite8_handler(program, 0xc000, 0xc7ff, 0, 0, SMH_BANK1, SMH_UNMAP); // ROM
	404	memory_install_readwrite8_handler(program, 0xc000, 0xc7ff, 0, 0, SMH_BANK(1), SMH_UNMAP); // ROM
405	405	memory_install_readwrite8_handler(program, 0xc800, 0xcfff, 0, 0, SMH_UNMAP, SMH_UNMAP);
406	406	memory_install_readwrite8_handler(program, 0xd000, 0xd7ff, 0, 0, comx35_videoram_r, comx35_videoram_w);
407	407	memory_install_readwrite8_device_handler(program, mc6845, 0xd800, 0xd800, 0, 0, SMH_UNMAP, mc6845_address_w);
r4679	r4680
414	414	{
415	415	bank = BANK_RAMCARD + state->rambank;
416	416
417		memory_install_readwrite8_handler(program, 0xc000, 0xdfff, 0, 0, SMH_BANK1, SMH_BANK1);
	417	memory_install_readwrite8_handler(program, 0xc000, 0xdfff, 0, 0, SMH_BANK(1), SMH_BANK(1));
418	418	}
419	419	break;
420	420	}
r4679	r4680
569	569
570	570	/* BASIC ROM banking */
571	571
572		memory_install_readwrite8_handler(program, 0x1000, 0x17ff, 0, 0, SMH_BANK2, SMH_UNMAP);
	572	memory_install_readwrite8_handler(program, 0x1000, 0x17ff, 0, 0, SMH_BANK(2), SMH_UNMAP);
573	573	memory_configure_bank(machine, 2, 0, 1, memory_region(machine, CDP1802_TAG) + 0x1000, 0); // normal ROM
574	574	memory_configure_bank(machine, 2, 1, 1, memory_region(machine, CDP1802_TAG) + 0xe000, 0); // expansion box ROM
575	575
r4679	r4680
578	578
579	579	if (expansion_box_installed(machine))
580	580	{
581		memory_install_readwrite8_handler(program, 0xe000, 0xefff, 0, 0, SMH_BANK3, SMH_UNMAP);
	581	memory_install_readwrite8_handler(program, 0xe000, 0xefff, 0, 0, SMH_BANK(3), SMH_UNMAP);
582	582	memory_set_bank(machine, 2, 1);
583	583	}
584	584	else

src/mess/machine/z1013.c

r4679	r4680
58	58
59	59	SNAPSHOT_LOAD( z1013 )
60	60	{
61		UINT8* data= auto_malloc(snapshot_size);
	61	UINT8* data= auto_alloc_array(image->machine, UINT8, snapshot_size);
62	62	UINT16 startaddr,endaddr,runaddr;
63	63
64	64	image_fread(image, data, snapshot_size);

src/mess/machine/trs80.c

r4679	r4680
602	602	else
603	603	{
604	604	memory_install_readwrite8_handler (mem, 0x0000, 0x3fff, 0, 0, SMH_UNMAP, SMH_UNMAP);
605		memory_install_read8_handler (mem, 0x0000, 0x2fff, 0, 0, SMH_BANK1);
	605	memory_install_read8_handler (mem, 0x0000, 0x2fff, 0, 0, SMH_BANK(1));
606	606	memory_set_bankptr(mem->machine, 1, memory_region(mem->machine, "maincpu"));
607	607	memory_install_readwrite8_handler (mem, 0x37e0, 0x37e3, 0, 0, trs80_irq_status_r, trs80_motor_w);
608	608	memory_install_readwrite8_handler (mem, 0x37e8, 0x37eb, 0, 0, trs80_printer_r, trs80_printer_w);

src/mess/machine/odyssey2.c

r4679	r4680
49	49	{
50	50	int i;
51	51	UINT8 *gfx = memory_region(machine, "gfx1");
52		ram        = auto_malloc(256);
	52	ram        = auto_alloc_array(machine, UINT8, 256);
53	53
54	54	for (i = 0; i < 256; i++)
55	55	{

src/mess/machine/primo.c

r4679	r4680
61	61	memory_set_bankptr(machine,1, memory_region(machine, "maincpu")+0x14000);
62	62	break;
63	63	case 0x02:   /* RAM */
64		memory_install_write8_handler(space, 0x0000, 0x3fff, 0, 0, SMH_BANK1);
	64	memory_install_write8_handler(space, 0x0000, 0x3fff, 0, 0, SMH_BANK(1));
65	65	memory_set_bankptr(machine,1, memory_region(machine, "maincpu"));
66	66	break;
67	67	case 0x03:   /* EPROM extension 2 */

src/mess/machine/ti85.c

r4679	r4680
144	144	{
145	145	memory_set_bankptr(machine, 2, ti86_ram + 0x004000*(ti85_memory_page_0x4000&0x07));
146	146	memory_set_bankptr(machine, 6, ti86_ram + 0x004000*(ti85_memory_page_0x4000&0x07));
147		wh = SMH_BANK6;
	147	wh = SMH_BANK(6);
148	148	}
149	149	else
150	150	{
r4679	r4680
157	157	{
158	158	memory_set_bankptr(machine, 3, ti86_ram + 0x004000*(ti86_memory_page_0x8000&0x07));
159	159	memory_set_bankptr(machine, 7, ti86_ram + 0x004000*(ti86_memory_page_0x8000&0x07));
160		wh = SMH_BANK7;
	160	wh = SMH_BANK(7);
161	161	}
162	162	else
163	163	{
r4679	r4680
262	262	ti85_interrupt_speed = 0;
263	263	ti85_port4_bit0 = 0;
264	264
265		ti86_ram = auto_malloc(128*1024);
	265	ti86_ram = auto_alloc_array(machine, UINT8, 128*1024);
266	266	{
267	267	memory_install_write8_handler(space, 0x0000, 0x3fff, 0, 0, SMH_UNMAP);
268	268
r4679	r4680
688	688
689	689	if (file_size != 0)
690	690	{
691		file_data = (UINT8*) auto_malloc(file_size);
	691	file_data = auto_alloc_array(image->machine, UINT8, file_size);
692	692	image_fread(image, file_data, file_size);
693	693
694	694	if(!ti85_convert_file_data_to_serial_stream(file_data, file_size, &ti85_serial_stream, (char*)image->machine->gamedrv->name))

src/mess/machine/svi318.c

r4679	r4680
637	637	cpu_set_input_line_vector(cputag_get_cpu(machine, "maincpu"), 0, 0xff);
638	638
639	639	/* memory */
640		svi.empty_bank = auto_malloc (0x8000);
	640	svi.empty_bank = auto_alloc_array(machine, UINT8, 0x8000);
641	641	memset (svi.empty_bank, 0xff, 0x8000);
642	642	}
643	643

src/mess/machine/galaxy.c

r4679	r4680
137	137	{
138	138	case GALAXY_SNAPSHOT_V1_SIZE:
139	139	case GALAXY_SNAPSHOT_V2_SIZE:
140		snapshot_data = auto_malloc(snapshot_size);
	140	snapshot_data = auto_alloc_array(image->machine, UINT8, snapshot_size);
141	141	break;
142	142	default:
143	143	return INIT_FAIL;
r4679	r4680
158	158	DRIVER_INIT( galaxy )
159	159	{
160	160	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
161		memory_install_read8_handler( space, 0x2800, 0x2800 + mess_ram_size - 1, 0, 0, SMH_BANK1);
162		memory_install_write8_handler(space, 0x2800, 0x2800 + mess_ram_size - 1, 0, 0, SMH_BANK1);
	161	memory_install_read8_handler( space, 0x2800, 0x2800 + mess_ram_size - 1, 0, 0, SMH_BANK(1));
	162	memory_install_write8_handler(space, 0x2800, 0x2800 + mess_ram_size - 1, 0, 0, SMH_BANK(1));
163	163	memory_set_bankptr(machine, 1, mess_ram);
164	164
165	165	if (mess_ram_size < (6 + 48) * 1024)
r4679	r4680
178	178	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
179	179
180	180	/* ROM 2 enable/disable */
181		memory_install_read8_handler(space, 0x1000, 0x1fff, 0, 0, input_port_read(machine, "ROM2") ? SMH_BANK10 : SMH_NOP);
	181	memory_install_read8_handler(space, 0x1000, 0x1fff, 0, 0, input_port_read(machine, "ROM2") ? SMH_BANK(10) : SMH_NOP);
182	182	memory_install_write8_handler(space, 0x1000, 0x1fff, 0, 0, SMH_NOP);
183	183	memory_set_bankptr(machine,10, memory_region(machine, "maincpu") + 0x1000);
184	184
r4679	r4680
206	206	ROM[0x03fa] = 0x00;
207	207	ROM[0x03fb] = 0xe0;
208	208
209		memory_install_read8_handler(space, 0xe000, 0xefff, 0, 0, SMH_BANK11);
	209	memory_install_read8_handler(space, 0xe000, 0xefff, 0, 0, SMH_BANK(11));
210	210	memory_install_write8_handler(space, 0xe000, 0xefff, 0, 0, SMH_NOP);
211	211	memory_set_bankptr(machine,11, memory_region(machine, "maincpu") + 0xe000);
212	212	galaxy_interrupts_enabled = TRUE;

src/mess/machine/vtech2.c

r4679	r4680
82	82	/* read banked memory (plain ROM/RAM) */
83	83	static const read8_space_func mra_bank_hard[4] =
84	84	{
85		SMH_BANK1,  /* mapped in 0000-3fff */
86		SMH_BANK2,  /* mapped in 4000-7fff */
87		SMH_BANK3,  /* mapped in 8000-bfff */
88		SMH_BANK4   /* mapped in c000-ffff */
	85	SMH_BANK(1),  /* mapped in 0000-3fff */
	86	SMH_BANK(2),  /* mapped in 4000-7fff */
	87	SMH_BANK(3),  /* mapped in 8000-bfff */
	88	SMH_BANK(4)   /* mapped in c000-ffff */
89	89	};
90	90
91	91	/* write banked memory (plain ROM/RAM) */
92	92	static const write8_space_func mwa_bank_hard[4] =
93	93	{
94		SMH_BANK1,  /* mapped in 0000-3fff */
95		SMH_BANK2,  /* mapped in 4000-7fff */
96		SMH_BANK3,  /* mapped in 8000-bfff */
97		SMH_BANK4   /* mapped in c000-ffff */
	94	SMH_BANK(1),  /* mapped in 0000-3fff */
	95	SMH_BANK(2),  /* mapped in 4000-7fff */
	96	SMH_BANK(3),  /* mapped in 8000-bfff */
	97	SMH_BANK(4)   /* mapped in c000-ffff */
98	98	};
99	99
100	100	DRIVER_INIT(laser)

src/mess/machine/wswan.c

r4679	r4680
217	217	}
218	218	}
219	219
220		static void wswan_setup_bios( void )
	220	static void wswan_setup_bios( running_machine *machine )
221	221	{
222	222	if ( ws_bios_bank == NULL )
223	223	{
224		ws_bios_bank = auto_malloc( 0x10000 );
	224	ws_bios_bank = auto_alloc_array(machine, UINT8, 0x10000 );
225	225	memcpy( ws_bios_bank + 0xffc0, ws_fake_bios_code, 0x40 );
226	226	}
227	227	}
r4679	r4680
244	244	{
245	245	const address_space *space = cputag_get_address_space( machine, "maincpu", ADDRESS_SPACE_PROGRAM );
246	246
247		wswan_setup_bios();
	247	wswan_setup_bios(machine);
248	248
249	249	/* Intialize ports */
250	250	memcpy( ws_portram, ws_portram_init, 256 );
r4679	r4680
1379	1379
1380	1380	for( ii = 0; ii < ROMBanks; ii++ )
1381	1381	{
1382		if( (ROMMap[ii] = auto_malloc( 0x10000 )) )
	1382	if( (ROMMap[ii] = auto_alloc_array(image->machine, UINT8, 0x10000 )) )
1383	1383	{
1384	1384	if( image_fread( image, ROMMap[ii], 0x10000 ) != 0x10000 )
1385	1385	{
r4679	r4680
1427	1427
1428	1428	if ( eeprom.size != 0 )
1429	1429	{
1430		eeprom.data = auto_malloc( eeprom.size );
	1430	eeprom.data = auto_alloc_array(image->machine, UINT8, eeprom.size );
1431	1431	image_battery_load( image, eeprom.data, eeprom.size );
1432	1432	eeprom.page = eeprom.data;
1433	1433	}

src/mess/machine/zx.c

r4679	r4680
51	51	{
52	52	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
53	53
54		memory_install_readwrite8_handler(space, 0x4000, 0x4000 + mess_ram_size - 1, 0, 0, SMH_BANK1, zx_ram_w);
	54	memory_install_readwrite8_handler(space, 0x4000, 0x4000 + mess_ram_size - 1, 0, 0, SMH_BANK(1), zx_ram_w);
55	55	memory_set_bankptr(machine, 1, memory_region(machine, "maincpu") + 0x4000);
56	56	}
57	57

src/mess/machine/nec765.c

r4679	r4680
2263	2263	fdc->command_timer = timer_alloc(device->machine, nec765_continue_command, (void*)device);
2264	2264
2265	2265	fdc->nec765_flags &= NEC765_FDD_READY;
2266		fdc->data_buffer = auto_malloc(32*1024);
	2266	fdc->data_buffer = auto_alloc_array(device->machine, char, 32*1024);
2267	2267
2268	2268
2269	2269	// register for state saving

src/mess/machine/apple2gs.c

r4679	r4680
1658	1658	apple2_memmap_config cfg;
1659	1659
1660	1660	/* allocate memory for E00000-E1FFFF */
1661		apple2gs_slowmem = auto_malloc(128*1024);
1662		memset(apple2gs_slowmem, 0, 128*1024);
	1661	apple2gs_slowmem = auto_alloc_array_clear(machine, UINT8, 128*1024);
1663	1662
1664	1663	state_save_register_item_array(machine, "APPLE2GS_SLOWMEM", NULL, 0, apple2gs_slowmem);
1665	1664
1666	1665	/* install expanded memory */
1667		memory_install_read8_handler(space, 0x010000, mess_ram_size - 1, 0, 0, SMH_BANK1);
1668		memory_install_write8_handler(space, 0x010000, mess_ram_size - 1, 0, 0, SMH_BANK1);
	1666	memory_install_read8_handler(space, 0x010000, mess_ram_size - 1, 0, 0, SMH_BANK(1));
	1667	memory_install_write8_handler(space, 0x010000, mess_ram_size - 1, 0, 0, SMH_BANK(1));
1669	1668	memory_set_bankptr(machine,1, mess_ram + 0x010000);
1670	1669
1671	1670	/* install hi memory */
1672		memory_install_read8_handler(space, 0xe00000, 0xe1ffff, 0, 0, SMH_BANK2);
	1671	memory_install_read8_handler(space, 0xe00000, 0xe1ffff, 0, 0, SMH_BANK(2));
1673	1672	memory_install_write8_handler(space, 0xe00000, 0xe1ffff, 0, 0, apple2gs_slowmem_w);
1674	1673	memory_install_write8_handler(space, 0xe00400, 0xe007ff, 0, 0, apple2gs_E004xx_w);
1675	1674	memory_install_write8_handler(space, 0xe02000, 0xe03fff, 0, 0, apple2gs_E02xxx_w);
r4679	r4680
1680	1679	/* install alternate ROM bank */
1681	1680	begin = 0x1000000 - memory_region_length(machine, "maincpu");
1682	1681	end = 0xffffff;
1683		memory_install_read8_handler(space, begin, end, 0, 0, SMH_BANK3);
	1682	memory_install_read8_handler(space, begin, end, 0, 0, SMH_BANK(3));
1684	1683	memory_set_bankptr(machine,3, memory_region(machine, "maincpu"));
1685	1684
1686	1685	/* install new xxC000-xxCFFF handlers */
r4679	r4680
1739	1738	apple2_init_common(machine);
1740	1739
1741	1740	/* set up Apple IIgs vectoring */
1742		device_set_info_fct(cputag_get_cpu(machine, "maincpu"), CPUINFO_FCT_G65816_READVECTOR_CALLBACK, (genf *) apple2gs_read_vector);
	1741	g65816_set_read_vector_callback(cputag_get_cpu(machine, "maincpu"), apple2gs_read_vector);
1743	1742
1744	1743	/* setup globals */
1745	1744	apple2gs_cur_slot6_image = NULL;

src/mess/machine/mpc105.c

r4679	r4680
207	207
208	208
209	209
210		void mpc105_init(int bank_base)
	210	void mpc105_init(running_machine *machine, int bank_base)
211	211	{
212	212	/* setup PCI */
213		mpc105 = (struct mpc105_info *) auto_malloc(sizeof(*mpc105));
	213	mpc105 = auto_alloc(machine, struct mpc105_info);
214	214	memset(mpc105, '\0', sizeof(*mpc105));
215	215	mpc105->bank_base = bank_base;
216	216	}

src/mess/machine/mpc105.h

r4679	r4680
11	11
12	12	#define MPC105_MEMORYBANK_COUNT      8
13	13
14		void mpc105_init(int bank_base);
	14	void mpc105_init(running_machine *machine, int bank_base);
15	15	UINT32 mpc105_pci_read(const device_config *busdevice, const device_config *device, int function, int offset, UINT32 mem_mask);
16	16	void mpc105_pci_write(const device_config *busdevice, const device_config *device, int function, int offset, UINT32 data, UINT32 mem_mask);
17	17

src/mess/machine/i8271.c

r4679	r4680
1561	1561	i8271->data_timer = timer_alloc(device->machine, i8271_data_timer_callback, (void *)device);
1562	1562	i8271->command_complete_timer = timer_alloc(device->machine, i8271_timed_command_complete_callback, (void *)device);
1563	1563	i8271->drive = 0;
1564		i8271->pExecutionPhaseData = auto_malloc(0x4000);
	1564	i8271->pExecutionPhaseData = auto_alloc_array(device->machine, char, 0x4000);
1565	1565
1566	1566	// register for state saving
1567	1567	//state_save_register_item(device->machine, "i8271", device->tag, 0, i8271->number);

src/mess/machine/nes.c

r4679	r4680
82	82
83	83	/* Brutal hack put in as a consequence of the new memory system; we really
84	84	* need to fix the NES code */
85		memory_install_read8_handler(space, 0x0000, 0x07ff, 0, 0x1800, SMH_BANK10);
86		memory_install_write8_handler(space, 0x0000, 0x07ff, 0, 0x1800, SMH_BANK10);
	85	memory_install_read8_handler(space, 0x0000, 0x07ff, 0, 0x1800, SMH_BANK(10));
	86	memory_install_write8_handler(space, 0x0000, 0x07ff, 0, 0x1800, SMH_BANK(10));
87	87	memory_set_bankptr(machine, 10, nes.rom);
88	88
89	89	nes_battery_ram = nes.wram;
r4679	r4680
97	97	if we are loading a cart image identified as mapper 20 (probably wrong mapper...) we need to alloc
98	98	memory for the bank 2 pointer */
99	99	if (nes_fds.data == NULL)
100		nes_fds.data = auto_malloc( 0x8000 );
	100	nes_fds.data = auto_alloc_array(machine, UINT8, 0x8000 );
101	101	memory_install_read8_handler(space, 0x4030, 0x403f, 0, 0, fds_r);
102		memory_install_read8_handler(space, 0x6000, 0xdfff, 0, 0, SMH_BANK2);
103		memory_install_read8_handler(space, 0xe000, 0xffff, 0, 0, SMH_BANK1);
	102	memory_install_read8_handler(space, 0x6000, 0xdfff, 0, 0, SMH_BANK(2));
	103	memory_install_read8_handler(space, 0xe000, 0xffff, 0, 0, SMH_BANK(1));
104	104
105	105	memory_install_write8_handler(space, 0x4020, 0x402f, 0, 0, fds_w);
106		memory_install_write8_handler(space, 0x6000, 0xdfff, 0, 0, SMH_BANK2);
	106	memory_install_write8_handler(space, 0x6000, 0xdfff, 0, 0, SMH_BANK(2));
107	107
108	108	memory_set_bankptr(machine, 1, &nes.rom[0xe000]);
109	109	memory_set_bankptr(machine, 2, nes_fds.data );
r4679	r4680
119	119	break;
120	120	default:
121	121	nes.slow_banking = 0;
122		memory_install_read8_handler(space, 0x6000, 0x7fff, 0, 0, SMH_BANK5);
123		memory_install_read8_handler(space, 0x8000, 0x9fff, 0, 0, SMH_BANK1);
124		memory_install_read8_handler(space, 0xa000, 0xbfff, 0, 0, SMH_BANK2);
125		memory_install_read8_handler(space, 0xc000, 0xdfff, 0, 0, SMH_BANK3);
126		memory_install_read8_handler(space, 0xe000, 0xffff, 0, 0, SMH_BANK4);
	122	memory_install_read8_handler(space, 0x6000, 0x7fff, 0, 0, SMH_BANK(5));
	123	memory_install_read8_handler(space, 0x8000, 0x9fff, 0, 0, SMH_BANK(1));
	124	memory_install_read8_handler(space, 0xa000, 0xbfff, 0, 0, SMH_BANK(2));
	125	memory_install_read8_handler(space, 0xc000, 0xdfff, 0, 0, SMH_BANK(3));
	126	memory_install_read8_handler(space, 0xe000, 0xffff, 0, 0, SMH_BANK(4));
127	127
128	128	memory_install_write8_handler(space, 0x6000, 0x7fff, 0, 0, nes_mid_mapper_w);
129	129	memory_install_write8_handler(space, 0x8000, 0xffff, 0, 0, nes_mapper_w);

src/mess/machine/msx.c

r4679	r4680
262	262	state->sramfile = sramfile;
263	263	}
264	264
265		if (msx_slot_list[type].init (state, 0, mem, size_aligned)) {
	265	if (msx_slot_list[type].init (image->machine, state, 0, mem, size_aligned)) {
266	266	return INIT_FAIL;
267	267	}
268	268	if (msx_slot_list[type].loadsram) {
r4679	r4680
824	824	slot_state *st;
825	825	UINT8 *mem = NULL;
826	826
827		msx1.empty = (UINT8*)auto_malloc (0x4000);
	827	msx1.empty = auto_alloc_array(machine, UINT8, 0x4000);
828	828	memset (msx1.empty, 0xff, 0x4000);
829	829
830	830	for (prim=0; prim<4; prim++) {
r4679	r4680
912	912	mem = NULL;
913	913	break;
914	914	}
915		st = (slot_state*)auto_malloc (sizeof (slot_state));
	915	st = auto_alloc_clear (machine, slot_state);
916	916	memset (st, 0, sizeof (slot_state));
917	917
918		if (slot->init (st, layout->slot_page, mem, size)) {
	918	if (slot->init (machine, st, layout->slot_page, mem, size)) {
919	919	continue;
920	920	}
921	921	}

src/mess/machine/mz700.c

r4679	r4680
88	88	mz->mz700_mode = TRUE;
89	89
90	90	videoram_size = 0x800;
91		videoram = auto_malloc(videoram_size);
92		colorram = auto_malloc(0x800);
	91	videoram = auto_alloc_array(machine, UINT8, videoram_size);
	92	colorram = auto_alloc_array(machine, UINT8, 0x800);
93	93	}
94	94
95	95	DRIVER_INIT( mz800 )
r4679	r4680
100	100
101	101	/* video ram */
102	102	videoram_size = 0x4000;
103		videoram = auto_malloc(videoram_size);
	103	videoram = auto_alloc_array(machine, UINT8, videoram_size);
104	104	colorram = videoram + 0x800;
105	105
106	106	/* character generator ram */
107		mz->cgram = auto_malloc(0x1000);
	107	mz->cgram = auto_alloc_array(machine, UINT8, 0x1000);
108	108	}
109	109
110	110	MACHINE_START( mz700 )

src/mess/machine/lisa.c

r4679	r4680
1101	1101	lisa_features.has_double_sided_floppy = 0;
1102	1102	lisa_features.has_mac_xl_video = 0;
1103	1103
1104		bad_parity_table = auto_malloc(0x40000);  /* 1 bit per byte of CPU RAM */
	1104	bad_parity_table = auto_alloc_array(machine, UINT8, 0x40000);  /* 1 bit per byte of CPU RAM */
1105	1105	}
1106	1106
1107	1107	DRIVER_INIT( lisa210 )
r4679	r4680
1114	1114	lisa_features.has_double_sided_floppy = 0;
1115	1115	lisa_features.has_mac_xl_video = 0;
1116	1116
1117		bad_parity_table = auto_malloc(0x40000);  /* 1 bit per byte of CPU RAM */
	1117	bad_parity_table = auto_alloc_array(machine, UINT8, 0x40000);  /* 1 bit per byte of CPU RAM */
1118	1118	}
1119	1119
1120	1120	DRIVER_INIT( mac_xl )
r4679	r4680
1127	1127	lisa_features.has_double_sided_floppy = 0;
1128	1128	lisa_features.has_mac_xl_video = 1;
1129	1129
1130		bad_parity_table = auto_malloc(0x40000);  /* 1 bit per byte of CPU RAM */
	1130	bad_parity_table = auto_alloc_array(machine, UINT8, 0x40000);  /* 1 bit per byte of CPU RAM */
1131	1131	}
1132	1132
1133	1133	MACHINE_RESET( lisa )
r4679	r4680
1142	1142	memory_set_direct_update_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), lisa_OPbaseoverride);
1143	1143	memory_set_direct_update_handler(cputag_get_address_space(machine, "fdccpu",  ADDRESS_SPACE_PROGRAM), lisa_fdc_OPbaseoverride);
1144	1144
1145		devtag_set_info_fct(machine, "maincpu", CPUINFO_FCT_M68K_RESET_CALLBACK, (genf *)/*lisa_reset_instr_callback*/NULL);
	1145	m68k_set_reset_callback(devtag_get_device(machine, "maincpu"), /*lisa_reset_instr_callback*/NULL);
1146	1146
1147	1147	/* init MMU */
1148	1148

src/mess/machine/sym1.c

r4679	r4680
193	193	logerror("SYM1 VIA2 W 0x%02x\n", data);
194	194
195	195	memory_install_write8_handler(cpu0space, 0xa600, 0xa67f, 0, 0,
196		((input_port_read(device->machine, "WP") & 0x01) && !(data & 0x01)) ? SMH_NOP : SMH_BANK5);
	196	((input_port_read(device->machine, "WP") & 0x01) && !(data & 0x01)) ? SMH_NOP : SMH_BANK(5));
197	197
198	198	memory_install_write8_handler(cpu0space, 0x0400, 0x07ff, 0, 0,
199		((input_port_read(device->machine, "WP") & 0x02) && !(data & 0x02)) ? SMH_NOP : SMH_BANK2);
	199	((input_port_read(device->machine, "WP") & 0x02) && !(data & 0x02)) ? SMH_NOP : SMH_BANK(2));
200	200
201	201	memory_install_write8_handler(cpu0space, 0x0800, 0x0bff, 0, 0,
202		((input_port_read(device->machine, "WP") & 0x04) && !(data & 0x04)) ? SMH_NOP : SMH_BANK3);
	202	((input_port_read(device->machine, "WP") & 0x04) && !(data & 0x04)) ? SMH_NOP : SMH_BANK(3));
203	203
204	204	memory_install_write8_handler(cpu0space, 0x0c00, 0x0fff, 0, 0,
205		((input_port_read(device->machine, "WP") & 0x08) && !(data & 0x08)) ? SMH_NOP : SMH_BANK4);
	205	((input_port_read(device->machine, "WP") & 0x08) && !(data & 0x08)) ? SMH_NOP : SMH_BANK(4));
206	206	}
207	207
208	208
r4679	r4680
285	285	/* make 0xf800 to 0xffff point to the last half of the monitor ROM
286	286	so that the CPU can find its reset vectors */
287	287	memory_install_readwrite8_handler(cputag_get_address_space( machine, "maincpu", ADDRESS_SPACE_PROGRAM ),
288		0xf800, 0xffff, 0, 0, SMH_BANK1, SMH_NOP);
	288	0xf800, 0xffff, 0, 0, SMH_BANK(1), SMH_NOP);
289	289	memory_set_bankptr(machine, 1, sym1_monitor + 0x800);
290	290	device_reset(cputag_get_cpu(machine, "maincpu"));
291	291	}

src/mess/machine/lynx.c

r4679	r4680
1795	1795	* when these are safe in the cpu */
1796	1796	lynx_memory_config = data;
1797	1797
1798		memory_install_read8_handler(space, 0xfc00, 0xfcff, 0, 0, (data & 1) ? SMH_BANK1 : suzy_read);
1799		memory_install_write8_handler(space, 0xfc00, 0xfcff, 0, 0, (data & 1) ? SMH_BANK1 : suzy_write);
1800		memory_install_read8_handler(space, 0xfd00, 0xfdff, 0, 0, (data & 2) ? SMH_BANK2 : mikey_read);
1801		memory_install_write8_handler(space, 0xfd00, 0xfdff, 0, 0, (data & 2) ? SMH_BANK2 : mikey_write);
	1798	memory_install_read8_handler(space, 0xfc00, 0xfcff, 0, 0, (data & 1) ? SMH_BANK(1) : suzy_read);
	1799	memory_install_write8_handler(space, 0xfc00, 0xfcff, 0, 0, (data & 1) ? SMH_BANK(1) : suzy_write);
	1800	memory_install_read8_handler(space, 0xfd00, 0xfdff, 0, 0, (data & 2) ? SMH_BANK(2) : mikey_read);
	1801	memory_install_write8_handler(space, 0xfd00, 0xfdff, 0, 0, (data & 2) ? SMH_BANK(2) : mikey_write);
1802	1802
1803	1803	if (data & 1)
1804	1804	memory_set_bankptr(space->machine, 1, lynx_mem_fc00);

src/mess/machine/cgenie.c

r4679	r4680
132	132	{
133	133	if ( input_port_read(machine, "DSW0") & 0x80 )
134	134	{
135		memory_install_read8_handler(space, 0xc000, 0xdfff, 0, 0, SMH_BANK10);
	135	memory_install_read8_handler(space, 0xc000, 0xdfff, 0, 0, SMH_BANK(10));
136	136	memory_install_write8_handler(space, 0xc000, 0xdfff, 0, 0, SMH_NOP);
137	137	memory_set_bankptr(machine, 10, &ROM[0x0c000]);
138	138	logerror("cgenie DOS enabled\n");
r4679	r4680
198	198	memset(gfx + i * 8, i, 8);
199	199
200	200	/* set up RAM */
201		memory_install_read8_handler(space, 0x4000, 0x4000 + mess_ram_size - 1, 0, 0, SMH_BANK1);
	201	memory_install_read8_handler(space, 0x4000, 0x4000 + mess_ram_size - 1, 0, 0, SMH_BANK(1));
202	202	memory_install_write8_handler(space, 0x4000, 0x4000 + mess_ram_size - 1, 0, 0, cgenie_videoram_w);
203	203	videoram = mess_ram;
204	204	memory_set_bankptr(machine, 1, mess_ram);

src/mess/machine/ondra.c

r4679	r4680
51	51	memory_install_write8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x0000, 0x3fff, 0, 0, SMH_UNMAP);
52	52	memory_set_bankptr(machine, 1, mem + 0x010000);
53	53	} else {
54		memory_install_write8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x0000, 0x3fff, 0, 0, SMH_BANK1);
	54	memory_install_write8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x0000, 0x3fff, 0, 0, SMH_BANK(1));
55	55	memory_set_bankptr(machine, 1, mess_ram + 0x0000);
56	56	}
57	57	memory_set_bankptr(machine, 2, mess_ram + 0x4000);
58	58	if (ondra_bank2_status==0) {
59		memory_install_write8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xe000, 0xffff, 0, 0, SMH_BANK3);
60		memory_install_read8_handler (cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xe000, 0xffff, 0, 0, SMH_BANK3);
	59	memory_install_write8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xe000, 0xffff, 0, 0, SMH_BANK(3));
	60	memory_install_read8_handler (cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xe000, 0xffff, 0, 0, SMH_BANK(3));
61	61	memory_set_bankptr(machine, 3, mess_ram + 0xe000);
62	62	} else {
63	63	memory_install_write8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xe000, 0xffff, 0, 0, SMH_UNMAP);

src/mess/machine/kaypro.c

r4679	r4680
55	55	if (data & 0x80)
56	56	{
57	57	memory_install_readwrite8_handler (mem, 0x0000, 0x3fff, 0, 0, SMH_UNMAP, SMH_UNMAP);
58		memory_install_read8_handler (mem, 0x0000, 0x0fff, 0, 0, SMH_BANK1);
	58	memory_install_read8_handler (mem, 0x0000, 0x0fff, 0, 0, SMH_BANK(1));
59	59	memory_set_bankptr(mem->machine, 1, memory_region(mem->machine, "maincpu"));
60	60	memory_install_readwrite8_handler (mem, 0x3000, 0x3fff, 0, 0, kaypro_videoram_r, kaypro_videoram_w);
61	61	}
62	62	else
63	63	{
64	64	memory_install_readwrite8_handler (mem, 0x0000, 0x3fff, 0, 0, SMH_UNMAP, SMH_UNMAP);
65		memory_install_readwrite8_handler (mem, 0x0000, 0x3fff, 0, 0, SMH_BANK2, SMH_BANK3);
	65	memory_install_readwrite8_handler (mem, 0x0000, 0x3fff, 0, 0, SMH_BANK(2), SMH_BANK(3));
66	66	memory_set_bankptr(mem->machine, 2, memory_region(mem->machine, "rambank"));
67	67	memory_set_bankptr(mem->machine, 3, memory_region(mem->machine, "rambank"));
68	68	}
r4679	r4680
163	163	if (data & 0x80)
164	164	{
165	165	memory_install_readwrite8_handler (mem, 0x0000, 0x3fff, 0, 0, SMH_UNMAP, SMH_UNMAP);
166		memory_install_read8_handler (mem, 0x0000, 0x1fff, 0, 0, SMH_BANK1);
	166	memory_install_read8_handler (mem, 0x0000, 0x1fff, 0, 0, SMH_BANK(1));
167	167	memory_set_bankptr(mem->machine, 1, memory_region(mem->machine, "maincpu"));
168	168	}
169	169	else
170	170	{
171	171	memory_install_readwrite8_handler (mem, 0x0000, 0x3fff, 0, 0, SMH_UNMAP, SMH_UNMAP);
172		memory_install_readwrite8_handler (mem, 0x0000, 0x3fff, 0, 0, SMH_BANK2, SMH_BANK3);
	172	memory_install_readwrite8_handler (mem, 0x0000, 0x3fff, 0, 0, SMH_BANK(2), SMH_BANK(3));
173	173	memory_set_bankptr(mem->machine, 2, memory_region(mem->machine, "rambank"));
174	174	memory_set_bankptr(mem->machine, 3, memory_region(mem->machine, "rambank"));
175	175	}

src/mess/machine/pc_turbo.c

r4679	r4680
42	42	{
43	43	struct pc_turbo_info *ti;
44	44
45		ti = auto_malloc(sizeof(struct pc_turbo_info));
	45	ti = auto_alloc(machine, struct pc_turbo_info);
46	46	ti->cpunum = cpunum;
47	47	ti->port = port;
48	48	ti->mask = mask;

src/mess/machine/i82439tx.c

r4679	r4680
213	213	void intel82439tx_init(running_machine *machine)
214	214	{
215	215	/* setup PCI */
216		i82439tx = auto_malloc(sizeof(*i82439tx));
	216	i82439tx = auto_alloc(machine, struct intel82439tx_info);
217	217	memset(i82439tx, 0, sizeof(*i82439tx));
218	218	i82439tx->regs[0x00] = 0x14020000;
219	219	i82439tx->regs[0x01] = 0x01520000;

src/mess/machine/lviv.c

r4679	r4680
168	168	{
169	169	startup_mem_map = 0;
170	170
171		memory_install_write8_handler(cpuspace, 0x0000, 0x3fff, 0, 0, SMH_BANK1);
172		memory_install_write8_handler(cpuspace, 0x4000, 0x7fff, 0, 0, SMH_BANK2);
173		memory_install_write8_handler(cpuspace, 0x8000, 0xbfff, 0, 0, SMH_BANK3);
	171	memory_install_write8_handler(cpuspace, 0x0000, 0x3fff, 0, 0, SMH_BANK(1));
	172	memory_install_write8_handler(cpuspace, 0x4000, 0x7fff, 0, 0, SMH_BANK(2));
	173	memory_install_write8_handler(cpuspace, 0x8000, 0xbfff, 0, 0, SMH_BANK(3));
174	174	memory_install_write8_handler(cpuspace, 0xC000, 0xffff, 0, 0, SMH_UNMAP);
175	175
176	176	memory_set_bankptr(space->machine,1, mess_ram);

src/mess/machine/pc8801.c

r4679	r4680
400	400	else
401	401	{
402	402	/* r/w mode */
403		memory_install_write8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x0000, 0x5fff, 0, 0, SMH_BANK1);
404		memory_install_write8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x6000, 0x7fff, 0, 0, SMH_BANK2);
	403	memory_install_write8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x0000, 0x5fff, 0, 0, SMH_BANK(1));
	404	memory_install_write8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x6000, 0x7fff, 0, 0, SMH_BANK(2));
405	405	if(ext_w!=ext_r) logerror("differnt between read and write bank of extension memory.\n");
406	406	}
407	407	}
r4679	r4680
411	411	if(RAMmode)
412	412	{
413	413	/* RAM */
414		memory_install_write8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x0000, 0x5fff, 0, 0, SMH_BANK1);
415		memory_install_write8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x6000, 0x7fff, 0, 0, SMH_BANK2);
	414	memory_install_write8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x0000, 0x5fff, 0, 0, SMH_BANK(1));
	415	memory_install_write8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x6000, 0x7fff, 0, 0, SMH_BANK(2));
416	416	memory_set_bankptr(machine, 1, pc8801_mainRAM + 0x0000);
417	417	memory_set_bankptr(machine, 2, pc8801_mainRAM + 0x6000);
418	418	}
r4679	r4680
443	443	}
444	444
445	445	/* 0x8000 to 0xffff */
446		memory_install_read8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x8000, 0x83ff, 0, 0, (RAMmode || ROMmode) ? SMH_BANK3 : pc8801_read_textwindow);
447		memory_install_write8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x8000, 0x83ff, 0, 0, (RAMmode || ROMmode) ? SMH_BANK3 : pc8801_write_textwindow);
	446	memory_install_read8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x8000, 0x83ff, 0, 0, (RAMmode || ROMmode) ? SMH_BANK(3) : pc8801_read_textwindow);
	447	memory_install_write8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x8000, 0x83ff, 0, 0, (RAMmode || ROMmode) ? SMH_BANK(3) : pc8801_write_textwindow);
448	448
449	449	memory_set_bankptr(machine, 4, pc8801_mainRAM + 0x8400);
450	450
r4679	r4680
455	455	}
456	456	else
457	457	{
458		memory_install_read8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xc000, 0xefff, 0, 0, SMH_BANK5);
459		memory_install_write8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xc000, 0xefff, 0, 0, SMH_BANK5);
460		memory_install_read8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xf000, 0xffff, 0, 0, SMH_BANK6);
461		memory_install_write8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xf000, 0xffff, 0, 0, SMH_BANK6);
	458	memory_install_read8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xc000, 0xefff, 0, 0, SMH_BANK(5));
	459	memory_install_write8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xc000, 0xefff, 0, 0, SMH_BANK(5));
	460	memory_install_read8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xf000, 0xffff, 0, 0, SMH_BANK(6));
	461	memory_install_write8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xf000, 0xffff, 0, 0, SMH_BANK(6));
462	462
463	463	memory_set_bankptr(machine, 5, pc8801_mainRAM + 0xc000);
464	464	if(maptvram)
r4679	r4680
565	565	port71_save=0xff;
566	566	port32_save=0x80;
567	567	mainROM = memory_region(machine, "maincpu");
568		pc8801_mainRAM = (UINT8 *) auto_malloc (0x10000);
	568	pc8801_mainRAM = auto_alloc_array(machine, UINT8, 0x10000);
569	569	memset(pc8801_mainRAM, 0, 0x10000);
570	570
571	571	extmem_ctrl[0]=extmem_ctrl[1]=0;
r4679	r4680
631	631	return;
632	632	}
633	633	if(num80!=0 || num88!=0 || numIO!=0) {
634		extRAM=malloc_or_die(num80*0x8000+num88*0x20000+numIO*0x100000);
	634	extRAM=alloc_array_or_die(UINT8, num80*0x8000+num88*0x20000+numIO*0x100000);
635	635	e=extRAM;
636	636	for(i=0;i<num80;i++) {
637	637	ext_bank_80[i]=e;

src/mess/machine/mc10.c

r4679	r4680
43	43	mc10_keyboard_strobe = 0x00;
44	44
45	45	memory_install_readwrite8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM),
46		0x4000,   0x4000 + mess_ram_size - 1,   0, 0, SMH_BANK1, SMH_BANK1);
	46	0x4000,   0x4000 + mess_ram_size - 1,   0, 0, SMH_BANK(1), SMH_BANK(1));
47	47	memory_set_bankptr(machine, 1, mess_ram);
48	48
49	49	state_save_register_global(machine, mc10_bfff);

src/mess/machine/partner.c

r4679	r4680
166	166	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
167	167	UINT8 *rom = memory_region(machine, "maincpu");
168	168
169		memory_install_write8_handler(space, 0x0000, 0x07ff, 0, 0, SMH_BANK1);
170		memory_install_write8_handler(space, 0x0800, 0x3fff, 0, 0, SMH_BANK2);
171		memory_install_write8_handler(space, 0x4000, 0x5fff, 0, 0, SMH_BANK3);
172		memory_install_write8_handler(space, 0x6000, 0x7fff, 0, 0, SMH_BANK4);
173		memory_install_write8_handler(space, 0x8000, 0x9fff, 0, 0, SMH_BANK5);
174		memory_install_write8_handler(space, 0xa000, 0xb7ff, 0, 0, SMH_BANK6);
175		memory_install_write8_handler(space, 0xb800, 0xbfff, 0, 0, SMH_BANK7);
176		memory_install_write8_handler(space, 0xc000, 0xc7ff, 0, 0, SMH_BANK8);
177		memory_install_write8_handler(space, 0xc800, 0xcfff, 0, 0, SMH_BANK9);
178		memory_install_write8_handler(space, 0xd000, 0xd7ff, 0, 0, SMH_BANK10);
	169	memory_install_write8_handler(space, 0x0000, 0x07ff, 0, 0, SMH_BANK(1));
	170	memory_install_write8_handler(space, 0x0800, 0x3fff, 0, 0, SMH_BANK(2));
	171	memory_install_write8_handler(space, 0x4000, 0x5fff, 0, 0, SMH_BANK(3));
	172	memory_install_write8_handler(space, 0x6000, 0x7fff, 0, 0, SMH_BANK(4));
	173	memory_install_write8_handler(space, 0x8000, 0x9fff, 0, 0, SMH_BANK(5));
	174	memory_install_write8_handler(space, 0xa000, 0xb7ff, 0, 0, SMH_BANK(6));
	175	memory_install_write8_handler(space, 0xb800, 0xbfff, 0, 0, SMH_BANK(7));
	176	memory_install_write8_handler(space, 0xc000, 0xc7ff, 0, 0, SMH_BANK(8));
	177	memory_install_write8_handler(space, 0xc800, 0xcfff, 0, 0, SMH_BANK(9));
	178	memory_install_write8_handler(space, 0xd000, 0xd7ff, 0, 0, SMH_BANK(10));
179	179	memory_install_write8_handler(space, 0xdc00, 0xddff, 0, 0, SMH_UNMAP);
180		memory_install_read8_handler (space, 0xdc00, 0xddff, 0, 0, SMH_BANK11);
	180	memory_install_read8_handler (space, 0xdc00, 0xddff, 0, 0, SMH_BANK(11));
181	181	memory_install_write8_handler(space, 0xe000, 0xe7ff, 0, 0, SMH_UNMAP);
182	182	memory_install_write8_handler(space, 0xe800, 0xffff, 0, 0, SMH_UNMAP);
183	183

src/mess/machine/pc_fdc.c

r4679	r4680
104	104	const device_config *img;
105	105
106	106	/* initialize fdc structure */
107		fdc = auto_malloc(sizeof(*fdc));
108		memset(fdc, 0, sizeof(*fdc));
	107	fdc = auto_alloc_clear(machine, struct pc_fdc);
109	108
110	109	/* copy specified interface */
111	110	if (iface)

src/mess/machine/apple1.c

r4679	r4680
147	147	const address_space* space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
148	148	/* Set up the handlers for MESS's dynamically-sized RAM. */
149	149	memory_install_read8_handler(space,
150		0x0000, mess_ram_size - 1, 0, 0, SMH_BANK1);
	150	0x0000, mess_ram_size - 1, 0, 0, SMH_BANK(1));
151	151	memory_install_write8_handler(space,
152		0x0000, mess_ram_size - 1, 0, 0, SMH_BANK1);
	152	0x0000, mess_ram_size - 1, 0, 0, SMH_BANK(1));
153	153	memory_set_bankptr(machine,1, mess_ram);
154	154
155	155	/* Poll the keyboard input ports periodically.  These include both

src/mess/machine/bebox.c

r4679	r4680
590	590	{
591	591	const address_space *space = cputag_get_address_space(machine, "ppc1", ADDRESS_SPACE_PROGRAM);
592	592
593		read64_space_func rh64 = (rh == SMH_BANK4) ? SMH_BANK4 : bebox_vga_memory_r;
594		write64_space_func wh64 = (wh == SMH_BANK4) ? SMH_BANK4 : bebox_vga_memory_w;
	593	read64_space_func rh64 = (rh == SMH_BANK(4)) ? SMH_BANK(4) : bebox_vga_memory_r;
	594	write64_space_func wh64 = (wh == SMH_BANK(4)) ? SMH_BANK(4) : bebox_vga_memory_w;
595	595
596	596	bebox_vga_memory_rh = rh;
597	597	bebox_vga_memory_wh = wh;
r4679	r4680
1103	1103	offs_t vram_begin;
1104	1104	offs_t vram_end;
1105	1105
1106		mpc105_init(0);
	1106	mpc105_init(machine, 0);
1107	1107
1108	1108	/* set up boot and flash ROM */
1109	1109	memory_set_bankptr(machine, 2, memory_region(machine, "user2"));
1110	1110	intelflash_init(machine, 0, FLASH_FUJITSU_29F016A, memory_region(machine, "user1"));
1111	1111
1112	1112	/* install MESS managed RAM */
1113		memory_install_read64_handler(space_0, 0, mess_ram_size - 1, 0, 0x02000000, SMH_BANK3);
1114		memory_install_write64_handler(space_0, 0, mess_ram_size - 1, 0, 0x02000000, SMH_BANK3);
1115		memory_install_read64_handler(space_1, 0, mess_ram_size - 1, 0, 0x02000000, SMH_BANK3);
1116		memory_install_write64_handler(space_1, 0, mess_ram_size - 1, 0, 0x02000000, SMH_BANK3);
	1113	memory_install_read64_handler(space_0, 0, mess_ram_size - 1, 0, 0x02000000, SMH_BANK(3));
	1114	memory_install_write64_handler(space_0, 0, mess_ram_size - 1, 0, 0x02000000, SMH_BANK(3));
	1115	memory_install_read64_handler(space_1, 0, mess_ram_size - 1, 0, 0x02000000, SMH_BANK(3));
	1116	memory_install_write64_handler(space_1, 0, mess_ram_size - 1, 0, 0x02000000, SMH_BANK(3));
1117	1117	memory_set_bankptr(machine, 3, mess_ram);
1118	1118
1119	1119	mc146818_init(machine, MC146818_STANDARD);
r4679	r4680
1146	1146	/* bcctr 0x14, 0 */
1147	1147	U64(0x4E80042000000000)
1148	1148	};
1149		memory_install_read64_handler(space_1, 0x9421FFF0, 0x9421FFFF, 0, 0, SMH_BANK1);
	1149	memory_install_read64_handler(space_1, 0x9421FFF0, 0x9421FFFF, 0, 0, SMH_BANK(1));
1150	1150	memory_set_bankptr(machine, 1, ops);
1151	1151	}
1152	1152	}

src/mess/machine/mtx.c

r4679	r4680
226	226	else if (ram_page + 1 == mess_ram_size/0x8000)
227	227	{
228	228	memory_install_readwrite8_handler(cputag_get_address_space(space->machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x4000, 0x7fff, 0, 0, SMH_NOP, SMH_NOP);
229		memory_install_readwrite8_handler(cputag_get_address_space(space->machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x8000, 0xbfff, 0, 0, SMH_BANK4, SMH_BANK4);
	229	memory_install_readwrite8_handler(cputag_get_address_space(space->machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x8000, 0xbfff, 0, 0, SMH_BANK(4), SMH_BANK(4));
230	230	memory_set_bank(space->machine, 4, ram_page);
231	231	}
232	232	else
233	233	{
234		memory_install_readwrite8_handler(cputag_get_address_space(space->machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x4000, 0x7fff, 0, 0, SMH_BANK3, SMH_BANK3);
235		memory_install_readwrite8_handler(cputag_get_address_space(space->machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x8000, 0xbfff, 0, 0, SMH_BANK4, SMH_BANK4);
	234	memory_install_readwrite8_handler(cputag_get_address_space(space->machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x4000, 0x7fff, 0, 0, SMH_BANK(3), SMH_BANK(3));
	235	memory_install_readwrite8_handler(cputag_get_address_space(space->machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x8000, 0xbfff, 0, 0, SMH_BANK(4), SMH_BANK(4));
236	236	memory_set_bank(space->machine, 3, ram_page);
237	237	memory_set_bank(space->machine, 4, ram_page);
238	238	}

src/mess/machine/special.c

r4679	r4680
164	164	static void specimx_set_bank(running_machine *machine, int i,int data)
165	165	{
166	166	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
167		memory_install_write8_handler(space, 0xc000, 0xffbf, 0, 0, SMH_BANK3);
168		memory_install_write8_handler(space, 0xffc0, 0xffdf, 0, 0, SMH_BANK4);
	167	memory_install_write8_handler(space, 0xc000, 0xffbf, 0, 0, SMH_BANK(3));
	168	memory_install_write8_handler(space, 0xffc0, 0xffdf, 0, 0, SMH_BANK(4));
169	169	memory_set_bankptr(machine, 4, mess_ram + 0xffc0);
170	170	switch(i)
171	171	{
172	172	case 0 :
173		memory_install_write8_handler(space, 0x0000, 0x8fff, 0, 0, SMH_BANK1);
	173	memory_install_write8_handler(space, 0x0000, 0x8fff, 0, 0, SMH_BANK(1));
174	174	memory_install_write8_handler(space, 0x9000, 0xbfff, 0, 0, video_memory_w);
175	175
176	176	memory_set_bankptr(machine, 1, mess_ram);
r4679	r4680
178	178	memory_set_bankptr(machine, 3, mess_ram + 0xc000);
179	179	break;
180	180	case 1 :
181		memory_install_write8_handler(space, 0x0000, 0x8fff, 0, 0, SMH_BANK1);
182		memory_install_write8_handler(space, 0x9000, 0xbfff, 0, 0, SMH_BANK2);
	181	memory_install_write8_handler(space, 0x0000, 0x8fff, 0, 0, SMH_BANK(1));
	182	memory_install_write8_handler(space, 0x9000, 0xbfff, 0, 0, SMH_BANK(2));
183	183
184	184	memory_set_bankptr(machine, 1, mess_ram + 0x10000);
185	185	memory_set_bankptr(machine, 2, mess_ram + 0x19000);
r4679	r4680
345	345	UINT8 *mem = memory_region(machine, "maincpu");
346	346	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
347	347
348		memory_install_write8_handler(space, 0x0000, 0x3fff, 0, 0, SMH_BANK1);
349		memory_install_write8_handler(space, 0x4000, 0x8fff, 0, 0, SMH_BANK2);
350		memory_install_write8_handler(space, 0x9000, 0xbfff, 0, 0, SMH_BANK3);
351		memory_install_write8_handler(space, 0xc000, 0xefff, 0, 0, SMH_BANK4);
352		memory_install_write8_handler(space, 0xf000, 0xf7ff, 0, 0, SMH_BANK5);
353		memory_install_write8_handler(space, 0xf800, 0xffff, 0, 0, SMH_BANK6);
	348	memory_install_write8_handler(space, 0x0000, 0x3fff, 0, 0, SMH_BANK(1));
	349	memory_install_write8_handler(space, 0x4000, 0x8fff, 0, 0, SMH_BANK(2));
	350	memory_install_write8_handler(space, 0x9000, 0xbfff, 0, 0, SMH_BANK(3));
	351	memory_install_write8_handler(space, 0xc000, 0xefff, 0, 0, SMH_BANK(4));
	352	memory_install_write8_handler(space, 0xf000, 0xf7ff, 0, 0, SMH_BANK(5));
	353	memory_install_write8_handler(space, 0xf800, 0xffff, 0, 0, SMH_BANK(6));
354	354
355	355	switch(bank1)
356	356	{

src/mess/machine/zx8302.c

r4679	r4680
698	698	/* allocate microdrive images */
699	699	for (i = 0; i < 8; i++)
700	700	{
701		zx8302->mdv_image[i] = auto_malloc(MDV_IMAGE_LENGTH);
	701	zx8302->mdv_image[i] = auto_alloc_array(machine, UINT8, MDV_IMAGE_LENGTH);
702	702	}
703	703
704	704	/* create the timers */

src/mess/machine/snescart.c

r4679	r4680
124	124	UINT8 ii;
125	125	UINT8 *battery_ram, *ptr;
126	126
127		battery_ram = malloc_or_die(snes_cart.sram_max);
	127	battery_ram = alloc_array_or_die(UINT8, snes_cart.sram_max);
128	128	ptr = battery_ram;
129	129	image_battery_load(devtag_get_device(machine, "cart"), battery_ram, snes_cart.sram_max);
130	130
r4679	r4680
170	170	UINT8 ii;
171	171	UINT8 *battery_ram, *ptr;
172	172
173		battery_ram = malloc_or_die(snes_cart.sram_max);
	173	battery_ram = alloc_array_or_die(UINT8, snes_cart.sram_max);
174	174	ptr = battery_ram;
175	175
176	176	if (snes_cart.mode == SNES_MODE_20)
r4679	r4680
341	341	int total_blocks, read_blocks;
342	342	UINT32 offset;
343	343	UINT8 header[512];
344		UINT8 *temp_buffer = auto_malloc(0x410000);
	344	UINT8 *temp_buffer = auto_alloc_array(machine, UINT8, 0x410000);
345	345	UINT8 valid_mode20, valid_mode21, valid_mode25;
346	346
347	347	memory_region_alloc(machine, "maincpu", 0x1000000, 0);

src/mess/machine/apple2.c

r4679	r4680
116	116	{
117	117	for (i = 0; apple2_mem_config.memmap[i].end; i++)
118	118	;
119		apple2_current_meminfo = auto_malloc(i * sizeof(*apple2_current_meminfo));
	119	apple2_current_meminfo = auto_alloc_array(machine, apple2_meminfo, i);
120	120	full_update = 1;
121	121	}
122	122
r4679	r4680
1305	1305	* IIc plus; I have not found any official documentation but the BIOS
1306	1306	* clearly uses this area as writeable memory */
1307	1307	if (!strcmp(machine->gamedrv->name, "apple2cp"))
1308		apple2cp_ce00_ram = auto_malloc(0x200);
	1308	apple2cp_ce00_ram = auto_alloc_array(machine, UINT8, 0x200);
1309	1309
1310	1310	apple2_init_common(machine);
1311	1311

src/mess/machine/c64.c

r4679	r4680
1102	1102	{
1103	1103	c64_port_data = 0x17;
1104	1104
1105		c64_io_mirror = auto_malloc( 0x1000 );
	1105	c64_io_mirror = auto_alloc_array(machine, UINT8, 0x1000 );
1106	1106	c64_common_init_machine (machine);
1107	1107
1108	1108	if (is_c128(machine))

src/mess/machine/genesis.c

r4679	r4680
1204	1204	if (!(genesis_sram_end & 1))
1205	1205	genesis_sram_end += 1;
1206	1206
1207		genesis_sram = malloc_or_die(genesis_sram_end - genesis_sram_start);
	1207	genesis_sram = alloc_array_or_die(UINT16, (genesis_sram_end - genesis_sram_start) / sizeof(UINT16));
1208	1208	image_battery_load(devtag_get_device(image->machine, "cart"), genesis_sram, genesis_sram_end - genesis_sram_start);
1209	1209
1210	1210	megadriv_backupram = (UINT16*)ROM + ((genesis_sram_start & 0x3fffff) / 2);

src/mess/machine/pc.c

r4679	r4680
1233	1233	for (i = 0; i < 256; i++)
1234	1234	gfx[i] = i;
1235	1235
1236		memory_install_read16_handler( space, 0xb8000, 0xbbfff, 0, 0x0C000, SMH_BANK1 );
	1236	memory_install_read16_handler( space, 0xb8000, 0xbbfff, 0, 0x0C000, SMH_BANK(1) );
1237	1237	memory_install_write16_handler( space, 0xb8000, 0xbbfff, 0, 0x0C000, pc1512_videoram16le_w );
1238	1238
1239	1239	memory_install_read16_handler( io_space, 0x3d0, 0x3df, 0, 0, pc1512_16le_r );

src/mess/machine/pecom.c

r4679	r4680
42	42	pecom_state *state = machine->driver_data;
43	43
44	44	memory_install_write8_handler(space, 0x0000, 0x3fff, 0, 0, SMH_UNMAP);
45		memory_install_write8_handler(space, 0x4000, 0x7fff, 0, 0, SMH_BANK2);
	45	memory_install_write8_handler(space, 0x4000, 0x7fff, 0, 0, SMH_BANK(2));
46	46	memory_install_write8_handler(space, 0xf000, 0xf7ff, 0, 0, SMH_UNMAP);
47	47	memory_install_write8_handler(space, 0xf800, 0xffff, 0, 0, SMH_UNMAP);
48		memory_install_read8_handler (space, 0xf000, 0xf7ff, 0, 0, SMH_BANK3);
49		memory_install_read8_handler (space, 0xf800, 0xffff, 0, 0, SMH_BANK4);
	48	memory_install_read8_handler (space, 0xf000, 0xf7ff, 0, 0, SMH_BANK(3));
	49	memory_install_read8_handler (space, 0xf800, 0xffff, 0, 0, SMH_BANK(4));
50	50	memory_set_bankptr(machine, 1, rom + 0x8000);
51	51	memory_set_bankptr(machine, 2, mess_ram + 0x4000);
52	52	memory_set_bankptr(machine, 3, rom + 0xf000);
r4679	r4680
65	65	const device_config *cdp1869 = devtag_get_device(space->machine, CDP1869_TAG);
66	66	const address_space *space2 = cputag_get_address_space(space->machine, "maincpu", ADDRESS_SPACE_PROGRAM);
67	67	UINT8 *rom = memory_region(space->machine, "maincpu");
68		memory_install_write8_handler(cputag_get_address_space(space->machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x0000, 0x3fff, 0, 0, SMH_BANK1);
	68	memory_install_write8_handler(cputag_get_address_space(space->machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x0000, 0x3fff, 0, 0, SMH_BANK(1));
69	69	memory_set_bankptr(space->machine, 1, mess_ram + 0x0000);
70	70
71	71	if (data==2)
r4679	r4680
79	79	{
80	80	memory_install_write8_handler(space2, 0xf000, 0xf7ff, 0, 0, SMH_UNMAP);
81	81	memory_install_write8_handler(space2, 0xf800, 0xffff, 0, 0, SMH_UNMAP);
82		memory_install_read8_handler (space2, 0xf000, 0xf7ff, 0, 0, SMH_BANK3);
83		memory_install_read8_handler (space2, 0xf800, 0xffff, 0, 0, SMH_BANK4);
	82	memory_install_read8_handler (space2, 0xf000, 0xf7ff, 0, 0, SMH_BANK(3));
	83	memory_install_read8_handler (space2, 0xf800, 0xffff, 0, 0, SMH_BANK(4));
84	84	memory_set_bankptr(space->machine, 3, rom + 0xf000);
85	85	memory_set_bankptr(space->machine, 4, rom + 0xf800);
86	86	}

src/mess/machine/pce.c

r4679	r4680
205	205	/* Check for Populous */
206	206	if ( ! memcmp( ROM + 0x1F26, "POPULOUS", 8 ) )
207	207	{
208		cartridge_ram = auto_malloc( 0x8000 );
	208	cartridge_ram = auto_alloc_array(image->machine, UINT8, 0x8000 );
209	209	memory_set_bankptr( image->machine, 2, cartridge_ram );
210	210	memory_install_write8_handler(cputag_get_address_space(image->machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x080000, 0x087FFF, 0, 0, pce_cartridge_ram_w );
211	211	}
r4679	r4680
218	218	if ( ! memcmp( ROM + 0x29D1, "VER. 3.", 7 ) || ! memcmp( ROM + 0x29C4, "VER. 3.", 7 ) )
219	219	{
220	220	pce_sys3_card = 1;
221		cartridge_ram = auto_malloc( 0x30000 );
	221	cartridge_ram = auto_alloc_array(image->machine, UINT8, 0x30000 );
222	222	memory_set_bankptr( image->machine, 4, cartridge_ram );
223	223	memory_install_write8_handler(cputag_get_address_space(image->machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x0D0000, 0x0FFFFF, 0, 0, pce_cartridge_ram_w );
224	224	}
r4679	r4680
915	915	memset( &pce_cd, 0, sizeof(pce_cd) );
916	916
917	917	/* Initialize BRAM */
918		pce_cd.bram = auto_malloc( PCE_BRAM_SIZE * 2 );
	918	pce_cd.bram = auto_alloc_array(machine, UINT8, PCE_BRAM_SIZE * 2 );
919	919	memset( pce_cd.bram, 0, PCE_BRAM_SIZE );
920	920	memset( pce_cd.bram + PCE_BRAM_SIZE, 0xFF, PCE_BRAM_SIZE );
921	921	pce_cd.bram_locked = 1;
922	922	pce_set_cd_bram(machine);
923	923
924	924	/* set up adpcm related things */
925		pce_cd.adpcm_ram = auto_malloc( PCE_ADPCM_RAM_SIZE );
	925	pce_cd.adpcm_ram = auto_alloc_array(machine, UINT8, PCE_ADPCM_RAM_SIZE );
926	926	memset( pce_cd.adpcm_ram, 0, PCE_ADPCM_RAM_SIZE );
927	927	pce_cd.adpcm_clock_divider = 1;
928	928
929	929	/* Set up cd command buffer */
930		pce_cd.command_buffer = auto_malloc( PCE_CD_COMMAND_BUFFER_SIZE );
	930	pce_cd.command_buffer = auto_alloc_array(machine, UINT8, PCE_CD_COMMAND_BUFFER_SIZE );
931	931	memset( pce_cd.command_buffer, 0, PCE_CD_COMMAND_BUFFER_SIZE );
932	932	pce_cd.command_buffer_index = 0;
933	933
934		pce_cd.data_buffer = auto_malloc( 8192 );
	934	pce_cd.data_buffer = auto_alloc_array(machine, UINT8, 8192 );
935	935	memset( pce_cd.data_buffer, 0, 8192 );
936	936	pce_cd.data_buffer_size = 0;
937	937	pce_cd.data_buffer_index = 0;
938	938
939		pce_cd.subcode_buffer = auto_malloc( 96 );
	939	pce_cd.subcode_buffer = auto_alloc_array(machine, UINT8, 96 );
940	940
941	941	device = devtag_get_device(machine, "cdrom");
942	942	if ( device )

src/mess/machine/ti99_4x.c

r4679	r4680
2630	2630	int i;
2631	2631
2632	2632	/* Not required at run-time */
2633		/*memory_install_read16_handler(space, 0x2000, 0x2fff, SMH_BANK3);
2634		memory_install_write16_handler(space, 0x2000, 0x2fff, SMH_BANK3);
2635		memory_install_read16_handler(space, 0x3000, 0x3fff, SMH_BANK4);
2636		memory_install_write16_handler(space, 0x3000, 0x3fff, SMH_BANK4);
2637		memory_install_read16_handler(space, 0xa000, 0xafff, SMH_BANK5);
2638		memory_install_write16_handler(space, 0xa000, 0xafff, SMH_BANK5);
2639		memory_install_read16_handler(space, 0xb000, 0xbfff, SMH_BANK6);
2640		memory_install_write16_handler(space, 0xb000, 0xbfff, SMH_BANK6);
2641		memory_install_read16_handler(space, 0xc000, 0xcfff, SMH_BANK7);
2642		memory_install_write16_handler(space, 0xc000, 0xcfff, SMH_BANK7);
2643		memory_install_read16_handler(space, 0xd000, 0xdfff, SMH_BANK8);
2644		memory_install_write16_handler(space, 0xd000, 0xdfff, SMH_BANK8);
2645		memory_install_read16_handler(space, 0xe000, 0xefff, SMH_BANK9);
2646		memory_install_write16_handler(space, 0xe000, 0xefff, SMH_BANK9);
2647		memory_install_read16_handler(space, 0xf000, 0xffff, SMH_BANK10);
2648		memory_install_write16_handler(space, 0xf000, 0xffff, SMH_BANK10);*/
	2633	/*memory_install_read16_handler(space, 0x2000, 0x2fff, SMH_BANK(3));
	2634	memory_install_write16_handler(space, 0x2000, 0x2fff, SMH_BANK(3));
	2635	memory_install_read16_handler(space, 0x3000, 0x3fff, SMH_BANK(4));
	2636	memory_install_write16_handler(space, 0x3000, 0x3fff, SMH_BANK(4));
	2637	memory_install_read16_handler(space, 0xa000, 0xafff, SMH_BANK(5));
	2638	memory_install_write16_handler(space, 0xa000, 0xafff, SMH_BANK(5));
	2639	memory_install_read16_handler(space, 0xb000, 0xbfff, SMH_BANK(6));
	2640	memory_install_write16_handler(space, 0xb000, 0xbfff, SMH_BANK(6));
	2641	memory_install_read16_handler(space, 0xc000, 0xcfff, SMH_BANK(7));
	2642	memory_install_write16_handler(space, 0xc000, 0xcfff, SMH_BANK(7));
	2643	memory_install_read16_handler(space, 0xd000, 0xdfff, SMH_BANK(8));
	2644	memory_install_write16_handler(space, 0xd000, 0xdfff, SMH_BANK(8));
	2645	memory_install_read16_handler(space, 0xe000, 0xefff, SMH_BANK(9));
	2646	memory_install_write16_handler(space, 0xe000, 0xefff, SMH_BANK(9));
	2647	memory_install_read16_handler(space, 0xf000, 0xffff, SMH_BANK(10));
	2648	memory_install_write16_handler(space, 0xf000, 0xffff, SMH_BANK(10));*/
2649	2649
2650	2650	ti99_peb_set_16bit_card_handlers(0x1e00, & ti99_4p_mapper_handlers);
2651	2651

src/mess/machine/pc1251.c

r4679	r4680
131	131	// 4 kb memory feedback 512 bytes too few???
132	132	// 11 kb ram: program stored at 8000
133	133	#if 1
134		memory_install_write8_handler(space, 0x8000, 0xc7ff, 0, 0, SMH_BANK1);
	134	memory_install_write8_handler(space, 0x8000, 0xc7ff, 0, 0, SMH_BANK(1));
135	135	memory_set_bankptr(machine, 1, memory_region(machine, "maincpu") + 0x8000);
136	136	#else
137	137	if ((input_port_read(machine, "DSW0") & 0xc0) == 0xc0)

src/mess/machine/pk8020.c

r4679	r4680
23	23	{
24	24	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
25	25
26		memory_install_read8_handler (space, 0x0000, 0x1fff, 0, 0, SMH_BANK1);
	26	memory_install_read8_handler (space, 0x0000, 0x1fff, 0, 0, SMH_BANK(1));
27	27	memory_install_write8_handler(space, 0x0000, 0x7fff, 0, 0, SMH_UNMAP);
28		memory_install_read8_handler (space, 0x2000, 0x37ff, 0, 0, SMH_BANK2);
	28	memory_install_read8_handler (space, 0x2000, 0x37ff, 0, 0, SMH_BANK(2));
29	29	memory_install_write8_handler(space, 0x2000, 0x37ff, 0, 0, SMH_UNMAP);
30	30
31	31
32		memory_install_read8_handler (space, 0x4000, 0x5fff, 0, 0, SMH_BANK7);
33		memory_install_read8_handler (space, 0x6000, 0x7fff, 0, 0, SMH_BANK8);
34		memory_install_read8_handler (space, 0x8000, 0xbeff, 0, 0, SMH_BANK9);
35		memory_install_read8_handler (space, 0xbf00, 0xbfff, 0, 0, SMH_BANK10);
36		memory_install_read8_handler (space, 0xc000, 0xf7ff, 0, 0, SMH_BANK11);
37		memory_install_read8_handler (space, 0xf800, 0xf9ff, 0, 0, SMH_BANK12);
38		memory_install_read8_handler (space, 0xfa00, 0xfaff, 0, 0, SMH_BANK13);
39		memory_install_read8_handler (space, 0xfb00, 0xfbff, 0, 0, SMH_BANK14);
40		memory_install_read8_handler (space, 0xfc00, 0xfdff, 0, 0, SMH_BANK15);
41		memory_install_read8_handler (space, 0xfe00, 0xfeff, 0, 0, SMH_BANK16);
42		memory_install_read8_handler (space, 0xff00, 0xffff, 0, 0, SMH_BANK17);
	32	memory_install_read8_handler (space, 0x4000, 0x5fff, 0, 0, SMH_BANK(7));
	33	memory_install_read8_handler (space, 0x6000, 0x7fff, 0, 0, SMH_BANK(8));
	34	memory_install_read8_handler (space, 0x8000, 0xbeff, 0, 0, SMH_BANK(9));
	35	memory_install_read8_handler (space, 0xbf00, 0xbfff, 0, 0, SMH_BANK(10));
	36	memory_install_read8_handler (space, 0xc000, 0xf7ff, 0, 0, SMH_BANK(11));
	37	memory_install_read8_handler (space, 0xf800, 0xf9ff, 0, 0, SMH_BANK(12));
	38	memory_install_read8_handler (space, 0xfa00, 0xfaff, 0, 0, SMH_BANK(13));
	39	memory_install_read8_handler (space, 0xfb00, 0xfbff, 0, 0, SMH_BANK(14));
	40	memory_install_read8_handler (space, 0xfc00, 0xfdff, 0, 0, SMH_BANK(15));
	41	memory_install_read8_handler (space, 0xfe00, 0xfeff, 0, 0, SMH_BANK(16));
	42	memory_install_read8_handler (space, 0xff00, 0xffff, 0, 0, SMH_BANK(17));
43	43
44		memory_install_write8_handler(space, 0x4000, 0x5fff, 0, 0, SMH_BANK7);
45		memory_install_write8_handler(space, 0x6000, 0x7fff, 0, 0, SMH_BANK8);
46		memory_install_write8_handler(space, 0x8000, 0xbeff, 0, 0, SMH_BANK9);
47		memory_install_write8_handler(space, 0xbf00, 0xbfff, 0, 0, SMH_BANK10);
48		memory_install_write8_handler(space, 0xc000, 0xf7ff, 0, 0, SMH_BANK11);
49		memory_install_write8_handler(space, 0xf800, 0xf9ff, 0, 0, SMH_BANK12);
50		memory_install_write8_handler(space, 0xfa00, 0xfaff, 0, 0, SMH_BANK13);
51		memory_install_write8_handler(space, 0xfb00, 0xfbff, 0, 0, SMH_BANK14);
52		memory_install_write8_handler(space, 0xfc00, 0xfdff, 0, 0, SMH_BANK15);
53		memory_install_write8_handler(space, 0xfe00, 0xfeff, 0, 0, SMH_BANK16);
54		memory_install_write8_handler(space, 0xff00, 0xffff, 0, 0, SMH_BANK17);
	44	memory_install_write8_handler(space, 0x4000, 0x5fff, 0, 0, SMH_BANK(7));
	45	memory_install_write8_handler(space, 0x6000, 0x7fff, 0, 0, SMH_BANK(8));
	46	memory_install_write8_handler(space, 0x8000, 0xbeff, 0, 0, SMH_BANK(9));
	47	memory_install_write8_handler(space, 0xbf00, 0xbfff, 0, 0, SMH_BANK(10));
	48	memory_install_write8_handler(space, 0xc000, 0xf7ff, 0, 0, SMH_BANK(11));
	49	memory_install_write8_handler(space, 0xf800, 0xf9ff, 0, 0, SMH_BANK(12));
	50	memory_install_write8_handler(space, 0xfa00, 0xfaff, 0, 0, SMH_BANK(13));
	51	memory_install_write8_handler(space, 0xfb00, 0xfbff, 0, 0, SMH_BANK(14));
	52	memory_install_write8_handler(space, 0xfc00, 0xfdff, 0, 0, SMH_BANK(15));
	53	memory_install_write8_handler(space, 0xfe00, 0xfeff, 0, 0, SMH_BANK(16));
	54	memory_install_write8_handler(space, 0xff00, 0xffff, 0, 0, SMH_BANK(17));
55	55
56	56	memory_set_bankptr(machine, 1, memory_region(machine,"maincpu") + 0x10000);
57	57	memory_set_bankptr(machine, 2, memory_region(machine,"maincpu") + 0x12000);

src/mess/machine/kc.c

r4679	r4680
1147	1147
1148	1148	memory_set_bankptr(machine, 3, mem_ptr);
1149	1149	memory_set_bankptr(machine, 4, mem_ptr+0x02800);
1150		memory_install_read8_handler(space, 0x8000, 0xa7ff, 0, 0, SMH_BANK3);
1151		memory_install_read8_handler(space, 0xa800, 0xbfff, 0, 0, SMH_BANK4);
	1150	memory_install_read8_handler(space, 0x8000, 0xa7ff, 0, 0, SMH_BANK(3));
	1151	memory_install_read8_handler(space, 0xa800, 0xbfff, 0, 0, SMH_BANK(4));
1152	1152
1153	1153	/* write protect RAM8 ? */
1154	1154	if ((kc85_pio_data[1] & (1<<6))==0)
r4679	r4680
1162	1162	LOG(("RAM8 write enabled\n"));
1163	1163
1164	1164	/* ram8 is enabled and write enabled */
1165		memory_install_write8_handler(space, 0x8000, 0xa7ff, 0, 0, SMH_BANK9);
1166		memory_install_write8_handler(space, 0xa800, 0xbfff, 0, 0, SMH_BANK10);
	1165	memory_install_write8_handler(space, 0x8000, 0xa7ff, 0, 0, SMH_BANK(9));
	1166	memory_install_write8_handler(space, 0xa800, 0xbfff, 0, 0, SMH_BANK(10));
1167	1167	memory_set_bankptr(machine, 9, mem_ptr);
1168	1168	memory_set_bankptr(machine, 10, mem_ptr+0x02800);
1169	1169	}
r4679	r4680
1186	1186
1187	1187	memory_set_bankptr(machine, 3, ram_page);
1188	1188	memory_set_bankptr(machine, 9, ram_page);
1189		memory_install_read8_handler(space, 0x8000, 0xa7ff, 0, 0, SMH_BANK3);
1190		memory_install_write8_handler(space, 0x8000, 0xa7ff, 0, 0, SMH_BANK9);
	1189	memory_install_read8_handler(space, 0x8000, 0xa7ff, 0, 0, SMH_BANK(3));
	1190	memory_install_write8_handler(space, 0x8000, 0xa7ff, 0, 0, SMH_BANK(9));
1191	1191
1192	1192	ram_page = kc85_4_get_video_ram_base(0, 0);
1193	1193
1194	1194	memory_set_bankptr(machine, 4, ram_page + 0x2800);
1195	1195	memory_set_bankptr(machine, 10, ram_page + 0x2800);
1196		memory_install_read8_handler(space, 0xa800, 0xbfff, 0, 0, SMH_BANK4);
1197		memory_install_write8_handler(space, 0xa800, 0xbfff, 0, 0, SMH_BANK10);
	1196	memory_install_read8_handler(space, 0xa800, 0xbfff, 0, 0, SMH_BANK(4));
	1197	memory_install_write8_handler(space, 0xa800, 0xbfff, 0, 0, SMH_BANK(10));
1198	1198	}
1199	1199	}
1200	1200
r4679	r4680
1209	1209	LOG(("ram0 enabled\n"));
1210	1210
1211	1211	/* yes; set address of bank */
1212		memory_install_read8_handler(space, 0x0000, 0x3fff, 0, 0, SMH_BANK1);
	1212	memory_install_read8_handler(space, 0x0000, 0x3fff, 0, 0, SMH_BANK(1));
1213	1213	memory_set_bankptr(machine, 1, mess_ram);
1214	1214
1215	1215	/* write protect ram? */
r4679	r4680
1226	1226	LOG(("ram0 write enabled\n"));
1227	1227
1228	1228	/* ram is enabled and write enabled; and set address of bank */
1229		memory_install_write8_handler(space, 0x0000, 0x3fff, 0, 0, SMH_BANK7);
	1229	memory_install_write8_handler(space, 0x0000, 0x3fff, 0, 0, SMH_BANK(7));
1230	1230	memory_set_bankptr(machine, 7, mess_ram);
1231	1231	}
1232	1232	}
r4679	r4680
1256	1256	mem_ptr = mess_ram + 0x04000;
1257	1257
1258	1258	/* yes */
1259		rh = SMH_BANK2;
	1259	rh = SMH_BANK(2);
1260	1260	/* set address of bank */
1261	1261	memory_set_bankptr(machine, 2, mem_ptr);
1262	1262
r4679	r4680
1274	1274	LOG(("ram4 write enabled\n"));
1275	1275
1276	1276	/* ram is enabled and write enabled */
1277		wh = SMH_BANK8;
	1277	wh = SMH_BANK(8);
1278	1278	/* set address of bank */
1279	1279	memory_set_bankptr(machine, 8, mem_ptr);
1280	1280	}
r4679	r4680
1304	1304	LOG(("CAOS rom 0x0c000\n"));
1305	1305
1306	1306	memory_set_bankptr(machine, 5,memory_region(machine, "maincpu") + 0x012000);
1307		rh = SMH_BANK5;
	1307	rh = SMH_BANK(5);
1308	1308	}
1309	1309	else if (kc85_pio_data[0] & (1<<7))
1310	1310	{
r4679	r4680
1312	1312	LOG(("BASIC rom 0x0c000\n"));
1313	1313
1314	1314	memory_set_bankptr(machine, 5, memory_region(machine, "maincpu") + 0x010000);
1315		rh = SMH_BANK5;
	1315	rh = SMH_BANK(5);
1316	1316	}
1317	1317	else
1318	1318	{
r4679	r4680
1321	1321	LOG(("module rom at 0xc000\n"));
1322	1322
1323	1323	memory_set_bankptr(machine, 5, kc85_module_rom);
1324		rh = SMH_BANK5;
	1324	rh = SMH_BANK(5);
1325	1325	}
1326	1326	else
1327	1327	{
r4679	r4680
1346	1346	LOG(("CAOS rom 0x0e000\n"));
1347	1347	/* read will access the rom */
1348	1348	memory_set_bankptr(machine, 6,memory_region(machine, "maincpu") + 0x013000);
1349		rh = SMH_BANK6;
	1349	rh = SMH_BANK(6);
1350	1350	}
1351	1351	else
1352	1352	{
r4679	r4680
1462	1462	LOG(("BASIC rom 0x0c000\n"));
1463	1463
1464	1464	memory_set_bankptr(machine, 4, memory_region(machine, "maincpu") + 0x010000);
1465		rh = SMH_BANK4;
	1465	rh = SMH_BANK(4);
1466	1466	}
1467	1467	else
1468	1468	{
r4679	r4680
1485	1485	LOG(("CAOS rom 0x0e000\n"));
1486	1486
1487	1487	memory_set_bankptr(machine, 5,memory_region(machine, "maincpu") + 0x012000);
1488		rh = SMH_BANK5;
	1488	rh = SMH_BANK(5);
1489	1489	}
1490	1490	else
1491	1491	{
r4679	r4680
1497	1497	}
1498	1498
1499	1499	/* update status of memory area 0x0000-0x03fff */
1500		/* SMH_BANK1 is used for read operations and SMH_BANK6 is used
	1500	/* SMH_BANK(1) is used for read operations and SMH_BANK(6) is used
1501	1501	for write operations */
1502	1502	static void kc85_3_update_0x00000(running_machine *machine)
1503	1503	{
r4679	r4680
1511	1511	LOG(("ram0 enabled\n"));
1512	1512
1513	1513	/* yes */
1514		rh = SMH_BANK1;
	1514	rh = SMH_BANK(1);
1515	1515	/* set address of bank */
1516	1516	memory_set_bankptr(machine, 1, mess_ram);
1517	1517
r4679	r4680
1529	1529	LOG(("ram0 write enabled\n"));
1530	1530
1531	1531	/* ram is enabled and write enabled */
1532		wh = SMH_BANK6;
	1532	wh = SMH_BANK(6);
1533	1533	/* set address of bank */
1534	1534	memory_set_bankptr(machine, 6, mess_ram);
1535	1535	}
r4679	r4680
1548	1548	}
1549	1549
1550	1550	/* update status of memory area 0x08000-0x0ffff */
1551		/* SMH_BANK3 is used for read, SMH_BANK8 is used for write */
	1551	/* SMH_BANK(3) is used for read, SMH_BANK(8) is used for write */
1552	1552	static void kc85_3_update_0x08000(running_machine *machine)
1553	1553	{
1554	1554	const address_space *space = cputag_get_address_space( machine, "maincpu", ADDRESS_SPACE_PROGRAM );
r4679	r4680
1565	1565	memory_set_bankptr(machine, 3, ram_page);
1566	1566	memory_set_bankptr(machine, 8, ram_page);
1567	1567
1568		rh = SMH_BANK3;
1569		wh = SMH_BANK8;
	1568	rh = SMH_BANK(3);
	1569	wh = SMH_BANK(8);
1570	1570	}
1571	1571	else if (kc85_pio_data[1] & (1<<5))
1572	1572	{
r4679	r4680
1575	1575	ram_page = mess_ram + 0x04000;
1576	1576
1577	1577	memory_set_bankptr(machine, 3, ram_page);
1578		rh = SMH_BANK3;
	1578	rh = SMH_BANK(3);
1579	1579
1580	1580	/* write protect RAM8 ? */
1581	1581	if ((kc85_pio_data[1] & (1<<6))==0)
r4679	r4680
1588	1588	{
1589	1589	LOG(("RAM8 write enabled\n"));
1590	1590	/* ram8 is enabled and write enabled */
1591		wh = SMH_BANK8;
	1591	wh = SMH_BANK(8);
1592	1592	memory_set_bankptr(machine, 8,ram_page);
1593	1593	}
1594	1594	}

src/mess/mess.mak

r4679	r4680
240	240	$(MESSOBJ)/acorn.a \
241	241	$(MESSOBJ)/advision.a \
242	242	$(MESSOBJ)/amiga.a \
243		$(MESSOBJ)/amstrad.a \
244	243	$(MESSOBJ)/apexc.a \
245	244	$(MESSOBJ)/apf.a \
246		$(MESSOBJ)/apple.a \
247	245	$(MESSOBJ)/aquarius.a \
248	246	$(MESSOBJ)/arcadia.a \
249	247	$(MESSOBJ)/ascii.a \
r4679	r4680
256	254	$(MESSOBJ)/be.a \
257	255	$(MESSOBJ)/bk.a \
258	256	$(MESSOBJ)/bondwell.a \
259		$(MESSOBJ)/cbm.a \
260		$(MESSOBJ)/cbmshare.a \
261	257	$(MESSOBJ)/cdi.a \
262	258	$(MESSOBJ)/cgenie.a \
263	259	$(MESSOBJ)/coco.a \
r4679	r4680
325	321	$(MESSOBJ)/pk8020.a \
326	322	$(MESSOBJ)/pmd85.a \
327	323	$(MESSOBJ)/pp01.a \
328		$(MESSOBJ)/primo.a \
329	324	$(MESSOBJ)/radio.a \
330	325	$(MESSOBJ)/rca.a \
	326	$(MESSOBJ)/robotron.a \
331	327	$(MESSOBJ)/rockwell.a \
332		$(MESSOBJ)/robotron.a \
333	328	$(MESSOBJ)/samcoupe.a \
334	329	$(MESSOBJ)/samsung.a \
335	330	$(MESSOBJ)/sapi1.a \
336	331	$(MESSOBJ)/sega.a \
337	332	$(MESSOBJ)/sgi.a \
338	333	$(MESSOBJ)/sharp.a \
339		$(MESSOBJ)/sinclair.a \
340	334	$(MESSOBJ)/snk.a \
341	335	$(MESSOBJ)/sony.a \
342	336	$(MESSOBJ)/sord.a \
r4679	r4680
346	340	$(MESSOBJ)/svi.a \
347	341	$(MESSOBJ)/svision.a \
348	342	$(MESSOBJ)/synertec.a \
349		$(MESSOBJ)/tangerin.a \
350	343	$(MESSOBJ)/tatung.a \
351	344	$(MESSOBJ)/teamconc.a \
352	345	$(MESSOBJ)/tec1.a \
353	346	$(MESSOBJ)/telmac.a \
354		$(MESSOBJ)/thomson.a \
355	347	$(MESSOBJ)/ti85.a \
356	348	$(MESSOBJ)/ti99.a \
357	349	$(MESSOBJ)/tiger.a \
r4679	r4680
368	360	$(MESSOBJ)/skeleton.a \
369	361	$(MESSOBJ)/shared.a \
370	362
	363	#   $(MESSOBJ)/amstrad.a \
	364	#   $(MESSOBJ)/apple.a \
	365	#   $(MESSOBJ)/cbm.a \
	366	#   $(MESSOBJ)/cbmshare.a \
	367	#   $(MESSOBJ)/primo.a \
	368	#   $(MESSOBJ)/sinclair.a \
	369	#   $(MESSOBJ)/tangerin.a \
	370	#   $(MESSOBJ)/thomson.a \
371	371
372	372
373	373

src/mess/devices/ti99cart.c

r4679	r4680
1191	1191	break;
1192	1192
1193	1193	/* --- the following bits of info are returned as pointers to functions --- */
1194		case DEVINFO_FCT_SET_INFO:
1195		/* Nothing */
1196		break;
1197	1194	case DEVINFO_FCT_START:
1198	1195	info->start = DEVICE_START_NAME(ti99_pcb_std);
1199	1196	break;
r4679	r4680
2359	2356	MDRV_CARTSLOT_UNLOAD(ti99_cartridge)
2360	2357	MACHINE_DRIVER_END
2361	2358
2362		static DEVICE_SET_INFO(ti99_multicart)
2363		{
2364		//   printf("device_set_info(ti99-cart)");
2365		}
2366	2359
2367
2368	2360	DEVICE_GET_INFO(ti99_multicart)
2369	2361	{
2370	2362	switch (state)
r4679	r4680
2395	2387	strcpy(info->s, __FILE__);
2396	2388	break;
2397	2389	/* --- the following bits of info are returned as pointers to functions --- */
2398		case DEVINFO_FCT_SET_INFO:
2399		info->set_info = DEVICE_SET_INFO_NAME(ti99_multicart);
2400		break;
2401	2390	case DEVINFO_FCT_START:
2402	2391	info->start = DEVICE_START_NAME(ti99_multicart);
2403	2392	break;

src/mess/devices/bitbngr.c

r4679	r4680
86	86	const bitbanger_config *config = get_config(device);
87	87
88	88	bi = get_token(device);
89		bi->pulses = (double *) auto_malloc(config->maximum_pulses * sizeof(double));
90		bi->factored_pulses = (int *) auto_malloc(config->maximum_pulses * sizeof(int));
	89	bi->pulses = auto_alloc_array(device->machine, double, config->maximum_pulses);
	90	bi->factored_pulses = auto_alloc_array(device->machine, int, config->maximum_pulses);
91	91	bi->last_pulse_time = 0.0;
92	92	bi->recorded_pulses = 0;
93	93	bi->value = config->initial_value;

src/mess/devices/thomflop.c

r4679	r4680
505	505	#define QDD_MAXBUF ( THOM_QDD_SIZE_ID + THOM_QDD_SIZE_DATA ) * 512
506	506
507	507
508		static struct
	508	static struct _to7qdd
509	509	{
510	510	/* MC6852 registers */
511	511	UINT8 status;
r4679	r4680
868	868	{
869	869	LOG(( "to7_qdd_init: CQ 90-028 controller\n" ));
870	870
871		to7qdd = auto_malloc( sizeof( *to7qdd ) );
872		assert( to7qdd );
	871	to7qdd = auto_alloc(machine, struct _to7qdd);
873	872
874	873	state_save_register_global( machine, to7qdd->status );
875	874	state_save_register_global( machine, to7qdd->ctrl1 );
r4679	r4680
913	912	#define THOM_MAXBUF ( THOM_QDD_SIZE_ID + THOM_QDD_SIZE_DATA ) * 512
914	913
915	914
916		static struct
	915	static struct _thmfc1
917	916	{
918	917
919	918	UINT8   op;
r4679	r4680
1557	1556	{
1558	1557	LOG(( "thmfc_floppy_init: THMFC1 controller\n" ));
1559	1558
1560		thmfc1 = auto_malloc( sizeof( *thmfc1 ) );
1561		assert( thmfc1 );
	1559	thmfc1 = auto_alloc(machine, struct _thmfc1);
1562	1560
1563	1561	thmfc_floppy_cmd = timer_alloc( machine, thmfc_floppy_cmd_complete_cb, NULL );
1564	1562

src/mess/inputx.c

r4679	r4680
533	533	chars
534	534	-------------------------------------------------*/
535	535
536		static mess_input_code *build_codes(const input_port_config *portconfig)
	536	static mess_input_code *build_codes(running_machine *machine, const input_port_config *portconfig)
537	537	{
538	538	mess_input_code *codes = NULL;
539	539	const input_port_config *ports[NUM_SIMUL_KEYS];
r4679	r4680
545	545	if (code_count > 0)
546	546	{
547	547	/* allocate the codes */
548		codes = auto_malloc(sizeof(*codes) * (code_count + 1));
549		memset(codes, 0, sizeof(*codes) * (code_count + 1));
550
	548	codes = auto_alloc_array_clear(machine, mess_input_code, code_count + 1);
	549
551	550	/* and populate them */
552	551	scan_keys(portconfig, codes, ports, fields, 0, 0);
553	552	}
r4679	r4680
650	649	static void setup_keybuffer(running_machine *machine)
651	650	{
652	651	inputx_timer = timer_alloc(machine, inputx_timerproc, NULL);
653		keybuffer = auto_malloc(sizeof(key_buffer));
654		memset(keybuffer, 0, sizeof(*keybuffer));
	652	keybuffer = auto_alloc_clear(machine, key_buffer);
655	653	add_exit_callback(machine, clear_keybuffer);
656	654	}
657	655
r4679	r4680
675	673	/* posting keys directly only makes sense for a computer */
676	674	if (machine->gamedrv->flags & GAME_COMPUTER)
677	675	{
678		codes = build_codes(machine->portconfig);
	676	codes = build_codes(machine, machine->portconfig);
679	677	setup_keybuffer(machine);
680	678	}
681	679	}

src/mess/osd/winui/swconfig.c

r4679	r4680
17	17	software_config *config;
18	18
19	19	// allocate the software_config
20		config = malloc_or_die(sizeof(*config));
21		memset(config, 0, sizeof(*config));
	20	config = alloc_clear_or_die(software_config);
22	21
23	22	// allocate the machine config
24	23	config->mconfig = machine_config_alloc_with_mess_devices(drivers[driver_index]);

src/mess/eventlst.c

r4679	r4680
23	23	can be setup as:
24	24
25	25	Number_of_CPU_Cycles_In_A_Frame/Minimum_Number_Of_Cycles_Per_Instruction */
26		void EventList_Initialise(int NumEntries)
	26	void EventList_Initialise(running_machine *machine, int NumEntries)
27	27	{
28		pEventListBuffer = auto_malloc(sizeof(EVENT_LIST_ITEM)*NumEntries);
	28	pEventListBuffer = auto_alloc_array(machine, char, NumEntries);
29	29	TotalEvents = NumEntries;
30	30	CyclesPerFrame = 0;
31	31	EventList_Reset();

src/mess/eventlst.h

r4679	r4680
8	8	int Event_Time;
9	9	} EVENT_LIST_ITEM;
10	10
11		void   EventList_Initialise(int NumEntries);
	11	void   EventList_Initialise(running_machine *machine, int NumEntries);
12	12	void    EventList_Reset(void);
13	13	void    EventList_AddItem(int ID, int Data,int Time);
14	14	void    EventList_SetOffsetStartTime(int StartTime);

src/mess/mscommon.c

r4679	r4680
65	65	char_width = machine->gfx[gfx]->width;
66	66	char_height = machine->gfx[gfx]->height;
67	67
68		term = (struct terminal *) auto_malloc(sizeof(struct terminal) - sizeof(term->mem)
	68	term = (struct terminal *) auto_alloc_array(machine, char, sizeof(struct terminal) - sizeof(term->mem)
69	69	+ (num_cols * num_rows * sizeof(termchar_t)));
70	70
71	71	term->tm = tilemap_create(machine, terminal_gettileinfo, tilemap_scan_rows,

src/mess/formats/uef_cas.c

r4679	r4680
114	114	if ( in_ptr == NULL ) {
115	115	goto cleanup;
116	116	}
117		gz_ptr = (UINT8*) auto_malloc( inflate_size );
	117	gz_ptr = malloc( inflate_size );
118	118
119	119	d_stream.zalloc = 0;
120	120	d_stream.zfree = 0;

src/mess/formats/tzx_cas.c

r4679	r4680
85	85	int pos = sizeof(TZX_HEADER) + 2;
86	86	int max_block_count = INITIAL_MAX_BLOCK_COUNT;
87	87
88		blocks = auto_malloc( max_block_count * sizeof(UINT8*) );
	88	blocks = alloc_array_clear_or_die(UINT8*, max_block_count);
89	89	block_count = 0;
90	90
91	91	while( pos < caslen ) {
r4679	r4680
97	97	int   old_max_block_count = max_block_count;
98	98
99	99	max_block_count = max_block_count + BLOCK_COUNT_INCREMENTS;
100		blocks = auto_malloc( max_block_count * sizeof(UINT8*) );
	100	blocks = auto_alloc_array(NULL /*machine*/, UINT8*, max_block_count);   // SHOULD NOT BE USING auto_alloc_array()
101	101	memcpy( blocks, old_blocks, old_max_block_count * sizeof(UINT8*) );
102	102	}
103	103
r4679	r4680
183	183
184	184	block_count++;
185	185	}
	186	free(blocks);
186	187	}
187	188
188	189	INLINE int millisec_to_samplecount( int millisec ) {

src/mess/formats/csw_cas.c

r4679	r4680
93	93	//from here on down for now I am assuming it is compressed csw file.
94	94	in_ptr = (UINT8*) casdata+0x34+HeaderExtensionLength;
95	95
96		gz_ptr = (UINT8*) auto_malloc( 8 );
	96	gz_ptr = malloc( 8 );
97	97
98	98
99	99	d_stream.next_in = (unsigned char *)in_ptr;
r4679	r4680
211	211	//from here on down for now I am assuming it is compressed csw file.
212	212	in_ptr = (UINT8*) bytes+0x34+HeaderExtensionLength;
213	213
214		gz_ptr = (UINT8*) auto_malloc( 8 );
	214	gz_ptr = malloc( 8 );
215	215
216	216
217	217	d_stream.next_in = (unsigned char *)in_ptr;

src/mess/formats/thom_cas.c

r4679	r4680
122	122	}
123	123
124	124	to7_k7_bitsize = 0;
125		to7_k7_bits = auto_malloc( bitmax );
	125	to7_k7_bits = auto_alloc_array(machine, UINT8, bitmax );
126	126
127	127	/* store one period */
128	128	#if K7_SPEED_HACK
r4679	r4680
157	157	}                     \
158	158	if ( to7_k7_bitsize + 1 >= bitmax )         \
159	159	{                     \
160		UINT8* a = auto_malloc( bitmax * 2);      \
	160	UINT8* a = auto_alloc_array(machine, UINT8, bitmax * 2);      \
161	161	memcpy ( a, to7_k7_bits, bitmax );      \
162	162	bitmax *= 2;               \
163	163	to7_k7_bits = a;            \

src/mess/drivers/vip.c

r4679	r4680
281	281	switch (mess_ram_size)
282	282	{
283	283	case 1 * 1024:
284		memory_install_readwrite8_handler(program, 0x0000, 0x03ff, 0, 0x7c00, SMH_BANK1, SMH_BANK1);
	284	memory_install_readwrite8_handler(program, 0x0000, 0x03ff, 0, 0x7c00, SMH_BANK(1), SMH_BANK(1));
285	285	break;
286	286
287	287	case 2 * 1024:
288		memory_install_readwrite8_handler(program, 0x0000, 0x07ff, 0, 0x7800, SMH_BANK1, SMH_BANK1);
	288	memory_install_readwrite8_handler(program, 0x0000, 0x07ff, 0, 0x7800, SMH_BANK(1), SMH_BANK(1));
289	289	break;
290	290
291	291	case 4 * 1024:
292		memory_install_readwrite8_handler(program, 0x0000, 0x0fff, 0, 0x7000, SMH_BANK1, SMH_BANK1);
	292	memory_install_readwrite8_handler(program, 0x0000, 0x0fff, 0, 0x7000, SMH_BANK(1), SMH_BANK(1));
293	293	break;
294	294
295	295	case 32 * 1024:
296		memory_install_readwrite8_handler(program, 0x0000, 0x7fff, 0, 0, SMH_BANK1, SMH_BANK1);
	296	memory_install_readwrite8_handler(program, 0x0000, 0x7fff, 0, 0, SMH_BANK(1), SMH_BANK(1));
297	297	break;
298	298	}
299	299	}
r4679	r4680
582	582
583	583	/* ROM banking */
584	584
585		memory_install_readwrite8_handler(cputag_get_address_space(machine, CDP1802_TAG, ADDRESS_SPACE_PROGRAM), 0x8000, 0x81ff, 0, 0x7e00, SMH_BANK2, SMH_UNMAP);
	585	memory_install_readwrite8_handler(cputag_get_address_space(machine, CDP1802_TAG, ADDRESS_SPACE_PROGRAM), 0x8000, 0x81ff, 0, 0x7e00, SMH_BANK(2), SMH_UNMAP);
586	586	memory_configure_bank(machine, 2, 0, 1, memory_region(machine, CDP1802_TAG) + 0x8000, 0);
587	587	memory_set_bank(machine, 2, 0);
588	588
r4679	r4680
595	595
596	596	/* allocate color RAM */
597	597
598		state->colorram = auto_malloc(VP590_COLOR_RAM_SIZE);
	598	state->colorram = auto_alloc_array(machine, UINT8, VP590_COLOR_RAM_SIZE);
599	599
600	600	/* enable power LED */
601	601
r4679	r4680
662	662
663	663	/* enable ROM mirror at 0x0000 */
664	664
665		memory_install_readwrite8_handler(program, 0x0000, 0x01ff, 0, 0x7e00, SMH_BANK1, SMH_UNMAP);
	665	memory_install_readwrite8_handler(program, 0x0000, 0x01ff, 0, 0x7e00, SMH_BANK(1), SMH_UNMAP);
666	666	memory_set_bank(machine, 1, VIP_BANK_ROM);
667	667	}
668	668

src/mess/drivers/comquest.c

r4679	r4680
59	59	#endif
60	60
61	61	static ADDRESS_MAP_START( comquest_mem , ADDRESS_SPACE_PROGRAM, 8)
62		//  { 0x0000, 0x7fff, SMH_BANK1 },
	62	//  { 0x0000, 0x7fff, SMH_BANK(1) },
63	63	AM_RANGE(0x0000, 0x7fff) AM_ROM
64	64	AM_RANGE(0x8000, 0xffff) AM_READWRITE(SMH_ROM, SMH_RAM)
65	65	//  { 0x8000, 0xffff, SMH_RAM }, // batterie buffered

src/mess/drivers/dgn_beta.c

r4679	r4680
135	135	*/
136	136
137	137	static ADDRESS_MAP_START( dgnbeta_map, ADDRESS_SPACE_PROGRAM, 8 )
138		AM_RANGE(0x0000, 0x0FFF)    AM_READWRITE(SMH_BANK1      ,SMH_BANK1)
139		AM_RANGE(0x1000, 0x1FFF)    AM_READWRITE(SMH_BANK2      ,SMH_BANK2)
140		AM_RANGE(0x2000, 0x2FFF)    AM_READWRITE(SMH_BANK3      ,SMH_BANK3)
141		AM_RANGE(0x3000, 0x3FFF)    AM_READWRITE(SMH_BANK4      ,SMH_BANK4)
142		AM_RANGE(0x4000, 0x4FFF)    AM_READWRITE(SMH_BANK5      ,SMH_BANK5)
143		AM_RANGE(0x5000, 0x5FFF)    AM_READWRITE(SMH_BANK6      ,SMH_BANK6)
144		AM_RANGE(0x6000, 0x6FFF)    AM_READWRITE(SMH_BANK7      ,SMH_BANK7) AM_BASE(&videoram) AM_SIZE(&videoram_size)
145		AM_RANGE(0x7000, 0x7FFF)    AM_READWRITE(SMH_BANK8      ,SMH_BANK8)
146		AM_RANGE(0x8000, 0x8FFF)    AM_READWRITE(SMH_BANK9      ,SMH_BANK9)
147		AM_RANGE(0x9000, 0x9FFF)    AM_READWRITE(SMH_BANK10   ,SMH_BANK10)
148		AM_RANGE(0xA000, 0xAFFF)    AM_READWRITE(SMH_BANK11   ,SMH_BANK11)
149		AM_RANGE(0xB000, 0xBFFF)    AM_READWRITE(SMH_BANK12   ,SMH_BANK12)
150		AM_RANGE(0xC000, 0xCFFF)    AM_READWRITE(SMH_BANK13   ,SMH_BANK13)
151		AM_RANGE(0xD000, 0xDFFF)    AM_READWRITE(SMH_BANK14   ,SMH_BANK14)
152		AM_RANGE(0xE000, 0xEFFF)    AM_READWRITE(SMH_BANK15   ,SMH_BANK15)
153		AM_RANGE(0xF000, 0xFBFF)    AM_READWRITE(SMH_BANK16   ,SMH_BANK16)
	138	AM_RANGE(0x0000, 0x0FFF)    AM_READWRITE(SMH_BANK(1)      ,SMH_BANK(1))
	139	AM_RANGE(0x1000, 0x1FFF)    AM_READWRITE(SMH_BANK(2)      ,SMH_BANK(2))
	140	AM_RANGE(0x2000, 0x2FFF)    AM_READWRITE(SMH_BANK(3)      ,SMH_BANK(3))
	141	AM_RANGE(0x3000, 0x3FFF)    AM_READWRITE(SMH_BANK(4)      ,SMH_BANK(4))
	142	AM_RANGE(0x4000, 0x4FFF)    AM_READWRITE(SMH_BANK(5)      ,SMH_BANK(5))
	143	AM_RANGE(0x5000, 0x5FFF)    AM_READWRITE(SMH_BANK(6)      ,SMH_BANK(6))
	144	AM_RANGE(0x6000, 0x6FFF)    AM_READWRITE(SMH_BANK(7)      ,SMH_BANK(7)) AM_BASE(&videoram) AM_SIZE(&videoram_size)
	145	AM_RANGE(0x7000, 0x7FFF)    AM_READWRITE(SMH_BANK(8)      ,SMH_BANK(8))
	146	AM_RANGE(0x8000, 0x8FFF)    AM_READWRITE(SMH_BANK(9)      ,SMH_BANK(9))
	147	AM_RANGE(0x9000, 0x9FFF)    AM_READWRITE(SMH_BANK(10)   ,SMH_BANK(10))
	148	AM_RANGE(0xA000, 0xAFFF)    AM_READWRITE(SMH_BANK(11)   ,SMH_BANK(11))
	149	AM_RANGE(0xB000, 0xBFFF)    AM_READWRITE(SMH_BANK(12)   ,SMH_BANK(12))
	150	AM_RANGE(0xC000, 0xCFFF)    AM_READWRITE(SMH_BANK(13)   ,SMH_BANK(13))
	151	AM_RANGE(0xD000, 0xDFFF)    AM_READWRITE(SMH_BANK(14)   ,SMH_BANK(14))
	152	AM_RANGE(0xE000, 0xEFFF)    AM_READWRITE(SMH_BANK(15)   ,SMH_BANK(15))
	153	AM_RANGE(0xF000, 0xFBFF)    AM_READWRITE(SMH_BANK(16)   ,SMH_BANK(16))
154	154	AM_RANGE(0xfC00, 0xfC1F)   AM_READWRITE(SMH_NOP      ,SMH_NOP)
155	155	AM_RANGE(0xFC20, 0xFC23)   AM_DEVREADWRITE("pia_0", pia6821_r, pia6821_w)
156	156	AM_RANGE(0xFC24, 0xFC27)   AM_DEVREADWRITE("pia_1", pia6821_r, pia6821_w)
r4679	r4680
164	164	AM_RANGE(0xfce4, 0xfdff)   AM_READWRITE(SMH_NOP      ,SMH_NOP)
165	165	AM_RANGE(0xFE00, 0xFE0F)   AM_READWRITE(dgn_beta_page_r   ,dgn_beta_page_w)
166	166	AM_RANGE(0xfe10, 0xfEff)   AM_READWRITE(SMH_NOP      ,SMH_NOP)
167		AM_RANGE(0xFF00, 0xFFFF)    AM_READWRITE(SMH_BANK17   ,SMH_BANK17)
	167	AM_RANGE(0xFF00, 0xFFFF)    AM_READWRITE(SMH_BANK(17)   ,SMH_BANK(17))
168	168
169	169	ADDRESS_MAP_END
170	170

src/mess/drivers/ami1200.c

r4679	r4680
58	58	/* swap the write handlers between ROM and bank 1 based on the bit */
59	59	if ((data & 1) == 0)
60	60	/* overlay disabled, map RAM on 0x000000 */
61		memory_install_write32_handler(space, 0x000000, 0x1fffff, 0, 0, SMH_BANK1);
	61	memory_install_write32_handler(space, 0x000000, 0x1fffff, 0, 0, SMH_BANK(1));
62	62	else
63	63	/* overlay enabled, map Amiga system ROM on 0x000000 */
64	64	memory_install_write32_handler(space, 0x000000, 0x1fffff, 0, 0, SMH_UNMAP);

src/mess/drivers/c65.c

r4679	r4680
76	76
77	77	static ADDRESS_MAP_START( c65_mem , ADDRESS_SPACE_PROGRAM, 8)
78	78	AM_RANGE(0x00000, 0x07fff) AM_RAMBANK(11)
79		AM_RANGE(0x08000, 0x09fff) AM_READWRITE(SMH_BANK1, SMH_BANK12)
80		AM_RANGE(0x0a000, 0x0bfff) AM_READWRITE(SMH_BANK2, SMH_BANK13)
81		AM_RANGE(0x0c000, 0x0cfff) AM_READWRITE(SMH_BANK3, SMH_BANK14)
82		AM_RANGE(0x0d000, 0x0d7ff) AM_READWRITE(SMH_BANK4, SMH_BANK5)
83		AM_RANGE(0x0d800, 0x0dbff) AM_READWRITE(SMH_BANK6, SMH_BANK7)
84		AM_RANGE(0x0dc00, 0x0dfff) AM_READWRITE(SMH_BANK8, SMH_BANK9)
85		AM_RANGE(0x0e000, 0x0ffff) AM_READWRITE(SMH_BANK10, SMH_BANK15)
	79	AM_RANGE(0x08000, 0x09fff) AM_READWRITE(SMH_BANK(1), SMH_BANK(12))
	80	AM_RANGE(0x0a000, 0x0bfff) AM_READWRITE(SMH_BANK(2), SMH_BANK(13))
	81	AM_RANGE(0x0c000, 0x0cfff) AM_READWRITE(SMH_BANK(3), SMH_BANK(14))
	82	AM_RANGE(0x0d000, 0x0d7ff) AM_READWRITE(SMH_BANK(4), SMH_BANK(5))
	83	AM_RANGE(0x0d800, 0x0dbff) AM_READWRITE(SMH_BANK(6), SMH_BANK(7))
	84	AM_RANGE(0x0dc00, 0x0dfff) AM_READWRITE(SMH_BANK(8), SMH_BANK(9))
	85	AM_RANGE(0x0e000, 0x0ffff) AM_READWRITE(SMH_BANK(10), SMH_BANK(15))
86	86	AM_RANGE(0x10000, 0x1f7ff) AM_RAM
87	87	AM_RANGE(0x1f800, 0x1ffff) AM_RAM AM_BASE( &c64_colorram)
88	88

src/mess/drivers/atari.c

r4679	r4680
736	736	if( new_mmu & 0x01 )
737	737	{
738	738	logerror("%s MMU BIOS ROM\n", machine->gamedrv->name);
739		rbank3 = SMH_BANK3;
	739	rbank3 = SMH_BANK(3);
740	740	wbank3 = SMH_UNMAP;
741	741	base3 = memory_region(machine, "maincpu") + 0x14000;  /* 8K lo BIOS */
742		rbank4 = SMH_BANK4;
	742	rbank4 = SMH_BANK(4);
743	743	wbank4 = SMH_UNMAP;
744	744	base4 = memory_region(machine, "maincpu") + 0x15800;  /* 4K FP ROM + 8K hi BIOS */
745	745	}
746	746	else
747	747	{
748	748	logerror("%s MMU BIOS RAM\n", machine->gamedrv->name);
749		rbank3 = SMH_BANK3;
750		wbank3 = SMH_BANK3;
	749	rbank3 = SMH_BANK(3);
	750	wbank3 = SMH_BANK(3);
751	751	base3 = memory_region(machine, "maincpu") + 0x0c000;  /* 8K RAM */
752		rbank4 = SMH_BANK4;
753		wbank4 = SMH_BANK4;
	752	rbank4 = SMH_BANK(4);
	753	wbank4 = SMH_BANK(4);
754	754	base4 = memory_region(machine, "maincpu") + 0x0d800;  /* 4K RAM + 8K RAM */
755	755	}
756	756	memory_install_readwrite8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xc000, 0xcfff, 0, 0, rbank3, wbank3);
r4679	r4680
762	762	if( new_mmu & 0x02 )
763	763	{
764	764	logerror("%s MMU BASIC RAM\n", machine->gamedrv->name);
765		rbank1 = SMH_BANK1;
766		wbank1 = SMH_BANK1;
	765	rbank1 = SMH_BANK(1);
	766	wbank1 = SMH_BANK(1);
767	767	base1 = memory_region(machine, "maincpu") + 0x0a000;  /* 8K RAM */
768	768	}
769	769	else
770	770	{
771	771	logerror("%s MMU BASIC ROM\n", machine->gamedrv->name);
772		rbank1 = SMH_BANK1;
	772	rbank1 = SMH_BANK(1);
773	773	wbank1 = SMH_UNMAP;
774	774	base1 = memory_region(machine, "maincpu") + 0x10000;  /* 8K BASIC */
775	775	}
r4679	r4680
780	780	if( new_mmu & 0x80 )
781	781	{
782	782	logerror("%s MMU SELFTEST RAM\n", machine->gamedrv->name);
783		rbank2 = SMH_BANK2;
784		wbank2 = SMH_BANK2;
	783	rbank2 = SMH_BANK(2);
	784	wbank2 = SMH_BANK(2);
785	785	base2 = memory_region(machine, "maincpu") + 0x05000;  /* 0x0800 bytes */
786	786	}
787	787	else
788	788	{
789	789	logerror("%s MMU SELFTEST ROM\n", machine->gamedrv->name);
790		rbank2 = SMH_BANK2;
	790	rbank2 = SMH_BANK(2);
791	791	wbank2 = SMH_UNMAP;
792	792	base2 = memory_region(machine, "maincpu") + 0x15000;  /* 0x0800 bytes */
793	793	}
r4679	r4680
806	806	if( new_mmu & 0x01 )
807	807	{
808	808	logerror("%s MMU BIOS ROM\n", machine->gamedrv->name);
809		rbank3 = SMH_BANK3;
	809	rbank3 = SMH_BANK(3);
810	810	wbank3 = SMH_UNMAP;
811	811	base3 = memory_region(machine, "maincpu") + 0x14000;  /* 8K lo BIOS */
812		rbank4 = SMH_BANK4;
	812	rbank4 = SMH_BANK(4);
813	813	wbank4 = SMH_UNMAP;
814	814	base4 = memory_region(machine, "maincpu") + 0x15800;  /* 4K FP ROM + 8K hi BIOS */
815	815	}
816	816	else
817	817	{
818	818	logerror("%s MMU BIOS RAM\n", machine->gamedrv->name);
819		rbank3 = SMH_BANK3;
820		wbank3 = SMH_BANK3;
	819	rbank3 = SMH_BANK(3);
	820	wbank3 = SMH_BANK(3);
821	821	base3 = memory_region(machine, "maincpu") + 0x0c000;  /* 8K RAM */
822		rbank4 = SMH_BANK4;
823		wbank4 = SMH_BANK4;
	822	rbank4 = SMH_BANK(4);
	823	wbank4 = SMH_BANK(4);
824	824	base4 = memory_region(machine, "maincpu") + 0x0d800;  /* 4K RAM + 8K RAM */
825	825	}
826	826	memory_install_readwrite8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xc000, 0xcfff, 0, 0, rbank3, wbank3);
r4679	r4680
832	832	if( new_mmu & 0x80 )
833	833	{
834	834	logerror("%s MMU SELFTEST RAM\n", machine->gamedrv->name);
835		rbank2 = SMH_BANK2;
836		wbank2 = SMH_BANK2;
	835	rbank2 = SMH_BANK(2);
	836	wbank2 = SMH_BANK(2);
837	837	base2 = memory_region(machine, "maincpu") + 0x05000;  /* 0x0800 bytes */
838	838	}
839	839	else
840	840	{
841	841	logerror("%s MMU SELFTEST ROM\n", machine->gamedrv->name);
842		rbank2 = SMH_BANK2;
	842	rbank2 = SMH_BANK(2);
843	843	wbank2 = SMH_UNMAP;
844	844	base2 = memory_region(machine, "maincpu") + 0x15000;  /* 0x0800 bytes */
845	845	}
r4679	r4680
1292	1292	{
1293	1293	UINT8 *rom = memory_region(machine, "maincpu");
1294	1294
1295		memory_install_readwrite8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xa000, 0xbfff, 0, 0, SMH_BANK1, SMH_UNMAP);
1296		memory_install_readwrite8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x5000, 0x57ff, 0, 0, SMH_BANK2, SMH_UNMAP);
1297		memory_install_readwrite8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xc000, 0xcfff, 0, 0, SMH_BANK3, SMH_UNMAP);
1298		memory_install_readwrite8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xd800, 0xffff, 0, 0, SMH_BANK4, SMH_UNMAP);
	1295	memory_install_readwrite8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xa000, 0xbfff, 0, 0, SMH_BANK(1), SMH_UNMAP);
	1296	memory_install_readwrite8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x5000, 0x57ff, 0, 0, SMH_BANK(2), SMH_UNMAP);
	1297	memory_install_readwrite8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xc000, 0xcfff, 0, 0, SMH_BANK(3), SMH_UNMAP);
	1298	memory_install_readwrite8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xd800, 0xffff, 0, 0, SMH_BANK(4), SMH_UNMAP);
1299	1299	memory_set_bankptr(machine, 1, rom + 0x10000);
1300	1300	memory_set_bankptr(machine, 2, rom + 0x15000);
1301	1301	memory_set_bankptr(machine, 3, rom + 0x14000);

src/mess/drivers/nc.c

r4679	r4680
331	331
332	332
333	333	static const read8_space_func nc_bankhandler_r[]={
334		SMH_BANK1, SMH_BANK2, SMH_BANK3, SMH_BANK4};
	334	SMH_BANK(1), SMH_BANK(2), SMH_BANK(3), SMH_BANK(4)};
335	335
336	336	static const write8_space_func nc_bankhandler_w[]={
337		SMH_BANK5, SMH_BANK6, SMH_BANK7, SMH_BANK8};
	337	SMH_BANK(5), SMH_BANK(6), SMH_BANK(7), SMH_BANK(8)};
338	338
339	339	static void nc_refresh_memory_bank_config(running_machine *machine, int bank)
340	340	{
r4679	r4680
605	605	}
606	606
607	607	static ADDRESS_MAP_START(nc_map, ADDRESS_SPACE_PROGRAM, 8 )
608		AM_RANGE(0x0000, 0x3fff) AM_READWRITE(SMH_BANK1, SMH_BANK5)
609		AM_RANGE(0x4000, 0x7fff) AM_READWRITE(SMH_BANK2, SMH_BANK6)
610		AM_RANGE(0x8000, 0xbfff) AM_READWRITE(SMH_BANK3, SMH_BANK7)
611		AM_RANGE(0xc000, 0xffff) AM_READWRITE(SMH_BANK4, SMH_BANK8)
	608	AM_RANGE(0x0000, 0x3fff) AM_READWRITE(SMH_BANK(1), SMH_BANK(5))
	609	AM_RANGE(0x4000, 0x7fff) AM_READWRITE(SMH_BANK(2), SMH_BANK(6))
	610	AM_RANGE(0x8000, 0xbfff) AM_READWRITE(SMH_BANK(3), SMH_BANK(7))
	611	AM_RANGE(0xc000, 0xffff) AM_READWRITE(SMH_BANK(4), SMH_BANK(8))
612	612	ADDRESS_MAP_END
613	613
614	614

src/mess/drivers/adam.c

r4679	r4680
195	195	#include "formats/adam_dsk.h"
196	196
197	197	static ADDRESS_MAP_START( adam_mem, ADDRESS_SPACE_PROGRAM, 8)
198		AM_RANGE(0x00000, 0x01fff) AM_READWRITE( SMH_BANK1, SMH_BANK6 )
199		AM_RANGE(0x02000, 0x03fff) AM_READWRITE( SMH_BANK2, SMH_BANK7 )
200		AM_RANGE(0x04000, 0x05fff) AM_READWRITE( SMH_BANK3, SMH_BANK8 )
201		AM_RANGE(0x06000, 0x07fff) AM_READWRITE( SMH_BANK4, SMH_BANK9 )
202		AM_RANGE(0x08000, 0x0ffff) AM_READWRITE( SMH_BANK5, adam_common_writes_w )
	198	AM_RANGE(0x00000, 0x01fff) AM_READWRITE( SMH_BANK(1), SMH_BANK(6) )
	199	AM_RANGE(0x02000, 0x03fff) AM_READWRITE( SMH_BANK(2), SMH_BANK(7) )
	200	AM_RANGE(0x04000, 0x05fff) AM_READWRITE( SMH_BANK(3), SMH_BANK(8) )
	201	AM_RANGE(0x06000, 0x07fff) AM_READWRITE( SMH_BANK(4), SMH_BANK(9) )
	202	AM_RANGE(0x08000, 0x0ffff) AM_READWRITE( SMH_BANK(5), adam_common_writes_w )
203	203	ADDRESS_MAP_END
204	204
205	205	static ADDRESS_MAP_START ( adam_io, ADDRESS_SPACE_IO, 8)

src/mess/drivers/mbee.c

r4679	r4680
111	111	AM_RANGE(0x1000, 0x3fff) AM_RAM
112	112	AM_RANGE(0x4000, 0x7fff) AM_WRITENOP   /* Needed because quickload to here will crash MESS otherwise */
113	113	AM_RANGE(0x8000, 0xefff) AM_ROM
114		AM_RANGE(0xf000, 0xf7ff) AM_READWRITE(SMH_BANK2, mbee_videoram_w) AM_SIZE(&videoram_size)
115		AM_RANGE(0xf800, 0xffff) AM_READWRITE(SMH_BANK3, mbee_pcg_w)
	114	AM_RANGE(0xf000, 0xf7ff) AM_READWRITE(SMH_BANK(2), mbee_videoram_w) AM_SIZE(&videoram_size)
	115	AM_RANGE(0xf800, 0xffff) AM_READWRITE(SMH_BANK(3), mbee_pcg_w)
116	116	ADDRESS_MAP_END
117	117
118	118	static ADDRESS_MAP_START(mbeeic_mem, ADDRESS_SPACE_PROGRAM, 8)
r4679	r4680
120	120	AM_RANGE(0x0000, 0x0fff) AM_RAMBANK(1)
121	121	AM_RANGE(0x1000, 0x7fff) AM_RAM
122	122	AM_RANGE(0x8000, 0xefff) AM_ROM
123		AM_RANGE(0xf000, 0xf7ff) AM_READWRITE(SMH_BANK2, mbee_videoram_w) AM_SIZE(&videoram_size)
124		AM_RANGE(0xf800, 0xffff) AM_READWRITE(SMH_BANK3, mbee_pcg_color_w)
	123	AM_RANGE(0xf000, 0xf7ff) AM_READWRITE(SMH_BANK(2), mbee_videoram_w) AM_SIZE(&videoram_size)
	124	AM_RANGE(0xf800, 0xffff) AM_READWRITE(SMH_BANK(3), mbee_pcg_color_w)
125	125	ADDRESS_MAP_END
126	126
127	127	static ADDRESS_MAP_START(mbeepc85_mem, ADDRESS_SPACE_PROGRAM, 8)
r4679	r4680
131	131	AM_RANGE(0x8000, 0xbfff) AM_ROM
132	132	AM_RANGE(0xc000, 0xdfff) AM_ROMBANK(4)
133	133	AM_RANGE(0xe000, 0xefff) AM_ROMBANK(5)
134		AM_RANGE(0xf000, 0xf7ff) AM_READWRITE(SMH_BANK2, mbee_videoram_w) AM_SIZE(&videoram_size)
135		AM_RANGE(0xf800, 0xffff) AM_READWRITE(SMH_BANK3, mbee_pcg_color_w)
	134	AM_RANGE(0xf000, 0xf7ff) AM_READWRITE(SMH_BANK(2), mbee_videoram_w) AM_SIZE(&videoram_size)
	135	AM_RANGE(0xf800, 0xffff) AM_READWRITE(SMH_BANK(3), mbee_pcg_color_w)
136	136	ADDRESS_MAP_END
137	137
138	138	static ADDRESS_MAP_START(mbee56_mem, ADDRESS_SPACE_PROGRAM, 8)
r4679	r4680
140	140	AM_RANGE(0x0000, 0x0fff) AM_RAMBANK(1)
141	141	AM_RANGE(0x1000, 0xdfff) AM_RAM
142	142	AM_RANGE(0xe000, 0xefff) AM_ROM
143		AM_RANGE(0xf000, 0xf7ff) AM_READWRITE(SMH_BANK2, mbee_videoram_w) AM_SIZE(&videoram_size)
144		AM_RANGE(0xf800, 0xffff) AM_READWRITE(SMH_BANK3, mbee_pcg_color_w)
	143	AM_RANGE(0xf000, 0xf7ff) AM_READWRITE(SMH_BANK(2), mbee_videoram_w) AM_SIZE(&videoram_size)
	144	AM_RANGE(0xf800, 0xffff) AM_READWRITE(SMH_BANK(3), mbee_pcg_color_w)
145	145	ADDRESS_MAP_END
146	146
147	147

src/mess/drivers/pentagon.c

r4679	r4680
92	92	{
93	93	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
94	94
95		memory_install_read8_handler(space, 0x0000, 0x3fff, 0, 0, SMH_BANK1);
	95	memory_install_read8_handler(space, 0x0000, 0x3fff, 0, 0, SMH_BANK(1));
96	96	memory_install_write8_handler(space, 0x0000, 0x3fff, 0, 0, SMH_UNMAP);
97	97
98	98	betadisk_enable();

src/mess/drivers/coco.c

r4679	r4680
119	119	AM_RANGE(0xff80, 0xff85) AM_DEVREADWRITE("vhd", coco_vhd_io_r, coco_vhd_io_w)
120	120	AM_RANGE(0xff90, 0xff9f) AM_READWRITE(coco3_gime_r,         coco3_gime_w)
121	121	AM_RANGE(0xffa0, 0xffaf) AM_READWRITE(coco3_mmu_r,         coco3_mmu_w)
122		AM_RANGE(0xffb0, 0xffbf) AM_READWRITE(SMH_BANK10,         coco3_palette_w)
	122	AM_RANGE(0xffb0, 0xffbf) AM_READWRITE(SMH_BANK(10),         coco3_palette_w)
123	123	AM_RANGE(0xffc0, 0xffdf) AM_DEVWRITE("sam", sam6883_w)
124	124	AM_RANGE(0xffe0, 0xffef) AM_NOP
125	125	AM_RANGE(0xfff0, 0xffff) AM_ROM AM_REGION("maincpu", 0x7ff0)

src/mess/drivers/spc1000.c

r4679	r4680
20	20
21	21	static ADDRESS_MAP_START(spc1000_mem, ADDRESS_SPACE_PROGRAM, 8)
22	22	ADDRESS_MAP_UNMAP_HIGH
23		AM_RANGE( 0x0000, 0x7fff ) AM_READWRITE(SMH_BANK1, SMH_BANK2)
24		AM_RANGE( 0x8000, 0xffff ) AM_READWRITE(SMH_BANK3, SMH_BANK4)
	23	AM_RANGE( 0x0000, 0x7fff ) AM_READWRITE(SMH_BANK(1), SMH_BANK(2))
	24	AM_RANGE( 0x8000, 0xffff ) AM_READWRITE(SMH_BANK(3), SMH_BANK(4))
25	25	ADDRESS_MAP_END
26	26
27	27	static WRITE8_HANDLER(spc1000_iplk_w)
r4679	r4680
187	187	{
188	188	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
189	189
190		memory_install_read8_handler(space, 0x0000, 0x7fff, 0, 0, SMH_BANK1);
191		memory_install_read8_handler(space, 0x8000, 0xffff, 0, 0, SMH_BANK3);
	190	memory_install_read8_handler(space, 0x0000, 0x7fff, 0, 0, SMH_BANK(1));
	191	memory_install_read8_handler(space, 0x8000, 0xffff, 0, 0, SMH_BANK(3));
192	192
193		memory_install_write8_handler(space, 0x0000, 0x7fff, 0, 0, SMH_BANK2);
194		memory_install_write8_handler(space, 0x8000, 0xffff, 0, 0, SMH_BANK4);
	193	memory_install_write8_handler(space, 0x0000, 0x7fff, 0, 0, SMH_BANK(2));
	194	memory_install_write8_handler(space, 0x8000, 0xffff, 0, 0, SMH_BANK(4));
195	195
196	196	memory_set_bankptr(machine, 1, memory_region(machine, "maincpu"));
197	197	memory_set_bankptr(machine, 2, mess_ram);
r4679	r4680
228	228	{
229	229	m6847_config cfg;
230	230
231		spc1000_video_ram = auto_malloc (0x2000);
	231	spc1000_video_ram = auto_alloc_array (machine, UINT8, 0x2000);
232	232
233	233	memset(&cfg, 0, sizeof(cfg));
234	234	cfg.type = M6847_VERSION_M6847T1_NTSC;

src/mess/drivers/z88.c

r4679	r4680
299	299	}
300	300
301	301	static ADDRESS_MAP_START(z88_mem, ADDRESS_SPACE_PROGRAM, 8 )
302		AM_RANGE(0x0000, 0x1fff) AM_READWRITE(SMH_BANK1, SMH_BANK6)
303		AM_RANGE(0x2000, 0x3fff) AM_READWRITE(SMH_BANK2, SMH_BANK7)
304		AM_RANGE(0x4000, 0x7fff) AM_READWRITE(SMH_BANK3, SMH_BANK8)
305		AM_RANGE(0x8000, 0xbfff) AM_READWRITE(SMH_BANK4, SMH_BANK9)
306		AM_RANGE(0xc000, 0xffff) AM_READWRITE(SMH_BANK5, SMH_BANK10)
	302	AM_RANGE(0x0000, 0x1fff) AM_READWRITE(SMH_BANK(1), SMH_BANK(6))
	303	AM_RANGE(0x2000, 0x3fff) AM_READWRITE(SMH_BANK(2), SMH_BANK(7))
	304	AM_RANGE(0x4000, 0x7fff) AM_READWRITE(SMH_BANK(3), SMH_BANK(8))
	305	AM_RANGE(0x8000, 0xbfff) AM_READWRITE(SMH_BANK(4), SMH_BANK(9))
	306	AM_RANGE(0xc000, 0xffff) AM_READWRITE(SMH_BANK(5), SMH_BANK(10))
307	307	ADDRESS_MAP_END
308	308
309	309	static void blink_pb_w(int offset, int data, int reg_index)

src/mess/drivers/pcw16.c

r4679	r4680
157	157	}
158	158
159	159	static ADDRESS_MAP_START(pcw16_map, ADDRESS_SPACE_PROGRAM, 8 )
160		AM_RANGE(0x0000, 0x3fff) AM_READWRITE(SMH_BANK1, SMH_BANK5)
161		AM_RANGE(0x4000, 0x7fff) AM_READWRITE(SMH_BANK2, SMH_BANK6)
162		AM_RANGE(0x8000, 0xbfff) AM_READWRITE(SMH_BANK3, SMH_BANK7)
163		AM_RANGE(0xc000, 0xffff) AM_READWRITE(SMH_BANK4, SMH_BANK8)
	160	AM_RANGE(0x0000, 0x3fff) AM_READWRITE(SMH_BANK(1), SMH_BANK(5))
	161	AM_RANGE(0x4000, 0x7fff) AM_READWRITE(SMH_BANK(2), SMH_BANK(6))
	162	AM_RANGE(0x8000, 0xbfff) AM_READWRITE(SMH_BANK(3), SMH_BANK(7))
	163	AM_RANGE(0xc000, 0xffff) AM_READWRITE(SMH_BANK(4), SMH_BANK(8))
164	164	ADDRESS_MAP_END
165	165
166	166
r4679	r4680
173	173
174	174	static const write8_space_func pcw16_write_handler_dram[4] =
175	175	{
176		SMH_BANK5,
177		SMH_BANK6,
178		SMH_BANK7,
179		SMH_BANK8
	176	SMH_BANK(5),
	177	SMH_BANK(6),
	178	SMH_BANK(7),
	179	SMH_BANK(8)
180	180	};
181	181
182	182	static const read8_space_func pcw16_read_handler_dram[4] =
183	183	{
184		SMH_BANK1,
185		SMH_BANK2,
186		SMH_BANK3,
187		SMH_BANK4
	184	SMH_BANK(1),
	185	SMH_BANK(2),
	186	SMH_BANK(3),
	187	SMH_BANK(4)
188	188	};
189	189	/*******************************************/
190	190

src/mess/drivers/msx.c

r4679	r4680
296	296	#include "sound/2413intf.h"
297	297
298	298	static ADDRESS_MAP_START (msx_memory_map, ADDRESS_SPACE_PROGRAM, 8)
299		AM_RANGE( 0x0000, 0x1fff) AM_READWRITE( SMH_BANK1, msx_page0_w )
300		AM_RANGE( 0x2000, 0x3fff) AM_READWRITE( SMH_BANK2, msx_page0_1_w )
301		AM_RANGE( 0x4000, 0x5fff) AM_READWRITE( SMH_BANK3, msx_page1_w )
302		AM_RANGE( 0x6000, 0x7ff7) AM_READWRITE( SMH_BANK4, msx_page1_1_w )
303		AM_RANGE( 0x7ff8, 0x7fff) AM_READWRITE( SMH_BANK5, msx_page1_2_w )
304		AM_RANGE( 0x8000, 0x97ff) AM_READWRITE( SMH_BANK6, msx_page2_w )
305		AM_RANGE( 0x9800, 0x9fff) AM_READWRITE( SMH_BANK7, msx_page2_1_w )
306		AM_RANGE( 0xa000, 0xb7ff) AM_READWRITE( SMH_BANK8, msx_page2_2_w )
307		AM_RANGE( 0xb800, 0xbfff) AM_READWRITE( SMH_BANK9, msx_page2_3_w )
308		AM_RANGE( 0xc000, 0xdfff) AM_READWRITE( SMH_BANK10, msx_page3_w )
309		AM_RANGE( 0xe000, 0xfffe) AM_READWRITE( SMH_BANK11, msx_page3_1_w )
	299	AM_RANGE( 0x0000, 0x1fff) AM_READWRITE( SMH_BANK(1), msx_page0_w )
	300	AM_RANGE( 0x2000, 0x3fff) AM_READWRITE( SMH_BANK(2), msx_page0_1_w )
	301	AM_RANGE( 0x4000, 0x5fff) AM_READWRITE( SMH_BANK(3), msx_page1_w )
	302	AM_RANGE( 0x6000, 0x7ff7) AM_READWRITE( SMH_BANK(4), msx_page1_1_w )
	303	AM_RANGE( 0x7ff8, 0x7fff) AM_READWRITE( SMH_BANK(5), msx_page1_2_w )
	304	AM_RANGE( 0x8000, 0x97ff) AM_READWRITE( SMH_BANK(6), msx_page2_w )
	305	AM_RANGE( 0x9800, 0x9fff) AM_READWRITE( SMH_BANK(7), msx_page2_1_w )
	306	AM_RANGE( 0xa000, 0xb7ff) AM_READWRITE( SMH_BANK(8), msx_page2_2_w )
	307	AM_RANGE( 0xb800, 0xbfff) AM_READWRITE( SMH_BANK(9), msx_page2_3_w )
	308	AM_RANGE( 0xc000, 0xdfff) AM_READWRITE( SMH_BANK(10), msx_page3_w )
	309	AM_RANGE( 0xe000, 0xfffe) AM_READWRITE( SMH_BANK(11), msx_page3_1_w )
310	310	AM_RANGE( 0xffff, 0xffff) AM_READWRITE( msx_sec_slot_r, msx_sec_slot_w )
311	311	ADDRESS_MAP_END
312	312

src/mess/drivers/tmc600.c

r4679	r4680
281	281	switch (mess_ram_size)
282	282	{
283	283	case 8*1024:
284		memory_install_readwrite8_handler(program, 0x6000, 0x7fff, 0, 0, SMH_BANK1, SMH_BANK1);
	284	memory_install_readwrite8_handler(program, 0x6000, 0x7fff, 0, 0, SMH_BANK(1), SMH_BANK(1));
285	285	memory_install_readwrite8_handler(program, 0x8000, 0xbfff, 0, 0, SMH_UNMAP, SMH_UNMAP);
286	286	break;
287	287
288	288	case 16*1024:
289		memory_install_readwrite8_handler(program, 0x6000, 0x9fff, 0, 0, SMH_BANK1, SMH_BANK1);
	289	memory_install_readwrite8_handler(program, 0x6000, 0x9fff, 0, 0, SMH_BANK(1), SMH_BANK(1));
290	290	memory_install_readwrite8_handler(program, 0xa000, 0xbfff, 0, 0, SMH_UNMAP, SMH_UNMAP);
291	291	break;
292	292
293	293	case 24*1024:
294		memory_install_readwrite8_handler(program, 0x6000, 0xbfff, 0, 0, SMH_BANK1, SMH_BANK1);
	294	memory_install_readwrite8_handler(program, 0x6000, 0xbfff, 0, 0, SMH_BANK(1), SMH_BANK(1));
295	295	break;
296	296	}
297	297

src/mess/drivers/lynx.c

r4679	r4680
18	18	AM_RANGE(0x0000, 0xfbff) AM_RAM AM_BASE(&lynx_mem_0000)
19	19	AM_RANGE(0xfc00, 0xfcff) AM_RAM AM_BASE(&lynx_mem_fc00)
20	20	AM_RANGE(0xfd00, 0xfdff) AM_RAM AM_BASE(&lynx_mem_fd00)
21		AM_RANGE(0xfe00, 0xfff7) AM_READWRITE(SMH_BANK3, SMH_RAM) AM_BASE(&lynx_mem_fe00) AM_SIZE(&lynx_mem_fe00_size)
	21	AM_RANGE(0xfe00, 0xfff7) AM_READWRITE(SMH_BANK(3), SMH_RAM) AM_BASE(&lynx_mem_fe00) AM_SIZE(&lynx_mem_fe00_size)
22	22	AM_RANGE(0xfff8, 0xfff8) AM_RAM
23	23	AM_RANGE(0xfff9, 0xfff9) AM_READWRITE(lynx_memory_config_r, lynx_memory_config_w)
24		AM_RANGE(0xfffa, 0xffff) AM_READWRITE(SMH_BANK4, SMH_RAM) AM_BASE(&lynx_mem_fffa)
	24	AM_RANGE(0xfffa, 0xffff) AM_READWRITE(SMH_BANK(4), SMH_RAM) AM_BASE(&lynx_mem_fffa)
25	25	ADDRESS_MAP_END
26	26
27	27	static INPUT_PORTS_START( lynx )

src/mess/drivers/aquarius.c

r4679	r4680
348	348
349	349	static MACHINE_START( aquarius )
350	350	{
351		decrypt_rom = auto_malloc(16*1024);
	351	decrypt_rom = auto_alloc_array(machine, UINT8, 16*1024);
352	352	}
353	353
354	354	static MACHINE_RESET( aquarius )
r4679	r4680
362	362	break;
363	363
364	364	case 8 * 1024: // 4K expansion
365		memory_install_readwrite8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x4000, 0x4fff, 0, 0, SMH_BANK1, SMH_BANK1);
	365	memory_install_readwrite8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x4000, 0x4fff, 0, 0, SMH_BANK(1), SMH_BANK(1));
366	366	memory_install_readwrite8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x5000, 0xbfff, 0, 0, SMH_UNMAP, SMH_UNMAP);
367	367	break;
368	368
369	369	case 20 * 1024: // 16K expansion
370		memory_install_readwrite8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x4000, 0x8fff, 0, 0, SMH_BANK1, SMH_BANK1);
	370	memory_install_readwrite8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x4000, 0x8fff, 0, 0, SMH_BANK(1), SMH_BANK(1));
371	371	memory_install_readwrite8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x9000, 0xbfff, 0, 0, SMH_UNMAP, SMH_UNMAP);
372	372	break;
373	373
374	374	case 36 * 1024: // 32K expansion (prototype)
375		memory_install_readwrite8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x4000, 0xbfff, 0, 0, SMH_BANK1, SMH_BANK1);
	375	memory_install_readwrite8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x4000, 0xbfff, 0, 0, SMH_BANK(1), SMH_BANK(1));
376	376	break;
377	377	}
378	378
r4679	r4680
398	398	switch (size)
399	399	{
400	400	case 8 * 1024:
401		memory_install_readwrite8_handler(cputag_get_address_space(image->machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xc000, 0xdfff, 0, 0x2000, SMH_BANK2, SMH_UNMAP);
	401	memory_install_readwrite8_handler(cputag_get_address_space(image->machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xc000, 0xdfff, 0, 0x2000, SMH_BANK(2), SMH_UNMAP);
402	402	break;
403	403
404	404	case 16 * 1024:
405		memory_install_readwrite8_handler(cputag_get_address_space(image->machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xc000, 0xffff, 0, 0, SMH_BANK2, SMH_UNMAP);
	405	memory_install_readwrite8_handler(cputag_get_address_space(image->machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0xc000, 0xffff, 0, 0, SMH_BANK(2), SMH_UNMAP);
406	406	break;
407	407	}
408	408

src/mess/drivers/scorpion.c

r4679	r4680
200	200
201	201	if ((scorpion_256_port_1ffd_data & 0x01)==0x01)
202	202	{
203		memory_install_write8_handler(space, 0x0000, 0x3fff, 0, 0, SMH_BANK1);
	203	memory_install_write8_handler(space, 0x0000, 0x3fff, 0, 0, SMH_BANK(1));
204	204	memory_set_bankptr(machine, 1, mess_ram+(8<<14));
205	205	logerror("RAM\n");
206	206	}
r4679	r4680
301	301	{
302	302	const address_space *space = cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM);
303	303
304		memory_install_read8_handler (space, 0x0000, 0x3fff, 0, 0, SMH_BANK1);
	304	memory_install_read8_handler (space, 0x0000, 0x3fff, 0, 0, SMH_BANK(1));
305	305
306	306	betadisk_disable();
307	307	betadisk_clear_status();

src/mess/drivers/specpls3.c

r4679	r4680
275	275	ram_data = mess_ram + (memory_selection[0] << 14);
276	276	memory_set_bankptr(machine, 1, ram_data);
277	277	/* allow writes to 0x0000-0x03fff */
278		memory_install_write8_handler(space, 0x0000, 0x3fff, 0, 0, SMH_BANK1);
	278	memory_install_write8_handler(space, 0x0000, 0x3fff, 0, 0, SMH_BANK(1));
279	279
280	280	ram_data = mess_ram + (memory_selection[1] << 14);
281	281	memory_set_bankptr(machine, 2, ram_data);

src/mess/drivers/abc80.c

r4679	r4680
498	498	break;
499	499
500	500	case 32*1024:
501		memory_install_readwrite8_handler(cputag_get_address_space(machine, Z80_TAG, ADDRESS_SPACE_PROGRAM), 0x8000, 0xbfff, 0, 0, SMH_BANK1, SMH_BANK1);
	501	memory_install_readwrite8_handler(cputag_get_address_space(machine, Z80_TAG, ADDRESS_SPACE_PROGRAM), 0x8000, 0xbfff, 0, 0, SMH_BANK(1), SMH_BANK(1));
502	502	break;
503	503	}
504	504

src/mess/drivers/pmd85.c

r4679	r4680
192	192	/* memory w/r functions */
193	193
194	194	static ADDRESS_MAP_START( pmd85_mem , ADDRESS_SPACE_PROGRAM, 8)
195		AM_RANGE(0x0000, 0x0fff) AM_READWRITE(SMH_BANK1, SMH_BANK1)
196		AM_RANGE(0x1000, 0x1fff) AM_READWRITE(SMH_BANK2, SMH_BANK2)
197		AM_RANGE(0x2000, 0x2fff) AM_READWRITE(SMH_BANK3, SMH_BANK3)
198		AM_RANGE(0x3000, 0x3fff) AM_READWRITE(SMH_BANK4, SMH_BANK4)
199		AM_RANGE(0x4000, 0x7fff) AM_READWRITE(SMH_BANK5, SMH_BANK5)
200		AM_RANGE(0x8000, 0x8fff) AM_READWRITE(SMH_BANK6, SMH_ROM)
	195	AM_RANGE(0x0000, 0x0fff) AM_READWRITE(SMH_BANK(1), SMH_BANK(1))
	196	AM_RANGE(0x1000, 0x1fff) AM_READWRITE(SMH_BANK(2), SMH_BANK(2))
	197	AM_RANGE(0x2000, 0x2fff) AM_READWRITE(SMH_BANK(3), SMH_BANK(3))
	198	AM_RANGE(0x3000, 0x3fff) AM_READWRITE(SMH_BANK(4), SMH_BANK(4))
	199	AM_RANGE(0x4000, 0x7fff) AM_READWRITE(SMH_BANK(5), SMH_BANK(5))
	200	AM_RANGE(0x8000, 0x8fff) AM_READWRITE(SMH_BANK(6), SMH_ROM)
201	201	AM_RANGE(0x9000, 0x9fff) AM_READWRITE(SMH_NOP,   SMH_NOP)
202		AM_RANGE(0xa000, 0xafff) AM_READWRITE(SMH_BANK7, SMH_ROM)
	202	AM_RANGE(0xa000, 0xafff) AM_READWRITE(SMH_BANK(7), SMH_ROM)
203	203	AM_RANGE(0xb000, 0xbfff) AM_READWRITE(SMH_NOP,   SMH_NOP)
204		AM_RANGE(0xc000, 0xffff) AM_READWRITE(SMH_BANK8, SMH_BANK8)
	204	AM_RANGE(0xc000, 0xffff) AM_READWRITE(SMH_BANK(8), SMH_BANK(8))
205	205	ADDRESS_MAP_END
206	206
207	207	static ADDRESS_MAP_START( pmd852a_mem , ADDRESS_SPACE_PROGRAM, 8)
208		AM_RANGE(0x0000, 0x0fff) AM_READWRITE(SMH_BANK1, SMH_BANK1)
209		AM_RANGE(0x1000, 0x1fff) AM_READWRITE(SMH_BANK2, SMH_BANK2)
210		AM_RANGE(0x2000, 0x2fff) AM_READWRITE(SMH_BANK3, SMH_BANK3)
211		AM_RANGE(0x3000, 0x3fff) AM_READWRITE(SMH_BANK4, SMH_BANK4)
212		AM_RANGE(0x4000, 0x7fff) AM_READWRITE(SMH_BANK5, SMH_BANK5)
213		AM_RANGE(0x8000, 0x8fff) AM_READWRITE(SMH_BANK6, SMH_ROM)
214		AM_RANGE(0x9000, 0x9fff) AM_READWRITE(SMH_BANK7, SMH_BANK7)
215		AM_RANGE(0xa000, 0xafff) AM_READWRITE(SMH_BANK8, SMH_ROM)
216		AM_RANGE(0xb000, 0xbfff) AM_READWRITE(SMH_BANK9, SMH_BANK9)
217		AM_RANGE(0xc000, 0xffff) AM_READWRITE(SMH_BANK10, SMH_BANK10)
	208	AM_RANGE(0x0000, 0x0fff) AM_READWRITE(SMH_BANK(1), SMH_BANK(1))
	209	AM_RANGE(0x1000, 0x1fff) AM_READWRITE(SMH_BANK(2), SMH_BANK(2))
	210	AM_RANGE(0x2000, 0x2fff) AM_READWRITE(SMH_BANK(3), SMH_BANK(3))
	211	AM_RANGE(0x3000, 0x3fff) AM_READWRITE(SMH_BANK(4), SMH_BANK(4))
	212	AM_RANGE(0x4000, 0x7fff) AM_READWRITE(SMH_BANK(5), SMH_BANK(5))
	213	AM_RANGE(0x8000, 0x8fff) AM_READWRITE(SMH_BANK(6), SMH_ROM)
	214	AM_RANGE(0x9000, 0x9fff) AM_READWRITE(SMH_BANK(7), SMH_BANK(7))
	215	AM_RANGE(0xa000, 0xafff) AM_READWRITE(SMH_BANK(8), SMH_ROM)
	216	AM_RANGE(0xb000, 0xbfff) AM_READWRITE(SMH_BANK(9), SMH_BANK(9))
	217	AM_RANGE(0xc000, 0xffff) AM_READWRITE(SMH_BANK(10), SMH_BANK(10))
218	218	ADDRESS_MAP_END
219	219
220	220	static ADDRESS_MAP_START( pmd853_mem , ADDRESS_SPACE_PROGRAM, 8)
221		AM_RANGE(0x0000, 0x1fff) AM_READWRITE(SMH_BANK1, SMH_BANK9)
222		AM_RANGE(0x2000, 0x3fff) AM_READWRITE(SMH_BANK2, SMH_BANK10)
223		AM_RANGE(0x4000, 0x5fff) AM_READWRITE(SMH_BANK3, SMH_BANK11)
224		AM_RANGE(0x6000, 0x7fff) AM_READWRITE(SMH_BANK4, SMH_BANK12)
225		AM_RANGE(0x8000, 0x9fff) AM_READWRITE(SMH_BANK5, SMH_BANK13)
226		AM_RANGE(0xa000, 0xbfff) AM_READWRITE(SMH_BANK6, SMH_BANK14)
227		AM_RANGE(0xc000, 0xdfff) AM_READWRITE(SMH_BANK7, SMH_BANK15)
228		AM_RANGE(0xe000, 0xffff) AM_READWRITE(SMH_BANK8, SMH_BANK16)
	221	AM_RANGE(0x0000, 0x1fff) AM_READWRITE(SMH_BANK(1), SMH_BANK(9))
	222	AM_RANGE(0x2000, 0x3fff) AM_READWRITE(SMH_BANK(2), SMH_BANK(10))
	223	AM_RANGE(0x4000, 0x5fff) AM_READWRITE(SMH_BANK(3), SMH_BANK(11))
	224	AM_RANGE(0x6000, 0x7fff) AM_READWRITE(SMH_BANK(4), SMH_BANK(12))
	225	AM_RANGE(0x8000, 0x9fff) AM_READWRITE(SMH_BANK(5), SMH_BANK(13))
	226	AM_RANGE(0xa000, 0xbfff) AM_READWRITE(SMH_BANK(6), SMH_BANK(14))
	227	AM_RANGE(0xc000, 0xdfff) AM_READWRITE(SMH_BANK(7), SMH_BANK(15))
	228	AM_RANGE(0xe000, 0xffff) AM_READWRITE(SMH_BANK(8), SMH_BANK(16))
229	229	ADDRESS_MAP_END
230	230
231	231	static ADDRESS_MAP_START( alfa_mem , ADDRESS_SPACE_PROGRAM, 8)
232		AM_RANGE(0x0000, 0x0fff) AM_READWRITE(SMH_BANK1, SMH_BANK1)
233		AM_RANGE(0x1000, 0x33ff) AM_READWRITE(SMH_BANK2, SMH_BANK2)
234		AM_RANGE(0x3400, 0x3fff) AM_READWRITE(SMH_BANK3, SMH_BANK3)
235		AM_RANGE(0x4000, 0x7fff) AM_READWRITE(SMH_BANK4, SMH_BANK4)
236		AM_RANGE(0x8000, 0x8fff) AM_READWRITE(SMH_BANK5, SMH_ROM)
237		AM_RANGE(0x9000, 0xb3ff) AM_READWRITE(SMH_BANK6, SMH_ROM)
	232	AM_RANGE(0x0000, 0x0fff) AM_READWRITE(SMH_BANK(1), SMH_BANK(1))
	233	AM_RANGE(0x1000, 0x33ff) AM_READWRITE(SMH_BANK(2), SMH_BANK(2))
	234	AM_RANGE(0x3400, 0x3fff) AM_READWRITE(SMH_BANK(3), SMH_BANK(3))
	235	AM_RANGE(0x4000, 0x7fff) AM_READWRITE(SMH_BANK(4), SMH_BANK(4))
	236	AM_RANGE(0x8000, 0x8fff) AM_READWRITE(SMH_BANK(5), SMH_ROM)
	237	AM_RANGE(0x9000, 0xb3ff) AM_READWRITE(SMH_BANK(6), SMH_ROM)
238	238	AM_RANGE(0xb400, 0xbfff) AM_READWRITE(SMH_NOP,   SMH_NOP)
239		AM_RANGE(0xc000, 0xffff) AM_READWRITE(SMH_BANK7, SMH_BANK7)
	239	AM_RANGE(0xc000, 0xffff) AM_READWRITE(SMH_BANK(7), SMH_BANK(7))
240	240	ADDRESS_MAP_END
241	241
242	242	static ADDRESS_MAP_START( mato_mem , ADDRESS_SPACE_PROGRAM, 8)
243		AM_RANGE(0x0000, 0x3fff) AM_READWRITE(SMH_BANK1, SMH_BANK1)
244		AM_RANGE(0x4000, 0x7fff) AM_READWRITE(SMH_BANK2, SMH_BANK2)
245		AM_RANGE(0x8000, 0xbfff) AM_READWRITE(SMH_BANK3, SMH_ROM)
246		AM_RANGE(0xc000, 0xffff) AM_READWRITE(SMH_BANK4, SMH_BANK4)
	243	AM_RANGE(0x0000, 0x3fff) AM_READWRITE(SMH_BANK(1), SMH_BANK(1))
	244	AM_RANGE(0x4000, 0x7fff) AM_READWRITE(SMH_BANK(2), SMH_BANK(2))
	245	AM_RANGE(0x8000, 0xbfff) AM_READWRITE(SMH_BANK(3), SMH_ROM)
	246	AM_RANGE(0xc000, 0xffff) AM_READWRITE(SMH_BANK(4), SMH_BANK(4))
247	247	ADDRESS_MAP_END
248	248
249	249	static ADDRESS_MAP_START( c2717_mem , ADDRESS_SPACE_PROGRAM, 8)
250		AM_RANGE(0x0000, 0x3fff) AM_READWRITE(SMH_BANK1, SMH_BANK1)
251		AM_RANGE(0x4000, 0x7fff) AM_READWRITE(SMH_BANK2, SMH_BANK2)
252		AM_RANGE(0x8000, 0xbfff) AM_READWRITE(SMH_BANK3, SMH_ROM)
253		AM_RANGE(0xc000, 0xffff) AM_READWRITE(SMH_BANK4, SMH_BANK4)
	250	AM_RANGE(0x0000, 0x3fff) AM_READWRITE(SMH_BANK(1), SMH_BANK(1))
	251	AM_RANGE(0x4000, 0x7fff) AM_READWRITE(SMH_BANK(2), SMH_BANK(2))
	252	AM_RANGE(0x8000, 0xbfff) AM_READWRITE(SMH_BANK(3), SMH_ROM)
	253	AM_RANGE(0xc000, 0xffff) AM_READWRITE(SMH_BANK(4), SMH_BANK(4))
254	254	ADDRESS_MAP_END
255	255
256	256	/* keyboard input */

src/mess/drivers/apexc.c

r4679	r4680
491	491	const device_config *screen = video_screen_first(machine->config);
492	492	int width = video_screen_get_width(screen);
493	493	int height = video_screen_get_height(screen);
494		apexc_bitmap = auto_bitmap_alloc(width, height, BITMAP_FORMAT_INDEXED16);
	494	apexc_bitmap = auto_bitmap_alloc(machine, width, height, BITMAP_FORMAT_INDEXED16);
495	495	bitmap_fill(apexc_bitmap, &/*machine->visible_area*/teletyper_window, 0);
496	496	}
497	497

src/mess/drivers/x68k.c

r4679	r4680
2458	2458	{
2459	2459	unsigned char* rom = memory_region(machine, "maincpu");
2460	2460	unsigned char* user2 = memory_region(machine, "user2");
2461		x68k_gvram = auto_malloc(0x080000);
2462		memset(x68k_gvram,0,0x080000);
2463		x68k_tvram = auto_malloc(0x080000);
2464		memset(x68k_tvram,0,0x80000);
2465		sram = auto_malloc(0x4000);
2466		memset(sram,0,0x4000);
	2461	x68k_gvram = auto_alloc_array(machine, UINT16, 0x080000/sizeof(UINT16));
	2462	x68k_tvram = auto_alloc_array(machine, UINT16, 0x080000/sizeof(UINT16));
	2463	sram = auto_alloc_array(machine, UINT16, 0x4000/sizeof(UINT16));
2467	2464
2468		x68k_spritereg = auto_malloc(0x8000);
2469		memset(x68k_spritereg,0,0x8000);
	2465	x68k_spritereg = auto_alloc_array_clear(machine, UINT16, 0x8000/sizeof(UINT16));
2470	2466
2471	2467	#ifdef USE_PREDEFINED_SRAM
2472	2468	{

src/mess/drivers/atarist.c

r4679	r4680
1448	1448	switch (mess_ram_size)
1449	1449	{
1450	1450	case 256 * 1024:
1451		memory_install_readwrite16_handler(program, 0x000008, 0x03ffff, 0, 0, SMH_BANK1, SMH_BANK1);
	1451	memory_install_readwrite16_handler(program, 0x000008, 0x03ffff, 0, 0, SMH_BANK(1), SMH_BANK(1));
1452	1452	memory_install_readwrite16_handler(program, 0x040000, 0x3fffff, 0, 0, SMH_UNMAP, SMH_UNMAP);
1453	1453	break;
1454	1454	case 512 * 1024:
1455		memory_install_readwrite16_handler(program, 0x000008, 0x07ffff, 0, 0, SMH_BANK1, SMH_BANK1);
	1455	memory_install_readwrite16_handler(program, 0x000008, 0x07ffff, 0, 0, SMH_BANK(1), SMH_BANK(1));
1456	1456	memory_install_readwrite16_handler(program, 0x080000, 0x3fffff, 0, 0, SMH_UNMAP, SMH_UNMAP);
1457	1457	break;
1458	1458	case 1024 * 1024:
1459		memory_install_readwrite16_handler(program, 0x000008, 0x0fffff, 0, 0, SMH_BANK1, SMH_BANK1);
	1459	memory_install_readwrite16_handler(program, 0x000008, 0x0fffff, 0, 0, SMH_BANK(1), SMH_BANK(1));
1460	1460	memory_install_readwrite16_handler(program, 0x100000, 0x3fffff, 0, 0, SMH_UNMAP, SMH_UNMAP);
1461	1461	break;
1462	1462	case 2048 * 1024:
1463		memory_install_readwrite16_handler(program, 0x000008, 0x1fffff, 0, 0, SMH_BANK1, SMH_BANK1);
	1463	memory_install_readwrite16_handler(program, 0x000008, 0x1fffff, 0, 0, SMH_BANK(1), SMH_BANK(1));
1464	1464	memory_install_readwrite16_handler(program, 0x200000, 0x3fffff, 0, 0, SMH_UNMAP, SMH_UNMAP);
1465	1465	break;
1466	1466	case 4096 * 1024:
1467		memory_install_readwrite16_handler(program, 0x000008, 0x1fffff, 0, 0, SMH_BANK1, SMH_BANK1);
1468		memory_install_readwrite16_handler(program, 0x200000, 0x3fffff, 0, 0, SMH_BANK2, SMH_BANK2);
	1467	memory_install_readwrite16_handler(program, 0x000008, 0x1fffff, 0, 0, SMH_BANK(1), SMH_BANK(1));
	1468	memory_install_readwrite16_handler(program, 0x200000, 0x3fffff, 0, 0, SMH_BANK(2), SMH_BANK(2));
1469	1469	break;
1470	1470	}
1471	1471
r4679	r4680
1642	1642	switch (mess_ram_size)
1643	1643	{
1644	1644	case 1024 * 1024:
1645		memory_install_readwrite16_handler(program, 0x000008, 0x07ffff, 0, 0x080000, SMH_BANK1, SMH_BANK1);
	1645	memory_install_readwrite16_handler(program, 0x000008, 0x07ffff, 0, 0x080000, SMH_BANK(1), SMH_BANK(1));
1646	1646	memory_install_readwrite16_handler(program, 0x100000, 0x3fffff, 0, 0, SMH_UNMAP, SMH_UNMAP);
1647	1647	break;
1648	1648	case 4096 * 1024:
1649		memory_install_readwrite16_handler(program, 0x000008, 0x1fffff, 0, 0, SMH_BANK1, SMH_BANK1);
1650		memory_install_readwrite16_handler(program, 0x200000, 0x3fffff, 0, 0, SMH_BANK2, SMH_BANK2);
	1649	memory_install_readwrite16_handler(program, 0x000008, 0x1fffff, 0, 0, SMH_BANK(1), SMH_BANK(1));
	1650	memory_install_readwrite16_handler(program, 0x200000, 0x3fffff, 0, 0, SMH_BANK(2), SMH_BANK(2));
1651	1651	break;
1652	1652	}
1653	1653
r4679	r4680
1782	1782	{
1783	1783	if (image_fread(image, ptr, filesize) == filesize)
1784	1784	{
1785		memory_install_readwrite16_handler(cputag_get_address_space(image->machine, M68000_TAG, ADDRESS_SPACE_PROGRAM), 0xfa0000, 0xfbffff, 0, 0, SMH_BANK3, SMH_BANK3);
	1785	memory_install_readwrite16_handler(cputag_get_address_space(image->machine, M68000_TAG, ADDRESS_SPACE_PROGRAM), 0xfa0000, 0xfbffff, 0, 0, SMH_BANK(3), SMH_BANK(3));
1786	1786
1787	1787	return INIT_PASS;
1788	1788	}

src/mess/drivers/sg1000.c

r4679	r4680
185	185	// SF-7000
186	186
187	187	static ADDRESS_MAP_START( sf7000_map, ADDRESS_SPACE_PROGRAM, 8 )
188		AM_RANGE(0x0000, 0x3fff) AM_READWRITE(SMH_BANK1, SMH_BANK2)
	188	AM_RANGE(0x0000, 0x3fff) AM_READWRITE(SMH_BANK(1), SMH_BANK(2))
189	189	AM_RANGE(0x4000, 0xffff) AM_RAM
190	190	ADDRESS_MAP_END
191	191
r4679	r4680
735	735	switch (size)
736	736	{
737	737	case 40 * 1024:
738		memory_install_readwrite8_handler(program, 0x8000, 0x9fff, 0, 0, SMH_BANK1, SMH_UNMAP);
	738	memory_install_readwrite8_handler(program, 0x8000, 0x9fff, 0, 0, SMH_BANK(1), SMH_UNMAP);
739	739	memory_configure_bank(machine, 1, 0, 1, memory_region(machine, Z80_TAG) + 0x8000, 0);
740	740	memory_set_bank(machine, 1, 0);
741	741	break;
742	742
743	743	case 48 * 1024:
744		memory_install_readwrite8_handler(program, 0x8000, 0xbfff, 0, 0, SMH_BANK1, SMH_UNMAP);
	744	memory_install_readwrite8_handler(program, 0x8000, 0xbfff, 0, 0, SMH_BANK(1), SMH_UNMAP);
745	745	memory_configure_bank(machine, 1, 0, 1, memory_region(machine, Z80_TAG) + 0x8000, 0);
746	746	memory_set_bank(machine, 1, 0);
747	747	break;
r4679	r4680
755	755	}
756	756	else if (IS_CARTRIDGE_THE_CASTLE(ptr))
757	757	{
758		memory_install_readwrite8_handler(program, 0x8000, 0x9fff, 0, 0, SMH_BANK1, SMH_BANK1);
	758	memory_install_readwrite8_handler(program, 0x8000, 0x9fff, 0, 0, SMH_BANK(1), SMH_BANK(1));
759	759	}
760	760	break;
761	761	}
r4679	r4680
776	776	sg1000_map_cartridge_memory(image->machine, ptr, size);
777	777
778	778	/* work RAM banking */
779		memory_install_readwrite8_handler(program, 0xc000, 0xc3ff, 0, 0x3c00, SMH_BANK2, SMH_BANK2);
	779	memory_install_readwrite8_handler(program, 0xc000, 0xc3ff, 0, 0x3c00, SMH_BANK(2), SMH_BANK(2));
780	780
781	781	return INIT_PASS;
782	782	}
r4679	r4680
790	790
791	791	if (IS_CARTRIDGE_BASIC_LEVEL_III(ptr))
792	792	{
793		memory_install_readwrite8_handler(program, 0x8000, 0xbfff, 0, 0, SMH_BANK1, SMH_BANK1);
794		memory_install_readwrite8_handler(program, 0xc000, 0xffff, 0, 0, SMH_BANK2, SMH_BANK2);
	793	memory_install_readwrite8_handler(program, 0x8000, 0xbfff, 0, 0, SMH_BANK(1), SMH_BANK(1));
	794	memory_install_readwrite8_handler(program, 0xc000, 0xffff, 0, 0, SMH_BANK(2), SMH_BANK(2));
795	795	}
796	796	else if (IS_CARTRIDGE_MUSIC_EDITOR(ptr))
797	797	{
798		memory_install_readwrite8_handler(program, 0x8000, 0x9fff, 0, 0, SMH_BANK1, SMH_BANK1);
799		memory_install_readwrite8_handler(program, 0xc000, 0xc7ff, 0, 0x3800, SMH_BANK2, SMH_BANK2);
	798	memory_install_readwrite8_handler(program, 0x8000, 0x9fff, 0, 0, SMH_BANK(1), SMH_BANK(1));
	799	memory_install_readwrite8_handler(program, 0xc000, 0xc7ff, 0, 0x3800, SMH_BANK(2), SMH_BANK(2));
800	800	}
801	801	else
802	802	{
803	803	/* regular cartridges */
804		memory_install_readwrite8_handler(program, 0xc000, 0xc7ff, 0, 0x3800, SMH_BANK2, SMH_BANK2);
	804	memory_install_readwrite8_handler(program, 0xc000, 0xc7ff, 0, 0x3800, SMH_BANK(2), SMH_BANK(2));
805	805	}
806	806	}
807	807

src/mess/drivers/ip22.c

r4679	r4680
1135	1135	}
1136	1136
1137	1137	static ADDRESS_MAP_START( ip225015_map, ADDRESS_SPACE_PROGRAM, 32 )
1138		AM_RANGE( 0x00000000, 0x0007ffff ) AM_READWRITE( SMH_BANK1, SMH_BANK1 )   /* mirror of first 512k of main RAM */
	1138	AM_RANGE( 0x00000000, 0x0007ffff ) AM_READWRITE( SMH_BANK(1), SMH_BANK(1) )   /* mirror of first 512k of main RAM */
1139	1139	AM_RANGE( 0x08000000, 0x0fffffff ) AM_SHARE(1) AM_BASE( &ip22_mainram ) AM_RAM_WRITE(ip22_write_ram)      /* 128 MB of main RAM */
1140	1140	AM_RANGE( 0x1f0f0000, 0x1f0f1fff ) AM_READWRITE( newport_rex3_r, newport_rex3_w )
1141	1141	AM_RANGE( 0x1fa00000, 0x1fa1ffff ) AM_READWRITE( mc_r, mc_w )

src/mess/drivers/c128.c

r4679	r4680
212	212	*/
213	213	static ADDRESS_MAP_START(c128_z80_mem , ADDRESS_SPACE_PROGRAM, 8)
214	214	#if 1
215		AM_RANGE(0x0000, 0x0fff) AM_READWRITE(SMH_BANK10, c128_write_0000)
216		AM_RANGE(0x1000, 0xbfff) AM_READWRITE(SMH_BANK11, c128_write_1000)
	215	AM_RANGE(0x0000, 0x0fff) AM_READWRITE(SMH_BANK(10), c128_write_0000)
	216	AM_RANGE(0x1000, 0xbfff) AM_READWRITE(SMH_BANK(11), c128_write_1000)
217	217	AM_RANGE(0xc000, 0xffff) AM_RAM
218	218	#else
219	219	/* best to do reuse bankswitching numbers */
220		AM_RANGE(0x0000, 0x03ff) AM_READWRITE(SMH_BANK10, SMH_BANK1)
221		AM_RANGE(0x0400, 0x0fff) AM_READWRITE(SMH_BANK11, SMH_BANK2)
	220	AM_RANGE(0x0000, 0x03ff) AM_READWRITE(SMH_BANK(10), SMH_BANK(1))
	221	AM_RANGE(0x0400, 0x0fff) AM_READWRITE(SMH_BANK(11), SMH_BANK(2))
222	222	AM_RANGE(0x1000, 0x1fff) AM_RAMBANK(3)
223	223	AM_RANGE(0x2000, 0x3fff) AM_RAMBANK(4)
224	224	AM_RANGE(0x4000, 0xbfff) AM_RAMBANK(5)
r4679	r4680
267	267	AM_RANGE(0x1000, 0x1fff) AM_RAMBANK(5)
268	268	AM_RANGE(0x2000, 0x3fff) AM_RAMBANK(6)
269	269
270		AM_RANGE(0x4000, 0x7fff) AM_READWRITE( SMH_BANK7, c128_write_4000 )
271		AM_RANGE(0x8000, 0x9fff) AM_READWRITE( SMH_BANK8, c128_write_8000 )
272		AM_RANGE(0xa000, 0xbfff) AM_READWRITE( SMH_BANK9, c128_write_a000 )
	270	AM_RANGE(0x4000, 0x7fff) AM_READWRITE( SMH_BANK(7), c128_write_4000 )
	271	AM_RANGE(0x8000, 0x9fff) AM_READWRITE( SMH_BANK(8), c128_write_8000 )
	272	AM_RANGE(0xa000, 0xbfff) AM_READWRITE( SMH_BANK(9), c128_write_a000 )
273	273
274		AM_RANGE(0xc000, 0xcfff) AM_READWRITE( SMH_BANK12, c128_write_c000 )
275		AM_RANGE(0xd000, 0xdfff) AM_READWRITE( SMH_BANK13, c128_write_d000 )
276		AM_RANGE(0xe000, 0xfeff) AM_READWRITE( SMH_BANK14, c128_write_e000 )
277		AM_RANGE(0xff00, 0xff04) AM_READWRITE( SMH_BANK15, c128_write_ff00 )      /* mmu c128 modus */
278		AM_RANGE(0xff05, 0xffff) AM_READWRITE( SMH_BANK16, c128_write_ff05 )
	274	AM_RANGE(0xc000, 0xcfff) AM_READWRITE( SMH_BANK(12), c128_write_c000 )
	275	AM_RANGE(0xd000, 0xdfff) AM_READWRITE( SMH_BANK(13), c128_write_d000 )
	276	AM_RANGE(0xe000, 0xfeff) AM_READWRITE( SMH_BANK(14), c128_write_e000 )
	277	AM_RANGE(0xff00, 0xff04) AM_READWRITE( SMH_BANK(15), c128_write_ff00 )      /* mmu c128 modus */
	278	AM_RANGE(0xff05, 0xffff) AM_READWRITE( SMH_BANK(16), c128_write_ff05 )
279	279	ADDRESS_MAP_END
280	280
281	281

src/mess/drivers/lviv.c

r4679	r4680
299	299	/* memory w/r functions */
300	300
301	301	static ADDRESS_MAP_START(lviv_mem , ADDRESS_SPACE_PROGRAM, 8)
302		AM_RANGE(0x0000, 0x3fff) AM_READWRITE(SMH_BANK1, SMH_BANK1)
303		AM_RANGE(0x4000, 0x7fff) AM_READWRITE(SMH_BANK2, SMH_BANK2)
304		AM_RANGE(0x8000, 0xbfff) AM_READWRITE(SMH_BANK3, SMH_BANK3)
305		AM_RANGE(0xc000, 0xffff) AM_READWRITE(SMH_BANK4, SMH_BANK4)
	302	AM_RANGE(0x0000, 0x3fff) AM_READWRITE(SMH_BANK(1), SMH_BANK(1))
	303	AM_RANGE(0x4000, 0x7fff) AM_READWRITE(SMH_BANK(2), SMH_BANK(2))
	304	AM_RANGE(0x8000, 0xbfff) AM_READWRITE(SMH_BANK(3), SMH_BANK(3))
	305	AM_RANGE(0xc000, 0xffff) AM_READWRITE(SMH_BANK(4), SMH_BANK(4))
306	306	ADDRESS_MAP_END
307	307
308	308

src/mess/drivers/timex.c

r4679	r4680
231	231	{
232	232	if (ts2068_port_ff_data & 0x80)
233	233	{
234		rh = SMH_BANK1;
	234	rh = SMH_BANK(1);
235	235	wh = SMH_UNMAP;
236	236	memory_set_bankptr(machine, 1, ExROM);
237	237	logerror("0000-1fff EXROM\n");
r4679	r4680
241	241	if (timex_cart_type == TIMEX_CART_DOCK)
242	242	{
243	243	memory_set_bankptr(machine, 1, DOCK);
244		rh = SMH_BANK1;
	244	rh = SMH_BANK(1);
245	245	if (timex_cart_chunks&0x01)
246		wh = SMH_BANK9;
	246	wh = SMH_BANK(9);
247	247	else
248	248	wh = SMH_UNMAP;
249	249	}
r4679	r4680
259	259	{
260	260	ChosenROM = memory_region(machine, "maincpu") + 0x010000;
261	261	memory_set_bankptr(machine, 1, ChosenROM);
262		rh = SMH_BANK1;
	262	rh = SMH_BANK(1);
263	263	wh = SMH_UNMAP;
264	264	logerror("0000-1fff HOME\n");
265	265	}
r4679	r4680
271	271	if (ts2068_port_ff_data & 0x80)
272	272	{
273	273	memory_set_bankptr(machine, 2, ExROM);
274		rh = SMH_BANK2;
	274	rh = SMH_BANK(2);
275	275	wh = SMH_UNMAP;
276	276	logerror("2000-3fff EXROM\n");
277	277	}
r4679	r4680
280	280	if (timex_cart_type == TIMEX_CART_DOCK)
281	281	{
282	282	memory_set_bankptr(machine, 2, DOCK+0x2000);
283		rh = SMH_BANK2;
	283	rh = SMH_BANK(2);
284	284	if (timex_cart_chunks&0x02)
285		wh = SMH_BANK10;
	285	wh = SMH_BANK(10);
286	286	else
287	287	wh = SMH_UNMAP;
288	288	}
r4679	r4680
298	298	{
299	299	ChosenROM = memory_region(machine, "maincpu") + 0x012000;
300	300	memory_set_bankptr(machine, 2, ChosenROM);
301		rh = SMH_BANK2;
	301	rh = SMH_BANK(2);
302	302	wh = SMH_UNMAP;
303	303	logerror("2000-3fff HOME\n");
304	304	}
r4679	r4680
310	310	if (ts2068_port_ff_data & 0x80)
311	311	{
312	312	memory_set_bankptr(machine, 3, ExROM);
313		rh = SMH_BANK3;
	313	rh = SMH_BANK(3);
314	314	wh = SMH_UNMAP;
315	315	logerror("4000-5fff EXROM\n");
316	316	}
r4679	r4680
319	319	if (timex_cart_type == TIMEX_CART_DOCK)
320	320	{
321	321	memory_set_bankptr(machine, 3, DOCK+0x4000);
322		rh = SMH_BANK3;
	322	rh = SMH_BANK(3);
323	323	if (timex_cart_chunks&0x04)
324		wh = SMH_BANK11;
	324	wh = SMH_BANK(11);
325	325	else
326	326	wh = SMH_UNMAP;
327	327	}
r4679	r4680
337	337	{
338	338	memory_set_bankptr(machine, 3, mess_ram);
339	339	memory_set_bankptr(machine, 11, mess_ram);
340		rh = SMH_BANK3;
341		wh = SMH_BANK11;
	340	rh = SMH_BANK(3);
	341	wh = SMH_BANK(11);
342	342	logerror("4000-5fff RAM\n");
343	343	}
344	344	memory_install_read8_handler(space, 0x4000, 0x5fff, 0, 0, rh);
r4679	r4680
349	349	if (ts2068_port_ff_data & 0x80)
350	350	{
351	351	memory_set_bankptr(machine, 4, ExROM);
352		rh = SMH_BANK4;
	352	rh = SMH_BANK(4);
353	353	wh = SMH_UNMAP;
354	354	logerror("6000-7fff EXROM\n");
355	355	}
r4679	r4680
358	358	if (timex_cart_type == TIMEX_CART_DOCK)
359	359	{
360	360	memory_set_bankptr(machine, 4, DOCK+0x6000);
361		rh = SMH_BANK4;
	361	rh = SMH_BANK(4);
362	362	if (timex_cart_chunks&0x08)
363		wh = SMH_BANK12;
	363	wh = SMH_BANK(12);
364	364	else
365	365	wh = SMH_UNMAP;
366	366	}
r4679	r4680
376	376	{
377	377	memory_set_bankptr(machine, 4, mess_ram + 0x2000);
378	378	memory_set_bankptr(machine, 12, mess_ram + 0x2000);
379		rh = SMH_BANK4;
380		wh = SMH_BANK12;
	379	rh = SMH_BANK(4);
	380	wh = SMH_BANK(12);
381	381	logerror("6000-7fff RAM\n");
382	382	}
383	383	memory_install_read8_handler(space, 0x6000, 0x7fff, 0, 0, rh);
r4679	r4680
388	388	if (ts2068_port_ff_data & 0x80)
389	389	{
390	390	memory_set_bankptr(machine, 5, ExROM);
391		rh = SMH_BANK5;
	391	rh = SMH_BANK(5);
392	392	wh = SMH_UNMAP;
393	393	logerror("8000-9fff EXROM\n");
394	394	}
r4679	r4680
397	397	if (timex_cart_type == TIMEX_CART_DOCK)
398	398	{
399	399	memory_set_bankptr(machine, 5, DOCK+0x8000);
400		rh = SMH_BANK5;
	400	rh = SMH_BANK(5);
401	401	if (timex_cart_chunks&0x10)
402		wh = SMH_BANK13;
	402	wh = SMH_BANK(13);
403	403	else
404	404	wh = SMH_UNMAP;
405	405	}
r4679	r4680
415	415	{
416	416	memory_set_bankptr(machine, 5, mess_ram + 0x4000);
417	417	memory_set_bankptr(machine, 13, mess_ram + 0x4000);
418		rh = SMH_BANK5;
419		wh = SMH_BANK13;
	418	rh = SMH_BANK(5);
	419	wh = SMH_BANK(13);
420	420	logerror("8000-9fff RAM\n");
421	421	}
422	422	memory_install_read8_handler(space, 0x8000, 0x9fff, 0, 0,rh);
r4679	r4680
427	427	if (ts2068_port_ff_data & 0x80)
428	428	{
429	429	memory_set_bankptr(machine, 6, ExROM);
430		rh = SMH_BANK6;
	430	rh = SMH_BANK(6);
431	431	wh = SMH_UNMAP;
432	432	logerror("a000-bfff EXROM\n");
433	433	}
r4679	r4680
436	436	if (timex_cart_type == TIMEX_CART_DOCK)
437	437	{
438	438	memory_set_bankptr(machine, 6, DOCK+0xa000);
439		rh = SMH_BANK6;
	439	rh = SMH_BANK(6);
440	440	if (timex_cart_chunks&0x20)
441		wh = SMH_BANK14;
	441	wh = SMH_BANK(14);
442	442	else
443	443	wh = SMH_UNMAP;
444	444	}
r4679	r4680
454	454	{
455	455	memory_set_bankptr(machine, 6, mess_ram + 0x6000);
456	456	memory_set_bankptr(machine, 14, mess_ram + 0x6000);
457		rh = SMH_BANK6;
458		wh = SMH_BANK14;
	457	rh = SMH_BANK(6);
	458	wh = SMH_BANK(14);
459	459	logerror("a000-bfff RAM\n");
460	460	}
461	461	memory_install_read8_handler(space, 0xa000, 0xbfff, 0, 0, rh);
r4679	r4680
466	466	if (ts2068_port_ff_data & 0x80)
467	467	{
468	468	memory_set_bankptr(machine, 7, ExROM);
469		rh = SMH_BANK7;
	469	rh = SMH_BANK(7);
470	470	wh = SMH_UNMAP;
471	471	logerror("c000-dfff EXROM\n");
472	472	}
r4679	r4680
475	475	if (timex_cart_type == TIMEX_CART_DOCK)
476	476	{
477	477	memory_set_bankptr(machine, 7, DOCK+0xc000);
478		rh = SMH_BANK7;
	478	rh = SMH_BANK(7);
479	479	if (timex_cart_chunks&0x40)
480		wh = SMH_BANK15;
	480	wh = SMH_BANK(15);
481	481	else
482	482	wh = SMH_UNMAP;
483	483	}
r4679	r4680
493	493	{
494	494	memory_set_bankptr(machine, 7, mess_ram + 0x8000);
495	495	memory_set_bankptr(machine, 15, mess_ram + 0x8000);
496		rh = SMH_BANK7;
497		wh = SMH_BANK15;
	496	rh = SMH_BANK(7);
	497	wh = SMH_BANK(15);
498	498	logerror("c000-dfff RAM\n");
499	499	}
500	500	memory_install_read8_handler(space, 0xc000, 0xdfff, 0, 0, rh);
r4679	r4680
505	505	if (ts2068_port_ff_data & 0x80)
506	506	{
507	507	memory_set_bankptr(machine, 8, ExROM);
508		rh = SMH_BANK8;
	508	rh = SMH_BANK(8);
509	509	wh = SMH_UNMAP;
510	510	logerror("e000-ffff EXROM\n");
511	511	}
r4679	r4680
514	514	if (timex_cart_type == TIMEX_CART_DOCK)
515	515	{
516	516	memory_set_bankptr(machine, 8, DOCK+0xe000);
517		rh = SMH_BANK8;
	517	rh = SMH_BANK(8);
518	518	if (timex_cart_chunks&0x80)
519		wh = SMH_BANK16;
	519	wh = SMH_BANK(16);
520	520	else
521	521	wh = SMH_UNMAP;
522	522	}
r4679	r4680
532	532	{
533	533	memory_set_bankptr(machine, 8, mess_ram + 0xa000);
534	534	memory_set_bankptr(machine, 16, mess_ram + 0xa000);
535		rh = SMH_BANK8;
536		wh = SMH_BANK16;
	535	rh = SMH_BANK(8);
	536	wh = SMH_BANK(16);
537	537	logerror("e000-ffff RAM\n");
538	538	}
539	539	memory_install_read8_handler(space, 0xe000, 0xffff, 0, 0, rh);
r4679	r4680
552	552	ADDRESS_MAP_END
553	553
554	554	static ADDRESS_MAP_START (ts2068_mem, ADDRESS_SPACE_PROGRAM, 8)
555		AM_RANGE(0x0000, 0x1fff) AM_READWRITE( SMH_BANK1, SMH_BANK9 )
556		AM_RANGE(0x2000, 0x3fff) AM_READWRITE( SMH_BANK2, SMH_BANK10 )
557		AM_RANGE(0x4000, 0x5fff) AM_READWRITE( SMH_BANK3, SMH_BANK11 )
558		AM_RANGE(0x6000, 0x7fff) AM_READWRITE( SMH_BANK4, SMH_BANK12 )
559		AM_RANGE(0x8000, 0x9fff) AM_READWRITE( SMH_BANK5, SMH_BANK13 )
560		AM_RANGE(0xa000, 0xbfff) AM_READWRITE( SMH_BANK6, SMH_BANK14 )
561		AM_RANGE(0xc000, 0xdfff) AM_READWRITE( SMH_BANK7, SMH_BANK15 )
562		AM_RANGE(0xe000, 0xffff) AM_READWRITE( SMH_BANK8, SMH_BANK16 )
	555	AM_RANGE(0x0000, 0x1fff) AM_READWRITE( SMH_BANK(1), SMH_BANK(9) )
	556	AM_RANGE(0x2000, 0x3fff) AM_READWRITE( SMH_BANK(2), SMH_BANK(10) )
	557	AM_RANGE(0x4000, 0x5fff) AM_READWRITE( SMH_BANK(3), SMH_BANK(11) )
	558	AM_RANGE(0x6000, 0x7fff) AM_READWRITE( SMH_BANK(4), SMH_BANK(12) )
	559	AM_RANGE(0x8000, 0x9fff) AM_READWRITE( SMH_BANK(5), SMH_BANK(13) )
	560	AM_RANGE(0xa000, 0xbfff) AM_READWRITE( SMH_BANK(6), SMH_BANK(14) )
	561	AM_RANGE(0xc000, 0xdfff) AM_READWRITE( SMH_BANK(7), SMH_BANK(15) )
	562	AM_RANGE(0xe000, 0xffff) AM_READWRITE( SMH_BANK(8), SMH_BANK(16) )
563	563	ADDRESS_MAP_END
564	564
565	565
r4679	r4680
593	593
594	594	static ADDRESS_MAP_START (tc2048_mem, ADDRESS_SPACE_PROGRAM, 8)
595	595	AM_RANGE( 0x0000, 0x3fff) AM_ROM
596		AM_RANGE( 0x4000, 0xffff) AM_READWRITE( SMH_BANK1, SMH_BANK2 )
	596	AM_RANGE( 0x4000, 0xffff) AM_READWRITE( SMH_BANK(1), SMH_BANK(2) )
597	597	ADDRESS_MAP_END
598	598
599	599	static MACHINE_RESET( tc2048 )

src/mess/drivers/a2600.c

r4679	r4680
1255	1255	{
1256	1256	static const read8_space_func handler[] =
1257	1257	{
1258		SMH_BANK1,
1259		SMH_BANK2,
1260		SMH_BANK3,
1261		SMH_BANK4,
	1258	SMH_BANK(1),
	1259	SMH_BANK(2),
	1260	SMH_BANK(3),
	1261	SMH_BANK(4),
1262	1262	};
1263	1263
1264	1264	memory_install_read8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM),
r4679	r4680
1843	1843	memory_install_read8_handler(space, 0x1fe0, 0x1fe7, 0, 0, modeE7_switch_r);
1844	1844	memory_install_write8_handler(space, 0x1fe8, 0x1feb, 0, 0, modeE7_RAM_switch_w);
1845	1845	memory_install_read8_handler(space, 0x1fe8, 0x1feb, 0, 0, modeE7_RAM_switch_r);
1846		memory_install_write8_handler(space, 0x1800, 0x18ff, 0, 0, SMH_BANK9);
1847		memory_install_read8_handler(space, 0x1900, 0x19ff, 0, 0, SMH_BANK9);
	1846	memory_install_write8_handler(space, 0x1800, 0x18ff, 0, 0, SMH_BANK(9));
	1847	memory_install_read8_handler(space, 0x1900, 0x19ff, 0, 0, SMH_BANK(9));
1848	1848	memory_set_bankptr(machine, 9, extra_RAM + 4 * 256 );
1849	1849	break;
1850	1850
r4679	r4680
1916	1916
1917	1917	if (banking_mode == modeFA)
1918	1918	{
1919		memory_install_write8_handler(space, 0x1000, 0x10ff, 0, 0, SMH_BANK9);
1920		memory_install_read8_handler(space, 0x1100, 0x11ff, 0, 0, SMH_BANK9);
	1919	memory_install_write8_handler(space, 0x1000, 0x10ff, 0, 0, SMH_BANK(9));
	1920	memory_install_read8_handler(space, 0x1100, 0x11ff, 0, 0, SMH_BANK(9));
1921	1921
1922	1922	memory_set_bankptr(machine,9, extra_RAM);
1923	1923	}
1924	1924
1925	1925	if (banking_mode == modeCV)
1926	1926	{
1927		memory_install_write8_handler(space, 0x1400, 0x17ff, 0, 0, SMH_BANK9);
1928		memory_install_read8_handler(space, 0x1000, 0x13ff, 0, 0, SMH_BANK9);
	1927	memory_install_write8_handler(space, 0x1400, 0x17ff, 0, 0, SMH_BANK(9));
	1928	memory_install_read8_handler(space, 0x1000, 0x13ff, 0, 0, SMH_BANK(9));
1929	1929
1930	1930	memory_set_bankptr(machine,9, extra_RAM);
1931	1931	}
1932	1932
1933	1933	if (chip)
1934	1934	{
1935		memory_install_write8_handler(space, 0x1000, 0x107f, 0, 0, SMH_BANK9);
1936		memory_install_read8_handler(space, 0x1080, 0x10ff, 0, 0, SMH_BANK9);
	1935	memory_install_write8_handler(space, 0x1000, 0x107f, 0, 0, SMH_BANK(9));
	1936	memory_install_read8_handler(space, 0x1080, 0x10ff, 0, 0, SMH_BANK(9));
1937	1937
1938	1938	memory_set_bankptr(machine,9, extra_RAM);
1939	1939	}

src/mess/drivers/pet.c

r4679	r4680
438	438	AM_RANGE(0xe880, 0xe880) AM_DEVWRITE("crtc", mc6845_address_w)
439	439	AM_RANGE(0xe881, 0xe881) AM_DEVREADWRITE("crtc", mc6845_register_r, mc6845_register_w)
440	440	#endif
441		AM_RANGE(0xf000, 0xffff) AM_READ(SMH_BANK8)
442		AM_RANGE(0xf000, 0xffef) AM_WRITE(SMH_BANK8)
443		AM_RANGE(0xfff1, 0xffff) AM_WRITE(SMH_BANK9)
	441	AM_RANGE(0xf000, 0xffff) AM_READ(SMH_BANK(8))
	442	AM_RANGE(0xf000, 0xffef) AM_WRITE(SMH_BANK(8))
	443	AM_RANGE(0xfff1, 0xffff) AM_WRITE(SMH_BANK(9))
444	444	ADDRESS_MAP_END
445	445
446	446

src/mess/drivers/c16.c

r4679	r4680
176	176
177	177	static ADDRESS_MAP_START(c16_map, ADDRESS_SPACE_PROGRAM, 8)
178	178	AM_RANGE(0x0000, 0x3fff) AM_RAMBANK(9)
179		AM_RANGE(0x4000, 0x7fff) AM_READWRITE(SMH_BANK1, SMH_BANK5)      /* only ram memory configuration */
180		AM_RANGE(0x8000, 0xbfff) AM_READWRITE(SMH_BANK2, SMH_BANK6)
181		AM_RANGE(0xc000, 0xfbff) AM_READ(SMH_BANK3)
182		AM_RANGE(0xfc00, 0xfcff) AM_READ(SMH_BANK4)
183		AM_RANGE(0xc000, 0xfcff) AM_WRITE(SMH_BANK7)
	179	AM_RANGE(0x4000, 0x7fff) AM_READWRITE(SMH_BANK(1), SMH_BANK(5))      /* only ram memory configuration */
	180	AM_RANGE(0x8000, 0xbfff) AM_READWRITE(SMH_BANK(2), SMH_BANK(6))
	181	AM_RANGE(0xc000, 0xfbff) AM_READ(SMH_BANK(3))
	182	AM_RANGE(0xfc00, 0xfcff) AM_READ(SMH_BANK(4))
	183	AM_RANGE(0xc000, 0xfcff) AM_WRITE(SMH_BANK(7))
184	184	AM_RANGE(0xfd10, 0xfd1f) AM_READ(c16_fd1x_r)
185	185	AM_RANGE(0xfd30, 0xfd3f) AM_READWRITE(c16_6529_port_r, c16_6529_port_w)      /* 6529 keyboard matrix */
186	186	AM_RANGE(0xfdd0, 0xfddf) AM_WRITE(c16_select_roms) /* rom chips selection */
187	187	AM_RANGE(0xff00, 0xff1f) AM_READWRITE(ted7360_port_r, ted7360_port_w)
188		AM_RANGE(0xff20, 0xffff) AM_READ(SMH_BANK8)
	188	AM_RANGE(0xff20, 0xffff) AM_READ(SMH_BANK(8))
189	189	AM_RANGE(0xff3e, 0xff3e) AM_WRITE(c16_switch_to_rom)
190	190	AM_RANGE(0xff3f, 0xff3f) AM_WRITE(c16_switch_to_ram)
191	191	#if 0
r4679	r4680
201	201	ADDRESS_MAP_END
202	202
203	203	static ADDRESS_MAP_START(plus4_map, ADDRESS_SPACE_PROGRAM, 8)
204		AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_BANK9)
205		AM_RANGE(0x8000, 0xbfff) AM_READ(SMH_BANK2)
206		AM_RANGE(0xc000, 0xfbff) AM_READ(SMH_BANK3)
207		AM_RANGE(0xfc00, 0xfcff) AM_READ(SMH_BANK4)
208		AM_RANGE(0x0000, 0xfcff) AM_WRITE(SMH_BANK9)
	204	AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_BANK(9))
	205	AM_RANGE(0x8000, 0xbfff) AM_READ(SMH_BANK(2))
	206	AM_RANGE(0xc000, 0xfbff) AM_READ(SMH_BANK(3))
	207	AM_RANGE(0xfc00, 0xfcff) AM_READ(SMH_BANK(4))
	208	AM_RANGE(0x0000, 0xfcff) AM_WRITE(SMH_BANK(9))
209	209	AM_RANGE(0xfd00, 0xfd0f) AM_READWRITE(c16_6551_port_r, c16_6551_port_w)
210	210	AM_RANGE(0xfd10, 0xfd1f) AM_READWRITE(plus4_6529_port_r, plus4_6529_port_w)
211	211	AM_RANGE(0xfd30, 0xfd3f) AM_READWRITE(c16_6529_port_r, c16_6529_port_w) /* 6529 keyboard matrix */
r4679	r4680
216	216	AM_RANGE(0xfee0, 0xfeff) AM_READWRITE(c16_iec8_port_r, c16_iec8_port_w)      /*configured in c16_common_init */
217	217	#endif
218	218	AM_RANGE(0xff00, 0xff1f) AM_READWRITE(ted7360_port_r, ted7360_port_w)
219		AM_RANGE(0xff20, 0xffff) AM_READ(SMH_BANK8)
	219	AM_RANGE(0xff20, 0xffff) AM_READ(SMH_BANK(8))
220	220	AM_RANGE(0xff20, 0xff3d) AM_WRITE(SMH_RAM)
221	221	AM_RANGE(0xff3e, 0xff3e) AM_WRITE(c16_switch_to_rom)
222	222	AM_RANGE(0xff3f, 0xff3f) AM_WRITE(c16_switch_to_ram)
r4679	r4680
224	224	ADDRESS_MAP_END
225	225
226	226	static ADDRESS_MAP_START(c364_map , ADDRESS_SPACE_PROGRAM, 8)
227		AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_BANK9)
228		AM_RANGE(0x8000, 0xbfff) AM_READ(SMH_BANK2)
229		AM_RANGE(0xc000, 0xfbff) AM_READ(SMH_BANK3)
230		AM_RANGE(0xfc00, 0xfcff) AM_READ(SMH_BANK4)
231		AM_RANGE(0x0000, 0xfcff) AM_WRITE(SMH_BANK9)
	227	AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_BANK(9))
	228	AM_RANGE(0x8000, 0xbfff) AM_READ(SMH_BANK(2))
	229	AM_RANGE(0xc000, 0xfbff) AM_READ(SMH_BANK(3))
	230	AM_RANGE(0xfc00, 0xfcff) AM_READ(SMH_BANK(4))
	231	AM_RANGE(0x0000, 0xfcff) AM_WRITE(SMH_BANK(9))
232	232	AM_RANGE(0xfd00, 0xfd0f) AM_READWRITE(c16_6551_port_r, c16_6551_port_w)
233	233	AM_RANGE(0xfd10, 0xfd1f) AM_READWRITE(plus4_6529_port_r, plus4_6529_port_w)
234	234	AM_RANGE(0xfd20, 0xfd2f) AM_READWRITE(c364_speech_r, c364_speech_w)
r4679	r4680
240	240	AM_RANGE(0xfee0, 0xfeff) AM_READWRITE(c16_iec8_port_r, c16_iec8_port_w)      /*configured in c16_common_init */
241	241	#endif
242	242	AM_RANGE(0xff00, 0xff1f) AM_READWRITE(ted7360_port_r, ted7360_port_w)
243		AM_RANGE(0xff20, 0xffff) AM_READ(SMH_BANK8)
	243	AM_RANGE(0xff20, 0xffff) AM_READ(SMH_BANK(8))
244	244	AM_RANGE(0xff20, 0xff3d) AM_WRITE(SMH_RAM)
245	245	AM_RANGE(0xff3e, 0xff3e) AM_WRITE(c16_switch_to_rom)
246	246	AM_RANGE(0xff3f, 0xff3f) AM_WRITE(c16_switch_to_ram)

src/mess/drivers/pcw.c

r4679	r4680
239	239	setup of the memory below.
240	240	*/
241	241	static ADDRESS_MAP_START(pcw_map, ADDRESS_SPACE_PROGRAM, 8 )
242		AM_RANGE(0x0000, 0x3fff) AM_READWRITE(SMH_BANK1, SMH_BANK5)
243		AM_RANGE(0x4000, 0x7fff) AM_READWRITE(SMH_BANK2, SMH_BANK6)
244		AM_RANGE(0x8000, 0xbfff) AM_READWRITE(SMH_BANK3, SMH_BANK7)
245		AM_RANGE(0xc000, 0xffff) AM_READWRITE(SMH_BANK4, SMH_BANK8)
	242	AM_RANGE(0x0000, 0x3fff) AM_READWRITE(SMH_BANK(1), SMH_BANK(5))
	243	AM_RANGE(0x4000, 0x7fff) AM_READWRITE(SMH_BANK(2), SMH_BANK(6))
	244	AM_RANGE(0x8000, 0xbfff) AM_READWRITE(SMH_BANK(3), SMH_BANK(7))
	245	AM_RANGE(0xc000, 0xffff) AM_READWRITE(SMH_BANK(4), SMH_BANK(8))
246	246	ADDRESS_MAP_END
247	247
248	248

src/mess/drivers/bw2.c

r4679	r4680
103	103	switch (state->bank)
104	104	{
105	105	case BANK_RAM1:
106		memory_install_readwrite8_handler(cputag_get_address_space(machine, Z80_TAG, ADDRESS_SPACE_PROGRAM), 0x0000, 0x7fff, 0, 0, SMH_BANK1, SMH_BANK1);
	106	memory_install_readwrite8_handler(cputag_get_address_space(machine, Z80_TAG, ADDRESS_SPACE_PROGRAM), 0x0000, 0x7fff, 0, 0, SMH_BANK(1), SMH_BANK(1));
107	107	break;
108	108
109	109	case BANK_VRAM:
110		memory_install_readwrite8_handler(cputag_get_address_space(machine, Z80_TAG, ADDRESS_SPACE_PROGRAM), 0x0000, 0x3fff, 0, 0x4000, SMH_BANK1, SMH_BANK1);
	110	memory_install_readwrite8_handler(cputag_get_address_space(machine, Z80_TAG, ADDRESS_SPACE_PROGRAM), 0x0000, 0x3fff, 0, 0x4000, SMH_BANK(1), SMH_BANK(1));
111	111	break;
112	112
113	113	case BANK_RAM2:
r4679	r4680
121	121	}
122	122	else
123	123	{
124		memory_install_readwrite8_handler(cputag_get_address_space(machine, Z80_TAG, ADDRESS_SPACE_PROGRAM), 0x0000, 0x7fff, 0, 0, SMH_BANK1, SMH_BANK1);
	124	memory_install_readwrite8_handler(cputag_get_address_space(machine, Z80_TAG, ADDRESS_SPACE_PROGRAM), 0x0000, 0x7fff, 0, 0, SMH_BANK(1), SMH_BANK(1));
125	125	}
126	126	break;
127	127
128	128	case BANK_ROM:
129		memory_install_readwrite8_handler(cputag_get_address_space(machine, Z80_TAG, ADDRESS_SPACE_PROGRAM), 0x0000, 0x7fff, 0, 0, SMH_BANK1, SMH_UNMAP);
	129	memory_install_readwrite8_handler(cputag_get_address_space(machine, Z80_TAG, ADDRESS_SPACE_PROGRAM), 0x0000, 0x7fff, 0, 0, SMH_BANK(1), SMH_UNMAP);
130	130	break;
131	131	}
132	132
r4679	r4680
179	179	{
180	180	case BANK_RAM1:
181	181	case BANK_RAMCARD_RAM:
182		memory_install_readwrite8_handler(cputag_get_address_space(machine, Z80_TAG, ADDRESS_SPACE_PROGRAM), 0x0000, 0x7fff, 0, 0, SMH_BANK1, SMH_BANK1);
	182	memory_install_readwrite8_handler(cputag_get_address_space(machine, Z80_TAG, ADDRESS_SPACE_PROGRAM), 0x0000, 0x7fff, 0, 0, SMH_BANK(1), SMH_BANK(1));
183	183	break;
184	184
185	185	case BANK_VRAM:
186		memory_install_readwrite8_handler(cputag_get_address_space(machine, Z80_TAG, ADDRESS_SPACE_PROGRAM), 0x0000, 0x3fff, 0, 0x4000, SMH_BANK1, SMH_BANK1);
	186	memory_install_readwrite8_handler(cputag_get_address_space(machine, Z80_TAG, ADDRESS_SPACE_PROGRAM), 0x0000, 0x3fff, 0, 0x4000, SMH_BANK(1), SMH_BANK(1));
187	187	break;
188	188
189	189	case BANK_RAM3:
r4679	r4680
195	195	}
196	196	else
197	197	{
198		memory_install_readwrite8_handler(cputag_get_address_space(machine, Z80_TAG, ADDRESS_SPACE_PROGRAM), 0x0000, 0x7fff, 0, 0, SMH_BANK1, SMH_BANK1);
	198	memory_install_readwrite8_handler(cputag_get_address_space(machine, Z80_TAG, ADDRESS_SPACE_PROGRAM), 0x0000, 0x7fff, 0, 0, SMH_BANK(1), SMH_BANK(1));
199	199	}
200	200	break;
201	201
202	202	case BANK_RAMCARD_ROM:
203		memory_install_readwrite8_handler(cputag_get_address_space(machine, Z80_TAG, ADDRESS_SPACE_PROGRAM), 0x0000, 0x3fff, 0, 0x4000, SMH_BANK1, SMH_UNMAP);
	203	memory_install_readwrite8_handler(cputag_get_address_space(machine, Z80_TAG, ADDRESS_SPACE_PROGRAM), 0x0000, 0x3fff, 0, 0x4000, SMH_BANK(1), SMH_UNMAP);
204	204	break;
205	205
206	206	case BANK_ROM:
207		memory_install_readwrite8_handler(cputag_get_address_space(machine, Z80_TAG, ADDRESS_SPACE_PROGRAM), 0x0000, 0x7fff, 0, 0, SMH_BANK1, SMH_UNMAP);
	207	memory_install_readwrite8_handler(cputag_get_address_space(machine, Z80_TAG, ADDRESS_SPACE_PROGRAM), 0x0000, 0x7fff, 0, 0, SMH_BANK(1), SMH_UNMAP);
208	208	break;
209	209	}
210	210
r4679	r4680
224	224	}
225	225	else
226	226	{
227		memory_install_readwrite8_handler(cputag_get_address_space(space->machine, Z80_TAG, ADDRESS_SPACE_PROGRAM), 0x0000, 0x7fff, 0, 0, SMH_BANK1, SMH_BANK1);
	227	memory_install_readwrite8_handler(cputag_get_address_space(space->machine, Z80_TAG, ADDRESS_SPACE_PROGRAM), 0x0000, 0x7fff, 0, 0, SMH_BANK(1), SMH_BANK(1));
228	228	}
229	229
230	230	memory_configure_bank(space->machine, 1, BANK_RAMCARD_RAM, 1, state->ramcard_ram + bank_offset, 0);
r4679	r4680
563	563	bw2_state *state = machine->driver_data;
564	564
565	565	/* allocate work memory */
566		state->work_ram = auto_malloc(mess_ram_size);
	566	state->work_ram = auto_alloc_array(machine, UINT8, mess_ram_size);
567	567
568	568	/* allocate video memory */
569		state->video_ram = auto_malloc(BW2_VIDEORAM_SIZE);
	569	state->video_ram = auto_alloc_array(machine, UINT8, BW2_VIDEORAM_SIZE);
570	570
571	571	/* allocate RAMcard memory */
572		state->ramcard_ram = auto_malloc(BW2_RAMCARD_SIZE);
	572	state->ramcard_ram = auto_alloc_array(machine, UINT8, BW2_RAMCARD_SIZE);
573	573	}
574	574
575	575	static MACHINE_START( bw2 )

src/mess/drivers/osi.c

r4679	r4680
679	679	switch (mess_ram_size)
680	680	{
681	681	case 4*1024:
682		memory_install_readwrite8_handler(program, 0x0000, 0x0fff, 0, 0, SMH_BANK1, SMH_BANK1);
	682	memory_install_readwrite8_handler(program, 0x0000, 0x0fff, 0, 0, SMH_BANK(1), SMH_BANK(1));
683	683	memory_install_readwrite8_handler(program, 0x1000, 0x1fff, 0, 0, SMH_UNMAP, SMH_UNMAP);
684	684	break;
685	685
686	686	case 8*1024:
687		memory_install_readwrite8_handler(program, 0x0000, 0x1fff, 0, 0, SMH_BANK1, SMH_BANK1);
	687	memory_install_readwrite8_handler(program, 0x0000, 0x1fff, 0, 0, SMH_BANK(1), SMH_BANK(1));
688	688	break;
689	689	}
690	690
r4679	r4680
706	706	switch (mess_ram_size)
707	707	{
708	708	case 8*1024:
709		memory_install_readwrite8_handler(program, 0x0000, 0x1fff, 0, 0, SMH_BANK1, SMH_BANK1);
	709	memory_install_readwrite8_handler(program, 0x0000, 0x1fff, 0, 0, SMH_BANK(1), SMH_BANK(1));
710	710	memory_install_readwrite8_handler(program, 0x2000, 0x4fff, 0, 0, SMH_UNMAP, SMH_UNMAP);
711	711	break;
712	712
713	713	case 20*1024:
714		memory_install_readwrite8_handler(program, 0x0000, 0x4fff, 0, 0, SMH_BANK1, SMH_BANK1);
	714	memory_install_readwrite8_handler(program, 0x0000, 0x4fff, 0, 0, SMH_BANK(1), SMH_BANK(1));
715	715	break;
716	716	}
717	717

src/mess/drivers/oric.c

r4679	r4680
46	46	covered by the roms for these interfaces, can be accessed
47	47	if it is enabled.
48	48
49		SMH_BANK1,SMH_BANK2 and SMH_BANK3 are used for a 16k rom.
50		SMH_BANK2 and SMH_BANK3 are used for a 8k rom.
51		SMH_BANK3 is used for a 2k rom.
	49	SMH_BANK(1),SMH_BANK(2) and SMH_BANK(3) are used for a 16k rom.
	50	SMH_BANK(2) and SMH_BANK(3) are used for a 8k rom.
	51	SMH_BANK(3) is used for a 2k rom.
52	52
53	53	0x0300-0x03ff is I/O access. It is not defined below because the
54	54	memory is setup dynamically depending on hardware that has been selected (microdisc, jasmin, apple2) etc.
r4679	r4680
58	58
59	59	static ADDRESS_MAP_START(oric_mem, ADDRESS_SPACE_PROGRAM, 8)
60	60	AM_RANGE( 0x0000, 0xbfff) AM_RAM AM_BASE( &oric_ram )
61		AM_RANGE( 0xc000, 0xdfff) AM_READWRITE( SMH_BANK1, SMH_BANK5 )
62		AM_RANGE( 0xe000, 0xf7ff) AM_READWRITE( SMH_BANK2, SMH_BANK6 )
63		AM_RANGE( 0xf800, 0xffff) AM_READWRITE( SMH_BANK3, SMH_BANK7 )
	61	AM_RANGE( 0xc000, 0xdfff) AM_READWRITE( SMH_BANK(1), SMH_BANK(5) )
	62	AM_RANGE( 0xe000, 0xf7ff) AM_READWRITE( SMH_BANK(2), SMH_BANK(6) )
	63	AM_RANGE( 0xf800, 0xffff) AM_READWRITE( SMH_BANK(3), SMH_BANK(7) )
64	64	ADDRESS_MAP_END
65	65
66	66	/*
r4679	r4680
73	73	AM_RANGE( 0x031c, 0x031f) AM_DEVREADWRITE("acia",  acia_6551_r, acia_6551_w )
74	74	AM_RANGE( 0x0320, 0x032f) AM_DEVREADWRITE("via6522_1", via_r, via_w)
75	75	AM_RANGE( 0x0400, 0xbfff) AM_RAM
76		AM_RANGE( 0xc000, 0xffff) AM_READWRITE( SMH_BANK1, SMH_BANK2 )
	76	AM_RANGE( 0xc000, 0xffff) AM_READWRITE( SMH_BANK(1), SMH_BANK(2) )
77	77	ADDRESS_MAP_END
78	78
79	79

src/mess/drivers/atom.c

r4679	r4680
107	107	AM_RANGE(0x0a05, 0x7fff) AM_RAM
108	108	AM_RANGE(0x8000, 0x97ff) AM_RAM AM_BASE(&videoram) AM_SIZE(&videoram_size) /* VDG 6847 */
109	109	AM_RANGE(0x9800, 0x9fff) AM_RAM
110		AM_RANGE(0xa000, 0xafff) AM_READ(SMH_BANK1)   /* eprom data from eprom box */
	110	AM_RANGE(0xa000, 0xafff) AM_READ(SMH_BANK(1))   /* eprom data from eprom box */
111	111	AM_RANGE(0xb000, 0xb003) AM_DEVREADWRITE("ppi8255", ppi8255_r, ppi8255_w)
112	112	AM_RANGE(0xb800, 0xbbff) AM_DEVREADWRITE("via6522_0", via_r, via_w)
113	113	AM_RANGE(0xbfff, 0xbfff) AM_READWRITE(atom_eprom_box_r, atom_eprom_box_w)

src/mess/drivers/rt1715.c

r4679	r4680
25	25
26	26	/* Address maps */
27	27	static ADDRESS_MAP_START(rt1715_mem, ADDRESS_SPACE_PROGRAM, 8)
28		AM_RANGE( 0x0000, 0x07ff ) AM_READWRITE(SMH_BANK1, SMH_BANK3)
29		AM_RANGE( 0x0800, 0xffff ) AM_READWRITE(SMH_BANK2, SMH_BANK2)
	28	AM_RANGE( 0x0000, 0x07ff ) AM_READWRITE(SMH_BANK(1), SMH_BANK(3))
	29	AM_RANGE( 0x0800, 0xffff ) AM_READWRITE(SMH_BANK(2), SMH_BANK(2))
30	30	ADDRESS_MAP_END
31	31
32	32	static ADDRESS_MAP_START( rt1715_io , ADDRESS_SPACE_IO, 8)

src/mess/drivers/vector06.c

r4679	r4680
20	20
21	21	/* Address maps */
22	22	static ADDRESS_MAP_START(vector06_mem, ADDRESS_SPACE_PROGRAM, 8)
23		AM_RANGE( 0x0000, 0x7fff ) AM_READWRITE(SMH_BANK1, SMH_BANK2)
24		AM_RANGE( 0x8000, 0xffff ) AM_READWRITE(SMH_BANK3, SMH_BANK4)
	23	AM_RANGE( 0x0000, 0x7fff ) AM_READWRITE(SMH_BANK(1), SMH_BANK(2))
	24	AM_RANGE( 0x8000, 0xffff ) AM_READWRITE(SMH_BANK(3), SMH_BANK(4))
25	25	ADDRESS_MAP_END
26	26
27	27	static ADDRESS_MAP_START( vector06_io , ADDRESS_SPACE_IO, 8)

src/mess/drivers/ql.c

r4679	r4680
546	546	break;
547	547
548	548	case 192*1024:
549		memory_install_readwrite8_handler(program, 0x040000, 0x04ffff, 0, 0, SMH_BANK2, SMH_BANK2);
	549	memory_install_readwrite8_handler(program, 0x040000, 0x04ffff, 0, 0, SMH_BANK(2), SMH_BANK(2));
550	550	memory_install_readwrite8_handler(program, 0x050000, 0x0fffff, 0, 0, SMH_UNMAP, SMH_UNMAP);
551	551	break;
552	552
553	553	case 256*1024:
554		memory_install_readwrite8_handler(program, 0x040000, 0x05ffff, 0, 0, SMH_BANK2, SMH_BANK2);
	554	memory_install_readwrite8_handler(program, 0x040000, 0x05ffff, 0, 0, SMH_BANK(2), SMH_BANK(2));
555	555	memory_install_readwrite8_handler(program, 0x060000, 0x0fffff, 0, 0, SMH_UNMAP, SMH_UNMAP);
556	556	break;
557	557
558	558	case 384*1024:
559		memory_install_readwrite8_handler(program, 0x040000, 0x07ffff, 0, 0, SMH_BANK2, SMH_BANK2);
	559	memory_install_readwrite8_handler(program, 0x040000, 0x07ffff, 0, 0, SMH_BANK(2), SMH_BANK(2));
560	560	memory_install_readwrite8_handler(program, 0x080000, 0x0fffff, 0, 0, SMH_UNMAP, SMH_UNMAP);
561	561	break;
562	562
563	563	case 640*1024:
564		memory_install_readwrite8_handler(program, 0x040000, 0x0bffff, 0, 0, SMH_BANK2, SMH_BANK2);
	564	memory_install_readwrite8_handler(program, 0x040000, 0x0bffff, 0, 0, SMH_BANK(2), SMH_BANK(2));
565	565	memory_install_readwrite8_handler(program, 0x0c0000, 0x0fffff, 0, 0, SMH_UNMAP, SMH_UNMAP);
566	566	break;
567	567
568	568	case 896*1024:
569		memory_install_readwrite8_handler(program, 0x040000, 0x0fffff, 0, 0, SMH_BANK2, SMH_BANK2);
	569	memory_install_readwrite8_handler(program, 0x040000, 0x0fffff, 0, 0, SMH_BANK(2), SMH_BANK(2));
570	570	break;
571	571	}
572	572
r4679	r4680
600	600	{
601	601	if (image_fread(image, ptr, filesize) == filesize)
602	602	{
603		memory_install_readwrite8_handler(cputag_get_address_space(image->machine, M68008_TAG, ADDRESS_SPACE_PROGRAM), 0x00c000, 0x00ffff, 0, 0, SMH_BANK1, SMH_UNMAP);
	603	memory_install_readwrite8_handler(cputag_get_address_space(image->machine, M68008_TAG, ADDRESS_SPACE_PROGRAM), 0x00c000, 0x00ffff, 0, 0, SMH_BANK(1), SMH_UNMAP);
604	604
605	605	return INIT_PASS;
606	606	}

src/mess/drivers/saturn.c

r4679	r4680
2202	2202	minit_boost_timeslice = attotime_zero;
2203	2203	sinit_boost_timeslice = attotime_zero;
2204	2204
2205		smpc_ram = auto_malloc (0x80);
2206		stv_scu = auto_malloc (0x100);
2207		scsp_regs = auto_malloc (0x1000);
	2205	smpc_ram = auto_alloc_array(machine, UINT8, 0x80);
	2206	stv_scu = auto_alloc_array(machine, UINT32, 0x100/4);
	2207	scsp_regs = auto_alloc_array(machine, UINT16, 0x1000/2);
2208	2208
2209	2209	smpc_ram[0x23] = DectoBCD(systime.local_time.year / 100);
2210	2210	smpc_ram[0x25] = DectoBCD(systime.local_time.year % 100);

src/mess/drivers/amiga.c

r4679	r4680
465	465	}
466	466
467	467	/* overlay disabled, map RAM on 0x000000 */
468		memory_install_write16_handler(cputag_get_address_space(device->machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x000000, amiga_chip_ram_size - 1, 0, mirror_mask, SMH_BANK1);
	468	memory_install_write16_handler(cputag_get_address_space(device->machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x000000, amiga_chip_ram_size - 1, 0, mirror_mask, SMH_BANK(1));
469	469
470	470	amiga_cart_check_overlay(device->machine);
471	471	}

src/mess/drivers/abc80x.c

r4679	r4680
215	215	if (state->fetch_charram)
216	216	{
217	217	/* HR video RAM selected */
218		memory_install_readwrite8_handler(program, 0x0000, 0x3fff, 0, 0, SMH_BANK1, SMH_BANK1);
	218	memory_install_readwrite8_handler(program, 0x0000, 0x3fff, 0, 0, SMH_BANK(1), SMH_BANK(1));
219	219	}
220	220	else
221	221	{
222	222	/* BASIC ROM selected */
223		memory_install_readwrite8_handler(program, 0x0000, 0x3fff, 0, 0, SMH_BANK1, SMH_UNMAP);
	223	memory_install_readwrite8_handler(program, 0x0000, 0x3fff, 0, 0, SMH_BANK(1), SMH_UNMAP);
224	224	}
225	225
226	226	memory_set_bank(machine, 1, state->fetch_charram);
r4679	r4680
234	234	if (state->lrs)
235	235	{
236	236	/* ROM and video RAM selected */
237		memory_install_readwrite8_handler(program, 0x0000, 0x77ff, 0, 0, SMH_BANK1, SMH_BANK1);
	237	memory_install_readwrite8_handler(program, 0x0000, 0x77ff, 0, 0, SMH_BANK(1), SMH_BANK(1));
238	238	memory_install_readwrite8_handler(program, 0x7800, 0x7fff, 0, 0, abc802_charram_r, abc802_charram_w);
239	239	}
240	240	else
241	241	{
242	242	/* low RAM selected */
243		memory_install_readwrite8_handler(program, 0x0000, 0x7fff, 0, 0, SMH_BANK1, SMH_BANK1);
	243	memory_install_readwrite8_handler(program, 0x0000, 0x7fff, 0, 0, SMH_BANK(1), SMH_BANK(1));
244	244	}
245	245
246	246	memory_set_bank(machine, 1, state->lrs);
r4679	r4680
1050	1050
1051	1051	/* configure memory */
1052	1052
1053		state->videoram = auto_malloc(ABC800_VIDEO_RAM_SIZE);
	1053	state->videoram = auto_alloc_array(machine, UINT8, ABC800_VIDEO_RAM_SIZE);
1054	1054
1055	1055	memory_configure_bank(machine, 1, 0, 1, memory_region(machine, Z80_TAG), 0);
1056	1056	memory_configure_bank(machine, 1, 1, 1, state->videoram, 0);
r4679	r4680
1139	1139
1140	1140	/* setup memory banking */
1141	1141
1142		state->videoram = auto_malloc(videoram_size);
	1142	state->videoram = auto_alloc_array(machine, UINT8, videoram_size);
1143	1143
1144	1144	for (bank = 1; bank <= 16; bank++)
1145	1145	{

src/mess/drivers/tmc2000e.c

r4679	r4680
253	253
254	254	/* allocate color RAM */
255	255
256		state->colorram = auto_malloc(TMC2000E_COLORRAM_SIZE);
	256	state->colorram = auto_alloc_array(machine, UINT8, TMC2000E_COLORRAM_SIZE);
257	257
258	258	/* find devices */
259	259

src/mess/drivers/tmc1800.c

r4679	r4680
205	205	switch (mess_ram_size)
206	206	{
207	207	case 4 * 1024:
208		memory_install_readwrite8_handler(cputag_get_address_space(device->machine, CDP1802_TAG, ADDRESS_SPACE_PROGRAM), 0x0000, 0x0fff, 0, 0x7000, SMH_BANK1, SMH_BANK1);
	208	memory_install_readwrite8_handler(cputag_get_address_space(device->machine, CDP1802_TAG, ADDRESS_SPACE_PROGRAM), 0x0000, 0x0fff, 0, 0x7000, SMH_BANK(1), SMH_BANK(1));
209	209	break;
210	210
211	211	case 16 * 1024:
212		memory_install_readwrite8_handler(cputag_get_address_space(device->machine, CDP1802_TAG, ADDRESS_SPACE_PROGRAM), 0x0000, 0x3fff, 0, 0x4000, SMH_BANK1, SMH_BANK1);
	212	memory_install_readwrite8_handler(cputag_get_address_space(device->machine, CDP1802_TAG, ADDRESS_SPACE_PROGRAM), 0x0000, 0x3fff, 0, 0x4000, SMH_BANK(1), SMH_BANK(1));
213	213	break;
214	214
215	215	case 32 * 1024:
216		memory_install_readwrite8_handler(cputag_get_address_space(device->machine, CDP1802_TAG, ADDRESS_SPACE_PROGRAM), 0x0000, 0x7fff, 0, 0, SMH_BANK1, SMH_BANK1);
	216	memory_install_readwrite8_handler(cputag_get_address_space(device->machine, CDP1802_TAG, ADDRESS_SPACE_PROGRAM), 0x0000, 0x7fff, 0, 0, SMH_BANK(1), SMH_BANK(1));
217	217	break;
218	218	}
219	219
r4679	r4680
224	224	switch (bank)
225	225	{
226	226	case TMC2000_BANK_MONITOR:
227		memory_install_readwrite8_handler(cputag_get_address_space(device->machine, CDP1802_TAG, ADDRESS_SPACE_PROGRAM), 0x8000, 0x81ff, 0, 0x7e00, SMH_BANK2, SMH_UNMAP);
	227	memory_install_readwrite8_handler(cputag_get_address_space(device->machine, CDP1802_TAG, ADDRESS_SPACE_PROGRAM), 0x8000, 0x81ff, 0, 0x7e00, SMH_BANK(2), SMH_UNMAP);
228	228	break;
229	229
230	230	case TMC2000_BANK_COLORRAM: // write-only
231		memory_install_readwrite8_handler(cputag_get_address_space(device->machine, CDP1802_TAG, ADDRESS_SPACE_PROGRAM), 0x8000, 0x81ff, 0, 0x7e00, SMH_UNMAP, SMH_BANK2);
	231	memory_install_readwrite8_handler(cputag_get_address_space(device->machine, CDP1802_TAG, ADDRESS_SPACE_PROGRAM), 0x8000, 0x81ff, 0, 0x7e00, SMH_UNMAP, SMH_BANK(2));
232	232	break;
233	233	}
234	234
r4679	r4680
243	243
244	244	memory_set_bank(device->machine, 1, OSCNANO_BANK_RAM);
245	245
246		memory_install_readwrite8_handler(cputag_get_address_space(device->machine, CDP1802_TAG, ADDRESS_SPACE_PROGRAM), 0x0000, 0x0fff, 0, 0x7000, SMH_BANK1, SMH_BANK1);
	246	memory_install_readwrite8_handler(cputag_get_address_space(device->machine, CDP1802_TAG, ADDRESS_SPACE_PROGRAM), 0x0000, 0x0fff, 0, 0x7000, SMH_BANK(1), SMH_BANK(1));
247	247
248	248	/* write to CDP1864 tone latch */
249	249
r4679	r4680
780	780
781	781	/* ROM/colorram banking */
782	782
783		state->colorram = auto_malloc(TMC2000_COLORRAM_SIZE);
	783	state->colorram = auto_alloc_array(machine, UINT8, TMC2000_COLORRAM_SIZE);
784	784
785	785	memory_configure_bank(machine, 2, TMC2000_BANK_MONITOR, 1, memory_region(machine, CDP1802_TAG) + 0x8000, 0);
786	786	memory_configure_bank(machine, 2, TMC2000_BANK_COLORRAM, 1, state->colorram, 0);
r4679	r4680
816	816
817	817	memory_set_bank(machine, 1, TMC2000_BANK_ROM);
818	818
819		memory_install_readwrite8_handler(cputag_get_address_space(machine, CDP1802_TAG, ADDRESS_SPACE_PROGRAM), 0x0000, 0x01ff, 0, 0x7e00, SMH_BANK1, SMH_UNMAP);
	819	memory_install_readwrite8_handler(cputag_get_address_space(machine, CDP1802_TAG, ADDRESS_SPACE_PROGRAM), 0x0000, 0x01ff, 0, 0x7e00, SMH_BANK(1), SMH_UNMAP);
820	820
821	821	/* enable monitor */
822	822
823	823	memory_set_bank(machine, 2, TMC2000_BANK_MONITOR);
824	824
825		memory_install_readwrite8_handler(cputag_get_address_space(machine, CDP1802_TAG, ADDRESS_SPACE_PROGRAM), 0x8000, 0x81ff, 0, 0x7e00, SMH_BANK2, SMH_UNMAP);
	825	memory_install_readwrite8_handler(cputag_get_address_space(machine, CDP1802_TAG, ADDRESS_SPACE_PROGRAM), 0x8000, 0x81ff, 0, 0x7e00, SMH_BANK(2), SMH_UNMAP);
826	826	}
827	827
828	828	// OSCOM Nano
r4679	r4680
867	867
868	868	memory_set_bank(machine, 1, OSCNANO_BANK_ROM);
869	869
870		memory_install_readwrite8_handler(cputag_get_address_space(machine, CDP1802_TAG, ADDRESS_SPACE_PROGRAM), 0x0000, 0x01ff, 0, 0x7e00, SMH_BANK1, SMH_BANK1);
	870	memory_install_readwrite8_handler(cputag_get_address_space(machine, CDP1802_TAG, ADDRESS_SPACE_PROGRAM), 0x0000, 0x01ff, 0, 0x7e00, SMH_BANK(1), SMH_BANK(1));
871	871	}
872	872
873	873	/* Machine Drivers */

src/mess/drivers/a7800.c

r4679	r4680
33	33	static ADDRESS_MAP_START( a7800_mem, ADDRESS_SPACE_PROGRAM, 8 )
34	34	AM_RANGE(0x0000, 0x001f) AM_MIRROR(0x300) AM_READWRITE(a7800_TIA_r, a7800_TIA_w)
35	35	AM_RANGE(0x0020, 0x003f) AM_MIRROR(0x300) AM_READWRITE(a7800_MARIA_r, a7800_MARIA_w)
36		AM_RANGE(0x0040, 0x00ff) AM_READWRITE(SMH_BANK5, a7800_RAM0_w)   /* RAM (6116 block 0) */
	36	AM_RANGE(0x0040, 0x00ff) AM_READWRITE(SMH_BANK(5), a7800_RAM0_w)   /* RAM (6116 block 0) */
37	37	AM_RANGE(0x0140, 0x01ff) AM_RAMBANK(6)   /* RAM (6116 block 1) */
38	38	AM_RANGE(0x0280, 0x02ff) AM_DEVREADWRITE("riot", riot6532_r, riot6532_w)
39	39	AM_RANGE(0x0480, 0x04ff) AM_MIRROR(0x100) AM_RAM   /* RIOT RAM */

src/mess/drivers/newbrain.c

r4679	r4680
1438	1438	MACHINE_START_CALL(newbrain);
1439	1439
1440	1440	/* allocate expansion RAM */
1441		state->eim_ram = auto_malloc(NEWBRAIN_EIM_RAM_SIZE);
	1441	state->eim_ram = auto_alloc_array(machine, UINT8, NEWBRAIN_EIM_RAM_SIZE);
1442	1442
1443	1443	/* find devices */
1444	1444	state->z80ctc = devtag_get_device(machine, Z80CTC_TAG);

src/mess/drivers/einstein.c

r4679	r4680
267	267	};
268	268
269	269	/* 80 column card init */
270		static void   einstein_80col_init(void)
	270	static void   einstein_80col_init(running_machine *machine)
271	271	{
272	272	/* 2K RAM */
273		einstein_80col_ram = auto_malloc(2048);
	273	einstein_80col_ram = auto_alloc_array(machine, char, 2048);
274	274
275	275	einstein_80col_state=(1<<2)|(1<<1);
276	276	}
r4679	r4680
784	784
785	785
786	786	static ADDRESS_MAP_START( einstein_mem , ADDRESS_SPACE_PROGRAM, 8)
787		AM_RANGE(0x0000, 0x01fff) AM_READWRITE(SMH_BANK1, SMH_BANK3)
788		AM_RANGE(0x2000, 0x0ffff) AM_READWRITE(SMH_BANK2, SMH_BANK4)
	787	AM_RANGE(0x0000, 0x01fff) AM_READWRITE(SMH_BANK(1), SMH_BANK(3))
	788	AM_RANGE(0x2000, 0x0ffff) AM_READWRITE(SMH_BANK(2), SMH_BANK(4))
789	789	ADDRESS_MAP_END
790	790
791	791
r4679	r4680
1400	1400	static MACHINE_RESET( einstein2 )
1401	1401	{
1402	1402	MACHINE_RESET_CALL(einstein);
1403		einstein_80col_init();
	1403	einstein_80col_init(machine);
1404	1404	}
1405	1405
1406	1406	static INPUT_PORTS_START(einstein)

src/mess/drivers/exelv.c

r4679	r4680
64	64	static VIDEO_START( exelv )
65	65	{
66	66	VIDEO_START_CALL( generic_bitmapped );
67		tms3556_init(/*0x8000*/0x10000);   /* tms3556 with 32 kb of video RAM */
	67	tms3556_init(machine, /*0x8000*/0x10000);   /* tms3556 with 32 kb of video RAM */
68	68	}
69	69
70	70	static MACHINE_RESET( exelv )

src/mess/drivers/osborne1.c

r4679	r4680
48	48
49	49
50	50	static ADDRESS_MAP_START( osborne1_mem, ADDRESS_SPACE_PROGRAM, 8 )
51		AM_RANGE( 0x0000, 0x0FFF ) AM_READWRITE( SMH_BANK1, osborne1_0000_w )
52		AM_RANGE( 0x1000, 0x1FFF ) AM_READWRITE( SMH_BANK2, osborne1_1000_w )
	51	AM_RANGE( 0x0000, 0x0FFF ) AM_READWRITE( SMH_BANK(1), osborne1_0000_w )
	52	AM_RANGE( 0x1000, 0x1FFF ) AM_READWRITE( SMH_BANK(2), osborne1_1000_w )
53	53	AM_RANGE( 0x2000, 0x2FFF ) AM_READWRITE( osborne1_2000_r, osborne1_2000_w )
54		AM_RANGE( 0x3000, 0x3FFF ) AM_READWRITE( SMH_BANK3, osborne1_3000_w )
	54	AM_RANGE( 0x3000, 0x3FFF ) AM_READWRITE( SMH_BANK(3), osborne1_3000_w )
55	55	AM_RANGE( 0x4000, 0xEFFF ) AM_RAM
56		AM_RANGE( 0xF000, 0xFFFF ) AM_READWRITE( SMH_BANK4, osborne1_videoram_w )
	56	AM_RANGE( 0xF000, 0xFFFF ) AM_READWRITE( SMH_BANK(4), osborne1_videoram_w )
57	57	ADDRESS_MAP_END
58	58
59	59

src/mess/drivers/amstrad.c

r4679	r4680
160	160	pages the memory in 8k blocks! The ROM can
161	161	be paged into bank 0 and bank 3. */
162	162	static ADDRESS_MAP_START(amstrad_mem, ADDRESS_SPACE_PROGRAM, 8)
163		AM_RANGE(0x00000, 0x01fff) AM_READWRITE(SMH_BANK1, SMH_BANK9)
164		AM_RANGE(0x02000, 0x03fff) AM_READWRITE(SMH_BANK2, SMH_BANK10)
165		AM_RANGE(0x04000, 0x05fff) AM_READWRITE(SMH_BANK3, SMH_BANK11)
166		AM_RANGE(0x06000, 0x07fff) AM_READWRITE(SMH_BANK4, SMH_BANK12)
167		AM_RANGE(0x08000, 0x09fff) AM_READWRITE(SMH_BANK5, SMH_BANK13)
168		AM_RANGE(0x0a000, 0x0bfff) AM_READWRITE(SMH_BANK6, SMH_BANK14)
169		AM_RANGE(0x0c000, 0x0dfff) AM_READWRITE(SMH_BANK7, SMH_BANK15)
170		AM_RANGE(0x0e000, 0x0ffff) AM_READWRITE(SMH_BANK8, SMH_BANK16)
	163	AM_RANGE(0x00000, 0x01fff) AM_READWRITE(SMH_BANK(1), SMH_BANK(9))
	164	AM_RANGE(0x02000, 0x03fff) AM_READWRITE(SMH_BANK(2), SMH_BANK(10))
	165	AM_RANGE(0x04000, 0x05fff) AM_READWRITE(SMH_BANK(3), SMH_BANK(11))
	166	AM_RANGE(0x06000, 0x07fff) AM_READWRITE(SMH_BANK(4), SMH_BANK(12))
	167	AM_RANGE(0x08000, 0x09fff) AM_READWRITE(SMH_BANK(5), SMH_BANK(13))
	168	AM_RANGE(0x0a000, 0x0bfff) AM_READWRITE(SMH_BANK(6), SMH_BANK(14))
	169	AM_RANGE(0x0c000, 0x0dfff) AM_READWRITE(SMH_BANK(7), SMH_BANK(15))
	170	AM_RANGE(0x0e000, 0x0ffff) AM_READWRITE(SMH_BANK(8), SMH_BANK(16))
171	171	ADDRESS_MAP_END
172	172
173	173	/* I've handled the I/O ports in this way, because the ports

src/mess/drivers/kyocera.c

r4679	r4680
105	105	}
106	106
107	107	if (!optional_rom)
108		memory_install_readwrite8_handler(space_program, 0x0000, 0x7fff, 0, 0, SMH_BANK1, read_only ? SMH_UNMAP : SMH_BANK1);
	108	memory_install_readwrite8_handler(space_program, 0x0000, 0x7fff, 0, 0, SMH_BANK(1), read_only ? SMH_UNMAP : SMH_BANK(1));
109	109	}
110	110
111	111	if (((data >> 2) & 0x03) != ram_page)
r4679	r4680
157	157	{
158	158	case 0:
159	159	memory_set_bankptr(space_program->machine, 1, rom + 0x10000);
160		memory_install_readwrite8_handler(space_program, 0x0000, 0x7fff, 0, 0, SMH_BANK1, SMH_UNMAP);
161		memory_install_readwrite8_handler(space_program, 0x8000, 0x9fff, 0, 0, SMH_BANK2, SMH_UNMAP);
	160	memory_install_readwrite8_handler(space_program, 0x0000, 0x7fff, 0, 0, SMH_BANK(1), SMH_UNMAP);
	161	memory_install_readwrite8_handler(space_program, 0x8000, 0x9fff, 0, 0, SMH_BANK(2), SMH_UNMAP);
162	162	break;
163	163	case 1:
164	164	memory_set_bankptr(space_program->machine, 1, rom + 0x1a000);   /* Multiplan */
165		memory_install_readwrite8_handler(space_program, 0x0000, 0x7fff, 0, 0, SMH_BANK1, SMH_UNMAP);
	165	memory_install_readwrite8_handler(space_program, 0x0000, 0x7fff, 0, 0, SMH_BANK(1), SMH_UNMAP);
166	166	memory_install_readwrite8_handler(space_program, 0x8000, 0x9fff, 0, 0, SMH_UNMAP, SMH_UNMAP);
167	167	break;
168	168	case 2: /* Optional ROM, not implemented yet */
r4679	r4680
850	850	{
851	851	UINT8 *rom = memory_region(machine, I8085_TAG);
852	852
853		memory_install_readwrite8_handler(cputag_get_address_space(machine, I8085_TAG, ADDRESS_SPACE_PROGRAM), 0x0000, 0x7fff, 0, 0, SMH_BANK1, SMH_UNMAP);
854		memory_install_readwrite8_handler(cputag_get_address_space(machine, I8085_TAG, ADDRESS_SPACE_PROGRAM), 0x8000, 0xffff, 0, 0, SMH_BANK2, SMH_BANK2);
	853	memory_install_readwrite8_handler(cputag_get_address_space(machine, I8085_TAG, ADDRESS_SPACE_PROGRAM), 0x0000, 0x7fff, 0, 0, SMH_BANK(1), SMH_UNMAP);
	854	memory_install_readwrite8_handler(cputag_get_address_space(machine, I8085_TAG, ADDRESS_SPACE_PROGRAM), 0x8000, 0xffff, 0, 0, SMH_BANK(2), SMH_BANK(2));
855	855
856	856	memory_set_bankptr(machine, 1, rom + 0x10000);
857	857	memory_set_bankptr(machine, 2, mess_ram);
r4679	r4680
861	861	{
862	862	UINT8 *rom = memory_region(machine, I8085_TAG);
863	863
864		memory_install_readwrite8_handler(cputag_get_address_space(machine, I8085_TAG, ADDRESS_SPACE_PROGRAM), 0x0000, 0x7fff, 0, 0, SMH_BANK1, SMH_UNMAP);
865		memory_install_readwrite8_handler(cputag_get_address_space(machine, I8085_TAG, ADDRESS_SPACE_PROGRAM), 0x8000, 0x9fff, 0, 0, SMH_BANK2, SMH_UNMAP);
866		memory_install_readwrite8_handler(cputag_get_address_space(machine, I8085_TAG, ADDRESS_SPACE_PROGRAM), 0xa000, 0xffff, 0, 0, SMH_BANK3, SMH_BANK3);
	864	memory_install_readwrite8_handler(cputag_get_address_space(machine, I8085_TAG, ADDRESS_SPACE_PROGRAM), 0x0000, 0x7fff, 0, 0, SMH_BANK(1), SMH_UNMAP);
	865	memory_install_readwrite8_handler(cputag_get_address_space(machine, I8085_TAG, ADDRESS_SPACE_PROGRAM), 0x8000, 0x9fff, 0, 0, SMH_BANK(2), SMH_UNMAP);
	866	memory_install_readwrite8_handler(cputag_get_address_space(machine, I8085_TAG, ADDRESS_SPACE_PROGRAM), 0xa000, 0xffff, 0, 0, SMH_BANK(3), SMH_BANK(3));
867	867
868	868	memory_set_bankptr(machine, 1, rom + 0x10000);
869	869	memory_set_bankptr(machine, 2, rom + 0x18000);

src/mess/drivers/sms.c

r4679	r4680
74	74	AM_RANGE(0x0000, 0x03FF) AM_ROMBANK(1)               /* First 0x0400 part always points to first page */
75	75	AM_RANGE(0x0400, 0x3FFF) AM_ROMBANK(2)               /* switchable rom bank */
76	76	AM_RANGE(0x4000, 0x7FFF) AM_ROMBANK(3)               /* switchable rom bank */
77		AM_RANGE(0x8000, 0x9FFF) AM_READWRITE(SMH_BANK4, sms_cartram_w)   /* ROM bank / on-cart RAM */
78		AM_RANGE(0xA000, 0xBFFF) AM_READWRITE(SMH_BANK5, sms_cartram2_w)   /* ROM bank / on-cart RAM */
	77	AM_RANGE(0x8000, 0x9FFF) AM_READWRITE(SMH_BANK(4), sms_cartram_w)   /* ROM bank / on-cart RAM */
	78	AM_RANGE(0xA000, 0xBFFF) AM_READWRITE(SMH_BANK(5), sms_cartram2_w)   /* ROM bank / on-cart RAM */
79	79	AM_RANGE(0xC000, 0xDFFB) AM_MIRROR(0x2000) AM_RAM         /* RAM (mirror at 0xE000) */
80	80	AM_RANGE(0xDFFC, 0xDFFF) AM_RAM                  /* RAM "underneath" frame registers */
81	81	AM_RANGE(0xFFFC, 0xFFFF) AM_READWRITE(sms_mapper_r, sms_mapper_w)   /* Bankswitch control */

src/mess/drivers/avigo.c

r4679	r4680
333	333	/* ram */
334	334	case 0x01:
335	335	addr = mess_ram + ((avigo_ram_bank_l & 0x07)<<14);
336		avigo_setbank(machine, 2, addr, SMH_BANK3, SMH_BANK7);
	336	avigo_setbank(machine, 2, addr, SMH_BANK(3), SMH_BANK(7));
337	337	break;
338	338
339	339	/* %111 */
r4679	r4680
455	455
456	456
457	457	static ADDRESS_MAP_START( avigo_mem , ADDRESS_SPACE_PROGRAM, 8)
458		AM_RANGE(0x0000, 0x3fff) AM_READWRITE( SMH_BANK1, SMH_BANK5 )
459		AM_RANGE(0x4000, 0x7fff) AM_READWRITE( SMH_BANK2, SMH_BANK6 )
460		AM_RANGE(0x8000, 0xbfff) AM_READWRITE( SMH_BANK3, SMH_BANK7 )
461		AM_RANGE(0xc000, 0xffff) AM_READWRITE( SMH_BANK4, SMH_BANK8 )
	458	AM_RANGE(0x0000, 0x3fff) AM_READWRITE( SMH_BANK(1), SMH_BANK(5) )
	459	AM_RANGE(0x4000, 0x7fff) AM_READWRITE( SMH_BANK(2), SMH_BANK(6) )
	460	AM_RANGE(0x8000, 0xbfff) AM_READWRITE( SMH_BANK(3), SMH_BANK(7) )
	461	AM_RANGE(0xc000, 0xffff) AM_READWRITE( SMH_BANK(4), SMH_BANK(8) )
462	462	ADDRESS_MAP_END
463	463
464	464

src/mess/drivers/cybiko.c

r4679	r4680
90	90	// 256 kbyte ram + 256 kbyte memory mapped flash
91	91	static ADDRESS_MAP_START( cybikov2_mem, ADDRESS_SPACE_PROGRAM, 16 )
92	92	AM_RANGE_SL( 0x000000, 0x008000) AM_ROM
93		AM_RANGE_SL( 0x100000, 0x040000) AM_READ( SMH_BANK2) AM_MIRROR( 0x0C0000)
	93	AM_RANGE_SL( 0x100000, 0x040000) AM_READ( SMH_BANK(2)) AM_MIRROR( 0x0C0000)
94	94	//  AM_RANGE_SL( 0x200000, 0x040000) AM_RAM AM_MIRROR( 0x1C0000)
95	95	AM_RANGE_SL( 0x600000, 0x000002) AM_READWRITE( cybiko_lcd_r, cybiko_lcd_w)
96	96	AM_RANGE_SL( 0xE00000, 0x1FDC00) AM_READ( cybiko_key_r)
r4679	r4680
102	102	AM_RANGE_SL( 0x100000, 0x000002) AM_READWRITE( cybiko_lcd_r, cybiko_lcd_w)
103	103	AM_RANGE_SL( 0x200000, 0x000004) AM_WRITE( cybiko_unk1_w)
104	104	//  AM_RANGE_SL( 0x400000, 0x200000) AM_RAM
105		AM_RANGE_SL( 0x600000, 0x080000) AM_READ( SMH_BANK2)
	105	AM_RANGE_SL( 0x600000, 0x080000) AM_READ( SMH_BANK(2))
106	106	AM_RANGE_SL( 0x7FF800, 0x000800) AM_READ( cybiko_unk2_r)
107	107	AM_RANGE_SL( 0xE00000, 0x1FDC00) AM_READ( cybiko_key_r)
108	108	ADDRESS_MAP_END

src/mess/drivers/pp01.c

r4679	r4680
14	14
15	15	/* Address maps */
16	16	static ADDRESS_MAP_START(pp01_mem, ADDRESS_SPACE_PROGRAM, 8)
17		AM_RANGE(0x0000, 0x3fff) AM_READWRITE(SMH_BANK1, SMH_BANK1)
18		AM_RANGE(0x4000, 0x7fff) AM_READWRITE(SMH_BANK2, SMH_BANK2)
19		AM_RANGE(0x8000, 0xbfff) AM_READWRITE(SMH_BANK3, SMH_ROM)
20		AM_RANGE(0xc000, 0xffff) AM_READWRITE(SMH_BANK4, SMH_BANK4)
	17	AM_RANGE(0x0000, 0x3fff) AM_READWRITE(SMH_BANK(1), SMH_BANK(1))
	18	AM_RANGE(0x4000, 0x7fff) AM_READWRITE(SMH_BANK(2), SMH_BANK(2))
	19	AM_RANGE(0x8000, 0xbfff) AM_READWRITE(SMH_BANK(3), SMH_ROM)
	20	AM_RANGE(0xc000, 0xffff) AM_READWRITE(SMH_BANK(4), SMH_BANK(4))
21	21	ADDRESS_MAP_END
22	22
23	23	static ADDRESS_MAP_START( pp01_io, ADDRESS_SPACE_IO, 8 )

src/mess/drivers/ti85.c

r4679	r4680
178	178	/* memory w/r functions */
179	179
180	180	static ADDRESS_MAP_START( ti81_mem , ADDRESS_SPACE_PROGRAM, 8)
181		AM_RANGE(0x0000, 0x3fff) AM_READWRITE( SMH_BANK1, SMH_BANK3 )
182		AM_RANGE(0x4000, 0x7fff) AM_READWRITE( SMH_BANK2, SMH_BANK4 )
	181	AM_RANGE(0x0000, 0x3fff) AM_READWRITE( SMH_BANK(1), SMH_BANK(3) )
	182	AM_RANGE(0x4000, 0x7fff) AM_READWRITE( SMH_BANK(2), SMH_BANK(4) )
183	183	AM_RANGE(0x8000, 0xffff) AM_RAM
184	184	ADDRESS_MAP_END
185	185
186	186	static ADDRESS_MAP_START( ti85_mem , ADDRESS_SPACE_PROGRAM, 8)
187		AM_RANGE(0x0000, 0x3fff) AM_READWRITE( SMH_BANK1, SMH_BANK3 )
188		AM_RANGE(0x4000, 0x7fff) AM_READWRITE( SMH_BANK2, SMH_BANK4 )
	187	AM_RANGE(0x0000, 0x3fff) AM_READWRITE( SMH_BANK(1), SMH_BANK(3) )
	188	AM_RANGE(0x4000, 0x7fff) AM_READWRITE( SMH_BANK(2), SMH_BANK(4) )
189	189	AM_RANGE(0x8000, 0xffff) AM_RAM
190	190	ADDRESS_MAP_END
191	191
192	192	static ADDRESS_MAP_START( ti86_mem , ADDRESS_SPACE_PROGRAM, 8)
193		AM_RANGE(0x0000, 0x3fff) AM_READWRITE( SMH_BANK1, SMH_BANK5 )
194		AM_RANGE(0x4000, 0x7fff) AM_READWRITE( SMH_BANK2, SMH_BANK6 )
195		AM_RANGE(0x8000, 0xbfff) AM_READWRITE( SMH_BANK3, SMH_BANK7 )
196		AM_RANGE(0xc000, 0xffff) AM_READWRITE( SMH_BANK4, SMH_BANK8 )
	193	AM_RANGE(0x0000, 0x3fff) AM_READWRITE( SMH_BANK(1), SMH_BANK(5) )
	194	AM_RANGE(0x4000, 0x7fff) AM_READWRITE( SMH_BANK(2), SMH_BANK(6) )
	195	AM_RANGE(0x8000, 0xbfff) AM_READWRITE( SMH_BANK(3), SMH_BANK(7) )
	196	AM_RANGE(0xc000, 0xffff) AM_READWRITE( SMH_BANK(4), SMH_BANK(8) )
197	197	ADDRESS_MAP_END
198	198
199	199	/* keyboard input */

src/mess/drivers/c64.c

r4679	r4680
357	357
358	358	static ADDRESS_MAP_START(c64_mem, ADDRESS_SPACE_PROGRAM, 8)
359	359	AM_RANGE(0x0000, 0x7fff) AM_RAM AM_BASE(&c64_memory)
360		AM_RANGE(0x8000, 0x9fff) AM_READWRITE(SMH_BANK1, SMH_BANK2)      /* ram or external roml */
	360	AM_RANGE(0x8000, 0x9fff) AM_READWRITE(SMH_BANK(1), SMH_BANK(2))      /* ram or external roml */
361	361	AM_RANGE(0xa000, 0xbfff) AM_ROMBANK(3) AM_WRITEONLY            /* ram or basic rom or external romh */
362	362	AM_RANGE(0xc000, 0xcfff) AM_RAM
363	363	AM_RANGE(0xd000, 0xdfff) AM_READWRITE(c64_ioarea_r, c64_ioarea_w)
364		AM_RANGE(0xe000, 0xffff) AM_READWRITE(SMH_BANK4, SMH_BANK5)      /* ram or kernel rom or external romh */
	364	AM_RANGE(0xe000, 0xffff) AM_READWRITE(SMH_BANK(4), SMH_BANK(5))      /* ram or kernel rom or external romh */
365	365	ADDRESS_MAP_END
366	366
367	367

src/mess/drivers/svi318.c

r4679	r4680
27	27	#include "sv328806.lh"
28	28
29	29	static ADDRESS_MAP_START( svi318_mem, ADDRESS_SPACE_PROGRAM, 8 )
30		AM_RANGE( 0x0000, 0x7fff) AM_READWRITE( SMH_BANK1, svi318_writemem1 )
31		AM_RANGE( 0x8000, 0xbfff) AM_READWRITE( SMH_BANK2, svi318_writemem2 )
32		AM_RANGE( 0xc000, 0xffff) AM_READWRITE( SMH_BANK3, svi318_writemem3 )
	30	AM_RANGE( 0x0000, 0x7fff) AM_READWRITE( SMH_BANK(1), svi318_writemem1 )
	31	AM_RANGE( 0x8000, 0xbfff) AM_READWRITE( SMH_BANK(2), svi318_writemem2 )
	32	AM_RANGE( 0xc000, 0xffff) AM_READWRITE( SMH_BANK(3), svi318_writemem3 )
33	33	ADDRESS_MAP_END
34	34
35	35	static ADDRESS_MAP_START( svi328_806_mem, ADDRESS_SPACE_PROGRAM, 8 )
36		AM_RANGE( 0x0000, 0x7fff) AM_READWRITE( SMH_BANK1, svi318_writemem1 )
37		AM_RANGE( 0x8000, 0xbfff) AM_READWRITE( SMH_BANK2, svi318_writemem2 )
38		AM_RANGE( 0xc000, 0xefff) AM_READWRITE( SMH_BANK3, svi318_writemem3 )
39		AM_RANGE( 0xf000, 0xffff) AM_READWRITE( SMH_BANK4, svi318_writemem4 )
	36	AM_RANGE( 0x0000, 0x7fff) AM_READWRITE( SMH_BANK(1), svi318_writemem1 )
	37	AM_RANGE( 0x8000, 0xbfff) AM_READWRITE( SMH_BANK(2), svi318_writemem2 )
	38	AM_RANGE( 0xc000, 0xefff) AM_READWRITE( SMH_BANK(3), svi318_writemem3 )
	39	AM_RANGE( 0xf000, 0xffff) AM_READWRITE( SMH_BANK(4), svi318_writemem4 )
40	40	ADDRESS_MAP_END
41	41
42	42	static ADDRESS_MAP_START( svi318_io, ADDRESS_SPACE_IO, 8 )

src/mess/drivers/vc4000.c

r4679	r4680
193	193
194	194	if (size > 0x1000)   /* 6k rom + 1k ram - Chess2 only */
195	195	{
196		memory_install_read8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x1000, 0x15ff, 0, 0, SMH_BANK1);   /* extra rom */
	196	memory_install_read8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x1000, 0x15ff, 0, 0, SMH_BANK(1));   /* extra rom */
197	197	memory_set_bankptr(machine, 1, memory_region(machine, "maincpu") + 0x1000);
198	198
199		memory_install_readwrite8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x1800, 0x1bff, 0, 0, SMH_BANK3, SMH_BANK4);   /* ram */
	199	memory_install_readwrite8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x1800, 0x1bff, 0, 0, SMH_BANK(3), SMH_BANK(4));   /* ram */
200	200	memory_set_bankptr(machine, 3, memory_region(machine, "maincpu") + 0x1800);
201	201	memory_set_bankptr(machine, 4, memory_region(machine, "maincpu") + 0x1800);
202	202	}
203	203	else
204	204	if (size > 0x0800)   /* some 4k roms have 1k of mirrored ram */
205	205	{
206		memory_install_readwrite8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x1000, 0x15ff, 0, 0x800, SMH_BANK1, SMH_BANK2); /* ram */
	206	memory_install_readwrite8_handler(cputag_get_address_space(machine, "maincpu", ADDRESS_SPACE_PROGRAM), 0x1000, 0x15ff, 0, 0x800, SMH_BANK(1), SMH_BANK(2)); /* ram */
207	207	memory_set_bankptr(machine, 1, memory_region(machine, "maincpu") + 0x1000);
208	208	memory_set_bankptr(machine, 2, memory_region(machine, "maincpu") + 0x1000);
209	209	}

src/mess/drivers/bbc.c

r4679	r4680
92	92	static ADDRESS_MAP_START(bbca_mem, ADDRESS_SPACE_PROGRAM, 8)
93	93	ADDRESS_MAP_UNMAP_LOW                                 /*  Hardware marked with a 1 is not present in a Model A        */
94	94
95		AM_RANGE(0x0000, 0x3fff) AM_READWRITE(SMH_BANK1      , bbc_memorya1_w         )   /*    0000-3fff                 Regular Ram                     */
96		AM_RANGE(0x4000, 0x7fff) AM_READWRITE(SMH_BANK3      , bbc_memorya1_w         )   /*    4000-7fff                 Repeat of the Regular Ram       */
	95	AM_RANGE(0x0000, 0x3fff) AM_READWRITE(SMH_BANK(1)      , bbc_memorya1_w         )   /*    0000-3fff                 Regular Ram                     */
	96	AM_RANGE(0x4000, 0x7fff) AM_READWRITE(SMH_BANK(3)      , bbc_memorya1_w         )   /*    4000-7fff                 Repeat of the Regular Ram       */
97	97
98		AM_RANGE(0x8000, 0xbfff) AM_READWRITE(SMH_BANK4      , SMH_ROM         )   /*    8000-bfff                 Paged ROM                       */
	98	AM_RANGE(0x8000, 0xbfff) AM_READWRITE(SMH_BANK(4)      , SMH_ROM         )   /*    8000-bfff                 Paged ROM                       */
99	99
100		AM_RANGE(0xc000, 0xfbff) AM_READWRITE(SMH_BANK7       , SMH_ROM         )   /*    c000-fbff                 OS ROM                          */
	100	AM_RANGE(0xc000, 0xfbff) AM_READWRITE(SMH_BANK(7)       , SMH_ROM         )   /*    c000-fbff                 OS ROM                          */
101	101
102	102	AM_RANGE(0xfc00, 0xfdff) AM_READ     (return8_FF                          )   /*    fc00-fdff                 FRED & JIM Pages                */
103	103
r4679	r4680
125	125	static ADDRESS_MAP_START(bbcb_mem, ADDRESS_SPACE_PROGRAM, 8)
126	126	ADDRESS_MAP_UNMAP_LOW
127	127
128		AM_RANGE(0x0000, 0x3fff) AM_READWRITE(SMH_BANK1      , bbc_memorya1_w         )   /*    0000-3fff                 Regular Ram                     */
129		AM_RANGE(0x4000, 0x7fff) AM_READWRITE(SMH_BANK3      , bbc_memoryb3_w         )   /*    4000-7fff                 Repeat of the Regular Ram       */
	128	AM_RANGE(0x0000, 0x3fff) AM_READWRITE(SMH_BANK(1)      , bbc_memorya1_w         )   /*    0000-3fff                 Regular Ram                     */
	129	AM_RANGE(0x4000, 0x7fff) AM_READWRITE(SMH_BANK(3)      , bbc_memoryb3_w         )   /*    4000-7fff                 Repeat of the Regular Ram       */
130	130
131	131
132		AM_RANGE(0x8000, 0xbfff) AM_READWRITE(SMH_BANK4       , bbc_memoryb4_w         )   /*    8000-bfff                 Paged ROM                       */
	132	AM_RANGE(0x8000, 0xbfff) AM_READWRITE(SMH_BANK(4)       , bbc_memoryb4_w         )   /*    8000-bfff                 Paged ROM                       */
133	133
134		AM_RANGE(0xc000, 0xfbff) AM_READWRITE(SMH_BANK7       , SMH_ROM          )   /*    c000-fbff                 OS ROM                          */
	134	AM_RANGE(0xc000, 0xfbff) AM_READWRITE(SMH_BANK(7)       , SMH_ROM          )   /*    c000-fbff                 OS ROM                          */
135	135
136	136	AM_RANGE(0xfc00, 0xfdff) AM_READWRITE(bbc_opus_read     , bbc_opus_write   )   /*    fc00-fdff                 OPUS Disc Controller            */
137	137
r4679	r4680
159	159	static ADDRESS_MAP_START(bbcbp_mem, ADDRESS_SPACE_PROGRAM, 8)
160	160	ADDRESS_MAP_UNMAP_LOW
161	161
162		AM_RANGE(0x0000, 0x2fff) AM_READWRITE(SMH_BANK1      , bbc_memorybp1_w      )   /*    0000-2fff                 Regular Ram                     */
	162	AM_RANGE(0x0000, 0x2fff) AM_READWRITE(SMH_BANK(1)      , bbc_memorybp1_w      )   /*    0000-2fff                 Regular Ram                     */
163	163
164		AM_RANGE(0x3000, 0x7fff) AM_READWRITE(SMH_BANK2      , bbc_memorybp2_w      )   /*    3000-7fff                 Video/Shadow Ram                */
	164	AM_RANGE(0x3000, 0x7fff) AM_READWRITE(SMH_BANK(2)      , bbc_memorybp2_w      )   /*    3000-7fff                 Video/Shadow Ram                */
165	165
166		AM_RANGE(0x8000, 0xafff) AM_READWRITE(SMH_BANK4      , bbc_memorybp4_w      )   /*    8000-afff                 Paged ROM or 12K of RAM         */
167		AM_RANGE(0xb000, 0xbfff) AM_READWRITE(SMH_BANK6      , SMH_ROM         )   /*    b000-bfff                 Rest of paged ROM area          */
	166	AM_RANGE(0x8000, 0xafff) AM_READWRITE(SMH_BANK(4)      , bbc_memorybp4_w      )   /*    8000-afff                 Paged ROM or 12K of RAM         */
	167	AM_RANGE(0xb000, 0xbfff) AM_READWRITE(SMH_BANK(6)      , SMH_ROM         )   /*    b000-bfff                 Rest of paged ROM area          */
168	168
169		AM_RANGE(0xc000, 0xfbff) AM_READWRITE(SMH_BANK7      , SMH_ROM         )   /*    c000-fbff                 OS ROM                          */
	169	AM_RANGE(0xc000, 0xfbff) AM_READWRITE(SMH_BANK(7)      , SMH_ROM         )   /*    c000-fbff                 OS ROM                          */
170	170
171	171	AM_RANGE(0xfc00, 0xfdff) AM_READ    (return8_FF                     )   /*    fc00-fdff                 FRED & JIM Pages                */
172	172
r4679	r4680
195	195	static ADDRESS_MAP_START(bbcbp128_mem, ADDRESS_SPACE_PROGRAM, 8)
196	196	ADDRESS_MAP_UNMAP_LOW
197	197
198		AM_RANGE(0x0000, 0x2fff) AM_READWRITE(SMH_BANK1      , bbc_memorybp1_w      )   /*    0000-2fff                 Regular Ram                     */
	198	AM_RANGE(0x0000, 0x2fff) AM_READWRITE(SMH_BANK(1)      , bbc_memorybp1_w      )   /*    0000-2fff                 Regular Ram                     */
199	199
200		AM_RANGE(0x3000, 0x7fff) AM_READWRITE(SMH_BANK2      , bbc_memorybp2_w      )   /*    3000-7fff                 Video/Shadow Ram                */
	200	AM_RANGE(0x3000, 0x7fff) AM_READWRITE(SMH_BANK(2)      , bbc_memorybp2_w      )   /*    3000-7fff                 Video/Shadow Ram                */
201	201
202		AM_RANGE(0x8000, 0xafff) AM_READWRITE(SMH_BANK4      , bbc_memorybp4_128_w   )   /*    8000-afff                 Paged ROM or 12K of RAM         */
203		AM_RANGE(0xb000, 0xbfff) AM_READWRITE(SMH_BANK6      , bbc_memorybp6_128_w   )   /*    b000-bfff                 Rest of paged ROM area          */
	202	AM_RANGE(0x8000, 0xafff) AM_READWRITE(SMH_BANK(4)      , bbc_memorybp4_128_w   )   /*    8000-afff                 Paged ROM or 12K of RAM         */
	203	AM_RANGE(0xb000, 0xbfff) AM_READWRITE(SMH_BANK(6)      , bbc_memorybp6_128_w   )   /*    b000-bfff                 Rest of paged ROM area          */
204	204
205		AM_RANGE(0xc000, 0xfbff) AM_READWRITE(SMH_BANK7      , SMH_ROM         )   /*    c000-fbff                 OS ROM                          */
	205	AM_RANGE(0xc000, 0xfbff) AM_READWRITE(SMH_BANK(7)      , SMH_ROM         )   /*    c000-fbff                 OS ROM                          */
206	206
207	207	AM_RANGE(0xfc00, 0xfdff) AM_READ    (return8_FF                     )   /*    fc00-fdff                 FRED & JIM Pages                */
208	208
r4679	r4680
255	255
256	256	static ADDRESS_MAP_START(bbcm_mem, ADDRESS_SPACE_PROGRAM, 8)
257	257
258		AM_RANGE(0x0000, 0x2fff) AM_READWRITE(SMH_BANK1      , bbc_memorybm1_w      )   /*    0000-2fff                 Regular Ram                     */
	258	AM_RANGE(0x0000, 0x2fff) AM_READWRITE(SMH_BANK(1)      , bbc_memorybm1_w      )   /*    0000-2fff                 Regular Ram                     */
259	259
260		AM_RANGE(0x3000, 0x7fff) AM_READWRITE(SMH_BANK2      , bbc_memorybm2_w      )   /*    3000-7fff                 Video/Shadow Ram                */
	260	AM_RANGE(0x3000, 0x7fff) AM_READWRITE(SMH_BANK(2)      , bbc_memorybm2_w      )   /*    3000-7fff                 Video/Shadow Ram                */
261	261
262		AM_RANGE(0x8000, 0x8fff) AM_READWRITE(SMH_BANK4      , bbc_memorybm4_w      )   /*    8000-8fff                 Paged ROM/RAM or 4K of RAM ANDY */
263		AM_RANGE(0x9000, 0xbfff) AM_READWRITE(SMH_BANK5      , bbc_memorybm5_w      )   /*    9000-bfff                 Rest of paged ROM/RAM area      */
	262	AM_RANGE(0x8000, 0x8fff) AM_READWRITE(SMH_BANK(4)      , bbc_memorybm4_w      )   /*    8000-8fff                 Paged ROM/RAM or 4K of RAM ANDY */
	263	AM_RANGE(0x9000, 0xbfff) AM_READWRITE(SMH_BANK(5)      , bbc_memorybm5_w      )   /*    9000-bfff                 Rest of paged ROM/RAM area      */
264	264
265		AM_RANGE(0xc000, 0xdfff) AM_READWRITE(SMH_BANK7      , bbc_memorybm7_w      )   /*    c000-dfff                 OS ROM or 8K of RAM       HAZEL */
	265	AM_RANGE(0xc000, 0xdfff) AM_READWRITE(SMH_BANK(7)      , bbc_memorybm7_w      )   /*    c000-dfff                 OS ROM or 8K of RAM       HAZEL */
266	266	AM_RANGE(0xe000, 0xfbff) AM_ROM AM_REGION("user1", 0x42000)            /*    e000-fbff                 OS ROM                          */
267	267
268		AM_RANGE(0xfc00, 0xfeff) AM_READWRITE(SMH_BANK8         , bbcm_w         )   /*    this is now processed directly because it can be ROM or hardware */
	268	AM_RANGE(0xfc00, 0xfeff) AM_READWRITE(SMH_BANK(8)         , bbcm_w         )   /*    this is now processed directly because it can be ROM or hardware */
269	269
270	270	//AM_RANGE(0xfc00, 0xfeff) AM_READWRITE(bbcm_r         , bbcm_w         )   /*    this is now processed directly because it can be ROM or hardware */
271	271	/*
272		AM_RANGE(0xfc00, 0xfdff) AM_READWRITE(SMH_BANK2        , SMH_ROM          )       fc00-fdff                   FRED & JIM Pages
	272	AM_RANGE(0xfc00, 0xfdff) AM_READWRITE(SMH_BANK(2)        , SMH_ROM          )       fc00-fdff                   FRED & JIM Pages
273	273
274	274	fe00-feff                 Shiela Address Page
275	275	AM_RANGE(0xfe00, 0xfe07) AM_READWRITE(BBC_6845_r        , BBC_6845_w        )         fe00-fe07  6845 CRTC      Video controller

src/mess/drivers/vtech2.c

r4679	r4680
73	73	#include "formats/vt_cas.h"
74	74
75	75	static ADDRESS_MAP_START(vtech2_mem, ADDRESS_SPACE_PROGRAM, 8 )
76		AM_RANGE(0x0000, 0x3fff) AM_READWRITE(SMH_BANK1, SMH_BANK1)
77		AM_RANGE(0x4000, 0x7fff) AM_READWRITE(SMH_BANK2, SMH_BANK2)
78		AM_RANGE(0x8000, 0xbfff) AM_READWRITE(SMH_BANK3, SMH_BANK3)
79		AM_RANGE(0xc000, 0xffff) AM_READWRITE(SMH_BANK4, SMH_BANK4)
	76	AM_RANGE(0x0000, 0x3fff) AM_READWRITE(SMH_BANK(1), SMH_BANK(1))
	77	AM_RANGE(0x4000, 0x7fff) AM_READWRITE(SMH_BANK(2), SMH_BANK(2))
	78	AM_RANGE(0x8000, 0xbfff) AM_READWRITE(SMH_BANK(3), SMH_BANK(3))
	79	AM_RANGE(0xc000, 0xffff) AM_READWRITE(SMH_BANK(4), SMH_BANK(4))
80	80	ADDRESS_MAP_END
81	81
82	82	static ADDRESS_MAP_START(vtech2_io, ADDRESS_SPACE_IO, 8)

src/mess/drivers/kc.c

r4679	r4680
118	118	ADDRESS_MAP_END
119	119
120	120	static ADDRESS_MAP_START(kc85_4_mem, ADDRESS_SPACE_PROGRAM, 8)
121		AM_RANGE(0x0000, 0x3fff) AM_READWRITE(SMH_BANK1, SMH_BANK7)
122		AM_RANGE(0x4000, 0x7fff) AM_READWRITE(SMH_BANK2, SMH_BANK8)
123		AM_RANGE(0x8000, 0xa7ff) AM_READWRITE(SMH_BANK3, SMH_BANK9)
	121	AM_RANGE(0x0000, 0x3fff) AM_READWRITE(SMH_BANK(1), SMH_BANK(7))
	122	AM_RANGE(0x4000, 0x7fff) AM_READWRITE(SMH_BANK(2), SMH_BANK(8))
	123	AM_RANGE(0x8000, 0xa7ff) AM_READWRITE(SMH_BANK(3), SMH_BANK(9))
124	124	//  AM_RANGE(0xa800, 0xbfff) AM_RAM
125		AM_RANGE(0xa800, 0xbfff) AM_READWRITE(SMH_BANK4, SMH_BANK10)
126		AM_RANGE(0xc000, 0xdfff) AM_READ(SMH_BANK5)
127		AM_RANGE(0xe000, 0xffff) AM_READ(SMH_BANK6)
	125	AM_RANGE(0xa800, 0xbfff) AM_READWRITE(SMH_BANK(4), SMH_BANK(10))
	126	AM_RANGE(0xc000, 0xdfff) AM_READ(SMH_BANK(5))
	127	AM_RANGE(0xe000, 0xffff) AM_READ(SMH_BANK(6))
128	128	ADDRESS_MAP_END
129	129
130	130	static ADDRESS_MAP_START(kc85_3_mem, ADDRESS_SPACE_PROGRAM, 8)
131		AM_RANGE(0x0000, 0x3fff) AM_READWRITE(SMH_BANK1, SMH_BANK6)
132		AM_RANGE(0x4000, 0x7fff) AM_READWRITE(SMH_BANK2, SMH_BANK7)
133		AM_RANGE(0x8000, 0xbfff) AM_READWRITE(SMH_BANK3, SMH_BANK8)
134		AM_RANGE(0xc000, 0xdfff) AM_READ(SMH_BANK4)
135		AM_RANGE(0xe000, 0xffff) AM_READ(SMH_BANK5)
	131	AM_RANGE(0x0000, 0x3fff) AM_READWRITE(SMH_BANK(1), SMH_BANK(6))
	132	AM_RANGE(0x4000, 0x7fff) AM_READWRITE(SMH_BANK(2), SMH_BANK(7))
	133	AM_RANGE(0x8000, 0xbfff) AM_READWRITE(SMH_BANK(3), SMH_BANK(8))
	134	AM_RANGE(0xc000, 0xdfff) AM_READ(SMH_BANK(4))
	135	AM_RANGE(0xe000, 0xffff) AM_READ(SMH_BANK(5))
136	136	ADDRESS_MAP_END
137	137
138	138	static READ8_HANDLER(kc85_3_port_r)

src/ldplayer/ldplayer.c

r4679	r4680
122	122	chderr = chd_open_file(mame_core_file(image_file), CHD_OPEN_READ, NULL, &image_chd);
123	123	if (chderr == CHDERR_NONE)
124	124	{
125		set_disk_handle("laserdisc", image_file, image_chd);
	125	set_disk_handle(device->machine, "laserdisc", image_file, image_chd);
126	126	filename = astring_dupc(dir->name);
127	127	add_exit_callback(device->machine, free_string);
128	128	break;

docs/messnew.txt

r4679	r4680
92	92
93	93	Source Changes:
94	94	----------------
	95	- The core is based on MAME 0.131u1.  This incorporates all features of the
	96	update to this core.  [MAME team]
	97
95	98	- Converted the WAVE sound device to stereo. [Curt Coder]
96	99
97	100

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