MESS SVN History

15994 Revisions

r4036 Wednesday 31st December, 2008 at 22:05:31 UTC by Barry Rodewald
[HD63450,RP5C15] Moved device structure out of header.

[src/mess/machine]

hd63450.c hd63450.h rp5c15.c rp5c15.h

src/mess/machine/rp5c15.c
r4035	r4036
69	69
70	70	#include "rp5c15.h"
71	71
	72	typedef struct _rp5c15_t rp5c15_t;
	73	struct _rp5c15_t
	74	{
	75	struct
	76	{
	77	unsigned char sec_1;
	78	unsigned char sec_10;
	79	unsigned char min_1;
	80	unsigned char min_10;
	81	unsigned char hour_1;
	82	unsigned char hour_10;
	83	unsigned char dayofweek;
	84	unsigned char day_1;
	85	unsigned char day_10;
	86	unsigned char month_1;
	87	unsigned char month_10;
	88	unsigned char year_1;
	89	unsigned char year_10;
	90	} systime;
	91	struct
	92	{
	93	unsigned char min_1;
	94	unsigned char min_10;
	95	unsigned char hour_1;
	96	unsigned char hour_10;
	97	unsigned char dayofweek;
	98	unsigned char day_1;
	99	unsigned char day_10;
	100	} alarm;
	101	int clkout;
	102	int adjust;
	103	int hour24; // 12/24 hour clock
	104	int leap; // Years until next leap year (0-3, 0 = this year is leap year)
	105	int mode;
	106	int test;
	107	int reset;
	108	int pulse_count;
	109	int pulse1_state;
	110	int pulse16_state;
	111	void (*timer_fired_func)(int state);
	112	void (*alarm_callback)(int state);
	113	const rp5c15_intf* intf;
	114	}; // Ricoh RP5C15
	115
72	116	static emu_timer* rtc_timer;
73	117
74	118	TIMER_CALLBACK(rtc_alarm_pulse)

src/mess/machine/rp5c15.h
r4035	r4036
13	13	void (*alarm_irq_callback)(int state);
14	14	};
15	15
16		typedef struct _rp5c15_t rp5c15_t;
17		struct _rp5c15_t
18		{
19		struct
20		{
21		unsigned char sec_1;
22		unsigned char sec_10;
23		unsigned char min_1;
24		unsigned char min_10;
25		unsigned char hour_1;
26		unsigned char hour_10;
27		unsigned char dayofweek;
28		unsigned char day_1;
29		unsigned char day_10;
30		unsigned char month_1;
31		unsigned char month_10;
32		unsigned char year_1;
33		unsigned char year_10;
34		} systime;
35		struct
36		{
37		unsigned char min_1;
38		unsigned char min_10;
39		unsigned char hour_1;
40		unsigned char hour_10;
41		unsigned char dayofweek;
42		unsigned char day_1;
43		unsigned char day_10;
44		} alarm;
45		int clkout;
46		int adjust;
47		int hour24; // 12/24 hour clock
48		int leap; // Years until next leap year (0-3, 0 = this year is leap year)
49		int mode;
50		int test;
51		int reset;
52		int pulse_count;
53		int pulse1_state;
54		int pulse16_state;
55		void (*timer_fired_func)(int state);
56		void (*alarm_callback)(int state);
57		const rp5c15_intf* intf;
58		}; // Ricoh RP5C15
59
60		DEVICE_START(rp5c15);
61	16	DEVICE_GET_INFO(rp5c15);
62	17
63	18	void rtc_add_second(const device_config*);

src/mess/machine/hd63450.c
r4035	r4036
6	6
7	7	#include "machine/hd63450.h"
8	8
	9	typedef struct _hd63450_regs hd63450_regs;
	10	struct _hd63450_regs
	11	{ // offsets in bytes
	12	unsigned char csr; // [00] Channel status register (R/W)
	13	unsigned char cer; // [01] Channel error register (R)
	14	unsigned char dcr; // [04] Device control register (R/W)
	15	unsigned char ocr; // [05] Operation control register (R/W)
	16	unsigned char scr; // [06] Sequence control register (R/W)
	17	unsigned char ccr; // [07] Channel control register (R/W)
	18	unsigned short mtc; // [0a,0b] Memory Transfer Counter (R/W)
	19	unsigned long mar; // [0c-0f] Memory Address Register (R/W)
	20	unsigned long dar; // [14-17] Device Address Register (R/W)
	21	unsigned short btc; // [1a,1b] Base Transfer Counter (R/W)
	22	unsigned long bar; // [1c-1f] Base Address Register (R/W)
	23	unsigned char niv; // [25] Normal Interrupt Vector (R/W)
	24	unsigned char eiv; // [27] Error Interrupt Vector (R/W)
	25	unsigned char mfc; // [29] Memory Function Code (R/W)
	26	unsigned char cpr; // [2d] Channel Priority Register (R/W)
	27	unsigned char dfc; // [31] Device Function Code (R/W)
	28	unsigned char bfc; // [39] Base Function Code (R/W)
	29	unsigned char gcr; // [3f] General Control Register (R/W)
	30	};
9	31
	32	typedef struct _hd63450_t hd63450_t;
	33	struct _hd63450_t
	34	{
	35	hd63450_regs reg[4];
	36	emu_timer* timer[4]; // for timing data reading/writing each channel
	37	attotime clock[4];
	38	attotime burst_clock[4];
	39	int in_progress[4]; // if a channel is in use
	40	int transfer_size[4];
	41	int halted[4]; // non-zero if a channel has been halted, and can be continued later.
	42	const hd63450_intf* intf;
	43	};
	44
10	45	static TIMER_CALLBACK(dma_transfer_timer);
11	46	static void dma_transfer_abort(const device_config* device, int channel);
12	47	static void dma_transfer_halt(const device_config* device, int channel);

src/mess/machine/hd63450.h
r4035	r4036
16	16	void (dma_write[4])(running_machine machine,int addr,int data);
17	17	};
18	18
19		typedef struct _hd63450_regs hd63450_regs;
20		struct _hd63450_regs
21		{ // offsets in bytes
22		unsigned char csr; // [00] Channel status register (R/W)
23		unsigned char cer; // [01] Channel error register (R)
24		unsigned char dcr; // [04] Device control register (R/W)
25		unsigned char ocr; // [05] Operation control register (R/W)
26		unsigned char scr; // [06] Sequence control register (R/W)
27		unsigned char ccr; // [07] Channel control register (R/W)
28		unsigned short mtc; // [0a,0b] Memory Transfer Counter (R/W)
29		unsigned long mar; // [0c-0f] Memory Address Register (R/W)
30		unsigned long dar; // [14-17] Device Address Register (R/W)
31		unsigned short btc; // [1a,1b] Base Transfer Counter (R/W)
32		unsigned long bar; // [1c-1f] Base Address Register (R/W)
33		unsigned char niv; // [25] Normal Interrupt Vector (R/W)
34		unsigned char eiv; // [27] Error Interrupt Vector (R/W)
35		unsigned char mfc; // [29] Memory Function Code (R/W)
36		unsigned char cpr; // [2d] Channel Priority Register (R/W)
37		unsigned char dfc; // [31] Device Function Code (R/W)
38		unsigned char bfc; // [39] Base Function Code (R/W)
39		unsigned char gcr; // [3f] General Control Register (R/W)
40		};
41
42		typedef struct _hd63450_t hd63450_t;
43		struct _hd63450_t
44		{
45		hd63450_regs reg[4];
46		emu_timer* timer[4]; // for timing data reading/writing each channel
47		attotime clock[4];
48		attotime burst_clock[4];
49		int in_progress[4]; // if a channel is in use
50		int transfer_size[4];
51		int halted[4]; // non-zero if a channel has been halted, and can be continued later.
52		const hd63450_intf* intf;
53		};
54
55		DEVICE_START( hd63450 );
56	19	DEVICE_GET_INFO( hd63450 );
57	20
58	21	int hd63450_read(const device_config* device, int offset, UINT16 mem_mask);

15994 Revisions