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r3129 Sunday 31st August, 2008 at 19:06:28 UTC by Curt Coder
[MCS48] Incorporated latest fixes from MAME.
[src/emu/cpu/mcs48]mcs48.c mcs48.h

src/emu/cpu/mcs48/mcs48.c
r3128r3129
195195
196196INLINE UINT8 opcode_fetch(offs_t address)
197197{
198   /* fix me - need to figure out how to bypass internal ROM in this case */
199   if (mcs48.ea && address < mcs48.int_rom_size)
200      return 0x00;
201198   return cpu_readop(address);
202199}
203200
r3128r3129
209206
210207INLINE UINT8 argument_fetch(offs_t address)
211208{
212   /* fix me - need to figure out how to bypass internal ROM in this case */
213   if (mcs48.ea && address < mcs48.int_rom_size)
214      return 0x00;
215209   return cpu_readop_arg(address);
216210}
217211
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705699static void mcs48_init(int index, int clock, const void *config, int (*irqcallback)(int), UINT16 romsize)
706700{
707701   memset(&mcs48, 0, sizeof(mcs48));
702   
703   /* External access line
704    * EA=1 : read from external rom
705    * EA=0 : read from internal rom
706    */
707   
708   /* FIXME: Current implementation suboptimal */
709   mcs48.ea = (romsize ? 0 : 1);
708710
709711   mcs48.irq_callback = irqcallback;
710712   mcs48.int_rom_size = romsize;
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733735
734736/*-------------------------------------------------
735737    i8035_init - initialization for systems with
736    1k of internal ROM and 64 bytes of internal
738    0k of internal ROM and 64 bytes of internal
737739    RAM
738740-------------------------------------------------*/
739741
740#if (HAS_I8035 || HAS_I8041 || HAS_I8048 || HAS_I8648 || HAS_I8748 || HAS_MB8884 || HAS_N7751)
742#if (HAS_I8035 || HAS_MB8884)
741743static void i8035_init(int index, int clock, const void *config, int (*irqcallback)(int))
742744{
745   mcs48_init(index, clock, config, irqcallback, 0x0);
746}
747#endif
748
749
750/*-------------------------------------------------
751    i8041_init - initialization for systems with
752    1k of internal ROM and 64 bytes of internal
753    RAM
754-------------------------------------------------*/
755
756#if (HAS_I8041 || HAS_I8048 || HAS_I8648 || HAS_I8748 || HAS_N7751)
757static void i8041_init(int index, int clock, const void *config, int (*irqcallback)(int))
758{
743759   mcs48_init(index, clock, config, irqcallback, 0x400);
744760}
745761#endif
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747763
748764/*-------------------------------------------------
749765    i8039_init - initialization for systems with
750    2k of internal ROM and 128 bytes of internal
766    0k of internal ROM and 128 bytes of internal
751767    RAM
752768-------------------------------------------------*/
753769
754#if (HAS_I8039 || HAS_I8049 || HAS_I8749 || HAS_M58715)
770#if (HAS_I8039)
755771static void i8039_init(int index, int clock, const void *config, int (*irqcallback)(int))
756772{
773   mcs48_init(index, clock, config, irqcallback, 0x0);
774}
775#endif
776
777
778/*-------------------------------------------------
779    i8049_init - initialization for systems with
780    2k of internal ROM and 128 bytes of internal
781    RAM
782-------------------------------------------------*/
783
784#if (HAS_I8049 || HAS_I8749 || HAS_M58715)
785static void i8049_init(int index, int clock, const void *config, int (*irqcallback)(int))
786{
757787   mcs48_init(index, clock, config, irqcallback, 0x800);
758788}
759789#endif
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772802   bus_w(0xff);
773803   mcs48.p1 = 0xff;
774804   mcs48.p2 = 0xff;
805   port_w(1, mcs48.p1);
806   port_w(2, mcs48.p2);
775807   mcs48.tirq_enabled = FALSE;
776808   mcs48.xirq_enabled = FALSE;
777809   mcs48.timecount_enabled = 0;
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844876   /* if the timer is enabled, accumulate prescaler cycles */
845877   if (mcs48.timecount_enabled & TIMER_ENABLED)
846878   {
879      UINT8 oldtimer = mcs48.timer;
847880      mcs48.prescaler += count;
848881      mcs48.timer += mcs48.prescaler >> 5;
849882      mcs48.prescaler &= 0x1f;
850      timerover = (mcs48.timer == 0);
883      timerover = (oldtimer != 0 && mcs48.timer == 0);
851884   }
852885
853886   /* if the counter is enabled, poll the T1 test input once for each cycle */
r3128r3129
920953    ADDRESS MAPS
921954***************************************************************************/
922955
956/* FIXME: the memory maps should probably support rom banking for EA */
923957static ADDRESS_MAP_START(program_10bit, ADDRESS_SPACE_PROGRAM, 8)
924   AM_RANGE(0x00, 0x3ff) AM_ROM
958   AM_RANGE(0x00, 0x3ff) AM_ROMBANK(MCS48_INTERNAL_ROMBANK)
925959ADDRESS_MAP_END
926960
927961static ADDRESS_MAP_START(program_11bit, ADDRESS_SPACE_PROGRAM, 8)
928   AM_RANGE(0x00, 0x7ff) AM_ROM
962   AM_RANGE(0x00, 0x7ff) AM_ROMBANK(MCS48_INTERNAL_ROMBANK)
929963ADDRESS_MAP_END
930964
931965static ADDRESS_MAP_START(data_6bit, ADDRESS_SPACE_DATA, 8)
r3128r3129
9811015   {
9821016      /* --- the following bits of info are set as 64-bit signed integers --- */
9831017      case CPUINFO_INT_INPUT_STATE + MCS48_INPUT_IRQ:   mcs48.irq_state = (info->i != CLEAR_LINE);   break;
984      case CPUINFO_INT_INPUT_STATE + MCS48_INPUT_EA:   mcs48.ea = info->i;                     break;
1018      case CPUINFO_INT_INPUT_STATE + MCS48_INPUT_EA:   mcs48.ea = (info->i != CLEAR_LINE);
1019                                          memory_set_bank(MCS48_INTERNAL_ROMBANK, mcs48.ea);
1020                                          break;
9851021
9861022      case CPUINFO_INT_PC:
9871023      case CPUINFO_INT_REGISTER + MCS48_PC:         PC = info->i;                        break;
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11391175      case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_DATA:          info->i = 6;                              break;
11401176      case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_PROGRAM:   info->internal_map8 = address_map_program_10bit;   break;
11411177      case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_DATA:       info->internal_map8 = address_map_data_6bit;      break;
1142      case CPUINFO_PTR_INIT:                                 info->init = i8035_init;                     break;
1178      case CPUINFO_PTR_INIT:                                 info->init = i8041_init;                     break;
11431179      case CPUINFO_STR_NAME:                                 strcpy(info->s, "I8041");                     break;
11441180      default:                                          mcs48_get_info(state, info);                  break;
11451181   }
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11551191      case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_DATA:          info->i = 6;                              break;
11561192      case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_PROGRAM:   info->internal_map8 = address_map_program_10bit;   break;
11571193      case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_DATA:       info->internal_map8 = address_map_data_6bit;      break;
1158      case CPUINFO_PTR_INIT:                                 info->init = i8035_init;                     break;
1194      case CPUINFO_PTR_INIT:                                 info->init = i8041_init;                     break;
11591195      case CPUINFO_STR_NAME:                                 strcpy(info->s, "I8048");                     break;
11601196      default:                                          mcs48_get_info(state, info);                  break;
11611197   }
r3128r3129
11711207      case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_DATA:          info->i = 6;                              break;
11721208      case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_PROGRAM:   info->internal_map8 = address_map_program_10bit;   break;
11731209      case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_DATA:       info->internal_map8 = address_map_data_6bit;      break;
1174      case CPUINFO_PTR_INIT:                                 info->init = i8035_init;                     break;
1210      case CPUINFO_PTR_INIT:                                 info->init = i8041_init;                     break;
11751211      case CPUINFO_STR_NAME:                                 strcpy(info->s, "I8648");                     break;
11761212      default:                                          mcs48_get_info(state, info);                  break;
11771213   }
r3128r3129
11871223      case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_DATA:          info->i = 6;                              break;
11881224      case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_PROGRAM:   info->internal_map8 = address_map_program_10bit;   break;
11891225      case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_DATA:       info->internal_map8 = address_map_data_6bit;      break;
1190      case CPUINFO_PTR_INIT:                                 info->init = i8035_init;                     break;
1226      case CPUINFO_PTR_INIT:                                 info->init = i8041_init;                     break;
11911227      case CPUINFO_STR_NAME:                                 strcpy(info->s, "I8748");                     break;
11921228      default:                                          mcs48_get_info(state, info);                  break;
11931229   }
r3128r3129
11991235{
12001236   switch (state)
12011237   {
1202      case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_PROGRAM:       info->i = 10;                              break;
1238      case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_PROGRAM:       info->i = 12;                              break;
12031239      case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_DATA:          info->i = 6;                              break;
1204      case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_PROGRAM:   info->internal_map8 = address_map_program_10bit;   break;
12051240      case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_DATA:       info->internal_map8 = address_map_data_6bit;      break;
12061241      case CPUINFO_PTR_INIT:                                 info->init = i8035_init;                     break;
12071242      case CPUINFO_STR_NAME:                                 strcpy(info->s, "MB8884");                     break;
r3128r3129
12191254      case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_DATA:          info->i = 6;                              break;
12201255      case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_PROGRAM:   info->internal_map8 = address_map_program_10bit;   break;
12211256      case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_DATA:       info->internal_map8 = address_map_data_6bit;      break;
1222      case CPUINFO_PTR_INIT:                                 info->init = i8035_init;                     break;
1257      case CPUINFO_PTR_INIT:                                 info->init = i8041_init;                     break;
12231258      case CPUINFO_STR_NAME:                                 strcpy(info->s, "N7751");                     break;
12241259      default:                                          mcs48_get_info(state, info);                  break;
12251260   }
r3128r3129
12521287      case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_DATA:          info->i = 7;                              break;
12531288      case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_PROGRAM:   info->internal_map8 = address_map_program_11bit;   break;
12541289      case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_DATA:       info->internal_map8 = address_map_data_7bit;      break;
1255      case CPUINFO_PTR_INIT:                                 info->init = i8039_init;                     break;
1290      case CPUINFO_PTR_INIT:                                 info->init = i8049_init;                     break;
12561291      case CPUINFO_STR_NAME:                                 strcpy(info->s, "I8049");                     break;
12571292      default:                                          mcs48_get_info(state, info);                  break;
12581293   }
r3128r3129
12681303      case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_DATA:          info->i = 7;                              break;
12691304      case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_PROGRAM:   info->internal_map8 = address_map_program_11bit;   break;
12701305      case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_DATA:       info->internal_map8 = address_map_data_7bit;      break;
1271      case CPUINFO_PTR_INIT:                                 info->init = i8039_init;                     break;
1306      case CPUINFO_PTR_INIT:                                 info->init = i8049_init;                     break;
12721307      case CPUINFO_STR_NAME:                                 strcpy(info->s, "I8749");                     break;
12731308      default:                                          mcs48_get_info(state, info);                  break;
12741309   }
r3128r3129
12821317   {
12831318      case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_PROGRAM:       info->i = 12;                              break;
12841319      case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_DATA:          info->i = 7;                              break;
1320      case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_PROGRAM:   info->internal_map8 = address_map_program_11bit;   break;
12851321      case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_DATA:       info->internal_map8 = address_map_data_7bit;      break;
1286      case CPUINFO_PTR_INIT:                                 info->init = i8039_init;                     break;
1322      case CPUINFO_PTR_INIT:                                 info->init = i8049_init;                     break;
12871323      case CPUINFO_STR_NAME:                                 strcpy(info->s, "M58715");                     break;
12881324      default:                                          mcs48_get_info(state, info);                  break;
12891325   }
src/emu/cpu/mcs48/mcs48.h
r3128r3129
1717
1818#include "cpuintrf.h"
1919
20/***************************************************************************
21    DEFINES
22***************************************************************************/
2023
24#define MCS48_INTERNAL_ROMBANK      (31)
25
2126/***************************************************************************
2227    CONSTANTS
2328***************************************************************************/

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