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r2863 Tuesday 17th June, 2008 at 17:11:26 UTC by Curt Coder
[BW2] Fixed RAMCARD.

[src/mess/drivers]

bw2.c

src/mess/drivers/bw2.c

r2862	r2863
22	22
23	23	TODO:
24	24
25		- fix floppy interface
	25	- fix floppy (the wd17xx code doesn't send any DRQ_SET events, so loading is impossible)
26	26
	27	1. CPU is set to HALT state
	28	2. FDC triggers DRQ, which triggers NMI to the CPU
	29	3. CPU reads byte from FDC in NMI handler
	30	4. FDC clears DRQ
	31
27	32	***************************************************************************/
28	33
29	34	#include "driver.h"
r2862	r2863
40	45	#include "bw2.lh"
41	46
42	47	#define SCREEN_TAG   "main"
	48	#define Z80_TAG      "ic1"
	49	#define PPI8255_TAG   "ic4"
	50	#define WD2797_TAG   "ic5"
	51	#define PIT8253_TAG   "ic6"
	52	#define MSM8251_TAG   "ic7"
43	53	#define MSM6255_TAG   "ic49"
44	54
	55	enum {
	56	BANK_RAM1 = 0,
	57	BANK_VRAM,
	58	BANK_RAM2, BANK_RAMCARD_ROM = BANK_RAM2,
	59	BANK_RAM3,
	60	BANK_RAM4,
	61	BANK_RAM5, BANK_RAMCARD_RAM = BANK_RAM5,
	62	BANK_RAM6,
	63	BANK_ROM
	64	};
	65
45	66	static UINT8 *ramcard_ram;
46		static int ramcard_bank;
47	67	static UINT8 keyboard_row;
	68	static UINT8 bank;
	69	static int selected_drive;
48	70
	71	static const device_config *get_floppy_image(int drive)
	72	{
	73	return image_from_devtype_and_index(IO_FLOPPY, drive);
	74	}
	75
	76	static int get_ramdisk_size(running_machine *machine)
	77	{
	78	return input_port_read(machine, "RAMCARD") * 256;
	79	}
	80
49	81	/* Memory */
50	82
51	83	static void bw2_set_banks(running_machine *machine, UINT8 data)
52	84	{
53	85	/*
54		Y0  /RAM1     Memory bank 1
55		Y1  /VRAM     Video memory
56		Y2  /RAM2     Memory bank 2
57		Y3  /RAM3     Memory bank 3
58		Y4  /RAM4     Memory bank 4
59		Y5  /RAM5     Memory bank 5
60		Y6  /RAM6     Memory bank 6
61		Y7  /ROM    ROM
	86
	87	Y0  /RAM1     Memory bank 1
	88	Y1  /VRAM     Video memory
	89	Y2  /RAM2     Memory bank 2
	90	Y3  /RAM3     Memory bank 3
	91	Y4  /RAM4     Memory bank 4
	92	Y5  /RAM5     Memory bank 5
	93	Y6  /RAM6     Memory bank 6
	94	Y7  /ROM    ROM
	95
62	96	*/
63	97
64		int bank = data & 0x07;
	98	int max_ram_bank = 0;
65	99
	100	bank = data & 0x07;
	101
	102	switch (mess_ram_size)
	103	{
	104	case 64 * 1024:
	105	max_ram_bank = BANK_RAM1;
	106	break;
	107
	108	case 96 * 1024:
	109	max_ram_bank = BANK_RAM2;
	110	break;
	111
	112	case 128 * 1024:
	113	max_ram_bank = BANK_RAM3;
	114	break;
	115
	116	case 160 * 1024:
	117	max_ram_bank = BANK_RAM4;
	118	break;
	119
	120	case 192 * 1024:
	121	max_ram_bank = BANK_RAM5;
	122	break;
	123
	124	case 224 * 1024:
	125	max_ram_bank = BANK_RAM6;
	126	break;
	127	}
	128
66	129	switch(bank)
67	130	{
68		case 0:
69		case 1:
70		memory_install_read8_handler(machine, 0, ADDRESS_SPACE_PROGRAM, 0x0000, 0x7fff, 0, 0, SMH_BANK1);
71		memory_install_write8_handler(machine, 0, ADDRESS_SPACE_PROGRAM, 0x0000, 0x7fff, 0, 0, SMH_BANK1);
	131	case BANK_RAM1:
	132	memory_install_readwrite8_handler(machine, 0, ADDRESS_SPACE_PROGRAM, 0x0000, 0x7fff, 0, 0, SMH_BANK1, SMH_BANK1);
72	133	break;
73	134
74		case 2:
75		case 3:
76		case 4:
77		case 5:
78		case 6:
79		if (mess_ram_size < ((bank + 1) * 32 * 1024))
	135	case BANK_VRAM:
	136	memory_install_readwrite8_handler(machine, 0, ADDRESS_SPACE_PROGRAM, 0x0000, 0x3fff, 0, 0x4000, SMH_BANK1, SMH_BANK1);
	137	break;
	138
	139	case BANK_RAM2:
	140	case BANK_RAM3:
	141	case BANK_RAM4:
	142	case BANK_RAM5:
	143	case BANK_RAM6:
	144	if (bank > max_ram_bank)
80	145	{
81		memory_install_read8_handler(machine, 0, ADDRESS_SPACE_PROGRAM, 0x0000, 0x7fff, 0, 0, SMH_UNMAP);
82		memory_install_write8_handler(machine, 0, ADDRESS_SPACE_PROGRAM, 0x0000, 0x7fff, 0, 0, SMH_UNMAP);
	146	memory_install_readwrite8_handler(machine, 0, ADDRESS_SPACE_PROGRAM, 0x0000, 0x7fff, 0, 0, SMH_UNMAP, SMH_UNMAP);
83	147	}
84	148	else
85	149	{
86		memory_install_read8_handler(machine, 0, ADDRESS_SPACE_PROGRAM, 0x0000, 0x7fff, 0, 0, SMH_BANK1);
87		memory_install_write8_handler(machine, 0, ADDRESS_SPACE_PROGRAM, 0x0000, 0x7fff, 0, 0, SMH_BANK1);
	150	memory_install_readwrite8_handler(machine, 0, ADDRESS_SPACE_PROGRAM, 0x0000, 0x7fff, 0, 0, SMH_BANK1, SMH_BANK1);
88	151	}
89	152	break;
90	153
91		case 7:
92		memory_install_read8_handler(machine, 0, ADDRESS_SPACE_PROGRAM, 0x0000, 0x7fff, 0, 0, SMH_BANK1);
93		memory_install_write8_handler(machine, 0, ADDRESS_SPACE_PROGRAM, 0x0000, 0x7fff, 0, 0, SMH_UNMAP);
	154	case BANK_ROM:
	155	memory_install_readwrite8_handler(machine, 0, ADDRESS_SPACE_PROGRAM, 0x0000, 0x7fff, 0, 0, SMH_BANK1, SMH_UNMAP);
94	156	break;
95	157	}
96	158
r2862	r2863
100	162	static void ramcard_set_banks(running_machine *machine, UINT8 data)
101	163	{
102	164	/*
103		Y0  /RAM1     Memory bank 1
104		Y1  /VRAM     Video memory
105		Y2  /RAM2     RAMCARD ROM
106		Y3  /RAM3     Memory bank 3
107		Y4  /RAM4     Memory bank 4
108		Y5  /RAM5     RAMCARD RAM
109		Y6  /RAM6     Memory bank 6
110		Y7  /ROM    ROM
	165
	166	Y0  /RAM1     Memory bank 1
	167	Y1  /VRAM     Video memory
	168	Y2  /RAM2     RAMCARD ROM
	169	Y3  /RAM3     Memory bank 3
	170	Y4  /RAM4     Memory bank 4
	171	Y5  /RAM5     RAMCARD RAM
	172	Y6  /RAM6     Memory bank 6
	173	Y7  /ROM    ROM
	174
111	175	*/
112	176
113		int bank = data & 0x07;
	177	int max_ram_bank = BANK_RAM1;
114	178
115		switch(bank)
	179	bank = data & 0x07;
	180
	181	switch (mess_ram_size)
116	182	{
117		case 0:
118		case 1:
119		case 5:
120		memory_install_read8_handler(machine, 0, ADDRESS_SPACE_PROGRAM, 0x0000, 0x7fff, 0, 0, SMH_BANK1);
121		memory_install_write8_handler(machine, 0, ADDRESS_SPACE_PROGRAM, 0x0000, 0x7fff, 0, 0, SMH_BANK1);
	183	case 64 * 1024:
	184	case 96 * 1024:
	185	max_ram_bank = BANK_RAM1;
122	186	break;
123	187
124		case 3:
125		case 4:
126		case 6:
127		if (mess_ram_size < ((bank + 1) * 32 * 1024))
	188	case 128 * 1024:
	189	max_ram_bank = BANK_RAM3;
	190	break;
	191
	192	case 160 * 1024:
	193	max_ram_bank = BANK_RAM4;
	194	break;
	195
	196	case 192 * 1024:
	197	case 224 * 1024:
	198	max_ram_bank = BANK_RAM6;
	199	break;
	200	}
	201
	202	switch (bank)
	203	{
	204	case BANK_RAM1:
	205	case BANK_RAMCARD_RAM:
	206	memory_install_readwrite8_handler(machine, 0, ADDRESS_SPACE_PROGRAM, 0x0000, 0x7fff, 0, 0, SMH_BANK1, SMH_BANK1);
	207	break;
	208
	209	case BANK_VRAM:
	210	memory_install_readwrite8_handler(machine, 0, ADDRESS_SPACE_PROGRAM, 0x0000, 0x3fff, 0, 0x4000, SMH_BANK1, SMH_BANK1);
	211	break;
	212
	213	case BANK_RAM3:
	214	case BANK_RAM4:
	215	case BANK_RAM6:
	216	if (bank > max_ram_bank)
128	217	{
129		memory_install_read8_handler(machine, 0, ADDRESS_SPACE_PROGRAM, 0x0000, 0x7fff, 0, 0, SMH_UNMAP);
130		memory_install_write8_handler(machine, 0, ADDRESS_SPACE_PROGRAM, 0x0000, 0x7fff, 0, 0, SMH_UNMAP);
	218	memory_install_readwrite8_handler(machine, 0, ADDRESS_SPACE_PROGRAM, 0x0000, 0x7fff, 0, 0, SMH_UNMAP, SMH_UNMAP);
131	219	}
132	220	else
133	221	{
134		memory_install_read8_handler(machine, 0, ADDRESS_SPACE_PROGRAM, 0x0000, 0x7fff, 0, 0, SMH_BANK1);
135		memory_install_write8_handler(machine, 0, ADDRESS_SPACE_PROGRAM, 0x0000, 0x7fff, 0, 0, SMH_BANK1);
	222	memory_install_readwrite8_handler(machine, 0, ADDRESS_SPACE_PROGRAM, 0x0000, 0x7fff, 0, 0, SMH_BANK1, SMH_BANK1);
136	223	}
137	224	break;
138	225
139		case 2:
140		case 7:
141		memory_install_read8_handler(machine, 0, ADDRESS_SPACE_PROGRAM, 0x0000, 0x7fff, 0, 0, SMH_BANK1);
142		memory_install_write8_handler(machine, 0, ADDRESS_SPACE_PROGRAM, 0x0000, 0x7fff, 0, 0, SMH_UNMAP);
	226	case BANK_RAMCARD_ROM:
	227	memory_install_readwrite8_handler(machine, 0, ADDRESS_SPACE_PROGRAM, 0x0000, 0x3fff, 0, 0x4000, SMH_BANK1, SMH_UNMAP);
143	228	break;
	229
	230	case BANK_ROM:
	231	memory_install_readwrite8_handler(machine, 0, ADDRESS_SPACE_PROGRAM, 0x0000, 0x7fff, 0, 0, SMH_BANK1, SMH_UNMAP);
	232	break;
144	233	}
145	234
146		if (bank == 5)
	235	memory_set_bank(1, bank);
	236	}
	237
	238	static WRITE8_HANDLER( ramcard_bank_w )
	239	{
	240	UINT8 ramcard_bank = data & 0x0f;
	241	UINT32 bank_offset = ramcard_bank * 0x8000;
	242
	243	if ((get_ramdisk_size(machine) == 256) && (ramcard_bank > 7))
147	244	{
148		memory_set_bank(1, ramcard_bank + 8);
	245	memory_install_readwrite8_handler(machine, 0, ADDRESS_SPACE_PROGRAM, 0x0000, 0x7fff, 0, 0, SMH_UNMAP, SMH_UNMAP);
149	246	}
150	247	else
151	248	{
152		memory_set_bank(1, bank);
	249	memory_install_readwrite8_handler(machine, 0, ADDRESS_SPACE_PROGRAM, 0x0000, 0x7fff, 0, 0, SMH_BANK1, SMH_BANK1);
153	250	}
154		}
155	251
156		static WRITE8_HANDLER( ramcard_bank_w )
157		{
158		ramcard_bank = data & 0x0f;
	252	memory_configure_bank(1, BANK_RAMCARD_RAM, 1, ramcard_ram + bank_offset, 0);
	253	memory_set_bank(1, bank);
159	254	}
160	255
161	256	/* Serial */
r2862	r2863
212	307	case WD17XX_IRQ_CLR:
213	308	cpunum_set_input_line(machine, 0, INPUT_LINE_IRQ0, CLEAR_LINE);
214	309	break;
	310
215	311	case WD17XX_IRQ_SET:
216		cpunum_set_input_line(machine, 0, INPUT_LINE_IRQ0, ASSERT_LINE);
	312	cpunum_set_input_line(machine, 0, INPUT_LINE_IRQ0, HOLD_LINE);
217	313	break;
	314
218	315	case WD17XX_DRQ_CLR:
219	316	cpunum_set_input_line(machine, 0, INPUT_LINE_NMI, CLEAR_LINE);
220	317	break;
	318
221	319	case WD17XX_DRQ_SET:
222		cpunum_set_input_line(machine, 0, INPUT_LINE_NMI, ASSERT_LINE);
	320	if (cpunum_get_reg(0, Z80_HALT))
	321	{
	322	cpunum_set_input_line(machine, 0, INPUT_LINE_NMI, HOLD_LINE);
	323	}
223	324	break;
224	325	}
225	326	}
r2862	r2863
287	388	static WRITE8_HANDLER( bw2_ppi8255_a_w )
288	389	{
289	390	/*
290		PA0     KB0 Keyboard line select 0
291		PA1     KB1 Keyboard line select 1
292		PA2     KB2 Keyboard line select 2
293		PA3     KB3 Keyboard line select 3
294		PA4     /DS0 Drive select 0
295		PA5     /DS1 Drive select 1
296		PA6     Select RS232 connector
297		PA7     /STROBE to centronics printer
	391
	392	PA0     KB0 Keyboard line select 0
	393	PA1     KB1 Keyboard line select 1
	394	PA2     KB2 Keyboard line select 2
	395	PA3     KB3 Keyboard line select 3
	396	PA4     /DS0 Drive select 0
	397	PA5     /DS1 Drive select 1
	398	PA6     Select RS232 connector
	399	PA7     /STROBE to centronics printer
	400
298	401	*/
299	402
300		switch (~data & 0x30 << 4)
	403	keyboard_row = data & 0x0f;
	404
	405	if (BIT(data, 4))
301	406	{
302		case 0:
303		wd17xx_set_drive(0);
304		break;
305		case 1:
306		wd17xx_set_drive(1);
307		break;
	407	selected_drive = 0;
	408	wd17xx_set_drive(selected_drive);
308	409	}
309	410
	411	if (BIT(data, 5))
	412	{
	413	selected_drive = 1;
	414	wd17xx_set_drive(selected_drive);
	415	}
	416
310	417	/* assumption: select is tied low */
311	418	centronics_write_handshake(0, CENTRONICS_SELECT | CENTRONICS_NO_RESET, CENTRONICS_SELECT | CENTRONICS_NO_RESET);
312		centronics_write_handshake(0, (data & 0x80) ? 0 : CENTRONICS_STROBE, CENTRONICS_STROBE);
313
314		keyboard_row = data & 0x0F;
	419	centronics_write_handshake(0, BIT(data, 7) ? 0 : CENTRONICS_STROBE, CENTRONICS_STROBE);
315	420	}
316	421
317	422	static READ8_HANDLER( bw2_ppi8255_b_r )
318	423	{
319	424	/*
320		PB0     Keyboard column status of selected line
321		PB1     Keyboard column status of selected line
322		PB2     Keyboard column status of selected line
323		PB3     Keyboard column status of selected line
324		PB4     Keyboard column status of selected line
325		PB5     Keyboard column status of selected line
326		PB6     Keyboard column status of selected line
327		PB7     Keyboard column status of selected line
	425
	426	PB0     Keyboard column status of selected line
	427	PB1     Keyboard column status of selected line
	428	PB2     Keyboard column status of selected line
	429	PB3     Keyboard column status of selected line
	430	PB4     Keyboard column status of selected line
	431	PB5     Keyboard column status of selected line
	432	PB6     Keyboard column status of selected line
	433	PB7     Keyboard column status of selected line
	434
328	435	*/
329	436
330	437	UINT8 row;
331	438	char port[5];
332	439
333	440	row = keyboard_row;
	441
334	442	if (row <= 9)
335	443	{
336	444	sprintf(port, "ROW%d", row);
r2862	r2863
343	451	static WRITE8_HANDLER( bw2_ppi8255_c_w )
344	452	{
345	453	/*
346		PC0     Memory bank select
347		PC1     Memory bank select
348		PC2     Memory bank select
349		PC3     Not connected
	454
	455	PC0     Memory bank select
	456	PC1     Memory bank select
	457	PC2     Memory bank select
	458	PC3     Not connected
	459
350	460	*/
351	461
352		if (input_port_read(machine, "RAMCARD") & 0x01)
	462	if (get_ramdisk_size(machine) > 0)
353	463	{
354	464	ramcard_set_banks(machine, data & 0x07);
355	465	}
r2862	r2863
362	472	static READ8_HANDLER( bw2_ppi8255_c_r )
363	473	{
364	474	/*
365		PC4     BUSY from centronics printer
366		PC5     M/FDBK motor feedback
367		PC6     RLSD Carrier detect from RS232
368		PC7     /PROT Write protected disk
	475
	476	PC4     BUSY from centronics printer
	477	PC5     M/FDBK motor feedback
	478	PC6     RLSD Carrier detect from RS232
	479	PC7     /PROT Write protected disk
	480
369	481	*/
370	482
371		UINT8 data;
	483	UINT8 data = 0;
372	484
373	485	/* assumption: select is tied low */
374	486	centronics_write_handshake(0, CENTRONICS_SELECT | CENTRONICS_NO_RESET, CENTRONICS_SELECT | CENTRONICS_NO_RESET);
375	487	data = ((centronics_read_handshake(0) & CENTRONICS_NOT_BUSY) == 0) ? 0x10 : 0;
376	488
377	489	data |= bw2_mfdbk << 5;
	490
	491	data |= floppy_drive_get_flag_state(get_floppy_image(selected_drive), FLOPPY_DRIVE_DISK_WRITE_PROTECTED) ? 0x80 : 0x00;
378	492
379	493	return data;
380	494	}
r2862	r2863
397	511	msm8251_receive_clock();
398	512	}
399	513
400
401	514	static PIT8253_OUTPUT_CHANGED( bw2_timer2_w )
402	515	{
403	516	bw2_mtron = state;
404	517	bw2_mfdbk = !state;
405
406		floppy_drive_set_motor_state(image_from_devtype_and_index(IO_FLOPPY, 0), !bw2_mtron);
407		floppy_drive_set_ready_state(image_from_devtype_and_index(IO_FLOPPY, 0), !bw2_mtron, 0);
	518
	519	floppy_drive_set_motor_state(get_floppy_image(0), !bw2_mtron);
	520	floppy_drive_set_motor_state(get_floppy_image(1), !bw2_mtron);
	521
	522	floppy_drive_set_ready_state(get_floppy_image(0), 1, 1);
	523	floppy_drive_set_ready_state(get_floppy_image(1), 1, 1);
408	524	}
409	525
410	526	static const struct pit8253_config bw2_pit8253_interface =
r2862	r2863
488	604
489	605	static MACHINE_RESET( bw2 )
490	606	{
491		if (input_port_read(machine, "RAMCARD") & 0x01)
	607	if (get_ramdisk_size(machine) > 0)
492	608	{
493	609	// RAMCARD installed
494	610
495		memory_configure_bank(1, 0, 1, mess_ram, 0);
496		memory_configure_bank(1, 1, 1, videoram, 0);
497		memory_configure_bank(1, 2, 1, memory_region(REGION_USER1), 0);
498		memory_configure_bank(1, 3, 4, mess_ram + 0x8000, 0x8000);
499		memory_configure_bank(1, 7, 1, memory_region(REGION_CPU1), 0);
500		memory_configure_bank(1, 8, 16, ramcard_ram, 0x8000);
	611	memory_configure_bank(1, BANK_RAM1, 1, mess_ram, 0);
	612	memory_configure_bank(1, BANK_VRAM, 1, videoram, 0);
	613	memory_configure_bank(1, BANK_RAMCARD_ROM, 1, memory_region(REGION_USER1), 0);
	614	memory_configure_bank(1, BANK_RAM3, 2, mess_ram + 0x8000, 0x8000);
	615	memory_configure_bank(1, BANK_RAMCARD_RAM, 1, ramcard_ram, 0);
	616	memory_configure_bank(1, BANK_RAM6, 1, mess_ram + 0x18000, 0);
	617	memory_configure_bank(1, BANK_ROM, 1, memory_region(REGION_CPU1), 0);
501	618
502	619	memory_install_write8_handler(machine, 0, ADDRESS_SPACE_IO, 0x30, 0x30, 0, 0x0f, &ramcard_bank_w);
503	620	}
r2862	r2863
505	622	{
506	623	// no RAMCARD
507	624
508		memory_configure_bank(1, 0, 1, mess_ram, 0);
509		memory_configure_bank(1, 1, 1, videoram, 0);
510		memory_configure_bank(1, 2, 5, mess_ram + 0x8000, 0x8000);
511		memory_configure_bank(1, 7, 1, memory_region(REGION_CPU1), 0);
	625	memory_configure_bank(1, BANK_RAM1, 1, mess_ram, 0);
	626	memory_configure_bank(1, BANK_VRAM, 1, videoram, 0);
	627	memory_configure_bank(1, BANK_RAM2, 5, mess_ram + 0x8000, 0x8000);
	628	memory_configure_bank(1, BANK_ROM, 1, memory_region(REGION_CPU1), 0);
	629
	630	memory_install_write8_handler(machine, 0, ADDRESS_SPACE_IO, 0x30, 0x30, 0, 0x0f, SMH_UNMAP);
512	631	}
513	632
514		memory_set_bank(1, 7);
	633	memory_set_bank(1, BANK_ROM);
515	634	}
516	635
517	636	static MACHINE_START( bw2 )
r2862	r2863
520	639
521	640	msm8251_init(&bw2_msm8251_interface);
522	641
523		wd17xx_init(machine, WD_TYPE_2793, bw2_wd17xx_callback, NULL);
	642	wd17xx_init(machine, WD_TYPE_179X, bw2_wd17xx_callback, NULL); // really WD2797
524	643	wd17xx_set_density(DEN_MFM_LO);
525	644	}
526	645
r2862	r2863
533	652	static ADDRESS_MAP_START( bw2_io, ADDRESS_SPACE_IO, 8 )
534	653	ADDRESS_MAP_UNMAP_HIGH
535	654	ADDRESS_MAP_GLOBAL_MASK(0xff)
536		AM_RANGE( 0x00, 0x03 ) AM_DEVREADWRITE( PPI8255, "ppi8255", ppi8255_r, ppi8255_w )
537		AM_RANGE( 0x10, 0x13 ) AM_DEVREADWRITE( PIT8253, "pit8253", pit8253_r, pit8253_w )
	655	AM_RANGE( 0x00, 0x03 ) AM_DEVREADWRITE( PPI8255, PPI8255_TAG, ppi8255_r, ppi8255_w )
	656	AM_RANGE( 0x10, 0x13 ) AM_DEVREADWRITE( PIT8253, PIT8253_TAG, pit8253_r, pit8253_w )
538	657	AM_RANGE( 0x20, 0x21 ) AM_DEVREADWRITE( MSM6255, MSM6255_TAG, msm6255_register_r, msm6255_register_w )
539	658	//   AM_RANGE( 0x30, 0x3f ) SLOT
540	659	AM_RANGE( 0x40, 0x40 ) AM_READWRITE( msm8251_data_r, msm8251_data_w )
r2862	r2863
681	800	PORT_CONFSETTING( 0x05, "300 baud" )
682	801
683	802	PORT_START_TAG("RAMCARD")
684		PORT_CONFNAME( 0x01, 0x00, "RAMCARD Installed")
685		PORT_CONFSETTING( 0x01, DEF_STR( Yes ) )
686		PORT_CONFSETTING( 0x00, DEF_STR( No ) )
	803	PORT_CONFNAME( 0x03, 0x00, "RAMCARD")
	804	PORT_CONFSETTING( 0x00, DEF_STR( None ) )
	805	PORT_CONFSETTING( 0x01, "256 KB" )
	806	PORT_CONFSETTING( 0x02, "512 KB" )
687	807	INPUT_PORTS_END
688	808
689	809	static MSM6255_CHAR_RAM_READ( bw2_charram_r )
r2862	r2863
701	821
702	822	static MACHINE_DRIVER_START( bw2 )
703	823	/* basic machine hardware */
704		MDRV_CPU_ADD_TAG( "main", Z80, XTAL_16MHz/4 )
	824	MDRV_CPU_ADD_TAG( Z80_TAG, Z80, XTAL_16MHz/4 )
705	825	MDRV_CPU_PROGRAM_MAP( bw2_mem, 0 )
706	826	MDRV_CPU_IO_MAP( bw2_io, 0 )
707	827
708	828	MDRV_MACHINE_START( bw2 )
709	829	MDRV_MACHINE_RESET( bw2 )
710	830
711		MDRV_DEVICE_ADD( "pit8253", PIT8253 )
	831	MDRV_DEVICE_ADD( PIT8253_TAG, PIT8253 )
712	832	MDRV_DEVICE_CONFIG( bw2_pit8253_interface )
713	833
714		MDRV_DEVICE_ADD( "ppi8255", PPI8255 )
	834	MDRV_DEVICE_ADD( PPI8255_TAG, PPI8255 )
715	835	MDRV_DEVICE_CONFIG( bw2_ppi8255_interface )
716	836
717	837	/* video hardware */
r2862	r2863
743	863	ROM_START( bw2 )
744	864	ROM_REGION(0x10000, REGION_CPU1, 0)
745	865	ROM_SYSTEM_BIOS(0, "20", "BW 2 v2.0")
746		ROMX_LOAD("bw2-20.bin", 0x0000, 0x1000, CRC(86f36471) SHA1(a3e2ba4edd50ff8424bb0675bdbb3b9f13c04c9d), ROM_BIOS(1))
	866	ROMX_LOAD("bw2-20.ic8", 0x0000, 0x1000, CRC(86f36471) SHA1(a3e2ba4edd50ff8424bb0675bdbb3b9f13c04c9d), ROM_BIOS(1))
747	867	ROM_SYSTEM_BIOS(1, "12", "BW 2 v1.2")
748		ROMX_LOAD("bw2-12.bin", 0x0000, 0x1000, CRC(0ab42d10) SHA1(430b232631eee9b715151b8d191b7eb9449ac513), ROM_BIOS(2))
	868	ROMX_LOAD("bw2-12.ic8", 0x0000, 0x1000, CRC(0ab42d10) SHA1(430b232631eee9b715151b8d191b7eb9449ac513), ROM_BIOS(2))
749	869
750	870	ROM_REGION(0x4000, REGION_USER1, 0)
751	871	ROM_LOAD("ramcard-10.bin", 0x0000, 0x4000, CRC(68cde1ba) SHA1(a776a27d64f7b857565594beb63aa2cd692dcf04))
r2862	r2863
817	937	}
818	938	}
819	939
820		static SYSTEM_CONFIG_START( bw2 )
	940	SYSTEM_CONFIG_START( bw2 )
821	941	CONFIG_DEVICE( bw2_floppy_getinfo )
822	942	CONFIG_DEVICE( bw2_serial_getinfo )
823	943	CONFIG_RAM_DEFAULT( 64 * 1024 )

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