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r2845 Thursday 12th June, 2008 at 23:55:42 UTC by Nathan Woods
Updated to MAME 0.125u5 core
[docs]messnew.txt
[src/emu]cheat.c cpuexec.h cpuintrf.c emuopts.c emuopts.h inptport.c rendersw.c video.h
[src/emu/cpu]cpu.mak drcbec.c drcbex64.c drcbex86.c drcfe.c drcfe.h drcuml.c drcuml.h drcumlsh.h
[src/emu/cpu/cop400]410ops.c 420ops.c cop400.h cop420.c
[src/emu/cpu/i8051]i8051.c
[src/emu/cpu/i8085]i8085.c i8085cpu.h
[src/emu/cpu/minx]minxops.h
[src/emu/cpu/mips]mips3.h mips3drc.c mips3fe.c mips3fe.h
[src/emu/cpu/powerpc]ppc.h ppccom.c ppccom.h ppcdrc.c ppcfe.c ppcfe.h
[src/emu/cpu/saturn]satops.c sattable.c
[src/emu/debug]debugcmd.c
[src/emu/drivers]xtal.h
[src/emu/machine]53c810.c 53c810.h 68681.c 68681.h pc16552d.c
[src/emu/sound]gaelco.h namco.h scsp.h sn76496.c tms5220.c
[src/emu/video]generic.c v9938.c
[src/mame]mame.mak mamedriv.c
[src/mame/audio]cchasm.c cyberbal.c galaxian.c
[src/mame/drivers]40love.c ajax.c aleck64.c ampoker2.c amspdwy.c angelkds.c arabian.c asteroid.c astrocorp.c asuka.c atarig1.c atarig42.c atarigt.c atarigx2.c atarisy1.c atarisy2.c backfire.c badlands.c bagman.c balsente.c baraduke.c batman.c bbusters.c beathead.c beezer.c bfcobra.c bfm_sc2.c bigevglf.c bigfghtr.c bionicc.c bishi.c bishjan.c bking.c blackt96.c bladestl.c blmbycar.c blockade.c blstroid.c bmcbowl.c bnstars.c boxer.c bsktball.c btime.c btoads.c bublbobl.c buggychl.c bwing.c bzone.c cabal.c calomega.c canyon.c capbowl.c carpolo.c cave.c cbuster.c ccastles.c centiped.c chaknpop.c cham24.c champbwl.c changela.c chqflag.c cidelsa.c cischeat.c citycon.c cliffhgr.c cloak.c cloud9.c cninja.c cojag.c combatsc.c coolpool.c copsnrob.c cosmic.c cps1.c cps3.c crgolf.c crshrace.c crystal.c cshooter.c csk.c cvs.c cyberbal.c dacholer.c dambustr.c darkseal.c dassault.c dblewing.c dcheese.c ddayjlc.c ddragon.c deadang.c deco156.c destroyr.c dgpix.c dietgo.c djboy.c djmain.c dominob.c dragrace.c dreamwld.c dribling.c dunhuang.c esd16.c expro02.c fastfred.c firebeat.c flstory.c funkybee.c gaelco2.c galaxian.c galaxold.c galdrvr.c gaplus.c gstriker.c gticlub.c guab.c hornet.c igs_180.c itgambl2.c itgambl3.c* itgamble.c jackal.c jcross.c kaneko16.c kinstb.c konamigq.c konamigv.c ksys573.c legionna.c lkage.c lsasquad.c m90.c mainsnk.c marvins.c matmania.c megadriv.h megaplay.c megasys1.c megatech.c mexico86.c mirage.c missb2.c model1.c model3.c msisaac.c multigam.c namcos1.c namcos10.c namcos11.c namcos12.c naomi.c neodrvr.c nitedrvr.c nss.c nwk-tr.c nycaptor.c opwolf.c peplus.c pgm.c pitnrun.c playch10.c polepos.c progolf.c punchout.c raiden2.c rainbow.c retofinv.c scobra.c segac2.c segahang.c segaorun.c segas16a.c segas16b.c segas18.c segaxbd.c segaybd.c seibuspi.c seta.c seta2.c simpsons.c skullxbo.c slapfght.c snookr10.c snowbros.c stfight.c stv.c stvinit.c subsino.c* suprnova.c system16.c taito_f2.c taito_x.c taitojc.c taitosj.c tecmosys.c thayers.c tmaster.c tnzs.c toaplan2.c tourtabl.c ultrsprt.c vball.c volfied.c vsnes.c wrally.c zn.c zr107.c
[src/mame/includes]ajax.h* arkanoid.h bagman.h* beezer.h* bigevglf.h* btime.h* bublbobl.h* buggychl.h* cchip.h* chaknpop.h* cloak.h dc.h deco16ic.h decoprot.h fastfred.h flstory.h* gaelco2.h* gaelcrpt.h galaxian.h galaxold.h gaplus.h* genesis.h gstriker.h irobot.h jackal.h* kaneko16.h legionna.h* lkage.h* lsasquad.h* matmania.h* megasys1.h mexico86.h* model1.h* model3.h* n64.h namcos1.h* namcos2.h nitedrvr.h nycaptor.h* pgm.h pitnrun.h* playch10.h* polepos.h psx.h raiden2.h* retofinv.h* segag80r.h seibuspi.h* seta.h simpsons.h* skullxbo.h slapfght.h* snes.h stfight.h* stv.h* system16.h taito_f2.h taitosj.h* tatsumi.h vsnes.h* wrally.h*
[src/mame/machine]ajax.c asteroid.c atari.c bagman.c balsente.c beezer.c bigevglf.c bonzeadv.c bsktball.c btime.c bublbobl.c buggychl.c carpolo.c chaknpop.c copsnrob.c daikaiju.c deco156.c flstory.c gaelco2.c gaelcrpt.c gaplus.c irobot.c jackal.c kaneko16.c lkage.c lsasquad.c maniach.c mexico86.c model1.c model3.c n64.c namcos1.c namcos2.c nycaptor.c opwolf.c pitnrun.c playch10.c psx.c r2crypt.c rainbow.c retofinv.c scramble.c scudsp.c seibuspi.c seicop.c seicop.h* simpsons.c slapfght.c spisprit.c stfight.c taitosj.c volfied.c vsnes.c wrally.c
[src/mame/video]aeroboto.c airbustr.c ajax.c ampoker2.c argus.c arkanoid.c atari.c atarig1.c atarig42.c atarigt.c atarigx2.c atarirle.c atarirle.h bagman.c beezer.c bigevglf.c bking.c blockade.c blockout.c boogwing.c btime.c bublbobl.c buggychl.c bwing.c calomega.c canyon.c cbuster.c centiped.c chaknpop.c cischeat.c citycon.c cninja.c combatsc.c darkseal.c dassault.c dc.c dcheese.c dec0.c deco16ic.c deco32.c deco_mlc.c dietgo.c djboy.c esd16.c fastfred.c flstory.c funkybee.c funkyjet.c gaelco2.c galaxian.c galaxold.c galpanic.c gameplan.c gaplus.c genesis.c gticlub.c gticlub.h harddriv.c irobot.c jackal.c jaguar.c jalblend.c kan_pand.c kan_pand.h kaneko16.c konamiic.c konamiic.h legionna.c leland.c lkage.c lsasquad.c m10.c m72.c m90.c mainsnk.c matmania.c mcr.c metro.c mexico86.c midzeus2.c model1.c model3.c mrdo.c ms32.c n64.c namcona1.c namcos1.c namcos2.c namcos21.c nbmj8891.c nbmj8991.c nbmj9195.c niyanpai.c nycaptor.c pastelg.c pitnrun.c pktgaldx.c playch10.c polepos.c ppu2c0x.c ppu2c0x.h psikyosh.c psx.c psychic5.c punchout.c realbrk.c retofinv.c rockola.c rohga.c segag80r.c segaic16.c segaic16.h segas18.c segas32.c segasyse.c seibuspi.c seta.c simpl156.c simpsons.c skullxbo.c slapfght.c slapshot.c snk.c snookr10.c stfight.c stvvdp1.c stvvdp2.c supbtime.c suprnova.c system16.c taito_f2.c taito_f3.c taito_h.c taitoair.c taitoic.h taitojc.c taitosj.c tatsumi.c tia.c tia.h toaplan2.c tumblep.c vaportra.c vball.c vdc.c vsnes.c wrally.c
[src/mess]mess.mak
[src/mess/drivers]a2600.c cpschngr.c dc.c psx.c
[src/mess/machine]bebox.c
[src/mess/video]nes.c

src/mame/audio/cchasm.c
r2844r2845
2121    switch (offset & 0x61 )
2222    {
2323    case 0x00:
24        coin = (input_port_read_indexed(machine, 3) >> 4) & 0x7;
24        coin = (input_port_read(machine, "IN3") >> 4) & 0x7;
2525        if (coin != 0x7) coin |= 0x8;
2626        return sound_flags | coin;
2727
r2844r2845
118118      sound_flags &= ~0x40;
119119      return soundlatch4_r (machine,offset) << 8;
120120   case 0x2:
121      return (sound_flags| (input_port_read_indexed(machine, 3) & 0x07) | 0x08) << 8;
121      return (sound_flags| (input_port_read(machine, "IN3") & 0x07) | 0x08) << 8;
122122   case 0x5:
123      return input_port_read_indexed(machine, 2) << 8;
123      return input_port_read(machine, "IN2") << 8;
124124   case 0x8:
125      return input_port_read_indexed(machine, 1) << 8;
125      return input_port_read(machine, "IN1") << 8;
126126   default:
127127      return 0xff << 8;
128128   }
r2844r2845
168168
169169static TIMER_CALLBACK( cchasm_sh_update )
170170{
171    if ((input_port_read_indexed(machine, 3) & 0x70) != 0x70)
171    if ((input_port_read(machine, "IN3") & 0x70) != 0x70)
172172        z80ctc_0_trg0_w (machine, 0, 1);
173173}
174174
src/mame/audio/cyberbal.c
r2844r2845
4040
4141READ8_HANDLER( cyberbal_special_port3_r )
4242{
43   int temp = input_port_read_indexed(machine, 3);
44   if (!(input_port_read_indexed(machine, 0) & 0x8000)) temp ^= 0x80;
43   int temp = input_port_read(machine, "JSAII");
44   if (!(input_port_read(machine, "IN0") & 0x8000)) temp ^= 0x80;
4545   if (atarigen_cpu_to_sound_ready) temp ^= 0x40;
4646   if (atarigen_sound_to_cpu_ready) temp ^= 0x20;
4747   return temp;
src/mame/audio/galaxian.c
r2844r2845
22#include "streams.h"
33#include "deprecat.h"
44#include "sound/samples.h"
5#include "includes/galaxold.h"
5#include "includes/galaxian.h"
66
77#define VERBOSE 0
88
src/mame/machine/nycaptor.c
r2844r2845
88***************************************************************************/
99
1010#include "driver.h"
11#include "includes/nycaptor.h"
1112
1213static UINT8 from_main,from_mcu;
1314static int mcu_sent = 0,main_sent = 0;
src/mame/machine/btime.c
r2844r2845
1
21#include "driver.h"
2#include "includes/btime.h"
33
44
55#define BASE  0xb000
src/mame/machine/rainbow.c
r2844r2845
4949
5050#include "driver.h"
5151#include "deprecat.h"
52#include "includes/cchip.h"
5253
5354static UINT8* CRAM[8];
5455
src/mame/machine/scudsp.c
r2844r2845
5353#include "deprecat.h"
5454#include "machine/scudsp.h"
5555#include "osd_cpu.h"
56#include "sound/scsp.h"
5657
5758/*DSP macros*/
5859#define PRF ((stv_scu[32] & 0x04000000) >> 26)
r2844r2845
104105      UINT32 internal_prg[0x100];
105106} dsp_reg;
106107
107extern UINT32* stv_scu;
108
109108static UINT32 opcode;
110109static UINT8 update_mul = 0;
111110
src/mame/machine/playch10.c
r2844r2845
22#include "deprecat.h"
33#include "video/ppu2c0x.h"
44#include "machine/rp5h01.h"
5#include "includes/playch10.h"
56
67/* Globals */
78int pc10_sdcs;         /* ShareD Chip Select */
r2844r2845
4950   RP5H01_enable_w( 0, 1 );
5051
5152   /* reset the ppu */
52   ppu2c0x_reset( 0, /* video_screen_get_scan_period(machine->primary_screen) * */ 1 );
53   ppu2c0x_reset( machine, 0, /* video_screen_get_scan_period(machine->primary_screen) * */ 1 );
5354
5455   ppu2c0x_set_mirroring( 0, mirroring );
5556}
r2844r2845
113114WRITE8_HANDLER( pc10_PPURES_w )
114115{
115116   if ( data & 1 )
116      ppu2c0x_reset( 0, /* video_screen_get_scan_period(machine->primary_screen) * */ 1 );
117      ppu2c0x_reset( machine, 0, /* video_screen_get_scan_period(machine->primary_screen) * */ 1 );
117118}
118119
119120READ8_HANDLER( pc10_detectclr_r )
src/mame/machine/bublbobl.c
r2844r2845
1010#include "driver.h"
1111#include "deprecat.h"
1212#include "cpu/z80/z80.h"
13#include "includes/bublbobl.h"
1314
1415
15
1616UINT8 *bublbobl_mcu_sharedram;
17extern int bublbobl_video_enable;
1817
1918
2019WRITE8_HANDLER( bublbobl_bankswitch_w )
r2844r2845
181180READ8_HANDLER( bublbobl_mcu_port1_r )
182181{
183182//logerror("%04x: 6801U4 port 1 read\n",activecpu_get_pc());
184   port1_in = input_port_read_indexed(machine, 0);
183   port1_in = input_port_read(machine, "IN0");
185184   return (port1_out & ddr1) | (port1_in & ~ddr1);
186185}
187186
r2844r2845
217216WRITE8_HANDLER( bublbobl_mcu_port2_w )
218217{
219218//logerror("%04x: 6801U4 port 2 write %02x\n",activecpu_get_pc(),data);
219   static const char *portnames[] = { "DSW0", "DSW1", "IN1", "IN2" };
220220
221221   // bits 0-3: bits 8-11 of shared RAM address
222222
r2844r2845
230230      {
231231         // read
232232         if ((address & 0x0800) == 0x0000)
233            port3_in = input_port_read_indexed(machine, (address & 3) + 1);
233            port3_in = input_port_read(machine, portnames[address & 3]);
234234         else if ((address & 0x0c00) == 0x0c00)
235235            port3_in = bublbobl_mcu_sharedram[address & 0x03ff];
236236//          logerror("reading %02x from shared RAM %04x\n",port3_in,address);
r2844r2845
430430WRITE8_HANDLER( bublbobl_68705_portB_w )
431431{
432432//logerror("%04x: 68705 port B write %02x\n",activecpu_get_pc(),data);
433   static const char *portnames[] = { "DSW0", "DSW1", "IN1", "IN2" };
433434
434435   if ((ddrB & 0x01) && (~data & 0x01) && (portB_out & 0x01))
435436   {
r2844r2845
451452         if ((address & 0x0800) == 0x0000)
452453         {
453454//logerror("%04x: 68705 read input port %02x\n",activecpu_get_pc(),address);
454            latch = input_port_read_indexed(machine, (address & 3) + 1);
455            latch = input_port_read(machine, portnames[address & 3]);
455456         }
456457         else if ((address & 0x0c00) == 0x0c00)
457458         {
src/mame/machine/atari.c
r2844r2845
843843   {
844844      size = image_fread(image, &mem[0x12000], 0x2000);
845845      a800_cart_is_16k = (size == 0x2000);
846      logerror("%s loaded right cartridge '%s' size 16K\n", Machine->gamedrv->name, image_filename(image) );
846      logerror("%s loaded right cartridge '%s' size 16K\n", image->machine->gamedrv->name, image_filename(image) );
847847   }
848848   else
849849   {
r2844r2845
851851      a800_cart_loaded = size > 0x0000;
852852      size = image_fread(image, &mem[0x12000], 0x2000);
853853      a800_cart_is_16k = size > 0x2000;
854      logerror("%s loaded left cartridge '%s' size %s\n", Machine->gamedrv->name, image_filename(image) , (a800_cart_is_16k) ? "16K":"8K");
854      logerror("%s loaded left cartridge '%s' size %s\n", image->machine->gamedrv->name, image_filename(image) , (a800_cart_is_16k) ? "16K":"8K");
855855   }
856856   return INIT_PASS;
857857}
r2844r2845
895895   file_error filerr;
896896   unsigned size;
897897
898   fname = astring_assemble_3(astring_alloc(), Machine->gamedrv->name, PATH_SEPARATOR, "basic.rom");
898   fname = astring_assemble_3(astring_alloc(), image->machine->gamedrv->name, PATH_SEPARATOR, "basic.rom");
899899   filerr = mame_fopen(SEARCHPATH_ROM, astring_c(fname), OPEN_FLAG_READ, &basic_fp);
900900   astring_free(fname);
901901
r2844r2845
904904      size = mame_fread(basic_fp, &mem[0x14000], 0x2000);
905905      if( size < 0x2000 )
906906      {
907         logerror("%s image '%s' load failed (less than 8K)\n", Machine->gamedrv->name, astring_c(fname));
907         logerror("%s image '%s' load failed (less than 8K)\n", image->machine->gamedrv->name, astring_c(fname));
908908         mame_fclose(basic_fp);
909909         return 2;
910910      }
r2844r2845
919919         size = image_fread(image, &mem[0x16000], 0x2000);
920920         a800_cart_is_16k = size / 0x2000;
921921         logerror("%s loaded cartridge '%s' size %s\n",
922               Machine->gamedrv->name, image_filename(image), (a800_cart_is_16k) ? "16K":"8K");
922               image->machine->gamedrv->name, image_filename(image), (a800_cart_is_16k) ? "16K":"8K");
923923      }
924924      mame_fclose(basic_fp);
925925   }
r2844r2845
967967      }
968968   }
969969   logerror("%s loaded cartridge '%s' size %dK\n",
970      Machine->gamedrv->name, image_filename(image) , size/1024);
970      image->machine->gamedrv->name, image_filename(image) , size/1024);
971971   return INIT_PASS;
972972}
973973
src/mame/machine/flstory.c
r2844r2845
88***************************************************************************/
99
1010#include "driver.h"
11#include "includes/flstory.h"
1112
12extern UINT8 *onna34ro_workram;
13extern UINT8 *victnine_workram;
14
1513static UINT8 from_main,from_mcu;
1614static int mcu_sent = 0,main_sent = 0;
1715
src/mame/machine/slapfght.c
r2844r2845
88***************************************************************************/
99
1010#include "driver.h"
11#include "includes/slapfght.h"
1112
1213
1314UINT8 *slapfight_dpram;
r2844r2845
1819static int getstar_sh_intenabled;
1920
2021static int slapfight_status_state;
21extern UINT8 *getstar_e803;
2222
2323static UINT8 mcu_val;
2424
src/mame/machine/asteroid.c
r2844r2845
122122   int res;
123123   int res1;
124124
125   res1 = input_port_read(machine, "DSW");
125   res1 = input_port_read(machine, "DSW1");
126126
127127   res = 0xfc | ((res1 >> (2 * (3 - (offset & 0x3)))) & 0x3);
128128   return res;
src/mame/machine/copsnrob.c
r2844r2845
2525    default:
2626    case 0x00:
2727        current_car_image = copsnrob_carimage[0];
28        keys = input_port_read_indexed(machine, 4);
28        keys = input_port_read(machine, "FAKE0");
2929        break;
3030    case 0x04:
3131        current_car_image = copsnrob_carimage[1];
32        keys = input_port_read_indexed(machine, 5);
32        keys = input_port_read(machine, "FAKE1");
3333        break;
3434    case 0x08:
3535        current_car_image = copsnrob_carimage[2];
36        keys = input_port_read_indexed(machine, 6);
36        keys = input_port_read(machine, "FAKE2");
3737        break;
3838    case 0x0c:
3939        current_car_image = copsnrob_carimage[3];
40        keys = input_port_read_indexed(machine, 7);
40        keys = input_port_read(machine, "FAKE3");
4141        break;
4242    }
4343
src/mame/machine/irobot.c
r2844r2845
100100   irobot_combase_mb = comRAM[(data >> 7) ^ 1];
101101   irobot_bufsel = data & 0x02;
102102   if (((data & 0x01) == 0x01) && (irobot_vg_clear == 0))
103      irobot_poly_clear();
103      irobot_poly_clear(machine);
104104
105105   irobot_vg_clear = data & 0x01;
106106
src/mame/machine/bonzeadv.c
r2844r2845
2222*************************************************************************/
2323
2424#include "driver.h"
25#include "includes/cchip.h"
2526
2627static int current_round = 0;
2728static int current_bank = 0;
src/mame/machine/daikaiju.c
r2844r2845
9999***************************************************************************/
100100#include "driver.h"
101101#include "cpu/z80/z80.h"
102#include "includes/lsasquad.h"
102103
103104#define ID_DAIKAIJU 0x5a
104105
r2844r2845
124125         daikaiju_cntr=0;
125126
126127
127extern int lsasquad_sound_pending;
128128static int daikaiju_xor, daikaiju_command, daikaiju_length, daikaiju_prev, daikaiju_cnt, daikaiju_cntr;
129129
130130static int daikaiju_buffer[256];
r2844r2845
338338
339339READ8_HANDLER( daikaiju_mcu_status_r )
340340{
341   int res = input_port_read_indexed(machine, 3);
341   int res = input_port_read(machine, "MCU?");
342342
343343   res^=mame_rand(machine)&3;
344344   res |=((lsasquad_sound_pending & 0x02)^2)<<3; //inverted flag
src/mame/machine/seibuspi.c
r2844r2845
11#include "driver.h"
2#include "includes/seibuspi.h"
23
34
45
src/mame/machine/scramble.c
r2844r2845
1212#include "machine/8255ppi.h"
1313#include "includes/galaxold.h"
1414
15static UINT8 moonwar_port_select;
16
1715static UINT8 cavelon_bank;
1816
1917static UINT8 security_2B_counter;
r2844r2845
3735   sfx_sh_init();
3836}
3937
40int monsterz_count = 0;
38static int monsterz_count = 0;
4139MACHINE_RESET( monsterz )
4240{
4341/*
r2844r2845
7674}
7775
7876
79static WRITE8_HANDLER( moonwar_port_select_w )
80{
81   moonwar_port_select = data & 0x10;
82}
83
84static READ8_HANDLER( moonwar_input_port_0_r )
85{
86   UINT8 sign;
87   UINT8 delta;
88
89   delta = (moonwar_port_select ? input_port_read_indexed(machine, 3) : input_port_read_indexed(machine, 4));
90
91   sign = (delta & 0x80) >> 3;
92   delta &= 0x0f;
93
94   return ((input_port_read_indexed(machine, 0) & 0xe0) | delta | sign );
95}
96
97
9877/* the coinage DIPs are spread accross two input ports */
9978static READ8_HANDLER( stratgyx_input_port_2_r )
10079{
r2844r2845
265244};
266245
267246
268const ppi8255_interface moonwar_ppi8255_intf[2] =
269{
270   {
271      moonwar_input_port_0_r,      /* Port A read */
272      input_port_1_r,            /* Port B read */
273      input_port_2_r,            /* Port C read */
274      NULL,                  /* Port A write */
275      NULL,                  /* Port B write */
276      moonwar_port_select_w       /* Port C write */
277   },
278   {
279      NULL,                  /* Port A read */
280      NULL,                  /* Port B read */
281      NULL,                  /* Port C read */
282      soundlatch_w,            /* Port A write */
283      scramble_sh_irqtrigger_w,   /* Port B write */
284      NULL                  /* Port C write */
285   }
286};
287
288
289247const ppi8255_interface darkplnt_ppi8255_intf[2] =
290248{
291249   {
r2844r2845
525483   state_save_register_global(cavelon_bank);
526484}
527485
528DRIVER_INIT( moonwar )
529{
530   state_save_register_global(moonwar_port_select);
531}
532486
487
533488DRIVER_INIT( darkplnt )
534489{
535490   memory_install_write8_handler(machine, 0, ADDRESS_SPACE_PROGRAM, 0xb00a, 0xb00a, 0, 0, darkplnt_bullet_color_w);
r2844r2845
736691      free(scratch);
737692}
738693
739DRIVER_INIT( superbon )
740{
741   offs_t i;
742   UINT8 *RAM;
743694
744
745   DRIVER_INIT_CALL(scramble);
746
747   /* Deryption worked out by hand by Chris Hardy. */
748
749   RAM = memory_region(REGION_CPU1);
750
751   for (i = 0;i < 0x1000;i++)
752   {
753      /* Code is encrypted depending on bit 7 and 9 of the address */
754      switch (i & 0x0280)
755      {
756      case 0x0000:
757         RAM[i] ^= 0x92;
758         break;
759      case 0x0080:
760         RAM[i] ^= 0x82;
761         break;
762      case 0x0200:
763         RAM[i] ^= 0x12;
764         break;
765      case 0x0280:
766         RAM[i] ^= 0x10;
767         break;
768      }
769   }
770}
771
772
773695DRIVER_INIT( hustler )
774696{
775697   offs_t A;
src/mame/machine/gaplus.c
r2844r2845
1010#include "driver.h"
1111#include "machine/namcoio.h"
1212#include "sound/samples.h"
13#include "includes/gaplus.h"
1314
1415UINT8 *gaplus_customio_3;
1516
src/mame/machine/pitnrun.c
r2844r2845
99
1010#include "driver.h"
1111#include "cpu/m6805/m6805.h"
12#include "includes/pitnrun.h"
1213
1314
1415static UINT8 fromz80,toz80;
src/mame/machine/carpolo.c
r2844r2845
241241
242242
243243   /* check the coins here as well - they drive the clock of the flip-flops */
244   port_value = input_port_read_indexed(machine, 0);
244   port_value = input_port_read(machine, "IN0");
245245
246246   TTL7474_clock_w(TTL7474_2S_1, port_value & 0x01);
247247   TTL7474_clock_w(TTL7474_2S_2, port_value & 0x02);
r2844r2845
259259   {
260260      int movement_flip_flop = TTL7474_1F_1 + (2 * player);
261261      int dir_flip_flop      = movement_flip_flop + 1;
262      static const char *portnames[] = { "DIAL0", "DIAL1", "DIAL2", "DIAL3" };
262263
264      port_value = input_port_read(machine, portnames[player]);
263265
264      port_value = input_port_read_indexed(machine, 2 + player);
265
266266      if (port_value != last_wheel_value[player])
267267      {
268268         /* set the movement direction */
r2844r2845
282282
283283
284284   /* finally read the accelerator pedals */
285   port_value = input_port_read_indexed(machine, 6);
285   port_value = input_port_read(machine, "PEDALS");
286286
287287   for (player = 0; player < 4; player++)
288288   {
r2844r2845
446446        (TTL7474_output_r(TTL7474_1C_2) ? 0x02 : 0x00) |
447447        (TTL7474_output_r(TTL7474_1D_2) ? 0x04 : 0x00) |
448448        (TTL7474_output_r(TTL7474_1F_2) ? 0x08 : 0x00) |
449        (input_port_read_indexed(machine, 7) & 0xf0);
449        (input_port_read(machine, "IN2") & 0xf0);
450450
451451   return ret;
452452}
src/mame/machine/namcos1.c
r2844r2845
11#include "driver.h"
22#include "sound/ym2151.h"
33#include "sound/namco.h"
4#include "includes/namcos1.h"
45
56#define NAMCOS1_MAX_BANK 0x400
67
7/* from drivers */
8void namcos1_init_DACs(void);
9
10/* from video */
11READ8_HANDLER( namcos1_videoram_r );
12WRITE8_HANDLER( namcos1_videoram_w );
13WRITE8_HANDLER( namcos1_paletteram_w );
14READ8_HANDLER( namcos1_spriteram_r );
15WRITE8_HANDLER( namcos1_spriteram_w );
16extern void namcos1_set_scroll_offsets( const int *bgx, const int *bgy, int negative, int optimize );
17extern void namcos1_set_sprite_offsets( int x, int y );
18
198UINT8 *namcos1_paletteram;
209
2110static UINT8 *namcos1_triram;
src/mame/machine/buggychl.c
r2844r2845
11#include "driver.h"
22#include "cpu/z80/z80.h"
3#include "includes/buggychl.h"
34
45
56static UINT8 from_main,from_mcu;
src/mame/machine/deco156.c
r2844r2845
3131*/
3232
3333#include "driver.h"
34#include "includes/decocrpt.h"
3435
3536
3637static void decrypt(UINT32 *src, UINT32 *dst, int length)
src/mame/machine/n64.c
r2844r2845
2727static UINT32 mi_interrupt = 0;
2828static UINT32 mi_intr_mask = 0;
2929
30extern int fb_width;
31
3230void signal_rcp_interrupt(int interrupt)
3331{
3432   if (mi_intr_mask & interrupt)
r2844r2845
11741172      {
11751173         UINT16 buttons = 0;
11761174         INT8 x = 0, y = 0;
1175         /* add here tags for P2, P3 and P4 when implemented */
1176         static const char *portnames[] = { "P1", "P1_ANALOG_X", "P1_ANALOG_Y" };
1177
11771178         if (slength != 1 || rlength != 4)
11781179         {
11791180            fatalerror("handle_pif: read button values (bytes to send %d, bytes to receive %d)\n", slength, rlength);
r2844r2845
11831184         {
11841185            case 0:
11851186            {
1186                    buttons = input_port_read_indexed(machine, (channel*3) + 0);
1187                    x = input_port_read_indexed(machine, (channel*3) + 1) - 128;
1188                    y = input_port_read_indexed(machine, (channel*3) + 2) - 128;
1187                    buttons = input_port_read(machine, portnames[(channel*3) + 0]);
1188                    x = input_port_read(machine, portnames[(channel*3) + 1]) - 128;
1189                    y = input_port_read(machine, portnames[(channel*3) + 2]) - 128;
11891190
11901191               rdata[0] = (buttons >> 8) & 0xff;
11911192               rdata[1] = (buttons >> 0) & 0xff;
src/mame/machine/stfight.c
r2844r2845
1010#include "driver.h"
1111#include "cpu/z80/z80.h"
1212#include "sound/msm5205.h"
13#include "includes/stfight.h"
1314
1415// this prototype will move to the driver
1516static WRITE8_HANDLER( stfight_bank_w );
src/mame/machine/model3.c
r2844r2845
66
77#include "driver.h"
88#include "deprecat.h"
9#include "includes/model3.h"
910
1011static int m3_step;
1112
src/mame/machine/volfied.c
r2844r2845
1515*************************************************************************/
1616
1717#include "driver.h"
18#include "includes/cchip.h"
1819
1920static UINT8 current_bank = 0;
2021static UINT8 current_flag = 0;
src/mame/machine/balsente.c
r2844r2845
133133      /* we latch the beam values on the first interrupt after VBLANK */
134134      if (param == 64 && balsente_shooter)
135135      {
136         balsente_shooter_x = input_port_read_indexed(machine, 8);
137         balsente_shooter_y = input_port_read_indexed(machine, 9);
136         balsente_shooter_x = input_port_read(machine, "FAKEX");
137         balsente_shooter_y = input_port_read(machine, "FAKEY");
138138      }
139139
140140      /* which bits get returned depends on which scanline we're at */
r2844r2845
605605INTERRUPT_GEN( balsente_update_analog_inputs )
606606{
607607   int i;
608   static const char *analog[] = { "AN0", "AN1", "AN2", "AN3" };
608609
609610   /* the analog input system helpfully scales the value read by the percentage of time */
610611   /* into the current frame we are; unfortunately, this is bad for us, since the analog */
611612   /* ports are read once a frame, just at varying intervals. To get around this, we */
612613   /* read all the analog inputs at VBLANK time and just return the cached values. */
613614   for (i = 0; i < 4; i++)
614      analog_input_data[i] = input_port_read_indexed(machine, 4 + i);
615      analog_input_data[i] = input_port_read(machine, analog[i]);
615616}
616617
617618
r2844r2845
11221123
11231124READ8_HANDLER( nstocker_port2_r )
11241125{
1125   return (input_port_read_indexed(machine, 2) & 0xf0) | nstocker_bits;
1126   return (input_port_read(machine, "IN0") & 0xf0) | nstocker_bits;
11261127}
11271128
11281129
r2844r2845
11671168   INT8 diff[3];
11681169
11691170   /* read the current steering values */
1170   wheel[0] = input_port_read_indexed(machine, 4);
1171   wheel[1] = input_port_read_indexed(machine, 5);
1172   wheel[2] = input_port_read_indexed(machine, 6);
1171   wheel[0] = input_port_read(machine, "AN0");
1172   wheel[1] = input_port_read(machine, "AN1");
1173   wheel[2] = input_port_read(machine, "AN2");
11731174
11741175   /* diff the values */
11751176   diff[0] = wheel[0] - grudge_last_steering[0];
src/mame/machine/vsnes.c
r2844r2845
1010#include "driver.h"
1111#include "deprecat.h"
1212#include "video/ppu2c0x.h"
13#include "includes/vsnes.h"
1314
1415/* Globals */
1516static int vsnes_gun_controller;
r2844r2845
223224   input_latch[2] = input_latch[3] = 0;
224225
225226   /* reset the ppu */
226   ppu2c0x_reset( 0, 1 );
227   ppu2c0x_reset( machine, 0, 1 );
227228
228229   /* if we need to remap, install the callback */
229230   if ( remapped_colortable )
r2844r2845
241242   input_latch[2] = input_latch[3] = 0;
242243
243244   /* reset the ppu */
244   ppu2c0x_reset( 0,1);
245   ppu2c0x_reset( 1,1 );
245   ppu2c0x_reset( machine,0,1 );
246   ppu2c0x_reset( machine,1,1 );
246247
247248   /* if we need to remap, install the callback */
248249   if ( remapped_colortable )
src/mame/machine/mexico86.c
r2844r2845
11#include "driver.h"
22#include "deprecat.h"
3#include "includes/mexico86.h"
34
45
56UINT8 *mexico86_protection_ram;
src/mame/machine/chaknpop.c
r2844r2845
55
66#include "driver.h"
77#include "cpu/z80/z80.h"
8#include "includes/chaknpop.h"
89
910#define MCU_INITIAL_SEED   0x81
1011
src/mame/machine/taitosj.c
r2844r2845
99
1010#include "driver.h"
1111#include "cpu/m6805/m6805.h"
12#include "includes/taitosj.h"
1213
1314
1415#define VERBOSE   1
r2844r2845
2425static UINT32 address;
2526
2627void taitosj_register_main_savestate(void);
27WRITE8_HANDLER( taitosj_bankswitch_w );
2828
2929MACHINE_START( taitosj )
3030{
src/mame/machine/lkage.c
r2844r2845
88***************************************************************************/
99
1010#include "driver.h"
11#include "includes/lkage.h"
1112
1213
1314static UINT8 from_main,from_mcu;
src/mame/machine/namcos2.c
r2844r2845
1010***************************************************************************/
1111
1212#include "driver.h"
13#include "deprecat.h"
1413#include "cpu/m6809/m6809.h"
1514#include "cpu/m6805/m6805.h"
1615#include "namcos2.h"
r2844r2845
7372static UINT8 *namcos2_eeprom;
7473
7574static void
76ResetAllSubCPUs( int state )
75ResetAllSubCPUs( running_machine *machine, int state )
7776{
78   cpunum_set_input_line(Machine, CPU_SLAVE, INPUT_LINE_RESET, state);
79   cpunum_set_input_line(Machine, CPU_MCU, INPUT_LINE_RESET, state);
77   cpunum_set_input_line(machine, CPU_SLAVE, INPUT_LINE_RESET, state);
78   cpunum_set_input_line(machine, CPU_MCU, INPUT_LINE_RESET, state);
8079   switch( namcos2_gametype )
8180   {
8281   case NAMCOS21_SOLVALOU:
8382   case NAMCOS21_STARBLADE:
8483   case NAMCOS21_AIRCOMBAT:
8584   case NAMCOS21_CYBERSLED:
86      cpunum_set_input_line(Machine, 4,INPUT_LINE_RESET,state); /* MASTER DSP */
87      cpunum_set_input_line(Machine, 5,INPUT_LINE_RESET,state); /* SLAVE DSP */
85      cpunum_set_input_line(machine, 4,INPUT_LINE_RESET,state); /* MASTER DSP */
86      cpunum_set_input_line(machine, 5,INPUT_LINE_RESET,state); /* SLAVE DSP */
8887      break;
8988
9089//  case NAMCOS21_WINRUN91:
r2844r2845
110109   cpunum_set_input_line(machine, CPU_SOUND, INPUT_LINE_RESET, ASSERT_LINE );
111110
112111   /* Place CPU2 & CPU3 into the reset condition */
113   ResetAllSubCPUs( ASSERT_LINE );
112   ResetAllSubCPUs( machine, ASSERT_LINE );
114113
115114   /* Initialise interrupt handlers */
116115   for(loop=0;loop<0x20;loop++)
r2844r2845
465464}
466465
467466static UINT16
468ReadWriteC148( int cpu, offs_t offset, UINT16 data, int bWrite )
467ReadWriteC148( running_machine *machine, int cpu, offs_t offset, UINT16 data, int bWrite )
469468{
470469   offs_t addr = ((offset*2)+0x1c0000)&0x1fe000;
471470   UINT16 *pC148Reg = NULL;
r2844r2845
513512   case 0x1d0000:
514513      if( bWrite )
515514      {
516         cpunum_set_input_line(Machine, altCPU, pC148RegAlt[NAMCOS2_C148_CPUIRQ], ASSERT_LINE);
517      }      cpunum_set_input_line(Machine, cpu, pC148Reg[NAMCOS2_C148_0], CLEAR_LINE);
515         cpunum_set_input_line(machine, altCPU, pC148RegAlt[NAMCOS2_C148_CPUIRQ], ASSERT_LINE);
516      }      cpunum_set_input_line(machine, cpu, pC148Reg[NAMCOS2_C148_0], CLEAR_LINE);
518517      break;
519518
520519   case 0x1d2000:
521      cpunum_set_input_line(Machine, cpu, pC148Reg[NAMCOS2_C148_1], CLEAR_LINE);
520      cpunum_set_input_line(machine, cpu, pC148Reg[NAMCOS2_C148_1], CLEAR_LINE);
522521      break;
523522
524523   case 0x1d4000:
525524      if( bWrite )
526525      {
527         cpunum_set_input_line(Machine, altCPU, pC148RegAlt[NAMCOS2_C148_CPUIRQ], ASSERT_LINE);
526         cpunum_set_input_line(machine, altCPU, pC148RegAlt[NAMCOS2_C148_CPUIRQ], ASSERT_LINE);
528527      }
529      cpunum_set_input_line(Machine, cpu, pC148Reg[NAMCOS2_C148_2], CLEAR_LINE);
528      cpunum_set_input_line(machine, cpu, pC148Reg[NAMCOS2_C148_2], CLEAR_LINE);
530529      break;
531530
532531   case 0x1d6000:
r2844r2845
534533      {
535534      //  mame_printf_debug( "cpu(%d) RAM[0x%06x] = 0x%x\n", cpu, addr, data );
536535      }
537      cpunum_set_input_line(Machine, cpu, pC148Reg[NAMCOS2_C148_CPUIRQ], CLEAR_LINE);
536      cpunum_set_input_line(machine, cpu, pC148Reg[NAMCOS2_C148_CPUIRQ], CLEAR_LINE);
538537      break;
539538
540539   case 0x1d8000: /* ack EXIRQ */
r2844r2845
542541      {
543542      //  mame_printf_debug( "cpu(%d) RAM[0x%06x] = 0x%x\n", cpu, addr, data );
544543      }
545      cpunum_set_input_line(Machine, cpu, pC148Reg[NAMCOS2_C148_EXIRQ], CLEAR_LINE);
544      cpunum_set_input_line(machine, cpu, pC148Reg[NAMCOS2_C148_EXIRQ], CLEAR_LINE);
546545      break;
547546
548547   case 0x1da000: /* ack POSIRQ */
r2844r2845
550549      {
551550      //  mame_printf_debug( "cpu(%d) RAM[0x%06x] = 0x%x\n", cpu, addr, data );
552551      }
553      cpunum_set_input_line(Machine, cpu, pC148Reg[NAMCOS2_C148_POSIRQ], CLEAR_LINE);
552      cpunum_set_input_line(machine, cpu, pC148Reg[NAMCOS2_C148_POSIRQ], CLEAR_LINE);
554553      break;
555554
556555   case 0x1dc000: /* ack SCIRQ */
r2844r2845
558557      {
559558      //  mame_printf_debug( "cpu(%d) RAM[0x%06x] = 0x%x\n", cpu, addr, data );
560559      }
561      cpunum_set_input_line(Machine, cpu, pC148Reg[NAMCOS2_C148_SERIRQ], CLEAR_LINE);
560      cpunum_set_input_line(machine, cpu, pC148Reg[NAMCOS2_C148_SERIRQ], CLEAR_LINE);
562561      break;
563562
564563   case 0x1de000: /* ack VBLANK */
565      cpunum_set_input_line(Machine, cpu, pC148Reg[NAMCOS2_C148_VBLANKIRQ], CLEAR_LINE);
564      cpunum_set_input_line(machine, cpu, pC148Reg[NAMCOS2_C148_VBLANKIRQ], CLEAR_LINE);
566565      break;
567566
568567   case 0x1e0000: /* EEPROM Status Register */
r2844r2845
575574         if( data&0x01 )
576575         {
577576            /* Resume execution */
578            cpunum_set_input_line(Machine, CPU_SOUND, INPUT_LINE_RESET, CLEAR_LINE);
577            cpunum_set_input_line(machine, CPU_SOUND, INPUT_LINE_RESET, CLEAR_LINE);
579578            cpu_yield();
580579         }
581580         else
582581         {
583582            /* Suspend execution */
584            cpunum_set_input_line(Machine, CPU_SOUND, INPUT_LINE_RESET, ASSERT_LINE);
583            cpunum_set_input_line(machine, CPU_SOUND, INPUT_LINE_RESET, ASSERT_LINE);
585584         }
586585         if( IsSystem21() )
587586         {
r2844r2845
599598      {
600599         if( data&0x01 )
601600         { /* Resume execution */
602            ResetAllSubCPUs( CLEAR_LINE );
601            ResetAllSubCPUs( machine, CLEAR_LINE );
603602            /* Give the new CPU an immediate slice of the action */
604603            cpu_yield();
605604         }
606605         else
607606         { /* Suspend execution */
608            ResetAllSubCPUs( ASSERT_LINE );
607            ResetAllSubCPUs( machine, ASSERT_LINE );
609608         }
610609      }
611610      break;
r2844r2845
622621
623622WRITE16_HANDLER( namcos2_68k_master_C148_w )
624623{
625   (void)ReadWriteC148( CPU_MASTER, offset, data, 1 );
624   (void)ReadWriteC148( machine, CPU_MASTER, offset, data, 1 );
626625}
627626
628627READ16_HANDLER( namcos2_68k_master_C148_r )
629628{
630   return ReadWriteC148( CPU_MASTER, offset, 0, 0 );
629   return ReadWriteC148( machine, CPU_MASTER, offset, 0, 0 );
631630}
632631
633632WRITE16_HANDLER( namcos2_68k_slave_C148_w )
634633{
635   (void)ReadWriteC148( CPU_SLAVE, offset, data, 1 );
634   (void)ReadWriteC148( machine, CPU_SLAVE, offset, data, 1 );
636635}
637636
638637READ16_HANDLER( namcos2_68k_slave_C148_r )
639638{
640   return ReadWriteC148( CPU_SLAVE, offset, 0, 0 );
639   return ReadWriteC148( machine, CPU_SLAVE, offset, 0, 0 );
641640}
642641
643642WRITE16_HANDLER( namcos2_68k_gpu_C148_w )
644643{
645   (void)ReadWriteC148( CPU_GPU, offset, data, 1 );
644   (void)ReadWriteC148( machine, CPU_GPU, offset, data, 1 );
646645}
647646
648647READ16_HANDLER( namcos2_68k_gpu_C148_r )
649648{
650   return ReadWriteC148( CPU_GPU, offset, 0, 0 );
649   return ReadWriteC148( machine, CPU_GPU, offset, 0, 0 );
651650}
652651
653652static TIMER_CALLBACK( namcos2_68k_master_posirq )
r2844r2845
657656}
658657
659658static int
660GetPosIRQScanline( void )
659GetPosIRQScanline( running_machine *machine )
661660{
662661   if( IsSystem21() ) return 0;
663   return namcos2_GetPosIrqScanline();
662   return namcos2_GetPosIrqScanline(machine);
664663}
665664
666665INTERRUPT_GEN( namcos2_68k_master_vblank )
667666{
668667   if( IsSystem21()==0 && namcos2_68k_master_C148[NAMCOS2_C148_POSIRQ] )
669668   {
670      int scanline = GetPosIRQScanline();
669      int scanline = GetPosIRQScanline(machine);
671670      timer_set(video_screen_get_time_until_pos(machine->primary_screen, scanline, 0), NULL, scanline, namcos2_68k_master_posirq );
672671   }
673672   cpunum_set_input_line(machine, CPU_MASTER, namcos2_68k_master_C148[NAMCOS2_C148_VBLANKIRQ], HOLD_LINE);
r2844r2845
683682{
684683   if( IsSystem21()==0 && namcos2_68k_slave_C148[NAMCOS2_C148_POSIRQ] )
685684   {
686      int scanline = GetPosIRQScanline();
685      int scanline = GetPosIRQScanline(machine);
687686      timer_set(video_screen_get_time_until_pos(machine->primary_screen, scanline, 0), NULL, scanline, namcos2_68k_slave_posirq );
688687   }
689688   cpunum_set_input_line(machine, CPU_SLAVE, namcos2_68k_slave_C148[NAMCOS2_C148_VBLANKIRQ], HOLD_LINE);
src/mame/machine/gaelco2.c
r2844r2845
99
1010#include "driver.h"
1111#include "machine/eeprom.h"
12#include "includes/gaelco2.h"
1213
1314/***************************************************************************
1415
src/mame/machine/spisprit.c
r2844r2845
1212
1313
1414#include "driver.h"
15#include "includes/seibuspi.h"
16
1517// add two numbers generating carry from one bit to the next only if
1618// the corresponding bit in carry_mask is 1
1719static int partial_carry_sum(int add1,int add2,int carry_mask,int bits)
src/mame/machine/retofinv.c
r2844r2845
11#include "driver.h"
22#include "cpu/z80/z80.h"
3#include "includes/retofinv.h"
34
45
56static UINT8 from_main,from_mcu;
src/mame/machine/bsktball.c
r2844r2845
7373   int p2_vert;
7474   int temp;
7575
76   p1_horiz = input_port_read_indexed(machine,0);
77   p1_vert  = input_port_read_indexed(machine,1);
78   p2_horiz = input_port_read_indexed(machine,2);
79   p2_vert  = input_port_read_indexed(machine,3);
76   p1_horiz = input_port_read(machine, "TRACK0_X");
77   p1_vert  = input_port_read(machine, "TRACK0_Y");
78   p2_horiz = input_port_read(machine, "TRACK1_X");
79   p2_vert  = input_port_read(machine, "TRACK1_Y");
8080
8181   /* Set direction bits */
8282
r2844r2845
146146   }
147147   else
148148   {
149      temp = input_port_read_indexed(machine, 4) & 0x0F;
149      temp = input_port_read(machine, "IN0") & 0x0F;
150150      /* Remap button 1 back to the Start button */
151151      /* NOTE:  This is an ADDED feature, not a part of the original hardware! */
152152      temp = (temp) & (temp>>2);
src/mame/machine/maniach.c
r2844r2845
88***************************************************************************/
99
1010#include "driver.h"
11#include "includes/matmania.h"
1112
1213
1314static UINT8 from_main,from_mcu;
src/mame/machine/gaelcrpt.c
r2844r2845
77*/
88
99#include "driver.h"
10#include "includes/gaelcrpt.h"
1011
1112static int decrypt(int const param1, int const param2, int const enc_prev_word, int const dec_prev_word, int const enc_word)
1213{
src/mame/machine/psx.c
r2844r2845
14901490   psx_gpu_write( &g_p_n_psxram[ n_address / 4 ], n_size );
14911491}
14921492
1493void psx_machine_init( void )
1493void psx_machine_init( running_machine *machine )
14941494{
14951495   int n;
14961496
r2844r2845
15311531      m_p_n_sio_tx_bits[ n ] = 0;
15321532   }
15331533
1534   psx_gpu_reset();
1534   psx_gpu_reset(machine);
15351535}
15361536
15371537static STATE_POSTLOAD( psx_postload )
src/mame/machine/beezer.c
r2844r2845
11#include "driver.h"
22#include "cpu/m6809/m6809.h"
33#include "machine/6522via.h"
4#include "includes/beezer.h"
45
5WRITE8_HANDLER( beezer_map_w );
6READ8_HANDLER( beezer_line_r );
7
86static int pbus;
97
108static READ8_HANDLER( b_via_0_pb_r );
r2844r2845
6967      switch (data & 0x03)
7068      {
7169      case 0:
72         pbus = input_port_read_indexed(machine, 0);
70         pbus = input_port_read(machine, "IN0");
7371         break;
7472      case 1:
75         pbus = input_port_read_indexed(machine, 1) | (input_port_read_indexed(machine, 2) << 4);
73         pbus = input_port_read(machine, "IN1") | (input_port_read(machine, "IN2") << 4);
7674         break;
7775      case 2:
78         pbus = input_port_read_indexed(machine, 3);
76         pbus = input_port_read(machine, "DSWB");
7977         break;
8078      case 3:
8179         pbus = 0xff;
src/mame/machine/lsasquad.c
r2844r2845
11#include "driver.h"
22#include "cpu/z80/z80.h"
3#include "includes/lsasquad.h"
34
45
56/* coin inputs are inverted in storming */
src/mame/machine/kaneko16.c
r2844r2845
541541TODO: look at this one since this remark is only driver-based.
542542*/
543543
544void (*toybox_mcu_run)(running_machine *machine);   /* One of the following */
545void bloodwar_mcu_run(running_machine *machine);
546void bonkadv_mcu_run(running_machine *machine);
547void gtmr_mcu_run(running_machine *machine);
544void (*toybox_mcu_run)(running_machine *machine);
548545
549546static UINT16 toybox_mcu_com[4];
550547
src/mame/machine/r2crypt.c
r2844r2845
11/* Raiden 2 Sprite Decryption */
22
33#include "driver.h"
4#include "includes/raiden2.h"
45
56/* INIT */
67
src/mame/machine/opwolf.c
r2844r2845
3636*************************************************************************/
3737
3838#include "driver.h"
39#include "includes/cchip.h"
3940
4041/* Select how coinage data is initialised in opwolf_cchip_data_w : 0 = user-defined in function - 1 = automatic */
4142#define OPWOLF_READ_COINAGE_FROM_ROM   1
src/mame/machine/wrally.c
r2844r2845
1010#include "driver.h"
1111#include "cpu/ds5002fp/ds5002fp.h"
1212#include "gaelcrpt.h"
13#include "includes/wrally.h"
1314
14/* from video/wrally.c */
15extern UINT16 *wrally_videoram;
16extern tilemap *wrally_pant[2];
17
1815/***************************************************************************
1916
2017    World Rally memory handlers
r2844r2845
5451}
5552
5653/* Converts memory offsets to the format expected by the Dallas */
57READ32_HANDLER( wrally_external_ram_iaddr )
54static READ32_HANDLER( wrally_external_ram_iaddr )
5855{
5956   return offset ^= 0x0001;
6057}
src/mame/machine/simpsons.c
r2844r2845
33#include "cpu/konami/konami.h"
44#include "machine/eeprom.h"
55#include "sound/k053260.h"
6#include "includes/simpsons.h"
67
7/* from video */
8extern void simpsons_video_banking( running_machine *machine, int select );
9extern UINT8 *simpsons_xtraram;
10
118int simpsons_firq_enabled;
129
1310/***************************************************************************
src/mame/machine/model1.c
r2844r2845
66#include "deprecat.h"
77#include "debugger.h"
88#include "cpu/mb86233/mb86233.h"
9#include "includes/model1.h"
910
1011enum {FIFO_SIZE = 256};
1112enum {MAT_STACK_SIZE = 32};
src/mame/machine/seicop.c
r2844r2845
4848
4949#include "driver.h"
5050#include "audio/seibu.h"
51#include "includes/legionna.h"
52#include "includes/raiden2.h"
53#include "machine/seicop.h"
5154
5255#define seibu_cop_log logerror
5356
r2844r2845
7073
7174static UINT16 copd2_offs = 0;
7275
73extern UINT16* legionna_scrollram16;
74extern UINT8 sdgndmrb_pri_n;
75extern void heatbrl_setgfxbank(UINT16 data);
76extern void denjinmk_setgfxbank(UINT16 data);
77extern UINT16 legionna_layer_disable;
78
79void copd2_set_tableoffset(UINT16 data, running_machine *machine)
76static void copd2_set_tableoffset(UINT16 data, running_machine *machine)
8077{
8178   logerror("mcu_offs %04x\n", data);
8279   copd2_offs = data;
r2844r2845
125122
126123}
127124
128void copd2_set_tabledata(UINT16 data, running_machine *machine)
125static void copd2_set_tabledata(UINT16 data, running_machine *machine)
129126{
130127   copd2_table[copd2_offs] = data;
131128   logerror("mcu_data %04x\n", data);
r2844r2845
900897
901898// this still probably contains some useful information, but we should handle
902899// things as generically as possible
903#if 0
900#ifdef UNUSED_FUNCTION
904901/********************************************************************************************
905902
906903  COPX-D2 simulation
r2844r2845
20011998   }
20021999}
20032000
2004extern WRITE16_HANDLER( sprcpt_val_1_w );
2005extern WRITE16_HANDLER( sprcpt_val_2_w );
2006extern WRITE16_HANDLER( sprcpt_data_1_w );
2007extern WRITE16_HANDLER( sprcpt_data_2_w );
2008extern WRITE16_HANDLER( sprcpt_data_3_w );
2009extern WRITE16_HANDLER( sprcpt_data_4_w );
2010extern WRITE16_HANDLER( sprcpt_adr_w );
2011extern WRITE16_HANDLER( sprcpt_flags_1_w );
2012extern WRITE16_HANDLER( sprcpt_flags_2_w );
2013
20142001WRITE16_HANDLER( raiden2_mcu_w )
20152002{
20162003   COMBINE_DATA(&cop_mcu_ram[offset]);
r2844r2845
20472034
20482035   }
20492036}
2050
2051
src/mame/machine/ajax.c
r2844r2845
1212#include "cpu/z80/z80.h"
1313#include "cpu/konami/konami.h"
1414#include "video/konamiic.h"
15#include "includes/ajax.h"
1516
16extern UINT8 ajax_priority;
1717static int firq_enable;
1818
1919/*  ajax_bankswitch_w:
r2844r2845
109109READ8_HANDLER( ajax_ls138_f10_r )
110110{
111111   int data = 0, index;
112   char port[5];
112   static const char *portnames[] = { "IN0", "IN1", "DSW1", "DSW2" };
113113
114114   switch ((offset & 0x01c0) >> 6)
115115   {
r2844r2845
121121         break;
122122      case 0x06:   /* 1P inputs + DIPSW #1 & #2 */
123123         index = offset & 0x01;
124         sprintf(port, "%s%d", (offset & 0x02) ? "DSW" : "IN", (offset & 0x02) ? index+1 : index);
125         data = input_port_read(machine, port);
124         data = input_port_read(machine, (offset & 0x02) ? portnames[2 + index] : portnames[index]);
126125         break;
127126      case 0x07:   /* DIPSW #3 */
128127         data = input_port_read(machine, "DSW3");
src/mame/machine/bigevglf.c
r2844r2845
88***************************************************************************/
99
1010#include "driver.h"
11#include "includes/bigevglf.h"
1112
1213
1314static UINT8 from_mcu;
src/mame/machine/bagman.c
r2844r2845
88***************************************************************************/
99
1010#include "driver.h"
11#include "includes/bagman.h"
1112
1213
1314/*Creation date: 98-02-18 */
src/mame/machine/jackal.c
r2844r2845
1111
1212#include "driver.h"
1313#include "cpu/m6809/m6809.h"
14#include "includes/jackal.h"
1415
15extern UINT8 jackal_interrupt_enable;
16extern void jackal_mark_tile_dirty(int offset);
17
1816static UINT8 *jackal_rambank = 0;
1917static UINT8 *jackal_spritebank = 0;
2018
2119
2220MACHINE_RESET( jackal )
2321{
22   // HACK: running at the nominal clock rate, music stops working
23   // at the beginning of the game. This fixes it.
24   cpunum_set_clockscale(machine, 1, 1.2f);
25
2426   memory_set_bankptr(1,&((memory_region(REGION_CPU1))[0x4000]));
2527    jackal_rambank = &((memory_region(REGION_CPU1))[0]);
2628   jackal_spritebank = &((memory_region(REGION_CPU1))[0]);
r2844r2845
4850
4951WRITE8_HANDLER( jackal_rambank_w )
5052{
51if (data & 0xc4) popmessage("jackal_rambank_w %02x",data);
53if (data & 0x04) popmessage("jackal_rambank_w %02x",data);
5254   coin_counter_w(0,data & 0x01);
5355   coin_counter_w(1,data & 0x02);
56   jackal_spritebank = &((memory_region(REGION_CPU1))[((data & 0x08) << 13)]);
5457   jackal_rambank = &((memory_region(REGION_CPU1))[((data & 0x10) << 12)]);
55   jackal_spritebank = &((memory_region(REGION_CPU1))[((data & 0x08) << 13)]);
5658   memory_set_bankptr(1,&((memory_region(REGION_CPU1))[((data & 0x20) << 11) + 0x4000]));
5759}
5860
src/mame/machine/seicop.h
r0r2845
1extern UINT16* cop_mcu_ram;
2
3READ16_HANDLER( copdxbl_0_r );
4WRITE16_HANDLER( copdxbl_0_w );
5
6READ16_HANDLER( heatbrl_mcu_r );
7WRITE16_HANDLER( heatbrl_mcu_w );
8READ16_HANDLER( cupsoc_mcu_r );
9WRITE16_HANDLER( cupsoc_mcu_w );
10READ16_HANDLER( godzilla_mcu_r );
11WRITE16_HANDLER( godzilla_mcu_w );
12READ16_HANDLER( denjinmk_mcu_r );
13WRITE16_HANDLER( denjinmk_mcu_w );
14READ16_HANDLER( sdgndmrb_mcu_r );
15WRITE16_HANDLER( sdgndmrb_mcu_w );
16READ16_HANDLER( legionna_mcu_r );
17WRITE16_HANDLER( legionna_mcu_w );
18
19READ16_HANDLER( raiden2_mcu_r );
20WRITE16_HANDLER( raiden2_mcu_w );
src/mame/mamedriv.c
r2844r2845
719719   DRIVER( boxyboy )   /* (c) 1990 (US) */
720720   DRIVER( soukobdx )   /* (c) 1990 (Japan) */
721721   DRIVER( puzlclub )   /* (c) 1990 (Japan) */
722   DRIVER( tankfrce )   /* (c) 1991 (US) */
722   DRIVER( tankfrce )   /* (c) 1991 (US, 2 Player) */
723   DRIVER( tankfrc4 )   /* (c) 1991 (US, 4 Player) */
723724   DRIVER( tankfrcj )   /* (c) 1991 (Japan) */
724725
725726   /* Namco System 2 games */
r2844r2845
56725673   DRIVER( s1945p )   /* 0254 (c) 1999 Psikyo */
56735674   DRIVER( preisle2 )   /* 0255 (c) 1999 Yumekobo */
56745675   DRIVER( mslug3 )   /* 0256 (c) 2000 SNK */
5675   DRIVER( mslug3n )   /* 0256 (c) 2000 SNK */
5676   DRIVER( mslug3h )   /* 0256 (c) 2000 SNK */
56765677   DRIVER( mslug3b6 )   /* bootleg */
56775678   DRIVER( kof2000 )   /* 0257 (c) 2000 SNK */
56785679   DRIVER( kof2000n )   /* 0257 (c) 2000 SNK */
r2844r2845
61966197   DRIVER( sbagmans )   /* (c) 1984 + Stern license */
61976198   DRIVER( pickin )   /* (c) 1983 */
61986199   DRIVER( botanic )   /* (c) 1985 */
6200   DRIVER( squaitsa )   /* (c) 1985 */
61996201   DRIVER( tankbust )   /* (c) 1985 */
62006202
62016203   /* Seibu Denshi / Seibu Kaihatsu games */
r2844r2845
71027104   DRIVER( mchampdx )   /* (c) 1999 ESD */
71037105   DRIVER( mchampda )   /* (c) 1999 ESD */
71047106   DRIVER( hedpanic )   /* (c) 2000 ESD */
7107   DRIVER( hedpanif )   /* (c) 2000 ESD + Fuuki, Co. Ltd. */
71057108   DRIVER( tangtang )   /* (c) 2000 ESD */
7109   DRIVER( swatpolc )   /* (c) 2001 ESD */
71067110
71077111   /* Dyna Electronics / Dynax / Nakanihon games */
71087112   DRIVER( royalmj )   /* (c) 1982 Nichibutsu */
r2844r2845
79327936   DRIVER( ampkr2b3 )   /* 1994 bootleg */
79337937   DRIVER( pkrdewin )   /* 1990 bootleg */
79347938   DRIVER( ampkr95 )   /* 1995 bootleg */
7939   DRIVER( videomat )   /* 1990 bootleg */
79357940   DRIVER( sigmapkr )   /* (c) 1995 Sigma */
79367941   DRIVER( sigma2k )   /* (c) 2000 Sigma */
79377942   DRIVER( lucky8 )   /* (c) 1989 Falcon */
r2844r2845
79637968   DRIVER( rbmk )      /* (c) 1995 GMS */
79647969   DRIVER( go2000 )   /* (c) 2000 SA */
79657970   DRIVER( mirax )      /* (c) 1985 Current Technologies */
7971   DRIVER( victor5 )   /* (c) 1990 Subsino */
7972   DRIVER( victor21 )   /* (c) 1990 Subsino */
7973   DRIVER( sharkpy )   /* (c) 1993 Subsino */
7974   DRIVER( sharkpya )   /* (c) 1993 Subsino */
7975   DRIVER( smoto20 )   /* (c) 1996 Subsino */
7976   DRIVER( smoto16 )   /* (c) 1996 Subsino */
79667977   DRIVER( lastfght )   /* (c) 2000 Subsino */
79677978   DRIVER( bishjan )   /* (c) 1999 Subsino */
79687979   DRIVER( sliver )   /* (c) 1996 Hollow Corp */
r2844r2845
80118022   DRIVER( comg183 )   /* (c) 1983 Cal Omega Inc. */
80128023   DRIVER( comg185 )   /* (c) 1983 Cal Omega Inc. */
80138024   DRIVER( comg186 )   /* (c) 1983 Cal Omega Inc. */
8025   DRIVER( comg187 )   /* (c) 1983 Cal Omega Inc. */
80148026   DRIVER( comg204 )   /* (c) 1984 Cal Omega Inc. */
80158027   DRIVER( comg208 )   /* (c) 1984 Cal Omega Inc. */
80168028   DRIVER( comg227 )   /* (c) 1984 Cal Omega Inc. */
r2844r2845
80698081   DRIVER( pepp0516 )   /* (c) 1987 IGT - International Gaming Technology */
80708082   DRIVER( pebe0014 )   /* (c) 1994 IGT - International Gaming Technology */
80718083   DRIVER( peke1012 )   /* (c) 1994 IGT - International Gaming Technology */
8084   DRIVER( peps0014 )   /* (c) 1996 IGT - International Gaming Technology */
8085    DRIVER( peps0022 )   /* (c) 1996 IGT - International Gaming Technology */
8086    DRIVER( peps0043 )   /* (c) 1996 IGT - International Gaming Technology */
8087    DRIVER( peps0045 )   /* (c) 1996 IGT - International Gaming Technology */
8088    DRIVER( peps0308 )   /* (c) 1996 IGT - International Gaming Technology */
80728089   DRIVER( peps0615 )   /* (c) 1996 IGT - International Gaming Technology */
80738090   DRIVER( peps0716 )   /* (c) 1996 IGT - International Gaming Technology */
80748091   DRIVER( pexp0019 )   /* (c) 1995 IGT - International Gaming Technology */
r2844r2845
80948111   DRIVER( capcor )   /* (c) 2001 Nazionale Elettronica */
80958112   DRIVER( euro2k2 )   /* (c) 2001 Nazionale Elettronica */
80968113   DRIVER( euro2k2a )   /* (c) 2001 Nazionale Elettronica */
8114   DRIVER( mnumber )   /* (c) 200? M.M. - B.R.L. */
80978115
80988116   /* H8/3337 italian gambling games */
8099   DRIVER( laser2k1 )   /* 200? unknown */
8100   DRIVER( mdrink )   /* 200? unknown */
8101   DRIVER( ntcash )   /* 200? unknown */
8102   DRIVER( wizard )   /* 200? unknown */
8103   DRIVER( te0144 )   /* 200? unknown */
8117   DRIVER( ntcash )   /* 1999 unknown */
8118   DRIVER( wizard )   /* (c) 1999 A.A. */
8119   DRIVER( laser2k1 )   /* 2001 unknown */
8120   DRIVER( mdrink )   /* 2001 unknown */
8121   DRIVER( te0144 )   /* 2001 unknown */
81048122   DRIVER( cmagica )   /* 200? unknown */
81058123   DRIVER( millsun )   /* 200? unknown */
81068124   DRIVER( sspac2k1 )   /* 200? unknown */
81078125   DRIVER( elvis )      /* 200? unknown */
81088126
8127   /* Mitsubishi/Renesas M16/62A italian gambling games */
8128   DRIVER( ejollyx5 )   /* (c) 200? Solar Games */
8129   DRIVER( grandprx )   /* (c) 4fun */
8130
81098131   /* Astro Corp. */
81108132   DRIVER( showhand )
81118133
src/mame/includes/nitedrvr.h
r2844r2845
2525WRITE8_HANDLER( nitedrvr_out1_w );
2626
2727void nitedrvr_crash_toggle(running_machine *machine);
28void nitedrvr_register_machine_vars(void);
2829
2930
3031/*----------- defined in audio/nitedrvr.c -----------*/
r2844r2845
3536/*----------- defined in video/nitedrvr.c -----------*/
3637
3738extern UINT8 *nitedrvr_hvc;
39
3840WRITE8_HANDLER( nitedrvr_hvc_w );
41WRITE8_HANDLER( nitedrvr_videoram_w );
42
43VIDEO_START( nitedrvr );
3944VIDEO_UPDATE( nitedrvr );
src/mame/includes/nycaptor.h
r0r2845
1/*----------- defined in drivers/nycaptor.c -----------*/
2
3extern UINT8 *nycaptor_sharedram;
4extern int nyc_gametype;
5
6
7/*----------- defined in machine/nycaptor.c -----------*/
8
9READ8_HANDLER( nycaptor_mcu_r );
10READ8_HANDLER( nycaptor_mcu_status_r1 );
11READ8_HANDLER( nycaptor_mcu_status_r2 );
12READ8_HANDLER( nycaptor_68705_portC_r );
13READ8_HANDLER( nycaptor_68705_portB_r );
14READ8_HANDLER( nycaptor_68705_portA_r );
15
16WRITE8_HANDLER( nycaptor_mcu_w );
17WRITE8_HANDLER( nycaptor_68705_portA_w );
18WRITE8_HANDLER( nycaptor_68705_portB_w );
19WRITE8_HANDLER( nycaptor_68705_portC_w );
20WRITE8_HANDLER( nycaptor_68705_ddrA_w );
21WRITE8_HANDLER( nycaptor_68705_ddrB_w );
22WRITE8_HANDLER( nycaptor_68705_ddrC_w );
23
24
25/*----------- defined in video/nycaptor.c -----------*/
26
27extern UINT8 *nycaptor_scrlram;
28
29VIDEO_START( nycaptor );
30VIDEO_UPDATE( nycaptor );
31
32
33READ8_HANDLER( nycaptor_videoram_r );
34READ8_HANDLER( nycaptor_spriteram_r );
35READ8_HANDLER( nycaptor_palette_r );
36READ8_HANDLER( nycaptor_gfxctrl_r );
37READ8_HANDLER( nycaptor_scrlram_r );
38
39WRITE8_HANDLER( nycaptor_videoram_w );
40WRITE8_HANDLER( nycaptor_spriteram_w );
41WRITE8_HANDLER( nycaptor_palette_w );
42WRITE8_HANDLER( nycaptor_gfxctrl_w );
43WRITE8_HANDLER( nycaptor_scrlram_w );
src/mame/includes/bublbobl.h
r0r2845
1/*----------- defined in machine/bublbobl.c -----------*/
2
3extern UINT8 *bublbobl_mcu_sharedram;
4
5WRITE8_HANDLER( bublbobl_bankswitch_w );
6WRITE8_HANDLER( tokio_bankswitch_w );
7WRITE8_HANDLER( tokio_videoctrl_w );
8WRITE8_HANDLER( bublbobl_nmitrigger_w );
9READ8_HANDLER( tokio_mcu_r );
10READ8_HANDLER( tokiob_mcu_r );
11WRITE8_HANDLER( bublbobl_sound_command_w );
12WRITE8_HANDLER( bublbobl_sh_nmi_disable_w );
13WRITE8_HANDLER( bublbobl_sh_nmi_enable_w );
14READ8_HANDLER( boblbobl_ic43_a_r );
15WRITE8_HANDLER( boblbobl_ic43_a_w );
16READ8_HANDLER( boblbobl_ic43_b_r );
17WRITE8_HANDLER( boblbobl_ic43_b_w );
18
19READ8_HANDLER( bublbobl_mcu_ddr1_r );
20WRITE8_HANDLER( bublbobl_mcu_ddr1_w );
21READ8_HANDLER( bublbobl_mcu_ddr2_r );
22WRITE8_HANDLER( bublbobl_mcu_ddr2_w );
23READ8_HANDLER( bublbobl_mcu_ddr3_r );
24WRITE8_HANDLER( bublbobl_mcu_ddr3_w );
25READ8_HANDLER( bublbobl_mcu_ddr4_r );
26WRITE8_HANDLER( bublbobl_mcu_ddr4_w );
27READ8_HANDLER( bublbobl_mcu_port1_r );
28WRITE8_HANDLER( bublbobl_mcu_port1_w );
29READ8_HANDLER( bublbobl_mcu_port2_r );
30WRITE8_HANDLER( bublbobl_mcu_port2_w );
31READ8_HANDLER( bublbobl_mcu_port3_r );
32WRITE8_HANDLER( bublbobl_mcu_port3_w );
33READ8_HANDLER( bublbobl_mcu_port4_r );
34WRITE8_HANDLER( bublbobl_mcu_port4_w );
35
36// for 68705 bootleg
37INTERRUPT_GEN( bublbobl_m68705_interrupt );
38READ8_HANDLER( bublbobl_68705_portA_r );
39WRITE8_HANDLER( bublbobl_68705_portA_w );
40WRITE8_HANDLER( bublbobl_68705_ddrA_w );
41READ8_HANDLER( bublbobl_68705_portB_r );
42WRITE8_HANDLER( bublbobl_68705_portB_w );
43WRITE8_HANDLER( bublbobl_68705_ddrB_w );
44
45
46/*----------- defined in video/bublbobl.c -----------*/
47
48extern int bublbobl_video_enable;
49extern UINT8 *bublbobl_objectram;
50extern size_t bublbobl_objectram_size;
51
52VIDEO_UPDATE( bublbobl );
src/mame/includes/seta.h
r2844r2845
1717
1818extern int seta_tiles_offset;
1919
20void seta_coin_lockout_w(int data);
20void seta_coin_lockout_w(running_machine *machine, int data);
2121
2222WRITE16_HANDLER( twineagl_tilebank_w );
2323
src/mame/includes/stv.h
r0r2845
1/*----------- defined in drivers/stv.c -----------*/
2
3extern UINT32 *stv_workram_h;
4extern UINT32 *stv_workram_l;
5
6extern int stv_vblank,stv_hblank;
7extern int stv_enable_slave_sh2;
8
9extern int minit_boost,sinit_boost;
10extern attotime minit_boost_timeslice, sinit_boost_timeslice;
11
12DRIVER_INIT ( stv );
13
14
15/*----------- defined in drivers/stvinit.c -----------*/
16
17DRIVER_INIT( ic13 );
18NVRAM_HANDLER( stv );
19void install_stvbios_speedups(running_machine *machine);
20DRIVER_INIT(bakubaku);
21DRIVER_INIT(mausuke);
22DRIVER_INIT(puyosun);
23DRIVER_INIT(shienryu);
24DRIVER_INIT(prikura);
25DRIVER_INIT(hanagumi);
26DRIVER_INIT(cottonbm);
27DRIVER_INIT(cotton2);
28DRIVER_INIT(fhboxers);
29DRIVER_INIT(dnmtdeka);
30DRIVER_INIT(groovef);
31DRIVER_INIT(danchih);
32DRIVER_INIT(astrass);
33DRIVER_INIT(thunt);
34DRIVER_INIT(grdforce);
35DRIVER_INIT(batmanfr);
36DRIVER_INIT(winterht);
37DRIVER_INIT(seabass);
38DRIVER_INIT(vfremix);
39DRIVER_INIT(diehard);
40DRIVER_INIT(sss);
41DRIVER_INIT(othellos);
42DRIVER_INIT(sasissu);
43DRIVER_INIT(gaxeduel);
44DRIVER_INIT(suikoenb);
45DRIVER_INIT(sokyugrt);
46DRIVER_INIT(znpwfv);
47DRIVER_INIT(twcup98);
48DRIVER_INIT(smleague);
49DRIVER_INIT(maruchan);
50DRIVER_INIT(sandor);
51DRIVER_INIT(colmns97);
52DRIVER_INIT(pblbeach);
53DRIVER_INIT(shanhigw);
54DRIVER_INIT(finlarch);
55DRIVER_INIT(elandore);
56DRIVER_INIT(rsgun);
57DRIVER_INIT(ffreveng);
58DRIVER_INIT(decathlt);
59DRIVER_INIT(nameclv3);
60
61/*----------- defined in video/stvvdp1.c -----------*/
62
63extern UINT32* stv_vdp1_vram;
64extern UINT16   **stv_framebuffer_display_lines;
65extern int stv_framebuffer_double_interlace;
66extern int stv_framebuffer_mode;
67extern UINT8* stv_vdp1_gfx_decode;
68
69int stv_vdp1_start ( running_machine *machine );
70void video_update_vdp1(running_machine *machine);
71
72READ32_HANDLER( stv_vdp1_regs_r );
73WRITE32_HANDLER( stv_vdp1_regs_w );
74READ32_HANDLER ( stv_vdp1_vram_r );
75WRITE32_HANDLER ( stv_vdp1_vram_w );
76
77WRITE32_HANDLER ( stv_vdp1_framebuffer0_w );
78READ32_HANDLER ( stv_vdp1_framebuffer0_r );
79
80/*----------- defined in video/stvvdp2.c -----------*/
81
82extern UINT32* stv_vdp2_regs;
83extern UINT32* stv_vdp2_vram;
84extern UINT32* stv_vdp2_cram;
85
86WRITE32_HANDLER ( stv_vdp2_vram_w );
87READ32_HANDLER ( stv_vdp2_vram_r );
88
89WRITE32_HANDLER ( stv_vdp2_cram_w );
90READ32_HANDLER ( stv_vdp2_cram_r );
91
92WRITE32_HANDLER ( stv_vdp2_regs_w );
93READ32_HANDLER ( stv_vdp2_regs_r );
94
95VIDEO_START ( stv_vdp2 );
96VIDEO_UPDATE( stv_vdp2 );
97
src/mame/includes/deco16ic.h
r2844r2845
1313
1414extern int deco16_pf1_colour_bank,deco16_pf2_colour_bank,deco16_pf3_colour_bank,deco16_pf4_colour_bank;
1515
16void deco16_1_video_init(void);
17void deco16_2_video_init(int split);
18void deco16_2_video_init_half_width(void);
19void deco_allocate_sprite_bitmap(void);
16void deco16_1_video_init(running_machine *machine);
17void deco16_2_video_init(running_machine *machine, int split);
18void deco16_2_video_init_half_width(running_machine *machine);
19void deco_allocate_sprite_bitmap(running_machine *machine);
2020
2121void deco16_pf12_update(const UINT16 *rowscroll_1_ptr, const UINT16 *rowscroll_2_ptr);
2222void deco16_pf34_update(const UINT16 *rowscroll_1_ptr, const UINT16 *rowscroll_2_ptr);
r2844r2845
3737void deco16_tilemap_34_combine_draw(bitmap_t *bitmap, const rectangle *cliprect, int flags, UINT32 priority);
3838
3939void deco16_clear_sprite_priority_bitmap(void);
40void deco16_pdrawgfx(bitmap_t *dest,const gfx_element *gfx,
40void deco16_pdrawgfx(running_machine *machine,
41      bitmap_t *dest,const gfx_element *gfx,
4142      UINT32 code,UINT32 color,int flipx,int flipy,int sx,int sy,
4243      const rectangle *clip,int transparency,int transparent_color,UINT32 pri_mask,UINT32 sprite_mask,UINT8 write_pri);
4344
src/mame/includes/seibuspi.h
r0r2845
1/*----------- defined in drivers/seibuspi.c -----------*/
2
3extern UINT32 *spimainram;
4
5
6/*----------- defined in machine/spisprit.c -----------*/
7
8void seibuspi_sprite_decrypt(UINT8 *src, int romsize);
9
10
11/*----------- defined in machine/seibuspi.c -----------*/
12
13void seibuspi_text_decrypt(UINT8 *rom);
14void seibuspi_bg_decrypt(UINT8 *rom, int size);
15
16void seibuspi_rise10_text_decrypt(UINT8 *rom);
17void seibuspi_rise10_bg_decrypt(UINT8 *rom, int size);
18void seibuspi_rise10_sprite_decrypt(UINT8 *rom, int romsize);
19
20void seibuspi_rise11_text_decrypt(UINT8 *rom);
21void seibuspi_rise11_bg_decrypt(UINT8 *rom, int size);
22void seibuspi_rise11_sprite_decrypt(UINT8 *rom, int romsize);
23
24
25/*----------- defined in video/seibuspi.c -----------*/
26
27extern UINT32 *spi_scrollram;
28
29VIDEO_START( spi );
30VIDEO_UPDATE( spi );
31
32READ32_HANDLER( spi_layer_bank_r );
33WRITE32_HANDLER( spi_layer_bank_w );
34WRITE32_HANDLER( spi_layer_enable_w );
35
36void rf2_set_layer_banks(int banks);
37
38WRITE32_HANDLER( tilemap_dma_start_w );
39WRITE32_HANDLER( palette_dma_start_w );
40WRITE32_HANDLER( video_dma_length_w );
41WRITE32_HANDLER( video_dma_address_w );
42WRITE32_HANDLER( sprite_dma_start_w );
src/mame/includes/gaplus.h
r0r2845
1/*----------- defined in machine/gaplus.c -----------*/
2
3extern UINT8 *gaplus_customio_3;
4WRITE8_HANDLER( gaplus_customio_3_w );
5READ8_HANDLER( gaplus_customio_3_r );
6
7
8/*----------- defined in video/gaplus.c -----------*/
9
10extern UINT8 *gaplus_videoram;
11extern UINT8 *gaplus_spriteram;
12READ8_HANDLER( gaplus_videoram_r );
13WRITE8_HANDLER( gaplus_videoram_w );
14WRITE8_HANDLER( gaplus_starfield_control_w );
15VIDEO_START( gaplus );
16PALETTE_INIT( gaplus );
17VIDEO_UPDATE( gaplus );
18VIDEO_EOF( gaplus );   /* update starfields */
src/mame/includes/namcos1.h
r0r2845
1/*----------- defined in drivers/namcos1.c -----------*/
2
3void namcos1_init_DACs(void);
4
5
6/*----------- defined in machine/namcos1.c -----------*/
7
8extern UINT8 *namcos1_paletteram;
9
10WRITE8_HANDLER( namcos1_bankswitch_w );
11WRITE8_HANDLER( namcos1_subcpu_bank_w );
12
13WRITE8_HANDLER( namcos1_cpu_control_w );
14WRITE8_HANDLER( namcos1_watchdog_w );
15WRITE8_HANDLER( namcos1_sound_bankswitch_w );
16
17WRITE8_HANDLER( namcos1_mcu_bankswitch_w );
18WRITE8_HANDLER( namcos1_mcu_patch_w );
19
20MACHINE_RESET( namcos1 );
21
22DRIVER_INIT( shadowld );
23DRIVER_INIT( dspirit );
24DRIVER_INIT( quester );
25DRIVER_INIT( blazer );
26DRIVER_INIT( pacmania );
27DRIVER_INIT( galaga88 );
28DRIVER_INIT( ws );
29DRIVER_INIT( berabohm );
30DRIVER_INIT( alice );
31DRIVER_INIT( bakutotu );
32DRIVER_INIT( wldcourt );
33DRIVER_INIT( splatter );
34DRIVER_INIT( faceoff );
35DRIVER_INIT( rompers );
36DRIVER_INIT( blastoff );
37DRIVER_INIT( ws89 );
38DRIVER_INIT( dangseed );
39DRIVER_INIT( ws90 );
40DRIVER_INIT( pistoldm );
41DRIVER_INIT( soukobdx );
42DRIVER_INIT( puzlclub );
43DRIVER_INIT( tankfrce );
44
45
46/*----------- defined in video/namcos1.c -----------*/
47
48READ8_HANDLER( namcos1_videoram_r );
49WRITE8_HANDLER( namcos1_videoram_w );
50WRITE8_HANDLER( namcos1_paletteram_w );
51READ8_HANDLER( namcos1_spriteram_r );
52WRITE8_HANDLER( namcos1_spriteram_w );
53
54VIDEO_START( namcos1 );
55VIDEO_UPDATE( namcos1 );
56VIDEO_EOF( namcos1 );
src/mame/includes/vsnes.h
r0r2845
1/*----------- defined in video/vsnes.c -----------*/
2
3VIDEO_START( vsnes );
4PALETTE_INIT( vsnes );
5VIDEO_UPDATE( vsnes );
6VIDEO_START( vsdual );
7VIDEO_UPDATE( vsdual );
8PALETTE_INIT( vsdual );
9
10
11/*----------- defined in machine/vsnes.c -----------*/
12
13MACHINE_RESET( vsnes );
14MACHINE_RESET( vsdual );
15DRIVER_INIT( suprmrio );
16DRIVER_INIT( excitebk );
17DRIVER_INIT( excitbkj );
18DRIVER_INIT( vsnormal );
19DRIVER_INIT( duckhunt );
20DRIVER_INIT( hogalley );
21DRIVER_INIT( goonies );
22DRIVER_INIT( machridr );
23DRIVER_INIT( vsslalom );
24DRIVER_INIT( cstlevna );
25DRIVER_INIT( drmario );
26DRIVER_INIT( rbibb );
27DRIVER_INIT( tkoboxng );
28DRIVER_INIT( topgun );
29DRIVER_INIT( vsgradus );
30DRIVER_INIT( vspinbal );
31DRIVER_INIT( MMC3 );
32DRIVER_INIT( platoon );
33DRIVER_INIT( vstennis );
34DRIVER_INIT( wrecking );
35DRIVER_INIT( balonfgt );
36DRIVER_INIT( vsbball );
37DRIVER_INIT( iceclmrj );
38DRIVER_INIT( supxevs );
39DRIVER_INIT( btlecity );
40DRIVER_INIT( vstetris );
41DRIVER_INIT( bnglngby );
42DRIVER_INIT( jajamaru);
43DRIVER_INIT( vsgshoe );
44DRIVER_INIT( vsfdf );
45DRIVER_INIT( mightybj);
46
47READ8_HANDLER( vsnes_in0_r );
48READ8_HANDLER( vsnes_in1_r );
49READ8_HANDLER( vsnes_in0_1_r );
50READ8_HANDLER( vsnes_in1_1_r );
51WRITE8_HANDLER( vsnes_in0_w );
52WRITE8_HANDLER( vsnes_in0_1_w );
src/mame/includes/mexico86.h
r0r2845
1/*----------- defined in machine/mexico86.c -----------*/
2
3extern UINT8 *mexico86_protection_ram;
4
5WRITE8_HANDLER( mexico86_f008_w );
6INTERRUPT_GEN( kikikai_interrupt );
7INTERRUPT_GEN( mexico86_m68705_interrupt );
8READ8_HANDLER( mexico86_68705_portA_r );
9WRITE8_HANDLER( mexico86_68705_portA_w );
10WRITE8_HANDLER( mexico86_68705_ddrA_w );
11READ8_HANDLER( mexico86_68705_portB_r );
12WRITE8_HANDLER( mexico86_68705_portB_w );
13WRITE8_HANDLER( mexico86_68705_ddrB_w );
14
15
16/*----------- defined in video/mexico86.c -----------*/
17
18extern UINT8 *mexico86_videoram,*mexico86_objectram;
19extern size_t mexico86_objectram_size;
20
21WRITE8_HANDLER( mexico86_bankswitch_w );
22VIDEO_UPDATE( mexico86 );
23VIDEO_UPDATE( kikikai );
src/mame/includes/chaknpop.h
r0r2845
1/*----------- defined in machine/chaknpop.c -----------*/
2
3extern UINT8 *chaknpop_ram;
4DRIVER_INIT( chaknpop );
5MACHINE_RESET( chaknpop );
6READ8_HANDLER( chaknpop_mcu_portA_r );
7READ8_HANDLER( chaknpop_mcu_portB_r );
8READ8_HANDLER( chaknpop_mcu_portC_r );
9WRITE8_HANDLER( chaknpop_mcu_portA_w );
10WRITE8_HANDLER( chaknpop_mcu_portB_w );
11WRITE8_HANDLER( chaknpop_mcu_portC_w );
12
13
14/*----------- defined in video/chaknpop.c -----------*/
15
16extern UINT8 *chaknpop_txram;
17extern UINT8 *chaknpop_sprram;
18extern size_t chaknpop_sprram_size;
19extern UINT8 *chaknpop_attrram;
20
21PALETTE_INIT( chaknpop );
22VIDEO_START( chaknpop );
23VIDEO_UPDATE( chaknpop );
24
25READ8_HANDLER( chaknpop_gfxmode_r );
26WRITE8_HANDLER( chaknpop_gfxmode_w );
27
28WRITE8_HANDLER( chaknpop_txram_w );
29
30WRITE8_HANDLER( chaknpop_attrram_w );
src/mame/includes/taitosj.h
r0r2845
1/*----------- defined in machine/taitosj.c -----------*/
2
3MACHINE_START( taitosj );
4MACHINE_RESET( taitosj );
5WRITE8_HANDLER( taitosj_bankswitch_w );
6READ8_HANDLER( taitosj_fake_data_r );
7READ8_HANDLER( taitosj_fake_status_r );
8WRITE8_HANDLER( taitosj_fake_data_w );
9READ8_HANDLER( taitosj_mcu_data_r );
10READ8_HANDLER( taitosj_mcu_status_r );
11WRITE8_HANDLER( taitosj_mcu_data_w );
12READ8_HANDLER( taitosj_68705_portA_r );
13READ8_HANDLER( taitosj_68705_portB_r );
14READ8_HANDLER( taitosj_68705_portC_r );
15WRITE8_HANDLER( taitosj_68705_portA_w );
16WRITE8_HANDLER( taitosj_68705_portB_w );
17
18READ8_HANDLER( spacecr_prot_r );
19WRITE8_HANDLER( alpine_protection_w );
20WRITE8_HANDLER( alpinea_bankswitch_w );
21READ8_HANDLER( alpine_port_2_r );
22
23
24/*----------- defined in video/taitosj.c -----------*/
25
26extern UINT8 *taitosj_videoram_1;
27extern UINT8 *taitosj_videoram_2;
28extern UINT8 *taitosj_videoram_3;
29extern UINT8 *taitosj_spriteram;
30extern UINT8 *taitosj_paletteram;
31extern UINT8 *taitosj_characterram;
32extern UINT8 *taitosj_scroll;
33extern UINT8 *taitosj_colscrolly;
34extern UINT8 *taitosj_gfxpointer;
35extern UINT8 *taitosj_colorbank;
36extern UINT8 *taitosj_video_mode;
37extern UINT8 *taitosj_video_priority;
38extern UINT8 *taitosj_collision_reg;
39extern UINT8 *kikstart_scrollram;
40
41READ8_HANDLER( taitosj_gfxrom_r );
42WRITE8_HANDLER( taitosj_characterram_w );
43WRITE8_HANDLER( junglhbr_characterram_w );
44WRITE8_HANDLER( taitosj_collision_reg_clear_w );
45VIDEO_START( taitosj );
46VIDEO_UPDATE( taitosj );
47VIDEO_UPDATE( kikstart );
src/mame/includes/lkage.h
r0r2845
1/*----------- defined in machine/lkage.c -----------*/
2
3READ8_HANDLER( lkage_68705_portA_r );
4WRITE8_HANDLER( lkage_68705_portA_w );
5READ8_HANDLER( lkage_68705_portB_r );
6WRITE8_HANDLER( lkage_68705_portB_w );
7READ8_HANDLER( lkage_68705_portC_r );
8WRITE8_HANDLER( lkage_68705_portC_w );
9WRITE8_HANDLER( lkage_68705_ddrA_w );
10WRITE8_HANDLER( lkage_68705_ddrB_w );
11WRITE8_HANDLER( lkage_68705_ddrC_w );
12WRITE8_HANDLER( lkage_mcu_w );
13READ8_HANDLER( lkage_mcu_r );
14READ8_HANDLER( lkage_mcu_status_r );
15
16
17/*----------- defined in video/lkage.c -----------*/
18
19extern UINT8 *lkage_scroll, *lkage_vreg;
20WRITE8_HANDLER( lkage_videoram_w );
21VIDEO_START( lkage );
22VIDEO_UPDATE( lkage );
23
src/mame/includes/fastfred.h
r2844r2845
77
88/*----------- defined in video/fastfred.c -----------*/
99
10extern int fastfred_hardware_type;
11
1012extern UINT8 *fastfred_videoram;
1113extern UINT8 *fastfred_spriteram;
1214extern size_t fastfred_spriteram_size;
src/mame/includes/namcos2.h
r2844r2845
107107WRITE16_HANDLER( namcos2_sprite_ram_w );
108108READ16_HANDLER( namcos2_sprite_ram_r );
109109
110int namcos2_GetPosIrqScanline( void );
110int namcos2_GetPosIrqScanline( running_machine *machine );
111111
112112WRITE16_HANDLER( namcos2_gfx_ctrl_w );
113113READ16_HANDLER( namcos2_gfx_ctrl_r );
src/mame/includes/decoprot.h
r2844r2845
2424
2525extern UINT16 *deco16_prot_ram;
2626extern UINT32 *deco32_prot_ram;
27
28READ16_HANDLER( dietgo_104_prot_r );
29WRITE16_HANDLER( dietgo_104_prot_w );
src/mame/includes/tatsumi.h
r2844r2845
11/*----------- defined in drivers/tatsumi.c -----------*/
22
3extern UINT16 bigfight_a40000[2];
4
35extern UINT8* tatsumi_rom_sprite_lookup1;
46extern UINT8* tatsumi_rom_sprite_lookup2;
57extern UINT8* tatsumi_rom_clut0;
src/mame/includes/cloak.h
r2844r2845
66
77/*----------- defined in video/cloak.c -----------*/
88
9WRITE8_HANDLER( cloak_videoram_w );
10WRITE8_HANDLER( cloak_flipscreen_w );
11
912WRITE8_HANDLER( cloak_paletteram_w );
1013READ8_HANDLER( graph_processor_r );
1114WRITE8_HANDLER( graph_processor_w );
src/mame/includes/retofinv.h
r0r2845
1/*----------- defined in machine/retofinv.c -----------*/
2
3READ8_HANDLER( retofinv_68705_portA_r );
4WRITE8_HANDLER( retofinv_68705_portA_w );
5WRITE8_HANDLER( retofinv_68705_ddrA_w );
6READ8_HANDLER( retofinv_68705_portB_r );
7WRITE8_HANDLER( retofinv_68705_portB_w );
8WRITE8_HANDLER( retofinv_68705_ddrB_w );
9READ8_HANDLER( retofinv_68705_portC_r );
10WRITE8_HANDLER( retofinv_68705_portC_w );
11WRITE8_HANDLER( retofinv_68705_ddrC_w );
12WRITE8_HANDLER( retofinv_mcu_w );
13READ8_HANDLER( retofinv_mcu_r );
14READ8_HANDLER( retofinv_mcu_status_r );
15
16
17/*----------- defined in video/retofinv.c -----------*/
18
19extern UINT8 *retofinv_fg_videoram;
20extern UINT8 *retofinv_bg_videoram;
21extern UINT8 *retofinv_sharedram;
22
23VIDEO_START( retofinv );
24PALETTE_INIT( retofinv );
25VIDEO_UPDATE( retofinv );
26WRITE8_HANDLER( retofinv_bg_videoram_w );
27WRITE8_HANDLER( retofinv_fg_videoram_w );
28WRITE8_HANDLER( retofinv_gfx_ctrl_w );
src/mame/includes/psx.h
r2844r2845
1313VIDEO_START( psx_type2 );
1414VIDEO_UPDATE( psx );
1515INTERRUPT_GEN( psx_vblank );
16extern void psx_gpu_reset( void );
16extern void psx_gpu_reset( running_machine *machine );
1717extern void psx_gpu_read( UINT32 *p_ram, INT32 n_size );
1818extern void psx_gpu_write( UINT32 *p_ram, INT32 n_size );
1919READ32_HANDLER( psx_gpu_r );
r2844r2845
5353
5454WRITE32_HANDLER( psx_mdec_w );
5555READ32_HANDLER( psx_mdec_r );
56extern void psx_machine_init( void );
56extern void psx_machine_init( running_machine *machine );
5757extern void psx_driver_init( running_machine *machine );
5858
5959#define PSX_H ( 1 )
src/mame/includes/beezer.h
r0r2845
1/*----------- defined in machine/beezer.c -----------*/
2
3DRIVER_INIT( beezer );
4WRITE8_HANDLER( beezer_bankswitch_w );
5
6
7/*----------- defined in video/beezer.c -----------*/
8
9INTERRUPT_GEN( beezer_interrupt );
10VIDEO_UPDATE( beezer );
11WRITE8_HANDLER( beezer_map_w );
12READ8_HANDLER( beezer_line_r );
src/mame/includes/kaneko16.h
r2844r2845
2828WRITE16_HANDLER( toybox_mcu_com3_w );
2929READ16_HANDLER( toybox_mcu_status_r );
3030
31extern void (*toybox_mcu_run)(running_machine *machine);   /* one of the following */
32void bloodwar_mcu_run(running_machine *machine);
33void bonkadv_mcu_run(running_machine *machine);
34void gtmr_mcu_run(running_machine *machine);
3135
3236
3337/*----------- defined in drivers/kaneko16.c -----------*/
r2844r2845
103107VIDEO_UPDATE( sandscrp );
104108VIDEO_UPDATE( berlwall );
105109
110VIDEO_START( galsnew );
111VIDEO_UPDATE( galsnew );
106112
113extern UINT16* galsnew_bg_pixram;
114extern UINT16* galsnew_fg_pixram;
115
116
107117/*----------- defined in drivers/galpani2.c -----------*/
108118
109119void galpani2_mcu_run(void);
src/mame/includes/system16.h
r2844r2845
2424VIDEO_START( system18 );
2525VIDEO_UPDATE( system18 );
2626
27void system18_set_grayscale(int enable);
28void system18_set_vdp_enable(int eanble);
29void system18_set_vdp_mixing(int mixing);
27void system18_set_grayscale(running_machine *machine, int enable);
28void system18_set_vdp_enable(running_machine *machine, int eanble);
29void system18_set_vdp_mixing(running_machine *machine, int mixing);
3030
3131/*----------- defined in video/segaorun.c -----------*/
3232
src/mame/includes/legionna.h
r0r2845
1/*----------- defined in video/legionna.c -----------*/
2
3extern UINT16 *legionna_back_data,*legionna_fore_data,*legionna_mid_data,*legionna_scrollram16,*legionna_textram;
4extern UINT8 sdgndmrb_pri_n;
5extern UINT16 legionna_layer_disable;
6
7void heatbrl_setgfxbank(UINT16 data);
8void denjinmk_setgfxbank(UINT16 data);
9WRITE16_HANDLER( legionna_background_w );
10WRITE16_HANDLER( legionna_foreground_w );
11WRITE16_HANDLER( legionna_midground_w );
12WRITE16_HANDLER( legionna_text_w );
13
14VIDEO_START( legionna );
15VIDEO_START( cupsoc );
16VIDEO_START( denjinmk );
17VIDEO_UPDATE( legionna );
18VIDEO_UPDATE( godzilla );
19VIDEO_UPDATE( sdgndmrb );
src/mame/includes/simpsons.h
r0r2845
1/*----------- defined in machine/simpsons.c -----------*/
2
3extern int simpsons_firq_enabled;
4
5READ8_HANDLER( simpsons_eeprom_r );
6WRITE8_HANDLER( simpsons_eeprom_w );
7WRITE8_HANDLER( simpsons_coin_counter_w );
8READ8_HANDLER( simpsons_sound_interrupt_r );
9READ8_HANDLER( simpsons_sound_r );
10MACHINE_RESET( simpsons );
11NVRAM_HANDLER( simpsons );
12
13/*----------- defined in video/simpsons.c -----------*/
14
15extern UINT8 *simpsons_xtraram;
16
17void simpsons_video_banking( running_machine *machine, int select );
18VIDEO_START( simpsons );
19VIDEO_UPDATE( simpsons );
src/mame/includes/polepos.h
r2844r2845
55*************************************************************************/
66
77#include "sound/discrete.h"
8#include "sound/custom.h"
89
910
1011/*----------- defined in audio/polepos.c -----------*/
1112
13void *polepos_sh_start(int clock, const struct CustomSound_interface *config);
14void polepos_sh_reset(void *token);
15WRITE8_HANDLER( polepos_engine_sound_lsb_w );
16WRITE8_HANDLER( polepos_engine_sound_msb_w );
17
1218DISCRETE_SOUND_EXTERN( polepos );
19
20
21/*----------- defined in video/polepos.c -----------*/
22
23extern UINT16 *polepos_view16_memory;
24extern UINT16 *polepos_road16_memory;
25extern UINT16 *polepos_alpha16_memory;
26extern UINT16 *polepos_sprite16_memory;
27extern int polepos_gear_bit;
28
29VIDEO_START( polepos );
30PALETTE_INIT( polepos );
31VIDEO_UPDATE( polepos );
32
33WRITE16_HANDLER( polepos_view16_w );
34WRITE16_HANDLER( polepos_road16_w );
35WRITE16_HANDLER( polepos_alpha16_w );
36WRITE16_HANDLER( polepos_sprite16_w );
37WRITE8_HANDLER( polepos_view_w );
38WRITE8_HANDLER( polepos_road_w );
39WRITE8_HANDLER( polepos_alpha_w );
40WRITE8_HANDLER( polepos_sprite_w );
41WRITE8_HANDLER( polepos_chacl_w );
42
43READ16_HANDLER( polepos_view16_r );
44READ16_HANDLER( polepos_road16_r );
45READ16_HANDLER( polepos_alpha16_r );
46READ16_HANDLER( polepos_sprite16_r );
47READ8_HANDLER( polepos_view_r );
48READ8_HANDLER( polepos_road_r );
49READ8_HANDLER( polepos_alpha_r );
50READ8_HANDLER( polepos_sprite_r );
51WRITE16_HANDLER( polepos_view16_hscroll_w );
52WRITE16_HANDLER( polepos_road16_vscroll_w );
src/mame/includes/model1.h
r0r2845
1/*----------- defined in machine/model1.c -----------*/
2
3extern const struct mb86233_config model1_vr_tgp_config;
4extern int model1_dump;
5
6READ16_HANDLER( model1_tgp_copro_r );
7WRITE16_HANDLER( model1_tgp_copro_w );
8READ16_HANDLER( model1_tgp_copro_adr_r );
9WRITE16_HANDLER( model1_tgp_copro_adr_w );
10READ16_HANDLER( model1_tgp_copro_ram_r );
11WRITE16_HANDLER( model1_tgp_copro_ram_w );
12
13READ16_HANDLER( model1_vr_tgp_r );
14WRITE16_HANDLER( model1_vr_tgp_w );
15READ16_HANDLER( model1_tgp_vr_adr_r );
16WRITE16_HANDLER( model1_tgp_vr_adr_w );
17READ16_HANDLER( model1_vr_tgp_ram_r );
18WRITE16_HANDLER( model1_vr_tgp_ram_w );
19
20ADDRESS_MAP_EXTERN( model1_vr_tgp_map, 32 );
21
22void model1_vr_tgp_reset( void );
23void model1_tgp_reset(int swa);
24
25
26/*----------- defined in video/model1.c -----------*/
27
28extern UINT16 *model1_display_list0, *model1_display_list1;
29extern UINT16 *model1_color_xlat;
30
31VIDEO_START(model1);
32VIDEO_UPDATE(model1);
33VIDEO_EOF(model1);
34
35READ16_HANDLER( model1_listctl_r );
36WRITE16_HANDLER( model1_listctl_w );
src/mame/includes/jackal.h
r0r2845
1/*----------- defined in machine/jackal.c -----------*/
2
3MACHINE_RESET( jackal );
4
5READ8_HANDLER( jackal_zram_r );
6READ8_HANDLER( jackal_voram_r );
7READ8_HANDLER( jackal_spriteram_r );
8
9WRITE8_HANDLER( jackal_rambank_w );
10WRITE8_HANDLER( jackal_zram_w );
11WRITE8_HANDLER( jackal_voram_w );
12WRITE8_HANDLER( jackal_spriteram_w );
13
14
15/*----------- defined in video/jackal.c -----------*/
16
17extern UINT8 *jackal_videoctrl;
18
19void jackal_mark_tile_dirty(int offset);
20PALETTE_INIT( jackal );
21VIDEO_START( jackal );
22VIDEO_UPDATE( jackal );
src/mame/includes/btime.h
r0r2845
1/*----------- defined in machine/btime.c -----------*/
2
3READ8_HANDLER( mmonkey_protection_r );
4WRITE8_HANDLER( mmonkey_protection_w );
5
6
7/*----------- defined in video/btime.c -----------*/
8
9extern UINT8 *btime_videoram;
10extern size_t btime_videoram_size;
11extern UINT8 *btime_colorram;
12extern UINT8 *lnc_charbank;
13extern UINT8 *bnj_backgroundram;
14extern size_t bnj_backgroundram_size;
15extern UINT8 *zoar_scrollram;
16extern UINT8 *deco_charram;
17
18PALETTE_INIT( btime );
19PALETTE_INIT( lnc );
20
21MACHINE_RESET( lnc );
22
23VIDEO_START( btime );
24VIDEO_START( bnj );
25
26
27VIDEO_UPDATE( btime );
28VIDEO_UPDATE( cookrace );
29VIDEO_UPDATE( bnj );
30VIDEO_UPDATE( lnc );
31VIDEO_UPDATE( zoar );
32VIDEO_UPDATE( disco );
33VIDEO_UPDATE( eggs );
34VIDEO_UPDATE( progolf );
35
36WRITE8_HANDLER( btime_paletteram_w );
37WRITE8_HANDLER( bnj_background_w );
38WRITE8_HANDLER( bnj_scroll1_w );
39WRITE8_HANDLER( bnj_scroll2_w );
40READ8_HANDLER( btime_mirrorvideoram_r );
41WRITE8_HANDLER( btime_mirrorvideoram_w );
42READ8_HANDLER( btime_mirrorcolorram_r );
43WRITE8_HANDLER( btime_mirrorcolorram_w );
44WRITE8_HANDLER( lnc_videoram_w );
45WRITE8_HANDLER( lnc_mirrorvideoram_w );
46WRITE8_HANDLER( deco_charram_w );
47
48WRITE8_HANDLER( zoar_video_control_w );
49WRITE8_HANDLER( btime_video_control_w );
50WRITE8_HANDLER( bnj_video_control_w );
51WRITE8_HANDLER( lnc_video_control_w );
52WRITE8_HANDLER( disco_video_control_w );
53
54INTERRUPT_GEN( lnc_sound_interrupt );
src/mame/includes/playch10.h
r0r2845
1/*----------- defined in machine/playch10.c -----------*/
2
3MACHINE_RESET( pc10 );
4DRIVER_INIT( playch10 );   /* standard games */
5DRIVER_INIT( pc_gun );   /* gun games */
6DRIVER_INIT( pc_hrz );   /* horizontal games */
7DRIVER_INIT( pcaboard );   /* a-board games */
8DRIVER_INIT( pcbboard );   /* b-board games */
9DRIVER_INIT( pccboard );   /* c-board games */
10DRIVER_INIT( pcdboard );   /* d-board games */
11DRIVER_INIT( pcdboard_2 );   /* d-board games with extra ram */
12DRIVER_INIT( pceboard );   /* e-board games */
13DRIVER_INIT( pcfboard );   /* f-board games */
14DRIVER_INIT( pcfboard_2 );   /* f-board games with extra ram */
15DRIVER_INIT( pcgboard );   /* g-board games */
16DRIVER_INIT( pcgboard_type2 ); /* g-board games with 4 screen mirror */
17DRIVER_INIT( pchboard );   /* h-board games */
18DRIVER_INIT( pciboard );   /* i-board games */
19DRIVER_INIT( pckboard );   /* k-board games */
20READ8_HANDLER( pc10_port_0_r );
21READ8_HANDLER( pc10_prot_r );
22READ8_HANDLER( pc10_detectclr_r );
23READ8_HANDLER( pc10_in0_r );
24READ8_HANDLER( pc10_in1_r );
25WRITE8_HANDLER( pc10_SDCS_w );
26WRITE8_HANDLER( pc10_CNTRLMASK_w );
27WRITE8_HANDLER( pc10_DISPMASK_w );
28WRITE8_HANDLER( pc10_SOUNDMASK_w );
29WRITE8_HANDLER( pc10_NMIENABLE_w );
30WRITE8_HANDLER( pc10_DOGDI_w );
31WRITE8_HANDLER( pc10_GAMERES_w );
32WRITE8_HANDLER( pc10_GAMESTOP_w );
33WRITE8_HANDLER( pc10_PPURES_w );
34WRITE8_HANDLER( pc10_prot_w );
35WRITE8_HANDLER( pc10_CARTSEL_w );
36WRITE8_HANDLER( pc10_in0_w );
37
38extern int pc10_nmi_enable;
39extern int pc10_dog_di;
40extern int pc10_sdcs;         /* ShareD Chip Select */
41extern int pc10_dispmask;      /* Display Mask */
42extern int pc10_int_detect;
43extern int pc10_game_mode;
44extern int pc10_dispmask_old;
45
46
47/*----------- defined in video/playch10.c -----------*/
48
49WRITE8_HANDLER( playch10_videoram_w );
50PALETTE_INIT( playch10 );
51VIDEO_START( playch10 );
52VIDEO_START( playch10_hboard );
53VIDEO_UPDATE( playch10 );
src/mame/includes/galaxian.h
r2844r2845
3434extern UINT8 galaxian_sprite_clip_end;
3535
3636PALETTE_INIT( galaxian );
37PALETTE_INIT( moonwar );
3738
3839VIDEO_START( galaxian );
3940VIDEO_UPDATE( galaxian );
r2844r2845
9899
99100/* Batman Part 2 extensions */
100101void batman2_extend_tile_info(UINT16 *code, UINT8 *color, UINT8 attrib, UINT8 x);
101void batman2_extend_sprite_info(const UINT8 *base, UINT8 *sx, UINT8 *sy, UINT8 *flipx, UINT8 *flipy, UINT16 *code, UINT8 *color);
102102
103103/* Moon Cresta extensions */
104104void mooncrst_extend_tile_info(UINT16 *code, UINT8 *color, UINT8 attrib, UINT8 x);
r2844r2845
112112void mshuttle_extend_tile_info(UINT16 *code, UINT8 *color, UINT8 attrib, UINT8 x);
113113void mshuttle_extend_sprite_info(const UINT8 *base, UINT8 *sx, UINT8 *sy, UINT8 *flipx, UINT8 *flipy, UINT16 *code, UINT8 *color);
114114
115/* Calipso extensions */
116void calipso_extend_sprite_info(const UINT8 *base, UINT8 *sx, UINT8 *sy, UINT8 *flipx, UINT8 *flipy, UINT16 *code, UINT8 *color);
117
115118/* Jumpbug extensions */
116119void jumpbug_extend_tile_info(UINT16 *code, UINT8 *color, UINT8 attrib, UINT8 x);
117120void jumpbug_extend_sprite_info(const UINT8 *base, UINT8 *sx, UINT8 *sy, UINT8 *flipx, UINT8 *flipy, UINT16 *code, UINT8 *color);
r2844r2845
120123
121124/*----------- defined in audio/galaxian.c -----------*/
122125
126extern const struct Samplesinterface galaxian_samples_interface;
123127extern const struct Samplesinterface galaxian_custom_interface;
128
124129WRITE8_HANDLER( galaxian_sound_w );
125130WRITE8_HANDLER( galaxian_pitch_w );
126131WRITE8_HANDLER( galaxian_vol_w );
src/mame/includes/gstriker.h
r2844r2845
6969#define CG10103_0_vram   (CG10103[0].vram)
7070#define CG10103_1_vram   (CG10103[1].vram)
7171
72VIDEO_UPDATE( gstriker );
73VIDEO_START( gstriker );
74VIDEO_START( twrldc94 );
75
7276#endif
src/mame/includes/flstory.h
r0r2845
1/*----------- defined in drivers/flstory.c -----------*/
2
3extern UINT8 *onna34ro_workram;
4extern UINT8 *victnine_workram;
5
6
7/*----------- defined in machine/flstory.c -----------*/
8
9READ8_HANDLER( flstory_68705_portA_r );
10WRITE8_HANDLER( flstory_68705_portA_w );
11READ8_HANDLER( flstory_68705_portB_r );
12WRITE8_HANDLER( flstory_68705_portB_w );
13READ8_HANDLER( flstory_68705_portC_r );
14WRITE8_HANDLER( flstory_68705_portC_w );
15WRITE8_HANDLER( flstory_68705_ddrA_w );
16WRITE8_HANDLER( flstory_68705_ddrB_w );
17WRITE8_HANDLER( flstory_68705_ddrC_w );
18WRITE8_HANDLER( flstory_mcu_w );
19READ8_HANDLER( flstory_mcu_r );
20READ8_HANDLER( flstory_mcu_status_r );
21WRITE8_HANDLER( onna34ro_mcu_w );
22READ8_HANDLER( onna34ro_mcu_r );
23READ8_HANDLER( onna34ro_mcu_status_r );
24WRITE8_HANDLER( victnine_mcu_w );
25READ8_HANDLER( victnine_mcu_r );
26READ8_HANDLER( victnine_mcu_status_r );
27
28
29/*----------- defined in video/flstory.c -----------*/
30
31extern UINT8 *flstory_scrlram;
32
33VIDEO_START( flstory );
34VIDEO_UPDATE( flstory );
35VIDEO_START( victnine );
36VIDEO_UPDATE( victnine );
37
38WRITE8_HANDLER( flstory_videoram_w );
39READ8_HANDLER( flstory_palette_r );
40WRITE8_HANDLER( flstory_palette_w );
41WRITE8_HANDLER( flstory_gfxctrl_w );
42WRITE8_HANDLER( flstory_scrlram_w );
43READ8_HANDLER( victnine_gfxctrl_r );
44WRITE8_HANDLER( victnine_gfxctrl_w );
src/mame/includes/slapfght.h
r0r2845
1/*----------- defined in machine/slapfght.c -----------*/
2
3MACHINE_RESET( slapfight );
4
5extern UINT8 *slapfight_dpram;
6extern size_t slapfight_dpram_size;
7WRITE8_HANDLER( slapfight_dpram_w );
8READ8_HANDLER( slapfight_dpram_r );
9
10READ8_HANDLER( slapfight_port_00_r );
11WRITE8_HANDLER( slapfight_port_00_w );
12WRITE8_HANDLER( slapfight_port_01_w );
13WRITE8_HANDLER( slapfight_port_06_w );
14WRITE8_HANDLER( slapfight_port_07_w );
15WRITE8_HANDLER( slapfight_port_08_w );
16WRITE8_HANDLER( slapfight_port_09_w );
17
18READ8_HANDLER( getstar_e803_r );
19
20READ8_HANDLER ( tigerh_68705_portA_r );
21WRITE8_HANDLER( tigerh_68705_portA_w );
22READ8_HANDLER ( tigerh_68705_portB_r );
23WRITE8_HANDLER( tigerh_68705_portB_w );
24READ8_HANDLER ( tigerh_68705_portC_r );
25WRITE8_HANDLER( tigerh_68705_portC_w );
26WRITE8_HANDLER( tigerh_68705_ddrA_w );
27WRITE8_HANDLER( tigerh_68705_ddrB_w );
28WRITE8_HANDLER( tigerh_68705_ddrC_w );
29WRITE8_HANDLER( tigerh_mcu_w );
30READ8_HANDLER ( tigerh_mcu_r );
31READ8_HANDLER ( tigerh_mcu_status_r );
32
33WRITE8_HANDLER( getstar_sh_intenable_w );
34INTERRUPT_GEN( getstar_interrupt );
35
36
37/*----------- defined in video/slapfght.c -----------*/
38
39extern UINT8 *slapfight_videoram;
40extern UINT8 *slapfight_colorram;
41extern size_t slapfight_videoram_size;
42extern UINT8 *slapfight_scrollx_lo,*slapfight_scrollx_hi,*slapfight_scrolly;
43
44VIDEO_UPDATE( slapfight );
45VIDEO_UPDATE( perfrman );
46VIDEO_START( slapfight );
47VIDEO_START( perfrman );
48
49WRITE8_HANDLER( slapfight_flipscreen_w );
50WRITE8_HANDLER( slapfight_fixram_w );
51WRITE8_HANDLER( slapfight_fixcol_w );
52WRITE8_HANDLER( slapfight_videoram_w );
53WRITE8_HANDLER( slapfight_colorram_w );
54WRITE8_HANDLER( slapfight_palette_bank_w );
src/mame/includes/irobot.h
r2844r2845
3232
3333WRITE8_HANDLER( irobot_paletteram_w );
3434
35void irobot_poly_clear(void);
35void irobot_poly_clear(running_machine *machine);
3636void irobot_run_video(void);
src/mame/includes/segag80r.h
r2844r2845
2525
2626WRITE8_HANDLER( spaceod_sound_w );
2727
28 READ8_HANDLER( monsterb_audio_8255_r );
2928
30
3129/*----------- defined in video/segag80r.c -----------*/
3230
3331#define G80_BACKGROUND_NONE         0
src/mame/includes/raiden2.h
r0r2845
1/*----------- defined in drivers/raiden2.c -----------*/
2
3WRITE16_HANDLER( sprcpt_val_1_w );
4WRITE16_HANDLER( sprcpt_val_2_w );
5WRITE16_HANDLER( sprcpt_data_1_w );
6WRITE16_HANDLER( sprcpt_data_2_w );
7WRITE16_HANDLER( sprcpt_data_3_w );
8WRITE16_HANDLER( sprcpt_data_4_w );
9WRITE16_HANDLER( sprcpt_adr_w );
10WRITE16_HANDLER( sprcpt_flags_1_w );
11WRITE16_HANDLER( sprcpt_flags_2_w );
12
13
14/*----------- defined in machine/r2crypt.c -----------*/
15
16void raiden2_decrypt_sprites(void);
src/mame/includes/dc.h
r2844r2845
9595
9696/*----------- defined in video/dc.c -----------*/
9797
98void dc_vblank( void );
98extern UINT64 *dc_texture_ram;
9999
100void dc_vblank( running_machine *machine );
101
100102READ64_HANDLER( pvr_ctrl_r );
101103WRITE64_HANDLER( pvr_ctrl_w );
102104READ64_HANDLER( pvr_ta_r );
src/mame/includes/pitnrun.h
r0r2845
1/*----------- defined in machine/pitnrun.c -----------*/
2
3WRITE8_HANDLER (pitnrun_68705_portA_w);
4WRITE8_HANDLER (pitnrun_68705_portB_w);
5
6READ8_HANDLER (pitnrun_68705_portA_r);
7READ8_HANDLER (pitnrun_68705_portB_r);
8READ8_HANDLER (pitnrun_68705_portC_r);
9
10MACHINE_RESET( pitnrun );
11
12READ8_HANDLER( pitnrun_mcu_data_r );
13READ8_HANDLER( pitnrun_mcu_status_r );
14WRITE8_HANDLER( pitnrun_mcu_data_w );
15
16
17/*----------- defined in video/pitnrun.c -----------*/
18
19extern UINT8* pitnrun_videoram2;
20
21WRITE8_HANDLER( pitnrun_videoram_w );
22WRITE8_HANDLER( pitnrun_videoram2_w );
23WRITE8_HANDLER(pitnrun_ha_w);
24WRITE8_HANDLER(pitnrun_h_heed_w);
25WRITE8_HANDLER(pitnrun_v_heed_w);
26WRITE8_HANDLER(pitnrun_color_select_w);
27WRITE8_HANDLER( pitnrun_char_bank_select );
28WRITE8_HANDLER( pitnrun_scroll_w );
29READ8_HANDLER( pitnrun_videoram_r );
30READ8_HANDLER( pitnrun_videoram2_r );
31
32PALETTE_INIT(pitnrun);
33VIDEO_START(pitnrun);
34VIDEO_UPDATE(pitnrun);
src/mame/includes/buggychl.h
r0r2845
1/*----------- defined in machine/buggychl.c -----------*/
2
3MACHINE_RESET( buggychl );
4READ8_HANDLER( buggychl_68705_portA_r );
5WRITE8_HANDLER( buggychl_68705_portA_w );
6WRITE8_HANDLER( buggychl_68705_ddrA_w );
7READ8_HANDLER( buggychl_68705_portB_r );
8WRITE8_HANDLER( buggychl_68705_portB_w );
9WRITE8_HANDLER( buggychl_68705_ddrB_w );
10READ8_HANDLER( buggychl_68705_portC_r );
11WRITE8_HANDLER( buggychl_68705_portC_w );
12WRITE8_HANDLER( buggychl_68705_ddrC_w );
13WRITE8_HANDLER( buggychl_mcu_w );
14READ8_HANDLER( buggychl_mcu_r );
15READ8_HANDLER( buggychl_mcu_status_r );
16
17
18/*----------- defined in video/buggychl.c -----------*/
19
20extern UINT8 *buggychl_scrollv,*buggychl_scrollh;
21extern UINT8 *buggychl_character_ram;
22
23PALETTE_INIT( buggychl );
24VIDEO_START( buggychl );
25WRITE8_HANDLER( buggychl_chargen_w );
26WRITE8_HANDLER( buggychl_sprite_lookup_bank_w );
27WRITE8_HANDLER( buggychl_sprite_lookup_w );
28WRITE8_HANDLER( buggychl_ctrl_w );
29WRITE8_HANDLER( buggychl_bg_scrollx_w );
30VIDEO_UPDATE( buggychl );
src/mame/includes/taito_f2.h
r2844r2845
4646READ16_HANDLER ( koshien_spritebank_r );
4747WRITE16_HANDLER( koshien_spritebank_w );
4848WRITE16_HANDLER( taitof2_sprite_extension_w );
49
50/*----------- defined in machine/cchip.c -----------*/
51
52extern UINT16 *cchip2_ram;
53READ16_HANDLER ( cchip2_word_r );
54WRITE16_HANDLER( cchip2_word_w );
55
src/mame/includes/n64.h
r2844r2845
55
66/*----------- defined in video/n64.c -----------*/
77
8extern int fb_width;
9
810extern VIDEO_START( n64 );
911extern VIDEO_UPDATE( n64 );
1012extern void rdp_process_list(void);
r2844r2845
4850extern UINT32 *rsp_imem;
4951extern UINT32 *rsp_dmem;
5052
53extern UINT32 dp_start;
54extern UINT32 dp_end;
55extern UINT32 dp_current;
56extern UINT32 dp_status;
57
58extern UINT32 n64_vi_width;
59extern UINT32 n64_vi_origin;
60extern UINT32 n64_vi_control;
61
62extern void dp_full_sync(void);
5163extern void signal_rcp_interrupt(int interrupt);
5264extern void clear_rcp_interrupt(int interrupt);
5365
src/mame/includes/stfight.h
r0r2845
1/*----------- defined in machine/stfight.c -----------*/
2
3DRIVER_INIT( empcity );
4DRIVER_INIT( stfight );
5MACHINE_RESET( stfight );
6INTERRUPT_GEN( stfight_vb_interrupt );
7READ8_HANDLER( stfight_dsw_r );
8WRITE8_HANDLER( stfight_fm_w );
9READ8_HANDLER( stfight_coin_r );
10WRITE8_HANDLER( stfight_coin_w );
11WRITE8_HANDLER( stfight_e800_w );
12READ8_HANDLER( stfight_fm_r );
13void stfight_adpcm_int( running_machine *machine, int data );
14WRITE8_HANDLER( stfight_adpcm_control_w );
15
16
17/*----------- defined in video/stfight.c -----------*/
18
19extern UINT8 *stfight_text_char_ram;
20extern UINT8 *stfight_text_attr_ram;
21extern UINT8 *stfight_vh_latch_ram;
22extern UINT8 *stfight_sprite_ram;
23
24PALETTE_INIT( stfight );
25WRITE8_HANDLER( stfight_text_char_w );
26WRITE8_HANDLER( stfight_text_attr_w );
27WRITE8_HANDLER( stfight_vh_latch_w );
28WRITE8_HANDLER( stfight_sprite_bank_w );
29VIDEO_START( stfight );
30VIDEO_UPDATE( stfight );
src/mame/includes/pgm.h
r2844r2845
1/*----------- defined in drivers/pgm.c -----------*/
2
3extern UINT16 *pgm_mainram, *pgm_bg_videoram, *pgm_tx_videoram, *pgm_videoregs, *pgm_rowscrollram;
4
5extern UINT8 *pgm_sprite_a_region;
6extern size_t   pgm_sprite_a_region_allocate;
7
8
9/*----------- defined in machine/pgmcrypt.c -----------*/
10
11
12void pgm_kov_decrypt(void);
13void pgm_kovsh_decrypt(void);
14void pgm_kov2_decrypt(void);
15void pgm_mm_decrypt(void);
16void pgm_dw2_decrypt(void);
17void pgm_djlzz_decrypt(void);
18void pgm_dw3_decrypt(void);
19void pgm_killbld_decrypt(void);
20void pgm_pstar_decrypt(void);
21void pgm_puzzli2_decrypt(void);
22
23
24/*----------- defined in machine/pgmprot.c -----------*/
25
26READ16_HANDLER (PSTARS_protram_r);
27READ16_HANDLER (PSTARS_r16);
28
29READ16_HANDLER( pgm_asic3_r );
30WRITE16_HANDLER( pgm_asic3_w );
31WRITE16_HANDLER( pgm_asic3_reg_w );
32
33READ16_HANDLER (sango_protram_r);
34READ16_HANDLER (ASIC28_r16);
35WRITE16_HANDLER (ASIC28_w16);
36
37READ16_HANDLER (dw2_d80000_r );
38
39
40/*----------- defined in machine/pgmy2ks.c -----------*/
41
42extern const UINT32 pgmy2ks[0x3c00];
43
44
45/*----------- defined in video/pgm.c -----------*/
46
47
48WRITE16_HANDLER( pgm_tx_videoram_w );
49WRITE16_HANDLER( pgm_bg_videoram_w );
50VIDEO_START( pgm );
51VIDEO_EOF( pgm );
52VIDEO_UPDATE( pgm );
1/*----------- defined in drivers/pgm.c -----------*/
2 
3extern UINT16 *pgm_mainram, *pgm_bg_videoram, *pgm_tx_videoram, *pgm_videoregs, *pgm_rowscrollram;
4 
5extern UINT8 *pgm_sprite_a_region;
6extern size_t   pgm_sprite_a_region_allocate;
7 
8 
9/*----------- defined in machine/pgmcrypt.c -----------*/
10 
11 
12void pgm_kov_decrypt(void);
13void pgm_kovsh_decrypt(void);
14void pgm_kov2_decrypt(void);
15void pgm_mm_decrypt(void);
16void pgm_dw2_decrypt(void);
17void pgm_djlzz_decrypt(void);
18void pgm_dw3_decrypt(void);
19void pgm_killbld_decrypt(void);
20void pgm_pstar_decrypt(void);
21void pgm_puzzli2_decrypt(void);
22 
23 
24/*----------- defined in machine/pgmprot.c -----------*/
25 
26READ16_HANDLER (PSTARS_protram_r);
27READ16_HANDLER ( PSTARS_r16 );
28WRITE16_HANDLER( PSTARS_w16 );
29 
30READ16_HANDLER( pgm_asic3_r );
31WRITE16_HANDLER( pgm_asic3_w );
32WRITE16_HANDLER( pgm_asic3_reg_w );
33 
34READ16_HANDLER (sango_protram_r);
35READ16_HANDLER (ASIC28_r16);
36WRITE16_HANDLER (ASIC28_w16);
37 
38READ16_HANDLER (dw2_d80000_r );
39 
40 
41/*----------- defined in machine/pgmy2ks.c -----------*/
42 
43extern const UINT32 pgmy2ks[0x3c00];
44 
45 
46/*----------- defined in video/pgm.c -----------*/
47 
48 
49WRITE16_HANDLER( pgm_tx_videoram_w );
50WRITE16_HANDLER( pgm_bg_videoram_w );
51VIDEO_START( pgm );
52VIDEO_EOF( pgm );
53VIDEO_UPDATE( pgm );
src/mame/includes/model3.h
r0r2845
1/*----------- defined in drivers/model3.c -----------*/
2
3extern UINT32 *model3_vrom;
4extern int model3_step;
5
6void model3_set_irq_line(running_machine *machine, UINT8 bit, int state);
7
8
9/*----------- defined in machine/model3.c -----------*/
10
11extern void model3_machine_init(int step);
12extern int model3_tap_read(void);
13extern void model3_tap_write(int tck, int tms, int tdi, int trst);
14extern void model3_tap_reset(void);
15extern READ32_HANDLER(rtc72421_r);
16extern WRITE32_HANDLER(rtc72421_w);
17
18
19/*----------- defined in video/model3.c -----------*/
20
21extern UINT64 *paletteram64;
22
23READ64_HANDLER(model3_char_r);
24WRITE64_HANDLER(model3_char_w);
25READ64_HANDLER(model3_tile_r);
26WRITE64_HANDLER(model3_tile_w);
27READ64_HANDLER(model3_vid_reg_r);
28WRITE64_HANDLER(model3_vid_reg_w);
29READ64_HANDLER(model3_palette_r);
30WRITE64_HANDLER(model3_palette_w);
31
32VIDEO_START(model3);
33VIDEO_UPDATE(model3);
34
35WRITE64_HANDLER(real3d_cmd_w);
36WRITE64_HANDLER(real3d_display_list_w);
37WRITE64_HANDLER(real3d_polygon_ram_w);
38void real3d_display_list_end(void);
39void real3d_display_list1_dma(UINT32 src, UINT32 dst, int length, int byteswap);
40void real3d_display_list2_dma(UINT32 src, UINT32 dst, int length, int byteswap);
41void real3d_vrom_texture_dma(UINT32 src, UINT32 dst, int length, int byteswap);
42void real3d_texture_fifo_dma(UINT32 src, int length, int byteswap);
43void real3d_polygon_ram_dma(UINT32 src, UINT32 dst, int length, int byteswap);
src/mame/includes/skullxbo.h
r2844r2845
1414VIDEO_START( skullxbo );
1515VIDEO_UPDATE( skullxbo );
1616
17void skullxbo_scanline_update(int param);
17void skullxbo_scanline_update(running_machine *machine, int param);
src/mame/includes/snes.h
r2844r2845
351351
352352/*----------- defined in machine/snes.c -----------*/
353353
354extern DRIVER_INIT( snes );
355extern DRIVER_INIT( snes_hirom );
356
354357extern MACHINE_START( snes );
355358extern MACHINE_RESET( snes );
356359
src/mame/includes/gaelco2.h
r0r2845
1/*----------- defined in machine/gaelco2.c -----------*/
2
3extern UINT16 *snowboar_protection;
4
5DRIVER_INIT( alighunt );
6DRIVER_INIT( touchgo );
7DRIVER_INIT( snowboar );
8WRITE16_HANDLER( gaelco2_coin_w );
9WRITE16_HANDLER( gaelco2_coin2_w );
10WRITE16_HANDLER( wrally2_coin_w );
11NVRAM_HANDLER( gaelco2 );
12READ16_HANDLER( gaelco2_eeprom_r );
13WRITE16_HANDLER( gaelco2_eeprom_cs_w );
14WRITE16_HANDLER( gaelco2_eeprom_sk_w );
15WRITE16_HANDLER( gaelco2_eeprom_data_w );
16READ16_HANDLER( snowboar_protection_r );
17WRITE16_HANDLER( snowboar_protection_w );
18
19/*----------- defined in video/gaelco2.c -----------*/
20
21extern UINT16 *gaelco2_vregs;
22
23WRITE16_HANDLER( gaelco2_vram_w );
24WRITE16_HANDLER( gaelco2_palette_w );
25VIDEO_UPDATE( gaelco2 );
26VIDEO_EOF( gaelco2 );
27VIDEO_START( gaelco2 );
28VIDEO_UPDATE( gaelco2_dual );
29VIDEO_START( gaelco2_dual );
src/mame/includes/matmania.h
r0r2845
1/*----------- defined in machine/maniach.c -----------*/
2
3READ8_HANDLER( maniach_68705_portA_r );
4WRITE8_HANDLER( maniach_68705_portA_w );
5READ8_HANDLER( maniach_68705_portB_r );
6WRITE8_HANDLER( maniach_68705_portB_w );
7READ8_HANDLER( maniach_68705_portC_r );
8WRITE8_HANDLER( maniach_68705_portC_w );
9WRITE8_HANDLER( maniach_68705_ddrA_w );
10WRITE8_HANDLER( maniach_68705_ddrB_w );
11WRITE8_HANDLER( maniach_68705_ddrC_w );
12WRITE8_HANDLER( maniach_mcu_w );
13READ8_HANDLER( maniach_mcu_r );
14READ8_HANDLER( maniach_mcu_status_r );
15
16
17/*----------- defined in video/matmania.c -----------*/
18
19extern UINT8 *matmania_videoram2,*matmania_colorram2;
20extern size_t matmania_videoram2_size;
21extern UINT8 *matmania_videoram3,*matmania_colorram3;
22extern size_t matmania_videoram3_size;
23extern UINT8 *matmania_scroll;
24extern UINT8 *matmania_pageselect;
25
26WRITE8_HANDLER( matmania_paletteram_w );
27PALETTE_INIT( matmania );
28VIDEO_UPDATE( maniach );
29VIDEO_START( matmania );
30VIDEO_UPDATE( matmania );
src/mame/includes/arkanoid.h
r2844r2845
2727
2828/*----------- defined in machine/arkanoid.c -----------*/
2929
30extern UINT8 arkanoid_paddle_select;
31
3032extern MACHINE_START( arkanoid );
3133extern MACHINE_RESET( arkanoid );
3234
src/mame/includes/megasys1.h
r2844r2845
181181
182182/* Functions */
183183VIDEO_START( megasys1 );
184VIDEO_UPDATE( megasys1 );
184185
186PALETTE_INIT( megasys1 );
187
188READ16_HANDLER( megasys1_vregs_C_r );
189
190WRITE16_HANDLER( megasys1_vregs_A_w );
191WRITE16_HANDLER( megasys1_vregs_C_w );
192WRITE16_HANDLER( megasys1_vregs_D_w );
193
185194WRITE16_HANDLER( megasys1_scrollram_0_w );
186195WRITE16_HANDLER( megasys1_scrollram_1_w );
187196WRITE16_HANDLER( megasys1_scrollram_2_w );
188197
189198void megasys1_set_vreg_flag(int which, int data);
190199
200
191201/*----------- defined in drivers/megasys1.c -----------*/
192202
193203void astyanax_rom_decode(int cpu);
src/mame/includes/galaxold.h
r2844r2845
1313
1414#include "machine/8255ppi.h"
1515
16/*----------- defined in video/galaxian.c -----------*/
16/*----------- defined in video/galaxold.c -----------*/
1717
1818extern UINT8 *galaxold_videoram;
1919extern UINT8 *galaxold_spriteram;
r2844r2845
2727extern size_t galaxold_spriteram_size;
2828extern size_t galaxold_spriteram2_size;
2929extern size_t galaxold_bulletsram_size;
30extern UINT8 galaxold_stars_on;
3031
3132PALETTE_INIT( galaxold );
3233PALETTE_INIT( scrambold );
33PALETTE_INIT( moonwar );
3434PALETTE_INIT( darkplnt );
3535PALETTE_INIT( rescue );
3636PALETTE_INIT( minefld );
3737PALETTE_INIT( stratgyx );
3838PALETTE_INIT( mariner );
3939PALETTE_INIT( rockclim );
40PALETTE_INIT( dambustr );
4041PALETTE_INIT( turtles );
4142
43VIDEO_START( dambustr );
44
4245WRITE8_HANDLER( galaxold_videoram_w );
4346READ8_HANDLER( galaxold_videoram_r );
4447
4548WRITE8_HANDLER( rockclim_videoram_w );
4649WRITE8_HANDLER( rockclim_scroll_w );
4750READ8_HANDLER( rockclim_videoram_r );
51WRITE8_HANDLER( dambustr_bg_split_line_w );
52WRITE8_HANDLER( dambustr_bg_color_w );
4853
4954WRITE8_HANDLER( galaxold_attributesram_w );
5055
r2844r2845
6065VIDEO_START( galaxold_plain );
6166VIDEO_START( galaxold );
6267VIDEO_START( mooncrst );
63VIDEO_START( mooncrgx );
64VIDEO_START( moonqsr );
65VIDEO_START( mshuttle );
6668VIDEO_START( pisces );
6769VIDEO_START( batman2 );
68VIDEO_START( jumpbug );
69VIDEO_START( azurian );
7070VIDEO_START( dkongjrm );
7171VIDEO_START( scrambold );
7272VIDEO_START( theend );
7373VIDEO_START( darkplnt );
7474VIDEO_START( rescue );
7575VIDEO_START( minefld );
76VIDEO_START( calipso );
7776VIDEO_START( stratgyx );
7877VIDEO_START( mimonkey );
79VIDEO_START( turtles );
80VIDEO_START( frogger );
8178VIDEO_START( mariner );
8279VIDEO_START( ckongs );
83VIDEO_START( froggers );
8480VIDEO_START( newsin7 );
85VIDEO_START( sfx );
8681VIDEO_START( rockclim );
8782VIDEO_START( drivfrcg );
8883VIDEO_START( bongo );
r2844r2845
9085VIDEO_START( racknrol );
9186VIDEO_START( ad2083 );
9287
88void galaxold_init_stars(running_machine *machine, int colors_offset);
89void galaxold_draw_stars(running_machine *machine, bitmap_t *bitmap, const rectangle *cliprect);
90
9391VIDEO_UPDATE( galaxold );
92VIDEO_UPDATE( dambustr );
9493
9594WRITE8_HANDLER( galaxold_gfxbank_w );
9695WRITE8_HANDLER( galaxold_flip_screen_x_w );
r2844r2845
9998WRITE8_HANDLER( gteikob2_flip_screen_y_w );
10099
101100
102/*----------- defined in machine/galaxian.c -----------*/
101/*----------- defined in machine/galaxold.c -----------*/
103102
104103DRIVER_INIT( zigzag );
105104DRIVER_INIT( pisces );
r2844r2845
132131READ8_HANDLER( scramblb_protection_1_r );
133132READ8_HANDLER( scramblb_protection_2_r );
134133
135READ8_HANDLER( jumpbug_protection_r );
136
137134WRITE8_HANDLER( kingball_speech_dip_w );
138135WRITE8_HANDLER( kingball_sound1_w );
139136WRITE8_HANDLER( kingball_sound2_w );
r2844r2845
156153
157154extern const ppi8255_interface scramble_ppi_ppi8255_intf[2];
158155extern const ppi8255_interface stratgyx_ppi8255_intf[2];
159extern const ppi8255_interface moonwar_ppi8255_intf[2];
160156extern const ppi8255_interface darkplnt_ppi8255_intf[2];
161157extern const ppi8255_interface scramble_ppi8255_intf[2];
162158extern const ppi8255_interface ckongs_ppi8255_intf[2];
r2844r2845
178174DRIVER_INIT( mars );
179175DRIVER_INIT( hotshock );
180176DRIVER_INIT( cavelon );
181DRIVER_INIT( moonwar );
182177DRIVER_INIT( darkplnt );
183178DRIVER_INIT( mimonkey );
184179DRIVER_INIT( mimonsco );
r2844r2845
206201WRITE8_HANDLER( hunchbks_mirror_w );
207202
208203
209
210/*----------- defined in audio/galaxian.c -----------*/
211
212extern const struct Samplesinterface galaxian_samples_interface;
213WRITE8_HANDLER( galaxian_pitch_w );
214WRITE8_HANDLER( galaxian_vol_w );
215WRITE8_HANDLER( galaxian_noise_enable_w );
216WRITE8_HANDLER( galaxian_background_enable_w );
217WRITE8_HANDLER( galaxian_shoot_enable_w );
218WRITE8_HANDLER( galaxian_lfo_freq_w );
219
220
221204/*----------- defined in audio/scramble.c -----------*/
222205
223206void scramble_sh_init(void);
src/mame/includes/gaelcrpt.h
r2844r2845
1/*----------- defined in machine/gaelcrpt.c -----------*/
2
13UINT16 gaelco_decrypt(int offset, int data, int param1, int param2);
2
src/mame/includes/lsasquad.h
r0r2845
1/*----------- defined in machine/daikaiju.c -----------*/
2
3READ8_HANDLER( daikaiju_mcu_r);
4WRITE8_HANDLER( daikaiju_mcu_w);
5READ8_HANDLER( daikaiju_mcu_status_r);
6
7MACHINE_RESET(daikaiju);
8
9
10/*----------- defined in machine/lsasquad.c -----------*/
11
12extern int lsasquad_invertcoin;
13extern int lsasquad_sound_pending;
14
15WRITE8_HANDLER( lsasquad_sh_nmi_disable_w );
16WRITE8_HANDLER( lsasquad_sh_nmi_enable_w );
17WRITE8_HANDLER( lsasquad_sound_command_w );
18READ8_HANDLER( lsasquad_sh_sound_command_r );
19WRITE8_HANDLER( lsasquad_sh_result_w );
20READ8_HANDLER( lsasquad_sound_result_r );
21READ8_HANDLER( lsasquad_sound_status_r );
22
23READ8_HANDLER( lsasquad_68705_portA_r );
24WRITE8_HANDLER( lsasquad_68705_portA_w );
25WRITE8_HANDLER( lsasquad_68705_ddrA_w );
26READ8_HANDLER( lsasquad_68705_portB_r );
27WRITE8_HANDLER( lsasquad_68705_portB_w );
28WRITE8_HANDLER( lsasquad_68705_ddrB_w );
29WRITE8_HANDLER( lsasquad_mcu_w );
30READ8_HANDLER( lsasquad_mcu_r );
31READ8_HANDLER( lsasquad_mcu_status_r );
32
33READ8_HANDLER( daikaiju_sound_status_r );
34READ8_HANDLER( daikaiju_sh_sound_command_r );
35
36
37/*----------- defined in video/lsasquad.c -----------*/
38
39extern UINT8 *lsasquad_scrollram;
40
41VIDEO_UPDATE( lsasquad );
42VIDEO_UPDATE( daikaiju );
src/mame/includes/cchip.h
r0r2845
1/*----------- defined in machine/cchip.c -----------*/
2
3extern UINT16 *cchip2_ram;
4READ16_HANDLER ( cchip2_word_r );
5WRITE16_HANDLER( cchip2_word_w );
6
7MACHINE_RESET( cchip1 );
8READ16_HANDLER( cchip1_ctrl_r );
9READ16_HANDLER( cchip1_ram_r );
10WRITE16_HANDLER( cchip1_ctrl_w );
11WRITE16_HANDLER( cchip1_bank_w );
12WRITE16_HANDLER( cchip1_ram_w );
13
14
15/*----------- defined in machine/bonzeadv.c -----------*/
16
17READ16_HANDLER( bonzeadv_cchip_ctrl_r );
18READ16_HANDLER( bonzeadv_cchip_ram_r );
19WRITE16_HANDLER( bonzeadv_cchip_ctrl_w );
20WRITE16_HANDLER( bonzeadv_cchip_bank_w );
21WRITE16_HANDLER( bonzeadv_cchip_ram_w );
22
23
24/*----------- defined in machine/opwolf.c -----------*/
25
26void opwolf_cchip_init(void);
27READ16_HANDLER( opwolf_cchip_status_r );
28READ16_HANDLER( opwolf_cchip_data_r );
29WRITE16_HANDLER( opwolf_cchip_status_w );
30WRITE16_HANDLER( opwolf_cchip_data_w );
31WRITE16_HANDLER( opwolf_cchip_bank_w );
32
33
34/*----------- defined in machine/rainbow.c -----------*/
35
36void rainbow_cchip_init(int version);
37READ16_HANDLER( rainbow_cchip_ctrl_r );
38READ16_HANDLER( rainbow_cchip_ram_r );
39WRITE16_HANDLER( rainbow_cchip_ctrl_w );
40WRITE16_HANDLER( rainbow_cchip_bank_w );
41WRITE16_HANDLER( rainbow_cchip_ram_w );
42
43
44/*----------- defined in machine/volfied.c -----------*/
45
46void volfied_cchip_init(void);
47READ16_HANDLER( volfied_cchip_ctrl_r );
48READ16_HANDLER( volfied_cchip_ram_r );
49WRITE16_HANDLER( volfied_cchip_ctrl_w );
50WRITE16_HANDLER( volfied_cchip_bank_w );
51WRITE16_HANDLER( volfied_cchip_ram_w );
src/mame/includes/genesis.h
r2844r2845
4949VIDEO_UPDATE( segac2 );
5050VIDEO_UPDATE( megaplay );
5151
52void   segac2_enable_display(int enable);
52void segac2_enable_display(running_machine *machine, int enable);
5353
54void system18_vdp_start(running_machine *machine);
55void system18_vdp_update(bitmap_t *bitmap, const rectangle *cliprect);
56
5457READ16_HANDLER ( genesis_vdp_r );
5558WRITE16_HANDLER( genesis_vdp_w );
5659
src/mame/includes/wrally.h
r0r2845
1/*----------- defined in machine/wrally.c -----------*/
2
3DRIVER_INIT( wrally );
4MACHINE_RESET( wrally );
5
6WRITE16_HANDLER( wrally_vram_w );
7WRITE16_HANDLER( wrally_flipscreen_w );
8WRITE16_HANDLER( OKIM6295_bankswitch_w );
9WRITE16_HANDLER( wrally_coin_counter_w );
10WRITE16_HANDLER( wrally_coin_lockout_w );
11
12/*----------- defined in video/wrally.c -----------*/
13
14extern tilemap *wrally_pant[2];
15
16extern UINT16 *wrally_vregs;
17extern UINT16 *wrally_videoram;
18extern UINT16 *wrally_spriteram;
19
20VIDEO_START( wrally );
21VIDEO_UPDATE( wrally );
22
src/mame/includes/ajax.h
r0r2845
1/*----------- defined in machine/ajax.c -----------*/
2
3WRITE8_HANDLER( ajax_bankswitch_2_w );
4READ8_HANDLER( ajax_ls138_f10_r );
5WRITE8_HANDLER( ajax_ls138_f10_w );
6MACHINE_RESET( ajax );
7INTERRUPT_GEN( ajax_interrupt );
8
9
10/*----------- defined in video/ajax.c -----------*/
11
12extern UINT8 ajax_priority;
13
14VIDEO_START( ajax );
15VIDEO_UPDATE( ajax );
src/mame/includes/bagman.h
r0r2845
1/*----------- defined in machine/bagman.c -----------*/
2
3READ8_HANDLER( bagman_pal16r6_r );
4MACHINE_RESET( bagman );
5WRITE8_HANDLER( bagman_pal16r6_w );
6
7
8/*----------- defined in video/bagman.c -----------*/
9
10extern UINT8 *bagman_video_enable;
11
12WRITE8_HANDLER( bagman_videoram_w );
13WRITE8_HANDLER( bagman_colorram_w );
14WRITE8_HANDLER( bagman_flipscreen_w );
15
16PALETTE_INIT( bagman );
17VIDEO_START( bagman );
18VIDEO_UPDATE( bagman );
src/mame/includes/bigevglf.h
r0r2845
1/*----------- defined in machine/bigevglf.c -----------*/
2
3READ8_HANDLER( bigevglf_68705_portA_r );
4WRITE8_HANDLER( bigevglf_68705_portA_w );
5READ8_HANDLER( bigevglf_68705_portB_r );
6WRITE8_HANDLER( bigevglf_68705_portB_w );
7READ8_HANDLER( bigevglf_68705_portC_r );
8WRITE8_HANDLER( bigevglf_68705_portC_w );
9WRITE8_HANDLER( bigevglf_68705_ddrA_w );
10WRITE8_HANDLER( bigevglf_68705_ddrB_w );
11WRITE8_HANDLER( bigevglf_68705_ddrC_w );
12
13WRITE8_HANDLER( bigevglf_mcu_w );
14READ8_HANDLER( bigevglf_mcu_r );
15READ8_HANDLER( bigevglf_mcu_status_r );
16
17
18/*----------- defined in video/bigevglf.c -----------*/
19
20extern UINT8 *bigevglf_spriteram1;
21extern UINT8 *bigevglf_spriteram2;
22
23VIDEO_START( bigevglf );
24VIDEO_UPDATE( bigevglf );
25
26READ8_HANDLER( bigevglf_vidram_r );
27WRITE8_HANDLER( bigevglf_vidram_w );
28WRITE8_HANDLER( bigevglf_vidram_addr_w );
29
30WRITE8_HANDLER( bigevglf_gfxcontrol_w );
31WRITE8_HANDLER( bigevglf_palette_w );
src/mame/mame.mak
r2844r2845
185185CPUS += ALPHA8301
186186CPUS += CDP1802
187187CPUS += COP420
188CPUS += COP421
188189CPUS += COP410
189190CPUS += TLCS90
190191CPUS += MB8841
r2844r2845
12741275$(MAMEOBJ)/subsino.a: \
12751276   $(DRIVERS)/bishjan.o \
12761277   $(DRIVERS)/lastfght.o \
1278   $(DRIVERS)/subsino.o \
12771279
12781280$(MAMEOBJ)/sun.a: \
12791281   $(DRIVERS)/arabian.o $(VIDEO)/arabian.o \
r2844r2845
15621564   $(DRIVERS)/intrscti.o \
15631565   $(DRIVERS)/istellar.o \
15641566   $(DRIVERS)/itgambl2.o \
1567   $(DRIVERS)/itgambl3.o \
15651568   $(DRIVERS)/itgamble.o \
15661569   $(DRIVERS)/jackpool.o \
15671570   $(DRIVERS)/jongkyo.o \
r2844r2845
17391742
17401743$(DRIVERS)/tetrisp2.o:   $(LAYOUT)/rocknms.lh
17411744
1745$(DRIVERS)/thayers.o:   $(LAYOUT)/dlair.lh
1746
17421747$(DRIVERS)/turbo.o:      $(LAYOUT)/turbo.lh \
17431748                  $(LAYOUT)/subroc3d.lh \
17441749                  $(LAYOUT)/buckrog.lh
src/mame/video/nycaptor.c
r2844r2845
66
77***************************************************************************/
88#include "driver.h"
9#include "includes/nycaptor.h"
910
1011#define NYCAPTOR_DEBUG   0
1112
r2844r2845
1920UINT8 *nycaptor_scrlram;
2021
2122static UINT8 *nycaptor_spriteram;
22extern UINT8 *nycaptor_sharedram;
23extern int nyc_gametype;
2423
2524/*
2625 298 (e298) - spot (0-3) , 299 (e299) - lives
src/mame/video/deco_mlc.c
r2844r2845
99*/
1010
1111#include "driver.h"
12#include "deprecat.h"
1312
1413extern int mlc_raster_table[9][256];
1514extern UINT32 mlc_clipper[32];
r2844r2845
6362}
6463#endif
6564
66static void mlc_drawgfxzoom(bitmap_t *dest_bmp,const gfx_element *gfx,
65static void mlc_drawgfxzoom(running_machine *machine,
66      bitmap_t *dest_bmp,const gfx_element *gfx,
6767      UINT32 code1,UINT32 code2, UINT32 color,int flipx,int flipy,int sx,int sy,
6868      const rectangle *clip,int transparency,int transparent_color,int use8bpp,
6969      int scalex, int scaley)
r2844r2845
9898   {
9999      if( gfx )
100100      {
101         const pen_t *pal = &Machine->pens[gfx->color_base + gfx->color_granularity * (color % gfx->total_colors)];
101         const pen_t *pal = &machine->pens[gfx->color_base + gfx->color_granularity * (color % gfx->total_colors)];
102102         int source_base1 = (code1 % gfx->total_elements) * gfx->height;
103103         int source_base2 = (code2 % gfx->total_elements) * gfx->height;
104104
r2844r2845
487487            if (rasterMode)
488488               rasterDirty=1;
489489
490            mlc_drawgfxzoom(/*rasterMode ? temp_bitmap : */bitmap,machine->gfx[0],
490            mlc_drawgfxzoom(machine,
491                        /*rasterMode ? temp_bitmap : */bitmap,machine->gfx[0],
491492                        tile,tile2,
492493                        color + colorOffset,fx,fy,xbase,ybase,
493494                        &user_clip,trans,0,
src/mame/video/bublbobl.c
r2844r2845
77***************************************************************************/
88#include "driver.h"
99#include <ctype.h>
10#include "includes/bublbobl.h"
1011
1112
1213
src/mame/video/mainsnk.c
r2844r2845
11#include "driver.h"
2#include "deprecat.h"
32
43static UINT8 bg_color,  old_bg_color;
54#define mainsnk_offset 8
r2844r2845
6463
6564}
6665
67static void update_palette( int type )
66static void update_palette( running_machine *machine, int type )
6867{
6968   if( bg_color!=old_bg_color )
7069   {
71      stuff_palette( Machine, 256+16*(bg_color&0x7), (0x11-type)*16, 16 );
70      stuff_palette( machine, 256+16*(bg_color&0x7), (0x11-type)*16, 16 );
7271      old_bg_color = bg_color;
7372   }
7473}
r2844r2845
185184   tilemap_draw(bitmap,&myclip,me_fg_tilemap,0,0);
186185   draw_status(screen->machine,bitmap,cliprect,0,0x400 );
187186   draw_status(screen->machine,bitmap,cliprect,32*8,0x40 );
188   update_palette(1);
187   update_palette(screen->machine, 1);
189188   return 0;
190189}
191190
r2844r2845
201200//  tilemap_draw(bitmap,&myclip,me_fg_tilemap,0,0);
202201//  draw_status(screen->machine,bitmap,cliprect,0,0x400 );
203202//  draw_status(screen->machine,bitmap,cliprect,32*8,0x40 );
204   update_palette(1);
203   update_palette(screen->machine, 1);
205204   return 0;
206205}
src/mame/video/stvvdp1.c
r2844r2845
1818
1919#include "driver.h"
2020#include "deprecat.h"
21#include "sound/scsp.h"
22#include "includes/stv.h"
2123
2224static int vdp1_sprite_log = 0;
2325
r2844r2845
2527static UINT32 *stv_vdp1_regs;
2628UINT8* stv_vdp1_gfx_decode;
2729
28extern UINT32 *stv_scu;
29extern int stv_vblank;
30
3130static UINT16    *stv_framebuffer[2];
3231static UINT16    **stv_framebuffer_draw_lines;
3332UINT16    **stv_framebuffer_display_lines;
r2844r2845
858857and if we skip the drawing the content could be incorrect when it reads it, although i have no idea
859858why they would want to */
860859
861extern UINT32* stv_vdp2_cram;
862
863860static UINT8* gfxdata;
864861static UINT16 sprite_colorbank;
865862
r2844r2845
17661763   }
17671764}
17681765
1769void stv_vdp1_process_list()
1766static void stv_vdp1_process_list()
17701767{
17711768   int position;
17721769   int spritecount;
src/mame/video/nbmj9195.c
r2844r2845
88******************************************************************************/
99
1010#include "driver.h"
11#include "deprecat.h"
1211
1312
1413#define   VRAM_MAX   2
r2844r2845
4241static UINT8 *nbmj9195_clut[VRAM_MAX];
4342
4443
45static void nbmj9195_vramflip(int vram);
46static void nbmj9195_gfxdraw(int vram);
44static void nbmj9195_vramflip(running_machine *machine, int vram);
45static void nbmj9195_gfxdraw(running_machine *machine, int vram);
4746
4847
4948/******************************************************************************
r2844r2845
114113   return ret;
115114}
116115
117static void nbmj9195_blitter_w(int vram, int offset, int data)
116static void nbmj9195_blitter_w(running_machine *machine, int vram, int offset, int data)
118117{
119118   int new_line;
120119
r2844r2845
128127            //  if (data & 0x20) popmessage("Unknown GFX Flag!! (0x20)");
129128               nbmj9195_flipscreen[vram] = (data & 0x40) ? 0 : 1;
130129               nbmj9195_dispflag[vram] = (data & 0x80) ? 1 : 0;
131               nbmj9195_vramflip(vram);
130               nbmj9195_vramflip(machine, vram);
132131               break;
133132      case 0x01:   nbmj9195_scrollx[vram] = (nbmj9195_scrollx[vram] & 0x0100) | data; break;
134133      case 0x02:   nbmj9195_scrollx[vram] = (nbmj9195_scrollx[vram] & 0x00ff) | ((data << 8) & 0x0100);
135               new_line = video_screen_get_vpos(Machine->primary_screen);
134               new_line = video_screen_get_vpos(machine->primary_screen);
136135               if (nbmj9195_flipscreen[vram])
137136               {
138137                  for ( ; nbmj9195_scanline[vram] < new_line; nbmj9195_scanline[vram]++)
r2844r2845
155154      case 0x0b:   blitter_destx[vram] = (blitter_destx[vram]  & 0x00ff) | (data << 8); break;
156155      case 0x0c:   blitter_desty[vram] = (blitter_desty[vram]  & 0xff00) | data; break;
157156      case 0x0d:   blitter_desty[vram] = (blitter_desty[vram]  & 0x00ff) | (data << 8);
158               nbmj9195_gfxdraw(vram);
157               nbmj9195_gfxdraw(machine, vram);
159158               break;
160159      default:   break;
161160   }
r2844r2845
180179
181180
182181******************************************************************************/
183static void nbmj9195_vramflip(int vram)
182static void nbmj9195_vramflip(running_machine *machine, int vram)
184183{
185184   static int nbmj9195_flipscreen_old[VRAM_MAX] = { 0, 0 };
186185   int x, y;
187186   UINT16 color1, color2;
188   int width = video_screen_get_width(Machine->primary_screen);
189   int height = video_screen_get_height(Machine->primary_screen);
187   int width = video_screen_get_width(machine->primary_screen);
188   int height = video_screen_get_height(machine->primary_screen);
190189
191190   if (nbmj9195_flipscreen[vram] == nbmj9195_flipscreen_old[vram]) return;
192191
r2844r2845
219218   nbmj9195_screen_refresh = 1;
220219}
221220
222static void update_pixel(int vram, int x, int y)
221static void update_pixel(running_machine *machine, int vram, int x, int y)
223222{
224   UINT16 color = nbmj9195_videoram[vram][(y * video_screen_get_width(Machine->primary_screen)) + x];
223   UINT16 color = nbmj9195_videoram[vram][(y * video_screen_get_width(machine->primary_screen)) + x];
225224   *BITMAP_ADDR16(nbmj9195_tmpbitmap[vram], y, x) = color;
226225}
227226
r2844r2845
230229   nb19010_busyflag = 1;
231230}
232231
233static void nbmj9195_gfxdraw(int vram)
232static void nbmj9195_gfxdraw(running_machine *machine, int vram)
234233{
235234   UINT8 *GFX = memory_region(REGION_GFX1);
236   int width = video_screen_get_width(Machine->primary_screen);
235   int width = video_screen_get_width(machine->primary_screen);
237236
238237   int x, y;
239238   int dx1, dx2, dy;
r2844r2845
366365         if (((color1 & 0x00ff) != 0x00ff) || (!nbmj9195_transparency[vram]))
367366         {
368367            nbmj9195_videoram[vram][(dy * width) + dx1] = color1;
369            update_pixel(vram, dx1, dy);
368            update_pixel(machine, vram, dx1, dy);
370369         }
371370         if (((color2 & 0x00ff) != 0x00ff) || (!nbmj9195_transparency[vram]))
372371         {
373372            nbmj9195_videoram[vram][(dy * width) + dx2] = color2;
374            update_pixel(vram, dx2, dy);
373            update_pixel(machine, vram, dx2, dy);
375374         }
376375
377376         nb19010_busyctr++;
r2844r2845
394393
395394
396395******************************************************************************/
397WRITE8_HANDLER( nbmj9195_blitter_0_w )   { nbmj9195_blitter_w(0, offset, data); }
398WRITE8_HANDLER( nbmj9195_blitter_1_w )   { nbmj9195_blitter_w(1, offset, data); }
396WRITE8_HANDLER( nbmj9195_blitter_0_w )   { nbmj9195_blitter_w(machine, 0, offset, data); }
397WRITE8_HANDLER( nbmj9195_blitter_1_w )   { nbmj9195_blitter_w(machine, 1, offset, data); }
399398
400399READ8_HANDLER( nbmj9195_blitter_0_r )   { return nbmj9195_blitter_r(0, offset); }
401400READ8_HANDLER( nbmj9195_blitter_1_r )   { return nbmj9195_blitter_r(1, offset); }
r2844r2845
484483      for (y = 0; y < height; y++)
485484         for (x = 0; x < width; x++)
486485         {
487            update_pixel(0, x, y);
486            update_pixel(screen->machine, 0, x, y);
488487
489488            if (gfxdraw_mode)
490               update_pixel(1, x, y);
489               update_pixel(screen->machine, 1, x, y);
491490         }
492491   }
493492
src/mame/video/simpl156.c
r2844r2845
150150   state_save_register_global_pointer(deco16_pf12_control, 0x10/2);
151151   state_save_register_global_pointer(paletteram16, 0x1000/2);
152152
153   deco16_1_video_init();
153   deco16_1_video_init(machine);
154154
155155   deco16_set_tilemap_bank_callback(0, simpl156_bank_callback);
156156   deco16_set_tilemap_bank_callback(1, simpl156_bank_callback);
src/mame/video/bking.c
r2844r2845
216216
217217READ8_HANDLER( bking_input_port_5_r )
218218{
219   return input_port_read_indexed(machine, controller ? 7 : 5);
219   return input_port_read(machine, controller ? "TRACK1_X" : "TRACK0_X");
220220}
221221
222222READ8_HANDLER( bking_input_port_6_r )
223223{
224   return input_port_read_indexed(machine, controller ? 8 : 6);
224   return input_port_read(machine, controller ? "TRACK1_Y" : "TRACK0_Y");
225225}
226226
227227READ8_HANDLER( bking_pos_r )
src/mame/video/seibuspi.c
r2844r2845
11#include "driver.h"
2#include "includes/seibuspi.h"
23
34static tilemap *text_layer;
45static tilemap *back_layer;
r2844r2845
1314static UINT32 video_dma_address;
1415
1516static int rf2_layer_bank[3];
16extern UINT32 *spimainram;
1717static UINT32 *tilemap_ram;
1818static UINT32 *palette_ram;
1919static UINT32 *sprite_ram;
src/mame/video/gaplus.c
r2844r2845
77***************************************************************************/
88
99#include "driver.h"
10#include "includes/gaplus.h"
1011
1112
1213UINT8 *gaplus_videoram;
src/mame/video/niyanpai.c
r2844r2845
77******************************************************************************/
88
99#include "driver.h"
10#include "deprecat.h"
1110
1211
1312#define   VRAM_MAX   3
r2844r2845
3433static UINT8 *niyanpai_clut[VRAM_MAX];
3534
3635
37static void niyanpai_vramflip(int vram);
38static void niyanpai_gfxdraw(int vram);
36static void niyanpai_vramflip(running_machine *machine, int vram);
37static void niyanpai_gfxdraw(running_machine *machine, int vram);
3938
4039
4140/******************************************************************************
r2844r2845
101100   return ret;
102101}
103102
104static void niyanpai_blitter_w(int vram, int offset, int data)
103static void niyanpai_blitter_w(running_machine *machine, int vram, int offset, int data)
105104{
106105   switch (offset)
107106   {
r2844r2845
113112            //  if (data & 0x20) popmessage("Unknown GFX Flag!! (0x20)");
114113               niyanpai_flipscreen[vram] = (data & 0x40) ? 0 : 1;
115114               niyanpai_dispflag[vram] = (data & 0x80) ? 1 : 0;
116               niyanpai_vramflip(vram);
115               niyanpai_vramflip(machine, vram);
117116               break;
118117      case 0x01:   niyanpai_scrollx[vram] = (niyanpai_scrollx[vram] & 0x0100) | data; break;
119118      case 0x02:   niyanpai_scrollx[vram] = (niyanpai_scrollx[vram] & 0x00ff) | ((data << 8) & 0x0100); break;
r2844r2845
128127      case 0x0b:   blitter_destx[vram] = (blitter_destx[vram]  & 0x00ff) | (data << 8); break;
129128      case 0x0c:   blitter_desty[vram] = (blitter_desty[vram]  & 0xff00) | data; break;
130129      case 0x0d:   blitter_desty[vram] = (blitter_desty[vram]  & 0x00ff) | (data << 8);
131               niyanpai_gfxdraw(vram);
130               niyanpai_gfxdraw(machine, vram);
132131               break;
133132      default:   break;
134133   }
r2844r2845
148147
149148
150149******************************************************************************/
151static void niyanpai_vramflip(int vram)
150static void niyanpai_vramflip(running_machine *machine, int vram)
152151{
153152   static int niyanpai_flipscreen_old[VRAM_MAX] = { 0, 0, 0 };
154153   int x, y;
155154   UINT16 color1, color2;
156   int width = video_screen_get_width(Machine->primary_screen);
157   int height = video_screen_get_height(Machine->primary_screen);
155   int width = video_screen_get_width(machine->primary_screen);
156   int height = video_screen_get_height(machine->primary_screen);
158157
159158   if (niyanpai_flipscreen[vram] == niyanpai_flipscreen_old[vram]) return;
160159
r2844r2845
184183   niyanpai_screen_refresh = 1;
185184}
186185
187static void update_pixel(int vram, int x, int y)
186static void update_pixel(running_machine *machine, int vram, int x, int y)
188187{
189   UINT16 color = niyanpai_videoram[vram][(y * video_screen_get_width(Machine->primary_screen)) + x];
188   UINT16 color = niyanpai_videoram[vram][(y * video_screen_get_width(machine->primary_screen)) + x];
190189   *BITMAP_ADDR16(niyanpai_tmpbitmap[vram], y, x) = color;
191190}
192191
r2844r2845
195194   nb19010_busyflag = 1;
196195}
197196
198static void niyanpai_gfxdraw(int vram)
197static void niyanpai_gfxdraw(running_machine *machine, int vram)
199198{
200199   UINT8 *GFX = memory_region(REGION_GFX1);
201   int width = video_screen_get_width(Machine->primary_screen);
200   int width = video_screen_get_width(machine->primary_screen);
202201
203202   int x, y;
204203   int dx1, dx2, dy;
r2844r2845
328327         if (((color1 & 0x00ff) != 0x00ff) || (!niyanpai_transparency[vram]))
329328         {
330329            niyanpai_videoram[vram][(dy * width) + dx1] = color1;
331            update_pixel(vram, dx1, dy);
330            update_pixel(machine, vram, dx1, dy);
332331         }
333332         if (((color2 & 0x00ff) != 0x00ff) || (!niyanpai_transparency[vram]))
334333         {
335334            niyanpai_videoram[vram][(dy * width) + dx2] = color2;
336            update_pixel(vram, dx2, dy);
335            update_pixel(machine, vram, dx2, dy);
337336         }
338337
339338         nb19010_busyctr++;
r2844r2845
354353
355354
356355******************************************************************************/
357WRITE16_HANDLER( niyanpai_blitter_0_w )   { niyanpai_blitter_w(0, offset, data); }
358WRITE16_HANDLER( niyanpai_blitter_1_w )   { niyanpai_blitter_w(1, offset, data); }
359WRITE16_HANDLER( niyanpai_blitter_2_w )   { niyanpai_blitter_w(2, offset, data); }
356WRITE16_HANDLER( niyanpai_blitter_0_w )   { niyanpai_blitter_w(machine, 0, offset, data); }
357WRITE16_HANDLER( niyanpai_blitter_1_w )   { niyanpai_blitter_w(machine, 1, offset, data); }
358WRITE16_HANDLER( niyanpai_blitter_2_w )   { niyanpai_blitter_w(machine, 2, offset, data); }
360359
361360READ16_HANDLER( niyanpai_blitter_0_r )   { return niyanpai_blitter_r(0, offset); }
362361READ16_HANDLER( niyanpai_blitter_1_r )   { return niyanpai_blitter_r(1, offset); }
r2844r2845
421420      for (y = 0; y < height; y++)
422421         for (x = 0; x < width; x++)
423422         {
424            update_pixel(0, x, y);
425            update_pixel(1, x, y);
426            update_pixel(2, x, y);
423            update_pixel(screen->machine, 0, x, y);
424            update_pixel(screen->machine, 1, x, y);
425            update_pixel(screen->machine, 2, x, y);
427426         }
428427   }
429428
src/mame/video/stvvdp2.c
r2844r2845
8383#include "eminline.h"
8484#include "profiler.h"
8585#include "deprecat.h"
86#include "includes/stv.h"
8687
8788UINT32* stv_vdp2_regs;
8889UINT32* stv_vdp2_vram;
r2844r2845
9192static UINT8*  stv_vdp2_vram_dirty_8x8x8;
9293
9394static UINT8* stv_vdp2_gfx_decode;
94extern UINT8* stv_vdp1_gfx_decode;
9595
9696static int stv_vdp2_render_rbg0;
9797
9898UINT32* stv_vdp2_cram;
99void video_update_vdp1(running_machine *machine);
100int stv_vdp1_start (running_machine *machine);
101static void stv_vdp2_dynamic_res_change(void);
102static void refresh_palette_data(void);
99static void stv_vdp2_dynamic_res_change(running_machine *machine);
100static void refresh_palette_data(running_machine *machine);
103101static int stv_vdp2_window_process(int x,int y);
104102static int stv_vdp2_apply_window_on_layer(rectangle *cliprect);
105103static void stv_vdp2_get_window0_coordinates(UINT16 *s_x, UINT16 *e_x, UINT16 *s_y, UINT16 *e_y);
r2844r2845
23572355
23582356}
23592357
2360static void stv_vdp2_drawgfxzoom( bitmap_t *dest_bmp,const gfx_element *gfx,
2358static void stv_vdp2_drawgfxzoom( running_machine *machine,
2359      bitmap_t *dest_bmp,const gfx_element *gfx,
23612360      UINT32 code,UINT32 color,int flipx,int flipy,int sx,int sy,
23622361      const rectangle *clip,int transparency,int transparent_color,int scalex, int scaley,
23632362      int sprite_screen_width, int sprite_screen_height)
r2844r2845
24132412
24142413   if( gfx )
24152414   {
2416      const pen_t *pal = &Machine->pens[gfx->color_base + gfx->color_granularity * (color % gfx->total_colors)];
2415      const pen_t *pal = &machine->pens[gfx->color_base + gfx->color_granularity * (color % gfx->total_colors)];
24172416      UINT8 *source_base = gfx->gfxdata + (code % gfx->total_elements) * gfx->char_modulo;
24182417
24192418      //int sprite_screen_height = (scaley*gfx->height+0x8000)>>16;
r2844r2845
36843683            if (stv2_current_tilemap.tile_size==1)
36853684            {
36863685               /* normal */
3687               stv_vdp2_drawgfxzoom(bitmap,machine->gfx[gfx],tilecode+0+(flipyx&1)+(flipyx&2),pal,flipyx&1,flipyx&2,drawxpos >> 16, drawypos >> 16,cliprect,stv2_current_tilemap.transparency,0,scalex,scaley,SCR_TILESIZE_X, SCR_TILESIZE_Y);
3688               stv_vdp2_drawgfxzoom(bitmap,machine->gfx[gfx],tilecode+1-(flipyx&1)+(flipyx&2),pal,flipyx&1,flipyx&2,(drawxpos+tilesizex) >> 16,drawypos >> 16,cliprect,stv2_current_tilemap.transparency,0,scalex,scaley,SCR_TILESIZE_X1(tilesizex), SCR_TILESIZE_Y);
3689               stv_vdp2_drawgfxzoom(bitmap,machine->gfx[gfx],tilecode+2+(flipyx&1)-(flipyx&2),pal,flipyx&1,flipyx&2,drawxpos >> 16,(drawypos+tilesizey) >> 16,cliprect,stv2_current_tilemap.transparency,0,scalex,scaley,SCR_TILESIZE_X, SCR_TILESIZE_Y1(tilesizey));
3690               stv_vdp2_drawgfxzoom(bitmap,machine->gfx[gfx],tilecode+3-(flipyx&1)-(flipyx&2),pal,flipyx&1,flipyx&2,(drawxpos+tilesizex)>> 16,(drawypos+tilesizey) >> 16,cliprect,stv2_current_tilemap.transparency,0,scalex,scaley,SCR_TILESIZE_X1(tilesizex), SCR_TILESIZE_Y1(tilesizey));
3686               stv_vdp2_drawgfxzoom(machine,bitmap,machine->gfx[gfx],tilecode+0+(flipyx&1)+(flipyx&2),pal,flipyx&1,flipyx&2,drawxpos >> 16, drawypos >> 16,cliprect,stv2_current_tilemap.transparency,0,scalex,scaley,SCR_TILESIZE_X, SCR_TILESIZE_Y);
3687               stv_vdp2_drawgfxzoom(machine,bitmap,machine->gfx[gfx],tilecode+1-(flipyx&1)+(flipyx&2),pal,flipyx&1,flipyx&2,(drawxpos+tilesizex) >> 16,drawypos >> 16,cliprect,stv2_current_tilemap.transparency,0,scalex,scaley,SCR_TILESIZE_X1(tilesizex), SCR_TILESIZE_Y);
3688               stv_vdp2_drawgfxzoom(machine,bitmap,machine->gfx[gfx],tilecode+2+(flipyx&1)-(flipyx&2),pal,flipyx&1,flipyx&2,drawxpos >> 16,(drawypos+tilesizey) >> 16,cliprect,stv2_current_tilemap.transparency,0,scalex,scaley,SCR_TILESIZE_X, SCR_TILESIZE_Y1(tilesizey));
3689               stv_vdp2_drawgfxzoom(machine,bitmap,machine->gfx[gfx],tilecode+3-(flipyx&1)-(flipyx&2),pal,flipyx&1,flipyx&2,(drawxpos+tilesizex)>> 16,(drawypos+tilesizey) >> 16,cliprect,stv2_current_tilemap.transparency,0,scalex,scaley,SCR_TILESIZE_X1(tilesizex), SCR_TILESIZE_Y1(tilesizey));
36913690
36923691            }
36933692            else
36943693            {
3695               stv_vdp2_drawgfxzoom(bitmap,machine->gfx[gfx],tilecode,pal,flipyx&1,flipyx&2, drawxpos >> 16, drawypos >> 16,cliprect,stv2_current_tilemap.transparency,0,scalex,scaley,SCR_TILESIZE_X,SCR_TILESIZE_Y);
3694               stv_vdp2_drawgfxzoom(machine,bitmap,machine->gfx[gfx],tilecode,pal,flipyx&1,flipyx&2, drawxpos >> 16, drawypos >> 16,cliprect,stv2_current_tilemap.transparency,0,scalex,scaley,SCR_TILESIZE_X,SCR_TILESIZE_Y);
36963695            }
36973696         }
36983697         else
r2844r2845
51455144   }
51465145}
51475146
5148static void refresh_palette_data()
5147static void refresh_palette_data(running_machine *machine)
51495148{
51505149   int r,g,b;
51515150   int c_i;
r2844r2845
51615160            b = ((stv_vdp2_cram[c_i] & 0x00ff0000) >> 16);
51625161            g = ((stv_vdp2_cram[c_i] & 0x0000ff00) >> 8);
51635162            r = ((stv_vdp2_cram[c_i] & 0x000000ff) >> 0);
5164            palette_set_color(Machine,c_i,MAKE_RGB(r,g,b));
5163            palette_set_color(machine,c_i,MAKE_RGB(r,g,b));
51655164         }
51665165         break;
51675166         /*Mode 0*/
r2844r2845
51725171            b = ((stv_vdp2_cram[c_i] & 0x00007c00) >> 10);
51735172            g = ((stv_vdp2_cram[c_i] & 0x000003e0) >> 5);
51745173            r = ((stv_vdp2_cram[c_i] & 0x0000001f) >> 0);
5175            palette_set_color_rgb(Machine,(c_i*2)+1,pal5bit(r),pal5bit(g),pal5bit(b));
5174            palette_set_color_rgb(machine,(c_i*2)+1,pal5bit(r),pal5bit(g),pal5bit(b));
51765175            b = ((stv_vdp2_cram[c_i] & 0x7c000000) >> 26);
51775176            g = ((stv_vdp2_cram[c_i] & 0x03e00000) >> 21);
51785177            r = ((stv_vdp2_cram[c_i] & 0x001f0000) >> 16);
5179            palette_set_color_rgb(Machine,c_i*2,pal5bit(r),pal5bit(g),pal5bit(b));
5178            palette_set_color_rgb(machine,c_i*2,pal5bit(r),pal5bit(g),pal5bit(b));
51805179         }
51815180         break;
51825181         /*Mode 1*/
r2844r2845
51875186            b = ((stv_vdp2_cram[c_i] & 0x00007c00) >> 10);
51885187            g = ((stv_vdp2_cram[c_i] & 0x000003e0) >> 5);
51895188            r = ((stv_vdp2_cram[c_i] & 0x0000001f) >> 0);
5190            palette_set_color_rgb(Machine,(c_i*2)+1,pal5bit(r),pal5bit(g),pal5bit(b));
5189            palette_set_color_rgb(machine,(c_i*2)+1,pal5bit(r),pal5bit(g),pal5bit(b));
51915190            b = ((stv_vdp2_cram[c_i] & 0x7c000000) >> 26);
51925191            g = ((stv_vdp2_cram[c_i] & 0x03e00000) >> 21);
51935192            r = ((stv_vdp2_cram[c_i] & 0x001f0000) >> 16);
5194            palette_set_color_rgb(Machine,c_i*2,pal5bit(r),pal5bit(g),pal5bit(b));
5193            palette_set_color_rgb(machine,c_i*2,pal5bit(r),pal5bit(g),pal5bit(b));
51955194         }
51965195         break;
51975196      }
r2844r2845
52115210   if(old_crmd != STV_VDP2_CRMD)
52125211   {
52135212      old_crmd = STV_VDP2_CRMD;
5214      refresh_palette_data();
5213      refresh_palette_data(machine);
52155214   }
52165215}
52175216
5218extern int stv_vblank,stv_hblank;
52195217READ32_HANDLER ( stv_vdp2_regs_r )
52205218{
52215219//  if (offset!=1) if(LOG_VDP2) logerror ("VDP2: Read from Registers, Offset %04x\n",offset);
r2844r2845
52615259   stv_rbg_cache_data.is_cache_dirty = 3;
52625260   memset( &stv_vdp2_layer_data_placement, 0, sizeof(stv_vdp2_layer_data_placement));
52635261
5264   refresh_palette_data();
5262   refresh_palette_data(Machine);
52655263}
52665264
52675265static int stv_vdp2_start (running_machine *machine)
r2844r2845
53045302   debug.roz = 0;
53055303}
53065304
5307static void stv_vdp2_dynamic_res_change()
5305static void stv_vdp2_dynamic_res_change(running_machine *machine)
53085306{
53095307   static UINT16 horz,vert;
53105308
r2844r2845
53365334      case 7: horz = 704; vert = 480; break;
53375335   }
53385336
5339   video_screen_set_visarea(Machine->primary_screen, 0*8, horz-1,0*8, vert-1);
5337   video_screen_set_visarea(machine->primary_screen, 0*8, horz-1,0*8, vert-1);
53405338   //if(LOG_VDP2) popmessage("%04d %04d",horz-1,vert-1);
53415339}
53425340
r2844r2845
56195617}
56205618
56215619/* VDP1 Framebuffer handling */
5622extern UINT16   **stv_framebuffer_display_lines;
5623extern int       stv_framebuffer_width;
5624extern int       stv_framebuffer_height;
5625extern int       stv_framebuffer_double_interlace;
5626extern int       stv_framebuffer_mode;
5627
56285620static int      stv_sprite_priorities_used[8];
56295621static int      stv_sprite_priorities_usage_valid;
56305622static UINT8   stv_sprite_priorities_in_fb_line[512][8];
r2844r2845
60646056   stv_sprite_priorities_usage_valid = 1;
60656057}
60666058
6067extern UINT32 *stv_vdp1_vram;
6068
60696059VIDEO_UPDATE( stv_vdp2 )
60706060{
60716061   static UINT8 pri;
60726062
6073   stv_vdp2_dynamic_res_change();
6063   stv_vdp2_dynamic_res_change(screen->machine);
60746064
60756065   video_update_vdp1(screen->machine);
60766066
src/mame/video/suprnova.c
r2844r2845
1515*/
1616
1717#include "driver.h"
18#include "deprecat.h"
1819
1920static bitmap_t *sprite_bitmap;
2021
22static bitmap_t *tilemap_bitmap_lower;
23static bitmap_t *tilemap_bitmapflags_lower;
2124
25static bitmap_t *tilemap_bitmap_higher;
26static bitmap_t *tilemap_bitmapflags_higher;
27
28
29/* draws ROZ with linescroll OR columnscroll to 16-bit indexed bitmap */
30static void suprnova_draw_roz(bitmap_t* bitmap, bitmap_t* bitmapflags, const rectangle *cliprect, tilemap *tmap, UINT32 startx, UINT32 starty, int incxx, int incxy, int incyx, int incyy, int wraparound, int columnscroll, UINT32* scrollram)
31{
32//  const pen_t *clut = &Machine->pens[0];
33   //bitmap_t *destbitmap = bitmap;
34   bitmap_t *srcbitmap = tilemap_get_pixmap(tmap);
35   bitmap_t *srcbitmapflags = tilemap_get_flagsmap(tmap);
36   const int xmask = srcbitmap->width-1;
37   const int ymask = srcbitmap->height-1;
38   const int widthshifted = srcbitmap->width << 16;
39   const int heightshifted = srcbitmap->height << 16;
40   UINT32 cx;
41   UINT32 cy;
42   int x;
43   int sx;
44   int sy;
45   int ex;
46   int ey;
47   UINT16 *dest;
48   UINT8* destflags;
49//  UINT8 *pri;
50   //const UINT16 *src;
51   //const UINT8 *maskptr;
52   //int destadvance = destbitmap->bpp / 8;
53
54   /* pre-advance based on the cliprect */
55   startx += cliprect->min_x * incxx + cliprect->min_y * incyx;
56   starty += cliprect->min_x * incxy + cliprect->min_y * incyy;
57
58   /* extract start/end points */
59   sx = cliprect->min_x;
60   sy = cliprect->min_y;
61   ex = cliprect->max_x;
62   ey = cliprect->max_y;
63
64   {
65      /* loop over rows */
66      while (sy <= ey)
67      {
68
69         /* initialize X counters */
70         x = sx;
71         cx = startx;
72         cy = starty;
73
74         /* get dest and priority pointers */
75         dest = BITMAP_ADDR16( bitmap, sy, sx);
76         destflags = BITMAP_ADDR8( bitmapflags, sy, sx);
77
78         /* loop over columns */
79         while (x <= ex)
80         {
81            if ((wraparound) || (cx < widthshifted && cy < heightshifted)) // not sure how this will cope with no wraparound, but row/col scroll..
82            {
83               if (columnscroll)
84               {
85                  dest[0] = BITMAP_ADDR16(srcbitmap, ((cy >> 16) - scrollram[(cx>>16)&0x3ff]) & ymask, (cx >> 16) & xmask)[0];
86                  destflags[0] = BITMAP_ADDR8(srcbitmapflags, ((cy >> 16) - scrollram[(cx>>16)&0x3ff]) & ymask, (cx >> 16) & xmask)[0];
87               }
88               else
89               {
90                  dest[0] = BITMAP_ADDR16(srcbitmap, (cy >> 16) & ymask, ((cx >> 16) - scrollram[(cy>>16)&0x3ff]) & xmask)[0];
91                  destflags[0] = BITMAP_ADDR8(srcbitmapflags, (cy >> 16) & ymask, ((cx >> 16) - scrollram[(cy>>16)&0x3ff]) & xmask)[0];
92               }
93            }
94
95            /* advance in X */
96            cx += incxx;
97            cy += incxy;
98            x++;
99            dest++;
100            destflags++;
101//              pri++;
102         }
103
104         /* advance in Y */
105         startx += incyx;
106         starty += incyy;
107         sy++;
108      }
109   }
110}
111
112
22113#define SUPRNOVA_DECODE_BUFFER_SIZE 0x2000
23114
24115extern UINT32 *skns_tilemapA_ram, *skns_tilemapB_ram, *skns_v3slc_ram;
r2844r2845
33124static int old_depthB=0, depthB=0;
34125
35126static int sprite_kludge_x=0, sprite_kludge_y=0;
36static int use_spc_bright, use_v3_bright;
127static int use_spc_bright = 1, use_v3_bright = 1; // makes sarukani rather dark, but should be default..
37128static UINT8 bright_spc_b=0x00, bright_spc_g=0x00, bright_spc_r=0x00;
38129
39130static UINT8 bright_spc_b_trans=0x00, bright_spc_g_trans=0x00, bright_spc_r_trans=0x00;
40131
41132
42133static UINT8 bright_v3_b=0x00,  bright_v3_g=0x00,  bright_v3_r=0x00;
134static UINT8 bright_v3_b_trans = 0x00, bright_v3_g_trans = 0x00, bright_v3_r_trans = 0x00;
43135
44
45136// This ignores the alpha values atm.
46137static int spc_changed=0, v3_changed=0, palette_updated=0;
138int suprnova_alt_enable_background = 1, suprnova_alt_enable_sprites = 1;
47139
48140WRITE32_HANDLER ( skns_pal_regs_w )
49141{
r2844r2845
52144
53145   switch ( offset )
54146   {
147   /* RWRA regs are for SPRITES */
148
55149   case (0x00/4): // RWRA0
56150      if( use_spc_bright != (data&1) ) {
57151         use_spc_bright = data&1;
58152         spc_changed = 1;
59153      }
154      suprnova_alt_enable_sprites = (data>>8)&1;
155
156
60157      break;
61158   case (0x04/4): // RWRA1
62159      if( bright_spc_g != (data&0xff) ) {
r2844r2845
85182
86183      break;
87184
185   /* RWRB regs are for BACKGROUND */
186
88187   case (0x10/4): // RWRB0
89188      if( use_v3_bright != (data&1) ) {
90189         use_v3_bright = data&1;
91190         v3_changed = 1;
92191      }
192
193      suprnova_alt_enable_background = (data>>8)&1;
194
93195      break;
94196   case (0x14/4): // RWRB1
95197      if( bright_v3_g != (data&0xff) ) {
96198         bright_v3_g = data&0xff;
97199         v3_changed = 1;
98200      }
201
202      bright_v3_g_trans = (data>>8)&0xff;
203
99204      break;
100205   case (0x18/4): // RWRB2
101206      if( bright_v3_r != (data&0xff) ) {
102207         bright_v3_r = data&0xff;
103208         v3_changed = 1;
104209      }
210
211      bright_v3_r_trans = (data>>8)&0xff;
212
105213      break;
106214   case (0x1C/4): // RWRB3
107215      if( bright_v3_b != (data&0xff) ) {
108216         bright_v3_b = data&0xff;
109217         v3_changed = 1;
110218      }
219
220      bright_v3_b_trans = (data>>8)&0xff;
221
111222      break;
112223   }
113224}
r2844r2845
438549
439550   /* sprite ram start / end is not really fixed registers change it */
440551
441   UINT32 *source = buffered_spriteram32;
552   //printf ("addr %08x\n", (skns_spc_regs[0x14/4]));
553
554
555   UINT32 *source = spriteram32;
442556   UINT32 *finish = source + spriteram_size/4;
443557
444558   int group_x_offset[4];
r2844r2845
452566   int xsize,ysize, size, xpos=0,ypos=0, pri=0, romoffset, colour=0, xflip,yflip, joint;
453567   int sx,sy;
454568   int endromoffs=0, gfxlen;
569   int grow;
455570   UINT16 zoomx, zoomy;
456571
457572
458   if (!disabled){
573   if ((!disabled) && suprnova_alt_enable_sprites){
459574
460575      group_enable    = (skns_spc_regs[0x00/4] & 0x0040) >> 6; // RWR0
461576
r2844r2845
588703            romoffset = endromoffs;
589704         }
590705
591         zoomx = source[2] >> 16;
592         zoomy = source[3] >> 16;
706         grow = (source[0]>>23) & 1;
593707
708         if (!grow)
709         {
710            zoomx = (source[2] >> 16)&0xfcfc;
711            zoomy = (source[3] >> 16)&0xfcfc;
712         }
713         else
714         {
715            // the bad sprites in sengekis all have this not set..
716            // we need to handle sprite shrink properly
717            zoomx = 0;
718            zoomy = 0;
719         }
720
721
594722         romoffset &= gfxlen-1;
595723
596724         endromoffs = skns_rle_decode ( romoffset, size );
597725
726         // in Cyvern
727
728         //  train in tunnel pri = 0x00
729         //  nothing?         = 0x01
730         //  players etc. pri = 0x02
731         //  pickups etc. pri = 0x03
732
598733         // PriTest
599734//          if(!( (keyboard_pressed(KEYCODE_Q)&&(pri==0)) || (keyboard_pressed(KEYCODE_W)&&(pri==1)) || (keyboard_pressed(KEYCODE_E)&&(pri==2)) || (keyboard_pressed(KEYCODE_D)&&(pri==3)) ))
600735//          if( !(keyboard_pressed(KEYCODE_Q) && ((source[0] & 0x00800000)>>24)) )
736
737
738
601739         {
602            int NewColour = colour*256;
740            int NewColour = (colour<<8) | (pri << 14);
603741
604742            if(zoomx || zoomy)
605743            {
r2844r2845
703841{
704842   int code = ((skns_tilemapA_ram[tile_index] & 0x001fffff) >> 0 );
705843   int colr = ((skns_tilemapA_ram[tile_index] & 0x3f000000) >> 24 );
706//  int pri  = ((skns_tilemapA_ram[tile_index] & 0x00e00000) >> 21 );
844   int pri  = ((skns_tilemapA_ram[tile_index] & 0x00e00000) >> 21 );
707845   int depth = (skns_v3_regs[0x0c/4] & 0x0001) << 1;
708846   int flags = 0;
709847
r2844r2845
715853         code,
716854         0x40+colr,
717855         flags);
718//  tileinfo->category = pri;
856   tileinfo->category = pri;
857
858   //if (pri) popmessage("pri A!! %02x\n", pri);
719859}
720860
721861WRITE32_HANDLER ( skns_tilemapA_w )
r2844r2845
728868{
729869   int code = ((skns_tilemapB_ram[tile_index] & 0x001fffff) >> 0 );
730870   int colr = ((skns_tilemapB_ram[tile_index] & 0x3f000000) >> 24 );
731//  int pri  = ((skns_tilemapA_ram[tile_index] & 0x00e00000) >> 21 );
871   int pri  = ((skns_tilemapB_ram[tile_index] & 0x00e00000) >> 21 );
732872   int depth = (skns_v3_regs[0x0c/4] & 0x0100) >> 7;
733873   int flags = 0;
734874
r2844r2845
740880         code,
741881         0x40+colr,
742882         flags);
743//  tileinfo->category = pri;
883   tileinfo->category = pri;
884
885   //if (pri) popmessage("pri B!! %02x\n", pri); // 02 on cyvern
744886}
745887
746888WRITE32_HANDLER ( skns_tilemapB_w )
r2844r2845
779921
780922   sprite_bitmap = auto_bitmap_alloc(1024,1024,BITMAP_FORMAT_INDEXED16);
781923
924   tilemap_bitmap_lower = auto_bitmap_alloc(320,240,BITMAP_FORMAT_INDEXED16);
925   tilemap_bitmapflags_lower = auto_bitmap_alloc(320,240,BITMAP_FORMAT_INDEXED8);
782926
927   tilemap_bitmap_higher = auto_bitmap_alloc(320,240,BITMAP_FORMAT_INDEXED16);
928   tilemap_bitmapflags_higher = auto_bitmap_alloc(320,240,BITMAP_FORMAT_INDEXED8);
929
783930   machine->gfx[2]->color_granularity=256;
784931   machine->gfx[3]->color_granularity=256;
785932}
786933
787static void supernova_draw_a( bitmap_t *bitmap, const rectangle *cliprect, int tran )
934static void supernova_draw_a( bitmap_t *bitmap, bitmap_t* bitmap_flags, const rectangle *cliprect, int tran )
788935{
789      int enable_a  = (skns_v3_regs[0x10/4] >> 0) & 0x0001;
936   int enable_a  = (skns_v3_regs[0x10/4] >> 0) & 0x0001;
937   int nowrap_a = (skns_v3_regs[0x10/4] >> 0) & 0x0004;
938
939
790940   UINT32 startx,starty;
791941   int incxx,incxy,incyx,incyy;
942   int columnscroll;
792943
793   if (enable_a)
944   //if(nowrap_a) printf("a\n");
945
946   if (enable_a && suprnova_alt_enable_background)
794947   {
795948      startx = skns_v3_regs[0x1c/4];
796         incyy  = skns_v3_regs[0x30/4]; // was xx, changed for sarukani
949      incyy  = skns_v3_regs[0x30/4]; // was xx, changed for sarukani
797950      incyx  = skns_v3_regs[0x2c/4];
798951      starty = skns_v3_regs[0x20/4];
799952      incxy  = skns_v3_regs[0x28/4];
800         incxx  = skns_v3_regs[0x24/4]; // was yy, changed for sarukani
953      incxx  = skns_v3_regs[0x24/4]; // was yy, changed for sarukani
801954
802      if( (incxx == 1<<8) && !incxy & !incyx && (incyy == 1<<8) ) // No Roz, only scroll.
803      {
804         int columnscroll_a = (skns_v3_regs[0x0c/4] >> 1) & 0x0001;
805         int offs;
955      columnscroll = (skns_v3_regs[0x0c/4] >> 1) & 0x0001;
806956
807         startx >>= 8; // Lose Floating point
808         starty >>= 8;
809
810         if(columnscroll_a) {
811            tilemap_set_scroll_rows(skns_tilemap_A,1);
812            tilemap_set_scroll_cols(skns_tilemap_A,0x400);
813
814            tilemap_set_scrollx( skns_tilemap_A, 0, startx );
815            for(offs=0; offs<(0x1000/4); offs++)
816               tilemap_set_scrolly( skns_tilemap_A, offs, starty - (skns_v3slc_ram[offs]&0x3ff) );
817         }
818         else
819         {
820            tilemap_set_scroll_rows(skns_tilemap_A,0x400);
821            tilemap_set_scroll_cols(skns_tilemap_A,1);
822
823            tilemap_set_scrolly( skns_tilemap_A, 0, starty );
824            for(offs=0; offs<(0x1000/4); offs++)
825               tilemap_set_scrollx( skns_tilemap_A, offs, startx - (skns_v3slc_ram[offs]&0x3ff) );
826         }
827            tilemap_draw(bitmap,cliprect,skns_tilemap_A,tran ? 0 : TILEMAP_DRAW_OPAQUE,0);
828      }
829      else
830      {
831         tilemap_draw_roz(bitmap,cliprect,skns_tilemap_A,startx << 8,starty << 8,
832               incxx << 8,incxy << 8,incyx << 8,incyy << 8,
833               1,   /* wraparound */
834                  tran ? 0 : TILEMAP_DRAW_OPAQUE,0);
835      }
957      suprnova_draw_roz(bitmap,bitmap_flags,cliprect, skns_tilemap_A, startx << 8,starty << 8,   incxx << 8,incxy << 8,incyx << 8,incyy << 8, !nowrap_a, columnscroll, &skns_v3slc_ram[0]);
958      //tilemap_copy_bitmap(bitmap, tilemap_bitmap_lower, tilemap_bitmapflags_lower);
836959   }
837960}
838961
839static void supernova_draw_b( bitmap_t *bitmap, const rectangle *cliprect, int tran )
962static void supernova_draw_b( bitmap_t *bitmap, bitmap_t* bitmap_flags, const rectangle *cliprect, int tran )
840963{
841      int enable_b  = (skns_v3_regs[0x34/4] >> 0) & 0x0001;
964   int enable_b  = (skns_v3_regs[0x34/4] >> 0) & 0x0001;
965   int nowrap_b = (skns_v3_regs[0x34/4] >> 0) & 0x0004;
966
967
842968   UINT32 startx,starty;
843969   int incxx,incxy,incyx,incyy;
970   int columnscroll;
844971
845   if (enable_b)
972   //if(nowrap_b) printf("b\n");
973
974   if (enable_b && suprnova_alt_enable_background)
846975   {
847976      startx = skns_v3_regs[0x40/4];
848         incyy  = skns_v3_regs[0x54/4];
977      incyy  = skns_v3_regs[0x54/4];
849978      incyx  = skns_v3_regs[0x50/4];
850979      starty = skns_v3_regs[0x44/4];
851980      incxy  = skns_v3_regs[0x4c/4];
852         incxx  = skns_v3_regs[0x48/4];
853
854      if( (incxx == 1<<8) && !incxy & !incyx && (incyy == 1<<8) ) // No Roz, only scroll.
855      {
856         int columnscroll_b = (skns_v3_regs[0x0c/4] >> 9) & 0x0001;
857         int offs;
858
859         startx >>= 8;
860         starty >>= 8;
861
862         if(columnscroll_b) {
863            tilemap_set_scroll_rows(skns_tilemap_B,1);
864            tilemap_set_scroll_cols(skns_tilemap_B,0x400);
865
866            tilemap_set_scrollx( skns_tilemap_B, 0, startx );
867            for(offs=0; offs<(0x1000/4); offs++)
868               tilemap_set_scrolly( skns_tilemap_B, offs, starty - (skns_v3slc_ram[offs+(0x1000/4)]&0x3ff) );
869         }
870         else
871         {
872            tilemap_set_scroll_rows(skns_tilemap_B,0x400);
873            tilemap_set_scroll_cols(skns_tilemap_B,1);
874
875            tilemap_set_scrolly( skns_tilemap_B, 0, starty );
876            for(offs=0; offs<(0x1000/4); offs++)
877               tilemap_set_scrollx( skns_tilemap_B, offs, startx - (skns_v3slc_ram[offs+(0x1000/4)]&0x3ff) );
878         }
879            tilemap_draw(bitmap,cliprect,skns_tilemap_B,tran ? 0 : TILEMAP_DRAW_OPAQUE,0);
880      }
881      else
882      {
883         tilemap_draw_roz(bitmap,cliprect,skns_tilemap_B,startx << 8,starty << 8,
884               incxx << 8,incxy << 8,incyx << 8,incyy << 8,
885               1,   /* wraparound */
886                  tran ? 0 : TILEMAP_DRAW_OPAQUE,0);
887      }
981      incxx  = skns_v3_regs[0x48/4];
982      columnscroll = (skns_v3_regs[0x0c/4] >> 9) & 0x0001; // selects column scroll or rowscroll
983      suprnova_draw_roz(bitmap,bitmap_flags, cliprect, skns_tilemap_B, startx << 8,starty << 8,   incxx << 8,incxy << 8,incyx << 8,incyy << 8, !nowrap_b, columnscroll, &skns_v3slc_ram[0x1000/4]);
888984   }
889985}
890986
r2844r2845
9521048   }
9531049
9541050   fillbitmap(bitmap, get_black_pen(screen->machine), cliprect);
1051   fillbitmap(tilemap_bitmap_lower, 0, NULL);
1052   fillbitmap(tilemap_bitmapflags_lower, 0, NULL);
1053   fillbitmap(tilemap_bitmap_higher, 0, NULL);
1054   fillbitmap(tilemap_bitmapflags_higher, 0, NULL);
9551055
9561056   {
9571057      int supernova_pri_a;
9581058      int supernova_pri_b;
9591059      int tran = 0;
9601060
961      supernova_pri_a = skns_v3_regs[0x10/4] & 0x0002;
962      supernova_pri_b = skns_v3_regs[0x34/4] & 0x0002;
1061      supernova_pri_a = (skns_v3_regs[0x10/4] & 0x0002)>>1;
1062      supernova_pri_b = (skns_v3_regs[0x34/4] & 0x0002)>>1;
9631063
1064      //popmessage("pri %d %d\n", supernova_pri_a, supernova_pri_b);
9641065
965      /* needed until we have the per tile priorities sorted out */
966      if (!strcmp(screen->machine->gamedrv->name,"vblokbrk") ||
967         !strcmp(screen->machine->gamedrv->name,"sarukani") ||
968         !strcmp(screen->machine->gamedrv->name,"sengekis") ||
969         !strcmp(screen->machine->gamedrv->name,"sengekij"))
1066      /*if (!supernova_pri_b) { */
1067      supernova_draw_b(tilemap_bitmap_lower, tilemap_bitmapflags_lower, cliprect,tran);// tran = 1;
1068      supernova_draw_a(tilemap_bitmap_higher,tilemap_bitmapflags_higher,cliprect,tran);// tran = 1;
1069
9701070      {
971         supernova_pri_b = 0;
972         supernova_pri_a = 1;
973      }
1071         int x,y;
1072         UINT8* srcflags, *src2flags;
1073         UINT16* src, *src2, *src3;
1074         UINT32* dst;
1075         UINT16 pri, pri2, pri3;
1076         UINT16 bgpri;
1077         const pen_t *clut = &Machine->pens[0];
1078//          int drawpri;
9741079
9751080
976      if (!supernova_pri_a) { supernova_draw_a(bitmap,cliprect,tran); tran = 1;}
977      if (!supernova_pri_b) { supernova_draw_b(bitmap,cliprect,tran); tran = 1;}
978      if (supernova_pri_a) { supernova_draw_a(bitmap,cliprect,tran); tran = 1;}
979      if (supernova_pri_b) { supernova_draw_b(bitmap,cliprect,tran); tran = 1;}
1081         for (y=0;y<240;y++)
1082         {
1083            src = BITMAP_ADDR16(tilemap_bitmap_lower, y, 0);
1084            srcflags = BITMAP_ADDR8(tilemap_bitmapflags_lower, y, 0);
9801085
1086            src2 = BITMAP_ADDR16(tilemap_bitmap_higher, y, 0);
1087            src2flags = BITMAP_ADDR8(tilemap_bitmapflags_higher, y, 0);
9811088
982   }
1089            src3 = BITMAP_ADDR16(sprite_bitmap, y, 0);
9831090
984   fillbitmap(sprite_bitmap, 0x0000, cliprect);
985   skns_draw_sprites(screen->machine, sprite_bitmap, cliprect);
1091            dst = BITMAP_ADDR32(bitmap, y, 0);
9861092
987   {
988      int x,y;
989      const pen_t *paldata = screen->machine->pens;
9901093
991      for (y=0;y<240;y++)
992      {
993         UINT16* src;
994         UINT32* dst;
1094            for (x=0;x<320;x++)
1095            {
1096               UINT16 pendata  = src[x]&0x7fff;
1097               UINT16 pendata2 = src2[x]&0x7fff;
1098               UINT16 bgpendata;
1099               UINT16 pendata3 = src3[x]&0x3fff;
9951100
996         src = BITMAP_ADDR16(sprite_bitmap,y,0);
997         dst = BITMAP_ADDR32(bitmap,y,0);
1101               UINT32 coldat;
9981102
999         for (x=0;x<320;x++)
1000         {
1001            UINT16 pen = src[x]&0x7fff;
1002            UINT16 palvalue = skns_palette_ram[pen];
1103               pri = ((srcflags[x] & 0x07)<<1) | (supernova_pri_b);
1104               pri2= ((src2flags[x] & 0x07)<<1) | (supernova_pri_a);
1105               pri3 = ((src3[x]&0xc000)>>12)+3;
10031106
1004            if (palvalue&0x8000)
1005            {
1006               UINT32 srccolour = dst[x];
1007               UINT32 dstcolour = paldata[pen];
1107               // work out which layers bg pixel has the higher priority
1108               //  note, can the bg layers be blended?? sarukani uses an alpha pen for
1109               //        some of them.. and registers indicate it might be possible..
10081110
1009               int r,g,b;
1010               int r2,g2,b2;
1111               // this priority mixing is almost certainly still incorrect
1112               // bg colour / prioirty handling is now wrong
10111113
1012               r = (srccolour & 0x000000ff)>> 0;
1013               g = (srccolour & 0x0000ff00)>> 8;
1014               b = (srccolour & 0x00ff0000)>> 16;
1114               if (pri<=pri2) // <= is good for last level of cyvern.. < seem better for galpanis kaneko logo
1115               {
1116                  if (pendata2&0xff)
1117                  {
1118                     bgpendata = pendata2&0x7fff;
1119                     bgpri = pri2;
1120                  }
1121                  else if (pendata&0xff)
1122                  {
1123                     bgpendata = pendata&0x7fff;
1124                     bgpri = pri;
1125                  }
1126                  else
1127                  {
1128                     bgpendata = 0;
1129                     bgpri = 0;;
1130                  }
1131               }
1132               else
1133               {
1134                  if (pendata&0xff)
1135                  {
1136                     bgpendata = pendata&0x7fff;
1137                     bgpri = pri;
1138                  }
1139                  else if (pendata2&0xff)
1140                  {
1141                     bgpendata = pendata2&0x7fff;
1142                     bgpri = pri2;
1143                  }
1144                  else
1145                  {
1146                     bgpendata = 0;
1147                     bgpri = 0;;
1148                  }
1149               }
10151150
1016               r2 = (dstcolour & 0x000000ff)>> 0;
1017               g2 = (dstcolour & 0x0000ff00)>> 8;
1018               b2 = (dstcolour & 0x00ff0000)>> 16;
1151               // if the sprites are higher than the bg pixel
1152               if (pri3 > bgpri)
1153               {
10191154
1020               r2 = (r2 * bright_spc_r_trans) >> 8;
1021               g2 = (g2 * bright_spc_g_trans) >> 8;
1022               b2 = (b2 * bright_spc_b_trans) >> 8;
1155                  if (pendata3&0xff)
1156                  {
10231157
1024               r = (r+r2);
1025               if (r>255) r = 255;
1158                     UINT16 palvalue = skns_palette_ram[pendata3];
10261159
1027               g = (g+g2);
1028               if (g>255) g = 255;
1160                     coldat = clut[pendata3];
10291161
1030               b = (b+b2);
1031               if (b>255) b = 255;
1162                     if (palvalue&0x8000)
1163                     {
1164                        UINT32 srccolour = clut[bgpendata&0x7fff];
1165                        UINT32 dstcolour = clut[pendata3&0x3fff];
10321166
1033               if (pen) dst[x] = (r << 0) | (g << 8) | (b << 16);
1167                        int r,g,b;
1168                        int r2,g2,b2;
10341169
1170                        r = (srccolour & 0x000000ff)>> 0;
1171                        g = (srccolour & 0x0000ff00)>> 8;
1172                        b = (srccolour & 0x00ff0000)>> 16;
1173
1174                        r2 = (dstcolour & 0x000000ff)>> 0;
1175                        g2 = (dstcolour & 0x0000ff00)>> 8;
1176                        b2 = (dstcolour & 0x00ff0000)>> 16;
1177
1178                        r2 = (r2 * bright_spc_r_trans) >> 8;
1179                        g2 = (g2 * bright_spc_g_trans) >> 8;
1180                        b2 = (b2 * bright_spc_b_trans) >> 8;
1181
1182                        r = (r+r2);
1183                        if (r>255) r = 255;
1184
1185                        g = (g+g2);
1186                        if (g>255) g = 255;
1187
1188                        b = (b+b2);
1189                        if (b>255) b = 255;
1190
1191                        dst[x] = (r << 0) | (g << 8) | (b << 16);
1192
1193
1194                     }
1195
1196                     else
1197                     {
1198                        coldat = clut[pendata3];
1199                        dst[x] = coldat;
1200                     }
1201                  }
1202                  else
1203                  {
1204                     coldat = clut[bgpendata];
1205                     dst[x] = coldat;
1206                  }
1207               }
1208               else
1209               {
1210                  coldat = clut[bgpendata];
1211                  dst[x] = coldat;
1212               }
1213
10351214            }
1036            else
1037            {
1038               if (pen) dst[x] = paldata[pen];
1039            }
1040
10411215         }
10421216      }
1043
10441217   }
10451218
1219   fillbitmap(sprite_bitmap, 0x0000, cliprect);
1220   skns_draw_sprites(screen->machine, sprite_bitmap, cliprect);
1221
1222
10461223   return 0;
10471224}
10481225
10491226VIDEO_EOF(skns)
10501227{
1051   buffer_spriteram32_w(machine,0,0,0xffffffff);
1228//  buffer_spriteram32_w(machine,0,0,0xffffffff);
10521229}
src/mame/video/mexico86.c
r2844r2845
11#include "driver.h"
2#include "includes/mexico86.h"
23
34UINT8 *mexico86_videoram,*mexico86_objectram;
45size_t mexico86_objectram_size;
src/mame/video/chaknpop.c
r2844r2845
44 */
55
66#include "driver.h"
7#include "includes/chaknpop.h"
78
89#define GFX_FLIP_X   0x01
910#define GFX_FLIP_Y   0x02
src/mame/video/deco32.c
r2844r2845
11#include "driver.h"
2#include "deprecat.h"
32#include "deco16ic.h"
43#include "deco32.h"
54
r2844r2845
327326
328327      while (multi >= 0)
329328      {
330         deco16_pdrawgfx(bitmap,machine->gfx[gfxbank],
329         deco16_pdrawgfx(machine,
330               bitmap,machine->gfx[gfxbank],
331331               sprite - multi * inc,
332332               colour,
333333               fx,fy,
r2844r2845
455455   }
456456}
457457
458INLINE void dragngun_drawgfxzoom( bitmap_t *dest_bmp,const gfx_element *gfx,
458INLINE void dragngun_drawgfxzoom( running_machine *machine,
459      bitmap_t *dest_bmp,const gfx_element *gfx,
459460      UINT32 code,UINT32 color,int flipx,int flipy,int sx,int sy,
460461      const rectangle *clip,int transparency,int transparent_color,
461462      int scalex, int scaley,bitmap_t *pri_buffer,UINT32 pri_mask, int sprite_screen_width, int  sprite_screen_height )
r2844r2845
490491   {
491492      if( gfx )
492493      {
493         const pen_t *pal = &Machine->pens[gfx->color_base + gfx->color_granularity * (color % gfx->total_colors)];
494         const pen_t *pal = &machine->pens[gfx->color_base + gfx->color_granularity * (color % gfx->total_colors)];
494495         int source_base = (code % gfx->total_elements) * gfx->height;
495496
496497         if (sprite_screen_width && sprite_screen_height)
r2844r2845
801802            sprite&=0x7fff;
802803
803804            if (zoomx!=0x10000 || zoomy!=0x10000)
804               dragngun_drawgfxzoom(bitmap,machine->gfx[bank],
805               dragngun_drawgfxzoom(machine,
806                  bitmap,machine->gfx[bank],
805807                  sprite,
806808                  colour,
807809                  fx,fy,
r2844r2845
975977   pf1a_tilemap =0;
976978   dirty_palette = auto_malloc(4096);
977979
978   deco_allocate_sprite_bitmap();
980   deco_allocate_sprite_bitmap(machine);
979981
980982   tilemap_set_transparent_pen(pf1_tilemap,0);
981983   tilemap_set_transparent_pen(pf2_tilemap,0);
src/mame/video/argus.c
r2844r2845
114114***************************************************************************/
115115
116116#include "driver.h"
117#include "deprecat.h"
118117
119118#include "jalblend.c"
120119
r2844r2845
452451}
453452
454453
455static void bombsa_change_palette(int color, int data)
454static void bombsa_change_palette(running_machine *machine, int color, int data)
456455{
457   palette_set_color_rgb(Machine, color, pal4bit(data >> 12), pal4bit(data >> 8), pal4bit(data >> 4));
456   palette_set_color_rgb(machine, color, pal4bit(data >> 12), pal4bit(data >> 8), pal4bit(data >> 4));
458457}
459458
460459
461static void argus_change_palette(int color, int data)
460static void argus_change_palette(running_machine *machine, int color, int data)
462461{
463462   jal_blend_table[color] = data & 0x0f ;
464463
465   palette_set_color_rgb(Machine, color, pal4bit(data >> 12), pal4bit(data >> 8), pal4bit(data >> 4));
464   palette_set_color_rgb(machine, color, pal4bit(data >> 12), pal4bit(data >> 8), pal4bit(data >> 4));
466465}
467466
468static void argus_change_bg_palette(int color, int data)
467static void argus_change_bg_palette(running_machine *machine, int color, int data)
469468{
470469   int r, g, b;
471470   int ir, ig, ib;
r2844r2845
490489         g = 0;
491490   }
492491
493   palette_set_color_rgb(Machine, color, pal4bit(r), pal4bit(g), pal4bit(b));
492   palette_set_color_rgb(machine, color, pal4bit(r), pal4bit(g), pal4bit(b));
494493}
495494
496495
r2844r2845
706705
707706         for (offs = 0x400 ; offs < 0x500 ; offs ++)
708707         {
709            argus_change_bg_palette( (offs - 0x0400) + 128,
708            argus_change_bg_palette( machine, (offs - 0x0400) + 128,
710709               (argus_paletteram[offs] << 8) | argus_paletteram[offs + 0x0400] );
711710         }
712711      }
r2844r2845
729728
730729         for (offs = 0x400 ; offs < 0x600 ; offs += 2)
731730         {
732            argus_change_bg_palette( ((offs - 0x0400) >> 1) + 256,
731            argus_change_bg_palette( machine, ((offs - 0x0400) >> 1) + 256,
733732               argus_paletteram[offs | 1] | (argus_paletteram[offs & ~1] << 8));
734733         }
735734      }
r2844r2845
810809         if (offset & 0x80)
811810            offset -= 0x80;
812811
813         argus_change_palette( offset,
812         argus_change_palette( machine, offset,
814813            (argus_paletteram[offset] << 8) | argus_paletteram[offset + 0x80] );
815814      }
816815
r2844r2845
820819         if (offset >= 0x0800)
821820            offset -= 0x0400;
822821
823         argus_change_bg_palette( (offset - 0x0400) + 128,
822         argus_change_bg_palette( machine, (offset - 0x0400) + 128,
824823            (argus_paletteram[offset] << 8) | argus_paletteram[offset + 0x0400] );
825824      }
826825
r2844r2845
830829         if (offset >= 0x0900)
831830            offset -= 0x0400;
832831
833         argus_change_palette( (offset - 0x0500) + 384,
832         argus_change_palette( machine, (offset - 0x0500) + 384,
834833            (argus_paletteram[offset] << 8) | argus_paletteram[offset + 0x0400] );
835834      }
836835
r2844r2845
840839         if (offset >= 0x0b00)
841840            offset -= 0x0400;
842841
843         argus_change_palette( (offset - 0x0700) + 640,
842         argus_change_palette( machine, (offset - 0x0700) + 640,
844843            (argus_paletteram[offset] << 8) | argus_paletteram[offset + 0x0400] );
845844      }
846845   }
r2844r2845
850849
851850      for (offs = 0x400 ; offs < 0x500 ; offs ++)
852851      {
853         argus_change_bg_palette( (offs - 0x0400) + 128,
852         argus_change_bg_palette( machine, (offs - 0x0400) + 128,
854853            (argus_paletteram[offs] << 8) | argus_paletteram[offs + 0x0400] );
855854      }
856855
r2844r2845
868867   {
869868      if (offset >= 0x0000 && offset <= 0x01ff)
870869      {
871         argus_change_palette( offset >> 1,
870         argus_change_palette( machine, offset >> 1,
872871            argus_paletteram[offset | 1] | (argus_paletteram[offset & ~1] << 8));
873872      }
874873      else if (offset >= 0x0400 && offset <= 0x05ff )
875874      {
876         argus_change_bg_palette( ((offset - 0x0400) >> 1) + 256,
875         argus_change_bg_palette( machine, ((offset - 0x0400) >> 1) + 256,
877876            argus_paletteram[offset | 1] | (argus_paletteram[offset & ~1] << 8));
878877      }
879878      else if (offset >= 0x0600 && offset <= 0x07ff )
880879      {
881         argus_change_palette( ((offset - 0x0600) >> 1) + 512,
880         argus_change_palette( machine, ((offset - 0x0600) >> 1) + 512,
882881            argus_paletteram[offset | 1] | (argus_paletteram[offset & ~1] << 8));
883882      }
884883   }
r2844r2845
888887
889888      for (offs = 0x400 ; offs < 0x600 ; offs += 2)
890889      {
891         argus_change_bg_palette( ((offs - 0x0400) >> 1) + 256,
890         argus_change_bg_palette( machine, ((offs - 0x0400) >> 1) + 256,
892891            argus_paletteram[offs | 1] | (argus_paletteram[offs & ~1] << 8));
893892      }
894893
r2844r2845
902901
903902   if (offset < 0x0200 )                     /* BG1 color */
904903   {
905      argus_change_palette( ((offset - 0x0000) >> 1) + 256,
904      argus_change_palette( machine, ((offset - 0x0000) >> 1) + 256,
906905         argus_paletteram[offset | 1] | (argus_paletteram[offset & ~1] << 8));
907906   }
908907   else if (offset < 0x0240 )                  /* BG0 color */
909908   {
910      argus_change_palette( ((offset - 0x0200) >> 1) + 192,
909      argus_change_palette( machine, ((offset - 0x0200) >> 1) + 192,
911910         argus_paletteram[offset | 1] | (argus_paletteram[offset & ~1] << 8));
912911   }
913912   else if (offset >= 0x0400 && offset <= 0x04ff )   /* Sprite color */
914913   {
915914      if (offset < 0x0480)         /* 16 colors */
916         argus_change_palette( ((offset - 0x0400) >> 1) + 0,
915         argus_change_palette( machine, ((offset - 0x0400) >> 1) + 0,
917916            argus_paletteram[offset | 1] | (argus_paletteram[offset & ~1] << 8));
918917      else                     /* 8  colors */
919918      {
920         argus_change_palette( (offset & 0x70) + ((offset & 0x00f) >> 1) + 64,
919         argus_change_palette( machine, (offset & 0x70) + ((offset & 0x00f) >> 1) + 64,
921920            argus_paletteram[offset | 1] | (argus_paletteram[offset & ~1] << 8));
922         argus_change_palette( (offset & 0x70) + ((offset & 0x00f) >> 1) + 72,
921         argus_change_palette( machine, (offset & 0x70) + ((offset & 0x00f) >> 1) + 72,
923922            argus_paletteram[offset | 1] | (argus_paletteram[offset & ~1] << 8));
924923      }
925924   }
926925   else if (offset >= 0x0600 && offset <= 0x07ff )   /* Text color */
927926   {
928      argus_change_palette( ((offset - 0x0600) >> 1) + 512,
927      argus_change_palette( machine, ((offset - 0x0600) >> 1) + 512,
929928         argus_paletteram[offset | 1] | (argus_paletteram[offset & ~1] << 8));
930929   }
931930}
r2844r2845
952951   if (bombsa_ram_page==1)
953952   {
954953      argus_paletteram[ offset ] = data;
955      bombsa_change_palette( offset>>1, argus_paletteram[offset | 1] | (argus_paletteram[offset & ~1] << 8));
954      bombsa_change_palette( machine, offset>>1, argus_paletteram[offset | 1] | (argus_paletteram[offset & ~1] << 8));
956955   }
957956   else if (bombsa_ram_page==0)
958957   {
r2844r2845
11541153         }
11551154
11561155         if (priority != pri)
1157            jal_blend_drawgfx(bitmap,machine->gfx[0],
1156            jal_blend_drawgfx(machine,
1157                     bitmap,machine->gfx[0],
11581158                     tile,
11591159                     color,
11601160                     flipx, flipy,
r2844r2845
12081208            flipy ^= 0x20;
12091209         }
12101210
1211         jal_blend_drawgfx(bitmap,machine->gfx[0],
1211         jal_blend_drawgfx(machine,
1212                  bitmap,machine->gfx[0],
12121213                  tile,
12131214                  color,
12141215                  flipx, flipy,
r2844r2845
12431244      {
12441245         if ( (offs >= 0x100 && offs < 0x300) || (offs >= 0x400 && offs < 0x580) )
12451246         {
1246            jal_blend_drawgfx(bitmap,machine->gfx[0],
1247            jal_blend_drawgfx(machine,
1248                     bitmap,machine->gfx[0],
12471249                     tile,
12481250                     color,
12491251                     flipx, flipy,
r2844r2845
12611263
12621264               td = (flipx) ? (1 - i) : i;
12631265
1264               jal_blend_drawgfx(bitmap,machine->gfx[0],
1266               jal_blend_drawgfx(machine,
1267                        bitmap,machine->gfx[0],
12651268                        tile + td,
12661269                        color,
12671270                        flipx, flipy,
r2844r2845
12851288                  else
12861289                     td = (flipx) ? ( (1 - i) * 2 ) + 1 - j : (1 - i) * 2 + j;
12871290
1288                  jal_blend_drawgfx(bitmap,machine->gfx[0],
1291                  jal_blend_drawgfx(machine,
1292                           bitmap,machine->gfx[0],
12891293                           tile + td,
12901294                           color,
12911295                           flipx, flipy,
r2844r2845
13101314                  else
13111315                     td = (flipx) ? ( (3 - i) * 4 ) + 3 - j : (3 - i) * 4 + j;
13121316
1313                  jal_blend_drawgfx(bitmap,machine->gfx[0],
1317                  jal_blend_drawgfx(machine,
1318                           bitmap,machine->gfx[0],
13141319                           tile + td,
13151320                           color,
13161321                           flipx, flipy,
r2844r2845
13301335
13311336         if ( (offs >= 0x100 && offs < 0x300) || (offs >= 0x400 && offs < 0x580) )
13321337         {
1333            jal_blend_drawgfx(bitmap,machine->gfx[0],
1338            jal_blend_drawgfx(machine,
1339                     bitmap,machine->gfx[0],
13341340                     tile,
13351341                     color,
13361342                     flipx, flipy,
r2844r2845
13481354
13491355               td = (flipx) ? i : (1 - i);
13501356
1351               jal_blend_drawgfx(bitmap,machine->gfx[0],
1357               jal_blend_drawgfx(machine,
1358                        bitmap,machine->gfx[0],
13521359                        tile + td,
13531360                        color,
13541361                        flipx, flipy,
r2844r2845
13721379                  else
13731380                     td = (flipx) ? i * 2 + j : (i * 2) + 1 - j;
13741381
1375                  jal_blend_drawgfx(bitmap,machine->gfx[0],
1382                  jal_blend_drawgfx(machine,
1383                           bitmap,machine->gfx[0],
13761384                           tile + td,
13771385                           color,
13781386                           flipx, flipy,
r2844r2845
13971405                  else
13981406                     td = (flipx) ? i * 4 + j : (i * 4) + 3 - j;
13991407
1400                  jal_blend_drawgfx(bitmap,machine->gfx[0],
1408                  jal_blend_drawgfx(machine,
1409                           bitmap,machine->gfx[0],
14011410                           tile + td,
14021411                           color,
14031412                           flipx, flipy,
src/mame/video/lkage.c
r2844r2845
11#include "driver.h"
2#include "includes/lkage.h"
23
34static tilemap *bg_tilemap, *fg_tilemap, *tx_tilemap;
45static UINT8 bg_tile_bank, fg_tile_bank;
src/mame/video/fastfred.c
r2844r2845
99#include "driver.h"
1010#include "video/resnet.h"
1111#include "fastfred.h"
12#include "includes/galaxold.h"
1213
13extern UINT8 galaxold_stars_on;
14void galaxold_init_stars(running_machine *machine, int colors_offset);
15void galaxold_draw_stars(running_machine *machine, bitmap_t *bitmap);
16
1714UINT8 *fastfred_videoram;
1815UINT8 *fastfred_spriteram;
1916size_t fastfred_spriteram_size;
r2844r2845
390387VIDEO_UPDATE( imago )
391388{
392389   tilemap_draw(bitmap,cliprect,web_tilemap,0,0);
393   galaxold_draw_stars(screen->machine, bitmap);
390   galaxold_draw_stars(screen->machine, bitmap, cliprect);
394391   tilemap_draw(bitmap,cliprect,bg_tilemap,0,0);
395392   draw_sprites(screen->machine, bitmap, cliprect);
396393   tilemap_draw(bitmap,cliprect,fg_tilemap,0,0);
src/mame/video/punchout.c
r2844r2845
99#include "driver.h"
1010
1111
12static tilemap *punchout_topTilemap;
13static tilemap *punchout_botTilemap;
12static tilemap *bg_top_tilemap;
13static tilemap *bg_bot_tilemap;
14static tilemap *fg_tilemap;   // bottom only
1415
15static tilemap *spr1tilemap;
16static tilemap *spr1alttilemap;
17static tilemap *spr2tilemap;
18static tilemap *fgtilemap;
16static tilemap *spr1_tilemap;
17static tilemap *spr1_tilemap_flipx;
18static tilemap *spr2_tilemap;
1919
20UINT8 *punchout_topTilemap_ram;
21UINT8 *punchout_botTilemap_ram;
22UINT8 *punchout_botTilemap_scroll_ram;
23UINT8 *armwrest_fgTilemap_ram;
24UINT8 *punchout_bigsprite1ram;
25UINT8 *punchout_bigsprite2ram;
26UINT8 *punchout_bigsprite1;
27UINT8 *punchout_bigsprite2;
20UINT8 *punchout_bg_top_videoram;
21UINT8 *punchout_bg_bot_videoram;
22UINT8 *armwrest_fg_videoram;
23UINT8 *punchout_spr1_videoram;
24UINT8 *punchout_spr2_videoram;
25UINT8 *punchout_spr1_ctrlram;
26UINT8 *punchout_spr2_ctrlram;
2827UINT8 *punchout_palettebank;
2928
30static UINT8 top_palette_bank,bottom_palette_bank;
3129
3230
31/* these depend on jumpers(?) on the board and change from game to game */
32static int palette_reverse_top, palette_reverse_bot;
3333
34/***************************************************************************
3534
36  Convert the color PROMs into a more useable format.
37
38  Punch Out has a six 512x4 palette PROMs (one per gun; three for the top
39  monitor chars, three for everything else).
40  The PROMs are connected to the RGB output this way:
41
42  bit 3 -- 240 ohm resistor -- inverter  -- RED/GREEN/BLUE
43        -- 470 ohm resistor -- inverter  -- RED/GREEN/BLUE
44        -- 1  kohm resistor -- inverter  -- RED/GREEN/BLUE
45  bit 0 -- 2  kohm resistor -- inverter  -- RED/GREEN/BLUE
46
47***************************************************************************/
48
49/* these depend on jumpers on the board and change from game to game */
50static int gfx0inv,gfx1inv,gfx2inv,gfx3inv;
51
52PALETTE_INIT( punchout )
53{
54   int i;
55
56   for (i = 0; i < 0x800; i++)
57   {
58      int pen;
59      int r, g, b;
60
61      if (i < 0x200)
62         /* top monitor chars */
63         pen = ((i - 0x000) ^ gfx0inv) | 0x000;
64      else if (i < 0x400)
65         /* bottom monitor chars */
66         pen = ((i - 0x200) ^ gfx1inv) | 0x200;
67      else if (i < 0x600)
68         /* big sprite #1 */
69         pen = ((i - 0x400) ^ gfx2inv) | 0x200;
70      else
71         /* big sprite #2*/
72         pen = ((i - 0x600) ^ gfx3inv) | 0x200;
73
74      r = 255 - pal4bit(color_prom[pen + 0x000]);
75      g = 255 - pal4bit(color_prom[pen + 0x400]);
76      b = 255 - pal4bit(color_prom[pen + 0x800]);
77
78      palette_set_color(machine, i, MAKE_RGB(r, g, b));
79   }
80}
81
82
83PALETTE_INIT( armwrest )
84{
85   int i;
86
87   for (i = 0; i < 0xa00; i++)
88   {
89      int pen;
90      int r, g, b;
91
92      if (i < 0x400)
93         /* top monitor chars */
94         pen = (i - 0x000) | 0x000;
95      else if (i < 0x600)
96         /* bottom monitor chars */
97         pen = (i - 0x400) | 0x200;
98      else if (i < 0x800)
99         /* big sprite #1 */
100         pen = (i - 0x600) | 0x200;
101      else
102         /* big sprite #2*/
103         pen = ((i - 0x800) ^ 0x03) | 0x200;
104
105      r = 255 - pal4bit(color_prom[pen + 0x000]);
106      g = 255 - pal4bit(color_prom[pen + 0x400]);
107      b = 255 - pal4bit(color_prom[pen + 0x800]);
108
109      palette_set_color(machine, i, MAKE_RGB(r, g, b));
110   }
111}
112
113
11435DRIVER_INIT( punchout )
11536{
116   gfx0inv = 0x03;
117   gfx1inv = 0xfc;
118   gfx2inv = 0xff;
119   gfx3inv = 0xfc;
37   palette_reverse_top = 0x00;
38   palette_reverse_bot = 0xff;
12039}
12140
12241DRIVER_INIT( spnchout )
12342{
124   gfx0inv = 0x00;
125   gfx1inv = 0xff;
126   gfx2inv = 0xff;
127   gfx3inv = 0xff;
43   palette_reverse_top = 0x00;
44   palette_reverse_bot = 0xff;
12845}
12946
13047DRIVER_INIT( spnchotj )
13148{
132   gfx0inv = 0xfc;
133   gfx1inv = 0xff;
134   gfx2inv = 0xff;
135   gfx3inv = 0xff;
49   palette_reverse_top = 0xff;
50   palette_reverse_bot = 0xff;
13651}
13752
13853DRIVER_INIT( armwrest )
13954{
55   palette_reverse_top = 0x00;
56   palette_reverse_bot = 0x00;
14057}
14158
14259
r2844r2845
14764  Start the video hardware emulation.
14865
14966***************************************************************************/
67
15068static TILE_GET_INFO( top_get_info )
15169{
152   int code = punchout_topTilemap_ram[tile_index*2] + 256 * (punchout_topTilemap_ram[tile_index*2 + 1] & 0x03);
153   int color = ((punchout_topTilemap_ram[tile_index*2 + 1] & 0x7c) >> 2) + 64 * top_palette_bank;
154   int flipx = punchout_topTilemap_ram[tile_index*2 + 1] & 0x80;
70   int attr = punchout_bg_top_videoram[tile_index*2 + 1];
71   int code = punchout_bg_top_videoram[tile_index*2] + ((attr & 0x03) << 8);
72   int color = ((attr & 0x7c) >> 2);
73   int flipx = attr & 0x80;
15574   SET_TILE_INFO(0, code, color, flipx ? TILE_FLIPX : 0);
15675}
15776
77static TILE_GET_INFO( armwrest_top_get_info )
78{
79   int attr = punchout_bg_top_videoram[tile_index*2 + 1];
80   int code = punchout_bg_top_videoram[tile_index*2] + ((attr & 0x03) << 8) + ((attr & 0x80) << 3);
81   int color = ((attr & 0x7c) >> 2);
82   SET_TILE_INFO(0, code, color, 0);
83}
84
15885static TILE_GET_INFO( bot_get_info )
15986{
160   int code = punchout_botTilemap_ram[tile_index*2] + 256 * (punchout_botTilemap_ram[tile_index*2 + 1] & 0x03);
161   int color = ((punchout_botTilemap_ram[tile_index*2 + 1] & 0x7c) >> 2) + 64 * bottom_palette_bank;
162   int flipx = punchout_botTilemap_ram[tile_index*2 + 1] & 0x80;
87   int attr = punchout_bg_bot_videoram[tile_index*2 + 1];
88   int code = punchout_bg_bot_videoram[tile_index*2] + ((attr & 0x03) << 8);
89   int color = ((attr & 0x7c) >> 2);
90   int flipx = attr & 0x80;
16391   SET_TILE_INFO(1, code, color, flipx ? TILE_FLIPX : 0);
16492}
16593
94static TILE_GET_INFO( armwrest_bot_get_info )
95{
96   int attr = punchout_bg_bot_videoram[tile_index*2 + 1];
97   int code = punchout_bg_bot_videoram[tile_index*2] + ((attr & 0x03) << 8);
98   int color = ((attr & 0x7c) >> 2) + 0x40;
99   int flipx = attr & 0x80;
100   SET_TILE_INFO(0, code, color, flipx ? TILE_FLIPX : 0);
101}
102
166103static TILE_GET_INFO( bs1_get_info )
167104{
168   int code = punchout_bigsprite1ram[tile_index*4] + 256 * (punchout_bigsprite1ram[tile_index*4 + 1] & 0x1f);
169   int color = (punchout_bigsprite1ram[tile_index*4 + 3] & 0x1f) + 32 * bottom_palette_bank;
170   int flipx = punchout_bigsprite1ram[tile_index*4 + 3] & 0x80;
105   int attr = punchout_spr1_videoram[tile_index*4 + 3];
106   int code = punchout_spr1_videoram[tile_index*4] + ((punchout_spr1_videoram[tile_index*4 + 1] & 0x1f) << 8);
107   int color = attr & 0x1f;
108   int flipx = attr & 0x80;
171109   SET_TILE_INFO(2, code, color, flipx ? TILE_FLIPX : 0);
172110}
173111
174112static TILE_GET_INFO( bs2_get_info )
175113{
176   int code = punchout_bigsprite2ram[tile_index*4] + 256 * (punchout_bigsprite2ram[tile_index*4 + 1] & 0x0f);
177   int color = (punchout_bigsprite2ram[tile_index*4 + 3] & 0x3f) + 64 * bottom_palette_bank;
178   int flipx = punchout_bigsprite2ram[tile_index*4 + 3] & 0x80;
114   int attr = punchout_spr2_videoram[tile_index*4 + 3];
115   int code = punchout_spr2_videoram[tile_index*4] + ((punchout_spr2_videoram[tile_index*4 + 1] & 0x0f) << 8);
116   int color = attr & 0x3f;
117   int flipx = attr & 0x80;
179118   SET_TILE_INFO(3, code, color, flipx ? TILE_FLIPX : 0);
180119}
181120
182VIDEO_START( punchout )
121static TILE_GET_INFO( armwrest_fg_get_info )
183122{
184   punchout_topTilemap = tilemap_create(top_get_info, tilemap_scan_rows,  8,8, 32,32);
185   punchout_botTilemap = tilemap_create(bot_get_info, tilemap_scan_rows,  8,8, 64,32);
186   tilemap_set_scroll_rows(punchout_botTilemap, 32);
187
188   spr1tilemap = tilemap_create(bs1_get_info, tilemap_scan_rows,  8,8, 16,32);
189   spr2tilemap = tilemap_create(bs2_get_info, tilemap_scan_rows,  8,8, 16,32);
190
191   fgtilemap = NULL;
192
193   tilemap_set_transparent_pen(spr1tilemap, gfx2inv & 0x07);
194   tilemap_set_transparent_pen(spr2tilemap, gfx3inv & 0x03);
123   int attr = armwrest_fg_videoram[tile_index*2 + 1];
124   int code = armwrest_fg_videoram[tile_index*2] + 256 * (attr & 0x07);
125   int color = ((attr & 0xf8) >> 3);
126   int flipx = attr & 0x80;
127   SET_TILE_INFO(1, code, color, flipx ? TILE_FLIPX : 0);
195128}
196129
197
198
199static TILE_GET_INFO( armwrest_top_get_info )
200{
201   int code = punchout_topTilemap_ram[tile_index*2] + 256 * (punchout_topTilemap_ram[tile_index*2 + 1] & 0x03) +
202                        8 * (punchout_topTilemap_ram[tile_index*2 + 1] & 0x80);
203   int color = ((punchout_topTilemap_ram[tile_index*2 + 1] & 0x7c) >> 2) + 64 * top_palette_bank;
204   SET_TILE_INFO(0, code, color, 0);
205}
206
207static TILE_GET_INFO( armwrest_bot_get_info )
208{
209   int code = punchout_botTilemap_ram[tile_index*2] + 256 * (punchout_botTilemap_ram[tile_index*2 + 1] & 0x03);
210   int color = 128 + ((punchout_botTilemap_ram[tile_index*2 + 1] & 0x7c) >> 2) + 64 * bottom_palette_bank;
211   int flipx = punchout_botTilemap_ram[tile_index*2 + 1] & 0x80;
212   SET_TILE_INFO(0, code, color, flipx ? TILE_FLIPX : 0);
213}
214
215130static TILEMAP_MAPPER( armwrest_bs1_scan )
216131{
217132   int halfcols = num_cols/2;
218133   return (col/halfcols)*(halfcols*num_rows) + row*halfcols + col%halfcols;
219134}
220135
221static TILEMAP_MAPPER( armwrest_bs1alt_scan )
136static TILEMAP_MAPPER( armwrest_bs1_scan_flipx )
222137{
223138   int halfcols = num_cols/2;
224139   col ^=0x10;
r2844r2845
226141}
227142
228143
229
230static TILE_GET_INFO( armwrest_fg_get_info )
144VIDEO_START( punchout )
231145{
232   int code = armwrest_fgTilemap_ram[tile_index*2] + 256 * (armwrest_fgTilemap_ram[tile_index*2 + 1] & 0x07);
233   int color = ((armwrest_fgTilemap_ram[tile_index*2 + 1] & 0xf8) >> 3) + 32 * bottom_palette_bank;
234   int flipx = armwrest_fgTilemap_ram[tile_index*2 + 1] & 0x80;
235   SET_TILE_INFO(1, code, color, flipx ? TILE_FLIPX : 0);
146   bg_top_tilemap = tilemap_create(top_get_info, tilemap_scan_rows,  8,8, 32,32);
147   bg_bot_tilemap = tilemap_create(bot_get_info, tilemap_scan_rows,  8,8, 64,32);
148   tilemap_set_scroll_rows(bg_bot_tilemap, 32);
149
150   spr1_tilemap = tilemap_create(bs1_get_info, tilemap_scan_rows,  8,8, 16,32);
151   spr2_tilemap = tilemap_create(bs2_get_info, tilemap_scan_rows,  8,8, 16,32);
152
153   fg_tilemap = NULL;
154
155   tilemap_set_transparent_pen(spr1_tilemap, 0x07);
156   tilemap_set_transparent_pen(spr2_tilemap, 0x03);
236157}
237158
159
238160VIDEO_START( armwrest )
239161{
240   punchout_topTilemap = tilemap_create(armwrest_top_get_info, tilemap_scan_rows,  8,8, 32,32);
241   punchout_botTilemap = tilemap_create(armwrest_bot_get_info, tilemap_scan_rows,  8,8, 32,32);
162   bg_top_tilemap = tilemap_create(armwrest_top_get_info, tilemap_scan_rows,  8,8, 32,32);
163   bg_bot_tilemap = tilemap_create(armwrest_bot_get_info, tilemap_scan_rows,  8,8, 32,32);
242164
243   spr1tilemap = tilemap_create(bs1_get_info, armwrest_bs1_scan,  8,8, 32,16);
244   spr1alttilemap = tilemap_create(bs1_get_info, armwrest_bs1alt_scan,  8,8, 32,16);
245   spr2tilemap = tilemap_create(bs2_get_info, tilemap_scan_rows,  8,8, 16,32);
246   fgtilemap = tilemap_create(armwrest_fg_get_info, tilemap_scan_rows,  8,8, 32,32);
165   spr1_tilemap =       tilemap_create(bs1_get_info, armwrest_bs1_scan,  8,8, 32,16);
166   spr1_tilemap_flipx = tilemap_create(bs1_get_info, armwrest_bs1_scan_flipx,  8,8, 32,16);
167   spr2_tilemap = tilemap_create(bs2_get_info, tilemap_scan_rows,  8,8, 16,32);
168   fg_tilemap = tilemap_create(armwrest_fg_get_info, tilemap_scan_rows,  8,8, 32,32);
247169
248   tilemap_set_transparent_pen(spr1tilemap, 0x07);
249   tilemap_set_transparent_pen(spr1alttilemap, 0x07);
250   tilemap_set_transparent_pen(spr2tilemap, 0x00);
251   tilemap_set_transparent_pen(fgtilemap, 0x07);
170   tilemap_set_transparent_pen(spr1_tilemap, 0x07);
171   tilemap_set_transparent_pen(spr1_tilemap_flipx, 0x07);
172   tilemap_set_transparent_pen(spr2_tilemap, 0x03);
173   tilemap_set_transparent_pen(fg_tilemap, 0x07);
252174}
253175
254176
255177
256WRITE8_HANDLER( punchout_topTilemap_ram_w )
178WRITE8_HANDLER( punchout_bg_top_videoram_w )
257179{
258   punchout_topTilemap_ram[offset] = data;
259   tilemap_mark_tile_dirty(punchout_topTilemap, offset/2);
180   punchout_bg_top_videoram[offset] = data;
181   tilemap_mark_tile_dirty(bg_top_tilemap, offset/2);
260182}
261183
262WRITE8_HANDLER( punchout_botTilemap_ram_w )
184WRITE8_HANDLER( punchout_bg_bot_videoram_w )
263185{
264   punchout_botTilemap_ram[offset] = data;
265   tilemap_mark_tile_dirty(punchout_botTilemap, offset/2);
186   punchout_bg_bot_videoram[offset] = data;
187   tilemap_mark_tile_dirty(bg_bot_tilemap, offset/2);
266188}
267189
268WRITE8_HANDLER( armwrest_fgTilemap_ram_w )
190WRITE8_HANDLER( armwrest_fg_videoram_w )
269191{
270   armwrest_fgTilemap_ram[offset] = data;
271   tilemap_mark_tile_dirty(fgtilemap, offset/2);
192   armwrest_fg_videoram[offset] = data;
193   tilemap_mark_tile_dirty(fg_tilemap, offset/2);
272194}
273195
274WRITE8_HANDLER( punchout_bigsprite1ram_w )
196WRITE8_HANDLER( punchout_spr1_videoram_w )
275197{
276   punchout_bigsprite1ram[offset] = data;
277   tilemap_mark_tile_dirty(spr1tilemap, offset/4);
278   if (spr1alttilemap) tilemap_mark_tile_dirty(spr1alttilemap, offset/4);
198   punchout_spr1_videoram[offset] = data;
199   tilemap_mark_tile_dirty(spr1_tilemap, offset/4);
200   if (spr1_tilemap_flipx)
201      tilemap_mark_tile_dirty(spr1_tilemap_flipx, offset/4);
279202}
280203
281WRITE8_HANDLER( punchout_bigsprite2ram_w )
204WRITE8_HANDLER( punchout_spr2_videoram_w )
282205{
283   punchout_bigsprite2ram[offset] = data;
284   tilemap_mark_tile_dirty(spr2tilemap, offset/4);
206   punchout_spr2_videoram[offset] = data;
207   tilemap_mark_tile_dirty(spr2_tilemap, offset/4);
285208}
286209
287210
288211
289WRITE8_HANDLER( punchout_palettebank_w )
212static void draw_big_sprite(bitmap_t *bitmap, const rectangle *cliprect, int palette)
290213{
291   *punchout_palettebank = data;
292
293   if (top_palette_bank != ((data >> 1) & 0x01))
294   {
295      top_palette_bank = (data >> 1) & 0x01;
296      tilemap_mark_all_tiles_dirty(punchout_topTilemap);
297   }
298   if (bottom_palette_bank != ((data >> 0) & 0x01))
299   {
300      bottom_palette_bank = (data >> 0) & 0x01;
301      if (fgtilemap != NULL)
302         tilemap_mark_all_tiles_dirty(fgtilemap);
303      tilemap_mark_all_tiles_dirty(punchout_botTilemap);
304      tilemap_mark_all_tiles_dirty(spr1tilemap);
305      tilemap_mark_all_tiles_dirty(spr2tilemap);
306   }
307}
308
309
310
311static void draw_big_sprite(bitmap_t *bitmap, const rectangle *cliprect)
312{
313214   int zoom;
314215
315   zoom = punchout_bigsprite1[0] + 256 * (punchout_bigsprite1[1] & 0x0f);
216   zoom = punchout_spr1_ctrlram[0] + 256 * (punchout_spr1_ctrlram[1] & 0x0f);
316217   if (zoom)
317218   {
318219      int sx,sy;
319220      UINT32 startx,starty;
320221      int incxx,incyy;
321222
322      sx = 4096 - (punchout_bigsprite1[2] + 256 * (punchout_bigsprite1[3] & 0x0f));
223      sx = 4096 - (punchout_spr1_ctrlram[2] + 256 * (punchout_spr1_ctrlram[3] & 0x0f));
323224      if (sx > 4096-4*127) sx -= 4096;
324225
325      sy = -(punchout_bigsprite1[4] + 256 * (punchout_bigsprite1[5] & 1));
226      sy = -(punchout_spr1_ctrlram[4] + 256 * (punchout_spr1_ctrlram[5] & 1));
326227      if (sy <= -256 + zoom/0x40) sy += 512;
327228      sy += 12;
328229
r2844r2845
334235      startx += 3740 * zoom;   /* adjustment to match the screen shots */
335236      starty -= 178 * zoom;   /* and make the hall of fame picture nice */
336237
337      if (punchout_bigsprite1[6] & 1)   /* flip x */
238      if (punchout_spr1_ctrlram[6] & 1)   /* flip x */
338239      {
339240         startx = ((16 * 8) << 16) - startx - 1;
340241         incxx = -incxx;
341242      }
342243
343      tilemap_draw_roz(bitmap,cliprect,spr1tilemap,
244      tilemap_set_palette_offset(spr1_tilemap, 0x100 * palette);
245
246      tilemap_draw_roz(bitmap,cliprect,spr1_tilemap,
344247         startx,starty + 0x200*(2) * zoom,
345248         incxx,0,0,incyy,   /* zoom, no rotation */
346249         0,   /* no wraparound */
r2844r2845
349252}
350253
351254
352static void armwrest_draw_big_sprite(bitmap_t *bitmap, const rectangle *cliprect)
255static void armwrest_draw_big_sprite(bitmap_t *bitmap, const rectangle *cliprect, int palette)
353256{
354257   int zoom;
355258
356   zoom = punchout_bigsprite1[0] + 256 * (punchout_bigsprite1[1] & 0x0f);
259   zoom = punchout_spr1_ctrlram[0] + 256 * (punchout_spr1_ctrlram[1] & 0x0f);
357260   if (zoom)
358261   {
359262      int sx,sy;
r2844r2845
361264      int incxx,incyy;
362265      tilemap *_tilemap;
363266
364      sx = 4096 - (punchout_bigsprite1[2] + 256 * (punchout_bigsprite1[3] & 0x0f));
267      sx = 4096 - (punchout_spr1_ctrlram[2] + 256 * (punchout_spr1_ctrlram[3] & 0x0f));
365268      if (sx > 2048) sx -= 4096;
366269
367      sy = -(punchout_bigsprite1[4] + 256 * (punchout_bigsprite1[5] & 1));
270      sy = -(punchout_spr1_ctrlram[4] + 256 * (punchout_spr1_ctrlram[5] & 1));
368271      if (sy <= -256 + zoom/0x40) sy += 512;
369272      sy += 12;
370273
r2844r2845
376279      startx += 3740 * zoom;   /* adjustment to match the screen shots */
377280      starty -= 178 * zoom;   /* and make the hall of fame picture nice */
378281
379      if (punchout_bigsprite1[6] & 1)   /* flip x */
282      if (punchout_spr1_ctrlram[6] & 1)   /* flip x */
380283      {
381         _tilemap = spr1alttilemap;
284         _tilemap = spr1_tilemap_flipx;
382285         startx = ((32 * 8) << 16) - startx - 1;
383286         incxx = -incxx;
384287      }
385288      else
386         _tilemap = spr1tilemap;
289         _tilemap = spr1_tilemap;
387290
291      tilemap_set_palette_offset(_tilemap, 0x100 * palette);
388292
389293      tilemap_draw_roz(bitmap,cliprect,_tilemap,
390294         startx,starty + 0x200*(2) * zoom,
r2844r2845
399303   int sx,sy;
400304   int incxx;
401305
402   sx = 512 - (punchout_bigsprite2[0] + 256 * (punchout_bigsprite2[1] & 1));
306   sx = 512 - (punchout_spr2_ctrlram[0] + 256 * (punchout_spr2_ctrlram[1] & 1));
403307   if (sx > 512-127) sx -= 512;
404308   sx -= 55;   /* adjustment to match the screen shots */
405309
406   sy = -punchout_bigsprite2[2] + 256 * (punchout_bigsprite2[3] & 1);
310   sy = -punchout_spr2_ctrlram[2] + 256 * (punchout_spr2_ctrlram[3] & 1);
407311   sy += 3;   /* adjustment to match the screen shots */
408312
409313   sx = -sx << 16;
410314   sy = -sy << 16;
411315
412   if (punchout_bigsprite2[4] & 1)   /* flip x */
316   if (punchout_spr2_ctrlram[4] & 1)   /* flip x */
413317   {
414318      sx = ((16 * 8) << 16) - sx - 1;
415319      incxx = -1;
r2844r2845
417321   else
418322      incxx = 1;
419323
420   tilemap_draw_roz(bitmap,cliprect,spr2tilemap,
324   // this tilemap doesn't actually zoom, but draw_roz is the only way to draw it without wraparound
325   tilemap_draw_roz(bitmap,cliprect,spr2_tilemap,
421326      sx, sy, incxx << 16, 0, 0, 1 << 16,
422327      0, 0, 0);
423328}
424329
330
331
332static void punchout_copy_top_palette(running_machine *machine, int bank)
333{
334   int i;
335   const UINT8 *color_prom = memory_region(REGION_PROMS);
336
337   // top monitor palette
338   for (i = 0; i < 0x100; i++)
339   {
340      int base = 0x100 * bank;
341      int r, g, b;
342
343      r = 255 - pal4bit(color_prom[i + 0x000 + base]);
344      g = 255 - pal4bit(color_prom[i + 0x200 + base]);
345      b = 255 - pal4bit(color_prom[i + 0x400 + base]);
346
347      palette_set_color(machine, i ^ palette_reverse_top, MAKE_RGB(r, g, b));
348   }
349}
350
351static void punchout_copy_bot_palette(running_machine *machine, int bank)
352{
353   int i;
354   const UINT8 *color_prom = memory_region(REGION_PROMS) + 0x600;
355
356   // bottom monitor palette
357   for (i = 0; i < 0x100; i++)
358   {
359      int base = 0x100 * bank;
360      int r, g, b;
361
362      r = 255 - pal4bit(color_prom[i + 0x000 + base]);
363      g = 255 - pal4bit(color_prom[i + 0x200 + base]);
364      b = 255 - pal4bit(color_prom[i + 0x400 + base]);
365
366      palette_set_color(machine, (i ^ palette_reverse_bot) + 0x100, MAKE_RGB(r, g, b));
367   }
368}
369
370
425371VIDEO_UPDATE( punchout )
426372{
427373   const device_config *top_screen    = device_list_find_by_tag(screen->machine->config->devicelist, VIDEO_SCREEN, "top");
428374   const device_config *bottom_screen = device_list_find_by_tag(screen->machine->config->devicelist, VIDEO_SCREEN, "bottom");
429375
430   if (screen == bottom_screen)
376   if (screen == top_screen)
431377   {
432      tilemap_draw(bitmap, cliprect, punchout_topTilemap, 0, 0);
378      punchout_copy_top_palette(screen->machine, BIT(*punchout_palettebank,1));
433379
434      if (punchout_bigsprite1[7] & 1)   /* display in top monitor */
435         draw_big_sprite(bitmap, cliprect);
380      tilemap_draw(bitmap, cliprect, bg_top_tilemap, 0, 0);
381
382      if (punchout_spr1_ctrlram[7] & 1)   /* display in top monitor */
383         draw_big_sprite(bitmap, cliprect, 0);
436384   }
437   else if (screen == top_screen)
385   else if (screen == bottom_screen)
438386   {
439387      int offs;
440388
389      punchout_copy_bot_palette(screen->machine, BIT(*punchout_palettebank,0));
390
441391      /* copy the character mapped graphics */
442392      for (offs = 0;offs < 32;offs++)
443         tilemap_set_scrollx(punchout_botTilemap, offs, 58 + punchout_botTilemap_scroll_ram[2*offs] + 256 * (punchout_botTilemap_scroll_ram[2*offs + 1] & 0x01));
393         tilemap_set_scrollx(bg_bot_tilemap, offs, 58 + punchout_bg_bot_videoram[2*offs] + 256 * (punchout_bg_bot_videoram[2*offs + 1] & 0x01));
444394
445      tilemap_draw(bitmap, cliprect, punchout_botTilemap, 0, 0);
395      tilemap_draw(bitmap, cliprect, bg_bot_tilemap, 0, 0);
446396
447      if (punchout_bigsprite1[7] & 2)   /* display in bottom monitor */
448         draw_big_sprite(bitmap, cliprect);
397      if (punchout_spr1_ctrlram[7] & 2)   /* display in bottom monitor */
398         draw_big_sprite(bitmap, cliprect, 1);
449399      drawbs2(screen->machine, bitmap, cliprect);
450400   }
451401   return 0;
r2844r2845
457407   const device_config *top_screen    = device_list_find_by_tag(screen->machine->config->devicelist, VIDEO_SCREEN, "top");
458408   const device_config *bottom_screen = device_list_find_by_tag(screen->machine->config->devicelist, VIDEO_SCREEN, "bottom");
459409
460   if (screen == bottom_screen)
410   if (screen == top_screen)
461411   {
462      tilemap_draw(bitmap, cliprect, punchout_topTilemap, 0, 0);
412      punchout_copy_top_palette(screen->machine, BIT(*punchout_palettebank,1));
463413
464      if (punchout_bigsprite1[7] & 1)   /* display in top monitor */
465         armwrest_draw_big_sprite(bitmap, cliprect);
414      tilemap_draw(bitmap, cliprect, bg_top_tilemap, 0, 0);
415
416      if (punchout_spr1_ctrlram[7] & 1)   /* display in top monitor */
417         armwrest_draw_big_sprite(bitmap, cliprect, 0);
466418   }
467   else if (screen == top_screen)
419   else if (screen == bottom_screen)
468420   {
469      tilemap_draw(bitmap, cliprect, punchout_botTilemap, 0, 0);
421      punchout_copy_bot_palette(screen->machine, BIT(*punchout_palettebank,0));
470422
471      if (punchout_bigsprite1[7] & 2)   /* display in bottom monitor */
472         armwrest_draw_big_sprite(bitmap, cliprect);
423      tilemap_draw(bitmap, cliprect, bg_bot_tilemap, 0, 0);
424
425      if (punchout_spr1_ctrlram[7] & 2)   /* display in bottom monitor */
426         armwrest_draw_big_sprite(bitmap, cliprect, 1);
473427      drawbs2(screen->machine, bitmap, cliprect);
474428
475      tilemap_draw(bitmap, cliprect, fgtilemap, 0, 0);
429      tilemap_draw(bitmap, cliprect, fg_tilemap, 0, 0);
476430   }
477431   return 0;
478432}
src/mame/video/galpanic.c
r2844r2845
1111   tmpbitmap = video_screen_auto_bitmap_alloc(machine->primary_screen);
1212   sprites_bitmap = video_screen_auto_bitmap_alloc(machine->primary_screen);
1313
14   pandora_start(0,0, -16);
14   pandora_start(machine,0,0, -16);
1515}
1616
1717PALETTE_INIT( galpanic )
src/mame/video/gticlub.c
r2844r2845
11#include "driver.h"
2#include "deprecat.h"
32#include "cpu/sharc/sharc.h"
43#include "machine/konppc.h"
54#include "video/poly.h"
r2844r2845
159158static bitmap_t *K001005_zbuffer;
160159static rectangle K001005_cliprect;
161160
162static void render_polygons(void);
161static void render_polygons(running_machine *machine);
163162
164163static UINT8 *K001005_texture;
165164
r2844r2845
176175
177176static int K001005_bitmap_page = 0;
178177
179void K001005_swap_buffers(void);
178void K001005_swap_buffers(running_machine *machine);
180179
181180static void K001005_exit(running_machine *machine)
182181{
r2844r2845
403402
404403         if (data == 2 && K001005_3d_fifo_ptr > 0)
405404         {
406            K001005_swap_buffers();
407            render_polygons();
405            K001005_swap_buffers(machine);
406            render_polygons(machine);
408407            poly_wait(poly, "render_polygons");
409408            K001005_3d_fifo_ptr = 0;
410409         }
r2844r2845
527526static poly_vertex prev_v[4];
528527static int prev_poly_type;
529528
530static void render_polygons(void)
529static void render_polygons(running_machine *machine)
531530{
532531   int i, j;
533   const rectangle *visarea = video_screen_get_visible_area(Machine->primary_screen);
532   const rectangle *visarea = video_screen_get_visible_area(machine->primary_screen);
534533
535534//  mame_printf_debug("K001005_fifo_ptr = %08X\n", K001005_3d_fifo_ptr);
536535
r2844r2845
944943   }
945944}
946945
947void K001005_swap_buffers(void)
946void K001005_swap_buffers(running_machine *machine)
948947{
949948   K001005_bitmap_page ^= 1;
950949
951950   //if (K001005_status == 2)
952951   {
953      fillbitmap(K001005_bitmap[K001005_bitmap_page], Machine->pens[0], &K001005_cliprect);
952      fillbitmap(K001005_bitmap[K001005_bitmap_page], machine->pens[0], &K001005_cliprect);
954953      fillbitmap(K001005_zbuffer, 0xffffffff, &K001005_cliprect);
955954   }
956955}
src/mame/video/namcona1.c
r2844r2845
1515UINT16 *namcona1_vreg;
1616UINT16 *namcona1_scroll;
1717UINT16 *namcona1_workram;
18UINT16 *namcona1_sparevram;
19UINT16 *namcona1_pixmap;
18//UINT16 *namcona1_sparevram;
19//UINT16 *namcona1_pixmap;
2020
2121/* private variables */
2222static char *dirtychar;
src/mame/video/gticlub.h
r2844r2845
11void K001005_draw(bitmap_t *bitmap, const rectangle *cliprect);
2void K001005_swap_buffers(void);
2void K001005_swap_buffers(running_machine *machine);
33void K001005_init(running_machine *machine);
44void K001005_preprocess_texture_data(UINT8 *rom, int length, int gticlub);
55
r2844r2845
1010WRITE32_HANDLER(K001006_0_w);
1111READ32_HANDLER(K001006_1_r);
1212WRITE32_HANDLER(K001006_1_w);
13
14VIDEO_START( gticlub );
15VIDEO_UPDATE( gticlub );
src/mame/video/psx.c
r2844r2845
284284
285285#define DEBUG_MAX ( 512 )
286286
287static void DebugMeshInit( void )
287static void DebugMeshInit( running_machine *machine )
288288{
289   int width = video_screen_get_width(Machine->primary_screen);
290   int height = video_screen_get_height(Machine->primary_screen);
289   int width = video_screen_get_width(machine->primary_screen);
290   int height = video_screen_get_height(machine->primary_screen);
291291
292292   m_b_debugmesh = 0;
293293   m_b_debugtexture = 0;
r2844r2845
298298   debugmesh = auto_bitmap_alloc(width, height, BITMAP_FORMAT_INDEXED16 );
299299}
300300
301static void DebugMesh( int n_coordx, int n_coordy )
301static void DebugMesh( running_machine *machine, int n_coordx, int n_coordy )
302302{
303303   int n_coord;
304304   int n_colour;
305   int width = video_screen_get_width(Machine->primary_screen);
306   int height = video_screen_get_height(Machine->primary_screen);
305   int width = video_screen_get_width(machine->primary_screen);
306   int height = video_screen_get_height(machine->primary_screen);
307307
308308   if( m_b_debugclear )
309309   {
r2844r2845
418418   m_n_debugcoord = 0;
419419}
420420
421static void DebugCheckKeys( void )
421static void DebugCheckKeys( running_machine *machine )
422422{
423423   if( input_code_pressed_once( KEYCODE_M ) )
424424      m_b_debugmesh = !m_b_debugmesh;
r2844r2845
428428
429429   if( m_b_debugmesh || m_b_debugtexture )
430430   {
431      int width = video_screen_get_width(Machine->primary_screen);
432      int height = video_screen_get_height(Machine->primary_screen);
433      video_screen_set_visarea(Machine->primary_screen, 0, width - 1, 0, height - 1 );
431      int width = video_screen_get_width(machine->primary_screen);
432      int height = video_screen_get_height(machine->primary_screen);
433      video_screen_set_visarea(machine->primary_screen, 0, width - 1, 0, height - 1 );
434434   }
435435   else
436      video_screen_set_visarea(Machine->primary_screen, 0, m_n_screenwidth - 1, 0, m_n_screenheight - 1 );
436      video_screen_set_visarea(machine->primary_screen, 0, m_n_screenwidth - 1, 0, m_n_screenheight - 1 );
437437
438438   if( input_code_pressed_once( KEYCODE_I ) )
439439   {
r2844r2845
504504   return m_b_debugmesh;
505505}
506506
507static int DebugTextureDisplay( bitmap_t *bitmap )
507static int DebugTextureDisplay( running_machine *machine, bitmap_t *bitmap )
508508{
509509   UINT32 n_y;
510510
511511   if( m_b_debugtexture )
512512   {
513      int width = video_screen_get_width(Machine->primary_screen);
514      int height = video_screen_get_height(Machine->primary_screen);
513      int width = video_screen_get_width(machine->primary_screen);
514      int height = video_screen_get_height(machine->primary_screen);
515515
516516      for( n_y = 0; n_y < height; n_y++ )
517517      {
r2844r2845
539539            }
540540            p_n_interleave[ n_x ] = m_p_p_vram[ n_yi ][ n_xi ];
541541         }
542         draw_scanline16( bitmap, 0, n_y, width, p_n_interleave, Machine->pens, -1 );
542         draw_scanline16( bitmap, 0, n_y, width, p_n_interleave, machine->pens, -1 );
543543      }
544544   }
545545   return m_b_debugtexture;
r2844r2845
614614   visarea.min_x = visarea.min_y = 0;
615615   visarea.max_x = m_n_screenwidth - 1;
616616   visarea.max_y = m_n_screenheight - 1;
617   video_screen_configure(machine->primary_screen, m_n_screenwidth, m_n_screenheight, &visarea, HZ_TO_ATTOSECONDS(refresh));
617   video_screen_configure(Machine->primary_screen, m_n_screenwidth, m_n_screenheight, &visarea, HZ_TO_ATTOSECONDS(refresh));
618618}
619619
620620static void psx_gpu_init( running_machine *machine )
r2844r2845
628628   int height = video_screen_get_height(machine->primary_screen);
629629
630630#if defined( MAME_DEBUG )
631   DebugMeshInit();
631   DebugMeshInit(machine);
632632#endif
633633
634634   m_n_gpustatus = 0x14802000;
r2844r2845
806806   {
807807      return 0;
808808   }
809   if( DebugTextureDisplay( bitmap ) )
809   if( DebugTextureDisplay( screen->machine, bitmap ) )
810810   {
811811      return 0;
812812   }
r2844r2845
14901490   }
14911491   for( n_point = 0; n_point < n_points; n_point++ )
14921492   {
1493      DebugMesh( COORD_X( m_packet.FlatPolygon.vertex[ n_point ].n_coord ) + m_n_drawoffset_x, COORD_Y( m_packet.FlatPolygon.vertex[ n_point ].n_coord ) + m_n_drawoffset_y );
1493      DebugMesh( Machine, COORD_X( m_packet.FlatPolygon.vertex[ n_point ].n_coord ) + m_n_drawoffset_x, COORD_Y( m_packet.FlatPolygon.vertex[ n_point ].n_coord ) + m_n_drawoffset_y );
14941494   }
14951495   DebugMeshEnd();
14961496#endif
r2844r2845
16631663   }
16641664   for( n_point = 0; n_point < n_points; n_point++ )
16651665   {
1666      DebugMesh( COORD_X( m_packet.FlatTexturedPolygon.vertex[ n_point ].n_coord ) + m_n_drawoffset_x, COORD_Y( m_packet.FlatTexturedPolygon.vertex[ n_point ].n_coord ) + m_n_drawoffset_y );
1666      DebugMesh( Machine, COORD_X( m_packet.FlatTexturedPolygon.vertex[ n_point ].n_coord ) + m_n_drawoffset_x, COORD_Y( m_packet.FlatTexturedPolygon.vertex[ n_point ].n_coord ) + m_n_drawoffset_y );
16671667   }
16681668   DebugMeshEnd();
16691669#endif
r2844r2845
18821882   }
18831883   for( n_point = 0; n_point < n_points; n_point++ )
18841884   {
1885      DebugMesh( COORD_X( m_packet.GouraudPolygon.vertex[ n_point ].n_coord ) + m_n_drawoffset_x, COORD_Y( m_packet.GouraudPolygon.vertex[ n_point ].n_coord ) + m_n_drawoffset_y );
1885      DebugMesh( Machine, COORD_X( m_packet.GouraudPolygon.vertex[ n_point ].n_coord ) + m_n_drawoffset_x, COORD_Y( m_packet.GouraudPolygon.vertex[ n_point ].n_coord ) + m_n_drawoffset_y );
18861886   }
18871887   DebugMeshEnd();
18881888#endif
r2844r2845
21132113   }
21142114   for( n_point = 0; n_point < n_points; n_point++ )
21152115   {
2116      DebugMesh( COORD_X( m_packet.GouraudTexturedPolygon.vertex[ n_point ].n_coord ) + m_n_drawoffset_x, COORD_Y( m_packet.GouraudTexturedPolygon.vertex[ n_point ].n_coord ) + m_n_drawoffset_y );
2116      DebugMesh( Machine, COORD_X( m_packet.GouraudTexturedPolygon.vertex[ n_point ].n_coord ) + m_n_drawoffset_x, COORD_Y( m_packet.GouraudTexturedPolygon.vertex[ n_point ].n_coord ) + m_n_drawoffset_y );
21172117   }
21182118   DebugMeshEnd();
21192119#endif
r2844r2845
23712371   {
23722372      return;
23732373   }
2374   DebugMesh( COORD_X( m_packet.MonochromeLine.vertex[ 0 ].n_coord ) + m_n_drawoffset_x, COORD_Y( m_packet.MonochromeLine.vertex[ 0 ].n_coord ) + m_n_drawoffset_y );
2375   DebugMesh( COORD_X( m_packet.MonochromeLine.vertex[ 1 ].n_coord ) + m_n_drawoffset_x, COORD_Y( m_packet.MonochromeLine.vertex[ 1 ].n_coord ) + m_n_drawoffset_y );
2374   DebugMesh( Machine, COORD_X( m_packet.MonochromeLine.vertex[ 0 ].n_coord ) + m_n_drawoffset_x, COORD_Y( m_packet.MonochromeLine.vertex[ 0 ].n_coord ) + m_n_drawoffset_y );
2375   DebugMesh( Machine, COORD_X( m_packet.MonochromeLine.vertex[ 1 ].n_coord ) + m_n_drawoffset_x, COORD_Y( m_packet.MonochromeLine.vertex[ 1 ].n_coord ) + m_n_drawoffset_y );
23762376   DebugMeshEnd();
23772377#endif
23782378
r2844r2845
24772477   {
24782478      return;
24792479   }
2480   DebugMesh( COORD_X( m_packet.GouraudLine.vertex[ 0 ].n_coord ) + m_n_drawoffset_x, COORD_Y( m_packet.GouraudLine.vertex[ 0 ].n_coord ) + m_n_drawoffset_y );
2481   DebugMesh( COORD_X( m_packet.GouraudLine.vertex[ 1 ].n_coord ) + m_n_drawoffset_x, COORD_Y( m_packet.GouraudLine.vertex[ 1 ].n_coord ) + m_n_drawoffset_y );
2480   DebugMesh( Machine, COORD_X( m_packet.GouraudLine.vertex[ 0 ].n_coord ) + m_n_drawoffset_x, COORD_Y( m_packet.GouraudLine.vertex[ 0 ].n_coord ) + m_n_drawoffset_y );
2481   DebugMesh( Machine, COORD_X( m_packet.GouraudLine.vertex[ 1 ].n_coord ) + m_n_drawoffset_x, COORD_Y( m_packet.GouraudLine.vertex[ 1 ].n_coord ) + m_n_drawoffset_y );
24822482   DebugMeshEnd();
24832483#endif
24842484
r2844r2845
25762576   {
25772577      return;
25782578   }
2579   DebugMesh( COORD_X( m_packet.FlatRectangle.n_coord ), COORD_Y( m_packet.FlatRectangle.n_coord ) );
2580   DebugMesh( COORD_X( m_packet.FlatRectangle.n_coord ) + SIZE_W( m_packet.FlatRectangle.n_size ), COORD_Y( m_packet.FlatRectangle.n_coord ) );
2581   DebugMesh( COORD_X( m_packet.FlatRectangle.n_coord ), COORD_Y( m_packet.FlatRectangle.n_coord ) + SIZE_H( m_packet.FlatRectangle.n_size ) );
2582   DebugMesh( COORD_X( m_packet.FlatRectangle.n_coord ) + SIZE_W( m_packet.FlatRectangle.n_size ), COORD_Y( m_packet.FlatRectangle.n_coord ) + SIZE_H( m_packet.FlatRectangle.n_size ) );
2579   DebugMesh( Machine, COORD_X( m_packet.FlatRectangle.n_coord ), COORD_Y( m_packet.FlatRectangle.n_coord ) );
2580   DebugMesh( Machine, COORD_X( m_packet.FlatRectangle.n_coord ) + SIZE_W( m_packet.FlatRectangle.n_size ), COORD_Y( m_packet.FlatRectangle.n_coord ) );
2581   DebugMesh( Machine, COORD_X( m_packet.FlatRectangle.n_coord ), COORD_Y( m_packet.FlatRectangle.n_coord ) + SIZE_H( m_packet.FlatRectangle.n_size ) );
2582   DebugMesh( Machine, COORD_X( m_packet.FlatRectangle.n_coord ) + SIZE_W( m_packet.FlatRectangle.n_size ), COORD_Y( m_packet.FlatRectangle.n_coord ) + SIZE_H( m_packet.FlatRectangle.n_size ) );
25832583   DebugMeshEnd();
25842584#endif
25852585
r2844r2845
26382638   {
26392639      return;
26402640   }
2641   DebugMesh( COORD_X( m_packet.FlatRectangle.n_coord ) + m_n_drawoffset_x, COORD_Y( m_packet.FlatRectangle.n_coord ) + m_n_drawoffset_y );
2642   DebugMesh( COORD_X( m_packet.FlatRectangle.n_coord ) + m_n_drawoffset_x + SIZE_W( m_packet.FlatRectangle.n_size ), COORD_Y( m_packet.FlatRectangle.n_coord ) + m_n_drawoffset_y );
2643   DebugMesh( COORD_X( m_packet.FlatRectangle.n_coord ) + m_n_drawoffset_x, COORD_Y( m_packet.FlatRectangle.n_coord ) + m_n_drawoffset_y + SIZE_H( m_packet.FlatRectangle.n_size ) );
2644   DebugMesh( COORD_X( m_packet.FlatRectangle.n_coord ) + m_n_drawoffset_x + SIZE_W( m_packet.FlatRectangle.n_size ), COORD_Y( m_packet.FlatRectangle.n_coord ) + m_n_drawoffset_y + SIZE_H( m_packet.FlatRectangle.n_size ) );
2641   DebugMesh( Machine, COORD_X( m_packet.FlatRectangle.n_coord ) + m_n_drawoffset_x, COORD_Y( m_packet.FlatRectangle.n_coord ) + m_n_drawoffset_y );
2642   DebugMesh( Machine, COORD_X( m_packet.FlatRectangle.n_coord ) + m_n_drawoffset_x + SIZE_W( m_packet.FlatRectangle.n_size ), COORD_Y( m_packet.FlatRectangle.n_coord ) + m_n_drawoffset_y );
2643   DebugMesh( Machine, COORD_X( m_packet.FlatRectangle.n_coord ) + m_n_drawoffset_x, COORD_Y( m_packet.FlatRectangle.n_coord ) + m_n_drawoffset_y + SIZE_H( m_packet.FlatRectangle.n_size ) );
2644   DebugMesh( Machine, COORD_X( m_packet.FlatRectangle.n_coord ) + m_n_drawoffset_x + SIZE_W( m_packet.FlatRectangle.n_size ), COORD_Y( m_packet.FlatRectangle.n_coord ) + m_n_drawoffset_y + SIZE_H( m_packet.FlatRectangle.n_size ) );
26452645   DebugMeshEnd();
26462646#endif
26472647
r2844r2845
27032703   {
27042704      return;
27052705   }
2706   DebugMesh( COORD_X( m_packet.FlatRectangle8x8.n_coord ) + m_n_drawoffset_x, COORD_Y( m_packet.FlatRectangle8x8.n_coord ) + m_n_drawoffset_y );
2707   DebugMesh( COORD_X( m_packet.FlatRectangle8x8.n_coord ) + m_n_drawoffset_x + 8, COORD_Y( m_packet.FlatRectangle8x8.n_coord ) + m_n_drawoffset_y );
2708   DebugMesh( COORD_X( m_packet.FlatRectangle8x8.n_coord ) + m_n_drawoffset_x, COORD_Y( m_packet.FlatRectangle8x8.n_coord ) + m_n_drawoffset_y + 8 );
2709   DebugMesh( COORD_X( m_packet.FlatRectangle8x8.n_coord ) + m_n_drawoffset_x + 8, COORD_Y( m_packet.FlatRectangle8x8.n_coord ) + m_n_drawoffset_y + 8 );
2706   DebugMesh( Machine, COORD_X( m_packet.FlatRectangle8x8.n_coord ) + m_n_drawoffset_x, COORD_Y( m_packet.FlatRectangle8x8.n_coord ) + m_n_drawoffset_y );
2707   DebugMesh( Machine, COORD_X( m_packet.FlatRectangle8x8.n_coord ) + m_n_drawoffset_x + 8, COORD_Y( m_packet.FlatRectangle8x8.n_coord ) + m_n_drawoffset_y );
2708   DebugMesh( Machine, COORD_X( m_packet.FlatRectangle8x8.n_coord ) + m_n_drawoffset_x, COORD_Y( m_packet.FlatRectangle8x8.n_coord ) + m_n_drawoffset_y + 8 );
2709   DebugMesh( Machine, COORD_X( m_packet.FlatRectangle8x8.n_coord ) + m_n_drawoffset_x + 8, COORD_Y( m_packet.FlatRectangle8x8.n_coord ) + m_n_drawoffset_y + 8 );
27102710   DebugMeshEnd();
27112711#endif
27122712
r2844r2845
27682768   {
27692769      return;
27702770   }
2771   DebugMesh( COORD_X( m_packet.FlatRectangle16x16.n_coord ) + m_n_drawoffset_x, COORD_Y( m_packet.FlatRectangle16x16.n_coord ) + m_n_drawoffset_y );
2772   DebugMesh( COORD_X( m_packet.FlatRectangle16x16.n_coord ) + m_n_drawoffset_x + 16, COORD_Y( m_packet.FlatRectangle16x16.n_coord ) + m_n_drawoffset_y );
2773   DebugMesh( COORD_X( m_packet.FlatRectangle16x16.n_coord ) + m_n_drawoffset_x, COORD_Y( m_packet.FlatRectangle16x16.n_coord ) + m_n_drawoffset_y + 16 );
2774   DebugMesh( COORD_X( m_packet.FlatRectangle16x16.n_coord ) + m_n_drawoffset_x + 16, COORD_Y( m_packet.FlatRectangle16x16.n_coord ) + m_n_drawoffset_y + 16 );
2771   DebugMesh( Machine, COORD_X( m_packet.FlatRectangle16x16.n_coord ) + m_n_drawoffset_x, COORD_Y( m_packet.FlatRectangle16x16.n_coord ) + m_n_drawoffset_y );
2772   DebugMesh( Machine, COORD_X( m_packet.FlatRectangle16x16.n_coord ) + m_n_drawoffset_x + 16, COORD_Y( m_packet.FlatRectangle16x16.n_coord ) + m_n_drawoffset_y );
2773   DebugMesh( Machine, COORD_X( m_packet.FlatRectangle16x16.n_coord ) + m_n_drawoffset_x, COORD_Y( m_packet.FlatRectangle16x16.n_coord ) + m_n_drawoffset_y + 16 );
2774   DebugMesh( Machine, COORD_X( m_packet.FlatRectangle16x16.n_coord ) + m_n_drawoffset_x + 16, COORD_Y( m_packet.FlatRectangle16x16.n_coord ) + m_n_drawoffset_y + 16 );
27752775   DebugMeshEnd();
27762776#endif
27772777
r2844r2845
28442844   {
28452845      return;
28462846   }
2847   DebugMesh( COORD_X( m_packet.FlatTexturedRectangle.n_coord ) + m_n_drawoffset_x, COORD_Y( m_packet.FlatTexturedRectangle.n_coord ) + m_n_drawoffset_y );
2848   DebugMesh( COORD_X( m_packet.FlatTexturedRectangle.n_coord ) + m_n_drawoffset_x + SIZE_W( m_packet.FlatTexturedRectangle.n_size ), COORD_Y( m_packet.FlatTexturedRectangle.n_coord ) + m_n_drawoffset_y );
2849   DebugMesh( COORD_X( m_packet.FlatTexturedRectangle.n_coord ) + m_n_drawoffset_x, COORD_Y( m_packet.FlatTexturedRectangle.n_coord ) + m_n_drawoffset_y + SIZE_H( m_packet.FlatTexturedRectangle.n_size ) );
2850   DebugMesh( COORD_X( m_packet.FlatTexturedRectangle.n_coord ) + m_n_drawoffset_x + SIZE_W( m_packet.FlatTexturedRectangle.n_size ), COORD_Y( m_packet.FlatTexturedRectangle.n_coord ) + m_n_drawoffset_y + SIZE_H( m_packet.FlatTexturedRectangle.n_size ) );
2847   DebugMesh( Machine, COORD_X( m_packet.FlatTexturedRectangle.n_coord ) + m_n_drawoffset_x, COORD_Y( m_packet.FlatTexturedRectangle.n_coord ) + m_n_drawoffset_y );
2848   DebugMesh( Machine, COORD_X( m_packet.FlatTexturedRectangle.n_coord ) + m_n_drawoffset_x + SIZE_W( m_packet.FlatTexturedRectangle.n_size ), COORD_Y( m_packet.FlatTexturedRectangle.n_coord ) + m_n_drawoffset_y );
2849   DebugMesh( Machine, COORD_X( m_packet.FlatTexturedRectangle.n_coord ) + m_n_drawoffset_x, COORD_Y( m_packet.FlatTexturedRectangle.n_coord ) + m_n_drawoffset_y + SIZE_H( m_packet.FlatTexturedRectangle.n_size ) );
2850   DebugMesh( Machine, COORD_X( m_packet.FlatTexturedRectangle.n_coord ) + m_n_drawoffset_x + SIZE_W( m_packet.FlatTexturedRectangle.n_size ), COORD_Y( m_packet.FlatTexturedRectangle.n_coord ) + m_n_drawoffset_y + SIZE_H( m_packet.FlatTexturedRectangle.n_size ) );
28512851   DebugMeshEnd();
28522852#endif
28532853
r2844r2845
29422942   {
29432943      return;
29442944   }
2945   DebugMesh( COORD_X( m_packet.Sprite8x8.n_coord ) + m_n_drawoffset_x, COORD_Y( m_packet.Sprite8x8.n_coord ) + m_n_drawoffset_y );
2946   DebugMesh( COORD_X( m_packet.Sprite8x8.n_coord ) + m_n_drawoffset_x + 7, COORD_Y( m_packet.Sprite8x8.n_coord ) + m_n_drawoffset_y );
2947   DebugMesh( COORD_X( m_packet.Sprite8x8.n_coord ) + m_n_drawoffset_x, COORD_Y( m_packet.Sprite8x8.n_coord ) + m_n_drawoffset_y + 7 );
2948   DebugMesh( COORD_X( m_packet.Sprite8x8.n_coord ) + m_n_drawoffset_x + 7, COORD_Y( m_packet.Sprite8x8.n_coord ) + m_n_drawoffset_y + 7 );
2945   DebugMesh( Machine, COORD_X( m_packet.Sprite8x8.n_coord ) + m_n_drawoffset_x, COORD_Y( m_packet.Sprite8x8.n_coord ) + m_n_drawoffset_y );
2946   DebugMesh( Machine, COORD_X( m_packet.Sprite8x8.n_coord ) + m_n_drawoffset_x + 7, COORD_Y( m_packet.Sprite8x8.n_coord ) + m_n_drawoffset_y );
2947   DebugMesh( Machine, COORD_X( m_packet.Sprite8x8.n_coord ) + m_n_drawoffset_x, COORD_Y( m_packet.Sprite8x8.n_coord ) + m_n_drawoffset_y + 7 );
2948   DebugMesh( Machine, COORD_X( m_packet.Sprite8x8.n_coord ) + m_n_drawoffset_x + 7, COORD_Y( m_packet.Sprite8x8.n_coord ) + m_n_drawoffset_y + 7 );
29492949   DebugMeshEnd();
29502950#endif
29512951
r2844r2845
30403040   {
30413041      return;
30423042   }
3043   DebugMesh( COORD_X( m_packet.Sprite16x16.n_coord ) + m_n_drawoffset_x, COORD_Y( m_packet.Sprite16x16.n_coord ) + m_n_drawoffset_y );
3044   DebugMesh( COORD_X( m_packet.Sprite16x16.n_coord ) + m_n_drawoffset_x + 7, COORD_Y( m_packet.Sprite16x16.n_coord ) + m_n_drawoffset_y );
3045   DebugMesh( COORD_X( m_packet.Sprite16x16.n_coord ) + m_n_drawoffset_x, COORD_Y( m_packet.Sprite16x16.n_coord ) + m_n_drawoffset_y + 7 );
3046   DebugMesh( COORD_X( m_packet.Sprite16x16.n_coord ) + m_n_drawoffset_x + 7, COORD_Y( m_packet.Sprite16x16.n_coord ) + m_n_drawoffset_y + 7 );
3043   DebugMesh( Machine, COORD_X( m_packet.Sprite16x16.n_coord ) + m_n_drawoffset_x, COORD_Y( m_packet.Sprite16x16.n_coord ) + m_n_drawoffset_y );
3044   DebugMesh( Machine, COORD_X( m_packet.Sprite16x16.n_coord ) + m_n_drawoffset_x + 7, COORD_Y( m_packet.Sprite16x16.n_coord ) + m_n_drawoffset_y );
3045   DebugMesh( Machine, COORD_X( m_packet.Sprite16x16.n_coord ) + m_n_drawoffset_x, COORD_Y( m_packet.Sprite16x16.n_coord ) + m_n_drawoffset_y + 7 );
3046   DebugMesh( Machine, COORD_X( m_packet.Sprite16x16.n_coord ) + m_n_drawoffset_x + 7, COORD_Y( m_packet.Sprite16x16.n_coord ) + m_n_drawoffset_y + 7 );
30473047   DebugMeshEnd();
30483048#endif
30493049
r2844r2845
31133113   {
31143114      return;
31153115   }
3116   DebugMesh( COORD_X( m_packet.Dot.vertex.n_coord ) + m_n_drawoffset_x, COORD_Y( m_packet.Dot.vertex.n_coord ) + m_n_drawoffset_y );
3116   DebugMesh( Machine, COORD_X( m_packet.Dot.vertex.n_coord ) + m_n_drawoffset_x, COORD_Y( m_packet.Dot.vertex.n_coord ) + m_n_drawoffset_y );
31173117   DebugMeshEnd();
31183118#endif
31193119
r2844r2845
31513151   {
31523152      return;
31533153   }
3154   DebugMesh( COORD_X( m_packet.MoveImage.vertex[ 1 ].n_coord ), COORD_Y( m_packet.MoveImage.vertex[ 1 ].n_coord ) );
3155   DebugMesh( COORD_X( m_packet.MoveImage.vertex[ 1 ].n_coord ) + SIZE_W( m_packet.MoveImage.n_size ), COORD_Y( m_packet.MoveImage.vertex[ 1 ].n_coord ) );
3156   DebugMesh( COORD_X( m_packet.MoveImage.vertex[ 1 ].n_coord ), COORD_Y( m_packet.MoveImage.vertex[ 1 ].n_coord ) + SIZE_H( m_packet.MoveImage.n_size ) );
3157   DebugMesh( COORD_X( m_packet.MoveImage.vertex[ 1 ].n_coord ) + SIZE_W( m_packet.MoveImage.n_size ), COORD_Y( m_packet.MoveImage.vertex[ 1 ].n_coord ) + SIZE_H( m_packet.MoveImage.n_size ) );
3154   DebugMesh( Machine, COORD_X( m_packet.MoveImage.vertex[ 1 ].n_coord ), COORD_Y( m_packet.MoveImage.vertex[ 1 ].n_coord ) );
3155   DebugMesh( Machine, COORD_X( m_packet.MoveImage.vertex[ 1 ].n_coord ) + SIZE_W( m_packet.MoveImage.n_size ), COORD_Y( m_packet.MoveImage.vertex[ 1 ].n_coord ) );
3156   DebugMesh( Machine, COORD_X( m_packet.MoveImage.vertex[ 1 ].n_coord ), COORD_Y( m_packet.MoveImage.vertex[ 1 ].n_coord ) + SIZE_H( m_packet.MoveImage.n_size ) );
3157   DebugMesh( Machine, COORD_X( m_packet.MoveImage.vertex[ 1 ].n_coord ) + SIZE_W( m_packet.MoveImage.n_size ), COORD_Y( m_packet.MoveImage.vertex[ 1 ].n_coord ) + SIZE_H( m_packet.MoveImage.n_size ) );
31583158   DebugMeshEnd();
31593159#endif
31603160
r2844r2845
38983898INTERRUPT_GEN( psx_vblank )
38993899{
39003900#if defined( MAME_DEBUG )
3901   DebugCheckKeys();
3901   DebugCheckKeys(machine);
39023902#endif
39033903
39043904   m_n_gpustatus ^= ( 1L << 31 );
39053905   psx_irq_set( machine, 0x0001 );
39063906}
39073907
3908void psx_gpu_reset( void )
3908void psx_gpu_reset( running_machine *machine )
39093909{
3910   psx_gpu_w( Machine, 1, 0, 0xffffffff );
3910   psx_gpu_w( machine, 1, 0, 0xffffffff );
39113911}
39123912
39133913void psx_lightgun_set( int n_x, int n_y )
src/mame/video/beezer.c
r2844r2845
11#include "driver.h"
22#include "cpu/m6809/m6809.h"
33#include "machine/6522via.h"
4#include "includes/beezer.h"
45
56static int scanline=0;
67
src/mame/video/vdc.c
r2844r2845
11#include "driver.h"
2#include "deprecat.h"
32#include "video/vdc.h"
43
54/* VDC segments */
r2844r2845
7776static void draw_sgx_overscan_line(int line);
7877static void pce_refresh_line(int which, int line, int external_input, UINT8 *drawn, UINT16 *line_buffer);
7978static void pce_refresh_sprites(running_machine *machine, int which, int line, UINT8 *drawn, UINT16 *line_buffer);
80static void vdc_do_dma(int which);
79static void vdc_do_dma(running_machine *machine, int which);
8180static void vpc_init( running_machine *machine );
8281
8382INTERRUPT_GEN( pce_interrupt )
r2844r2845
445444}
446445
447446
448static void vdc_w( int which, offs_t offset, UINT8 data )
447static void vdc_w( running_machine *machine, int which, offs_t offset, UINT8 data )
449448{
450449   switch(offset&3)
451450   {
r2844r2845
520519               break;
521520
522521            case LENR:
523               vdc_do_dma( which );
522               vdc_do_dma( machine, which );
524523               break;
525524            case SOUR:
526525//                  logerror("SOUR MSB = %02X\n", data);
r2844r2845
533532   }
534533}
535534
536static UINT8 vdc_r( int which, offs_t offset )
535static UINT8 vdc_r( running_machine *machine, int which, offs_t offset )
537536{
538537   int temp = 0;
539538   switch(offset&3)
r2844r2845
541540      case 0x00:
542541         temp = vdc[which].status;
543542         vdc[which].status &= ~(VDC_VD | VDC_RR | VDC_CR | VDC_OR | VDC_DS);
544         cpunum_set_input_line(Machine, 0,0,CLEAR_LINE);
543         cpunum_set_input_line(machine, 0,0,CLEAR_LINE);
545544         break;
546545
547546      case 0x02:
r2844r2845
558557   return (temp);
559558}
560559
561WRITE8_HANDLER( vdc_0_w ) {   vdc_w( 0, offset, data ); }
562WRITE8_HANDLER( vdc_1_w ) {   vdc_w( 1, offset, data ); }
563READ8_HANDLER( vdc_0_r ) {   return vdc_r( 0, offset ); }
564READ8_HANDLER( vdc_1_r ) {   return vdc_r( 1, offset ); }
560WRITE8_HANDLER( vdc_0_w ) {   vdc_w( machine, 0, offset, data ); }
561WRITE8_HANDLER( vdc_1_w ) {   vdc_w( machine, 1, offset, data ); }
562READ8_HANDLER( vdc_0_r ) {   return vdc_r( machine, 0, offset ); }
563READ8_HANDLER( vdc_1_r ) {   return vdc_r( machine, 1, offset ); }
565564
566565PALETTE_INIT( vce ) {
567566   int i;
r2844r2845
946945   }
947946}
948947
949static void vdc_do_dma(int which)
948static void vdc_do_dma(running_machine *machine, int which)
950949{
951950   int src = vdc[which].vdc_data[SOUR].w;
952951   int dst = vdc[which].vdc_data[DESR].w;
r2844r2845
981980   vdc[which].vdc_data[LENR].w = len;
982981   if(dvc)
983982   {
984      cpunum_set_input_line(Machine, 0, 0, ASSERT_LINE);
983      cpunum_set_input_line(machine, 0, 0, ASSERT_LINE);
985984   }
986985
987986}
src/mame/video/kaneko16.c
r2844r2845
221221VIDEO_START( sandscrp_1xVIEW2 )
222222{
223223   VIDEO_START_CALL(kaneko16_1xVIEW2);
224   pandora_start(0,0,0);
224   pandora_start(machine,0,0,0);
225225
226226   tilemap_set_scrolldy( kaneko16_tmap_0, 0, 256 - 1 );
227227   tilemap_set_scrolldy( kaneko16_tmap_1, 0, 256 - 1 );
src/mame/video/ms32.c
r2844r2845
1313
1414
1515#include "driver.h"
16#include "deprecat.h"
1716#include "includes/ms32.h"
1817
1918
r2844r2845
10099/********** PALETTE WRITES **********/
101100
102101
103static void update_color(int color)
102static void update_color(running_machine *machine, int color)
104103{
105104   int r,g,b;
106105
r2844r2845
121120      b = ((ms32_palram[color*2+1] & 0x00ff) >>0 );
122121   }
123122
124   palette_set_color(Machine,color,MAKE_RGB(r,g,b));
123   palette_set_color(machine,color,MAKE_RGB(r,g,b));
125124}
126125
127126WRITE32_HANDLER( ms32_brightness_w )
r2844r2845
141140         brt_b = 0x100 - ((brt[1] & 0x00ff) >> 0);
142141
143142         for (i = 0;i < 0x3000;i++)   // colors 0x3000-0x3fff are not used
144            update_color(i);
143            update_color(machine, i);
145144      }
146145   }
147146
r2844r2845
152151{
153152   COMBINE_DATA(&ms32_palram[offset]);
154153
155   update_color(offset/2);
154   update_color(machine, offset/2);
156155}
157156
158157
src/mame/video/darkseal.c
r2844r2845
8686***************************************************************************/
8787
8888#include "driver.h"
89#include "deprecat.h"
9089
9190UINT16 *darkseal_pf12_row,*darkseal_pf34_row;
9291UINT16 *darkseal_pf1_data,*darkseal_pf2_data,*darkseal_pf3_data;
r2844r2845
139138
140139/******************************************************************************/
141140
142static void update_24bitcol(int offset)
141static void update_24bitcol(running_machine *machine, int offset)
143142{
144143   int r,g,b;
145144
r2844r2845
147146   g = (paletteram16[offset] >> 8) & 0xff;
148147   b = (paletteram16_2[offset] >> 0) & 0xff;
149148
150   palette_set_color(Machine,offset,MAKE_RGB(r,g,b));
149   palette_set_color(machine,offset,MAKE_RGB(r,g,b));
151150}
152151
153152WRITE16_HANDLER( darkseal_palette_24bit_rg_w )
154153{
155154   COMBINE_DATA(&paletteram16[offset]);
156   update_24bitcol(offset);
155   update_24bitcol(machine, offset);
157156}
158157
159158WRITE16_HANDLER( darkseal_palette_24bit_b_w )
160159{
161160   COMBINE_DATA(&paletteram16_2[offset]);
162   update_24bitcol(offset);
161   update_24bitcol(machine, offset);
163162}
164163
165164/******************************************************************************/
src/mame/video/system16.c
r2844r2845
9191#include "driver.h"
9292#include "system16.h"
9393#include "video/resnet.h"
94#include "includes/genesis.h"
9495
95/* video/segac2.c */
96void system18_vdp_update( bitmap_t *bitmap, const rectangle *cliprect );
97void system18_vdp_start(running_machine *machine);
98READ16_HANDLER( segac2_vdp_r );
99WRITE16_HANDLER( segac2_vdp_w );
100UINT16 sys18_ddcrew_bankregs[0x20];
96static UINT16 sys18_ddcrew_bankregs[0x20];
10197
102
103
104
10598/* callback to poll video registers */
10699void (* sys16_update_proc)( void );
107100
src/mame/video/simpsons.c
r2844r2845
11#include "driver.h"
22#include "video/konamiic.h"
3#include "includes/simpsons.h"
34
45static int bg_colorbase,sprite_colorbase,layer_colorbase[3];
56UINT8 *simpsons_xtraram;
src/mame/video/polepos.c
r2844r2845
11#include "driver.h"
2#include "includes/polepos.h"
23
34UINT16 *polepos_view16_memory;
45UINT16 *polepos_road16_memory;
src/mame/video/model1.c
r2844r2845
11#include "driver.h"
22#include "video/segaic24.h"
3#include "includes/model1.h"
34
45#define LOG_TGP_VIDEO 0
56
src/mame/video/jackal.c
r2844r2845
99***************************************************************************/
1010
1111#include "driver.h"
12#include "includes/jackal.h"
1213
1314static UINT8 *jackal_scrollram;
1415UINT8 *jackal_videoctrl;
r2844r2845
2324   /* allocate the colortable */
2425   machine->colortable = colortable_alloc(machine, 0x200);
2526
26   for (i = 0; i < 0x1000; i++)
27   for (i = 0; i < 0x100; i++)
2728   {
28      UINT16 ctabentry = (i & 0xff) | 0x100;
29
30      /* this is surely wrong - is there a PROM missing? */
31      if (i & 0x0f)
32         ctabentry = ctabentry | (i >> 8);
33
29      UINT16 ctabentry = i | 0x100;
3430      colortable_entry_set_value(machine->colortable, i, ctabentry);
3531   }
3632
37   for (i = 0x1000; i < 0x1100; i++)
33   for (i = 0x100; i < 0x200; i++)
3834   {
39      UINT8 ctabentry = color_prom[i - 0x1000] & 0x0f;
35      UINT16 ctabentry = color_prom[i - 0x100] & 0x0f;
4036      colortable_entry_set_value(machine->colortable, i, ctabentry);
4137   }
4238
43   for (i = 0x1100; i < 0x1200; i++)
39   for (i = 0x200; i < 0x300; i++)
4440   {
45      UINT8 ctabentry = (color_prom[i - 0x1100] & 0x0f) | 0x10;
41      UINT16 ctabentry = (color_prom[i - 0x200] & 0x0f) | 0x10;
4642      colortable_entry_set_value(machine->colortable, i, ctabentry);
4743   }
4844}
r2844r2845
7470
7571   int attr = RAM[0x2000 + tile_index];
7672   int code = RAM[0x2400 + tile_index] + ((attr & 0xc0) << 2) + ((attr & 0x30) << 6);
77   int color = attr & 0x0f;
73   int color = 0;//attr & 0x0f;
7874   int flags = ((attr & 0x10) ? TILE_FLIPX : 0) | ((attr & 0x20) ? TILE_FLIPY : 0);
7975
8076   SET_TILE_INFO(0, code, color, flags);
src/mame/video/vaportra.c
r2844r2845
1010***************************************************************************/
1111
1212#include "driver.h"
13#include "deprecat.h"
1413#include "deco16ic.h"
1514
1615static UINT16 vaportra_priority[2];
r2844r2845
2524
2625VIDEO_START( vaportra )
2726{
28   deco16_2_video_init(0);
27   deco16_2_video_init(machine, 0);
2928
3029   deco16_pf1_rowscroll = 0;
3130   deco16_pf2_rowscroll = 0;
r2844r2845
5352
5453/******************************************************************************/
5554
56static void update_24bitcol(int offset)
55static void update_24bitcol(running_machine *machine, int offset)
5756{
5857   UINT8 r,g,b;
5958
r2844r2845
6160   g = (paletteram16[offset] >> 8) & 0xff;
6261   b = (paletteram16_2[offset] >> 0) & 0xff;
6362
64   palette_set_color(Machine,offset,MAKE_RGB(r,g,b));
63   palette_set_color(machine,offset,MAKE_RGB(r,g,b));
6564}
6665
6766WRITE16_HANDLER( vaportra_palette_24bit_rg_w )
6867{
6968   COMBINE_DATA(&paletteram16[offset]);
70   update_24bitcol(offset);
69   update_24bitcol(machine, offset);
7170}
7271
7372WRITE16_HANDLER( vaportra_palette_24bit_b_w )
7473{
7574   COMBINE_DATA(&paletteram16_2[offset]);
76   update_24bitcol(offset);
75   update_24bitcol(machine, offset);
7776}
7877
7978/******************************************************************************/
src/mame/video/btime.c
r2844r2845
99***************************************************************************/
1010
1111#include "driver.h"
12#include "includes/btime.h"
1213
1314
1415UINT8 *btime_videoram;
r2844r2845
292293    /* For now we just check 0x40 in DSW1, and ignore the write if we */
293294    /* are in upright controls mode. */
294295
295    if (input_port_read_indexed(machine, 3) & 0x40) /* cocktail mode */
296    if (input_port_read(machine, "DSW1") & 0x40) /* cocktail mode */
296297        btime_video_control_w(machine, offset, data);
297298}
298299
r2844r2845
309310{
310311   btime_palette = (data >> 2) & 0x03;
311312
312   if (!(input_port_read_indexed(machine, 3) & 0x40)) /* cocktail mode */
313   if (!(input_port_read(machine, "DSW1") & 0x40)) /* cocktail mode */
313314   {
314315      flip_screen_set(data & 0x01);
315316   }
src/mame/video/taitoic.h
r2844r2845
44
55extern const int TC0100SCN_SINGLE_VDU;   /* value set in taitoic.c */
66
7extern UINT8 TC0360PRI_regs[16];
8
9extern UINT16   *TC0080VCO_chain_ram_0;
10extern UINT16   *TC0080VCO_chain_ram_1;
11extern UINT16   *TC0080VCO_spriteram;
12extern UINT16   *TC0080VCO_scroll_ram;
13extern int   TC0080VCO_flipscreen;
14
715int number_of_TC0100SCN(void);
816int has_TC0110PCR(void);
917int has_second_TC0110PCR(void);
src/mame/video/galaxian.c
r2844r2845
423423   bullet_color[7] = MAKE_RGB(0xff,0xff,0x00);
424424}
425425
426PALETTE_INIT( moonwar )
427{
428   PALETTE_INIT_CALL(galaxian);
426429
427430
431   /* wire mod to connect the bullet blue output to the 220 ohm resistor */
432   bullet_color[7] = MAKE_RGB(0xef,0xef,0x97);
433}
434
428435/*************************************
429436 *
430437 *  Common video init
r2844r2845
13461353}
13471354
13481355
1356/*************************************
1357 *
1358 *  Calipso extensions
1359 *
1360 *************************************/
13491361
1362void calipso_extend_sprite_info(const UINT8 *base, UINT8 *sx, UINT8 *sy, UINT8 *flipx, UINT8 *flipy, UINT16 *code, UINT8 *color)
1363{
1364   /* same as the others, but no sprite flipping, but instead the bits are used
1365       as extra sprite code bits, giving 256 sprite images */
1366   /* No flips */
1367   *code = base[1];
1368   *flipx = 0;
1369   *flipy = 0;
1370}
1371
13501372/*************************************
13511373 *
13521374 *  Jumpbug extensions
src/mame/video/snk.c
r2844r2845
238238   return 0;
239239}
240240
241void athena_draw_sprites(running_machine *machine, bitmap_t *bitmap, const rectangle *cliprect, int xscroll, int yscroll )
241static void athena_draw_sprites(running_machine *machine, bitmap_t *bitmap, const rectangle *cliprect, int xscroll, int yscroll )
242242{
243243   const gfx_element *gfx = machine->gfx[2];
244244
src/mame/video/flstory.c
r2844r2845
66
77***************************************************************************/
88#include "driver.h"
9#include "includes/flstory.h"
910
1011
1112static tilemap *bg_tilemap;
src/mame/video/calomega.c
r2844r2845
4545   if (attr == 0x3a)   /* Is the palette wrong? */
4646      color = 0x3b;   /* 0x3b is the best match */
4747
48   if (attr == 0x36)   /* Is the palette wrong? */
49      color = 0x3a;   /* 0x3a is the best match */
50
51   if (attr == 0x32)   /* Is the palette wrong? */
52      color = 0x39;   /* 0x39 is the best match */
53
4854   SET_TILE_INFO(bank, code, color, 0);
4955}
5056
r2844r2845
6672    ---- ---x   red component.
6773    ---- --x-   green component.
6874    ---- -x--   blue component.
69    ---- x---   unknown, aparently unused.
70    xxxx ----   unused.
75    xxxx x---   unused.
7176*/
7277   int i;
7378
src/mame/video/tia.c
r2844r2845
55***************************************************************************/
66
77#include "driver.h"
8#include "deprecat.h"
98#include "tia.h"
109#include "sound/tiaintf.h"
1110
r2844r2845
19801979
19811980
19821981
1983void tia_init(const struct tia_interface* ti)
1982void tia_init(running_machine *machine, const struct tia_interface* ti)
19841983{
1985   assert_always(mame_get_phase(Machine) == MAME_PHASE_INIT, "Can only call tia_init at init time!");
1984   assert_always(mame_get_phase(machine) == MAME_PHASE_INIT, "Can only call tia_init at init time!");
19861985
19871986   if ( ti ) {
19881987      tia_read_input_port = ti->read_input_port;
r2844r2845
19941993      tia_vsync_callback = NULL;
19951994   }
19961995
1997   tia_reset( Machine );
1996   tia_reset( machine );
19981997
1999   add_reset_callback(Machine, tia_reset);
1998   add_reset_callback(machine, tia_reset);
20001999}
20012000
src/mame/video/tia.h
r2844r2845
2121READ8_HANDLER( tia_r );
2222WRITE8_HANDLER( tia_w );
2323
24void tia_init(const struct tia_interface* ti);
24void tia_init(running_machine *machine, const struct tia_interface* ti);
2525
2626#endif /* _VIDEO_TIA_H_ */
src/mame/video/leland.c
r2844r2845
77***************************************************************************/
88
99#include "driver.h"
10#include "deprecat.h"
1110#include "leland.h"
1211
1312
r2844r2845
191190 *
192191 *************************************/
193192
194static void leland_vram_port_w(int offset, int data, int num)
193static void leland_vram_port_w(running_machine *machine, int offset, int data, int num)
195194{
196195   struct vram_state_data *state = vram_state + num;
197196   int addr = state->addr;
r2844r2845
200199
201200   /* don't fully understand why this is needed.  Isn't the
202201       video RAM just one big RAM? */
203   int scanline = video_screen_get_vpos(Machine->primary_screen);
202   int scanline = video_screen_get_vpos(machine->primary_screen);
204203   if (scanline > 0)
205      video_screen_update_partial(Machine->primary_screen, scanline - 1);
204      video_screen_update_partial(machine->primary_screen, scanline - 1);
206205
207206   if (LOG_COMM && addr >= 0xf000)
208207      logerror("%04X:%s comm write %04X = %02X\n", activecpu_get_previouspc(), num ? "slave" : "master", addr, data);
r2844r2845
284283   int num = (param >> 16) & 1;
285284   int offset = (param >> 8) & 0xff;
286285   int data = param & 0xff;
287   leland_vram_port_w(offset, data, num);
286   leland_vram_port_w(machine, offset, data, num);
288287}
289288
290289
r2844r2845
315314
316315WRITE8_HANDLER( leland_svram_port_w )
317316{
318   leland_vram_port_w(offset, data, 1);
317   leland_vram_port_w(machine, offset, data, 1);
319318}
320319
321320
r2844r2845
342341WRITE8_HANDLER( ataxx_svram_port_w )
343342{
344343   offset = ((offset >> 1) & 0x07) | ((offset << 3) & 0x08) | (offset & 0x10);
345   leland_vram_port_w(offset, data, 1);
344   leland_vram_port_w(machine, offset, data, 1);
346345}
347346
348347
src/mame/video/blockade.c
r2844r2845
88   videoram[offset] = data;
99   tilemap_mark_tile_dirty(bg_tilemap, offset);
1010
11   if (input_port_read_indexed(machine, 3) & 0x80)
11   if (input_port_read(machine, "IN3") & 0x80)
1212   {
1313      logerror("blockade_videoram_w: scanline %d\n", video_screen_get_vpos(machine->primary_screen));
1414      cpu_spinuntil_int();
src/mame/video/segag80r.c
r2844r2845
55***************************************************************************/
66
77#include "driver.h"
8#include "deprecat.h"
98#include "segag80r.h"
109#include "rescap.h"
1110#include "video/resnet.h"
r2844r2845
8988 *
9089 *************************************/
9190
92static void g80_set_palette_entry(int entry, UINT8 data)
91static void g80_set_palette_entry(running_machine *machine, int entry, UINT8 data)
9392{
9493   int bit0, bit1, bit2;
9594   int r, g, b;
r2844r2845
116115   bit1 = (b >> 1) & 0x01;
117116   b = combine_2_weights(bweights, bit0, bit1);
118117
119   palette_set_color(Machine, entry, MAKE_RGB(r, g, b));
118   palette_set_color(machine, entry, MAKE_RGB(r, g, b));
120119}
121120
122121
r2844r2845
280279   {
281280      offset &= 0x3f;
282281      paletteram[offset] = data;
283      g80_set_palette_entry(offset, data);
282      g80_set_palette_entry(machine, offset, data);
284283      return;
285284   }
286285
r2844r2845
444443   {
445444      offs_t paloffs = offset & 0x3f;
446445      paletteram[paloffs | 0x40] = data;
447      g80_set_palette_entry(paloffs | 0x40, data);
446      g80_set_palette_entry(machine, paloffs | 0x40, data);
448447      /* note that since the background board is not integrated with the main board */
449448      /* writes here also write through to regular videoram */
450449   }
r2844r2845
514513   {
515514      offs_t paloffs = offset & 0x3f;
516515      paletteram[paloffs | 0x40] = data;
517      g80_set_palette_entry(paloffs | 0x40, data);
516      g80_set_palette_entry(machine, paloffs | 0x40, data);
518517      return;
519518   }
520519
r2844r2845
597596   {
598597      offs_t paloffs = offset & 0x3f;
599598      paletteram[paloffs | 0x40] = data;
600      g80_set_palette_entry(paloffs | 0x40, data);
599      g80_set_palette_entry(machine, paloffs | 0x40, data);
601600      return;
602601   }
603602
src/mame/video/dc.c
r2844r2845
44*/
55
66#include "driver.h"
7#include "deprecat.h"
87#include "dc.h"
98#include "cpu/sh4/sh4.h"
109
r2844r2845
662661   return 0;
663662}
664663
665void dc_vblank(void)
664void dc_vblank(running_machine *machine)
666665{
667666   dc_sysctrl_regs[SB_ISTNRM] |= IST_VBL_IN; // V Blank-in interrupt
668667   update_interrupt_status();
669668
670   timer_adjust_oneshot(vbout_timer, video_screen_get_time_until_pos(Machine->primary_screen, 0, 0), 0);
669   timer_adjust_oneshot(vbout_timer, video_screen_get_time_until_pos(machine->primary_screen, 0, 0), 0);
671670}
672671
src/mame/video/taitojc.c
r2844r2845
11#include "driver.h"
2#include "deprecat.h"
32#include "video/poly.h"
43
54UINT8 *taitojc_texture;
r2844r2845
428427   }
429428}
430429
431void taitojc_render_polygons(UINT16 *polygon_fifo, int length)
430void taitojc_render_polygons(running_machine *machine, UINT16 *polygon_fifo, int length)
432431{
433432   poly_vertex vert[4];
434433   int i;
r2844r2845
496495
497496            if (vert[0].p[0] < 0x8000 && vert[1].p[0] < 0x8000 && vert[2].p[0] < 0x8000)
498497            {
499               poly_render_triangle(poly, framebuffer, video_screen_get_visible_area(Machine->primary_screen), render_texture_scan, 4, &vert[0], &vert[1], &vert[2]);
498               poly_render_triangle(poly, framebuffer, video_screen_get_visible_area(machine->primary_screen), render_texture_scan, 4, &vert[0], &vert[1], &vert[2]);
500499            }
501500            break;
502501         }
r2844r2845
544543                  vert[2].p[1] == vert[3].p[1])
545544               {
546545                  // optimization: all colours the same -> render solid
547                  poly_render_quad(poly, framebuffer, video_screen_get_visible_area(Machine->primary_screen), render_solid_scan, 2, &vert[0], &vert[1], &vert[2], &vert[3]);
546                  poly_render_quad(poly, framebuffer, video_screen_get_visible_area(machine->primary_screen), render_solid_scan, 2, &vert[0], &vert[1], &vert[2], &vert[3]);
548547               }
549548               else
550549               {
551                  poly_render_quad(poly, framebuffer, video_screen_get_visible_area(Machine->primary_screen), render_shade_scan, 2, &vert[0], &vert[1], &vert[2], &vert[3]);
550                  poly_render_quad(poly, framebuffer, video_screen_get_visible_area(machine->primary_screen), render_shade_scan, 2, &vert[0], &vert[1], &vert[2], &vert[3]);
552551               }
553552            }
554553            break;
r2844r2845
614613
615614            if (vert[0].p[0] < 0x8000 && vert[1].p[0] < 0x8000 && vert[2].p[0] < 0x8000 && vert[3].p[0] < 0x8000)
616615            {
617               poly_render_quad(poly, framebuffer, video_screen_get_visible_area(Machine->primary_screen), render_texture_scan, 4, &vert[0], &vert[1], &vert[2], &vert[3]);
616               poly_render_quad(poly, framebuffer, video_screen_get_visible_area(machine->primary_screen), render_texture_scan, 4, &vert[0], &vert[1], &vert[2], &vert[3]);
618617            }
619618            break;
620619         }
r2844r2845
632631   poly_wait(poly, "Finished render");
633632}
634633
635void taitojc_clear_frame(void)
634void taitojc_clear_frame(running_machine *machine)
636635{
637636   rectangle cliprect;
638637
639638   cliprect.min_x = 0;
640639   cliprect.min_y = 0;
641   cliprect.max_x = video_screen_get_width(Machine->primary_screen) - 1;
642   cliprect.max_y = video_screen_get_height(Machine->primary_screen) - 1;
640   cliprect.max_x = video_screen_get_width(machine->primary_screen) - 1;
641   cliprect.max_y = video_screen_get_height(machine->primary_screen) - 1;
643642
644643   fillbitmap(framebuffer, 0, &cliprect);
645644   fillbitmap(zbuffer, 0xffff, &cliprect);
src/mame/video/pitnrun.c
r2844r2845
1717
1818***************************************************************************/
1919#include "driver.h"
20#include "includes/pitnrun.h"
2021
2122static int pitnrun_h_heed;
2223static int pitnrun_v_heed;
src/mame/video/segaic16.c
r2844r2845
493493 *
494494 *************************************/
495495
496void segaic16_set_display_enable(int enable)
496void segaic16_set_display_enable(running_machine *machine, int enable)
497497{
498498   enable = (enable != 0);
499499   if (segaic16_display_enable != enable)
500500   {
501      video_screen_update_partial(Machine->primary_screen, video_screen_get_vpos(Machine->primary_screen));
501      video_screen_update_partial(machine->primary_screen, video_screen_get_vpos(machine->primary_screen));
502502      segaic16_display_enable = enable;
503503   }
504504}
src/mame/video/midzeus2.c
r2844r2845
55**************************************************************************/
66
77#include "driver.h"
8#include "deprecat.h"
98#include "eminline.h"
109#include "cpu/tms32031/tms32031.h"
1110#include "includes/midzeus.h"
r2844r2845
105104
106105static void exit_handler(running_machine *machine);
107106
108static void zeus_register32_w(offs_t offset, UINT32 data, int logit);
109static void zeus_register_update(offs_t offset, UINT32 oldval, int logit);
107static void zeus_register32_w(running_machine *machine, offs_t offset, UINT32 data, int logit);
108static void zeus_register_update(running_machine *machine, offs_t offset, UINT32 oldval, int logit);
110109static void zeus_pointer_write(UINT8 which, UINT32 value);
111static int zeus_fifo_process(const UINT32 *data, int numwords);
112static void zeus_draw_model(UINT32 baseaddr, UINT16 count, int logit);
110static int zeus_fifo_process(running_machine *machine, const UINT32 *data, int numwords);
111static void zeus_draw_model(running_machine *machine, UINT32 baseaddr, UINT16 count, int logit);
113112static void zeus_draw_quad(const UINT32 *databuffer, UINT32 texoffs, int logit);
114113static void render_poly_8bit(void *dest, INT32 scanline, const poly_extent *extent, const void *extradata, int threadid);
115114
r2844r2845
475474             offset != 0x50 && offset != 0x51 && offset != 0x57 && offset != 0x58 && offset != 0x59 && offset != 0x5a && offset != 0x5e);
476475   if (logit)
477476      logerror("%06X:zeus2_w", activecpu_get_pc());
478   zeus_register32_w(offset, data, logit);
477   zeus_register32_w(machine, offset, data, logit);
479478}
480479
481480
r2844r2845
486485 *
487486 *************************************/
488487
489static void zeus_register32_w(offs_t offset, UINT32 data, int logit)
488static void zeus_register32_w(running_machine *machine, offs_t offset, UINT32 data, int logit)
490489{
491490   UINT32 oldval = zeusbase[offset];
492491
r2844r2845
521520      logerror("(%02X) = %08X\n", offset, data);
522521
523522   /* handle the update */
524   zeus_register_update(offset, oldval, logit);
523   zeus_register_update(machine, offset, oldval, logit);
525524}
526525
527526
r2844r2845
532531 *
533532 *************************************/
534533
535static void zeus_register_update(offs_t offset, UINT32 oldval, int logit)
534static void zeus_register_update(running_machine *machine, offs_t offset, UINT32 oldval, int logit)
536535{
537536   /* handle the writes; only trigger on low accesses */
538537   switch (offset)
539538   {
540539      case 0x08:
541540         zeus_fifo[zeus_fifo_words++] = zeusbase[0x08];
542         if (zeus_fifo_process(zeus_fifo, zeus_fifo_words))
541         if (zeus_fifo_process(machine, zeus_fifo, zeus_fifo_words))
543542            zeus_fifo_words = 0;
544543
545544         /* set the interrupt signal to indicate we can handle more */
r2844r2845
562561      case 0x35:
563562      case 0x36:
564563      case 0x37:
565         video_screen_update_partial(Machine->primary_screen, video_screen_get_vpos(Machine->primary_screen));
564         video_screen_update_partial(machine->primary_screen, video_screen_get_vpos(machine->primary_screen));
566565         {
567566            int vtotal = zeusbase[0x37] & 0xffff;
568567            int htotal = zeusbase[0x34] >> 16;
r2844r2845
574573            visarea.max_y = zeusbase[0x35] & 0xffff;
575574            if (htotal > 0 && vtotal > 0 && visarea.min_x < visarea.max_x && visarea.max_y < vtotal)
576575            {
577               video_screen_configure(Machine->primary_screen, htotal, vtotal, &visarea, HZ_TO_ATTOSECONDS((double)MIDZEUS_VIDEO_CLOCK / 4.0 / (htotal * vtotal)));
576               video_screen_configure(machine->primary_screen, htotal, vtotal, &visarea, HZ_TO_ATTOSECONDS((double)MIDZEUS_VIDEO_CLOCK / 4.0 / (htotal * vtotal)));
578577               zeus_cliprect = visarea;
579578               zeus_cliprect.max_x -= zeus_cliprect.min_x;
580579               zeus_cliprect.min_x = 0;
r2844r2845
586585         {
587586            UINT32 temp = zeusbase[0x38];
588587            zeusbase[0x38] = oldval;
589            video_screen_update_partial(Machine->primary_screen, video_screen_get_vpos(Machine->primary_screen));
588            video_screen_update_partial(machine->primary_screen, video_screen_get_vpos(machine->primary_screen));
590589            log_fifo = input_code_pressed(KEYCODE_L);
591590            zeusbase[0x38] = temp;
592591         }
r2844r2845
778777 *
779778 *************************************/
780779
781static int zeus_fifo_process(const UINT32 *data, int numwords)
780static int zeus_fifo_process(running_machine *machine, const UINT32 *data, int numwords)
782781{
783782   int dataoffs = 0;
784783
r2844r2845
792791         if (log_fifo)
793792            log_fifo_command(data, numwords, " -- reg32");
794793         if (((data[0] >> 16) & 0x7f) != 0x08)
795            zeus_register32_w((data[0] >> 16) & 0x7f, data[1], log_fifo);
794            zeus_register32_w(machine, (data[0] >> 16) & 0x7f, data[1], log_fifo);
796795         break;
797796
798797      /* 0x08: set matrix and point (thegrid) */
r2844r2845
891890            return FALSE;
892891         if (log_fifo)
893892            log_fifo_command(data, numwords, "");
894         zeus_draw_model(data[1], data[0] & 0xffff, log_fifo);
893         zeus_draw_model(machine, data[1], data[0] & 0xffff, log_fifo);
895894         break;
896895
897896      /* 0x31: sync pipeline? (thegrid) */
r2844r2845
937936 *
938937 *************************************/
939938
940static void zeus_draw_model(UINT32 baseaddr, UINT16 count, int logit)
939static void zeus_draw_model(running_machine *machine, UINT32 baseaddr, UINT16 count, int logit)
941940{
942941   UINT32 databuffer[32];
943942   int databufcount = 0;
r2844r2845
10091008               case 0x36:   /* crusnexo */
10101009                  if (logit)
10111010                     logerror("reg32");
1012                  zeus_register32_w((databuffer[0] >> 16) & 0x7f, databuffer[1], logit);
1011                  zeus_register32_w(machine, (databuffer[0] >> 16) & 0x7f, databuffer[1], logit);
10131012                  break;
10141013
10151014               case 0x38:   /* crusnexo/thegrid */
src/mame/video/segaic16.h
r2844r2845
1414extern UINT16 *segaic16_rotateram_0;
1515
1616/* misc functions */
17void segaic16_set_display_enable(int enable);
17void segaic16_set_display_enable(running_machine *machine, int enable);
1818
1919/* palette handling */
2020void segaic16_palette_init(int entries);
src/mame/video/citycon.c
r2844r2845
77***************************************************************************/
88
99#include "driver.h"
10#include "deprecat.h"
1110
1211
1312
r2844r2845
137136}
138137
139138
140INLINE void changecolor_RRRRGGGGBBBBxxxx(int color,int indx)
139INLINE void changecolor_RRRRGGGGBBBBxxxx(running_machine *machine, int color,int indx)
141140{
142141   int data = paletteram[2*indx | 1] | (paletteram[2*indx] << 8);
143   palette_set_color_rgb(Machine,color,pal4bit(data >> 12),pal4bit(data >> 8),pal4bit(data >> 4));
142   palette_set_color_rgb(machine,color,pal4bit(data >> 12),pal4bit(data >> 8),pal4bit(data >> 4));
144143}
145144
146145VIDEO_UPDATE( citycon )
r2844r2845
155154      int i;
156155
157156      for (i = 0;i < 4;i++)
158         changecolor_RRRRGGGGBBBBxxxx(640 + 4*offs + i,512 + 4*indx + i);
157         changecolor_RRRRGGGGBBBBxxxx(screen->machine, 640 + 4*offs + i,512 + 4*indx + i);
159158   }
160159
161160
src/mame/video/ampoker2.c
r2844r2845
2121    ampkr2b3   clone      American Poker II (bootleg, set 3).
2222    pkrdewin   clone      Poker De Win.
2323    ampkr95    clone      American Poker 95.
24    videomat   clone      Videomat (polish bootleg).
2425    sigmapkr   parent     Sigma Poker.
2526    sigma2k    parent     Sigma Poker 2000.
2627
src/mame/video/esd16.c
r2844r2845
6868static tilemap *esdtilemap_0;
6969static tilemap *esdtilemap_1;
7070tilemap *esdtilemap_1_16x16;
71tilemap *esdtilemap_0_16x16;
7172
7273static TILE_GET_INFO( get_tile_info_0 )
7374{
r2844r2845
7980         0);
8081}
8182
83static TILE_GET_INFO( get_tile_info_0_16x16 )
84{
85   UINT16 code = esd16_vram_0[tile_index];
86   SET_TILE_INFO(
87         2,
88         code,
89         esd16_tilemap0_color,
90         0);
91}
92
93
8294static TILE_GET_INFO( get_tile_info_1 )
8395{
8496   UINT16 code = esd16_vram_1[tile_index];
r2844r2845
103115{
104116   COMBINE_DATA(&esd16_vram_0[offset]);
105117   tilemap_mark_tile_dirty(esdtilemap_0,offset);
118   tilemap_mark_tile_dirty(esdtilemap_0_16x16,offset);
106119}
107120
108121WRITE16_HANDLER( esd16_vram_1_w )
r2844r2845
138151   esdtilemap_1 = tilemap_create(   get_tile_info_1, tilemap_scan_rows,
139152                           8,8,   0x80,0x40);
140153
154   /* swatpolc changes tilemap 0 to 16x16 at various times */
155   esdtilemap_0_16x16 = tilemap_create(   get_tile_info_0_16x16, tilemap_scan_rows,
156                           16,16,   0x40,0x40);
157
141158   /* hedpanic changes tilemap 1 to 16x16 at various times */
142159   esdtilemap_1_16x16 = tilemap_create(   get_tile_info_1_16x16, tilemap_scan_rows,
143160                           16,16,   0x40,0x40);
144161
145162   tilemap_set_scrolldx(esdtilemap_0, -0x60 + 2, -0x60     );
146163   tilemap_set_scrolldx(esdtilemap_1, -0x60    , -0x60 + 2 );
164   tilemap_set_scrolldx(esdtilemap_0_16x16, -0x60 +2 , -0x60  );
147165   tilemap_set_scrolldx(esdtilemap_1_16x16, -0x60    , -0x60 + 2 );
148166
149167   tilemap_set_transparent_pen(esdtilemap_1,0x00);
r2844r2845
340358
341359   fillbitmap(priority_bitmap,0,cliprect);
342360
343   tilemap_set_scrollx(esdtilemap_0, 0, esd16_scroll_0[0]);
344   tilemap_set_scrolly(esdtilemap_0, 0, esd16_scroll_0[1]);
345361
346362#ifdef MAME_DEBUG
347363if ( input_code_pressed(KEYCODE_Z) )
r2844r2845
352368   if (msk != 0) layers_ctrl &= msk;   }
353369#endif
354370
355   if (layers_ctrl & 1)   tilemap_draw(bitmap,cliprect,esdtilemap_0,0,0);
356   else               fillbitmap(bitmap,0,cliprect);
371   if (layers_ctrl & 1)
372   {
373      if (head_layersize[0]&0x0001)
374      {
375         tilemap_set_scrollx(esdtilemap_0_16x16, 0, esd16_scroll_0[0]);
376         tilemap_set_scrolly(esdtilemap_0_16x16, 0, esd16_scroll_0[1]);
377         tilemap_draw(bitmap,cliprect,esdtilemap_0_16x16,0,0);
378      }
379      else
380      {
381         tilemap_set_scrollx(esdtilemap_0, 0, esd16_scroll_0[0]);
382         tilemap_set_scrolly(esdtilemap_0, 0, esd16_scroll_0[1]);
383         tilemap_draw(bitmap,cliprect,esdtilemap_0,0,0);
384      }
385   }
386   else
387   {
388      fillbitmap(bitmap,0,cliprect);
389   }
357390
391
358392   if (layers_ctrl & 2)
359393   {
360394      if (head_layersize[0]&0x0002)
src/mame/video/namcos21.c
r2844r2845
77*/
88
99#include "driver.h"
10#include "deprecat.h"
1110#include "namcos2.h"
1211#include "namcoic.h"
1312#include "namcos21.h"
r2844r2845
140139} /* VIDEO_START( namcos21 ) */
141140
142141static void
143update_palette( void )
142update_palette( running_machine *machine )
144143{
145144   int i;
146145   INT16 data1,data2;
r2844r2845
172171      g = data1&0xff;
173172      b = data2&0xff;
174173
175      palette_set_color( Machine,i, MAKE_RGB(r,g,b) );
174      palette_set_color( machine,i, MAKE_RGB(r,g,b) );
176175   }
177176} /* update_palette */
178177
r2844r2845
181180{
182181   int pivot = 3;
183182   int pri;
184   update_palette();
183   update_palette(screen->machine);
185184   fillbitmap( bitmap, 0xff, cliprect );
186185
187186   if( namcos2_gametype != NAMCOS21_WINRUN91 )
src/mame/video/model3.c
r2844r2845
33#include "video/rgbutil.h"
44#include "eminline.h"
55#include <math.h>
6#include "includes/model3.h"
67
78
89#define pz  p[0]
r2844r2845
7576
7677/*****************************************************************************/
7778
78/* in drivers/model3.c */
79void model3_set_irq_line(running_machine *machine, UINT8 bit, int state);
80
81extern int model3_step;
82
83extern UINT32 *model3_vrom;
84
8579UINT64 *paletteram64;
8680
8781static UINT8 model3_layer_enable = 0;
src/mame/video/gameplan.c
r2844r2845
77****************************************************************************/
88
99#include "driver.h"
10#include "deprecat.h"
1110#include "machine/6522via.h"
1211#include "gameplan.h"
1312
r2844r2845
280279}
281280
282281
283static void start_via_0_timer(gameplan_state *state)
282static void start_via_0_timer(running_machine *machine, gameplan_state *state)
284283{
285   timer_adjust_oneshot(state->via_0_ca1_timer, video_screen_get_time_until_pos(Machine->primary_screen, VBSTART, 0), 0);
284   timer_adjust_oneshot(state->via_0_ca1_timer, video_screen_get_time_until_pos(machine->primary_screen, VBSTART, 0), 0);
286285}
287286
288287
r2844r2845
345344static VIDEO_RESET( gameplan )
346345{
347346   via_reset();
348   start_via_0_timer(machine->driver_data);
347   start_via_0_timer(machine, machine->driver_data);
349348}
350349
351350
src/mame/video/funkyjet.c
r2844r2845
1111
1212VIDEO_START( funkyjet )
1313{
14   deco16_1_video_init();
14   deco16_1_video_init(machine);
1515}
1616
1717static void draw_sprites(running_machine *machine, bitmap_t *bitmap, const rectangle *cliprect)
src/mame/video/atarirle.c
r2844r2845
139139static void build_rle_tables(void);
140140static int count_objects(const UINT16 *base, int length);
141141static void prescan_rle(const atarirle_data *mo, int which);
142static void sort_and_render(atarirle_data *mo);
142static void sort_and_render(running_machine *machine, atarirle_data *mo);
143143static void compute_checksum(atarirle_data *mo);
144144static void draw_rle(atarirle_data *mo, bitmap_t *bitmap, int code, int color, int hflip, int vflip,
145145      int x, int y, int xscale, int yscale, const rectangle *clip);
r2844r2845
269269    the attribute lookup table.
270270---------------------------------------------------------------*/
271271
272void atarirle_init(int map, const atarirle_desc *desc)
272void atarirle_init(running_machine *machine, int map, const atarirle_desc *desc)
273273{
274274   const UINT16 *base = (const UINT16 *)memory_region(desc->region);
275275   atarirle_data *mo = &atarirle[map];
r2844r2845
308308   mo->romlength     = memory_region_length(desc->region);
309309   mo->objectcount   = count_objects(base, mo->romlength);
310310
311   mo->cliprect      = *video_screen_get_visible_area(Machine->primary_screen);
311   mo->cliprect      = *video_screen_get_visible_area(machine->primary_screen);
312312   if (desc->rightclip)
313313   {
314314      mo->cliprect.min_x = desc->leftclip;
r2844r2845
341341   memset(mo->spriteram, 0, sizeof(mo->spriteram[0]) * mo->spriteramsize);
342342
343343   /* allocate bitmaps */
344   width = video_screen_get_width(Machine->primary_screen);
345   height = video_screen_get_height(Machine->primary_screen);
344   width = video_screen_get_width(machine->primary_screen);
345   height = video_screen_get_height(machine->primary_screen);
346346
347347   mo->vram[0][0] = auto_bitmap_alloc(width, height, BITMAP_FORMAT_INDEXED16);
348348   mo->vram[0][1] = auto_bitmap_alloc(width, height, BITMAP_FORMAT_INDEXED16);
r2844r2845
382382    atarirle_control_w: Write handler for MO control bits.
383383---------------------------------------------------------------*/
384384
385void atarirle_control_w(int map, UINT8 bits)
385void atarirle_control_w(running_machine *machine, int map, UINT8 bits)
386386{
387387   atarirle_data *mo = &atarirle[map];
388   int scanline = video_screen_get_vpos(Machine->primary_screen);
388   int scanline = video_screen_get_vpos(machine->primary_screen);
389389   int oldbits = mo->control_bits;
390390
391391//logerror("atarirle_control_w(%d)\n", bits);
r2844r2845
395395      return;
396396
397397   /* force a partial update first */
398   video_screen_update_partial(Machine->primary_screen, scanline);
398   video_screen_update_partial(machine->primary_screen, scanline);
399399
400400   /* if the erase flag was set, erase the front map */
401401   if (oldbits & ATARIRLE_CONTROL_ERASE)
r2844r2845
423423   if (!(oldbits & ATARIRLE_CONTROL_MOGO) && (bits & ATARIRLE_CONTROL_MOGO))
424424   {
425425      if (mo->command == ATARIRLE_COMMAND_DRAW)
426         sort_and_render(mo);
426         sort_and_render(machine, mo);
427427      else if (mo->command == ATARIRLE_COMMAND_CHECKSUM)
428428         compute_checksum(mo);
429429   }
r2844r2845
435435
436436
437437/*---------------------------------------------------------------
438    atarirle_control_w: Write handler for MO command bits.
438    atarirle_command_w: Write handler for MO command bits.
439439---------------------------------------------------------------*/
440440
441441void atarirle_command_w(int map, UINT8 command)
r2844r2845
734734    sort_and_render: Render all motion objects in order.
735735---------------------------------------------------------------*/
736736
737static void sort_and_render(atarirle_data *mo)
737static void sort_and_render(running_machine *machine, atarirle_data *mo)
738738{
739739   bitmap_t *bitmap1 = mo->vram[0][(~mo->control_bits & ATARIRLE_CONTROL_FRAME) >> 2];
740740   bitmap_t *bitmap2 = mo->vram[1][(~mo->control_bits & ATARIRLE_CONTROL_FRAME) >> 2];
r2844r2845
843843
844844      do
845845      {
846         const rectangle *visarea = video_screen_get_visible_area(Machine->primary_screen);
846         const rectangle *visarea = video_screen_get_visible_area(machine->primary_screen);
847847         int scaled_width = (scale * info->width + 0x7fff) >> 12;
848848         int scaled_height = (scale * info->height + 0x7fff) >> 12;
849849         int dx, dy, ex, ey, sx = x, sy = y, tx, ty;
r2844r2845
884884
885885         for (ty = sy; ty <= ey; ty++)
886886         {
887            *BITMAP_ADDR16(bitmap1, ty, sx) = mame_rand(Machine) & 0xff;
888            *BITMAP_ADDR16(bitmap1, ty, ex) = mame_rand(Machine) & 0xff;
887            *BITMAP_ADDR16(bitmap1, ty, sx) = mame_rand(machine) & 0xff;
888            *BITMAP_ADDR16(bitmap1, ty, ex) = mame_rand(machine) & 0xff;
889889         }
890890         for (tx = sx; tx <= ex; tx++)
891891         {
892            *BITMAP_ADDR16(bitmap1, sy, tx) = mame_rand(Machine) & 0xff;
893            *BITMAP_ADDR16(bitmap1, ey, tx) = mame_rand(Machine) & 0xff;
892            *BITMAP_ADDR16(bitmap1, sy, tx) = mame_rand(machine) & 0xff;
893            *BITMAP_ADDR16(bitmap1, ey, tx) = mame_rand(machine) & 0xff;
894894         }
895895      } while (0);
896896fprintf(stderr, "   Sprite: c=%04X l=%04X h=%d X=%4d (o=%4d w=%3d) Y=%4d (o=%4d h=%d) s=%04X\n",
src/mame/video/skullxbo.c
r2844r2845
55****************************************************************************/
66
77#include "driver.h"
8#include "deprecat.h"
98#include "machine/atarigen.h"
109#include "includes/skullxbo.h"
1110
r2844r2845
183182 *
184183 *************************************/
185184
186void skullxbo_scanline_update(int scanline)
185void skullxbo_scanline_update(running_machine *machine, int scanline)
187186{
188187   UINT16 *base = &atarigen_alpha[(scanline / 8) * 64 + 42];
189188   int x;
r2844r2845
214213
215214         /* force a partial update with the previous scroll */
216215         if (scanline > 0)
217            video_screen_update_partial(Machine->primary_screen, scanline - 1);
216            video_screen_update_partial(machine->primary_screen, scanline - 1);
218217
219218         /* update the new scroll */
220219         tilemap_set_scrolly(atarigen_playfield_tilemap, 0, newscroll);
src/mame/video/atarirle.h
r2844r2845
7474***************************************************************************/
7575
7676/* setup/shutdown */
77void atarirle_init(int map, const atarirle_desc *desc);
77void atarirle_init(running_machine *machine, int map, const atarirle_desc *desc);
7878
7979/* control handlers */
80void atarirle_control_w(int map, UINT8 bits);
80void atarirle_control_w(running_machine *machine, int map, UINT8 bits);
8181void atarirle_command_w(int map, UINT8 command);
8282VIDEO_EOF( atarirle );
8383
src/mame/video/toaplan2.c
r2844r2845
145145***************************************************************************/
146146
147147#include "driver.h"
148#include "deprecat.h"
149148#include "cpu/m68000/m68000.h"
150149
151150
r2844r2845
836835}
837836
838837
839static void toaplan2_scroll_reg_data_w(offs_t offset, UINT16 data, UINT32 mem_mask, int controller)
838static void toaplan2_scroll_reg_data_w(running_machine *machine, offs_t offset, UINT16 data, UINT32 mem_mask, int controller)
840839{
841840   /************************************************************************/
842841   /***** layer X and Y flips can be set independantly, so emulate it ******/
r2844r2845
951950               if ((toaplan2_sub_cpu == CPU_2_Z80) && (data == 3))
952951               {
953952                  /* HACK! When tilted, sound CPU needs to be reset. */
954                  if (Machine->config->sound[0].type == SOUND_YM3812)
953                  if (machine->config->sound[0].type == SOUND_YM3812)
955954                  {
956                     cpunum_set_input_line(Machine, 1, INPUT_LINE_RESET, PULSE_LINE);
955                     cpunum_set_input_line(machine, 1, INPUT_LINE_RESET, PULSE_LINE);
957956                     sndti_reset(SOUND_YM3812, 0);
958957                  }
959958               }
r2844r2845
10311030
10321031WRITE16_HANDLER( toaplan2_0_scroll_reg_data_w )
10331032{
1034   toaplan2_scroll_reg_data_w(offset, data, mem_mask, 0);
1033   toaplan2_scroll_reg_data_w(machine, offset, data, mem_mask, 0);
10351034}
10361035
10371036WRITE16_HANDLER( toaplan2_1_scroll_reg_data_w )
10381037{
1039   toaplan2_scroll_reg_data_w(offset, data, mem_mask, 1);
1038   toaplan2_scroll_reg_data_w(machine, offset, data, mem_mask, 1);
10401039}
10411040
10421041
r2844r2845
10611060      }
10621061
10631062      toaplan2_scroll_reg[0] = offset;
1064      toaplan2_scroll_reg_data_w(offset, data, mem_mask, 0);
1063      toaplan2_scroll_reg_data_w(machine, offset, data, mem_mask, 0);
10651064   }
10661065}
10671066
r2844r2845
12561255    Sprite Handlers
12571256***************************************************************************/
12581257
1259static void draw_sprites( bitmap_t *bitmap, const rectangle *cliprect, int controller, int priority_to_display, int bank_sel )
1258static void draw_sprites( running_machine *machine, bitmap_t *bitmap, const rectangle *cliprect, int controller, int priority_to_display, int bank_sel )
12601259{
1261   const gfx_element *gfx = Machine->gfx[ ((controller*2)+1) ];
1260   const gfx_element *gfx = machine->gfx[ ((controller*2)+1) ];
12621261
12631262   int offs;
12641263
r2844r2845
14391438      if (fg_tile_priority[0][priority]) tilemap_draw(bitmap,cliprect,fg_tilemap[0],priority,0);
14401439      if (top_tile_priority[0][priority]) tilemap_draw(bitmap,cliprect,top_tilemap[0],priority,0);
14411440      if (sprite_priority[0][priority])
1442         draw_sprites(bitmap,cliprect,0,priority,0);
1441         draw_sprites(screen->machine,bitmap,cliprect,0,priority,0);
14431442   }
14441443   return 0;
14451444}
r2844r2845
14661465      if (fg_tile_priority[1][priority]) tilemap_draw(bitmap,cliprect,fg_tilemap[1],priority,0);
14671466      if (top_tile_priority[1][priority]) tilemap_draw(bitmap,cliprect,top_tilemap[1],priority,0);
14681467      if (sprite_priority[1][priority])
1469         draw_sprites(bitmap,cliprect,1,priority,0);
1468         draw_sprites(screen->machine,bitmap,cliprect,1,priority,0);
14701469   }
14711470   for (priority = 0; priority < 16; priority++)
14721471   {
r2844r2845
14741473      if (fg_tile_priority[0][priority]) tilemap_draw(bitmap,cliprect,fg_tilemap[0],priority,0);
14751474      if (top_tile_priority[0][priority]) tilemap_draw(bitmap,cliprect,top_tilemap[0],priority,0);
14761475      if (sprite_priority[0][priority])
1477         draw_sprites(bitmap,cliprect,0,priority,0);
1476         draw_sprites(screen->machine,bitmap,cliprect,0,priority,0);
14781477   }
14791478   return 0;
14801479}
r2844r2845
15031502      if (fg_tile_priority[1][priority]) tilemap_draw(bitmap,cliprect,fg_tilemap[1],priority,0);
15041503      if (top_tile_priority[0][priority]) tilemap_draw(bitmap,cliprect,top_tilemap[0],priority,0);
15051504      if (sprite_priority[0][priority])
1506         draw_sprites(bitmap,cliprect,0,priority,0);
1505         draw_sprites(screen->machine,bitmap,cliprect,0,priority,0);
15071506   }
15081507
15091508   for (priority = 0; priority < 16; priority++)
15101509   {
15111510      if (top_tile_priority[1][priority]) tilemap_draw(bitmap,cliprect,top_tilemap[1],priority,0);
15121511      if (sprite_priority[1][priority])
1513         draw_sprites(bitmap,cliprect,1,priority,0);
1512         draw_sprites(screen->machine,bitmap,cliprect,1,priority,0);
15141513   }
15151514
15161515   return 0;
r2844r2845
15551554      if (fg_tile_priority[0][priority]) tilemap_draw(bitmap,cliprect,fg_tilemap[0],priority,0);
15561555      if (top_tile_priority[0][priority]) tilemap_draw(bitmap,cliprect,top_tilemap[0],priority,0);
15571556      if (sprite_priority[0][priority])
1558         draw_sprites(bitmap,cliprect,0,priority,1);   /* consider bank select */
1557         draw_sprites(screen->machine,bitmap,cliprect,0,priority,1);   /* consider bank select */
15591558   }
15601559
15611560   clip.min_x = visarea->min_x;
r2844r2845
15971596      if (fg_tile_priority[0][priority]) tilemap_draw(bitmap,cliprect,fg_tilemap[0],priority,0);
15981597      if (top_tile_priority[0][priority]) tilemap_draw(bitmap,cliprect,top_tilemap[0],priority,0);
15991598      if (sprite_priority[0][priority-1])
1600         draw_sprites(bitmap,cliprect,0,priority-1,0);
1599         draw_sprites(screen->machine,bitmap,cliprect,0,priority-1,0);
16011600   }
16021601   if (sprite_priority[0][15])
1603      draw_sprites(bitmap,cliprect,0,15,0);
1602      draw_sprites(screen->machine,bitmap,cliprect,0,15,0);
16041603   tilemap_draw(bitmap,cliprect,tx_tilemap,0,0);
16051604   return 0;
16061605}
src/mame/video/pastelg.c
r2844r2845
77******************************************************************************/
88
99#include "driver.h"
10#include "deprecat.h"
1110#include "nb1413m3.h"
1211
1312
r2844r2845
2423static UINT8 *pastelg_clut;
2524
2625
27static void pastelg_vramflip(void);
28static void pastelg_gfxdraw(void);
26static void pastelg_vramflip(running_machine *machine);
27static void pastelg_gfxdraw(running_machine *machine);
2928
3029
3130/******************************************************************************
r2844r2845
8584      case 4: blitter_sizex = data; break;
8685      case 5: blitter_sizey = data;
8786            /* writing here also starts the blit */
88            pastelg_gfxdraw();
87            pastelg_gfxdraw(machine);
8988            break;
9089      case 6:   blitter_direction_x = (data & 0x01) ? 1 : 0;
9190            blitter_direction_y = (data & 0x02) ? 1 : 0;
9291            pastelg_flipscreen = (data & 0x04) ? 0 : 1;
9392            pastelg_dispflag = (data & 0x08) ? 0 : 1;
94            pastelg_vramflip();
93            pastelg_vramflip(machine);
9594            break;
9695   }
9796}
r2844r2845
116115
117116
118117******************************************************************************/
119static void pastelg_vramflip(void)
118static void pastelg_vramflip(running_machine *machine)
120119{
121120   static int pastelg_flipscreen_old = 0;
122121   int x, y;
123122   UINT8 color1, color2;
124   int width = video_screen_get_width(Machine->primary_screen);
125   int height = video_screen_get_height(Machine->primary_screen);
123   int width = video_screen_get_width(machine->primary_screen);
124   int height = video_screen_get_height(machine->primary_screen);
126125
127126   if (pastelg_flipscreen == pastelg_flipscreen_old) return;
128127
r2844r2845
145144   nb1413m3_busyflag = 1;
146145}
147146
148static void pastelg_gfxdraw(void)
147static void pastelg_gfxdraw(running_machine *machine)
149148{
150149   UINT8 *GFX = memory_region(REGION_GFX1);
151   int width = video_screen_get_width(Machine->primary_screen);
150   int width = video_screen_get_width(machine->primary_screen);
152151
153152   int x, y;
154153   int dx, dy;
src/mame/video/funkybee.c
r2844r2845
8989
9090VIDEO_START( funkybee )
9191{
92   bg_tilemap = tilemap_create(get_bg_tile_info, funkybee_tilemap_scan,
93       8, 8, 32, 32);
92   bg_tilemap = tilemap_create(get_bg_tile_info, funkybee_tilemap_scan, 8, 8, 32, 32);
9493}
9594
9695static void draw_sprites(running_machine *machine, bitmap_t *bitmap, const rectangle *cliprect)
r2844r2845
128127
129128   for (offs = 0x1f;offs >= 0;offs--)
130129   {
130      int const flip = flip_screen_get();
131131      int code = videoram[0x1c00 + offs];
132132      int color = colorram[0x1f10] & 0x03;
133      int sx = videoram[0x1f10];
133      int sx = flip ? videoram[0x1f1f] : videoram[0x1f10];
134134      int sy = offs * 8;
135135
136      if (flip_screen_get())
137      {
138         sx = 248 - sx;
136      if (flip)
139137         sy = 248 - sy;
140      }
141138
142139      drawgfx(bitmap,machine->gfx[gfx_bank],
143140            code, color,
144            flip_screen_get(), flip_screen_get(),
141            flip, flip,
145142            sx, sy,
146143            cliprect,TRANSPARENCY_PEN,0);
147144
148145      code = videoram[0x1d00 + offs];
149146      color = colorram[0x1f11] & 0x03;
150      sx = videoram[0x1f11];
147      sx = flip ? videoram[0x1f1e] : videoram[0x1f11];
151148      sy = offs * 8;
152149
153      if (flip_screen_get())
154      {
155         sx = 248 - sx;
150      if (flip)
156151         sy = 248 - sy;
157      }
158152
159153      drawgfx(bitmap,machine->gfx[gfx_bank],
160154            code, color,
161            flip_screen_get(), flip_screen_get(),
155            flip, flip,
162156            sx, sy,
163157            cliprect,TRANSPARENCY_PEN,0);
164158   }
r2844r2845
166160
167161VIDEO_UPDATE( funkybee )
168162{
169   tilemap_mark_all_tiles_dirty(bg_tilemap);
170
171163   tilemap_draw(bitmap, cliprect, bg_tilemap, 0, 0);
172164   draw_sprites(screen->machine, bitmap, cliprect);
173165   draw_columns(screen->machine, bitmap, cliprect);
src/mame/video/cischeat.c
r2844r2845
185185static int read_shift(running_machine *machine)
186186{
187187   static int ret = 1; /* start with low shift */
188   switch ( (input_port_read_indexed(machine, 0) >> 2) & 3 )
188   switch ( (input_port_read(machine, "FAKE") >> 2) & 3 )
189189   {
190190      case 1 : ret = 1;   break;   // low  shift: button 3
191191      case 2 : ret = 0;   break;   // high shift: button 4
r2844r2845
205205
206206static int read_accelerator(running_machine *machine)
207207{
208   if (input_port_read_indexed(machine, 0) & 1)   return 0x00;   // pedal pressed
208   if (input_port_read(machine, "FAKE") & 1)   return 0x00;   // pedal pressed
209209   else                  return 0xff;
210210}
211211
r2844r2845
218218{
219219   switch (offset)
220220   {
221      case 0x0000/2 : return input_port_read_indexed(machine, 1);   // Coins
222      case 0x0002/2 : return input_port_read_indexed(machine, 2) +
221      case 0x0000/2 : return input_port_read(machine, "IN1");   // Coins
222      case 0x0002/2 : return input_port_read(machine, "IN2") +
223223                  (read_shift(machine)<<1);         // Buttons
224      case 0x0004/2 : return input_port_read_indexed(machine, 3);   // Motor Limit Switches
225      case 0x0006/2 : return input_port_read_indexed(machine, 4);   // DSW 1 & 2
224      case 0x0004/2 : return input_port_read(machine, "IN3");   // Motor Limit Switches
225      case 0x0006/2 : return input_port_read(machine, "IN4");   // DSW 1 & 2
226226
227227      case 0x0008/2 :   return soundlatch2_word_r(machine,0,0xffff);   // From sound cpu
228228
229229      case 0x0010/2 :
230230         switch (cischeat_ip_select & 0x3)
231231         {
232            case 0 : return input_port_read_indexed(machine, 6);      // Driving Wheel
232            case 0 : return input_port_read(machine, "IN6");      // Driving Wheel
233233            case 1 : return 0xffff;               // Cockpit: Up / Down Position
234234            case 2 : return 0xffff;               // Cockpit: Left / Right Position?
235235            case 3 : return ~read_accelerator(machine);   // Accelerator (Pedal)
r2844r2845
237237         }
238238
239239
240      case 0x2200/2 : return input_port_read_indexed(machine, 5);   // DSW 3 (4 bits)
240      case 0x2200/2 : return input_port_read(machine, "IN5");   // DSW 3 (4 bits)
241241
242242      default:   SHOW_READ_ERROR("vreg %04X read!",offset*2);
243243               return megasys1_vregs[offset];
r2844r2845
315315{
316316   switch (offset)
317317   {
318      case 0x0000/2 : return input_port_read_indexed(machine, 1);   // Coins
319      case 0x0002/2 : return input_port_read_indexed(machine, 2) +
318      case 0x0000/2 : return input_port_read(machine, "IN1");   // Coins
319      case 0x0002/2 : return input_port_read(machine, "IN2") +
320320                  (read_shift(machine)<<1);         // Buttons
321      case 0x0004/2 : return input_port_read_indexed(machine, 3);   // Motor Limit Switches
322      case 0x0006/2 : return input_port_read_indexed(machine, 4);   // DSW 1 & 2
321      case 0x0004/2 : return input_port_read(machine, "IN3");   // Motor Limit Switches
322      case 0x0006/2 : return input_port_read(machine, "IN4");   // DSW 1 & 2
323323
324324      case 0x0010/2 :
325325         switch (cischeat_ip_select & 0x3)
326326         {
327            case 0 : return input_port_read_indexed(machine, 6);   // Driving Wheel
327            case 0 : return input_port_read(machine, "IN6");   // Driving Wheel
328328            case 1 : return ~0;               // Cockpit: Up / Down Position?
329329            case 2 : return ~0;               // Cockpit: Left / Right Position?
330330            default: return ~0;
331331         }
332332
333      case 0x2200/2 : return input_port_read_indexed(machine, 5);   // DSW 3 (4 bits)
333      case 0x2200/2 : return input_port_read(machine, "IN5");   // DSW 3 (4 bits)
334334      case 0x2300/2 : return soundlatch2_r(machine,0);   // From sound cpu
335335
336336      default:   SHOW_READ_ERROR("vreg %04X read!",offset*2);
r2844r2845
411411   {
412412      case 0x0000/2 :   // DSW 1&2: coinage changes with Country
413413      {
414         int val = input_port_read_indexed(machine, 1);
415         if (val & 0x0200)   return input_port_read_indexed(machine, 6) | val;    // JP, US
416         else            return input_port_read_indexed(machine, 7) | val;    // UK, FR
414         int val = input_port_read(machine, "IN1");
415         if (val & 0x0200)   return input_port_read(machine, "IN6") | val;    // JP, US
416         else            return input_port_read(machine, "IN7") | val;    // UK, FR
417417      }
418418
419419//      case 0x0002/2 : return 0xFFFF;
420      case 0x0004/2 :   return input_port_read_indexed(machine, 2) +
420      case 0x0004/2 :   return input_port_read(machine, "IN2") +
421421                         (read_shift(machine)<<5);   // Buttons
422422
423      case 0x0006/2 :   return input_port_read_indexed(machine, 3);   // ? Read at boot only
423      case 0x0006/2 :   return input_port_read(machine, "IN3");   // ? Read at boot only
424424      case 0x0008/2 :   return soundlatch2_r(machine,0);   // From sound cpu
425425
426      case 0x000c/2 :   return input_port_read_indexed(machine, 4);   // DSW 3
426      case 0x000c/2 :   return input_port_read(machine, "IN4");   // DSW 3
427427
428428      case 0x0010/2 :   // Accel + Driving Wheel
429         return (read_accelerator(machine)&0xff) + ((input_port_read_indexed(machine, 5)&0xff)<<8);
429         return (read_accelerator(machine) & 0xff) + ((input_port_read(machine, "IN5") & 0xff)<<8);
430430
431431      default:      SHOW_READ_ERROR("vreg %04X read!",offset*2);
432432                  return megasys1_vregs[offset];
r2844r2845
459459
460460   switch (offset)
461461   {
462      case 0x0000/2 :   return input_port_read_indexed(machine, 0); // DSW 1 & 2
462      case 0x0000/2 :   return input_port_read(machine, "IN0"); // DSW 1 & 2
463463
464      case 0x0004/2 :   return input_port_read_indexed(machine, 1); // Buttons
464      case 0x0004/2 :   return input_port_read(machine, "IN1"); // Buttons
465465
466466      case 0x0008/2 :   return soundlatch2_r(machine,0); // From sound cpu
467467
468468      case 0x0010/2 :   // X, Y
469         return input_port_read_indexed(machine, 2) | (input_port_read_indexed(machine, 3)<<8);
469         return input_port_read(machine, "IN2") | (input_port_read(machine, "IN3")<<8);
470470
471471      case 0x0018/2 :
472472         return (f1gpstr2_ioready[0]&1) ? 0xff : 0xf0;
src/mame/video/rockola.c
r2844r2845
2121
2222static rgb_t palette[64];
2323
24#define TOTAL_COLORS(gfxn) (Machine->gfx[gfxn]->total_colors * Machine->gfx[gfxn]->color_granularity)
25#define COLOR(gfxn,offs) (Machine->config->gfxdecodeinfo[gfxn].color_codes_start + offs)
24#define TOTAL_COLORS(gfxn) (machine->gfx[gfxn]->total_colors * machine->gfx[gfxn]->color_granularity)
25#define COLOR(gfxn,offs) (machine->config->gfxdecodeinfo[gfxn].color_codes_start + offs)
2626
2727
2828
src/mame/video/centiped.c
r2844r2845
102102   bg_tilemap = tilemap_create(warlords_get_tile_info, tilemap_scan_rows,  8,8, 32,32);
103103
104104   /* we overload centiped_flipscreen here to track the cocktail/upright state */
105   centiped_flipscreen = input_port_read_indexed(machine, 0) & 0x80;
105   centiped_flipscreen = input_port_read(machine, "IN0") & 0x80;
106106   tilemap_set_flip(bg_tilemap, centiped_flipscreen ? TILEMAP_FLIPX : 0);
107107}
108108
r2844r2845
442442
443443VIDEO_UPDATE( warlords )
444444{
445   int upright_mode = input_port_read_indexed(screen->machine, 0) & 0x80;
445   int upright_mode = input_port_read(screen->machine, "IN0") & 0x80;
446446   int offs;
447447
448448   /* if the cocktail/upright switch flipped, force refresh */
src/mame/video/galaxold.c
r2844r2845
5959
6060static void (*modify_spritecode)(UINT8 *spriteram,int*,int*,int*,int);   /* function to call to do sprite banking */
6161static void mshuttle_modify_spritecode(UINT8 *spriteram,int *code,int *flipx,int *flipy,int offs);
62static void  calipso_modify_spritecode(UINT8 *spriteram,int *code,int *flipx,int *flipy,int offs);
6362static void mimonkey_modify_spritecode(UINT8 *spriteram,int *code,int *flipx,int *flipy,int offs);
6463static void  batman2_modify_spritecode(UINT8 *spriteram,int *code,int *flipx,int *flipy,int offs);
6564static void dkongjrm_modify_spritecode(UINT8 *spriteram,int *code,int *flipx,int *flipy,int offs);
r2844r2845
212211   palette_set_color(machine,BACKGROUND_COLOR_BASE,MAKE_RGB(0,0,0x56));
213212}
214213
215PALETTE_INIT( moonwar )
216{
217   PALETTE_INIT_CALL(scrambold);
218214
219
220   /* wire mod to connect the bullet blue output to the 220 ohm resistor */
221   palette_set_color(machine,BULLETS_COLOR_BASE+0,MAKE_RGB(0xef,0xef,0x97));
222}
223
224215PALETTE_INIT( stratgyx )
225216{
226217   int i;
r2844r2845
594585   modify_spritecode = mshuttle_modify_spritecode;
595586}
596587
597VIDEO_START( calipso )
598{
599   VIDEO_START_CALL(galaxold_plain);
600
601   draw_bullets = scramble_draw_bullets;
602
603   draw_background = scramble_draw_background;
604
605   modify_spritecode = calipso_modify_spritecode;
606}
607
608588VIDEO_START( mariner )
609589{
610590   VIDEO_START_CALL(galaxold_plain);
r2844r2845
11681148   *code |= ((spriteram[offs + 2] & 0x30) << 2);
11691149}
11701150
1171static void calipso_modify_spritecode(UINT8 *spriteram,int *code,int *flipx,int *flipy,int offs)
1172{
1173   /* No flips */
1174   *code = spriteram[offs + 1];
1175   *flipx = 0;
1176   *flipy = 0;
1177}
11781151
11791152static void mimonkey_modify_spritecode(UINT8 *spriteram,int *code,int *flipx,int *flipy,int offs)
11801153{
src/mame/video/dec0.c
r2844r2845
9595***************************************************************************/
9696
9797#include "driver.h"
98#include "deprecat.h"
9998#include "includes/dec0.h"
10099
101100static tilemap *pf1_tilemap_0,*pf1_tilemap_1,*pf1_tilemap_2;
r2844r2845
123122
124123/******************************************************************************/
125124
126static void update_24bitcol(int offset)
125static void update_24bitcol(running_machine *machine, int offset)
127126{
128127   int r,g,b;
129128
r2844r2845
131130   g = (paletteram16[offset] >> 8) & 0xff;
132131   b = (paletteram16_2[offset] >> 0) & 0xff;
133132
134   palette_set_color(Machine,offset,MAKE_RGB(r,g,b));
133   palette_set_color(machine,offset,MAKE_RGB(r,g,b));
135134}
136135
137136WRITE16_HANDLER( dec0_paletteram_rg_w )
138137{
139138   COMBINE_DATA(&paletteram16[offset]);
140   update_24bitcol(offset);
139   update_24bitcol(machine, offset);
141140}
142141
143142WRITE16_HANDLER( dec0_paletteram_b_w )
144143{
145144   COMBINE_DATA(&paletteram16_2[offset]);
146   update_24bitcol(offset);
145   update_24bitcol(machine, offset);
147146}
148147
149148/******************************************************************************/
src/mame/video/taitoair.c
r2844r2845
4646***************************************************************************/
4747
4848#include "driver.h"
49#include "deprecat.h"
5049#include "taitoic.h"
5150
5251
53extern UINT16   *TC0080VCO_chain_ram_0;
54extern UINT16   *TC0080VCO_chain_ram_1;
55extern UINT16   *TC0080VCO_spriteram;
56extern UINT16   *TC0080VCO_scroll_ram;
57extern int      TC0080VCO_flipscreen;
58
5952/* These are hand-tuned values */
6053static const int zoomy_conv_table[] =
6154{
r2844r2845
8780  Screen refresh
8881***************************************************************************/
8982
90static void draw_sprites(bitmap_t *bitmap, const rectangle *cliprect, int priority)
83static void draw_sprites(running_machine *machine, bitmap_t *bitmap, const rectangle *cliprect, int priority)
9184{
9285   /* Y chain size is 16/32?/64/64? pixels. X chain size
9386       is always 64 pixels. */
r2844r2845
180173                     flipy ^= 0x0080;
181174                  }
182175
183                  drawgfxzoom( bitmap, Machine -> gfx[0],
176                  drawgfxzoom( bitmap, machine -> gfx[0],
184177                         tile,
185178                         color,
186179                         flipx, flipy,
r2844r2845
372365   if ( !input_code_pressed(KEYCODE_A) )
373366      TC0080VCO_tilemap_draw(screen->machine,bitmap,cliprect,0,0,0);
374367   if ( !input_code_pressed(KEYCODE_S) )
375      draw_sprites(bitmap,cliprect,0);
368      draw_sprites(screen->machine,bitmap,cliprect,0);
376369   if ( !input_code_pressed(KEYCODE_D) )
377370      TC0080VCO_tilemap_draw(screen->machine,bitmap,cliprect,1,0,0);
378371   if ( !input_code_pressed(KEYCODE_F) )
379      draw_sprites(bitmap,cliprect,1);
372      draw_sprites(screen->machine,bitmap,cliprect,1);
380373#else
381374   TC0080VCO_tilemap_draw(screen->machine,bitmap,cliprect,0,0,0);
382   draw_sprites (bitmap,cliprect,0);
375   draw_sprites (screen->machine,bitmap,cliprect,0);
383376   TC0080VCO_tilemap_draw(screen->machine,bitmap,cliprect,1,0,0);
384   draw_sprites (bitmap,cliprect,1);
377   draw_sprites (screen->machine,bitmap,cliprect,1);
385378#endif
386379
387380   TC0080VCO_tilemap_draw(screen->machine,bitmap,cliprect,2,0,0);
src/mame/video/atarig42.c
r2844r2845
126126   adjusted_modesc.palettebase = atarig42_motion_object_base;
127127   for (i = 0; i < 8; i++)
128128      adjusted_modesc.colormask.data[i] &= atarig42_motion_object_mask;
129   atarirle_init(0, &adjusted_modesc);
129   atarirle_init(machine, 0, &adjusted_modesc);
130130
131131   /* initialize the alphanumerics */
132132   atarigen_alpha_tilemap = tilemap_create(get_alpha_tile_info, tilemap_scan_rows,  8,8, 64,32);
src/mame/video/metro.c
r2844r2845
125125
126126***************************************************************************/
127127
128#ifdef UNUSED_FUNCTION
128129WRITE16_HANDLER( metro_paletteram_w )
129130{
130131   data = COMBINE_DATA(&paletteram16[offset]);
131132   palette_set_color_rgb(machine,offset,pal5bit(data >> 6),pal5bit(data >> 11),pal5bit(data >> 1));
132133}
134#endif
133135
134136
135137/***************************************************************************
src/mame/video/bigevglf.c
r2844r2845
66
77***************************************************************************/
88#include "driver.h"
9#include "includes/bigevglf.h"
910
1011
1112UINT8 *bigevglf_spriteram1;
src/mame/video/bagman.c
r2844r2845
88
99#include "driver.h"
1010#include "video/resnet.h"
11#include "includes/bagman.h"
1112
1213
1314UINT8 *bagman_video_enable;
src/mame/video/cbuster.c
r2844r2845
55***************************************************************************/
66
77#include "driver.h"
8#include "deprecat.h"
98#include "deco16ic.h"
109
1110static int twocrude_pri;
r2844r2845
1918
2019VIDEO_START( twocrude )
2120{
22   deco16_2_video_init(0);
21   deco16_2_video_init(machine, 0);
2322
2423   deco16_set_tilemap_bank_callback(0, bank_callback);
2524   deco16_set_tilemap_bank_callback(1, bank_callback);
r2844r2845
3433
3534/******************************************************************************/
3635
37static void update_24bitcol(int offset)
36static void update_24bitcol(running_machine *machine, int offset)
3837{
3938   UINT8 r,g,b; /* The highest palette value seems to be 0x8e */
4039
r2844r2845
4241   g = (UINT8)((float)((paletteram16[offset] >> 8) & 0xff)*1.75);
4342   b = (UINT8)((float)((paletteram16_2[offset] >> 0) & 0xff)*1.75);
4443
45   palette_set_color(Machine,offset,MAKE_RGB(r,g,b));
44   palette_set_color(machine,offset,MAKE_RGB(r,g,b));
4645}
4746
4847WRITE16_HANDLER( twocrude_palette_24bit_rg_w )
4948{
5049   COMBINE_DATA(&paletteram16[offset]);
51   update_24bitcol(offset);
50   update_24bitcol(machine, offset);
5251}
5352
5453WRITE16_HANDLER( twocrude_palette_24bit_b_w )
5554{
5655   COMBINE_DATA(&paletteram16_2[offset]);
57   update_24bitcol(offset);
56   update_24bitcol(machine, offset);
5857}
5958
6059/******************************************************************************/
src/mame/video/jaguar.c
r2844r2845
241241
242242   int width = visarea->max_x + 1 - visarea->min_x;
243243   int height = visarea->max_y + 1 - visarea->min_y;
244   *x = visarea->min_x + (((input_port_read_indexed(machine, 3 + player * 2) & 0xff) * width) >> 8);
245   *y = visarea->min_y + (((input_port_read_indexed(machine, 4 + player * 2) & 0xff) * height) >> 8);
244   /* only 2 lightguns are connected */
245   *x = visarea->min_x + (((input_port_read(machine, player ? "FAKE2_X" : "FAKE1_X") & 0xff) * width) >> 8);
246   *y = visarea->min_y + (((input_port_read(machine, player ? "FAKE2_Y" : "FAKE1_Y") & 0xff) * height) >> 8);
246247}
247248
248249
r2844r2845
741742         return (beamy << 16) | (beamx ^ 0x1ff);
742743
743744      case 2:
744         return input_port_read_indexed(machine, 7) << 16;
745         return input_port_read(machine, "IN3") << 16;
745746   }
746747   return 0;
747748}
src/mame/video/jalblend.c
r2844r2845
6565   return MAKE_RGB((UINT8)finalR,(UINT8)finalG,(UINT8)finalB) ;
6666}
6767
68static void jal_blend_drawgfx( bitmap_t *dest_bmp,const gfx_element *gfx,
68static void jal_blend_drawgfx( running_machine *machine, bitmap_t *dest_bmp,const gfx_element *gfx,
6969                        UINT32 code,UINT32 color,int flipx,int flipy,int offsx,int offsy,
7070                        const rectangle *clip,int transparency,int transparent_color)
7171{
r2844r2845
9191      {
9292         for (xtile = xstart; xtile != xend; xtile += xinc )
9393         {
94            const pen_t *pal = &Machine->pens[gfx->color_base + gfx->color_granularity * (color % gfx->total_colors)];
94            const pen_t *pal = &machine->pens[gfx->color_base + gfx->color_granularity * (color % gfx->total_colors)];
9595            const UINT8 *alpha = &jal_blend_table[gfx->color_granularity * (color % gfx->total_colors)];
9696            int source_base = ((code + code_offset++) % gfx->total_elements) * gfx->height;
9797
src/mame/video/nbmj8891.c
r2844r2845
77******************************************************************************/
88
99#include "driver.h"
10#include "deprecat.h"
1110#include "nb1413m3.h"
1211
1312
r2844r2845
3029static UINT8 *nbmj8891_clut;
3130
3231
33static void nbmj8891_vramflip(int vram);
34static void nbmj8891_gfxdraw(void);
32static void nbmj8891_vramflip(running_machine *machine, int vram);
33static void nbmj8891_gfxdraw(running_machine *machine);
3534
3635
3736/******************************************************************************
r2844r2845
134133      case 0x04:   blitter_sizex = data; break;
135134      case 0x05:   blitter_sizey = data;
136135               /* writing here also starts the blit */
137               nbmj8891_gfxdraw();
136               nbmj8891_gfxdraw(machine);
138137               break;
139138      case 0x06:   blitter_direction_x = (data & 0x01) ? 1 : 0;
140139               blitter_direction_y = (data & 0x02) ? 1 : 0;
141140               nbmj8891_flipscreen = (data & 0x04) ? 1 : 0;
142141               nbmj8891_dispflag = (data & 0x08) ? 0 : 1;
143               if (gfxdraw_mode) nbmj8891_vramflip(1);
144               nbmj8891_vramflip(0);
142               if (gfxdraw_mode) nbmj8891_vramflip(machine, 1);
143               nbmj8891_vramflip(machine, 0);
145144               break;
146145      case 0x07:   break;
147146   }
r2844r2845
162161
163162WRITE8_HANDLER( nbmj8891_taiwanmb_gfxdraw_w )
164163{
165//  nbmj8891_gfxdraw();
164//  nbmj8891_gfxdraw(machine);
166165}
167166
168167WRITE8_HANDLER( nbmj8891_taiwanmb_gfxflag_w )
169168{
170169   nbmj8891_flipscreen = (data & 0x04) ? 1 : 0;
171170
172   nbmj8891_vramflip(0);
171   nbmj8891_vramflip(machine, 0);
173172}
174173
175174WRITE8_HANDLER( nbmj8891_taiwanmb_mcu_w )
r2844r2845
248247         blitter_sizey ^= 0x00;
249248      }
250249
251      nbmj8891_gfxdraw();
250      nbmj8891_gfxdraw(machine);
252251   }
253252
254253//  blitter_direction_x = 0;                // for debug
r2844r2845
289288
290289
291290******************************************************************************/
292void nbmj8891_vramflip(int vram)
291void nbmj8891_vramflip(running_machine *machine, int vram)
293292{
294293   static int nbmj8891_flipscreen_old = 0;
295294   int x, y;
296295   UINT8 color1, color2;
297296   UINT8 *vidram;
298297
299   int width = video_screen_get_width(Machine->primary_screen);
300   int height = video_screen_get_height(Machine->primary_screen);
298   int width = video_screen_get_width(machine->primary_screen);
299   int height = video_screen_get_height(machine->primary_screen);
301300
302301   if (nbmj8891_flipscreen == nbmj8891_flipscreen_old) return;
303302
r2844r2845
319318}
320319
321320
322static void update_pixel0(int x, int y)
321static void update_pixel0(running_machine *machine, int x, int y)
323322{
324   UINT8 color = nbmj8891_videoram0[(y * video_screen_get_width(Machine->primary_screen)) + x];
323   UINT8 color = nbmj8891_videoram0[(y * video_screen_get_width(machine->primary_screen)) + x];
325324   *BITMAP_ADDR16(nbmj8891_tmpbitmap0, y, x) = color;
326325}
327326
328static void update_pixel1(int x, int y)
327static void update_pixel1(running_machine *machine, int x, int y)
329328{
330   UINT8 color = nbmj8891_videoram1[(y * video_screen_get_width(Machine->primary_screen)) + x];
329   UINT8 color = nbmj8891_videoram1[(y * video_screen_get_width(machine->primary_screen)) + x];
331330   *BITMAP_ADDR16(nbmj8891_tmpbitmap1, y, x) = (color == 0x7f) ? 0xff : color;
332331}
333332
r2844r2845
336335   nb1413m3_busyflag = 1;
337336}
338337
339static void nbmj8891_gfxdraw(void)
338static void nbmj8891_gfxdraw(running_machine *machine)
340339{
341340   UINT8 *GFX = memory_region(REGION_GFX1);
342   int width = video_screen_get_width(Machine->primary_screen);
341   int width = video_screen_get_width(machine->primary_screen);
343342
344343   int x, y;
345344   int dx1, dx2, dy1, dy2;
r2844r2845
446445            if (color1 != 0xff)
447446            {
448447               nbmj8891_videoram0[(dy1 * width) + dx1] = color1;
449               update_pixel0(dx1, dy1);
448               update_pixel0(machine, dx1, dy1);
450449            }
451450            if (color2 != 0xff)
452451            {
453452               nbmj8891_videoram0[(dy1 * width) + dx2] = color2;
454               update_pixel0(dx2, dy1);
453               update_pixel0(machine, dx2, dy1);
455454            }
456455         }
457456         if (gfxdraw_mode && (nbmj8891_vram & 0x02))
r2844r2845
463462               if (color1 != 0xff)
464463               {
465464                  nbmj8891_videoram1[(dy2 * width) + dx1] = color1;
466                  update_pixel1(dx1, dy2);
465                  update_pixel1(machine, dx1, dy2);
467466               }
468467               if (color2 != 0xff)
469468               {
470469                  nbmj8891_videoram1[(dy2 * width) + dx2] = color2;
471                  update_pixel1(dx2, dy2);
470                  update_pixel1(machine, dx2, dy2);
472471               }
473472            }
474473            else
475474            {
476475               // transparent disable
477476               nbmj8891_videoram1[(dy2 * width) + dx1] = color1;
478               update_pixel1(dx1, dy2);
477               update_pixel1(machine, dx1, dy2);
479478               nbmj8891_videoram1[(dy2 * width) + dx2] = color2;
480               update_pixel1(dx2, dy2);
479               update_pixel1(machine, dx2, dy2);
481480            }
482481         }
483482
r2844r2845
543542      nbmj8891_screen_refresh = 0;
544543      for (y = 0; y < height; y++)
545544         for (x = 0; x < width; x++)
546            update_pixel0(x, y);
545            update_pixel0(screen->machine, x, y);
547546
548547      if (gfxdraw_mode)
549548         for (y = 0; y < height; y++)
550549            for (x = 0; x < width; x++)
551               update_pixel1(x, y);
550               update_pixel1(screen->machine, x, y);
552551   }
553552
554553   if (nbmj8891_dispflag)
src/mame/video/seta.c
r2844r2845
136136***************************************************************************/
137137
138138#include "driver.h"
139#include "deprecat.h"
140139#include "sound/x1_010.h"
141140#include "seta.h"
142141
r2844r2845
227226    ---- --1-       Coin #1 Counter
228227    ---- ---0       Coin #0 Counter     */
229228
230void seta_coin_lockout_w(int data)
229void seta_coin_lockout_w(running_machine *machine, int data)
231230{
232231   static int seta_coin_lockout = 1;
233232   static const game_driver *seta_driver = NULL;
234233   static const char *const seta_nolockout[8] = { "blandia", "gundhara", "kamenrid", "zingzip", "eightfrc", "extdwnhl", "sokonuke", "zombraid"};
235234
236235   /* Only compute seta_coin_lockout when confronted with a new gamedrv */
237   if (seta_driver != Machine->gamedrv)
236   if (seta_driver != machine->gamedrv)
238237   {
239238      int i;
240      seta_driver = Machine->gamedrv;
239      seta_driver = machine->gamedrv;
241240
242241      seta_coin_lockout = 1;
243242      for (i=0; i<ARRAY_LENGTH(seta_nolockout); i++)
r2844r2845
279278        ---- ---- ---- ---0     Coin #0 Counter     */
280279         if (ACCESSING_BITS_0_7)
281280         {
282            seta_coin_lockout_w (data & 0x0f);
281            seta_coin_lockout_w (machine, data & 0x0f);
283282            if (sndti_exists(SOUND_X1_010, 0))
284283               seta_sound_enable_w (data & 0x20);
285284            coin_counter_w(0,data & 0x01);
src/mame/video/rohga.c
r2844r2845
2828{
2929   rohga_spriteram = (UINT16*)auto_malloc(0x800);
3030
31   deco16_2_video_init(0);
31   deco16_2_video_init(machine, 0);
3232
3333   deco16_set_tilemap_bank_callback(0,wizdfire_bank_callback);
3434   deco16_set_tilemap_bank_callback(1,wizdfire_bank_callback);
r2844r2845
3838
3939VIDEO_START( wizdfire )
4040{
41   deco16_2_video_init(0);
41   deco16_2_video_init(machine, 0);
4242
4343   deco16_set_tilemap_bank_callback(0,wizdfire_bank_callback);
4444   deco16_set_tilemap_bank_callback(1,wizdfire_bank_callback);
r2844r2845
5252
5353VIDEO_START( nitrobal )
5454{
55   deco16_2_video_init_half_width();
55   deco16_2_video_init_half_width(machine);
5656
5757   deco16_set_tilemap_bank_callback(0,wizdfire_bank_callback);
5858   deco16_set_tilemap_bank_callback(1,wizdfire_bank_callback);
r2844r2845
420420
421421      for (x=0; x<w; x++) {
422422         for (y=0; y<h; y++) {
423            deco16_pdrawgfx(bitmap,machine->gfx[gfxbank],
423            deco16_pdrawgfx(machine,
424                  bitmap,machine->gfx[gfxbank],
424425                  sprite + y + h * x,
425426                  colour,
426427                  fx,fy,
src/mame/video/vball.c
r2844r2845
7474   tilemap_mark_tile_dirty(bg_tilemap,offset);
7575}
7676
77void vb_bgprombank_w( int bank )
77void vb_bgprombank_w( running_machine *machine, int bank )
7878{
7979   int i;
8080   UINT8* color_prom;
r2844r2845
8383
8484   color_prom = memory_region(REGION_PROMS) + bank*0x80;
8585   for (i=0;i<128;i++, color_prom++) {
86      palette_set_color_rgb(Machine,i,pal4bit(color_prom[0] >> 0),pal4bit(color_prom[0] >> 4),
86      palette_set_color_rgb(machine,i,pal4bit(color_prom[0] >> 0),pal4bit(color_prom[0] >> 4),
8787                   pal4bit(color_prom[0x800] >> 0));
8888   }
8989   vb_bgprombank=bank;
9090}
9191
92void vb_spprombank_w( int bank )
92void vb_spprombank_w( running_machine *machine, int bank )
9393{
9494
9595   int i;
r2844r2845
9999
100100   color_prom = memory_region(REGION_PROMS)+0x400 + bank*0x80;
101101   for (i=128;i<256;i++,color_prom++)   {
102      palette_set_color_rgb(Machine,i,pal4bit(color_prom[0] >> 0),pal4bit(color_prom[0] >> 4),
102      palette_set_color_rgb(machine,i,pal4bit(color_prom[0] >> 0),pal4bit(color_prom[0] >> 4),
103103                   pal4bit(color_prom[0x800] >> 0));
104104   }
105105   vb_spprombank=bank;
src/mame/video/deco16ic.c
r2844r2845
175175static int (*deco16_bank_callback_2)(const int bank);
176176static int (*deco16_bank_callback_3)(const int bank);
177177static int (*deco16_bank_callback_4)(const int bank);
178static void custom_tilemap_draw(bitmap_t *bitmap,tilemap *tilemap0_8x8,tilemap *tilemap0_16x16,
178static void custom_tilemap_draw(running_machine *machine,
179   bitmap_t *bitmap,tilemap *tilemap0_8x8,tilemap *tilemap0_16x16,
179180   tilemap *tilemap1_8x8,tilemap *tilemap1_16x16, const UINT16 *rowscroll_ptr,const UINT16 scrollx,
180181   const UINT16 scrolly,const UINT16 control0, const UINT16 control1,int combine_mask,int combine_shift,int trans_mask,int flags,UINT32 priority);
181182
r2844r2845
516517
517518/*****************************************************************************************/
518519
519static void deco16_video_init(int pf12_only, int split, int full_width)
520static void deco16_video_init(running_machine *machine, int pf12_only, int split, int full_width)
520521{
521   int width = video_screen_get_width(Machine->primary_screen);
522   int height = video_screen_get_height(Machine->primary_screen);
522   int width = video_screen_get_width(machine->primary_screen);
523   int height = video_screen_get_height(machine->primary_screen);
523524   sprite_priority_bitmap = auto_bitmap_alloc(width, height, BITMAP_FORMAT_INDEXED8 );
524525
525526   pf1_tilemap_16x16 =   tilemap_create(get_pf1_tile_info,   deco16_scan_rows, 16,16,64,32);
r2844r2845
582583   deco16_raster_display_position=0;
583584}
584585
585void deco16_1_video_init(void)  /* 1 times playfield generator chip */
586void deco16_1_video_init(running_machine *machine)  /* 1 times playfield generator chip */
586587{
587   deco16_video_init(1, 0, 1);
588   deco16_video_init(machine, 1, 0, 1);
588589}
589590
590void deco16_2_video_init(int split) /* 2 times playfield generator chips */
591void deco16_2_video_init(running_machine *machine, int split) /* 2 times playfield generator chips */
591592{
592   deco16_video_init(0, split, 1);
593   deco16_video_init(machine, 0, split, 1);
593594}
594595
595void deco16_2_video_init_half_width(void) /* 2 times playfield generator chips */
596void deco16_2_video_init_half_width(running_machine *machine) /* 2 times playfield generator chips */
596597{
597   deco16_video_init(0, 0, 0);
598   deco16_video_init(machine, 0, 0, 0);
598599}
599600
600void deco_allocate_sprite_bitmap(void)
601void deco_allocate_sprite_bitmap(running_machine *machine)
601602{
602603   /* Allow sprite bitmap to be used by Deco32 games as well */
603   int width = video_screen_get_width(Machine->primary_screen);
604   int height = video_screen_get_height(Machine->primary_screen);
604   int width = video_screen_get_width(machine->primary_screen);
605   int height = video_screen_get_height(machine->primary_screen);
605606   sprite_priority_bitmap = auto_bitmap_alloc(width, height, BITMAP_FORMAT_INDEXED16 );
606607}
607608
r2844r2845
835836}
836837
837838/* A special pdrawgfx z-buffered sprite renderer that is needed to properly draw multiple sprite sources with alpha */
838void deco16_pdrawgfx(bitmap_t *dest,const gfx_element *gfx,
839void deco16_pdrawgfx(running_machine *machine,
840      bitmap_t *dest,const gfx_element *gfx,
839841      UINT32 code,UINT32 color,int flipx,int flipy,int sx,int sy,
840842      const rectangle *clip,int transparency,int transparent_color,UINT32 pri_mask,UINT32 sprite_mask,UINT8 write_pri)
841843{
842844   int ox,oy,cx,cy;
843845   int x_index,y_index,x,y;
844846
845   const pen_t *pal = &Machine->pens[gfx->color_base + gfx->color_granularity * (color % gfx->total_colors)];
847   const pen_t *pal = &machine->pens[gfx->color_base + gfx->color_granularity * (color % gfx->total_colors)];
846848   int source_base = (code % gfx->total_elements) * gfx->height;
847849
848850   /* check bounds */
r2844r2845
904906{
905907   if (use_custom_pf1)
906908   {
907      custom_tilemap_draw(bitmap,pf1_tilemap_8x8,pf1_tilemap_16x16,0,0,pf1_rowscroll_ptr,deco16_pf12_control[1], deco16_pf12_control[2], deco16_pf12_control[5]&0xff, deco16_pf12_control[6]&0xff, 0, 0, deco16_pf1_trans_mask, flags, priority);
909      custom_tilemap_draw(Machine, bitmap,pf1_tilemap_8x8,pf1_tilemap_16x16,0,0,pf1_rowscroll_ptr,deco16_pf12_control[1], deco16_pf12_control[2], deco16_pf12_control[5]&0xff, deco16_pf12_control[6]&0xff, 0, 0, deco16_pf1_trans_mask, flags, priority);
908910   }
909911   else
910912   {
r2844r2845
917919{
918920   if (use_custom_pf2)
919921   {
920      custom_tilemap_draw(bitmap,pf2_tilemap_8x8,pf2_tilemap_16x16,0,0,pf2_rowscroll_ptr,deco16_pf12_control[3], deco16_pf12_control[4], deco16_pf12_control[5]>>8, deco16_pf12_control[6]>>8, 0, 0, deco16_pf2_trans_mask, flags, priority);
922      custom_tilemap_draw(Machine, bitmap,pf2_tilemap_8x8,pf2_tilemap_16x16,0,0,pf2_rowscroll_ptr,deco16_pf12_control[3], deco16_pf12_control[4], deco16_pf12_control[5]>>8, deco16_pf12_control[6]>>8, 0, 0, deco16_pf2_trans_mask, flags, priority);
921923   }
922924   else
923925   {
r2844r2845
928930
929931void deco16_tilemap_3_draw(bitmap_t *bitmap, const rectangle *cliprect, int flags, UINT32 priority)
930932{
931   if (use_custom_pf3) custom_tilemap_draw(bitmap,0,pf3_tilemap_16x16,0,0,pf3_rowscroll_ptr,deco16_pf34_control[1], deco16_pf34_control[2], deco16_pf34_control[5]&0xff, deco16_pf34_control[6]&0xff, 0, 0, deco16_pf3_trans_mask, flags, priority);
933   if (use_custom_pf3) custom_tilemap_draw(Machine, bitmap,0,pf3_tilemap_16x16,0,0,pf3_rowscroll_ptr,deco16_pf34_control[1], deco16_pf34_control[2], deco16_pf34_control[5]&0xff, deco16_pf34_control[6]&0xff, 0, 0, deco16_pf3_trans_mask, flags, priority);
932934   else if (pf3_tilemap_16x16) tilemap_draw(bitmap,cliprect,pf3_tilemap_16x16,flags,priority);
933935}
934936
935937void deco16_tilemap_4_draw(bitmap_t *bitmap, const rectangle *cliprect, int flags, UINT32 priority)
936938{
937   if (use_custom_pf4) custom_tilemap_draw(bitmap,0,pf4_tilemap_16x16,0,0,pf4_rowscroll_ptr,deco16_pf34_control[3], deco16_pf34_control[4], deco16_pf34_control[5]>>8, deco16_pf34_control[6]>>8, 0, 0, deco16_pf4_trans_mask, flags, priority);
939   if (use_custom_pf4) custom_tilemap_draw(Machine, bitmap,0,pf4_tilemap_16x16,0,0,pf4_rowscroll_ptr,deco16_pf34_control[3], deco16_pf34_control[4], deco16_pf34_control[5]>>8, deco16_pf34_control[6]>>8, 0, 0, deco16_pf4_trans_mask, flags, priority);
938940   else if (pf4_tilemap_16x16) tilemap_draw(bitmap,cliprect,pf4_tilemap_16x16,flags,priority);
939941}
940942
r2844r2845
943945// Combines the output of two 4BPP tilemaps into an 8BPP tilemap
944946void deco16_tilemap_34_combine_draw(bitmap_t *bitmap, const rectangle *cliprect, int flags, UINT32 priority)
945947{
946   custom_tilemap_draw(bitmap,0,pf3_tilemap_16x16,0,pf4_tilemap_16x16,pf3_rowscroll_ptr,deco16_pf34_control[1], deco16_pf34_control[2], deco16_pf34_control[5]&0xff, deco16_pf34_control[6]&0xff, 0xf, 4, 0xff, flags, priority);
948   custom_tilemap_draw(Machine, bitmap,0,pf3_tilemap_16x16,0,pf4_tilemap_16x16,pf3_rowscroll_ptr,deco16_pf34_control[1], deco16_pf34_control[2], deco16_pf34_control[5]&0xff, deco16_pf34_control[6]&0xff, 0xf, 4, 0xff, flags, priority);
947949}
948950
949951/*****************************************************************************************/
r2844r2845
957959*/
958960
959961static void custom_tilemap_draw(
962   running_machine *machine,
960963   bitmap_t *bitmap,
961964   tilemap *tilemap0_8x8,
962965   tilemap *tilemap0_16x16,
r2844r2845
10161019            src_x=(src_x+1)&width_mask;
10171020            if ((flags&TILEMAP_DRAW_OPAQUE) || (p&trans_mask))
10181021            {
1019               *BITMAP_ADDR16(bitmap, y, x) = Machine->pens[p];
1022               *BITMAP_ADDR16(bitmap, y, x) = machine->pens[p];
10201023               if (priority_bitmap)
10211024               {
10221025                  UINT8 *pri = BITMAP_ADDR8(priority_bitmap, y, 0);
r2844r2845
10411044            src_x=(src_x+1)&width_mask;
10421045            if ((flags&TILEMAP_DRAW_OPAQUE) || (p&trans_mask))
10431046            {
1044               *BITMAP_ADDR32(bitmap, y, x) = Machine->pens[p];
1047               *BITMAP_ADDR32(bitmap, y, x) = machine->pens[p];
10451048               if (priority_bitmap)
10461049               {
10471050                  UINT8 *pri = BITMAP_ADDR8(priority_bitmap, y, 0);
src/mame/video/realbrk.c
r2844r2845
2020***************************************************************************/
2121
2222#include "driver.h"
23#include "deprecat.h"
2423#include "realbrk.h"
2524
2625//UINT16 *realbrk_vram_0, *realbrk_vram_1, *realbrk_vram_2, *realbrk_vregs;
r2844r2845
380379
381380/* DaiDaiKakumei */
382381/* layer : 0== bghigh<spr    1== bglow<spr<bghigh     2==spr<bglow    3==boarder */
383static void dai2kaku_draw_sprites( bitmap_t *bitmap,const rectangle *cliprect, int layer)
382static void dai2kaku_draw_sprites(running_machine *machine, bitmap_t *bitmap,const rectangle *cliprect, int layer)
384383{
385384   int offs;
386385
387   int max_x = video_screen_get_width(Machine->primary_screen);
388   int max_y = video_screen_get_height(Machine->primary_screen);
386   int max_x = video_screen_get_width(machine->primary_screen);
387   int max_y = video_screen_get_height(machine->primary_screen);
389388
390389   for ( offs = 0x3000/2; offs < 0x3600/2; offs += 2/2 )
391390   {
r2844r2845
444443            int scalex = (sx + (x + 1) * xdim) / 0x10000 - currx;
445444            int scaley = (sy + (y + 1) * ydim) / 0x10000 - curry;
446445
447            drawgfxzoom(   bitmap,Machine->gfx[gfx],
446            drawgfxzoom(   bitmap,machine->gfx[gfx],
448447                        code++,
449448                        color,
450449                        flipx, flipy,
r2844r2845
594593
595594
596595   // spr 0
597   if (layers_ctrl & 8)   dai2kaku_draw_sprites(bitmap,cliprect,2);
596   if (layers_ctrl & 8)   dai2kaku_draw_sprites(screen->machine,bitmap,cliprect,2);
598597
599598   // bglow
600599   if( realbrk_vregs[8/2] & (0x8000)){
r2844r2845
604603   }
605604
606605   // spr 1
607   if (layers_ctrl & 8)   dai2kaku_draw_sprites(bitmap,cliprect,1);
606   if (layers_ctrl & 8)   dai2kaku_draw_sprites(screen->machine,bitmap,cliprect,1);
608607
609608   // bghigh
610609   if( realbrk_vregs[8/2] & (0x8000)){
r2844r2845
614613   }
615614
616615   // spr 2
617   if (layers_ctrl & 8)   dai2kaku_draw_sprites(bitmap,cliprect,0);
616   if (layers_ctrl & 8)   dai2kaku_draw_sprites(screen->machine,bitmap,cliprect,0);
618617
619618   // fix
620619   if (layers_ctrl & 4)   tilemap_draw(bitmap,cliprect,tilemap_2,0,0);
src/mame/video/namcos1.c
r2844r2845
55*******************************************************************/
66
77#include "driver.h"
8#include "includes/namcos1.h"
89
910
1011/*
r2844r2845
3334
3435  so there is just 3x0x2000 RAM, plus the CUS116 internal registers.
3536*/
36extern UINT8 *namcos1_paletteram;
3737static UINT8 namcos1_cus116[0x10];
3838
3939/*
src/mame/video/mrdo.c
r2844r2845
5454   const int R2 = 120;
5555   const int R3 = 100;
5656   const int R4 = 75;
57   const int pull = 200;
57   const int pull = 220;
5858   float pot[16];
5959   int weight[16];
60   const float potadjust = 0.2f;   /* diode voltage drop */
60   const float potadjust = 0.7f;   /* diode voltage drop */
6161
6262   for (i = 0x0f; i >= 0; i--)
6363   {
r2844r2845
8686      int bits0, bits2;
8787      int r, g, b;
8888
89      a1 = ((i >> 3) & 0x1c) + (i & 0x03) + 32;
89      a1 = ((i >> 3) & 0x1c) + (i & 0x03) + 0x20;
9090      a2 = ((i >> 0) & 0x1c) + (i & 0x03);
9191
9292      /* red component */
r2844r2845
120120      UINT8 ctabentry = color_prom[(i - 0x100) & 0x1f];
121121
122122      if ((i - 0x100) & 0x20)
123         ctabentry = ctabentry >> 4;      /* high 4 bits are for sprite color n + 8 */
123         ctabentry >>= 4;      /* high 4 bits are for sprite color n + 8 */
124124      else
125         ctabentry = ctabentry & 0x0f;   /* low 4 bits are for sprite color n */
125         ctabentry &= 0x0f;   /* low 4 bits are for sprite color n */
126126
127      colortable_entry_set_value(machine->colortable, i, ctabentry);
127      colortable_entry_set_value(machine->colortable, i, ctabentry + ((ctabentry & 0x0c) << 3));
128128   }
129129}
130130
src/mame/video/psychic5.c
r2844r2845
66***************************************************************************/
77
88#include "driver.h"
9#include "deprecat.h"
109#include "jalblend.c"
1110
1211#define   BG_SCROLLX_LSB      0x308
r2844r2845
5352   title_screen = data & 0x01;
5453}
5554
56static void psychic5_paletteram_w(int color_offs, int offset, int data)
55static void psychic5_paletteram_w(running_machine *machine, int color_offs, int offset, int data)
5756{
5857   int r,g,b,a,val;
5958
r2844r2845
7473
7574   jal_blend_table[(offset / 2)-color_offs] = a ;
7675
77   palette_set_color_rgb(Machine,(offset / 2)-color_offs,pal4bit(r),pal4bit(g),pal4bit(b));
76   palette_set_color_rgb(machine,(offset / 2)-color_offs,pal4bit(r),pal4bit(g),pal4bit(b));
7877}
7978
8079static void set_background_palette_intensity(running_machine *machine)
r2844r2845
218217      }
219218      else if (offset < 0x600)
220219      {
221         psychic5_paletteram_w(000, offset-0x400, data);
220         psychic5_paletteram_w(machine, 000, offset-0x400, data);
222221      }
223222      else if (offset > 0x5ff && offset< 0x800)
224223      {
r2844r2845
226225      }
227226      else if (offset > 0x7ff && offset < 0xa00)
228227      {
229         psychic5_paletteram_w(256, offset-0x400, data);
228         psychic5_paletteram_w(machine, 256, offset-0x400, data);
230229      }
231230      else if (offset > 0x9ff && offset < 0xc00)
232231      {
233         psychic5_paletteram_w(256, offset-0x400, data);
232         psychic5_paletteram_w(machine, 256, offset-0x400, data);
234233      }
235234      else if (offset < 0x1000)
236235      {
r2844r2845
290289   tilemap_set_transparent_pen(fg_tilemap, 15);
291290}
292291
293#define DRAW_SPRITE(code, sx, sy) jal_blend_drawgfx(bitmap, machine->gfx[0], code, color, flipx, flipy, sx, sy, cliprect, TRANSPARENCY_PEN, 15);
292#define DRAW_SPRITE(code, sx, sy) jal_blend_drawgfx(machine, bitmap, machine->gfx[0], code, color, flipx, flipy, sx, sy, cliprect, TRANSPARENCY_PEN, 15);
294293/* #define DRAW_SPRITE(code, sx, sy) drawgfx(bitmap, machine->gfx[0], code, color, flipx, flipy, sx, sy, cliprect, TRANSPARENCY_PEN, 15); */
295294
296295static void draw_sprites(running_machine *machine, bitmap_t *bitmap, const rectangle *cliprect )
src/mame/video/taito_h.c
r2844r2845
4646***************************************************************************/
4747
4848#include "driver.h"
49#include "deprecat.h"
5049#include "taitoic.h"
5150
5251
53extern UINT16   *TC0080VCO_chain_ram_0;
54extern UINT16   *TC0080VCO_chain_ram_1;
55extern UINT16   *TC0080VCO_spriteram;
56extern UINT16   *TC0080VCO_scroll_ram;
57extern int      TC0080VCO_flipscreen;
58
5952/* These are hand-tuned values */
6053static const int zoomy_conv_table[] =
6154{
r2844r2845
9790  Screen refresh
9891***************************************************************************/
9992
100static void syvalion_draw_sprites(bitmap_t *bitmap,const rectangle *cliprect)
93static void syvalion_draw_sprites(running_machine *machine,bitmap_t *bitmap,const rectangle *cliprect)
10194{
10295   /* Y chain size is 16/32?/64/64? pixels. X chain size
10396       is always 64 pixels. */
r2844r2845
171164                     flipy ^= 0x0080;
172165                  }
173166
174                  drawgfxzoom( bitmap, Machine -> gfx[0],
167                  drawgfxzoom( bitmap, machine -> gfx[0],
175168                         tile,
176169                         color,
177170                         flipx, flipy,
r2844r2845
190183   }
191184}
192185
193static void recordbr_draw_sprites(bitmap_t *bitmap, const rectangle *cliprect, int priority)
186static void recordbr_draw_sprites(running_machine *machine, bitmap_t *bitmap, const rectangle *cliprect, int priority)
194187{
195188   /* Y chain size is 16/32?/64/64? pixels. X chain size
196189       is always 64 pixels. */
r2844r2845
283276                     flipy ^= 0x0080;
284277                  }
285278
286                  drawgfxzoom( bitmap, Machine -> gfx[0],
279                  drawgfxzoom( bitmap, machine -> gfx[0],
287280                         tile,
288281                         color,
289282                         flipx, flipy,
r2844r2845
302295   }
303296}
304297
305static void dleague_draw_sprites(bitmap_t *bitmap, const rectangle *cliprect, int priority)
298static void dleague_draw_sprites(running_machine *machine, bitmap_t *bitmap, const rectangle *cliprect, int priority)
306299{
307300   /* Y chain size is 16/32?/64/64? pixels. X chain size
308301       is always 64 pixels. */
r2844r2845
384377                        flipy ^= 0x0080;
385378                     }
386379
387                     drawgfxzoom( bitmap, Machine -> gfx[0],
380                     drawgfxzoom( bitmap, machine -> gfx[0],
388381                            tile,
389382                            color,
390383                            flipx, flipy,
r2844r2845
431424
432425   TC0080VCO_tilemap_draw(screen->machine,bitmap,cliprect,0,TILEMAP_DRAW_OPAQUE,0);
433426   TC0080VCO_tilemap_draw(screen->machine,bitmap,cliprect,1,0,0);
434   syvalion_draw_sprites(bitmap,cliprect);
427   syvalion_draw_sprites(screen->machine,bitmap,cliprect);
435428   TC0080VCO_tilemap_draw(screen->machine,bitmap,cliprect,2,0,0);
436429   return 0;
437430}
r2844r2845
451444   if ( !input_code_pressed(KEYCODE_A) )
452445      TC0080VCO_tilemap_draw(screen->machine,bitmap,cliprect,0,TILEMAP_DRAW_OPAQUE,0);
453446   if ( !input_code_pressed(KEYCODE_S) )
454      recordbr_draw_sprites(bitmap,cliprect,0);
447      recordbr_draw_sprites(screen->machine,bitmap,cliprect,0);
455448   if ( !input_code_pressed(KEYCODE_D) )
456449      TC0080VCO_tilemap_draw(screen->machine,bitmap,cliprect,1,0,0);
457450   if ( !input_code_pressed(KEYCODE_F) )
458      recordbr_draw_sprites(bitmap,cliprect,1);
451      recordbr_draw_sprites(screen->machine,bitmap,cliprect,1);
459452#else
460453   TC0080VCO_tilemap_draw(screen->machine,bitmap,cliprect,0,TILEMAP_DRAW_OPAQUE,0);
461   recordbr_draw_sprites(bitmap,cliprect,0);
454   recordbr_draw_sprites(screen->machine,bitmap,cliprect,0);
462455   TC0080VCO_tilemap_draw(screen->machine,bitmap,cliprect,1,0,0);
463   recordbr_draw_sprites(bitmap,cliprect,1);
456   recordbr_draw_sprites(screen->machine,bitmap,cliprect,1);
464457#endif
465458
466459   TC0080VCO_tilemap_draw(screen->machine,bitmap,cliprect,2,0,0);
r2844r2845
482475   if ( !input_code_pressed(KEYCODE_A) )
483476      TC0080VCO_tilemap_draw(screen->machine,bitmap,cliprect,0,TILEMAP_DRAW_OPAQUE,0);
484477   if ( !input_code_pressed(KEYCODE_S) )
485      dleague_draw_sprites(bitmap,cliprect,0);
478      dleague_draw_sprites(screen->machine,bitmap,cliprect,0);
486479   if ( !input_code_pressed(KEYCODE_D) )
487480      TC0080VCO_tilemap_draw(screen->machine,bitmap,cliprect,1,0,0);
488481   if ( !input_code_pressed(KEYCODE_F) )
489      dleague_draw_sprites(bitmap,cliprect,1);
482      dleague_draw_sprites(screen->machine,bitmap,cliprect,1);
490483#else
491484   TC0080VCO_tilemap_draw(screen->machine,bitmap,cliprect,0,TILEMAP_DRAW_OPAQUE,0);
492   dleague_draw_sprites (bitmap,cliprect,0);
485   dleague_draw_sprites (screen->machine,bitmap,cliprect,0);
493486   TC0080VCO_tilemap_draw(screen->machine,bitmap,cliprect,1,0,0);
494   dleague_draw_sprites (bitmap,cliprect,1);
487   dleague_draw_sprites (screen->machine,bitmap,cliprect,1);
495488#endif
496489
497490   TC0080VCO_tilemap_draw(screen->machine,bitmap,cliprect,2,0,0);
src/mame/video/slapshot.c
r2844r2845
44#define TC0480SCP_GFX_NUM 1
55#define TC0100SCN_GFX_NUM 1
66
7extern UINT8 TC0360PRI_regs[16];
8
97struct tempsprite
108{
119   int gfx;
src/mame/video/vsnes.c
r2844r2845
11#include "driver.h"
22#include "deprecat.h"
33#include "video/ppu2c0x.h"
4#include "includes/vsnes.h"
45
5/* from machine */
6extern int vsnes_gun_controller;
76
8
97PALETTE_INIT( vsnes )
108{
119   ppu2c0x_init_palette(machine, 0 );
src/mame/video/cninja.c
r2844r2845
4141
4242VIDEO_START( cninja )
4343{
44   deco16_2_video_init(1);
44   deco16_2_video_init(machine, 1);
4545
4646   deco16_set_tilemap_bank_callback(2,cninja_bank_callback);
4747   deco16_set_tilemap_bank_callback(3,cninja_bank_callback);
r2844r2845
5050
5151VIDEO_START( stoneage )
5252{
53   deco16_2_video_init(1);
53   deco16_2_video_init(machine, 1);
5454
5555   deco16_set_tilemap_bank_callback(2,edrandy_bank_callback);
5656   deco16_set_tilemap_bank_callback(3,edrandy_bank_callback);
r2844r2845
6464
6565VIDEO_START( edrandy )
6666{
67   deco16_2_video_init(0);
67   deco16_2_video_init(machine, 0);
6868
6969   deco16_set_tilemap_bank_callback(2,edrandy_bank_callback);
7070   deco16_set_tilemap_bank_callback(3,edrandy_bank_callback);
r2844r2845
7373
7474VIDEO_START( robocop2 )
7575{
76   deco16_2_video_init(0);
76   deco16_2_video_init(machine, 0);
7777
7878   deco16_set_tilemap_bank_callback(1,robocop2_bank_callback);
7979   deco16_set_tilemap_bank_callback(2,robocop2_bank_callback);
r2844r2845
8383
8484VIDEO_START( mutantf )
8585{
86   deco16_2_video_init(0);
86   deco16_2_video_init(machine, 0);
8787
8888   deco16_set_tilemap_bank_callback(0,mutantf_1_bank_callback);
8989   deco16_set_tilemap_bank_callback(1,mutantf_2_bank_callback);
src/mame/video/djboy.c
r2844r2845
4545VIDEO_START( djboy )
4646{
4747   background = tilemap_create(get_bg_tile_info,tilemap_scan_rows,16,16,64,32);
48   pandora_start(0,0,0);
48   pandora_start(machine,0,0,0);
4949}
5050
5151WRITE8_HANDLER( djboy_paletteram_w )
src/mame/video/tumblep.c
r2844r2845
8282
8383VIDEO_START(tumblep)
8484{
85   deco16_1_video_init();
85   deco16_1_video_init(machine);
8686}
8787
8888VIDEO_UPDATE(tumblep)
src/mame/video/dietgo.c
r2844r2845
7272
7373VIDEO_START(dietgo)
7474{
75   deco16_1_video_init();
75   deco16_1_video_init(machine);
7676
7777   deco16_set_tilemap_bank_callback(0, dietgo_bank_callback);
7878   deco16_set_tilemap_bank_callback(1, dietgo_bank_callback);
src/mame/video/taitosj.c
r2844r2845
88
99#include "driver.h"
1010#include "video/resnet.h"
11#include "includes/taitosj.h"
1112
1213
1314#define GLOBAL_FLIP_X          (*taitosj_video_mode & 0x01)
src/mame/video/nbmj8991.c
r2844r2845
77******************************************************************************/
88
99#include "driver.h"
10#include "deprecat.h"
1110#include "nb1413m3.h"
1211
1312
r2844r2845
2726static UINT8 *nbmj8991_clut;
2827
2928
30static void nbmj8991_vramflip(void);
31static void nbmj8991_gfxdraw(void);
32static void update_pixel(int x, int y);
29static void nbmj8991_vramflip(running_machine *machine);
30static void nbmj8991_gfxdraw(running_machine *machine);
31static void update_pixel(running_machine *machine, int x, int y);
3332
3433
3534/******************************************************************************
r2844r2845
105104      case 0x04:   blitter_sizex = data; break;
106105      case 0x05:   blitter_sizey = data;
107106               /* writing here also starts the blit */
108               nbmj8991_gfxdraw();
107               nbmj8991_gfxdraw(machine);
109108               break;
110109      case 0x06:   blitter_direction_x = (data & 0x01) ? 1 : 0;
111110               blitter_direction_y = (data & 0x02) ? 1 : 0;
112111               nbmj8991_flipscreen = (data & 0x04) ? 0 : 1;
113112               nbmj8991_dispflag = (data & 0x10) ? 0 : 1;
114               nbmj8991_vramflip();
113               nbmj8991_vramflip(machine);
115114               break;
116115      case 0x07:   break;
117116      case 0x10:   blitter_destx = (blitter_destx & 0xff00) | data; break;
r2844r2845
150149
151150
152151******************************************************************************/
153static void nbmj8991_vramflip(void)
152static void nbmj8991_vramflip(running_machine *machine)
154153{
155154   static int nbmj8991_flipscreen_old = 0;
156155   int x, y;
157156   UINT8 color1, color2;
158   int width = video_screen_get_width(Machine->primary_screen);
159   int height = video_screen_get_height(Machine->primary_screen);
157   int width = video_screen_get_width(machine->primary_screen);
158   int height = video_screen_get_height(machine->primary_screen);
160159
161160   if (nbmj8991_flipscreen == nbmj8991_flipscreen_old) return;
162161
r2844r2845
181180   nbmj8991_screen_refresh = 1;
182181}
183182
184static void update_pixel(int x, int y)
183static void update_pixel(running_machine *machine, int x, int y)
185184{
186   UINT8 color = nbmj8991_videoram[(y * video_screen_get_width(Machine->primary_screen)) + x];
185   UINT8 color = nbmj8991_videoram[(y * video_screen_get_width(machine->primary_screen)) + x];
187186   *BITMAP_ADDR16(nbmj8991_tmpbitmap, y, x) = color;
188187}
189188
r2844r2845
192191   nb1413m3_busyflag = 1;
193192}
194193
195static void nbmj8991_gfxdraw(void)
194static void nbmj8991_gfxdraw(running_machine *machine)
196195{
197196   UINT8 *GFX = memory_region(REGION_GFX1);
198   int width = video_screen_get_width(Machine->primary_screen);
197   int width = video_screen_get_width(machine->primary_screen);
199198
200199   int x, y;
201200   int dx1, dx2, dy;
r2844r2845
281280         if (color1 != 0xff)
282281         {
283282            nbmj8991_videoram[(dy * width) + dx1] = color1;
284            update_pixel(dx1, dy);
283            update_pixel(machine, dx1, dy);
285284         }
286285         if (color2 != 0xff)
287286         {
288287            nbmj8991_videoram[(dy * width) + dx2] = color2;
289            update_pixel(dx2, dy);
288            update_pixel(machine, dx2, dy);
290289         }
291290
292291         nb1413m3_busyctr++;
r2844r2845
318317
319318   if (nbmj8991_screen_refresh)
320319   {
321      int width = video_screen_get_width(Machine->primary_screen);
322      int height = video_screen_get_height(Machine->primary_screen);
320      int width = video_screen_get_width(screen->machine->primary_screen);
321      int height = video_screen_get_height(screen->machine->primary_screen);
323322
324323      nbmj8991_screen_refresh = 0;
325324
326325      for (y = 0; y < height; y++)
327326         for (x = 0; x < width; x++)
328            update_pixel(x, y);
327            update_pixel(screen->machine, x, y);
329328   }
330329
331330   if (nbmj8991_dispflag)
r2844r2845
364363
365364      for (y = 0; y < height; y++)
366365         for (x = 0; x < width; x++)
367            update_pixel(x, y);
366            update_pixel(screen->machine, x, y);
368367   }
369368
370369   if (nb1413m3_inputport & 0x20)
src/mame/video/blockout.c
r2844r2845
11#include "driver.h"
2#include "deprecat.h"
32
43
54
r2844r2845
87
98
109
11static void setcolor(int color,int rgb)
10static void setcolor(running_machine *machine,int color,int rgb)
1211{
1312   int bit0,bit1,bit2,bit3;
1413   int r,g,b;
r2844r2845
3534   bit3 = (rgb >> 11) & 0x01;
3635   b = 0x0e * bit0 + 0x1f * bit1 + 0x43 * bit2 + 0x8f * bit3;
3736
38   palette_set_color(Machine,color,MAKE_RGB(r,g,b));
37   palette_set_color(machine,color,MAKE_RGB(r,g,b));
3938}
4039
4140WRITE16_HANDLER( blockout_paletteram_w )
4241{
4342   COMBINE_DATA(&paletteram16[offset]);
44   setcolor(offset,paletteram16[offset]);
43   setcolor(machine,offset,paletteram16[offset]);
4544}
4645
4746WRITE16_HANDLER( blockout_frontcolor_w )
r2844r2845
4948   static UINT16 color;
5049
5150   COMBINE_DATA(&color);
52   setcolor(512,color);
51   setcolor(machine,512,color);
5352}
5453
5554
src/mame/video/canyon.c
r2844r2845
9191   draw_bombs(bitmap, cliprect);
9292
9393   /* watchdog is disabled during service mode */
94   watchdog_enable(screen->machine, !(input_port_read_indexed(screen->machine, 2) & 0x10));
94   watchdog_enable(screen->machine, !(input_port_read(screen->machine, "IN2") & 0x10));
9595
9696   return 0;
9797}
src/mame/video/namcos2.c
r2844r2845
11/* video hardware for Namco System II */
22
33#include "driver.h"
4#include "deprecat.h"
4
55#include "namcos2.h"
66#include "namcoic.h"
77
r2844r2845
254254}
255255
256256int
257namcos2_GetPosIrqScanline( void )
257namcos2_GetPosIrqScanline( running_machine *machine )
258258{
259259   /* PaleteRegister(4)? used by Finest Hour; pc=0x356e */
260260   int scanline = GetPaletteRegister(5) - 34;
261   int height = video_screen_get_height(Machine->primary_screen);
261   int height = video_screen_get_height(machine->primary_screen);
262262   if( scanline<0 )
263263      scanline = 0;
264264   else if( scanline > height )
r2844r2845
268268} /* namcos2_GetPosIrqScanline */
269269
270270static void
271UpdatePalette( void )
271UpdatePalette( running_machine *machine )
272272{
273273   int bank;
274274   for( bank=0; bank<0x20; bank++ )
r2844r2845
281281         int r = namcos2_68k_palette_ram[offset | 0x0000] & 0x00ff;
282282         int g = namcos2_68k_palette_ram[offset | 0x0800] & 0x00ff;
283283         int b = namcos2_68k_palette_ram[offset | 0x1000] & 0x00ff;
284         palette_set_color(Machine,pen++,MAKE_RGB(r,g,b));
284         palette_set_color(machine,pen++,MAKE_RGB(r,g,b));
285285         offset++;
286286      }
287287   }
r2844r2845
290290/**************************************************************************/
291291
292292static void
293DrawSpriteInit( void )
293DrawSpriteInit( running_machine *machine )
294294{
295295   int i;
296296   /* set table for sprite color == 0x0f */
r2844r2845
302302   gfx_drawmode_table[255] = DRAWMODE_NONE;
303303   for( i = 0; i<16*256; i++ )
304304   {
305      Machine->shadow_table[i] = i+0x2000;
305      machine->shadow_table[i] = i+0x2000;
306306   }
307307}
308308
r2844r2845
323323   namco_tilemap_init(2,memory_region(REGION_GFX4),TilemapCB);
324324   tilemap_roz = tilemap_create(get_tile_info_roz,tilemap_scan_rows,8,8,256,256);
325325   tilemap_set_transparent_pen(tilemap_roz,0xff);
326   DrawSpriteInit();
326   DrawSpriteInit(machine);
327327}
328328
329329static void
r2844r2845
345345   rectangle clip;
346346   int pri;
347347
348   UpdatePalette();
348   UpdatePalette(screen->machine);
349349   fillbitmap( bitmap, get_black_pen(screen->machine), cliprect );
350350   ApplyClip( &clip, cliprect );
351351
r2844r2845
373373VIDEO_START( finallap )
374374{
375375   namco_tilemap_init(2,memory_region(REGION_GFX4),TilemapCB);
376   DrawSpriteInit();
376   DrawSpriteInit(machine);
377377   namco_road_init(machine, 3);
378378}
379379
r2844r2845
382382   rectangle clip;
383383   int pri;
384384
385   UpdatePalette();
385   UpdatePalette(screen->machine);
386386   fillbitmap( bitmap, get_black_pen(screen->machine), cliprect );
387387   ApplyClip( &clip, cliprect );
388388
r2844r2845
419419   rectangle clip;
420420   int pri;
421421
422   UpdatePalette();
422   UpdatePalette(screen->machine);
423423   fillbitmap( bitmap, get_black_pen(screen->machine), cliprect );
424424   ApplyClip( &clip, cliprect );
425425
r2844r2845
452452   rectangle clip;
453453   int pri;
454454
455   UpdatePalette();
455   UpdatePalette(screen->machine);
456456   fillbitmap( bitmap, get_black_pen(screen->machine), cliprect );
457457   ApplyClip( &clip, cliprect );
458458
r2844r2845
478478   rectangle clip;
479479   int pri;
480480
481   UpdatePalette();
481   UpdatePalette(screen->machine);
482482   fillbitmap( bitmap, get_black_pen(screen->machine), cliprect );
483483   ApplyClip( &clip, cliprect );
484484
src/mame/video/dassault.c
r2844r2845
128128
129129         while (multi >= 0)
130130         {
131            deco16_pdrawgfx(bitmap,machine->gfx[gfxbank],
131            deco16_pdrawgfx(machine,
132                  bitmap,machine->gfx[gfxbank],
132133                  sprite - multi * inc,
133134                  colour,
134135                  fx,fy,
r2844r2845
150151
151152VIDEO_START( dassault )
152153{
153   deco16_2_video_init(0);
154   deco16_2_video_init(machine, 0);
154155
155156   deco16_set_tilemap_bank_callback(0,dassault_bank_callback);
156157   deco16_set_tilemap_bank_callback(1,dassault_bank_callback);
src/mame/video/tatsumi.c
r2844r2845
11#include "driver.h"
2#include "deprecat.h"
32#include "tatsumi.h"
43
54static tilemap *tx_layer;
r2844r2845
1211UINT16* tatsumi_sprite_control_ram;
1312static UINT16* roundup5_vram;
1413
15extern UINT16 bigfight_a40000[2];
1614static UINT16 bigfight_bank, bigfight_last_bank;
1715
1816static UINT8 roundupt_crt_selected_reg;
1917static UINT8 roundupt_crt_reg[64];
20extern UINT16 debugA,debugB,debugC,debugD;
2118
2219static UINT8* shadow_pen_array;
2320
r2844r2845
237234
238235/********************************************************************/
239236
240INLINE void roundupt_drawgfxzoomrotate( bitmap_t *dest_bmp,const gfx_element *gfx,
237INLINE void roundupt_drawgfxzoomrotate( running_machine *machine,
238      bitmap_t *dest_bmp,const gfx_element *gfx,
241239      UINT32 code,UINT32 color,int flipx,int flipy,UINT32 ssx,UINT32 ssy,
242240      const rectangle *clip, int scalex, int scaley, int rotate, int write_priority_only )
243241{
r2844r2845
271269   {
272270      if( gfx )
273271      {
274         const pen_t *pal = &Machine->pens[gfx->color_base + gfx->color_granularity * (color % gfx->total_colors)];
272         const pen_t *pal = &machine->pens[gfx->color_base + gfx->color_granularity * (color % gfx->total_colors)];
275273         const UINT8 *shadow_pens = shadow_pen_array + (gfx->color_granularity * (color % gfx->total_colors));
276274         int source_base = (code % gfx->total_elements) * gfx->height;
277275
r2844r2845
632630
633631            for (w=0; w<x_width; w++) {
634632               if (rotate)
635                  roundupt_drawgfxzoomrotate(temp_bitmap,machine->gfx[0],
633                  roundupt_drawgfxzoomrotate(machine,
634                        temp_bitmap,machine->gfx[0],
636635                        base,
637636                        color,fx,0,x_pos,render_y,
638637                        cliprect,scale,scale,0,write_priority_only);
639638               else
640                  roundupt_drawgfxzoomrotate(bitmap,machine->gfx[0],
639                  roundupt_drawgfxzoomrotate(machine,
640                        bitmap,machine->gfx[0],
641641                        base,
642642                        color,fx,0,x_pos,render_y,
643643                        cliprect,scale,scale,0,write_priority_only);
src/mame/video/supbtime.c
r2844r2845
8585
8686VIDEO_START(supbtime)
8787{
88   deco16_1_video_init();
88   deco16_1_video_init(machine);
8989}
9090
9191VIDEO_UPDATE(supbtime)
src/mame/video/konamiic.c
r2844r2845
4141Rock 'n Rage /      GX620*1986    6309 007342        007420               007327
4242  Koi no Hotrock
4343Mr Kabuki/Mr Goemon GX621*1986     Z80           005849
44Jackal              GX631*1986    6809?          005885(x2)
44Jackal              GX631*1986    6809          005885(x2)               007327 007343 (address decoder)
4545Contra / Gryzor     GX633*1987    6809?          007121(x2)               007593
4646Flak Attack         GX669*1987    6309           007121                   007327 007452
4747Devil World / Dark  GX687*1987 2x68000           TWIN16
r2844r2845
11491149***************************************************************************/
11501150
11511151#include "driver.h"
1152#include "deprecat.h"
11531152#include "video/konamiic.h"
11541153
11551154#define VERBOSE 0
r2844r2845
74867485
74877486// The DMA process should be instantaneous but since rendering in MAME is performed at VIDEO_UPDATE()
74887487// the K053250 memory must be buffered to maintain visual integrity.
7489void K053250_dma(int chip, int limiter)
7488void K053250_dma(running_machine *machine, int chip, int limiter)
74907489{
74917490   struct K053250_CHIPTAG *chip_ptr;
74927491   int last_frame, current_frame;
74937492
74947493   chip_ptr = &K053250_info.chip[chip];
74957494
7496   current_frame = video_screen_get_frame_number(Machine->primary_screen);
7495   current_frame = video_screen_get_frame_number(machine->primary_screen);
74977496   last_frame = chip_ptr->frame;
74987497
74997498   if (limiter && current_frame == last_frame) return; // make sure we only do DMA transfer once per frame
r2844r2845
75547553   if (ACCESSING_BITS_0_7)
75557554   {
75567555      // start LVC DMA transfer at the falling edge of control register's bit1
7557      if (offset == 4 && !(data & 2) && (K053250_info.chip[0].regs[4] & 2)) K053250_dma(0, 1);
7556      if (offset == 4 && !(data & 2) && (K053250_info.chip[0].regs[4] & 2)) K053250_dma(machine, 0, 1);
75587557
75597558      K053250_info.chip[0].regs[offset] = data;
75607559   }
r2844r2845
75877586   if (ACCESSING_BITS_0_7)
75887587   {
75897588      // start LVC DMA transfer at the falling edge of control register's bit1
7590      if (offset == 4 && !(data & 2) && (K053250_info.chip[1].regs[4] & 2)) K053250_dma(1, 1);
7589      if (offset == 4 && !(data & 2) && (K053250_info.chip[1].regs[4] & 2)) K053250_dma(machine, 1, 1);
75917590
75927591      K053250_info.chip[1].regs[offset] = data;
75937592   }
src/mame/video/retofinv.c
r2844r2845
77***************************************************************************/
88
99#include "driver.h"
10#include "includes/retofinv.h"
1011
1112UINT8 *retofinv_bg_videoram;
1213UINT8 *retofinv_fg_videoram;
src/mame/video/konamiic.h
r2844r2845
430430void K053250_draw(running_machine *machine, bitmap_t *bitmap, const rectangle *cliprect, int chip, int colorbase, int flags, int pri);
431431void K053250_set_LayerOffset(int chip, int offsx, int offsy);
432432void K053250_unpack_pixels(int region);
433void K053250_dma(int chip, int limiter);
433void K053250_dma(running_machine *machine, int chip, int limiter);
434434
435435
436436// K053252 CRT and interrupt control unit
src/mame/video/harddriv.c
r2844r2845
55****************************************************************************/
66
77#include "driver.h"
8#include "deprecat.h"
98#include "cpu/tms34010/tms34010.h"
109#include "cpu/tms34010/34010ops.h"
1110#include "harddriv.h"
r2844r2845
209208 *
210209 *************************************/
211210
212static void update_palette_bank(int newbank)
211static void update_palette_bank(running_machine *machine, int newbank)
213212{
214   video_screen_update_partial(Machine->primary_screen, video_screen_get_vpos(Machine->primary_screen));
213   video_screen_update_partial(machine->primary_screen, video_screen_get_vpos(machine->primary_screen));
215214   gfx_palettebank = newbank;
216215}
217216
r2844r2845
278277         break;
279278
280279      case 0x02:
281         update_palette_bank((gfx_palettebank & ~1) | val);
280         update_palette_bank(machine, (gfx_palettebank & ~1) | val);
282281         break;
283282
284283      case 0x03:
285         update_palette_bank((gfx_palettebank & ~2) | (val << 1));
284         update_palette_bank(machine, (gfx_palettebank & ~2) | (val << 1));
286285         break;
287286
288287      case 0x04:
289288         if (machine->config->total_colors >= 256 * 8)
290            update_palette_bank((gfx_palettebank & ~4) | (val << 2));
289            update_palette_bank(machine, (gfx_palettebank & ~4) | (val << 2));
291290         break;
292291
293292      case 0x07:
r2844r2845
369368 *
370369 *************************************/
371370
372INLINE void gsp_palette_change(int offset)
371INLINE void gsp_palette_change(running_machine *machine, int offset)
373372{
374373   int red = (hdgsp_paletteram_lo[offset] >> 8) & 0xff;
375374   int green = hdgsp_paletteram_lo[offset] & 0xff;
376375   int blue = hdgsp_paletteram_hi[offset] & 0xff;
377   palette_set_color(Machine, offset, MAKE_RGB(red, green, blue));
376   palette_set_color(machine, offset, MAKE_RGB(red, green, blue));
378377}
379378
380379
r2844r2845
395394   offset = gfx_palettebank * 0x100 + (offset & 0xff);
396395
397396   COMBINE_DATA(&hdgsp_paletteram_lo[offset]);
398   gsp_palette_change(offset);
397   gsp_palette_change(machine, offset);
399398}
400399
401400
r2844r2845
423422   offset = gfx_palettebank * 0x100 + (offset & 0xff);
424423
425424   COMBINE_DATA(&hdgsp_paletteram_hi[offset]);
426   gsp_palette_change(offset);
425   gsp_palette_change(machine, offset);
427426}
428427
429428
src/mame/video/m72.c
r2844r2845
11#include "driver.h"
2#include "deprecat.h"
32#include "audio/m72.h"
43#include "m72.h"
54
r2844r2845
260259   return paletteram16_2[offset] | 0xffe0;   /* only D0-D4 are connected */
261260}
262261
263INLINE void changecolor(int color,int r,int g,int b)
262INLINE void changecolor(running_machine *machine,int color,int r,int g,int b)
264263{
265   palette_set_color_rgb(Machine,color,pal5bit(r),pal5bit(g),pal5bit(b));
264   palette_set_color_rgb(machine,color,pal5bit(r),pal5bit(g),pal5bit(b));
266265}
267266
268267WRITE16_HANDLER( m72_palette1_w )
r2844r2845
272271
273272   COMBINE_DATA(&paletteram16[offset]);
274273   offset &= 0x0ff;
275   changecolor(offset,
274   changecolor(machine,
275         offset,
276276         paletteram16[offset + 0x000],
277277         paletteram16[offset + 0x200],
278278         paletteram16[offset + 0x400]);
r2844r2845
285285
286286   COMBINE_DATA(&paletteram16_2[offset]);
287287   offset &= 0x0ff;
288   changecolor(offset + 256,
288   changecolor(machine,
289         offset + 256,
289290         paletteram16_2[offset + 0x000],
290291         paletteram16_2[offset + 0x200],
291292         paletteram16_2[offset + 0x400]);
src/mame/video/aeroboto.c
r2844r2845
7575
7676READ8_HANDLER( aeroboto_in0_r )
7777{
78   char port[4];
79
80   sprintf(port, "IN%d", flip_screen_get() ? 1 : 0);
81   return input_port_read(machine, port);
78   return input_port_read(machine, flip_screen_get() ? "IN1" : "IN0");
8279}
8380
8481WRITE8_HANDLER( aeroboto_3000_w )
src/mame/video/atarig1.c
r2844r2845
117117   atarigen_playfield_tilemap = tilemap_create(get_playfield_tile_info, tilemap_scan_rows,  8,8, 64,64);
118118
119119   /* initialize the motion objects */
120   atarirle_init(0, atarig1_pitfight ? &modesc_pitfight : &modesc_hydra);
120   atarirle_init(machine, 0, atarig1_pitfight ? &modesc_pitfight : &modesc_hydra);
121121
122122   /* initialize the alphanumerics */
123123   atarigen_alpha_tilemap = tilemap_create(get_alpha_tile_info, tilemap_scan_rows,  8,8, 64,32);
src/mame/video/legionna.c
r2844r2845
55***************************************************************************/
66
77#include "driver.h"
8#include "includes/legionna.h"
89
910UINT16 *legionna_back_data,*legionna_fore_data,*legionna_mid_data,*legionna_scrollram16,*legionna_textram;
1011
src/mame/video/m90.c
r2844r2845
4646         tileinfo->category = (color & 0x30) ? 1 : 0;
4747}
4848
49INLINE void bomblord_get_tile_info(running_machine *machine,tile_data *tileinfo,int tile_index,int layer)
50{
51   int tile,color;
52   tile_index = 2*tile_index + (layer * 0x2000);
4953
54   tile=m90_video_data[tile_index];
55   color=m90_video_data[tile_index+1];
56   SET_TILE_INFO(
57         0,
58         tile,
59         color&0xf,
60         TILE_FLIPYX((color & 0xc0) >> 6));
61         tileinfo->category = (color & 0x30) ? 1 : 0;
62}
63
64INLINE void dynablsb_get_tile_info(running_machine *machine,tile_data *tileinfo,int tile_index,int layer)
65{
66   int tile,color;
67   tile_index = 2*tile_index + (layer * 0x2000);
68
69   tile=m90_video_data[tile_index];
70   color=m90_video_data[tile_index+1];
71   SET_TILE_INFO(
72         0,
73         tile,
74         color&0xf,
75         TILE_FLIPYX((color & 0xc0) >> 6));
76         tileinfo->category = (color & 0x30) ? 1 : 0;
77}
78
5079static TILE_GET_INFO( get_pf1_tile_info ) { get_tile_info(machine,tileinfo,tile_index,0,0x3); }
5180static TILE_GET_INFO( get_pf1w_tile_info ) { get_tile_info(machine,tileinfo,tile_index,0,0x2); }
5281static TILE_GET_INFO( get_pf2_tile_info ) { get_tile_info(machine,tileinfo,tile_index,1,0x3); }
5382static TILE_GET_INFO( get_pf2w_tile_info ) { get_tile_info(machine,tileinfo,tile_index,1,0x2); }
5483
84static TILE_GET_INFO( bomblord_get_pf1_tile_info ) { bomblord_get_tile_info(machine,tileinfo,tile_index,0); }
85static TILE_GET_INFO( bomblord_get_pf1w_tile_info ) { bomblord_get_tile_info(machine,tileinfo,tile_index,0); }
86static TILE_GET_INFO( bomblord_get_pf2_tile_info ) { bomblord_get_tile_info(machine,tileinfo,tile_index,2); }
87static TILE_GET_INFO( bomblord_get_pf2w_tile_info ) { bomblord_get_tile_info(machine,tileinfo,tile_index,2); }
5588
89static TILE_GET_INFO( dynablsb_get_pf1_tile_info ) { dynablsb_get_tile_info(machine,tileinfo,tile_index,0); }
90static TILE_GET_INFO( dynablsb_get_pf1w_tile_info ) { dynablsb_get_tile_info(machine,tileinfo,tile_index,0); }
91static TILE_GET_INFO( dynablsb_get_pf2_tile_info ) { dynablsb_get_tile_info(machine,tileinfo,tile_index,2); }
92static TILE_GET_INFO( dynablsb_get_pf2w_tile_info ) { dynablsb_get_tile_info(machine,tileinfo,tile_index,2); }
93
5694VIDEO_START( m90 )
5795{
5896   pf1_layer =      tilemap_create(get_pf1_tile_info, tilemap_scan_rows,8,8,64,64);
r2844r2845
66104   state_save_register_global_array(m90_video_control_data);
67105}
68106
107VIDEO_START( bomblord )
108{
109   pf1_layer =      tilemap_create(bomblord_get_pf1_tile_info, tilemap_scan_rows,8,8,64,64);
110   pf1_wide_layer = tilemap_create(bomblord_get_pf1w_tile_info,tilemap_scan_rows,8,8,128,64);
111   pf2_layer =      tilemap_create(bomblord_get_pf2_tile_info, tilemap_scan_rows,8,8,64,64);
112   pf2_wide_layer = tilemap_create(bomblord_get_pf2w_tile_info,tilemap_scan_rows,8,8,128,64);
113
114   tilemap_set_transparent_pen(pf2_layer,0);
115   tilemap_set_transparent_pen(pf2_wide_layer,0);
116   tilemap_set_transparent_pen(pf1_layer,0);
117   tilemap_set_transparent_pen(pf1_wide_layer,0);
118
119   state_save_register_global_array(m90_video_control_data);
120}
121
122VIDEO_START( dynablsb )
123{
124   pf1_layer =      tilemap_create(dynablsb_get_pf1_tile_info, tilemap_scan_rows,8,8,64,64);
125   pf1_wide_layer = tilemap_create(dynablsb_get_pf1w_tile_info,tilemap_scan_rows,8,8,128,64);
126   pf2_layer =      tilemap_create(dynablsb_get_pf2_tile_info, tilemap_scan_rows,8,8,64,64);
127   pf2_wide_layer = tilemap_create(dynablsb_get_pf2w_tile_info,tilemap_scan_rows,8,8,128,64);
128
129   tilemap_set_transparent_pen(pf2_layer,0);
130   tilemap_set_transparent_pen(pf2_wide_layer,0);
131
132   state_save_register_global_array(m90_video_control_data);
133}
134
69135static void draw_sprites(running_machine *machine, bitmap_t *bitmap,const rectangle *cliprect)
70136{
71137   int offs;
r2844r2845
118184   }
119185}
120186
121#if 0
122static void bootleg_draw_sprites(running_machine *machine, bitmap_t *bitmap,const rectangle *cliprect)
187static void bomblord_draw_sprites(running_machine *machine, bitmap_t *bitmap,const rectangle *cliprect)
123188{
124   int offs;
189   int offs = 0, last_sprite = 0;
190   int x,y,sprite,colour,fx,fy;
125191
126   for (offs = 0x0;offs <0x800-8;offs+= 8) {
127      int x,y,sprite,colour,fx,fy;
128192
129      if (/*spriteram[offs+0]==0x78 &&*/ spriteram[offs+1]==0x7f) continue;
193   while ((offs < spriteram_size/2) & (spriteram16[offs+0] != 0x8000))
194   {
195      last_sprite = offs;
196      offs += 4;
197   }
130198
131      y=(spriteram[offs+0] | (spriteram[offs+1]<<8))&0x1ff;
132      x=(spriteram[offs+6] | (spriteram[offs+7]<<8))&0x1ff;
199   for (offs = last_sprite; offs >= 0; offs -= 4)
200   {
201      sprite = spriteram16[offs+1];
202      colour = (spriteram16[offs+2] >> 9) & 0x0f;
133203
134      x = x - /*64 -*/ 16;
135      y = 256 - /*32 -*/ y;
204      y = (spriteram16[offs+0] & 0x1ff) + 152;
205      x = (spriteram16[offs+3] & 0x1ff) + 16;
136206
137       sprite=(spriteram[offs+2] | (spriteram[offs+3]<<8));
138      colour=(spriteram[offs+5]>>1)&0xf;
207      x = x - 16;
208      y = 512 - y;
139209
140      fx=spriteram[offs+5]&1;
141      fy=0;//spriteram[offs+5]&2;
210      if (y < 0) y += 512;
142211
143      drawgfx(bitmap,machine->gfx[1],
144            sprite&0x1fff,
212      fx = (spriteram16[offs+3] >> 8) & 0x02;
213      fy = (spriteram16[offs+2] >> 8) & 0x80;
214
215      pdrawgfx(bitmap,machine->gfx[1],
216            sprite,
145217            colour,
146218            fx,fy,
147219            x,y,
148            cliprect,TRANSPARENCY_PEN,0);
220            cliprect,TRANSPARENCY_PEN,0,
221            (colour & 0x08) ? 0x00 : 0x02);
149222   }
150223}
151#endif
152224
225static void dynablsb_draw_sprites(running_machine *machine, bitmap_t *bitmap,const rectangle *cliprect)
226{
227   int offs = 0, last_sprite = 0;
228   int x,y,sprite,colour,fx,fy;
229
230   while ((offs < spriteram_size/2) & (spriteram16[offs+0] != 0xffff))
231   {
232      last_sprite = offs;
233      offs += 4;
234   }
235
236   for (offs = last_sprite; offs >= 0; offs -= 4)
237   {
238      sprite = spriteram16[offs+1];
239      colour = (spriteram16[offs+2] >> 9) & 0x0f;
240
241      y = (spriteram16[offs+0] & 0x1ff) + 288;
242      x = (spriteram16[offs+3] & 0x1ff) - 64;
243
244      x = x - 16;
245      y = 512 - y;
246
247      if (y < 0) y += 512;
248
249      fx = (spriteram16[offs+3] >> 8) & 0x02;
250      fy = (spriteram16[offs+2] >> 8) & 0x80;
251
252      pdrawgfx(bitmap,machine->gfx[1],
253            sprite,
254            colour,
255            fx,fy,
256            x,y,
257            cliprect,TRANSPARENCY_PEN,0,
258            (colour & 0x08) ? 0x00 : 0x02);
259   }
260}
261
153262WRITE16_HANDLER( m90_video_control_w )
154263{
155264   COMBINE_DATA(&m90_video_control_data[offset]);
265//  printf("%04x-%04x ",offset,m90_video_control_data[offset]);
156266}
157267
158
159268static void markdirty(tilemap *tmap,int page,offs_t offset)
160269{
161270   offset -= page * 0x2000;
r2844r2845
164273      tilemap_mark_tile_dirty(tmap,offset/2);
165274}
166275
167
168276WRITE16_HANDLER( m90_video_w )
169277{
170278   COMBINE_DATA(&m90_video_data[offset]);
r2844r2845
186294   if (m90_video_control_data[5]&0x10) pf1_enable=0; else pf1_enable=1;
187295   if (m90_video_control_data[6]&0x10) pf2_enable=0; else pf2_enable=1;
188296
189//  tilemap_set_enable(pf1_layer,pf1_enable);
190//  tilemap_set_enable(pf2_layer,pf2_enable);
191//  tilemap_set_enable(pf1_wide_layer,pf1_enable);
192//  tilemap_set_enable(pf2_wide_layer,pf2_enable);
297// tilemap_set_enable(pf1_layer,pf1_enable);
298// tilemap_set_enable(pf2_layer,pf2_enable);
299// tilemap_set_enable(pf1_wide_layer,pf1_enable);
300// tilemap_set_enable(pf2_wide_layer,pf2_enable);
193301
194302   /* Dirty tilemaps if VRAM base changes */
195303   if (pf1_base!=last_pf1)
r2844r2845
253361
254362      if (pf2_enable)
255363      {
256         if (m90_video_control_data[6] & 0x4)
364         if (m90_video_control_data[6] & 0x4) {
257365            tilemap_draw(bitmap,cliprect,pf2_wide_layer,0,0);
258         else
366            tilemap_draw(bitmap,cliprect,pf2_wide_layer,1,1);
367         } else {
259368            tilemap_draw(bitmap,cliprect,pf2_layer,0,0);
260
261         if (m90_video_control_data[6] & 0x4)
262            tilemap_draw(bitmap,cliprect,pf2_wide_layer,1,1);
263         else
264369            tilemap_draw(bitmap,cliprect,pf2_layer,1,1);
370         }
265371      }
266372
267373      if (pf1_enable)
268374      {
269         if (m90_video_control_data[5] & 0x4)
375         if (m90_video_control_data[5] & 0x4) {
270376            tilemap_draw(bitmap,cliprect,pf1_wide_layer,0,0);
271         else
377            tilemap_draw(bitmap,cliprect,pf1_wide_layer,1,1);
378         } else {
272379            tilemap_draw(bitmap,cliprect,pf1_layer,0,0);
273
274         if (m90_video_control_data[5] & 0x4)
275            tilemap_draw(bitmap,cliprect,pf1_wide_layer,1,1);
276         else
277380            tilemap_draw(bitmap,cliprect,pf1_layer,1,1);
381         }
278382      }
279383
280384      draw_sprites(screen->machine,bitmap,cliprect);
r2844r2845
284388
285389   return 0;
286390}
391
392VIDEO_UPDATE( bomblord )
393{
394   int i;
395   fillbitmap(priority_bitmap,0,cliprect);
396   fillbitmap(bitmap,get_black_pen(screen->machine),cliprect);
397
398   /* Setup scrolling */
399   if (m90_video_control_data[6]&0x20) {
400      tilemap_set_scroll_rows(pf1_layer,512);
401      tilemap_set_scroll_rows(pf1_wide_layer,512);
402      for (i=0; i<512; i++)
403         tilemap_set_scrollx( pf1_layer,i, m90_video_data[0xf400/2+i]-12);
404      for (i=0; i<512; i++)
405         tilemap_set_scrollx( pf1_wide_layer,i, m90_video_data[0xf400/2+i]-12+256);
406   } else {
407      tilemap_set_scroll_rows(pf1_layer,1);
408      tilemap_set_scroll_rows(pf1_wide_layer,1);
409      tilemap_set_scrollx( pf1_layer,0,  m90_video_data[0xf004/2]-12);
410      tilemap_set_scrollx( pf1_wide_layer,0, m90_video_data[0xf004/2]-12 );
411   }
412
413   if (m90_video_control_data[6] & 0x02) {
414      tilemap_mark_all_tiles_dirty(pf2_wide_layer);
415      tilemap_set_scrollx( pf2_wide_layer,0, m90_video_data[0xf000/2]-16 );
416      tilemap_set_scrolly( pf2_wide_layer,0, m90_video_data[0xf008/2]+388 );
417      tilemap_draw(bitmap,cliprect,pf2_wide_layer,0,0);
418      tilemap_draw(bitmap,cliprect,pf2_wide_layer,1,1);
419   } else {
420      tilemap_mark_all_tiles_dirty(pf2_layer);
421      tilemap_set_scrollx( pf2_layer,0, m90_video_data[0xf000/2]-16 );
422      tilemap_set_scrolly( pf2_layer,0, m90_video_data[0xf008/2]-120 );
423      tilemap_draw(bitmap,cliprect,pf2_layer,0,0);
424      tilemap_draw(bitmap,cliprect,pf2_layer,1,1);
425   }
426
427   if (m90_video_control_data[6] & 0x04) {
428      tilemap_mark_all_tiles_dirty(pf1_wide_layer);
429      tilemap_set_scrolly( pf1_wide_layer,0, m90_video_data[0xf00c/2]+392 );
430      tilemap_draw(bitmap,cliprect,pf1_wide_layer,0,0);
431      tilemap_draw(bitmap,cliprect,pf1_wide_layer,1,1);
432   } else {
433      tilemap_mark_all_tiles_dirty(pf1_layer);
434      tilemap_set_scrolly( pf1_layer,0, m90_video_data[0xf00c/2]-116 );
435      tilemap_draw(bitmap,cliprect,pf1_layer,0,0);
436      tilemap_draw(bitmap,cliprect,pf1_layer,1,1);
437   }
438
439   bomblord_draw_sprites(screen->machine,bitmap,cliprect);
440
441   return 0;
442}
443
444VIDEO_UPDATE( dynablsb )
445{
446   fillbitmap(priority_bitmap,0,cliprect);
447   fillbitmap(bitmap,get_black_pen(screen->machine),cliprect);
448
449   if (!(m90_video_data[0xf008/2] & 0x4000)) {
450      tilemap_mark_all_tiles_dirty(pf1_wide_layer);
451      tilemap_set_scroll_rows(pf1_wide_layer,1);
452      tilemap_set_scrollx( pf1_wide_layer,0, m90_video_data[0xf004/2]+64);
453      tilemap_set_scrolly( pf1_wide_layer,0, m90_video_data[0xf006/2]+512);
454      tilemap_draw(bitmap,cliprect,pf1_wide_layer,0,0);
455      tilemap_draw(bitmap,cliprect,pf1_wide_layer,1,1);
456   } else {
457      tilemap_mark_all_tiles_dirty(pf1_layer);
458      tilemap_set_scroll_rows(pf1_layer,1);
459      tilemap_set_scrollx( pf1_layer,0, m90_video_data[0xf004/2]+64);
460      tilemap_set_scrolly( pf1_layer,0, m90_video_data[0xf006/2]+4);
461      tilemap_draw(bitmap,cliprect,pf1_layer,0,0);
462      tilemap_draw(bitmap,cliprect,pf1_layer,1,1);
463   }
464
465   if (!(m90_video_data[0xf008/2] & 0x8000)) {
466      tilemap_mark_all_tiles_dirty(pf2_wide_layer);
467      tilemap_set_scroll_rows(pf2_wide_layer,1);
468      tilemap_set_scrollx( pf2_wide_layer,0, m90_video_data[0xf000/2]+68);
469      tilemap_set_scrolly( pf2_wide_layer,0, m90_video_data[0xf002/2]+512);
470      tilemap_draw(bitmap,cliprect,pf2_wide_layer,0,0);
471      tilemap_draw(bitmap,cliprect,pf2_wide_layer,1,1);
472   } else {
473      tilemap_mark_all_tiles_dirty(pf2_layer);
474      tilemap_set_scroll_rows(pf2_layer,1);
475      tilemap_set_scrollx( pf2_layer,0, m90_video_data[0xf000/2]+68);
476      tilemap_set_scrolly( pf2_layer,0, m90_video_data[0xf002/2]+4);
477      tilemap_draw(bitmap,cliprect,pf2_layer,0,0);
478      tilemap_draw(bitmap,cliprect,pf2_layer,1,1);
479   }
480
481   dynablsb_draw_sprites(screen->machine,bitmap,cliprect);
482
483   return 0;
484}
src/mame/video/playch10.c
r2844r2845
11#include "driver.h"
22#include "deprecat.h"
33#include "video/ppu2c0x.h"
4#include "includes/playch10.h"
45
5/* from machine */
6extern int pc10_sdcs;         /* ShareD Chip Select */
7extern int pc10_dispmask;      /* Display Mask */
8extern int pc10_gun_controller;   /* whether we need to draw a crosshair or not */
9extern int pc10_int_detect;
10extern int pc10_game_mode;
11extern int pc10_dispmask_old;
12
136static int pc10_bios;
147
158static tilemap *bg_tilemap;
src/mame/video/atari.c
r2844r2845
947947}
948948
949949
950static void antic_linerefresh(void)
950static void antic_linerefresh(running_machine *machine)
951951{
952952   int x, y;
953953   UINT8 *src;
r2844r2845
955955   UINT32 scanline[4 + (HCHARS * 2) + 4];
956956
957957   /* increment the scanline */
958    if( ++antic.scanline == video_screen_get_height(Machine->primary_screen) )
958    if( ++antic.scanline == video_screen_get_height(machine->primary_screen) )
959959    {
960960        /* and return to the top if the frame was complete */
961961        antic.scanline = 0;
r2844r2845
10551055   draw_scanline8(tmpbitmap, 12, y, sizeof(scanline), (const UINT8 *) scanline, NULL, -1);
10561056}
10571057
1058static int cycle(void)
1058static int cycle(running_machine *machine)
10591059{
1060   return video_screen_get_hpos(Machine->primary_screen) * CYCLES_PER_LINE / video_screen_get_width(Machine->primary_screen);
1060   return video_screen_get_hpos(machine->primary_screen) * CYCLES_PER_LINE / video_screen_get_width(machine->primary_screen);
10611061}
10621062
1063static void after(int cycles, timer_fired_func function, const char *funcname)
1063static void after(running_machine *machine, int cycles, timer_fired_func function, const char *funcname)
10641064{
1065    attotime duration = attotime_make(0, attotime_to_attoseconds(video_screen_get_scan_period(Machine->primary_screen)) * cycles / CYCLES_PER_LINE);
1065    attotime duration = attotime_make(0, attotime_to_attoseconds(video_screen_get_scan_period(machine->primary_screen)) * cycles / CYCLES_PER_LINE);
10661066    (void)funcname;
10671067   LOG(("           after %3d (%5.1f us) %s\n", cycles, attotime_to_double(duration) * 1.0e6, funcname));
10681068   timer_set(duration, NULL, 0, function);
r2844r2845
10721072{
10731073   if( antic.w.nmien & DLI_NMI )
10741074   {
1075      LOG(("           @cycle #%3d issue DLI\n", cycle()));
1075      LOG(("           @cycle #%3d issue DLI\n", cycle(machine)));
10761076      antic.r.nmist |= DLI_NMI;
10771077      cpunum_set_input_line(machine, 0, INPUT_LINE_NMI, PULSE_LINE);
10781078   }
10791079   else
10801080   {
1081      LOG(("           @cycle #%3d DLI not enabled\n", cycle()));
1081      LOG(("           @cycle #%3d DLI not enabled\n", cycle(machine)));
10821082    }
10831083}
10841084
r2844r2845
11381138 *****************************************************************************/
11391139static TIMER_CALLBACK( antic_line_done )
11401140{
1141   LOG(("           @cycle #%3d antic_line_done\n", cycle()));
1141   LOG(("           @cycle #%3d antic_line_done\n", cycle(machine)));
11421142   if( antic.w.wsync )
11431143    {
1144      LOG(("           @cycle #%3d release WSYNC\n", cycle()));
1144      LOG(("           @cycle #%3d release WSYNC\n", cycle(machine)));
11451145        /* release the CPU if it was actually waiting for HSYNC */
11461146        cpu_trigger(machine, TRIGGER_HSYNC);
11471147        /* and turn off the 'wait for hsync' flag */
11481148        antic.w.wsync = 0;
11491149    }
1150   LOG(("           @cycle #%3d release CPU\n", cycle()));
1150   LOG(("           @cycle #%3d release CPU\n", cycle(machine)));
11511151    /* release the CPU (held for emulating cycles stolen by ANTIC DMA) */
11521152   cpu_trigger(machine, TRIGGER_STEAL);
11531153
11541154   /* refresh the display (translate color clocks to pixels) */
1155    antic_linerefresh();
1155    antic_linerefresh(machine);
11561156}
11571157
11581158/*****************************************************************************
r2844r2845
11661166 *****************************************************************************/
11671167static TIMER_CALLBACK( antic_steal_cycles )
11681168{
1169   LOG(("           @cycle #%3d steal %d cycles\n", cycle(), antic.steal_cycles));
1170   after(antic.steal_cycles, antic_line_done, "antic_line_done");
1169   LOG(("           @cycle #%3d steal %d cycles\n", cycle(machine), antic.steal_cycles));
1170   after(machine, antic.steal_cycles, antic_line_done, "antic_line_done");
11711171    antic.steal_cycles = 0;
11721172   cpunum_spinuntil_trigger( 0, TRIGGER_STEAL );
11731173}
r2844r2845
11841184static TIMER_CALLBACK( antic_scanline_render )
11851185{
11861186   VIDEO *video = antic.video[antic.scanline];
1187   LOG(("           @cycle #%3d render mode $%X lines to go #%d\n", cycle(), (antic.cmd & 0x0f), antic.modelines));
1187   LOG(("           @cycle #%3d render mode $%X lines to go #%d\n", cycle(machine), (antic.cmd & 0x0f), antic.modelines));
11881188
11891189    (*antic_renderer)(video);
11901190
r2844r2845
12361236
12371237    antic.steal_cycles += CYCLES_REFRESH;
12381238   LOG(("           run CPU for %d cycles\n", CYCLES_HSYNC - CYCLES_HSTART - antic.steal_cycles));
1239   after(CYCLES_HSYNC - CYCLES_HSTART - antic.steal_cycles, antic_steal_cycles, "antic_steal_cycles");
1239   after(machine, CYCLES_HSYNC - CYCLES_HSTART - antic.steal_cycles, antic_steal_cycles, "antic_steal_cycles");
12401240}
12411241
12421242
r2844r2845
12731273 *  if so, read a new command and set up the renderer function
12741274 *
12751275 *****************************************************************************/
1276static void antic_scanline_dma(int param)
1276static void antic_scanline_dma(running_machine *machine, int param)
12771277{
1278   LOG(("           @cycle #%3d DMA fetch\n", cycle()));
1278   LOG(("           @cycle #%3d DMA fetch\n", cycle(machine)));
12791279   if (antic.scanline == VBL_END)
12801280      antic.r.nmist &= ~VBL_NMI;
12811281    if( antic.w.dmactl & DMA_ANTIC )
r2844r2845
13461346               {
13471347                  /* remove the DLI bit */
13481348                  new_cmd &= ~ANTIC_DLI;
1349                  after(CYCLES_DLI_NMI, antic_issue_dli, "antic_issue_dli");
1349                  after(machine, CYCLES_DLI_NMI, antic_issue_dli, "antic_issue_dli");
13501350               }
13511351               /* load memory scan bit set ? */
13521352               if( new_cmd & ANTIC_LMS )
r2844r2845
13591359                        /* produce empty scanlines until vblank start */
13601360                  antic.modelines = VBL_START + 1 - antic.scanline;
13611361                  if( antic.modelines < 0 )
1362                     antic.modelines = video_screen_get_height(Machine->primary_screen) - antic.scanline;
1362                     antic.modelines = video_screen_get_height(machine->primary_screen) - antic.scanline;
13631363                  LOG(("           JVB $%04x\n", antic.dpage|antic.doffs));
13641364               }
13651365               else
r2844r2845
14781478
14791479   antic.r.nmist &= ~DLI_NMI;
14801480   if( antic.modelines == 1 && (antic.cmd & antic.w.nmien & DLI_NMI) )
1481      after(CYCLES_DLI_NMI, antic_issue_dli, "antic_issue_dli");
1481      after(machine, CYCLES_DLI_NMI, antic_issue_dli, "antic_issue_dli");
14821482
1483   after(CYCLES_HSTART, antic_scanline_render, "antic_scanline_render");
1483   after(machine, CYCLES_HSTART, antic_scanline_render, "antic_scanline_render");
14841484}
14851485
14861486/*****************************************************************************
r2844r2845
14961496{
14971497   int button_port, i;
14981498
1499   LOG(("ANTIC #%3d @cycle #%d scanline interrupt\n", antic.scanline, cycle()));
1499   LOG(("ANTIC #%3d @cycle #%d scanline interrupt\n", antic.scanline, cycle(machine)));
15001500
15011501    if( antic.scanline < VBL_START )
15021502    {
1503      antic_scanline_dma(0);
1503      antic_scanline_dma(machine, 0);
15041504      return;
15051505    }
15061506
r2844r2845
15371537    }
15381538
15391539   /* refresh the display (translate color clocks to pixels) */
1540    antic_linerefresh();
1540    antic_linerefresh(machine);
15411541}
15421542
15431543
src/mame/video/segas32.c
r2844r2845
142142*/
143143
144144#include "driver.h"
145#include "deprecat.h"
146145#include "profiler.h"
147146#include "segas32.h"
148147
r2844r2845
410409}
411410
412411
413INLINE void update_color(int offset, UINT16 data)
412INLINE void update_color(running_machine *machine, int offset, UINT16 data)
414413{
415414   /* note that since we use this RAM directly, we don't technically need */
416415   /* to call palette_set_color() at all; however, it does give us that */
417416   /* nice display when you hit F4, which is useful for debugging */
418417
419418   /* set the color */
420   palette_set_color_rgb(Machine, offset, pal5bit(data >> 0), pal5bit(data >> 5), pal5bit(data >> 10));
419   palette_set_color_rgb(machine, offset, pal5bit(data >> 0), pal5bit(data >> 5), pal5bit(data >> 10));
421420}
422421
423422
r2844r2845
439438}
440439
441440
442static void common_paletteram_w(int which, offs_t offset, UINT16 data, UINT16 mem_mask)
441static void common_paletteram_w(running_machine *machine, int which, offs_t offset, UINT16 data, UINT16 mem_mask)
443442{
444443   UINT16 value;
445444   int convert;
r2844r2845
457456   COMBINE_DATA(&value);
458457   if (convert) value = xBGRBBBBGGGGRRRR_to_xBBBBBGGGGGRRRRR(value);
459458   system32_paletteram[which][offset] = value;
460   update_color(0x4000*which + offset, value);
459   update_color(machine, 0x4000*which + offset, value);
461460
462461   /* if blending is enabled, writes go to both halves of palette RAM */
463462   if (mixer_control[which][0x4e/2] & 0x0880)
r2844r2845
470469      COMBINE_DATA(&value);
471470      if (convert) value = xBGRBBBBGGGGRRRR_to_xBBBBBGGGGGRRRRR(value);
472471      system32_paletteram[which][offset] = value;
473      update_color(0x4000*which + offset, value);
472      update_color(machine, 0x4000*which + offset, value);
474473   }
475474}
476475
r2844r2845
490489
491490WRITE16_HANDLER( system32_paletteram_w )
492491{
493   common_paletteram_w(0, offset, data, mem_mask);
492   common_paletteram_w(machine, 0, offset, data, mem_mask);
494493}
495494
496495
r2844r2845
504503WRITE32_HANDLER( multi32_paletteram_0_w )
505504{
506505   if (ACCESSING_BITS_0_15)
507      common_paletteram_w(0, offset*2+0, data, mem_mask);
506      common_paletteram_w(machine, 0, offset*2+0, data, mem_mask);
508507   if (ACCESSING_BITS_16_31)
509      common_paletteram_w(0, offset*2+1, data >> 16, mem_mask >> 16);
508      common_paletteram_w(machine, 0, offset*2+1, data >> 16, mem_mask >> 16);
510509}
511510
512511
r2844r2845
520519WRITE32_HANDLER( multi32_paletteram_1_w )
521520{
522521   if (ACCESSING_BITS_0_15)
523      common_paletteram_w(1, offset*2+0, data, mem_mask);
522      common_paletteram_w(machine, 1, offset*2+0, data, mem_mask);
524523   if (ACCESSING_BITS_16_31)
525      common_paletteram_w(1, offset*2+1, data >> 16, mem_mask >> 16);
524      common_paletteram_w(machine, 1, offset*2+1, data >> 16, mem_mask >> 16);
526525}
527526
528527
src/mame/video/slapfght.c
r2844r2845
77***************************************************************************/
88
99#include "driver.h"
10#include "includes/slapfght.h"
1011
1112UINT8 *slapfight_videoram;
1213UINT8 *slapfight_colorram;
src/mame/video/psikyosh.c
r2844r2845
9090*/
9191
9292#include "driver.h"
93#include "deprecat.h"
9493#include "profiler.h"
9594#include "psikyosh.h"
9695
r2844r2845
393392/* sx and sy is top-left of entire sprite regardless of flip */
394393/* Note that Level 5-4 of sbomberb boss is perfect! (Alpha blended zoomed) as well as S1945II logo */
395394/* pixel is only plotted if z is >= priority_buffer[y][x] */
396static void psikyosh_drawgfxzoom( bitmap_t *dest_bmp,const gfx_element *gfx,
395static void psikyosh_drawgfxzoom( running_machine *machine,
396      bitmap_t *dest_bmp,const gfx_element *gfx,
397397      UINT32 code,UINT32 color,int flipx,int flipy,int offsx,int offsy,
398398      const rectangle *clip,int transparency,int transparent_color,
399399      int zoomx, int zoomy, int wide, int high, UINT32 z)
r2844r2845
443443         {
444444            for (xtile = xstart; xtile != xend; xtile += xinc )
445445            {
446               const pen_t *pal = &Machine->pens[gfx->color_base + gfx->color_granularity * (color % gfx->total_colors)];
446               const pen_t *pal = &machine->pens[gfx->color_base + gfx->color_granularity * (color % gfx->total_colors)];
447447               int source_base = ((code + code_offset++) % gfx->total_elements) * gfx->height;
448448
449449               int x_index_base, y_index, sx, sy, ex, ey;
r2844r2845
707707      /* Start drawing */
708708      if( gfx )
709709      {
710         const pen_t *pal = &Machine->pens[gfx->color_base + gfx->color_granularity * (color % gfx->total_colors)];
710         const pen_t *pal = &machine->pens[gfx->color_base + gfx->color_granularity * (color % gfx->total_colors)];
711711
712712         int sprite_screen_height = ((high*gfx->height*(0x400*0x400))/zoomy + 0x200)>>10; /* Round up to nearest pixel */
713713         int sprite_screen_width = ((wide*gfx->width*(0x400*0x400))/zoomx + 0x200)>>10;
r2844r2845
10211021         /* start drawing */
10221022         if( zoom_table[BYTE_XOR_BE(zoomy)] && zoom_table[BYTE_XOR_BE(zoomx)] ) /* Avoid division-by-zero when table contains 0 (Uninitialised/Bug) */
10231023         {
1024            psikyosh_drawgfxzoom(bitmap,gfx,tnum,colr,flpx,flpy,xpos,ypos,cliprect,trans,0,
1024            psikyosh_drawgfxzoom(machine, bitmap,gfx,tnum,colr,flpx,flpy,xpos,ypos,cliprect,trans,0,
10251025                           (UINT32)zoom_table[BYTE_XOR_BE(zoomx)], (UINT32)zoom_table[BYTE_XOR_BE(zoomy)], wide, high, listcntr);
10261026
10271027#if 0
src/mame/video/kan_pand.c
r2844r2845
4545*/
4646
4747#include "driver.h"
48#include "deprecat.h"
4948#include "kan_pand.h"
5049
5150static UINT8* pandora_spriteram;
r2844r2845
162161   pandora_draw(machine, pandora_sprites_bitmap, video_screen_get_visible_area(machine->primary_screen));
163162}
164163
165void pandora_start(UINT8 region, int x, int y)
164void pandora_start(running_machine *machine, UINT8 region, int x, int y)
166165{
167166   pandora_region = region;
168167   pandora_xoffset = x;
r2844r2845
170169   pandora_spriteram = auto_malloc(0x1000);
171170   memset(pandora_spriteram,0x00, 0x1000);
172171
173   pandora_sprites_bitmap = video_screen_auto_bitmap_alloc(Machine->primary_screen);
172   pandora_sprites_bitmap = video_screen_auto_bitmap_alloc(machine->primary_screen);
174173   pandora_clear_bitmap = 1;
175174}
176175
src/mame/video/boogwing.c
r2844r2845
117117
118118      while (multi >= 0)
119119      {
120         deco16_pdrawgfx(bitmap,machine->gfx[gfx_region],
120         deco16_pdrawgfx(machine,
121               bitmap,machine->gfx[gfx_region],
121122               sprite - multi * inc,
122123               colour,
123124               fx,fy,
r2844r2845
144145
145146VIDEO_START(boogwing)
146147{
147   deco16_2_video_init(0);
148   deco16_2_video_init(machine, 0);
148149
149150   deco16_set_tilemap_bank_callback(1,boogwing_bank_callback);
150151   deco16_set_tilemap_bank_callback(2,boogwing_bank_callback2);
src/mame/video/kan_pand.h
r2844r2845
11/* kan_pand.h */
22
3void pandora_start(UINT8 region, int x, int y);
3void pandora_start(running_machine *machine, UINT8 region, int x, int y);
44void pandora_update(running_machine *machine, bitmap_t *bitmap, const rectangle *cliprect);
55void pandora_eof(running_machine *machine);
66void pandora_set_clear_bitmap(int clear);
src/mame/video/irobot.c
r2844r2845
8585   memset(bitmap_base, 0, BITMAP_WIDTH * video_screen_get_height(machine->primary_screen));
8686}
8787
88void irobot_poly_clear(void)
88void irobot_poly_clear(running_machine *machine)
8989{
9090   UINT8 *bitmap_base = irobot_bufsel ? polybitmap2 : polybitmap1;
91   _irobot_poly_clear(Machine, bitmap_base);
91   _irobot_poly_clear(machine, bitmap_base);
9292}
9393
9494
src/mame/video/snookr10.c
r2844r2845
174174
175175VIDEO_START( snookr10 )
176176{
177   bg_tilemap = tilemap_create(get_bg_tile_info, tilemap_scan_rows, 4, 8, 128, 32);
177   bg_tilemap = tilemap_create(get_bg_tile_info, tilemap_scan_rows, 4, 8, 128, 30);
178178}
179179
180180VIDEO_START( apple10 )
181181{
182   bg_tilemap = tilemap_create(apple10_get_bg_tile_info, tilemap_scan_rows, 4, 8, 128, 32);
182   bg_tilemap = tilemap_create(apple10_get_bg_tile_info, tilemap_scan_rows, 4, 8, 128, 30);
183183}
184184
185185VIDEO_UPDATE( snookr10 )
src/mame/video/combatsc.c
r2844r2845
345345
346346static READ8_HANDLER( combascb_io_r )
347347{
348   return input_port_read_indexed(machine, offset);
348   static const char *portnames[] = { "IN0", "IN1", "DSW1", "DSW2" };
349
350   return input_port_read(machine, portnames[offset]);
349351}
350352
351353static WRITE8_HANDLER( combascb_priority_w )
src/mame/video/ppu2c0x.c
r2844r2845
953953 *  PPU Reset
954954 *
955955 *************************************/
956void ppu2c0x_reset(int num, int scan_scale )
956void ppu2c0x_reset(running_machine *machine, int num, int scan_scale)
957957{
958958   int i;
959959
r2844r2845
976976   timer_adjust_oneshot(chips[num].hblank_timer, ATTOTIME_IN_CYCLES(86.67, 0), num); // ??? FIXME - hardcoding NTSC, need better calculation
977977
978978   // Call us back at the start of the next scanline
979   timer_adjust_oneshot(chips[num].scanline_timer, video_screen_get_time_until_pos(Machine->primary_screen, 1, 0), num);
979   timer_adjust_oneshot(chips[num].scanline_timer, video_screen_get_time_until_pos(machine->primary_screen, 1, 0), num);
980980
981981   /* reset the callbacks */
982982   chips[num].scanline_callback_proc = 0;
src/mame/video/buggychl.c
r2844r2845
11#include "driver.h"
22#include "profiler.h"
3#include "includes/buggychl.h"
34
45
56
src/mame/video/ppu2c0x.h
r2844r2845
101101void ppu2c0x_init_palette(running_machine *machine, int first_entry );
102102void ppu2c0x_init(running_machine *machine, const ppu2c0x_interface *interface );
103103
104void ppu2c0x_reset( int num, int scan_scale );
104void ppu2c0x_reset( running_machine *machine, int num, int scan_scale );
105105void ppu2c0x_set_videorom_bank( int num, int start_page, int num_pages, int bank, int bank_size );
106106void ppu2c0x_set_videoram_bank( int num, int start_page, int num_pages, int bank, int bank_size );
107107void ppu2c0x_spriteram_dma(int num, const UINT8 page );
src/mame/video/n64.c
r2844r2845
1111static FILE *rdp_exec;
1212#endif
1313
14/* defined in systems/n64.c */
15extern UINT32 *rdram;
16extern UINT32 *rsp_imem;
17extern UINT32 *rsp_dmem;
18extern void dp_full_sync(void);
19
20extern UINT32 n64_vi_origin;
21extern UINT32 n64_vi_control;
22
23extern UINT32 dp_start;
24extern UINT32 dp_end;
25extern UINT32 dp_current;
26extern UINT32 dp_status;
27
2814static UINT32 rdp_cmd_data[0x1000];
2915static int rdp_cmd_ptr = 0;
3016static int rdp_cmd_cur = 0;
src/mame/video/taito_f2.c
r2844r2845
77#define TC0280GRD_GFX_NUM 2
88#define TC0430GRW_GFX_NUM 2
99
10extern UINT8 TC0360PRI_regs[16];
11
1210struct tempsprite
1311{
1412   int code,color;
src/mame/video/stfight.c
r2844r2845
77***************************************************************************/
88
99#include "driver.h"
10#include "includes/stfight.h"
1011
1112// Real stuff
1213UINT8 *stfight_text_char_ram;
src/mame/video/pktgaldx.c
r2844r2845
7878/* Video on the orginal */
7979VIDEO_START(pktgaldx)
8080{
81   deco16_1_video_init();
81   deco16_1_video_init(machine);
8282
8383   deco16_set_tilemap_bank_callback(1,pktgaldx_bank_callback);
8484}
src/mame/video/atarigx2.c
r2844r2845
126126   adjusted_modesc.palettebase = atarigx2_motion_object_base;
127127   for (i = 0; i < 8; i++)
128128      adjusted_modesc.colormask.data[i] &= atarigx2_motion_object_mask;
129   atarirle_init(0, &adjusted_modesc);
129   atarirle_init(machine, 0, &adjusted_modesc);
130130
131131   /* initialize the alphanumerics */
132132   atarigen_alpha_tilemap = tilemap_create(get_alpha_tile_info, tilemap_scan_rows,  8,8, 64,32);
src/mame/video/taito_f3.c
r2844r2845
204204***************************************************************************/
205205
206206#include "driver.h"
207#include "deprecat.h"
208207#include "taito_f3.h"
209208#include "ui.h"
210209
r2844r2845
25902589   dest++;                  \
25912590   pri++;
25922591
2593INLINE void f3_drawgfx( bitmap_t *dest_bmp,const gfx_element *gfx,
2592INLINE void f3_drawgfx( running_machine *machine,
2593      bitmap_t *dest_bmp,const gfx_element *gfx,
25942594      UINT32 code,
25952595      UINT32 color,
25962596      int flipx,int flipy,
r2844r2845
26212621
26222622   if( gfx )
26232623   {
2624      const pen_t *pal = &Machine->pens[gfx->color_base + gfx->color_granularity * (color % gfx->total_colors)];
2624      const pen_t *pal = &machine->pens[gfx->color_base + gfx->color_granularity * (color % gfx->total_colors)];
26252625      int source_base = (code % gfx->total_elements) * 16;
26262626
26272627      {
r2844r2845
27532753#undef NEXT_P
27542754
27552755
2756INLINE void f3_drawgfxzoom(bitmap_t *dest_bmp,const gfx_element *gfx,
2756INLINE void f3_drawgfxzoom(running_machine *machine,
2757      bitmap_t *dest_bmp,const gfx_element *gfx,
27572758      UINT32 code,
27582759      UINT32 color,
27592760      int flipx,int flipy,
r2844r2845
27852786
27862787   if( gfx )
27872788   {
2788      const pen_t *pal = &Machine->pens[gfx->color_base + gfx->color_granularity * (color % gfx->total_colors)];
2789      const pen_t *pal = &machine->pens[gfx->color_base + gfx->color_granularity * (color % gfx->total_colors)];
27892790      int source_base = (code % gfx->total_elements) * 16;
27902791
27912792      {
r2844r2845
31683169      sprite_pri_usage|=1<<pri;
31693170
31703171      if(sprite_ptr->zoomx==16 && sprite_ptr->zoomy==16)
3171         f3_drawgfx(bitmap,sprite_gfx,
3172         f3_drawgfx(machine,
3173               bitmap,sprite_gfx,
31723174               sprite_ptr->code,
31733175               sprite_ptr->color,
31743176               sprite_ptr->flipx,sprite_ptr->flipy,
r2844r2845
31763178               cliprect,
31773179               pri);
31783180      else
3179         f3_drawgfxzoom(bitmap,sprite_gfx,
3181         f3_drawgfxzoom(machine,
3182               bitmap,sprite_gfx,
31803183               sprite_ptr->code,
31813184               sprite_ptr->color,
31823185               sprite_ptr->flipx,sprite_ptr->flipy,
src/mame/video/gaelco2.c
r2844r2845
7777***************************************************************************/
7878
7979#include "driver.h"
80#include "includes/gaelco2.h"
8081
8182UINT16 *gaelco2_vregs;
8283static UINT16 *gaelco2_videoram;
src/mame/video/mcr.c
r2844r2845
55***************************************************************************/
66
77#include "driver.h"
8#include "deprecat.h"
98#include "mcr.h"
109
1110
r2844r2845
128127 *
129128 *************************************/
130129
131static void mcr_set_color(int index, int data)
130static void mcr_set_color(running_machine *machine, int index, int data)
132131{
133   palette_set_color_rgb(Machine, index, pal3bit(data >> 6), pal3bit(data >> 0), pal3bit(data >> 3));
132   palette_set_color_rgb(machine, index, pal3bit(data >> 6), pal3bit(data >> 0), pal3bit(data >> 3));
134133}
135134
136135
137static void journey_set_color(int index, int data)
136static void journey_set_color(running_machine *machine, int index, int data)
138137{
139138   /* 3 bits each, RGB */
140139   int r = (data >> 6) & 7;
r2844r2845
147146   b = (b << 5) | (b << 1);
148147
149148   /* set the BG color */
150   palette_set_color(Machine, index, MAKE_RGB(r, g, b));
149   palette_set_color(machine, index, MAKE_RGB(r, g, b));
151150
152151   /* if this is an odd entry in the upper palette bank, the hardware */
153152   /* hard-codes a low 1 bit -- this is used for better grayscales */
r2844r2845
159158   }
160159
161160   /* set the FG color */
162   palette_set_color(Machine, index + 64, MAKE_RGB(r, g, b));
161   palette_set_color(machine, index + 64, MAKE_RGB(r, g, b));
163162}
164163
165164
r2844r2845
167166{
168167   paletteram[offset] = data;
169168   offset &= 0x7f;
170   mcr_set_color((offset / 2) & 0x3f, data | ((offset & 1) << 8));
169   mcr_set_color(machine, (offset / 2) & 0x3f, data | ((offset & 1) << 8));
171170}
172171
173172
r2844r2845
194193   if ((offset & 0x780) == 0x780)
195194   {
196195      if (mcr_cpu_board != 91475)
197         mcr_set_color((offset / 2) & 0x3f, data | ((offset & 1) << 8));
196         mcr_set_color(machine, (offset / 2) & 0x3f, data | ((offset & 1) << 8));
198197      else
199         journey_set_color((offset / 2) & 0x3f, data | ((offset & 1) << 8));
198         journey_set_color(machine, (offset / 2) & 0x3f, data | ((offset & 1) << 8));
200199   }
201200}
202201
r2844r2845
218217
219218   /* palette RAM is mapped into the upper 0x80 bytes here */
220219   if ((effoffs & 0x780) == 0x780)
221      mcr_set_color(((offset & 0x400) >> 5) | ((offset >> 1) & 0x1f), data | ((offset & 1) << 8));
220      mcr_set_color(machine, ((offset & 0x400) >> 5) | ((offset >> 1) & 0x1f), data | ((offset & 1) << 8));
222221}
223222
224223
src/mame/video/segasyse.c
r2844r2845
88*******************************************************************************/
99
1010#include "driver.h"
11#include "deprecat.h"
1211
1312/*-- Variables --*/
1413
r2844r2845
4342
4443static void draw_tiles_line(UINT8 *dest, int line, UINT8 chip, UINT8 pri);
4544static void draw_sprite_line(UINT8 *dest, UINT8 chip, UINT8 line);
46static void segae_drawscanline(int line, int chips, int blank);
45static void segae_drawscanline(running_machine *machine, int line, int chips, int blank);
4746
4847static void draw_8pix_solid16(UINT8 *dest, UINT8 chip, UINT16 tile, UINT8 line, UINT8 flipx, UINT8 col);
4948static void draw_8pix(UINT8 *dest, UINT8 chip, UINT16 tile, UINT8 line, UINT8 flipx, UINT8 col);
r2844r2845
7271   /*- Draw from cache_bitmap to screen -*/
7372
7473   for (i = miny; i <= maxy;i++)
75      segae_drawscanline(i-16,0,0);
74      segae_drawscanline(screen->machine, i-16,0,0);
7675
7776   for (i = miny;i <= maxy;i++)
7877      draw_scanline8(bitmap,32,i,256,&cache_bitmap[(i-16) * (16+256+16) +24],&screen->machine->pens[palette_base],0);
r2844r2845
205204   }
206205}
207206
208void segae_vdp_data_w ( UINT8 chip, UINT8 data )
207void segae_vdp_data_w ( running_machine *machine, UINT8 chip, UINT8 data )
209208{
210209   vdp_cmdpart[chip] = 0;
211210
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221220         g = (vdp_cram[chip][vdp_accessaddr[chip]] & 0x0c) >> 2;
222221         b = (vdp_cram[chip][vdp_accessaddr[chip]] & 0x30) >> 4;
223222
224         palette_set_color_rgb(Machine, vdp_accessaddr[chip] + 32*chip+palette_base, pal2bit(r), pal2bit(g), pal2bit(b));
223         palette_set_color_rgb(machine, vdp_accessaddr[chip] + 32*chip+palette_base, pal2bit(r), pal2bit(g), pal2bit(b));
225224      }
226225
227226      vdp_accessaddr[chip] += 1;
r2844r2845
336335
337336*******************************************************************************/
338337
339static void segae_drawscanline(int line, int chips, int blank)
338static void segae_drawscanline(running_machine *machine, int line, int chips, int blank)
340339{
341340
342341   UINT8* dest;
r2844r2845
367366   /* FIX ME!! */
368367   if (blank)
369368   {
370      if (strcmp(Machine->gamedrv->name,"tetrisse")) /* and we really don't want to do it on tetrise */
369      if (strcmp(machine->gamedrv->name,"tetrisse")) /* and we really don't want to do it on tetrise */
371370         memset(dest+16, 32+16, 8); /* Clear Leftmost column, there should be a register for this like on the SMS i imagine    */
372371                                   /* on the SMS this is bit 5 of register 0 (according to CMD's SMS docs) for system E this  */                                   /* appears to be incorrect, most games need it blanked 99% of the time so we blank it      */
373372   }
src/mame/video/matmania.c
r2844r2845
1313***************************************************************************/
1414
1515#include "driver.h"
16#include "includes/matmania.h"
1617
1718
1819
src/mame/video/arkanoid.c
r2844r2845
1010#include "includes/arkanoid.h"
1111
1212static UINT8 gfxbank, palettebank;
13extern UINT8 arkanoid_paddle_select;
1413
1514static tilemap *bg_tilemap;
1615
src/mame/video/airbustr.c
r2844r2845
120120
121121   sprites_bitmap = video_screen_auto_bitmap_alloc(machine->primary_screen);
122122   tilemap_set_transparent_pen(fg_tilemap, 0);
123   pandora_start(1,0,0);
123   pandora_start(machine,1,0,0);
124124
125125   tilemap_set_scrolldx(bg_tilemap, 0x094, 0x06a);
126126   tilemap_set_scrolldy(bg_tilemap, 0x100, 0x1ff);
src/mame/video/dcheese.c
r2844r2845
317317{
318318   /* analog inputs seem to be hooked up here -- might not actually map to blitter */
319319   if (offset == 0x02/2)
320      return input_port_read_indexed(machine, 3);
320      return input_port_read(machine, "2a0002");
321321   if (offset == 0x0e/2)
322      return input_port_read_indexed(machine, 4);
322      return input_port_read(machine, "2a000e");
323323
324324   /* early code polls on this bit, wants it to be 0 */
325325   if (offset == 0x36/2)
src/mame/video/bwing.c
r2844r2845
143143   g = ((g<<5) + (g<<2) + (g>>1));
144144   b = ((b<<5) + (b<<2) + (b>>1));
145145
146   if ((i = input_port_read_indexed(machine, 7)) < 4)
146   if ((i = input_port_read(machine, "EXTRA")) < 4)
147147   {
148148      r = (float)r * rgb[i][0];
149149      g = (float)g * rgb[i][1];
src/mame/video/lsasquad.c
r2844r2845
11#include "driver.h"
2#include "includes/lsasquad.h"
23
34UINT8 *lsasquad_scrollram;
45
src/mame/video/atarigt.c
r2844r2845
143143   atarigen_playfield_tilemap = tilemap_create(get_playfield_tile_info, atarigt_playfield_scan,  8,8, 128,64);
144144
145145   /* initialize the motion objects */
146   atarirle_init(0, &adjusted_modesc);
146   atarirle_init(machine, 0, &adjusted_modesc);
147147
148148   /* initialize the alphanumerics */
149149   atarigen_alpha_tilemap = tilemap_create(get_alpha_tile_info, tilemap_scan_rows,  8,8, 64,32);
src/mame/video/genesis.c
r2844r2845
88***********************************************************************************************/
99
1010#include "driver.h"
11#include "deprecat.h"
1211#include "genesis.h"
1312
1413/* in video/segasyse.c */
r2844r2845
5049******************************************************************************/
5150
5251static int  vdp_data_r(void);
53static void vdp_data_w(int data);
54static int  vdp_control_r(void);
55static void vdp_control_w(int data);
56static void vdp_register_w(int data, int vblank);
57static void vdp_control_dma(int data);
58static void vdp_dma_68k(void);
52static void vdp_data_w(running_machine *machine, int data);
53static int  vdp_control_r(running_machine *machine);
54static void vdp_control_w(running_machine *machine, int data);
55static void vdp_register_w(running_machine *machine, int data, int vblank);
56static void vdp_control_dma(running_machine *machine, int data);
57static void vdp_dma_68k(running_machine *machine);
5958static void vdp_dma_fill(int);
6059static void vdp_dma_copy(void);
6160
r2844r2845
170169
171170   /* reset VDP */
172171    for (i = 0; i < 24; i++)
173        vdp_register_w(0x8000 | (i << 8) | vdp_init[i], 1);
172        vdp_register_w(screen->machine, 0x8000 | (i << 8) | vdp_init[i], 1);
174173   vdp_cmdpart = 0;
175174   vdp_code    = 0;
176175   vdp_address = 0;
r2844r2845
250249******************************************************************************/
251250
252251/* set the display enable bit */
253void segac2_enable_display(int enable)
252void segac2_enable_display(running_machine *machine, int enable)
254253{
255   video_screen_update_partial(Machine->primary_screen, video_screen_get_vpos(Machine->primary_screen));
254   video_screen_update_partial(machine->primary_screen, video_screen_get_vpos(machine->primary_screen));
256255   display_enable = enable;
257256}
258257
r2844r2845
340339
341340      case 0x02:   /* Status Register */
342341      case 0x03:
343         return vdp_control_r();
342         return vdp_control_r(machine);
344343
345344      case 0x04:   /* HV counter */
346345      case 0x05:
r2844r2845
378377             else
379378                data |= data << 8;
380379         }
381         vdp_data_w(data);
380         vdp_data_w(machine, data);
382381         break;
383382
384383      case 0x02:   /* Control Write */
r2844r2845
391390             else
392391                data |= data << 8;
393392         }
394         vdp_control_w(data);
393         vdp_control_w(machine, data);
395394         break;
396395
397396      case 0x08:   /* SN76489 Write */
r2844r2845
449448}
450449
451450
452static void vdp_data_w(int data)
451static void vdp_data_w(running_machine *machine, int data)
453452{
454453   /* kill 2nd write pending flag */
455454   vdp_cmdpart = 0;
r2844r2845
470469         /* if the hscroll RAM is changing, force an update */
471470         if (vdp_address >= vdp_hscrollbase &&
472471            vdp_address < vdp_hscrollbase + vdp_hscrollsize)
473            video_screen_update_partial(Machine->primary_screen, video_screen_get_vpos(Machine->primary_screen));
472            video_screen_update_partial(machine->primary_screen, video_screen_get_vpos(machine->primary_screen));
474473
475474         /* write to VRAM */
476475         if (vdp_address & 1)
r2844r2845
482481      case 0x03:      /* Palette write */
483482         {
484483            int offset = (vdp_address/2) % CRAM_SIZE;
485            palette_set_color_rgb(Machine, offset + genesis_palette_base, pal3bit(data >> 1), pal3bit(data >> 5), pal3bit(data >> 9));
484            palette_set_color_rgb(machine, offset + genesis_palette_base, pal3bit(data >> 1), pal3bit(data >> 5), pal3bit(data >> 9));
486485         }
487486         break;
488487
489488      case 0x05:      /* VSRAM write */
490489
491490         /* vscroll RAM is changing, force an update */
492         video_screen_update_partial(Machine->primary_screen, video_screen_get_vpos(Machine->primary_screen));
491         video_screen_update_partial(machine->primary_screen, video_screen_get_vpos(machine->primary_screen));
493492
494493         /* write to VSRAM */
495494         if (vdp_address & 1)
r2844r2845
543542
544543******************************************************************************/
545544
546static int vdp_control_r(void)
545static int vdp_control_r(running_machine *machine)
547546{
548547   int status = 0x3600; // wwally needs fifo empty set
549548
r2844r2845
551550   vdp_cmdpart = 0;
552551
553552   /* set the VBLANK bit */
554   if (video_screen_get_vblank(Machine->primary_screen))
553   if (video_screen_get_vblank(machine->primary_screen))
555554      status |= 0x0008;
556555
557556   /* set the HBLANK bit */
558   if (video_screen_get_hblank(Machine->primary_screen))
557   if (video_screen_get_hblank(machine->primary_screen))
559558      status |= 0x0004;
560559
561560   return (status);
562561}
563562
564563
565static void vdp_control_w(int data)
564static void vdp_control_w(running_machine *machine, int data)
566565{
567566   /* case 1: we're not expecting the 2nd half of a command */
568567   if (!vdp_cmdpart)
569568   {
570569      /* if 10xxxxxx xxxxxxxx this is a register setting command */
571570      if ((data & 0xc000) == 0x8000)
572         vdp_register_w(data, video_screen_get_vblank(Machine->primary_screen));
571         vdp_register_w(machine, data, video_screen_get_vblank(machine->primary_screen));
573572
574573      /* otherwise this is the First part of a mode setting command */
575574      else
r2844r2845
586585      vdp_code    = (vdp_code & 0x03) | ((data >> 2) & 0x3c);
587586      vdp_address = (vdp_address & 0x3fff) | ((data << 14) & 0xc000);
588587      vdp_cmdpart = 0;
589      vdp_control_dma(data);
588      vdp_control_dma(machine, data);
590589   }
591590}
592591
593592
594static void vdp_register_w(int data, int vblank)
593static void vdp_register_w(running_machine *machine, int data, int vblank)
595594{
596595   int scrwidth = 0;
597596   static const UINT8 is_important[32] = { 0,0,1,1,1,1,0,1,0,0,0,1,0,1,0,0,1,1,1,0,0,0,0,0,0,0,0,0,0,0,0,0 };
r2844r2845
603602
604603   /* these are mostly important writes; force an update if they written */
605604   if (is_important[regnum])
606      video_screen_update_partial(Machine->primary_screen, video_screen_get_vpos(Machine->primary_screen));
605      video_screen_update_partial(machine->primary_screen, video_screen_get_vpos(machine->primary_screen));
607606
608607   /* For quite a few of the registers its a good idea to set a couple of variable based
609608       upon the writes here */
r2844r2845
701700}
702701
703702
704static void vdp_control_dma(int data)
703static void vdp_control_dma(running_machine *machine, int data)
705704{
706705   if ((vdp_code & 0x20) && (genesis_vdp_regs[1] & 0x10))
707706   {
r2844r2845
709708      {
710709         case 0x00:
711710         case 0x40:      /* 68k -> VRAM Tranfser */
712            vdp_dma_68k();
711            vdp_dma_68k(machine);
713712            break;
714713
715714         case 0x80:      /* VRAM fill, can't be done here, requires data write */
r2844r2845
733732
734733******************************************************************************/
735734
736static void vdp_dma_68k(void)
735static void vdp_dma_68k(running_machine *machine)
737736{
738737   int length = genesis_vdp_regs[19] | (genesis_vdp_regs[20] << 8);
739738   int source = (genesis_vdp_regs[21] << 1) | (genesis_vdp_regs[22] << 9) | ((genesis_vdp_regs[23] & 0x7f) << 17);
r2844r2845
746745   /* handle the DMA */
747746   for (count = 0; count < length; count++)
748747   {
749      vdp_data_w(program_read_word(source));
748      vdp_data_w(machine, program_read_word(source));
750749      source += 2;
751750   }
752751}
src/mame/video/wrally.c
r2844r2845
77***************************************************************************/
88
99#include "driver.h"
10#include "includes/wrally.h"
1011
1112UINT16 *wrally_spriteram;
1213UINT16 *wrally_vregs;
src/mame/video/segas18.c
r2844r2845
55***************************************************************************/
66
77#include "driver.h"
8#include "deprecat.h"
98#include "segaic16.h"
9#include "includes/genesis.h"
1010#include "includes/system16.h"
1111
1212
r2844r2845
3737
3838/*************************************
3939 *
40 *  Prototypes
41 *
42 *************************************/
43
44void system18_vdp_start(running_machine *machine);
45void system18_vdp_update(bitmap_t *bitmap, const rectangle *cliprect);
46
47
48
49/*************************************
50 *
5140 *  Video startup
5241 *
5342 *************************************/
r2844r2845
5645{
5746   int width, height;
5847
48   tempbitmap = NULL;
49   grayscale_enable = 0;
50   vdp_enable = 0;
51   vdp_mixing = 0;
52
5953   /* compute palette info */
6054   segaic16_palette_init(0x800);
6155
r2844r2845
8276 *
8377 *************************************/
8478
85void system18_set_grayscale(int enable)
79void system18_set_grayscale(running_machine *machine, int enable)
8680{
8781   enable = (enable != 0);
8882   if (enable != grayscale_enable)
8983   {
90      video_screen_update_partial(Machine->primary_screen, video_screen_get_vpos(Machine->primary_screen));
84      video_screen_update_partial(machine->primary_screen, video_screen_get_vpos(machine->primary_screen));
9185      grayscale_enable = enable;
9286//      mame_printf_debug("Grayscale = %02X\n", enable);
9387   }
9488}
9589
9690
97void system18_set_vdp_enable(int enable)
91void system18_set_vdp_enable(running_machine *machine, int enable)
9892{
9993   enable = (enable != 0);
10094   if (enable != vdp_enable)
10195   {
102      video_screen_update_partial(Machine->primary_screen, video_screen_get_vpos(Machine->primary_screen));
96      video_screen_update_partial(machine->primary_screen, video_screen_get_vpos(machine->primary_screen));
10397      vdp_enable = enable;
10498#if DEBUG_VDP
10599      mame_printf_debug("VDP enable = %02X\n", enable);
r2844r2845
108102}
109103
110104
111void system18_set_vdp_mixing(int mixing)
105void system18_set_vdp_mixing(running_machine *machine, int mixing)
112106{
113107   if (mixing != vdp_mixing)
114108   {
115      video_screen_update_partial(Machine->primary_screen, video_screen_get_vpos(Machine->primary_screen));
109      video_screen_update_partial(machine->primary_screen, video_screen_get_vpos(machine->primary_screen));
116110      vdp_mixing = mixing;
117111#if DEBUG_VDP
118112      mame_printf_debug("VDP mixing = %02X\n", mixing);
src/mame/video/ajax.c
r2844r2845
88
99#include "driver.h"
1010#include "video/konamiic.h"
11#include "includes/ajax.h"
1112
1213
1314UINT8 ajax_priority;
src/mame/video/m10.c
r2844r2845
1111***************************************************************************/
1212
1313#include "driver.h"
14#include "deprecat.h"
1514#include "m10.h"
1615
1716static tilemap *      tx_tilemap;
r2844r2845
4342
4443static UINT32 tilemap_scan(UINT32 col,UINT32 row,UINT32 num_cols,UINT32 num_rows)
4544{
46   //m10_state *state = Machine->driver_data;
47
4845   return (31-col)*32 + row;
4946}
5047
r2844r2845
7875}
7976
8077
81INLINE void plot_pixel_m10(bitmap_t *bm, int x, int y, int col)
78INLINE void plot_pixel_m10(running_machine *machine, bitmap_t *bm, int x, int y, int col)
8279{
83   m10_state *state = Machine->driver_data;
80   m10_state *state = machine->driver_data;
8481
8582   if (!state->flip)
8683      *BITMAP_ADDR16(bm, y, x) = col;
r2844r2845
152149      int y;
153150
154151      for (y = IREMM10_VBEND;y < IREMM10_VBSTART;y++)
155         plot_pixel_m10(bitmap,16,y,1);
152         plot_pixel_m10(screen->machine, bitmap,16,y,1);
156153   }
157154
158155   for (offs = videoram_size - 1;offs >= 0;offs--)
src/mame/drivers/bfcobra.c
r2844r2845
13991399      case 0:
14001400      {
14011401         int changed = mux_outputlatch ^ data;
1402         static const char *port[] = { "STROBE0", "STROBE1", "STROBE2", "STROBE3", "STROBE4", "STROBE5", "STROBE6", "STROBE7" };
14021403
14031404         mux_outputlatch = data;
14041405
r2844r2845
14091410
14101411            /* Clock is low */
14111412            if (!(data & 0x08))
1412               mux_input = input_port_read_indexed(machine, input_strobe);
1413               mux_input = input_port_read(machine, port[input_strobe]);
14131414         }
14141415         break;
14151416      }
src/mame/drivers/nycaptor.c
r2844r2845
152152#include "cpu/m6805/m6805.h"
153153#include "sound/ay8910.h"
154154#include "sound/msm5232.h"
155#include "includes/nycaptor.h"
155156
156VIDEO_START( nycaptor );
157VIDEO_UPDATE( nycaptor );
158
159
160extern UINT8 *nycaptor_scrlram;
161157UINT8 *nycaptor_sharedram;
162158static int generic_control_reg = 0;
163159static int sound_nmi_enable=0,pending_nmi=0;
164160int nyc_gametype=0;
165161
166WRITE8_HANDLER( nycaptor_videoram_w );
167WRITE8_HANDLER( nycaptor_spriteram_w );
168WRITE8_HANDLER( nycaptor_palette_w );
169WRITE8_HANDLER( nycaptor_gfxctrl_w );
170WRITE8_HANDLER( nycaptor_scrlram_w );
171WRITE8_HANDLER( nycaptor_68705_portA_w );
172WRITE8_HANDLER( nycaptor_68705_portB_w );
173WRITE8_HANDLER( nycaptor_68705_portC_w );
174WRITE8_HANDLER( nycaptor_68705_ddrA_w );
175WRITE8_HANDLER( nycaptor_68705_ddrB_w );
176WRITE8_HANDLER( nycaptor_68705_ddrC_w );
177WRITE8_HANDLER( nycaptor_mcu_w );
178
179READ8_HANDLER( nycaptor_mcu_r );
180READ8_HANDLER( nycaptor_mcu_status_r1 );
181READ8_HANDLER( nycaptor_mcu_status_r2 );
182READ8_HANDLER( nycaptor_spriteram_r );
183READ8_HANDLER( nycaptor_palette_r );
184READ8_HANDLER( nycaptor_gfxctrl_r );
185READ8_HANDLER( nycaptor_scrlram_r );
186READ8_HANDLER( nycaptor_68705_portC_r );
187READ8_HANDLER( nycaptor_68705_portB_r );
188READ8_HANDLER( nycaptor_68705_portA_r );
189READ8_HANDLER( nycaptor_videoram_r );
190
191
192
193162static WRITE8_HANDLER( sub_cpu_halt_w )
194163{
195164   cpunum_set_input_line(machine, 1, INPUT_LINE_HALT, (data )? ASSERT_LINE : CLEAR_LINE);
src/mame/drivers/rainbow.c
r2844r2845
242242#include "audio/taitosnd.h"
243243#include "sound/2203intf.h"
244244#include "sound/2151intf.h"
245#include "includes/cchip.h"
245246
246247VIDEO_START( rainbow );
247248VIDEO_START( jumping );
r2844r2845
252253WRITE16_HANDLER( jumping_spritectrl_w );
253254WRITE16_HANDLER( rainbow_spritectrl_w );
254255
255void rainbow_cchip_init(int version);
256READ16_HANDLER( rainbow_cchip_ctrl_r );
257READ16_HANDLER( rainbow_cchip_ram_r );
258WRITE16_HANDLER( rainbow_cchip_ctrl_w );
259WRITE16_HANDLER( rainbow_cchip_bank_w );
260WRITE16_HANDLER( rainbow_cchip_ram_w );
261
262256static UINT8 jumping_latch = 0;
263257
264258
src/mame/drivers/crystal.c
r2844r2845
180180
181181static READ32_HANDLER(Input_r)
182182{
183   if(offset==0)
184      return input_port_read_indexed(machine, 0)|(input_port_read_indexed(machine, 1)<<16);
185   else if(offset==1)
186      return input_port_read_indexed(machine, 2)|(input_port_read_indexed(machine, 3)<<16);
187   else if(offset==2)
183   if(offset == 0)
184      return input_port_read(machine, "IN0")|(input_port_read(machine, "IN1")<<16);
185   else if(offset == 1)
186      return input_port_read(machine, "IN2")|(input_port_read(machine, "IN3")<<16);
187   else if(offset == 2)
188188   {
189      UINT8 Port4=input_port_read_indexed(machine, 4);
190      if(!(Port4&0x10) && ((OldPort4^Port4)&0x10))   //coin buttons trigger IRQs
189      UINT8 Port4 = input_port_read(machine, "IN4");
190      if(!(Port4 & 0x10) && ((OldPort4^Port4) & 0x10))   //coin buttons trigger IRQs
191191         IntReq(machine, 12);
192      if(!(Port4&0x20) && ((OldPort4^Port4)&0x20))
192      if(!(Port4 & 0x20) && ((OldPort4^Port4) & 0x20))
193193         IntReq(machine, 19);
194      OldPort4=Port4;
195      return /*dips*/input_port_read_indexed(machine, 5)|(Port4<<16);
194      OldPort4 = Port4;
195      return /*dips*/input_port_read(machine, "DSW")|(Port4<<16);
196196   }
197197   return 0;
198198}
r2844r2845
718718}
719719
720720static INPUT_PORTS_START(crystal)
721   PORT_START
722   PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(1)
723   PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(2)
724   PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(1)
725   PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(2)
726   PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_PLAYER(1)
727   PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_PLAYER(2)
728   PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_BUTTON4 ) PORT_PLAYER(1)
729   PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_BUTTON4 ) PORT_PLAYER(2)
721   PORT_START_TAG("IN0")
722   PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(1)
723   PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(2)
724   PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(1)
725   PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(2)
726   PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_PLAYER(1)
727   PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_PLAYER(2)
728   PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_BUTTON4 ) PORT_PLAYER(1)
729   PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_BUTTON4 ) PORT_PLAYER(2)
730730
731   PORT_START
732   PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_PLAYER(1)
733   PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_PLAYER(2)
734   PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_PLAYER(1)
735   PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_PLAYER(2)
736   PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_PLAYER(1)
737   PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_PLAYER(2)
738   PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_PLAYER(1)
739   PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_PLAYER(2)
731   PORT_START_TAG("IN1")
732   PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_PLAYER(1)
733   PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_PLAYER(2)
734   PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_PLAYER(1)
735   PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_PLAYER(2)
736   PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_PLAYER(1)
737   PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_PLAYER(2)
738   PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_PLAYER(1)
739   PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_PLAYER(2)
740740
741   PORT_START
742   PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(3)
743   PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(4)
744   PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(3)
745   PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(4)
746   PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_PLAYER(3)
747   PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_PLAYER(4)
748   PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_BUTTON4 ) PORT_PLAYER(3)
749   PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_BUTTON4 ) PORT_PLAYER(4)
741   PORT_START_TAG("IN2")
742   PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(3)
743   PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(4)
744   PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(3)
745   PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(4)
746   PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_PLAYER(3)
747   PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_PLAYER(4)
748   PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_BUTTON4 ) PORT_PLAYER(3)
749   PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_BUTTON4 ) PORT_PLAYER(4)
750750
751   PORT_START
752   PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_PLAYER(3)
753   PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_PLAYER(4)
754   PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_PLAYER(3)
755   PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_PLAYER(4)
756   PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_PLAYER(3)
757   PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_PLAYER(4)
758   PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_PLAYER(3)
759   PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_PLAYER(4)
751   PORT_START_TAG("IN3")
752   PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_PLAYER(3)
753   PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_PLAYER(4)
754   PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_PLAYER(3)
755   PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_PLAYER(4)
756   PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_PLAYER(3)
757   PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_PLAYER(4)
758   PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_PLAYER(3)
759   PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_PLAYER(4)
760760
761   PORT_START
762   PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_START1 )
763   PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_START2 )
764   PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_START3 )
765   PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_START4 )
766   PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_COIN1 )
767   PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_COIN2 )
768   PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_SERVICE1 )
761   PORT_START_TAG("IN4")
762   PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_START1 )
763   PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_START2 )
764   PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_START3 )
765   PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_START4 )
766   PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_COIN1 )
767   PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_COIN2 )
768   PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_SERVICE1 )
769769   PORT_SERVICE_NO_TOGGLE( 0x80, IP_ACTIVE_LOW )
770770
771   PORT_START
771   PORT_START_TAG("DSW")
772772   PORT_DIPNAME( 0x01, 0x01, DEF_STR( Pause ) )
773773   PORT_DIPSETTING(    0x01, DEF_STR( Off ) )
774774   PORT_DIPSETTING(    0x00, DEF_STR( On ) )
r2844r2845
931931GAME( 2001, evosocc,  crysbios, crystal, crystal,  evosocc, ROT0, "Evoga", "Evolution Soccer", 0 )
932932GAME( 2001, topbladv, crysbios, crystal, crystal,  0,       ROT0, "unknown", "Top Blade V", GAME_NOT_WORKING ) // protection
933933
934GAME( 2001, officeye,        0, crystal, crystal,  0,       ROT0, "unknown", "Office Yeo ln Cheon Ha", GAME_NOT_WORKING ) // protection
934GAME( 2001, officeye,        0, crystal, crystal,  0,       ROT0, "unknown", "Office Yeo In Cheon Ha", GAME_NOT_WORKING ) // protection
935935
936936
src/mame/drivers/bublbobl.c
r2844r2845
273273#include "sound/2203intf.h"
274274#include "sound/3812intf.h"
275275#include "cpu/m6805/m6805.h"
276#include "includes/bublbobl.h"
276277
277/* video/bublbobl.c */
278extern UINT8 *bublbobl_objectram;
279extern size_t bublbobl_objectram_size;
280VIDEO_UPDATE( bublbobl );
281
282/* machine/bublbobl.c */
283extern UINT8 *bublbobl_mcu_sharedram;
284WRITE8_HANDLER( bublbobl_bankswitch_w );
285WRITE8_HANDLER( tokio_bankswitch_w );
286WRITE8_HANDLER( tokio_videoctrl_w );
287WRITE8_HANDLER( bublbobl_nmitrigger_w );
288READ8_HANDLER( tokio_mcu_r );
289READ8_HANDLER( tokiob_mcu_r );
290WRITE8_HANDLER( bublbobl_sound_command_w );
291WRITE8_HANDLER( bublbobl_sh_nmi_disable_w );
292WRITE8_HANDLER( bublbobl_sh_nmi_enable_w );
293READ8_HANDLER( boblbobl_ic43_a_r );
294WRITE8_HANDLER( boblbobl_ic43_a_w );
295READ8_HANDLER( boblbobl_ic43_b_r );
296WRITE8_HANDLER( boblbobl_ic43_b_w );
297
298READ8_HANDLER( bublbobl_mcu_ddr1_r );
299WRITE8_HANDLER( bublbobl_mcu_ddr1_w );
300READ8_HANDLER( bublbobl_mcu_ddr2_r );
301WRITE8_HANDLER( bublbobl_mcu_ddr2_w );
302READ8_HANDLER( bublbobl_mcu_ddr3_r );
303WRITE8_HANDLER( bublbobl_mcu_ddr3_w );
304READ8_HANDLER( bublbobl_mcu_ddr4_r );
305WRITE8_HANDLER( bublbobl_mcu_ddr4_w );
306READ8_HANDLER( bublbobl_mcu_port1_r );
307WRITE8_HANDLER( bublbobl_mcu_port1_w );
308READ8_HANDLER( bublbobl_mcu_port2_r );
309WRITE8_HANDLER( bublbobl_mcu_port2_w );
310READ8_HANDLER( bublbobl_mcu_port3_r );
311WRITE8_HANDLER( bublbobl_mcu_port3_w );
312READ8_HANDLER( bublbobl_mcu_port4_r );
313WRITE8_HANDLER( bublbobl_mcu_port4_w );
314
315// for 68705 bootleg
316INTERRUPT_GEN( bublbobl_m68705_interrupt );
317READ8_HANDLER( bublbobl_68705_portA_r );
318WRITE8_HANDLER( bublbobl_68705_portA_w );
319WRITE8_HANDLER( bublbobl_68705_ddrA_w );
320READ8_HANDLER( bublbobl_68705_portB_r );
321WRITE8_HANDLER( bublbobl_68705_portB_w );
322WRITE8_HANDLER( bublbobl_68705_ddrB_w );
323
324
325278#if 0 // doesn't work for some reason
326279static WRITE8_HANDLER(soundcpu_reset_w)
327280{
r2844r2845
380333   ADDRESS_MAP_GLOBAL_MASK(0x7ff)
381334   AM_RANGE(0x000, 0x000) AM_READWRITE(bublbobl_68705_portA_r, bublbobl_68705_portA_w)
382335   AM_RANGE(0x001, 0x001) AM_READWRITE(bublbobl_68705_portB_r, bublbobl_68705_portB_w)
383   AM_RANGE(0x002, 0x002) AM_READ(input_port_0_r)   // COIN
336   AM_RANGE(0x002, 0x002) AM_READ_PORT("IN0")   // COIN
384337   AM_RANGE(0x004, 0x004) AM_WRITE(bublbobl_68705_ddrA_w)
385338   AM_RANGE(0x005, 0x005) AM_WRITE(bublbobl_68705_ddrB_w)
386339   AM_RANGE(0x006, 0x006) AM_WRITENOP // ???
r2844r2845
403356   AM_RANGE(0xfd00, 0xfdff) AM_RAM
404357   AM_RANGE(0xfe00, 0xfe03) AM_READWRITE(boblbobl_ic43_a_r,boblbobl_ic43_a_w)
405358   AM_RANGE(0xfe80, 0xfe83) AM_READWRITE(boblbobl_ic43_b_r,boblbobl_ic43_b_w)
406   AM_RANGE(0xff00, 0xff00) AM_READ(input_port_0_r)
407   AM_RANGE(0xff01, 0xff01) AM_READ(input_port_1_r)
408   AM_RANGE(0xff02, 0xff02) AM_READ(input_port_2_r)
409   AM_RANGE(0xff03, 0xff03) AM_READ(input_port_3_r)
359   AM_RANGE(0xff00, 0xff00) AM_READ_PORT("DSW0")
360   AM_RANGE(0xff01, 0xff01) AM_READ_PORT("DSW1")
361   AM_RANGE(0xff02, 0xff02) AM_READ_PORT("IN0")
362   AM_RANGE(0xff03, 0xff03) AM_READ_PORT("IN1")
410363   AM_RANGE(0xff94, 0xff94) AM_WRITENOP // ???
411364   AM_RANGE(0xff98, 0xff98) AM_WRITENOP // ???
412365ADDRESS_MAP_END
r2844r2845
420373   AM_RANGE(0xe000, 0xf7ff) AM_RAM AM_SHARE(1)
421374   AM_RANGE(0xf800, 0xf9ff) AM_RAM_WRITE(paletteram_RRRRGGGGBBBBxxxx_be_w) AM_BASE(&paletteram)
422375   AM_RANGE(0xfa00, 0xfa00) AM_WRITE(watchdog_reset_w)
423   AM_RANGE(0xfa03, 0xfa03) AM_READ(input_port_0_r)
424   AM_RANGE(0xfa04, 0xfa04) AM_READ(input_port_1_r)
425   AM_RANGE(0xfa05, 0xfa05) AM_READ(input_port_2_r)
426   AM_RANGE(0xfa06, 0xfa06) AM_READ(input_port_3_r)
427   AM_RANGE(0xfa07, 0xfa07) AM_READ(input_port_4_r)
376   AM_RANGE(0xfa03, 0xfa03) AM_READ_PORT("DSW0")
377   AM_RANGE(0xfa04, 0xfa04) AM_READ_PORT("DSW1")
378   AM_RANGE(0xfa05, 0xfa05) AM_READ_PORT("IN0")
379   AM_RANGE(0xfa06, 0xfa06) AM_READ_PORT("IN1")
380   AM_RANGE(0xfa07, 0xfa07) AM_READ_PORT("IN2")
428381   AM_RANGE(0xfa80, 0xfa80) AM_WRITE(tokio_bankswitch_w)
429382   AM_RANGE(0xfb00, 0xfb00) AM_WRITE(tokio_videoctrl_w)
430383   AM_RANGE(0xfb80, 0xfb80) AM_WRITE(bublbobl_nmitrigger_w)
r2844r2845
13281281
13291282static DRIVER_INIT( tokio )
13301283{
1331   extern int bublbobl_video_enable;
1332
13331284   /* preemptively enable video, the bit is not mapped for this game and */
13341285   /* I don't know if it even has it. */
13351286   bublbobl_video_enable = 1;
src/mame/drivers/cshooter.c
r2844r2845
9595
9696static void ar_coin_hack(void)
9797{
98   if(input_port_read_indexed(Machine, 5)&1)
98   if(input_port_read(Machine, "COIN") & 1)
9999   {
100100      if(coin_stat==0)
101101      {
r2844r2845
221221   /* Even reads must return 0xff - Odd reads must return the contents of input port 5.
222222       Code at 0x5061 is executed once during P.O.S.T. where there is one read.
223223       Code at 0x50b4 is then executed each frame (not sure) where there are 2 reads. */
224   return ( (cshooter_counter++ & 1) ? 0xff : input_port_read_indexed(machine, 5) );
224   return ( (cshooter_counter++ & 1) ? 0xff : input_port_read(machine, "COIN") );
225225}
226226
227227static WRITE8_HANDLER ( cshooter_c500_w )
r2844r2845
262262   AM_RANGE(0x8000, 0xafff) AM_READ(SMH_BANK1)
263263   AM_RANGE(0xb000, 0xb0ff) AM_READ(SMH_RAM)         // sound related ?
264264   AM_RANGE(0xc000, 0xc1ff) AM_WRITE(pal_w) AM_READ(pal_r) AM_BASE(&paletteram)
265   AM_RANGE(0xc200, 0xc200) AM_READ(input_port_0_r)
266   AM_RANGE(0xc201, 0xc201) AM_READ(input_port_1_r)
267   AM_RANGE(0xc202, 0xc202) AM_READ(input_port_2_r)
268   AM_RANGE(0xc203, 0xc203) AM_READ(input_port_3_r)
269   AM_RANGE(0xc204, 0xc204) AM_READ(input_port_4_r)
265   AM_RANGE(0xc200, 0xc200) AM_READ_PORT("IN0")
266   AM_RANGE(0xc201, 0xc201) AM_READ_PORT("IN1")
267   AM_RANGE(0xc202, 0xc202) AM_READ_PORT("IN2")
268   AM_RANGE(0xc203, 0xc203) AM_READ_PORT("DSW2")
269   AM_RANGE(0xc204, 0xc204) AM_READ_PORT("DSW1")
270270   AM_RANGE(0xc205, 0xc205) AM_READ(cshooter_coin_r)   // hack until I understand
271271   AM_RANGE(0xd000, 0xd7ff) AM_READ(SMH_RAM)
272272   AM_RANGE(0xd800, 0xdfff) AM_READ(SMH_RAM)
r2844r2845
290290   AM_RANGE(0x8000, 0xbfff) AM_READ(SMH_BANK1)
291291   AM_RANGE(0xb000, 0xb0ff) AM_RAM         // sound related ?
292292   AM_RANGE(0xb100, 0xb1ff) AM_RAM//READ(SMH_BANK1)           // sound related ?
293   AM_RANGE(0xc000, 0xc000) AM_READ(input_port_0_r)
294   AM_RANGE(0xc001, 0xc001) AM_READ(input_port_1_r)
295   AM_RANGE(0xc002, 0xc002) AM_READ(input_port_2_r)
296   AM_RANGE(0xc003, 0xc003) AM_READ(input_port_3_r)
297   AM_RANGE(0xc004, 0xc004) AM_READ(input_port_4_r)
293   AM_RANGE(0xc000, 0xc000) AM_READ_PORT("IN0")
294   AM_RANGE(0xc001, 0xc001) AM_READ_PORT("IN1")
295   AM_RANGE(0xc002, 0xc002) AM_READ_PORT("IN2")
296   AM_RANGE(0xc003, 0xc003) AM_READ_PORT("DSW2")
297   AM_RANGE(0xc004, 0xc004) AM_READ_PORT("DSW1")
298298   AM_RANGE(0xd000, 0xd7ff) AM_READ(SMH_RAM)
299299   AM_RANGE(0xd800, 0xdbff) AM_WRITE(pal2_w) AM_READ(pal_r) AM_BASE(&paletteram)
300300   AM_RANGE(0xdc11, 0xdc11) AM_WRITE(bank_w)
r2844r2845
370370
371371
372372static INPUT_PORTS_START( cshooter )
373   PORT_START   /* IN0  (0xc200) */
373   PORT_START_TAG("IN0")   /* IN0  (0xc200) */
374374   PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_8WAY
375375   PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_8WAY
376376   PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_8WAY
r2844r2845
380380   PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
381381   PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
382382
383   PORT_START   /* IN1  (0xc201) */
383   PORT_START_TAG("IN1")   /* IN1  (0xc201) */
384384   PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_8WAY PORT_COCKTAIL
385385   PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_8WAY PORT_COCKTAIL
386386   PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_8WAY PORT_COCKTAIL
r2844r2845
390390   PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
391391   PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
392392
393   PORT_START   /* START    (0xc202) */
393   PORT_START_TAG("IN2")   /* START    (0xc202) */
394394   PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN )
395395   PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN )
396396   PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN )
r2844r2845
400400   PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
401401   PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
402402
403   PORT_START   /* DSW2 (0xc203) */
403   PORT_START_TAG("DSW2")   /* DSW2 (0xc203) */
404404   PORT_DIPNAME( 0x03, 0x03, DEF_STR( Difficulty ) )
405405   PORT_DIPSETTING(    0x03, DEF_STR( Easy ) )
406406   PORT_DIPSETTING(    0x02, DEF_STR( Medium ) )
r2844r2845
419419   PORT_DIPUNUSED( 0x40, IP_ACTIVE_LOW )
420420   PORT_DIPUNUSED( 0x80, IP_ACTIVE_LOW )
421421
422   PORT_START   /* DSW1 (0xc204) */
422   PORT_START_TAG("DSW1")   /* DSW1 (0xc204) */
423423   PORT_DIPNAME( 0x01, 0x01, "Coin Slots" )
424424   PORT_DIPSETTING(    0x01, "1" )
425425   PORT_DIPSETTING(    0x00, "2" )
r2844r2845
439439   PORT_DIPUNUSED( 0x40, IP_ACTIVE_LOW )
440440   PORT_DIPUNUSED( 0x80, IP_ACTIVE_LOW )
441441
442   PORT_START   /* COIN (0xc205) */
442   PORT_START_TAG("COIN")   /* COIN (0xc205) */
443443   PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_IMPULSE(1)
444444   PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_COIN2 ) PORT_IMPULSE(1)
445445   PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN )
src/mame/drivers/expro02.c
r2844r2845
123123#include "includes/kaneko16.h"
124124#include "sound/okim6295.h"
125125
126//extern DRIVER_INIT(berlwall);
127extern VIDEO_START(galsnew);
128extern VIDEO_UPDATE(galsnew);
129extern PALETTE_INIT(berlwall);
130extern UINT16* galsnew_bg_pixram;
131extern UINT16* galsnew_fg_pixram;
132
133126static INPUT_PORTS_START( galsnew )
134127   PORT_START_TAG("DSW1")
135128   PORT_DIPNAME( 0x0001, 0x0001, DEF_STR( Unused ) )
src/mame/drivers/ultrsprt.c
r2844r2845
1212#include "machine/konamiic.h"
1313
1414static UINT32 *vram;
15static UINT32 *workram;
1516
1617static VIDEO_UPDATE( ultrsprt )
1718{
r2844r2845
8182   cpunum_set_input_line(machine, 0, INPUT_LINE_IRQ1, CLEAR_LINE);
8283}
8384
85static MACHINE_START( ultrsprt )
86{
87   /* set conservative DRC options */
88   cpunum_set_info_int(0, CPUINFO_INT_PPC_DRC_OPTIONS, PPCDRC_COMPATIBLE_OPTIONS);
89
90   /* configure fast RAM regions for DRC */
91   cpunum_set_info_int(0, CPUINFO_INT_PPC_FASTRAM_SELECT, 0);
92   cpunum_set_info_int(0, CPUINFO_INT_PPC_FASTRAM_START, 0x00000000);
93   cpunum_set_info_int(0, CPUINFO_INT_PPC_FASTRAM_END, 0x0007ffff);
94   cpunum_set_info_ptr(0, CPUINFO_PTR_PPC_FASTRAM_BASE, vram);
95   cpunum_set_info_int(0, CPUINFO_INT_PPC_FASTRAM_READONLY, 0);
96
97   cpunum_set_info_int(0, CPUINFO_INT_PPC_FASTRAM_SELECT, 1);
98   cpunum_set_info_int(0, CPUINFO_INT_PPC_FASTRAM_START, 0x7f000000);
99   cpunum_set_info_int(0, CPUINFO_INT_PPC_FASTRAM_END, 0x7f01ffff);
100   cpunum_set_info_ptr(0, CPUINFO_PTR_PPC_FASTRAM_BASE, workram);
101   cpunum_set_info_int(0, CPUINFO_INT_PPC_FASTRAM_READONLY, 0);
102}
103
84104static ADDRESS_MAP_START( ultrsprt_map, ADDRESS_SPACE_PROGRAM, 32 )
85   ADDRESS_MAP_GLOBAL_MASK(0x7fffffff)
86105   AM_RANGE(0x00000000, 0x0007ffff) AM_RAM AM_BASE(&vram)
87106   AM_RANGE(0x70000000, 0x70000003) AM_READWRITE(eeprom_r, eeprom_w)
88107   AM_RANGE(0x70000020, 0x70000023) AM_READ(control1_r)
r2844r2845
90109   AM_RANGE(0x70000080, 0x70000087) AM_WRITE(K056800_host_w)
91110   AM_RANGE(0x70000088, 0x7000008f) AM_READ(K056800_host_r)
92111   AM_RANGE(0x700000e0, 0x700000e3) AM_WRITE(int_ack_w)
93   AM_RANGE(0x7f000000, 0x7f01ffff) AM_RAM
112   AM_RANGE(0x7f000000, 0x7f01ffff) AM_RAM AM_BASE(&workram)
94113   AM_RANGE(0x7f700000, 0x7f703fff) AM_RAM_WRITE(palette_w) AM_BASE(&paletteram32)
95114   AM_RANGE(0x7fa00000, 0x7fbfffff) AM_ROM AM_SHARE(1)
96115   AM_RANGE(0x7fc00000, 0x7fdfffff) AM_ROM AM_SHARE(1)
r2844r2845
231250   MDRV_INTERLEAVE(200)
232251
233252   MDRV_NVRAM_HANDLER(ultrsprt)
253   MDRV_MACHINE_START(ultrsprt)
234254
235255    /* video hardware */
236256   MDRV_SCREEN_ADD("main", RASTER)
src/mame/drivers/mainsnk.c
r2844r2845
7474#include "sound/ay8910.h"
7575#include "sound/namco.h"
7676
77WRITE8_HANDLER( snkwave_w );
78
7977extern UINT8 *mainsnk_fgram;
8078extern UINT8 *mainsnk_bgram;
8179WRITE8_HANDLER(mainsnk_c600_w);
src/mame/drivers/snowbros.c
r2844r2845
9191
9292static VIDEO_START( snowbros )
9393{
94   pandora_start(0,0,0);
94   pandora_start(machine,0,0,0);
9595}
9696
9797static VIDEO_EOF( snowbros )
src/mame/drivers/bzone.c
r2844r2845
252252
253253static INTERRUPT_GEN( bzone_interrupt )
254254{
255   if (input_port_read_indexed(machine, 0) & 0x10)
255   if (input_port_read(machine, "IN0") & 0x10)
256256      cpunum_set_input_line(machine, 0, INPUT_LINE_NMI, PULSE_LINE);
257257}
258258
r2844r2845
299299
300300static READ8_HANDLER( redbaron_joy_r )
301301{
302   return input_port_read_indexed(machine, rb_input_select ? 5 : 6);
302   return input_port_read(machine, rb_input_select ? "FAKE1" : "FAKE2");
303303}
304304
305305
r2844r2845
806806
807807static WRITE8_HANDLER( analog_select_w )
808808{
809   static const char *analog_port[] = { "AN0", "AN1", "AN2" };
810
809811   if (offset <= 2)
810      analog_data = input_port_read_indexed(machine, 6 + offset);
812      analog_data = input_port_read(machine, analog_port[offset]);
811813}
812814
813815
src/mame/drivers/segaxbd.c
r2844r2845
351351                D0: Sound section reset (1= normal operation, 0= reset)
352352            */
353353         if (((oldval ^ data) & 0x40) && !(data & 0x40)) watchdog_reset_w(machine,0,0);
354         segaic16_set_display_enable(data & 0x20);
354         segaic16_set_display_enable(machine, data & 0x20);
355355         cpunum_set_input_line(machine, 2, INPUT_LINE_RESET, (data & 0x01) ? CLEAR_LINE : ASSERT_LINE);
356356         return;
357357
src/mame/drivers/deadang.c
r2844r2845
5353
5454static READ16_HANDLER( ghunter_trackball_low_r )
5555{
56   return (input_port_read_indexed(machine, 3) & 0xff) | ((input_port_read_indexed(machine, 4) & 0xff) << 8);
56   return (input_port_read(machine, "TRACKX") & 0xff) | ((input_port_read(machine, "TRACKY") & 0xff) << 8);
5757}
5858static READ16_HANDLER( ghunter_trackball_high_r )
5959{
60   return ((input_port_read_indexed(machine, 3) & 0x0f00) >> 4) | (input_port_read_indexed(machine, 4) & 0x0f00);
60   return ((input_port_read(machine, "TRACKX") & 0x0f00) >> 4) | (input_port_read(machine, "TRACKY") & 0x0f00);
6161}
6262
6363/* Memory Maps */
r2844r2845
9494static INPUT_PORTS_START( deadang )
9595   SEIBU_COIN_INPUTS   /* coin inputs read through sound cpu */
9696
97   PORT_START   /* IN0 */
97   PORT_START_TAG("IN0")   /* IN0 */
9898   PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_8WAY PORT_PLAYER(1)
9999   PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_8WAY PORT_PLAYER(1)
100100   PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_8WAY PORT_PLAYER(1)
r2844r2845
111111   PORT_BIT( 0x4000, IP_ACTIVE_LOW, IPT_START2 )
112112   PORT_BIT( 0x8000, IP_ACTIVE_LOW, IPT_START1 )
113113
114   PORT_START   /* Dip switch A */
114   PORT_START_TAG("DSW")   /* Dip switch A */
115115   PORT_DIPNAME( 0x0007, 0x0007, DEF_STR( Coin_A ) )
116116   PORT_DIPSETTING(    0x0000, DEF_STR( 5C_1C ) )
117117   PORT_DIPSETTING(    0x0004, DEF_STR( 4C_1C ) )
r2844r2845
160160static INPUT_PORTS_START( ghunter )
161161   SEIBU_COIN_INPUTS   /* coin inputs read through sound cpu */
162162
163   PORT_START   /* IN0 */
163   PORT_START_TAG("IN0")   /* IN0 */
164164   PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_8WAY PORT_PLAYER(1)
165165   PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_8WAY PORT_PLAYER(1)
166166   PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_8WAY PORT_PLAYER(1)
r2844r2845
177177   PORT_BIT( 0x4000, IP_ACTIVE_LOW, IPT_START2 )
178178   PORT_BIT( 0x8000, IP_ACTIVE_LOW, IPT_START1 )
179179
180   PORT_START   /* Dip switch A */
180   PORT_START_TAG("DSW")   /* Dip switch A */
181181   PORT_DIPNAME( 0x0007, 0x0007, DEF_STR( Coin_A ) )
182182   PORT_DIPSETTING(    0x0000, DEF_STR( 5C_1C ) )
183183   PORT_DIPSETTING(    0x0004, DEF_STR( 4C_1C ) )
r2844r2845
223223   PORT_DIPSETTING(    0x0000, DEF_STR( Japan ) )
224224   PORT_DIPSETTING(    0x8000, "Overseas" )
225225
226   PORT_START
226   PORT_START_TAG("TRACKX")
227227   PORT_BIT( 0x0fff, 0x0000, IPT_TRACKBALL_X ) PORT_SENSITIVITY(100) PORT_KEYDELTA(30) PORT_PLAYER(1)
228228
229   PORT_START
229   PORT_START_TAG("TRACKY")
230230   PORT_BIT( 0x0fff, 0x0000, IPT_TRACKBALL_Y ) PORT_SENSITIVITY(100) PORT_KEYDELTA(30) PORT_PLAYER(1)
231231INPUT_PORTS_END
232232
src/mame/drivers/cliffhgr.c
r2844r2845
162162
163163static READ8_HANDLER( cliff_port_r )
164164{
165   static const char *banknames[] = { "BANK0", "BANK1", "BANK2", "BANK3", "BANK4", "BANK5", "BANK6" };
166
165167   if ( port_bank < 7 )
166168   {
167      return input_port_read_indexed(machine,  port_bank );
169      return input_port_read(machine,  banknames[port_bank]);
168170   }
169171
170172   /* output is pulled up for non-mapped ports */
src/mame/drivers/copsnrob.c
r2844r2845
8282
8383static READ8_HANDLER( copsnrob_misc_r )
8484{
85   return misc | (input_port_read_indexed(machine, 0) & 0x80);
85   return misc | (input_port_read(machine, "IN0") & 0x80);
8686}
8787
8888static WRITE8_HANDLER( copsnrob_misc_w )
r2844r2845
118118   AM_RANGE(0x0b00, 0x0bff) AM_RAM
119119   AM_RANGE(0x0c00, 0x0fff) AM_RAM AM_BASE(&videoram) AM_SIZE(&videoram_size)
120120//  AM_RANGE(0x1000, 0x1003) AM_WRITENOP
121//  AM_RANGE(0x1000, 0x1000) AM_READ(input_port_0_r)
121//  AM_RANGE(0x1000, 0x1000) AM_READ_PORT("IN0")
122122   AM_RANGE(0x1000, 0x1000) AM_READ(copsnrob_misc_r)
123123   AM_RANGE(0x1000, 0x1000) AM_WRITE(copsnrob_misc_w)
124124   AM_RANGE(0x1002, 0x100e) AM_READ(copsnrob_gun_position_r)
125   AM_RANGE(0x1012, 0x1012) AM_READ(input_port_3_r)
126   AM_RANGE(0x1016, 0x1016) AM_READ(input_port_1_r)
127   AM_RANGE(0x101a, 0x101a) AM_READ(input_port_2_r)
125   AM_RANGE(0x1012, 0x1012) AM_READ_PORT("DSW")
126   AM_RANGE(0x1016, 0x1016) AM_READ_PORT("IN1")
127   AM_RANGE(0x101a, 0x101a) AM_READ_PORT("IN2")
128128   AM_RANGE(0x1200, 0x1fff) AM_ROM
129129ADDRESS_MAP_END
130130
r2844r2845
137137 *************************************/
138138
139139static INPUT_PORTS_START( copsnrob )
140   PORT_START      /* IN0 */
140   PORT_START_TAG("IN0")      /* IN0 */
141141   PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_VBLANK )
142142
143   PORT_START      /* IN1 */
143   PORT_START_TAG("IN1")      /* IN1 */
144144   PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_START1 )
145145   PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_COIN1 )
146146
147   PORT_START      /* IN2 */
147   PORT_START_TAG("IN2")      /* IN2 */
148148   PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_START2 )
149149   PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_COIN2 )
150150
151   PORT_START      /* DIP1 */
151   PORT_START_TAG("DSW")      /* DIP1 */
152152   PORT_DIPNAME( 0x03, 0x03, DEF_STR( Coinage ) )
153153   PORT_DIPSETTING(    0x03, "1 Coin/1 Player" )
154154   PORT_DIPSETTING(    0x02, "1 Coin/2 Players" )
r2844r2845
165165   PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_BUTTON1) PORT_PLAYER(1)
166166
167167   /* These input ports are fake */
168   PORT_START      /* IN3 */
168   PORT_START_TAG("FAKE0")      /* IN3 */
169169   PORT_BIT( 0x01, IP_ACTIVE_HIGH,IPT_JOYSTICK_UP ) PORT_4WAY PORT_PLAYER(1)
170170   PORT_BIT( 0x02, IP_ACTIVE_HIGH,IPT_JOYSTICK_DOWN ) PORT_4WAY PORT_PLAYER(1)
171171   PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(1)
172172
173   PORT_START      /* IN4 */
173   PORT_START_TAG("FAKE1")      /* IN4 */
174174   PORT_BIT( 0x01, IP_ACTIVE_HIGH,IPT_JOYSTICK_UP ) PORT_4WAY PORT_PLAYER(2)
175175   PORT_BIT( 0x02, IP_ACTIVE_HIGH,IPT_JOYSTICK_DOWN ) PORT_4WAY PORT_PLAYER(2)
176176   PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(2)
177177
178   PORT_START      /* IN5 */
178   PORT_START_TAG("FAKE2")      /* IN5 */
179179   PORT_BIT( 0x01, IP_ACTIVE_HIGH,IPT_JOYSTICK_UP ) PORT_4WAY PORT_PLAYER(3)
180180   PORT_BIT( 0x02, IP_ACTIVE_HIGH,IPT_JOYSTICK_DOWN ) PORT_4WAY PORT_PLAYER(3)
181181   PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(3)
182182
183   PORT_START      /* IN6 */
183   PORT_START_TAG("FAKE3")      /* IN6 */
184184   PORT_BIT( 0x01, IP_ACTIVE_HIGH,IPT_JOYSTICK_UP ) PORT_4WAY PORT_PLAYER(4)
185185   PORT_BIT( 0x02, IP_ACTIVE_HIGH,IPT_JOYSTICK_DOWN ) PORT_4WAY PORT_PLAYER(4)
186186   PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(4)
src/mame/drivers/bking.c
r2844r2845
257257ADDRESS_MAP_END
258258
259259static INPUT_PORTS_START( bking )
260   PORT_START  /* IN0 */
260   PORT_START_TAG("IN0")   /* IN0 */
261261   PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_COIN1 )
262262   PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_COIN2 )
263263   PORT_BIT( 0xfc, IP_ACTIVE_HIGH, IPT_UNUSED )
r2844r2845
265265   /* continue inputs are labelled in schematics. */
266266   /* They are not connected though to any button */
267267
268   PORT_START  /* IN1 */
268   PORT_START_TAG("IN1")   /* IN1 */
269269   PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_START1 )
270270   PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_START2 )
271   PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNUSED ) /* Continue 1 */
272   PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNUSED ) /* Continue 2 */
271   PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNUSED )   /* Continue 1 */
272   PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNUSED )   /* Continue 2 */
273273   PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_SERVICE1 )
274274   PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_TILT )
275   PORT_BIT( 0xc0, IP_ACTIVE_LOW, IPT_UNUSED ) /* Not Connected */
275   PORT_BIT( 0xc0, IP_ACTIVE_LOW, IPT_UNUSED )   /* Not Connected */
276276
277   PORT_START_TAG("DSWA")  /* IN2 - DIP Switch A */
277   PORT_START_TAG("DSWA")   /* IN2 - DIP Switch A */
278278   PORT_DIPNAME( 0x01, 0x00, "Holes Awarded" ) PORT_DIPLOCATION("SWA:1")
279279   PORT_DIPSETTING(    0x00, "Par Play: 0 Holes/Birdie: 1 Hole/Eagle: 2 Holes/Double Eagle: 4 Holes" )
280280   PORT_DIPSETTING(    0x01, "Par Play: 1 Hole/Birdie: 2 Holes/Eagle: 3 Holes/Double Eagle: 4 Holes" )
r2844r2845
299299   PORT_DIPSETTING(    0x00, DEF_STR(Upright) )
300300   PORT_DIPSETTING(    0x80, DEF_STR(Cocktail) )
301301
302   PORT_START_TAG("DSWB")  /* IN3 - DIP Switch B */
302   PORT_START_TAG("DSWB")   /* IN3 - DIP Switch B */
303303   PORT_DIPNAME( 0x0f, 0x00, DEF_STR( Coin_A ) ) PORT_DIPLOCATION("SWB:1,2,3,4")
304304   PORT_DIPSETTING(    0x0f, DEF_STR( 9C_1C ) )
305305   PORT_DIPSETTING(    0x0e, DEF_STR( 8C_1C ) )
r2844r2845
335335   PORT_DIPSETTING(    0x60, DEF_STR( 1C_7C ) )
336336   PORT_DIPSETTING(    0x70, DEF_STR( 1C_8C ) )
337337
338   PORT_START_TAG("DSWC")  /* IN4 - DIP Switch C */
338   PORT_START_TAG("DSWC")   /* IN4 - DIP Switch C */
339339   PORT_DIPNAME( 0x01, 0x01, "Appearance of Crow" ) PORT_DIPLOCATION("SWC:1")
340340   PORT_DIPSETTING(    0x00, DEF_STR( Off ) )
341341   PORT_DIPSETTING(    0x01, DEF_STR( On ) )
r2844r2845
358358   PORT_DIPSETTING(    0x00, "1 Way" )
359359   PORT_DIPSETTING(    0x80, "2 Way" )
360360
361   PORT_START  /* IN5 */
361   PORT_START_TAG("TRACK0_X")   /* IN5 */
362362   PORT_BIT( 0xff, 0x00, IPT_TRACKBALL_X ) PORT_SENSITIVITY(25) PORT_KEYDELTA(10) /* Sensitivity, clip, min, max */
363363
364   PORT_START  /* IN6 */
364   PORT_START_TAG("TRACK0_Y")   /* IN6 */
365365   PORT_BIT( 0xff, 0x00, IPT_TRACKBALL_Y ) PORT_SENSITIVITY(25) PORT_KEYDELTA(10) PORT_REVERSE /* Sensitivity, clip, min, max */
366366
367   PORT_START  /* IN7 */
367   PORT_START_TAG("TRACK1_X")   /* IN7 */
368368   PORT_BIT( 0xff, 0x00, IPT_TRACKBALL_X ) PORT_SENSITIVITY(25) PORT_KEYDELTA(10) PORT_COCKTAIL /* Sensitivity, clip, min, max */
369369
370   PORT_START  /* IN8 */
370   PORT_START_TAG("TRACK1_Y")   /* IN8 */
371371   PORT_BIT( 0xff, 0x00, IPT_TRACKBALL_Y ) PORT_SENSITIVITY(25) PORT_KEYDELTA(10) PORT_REVERSE PORT_COCKTAIL /* Sensitivity, clip, min, max */
372372INPUT_PORTS_END
373373
src/mame/drivers/dblewing.c
r2844r2845
138138
139139static VIDEO_START(dblewing)
140140{
141   deco16_1_video_init();
141   deco16_1_video_init(machine);
142142
143143   deco16_set_tilemap_bank_callback(0,dblewing_bank_callback);
144144   deco16_set_tilemap_bank_callback(1,dblewing_bank_callback);
src/mame/drivers/arabian.c
r2844r2845
133133   /* alternate CPU's RAM space while the CPU is running. If the CPU is not     */
134134   /* running (i.e., the /SRES line is low), it needs to look like RAM to pass  */
135135   /* the self-tests */
136   char port[5];
136   static const char *comnames[] = { "COM0", "COM1", "COM2", "COM3", "COM4", "COM5" };
137137
138138   /* if the CPU reset line is being held down, just return RAM */
139139   if (custom_cpu_reset)
r2844r2845
149149      case 3:
150150      case 4:
151151      case 5:
152         sprintf(port, "COM%d", offset);
153         return input_port_read(machine, port);
152         return input_port_read(machine, comnames[offset]);
154153
155154      /* busy flag; this is polled to check the custom CPU's readiness */
156155      /* we just toggle it on and off until the main CPU gets the result */
src/mame/drivers/hornet.c
r2844r2845
760760/*****************************************************************************/
761761
762762static ADDRESS_MAP_START( hornet_map, ADDRESS_SPACE_PROGRAM, 32 )
763   AM_RANGE(0x00000000, 0x003fffff) AM_MIRROR(0x80000000) AM_RAM AM_BASE(&workram)      /* Work RAM */
764   AM_RANGE(0x74000000, 0x740000ff) AM_MIRROR(0x80000000) AM_READWRITE(K037122_reg_r, K037122_reg_w)
765   AM_RANGE(0x74020000, 0x7403ffff) AM_MIRROR(0x80000000) AM_READWRITE(K037122_sram_r, K037122_sram_w)
766   AM_RANGE(0x74040000, 0x7407ffff) AM_MIRROR(0x80000000) AM_READWRITE(K037122_char_r, K037122_char_w)
767   AM_RANGE(0x78000000, 0x7800ffff) AM_MIRROR(0x80000000) AM_READWRITE(cgboard_dsp_shared_r_ppc, cgboard_dsp_shared_w_ppc)
768   AM_RANGE(0x780c0000, 0x780c0003) AM_MIRROR(0x80000000) AM_READWRITE(cgboard_dsp_comm_r_ppc, cgboard_dsp_comm_w_ppc)
769   AM_RANGE(0x7d000000, 0x7d00ffff) AM_MIRROR(0x80000000) AM_READ8(sysreg_r, 0xffffffff)
770   AM_RANGE(0x7d010000, 0x7d01ffff) AM_MIRROR(0x80000000) AM_WRITE8(sysreg_w, 0xffffffff)
771   AM_RANGE(0x7d020000, 0x7d021fff) AM_MIRROR(0x80000000) AM_READWRITE(timekeeper_0_32be_r, timekeeper_0_32be_w)   /* M48T58Y RTC/NVRAM */
772   AM_RANGE(0x7d030000, 0x7d030007) AM_MIRROR(0x80000000) AM_READWRITE(K056800_host_r, K056800_host_w)
773   AM_RANGE(0x7d042000, 0x7d043fff) AM_MIRROR(0x80000000) AM_RAM            /* COMM BOARD 0 */
774   AM_RANGE(0x7d044000, 0x7d044007) AM_MIRROR(0x80000000) AM_READ(comm0_unk_r)
775   AM_RANGE(0x7d048000, 0x7d048003) AM_MIRROR(0x80000000) AM_WRITE(comm1_w)
776   AM_RANGE(0x7d04a000, 0x7d04a003) AM_MIRROR(0x80000000) AM_WRITE(comm_rombank_w)
777   AM_RANGE(0x7d050000, 0x7d05ffff) AM_MIRROR(0x80000000) AM_ROMBANK(1)      /* COMM BOARD 1 */
778   AM_RANGE(0x7e000000, 0x7e7fffff) AM_MIRROR(0x80000000) AM_ROM AM_REGION(REGION_USER2, 0)      /* Data ROM */
779   AM_RANGE(0x7f000000, 0x7f3fffff) AM_MIRROR(0x80000000) AM_ROM AM_SHARE(2)
780   AM_RANGE(0x7fc00000, 0x7fffffff) AM_MIRROR(0x80000000) AM_ROM AM_REGION(REGION_USER1, 0) AM_SHARE(2)   /* Program ROM */
763   AM_RANGE(0x00000000, 0x003fffff) AM_RAM AM_BASE(&workram)      /* Work RAM */
764   AM_RANGE(0x74000000, 0x740000ff) AM_READWRITE(K037122_reg_r, K037122_reg_w)
765   AM_RANGE(0x74020000, 0x7403ffff) AM_READWRITE(K037122_sram_r, K037122_sram_w)
766   AM_RANGE(0x74040000, 0x7407ffff) AM_READWRITE(K037122_char_r, K037122_char_w)
767   AM_RANGE(0x78000000, 0x7800ffff) AM_READWRITE(cgboard_dsp_shared_r_ppc, cgboard_dsp_shared_w_ppc)
768   AM_RANGE(0x780c0000, 0x780c0003) AM_READWRITE(cgboard_dsp_comm_r_ppc, cgboard_dsp_comm_w_ppc)
769   AM_RANGE(0x7d000000, 0x7d00ffff) AM_READ8(sysreg_r, 0xffffffff)
770   AM_RANGE(0x7d010000, 0x7d01ffff) AM_WRITE8(sysreg_w, 0xffffffff)
771   AM_RANGE(0x7d020000, 0x7d021fff) AM_READWRITE(timekeeper_0_32be_r, timekeeper_0_32be_w)   /* M48T58Y RTC/NVRAM */
772   AM_RANGE(0x7d030000, 0x7d030007) AM_READWRITE(K056800_host_r, K056800_host_w)
773   AM_RANGE(0x7d042000, 0x7d043fff) AM_RAM            /* COMM BOARD 0 */
774   AM_RANGE(0x7d044000, 0x7d044007) AM_READ(comm0_unk_r)
775   AM_RANGE(0x7d048000, 0x7d048003) AM_WRITE(comm1_w)
776   AM_RANGE(0x7d04a000, 0x7d04a003) AM_WRITE(comm_rombank_w)
777   AM_RANGE(0x7d050000, 0x7d05ffff) AM_ROMBANK(1)      /* COMM BOARD 1 */
778   AM_RANGE(0x7e000000, 0x7e7fffff) AM_ROM AM_REGION(REGION_USER2, 0)      /* Data ROM */
779   AM_RANGE(0x7f000000, 0x7f3fffff) AM_ROM AM_SHARE(2)
780   AM_RANGE(0x7fc00000, 0x7fffffff) AM_ROM AM_REGION(REGION_USER1, 0) AM_SHARE(2)   /* Program ROM */
781781ADDRESS_MAP_END
782782
783783/*****************************************************************************/
r2844r2845
967967
968968   /* configure fast RAM regions for DRC */
969969   cpunum_set_info_int(0, CPUINFO_INT_PPC_FASTRAM_SELECT, 0);
970   cpunum_set_info_int(0, CPUINFO_INT_PPC_FASTRAM_START, 0x80000000);
971   cpunum_set_info_int(0, CPUINFO_INT_PPC_FASTRAM_END, 0x803fffff);
970   cpunum_set_info_int(0, CPUINFO_INT_PPC_FASTRAM_START, 0x00000000);
971   cpunum_set_info_int(0, CPUINFO_INT_PPC_FASTRAM_END, 0x003fffff);
972972   cpunum_set_info_ptr(0, CPUINFO_PTR_PPC_FASTRAM_BASE, workram);
973973   cpunum_set_info_int(0, CPUINFO_INT_PPC_FASTRAM_READONLY, 0);
974974}
r2844r2845
10761076
10771077static void jamma_jvs_cmd_exec(void);
10781078
1079static UINT8 jvs_rdata[1024];
10801079static UINT8 jvs_sdata[1024];
10811080
1082static int jvs_rdata_ptr = 0;
10831081static int jvs_sdata_ptr = 0;
1084static int jvs_rdata_count = 0;
10851082
1086static int jamma_jvs_r(UINT8 *data)
1087{
1088   if (jvs_rdata_ptr < jvs_rdata_count)
1089   {
1090      *data = jvs_rdata[jvs_rdata_ptr++];
1091      return TRUE;
1092   }
1093   return FALSE;
1094}
1095
10961083static void jamma_jvs_w(UINT8 data)
10971084{
10981085   if (jvs_sdata_ptr == 0 && data != 0xe0)
r2844r2845
11041091      jamma_jvs_cmd_exec();
11051092}
11061093
1107static int jvs_encode_data(UINT8 *in, UINT8 *out, int length)
1094static int jvs_encode_data(UINT8 *in, int length)
11081095{
1109   int outptr = 0;
11101096   int inptr = 0;
1097   int sum = 0;
11111098
11121099   while (inptr < length)
11131100   {
11141101      UINT8 b = in[inptr++];
11151102      if (b == 0xe0)
11161103      {
1117         out[outptr++] = 0xd0;
1118         out[outptr++] = 0xdf;
1104         sum += 0xd0 + 0xdf;
1105         ppc4xx_spu_receive_byte(0, 0xd0);
1106         ppc4xx_spu_receive_byte(0, 0xdf);
11191107      }
11201108      else if (b == 0xd0)
11211109      {
1122         out[outptr++] = 0xd0;
1123         out[outptr++] = 0xcf;
1110         sum += 0xd0 + 0xcf;
1111         ppc4xx_spu_receive_byte(0, 0xd0);
1112         ppc4xx_spu_receive_byte(0, 0xcf);
11241113      }
11251114      else
11261115      {
1127         out[outptr++] = b;
1116         sum += b;
1117         ppc4xx_spu_receive_byte(0, b);
11281118      }
1129   };
1130
1131   return outptr;
1119   }
1120   return sum;
11321121}
11331122
11341123static int jvs_decode_data(UINT8 *in, UINT8 *out, int length)
r2844r2845
11571146{
11581147   UINT8 sync, node, byte_num;
11591148   UINT8 data[1024], rdata[1024];
1160   int i, length;
1149   int length;
11611150   int rdata_ptr;
11621151   int sum;
11631152
r2844r2845
12131202   }
12141203
12151204   // write jvs return data
1216   jvs_rdata[0] = 0xe0;         // sync
1217   jvs_rdata[1] = 0x00;         // node
1218   jvs_rdata[2] = rdata_ptr+1;      // num of bytes
1205   sum = 0x00 + (rdata_ptr+1);
1206   ppc4xx_spu_receive_byte(0, 0xe0);         // sync
1207   ppc4xx_spu_receive_byte(0, 0x00);         // node
1208   ppc4xx_spu_receive_byte(0, rdata_ptr+1);   // num of bytes
1209   sum += jvs_encode_data(rdata, rdata_ptr);
1210   ppc4xx_spu_receive_byte(0, sum - 1);      // checksum
12191211
1220   length = jvs_encode_data(rdata, &jvs_rdata[3], rdata_ptr);
1221
1222   // calculate sum
1223   sum = 0;
1224   for (i=0; i < length+2; i++)
1225   {
1226      sum += jvs_rdata[1+i];
1227   }
1228
1229   // write sum
1230   jvs_rdata[3+length] = (UINT8)(sum-1);
1231
1232   jvs_rdata_count = length + 4;
1233   jvs_rdata_ptr = 0;
12341212   jvs_sdata_ptr = 0;
12351213}
12361214
r2844r2845
12581236
12591237   timekeeper_init(0, TIMEKEEPER_M48T58, backup_ram);
12601238
1261   cpunum_set_info_fct(0, CPUINFO_PTR_SPU_TX_HANDLER, (genf *)jamma_jvs_w);
1262   cpunum_set_info_fct(0, CPUINFO_PTR_SPU_RX_HANDLER, (genf *)jamma_jvs_r);
1239   ppc4xx_spu_set_tx_handler(0, jamma_jvs_w);
12631240}
12641241
12651242static void init_hornet_2board(running_machine *machine)
r2844r2845
12761253
12771254   timekeeper_init(0, TIMEKEEPER_M48T58, backup_ram);
12781255
1279   cpunum_set_info_fct(0, CPUINFO_PTR_SPU_TX_HANDLER, (genf *)jamma_jvs_w);
1280   cpunum_set_info_fct(0, CPUINFO_PTR_SPU_RX_HANDLER, (genf *)jamma_jvs_r);
1256   ppc4xx_spu_set_tx_handler(0, jamma_jvs_w);
12811257}
12821258
12831259static DRIVER_INIT(gradius4)
src/mame/drivers/ccastles.c
r2844r2845
290290
291291static READ8_HANDLER( leta_r )
292292{
293   return input_port_read_indexed(machine, 2 + offset);
293   static const char *letanames[] = { "LETA0", "LETA1", "LETA2", "LETA3" };
294
295   return input_port_read(machine, letanames[offset]);
294296}
295297
296298
r2844r2845
346348   AM_RANGE(0x8e00, 0x8fff) AM_BASE(&spriteram)
347349   AM_RANGE(0x9000, 0x90ff) AM_MIRROR(0x0300) AM_RAM AM_BASE(&nvram_stage) AM_SIZE(&generic_nvram_size)
348350   AM_RANGE(0x9400, 0x9403) AM_MIRROR(0x01fc) AM_READ(leta_r)
349   AM_RANGE(0x9600, 0x97ff) AM_READ(input_port_0_r)
351   AM_RANGE(0x9600, 0x97ff) AM_READ_PORT("IN0")
350352   AM_RANGE(0x9800, 0x980f) AM_MIRROR(0x01f0) AM_READWRITE(pokey1_r, pokey1_w)
351353   AM_RANGE(0x9a00, 0x9a0f) AM_MIRROR(0x01f0) AM_READWRITE(pokey2_r, pokey2_w)
352354   AM_RANGE(0x9c00, 0x9c7f) AM_WRITE(nvram_recall_w)
r2844r2845
373375 *************************************/
374376
375377static INPUT_PORTS_START( ccastles )
376   PORT_START   /* IN0 */
378   PORT_START_TAG("IN0")   /* IN0 */
377379   PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN2 )
378380   PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_COIN1 )
379381   PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_SERVICE1 )
r2844r2845
383385   PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_BUTTON1 )               /* 1p Jump, non-cocktail start1 */
384386   PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(2)      /* 2p Jump, non-cocktail start2 */
385387
386   PORT_START   /* IN1 */
388   PORT_START_TAG("IN1")   /* IN1 */
387389   PORT_DIPNAME( 0x01, 0x01, DEF_STR( Unknown ) )
388390   PORT_DIPSETTING(    0x01, DEF_STR( Off ) )
389391   PORT_DIPSETTING(    0x00, DEF_STR( On ) )
src/mame/drivers/dragrace.c
r2844r2845
1717static TIMER_CALLBACK( dragrace_frame_callback )
1818{
1919   int i;
20   static const char *portnames[] = { "P1", "P2" };
2021
2122   for (i = 0; i < 2; i++)
2223   {
23      switch (input_port_read_indexed(machine, 5 + i))
24      switch (input_port_read(machine, portnames[i]))
2425      {
2526      case 0x01: dragrace_gear[i] = 1; break;
2627      case 0x02: dragrace_gear[i] = 2; break;
r2844r2845
3132   }
3233
3334   /* watchdog is disabled during service mode */
34   watchdog_enable(machine, input_port_read_indexed(machine, 0) & 0x20);
35   watchdog_enable(machine, input_port_read(machine, "IN0") & 0x20);
3536}
3637
3738
r2844r2845
116117
117118static READ8_HANDLER( dragrace_input_r )
118119{
119   int val = input_port_read_indexed(machine, 2);
120   int val = input_port_read(machine, "IN2");
121   static const char *portnames[] = { "IN0", "IN1" };
120122
121123   UINT8 maskA = 1 << (offset % 8);
122124   UINT8 maskB = 1 << (offset / 8);
r2844r2845
125127
126128   for (i = 0; i < 2; i++)
127129   {
128      int in = input_port_read_indexed(machine, i);
130      int in = input_port_read(machine, portnames[i]);
129131
130132      if (dragrace_gear[i] != 0)
131133      {
r2844r2845
146148{
147149   int bitA[2];
148150   int bitB[2];
151   static const char *dialnames[] = { "DIAL1", "DIAL2" };
149152
150153   int i;
151154
152155   for (i = 0; i < 2; i++)
153156   {
154      int dial = input_port_read_indexed(machine, 3 + i);
157      int dial = input_port_read(machine, dialnames[i]);
155158
156159      bitA[i] = ((dial + 1) / 2) & 1;
157160      bitB[i] = ((dial + 0) / 2) & 1;
r2844r2845
191194
192195
193196static INPUT_PORTS_START( dragrace )
194   PORT_START /* IN0 */
197   PORT_START_TAG("IN0")   /* IN0 */
195198   PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_NAME("Player 1 Gas") PORT_PLAYER(1)
196199   PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNUSED ) /* player 1 gear 1 */
197200   PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNUSED ) /* player 1 gear 2 */
r2844r2845
204207   PORT_DIPSETTING( 0x40, "4.9 seconds" )
205208   PORT_DIPSETTING( 0xc0, "Never" )
206209
207   PORT_START /* IN1 */
210   PORT_START_TAG("IN1")   /* IN1 */
208211   PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_NAME("Player 2 Gas") PORT_PLAYER(2)
209212   PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNUSED ) /* player 2 gear 1 */
210213   PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNUSED ) /* player 2 gear 2 */
r2844r2845
216219   PORT_DIPSETTING( 0x80, "4" )
217220   PORT_DIPSETTING( 0x00, "5" )
218221
219   PORT_START /* IN2 */
222   PORT_START_TAG("IN2")   /* IN2 */
220223   PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_UNUSED ) /* IN0 connects here */
221224   PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_UNUSED ) /* IN1 connects here */
222225   PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_COIN1 )
r2844r2845
229232   PORT_DIPSETTING( 0x80, DEF_STR( 1C_2C ) )
230233   PORT_DIPSETTING( 0x00, DEF_STR( Free_Play ) )
231234
232   PORT_START /* IN3 */
235   PORT_START_TAG("DIAL1")   /* IN3 */
233236   PORT_BIT( 0xff, 0x00, IPT_DIAL_V ) PORT_SENSITIVITY(25) PORT_KEYDELTA(10) PORT_PLAYER(1)
234237
235   PORT_START /* IN4 */
238   PORT_START_TAG("DIAL2")   /* IN4 */
236239   PORT_BIT( 0xff, 0x00, IPT_DIAL_V ) PORT_SENSITIVITY(25) PORT_KEYDELTA(10) PORT_PLAYER(2)
237240
238   PORT_START /* IN5 */
241   PORT_START_TAG("P1")   /* IN5 */
239242   PORT_BIT(0x01, IP_ACTIVE_HIGH, IPT_BUTTON2 ) PORT_NAME("Player 1 Gear 1") PORT_PLAYER(1)
240243   PORT_BIT(0x02, IP_ACTIVE_HIGH, IPT_BUTTON3 ) PORT_NAME("Player 1 Gear 2") PORT_PLAYER(1)
241244   PORT_BIT(0x04, IP_ACTIVE_HIGH, IPT_BUTTON4 ) PORT_NAME("Player 1 Gear 3") PORT_PLAYER(1)
242245   PORT_BIT(0x08, IP_ACTIVE_HIGH, IPT_BUTTON5 ) PORT_NAME("Player 1 Gear 4") PORT_PLAYER(1)
243246   PORT_BIT(0x10, IP_ACTIVE_HIGH, IPT_BUTTON6 ) PORT_NAME("Player 1 Neutral") PORT_PLAYER(1)
244247
245   PORT_START /* IN6 */
248   PORT_START_TAG("P2")   /* IN6 */
246249   PORT_BIT(0x01, IP_ACTIVE_HIGH, IPT_BUTTON2 ) PORT_NAME("Player 2 Gear 1") PORT_PLAYER(2)
247250   PORT_BIT(0x02, IP_ACTIVE_HIGH, IPT_BUTTON3 ) PORT_NAME("Player 2 Gear 2") PORT_PLAYER(2)
248251   PORT_BIT(0x04, IP_ACTIVE_HIGH, IPT_BUTTON4 ) PORT_NAME("Player 2 Gear 3") PORT_PLAYER(2)
src/mame/drivers/seibuspi.c
r2844r2845
674674#include "machine/intelfsh.h"
675675#include "sound/okim6295.h"
676676#include "sound/ymf271.h"
677#include "includes/seibuspi.h"
677678
678void seibuspi_text_decrypt(UINT8 *rom);
679void seibuspi_bg_decrypt(UINT8 *rom, int size);
680void seibuspi_sprite_decrypt(UINT8 *src, int romsize);
681
682void seibuspi_rise10_text_decrypt(UINT8 *rom);
683void seibuspi_rise10_bg_decrypt(UINT8 *rom, int size);
684void seibuspi_rise10_sprite_decrypt(UINT8 *rom, int romsize);
685
686void seibuspi_rise11_text_decrypt(UINT8 *rom);
687void seibuspi_rise11_bg_decrypt(UINT8 *rom, int size);
688void seibuspi_rise11_sprite_decrypt(UINT8 *rom, int romsize);
689
690VIDEO_START( spi );
691VIDEO_UPDATE( spi );
692WRITE32_HANDLER( spi_textlayer_w );
693WRITE32_HANDLER( spi_back_layer_w );
694WRITE32_HANDLER( spi_mid_layer_w );
695WRITE32_HANDLER( spi_fore_layer_w );
696WRITE32_HANDLER( spi_paletteram32_xBBBBBGGGGGRRRRR_w );
697READ32_HANDLER( spi_layer_bank_r );
698WRITE32_HANDLER( spi_layer_bank_w );
699void rf2_set_layer_banks(int banks);
700READ32_HANDLER( spi_layer_enable_r );
701WRITE32_HANDLER( spi_layer_enable_w );
702
703WRITE32_HANDLER( tilemap_dma_start_w );
704WRITE32_HANDLER( palette_dma_start_w );
705WRITE32_HANDLER( video_dma_length_w );
706WRITE32_HANDLER( video_dma_address_w );
707WRITE32_HANDLER( sprite_dma_start_w );
708
709extern UINT32 *spi_scrollram;
710679UINT32 *spimainram;
711680
712681static UINT8 *z80_rom;
src/mame/drivers/coolpool.c
r2844r2845
267267         break;
268268
269269      case 0x500:
270         iop_answer = input_port_read_indexed(machine, 0);
270         iop_answer = input_port_read(machine, "IN1");
271271         break;
272272   }
273273
src/mame/drivers/gaplus.c
r2844r2845
153153#include "machine/namcoio.h"
154154#include "sound/namco.h"
155155#include "sound/samples.h"
156#include "includes/gaplus.h"
156157
157158
158/* custom IO chips functions */
159extern UINT8 *gaplus_customio_3;
160WRITE8_HANDLER( gaplus_customio_3_w );
161READ8_HANDLER( gaplus_customio_3_r );
162
163/* video */
164extern UINT8 *gaplus_videoram;
165extern UINT8 *gaplus_spriteram;
166READ8_HANDLER( gaplus_videoram_r );
167WRITE8_HANDLER( gaplus_videoram_w );
168WRITE8_HANDLER( gaplus_starfield_control_w );
169VIDEO_START( gaplus );
170PALETTE_INIT( gaplus );
171VIDEO_UPDATE( gaplus );
172VIDEO_EOF( gaplus );   /* update starfields */
173
174
175
176159/***************************************************************************
177160
178161  Custom I/O initialization
src/mame/drivers/carpolo.c
r2844r2845
3939   AM_RANGE(0xa004, 0xa004) AM_READ(carpolo_car_border_collision_cause_r)
4040   AM_RANGE(0xa005, 0xa005) AM_READ(carpolo_car_ball_collision_cause_r)
4141   AM_RANGE(0xa006, 0xa006) AM_READ(carpolo_car_goal_collision_cause_r)
42   AM_RANGE(0xa007, 0xa007) AM_READ(input_port_1_r)
42   AM_RANGE(0xa007, 0xa007) AM_READ_PORT("IN1")
4343   AM_RANGE(0xc000, 0xc000) AM_READ(carpolo_interrupt_cause_r)
4444   AM_RANGE(0xf000, 0xffff) AM_READ(SMH_ROM)
4545ADDRESS_MAP_END
r2844r2845
6868 *************************************/
6969
7070static INPUT_PORTS_START( carpolo )
71   PORT_START   /* IN0 */
71   PORT_START_TAG("IN0")      /* IN0 */
7272   PORT_BIT (0x01, IP_ACTIVE_HIGH, IPT_COIN1 )
7373   PORT_BIT (0x02, IP_ACTIVE_HIGH, IPT_COIN2 )
7474   PORT_BIT (0x04, IP_ACTIVE_HIGH, IPT_COIN3 )
r2844r2845
7777
7878   /* the value read from here is used directly,
7979       the result is calculated by 60/value */
80   PORT_START   /* IN1 */
80   PORT_START_TAG("IN1")      /* IN1 */
8181   PORT_BIT (0x03, IP_ACTIVE_HIGH, IPT_UNUSED )   /* the lowest 2 bits of the counter */
8282   PORT_DIPNAME( 0xfc, 0x3c, "Game Sec/Real Sec" )
8383   PORT_DIPSETTING(   0x00, "0.23 (Longest)" )
r2844r2845
144144   PORT_DIPSETTING(   0x08, "7.50" )
145145   PORT_DIPSETTING(   0x04, "15.00 (Shortest)" )
146146
147   PORT_START   /* IN2 */
147   PORT_START_TAG("DIAL0")      /* IN2 */
148148   PORT_BIT( 0xff, 0x00, IPT_DIAL ) PORT_SENSITIVITY(50) PORT_KEYDELTA(10) PORT_REVERSE PORT_PLAYER(1)
149149
150   PORT_START   /* IN3 */
150   PORT_START_TAG("DIAL1")      /* IN3 */
151151   PORT_BIT( 0xff, 0x00, IPT_DIAL ) PORT_SENSITIVITY(50) PORT_KEYDELTA(10) PORT_REVERSE PORT_PLAYER(2)
152152
153   PORT_START   /* IN4 */
153   PORT_START_TAG("DIAL2")      /* IN4 */
154154   PORT_BIT( 0xff, 0x00, IPT_DIAL ) PORT_SENSITIVITY(50) PORT_KEYDELTA(10) PORT_REVERSE PORT_PLAYER(3)
155155
156   PORT_START   /* IN5 */
156   PORT_START_TAG("DIAL3")      /* IN5 */
157157   PORT_BIT( 0xff, 0x00, IPT_DIAL ) PORT_SENSITIVITY(50) PORT_KEYDELTA(10) PORT_REVERSE PORT_PLAYER(4)
158158
159   PORT_START   /* IN6 - accelerator pedals */
159   PORT_START_TAG("PEDALS")   /* IN6 - accelerator pedals */
160160   PORT_BIT (0x01, IP_ACTIVE_HIGH, IPT_BUTTON1 ) PORT_PLAYER(1)
161161   PORT_BIT (0x02, IP_ACTIVE_HIGH, IPT_BUTTON2 ) PORT_PLAYER(1)
162162   PORT_BIT (0x04, IP_ACTIVE_HIGH, IPT_BUTTON1 ) PORT_PLAYER(2)
r2844r2845
166166   PORT_BIT (0x40, IP_ACTIVE_HIGH, IPT_BUTTON1 ) PORT_PLAYER(4)
167167   PORT_BIT (0x80, IP_ACTIVE_HIGH, IPT_BUTTON2 ) PORT_PLAYER(4)
168168
169   PORT_START   /* IN7 - forward/reverse */
169   PORT_START_TAG("IN2")      /* IN7 - forward/reverse */
170170   PORT_BIT (0x0f, IP_ACTIVE_HIGH, IPT_UNUSED )
171171   PORT_BIT (0x10, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_PLAYER(4)
172172   PORT_BIT (0x20, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_PLAYER(3)
src/mame/drivers/bfm_sc2.c
r2844r2845
647647static READ8_HANDLER( mux_input_r )
648648{
649649   int result = 0xFF,t1,t2;
650   static const char *port[] = { "STROBE0", "STROBE1", "STROBE2", "STROBE3", "STROBE4", "STROBE5", "STROBE6", "STROBE7", "STROBE8", "STROBE9", "STROBE10", "STROBE11" };
650651
651652   if (offset < 8)
652653   {
r2844r2845
654655      t1 = input_override[offset];   // strobe 0-7 data 0-4
655656      t2 = input_override[offset+idx];   // strobe 8-B data 0-4
656657
657      t1 = (sc2_Inputs[offset]   & t1) | ( ( input_port_read_indexed(machine, offset+1)   & ~t1) & 0x1F);
658      t1 = (sc2_Inputs[offset]   & t1) | ( ( input_port_read(machine, port[offset])   & ~t1) & 0x1F);
658659      if (idx == 8)
659         t2 = (sc2_Inputs[offset+8] & t2) | ( ( input_port_read_indexed(machine, offset+1+8) & ~t2) << 5);
660         t2 = (sc2_Inputs[offset+8] & t2) | ( ( input_port_read(machine, port[offset+8]) & ~t2) << 5);
660661      else
661         t2 =  (sc2_Inputs[offset+4] & t2) | ( ( ( input_port_read_indexed(machine, offset+1+4) & ~t2) << 2) & 0x60);
662         t2 =  (sc2_Inputs[offset+4] & t2) | ( ( ( input_port_read(machine, port[offset+4]) & ~t2) << 2) & 0x60);
662663
663664      sc2_Inputs[offset]   = (sc2_Inputs[offset]   & ~0x1F) | t1;
664665      sc2_Inputs[offset+idx] = (sc2_Inputs[offset+idx] & ~0x60) | t2;
r2844r2845
893894
894895static READ8_HANDLER( coin_input_r )
895896{
896   return input_port_read_indexed(machine, 0);
897   return input_port_read(machine, "COINS");
897898}
898899
899900///////////////////////////////////////////////////////////////////////////
src/mame/drivers/suprnova.c
r2844r2845
956956   MDRV_MACHINE_RESET(skns)
957957   MDRV_NVRAM_HANDLER(generic_1fill)
958958
959   MDRV_VIDEO_ATTRIBUTES(VIDEO_BUFFERS_SPRITERAM)
959   MDRV_VIDEO_ATTRIBUTES(VIDEO_ALWAYS_UPDATE)
960960
961961   MDRV_SCREEN_ADD("main", RASTER)
962   MDRV_SCREEN_REFRESH_RATE(60)
962   MDRV_SCREEN_REFRESH_RATE(59.5971) // measured by Guru
963963   MDRV_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(0))
964964   MDRV_SCREEN_FORMAT(BITMAP_FORMAT_RGB32)
965   MDRV_SCREEN_SIZE(64*16,64*16)
965   MDRV_SCREEN_SIZE(320,240)
966966   MDRV_SCREEN_VISIBLE_AREA(0,319,0,239)
967967
968968   MDRV_PALETTE_LENGTH(32768)
src/mame/drivers/seta2.c
r2844r2845
20982098
20992099ROM_START( deerhunt ) /* Deer Hunting USA V4.3 (11/1/2000) - The "E05" breaks version label conventions but is correct & verified */
21002100   ROM_REGION( 0x200000, REGION_CPU1, 0 )      /* TMP68301 Code */
2101   ROM_LOAD16_BYTE( "as0906e05.u06", 0x000000, 0x100000, CRC(20c81f17) SHA1(d41d93d6ee88738cec55f7bf3ce6be1dbec68e09) ) /* CRC16 694E printed on label */
2102   ROM_LOAD16_BYTE( "as0907e05.u07", 0x000001, 0x100000, CRC(1731aa2a) SHA1(cffae7a99a7f960a62ef0c4454884df17a93c1a6) ) /* CRC16 5D89 printed on label */
2101   ROM_LOAD16_BYTE( "as0906e05.u06", 0x000000, 0x100000, CRC(20c81f17) SHA1(d41d93d6ee88738cec55f7bf3ce6be1dbec68e09) ) /* checksum 694E printed on label */
2102   ROM_LOAD16_BYTE( "as0907e05.u07", 0x000001, 0x100000, CRC(1731aa2a) SHA1(cffae7a99a7f960a62ef0c4454884df17a93c1a6) ) /* checksum 5D89 printed on label */
21032103
21042104   ROM_REGION( 0x2000000, REGION_GFX1, ROMREGION_DISPOSE )   /* Sprites */
21052105   ROM_LOAD( "as0901m01.u38", 0x0000000, 0x800000, CRC(1d6acf8f) SHA1(6f61fe21bebb7c87e8e6c3ef3ba73b8cf327dde9) )
r2844r2845
21142114
21152115ROM_START( deerhuna ) /* Deer Hunting USA V4.2 (xx/x/2000) */
21162116   ROM_REGION( 0x200000, REGION_CPU1, 0 )      /* TMP68301 Code */
2117   ROM_LOAD16_BYTE( "as0906e04-v4_2.u06", 0x000000, 0x100000, CRC(bb3af36f) SHA1(f04071347e8ad361bf666fcb6c0136e522f19d47) ) /* CRC16 6640 printed on label */
2118   ROM_LOAD16_BYTE( "as0907e04-v4_2.u07", 0x000001, 0x100000, CRC(83f02117) SHA1(70fc2291bc93af3902aae88688be6a8078f7a07e) ) /* CRC16 595A printed on label */
2117   ROM_LOAD16_BYTE( "as0906e04-v4_2.u06", 0x000000, 0x100000, CRC(bb3af36f) SHA1(f04071347e8ad361bf666fcb6c0136e522f19d47) ) /* checksum 6640 printed on label */
2118   ROM_LOAD16_BYTE( "as0907e04-v4_2.u07", 0x000001, 0x100000, CRC(83f02117) SHA1(70fc2291bc93af3902aae88688be6a8078f7a07e) ) /* checksum 595A printed on label */
21192119
21202120   ROM_REGION( 0x2000000, REGION_GFX1, ROMREGION_DISPOSE )   /* Sprites */
21212121   ROM_LOAD( "as0901m01.u38", 0x0000000, 0x800000, CRC(1d6acf8f) SHA1(6f61fe21bebb7c87e8e6c3ef3ba73b8cf327dde9) )
r2844r2845
21302130
21312131ROM_START( deerhunb ) /* Deer Hunting USA V4.0 (6/15/2000) */
21322132   ROM_REGION( 0x200000, REGION_CPU1, 0 )      /* TMP68301 Code */
2133   ROM_LOAD16_BYTE( "as0906e04.u06", 0x000000, 0x100000, CRC(07d9b64a) SHA1(f9aac644aab920bbac84b14836ee589ccd51f6db) ) /* CRC16 7BBB printed on label */
2134   ROM_LOAD16_BYTE( "as0907e04.u07", 0x000001, 0x100000, CRC(19973d08) SHA1(da1cc02ce480a62ccaf94d0af1246a340f054b43) ) /* CRC16 4C78 printed on label */
2133   ROM_LOAD16_BYTE( "as0906e04.u06", 0x000000, 0x100000, CRC(07d9b64a) SHA1(f9aac644aab920bbac84b14836ee589ccd51f6db) ) /* checksum 7BBB printed on label */
2134   ROM_LOAD16_BYTE( "as0907e04.u07", 0x000001, 0x100000, CRC(19973d08) SHA1(da1cc02ce480a62ccaf94d0af1246a340f054b43) ) /* checksum 4C78 printed on label */
21352135
21362136   ROM_REGION( 0x2000000, REGION_GFX1, ROMREGION_DISPOSE )   /* Sprites */
21372137   ROM_LOAD( "as0901m01.u38", 0x0000000, 0x800000, CRC(1d6acf8f) SHA1(6f61fe21bebb7c87e8e6c3ef3ba73b8cf327dde9) )
r2844r2845
21642164
21652165ROM_START( turkhunt ) /* V1.0 is currently the only known version */
21662166   ROM_REGION( 0x200000, REGION_CPU1, 0 )      /* TMP68301 Code */
2167   ROM_LOAD16_BYTE( "asx906e01.u06", 0x000000, 0x100000, CRC(c96266e1) SHA1(0ca462b3b0f27198e36384eee6ea5c5d4e7e1293) ) /* CRC16 E510 printed on label */
2168   ROM_LOAD16_BYTE( "asx907e01.u07", 0x000001, 0x100000, CRC(7c67b502) SHA1(6a0e8883a115dac4095d86897e7eca2a007a1c71) ) /* CRC16 AB40 printed on label */
2167   ROM_LOAD16_BYTE( "asx906e01.u06", 0x000000, 0x100000, CRC(c96266e1) SHA1(0ca462b3b0f27198e36384eee6ea5c5d4e7e1293) ) /* checksum E510 printed on label */
2168   ROM_LOAD16_BYTE( "asx907e01.u07", 0x000001, 0x100000, CRC(7c67b502) SHA1(6a0e8883a115dac4095d86897e7eca2a007a1c71) ) /* checksum AB40 printed on label */
21692169
21702170   ROM_REGION( 0x2000000, REGION_GFX1, ROMREGION_DISPOSE )   /* Sprites */
21712171   ROM_LOAD( "asx901m01.u38", 0x0000000, 0x800000, CRC(eabd3f44) SHA1(5a1ac986d11a8b019e18761cf4ea0a6f49fbdbfc) )
r2844r2845
21802180
21812181ROM_START( wschamp ) /* V2.0 */
21822182   ROM_REGION( 0x200000, REGION_CPU1, 0 )      /* TMP68301 Code */
2183   ROM_LOAD16_BYTE( "as1006e02.u06", 0x000000, 0x100000, CRC(0ad01677) SHA1(63e09b9f7cc8b781af1756f86caa0cc0962ae584) )
2184   ROM_LOAD16_BYTE( "as1007e02.u07", 0x000001, 0x100000, CRC(572624f0) SHA1(0c2f67daa22f4edd66a2be990dc6cd999faff0fa) )
2183   ROM_LOAD16_BYTE( "as1006e02.u06", 0x000000, 0x100000, CRC(0ad01677) SHA1(63e09b9f7cc8b781af1756f86caa0cc0962ae584) ) /* checksum 421E printed on label */
2184   ROM_LOAD16_BYTE( "as1007e02.u07", 0x000001, 0x100000, CRC(572624f0) SHA1(0c2f67daa22f4edd66a2be990dc6cd999faff0fa) ) /* checksum A48F printed on label */
21852185
21862186   ROM_REGION( 0x2000000, REGION_GFX1, ROMREGION_DISPOSE )   /* Sprites */
21872187   ROM_LOAD( "as1001m01.u38", 0x0000000, 0x800000, CRC(92595579) SHA1(75a7131aedb18b7103677340c3cca7c91aaca2bf) )
src/mame/drivers/zn.c
r2844r2845
412412   psx_dma_install_write_handler
413413};
414414
415static void zn_machine_init( void )
415static void zn_machine_init( running_machine *machine )
416416{
417417   m_n_dip_bit = 0;
418418   m_b_lastclock = 1;
419   psx_machine_init();
419   psx_machine_init(machine);
420420}
421421
422422static MACHINE_DRIVER_START( zn1_1mb_vram )
r2844r2845
652652   memory_set_bankptr( 1, memory_region( REGION_USER2 ) ); /* fixed game rom */
653653   memory_set_bankptr( 2, memory_region( REGION_USER2 ) + 0x400000 ); /* banked game rom */
654654   memory_set_bankptr( 3, memory_region( REGION_USER3 ) ); /* country rom */
655   zn_machine_init();
655   zn_machine_init(machine);
656656}
657657
658658static ADDRESS_MAP_START( qsound_map, ADDRESS_SPACE_PROGRAM, 8 )
r2844r2845
875875   memory_set_bankptr( 1, memory_region( REGION_USER2 ) ); /* fixed game rom */
876876   memory_set_bankptr( 2, memory_region( REGION_USER2 ) + 0x400000 ); /* banked game rom */
877877   memory_set_bankptr( 3, memory_region( REGION_USER3 ) ); /* country rom */
878   zn_machine_init();
878   zn_machine_init(machine);
879879}
880880
881881static MACHINE_DRIVER_START( coh3002c )
r2844r2845
12211221{
12221222   memory_set_bankptr( 1, memory_region( REGION_USER2 ) ); /* banked game rom */
12231223   memory_set_bankptr( 2, taitofx1_eeprom1 );
1224   zn_machine_init();
1224   zn_machine_init(machine);
12251225
12261226   // patch to make psyforce boot
12271227   if ((!strcmp(machine->gamedrv->name, "psyforce")) ||
r2844r2845
13401340   memory_set_bankptr( 1, memory_region( REGION_USER2 ) ); /* banked game rom */
13411341   memory_set_bankptr( 2, taitofx1_eeprom1 );
13421342   memory_set_bankptr( 3, taitofx1_eeprom2 );
1343   zn_machine_init();
1343   zn_machine_init(machine);
13441344}
13451345
13461346static NVRAM_HANDLER( coh1000tb )
r2844r2845
15271527static MACHINE_RESET( coh3002t )
15281528{
15291529   memory_set_bankptr( 1, memory_region( REGION_USER2 ) ); /* GNET boot rom */
1530   zn_machine_init();
1530   zn_machine_init(machine);
15311531}
15321532
15331533static MACHINE_DRIVER_START( coh3002t )
r2844r2845
17051705static MACHINE_RESET( coh1000w )
17061706{
17071707   memory_set_bankptr( 1, memory_region( REGION_USER2 ) ); /* fixed game rom */
1708   zn_machine_init();
1708   zn_machine_init(machine);
17091709
17101710   devtag_reset(machine, IDE_CONTROLLER, "ide");
17111711   psx_dma_install_read_handler(5, atpsx_dma_read);
r2844r2845
18951895static MACHINE_RESET( coh1002e )
18961896{
18971897   memory_set_bankptr( 1, memory_region( REGION_USER2 ) ); /* banked game rom */
1898   zn_machine_init();
1898   zn_machine_init(machine);
18991899}
19001900
19011901static READ16_HANDLER( psarc_ymf_r )
r2844r2845
22312231static MACHINE_RESET( coh1000a )
22322232{
22332233   memory_set_bankptr( 1, memory_region( REGION_USER2 ) ); /* fixed game rom */
2234   zn_machine_init();
2234   zn_machine_init(machine);
22352235   if( ( !strcmp( machine->gamedrv->name, "jdredd" ) ) ||
22362236      ( !strcmp( machine->gamedrv->name, "jdreddb" ) ) )
22372237   {
r2844r2845
23872387static MACHINE_RESET( coh1001l )
23882388{
23892389   memory_set_bankptr( 1, memory_region( REGION_USER2 ) ); /* banked rom */
2390   zn_machine_init();
2390   zn_machine_init(machine);
23912391}
23922392
23932393static MACHINE_DRIVER_START( coh1001l )
r2844r2845
24342434{
24352435   memory_set_bankptr( 1, memory_region( REGION_USER2 ) ); /* fixed game rom */
24362436   memory_set_bankptr( 2, memory_region( REGION_USER3 ) ); /* banked rom */
2437   zn_machine_init();
2437   zn_machine_init(machine);
24382438}
24392439
24402440static INTERRUPT_GEN( coh1002v_vblank )
r2844r2845
26572657static MACHINE_RESET( coh1002m )
26582658{
26592659   memory_set_bankptr( 1, memory_region( REGION_USER2 ) );
2660   zn_machine_init();
2660   zn_machine_init(machine);
26612661}
26622662
26632663static READ8_HANDLER( cbaj_z80_latch_r )
src/mame/drivers/volfied.c
r2844r2845
4444#include "video/taitoic.h"
4545#include "audio/taitosnd.h"
4646#include "sound/2203intf.h"
47#include "includes/cchip.h"
4748
4849WRITE16_HANDLER( volfied_sprite_ctrl_w );
4950WRITE16_HANDLER( volfied_video_ram_w );
5051WRITE16_HANDLER( volfied_video_ctrl_w );
5152WRITE16_HANDLER( volfied_video_mask_w );
5253
53void volfied_cchip_init(void);
54READ16_HANDLER( volfied_cchip_ctrl_r );
55READ16_HANDLER( volfied_cchip_ram_r );
56WRITE16_HANDLER( volfied_cchip_ctrl_w );
57WRITE16_HANDLER( volfied_cchip_bank_w );
58WRITE16_HANDLER( volfied_cchip_ram_w );
59
6054READ16_HANDLER( volfied_video_ram_r );
6155READ16_HANDLER( volfied_video_ctrl_r );
6256
src/mame/drivers/dribling.c
r2844r2845
7777{
7878   /* low value in the given bit selects */
7979   if (!(input_mux & 0x01))
80      return input_port_read_indexed(machine, 0);
80      return input_port_read(machine, "MUX0");
8181   else if (!(input_mux & 0x02))
82      return input_port_read_indexed(machine, 1);
82      return input_port_read(machine, "MUX1");
8383   else if (!(input_mux & 0x04))
84      return input_port_read_indexed(machine, 2);
84      return input_port_read(machine, "MUX2");
8585   return 0xff;
8686}
8787
r2844r2845
250250 *************************************/
251251
252252static INPUT_PORTS_START( dribling )
253   PORT_START   /* IN0 (mux 0) */
253   PORT_START_TAG("MUX0")   /* IN0 (mux 0) */
254254   PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICKRIGHT_LEFT ) PORT_PLAYER(1)
255255   PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICKRIGHT_RIGHT ) PORT_PLAYER(1)
256256   PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICKRIGHT_DOWN ) PORT_PLAYER(1)
r2844r2845
260260   PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_JOYSTICKLEFT_DOWN ) PORT_PLAYER(1)
261261   PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_JOYSTICKLEFT_UP ) PORT_PLAYER(1)
262262
263   PORT_START   /* IN0 (mux 1) */
263   PORT_START_TAG("MUX1")   /* IN0 (mux 1) */
264264   PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICKRIGHT_LEFT ) PORT_PLAYER(2)
265265   PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICKRIGHT_RIGHT ) PORT_PLAYER(2)
266266   PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICKRIGHT_DOWN ) PORT_PLAYER(2)
r2844r2845
270270   PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_JOYSTICKLEFT_DOWN ) PORT_PLAYER(2)
271271   PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_JOYSTICKLEFT_UP ) PORT_PLAYER(2)
272272
273   PORT_START   /* IN0 (mux 2) */
273   PORT_START_TAG("MUX2")   /* IN0 (mux 2) */
274274   PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(1)
275275   PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(1)
276276   PORT_BIT( 0x0c, IP_ACTIVE_LOW, IPT_UNUSED )
r2844r2845
278278   PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(2)
279279   PORT_BIT( 0xc0, IP_ACTIVE_LOW, IPT_UNUSED )
280280
281   PORT_START   /* IN0 */
281   PORT_START_TAG("IN0")   /* IN0 */
282282   PORT_BIT( 0x0f, IP_ACTIVE_LOW, IPT_UNUSED )
283283   PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_COIN1 )
284284   PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_START1 )
src/mame/drivers/balsente.c
r2844r2845
852852                PORT_CODE_DEC(KEYCODE_S) PORT_CODE_DEC(JOYCODE_X_LEFT_SWITCH) PORT_CODE_INC(KEYCODE_F) PORT_CODE_INC(JOYCODE_X_RIGHT_SWITCH) PORT_RESET PORT_PLAYER(2)
853853
854854   /* extra ports for shooters */
855   PORT_START /* fake analog X */
855   PORT_START_TAG("FAKEX") /* fake analog X */
856856   PORT_BIT( 0xff, 0x80, IPT_LIGHTGUN_X ) PORT_CROSSHAIR(X, 1.0, 0.0, 0) PORT_SENSITIVITY(50) PORT_KEYDELTA(10)
857857
858   PORT_START /* fake analog Y */
858   PORT_START_TAG("FAKEY") /* fake analog Y */
859859   PORT_BIT( 0xff, 0x80, IPT_LIGHTGUN_Y ) PORT_CROSSHAIR(Y, 1.0, 0.0, 0) PORT_SENSITIVITY(70) PORT_KEYDELTA(10)
860860INPUT_PORTS_END
861861
src/mame/drivers/itgambl2.c
r2844r2845
6060*     Video Hardware     *
6161*************************/
6262
63VIDEO_START( itgambl2 )
63static VIDEO_START( itgambl2 )
6464{
6565}
6666
6767
68VIDEO_UPDATE( itgambl2 )
68static VIDEO_UPDATE( itgambl2 )
6969{
7070   return 0;
7171}
r2844r2845
169169*      Machine Reset      *
170170**************************/
171171
172MACHINE_RESET( itgambl2 )
172static MACHINE_RESET( itgambl2 )
173173{
174174   /* stop the CPU, we have no code for it anyway */
175175   cpunum_set_input_line(machine, 0, INPUT_LINE_HALT, ASSERT_LINE);
r2844r2845
222222*        Rom Load        *
223223*************************/
224224
225/* Laser 2001 (Ver 1.2)
225/* NtCash
226226
227227CPU:
228228
r2844r2845
250250
251251*/
252252
253ROM_START( laser2k1 )
253ROM_START( ntcash )
254254   ROM_REGION( 0x1000000, REGION_CPU1, 0 ) /* all the program code is in here */
255   ROM_LOAD( "laser2k1_ver1.2_hd64f3337cp16.mcu", 0x00000, 0x4000, NO_DUMP )
255   ROM_LOAD( "ntcash_hd64f3337cp16.mcu", 0x00000, 0x4000, NO_DUMP )
256256
257257   ROM_REGION( 0x200000, REGION_GFX1, 0 )
258   ROM_LOAD( "xlep1.bin", 0x000000, 0x80000, CRC(b45c9491) SHA1(1fa0572d3efb847dcf49bb99f429322dcb72b0d1) )
259   ROM_LOAD( "xlep2.bin", 0x080000, 0x80000, CRC(75c82293) SHA1(e6d847a2259393ef8877e9237c7624bf2e36f197) )
260   ROM_LOAD( "xlep3.bin", 0x100000, 0x80000, CRC(3a45d626) SHA1(c804916b6bfe04bacd7ac6f32e5041ed65e7b91e) )
261   ROM_LOAD( "xlep4.bin", 0x180000, 0x80000, CRC(d0381819) SHA1(30bab7e1c68192a2e1c324ef4c8a3d3b5696eb2b) )
258   ROM_LOAD( "ntcashep1.bin", 0x000000, 0x80000, CRC(f1e8b74d) SHA1(b84e36ab101d6b5b1f60d9778bd8e5d89b3d437d) )
259   ROM_LOAD( "ntcashep2.bin", 0x080000, 0x80000, CRC(b51513c8) SHA1(27b6469daecb92d8a8ed6e9ab317d20f49dd6475) )
260   ROM_LOAD( "ntcashep3.bin", 0x100000, 0x80000, CRC(ba46f1b2) SHA1(61f5b2f1732bbdb2bd21835d2c6e2890c1f0fc8c) )
261   ROM_LOAD( "ntcashep4.bin", 0x180000, 0x80000, CRC(1e42142d) SHA1(82444584b1d61ff0a34d7767f70cab995d26e1e1) )
262262
263263   ROM_REGION( 0x20000, REGION_SOUND1, 0 ) /* NEC D7759GC samples */
264   ROM_LOAD( "xlmsg0.bin", 0x00000, 0x20000, CRC(36287068) SHA1(d964837cb5370c7b878e1e531ef6d8c3840f776c) )
264   ROM_LOAD( "ntcashmsg0.bin", 0x00000, 0x20000, CRC(e3022f30) SHA1(859bdf0ce871c0b39224dc93b8005a5e0a5552b1) )
265265ROM_END
266266
267267
268/* Magic Drink (Ver 1.2)
268/* Wizard (Ver 1.0)
269269
270270CPU:
271271
r2844r2845
278278
279279ROMs:
280280
2811x 27C2000 (s)
2823x M27C4001 (1, 2, 3)
2811x M27C1001 (0)
2824x M27C4001 (1, 2, 3, 4)
283283
284284Note:
285285
r2844r2845
2882881x 14 legs isp connector
2892891x battery
2902901x red led
2912x 8x2 switches dip
2912x 8x2 DIP switches
2922922x trimmer
293293
294294*/
295295
296ROM_START( mdrink )
296ROM_START( wizard )
297297   ROM_REGION( 0x1000000, REGION_CPU1, 0 ) /* all the program code is in here */
298   ROM_LOAD( "mdrink_ver1.2_hd64f3337cp16.mcu", 0x00000, 0x4000, NO_DUMP )
298   ROM_LOAD( "wizard_ver1.2_hd64f3337cp16.mcu", 0x00000, 0x4000, NO_DUMP )
299299
300   ROM_REGION( 0x180000, REGION_GFX1, 0 ) /* only 3 ROMs?? */
301   ROM_LOAD( "mdrink-1.bin", 0x000000, 0x80000, CRC(25a7cea9) SHA1(d67a7264501699c8f7a48c3f3956903a5c95898f) )
302   ROM_LOAD( "mdrink-2.bin", 0x080000, 0x80000, CRC(c2a14bca) SHA1(8d0095333c34d81d103f15ee5731e2e4aa4d1fac) )
303   ROM_LOAD( "mdrink-3.bin", 0x100000, 0x80000, CRC(ff593676) SHA1(b21bb85df0b7b79c07ded2c4b950c94719e08302) )
300   ROM_REGION( 0x200000, REGION_GFX1, 0 )
301   ROM_LOAD( "wizardep1.bin", 0x000000, 0x80000, CRC(a99af86f) SHA1(4bf32df74e93a6b40cf8213e99ec6ef538d9802d) )
302   ROM_LOAD( "wizardep2.bin", 0x080000, 0x80000, CRC(bc52566d) SHA1(ecd4f3852c3ba8981316686042dfc2c0013f139f) )
303   ROM_LOAD( "wizardep3.bin", 0x100000, 0x80000, CRC(98e1905a) SHA1(805df94fef011b48d5eb2abbd294b7cd338d7124) )
304   ROM_LOAD( "wizardep4.bin", 0x180000, 0x80000, CRC(f129916a) SHA1(c1c0fcb04622dde196299c2e88a807b2aa00bf5e) )
304305
305   ROM_REGION( 0x40000, REGION_SOUND1, 0 ) /* NEC D7759GC samples */
306   ROM_LOAD( "mdrink-s.bin", 0x00000, 0x40000, CRC(d78b7823) SHA1(ca01e4aa3e25c3a40517b4fe07c31915e79af650) )
306   ROM_REGION( 0x20000, REGION_SOUND1, 0 ) /* NEC D7759GC samples */
307   ROM_LOAD( "wizardmsg0.bin", 0x00000, 0x20000, CRC(94b28a4b) SHA1(2c10462cd7c8dc79dba735a061841a9c8b423091) )
307308ROM_END
308309
309310
310/* NtCash
311/* Laser 2001 (Ver 1.2)
311312
312313CPU:
313314
r2844r2845
335336
336337*/
337338
338ROM_START( ntcash )
339ROM_START( laser2k1 )
339340   ROM_REGION( 0x1000000, REGION_CPU1, 0 ) /* all the program code is in here */
340   ROM_LOAD( "ntcash_hd64f3337cp16.mcu", 0x00000, 0x4000, NO_DUMP )
341   ROM_LOAD( "laser2k1_ver1.2_hd64f3337cp16.mcu", 0x00000, 0x4000, NO_DUMP )
341342
342343   ROM_REGION( 0x200000, REGION_GFX1, 0 )
343   ROM_LOAD( "ntcashep1.bin", 0x000000, 0x80000, CRC(f1e8b74d) SHA1(b84e36ab101d6b5b1f60d9778bd8e5d89b3d437d) )
344   ROM_LOAD( "ntcashep2.bin", 0x080000, 0x80000, CRC(b51513c8) SHA1(27b6469daecb92d8a8ed6e9ab317d20f49dd6475) )
345   ROM_LOAD( "ntcashep3.bin", 0x100000, 0x80000, CRC(ba46f1b2) SHA1(61f5b2f1732bbdb2bd21835d2c6e2890c1f0fc8c) )
346   ROM_LOAD( "ntcashep4.bin", 0x180000, 0x80000, CRC(1e42142d) SHA1(82444584b1d61ff0a34d7767f70cab995d26e1e1) )
344   ROM_LOAD( "xlep1.bin", 0x000000, 0x80000, CRC(b45c9491) SHA1(1fa0572d3efb847dcf49bb99f429322dcb72b0d1) )
345   ROM_LOAD( "xlep2.bin", 0x080000, 0x80000, CRC(75c82293) SHA1(e6d847a2259393ef8877e9237c7624bf2e36f197) )
346   ROM_LOAD( "xlep3.bin", 0x100000, 0x80000, CRC(3a45d626) SHA1(c804916b6bfe04bacd7ac6f32e5041ed65e7b91e) )
347   ROM_LOAD( "xlep4.bin", 0x180000, 0x80000, CRC(d0381819) SHA1(30bab7e1c68192a2e1c324ef4c8a3d3b5696eb2b) )
347348
348349   ROM_REGION( 0x20000, REGION_SOUND1, 0 ) /* NEC D7759GC samples */
349   ROM_LOAD( "ntcashmsg0.bin", 0x00000, 0x20000, CRC(e3022f30) SHA1(859bdf0ce871c0b39224dc93b8005a5e0a5552b1) )
350   ROM_LOAD( "xlmsg0.bin", 0x00000, 0x20000, CRC(36287068) SHA1(d964837cb5370c7b878e1e531ef6d8c3840f776c) )
350351ROM_END
351352
352353
353/* Wizard (Ver 1.0)
354/* Magic Drink (Ver 1.2)
354355
355356CPU:
356357
r2844r2845
363364
364365ROMs:
365366
3661x M27C1001 (0)
3674x M27C4001 (1, 2, 3, 4)
3671x 27C2000 (s)
3683x M27C4001 (1, 2, 3)
368369
369370Note:
370371
r2844r2845
3733741x 14 legs isp connector
3743751x battery
3753761x red led
3762x 8x2 DIP switches
3772x 8x2 switches dip
3773782x trimmer
378379
379380*/
380381
381ROM_START( wizard )
382ROM_START( mdrink )
382383   ROM_REGION( 0x1000000, REGION_CPU1, 0 ) /* all the program code is in here */
383   ROM_LOAD( "wizard_ver1.2_hd64f3337cp16.mcu", 0x00000, 0x4000, NO_DUMP )
384   ROM_LOAD( "mdrink_ver1.2_hd64f3337cp16.mcu", 0x00000, 0x4000, NO_DUMP )
384385
385   ROM_REGION( 0x200000, REGION_GFX1, 0 )
386   ROM_LOAD( "wizardep1.bin", 0x000000, 0x80000, CRC(a99af86f) SHA1(4bf32df74e93a6b40cf8213e99ec6ef538d9802d) )
387   ROM_LOAD( "wizardep2.bin", 0x080000, 0x80000, CRC(bc52566d) SHA1(ecd4f3852c3ba8981316686042dfc2c0013f139f) )
388   ROM_LOAD( "wizardep3.bin", 0x100000, 0x80000, CRC(98e1905a) SHA1(805df94fef011b48d5eb2abbd294b7cd338d7124) )
389   ROM_LOAD( "wizardep4.bin", 0x180000, 0x80000, CRC(f129916a) SHA1(c1c0fcb04622dde196299c2e88a807b2aa00bf5e) )
386   ROM_REGION( 0x180000, REGION_GFX1, 0 ) /* only 3 ROMs?? */
387   ROM_LOAD( "mdrink-1.bin", 0x000000, 0x80000, CRC(25a7cea9) SHA1(d67a7264501699c8f7a48c3f3956903a5c95898f) )
388   ROM_LOAD( "mdrink-2.bin", 0x080000, 0x80000, CRC(c2a14bca) SHA1(8d0095333c34d81d103f15ee5731e2e4aa4d1fac) )
389   ROM_LOAD( "mdrink-3.bin", 0x100000, 0x80000, CRC(ff593676) SHA1(b21bb85df0b7b79c07ded2c4b950c94719e08302) )
390390
391   ROM_REGION( 0x20000, REGION_SOUND1, 0 ) /* NEC D7759GC samples */
392   ROM_LOAD( "wizardmsg0.bin", 0x00000, 0x20000, CRC(94b28a4b) SHA1(2c10462cd7c8dc79dba735a061841a9c8b423091) )
391   ROM_REGION( 0x40000, REGION_SOUND1, 0 ) /* NEC D7759GC samples */
392   ROM_LOAD( "mdrink-s.bin", 0x00000, 0x40000, CRC(d78b7823) SHA1(ca01e4aa3e25c3a40517b4fe07c31915e79af650) )
393393ROM_END
394394
395395
r2844r2845
645645*************************/
646646
647647/*    YEAR  NAME      PARENT  MACHINE   INPUT     INIT ROT    COMPANY    FULLNAME                          FLAGS  */
648GAME( 1999, ntcash,   0,      itgambl2, itgambl2, 0,   ROT0, "Unknown", "NtCash",                          GAME_NOT_WORKING )
649GAME( 1999, wizard,   0,      itgambl2, itgambl2, 0,   ROT0, "A.A.",    "Wizard (Ver 1.0)",                GAME_NOT_WORKING )
648650GAME( 2001, laser2k1, 0,      itgambl2, itgambl2, 0,   ROT0, "Unknown", "Laser 2001 (Ver 1.2)",            GAME_NOT_WORKING )
649651GAME( 2001, mdrink,   0,      itgambl2, itgambl2, 0,   ROT0, "Unknown", "Magic Drink (Ver 1.2)",           GAME_NOT_WORKING )
650GAME( 2001, ntcash,   0,      itgambl2, itgambl2, 0,   ROT0, "Unknown", "NtCash",                          GAME_NOT_WORKING )
651GAME( 2001, wizard,   0,      itgambl2, itgambl2, 0,   ROT0, "Unknown", "Wizard (Ver 1.0)",                GAME_NOT_WORKING )
652652GAME( 2001, te0144,   0,      itgambl2, itgambl2, 0,   ROT0, "Unknown", "Unknown italian gambling game",   GAME_NOT_WORKING )
653653GAME( 200?, cmagica,  0,      itgambl2, itgambl2, 0,   ROT0, "Unknown", "Carta Magica (Ver 1.8)",          GAME_NOT_WORKING )
654654GAME( 200?, millsun,  0,      itgambl2, itgambl2, 0,   ROT0, "Unknown", "Millennium Sun",                  GAME_NOT_WORKING )
src/mame/drivers/mexico86.c
r2844r2845
4949#include "cpu/z80/z80.h"
5050#include "cpu/m6805/m6805.h"
5151#include "sound/2203intf.h"
52#include "includes/mexico86.h"
5253
53/* in machine/mexico86.c */
54extern UINT8 *mexico86_protection_ram;
55WRITE8_HANDLER( mexico86_f008_w );
56INTERRUPT_GEN( kikikai_interrupt );
57INTERRUPT_GEN( mexico86_m68705_interrupt );
58READ8_HANDLER( mexico86_68705_portA_r );
59WRITE8_HANDLER( mexico86_68705_portA_w );
60WRITE8_HANDLER( mexico86_68705_ddrA_w );
61READ8_HANDLER( mexico86_68705_portB_r );
62WRITE8_HANDLER( mexico86_68705_portB_w );
63WRITE8_HANDLER( mexico86_68705_ddrB_w );
64
65/* in video/mexico86.c */
66extern UINT8 *mexico86_videoram,*mexico86_objectram;
67extern size_t mexico86_objectram_size;
68WRITE8_HANDLER( mexico86_bankswitch_w );
69VIDEO_UPDATE( mexico86 );
70VIDEO_UPDATE( kikikai );
71
7254//AT
7355static READ8_HANDLER( kiki_2203_r )
7456{
src/mame/drivers/megadriv.h
r2844r2845
2525extern READ8_HANDLER (megatech_sms_ioport_dc_r);
2626extern READ8_HANDLER (megatech_sms_ioport_dd_r);
2727
28
28MACHINE_RESET( megadriv );
29VIDEO_START( megadriv );
30VIDEO_UPDATE( megadriv );
31VIDEO_EOF( megadriv );
src/mame/drivers/chaknpop.c
r2844r2845
77
88#include "driver.h"
99#include "sound/ay8910.h"
10#include "includes/chaknpop.h"
1011
11/* machine/chaknpop.c */
12extern UINT8 *chaknpop_ram;
13DRIVER_INIT( chaknpop );
14MACHINE_RESET( chaknpop );
15READ8_HANDLER( chaknpop_mcu_portA_r );
16READ8_HANDLER( chaknpop_mcu_portB_r );
17READ8_HANDLER( chaknpop_mcu_portC_r );
18WRITE8_HANDLER( chaknpop_mcu_portA_w );
19WRITE8_HANDLER( chaknpop_mcu_portB_w );
20WRITE8_HANDLER( chaknpop_mcu_portC_w );
2112
22
23/* video/chaknpop.c */
24extern UINT8 *chaknpop_txram;
25extern UINT8 *chaknpop_sprram;
26extern size_t chaknpop_sprram_size;
27extern UINT8 *chaknpop_attrram;
28
29
30PALETTE_INIT( chaknpop );
31VIDEO_START( chaknpop );
32VIDEO_UPDATE( chaknpop );
33
34READ8_HANDLER( chaknpop_gfxmode_r );
35WRITE8_HANDLER( chaknpop_gfxmode_w );
36
37WRITE8_HANDLER( chaknpop_txram_w );
38
39WRITE8_HANDLER( chaknpop_attrram_w );
40
41
4213/***************************************************************************
4314
4415  Memory Handler(s)
src/mame/drivers/lkage.c
r2844r2845
3030#include "cpu/z80/z80.h"
3131#include "cpu/m6805/m6805.h"
3232#include "sound/2203intf.h"
33#include "includes/lkage.h"
3334
3435
35extern UINT8 *lkage_scroll, *lkage_vreg;
36WRITE8_HANDLER( lkage_videoram_w );
37VIDEO_START( lkage );
38VIDEO_UPDATE( lkage );
39
40READ8_HANDLER( lkage_68705_portA_r );
41WRITE8_HANDLER( lkage_68705_portA_w );
42READ8_HANDLER( lkage_68705_portB_r );
43WRITE8_HANDLER( lkage_68705_portB_w );
44READ8_HANDLER( lkage_68705_portC_r );
45WRITE8_HANDLER( lkage_68705_portC_w );
46WRITE8_HANDLER( lkage_68705_ddrA_w );
47WRITE8_HANDLER( lkage_68705_ddrB_w );
48WRITE8_HANDLER( lkage_68705_ddrC_w );
49WRITE8_HANDLER( lkage_mcu_w );
50READ8_HANDLER( lkage_mcu_r );
51READ8_HANDLER( lkage_mcu_status_r );
52
53
5436static int sound_nmi_enable,pending_nmi;
5537
5638static TIMER_CALLBACK( nmi_callback )
src/mame/drivers/aleck64.c
r2844r2845
175175{
176176   if (offset == 0)
177177   {
178      return (input_port_read_indexed(machine, 3));
178      return (input_port_read(machine, "IN0"));   /* mtetrisc has regular inputs here */
179179   }
180180   else if (offset == 1)
181181   {
182      return (input_port_read_indexed(machine, 4));
182      return (input_port_read(machine, "IN1"));
183183   }
184184
185185   return 0;
r2844r2845
235235   PORT_START_TAG("P1_ANALOG_Y")
236236      PORT_BIT( 0xff, 0x80, IPT_AD_STICK_Y ) PORT_MINMAX(0xff,0x00) PORT_SENSITIVITY(30) PORT_KEYDELTA(30) PORT_PLAYER(1)
237237
238   PORT_START
238   PORT_START_TAG("IN0")
239239      PORT_DIPNAME( 0x80000000, 0x80000000, "DIPSW1 #8" )
240240      PORT_DIPSETTING( 0x80000000, DEF_STR( Off ) )
241241      PORT_DIPSETTING( 0x00000000, DEF_STR( On ) )
r2844r2845
286286      PORT_DIPSETTING( 0x00000000, DEF_STR( On ) )
287287      PORT_BIT(0x0000ffff, IP_ACTIVE_LOW, IPT_UNUSED )
288288
289   PORT_START
289   PORT_START_TAG("IN1")
290290      PORT_BIT( 0xff00ffff, IP_ACTIVE_LOW, IPT_UNUSED )
291291      PORT_SERVICE_NO_TOGGLE( 0x00200000, IP_ACTIVE_LOW )
292292      PORT_BIT( 0x00100000, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_NAME("Service Button") PORT_CODE(KEYCODE_7)
r2844r2845
300300   PORT_START_TAG("P1_ANALOG_X")
301301   PORT_START_TAG("P1_ANALOG_Y")
302302
303   PORT_START
303   PORT_START_TAG("IN0")
304304      PORT_BIT( 0xffff0000, IP_ACTIVE_LOW, IPT_UNUSED )
305305      PORT_BIT( 0x00008000, IP_ACTIVE_LOW, IPT_START2 )
306306      PORT_BIT( 0x00004000, IP_ACTIVE_LOW, IPT_UNUSED )
r2844r2845
319319      PORT_BIT( 0x00000002, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_PLAYER(1)
320320      PORT_BIT( 0x00000001, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_PLAYER(1)
321321
322   PORT_START
322   PORT_START_TAG("IN1")
323323      PORT_BIT( 0xffcc, IP_ACTIVE_LOW, IPT_UNUSED )
324324      PORT_SERVICE_NO_TOGGLE( 0x0020, IP_ACTIVE_LOW )
325325      PORT_BIT( 0x0010, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_NAME("Service Button") PORT_CODE(KEYCODE_7)
r2844r2845
352352   PORT_START_TAG("P1_ANALOG_Y")
353353      PORT_BIT( 0xff, 0x80, IPT_AD_STICK_Y ) PORT_MINMAX(0xff,0x00) PORT_SENSITIVITY(30) PORT_KEYDELTA(30) PORT_PLAYER(1)
354354
355   PORT_START
355   PORT_START_TAG("IN0")
356356      PORT_DIPNAME( 0x80000000, 0x00000000, DEF_STR(Joystick) )   // DIPSW1 #8
357357      PORT_DIPSETTING( 0x00000000, DEF_STR(Joystick) )
358358      PORT_DIPSETTING( 0x80000000, "3D" )
r2844r2845
399399      PORT_DIPSETTING( 0x00000000, "Hard2" )
400400      PORT_BIT(0x0000ffff, IP_ACTIVE_LOW, IPT_UNUSED )
401401
402   PORT_START
402   PORT_START_TAG("IN1")
403403      PORT_BIT( 0xff00ffff, IP_ACTIVE_LOW, IPT_UNUSED )
404404      PORT_SERVICE_NO_TOGGLE( 0x00200000, IP_ACTIVE_LOW )
405405      PORT_BIT( 0x00100000, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_NAME("Service Button") PORT_CODE(KEYCODE_7)
src/mame/drivers/fastfred.c
r2844r2845
857857   ROM_LOAD( "imago.97", 0x0200, 0x0100, CRC(e28a7f00) SHA1(05b4882c5ea5da332735866d858872bc5eeaca24) )
858858ROM_END
859859
860extern int fastfred_hardware_type;
861
862860static DRIVER_INIT( flyboy )
863861{
864862   memory_install_read8_handler(machine, 0, ADDRESS_SPACE_PROGRAM, 0xc085, 0xc099, 0, 0, flyboy_custom1_io_r);
src/mame/drivers/punchout.c
r2844r2845
11/***************************************************************************
22
3Punch Out memory map (preliminary)
3Punch Out / Super Punch Out / Arm Wrestling
4
45Arm Wrestling runs on about the same hardware, but the video board is different.
5 The most significant changes are that Punchout has a larger bottom tilemap,
6 with scrolling, while Arm Wrestling has an additional FG tilemap displayed on
7 the bottom screen.
6The most significant changes are that Punchout has a larger bottom tilemap,
7with scrolling, while Arm Wrestling has an additional FG tilemap displayed on
8the bottom screen.
89
9- money bag placement might not be 100% correct in Arm Wrestingly, however,
10- money bag placement might not be 100% correct in Arm Wrestingl, however
1011  the more serious part of armwrest35b9yel (unplayable bonus round after rounds
1112  5 and 9) is now fixed.
1213
r2844r2845
110111
111112#include "rendlay.h"
112113
113extern UINT8 *punchout_topTilemap_ram;
114extern UINT8 *punchout_botTilemap_ram;
115extern UINT8 *punchout_botTilemap_scroll_ram;
116extern UINT8 *armwrest_fgTilemap_ram;
117extern UINT8 *punchout_bigsprite1ram;
118extern UINT8 *punchout_bigsprite2ram;
119extern UINT8 *punchout_bigsprite1;
120extern UINT8 *punchout_bigsprite2;
114extern UINT8 *punchout_bg_top_videoram;
115extern UINT8 *punchout_bg_bot_videoram;
116extern UINT8 *armwrest_fg_videoram;
117extern UINT8 *punchout_spr1_videoram;
118extern UINT8 *punchout_spr2_videoram;
119extern UINT8 *punchout_spr1_ctrlram;
120extern UINT8 *punchout_spr2_ctrlram;
121121extern UINT8 *punchout_palettebank;
122WRITE8_HANDLER( punchout_topTilemap_ram_w );
123WRITE8_HANDLER( punchout_botTilemap_ram_w );
124WRITE8_HANDLER( armwrest_fgTilemap_ram_w );
125WRITE8_HANDLER( punchout_bigsprite1ram_w );
126WRITE8_HANDLER( punchout_bigsprite2ram_w );
127WRITE8_HANDLER( punchout_palettebank_w );
122WRITE8_HANDLER( punchout_bg_top_videoram_w );
123WRITE8_HANDLER( punchout_bg_bot_videoram_w );
124WRITE8_HANDLER( armwrest_fg_videoram_w );
125WRITE8_HANDLER( punchout_spr1_videoram_w );
126WRITE8_HANDLER( punchout_spr2_videoram_w );
128127VIDEO_START( punchout );
129128VIDEO_START( armwrest );
130PALETTE_INIT( punchout );
131PALETTE_INIT( armwrest );
132129VIDEO_UPDATE( punchout );
133130VIDEO_UPDATE( armwrest );
134131
r2844r2845
402399   AM_RANGE(0x0000, 0xbfff) AM_ROM
403400   AM_RANGE(0xc000, 0xc3ff) AM_RAM AM_BASE(&generic_nvram) AM_SIZE(&generic_nvram_size)
404401   AM_RANGE(0xd000, 0xd7ff) AM_RAM
405   AM_RANGE(0xdff0, 0xdff7) AM_RAM AM_BASE(&punchout_bigsprite1)
406   AM_RANGE(0xdff8, 0xdffc) AM_RAM AM_BASE(&punchout_bigsprite2)
407   AM_RANGE(0xdffd, 0xdffd) AM_RAM_WRITE(punchout_palettebank_w) AM_BASE(&punchout_palettebank)
408   AM_RANGE(0xd800, 0xdfff) AM_RAM_WRITE(punchout_topTilemap_ram_w) AM_BASE(&punchout_topTilemap_ram)
409   AM_RANGE(0xe000, 0xe7ff) AM_RAM_WRITE(punchout_bigsprite1ram_w) AM_BASE(&punchout_bigsprite1ram)
410   AM_RANGE(0xe800, 0xefff) AM_RAM_WRITE(punchout_bigsprite2ram_w) AM_BASE(&punchout_bigsprite2ram)
411   AM_RANGE(0xf000, 0xf03f) AM_RAM AM_BASE(&punchout_botTilemap_scroll_ram)
412   AM_RANGE(0xf000, 0xffff) AM_RAM_WRITE(punchout_botTilemap_ram_w) AM_BASE(&punchout_botTilemap_ram)
402   AM_RANGE(0xdff0, 0xdff7) AM_RAM AM_BASE(&punchout_spr1_ctrlram)
403   AM_RANGE(0xdff8, 0xdffc) AM_RAM AM_BASE(&punchout_spr2_ctrlram)
404   AM_RANGE(0xdffd, 0xdffd) AM_RAM AM_BASE(&punchout_palettebank)
405   AM_RANGE(0xd800, 0xdfff) AM_RAM_WRITE(punchout_bg_top_videoram_w) AM_BASE(&punchout_bg_top_videoram)
406   AM_RANGE(0xe000, 0xe7ff) AM_RAM_WRITE(punchout_spr1_videoram_w) AM_BASE(&punchout_spr1_videoram)
407   AM_RANGE(0xe800, 0xefff) AM_RAM_WRITE(punchout_spr2_videoram_w) AM_BASE(&punchout_spr2_videoram)
408   AM_RANGE(0xf000, 0xffff) AM_RAM_WRITE(punchout_bg_bot_videoram_w) AM_BASE(&punchout_bg_bot_videoram)   // also contains scroll RAM
413409ADDRESS_MAP_END
414410
415411
r2844r2845
417413   AM_RANGE(0x0000, 0xbfff) AM_ROM
418414   AM_RANGE(0xc000, 0xc3ff) AM_RAM AM_BASE(&generic_nvram) AM_SIZE(&generic_nvram_size)
419415   AM_RANGE(0xd000, 0xd7ff) AM_RAM
420   AM_RANGE(0xdff0, 0xdff7) AM_RAM AM_BASE(&punchout_bigsprite1)
421   AM_RANGE(0xdff8, 0xdffc) AM_RAM AM_BASE(&punchout_bigsprite2)
422   AM_RANGE(0xdffd, 0xdffd) AM_RAM_WRITE(punchout_palettebank_w) AM_BASE(&punchout_palettebank)
423   AM_RANGE(0xd800, 0xdfff) AM_RAM_WRITE(armwrest_fgTilemap_ram_w) AM_BASE(&armwrest_fgTilemap_ram)
424   AM_RANGE(0xe000, 0xe7ff) AM_RAM_WRITE(punchout_bigsprite1ram_w) AM_BASE(&punchout_bigsprite1ram)
425   AM_RANGE(0xe800, 0xefff) AM_RAM_WRITE(punchout_bigsprite2ram_w) AM_BASE(&punchout_bigsprite2ram)
426   AM_RANGE(0xf000, 0xf7ff) AM_RAM_WRITE(punchout_botTilemap_ram_w) AM_BASE(&punchout_botTilemap_ram)
427   AM_RANGE(0xf800, 0xffff) AM_RAM_WRITE(punchout_topTilemap_ram_w) AM_BASE(&punchout_topTilemap_ram)
416   AM_RANGE(0xdff0, 0xdff7) AM_RAM AM_BASE(&punchout_spr1_ctrlram)
417   AM_RANGE(0xdff8, 0xdffc) AM_RAM AM_BASE(&punchout_spr2_ctrlram)
418   AM_RANGE(0xdffd, 0xdffd) AM_RAM AM_BASE(&punchout_palettebank)
419   AM_RANGE(0xd800, 0xdfff) AM_RAM_WRITE(armwrest_fg_videoram_w) AM_BASE(&armwrest_fg_videoram)
420   AM_RANGE(0xe000, 0xe7ff) AM_RAM_WRITE(punchout_spr1_videoram_w) AM_BASE(&punchout_spr1_videoram)
421   AM_RANGE(0xe800, 0xefff) AM_RAM_WRITE(punchout_spr2_videoram_w) AM_BASE(&punchout_spr2_videoram)
422   AM_RANGE(0xf000, 0xf7ff) AM_RAM_WRITE(punchout_bg_bot_videoram_w) AM_BASE(&punchout_bg_bot_videoram)
423   AM_RANGE(0xf800, 0xffff) AM_RAM_WRITE(punchout_bg_top_videoram_w) AM_BASE(&punchout_bg_top_videoram)
428424ADDRESS_MAP_END
429425
430426
r2844r2845
649645INPUT_PORTS_END
650646
651647
652static const gfx_layout charlayout =
648static const gfx_layout charlayout_2bpp =
653649{
654   8,8,   /* 8*8 characters */
655   1024,   /* 1024 characters */
656   2,   /* 2 bits per pixel */
657   { 1024*8*8, 0 },   /* the bitplanes are separated */
650   8,8,
651   RGN_FRAC(1,2),
652   2,
653   { RGN_FRAC(1,2), 0 },
658654   { 0, 1, 2, 3, 4, 5, 6, 7 },
659655   { 0*8, 1*8, 2*8, 3*8, 4*8, 5*8, 6*8, 7*8 },
660   8*8   /* every char takes 8 consecutive bytes */
656   8*8
661657};
662658
663static const gfx_layout armwrest_charlayout =
659static const gfx_layout charlayout_3bpp =
664660{
665   8,8,   /* 8*8 characters */
666   2048,   /* 2048 characters */
667   2,   /* 2 bits per pixel */
668   { 2048*8*8, 0 },   /* the bitplanes are separated */
661   8,8,
662   RGN_FRAC(1,3),
663   3,
664   { RGN_FRAC(2,3), RGN_FRAC(1,3), 0 },
669665   { 0, 1, 2, 3, 4, 5, 6, 7 },
670666   { 0*8, 1*8, 2*8, 3*8, 4*8, 5*8, 6*8, 7*8 },
671   8*8   /* every char takes 8 consecutive bytes */
667   8*8
672668};
673669
674static const gfx_layout armwrest_charlayout2 =
675{
676   8,8,   /* 8*8 characters */
677   2048,   /* 2048 characters */
678   3,   /* 3 bits per pixel */
679   { 2*2048*8*8, 2048*8*8, 0 },   /* the bitplanes are separated */
680   { 0, 1, 2, 3, 4, 5, 6, 7 },
681   { 0*8, 1*8, 2*8, 3*8, 4*8, 5*8, 6*8, 7*8 },
682   8*8   /* every char takes 8 consecutive bytes */
683};
684
685static const gfx_layout charlayout1 =
686{
687   8,8,   /* 8*8 characters */
688   8192,   /* 8192 characters */
689   3,   /* 3 bits per pixel */
690   { 2*8192*8*8, 8192*8*8, 0 },   /* the bitplanes are separated */
691   { 0, 1, 2, 3, 4, 5, 6, 7 },
692   { 0*8, 1*8, 2*8, 3*8, 4*8, 5*8, 6*8, 7*8 },
693   8*8   /* every char takes 8 consecutive bytes */
694};
695
696static const gfx_layout charlayout2 =
697{
698   8,8,   /* 8*8 characters */
699   4096,   /* 4096 characters */
700   2,   /* 2 bits per pixel */
701   { 4096*8*8, 0 },   /* the bitplanes are separated */
702   { 0, 1, 2, 3, 4, 5, 6, 7 },
703   { 0*8, 1*8, 2*8, 3*8, 4*8, 5*8, 6*8, 7*8 },
704   8*8   /* every char takes 8 consecutive bytes */
705};
706
707670static GFXDECODE_START( punchout )
708   GFXDECODE_ENTRY( REGION_GFX1, 0, charlayout,                 0, 128 )
709   GFXDECODE_ENTRY( REGION_GFX2, 0, charlayout,             128*4, 128 )
710   GFXDECODE_ENTRY( REGION_GFX3, 0, charlayout1,      128*4+128*4,  64 )
711   GFXDECODE_ENTRY( REGION_GFX4, 0, charlayout2, 128*4+128*4+64*8, 128 )
671   GFXDECODE_ENTRY( REGION_GFX1, 0, charlayout_2bpp, 0x000, 0x100/4 )   // bg chars (top monitor only)
672   GFXDECODE_ENTRY( REGION_GFX2, 0, charlayout_2bpp, 0x100, 0x100/4 )   // bg chars (bottom monitor only)
673   GFXDECODE_ENTRY( REGION_GFX3, 0, charlayout_3bpp, 0x000, 0x200/8 )   // big sprite #1 (top and bottom monitor)
674   GFXDECODE_ENTRY( REGION_GFX4, 0, charlayout_2bpp, 0x100, 0x100/4 )   // big sprite #2 (bottom monitor only)
712675GFXDECODE_END
713676
714677static GFXDECODE_START( armwrest )
715   GFXDECODE_ENTRY( REGION_GFX1, 0, armwrest_charlayout,        0, 256 )
716   GFXDECODE_ENTRY( REGION_GFX2, 0, armwrest_charlayout2,   256*4,  64 )
717   GFXDECODE_ENTRY( REGION_GFX3, 0, charlayout1,       256*4+64*8,  64 )
718   GFXDECODE_ENTRY( REGION_GFX4, 0, charlayout2,  256*4+64*8+64*8, 128 )
678   GFXDECODE_ENTRY( REGION_GFX1, 0, charlayout_2bpp, 0x000, 0x200/4 )   // bg chars (top and bottom monitor)
679   GFXDECODE_ENTRY( REGION_GFX2, 0, charlayout_3bpp, 0x100, 0x100/8 )   // fg chars (bottom monitor only)
680   GFXDECODE_ENTRY( REGION_GFX3, 0, charlayout_3bpp, 0x000, 0x200/8 )   // big sprite #1 (top and bottom monitor)
681   GFXDECODE_ENTRY( REGION_GFX4, 0, charlayout_2bpp, 0x100, 0x100/4 )   // big sprite #2 (bottom monitor only)
719682GFXDECODE_END
720683
721684
r2844r2845
751714
752715   /* video hardware */
753716   MDRV_GFXDECODE(punchout)
754   MDRV_PALETTE_LENGTH(128*4+128*4+64*8+128*4)
755   MDRV_DEFAULT_LAYOUT(layout_dualhuov)
717   MDRV_PALETTE_LENGTH(0x200)
718   MDRV_DEFAULT_LAYOUT(layout_dualhovu)
756719
757720   MDRV_SCREEN_ADD("top", RASTER)
758721   MDRV_SCREEN_FORMAT(BITMAP_FORMAT_INDEXED16)
r2844r2845
768731   MDRV_SCREEN_SIZE(32*8, 32*8)
769732   MDRV_SCREEN_VISIBLE_AREA(0*8, 32*8-1, 2*8, 30*8-1)
770733
771   MDRV_PALETTE_INIT(punchout)
772734   MDRV_VIDEO_START(punchout)
773735   MDRV_VIDEO_UPDATE(punchout)
774736
r2844r2845
795757
796758   /* video hardware */
797759   MDRV_GFXDECODE(armwrest)
798   MDRV_PALETTE_LENGTH(256*4+64*8+64*8+128*4)
799760
800   MDRV_PALETTE_INIT(armwrest)
801761   MDRV_VIDEO_START(armwrest)
802762   MDRV_VIDEO_UPDATE(armwrest)
803763MACHINE_DRIVER_END
r2844r2845
821781   ROM_REGION( 0x10000, REGION_CPU2, 0 )   /* 64k for the sound CPU */
822782   ROM_LOAD( "chp1-c.4k",    0xe000, 0x2000, CRC(cb6ef376) SHA1(503dbcc1b18a497311bf129689d5650860bf96c7) )
823783
824   ROM_REGION( 0x04000, REGION_GFX1, ROMREGION_DISPOSE | ROMREGION_ERASEFF )
784   ROM_REGION( 0x04000, REGION_GFX1, ROMREGION_DISPOSE | ROMREGION_ERASEFF | ROMREGION_INVERT )
825785   ROM_LOAD( "chp1-b.4c",    0x00000, 0x2000, CRC(e26dc8b3) SHA1(a704d39ef6f5cbad64a478e5c109b18aae427cbc) )   /* chars #1 */
826786   ROM_LOAD( "chp1-b.4d",    0x02000, 0x2000, CRC(dd1310ca) SHA1(918d2eda000244b692f1da7ac57d7a0edaef95fb) )
827787
828   ROM_REGION( 0x04000, REGION_GFX2, ROMREGION_DISPOSE | ROMREGION_ERASEFF )
788   ROM_REGION( 0x04000, REGION_GFX2, ROMREGION_DISPOSE | ROMREGION_ERASEFF | ROMREGION_INVERT )
829789   ROM_LOAD( "chp1-b.4a",    0x00000, 0x2000, CRC(20fb4829) SHA1(9f0ce9379eb31c19bfacdc514ac6a28aa4217cbb) )   /* chars #2 */
830790   ROM_LOAD( "chp1-b.4b",    0x02000, 0x2000, CRC(edc34594) SHA1(fbb4a8b979d60b183dc23bdbb7425100b9325287) )
831791
r2844r2845
848808   /* 2a000-2bfff empty (space for 16k ROM) */
849809   /* 2c000-2ffff empty (4v doesn't exist, it is seen as a 0xff fill) */
850810
851   ROM_REGION( 0x10000, REGION_GFX4, ROMREGION_DISPOSE | ROMREGION_ERASEFF )
811   ROM_REGION( 0x10000, REGION_GFX4, ROMREGION_DISPOSE | ROMREGION_ERASEFF | ROMREGION_INVERT )
852812   ROM_LOAD( "chp1-v.6p",    0x00000, 0x2000, CRC(16588f7a) SHA1(1aeaaa5cc2477c3aa4bf80df7d9474cc9ded9f15) )   /* chars #4 */
853813   ROM_LOAD( "chp1-v.6n",    0x02000, 0x2000, CRC(dc743674) SHA1(660582c76ee68a7267d5686a2f8ea0fd6c2b25fc) )
854814   /* 04000-07fff empty (space for 6l and 6k) */
r2844r2845
857817   /* 0c000-0ffff empty (space for 8l and 8k) */
858818
859819   ROM_REGION( 0x0d00, REGION_PROMS, 0 )
860   ROM_LOAD( "chp1-b.6e",    0x0000, 0x0200, CRC(e9ca3ac6) SHA1(68d9739d8a0dadc6fe3b3767437526096ca5db98) )   /* red component */
861   ROM_LOAD( "chp1-b.7e",    0x0200, 0x0200, CRC(47adf7a2) SHA1(1d37d5207cd37a9c122251c60cc8f43dd680f484) )   /* red component */
862   ROM_LOAD( "chp1-b.6f",    0x0400, 0x0200, CRC(02be56ab) SHA1(a88f332cb26928350ed20ab5f4c04d5324bb516a) )   /* green component */
863   ROM_LOAD( "chp1-b.8e",    0x0600, 0x0200, CRC(b0fc15a8) SHA1(a1af09cfea81231240bd94f3b98de1be8235ebe7) )   /* green component */
864   ROM_LOAD( "chp1-b.7f",    0x0800, 0x0200, CRC(11de55f1) SHA1(269b82f4bc73fac197e0bb6d9a90a220e77ce478) )   /* blue component */
865   ROM_LOAD( "chp1-b.8f",    0x0a00, 0x0200, CRC(1ffd894a) SHA1(9e8c1c28b4c12acf42f814bc109d353729a25652) )   /* blue component */
820   ROM_LOAD( "chp1-b.6e",    0x0000, 0x0200, CRC(e9ca3ac6) SHA1(68d9739d8a0dadc6fe3b3767437526096ca5db98) )   /* R (top monitor) */
821   ROM_LOAD( "chp1-b.6f",    0x0200, 0x0200, CRC(02be56ab) SHA1(a88f332cb26928350ed20ab5f4c04d5324bb516a) )   /* G */
822   ROM_LOAD( "chp1-b.7f",    0x0400, 0x0200, CRC(11de55f1) SHA1(269b82f4bc73fac197e0bb6d9a90a220e77ce478) )   /* B */
823   ROM_LOAD( "chp1-b.7e",    0x0600, 0x0200, CRC(47adf7a2) SHA1(1d37d5207cd37a9c122251c60cc8f43dd680f484) )   /* R (bottom monitor) */
824   ROM_LOAD( "chp1-b.8e",    0x0800, 0x0200, CRC(b0fc15a8) SHA1(a1af09cfea81231240bd94f3b98de1be8235ebe7) )   /* G */
825   ROM_LOAD( "chp1-b.8f",    0x0a00, 0x0200, CRC(1ffd894a) SHA1(9e8c1c28b4c12acf42f814bc109d353729a25652) )   /* B */
866826   ROM_LOAD( "chp1-v.2d",    0x0c00, 0x0100, CRC(71dc0d48) SHA1(dd6609f547d74887f520d7e71a1a00317ff181d0) )   /* timing - not used */
867827
868828   ROM_REGION( 0x4000, REGION_SOUND1, 0 )   /* 16k for the VLM5030 data */
r2844r2845
949909   /* 0c000-0ffff empty (space for 8l and 8k) */
950910
951911   ROM_REGION( 0x0d00, REGION_PROMS, 0 )
952   ROM_LOAD( "chp1-b.6e",    0x0000, 0x0200, CRC(e9ca3ac6) SHA1(68d9739d8a0dadc6fe3b3767437526096ca5db98) )   /* red component */
953   ROM_LOAD( "chp1-b.7e",    0x0200, 0x0200, CRC(47adf7a2) SHA1(1d37d5207cd37a9c122251c60cc8f43dd680f484) )   /* red component */
954   ROM_LOAD( "chp1-b.6f",    0x0400, 0x0200, CRC(02be56ab) SHA1(a88f332cb26928350ed20ab5f4c04d5324bb516a) )   /* green component */
955   ROM_LOAD( "chp1-b.8e",    0x0600, 0x0200, CRC(b0fc15a8) SHA1(a1af09cfea81231240bd94f3b98de1be8235ebe7) )   /* green component */
956   ROM_LOAD( "chp1-b.7f",    0x0800, 0x0200, CRC(11de55f1) SHA1(269b82f4bc73fac197e0bb6d9a90a220e77ce478) )   /* blue component */
957   ROM_LOAD( "chp1-b.8f",    0x0a00, 0x0200, CRC(1ffd894a) SHA1(9e8c1c28b4c12acf42f814bc109d353729a25652) )   /* blue component */
912   ROM_LOAD( "chp1-b.6e",    0x0000, 0x0200, CRC(e9ca3ac6) SHA1(68d9739d8a0dadc6fe3b3767437526096ca5db98) )   /* R (top monitor) */
913   ROM_LOAD( "chp1-b.6f",    0x0200, 0x0200, CRC(02be56ab) SHA1(a88f332cb26928350ed20ab5f4c04d5324bb516a) )   /* G */
914   ROM_LOAD( "chp1-b.7f",    0x0400, 0x0200, CRC(11de55f1) SHA1(269b82f4bc73fac197e0bb6d9a90a220e77ce478) )   /* B */
915   ROM_LOAD( "chp1-b.7e",    0x0600, 0x0200, CRC(47adf7a2) SHA1(1d37d5207cd37a9c122251c60cc8f43dd680f484) )   /* R (bottom monitor) */
916   ROM_LOAD( "chp1-b.8e",    0x0800, 0x0200, CRC(b0fc15a8) SHA1(a1af09cfea81231240bd94f3b98de1be8235ebe7) )   /* G */
917   ROM_LOAD( "chp1-b.8f",    0x0a00, 0x0200, CRC(1ffd894a) SHA1(9e8c1c28b4c12acf42f814bc109d353729a25652) )   /* B */
958918   ROM_LOAD( "chp1-v.2d",    0x0c00, 0x0100, CRC(71dc0d48) SHA1(dd6609f547d74887f520d7e71a1a00317ff181d0) )   /* timing - not used */
959919
960920   ROM_REGION( 0x4000, REGION_SOUND1, 0 )   /* 16k for the VLM5030 data */
r2844r2845
1029989   /* 0c000-0ffff empty (space for 8l and 8k) */
1030990
1031991   ROM_REGION( 0x0d00, REGION_PROMS, 0 )
1032   ROM_LOAD( "chs1-b.6e",    0x0000, 0x0200, CRC(0ad4d727) SHA1(5fa4247d58d10b4644f0a7492efb22b7a9ce7b62) )   /* red component */
1033   ROM_LOAD( "chs1-b.7e",    0x0200, 0x0200, CRC(9e170f64) SHA1(9548bfec2f5b7d222e91562b5459aef8c107b3ec) )   /* red component */
1034   ROM_LOAD( "chs1-b.6f",    0x0400, 0x0200, CRC(86f5cfdb) SHA1(a2a3a4e9ca15826fe8c86650d50c8ce203d57eae) )   /* green component */
1035   ROM_LOAD( "chs1-b.8e",    0x0600, 0x0200, CRC(3a2e333b) SHA1(5cf0324cc07ac4af63598c5c6acc61d24215b233) )   /* green component */
1036   ROM_LOAD( "chs1-b.7f",    0x0800, 0x0200, CRC(8bd406f8) SHA1(eaf0b62eccf1f47452bf983b3ffc6cacc25d4585) )   /* blue component */
1037   ROM_LOAD( "chs1-b.8f",    0x0a00, 0x0200, CRC(1663eed7) SHA1(90ff876a6b885f8a80c17531cde8b91864f1a6a5) )   /* blue component */
992   ROM_LOAD( "chs1-b.6e",    0x0000, 0x0200, CRC(0ad4d727) SHA1(5fa4247d58d10b4644f0a7492efb22b7a9ce7b62) )   /* R (top monitor) */
993   ROM_LOAD( "chs1-b.6f",    0x0200, 0x0200, CRC(86f5cfdb) SHA1(a2a3a4e9ca15826fe8c86650d50c8ce203d57eae) )   /* G */
994   ROM_LOAD( "chs1-b.7f",    0x0400, 0x0200, CRC(8bd406f8) SHA1(eaf0b62eccf1f47452bf983b3ffc6cacc25d4585) )   /* B */
995   ROM_LOAD( "chs1-b.7e",    0x0600, 0x0200, CRC(9e170f64) SHA1(9548bfec2f5b7d222e91562b5459aef8c107b3ec) )   /* R (bottom monitor) */
996   ROM_LOAD( "chs1-b.8e",    0x0800, 0x0200, CRC(3a2e333b) SHA1(5cf0324cc07ac4af63598c5c6acc61d24215b233) )   /* G */
997   ROM_LOAD( "chs1-b.8f",    0x0a00, 0x0200, CRC(1663eed7) SHA1(90ff876a6b885f8a80c17531cde8b91864f1a6a5) )   /* B */
1038998   ROM_LOAD( "chs1-v.2d",    0x0c00, 0x0100, CRC(71dc0d48) SHA1(dd6609f547d74887f520d7e71a1a00317ff181d0) )   /* timing - not used */
1039999
10401000   ROM_REGION( 0x10000, REGION_SOUND1, 0 )   /* 64k for the VLM5030 data */
r2844r2845
10521012   ROM_REGION( 0x10000, REGION_CPU2, 0 )   /* 64k for the sound CPU */
10531013   ROM_LOAD( "chp1-c.4k",    0xe000, 0x2000, CRC(cb6ef376) SHA1(503dbcc1b18a497311bf129689d5650860bf96c7) )
10541014
1055   ROM_REGION( 0x04000, REGION_GFX1, ROMREGION_DISPOSE | ROMREGION_ERASEFF )
1015   ROM_REGION( 0x04000, REGION_GFX1, ROMREGION_DISPOSE | ROMREGION_ERASEFF | ROMREGION_INVERT )
10561016   ROM_LOAD( "b_4c_01a.bin", 0x00000, 0x2000, CRC(b017e1e9) SHA1(39e98f48bff762a674a2506efa39b3619337a1e0) )   /* chars #1 */
10571017   ROM_LOAD( "b_4d_01a.bin", 0x02000, 0x2000, CRC(e3de9d18) SHA1(f55b6f522e127e6239197dd7eb1564e6f275df74) )
10581018
r2844r2845
11031063   /* 0c000-0ffff empty (space for 8l and 8k) */
11041064
11051065   ROM_REGION( 0x0d00, REGION_PROMS, 0 )
1106   ROM_LOAD( "chs1b_6e.bpr", 0x0000, 0x0200, CRC(8efd867f) SHA1(d5f2bfe750bb5d472922bdb7e915ee28a3eec9bd) )   /* red component */
1107   ROM_LOAD( "chs1-b.7e",    0x0200, 0x0200, CRC(9e170f64) SHA1(9548bfec2f5b7d222e91562b5459aef8c107b3ec) )   /* red component */
1108   ROM_LOAD( "chs1b_6f.bpr", 0x0400, 0x0200, CRC(279d6cbc) SHA1(aea56970801908b4d51be0c15043c7b315d2637f) )   /* green component */
1109   ROM_LOAD( "chs1-b.8e",    0x0600, 0x0200, CRC(3a2e333b) SHA1(5cf0324cc07ac4af63598c5c6acc61d24215b233) )   /* green component */
1110   ROM_LOAD( "chs1b_7f.bpr", 0x0800, 0x0200, CRC(cad6b7ad) SHA1(62b61d5fa47ca6e2dd15295674dff62e4e69471a) )   /* blue component */
1111   ROM_LOAD( "chs1-b.8f",    0x0a00, 0x0200, CRC(1663eed7) SHA1(90ff876a6b885f8a80c17531cde8b91864f1a6a5) )   /* blue component */
1066   ROM_LOAD( "chs1b_6e.bpr", 0x0000, 0x0200, CRC(8efd867f) SHA1(d5f2bfe750bb5d472922bdb7e915ee28a3eec9bd) )   /* R (top monitor) */
1067   ROM_LOAD( "chs1b_6f.bpr", 0x0200, 0x0200, CRC(279d6cbc) SHA1(aea56970801908b4d51be0c15043c7b315d2637f) )   /* G */
1068   ROM_LOAD( "chs1b_7f.bpr", 0x0400, 0x0200, CRC(cad6b7ad) SHA1(62b61d5fa47ca6e2dd15295674dff62e4e69471a) )   /* B */
1069   ROM_LOAD( "chs1-b.7e",    0x0600, 0x0200, CRC(9e170f64) SHA1(9548bfec2f5b7d222e91562b5459aef8c107b3ec) )   /* R (bottom monitor) */
1070   ROM_LOAD( "chs1-b.8e",    0x0800, 0x0200, CRC(3a2e333b) SHA1(5cf0324cc07ac4af63598c5c6acc61d24215b233) )   /* G */
1071   ROM_LOAD( "chs1-b.8f",    0x0a00, 0x0200, CRC(1663eed7) SHA1(90ff876a6b885f8a80c17531cde8b91864f1a6a5) )   /* B */
11121072   ROM_LOAD( "chs1-v.2d",    0x0c00, 0x0100, CRC(71dc0d48) SHA1(dd6609f547d74887f520d7e71a1a00317ff181d0) )   /* timing - not used */
11131073
11141074   ROM_REGION( 0x10000, REGION_SOUND1, 0 )   /* 64k for the VLM5030 data */
r2844r2845
11491109   /* 28000-2bfff empty */
11501110   /* 2c000-2ffff empty (4v doesn't exist, it is seen as a 0xff fill) */
11511111
1152   ROM_REGION( 0x10000, REGION_GFX4, ROMREGION_DISPOSE | ROMREGION_ERASEFF )
1112   ROM_REGION( 0x10000, REGION_GFX4, ROMREGION_DISPOSE | ROMREGION_ERASEFF | ROMREGION_INVERT )
11531113   ROM_LOAD( "chv1-v.6p",    0x00000, 0x2000, CRC(d834e142) SHA1(e7d654145b695147b744af2284173f90749fbf0e) )   /* chars #4 */
11541114   /* 02000-03fff empty (space for 16k ROM) */
11551115   /* 04000-07fff empty (space for 6l and 6k) */
r2844r2845
11581118   /* 0c000-0ffff empty (space for 8l and 8k) */
11591119
11601120   ROM_REGION( 0x0e00, REGION_PROMS, 0 )
1161   ROM_LOAD( "chpv-b.7b",    0x0000, 0x0200, CRC(df6fdeb3) SHA1(7766d420cb95377104e26d96afddc83b67553c2f) )   /* red component */
1162   ROM_LOAD( "chpv-b.4b",    0x0200, 0x0200, CRC(9d51416e) SHA1(ae933786c5fc19311144b2094305b4253dc8b75b) )   /* red component */
1163   ROM_LOAD( "chpv-b.7c",    0x0400, 0x0200, CRC(b1da5f42) SHA1(55e744da70bbaa855cb1403eef028771a97578a1) )   /* green component */
1164   ROM_LOAD( "chpv-b.4c",    0x0600, 0x0200, CRC(b8a25795) SHA1(8e41baa796fd8f00739a95b2e07066d68193bd76) )   /* green component */
1165   ROM_LOAD( "chpv-b.7d",    0x0800, 0x0200, CRC(4ede813e) SHA1(6603465dae7d869c483d66768fab16f282caaa8b) )   /* blue component */
1166   ROM_LOAD( "chpv-b.4d",    0x0a00, 0x0200, CRC(474fc3b1) SHA1(9cda1d1626285310524d048b60b1cf89e197a26d) )   /* blue component */
1121   ROM_LOAD( "chpv-b.7b",    0x0000, 0x0200, CRC(df6fdeb3) SHA1(7766d420cb95377104e26d96afddc83b67553c2f) )   /* R (top monitor) */
1122   ROM_LOAD( "chpv-b.7c",    0x0200, 0x0200, CRC(b1da5f42) SHA1(55e744da70bbaa855cb1403eef028771a97578a1) )   /* G */
1123   ROM_LOAD( "chpv-b.7d",    0x0400, 0x0200, CRC(4ede813e) SHA1(6603465dae7d869c483d66768fab16f282caaa8b) )   /* B */
1124   ROM_LOAD( "chpv-b.4b",    0x0600, 0x0200, CRC(9d51416e) SHA1(ae933786c5fc19311144b2094305b4253dc8b75b) )   /* R (bottom monitor) */
1125   ROM_LOAD( "chpv-b.4c",    0x0800, 0x0200, CRC(b8a25795) SHA1(8e41baa796fd8f00739a95b2e07066d68193bd76) )   /* G */
1126   ROM_LOAD( "chpv-b.4d",    0x0a00, 0x0200, CRC(474fc3b1) SHA1(9cda1d1626285310524d048b60b1cf89e197a26d) )   /* B */
11671127   ROM_LOAD( "chv1-b.3c",    0x0c00, 0x0100, CRC(c3f92ea2) SHA1(1a82cca1b9a8d9bd4a1d121d8c131a7d0be554bc) )   /* priority encoder - not used */
11681128   ROM_LOAD( "chpv-v.2d",    0x0d00, 0x0100, CRC(71dc0d48) SHA1(dd6609f547d74887f520d7e71a1a00317ff181d0) )   /* timing - not used */
11691129
src/mame/drivers/segaybd.c
r2844r2845
312312                D2 = YRES
313313                D1-D0 = ADC0-1
314314            */
315         segaic16_set_display_enable(data & 0x80);
315         segaic16_set_display_enable(machine, data & 0x80);
316316         if (((old ^ data) & 0x20) && !(data & 0x20)) watchdog_reset_w(machine,0,0);
317317         cpunum_set_input_line(machine, 3, INPUT_LINE_RESET, (data & 0x10) ? CLEAR_LINE : ASSERT_LINE);
318318         cpunum_set_input_line(machine, 1, INPUT_LINE_RESET, (data & 0x08) ? ASSERT_LINE : CLEAR_LINE);
src/mame/drivers/segaorun.c
r2844r2845
343343        D1: (CONT) - affects sprite hardware
344344        D0: Sound section reset (1= normal operation, 0= reset)
345345    */
346   segaic16_set_display_enable(data & 0x20);
346   segaic16_set_display_enable(machine, data & 0x20);
347347   adc_select = (data >> 2) & 7;
348348   cpunum_set_input_line(machine, 2, INPUT_LINE_RESET, (data & 0x01) ? CLEAR_LINE : ASSERT_LINE);
349349}
r2844r2845
472472                D5: Screen display
473473            */
474474         adc_select = (data >> 6) & 3;
475         segaic16_set_display_enable((data >> 5) & 1);
475         segaic16_set_display_enable(machine, (data >> 5) & 1);
476476         return;
477477
478478      case 0x0020/2:
src/mame/drivers/gticlub.c
r2844r2845
6565
6666
6767
68VIDEO_START( gticlub );
69VIDEO_UPDATE( gticlub );
70
71
72
7368static WRITE32_HANDLER( paletteram32_w )
7469{
7570   COMBINE_DATA(&paletteram32[offset]);
r2844r2845
278273   return adc1038_sars;
279274}
280275
281static READ32_HANDLER( sysreg_r )
276static READ8_HANDLER( sysreg_r )
282277{
283   UINT32 r = 0;
284   if (offset == 0)
278   switch (offset)
285279   {
286      if (ACCESSING_BITS_24_31)
280      case 0:
281      case 1:
282      case 3:
283         return input_port_read_indexed(machine, offset);
284
285      case 2:
286         return adc1038_sars_r(machine) << 7;
287
288      case 4:
287289      {
288         r |= input_port_read_indexed(machine, 0) << 24;
289      }
290      if (ACCESSING_BITS_16_23)
291      {
292         r |= input_port_read_indexed(machine, 1) << 16;
293      }
294      if (ACCESSING_BITS_8_15)
295      {
296         r |= (adc1038_sars_r(machine) << 7) << 8;
297      }
298      if (ACCESSING_BITS_0_7)
299      {
300         r |= input_port_read_indexed(machine, 3) << 0;
301      }
302      return r;
303   }
304   else if (offset == 1)
305   {
306      if (ACCESSING_BITS_24_31 )
307      {
308290         // 7        0
309291         // |?????ae?|
310292         //
r2844r2845
313295
314296         UINT32 eeprom_bit = (eeprom_read_bit() << 1);
315297         UINT32 adc_bit = (adc1038_do_r() << 2);
316         r |= (eeprom_bit | adc_bit) << 24;
298         return (eeprom_bit | adc_bit);
317299      }
318      else
319      {
320         mame_printf_debug("sysreg_r %d, %08X\n", offset, mem_mask);
321      }
322      return r;
300
301      default:
302         mame_printf_debug("sysreg_r %d\n", offset);
303         break;
323304   }
324   return r;
305   return 0;
325306}
326307
327static WRITE32_HANDLER( sysreg_w )
308static WRITE8_HANDLER( sysreg_w )
328309{
329   if (offset == 0)
310   switch (offset)
330311   {
331      if( ACCESSING_BITS_24_31 )
332      {
333         gticlub_led_reg0 = (data >> 24) & 0xff;
334      }
335      if( ACCESSING_BITS_16_23 )
336      {
337         gticlub_led_reg1 = (data >> 16) & 0xff;
338      }
339      if( ACCESSING_BITS_0_7 )
340      {
312      case 0:
313         gticlub_led_reg0 = data;
314         break;
315
316      case 1:
317         gticlub_led_reg1 = data;
318         break;
319
320      case 3:
341321         eeprom_write_bit((data & 0x01) ? 1 : 0);
342322         eeprom_set_clock_line((data & 0x02) ? ASSERT_LINE : CLEAR_LINE);
343323         eeprom_set_cs_line((data & 0x04) ? CLEAR_LINE : ASSERT_LINE);
344      }
345   }
346   if( offset == 1 )
347   {
348      if (ACCESSING_BITS_24_31)
349      {
350         if (data & 0x80000000)   /* CG Board 1 IRQ Ack */
351         {
324         break;
325
326      case 4:
327         if (data & 0x80)   /* CG Board 1 IRQ Ack */
352328            cpunum_set_input_line(machine, 0, INPUT_LINE_IRQ1, CLEAR_LINE);
353         }
354         if (data & 0x40000000)   /* CG Board 0 IRQ Ack */
355         {
329
330         if (data & 0x40)   /* CG Board 0 IRQ Ack */
356331            cpunum_set_input_line(machine, 0, INPUT_LINE_IRQ0, CLEAR_LINE);
357         }
358332
359         adc1038_di_w((data >> 24) & 1);
360         adc1038_clk_w(machine, (data >> 25) & 1);
333         adc1038_di_w((data >> 0) & 1);
334         adc1038_clk_w(machine, (data >> 1) & 1);
361335
362         set_cgboard_id((data >> 28) & 0x3);
363      }
364      return;
336         set_cgboard_id((data >> 4) & 0x3);
337         break;
365338   }
366339}
367340
r2844r2845
381354   return 0;
382355}
383356
384TIMER_CALLBACK( network_irq_gen )
357TIMER_CALLBACK( network_irq_clear )
385358{
386   cpunum_set_input_line(Machine, 0, INPUT_LINE_IRQ2, ASSERT_LINE);
359   cpunum_set_input_line(machine, 0, INPUT_LINE_IRQ2, CLEAR_LINE);
387360}
388361
389362WRITE8_HANDLER( K056230_w )
r2844r2845
401374            // Thunder Hurricane breaks otherwise...
402375            if (mame_stricmp(Machine->gamedrv->name, "thunderh") != 0)
403376            {
404//                  timer_set(ATTOTIME_IN_MSEC(1), NULL, 0, network_irq_gen);
405//                  cpunum_set_input_line(Machine, 0, INPUT_LINE_IRQ2, ASSERT_LINE);
377               cpunum_set_input_line(Machine, 0, INPUT_LINE_IRQ2, ASSERT_LINE);
378               timer_set(ATTOTIME_IN_USEC(1), NULL, 0, network_irq_clear);
406379            }
407380         }
408         else
409            cpunum_set_input_line(Machine, 0, INPUT_LINE_IRQ2, CLEAR_LINE);
381//          else
382//              cpunum_set_input_line(Machine, 0, INPUT_LINE_IRQ2, CLEAR_LINE);
410383         break;
411384      }
412385      case 2:      // Sub ID register
r2844r2845
432405
433406/******************************************************************/
434407
408static MACHINE_START( gticlub )
409{
410   /* set conservative DRC options */
411   cpunum_set_info_int(0, CPUINFO_INT_PPC_DRC_OPTIONS, PPCDRC_COMPATIBLE_OPTIONS);
412
413   /* configure fast RAM regions for DRC */
414   cpunum_set_info_int(0, CPUINFO_INT_PPC_FASTRAM_SELECT, 0);
415   cpunum_set_info_int(0, CPUINFO_INT_PPC_FASTRAM_START, 0x00000000);
416   cpunum_set_info_int(0, CPUINFO_INT_PPC_FASTRAM_END, 0x000fffff);
417   cpunum_set_info_ptr(0, CPUINFO_PTR_PPC_FASTRAM_BASE, work_ram);
418   cpunum_set_info_int(0, CPUINFO_INT_PPC_FASTRAM_READONLY, 0);
419}
420
435421static ADDRESS_MAP_START( gticlub_map, ADDRESS_SPACE_PROGRAM, 32 )
436   AM_RANGE(0x00000000, 0x000fffff) AM_MIRROR(0x80000000) AM_RAM AM_BASE(&work_ram)      /* Work RAM */
437   AM_RANGE(0x74000000, 0x740000ff) AM_MIRROR(0x80000000) AM_READWRITE(K001604_reg_r, K001604_reg_w)
438   AM_RANGE(0x74010000, 0x7401ffff) AM_MIRROR(0x80000000) AM_RAM_WRITE(paletteram32_w) AM_BASE(&paletteram32)
439   AM_RANGE(0x74020000, 0x7403ffff) AM_MIRROR(0x80000000) AM_READWRITE(K001604_tile_r, K001604_tile_w)
440   AM_RANGE(0x74040000, 0x7407ffff) AM_MIRROR(0x80000000) AM_READWRITE(K001604_char_r, K001604_char_w)
441   AM_RANGE(0x78000000, 0x7800ffff) AM_MIRROR(0x80000000) AM_READWRITE(cgboard_dsp_shared_r_ppc, cgboard_dsp_shared_w_ppc)
442   AM_RANGE(0x78040000, 0x7804000f) AM_MIRROR(0x80000000) AM_READWRITE(K001006_0_r, K001006_0_w)
443   AM_RANGE(0x78080000, 0x7808000f) AM_MIRROR(0x80000000) AM_READWRITE(K001006_1_r, K001006_1_w)
444   AM_RANGE(0x780c0000, 0x780c0003) AM_MIRROR(0x80000000) AM_READWRITE(cgboard_dsp_comm_r_ppc, cgboard_dsp_comm_w_ppc)
445   AM_RANGE(0x7e000000, 0x7e003fff) AM_MIRROR(0x80000000) AM_READWRITE(sysreg_r, sysreg_w)
446   AM_RANGE(0x7e008000, 0x7e009fff) AM_MIRROR(0x80000000) AM_READWRITE8(K056230_r, K056230_w, 0xffffffff)
447   AM_RANGE(0x7e00a000, 0x7e00bfff) AM_MIRROR(0x80000000) AM_READWRITE(lanc_ram_r, lanc_ram_w)
448   AM_RANGE(0x7e00c000, 0x7e00c007) AM_MIRROR(0x80000000) AM_WRITE(K056800_host_w)
449   AM_RANGE(0x7e00c000, 0x7e00c007) AM_MIRROR(0x80000000) AM_READ(K056800_host_r)      // Hang Pilot
450   AM_RANGE(0x7e00c008, 0x7e00c00f) AM_MIRROR(0x80000000) AM_READ(K056800_host_r)
451   AM_RANGE(0x7f000000, 0x7f3fffff) AM_MIRROR(0x80000000) AM_ROM AM_REGION(REGION_USER2, 0)   /* Data ROM */
452   AM_RANGE(0x7f800000, 0x7f9fffff) AM_MIRROR(0x80000000) AM_ROM AM_SHARE(2)
453   AM_RANGE(0x7fe00000, 0x7fffffff) AM_MIRROR(0x80000000) AM_ROM AM_REGION(REGION_USER1, 0) AM_SHARE(2)   /* Program ROM */
422   AM_RANGE(0x00000000, 0x000fffff) AM_RAM AM_BASE(&work_ram)      /* Work RAM */
423   AM_RANGE(0x74000000, 0x740000ff) AM_READWRITE(K001604_reg_r, K001604_reg_w)
424   AM_RANGE(0x74010000, 0x7401ffff) AM_RAM_WRITE(paletteram32_w) AM_BASE(&paletteram32)
425   AM_RANGE(0x74020000, 0x7403ffff) AM_READWRITE(K001604_tile_r, K001604_tile_w)
426   AM_RANGE(0x74040000, 0x7407ffff) AM_READWRITE(K001604_char_r, K001604_char_w)
427   AM_RANGE(0x78000000, 0x7800ffff) AM_READWRITE(cgboard_dsp_shared_r_ppc, cgboard_dsp_shared_w_ppc)
428   AM_RANGE(0x78040000, 0x7804000f) AM_READWRITE(K001006_0_r, K001006_0_w)
429   AM_RANGE(0x78080000, 0x7808000f) AM_READWRITE(K001006_1_r, K001006_1_w)
430   AM_RANGE(0x780c0000, 0x780c0003) AM_READWRITE(cgboard_dsp_comm_r_ppc, cgboard_dsp_comm_w_ppc)
431   AM_RANGE(0x7e000000, 0x7e003fff) AM_READWRITE8(sysreg_r, sysreg_w, 0xffffffff)
432   AM_RANGE(0x7e008000, 0x7e009fff) AM_READWRITE8(K056230_r, K056230_w, 0xffffffff)
433   AM_RANGE(0x7e00a000, 0x7e00bfff) AM_READWRITE(lanc_ram_r, lanc_ram_w)
434   AM_RANGE(0x7e00c000, 0x7e00c007) AM_WRITE(K056800_host_w)
435   AM_RANGE(0x7e00c000, 0x7e00c007) AM_READ(K056800_host_r)      // Hang Pilot
436   AM_RANGE(0x7e00c008, 0x7e00c00f) AM_READ(K056800_host_r)
437   AM_RANGE(0x7f000000, 0x7f3fffff) AM_ROM AM_REGION(REGION_USER2, 0)   /* Data ROM */
438   AM_RANGE(0x7f800000, 0x7f9fffff) AM_ROM AM_SHARE(2)
439   AM_RANGE(0x7fe00000, 0x7fffffff) AM_ROM AM_REGION(REGION_USER1, 0) AM_SHARE(2)   /* Program ROM */
454440ADDRESS_MAP_END
455441
456442/**********************************************************************/
r2844r2845
740726   MDRV_INTERLEAVE(100)
741727
742728   MDRV_NVRAM_HANDLER(gticlub)
729   MDRV_MACHINE_START(gticlub)
743730   MDRV_MACHINE_RESET(gticlub)
744731
745732    /* video hardware */
r2844r2845
788775   MDRV_INTERLEAVE(100)
789776
790777   MDRV_NVRAM_HANDLER(gticlub)
778   MDRV_MACHINE_START(gticlub)
791779   MDRV_MACHINE_RESET(hangplt)
792780
793781    /* video hardware */
r2844r2845
995983static DRIVER_INIT(slrasslt)
996984{
997985   DRIVER_INIT_CALL(gticlub);
998
999   // enable self-modifying code checks
1000   cpunum_set_info_int(0, CPUINFO_INT_PPC_DRC_OPTIONS, PPCDRC_STRICT_VERIFY);
1001986}
1002987
1003988/*************************************************************************/
src/mame/drivers/cloak.c
r2844r2845
110110#include "driver.h"
111111#include "deprecat.h"
112112#include "sound/pokey.h"
113#include "includes/cloak.h"
113114
114115static int cloak_nvram_enabled;
115116
116extern WRITE8_HANDLER( cloak_videoram_w );
117extern WRITE8_HANDLER( cloak_paletteram_w );
118extern WRITE8_HANDLER( cloak_clearbmp_w );
119extern WRITE8_HANDLER( graph_processor_w );
120extern WRITE8_HANDLER( cloak_flipscreen_w );
121extern READ8_HANDLER( graph_processor_r );
122
123extern VIDEO_START( cloak );
124extern VIDEO_UPDATE( cloak );
125
126
127117/*************************************
128118 *
129119 *  Output ports
src/mame/drivers/bsktball.c
r2844r2845
7575   ADDRESS_MAP_GLOBAL_MASK(0x3fff)
7676   AM_RANGE(0x0000, 0x01ff) AM_RAM /* Zero Page RAM */
7777   AM_RANGE(0x0800, 0x0800) AM_READ(bsktball_in0_r)
78   AM_RANGE(0x0802, 0x0802) AM_READ(input_port_5_r)
79   AM_RANGE(0x0803, 0x0803) AM_READ(input_port_6_r)
78   AM_RANGE(0x0802, 0x0802) AM_READ_PORT("IN1")
79   AM_RANGE(0x0803, 0x0803) AM_READ_PORT("DSW")
8080   AM_RANGE(0x1000, 0x1000) AM_WRITE(SMH_NOP) /* Timer Reset */
8181   AM_RANGE(0x1010, 0x1010) AM_WRITE(bsktball_bounce_w) /* Crowd Amp / Bounce */
8282   AM_RANGE(0x1022, 0x1023) AM_WRITE(SMH_NOP) /* Coin Counter */
r2844r2845
102102 *************************************/
103103
104104static INPUT_PORTS_START( bsktball )
105   PORT_START   /* IN0 */
105   PORT_START_TAG("TRACK0_X")
106106   PORT_BIT( 0xFF, 0x00, IPT_TRACKBALL_X ) PORT_SENSITIVITY(100) PORT_KEYDELTA(10) /* Sensitivity, clip, min, max */
107107
108   PORT_START   /* IN0 */
108   PORT_START_TAG("TRACK0_Y")
109109   PORT_BIT( 0xFF, 0x00, IPT_TRACKBALL_Y ) PORT_SENSITIVITY(100) PORT_KEYDELTA(10)
110110
111   PORT_START   /* IN0 */
111   PORT_START_TAG("TRACK1_X")
112112   PORT_BIT( 0xFF, 0x00, IPT_TRACKBALL_X ) PORT_SENSITIVITY(100) PORT_KEYDELTA(10) PORT_PLAYER(2) /* Sensitivity, clip, min, max */
113113
114   PORT_START   /* IN0 */
114   PORT_START_TAG("TRACK1_Y")
115115   PORT_BIT( 0xFF, 0x00, IPT_TRACKBALL_Y ) PORT_SENSITIVITY(100) PORT_KEYDELTA(10) PORT_PLAYER(2)
116116
117   PORT_START      /* IN0 */
117   PORT_START_TAG("IN0")
118118   PORT_BIT ( 0x01, IP_ACTIVE_LOW, IPT_START1 )
119119   PORT_BIT ( 0x02, IP_ACTIVE_LOW, IPT_START2 )
120120   PORT_BIT ( 0x04, IP_ACTIVE_LOW, IPT_BUTTON1 ) /* SPARE */
r2844r2845
124124   /* 0x40 - DR2 = PL1 H DIR */
125125   /* 0x80 - DR3 = PL1 V DIR */
126126
127   PORT_START      /* IN2 */
127   PORT_START_TAG("IN1")
128128   PORT_BIT ( 0x01, IP_ACTIVE_HIGH, IPT_VBLANK )
129129   PORT_BIT ( 0x02, IP_ACTIVE_LOW, IPT_TILT )
130130   PORT_BIT ( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN ) /* SPARE */
r2844r2845
134134   PORT_BIT ( 0x40, IP_ACTIVE_LOW, IPT_COIN2 ) /* COIN 1 */
135135   PORT_BIT ( 0x80, IP_ACTIVE_LOW, IPT_COIN1 ) /* COIN 2 */
136136
137   PORT_START      /* DSW */
137   PORT_START_TAG("DSW")
138138   PORT_DIPNAME( 0x07, 0x00, "Play Time per Credit" )
139139   PORT_DIPSETTING(   0x07, DEF_STR( Free_Play ) )
140140   PORT_DIPSETTING(   0x06, "2:30" )
src/mame/drivers/itgambl3.c
r0r2845
1/************************************************************************
2
3  Italian Gambling games based on Mitsubishi (Renesas) M16C MCU family.
4
5  Written by Roberto Fresca.
6
7
8  All these games use MCUs with internal ROM for their programs.
9
10  They have 256KB of internal flash ROM that can't be dumped easily,
11  and thus we can't emulate them at the moment because there is
12  nothing to emulate.
13
14  This driver is just a placeholder for the graphics/sound ROM loading
15
16
17*************************************************************************
18
19  --- Hardware Notes ---
20
21  The hardware is normally composed by:
22
23
24  CPU:   1x M30624FGAFP.
25           (256KB ROM; 20KB RAM)
26
27  Sound: 1x OKI M6295.
28         1x TDA2003 (audio amplifier).
29         1x LM358M (audio amplifier).
30
31  PLDs:  2x ispLSI1032E-70JL.
32
33  Clock: 1x Xtal 16.000 MHz.
34
35  ROMs:  1x (up to) 27C4001 or similar (sound).
36         4x 27C4001 or similar (graphics).
37
38
39************************************************************************/
40
41#define MAIN_CLOCK   XTAL_16MHz
42
43#include "driver.h"
44#include "cpu/h83002/h83002.h"
45#include "sound/okim6295.h"
46
47
48/*************************
49*     Video Hardware     *
50*************************/
51
52VIDEO_START( itgambl3 )
53{
54}
55
56
57VIDEO_UPDATE( itgambl3 )
58{
59   return 0;
60}
61
62
63/*************************
64* Memory map information *
65*************************/
66
67static ADDRESS_MAP_START( itgambl3_map, ADDRESS_SPACE_PROGRAM, 16 )
68   ADDRESS_MAP_GLOBAL_MASK(0xffffff)
69   AM_RANGE(0x000000, 0xffffff) AM_ROM
70ADDRESS_MAP_END
71
72
73/*************************
74*      Input ports       *
75*************************/
76
77static INPUT_PORTS_START( itgambl3 )
78    PORT_START
79    PORT_DIPNAME( 0x0001, 0x0001, DEF_STR( Unknown ) )
80    PORT_DIPSETTING(      0x0001, DEF_STR( Off ) )
81    PORT_DIPSETTING(      0x0000, DEF_STR( On ) )
82    PORT_DIPNAME( 0x0002, 0x0002, DEF_STR( Unknown ) )
83    PORT_DIPSETTING(      0x0002, DEF_STR( Off ) )
84    PORT_DIPSETTING(      0x0000, DEF_STR( On ) )
85    PORT_DIPNAME( 0x0004, 0x0004, DEF_STR( Unknown ) )
86    PORT_DIPSETTING(      0x0004, DEF_STR( Off ) )
87    PORT_DIPSETTING(      0x0000, DEF_STR( On ) )
88    PORT_DIPNAME( 0x0008, 0x0008, DEF_STR( Unknown ) )
89    PORT_DIPSETTING(      0x0008, DEF_STR( Off ) )
90    PORT_DIPSETTING(      0x0000, DEF_STR( On ) )
91    PORT_DIPNAME( 0x0010, 0x0010, DEF_STR( Unknown ) )
92    PORT_DIPSETTING(      0x0010, DEF_STR( Off ) )
93    PORT_DIPSETTING(      0x0000, DEF_STR( On ) )
94    PORT_DIPNAME( 0x0020, 0x0020, DEF_STR( Unknown ) )
95    PORT_DIPSETTING(      0x0020, DEF_STR( Off ) )
96    PORT_DIPSETTING(      0x0000, DEF_STR( On ) )
97    PORT_DIPNAME( 0x0040, 0x0040, DEF_STR( Unknown ) )
98    PORT_DIPSETTING(      0x0040, DEF_STR( Off ) )
99    PORT_DIPSETTING(      0x0000, DEF_STR( On ) )
100    PORT_DIPNAME( 0x0080, 0x0080, DEF_STR( Unknown ) )
101    PORT_DIPSETTING(      0x0080, DEF_STR( Off ) )
102    PORT_DIPSETTING(      0x0000, DEF_STR( On ) )
103    PORT_DIPNAME( 0x0100, 0x0100, DEF_STR( Unknown ) )
104    PORT_DIPSETTING(      0x0100, DEF_STR( Off ) )
105    PORT_DIPSETTING(      0x0000, DEF_STR( On ) )
106    PORT_DIPNAME( 0x0200, 0x0200, DEF_STR( Unknown ) )
107    PORT_DIPSETTING(      0x0200, DEF_STR( Off ) )
108    PORT_DIPSETTING(      0x0000, DEF_STR( On ) )
109    PORT_DIPNAME( 0x0400, 0x0400, DEF_STR( Unknown ) )
110    PORT_DIPSETTING(      0x0400, DEF_STR( Off ) )
111    PORT_DIPSETTING(      0x0000, DEF_STR( On ) )
112    PORT_DIPNAME( 0x0800, 0x0800, DEF_STR( Unknown ) )
113    PORT_DIPSETTING(      0x0800, DEF_STR( Off ) )
114    PORT_DIPSETTING(      0x0000, DEF_STR( On ) )
115    PORT_DIPNAME( 0x1000, 0x1000, DEF_STR( Unknown ) )
116    PORT_DIPSETTING(      0x1000, DEF_STR( Off ) )
117    PORT_DIPSETTING(      0x0000, DEF_STR( On ) )
118    PORT_DIPNAME( 0x2000, 0x2000, DEF_STR( Unknown ) )
119    PORT_DIPSETTING(      0x2000, DEF_STR( Off ) )
120    PORT_DIPSETTING(      0x0000, DEF_STR( On ) )
121    PORT_DIPNAME( 0x4000, 0x4000, DEF_STR( Unknown ) )
122    PORT_DIPSETTING(      0x4000, DEF_STR( Off ) )
123    PORT_DIPSETTING(      0x0000, DEF_STR( On ) )
124    PORT_DIPNAME( 0x8000, 0x8000, DEF_STR( Unknown ) )
125    PORT_DIPSETTING(      0x8000, DEF_STR( Off ) )
126    PORT_DIPSETTING(      0x0000, DEF_STR( On ) )
127INPUT_PORTS_END
128
129
130/*************************
131*    Graphics Layouts    *
132*************************/
133
134static const gfx_layout gfxlayout_8x8x8 =
135{
136/* this is wrong and need to be fixed */
137
138   8,8,
139   RGN_FRAC(1,1),
140   8,
141   { 0, 1, 2, 3, 4, 5, 6, 7 },
142   { 0*8, 1*8, 2*8, 3*8, 4*8, 5*8, 6*8, 7*8 },
143   { 0*64, 1*64, 2*64, 3*64, 4*64, 5*64, 6*64, 7*64 },
144   8*64
145};
146
147
148/******************************
149* Graphics Decode Information *
150******************************/
151
152static GFXDECODE_START( itgambl3 )
153    GFXDECODE_ENTRY( REGION_GFX1, 0, gfxlayout_8x8x8,   0, 16  )
154GFXDECODE_END
155
156
157/**************************
158*      Machine Reset      *
159**************************/
160
161MACHINE_RESET( itgambl3 )
162{
163   /* stop the CPU, we have no code for it anyway */
164   cpunum_set_input_line(machine, 0, INPUT_LINE_HALT, ASSERT_LINE);
165}
166
167
168/**************************
169*     Machine Drivers     *
170**************************/
171
172static MACHINE_DRIVER_START( itgambl3 )
173
174    /* basic machine hardware */
175   MDRV_CPU_ADD_TAG("main", H83044, MAIN_CLOCK)   /* wrong CPU, but we have not a M16C core ATM */
176   MDRV_CPU_PROGRAM_MAP(itgambl3_map,0)
177
178    /* video hardware */
179   MDRV_SCREEN_ADD("main", RASTER)
180   MDRV_SCREEN_REFRESH_RATE(60)
181   MDRV_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(0))
182   MDRV_SCREEN_FORMAT(BITMAP_FORMAT_INDEXED16)
183   MDRV_SCREEN_SIZE(512, 256)
184   MDRV_SCREEN_VISIBLE_AREA(0, 512-1, 0, 256-1)
185   MDRV_MACHINE_RESET( itgambl3 )
186
187   MDRV_GFXDECODE(itgambl3)
188   MDRV_PALETTE_LENGTH(0x200)
189   MDRV_VIDEO_START( itgambl3 )
190   MDRV_VIDEO_UPDATE( itgambl3 )
191
192    /* sound hardware */
193   MDRV_SPEAKER_STANDARD_MONO("mono")
194   MDRV_SOUND_ADD_TAG("oki", OKIM6295, MAIN_CLOCK/16)   /* 1MHz */
195   MDRV_SOUND_CONFIG(okim6295_interface_region_1_pin7high)
196   MDRV_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.0)
197MACHINE_DRIVER_END
198
199
200/*************************
201*        Rom Load        *
202*************************/
203
204/* Euro Jolly X5
205
206CPU:
207
2081x M30624FGAFP-03001A4 (u1)(main)
209
210This one is a Mitsubishi (Renesas) M16/62A 16bit microcomputer.
211It has 256 KB of internal flash ROM + 20 KB of RAM.
212
2131x OKI M6295 (u22)(sound)
2141x TDA2003 (u25)(sound)
2151x LM358M (u23)(sound)
2161x oscillator 16.000MHz (u20)
217
218
219ROMs:
220
2214x M27C4001 (u21, u15, u16, u17)
222
223
224PLDs:
225
2261x ST93C46 (u18)
227(1K 64 x 16 or 128 x 8 serial microwirw EEPROM)
228
2292x ispLSI1032E-70LJ
230
231
232Note:
233
2341x JAMMA style edge connector
2351x RS232 connector (P1) (along with an ST232C controller (u12)
2361x 6 legs jumper (jp1)
2371x 8 legs jumper (jp_1)
2381x 7 legs jumper (jp2)
2391x 4 legs jumper (jp3)
2401x red led (d7)
2411x battery (bt1)
2422x trimmer (r6,r33) (volume)
2431x pushbutton (s1)
244
245*/
246
247ROM_START( ejollyx5 )   /* CPU and clock should be changed for this game */
248   ROM_REGION( 0x1000000, REGION_CPU1, 0 )   /* all the program code is in here */
249   ROM_LOAD( "ejollyx5_m30624fgafp.mcu", 0x00000, 0x4000, NO_DUMP )
250
251   ROM_REGION( 0x180000, REGION_GFX1, 0 )   /* different encoded gfx */
252   ROM_LOAD( "eurojolly5-ep01.u15", 0x000000, 0x80000, CRC(feb4ef88) SHA1(5a86e92326096e4e0619a8aa6b491553eb46839d) )
253   ROM_LOAD( "eurojolly5-ep02.u17", 0x080000, 0x80000, CRC(83b2dab0) SHA1(a65cae227a444fe7474f8f821dbb6a8b506e4ae6) )
254   ROM_LOAD( "eurojolly5-ep03.u16", 0x100000, 0x80000, CRC(a0599d3c) SHA1(f52928cd75b4374a45fad37b7a7c1d39ea31b5f2) )
255
256   ROM_REGION( 0x80000, REGION_SOUND1, 0 ) /* M6295 samples, identical halves */
257   ROM_LOAD( "eurojolly5-msg0.u21", 0x00000, 0x80000, CRC(edc157bc) SHA1(8400251ca7a74a4a0f2d443ae2c0254f1de955ac) )
258ROM_END
259
260
261/* Grand Prix
262
263CPU:
264
2651x M30624FGAFP-251G108 (u21)(main)
266
267This one is a Mitsubishi (Renesas) M16/62A 16bit microcomputer.
268It has 256 KB of internal flash ROM + 20 KB of RAM.
269
2701x OKI M6295 (u2)(sound)
2711x TDA2003 (u1)(sound)
2721x LM358M (u23)(sound)
2731x oscillator 16.000MHz (u9)
274
275
276ROMs:
277
2781x AM27C040 (u3)
2791x MX29F1610 (u22)
280
281
282PLDs:
283
2842x ispLSI1032E-70LJ-E011S03 (u10, U11)
285
286
287Note:
288
2891x JAMMA edge connector (jp9)
2901x 4 legs connector (jp3)
2911x 22x2 legs connector (jp5)
2921x 7x2 legs connector (jp17)
2931x 9 pins (serial?) connector (jp4)
294
2951x battery
2961x trimmer (volume) (rv1)
2971x red led (d1)
2981x pushbutton (test mode) (RDP2)
299
300PCB N? KGS0243-DF070283/03 made in Italy
301
302*/
303
304ROM_START( grandprx )   /* CPU and clock should be changed for this game */
305   ROM_REGION( 0x1000000, REGION_CPU1, 0 )   /* all the program code is in here */
306   ROM_LOAD( "grandprx_m30624fgafp.mcu", 0x00000, 0x4000, NO_DUMP )
307
308   ROM_REGION( 0x200000, REGION_GFX1, 0 )   /* different encoded gfx */
309   ROM_LOAD( "u22.bin", 0x000000, 0x200000, CRC(e8ec804f) SHA1(84e647f693e0273b9b09d7726b814516496121a9) )
310
311   ROM_REGION( 0x80000, REGION_SOUND1, 0 ) /* M6295 samples, identical halves */
312   ROM_LOAD( "u3.bin", 0x00000, 0x80000, CRC(c9bb5858) SHA1(c154df7c7dfe394fc1963dc0c73f1d909f5b62ee) )
313ROM_END
314
315
316/*************************
317*      Game Drivers      *
318*************************/
319
320/*    YEAR  NAME      PARENT  MACHINE   INPUT     INIT ROT    COMPANY        FULLNAME        FLAGS  */
321GAME( 200?, ejollyx5, 0,      itgambl3, itgambl3, 0,   ROT0, "Solar Games", "Euro Jolly X5", GAME_NOT_WORKING )
322GAME( 200?, grandprx, 0,      itgambl3, itgambl3, 0,   ROT0, "4fun",        "Grand Prix",    GAME_NOT_WORKING )
src/mame/drivers/beezer.c
r2844r2845
1111#include "machine/6522via.h"
1212#include "cpu/m6809/m6809.h"
1313#include "sound/dac.h"
14#include "includes/beezer.h"
1415
15/* from video/beezer.c */
16INTERRUPT_GEN( beezer_interrupt );
17VIDEO_UPDATE( beezer );
1816
19/* from machine/beezer.c */
20DRIVER_INIT( beezer );
21WRITE8_HANDLER( beezer_bankswitch_w );
22
2317static ADDRESS_MAP_START( readmem, ADDRESS_SPACE_PROGRAM, 8 )
2418   AM_RANGE(0x0000, 0xbfff) AM_READ(SMH_RAM)
2519   AM_RANGE(0xc000, 0xcfff) AM_READ(SMH_BANK1)
r2844r2845
6660   PORT_BIT( 0x0f, 0x00, IPT_TRACKBALL_Y ) PORT_SENSITIVITY(20) PORT_KEYDELTA(10) PORT_REVERSE
6761
6862   /* Manual says "Dip Switch A" is not used. */
63   PORT_START_TAG("DSWA")
64   PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED )
6965
7066   PORT_START_TAG("DSWB")
7167   PORT_DIPNAME( 0x03, 0x03, DEF_STR( Coinage ) )      PORT_DIPLOCATION("SWB:1,2")
src/mame/drivers/kaneko16.c
r2844r2845
7878#include "sound/2151intf.h"
7979#include "sound/okim6295.h"
8080
81extern void (*toybox_mcu_run)(running_machine *machine);   /* one of the following */
82void bloodwar_mcu_run(running_machine *machine);
83void bonkadv_mcu_run(running_machine *machine);
84void gtmr_mcu_run(running_machine *machine);
85
8681/***************************************************************************
8782
8883
src/mame/drivers/namcos10.c
r2844r2845
372372
373373static MACHINE_RESET( namcos10 )
374374{
375   psx_machine_init();
375   psx_machine_init(machine);
376376}
377377
378378static MACHINE_DRIVER_START( namcos10 )
src/mame/drivers/darkseal.c
r2844r2845
5353   switch (offset<<1)
5454   {
5555      case 0: /* Dip Switches */
56         return (input_port_read_indexed(machine, 3) + (input_port_read_indexed(machine, 4) << 8));
56         return (input_port_read(machine, "DSW1") + (input_port_read(machine, "DSW2") << 8));
5757
5858      case 2: /* Player 1 & Player 2 joysticks & fire buttons */
59         return (input_port_read_indexed(machine, 0) + (input_port_read_indexed(machine, 1) << 8));
59         return (input_port_read(machine, "P1") + (input_port_read(machine, "P2") << 8));
6060
6161      case 4: /* Credits */
62         return input_port_read_indexed(machine, 2);
62         return input_port_read(machine, "IN0");
6363   }
6464
6565   return ~0;
r2844r2845
145145/******************************************************************************/
146146
147147static INPUT_PORTS_START( darkseal )
148   PORT_START   /* Player 1 controls */
148   PORT_START_TAG("P1")   /* Player 1 controls */
149149   PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_8WAY
150150   PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_8WAY
151151   PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_8WAY
r2844r2845
155155   PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNUSED )   /* button 3 - unused */
156156   PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_START1 )
157157
158   PORT_START   /* Player 2 controls */
158   PORT_START_TAG("P2")   /* Player 2 controls */
159159   PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_8WAY PORT_PLAYER(2)
160160   PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_8WAY PORT_PLAYER(2)
161161   PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_8WAY PORT_PLAYER(2)
r2844r2845
165165   PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNUSED )   /* button 3 - unused */
166166   PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_START2 )
167167
168   PORT_START   /* Credits */
168   PORT_START_TAG("IN0")   /* Credits */
169169   PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 )
170170   PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_COIN2 )
171171   PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_COIN3 )
r2844r2845
175175   PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
176176   PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
177177
178   PORT_START   /* Dip switch bank 1 */
178   PORT_START_TAG("DSW1")   /* Dip switch bank 1 */
179179   PORT_DIPNAME( 0x07, 0x07, DEF_STR( Coin_A ) )
180180   PORT_DIPSETTING(    0x00, DEF_STR( 3C_1C ) )
181181   PORT_DIPSETTING(    0x01, DEF_STR( 2C_1C ) )
r2844r2845
201201   PORT_DIPSETTING(    0x80, DEF_STR( Off ) )
202202   PORT_DIPSETTING(    0x00, DEF_STR( On ) )
203203
204   PORT_START   /* Dip switch bank 2 */
204   PORT_START_TAG("DSW2")   /* Dip switch bank 2 */
205205   PORT_DIPNAME( 0x03, 0x03, DEF_STR( Lives ) )
206206   PORT_DIPSETTING(    0x00, "1" )
207207   PORT_DIPSETTING(    0x01, "2" )
src/mame/drivers/system16.c
r2844r2845
28482848GAME( 1989, tturfbl,  tturf,    tturfbl,  tturf,    tturfbl,  ROT0,   "bootleg", "Tough Turf (bootleg)", GAME_IMPERFECT_GRAPHICS | GAME_IMPERFECT_SOUND | GAME_NOT_WORKING )
28492849GAME( 1988, wb3bbl,   wb3,      wb3bbl,   wb3b,     wb3bbl,   ROT0,   "bootleg", "Wonder Boy III - Monster Lair (bootleg)", 0 )
28502850
2851DRIVER_INIT( beautyb )
2851static DRIVER_INIT( beautyb )
28522852{
28532853   UINT16*rom = (UINT16*)memory_region( REGION_CPU1 );
28542854   int x;
src/mame/drivers/simpsons.c
r2844r2845
1414#include "video/konamiic.h"
1515#include "sound/2151intf.h"
1616#include "sound/k053260.h"
17#include "includes/simpsons.h"
1718
18/* from video */
19VIDEO_START( simpsons );
20WRITE8_HANDLER( simpsons_priority_w );
21VIDEO_UPDATE( simpsons );
2219
23/* from machine */
24READ8_HANDLER( simpsons_eeprom_r );
25WRITE8_HANDLER( simpsons_eeprom_w );
26WRITE8_HANDLER( simpsons_coin_counter_w );
27READ8_HANDLER( simpsons_sound_interrupt_r );
28READ8_HANDLER( simpsons_sound_r );
29MACHINE_RESET( simpsons );
30NVRAM_HANDLER( simpsons );
31extern int simpsons_firq_enabled;
32
33
3420/***************************************************************************
3521
3622  Memory Maps
src/mame/drivers/marvins.c
r2844r2845
9696**
9797***************************************************************************/
9898
99extern WRITE8_HANDLER( snkwave_w );
100
10199static int sound_cpu_busy;
102100
103101static const struct namco_interface snkwave_interface =
src/mame/drivers/model1.c
r2844r2845
633633#include "cpu/mb86233/mb86233.h"
634634#include "sound/multipcm.h"
635635#include "sound/2612intf.h"
636#include "includes/model1.h"
636637
637WRITE16_HANDLER( model1_paletteram_w );
638VIDEO_START(model1);
639VIDEO_UPDATE(model1);
640VIDEO_EOF(model1);
641extern UINT16 *model1_display_list0, *model1_display_list1;
642extern UINT16 *model1_color_xlat;
643READ16_HANDLER( model1_listctl_r );
644WRITE16_HANDLER( model1_listctl_w );
645
646READ16_HANDLER( model1_tgp_copro_r );
647WRITE16_HANDLER( model1_tgp_copro_w );
648READ16_HANDLER( model1_tgp_copro_adr_r );
649WRITE16_HANDLER( model1_tgp_copro_adr_w );
650READ16_HANDLER( model1_tgp_copro_ram_r );
651WRITE16_HANDLER( model1_tgp_copro_ram_w );
652
653/* VR */
654extern READ16_HANDLER( model1_vr_tgp_r );
655extern WRITE16_HANDLER( model1_vr_tgp_w );
656extern READ16_HANDLER( model1_tgp_vr_adr_r );
657extern WRITE16_HANDLER( model1_tgp_vr_adr_w );
658extern READ16_HANDLER( model1_vr_tgp_ram_r );
659extern WRITE16_HANDLER( model1_vr_tgp_ram_w );
660extern void model1_vr_tgp_reset( void );
661ADDRESS_MAP_EXTERN( model1_vr_tgp_map, 32 );
662
663638static int model1_sound_irq;
664639
665640#define FIFO_SIZE   (8)
666641static int to_68k[FIFO_SIZE], fifo_wptr, fifo_rptr;
667642
668void model1_tgp_reset(int swa);
669
670643static READ16_HANDLER( io_r )
671644{
672645   if(offset < 0x8)
r2844r2845
801774
802775static WRITE16_HANDLER(md1_w)
803776{
804   extern int model1_dump;
805777   COMBINE_DATA(model1_display_list1+offset);
806778   if(0 && offset)
807779      return;
r2844r2845
811783
812784static WRITE16_HANDLER(md0_w)
813785{
814   extern int model1_dump;
815786   COMBINE_DATA(model1_display_list0+offset);
816787   if(0 && offset)
817788      return;
r2844r2845
15741545   MDRV_SOUND_ROUTE(1, "right", 1.0)
15751546MACHINE_DRIVER_END
15761547
1577extern struct mb86233_config model1_vr_tgp_config;
1578
15791548static MACHINE_DRIVER_START( model1_vr )
15801549   MDRV_CPU_ADD(V60, 16000000)
15811550   MDRV_CPU_PROGRAM_MAP(model1_vr_mem, 0)
src/mame/drivers/polepos.c
r2844r2845
224224#define POLEPOS_TOGGLE   PORT_TOGGLE
225225
226226
227/* from audio */
228void *polepos_sh_start(int clock, const struct CustomSound_interface *config);
229void polepos_sh_reset(void *token);
230WRITE8_HANDLER( polepos_engine_sound_lsb_w );
231WRITE8_HANDLER( polepos_engine_sound_msb_w );
232
233/* from video */
234extern UINT16 *polepos_view16_memory;
235extern UINT16 *polepos_road16_memory;
236extern UINT16 *polepos_alpha16_memory;
237extern UINT16 *polepos_sprite16_memory;
238extern int polepos_gear_bit;
239
240VIDEO_START( polepos );
241PALETTE_INIT( polepos );
242VIDEO_UPDATE( polepos );
243
244WRITE16_HANDLER( polepos_view16_w );
245WRITE16_HANDLER( polepos_road16_w );
246WRITE16_HANDLER( polepos_alpha16_w );
247WRITE16_HANDLER( polepos_sprite16_w );
248WRITE8_HANDLER( polepos_view_w );
249WRITE8_HANDLER( polepos_road_w );
250WRITE8_HANDLER( polepos_alpha_w );
251WRITE8_HANDLER( polepos_sprite_w );
252WRITE8_HANDLER( polepos_chacl_w );
253
254READ16_HANDLER( polepos_view16_r );
255READ16_HANDLER( polepos_road16_r );
256READ16_HANDLER( polepos_alpha16_r );
257READ16_HANDLER( polepos_sprite16_r );
258READ8_HANDLER( polepos_view_r );
259READ8_HANDLER( polepos_road_r );
260READ8_HANDLER( polepos_alpha_r );
261READ8_HANDLER( polepos_sprite_r );
262WRITE16_HANDLER( polepos_view16_hscroll_w );
263WRITE16_HANDLER( polepos_road16_vscroll_w );
264
265
266227/*************************************************************************************/
267228/* Pole Position II protection                                                       */
268229/*************************************************************************************/
src/mame/drivers/jackal.c
r2844r2845
1313  necessarily mean anything.
1414
1515TODO:
16- The high score table colors are wrong, are there proms missing?
1716- Sprite lag
1817- Coin counters don't work correctly, because the register is overwritten by
1918  other routines and the coin counter bits rapidly toggle between 0 and 1.
19- running the sound CPU at the nominal clock rate, music stops working at the
20  beginning of the game. This is kludged by overclocking the sound CPU. This
21  looks like a CPU communication timing issue however fiddling with the
22  interleave factor has no effect.
2023
24
25Memory Map
26----------
27
28MAIN CPU:
29
30Address range 00xxxxxxxxxx---- is handled by the 007343 custom so layout is
31inferred by program behaviour. Note that address lines A8 and A9 are ORed
32together and go to the single A8.9 input of the 007343.
33
34Address          Dir Data     Description
35---------------- --- -------- -----------------------
3600000000000000xx R/W xxxxxxxx 005885 registers
370000000000000100 R/W xxxxxxxx 005885 registers
380000000000010000 R   xxxxxxxx DIPSW1
390000000000010001 R   xxxxxxxx P1 inputs + DIPSW3.4
400000000000010010 R   xxxxxxxx P2 inputs
410000000000010011 R   xxxxxxxx Coin inputs + DIPSW3.1-3
4200000000000101-0 R   xxxxxxxx P1 extra inputs (only used by the bootleg for the rotary control)
4300000000000101-1 R   xxxxxxxx P2 extra inputs (only used by the bootleg for the rotary control)
4400000000000110-0 R   xxxxxxxx DIPSW2
4500000000000111-0   W -------x Coin Counter 1 (to 005924 OUT1 input)
46                   W ------x- Coin Counter 2 (to 005924 OUT2 input)
47                   W -----x-- unknown ("END", to connector SVCN4P pin 4)
48                   W ----x--- sprite RAM bank (to 007343 OBJB input)
49                   W ---x---- 005885 select (to 007343 GATEB input)
50                   W --x----- ROM bank
5100000000000111-1 R/W -------- Watchdog reset (to 005924 AFR input)
5200000000001xxxxx R/W xxxxxxxx scroll RAM (005885)
5300000000010xxxxx R/W xxxxxxxx Z RAM (005885)
54000xxxxxxxxxxxxx R/W xxxxxxxx RAM (shared with sound CPU--note that addresses 0000-005F are handled above so they are excluded)
550010xxxxxxxxxxxx R/W xxxxxxxx video RAM (005885)
560011xxxxxxxxxxxx R/W xxxxxxxx sprite RAM (005885)
5701xxxxxxxxxxxxxx R   xxxxxxxx ROM (banked)
5810xxxxxxxxxxxxxx R   xxxxxxxx ROM (banked)
5911xxxxxxxxxxxxxx R   xxxxxxxx ROM
60
61
62SOUND CPU:
63
64Address          Dir Data     Description
65---------------- --- -------- -----------------------
66000-------------              n.c.
67001------------x R/W xxxxxxxx YM2151
68010-xxxxxxxxxxxx R/W xxxxxxxx 007327 (palette)
69011xxxxxxxxxxxxx R/W xxxxxxxx RAM (shared with main CPU)
701xxxxxxxxxxxxxxx R   xxxxxxxx ROM
71
2172***************************************************************************/
2273
2374#include "driver.h"
2475#include "cpu/m6809/m6809.h"
2576#include "sound/2151intf.h"
77#include "includes/jackal.h"
2678
2779
2880#define MASTER_CLOCK      XTAL_18_432MHz
2981#define SOUND_CLOCK         XTAL_3_579545MHz
3082
3183
32extern UINT8 *jackal_videoctrl;
33
34extern MACHINE_RESET( jackal );
35
36extern READ8_HANDLER( jackal_zram_r );
37extern READ8_HANDLER( jackal_voram_r );
38extern READ8_HANDLER( jackal_spriteram_r );
39
40extern WRITE8_HANDLER( jackal_rambank_w );
41extern WRITE8_HANDLER( jackal_zram_w );
42extern WRITE8_HANDLER( jackal_voram_w );
43extern WRITE8_HANDLER( jackal_spriteram_w );
44
45extern PALETTE_INIT( jackal );
46extern VIDEO_START( jackal );
47extern VIDEO_UPDATE( jackal );
48
4984static int irq_enable;
5085
5186/* Read/Write Handlers */
r2844r2845
66101static ADDRESS_MAP_START( master_map, ADDRESS_SPACE_PROGRAM, 8 )
67102   AM_RANGE(0x0000, 0x0003) AM_RAM AM_BASE(&jackal_videoctrl)   // scroll + other things
68103   AM_RANGE(0x0004, 0x0004) AM_WRITE(jackal_flipscreen_w)
69   AM_RANGE(0x0010, 0x0010) AM_READ(input_port_0_r)
70   AM_RANGE(0x0011, 0x0011) AM_READ(input_port_1_r)
71   AM_RANGE(0x0012, 0x0012) AM_READ(input_port_2_r)
72   AM_RANGE(0x0013, 0x0013) AM_READ(input_port_3_r)
104   AM_RANGE(0x0010, 0x0010) AM_READ_PORT("DSW1")
105   AM_RANGE(0x0011, 0x0011) AM_READ_PORT("IN1")
106   AM_RANGE(0x0012, 0x0012) AM_READ_PORT("IN2")
107   AM_RANGE(0x0013, 0x0013) AM_READ_PORT("IN0")
73108   AM_RANGE(0x0014, 0x0015) AM_READ(topgunbl_rotary_r)
74   AM_RANGE(0x0018, 0x0018) AM_READ(input_port_4_r)
109   AM_RANGE(0x0018, 0x0018) AM_READ_PORT("DSW2")
75110   AM_RANGE(0x0019, 0x0019) AM_WRITE(watchdog_reset_w)
76111   AM_RANGE(0x001c, 0x001c) AM_WRITE(jackal_rambank_w)
77112   AM_RANGE(0x0020, 0x005f) AM_READWRITE(jackal_zram_r, jackal_zram_w)            // MAIN   Z RAM,SUB    Z RAM
r2844r2845
85120static ADDRESS_MAP_START( slave_map, ADDRESS_SPACE_PROGRAM, 8 )
86121   AM_RANGE(0x2000, 0x2000) AM_WRITE(YM2151_register_port_0_w)
87122   AM_RANGE(0x2001, 0x2001) AM_READWRITE(YM2151_status_port_0_r, YM2151_data_port_0_w)
88   AM_RANGE(0x4000, 0x43ff) AM_RAM_WRITE(SMH_RAM) AM_BASE(&paletteram)   // self test only checks 0x4000-0x423f)
123   AM_RANGE(0x4000, 0x43ff) AM_RAM_WRITE(SMH_RAM) AM_BASE(&paletteram)   // self test only checks 0x4000-0x423f, 007327 should actually go up to 4fff
89124   AM_RANGE(0x6000, 0x605f) AM_RAM                                                   // SOUND RAM (Self test check 0x6000-605f, 0x7c00-0x7fff)
90125   AM_RANGE(0x6060, 0x7fff) AM_RAM AM_SHARE(1)
91126   AM_RANGE(0x8000, 0xffff) AM_ROM
r2844r2845
95130
96131static INPUT_PORTS_START( jackal )
97132   PORT_START_TAG("DSW1")
98   PORT_DIPNAME( 0x0f, 0x0f, DEF_STR( Coin_A ) )
133   PORT_DIPNAME( 0x0f, 0x0f, DEF_STR( Coin_A ) ) PORT_DIPLOCATION( "SW1:1,2,3,4" )
99134   PORT_DIPSETTING(    0x02, DEF_STR( 4C_1C ) )
100135   PORT_DIPSETTING(    0x05, DEF_STR( 3C_1C ) )
101136   PORT_DIPSETTING(    0x08, DEF_STR( 2C_1C ) )
r2844r2845
112147   PORT_DIPSETTING(    0x0a, DEF_STR( 1C_6C ) )
113148   PORT_DIPSETTING(    0x09, DEF_STR( 1C_7C ) )
114149   PORT_DIPSETTING(    0x00, DEF_STR( Free_Play ) )
115   PORT_DIPNAME( 0xf0, 0xf0, DEF_STR( Coin_B ) )
150   PORT_DIPNAME( 0xf0, 0xf0, DEF_STR( Coin_B ) ) PORT_DIPLOCATION( "SW1:5,6,7,8" )
116151   PORT_DIPSETTING(    0x20, DEF_STR( 4C_1C ) )
117152   PORT_DIPSETTING(    0x50, DEF_STR( 3C_1C ) )
118153   PORT_DIPSETTING(    0x80, DEF_STR( 2C_1C ) )
r2844r2845
129164   PORT_DIPSETTING(    0xa0, DEF_STR( 1C_6C ) )
130165   PORT_DIPSETTING(    0x90, DEF_STR( 1C_7C ) )
131166
132   PORT_START_TAG("IN1")
133   PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT  ) PORT_8WAY PORT_PLAYER(1)
134   PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_8WAY PORT_PLAYER(1)
135   PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_UP    ) PORT_8WAY PORT_PLAYER(1)
136   PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN  ) PORT_8WAY PORT_PLAYER(1)
137   PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_NAME("P1 Fire") PORT_PLAYER(1)
138   PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_NAME("P1 Bomb") PORT_PLAYER(1)
139   PORT_BIT( 0xc0, IP_ACTIVE_LOW, IPT_UNUSED )
167   PORT_START_TAG("DSW2")
168   PORT_DIPNAME( 0x03, 0x02, DEF_STR( Lives ) ) PORT_DIPLOCATION( "SW2:1,2" )
169   PORT_DIPSETTING(    0x03, "2" )
170   PORT_DIPSETTING(    0x02, "3" )
171   PORT_DIPSETTING(    0x01, "4" )
172   PORT_DIPSETTING(    0x00, "7" )
173   PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unused ) ) PORT_DIPLOCATION( "SW2:3" )
174   PORT_DIPSETTING(    0x04, DEF_STR( Off ) )
175   PORT_DIPSETTING(    0x00, DEF_STR( On ) )
176   PORT_DIPNAME( 0x18, 0x18, DEF_STR( Bonus_Life ) ) PORT_DIPLOCATION( "SW2:4,5" )
177   PORT_DIPSETTING(    0x18, "30K 150K" )
178   PORT_DIPSETTING(    0x10, "50K 200K" )
179   PORT_DIPSETTING(    0x08, "30K" )
180   PORT_DIPSETTING(    0x00, "50K" )
181   PORT_DIPNAME( 0x60, 0x40, DEF_STR( Difficulty ) ) PORT_DIPLOCATION( "SW2:6,7" )
182   PORT_DIPSETTING(    0x60, DEF_STR( Easy ) )
183   PORT_DIPSETTING(    0x40, DEF_STR( Normal ) )
184   PORT_DIPSETTING(    0x20, "Difficult" )
185   PORT_DIPSETTING(    0x00, "Very Difficult" )
186   PORT_DIPNAME( 0x80, 0x00, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION( "SW2:8" )
187   PORT_DIPSETTING(    0x80, DEF_STR( Off ) )
188   PORT_DIPSETTING(    0x00, DEF_STR( On ) )
140189
141   PORT_START_TAG("IN2")
142   PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT  ) PORT_8WAY PORT_PLAYER(2)
143   PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_8WAY PORT_PLAYER(2)
144   PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_UP    ) PORT_8WAY PORT_PLAYER(2)
145   PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN  ) PORT_8WAY PORT_PLAYER(2)
146   PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_NAME("P2 Fire") PORT_PLAYER(2)
147   PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_NAME("P2 Bomb") PORT_PLAYER(2)
148   PORT_BIT( 0xc0, IP_ACTIVE_LOW, IPT_UNUSED )
149
150190   PORT_START_TAG("IN0")
151191   PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 )
152192   PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_COIN2 )
153193   PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_SERVICE1 )
154194   PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_START1 )
155195   PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_START2 )
156   PORT_DIPNAME( 0x20, 0x20, DEF_STR( Flip_Screen ) )
196   PORT_DIPNAME( 0x20, 0x20, DEF_STR( Flip_Screen ) ) PORT_DIPLOCATION( "SW3:1" )
157197   PORT_DIPSETTING(    0x20, DEF_STR( Off ) )
158198   PORT_DIPSETTING(    0x00, DEF_STR( On ) )
159   PORT_DIPNAME( 0x40, 0x00, "Sound Adjustment" )
199   PORT_DIPNAME( 0x40, 0x00, "Sound Adjustment" ) PORT_DIPLOCATION( "SW3:2" )
160200   PORT_DIPSETTING(    0x00, DEF_STR( Upright ) )
161201   PORT_DIPSETTING(    0x40, DEF_STR( Cocktail ) )
162   PORT_DIPNAME( 0x80, 0x00, "Sound Mode" )
202   PORT_DIPNAME( 0x80, 0x00, "Sound Mode" ) PORT_DIPLOCATION( "SW3:3" )
163203   PORT_DIPSETTING(    0x80, DEF_STR( Mono ) )
164204   PORT_DIPSETTING(    0x00, DEF_STR( Stereo ) )
165205
166   PORT_START_TAG("DSW2")
167   PORT_DIPNAME( 0x03, 0x02, DEF_STR( Lives ) )
168   PORT_DIPSETTING(    0x03, "2" )
169   PORT_DIPSETTING(    0x02, "3" )
170   PORT_DIPSETTING(    0x01, "4" )
171   PORT_DIPSETTING(    0x00, "7" )
172   PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNUSED )
173   PORT_DIPNAME( 0x18, 0x18, DEF_STR( Bonus_Life ) )
174   PORT_DIPSETTING(    0x18, "30K 150K" )
175   PORT_DIPSETTING(    0x10, "50K 200K" )
176   PORT_DIPSETTING(    0x08, "30K" )
177   PORT_DIPSETTING(    0x00, "50K" )
178   PORT_DIPNAME( 0x60, 0x40, DEF_STR( Difficulty ) )
179   PORT_DIPSETTING(    0x60, DEF_STR( Easy ) )
180   PORT_DIPSETTING(    0x40, DEF_STR( Normal ) )
181   PORT_DIPSETTING(    0x20, "Difficult" )
182   PORT_DIPSETTING(    0x00, "Very Difficult" )
183   PORT_DIPNAME( 0x80, 0x00, DEF_STR( Demo_Sounds ) )
206   PORT_START_TAG("IN1")
207   PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT  ) PORT_8WAY PORT_PLAYER(1)
208   PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_8WAY PORT_PLAYER(1)
209   PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_UP    ) PORT_8WAY PORT_PLAYER(1)
210   PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN  ) PORT_8WAY PORT_PLAYER(1)
211   PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_NAME("P1 Fire") PORT_PLAYER(1)
212   PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_NAME("P1 Bomb") PORT_PLAYER(1)
213   PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNUSED )   // P1 button 3
214   PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unused ) ) PORT_DIPLOCATION( "SW3:4" )
184215   PORT_DIPSETTING(    0x80, DEF_STR( Off ) )
185216   PORT_DIPSETTING(    0x00, DEF_STR( On ) )
217
218   PORT_START_TAG("IN2")
219   PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT  ) PORT_8WAY PORT_PLAYER(2)
220   PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_8WAY PORT_PLAYER(2)
221   PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_UP    ) PORT_8WAY PORT_PLAYER(2)
222   PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN  ) PORT_8WAY PORT_PLAYER(2)
223   PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_NAME("P2 Fire") PORT_PLAYER(2)
224   PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_NAME("P2 Bomb") PORT_PLAYER(2)
225   PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNUSED )   // P2 button 3
226   PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNUSED )
186227INPUT_PORTS_END
187228
188229static INPUT_PORTS_START( topgunbl )
r2844r2845
238279/* Graphics Decode Information */
239280
240281static GFXDECODE_START( jackal )
241   GFXDECODE_ENTRY( REGION_GFX1, 0x00000, charlayout,               0, 16 )   // colors 256-511 with lookup
242   GFXDECODE_ENTRY( REGION_GFX1, 0x20000, spritelayout,        256*16, 16 )   // colors   0- 15 with lookup
243   GFXDECODE_ENTRY( REGION_GFX1, 0x20000, spritelayout8,       256*16, 16 )   // to handle 8x8 sprites
244   GFXDECODE_ENTRY( REGION_GFX1, 0x60000, spritelayout,  256*16+16*16, 16 )   // colors  16- 31 with lookup
245   GFXDECODE_ENTRY( REGION_GFX1, 0x60000, spritelayout8, 256*16+16*16, 16 )   // to handle 8x8 sprites
282   GFXDECODE_ENTRY( REGION_GFX1, 0x00000, charlayout,        0,  1 )   // colors 256-511 without lookup
283   GFXDECODE_ENTRY( REGION_GFX1, 0x20000, spritelayout,  0x100, 16 )   // colors   0- 15 with lookup
284   GFXDECODE_ENTRY( REGION_GFX1, 0x20000, spritelayout8, 0x100, 16 )   // to handle 8x8 sprites
285   GFXDECODE_ENTRY( REGION_GFX1, 0x60000, spritelayout,  0x200, 16 )   // colors  16- 31 with lookup
286   GFXDECODE_ENTRY( REGION_GFX1, 0x60000, spritelayout8, 0x200, 16 )   // to handle 8x8 sprites
246287GFXDECODE_END
247288
248289/* Interrupt Generator */
r2844r2845
250291static INTERRUPT_GEN( jackal_interrupt )
251292{
252293   if (irq_enable)
294   {
253295      cpunum_set_input_line(machine, 0, 0, HOLD_LINE);
296      cpunum_set_input_line(machine, 1, INPUT_LINE_NMI, PULSE_LINE);
297   }
254298}
255299
256300/* Machine Driver */
r2844r2845
278322   MDRV_SCREEN_VISIBLE_AREA(1*8, 31*8-1, 2*8, 30*8-1)
279323
280324   MDRV_GFXDECODE(jackal)
281   MDRV_PALETTE_LENGTH(256*16+16*16+16*16)
325   MDRV_PALETTE_LENGTH(0x300)
282326
283327   MDRV_PALETTE_INIT(jackal)
284328   MDRV_VIDEO_START(jackal)
r2844r2845
396440
397441/* Game Drivers */
398442
399GAME( 1986, jackal,   0,      jackal, jackal,   0, ROT90, "Konami", "Jackal (World)", GAME_IMPERFECT_COLORS )
400GAME( 1986, topgunr,  jackal, jackal, jackal,   0, ROT90, "Konami", "Top Gunner (US)", GAME_IMPERFECT_COLORS )
401GAME( 1986, jackalj,  jackal, jackal, jackal,   0, ROT90, "Konami", "Tokushu Butai Jackal (Japan)", GAME_IMPERFECT_COLORS )
402GAME( 1986, topgunbl, jackal, jackal, topgunbl, 0, ROT90, "bootleg", "Top Gunner (bootleg)", GAME_IMPERFECT_COLORS )
443GAME( 1986, jackal,   0,      jackal, jackal,   0, ROT90, "Konami", "Jackal (World)", 0 )
444GAME( 1986, topgunr,  jackal, jackal, jackal,   0, ROT90, "Konami", "Top Gunner (US)", 0 )
445GAME( 1986, jackalj,  jackal, jackal, jackal,   0, ROT90, "Konami", "Tokushu Butai Jackal (Japan)", 0 )
446GAME( 1986, topgunbl, jackal, jackal, topgunbl, 0, ROT90, "bootleg", "Top Gunner (bootleg)", 0 )
src/mame/drivers/btime.c
r2844r2845
5050#include "deprecat.h"
5151#include "cpu/m6502/m6502.h"
5252#include "sound/ay8910.h"
53#include "includes/btime.h"
5354
54
55extern UINT8 *btime_videoram;
56extern size_t btime_videoram_size;
57extern UINT8 *btime_colorram;
58extern UINT8 *lnc_charbank;
59extern UINT8 *bnj_backgroundram;
60extern size_t bnj_backgroundram_size;
61extern UINT8 *zoar_scrollram;
62extern UINT8 *deco_charram;
63
64PALETTE_INIT( btime );
65PALETTE_INIT( lnc );
66
67MACHINE_RESET( lnc );
68
69VIDEO_START( btime );
70VIDEO_START( bnj );
71
72
73VIDEO_UPDATE( btime );
74VIDEO_UPDATE( cookrace );
75VIDEO_UPDATE( bnj );
76VIDEO_UPDATE( lnc );
77VIDEO_UPDATE( zoar );
78VIDEO_UPDATE( disco );
79VIDEO_UPDATE( eggs );
80
81WRITE8_HANDLER( btime_paletteram_w );
82WRITE8_HANDLER( bnj_background_w );
83WRITE8_HANDLER( bnj_scroll1_w );
84WRITE8_HANDLER( bnj_scroll2_w );
85READ8_HANDLER( btime_mirrorvideoram_r );
86WRITE8_HANDLER( btime_mirrorvideoram_w );
87READ8_HANDLER( btime_mirrorcolorram_r );
88WRITE8_HANDLER( btime_mirrorcolorram_w );
89WRITE8_HANDLER( lnc_videoram_w );
90WRITE8_HANDLER( lnc_mirrorvideoram_w );
91WRITE8_HANDLER( deco_charram_w );
92
93WRITE8_HANDLER( zoar_video_control_w );
94WRITE8_HANDLER( btime_video_control_w );
95WRITE8_HANDLER( bnj_video_control_w );
96WRITE8_HANDLER( lnc_video_control_w );
97WRITE8_HANDLER( disco_video_control_w );
98
99INTERRUPT_GEN( lnc_sound_interrupt );
100
10155static WRITE8_HANDLER( audio_command_w );
10256
103READ8_HANDLER( mmonkey_protection_r );
104WRITE8_HANDLER( mmonkey_protection_w );
105
106
10757static UINT8 *decrypted;
10858static UINT8 *rambase;
10959static UINT8 *audio_rambase;
src/mame/drivers/cps1.c
r2844r2845
167167   return (in << 8) | 0xff;
168168}
169169
170READ16_HANDLER( cps1_hack_dsw_r )
170static READ16_HANDLER( cps1_hack_dsw_r )
171171{
172172   static const char *const dswname[] = { "IN0", "DSWA", "DSWB", "DSWC" };
173173   int in = input_port_read(machine, dswname[offset]);
src/mame/drivers/scobra.c
r2844r2845
1919Notes/Tidbits:
2020-------------
2121
22- Moonwar: 8255 Port C bit 4 was originally designed so when bit4=0, 1P spinner
23  is selected, and when bit4=1, 2P spinner gets selected.  But they forgot to
24  change the 8255 initialization value and Port C was set to input, setting the
25  spinner select bit to HI regardless what was written to it. This bug has been
26  corrected in the newer set, but, to maintain hardware compatibility with
27  older PCB's, they had to reverse to active status of the select bit.  So in the
28  newer set, Bit4=1 selects the 1P spinner and Bit4=0 selects the 2P spinner.
29
3022- Armored Car sets Port C as well, but it's input only and the games uses other
3123  bits for the 2nd player controls.  Maybe the games was meant to use 2 joysticks
3224  at one time.
3325
34- Calipso was apperantly redesigned for two player simultanious play.
35  There is code at $298a to flip the screen, but location $8669 has to be
36  set to 2. It's set to 1 no matter how many players are playing.
37  It's possible that there is a cocktail version of the game.
38
3926- Video Hustler and its two bootlegs all have identical code, the only
4027  differences are the title, copyright removed, different encryptions or
4128  no encryption, plus hustlerb has a different memory map.
r2844r2845
601588   PORT_DIPSETTING(    0x00, "A 1/99  B 1/3" )
602589INPUT_PORTS_END
603590
604static INPUT_PORTS_START( armorcar )
605   PORT_START_TAG("IN0")
606   PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_4WAY PORT_COCKTAIL
607   PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON2 )
608   PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) )
609   PORT_DIPSETTING(    0x04, DEF_STR( Off ) )
610   PORT_DIPSETTING(    0x00, DEF_STR( On ) )
611   PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_BUTTON1 )
612   PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_4WAY
613   PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_4WAY
614   PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_COIN2 )
615   PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_COIN1 )
616591
617   PORT_START_TAG("IN1")
618   PORT_DIPNAME( 0x01, 0x01, DEF_STR( Lives ) )
619   PORT_DIPSETTING(    0x01, "3" )
620   PORT_DIPSETTING(    0x00, "5" )
621   PORT_DIPNAME( 0x02, 0x00, DEF_STR( Demo_Sounds ) )
622   PORT_DIPSETTING(    0x02, DEF_STR( Off ) )
623   PORT_DIPSETTING(    0x00, DEF_STR( On ) )
624   PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_COCKTAIL
625   PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_COCKTAIL
626   PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_4WAY PORT_COCKTAIL
627   PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_4WAY PORT_COCKTAIL
628   PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_START2 )
629   PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_START1 )
630592
631   PORT_START_TAG("IN2")
632   PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_4WAY PORT_COCKTAIL
633   PORT_DIPNAME( 0x06, 0x02, DEF_STR( Coinage ) )
634   PORT_DIPSETTING(    0x02, DEF_STR( 1C_1C ) )
635   PORT_DIPSETTING(    0x00, "Coin A 1/2 Coin B 2/1" )
636   PORT_DIPSETTING(    0x04, "Coin A 1/3 Coin B 3/1" )
637   PORT_DIPSETTING(    0x06, "Coin A 1/4 Coin B 4/1" )
638   PORT_DIPNAME( 0x08, 0x08, DEF_STR( Cabinet ) )
639   PORT_DIPSETTING(    0x08, DEF_STR( Upright ) )
640   PORT_DIPSETTING(    0x00, DEF_STR( Cocktail ) )
641   PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_4WAY
642   PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) )
643   PORT_DIPSETTING(    0x20, DEF_STR( Off ) )
644   PORT_DIPSETTING(    0x00, DEF_STR( On ) )
645   PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_4WAY
646   PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) )
647   PORT_DIPSETTING(    0x80, DEF_STR( Off ) )
648   PORT_DIPSETTING(    0x00, DEF_STR( On ) )
649INPUT_PORTS_END
650
651#define MOONWAR_COMMON\
652   PORT_START_TAG("IN0")\
653   PORT_BIT( 0x1f, IP_ACTIVE_LOW, IPT_SPECIAL ) /* the spinner */\
654   PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_COCKTAIL\
655   PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_COIN2 )\
656   PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_COIN1 )\
657   PORT_START_TAG("IN1")\
658   PORT_DIPNAME( 0x03, 0x00, DEF_STR( Lives ) )\
659   PORT_DIPSETTING(    0x00, "3" )\
660   PORT_DIPSETTING(    0x01, "4" )\
661   PORT_DIPSETTING(    0x02, "5" )\
662   PORT_DIPSETTING(    0x03, DEF_STR( Free_Play ) )\
663   PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_START1 )\
664   PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_START2 )\
665   PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_COCKTAIL\
666   PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON3 )\
667   PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_BUTTON2 )\
668   PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_BUTTON1 )
669
670static INPUT_PORTS_START( moonwar )
671   MOONWAR_COMMON
672
673   PORT_START_TAG("IN2")
674   PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_COCKTAIL
675   PORT_DIPNAME( 0x06, 0x02, DEF_STR( Coinage ) )
676   PORT_DIPSETTING(    0x02, DEF_STR( 1C_1C ) )
677   PORT_DIPSETTING(    0x00, DEF_STR( 1C_2C ) )
678   PORT_DIPSETTING(    0x04, DEF_STR( 1C_3C ) )
679   PORT_DIPSETTING(    0x06, DEF_STR( 1C_4C ) )
680   PORT_DIPNAME( 0x08, 0x00, DEF_STR( Cabinet ) )
681   PORT_DIPSETTING(    0x00, DEF_STR( Upright ) )
682   PORT_DIPSETTING(    0x08, DEF_STR( Cocktail ) )
683   PORT_BIT( 0xf0, IP_ACTIVE_LOW, IPT_UNUSED )   /* output bits */
684
685   PORT_START_TAG("IN3")      /* IN3/4 - dummy ports for the dial */
686   PORT_BIT( 0xff, 0x00, IPT_DIAL ) PORT_SENSITIVITY(25) PORT_KEYDELTA(10) PORT_RESET
687
688   PORT_START_TAG("IN4")
689   PORT_BIT( 0xff, 0x00, IPT_DIAL ) PORT_SENSITIVITY(25) PORT_KEYDELTA(10) PORT_RESET PORT_COCKTAIL
690INPUT_PORTS_END
691
692/* same as above, but coinage is different */
693static INPUT_PORTS_START( moonwara )
694   MOONWAR_COMMON
695
696   PORT_START_TAG("IN2")
697   PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_COCKTAIL
698   PORT_DIPNAME( 0x06, 0x00, DEF_STR( Coinage ) )
699   PORT_DIPSETTING(    0x00, DEF_STR( 1C_1C ) )
700   PORT_DIPSETTING(    0x02, DEF_STR( 1C_2C ) )
701   PORT_DIPSETTING(    0x04, DEF_STR( 1C_3C ) )
702   PORT_DIPSETTING(    0x06, DEF_STR( 1C_4C ) )
703   PORT_DIPNAME( 0x08, 0x00, DEF_STR( Cabinet ) )
704   PORT_DIPSETTING(    0x00, DEF_STR( Upright ) )
705   PORT_DIPSETTING(    0x08, DEF_STR( Cocktail ) )
706   PORT_BIT( 0xf0, IP_ACTIVE_LOW, IPT_UNUSED )   /* output bits */
707
708   PORT_START_TAG("IN3")      /* IN3/4 - dummy ports for the dial */
709   PORT_BIT( 0xff, 0x00, IPT_DIAL ) PORT_SENSITIVITY(25) PORT_KEYDELTA(10) PORT_RESET
710
711   PORT_START_TAG("IN4")      /* doesn't actually work due to bug in game code */
712   PORT_BIT( 0xff, 0x00, IPT_DIAL ) PORT_SENSITIVITY(25) PORT_KEYDELTA(10) PORT_RESET PORT_COCKTAIL
713INPUT_PORTS_END
714
715static INPUT_PORTS_START( spdcoin )
716   PORT_START_TAG("IN0")
717   PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNUSED )
718   PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_START1 )
719   PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNUSED )
720   PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_START2 )
721   PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT )
722   PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT )
723   PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_COIN2 )
724   PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_COIN1 )
725
726   PORT_START_TAG("IN1")
727   PORT_DIPNAME( 0x01, 0x00, "Freeze" )         /* Dip Sw #2 */
728   PORT_DIPSETTING(    0x00, DEF_STR( Off ) )
729   PORT_DIPSETTING(    0x01, DEF_STR( On ) )
730   PORT_DIPNAME( 0x02, 0x00, DEF_STR( Free_Play ) )   /* Dip Sw #1 */
731   PORT_DIPSETTING(    0x00, DEF_STR( Off ) )
732   PORT_DIPSETTING(    0x02, DEF_STR( On ) )
733   PORT_BIT( 0xfc, IP_ACTIVE_LOW, IPT_UNUSED )
734
735   PORT_START_TAG("IN2")
736   PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNUSED )
737   PORT_DIPNAME( 0x02, 0x00, DEF_STR( Unknown ) )      /* Dip Sw #5 - Check code at 0x0569 */
738   PORT_DIPSETTING(    0x02, DEF_STR( Off ) )
739   PORT_DIPSETTING(    0x00, DEF_STR( On ) )
740   PORT_DIPNAME( 0x04, 0x00, DEF_STR( Difficulty ) )   /* Dip Sw #4 */
741   PORT_DIPSETTING(    0x00, DEF_STR( Easy ) )
742   PORT_DIPSETTING(    0x04, DEF_STR( Hard ) )
743   PORT_DIPNAME( 0x08, 0x08, DEF_STR( Lives ) )      /* Dip Sw #3 */
744   PORT_DIPSETTING(    0x08, "3" )
745   PORT_DIPSETTING(    0x00, "5" )
746   PORT_BIT( 0xf0, IP_ACTIVE_LOW, IPT_UNUSED )
747INPUT_PORTS_END
748
749593/* cocktail mode is N/A */
750594static INPUT_PORTS_START( darkplnt )
751595   PORT_START_TAG("IN0")
r2844r2845
830674   PORT_DIPSETTING(    0x00, DEF_STR( On ) )
831675INPUT_PORTS_END
832676
833/* cocktail mode is N/A */
834static INPUT_PORTS_START( calipso )
835   PORT_START_TAG("IN0")
836   PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(2)
837   PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN )
838   PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_8WAY
839   PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_8WAY
840   PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_8WAY
841   PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_8WAY
842   PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_COIN2 )
843   PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_COIN1 )
844677
845   PORT_START_TAG("IN1")
846   PORT_DIPNAME( 0x01, 0x01, DEF_STR( Lives ) )
847   PORT_DIPSETTING(    0x01, "3" )
848   PORT_DIPSETTING(    0x00, "5" )
849   PORT_DIPNAME( 0x02, 0x00, DEF_STR( Demo_Sounds ) )
850   PORT_DIPSETTING(    0x02, DEF_STR( Off ) )
851   PORT_DIPSETTING(    0x00, DEF_STR( On ) )
852   PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_8WAY PORT_PLAYER(2)
853   PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_8WAY PORT_PLAYER(2)
854   PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_8WAY PORT_PLAYER(2)
855   PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_8WAY PORT_PLAYER(2)
856   PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
857   PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
858
859   PORT_START_TAG("IN2")
860   PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON1 )
861   PORT_DIPNAME( 0x06, 0x02, DEF_STR( Coinage ) )
862   PORT_DIPSETTING(    0x02, DEF_STR( 1C_1C ) )
863   PORT_DIPSETTING(    0x00, DEF_STR( 1C_2C ) )
864   PORT_DIPSETTING(    0x04, DEF_STR( 1C_3C ) )
865   PORT_DIPSETTING(    0x06, DEF_STR( 1C_4C ) )
866   PORT_DIPNAME( 0x08, 0x08, "Cabinet (Not Supported)" )
867   PORT_DIPSETTING(    0x08, DEF_STR( Upright ) )
868   PORT_DIPSETTING(    0x00, DEF_STR( Cocktail ) )
869   PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN )
870   PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN )
871   PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
872   PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
873INPUT_PORTS_END
874
875678/* cocktail mode not working due to bug in game code */
876679static INPUT_PORTS_START( anteater )
877680   PORT_START_TAG("IN0")
r2844r2845
1183986   PORT_DIPSETTING(    0x00, DEF_STR( On ) )
1184987INPUT_PORTS_END
1185988
1186/* cocktail mode is N/A */
1187static INPUT_PORTS_START( superbon )
1188   PORT_START_TAG("IN0")
1189   PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_START2 )
1190   PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_START1 )
1191   PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_8WAY
1192   PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_8WAY
1193   PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT) PORT_8WAY
1194   PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_8WAY
1195   PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_COIN2 )
1196   PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_COIN1 )
1197989
1198   PORT_START_TAG("IN1")
1199   PORT_DIPNAME( 0x03, 0x01, DEF_STR( Lives ) )
1200   PORT_DIPSETTING(    0x01, "3" )
1201   PORT_DIPSETTING(    0x02, "5" )
1202   PORT_DIPSETTING(    0x03, DEF_STR( Free_Play ) )
1203   PORT_DIPSETTING(    0x00, "Invulnerability (Cheat)")
1204   PORT_DIPNAME( 0x04, 0x00, DEF_STR( Unknown ) )
1205   PORT_DIPSETTING(    0x04, DEF_STR( Off ) )
1206   PORT_DIPSETTING(    0x00, DEF_STR( On ) )
1207   PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_BUTTON1 )
1208   PORT_DIPNAME( 0x10, 0x00, DEF_STR( Unknown ) )
1209   PORT_DIPSETTING(    0x10, DEF_STR( Off ) )
1210   PORT_DIPSETTING(    0x00, DEF_STR( On ) )
1211   PORT_DIPNAME( 0x20, 0x00, DEF_STR( Unknown ) )
1212   PORT_DIPSETTING(    0x20, DEF_STR( Off ) )
1213   PORT_DIPSETTING(    0x00, DEF_STR( On ) )
1214   PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_BUTTON2 )
1215   PORT_DIPNAME( 0x80, 0x00, DEF_STR( Unknown ) )
1216   PORT_DIPSETTING(    0x80, DEF_STR( Off ) )
1217   PORT_DIPSETTING(    0x00, DEF_STR( On ) )
1218
1219   PORT_START_TAG("DSW")
1220   PORT_DIPNAME( 0x01, 0x00, DEF_STR( Unknown ) )
1221   PORT_DIPSETTING(    0x01, DEF_STR( Off ) )
1222   PORT_DIPSETTING(    0x00, DEF_STR( On ) )
1223   PORT_DIPNAME( 0x06, 0x02, DEF_STR( Coinage ) )
1224   PORT_DIPSETTING(    0x02, DEF_STR( 1C_1C ) )
1225   PORT_DIPSETTING(    0x00, "A 1/2 B 2/1" )
1226   PORT_DIPSETTING(    0x04, "A 1/3 B 3/1" )
1227   PORT_DIPSETTING(    0x06, "A 1/4 B 4/1" )
1228   PORT_DIPNAME( 0x08, 0x00, DEF_STR( Unknown ) )
1229   PORT_DIPSETTING(    0x08, DEF_STR( Off ) )
1230   PORT_DIPSETTING(    0x00, DEF_STR( On ) )
1231   PORT_DIPNAME( 0x10, 0x00, DEF_STR( Unknown ) )
1232   PORT_DIPSETTING(    0x10, DEF_STR( Off ) )
1233   PORT_DIPSETTING(    0x00, DEF_STR( On ) )
1234   PORT_DIPNAME( 0x20, 0x00, DEF_STR( Unknown ) )
1235   PORT_DIPSETTING(    0x20, DEF_STR( Off ) )
1236   PORT_DIPSETTING(    0x00, DEF_STR( On ) )
1237   PORT_DIPNAME( 0x40, 0x00, DEF_STR( Unknown ) )
1238   PORT_DIPSETTING(    0x40, DEF_STR( Off ) )
1239   PORT_DIPSETTING(    0x00, DEF_STR( On ) )
1240   PORT_DIPNAME( 0x80, 0x00, DEF_STR( Unknown ) )
1241   PORT_DIPSETTING(    0x80, DEF_STR( Off ) )
1242   PORT_DIPSETTING(    0x00, DEF_STR( On ) )
1243INPUT_PORTS_END
1244
1245990static INPUT_PORTS_START( hustler )
1246991   PORT_START_TAG("IN0")
1247992   PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_8WAY PORT_COCKTAIL
r2844r2845
14111156MACHINE_DRIVER_END
14121157
14131158
1414static MACHINE_DRIVER_START( superbon )
1415   /* basic machine hardware */
1416   MDRV_IMPORT_FROM(type1)
14171159
1418   /* device config overrides */
1419   MDRV_DEVICE_MODIFY( "ppi8255_0", PPI8255 )
1420   MDRV_DEVICE_CONFIG( scramble_ppi8255_intf[0] )
1421
1422   MDRV_DEVICE_MODIFY( "ppi8255_1", PPI8255 )
1423   MDRV_DEVICE_CONFIG( scramble_ppi8255_intf[1] )
1424MACHINE_DRIVER_END
1425
1426/* same as regular type 1, the only difference that it has long bullets */
1427static MACHINE_DRIVER_START( armorcar )
1428
1429   /* basic machine hardware */
1430   MDRV_IMPORT_FROM(type1)
1431
1432   /* video hardware */
1433   MDRV_PALETTE_LENGTH(32+64+2)   /* 32 for characters, 64 for stars, 2 for bullets */
1434
1435   MDRV_PALETTE_INIT(galaxold)
1436   MDRV_VIDEO_START(theend)
1437MACHINE_DRIVER_END
1438
1439
1440/* same as regular type 1, the only difference is that the bullets are less yellow */
1441static MACHINE_DRIVER_START( moonwar )
1442
1443   /* basic machine hardware */
1444   MDRV_IMPORT_FROM(type1)
1445
1446   /* device config overrides */
1447   MDRV_DEVICE_MODIFY( "ppi8255_0", PPI8255 )
1448   MDRV_DEVICE_CONFIG( moonwar_ppi8255_intf[0] )
1449
1450   MDRV_DEVICE_MODIFY( "ppi8255_1", PPI8255 )
1451   MDRV_DEVICE_CONFIG( moonwar_ppi8255_intf[1] )
1452
1453   /* video hardware */
1454   MDRV_PALETTE_LENGTH(32+64+2+1)   /* 32 for characters, 64 for stars, 2 for bullets, 1 for bg */
1455
1456   MDRV_PALETTE_INIT(moonwar)
1457MACHINE_DRIVER_END
1458
1459
14601160/* Rescue, Minefield and Strategy X have extra colors, and custom video initialise */
14611161/* routines to set up the graduated color backgound they use */
14621162static MACHINE_DRIVER_START( rescue )
r2844r2845
14891189MACHINE_DRIVER_END
14901190
14911191
1492/* same as the others, but no sprite flipping, but instead the bits are used
1493   as extra sprite code bits, giving 256 sprite images */
1494static MACHINE_DRIVER_START( calipso )
1495
1496   /* basic machine hardware */
1497   MDRV_IMPORT_FROM(type1)
1498
1499   /* video hardware */
1500   MDRV_VIDEO_START(calipso)
1501MACHINE_DRIVER_END
1502
1503
15041192static MACHINE_DRIVER_START( mimonkey )
15051193
15061194   /* basic machine hardware */
r2844r2845
17801468   ROM_LOAD( "strategy.10k", 0x0000, 0x0020, CRC(d95c0318) SHA1(83e5355fdca7b4e1fb5a0e6eeaacfbf9561e2c36) )
17811469ROM_END
17821470
1783ROM_START( armorcar )
1784   ROM_REGION( 0x10000, REGION_CPU1, 0 )
1785   ROM_LOAD( "cpu.2c",       0x0000, 0x1000, CRC(0d7bfdfb) SHA1(47791d4fc298c25d29584dfcddcd92618e3750c5) )
1786   ROM_LOAD( "cpu.2e",       0x1000, 0x1000, CRC(76463213) SHA1(86dbbed25325cc8855c1eb39bbb11b0473b7f4b5) )
1787   ROM_LOAD( "cpu.2f",       0x2000, 0x1000, CRC(2cc6d5f0) SHA1(94abb33760aed206f0f90f035fe2977c1f2e26cf) )
1788   ROM_LOAD( "cpu.2h",       0x3000, 0x1000, CRC(61278dbb) SHA1(e12cd6c499af75f77e549499093fe6d2e8eddb1d) )
1789   ROM_LOAD( "cpu.2j",       0x4000, 0x1000, CRC(fb158d8c) SHA1(efa70e92c56678d4a404a96c72cfee317b15648c) )
17901471
1791   ROM_REGION( 0x10000, REGION_CPU2, 0 )
1792   ROM_LOAD( "sound.5c",     0x0000, 0x0800, CRC(54ee7753) SHA1(3ebfa2cadf33acb4d24aa50cfa4713355cc780a3) )
1793   ROM_LOAD( "sound.5d",     0x0800, 0x0800, CRC(5218fec0) SHA1(c8f84f1e6aafc544e5acf48b245e8b1edb63211e) )
1794
1795   ROM_REGION( 0x1000, REGION_GFX1, ROMREGION_DISPOSE )
1796   ROM_LOAD( "cpu.5f",       0x0000, 0x0800, CRC(8a3da4d1) SHA1(4d2ef48aeb9099fdd145e11e2485e0bf8d87290d) )
1797   ROM_LOAD( "cpu.5h",       0x0800, 0x0800, CRC(85bdb113) SHA1(f62da0ea0c29feb10d8d1ce8de28fd750a53b40a) )
1798
1799   ROM_REGION( 0x0020, REGION_PROMS, 0 )
1800   ROM_LOAD( "82s123.6e",    0x0000, 0x0020, CRC(9b87f90d) SHA1(d11ac5e4a6057301ea2a9cbb404c2b978eb4c1dc) )
1801ROM_END
1802
1803ROM_START( armorca2 )
1804   ROM_REGION( 0x10000, REGION_CPU1, 0 )
1805   ROM_LOAD( "2c",           0x0000, 0x1000, CRC(e393bd2f) SHA1(6a5079d1f5d724e5f643cbc5352fc43d0b652e05) )
1806   ROM_LOAD( "2e",           0x1000, 0x1000, CRC(b7d443af) SHA1(1ce41e11a7fcfd039fbff03c4382ae29b601ed50) )
1807   ROM_LOAD( "2g",           0x2000, 0x1000, CRC(e67380a4) SHA1(a9a87e769d1ef223ae26241e9211c97b3d469656) )
1808   ROM_LOAD( "2h",           0x3000, 0x1000, CRC(72af7b37) SHA1(c9cd0a0a3e34fc7b12822f75eb511f0850703f55) )
1809   ROM_LOAD( "2j",           0x4000, 0x1000, CRC(e6b0dd7f) SHA1(98292fea03bff028ba924a49f0bfa49377018860) )
1810
1811   ROM_REGION( 0x10000, REGION_CPU2, 0 )
1812   ROM_LOAD( "sound.5c",     0x0000, 0x0800, CRC(54ee7753) SHA1(3ebfa2cadf33acb4d24aa50cfa4713355cc780a3) )
1813   ROM_LOAD( "sound.5d",     0x0800, 0x0800, CRC(5218fec0) SHA1(c8f84f1e6aafc544e5acf48b245e8b1edb63211e) )
1814
1815   ROM_REGION( 0x1000, REGION_GFX1, ROMREGION_DISPOSE )
1816   ROM_LOAD( "cpu.5f",       0x0000, 0x0800, CRC(8a3da4d1) SHA1(4d2ef48aeb9099fdd145e11e2485e0bf8d87290d) )
1817   ROM_LOAD( "cpu.5h",       0x0800, 0x0800, CRC(85bdb113) SHA1(f62da0ea0c29feb10d8d1ce8de28fd750a53b40a) )
1818
1819   ROM_REGION( 0x0020, REGION_PROMS, 0 )
1820   ROM_LOAD( "82s123.6e",    0x0000, 0x0020, CRC(9b87f90d) SHA1(d11ac5e4a6057301ea2a9cbb404c2b978eb4c1dc) )
1821ROM_END
1822
1823ROM_START( moonwar )
1824   ROM_REGION( 0x10000, REGION_CPU1, 0 )
1825   ROM_LOAD( "mw2.2c",       0x0000, 0x1000, CRC(7c11b4d9) SHA1(a27bdff6ce728647ec811df843ac235c32c293d6) )
1826   ROM_LOAD( "mw2.2e",       0x1000, 0x1000, CRC(1b6362be) SHA1(2fbd95869146adcc0c8be1df653251fda8849e8e) )
1827   ROM_LOAD( "mw2.2f",       0x2000, 0x1000, CRC(4fd8ba4b) SHA1(3da784267a96d05f66b00626a22cb3f06211d202) )
1828   ROM_LOAD( "mw2.2h",       0x3000, 0x1000, CRC(56879f0d) SHA1(d1e9932863aebc5761e71fca8d24f3c400e1250d) )
1829
1830   ROM_REGION( 0x10000, REGION_CPU2, 0 )
1831   ROM_LOAD( "mw2.5c",       0x0000, 0x0800, CRC(c26231eb) SHA1(5b19edfaefe1a535059311d067ea53405879d627) )
1832   ROM_LOAD( "mw2.5d",       0x0800, 0x0800, CRC(bb48a646) SHA1(cf51202d16b03bbed12ff24501be68683f28c992) )
1833
1834   ROM_REGION( 0x1000, REGION_GFX1, ROMREGION_DISPOSE )
1835   ROM_LOAD( "mw2.5f",       0x0000, 0x0800, CRC(c5fa1aa0) SHA1(6c6b5b2ce5de278ff436d3e7252ece5b086cc41d) )
1836   ROM_LOAD( "mw2.5h",       0x0800, 0x0800, CRC(a6ccc652) SHA1(286b3dc1f3a7da3ac66664e774b441ef075745f1) )
1837
1838   ROM_REGION( 0x0020, REGION_PROMS, 0 )
1839   ROM_LOAD( "mw2.clr",      0x0000, 0x0020, CRC(99614c6c) SHA1(f068985f3c5e0cd88551a02c32f9baeabfd50241) )
1840ROM_END
1841
1842ROM_START( moonwara )
1843   ROM_REGION( 0x10000, REGION_CPU1, 0 )
1844   ROM_LOAD( "2c",           0x0000, 0x1000, CRC(bc20b734) SHA1(c6fe550987d0052979aad43c67aa1b9248049669) )
1845   ROM_LOAD( "2e",           0x1000, 0x1000, CRC(db6ffec2) SHA1(0fcd55b1e415e2e7041d10778052a235251f85fe) )
1846   ROM_LOAD( "2f",           0x2000, 0x1000, CRC(378931b8) SHA1(663f1eea9b0e8dc38de818df66c5211dac41c33b) )
1847   ROM_LOAD( "2h",           0x3000, 0x1000, CRC(031dbc2c) SHA1(5f2ca8b8763398bf161ee0c2c748a12d36cb40ec) )
1848
1849   ROM_REGION( 0x10000, REGION_CPU2, 0 )
1850   ROM_LOAD( "mw2.5c",       0x0000, 0x0800, CRC(c26231eb) SHA1(5b19edfaefe1a535059311d067ea53405879d627) )
1851   ROM_LOAD( "mw2.5d",       0x0800, 0x0800, CRC(bb48a646) SHA1(cf51202d16b03bbed12ff24501be68683f28c992) )
1852
1853   ROM_REGION( 0x1000, REGION_GFX1, ROMREGION_DISPOSE )
1854   ROM_LOAD( "mw2.5f",       0x0000, 0x0800, CRC(c5fa1aa0) SHA1(6c6b5b2ce5de278ff436d3e7252ece5b086cc41d) )
1855   ROM_LOAD( "mw2.5h",       0x0800, 0x0800, CRC(a6ccc652) SHA1(286b3dc1f3a7da3ac66664e774b441ef075745f1) )
1856
1857   ROM_REGION( 0x0020, REGION_PROMS, 0 )
1858   ROM_LOAD( "moonwara.clr", 0x0000, 0x0020, CRC(f58d4f58) SHA1(12a80d1edf3c80dafa0e1e3622d2a03224b62f14) )   /* olive, instead of white */
1859ROM_END
1860
1861ROM_START( spdcoin )
1862   ROM_REGION( 0x10000, REGION_CPU1, 0 )
1863   ROM_LOAD( "spdcoin.2c",   0x0000, 0x1000, CRC(65cf1e49) SHA1(a4570f0d7868fcdd378de3fd9e5346780afcf427) )
1864   ROM_LOAD( "spdcoin.2e",   0x1000, 0x1000, CRC(1ee59232) SHA1(b58c1de69d33cf80432012b9b6d8b1e3d8b00662) )
1865
1866   ROM_REGION( 0x10000, REGION_CPU2, 0 )
1867   ROM_LOAD( "spdcoin.5c",   0x0000, 0x0800, CRC(b4cf64b7) SHA1(a95d94be2e374b78b4ba49b6931f0c214ff9d033) )
1868   ROM_LOAD( "spdcoin.5d",   0x0800, 0x0800, CRC(92304df0) SHA1(01471bf7cbea0090933a253b1b46f80c8f240df5) )
1869
1870   ROM_REGION( 0x1000, REGION_GFX1, ROMREGION_DISPOSE )
1871   ROM_LOAD( "spdcoin.5f",   0x0000, 0x0800, CRC(dd5f1dbc) SHA1(e7c40972a7530cac19ce04de3272244959d337ab) )
1872   ROM_LOAD( "spdcoin.5h",   0x0800, 0x0800, CRC(ab1fe81b) SHA1(98057932cb5faad60d425b547590ab22bfc67ff6) )
1873
1874   ROM_REGION( 0x0020, REGION_PROMS, 0 )
1875   ROM_LOAD( "spdcoin.clr",  0x0000, 0x0020, CRC(1a2ccc56) SHA1(58bedaa8b3e21e916295603b38529084b6c0099a) )
1876ROM_END
1877
18781472ROM_START( darkplnt )
18791473   ROM_REGION( 0x10000, REGION_CPU1, 0 )
18801474   ROM_LOAD( "drkplt2c.dat", 0x0000, 0x1000, CRC(5a0ca559) SHA1(cf77bda30bb08633d274c22734a8f186520ddf7d) )
r2844r2845
19371531   ROM_LOAD( "colr6f.cpu",   0x0000, 0x0020, CRC(fce333c7) SHA1(f63a214dc47c5e7c80db000b0b6a261ca8da6629) )
19381532ROM_END
19391533
1940ROM_START( calipso )
1941   ROM_REGION( 0x10000, REGION_CPU1, 0 )
1942   ROM_LOAD( "calipso.2c",   0x0000, 0x1000, CRC(0fcb703c) SHA1(2bb096f114911973afdf3088c860c9566df06f60) )
1943   ROM_LOAD( "calipso.2e",   0x1000, 0x1000, CRC(c6622f14) SHA1(475164aed703a97275ff285ecaec9d8fd4fe723b) )
1944   ROM_LOAD( "calipso.2f",   0x2000, 0x1000, CRC(7bacbaba) SHA1(d321d6d09c689123eb1e5d758d95ccecec225252) )
1945   ROM_LOAD( "calipso.2h",   0x3000, 0x1000, CRC(a3a8111b) SHA1(3d9500c676563ebfc27aebb07716e6a966f00c35) )
1946   ROM_LOAD( "calipso.2j",   0x4000, 0x1000, CRC(fcbd7b9e) SHA1(5cc1edcc8b9867bb7849c8d97d1096bb6464f562) )
1947   ROM_LOAD( "calipso.2l",   0x5000, 0x1000, CRC(f7630cab) SHA1(482ee91cccd8a7c5768a1d6a9772d797769fe2dc) )
1948
1949   ROM_REGION( 0x10000, REGION_CPU2, 0 )   /* 64k for sound code */
1950   ROM_LOAD( "calipso.5c",   0x0000, 0x0800, CRC(9cbc65ab) SHA1(b4ce04d18f9536c0ddd2f9c15edda75570e750e5) )
1951   ROM_LOAD( "calipso.5d",   0x0800, 0x0800, CRC(a225ee3b) SHA1(dba111f89851c69fb6fce16219cb2b0cb3294c15) )
1952
1953   ROM_REGION( 0x4000, REGION_GFX1, ROMREGION_DISPOSE )
1954   ROM_LOAD( "calipso.5f",   0x0000, 0x2000, CRC(fd4252e9) SHA1(881b988cdc9b7913f577573f8a15af7a7c7cc67f) )
1955   ROM_LOAD( "calipso.5h",   0x2000, 0x2000, CRC(1663a73a) SHA1(95b6ed25b656afdfb70fac35efa2e005185e4343) )
1956
1957   ROM_REGION( 0x0020, REGION_PROMS, 0 )
1958   ROM_LOAD( "calipso.clr",  0x0000, 0x0020, CRC(01165832) SHA1(bfef0459492dbd5febf3030916b6438eb6be71de) )
1959ROM_END
1960
19611534ROM_START( anteater )
19621535   ROM_REGION( 0x10000, REGION_CPU1, 0 )
19631536   ROM_LOAD( "ra1-2c",       0x0000, 0x1000, CRC(58bc9393) SHA1(7122782a69ef0d2196ec16833f229b6286802668) )
r2844r2845
21241697   ROM_LOAD( "ltprom",       0x0000, 0x0020, CRC(1108b816) SHA1(49fdb08f8f31fefa2f3dca3d3455318cb21847a3) )
21251698ROM_END
21261699
2127ROM_START( superbon )
2128   ROM_REGION( 0x10000, REGION_CPU1, 0 )
2129   ROM_LOAD( "2d.cpu",       0x0000, 0x1000, CRC(60c0ba18) SHA1(6ad09e01dd3c86c8d9c465916227c9b00f38e025) )
2130   ROM_LOAD( "2e.cpu",       0x1000, 0x1000, CRC(ddcf44bf) SHA1(b862622f4aa8af6da568b4f82ef043359ece530f) )
2131   ROM_LOAD( "2f.cpu",       0x2000, 0x1000, CRC(bb66c2d5) SHA1(cbb7f4279ae48460790cb8abf976b978ae6a1a25) )
2132   ROM_LOAD( "2h.cpu",       0x3000, 0x1000, CRC(74f4f04d) SHA1(d51c5d2c21453ee0dab60253c3124b6112d1f859) )
2133   ROM_LOAD( "2j.cpu",       0x4000, 0x1000, CRC(78effb08) SHA1(64f211b34c2f37c25a36200b393f145b39ae67b5) )
2134   ROM_LOAD( "2l.cpu",       0x5000, 0x1000, CRC(e9dcecbd) SHA1(ec61cec2b66c041872a2ca29cf724a89c73fc9a3) )
2135   ROM_LOAD( "2m.cpu",       0x6000, 0x1000, CRC(3ed0337e) SHA1(975b93aee851867e335614419aa6db16fbf8063f) )
2136
2137   ROM_REGION( 0x10000, REGION_CPU2, 0 )
2138   ROM_LOAD( "5c",           0x0000, 0x0800, CRC(b899be2a) SHA1(9b343a682531255104db61177a43ad933c3af34e) )
2139   ROM_LOAD( "5d.snd",       0x0800, 0x0800, CRC(80640a04) SHA1(83f2bafcfa5737441194d3058a76b2582317cfcb) )
2140
2141   ROM_REGION( 0x1000, REGION_GFX1, ROMREGION_DISPOSE )
2142   ROM_LOAD( "5f.cpu",       0x0000, 0x0800, CRC(5b9d4686) SHA1(c7814aefaccab9c8a3a0b015447d366cd2e43c3a) )
2143   ROM_LOAD( "5h.cpu",       0x0800, 0x0800, CRC(58c29927) SHA1(b88515d9c3108d2ad59f30fed5d74877b1636280) )
2144
2145   ROM_REGION( 0x0020, REGION_PROMS, 0 )
2146   ROM_LOAD( "superbon.clr", 0x0000, 0x0020, NO_DUMP )
2147ROM_END
2148
21491700ROM_START( hustler )
21501701   ROM_REGION( 0x10000, REGION_CPU1, 0 )
21511702   ROM_LOAD( "hustler.1",    0x0000, 0x1000, CRC(94479a3e) SHA1(ea3a1a3f6bee3d35a6a0fb0ba689a25f6b919e5d) )
r2844r2845
22551806
22561807GAME( 1981, stratgyx, 0,        stratgyx, stratgyx, stratgyx,     ROT0,   "Konami", "Strategy X", GAME_SUPPORTS_SAVE )
22571808GAME( 1981, stratgys, stratgyx, stratgyx, stratgyx, stratgyx,     ROT0,   "[Konami] (Stern license)", "Strategy X (Stern)", GAME_SUPPORTS_SAVE )
2258GAME( 1981, moonwar,  0,        moonwar,  moonwar,  moonwar,      ROT90,  "Stern", "Moonwar", GAME_SUPPORTS_SAVE )
2259GAME( 1981, moonwara, moonwar,  moonwar,  moonwara, moonwar,      ROT90,  "Stern", "Moonwar (older)", GAME_SUPPORTS_SAVE )
2260GAME( 1984, spdcoin,  0,        type1,    spdcoin,  scramble_ppi, ROT90,  "Stern", "Speed Coin (prototype)", GAME_SUPPORTS_SAVE )
22611809GAME( 1982, darkplnt, 0,        darkplnt, darkplnt, darkplnt,     ROT180, "Stern", "Dark Planet", GAME_SUPPORTS_SAVE )
22621810GAME( 1982, tazmani2, tazmania, type2,    tazmania, tazmani2,     ROT90,  "Stern", "Tazz-Mania (set 2)", GAME_SUPPORTS_SAVE )
2263GAME( 1982, calipso,  0,        calipso,  calipso,  scobra,       ROT90,  "[Stern] (Tago license)", "Calipso", GAME_SUPPORTS_SAVE )
22641811GAME( 1983, anteatg,  anteater, anteatg,  anteatg,  scramble_ppi, ROT90,  "TV-Tuning (F.E.G. license)", "Ameisenbaer (German)", GAME_SUPPORTS_SAVE )
22651812GAME( 1983, anteatgb, anteater, anteatgb, anteatgb, scramble_ppi, ROT90,  "Free Enterprise Games", "The Anteater (UK)", GAME_SUPPORTS_SAVE )
22661813GAME( 1982, rescue,   0,        rescue,   rescue,   rescue,       ROT90,  "Stern", "Rescue", GAME_SUPPORTS_SAVE )
22671814GAME( 1982, aponow,   rescue,   rescue,   rescue,   rescue,       ROT90,  "bootleg", "Apocaljpse Now", GAME_SUPPORTS_SAVE )
22681815GAME( 1983, minefld,  0,        minefld,  minefld,  minefld,      ROT90,  "Stern", "Minefield", GAME_SUPPORTS_SAVE )
2269GAME( 198?, superbon, 0,        type1,    superbon, superbon,     ROT90,  "bootleg", "Super Bond", GAME_WRONG_COLORS | GAME_SUPPORTS_SAVE )
22701816GAME( 1981, hustler,  0,        hustler,  hustler,  hustler,      ROT90,  "Konami", "Video Hustler", GAME_SUPPORTS_SAVE )
22711817GAME( 1981, billiard, hustler,  hustler,  hustler,  billiard,     ROT90,  "bootleg", "The Billiards", GAME_SUPPORTS_SAVE )
22721818GAME( 1981, hustlerb, hustler,  hustlerb, hustler,  scramble_ppi, ROT90,  "bootleg", "Video Hustler (bootleg)", GAME_SUPPORTS_SAVE )
src/mame/drivers/namcos11.c
r2844r2845
867867static MACHINE_RESET( namcos11 )
868868{
869869   memset( namcos11_keycus, 0, namcos11_keycus_size );
870   psx_machine_init();
870   psx_machine_init(machine);
871871}
872872
873873NAMCO_C7X_HARDWARE
src/mame/drivers/galaxian.c
r2844r2845
145145  bit 5 of IN1 is tested if "Cabinet" Dip Switch is set to "Cocktail".
146146
147147
148Notes about 'calipso' :
149---------------------
150
151  Calipso was apperantly redesigned for two player simultanious play.
152  There is code at $298a to flip the screen, but location $8669 has to be
153  set to 2. It's set to 1 no matter how many players are playing.
154  It's possible that there is a cocktail version of the game.
155
156
157Notes about 'moonwar' :
158---------------------
159
160  Moonwar: 8255 Port C bit 4 was originally designed so when bit4=0, 1P spinner
161  is selected, and when bit4=1, 2P spinner gets selected.  But they forgot to
162  change the 8255 initialization value and Port C was set to input, setting the
163  spinner select bit to HI regardless what was written to it. This bug has been
164  corrected in the newer set, but, to maintain hardware compatibility with
165  older PCB's, they had to reverse to active status of the select bit.  So in the
166  newer set, Bit4=1 selects the 1P spinner and Bit4=0 selects the 2P spinner.
167
168
169
148170TO DO :
149171-------
150172
r2844r2845
197219static UINT8 konami_sound_control;
198220static UINT8 sfx_sample_control;
199221
222static UINT8 moonwar_port_select;
223
200224static UINT8 irq_enabled;
201225static int irq_line;
202226
r2844r2845
10841108}
10851109
10861110
1111/*************************************
1112 *
1113 *  Moon War I/O
1114 *
1115 *************************************/
10871116
1117static WRITE8_HANDLER( moonwar_port_select_w )
1118{
1119   moonwar_port_select = data & 0x10;
1120}
1121
1122
1123static READ8_HANDLER( moonwar_input_port_0_r )
1124{
1125   UINT8 sign;
1126   UINT8 delta;
1127
1128   delta = (moonwar_port_select ? input_port_read(machine, "IN3") : input_port_read(machine, "IN4"));
1129
1130   sign = (delta & 0x80) >> 3;
1131   delta &= 0x0f;
1132
1133   return ((input_port_read(machine, "IN0") & 0xe0) | delta | sign );
1134}
1135
1136
1137static const ppi8255_interface moonwar_ppi8255_intf[2] =
1138{
1139   {
1140      moonwar_input_port_0_r,         /* Port A read */
1141      konami_portb_0_r,            /* Port B read */
1142      konami_portc_0_r,            /* Port C read */
1143      NULL,                     /* Port A write */
1144      NULL,                     /* Port B write */
1145      moonwar_port_select_w          /* Port C write */
1146   },
1147   {
1148      NULL,                     /* Port A read */
1149      NULL,                     /* Port B read */
1150      konami_portc_1_r,            /* Port C read */
1151      soundlatch_w,               /* Port A write */
1152      konami_sound_control_w,         /* Port B write */
1153      konami_portc_1_w            /* Port C write */
1154   }
1155};
1156
10881157/*************************************
10891158 *
10901159 *  Memory maps
r2844r2845
15171586 *
15181587 *************************************/
15191588
1520GFXDECODE_START(galaxian)
1589static GFXDECODE_START(galaxian)
15211590   GFXDECODE_SCALE(REGION_GFX1, 0x0000, galaxian_charlayout,   0, 8, GALAXIAN_XSCALE,1)
15221591   GFXDECODE_SCALE(REGION_GFX1, 0x0000, galaxian_spritelayout, 0, 8, GALAXIAN_XSCALE,1)
15231592GFXDECODE_END
15241593
1525GFXDECODE_START(gmgalax)
1594static GFXDECODE_START(gmgalax)
15261595   GFXDECODE_SCALE(REGION_GFX1, 0x0000, galaxian_charlayout,   0, 16, GALAXIAN_XSCALE,1)
15271596   GFXDECODE_SCALE(REGION_GFX1, 0x0000, galaxian_spritelayout, 0, 16, GALAXIAN_XSCALE,1)
15281597GFXDECODE_END
15291598
15301599/* separate character and sprite ROMs */
1531GFXDECODE_START(pacmanbl)
1600static GFXDECODE_START(pacmanbl)
15321601   GFXDECODE_SCALE(REGION_GFX1, 0x0000, galaxian_charlayout,   0, 8, GALAXIAN_XSCALE,1)
15331602   GFXDECODE_SCALE(REGION_GFX2, 0x0000, galaxian_spritelayout, 0, 8, GALAXIAN_XSCALE,1)
15341603GFXDECODE_END
r2844r2845
20742143   MDRV_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.1)
20752144MACHINE_DRIVER_END
20762145
2146static MACHINE_DRIVER_START( moonwar )
20772147
2148   /* basic machine hardware */
2149   /* same as regular type 1, the only difference is that the bullets are less yellow */
2150   MDRV_IMPORT_FROM(scobra)
20782151
2152   /* device config overrides */
2153   MDRV_DEVICE_MODIFY( "ppi8255_0", PPI8255 )
2154   MDRV_DEVICE_CONFIG( moonwar_ppi8255_intf[0] )
2155
2156   MDRV_DEVICE_MODIFY( "ppi8255_1", PPI8255 )
2157   MDRV_DEVICE_CONFIG( moonwar_ppi8255_intf[1] )
2158
2159   MDRV_PALETTE_INIT(moonwar)
2160MACHINE_DRIVER_END
2161
2162
20792163/*************************************
20802164 *
20812165 *  Decryption helpers
r2844r2845
22462330}
22472331
22482332
2333static void decode_superbon(void)
2334{
2335   offs_t i;
2336   UINT8 *RAM;
22492337
2338   /* Deryption worked out by hand by Chris Hardy. */
2339
2340   RAM = memory_region(REGION_CPU1);
2341
2342   for (i = 0;i < 0x1000;i++)
2343   {
2344      /* Code is encrypted depending on bit 7 and 9 of the address */
2345      switch (i & 0x0280)
2346      {
2347      case 0x0000:
2348         RAM[i] ^= 0x92;
2349         break;
2350      case 0x0080:
2351         RAM[i] ^= 0x82;
2352         break;
2353      case 0x0200:
2354         RAM[i] ^= 0x12;
2355         break;
2356      case 0x0280:
2357         RAM[i] ^= 0x10;
2358         break;
2359      }
2360   }
2361}
2362
2363
22502364/*************************************
22512365 *
22522366 *  Driver configuration
r2844r2845
27902904}
27912905
27922906
2907static DRIVER_INIT( superbon )
2908{
2909
2910   /* video extensions */
2911   common_init(machine, scramble_draw_bullet, scramble_draw_background, NULL, NULL);
2912
2913   /* decode code */
2914   decode_superbon();
2915}
2916
2917
2918static DRIVER_INIT( calipso )
2919{
2920
2921   /* video extensions */
2922   common_init(machine, scramble_draw_bullet, scramble_draw_background, NULL, calipso_extend_sprite_info);
2923
2924}
2925
2926
2927static DRIVER_INIT( moonwar )
2928{
2929   /* video extensions */
2930   common_init(machine, scramble_draw_bullet, scramble_draw_background, NULL, NULL);
2931
2932   state_save_register_global(moonwar_port_select);
2933}
2934
2935
2936
27932937#include "galdrvr.c"
src/mame/drivers/bbusters.c
r2844r2845
260260
261261static READ16_HANDLER( control_3_r )
262262{
263   /* gun_select seems to assume only values 5,6,7... is this correct? */
263264   return input_port_read_indexed(machine, gun_select);
264265}
265266
r2844r2845
289290
290291static READ16_HANDLER( mechatt_gun_r )
291292{
292   int baseport=2,x,y;
293   if (offset) baseport=4; /* Player 2 */
293   int baseport=0,x,y;
294   static const char *port[] = { "IN2", "IN3", "IN4", "IN5" };
294295
295   x=input_port_read_indexed(machine, baseport);
296   y=input_port_read_indexed(machine, baseport+1);
296   if (offset) baseport=2; /* Player 2 */
297297
298   x=input_port_read(machine, port[baseport]);
299   y=input_port_read(machine, port[baseport+1]);
300
298301   /* Todo - does the hardware really clamp like this? */
299302   x+=0x18;
300303   if (x>0xff) x=0xff;
src/mame/drivers/gstriker.c
r2844r2845
181181//UINT16 *gs_videoram3;
182182static UINT16 *gs_mixer_regs;
183183
184/* in video */
185VIDEO_UPDATE( gstriker );
186VIDEO_START( gstriker );
187VIDEO_START( twrldc94 );
188184
189
190185/*** MISC READ / WRITE HANDLERS **********************************************/
191186
192187static READ16_HANDLER(dmmy_8f)
src/mame/drivers/flstory.c
r2844r2845
1919#include "sound/ay8910.h"
2020#include "sound/msm5232.h"
2121#include "sound/dac.h"
22#include "includes/flstory.h"
2223
23VIDEO_START( flstory );
24VIDEO_UPDATE( flstory );
25VIDEO_START( victnine );
26VIDEO_UPDATE( victnine );
27
28extern UINT8 *flstory_scrlram;
29
30WRITE8_HANDLER( flstory_videoram_w );
31READ8_HANDLER( flstory_palette_r );
32WRITE8_HANDLER( flstory_palette_w );
33WRITE8_HANDLER( flstory_gfxctrl_w );
34READ8_HANDLER( flstory_scrlram_r );
35WRITE8_HANDLER( flstory_scrlram_w );
36READ8_HANDLER( victnine_gfxctrl_r );
37WRITE8_HANDLER( victnine_gfxctrl_w );
38
39READ8_HANDLER( flstory_68705_portA_r );
40WRITE8_HANDLER( flstory_68705_portA_w );
41READ8_HANDLER( flstory_68705_portB_r );
42WRITE8_HANDLER( flstory_68705_portB_w );
43READ8_HANDLER( flstory_68705_portC_r );
44WRITE8_HANDLER( flstory_68705_portC_w );
45WRITE8_HANDLER( flstory_68705_ddrA_w );
46WRITE8_HANDLER( flstory_68705_ddrB_w );
47WRITE8_HANDLER( flstory_68705_ddrC_w );
48WRITE8_HANDLER( flstory_mcu_w );
49READ8_HANDLER( flstory_mcu_r );
50READ8_HANDLER( flstory_mcu_status_r );
51WRITE8_HANDLER( onna34ro_mcu_w );
52READ8_HANDLER( onna34ro_mcu_r );
53READ8_HANDLER( onna34ro_mcu_status_r );
54WRITE8_HANDLER( victnine_mcu_w );
55READ8_HANDLER( victnine_mcu_r );
56READ8_HANDLER( victnine_mcu_status_r );
57
5824UINT8 *onna34ro_workram;
5925UINT8 *victnine_workram;
6026
src/mame/drivers/calomega.c
r2844r2845
3939    DSW = 3 banks (903/904)
4040    DSW = 1 bank  (905)
4141
42    Inputs use 6 lines from 6520 PIA's port, and multiplexed x4 each.
42    Inputs use 6 lines from 6520 PIA's port, and each one is multiplexed x4.
4343
4444    Some games like Keno and Big Game, also have a key encoder peripheral processor
4545    based on a 8035, and 1x ROM 2516/2532.
4646
47    Systems 903/904 PCBs have 3 pots to control R, G, and B independently.
48    However, it seems to be only related to the background color.
4749
4850
4951***********************************************************************************
r2844r2845
9294   18.4 | Double Draw-Lebanon      |   ?    |         | PKCG     | 6300010 | POKCLR   | 6600020 | Amusement     | No   |      | No
9395   18.5 | Pixels                   |  905   | AUG/83  | PXCG     | 6300070 | PIXCLR   | 6600050 | Amusement     | Yes  | OK   | Yes
9496   18.6 | Pixels                   |  905   | AUG/83  | PXCG     | 6300070 | PIXCLR   | 6600050 | Amusement     | Yes  | OK   | Yes
95   18.7 | Amusement Poker (skill)  |  905   | AUG/83  | JKRTWO   | 6300100 | MULTCLR  | 6600070 | Amusement     | No  |      | No
97   18.7 | Amusement Poker (skill)  |  905   | AUG/83  | JKRTWO   | 6300100 | MULTCLR  | 6600070 | Amusement     | Yes  | BD   | Yes
9698   18.8 | Poker-Lebanon            |   ?    |         | PKCG     | 6300010 | POKCLR   | 6600020 | Amusement     | No   |      | No
9799   18.9 | Pixels (french)          |   ?    |         | PIXCG    | 6300070 | PIXCLR   | 6600050 | Amusement     | No   |      | No
98100   19.0 | Hi-Score Poker           |   ?    |         | JKRTWO   | 6300100 | WLDCLR   | 6600070 | Amusement     | No   |      | No
r2844r2845
217219    mentioned game. It was created by Cal Omega in 1981 for Casino Electronics Inc.
218220    Cal Omega was bought out by CEI (Casino Electronics Inc.), and CEI was bought by UCMC.
219221
220    This game was made before the CEI 906iii system.
222    This is the most famous game from Cal Omega 903 System.
221223
222    The game use the same GFX set that Jack Potten's poker for cards and have similar
224    The game uses the same GFX set that Jack Potten's Poker for cards and has similar
223225    layout, but the game is different and the old discrete pitched sounds were replaced
224    with a better set of sounds through a AY8910/12 implementation. The empty socket in
225    the pcb is maybe for future upgrades instead of sound ROM, since sounds are hardcoded.
226    with a better set of sounds through a AY8912 implementation. The empty socket in
227    the PCB is for future upgrades instead of sound ROM, since sounds are hardcoded.
226228
227229    Inputs are multiplexed and selected through PIA1, portB.
228230
229    In game, use "Stand" instead of "Deal/Draw" to conserve all cards without discards.
230    To enter to TEST MODE press F2. Press "Discard 1" + "Discard 2" + "Discard 3" to exit.
231    To enter the STATS MODE press "Show Stats". Press "Deal/Draw" to exit.
232    To pass coin and hopper errors press "Hopper SW". Also keep it pressed to see the status.
233    For payout, press "Manual Collect" an then "Payout" for each credit (manual mode).
234231
232    Some instructions....
235233
234    - Some versions have a STAND button to conserve all cards without discards.
235
236    - To enter to the Input Test Mode press TEST MODE (key 9) and then SERVICE (key 8).
237      Press DISCARD1 (key Z) + DISCARD2 (key X) + DISCARD3 (key C) to exit.
238
239    - To see the last hand played, press SHOW LAST HAND (key 0) and then SERVICE (key 8).
240      Press DEAL/DRAW button to exit.
241
242    - Depending of the game version, TEST MODE & SHOW LAST HAND buttons could work directly.
243
244    - To pass coin and hopper errors press SERVICE (key 8). Also keep it pressed to see the status.
245
246    - For payout, press MANUAL COLLECT an then PAYOUT for each credit (manual mode).
247
248
249
236250    El Grande - 5 Card Draw:
237251
238252    This game was created by Tuni Electro Service and was licenced to E.T. Marketing,Inc.
r2844r2845
247261
248262    There aren't meter and stats modes. Only for amusement, so... no payout.
249263    To clear credits press F2.
250    To enter to TEST MODE press F2 twice. Press "Hold 1" + "Hold 2" + "Hold 3" to exit.
264    To enter to TEST MODE press F2 twice. Press HOLD 1 + HOLD 2 + HOLD 3 to exit.
251265
252266
253267
r2844r2845
263277    $0841 - $0841   AY-8912         ; Write.
264278    $0880 - $0880   CRTC6845        ; MC6845 adressing.
265279    $0881 - $0881   CRTC6845        ; MC6845 Read/Write.
266    $08C4 - $08C7   PIA0            ; I/O Ports 0, 1, 2, 3.
280    $08C4 - $08C7   PIA0            ; I/O Ports 0 to 3 (multiplexed).
267281    $08C8 - $08CB   PIA1            ; I/O Port  4.
268282
269283    $1000 - $13FF   VideoRAM
r2844r2845
277291    $0000 - $07FF   NVRAM           ; All registers and settings.
278292    $1080 - $1080   CRTC6845        ; MC6845 adressing.
279293    $1081 - $1081   CRTC6845        ; MC6845 Read/Write.
280    $10C4 - $10C7   PIA0            ; I/O Ports 0, 1, 2, 3.
294    $10C4 - $10C7   PIA0            ; I/O Ports 0 to 3 (multiplexed).
281295    $10C8 - $10CB   PIA1            ; I/O Port  4, AY-8912.
282296
283297    $2000 - $23FF   VideoRAM
r2844r2845
371385    -------
372386
373387
388    [2008-06-11]
389
390    - Improved the input system for some games.
391    - Fixed some wrong color codes.
392    - Updated technical notes.
393
394
395    [2008-06-09]
396
397    - Cleaned up the driver following the MAME Coding Conventions.
398    - Added support to Game 18.7 (Amusement Poker).
399    - Updated technical notes.
400
401
374402    [2008-02-26]
375403
376404    - Renamed the driver to calomega.c.
r2844r2845
539567   PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_NAME("Deal/Draw") PORT_CODE(KEYCODE_2)
540568   PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON7 ) PORT_NAME("Cancel Discards") PORT_CODE(KEYCODE_N)
541569   PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON13 ) PORT_NAME("Stand") PORT_CODE(KEYCODE_E)
542   PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
543   PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
570   PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNUSED )
571   PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNUSED )
544572
545573   PORT_START_TAG("IN0-1")
546574   PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_NAME("Payout") PORT_CODE(KEYCODE_Q)
547575   PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN )
548576   PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_NAME("Service") PORT_CODE(KEYCODE_8)
549//  PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_NAME("Bit 3") PORT_CODE(KEYCODE_F)
550//  PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_NAME("Bit 4") PORT_CODE(KEYCODE_G)
551//  PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_NAME("Bit 5") PORT_CODE(KEYCODE_H)
552   PORT_BIT( 0x08/*0x0c*/, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_NAME("Test Mode") PORT_CODE(KEYCODE_F2)   /* should be splitted? */
553   PORT_BIT( 0x10/*0x14*/, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_NAME("Hopper SW") PORT_CODE(KEYCODE_9)   /* should be splitted? */
554   PORT_BIT( 0x20/*0x24*/, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_NAME("Show Stats") PORT_CODE(KEYCODE_0)   /* should be splitted? */
555   PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
556   PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
577   PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_NAME("Test Mode") PORT_CODE(KEYCODE_9)      /* press this one and then SERVICE to Test Mode */
578   PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN )
579   PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_NAME("Show Last Hand") PORT_CODE(KEYCODE_0)   /* press this one and then SERVICE to show the last hand */
580   PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNUSED )
581   PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNUSED )
557582
558583   PORT_START_TAG("IN0-2")
559584   PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON8 ) PORT_NAME("Discard 1") PORT_CODE(KEYCODE_Z)
r2844r2845
562587   PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_BUTTON11 ) PORT_NAME("Discard 4") PORT_CODE(KEYCODE_V)
563588   PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON12 ) PORT_NAME("Discard 5") PORT_CODE(KEYCODE_B)
564589   PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON6 ) PORT_NAME("Small") PORT_CODE(KEYCODE_S)
565   PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
566   PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
590   PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNUSED )
591   PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNUSED )
567592
568593   PORT_START_TAG("IN0-3")
569594   PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN )
r2844r2845
572597   PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_BUTTON5 ) PORT_NAME("Big") PORT_CODE(KEYCODE_A)
573598   PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN )
574599   PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN )
575   PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
576   PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
600   PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNUSED )
601   PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNUSED )
577602
578603   PORT_START_TAG("SW1")
579604   PORT_DIPNAME( 0x01, 0x01, DEF_STR( Unknown ) )
r2844r2845
604629static INPUT_PORTS_START( comg076 )
605630   PORT_START_TAG("IN0-0")
606631   PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 )   /* credits */
607   PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_NAME("Manual Collect") PORT_CODE(KEYCODE_7)
632   PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN )
608633   PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_NAME("Double Up") PORT_CODE(KEYCODE_3)
609634   PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_NAME("Deal/Draw") PORT_CODE(KEYCODE_2)
610635   PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON7 ) PORT_NAME("Cancel Discards") PORT_CODE(KEYCODE_N)
611   PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON13 ) PORT_NAME("Stand") PORT_CODE(KEYCODE_E)
612   PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
613   PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
636   PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN )
637   PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNUSED )
638   PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNUSED )
614639
615640   PORT_START_TAG("IN0-1")
616641   PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN2 )   /* credits */
617642   PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN )
618   PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_NAME("Service") PORT_CODE(KEYCODE_8)
619//  PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_NAME("Bit 3") PORT_CODE(KEYCODE_F)
620//  PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_NAME("Bit 4") PORT_CODE(KEYCODE_G)
621//  PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_NAME("Bit 5") PORT_CODE(KEYCODE_H)
622   PORT_BIT( 0x08/*0x0c*/, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_NAME("Unk.")   PORT_CODE(KEYCODE_8)   /* should be splitted? */
623   PORT_BIT( 0x10/*0x14*/, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_NAME("Hopper SW") PORT_CODE(KEYCODE_9)   /* should be splitted? */
624   PORT_BIT( 0x20/*0x24*/, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_NAME("Test Mode") PORT_CODE(KEYCODE_F2)   /* should be splitted? */
625   PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
626   PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
643   PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN )
644   PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN )
645   PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN )
646   PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_NAME("Test Mode") PORT_CODE(KEYCODE_9)
647   PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNUSED )
648   PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNUSED )
627649
628650   PORT_START_TAG("IN0-2")
629651   PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON8 ) PORT_NAME("Discard 1") PORT_CODE(KEYCODE_Z)
r2844r2845
632654   PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_BUTTON11 ) PORT_NAME("Discard 4") PORT_CODE(KEYCODE_V)
633655   PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON12 ) PORT_NAME("Discard 5") PORT_CODE(KEYCODE_B)
634656   PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON6 ) PORT_NAME("Small") PORT_CODE(KEYCODE_S)
635   PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
636   PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
657   PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNUSED )
658   PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNUSED )
637659
638660   PORT_START_TAG("IN0-3")
639661   PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN )
r2844r2845
642664   PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_BUTTON5 ) PORT_NAME("Big") PORT_CODE(KEYCODE_A)
643665   PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN )
644666   PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN )
645   PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
646   PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
667   PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNUSED )
668   PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNUSED )
647669
648670   PORT_START_TAG("SW1")
649671   PORT_DIPNAME( 0x01, 0x01, DEF_STR( Unknown ) )
r2844r2845
678700   PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_NAME("Deal/Draw") PORT_CODE(KEYCODE_2)
679701   PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON7 ) PORT_NAME("Cancel Discards") PORT_CODE(KEYCODE_N)
680702   PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN )
681   PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
682   PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
703   PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNUSED )
704   PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNUSED )
683705
684706   PORT_START_TAG("IN0-1")
685707   PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_NAME("Payout") PORT_CODE(KEYCODE_Q)
r2844r2845
688710   PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN )
689711   PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN )
690712   PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_NAME("Test Mode") PORT_CODE(KEYCODE_F2)
691   PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
692   PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
713   PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNUSED )
714   PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNUSED )
693715
694716   PORT_START_TAG("IN0-2")
695717   PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON8 ) PORT_NAME("Discard 1") PORT_CODE(KEYCODE_Z)
r2844r2845
698720   PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_BUTTON11 ) PORT_NAME("Discard 4") PORT_CODE(KEYCODE_V)
699721   PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON12 ) PORT_NAME("Discard 5") PORT_CODE(KEYCODE_B)
700722   PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN )
701   PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
702   PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
723   PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNUSED )
724   PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNUSED )
703725
704726   PORT_START_TAG("IN0-3")
705727   PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN )
r2844r2845
708730   PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_BUTTON5 ) PORT_NAME("Big") PORT_CODE(KEYCODE_A)
709731   PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON6 ) PORT_NAME("Small") PORT_CODE(KEYCODE_S)
710732   PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN )
711   PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
712   PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
733   PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNUSED )
734   PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNUSED )
713735
714736   PORT_START_TAG("SW1")
715737   PORT_DIPNAME( 0x01, 0x01, DEF_STR( Unknown ) )
r2844r2845
10501072{
10511073   switch( mux_data&0xf0 )   /* bits 4-7 */
10521074   {
1053      case 0x10: return input_port_read_indexed(machine, 0);
1054      case 0x20: return input_port_read_indexed(machine, 1);
1055      case 0x40: return input_port_read_indexed(machine, 2);
1056      case 0x80: return input_port_read_indexed(machine, 3);
1075      case 0x10: return input_port_read(machine, "IN0-0");
1076      case 0x20: return input_port_read(machine, "IN0-1");
1077      case 0x40: return input_port_read(machine, "IN0-2");
1078      case 0x80: return input_port_read(machine, "IN0-3");
10571079   }
10581080   return 0xff;
10591081}
r2844r2845
15751597
15761598ROM_START( comg183 )   /* Cal Omega v18.3 (Pixels) */
15771599   ROM_REGION( 0x10000, REGION_CPU1, 0 )
1578   ROM_LOAD( "18.32", 0xC000, 0x1000, CRC(c793ffc1) SHA1(f2ef82f92a9e18128d28973bcf050d0c3e1819f3) )
1600   ROM_LOAD( "18.32", 0xc000, 0x1000, CRC(c793ffc1) SHA1(f2ef82f92a9e18128d28973bcf050d0c3e1819f3) )
15791601   ROM_LOAD( "18.33", 0xd000, 0x1000, CRC(415a6599) SHA1(648986310a3864652897e5d18b8be06819cce7a8) )
15801602   ROM_LOAD( "18.34", 0xe000, 0x1000, CRC(fc5d3b89) SHA1(3601401d00d7a0621eac4254da238e9c8929cac4) )
15811603   ROM_LOAD( "18.35", 0xf000, 0x1000, CRC(6552207f) SHA1(bd8a7546b4dad07d151dc7039028916386aee5e9) )
r2844r2845
15971619
15981620ROM_START( comg185 )   /* Cal Omega v18.5 (Pixels) */
15991621   ROM_REGION( 0x10000, REGION_CPU1, 0 )
1600   ROM_LOAD( "18.52", 0xC000, 0x1000, CRC(19225f7d) SHA1(73d713ee86886f935d9b2c2ca670d8e00d466b7f) )
1622   ROM_LOAD( "18.52", 0xc000, 0x1000, CRC(19225f7d) SHA1(73d713ee86886f935d9b2c2ca670d8e00d466b7f) )
16011623   ROM_LOAD( "18.53", 0xd000, 0x1000, CRC(797e2b70) SHA1(83f974c6c1886eab5c90782766b72900c73045e1) )
16021624   ROM_LOAD( "18.54", 0xe000, 0x1000, CRC(6becc802) SHA1(e72783db52bffd3fa2f7d35cd8a004415e37b004) )
16031625   ROM_LOAD( "18.55", 0xf000, 0x1000, CRC(313db76a) SHA1(d81228bf0badc8a3cf08c77de27b3d973953175c) )
r2844r2845
16191641
16201642ROM_START( comg186 )   /* Cal Omega v18.6 (Pixels) */
16211643   ROM_REGION( 0x10000, REGION_CPU1, 0 )
1622   ROM_LOAD( "18.62", 0xC000, 0x1000, CRC(025f4268) SHA1(750a5417fe2b077893d8252dd5eafc42fafd965e) )
1644   ROM_LOAD( "18.62", 0xc000, 0x1000, CRC(025f4268) SHA1(750a5417fe2b077893d8252dd5eafc42fafd965e) )
16231645   ROM_LOAD( "18.63", 0xd000, 0x1000, CRC(948a6ef1) SHA1(6aeb244209f3376042a32d9accb38e3f09cb192a) )
16241646   ROM_LOAD( "18.64", 0xe000, 0x1000, CRC(9fb6e82b) SHA1(db38564e8060f1c67183f3f412a24439b2253e13) )
16251647   ROM_LOAD( "18.65", 0xf000, 0x1000, CRC(a68be5ef) SHA1(1ab2bc1b070863260fa281970f886d77e2fa7ccd) )
r2844r2845
16391661   ROM_RELOAD(            0x0300, 0x0100 )
16401662ROM_END
16411663
1664ROM_START( comg187 )   /* Cal Omega v18.7 (Amusement Poker) */
1665   ROM_REGION( 0x10000, REGION_CPU1, 0 )
1666   ROM_LOAD( "18.72", 0xc000, 0x1000, BAD_DUMP CRC(1a4bd46a) SHA1(76101271ff9b98c3310e1666dfba34a01a0f0bcd) )   /* 1st half seems to be the 2nd one, and 2nd half is filled of 0xff */
1667   ROM_LOAD( "18.73", 0xd000, 0x1000, CRC(ca374ecb) SHA1(113495afa88da97cb7239f645fabba7125ce2b4b) )
1668   ROM_LOAD( "18.74", 0xe000, 0x1000, CRC(5bb57ca8) SHA1(22dc6f0e2fee5408fa70e4bc60f1833534ee038f) )
1669   ROM_LOAD( "18.75", 0xf000, 0x1000, CRC(70a8ccb3) SHA1(b5b7d6a8262ab6e47a1400681c414fd3edd0d7a8) )
1670
1671   ROM_REGION( 0x0800, REGION_GFX1, ROMREGION_DISPOSE )
1672   ROM_LOAD( "jkrtwo.cgo",    0x0000, 0x0800, CRC(987b3e4d) SHA1(ae4b5dc0e4d1195bbf18b375c1a4dbf880f5f38c) )
1673
1674   ROM_REGION( 0x1800, REGION_GFX2, ROMREGION_DISPOSE )
1675   ROM_LOAD( "jkrtwo.cgc",   0x0000, 0x0800, CRC(5b96f5e0) SHA1(4733349798eb059998a4814331f57e7f09e02490) )
1676   ROM_LOAD( "jkrtwo.cgb",   0x0800, 0x0800, CRC(d77dda31) SHA1(e11b476cf0b609a8a40981b81b4d83b3c86678dc) )
1677   ROM_LOAD( "jkrtwo.cga",   0x1000, 0x0800, CRC(def60756) SHA1(fe71424fc638761d9ff65391261a030a2889ad5e) )
1678
1679   ROM_REGION( 0x400, REGION_PROMS, 0 )
1680   ROM_LOAD( "mltclr",      0x0000, 0x0100, CRC(fefb0fa8) SHA1(66d86aa19d9d37ffd2840d6653fcec667bc716d4) )
1681   ROM_RELOAD(            0x0100, 0x0100 )
1682   ROM_RELOAD(            0x0200, 0x0100 )
1683   ROM_RELOAD(            0x0300, 0x0100 )
1684ROM_END
1685
16421686ROM_START( comg204 )   /* Cal Omega v20.4 (Super Blackjack) */
16431687   ROM_REGION( 0x10000, REGION_CPU1, 0 )
16441688   ROM_LOAD( "bj20.41",   0xb000, 0x1000, CRC(9c2203f7) SHA1(fd566683e887cf80cd0e6c82a413aebc378397f8) )
r2844r2845
20082052   int x;
20092053   UINT8 *BPR = memory_region( REGION_PROMS );
20102054
2011   for (x=0x0000;x<0x0400;x++)
2055   for (x = 0x0000; x < 0x0400; x++)
20122056   {
20132057      if (BPR[x] == 0x07)
20142058         BPR[x] = 0x04;   /* blue background */
r2844r2845
20252069   UINT8 *BPR = memory_region( REGION_PROMS );
20262070
20272071   /* Palette transformed by PLDs? */
2028   for (x=0x0000;x<0x0400;x++)
2072   for (x = 0x0000; x < 0x0400; x++)
20292073   {
20302074      if (BPR[x] == 0x07)
20312075         BPR[x] = 0x00; /* black background */
r2844r2845
20422086   int x;
20432087   UINT8 *BPR = memory_region( REGION_PROMS );
20442088
2045   for (x=0x0000;x<0x0400;x++)
2089   for (x = 0x0000; x < 0x0400; x++)
20462090   {
20472091      if (BPR[x] == 0x02)
20482092         BPR[x] = 0x00;   /* blue background */
r2844r2845
20592103   int x;
20602104   UINT8 *BPR = memory_region( REGION_PROMS );
20612105
2062   for (x=0x0000;x<0x0400;x++)
2106   for (x = 0x0000; x < 0x0400; x++)
20632107   {
20642108      if (BPR[x] == 0x07)
20652109         BPR[x] = 0x04;   /* blue background */
r2844r2845
20962140GAME( 1983, comg183,  0,        sys905,   standard, calomega, ROT0, "Cal Omega Inc.",                        "Cal Omega - Game 18.3 (Pixels)",                GAME_NOT_WORKING )
20972141GAME( 1983, comg185,  0,        sys905,   standard, calomega, ROT0, "Cal Omega Inc.",                        "Cal Omega - Game 18.5 (Pixels)",                GAME_NOT_WORKING )
20982142GAME( 1983, comg186,  0,        sys905,   standard, calomega, ROT0, "Cal Omega Inc.",                        "Cal Omega - Game 18.6 (Pixels)",                GAME_NOT_WORKING )
2143GAME( 1983, comg187,  0,        sys905,   standard, calomega, ROT0, "Cal Omega Inc.",                        "Cal Omega - Game 18.7 (Amusement Poker)",       GAME_NOT_WORKING )
20992144GAME( 1984, comg204,  0,        sys905,   standard, calomega, ROT0, "Cal Omega Inc.",                        "Cal Omega - Game 20.4 (Super Blackjack)",       GAME_NOT_WORKING )
21002145GAME( 1984, comg208,  0,        sys905,   standard, calomega, ROT0, "Cal Omega Inc.",                        "Cal Omega - Game 20.8 (Winner's Choice)",       GAME_NOT_WORKING )
21012146GAME( 1984, comg227,  0,        sys905,   standard, calomega, ROT0, "Cal Omega Inc.",                        "Cal Omega - Game 22.7 (Amusement Poker, d/d)",  GAME_NOT_WORKING )
src/mame/drivers/dgpix.c
r2844r2845
181181{
182182   /* burn a bunch of cycles because this is polled frequently during busy loops */
183183   activecpu_adjust_icount(-100);
184   return input_port_read_indexed(machine, 0);
184   return input_port_read(machine, "IN0");
185185}
186186
187187static ADDRESS_MAP_START( cpu_map, ADDRESS_SPACE_PROGRAM, 32 )
r2844r2845
235235}
236236
237237static INPUT_PORTS_START( dgpix )
238   PORT_START
238   PORT_START_TAG("IN0")
239239   PORT_BIT( 0x00000003, IP_ACTIVE_LOW, IPT_VBLANK ) //value 2 is used by fmaniac3
240240   PORT_BIT( 0xfffffffc, IP_ACTIVE_LOW, IPT_UNUSED )
241241
242   PORT_START
242   PORT_START_TAG("IN1")
243243   PORT_BIT( 0x00000001, IP_ACTIVE_LOW, IPT_JOYSTICK_UP   ) PORT_8WAY PORT_PLAYER(1)
244244   PORT_BIT( 0x00000002, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN   ) PORT_8WAY PORT_PLAYER(1)
245245   PORT_BIT( 0x00000004, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT   ) PORT_8WAY PORT_PLAYER(1)
src/mame/drivers/cosmic.c
r2844r2845
189189        /* mostly not noticed since sound is */
190190      /* only enabled if game in progress! */
191191
192       if ((input_port_read_indexed(machine, 3) & 0xc0) != 0xc0)
193           panic_sound_output_w(machine,17,1);
192       if ((input_port_read(machine, "IN0") & 0xc0) != 0xc0)
193           panic_sound_output_w(machine, 17, 1);
194194
195195      cpunum_set_input_line_and_vector(machine, 0, 0, HOLD_LINE, 0xcf);   /* RST 08h */
196196    }
r2844r2845
204204
205205    if (pixel_clock == 0)
206206    {
207      if (input_port_read_indexed(machine, 3) & 1)   /* Left Coin */
207      if (input_port_read(machine, "FAKE") & 1)   /* Left Coin */
208208         cpunum_set_input_line(machine, 0, INPUT_LINE_NMI, PULSE_LINE);
209209    }
210210}
r2844r2845
218218    It makes sense and works fine, but I cannot be 100% sure this is correct,
219219    as I have no Cosmic Guerilla console :-) . */
220220
221   if ((input_port_read_indexed(machine, 2) & 1)) /* Coin */
221   if ((input_port_read(machine, "IN2") & 1))   /* Coin */
222222      /* on tms9980, a 6 on the interrupt bus means level 4 interrupt */
223223      cpunum_set_input_line_and_vector(machine, 0, 0, ASSERT_LINE, 6);
224224   else
r2844r2845
228228static INTERRUPT_GEN( magspot_interrupt )
229229{
230230   /* Coin 1 causes an IRQ, Coin 2 an NMI */
231   if (input_port_read_indexed(machine, 4) & 0x01)
231   if (input_port_read(machine, "COINS") & 0x01)
232232        cpunum_set_input_line(machine, 0, 0, HOLD_LINE);
233   else if (input_port_read_indexed(machine, 4) & 0x02)
233   else if (input_port_read(machine, "COINS") & 0x02)
234234      cpunum_set_input_line(machine, 0, INPUT_LINE_NMI, PULSE_LINE);
235235}
236236
237237static INTERRUPT_GEN( nomnlnd_interrupt )
238238{
239239   /* Coin causes an NMI */
240   if (input_port_read_indexed(machine, 4) & 0x01)
240   if (input_port_read(machine, "COIN") & 0x01)
241241      cpunum_set_input_line(machine, 0, INPUT_LINE_NMI, PULSE_LINE);
242242}
243243
r2844r2845
252252{
253253   /* The top four address lines from the CRTC are bits 0-3 */
254254
255   return (input_port_read_indexed(machine, 0) & 0xf0) | ((video_screen_get_vpos(machine->primary_screen) & 0xf0) >> 4);
255   return (input_port_read(machine, "IN0") & 0xf0) | ((video_screen_get_vpos(machine->primary_screen) & 0xf0) >> 4);
256256}
257257
258258static READ8_HANDLER( magspot_coinage_dip_r )
259259{
260   return (input_port_read_indexed(machine, 5) & (1 << (7 - offset))) ? 0 : 1;
260   return (input_port_read(machine, "DSW") & (1 << (7 - offset))) ? 0 : 1;
261261}
262262
263263
r2844r2845
266266static READ8_HANDLER( nomnlnd_port_0_1_r )
267267{
268268   int control;
269    int fire = input_port_read_indexed(machine, 3);
269    int fire = input_port_read(machine, "IN3");
270270
271271   if (offset)
272      control = input_port_read_indexed(machine, 1);
272      control = input_port_read(machine, "IN1");
273273    else
274      control = input_port_read_indexed(machine, 0);
274      control = input_port_read(machine, "IN0");
275275
276276    /* If firing - stop tank */
277277
r2844r2845
298298static ADDRESS_MAP_START( panic_readmem, ADDRESS_SPACE_PROGRAM, 8 )
299299   AM_RANGE(0x0000, 0x3fff) AM_READ(SMH_ROM)
300300   AM_RANGE(0x4000, 0x5fff) AM_READ(SMH_RAM)
301   AM_RANGE(0x6800, 0x6800) AM_READ(input_port_0_r) /* IN1 */
302   AM_RANGE(0x6801, 0x6801) AM_READ(input_port_1_r) /* IN2 */
303   AM_RANGE(0x6802, 0x6802) AM_READ(input_port_2_r) /* DSW */
304   AM_RANGE(0x6803, 0x6803) AM_READ(input_port_3_r) /* IN0 */
301   AM_RANGE(0x6800, 0x6800) AM_READ_PORT("IN1")   /* IN1 */
302   AM_RANGE(0x6801, 0x6801) AM_READ_PORT("IN2")   /* IN2 */
303   AM_RANGE(0x6802, 0x6802) AM_READ_PORT("DSW")   /* DSW */
304   AM_RANGE(0x6803, 0x6803) AM_READ_PORT("IN0")   /* IN0 */
305305ADDRESS_MAP_END
306306
307307static ADDRESS_MAP_START( panic_writemem, ADDRESS_SPACE_PROGRAM, 8 )
r2844r2845
318318static ADDRESS_MAP_START( cosmica_readmem, ADDRESS_SPACE_PROGRAM, 8 )
319319   AM_RANGE(0x0000, 0x3fff) AM_READ(SMH_ROM)
320320   AM_RANGE(0x4000, 0x5fff) AM_READ(SMH_RAM)
321   AM_RANGE(0x6800, 0x6800) AM_READ(input_port_0_r) /* IN1 */
322   AM_RANGE(0x6801, 0x6801) AM_READ(input_port_1_r) /* IN2 */
323   AM_RANGE(0x6802, 0x6802) AM_READ(input_port_2_r) /* DSW */
321   AM_RANGE(0x6800, 0x6800) AM_READ_PORT("P1")      /* IN1 */
322   AM_RANGE(0x6801, 0x6801) AM_READ_PORT("P2")      /* IN2 */
323   AM_RANGE(0x6802, 0x6802) AM_READ_PORT("DSW")   /* DSW */
324324   AM_RANGE(0x6803, 0x6803) AM_READ(cosmica_pixel_clock_r)
325325ADDRESS_MAP_END
326326
r2844r2845
345345
346346static ADDRESS_MAP_START( cosmicg_readport, ADDRESS_SPACE_IO, 8 )
347347   AM_RANGE(0x00, 0x00) AM_READ(cosmicg_port_0_r)
348   AM_RANGE(0x01, 0x01) AM_READ(input_port_1_r)
348   AM_RANGE(0x01, 0x01) AM_READ_PORT("IN1")
349349ADDRESS_MAP_END
350350
351351static ADDRESS_MAP_START( cosmicg_writeport, ADDRESS_SPACE_IO, 8 )
r2844r2845
357357static ADDRESS_MAP_START( magspot_readmem, ADDRESS_SPACE_PROGRAM, 8 )
358358   AM_RANGE(0x0000, 0x2fff) AM_READ(SMH_ROM)
359359   AM_RANGE(0x3800, 0x3807) AM_READ(magspot_coinage_dip_r)
360   AM_RANGE(0x5000, 0x5000) AM_READ(input_port_0_r)
361   AM_RANGE(0x5001, 0x5001) AM_READ(input_port_1_r)
362   AM_RANGE(0x5002, 0x5002) AM_READ(input_port_2_r)
363   AM_RANGE(0x5003, 0x5003) AM_READ(input_port_3_r)
360   AM_RANGE(0x5000, 0x5000) AM_READ_PORT("IN0")
361   AM_RANGE(0x5001, 0x5001) AM_READ_PORT("IN1")
362   AM_RANGE(0x5002, 0x5002) AM_READ_PORT("IN2")
363   AM_RANGE(0x5003, 0x5003) AM_READ_PORT("IN3")
364364   AM_RANGE(0x6000, 0x7fff) AM_READ(SMH_RAM)
365365ADDRESS_MAP_END
366366
r2844r2845
375375
376376
377377static INPUT_PORTS_START( panic )
378   PORT_START      /* IN1 */
378   PORT_START_TAG("IN1")   /* IN1 */
379379   PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON1 )
380380   PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_4WAY
381381   PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_4WAY
r2844r2845
385385   PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
386386   PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_BUTTON2 )
387387
388   PORT_START      /* IN2 */
388   PORT_START_TAG("IN2")   /* IN2 */
389389   PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_COCKTAIL
390390   PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_4WAY PORT_COCKTAIL
391391   PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_4WAY PORT_COCKTAIL
r2844r2845
395395   PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
396396   PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_COCKTAIL
397397
398   PORT_START      /* DSW */
398   PORT_START_TAG("DSW")   /* DSW */
399399   PORT_DIPNAME( 0x07, 0x00, DEF_STR( Coin_A ) )
400400   PORT_DIPSETTING(    0x00, DEF_STR( 1C_1C ) )
401401   PORT_DIPSETTING(    0x05, DEF_STR( 2C_3C ) )
r2844r2845
403403   PORT_DIPSETTING(    0x02, DEF_STR( 1C_3C ) )
404404   PORT_DIPSETTING(    0x03, DEF_STR( 1C_4C ) )
405405   PORT_DIPSETTING(    0x04, DEF_STR( 1C_5C ) )
406/* 0x06 and 0x07 disabled */
406   /* 0x06 and 0x07 disabled */
407407   PORT_DIPNAME( 0x08, 0x00, DEF_STR( Cabinet ) )
408408   PORT_DIPSETTING(    0x00, DEF_STR( Upright ) )
409409   PORT_DIPSETTING(    0x08, DEF_STR( Cocktail ) )
r2844r2845
419419   PORT_DIPSETTING(    0x80, DEF_STR( 1C_2C ) )
420420   PORT_DIPSETTING(    0xc0, DEF_STR( 1C_3C ) )
421421
422   PORT_START      /* IN0 */
422   PORT_START_TAG("IN0")   /* IN0 */
423423   PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_START1 )
424424   PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_START2 )
425425   PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN )
r2844r2845
432432INPUT_PORTS_END
433433
434434static INPUT_PORTS_START( cosmica )
435   PORT_START      /* IN0 */
435   PORT_START_TAG("P1")   /* IN0 */
436436   PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON1 )
437437   PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_2WAY
438438   PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_2WAY
r2844r2845
442442   PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
443443   PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
444444
445   PORT_START      /* IN1 */
445   PORT_START_TAG("P2")   /* IN1 */
446446   PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_COCKTAIL
447447   PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_2WAY PORT_COCKTAIL
448448   PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_2WAY PORT_COCKTAIL
r2844r2845
452452   PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
453453   PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
454454
455   PORT_START      /* IN2 */
455   PORT_START_TAG("DSW")   /* IN2 */
456456   PORT_DIPNAME( 0x01, 0x00, DEF_STR( Cabinet ) )
457457   PORT_DIPSETTING(    0x00, DEF_STR( Upright ) )
458458   PORT_DIPSETTING(    0x01, DEF_STR( Cocktail ) )
r2844r2845
478478   /* trigger exactly one interrupt, without having to check when the */
479479   /* user releases the key. */
480480
481   PORT_START   /* FAKE */
481   PORT_START_TAG("FAKE")   /* FAKE */
482482   PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_COIN1 ) PORT_IMPULSE(1)
483483
484484INPUT_PORTS_END
r2844r2845
489489/* Offsets are in BYTES, so bits 0-7 are at offset 0 etc.   */
490490
491491static INPUT_PORTS_START( cosmicg )
492   PORT_START /* 4-7 */
492   PORT_START_TAG("IN0")   /* 4-7 */
493493   PORT_BIT( 0x0f, IP_ACTIVE_LOW, IPT_SPECIAL )   /* pixel clock */
494494   PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_START1 )
495495   PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_START2 )
496496   PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_BUTTON1 )
497497   PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_2WAY
498498
499   PORT_START /* 8-15 */
499   PORT_START_TAG("IN1")   /* 8-15 */
500500   PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_2WAY
501501   PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_COCKTAIL
502502   PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT) PORT_2WAY PORT_COCKTAIL
r2844r2845
513513   PORT_DIPSETTING(    0x00, "3" )
514514   PORT_DIPSETTING(    0x80, "5" )
515515
516   PORT_START      /* Hard wired settings */
516   PORT_START_TAG("IN2")   /* Hard wired settings */
517517
518518   /* The coin slots are not memory mapped. Coin causes INT 4  */
519519   /* This fake input port is used by the interrupt handler    */
r2844r2845
539539
540540
541541static INPUT_PORTS_START( magspot )
542   PORT_START   /* IN0 */
542   PORT_START_TAG("IN0")   /* IN0 */
543543   PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNUSED )
544544   PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_2WAY
545545   PORT_BIT( 0x1c, IP_ACTIVE_LOW, IPT_UNUSED )
r2844r2845
550550   PORT_DIPSETTING(    0xc0, "15000" )
551551   PORT_DIPSETTING(    0x00, DEF_STR( None ) )
552552
553   PORT_START   /* IN1 */
553   PORT_START_TAG("IN1")   /* IN1 */
554554   PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNUSED )
555555   PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_2WAY PORT_COCKTAIL
556556   PORT_BIT( 0x1c, IP_ACTIVE_LOW, IPT_UNUSED )
557557   PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_2WAY PORT_COCKTAIL
558558   PORT_BIT( 0xc0, IP_ACTIVE_LOW, IPT_UNUSED )
559559
560   PORT_START   /* IN2 */
560   PORT_START_TAG("IN2")   /* IN2 */
561561   PORT_DIPNAME( 0x03, 0x01, DEF_STR( Bonus_Life ) )
562562   PORT_DIPSETTING(    0x01, "2000" )
563563   PORT_DIPSETTING(    0x02, "3000" )
r2844r2845
577577   PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_START2 )
578578   PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_START1 )
579579
580   PORT_START   /* IN3 */
580   PORT_START_TAG("IN3")   /* IN3 */
581581   PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_VBLANK )
582582   PORT_BIT( 0x1e, IP_ACTIVE_LOW, IPT_UNUSED )      /* always HI */
583583   PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_SPECIAL )   /* reads what was written to 4808.  Probably not used?? */
r2844r2845
585585   PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_BUTTON1 )
586586
587587   /* Fake port to handle coins */
588   PORT_START   /* IN4 */
588   PORT_START_TAG("COINS")   /* IN4 */
589589   PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_COIN1 ) PORT_IMPULSE(1)
590590   PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_COIN2 ) PORT_IMPULSE(1)
591591
592592   /* Fake port to handle coinage dip switches. Each bit goes to 3800-3807 */
593   PORT_START   /* IN5 */
593   PORT_START_TAG("DSW")   /* IN5 */
594594   PORT_DIPNAME( 0x0f, 0x00, DEF_STR( Coin_A ) )
595595   PORT_DIPSETTING(    0x0c, DEF_STR( 4C_1C ) )
596596   PORT_DIPSETTING(    0x08, DEF_STR( 3C_1C ) )
r2844r2845
628628INPUT_PORTS_END
629629
630630static INPUT_PORTS_START( devzone )
631   PORT_START   /* IN0 */
631   PORT_START_TAG("IN0")   /* IN0 */
632632   PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNUSED )
633633   PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_2WAY
634634   PORT_BIT( 0x1c, IP_ACTIVE_LOW, IPT_UNUSED )
635635   PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_2WAY
636636   PORT_BIT( 0xc0, IP_ACTIVE_LOW, IPT_UNUSED )
637637
638   PORT_START   /* IN1 */
638   PORT_START_TAG("IN1")   /* IN1 */
639639   PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNUSED )
640640   PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_2WAY PORT_COCKTAIL
641641   PORT_BIT( 0x1c, IP_ACTIVE_LOW, IPT_UNUSED )
642642   PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_2WAY PORT_COCKTAIL
643643   PORT_BIT( 0xc0, IP_ACTIVE_LOW, IPT_UNUSED )
644644
645   PORT_START   /* IN2 */
645   PORT_START_TAG("IN2")   /* IN2 */
646646   PORT_DIPNAME( 0x03, 0x01, DEF_STR( Bonus_Life ) )
647647   PORT_DIPSETTING(    0x01, "4000" )
648648   PORT_DIPSETTING(    0x02, "6000" )
r2844r2845
662662   PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_START2 )
663663   PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_START1 )
664664
665   PORT_START   /* IN3 */
665   PORT_START_TAG("IN3")   /* IN3 */
666666   PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_VBLANK )
667667   PORT_BIT( 0x3e, IP_ACTIVE_LOW, IPT_UNUSED )
668668   PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_COCKTAIL
669669   PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_BUTTON1 )
670670
671671   /* Fake port to handle coins */
672   PORT_START   /* IN4 */
672   PORT_START_TAG("COINS")   /* IN4 */
673673   PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_COIN1 ) PORT_IMPULSE(1)
674674   PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_COIN2 ) PORT_IMPULSE(1)
675675
676   PORT_START   /* IN5 */
676   PORT_START_TAG("DSW")   /* IN5 */
677677   PORT_DIPNAME( 0x0f, 0x00, DEF_STR( Coin_A ) )
678678   PORT_DIPSETTING(    0x0c, DEF_STR( 4C_1C ) )
679679   PORT_DIPSETTING(    0x08, DEF_STR( 3C_1C ) )
r2844r2845
712712
713713
714714static INPUT_PORTS_START( devzone2 )
715   PORT_START   /* IN0 */
715   PORT_START_TAG("IN0")   /* IN0 */
716716   PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNUSED )
717717   PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_2WAY
718718   PORT_BIT( 0x1c, IP_ACTIVE_LOW, IPT_UNUSED )
719719   PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_2WAY
720720   PORT_BIT( 0xc0, IP_ACTIVE_LOW, IPT_UNUSED )
721721
722   PORT_START   /* IN1 */
722   PORT_START_TAG("IN1")   /* IN1 */
723723   PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNUSED )
724724   PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_2WAY PORT_COCKTAIL
725725   PORT_BIT( 0x1c, IP_ACTIVE_LOW, IPT_UNUSED )
726726   PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_2WAY PORT_COCKTAIL
727727   PORT_BIT( 0xc0, IP_ACTIVE_LOW, IPT_UNUSED )
728728
729   PORT_START   /* IN2 */
729   PORT_START_TAG("IN2")   /* IN2 */
730730   PORT_DIPNAME( 0x03, 0x01, DEF_STR( Bonus_Life ) )
731731   PORT_DIPSETTING(    0x01, "2000" )
732732   PORT_DIPSETTING(    0x02, "3000" )
r2844r2845
746746   PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_START2 )
747747   PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_START1 )
748748
749   PORT_START   /* IN3 */
749   PORT_START_TAG("IN3")   /* IN3 */
750750   PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_VBLANK )
751751   PORT_BIT( 0x3e, IP_ACTIVE_LOW, IPT_UNUSED )
752752   PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_COCKTAIL
753753   PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_BUTTON1 )
754754
755755   /* Fake port to handle coins */
756   PORT_START   /* IN4 */
756   PORT_START_TAG("COINS")   /* IN4 */
757757   PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_COIN1 ) PORT_IMPULSE(1)
758758   PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_COIN2 ) PORT_IMPULSE(1)
759759
760   PORT_START   /* IN5 */
760   PORT_START_TAG("DSW")   /* IN5 */
761761   PORT_DIPNAME( 0x0f, 0x00, DEF_STR( Coin_A ) )
762762   PORT_DIPSETTING(    0x0c, DEF_STR( 4C_1C ) )
763763   PORT_DIPSETTING(    0x08, DEF_STR( 3C_1C ) )
r2844r2845
796796
797797
798798static INPUT_PORTS_START( nomnlnd )
799   PORT_START   /* Controls - Remapped for game */
799   PORT_START_TAG("IN0")   /* Controls - Remapped for game */
800800   PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_8WAY
801801   PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_8WAY
802802   PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_8WAY
803803   PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_8WAY
804804   PORT_BIT( 0x55, IP_ACTIVE_LOW, IPT_SPECIAL )   /* diagonals */
805805
806   PORT_START   /* IN1 */
806   PORT_START_TAG("IN1")   /* IN1 */
807807   PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_8WAY PORT_COCKTAIL
808808   PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_8WAY PORT_COCKTAIL
809809   PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_8WAY PORT_COCKTAIL
810810   PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_8WAY PORT_COCKTAIL
811811   PORT_BIT( 0x55, IP_ACTIVE_LOW, IPT_SPECIAL )   /* diagonals */
812812
813   PORT_START   /* IN2 */
813   PORT_START_TAG("IN2")   /* IN2 */
814814   PORT_DIPNAME( 0x03, 0x02, DEF_STR( Bonus_Life ) )
815815   PORT_DIPSETTING(    0x01, "2000" )
816816   PORT_DIPSETTING(    0x02, "3000" )
r2844r2845
830830   PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_START2 )
831831   PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_START1 )
832832
833   PORT_START   /* IN3 */
833   PORT_START_TAG("IN3")   /* IN3 */
834834   PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_VBLANK )
835835   PORT_BIT( 0x1e, IP_ACTIVE_LOW, IPT_UNUSED )      /* always HI */
836836   PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_SPECIAL )   /* reads what was written to 4808.  Probably not used?? */
r2844r2845
838838   PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_BUTTON1 )
839839
840840   /* Fake port to handle coin */
841   PORT_START   /* IN4 */
841   PORT_START_TAG("COIN")   /* IN4 */
842842   PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_COIN1 ) PORT_IMPULSE(1)
843843INPUT_PORTS_END
844844
845845
846846static INPUT_PORTS_START( nomnlndg )
847   PORT_START   /* Controls - Remapped for game */
847   PORT_START_TAG("IN0")   /* Controls - Remapped for game */
848848   PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_8WAY
849849   PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_8WAY
850850   PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_8WAY
851851   PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_8WAY
852852   PORT_BIT( 0x55, IP_ACTIVE_LOW, IPT_UNUSED )
853853
854   PORT_START   /* IN1 */
854   PORT_START_TAG("IN1")   /* IN1 */
855855   PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_8WAY PORT_COCKTAIL
856856   PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_8WAY PORT_COCKTAIL
857857   PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_8WAY PORT_COCKTAIL
858858   PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_8WAY PORT_COCKTAIL
859859   PORT_BIT( 0x55, IP_ACTIVE_LOW, IPT_UNUSED )
860860
861   PORT_START   /* IN2 */
861   PORT_START_TAG("IN2")   /* IN2 */
862862   PORT_DIPNAME( 0x03, 0x02, DEF_STR( Bonus_Life ) )
863863   PORT_DIPSETTING(    0x01, "3000" )
864864   PORT_DIPSETTING(    0x02, "5000" )
r2844r2845
878878   PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_START2 )
879879   PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_START1 )
880880
881   PORT_START   /* IN3 */
881   PORT_START_TAG("IN3")   /* IN3 */
882882   PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_VBLANK )
883883   PORT_BIT( 0x1e, IP_ACTIVE_LOW, IPT_UNUSED )      /* always HI */
884884   PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_SPECIAL )   /* reads what was written to 4808.  Probably not used?? */
r2844r2845
886886   PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_BUTTON1 )
887887
888888   /* Fake port to handle coin */
889   PORT_START   /* IN4 */
889   PORT_START_TAG("COIN")   /* IN4 */
890890   PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_COIN1 ) PORT_IMPULSE(1)
891891INPUT_PORTS_END
892892
src/mame/drivers/bmcbowl.c
r2844r2845
225225
226226static READ8_HANDLER(via_b_in)
227227{
228   return input_port_read_indexed(machine, 3);
228   return input_port_read(machine, "IN3");
229229}
230230
231231
r2844r2845
360360
361361
362362static INPUT_PORTS_START( bmcbowl )
363   PORT_START   /* DSW 1 */
363   PORT_START_TAG("IN0")   /* DSW 1 */
364364   PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_SERVICE1 )   PORT_NAME("Note")
365365   PORT_BIT( 0x1000, IP_ACTIVE_LOW, IPT_SERVICE2 )   PORT_NAME("Analizer")
366366
r2844r2845
381381   PORT_BIT(0x4000, IP_ACTIVE_LOW, IPT_OTHER ) PORT_NAME("Big") PORT_CODE(KEYCODE_G)
382382   PORT_BIT(0x8000, IP_ACTIVE_LOW, IPT_OTHER ) PORT_NAME("Double") PORT_CODE(KEYCODE_H)
383383
384   PORT_START   /* DSW 2 */
384   PORT_START_TAG("IN1")   /* DSW 2 */
385385   PORT_DIPNAME( 0x20, 0x20, DEF_STR( Coinage ) )
386   PORT_DIPSETTING(    0x20, "1 COIN 10 CREDITS")
387   PORT_DIPSETTING(    0x00, "2 COINS 10 CREDITS")
386   PORT_DIPSETTING(    0x20, "1 COIN 10 CREDITS" )
387   PORT_DIPSETTING(    0x00, "2 COINS 10 CREDITS" )
388388
389389   PORT_DIPNAME( 0x01, 0x00, "DSW2 8" )
390390   PORT_DIPSETTING(    0x01, DEF_STR( Off ) )
r2844r2845
409409   PORT_DIPSETTING(    0x80, DEF_STR( Off ) )
410410   PORT_DIPSETTING(    0x00, DEF_STR( On ) )
411411
412   PORT_START   /* DSW 4 */
412   PORT_START_TAG("IN2")   /* DSW 4 */
413413   PORT_DIPNAME( 0x01, 0x00, "DSW4 8" )
414414   PORT_DIPSETTING(    0x01, DEF_STR( Off ) )
415415   PORT_DIPSETTING(    0x00, DEF_STR( On ) )
r2844r2845
435435   PORT_DIPSETTING(    0x80, DEF_STR( Off ) )
436436   PORT_DIPSETTING(    0x00, DEF_STR( On ) )
437437
438   PORT_START
438   PORT_START_TAG("IN3")
439439   PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_COIN2 ) PORT_IMPULSE(1)
440440   PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_IMPULSE(1)
441   PORT_BIT ( 0x80, IP_ACTIVE_LOW, IPT_VBLANK )
441   PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_VBLANK )
442442
443443INPUT_PORTS_END
444444
r2844r2845
446446{
447447   switch(bmc_input)
448448   {
449         case 0x00:   return  input_port_read_indexed(machine, 1);
450         case 0x40:   return  input_port_read_indexed(machine, 2);
449         case 0x00:   return  input_port_read(machine, "IN1");
450         case 0x40:   return  input_port_read(machine, "IN2");
451451   }
452452   logerror("unknown input - %X (PC=%X)\n",bmc_input,activecpu_get_previouspc());
453453   return 0xff;
src/mame/drivers/blockade.c
r2844r2845
6767{
6868   cpunum_resume(0, SUSPEND_ANY_REASON);
6969
70   if ((input_port_read_indexed(machine, 0) & 0x80) == 0)
70   if ((input_port_read(machine, "IN0") & 0x80) == 0)
7171   {
7272      just_been_reset = 1;
7373      cpunum_set_input_line(machine, 0, INPUT_LINE_RESET, PULSE_LINE);
r2844r2845
7878{
7979    /* coin latch is bit 7 */
8080
81    UINT8 temp = (input_port_read_indexed(machine, 0)&0x7f);
81    UINT8 temp = (input_port_read(machine, "IN0") & 0x7f);
8282    return (coin_latch<<7) | (temp);
8383}
8484
r2844r2845
129129
130130static ADDRESS_MAP_START( readport, ADDRESS_SPACE_IO, 8 )
131131    AM_RANGE(0x01, 0x01) AM_READ(blockade_input_port_0_r)
132    AM_RANGE(0x02, 0x02) AM_READ(input_port_1_r)
133    AM_RANGE(0x04, 0x04) AM_READ(input_port_2_r)
132    AM_RANGE(0x02, 0x02) AM_READ_PORT("IN1")
133    AM_RANGE(0x04, 0x04) AM_READ_PORT("IN2")
134134ADDRESS_MAP_END
135135
136136static ADDRESS_MAP_START( writeport, ADDRESS_SPACE_IO, 8 )
r2844r2845
146146/* some pins were unused.                         */
147147
148148static INPUT_PORTS_START( blockade )
149    PORT_START  /* IN0 */
150    PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN )
151    PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN )
152    PORT_DIPNAME(    0x04, 0x04, "Boom Switch" )
153    PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
154    PORT_DIPSETTING( 0x04, DEF_STR( On ) )
155    PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN )
156    PORT_DIPNAME(    0x70, 0x70, DEF_STR( Lives ) )
157    PORT_DIPSETTING( 0x60, "3" )
158    PORT_DIPSETTING( 0x50, "4" )
159    PORT_DIPSETTING( 0x30, "5" )
160    PORT_DIPSETTING( 0x70, "6" )
161    PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_IMPULSE(1)
162                                /* this is really used for the coin latch,  */
163                                /* see blockade_interrupt()                 */
149   PORT_START_TAG("IN0")      /* IN0 */
150   PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN )
151   PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN )
152   PORT_DIPNAME( 0x04, 0x04, "Boom Switch" )
153   PORT_DIPSETTING(   0x00, DEF_STR( Off ) )
154   PORT_DIPSETTING(   0x04, DEF_STR( On ) )
155   PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN )
156   PORT_DIPNAME( 0x70, 0x70, DEF_STR( Lives ) )
157   PORT_DIPSETTING(   0x60, "3" )
158   PORT_DIPSETTING(   0x50, "4" )
159   PORT_DIPSETTING(   0x30, "5" )
160   PORT_DIPSETTING(   0x70, "6" )
161   PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_IMPULSE(1)
162                        /* this is really used for the coin latch,  */
163                        /* see blockade_interrupt()                 */
164164
165    PORT_START  /* IN1 */
166    PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_4WAY PORT_PLAYER(2)
167    PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_4WAY PORT_PLAYER(2)
168    PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_4WAY PORT_PLAYER(2)
169    PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_4WAY PORT_PLAYER(2)
170    PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_4WAY PORT_PLAYER(1)
171    PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_4WAY PORT_PLAYER(1)
172    PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_4WAY PORT_PLAYER(1)
173    PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_4WAY PORT_PLAYER(1)
165   PORT_START_TAG("IN1")      /* IN1 */
166   PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_4WAY PORT_PLAYER(2)
167   PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_4WAY PORT_PLAYER(2)
168   PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_4WAY PORT_PLAYER(2)
169   PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_4WAY PORT_PLAYER(2)
170   PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_4WAY PORT_PLAYER(1)
171   PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_4WAY PORT_PLAYER(1)
172   PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_4WAY PORT_PLAYER(1)
173   PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_4WAY PORT_PLAYER(1)
174174
175    PORT_START  /* IN2 */
176    PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN )
177    PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN )
178    PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN )
179    PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN )
180    PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN )
181    PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN )
182    PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
183    PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
175   PORT_START_TAG("IN2")      /* IN2 */
176   PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN )
177   PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN )
178   PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN )
179   PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN )
180   PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN )
181   PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN )
182   PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
183   PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
184184
185   PORT_START   /* IN3 */
185   PORT_START_TAG("IN3")      /* IN3 */
186186   PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_VBLANK )
187187   PORT_BIT( 0x7f, IP_ACTIVE_LOW, IPT_UNKNOWN )
188188INPUT_PORTS_END
189189
190190static INPUT_PORTS_START( comotion )
191    PORT_START  /* IN0 */
192    PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN )
193    PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN )
194    PORT_DIPNAME(    0x04, 0x04, "Boom Switch" )
195    PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
196    PORT_DIPSETTING( 0x04, DEF_STR( On ) )
197    PORT_DIPNAME(    0x08, 0x00, DEF_STR( Lives ) )
198    PORT_DIPSETTING( 0x00, "3" )
199    PORT_DIPSETTING( 0x08, "4" )
200    PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_START1 )
201    PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN )
202    PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
203    PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_IMPULSE(1)
204                                /* this is really used for the coin latch,  */
205                                /* see blockade_interrupt()                 */
191   PORT_START_TAG("IN0")      /* IN0 */
192   PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN )
193   PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN )
194   PORT_DIPNAME( 0x04, 0x04, "Boom Switch" )
195   PORT_DIPSETTING(   0x00, DEF_STR( Off ) )
196   PORT_DIPSETTING(   0x04, DEF_STR( On ) )
197   PORT_DIPNAME( 0x08, 0x00, DEF_STR( Lives ) )
198   PORT_DIPSETTING(   0x00, "3" )
199   PORT_DIPSETTING(   0x08, "4" )
200   PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_START1 )
201   PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN )
202   PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
203   PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_IMPULSE(1)
204                        /* this is really used for the coin latch,  */
205                        /* see blockade_interrupt()                 */
206206
207    PORT_START  /* IN1 */
208    PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_4WAY PORT_PLAYER(1)
209    PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_4WAY PORT_PLAYER(1)
210    PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_4WAY PORT_PLAYER(1)
211    PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_4WAY PORT_PLAYER(1)
212    PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_4WAY PORT_PLAYER(3)
213    PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_4WAY PORT_PLAYER(3)
214    PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_4WAY PORT_PLAYER(3)
215    PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_4WAY PORT_PLAYER(3)
207   PORT_START_TAG("IN1")      /* IN1 */
208   PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_4WAY PORT_PLAYER(1)
209   PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_4WAY PORT_PLAYER(1)
210   PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_4WAY PORT_PLAYER(1)
211   PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_4WAY PORT_PLAYER(1)
212   PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_4WAY PORT_PLAYER(3)
213   PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_4WAY PORT_PLAYER(3)
214   PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_4WAY PORT_PLAYER(3)
215   PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_4WAY PORT_PLAYER(3)
216216
217    PORT_START  /* IN2 */
218    PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_4WAY PORT_PLAYER(2)
219    PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_4WAY PORT_PLAYER(2)
220    PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_4WAY PORT_PLAYER(2)
221    PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_4WAY PORT_PLAYER(2)
222    PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_4WAY PORT_PLAYER(4)
223    PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_4WAY PORT_PLAYER(4)
224    PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_4WAY PORT_PLAYER(4)
225    PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_4WAY PORT_PLAYER(4)
217   PORT_START_TAG("IN2")      /* IN2 */
218   PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_4WAY PORT_PLAYER(2)
219   PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_4WAY PORT_PLAYER(2)
220   PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_4WAY PORT_PLAYER(2)
221   PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_4WAY PORT_PLAYER(2)
222   PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_4WAY PORT_PLAYER(4)
223   PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_4WAY PORT_PLAYER(4)
224   PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_4WAY PORT_PLAYER(4)
225   PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_4WAY PORT_PLAYER(4)
226226
227   PORT_START   /* IN3 */
227   PORT_START_TAG("IN3")      /* IN3 */
228228   PORT_BIT( 0x7f, IP_ACTIVE_LOW, IPT_UNKNOWN )
229229   PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_VBLANK )
230230INPUT_PORTS_END
231231
232232static INPUT_PORTS_START( blasto )
233    PORT_START  /* IN0 */
234    PORT_DIPNAME(    0x03, 0x03, DEF_STR( Coinage ) )
235    PORT_DIPSETTING( 0x00, DEF_STR( 4C_1C ) )
236    PORT_DIPSETTING( 0x01, DEF_STR( 3C_1C ) )
237    PORT_DIPSETTING( 0x02, DEF_STR( 2C_1C ) )
238    PORT_DIPSETTING( 0x03, DEF_STR( 1C_1C ) )
239    PORT_DIPNAME(    0x04, 0x04, "Boom Switch" )
240    PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
241    PORT_DIPSETTING( 0x04, DEF_STR( On ) )
242    PORT_DIPNAME(    0x08, 0x08, DEF_STR( Game_Time ) )
243    PORT_DIPSETTING( 0x00, "70 Secs" )
244    PORT_DIPSETTING( 0x08, "90 Secs" )
245    PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN )
246    PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN )
247    PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
248    PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_IMPULSE(1)
249                                /* this is really used for the coin latch,  */
250                                /* see blockade_interrupt()                 */
233   PORT_START_TAG("IN0")      /* IN0 */
234   PORT_DIPNAME( 0x03, 0x03, DEF_STR( Coinage ) )
235   PORT_DIPSETTING(   0x00, DEF_STR( 4C_1C ) )
236   PORT_DIPSETTING(   0x01, DEF_STR( 3C_1C ) )
237   PORT_DIPSETTING(   0x02, DEF_STR( 2C_1C ) )
238   PORT_DIPSETTING(   0x03, DEF_STR( 1C_1C ) )
239   PORT_DIPNAME( 0x04, 0x04, "Boom Switch" )
240   PORT_DIPSETTING(   0x00, DEF_STR( Off ) )
241   PORT_DIPSETTING(   0x04, DEF_STR( On ) )
242   PORT_DIPNAME( 0x08, 0x08, DEF_STR( Game_Time ) )
243   PORT_DIPSETTING(   0x00, "70 Secs" )
244   PORT_DIPSETTING(   0x08, "90 Secs" )
245   PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN )
246   PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN )
247   PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
248   PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_IMPULSE(1)
249                        /* this is really used for the coin latch,  */
250                        /* see blockade_interrupt()                 */
251251
252    PORT_START  /* IN1 */
253    PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(2)
254    PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN )
255    PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN )
256    PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN )
257    PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN )
258    PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_START1 )
259    PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_START2 )
260    PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(1)
252   PORT_START_TAG("IN1")      /* IN1 */
253   PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(2)
254   PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN )
255   PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN )
256   PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN )
257   PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN )
258   PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_START1 )
259   PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_START2 )
260   PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(1)
261261
262    PORT_START  /* IN2 */
263    PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_4WAY PORT_PLAYER(2)
264    PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_4WAY PORT_PLAYER(2)
265    PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_4WAY PORT_PLAYER(2)
266    PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_4WAY PORT_PLAYER(2)
267    PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_4WAY PORT_PLAYER(1)
268    PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_4WAY PORT_PLAYER(1)
269    PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_4WAY PORT_PLAYER(1)
270    PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_4WAY PORT_PLAYER(1)
262   PORT_START_TAG("IN2")      /* IN2 */
263   PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_4WAY PORT_PLAYER(2)
264   PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_4WAY PORT_PLAYER(2)
265   PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_4WAY PORT_PLAYER(2)
266   PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_4WAY PORT_PLAYER(2)
267   PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_4WAY PORT_PLAYER(1)
268   PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_4WAY PORT_PLAYER(1)
269   PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_4WAY PORT_PLAYER(1)
270   PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_4WAY PORT_PLAYER(1)
271271
272   PORT_START   /* IN3 */
272   PORT_START_TAG("IN3")      /* IN3 */
273273   PORT_BIT( 0x7f, IP_ACTIVE_LOW, IPT_UNKNOWN )
274274   PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_VBLANK )
275275INPUT_PORTS_END
276276
277277static INPUT_PORTS_START( hustle )
278    PORT_START  /* IN0 */
279    PORT_DIPNAME(    0x03, 0x03, DEF_STR( Coinage ) )
280    PORT_DIPSETTING( 0x00, DEF_STR( 4C_1C ) )
281    PORT_DIPSETTING( 0x01, DEF_STR( 3C_1C ) )
282    PORT_DIPSETTING( 0x02, DEF_STR( 2C_1C ) )
283    PORT_DIPSETTING( 0x03, DEF_STR( 1C_1C ) )
284    PORT_DIPNAME(    0x04, 0x04, DEF_STR( Game_Time ) )
285    PORT_DIPSETTING( 0x00, "1.5 mins" )
286    PORT_DIPSETTING( 0x04, "2 mins" )
287    PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_START1 )
288    PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_START2 )
289    PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN )
290    PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
291    PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_IMPULSE(1)
292                                /* this is really used for the coin latch,  */
293                                /* see blockade_interrupt()                 */
278   PORT_START_TAG("IN0")      /* IN0 */
279   PORT_DIPNAME( 0x03, 0x03, DEF_STR( Coinage ) )
280   PORT_DIPSETTING(   0x00, DEF_STR( 4C_1C ) )
281   PORT_DIPSETTING(   0x01, DEF_STR( 3C_1C ) )
282   PORT_DIPSETTING(   0x02, DEF_STR( 2C_1C ) )
283   PORT_DIPSETTING(   0x03, DEF_STR( 1C_1C ) )
284   PORT_DIPNAME( 0x04, 0x04, DEF_STR( Game_Time ) )
285   PORT_DIPSETTING(   0x00, "1.5 mins" )
286   PORT_DIPSETTING(   0x04, "2 mins" )
287   PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_START1 )
288   PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_START2 )
289   PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN )
290   PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
291   PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_IMPULSE(1)
292                        /* this is really used for the coin latch,  */
293                        /* see blockade_interrupt()                 */
294294
295    PORT_START  /* IN1 */
296    PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_4WAY PORT_PLAYER(2)
297    PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_4WAY PORT_PLAYER(2)
298    PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_4WAY PORT_PLAYER(2)
299    PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_4WAY PORT_PLAYER(2)
300    PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_4WAY PORT_PLAYER(1)
301    PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_4WAY PORT_PLAYER(1)
302    PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_4WAY PORT_PLAYER(1)
303    PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_4WAY PORT_PLAYER(1)
295   PORT_START_TAG("IN1")      /* IN1 */
296   PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_4WAY PORT_PLAYER(2)
297   PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_4WAY PORT_PLAYER(2)
298   PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_4WAY PORT_PLAYER(2)
299   PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_4WAY PORT_PLAYER(2)
300   PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_4WAY PORT_PLAYER(1)
301   PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_4WAY PORT_PLAYER(1)
302   PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_4WAY PORT_PLAYER(1)
303   PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_4WAY PORT_PLAYER(1)
304304
305    PORT_START  /* IN2 */
305   PORT_START_TAG("IN2")      /* IN2 */
306306   PORT_DIPNAME( 0xf1, 0xf0, "Free Game" )
307   PORT_DIPSETTING ( 0x71, "11000" )
308    PORT_DIPSETTING ( 0xb1, "13000" )
309   PORT_DIPSETTING ( 0xd1, "15000" )
310   PORT_DIPSETTING ( 0xe1, "17000" )
311    PORT_DIPSETTING ( 0xf0, "Disabled" )
312    PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN )
313    PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN )
314    PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN )
307   PORT_DIPSETTING(   0x71, "11000" )
308   PORT_DIPSETTING(   0xb1, "13000" )
309   PORT_DIPSETTING(   0xd1, "15000" )
310   PORT_DIPSETTING(   0xe1, "17000" )
311   PORT_DIPSETTING(   0xf0, "Disabled" )
312   PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN )
313   PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN )
314   PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN )
315315
316   PORT_START   /* IN3 */
316   PORT_START_TAG("IN3")      /* IN3 */
317317   PORT_BIT( 0x7f, IP_ACTIVE_LOW, IPT_UNKNOWN )
318318   PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_VBLANK )
319319INPUT_PORTS_END
320320
321321static INPUT_PORTS_START( mineswpr )
322    PORT_START  /* IN0 */
323    PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN )
322   PORT_START_TAG("IN0")      /* IN0 */
323   PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN )
324324   PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN ) /* This wiring selects upright mode */
325    PORT_DIPNAME(    0x04, 0x04, "Boom Switch" )
326    PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
327    PORT_DIPSETTING( 0x04, DEF_STR( On ) )
328    PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN )
329    PORT_DIPNAME(    0x70, 0x70, DEF_STR( Lives ) )
330    PORT_DIPSETTING( 0x60, "3" )
331    PORT_DIPSETTING( 0x50, "4" )
332    PORT_DIPSETTING( 0x30, "5" )
333    PORT_DIPSETTING( 0x70, "6" )
334    PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_IMPULSE(1)
335                                /* this is really used for the coin latch,  */
336                                /* see blockade_interrupt()                 */
325   PORT_DIPNAME( 0x04, 0x04, "Boom Switch" )
326   PORT_DIPSETTING(   0x00, DEF_STR( Off ) )
327   PORT_DIPSETTING(   0x04, DEF_STR( On ) )
328   PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN )
329   PORT_DIPNAME( 0x70, 0x70, DEF_STR( Lives ) )
330   PORT_DIPSETTING(   0x60, "3" )
331   PORT_DIPSETTING(   0x50, "4" )
332   PORT_DIPSETTING(   0x30, "5" )
333   PORT_DIPSETTING(   0x70, "6" )
334   PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_IMPULSE(1)
335                        /* this is really used for the coin latch,  */
336                        /* see blockade_interrupt()                 */
337337
338    PORT_START  /* IN1 */
339    PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_4WAY PORT_PLAYER(1)
340    PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_4WAY PORT_PLAYER(1)
341    PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_4WAY PORT_PLAYER(1)
342    PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_4WAY PORT_PLAYER(1)
343    PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_4WAY PORT_PLAYER(2)
344    PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_4WAY PORT_PLAYER(2)
345    PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_4WAY PORT_PLAYER(2)
346    PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_4WAY PORT_PLAYER(2)
338   PORT_START_TAG("IN1")      /* IN1 */
339   PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_4WAY PORT_PLAYER(1)
340   PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_4WAY PORT_PLAYER(1)
341   PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_4WAY PORT_PLAYER(1)
342   PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_4WAY PORT_PLAYER(1)
343   PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_4WAY PORT_PLAYER(2)
344   PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_4WAY PORT_PLAYER(2)
345   PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_4WAY PORT_PLAYER(2)
346   PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_4WAY PORT_PLAYER(2)
347347
348    PORT_START  /* IN2 */
349    PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN )
350    PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN )
351    PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN )
352    PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN )
353    PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN )
354    PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN )
355    PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
356    PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
348   PORT_START_TAG("IN2")      /* IN2 */
349   PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN )
350   PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN )
351   PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN )
352   PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN )
353   PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN )
354   PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN )
355   PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
356   PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
357357
358   PORT_START   /* IN3 */
358   PORT_START_TAG("IN3")      /* IN3 */
359359   PORT_BIT( 0x7f, IP_ACTIVE_LOW, IPT_UNKNOWN )
360360   PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_VBLANK )
361361INPUT_PORTS_END
362362
363363static INPUT_PORTS_START( minesw4p )
364    PORT_START  /* IN0 */
365    PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN )
364   PORT_START_TAG("IN0")      /* IN0 */
365   PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN )
366366   PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_UNKNOWN ) /* This wiring selects cocktail mode */
367    PORT_DIPNAME(    0x04, 0x04, "Boom Switch" )
368    PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
369    PORT_DIPSETTING( 0x04, DEF_STR( On ) )
370    PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN )
371    PORT_DIPNAME(    0x70, 0x70, DEF_STR( Lives ) )
372    PORT_DIPSETTING( 0x60, "3" )
373    PORT_DIPSETTING( 0x50, "4" )
374    PORT_DIPSETTING( 0x30, "5" )
375    PORT_DIPSETTING( 0x70, "6" )
376    PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_IMPULSE(1)
377                                /* this is really used for the coin latch,  */
378                                /* see blockade_interrupt()                 */
367   PORT_DIPNAME( 0x04, 0x04, "Boom Switch" )
368   PORT_DIPSETTING(   0x00, DEF_STR( Off ) )
369   PORT_DIPSETTING(   0x04, DEF_STR( On ) )
370   PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN )
371   PORT_DIPNAME( 0x70, 0x70, DEF_STR( Lives ) )
372   PORT_DIPSETTING(   0x60, "3" )
373   PORT_DIPSETTING(   0x50, "4" )
374   PORT_DIPSETTING(   0x30, "5" )
375   PORT_DIPSETTING(   0x70, "6" )
376   PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_IMPULSE(1)
377                        /* this is really used for the coin latch,  */
378                        /* see blockade_interrupt()                 */
379379
380    PORT_START  /* IN1 */
381    PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_4WAY PORT_PLAYER(1)
382    PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_4WAY PORT_PLAYER(1)
383    PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_4WAY PORT_PLAYER(1)
384    PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_4WAY PORT_PLAYER(1)
385    PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_4WAY PORT_PLAYER(2)
386    PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_4WAY PORT_PLAYER(2)
387    PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_4WAY PORT_PLAYER(2)
388    PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_4WAY PORT_PLAYER(2)
380   PORT_START_TAG("IN1")      /* IN1 */
381   PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_4WAY PORT_PLAYER(1)
382   PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_4WAY PORT_PLAYER(1)
383   PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_4WAY PORT_PLAYER(1)
384   PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_4WAY PORT_PLAYER(1)
385   PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_4WAY PORT_PLAYER(2)
386   PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_4WAY PORT_PLAYER(2)
387   PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_4WAY PORT_PLAYER(2)
388   PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_4WAY PORT_PLAYER(2)
389389
390    PORT_START  /* IN2 */
391    PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_4WAY PORT_PLAYER(3)
392    PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_4WAY PORT_PLAYER(3)
393    PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_4WAY PORT_PLAYER(3)
394    PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_4WAY PORT_PLAYER(3)
395    PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_4WAY PORT_PLAYER(4)
396    PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_4WAY PORT_PLAYER(4)
397    PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_4WAY PORT_PLAYER(4)
398    PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_4WAY PORT_PLAYER(4)
390   PORT_START_TAG("IN2")      /* IN2 */
391   PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_4WAY PORT_PLAYER(3)
392   PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_4WAY PORT_PLAYER(3)
393   PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_4WAY PORT_PLAYER(3)
394   PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_4WAY PORT_PLAYER(3)
395   PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_4WAY PORT_PLAYER(4)
396   PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_4WAY PORT_PLAYER(4)
397   PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_4WAY PORT_PLAYER(4)
398   PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_4WAY PORT_PLAYER(4)
399399
400   PORT_START   /* IN3 */
400   PORT_START_TAG("IN3")      /* IN3 */
401401   PORT_BIT( 0x7f, IP_ACTIVE_LOW, IPT_UNKNOWN )
402402   PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_VBLANK )
403403INPUT_PORTS_END
src/mame/drivers/namcos12.c
r2844r2845
12061206
12071207static MACHINE_RESET( namcos12 )
12081208{
1209   psx_machine_init();
1209   psx_machine_init(machine);
12101210   bankoffset_w(machine,0,0,0xffffffff);
12111211
12121212   if( strcmp( machine->gamedrv->name, "tektagt" ) == 0 ||
src/mame/drivers/raiden2.c
r2844r2845
6262#include "audio/seibu.h"
6363#include "machine/eeprom.h"
6464#include "sound/okim6295.h"
65#include "machine/seicop.h"
66#include "includes/raiden2.h"
6567
66/* in machine/r2crypt.c */
67extern void raiden2_decrypt_sprites(void);
6868
6969static tilemap *background_layer,*midground_layer,*foreground_layer,*text_layer;
7070static UINT16 *back_data,*fore_data,*mid_data, *w1ram;
r2844r2845
8181   COMBINE_DATA(dest);
8282}
8383
84/* machine/seicop.c */
85extern READ16_HANDLER( raiden2_cop2_r );
86extern WRITE16_HANDLER( raiden2_cop2_w );
87//extern void cop_init(void);
8884
8985
90
9186/* SPRITE DRAWING (move to video file) */
9287
9388static void draw_sprites(running_machine *machine, bitmap_t *bitmap, const rectangle *cliprect ,int pri_mask )
r2844r2845
750745
751746/* MEMORY MAPS */
752747
753extern UINT16* cop_mcu_ram;
754extern WRITE16_HANDLER( raiden2_mcu_w );
755extern READ16_HANDLER( raiden2_mcu_r );
756
757748static ADDRESS_MAP_START( raiden2_mem, ADDRESS_SPACE_PROGRAM, 16 )
758749   AM_RANGE(0x00400, 0x007ff) AM_READWRITE(raiden2_mcu_r, raiden2_mcu_w) AM_BASE(&cop_mcu_ram)
759750
src/mame/drivers/taitojc.c
r2844r2845
381381extern WRITE32_HANDLER(taitojc_tile_w);
382382extern READ32_HANDLER(taitojc_char_r);
383383extern WRITE32_HANDLER(taitojc_char_w);
384extern void taitojc_clear_frame(void);
385extern void taitojc_render_polygons(UINT16 *polygon_fifo, int length);
384extern void taitojc_clear_frame(running_machine *machine);
385extern void taitojc_render_polygons(running_machine *machine, UINT16 *polygon_fifo, int length);
386386
387387extern VIDEO_START(taitojc);
388388extern VIDEO_UPDATE(taitojc);
r2844r2845
10171017{
10181018   if (offset == 0)
10191019   {
1020      taitojc_clear_frame();
1021      taitojc_render_polygons(polygon_fifo, polygon_fifo_ptr);
1020      taitojc_clear_frame(machine);
1021      taitojc_render_polygons(machine, polygon_fifo, polygon_fifo_ptr);
10221022
10231023      polygon_fifo_ptr = 0;
10241024   }
src/mame/drivers/missb2.c
r2844r2845
1717#include "deprecat.h"
1818#include "sound/okim6295.h"
1919#include "sound/3812intf.h"
20#include "includes/bublbobl.h"
2021
2122static UINT8 *bg_paletteram, *missb2_bgvram;
2223
23/* video/bublbobl.c */
24extern UINT8 *bublbobl_objectram;
25extern size_t bublbobl_objectram_size;
26
27/* machine/bublbobl.c */
28WRITE8_HANDLER( bublbobl_bankswitch_w );
29WRITE8_HANDLER( bublbobl_nmitrigger_w );
30WRITE8_HANDLER( bublbobl_sound_command_w );
31WRITE8_HANDLER( bublbobl_sh_nmi_disable_w );
32WRITE8_HANDLER( bublbobl_sh_nmi_enable_w );
33extern int bublbobl_video_enable;
34
3524/* Video Hardware */
3625
3726static VIDEO_UPDATE( missb2 )
src/mame/drivers/pitnrun.c
r2844r2845
6666#include "driver.h"
6767#include "cpu/m6805/m6805.h"
6868#include "sound/ay8910.h"
69#include "includes/pitnrun.h"
6970
70WRITE8_HANDLER (pitnrun_68705_portA_w);
71WRITE8_HANDLER (pitnrun_68705_portB_w);
72
73READ8_HANDLER (pitnrun_68705_portA_r);
74READ8_HANDLER (pitnrun_68705_portB_r);
75READ8_HANDLER (pitnrun_68705_portC_r);
76
77MACHINE_RESET( pitnrun );
78
79READ8_HANDLER( pitnrun_mcu_data_r );
80READ8_HANDLER( pitnrun_mcu_status_r );
81WRITE8_HANDLER( pitnrun_mcu_data_w );
82
83extern UINT8* pitnrun_videoram2;
84
85WRITE8_HANDLER( pitnrun_videoram_w );
86WRITE8_HANDLER( pitnrun_videoram2_w );
87WRITE8_HANDLER(pitnrun_ha_w);
88WRITE8_HANDLER(pitnrun_h_heed_w);
89WRITE8_HANDLER(pitnrun_v_heed_w);
90WRITE8_HANDLER(pitnrun_color_select_w);
91WRITE8_HANDLER( pitnrun_char_bank_select );
92WRITE8_HANDLER( pitnrun_scroll_w );
93READ8_HANDLER( pitnrun_videoram_r );
94READ8_HANDLER( pitnrun_videoram2_r );
95
96PALETTE_INIT(pitnrun);
97VIDEO_START(pitnrun);
98VIDEO_UPDATE(pitnrun);
99
10071static int pitnrun_nmi;
10172
10273static INTERRUPT_GEN( pitnrun_nmi_source )
src/mame/drivers/bionicc.c
r2844r2845
9797
9898static WRITE16_HANDLER( bionicc_mpu_trigger_w )
9999{
100   data = input_port_read_indexed(machine, 0) >> 12;
100   data = input_port_read(machine, "IN0") >> 12;
101101   bionicc_inp[0] = data ^ 0x0f;
102102
103   data = input_port_read_indexed(machine, 3); /* player 2 controls */
103   data = input_port_read(machine, "IN2");      /* player 2 controls */
104104   bionicc_inp[1] = data ^ 0xff;
105105
106   data = input_port_read_indexed(machine, 2); /* player 1 controls */
106   data = input_port_read(machine, "IN1");      /* player 1 controls */
107107   bionicc_inp[2] = data ^ 0xff;
108108}
109109
r2844r2845
195195
196196
197197static INPUT_PORTS_START( bionicc )
198   PORT_START
198   PORT_START_TAG("IN0")
199199   PORT_BIT( 0x0fff, IP_ACTIVE_LOW, IPT_UNKNOWN )
200200   PORT_BIT( 0x1000, IP_ACTIVE_LOW, IPT_START2 )
201201   PORT_BIT( 0x2000, IP_ACTIVE_LOW, IPT_START1 )
202202   PORT_BIT( 0x4000, IP_ACTIVE_LOW, IPT_COIN2 )
203203   PORT_BIT( 0x8000, IP_ACTIVE_LOW, IPT_COIN1 )
204204
205   PORT_START
205   PORT_START_TAG("DSW")
206206   PORT_DIPNAME( 0x0007, 0x0007, DEF_STR( Coin_A ) )      PORT_DIPLOCATION("SWB:1,2,3")
207207   PORT_DIPSETTING(      0x0000, DEF_STR( 4C_1C ) )
208208   PORT_DIPSETTING(      0x0001, DEF_STR( 3C_1C ) )
r2844r2845
247247   PORT_DIPSETTING(      0x8000, DEF_STR( Off ))
248248   PORT_DIPSETTING(      0x0000, DEF_STR( On ) )
249249
250   PORT_START
250   PORT_START_TAG("IN1")
251251   PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON2 )
252252   PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON1 )
253253   PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_8WAY
r2844r2845
257257   PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
258258   PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
259259
260   PORT_START
260   PORT_START_TAG("IN2")
261261   PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_COCKTAIL
262262   PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_COCKTAIL
263263   PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_8WAY PORT_COCKTAIL
src/mame/drivers/citycon.c
r2844r2845
2121
2222static READ8_HANDLER( citycon_in_r )
2323{
24   return input_port_read_indexed(machine, flip_screen_get() ? 1 : 0);
24   return input_port_read(machine, flip_screen_get() ? "IN1" : "IN0");
2525}
2626
2727
r2844r2845
2929static ADDRESS_MAP_START( readmem, ADDRESS_SPACE_PROGRAM, 8 )
3030   AM_RANGE(0x0000, 0x1fff) AM_READ(SMH_RAM)
3131   AM_RANGE(0x3000, 0x3000) AM_READ(citycon_in_r)   /* player 1 & 2 inputs multiplexed */
32   AM_RANGE(0x3001, 0x3001) AM_READ(input_port_2_r)
33   AM_RANGE(0x3002, 0x3002) AM_READ(input_port_3_r)
32   AM_RANGE(0x3001, 0x3001) AM_READ_PORT("IN2")
33   AM_RANGE(0x3002, 0x3002) AM_READ_PORT("IN3")
3434   AM_RANGE(0x3007, 0x3007) AM_READ(watchdog_reset_r)   /* ? */
3535   AM_RANGE(0x4000, 0xffff) AM_READ(SMH_ROM)
3636ADDRESS_MAP_END
src/mame/drivers/ampoker2.c
r2844r2845
2121    ampkr2b3   clone      American Poker II (bootleg, set 3).
2222    pkrdewin   clone      Poker De Win.
2323    ampkr95    clone      American Poker 95.
24    videomat   clone      Videomat (polish bootleg).
2425    sigmapkr   parent     Sigma Poker.
2526    sigma2k    parent     Sigma Poker 2000.
2627
r2844r2845
276277    --- DRIVER UPDATES ---
277278
278279
280    [2008-06-09]
281    - Added Videomat (polish bootleg).
282
283
279284    [2008-06-02]
280285
281286    - Reworked the input system for Sigma Poker 2000.
r2844r2845
11271132   ROM_LOAD( "82s147an.u48", 0x0000, 0x0200, CRC(9bc8e543) )
11281133ROM_END
11291134
1135ROM_START( videomat )   /* polish bootleg */
1136   ROM_REGION( 0x10000, REGION_CPU1, 0 )
1137   ROM_LOAD( "rom.bin", 0x0000, 0x10000, CRC(910cd941) SHA1(350ca70370c5082901343d0c0c1424729d77b006) )
1138
1139   ROM_REGION( 0x4000, REGION_GFX1, ROMREGION_DISPOSE )
1140   ROM_LOAD( "rom0.u47", 0x0000, 0x4000, CRC(cefed6c7) SHA1(79591339eab2712b432dfe89929dbc97000a13d2) )
1141
1142   ROM_REGION( 0x200, REGION_PROMS, 0 )
1143   ROM_LOAD( "82s147an.u48", 0x0000, 0x0200, CRC(9bc8e543) )
1144ROM_END
1145
11301146ROM_START( sigmapkr )
11311147   ROM_REGION( 0x10000, REGION_CPU1, 0 )
11321148   ROM_LOAD( "sigmapkr.u6", 0x0000, 0x10000, CRC(aa3f429a) SHA1(8c82e86de7280590ba157860cbf9783f893f8554) )
r2844r2845
11611177GAMEL( 1994, ampkr2b3, ampoker2, ampoker2, ampoker2, 0,    ROT0, "Bootleg",    "American Poker II (bootleg, set 3)", 0,     layout_ampoker2 )
11621178GAMEL( 1995, ampkr95,  ampoker2, ampoker2, ampkr95,  0,    ROT0, "Bootleg",    "American Poker 95",                  0,     layout_ampoker2 )
11631179GAMEL( 1990, pkrdewin, ampoker2, ampoker2, ampoker2, 0,    ROT0, "Bootleg",    "Poker De Win",                       0,     layout_ampoker2 )
1180GAMEL( 1990, videomat, ampoker2, ampoker2, ampoker2, 0,    ROT0, "Bootleg",    "Videomat (polish bootleg)",          0,     layout_ampoker2 )
11641181GAMEL( 1995, sigmapkr, 0,        ampoker2, sigmapkr, 0,    ROT0, "Sigma Inc.", "Sigma Poker",                        0,     layout_sigmapkr )
11651182GAMEL( 1998, sigma2k,  0,        sigma2k,  sigma2k,  0,    ROT0, "Sigma Inc.", "Sigma Poker 2000",                   0,     layout_sigmapkr )
src/mame/drivers/dacholer.c
r2844r2845
66    Driver by Pierpaolo Prazzoli
77
88    TODO:
9    - Add sound
109    - Add colors when proms are dumped
1110
11Mods by Tomasz Slanina (2008.06.12):
12
13- fixed sound cpu interrupts (mode 2 (two vectors)+ nmi)
14- added sound and music.
15- ay/msm clocks are arbitrary
16- just a guess - upper nibble of byte from port 3 _probably_
17  contains sound command (sound cpu writes it to port c)
18
1219******************************************************************************/
1320
1421#include "driver.h"
22#include "sound/dac.h"
23#include "sound/msm5205.h"
24#include "sound/ay8910.h"
1525
26static int msm_data = 0;
27static int msm_toggle=0;
28
1629static UINT8 *bgvideoram,*fgvideoram;
1730static int bg_bank = 0;
31static UINT8 snd_interrupt_enable=0;
32static UINT8 music_interrupt_enable=0;
33static UINT8 snd_ack;
1834
1935static tilemap *bg_tilemap,*fg_tilemap;
2036
r2844r2845
3955   }
4056
4157   flip_screen_set(data & 0xc); // probably one bit for flipx and one for flipy
58
4259}
4360
4461static WRITE8_HANDLER( coins_w )
r2844r2845
5067   set_led_status(1, data & 8);
5168}
5269
53static WRITE8_HANDLER( snd_irq_w )
70static WRITE8_HANDLER(snd_w)
5471{
55   if(data == 1)
56      cpunum_set_input_line_and_vector(machine, 1, 0, ASSERT_LINE, 0x38);
57   else
58      cpunum_set_input_line_and_vector(machine, 1, 0, CLEAR_LINE, 0x38);
72   soundlatch_w(machine,offset,data);
73   cpunum_set_input_line(machine, 1,INPUT_LINE_NMI,PULSE_LINE);
5974}
6075
76static READ8_HANDLER(dswa_r)
77{
78   return (input_port_read(machine, "DSWA")&0x0f)|(snd_ack<<4); //guess ...
79}
80
6181static ADDRESS_MAP_START( main_map, ADDRESS_SPACE_PROGRAM, 8 )
6282   AM_RANGE(0x0000, 0x7fff) AM_ROM
6383   AM_RANGE(0x8800, 0x97ff) AM_RAM
r2844r2845
7191   AM_RANGE(0x00, 0x00) AM_READ(input_port_0_r)
7292   AM_RANGE(0x01, 0x01) AM_READ(input_port_1_r)
7393   AM_RANGE(0x02, 0x02) AM_READ(input_port_2_r)
74   AM_RANGE(0x03, 0x03) AM_READ(input_port_3_r)
94   AM_RANGE(0x03, 0x03) AM_READ(dswa_r)
7595   AM_RANGE(0x04, 0x04) AM_READ(input_port_4_r)
7696   AM_RANGE(0x20, 0x20) AM_WRITE(coins_w)
7797   AM_RANGE(0x21, 0x21) AM_WRITE(bg_bank_w)
7898   AM_RANGE(0x22, 0x22) AM_WRITENOP
7999   AM_RANGE(0x23, 0x23) AM_WRITENOP
80100   AM_RANGE(0x24, 0x24) AM_WRITENOP
81   AM_RANGE(0x27, 0x27) AM_WRITE(soundlatch_w)
101   AM_RANGE(0x27, 0x27) AM_WRITE(snd_w)
82102ADDRESS_MAP_END
83103
84104
r2844r2845
87107   AM_RANGE(0xd000, 0xe7ff) AM_RAM
88108ADDRESS_MAP_END
89109
110static WRITE8_HANDLER(adpcm_w)
111{
112   msm_data = data;
113   msm_toggle=0;
114}
115
116static WRITE8_HANDLER(snd_ack_w)
117{
118   snd_ack=data;
119}
120
121static WRITE8_HANDLER( snd_irq_w )
122{
123   snd_interrupt_enable=data;
124}
125
126static WRITE8_HANDLER( music_irq_w )
127{
128   music_interrupt_enable=data;
129}
130
90131static ADDRESS_MAP_START( snd_io_map, ADDRESS_SPACE_IO, 8 )
91132   ADDRESS_MAP_GLOBAL_MASK(0xff)
92   AM_RANGE(0x00, 0x00) AM_READ(soundlatch_r)
93   AM_RANGE(0x04, 0x04) AM_WRITENOP // 0 or 1
133   AM_RANGE(0x00, 0x00) AM_READWRITE(soundlatch_r, soundlatch_clear_w )
134   AM_RANGE(0x04, 0x04) AM_WRITE(music_irq_w)
94135   AM_RANGE(0x08, 0x08) AM_WRITE(snd_irq_w)
95   AM_RANGE(0x0c, 0x0c) AM_WRITENOP // it writes the low nibble of the soundlatch when soundlatch & 0x80 == 0x80
96   AM_RANGE(0x80, 0x80) AM_WRITENOP // sound data
97   AM_RANGE(0x86, 0x87) AM_WRITENOP
98   AM_RANGE(0x8a, 0x8b) AM_WRITENOP
99   AM_RANGE(0x8e, 0x8f) AM_WRITENOP
136   AM_RANGE(0x0c, 0x0c) AM_WRITE(snd_ack_w)
137   AM_RANGE(0x80, 0x80) AM_WRITE(adpcm_w)
138   AM_RANGE(0x86, 0x86) AM_WRITE(AY8910_write_port_0_w)
139   AM_RANGE(0x87, 0x87) AM_WRITE(AY8910_control_port_0_w)
140   AM_RANGE(0x8a, 0x8a) AM_WRITE(AY8910_write_port_1_w)
141   AM_RANGE(0x8b, 0x8b) AM_WRITE(AY8910_control_port_1_w)
142   AM_RANGE(0x8e, 0x8e) AM_WRITE(AY8910_write_port_2_w)
143   AM_RANGE(0x8f, 0x8f) AM_WRITE(AY8910_control_port_2_w)
100144ADDRESS_MAP_END
101145
102146
103147static INPUT_PORTS_START( dacholer )
104   PORT_START
148   PORT_START_TAG("IN0")
105149   PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_UP )
106150   PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN )
107151   PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT )
r2844r2845
111155   PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
112156   PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
113157
114   PORT_START
158   PORT_START_TAG("IN1")
115159   PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_UP )    PORT_COCKTAIL
116160   PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN )  PORT_COCKTAIL
117161   PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT )  PORT_COCKTAIL
r2844r2845
121165   PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
122166   PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
123167
124   PORT_START
168   PORT_START_TAG("IN2")
125169   PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_START1 )
126170   PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_START2 )
127171   PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_SERVICE1 )
r2844r2845
142186   PORT_DIPSETTING(    0x04, DEF_STR( 5C_1C ) )
143187   PORT_DIPSETTING(    0x08, DEF_STR( 4C_1C ) )
144188   PORT_DIPSETTING(    0x0c, DEF_STR( 1C_1C ) )
145   PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_SPECIAL )            // to let play the sounds
146   PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN )
147   PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
148   PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
149189
150190   PORT_START_TAG("DSWB")
151191   PORT_DIPNAME( 0x03, 0x03, DEF_STR( Lives ) )            /* table at 0x0a9c */
r2844r2845
330370GFXDECODE_END
331371
332372
373static INTERRUPT_GEN( sound_irq )
374{
375   if(music_interrupt_enable == 1)
376   {
377      cpunum_set_input_line_and_vector(machine, 1, 0, HOLD_LINE, 0x30);
378   }
379}
380
381static INTERRUPT_GEN(adpcm_int)
382{
383   if(snd_interrupt_enable == 1 || (snd_interrupt_enable ==0 && msm_toggle==1))
384   {
385      MSM5205_data_w(0,msm_data >> 4);
386      msm_data<<=4;
387      msm_toggle^=1;
388      if (msm_toggle==0)
389      {
390         cpunum_set_input_line_and_vector(machine, 1, 0, HOLD_LINE, 0x38);
391      }
392   }
393}
394
395static struct MSM5205interface msm_interface =
396{
397   adpcm_int,         /* interrupt function */
398   MSM5205_S96_4B    /* 1 / 96 = 3906.25Hz playback  - guess */
399};
400
333401static MACHINE_DRIVER_START( dacholer )
334402
335403   /* basic machine hardware */
r2844r2845
341409   MDRV_CPU_ADD(Z80, 4000000)   /* ? */
342410   MDRV_CPU_PROGRAM_MAP(snd_map, 0)
343411   MDRV_CPU_IO_MAP(snd_io_map, 0)
344   MDRV_CPU_PERIODIC_INT(nmi_line_pulse, 120) // too high?
412   MDRV_CPU_VBLANK_INT("main",sound_irq)
345413
346414   /* video hardware */
347415   MDRV_SCREEN_ADD("main", RASTER)
r2844r2845
358426   MDRV_VIDEO_UPDATE(dacholer)
359427
360428   /* sound hardware */
361   /* ? */
429   MDRV_SPEAKER_STANDARD_MONO("mono")
430
431   MDRV_SOUND_ADD(AY8910, 1500000)
432   MDRV_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.15)
433
434   MDRV_SOUND_ADD(AY8910, 1500000)
435   MDRV_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.15)
436
437   MDRV_SOUND_ADD(AY8910, 1500000)
438   MDRV_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.15)
439
440   MDRV_SOUND_ADD(MSM5205, 375000)
441   MDRV_SOUND_CONFIG(msm_interface)
442   MDRV_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.30)
443
362444MACHINE_DRIVER_END
363445
364446ROM_START( dacholer )
r2844r2845
418500   ROM_LOAD( "proms", 0x0000, 0x0020, NO_DUMP )
419501ROM_END
420502
421GAME( 1983, dacholer, 0, dacholer, dacholer, 0, ROT0, "Nichibutsu", "Dacholer", GAME_WRONG_COLORS | GAME_NO_SOUND )
422GAME( 1983, kickboy,  0, dacholer, kickboy,  0, ROT0, "Nichibutsu", "Kick Boy", GAME_WRONG_COLORS | GAME_NO_SOUND )
503GAME( 1983, dacholer, 0, dacholer, dacholer, 0, ROT0, "Nichibutsu", "Dacholer", GAME_WRONG_COLORS )
504GAME( 1983, kickboy,  0, dacholer, kickboy,  0, ROT0, "Nichibutsu", "Kick Boy", GAME_WRONG_COLORS )
src/mame/drivers/esd16.c
r2844r2845
77
88
99Main  CPU   :   M68000
10Video Chips :   2 x ACTEL A40MX04 (84 Pin Square Socketed)
10Video Chips :   2 x ACTEL A40MX04 (84 Pin Square Socketed) or
11                ESD CRTC99 (QFP240) & ACTEL A40MX04
1112
1213Sound CPU   :   Z80
1314Sound Chips :   M6295 (AD-65)  +  YM3812 (U6612)  +  YM3014 (U6614)
r2844r2845
1516---------------------------------------------------------------------------
1617Year + Game            PCB             Notes
1718---------------------------------------------------------------------------
1898  Multi Champ        ESD 11-09-98
1999  Multi Champ Deluxe ESD 08-26-1999
2000  Head Panic         ESD 08-26-1999 (with Fuuki)
1998  Multi Champ        ESD 11-09-98   (also a year 1999 revision)
2099  Multi Champ Deluxe ESD 08-26-1999 (also a year 2000 revision)
2100  Head Panic         ESD 08-26-1999 (All English version)
2200  Head Panic         ESD 08-26-1999 (with Fuuki, Story in Japanese)
212300  Tang Tang          ESD            (no date is marked on PCB)
2401  SWAT Police        ESD            (no date is marked on PCB)
2225---------------------------------------------------------------------------
2326
27Other ESD games:
28
29Head Panic          (c) 1999 - Undumped, original version is (c) 1999
303 Cushion Billiards (c) 2000 - Undumped
31Deluxe 5            (c) 2000 - Undumped
32Fire Hawk           (c) 2001 - see nmk16.c driver
33Jumping Pop         (c) 2001 - see tumbleb.c driver
34
2435Head Panic
2536- Maybe the sprite code can be merged again, haven't checked yet.
2637- Nude / Bikini pics don't show in-game, even when set in test mode?
r2844r2845
255266   AM_RANGE(0x700000, 0x70ffff) AM_WRITE(SMH_RAM)
256267ADDRESS_MAP_END
257268
269
258270/***************************************************************************
259271
260272
r2844r2845
426438   PORT_BIT(  0xff00, IP_ACTIVE_LOW, IPT_UNKNOWN )
427439INPUT_PORTS_END
428440
441
442static INPUT_PORTS_START( swatpolc )
443   PORT_START_TAG("IN0")   // $600002.w
444   PORT_BIT(  0x0001, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_PLAYER(1)
445   PORT_BIT(  0x0002, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_PLAYER(1)
446   PORT_BIT(  0x0004, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_PLAYER(1)
447   PORT_BIT(  0x0008, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_PLAYER(1)
448   PORT_BIT(  0x0010, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(1)
449   PORT_BIT(  0x0020, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(1)
450   PORT_BIT(  0x0040, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_PLAYER(1)
451   PORT_BIT(  0x0080, IP_ACTIVE_LOW, IPT_UNKNOWN )
452
453   PORT_BIT(  0x0100, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_PLAYER(2)
454   PORT_BIT(  0x0200, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_PLAYER(2)
455   PORT_BIT(  0x0400, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_PLAYER(2)
456   PORT_BIT(  0x0800, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_PLAYER(2)
457   PORT_BIT(  0x1000, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(2)
458   PORT_BIT(  0x2000, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(2)
459   PORT_BIT(  0x4000, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_PLAYER(2)
460   PORT_BIT(  0x8000, IP_ACTIVE_LOW, IPT_UNKNOWN )
461
462   PORT_START_TAG("IN1")   // $600005.b
463   PORT_BIT(  0x0001, IP_ACTIVE_LOW, IPT_COIN1   )
464   PORT_BIT(  0x0002, IP_ACTIVE_LOW, IPT_COIN2   )
465   PORT_BIT(  0x0004, IP_ACTIVE_LOW, IPT_START1  )
466   PORT_BIT(  0x0008, IP_ACTIVE_LOW, IPT_START2  )
467   PORT_BIT(  0x0010, IP_ACTIVE_LOW, IPT_SERVICE1  )
468   PORT_BIT(  0x0020, IP_ACTIVE_LOW, IPT_UNKNOWN )
469   PORT_SERVICE_NO_TOGGLE( 0x0040, IP_ACTIVE_LOW)
470   PORT_BIT(  0xff00, IP_ACTIVE_LOW, IPT_UNKNOWN )
471INPUT_PORTS_END
472
429473/***************************************************************************
430474
431475
r2844r2845
598642   MDRV_GFXDECODE(tangtang)
599643MACHINE_DRIVER_END
600644
645static MACHINE_DRIVER_START( swatpolc )
646
647   /* basic machine hardware */
648   MDRV_IMPORT_FROM(hedpanic)
649
650   MDRV_GFXDECODE(tangtang)
651MACHINE_DRIVER_END
652
601653/***************************************************************************
602654
603655
r2844r2845
670722
671723   ROM_REGION( 0x24000, REGION_CPU2, 0 )      /* Z80 Code */
672724   ROM_LOAD( "esd3.su06", 0x00000, 0x0c000, CRC(7c178bd7) SHA1(8754d3c70d9b2bf369a5ce0cce4cc0696ed22750) )
673   ROM_CONTINUE(             0x10000, 0x14000             )
725   ROM_CONTINUE(          0x10000, 0x14000)
674726
675727   ROM_REGION( 0x140000, REGION_GFX1, ROMREGION_DISPOSE )   /* Sprites, 16x16x5 */
676728   ROM_LOAD( "esd14.ju03", 0x000000, 0x040000, CRC(a6122225) SHA1(cbcf2b31c4c011daba21f0ae5fd3be63c9a87c00) )
r2844r2845
700752
701753   ROM_REGION( 0x24000, REGION_CPU2, 0 )      /* Z80 Code */
702754   ROM_LOAD( "esd3.su06", 0x00000, 0x0c000, CRC(7c178bd7) SHA1(8754d3c70d9b2bf369a5ce0cce4cc0696ed22750) )
703   ROM_CONTINUE(             0x10000, 0x14000             )
755   ROM_CONTINUE(          0x10000, 0x14000)
704756
705757   ROM_REGION( 0x140000, REGION_GFX1, ROMREGION_DISPOSE )   /* Sprites, 16x16x5 */
706758   ROM_LOAD( "multchmp.u36", 0x000000, 0x040000, CRC(d8f06fa8) SHA1(f76912f93f99578529612a7f01d82ac7229a8e41) )
r2844r2845
769821          with an EPROM. In between the unpopulated positions are 2x smt pads. These are populated
770822          with 2x 16M SOP44 smt Mask ROMs.
771823
824Note: Some versions of this PCB used larger EPROMs with the data repeated:
825      ESD 3 @ SU06 as a 27C040 with data repeated 2x (CRC32 0x2C0C8813)
826
772827*/
773828
774829
r2844r2845
777832   ROM_LOAD16_BYTE( "ver0106_esd2.cu02", 0x000000, 0x040000, CRC(ea98b3fd) SHA1(107ee8adea246141fd6fa9209541ce0a7ed1e24c) )
778833   ROM_LOAD16_BYTE( "ver0106_esd1.cu03", 0x000001, 0x040000, CRC(c6e4546b) SHA1(af9a8edffe94d035f92b36b1cd145c2a5ee66f48) )
779834
780   ROM_REGION( 0x84000, REGION_CPU2, 0 )      /* Z80 Code */
781   ROM_LOAD( "ver0106_desd3.su06", 0x00000, 0x0c000,  CRC(1b22568c) SHA1(5458e1a798357a6785f8ea1fe9da37768cd4761d) )
782   ROM_CONTINUE(             0x10000, 0x34000             )
835   ROM_REGION( 0x44000, REGION_CPU2, 0 )      /* Z80 Code */
836   ROM_LOAD( "esd3.su06", 0x00000, 0x0c000, CRC(1b22568c) SHA1(5458e1a798357a6785f8ea1fe9da37768cd4761d) )
837   ROM_CONTINUE(          0x10000, 0x34000)
783838
784839   /* this has additional copyright sprites in the flash roms for the (c)2000 message.. */
785840   ROM_REGION( 0x600000, REGION_GFX1, ROMREGION_DISPOSE )   /* Sprites, 16x16x5 */
r2844r2845
787842   ROM_LOAD( "ver0106_ju02.bin", 0x000000, 0x200000, CRC(b27a4977) SHA1(b7f94bb04d0046538b3938335e6b0cce330ad79c) )
788843   /* expand this to take up 0x200000 bytes too so we can decode it */
789844   ROM_LOAD16_BYTE( "ver0106_esd5.ju07", 0x400000, 0x040000, CRC(7a3ac887) SHA1(3c759f9bed396bbaf6bd7298a8bd2bd76df3aa6f) )
790   ROM_FILL( 0x500000, 0x100000, 0 )
845   ROM_FILL(                             0x500000, 0x100000, 0 )
791846
792847   ROM_REGION( 0x400000, REGION_GFX2, ROMREGION_DISPOSE )   /* Layers, 16x16x8 */
793848   ROM_LOAD16_BYTE( "rom.fu35", 0x000000, 0x200000, CRC(ba46f3dc) SHA1(4ac7695bdf4237654481f7f74f8650d70a51e691) )
794849   ROM_LOAD16_BYTE( "rom.fu34", 0x000001, 0x200000, CRC(2895cf09) SHA1(88756fcd589af1986c3881d4080f086afc11b498) )
795850
796   ROM_REGION( 0x80000, REGION_SOUND1, 0 )   /* Samples */
851   ROM_REGION( 0x40000, REGION_SOUND1, 0 )   /* Samples */
797852   ROM_LOAD( "ver0106_esd4.su10", 0x00000, 0x40000, CRC(ac8ae009) SHA1(2c1c30cc4b3e34a5f14d7dfb6f6e18ff21f526f5) )
798853ROM_END
799854
r2844r2845
802857   ROM_LOAD16_BYTE( "esd2.cu02", 0x000000, 0x040000, CRC(4cca802c) SHA1(5e6e81febbb56b7c4630b530e546e7ab59c6c6c1) )
803858   ROM_LOAD16_BYTE( "esd1.cu03", 0x000001, 0x040000, CRC(0af1cd0a) SHA1(d2befcb596d83d523317d17b4c1c71f99de0d33e) )
804859
805   ROM_REGION( 0x84000, REGION_CPU2, 0 )      /* Z80 Code */
806   ROM_LOAD( "esd3.su06", 0x00000, 0x0c000, CRC(2c0c8813) SHA1(ad6b881af4a629a948dcb3c99cea73c20ba1faf4) )
807   ROM_CONTINUE(             0x10000, 0x74000             )
860   ROM_REGION( 0x44000, REGION_CPU2, 0 )      /* Z80 Code */
861   ROM_LOAD( "esd3.su06", 0x00000, 0x0c000, CRC(1b22568c) SHA1(5458e1a798357a6785f8ea1fe9da37768cd4761d) )
862   ROM_CONTINUE(          0x10000, 0x34000)
808863
809864   ROM_REGION( 0x600000, REGION_GFX1, ROMREGION_DISPOSE )   /* Sprites, 16x16x5 */
810865   ROM_LOAD( "rom.ju01", 0x200000, 0x200000, CRC(1a749fc2) SHA1(feff4b26ee28244b4d092798a176e33e09d5df2c) )
811866   ROM_LOAD( "rom.ju02", 0x000000, 0x200000, CRC(7e87e332) SHA1(f90aa00a64a940846d99053c7aa023e3fd5d070b) )
812867   /* expand this to take up 0x200000 bytes too so we can decode it */
813868   ROM_LOAD16_BYTE( "esd5.ju07", 0x400000, 0x080000, CRC(6cc871cc) SHA1(710b9695c864e4234686993b88d24590d60e1cb9) )
814   ROM_FILL( 0x500000, 0x100000, 0 )
869   ROM_FILL(                     0x500000, 0x100000, 0 )
815870
816871   ROM_REGION( 0x400000, REGION_GFX2, ROMREGION_DISPOSE )   /* Layers, 16x16x8 */
817872   ROM_LOAD16_BYTE( "rom.fu35", 0x000000, 0x200000, CRC(ba46f3dc) SHA1(4ac7695bdf4237654481f7f74f8650d70a51e691) )
818873   ROM_LOAD16_BYTE( "rom.fu34", 0x000001, 0x200000, CRC(2895cf09) SHA1(88756fcd589af1986c3881d4080f086afc11b498) )
819874
820   ROM_REGION( 0x80000, REGION_SOUND1, 0 )   /* Samples */
821   ROM_LOAD( "esd4.su10", 0x00000, 0x80000, CRC(14c4a30d) SHA1(d8eb2f08d5293f729cbec1897e3b92b675cc2814) )
875   ROM_REGION( 0x40000, REGION_SOUND1, 0 )   /* Samples */
876   ROM_LOAD( "esd4.su10", 0x00000, 0x40000, CRC(2fbe94ab) SHA1(1bc4a33ec93a80fb598722d2b50bdf3ccaaa984a) )
822877ROM_END
823878
879/***************************************************************************
824880
881PCB Layout (Head Panic)
882----------
825883
884ESD 08-26-1999
885|-----------------------------------------|
886|  3014  3812 6116   6295   ESD4          |
887|VOL        ESD3    Z80                 * |
888|             PAL                   ESD6  |
889|                            6116       * |
890|       6116            PAL  6116   ESD7  |
891|       6116           |-------|        * |
892|J                PAL  | ESD   |        * |
893|A                PAL  |CRTC99 |    ESD5  |
894|M     PAL             |       |        * |
895|M     PAL             |-------|          |
896|A            ESD1                        |
897|      68000  ESD2        |-------|       |
898|                         |ACTEL  | 6116  |
899|                         |A40MX04| 6116  |
900|   93C46      MCM6206    |       | 6116  |
901|              MCM6206    |-------| 6116  |
902| 16MHz   PAL  MCM6206                    |
903| 14MHz   PAL  MCM6206    ESD8 %  ESD9    |
904|-----------------------------------------|
905
906Notes:
907      HSync: 15.625kHz
908      VSync: 60Hz
909      MCM6206 is 32kx8 SRAM
910      6116 is 8kx8 SRAM
911      * : Board has positions for 6x standard 32 pin EPROMs but only position ESD5 is populated
912          with an EPROM. In between the unpopulated positions are 2x smt pads. These are populated
913          with 2x 16M SOP44 smt Mask ROMs.
914      % : ROMs ESD8 and ESD9 are also 16M SOP44 smt Mask ROMs, though these are dedicated smt
915          locations (i.e. no option for EPROMs at this location)
916
917Note: Some versions of this PCB used larger EPROMs with the data repeated:
918      ESD 3 @ SU06 as a 27C040 with data repeated 2x (CRC32 0xC668D443)
919      ESD 4 @ SU10 as a 27C040 with data repeated 4x (CRC32 0x5692FE92)
920
921***************************************************************************/
922
923
924ROM_START( hedpanic ) /* Story line & game instructions in English */
925   ROM_REGION( 0x080000, REGION_CPU1, 0 )      /* 68000 Code */
926   ROM_LOAD16_BYTE( "esd2.cu03", 0x000000, 0x040000, CRC(7c7be3bb) SHA1(d43ad7a967e1ef79ee0cf50d3842cc9174fbef3a) )
927   ROM_LOAD16_BYTE( "esd1.cu02", 0x000001, 0x040000, CRC(42405e9d) SHA1(0fa088b8bd921e42cedcc4083dfe41bc9888dfd1) )
928
929   ROM_REGION( 0x44000, REGION_CPU2, 0 )      /* Z80 Code */
930   ROM_LOAD( "esd3.su06", 0x00000, 0x0c000, CRC(a88d4424) SHA1(eefb5ac79632931a36f360713c482cd079891f91) ) /* AT27C020 mask rom */
931   ROM_CONTINUE(          0x10000, 0x34000)
932
933   ROM_REGION( 0x600000, REGION_GFX1, ROMREGION_DISPOSE )   /* Sprites, 16x16x5 */
934   ROM_LOAD( "esd6.ju01", 0x200000, 0x200000, CRC(5858372c) SHA1(dc96112587df681d53cf7449bd39477919978325) )
935   ROM_LOAD( "esd7.ju02", 0x000000, 0x200000, CRC(055d525f) SHA1(85ad474691f96e47311a1904015d1c92d3b2d607) )
936   /* expand this to take up 0x200000 bytes too so we can decode it */
937   ROM_LOAD16_BYTE( "esd5.ju07", 0x400000, 0x080000, CRC(bd785921) SHA1(c8bcb38d5aa6f5a27f0dedf7efd1d6737d59b4ca) )
938   ROM_FILL(                     0x500000, 0x100000, 0 )
939
940   ROM_REGION( 0x400000, REGION_GFX2, ROMREGION_DISPOSE )   /* Layers, 16x16x8 */
941   ROM_LOAD16_BYTE( "esd8.fu35", 0x000000, 0x200000, CRC(23aceb4f) SHA1(35d9ebc33b9e1515e47750cfcdfc0bf8bf44b71d) )
942   ROM_LOAD16_BYTE( "esd9.fu34", 0x000001, 0x200000, CRC(76b46cd2) SHA1(679cbf50ae5935e8848868081ecef4ec66424f6c) )
943
944   ROM_REGION( 0x20000, REGION_SOUND1, 0 )   /* Samples */
945   ROM_LOAD( "esd4.su10", 0x000000, 0x020000, CRC(3c11c590) SHA1(cb33845c3dc0501fff8055c2d66f412881089df1) ) /* AT27010 mask rom */
946ROM_END
947
948
949ROM_START( hedpanif ) /* Story line in Japanese, game instructions in English */
950   ROM_REGION( 0x080000, REGION_CPU1, 0 )      /* 68000 Code */
951   ROM_LOAD16_BYTE( "esd2", 0x000000, 0x040000, CRC(8cccc691) SHA1(d6a5dd6c21a67638b9023182f77780282b9b04e5) )
952   ROM_LOAD16_BYTE( "esd1", 0x000001, 0x040000, CRC(d8574925) SHA1(bd4990778b90a49aa6b10f8cf6709ce2424f546a) )
953
954   ROM_REGION( 0x44000, REGION_CPU2, 0 )      /* Z80 Code */
955   ROM_LOAD( "esd3.su06", 0x00000, 0x0c000, CRC(a88d4424) SHA1(eefb5ac79632931a36f360713c482cd079891f91) ) /* AT27C020 mask rom */
956   ROM_CONTINUE(          0x10000, 0x34000)
957
958   ROM_REGION( 0x600000, REGION_GFX1, ROMREGION_DISPOSE )   /* Sprites, 16x16x5 */
959   ROM_LOAD( "esd6.ju01", 0x200000, 0x200000, CRC(5858372c) SHA1(dc96112587df681d53cf7449bd39477919978325) )
960   ROM_LOAD( "esd7.ju02", 0x000000, 0x200000, CRC(055d525f) SHA1(85ad474691f96e47311a1904015d1c92d3b2d607) )
961   /* expand this to take up 0x200000 bytes too so we can decode it */
962   ROM_LOAD16_BYTE( "esd5.ju07", 0x400000, 0x080000, CRC(bd785921) SHA1(c8bcb38d5aa6f5a27f0dedf7efd1d6737d59b4ca) )
963   ROM_FILL(                     0x500000, 0x100000, 0 )
964
965   ROM_REGION( 0x400000, REGION_GFX2, ROMREGION_DISPOSE )   /* Layers, 16x16x8 */
966   ROM_LOAD16_BYTE( "esd8.fu35", 0x000000, 0x200000, CRC(23aceb4f) SHA1(35d9ebc33b9e1515e47750cfcdfc0bf8bf44b71d) )
967   ROM_LOAD16_BYTE( "esd9.fu34", 0x000001, 0x200000, CRC(76b46cd2) SHA1(679cbf50ae5935e8848868081ecef4ec66424f6c) )
968
969   ROM_REGION( 0x20000, REGION_SOUND1, 0 )   /* Samples */
970   ROM_LOAD( "esd4.su10", 0x000000, 0x020000, CRC(3c11c590) SHA1(cb33845c3dc0501fff8055c2d66f412881089df1) ) /* AT27010 mask rom */
971ROM_END
972
973
974
826975/* Tang Tang
827976
828977Tang Tang (ESD)
r2844r2845
8811030   ROM_LOAD16_BYTE( "esd2.cu02", 0x000000, 0x040000,  CRC(b6dd6e3d) SHA1(44d2663827c45267eb154c873f3bd2e9e2bf3d3f) )
8821031   ROM_LOAD16_BYTE( "esd1.cu03", 0x000001, 0x040000,  CRC(b6c0f2f4) SHA1(68ad76e7e380c728dda200a852729e034d9c9f4c) )
8831032
884   ROM_REGION( 0x84000, REGION_CPU2, 0 )      /* Z80 Code */
1033   ROM_REGION( 0x44000, REGION_CPU2, 0 )      /* Z80 Code */
8851034   ROM_LOAD( "esd3.su06", 0x00000, 0x0c000, CRC(d48ecc5c) SHA1(5015dd775980542eb29a08bffe1a09ea87d56272) )
886   ROM_CONTINUE(             0x10000, 0x34000             )
1035   ROM_CONTINUE(          0x10000, 0x34000)
8871036
8881037   ROM_REGION( 0x140000, REGION_GFX1, ROMREGION_DISPOSE )   /* Sprites, 16x16x5 */
8891038   ROM_LOAD( "xju04.bin", 0x000000, 0x040000, CRC(f999b9d7) SHA1(9e4d0e68cdc429c7563b8ad51c072d68ffed09dc) )
r2844r2845
8961045   ROM_LOAD16_BYTE( "fu35.bin", 0x000000, 0x200000, CRC(84f3f833) SHA1(f84e41d93dc47a58ada800b921a7e5902b7631cd) )
8971046   ROM_LOAD16_BYTE( "fu34.bin", 0x000001, 0x200000, CRC(bf91f543) SHA1(7c149fed8b8044850cd6b798622a91c45336cd47) )
8981047
899   ROM_REGION( 0x80000, REGION_SOUND1, 0 )   /* Samples */
1048   ROM_REGION( 0x20000, REGION_SOUND1, 0 )   /* Samples */
9001049   ROM_LOAD( "esd4.su10", 0x00000, 0x20000, CRC(f2dfb02d) SHA1(04001488697aad3e5b2d15c9f5a81dc2b7d0952c) )
9011050ROM_END
9021051
903/***************************************************************************
1052/*
9041053
905PCB Layout (Head Panic)
1054SWAT Police (c) 2001 ESD
1055PCB Layout
9061056----------
9071057
908ESD 08-26-1999
1058ESD made in Korea
1059|-----------------------------------------|
1060|     3014 3812 6116  6295   AT27C020     |
1061|VOL      ESD3.SU06  Z80         ESD1.JU03|
1062|             PAL                         |
1063|                           6116 ESD2.JU04|
1064|       6116           PAL  6116          |
1065|       6116     PAL  |-------|  ESD3.JU05|
1066|J               PAL  | ESD   |           |
1067|A                    |CRTC99 |  ESD4.JU06|
1068|M     PAL            | 0016  |           |
1069|M     PAL            |-------|  ESD5.JU07|
1070|A    68000   ESD.CU03                    |
1071|             ESD.CU02    |-------|       |
1072|                         |ACTEL  |       |
1073|                         |A40MX04|   6116|
1074|              MCM6206    |  0008 |   6116|
1075|              MCM6206    |-------|       |
1076| 16MHz   PAL  MCM6206                6116|
1077| 14MHz   PAL  MCM6206   FU35   FU34  6116|
1078|-----------------------------------------|
9091079
910  3014  3812 6116 6295   ESD4
911           ESD3  Z80                   *
912       6116                 6116  ESD6 *
913       6116                 6116  ESD7 *
914                 ESD_CRTC99            *
915                 (LARGE QFP)      ESD5 *
916         ESD1                          *
917         ESD2
918     68000                        6116
919                MCM6206   ACTEL   6116
920   93C46        MCM6206   A40MX04 6116
921 16MHz          MCM6206           6116
922 14MHz          MCM6206  ESD8 %  ESD9
1080Notes:
1081      68000 (MC68HC000FN16)
1082      Z80 (Z84C00006FEC-Z80CPU)
1083      OKI6295 label AD65 (sound)
1084      YM3014 label U6614 (sound)
1085      YM3812 label U6612 (sound)
1086      MCM6206 - 32k x8 SRAM (SOJ28)
1087      6116    - 2k x8 SRAM (SOP28)
1088      A40MX04 - Actel A40MX04-F FPGA (PLCC84)
1089      CRTC99  - ESD CRTC99 Graphics Controller (QFP240)
1090      JU03-8  - 27C040
1091      FU34,FU35  -  MX29F1610MC
9231092
10931x connector JAMMA
10941x trimmer (volume)
10952x pushbutton
9241096
925Notes:
926      HSync: 15.625kHz
927      VSync: 60Hz
928      MCM6206 is 32kx8 SRAM
929      6116 is 8kx8 SRAM
930      * : Board has positions for 6x standard 32 pin EPROMs but only position ESD5 is populated
931          with an EPROM. In between the unpopulated positions are 2x smt pads. These are populated
932          with 2x 16M SOP44 smt Mask ROMs.
933      % : ROMs ESD8 and ESD9 are also 16M SOP44 smt Mask ROMs, though these are dedicated smt
934          locations (i.e. no option for EPROMs at this location)
1097      * : Board has positions for 6x standard 32 pin EPROMs but only 5 positions are populated
1098          with an EPROM.
9351099
936***************************************************************************/
1100*/
9371101
938
939ROM_START( hedpanic )
1102ROM_START( swatpolc ) /* SWAT Police */
9401103   ROM_REGION( 0x080000, REGION_CPU1, 0 )      /* 68000 Code */
941   ROM_LOAD16_BYTE( "esd2", 0x000000, 0x040000, CRC(8cccc691) SHA1(d6a5dd6c21a67638b9023182f77780282b9b04e5) )
942   ROM_LOAD16_BYTE( "esd1", 0x000001, 0x040000, CRC(d8574925) SHA1(bd4990778b90a49aa6b10f8cf6709ce2424f546a) )
1104   ROM_LOAD16_BYTE( "esd.cu02", 0x000000, 0x040000,  CRC(29e0c126) SHA1(7c0356eed4ffdc056b7ec5c1ac07f1c9cc6aeffa) ) /* ESD labels but not numbered */
1105   ROM_LOAD16_BYTE( "esd.cu03", 0x000001, 0x040000,  CRC(1070208b) SHA1(1e058774c5aee1de15ffcd26d530b23592286db1) ) /* ESD labels but not numbered */
9431106
944   ROM_REGION( 0x84000, REGION_CPU2, 0 )      /* Z80 Code */
945   ROM_LOAD( "esd3", 0x00000, 0x0c000, CRC(c668d443) SHA1(fa66a5dc5cb10e6ccc3fbdd7790091d912767001) ) // 0x040000 of data repeated 2x
946   ROM_CONTINUE(             0x10000, 0x74000             )
1107   ROM_REGION( 0x44000, REGION_CPU2, 0 )      /* Z80 Code */
1108   ROM_LOAD( "esd3.su06", 0x00000, 0x0c000, CRC(80e97dbe) SHA1(d6fae689cd3737777f36c980b9a7d9e42b06a467) ) /* 2 roms on PCB with an ESD3 label */
1109   ROM_CONTINUE(          0x10000, 0x34000)
9471110
948   ROM_REGION( 0x600000, REGION_GFX1, ROMREGION_DISPOSE )   /* Sprites, 16x16x5 */
949   ROM_LOAD( "esd6", 0x200000, 0x200000, CRC(5858372c) SHA1(dc96112587df681d53cf7449bd39477919978325) )
950   ROM_LOAD( "esd7", 0x000000, 0x200000, CRC(055d525f) SHA1(85ad474691f96e47311a1904015d1c92d3b2d607) )
951   /* expand this to take up 0x200000 bytes too so we can decode it */
952   ROM_LOAD16_BYTE( "esd5", 0x400000, 0x080000, CRC(bd785921) SHA1(c8bcb38d5aa6f5a27f0dedf7efd1d6737d59b4ca) )
953   ROM_FILL( 0x500000, 0x100000, 0 )
1111   ROM_REGION( 0x280000, REGION_GFX1, ROMREGION_DISPOSE )   /* Sprites, 16x16x5 */
1112   ROM_LOAD( "esd1.ju03", 0x000000, 0x080000, CRC(17fcc5e7) SHA1(ad57d2b0c0062f6f8c7732df57e4d12ca47c1bb8) )
1113   ROM_LOAD( "esd2.ju04", 0x080000, 0x080000, CRC(9c1752f2) SHA1(2e8c377137258498564749413b49e156180e806a) )
1114   ROM_LOAD( "esd3.ju05", 0x100000, 0x080000, CRC(e8d9c092) SHA1(80e1f1d4dad48c7be3d4b72c4a82d5388fd493c7) )
1115   ROM_LOAD( "esd4.ju06", 0x180000, 0x080000, CRC(bde1b130) SHA1(e45a2257f8c4d107dfb7401b5ae1b79951052bc6) )
1116   ROM_LOAD( "esd5.ju07", 0x200000, 0x080000, CRC(d2c27f03) SHA1(7cbdf7f7ff17df16ca81823f69e82ae1cf96b714) )
9541117
9551118   ROM_REGION( 0x400000, REGION_GFX2, ROMREGION_DISPOSE )   /* Layers, 16x16x8 */
956   ROM_LOAD16_BYTE( "esd8", 0x000000, 0x200000, CRC(23aceb4f) SHA1(35d9ebc33b9e1515e47750cfcdfc0bf8bf44b71d) )
957   ROM_LOAD16_BYTE( "esd9", 0x000001, 0x200000, CRC(76b46cd2) SHA1(679cbf50ae5935e8848868081ecef4ec66424f6c) )
1119   ROM_LOAD16_BYTE( "fu35", 0x000000, 0x200000, CRC(c55897c5) SHA1(f6e0ef1c2fcfe6a511fe787a3abeff4da16d1b54) ) /* No labels on the flash roms */
1120   ROM_LOAD16_BYTE( "fu34", 0x000001, 0x200000, CRC(7117a6a2) SHA1(17c0ab02698cffa0582ed2d2b7dbb7fed8cd9393) ) /* No labels on the flash roms */
9581121
959   ROM_REGION( 0x80000, REGION_SOUND1, 0 )   /* Samples */
960   ROM_LOAD( "esd4", 0x000000, 0x080000, CRC(5692fe92) SHA1(4423039cb437ab36d198b212ef394bf1704be404) ) // 0x020000 of data repeated 4x
1122   ROM_REGION( 0x40000, REGION_SOUND1, 0 )   /* Samples */
1123   ROM_LOAD( "at27c020.su10", 0x00000, 0x40000, CRC(c43efec2) SHA1(4ef328d8703b81328de09ecc4328763aba06e883) ) /* AT27C020 mask rom with no label */
9611124ROM_END
9621125
9631126/***************************************************************************
r2844r2845
9751138/* ESD 08-26-1999 */
9761139GAME( 2000, mchampdx, 0,        mchampdx, hedpanic, 0, ROT0, "ESD",         "Multi Champ Deluxe (ver. 0106, 06/01/2000)", 0 ) // 06/01/2000 ?
9771140GAME( 1999, mchampda, mchampdx, mchampdx, hedpanic, 0, ROT0, "ESD",         "Multi Champ Deluxe (ver. 1126, 26/11/1999)", 0 ) // 26/11/1999 ?
978GAME( 2000, hedpanic, 0,        hedpanic, hedpanic, 0, ROT0, "ESD / Fuuki", "Head Panic (ver. 0315, 15/03/2000)", 0 ) // 15/03/2000 ?
1141GAME( 2000, hedpanic, 0,        hedpanic, hedpanic, 0, ROT0, "ESD",         "Head Panic (ver. 0117, 17/01/2000)", 0 ) // 17/01/2000 ?
1142GAME( 2000, hedpanif, hedpanic, hedpanic, hedpanic, 0, ROT0, "ESD / Fuuki", "Head Panic (ver. 0315, 15/03/2000)", 0 ) // 15/03/2000 ?
9791143
980/* ESD */
1144/* ESD - This PCB looks identicle to the ESD 08-26-1999 PCB */
9811145GAME( 2000, tangtang, 0,        tangtang, hedpanic, 0, ROT0, "ESD",         "Tang Tang (ver. 0526, 26/05/2000)", 0 ) // 26/05/2000 ?
1146GAME( 2001, swatpolc, 0,        swatpolc, swatpolc, 0, ROT0, "ESD",         "SWAT Police ", 0 )
src/mame/drivers/model3.c
r2844r2845
364364#include "machine/eeprom.h"
365365#include "machine/53c810.h"
366366#include "sound/scsp.h"
367#include "includes/model3.h"
367368
368369static UINT8 irq_enable;
369370static UINT8 irq_state;
r2844r2845
378379static int model3_controls_bank;
379380static UINT32 real3d_device_id;
380381
381extern UINT64 *paletteram64;
382
383/* defined in machine/model3.c */
384extern void model3_machine_init(int step);
385extern int model3_tap_read(void);
386extern void model3_tap_write(int tck, int tms, int tdi, int trst);
387extern void model3_tap_reset(void);
388extern READ32_HANDLER(rtc72421_r);
389extern WRITE32_HANDLER(rtc72421_w);
390
391
392/* defined in video/model3.c */
393READ64_HANDLER(model3_char_r);
394WRITE64_HANDLER(model3_char_w);
395READ64_HANDLER(model3_tile_r);
396WRITE64_HANDLER(model3_tile_w);
397READ64_HANDLER(model3_vid_reg_r);
398WRITE64_HANDLER(model3_vid_reg_w);
399READ64_HANDLER(model3_palette_r);
400WRITE64_HANDLER(model3_palette_w);
401VIDEO_START(model3);
402VIDEO_UPDATE(model3);
403WRITE64_HANDLER(real3d_cmd_w);
404WRITE64_HANDLER(real3d_display_list_w);
405WRITE64_HANDLER(real3d_polygon_ram_w);
406void real3d_display_list_end(void);
407void real3d_display_list1_dma(UINT32 src, UINT32 dst, int length, int byteswap);
408void real3d_display_list2_dma(UINT32 src, UINT32 dst, int length, int byteswap);
409void real3d_vrom_texture_dma(UINT32 src, UINT32 dst, int length, int byteswap);
410void real3d_texture_fifo_dma(UINT32 src, int length, int byteswap);
411void real3d_polygon_ram_dma(UINT32 src, UINT32 dst, int length, int byteswap);
412
413382static void real3d_dma_callback(UINT32 src, UINT32 dst, int length, int byteswap);
414383
415384static UINT16 *model3_soundram;
r2844r2845
433402}
434403
435404
436#define BYTE_REVERSE32(x)      (((x >> 24) & 0xff) | \
437                        ((x >> 8) & 0xff00) | \
438                        ((x << 8) & 0xff0000) | \
439                        ((x << 24) & 0xff000000))
440
441405static UINT32 pci_device_get_reg(int device, int reg)
442406{
443407   switch(device)
r2844r2845
581545{
582546   if (ACCESSING_BITS_32_63)
583547   {
584      UINT32 d = BYTE_REVERSE32((UINT32)(data >> 32));
548      UINT32 d = FLIPENDIAN_INT32((UINT32)(data >> 32));
585549      mpc105_addr = data >> 32;
586550
587551      pci_bus = (d >> 16) & 0xff;
r2844r2845
594558static READ64_HANDLER( mpc105_data_r )
595559{
596560   if(pci_device == 0) {
597      return ((UINT64)(BYTE_REVERSE32(mpc105_regs[(pci_reg/2)+1])) << 32) |
598            ((UINT64)(BYTE_REVERSE32(mpc105_regs[(pci_reg/2)+0])));
561      return ((UINT64)(FLIPENDIAN_INT32(mpc105_regs[(pci_reg/2)+1])) << 32) |
562            ((UINT64)(FLIPENDIAN_INT32(mpc105_regs[(pci_reg/2)+0])));
599563   }
600   return BYTE_REVERSE32(pci_device_get_reg(pci_device, pci_reg));
564   return FLIPENDIAN_INT32(pci_device_get_reg(pci_device, pci_reg));
601565}
602566
603567static WRITE64_HANDLER( mpc105_data_w )
604568{
605569   if(pci_device == 0) {
606      mpc105_regs[(pci_reg/2)+1] = BYTE_REVERSE32((UINT32)(data >> 32));
607      mpc105_regs[(pci_reg/2)+0] = BYTE_REVERSE32((UINT32)(data));
570      mpc105_regs[(pci_reg/2)+1] = FLIPENDIAN_INT32((UINT32)(data >> 32));
571      mpc105_regs[(pci_reg/2)+0] = FLIPENDIAN_INT32((UINT32)(data));
608572      return;
609573   }
610574   if (ACCESSING_BITS_0_31)
611575   {
612      pci_device_set_reg(pci_device, pci_reg, BYTE_REVERSE32((UINT32)data));
576      pci_device_set_reg(pci_device, pci_reg, FLIPENDIAN_INT32((UINT32)data));
613577   }
614578}
615579
r2844r2845
659623{
660624   if (ACCESSING_BITS_32_63)
661625   {
662      UINT32 d = BYTE_REVERSE32((UINT32)(data >> 32));
626      UINT32 d = FLIPENDIAN_INT32((UINT32)(data >> 32));
663627
664628      if (((d >> 8) & 0xffffff) == 0x800000)
665629      {
r2844r2845
680644static READ64_HANDLER( mpc106_data_r )
681645{
682646   if(pci_device == 0) {
683      return ((UINT64)(BYTE_REVERSE32(mpc106_regs[(pci_reg/2)+1])) << 32) |
684            ((UINT64)(BYTE_REVERSE32(mpc106_regs[(pci_reg/2)+0])));
647      return ((UINT64)(FLIPENDIAN_INT32(mpc106_regs[(pci_reg/2)+1])) << 32) |
648            ((UINT64)(FLIPENDIAN_INT32(mpc106_regs[(pci_reg/2)+0])));
685649   }
686650   if (ACCESSING_BITS_32_63)
687651   {
688      return (UINT64)(BYTE_REVERSE32(pci_device_get_reg(pci_device, pci_reg))) << 32;
652      return (UINT64)(FLIPENDIAN_INT32(pci_device_get_reg(pci_device, pci_reg))) << 32;
689653   }
690654   else
691655   {
692      return (UINT64)(BYTE_REVERSE32(pci_device_get_reg(pci_device, pci_reg)));
656      return (UINT64)(FLIPENDIAN_INT32(pci_device_get_reg(pci_device, pci_reg)));
693657   }
694658}
695659
696660static WRITE64_HANDLER( mpc106_data_w )
697661{
698662   if(pci_device == 0) {
699      mpc106_regs[(pci_reg/2)+1] = BYTE_REVERSE32((UINT32)(data >> 32));
700      mpc106_regs[(pci_reg/2)+0] = BYTE_REVERSE32((UINT32)(data));
663      mpc106_regs[(pci_reg/2)+1] = FLIPENDIAN_INT32((UINT32)(data >> 32));
664      mpc106_regs[(pci_reg/2)+0] = FLIPENDIAN_INT32((UINT32)(data));
701665      return;
702666   }
703667   if (ACCESSING_BITS_0_31)
704668   {
705      pci_device_set_reg(pci_device, pci_reg, BYTE_REVERSE32((UINT32)data));
669      pci_device_set_reg(pci_device, pci_reg, FLIPENDIAN_INT32((UINT32)data));
706670   }
707671}
708672
r2844r2845
745709   int reg = offset*8;
746710   UINT64 r = 0;
747711   if (ACCESSING_BITS_56_63) {
748      r |= (UINT64)lsi53c810_reg_r(reg+0) << 56;
712      r |= (UINT64)lsi53c810_reg_r(machine, reg+0) << 56;
749713   }
750714   if (ACCESSING_BITS_48_55) {
751      r |= (UINT64)lsi53c810_reg_r(reg+1) << 48;
715      r |= (UINT64)lsi53c810_reg_r(machine, reg+1) << 48;
752716   }
753717   if (ACCESSING_BITS_40_47) {
754      r |= (UINT64)lsi53c810_reg_r(reg+2) << 40;
718      r |= (UINT64)lsi53c810_reg_r(machine, reg+2) << 40;
755719   }
756720   if (ACCESSING_BITS_32_39) {
757      r |= (UINT64)lsi53c810_reg_r(reg+3) << 32;
721      r |= (UINT64)lsi53c810_reg_r(machine, reg+3) << 32;
758722   }
759723   if (ACCESSING_BITS_24_31) {
760      r |= (UINT64)lsi53c810_reg_r(reg+4) << 24;
724      r |= (UINT64)lsi53c810_reg_r(machine, reg+4) << 24;
761725   }
762726   if (ACCESSING_BITS_16_23) {
763      r |= (UINT64)lsi53c810_reg_r(reg+5) << 16;
727      r |= (UINT64)lsi53c810_reg_r(machine, reg+5) << 16;
764728   }
765729   if (ACCESSING_BITS_8_15) {
766      r |= (UINT64)lsi53c810_reg_r(reg+6) << 8;
730      r |= (UINT64)lsi53c810_reg_r(machine, reg+6) << 8;
767731   }
768732   if (ACCESSING_BITS_0_7) {
769      r |= (UINT64)lsi53c810_reg_r(reg+7) << 0;
733      r |= (UINT64)lsi53c810_reg_r(machine, reg+7) << 0;
770734   }
771735
772736   return r;
r2844r2845
805769{
806770   UINT32 result;
807771   result = program_read_dword_64be(dsp);
808   return BYTE_REVERSE32(result);
772   return FLIPENDIAN_INT32(result);
809773}
810774
811775static void scsi_irq_callback(running_machine *machine, int state)
812776{
813777   scsi_irq_state = state;
814//  model3_irq_state |= irq_enable & ~0x60; /* FIXME: enable only SCSI interrupt */
815778   update_irq_state(machine);
816779}
817780
r2844r2845
847810   {
848811      case 0:
849812         if(ACCESSING_BITS_32_63) {      /* DMA source address */
850            dma_source = BYTE_REVERSE32((UINT32)(data >> 32));
813            dma_source = FLIPENDIAN_INT32((UINT32)(data >> 32));
851814            return;
852815         }
853816         if(ACCESSING_BITS_0_31) {      /* DMA destination address */
854            dma_dest = BYTE_REVERSE32((UINT32)(data));
817            dma_dest = FLIPENDIAN_INT32((UINT32)(data));
855818            return;
856819         }
857820         break;
858821      case 1:
859822         if(ACCESSING_BITS_32_63)      /* DMA length */
860823         {
861            int length = BYTE_REVERSE32((UINT32)(data >> 32)) * 4;
824            int length = FLIPENDIAN_INT32((UINT32)(data >> 32)) * 4;
862825            if (dma_endian & 0x80)
863826            {
864827               real3d_dma_callback(dma_source, dma_dest, length, 0);
r2844r2845
887850         break;
888851      case 2:
889852         if(ACCESSING_BITS_32_63) {      /* DMA command */
890            UINT32 cmd = BYTE_REVERSE32((UINT32)(data >> 32));
853            UINT32 cmd = FLIPENDIAN_INT32((UINT32)(data >> 32));
891854            if(cmd & 0x20000000) {
892               dma_data = BYTE_REVERSE32(real3d_device_id);   /* (PCI Vendor & Device ID) */
855               dma_data = FLIPENDIAN_INT32(real3d_device_id);   /* (PCI Vendor & Device ID) */
893856            }
894857            else if(cmd & 0x80000000) {
895858               dma_status ^= 0xffffffff;
r2844r2845
1012975   lsi53c810_exit(&scsi_intf);
1013976}
1014977
978static void configure_fast_ram(running_machine *machine)
979{
980   /* set conservative DRC options */
981   cpunum_set_info_int(0, CPUINFO_INT_PPC_DRC_OPTIONS, PPCDRC_COMPATIBLE_OPTIONS - PPCDRC_ACCURATE_SINGLES);
982
983   /* configure fast RAM regions for DRC */
984   cpunum_set_info_int(0, CPUINFO_INT_PPC_FASTRAM_SELECT, 0);
985   cpunum_set_info_int(0, CPUINFO_INT_PPC_FASTRAM_START, 0x00000000);
986   cpunum_set_info_int(0, CPUINFO_INT_PPC_FASTRAM_END, 0x007fffff);
987   cpunum_set_info_ptr(0, CPUINFO_PTR_PPC_FASTRAM_BASE, work_ram);
988   cpunum_set_info_int(0, CPUINFO_INT_PPC_FASTRAM_READONLY, 0);
989}
990
1015991static MACHINE_START(model3_10)
1016992{
1017993   lsi53c810_init(&scsi_intf);
1018994   add_exit_callback(machine, model3_exit);
995   configure_fast_ram(machine);
1019996}
1020997static MACHINE_START(model3_15)
1021998{
1022999   lsi53c810_init(&scsi_intf);
10231000   add_exit_callback(machine, model3_exit);
1001   configure_fast_ram(machine);
10241002}
1003static MACHINE_START(model3_20)
1004{
1005   configure_fast_ram(machine);
1006}
1007static MACHINE_START(model3_21)
1008{
1009   configure_fast_ram(machine);
1010}
10251011
10261012static void model3_init(running_machine *machine, int step)
10271013{
r2844r2845
13321318static READ64_HANDLER(real3d_status_r)
13331319{
13341320   real3d_status ^= U64(0xffffffffffffffff);
1321   if (offset == 0)
1322   {
1323      /* pretty sure this is VBLANK */
1324      real3d_status &= ~U64(0x0000000200000000);
1325      if (video_screen_get_vblank(machine->primary_screen))
1326         real3d_status |= U64(0x0000000200000000);
1327      return real3d_status;
1328   }
13351329   return real3d_status;
13361330}
13371331
r2844r2845
41184112   MDRV_SCREEN_ADD("main", RASTER)
41194113   MDRV_SCREEN_FORMAT(BITMAP_FORMAT_INDEXED16)
41204114   MDRV_SCREEN_REFRESH_RATE(60)
4121   MDRV_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(0))
4122   MDRV_SCREEN_SIZE(496, 384)
41234115   MDRV_SCREEN_VISIBLE_AREA(0, 495, 0, 383)
4116   MDRV_SCREEN_SIZE(512, 400)
41244117
41254118   MDRV_PALETTE_LENGTH(32768)
41264119   MDRV_PALETTE_INIT(RRRRR_GGGGG_BBBBB)
r2844r2845
41564149   MDRV_SCREEN_ADD("main", RASTER)
41574150   MDRV_SCREEN_FORMAT(BITMAP_FORMAT_INDEXED16)
41584151   MDRV_SCREEN_REFRESH_RATE(60)
4159   MDRV_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(0))
4160   MDRV_SCREEN_SIZE(496, 384)
41614152   MDRV_SCREEN_VISIBLE_AREA(0, 495, 0, 383)
4153   MDRV_SCREEN_SIZE(496, 400)
41624154
41634155   MDRV_PALETTE_LENGTH(32768)
41644156   MDRV_PALETTE_INIT(RRRRR_GGGGG_BBBBB)
r2844r2845
41864178   MDRV_CPU_ADD(M68000, 12000000)
41874179   MDRV_CPU_PROGRAM_MAP(model3_snd, 0)
41884180
4181   MDRV_MACHINE_START(model3_20)
41894182   MDRV_MACHINE_RESET(model3_20)
41904183   MDRV_NVRAM_HANDLER(model3)
41914184
r2844r2845
41934186   MDRV_SCREEN_ADD("main", RASTER)
41944187   MDRV_SCREEN_FORMAT(BITMAP_FORMAT_INDEXED16)
41954188   MDRV_SCREEN_REFRESH_RATE(60)
4196   MDRV_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(0))
4197   MDRV_SCREEN_SIZE(496, 384)
41984189   MDRV_SCREEN_VISIBLE_AREA(0, 495, 0, 383)
4190   MDRV_SCREEN_SIZE(496, 400)
41994191
42004192   MDRV_PALETTE_LENGTH(32768)
42014193   MDRV_PALETTE_INIT(RRRRR_GGGGG_BBBBB)
r2844r2845
42234215   MDRV_CPU_ADD(M68000, 12000000)
42244216   MDRV_CPU_PROGRAM_MAP(model3_snd, 0)
42254217
4218   MDRV_MACHINE_START(model3_21)
42264219   MDRV_MACHINE_RESET(model3_21)
42274220   MDRV_NVRAM_HANDLER(model3)
42284221
r2844r2845
42314224   MDRV_SCREEN_FORMAT(BITMAP_FORMAT_INDEXED16)
42324225   MDRV_SCREEN_REFRESH_RATE(60)
42334226   MDRV_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(0))
4234   MDRV_SCREEN_SIZE(496, 384)
42354227   MDRV_SCREEN_VISIBLE_AREA(0, 495, 0, 383)
4228   MDRV_SCREEN_SIZE(496, 400)
42364229
42374230   MDRV_PALETTE_LENGTH(32768)
42384231   MDRV_PALETTE_INIT(RRRRR_GGGGG_BBBBB)
src/mame/drivers/pgm.c
r2844r2845
17901790}
17911791
17921792
1793extern READ16_HANDLER( PSTARS_protram_r );
1794extern READ16_HANDLER( PSTARS_r16 );
1795extern WRITE16_HANDLER( PSTARS_w16 );
1796
17971793static DRIVER_INIT( pstar )
17981794{
17991795   pgm_basic_init();
src/mame/drivers/itgamble.c
r2844r2845
11/******************************************************************
22
33  Nazionale Elettronica + others (mostly Italian) Gambling games
4  based on H8/3048 + OKI 6295 or similar.
4  mostly based on H8/3048 + OKI 6295 or similar.
55.
66  These all use MCUs with internal ROM for their programs,
77  they can't be dumped easily, and thus we can't emulate
r2844r2845
4848#define MAIN_CLOCK   XTAL_30MHz
4949#define SND_CLOCK   XTAL_1MHz
5050
51#define MNUMBER_MAIN_CLOCK   XTAL_24MHz
52#define MNUMBER_SND_CLOCK   XTAL_16MHz
53
54#define EJOLLYX5_MAIN_CLOCK   XTAL_16MHz
55
5156#include "driver.h"
5257#include "cpu/h83002/h83002.h"
5358#include "sound/okim6295.h"
r2844r2845
5762*     Video Hardware     *
5863*************************/
5964
60VIDEO_START( itgamble )
65static VIDEO_START( itgamble )
6166{
6267}
6368
64VIDEO_UPDATE( itgamble )
69static VIDEO_UPDATE( itgamble )
6570{
6671   return 0;
6772}
r2844r2845
163168*      Machine Reset      *
164169**************************/
165170
166MACHINE_RESET( itgamble )
171static MACHINE_RESET( itgamble )
167172{
168173   /* stop the CPU, we have no code for it anyway */
169174   cpunum_set_input_line(machine, 0, INPUT_LINE_HALT, ASSERT_LINE);
r2844r2845
196201
197202    /* sound hardware */
198203   MDRV_SPEAKER_STANDARD_MONO("mono")
199   MDRV_SOUND_ADD(OKIM6295, SND_CLOCK)   /* 1MHz resonator */
204   MDRV_SOUND_ADD_TAG("oki", OKIM6295, SND_CLOCK)   /* 1MHz resonator */
200205   MDRV_SOUND_CONFIG(okim6295_interface_region_1_pin7high)
201   MDRV_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.5)
206   MDRV_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.0)
202207MACHINE_DRIVER_END
203208
204209
210static MACHINE_DRIVER_START( mnumber )
211
212   MDRV_IMPORT_FROM(itgamble)
213   MDRV_CPU_REPLACE("main", H83044, MNUMBER_MAIN_CLOCK/2)   /* probably the wrong CPU */
214
215   MDRV_SOUND_REPLACE("oki", OKIM6295, MNUMBER_SND_CLOCK/16)
216   MDRV_SOUND_CONFIG(okim6295_interface_region_1_pin7high) /* clock frequency & pin 7 not verified */
217   MDRV_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.0)
218MACHINE_DRIVER_END
219
220
221static MACHINE_DRIVER_START( ejollyx5 )
222
223   MDRV_IMPORT_FROM(itgamble)
224   /* wrong CPU. we need a Renesas M16/62A 16bit microcomputer core */
225   MDRV_CPU_REPLACE("main", H83044, EJOLLYX5_MAIN_CLOCK/2)   /* up to 10MHz.*/
226
227   MDRV_SOUND_REPLACE("oki", OKIM6295, MNUMBER_SND_CLOCK/16)
228   MDRV_SOUND_CONFIG(okim6295_interface_region_1_pin7high) /* clock frequency & pin 7 not verified */
229   MDRV_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.0)
230MACHINE_DRIVER_END
231
232
205233/*************************
206234*        Rom Load        *
207235*************************/
r2844r2845
469497   ROM_REGION( 0x1000000, REGION_CPU1, 0 ) /* all the program code is in here */
470498   ROM_LOAD( "euro2k2a_ver2.0_hd64f3048f16.mcu", 0x00000, 0x4000, NO_DUMP )
471499
472   ROM_REGION( 0x1c0000, REGION_GFX1, 0 ) /* M6295 samples */
500   ROM_REGION( 0x1c0000, REGION_GFX1, 0 )
473501   ROM_LOAD( "4a.ic18", 0x000000, 0x80000, CRC(5decae2d) SHA1(d918aad0e2a1249b18677833f743c92fb678050a) )
474502   ROM_LOAD( "5a.ic17", 0x080000, 0x80000, CRC(8f1bbbf3) SHA1(5efcf77674f8737fc1b98881acebacb26b10adc1) )
475503   ROM_LOAD( "2a.ic20", 0x100000, 0x40000, CRC(f9bffb07) SHA1(efba175189d99a4548739a72f8a1f03c2782a3d0) )
476504   ROM_LOAD( "3a.ic19", 0x140000, 0x80000, CRC(56c8a73d) SHA1(49b44e5604cd8675d8f9770e5fb68dad4394e11d) ) /* identical halves */
477505
478   ROM_REGION( 0x40000, REGION_SOUND1, 0 )
506   ROM_REGION( 0x40000, REGION_SOUND1, 0 ) /* M6295 samples */
479507   ROM_LOAD( "1.ic25", 0x00000, 0x40000, CRC(4fe79e43) SHA1(7c154cb00e9b64fbdcc218280f2183b816cef20b) )
480508ROM_END
481509
482510
511/********** DIFFERENT HARDWARE **********/
512
513
514/* Mystery Number
515
516CPU:
517
5181x HD64F3048F16 (main)(u2)
5193x XC9572 (u29,u33,u34)
5201x M6295 (u5)(sound)
5211x oscillator 24.000 MHz.
5221x oscillator 16.000 MHz.
523
524ROMs:
525
5264x M27C4001 (1,2,3,4)(main)
5271x AM27C020 (5)(sound)
528
529Note:
530
5311x JAMMA edge connector
5321x 8 legs jumper (jp1)
5331x battery
5341x 8x2 DIP switches
5351x trimmer (volume)
536
537*/
538
539ROM_START( mnumber )   /* clocks should be changed for this game */
540   ROM_REGION( 0x1000000, REGION_CPU1, 0 )   /* all the program code is in here */
541   ROM_LOAD( "mnumber_hd64f3048f16.mcu", 0x00000, 0x4000, NO_DUMP )
542
543   ROM_REGION( 0x200000, REGION_GFX1, 0 )   /* different encoded gfx */
544   ROM_LOAD( "mysterynumber3.u20", 0x000000, 0x80000, CRC(251f1e11) SHA1(e8c90b289e76cea6a541b701859be6465a381668) )
545   ROM_LOAD( "mysterynumber4.u21", 0x080000, 0x80000, CRC(2b8744e4) SHA1(8a12c6f300818de3738e7c44c7df71c432cb9975) )
546   ROM_LOAD( "mysterynumber1.u22", 0x100000, 0x80000, CRC(d2ce1f61) SHA1(8f30407050fc102191747996258d4b5da3a0d994) )
547   ROM_LOAD( "mysterynumber2.u19", 0x180000, 0x80000, CRC(7b3a3b32) SHA1(9db46aa12077a48951056705491da1cce747c374) ) /* identical halves */
548
549   ROM_REGION( 0x40000, REGION_SOUND1, 0 ) /* M6295 samples */
550   ROM_LOAD( "mysterynumber5.u6", 0x00000, 0x40000, CRC(80aba466) SHA1(e9bf7e1c3d1c6b1b0dba43dd79a71f89e63df814) )
551ROM_END
552
553
483554/*************************
484555*      Game Drivers      *
485556*************************/
r2844r2845
491562GAME( 2001, laperlag, 0,       itgamble, itgamble, 0,   ROT0, "Nazionale Elettronica", "La Perla Nera Gold (Ver 2.0)",  GAME_NOT_WORKING )
492563GAME( 2001, euro2k2,  0,       itgamble, itgamble, 0,   ROT0, "Nazionale Elettronica", "Europa 2002 (Ver 2.0, set 1)",  GAME_NOT_WORKING )
493564GAME( 2001, euro2k2a, euro2k2, itgamble, itgamble, 0,   ROT0, "Nazionale Elettronica", "Europa 2002 (Ver 2.0, set 2)",  GAME_NOT_WORKING )
565
566/* different hardware */
567GAME( 200?, mnumber,  0,       mnumber,  itgamble, 0,   ROT0, "M.M. - B.R.L.",         "Mystery Number",                GAME_NOT_WORKING )
src/mame/drivers/capbowl.c
r2844r2845
110110
111111static INTERRUPT_GEN( capbowl_interrupt )
112112{
113   if (input_port_read_indexed(machine, 4) & 1)   /* get status of the F2 key */
113   if (input_port_read(machine, "SERVICE") & 1)                  /* get status of the F2 key */
114114      cpunum_set_input_line(machine, 0, INPUT_LINE_NMI, PULSE_LINE);   /* trigger self test */
115115}
116116
r2844r2845
162162
163163static READ8_HANDLER( track_0_r )
164164{
165   return (input_port_read_indexed(machine, 0) & 0xf0) | ((input_port_read_indexed(machine, 2) - last_trackball_val[0]) & 0x0f);
165   return (input_port_read(machine, "IN0") & 0xf0) | ((input_port_read(machine, "TRACKY") - last_trackball_val[0]) & 0x0f);
166166}
167167
168168
169169static READ8_HANDLER( track_1_r )
170170{
171   return (input_port_read_indexed(machine, 1) & 0xf0) | ((input_port_read_indexed(machine, 3) - last_trackball_val[1]) & 0x0f);
171   return (input_port_read(machine, "IN1") & 0xf0) | ((input_port_read(machine, "TRACKX") - last_trackball_val[1]) & 0x0f);
172172}
173173
174174
175175static WRITE8_HANDLER( track_reset_w )
176176{
177177   /* reset the trackball counters */
178   last_trackball_val[0] = input_port_read_indexed(machine, 2);
179   last_trackball_val[1] = input_port_read_indexed(machine, 3);
178   last_trackball_val[0] = input_port_read(machine, "TRACKY");
179   last_trackball_val[1] = input_port_read(machine, "TRACKX");
180180
181181   watchdog_reset_w(machine, offset, data);
182182}
r2844r2845
293293 *************************************/
294294
295295static INPUT_PORTS_START( capbowl )
296   PORT_START   /* IN0 */
296   PORT_START_TAG("IN0")   /* IN0 */
297297   /* low 4 bits are for the trackball */
298298   PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_COCKTAIL
299299   PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_COCKTAIL
r2844r2845
302302   PORT_DIPSETTING(    0x00, DEF_STR( Cocktail ) )
303303   PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_COIN2 )
304304
305   PORT_START   /* IN1 */
305   PORT_START_TAG("IN1")   /* IN1 */
306306   /* low 4 bits are for the trackball */
307307   PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON1 )
308308   PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON2 )
309309   PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_START1 )
310310   PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_COIN1 )
311311
312   PORT_START   /* FAKE */
312   PORT_START_TAG("TRACKY")   /* FAKE */
313313   PORT_BIT( 0xff, 0x00, IPT_TRACKBALL_Y ) PORT_SENSITIVITY(20) PORT_KEYDELTA(40) PORT_REVERSE
314314
315   PORT_START   /* FAKE */
315   PORT_START_TAG("TRACKX")   /* FAKE */
316316   PORT_BIT( 0xff, 0x00, IPT_TRACKBALL_X ) PORT_SENSITIVITY(20) PORT_KEYDELTA(40)
317317
318   PORT_START   /* FAKE */
318   PORT_START_TAG("SERVICE")   /* FAKE */
319319   /* This fake input port is used to get the status of the F2 key, */
320320   /* and activate the test mode, which is triggered by a NMI */
321321   PORT_SERVICE_NO_TOGGLE( 0x01, IP_ACTIVE_HIGH )
src/mame/drivers/beathead.c
r2844r2845
267267 *
268268 *************************************/
269269
270static READ32_HANDLER( input_0_r )
271{
272   return input_port_read_indexed(machine, 0);
273}
274
275
276static READ32_HANDLER( input_1_r )
277{
278   return input_port_read_indexed(machine, 1);
279}
280
281
282270static READ32_HANDLER( input_2_r )
283271{
284   int result = input_port_read_indexed(machine, 2);
272   int result = input_port_read(machine, "IN2");
285273   if (atarigen_sound_to_cpu_ready) result ^= 0x10;
286274   if (atarigen_cpu_to_sound_ready) result ^= 0x20;
287275   return result;
288276}
289277
290278
291static READ32_HANDLER( input_3_r )
292{
293   return input_port_read_indexed(machine, 3);
294}
295279
296
297
298280/*************************************
299281 *
300282 *  Sound communication
r2844r2845
348330   AM_RANGE(0x41000000, 0x41000003) AM_READWRITE(sound_data_r, sound_data_w)
349331   AM_RANGE(0x41000100, 0x41000103) AM_READ(interrupt_control_r)
350332   AM_RANGE(0x41000100, 0x4100011f) AM_WRITE(interrupt_control_w)
351   AM_RANGE(0x41000200, 0x41000203) AM_READ(input_0_r)
352   AM_RANGE(0x41000204, 0x41000207) AM_READ(input_1_r)
333   AM_RANGE(0x41000200, 0x41000203) AM_READ_PORT("IN1")
334   AM_RANGE(0x41000204, 0x41000207) AM_READ_PORT("IN0")
353335   AM_RANGE(0x41000208, 0x4100020f) AM_WRITE(sound_reset_w)
354336   AM_RANGE(0x41000220, 0x41000227) AM_WRITE(coin_count_w)
355337   AM_RANGE(0x41000300, 0x41000303) AM_READ(input_2_r)
356   AM_RANGE(0x41000304, 0x41000307) AM_READ(input_3_r)
338   AM_RANGE(0x41000304, 0x41000307) AM_READ_PORT("IN3")
357339   AM_RANGE(0x41000400, 0x41000403) AM_WRITE(SMH_RAM) AM_BASE(&beathead_palette_select)
358340   AM_RANGE(0x41000500, 0x41000503) AM_WRITE(eeprom_enable_w)
359341   AM_RANGE(0x41000600, 0x41000603) AM_WRITE(beathead_finescroll_w)
r2844r2845
378360 *************************************/
379361
380362static INPUT_PORTS_START( beathead )
381   PORT_START
382   PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(2)
383   PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(2)
384   PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_UNUSED )
385   PORT_BIT( 0x0008, IP_ACTIVE_LOW, IPT_UNUSED )
386   PORT_BIT( 0x0010, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_PLAYER(2)
387   PORT_BIT( 0x0020, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_PLAYER(2)
388   PORT_BIT( 0x0040, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_PLAYER(2)
389   PORT_BIT( 0x0080, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_PLAYER(2)
390   PORT_BIT( 0xff00, IP_ACTIVE_LOW, IPT_UNUSED )
391
392   PORT_START
363   PORT_START_TAG("IN0")      /* Player 1 */
393364   PORT_BIT( 0x00ff, IP_ACTIVE_LOW, IPT_UNUSED )
394365   PORT_BIT( 0x0100, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(1)
395366   PORT_BIT( 0x0200, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(1)
r2844r2845
400371   PORT_BIT( 0x4000, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_PLAYER(1)
401372   PORT_BIT( 0x8000, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_PLAYER(1)
402373
403   PORT_START
374   PORT_START_TAG("IN1")      /* Player 2 */
375   PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(2)
376   PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(2)
377   PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_UNUSED )
378   PORT_BIT( 0x0008, IP_ACTIVE_LOW, IPT_UNUSED )
379   PORT_BIT( 0x0010, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_PLAYER(2)
380   PORT_BIT( 0x0020, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_PLAYER(2)
381   PORT_BIT( 0x0040, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_PLAYER(2)
382   PORT_BIT( 0x0080, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_PLAYER(2)
383   PORT_BIT( 0xff00, IP_ACTIVE_LOW, IPT_UNUSED )
384
385   PORT_START_TAG("IN2")
404386   PORT_BIT( 0x000f, IP_ACTIVE_LOW, IPT_UNUSED )
405387   PORT_BIT( 0x0010, IP_ACTIVE_LOW, IPT_SPECIAL )
406388   PORT_BIT( 0x0020, IP_ACTIVE_LOW, IPT_SPECIAL )
407389   PORT_SERVICE( 0x0040, IP_ACTIVE_LOW )
408390   PORT_BIT( 0xff80, IP_ACTIVE_LOW, IPT_UNUSED )
409391
410   PORT_START
392   PORT_START_TAG("IN3")
411393   PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_COIN1 )
412394   PORT_BIT( 0x0006, IP_ACTIVE_LOW, IPT_UNUSED )
413395   PORT_BIT( 0x0008, IP_ACTIVE_LOW, IPT_COIN2 )
src/mame/drivers/skullxbo.c
r2844r2845
6868   }
6969
7070   /* update the playfield and motion objects */
71   skullxbo_scanline_update(scanline);
71   skullxbo_scanline_update(screen->machine, scanline);
7272}
7373
7474
src/mame/drivers/konamigq.c
r2844r2845
362362
363363static MACHINE_RESET( konamigq )
364364{
365   psx_machine_init();
365   psx_machine_init(machine);
366366   tms57002_init();
367367}
368368
src/mame/drivers/cps3.c
r2844r2845
17731773
17741774static READ32_HANDLER( cps3_io1_r )
17751775{
1776   return input_port_read_indexed(machine, 0);
1776   return input_port_read(machine, "IN0");
17771777}
17781778
17791779static READ32_HANDLER( cps3_io2_r )
17801780{
1781   return input_port_read_indexed(machine, 1);
1781   return input_port_read(machine, "IN1");
17821782}
17831783
17841784// this seems to be dma active flags, and maybe vblank... not if it is anything else
r2844r2845
23642364
23652365
23662366static INPUT_PORTS_START( cps3 )
2367   PORT_START
2367   PORT_START_TAG("IN0")
23682368   PORT_BIT( 0x00000001, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_PLAYER(1)
23692369   PORT_BIT( 0x00000002, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_PLAYER(1)
23702370   PORT_BIT( 0x00000004, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_PLAYER(1)
r2844r2845
23922392   PORT_BIT( 0x20000000, IP_ACTIVE_LOW, IPT_START2 )
23932393   PORT_BIT( 0xc0000000, IP_ACTIVE_LOW, IPT_UNUSED ) // nothing here?
23942394
2395   PORT_START
2395   PORT_START_TAG("IN1")
23962396   PORT_BIT( 0x0001ffff, IP_ACTIVE_LOW, IPT_UNUSED ) // nothing here?
23972397   PORT_BIT( 0x00020000, IP_ACTIVE_LOW, IPT_BUTTON6 ) PORT_PLAYER(1)
23982398   PORT_BIT( 0x00040000, IP_ACTIVE_LOW, IPT_BUTTON5 ) PORT_PLAYER(1)
src/mame/drivers/toaplan2.c
r2844r2845
381381void fixeight_okisnd_w(running_machine *machine, int data);
382382void batsugun_okisnd_w(running_machine *machine, int data);
383383
384MACHINE_RESET(batsugun);
384static MACHINE_RESET(batsugun);
385385#if USE_V25
386386static READ16_HANDLER( batsugun_share_r );
387387static READ16_HANDLER( batsugun_share2_r );
r2844r2845
674674   }
675675}
676676
677WRITE16_HANDLER( toaplan2_v25_coin_word_w )
677static WRITE16_HANDLER( toaplan2_v25_coin_word_w )
678678{
679679   // logerror("toaplan2_v25_coin_word_w %04x\n",data);
680680
r2844r2845
38953895   MDRV_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.0)
38963896MACHINE_DRIVER_END
38973897
3898MACHINE_RESET(batsugun)
3898static MACHINE_RESET(batsugun)
38993899{
39003900   #if USE_V25
39013901   cpunum_set_input_line(machine, 1, INPUT_LINE_HALT, ASSERT_LINE);
39023902   #endif
39033903}
39043904
3905void batsugun_ym2151_irqhandler(running_machine *machine, int linestate)
3905static void batsugun_ym2151_irqhandler(running_machine *machine, int linestate)
39063906{
39073907   logerror("batsugun_ym2151_irqhandler %02x\n",linestate);
39083908//  update_irq_lines(machine, linestate ? assert : clear);
39093909}
39103910
3911const struct YM2151interface batsugun_ym2151_interface =
3911static const struct YM2151interface batsugun_ym2151_interface =
39123912{
39133913   batsugun_ym2151_irqhandler
39143914};
src/mame/drivers/subsino.c
r0r2845
1/***************************************************************************
2
3                        -= Subsino's Gambling Games =-
4
5                     driver by   Luca Elia (l.elia@tin.it)
6
7CPU:    Z180 (in a black box)
8GFX:    1 Tilemap (8x8 tiles, no scrolling)
9CUSTOM: 2 x SUBSINO SS9100, SUBSINO SS9101
10SOUND:  M6295, YM2413 or YM3812
11OTHER:  Battery
12
13Preliminary driver, only "Super Rider" works since it has valid z180 code.
14Note that e.g. "Shark Party" has snippets of valid code (6f - ff).
15
16To enter test mode in smoto, keep F2 pressed during boot.
17
18***************************************************************************/
19
20#include "driver.h"
21#include "cpu/z180/z180.h"
22#include "machine/8255ppi.h"
23#include "sound/okim6295.h"
24#include "sound/2413intf.h"
25#include "sound/3812intf.h"
26
27/***************************************************************************
28                                Video Hardware
29***************************************************************************/
30
31static tilemap *tmap;
32int tiles_offset;
33
34static WRITE8_HANDLER( subsino_tiles_offset_w )
35{
36   tiles_offset = (data & 1) ? 0x1000: 0;
37   tilemap_mark_tile_dirty(tmap, offset);
38//  popmessage("gfx %02x",data);
39}
40
41static WRITE8_HANDLER( subsino_videoram_w )
42{
43   videoram[offset] = data;
44   tilemap_mark_tile_dirty(tmap, offset);
45}
46
47static WRITE8_HANDLER( subsino_colorram_w )
48{
49   colorram[offset] = data;
50   tilemap_mark_tile_dirty(tmap, offset);
51}
52
53static TILE_GET_INFO( get_tile_info )
54{
55   UINT16 code = videoram[ tile_index ] + (colorram[ tile_index ] << 8);
56   UINT16 color = (code >> 8) & 0x0f;
57   code = ((code & 0xf000) >> 4) + ((code & 0xff) >> 0);
58   code += tiles_offset;
59   SET_TILE_INFO(0, code, color, 0);
60}
61
62static VIDEO_START( subsino )
63{
64   tmap = tilemap_create(   get_tile_info, tilemap_scan_rows, 8,8, 0x40,0x20 );
65   tilemap_set_transparent_pen( tmap, 0 );
66   tiles_offset = 0;
67}
68
69static VIDEO_UPDATE( subsino )
70{
71   fillbitmap(bitmap,0,cliprect);
72   tilemap_draw(bitmap,cliprect, tmap, 0, 0);
73   return 0;
74}
75
76static PALETTE_INIT( subsino_depth3 )
77{
78   // To be done (only 2 roms?)
79}
80
81static PALETTE_INIT( subsino_depth4 )
82{
83   int i;
84   for (i = 0; i < 256; i++)
85      palette_set_color_rgb(machine,i,   pal2bit(color_prom[i+0x200]),
86                                 pal3bit(color_prom[i+0x100]),
87                                 pal3bit(color_prom[i+0x000])   );
88}
89
90/***************************************************************************
91                                Memory Maps
92***************************************************************************/
93
94static WRITE8_HANDLER( subsino_out_a_w )
95{
96   coin_counter_w( 0, data & 0x02 );
97//  popmessage("Out A %02x",data);
98}
99static WRITE8_HANDLER( subsino_out_b_w )
100{
101   // leds
102//  popmessage("Out B %02x",data);
103}
104
105static ADDRESS_MAP_START( srider_map, ADDRESS_SPACE_PROGRAM, 8 )
106   AM_RANGE( 0x00000, 0x0bfff ) AM_ROM
107
108   AM_RANGE( 0x0c000, 0x0cfff ) AM_RAM
109
110   AM_RANGE( 0x0d000, 0x0d000 ) AM_READ_PORT( "DSW1" )
111   AM_RANGE( 0x0d001, 0x0d001 ) AM_READ_PORT( "DSW2" )
112   AM_RANGE( 0x0d002, 0x0d002 ) AM_READ_PORT( "DSW3" )
113
114   AM_RANGE( 0x0d004, 0x0d004 ) AM_READ_PORT( "DSW4" )
115   AM_RANGE( 0x0d005, 0x0d005 ) AM_READ_PORT( "INA" )
116   AM_RANGE( 0x0d006, 0x0d006 ) AM_READ_PORT( "INB" )
117
118   AM_RANGE( 0x0d009, 0x0d009 ) AM_WRITE( subsino_out_b_w )
119   AM_RANGE( 0x0d00a, 0x0d00a ) AM_WRITE( subsino_out_a_w )
120
121   AM_RANGE( 0x0d00c, 0x0d00c ) AM_READ_PORT( "INC" )
122
123   AM_RANGE( 0x0d016, 0x0d016 ) AM_WRITE( YM3812_control_port_0_w )
124   AM_RANGE( 0x0d017, 0x0d017 ) AM_WRITE( YM3812_write_port_0_w )
125
126   AM_RANGE( 0x0d018, 0x0d018 ) AM_WRITE( OKIM6295_data_0_w )
127
128   AM_RANGE( 0x0d01b, 0x0d01b ) AM_WRITE( subsino_tiles_offset_w )
129
130   AM_RANGE( 0x0e000, 0x0e7ff ) AM_RAM_WRITE( subsino_colorram_w ) AM_BASE( &colorram )
131   AM_RANGE( 0x0e800, 0x0efff ) AM_RAM_WRITE( subsino_videoram_w ) AM_BASE( &videoram )
132ADDRESS_MAP_END
133
134
135static ADDRESS_MAP_START( victor5_map, ADDRESS_SPACE_PROGRAM, 8 )
136   AM_RANGE( 0x00000, 0x0bfff ) AM_ROM
137   AM_RANGE( 0x0c000, 0x0cfff ) AM_RAM
138   AM_RANGE( 0x0e000, 0x0e7ff ) AM_RAM_WRITE( subsino_colorram_w ) AM_BASE( &colorram )
139   AM_RANGE( 0x0e800, 0x0efff ) AM_RAM_WRITE( subsino_videoram_w ) AM_BASE( &videoram )
140ADDRESS_MAP_END
141
142
143static ADDRESS_MAP_START( subsino_iomap, ADDRESS_SPACE_IO, 8 )
144   AM_RANGE( 0x0000, 0x003f ) AM_RAM // internal regs
145ADDRESS_MAP_END
146
147/***************************************************************************
148                                Input Ports
149***************************************************************************/
150
151INPUT_PORTS_START( smoto )
152
153   PORT_START_TAG( "DSW1" )
154   PORT_DIPUNKNOWN( 0x01, 0x01 )
155   PORT_DIPUNKNOWN( 0x02, 0x02 )
156   PORT_DIPUNKNOWN( 0x04, 0x04 )
157   PORT_DIPUNKNOWN( 0x08, 0x08 )
158   PORT_DIPUNKNOWN( 0x10, 0x10 )
159   PORT_DIPUNKNOWN( 0x20, 0x20 )
160   PORT_DIPUNKNOWN( 0x40, 0x40 )
161   PORT_DIPUNKNOWN( 0x80, 0x80 )
162
163   PORT_START_TAG( "DSW2" )
164   PORT_DIPUNKNOWN( 0x01, 0x01 )
165   PORT_DIPUNKNOWN( 0x02, 0x02 )
166   PORT_DIPUNKNOWN( 0x04, 0x04 )
167   PORT_DIPUNKNOWN( 0x08, 0x08 )
168   PORT_DIPUNKNOWN( 0x10, 0x10 )
169   PORT_DIPUNKNOWN( 0x20, 0x20 )
170   PORT_DIPUNKNOWN( 0x40, 0x40 )
171   PORT_DIPUNKNOWN( 0x80, 0x80 )
172
173   PORT_START_TAG( "DSW3" )
174   PORT_DIPUNKNOWN( 0x01, 0x01 )
175   PORT_DIPUNKNOWN( 0x02, 0x02 )
176   PORT_DIPUNKNOWN( 0x04, 0x04 )
177   PORT_DIPUNKNOWN( 0x08, 0x08 )
178   PORT_DIPUNKNOWN( 0x10, 0x10 )
179   PORT_DIPUNKNOWN( 0x20, 0x20 )
180   PORT_DIPUNKNOWN( 0x40, 0x40 )
181   PORT_DIPUNKNOWN( 0x80, 0x80 )
182
183   PORT_START_TAG( "DSW4" )
184   PORT_DIPUNKNOWN( 0x01, 0x01 )
185   PORT_DIPUNKNOWN( 0x02, 0x02 )
186   PORT_DIPUNKNOWN( 0x04, 0x04 )
187   PORT_DIPUNKNOWN( 0x08, 0x08 )
188   PORT_DIPUNKNOWN( 0x10, 0x10 )
189   PORT_DIPUNKNOWN( 0x20, 0x20 )
190   PORT_DIPUNKNOWN( 0x40, 0x40 )
191   PORT_DIPUNKNOWN( 0x80, 0x80 )
192
193   PORT_START_TAG( "INA" )
194   PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON1 )   // 1
195   PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON2 )   // 2 ->
196   PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_BUTTON3 )   // 3 <-
197   PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_BUTTON4 )   // 4 choose
198   PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON5 )   // 5
199   PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_START1  )   // start
200   PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_START2  )   // bet (power->speed)
201   PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
202
203   PORT_START_TAG( "INB" )
204   PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1    )   // coin
205   PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN  )
206   PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN  )
207   PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN  )
208   PORT_SERVICE_NO_TOGGLE( 0x10, IP_ACTIVE_LOW )   // test
209   PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_SERVICE1 )   // rate
210   PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN  )
211   PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN  )
212
213   PORT_START_TAG( "INC" )
214   PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN )
215   PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN )
216   PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_START4  )   // take
217   PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN )
218   PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN )
219   PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN )
220   PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
221   PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
222
223INPUT_PORTS_END
224
225/***************************************************************************
226                                Graphics Layout
227***************************************************************************/
228
229static const gfx_layout layout_8x8x3 =
230{
231   8, 8,
232   RGN_FRAC(1, 3),
233   3,
234   { RGN_FRAC(0,3),RGN_FRAC(1,3),RGN_FRAC(2,3) },
235   { STEP8(0,1) },
236   { STEP8(0,8) },
237   8*8
238};
239
240static const gfx_layout layout_8x8x4 =
241{
242   8, 8,
243   RGN_FRAC(1, 4),
244   4,
245   { RGN_FRAC(0,4),RGN_FRAC(1,4),RGN_FRAC(2,4),RGN_FRAC(3,4) },
246   { STEP8(0,1) },
247   { STEP8(0,8) },
248   8*8
249};
250
251static GFXDECODE_START( subsino_depth3 )
252   GFXDECODE_ENTRY( REGION_GFX1, 0, layout_8x8x3, 0, 16 )
253GFXDECODE_END
254
255static GFXDECODE_START( subsino_depth4 )
256   GFXDECODE_ENTRY( REGION_GFX1, 0, layout_8x8x4, 0, 16 )
257GFXDECODE_END
258
259
260/***************************************************************************
261                                Machine Drivers
262***************************************************************************/
263
264static MACHINE_DRIVER_START( victor5 )
265   /* basic machine hardware */
266   MDRV_CPU_ADD(Z180, XTAL_12MHz / 3)   // 4 MHz?
267   MDRV_CPU_PROGRAM_MAP(victor5_map,0)
268   MDRV_CPU_IO_MAP(subsino_iomap,0)
269
270   /* video hardware */
271   MDRV_SCREEN_ADD("main", RASTER)
272   MDRV_SCREEN_REFRESH_RATE(60)
273   MDRV_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(0))
274   MDRV_SCREEN_FORMAT(BITMAP_FORMAT_INDEXED16)
275   MDRV_SCREEN_SIZE(512, 256)
276   MDRV_SCREEN_VISIBLE_AREA(0, 512-1, 0+16, 256-16-1)
277
278   MDRV_GFXDECODE(subsino_depth3)
279   MDRV_PALETTE_LENGTH(0x100)
280
281//  MDRV_PALETTE_INIT(subsino_depth3)   // no proms?
282   MDRV_VIDEO_START(subsino)
283   MDRV_VIDEO_UPDATE(subsino)
284
285   /* sound hardware */
286   MDRV_SPEAKER_STANDARD_MONO("mono")
287
288   MDRV_SOUND_ADD(YM2413, XTAL_3_579545MHz)
289   MDRV_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.0)
290
291   MDRV_SOUND_ADD(OKIM6295, XTAL_4_433619MHz / 4)
292   MDRV_SOUND_CONFIG(okim6295_interface_region_1_pin7high) // clock frequency & pin 7 not verified
293   MDRV_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.0)
294MACHINE_DRIVER_END
295
296static MACHINE_DRIVER_START( victor21 )
297
298   /* basic machine hardware */
299   MDRV_IMPORT_FROM( victor5 )
300   MDRV_PALETTE_INIT(subsino_depth3)   // 2 proms?
301MACHINE_DRIVER_END
302
303
304static MACHINE_DRIVER_START( srider )
305   /* basic machine hardware */
306   MDRV_CPU_ADD(Z180, XTAL_12MHz / 3)   // 4 MHz?
307   MDRV_CPU_PROGRAM_MAP(srider_map,0)
308   MDRV_CPU_IO_MAP(subsino_iomap,0)
309
310   /* video hardware */
311   MDRV_SCREEN_ADD("main", RASTER)
312   MDRV_SCREEN_REFRESH_RATE(60)
313   MDRV_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(0))
314   MDRV_SCREEN_FORMAT(BITMAP_FORMAT_INDEXED16)
315   MDRV_SCREEN_SIZE(512, 256)
316   MDRV_SCREEN_VISIBLE_AREA(0, 512-1, 0+16, 256-16-1)
317
318   MDRV_GFXDECODE(subsino_depth4)
319   MDRV_PALETTE_LENGTH(0x100)
320
321   MDRV_PALETTE_INIT(subsino_depth4)
322   MDRV_VIDEO_START(subsino)
323   MDRV_VIDEO_UPDATE(subsino)
324
325   /* sound hardware */
326   MDRV_SPEAKER_STANDARD_MONO("mono")
327
328   MDRV_SOUND_ADD(YM3812, XTAL_3_579545MHz)
329   MDRV_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.0)
330
331   MDRV_SOUND_ADD(OKIM6295, XTAL_4_433619MHz / 4)
332   MDRV_SOUND_CONFIG(okim6295_interface_region_1_pin7high) // clock frequency & pin 7 not verified
333   MDRV_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.0)
334MACHINE_DRIVER_END
335
336
337/***************************************************************************
338                                ROMs Loading
339***************************************************************************/
340
341/***************************************************************************
342
343Victor 5
344(C)1991 Subsino
345
346Chips:
347
3481x unknown big black box
3491x M5L8255AP
3501x UM3567
3511x M6295
3521x oscillator 12.000
3531x oscillator 4.433619
3541x oscillator 3.579545
355
356ROMs:
357
3581x M27C512 (1)
3593x 27C256 (2,3,4)
360
361Notes:
362
3631x 36x2 edge connector (con3)
3641x 10x2 edge connector (con4)
3651x RS232 9pins connector (con5)
3662x batteries
3673x 8x2 switches dip
3681x pushbutton
369
370Sticker on PCB reads V552520
371
372Info by f205v (26/03/2008)
373
374***************************************************************************/
375
376ROM_START( victor5 )
377   ROM_REGION( 0x10000, REGION_CPU1, 0 )
378   ROM_LOAD( "1.u1", 0x00000, 0x10000, CRC(e3ada2fc) SHA1(eddb460dcb80a29fbbe3ed6c4733c75b892baf52) )
379
380   ROM_REGION( 0x18000, REGION_GFX1, ROMREGION_DISPOSE )
381   ROM_LOAD( "2.u24", 0x00000, 0x8000, CRC(1229e951) SHA1(1e548625bb60e2d6f52a376a0dea9e5709f94135) )
382   ROM_LOAD( "3.u23", 0x08000, 0x8000, CRC(2d89bbf1) SHA1(d7fda0174a835e88b330dfd09bdb604bfe4c2e44) )
383   ROM_LOAD( "4.u22", 0x10000, 0x8000, CRC(ecf840a1) SHA1(9ecf522afb23e3557d37effc3c8568e8a14dad1a) )
384
385   ROM_REGION( 0x40000, REGION_SOUND1, ROMREGION_ERASE )
386   // rom socket is empty
387ROM_END
388
389/***************************************************************************
390
391Victor 21
392(C)1990 Subsino
393
394Chips:
395
3961x unknown big black box
3971x M5L8255AP
3981x UM3567
3991x M6295
4001x oscillator 12.000
4011x oscillator 4.433619
4021x oscillator 3.579545
403
404ROMs:
405
4061x M27C512 (1)
4073x 27C256 (2,3,4)
408
409Other:
410
4111x 36x2 edge connector (con3)
4121x 10x2 edge connector (con4)
4131x RS232 9pins connector (con5)
4142x batteries
4153x 8 switches dips
4161x pushbutton
417
418PCB layout is identical to "Victor 5"
419Sticker on PCB reads V12040
420
421Info by f205v, Corrado Tomaselli (20/04/2008)
422
423***************************************************************************/
424
425ROM_START( victor21 )
426   ROM_REGION( 0x10000, REGION_CPU1, 0 )
427   ROM_LOAD( "1.u1", 0x00000, 0x10000, CRC(43999b2d) SHA1(7ce26fd332ffe35fd826a1a6166b228d4bc370b8) )
428
429   ROM_REGION( 0x18000, REGION_GFX1, ROMREGION_DISPOSE )
430   ROM_LOAD( "2.u24", 0x00000, 0x8000, CRC(f1181b93) SHA1(53cd4d2ce13973495b51d911a4745a69a9784983) )
431   ROM_LOAD( "3.u25", 0x08000, 0x8000, CRC(437abb27) SHA1(bd3790807d60a41d58e07f60fb990553076d6e96) )
432   ROM_LOAD( "4.u26", 0x10000, 0x8000, CRC(e2f66eee) SHA1(ece924fe626f21fd7d31faabf19225d80e2bcfd3) )
433
434   ROM_REGION( 0x40000, REGION_SOUND1, ROMREGION_ERASE )
435   // rom socket is empty
436
437   ROM_REGION( 0x200, REGION_PROMS, ROMREGION_DISPOSE )
438   ROM_LOAD( "74s287.u35", 0x000, 0x100, CRC(40094bed) SHA1(b25d96126b3f7bd06bf76dc9958f8669f83abdb7) )
439   ROM_LOAD( "74s287.u36", 0x100, 0x100, CRC(9ca021c5) SHA1(6a1d8d4f958d36e4a676dc4f4aee83d637933bc3) )
440ROM_END
441
442/***************************************************************************
443
444Shark Party
445(C)1993 Subsino
446
447Chips:
448
4491x unknown big black box
4501x custom SUBSINO_SS9101_409235I (DIL42)(u48)
4512x KD89C55 (u49,u50)
4521x K-665 (u55)(equivalent to M6295)
4531x K-664 (u57)(equivalent to YM3014)
4541x K-666 (u52)(equivalent to YM3812)
4553x 45580D (amplifier)(u58,u59,u60)
4562x custom SUBSINO_SS9100_3512204V (SMT 44pins)(u10,u19)
4571x oscillator 4.433619MHz
4581x oscillator 12.000MHz
459
460ROMs:
461
4621x 27C1001 (u54)
4631x 27C512 (u18)
4642x 27C010 (u16,u17)
4653x N82S129AN (u11,u12,u13)
4664x GAL16V8B (u2,u37,u45,u46)(not dumped)
4672x TIBPAL16L8 (u43,u44)(not dumped)
468
469Other:
470
4711x 36x2 edge connector (con5)
4721x 10x2 edge connector (con4)
4731x battery
4741x trimmer (volume)
4751x pushbutton (sw5)
4764x 8x2 switches dip (sw1,sw2,sw3,sw4)
477
478Info by f205v (25/03/2008)
479
480***************************************************************************/
481
482ROM_START( sharkpy )
483   ROM_REGION( 0x10000, REGION_CPU1, 0 )
484   ROM_LOAD( "shark_n.1.u18", 0x00000, 0x10000, CRC(25aeac2f) SHA1(d94e3e5cfffd150ac48e1463493a8323f42e7a89) )
485
486   ROM_REGION( 0x40000, REGION_GFX1, ROMREGION_DISPOSE )
487   ROM_LOAD( "shark_n.2.u17", 0x00000, 0x08000, CRC(c27f3d0a) SHA1(77c8eb0322c5b9c89777cb080d26ecf9abe01ae7) )
488   ROM_CONTINUE(              0x10000, 0x08000 )
489   ROM_CONTINUE(              0x08000, 0x08000 )
490   ROM_CONTINUE(              0x18000, 0x08000 )
491   ROM_LOAD( "shark_n.3.u16", 0x20000, 0x08000, CRC(a7a715ce) SHA1(38b93e05377d9cb816688f5070e847480f195c6b) )
492   ROM_CONTINUE(              0x30000, 0x08000 )
493   ROM_CONTINUE(              0x28000, 0x08000 )
494   ROM_CONTINUE(              0x38000, 0x08000 )
495
496   ROM_REGION( 0x20000, REGION_SOUND1, 0 )
497   ROM_LOAD( "shark(ii)-italy_4_ver1.0.u54", 0x00000, 0x20000, CRC(9f384c59) SHA1(d2b087b8370b40b6f0944de661ea6aebaebea06f) )
498
499   ROM_REGION( 0x300, REGION_PROMS, ROMREGION_DISPOSE )
500   ROM_LOAD( "n82s129an.u11", 0x000, 0x100, CRC(daf3657a) SHA1(93005938e2d60d54e7bbf1e234bba3802ee1af21) )
501   ROM_LOAD( "n82s129an.u12", 0x100, 0x100, CRC(5a7a25ed) SHA1(eebd679195e6ea50f64f3c46cd06ee21a1550491) )
502   ROM_LOAD( "n82s129an.u13", 0x200, 0x100, CRC(0ef5f218) SHA1(a02cf266661385aa078563bd83240d36549c1cf0) )
503ROM_END
504
505/***************************************************************************
506
507Shark Party (alt)
508(C)1993 Subsino
509
510Chips:
511
5121x unknown big black box
5131x custom SUBSINO_SS9101_409235I (DIL42)(u48)
5142x KD89C55 (u49,u50)
5151x K-665 (u55)(equivalent to M6295)
5161x K-664 (u57)(equivalent to YM3014)
5171x SM64JBCK (u52)(equivalent to YM3812)
5183x 45580D (amplifier)(u58,u59,u60)
5192x custom SUBSINO_SS9100_3512201V (SMT 44pins)(u10,u19)
5201x oscillator 4.433619MHz
5211x oscillator 12.000MHz
522
523ROMs:
524
5252x 27C1001 (u54,u17)
5261x 27C512 (u18)
5271x 27C010 (u16)
5283x N82S129AN (u11,u12,u13)
5294x GAL16V8B (u2,u37,u45,u46)(not dumped)
5302x TIBPAL16L8 (u43,u44)(not dumped)
531
532Other:
533
5341x 36x2 edge connector (con5)
5351x 10x2 edge connector (con4)
5361x battery
5371x trimmer (volume)
5381x pushbutton (sw5)
5394x 8x2 switches dip (sw1,sw2,sw3,sw4)
540
541Info by f205v (25/03/2008)
542
543***************************************************************************/
544
545ROM_START( sharkpya )
546   ROM_REGION( 0x10000, REGION_CPU1, 0 )
547   ROM_LOAD( "shark1.6.u18", 0x00000, 0x10000, CRC(365312a0) SHA1(de8370b1f35e8d071185d2e5f2fbd2fdf74c55ac) )
548
549   ROM_REGION( 0x40000, REGION_GFX1, ROMREGION_DISPOSE )
550   ROM_LOAD( "shark_n.2.u17", 0x00000, 0x08000, CRC(c27f3d0a) SHA1(77c8eb0322c5b9c89777cb080d26ecf9abe01ae7) )
551   ROM_CONTINUE(              0x10000, 0x08000 )
552   ROM_CONTINUE(              0x08000, 0x08000 )
553   ROM_CONTINUE(              0x18000, 0x08000 )
554   ROM_LOAD( "shark_n.3.u16", 0x20000, 0x08000, CRC(a7a715ce) SHA1(38b93e05377d9cb816688f5070e847480f195c6b) )
555   ROM_CONTINUE(              0x30000, 0x08000 )
556   ROM_CONTINUE(              0x28000, 0x08000 )
557   ROM_CONTINUE(              0x38000, 0x08000 )
558
559   ROM_REGION( 0x20000, REGION_SOUND1, 0 )
560   ROM_LOAD( "shark(ii)-italy_4_ver1.0.u54", 0x00000, 0x20000, CRC(9f384c59) SHA1(d2b087b8370b40b6f0944de661ea6aebaebea06f) )
561
562   ROM_REGION( 0x300, REGION_PROMS, ROMREGION_DISPOSE )
563   ROM_LOAD( "sn82s129an.u11", 0x000, 0x100, CRC(daf3657a) SHA1(93005938e2d60d54e7bbf1e234bba3802ee1af21) )
564   ROM_LOAD( "sn82s129an.u12", 0x100, 0x100, CRC(5a7a25ed) SHA1(eebd679195e6ea50f64f3c46cd06ee21a1550491) )
565   ROM_LOAD( "sn82s129an.u13", 0x200, 0x100, CRC(0ef5f218) SHA1(a02cf266661385aa078563bd83240d36549c1cf0) )
566ROM_END
567
568/***************************************************************************
569
570Super Rider (Italy Ver 1.6)
571(C)1996 Subsino
572
573Chips:
574
5752x custom QFP44 label SUBSINOSS9100
5761x custom DIP42 label SUBSINOSS9101
5772x FILE KD89C55A (equivalent to 8255)
5781x custom QFP44 label M28 (sound)(equivalent to M6295)
5791x custom DIP24 label K-666 (sound)(equivalent to YM3812)
5801x custom DIP8 label K-664 (sound)(equivalent to YM3014)
5811x oscillator 12.000MHz (main)
5821x oscillator 4.43361MHz (sound)
583
584ROMs:
585
5861x TMS27C512 (1)
5872x TMS27C010A (2,3)(main)
5881x TMS27C010A (4) (sound)
5893x PROM N82S129AN
590
591Other:
592
5931x 10x2 edge connector (looks like a coin payout)
5941x 36x2 edge connector
5951x battery 3.6V NiCd
5961x pushbutton (sw5)
5974x 8 switches dips (sw1-4)
5981x trimmer (volume)
5991x BIG BLACK BOX (on top of the box there is a small door closing a button-battery; for sure there is more in it, but I do not know how to open it / tore it apart)
600
601This game is the official Italian version of "Super Rider" by Subsino
602
603Info by f205v (29/12/2005)
604
605***************************************************************************/
606
607ROM_START( smoto16 )
608   ROM_REGION( 0x10000, REGION_CPU1, 0 )
609   ROM_LOAD( "rideritaly_1ver1.6.u18", 0x0000, 0x10000, CRC(c7c0c3e8) SHA1(5dc80bc775f370653135a7b3ea9c8d3c92263804) )
610
611   ROM_REGION( 0x40000, REGION_GFX1, ROMREGION_DISPOSE )
612   ROM_LOAD( "rideritaly_3ver1.6.u16", 0x00000, 0x08000, CRC(998a8feb) SHA1(27f08b23f2dd3736f4f12f489d9a3aa096c99e8a) )
613   ROM_CONTINUE(                       0x10000, 0x08000 )
614   ROM_CONTINUE(                       0x08000, 0x08000 )
615   ROM_CONTINUE(                       0x18000, 0x08000 )
616   ROM_LOAD( "rideritaly_2ver1.6.u17", 0x20000, 0x08000, CRC(bdf9bf26) SHA1(49e7c0b99fec06dca5816eb7e38aed025efcaaa7) )
617   ROM_CONTINUE(                       0x30000, 0x08000 )
618   ROM_CONTINUE(                       0x28000, 0x08000 )
619   ROM_CONTINUE(                       0x38000, 0x08000 )
620
621   ROM_REGION( 0x20000, REGION_SOUND1, 0 )
622   ROM_LOAD( "rideritaly_4ver1.6.u54", 0x00000, 0x20000, CRC(df828563) SHA1(f39324c5c37486ed9512e0ff934394556dd182ae) )
623
624   ROM_REGION( 0x300, REGION_PROMS, ROMREGION_DISPOSE )
625   ROM_LOAD( "prom-n82s129an.u11", 0x000, 0x100, CRC(e17730a6) SHA1(50c730b24e1d3d205c70f9381e4136e2ba6e499a) )
626   ROM_LOAD( "prom-n82s129an.u12", 0x100, 0x100, CRC(df848861) SHA1(f7e382f8b56d6b9f2af6c7a48a19e3631a64bb6d) )
627   ROM_LOAD( "prom-n82s129an.u13", 0x200, 0x100, CRC(9cb4a5c0) SHA1(0e0a368329c6d1cb685ed655d699a4894988fdb1) )
628ROM_END
629
630/***************************************************************************
631
632Super Rider (Italy Ver 2.0)
633(C)1997 Subsino
634
635Chips:
636
6372x custom QFP44 label SUBSINOSS9100
6381x custom DIP42 label SUBSINOSS9101
6392x D8255AC-2 (are they 8255 equivalent?)
6401x custom QFP44 label K-665 (sound)(equivalent to OKI M6295)
6411x custom DIP24 label SM64 (sound)(equivalent to YM3812)
6421x custom DIP8 label K-664 (sound)(equivalent to YM3014)
6431x oscillator 12.000MHz (main)
6441x oscillator 4.433619MHz (sound)
645
646ROMs:
647
6481x 27C512 (1)
6492x M27C1001 (2,3)(main)
6501x M27C1001 (4) (sound)
6513x PROM N82S129AN
6523x PALCE16V8H (not dumped)
6532x TIBPAL16L8B (not dumped)
6541x GAL16V8B (not dumped)
655
656Other:
657
6581x 10x2 edge connector (looks like a coin payout)
6591x 36x2 edge connector
6601x battery 3.6V NiCd
6614x 8 switches dips (sw1-4)
6621x trimmer (volume)
6631x BIG BLACK BOX (on top of the box there is a small door closing a button-battery; for sure there is more in it, but I do not know how to open it / tore it apart)
664
665This game is the official Italian version of "Super Rider" by Subsino
666
667Info by f205v, Corrado Tomaselli (20/04/2008)
668
669***************************************************************************/
670
671ROM_START( smoto20 )
672   ROM_REGION( 0x10000, REGION_CPU1, 0 )
673   ROM_LOAD( "italyv2.0-25.u18", 0x00000, 0x10000, CRC(91abc76e) SHA1(b0eb3afda1d94111056559017802b16b2e72a9a5) )
674
675   ROM_REGION( 0x40000, REGION_GFX1, ROMREGION_DISPOSE )
676   ROM_LOAD( "3.u16", 0x00000, 0x08000, CRC(44b44385) SHA1(27c2865e52ab67aa8e077e8e1202cbf2addc0dfc) )
677   ROM_CONTINUE(      0x10000, 0x08000 )
678   ROM_CONTINUE(      0x08000, 0x08000 )
679   ROM_CONTINUE(      0x18000, 0x08000 )
680   ROM_LOAD( "2.u17", 0x20000, 0x08000, CRC(380fc964) SHA1(4a5076d90cb94e2ffeec7534ce64d4cdb320f374) )
681   ROM_CONTINUE(      0x30000, 0x08000 )
682   ROM_CONTINUE(      0x28000, 0x08000 )
683   ROM_CONTINUE(      0x38000, 0x08000 )
684
685   ROM_REGION( 0x20000, REGION_SOUND1, 0 )
686   ROM_LOAD( "rom4ver1.0.u54", 0x00000, 0x20000, CRC(df828563) SHA1(f39324c5c37486ed9512e0ff934394556dd182ae) )
687
688   ROM_REGION( 0x300, REGION_PROMS, ROMREGION_DISPOSE )
689   ROM_LOAD( "82s129.u11", 0x000, 0x100, CRC(e17730a6) SHA1(50c730b24e1d3d205c70f9381e4136e2ba6e499a) )
690   ROM_LOAD( "82s129.u12", 0x100, 0x100, CRC(df848861) SHA1(f7e382f8b56d6b9f2af6c7a48a19e3631a64bb6d) )
691   ROM_LOAD( "82s129.u13", 0x200, 0x100, CRC(9cb4a5c0) SHA1(0e0a368329c6d1cb685ed655d699a4894988fdb1) )
692ROM_END
693
694static DRIVER_INIT( smoto20 )
695{
696   UINT8 *rom = memory_region( REGION_CPU1 );
697   rom[0x12e1] = 0x20;   // "ERROR 951010"
698}
699static DRIVER_INIT( smoto16 )
700{
701   UINT8 *rom = memory_region( REGION_CPU1 );
702   rom[0x12d0] = 0x20;   // "ERROR 951010"
703}
704
705GAME( 1990, victor5,  0,        victor5,  0,        0,        ROT0, "Subsino", "Victor 5",                  GAME_NOT_WORKING )
706GAME( 1990, victor21, 0,        victor21, 0,        0,        ROT0, "Subsino", "Victor 21",                 GAME_NOT_WORKING )
707GAME( 1993, sharkpy,  0,        srider,   0,        0,        ROT0, "Subsino", "Shark Party",               GAME_NOT_WORKING )
708GAME( 1993, sharkpya, sharkpy,  srider,   0,        0,        ROT0, "Subsino", "Shark Party (alt)",         GAME_NOT_WORKING )
709GAME( 1996, smoto20,  0,        srider,   smoto,    smoto20,  ROT0, "Subsino", "Super Rider (Italy, v2.0)", GAME_WRONG_COLORS )
710GAME( 1996, smoto16,  smoto20,  srider,   smoto,    smoto16,  ROT0, "Subsino", "Super Moto (Italy, v1.6)",  GAME_WRONG_COLORS )
src/mame/drivers/funkybee.c
r2844r2845
3737AY8910 Port A = DSW
3838
3939
40Known issues:
41
42* skylancr fires in the same spot regardless of player position when in cocktail mode.
43
44
4540Stephh's notes (based on the games Z80 code and some tests) :
4641
47421) 'funkybee' and clones
r2844r2845
187182   PORT_DIPSETTING(   0x80, DEF_STR( Cocktail ) )
188183INPUT_PORTS_END
189184
190#ifdef UNUSED_DEFINITION
191185static INPUT_PORTS_START( funkbeeb )
192186   PORT_INCLUDE(funkybee)
193187
r2844r2845
198192   PORT_DIPSETTING(   0x10, "3" )
199193   PORT_DIPSETTING(   0x00, "4" )
200194INPUT_PORTS_END
201#endif
202195
203196static INPUT_PORTS_START( skylancr )
204197   PORT_START_TAG("IN0")
r2844r2845
321314   MDRV_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(2500) /* not accurate */)
322315   MDRV_SCREEN_FORMAT(BITMAP_FORMAT_INDEXED16)
323316   MDRV_SCREEN_SIZE(32*8, 32*8)
324   MDRV_SCREEN_VISIBLE_AREA(12, 32*8-1-12, 0*8, 28*8-1)
317   MDRV_SCREEN_VISIBLE_AREA(12, 32*8-8-1, 0*8, 28*8-1)
325318
326319   MDRV_GFXDECODE(funkybee)
327320   MDRV_PALETTE_LENGTH(32)
r2844r2845
415408ROM_END
416409
417410GAME( 1982, funkybee, 0,        funkybee, funkybee, 0, ROT90, "Orca",                           "Funky Bee",                            0 )
418GAME( 1982, funkbeeb, funkybee, funkybee, funkybee, 0, ROT90, "bootleg",                        "Funky Bee (bootleg, harder)",          0 )
411GAME( 1982, funkbeeb, funkybee, funkybee, funkbeeb, 0, ROT90, "bootleg",                        "Funky Bee (bootleg, harder)",          0 )
419412GAME( 1983, skylancr, 0,        funkybee, skylancr, 0, ROT90, "Orca",                           "Sky Lancer",                           0 )
420413GAME( 1983, skylance, skylancr, funkybee, skylance, 0, ROT90, "Orca (Esco Trading Co license)", "Sky Lancer (Esco Trading Co license)", 0 )
src/mame/drivers/btoads.c
r2844r2845
8383
8484static READ16_HANDLER( special_port_4_r )
8585{
86   int result = input_port_read_indexed(machine, 4) & ~0x81;
86   int result = input_port_read(machine, "SPECIAL") & ~0x81;
8787
8888   if (sound_to_main_ready)
8989      result |= 0x01;
r2844r2845
274274   PORT_BIT( 0x0080, IP_ACTIVE_LOW, IPT_START3 )
275275   PORT_BIT( 0xff00, IP_ACTIVE_LOW, IPT_UNUSED )
276276
277   PORT_START
277   PORT_START_TAG("UNK")
278278   PORT_BIT( 0xffff, IP_ACTIVE_LOW, IPT_UNKNOWN )
279279
280   PORT_START
280   PORT_START_TAG("SPECIAL")
281281   PORT_SERVICE_NO_TOGGLE( 0x0002, IP_ACTIVE_LOW )
282282   PORT_BIT( 0xfffd, IP_ACTIVE_LOW, IPT_UNKNOWN )
283283
src/mame/drivers/boxer.c
r2844r2845
4444
4545      memset(mask, 0, sizeof mask);
4646
47      mask[input_port_read_indexed(machine, 3)] |= 0x01;
48      mask[input_port_read_indexed(machine, 4)] |= 0x02;
49      mask[input_port_read_indexed(machine, 5)] |= 0x04;
50      mask[input_port_read_indexed(machine, 6)] |= 0x08;
51      mask[input_port_read_indexed(machine, 7)] |= 0x10;
52      mask[input_port_read_indexed(machine, 8)] |= 0x20;
47      mask[input_port_read(machine, "STICK0_X")] |= 0x01;
48      mask[input_port_read(machine, "STICK0_Y")] |= 0x02;
49      mask[input_port_read(machine, "PADDLE0")]  |= 0x04;
50      mask[input_port_read(machine, "STICK1_X")] |= 0x08;
51      mask[input_port_read(machine, "STICK1_Y")] |= 0x10;
52      mask[input_port_read(machine, "PADDLE1")]  |= 0x20;
5353
5454      for (i = 1; i < 256; i++)
5555         if (mask[i] != 0)
r2844r2845
8787
8888static READ8_HANDLER( boxer_input_r )
8989{
90   UINT8 val = input_port_read_indexed(machine, 0);
90   UINT8 val = input_port_read(machine, "IN0");
9191
92   if (input_port_read_indexed(machine, 9) < video_screen_get_vpos(machine->primary_screen))
92   if (input_port_read(machine, "IN3") < video_screen_get_vpos(machine->primary_screen))
9393      val |= 0x02;
9494
9595   return (val << ((offset & 7) ^ 7)) & 0x80;
r2844r2845
111111      break;
112112
113113   case 2:
114      val = input_port_read_indexed(machine, 1);
114      val = input_port_read(machine, "IN1");
115115      break;
116116
117117   case 3:
118      val = input_port_read_indexed(machine, 2);
118      val = input_port_read(machine, "IN2");
119119      break;
120120   }
121121
r2844r2845
196196
197197static INPUT_PORTS_START( boxer )
198198
199   PORT_START
199   PORT_START_TAG("IN0")
200200   PORT_BIT ( 0x01, IP_ACTIVE_HIGH, IPT_UNUSED )
201201   PORT_BIT ( 0x02, IP_ACTIVE_HIGH, IPT_UNUSED ) /* TIMER */
202202   PORT_BIT ( 0x04, IP_ACTIVE_LOW, IPT_TILT )
r2844r2845
206206   PORT_BIT ( 0x40, IP_ACTIVE_LOW, IPT_COIN1 )
207207   PORT_BIT ( 0x80, IP_ACTIVE_LOW, IPT_COIN2 )
208208
209   PORT_START
209   PORT_START_TAG("IN1")
210210   PORT_DIPNAME( 0x03, 0x01, "Number of Rounds" )
211211   PORT_DIPSETTING(    0x03, "1" )
212212   PORT_DIPSETTING(    0x02, "2" )
213213   PORT_DIPSETTING(    0x01, "3" )
214214   PORT_DIPSETTING(    0x00, "4" )
215215
216   PORT_START
216   PORT_START_TAG("IN2")
217217   PORT_DIPNAME( 0x03, 0x01, DEF_STR( Coinage ) )
218218   PORT_DIPSETTING(    0x00, DEF_STR( 2C_1C ) )
219219   PORT_DIPSETTING(    0x01, DEF_STR( 1C_1C ) )
220220   PORT_DIPSETTING(    0x02, DEF_STR( 1C_2C ) )
221221   PORT_DIPSETTING(    0x03, DEF_STR( Free_Play ) )
222222
223   PORT_START
223   PORT_START_TAG("STICK0_X")
224224   PORT_BIT ( 0xff, 0x80, IPT_AD_STICK_X ) PORT_MINMAX(0x20,0xe0) PORT_SENSITIVITY(30) PORT_KEYDELTA(16) PORT_REVERSE PORT_PLAYER(1)
225225
226   PORT_START
226   PORT_START_TAG("STICK0_Y")
227227   PORT_BIT ( 0xff, 0x80, IPT_AD_STICK_Y ) PORT_MINMAX(0x20,0xe0) PORT_SENSITIVITY(30) PORT_KEYDELTA(16) PORT_REVERSE PORT_PLAYER(1)
228228
229   PORT_START
229   PORT_START_TAG("PADDLE0")
230230   PORT_BIT( 0xff, 0x80, IPT_PADDLE ) PORT_MINMAX(0x20,0xe0) PORT_SENSITIVITY(30) PORT_KEYDELTA(16) PORT_CODE_DEC(KEYCODE_Z) PORT_CODE_INC(KEYCODE_X) PORT_CENTERDELTA(0) PORT_PLAYER(1)
231231
232   PORT_START
232   PORT_START_TAG("STICK1_X")
233233   PORT_BIT ( 0xff, 0x80, IPT_AD_STICK_X ) PORT_MINMAX(0x20,0xe0) PORT_SENSITIVITY(30) PORT_KEYDELTA(16) PORT_REVERSE PORT_PLAYER(2)
234234
235   PORT_START
235   PORT_START_TAG("STICK1_Y")
236236   PORT_BIT ( 0xff, 0x80, IPT_AD_STICK_Y ) PORT_MINMAX(0x20,0xe0) PORT_SENSITIVITY(30) PORT_KEYDELTA(16) PORT_REVERSE PORT_PLAYER(2)
237237
238   PORT_START
238   PORT_START_TAG("PADDLE1")
239239   PORT_BIT( 0xff, 0x80, IPT_PADDLE ) PORT_MINMAX(0x20,0xe0) PORT_SENSITIVITY(30) PORT_KEYDELTA(16) PORT_CODE_DEC(KEYCODE_Q) PORT_CODE_INC(KEYCODE_W) PORT_CENTERDELTA(0) PORT_PLAYER(2)
240240
241   PORT_START
241   PORT_START_TAG("IN3")
242242   PORT_DIPNAME( 0xff, 0x5C, "Round Time" ) /* actually a potentiometer */
243243   PORT_DIPSETTING(    0x3C, "15 seconds" )
244244   PORT_DIPSETTING(    0x5C, "30 seconds" )
src/mame/drivers/tmaster.c
r2844r2845
108108
109109/***************************************************************************
110110
111                                 General
112
113***************************************************************************/
114
115static struct
116{
117   const device_config *duart68681;
118} tmaster_devices;
119
120/***************************************************************************
121
111122                                   Sound
112123
113124***************************************************************************/
r2844r2845
134145
135146***************************************************************************/
136147
137static void duart_irq_handler(running_machine *machine, int vector)
148static void duart_irq_handler(const device_config *device, UINT8 vector)
138149{
139   cpunum_set_input_line_and_vector(machine, 0, 4, HOLD_LINE, vector);
150   cpunum_set_input_line_and_vector(device->machine, 0, 4, HOLD_LINE, vector);
140151};
141152
142static void duart_tx(int channel, UINT8 data)
153static void duart_tx(const device_config *device, int channel, UINT8 data)
143154{
144155   if ( channel == 0 )
145156   {
146      //logerror( "duart->microtouch: %02x %c\n", data, (char)data);
147157      microtouch_rx(1, &data);
148158   }
149159};
150160
151161static void microtouch_tx(UINT8 data)
152162{
153   //logerror( "microtouch->duart: %02x %c\n", data, (char)data);
154   duart_68681_rx_data(Machine, 0, data);
163   duart68681_rx_data(tmaster_devices.duart68681, 0, data);
155164}
156165
157166
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432441
433442   AM_RANGE( 0x300010, 0x300011 ) AM_READ( tmaster_coins_r )
434443
435   AM_RANGE( 0x300020, 0x30003f ) AM_READWRITE( duart_68681_r, duart_68681_w )
444   AM_RANGE( 0x300020, 0x30003f ) AM_DEVREADWRITE8( DUART68681, "duart68681", duart68681_r, duart68681_w, 0xff )
436445
437446   AM_RANGE( 0x300040, 0x300041 ) AM_WRITE( tmaster_oki_bank_w )
438447
r2844r2845
736745
737746static MACHINE_START( tmaster )
738747{
739   duart_68681_init(0, duart_irq_handler, duart_tx);
740748   microtouch_init(microtouch_tx, 0);
741749}
742750
751static MACHINE_RESET( tmaster )
752{
753   tmaster_devices.duart68681 = device_list_find_by_tag( machine->config->devicelist, DUART68681, "duart68681" );
754}
755
743756static INTERRUPT_GEN( tm3k_interrupt )
744757{
745758   switch (cpu_getiloops())
r2844r2845
750763   }
751764}
752765
766static const duart68681_config tmaster_duart68681_config =
767{
768   XTAL_8_664MHz / 2, //??
769   duart_irq_handler,
770   duart_tx,
771   NULL,
772   NULL
773};
774
753775static MACHINE_DRIVER_START( tm3k )
754776   MDRV_CPU_ADD_TAG("main", M68000, XTAL_24MHz / 2) /* 12MHz */
755777   MDRV_CPU_PROGRAM_MAP(tmaster_map,0)
756778   MDRV_CPU_VBLANK_INT_HACK(tm3k_interrupt,2+20) // ??
757779
758780   MDRV_MACHINE_START(tmaster)
781   MDRV_MACHINE_RESET(tmaster)
782
783   MDRV_DEVICE_ADD( "duart68681", DUART68681 )
784   MDRV_DEVICE_CONFIG( tmaster_duart68681_config )
785
759786   MDRV_NVRAM_HANDLER(generic_0fill)
760787
761788
src/mame/drivers/cischeat.c
r2844r2845
532532
533533READ16_HANDLER( scudhamm_analog_r )
534534{
535   return input_port_read_indexed(machine, 1);
535   return input_port_read(machine, "IN1");
536536}
537537
538538/*
r2844r2845
627627   int armdelta;
628628   static int armold = 0;
629629
630   armdelta = input_port_read_indexed(machine, 1) - armold;
631   armold = input_port_read_indexed(machine, 1);
630   armdelta = input_port_read(machine, "IN1") - armold;
631   armold = input_port_read(machine, "IN1");
632632
633633   return ~( scudhamm_motor_command + armdelta );   // + x : x<=0 and player loses, x>0 and player wins
634634}
635635
636636static READ16_HANDLER( armchmp2_buttons_r )
637637{
638   int arm_x = input_port_read_indexed(machine, 1);
638   int arm_x = input_port_read(machine, "IN1");
639639
640   UINT16 ret = input_port_read_indexed(machine, 0);
640   UINT16 ret = input_port_read(machine, "IN0");
641641
642642   if (arm_x < 0x40)      ret &= ~1;
643643   else if (arm_x > 0xc0)   ret &= ~2;
r2844r2845
11231123//                  [4] DSW 1 & 2   [5] DSW 3       [6] Driving Wheel
11241124
11251125static INPUT_PORTS_START( cischeat )
1126   PORT_START_TAG("IN0")   // Fake input port - Buttons status
1126   PORT_START_TAG("FAKE")   // Fake input port - Buttons status
11271127   PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_BUTTON3 ) PORT_NAME("P1 Low Gear")\
11281128   PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_BUTTON4 ) PORT_NAME("P1 High Gear")\
11291129
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12101210   PORT_BIT(  0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
12111211   PORT_BIT(  0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
12121212
1213   PORT_START   // IN6 - Driving Wheel - $80010.w(0)
1213   PORT_START_TAG("IN6")   // IN6 - Driving Wheel - $80010.w(0)
12141214   PORT_BIT( 0xff, 0x80, IPT_PADDLE ) PORT_SENSITIVITY(30) PORT_KEYDELTA(30)
12151215INPUT_PORTS_END
12161216
r2844r2845
12251225//                  [6] Coinage JP&USA  [7] Coinage UK&FR
12261226
12271227static INPUT_PORTS_START( f1gpstar )
1228   PORT_START_TAG("IN0")   // Fake input port - Buttons status
1228   PORT_START_TAG("FAKE")   // Fake input port - Buttons status
12291229    PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_BUTTON1 ) PORT_NAME("P1 Accelerator")\
12301230   PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_BUTTON3 ) PORT_NAME("P1 Low Gear")\
12311231   PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_BUTTON4 ) PORT_NAME("P1 High Gear")\
src/mame/drivers/galaxold.c
r2844r2845
356356#include "sound/dac.h"
357357#include "sound/flt_rc.h"
358358#include "includes/cclimber.h"
359#include "includes/galaxian.h"
359360
360361
361362/*************************************
r2844r2845
32573258GAME( 1982, dkongjrm, dkongjr,  dkongjrm, dkongjrm, 0,        ROT90,  "bootleg", "Donkey Kong Jr. (Moon Cresta hardware)", GAME_WRONG_COLORS | GAME_IMPERFECT_SOUND | GAME_SUPPORTS_SAVE )
32583259GAME( 1981, rockclim, 0,        rockclim, rockclim, 0,         ROT180, "Taito", "Rock Climber", GAME_SUPPORTS_SAVE )
32593260GAME( 1983, ozon1,    0,        ozon1,    ozon1,    0,         ROT90,  "Proma", "Ozon I", GAME_SUPPORTS_SAVE )
3260GAME( 1983, ladybugg, ladybug,  batman2,  ladybugg, ladybugg, ROT270, "bootleg", "Ladybug (bootleg on Galaxian hardware)", GAME_SUPPORTS_SAVE )
3261GAME( 1983, ladybugg, ladybug,  batman2,  ladybugg, ladybugg, ROT270, "bootleg", "Lady Bug (bootleg on Galaxian hardware)", GAME_SUPPORTS_SAVE )
32613262GAME( 1980, vpool,    hustler,  mooncrst, vpool,    0,        ROT90,  "bootleg", "Video Pool (bootleg on Moon Cresta hardware)", GAME_SUPPORTS_SAVE )
32623263GAME( 1984, drivfrcg, drivfrcp, drivfrcg, drivfrcg, 0,        ROT90,  "Shinkai Inc. (Magic Eletronics USA licence)", "Driving Force (Galaxian conversion)", GAME_SUPPORTS_SAVE )
32633264GAME( 1985, drivfrcb, drivfrcp, drivfrcg, drivfrcg, 0,        ROT90,  "bootleg", "Driving Force (Galaxian conversion bootleg)", GAME_SUPPORTS_SAVE )
src/mame/drivers/centiped.c
r2844r2845
509509INLINE int read_trackball(running_machine *machine, int idx, int switch_port)
510510{
511511   UINT8 newpos;
512   static const char *portnames[] = { "IN0", "IN1", "IN2" };
513   static const char *tracknames[] = { "TRACK0_X", "TRACK0_Y", "TRACK1_X", "TRACK1_Y" };
512514
513515   /* adjust idx if we're cocktail flipped */
514516   if (centiped_flipscreen)
r2844r2845
516518
517519   /* if we're to read the dipswitches behind the trackball data, do it now */
518520   if (dsw_select)
519      return (input_port_read_indexed(machine, switch_port) & 0x7f) | sign[idx];
521      return (input_port_read(machine, portnames[switch_port]) & 0x7f) | sign[idx];
520522
521523   /* get the new position and adjust the result */
522   newpos = input_port_read_indexed(machine, 6 + idx);
524   newpos = input_port_read(machine, tracknames[idx]);
523525   if (newpos != oldpos[idx])
524526   {
525527      sign[idx] = (newpos - oldpos[idx]) & 0x80;
r2844r2845
527529   }
528530
529531   /* blend with the bits from the switch port */
530   return (input_port_read_indexed(machine, switch_port) & 0x70) | (oldpos[idx] & 0x0f) | sign[idx];
532   return (input_port_read(machine, portnames[switch_port]) & 0x70) | (oldpos[idx] & 0x0f) | sign[idx];
531533}
532534
533535
r2844r2845
550552
551553static READ8_HANDLER( milliped_IN2_r )
552554{
553   UINT8 data = input_port_read_indexed(machine, 2);
555   UINT8 data = input_port_read(machine, "IN2");
554556
555557   /* MSH - 15 Feb, 2007
556558     * The P2 X Joystick inputs are not properly handled in
r2844r2845
561563     */
562564   if (0 != control_select) {
563565      /* Bottom 4 bits is our joystick inputs */
564      UINT8 joy2data = input_port_read_indexed(machine, 3) & 0x0f;
566      UINT8 joy2data = input_port_read(machine, "IN3") & 0x0f;
565567      data = data & 0xf0; /* Keep the top 4 bits */
566568      data |= (joy2data & 0x0a) >> 1; /* flip left and up */
567569      data |= (joy2data & 0x05) << 1; /* flip right and down */
r2844r2845
583585
584586static READ8_HANDLER( mazeinv_input_r )
585587{
586   return input_port_read_indexed(machine, 6 + control_select);
588   static const char *sticknames[] = { "STICK0", "STICK1", "STICK2", "STICK3" };
589
590   return input_port_read(machine, sticknames[control_select]);
587591}
588592
589593
r2844r2845
669673   AM_RANGE(0x0000, 0x03ff) AM_RAM AM_BASE(&rambase)
670674   AM_RANGE(0x0400, 0x07bf) AM_RAM_WRITE(centiped_videoram_w) AM_BASE(&videoram)
671675   AM_RANGE(0x07c0, 0x07ff) AM_RAM AM_BASE(&spriteram)
672   AM_RANGE(0x0800, 0x0800) AM_READ(input_port_4_r)   /* DSW1 */
673   AM_RANGE(0x0801, 0x0801) AM_READ(input_port_5_r)   /* DSW2 */
676   AM_RANGE(0x0800, 0x0800) AM_READ_PORT("DSW1")      /* DSW1 */
677   AM_RANGE(0x0801, 0x0801) AM_READ_PORT("DSW2")      /* DSW2 */
674678   AM_RANGE(0x0c00, 0x0c00) AM_READ(centiped_IN0_r)   /* IN0 */
675   AM_RANGE(0x0c01, 0x0c01) AM_READ(input_port_1_r)   /* IN1 */
679   AM_RANGE(0x0c01, 0x0c01) AM_READ_PORT("IN1")      /* IN1 */
676680   AM_RANGE(0x0c02, 0x0c02) AM_READ(centiped_IN2_r)   /* IN2 */
677   AM_RANGE(0x0c03, 0x0c03) AM_READ(input_port_3_r)   /* IN3 */
681   AM_RANGE(0x0c03, 0x0c03) AM_READ_PORT("IN3")      /* IN3 */
678682   AM_RANGE(0x1000, 0x100f) AM_READWRITE(pokey1_r, pokey1_w)
679683   AM_RANGE(0x1400, 0x140f) AM_WRITE(centiped_paletteram_w) AM_BASE(&paletteram)
680684   AM_RANGE(0x1600, 0x163f) AM_WRITE(atari_vg_earom_w)
r2844r2845
694698   AM_RANGE(0x0000, 0x03ff) AM_MIRROR(0x4000) AM_RAM
695699   AM_RANGE(0x0400, 0x07bf) AM_MIRROR(0x4000) AM_RAM_WRITE(centiped_videoram_w) AM_BASE(&videoram)
696700   AM_RANGE(0x07c0, 0x07ff) AM_MIRROR(0x4000) AM_RAM AM_BASE(&spriteram)
697   AM_RANGE(0x0800, 0x0800) AM_MIRROR(0x4000) AM_READ(input_port_4_r)   /* DSW1 */
698   AM_RANGE(0x0801, 0x0801) AM_MIRROR(0x4000) AM_READ(input_port_5_r)   /* DSW2 */
701   AM_RANGE(0x0800, 0x0800) AM_MIRROR(0x4000) AM_READ_PORT("DSW1")      /* DSW1 */
702   AM_RANGE(0x0801, 0x0801) AM_MIRROR(0x4000) AM_READ_PORT("DSW2")      /* DSW2 */
699703   AM_RANGE(0x0c00, 0x0c00) AM_MIRROR(0x4000) AM_READ(centiped_IN0_r)   /* IN0 */
700   AM_RANGE(0x0c01, 0x0c01) AM_MIRROR(0x4000) AM_READ(input_port_1_r)   /* IN1 */
704   AM_RANGE(0x0c01, 0x0c01) AM_MIRROR(0x4000) AM_READ_PORT("IN1")      /* IN1 */
701705   AM_RANGE(0x0c02, 0x0c02) AM_MIRROR(0x4000) AM_READ(centiped_IN2_r)   /* IN2 */
702   AM_RANGE(0x0c03, 0x0c03) AM_MIRROR(0x4000) AM_READ(input_port_3_r)   /* IN3 */
706   AM_RANGE(0x0c03, 0x0c03) AM_MIRROR(0x4000) AM_READ_PORT("IN3")      /* IN3 */
703707   AM_RANGE(0x1000, 0x1000) AM_MIRROR(0x4000) AM_WRITE(AY8910_write_port_0_w)
704708   AM_RANGE(0x1001, 0x1001) AM_MIRROR(0x4000) AM_READWRITE(AY8910_read_port_0_r, AY8910_control_port_0_w)
705709   AM_RANGE(0x1400, 0x140f) AM_MIRROR(0x4000) AM_WRITE(centiped_paletteram_w) AM_BASE(&paletteram)
r2844r2845
733737   AM_RANGE(0x2000, 0x2000) AM_READ(centiped_IN0_r)
734738   AM_RANGE(0x2001, 0x2001) AM_READ(milliped_IN1_r)
735739   AM_RANGE(0x2010, 0x2010) AM_READ(milliped_IN2_r)
736   AM_RANGE(0x2011, 0x2011) AM_READ(input_port_3_r)
740   AM_RANGE(0x2011, 0x2011) AM_READ_PORT("IN3")
737741   AM_RANGE(0x2030, 0x2030) AM_READ(atari_vg_earom_r)
738742   AM_RANGE(0x2480, 0x249f) AM_WRITE(milliped_paletteram_w) AM_BASE(&paletteram)
739743   AM_RANGE(0x2500, 0x2502) AM_WRITE(coin_count_w)
r2844r2845
761765   AM_RANGE(0x0000, 0x03ff) AM_RAM
762766   AM_RANGE(0x0400, 0x07bf) AM_RAM_WRITE(centiped_videoram_w) AM_BASE(&videoram)
763767   AM_RANGE(0x07c0, 0x07ff) AM_RAM AM_BASE(&spriteram)
764   AM_RANGE(0x0800, 0x0800) AM_READ(input_port_2_r) /* DSW1 */
765   AM_RANGE(0x0801, 0x0801) AM_READ(input_port_3_r) /* DSW2 */
766   AM_RANGE(0x0c00, 0x0c00) AM_READ(input_port_0_r) /* IN0 */
767   AM_RANGE(0x0c01, 0x0c01) AM_READ(input_port_1_r) /* IN1 */
768   AM_RANGE(0x0800, 0x0800) AM_READ_PORT("DSW1")   /* DSW1 */
769   AM_RANGE(0x0801, 0x0801) AM_READ_PORT("DSW2")   /* DSW2 */
770   AM_RANGE(0x0c00, 0x0c00) AM_READ_PORT("IN0")   /* IN0 */
771   AM_RANGE(0x0c01, 0x0c01) AM_READ_PORT("IN1")   /* IN1 */
768772   AM_RANGE(0x1000, 0x100f) AM_READWRITE(pokey1_r, pokey1_w)
769773   AM_RANGE(0x1800, 0x1800) AM_WRITE(irq_ack_w)
770774   AM_RANGE(0x1c00, 0x1c02) AM_WRITE(coin_count_w)
r2844r2845
788792   AM_RANGE(0x0800, 0x080f) AM_READWRITE(pokey2_r, pokey2_w)
789793   AM_RANGE(0x1000, 0x13bf) AM_RAM_WRITE(centiped_videoram_w) AM_BASE(&videoram)
790794   AM_RANGE(0x13c0, 0x13ff) AM_RAM AM_BASE(&spriteram)
791   AM_RANGE(0x2000, 0x2000) AM_READ(input_port_0_r)
792   AM_RANGE(0x2001, 0x2001) AM_READ(input_port_1_r)
793   AM_RANGE(0x2010, 0x2010) AM_READ(input_port_2_r)
794   AM_RANGE(0x2011, 0x2011) AM_READ(input_port_3_r)
795   AM_RANGE(0x2000, 0x2000) AM_READ_PORT("IN0")
796   AM_RANGE(0x2001, 0x2001) AM_READ_PORT("IN1")
797   AM_RANGE(0x2010, 0x2010) AM_READ_PORT("IN2")
798   AM_RANGE(0x2011, 0x2011) AM_READ_PORT("IN3")
795799   AM_RANGE(0x2020, 0x2020) AM_READ(mazeinv_input_r)
796800   AM_RANGE(0x2030, 0x2030) AM_READ(atari_vg_earom_r)
797801   AM_RANGE(0x2480, 0x249f) AM_WRITE(mazeinv_paletteram_w) AM_BASE(&paletteram)
r2844r2845
817821
818822static ADDRESS_MAP_START( bullsdrt_map, ADDRESS_SPACE_PROGRAM, 8 )
819823   AM_RANGE(0x0000, 0x0fff) AM_ROM
820   AM_RANGE(0x1000, 0x1000) AM_MIRROR(0x6000) AM_READ(input_port_3_r)
824   AM_RANGE(0x1000, 0x1000) AM_MIRROR(0x6000) AM_READ_PORT("DSW1")
821825   AM_RANGE(0x1080, 0x1080) AM_MIRROR(0x6000) AM_READ(centiped_IN0_r)
822   AM_RANGE(0x1081, 0x1081) AM_MIRROR(0x6000) AM_READ(input_port_1_r)
826   AM_RANGE(0x1081, 0x1081) AM_MIRROR(0x6000) AM_READ_PORT("IN1")
823827   AM_RANGE(0x1082, 0x1082) AM_MIRROR(0x6000) AM_READ(centiped_IN2_r)
824828   AM_RANGE(0x1200, 0x123f) AM_MIRROR(0x6000) AM_READWRITE(atari_vg_earom_r, atari_vg_earom_w)
825829   AM_RANGE(0x1280, 0x1280) AM_MIRROR(0x6000) AM_WRITE(atari_vg_earom_ctrl_w)
826   AM_RANGE(0x1300, 0x1300) AM_MIRROR(0x6000) AM_READ(input_port_4_r)
830   AM_RANGE(0x1300, 0x1300) AM_MIRROR(0x6000) AM_READ_PORT("DSW2")
827831   AM_RANGE(0x1400, 0x140f) AM_MIRROR(0x6000) AM_WRITE(centiped_paletteram_w) AM_BASE(&paletteram)
828832   AM_RANGE(0x1481, 0x1481) AM_MIRROR(0x6000) AM_WRITE(bullsdrt_coin_count_w)
829833   AM_RANGE(0x1483, 0x1484) AM_MIRROR(0x6000) AM_WRITE(led_w)
r2844r2845
858862#define PORTS(GAMENAME, FOURTH_LANGUAGE)                              \
859863                                                            \
860864static INPUT_PORTS_START( GAMENAME )                                       \
861   PORT_START   /* IN0 */                                          \
865   PORT_START_TAG("IN0")   /* IN0 */                                          \
862866   PORT_BIT( 0x0f, IP_ACTIVE_HIGH, IPT_SPECIAL )   /* trackball data */      \
863867   PORT_DIPNAME( 0x10, 0x00, DEF_STR( Cabinet ))                        \
864868   PORT_DIPSETTING(    0x00, DEF_STR( Upright ))                        \
r2844r2845
867871   PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_VBLANK )                        \
868872   PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_SPECIAL )   /* trackball sign bit */   \
869873                                                            \
870   PORT_START   /* IN1 */                                          \
874   PORT_START_TAG("IN1")   /* IN1 */                                          \
871875   PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_START1 )                           \
872876   PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_START2 )                           \
873877   PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_BUTTON1 )                        \
r2844r2845
877881   PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_COIN2 )                           \
878882   PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_SERVICE1 )                        \
879883                                                            \
880   PORT_START   /* IN2 */                                          \
884   PORT_START_TAG("IN2")   /* IN2 */                                          \
881885   PORT_BIT( 0x0f, IP_ACTIVE_HIGH, IPT_SPECIAL )   /* trackball data */      \
882886   PORT_BIT( 0x70, IP_ACTIVE_HIGH, IPT_UNKNOWN )                        \
883887   PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_SPECIAL )   /* trackball sign bit */   \
884888                                                            \
885   PORT_START   /* IN3 */                                          \
889   PORT_START_TAG("IN3")   /* IN3 */                                          \
886890   PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_8WAY PORT_COCKTAIL   \
887891   PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_8WAY PORT_COCKTAIL   \
888892   PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_8WAY PORT_COCKTAIL   \
r2844r2845
892896   PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_8WAY            \
893897   PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_8WAY            \
894898                                                            \
895   PORT_START   /* IN4 */                                          \
899   PORT_START_TAG("DSW1")   /* IN4 */                                          \
896900   PORT_DIPNAME( 0x03, 0x00, DEF_STR( Language ) )   PORT_DIPLOCATION("N9:1,2")   \
897901   PORT_DIPSETTING(    0x00, DEF_STR( English ) )                        \
898902   PORT_DIPSETTING(    0x01, DEF_STR( German ) )                        \
r2844r2845
915919   PORT_DIPSETTING(    0x00, "1" )                                    \
916920   PORT_DIPSETTING(    0x80, "2" )                                    \
917921                                                            \
918   PORT_START   /* IN5 */                                          \
922   PORT_START_TAG("DSW2")   /* IN5 */                                          \
919923   PORT_DIPNAME( 0x03, 0x02, DEF_STR( Coinage )) PORT_DIPLOCATION("N8:1,2")   \
920924   PORT_DIPSETTING(    0x03, DEF_STR( 2C_1C ))                           \
921925   PORT_DIPSETTING(    0x02, DEF_STR( 1C_1C ))                           \
r2844r2845
937941   PORT_DIPSETTING(    0x80, "6 credits/5 coins" )                        \
938942   PORT_DIPSETTING(    0xa0, "4 credits/3 coins" )                        \
939943                                                            \
940   PORT_START   /* IN6, fake trackball input port. */                     \
944   PORT_START_TAG("TRACK0_X")   /* IN6, fake trackball input port. */                     \
941945   PORT_BIT( 0xff, 0x00, IPT_TRACKBALL_X ) PORT_SENSITIVITY(50) PORT_KEYDELTA(10) PORT_REVERSE   \
942946                                                            \
943   PORT_START   /* IN7, fake trackball input port. */                     \
947   PORT_START_TAG("TRACK0_Y")   /* IN7, fake trackball input port. */                     \
944948   PORT_BIT( 0xff, 0x00, IPT_TRACKBALL_Y ) PORT_SENSITIVITY(50) PORT_KEYDELTA(10) \
945949                                                            \
946   PORT_START   /* IN8, fake trackball input port. */                     \
950   PORT_START_TAG("TRACK1_X")   /* IN8, fake trackball input port. */                     \
947951   PORT_BIT( 0xff, 0x00, IPT_TRACKBALL_X ) PORT_SENSITIVITY(50) PORT_KEYDELTA(10) PORT_COCKTAIL   \
948952                                                            \
949   PORT_START   /* IN9, fake trackball input port. */                     \
953   PORT_START_TAG("TRACK1_Y")   /* IN9, fake trackball input port. */                     \
950954   PORT_BIT( 0xff, 0x00, IPT_TRACKBALL_Y ) PORT_SENSITIVITY(50) PORT_KEYDELTA(10) PORT_REVERSE PORT_COCKTAIL   \
951955INPUT_PORTS_END
952956
r2844r2845
955959
956960
957961static INPUT_PORTS_START( centtime )
958   PORT_START   /* IN0 */
962   PORT_START_TAG("IN0")   /* IN0 */
959963   PORT_BIT( 0x0f, IP_ACTIVE_HIGH, IPT_SPECIAL )   /* trackball data */
960964   PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNUSED )
961965   PORT_SERVICE( 0x20, IP_ACTIVE_LOW )
962966   PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_VBLANK )
963967   PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_SPECIAL )   /* trackball sign bit */
964968
965   PORT_START   /* IN1 */
969   PORT_START_TAG("IN1")   /* IN1 */
966970   PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_START1 )
967971   PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNUSED )
968972   PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_BUTTON1 )
r2844r2845
972976   PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_COIN2 )
973977   PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_SERVICE1 )
974978
975   PORT_START   /* IN2 */
979   PORT_START_TAG("IN2")   /* IN2 */
976980   PORT_BIT( 0x0f, IP_ACTIVE_HIGH, IPT_SPECIAL )   /* trackball data */
977981   PORT_BIT( 0x70, IP_ACTIVE_HIGH, IPT_UNKNOWN )
978982   PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_SPECIAL )   /* trackball sign bit */
979983
980   PORT_START   /* IN3 */
984   PORT_START_TAG("IN3")   /* IN3 */
981985   PORT_BIT( 0x0f, IP_ACTIVE_LOW, IPT_UNUSED )
982986   PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_8WAY
983987   PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_8WAY
984988   PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_8WAY
985989   PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_8WAY
986990
987   PORT_START   /* IN4 */
991   PORT_START_TAG("DSW1")   /* IN4 */
988992   PORT_DIPNAME( 0x03, 0x00, DEF_STR( Language ) ) PORT_DIPLOCATION("SW1:1,2")
989993   PORT_DIPSETTING(    0x00, DEF_STR( English ) )
990994   PORT_DIPSETTING(    0x01, DEF_STR( German ) )
r2844r2845
10071011   PORT_DIPSETTING(    0x00, "1" )
10081012   PORT_DIPSETTING(    0x80, "2" )
10091013
1010   PORT_START   /* IN5 */
1014   PORT_START_TAG("DSW2")   /* IN5 */
10111015   PORT_DIPNAME( 0x03, 0x02, DEF_STR( Coinage )) PORT_DIPLOCATION("SW2:1,2")
10121016   PORT_DIPSETTING(    0x03, DEF_STR( 2C_1C ))
10131017   PORT_DIPSETTING(    0x02, DEF_STR( 1C_1C ))
r2844r2845
10301034   PORT_DIPSETTING(    0x80, "6 credits/5 coins" )
10311035   PORT_DIPSETTING(    0xa0, "4 credits/3 coins" )
10321036
1033   PORT_START   /* IN6, fake trackball input port. */
1037   PORT_START_TAG("TRACK0_X")   /* IN6, fake trackball input port. */
10341038   PORT_BIT( 0xff, 0x00, IPT_TRACKBALL_X ) PORT_SENSITIVITY(50) PORT_KEYDELTA(10) PORT_REVERSE
10351039
1036   PORT_START   /* IN7, fake trackball input port. */
1040   PORT_START_TAG("TRACK0_Y")   /* IN7, fake trackball input port. */
10371041   PORT_BIT( 0xff, 0x00, IPT_TRACKBALL_Y ) PORT_SENSITIVITY(50) PORT_KEYDELTA(10)
10381042
1039   PORT_START   /* IN8, place for cocktail trackball (not used) */
1043   PORT_START_TAG("TRACK1_X")   /* IN8, place for cocktail trackball (not used) */
10401044   PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED )
10411045
1042   PORT_START   /* IN9, place for cocktail trackball (not used) */
1046   PORT_START_TAG("TRACK1_Y")   /* IN9, place for cocktail trackball (not used) */
10431047   PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED )
10441048INPUT_PORTS_END
10451049
10461050
10471051static INPUT_PORTS_START( magworm )
1048   PORT_START   /* IN0 */
1052   PORT_START_TAG("IN0")   /* IN0 */
10491053   PORT_BIT( 0x0f, IP_ACTIVE_HIGH, IPT_SPECIAL )   /* trackball data */
10501054   PORT_DIPNAME( 0x10, 0x00, DEF_STR( Cabinet ))
10511055   PORT_DIPSETTING(    0x00, DEF_STR( Upright ))
r2844r2845
10541058   PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_VBLANK )
10551059   PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_SPECIAL )   /* trackball sign bit */
10561060
1057   PORT_START   /* IN1 */
1061   PORT_START_TAG("IN1")   /* IN1 */
10581062   PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_START1 )
10591063   PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_START2 )
10601064   PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_BUTTON1 )
r2844r2845
10641068   PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_COIN1 )
10651069   PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_SERVICE1 )
10661070
1067   PORT_START   /* IN2 */
1071   PORT_START_TAG("IN2")   /* IN2 */
10681072   PORT_BIT( 0x0f, IP_ACTIVE_HIGH, IPT_SPECIAL )   /* trackball data */
10691073   PORT_BIT( 0x70, IP_ACTIVE_HIGH, IPT_UNKNOWN )
10701074   PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_SPECIAL )   /* trackball sign bit */
10711075
1072   PORT_START   /* IN3 */
1076   PORT_START_TAG("IN3")   /* IN3 */
10731077   PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNKNOWN )
10741078
1075   PORT_START   /* IN4 */
1079   PORT_START_TAG("DSW1")   /* IN4 */
10761080   PORT_DIPNAME( 0x03, 0x02, DEF_STR( Coinage )) PORT_DIPLOCATION("SW1:1,2")
10771081   PORT_DIPSETTING(    0x03, DEF_STR( 2C_1C ))
10781082   PORT_DIPSETTING(    0x02, DEF_STR( 1C_1C ))
r2844r2845
10941098   PORT_DIPSETTING(    0x80, "4" )
10951099   PORT_DIPSETTING(    0xc0, "5" )
10961100
1097   PORT_START   /* IN5 */
1101   PORT_START_TAG("DSW2")   /* IN5 */
10981102   PORT_DIPNAME( 0x01, 0x00, "Left Coin" ) PORT_DIPLOCATION("SW2:1")
10991103   PORT_DIPSETTING(    0x00, "*1" )
11001104   PORT_DIPSETTING(    0x01, "*2" )
r2844r2845
11171121   PORT_DIPSETTING(    0x00, "1" )
11181122   PORT_DIPSETTING(    0x80, "2" )
11191123
1120   PORT_START   /* IN6, fake trackball input port. */
1124   PORT_START_TAG("TRACK0_X")   /* IN6, fake trackball input port. */
11211125   PORT_BIT( 0xff, 0x00, IPT_TRACKBALL_X ) PORT_SENSITIVITY(50) PORT_KEYDELTA(10) PORT_REVERSE
11221126
1123   PORT_START   /* IN7, fake trackball input port. */
1127   PORT_START_TAG("TRACK0_Y")   /* IN7, fake trackball input port. */
11241128   PORT_BIT( 0xff, 0x00, IPT_TRACKBALL_Y ) PORT_SENSITIVITY(50) PORT_KEYDELTA(10)
11251129
1126   PORT_START   /* IN8, fake trackball input port. */
1130   PORT_START_TAG("TRACK1_X")   /* IN8, fake trackball input port. */
11271131   PORT_BIT( 0xff, 0x00, IPT_TRACKBALL_X ) PORT_SENSITIVITY(50) PORT_KEYDELTA(10) PORT_COCKTAIL
11281132
1129   PORT_START   /* IN9, fake trackball input port. */
1133   PORT_START_TAG("TRACK1_Y")   /* IN9, fake trackball input port. */
11301134   PORT_BIT( 0xff, 0x00, IPT_TRACKBALL_Y ) PORT_SENSITIVITY(50) PORT_KEYDELTA(10) PORT_REVERSE PORT_COCKTAIL
11311135INPUT_PORTS_END
11321136
11331137
11341138static INPUT_PORTS_START( milliped )
1135   PORT_START   /* IN0 $2000 */ /* see port 6 for x trackball */
1139   PORT_START_TAG("IN0")   /* IN0 $2000 */ /* see port 6 for x trackball */
11361140   PORT_DIPNAME(0x03, 0x00, DEF_STR( Language ) ) PORT_DIPLOCATION("P8:1,2")
11371141   PORT_DIPSETTING(   0x00, DEF_STR( English ) )
11381142   PORT_DIPSETTING(   0x01, DEF_STR( German ) )
r2844r2845
11481152   PORT_BIT ( 0x40, IP_ACTIVE_HIGH, IPT_VBLANK )
11491153   PORT_BIT ( 0x80, IP_ACTIVE_HIGH, IPT_SPECIAL )   /* trackball sign bit */
11501154
1151   PORT_START   /* IN1 $2001 */ /* see port 7 for y trackball */
1155   PORT_START_TAG("IN1")   /* IN1 $2001 */ /* see port 7 for y trackball */
11521156   /* these bits are unused */
11531157   PORT_BIT ( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN )
11541158   PORT_BIT ( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN )
r2844r2845
11631167   PORT_BIT ( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
11641168   PORT_BIT ( 0x80, IP_ACTIVE_HIGH, IPT_SPECIAL )   /* trackball sign bit */
11651169
1166   PORT_START   /* IN2 $2010 */
1170   PORT_START_TAG("IN2")   /* IN2 $2010 */
11671171   PORT_BIT ( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_8WAY
11681172   PORT_BIT ( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_8WAY
11691173   PORT_BIT ( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_8WAY
r2844r2845
11731177   PORT_BIT ( 0x40, IP_ACTIVE_LOW, IPT_COIN2 )
11741178   PORT_BIT ( 0x80, IP_ACTIVE_LOW, IPT_SERVICE1 )
11751179
1176   PORT_START   /* IN3 $2011 */
1180   PORT_START_TAG("IN3")   /* IN3 $2011 */
11771181   /* Note, joystick X input for player 2 are bad in software */
11781182   PORT_BIT ( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_8WAY PORT_COCKTAIL
11791183   PORT_BIT ( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_8WAY PORT_COCKTAIL
r2844r2845
11861190   PORT_BIT ( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
11871191   PORT_SERVICE( 0x80, IP_ACTIVE_LOW )
11881192
1189   PORT_START   /* 4 */ /* DSW1 $0408 */
1193   PORT_START_TAG("DSW1")   /* 4 */ /* DSW1 $0408 */
11901194   PORT_DIPNAME(0x01, 0x00, "Millipede Head" ) PORT_DIPLOCATION("D5:1")
11911195   PORT_DIPSETTING(   0x00, DEF_STR( Easy ) )
11921196   PORT_DIPSETTING(   0x01, DEF_STR( Hard ) )
r2844r2845
12101214   PORT_DIPSETTING(   0x80, DEF_STR( Off ))
12111215   PORT_DIPSETTING(   0x00, DEF_STR( On ))
12121216
1213   PORT_START   /* 5 */ /* DSW2 $0808 */
1217   PORT_START_TAG("DSW2")   /* 5 */ /* DSW2 $0808 */
12141218   PORT_DIPNAME(0x03, 0x02, DEF_STR( Coinage )) PORT_DIPLOCATION("B5:1,2")
12151219   PORT_DIPSETTING(   0x03, DEF_STR( 2C_1C ))
12161220   PORT_DIPSETTING(   0x02, DEF_STR( 1C_1C ))
r2844r2845
12331237   PORT_DIPSETTING(   0xa0, "4 credits/3 coins" )
12341238   PORT_DIPSETTING(   0xc0, "Demo Mode" )
12351239
1236   PORT_START   /* IN6, fake trackball input port. */
1240   PORT_START_TAG("TRACK0_X")   /* IN6, fake trackball input port. */
12371241   PORT_BIT( 0xff, 0x00, IPT_TRACKBALL_X ) PORT_SENSITIVITY(50) PORT_KEYDELTA(10) PORT_REVERSE
12381242
1239   PORT_START   /* IN7, fake trackball input port. */
1243   PORT_START_TAG("TRACK0_Y")   /* IN7, fake trackball input port. */
12401244   PORT_BIT( 0xff, 0x00, IPT_TRACKBALL_Y ) PORT_SENSITIVITY(50) PORT_KEYDELTA(10)
12411245
1242   PORT_START   /* IN8, fake trackball input port. */
1246   PORT_START_TAG("TRACK1_X")   /* IN8, fake trackball input port. */
12431247   PORT_BIT( 0xff, 0x00, IPT_TRACKBALL_X ) PORT_SENSITIVITY(50) PORT_KEYDELTA(10) PORT_COCKTAIL
12441248
1245   PORT_START   /* IN9, fake trackball input port. */
1249   PORT_START_TAG("TRACK1_Y")   /* IN9, fake trackball input port. */
12461250   PORT_BIT( 0xff, 0x00, IPT_TRACKBALL_Y ) PORT_SENSITIVITY(50) PORT_KEYDELTA(10) PORT_REVERSE PORT_COCKTAIL
12471251INPUT_PORTS_END
12481252
12491253
12501254static INPUT_PORTS_START( warlords )
1251   PORT_START   /* IN0 */
1255   PORT_START_TAG("IN0")   /* IN0 */
12521256   PORT_BIT( 0x0f, IP_ACTIVE_HIGH, IPT_UNUSED )
12531257   PORT_DIPNAME( 0x10, 0x00, "Diag Step" )  /* Not referenced */
12541258   PORT_DIPSETTING(    0x00, DEF_STR( Off ))
r2844r2845
12591263   PORT_DIPSETTING(    0x80, "Upright (overlay)" )
12601264   PORT_DIPSETTING(    0x00, "Cocktail (no overlay)" )
12611265
1262   PORT_START   /* IN1 */
1266   PORT_START_TAG("IN1")   /* IN1 */
12631267   PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(1)
12641268   PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(2)
12651269   PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(3)
r2844r2845
12691273   PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_COIN2 )
12701274   PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_SERVICE1 )
12711275
1272   PORT_START   /* IN2 */
1276   PORT_START_TAG("DSW1")   /* IN2 */
12731277   PORT_DIPNAME( 0x03, 0x00, DEF_STR( Language ) ) PORT_DIPLOCATION("J2:1,2")
12741278   PORT_DIPSETTING(    0x00, DEF_STR( English ) )
12751279   PORT_DIPSETTING(    0x01, DEF_STR( French ) )
r2844r2845
12841288   PORT_DIPSETTING(    0x10, "1p = 1, 2p = 2" )
12851289   PORT_DIPSETTING(    0x20, "1p/2p = 2 credits" )
12861290
1287   PORT_START   /* IN3 */
1291   PORT_START_TAG("DSW2")   /* IN3 */
12881292   PORT_DIPNAME( 0x03, 0x02, DEF_STR( Coinage )) PORT_DIPLOCATION("M2:1,2")
12891293   PORT_DIPSETTING(    0x03, DEF_STR( 2C_1C ))
12901294   PORT_DIPSETTING(    0x02, DEF_STR( 1C_1C ))
r2844r2845
13061310   PORT_DIPSETTING(    0x80, "6 credits/5 coins" )
13071311
13081312   /* IN4-7 fake to control player paddles */
1309   PORT_START
1313   PORT_START_TAG("PADDLE0")
13101314   PORT_BIT( 0xff, 0x80, IPT_PADDLE ) PORT_MINMAX(0x1d,0xcb) PORT_SENSITIVITY(50) PORT_KEYDELTA(10) PORT_CENTERDELTA(0) PORT_PLAYER(1)
13111315
1312   PORT_START
1316   PORT_START_TAG("PADDLE1")
13131317   PORT_BIT( 0xff, 0x80, IPT_PADDLE ) PORT_MINMAX(0x1d,0xcb) PORT_SENSITIVITY(50) PORT_KEYDELTA(10) PORT_CENTERDELTA(0) PORT_PLAYER(2)
13141318
1315   PORT_START
1319   PORT_START_TAG("PADDLE2")
13161320   PORT_BIT( 0xff, 0x80, IPT_PADDLE ) PORT_MINMAX(0x1d,0xcb) PORT_SENSITIVITY(50) PORT_KEYDELTA(10) PORT_CENTERDELTA(0) PORT_PLAYER(3)
13171321
1318   PORT_START
1322   PORT_START_TAG("PADDLE3")
13191323   PORT_BIT( 0xff, 0x80, IPT_PADDLE ) PORT_MINMAX(0x1d,0xcb) PORT_SENSITIVITY(50) PORT_KEYDELTA(10) PORT_CENTERDELTA(0) PORT_PLAYER(4)
13201324INPUT_PORTS_END
13211325
13221326
13231327static INPUT_PORTS_START( mazeinv )
1324   PORT_START   /* IN0 */
1328   PORT_START_TAG("IN0")   /* IN0 */
13251329   PORT_DIPNAME( 0x03, 0x00, DEF_STR( Language ))
13261330   PORT_DIPSETTING(    0x00, DEF_STR( English ))
13271331   PORT_DIPSETTING(    0x01, DEF_STR( German ))
r2844r2845
13441348   PORT_DIPSETTING(    0x40, "2" )
13451349   PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_VBLANK )
13461350
1347   PORT_START      /* IN1 */
1351   PORT_START_TAG("IN1")      /* IN1 */
13481352   PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNKNOWN )
13491353
1350   PORT_START      /* IN2 */
1354   PORT_START_TAG("IN2")      /* IN2 */
13511355   PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN )
13521356   PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN )
13531357   PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_BUTTON1 )
r2844r2845
13571361   PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_BUTTON4 )
13581362   PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_COIN1 )
13591363
1360   PORT_START      /* IN3 */
1364   PORT_START_TAG("IN3")      /* IN3 */
13611365   PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN )
13621366   PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN )
13631367   PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(2)
r2844r2845
13671371   PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_BUTTON4 ) PORT_PLAYER(2)
13681372   PORT_SERVICE( 0x80, IP_ACTIVE_LOW )
13691373
1370   PORT_START   /* IN4 */
1374   PORT_START_TAG("DSW1")   /* IN4 */
13711375   PORT_DIPNAME( 0x03, 0x00, "Doors for bonus" )
13721376   PORT_DIPSETTING(    0x00, "10" )
13731377   PORT_DIPSETTING(    0x01, "12" )
r2844r2845
13891393   PORT_DIPSETTING(    0x80, DEF_STR( Hard ))
13901394   PORT_DIPSETTING(    0xc0, DEF_STR( Harder ))
13911395
1392   PORT_START   /* IN5 */
1396   PORT_START_TAG("DSW2")   /* IN5 */
13931397   PORT_DIPNAME( 0x03, 0x02, DEF_STR( Coinage ))
13941398   PORT_DIPSETTING(    0x03, DEF_STR( 2C_1C ))
13951399   PORT_DIPSETTING(    0x02, DEF_STR( 1C_1C ))
r2844r2845
14111415   PORT_DIPSETTING(    0x80, "6 credits/5 coins" )
14121416
14131417   /* IN6-9 fake to control player joysticks */
1414   PORT_START
1418   PORT_START_TAG("STICK0")
14151419   PORT_BIT( 0xff, 0x7f, IPT_AD_STICK_Y ) PORT_MINMAX(0x40, 0xbf) PORT_SENSITIVITY(100) PORT_KEYDELTA(10) PORT_REVERSE PORT_PLAYER(1)
14161420
1417   PORT_START
1421   PORT_START_TAG("STICK1")
14181422
1419   PORT_START
1423   PORT_START_TAG("STICK2")
14201424   PORT_BIT( 0xff, 0x7f, IPT_AD_STICK_X ) PORT_MINMAX(0x40, 0xbf) PORT_SENSITIVITY(100) PORT_KEYDELTA(10) PORT_PLAYER(1)
14211425
1422   PORT_START
1426   PORT_START_TAG("STICK3")
14231427INPUT_PORTS_END
14241428
14251429
14261430static INPUT_PORTS_START( bullsdrt )
1427   PORT_START   /* IN0 */
1431   PORT_START_TAG("IN0")   /* IN0 */
14281432   PORT_BIT( 0x0f, IP_ACTIVE_HIGH, IPT_SPECIAL )   /* trackball data */
14291433   PORT_BIT( 0x30, IP_ACTIVE_LOW,  IPT_UNKNOWN )
14301434   PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_VBLANK )
14311435   PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_SPECIAL )   /* trackball sign bit */
14321436
1433   PORT_START   /* IN1 */
1437   PORT_START_TAG("IN1")   /* IN1 */
14341438   PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_START1 )
14351439   PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_START2 )
14361440   PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_BUTTON1 )
r2844r2845
14401444   PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_COIN2 )
14411445   PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_COIN3 )
14421446
1443   PORT_START   /* IN2 */
1447   PORT_START_TAG("IN2")   /* IN2 */
14441448   PORT_BIT( 0x0f, IP_ACTIVE_HIGH, IPT_SPECIAL )   /* trackball data */
14451449   PORT_BIT( 0x70, IP_ACTIVE_LOW,  IPT_UNKNOWN )
14461450   PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_SPECIAL )   /* trackball sign bit */
14471451
1448   PORT_START
1452   PORT_START_TAG("DSW1")
14491453   PORT_DIPNAME( 0x01, 0x01, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW1:1")
14501454   PORT_DIPSETTING(    0x01, DEF_STR( Off ) )
14511455   PORT_DIPSETTING(    0x00, DEF_STR( On ) )
r2844r2845
14711475   PORT_DIPSETTING(    0x80, DEF_STR( Off ) )
14721476   PORT_DIPSETTING(    0x00, DEF_STR( On ) )
14731477
1474   PORT_START
1478   PORT_START_TAG("DSW2")
14751479   PORT_DIPNAME( 0x01, 0x01, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW2:1")
14761480   PORT_DIPSETTING(    0x01, DEF_STR( Off ) )
14771481   PORT_DIPSETTING(    0x00, DEF_STR( On ) )
r2844r2845
14971501   PORT_DIPSETTING(    0x80, DEF_STR( Off ) )
14981502   PORT_DIPSETTING(    0x00, DEF_STR( On ) )
14991503
1500   PORT_START
1501   /* not used */
1502
1503   PORT_START   /* IN6, fake trackball input port. */
1504   PORT_START_TAG("TRACK0_X")   /* fake trackball input port. */
15041505   PORT_BIT( 0xff, 0x00, IPT_TRACKBALL_X ) PORT_SENSITIVITY(50) PORT_KEYDELTA(10) PORT_REVERSE
15051506
1506   PORT_START   /* IN7, fake trackball input port. */
1507   PORT_START_TAG("TRACK0_Y")   /* fake trackball input port. */
15071508   PORT_BIT( 0xff, 0x00, IPT_TRACKBALL_Y ) PORT_SENSITIVITY(50) PORT_KEYDELTA(10)
1509
1510   /* 2008-06 FP: was bullsdrt available as cocktail? If not, these can be removed */
1511   PORT_START_TAG("TRACK1_X")
1512
1513   PORT_START_TAG("TRACK1_Y")
15081514INPUT_PORTS_END
15091515
15101516
src/mame/drivers/atarisy1.c
r2844r2845
211211static READ16_HANDLER( joystick_r )
212212{
213213   int newval = 0xff;
214   char port[4];
214   static const char *portnames[] = { "IN0", "IN1" };
215215
216216   /* digital joystick type */
217217   if (joystick_type == 1)
r2844r2845
219219
220220   /* Hall-effect analog joystick */
221221   else if (joystick_type == 2)
222   {
223      sprintf(port, "IN%d", offset & 1);
224      newval = input_port_read(machine, port);
225   }
222      newval = input_port_read(machine, portnames[offset & 1]);
226223
227224   /* Road Blasters gas pedal */
228225   else if (joystick_type == 3)
src/mame/drivers/atarig42.c
r2844r2845
9393
9494static WRITE16_HANDLER( a2d_select_w )
9595{
96   char port[5];
96   static const char *portnames[] = { "A2D0", "A2D1" };
9797
98   sprintf(port, "A2D%d", (offset != 0));
99   analog_data = input_port_read(machine, port);
98   analog_data = input_port_read(machine, portnames[offset != 0]);
10099}
101100
102101
r2844r2845
115114      asic65_reset((~data >> 14) & 1);
116115
117116      /* bits 13-11 are the MO control bits */
118      atarirle_control_w(0, (data >> 11) & 7);
117      atarirle_control_w(machine, 0, (data >> 11) & 7);
119118   }
120119
121120   /* lower byte */
src/mame/drivers/angelkds.c
r2844r2845
181181static READ8_HANDLER( angelkds_input_r )
182182{
183183   int fake;
184   char port1[4], port2[6];
184   static const char *portnames[] = { "I81", "I82" };
185   static const char *fakenames[] = { "FAKE1", "FAKE2" };
185186
186   sprintf(port1, "I8%d", 1 + offset);
187   sprintf(port2, "FAKE%d", 1 + offset);
188   fake = input_port_read(machine, port2);
187   fake = input_port_read(machine, fakenames[offset]);
189188
190   return ((fake & 0x01) ? fake  : input_port_read(machine, port1));
189   return ((fake & 0x01) ? fake  : input_port_read(machine, portnames[offset]));
191190}
192191
193192#else
194193
195194static READ8_HANDLER( angelkds_input_r )
196195{
197   char port[4];
196   static const char *portnames[] = { "I81", "I82" };
198197
199   sprintf(port, "I8%d", 1 + offset);
200   return input_port_read(machine, port);
198   return input_port_read(machine, portnames[offset]);
201199}
202200
203201#endif
src/mame/drivers/opwolf.c
r2844r2845
9999#include "audio/taitosnd.h"
100100#include "sound/2151intf.h"
101101#include "sound/msm5205.h"
102#include "includes/cchip.h"
102103
103104int opwolf_region;
104105
r2844r2845
107108static UINT8 adpcm_c[0x08];
108109static int opwolf_gun_xoffs, opwolf_gun_yoffs;
109110
110void opwolf_cchip_init(void);
111
112READ16_HANDLER( opwolf_cchip_status_r );
113READ16_HANDLER( opwolf_cchip_data_r );
114WRITE16_HANDLER( opwolf_cchip_status_w );
115WRITE16_HANDLER( opwolf_cchip_data_w );
116WRITE16_HANDLER( opwolf_cchip_bank_w );
117111WRITE16_HANDLER( rainbow_spritectrl_w );
118112WRITE16_HANDLER( rastan_spriteflip_w );
119113VIDEO_START( opwolf );
src/mame/drivers/firebeat.c
r2844r2845
563563   switch(reg)
564564   {
565565      case 0x78:      /* GCU Status */
566         /* ppd checks bits 0x0041 of the upper halfword on interrupt */
566567         return 0xffff0005;
567568
568569      default:
r2844r2845
585586   switch(reg)
586587   {
587588      case 0x10:      /* ??? */
589         /* IRQ clear/enable; ppd writes bit off then on in response to interrupt */
590         /* it enables bits 0x41, but 0x01 seems to be the one it cares about */
591         if (ACCESSING_BITS_16_31 && (data & 0x0001) == 0)
592            cpunum_set_input_line(machine, 0, INPUT_LINE_IRQ0, CLEAR_LINE);
588593         break;
589594
590595      case 0x30:
r2844r2845
855860   cpunum_set_input_line(Machine, 0, INPUT_LINE_IRQ4, ASSERT_LINE);
856861}
857862
863static void atapi_clear_irq(void)
864{
865   cpunum_set_input_line(Machine, 0, INPUT_LINE_IRQ4, CLEAR_LINE);
866}
867
858868static void atapi_exit(running_machine* machine)
859869{
860870   SCSIDeleteInstance(atapi_device_data[1]);
r2844r2845
952962   }
953963   else
954964   {
965      if (reg == ATAPI_REG_CMDSTATUS)
966         atapi_clear_irq();
955967      return atapi_regs[reg];
956968   }
957969}
r2844r2845
14171429{
14181430   if (channel == 0)
14191431   {
1420      if ((extend_board_irq_enable & 0x02) == 0)
1432      if ((extend_board_irq_enable & 0x02) == 0 && value != CLEAR_LINE)
14211433      {
14221434         extend_board_irq_active |= 0x02;
14231435         cpunum_set_input_line(machine, 0, INPUT_LINE_IRQ1, ASSERT_LINE);
14241436      }
1437      else
1438         cpunum_set_input_line(machine, 0, INPUT_LINE_IRQ1, CLEAR_LINE);
14251439   }
14261440   else
14271441   {
1428      if ((extend_board_irq_enable & 0x01) == 0)
1442      if ((extend_board_irq_enable & 0x01) == 0 && value != CLEAR_LINE)
14291443      {
14301444         extend_board_irq_active |= 0x01;
14311445         cpunum_set_input_line(machine, 0, INPUT_LINE_IRQ1, ASSERT_LINE);
14321446      }
1447      else
1448         cpunum_set_input_line(machine, 0, INPUT_LINE_IRQ1, CLEAR_LINE);
14331449   }
14341450}
14351451
r2844r2845
17431759
17441760/*****************************************************************************/
17451761
1762static UINT32 *work_ram;
1763static MACHINE_START( firebeat )
1764{
1765   /* set conservative DRC options */
1766   cpunum_set_info_int(0, CPUINFO_INT_PPC_DRC_OPTIONS, PPCDRC_COMPATIBLE_OPTIONS);
1767
1768   /* configure fast RAM regions for DRC */
1769   cpunum_set_info_int(0, CPUINFO_INT_PPC_FASTRAM_SELECT, 0);
1770   cpunum_set_info_int(0, CPUINFO_INT_PPC_FASTRAM_START, 0x00000000);
1771   cpunum_set_info_int(0, CPUINFO_INT_PPC_FASTRAM_END, 0x01ffffff);
1772   cpunum_set_info_ptr(0, CPUINFO_PTR_PPC_FASTRAM_BASE, work_ram);
1773   cpunum_set_info_int(0, CPUINFO_INT_PPC_FASTRAM_READONLY, 0);
1774}
1775
17461776static ADDRESS_MAP_START( firebeat_map, ADDRESS_SPACE_PROGRAM, 32 )
1777   AM_RANGE(0x00000000, 0x01ffffff) AM_RAM AM_BASE(&work_ram)
17471778   AM_RANGE(0x70000000, 0x70000fff) AM_READWRITE(midi_uart_r, midi_uart_w)
17481779   AM_RANGE(0x70006000, 0x70006003) AM_WRITE(extend_board_irq_w)
17491780   AM_RANGE(0x70008000, 0x7000800f) AM_READ(keyboard_wheel_r)
r2844r2845
17611792   AM_RANGE(0x7e800100, 0x7e8001ff) AM_READWRITE(gcu1_r, gcu1_w)
17621793   AM_RANGE(0x7fe00000, 0x7fe0000f) AM_READWRITE(atapi_command_r, atapi_command_w)
17631794   AM_RANGE(0x7fe80000, 0x7fe8000f) AM_READWRITE(atapi_control_r, atapi_control_w)
1764   AM_RANGE(0x80000000, 0x81ffffff) AM_RAM
1765   AM_RANGE(0xfff80000, 0xffffffff) AM_ROM AM_REGION(REGION_USER1, 0)      /* System BIOS */
1795   AM_RANGE(0x7ff80000, 0x7fffffff) AM_ROM AM_REGION(REGION_USER1, 0)      /* System BIOS */
17661796ADDRESS_MAP_END
17671797
17681798static ADDRESS_MAP_START( spu_map, ADDRESS_SPACE_PROGRAM, 16 )
r2844r2845
19922022   MDRV_CPU_PROGRAM_MAP(firebeat_map, 0)
19932023   MDRV_CPU_VBLANK_INT("main", firebeat_interrupt)
19942024
2025   MDRV_MACHINE_START(firebeat)
19952026   MDRV_MACHINE_RESET(firebeat)
19962027   MDRV_NVRAM_HANDLER(firebeat)
19972028
r2844r2845
22252256{
22262257   int r = ibutton_w(data);
22272258   if (r >= 0)
2228      cpunum_set_info_int(0, CPUINFO_INT_PPC_RX_DATA, r & 0xff);
2259      ppc4xx_spu_receive_byte(0, r);
22292260}
22302261
22312262/*****************************************************************************/
r2844r2845
22602291
22612292   cur_cab_data = cab_data;
22622293
2263   cpunum_set_info_fct(0, CPUINFO_PTR_SPU_TX_HANDLER, (genf *)security_w);
2294   ppc4xx_spu_set_tx_handler(0, security_w);
22642295
22652296   set_ibutton(rom);
22662297
src/mame/drivers/bigevglf.c
r2844r2845
6060#include "sound/ay8910.h"
6161#include "sound/msm5232.h"
6262#include "cpu/m6805/m6805.h"
63#include "includes/bigevglf.h"
6364
64VIDEO_START( bigevglf );
65VIDEO_UPDATE( bigevglf );
66
67READ8_HANDLER( bigevglf_vidram_r );
68WRITE8_HANDLER( bigevglf_vidram_w );
69WRITE8_HANDLER( bigevglf_vidram_addr_w );
70
71READ8_HANDLER( bigevglf_68705_portA_r );
72WRITE8_HANDLER( bigevglf_68705_portA_w );
73READ8_HANDLER( bigevglf_68705_portB_r );
74WRITE8_HANDLER( bigevglf_68705_portB_w );
75READ8_HANDLER( bigevglf_68705_portC_r );
76WRITE8_HANDLER( bigevglf_68705_portC_w );
77WRITE8_HANDLER( bigevglf_68705_ddrA_w );
78WRITE8_HANDLER( bigevglf_68705_ddrB_w );
79WRITE8_HANDLER( bigevglf_68705_ddrC_w );
80
81WRITE8_HANDLER( bigevglf_mcu_w );
82WRITE8_HANDLER( bigevglf_mcu_set_w );
83READ8_HANDLER( bigevglf_mcu_r );
84READ8_HANDLER( bigevglf_mcu_status_r );
85
86WRITE8_HANDLER( bigevglf_gfxcontrol_w );
87WRITE8_HANDLER( bigevglf_palette_w );
88
89extern UINT8 *bigevglf_spriteram1;
90extern UINT8 *bigevglf_spriteram2;
91
9265static UINT32 beg_bank=0;
9366static UINT8 *beg_sharedram;
9467
r2844r2845
228201
229202static INPUT_PORTS_START( bigevglf )
230203
231   PORT_START   /* port 00 on sub cpu */
204   PORT_START_TAG("PORT00")      /* port 00 on sub cpu */
232205   PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN3 )
233206   PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_COIN4 )
234207   PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(2)
r2844r2845
238211   PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_TILT )
239212   PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_SERVICE1 )
240213
241   PORT_START   /* port 04 on sub cpu - bit 0 and bit 1 are coin inputs */
214   PORT_START_TAG("PORT04")      /* port 04 on sub cpu - bit 0 and bit 1 are coin inputs */
242215   PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_COIN1 )
243216   PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_COIN2 )
244217
245   PORT_START_TAG("DSW1")   /* port 05 on sub cpu */
218   PORT_START_TAG("DSW1")         /* port 05 on sub cpu */
246219   PORT_DIPNAME( 0x01,   0x00, DEF_STR( Cabinet ) ) PORT_DIPLOCATION("SW1:1")
247220   PORT_DIPSETTING(      0x00, DEF_STR( Upright ) )
248221   PORT_DIPSETTING(      0x01, DEF_STR( Cocktail ) )
r2844r2845
259232   PORT_DIPSETTING(      0x00, DEF_STR( 2C_3C ) )
260233   PORT_DIPSETTING(      0xa0, DEF_STR( 1C_2C ) )
261234
262   PORT_START_TAG("DSW2")   /* port 06 on sub cpu */
235   PORT_START_TAG("DSW2")         /* port 06 on sub cpu */
263236   PORT_DIPNAME( 0x03,   0x03, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SW2:1,2")
264237   PORT_DIPSETTING(      0x01, DEF_STR( Easy ) )
265238   PORT_DIPSETTING(      0x03, DEF_STR( Normal ) )
r2844r2845
283256   PORT_DIPSETTING(      0x20, "9" )
284257   PORT_DIPSETTING(      0x00, "10" )
285258
286   PORT_START  /* TRACKBALL X - port 02 on sub cpu */
259   PORT_START_TAG("TRACKX")   /* TRACKBALL X - port 02 on sub cpu */
287260   PORT_BIT( 0xff, 0x00, IPT_TRACKBALL_X  ) PORT_SENSITIVITY(30) PORT_KEYDELTA(10)
288261
289   PORT_START  /* TRACKBALL Y - port 03 on sub cpu */
262   PORT_START_TAG("TRACKY")   /* TRACKBALL Y - port 03 on sub cpu */
290263   PORT_BIT( 0xff, 0x00, IPT_TRACKBALL_Y ) PORT_SENSITIVITY(30) PORT_KEYDELTA(10) PORT_REVERSE
291264INPUT_PORTS_END
292265
r2844r2845
377350
378351    */
379352   bit5 ^= 0x20;
380   return bigevglf_mcu_status_r(machine,0) | (input_port_read_indexed(machine, 1) & 3) | bit5; /* bit 0 and bit 1 - coin inputs */
353   return bigevglf_mcu_status_r(machine,0) | (input_port_read(machine, "PORT04") & 3) | bit5;   /* bit 0 and bit 1 - coin inputs */
381354}
382355
383356static ADDRESS_MAP_START( bigevglf_sub_readport, ADDRESS_SPACE_IO, 8 )
384357   ADDRESS_MAP_GLOBAL_MASK(0xff)
385   AM_RANGE(0x00, 0x00) AM_READ(input_port_0_r)
358   AM_RANGE(0x00, 0x00) AM_READ_PORT("PORT00")
386359   AM_RANGE(0x01, 0x01) AM_READ(SMH_NOP)
387   AM_RANGE(0x02, 0x02) AM_READ(input_port_4_r)
388   AM_RANGE(0x03, 0x03) AM_READ(input_port_5_r)
360   AM_RANGE(0x02, 0x02) AM_READ_PORT("TRACKX")
361   AM_RANGE(0x03, 0x03) AM_READ_PORT("TRACKY")
389362   AM_RANGE(0x04, 0x04) AM_READ(sub_cpu_mcu_coin_port_r)
390   AM_RANGE(0x05, 0x05) AM_READ(input_port_2_r)
391   AM_RANGE(0x06, 0x06) AM_READ(input_port_3_r)
363   AM_RANGE(0x05, 0x05) AM_READ_PORT("DSW1")
364   AM_RANGE(0x06, 0x06) AM_READ_PORT("DSW2")
392365   AM_RANGE(0x07, 0x07) AM_READ(SMH_NOP)
393366   AM_RANGE(0x0b, 0x0b) AM_READ(bigevglf_mcu_r)
394367   AM_RANGE(0x20, 0x20) AM_READ(beg_fromsound_r)
src/mame/drivers/bagman.c
r2844r2845
6363#include "sound/ay8910.h"
6464#include "sound/5110intf.h"
6565#include "sound/tms5110.h"
66#include "includes/bagman.h"
6667
6768
68extern READ8_HANDLER( bagman_pal16r6_r );
69extern MACHINE_RESET( bagman );
70extern WRITE8_HANDLER( bagman_pal16r6_w );
71
72
73extern UINT8 *bagman_video_enable;
74
75extern WRITE8_HANDLER( bagman_videoram_w );
76extern WRITE8_HANDLER( bagman_colorram_w );
77extern WRITE8_HANDLER( bagman_flipscreen_w );
78
79extern PALETTE_INIT( bagman );
80extern VIDEO_START( bagman );
81extern VIDEO_UPDATE( bagman );
82
83
8469static int speech_rom_address = 0;
8570
8671static UINT8 ls259_buf[8] = {0,0,0,0,0,0,0,0};
r2844r2845
220205#endif
221206ADDRESS_MAP_END
222207
208
209
223210static ADDRESS_MAP_START( pickin_map, ADDRESS_SPACE_PROGRAM, 8 )
224211   AM_RANGE(0x0000, 0x5fff) AM_ROM
225212   AM_RANGE(0x7000, 0x77ff) AM_RAM
r2844r2845
234221   AM_RANGE(0xa003, 0xa003) AM_WRITE(SMH_RAM) AM_BASE(&bagman_video_enable)
235222   AM_RANGE(0xa004, 0xa004) AM_WRITE(bagman_coin_counter_w)
236223   AM_RANGE(0xa800, 0xa800) AM_READ(input_port_2_r)
224
225
226
237227#if 0
238228   AM_RANGE(0xa007, 0xa007) AM_WRITE(SMH_NOP)   /* ???? */
239229   AM_RANGE(0xb000, 0xb000) AM_WRITE(SMH_NOP)   /* ???? */
240   AM_RANGE(0xb800, 0xb800) AM_READ(SMH_NOP)
230   AM_RANGE(0xb800, 0xb800) AM_READ(SMH_NOP) /* ???? */
241231   AM_RANGE(0xb800, 0xb800) AM_WRITE(SMH_NOP)   /* ???? */
242232#endif
243233ADDRESS_MAP_END
r2844r2845
785775   ROM_LOAD( "bota_3a.3a",    0x0020, 0x0020, CRC(edf88f34) SHA1(b9c342d51303d552f87df2543a34e38c30acd07c) )
786776ROM_END
787777
778/*
779
780Squash (Itisa)
781
782Anno    1984
783Produttore  Itisa-Valadon-gecas
784
785CPU
786
7871x SGS Z8400AB1-Z80ACPU (main)
7882x AY-3-8910 (sound)
7891x LM380 (sound)
7901x oscillator 18432
791ROMs
792
7937x 2732
7942x MMI6331
795Note
796
7971x 22x2 edge connector
7981x trimmer (volume)
7991x 8 switches dip
800
801This is a strange thing: the PCB is marked "Valadon Automation (C) 1983" and "Fabrique
802sous licence par GECAS/MILANO" (manufactured under license from GECAS/MILANO)
803
804But if you look in rom 7 with an hex editor you can see the following: "(C) 1984 ITISA"
805and "UN BONJOUR A JACQUES DE PEPE PETIT ET HENK" (a good morning to Jacques from Pepe
806Petit and Henk). These are the programmers in ITISA, Henk Spits, Josep M. Petit, Josep
807Morillas, the very same 3 persons working on BOTANIC (1984)(ITISA).
808
809Game writings in the eprom are in English and Spanish.
810
811So we have an English/Spanish game with a French easter egg on a French PCB manufactured
812under licence from an Italian company! Let's call it melting pot!
813
814*/
815
816ROM_START( squaitsa )
817   ROM_REGION( 0x10000, REGION_CPU1, 0 )
818   ROM_LOAD( "sq5.3.9e",    0x0000, 0x1000,CRC(04128d92) SHA1(ca7b7c4be5f40bcefc92b231ce3bba859c9967ee) )
819   ROM_LOAD( "sq6.4.9f",    0x1000, 0x1000,CRC(4ff7dd56) SHA1(1955675a9ee3ad7b9185cd027bc42284e15c7451) )
820   ROM_LOAD( "sq7.5.9j",    0x2000, 0x1000,CRC(e46ecda6) SHA1(25cd94b6c9602cc00fe3459b524639fd3beb72be) )
821
822   ROM_REGION( 0x2000, REGION_GFX1, ROMREGION_DISPOSE )
823   ROM_LOAD( "sq2.1.1e",   0x0000, 0x1000,CRC(0eb6ecad) SHA1(da2facbfa5f2fe233ea09777e9880b4f1d3c1079) )
824   ROM_LOAD( "sq4.2.1j",   0x1000, 0x1000,CRC(8d875b0e) SHA1(f949da71167aa81c1cfaefc6f3d88b57792b6191) )
825
826   ROM_REGION( 0x2000, REGION_GFX2, ROMREGION_DISPOSE )
827   ROM_LOAD( "sq1.1c",    0x0000, 0x1000,CRC(b6d563e5) SHA1(90a89fd8e892a612c74bd2c7e38acb08c22c6046) )
828   ROM_LOAD( "sq3.1f",    0x1000, 0x1000,CRC(0d9d87e6) SHA1(881039d3b8805bb1a546e28abda3273e79714033) )
829
830   ROM_REGION( 0x0040, REGION_PROMS, 0 )
831   ROM_LOAD( "mmi6331.3p",    0x0000, 0x0020,CRC(06eab7ce) SHA1(d0bafedb340bf12d81446cc672307bb01e5d3026) )
832   ROM_LOAD( "mmi6331.3r",    0x0020, 0x0020,CRC(86c1e7db) SHA1(5c974b51d770a555ddab5c23f03a666c6f286cbf) )
833ROM_END
834
788835static DRIVER_INIT( bagnarda )
789836{
790837   /* initialize video enable because it's not done in the code */
r2844r2845
800847GAME( 1984, sbagmans, sbagman, bagman,  sbagman, 0,        ROT270, "Valadon Automation (Stern license)", "Super Bagman (Stern)", 0 )
801848GAME( 1983, pickin,     0,      pickin,  pickin,  0,        ROT270, "Valadon Automation", "Pickin'", 0 )
802849GAME( 1984, botanic,  0,       botanic, botanic, 0,        ROT270, "Valadon Automation (Itisa license)", "Botanic", 0 )
850GAME( 1984, squaitsa,  0,       botanic, botanic, 0,        ROT0, "Itisa", "Squash (Itisa)", GAME_NOT_WORKING )
803851
src/mame/drivers/atarisy2.c
r2844r2845
423423
424424static READ16_HANDLER( adc_r )
425425{
426   char port[5];
426   static const char *adcnames[] = { "ADC0", "ADC1", "ADC2", "ADC3" };
427427
428   sprintf(port, "ADC%d", which_adc);
429428   if (which_adc < pedal_count)
430      return ~input_port_read(machine, port);
429      return ~input_port_read(machine, adcnames[which_adc]);
431430
432   return input_port_read(machine, port) | 0xff00;
431   return input_port_read(machine, adcnames[which_adc]) | 0xff00;
433432}
434433
435434
436435static READ8_HANDLER( leta_r )
437436{
438   char port[6];
437   static const char *letanames[] = { "LETA0", "LETA1", "LETA2", "LETA3" };
439438
440439    if (pedal_count == -1)   /* 720 */
441440   {
r2844r2845
485484      }
486485   }
487486
488   sprintf(port, "LETA%d", (offset & 3));
489   return input_port_read(machine, port);
487   return input_port_read(machine, letanames[offset & 3]);
490488}
491489
492490
src/mame/drivers/cbuster.c
r2844r2845
8888   switch (offset<<1)
8989   {
9090      case 0: /* Player 1 & Player 2 joysticks & fire buttons */
91         return (input_port_read_indexed(machine, 0) + (input_port_read_indexed(machine, 1) << 8));
91         return (input_port_read(machine, "P1") + (input_port_read(machine, "P2") << 8));
9292
9393      case 2: /* Dip Switches */
94         return (input_port_read_indexed(machine, 3) + (input_port_read_indexed(machine, 4) << 8));
94         return (input_port_read(machine, "DSW1") + (input_port_read(machine, "DSW2") << 8));
9595
9696      case 4: /* Protection */
9797         logerror("%04x : protection control read at 30c000 %d\n",activecpu_get_pc(),offset);
9898         return prot;
9999
100100      case 6: /* Credits, VBL in byte 7 */
101         return input_port_read_indexed(machine, 2);
101         return input_port_read(machine, "COINS");
102102   }
103103
104104   return ~0;
r2844r2845
201201/******************************************************************************/
202202
203203static INPUT_PORTS_START( twocrude )
204   PORT_START   /* Player 1 controls */
204   PORT_START_TAG("P1")   /* Player 1 controls */
205205   PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_8WAY
206206   PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_8WAY
207207   PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_8WAY
r2844r2845
211211   PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_BUTTON3 )
212212   PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_START1 )
213213
214   PORT_START   /* Player 2 controls */
214   PORT_START_TAG("P2")   /* Player 2 controls */
215215   PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_8WAY PORT_PLAYER(2)
216216   PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_8WAY PORT_PLAYER(2)
217217   PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_8WAY PORT_PLAYER(2)
r2844r2845
221221   PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_PLAYER(2)
222222   PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_START2 )
223223
224   PORT_START   /* Credits */
224   PORT_START_TAG("COINS")   /* Credits */
225225   PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 )
226226   PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_COIN2 )
227227   PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_COIN3 )
r2844r2845
231231   PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
232232   PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
233233
234   PORT_START   /* Dip switch bank 1 */
234   PORT_START_TAG("DSW1")   /* Dip switch bank 1 */
235235   PORT_DIPNAME( 0x07, 0x07, DEF_STR( Coin_A ) )
236236   PORT_DIPSETTING(    0x00, DEF_STR( 3C_1C ) )
237237   PORT_DIPSETTING(    0x01, DEF_STR( 2C_1C ) )
r2844r2845
257257   PORT_DIPSETTING(    0x80, DEF_STR( Off ) )
258258   PORT_DIPSETTING(    0x00, DEF_STR( On ) )
259259
260   PORT_START   /* Dip switch bank 2 */
260   PORT_START_TAG("DSW2")   /* Dip switch bank 2 */
261261   PORT_DIPNAME( 0x03, 0x03, DEF_STR( Lives ) )
262262   PORT_DIPSETTING(    0x00, "1" )
263263   PORT_DIPSETTING(    0x01, "2" )
src/mame/drivers/dunhuang.c
r2844r2845
344344static WRITE8_HANDLER( dunhuang_input_w )   {   dunhuang_input = data;   }
345345static READ8_HANDLER( dunhuang_service_r )
346346{
347   return input_port_read_indexed(machine, 5)
347   return input_port_read(machine, "SERVICE")
348348    | ((dunhuang_hopper && !(video_screen_get_frame_number(machine->primary_screen)%10)) ? 0x00 : 0x08)   // bit 3: hopper sensor
349349    | 0x80                                                // bit 7 low -> tiles block transferrer busy
350350   ;
r2844r2845
352352
353353static READ8_HANDLER( dunhuang_dsw_r )
354354{
355   if (!(dunhuang_input & 0x01))   return input_port_read_indexed(machine, 0);
356   if (!(dunhuang_input & 0x02))   return input_port_read_indexed(machine, 1);
357   if (!(dunhuang_input & 0x04))   return input_port_read_indexed(machine, 2);
358   if (!(dunhuang_input & 0x08))   return input_port_read_indexed(machine, 3);
359   if (!(dunhuang_input & 0x10))   return input_port_read_indexed(machine, 4);
355   if (!(dunhuang_input & 0x01))   return input_port_read(machine, "DSW1");
356   if (!(dunhuang_input & 0x02))   return input_port_read(machine, "DSW2");
357   if (!(dunhuang_input & 0x04))   return input_port_read(machine, "DSW3");
358   if (!(dunhuang_input & 0x08))   return input_port_read(machine, "DSW4");
359   if (!(dunhuang_input & 0x10))   return input_port_read(machine, "DSW5");
360360   logerror("%06x: warning, unknown dsw bits read, dunhuang_input = %02x\n", activecpu_get_pc(), dunhuang_input);
361361   return 0xff;
362362}
363363static READ8_HANDLER( dunhuang_input_r )
364364{
365   if (!(dunhuang_input & 0x01))   return input_port_read_indexed(machine, 6);
366   if (!(dunhuang_input & 0x02))   return input_port_read_indexed(machine, 7);
367   if (!(dunhuang_input & 0x04))   return input_port_read_indexed(machine, 8);
368   if (!(dunhuang_input & 0x08))   return input_port_read_indexed(machine, 9);
369   if (!(dunhuang_input & 0x10))   return input_port_read_indexed(machine, 10);
365   if (!(dunhuang_input & 0x01))   return input_port_read(machine, "IN0");
366   if (!(dunhuang_input & 0x02))   return input_port_read(machine, "IN1");
367   if (!(dunhuang_input & 0x04))   return input_port_read(machine, "IN2");
368   if (!(dunhuang_input & 0x08))   return input_port_read(machine, "IN3");
369   if (!(dunhuang_input & 0x10))   return input_port_read(machine, "IN4");
370370   logerror("%06x: warning, unknown input bits read, dunhuang_input = %02x\n", activecpu_get_pc(), dunhuang_input);
371371   return 0xff;
372372}
r2844r2845
442442***************************************************************************/
443443
444444static INPUT_PORTS_START( dunhuang )
445   PORT_START   // IN0 - DSW1
445   PORT_START_TAG("DSW1")      /* IN0 - DSW1 */
446446   PORT_DIPNAME( 0x0f, 0x0f, "Main Game Chance (%)" )   PORT_DIPLOCATION("SW1:1,2,3,4")
447447   PORT_DIPSETTING(    0x00, "78" )
448448   PORT_DIPSETTING(    0x01, "80" )
r2844r2845
472472   PORT_DIPSETTING(    0x80, "Keys" )
473473   PORT_DIPSETTING(    0x00, "Payout" )
474474
475   PORT_START   // IN1 - DSW2
475   PORT_START_TAG("DSW2")      /* IN1 - DSW2 */
476476   PORT_DIPUNKNOWN_DIPLOC( 0x01, 0x01, "SW2:1" )
477477   PORT_DIPNAME( 0x06, 0x06, "Credits Per Coin" )      PORT_DIPLOCATION("SW2:2,3")
478478   PORT_DIPSETTING(    0x06, "1" )
r2844r2845
493493   PORT_DIPSETTING(    0x80, "1000" )
494494   PORT_DIPSETTING(    0xc0, "3000" )
495495
496   PORT_START   // IN2 - DSW3
496   PORT_START_TAG("DSW3")      /* IN2 - DSW3 */
497497   PORT_DIPNAME( 0x03, 0x03, "Min Bet" )            PORT_DIPLOCATION("SW3:1,2")
498498   PORT_DIPSETTING(    0x03, "1" )
499499   PORT_DIPSETTING(    0x02, "2" )
r2844r2845
515515   PORT_DIPSETTING(    0x80, "5" )
516516   PORT_DIPSETTING(    0xc0, "6" )
517517
518   PORT_START   // IN3 - DSW4
518   PORT_START_TAG("DSW4")      /* IN3 - DSW4 */
519519   PORT_DIPNAME( 0x07, 0x07, "Credits Limit" )         PORT_DIPLOCATION("SW4:1,2,3")
520520   PORT_DIPSETTING(    0x07, "2k" )
521521   PORT_DIPSETTING(    0x06, "3k" )
r2844r2845
541541   PORT_DIPSETTING(    0x00, DEF_STR( No ) )
542542   PORT_DIPSETTING(    0x80, DEF_STR( Yes ) )
543543
544   PORT_START   // IN4 - DSW5
544   PORT_START_TAG("DSW5")      /* IN4 - DSW5 */
545545   PORT_DIPNAME( 0x03, 0x03, "Douple Up Chance (%)" )   PORT_DIPLOCATION("SW5:1,2")
546546   PORT_DIPSETTING(    0x00, "50" )
547547   PORT_DIPSETTING(    0x01, "60" )
r2844r2845
565565   PORT_DIPSETTING(    0x80, "Strong" )
566566   PORT_DIPSETTING(    0x00, "Weak" )
567567
568   PORT_START   // IN5 - SERVICE
568   PORT_START_TAG("SERVICE")      /* IN5 - SERVICE */
569569   PORT_BIT( 0x01, IP_ACTIVE_LOW,  IPT_SERVICE3 )      // clear (during boot)
570570   PORT_BIT( 0x02, IP_ACTIVE_LOW,  IPT_SERVICE2 )      // book
571571   PORT_BIT( 0x04, IP_ACTIVE_LOW,  IPT_SERVICE  )      // test (in game: dips, during boot: service mode)
r2844r2845
575575   PORT_BIT( 0x40, IP_ACTIVE_LOW,  IPT_UNKNOWN )
576576   PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_SPECIAL )      // 0 = tiles block transferrer busy
577577
578   PORT_START   // IN6 - P1
578   PORT_START_TAG("IN0")      /* IN6 - P1 */
579579   PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_MAHJONG_A )
580580   PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_MAHJONG_E )
581581   PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_MAHJONG_I )
r2844r2845
585585   PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
586586   PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
587587
588   PORT_START   // IN7 - P1
588   PORT_START_TAG("IN1")      /* IN7 - P1 */
589589   PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_MAHJONG_B )
590590   PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_MAHJONG_F )
591591   PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_MAHJONG_J )
r2844r2845
595595   PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
596596   PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
597597
598   PORT_START   // IN8 - P1
598   PORT_START_TAG("IN2")      /* IN8 - P1 */
599599   PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_MAHJONG_C )
600600   PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_MAHJONG_G )
601601   PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_MAHJONG_K )
r2844r2845
605605   PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
606606   PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
607607
608   PORT_START   // IN9 - P1
608   PORT_START_TAG("IN3")      /* IN9 - P1 */
609609   PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_MAHJONG_D )
610610   PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_MAHJONG_H )
611611   PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_MAHJONG_L )
r2844r2845
615615   PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
616616   PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
617617
618   PORT_START   // IN10 - P1
618   PORT_START_TAG("IN4")      /* IN10 - P1 */
619619   PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_MAHJONG_LAST_CHANCE   )
620620   PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_MAHJONG_SCORE )
621621   PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_MAHJONG_DOUBLE_UP )
src/mame/drivers/cvs.c
r2844r2845
279279   /* the lower 4 (or 3?) bits select the port to read */
280280   switch (offset & 0x0f)   /* might be 0x07 */
281281   {
282   case 0x00:  ret = input_port_read_indexed(machine, 0); break;
283   case 0x02:  ret = input_port_read_indexed(machine, 1); break;
284   case 0x03:  ret = input_port_read_indexed(machine, 2); break;
285   case 0x04:  ret = input_port_read_indexed(machine, 3); break;
286   case 0x06:  ret = input_port_read_indexed(machine, 4); break;
287   case 0x07:  ret = input_port_read_indexed(machine, 5); break;
282   case 0x00:  ret = input_port_read(machine, "IN0"); break;
283   case 0x02:  ret = input_port_read(machine, "IN1"); break;
284   case 0x03:  ret = input_port_read(machine, "IN2"); break;
285   case 0x04:  ret = input_port_read(machine, "IN3"); break;
286   case 0x06:  ret = input_port_read(machine, "DSW3"); break;
287   case 0x07:  ret = input_port_read(machine, "DSW2"); break;
288288   default:    logerror("%04x : CVS: Reading unmapped input port 0x%02x\n", activecpu_get_pc(), offset & 0x0f); break;
289289   }
290290
r2844r2845
539539   AM_RANGE(0x00, 0xff) AM_READWRITE(cvs_input_r, cvs_scroll_w)
540540   AM_RANGE(S2650_DATA_PORT, S2650_DATA_PORT) AM_READWRITE(cvs_collision_clear, cvs_video_fx_w)
541541   AM_RANGE(S2650_CTRL_PORT, S2650_CTRL_PORT) AM_READWRITE(cvs_collision_r, audio_command_w)
542    AM_RANGE(S2650_SENSE_PORT, S2650_SENSE_PORT) AM_READ(input_port_6_r)
542    AM_RANGE(S2650_SENSE_PORT, S2650_SENSE_PORT) AM_READ_PORT("SENSE")
543543ADDRESS_MAP_END
544544
545545
r2844r2845
657657   PORT_DIPSETTING(    0x10, "5" )
658658   PORT_DIPUNUSED( 0x20, IP_ACTIVE_HIGH )                  /* can't tell if it's ACTIVE_HIGH or ACTIVE_LOW */
659659
660   PORT_START   /* SENSE */
660   PORT_START_TAG("SENSE")   /* SENSE */
661661   PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_VBLANK )
662662INPUT_PORTS_END
663663
src/mame/drivers/seta.c
r2844r2845
17681768      if (old_tiles_offset != seta_tiles_offset)   tilemap_mark_all_tiles_dirty(ALL_TILEMAPS);
17691769      old_tiles_offset = seta_tiles_offset;
17701770
1771      seta_coin_lockout_w(data);
1771      seta_coin_lockout_w(machine, data);
17721772   }
17731773}
17741774
r2844r2845
28172817static WRITE8_HANDLER( sub_bankswitch_lockout_w )
28182818{
28192819   sub_bankswitch_w(machine,offset,data);
2820   seta_coin_lockout_w(data);
2820   seta_coin_lockout_w(machine, data);
28212821}
28222822
28232823
src/mame/drivers/tnzs.c
r2844r2845
544544ADDRESS_MAP_END
545545
546546
547WRITE8_HANDLER( jpopnics_palette_w )
547static WRITE8_HANDLER( jpopnics_palette_w )
548548{
549549   int r,g,b;
550550   UINT16 paldata;
r2844r2845
575575   AM_RANGE(0xf800, 0xffff) AM_RAM AM_WRITE(jpopnics_palette_w) AM_BASE(&paletteram)
576576ADDRESS_MAP_END
577577
578#ifdef UNUSED_FUNCTION
578579READ8_HANDLER( moo_r )
579580{
580581   return mame_rand(machine);
r2844r2845
584585{
585586   return 0xff;
586587}
588#endif
587589
588WRITE8_HANDLER( jpopnics_subbankswitch_w )
590static WRITE8_HANDLER( jpopnics_subbankswitch_w )
589591{
590592   UINT8 *RAM = memory_region(REGION_CPU2);
591593
src/mame/drivers/vball.c
r2844r2845
106106
107107VIDEO_START( vb );
108108VIDEO_UPDATE( vb );
109extern void vb_bgprombank_w(int bank);
110extern void vb_spprombank_w(int bank);
109extern void vb_bgprombank_w(running_machine *machine, int bank);
110extern void vb_spprombank_w(running_machine *machine, int bank);
111111extern WRITE8_HANDLER( vb_attrib_w );
112112extern WRITE8_HANDLER( vb_videoram_w );
113113extern void vb_mark_all_dirty(void);
r2844r2845
161161{
162162   flip_screen_set(~data&1);
163163   vb_scrollx_hi = (data & 0x02) << 7;
164   vb_bgprombank_w((data >> 2)&0x07);
165   vb_spprombank_w((data >> 5)&0x07);
164   vb_bgprombank_w(machine, (data >> 2)&0x07);
165   vb_spprombank_w(machine, (data >> 5)&0x07);
166166   //logerror("%04x: vb_scrollx_hi = %d\n",activecpu_get_previouspc(), vb_scrollx_hi);
167167}
168168
src/mame/drivers/batman.c
r2844r2845
9797
9898static READ16_HANDLER( special_port2_r )
9999{
100   int result = input_port_read_indexed(machine, 2);
100   int result = input_port_read(machine, "260010");
101101   if (atarigen_sound_to_cpu_ready) result ^= 0x0010;
102102   if (atarigen_cpu_to_sound_ready) result ^= 0x0020;
103103   return result;
r2844r2845
170170 *************************************/
171171
172172static INPUT_PORTS_START( batman )
173   PORT_START      /* 26000 */
173   PORT_START_TAG("260000")      /* 260000 */
174174   PORT_BIT( 0x01ff, IP_ACTIVE_LOW, IPT_UNUSED )
175175   PORT_BIT( 0x0200, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(1)
176176   PORT_BIT( 0x0400, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(1)
r2844r2845
180180   PORT_BIT( 0x4000, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_PLAYER(1)
181181   PORT_BIT( 0x8000, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_PLAYER(1)
182182
183   PORT_START      /* 26002 */
183   PORT_START_TAG("260002")      /* 260002 */
184184   PORT_BIT( 0xffff, IP_ACTIVE_LOW, IPT_UNUSED )
185185
186   PORT_START      /* 26010 */
186   PORT_START_TAG("260010")      /* 260010 */
187187   PORT_BIT( 0x000f, IP_ACTIVE_LOW, IPT_UNUSED )
188188   PORT_BIT( 0x0010, IP_ACTIVE_LOW, IPT_UNUSED )   /* Input buffer full (@260030) */
189189   PORT_BIT( 0x0020, IP_ACTIVE_LOW, IPT_UNUSED )   /* Output buffer full (@260040) */
src/mame/drivers/naomi.c
r2844r2845
516516static const struct sh4_config sh4cpu_config = {  1,  0,  1,  0,  0,  0,  1,  1,  0, CPU_CLOCK };
517517
518518static UINT32 *dc_sound_ram;
519extern UINT64 *dc_texture_ram;
520519static UINT32 rom_offset, dma_count;
521520UINT32 dma_offset;
522521
523522static INTERRUPT_GEN( naomi_vblank )
524523{
525   dc_vblank();
524   dc_vblank(machine);
526525}
527526
528527static READ64_HANDLER( naomi_arm_r )
src/mame/drivers/progolf.c
r2844r2845
4242#include "driver.h"
4343#include "cpu/m6502/m6502.h"
4444#include "sound/ay8910.h"
45#include "includes/btime.h"
4546
46extern UINT8 *deco_charram;
47
48PALETTE_INIT( btime );
49VIDEO_START( btime );
50VIDEO_UPDATE( progolf );
51
52READ8_HANDLER( btime_mirrorvideoram_r );
53WRITE8_HANDLER( btime_mirrorvideoram_w );
54
55WRITE8_HANDLER( deco_charram_w );
56
57
5847static ADDRESS_MAP_START( main_cpu, ADDRESS_SPACE_PROGRAM, 8 )
5948   AM_RANGE(0x0000, 0x0fff) AM_RAM
6049   AM_RANGE(0x1000, 0x1fff) AM_RAM //AM_WRITE(deco_charram_w) AM_BASE(&deco_charram)
src/mame/drivers/asteroid.c
r2844r2845
310310   PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_BUTTON2 ) PORT_CODE(KEYCODE_RIGHT) PORT_CODE(JOYCODE_X_RIGHT_SWITCH)/* right */
311311   PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_BUTTON1 ) PORT_CODE(KEYCODE_LEFT) PORT_CODE(JOYCODE_X_LEFT_SWITCH)   /* left */
312312
313   PORT_START_TAG("DSW")
313   PORT_START_TAG("DSW1")
314314   PORT_DIPNAME( 0x03, 0x00, DEF_STR( Language ) )   PORT_DIPLOCATION("SW:1,2")
315315   PORT_DIPSETTING (   0x00, DEF_STR( English ) )
316316   PORT_DIPSETTING (   0x01, DEF_STR( German ) )
r2844r2845
356356   PORT_BIT( 0x08, IP_ACTIVE_LOW,  IPT_COIN2 )
357357   PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_BUTTON3 ) PORT_CODE(KEYCODE_LCONTROL) PORT_CODE(JOYCODE_BUTTON1)      /* fire */
358358
359   PORT_MODIFY("DSW")
359   PORT_MODIFY("DSW1")
360360   PORT_DIPUNKNOWN_DIPLOC( 0x08, 0x08, "SW:4" )
361361   PORT_DIPUNKNOWN_DIPLOC( 0x10, 0x10, "SW:5" )
362362   PORT_DIPUNKNOWN_DIPLOC( 0x20, 0x20, "SW:6" )
r2844r2845
379379   PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_TILT )
380380   PORT_SERVICE( 0x80, IP_ACTIVE_LOW )
381381
382   PORT_MODIFY("DSW")
382   PORT_MODIFY("DSW1")
383383   PORT_DIPNAME( 0x03, 0x03, DEF_STR( Language ) )               PORT_DIPLOCATION("SW:1,2")
384384   PORT_DIPSETTING(    0x00, DEF_STR( English ) )
385385   PORT_DIPSETTING(    0x01, DEF_STR( French ) )
r2844r2845
512512   PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_BUTTON2 ) PORT_CODE(KEYCODE_RIGHT) PORT_CODE(JOYCODE_X_RIGHT_SWITCH)   /* right */
513513   PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_BUTTON1 ) PORT_CODE(KEYCODE_LEFT) PORT_CODE(JOYCODE_X_LEFT_SWITCH)      /* left */
514514
515   PORT_START_TAG("DSW")
515   PORT_START_TAG("DSW1")
516516   PORT_DIPNAME( 0x03, 0x00, "Right Coin" )         PORT_DIPLOCATION("P8:1,2") /* "Left Coin Mech always registers X 1" */
517517   PORT_DIPSETTING (   0x00, "X 1" )
518518   PORT_DIPSETTING (   0x01, "X 4" )
r2844r2845
548548static INPUT_PORTS_START( llander1 )
549549   PORT_INCLUDE( llander )
550550
551   PORT_MODIFY("DSW")
551   PORT_MODIFY("DSW1")
552552   PORT_DIPNAME( 0x10, 0x00, DEF_STR( Coinage ) )      PORT_DIPLOCATION("P8:5") /* "Left Coin Mech always registers X 1" */
553553   PORT_DIPSETTING (   0x00, DEF_STR( Normal ) )
554554   PORT_DIPSETTING (   0x10, DEF_STR( Free_Play ) )
src/mame/drivers/stv.c
r2844r2845
173173#include "machine/scudsp.h"
174174#include "sound/scsp.h"
175175#include "machine/stvprot.h"
176#include "includes/stv.h"
176177
177extern UINT32* stv_vdp2_regs;
178extern UINT32* stv_vdp2_vram;
179extern UINT32* stv_vdp2_cram;
180extern UINT32* stv_vdp1_vram;
181
182178#define USE_SLAVE 1
183179/*Enable the following to play 'myfairld' without using the -nosound switch.*/
184180#define UGLY_SOUND_HACK 0
r2844r2845
200196#define MASTER_CLOCK_352 57272800
201197#define MASTER_CLOCK_320 53748200
202198
203/* stvinit.c */
204DRIVER_INIT( ic13 );
205NVRAM_HANDLER( stv );
206void install_stvbios_speedups(running_machine *machine);
207DRIVER_INIT(bakubaku);
208DRIVER_INIT(mausuke);
209DRIVER_INIT(puyosun);
210DRIVER_INIT(shienryu);
211DRIVER_INIT(prikura);
212DRIVER_INIT(hanagumi);
213DRIVER_INIT(cottonbm);
214DRIVER_INIT(cotton2);
215DRIVER_INIT(fhboxers);
216DRIVER_INIT(dnmtdeka);
217DRIVER_INIT(groovef);
218DRIVER_INIT(danchih);
219DRIVER_INIT(astrass);
220DRIVER_INIT(thunt);
221DRIVER_INIT(grdforce);
222DRIVER_INIT(batmanfr);
223DRIVER_INIT(winterht);
224DRIVER_INIT(seabass);
225DRIVER_INIT(vfremix);
226DRIVER_INIT(diehard);
227DRIVER_INIT(sss);
228DRIVER_INIT(othellos);
229DRIVER_INIT(sasissu);
230DRIVER_INIT(gaxeduel);
231DRIVER_INIT(suikoenb);
232DRIVER_INIT(sokyugrt);
233DRIVER_INIT(znpwfv);
234DRIVER_INIT(twcup98);
235DRIVER_INIT(smleague);
236DRIVER_INIT(maruchan);
237DRIVER_INIT(sandor);
238DRIVER_INIT(colmns97);
239DRIVER_INIT(pblbeach);
240DRIVER_INIT(shanhigw);
241DRIVER_INIT(finlarch);
242DRIVER_INIT(elandore);
243DRIVER_INIT(rsgun);
244DRIVER_INIT(ffreveng);
245DRIVER_INIT(decathlt);
246DRIVER_INIT(nameclv3);
247
248199/**************************************************************************************/
249200/*to be added into a stv Header file,remember to remove all the static...*/
250201
r2844r2845
254205UINT32* stv_workram_l;
255206UINT32* stv_workram_h;
256207static UINT32* stv_backupram;
257extern UINT32* stv_scu;
258208static UINT32* ioga;
259209static UINT16* scsp_regs;
260210static UINT16* sound_ram;
r2844r2845
20612011}
20622012
20632013
2064extern WRITE32_HANDLER ( stv_vdp2_vram_w );
2065extern READ32_HANDLER ( stv_vdp2_vram_r );
2066
2067extern WRITE32_HANDLER ( stv_vdp2_cram_w );
2068extern READ32_HANDLER ( stv_vdp2_cram_r );
2069
2070extern WRITE32_HANDLER ( stv_vdp2_regs_w );
2071extern READ32_HANDLER ( stv_vdp2_regs_r );
2072
2073extern VIDEO_START ( stv_vdp2 );
2074extern VIDEO_UPDATE( stv_vdp2 );
2075
2076extern READ32_HANDLER( stv_vdp1_regs_r );
2077extern WRITE32_HANDLER( stv_vdp1_regs_w );
2078extern READ32_HANDLER ( stv_vdp1_vram_r );
2079extern WRITE32_HANDLER ( stv_vdp1_vram_w );
2080
2081extern WRITE32_HANDLER ( stv_vdp1_framebuffer0_w );
2082extern READ32_HANDLER ( stv_vdp1_framebuffer0_r );
2083
2084extern WRITE32_HANDLER ( stv_vdp1_framebuffer1_w );
2085extern READ32_HANDLER ( stv_vdp1_framebuffer1_r );
2086
20872014#ifdef UNUSED_FUNCTION
20882015static READ32_HANDLER( stv_sh2_random_r )
20892016{
src/mame/drivers/megatech.c
r2844r2845
9191
9292#define MASTER_CLOCK      53693100
9393
94/* give us access to the megadriv start and update functions so that we can call them */
95VIDEO_UPDATE( megadriv );
96VIDEO_START( megadriv );
97VIDEO_EOF( megadriv );
98MACHINE_RESET( megadriv );
99
100/* in drivers/segae.c */
101VIDEO_UPDATE( megatech_bios );
102VIDEO_EOF( megatech_bios );
103MACHINE_RESET( megatech_bios );
104DRIVER_INIT( megatech_bios );
105
106
10794/* not currently used */
10895static INPUT_PORTS_START( megatech ) /* Genesis Input Ports */
10996   PORT_INCLUDE(megadriv)
src/mame/drivers/champbwl.c
r2844r2845
159159static READ8_HANDLER( trackball_r )
160160{
161161   UINT8 ret;
162   UINT8 port4 = input_port_read_indexed(machine, 4);
163   UINT8 port5 = input_port_read_indexed(machine, 5);
162   UINT8 port4 = input_port_read(machine, "FAKEX");
163   UINT8 port5 = input_port_read(machine, "FAKEY");
164164
165165   ret = (((port4 - last_trackball_val[0]) & 0x0f)<<4) | ((port5 - last_trackball_val[1]) & 0x0f);
166166
r2844r2845
201201   AM_RANGE(0xe800, 0xe800) AM_WRITE(SMH_RAM) AM_BASE(&tnzs_bg_flag)   /* enable / disable background transparency */
202202
203203   AM_RANGE(0xf000, 0xf000) AM_READ(trackball_r)
204   AM_RANGE(0xf002, 0xf002) AM_READ(input_port_0_r)
205   AM_RANGE(0xf004, 0xf004) AM_READ(input_port_1_r)
206   AM_RANGE(0xf006, 0xf006) AM_READ(input_port_2_r)
207   AM_RANGE(0xf007, 0xf007) AM_READ(input_port_3_r)
204   AM_RANGE(0xf002, 0xf002) AM_READ_PORT("IN0")
205   AM_RANGE(0xf004, 0xf004) AM_READ_PORT("IN1")
206   AM_RANGE(0xf006, 0xf006) AM_READ_PORT("IN2")
207   AM_RANGE(0xf007, 0xf007) AM_READ_PORT("IN3")
208208
209209   AM_RANGE(0xf000, 0xf000) AM_WRITE(champbwl_misc_w)
210210   AM_RANGE(0xf002, 0xf002) AM_WRITENOP //buttons light?
r2844r2845
214214ADDRESS_MAP_END
215215
216216static INPUT_PORTS_START( champbwl )
217   PORT_START
217   PORT_START_TAG("IN0")
218218   PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON1 )
219219   PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON2 )
220220   PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_START1 )
r2844r2845
224224   PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_SPECIAL ) // INT( 4M)
225225   PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_SPECIAL ) // INT(16M)
226226
227   PORT_START
227   PORT_START_TAG("IN1")
228228   PORT_DIPNAME( 0x01, 0x01, DEF_STR( Unknown ) )
229229   PORT_DIPSETTING(    0x01, DEF_STR( Off ) )
230230   PORT_DIPSETTING(    0x00, DEF_STR( On ) )
r2844r2845
250250   PORT_DIPSETTING(    0x80, DEF_STR( Off ) )
251251   PORT_DIPSETTING(    0x00, DEF_STR( On ) )
252252
253   PORT_START
253   PORT_START_TAG("IN2")
254254   PORT_SERVICE_DIPLOC( 0x01, IP_ACTIVE_LOW, "SW1:1" )
255255   PORT_DIPNAME( 0x02, 0x02, DEF_STR( Cabinet ) ) PORT_DIPLOCATION("SW1:2")
256256   PORT_DIPSETTING(    0x02, DEF_STR( Upright ) )
r2844r2845
274274   PORT_DIPSETTING(    0x80, DEF_STR( Off ) )
275275   PORT_DIPSETTING(    0x00, DEF_STR( On ) )
276276
277   PORT_START
277   PORT_START_TAG("IN3")
278278   PORT_DIPNAME( 0x01, 0x01, DEF_STR( Flip_Screen ) ) PORT_DIPLOCATION("SW1:5")
279279   PORT_DIPSETTING(    0x01, DEF_STR( Off ) )
280280   PORT_DIPSETTING(    0x00, DEF_STR( On ) )
r2844r2845
299299   PORT_DIPSETTING(    0x80, DEF_STR( Off ) )
300300   PORT_DIPSETTING(    0x00, DEF_STR( On ) )
301301
302   PORT_START   /* FAKE */
302   PORT_START_TAG("FAKEX")      /* FAKE */
303303   PORT_BIT( 0xff, 0x00, IPT_TRACKBALL_X )PORT_SENSITIVITY(50) PORT_KEYDELTA(50) PORT_CENTERDELTA(0)
304304
305   PORT_START   /* FAKE */
305   PORT_START_TAG("FAKEY")      /* FAKE */
306306   PORT_BIT( 0xff, 0x00, IPT_TRACKBALL_Y ) PORT_SENSITIVITY(50) PORT_KEYDELTA(45) PORT_CENTERDELTA(0) PORT_REVERSE
307307INPUT_PORTS_END
308308
src/mame/drivers/bishi.c
r2844r2845
159159
160160static READ16_HANDLER( dipsw_r )   // dips
161161{
162   return input_port_read_indexed(machine, 1) | (input_port_read_indexed(machine, 5)<<8);
162   return input_port_read(machine, "DSW0") | (input_port_read(machine, "DSW1")<<8);
163163}
164164
165165static READ16_HANDLER( player1_r )    // players 1 and 3
166166{
167   return 0xff | (input_port_read_indexed(machine, 2)<<8);
167   return 0xff | (input_port_read(machine, "IN2")<<8);
168168}
169169
170170static READ16_HANDLER( player2_r )   // players 2 and 4
171171{
172   return input_port_read_indexed(machine, 3) | (input_port_read_indexed(machine, 4)<<8);
172   return input_port_read(machine, "IN3") | (input_port_read(machine, "IN4")<<8);
173173}
174174
175175static READ16_HANDLER( bishi_K056832_rom_r )
src/mame/drivers/bnstars.c
r2844r2845
533533}
534534
535535static INPUT_PORTS_START( bnstars )
536   PORT_START
536   PORT_START_TAG("IN0")
537537   PORT_BIT( 0x00000001, IP_ACTIVE_LOW, IPT_START1 )
538538   PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_MAHJONG_A )
539539   PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_MAHJONG_E )
r2844r2845
615615   PORT_DIPSETTING(  0x80000000, DEF_STR( Off ) )
616616   PORT_DIPSETTING(  0x00000000, DEF_STR( On ) )
617617
618   PORT_START
618   PORT_START_TAG("IN1")
619619   PORT_DIPNAME(     0x00000001, 0x00000001, "MAH2" )
620620   PORT_DIPSETTING(  0x00000001, DEF_STR( Off ) )
621621   PORT_DIPSETTING(  0x00000000, DEF_STR( On ) )
r2844r2845
703703   PORT_DIPSETTING(  0x80000000, DEF_STR( Off ) )
704704   PORT_DIPSETTING(  0x00000000, DEF_STR( On ) )
705705
706   PORT_START
706   PORT_START_TAG("IN2")
707707   PORT_DIPNAME(     0x00000001, 0x00000001, "MAH4" )
708708   PORT_DIPSETTING(  0x00000001, DEF_STR( Off ) )
709709   PORT_DIPSETTING(  0x00000000, DEF_STR( On ) )
r2844r2845
791791   PORT_DIPSETTING(  0x80000000, DEF_STR( Off ) )
792792   PORT_DIPSETTING(  0x00000000, DEF_STR( On ) )
793793
794   PORT_START
794   PORT_START_TAG("IN3")
795795   PORT_DIPNAME(     0x00000001, 0x00000001, "MAH6" )
796796   PORT_DIPSETTING(  0x00000001, DEF_STR( Off ) )
797797   PORT_DIPSETTING(  0x00000000, DEF_STR( On ) )
r2844r2845
881881   PORT_DIPSETTING(  0x80000000, DEF_STR( Off ) )
882882   PORT_DIPSETTING(  0x00000000, DEF_STR( On ) )
883883
884   PORT_START
884   PORT_START_TAG("IN4")
885885   PORT_BIT( 0x00000001, IP_ACTIVE_LOW, IPT_START2 )
886886   /* The follow 4 bits active 4 button each one for the second player */
887887   PORT_DIPNAME(     0x00000002, 0x00000002, "P2: A,B,C,D" )
r2844r2845
974974   PORT_DIPSETTING(  0x80000000, DEF_STR( Off ) )
975975   PORT_DIPSETTING(  0x00000000, DEF_STR( On ) )
976976
977   PORT_START
977   PORT_START_TAG("IN5")
978978   PORT_DIPNAME(     0x00000001, 0x00000001, "Test Mode" ) PORT_DIPLOCATION("SW1:8")
979979   PORT_DIPSETTING(  0x00000001, DEF_STR( Off ) )
980980   PORT_DIPSETTING(  0x00000000, DEF_STR( On ) )
r2844r2845
10731073   PORT_DIPSETTING(  0x80000000, DEF_STR( Off ) )
10741074   PORT_DIPSETTING(  0x00000000, DEF_STR( On ) )
10751075
1076   PORT_START
1076   PORT_START_TAG("IN6")
10771077   PORT_DIPNAME(     0x00000001, 0x00000001, "4" )
10781078   PORT_DIPSETTING(  0x00000001, DEF_STR( Off ) )
10791079   PORT_DIPSETTING(  0x00000000, DEF_STR( On ) )
r2844r2845
12011201         return 0xffffffff;
12021202
12031203      case 0x0000:
1204         return input_port_read_indexed(machine, 0);
1204         return input_port_read(machine, "IN0");
12051205
12061206      case 0x0080:
1207         return input_port_read_indexed(machine, 1);
1207         return input_port_read(machine, "IN1");
12081208
12091209      case 0x2000:
1210         return input_port_read_indexed(machine, 2);
1210         return input_port_read(machine, "IN2");
12111211
12121212      case 0x2080:
1213         return input_port_read_indexed(machine, 3);
1213         return input_port_read(machine, "IN3");
12141214
12151215   }
12161216}
12171217
12181218static READ32_HANDLER( bnstars2_r )
12191219{
1220   return input_port_read_indexed(machine, 4);
1220   return input_port_read(machine, "IN4");
12211221}
12221222
12231223static READ32_HANDLER( bnstars3_r )
12241224{
1225   return input_port_read_indexed(machine, 5);
1225   return input_port_read(machine, "IN5");
12261226}
12271227
12281228static WRITE32_HANDLER( bnstars1_mahjong_select_w )
src/mame/drivers/blackt96.c
r2844r2845
4444#include "driver.h"
4545#include "sound/okim6295.h"
4646
47VIDEO_START( blackt96 )
47static VIDEO_START( blackt96 )
4848{
4949
5050}
5151
52VIDEO_UPDATE( blackt96 )
53{
54   return 0;
55}
52static UINT16* blackt96_tilemapram;
53static UINT16* blackt96_tilemapram2;
5654
57static READ16_HANDLER( blackt96_80000_r )
55static VIDEO_UPDATE( blackt96 )
5856{
59   return 0x0000;
60}
57   int y,x;
58   int count = 0;
59   int base;
60   const gfx_element *gfx = screen->machine->gfx[2];
61   const gfx_element *gfxbg = screen->machine->gfx[0];
62   const gfx_element *gfxspr = screen->machine->gfx[1];
6163
62static READ16_HANDLER( blackt96_c0000_r )
63{
64   return 0x0000;
65}
64   count = 0;
65   for (x=0;x<64;x++)
66   {
67      for (y=0;y<32;y++)
68      {
69         UINT16 tile = (blackt96_tilemapram2[count*2 + (0x2000/2)+1]);
70         drawgfx(bitmap,gfxbg,tile,6,0,0,x*16,y*16,cliprect,TRANSPARENCY_NONE,0);
71         count++;
72      }
73   }
6674
67static READ16_HANDLER( blackt96_e0000_r )
68{
69   return 0x0000;
70}
75   /* the sprite are arranged in tilemaps.. I don't know how this works yet */
76   count = 0;
77   base = 0x1000;
78   for (x=0;x<32;x++)
79   {
80      for (y=0;y<32;y++)
81      {
82         UINT16 tile = (blackt96_tilemapram2[count*2 + (base/2)+1]&0x1fff);
83         UINT16 flipx = (blackt96_tilemapram2[count*2 + (base/2)+1]&0x4000);
84         UINT16 colour = (blackt96_tilemapram2[count*2 + (base/2)]&0x000f)+0x10;
7185
72static READ16_HANDLER( blackt96_e8000_r )
73{
74   return 0x0000;
75}
86         drawgfx(bitmap,gfxspr,tile,colour,flipx,0,x*16,y*16,cliprect,TRANSPARENCY_PEN,0);
87         count++;
88      }
89   }
90   count = 0;
91   base = 0x1800;
92   for (x=0;x<32;x++)
93   {
94      for (y=0;y<32;y++)
95      {
96         UINT16 tile = (blackt96_tilemapram2[count*2 + (base/2)+1]&0x1fff);
97         UINT16 flipx = (blackt96_tilemapram2[count*2 + (base/2)+1]&0x4000);
98         UINT16 colour = (blackt96_tilemapram2[count*2 + (base/2)]&0x000f)+0x10;
7699
77static READ16_HANDLER( blackt96_f0000_r )
78{
79   return 0x0000;
80}
100         drawgfx(bitmap,gfxspr,tile,colour,flipx,0,x*16,y*16,cliprect,TRANSPARENCY_PEN,0);
101         count++;
102      }
103   }
104   count = 0;
105   base = 0x3000;
106   for (x=0;x<32;x++)
107   {
108      for (y=0;y<32;y++)
109      {
110         UINT16 tile = (blackt96_tilemapram2[count*2 + (base/2)+1]&0x1fff);
111         UINT16 flipx = (blackt96_tilemapram2[count*2 + (base/2)+1]&0x4000);
112         UINT16 colour = (blackt96_tilemapram2[count*2 + (base/2)]&0x000f)+0x10;
81113
82static READ16_HANDLER( blackt96_f0008_r )
83{
84   return 0x0000;
114         drawgfx(bitmap,gfxspr,tile,colour,flipx,0,x*16,y*16,cliprect,TRANSPARENCY_PEN,0);
115         count++;
116      }
117   }
118   count = 0;
119   base = 0x3800;
120   for (x=0;x<32;x++)
121   {
122      for (y=0;y<32;y++)
123      {
124         UINT16 tile = (blackt96_tilemapram2[count*2 + (base/2)+1]&0x1fff);
125         UINT16 flipx = (blackt96_tilemapram2[count*2 + (base/2)+1]&0x4000);
126         UINT16 colour = (blackt96_tilemapram2[count*2 + (base/2)]&0x000f)+0x10;
127
128         drawgfx(bitmap,gfxspr,tile,colour,flipx,0,x*16,y*16,cliprect,TRANSPARENCY_PEN,0);
129         count++;
130      }
131   }
132   base = 0x4000;
133   for (x=0;x<32;x++)
134   {
135      for (y=0;y<32;y++)
136      {
137         UINT16 tile = (blackt96_tilemapram2[count*2 + (base/2)+1]&0x1fff);
138         UINT16 flipx = (blackt96_tilemapram2[count*2 + (base/2)+1]&0x4000);
139         UINT16 colour = (blackt96_tilemapram2[count*2 + (base/2)]&0x000f)+0x10;
140
141         drawgfx(bitmap,gfxspr,tile,colour,flipx,0,x*16,y*16,cliprect,TRANSPARENCY_PEN,0);
142         count++;
143      }
144   }
145   base = 0x4800;
146   for (x=0;x<32;x++)
147   {
148      for (y=0;y<32;y++)
149      {
150         UINT16 tile = (blackt96_tilemapram2[count*2 + (base/2)+1]&0x1fff);
151         UINT16 flipx = (blackt96_tilemapram2[count*2 + (base/2)+1]&0x4000);
152         UINT16 colour = (blackt96_tilemapram2[count*2 + (base/2)]&0x000f)+0x10;
153
154         drawgfx(bitmap,gfxspr,tile,colour,flipx,0,x*16,y*16,cliprect,TRANSPARENCY_PEN,0);
155         count++;
156      }
157   }
158
159   /* Text Layer */
160   count = 0;
161   for (x=0;x<64;x++)
162   {
163      for (y=0;y<32;y++)
164      {
165         UINT16 tile = (blackt96_tilemapram[count*2]&0x7ff)+0x800; // +0xc00 for korean text
166         drawgfx(bitmap,gfx,tile,0,0,0,x*8,y*8,cliprect,TRANSPARENCY_PEN,0);
167         count++;
168      }
169
170   }
171
172
173
174
175   return 0;
85176}
86177
178
87179static WRITE16_HANDLER( blackt96_c0000_w )
88180{
89181   printf("blackt96_c0000_w %04x %04x\n",data,mem_mask);
90182}
91183
184static WRITE16_HANDLER( blackt96_80000_w )
185{
186   // TO sound MCU?
187   //printf("blackt96_80000_w %04x %04x\n",data,mem_mask);
188}
189
190
92191static ADDRESS_MAP_START( blackt96_map, ADDRESS_SPACE_PROGRAM, 16 )
93192   AM_RANGE(0x000000, 0x07ffff) AM_ROM
94   AM_RANGE(0x080000, 0x080001) AM_READ(blackt96_80000_r) AM_WRITE(SMH_NOP)
95   AM_RANGE(0x0c0000, 0x0c0001) AM_READ(blackt96_c0000_r) AM_WRITE(blackt96_c0000_w)
96   AM_RANGE(0x0e0000, 0x0e0001) AM_READ(blackt96_e0000_r)
97   AM_RANGE(0x0e8000, 0x0e8001) AM_READ(blackt96_e8000_r)
98   AM_RANGE(0x0f0000, 0x0f0001) AM_READ(blackt96_f0000_r)
99   AM_RANGE(0x0f0008, 0x0f0009) AM_READ(blackt96_f0008_r)
193   AM_RANGE(0x080000, 0x080001) AM_READ(input_port_0_word_r) AM_WRITE(blackt96_80000_w)  // PLAYER INPUT
194   AM_RANGE(0x0c0000, 0x0c0001) AM_READ(input_port_1_word_r) AM_WRITE(blackt96_c0000_w) // COIN INPUT
195   AM_RANGE(0x0e0000, 0x0e0001) AM_READ(input_port_2_word_r)
196   AM_RANGE(0x0e8000, 0x0e8001) AM_READ(input_port_3_word_r)
197   AM_RANGE(0x0f0000, 0x0f0001) AM_READ(input_port_4_word_r) // DSW1
198   AM_RANGE(0x0f0008, 0x0f0009) AM_READ(input_port_5_word_r) // DSW2
100199
101   AM_RANGE(0x100000, 0x100fff) AM_RAM
102   AM_RANGE(0x200000, 0x207fff) AM_RAM
103   AM_RANGE(0x400000, 0x400fff) AM_RAM
200   AM_RANGE(0x100000, 0x100fff) AM_RAM AM_BASE(&blackt96_tilemapram) // text tilemap
201   AM_RANGE(0x200000, 0x207fff) AM_RAM AM_BASE(&blackt96_tilemapram2)// sprite list?
202   AM_RANGE(0x400000, 0x400fff) AM_RAM AM_WRITE(paletteram16_xxxxRRRRGGGGBBBB_word_w) AM_BASE(&paletteram16)
104203   AM_RANGE(0xc00000, 0xc03fff) AM_RAM // main ram
105204
106205ADDRESS_MAP_END
r2844r2845
108207
109208
110209static INPUT_PORTS_START( blackt96 )
111   PORT_START
112   PORT_BIT( 0xffff, IP_ACTIVE_LOW, IPT_UNKNOWN )
210    PORT_START
211   PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_PLAYER(1)
212   PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_PLAYER(1)
213   PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_PLAYER(1)
214   PORT_BIT( 0x0008, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_PLAYER(1)
215   PORT_BIT( 0x0010, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(1)
216   PORT_BIT( 0x0020, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(1)
217   PORT_BIT( 0x0040, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_PLAYER(1)
218   PORT_BIT( 0x0080, IP_ACTIVE_LOW, IPT_START1 )
219   PORT_BIT( 0x0100, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_PLAYER(2)
220   PORT_BIT( 0x0200, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_PLAYER(2)
221   PORT_BIT( 0x0400, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_PLAYER(2)
222   PORT_BIT( 0x0800, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_PLAYER(2)
223   PORT_BIT( 0x1000, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(2)
224   PORT_BIT( 0x2000, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(2)
225   PORT_BIT( 0x4000, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_PLAYER(2)
226   PORT_BIT( 0x8000, IP_ACTIVE_LOW, IPT_START2 )
227
228    PORT_START
229   PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_COIN1 ) // Test mode lists this as Service 1, but it appears to be Coin 1 (uses Coin 1 coinage etc.)
230    PORT_DIPNAME( 0x0002, 0x0002, "xx")
231    PORT_DIPSETTING(      0x0002, DEF_STR( Off ) )
232    PORT_DIPSETTING(      0x0000, DEF_STR( On ) )
233    PORT_DIPNAME( 0x0004, 0x0004, DEF_STR( Unknown ) )
234    PORT_DIPSETTING(      0x0004, DEF_STR( Off ) )
235    PORT_DIPSETTING(      0x0000, DEF_STR( On ) )
236    PORT_DIPNAME( 0x0008, 0x0008, DEF_STR( Unknown ) )
237    PORT_DIPSETTING(      0x0008, DEF_STR( Off ) )
238    PORT_DIPSETTING(      0x0000, DEF_STR( On ) )
239    PORT_DIPNAME( 0x0010, 0x0010, DEF_STR( Unknown ) ) // Test mode lists this as Coin 1, but it doesn't work
240    PORT_DIPSETTING(      0x0010, DEF_STR( Off ) )
241    PORT_DIPSETTING(      0x0000, DEF_STR( On ) )
242   PORT_BIT( 0x0020, IP_ACTIVE_LOW, IPT_COIN2 )
243    PORT_DIPNAME( 0x0040, 0x0040, DEF_STR( Unknown ) )
244    PORT_DIPSETTING(      0x0040, DEF_STR( Off ) )
245    PORT_DIPSETTING(      0x0000, DEF_STR( On ) )
246    PORT_DIPNAME( 0x0080, 0x0080, DEF_STR( Unknown ) )
247    PORT_DIPSETTING(      0x0080, DEF_STR( Off ) )
248    PORT_DIPSETTING(      0x0000, DEF_STR( On ) )
249    PORT_DIPNAME( 0x0100, 0x0100, DEF_STR( Unknown ) )
250    PORT_DIPSETTING(      0x0100, DEF_STR( Off ) )
251    PORT_DIPSETTING(      0x0000, DEF_STR( On ) )
252    PORT_DIPNAME( 0x0200, 0x0200, DEF_STR( Unknown ) )
253    PORT_DIPSETTING(      0x0200, DEF_STR( Off ) )
254    PORT_DIPSETTING(      0x0000, DEF_STR( On ) )
255    PORT_DIPNAME( 0x0400, 0x0400, DEF_STR( Unknown ) )
256    PORT_DIPSETTING(      0x0400, DEF_STR( Off ) )
257    PORT_DIPSETTING(      0x0000, DEF_STR( On ) )
258    PORT_DIPNAME( 0x0800, 0x0800, DEF_STR( Unknown ) )
259    PORT_DIPSETTING(      0x0800, DEF_STR( Off ) )
260    PORT_DIPSETTING(      0x0000, DEF_STR( On ) )
261    PORT_DIPNAME( 0x1000, 0x1000, DEF_STR( Unknown ) )
262    PORT_DIPSETTING(      0x1000, DEF_STR( Off ) )
263    PORT_DIPSETTING(      0x0000, DEF_STR( On ) )
264    PORT_DIPNAME( 0x2000, 0x2000, DEF_STR( Unknown ) )
265    PORT_DIPSETTING(      0x2000, DEF_STR( Off ) )
266    PORT_DIPSETTING(      0x0000, DEF_STR( On ) )
267    PORT_DIPNAME( 0x4000, 0x4000, DEF_STR( Unknown ) )
268    PORT_DIPSETTING(      0x4000, DEF_STR( Off ) )
269    PORT_DIPSETTING(      0x0000, DEF_STR( On ) )
270    PORT_DIPNAME( 0x8000, 0x8000, DEF_STR( Unknown ) )
271    PORT_DIPSETTING(      0x8000, DEF_STR( Off ) )
272    PORT_DIPSETTING(      0x0000, DEF_STR( On ) )
273
274    PORT_START
275    PORT_DIPNAME( 0x0001, 0x0001, "2" )
276    PORT_DIPSETTING(      0x0001, DEF_STR( Off ) )
277    PORT_DIPSETTING(      0x0000, DEF_STR( On ) )
278    PORT_DIPNAME( 0x0002, 0x0002, DEF_STR( Unknown ) )
279    PORT_DIPSETTING(      0x0002, DEF_STR( Off ) )
280    PORT_DIPSETTING(      0x0000, DEF_STR( On ) )
281    PORT_DIPNAME( 0x0004, 0x0004, DEF_STR( Unknown ) )
282    PORT_DIPSETTING(      0x0004, DEF_STR( Off ) )
283    PORT_DIPSETTING(      0x0000, DEF_STR( On ) )
284    PORT_DIPNAME( 0x0008, 0x0008, DEF_STR( Unknown ) )
285    PORT_DIPSETTING(      0x0008, DEF_STR( Off ) )
286    PORT_DIPSETTING(      0x0000, DEF_STR( On ) )
287    PORT_DIPNAME( 0x0010, 0x0010, DEF_STR( Unknown ) )
288    PORT_DIPSETTING(      0x0010, DEF_STR( Off ) )
289    PORT_DIPSETTING(      0x0000, DEF_STR( On ) )
290    PORT_DIPNAME( 0x0020, 0x0020, DEF_STR( Unknown ) )
291    PORT_DIPSETTING(      0x0020, DEF_STR( Off ) )
292    PORT_DIPSETTING(      0x0000, DEF_STR( On ) )
293    PORT_DIPNAME( 0x0040, 0x0040, DEF_STR( Unknown ) )
294    PORT_DIPSETTING(      0x0040, DEF_STR( Off ) )
295    PORT_DIPSETTING(      0x0000, DEF_STR( On ) )
296    PORT_DIPNAME( 0x0080, 0x0080, DEF_STR( Unknown ) )
297    PORT_DIPSETTING(      0x0080, DEF_STR( Off ) )
298    PORT_DIPSETTING(      0x0000, DEF_STR( On ) )
299    PORT_DIPNAME( 0x0100, 0x0100, DEF_STR( Unknown ) )
300    PORT_DIPSETTING(      0x0100, DEF_STR( Off ) )
301    PORT_DIPSETTING(      0x0000, DEF_STR( On ) )
302    PORT_DIPNAME( 0x0200, 0x0200, DEF_STR( Unknown ) )
303    PORT_DIPSETTING(      0x0200, DEF_STR( Off ) )
304    PORT_DIPSETTING(      0x0000, DEF_STR( On ) )
305    PORT_DIPNAME( 0x0400, 0x0400, DEF_STR( Unknown ) )
306    PORT_DIPSETTING(      0x0400, DEF_STR( Off ) )
307    PORT_DIPSETTING(      0x0000, DEF_STR( On ) )
308    PORT_DIPNAME( 0x0800, 0x0800, DEF_STR( Unknown ) )
309    PORT_DIPSETTING(      0x0800, DEF_STR( Off ) )
310    PORT_DIPSETTING(      0x0000, DEF_STR( On ) )
311    PORT_DIPNAME( 0x1000, 0x1000, DEF_STR( Unknown ) )
312    PORT_DIPSETTING(      0x1000, DEF_STR( Off ) )
313    PORT_DIPSETTING(      0x0000, DEF_STR( On ) )
314    PORT_DIPNAME( 0x2000, 0x2000, DEF_STR( Unknown ) )
315    PORT_DIPSETTING(      0x2000, DEF_STR( Off ) )
316    PORT_DIPSETTING(      0x0000, DEF_STR( On ) )
317    PORT_DIPNAME( 0x4000, 0x4000, DEF_STR( Unknown ) )
318    PORT_DIPSETTING(      0x4000, DEF_STR( Off ) )
319    PORT_DIPSETTING(      0x0000, DEF_STR( On ) )
320    PORT_DIPNAME( 0x8000, 0x8000, DEF_STR( Unknown ) )
321    PORT_DIPSETTING(      0x8000, DEF_STR( Off ) )
322    PORT_DIPSETTING(      0x0000, DEF_STR( On ) )
323
324    PORT_START
325    PORT_DIPNAME( 0x0001, 0x0001, "3" )
326    PORT_DIPSETTING(      0x0001, DEF_STR( Off ) )
327    PORT_DIPSETTING(      0x0000, DEF_STR( On ) )
328    PORT_DIPNAME( 0x0002, 0x0002, DEF_STR( Unknown ) )
329    PORT_DIPSETTING(      0x0002, DEF_STR( Off ) )
330    PORT_DIPSETTING(      0x0000, DEF_STR( On ) )
331    PORT_DIPNAME( 0x0004, 0x0004, DEF_STR( Unknown ) )
332    PORT_DIPSETTING(      0x0004, DEF_STR( Off ) )
333    PORT_DIPSETTING(      0x0000, DEF_STR( On ) )
334    PORT_DIPNAME( 0x0008, 0x0008, DEF_STR( Unknown ) )
335    PORT_DIPSETTING(      0x0008, DEF_STR( Off ) )
336    PORT_DIPSETTING(      0x0000, DEF_STR( On ) )
337    PORT_DIPNAME( 0x0010, 0x0010, DEF_STR( Unknown ) )
338    PORT_DIPSETTING(      0x0010, DEF_STR( Off ) )
339    PORT_DIPSETTING(      0x0000, DEF_STR( On ) )
340    PORT_DIPNAME( 0x0020, 0x0020, DEF_STR( Unknown ) )
341    PORT_DIPSETTING(      0x0020, DEF_STR( Off ) )
342    PORT_DIPSETTING(      0x0000, DEF_STR( On ) )
343    PORT_DIPNAME( 0x0040, 0x0040, DEF_STR( Unknown ) )
344    PORT_DIPSETTING(      0x0040, DEF_STR( Off ) )
345    PORT_DIPSETTING(      0x0000, DEF_STR( On ) )
346    PORT_DIPNAME( 0x0080, 0x0080, DEF_STR( Unknown ) )
347    PORT_DIPSETTING(      0x0080, DEF_STR( Off ) )
348    PORT_DIPSETTING(      0x0000, DEF_STR( On ) )
349    PORT_DIPNAME( 0x0100, 0x0100, DEF_STR( Unknown ) )
350    PORT_DIPSETTING(      0x0100, DEF_STR( Off ) )
351    PORT_DIPSETTING(      0x0000, DEF_STR( On ) )
352    PORT_DIPNAME( 0x0200, 0x0200, DEF_STR( Unknown ) )
353    PORT_DIPSETTING(      0x0200, DEF_STR( Off ) )
354    PORT_DIPSETTING(      0x0000, DEF_STR( On ) )
355    PORT_DIPNAME( 0x0400, 0x0400, DEF_STR( Unknown ) )
356    PORT_DIPSETTING(      0x0400, DEF_STR( Off ) )
357    PORT_DIPSETTING(      0x0000, DEF_STR( On ) )
358    PORT_DIPNAME( 0x0800, 0x0800, DEF_STR( Unknown ) )
359    PORT_DIPSETTING(      0x0800, DEF_STR( Off ) )
360    PORT_DIPSETTING(      0x0000, DEF_STR( On ) )
361    PORT_DIPNAME( 0x1000, 0x1000, DEF_STR( Unknown ) )
362    PORT_DIPSETTING(      0x1000, DEF_STR( Off ) )
363    PORT_DIPSETTING(      0x0000, DEF_STR( On ) )
364    PORT_DIPNAME( 0x2000, 0x2000, DEF_STR( Unknown ) )
365    PORT_DIPSETTING(      0x2000, DEF_STR( Off ) )
366    PORT_DIPSETTING(      0x0000, DEF_STR( On ) )
367    PORT_DIPNAME( 0x4000, 0x4000, DEF_STR( Unknown ) )
368    PORT_DIPSETTING(      0x4000, DEF_STR( Off ) )
369    PORT_DIPSETTING(      0x0000, DEF_STR( On ) )
370    PORT_DIPNAME( 0x8000, 0x8000, DEF_STR( Unknown ) )
371    PORT_DIPSETTING(      0x8000, DEF_STR( Off ) )
372    PORT_DIPSETTING(      0x0000, DEF_STR( On ) )
373
374    /* Dipswitch Port A */
375    PORT_START
376
377    PORT_DIPNAME( 0x0300, 0x0100, DEF_STR( Coin_B ) )
378    PORT_DIPSETTING(      0x0000, DEF_STR( 1C_1C ) )
379    PORT_DIPSETTING(      0x0200, DEF_STR( 1C_2C ) )
380    PORT_DIPSETTING(      0x0100, DEF_STR( 1C_3C ) )
381    PORT_DIPSETTING(      0x0300, DEF_STR( 1C_4C ) )
382
383    PORT_DIPNAME( 0x0c00, 0x0c00, DEF_STR( Coin_A ) )
384    PORT_DIPSETTING(      0x0c00, DEF_STR( 4C_1C ) )
385    PORT_DIPSETTING(      0x0400, DEF_STR( 3C_1C ) )
386    PORT_DIPSETTING(      0x0800, DEF_STR( 2C_1C ) )
387    PORT_DIPSETTING(      0x0000, DEF_STR( 1C_1C ) )
388
389    PORT_DIPNAME( 0x1000, 0x1000, DEF_STR( Lives ) )
390    PORT_DIPSETTING(      0x0000, "2" )
391    PORT_DIPSETTING(      0x1000, "3" )
392
393    PORT_DIPNAME( 0x2000, 0x2000, "Bonus Life Type" )
394    PORT_DIPSETTING(      0x2000, "Every" )
395    PORT_DIPSETTING(      0x0000, "Second Only" )
396
397    PORT_DIPNAME( 0x4000, 0x4000, DEF_STR( Unused ) ) // ?
398    PORT_DIPSETTING(      0x4000, DEF_STR( Off ) )
399    PORT_DIPSETTING(      0x0000, DEF_STR( On ) )
400
401    PORT_DIPNAME( 0x8000, 0x8000, DEF_STR( Flip_Screen ) )
402    PORT_DIPSETTING(      0x8000, DEF_STR( Off ) )
403    PORT_DIPSETTING(      0x0000, DEF_STR( On ) )
404
405    /* Dipswitch Port B */
406    PORT_START
407
408   PORT_SERVICE( 0x0100, IP_ACTIVE_HIGH )
409
410    PORT_DIPNAME( 0x0200, 0x0200, "Continue" )
411
412    PORT_DIPSETTING(      0x0200, DEF_STR( Off ) )
413    PORT_DIPSETTING(      0x0000, DEF_STR( On ) )
414    PORT_DIPNAME( 0x0c00, 0x0400, DEF_STR( Bonus_Life ) )
415    PORT_DIPSETTING(      0x0000, "20000 / 50000" )
416    PORT_DIPSETTING(      0x0400, "60000 / 150000" )
417    PORT_DIPSETTING(      0x0800, "40000 / 100000" )
418    PORT_DIPSETTING(      0x0c00, "No Bonus" )
419
420    PORT_DIPNAME( 0x3000, 0x0000, "Demo Sound / Video Freeze" )
421    PORT_DIPSETTING(      0x0000, "Demo Sound On" )
422    PORT_DIPSETTING(      0x1000, "Never Finish" )
423    PORT_DIPSETTING(      0x2000, "Demo Sound Off" )
424    PORT_DIPSETTING(      0x3000, "Stop Video" )
425
426    PORT_DIPNAME( 0xc000, 0xc000, DEF_STR( Difficulty ) ) // 'Level'
427    PORT_DIPSETTING(      0x8000, "1" )
428    PORT_DIPSETTING(      0x0000, "2" )
429    PORT_DIPSETTING(      0x4000, "3" )
430    PORT_DIPSETTING(      0xc000, "4" )
113431INPUT_PORTS_END
114432
115433
r2844r2845
126444   32*64
127445};
128446
447static const gfx_layout blackt962_layout =
448{
449   16,16,
450   RGN_FRAC(1,1),
451   4,
452   { 0,16,8, 24 },
453   { 519, 515, 518, 514,  517,513,  516,512, 7,3,6,2,5,1,4,0 },
454   { 0*32, 1*32, 2*32, 3*32, 4*32, 5*32, 6*32, 7*32,8*32,9*32,10*32,11*32,12*32,13*32,14*32,15*32 },
455   32*32
456};
129457
458
459/* wrong layout, but we can see some tiles */
460static const gfx_layout blackt963_layout =
461{
462   8,8,
463   RGN_FRAC(1,1),
464   4,
465   { 0,4,8, 12 },
466   { 131,130,129,128,3,2,1,0 },
467   { 0*16, 1*16, 2*16, 3*16, 4*16, 5*16, 6*16, 7*16 },
468   16*16
469};
470
130471static GFXDECODE_START( blackt96 )
131   GFXDECODE_ENTRY( REGION_GFX1, 0, blackt96_layout,   0x0, 2  )
132   GFXDECODE_ENTRY( REGION_GFX2, 0, blackt96_layout,   0x0, 2  )
133   GFXDECODE_ENTRY( REGION_GFX3, 0, blackt96_layout,   0x0, 2  )
472   GFXDECODE_ENTRY( REGION_GFX1, 0, blackt96_layout,   0x0, 0x10  )
473   GFXDECODE_ENTRY( REGION_GFX2, 0, blackt962_layout,   0x0, 0x80  )
474   GFXDECODE_ENTRY( REGION_GFX3, 0, blackt963_layout,   0x0, 0x80  )
134475GFXDECODE_END
135476
477static ADDRESS_MAP_START( sound_io_map, ADDRESS_SPACE_IO, 8 )
478ADDRESS_MAP_END
136479
137480static MACHINE_DRIVER_START( blackt96 )
138481   MDRV_CPU_ADD_TAG("main", M68000, 18000000 /2)
139482   MDRV_CPU_PROGRAM_MAP(blackt96_map,0)
140483   MDRV_CPU_VBLANK_INT("main", irq1_line_hold)
141484
485   MDRV_CPU_ADD(PIC16C57, 8000000)   /* ? */
486   MDRV_CPU_FLAGS(CPU_DISABLE)
487   MDRV_CPU_IO_MAP(sound_io_map, 0)
488
142489   MDRV_GFXDECODE(blackt96)
143490
144491   MDRV_SCREEN_ADD("main", RASTER)
145492   MDRV_SCREEN_REFRESH_RATE(60)
146493   MDRV_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(0))
147494   MDRV_SCREEN_FORMAT(BITMAP_FORMAT_INDEXED16)
148   MDRV_SCREEN_SIZE(64*8, 32*8)
149   MDRV_SCREEN_VISIBLE_AREA(8*8, 48*8-1, 2*8, 30*8-1)
495   MDRV_SCREEN_SIZE(64*16, 64*8)
496//  MDRV_SCREEN_VISIBLE_AREA(0*8, 16*32-1, 0*8, 16*32-1)
497   MDRV_SCREEN_VISIBLE_AREA(0*8, 8*32-1, 2*8, 8*30-1)
150498
151   MDRV_PALETTE_LENGTH(0x200)
499   MDRV_PALETTE_LENGTH(0x800)
152500
153501   MDRV_VIDEO_START(blackt96)
154502   MDRV_VIDEO_UPDATE(blackt96)
r2844r2845
161509   MDRV_SOUND_ROUTE(ALL_OUTPUTS, "right", 0.47)
162510
163511   MDRV_SOUND_ADD(OKIM6295, 8000000/8)
164   MDRV_SOUND_CONFIG(okim6295_interface_region_1_pin7high)
512   MDRV_SOUND_CONFIG(okim6295_interface_region_2_pin7high)
165513   MDRV_SOUND_ROUTE(ALL_OUTPUTS, "left", 0.47)
166514   MDRV_SOUND_ROUTE(ALL_OUTPUTS, "right", 0.47)
167515MACHINE_DRIVER_END
r2844r2845
172520   ROM_LOAD16_BYTE( "3", 0x00001, 0x40000, CRC(fc2c1d79) SHA1(742478237819af16d3fd66039283202b3c07eedd) )
173521   ROM_LOAD16_BYTE( "4", 0x00000, 0x40000, CRC(caff5b4a) SHA1(9a388cbb07211fa66f27082a8a5b847168c86a4f) )
174522
523   ROM_REGION( 0x80000, REGION_CPU2, 0 ) /* PIC16c57 Code */
524   ROM_LOAD( "pic16c57", 0x00000, 0x1000, NO_DUMP )
525
175526   ROM_REGION( 0x080000, REGION_SOUND1, 0 ) /* Samples */
176527   ROM_LOAD( "1", 0x00000, 0x80000, CRC(6a934174) SHA1(087f5fa226dc68ee217f99c64d16cdf14372d44c) )
177528
178529   ROM_REGION( 0x040000, REGION_SOUND2, 0 ) /* Samples */
179530   ROM_LOAD( "2", 0x00000, 0x40000, CRC(94009cd4) SHA1(aa36298e280c20bf86d70f3eb3fb33aca4df07e3) )
180531
181   ROM_REGION( 0x180000, REGION_GFX1, 0 ) // tiles, 16x16x8
182   ROM_LOAD16_BYTE( "5", 0x00000, 0x40000, CRC(6e52c331) SHA1(31ef1d352d4ee5f7b3ef336b1f052c3a1468f22e) )
183   ROM_LOAD16_BYTE( "6", 0x00001, 0x40000, CRC(69637a5a) SHA1(a5731478856d8bb91d34b747838b2b47772864ef) )
184   ROM_LOAD16_BYTE( "7", 0x80000, 0x80000, CRC(6b04e8a8) SHA1(309ba1efd60600a30e1ae8f6e8b92939c23cd9c6) )
185   ROM_LOAD16_BYTE( "8", 0x80001, 0x80000, CRC(16c656be) SHA1(06c40c16080a97b01a638776d28f36594ce4fb3b) )
532   ROM_REGION( 0x200000, REGION_GFX1, 0 ) // bg tiles
533   ROM_LOAD16_BYTE( "5", 0x100000, 0x40000, CRC(6e52c331) SHA1(31ef1d352d4ee5f7b3ef336b1f052c3a1468f22e) )
534   ROM_LOAD16_BYTE( "6", 0x100001, 0x40000, CRC(69637a5a) SHA1(a5731478856d8bb91d34b747838b2b47772864ef) )
535   ROM_LOAD16_BYTE( "7", 0x000000, 0x80000, CRC(6b04e8a8) SHA1(309ba1efd60600a30e1ae8f6e8b92939c23cd9c6) )
536   ROM_LOAD16_BYTE( "8", 0x000001, 0x80000, CRC(16c656be) SHA1(06c40c16080a97b01a638776d28f36594ce4fb3b) )
186537
187   ROM_REGION( 0x100000, REGION_GFX2, 0 ) // not tiles?
188   ROM_LOAD( "11", 0x00000, 0x40000, CRC(9eb773a3) SHA1(9c91ee938438a61f5fa650ced6249e34aa5321bd) )
189   ROM_LOAD( "12", 0x40000, 0x40000, CRC(8894e608) SHA1(389974a0b208b7cbf7d5f83641ddc058ad5ebe87) )
190   ROM_LOAD( "13", 0x80000, 0x40000, CRC(0acceb9d) SHA1(e8a85c7eab45d84613ac37a9b7ffbc45b44eb2e5) )
191   ROM_LOAD( "14", 0xc0000, 0x40000, CRC(b5e3de25) SHA1(33ac5602ab6bcadc8b0d1aa805a3bdce0b67c215) )
538   ROM_REGION( 0x100000, REGION_GFX2, 0 ) // sprite tiles
539   ROM_LOAD32_BYTE( "11", 0x00000, 0x40000, CRC(9eb773a3) SHA1(9c91ee938438a61f5fa650ced6249e34aa5321bd) )
540   ROM_LOAD32_BYTE( "12", 0x00001, 0x40000, CRC(8894e608) SHA1(389974a0b208b7cbf7d5f83641ddc058ad5ebe87) )
541   ROM_LOAD32_BYTE( "13", 0x00002, 0x40000, CRC(0acceb9d) SHA1(e8a85c7eab45d84613ac37a9b7ffbc45b44eb2e5) )
542   ROM_LOAD32_BYTE( "14", 0x00003, 0x40000, CRC(b5e3de25) SHA1(33ac5602ab6bcadc8b0d1aa805a3bdce0b67c215) )
192543
193   ROM_REGION( 0x100000, REGION_GFX3, 0 ) // not tiles?
194   ROM_LOAD( "9",  0x00000, 0x10000, CRC(81a4cf4c) SHA1(94b2bbcbc8327d9babbc3b222bd88954c7e7b80e) )
195   ROM_LOAD( "10", 0x10000, 0x10000, CRC(b78232a2) SHA1(36a4f01011faf64e46b73f0082ab04843ac8b0e2) )
544   ROM_REGION( 0x20000, REGION_GFX3, 0 ) // txt tiles
545   ROM_LOAD16_BYTE( "9",  0x00000, 0x10000, CRC(81a4cf4c) SHA1(94b2bbcbc8327d9babbc3b222bd88954c7e7b80e) )
546   ROM_LOAD16_BYTE( "10", 0x00001, 0x10000, CRC(b78232a2) SHA1(36a4f01011faf64e46b73f0082ab04843ac8b0e2) )
196547ROM_END
197548
198GAME( 1996, blackt96,    0,        blackt96,    blackt96,    0, ROT0,  "D.G.R.M.", "Black Touch '96", GAME_NOT_WORKING )
549GAME( 1996, blackt96,    0,        blackt96,    blackt96,    0, ROT0,  "D.G.R.M.", "Black Touch '96", GAME_NOT_WORKING | GAME_NO_SOUND )
src/mame/drivers/dreamwld.c
r2844r2845
192192
193193static READ32_HANDLER( dreamwld_inputs_r )
194194{
195   return input_port_read_indexed(machine, 1)|(input_port_read_indexed(machine, 0)<<16);
195   return input_port_read(machine, "IN1")|(input_port_read(machine, "IN0")<<16);
196196}
197197
198198static READ32_HANDLER( dreamwld_dips_r )
199199{
200200   int x;
201   x= input_port_read_indexed(machine, 2);
201   x= input_port_read(machine, "DSW");
202202   return x|(x<<16);
203203}
204204
r2844r2845
313313
314314
315315static INPUT_PORTS_START(dreamwld)
316   PORT_START
316   PORT_START_TAG("IN0")
317317   PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_START2 )
318318   PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_PLAYER(2)
319319   PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(2)
r2844r2845
331331   PORT_BIT( 0x4000, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_PLAYER(1)
332332   PORT_BIT( 0x8000, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_PLAYER(1)
333333
334   PORT_START
334   PORT_START_TAG("IN1")
335335   PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_COIN1 )
336336   PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_COIN2 )
337337   PORT_DIPNAME( 0x0004, 0x0004, "Not Dips?" ) // i don't think these are dips, they're probably just unused parts of the coin port input
r2844r2845
377377   PORT_DIPSETTING(      0x8000, DEF_STR( Off ) )
378378   PORT_DIPSETTING(      0x0000, DEF_STR( On ) )
379379
380   PORT_START   /* 16bit */
380   PORT_START_TAG("DSW")   /* 16bit */
381381   PORT_DIPNAME( 0x0003, 0x0003, DEF_STR( Lives ) )        PORT_DIPLOCATION("SW2:1,2")
382382   PORT_DIPSETTING(      0x0001, "1" )
383383   PORT_DIPSETTING(      0x0003, "2" )
src/mame/drivers/galdrvr.c
r2844r2845
18951895   PORT_DIPSETTING(    0x02, "5" )
18961896INPUT_PORTS_END
18971897
1898static INPUT_PORTS_START( spdcoin )
1899   PORT_START_TAG("IN0")
1900   PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNUSED )
1901   PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_START1 )
1902   PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNUSED )
1903   PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_START2 )
1904   PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT )
1905   PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT )
1906   PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_COIN2 )
1907   PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_COIN1 )
18981908
1909   PORT_START_TAG("IN1")
1910   PORT_DIPNAME( 0x01, 0x00, "Freeze" )         /* Dip Sw #2 */
1911   PORT_DIPSETTING(    0x00, DEF_STR( Off ) )
1912   PORT_DIPSETTING(    0x01, DEF_STR( On ) )
1913   PORT_DIPNAME( 0x02, 0x00, DEF_STR( Free_Play ) )   /* Dip Sw #1 */
1914   PORT_DIPSETTING(    0x00, DEF_STR( Off ) )
1915   PORT_DIPSETTING(    0x02, DEF_STR( On ) )
1916   PORT_BIT( 0xfc, IP_ACTIVE_LOW, IPT_UNUSED )
1917
1918   PORT_START_TAG("IN2")
1919   PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNUSED )
1920   PORT_DIPNAME( 0x02, 0x00, DEF_STR( Unknown ) )      /* Dip Sw #5 - Check code at 0x0569 */
1921   PORT_DIPSETTING(    0x02, DEF_STR( Off ) )
1922   PORT_DIPSETTING(    0x00, DEF_STR( On ) )
1923   PORT_DIPNAME( 0x04, 0x00, DEF_STR( Difficulty ) )   /* Dip Sw #4 */
1924   PORT_DIPSETTING(    0x00, DEF_STR( Easy ) )
1925   PORT_DIPSETTING(    0x04, DEF_STR( Hard ) )
1926   PORT_DIPNAME( 0x08, 0x08, DEF_STR( Lives ) )      /* Dip Sw #3 */
1927   PORT_DIPSETTING(    0x08, "3" )
1928   PORT_DIPSETTING(    0x00, "5" )
1929   PORT_BIT( 0xf0, IP_ACTIVE_LOW, IPT_UNUSED )
1930INPUT_PORTS_END
1931
18991932/* cocktail mode is N/A */
1933static INPUT_PORTS_START( superbon )
1934   PORT_START_TAG("IN0")
1935   PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_START2 )
1936   PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_START1 )
1937   PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_8WAY
1938   PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_8WAY
1939   PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT) PORT_8WAY
1940   PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_8WAY
1941   PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_COIN2 )
1942   PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_COIN1 )
1943
1944   PORT_START_TAG("IN1")
1945   PORT_DIPNAME( 0x03, 0x01, DEF_STR( Lives ) )
1946   PORT_DIPSETTING(    0x01, "3" )
1947   PORT_DIPSETTING(    0x02, "5" )
1948   PORT_DIPSETTING(    0x03, DEF_STR( Free_Play ) )
1949   PORT_DIPSETTING(    0x00, "Invulnerability (Cheat)")
1950   PORT_DIPNAME( 0x04, 0x00, DEF_STR( Unknown ) )
1951   PORT_DIPSETTING(    0x04, DEF_STR( Off ) )
1952   PORT_DIPSETTING(    0x00, DEF_STR( On ) )
1953   PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_BUTTON1 )
1954   PORT_DIPNAME( 0x10, 0x00, DEF_STR( Unknown ) )
1955   PORT_DIPSETTING(    0x10, DEF_STR( Off ) )
1956   PORT_DIPSETTING(    0x00, DEF_STR( On ) )
1957   PORT_DIPNAME( 0x20, 0x00, DEF_STR( Unknown ) )
1958   PORT_DIPSETTING(    0x20, DEF_STR( Off ) )
1959   PORT_DIPSETTING(    0x00, DEF_STR( On ) )
1960   PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_BUTTON2 )
1961   PORT_DIPNAME( 0x80, 0x00, DEF_STR( Unknown ) )
1962   PORT_DIPSETTING(    0x80, DEF_STR( Off ) )
1963   PORT_DIPSETTING(    0x00, DEF_STR( On ) )
1964
1965   PORT_START_TAG("IN2")
1966   PORT_DIPNAME( 0x01, 0x00, DEF_STR( Unknown ) )
1967   PORT_DIPSETTING(    0x01, DEF_STR( Off ) )
1968   PORT_DIPSETTING(    0x00, DEF_STR( On ) )
1969   PORT_DIPNAME( 0x06, 0x02, DEF_STR( Coinage ) )
1970   PORT_DIPSETTING(    0x02, DEF_STR( 1C_1C ) )
1971   PORT_DIPSETTING(    0x00, "A 1/2 B 2/1" )
1972   PORT_DIPSETTING(    0x04, "A 1/3 B 3/1" )
1973   PORT_DIPSETTING(    0x06, "A 1/4 B 4/1" )
1974   PORT_DIPNAME( 0x08, 0x00, DEF_STR( Unknown ) )
1975   PORT_DIPSETTING(    0x08, DEF_STR( Off ) )
1976   PORT_DIPSETTING(    0x00, DEF_STR( On ) )
1977   PORT_DIPNAME( 0x10, 0x00, DEF_STR( Unknown ) )
1978   PORT_DIPSETTING(    0x10, DEF_STR( Off ) )
1979   PORT_DIPSETTING(    0x00, DEF_STR( On ) )
1980   PORT_DIPNAME( 0x20, 0x00, DEF_STR( Unknown ) )
1981   PORT_DIPSETTING(    0x20, DEF_STR( Off ) )
1982   PORT_DIPSETTING(    0x00, DEF_STR( On ) )
1983   PORT_DIPNAME( 0x40, 0x00, DEF_STR( Unknown ) )
1984   PORT_DIPSETTING(    0x40, DEF_STR( Off ) )
1985   PORT_DIPSETTING(    0x00, DEF_STR( On ) )
1986   PORT_DIPNAME( 0x80, 0x00, DEF_STR( Unknown ) )
1987   PORT_DIPSETTING(    0x80, DEF_STR( Off ) )
1988   PORT_DIPSETTING(    0x00, DEF_STR( On ) )
1989INPUT_PORTS_END
1990
1991
1992/* cocktail mode is N/A */
19001993INPUT_PORTS_START( losttomb )
19011994   PORT_START_TAG("IN0")
19021995   PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_START2 )
r2844r2845
20602153INPUT_PORTS_END
20612154
20622155
2156/* cocktail mode is N/A */
2157static INPUT_PORTS_START( calipso )
2158   PORT_START_TAG("IN0")
2159   PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(2)
2160   PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN )
2161   PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_8WAY
2162   PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_8WAY
2163   PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_8WAY
2164   PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_8WAY
2165   PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_COIN2 )
2166   PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_COIN1 )
20632167
2168   PORT_START_TAG("IN1")
2169   PORT_DIPNAME( 0x01, 0x01, DEF_STR( Lives ) )
2170   PORT_DIPSETTING(    0x01, "3" )
2171   PORT_DIPSETTING(    0x00, "5" )
2172   PORT_DIPNAME( 0x02, 0x00, DEF_STR( Demo_Sounds ) )
2173   PORT_DIPSETTING(    0x02, DEF_STR( Off ) )
2174   PORT_DIPSETTING(    0x00, DEF_STR( On ) )
2175   PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_8WAY PORT_PLAYER(2)
2176   PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_8WAY PORT_PLAYER(2)
2177   PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_8WAY PORT_PLAYER(2)
2178   PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_8WAY PORT_PLAYER(2)
2179   PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
2180   PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
2181
2182   PORT_START_TAG("IN2")
2183   PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON1 )
2184   PORT_DIPNAME( 0x06, 0x02, DEF_STR( Coinage ) )
2185   PORT_DIPSETTING(    0x02, DEF_STR( 1C_1C ) )
2186   PORT_DIPSETTING(    0x00, DEF_STR( 1C_2C ) )
2187   PORT_DIPSETTING(    0x04, DEF_STR( 1C_3C ) )
2188   PORT_DIPSETTING(    0x06, DEF_STR( 1C_4C ) )
2189   PORT_DIPNAME( 0x08, 0x08, "Cabinet (Not Supported)" )
2190   PORT_DIPSETTING(    0x08, DEF_STR( Upright ) )
2191   PORT_DIPSETTING(    0x00, DEF_STR( Cocktail ) )
2192   PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN )
2193   PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN )
2194   PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
2195   PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
2196INPUT_PORTS_END
2197
2198
2199static INPUT_PORTS_START( moonwar_common )
2200   PORT_START_TAG("IN0")
2201   PORT_BIT( 0x1f, IP_ACTIVE_LOW, IPT_SPECIAL ) /* the spinner */
2202   PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_COCKTAIL
2203   PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_COIN2 )
2204   PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_COIN1 )
2205
2206   PORT_START_TAG("IN1")
2207   PORT_DIPNAME( 0x03, 0x00, DEF_STR( Lives ) )
2208   PORT_DIPSETTING(    0x00, "3" )
2209   PORT_DIPSETTING(    0x01, "4" )
2210   PORT_DIPSETTING(    0x02, "5" )
2211   PORT_DIPSETTING(    0x03, DEF_STR( Free_Play ) )
2212   PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_START1 )
2213   PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_START2 )
2214   PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_COCKTAIL
2215   PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON3 )
2216   PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_BUTTON2 )
2217   PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_BUTTON1 )
2218INPUT_PORTS_END
2219
2220
2221static INPUT_PORTS_START( moonwar )
2222   PORT_INCLUDE( moonwar_common )
2223
2224   PORT_START_TAG("IN2")
2225   PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_COCKTAIL
2226   PORT_DIPNAME( 0x06, 0x02, DEF_STR( Coinage ) )
2227   PORT_DIPSETTING(    0x02, DEF_STR( 1C_1C ) )
2228   PORT_DIPSETTING(    0x00, DEF_STR( 1C_2C ) )
2229   PORT_DIPSETTING(    0x04, DEF_STR( 1C_3C ) )
2230   PORT_DIPSETTING(    0x06, DEF_STR( 1C_4C ) )
2231   PORT_DIPNAME( 0x08, 0x00, DEF_STR( Cabinet ) )
2232   PORT_DIPSETTING(    0x00, DEF_STR( Upright ) )
2233   PORT_DIPSETTING(    0x08, DEF_STR( Cocktail ) )
2234   PORT_BIT( 0xf0, IP_ACTIVE_LOW, IPT_UNUSED )   /* output bits */
2235
2236   PORT_START_TAG("IN3")      /* IN3/4 - dummy ports for the dial */
2237   PORT_BIT( 0xff, 0x00, IPT_DIAL ) PORT_SENSITIVITY(25) PORT_KEYDELTA(10) PORT_RESET
2238
2239   PORT_START_TAG("IN4")
2240   PORT_BIT( 0xff, 0x00, IPT_DIAL ) PORT_SENSITIVITY(25) PORT_KEYDELTA(10) PORT_RESET PORT_COCKTAIL
2241INPUT_PORTS_END
2242
2243/* same as above, but coinage is different */
2244static INPUT_PORTS_START( moonwara )
2245   PORT_INCLUDE( moonwar_common )
2246
2247   PORT_START_TAG("IN2")
2248   PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_COCKTAIL
2249   PORT_DIPNAME( 0x06, 0x00, DEF_STR( Coinage ) )
2250   PORT_DIPSETTING(    0x00, DEF_STR( 1C_1C ) )
2251   PORT_DIPSETTING(    0x02, DEF_STR( 1C_2C ) )
2252   PORT_DIPSETTING(    0x04, DEF_STR( 1C_3C ) )
2253   PORT_DIPSETTING(    0x06, DEF_STR( 1C_4C ) )
2254   PORT_DIPNAME( 0x08, 0x00, DEF_STR( Cabinet ) )
2255   PORT_DIPSETTING(    0x00, DEF_STR( Upright ) )
2256   PORT_DIPSETTING(    0x08, DEF_STR( Cocktail ) )
2257   PORT_BIT( 0xf0, IP_ACTIVE_LOW, IPT_UNUSED )   /* output bits */
2258
2259   PORT_START_TAG("IN3")      /* IN3/4 - dummy ports for the dial */
2260   PORT_BIT( 0xff, 0x00, IPT_DIAL ) PORT_SENSITIVITY(25) PORT_KEYDELTA(10) PORT_RESET
2261
2262   PORT_START_TAG("IN4")      /* doesn't actually work due to bug in game code */
2263   PORT_BIT( 0xff, 0x00, IPT_DIAL ) PORT_SENSITIVITY(25) PORT_KEYDELTA(10) PORT_RESET PORT_COCKTAIL
2264INPUT_PORTS_END
2265
2266
20642267/*************************************
20652268 *
20662269 *  ROM definitions
r2844r2845
45774780ROM_END
45784781
45794782
4783ROM_START( spdcoin )
4784   ROM_REGION( 0x10000, REGION_CPU1, 0 )
4785   ROM_LOAD( "spdcoin.2c",   0x0000, 0x1000, CRC(65cf1e49) SHA1(a4570f0d7868fcdd378de3fd9e5346780afcf427) )
4786   ROM_LOAD( "spdcoin.2e",   0x1000, 0x1000, CRC(1ee59232) SHA1(b58c1de69d33cf80432012b9b6d8b1e3d8b00662) )
45804787
4788   ROM_REGION( 0x10000, REGION_CPU2, 0 )
4789   ROM_LOAD( "spdcoin.5c",   0x0000, 0x0800, CRC(b4cf64b7) SHA1(a95d94be2e374b78b4ba49b6931f0c214ff9d033) )
4790   ROM_LOAD( "spdcoin.5d",   0x0800, 0x0800, CRC(92304df0) SHA1(01471bf7cbea0090933a253b1b46f80c8f240df5) )
4791
4792   ROM_REGION( 0x1000, REGION_GFX1, ROMREGION_DISPOSE )
4793   ROM_LOAD( "spdcoin.5f",   0x0000, 0x0800, CRC(dd5f1dbc) SHA1(e7c40972a7530cac19ce04de3272244959d337ab) )
4794   ROM_LOAD( "spdcoin.5h",   0x0800, 0x0800, CRC(ab1fe81b) SHA1(98057932cb5faad60d425b547590ab22bfc67ff6) )
4795
4796   ROM_REGION( 0x0020, REGION_PROMS, 0 )
4797   ROM_LOAD( "spdcoin.clr",  0x0000, 0x0020, CRC(1a2ccc56) SHA1(58bedaa8b3e21e916295603b38529084b6c0099a) )
4798ROM_END
4799
4800
4801ROM_START( superbon )
4802   ROM_REGION( 0x10000, REGION_CPU1, 0 )
4803   ROM_LOAD( "2d.cpu",       0x0000, 0x1000, CRC(60c0ba18) SHA1(6ad09e01dd3c86c8d9c465916227c9b00f38e025) )
4804   ROM_LOAD( "2e.cpu",       0x1000, 0x1000, CRC(ddcf44bf) SHA1(b862622f4aa8af6da568b4f82ef043359ece530f) )
4805   ROM_LOAD( "2f.cpu",       0x2000, 0x1000, CRC(bb66c2d5) SHA1(cbb7f4279ae48460790cb8abf976b978ae6a1a25) )
4806   ROM_LOAD( "2h.cpu",       0x3000, 0x1000, CRC(74f4f04d) SHA1(d51c5d2c21453ee0dab60253c3124b6112d1f859) )
4807   ROM_LOAD( "2j.cpu",       0x4000, 0x1000, CRC(78effb08) SHA1(64f211b34c2f37c25a36200b393f145b39ae67b5) )
4808   ROM_LOAD( "2l.cpu",       0x5000, 0x1000, CRC(e9dcecbd) SHA1(ec61cec2b66c041872a2ca29cf724a89c73fc9a3) )
4809   ROM_LOAD( "2m.cpu",       0x6000, 0x1000, CRC(3ed0337e) SHA1(975b93aee851867e335614419aa6db16fbf8063f) )
4810
4811   ROM_REGION( 0x10000, REGION_CPU2, 0 )
4812   ROM_LOAD( "5c",           0x0000, 0x0800, CRC(b899be2a) SHA1(9b343a682531255104db61177a43ad933c3af34e) )
4813   ROM_LOAD( "5d.snd",       0x0800, 0x0800, CRC(80640a04) SHA1(83f2bafcfa5737441194d3058a76b2582317cfcb) )
4814
4815   ROM_REGION( 0x1000, REGION_GFX1, ROMREGION_DISPOSE )
4816   ROM_LOAD( "5f.cpu",       0x0000, 0x0800, CRC(5b9d4686) SHA1(c7814aefaccab9c8a3a0b015447d366cd2e43c3a) )
4817   ROM_LOAD( "5h.cpu",       0x0800, 0x0800, CRC(58c29927) SHA1(b88515d9c3108d2ad59f30fed5d74877b1636280) )
4818
4819   /* conversion instructions do not mention color proms                        */
4820   /* http://www.arcadeflyers.com/?page=flyer&db=videodb&id=5353&image=2        */
4821   /* however, pages may be missing. In addition, it is mentioned that the      */
4822   /* conversion kit may be used for scramble, amidar and frogger as well.      */
4823   /* They all have different color proms.                                      */
4824   ROM_REGION( 0x0020, REGION_PROMS, 0 )
4825   ROM_LOAD( "superbon.clr", 0x0000, 0x0020, NO_DUMP )
4826
4827ROM_END
4828
4829ROM_START( calipso )
4830   ROM_REGION( 0x10000, REGION_CPU1, 0 )
4831   ROM_LOAD( "calipso.2c",   0x0000, 0x1000, CRC(0fcb703c) SHA1(2bb096f114911973afdf3088c860c9566df06f60) )
4832   ROM_LOAD( "calipso.2e",   0x1000, 0x1000, CRC(c6622f14) SHA1(475164aed703a97275ff285ecaec9d8fd4fe723b) )
4833   ROM_LOAD( "calipso.2f",   0x2000, 0x1000, CRC(7bacbaba) SHA1(d321d6d09c689123eb1e5d758d95ccecec225252) )
4834   ROM_LOAD( "calipso.2h",   0x3000, 0x1000, CRC(a3a8111b) SHA1(3d9500c676563ebfc27aebb07716e6a966f00c35) )
4835   ROM_LOAD( "calipso.2j",   0x4000, 0x1000, CRC(fcbd7b9e) SHA1(5cc1edcc8b9867bb7849c8d97d1096bb6464f562) )
4836   ROM_LOAD( "calipso.2l",   0x5000, 0x1000, CRC(f7630cab) SHA1(482ee91cccd8a7c5768a1d6a9772d797769fe2dc) )
4837
4838   ROM_REGION( 0x10000, REGION_CPU2, 0 )   /* 64k for sound code */
4839   ROM_LOAD( "calipso.5c",   0x0000, 0x0800, CRC(9cbc65ab) SHA1(b4ce04d18f9536c0ddd2f9c15edda75570e750e5) )
4840   ROM_LOAD( "calipso.5d",   0x0800, 0x0800, CRC(a225ee3b) SHA1(dba111f89851c69fb6fce16219cb2b0cb3294c15) )
4841
4842   ROM_REGION( 0x4000, REGION_GFX1, ROMREGION_DISPOSE )
4843   ROM_LOAD( "calipso.5f",   0x0000, 0x2000, CRC(fd4252e9) SHA1(881b988cdc9b7913f577573f8a15af7a7c7cc67f) )
4844   ROM_LOAD( "calipso.5h",   0x2000, 0x2000, CRC(1663a73a) SHA1(95b6ed25b656afdfb70fac35efa2e005185e4343) )
4845
4846   ROM_REGION( 0x0020, REGION_PROMS, 0 )
4847   ROM_LOAD( "calipso.clr",  0x0000, 0x0020, CRC(01165832) SHA1(bfef0459492dbd5febf3030916b6438eb6be71de) )
4848ROM_END
4849
4850
4851ROM_START( moonwar )
4852   ROM_REGION( 0x10000, REGION_CPU1, 0 )
4853   ROM_LOAD( "mw2.2c",       0x0000, 0x1000, CRC(7c11b4d9) SHA1(a27bdff6ce728647ec811df843ac235c32c293d6) )
4854   ROM_LOAD( "mw2.2e",       0x1000, 0x1000, CRC(1b6362be) SHA1(2fbd95869146adcc0c8be1df653251fda8849e8e) )
4855   ROM_LOAD( "mw2.2f",       0x2000, 0x1000, CRC(4fd8ba4b) SHA1(3da784267a96d05f66b00626a22cb3f06211d202) )
4856   ROM_LOAD( "mw2.2h",       0x3000, 0x1000, CRC(56879f0d) SHA1(d1e9932863aebc5761e71fca8d24f3c400e1250d) )
4857
4858   ROM_REGION( 0x10000, REGION_CPU2, 0 )
4859   ROM_LOAD( "mw2.5c",       0x0000, 0x0800, CRC(c26231eb) SHA1(5b19edfaefe1a535059311d067ea53405879d627) )
4860   ROM_LOAD( "mw2.5d",       0x0800, 0x0800, CRC(bb48a646) SHA1(cf51202d16b03bbed12ff24501be68683f28c992) )
4861
4862   ROM_REGION( 0x1000, REGION_GFX1, ROMREGION_DISPOSE )
4863   ROM_LOAD( "mw2.5f",       0x0000, 0x0800, CRC(c5fa1aa0) SHA1(6c6b5b2ce5de278ff436d3e7252ece5b086cc41d) )
4864   ROM_LOAD( "mw2.5h",       0x0800, 0x0800, CRC(a6ccc652) SHA1(286b3dc1f3a7da3ac66664e774b441ef075745f1) )
4865
4866   ROM_REGION( 0x0020, REGION_PROMS, 0 )
4867   ROM_LOAD( "mw2.clr",      0x0000, 0x0020, CRC(99614c6c) SHA1(f068985f3c5e0cd88551a02c32f9baeabfd50241) )
4868ROM_END
4869
4870ROM_START( moonwara )
4871   ROM_REGION( 0x10000, REGION_CPU1, 0 )
4872   ROM_LOAD( "2c",           0x0000, 0x1000, CRC(bc20b734) SHA1(c6fe550987d0052979aad43c67aa1b9248049669) )
4873   ROM_LOAD( "2e",           0x1000, 0x1000, CRC(db6ffec2) SHA1(0fcd55b1e415e2e7041d10778052a235251f85fe) )
4874   ROM_LOAD( "2f",           0x2000, 0x1000, CRC(378931b8) SHA1(663f1eea9b0e8dc38de818df66c5211dac41c33b) )
4875   ROM_LOAD( "2h",           0x3000, 0x1000, CRC(031dbc2c) SHA1(5f2ca8b8763398bf161ee0c2c748a12d36cb40ec) )
4876
4877   ROM_REGION( 0x10000, REGION_CPU2, 0 )
4878   ROM_LOAD( "mw2.5c",       0x0000, 0x0800, CRC(c26231eb) SHA1(5b19edfaefe1a535059311d067ea53405879d627) )
4879   ROM_LOAD( "mw2.5d",       0x0800, 0x0800, CRC(bb48a646) SHA1(cf51202d16b03bbed12ff24501be68683f28c992) )
4880
4881   ROM_REGION( 0x1000, REGION_GFX1, ROMREGION_DISPOSE )
4882   ROM_LOAD( "mw2.5f",       0x0000, 0x0800, CRC(c5fa1aa0) SHA1(6c6b5b2ce5de278ff436d3e7252ece5b086cc41d) )
4883   ROM_LOAD( "mw2.5h",       0x0800, 0x0800, CRC(a6ccc652) SHA1(286b3dc1f3a7da3ac66664e774b441ef075745f1) )
4884
4885   ROM_REGION( 0x0020, REGION_PROMS, 0 )
4886   ROM_LOAD( "moonwara.clr", 0x0000, 0x0020, CRC(f58d4f58) SHA1(12a80d1edf3c80dafa0e1e3622d2a03224b62f14) )   /* olive, instead of white */
4887ROM_END
4888
4889
45814890/*************************************
45824891 *
45834892 *  Game drivers
r2844r2845
47805089
47815090GAME( 1982, anteater, 0,        anteater, anteater, anteater, ROT90,  "[Stern] (Tago license)", "Anteater", GAME_SUPPORTS_SAVE )
47825091
5092GAME( 1984, spdcoin,  0,        scobra,   spdcoin,  scobra,   ROT90,  "Stern", "Speed Coin (prototype)", GAME_SUPPORTS_SAVE )
5093GAME( 1985, superbon, 0,        scobra,   superbon, superbon, ROT90,  "Signatron USA", "Agent Super Bond (Scobra Hardware)", GAME_WRONG_COLORS | GAME_SUPPORTS_SAVE )
47835094
5095GAME( 1982, calipso,  0,        scobra,   calipso,  calipso,  ROT90,  "[Stern] (Tago license)", "Calipso", GAME_SUPPORTS_SAVE )
47845096
5097GAME( 1981, moonwar,  0,        moonwar,  moonwar,  moonwar,  ROT90,  "Stern", "Moonwar", GAME_SUPPORTS_SAVE )
5098GAME( 1981, moonwara, moonwar,  moonwar,  moonwara, moonwar,  ROT90,  "Stern", "Moonwar (older)", GAME_SUPPORTS_SAVE )
47855099
5100
5101
47865102/* currently in galaxold.c and should be moved here */
47875103//GAME( 1981, 4in1,     0,        4in1,     4in1,     4in1,     ROT90,  "Armenia / Food and Fun", "4 Fun in 1", GAME_IMPERFECT_SOUND | GAME_SUPPORTS_SAVE )
47885104//GAME( 1982, bagmanmc, bagman,   bagmanmc, bagmanmc, galaxian, ROT90,  "bootleg", "Bagman (Moon Cresta hardware)", GAME_WRONG_COLORS | GAME_SUPPORTS_SAVE )
47895105//GAME( 1982, dkongjrm, dkongjr,  dkongjrm, dkongjrm, galaxian, ROT90,  "bootleg", "Donkey Kong Jr. (Moon Cresta hardware)", GAME_WRONG_COLORS | GAME_IMPERFECT_SOUND | GAME_SUPPORTS_SAVE )
47905106//GAME( 1981, rockclim, 0,        rockclim, rockclim, galaxian, ROT180, "Taito", "Rock Climber", GAME_SUPPORTS_SAVE )
47915107//GAME( 1983, ozon1,    0,        ozon1,    ozon1,    galaxian, ROT90,  "Proma", "Ozon I", GAME_SUPPORTS_SAVE )
4792//GAME( 1983, ladybugg, ladybug,  galaxian/*batman2*/,  ladybugg, ladybugg, ROT270, "bootleg", "Ladybug (bootleg on Galaxian hardware)", GAME_SUPPORTS_SAVE )
5108//GAME( 1983, ladybugg, ladybug,  galaxian/*batman2*/,  ladybugg, ladybugg, ROT270, "bootleg", "Lady Bug (bootleg on Galaxian hardware)", GAME_SUPPORTS_SAVE )
47935109//GAME( 1980, vpool,    hustler,  mooncrst, vpool,    galaxian, ROT90,  "bootleg", "Video Pool (bootleg on Moon Cresta hardware)", GAME_SUPPORTS_SAVE )
47945110//GAME( 1984, drivfrcg, drivfrcp, drivfrcg, drivfrcg, galaxian, ROT90,  "Shinkai Inc. (Magic Eletronics USA licence)", "Driving Force (Galaxian conversion)", GAME_SUPPORTS_SAVE )
47955111//GAME( 1985, drivfrcb, drivfrcp, drivfrcg, drivfrcg, galaxian, ROT90,  "bootleg", "Driving Force (Galaxian conversion bootleg)", GAME_SUPPORTS_SAVE )
r2844r2845
48305146/* currently in scobra.c and should be moved here */
48315147//GAME( 1981, stratgyx, 0,        scobra/*stratgyx*/, stratgyx, stratgyx,     ROT0,   "Konami", "Strategy X", GAME_SUPPORTS_SAVE )
48325148//GAME( 1981, stratgys, stratgyx, scobra/*stratgyx*/, stratgyx, stratgyx,     ROT0,   "[Konami] (Stern license)", "Strategy X (Stern)", GAME_SUPPORTS_SAVE )
4833//GAME( 1981, moonwar,  0,        scobra/*moonwar*/,  moonwar,  moonwar,      ROT90,  "Stern", "Moonwar", GAME_SUPPORTS_SAVE )
4834//GAME( 1981, moonwara, moonwar,  scobra/*moonwar*/,  moonwara, moonwar,      ROT90,  "Stern", "Moonwar (older)", GAME_SUPPORTS_SAVE )
4835//GAME( 1984, spdcoin,  0,        scobra,    spdcoin,  scramble_ppi, ROT90,  "Stern", "Speed Coin (prototype)", GAME_SUPPORTS_SAVE )
48365149//GAME( 1982, darkplnt, 0,        scobra/*darkplnt*/, darkplnt, darkplnt,     ROT180, "Stern", "Dark Planet", GAME_SUPPORTS_SAVE )
48375150//GAME( 1982, tazmani2, tazmania, scobra/*type2*/,    tazmania, tazmani2,     ROT90,  "Stern", "Tazz-Mania (set 2)", GAME_SUPPORTS_SAVE )
4838//GAME( 1982, calipso,  0,        scobra/*calipso*/,  calipso,  scobra,       ROT90,  "[Stern] (Tago license)", "Calipso", GAME_SUPPORTS_SAVE )
48395151//GAME( 1983, anteatg,  anteater, scobra/*anteatg*/,  anteatg,  scramble_ppi, ROT90,  "TV-Tuning (F.E.G. license)", "Ameisenbaer (German)", GAME_SUPPORTS_SAVE )
48405152//GAME( 1983, anteatgb, anteater, scobra/*anteatgb*/, anteatgb, scramble_ppi, ROT90,  "Free Enterprise Games", "The Anteater (UK)", GAME_SUPPORTS_SAVE )
48415153//GAME( 1982, rescue,   0,        scobra/*rescue*/,   rescue,   rescue,       ROT90,  "Stern", "Rescue", GAME_SUPPORTS_SAVE )
48425154//GAME( 1982, aponow,   rescue,   scobra/*rescue*/,   rescue,   rescue,       ROT90,  "bootleg", "Apocaljpse Now", GAME_SUPPORTS_SAVE )
48435155//GAME( 1983, minefld,  0,        scobra/*minefld*/,  minefld,  minefld,      ROT90,  "Stern", "Minefield", GAME_SUPPORTS_SAVE )
4844//GAME( 198?, superbon, 0,        scobra,    superbon, superbon,     ROT90,  "bootleg", "Super Bond", GAME_WRONG_COLORS | GAME_SUPPORTS_SAVE )
48455156//GAME( 1981, hustler,  0,        scobra/*hustler*/,  hustler,  hustler,      ROT90,  "Konami", "Video Hustler", GAME_SUPPORTS_SAVE )
48465157//GAME( 1981, billiard, hustler,  scobra/*hustler*/,  hustler,  billiard,     ROT90,  "bootleg", "The Billiards", GAME_SUPPORTS_SAVE )
48475158//GAME( 1981, hustlerb, hustler,  scobra/*hustlerb*/, hustler,  scramble_ppi, ROT90,  "bootleg", "Video Hustler (bootleg)", GAME_SUPPORTS_SAVE )
src/mame/drivers/namcos1.c
r2844r2845
344344#include "sound/2151intf.h"
345345#include "sound/namco.h"
346346#include "sound/dac.h"
347#include "includes/namcos1.h"
347348
348349static int dac0_value, dac1_value, dac0_gain, dac1_gain;
349350
350351
351/* from video */
352VIDEO_START( namcos1 );
353VIDEO_UPDATE( namcos1 );
354VIDEO_EOF( namcos1 );
355
356/* from machine */
357WRITE8_HANDLER( namcos1_bankswitch_w );
358WRITE8_HANDLER( namcos1_subcpu_bank_w );
359
360WRITE8_HANDLER( namcos1_cpu_control_w );
361WRITE8_HANDLER( namcos1_watchdog_w );
362WRITE8_HANDLER( namcos1_sound_bankswitch_w );
363
364WRITE8_HANDLER( namcos1_mcu_bankswitch_w );
365WRITE8_HANDLER( namcos1_mcu_patch_w );
366
367MACHINE_RESET( namcos1 );
368
369DRIVER_INIT( shadowld );
370DRIVER_INIT( dspirit );
371DRIVER_INIT( quester );
372DRIVER_INIT( blazer );
373DRIVER_INIT( pacmania );
374DRIVER_INIT( galaga88 );
375DRIVER_INIT( ws );
376DRIVER_INIT( berabohm );
377DRIVER_INIT( alice );
378DRIVER_INIT( bakutotu );
379DRIVER_INIT( wldcourt );
380DRIVER_INIT( splatter );
381DRIVER_INIT( faceoff );
382DRIVER_INIT( rompers );
383DRIVER_INIT( blastoff );
384DRIVER_INIT( ws89 );
385DRIVER_INIT( dangseed );
386DRIVER_INIT( ws90 );
387DRIVER_INIT( pistoldm );
388DRIVER_INIT( soukobdx );
389DRIVER_INIT( puzlclub );
390DRIVER_INIT( tankfrce );
391
392
393352/**********************************************************************/
394353
395354static WRITE8_HANDLER( namcos1_sub_firq_w )
r2844r2845
663622INPUT_PORTS_END
664623
665624
625static INPUT_PORTS_START( tankfrc4 )
626
627   /* How are the controls mapped?  Coins 3 & 4 are right as shown below.  Hit F2 for test screen, then "9" for the controls test screen */
628   /* Start buttons are not used by the game & manual shows P1 buttons 2 & 3 (plus unused JAMMA pins 25 & 26) are P3 UP, DOWN, LEFT & RIGHT */
629   /* Manual shows P2 buttons 2 & 3 (plus unused JAMMA pins c & d) are P4 UP, DOWN, LEFT & RIGHT.  J23 & J24 are P3 button1 & P4 button1 */
630
631   PORT_INCLUDE( ns1 )
632
633   PORT_MODIFY( "CONTROL0" )
634   PORT_BIT( 0x7f, IP_ACTIVE_LOW, IPT_UNUSED )
635   PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_COIN3 )
636
637   PORT_MODIFY( "CONTROL1" )
638   PORT_BIT( 0x7f, IP_ACTIVE_LOW, IPT_UNUSED )
639   PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_COIN4 )
640INPUT_PORTS_END
641
642
643
666644static INPUT_PORTS_START( pacmania )
667645   PORT_INCLUDE( ns1 )
668646
r2844r2845
23512329   ROM_LOAD( "tf1_obj1.bin",       0x20000, 0x20000, CRC(df674d6d) SHA1(65935c2d6072228fcb2fbca8808fc921db9e0ddd) )
23522330ROM_END
23532331
2332/* Tank Force US 4 Player version*/
2333ROM_START( tankfrc4 )
2334   ROM_REGION( 0x2c000, REGION_CPU3, 0 )       /* 176k for the sound cpu */
2335   ROM_LOAD( "tf1_snd0.bin",       0x0c000, 0x20000, CRC(4d9cf7aa) SHA1(de51b9b36e9a530a7f3c35672ec72c19b607af04) )
2336
2337   ROM_REGION( 0x400000, REGION_USER1, 0 ) /* 4M for ROMs */
2338   ROM_LOAD_1024( "tf1_prg0.bin",       0x000000, CRC(2ae4b9eb) SHA1(569d2754398b4276cf78a3dd038b5884778dc82e) )
2339   ROM_LOAD_1024( "tf1_prg1.bin",       0x080000, CRC(4a8bb251) SHA1(1df46ccf0ad7260398b7965e3825e936ba357062) )
2340   /* 100000-17ffff empty */
2341   /* 180000-1fffff empty */
2342   /* 200000-27ffff empty */
2343   /* 280000-2fffff empty */
2344   /* 300000-37ffff empty */
2345   ROM_LOAD_1024( "tfu4prg7.bin",       0x380000, CRC(162adea0) SHA1(9758433ae97b463253af455c80eefee4243f6c9e) )
2346
2347   ROM_REGION( 0xd0000, REGION_CPU4, 0 )       /* the MCU & voice */
2348   ROM_LOAD( "cus64-64a1.mcu",     0x0f000, 0x01000, CRC(ffb5c0bd) SHA1(7a38c0cc2553c627f4ec507fb6e807cf7d537c02) ) /* internal 63701 MCU code */
2349   ROM_LOAD( "tf1_voi0.bin",       0x10000, 0x20000, CRC(f542676a) SHA1(38d54db0807c58152bd120c393bf63b68754e8ff) )
2350   ROM_LOAD( "tf1_voi1.bin",       0x30000, 0x20000, CRC(615d09cd) SHA1(0aecf7ca6b65ddfcdcf74f8d412169ec800ba3a3) )
2351
2352   ROM_REGION( 0x20000, REGION_GFX1, 0 )  /* character mask */
2353   ROM_LOAD( "tf1_chr8.bin",       0x00000, 0x20000, CRC(7d53b31e) SHA1(7e4b5fc92f7956477392f1e14c6edfc0cada2be0) )
2354
2355   ROM_REGION( 0x100000, REGION_GFX2, ROMREGION_DISPOSE ) /* characters */
2356   ROM_LOAD( "tf1_chr0.bin",       0x00000, 0x20000, CRC(9e91794e) SHA1(e873ed31fafae02a3c3d9127801a13f67cbdb5f4) )
2357   ROM_LOAD( "tf1_chr1.bin",       0x20000, 0x20000, CRC(76e1bc56) SHA1(f95e4100cad29a8972e4f435b4f9ee3cdc4f4504) )
2358   ROM_LOAD( "tf1_chr2.bin",       0x40000, 0x20000, CRC(fcb645d9) SHA1(afedb4c6c1b02444ddb1757ac9808df1b94de2d8) )
2359   ROM_LOAD( "tf1_chr3.bin",       0x60000, 0x20000, CRC(a8dbf080) SHA1(115f3b21e0546000076c3c4d588e5bdcc4cf50d5) )
2360   ROM_LOAD( "tf1_chr4.bin",       0x80000, 0x20000, CRC(51fedc8c) SHA1(4a0c337fe614ebf66ee0fc3cfb05cad51a048fcf) )
2361   ROM_LOAD( "tf1_chr5.bin",       0xa0000, 0x20000, CRC(e6c6609a) SHA1(0c05cdd6b1dc4f082b9ac0e4de252c3d72392bb0) )
2362
2363   ROM_REGION( 0x100000, REGION_GFX3, ROMREGION_DISPOSE ) /* sprites */
2364   ROM_LOAD( "tf1_obj0.bin",       0x00000, 0x20000, CRC(4bedd51a) SHA1(fedb972986efe5ff3bd6c75fa16f22f8267ee0b7) )
2365   ROM_LOAD( "tf1_obj1.bin",       0x20000, 0x20000, CRC(df674d6d) SHA1(65935c2d6072228fcb2fbca8808fc921db9e0ddd) )
2366ROM_END
2367
23542368/* Tank Force (Japan) */
23552369ROM_START( tankfrcj )
23562370   ROM_REGION( 0x2c000, REGION_CPU3, 0 )       /* 176k for the sound cpu */
r2844r2845
24202434GAME( 1990, boxyboy,  0,        ns1,     boxyboy,  soukobdx, ROT0,   "Namco", "Boxy Boy (US)", 0 )
24212435GAME( 1990, soukobdx, boxyboy,  ns1,     boxyboy,  soukobdx, ROT0,   "Namco", "Souko Ban Deluxe (Japan)", 0 )
24222436GAME( 1990, puzlclub, 0,        ns1,     puzlclub, puzlclub, ROT90,  "Namco", "Puzzle Club (Japan prototype)", 0 )
2423GAME( 1991, tankfrce, 0,        ns1,     ns1,      tankfrce, ROT0,   "Namco", "Tank Force (US)", 0 )
2437GAME( 1991, tankfrce, 0,        ns1,     ns1,      tankfrce, ROT0,   "Namco", "Tank Force (US, 2 Player)", 0 )
2438GAME( 1991, tankfrc4, tankfrce, ns1,     tankfrc4, tankfrce, ROT0,   "Namco", "Tank Force (US, 4 Player)", GAME_NOT_WORKING ) /* No controls */
24242439GAME( 1991, tankfrcj, tankfrce, ns1,     ns1,      tankfrce, ROT0,   "Namco", "Tank Force (Japan)", 0 )
24252440
src/mame/drivers/deco156.c
r2844r2845
4949   state_save_register_global_pointer(deco16_pf12_control, 0x10/2);
5050   state_save_register_global_pointer(paletteram16, 0x1000/2);
5151
52   deco16_1_video_init();
52   deco16_1_video_init(machine);
5353
5454   deco16_set_tilemap_bank_callback(0, simpl156_bank_callback);
5555   deco16_set_tilemap_bank_callback(1, simpl156_bank_callback);
src/mame/drivers/40love.c
r2844r2845
223223#include "sound/ay8910.h"
224224#include "sound/dac.h"
225225#include "sound/msm5232.h"
226#include "includes/buggychl.h"
226227
227/* in machine/buggychl.c */
228READ8_HANDLER( buggychl_68705_portA_r );
229WRITE8_HANDLER( buggychl_68705_portA_w );
230WRITE8_HANDLER( buggychl_68705_ddrA_w );
231READ8_HANDLER( buggychl_68705_portB_r );
232WRITE8_HANDLER( buggychl_68705_portB_w );
233WRITE8_HANDLER( buggychl_68705_ddrB_w );
234READ8_HANDLER( buggychl_68705_portC_r );
235WRITE8_HANDLER( buggychl_68705_portC_w );
236WRITE8_HANDLER( buggychl_68705_ddrC_w );
237WRITE8_HANDLER( buggychl_mcu_w );
238READ8_HANDLER( buggychl_mcu_r );
239READ8_HANDLER( buggychl_mcu_status_r );
240
241
242228extern VIDEO_START( fortyl );
243229extern VIDEO_UPDATE( fortyl );
244230extern PALETTE_INIT( fortyl );
src/mame/drivers/vsnes.c
r2844r2845
135135#include "machine/rp5h01.h"
136136#include "sound/dac.h"
137137#include "sound/nes_apu.h"
138#include "includes/vsnes.h"
138139
139140/* clock frequency */
140141#define N2A03_DEFAULTCLOCK ( 21477272.724 / 12 )
141142
142143#define DUAL_RBI 1
143144
144/* from video */
145extern VIDEO_START( vsnes );
146extern PALETTE_INIT( vsnes );
147extern VIDEO_UPDATE( vsnes );
148extern VIDEO_START( vsdual );
149extern VIDEO_UPDATE( vsdual );
150extern PALETTE_INIT( vsdual );
151
152/* from machine */
153extern MACHINE_RESET( vsnes );
154extern MACHINE_RESET( vsdual );
155extern DRIVER_INIT( vsnes );
156extern DRIVER_INIT( suprmrio );
157extern DRIVER_INIT( excitebk );
158extern DRIVER_INIT( excitbkj );
159extern DRIVER_INIT( vsnormal );
160extern DRIVER_INIT( duckhunt );
161extern DRIVER_INIT( hogalley );
162extern DRIVER_INIT( goonies );
163extern DRIVER_INIT( machridr );
164extern DRIVER_INIT( vsslalom );
165extern DRIVER_INIT( cstlevna );
166extern DRIVER_INIT( drmario );
167extern DRIVER_INIT( rbibb );
168extern DRIVER_INIT( tkoboxng );
169extern DRIVER_INIT( topgun );
170extern DRIVER_INIT( vsgradus );
171extern DRIVER_INIT( vspinbal );
172extern DRIVER_INIT( MMC3 );
173extern DRIVER_INIT( platoon );
174extern DRIVER_INIT( vstennis );
175extern DRIVER_INIT( wrecking );
176extern DRIVER_INIT( balonfgt );
177extern DRIVER_INIT( vsbball );
178extern DRIVER_INIT( iceclmrj );
179extern DRIVER_INIT( supxevs );
180extern DRIVER_INIT( btlecity );
181extern DRIVER_INIT( vstetris );
182extern DRIVER_INIT( bnglngby );
183extern DRIVER_INIT( jajamaru);
184extern DRIVER_INIT( vsgshoe );
185extern DRIVER_INIT( vsfdf );
186extern DRIVER_INIT( mightybj);
187
188extern READ8_HANDLER( vsnes_in0_r );
189extern READ8_HANDLER( vsnes_in1_r );
190extern READ8_HANDLER( vsnes_in0_1_r );
191extern READ8_HANDLER( vsnes_in1_1_r );
192extern WRITE8_HANDLER( vsnes_in0_w );
193extern WRITE8_HANDLER( vsnes_in0_1_w );
194
195145/******************************************************************************/
196146
197147/* local stuff */
src/mame/drivers/cninja.c
r2844r2845
132132   logerror("%08x:  Unmapped IRQ write %d %04x\n",activecpu_get_pc(),offset,data);
133133}
134134
135static READ16_HANDLER( robocop2_dip3_r ) { return input_port_read_indexed(machine, 3); }
136
137135static READ16_HANDLER( robocop2_prot_r )
138136{
139137    switch (offset<<1) {
140138      case 0x41a: /* Player 1 & 2 input ports */
141         return input_port_read_indexed(machine, 0);
139         return input_port_read(machine, "IN0");
142140      case 0x320: /* Coins */
143         return input_port_read_indexed(machine, 1);
141         return input_port_read(machine, "IN1");
144142      case 0x4e6: /* Dip switches */
145         return input_port_read_indexed(machine, 2);
143         return input_port_read(machine, "DSW");
146144      case 0x504: /* PC: 6b6.  b4, 2c, 36 written before read */
147145         logerror("Protection PC %06x: warning - read unmapped memory address %04x\n",activecpu_get_pc(),offset);
148146         return 0x84;
r2844r2845
253251   AM_RANGE(0x156000, 0x156fff) AM_READ(SMH_RAM)
254252   AM_RANGE(0x15c000, 0x15c7ff) AM_READ(SMH_RAM)
255253   AM_RANGE(0x15e000, 0x15e7ff) AM_READ(SMH_RAM)
256   AM_RANGE(0x1f8000, 0x1f8001) AM_READ(robocop2_dip3_r ) /* Dipswitch #3 */
254   AM_RANGE(0x1f8000, 0x1f8001) AM_READ_PORT("DSW3") /* Dipswitch #3 */
257255ADDRESS_MAP_END
258256
259257static ADDRESS_MAP_START( robocop2_writemem, ADDRESS_SPACE_PROGRAM, 16 )
r2844r2845
431429
432430static INPUT_PORTS_START( edrandy )
433431
434   PORT_START
432   PORT_START_TAG("IN0")
435433   DATAEAST_2BUTTON
436434
437   PORT_START
435   PORT_START_TAG("IN1")
438436   PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 )
439437   PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_COIN2 )
440438   PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_SERVICE1 )
441439   PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_VBLANK )
442440
443441   PORT_START_TAG("DSW")
444
445442   DATAEAST_COINAGE
446443
447444   PORT_DIPNAME( 0x0040, 0x0000, DEF_STR( Flip_Screen ) ) PORT_DIPLOCATION("SW1:7")
r2844r2845
486483
487484static INPUT_PORTS_START( cninja )
488485
489   PORT_START
486   PORT_START_TAG("IN0")
490487   DATAEAST_2BUTTON
491488
492   PORT_START
489   PORT_START_TAG("IN1")
493490   PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 )
494491   PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_COIN2 )
495492   PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_SERVICE1 )
r2844r2845
540537INPUT_PORTS_END
541538
542539static INPUT_PORTS_START( robocop2 )
543   PORT_START
540   PORT_START_TAG("IN0")
544541   PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_8WAY PORT_PLAYER(1)
545542   PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_8WAY PORT_PLAYER(1)
546543   PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_8WAY PORT_PLAYER(1)
r2844r2845
558555   PORT_BIT( 0x4000, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_PLAYER(2)
559556   PORT_BIT( 0x8000, IP_ACTIVE_LOW, IPT_START2 )
560557
561   PORT_START
558   PORT_START_TAG("IN1")
562559   PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 )
563560   PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_COIN2 )
564561   PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_SERVICE1 )
r2844r2845
597594   PORT_DIPSETTING(      0x8000, DEF_STR( Off ) )
598595   PORT_DIPSETTING(      0x0000, DEF_STR( On ) )
599596
600   PORT_START
597   PORT_START_TAG("DSW3")
601598   PORT_DIPNAME( 0x0003, 0x0003, "Bullets" ) PORT_DIPLOCATION("SW3:1,2")   /* Dip switch bank 3 */
602599   PORT_DIPSETTING(      0x0000, "Least" )
603600   PORT_DIPSETTING(      0x0001, "Less" )
r2844r2845
623620
624621static INPUT_PORTS_START( mutantf )
625622
626   PORT_START
623   PORT_START_TAG("IN0")
627624   DATAEAST_2BUTTON
628625
629   PORT_START
626   PORT_START_TAG("IN1")
630627   PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 )
631628   PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_COIN2 )
632629   PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_SERVICE1 )
src/mame/drivers/jcross.c
r2844r2845
2424
2525UINT8 *jcr_textram;
2626
27WRITE8_HANDLER( snkwave_w );
28
2927READ8_HANDLER( jcross_background_ram_r );
3028WRITE8_HANDLER( jcross_background_ram_w );
3129
src/mame/drivers/nss.c
r2844r2845
295295#include "driver.h"
296296#include "includes/snes.h"
297297
298extern DRIVER_INIT( snes );
299
300298static ADDRESS_MAP_START( snes_map, ADDRESS_SPACE_PROGRAM, 8)
301299   AM_RANGE(0x000000, 0x2fffff) AM_READWRITE(snes_r_bank1, snes_w_bank1)   /* I/O and ROM (repeats for each bank) */
302300   AM_RANGE(0x300000, 0x3fffff) AM_READWRITE(snes_r_bank2, snes_w_bank2)   /* I/O and ROM (repeats for each bank) */
src/mame/drivers/mirage.c
r2844r2845
109109
110110static VIDEO_START(mirage)
111111{
112   deco16_1_video_init();
112   deco16_1_video_init(machine);
113113
114114   deco16_set_tilemap_bank_callback(0, mirage_bank_callback);
115115   deco16_set_tilemap_bank_callback(1, mirage_bank_callback);
src/mame/drivers/djboy.c
r2844r2845
227227static int
228228GetLives( running_machine *machine )
229229{
230   int dsw = input_port_read_indexed(machine, 4);
230   int dsw = input_port_read(machine, "DSW2");
231231   switch( dsw&0x30 )
232232   {
233233   case 0x10: return 3;
r2844r2845
240240
241241static WRITE8_HANDLER( coinplus_w )
242242{
243   int dsw = input_port_read_indexed(machine, 3);
243   int dsw = input_port_read(machine, "DSW1");
244244   coin_counter_w( 0, data&1 );
245245   coin_counter_w( 1, data&2 );
246246   if( data&1 )
r2844r2845
270270static void
271271OutputProtectionState( running_machine *machine, int i, int type )
272272{
273   int io = ~input_port_read_indexed(machine, 0);
273   int io = ~input_port_read(machine, "IN0");
274274   int dat = 0x00;
275275
276276   switch( mDjBoyState )
r2844r2845
393393      displayedCredits = 9;
394394   }
395395   ProtectionOut( i++, displayedCredits );
396   ProtectionOut( i++, input_port_read_indexed(machine, 0) ); /* COIN/START */
396   ProtectionOut( i++, input_port_read(machine, "IN0") ); /* COIN/START */
397397   OutputProtectionState( machine, i, type );
398398} /* CommonProt */
399399
r2844r2845
408408   if( prot_mode == ePROT_WAIT_DSW1_WRITEBACK )
409409   {
410410      logerror( "[DSW1_WRITEBACK]\n" );
411      ProtectionOut( 0, input_port_read_indexed(machine, 4) ); /* DSW2 */
411      ProtectionOut( 0, input_port_read(machine, "DSW2") ); /* DSW2 */
412412      prot_mode = ePROT_WAIT_DSW2_WRITEBACK;
413413   }
414414   else if( prot_mode == ePROT_WAIT_DSW2_WRITEBACK )
r2844r2845
476476         break;
477477
478478      case 0x05: /* 0x71f4 */
479         ProtectionOut( 0,input_port_read_indexed(machine, 1) ); // to $42
479         ProtectionOut( 0,input_port_read(machine, "IN1") ); // to $42
480480         ProtectionOut( 1,0 ); // ?
481         ProtectionOut( 2,input_port_read_indexed(machine, 2) ); // to $43
481         ProtectionOut( 2,input_port_read(machine, "IN2") ); // to $43
482482         ProtectionOut( 3,0 ); // ?
483483         ProtectionOut( 4,0 ); // ?
484484         CommonProt(    machine, 5,0x05 );
r2844r2845
489489         break;
490490
491491      case 0x08: /* pc == 0x727a */
492         ProtectionOut( 0,input_port_read_indexed(machine, 0) ); /* COIN/START */
493         ProtectionOut( 1,input_port_read_indexed(machine, 1) ); /* JOY1 */
494         ProtectionOut( 2,input_port_read_indexed(machine, 2) ); /* JOY2 */
495         ProtectionOut( 3,input_port_read_indexed(machine, 3) ); /* DSW1 */
496         ProtectionOut( 4,input_port_read_indexed(machine, 4) ); /* DSW2 */
492         ProtectionOut( 0,input_port_read(machine, "IN0") ); /* COIN/START */
493         ProtectionOut( 1,input_port_read(machine, "IN1") ); /* JOY1 */
494         ProtectionOut( 2,input_port_read(machine, "IN2") ); /* JOY2 */
495         ProtectionOut( 3,input_port_read(machine, "DSW1") ); /* DSW1 */
496         ProtectionOut( 4,input_port_read(machine, "DSW2") ); /* DSW2 */
497497         CommonProt(    machine, 5, 0x08 );
498498         break;
499499
r2844r2845
531531         break;
532532
533533      case 0xff: /* read DSW (pc == 0x714d) */
534         ProtectionOut( 0,input_port_read_indexed(machine, 3) ); /* DSW1 */
534         ProtectionOut( 0,input_port_read(machine, "DSW1") ); /* DSW1 */
535535         prot_mode = ePROT_WAIT_DSW1_WRITEBACK;
536536         break;
537537
r2844r2845
962962ROM_END
963963
964964static INPUT_PORTS_START( djboy )
965   PORT_START
965   PORT_START_TAG("IN0")
966966   PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_START1 )
967967   PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_START2 )
968968   PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_COIN1 )
r2844r2845
972972   PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_SERVICE )
973973   PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
974974
975   PORT_START
975   PORT_START_TAG("IN1")
976976   PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_8WAY
977977   PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_8WAY
978978   PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_8WAY
r2844r2845
982982   PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_BUTTON3 ) /* jump */
983983   PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
984984
985   PORT_START
985   PORT_START_TAG("IN2")
986986   PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_8WAY PORT_PLAYER(2)
987987   PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_8WAY PORT_PLAYER(2)
988988   PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_8WAY PORT_PLAYER(2)
r2844r2845
992992   PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_PLAYER(2)
993993   PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
994994
995   PORT_START
995   PORT_START_TAG("DSW1")
996996   PORT_DIPNAME( 0x01, 0x00, DEF_STR( Unknown ) )
997997   PORT_DIPSETTING(    0x00, DEF_STR( Off ) )
998998   PORT_DIPSETTING(    0x01, DEF_STR( On ) )
r2844r2845
10161016   PORT_DIPSETTING(    0xc0, DEF_STR( 2C_3C ) )
10171017   PORT_DIPSETTING(    0x40, DEF_STR( 1C_2C ) )
10181018
1019   PORT_START
1019   PORT_START_TAG("DSW2")
10201020   PORT_DIPNAME( 0x03, 0x00, DEF_STR( Difficulty ) )
10211021   PORT_DIPSETTING(    0x01, DEF_STR( Easy ) )
10221022   PORT_DIPSETTING(    0x00, DEF_STR( Normal ) )
src/mame/drivers/taito_x.c
r2844r2845
316316#include "seta.h"
317317#include "sound/2610intf.h"
318318#include "sound/2151intf.h"
319#include "includes/cchip.h"
319320
320MACHINE_RESET( cchip1 );
321READ16_HANDLER( cchip1_ctrl_r );
322READ16_HANDLER( cchip1_ram_r );
323WRITE16_HANDLER( cchip1_ctrl_w );
324WRITE16_HANDLER( cchip1_bank_w );
325WRITE16_HANDLER( cchip1_ram_w );
326321
327322
328
329323static READ16_HANDLER( superman_dsw_input_r )
330324{
331325   switch (offset)
src/mame/drivers/dietgo.c
r2844r2845
99#include "sound/2151intf.h"
1010#include "sound/okim6295.h"
1111#include "decocrpt.h"
12#include "decoprot.h"
1213#include "deco16ic.h"
1314
1415VIDEO_UPDATE( dietgo );
1516VIDEO_START( dietgo );
16READ16_HANDLER( dietgo_104_prot_r );
17WRITE16_HANDLER( dietgo_104_prot_w );
1817
1918
2019static ADDRESS_MAP_START( dietgo_map, ADDRESS_SPACE_PROGRAM, 16 )
src/mame/drivers/taitosj.c
r2844r2845
168168#include "cpu/m6805/m6805.h"
169169#include "sound/ay8910.h"
170170#include "sound/dac.h"
171#include "includes/taitosj.h"
171172
172173
173MACHINE_START( taitosj );
174MACHINE_RESET( taitosj );
175WRITE8_HANDLER( taitosj_bankswitch_w );
176READ8_HANDLER( taitosj_fake_data_r );
177READ8_HANDLER( taitosj_fake_status_r );
178WRITE8_HANDLER( taitosj_fake_data_w );
179READ8_HANDLER( taitosj_mcu_data_r );
180READ8_HANDLER( taitosj_mcu_status_r );
181WRITE8_HANDLER( taitosj_mcu_data_w );
182READ8_HANDLER( taitosj_68705_portA_r );
183READ8_HANDLER( taitosj_68705_portB_r );
184READ8_HANDLER( taitosj_68705_portC_r );
185WRITE8_HANDLER( taitosj_68705_portA_w );
186WRITE8_HANDLER( taitosj_68705_portB_w );
187
188READ8_HANDLER( spacecr_prot_r );
189WRITE8_HANDLER( alpine_protection_w );
190WRITE8_HANDLER( alpinea_bankswitch_w );
191READ8_HANDLER( alpine_port_2_r );
192
193extern UINT8 *taitosj_videoram_1;
194extern UINT8 *taitosj_videoram_2;
195extern UINT8 *taitosj_videoram_3;
196extern UINT8 *taitosj_spriteram;
197extern UINT8 *taitosj_paletteram;
198extern UINT8 *taitosj_characterram;
199extern UINT8 *taitosj_scroll;
200extern UINT8 *taitosj_colscrolly;
201extern UINT8 *taitosj_gfxpointer;
202extern UINT8 *taitosj_colorbank;
203extern UINT8 *taitosj_video_mode;
204extern UINT8 *taitosj_video_priority;
205extern UINT8 *taitosj_collision_reg;
206extern UINT8 *kikstart_scrollram;
207
208READ8_HANDLER( taitosj_gfxrom_r );
209WRITE8_HANDLER( taitosj_videoe_w );
210WRITE8_HANDLER( taitosj_characterram_w );
211WRITE8_HANDLER( junglhbr_characterram_w );
212WRITE8_HANDLER( taitosj_collision_reg_clear_w );
213VIDEO_START( taitosj );
214VIDEO_UPDATE( taitosj );
215VIDEO_UPDATE( kikstart );
216
217
218174static UINT8 sndnmi_disable = 1;
219175
220176static WRITE8_HANDLER( taitosj_sndnmi_msk_w )
src/mame/drivers/canyon.c
r2844r2845
6464{
6565   UINT8 val = 0;
6666
67   if ((input_port_read_indexed(machine, 2) >> (offset & 7)) & 1)
67   if ((input_port_read(machine, "IN2") >> (offset & 7)) & 1)
6868   {
6969      val |= 0x80;
7070   }
71   if ((input_port_read_indexed(machine, 1) >> (offset & 3)) & 1)
71   if ((input_port_read(machine, "IN1") >> (offset & 3)) & 1)
7272   {
7373      val |= 0x01;
7474   }
r2844r2845
7979
8080static READ8_HANDLER( canyon_options_r )
8181{
82   return (input_port_read_indexed(machine, 0) >> (2 * (~offset & 3))) & 3;
82   return (input_port_read(machine, "DSW") >> (2 * (~offset & 3))) & 3;
8383}
8484
8585
r2844r2845
129129 *************************************/
130130
131131static INPUT_PORTS_START( canyon )
132   PORT_START      /* DSW */
132   PORT_START_TAG("DSW")      /* DSW */
133133   PORT_DIPNAME( 0x03, 0x00, DEF_STR( Language ) )
134134   PORT_DIPSETTING(    0x00, DEF_STR( English ) )
135135   PORT_DIPSETTING(    0x01, DEF_STR( Spanish ) )
r2844r2845
146146   PORT_DIPSETTING(    0x40, DEF_STR( 1C_2C ))
147147   PORT_DIPSETTING(    0x00, DEF_STR( Free_Play ) )
148148
149   PORT_START      /* IN1 */
149   PORT_START_TAG("IN1")      /* IN1 */
150150   PORT_BIT(0x01, IP_ACTIVE_HIGH, IPT_UNUSED )
151151   PORT_BIT(0x02, IP_ACTIVE_HIGH, IPT_UNUSED )
152152   PORT_BIT(0x04, IP_ACTIVE_HIGH, IPT_BUTTON1 ) PORT_PLAYER(1)
153153   PORT_BIT(0x08, IP_ACTIVE_HIGH, IPT_BUTTON1 ) PORT_PLAYER(2)
154154
155   PORT_START      /* IN2 */
155   PORT_START_TAG("IN2")      /* IN2 */
156156   PORT_BIT ( 0x01, IP_ACTIVE_HIGH, IPT_COIN1 )
157157   PORT_BIT ( 0x02, IP_ACTIVE_HIGH, IPT_COIN2 )
158158   PORT_BIT ( 0x04, IP_ACTIVE_HIGH, IPT_START1 )
src/mame/drivers/tecmosys.c
r2844r2845
405405}
406406
407407
408WRITE16_HANDLER( tilemap_paletteram16_xGGGGGRRRRRBBBBB_word_w )
408static WRITE16_HANDLER( tilemap_paletteram16_xGGGGGRRRRRBBBBB_word_w )
409409{
410410   COMBINE_DATA(&tilemap_paletteram16[offset]);
411411   set_color_555(offset+0x4000, 5, 10, 0, tilemap_paletteram16[offset]);
r2844r2845
714714   }
715715}
716716
717void tecmosys_tilemap_copy_to_compose(UINT16 pri)
717static void tecmosys_tilemap_copy_to_compose(UINT16 pri)
718718{
719719   int y,x;
720720   UINT16 *srcptr;
r2844r2845
731731   }
732732}
733733
734void tecmosys_do_final_mix(bitmap_t* bitmap)
734static void tecmosys_do_final_mix(bitmap_t* bitmap)
735735{
736736   const pen_t *paldata = Machine->pens;
737737   int y,x;
r2844r2845
11061106   device_status = DS_IDLE;
11071107}
11081108
1109void tecmosys_decramble(void)
1109static void tecmosys_decramble(void)
11101110{
11111111   UINT8 *gfxsrc    = memory_region       ( REGION_GFX1 );
11121112   size_t  srcsize = memory_region_length( REGION_GFX1 );
src/mame/drivers/thayers.c
r2844r2845
11/*
2RDI Video Systems Thayer's Quest laserdisc hardware
3Driver by Andrew Gardner from schematics with help from Daphne Source
42
5Notes:
6    How odd.  The schematics say there's a COP421L hooked up, but they also make mention of
7      a COP404L - A ROMless COP420 with 1k of RAM.  I wonder which one is correct?
3    TODO:
84
9Todo:
10    Fix up my poor interpretation of the hard-to-read schematics.
11    Write a real SC-01 (SSI-263) emulator for MAME.
12    Convert to tilemaps.
5    - LDV1000 mode
6    - PR7820 INT/_EXT line
7    - coin counter
8    - convert SSI-263 to a sound device
9    - dump laserdisc
10
1311*/
1412
1513#include "driver.h"
1614#include "render.h"
1715#include "machine/laserdsc.h"
1816#include "cpu/cop400/cop400.h"
17//#include "dlair.lh"
1918
20#define SCHEMATIC_CLOCK (4000000)
19extern const char layout_dlair[];
2120
22/*
23 * Z80 IRQ Status bit
24 * ------------------
25 *
26 * Bit      | Use
27 * 76543210-+----------------
28 * -------x | Unused
29 * ------x- | Unused
30 * -----x-- | SSI-263 Request Data.
31 * ----x--- | always high. (? but it's checked at 0x1bb ?)
32 * ---x---- | /TIMER INT.
33 * --x----- | /DATA RDY INT.
34 * -x------ | /CART PRES.
35 * x------- | Unused
36 */
37static UINT8 z80_irq_status;
21static laserdisc_info *discinfo;
22static UINT8 laserdisc_type;
23static UINT8 laserdisc_data;
3824
39#define Z80_IRQ_STATUS_SET()   (z80_irq_status = 0x00)
40#define Z80_IRQ_STATUS_CLEAR() (z80_irq_status = 0xff)
25static int rx_bit;
26static int keylatch;
4127
42#define Z80_SSI_REQUEST()  ((z80_irq_status & 0x04) >> 2)
43#define Z80_TIMER_INT()    ((z80_irq_status & 0x10) >> 4)
44#define Z80_DATA_RDY_INT() ((z80_irq_status & 0x20) >> 5)
45#define Z80_CART_PRES()    ((z80_irq_status & 0x40) >> 6)
28static UINT8 cop_data_latch;
29static int cop_data_latch_enable;
30static UINT8 cop_l;
31static UINT8 cop_cmd_latch;
4632
47#define SET_Z80_SSI_REQUEST()  (z80_irq_status &= ~0x04)
48#define SET_Z80_TIMER_INT()    (z80_irq_status &= ~0x10)
49#define SET_Z80_DATA_RDY_INT() (z80_irq_status &= ~0x20)
50#define SET_Z80_CART_PRES()    (z80_irq_status &= ~0x40)
33static int timer_int = 1;
34static int data_rdy_int = 1;
35static int ssi_data_request = 1;
5136
52#define CLEAR_Z80_SSI_REQUEST()  (z80_irq_status |= 0x04)
53#define CLEAR_Z80_TIMER_INT()    (z80_irq_status |= 0x10)
54#define CLEAR_Z80_DATA_RDY_INT() (z80_irq_status |= 0x20)
55#define CLEAR_Z80_CART_PRES()    (z80_irq_status |= 0x40)
37static int cart_present;
38static int pr7820_enter;
5639
40static const UINT8 led_map[16] = { 0x3f, 0x06, 0x5b, 0x4f, 0x66, 0x6d, 0x7c, 0x07, 0x7f, 0x67, 0x77, 0x7c, 0x39, 0x5e, 0x79, 0x00 };
5741
58/* Misc variables */
59static UINT8* ram_ic;
60static laserdisc_info *discinfo;
42/* Video */
6143
62static UINT8 m_ssi_control;
63static UINT8 cop_g_latch;
64static UINT8 cop_l_latch;
65
66
67
68/* VIDEO GOODS */
6944static VIDEO_UPDATE( thayers )
7045{
7146   /* display disc information */
r2844r2845
7550   return 0;
7651}
7752
53/* Interrupts */
7854
55static void check_interrupt(running_machine *machine)
56{
57   if (!timer_int || !data_rdy_int || !ssi_data_request)
58   {
59      cpunum_set_input_line(machine, 0, INPUT_LINE_IRQ0, HOLD_LINE);
60   }
61   else
62   {
63      cpunum_set_input_line(machine, 0, INPUT_LINE_IRQ0, CLEAR_LINE);
64   }
65}
7966
80/* MEMORY HANDLERS */
81/* Z80 R/W */
82static READ8_HANDLER(z80_irq_status_r)
67static TIMER_CALLBACK( intrq_tick )
8368{
84   return z80_irq_status;
69   cpunum_set_input_line(machine, 0, INPUT_LINE_IRQ0, CLEAR_LINE);
8570}
8671
87static READ8_HANDLER(ram_ic_read)
72static WRITE8_HANDLER( intrq_w )
8873{
89   /* Daphne patches.
90    if (offset == 0xbe07-0x8000)
91        return 0x02;
74   // T = 1.1 * R30 * C53 = 1.1 * 750K * 0.01uF = 8.25 ms
9275
93    if (offset == 0xbe17-0x8000)
94        return 0x01;
76   cpunum_set_input_line(machine, 0, INPUT_LINE_IRQ0, HOLD_LINE);
77
78   timer_set(ATTOTIME_IN_USEC(8250), NULL, 0, intrq_tick);
79}
80
81static READ8_HANDLER( irqstate_r )
82{
83   /*
84
85        bit     description
86
87        0
88        1
89        2       SSI263 A/_R
90        3       tied to +5V
91        4       _TIMER INT
92        5       _DATA RDY INT
93        6       _CART PRES
94        7
95
9596    */
9697
97   return ram_ic[offset];
98   return (data_rdy_int << 5) | (timer_int << 4) | 0x08 | (ssi_data_request << 2);
9899}
99100
100static CUSTOM_INPUT( laserdisc_status_r )
101static WRITE8_HANDLER( timer_int_ack_w )
101102{
102   if (discinfo == NULL)
103      return 0;
103   timer_int = 1;
104104
105   /* Someday handle multiple LD players */
106   return (laserdisc_line_r(discinfo, LASERDISC_LINE_STATUS) == ASSERT_LINE) ? 0 : 1;
105   check_interrupt(machine);
107106}
108107
109static CUSTOM_INPUT( laserdisc_command_r )
108static WRITE8_HANDLER( data_rdy_int_ack_w )
110109{
111   if (discinfo == NULL)
112      return 0;
110   data_rdy_int = 1;
113111
114   /* Someday handle multiple LD players */
115   return (laserdisc_line_r(discinfo, LASERDISC_LINE_COMMAND) == ASSERT_LINE) ? 0 : 1;
112   check_interrupt(machine);
116113}
117114
118static WRITE8_HANDLER(ram_ic_write)
115static WRITE8_HANDLER( cop_d_w )
119116{
120   ram_ic[offset] = data;
117   /*
118
119        bit     description
120
121        D0      _TIMER INT
122        D1      _DATA RDY INT
123        D2
124        D3
125
126    */
127
128   if (!BIT(data, 0))
129   {
130      timer_int = 0;
131   }
132
133   if (!BIT(data, 1))
134   {
135      data_rdy_int = 0;
136   }
137
138   check_interrupt(machine);
121139}
122140
123static WRITE8_HANDLER(data_ready_int_w)
141/* COP Communication */
142
143static READ8_HANDLER( cop_data_r )
124144{
125   CLEAR_Z80_DATA_RDY_INT();
126   /* Hackaroo? */
127   /* cop_l_latch = 0x00; */
145   if (!cop_data_latch_enable)
146   {
147      return cop_data_latch;
148   }
149   else
150   {
151      return cop_l;
152   }
128153}
129154
130static WRITE8_HANDLER(timer_int_w)
155static WRITE8_HANDLER( cop_data_w )
131156{
132   CLEAR_Z80_TIMER_INT();
157   cop_data_latch = data;
133158}
134159
135static WRITE8_HANDLER(write_cop)
160static READ8_HANDLER( cop_l_r )
136161{
137   logerror("Writing 0x%x to COP port G\n", data);
162   if (!cop_data_latch_enable)
163   {
164      return cop_data_latch;
165   }
166   else
167   {
168      return 0;
169   }
170}
138171
139   /* Bits 5-7 write to COP421 ports G0-G2 */
140   cop_g_latch = (data >> 5) & 0x07;
172static WRITE8_HANDLER( cop_l_w )
173{
174   cop_l = data;
175}
141176
142   /* Bit 2 goes to BANKSELT */
143   /* bankselect = (data & 0x04) >> 2; */
177static READ8_HANDLER( cop_g_r )
178{
179   /*
144180
145   /* Bit 1 goes to CS128x? (illegible schems) */
181        bit     description
182
183        G0      U16 Q0
184        G1      U16 Q1
185        G2      U16 Q2
186        G3
187
188    */
189
190   return cop_cmd_latch;
146191}
147192
148#ifdef UNUSED_FUNCTION
149static WRITE8_HANDLER(data_write_cop)
193static WRITE8_HANDLER( control_w )
150194{
151   cop_l_latch = data;
195   /*
196
197        bit     description
198
199        0
200        1       _CS128A
201        2       _BANKSEL1
202        3
203        4
204        5       COP G0
205        6       COP G1
206        7       COP G2
207
208    */
209
210   cop_cmd_latch = (data >> 5) & 0x07;
152211}
153#endif
154212
155static WRITE8_HANDLER(intrq_w)
213static WRITE8_HANDLER( cop_g_w )
156214{
157   cpunum_set_input_line(machine, 0, 0, ASSERT_LINE);
215   /*
216
217        bit     description
218
219        G0
220        G1
221        G2
222        G3      U17 enable
223
224    */
225
226   cop_data_latch_enable = BIT(data, 3);
158227}
159228
160static WRITE8_HANDLER(sc01_register_w)
229/* Keyboard */
230
231static READ8_HANDLER(cop_si_r)
161232{
162   /* (Thank you Daphne) */
163   switch (offset)
233   /* keyboard data */
234
235   /*
236
237        Serial communications format
238
239        1, 1, 0, 1, Q8, P0, P1, P2, P3, 0
240
241    */
242
243   switch (rx_bit)
164244   {
165      case 0x00:
166         if (m_ssi_control)
167         {
168            logerror("SC-01 control mode : 0x%x\n", data);
245   case 0:
246   case 1:
247   case 3:
248      return 1;
169249
170            switch(data)
171            {
172               /* Stop requesting phonemes */
173               case 0x00:
174                  CLEAR_Z80_SSI_REQUEST();
175                  break;
250   case 4:
251      return (keylatch == 9);
176252
177               /* Start adding phonemes */
178               case 0xc0:
179                  SET_Z80_SSI_REQUEST();
180                    if (!(Z80_SSI_REQUEST()))
181                     logerror("SETTING IRQ LINE sc01\n");
182                        cpunum_set_input_line(machine, 0, 0, ASSERT_LINE);
183                  break;
253   case 5:
254   case 6:
255   case 7:
256   case 8:
257      {
258         UINT8 data;
259         char port[4];
184260
185               default:
186                  logerror("SC-01 control mode invalid code 0x%x\n", data);
187                  break;
188            }
189         }
190         else
191         {
192            logerror("SC-01 receiving phonemes 0x%x\n", data & 0x3f);
193         }
194         break;
261         sprintf(port, "R%d", keylatch);
195262
196      case 0x01:
197         logerror("SC-01 inflection changed to 0x%x\n", data);
198         break;
263         data = BIT(input_port_read(machine, port), rx_bit - 5);
199264
200      case 0x02:
201         logerror("SC-01 speech rate changed to 0x%x\n", data);
202         break;
265         return data;
266      }
203267
204      case 0x03:
205         if (data & 0x80)
268   default:
269      return 0;
270   }
271}
272
273static WRITE8_HANDLER( cop_so_w )
274{
275   /* keyboard clock */
276
277   if (data)
278   {
279      rx_bit++;
280
281      if (rx_bit == 10)
282      {
283         rx_bit = 0;
284
285         keylatch++;
286
287         if (keylatch == 10)
206288         {
207            m_ssi_control = 1;
208            logerror("SC-01 now in control mode.\n");
289            keylatch = 0;
209290         }
210         else if (data & 0x70)
211         {
212            m_ssi_control = 0;
213            logerror("SC-01 control mode cleared.\n");
214         }
215         else
216         {
217            logerror("SC-01 amplitude manipulated 0x%x.\n", data);
218         }
219         break;
220
221      case 0x04:
222         logerror("SC-01 filter frequency changed to 0x%x.\n", data);
223         break;
291      }
224292   }
225293}
226294
295/* I/O Board */
227296
228/* COP R/W */
229/* All 8 l pins are hooked up here */
230static READ8_HANDLER(cop_l_read)
297static WRITE8_HANDLER( control2_w )
231298{
232   logerror("COP - Reading from L @ (0x%x)\n", activecpu_get_pc());
233   return cop_l_latch;
299   /*
300
301        bit     description
302
303        0
304        1       _RESOI (?)
305        2       _ENCARTDET
306        3
307        4
308        5
309        6
310        7
311
312    */
313
314   if (!BIT(data, 2) & cart_present)
315   {
316      cpunum_set_input_line(machine, 0, INPUT_LINE_NMI, HOLD_LINE);
317   }
234318}
235319
236/* Pins g0, g1, g2, and g3 are all hooked up */
237static READ8_HANDLER(cop_g_read)
320static READ8_HANDLER( dsw_b_r )
238321{
239   logerror("COP - Reading from G @ (0x%x)\n", activecpu_get_pc());
240   return cop_g_latch;
322   return (input_port_read(machine, "COIN") & 0xf0) | (input_port_read(machine, "DSWB") & 0x0f);
241323}
242324
243static WRITE8_HANDLER(cop_l_write)
325static READ8_HANDLER( laserdsc_data_r )
244326{
245   logerror("COP - WRITING TO L 0x%x @ (0x%x)\n", data, activecpu_get_pc());
246   cop_l_latch = data;
327   return laserdisc_data_r(discinfo);
247328}
248329
249static WRITE8_HANDLER(cop_g_write)
330static WRITE8_HANDLER( laserdsc_data_w )
250331{
251   logerror("COP - WRITING TO G 0x%x @ (0x%x)\n", data, activecpu_get_pc());
252
253   /* Bit 3 goes to an enable pin on the data latch? */
254   /* Bits 0-2 seem to go into the wrong side of a logic IC? */
332   laserdisc_data = data;
255333}
256334
257/* Schematics say pins d0 and d1 are the only two that are hooked up */
258static WRITE8_HANDLER(cop_d_write)
335static WRITE8_HANDLER( laserdsc_control_w )
259336{
260   int irq_flag = 0;
337   /*
261338
262   logerror("COP - WRITING TO D 0x%x @ (0x%x)\n", data, activecpu_get_pc());
339 bit     description
263340
264   /* Pin d0 - TIMER INT */
265   if (!(data & 0x01))
341        0
342        1
343        2
344        3
345        4       coin counter
346        5       U16 output enable
347        6       ENTER if switch B5 closed
348        7       INT/_EXT
349
350    */
351
352   coin_counter_w(0, BIT(data, 4));
353
354   if (BIT(data, 5))
266355   {
267      SET_Z80_TIMER_INT();
268      irq_flag = 1;
269      logerror("THE COP IS TRIPPING THE TIMER INTERRUPT\n");
356      laserdisc_data_w(discinfo, laserdisc_data);
270357   }
271   else
272   {
273      CLEAR_Z80_TIMER_INT();
274   }
275358
276   /* Pin d1 - DATA READY INT */
277   if (!(data & 0x02))
359   switch (laserdisc_type)
278360   {
279      SET_Z80_DATA_RDY_INT();
280      irq_flag = 1;
281      logerror("THE COP IS TRIPPING THE DATA READY INTERRUPT\n");
282   }
283   else
284   {
285      CLEAR_Z80_DATA_RDY_INT();
286   }
361   case LASERDISC_TYPE_PR7820:
362      pr7820_enter = BIT(data, 6) ? CLEAR_LINE : ASSERT_LINE;
287363
288   /* Assert the Z80's interrupt line if necessary */
289   if (irq_flag)
290   {
291      cpunum_set_input_line(machine, 0, 0, ASSERT_LINE);
364      laserdisc_line_w(discinfo, LASERDISC_LINE_ENTER, pr7820_enter);
365
366      // BIT(data, 7) is INT/_EXT, but there is no such input line in laserdsc.h
367      break;
368
369   case LASERDISC_TYPE_LDV1000:
370      laserdisc_line_w(discinfo, LASERDISC_LINE_ENTER, BIT(data, 7) ? CLEAR_LINE : ASSERT_LINE);
371      break;
292372   }
293373}
294374
295static int kb_bit;
375static WRITE8_HANDLER( den1_w )
376{
377   /*
296378
297static READ8_HANDLER(cop_si_r)
379        bit     description
380
381        0       DD0
382        1       DD1
383        2       DD2
384        3       DD3
385        4       DA0
386        5       DA1
387        6       DA2
388        7       DA3
389
390    */
391
392   output_set_digit_value(data >> 4, led_map[data & 0x0f]);
393}
394
395static WRITE8_HANDLER( den2_w )
298396{
299   UINT8 data;
300   char port[4];
301   int row = kb_bit / 8;
302   int col = kb_bit % 8;
397   /*
303398
304   sprintf(port, "R%d", row);
399        bit    description
305400
306   switch (col)
401        0       DD0
402        1       DD1
403        2       DD2
404        3       DD3
405        4       DA0
406        5       DA1
407        6       DA2
408        7       DA3
409
410    */
411
412   output_set_digit_value(8 + (data >> 4), led_map[data & 0x0f]);
413}
414
415/* SSI-263 */
416
417/*
418
419    The following information is from the SSI-263A data sheet.
420
421    Thayer's Quest uses an SSI-263, so this might be inaccurate, but it works for now
422
423*/
424
425#define SSI263_CLOCK (XTAL_4MHz/2)
426
427static const char SSI263_PHONEMES[0x40][5] =
428{
429   "PA", "E", "E1", "Y", "YI", "AY", "IE", "I", "A", "AI", "EH", "EH1", "AE", "AE1", "AH", "AH1", "W", "O", "OU", "OO", "IU", "IU1", "U", "U1", "UH", "UH1", "UH2", "UH3", "ER", "R", "R1", "R2",
430   "L", "L1", "LF", "W", "B", "D", "KV", "P", "T", "K", "HV", "HVC", "HF", "HFC", "HN", "Z", "S", "J", "SCH", "V", "F", "THV", "TH", "M", "N", "NG", ":A", ":OH", ":U", ":UH", "E2", "LB"
431};
432
433static struct SSI263
434{
435   UINT8 dr;
436   UINT8 p;
437   UINT16 i;
438   UINT8 r;
439   UINT8 t;
440   UINT8 c;
441   UINT8 a;
442   UINT8 f;
443   UINT8 mode;
444} ssi263;
445
446static TIMER_CALLBACK( ssi263_phoneme_tick )
447{
448   ssi_data_request = 0;
449   check_interrupt(machine);
450}
451
452static WRITE8_HANDLER( ssi263_register_w )
453{
454   switch (offset)
307455   {
308456   case 0:
457      {
458      int frame_time = ((4096 * (16 - ssi263.r)) / 2); // us, /2 should actually be /SSI263_CLOCK, but this way we get microseconds directly
459      int phoneme_time = frame_time * (4 - ssi263.dr); // us
460
461      // duration/phoneme register
462      ssi263.dr = (data >> 5) & 0x03;
463      ssi263.p = data & 0x3f;
464
465      ssi_data_request = 1;
466      check_interrupt(machine);
467
468      switch (ssi263.mode)
469      {
470      case 0:
471      case 1:
472         // phoneme timing response
473         timer_set(ATTOTIME_IN_USEC(phoneme_time), NULL, 0, ssi263_phoneme_tick);
474         break;
475      case 2:
476         // frame timing response
477         timer_set(ATTOTIME_IN_USEC(frame_time), NULL, 0, ssi263_phoneme_tick);
478         break;
479      case 3:
480         // disable A/_R output
481         break;
482      }
483
484      //logerror("SSI263 Phoneme Duration: %u\n", ssi263.dr);
485      //logerror("SSI263 Phoneme: %02x %s\n", ssi263.p, SSI263_PHONEMES[ssi263.p]);
486      }
487      break;
488
309489   case 1:
490      // inflection register
491      ssi263.i = (data << 3) | (ssi263.i & 0x403);
492
493      //logerror("SSI263 Inflection: %u\n", ssi263.i);
494      break;
495
310496   case 2:
497      // rate/inflection register
498      ssi263.i = (BIT(data, 4) << 11) | (ssi263.i & 0x7f8) | (data & 0x07);
499      ssi263.r = data >> 4;
500
501      //logerror("SSI263 Inflection: %u\n", ssi263.i);
502      //logerror("SSI263 Rate: %u\n", ssi263.r);
503      break;
504
311505   case 3:
312      data = input_port_read(machine, port);
313      return BIT(data, col);
506      // control/articulation/amplitude register
507      if (ssi263.c && !BIT(data, 7))
508      {
509         ssi263.mode = ssi263.dr;
314510
511         switch (ssi263.mode)
512         {
513         case 0:
514            //logerror("SSI263 Phoneme Timing Response, Transitioned Inflection\n");
515            break;
516
517         case 1:
518            //logerror("SSI263 Phoneme Timing Response, Immediate Inflection\n");
519            break;
520
521         case 2:
522            // activate A/_R
523            //logerror("SSI263 Frame Timing Response, Immediate Inflection\n");
524            break;
525
526         case 3:
527            // disable A/_R output
528            //logerror("SSI263 A/R Output Disabled\n");
529            break;
530         }
531      }
532
533      ssi263.c = BIT(data, 7);
534      ssi263.t = (data >> 4) & 0x07;
535      ssi263.a = data & 0x0f;
536
537      //logerror("SSI263 Control: %u\n", ssi263.c);
538      //logerror("SSI263 Articulation: %u\n", ssi263.t);
539      //logerror("SSI263 Amplitude: %u\n", ssi263.a);
540      break;
541
315542   case 4:
316      return (row == 9);
317
318   default:
319      return 1;
543   case 5:
544   case 6:
545   case 7:
546      // filter frequency register
547      ssi263.f = data;
548      //logerror("SSI263 Filter Frequency: %u\n", ssi263.f);
549      break;
320550   }
321551}
322552
323static WRITE8_HANDLER(cop_so_w)
553static READ8_HANDLER( ssi263_register_r )
324554{
325   if (data)
326   {
327      kb_bit++;
555   // D7 becomes an output, as the inverted state of A/_R. The register address bits are ignored.
328556
329      if (kb_bit == 80)
330      {
331         kb_bit = 0;
332      }
333   }
557   return !ssi_data_request << 7;
334558}
335559
336/* PROGRAM MAPS */
337static ADDRESS_MAP_START( mainmem, ADDRESS_SPACE_PROGRAM, 8 )
560/* Memory Maps */
561
562static ADDRESS_MAP_START( thayers_map, ADDRESS_SPACE_PROGRAM, 8 )
338563   AM_RANGE(0x0000, 0x7fff) AM_ROM
339   AM_RANGE(0x8000, 0xbfff) AM_READWRITE(ram_ic_read,ram_ic_write) AM_BASE(&ram_ic)   /* Not quite sure how big the RAM IC is. */
340   AM_RANGE(0xc000, 0xdfff) AM_ROM                                          /* This is what Daphne says - we'll soon see. */
564   AM_RANGE(0x8000, 0xbfff) AM_RAM
565   AM_RANGE(0xc000, 0xdfff) AM_ROM
341566ADDRESS_MAP_END
342567
343static ADDRESS_MAP_START( copmem, ADDRESS_SPACE_PROGRAM, 8 )
344   AM_RANGE(0x000, 0x3ff) AM_ROM                  /* The schematics seem to claim this is a 2716 (0x800 bytes) - is the dump too small? */
568static ADDRESS_MAP_START( thayers_io_map, ADDRESS_SPACE_IO, 8 )
569   ADDRESS_MAP_GLOBAL_MASK(0xff)
570   AM_RANGE(0x00, 0x07) AM_READWRITE(ssi263_register_r, ssi263_register_w)
571   AM_RANGE(0x20, 0x20) AM_WRITE(control_w)
572   AM_RANGE(0x40, 0x40) AM_READWRITE(irqstate_r, control2_w)
573   AM_RANGE(0x80, 0x80) AM_READWRITE(cop_data_r, cop_data_w)
574   AM_RANGE(0xa0, 0xa0) AM_WRITE(timer_int_ack_w)
575   AM_RANGE(0xc0, 0xc0) AM_WRITE(data_rdy_int_ack_w)
576   AM_RANGE(0xf0, 0xf0) AM_READ(laserdsc_data_r)
577   AM_RANGE(0xf1, 0xf1) AM_READ(dsw_b_r)
578   AM_RANGE(0xf2, 0xf2) AM_READ_PORT("DSWA")
579   AM_RANGE(0xf3, 0xf3) AM_WRITE(intrq_w)
580   AM_RANGE(0xf4, 0xf4) AM_WRITE(laserdsc_data_w)
581   AM_RANGE(0xf5, 0xf5) AM_WRITE(laserdsc_control_w)
582   AM_RANGE(0xf6, 0xf6) AM_WRITE(den1_w)
583   AM_RANGE(0xf7, 0xf7) AM_WRITE(den2_w)
345584ADDRESS_MAP_END
346585
347
348/* IO MAPS */
349static ADDRESS_MAP_START( mainio, ADDRESS_SPACE_IO, 8 )
350   ADDRESS_MAP_GLOBAL_MASK(0xff)
351   AM_RANGE(0x00,0x04) AM_WRITE(sc01_register_w)
352   AM_RANGE(0x20,0x20) AM_WRITE(write_cop)
353   AM_RANGE(0x40,0x40) AM_READ(z80_irq_status_r)
354/*  AM_RANGE(0x80,0x80) AM_WRITE(data_write_cop) */
355   AM_RANGE(0xa0,0xa0) AM_WRITE(timer_int_w)
356   AM_RANGE(0xc0,0xc0) AM_WRITE(data_ready_int_w)
357
358/*  AM_RANGE(0xf0,0xf0) */                  /* Laserdisc data read */
359   AM_RANGE(0xf1,0xf1)   AM_READ_PORT("DSWB")   /* 4 dips, 2 coins, Laserdisc 'ready' and 'enter' pins */
360   AM_RANGE(0xf2,0xf2)   AM_READ_PORT("DSWA")   /* 8 dips */
361   AM_RANGE(0xf3,0xf3)   AM_WRITE(intrq_w)      /* goes to /INTRQ */
362/*  AM_RANGE(0xf4,0xf4) */                  /* Laserdisc data write */
363/*  AM_RANGE(0xf5,0xf5) */                  /* Coin counter, 0xf4 write enable, DIP-controlled (SWB-6) LDV1000 'enter' line, and LDV1000 INT/!EXT line */
364/*  AM_RANGE(0xf6,0xf6) */                  /* Scoreboard DEN1 */
365/*  AM_RANGE(0xf7,0xf7) */                  /* Scoreboard DEN2 */
586static ADDRESS_MAP_START( thayers_cop_map, ADDRESS_SPACE_PROGRAM, 8 )
587   AM_RANGE(0x000, 0x3ff) AM_ROM
366588ADDRESS_MAP_END
367589
368static ADDRESS_MAP_START( copio, ADDRESS_SPACE_IO, 8 )
369   AM_RANGE(COP400_PORT_L,  COP400_PORT_L)   AM_READWRITE(cop_l_read,cop_l_write)
370   AM_RANGE(COP400_PORT_G,  COP400_PORT_G)   AM_READWRITE(cop_g_read,cop_g_write)
371   AM_RANGE(COP400_PORT_D,  COP400_PORT_D)   AM_WRITE(cop_d_write)
372   AM_RANGE(COP400_PORT_SK, COP400_PORT_SK)  AM_WRITENOP
373   AM_RANGE(COP400_PORT_SIO,COP400_PORT_SIO) AM_READ(cop_si_r) AM_WRITE(cop_so_w)
590static ADDRESS_MAP_START( thayers_cop_io_map, ADDRESS_SPACE_IO, 8 )
591   AM_RANGE(COP400_PORT_L, COP400_PORT_L) AM_READWRITE(cop_l_r, cop_l_w)
592   AM_RANGE(COP400_PORT_G, COP400_PORT_G) AM_READWRITE(cop_g_r, cop_g_w)
593   AM_RANGE(COP400_PORT_D, COP400_PORT_D) AM_WRITE(cop_d_w)
594   AM_RANGE(COP400_PORT_SK, COP400_PORT_SK) AM_WRITENOP
595   AM_RANGE(COP400_PORT_SIO, COP400_PORT_SIO) AM_READ(cop_si_r) AM_WRITE(cop_so_w)
374596ADDRESS_MAP_END
375597
376/* PORTS */
598/* Input Ports */
599
600static CUSTOM_INPUT( laserdisc_enter_r )
601{
602   if (discinfo == NULL)
603      return 0;
604
605   switch (laserdisc_type)
606   {
607   case LASERDISC_TYPE_PR7820:
608      return pr7820_enter;
609
610   case LASERDISC_TYPE_LDV1000:
611      return (laserdisc_line_r(discinfo, LASERDISC_LINE_STATUS) == ASSERT_LINE) ? 0 : 1;
612   }
613
614   return 0;
615}
616
617static CUSTOM_INPUT( laserdisc_ready_r )
618{
619   if (discinfo == NULL)
620      return 0;
621
622   switch (laserdisc_type)
623   {
624   case LASERDISC_TYPE_PR7820:
625      return (laserdisc_line_r(discinfo, LASERDISC_LINE_READY) == ASSERT_LINE) ? 0 : 1;
626
627   case LASERDISC_TYPE_LDV1000:
628      return (laserdisc_line_r(discinfo, LASERDISC_LINE_COMMAND) == ASSERT_LINE) ? 0 : 1;
629   }
630
631   return 0;
632}
633
377634static INPUT_PORTS_START( thayers )
378635   PORT_START_TAG("DSWA")
379636   PORT_DIPNAME( 0x07, 0x07, "Time Per Coin" ) PORT_DIPLOCATION( "A:3,2,1" )
r2844r2845
400657   PORT_DIPUNUSED_DIPLOC( 0x80, IP_ACTIVE_LOW, "A:8" )
401658
402659   PORT_START_TAG("DSWB")
403   PORT_DIPNAME( 0x01, 0x01, "Gameplay Mode" ) PORT_DIPLOCATION( "B:1" )
404   PORT_DIPSETTING(    0x01, "Normal Play" )
405   PORT_DIPSETTING(    0x00, "Self-Diagnostics Mode" )
660   PORT_SERVICE_DIPLOC( 0x01, 0x01, "B:1" )
406661   PORT_DIPUNUSED_DIPLOC( 0x02, IP_ACTIVE_LOW, "B:2" )
407662   PORT_DIPUNUSED_DIPLOC( 0x04, IP_ACTIVE_LOW, "B:3" )
408   PORT_DIPNAME( 0x08, 0x08, "LD Player" ) PORT_DIPLOCATION( "B:4" )
409   PORT_DIPSETTING(    0x08, "LDV-1000" )
663   PORT_DIPNAME( 0x18, 0x00, "LD Player" ) PORT_DIPLOCATION( "B:5,4" )
664   PORT_DIPSETTING(    0x18, "LDV-1000" )
410665   PORT_DIPSETTING(    0x00, "PR-7820" )
411   /* DIP SWITCH 5 isn't read here, but it also controls LD player selection - I wonder how to add it properly? */
666   PORT_DIPUNUSED_DIPLOC( 0xe0, IP_ACTIVE_LOW, "B:8,7,6" )
667
668   PORT_START_TAG("COIN")
412669   PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_COIN1 )
413670   PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_COIN2 )
414   PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_CUSTOM(laserdisc_command_r, 0 )   /* Enter pin on LD player */
415   PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_CUSTOM(laserdisc_status_r, 0 )   /* Ready pin on LD player */
671   PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_CUSTOM(laserdisc_enter_r, 0 )
672   PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_CUSTOM(laserdisc_ready_r, 0 )
416673
417   /* "Scan codes" heisted from Daphne - need to be tested! */
418/*
419    PORT_START_TAG("THAYERS_ACTIONS")
420    PORT_BIT( 0x30, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME( DEF_STR( No ) ) PORT_CODE( KEYCODE_DEL_PAD )
421    PORT_BIT( 0x31, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME( DEF_STR( Yes ) ) PORT_CODE( KEYCODE_0_PAD )
422    PORT_BIT( 0x32, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME( "Items" ) PORT_CODE( KEYCODE_1_PAD )
423    PORT_BIT( 0x33, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME( "Drop Item" ) PORT_CODE( KEYCODE_2_PAD )
424    PORT_BIT( 0x34, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME( "Give Score" ) PORT_CODE( KEYCODE_3_PAD )
425    PORT_BIT( 0x35, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME( "Replay" ) PORT_CODE( KEYCODE_4_PAD )
426    PORT_BIT( 0x36, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME( "Combine Action" ) PORT_CODE( KEYCODE_6_PAD )
427    PORT_BIT( 0x37, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME( "Save Game" ) PORT_CODE( KEYCODE_7_PAD )
428    PORT_BIT( 0x38, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME( "Update" ) PORT_CODE( KEYCODE_8_PAD )
429    PORT_BIT( 0x39, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME( "Hint" ) PORT_CODE( KEYCODE_9_PAD )
430
431    PORT_START_TAG("THAYERS_LETTERS")
432    PORT_BIT( 0x41, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME( "A" ) PORT_CODE( KEYCODE_A )
433    PORT_BIT( 0x42, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME( "B - Silver Wheat" ) PORT_CODE( KEYCODE_B )
434    PORT_BIT( 0x43, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME( "C - Spell of Seeing" ) PORT_CODE( KEYCODE_C )
435    PORT_BIT( 0x44, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME( "D - Great Circlet" ) PORT_CODE( KEYCODE_D )
436    PORT_BIT( 0x45, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME( "E - Black Mace" ) PORT_CODE( KEYCODE_E )
437    PORT_BIT( 0x46, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME( "F - Hunting Horn" ) PORT_CODE( KEYCODE_F )
438    PORT_BIT( 0x47, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME( "G - Long Bow" ) PORT_CODE( KEYCODE_G )
439    PORT_BIT( 0x48, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME( "H - Medallion" ) PORT_CODE( KEYCODE_H )
440    PORT_BIT( 0x49, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME( "I - Crown" ) PORT_CODE( KEYCODE_I )
441    PORT_BIT( 0x4a, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME( "J - Onyx Seal" ) PORT_CODE( KEYCODE_J )
442    PORT_BIT( 0x4b, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME( "K - Orb of Quoid" ) PORT_CODE( KEYCODE_K )
443    PORT_BIT( 0x4c, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME( "L" ) PORT_CODE( KEYCODE_L )
444    PORT_BIT( 0x4d, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME( "M - Spell of Understanding" ) PORT_CODE( KEYCODE_M )
445    PORT_BIT( 0x4e, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME( "N - Staff" ) PORT_CODE( KEYCODE_N )
446    PORT_BIT( 0x4f, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME( "O - Crystal" ) PORT_CODE( KEYCODE_O )
447    PORT_BIT( 0x50, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME( "P" ) PORT_CODE( KEYCODE_P )
448    PORT_BIT( 0x51, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME( "Q" ) PORT_CODE( KEYCODE_Q )
449    PORT_BIT( 0x52, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME( "R - Blood Sword" ) PORT_CODE( KEYCODE_R )
450    PORT_BIT( 0x53, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME( "S - Dagger" ) PORT_CODE( KEYCODE_S )
451    PORT_BIT( 0x54, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME( "T - Chalice" ) PORT_CODE( KEYCODE_T )
452    PORT_BIT( 0x55, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME( "U - Cold Fire" ) PORT_CODE( KEYCODE_U )
453    PORT_BIT( 0x56, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME( "V - Shield" ) PORT_CODE( KEYCODE_V )
454    PORT_BIT( 0x57, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME( "W - Amulet" ) PORT_CODE( KEYCODE_W )
455    PORT_BIT( 0x58, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME( "X - Scepter" ) PORT_CODE( KEYCODE_X )
456    PORT_BIT( 0x59, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME( "Y - Coins" ) PORT_CODE( KEYCODE_Y )
457    PORT_BIT( 0x5a, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME( "Z - Spell of Release" ) PORT_CODE( KEYCODE_Z )
458
459    PORT_START_TAG("THAYERS_NUMBERS")
460    PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME( "1 - Clear" ) PORT_CODE( KEYCODE_LCONTROL )
461    PORT_BIT( 0x81, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME( "2" ) PORT_CODE( KEYCODE_RCONTROL )
462    PORT_BIT( 0x82, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME( "3 - Enter" ) PORT_CODE( KEYCODE_ENTER )
463    PORT_BIT( 0x83, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME( "4 - Space" ) PORT_CODE( KEYCODE_SPACE )
464*/
465674   PORT_START_TAG("R0")
466   PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_OTHER )
467   PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_OTHER )
468   PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_OTHER )
469   PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_OTHER )
675   PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME( "2" ) PORT_CODE( KEYCODE_F2 )
676   PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME( "1 - Clear" ) PORT_CODE( KEYCODE_BACKSPACE )
677   PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME( "Q" ) PORT_CODE( KEYCODE_Q )
678   PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME( DEF_STR( Yes ) ) PORT_CODE( KEYCODE_0_PAD )
470679
471680   PORT_START_TAG("R1")
472   PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_OTHER )
473   PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_OTHER )
474   PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_OTHER )
475   PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_OTHER )
681   PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME( "Z - Spell of Release" ) PORT_CODE( KEYCODE_Z )
682   PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME( "A" ) PORT_CODE( KEYCODE_A )
683   PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME( "W - Amulet" ) PORT_CODE( KEYCODE_W )
684   PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME( "Items" ) PORT_CODE( KEYCODE_1_PAD )
476685
477686   PORT_START_TAG("R2")
478   PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_OTHER )
479   PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_OTHER )
480   PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_OTHER )
481   PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_OTHER )
687   PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME( "X - Scepter" ) PORT_CODE( KEYCODE_X )
688   PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME( "S - Dagger" ) PORT_CODE( KEYCODE_S )
689   PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME( "E - Black Mace" ) PORT_CODE( KEYCODE_E )
690   PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME( "Drop Item" ) PORT_CODE( KEYCODE_2_PAD )
482691
483692   PORT_START_TAG("R3")
484   PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_OTHER )
485   PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_OTHER )
486   PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_OTHER )
487   PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_OTHER )
693   PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME( "C - Spell of Seeing" ) PORT_CODE( KEYCODE_C )
694   PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME( "D - Great Circlet" ) PORT_CODE( KEYCODE_D )
695   PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME( "R - Blood Sword" ) PORT_CODE( KEYCODE_R )
696   PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME( "Give Score" ) PORT_CODE( KEYCODE_3_PAD )
488697
489698   PORT_START_TAG("R4")
490   PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_OTHER )
491   PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_OTHER )
492   PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_OTHER )
493   PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_OTHER )
699   PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME( "V - Shield" ) PORT_CODE( KEYCODE_V )
700   PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME( "F - Hunting Horn" ) PORT_CODE( KEYCODE_F )
701   PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME( "T - Chalice" ) PORT_CODE( KEYCODE_T )
702   PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME( "Replay" ) PORT_CODE( KEYCODE_4_PAD )
494703
495704   PORT_START_TAG("R5")
496   PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_OTHER )
497   PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_OTHER )
498   PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_OTHER )
499   PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_OTHER )
705   PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME( "B - Silver Wheat" ) PORT_CODE( KEYCODE_B )
706   PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME( "G - Long Bow" ) PORT_CODE( KEYCODE_G )
707   PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME( "Y - Coins" ) PORT_CODE( KEYCODE_Y )
708   PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME( "Combine Action" ) PORT_CODE( KEYCODE_6_PAD )
500709
501710   PORT_START_TAG("R6")
502   PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_OTHER )
503   PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_OTHER )
504   PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_OTHER )
505   PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_OTHER )
711   PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME( "N - Staff" ) PORT_CODE( KEYCODE_N )
712   PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME( "H - Medallion" ) PORT_CODE( KEYCODE_H )
713   PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME( "U - Cold Fire" ) PORT_CODE( KEYCODE_U )
714   PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME( "Save Game" ) PORT_CODE( KEYCODE_7_PAD )
506715
507716   PORT_START_TAG("R7")
508   PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_OTHER )
509   PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_OTHER )
510   PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_OTHER )
511   PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_OTHER )
717   PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME( "M - Spell of Understanding" ) PORT_CODE( KEYCODE_M )
718   PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME( "J - Onyx Seal" ) PORT_CODE( KEYCODE_J )
719   PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME( "I - Crown" ) PORT_CODE( KEYCODE_I )
720   PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME( "Update" ) PORT_CODE( KEYCODE_8_PAD )
512721
513722   PORT_START_TAG("R8")
514   PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_OTHER )
515   PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_OTHER )
516   PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_OTHER )
517   PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_OTHER )
723   PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME( "3 - Enter" ) PORT_CODE( KEYCODE_ENTER )
724   PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME( "K - Orb of Quoid" ) PORT_CODE( KEYCODE_K )
725   PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME( "O - Crystal" ) PORT_CODE( KEYCODE_O )
726   PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME( "Hint" ) PORT_CODE( KEYCODE_9_PAD )
518727
519728   PORT_START_TAG("R9")
520   PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_OTHER )
521   PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_OTHER )
522   PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_OTHER )
523   PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_OTHER )
729   PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME( "4 - Space" ) PORT_CODE( KEYCODE_SPACE )
730   PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME( "L" ) PORT_CODE( KEYCODE_L )
731   PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME( "P" ) PORT_CODE( KEYCODE_P )
732   PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME( DEF_STR( No ) ) PORT_CODE( KEYCODE_0_PAD )
524733INPUT_PORTS_END
525734
735/* Machine Initialization */
736
526737static MACHINE_START( thayers )
527738{
528   discinfo = laserdisc_init(LASERDISC_TYPE_LDV1000, get_disk_handle(0), 0);
739   laserdisc_type = LASERDISC_TYPE_LDV1000;
740
741   discinfo = laserdisc_init(laserdisc_type, get_disk_handle(0), 0);
742
743   memset(&ssi263, 0, sizeof(ssi263));
529744}
530745
746static MACHINE_RESET( thayers )
747{
748   laserdisc_type = (input_port_read(machine, "DSWB") & 0x18) ? LASERDISC_TYPE_LDV1000 : LASERDISC_TYPE_PR7820;
749
750   laserdisc_reset(discinfo, laserdisc_type);
751}
752
531753static INTERRUPT_GEN( vblank_callback_thayers )
532754{
533755   laserdisc_vsync(discinfo);
534756}
535757
758/* COP400 Interface */
759
536760static COP400_INTERFACE( thayers_cop_intf )
537761{
538762   COP400_CKI_DIVISOR_16, // ???
r2844r2845
540764   COP400_MICROBUS_DISABLED
541765};
542766
543/* DRIVER */
767/* Machine Driver */
768
544769static MACHINE_DRIVER_START( thayers )
545/*  main cpu */
546   MDRV_CPU_ADD(Z80, SCHEMATIC_CLOCK)
547   MDRV_CPU_PROGRAM_MAP(mainmem,0)
548   MDRV_CPU_IO_MAP(mainio,0)
770   /* basic machine hardware */
771   MDRV_CPU_ADD(Z80, XTAL_4MHz)
772   MDRV_CPU_PROGRAM_MAP(thayers_map, 0)
773   MDRV_CPU_IO_MAP(thayers_io_map, 0)
549774   MDRV_CPU_VBLANK_INT("main", vblank_callback_thayers)
550775
551776   MDRV_MACHINE_START(thayers)
777   MDRV_MACHINE_RESET(thayers)
552778
553/*  io device cpu */
554   MDRV_CPU_ADD(COP420, SCHEMATIC_CLOCK/2/8)      /* Can't read the schematics, but this is what daphne says */
555   MDRV_CPU_PROGRAM_MAP(copmem,0)
556   MDRV_CPU_IO_MAP(copio,0)
779   MDRV_CPU_ADD(COP421, XTAL_4MHz/2) // COP421L-PCA/N
780   MDRV_CPU_PROGRAM_MAP(thayers_cop_map, 0)
781   MDRV_CPU_IO_MAP(thayers_cop_io_map, 0)
557782   MDRV_CPU_CONFIG(thayers_cop_intf)
558783
559/*  video */
560
784   /* video hardware */
561785   MDRV_SCREEN_ADD("main", RASTER)
562786   MDRV_SCREEN_FORMAT(BITMAP_FORMAT_RGB32)
563787   MDRV_SCREEN_REFRESH_RATE(60)
564   MDRV_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(0))
788   MDRV_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(2500)) // inaccurate
565789   MDRV_SCREEN_SIZE(32*10, 32*8)
566790   MDRV_SCREEN_VISIBLE_AREA(0*10, 32*10-1, 0*8, 32*8-1)
567791
568792   MDRV_PALETTE_LENGTH(256)
569793   MDRV_VIDEO_UPDATE(thayers)
570794
571/*  sound */
795   /* sound hardware */
796   // SSI 263 @ 2MHz
572797MACHINE_DRIVER_END
573798
799/* ROMs */
574800
575801ROM_START( thayers )
576802   ROM_REGION( 0xe000, REGION_CPU1, 0 )
r2844r2845
579805
580806   ROM_REGION( 0x400, REGION_CPU2, 0 )
581807   ROM_LOAD( "tq_cop.bin", 0x000, 0x400, CRC(6748e6b3) SHA1(5d7d1ecb57c1501ef6a2d9691eecc9970586606b) )
808
809   DISK_REGION( REGION_DISKS )
810   DISK_IMAGE_READONLY( "thayers", 0, NO_DUMP )
582811ROM_END
583812
584813ROM_START( thayersa )
r2844r2845
588817
589818   ROM_REGION( 0x400, REGION_CPU2, 0 )
590819   ROM_LOAD( "tq_cop.bin", 0x000, 0x400, CRC(6748e6b3) SHA1(5d7d1ecb57c1501ef6a2d9691eecc9970586606b) )
820
821   DISK_REGION( REGION_DISKS )
822   DISK_IMAGE_READONLY( "thayers", 0, NO_DUMP )
591823ROM_END
592824
593static DRIVER_INIT( thayers )
594{
595   Z80_IRQ_STATUS_CLEAR();
596   m_ssi_control = 0;
825/* Game Drivers */
597826
598   cop_g_latch = 0xff;
599}
600
601/*    YEAR  NAME      PARENT   MACHINE  INPUT    INIT     MONITOR  COMPANY               FULLNAME                           FLAGS) */
602GAME( 1983, thayers,  0,       thayers, thayers, thayers, ROT0,    "RDI Video Systems",  "Thayer's Quest",                  GAME_NOT_WORKING|GAME_NO_SOUND)
603GAME( 1983, thayersa, thayers, thayers, thayers, thayers, ROT0,    "RDI Video Systems",  "Thayer's Quest (Alternate Set)",  GAME_NOT_WORKING|GAME_NO_SOUND)
827/*     YEAR  NAME      PARENT   MACHINE  INPUT    INIT  MONITOR  COMPANY               FULLNAME                           FLAGS                             LAYOUT */
828GAMEL( 1984, thayers,  0,       thayers, thayers, 0,   ROT0,    "RDI Video Systems",  "Thayer's Quest",                  GAME_NOT_WORKING | GAME_NO_SOUND, layout_dlair)
829GAMEL( 1984, thayersa, thayers, thayers, thayers, 0,   ROT0,    "RDI Video Systems",  "Thayer's Quest (Alternate Set)",  GAME_NOT_WORKING | GAME_NO_SOUND, layout_dlair)
src/mame/drivers/dassault.c
r2844r2845
137137   switch (offset<<1)
138138   {
139139      case 0: /* Player 1 & Player 2 joysticks & fire buttons */
140         return (input_port_read_indexed(machine, 0) + (input_port_read_indexed(machine, 1) << 8));
140         return (input_port_read(machine, "P1") + (input_port_read(machine, "P2") << 8));
141141
142142      case 2: /* Player 3 & Player 4 joysticks & fire buttons */
143         return (input_port_read_indexed(machine, 6) + (input_port_read_indexed(machine, 7) << 8));
143         return (input_port_read(machine, "P3") + (input_port_read(machine, "P4") << 8));
144144
145145      case 4: /* Dip 1 (stored at 0x3f8035) */
146         return input_port_read_indexed(machine, 3);
146         return input_port_read(machine, "DSW1");
147147
148148      case 6: /* Dip 2 (stored at 0x3f8034) */
149         return input_port_read_indexed(machine, 4);
149         return input_port_read(machine, "DSW2");
150150
151151      case 8: /* VBL, Credits */
152         return input_port_read_indexed(machine, 2);
152         return input_port_read(machine, "IN0");
153153   }
154154
155155   return 0xffff;
r2844r2845
164164
165165static READ16_HANDLER( dassault_sub_control_r )
166166{
167   return input_port_read_indexed(machine, 5);
167   return input_port_read(machine, "VBLANK1");
168168}
169169
170170static WRITE16_HANDLER( dassault_sound_w )
r2844r2845
300300
301301
302302static INPUT_PORTS_START( thndzone )
303   PORT_START
303   PORT_START_TAG("P1")
304304   DASSAULT_PLAYER_INPUT( 1, IPT_START1 )
305305
306   PORT_START
306   PORT_START_TAG("P2")
307307   DASSAULT_PLAYER_INPUT( 2, IPT_START2 )
308308
309   PORT_START
309   PORT_START_TAG("IN0")
310310   PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 )
311311   PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_COIN2 )
312312   PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_SERVICE1 )         // Adds 4 credits/coins !
r2844r2845
316316   PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNUSED )
317317   PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNUSED )
318318
319   PORT_START   /* Dip switch bank 1 */
319   PORT_START_TAG("DSW1")   /* Dip switch bank 1 */
320320   PORT_DIPNAME( 0x07, 0x07, DEF_STR( Coin_A ) )
321321   PORT_DIPSETTING(    0x00, DEF_STR( 3C_1C ) )
322322   PORT_DIPSETTING(    0x01, DEF_STR( 2C_1C ) )
r2844r2845
342342   PORT_DIPSETTING(    0x80, DEF_STR( Off ) )
343343   PORT_DIPSETTING(    0x00, DEF_STR( On ) )
344344
345   PORT_START   /* Dip switch bank 2 */
345   PORT_START_TAG("DSW2")   /* Dip switch bank 2 */
346346   PORT_DIPUNUSED( 0x01, IP_ACTIVE_LOW )
347347   PORT_DIPUNUSED( 0x02, IP_ACTIVE_LOW )
348348   PORT_DIPNAME( 0x0c, 0x0c, DEF_STR( Difficulty ) )
r2844r2845
359359   PORT_DIPSETTING(    0x80, DEF_STR( Off ) )
360360   PORT_DIPSETTING(    0x00, DEF_STR( On ) )
361361
362   PORT_START /* Cpu 1 vblank */
362   PORT_START_TAG("VBLANK1") /* Cpu 1 vblank */
363363   PORT_BIT( 0xff, IP_ACTIVE_HIGH, IPT_VBLANK )
364364
365   PORT_START
365   PORT_START_TAG("P3")
366366   DASSAULT_PLAYER_INPUT( 3, IPT_COIN3 )
367367
368   PORT_START
368   PORT_START_TAG("P4")
369369   DASSAULT_PLAYER_INPUT( 4, IPT_COIN4 )
370370INPUT_PORTS_END
371371
372372static INPUT_PORTS_START( dassault )
373   PORT_START
373   PORT_START_TAG("P1")
374374   DASSAULT_PLAYER_INPUT( 1, IPT_START1 )
375375
376   PORT_START
376   PORT_START_TAG("P2")
377377   DASSAULT_PLAYER_INPUT( 2, IPT_START2 )
378378
379   PORT_START
379   PORT_START_TAG("IN0")
380380   PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 )
381381   PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_COIN2 )
382382   PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_SERVICE1 )
383383   PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_VBLANK )
384384
385   PORT_START   /* Dip switch bank 1 */
385   PORT_START_TAG("DSW1")   /* Dip switch bank 1 */
386386   PORT_DIPNAME( 0x07, 0x07, DEF_STR( Coin_A ) )
387387   PORT_DIPSETTING(    0x00, DEF_STR( 3C_1C ) )
388388   PORT_DIPSETTING(    0x01, DEF_STR( 2C_1C ) )
r2844r2845
408408   PORT_DIPSETTING(    0x80, DEF_STR( Off ) )
409409   PORT_DIPSETTING(    0x00, DEF_STR( On ) )
410410
411   PORT_START   /* Dip switch bank 2 */
411   PORT_START_TAG("DSW2")   /* Dip switch bank 2 */
412412   PORT_DIPUNUSED( 0x01, IP_ACTIVE_LOW )
413413   PORT_DIPUNUSED( 0x02, IP_ACTIVE_LOW )
414414   PORT_DIPNAME( 0x0c, 0x0c, DEF_STR( Difficulty ) )
r2844r2845
426426   PORT_DIPSETTING(    0x80, DEF_STR( Off ) )
427427   PORT_DIPSETTING(    0x00, DEF_STR( On ) )
428428
429   PORT_START /* Cpu 1 vblank */
429   PORT_START_TAG("VBLANK1") /* Cpu 1 vblank */
430430   PORT_BIT( 0xff, IP_ACTIVE_HIGH, IPT_VBLANK )
431431
432   PORT_START
432   PORT_START_TAG("P3")
433433   DASSAULT_PLAYER_INPUT( 3, IPT_COIN3 )
434434
435   PORT_START
435   PORT_START_TAG("P4")
436436   DASSAULT_PLAYER_INPUT( 4, IPT_COIN4 )
437437INPUT_PORTS_END
438438
439439static INPUT_PORTS_START( dassaul4 )
440   PORT_START
440   PORT_START_TAG("P1")
441441   DASSAULT_PLAYER_INPUT( 1, IPT_UNUSED )
442442
443   PORT_START
443   PORT_START_TAG("P2")
444444   DASSAULT_PLAYER_INPUT( 2, IPT_UNUSED )
445445
446   PORT_START
446   PORT_START_TAG("IN0")
447447   PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 )
448448   PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_COIN2 )
449449   PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_SERVICE1 )
450450   PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_VBLANK )
451451
452   PORT_START   /* Dip switch bank 1 */
452   PORT_START_TAG("DSW1")   /* Dip switch bank 1 */
453453   PORT_DIPNAME( 0x07, 0x07, DEF_STR( Coinage ) )
454454   PORT_DIPSETTING(    0x00, DEF_STR( 3C_1C ) )
455455   PORT_DIPSETTING(    0x01, DEF_STR( 2C_1C ) )
r2844r2845
469469   PORT_DIPSETTING(    0x80, DEF_STR( Off ) )
470470   PORT_DIPSETTING(    0x00, DEF_STR( On ) )
471471
472   PORT_START   /* Dip switch bank 2 */
472   PORT_START_TAG("DSW2")   /* Dip switch bank 2 */
473473   PORT_DIPUNUSED( 0x01, IP_ACTIVE_LOW )
474474   PORT_DIPUNUSED( 0x02, IP_ACTIVE_LOW )
475475   PORT_DIPNAME( 0x0c, 0x0c, DEF_STR( Difficulty ) )
r2844r2845
484484   PORT_DIPSETTING(    0x80, DEF_STR( Off ) )
485485   PORT_DIPSETTING(    0x00, DEF_STR( On ) )
486486
487   PORT_START /* Cpu 1 vblank */
487   PORT_START_TAG("VBLANK1") /* Cpu 1 vblank */
488488   PORT_BIT( 0xff, IP_ACTIVE_HIGH, IPT_VBLANK )
489489
490   PORT_START
490   PORT_START_TAG("P3")
491491   DASSAULT_PLAYER_INPUT( 3, IPT_COIN3 )
492492
493   PORT_START
493   PORT_START_TAG("P4")
494494   DASSAULT_PLAYER_INPUT( 4, IPT_COIN4 )
495495INPUT_PORTS_END
496496
src/mame/drivers/dambustr.c
r2844r2845
1111#include "driver.h"
1212
1313#include "cpu/z80/z80.h"
14#include "includes/galaxian.h"
1415#include "galaxold.h"
1516
1617
17PALETTE_INIT( dambustr );
18WRITE8_HANDLER( dambustr_bg_split_line_w );
19WRITE8_HANDLER( dambustr_bg_color_w );
20VIDEO_START( dambustr );
21VIDEO_UPDATE( dambustr );
22
2318static int noise_data = 0;
2419
2520
src/mame/drivers/blstroid.c
r2844r2845
7272
7373static READ16_HANDLER( inputs_r )
7474{
75   int temp = input_port_read_indexed(machine, 2 + (offset & 1));
75   static const char *iptnames[] = { "IN0", "IN1" };
76   int temp = input_port_read(machine, iptnames[offset & 1]);
77
7678   if (atarigen_cpu_to_sound_ready) temp ^= 0x0040;
7779   if (atarigen_get_hblank(machine->primary_screen)) temp ^= 0x0010;
7880   return temp;
r2844r2845
118120 *************************************/
119121
120122static INPUT_PORTS_START( blstroid )
121   PORT_START      /* ff9800 */
123   PORT_START_TAG("DIAL0")      /* ff9800 */
122124   PORT_BIT( 0x00ff, 0, IPT_DIAL ) PORT_SENSITIVITY(60) PORT_KEYDELTA(10) PORT_PLAYER(1)
123125   PORT_BIT( 0xff00, IP_ACTIVE_LOW, IPT_UNUSED )
124126
125   PORT_START      /* ff9804 */
127   PORT_START_TAG("DIAL1")      /* ff9804 */
126128   PORT_BIT( 0x00ff, 0, IPT_DIAL ) PORT_SENSITIVITY(60) PORT_KEYDELTA(10) PORT_PLAYER(2)
127129   PORT_BIT( 0xff00, IP_ACTIVE_LOW, IPT_UNUSED )
128130
129   PORT_START      /* ff9c00 */
131   PORT_START_TAG("IN0")      /* ff9c00 */
130132   PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(1)
131133   PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(1)
132134   PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_PLAYER(1)
r2844r2845
137139   PORT_SERVICE( 0x0080, IP_ACTIVE_LOW )
138140   PORT_BIT( 0xff00, IP_ACTIVE_LOW, IPT_UNUSED )
139141
140   PORT_START      /* ff9c02 */
142   PORT_START_TAG("IN1")      /* ff9c02 */
141143   PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(2)
142144   PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(2)
143145   PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_PLAYER(2)
src/mame/drivers/blmbycar.c
r2844r2845
7676static WRITE16_HANDLER( blmbycar_pot_wheel_reset_w )
7777{
7878   if (ACCESSING_BITS_0_7)
79      pot_wheel = ~input_port_read_indexed(machine, 2) & 0xff;
79      pot_wheel = ~input_port_read(machine, "IN1") & 0xff;
8080}
8181
8282static WRITE16_HANDLER( blmbycar_pot_wheel_shift_w )
r2844r2845
101101
102102static READ16_HANDLER( blmbycar_opt_wheel_r )
103103{
104   return   (~input_port_read_indexed(machine, 2) & 0xff) << 8;
104   return   (~input_port_read(machine, "IN1") & 0xff) << 8;
105105}
106106
107107
r2844r2845
211211
212212static INPUT_PORTS_START( blmbycar )
213213
214   PORT_START   // IN0 - $700000.w
214   PORT_START_TAG("DSW")   // IN0 - $700000.w
215215   PORT_DIPNAME( 0x0003, 0x0003, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SW1:8,7")
216216   PORT_DIPSETTING(      0x0002, DEF_STR( Easy )    )
217217   PORT_DIPSETTING(      0x0003, DEF_STR( Normal )  )
r2844r2845
258258   PORT_DIPSETTING(      0x8000, DEF_STR( Off ) )
259259   PORT_DIPSETTING(      0x0000, DEF_STR( On ) )
260260
261   PORT_START   // IN1 - $700002.w
261   PORT_START_TAG("IN0")   // IN1 - $700002.w
262262   PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_PLAYER(1)
263263   PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN    ) PORT_PLAYER(1)
264264   PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_PLAYER(1)
r2844r2845
277277   PORT_BIT( 0x4000, IP_ACTIVE_LOW, IPT_START1  )
278278   PORT_BIT( 0x8000, IP_ACTIVE_LOW, IPT_START2  )
279279
280   PORT_START   // IN2 - $700004.w
280   PORT_START_TAG("IN1")   // IN2 - $700004.w
281281   PORT_BIT ( 0x00ff, 0x0080, IPT_AD_STICK_X ) PORT_SENSITIVITY(30) PORT_KEYDELTA(1)
282282
283   PORT_START   // IN3 - $700006.w
283   PORT_START_TAG("IN2")   // IN3 - $700006.w
284284   PORT_BIT( 0xffff, IP_ACTIVE_LOW, IPT_UNKNOWN )
285285
286286INPUT_PORTS_END
287287
288288
289289static INPUT_PORTS_START( watrball )
290   PORT_START   /* dips */
290   PORT_START_TAG("DSW")   /* dips */
291291   PORT_DIPNAME( 0x0003, 0x0003, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SW1:8,7") /* Affects timer */
292292   PORT_DIPSETTING(      0x0002, DEF_STR( Easy )    )    /* 180 Seconds */
293293   PORT_DIPSETTING(      0x0003, DEF_STR( Normal )  )    /* 150 Seconds */
r2844r2845
325325   PORT_DIPUNUSED_DIPLOC( 0x4000, 0x4000, "SW2:2" )
326326   PORT_DIPUNUSED_DIPLOC( 0x8000, 0x8000, "SW2:1" )
327327
328   PORT_START   /* 16bit */
328   PORT_START_TAG("IN0")   /* 16bit */
329329   PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_PLAYER(1)
330330   PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN    ) PORT_PLAYER(1)
331331   PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_PLAYER(1)
src/mame/drivers/retofinv.c
r2844r2845
3232#include "deprecat.h"
3333#include "cpu/m6805/m6805.h"
3434#include "sound/sn76496.h"
35#include "includes/retofinv.h"
3536
36/* in machine */
37READ8_HANDLER( retofinv_68705_portA_r );
38WRITE8_HANDLER( retofinv_68705_portA_w );
39WRITE8_HANDLER( retofinv_68705_ddrA_w );
40READ8_HANDLER( retofinv_68705_portB_r );
41WRITE8_HANDLER( retofinv_68705_portB_w );
42WRITE8_HANDLER( retofinv_68705_ddrB_w );
43READ8_HANDLER( retofinv_68705_portC_r );
44WRITE8_HANDLER( retofinv_68705_portC_w );
45WRITE8_HANDLER( retofinv_68705_ddrC_w );
46WRITE8_HANDLER( retofinv_mcu_w );
47READ8_HANDLER( retofinv_mcu_r );
48READ8_HANDLER( retofinv_mcu_status_r );
49
50/* in video */
51VIDEO_START( retofinv );
52PALETTE_INIT( retofinv );
53VIDEO_UPDATE( retofinv );
54READ8_HANDLER( retofinv_bg_videoram_r );
55READ8_HANDLER( retofinv_fg_videoram_r );
56WRITE8_HANDLER( retofinv_bg_videoram_w );
57WRITE8_HANDLER( retofinv_fg_videoram_w );
58WRITE8_HANDLER( retofinv_gfx_ctrl_w );
59
60extern UINT8 *retofinv_fg_videoram;
61extern UINT8 *retofinv_bg_videoram;
62extern UINT8 *retofinv_sharedram;
63
6437static UINT8 cpu2_m6000=0;
6538
6639
src/mame/drivers/megaplay.c
r2844r2845
603603UINT8 segae_vdp_ctrl_r ( UINT8 chip );
604604UINT8 segae_vdp_data_r ( UINT8 chip );
605605void segae_vdp_ctrl_w ( UINT8 chip, UINT8 data );
606void segae_vdp_data_w ( UINT8 chip, UINT8 data );
606void segae_vdp_data_w ( running_machine *machine, UINT8 chip, UINT8 data );
607607
608608static READ8_HANDLER (megaplay_bios_port_be_bf_r)
609609{
r2844r2845
624624   switch (offset)
625625   {
626626      case 0: /* port 0xbe, VDP 1 DATA Write */
627         segae_vdp_data_w(0, data); break;
627         segae_vdp_data_w(machine, 0, data); break;
628628      case 1: /* port 0xbf, VDP 1 CTRL Write */
629629         segae_vdp_ctrl_w(0, data); break;
630630   }
r2844r2845
649649VIDEO_START( megaplay_normal );
650650VIDEO_UPDATE( megaplay_normal );
651651
652/* give us access to the megadriv start and update functions so that we can call them */
653VIDEO_START( megadriv );
654VIDEO_UPDATE( megadriv );
655
656652static VIDEO_START(megplay)
657653{
658654   //printf("megplay vs\n");
src/mame/drivers/igs_180.c
r2844r2845
7373
7474
7575static UINT8 *sprites_gfx;
76int sprites_gfx_size;
76static int sprites_gfx_size;
7777
7878// Eeach 16 bit word in the sprites gfx roms contains three 5 bit pens: x-22222-11111-00000.
7979// This routine expands each word into three bytes.
src/mame/drivers/konamigv.c
r2844r2845
319319
320320static MACHINE_RESET( konamigv )
321321{
322   psx_machine_init();
322   psx_machine_init(machine);
323323
324324   /* also hook up CDDA audio to the CD-ROM drive */
325325   cdda_set_cdrom(0, am53cf96_get_device(SCSI_ID_4));
src/mame/drivers/crgolf.c
r2844r2845
8080
8181static READ8_HANDLER( switch_input_r )
8282{
83   return input_port_read_indexed(machine, port_select);
83   static const char *portnames[] = { "IN0", "IN1", "P1", "P2", "DSW", "UNUSED0", "UNUSED1" };
84
85   return input_port_read(machine, portnames[port_select]);
8486}
8587
8688
8789static READ8_HANDLER( analog_input_r )
8890{
89   return ((input_port_read_indexed(machine, 7) >> 4) | (input_port_read_indexed(machine, 8) & 0xf0)) ^ 0x88;
91   return ((input_port_read(machine, "STICK0") >> 4) | (input_port_read(machine, "STICK1") & 0xf0)) ^ 0x88;
9092}
9193
9294
r2844r2845
269271 *************************************/
270272
271273static INPUT_PORTS_START( crgolf )
272   PORT_START   /* CREDIT */
274   PORT_START_TAG("IN0")   /* CREDIT */
273275   PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_COIN1 )
274276   PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_SERVICE1 )
275277   PORT_BIT( 0xfc, IP_ACTIVE_HIGH, IPT_UNUSED )
276278
277   PORT_START   /* SELECT */
279   PORT_START_TAG("IN1")   /* SELECT */
278280   PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_UNUSED )
279281   PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_START1 )
280282   PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_START2 )
r2844r2845
282284   PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_START4 )
283285   PORT_BIT( 0xe0, IP_ACTIVE_HIGH, IPT_UNUSED )
284286
285   PORT_START   /* PLAY1 */
287   PORT_START_TAG("P1")   /* PLAY1 */
286288   PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_BUTTON6 ) PORT_PLAYER(1)         /* club select */
287289   PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_BUTTON2 ) PORT_PLAYER(1)         /* backward address */
288290   PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_BUTTON3 ) PORT_PLAYER(1)         /* forward address */
r2844r2845
292294   PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_JOYSTICK_RIGHT ) PORT_PLAYER(1)   /* direction right */
293295   PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_BUTTON1 ) PORT_PLAYER(1)         /* shot switch */
294296
295   PORT_START   /* PLAY2 */
297   PORT_START_TAG("P2")   /* PLAY2 */
296298   PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_BUTTON6 ) PORT_COCKTAIL      /* club select */
297299   PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_BUTTON2 ) PORT_COCKTAIL      /* backward address */
298300   PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_BUTTON3 ) PORT_COCKTAIL      /* forward address */
r2844r2845
302304   PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_JOYSTICK_RIGHT ) PORT_COCKTAIL   /* direction right */
303305   PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_BUTTON1 ) PORT_COCKTAIL      /* shot switch */
304306
305   PORT_START   /* DIPSW */
307   PORT_START_TAG("DSW")   /* DIPSW */
306308   PORT_DIPNAME( 0x01, 0x00, DEF_STR( Difficulty ))
307309   PORT_DIPSETTING(    0x00, DEF_STR( Easy ) )
308310   PORT_DIPSETTING(    0x01, DEF_STR( Hard ) )
r2844r2845
323325   PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_UNUSED )
324326   PORT_SERVICE( 0x80, IP_ACTIVE_HIGH )
325327
326   PORT_START
328   PORT_START_TAG("UNUSED0")
327329   PORT_BIT( 0xff, IP_ACTIVE_HIGH, IPT_UNUSED )
328330
329   PORT_START
331   PORT_START_TAG("UNUSED1")
330332   PORT_BIT( 0xff, IP_ACTIVE_HIGH, IPT_UNUSED )
331333
332   PORT_START
334   PORT_START_TAG("STICK0")
333335   PORT_BIT( 0xff, 0x80, IPT_AD_STICK_Y ) PORT_SENSITIVITY(70) PORT_KEYDELTA(16) PORT_REVERSE
334336
335   PORT_START
337   PORT_START_TAG("STICK1")
336338   PORT_BIT( 0xff, 0x80, IPT_AD_STICK_Y ) PORT_SENSITIVITY(70) PORT_KEYDELTA(16) PORT_REVERSE PORT_COCKTAIL
337339INPUT_PORTS_END
338340
src/mame/drivers/zr107.c
r2844r2845
300300
301301/******************************************************************/
302302
303static UINT32 *workram;
304static MACHINE_START( zr107 )
305{
306   /* set conservative DRC options */
307   cpunum_set_info_int(0, CPUINFO_INT_PPC_DRC_OPTIONS, PPCDRC_COMPATIBLE_OPTIONS);
308
309   /* configure fast RAM regions for DRC */
310   cpunum_set_info_int(0, CPUINFO_INT_PPC_FASTRAM_SELECT, 0);
311   cpunum_set_info_int(0, CPUINFO_INT_PPC_FASTRAM_START, 0x00000000);
312   cpunum_set_info_int(0, CPUINFO_INT_PPC_FASTRAM_END, 0x000fffff);
313   cpunum_set_info_ptr(0, CPUINFO_PTR_PPC_FASTRAM_BASE, workram);
314   cpunum_set_info_int(0, CPUINFO_INT_PPC_FASTRAM_READONLY, 0);
315}
316
303317static ADDRESS_MAP_START( zr107_map, ADDRESS_SPACE_PROGRAM, 32 )
304   AM_RANGE(0x00000000, 0x000fffff) AM_MIRROR(0x80000000) AM_RAM      /* Work RAM */
305   AM_RANGE(0x74000000, 0x74003fff) AM_MIRROR(0x80000000) AM_READWRITE(K056832_ram_long_r, K056832_ram_long_w)
306   AM_RANGE(0x74020000, 0x7402003f) AM_MIRROR(0x80000000) AM_READWRITE(K056832_long_r, K056832_long_w)
307   AM_RANGE(0x74060000, 0x7406003f) AM_MIRROR(0x80000000) AM_READWRITE(ccu_r, ccu_w)
308   AM_RANGE(0x74080000, 0x74081fff) AM_MIRROR(0x80000000) AM_RAM_WRITE(paletteram32_w) AM_BASE(&paletteram32)
309   AM_RANGE(0x740a0000, 0x740a3fff) AM_MIRROR(0x80000000) AM_READ(K056832_rom_long_r)
310   AM_RANGE(0x78000000, 0x7800ffff) AM_MIRROR(0x80000000) AM_READWRITE(cgboard_dsp_shared_r_ppc, cgboard_dsp_shared_w_ppc)      /* 21N 21K 23N 23K */
311   AM_RANGE(0x78010000, 0x7801ffff) AM_MIRROR(0x80000000) AM_WRITE(cgboard_dsp_shared_w_ppc)
312   AM_RANGE(0x78040000, 0x7804000f) AM_MIRROR(0x80000000) AM_READWRITE(K001006_0_r, K001006_0_w)
313   AM_RANGE(0x780c0000, 0x780c0007) AM_MIRROR(0x80000000) AM_READWRITE(cgboard_dsp_comm_r_ppc, cgboard_dsp_comm_w_ppc)
314   AM_RANGE(0x7e000000, 0x7e003fff) AM_MIRROR(0x80000000) AM_READWRITE(sysreg_r, sysreg_w)
315   AM_RANGE(0x7e008000, 0x7e009fff) AM_MIRROR(0x80000000) AM_READWRITE8(K056230_r, K056230_w, 0xffffffff)            /* LANC registers */
316   AM_RANGE(0x7e00a000, 0x7e00bfff) AM_MIRROR(0x80000000) AM_READWRITE(lanc_ram_r, lanc_ram_w)      /* LANC Buffer RAM (27E) */
317   AM_RANGE(0x7e00c000, 0x7e00c007) AM_MIRROR(0x80000000) AM_WRITE(K056800_host_w)
318   AM_RANGE(0x7e00c008, 0x7e00c00f) AM_MIRROR(0x80000000) AM_READ(K056800_host_r)
319   AM_RANGE(0x7f800000, 0x7f9fffff) AM_MIRROR(0x80000000) AM_ROM AM_SHARE(2)
320   AM_RANGE(0x7fe00000, 0x7fffffff) AM_MIRROR(0x80000000) AM_ROM AM_REGION(REGION_USER1, 0) AM_SHARE(2)   /* Program ROM */
318   AM_RANGE(0x00000000, 0x000fffff) AM_RAM   AM_BASE(&workram)   /* Work RAM */
319   AM_RANGE(0x74000000, 0x74003fff) AM_READWRITE(K056832_ram_long_r, K056832_ram_long_w)
320   AM_RANGE(0x74020000, 0x7402003f) AM_READWRITE(K056832_long_r, K056832_long_w)
321   AM_RANGE(0x74060000, 0x7406003f) AM_READWRITE(ccu_r, ccu_w)
322   AM_RANGE(0x74080000, 0x74081fff) AM_RAM_WRITE(paletteram32_w) AM_BASE(&paletteram32)
323   AM_RANGE(0x740a0000, 0x740a3fff) AM_READ(K056832_rom_long_r)
324   AM_RANGE(0x78000000, 0x7800ffff) AM_READWRITE(cgboard_dsp_shared_r_ppc, cgboard_dsp_shared_w_ppc)      /* 21N 21K 23N 23K */
325   AM_RANGE(0x78010000, 0x7801ffff) AM_WRITE(cgboard_dsp_shared_w_ppc)
326   AM_RANGE(0x78040000, 0x7804000f) AM_READWRITE(K001006_0_r, K001006_0_w)
327   AM_RANGE(0x780c0000, 0x780c0007) AM_READWRITE(cgboard_dsp_comm_r_ppc, cgboard_dsp_comm_w_ppc)
328   AM_RANGE(0x7e000000, 0x7e003fff) AM_READWRITE(sysreg_r, sysreg_w)
329   AM_RANGE(0x7e008000, 0x7e009fff) AM_READWRITE8(K056230_r, K056230_w, 0xffffffff)            /* LANC registers */
330   AM_RANGE(0x7e00a000, 0x7e00bfff) AM_READWRITE(lanc_ram_r, lanc_ram_w)      /* LANC Buffer RAM (27E) */
331   AM_RANGE(0x7e00c000, 0x7e00c007) AM_WRITE(K056800_host_w)
332   AM_RANGE(0x7e00c008, 0x7e00c00f) AM_READ(K056800_host_r)
333   AM_RANGE(0x7f800000, 0x7f9fffff) AM_ROM AM_SHARE(2)
334   AM_RANGE(0x7fe00000, 0x7fffffff) AM_ROM AM_REGION(REGION_USER1, 0) AM_SHARE(2)   /* Program ROM */
321335ADDRESS_MAP_END
322336
323337
r2844r2845
579593   MDRV_INTERLEAVE(500)
580594
581595   MDRV_NVRAM_HANDLER(93C46)
596   MDRV_MACHINE_START(zr107)
582597   MDRV_MACHINE_RESET(zr107)
583598
584599    /* video hardware */
r2844r2845
623638   MDRV_INTERLEAVE(500)
624639
625640   MDRV_NVRAM_HANDLER(93C46)
641   MDRV_MACHINE_START(zr107)
626642   MDRV_MACHINE_RESET(zr107)
627643
628644    /* video hardware */
src/mame/drivers/amspdwy.c
r2844r2845
4646static READ8_HANDLER( amspdwy_wheel_##_n_##_r ) \
4747{ \
4848   static UINT8 wheel_old, ret; \
49   char port1[4], port2[4]; \
49   static const char *portnames[] = { "WHEEL1", "WHEEL2", "AN1", "AN2" };\
5050   UINT8 wheel; \
51   sprintf(port1, "IN%d", 5 + _n_); \
52   wheel = input_port_read(machine, port1); \
51   wheel = input_port_read(machine, portnames[2 + _n_]); \
5352   if (wheel != wheel_old) \
5453   { \
5554      wheel = (wheel & 0x7fff) - (wheel & 0x8000); \
r2844r2845
5756      else               ret = ((-wheel) & 0xf) | 0x10; \
5857      wheel_old = wheel; \
5958   } \
60   sprintf(port2, "IN%d", 2 + _n_); \
61   return ret | input_port_read(machine, port2); \
59   return ret | input_port_read(machine, portnames[_n_]); \
6260}
6361AMSPDWY_WHEEL_R( 0 )
6462AMSPDWY_WHEEL_R( 1 )
r2844r2845
6664
6765static READ8_HANDLER( amspdwy_sound_r )
6866{
69   return (YM2151_status_port_0_r(machine,0) & ~ 0x30) | input_port_read(machine, "IN4");
67   return (YM2151_status_port_0_r(machine,0) & ~ 0x30) | input_port_read(machine, "IN0");
7068}
7169
7270static WRITE8_HANDLER( amspdwy_sound_w )
r2844r2845
173171   PORT_DIPUNUSED_DIPLOC( 0x40, 0x00, "SW2:2" )      /* Listed as "Unused" */
174172   PORT_DIPUNUSED_DIPLOC( 0x80, 0x00, "SW2:1" )      /* Listed as "Unused" */
175173
176   PORT_START_TAG("IN2")   // Player 1 Wheel + Coins
174   PORT_START_TAG("WHEEL1")   // Player 1 Wheel + Coins
177175   PORT_BIT( 0x1f, IP_ACTIVE_HIGH, IPT_SPECIAL )   // wheel
178176   PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_COIN1 ) PORT_IMPULSE(2)   // 2-3f
179177
180   PORT_START_TAG("IN3")   // Player 2 Wheel + Coins
178   PORT_START_TAG("WHEEL2")   // Player 2 Wheel + Coins
181179   PORT_BIT( 0x1f, IP_ACTIVE_HIGH, IPT_SPECIAL )
182180   PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_COIN2 ) PORT_IMPULSE(2)
183181
184   PORT_START_TAG("IN4")   // Player 1&2 Pedals + YM2151 Sound Status
182   PORT_START_TAG("IN0")   // Player 1&2 Pedals + YM2151 Sound Status
185183   PORT_BIT( 0x0f, IP_ACTIVE_HIGH, IPT_SPECIAL )
186184   PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(2)
187185   PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(1)
188186   PORT_BIT( 0xc0, IP_ACTIVE_HIGH, IPT_SPECIAL )
189187
190   PORT_START_TAG("IN5")   // Player 1 Analog Fake Port
188   PORT_START_TAG("AN1")   // Player 1 Analog Fake Port
191189   PORT_BIT( 0xffff, 0x0000, IPT_DIAL ) PORT_SENSITIVITY(15) PORT_KEYDELTA(20) PORT_CODE_DEC(KEYCODE_LEFT) PORT_CODE_INC(KEYCODE_RIGHT) PORT_PLAYER(1)
192190
193   PORT_START_TAG("IN6")   // Player 2 Analog Fake Port
191   PORT_START_TAG("AN2")   // Player 2 Analog Fake Port
194192   PORT_BIT( 0xffff, 0x0000, IPT_DIAL ) PORT_SENSITIVITY(15) PORT_KEYDELTA(20) PORT_CODE_DEC(KEYCODE_D) PORT_CODE_INC(KEYCODE_G) PORT_PLAYER(2)
195193
196194INPUT_PORTS_END
src/mame/drivers/dominob.c
r2844r2845
124124
125125static READ8_HANDLER( dominob_input_2_r )
126126{
127   return input_port_read_indexed(machine, 2);
127   return input_port_read(machine, "IN2");
128128}
129129
130130
src/mame/drivers/ksys573.c
r2844r2845
15191519
15201520static MACHINE_RESET( konami573 )
15211521{
1522   psx_machine_init();
1522   psx_machine_init(machine);
15231523
15241524   if( chiptype[ 0 ] != 0 )
15251525   {
src/mame/drivers/atarig1.c
r2844r2845
9090static WRITE16_HANDLER( mo_control_w )
9191{
9292   if (ACCESSING_BITS_0_7)
93      atarirle_control_w(0, data & 7);
93      atarirle_control_w(machine, 0, data & 7);
9494}
9595
9696
r2844r2845
125125
126126static READ16_HANDLER( a2d_data_r )
127127{
128   char port[5];
128   static const char *adcnames[] = { "ADC0", "ADC1", "ADC2" };
129129
130130   /* Pit Fighter has no A2D, just another input port */
131131   if (atarig1_pitfight)
r2844r2845
133133
134134   /* otherwise, assume it's hydra */
135135   if (which_input < 3)
136   {
137      sprintf(port, "ADC%d", which_input);
138      return input_port_read(machine, port) << 8;
139   }
136      return input_port_read(machine, adcnames[which_input]) << 8;
140137
141138   return 0;
142139}
src/mame/drivers/bladestl.c
r2844r2845
5555{
5656   static int last[4];
5757   int curr,delta;
58   static const char *port[] = { "TRACKBALL_P1_1", "TRACKBALL_P1_2", "TRACKBALL_P2_1", "TRACKBALL_P1_2" };
5859
59
60   curr = input_port_read_indexed(machine, 5 + offset);
60   curr = input_port_read(machine, port[offset]);
6161   delta = (curr - last[offset]) & 0xff;
6262   last[offset] = curr;
6363   return (delta & 0x80) | (curr >> 1);
r2844r2845
109109   AM_RANGE(0x2000, 0x21ff) AM_READ(K007420_r)         /* Sprite RAM */
110110   AM_RANGE(0x2200, 0x23ff) AM_READ(K007342_scroll_r)   /* Scroll RAM */
111111   AM_RANGE(0x2400, 0x245f) AM_READ(SMH_RAM)         /* Palette */
112   AM_RANGE(0x2e01, 0x2e01) AM_READ(input_port_3_r)      /* 1P controls */
113   AM_RANGE(0x2e02, 0x2e02) AM_READ(input_port_4_r)      /* 2P controls */
114   AM_RANGE(0x2e03, 0x2e03) AM_READ(input_port_1_r)      /* DISPW #2 */
115   AM_RANGE(0x2e40, 0x2e40) AM_READ(input_port_0_r)      /* DIPSW #1 */
116   AM_RANGE(0x2e00, 0x2e00) AM_READ(input_port_2_r)      /* DIPSW #3, coinsw, startsw */
112   AM_RANGE(0x2e01, 0x2e01) AM_READ_PORT("P1")         /* 1P controls */
113   AM_RANGE(0x2e02, 0x2e02) AM_READ_PORT("P2")         /* 2P controls */
114   AM_RANGE(0x2e03, 0x2e03) AM_READ_PORT("DSW2")      /* DISPW #2 */
115   AM_RANGE(0x2e40, 0x2e40) AM_READ_PORT("DSW1")      /* DIPSW #1 */
116   AM_RANGE(0x2e00, 0x2e00) AM_READ_PORT("COINSW")      /* DIPSW #3, coinsw, startsw */
117117   AM_RANGE(0x2f00, 0x2f03) AM_READ(trackball_r)      /* Trackballs */
118118   AM_RANGE(0x2f80, 0x2f9f) AM_READ(K051733_r)         /* Protection: 051733 */
119119   AM_RANGE(0x4000, 0x5fff) AM_READ(SMH_RAM)         /* Work RAM */
src/mame/drivers/legionna.c
r2844r2845
7777#include "audio/seibu.h"
7878#include "sound/3812intf.h"
7979#include "cpu/m68000/m68000.h"
80#include "machine/seicop.h"
81#include "includes/legionna.h"
8082
81/* machine/seicop.c */
82extern UINT16* cop_mcu_ram;
83extern READ16_HANDLER( legionna_mcu_r );
84extern WRITE16_HANDLER( legionna_mcu_w );
85extern READ16_HANDLER( heatbrl_mcu_r );
86extern WRITE16_HANDLER( heatbrl_mcu_w );
87extern READ16_HANDLER( godzilla_mcu_r );
88extern WRITE16_HANDLER( godzilla_mcu_w );
89extern READ16_HANDLER( denjinmk_mcu_r );
90extern WRITE16_HANDLER( denjinmk_mcu_w );
91extern READ16_HANDLER( sdgndmrb_mcu_r );
92extern WRITE16_HANDLER( sdgndmrb_mcu_w );
93extern READ16_HANDLER( cupsoc_mcu_r );
94extern WRITE16_HANDLER( cupsoc_mcu_w );
95extern READ16_HANDLER( copdxbl_0_r );
96extern WRITE16_HANDLER( copdxbl_0_w );
97
98
99
100
101
102extern WRITE16_HANDLER( legionna_background_w );
103extern WRITE16_HANDLER( legionna_foreground_w );
104extern WRITE16_HANDLER( legionna_midground_w );
105extern WRITE16_HANDLER( legionna_text_w );
106extern WRITE16_HANDLER( legionna_control_w );
107
108extern VIDEO_START( legionna );
109extern VIDEO_START( cupsoc );
110extern VIDEO_START( denjinmk );
111extern VIDEO_UPDATE( legionna );
112extern VIDEO_UPDATE( godzilla );
113extern VIDEO_UPDATE( sdgndmrb );
114
115
116extern UINT16 *legionna_back_data,*legionna_fore_data,*legionna_mid_data,*legionna_scrollram16,*legionna_textram;
117
118
11983/*****************************************************************************/
12084
12185
r2844r2845
166130ADDRESS_MAP_END
167131
168132/* did they swap the lines, or does the protection device swap the words during the DMA?? */
169WRITE16_HANDLER( denjin_paletteram16_xBBBBBGGGGGRRRRR_word_w )
133static WRITE16_HANDLER( denjin_paletteram16_xBBBBBGGGGGRRRRR_word_w )
170134{
171135   offset^=1;
172136   COMBINE_DATA(&paletteram16[offset]);
r2844r2845
990954};
991955
992956
993void descramble_legionnaire_gfx(UINT8* src)
957static void descramble_legionnaire_gfx(UINT8* src)
994958{
995959   UINT8 *buffer;
996960   int len = 0x10000;
r2844r2845
20892053   ROM[0x5fe4/2] = 0x4e71;
20902054}
20912055
2092DRIVER_INIT( legiongfx )
2056static DRIVER_INIT( legiongfx )
20932057{
20942058   descramble_legionnaire_gfx( memory_region(REGION_GFX5) );
20952059}
src/mame/drivers/csk.c
r2844r2845
161161{
162162   switch (data)
163163   {
164      case 0x00: protection_res = input_port_read_indexed(machine, 7); break;
164      case 0x00: protection_res = input_port_read(machine, "5091"); break;
165165      case 0x20: protection_res = 0x49; break;
166166      case 0x21: protection_res = 0x47; break;
167167      case 0x22: protection_res = 0x53; break;
r2844r2845
194194static ADDRESS_MAP_START( cpoker_map, ADDRESS_SPACE_IO, 8 )
195195   AM_RANGE(0x2000, 0x27ff) AM_WRITE(cpk_palette_w)
196196   AM_RANGE(0x2800, 0x2fff) AM_WRITE(cpk_palette2_w)
197   AM_RANGE(0x4000, 0x4000) AM_READ(input_port_0_r)      /* DSW1 */
198   AM_RANGE(0x4001, 0x4001) AM_READ(input_port_1_r)      /* DSW2 */
199   AM_RANGE(0x4002, 0x4002) AM_READ(input_port_2_r)      /* DSW3 */
200   AM_RANGE(0x4003, 0x4003) AM_READ(input_port_3_r)      /* DSW4 */
201   AM_RANGE(0x4004, 0x4004) AM_READ(input_port_4_r)      /* DSW5 */
202   AM_RANGE(0x5081, 0x5081) AM_READ(input_port_5_r)      /* Services */
203   AM_RANGE(0x5082, 0x5082) AM_READ(input_port_6_r)      /* Coing & Kbd */
197   AM_RANGE(0x4000, 0x4000) AM_READ_PORT("DSW1")         /* DSW1 */
198   AM_RANGE(0x4001, 0x4001) AM_READ_PORT("DSW2")         /* DSW2 */
199   AM_RANGE(0x4002, 0x4002) AM_READ_PORT("DSW3")         /* DSW3 */
200   AM_RANGE(0x4003, 0x4003) AM_READ_PORT("DSW4")         /* DSW4 */
201   AM_RANGE(0x4004, 0x4004) AM_READ_PORT("DSW5")         /* DSW5 */
202   AM_RANGE(0x5081, 0x5081) AM_READ_PORT("5081")         /* Services */
203   AM_RANGE(0x5082, 0x5082) AM_READ_PORT("5082")         /* Coing & Kbd */
204204   AM_RANGE(0x5090, 0x5090) AM_WRITE(custom_io_w)
205   AM_RANGE(0x5091, 0x5091) AM_READ(custom_io_r)      /* Keyboard */
206   AM_RANGE(0x50a0, 0x50a0) AM_READ(input_port_8_r)      /* Not connected */
205   AM_RANGE(0x5091, 0x5091) AM_READ(custom_io_r)         /* Keyboard */
206   AM_RANGE(0x50a0, 0x50a0) AM_READ_PORT("50A0")         /* Not connected */
207207   AM_RANGE(0x50b0, 0x50b0) AM_WRITE(YM2413_register_port_0_w)
208208   AM_RANGE(0x50b1, 0x50b1) AM_WRITE(YM2413_data_port_0_w)
209209   AM_RANGE(0x6800, 0x6fff) AM_WRITE(SMH_RAM) AM_BASE(&cpk_expram)
r2844r2845
215215static ADDRESS_MAP_START( csk227_map, ADDRESS_SPACE_IO, 8 )
216216   AM_RANGE(0x2000, 0x27ff) AM_WRITE(cpk_palette_w)
217217   AM_RANGE(0x2800, 0x2fff) AM_WRITE(cpk_palette2_w)
218   AM_RANGE(0x4000, 0x4000) AM_READ(input_port_0_r)      /* DSW1 */
219   AM_RANGE(0x4001, 0x4001) AM_READ(input_port_1_r)      /* DSW2 */
220   AM_RANGE(0x4002, 0x4002) AM_READ(input_port_2_r)      /* DSW3 */
221   AM_RANGE(0x4003, 0x4003) AM_READ(input_port_3_r)      /* DSW4 */
222   AM_RANGE(0x4004, 0x4004) AM_READ(input_port_4_r)      /* DSW5 */
223   AM_RANGE(0x5081, 0x5081) AM_READ(input_port_5_r)      /* Services */
224   AM_RANGE(0x5082, 0x5082) AM_READ(input_port_6_r)      /* Coing & Kbd */
225   AM_RANGE(0x5091, 0x5091) AM_READ(input_port_7_r)      /* Keyboard */
226   AM_RANGE(0x50a0, 0x50a0) AM_READ(input_port_8_r)      /* Not connected */
218   AM_RANGE(0x4000, 0x4000) AM_READ_PORT("DSW1")         /* DSW1 */
219   AM_RANGE(0x4001, 0x4001) AM_READ_PORT("DSW2")         /* DSW2 */
220   AM_RANGE(0x4002, 0x4002) AM_READ_PORT("DSW3")         /* DSW3 */
221   AM_RANGE(0x4003, 0x4003) AM_READ_PORT("DSW4")         /* DSW4 */
222   AM_RANGE(0x4004, 0x4004) AM_READ_PORT("DSW5")         /* DSW5 */
223   AM_RANGE(0x5081, 0x5081) AM_READ_PORT("5081")         /* Services */
224   AM_RANGE(0x5082, 0x5082) AM_READ_PORT("5082")         /* Coing & Kbd */
225   AM_RANGE(0x5091, 0x5091) AM_READ_PORT("5091")         /* Keyboard */
226   AM_RANGE(0x50a0, 0x50a0) AM_READ_PORT("50A0")         /* Not connected */
227227   AM_RANGE(0x50b0, 0x50b0) AM_WRITE(YM2413_register_port_0_w)
228228   AM_RANGE(0x50b1, 0x50b1) AM_WRITE(YM2413_data_port_0_w)
229229   AM_RANGE(0x6800, 0x6fff) AM_WRITE(SMH_RAM) AM_BASE(&cpk_expram)
r2844r2845
235235static ADDRESS_MAP_START( csk234_map, ADDRESS_SPACE_IO, 8 )
236236   AM_RANGE(0x2000, 0x27ff) AM_WRITE(cpk_palette_w)
237237   AM_RANGE(0x2800, 0x2fff) AM_WRITE(cpk_palette2_w)
238   AM_RANGE(0x4000, 0x4000) AM_READ(input_port_0_r)      /* DSW1 */
239   AM_RANGE(0x4001, 0x4001) AM_READ(input_port_1_r)      /* DSW2 */
240   AM_RANGE(0x4002, 0x4002) AM_READ(input_port_2_r)      /* DSW3 */
241   AM_RANGE(0x4003, 0x4003) AM_READ(input_port_3_r)      /* DSW4 */
242   AM_RANGE(0x4004, 0x4004) AM_READ(input_port_4_r)      /* DSW5 */
243   AM_RANGE(0x5081, 0x5081) AM_READ(input_port_5_r)      /* Services */
244   AM_RANGE(0x5082, 0x5082) AM_READ(input_port_6_r)      /* Coing & Kbd */
238   AM_RANGE(0x4000, 0x4000) AM_READ_PORT("DSW1")         /* DSW1 */
239   AM_RANGE(0x4001, 0x4001) AM_READ_PORT("DSW2")         /* DSW2 */
240   AM_RANGE(0x4002, 0x4002) AM_READ_PORT("DSW3")         /* DSW3 */
241   AM_RANGE(0x4003, 0x4003) AM_READ_PORT("DSW4")         /* DSW4 */
242   AM_RANGE(0x4004, 0x4004) AM_READ_PORT("DSW5")         /* DSW5 */
243   AM_RANGE(0x5081, 0x5081) AM_READ_PORT("5081")         /* Services */
244   AM_RANGE(0x5082, 0x5082) AM_READ_PORT("5082")         /* Coing & Kbd */
245245   AM_RANGE(0x5090, 0x5090) AM_WRITE(custom_io_w)
246246   AM_RANGE(0x5091, 0x5091) AM_READ(custom_io_r)         /* used for protection and other */
247   AM_RANGE(0x50a0, 0x50a0) AM_READ(input_port_8_r)      /* Not connected */
247   AM_RANGE(0x50a0, 0x50a0) AM_READ_PORT("50A0")         /* Not connected */
248248   AM_RANGE(0x50b0, 0x50b0) AM_WRITE(YM2413_register_port_0_w)
249249   AM_RANGE(0x50b1, 0x50b1) AM_WRITE(YM2413_data_port_0_w)
250250   AM_RANGE(0x6800, 0x6fff) AM_WRITE(SMH_RAM) AM_BASE(&cpk_expram)
r2844r2845
410410   PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_START1)
411411   PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_NAME("Hold1/High/Low")
412412   PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_NAME("Hold2/Red/Black")
413
413414   PORT_START_TAG("50A0")
414415   PORT_BIT( 0xff, IP_ACTIVE_HIGH, IPT_UNUSED )
415416
src/mame/drivers/m90.c
r2844r2845
3939
4040static UINT32 bankaddress;
4141
42extern UINT16 *m90_video_data;
42extern UINT16 *m90_video_data,*dynablsb_video_control_data;
4343
44VIDEO_START( m90 );
45VIDEO_START( dynablsb );
46VIDEO_START( bomblord );
4447VIDEO_UPDATE( m90 );
45VIDEO_UPDATE( m90_bootleg );
48VIDEO_UPDATE( dynablsb );
49VIDEO_UPDATE( bomblord );
50WRITE16_HANDLER( m90_video_w );
4651WRITE16_HANDLER( m90_video_control_w );
47WRITE16_HANDLER( m90_video_w );
48VIDEO_START( m90 );
4952
5053/***************************************************************************/
5154
r2844r2845
8184   }
8285}
8386
87/*
88static WRITE16_HANDLER( unknown_w )
89{
90    printf("%04x    ",data);
91}
92*/
93
8494/***************************************************************************/
8595
8696static ADDRESS_MAP_START( main_cpu, ADDRESS_SPACE_PROGRAM, 16 )
r2844r2845
92102   AM_RANGE(0xffff0, 0xfffff) AM_ROM
93103ADDRESS_MAP_END
94104
95static ADDRESS_MAP_START( bootleg_main_cpu, ADDRESS_SPACE_PROGRAM, 16 )
105static ADDRESS_MAP_START( dynablsb_main_cpu, ADDRESS_SPACE_PROGRAM, 16 )
96106   AM_RANGE(0x00000, 0x3ffff) AM_ROM
97   AM_RANGE(0x6000e, 0x60fff) AM_RAM AM_BASE(&spriteram16)
107   AM_RANGE(0x6000e, 0x60fff) AM_RAM AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)
98108   AM_RANGE(0xa0000, 0xa3fff) AM_RAM
99109   AM_RANGE(0xd0000, 0xdffff) AM_RAM_WRITE(m90_video_w) AM_BASE(&m90_video_data)
100110   AM_RANGE(0xe0000, 0xe03ff) AM_RAM_WRITE(paletteram16_xBBBBBGGGGGRRRRR_word_w) AM_BASE(&paletteram16)
101111   AM_RANGE(0xffff0, 0xfffff) AM_ROM
102112ADDRESS_MAP_END
103113
114static ADDRESS_MAP_START( bomblord_main_cpu, ADDRESS_SPACE_PROGRAM, 16 )
115   AM_RANGE(0x00000, 0x7ffff) AM_ROM
116   AM_RANGE(0xa0000, 0xa3fff) AM_RAM
117   AM_RANGE(0xc000e, 0xc0fff) AM_RAM AM_BASE(&spriteram16) AM_SIZE(&spriteram_size)
118   AM_RANGE(0xd0000, 0xdffff) AM_RAM_WRITE(m90_video_w) AM_BASE(&m90_video_data)
119   AM_RANGE(0xe0000, 0xe03ff) AM_RAM_WRITE(paletteram16_xBBBBBGGGGGRRRRR_word_w) AM_BASE(&paletteram16)
120   AM_RANGE(0xffff0, 0xfffff) AM_ROM
121ADDRESS_MAP_END
122
104123static ADDRESS_MAP_START( main_cpu_io, ADDRESS_SPACE_IO, 16 )
105124   AM_RANGE(0x00, 0x01) AM_WRITE(m72_sound_command_w)
106125   AM_RANGE(0x00, 0x01) AM_READ(input_port_0_word_r) /* Player 1 & Player 2 */
r2844r2845
112131   AM_RANGE(0x80, 0x8f) AM_WRITE(m90_video_control_w)
113132ADDRESS_MAP_END
114133
134static ADDRESS_MAP_START( dynablsb_cpu_io, ADDRESS_SPACE_IO, 16 )
135   AM_RANGE(0x00, 0x01) AM_WRITE(m72_sound_command_w)
136   AM_RANGE(0x00, 0x01) AM_READ(input_port_0_word_r) /* Player 1 & Player 2 */
137   AM_RANGE(0x02, 0x03) AM_WRITE(m90_coincounter_w)
138   AM_RANGE(0x02, 0x03) AM_READ(input_port_1_word_r) /* Coins */
139//  AM_RANGE(0x04, 0x05) AM_WRITE(unknown_w)      /* dynablsb: write continuosly 0x6000 */
140   AM_RANGE(0x04, 0x05) AM_READ(input_port_2_word_r) /* Dip 1 & Dip 2 */
141   AM_RANGE(0x06, 0x07) AM_READ(input_port_3_word_r) /* Player 3 & Player 4 */
142   AM_RANGE(0x80, 0x8f) AM_WRITE(m90_video_control_w)
143//  AM_RANGE(0x90, 0x91) AM_WRITE(unknown_w)
144ADDRESS_MAP_END
145
115146/*****************************************************************************/
116147
117148static ADDRESS_MAP_START( sound_readmem, ADDRESS_SPACE_PROGRAM, 8 )
r2844r2845
252283   IREM_JOYSTICKS_3_4
253284INPUT_PORTS_END
254285
286static INPUT_PORTS_START( dynablsb )
287   PORT_START
288   PORT_BIT( 0x0008, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_8WAY PORT_PLAYER(2)
289   PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_8WAY PORT_PLAYER(2)
290   PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_8WAY PORT_PLAYER(2)
291   PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_8WAY PORT_PLAYER(2)
292   PORT_BIT( 0x0010, IP_ACTIVE_LOW, IPT_BUTTON4 ) PORT_PLAYER(2)
293   PORT_BIT( 0x0020, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_PLAYER(2)
294   PORT_BIT( 0x0040, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(2)
295   PORT_BIT( 0x0080, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(2)
296   PORT_BIT( 0x0800, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_8WAY PORT_PLAYER(1)
297   PORT_BIT( 0x0400, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_8WAY PORT_PLAYER(1)
298   PORT_BIT( 0x0200, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_8WAY PORT_PLAYER(1)
299   PORT_BIT( 0x0100, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_8WAY PORT_PLAYER(1)
300   PORT_BIT( 0x1000, IP_ACTIVE_LOW, IPT_BUTTON4 ) PORT_PLAYER(1)
301   PORT_BIT( 0x2000, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_PLAYER(1)
302   PORT_BIT( 0x4000, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(1)
303   PORT_BIT( 0x8000, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(1)
304
305   IREM_COINS
306
307   PORT_START_TAG("DSW")    /* Dip switch bank 1 */
308   PORT_DIPNAME( 0x0003, 0x0003, DEF_STR( Lives ) ) PORT_DIPLOCATION("SW1:1,2")
309   PORT_DIPSETTING(      0x0002, "2" )
310   PORT_DIPSETTING(      0x0003, "3" )
311   PORT_DIPSETTING(      0x0001, "4" )
312   PORT_DIPSETTING(      0x0000, "5" )
313   PORT_DIPNAME( 0x000c, 0x000c, DEF_STR( Difficulty ) ) PORT_DIPLOCATION("SW1:3,4")
314   PORT_DIPSETTING(      0x0008, DEF_STR( Easy ) )
315   PORT_DIPSETTING(      0x000c, DEF_STR( Medium ) )
316   PORT_DIPSETTING(      0x0004, DEF_STR( Hard ) )
317   PORT_DIPSETTING(      0x0000, DEF_STR( Hardest ) )
318   PORT_DIPNAME( 0x0010, 0x0010, "Game Title" )   PORT_DIPLOCATION("SW1:5") /* Manual says "NOT USE" */
319   PORT_DIPSETTING(      0x0010, "Dynablaster" )
320   PORT_DIPSETTING(      0x0000, "Bomber Man" )
321   PORT_DIPNAME( 0x0020, 0x0020, DEF_STR( Allow_Continue ) ) PORT_DIPLOCATION("SW1:6")
322   PORT_DIPSETTING(      0x0000, DEF_STR( No ) )
323   PORT_DIPSETTING(      0x0020, DEF_STR( Yes ) )
324   PORT_DIPNAME( 0x0040, 0x0000, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("SW1:7")
325   PORT_DIPSETTING(      0x0040, DEF_STR( Off ) )
326   PORT_DIPSETTING(      0x0000, DEF_STR( On ) )
327   PORT_SERVICE_DIPLOC(  0x0080, IP_ACTIVE_LOW, "SW1:8" )
328   /* Dip switch bank 2 */
329   PORT_DIPNAME( 0x0100, 0x0100, DEF_STR( Flip_Screen ) ) PORT_DIPLOCATION("SW2:1")
330   PORT_DIPSETTING(      0x0100, DEF_STR( Off ) )
331   PORT_DIPSETTING(      0x0000, DEF_STR( On ) )
332   PORT_DIPNAME( 0x0600, 0x0600, DEF_STR( Cabinet ) ) PORT_DIPLOCATION("SW2:2,3")
333   PORT_DIPSETTING(      0x0400, "2 Player Upright" )
334   PORT_DIPSETTING(      0x0600, "4 Player Upright A" ) /* Seperate Coin Slots */
335   PORT_DIPSETTING(      0x0200, "4 Player Upright B" ) /* Shared Coin Slots */
336   PORT_DIPSETTING(      0x0000, DEF_STR( Cocktail ) )  /* This setting shows screen with offset, no cocktail support :-( */
337   PORT_DIPNAME( 0x0800, 0x0800, "Coin Mode" ) PORT_DIPLOCATION("SW2:4")
338   PORT_DIPSETTING(      0x0800, "1" )
339   PORT_DIPSETTING(      0x0000, "2" )
340   /* Coin Mode 1 */
341   IREM_COIN_MODE_1_NEW_HIGH
342   /* Coin Mode 2, not supported yet */
343//  IREM_COIN_MODE_2
344
345   IREM_JOYSTICKS_3_4
346INPUT_PORTS_END
347
348
255349static INPUT_PORTS_START( atompunk )
256350   PORT_INCLUDE(dynablst)
257351
r2844r2845
833927   MDRV_IMPORT_FROM( bbmanw )
834928   MDRV_CPU_MODIFY("main")
835929   MDRV_CPU_CONFIG(no_table)
930   MDRV_CPU_PROGRAM_MAP(bomblord_main_cpu,0)
931   MDRV_CPU_IO_MAP(dynablsb_cpu_io,0)
836932
933   MDRV_VIDEO_START(bomblord)
934   MDRV_VIDEO_UPDATE(bomblord)
935
837936   MDRV_CPU_VBLANK_INT("main", bomblord_interrupt)
838937
839938MACHINE_DRIVER_END
840939
841940
842941
843static MACHINE_DRIVER_START( bootleg )
942static MACHINE_DRIVER_START( dynablsb )
844943
845944   /* basic machine hardware */
846945   MDRV_CPU_ADD_TAG("main", V30,32000000/4)
847   MDRV_CPU_PROGRAM_MAP(bootleg_main_cpu,0)
848   MDRV_CPU_IO_MAP(main_cpu_io,0)
946   MDRV_CPU_PROGRAM_MAP(dynablsb_main_cpu,0)
947   MDRV_CPU_IO_MAP(dynablsb_cpu_io,0)
849948   MDRV_CPU_VBLANK_INT("main", m90_interrupt)
850949
851950   MDRV_CPU_ADD(Z80, XTAL_3_579545MHz)
r2844r2845
867966   MDRV_GFXDECODE(m90)
868967   MDRV_PALETTE_LENGTH(512)
869968
870   MDRV_VIDEO_START(m90)
871   MDRV_VIDEO_UPDATE(m90)
969   MDRV_VIDEO_START(dynablsb)
970   MDRV_VIDEO_UPDATE(dynablsb)
872971
873972   /* sound hardware */
874973   MDRV_SPEAKER_STANDARD_MONO("mono")
r2844r2845
11991298GAME( 1991, dynablst, 0,        bombrman, dynablst, 0,        ROT0, "Irem (licensed from Hudson Soft)", "Dynablaster / Bomber Man", GAME_NO_COCKTAIL )
12001299GAME( 1991, bombrman, dynablst, bombrman, bombrman, 0,        ROT0, "Irem (licensed from Hudson Soft)", "Bomber Man (Japan)", GAME_NO_COCKTAIL )
12011300GAME( 1991, atompunk, dynablst, bombrman, atompunk, 0,        ROT0, "Irem America (licensed from Hudson Soft)", "Atomic Punk (US)", GAME_NO_COCKTAIL )
1202GAME( 1991, dynablsb, dynablst, bootleg, bombrman, 0,        ROT0, "bootleg", "Dynablaster (bootleg)", GAME_NOT_WORKING | GAME_NO_COCKTAIL )
1301GAME( 1991, dynablsb, dynablst, dynablsb, dynablsb, 0,        ROT0, "bootleg", "Dynablaster (bootleg)", GAME_NO_COCKTAIL )
12031302GAME( 1992, bbmanw,   0,        bbmanw,   bbmanw,   0,        ROT0, "Irem", "Bomber Man World / New Dyna Blaster - Global Quest", GAME_IMPERFECT_SOUND | GAME_NO_COCKTAIL )
12041303GAME( 1992, bbmanwj,  bbmanw,   bbmanw,   bbmanwj,  0,        ROT0, "Irem", "Bomber Man World (Japan)", GAME_NO_COCKTAIL )
12051304GAME( 1992, newapunk, bbmanw,   bbmanw,   bbmanwj,  0,        ROT0, "Irem America", "New Atomic Punk - Global Quest (US)", GAME_IMPERFECT_SOUND | GAME_NO_COCKTAIL )
1206GAME( 1992, bomblord, bbmanw,   bomblord, bbmanw,   bomblord, ROT0, "bootleg", "Bomber Lord (bootleg)", GAME_IMPERFECT_SOUND | GAME_NO_COCKTAIL | GAME_NOT_WORKING )
1305GAME( 1992, bomblord, bbmanw,   bomblord, bbmanw,   bomblord, ROT0, "bootleg", "Bomber Lord (bootleg)", GAME_IMPERFECT_SOUND | GAME_NO_COCKTAIL )
12071306GAME( 1992, quizf1,   0,        quizf1,   quizf1,   quizf1,   ROT0, "Irem", "Quiz F-1 1,2finish", GAME_NO_COCKTAIL )
12081307GAME( 1993, riskchal, 0,        riskchal, riskchal, 0,        ROT0, "Irem", "Risky Challenge", GAME_IMPERFECT_GRAPHICS )
12091308GAME( 1993, gussun,   riskchal, riskchal, riskchal, 0,        ROT0, "Irem", "Gussun Oyoyo (Japan)", GAME_IMPERFECT_GRAPHICS )
src/mame/drivers/msisaac.c
r2844r2845
1111#include "cpu/m6805/m6805.h"
1212#include "sound/ay8910.h"
1313#include "sound/msm5232.h"
14#include "includes/buggychl.h"
1415
1516/*
1617TO DO:
r2844r2845
1920  - TA7630 volume table is hand tuned to match the sample, but still slighty off.
2021*/
2122
22/* in machine/buggychl.c */
23READ8_HANDLER( buggychl_68705_portA_r );
24WRITE8_HANDLER( buggychl_68705_portA_w );
25WRITE8_HANDLER( buggychl_68705_ddrA_w );
26READ8_HANDLER( buggychl_68705_portB_r );
27WRITE8_HANDLER( buggychl_68705_portB_w );
28WRITE8_HANDLER( buggychl_68705_ddrB_w );
29READ8_HANDLER( buggychl_68705_portC_r );
30WRITE8_HANDLER( buggychl_68705_portC_w );
31WRITE8_HANDLER( buggychl_68705_ddrC_w );
32WRITE8_HANDLER( buggychl_mcu_w );
33READ8_HANDLER( buggychl_mcu_r );
34READ8_HANDLER( buggychl_mcu_status_r );
35
36
3723//not used
3824//WRITE8_HANDLER( msisaac_textbank1_w );
3925
src/mame/drivers/playch10.c
r2844r2845
297297#include "sound/nes_apu.h"
298298
299299#include "rendlay.h"
300#include "includes/playch10.h"
300301
301302/* clock frequency */
302303#define N2A03_DEFAULTCLOCK (21477272.724 / 12)
303304
304/* from video */
305extern WRITE8_HANDLER( playch10_videoram_w );
306extern PALETTE_INIT( playch10 );
307extern VIDEO_START( playch10 );
308extern VIDEO_START( playch10_hboard );
309extern VIDEO_UPDATE( playch10 );
310
311/* from machine */
312extern MACHINE_RESET( pc10 );
313extern DRIVER_INIT( playch10 );   /* standard games */
314extern DRIVER_INIT( pc_gun );   /* gun games */
315extern DRIVER_INIT( pc_hrz );   /* horizontal games */
316extern DRIVER_INIT( pcaboard );   /* a-board games */
317extern DRIVER_INIT( pcbboard );   /* b-board games */
318extern DRIVER_INIT( pccboard );   /* c-board games */
319extern DRIVER_INIT( pcdboard );   /* d-board games */
320extern DRIVER_INIT( pcdboard_2 );   /* d-board games with extra ram */
321extern DRIVER_INIT( pceboard );   /* e-board games */
322extern DRIVER_INIT( pcfboard );   /* f-board games */
323extern DRIVER_INIT( pcfboard_2 );   /* f-board games with extra ram */
324extern DRIVER_INIT( pcgboard );   /* g-board games */
325extern DRIVER_INIT( pcgboard_type2 ); /* g-board games with 4 screen mirror */
326extern DRIVER_INIT( pchboard );   /* h-board games */
327extern DRIVER_INIT( pciboard );   /* i-board games */
328extern DRIVER_INIT( pckboard );   /* k-board games */
329extern READ8_HANDLER( pc10_port_0_r );
330extern READ8_HANDLER( pc10_instrom_r );
331extern READ8_HANDLER( pc10_prot_r );
332extern READ8_HANDLER( pc10_detectclr_r );
333extern READ8_HANDLER( pc10_in0_r );
334extern READ8_HANDLER( pc10_in1_r );
335extern WRITE8_HANDLER( pc10_SDCS_w );
336extern WRITE8_HANDLER( pc10_CNTRLMASK_w );
337extern WRITE8_HANDLER( pc10_DISPMASK_w );
338extern WRITE8_HANDLER( pc10_SOUNDMASK_w );
339extern WRITE8_HANDLER( pc10_NMIENABLE_w );
340extern WRITE8_HANDLER( pc10_DOGDI_w );
341extern WRITE8_HANDLER( pc10_GAMERES_w );
342extern WRITE8_HANDLER( pc10_GAMESTOP_w );
343extern WRITE8_HANDLER( pc10_PPURES_w );
344extern WRITE8_HANDLER( pc10_prot_w );
345extern WRITE8_HANDLER( pc10_CARTSEL_w );
346extern WRITE8_HANDLER( pc10_in0_w );
347
348extern int pc10_sdcs;
349extern int pc10_nmi_enable;
350extern int pc10_dog_di;
351
352305/******************************************************************************/
353306
354307/* local stuff */
src/mame/drivers/cojag.c
r2844r2845
367367
368368static READ32_HANDLER( jamma_r )
369369{
370   return input_port_read_indexed(machine, 0) | (input_port_read_indexed(machine, 1) << 16);
370   return input_port_read(machine, "IN0") | (input_port_read(machine, "IN1") << 16);
371371}
372372
373373
r2844r2845
380380   // D5     = /VOLUMEUP
381381   // D4     = /VOLUMEDOWN
382382   // D3-D0  = ACTC4-1
383   return input_port_read_indexed(machine, 2) | (input_port_read_indexed(machine, 2) << 16);
383   return input_port_read(machine, "IN2") | (input_port_read(machine, "IN2") << 16);
384384}
385385
386386
r2844r2845
790790 *************************************/
791791
792792static INPUT_PORTS_START( area51 )
793   PORT_START
793   PORT_START_TAG("IN0")
794794   PORT_BIT( 0x00ff, IP_ACTIVE_LOW, IPT_UNUSED )
795795   PORT_BIT( 0x0100, IP_ACTIVE_LOW, IPT_START2 )
796796   PORT_BIT( 0xfe00, IP_ACTIVE_LOW, IPT_UNUSED )
797797
798   PORT_START
798   PORT_START_TAG("IN1")
799799   PORT_BIT( 0x00ff, IP_ACTIVE_LOW, IPT_UNUSED )
800800   PORT_BIT( 0x0100, IP_ACTIVE_LOW, IPT_START1 )
801801   PORT_BIT( 0xfe00, IP_ACTIVE_LOW, IPT_UNUSED )
802802
803   PORT_START
803   PORT_START_TAG("IN2")
804804   PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_COIN1 )
805805   PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_COIN2 )
806806   PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_COIN3 )
r2844r2845
811811   PORT_BIT( 0x0080, IP_ACTIVE_LOW, IPT_SPECIAL )   // vsyncneq
812812   PORT_BIT( 0xff00, IP_ACTIVE_LOW, IPT_UNUSED )
813813
814   PORT_START            /* fake analog X */
814   PORT_START_TAG("FAKE1_X")            /* fake analog X */
815815   PORT_BIT( 0xff, 0x80, IPT_LIGHTGUN_X ) PORT_CROSSHAIR(X, 320.0/(320.0 - 7 -7), 0, 0) PORT_SENSITIVITY(50) PORT_KEYDELTA(10)
816816
817   PORT_START            /* fake analog Y */
817   PORT_START_TAG("FAKE1_Y")            /* fake analog Y */
818818   PORT_BIT( 0xff, 0x80, IPT_LIGHTGUN_Y ) PORT_CROSSHAIR(Y, (240.0 - 1)/240, 0.0, 0) PORT_SENSITIVITY(70) PORT_KEYDELTA(10)
819819
820   PORT_START            /* fake analog X */
820   PORT_START_TAG("FAKE2_X")            /* fake analog X */
821821   PORT_BIT( 0xff, 0x80, IPT_LIGHTGUN_X ) PORT_CROSSHAIR(X, 320.0/(320.0 - 7 -7), 0.0, 0) PORT_SENSITIVITY(50) PORT_KEYDELTA(10) PORT_PLAYER(2)
822822
823   PORT_START            /* fake analog Y */
823   PORT_START_TAG("FAKE2_Y")            /* fake analog Y */
824824   PORT_BIT( 0xff, 0x80, IPT_LIGHTGUN_Y ) PORT_CROSSHAIR(Y, (240.0 - 1)/240, 0.0, 0) PORT_SENSITIVITY(70) PORT_KEYDELTA(10) PORT_PLAYER(2)
825825
826   PORT_START            /* gun triggers */
826   PORT_START_TAG("IN3")         /* gun triggers */
827827   PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_SPECIAL )   // gun data valid
828828   PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_SPECIAL )   // gun data valid
829829   PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(2)
r2844r2845
833833
834834
835835static INPUT_PORTS_START( freezeat )
836   PORT_START
836   PORT_START_TAG("IN0")
837837   PORT_BIT( 0x00ff, IP_ACTIVE_LOW, IPT_UNUSED )
838838   PORT_BIT( 0x0100, IP_ACTIVE_LOW, IPT_START2 )
839839   PORT_BIT( 0x0200, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(2)
r2844r2845
844844   PORT_BIT( 0x4000, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_PLAYER(2)
845845   PORT_BIT( 0x8000, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_PLAYER(2)
846846
847   PORT_START
847   PORT_START_TAG("IN1")
848848   PORT_BIT( 0x00ff, IP_ACTIVE_LOW, IPT_UNUSED )
849849   PORT_BIT( 0x0100, IP_ACTIVE_LOW, IPT_START1 )
850850   PORT_BIT( 0x0200, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(1)
r2844r2845
855855   PORT_BIT( 0x4000, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_PLAYER(1)
856856   PORT_BIT( 0x8000, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_PLAYER(1)
857857
858   PORT_START
858   PORT_START_TAG("IN2")
859859   PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_COIN1 )
860860   PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_COIN2 )
861861   PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_COIN3 )
r2844r2845
866866   PORT_BIT( 0x0080, IP_ACTIVE_LOW, IPT_SPECIAL )   // vsyncneq
867867   PORT_BIT( 0xff00, IP_ACTIVE_LOW, IPT_UNUSED )
868868
869   PORT_START
869   PORT_START_TAG("IN3")
870870   PORT_BIT( 0x000f, IP_ACTIVE_HIGH, IPT_SPECIAL )   // coin returns
871871   PORT_BIT( 0x00f0, IP_ACTIVE_LOW, IPT_UNUSED )
872872   PORT_BIT( 0xff00, IP_ACTIVE_LOW, IPT_UNUSED )
r2844r2845
874874
875875
876876static INPUT_PORTS_START( fishfren )
877   PORT_START
877   PORT_START_TAG("IN0")
878878   PORT_BIT( 0x00ff, IP_ACTIVE_LOW, IPT_UNUSED )
879879   PORT_BIT( 0x0100, IP_ACTIVE_LOW, IPT_START2 )
880880   PORT_BIT( 0x0200, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(2)
r2844r2845
885885   PORT_BIT( 0x4000, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_PLAYER(2)
886886   PORT_BIT( 0x8000, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_PLAYER(2)
887887
888   PORT_START
888   PORT_START_TAG("IN1")
889889   PORT_BIT( 0x00ff, IP_ACTIVE_LOW, IPT_UNUSED )
890890   PORT_BIT( 0x0100, IP_ACTIVE_LOW, IPT_START1 )
891891   PORT_BIT( 0x0200, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(1)
r2844r2845
896896   PORT_BIT( 0x4000, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_PLAYER(1)
897897   PORT_BIT( 0x8000, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_PLAYER(1)
898898
899   PORT_START
899   PORT_START_TAG("IN2")
900900   PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_COIN1 )
901901   PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_COIN2 )
902902   PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_COIN3 )
r2844r2845
907907   PORT_BIT( 0x0080, IP_ACTIVE_LOW, IPT_SPECIAL )   // vsyncneq
908908   PORT_BIT( 0xff00, IP_ACTIVE_LOW, IPT_UNUSED )
909909
910   PORT_START
910   PORT_START_TAG("IN3")
911911   PORT_BIT( 0x000f, IP_ACTIVE_HIGH, IPT_SPECIAL )   // coin returns
912912   PORT_BIT( 0x00f0, IP_ACTIVE_LOW, IPT_UNUSED )
913913   PORT_BIT( 0xff00, IP_ACTIVE_LOW, IPT_UNUSED )
r2844r2845
915915
916916
917917static INPUT_PORTS_START( vcircle )
918   PORT_START
918   PORT_START_TAG("IN0")
919919   PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_BUTTON4 ) PORT_PLAYER(2)
920920   PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_BUTTON5 ) PORT_PLAYER(2)
921921   PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_BUTTON6 ) PORT_PLAYER(2)
r2844r2845
929929   PORT_BIT( 0x4000, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_PLAYER(2)
930930   PORT_BIT( 0x8000, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_PLAYER(2)
931931
932   PORT_START
932   PORT_START_TAG("IN1")
933933   PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_BUTTON4 ) PORT_PLAYER(1)
934934   PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_BUTTON5 ) PORT_PLAYER(1)
935935   PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_BUTTON6 ) PORT_PLAYER(1)
r2844r2845
943943   PORT_BIT( 0x4000, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_PLAYER(1)
944944   PORT_BIT( 0x8000, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_PLAYER(1)
945945
946   PORT_START
946   PORT_START_TAG("IN2")
947947   PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_COIN1 )
948948   PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_COIN2 )
949949   PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_COIN3 )
r2844r2845
954954   PORT_BIT( 0x0080, IP_ACTIVE_LOW, IPT_SPECIAL )   // vsyncneq
955955   PORT_BIT( 0xff00, IP_ACTIVE_LOW, IPT_UNUSED )
956956
957   PORT_START
957   PORT_START_TAG("IN3")
958958   PORT_BIT( 0x000f, IP_ACTIVE_HIGH, IPT_SPECIAL )   // coin returns
959959   PORT_BIT( 0x00f0, IP_ACTIVE_LOW, IPT_UNUSED )
960960   PORT_BIT( 0xff00, IP_ACTIVE_LOW, IPT_UNUSED )
src/mame/drivers/cyberbal.c
r2844r2845
105105
106106static READ16_HANDLER( special_port0_r )
107107{
108   int temp = input_port_read_indexed(machine, 0);
108   int temp = input_port_read(machine, "IN0");
109109   if (atarigen_cpu_to_sound_ready) temp ^= 0x0080;
110110   return temp;
111111}
r2844r2845
113113
114114static READ16_HANDLER( special_port2_r )
115115{
116   int temp = input_port_read_indexed(machine, 2);
116   int temp = input_port_read(machine, "IN2");
117117   if (atarigen_cpu_to_sound_ready) temp ^= 0x2000;
118118   return temp;
119119}
r2844r2845
277277 *************************************/
278278
279279static INPUT_PORTS_START( cyberbal )
280   PORT_START      /* fe0000 */
280   PORT_START_TAG("IN0")      /* fe0000 */
281281   PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_PLAYER(4)
282282   PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_PLAYER(4)
283283   PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_PLAYER(4)
r2844r2845
294294   PORT_BIT( 0x4000, IP_ACTIVE_LOW, IPT_UNUSED )
295295   PORT_SERVICE( 0x8000, IP_ACTIVE_LOW )
296296
297   PORT_START      /* fe1000 */
297   PORT_START_TAG("IN1")      /* fe1000 */
298298   PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_PLAYER(2)
299299   PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_PLAYER(2)
300300   PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_PLAYER(2)
r2844r2845
311311   PORT_BIT( 0x4000, IP_ACTIVE_LOW, IPT_UNUSED )
312312   PORT_BIT( 0x8000, IP_ACTIVE_LOW, IPT_VBLANK )
313313
314   PORT_START      /* fake port for screen switching */
314   PORT_START_TAG("IN2")      /* fake port for screen switching */
315315   PORT_BIT( 0xffff, IP_ACTIVE_LOW, IPT_UNUSED )
316316
317   PORT_START      /* audio board port */
317   /* 2008-06 FP: I tag this as JSAII (even if it's not) to simplify cyberbal_special_port3_r */
318   PORT_START_TAG("JSAII")      /* audio board port */
318319   PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_COIN2 )
319320   PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_COIN1 )
320321   PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_COIN4 )
r2844r2845
327328
328329
329330static INPUT_PORTS_START( cyberb2p )
330   PORT_START      /* fc0000 */
331   PORT_START_TAG("IN0")      /* fc0000 */
331332   PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_PLAYER(1)
332333   PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_PLAYER(1)
333334   PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_PLAYER(1)
r2844r2845
336337   PORT_BIT( 0x0020, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(1)
337338   PORT_BIT( 0xffc0, IP_ACTIVE_LOW, IPT_UNUSED )
338339
339   PORT_START      /* fc2000 */
340   PORT_START_TAG("IN1")      /* fc2000 */
340341   PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_PLAYER(2)
341342   PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_PLAYER(2)
342343   PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_PLAYER(2)
r2844r2845
345346   PORT_BIT( 0x0020, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(2)
346347   PORT_BIT( 0xffc0, IP_ACTIVE_LOW, IPT_UNUSED )
347348
348   PORT_START      /* fc4000 */
349   PORT_START_TAG("IN2")      /* fc4000 */
349350   PORT_BIT( 0x1fff, IP_ACTIVE_LOW, IPT_UNUSED )
350351   PORT_BIT( 0x2000, IP_ACTIVE_LOW, IPT_UNUSED )
351352   PORT_BIT( 0x4000, IP_ACTIVE_HIGH, IPT_VBLANK )
src/mame/drivers/badlands.c
r2844r2845
139139   /* sound IRQ is on 32V */
140140   if (scanline & 32)
141141      atarigen_6502_irq_ack_r(screen->machine, 0);
142   else if (!(input_port_read_indexed(screen->machine, 0) & 0x40))
142   else if (!(input_port_read(screen->machine, "FE4000") & 0x40))
143143      atarigen_6502_irq_gen(screen->machine, 0);
144144}
145145
r2844r2845
166166
167167static INTERRUPT_GEN( vblank_int )
168168{
169   int pedal_state = input_port_read_indexed(machine, 4);
169   int pedal_state = input_port_read(machine, "PEDALS");
170170   int i;
171171
172172   /* update the pedals once per frame */
r2844r2845
240240                0x02 = coin 2
241241                0x01 = coin 1
242242            */
243         result = input_port_read_indexed(machine, 3);
244         if (!(input_port_read_indexed(machine, 0) & 0x0080)) result ^= 0x90;
243         result = input_port_read(machine, "AUDIO");
244         if (!(input_port_read(machine, "FE4000") & 0x0080)) result ^= 0x90;
245245         if (atarigen_cpu_to_sound_ready) result ^= 0x40;
246246         if (atarigen_sound_to_cpu_ready) result ^= 0x20;
247247         result ^= 0x10;
r2844r2845
356356 *************************************/
357357
358358static INPUT_PORTS_START( badlands )
359   PORT_START      /* fe4000 */
359   PORT_START_TAG("FE4000")   /* fe4000 */
360360   PORT_BIT( 0x000f, IP_ACTIVE_LOW, IPT_UNUSED )
361361   PORT_BIT( 0x0010, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(1)
362362   PORT_BIT( 0x0020, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(2)
r2844r2845
364364   PORT_SERVICE( 0x0080, IP_ACTIVE_LOW )
365365   PORT_BIT( 0xff00, IP_ACTIVE_LOW, IPT_UNUSED )
366366
367   PORT_START      /* fe6000 */
367   PORT_START_TAG("FE6000")   /* fe6000 */
368368   PORT_BIT( 0x00ff, 0, IPT_DIAL ) PORT_SENSITIVITY(50) PORT_KEYDELTA(10) PORT_PLAYER(1)
369369   PORT_BIT( 0xff00, IP_ACTIVE_LOW, IPT_UNUSED )
370370
371   PORT_START      /* fe6002 */
371   PORT_START_TAG("FE6002")   /* fe6002 */
372372   PORT_BIT( 0x00ff, 0, IPT_DIAL ) PORT_SENSITIVITY(50) PORT_KEYDELTA(10) PORT_PLAYER(2)
373373   PORT_BIT( 0xff00, IP_ACTIVE_LOW, IPT_UNUSED )
374374
375   PORT_START      /* audio port */
375   PORT_START_TAG("AUDIO")      /* audio port */
376376   PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_COIN1 )
377377   PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_COIN2 )
378378   PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_COIN3 )
r2844r2845
382382   PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_SPECIAL )   /* command buffer full */
383383   PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_SPECIAL )   /* self test */
384384
385   PORT_START      /* fake for pedals */
385   PORT_START_TAG("PEDALS")   /* fake for pedals */
386386   PORT_BIT( 0x0001, IP_ACTIVE_HIGH, IPT_BUTTON1 ) PORT_PLAYER(1)
387387   PORT_BIT( 0x0002, IP_ACTIVE_HIGH, IPT_BUTTON1 ) PORT_PLAYER(2)
388388   PORT_BIT( 0xfffc, IP_ACTIVE_HIGH, IPT_UNUSED )
r2844r2845
631631   /* sound IRQ is on 32V */
632632//  if (scanline & 32)
633633//      atarigen_6502_irq_ack_r(screen->machine, 0);
634//  else if (!(input_port_read_indexed(machine, 0) & 0x40))
634//  else if (!(input_port_read(machine, "FE4000") & 0x40))
635635//      atarigen_6502_irq_gen(screen->machine, 0);
636636}
637637
src/mame/drivers/slapfght.c
r2844r2845
189189#include "deprecat.h"
190190#include "cpu/m6805/m6805.h"
191191#include "sound/ay8910.h"
192#include "includes/slapfght.h"
192193
193/* video */
194extern UINT8 *slapfight_videoram;
195extern UINT8 *slapfight_colorram;
196extern size_t slapfight_videoram_size;
197extern UINT8 *slapfight_scrollx_lo,*slapfight_scrollx_hi,*slapfight_scrolly;
198VIDEO_UPDATE( slapfight );
199VIDEO_UPDATE( perfrman );
200VIDEO_START( slapfight );
201VIDEO_START( perfrman );
202WRITE8_HANDLER( slapfight_flipscreen_w );
203WRITE8_HANDLER( slapfight_fixram_w );
204WRITE8_HANDLER( slapfight_fixcol_w );
205WRITE8_HANDLER( slapfight_videoram_w );
206WRITE8_HANDLER( slapfight_colorram_w );
207WRITE8_HANDLER( slapfight_palette_bank_w );
208
209/* MACHINE */
210MACHINE_RESET( slapfight );
211extern UINT8 *slapfight_dpram;
212extern size_t slapfight_dpram_size;
213WRITE8_HANDLER( slapfight_dpram_w );
214READ8_HANDLER( slapfight_dpram_r );
215
216READ8_HANDLER( slapfight_port_00_r );
217WRITE8_HANDLER( slapfight_port_00_w );
218WRITE8_HANDLER( slapfight_port_01_w );
219WRITE8_HANDLER( getstar_port_04_w );
220WRITE8_HANDLER( slapfight_port_06_w );
221WRITE8_HANDLER( slapfight_port_07_w );
222WRITE8_HANDLER( slapfight_port_08_w );
223WRITE8_HANDLER( slapfight_port_09_w );
224
225/* MCU */
226READ8_HANDLER( getstar_e803_r );
227
228READ8_HANDLER ( tigerh_68705_portA_r );
229WRITE8_HANDLER( tigerh_68705_portA_w );
230READ8_HANDLER ( tigerh_68705_portB_r );
231WRITE8_HANDLER( tigerh_68705_portB_w );
232READ8_HANDLER ( tigerh_68705_portC_r );
233WRITE8_HANDLER( tigerh_68705_portC_w );
234WRITE8_HANDLER( tigerh_68705_ddrA_w );
235WRITE8_HANDLER( tigerh_68705_ddrB_w );
236WRITE8_HANDLER( tigerh_68705_ddrC_w );
237WRITE8_HANDLER( tigerh_mcu_w );
238READ8_HANDLER ( tigerh_mcu_r );
239READ8_HANDLER ( tigerh_mcu_status_r );
240
241WRITE8_HANDLER( getstar_sh_intenable_w );
242INTERRUPT_GEN( getstar_interrupt );
243
244
245
246194static ADDRESS_MAP_START( perfrman_readmem, ADDRESS_SPACE_PROGRAM, 8 )
247195   AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM)
248196   AM_RANGE(0x8000, 0x87ff) AM_READ(SMH_RAM)
src/mame/drivers/bishjan.c
r2844r2845
221221{
222222   int i;
223223   UINT16 res = 0xff;
224   static const char *port[] = { "KEYB_0", "KEYB_1", "KEYB_2", "KEYB_3", "KEYB_4" };
224225
225226   for (i = 0; i < 5; i++)
226227      if (bishjan_input & (1 << i))
227         res = input_port_read_indexed(machine, 4+i);
228         res = input_port_read(machine, port[i]);
228229
229230   return   (res << 8) |
230         input_port_read_indexed(machine, 3) |
231         input_port_read(machine, "IN0") |
231232         ((bishjan_hopper && !(video_screen_get_frame_number(machine->primary_screen)%10)) ? 0x00 : 0x04)   // bit 2: hopper sensor
232233   ;
233234}
r2844r2845
321322***************************************************************************/
322323
323324static INPUT_PORTS_START( bishjan )
324   PORT_START   // IN0 - Reset
325   PORT_START_TAG("RESET")      /* IN0 - Reset */
325326   PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_OTHER ) PORT_NAME("Reset") PORT_CODE(KEYCODE_F1)
326327
327   PORT_START   // IN1 - DSW(SW1)
328   PORT_START_TAG("DSW")      /* IN1 - DSW(SW1) */
328329   PORT_DIPNAME( 0x0001, 0x0001, DEF_STR( Controls ) )
329330   PORT_DIPSETTING(      0x0001, "Keyboard" )
330331   PORT_DIPSETTING(      0x0000, DEF_STR( Joystick ) )
r2844r2845
350351   PORT_DIPSETTING(      0x0080, DEF_STR( Off ) )
351352   PORT_DIPSETTING(      0x0000, DEF_STR( On ) )
352353
353   PORT_START   // IN2 - C
354   PORT_START_TAG("JOY")      /* IN2 - C */
354355   PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_START1         )   // start (joy)
355356   PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN   )   // down (joy)
356357   PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_UNKNOWN      )
r2844r2845
360361   PORT_BIT( 0x0040, IP_ACTIVE_LOW, IPT_MAHJONG_BET   )   // bet (joy)
361362   PORT_BIT( 0x0080, IP_ACTIVE_LOW, IPT_BUTTON2      )   // select (joy)
362363
363   PORT_START   // IN3 - A
364   PORT_START_TAG("IN0")      /* IN3 - A */
364365   PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_UNKNOWN      )
365366   PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_SERVICE      )   // test
366367   PORT_BIT( 0x0004, IP_ACTIVE_HIGH,IPT_SPECIAL      )   // hopper sensor
r2844r2845
370371   PORT_BIT( 0x0040, IP_ACTIVE_LOW, IPT_SERVICE3      )   // pay out? "hopper empty"
371372   PORT_BIT( 0x0080, IP_ACTIVE_LOW, IPT_COIN2         )   PORT_IMPULSE(2)   // coin
372373
373   PORT_START   // IN4 - B(1)
374   PORT_START_TAG("KEYB_0")   /* IN4 - B(1) */
374375   PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_MAHJONG_A      )   // a
375376   PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_MAHJONG_E      )   // e
376377   PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_MAHJONG_I      )   // i
r2844r2845
380381   PORT_BIT( 0x0040, IP_ACTIVE_LOW, IPT_UNKNOWN      )
381382   PORT_BIT( 0x0080, IP_ACTIVE_LOW, IPT_UNKNOWN      )
382383
383   PORT_START   // IN5 - B(2)
384   PORT_START_TAG("KEYB_1")   /* IN5 - B(2) */
384385   PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_MAHJONG_B      )   // b
385386   PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_MAHJONG_F      )   // f
386387   PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_MAHJONG_J      )   // j
r2844r2845
390391   PORT_BIT( 0x0040, IP_ACTIVE_LOW, IPT_UNKNOWN      )
391392   PORT_BIT( 0x0080, IP_ACTIVE_LOW, IPT_UNKNOWN      )
392393
393   PORT_START   // IN6 - B(3)
394   PORT_START_TAG("KEYB_2")   /* IN6 - B(3) */
394395   PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_MAHJONG_C      )   // c
395396   PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_MAHJONG_G      )   // g
396397   PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_MAHJONG_K      )   // k
r2844r2845
400401   PORT_BIT( 0x0040, IP_ACTIVE_LOW, IPT_UNKNOWN      )
401402   PORT_BIT( 0x0080, IP_ACTIVE_LOW, IPT_UNKNOWN      )
402403
403   PORT_START   // IN7 - B(4)
404   PORT_START_TAG("KEYB_3")   /* IN7 - B(4) */
404405   PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_MAHJONG_D      )   // d
405406   PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_MAHJONG_H      )   // h
406407   PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_MAHJONG_L      )   // l
r2844r2845
410411   PORT_BIT( 0x0040, IP_ACTIVE_LOW, IPT_UNKNOWN      )
411412   PORT_BIT( 0x0080, IP_ACTIVE_LOW, IPT_UNKNOWN      )
412413
413   PORT_START   // IN8 - B(5)
414   PORT_START_TAG("KEYB_4")   /* IN8 - B(5) */
414415   PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_UNKNOWN      )
415416   PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_UNKNOWN      )   // g2
416417   PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_UNKNOWN      )   // e2
src/mame/drivers/neodrvr.c
r2844r2845
441441
442442    MVS CHA:
443443    -- SNK --
444    . NEO-MVS CHA-32
444445    . NEO-MVS CHA-8M
445446    . NEO-MVS CHA42G
446447    . NEO-MVS CHA42G-1
r2844r2845
452453    . NEO-MVS PSTM CHA136
453454    . NEO-MVS CHA512Y
454455    . NEO-MVS CHAFIO (1999.6.14)
456    . MVS CHAFIO REV1.0 (KOF-2001)
455457    . NEO-MVS CHAFIO (SNK 2002) - MADE IN KOREA
456458    -- SNKPLAYMORE --
457459    . NEO-MVS CHAFIO (2003.7.24)
458460
459461    MVS PROG:
460462    -- SNK --
463    . NEO-MVS PROG-HERO
461464    . NEO-MVS PROG-EP
462465    . NEO-MVS PROG8M42
463466    . NEO-MVS PROG16
r2844r2845
467470    . NEO-MVS PROG 4096
468471    . NEO-MVS PROG 4096 B
469472    . NEO-MVS PROGGSC
473    . NEO-MVS PROGGS3
470474    . NEO-MVS PROGTOP
471475    . NEO-MVS PROGSF1 (1998.6.17)
472476    . NEO-MVS PROGEOP (1999.2.2)
473477    . NEO-MVS PROGLBA (1999.4.12) - LBA-SUB (2000.2.24)
474478    . NEO-MVS PROGBK1
475479    . NEO-MVS PROGBK2 (2000.3.21)
480    . MVS PROGBK2 REV1.0 (KOF-2001)
476481    . NEO-MVS PROGBK2 (SNK 2002) - MADE IN KOREA
477482    -- SNKPLAYMORE --
478483    . NEO-MVS PROGBK2R (2003.8.26) - NEO-HYCS (2003.9.29)
r2844r2845
518523    . NEO-AEG PROGRK
519524    . NEO-AEG PROGRKB
520525    . NEO-AEG PROGBK1Y
526    . NEO-AEG PROGBK1F
521527    -- PLAYMORE --
522528    . NEO-AEG PROGBK2 (2002.4.1)
523529    -- SNKPLAYMORE --
r2844r2845
546552
547553****************************************************************************/
548554
555/****************************************************************************
556
557    General set notes:
558    ==================
559
560    NOTES BELOW APPLY TO OEM SETS ONLY!
561
562    Many 'M1' roms contain mirrored data (64k mirrored or 128k mirrored).
563    Found on several early sets (ID 0001 ~ 0045) and on the last sets (ID 0267 ~ 0272).
564    This caused some confusion and incorrect rom sizes.
565    Minimum 'M1' size is 1mbit, maximum size 4mbit.
566    The remaining 64k 'M1' are marked BAD_DUMP.
567
568    All 'S1' roms found on prom are 1mbit.
569    The remainig 64k 'S1' are marked BAD_DUMP.
570
571****************************************************************************/
572
549573ROM_START( nam1975 ) /* MVS AND AES VERSION */
550574   ROM_REGION( 0x100000, NEOGEO_REGION_MAIN_CPU_CARTRIDGE, 0 )
551575   ROM_LOAD16_WORD_SWAP( "001-p1.bin", 0x000000, 0x080000, CRC(cc9fc951) SHA1(92f4e6ddeeb825077d92dbb70b50afea985f15c0) )
r2844r2845
883907
884908   NEO_SFIX_128K( "014-s1.bin", CRC(99419733) SHA1(b2524af8704941acc72282aa1d62fd4c93e3e822) )
885909
886   NEO_BIOS_AUDIO_128K( "014-m1.bin", CRC(2a97e84d) SHA1(3c3f0236ec261b48637ddff3d1dcd11ede4af300) )
910   /* CXK381003A */
911   NEO_BIOS_AUDIO_128K( "014-m1.bin", CRC(b6683092) SHA1(623ec7ec2915fb077bf65b4a16c815e071c25259) )
887912
888913   ROM_REGION( 0x200000, NEOGEO_REGION_AUDIO_DATA_1, 0 )
889914   ROM_LOAD( "014-v1.bin", 0x000000, 0x100000, CRC(25419296) SHA1(c9fc04987c4e0875d276e1a0fb671740b6f548ad) )
r2844r2845
901926ROM_START( kotm )
902927   ROM_REGION( 0x100000, NEOGEO_REGION_MAIN_CPU_CARTRIDGE, 0 )
903928   ROM_LOAD16_WORD_SWAP( "016-p1.bin", 0x000000, 0x080000, CRC(1b818731) SHA1(b98b1b33c0301fd79aac908f6b635dd00d1cb08d) )
904   ROM_LOAD16_WORD_SWAP( "016-p2.bin", 0x080000, 0x020000, BAD_DUMP CRC(12afdc2b) SHA1(3a95f5910cbb9f17e63ddece995c6e120fa2f622) )
929   ROM_LOAD16_WORD_SWAP( "016-p2.bin", 0x080000, 0x020000, CRC(12afdc2b) SHA1(3a95f5910cbb9f17e63ddece995c6e120fa2f622) )
905930
906931   NEO_SFIX_128K( "016-s1.bin", CRC(1a2eeeb3) SHA1(8d2b96d395020197bc59294b6b0c8d62b1d8d4dd) )
907932
908   NEO_BIOS_AUDIO_128K( "016-m1.bin", CRC(0296abcb) SHA1(560046f256cd339fa685d0d38d55317cb6adfa99) )
933   /* TC531001 */
934   NEO_BIOS_AUDIO_128K( "016-m1.bin", CRC(9da9ca10) SHA1(88b915827d529f39c365d3e41197d5461e07a085) )
909935
910936   ROM_REGION( 0x200000, NEOGEO_REGION_AUDIO_DATA_1, 0 )
911937   ROM_LOAD( "016-v1.bin", 0x000000, 0x100000, CRC(86c0a502) SHA1(7fe2db0c64aefdd14d6c36f7fcd6442591e9a014) )
r2844r2845
923949ROM_START( kotmh ) /* AES VERSION */
924950   ROM_REGION( 0x100000, NEOGEO_REGION_MAIN_CPU_CARTRIDGE, 0 )
925951   ROM_LOAD16_WORD_SWAP( "016-hp1.bin",0x000000, 0x080000, CRC(b774621e) SHA1(7684b2e07163aec68cd083ef1d8900f855f6cb42) )
926   ROM_LOAD16_WORD_SWAP( "016-p2.bin", 0x080000, 0x020000, BAD_DUMP CRC(12afdc2b) SHA1(3a95f5910cbb9f17e63ddece995c6e120fa2f622) )
952   ROM_LOAD16_WORD_SWAP( "016-p2.bin", 0x080000, 0x020000, CRC(12afdc2b) SHA1(3a95f5910cbb9f17e63ddece995c6e120fa2f622) )
927953
928954   NEO_SFIX_128K( "016-s1.bin", CRC(1a2eeeb3) SHA1(8d2b96d395020197bc59294b6b0c8d62b1d8d4dd) )
929955
930   NEO_BIOS_AUDIO_128K( "016-m1.bin", CRC(0296abcb) SHA1(560046f256cd339fa685d0d38d55317cb6adfa99) )
956   /* TC531001 */
957   NEO_BIOS_AUDIO_128K( "016-m1.bin", CRC(9da9ca10) SHA1(88b915827d529f39c365d3e41197d5461e07a085) )
931958
932959   ROM_REGION( 0x200000, NEOGEO_REGION_AUDIO_DATA_1, 0 )
933960   ROM_LOAD( "016-v1.bin", 0x000000, 0x100000, CRC(86c0a502) SHA1(7fe2db0c64aefdd14d6c36f7fcd6442591e9a014) )
r2844r2845
9921019
9931020   NEO_SFIX_128K( "018-s1.bin", CRC(6799ea0d) SHA1(ec75ef9dfdcb0b123574fc6d81ebaaadfba32fb5) )
9941021
995   NEO_BIOS_AUDIO_128K( "018-m1.bin", BAD_DUMP CRC(0c939ee2) SHA1(57d580d3279e66b9fe66bbcc68529d3384a926ff) )
1022   /* HN62321A */
1023   NEO_BIOS_AUDIO_128K( "018-m1.bin", CRC(0c939ee2) SHA1(57d580d3279e66b9fe66bbcc68529d3384a926ff) )
9961024
9971025   ROM_REGION( 0x200000, NEOGEO_REGION_AUDIO_DATA_1, 0 )
9981026   ROM_LOAD( "018-v1.bin", 0x000000, 0x100000, CRC(508c9ffc) SHA1(cd3a97a233a4585f8507116aba85884623cccdc4) )
r2844r2845
10131041
10141042   NEO_SFIX_128K( "018-s1.bin", CRC(6799ea0d) SHA1(ec75ef9dfdcb0b123574fc6d81ebaaadfba32fb5) )
10151043
1016   NEO_BIOS_AUDIO_128K( "018-m1.bin", BAD_DUMP CRC(0c939ee2) SHA1(57d580d3279e66b9fe66bbcc68529d3384a926ff) )
1044   /* HN62321A */
1045   NEO_BIOS_AUDIO_128K( "018-m1.bin", CRC(0c939ee2) SHA1(57d580d3279e66b9fe66bbcc68529d3384a926ff) )
10171046
10181047   ROM_REGION( 0x200000, NEOGEO_REGION_AUDIO_DATA_1, 0 )
10191048   ROM_LOAD( "018-v1.bin", 0x000000, 0x100000, CRC(508c9ffc) SHA1(cd3a97a233a4585f8507116aba85884623cccdc4) )
r2844r2845
10341063
10351064   NEO_SFIX_128K( "019-s1.bin", CRC(5fcdc0ed) SHA1(86415077e7adc3ba6153eeb4fb0c62cf36e903fa) )
10361065
1037   NEO_BIOS_AUDIO_128K( "019-m1.bin", CRC(589d7f25) SHA1(9cffbf0a607a7c7f5bc21cf6d33c5b21c3354913) )
1066   /* TC531001 */
1067   NEO_BIOS_AUDIO_128K( "019-m1.bin", CRC(d568c17d) SHA1(a2e318ed6ad1809c79f3f0853d75e0dd1a2f275c) )
10381068
10391069   ROM_REGION( 0x100000, NEOGEO_REGION_AUDIO_DATA_1, 0 )
10401070   ROM_LOAD( "019-v11.bin", 0x000000, 0x080000, CRC(0fb74872) SHA1(38c555926c77576d63472bc075210c42e9ce13a3) )
r2844r2845
11021132
11031133   NEO_SFIX_128K( "021-s1.bin", CRC(6956d778) SHA1(e3757776d60dc07d8e07c9ca61b223b14732f860) )
11041134
1105   NEO_BIOS_AUDIO_128K( "021-m1.bin", CRC(ba5e0946) SHA1(247ab832de9054e6a7a381a15f1eae44e41250b9) )
1135   /* MB832000 */
1136   NEO_BIOS_AUDIO_256K( "021-m1.bin", CRC(5a4be5e8) SHA1(552f025ce0d51c25f42e1a81cf0d08376ca5475d) )
11061137
11071138   ROM_REGION( 0x080000, NEOGEO_REGION_AUDIO_DATA_1, 0 )
11081139   ROM_LOAD( "021-v11.bin", 0x000000, 0x080000, CRC(66c1e5c4) SHA1(7e85420021d4c39c36ed75a1cec567c5610ffce0) )
r2844r2845
12581289   ROM_LOAD16_BYTE( "030-c4.bin", 0x200001, 0x100000, CRC(780d1c4e) SHA1(2e2cf9de828e3b48642dd2203637103438c62142) ) /* Plane 2,3 */
12591290ROM_END
12601291
1261ROM_START( 2020bba )
1292ROM_START( 2020bba ) /* AES VERSION */
12621293   ROM_REGION( 0x100000, NEOGEO_REGION_MAIN_CPU_CARTRIDGE, 0 )
1263   ROM_LOAD16_WORD_SWAP( "030-p1.rom", 0x000000, 0x080000, CRC(c59be3dd) SHA1(4fbd462c1c18e85a252c58b04b54fd3b82b46cb0) )
1294   ROM_LOAD16_WORD_SWAP( "030-epr.p1", 0x000000, 0x080000, CRC(c59be3dd) SHA1(4fbd462c1c18e85a252c58b04b54fd3b82b46cb0) )
1295   /* P1 on eprom, correct chip label unknown */
12641296
12651297   NEO_SFIX_128K( "030-s1.bin", CRC(7015b8fc) SHA1(8c09bc3e6c62e0f7c9557c1e10c901be325bae7f) )
12661298
r2844r2845
13061338
13071339   NEO_SFIX_128K( "031-s1.bin", CRC(4c117174) SHA1(26e52c4f628338a9aa1c159517cdf873f738fb98) )
13081340
1309   NEO_BIOS_AUDIO_128K( "031-m1.bin", CRC(3aa4e9e1) SHA1(65e53d799a0cb55b5bc55d57773e4682a72d7c2d) )
1341   /* TC531001 */
1342   NEO_BIOS_AUDIO_128K( "031-m1.bin", CRC(cb37427c) SHA1(99efe9600ebeda48331f396e3203c7588bdb7d24) )
13101343
13111344   ROM_REGION( 0x200000, NEOGEO_REGION_AUDIO_DATA_1, 0 )
13121345   ROM_LOAD( "031-v1.bin", 0x000000, 0x100000, CRC(cc78497e) SHA1(895bd647150fae9b2259ef043ed681f4c4de66ea) )
r2844r2845
13271360
13281361   NEO_SFIX_128K( "031-s1.bin", CRC(4c117174) SHA1(26e52c4f628338a9aa1c159517cdf873f738fb98) )
13291362
1330   NEO_BIOS_AUDIO_128K( "031-m1.bin", CRC(3aa4e9e1) SHA1(65e53d799a0cb55b5bc55d57773e4682a72d7c2d) )
1363   /* TC531001 */
1364   NEO_BIOS_AUDIO_128K( "031-m1.bin", CRC(cb37427c) SHA1(99efe9600ebeda48331f396e3203c7588bdb7d24) )
13311365
13321366   ROM_REGION( 0x200000, NEOGEO_REGION_AUDIO_DATA_1, 0 )
13331367   ROM_LOAD( "031-v1.bin", 0x000000, 0x100000, CRC(cc78497e) SHA1(895bd647150fae9b2259ef043ed681f4c4de66ea) )
r2844r2845
18841918
18851919ROM_START( wh1 ) /* MVS VERSION */
18861920   ROM_REGION( 0x100000, NEOGEO_REGION_MAIN_CPU_CARTRIDGE, 0 )
1887   ROM_LOAD16_WORD_SWAP( "053-p1.bin", 0x000000, 0x080000, CRC(d42e1e9a) SHA1(9d1911fe4bf6202466ec45557dd008cbf01ca9c6) )
1888   ROM_LOAD16_WORD_SWAP( "053-p2.bin", 0x080000, 0x080000, CRC(0e33e8a3) SHA1(4b7086edb504f3c30529d51ba8f453d48eba5164) )
1921   ROM_LOAD16_WORD_SWAP( "053-epr.p1", 0x000000, 0x080000, CRC(d42e1e9a) SHA1(9d1911fe4bf6202466ec45557dd008cbf01ca9c6) )
1922   ROM_LOAD16_WORD_SWAP( "053-epr.p2", 0x080000, 0x080000, CRC(0e33e8a3) SHA1(4b7086edb504f3c30529d51ba8f453d48eba5164) )
1923   /* P's on eprom, correct chip label unknown */
18891924
18901925   NEO_SFIX_128K( "053-s1.bin", CRC(8c2c2d6b) SHA1(87fa79611c6f8886dcc8766814829c669c65b40f) )
18911926
r2844r2845
19081943
19091944ROM_START( wh1h ) /* AES VERSION */
19101945   ROM_REGION( 0x100000, NEOGEO_REGION_MAIN_CPU_CARTRIDGE, 0 )
1911   ROM_LOAD16_WORD_SWAP( "053-p1.rom", 0x000000, 0x080000, CRC(95b574cb) SHA1(b7b7af6a04c3d902e7f8852897741ecaf0b1062c) )
1912   ROM_LOAD16_WORD_SWAP( "053-p2.rom", 0x080000, 0x080000, CRC(f198ed45) SHA1(24ccc091e97f63796562bb5b30df51f39bd504ef) )
1946   ROM_LOAD16_WORD_SWAP( "053-p1.bin", 0x000000, 0x080000, CRC(95b574cb) SHA1(b7b7af6a04c3d902e7f8852897741ecaf0b1062c) )
1947   ROM_LOAD16_WORD_SWAP( "053-p2.bin", 0x080000, 0x080000, CRC(f198ed45) SHA1(24ccc091e97f63796562bb5b30df51f39bd504ef) )
19131948
19141949   NEO_SFIX_128K( "053-s1.bin", CRC(8c2c2d6b) SHA1(87fa79611c6f8886dcc8766814829c669c65b40f) )
19151950
r2844r2845
23562391
23572392   NEO_SFIX_128K( "067-s1.bin", CRC(4f0cbd58) SHA1(509bad8416a057d5239439e775640b71ccf09ef7) )
23582393
2359   NEO_BIOS_AUDIO_64K( "067-m1.bin", CRC(833cdf1b) SHA1(3a92c79adbe0d37956ea46a4746d6f1cbf7d2c14) )
2394   NEO_BIOS_AUDIO_64K( "067-m1.bin", BAD_DUMP CRC(833cdf1b) SHA1(3a92c79adbe0d37956ea46a4746d6f1cbf7d2c14) )
23602395
23612396   ROM_REGION( 0x80000, NEOGEO_REGION_AUDIO_DATA_1, 0 )
23622397   ROM_LOAD( "067-v1.bin", 0x000000, 0x80000, CRC(cf23afd0) SHA1(10f87014ee10613f92b04f482f449721a6379db7) )
r2844r2845
26522687   ROM_LOAD16_BYTE( "082-c8.bin", 0xc00001, 0x100000, CRC(69a5fa37) SHA1(020e70e0e8b3c5d00a40fe97e418115a3187e50a) ) /* Plane 2,3 */
26532688ROM_END
26542689
2655ROM_START( pbobblen )
2690ROM_START( pbobblen ) /* MVS VERSION */
2691   /* This set uses CHA and PROG board from Power Spikes II. Six Power Spikes II prom's are replaced with
2692    Puzzle Bobble prom's. Confirmed on two original carts. Do other layouts also exist? Later production run set? */
2693
26562694   ROM_REGION( 0x100000, NEOGEO_REGION_MAIN_CPU_CARTRIDGE, 0 )
2657   ROM_LOAD16_WORD_SWAP( "083-p1.bin", 0x000000, 0x080000, CRC(6102ca14) SHA1(328429d11de5b327a0654ae0548da4d0025a2ae6) )
2695   ROM_LOAD16_WORD_SWAP( "d96-07.ep1", 0x000000, 0x080000, CRC(6102ca14) SHA1(328429d11de5b327a0654ae0548da4d0025a2ae6) )
26582696
2659   NEO_SFIX_128K( "083-s1.bin", CRC(9caae538) SHA1(cf2d90a7c1a42107c0bb8b9a61397634286dbe0a) )
2697   NEO_SFIX_128K( "d96-04.s1", CRC(9caae538) SHA1 (cf2d90a7c1a42107c0bb8b9a61397634286dbe0a) )
26602698
2661   NEO_BIOS_AUDIO_128K( "083-m1.bin", CRC(f424368a) SHA1(5e5bbcaeb82bed2ee17df08f005ca20ad1030723) )
2699   NEO_BIOS_AUDIO_128K( "d96-06.m1", CRC(f424368a) SHA1 (5e5bbcaeb82bed2ee17df08f005ca20ad1030723) )
26622700
26632701   ROM_REGION( 0x380000, NEOGEO_REGION_AUDIO_DATA_1, 0 )
2664   /* 0x000000-0x1fffff empty */
2665   ROM_LOAD( "083-v3.bin", 0x200000, 0x100000, CRC(0840cbc4) SHA1(1adbd7aef44fa80832f63dfb8efdf69fd7256a57) )
2666   ROM_LOAD( "083-v4.bin", 0x300000, 0x080000, CRC(0a548948) SHA1(e1e4afd17811cb60401c14fbcf0465035165f4fb) )
2702   ROM_LOAD( "068-v1.bin", 0x000000, 0x100000, CRC(2ced86df) SHA1(d6b73d1f31efbd74fb745200d4dade5f80b71541) ) /* unused */
2703   ROM_LOAD( "068-v2.bin", 0x100000, 0x100000, CRC(970851ab) SHA1(6c9b04e9cc6b92133f1154e5bdd9d38d8ef050a7) ) /* unused */
2704   ROM_LOAD( "d96-01.v3", 0x200000, 0x100000, CRC(0840cbc4) SHA1 (1adbd7aef44fa80832f63dfb8efdf69fd7256a57) )
2705   ROM_LOAD( "d96-05.v4", 0x300000, 0x080000, CRC(0a548948) SHA1 (e1e4afd17811cb60401c14fbcf0465035165f4fb) )
26672706
26682707   NO_DELTAT_REGION
26692708
2670   ROM_REGION( 0x100000, NEOGEO_REGION_SPRITES, ROMREGION_DISPOSE )
2671   ROM_LOAD16_BYTE( "083-c5.bin", 0x000000, 0x080000, CRC(e89ad494) SHA1(69c9ea415773af94ac44c48af05d55ada222b138) ) /* Plane 0,1 */
2672   ROM_LOAD16_BYTE( "083-c6.bin", 0x000001, 0x080000, CRC(4b42d7eb) SHA1(042ae50a528cea21cf07771d3915c57aa16fd5af) ) /* Plane 2,3 */
2709   ROM_REGION( 0x500000, NEOGEO_REGION_SPRITES, ROMREGION_DISPOSE )
2710   ROM_LOAD16_BYTE( "068-c1.bin", 0x000000, 0x100000, CRC(7f250f76) SHA1(5109a41adcb7859e24dc43d88842d4cc18cd3305) ) /* unused */
2711   ROM_LOAD16_BYTE( "068-c2.bin", 0x000001, 0x100000, CRC(20912873) SHA1(2df8766b531e47ffc30457e41c63b83557b4f468) ) /* unused */
2712   ROM_LOAD16_BYTE( "068-c3.bin", 0x200000, 0x100000, CRC(4b641ba1) SHA1(7a9c42a30163eda455f7bde2302402b1a5de7178) ) /* unused */
2713   ROM_LOAD16_BYTE( "068-c4.bin", 0x200001, 0x100000, CRC(35072596) SHA1(4150a21041f06514c97592bd8af686504b06e187) ) /* unused */
2714   ROM_LOAD16_BYTE( "d96-02.c5", 0x400000, 0x80000, CRC(e89ad494) SHA1 (69c9ea415773af94ac44c48af05d55ada222b138) ) /* Plane 0,1 */
2715   ROM_LOAD16_BYTE( "d96-03.c6", 0x400001, 0x80000, CRC(4b42d7eb) SHA1 (042ae50a528cea21cf07771d3915c57aa16fd5af) ) /* Plane 2,3 */
26732716ROM_END
26742717
26752718ROM_START( pbobblna )
2719   /* Does this set exist? Layout correct? */
26762720   ROM_REGION( 0x100000, NEOGEO_REGION_MAIN_CPU_CARTRIDGE, 0 )
2677   ROM_LOAD16_WORD_SWAP( "083-p1.rom", 0x000000, 0x080000, CRC(ac1e9ef3) SHA1(a2b125ee70869667431ab125bc29e768500802ad) )
2721   ROM_LOAD16_WORD_SWAP( "083-p1.bin", 0x000000, 0x080000, CRC(ac1e9ef3) SHA1(a2b125ee70869667431ab125bc29e768500802ad) )
26782722
2679   NEO_SFIX_128K( "083-s1.bin", CRC(9caae538) SHA1(cf2d90a7c1a42107c0bb8b9a61397634286dbe0a) )
2723   NEO_SFIX_128K( "d96-04.s1", CRC(9caae538) SHA1 (cf2d90a7c1a42107c0bb8b9a61397634286dbe0a) )
26802724
2681   NEO_BIOS_AUDIO_128K( "083-m1.bin", CRC(f424368a) SHA1(5e5bbcaeb82bed2ee17df08f005ca20ad1030723) )
2725   NEO_BIOS_AUDIO_128K( "d96-06.m1", CRC(f424368a) SHA1 (5e5bbcaeb82bed2ee17df08f005ca20ad1030723) )
26822726
26832727   ROM_REGION( 0x380000, NEOGEO_REGION_AUDIO_DATA_1, 0 )
26842728   /* 0x000000-0x1fffff empty */
2685   ROM_LOAD( "083-v3.bin", 0x200000, 0x100000, CRC(0840cbc4) SHA1(1adbd7aef44fa80832f63dfb8efdf69fd7256a57) )
2686   ROM_LOAD( "083-v4.bin", 0x300000, 0x080000, CRC(0a548948) SHA1(e1e4afd17811cb60401c14fbcf0465035165f4fb) )
2729   ROM_LOAD( "d96-01.v3", 0x200000, 0x100000, CRC(0840cbc4) SHA1 (1adbd7aef44fa80832f63dfb8efdf69fd7256a57) )
2730   ROM_LOAD( "d96-05.v4", 0x300000, 0x080000, CRC(0a548948) SHA1 (e1e4afd17811cb60401c14fbcf0465035165f4fb) )
26872731
26882732   NO_DELTAT_REGION
26892733
26902734   ROM_REGION( 0x100000, NEOGEO_REGION_SPRITES, ROMREGION_DISPOSE )
2691   ROM_LOAD16_BYTE( "083-c5.bin", 0x000000, 0x080000, CRC(e89ad494) SHA1(69c9ea415773af94ac44c48af05d55ada222b138) ) /* Plane 0,1 */
2692   ROM_LOAD16_BYTE( "083-c6.bin", 0x000001, 0x080000, CRC(4b42d7eb) SHA1(042ae50a528cea21cf07771d3915c57aa16fd5af) ) /* Plane 2,3 */
2735   ROM_LOAD16_BYTE( "d96-02.c5", 0x000000, 0x80000, CRC(e89ad494) SHA1 (69c9ea415773af94ac44c48af05d55ada222b138) ) /* Plane 0,1 */
2736   ROM_LOAD16_BYTE( "d96-03.c6", 0x000001, 0x80000, CRC(4b42d7eb) SHA1 (042ae50a528cea21cf07771d3915c57aa16fd5af) ) /* Plane 2,3 */
26932737ROM_END
26942738
26952739ROM_START( kof95 )
r2844r2845
27022746   NEO_BIOS_AUDIO_128K( "084-m1.bin", CRC(6f2d7429) SHA1(6f8462e4f07af82a5ca3197895d5dcbb67bdaa61) )
27032747
27042748   ROM_REGION( 0x900000, NEOGEO_REGION_AUDIO_DATA_1, 0 )
2705// ROM_LOAD( "084-v1.bin", 0x000000, 0x400000, CRC(21469561) SHA1(f35c72d31f026efc9e74bc4f198a123999ab3fc3) ) // bad old rom ?
2749   // ROM_LOAD( "084-v1.bin", 0x000000, 0x400000, CRC(21469561) SHA1(f35c72d31f026efc9e74bc4f198a123999ab3fc3) ) // bad old rom ?
27062750    ROM_LOAD( "084-v1.bin", 0x000000, 0x400000, CRC(84861b56) SHA1(1b6c91ddaed01f45eb9b7e49d9c2b9b479d50da6) )
27072751   ROM_LOAD( "084-v2.bin", 0x400000, 0x200000, CRC(b38a2803) SHA1(dbc2c8606ca09ed7ff20906b022da3cf053b2f09) )
27082752   /* 600000-7fffff empty */
r2844r2845
28102854   ROM_LOAD16_BYTE( "087-c8.bin", 0x1800001, 0x100000, CRC(a9e82717) SHA1(e39ee15d5140dbe7f06eea945cce9984a5e8b06a) ) /* Plane 2,3 */
28112855ROM_END
28122856
2813ROM_START( samsho3a )
2857ROM_START( samsho3a ) /* MVS VERSION */
28142858   ROM_REGION( 0x300000, NEOGEO_REGION_MAIN_CPU_CARTRIDGE, 0 )
28152859   ROM_LOAD16_WORD_SWAP( "087-ep1.bin", 0x000000, 0x080000, CRC(23e09bb8) SHA1(79da99fa50a639fce9d1266699b5e53c9ac55642) )
28162860   ROM_LOAD16_WORD_SWAP( "087-ep2.bin", 0x080000, 0x080000, CRC(256f5302) SHA1(e2d21b413a6059194a994b7902b2a7df98a15151) )
r2844r2845
28412885
28422886ROM_START( fswords )
28432887   ROM_REGION( 0x300000, NEOGEO_REGION_MAIN_CPU_CARTRIDGE, 0 )
2844   ROM_LOAD16_WORD_SWAP( "087-p1k.bin", 0x000000, 0x100000, CRC(c8e7c075) SHA1(7b74f2917114460d79d8f46ee24829a4c08cbf2a) )
2888   ROM_LOAD16_WORD_SWAP( "187-p1k.bin", 0x000000, 0x100000, CRC(c8e7c075) SHA1(7b74f2917114460d79d8f46ee24829a4c08cbf2a) )
28452889   ROM_LOAD16_WORD_SWAP( "087-p2.bin",  0x100000, 0x200000, CRC(9bbe27e0) SHA1(b18117102159903c8e8f4e4226e1cc91a400e816) )
28462890
28472891   NEO_SFIX_128K( "087-s1.bin", CRC(74ec7d9f) SHA1(d79c479838a7ca51735a44f91f1968ec5b3c6b91) )
r2844r2845
31013145
31023146ROM_START( aof3k )
31033147   ROM_REGION( 0x300000, NEOGEO_REGION_MAIN_CPU_CARTRIDGE, 0 )
3104   ROM_LOAD16_WORD_SWAP( "096-p1k.bin", 0x000000, 0x100000, CRC(a0780789) SHA1(83657922a9a3502653ef8cda45b15d9f935aa96a) )
3148   ROM_LOAD16_WORD_SWAP( "196-p1k.bin", 0x000000, 0x100000, CRC(a0780789) SHA1(83657922a9a3502653ef8cda45b15d9f935aa96a) )
31053149   ROM_LOAD16_WORD_SWAP( "096-p2.bin", 0x100000, 0x200000, CRC(4d5a2602) SHA1(4c26d6135d2877d9c38169662033e9d0cc24d943) )
31063150
31073151   NEO_SFIX_128K( "096-s1.bin", CRC(cc7fd344) SHA1(2c6846cf8ea61fb192ba181dbccb63594d572c0e) )
r2844r2845
32323276   ROM_REGION( 0x100000, NEOGEO_REGION_MAIN_CPU_CARTRIDGE, 0 )
32333277   ROM_LOAD16_WORD_SWAP( "206-p1.bin", 0x000000, 0x100000, CRC(c33ed21e) SHA1(bffff0d17e587e67672227e60c0ebd3f3a7193e6) )
32343278
3235   NEO_SFIX_32K( "206-s1.bin", CRC(3b52a219) SHA1(3587ab9dd1b3026c28a03349f3a13e6dfa7ff490) )
3279   NEO_SFIX_128K( "206-s1.bin", CRC(f0b68780) SHA1(3f60950b14d121a5af3e6a8155ae9832ddc6ec46) )
32363280
32373281   NEO_BIOS_AUDIO_128K( "206-m1.bin", CRC(0e22902e) SHA1(fb8466c342d4abd8bb4cad01c6ceab03f96cdad8) )
32383282
r2844r2845
32433287   NO_DELTAT_REGION
32443288
32453289   ROM_REGION( 0xa00000, NEOGEO_REGION_SPRITES, ROMREGION_DISPOSE )
3246   ROM_LOAD16_BYTE( "206-c1.bin", 0x000000, 0x400000, CRC(4bd5e70f) SHA1(2cd546aafb73e0523655f53b134955ebc273aacd) ) /* Plane 0,1 */
3247   ROM_LOAD16_BYTE( "206-c2.bin", 0x000001, 0x400000, CRC(67dbe24d) SHA1(37047c4e52525ff6d39a462222ec3e4cfc63e31c) ) /* Plane 2,3 */
3290   ROM_LOAD16_BYTE( "206-c1.bin", 0x000000, 0x400000, CRC(846e4e8e) SHA1(ba9b96340aca7fadaff0e6d484391ddb5c5e7bd4) ) /* Plane 0,1 */
3291   ROM_LOAD16_BYTE( "206-c2.bin", 0x000001, 0x400000, CRC(1cba876d) SHA1(3254ceb5a2f76c172930d9889d5d81e093e87628) ) /* Plane 2,3 */
32483292   ROM_LOAD16_BYTE( "206-c3.bin", 0x800000, 0x100000, CRC(79aa2b48) SHA1(31f94217cd35f48845c74a55256314c16fd26ed7) ) /* Plane 0,1 */
32493293   ROM_LOAD16_BYTE( "206-c4.bin", 0x800001, 0x100000, CRC(55e1314d) SHA1(fffbc9eb9000ff5b1063af1817de7ea4a267fedd) ) /* Plane 2,3 */
32503294ROM_END
r2844r2845
39123956
39133957ROM_START( lastsold )
39143958   ROM_REGION( 0x500000, NEOGEO_REGION_MAIN_CPU_CARTRIDGE, 0 )
3915   ROM_LOAD16_WORD_SWAP( "234-p1k.bin", 0x000000, 0x100000, CRC(906f3065) SHA1(25167665f1b8e82e13f7fcf4d0e3c54a925c2a58) )
3959   ROM_LOAD16_WORD_SWAP( "134-p1k.bin", 0x000000, 0x100000, CRC(906f3065) SHA1(25167665f1b8e82e13f7fcf4d0e3c54a925c2a58) )
39163960   ROM_LOAD16_WORD_SWAP( "234-p2.bin",  0x100000, 0x400000, CRC(0fdc289e) SHA1(1ff31c0b0f4f9ddbedaf4bcf927faaae81892ec7) )
39173961
39183962   NEO_SFIX_128K( "234-s1.bin", CRC(95561412) SHA1(995de272f572fd08d909d3d0af4251b9957b3640) )
r2844r2845
41344178
41354179ROM_START( rbff2k )
41364180   ROM_REGION( 0x500000, NEOGEO_REGION_MAIN_CPU_CARTRIDGE, 0 )
4137   ROM_LOAD16_WORD_SWAP( "240-p1k.bin", 0x000000, 0x100000, CRC(965edee1) SHA1(7f4b947b19ccfee32fc73e4fd89645eb313b5c77) )
4181   ROM_LOAD16_WORD_SWAP( "140-p1k.bin", 0x000000, 0x100000, CRC(965edee1) SHA1(7f4b947b19ccfee32fc73e4fd89645eb313b5c77) )
41384182   ROM_LOAD16_WORD_SWAP( "240-p2.bin", 0x100000, 0x400000, CRC(960aa88d) SHA1(3d9e785891871af90313f178dca2724633406674) )
41394183
41404184   NEO_SFIX_128K( "240-s1.bin",  CRC(da3b40de) SHA1(e6bf74e057ac6fe1f249a7547f13ba7fbc694561) )
r2844r2845
45814625ROM_END
45824626
45834627ROM_START( kof99n ) /* Original Version - Encrypted GFX */
4628   /* If chip label / ID correct: Korean Version ? */
45844629   ROM_REGION( 0x500000, NEOGEO_REGION_MAIN_CPU_CARTRIDGE, 0 )
45854630   ROM_LOAD16_WORD_SWAP( "152-p1.bin", 0x000000, 0x100000, CRC(f2c7ddfa) SHA1(d592eecc53d442c55c2f26a6a721fdf2924d2a5b) )
45864631   ROM_LOAD16_WORD_SWAP( "152-p2.bin", 0x100000, 0x400000, CRC(274ef47a) SHA1(98654b68cc85c19d4a90b46f3110f551fa2e5357) )
r2844r2845
49004945   ROM_LOAD16_BYTE( "256-c8.bin",   0x3000001, 0x800000, CRC(4d9be34c) SHA1(a737bdfa2b815aea7067e7af2636e83a9409c414) ) /* Plane 2,3 */
49014946ROM_END
49024947
4903ROM_START( mslug3n ) /* Original Version - Encrypted GFX */
4948ROM_START( mslug3h ) /* Original Version - Encrypted GFX */ /* AES VERSION */
49044949   ROM_REGION( 0x500000, NEOGEO_REGION_MAIN_CPU_CARTRIDGE, 0 )
49054950   ROM_LOAD16_WORD_SWAP( "256-ph1.bin",  0x000000, 0x100000, CRC(9c42ca85) SHA1(7a8f77a89867b889295ae9b9dfd4ba28f02d234d) )
49064951   ROM_LOAD16_WORD_SWAP( "256-ph2.bin",  0x100000, 0x400000, CRC(1f3d8ce8) SHA1(08b05a8abfb86ec09a5e758d6273acf1489961f9) )
r2844r2845
51575202   ROM_LOAD( "sfix.sfx",  0x000000, 0x20000, CRC(354029fc) SHA1(4ae4bf23b4c2acff875775d4cbff5583893ce2a1) )
51585203
51595204   /* The M1 ROM is encrypted, we load it here for reference and replace it with a decrypted version */
5160   ROM_REGION( 0x20000, NEOGEO_REGION_AUDIO_CPU_ENCRYPTED, 0 )
5161   ROM_LOAD( "265-262-m1.bin", 0x00000, 0x20000, CRC(1d5aab51) SHA1(52327c5bcad87770419057097cca20a3b187bec3) ) /* yes it really does have a strange name */
5205   ROM_REGION( 0x40000, NEOGEO_REGION_AUDIO_CPU_ENCRYPTED, 0 )
5206   ROM_LOAD( "265-262-m1.bin", 0x00000, 0x40000, CRC(a7f8119f) SHA1(71805b39b8b09c32425cf39f9de59b2f755976c2) ) /* yes it really does have a strange name */
51625207   /* Decrypted */
5163   NEO_BIOS_AUDIO_128K( "265-262_decrypted-m1.bin",   CRC(2fb0a8a5) SHA1(9878370ff8cef3e9c9f307ad64c29522dd625c8f) )
5208   NEO_BIOS_AUDIO_256K( "265-262_decrypted-m1.bin", CRC(4bcc537b) SHA1(9fcf1342bcd53d5eec12c46ee41a51bf543256c2) )
51645209
51655210   ROM_REGION( 0x1000000, NEOGEO_REGION_AUDIO_DATA_1, 0 )
5166   ROM_LOAD( "262-v1.bin", 0x000000, 0x400000, CRC(83d49ecf) SHA1(2f2c116e45397652e77fcf5d951fa5f71b639572) )
5167   ROM_LOAD( "262-v2.bin", 0x400000, 0x400000, CRC(003f1843) SHA1(bdd58837ad542548bd4053c262f558af88e3b989) )
5168   ROM_LOAD( "262-v3.bin", 0x800000, 0x400000, CRC(2ae38dbe) SHA1(4e82b7dd3b899d61907620517a5a27bdaba0725d) )
5169   ROM_LOAD( "262-v4.bin", 0xc00000, 0x400000, CRC(26ec4dd9) SHA1(8bd68d95a2d913be41a51f51e48dbe3bff5924fb) )
5211   ROM_LOAD( "262-v1-08-e0.bin", 0x000000, 0x400000, CRC(83d49ecf) SHA1(2f2c116e45397652e77fcf5d951fa5f71b639572) )
5212   ROM_LOAD( "262-v2-08-e0.bin", 0x400000, 0x400000, CRC(003f1843) SHA1(bdd58837ad542548bd4053c262f558af88e3b989) )
5213   ROM_LOAD( "262-v3-08-e0.bin", 0x800000, 0x400000, CRC(2ae38dbe) SHA1(4e82b7dd3b899d61907620517a5a27bdaba0725d) )
5214   ROM_LOAD( "262-v4-08-e0.bin", 0xc00000, 0x400000, CRC(26ec4dd9) SHA1(8bd68d95a2d913be41a51f51e48dbe3bff5924fb) )
51705215
51715216   NO_DELTAT_REGION
51725217
51735218   ROM_REGION( 0x4000000, NEOGEO_REGION_SPRITES, ROMREGION_DISPOSE )
51745219   /* Encrypted */
5175   ROM_LOAD16_BYTE( "262-c1.bin", 0x0000000, 0x800000, CRC(99cc785a) SHA1(374f0674871d0196fa274aa6c5956d7b3848d5da) ) /* Plane 0,1 */
5176   ROM_LOAD16_BYTE( "262-c2.bin", 0x0000001, 0x800000, CRC(50368cbf) SHA1(5d9e206e98e0b0c7735b72ea46b45058fdec2352) ) /* Plane 2,3 */
5177   ROM_LOAD16_BYTE( "262-c3.bin", 0x1000000, 0x800000, CRC(fb14ff87) SHA1(445a8db2fc69eff54a252700f2d3a89244c58e75) ) /* Plane 0,1 */
5178   ROM_LOAD16_BYTE( "262-c4.bin", 0x1000001, 0x800000, CRC(4397faf8) SHA1(6752b394f6647502a649a3e62bd3442f936b733e) ) /* Plane 2,3 */
5179   ROM_LOAD16_BYTE( "262-c5.bin", 0x2000000, 0x800000, CRC(91f24be4) SHA1(88190c41f7d4a0f4b1982149fc9acfc640af498d) ) /* Plane 0,1 */
5180   ROM_LOAD16_BYTE( "262-c6.bin", 0x2000001, 0x800000, CRC(a31e4403) SHA1(5cd1a14703aa58810e2377dfb7353c61e9dc9c1f) ) /* Plane 2,3 */
5181   ROM_LOAD16_BYTE( "262-c7.bin", 0x3000000, 0x800000, CRC(54d9d1ec) SHA1(80c3a8ec39130dd5d3da561f287709da6b8abcf4) ) /* Plane 0,1 */
5182   ROM_LOAD16_BYTE( "262-c8.bin", 0x3000001, 0x800000, CRC(59289a6b) SHA1(ddfce7c85b2a144975db5bb14b4b51aaf881880e) ) /* Plane 2,3 */
5220   ROM_LOAD16_BYTE( "262-c1-08-e0.bin", 0x0000000, 0x800000, CRC(99cc785a) SHA1(374f0674871d0196fa274aa6c5956d7b3848d5da) ) /* Plane 0,1 */
5221   ROM_LOAD16_BYTE( "262-c2-08-e0.bin", 0x0000001, 0x800000, CRC(50368cbf) SHA1(5d9e206e98e0b0c7735b72ea46b45058fdec2352) ) /* Plane 2,3 */
5222   ROM_LOAD16_BYTE( "262-c3-08-e0.bin", 0x1000000, 0x800000, CRC(fb14ff87) SHA1(445a8db2fc69eff54a252700f2d3a89244c58e75) ) /* Plane 0,1 */
5223   ROM_LOAD16_BYTE( "262-c4-08-e0.bin", 0x1000001, 0x800000, CRC(4397faf8) SHA1(6752b394f6647502a649a3e62bd3442f936b733e) ) /* Plane 2,3 */
5224   ROM_LOAD16_BYTE( "262-c5-08-e0.bin", 0x2000000, 0x800000, CRC(91f24be4) SHA1(88190c41f7d4a0f4b1982149fc9acfc640af498d) ) /* Plane 0,1 */
5225   ROM_LOAD16_BYTE( "262-c6-08-e0.bin", 0x2000001, 0x800000, CRC(a31e4403) SHA1(5cd1a14703aa58810e2377dfb7353c61e9dc9c1f) ) /* Plane 2,3 */
5226   ROM_LOAD16_BYTE( "262-c7-08-e0.bin", 0x3000000, 0x800000, CRC(54d9d1ec) SHA1(80c3a8ec39130dd5d3da561f287709da6b8abcf4) ) /* Plane 0,1 */
5227   ROM_LOAD16_BYTE( "262-c8-08-e0.bin", 0x3000001, 0x800000, CRC(59289a6b) SHA1(ddfce7c85b2a144975db5bb14b4b51aaf881880e) ) /* Plane 2,3 */
51835228ROM_END
51845229
5185ROM_START( kof2001h )
5230ROM_START( kof2001h ) /* AES VERSION */
51865231   ROM_REGION( 0x500000, NEOGEO_REGION_MAIN_CPU_CARTRIDGE, 0 )
51875232   ROM_LOAD16_WORD_SWAP( "262-pg1.bin", 0x000000, 0x100000, CRC(2af7e741) SHA1(e41282d73ed6d521da056f1a16573bb61bfa3826) )
51885233   ROM_LOAD16_WORD_SWAP( "262-pg2.bin", 0x100000, 0x400000, CRC(91eea062) SHA1(82bae42bbeedb9f3aa0c7c0b0a7a69be499cf98f) )
r2844r2845
51965241   ROM_LOAD( "sfix.sfx",  0x000000, 0x20000, CRC(354029fc) SHA1(4ae4bf23b4c2acff875775d4cbff5583893ce2a1) )
51975242
51985243   /* The M1 ROM is encrypted, we load it here for reference and replace it with a decrypted version */
5199   ROM_REGION( 0x20000, NEOGEO_REGION_AUDIO_CPU_ENCRYPTED, 0 )
5200   ROM_LOAD( "265-262-m1.bin", 0x00000, 0x20000, CRC(1d5aab51) SHA1(52327c5bcad87770419057097cca20a3b187bec3) ) /* yes it really does have a strange name */
5244   ROM_REGION( 0x40000, NEOGEO_REGION_AUDIO_CPU_ENCRYPTED, 0 )
5245   ROM_LOAD( "265-262-m1.bin", 0x00000, 0x40000, CRC(a7f8119f) SHA1(71805b39b8b09c32425cf39f9de59b2f755976c2) ) /* yes it really does have a strange name */
52015246   /* Decrypted */
5202   NEO_BIOS_AUDIO_128K( "265-262_decrypted-m1.bin", CRC(2fb0a8a5) SHA1(9878370ff8cef3e9c9f307ad64c29522dd625c8f) )
5247   NEO_BIOS_AUDIO_256K( "265-262_decrypted-m1.bin", CRC(4bcc537b) SHA1(9fcf1342bcd53d5eec12c46ee41a51bf543256c2) )
52035248
52045249   ROM_REGION( 0x1000000, NEOGEO_REGION_AUDIO_DATA_1, 0 )
5205   ROM_LOAD( "262-v1.bin", 0x000000, 0x400000, CRC(83d49ecf) SHA1(2f2c116e45397652e77fcf5d951fa5f71b639572) )
5206   ROM_LOAD( "262-v2.bin", 0x400000, 0x400000, CRC(003f1843) SHA1(bdd58837ad542548bd4053c262f558af88e3b989) )
5207   ROM_LOAD( "262-v3.bin", 0x800000, 0x400000, CRC(2ae38dbe) SHA1(4e82b7dd3b899d61907620517a5a27bdaba0725d) )
5208   ROM_LOAD( "262-v4.bin", 0xc00000, 0x400000, CRC(26ec4dd9) SHA1(8bd68d95a2d913be41a51f51e48dbe3bff5924fb) )
5250   ROM_LOAD( "262-v1-08-e0.bin", 0x000000, 0x400000, CRC(83d49ecf) SHA1(2f2c116e45397652e77fcf5d951fa5f71b639572) )
5251   ROM_LOAD( "262-v2-08-e0.bin", 0x400000, 0x400000, CRC(003f1843) SHA1(bdd58837ad542548bd4053c262f558af88e3b989) )
5252   ROM_LOAD( "262-v3-08-e0.bin", 0x800000, 0x400000, CRC(2ae38dbe) SHA1(4e82b7dd3b899d61907620517a5a27bdaba0725d) )
5253   ROM_LOAD( "262-v4-08-e0.bin", 0xc00000, 0x400000, CRC(26ec4dd9) SHA1(8bd68d95a2d913be41a51f51e48dbe3bff5924fb) )
52095254
52105255   NO_DELTAT_REGION
52115256
52125257   ROM_REGION( 0x4000000, NEOGEO_REGION_SPRITES, ROMREGION_DISPOSE )
52135258   /* Encrypted */
5214   ROM_LOAD16_BYTE( "262-c1.bin", 0x0000000, 0x800000, CRC(99cc785a) SHA1(374f0674871d0196fa274aa6c5956d7b3848d5da) ) /* Plane 0,1 */
5215   ROM_LOAD16_BYTE( "262-c2.bin", 0x0000001, 0x800000, CRC(50368cbf) SHA1(5d9e206e98e0b0c7735b72ea46b45058fdec2352) ) /* Plane 2,3 */
5216   ROM_LOAD16_BYTE( "262-c3.bin", 0x1000000, 0x800000, CRC(fb14ff87) SHA1(445a8db2fc69eff54a252700f2d3a89244c58e75) ) /* Plane 0,1 */
5217   ROM_LOAD16_BYTE( "262-c4.bin", 0x1000001, 0x800000, CRC(4397faf8) SHA1(6752b394f6647502a649a3e62bd3442f936b733e) ) /* Plane 2,3 */
5218   ROM_LOAD16_BYTE( "262-c5.bin", 0x2000000, 0x800000, CRC(91f24be4) SHA1(88190c41f7d4a0f4b1982149fc9acfc640af498d) ) /* Plane 0,1 */
5219   ROM_LOAD16_BYTE( "262-c6.bin", 0x2000001, 0x800000, CRC(a31e4403) SHA1(5cd1a14703aa58810e2377dfb7353c61e9dc9c1f) ) /* Plane 2,3 */
5220   ROM_LOAD16_BYTE( "262-c7.bin", 0x3000000, 0x800000, CRC(54d9d1ec) SHA1(80c3a8ec39130dd5d3da561f287709da6b8abcf4) ) /* Plane 0,1 */
5221   ROM_LOAD16_BYTE( "262-c8.bin", 0x3000001, 0x800000, CRC(59289a6b) SHA1(ddfce7c85b2a144975db5bb14b4b51aaf881880e) ) /* Plane 2,3 */
5259   ROM_LOAD16_BYTE( "262-c1-08-e0.bin", 0x0000000, 0x800000, CRC(99cc785a) SHA1(374f0674871d0196fa274aa6c5956d7b3848d5da) ) /* Plane 0,1 */
5260   ROM_LOAD16_BYTE( "262-c2-08-e0.bin", 0x0000001, 0x800000, CRC(50368cbf) SHA1(5d9e206e98e0b0c7735b72ea46b45058fdec2352) ) /* Plane 2,3 */
5261   ROM_LOAD16_BYTE( "262-c3-08-e0.bin", 0x1000000, 0x800000, CRC(fb14ff87) SHA1(445a8db2fc69eff54a252700f2d3a89244c58e75) ) /* Plane 0,1 */
5262   ROM_LOAD16_BYTE( "262-c4-08-e0.bin", 0x1000001, 0x800000, CRC(4397faf8) SHA1(6752b394f6647502a649a3e62bd3442f936b733e) ) /* Plane 2,3 */
5263   ROM_LOAD16_BYTE( "262-c5-08-e0.bin", 0x2000000, 0x800000, CRC(91f24be4) SHA1(88190c41f7d4a0f4b1982149fc9acfc640af498d) ) /* Plane 0,1 */
5264   ROM_LOAD16_BYTE( "262-c6-08-e0.bin", 0x2000001, 0x800000, CRC(a31e4403) SHA1(5cd1a14703aa58810e2377dfb7353c61e9dc9c1f) ) /* Plane 2,3 */
5265   ROM_LOAD16_BYTE( "262-c7-08-e0.bin", 0x3000000, 0x800000, CRC(54d9d1ec) SHA1(80c3a8ec39130dd5d3da561f287709da6b8abcf4) ) /* Plane 0,1 */
5266   ROM_LOAD16_BYTE( "262-c8-08-e0.bin", 0x3000001, 0x800000, CRC(59289a6b) SHA1(ddfce7c85b2a144975db5bb14b4b51aaf881880e) ) /* Plane 2,3 */
52225267ROM_END
52235268
52245269ROM_START( mslug4 ) /* Original Version - Encrypted GFX */ /* MVS VERSION */
r2844r2845
62766321   ROM_Y_ZOOM
62776322
62786323   /* The Encrypted Boards do _not_ have an s1 rom, data for it comes from the Cx ROMs */
6279   ROM_REGION( 0x80000, NEOGEO_REGION_FIXED_LAYER_CARTRIDGE, 0 ) /* larger char set */
6280   ROM_FILL( 0x000000, 0x80000, 0 )
6324   ROM_REGION( 0x20000, NEOGEO_REGION_FIXED_LAYER_CARTRIDGE, 0 )
6325   ROM_FILL( 0x000000, 0x20000, 0 )
62816326   ROM_REGION( 0x20000, NEOGEO_REGION_FIXED_LAYER_BIOS, 0 )
62826327   ROM_LOAD( "sfix.sfx", 0x000000, 0x20000, CRC(354029fc) SHA1(4ae4bf23b4c2acff875775d4cbff5583893ce2a1) )
62836328
r2844r2845
63146359   ROM_Y_ZOOM
63156360
63166361   /* The Encrypted Boards do _not_ have an s1 rom, data for it comes from the Cx ROMs */
6317   ROM_REGION( 0x80000, NEOGEO_REGION_FIXED_LAYER_CARTRIDGE, 0 ) /* larger char set */
6318   ROM_FILL( 0x000000, 0x80000, 0 )
6362   ROM_REGION( 0x20000, NEOGEO_REGION_FIXED_LAYER_CARTRIDGE, 0 )
6363   ROM_FILL( 0x000000, 0x20000, 0 )
63196364   ROM_REGION( 0x20000, NEOGEO_REGION_FIXED_LAYER_BIOS, 0 )
63206365   ROM_LOAD( "sfix.sfx", 0x000000, 0x20000, CRC(354029fc) SHA1(4ae4bf23b4c2acff875775d4cbff5583893ce2a1) )
63216366
r2844r2845
63526397   ROM_Y_ZOOM
63536398
63546399   /* The Encrypted Boards do _not_ have an s1 rom, data for it comes from the Cx ROMs */
6355   ROM_REGION( 0x80000, NEOGEO_REGION_FIXED_LAYER_CARTRIDGE, 0 ) /* larger char set */
6356   ROM_FILL( 0x000000, 0x80000, 0 )
6400   ROM_REGION( 0x20000, NEOGEO_REGION_FIXED_LAYER_CARTRIDGE, 0 )
6401   ROM_FILL( 0x000000, 0x20000, 0 )
63576402   ROM_REGION( 0x20000, NEOGEO_REGION_FIXED_LAYER_BIOS, 0 )
63586403   ROM_LOAD( "sfix.sfx", 0x000000, 0x20000, CRC(354029fc) SHA1(4ae4bf23b4c2acff875775d4cbff5583893ce2a1) )
63596404
r2844r2845
64826527
64836528   /* sound roms are identical to kof2001 */
64846529   ROM_REGION( 0x1000000, NEOGEO_REGION_AUDIO_DATA_1, 0 )
6485   ROM_LOAD( "262-v1.bin", 0x000000, 0x400000, CRC(83d49ecf) SHA1(2f2c116e45397652e77fcf5d951fa5f71b639572) )
6486   ROM_LOAD( "262-v2.bin", 0x400000, 0x400000, CRC(003f1843) SHA1(bdd58837ad542548bd4053c262f558af88e3b989) )
6487   ROM_LOAD( "262-v3.bin", 0x800000, 0x400000, CRC(2ae38dbe) SHA1(4e82b7dd3b899d61907620517a5a27bdaba0725d) )
6488   ROM_LOAD( "262-v4.bin", 0xc00000, 0x400000, CRC(26ec4dd9) SHA1(8bd68d95a2d913be41a51f51e48dbe3bff5924fb) )
6530   ROM_LOAD( "262-v1-08-e0.bin", 0x000000, 0x400000, CRC(83d49ecf) SHA1(2f2c116e45397652e77fcf5d951fa5f71b639572) )
6531   ROM_LOAD( "262-v2-08-e0.bin", 0x400000, 0x400000, CRC(003f1843) SHA1(bdd58837ad542548bd4053c262f558af88e3b989) )
6532   ROM_LOAD( "262-v3-08-e0.bin", 0x800000, 0x400000, CRC(2ae38dbe) SHA1(4e82b7dd3b899d61907620517a5a27bdaba0725d) )
6533   ROM_LOAD( "262-v4-08-e0.bin", 0xc00000, 0x400000, CRC(26ec4dd9) SHA1(8bd68d95a2d913be41a51f51e48dbe3bff5924fb) )
64896534
64906535   NO_DELTAT_REGION
64916536
r2844r2845
65176562
65186563   /* sound roms are identical to kof2001 */
65196564   ROM_REGION( 0x1000000, NEOGEO_REGION_AUDIO_DATA_1, 0 )
6520   ROM_LOAD( "262-v1.bin", 0x000000, 0x400000, CRC(83d49ecf) SHA1(2f2c116e45397652e77fcf5d951fa5f71b639572) )
6521   ROM_LOAD( "262-v2.bin", 0x400000, 0x400000, CRC(003f1843) SHA1(bdd58837ad542548bd4053c262f558af88e3b989) )
6522   ROM_LOAD( "262-v3.bin", 0x800000, 0x400000, CRC(2ae38dbe) SHA1(4e82b7dd3b899d61907620517a5a27bdaba0725d) )
6523   ROM_LOAD( "262-v4.bin", 0xc00000, 0x400000, CRC(26ec4dd9) SHA1(8bd68d95a2d913be41a51f51e48dbe3bff5924fb) )
6565   ROM_LOAD( "262-v1-08-e0.bin", 0x000000, 0x400000, CRC(83d49ecf) SHA1(2f2c116e45397652e77fcf5d951fa5f71b639572) )
6566   ROM_LOAD( "262-v2-08-e0.bin", 0x400000, 0x400000, CRC(003f1843) SHA1(bdd58837ad542548bd4053c262f558af88e3b989) )
6567   ROM_LOAD( "262-v3-08-e0.bin", 0x800000, 0x400000, CRC(2ae38dbe) SHA1(4e82b7dd3b899d61907620517a5a27bdaba0725d) )
6568   ROM_LOAD( "262-v4-08-e0.bin", 0xc00000, 0x400000, CRC(26ec4dd9) SHA1(8bd68d95a2d913be41a51f51e48dbe3bff5924fb) )
65246569
65256570   NO_DELTAT_REGION
65266571
r2844r2845
65536598
65546599   /* Original set has 2x64 mbit sound roms */
65556600   ROM_REGION( 0x1000000, NEOGEO_REGION_AUDIO_DATA_1, 0 )
6556   ROM_LOAD( "262-v1.bin", 0x000000, 0x400000, CRC(83d49ecf) SHA1(2f2c116e45397652e77fcf5d951fa5f71b639572) )
6557   ROM_LOAD( "262-v2.bin", 0x400000, 0x400000, CRC(003f1843) SHA1(bdd58837ad542548bd4053c262f558af88e3b989) )
6558   ROM_LOAD( "262-v3.bin", 0x800000, 0x400000, CRC(2ae38dbe) SHA1(4e82b7dd3b899d61907620517a5a27bdaba0725d) )
6559   ROM_LOAD( "262-v4.bin", 0xc00000, 0x400000, CRC(26ec4dd9) SHA1(8bd68d95a2d913be41a51f51e48dbe3bff5924fb) )
6601   ROM_LOAD( "262-v1-08-e0.bin", 0x000000, 0x400000, CRC(83d49ecf) SHA1(2f2c116e45397652e77fcf5d951fa5f71b639572) )
6602   ROM_LOAD( "262-v2-08-e0.bin", 0x400000, 0x400000, CRC(003f1843) SHA1(bdd58837ad542548bd4053c262f558af88e3b989) )
6603   ROM_LOAD( "262-v3-08-e0.bin", 0x800000, 0x400000, CRC(2ae38dbe) SHA1(4e82b7dd3b899d61907620517a5a27bdaba0725d) )
6604   ROM_LOAD( "262-v4-08-e0.bin", 0xc00000, 0x400000, CRC(26ec4dd9) SHA1(8bd68d95a2d913be41a51f51e48dbe3bff5924fb) )
65606605
65616606   NO_DELTAT_REGION
65626607
r2844r2845
68936938   DRIVER_INIT_CALL(neogeo);
68946939}
68956940
6896static DRIVER_INIT( mslug3n )
6941static DRIVER_INIT( mslug3h )
68976942{
68986943   neogeo_fixed_layer_bank_type = 1;
68996944   kof99_neogeo_gfx_decrypt(0xad);
r2844r2845
74077452GAME( 1999, garoup,   garou,    neogeo,   neogeo,   neogeo,   ROT0, "SNK", "Garou - Mark of the Wolves (prototype)", 0 )
74087453GAME( 1999, garoubl,  garou,    neogeo,   neogeo,   garoubl,  ROT0, "bootleg", "Garou - Mark of the Wolves (bootleg)", 0 ) /* Bootleg of garoup */
74097454GAME( 2000, mslug3,   neogeo,   neogeo,   neogeo,   mslug3,   ROT0, "SNK", "Metal Slug 3" , 0 ) /* Encrypted Code & GFX */
7410GAME( 2000, mslug3n,  mslug3,   neogeo,   neogeo,   mslug3n,  ROT0, "SNK", "Metal Slug 3 (not encrypted)" , 0 ) /* Encrypted GFX */
7455GAME( 2000, mslug3h,  mslug3,   neogeo,   neogeo,   mslug3h,  ROT0, "SNK", "Metal Slug 3 (not encrypted)" , 0 ) /* Encrypted GFX */
74117456GAME( 2000, mslug3b6, mslug3,   neogeo,   neogeo,   mslug3b6, ROT0, "bootleg", "Metal Slug 6 (Metal Slug 3 bootleg)", 0 ) /* real Metal Slug 6 is an Atomiswave HW game, see atomswav.c ;-) */
74127457GAME( 2000, kof2000,  neogeo,   neogeo,   neogeo,   kof2000,  ROT0, "SNK", "The King of Fighters 2000" , 0 ) /* Encrypted Code & GFX */
74137458GAME( 2000, kof2000n, kof2000,  neogeo,   neogeo,   kof2000n, ROT0, "SNK", "The King of Fighters 2000 (not encrypted)" , 0 ) /* Encrypted GFX */
src/mame/drivers/djmain.c
r2844r2845
260260
261261static READ32_HANDLER( inp1_r )
262262{
263   UINT32 result = (input_port_read_indexed(machine, 5)<<24) | (input_port_read_indexed(machine, 2)<<16) | (input_port_read_indexed(machine, 1)<<8) | input_port_read_indexed(machine, 0);
263   UINT32 result = (input_port_read(machine, "DSW3")<<24) | (input_port_read(machine, "IN2")<<16) | (input_port_read(machine, "IN1")<<8) | input_port_read(machine, "IN0");
264264
265265   return result;
266266}
267267
268268static READ32_HANDLER( inp2_r )
269269{
270   return (input_port_read_indexed(machine, 3)<<24) | (input_port_read_indexed(machine, 4)<<16) | 0xffff;
270   return (input_port_read(machine, "DSW1")<<24) | (input_port_read(machine, "DSW2")<<16) | 0xffff;
271271}
272272
273273static READ32_HANDLER( turntable_r )
274274{
275275   UINT32 result = 0;
276   static const char *ttnames[] = { "TT1", "TT2" };
276277
277278   if (ACCESSING_BITS_8_15)
278279   {
279280      UINT8 pos;
280281      int delta;
281282
282      pos = input_port_read_indexed(machine, 6 + turntable_select);
283      pos = input_port_read(machine, ttnames[turntable_select]);
283284      delta = pos - turntable_last_pos[turntable_select];
284285      if (delta < -128)
285286         delta += 256;
r2844r2845
501502 *************************************/
502503
503504#define BEATMANIA_INPUT \
504   PORT_START      /* IN 0 */ \
505   PORT_START_TAG("IN0")      /* IN 0 */ \
505506   PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(1) \
506507   PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(1) \
507508   PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_PLAYER(1) \
r2844r2845
511512   PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(2) \
512513   PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(2) \
513514 \
514   PORT_START      /* IN 1 */ \
515   PORT_START_TAG("IN1")      /* IN 1 */ \
515516   PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_PLAYER(2) \
516517   PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON4 ) PORT_PLAYER(2) \
517518   PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_BUTTON5 ) PORT_PLAYER(2) \
r2844r2845
521522   PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_START3 ) PORT_NAME("Effect")   /* EFFECT */ \
522523   PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_COIN1 ) \
523524 \
524   PORT_START      /* IN 2 */ \
525   PORT_START_TAG("IN2")      /* IN 2 */ \
525526   PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_NAME(DEF_STR( Test )) PORT_CODE(KEYCODE_F2)   /* TEST SW */ \
526527   PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_SERVICE1 ) PORT_NAME("Service")   /* SERVICE */ \
527528   PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_SERVICE2 ) PORT_NAME("Reset")      /* RESET SW */ \
528529   PORT_BIT( 0xf8, IP_ACTIVE_LOW, IPT_UNKNOWN )
529530
530531#define BEATMANIA_TURNTABLE \
531   PORT_START      /* IN 6: turn table 1P */ \
532   PORT_START_TAG("TT1")      /* IN 6: turn table 1P */ \
532533   PORT_BIT( 0xff, 0x00, IPT_DIAL ) PORT_SENSITIVITY(30) PORT_KEYDELTA(15) PORT_PLAYER(1) \
533534 \
534   PORT_START      /* IN 7: turn table 2P */ \
535   PORT_START_TAG("TT2")      /* IN 7: turn table 2P */ \
535536   PORT_BIT( 0xff, 0x00, IPT_DIAL ) PORT_SENSITIVITY(30) PORT_KEYDELTA(15) PORT_PLAYER(2)
536537
537538#define BEATMANIA_DSW1(base,mask) \
538   PORT_START      /* IN 3 */ \
539   PORT_START_TAG("DSW1")      /* IN 3 */ \
539540   PORT_DIPNAME( 0xff, (0xff & mask) | base, DEF_STR( Coinage ) ) \
540541   PORT_DIPSETTING(    (0xe0 & mask) | base, "1P 8C / 2P 16C / Continue 8C" ) \
541542   PORT_DIPSETTING(    (0xe1 & mask) | base, "1P 8C / 2P 16C / Continue 7C" ) \
r2844r2845
572573   PORT_DIPSETTING(    (0x00 & mask) | base, DEF_STR( Free_Play ) )
573574
574575#define BM1STMIX_DSW1 \
575   PORT_START      /* IN 3 */ \
576   PORT_START_TAG("DSW1")      /* IN 3 */ \
576577   PORT_BIT( 0xe0, IP_ACTIVE_LOW, IPT_UNKNOWN ) \
577578   PORT_DIPNAME( 0x1f, 0x1f, DEF_STR( Coinage ) ) \
578579   PORT_DIPSETTING(    0x1e, "1P 3C / 2P 6C / Continue 3C" ) \
r2844r2845
595596   PORT_DIPSETTING(    0x00, DEF_STR( Free_Play ) )
596597
597598#define BEATMANIA_DSW2 \
598   PORT_START      /* IN 4 */ \
599   PORT_START_TAG("DSW2")      /* IN 4 */ \
599600   PORT_DIPNAME( 0x80, 0x80, "Score Display" ) \
600601   PORT_DIPSETTING(    0x00, DEF_STR( Off ) ) \
601602   PORT_DIPSETTING(    0x80, DEF_STR( On ) ) \
r2844r2845
619620   PORT_DIPSETTING(    0x00, "Level 3" )
620621
621622#define BEATMANIA_DSW2_OLD_LEVEL \
622   PORT_START      /* IN 4 */ \
623   PORT_START_TAG("DSW2")      /* IN 4 */ \
623624   PORT_DIPNAME( 0x80, 0x80, "Score Display" ) \
624625   PORT_DIPSETTING(    0x00, DEF_STR( Off ) ) \
625626   PORT_DIPSETTING(    0x80, DEF_STR( On ) ) \
r2844r2845
648649   PORT_DIPSETTING(    0x00, "Level 15" )
649650
650651#define BM1STMIX_DSW2 \
651   PORT_START      /* IN 4 */ \
652   PORT_START_TAG("DSW2")      /* IN 4 */ \
652653   PORT_DIPNAME( 0x80, 0x80, "Enable Expert Mode" ) \
653654   PORT_DIPSETTING(    0x00, DEF_STR( No ) ) \
654655   PORT_DIPSETTING(    0x80, DEF_STR( Yes ) ) \
r2844r2845
660661   PORT_BIT( 0x1f, IP_ACTIVE_LOW, IPT_UNKNOWN ) \
661662
662663#define BMCOMPMX_DSW2 \
663   PORT_START      /* IN 4 */ \
664   PORT_START_TAG("DSW2")      /* IN 4 */ \
664665   PORT_DIPNAME( 0x80, 0x80, "Score Display" ) \
665666   PORT_DIPSETTING(    0x00, DEF_STR( Off ) ) \
666667   PORT_DIPSETTING(    0x80, DEF_STR( On ) ) \
r2844r2845
689690   PORT_DIPSETTING(    0x00, "Level 15" )
690691
691692#define BEATMANIA_DSW3 \
692   PORT_START      /* IN 5 */ \
693   PORT_START_TAG("DSW3")      /* IN 5 */ \
693694   PORT_BIT( 0xc0, IP_ACTIVE_LOW, IPT_UNKNOWN ) \
694695   PORT_DIPNAME( 0x20, 0x20, "Event Mode" ) \
695696   PORT_DIPSETTING(    0x20, DEF_STR( Off ) ) \
r2844r2845
704705   PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN )      /* DSW 3-6 */
705706
706707#define BM1STMIX_DSW3 \
707   PORT_START      /* IN 5 */ \
708   PORT_START_TAG("DSW3")      /* IN 5 */ \
708709   PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNKNOWN )
709710
710711#define BM2NDMIX_DSW3 \
711   PORT_START      /* IN 5 */ \
712   PORT_START_TAG("DSW3")      /* IN 5 */ \
712713   PORT_BIT( 0xc0, IP_ACTIVE_LOW, IPT_UNKNOWN ) \
713714   PORT_DIPNAME( 0x39, 0x39, "Event Mode / Free Hidden Songs" ) \
714715   PORT_DIPSETTING(    0x39, "Off / Off" ) \
r2844r2845
721722   PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN )      /* DSW 3-5 */ \
722723
723724#define BMCOMPMX_DSW3 \
724   PORT_START      /* IN 5 */ \
725   PORT_START_TAG("DSW3")      /* IN 5 */ \
725726   PORT_BIT( 0xc0, IP_ACTIVE_LOW, IPT_UNKNOWN ) \
726727   PORT_DIPNAME( 0x20, 0x20, "Event Mode" ) \
727728   PORT_DIPSETTING(    0x20, DEF_STR( Off ) ) \
r2844r2845
738739   PORT_DIPSETTING(    0x00, DEF_STR( On ) )
739740
740741#define BM4THMIX_DSW3 \
741   PORT_START      /* IN 5 */ \
742   PORT_START_TAG("DSW3")      /* IN 5 */ \
742743   PORT_BIT( 0xc0, IP_ACTIVE_LOW, IPT_UNKNOWN ) \
743744   PORT_DIPNAME( 0x20, 0x20, "Event Mode" ) \
744745   PORT_DIPSETTING(    0x20, DEF_STR( Off ) ) \
r2844r2845
755756   PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN )      /* DSW 3-6 */
756757
757758#define HMCOMPM2_DSW3 \
758   PORT_START      /* IN 5 */ \
759   PORT_START_TAG("DSW3")      /* IN 5 */ \
759760   PORT_BIT( 0xc0, IP_ACTIVE_LOW, IPT_UNKNOWN ) \
760761   PORT_DIPNAME( 0x20, 0x20, "Event Mode" ) \
761762   PORT_DIPSETTING(    0x20, DEF_STR( Off ) ) \
r2844r2845
772773   PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN )      /* DSW 3-6 */
773774
774775#define BMDCT_DSW3 \
775   PORT_START      /* IN 5 */ \
776   PORT_START_TAG("DSW3")      /* IN 5 */ \
776777   PORT_BIT( 0xc0, IP_ACTIVE_LOW, IPT_UNKNOWN ) \
777778   PORT_DIPNAME( 0x20, 0x20, "Event Mode" ) \
778779   PORT_DIPSETTING(    0x20, DEF_STR( Off ) ) \
r2844r2845
853854
854855
855856#define POPN_INPUT \
856   PORT_START      /* IN 0 */ \
857   PORT_START_TAG("IN0")      /* IN 0 */ \
857858   PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(1) \
858859   PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(1) \
859860   PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_PLAYER(1) \
r2844r2845
863864   PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_BUTTON6 ) PORT_PLAYER(1) \
864865   PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_BUTTON7 ) PORT_PLAYER(1) \
865866 \
866   PORT_START      /* IN 1 */ \
867   PORT_START_TAG("IN1")      /* IN 1 */ \
867868   PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON8 ) PORT_PLAYER(1) \
868869   PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON9 ) PORT_PLAYER(1) \
869870   PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN ) \
r2844r2845
873874   PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN ) \
874875   PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_COIN1 ) \
875876 \
876   PORT_START      /* IN 2 */ \
877   PORT_START_TAG("IN2")      /* IN 2 */ \
877878   PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_NAME(DEF_STR( Test )) PORT_CODE(KEYCODE_F2)   /* TEST SW */ \
878879   PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_SERVICE1 )   /* SERVICE */ \
879880   PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_SERVICE2 )   /* RESET SW */ \
880881   PORT_BIT( 0xf8, IP_ACTIVE_LOW, IPT_UNKNOWN )
881882
882883#define POPN_DSW1 \
883   PORT_START      /* IN 3 */ \
884   PORT_START_TAG("DSW1")      /* IN 3 */ \
884885   PORT_DIPNAME( 0xc0, 0xc0, "Jamming Gauge Blocks" ) \
885886   PORT_DIPSETTING(    0x80, "5" ) \
886887   PORT_DIPSETTING(    0xc0, "6" ) \
r2844r2845
924925   PORT_DIPSETTING(    0x00, DEF_STR( Free_Play ) )
925926
926927#define POPN1_DSW1 \
927   PORT_START      /* IN 3 */ \
928   PORT_START_TAG("DSW1")      /* IN 3 */ \
928929   PORT_DIPNAME( 0xc0, 0xc0, "Jamming Gauge Blocks" ) \
929930   PORT_DIPSETTING(    0x80, "5" ) \
930931   PORT_DIPSETTING(    0xc0, "6" ) \
r2844r2845
950951   PORT_DIPSETTING(    0x00, DEF_STR( Free_Play ) )
951952
952953#define POPN_DSW2 \
953   PORT_START      /* IN 4 */ \
954   PORT_START_TAG("DSW2")      /* IN 4 */ \
954955   PORT_DIPNAME( 0x80, 0x80, "Score Display" ) \
955956   PORT_DIPSETTING(    0x00, DEF_STR( Off ) ) \
956957   PORT_DIPSETTING(    0x80, DEF_STR( On ) ) \
r2844r2845
972973   PORT_DIPSETTING(    0x00, "3" )
973974
974975#define POPN1_DSW2 \
975   PORT_START      /* IN 4 */ \
976   PORT_START_TAG("DSW2")      /* IN 4 */ \
976977   PORT_DIPNAME( 0x80, 0x80, "Score Display" ) \
977978   PORT_DIPSETTING(    0x00, DEF_STR( Off ) ) \
978979   PORT_DIPSETTING(    0x80, DEF_STR( On ) ) \
r2844r2845
996997   PORT_DIPSETTING(    0x00, "3" )
997998
998999#define POPN_DSW3 \
999   PORT_START      /* IN 5 */ \
1000   PORT_START_TAG("DSW3")      /* IN 5 */ \
10001001   PORT_BIT( 0xf7, IP_ACTIVE_LOW, IPT_UNKNOWN ) \
10011002   PORT_DIPNAME( 0x08, 0x08, "All Song Mode" )      /* DSW 3-3 */ \
10021003   PORT_DIPSETTING(    0x08, DEF_STR( Off ) ) \
10031004   PORT_DIPSETTING(    0x00, DEF_STR( On ) )
10041005
10051006#define POPN1_DSW3 \
1006   PORT_START      /* IN 5 */ \
1007   PORT_START_TAG("DSW3")      /* IN 5 */ \
10071008   PORT_BIT( 0xec, IP_ACTIVE_LOW, IPT_UNKNOWN ) \
10081009   PORT_DIPNAME( 0x10, 0x10, "All Song Mode" )      /* DSW 3-2 */ \
10091010   PORT_DIPSETTING(    0x10, DEF_STR( Off ) ) \
r2844r2845
10351036#endif
10361037
10371038#define POPNST_INPUT \
1038   PORT_START      /* IN 0 */ \
1039   PORT_START_TAG("IN0")      /* IN 0 */ \
10391040   PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(1) \
10401041   PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(1) \
10411042   PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_PLAYER(1) \
r2844r2845
10451046   PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_BUTTON6 ) PORT_PLAYER(1) \
10461047   PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_BUTTON7 ) PORT_PLAYER(1) \
10471048 \
1048   PORT_START      /* IN 1 */ \
1049   PORT_START_TAG("IN1")      /* IN 1 */ \
10491050   PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON8 ) PORT_PLAYER(1) \
10501051   PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON9 ) PORT_PLAYER(1) \
10511052   PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_BUTTON10 ) PORT_PLAYER(1) \
r2844r2845
10551056   PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_START3 )   /* RIGHT SELECTION */ \
10561057   PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_COIN1 ) \
10571058 \
1058   PORT_START      /* IN 2 */ \
1059   PORT_START_TAG("IN2")      /* IN 2 */ \
10591060   PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_NAME(DEF_STR( Test )) PORT_CODE(KEYCODE_F2)   /* TEST SW */ \
10601061   PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_SERVICE1 )   /* SERVICE */ \
10611062   PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN ) \
10621063   PORT_BIT( 0xf8, IP_ACTIVE_LOW, IPT_UNKNOWN )
10631064
10641065#define POPNST_DSW1 \
1065   PORT_START      /* IN 3 */ \
1066   PORT_START_TAG("DSW1")      /* IN 3 */ \
10661067   PORT_DIPNAME( 0xe0, 0xe0, "Coinage (6 Buttons)" ) \
10671068   PORT_DIPSETTING(    0x20, "1P 4C / Continue 2C" ) \
10681069   PORT_DIPSETTING(    0x40, "1P 3C / Continue 3C" ) \
r2844r2845
10921093   PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN )
10931094
10941095#define POPNST_DSW2 \
1095   PORT_START      /* IN 4 */ \
1096   PORT_START_TAG("DSW2")      /* IN 4 */ \
10961097   PORT_DIPNAME( 0xc0, 0xc0, DEF_STR( Demo_Sounds ) ) \
10971098   PORT_DIPSETTING(    0xc0, "Loud" ) \
10981099   PORT_DIPSETTING(    0x80, DEF_STR ( Medium ) ) \
r2844r2845
11141115   PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN )
11151116
11161117#define POPNST_DSW3 \
1117   PORT_START      /* IN 5 */ \
1118   PORT_START_TAG("DSW3")      /* IN 5 */ \
11181119   PORT_BIT( 0xd5, IP_ACTIVE_LOW, IPT_UNKNOWN ) \
11191120   PORT_DIPNAME( 0x2a, 0x2a, "Enable Secret Mode" ) \
11201121   PORT_DIPSETTING(    0x2a, DEF_STR( Off ) ) \
r2844r2845
11221123
11231124#ifdef UNUSED_DEFINITION
11241125static INPUT_PORTS_START( popnstage )
1125   POPNST_INPUT         /* IN 0-2 */
1126   POPNST_INPUT      /* IN 0-2 */
11261127   POPNST_DSW1         /* IN 3 */
11271128   POPNST_DSW2         /* IN 4 */
11281129   POPNST_DSW3         /* IN 5 */
src/mame/drivers/peplus.c
r2844r2845
12081208   ROM_LOAD( "cap1267.u50", 0x0000, 0x0100, CRC(7051db57) SHA1(76751a3cc47d506983205decb07e99ca0c178a42) )
12091209ROM_END
12101210
1211ROM_START( peps0014 ) /* Normal board : Super Joker Slots (PS0014) */
1212   ROM_REGION( 0x10000, REGION_CPU1, 0 )
1213   ROM_LOAD( "ps0014.u68",   0x00000, 0x10000, CRC(368c3f58) SHA1(ebefcefbb5386659680719936bff72ad61087343) )
1214
1215   ROM_REGION( 0x100000, REGION_GFX1, ROMREGION_DISPOSE )
1216   ROM_LOAD( "mro-cg0916.u72",    0x00000, 0x8000, CRC(d97049d9) SHA1(78f7bb33866ca92922a8b83d5f9ac459edd39176) )
1217   ROM_LOAD( "mgo-cg0916.u73",    0x08000, 0x8000, CRC(6e075788) SHA1(e8e9d8b7943d62e31d1d58f870bc765cba65c203) )
1218   ROM_LOAD( "mbo-cg0916.u74",    0x10000, 0x8000, CRC(a5cdf0f3) SHA1(23b2749fd2cb5b8462ce7c912005779b611f32f9) )
1219   ROM_LOAD( "mxo-cg0916.u75",    0x18000, 0x8000, CRC(1f3a2d72) SHA1(8e07324d436980b628e007d30a835757c1f70f6d) )
1220
1221   ROM_REGION( 0x100, REGION_PROMS, 0 )
1222   ROM_LOAD( "cap0916.u50", 0x0000, 0x0100, CRC(b9a5ee21) SHA1(d3c952f594baca9dc234602d90c506dd537c4dcc) )
1223ROM_END
1224
1225ROM_START( peps0022 ) /* Normal board : Red White & Blue Slots (PS0022) */
1226   ROM_REGION( 0x10000, REGION_CPU1, 0 )
1227   ROM_LOAD( "ps0022.u68",   0x00000, 0x10000, CRC(d65c0939) SHA1(d91f472a43f77f9df8845e97561540f988e522e3) )
1228
1229   ROM_REGION( 0x100000, REGION_GFX1, ROMREGION_DISPOSE )
1230   ROM_LOAD( "mro-cg0960.u72",    0x00000, 0x8000, CRC(8c38c6fd) SHA1(5d6e9ac18b9b3f1253bba080bef1c067b2fdd7a8) )
1231   ROM_LOAD( "mgo-cg0960.u73",    0x08000, 0x8000, CRC(b4f44163) SHA1(1bc635a5160fdff2882c8362644aebf983a1a427) )
1232   ROM_LOAD( "mbo-cg0960.u74",    0x10000, 0x8000, CRC(8057e3a8) SHA1(5510872b1607daaf890603e76a8a47680e639e8e) )
1233   ROM_LOAD( "mxo-cg0960.u75",    0x18000, 0x8000, CRC(d57b4c25) SHA1(6ddfbaae87f9958642ddb95e581ac31e1dd55608) )
1234
1235   ROM_REGION( 0x100, REGION_PROMS, 0 )
1236   ROM_LOAD( "cap0960.u50", 0x0000, 0x0100, CRC(00dd8d0a) SHA1(542763b12aeb0aec2b410f7c075c52907f45d171) )
1237ROM_END
1238
1239ROM_START( peps0043 ) /* Normal board : Double Diamond Slots (PS0043) */
1240   ROM_REGION( 0x10000, REGION_CPU1, 0 )
1241   ROM_LOAD( "ps0043.u68",   0x00000, 0x10000, CRC(d612429c) SHA1(95eb4774482a930066456d517fb2e4f67d4df4cb) )
1242
1243   ROM_REGION( 0x100000, REGION_GFX1, ROMREGION_DISPOSE )
1244   ROM_LOAD( "mro-cg1003.u72",    0x00000, 0x8000, CRC(41ce0395) SHA1(ae90dbae30e4efed33f83ee7038fb2e5171c1945) )
1245   ROM_LOAD( "mgo-cg1003.u73",    0x08000, 0x8000, CRC(5a383fa1) SHA1(27b1febbdda7332e8d474fc0cca683f451a07090) )
1246   ROM_LOAD( "mbo-cg1003.u74",    0x10000, 0x8000, CRC(5ec00224) SHA1(bb70a4326cd1810b200e193a449061df62085f37) )
1247   ROM_LOAD( "mxo-cg1003.u75",    0x18000, 0x8000, CRC(2ffacd52) SHA1(38126ac4998806a1ddd55e6aa1942044240d41d0) )
1248
1249   ROM_REGION( 0x100, REGION_PROMS, 0 )
1250   ROM_LOAD( "cap1003.u50", 0x0000, 0x0100, CRC(cc400805) SHA1(f5ac48ad2a5df64da150f09f2ea5d910230bde56) )
1251ROM_END
1252
1253ROM_START( peps0045 ) /* Normal board : Red White & Blue Slots (PS0045) */
1254   ROM_REGION( 0x10000, REGION_CPU1, 0 )
1255   ROM_LOAD( "ps0045.u68",   0x00000, 0x10000, CRC(de180b84) SHA1(0d592d7d535b0aacbd62c18ac222da770fab7b85) )
1256
1257   ROM_REGION( 0x100000, REGION_GFX1, ROMREGION_DISPOSE )
1258   ROM_LOAD( "mro-cg0960.u72",    0x00000, 0x8000, CRC(8c38c6fd) SHA1(5d6e9ac18b9b3f1253bba080bef1c067b2fdd7a8) )
1259   ROM_LOAD( "mgo-cg0960.u73",    0x08000, 0x8000, CRC(b4f44163) SHA1(1bc635a5160fdff2882c8362644aebf983a1a427) )
1260   ROM_LOAD( "mbo-cg0960.u74",    0x10000, 0x8000, CRC(8057e3a8) SHA1(5510872b1607daaf890603e76a8a47680e639e8e) )
1261   ROM_LOAD( "mxo-cg0960.u75",    0x18000, 0x8000, CRC(d57b4c25) SHA1(6ddfbaae87f9958642ddb95e581ac31e1dd55608) )
1262
1263   ROM_REGION( 0x100, REGION_PROMS, 0 )
1264   ROM_LOAD( "cap0960.u50", 0x0000, 0x0100, CRC(00dd8d0a) SHA1(542763b12aeb0aec2b410f7c075c52907f45d171) )
1265ROM_END
1266
1267ROM_START( peps0308 ) /* Normal board : Double Jackpot Slots (PS0308) */
1268   ROM_REGION( 0x10000, REGION_CPU1, 0 )
1269   ROM_LOAD( "ps0308.u68",   0x00000, 0x10000, CRC(fe30e081) SHA1(d216cbc6336727caf359e6b178c856ab2659cabd) )
1270
1271   ROM_REGION( 0x100000, REGION_GFX1, ROMREGION_DISPOSE )
1272   ROM_LOAD( "mro-cg0911.u72",    0x00000, 0x8000, CRC(48491b50) SHA1(9ec6d3ff34a08d40082a1347a46635838fd31afc) )
1273   ROM_LOAD( "mgo-cg0911.u73",    0x08000, 0x8000, CRC(c1ff7d97) SHA1(78ab138ae9c7f9b3352f9b1ef5fbc473993bb8c8) )
1274   ROM_LOAD( "mbo-cg0911.u74",    0x10000, 0x8000, CRC(202e0f9e) SHA1(51421dfd1b00a9e3b1e938d5bffaa3b7cd4c2b5e) )
1275   ROM_LOAD( "mxo-cg0911.u75",    0x18000, 0x8000, CRC(d97740a2) SHA1(d76926d7fbbc24d2384a1079cb97e654600b134b) )
1276
1277   ROM_REGION( 0x100, REGION_PROMS, 0 )
1278   ROM_LOAD( "cap0911.u50", 0x0000, 0x0100, CRC(f117e781) SHA1(ba9d850c93e5f3abc26b0ba51f67fa7c07e05f59) )
1279ROM_END
1280
12111281ROM_START( peps0615 ) /* Normal board : Chaos Slots (PS0615) */
12121282   ROM_REGION( 0x10000, REGION_CPU1, 0 )
12131283   ROM_LOAD( "ps0615.u68",   0x00000, 0x10000, CRC(d27dd6ab) SHA1(b3f065f507191682edbd93b07b72ed87bf6ae9b1) )
r2844r2845
12191289   ROM_LOAD( "mxo-cg2246.u75",    0x18000, 0x8000, CRC(f0f4a27d) SHA1(3a10ab196aeaa5b50d47b9d3c5b378cfadd6fe96) )
12201290
12211291   ROM_REGION( 0x100, REGION_PROMS, 0 ) // WRONG CAP
1222   ROM_LOAD( "cap2234.u50", 0x0000, 0x0100, CRC(a930e283) SHA1(61bce50fa13b3e980ece3e72d068835e19bd5049) )
1292    ROM_LOAD( "cap0960.u50", 0x0000, 0x0100, CRC(00dd8d0a) SHA1(542763b12aeb0aec2b410f7c075c52907f45d171) )
12231293ROM_END
12241294
1225ROM_START( peps0716 ) /* Normal board : Quarter Mania Slots (PS0716) */
1295ROM_START( peps0716 ) /* Normal board : River Gambler Slots (PS0716) */
12261296   ROM_REGION( 0x10000, REGION_CPU1, 0 )
12271297   ROM_LOAD( "ps0716.u68",   0x00000, 0x10000, CRC(7615d7b6) SHA1(91fe62eec720a0dc2ebf48835065148f19499d16) )
12281298
r2844r2845
12321302   ROM_LOAD( "mbo-cg2266.u74",    0x10000, 0x8000, CRC(e3df30e1) SHA1(c7d2ae9a7c7e53bfb6197b635efcb5dc231e4fe0) )
12331303   ROM_LOAD( "mxo-cg2266.u75",    0x18000, 0x8000, CRC(56271442) SHA1(61ad0756b9f6412516e46ef6625a4c3899104d4e) )
12341304
1235   ROM_REGION( 0x100, REGION_PROMS, 0 ) // WRONG CAP
1236   ROM_LOAD( "cap2265.u50", 0x0000, 0x0100, CRC(dfb82a2f) SHA1(c96947bb475bf4497ff2e44053941625a3a7bf62) )
1305   ROM_REGION( 0x100, REGION_PROMS, 0 )
1306   ROM_LOAD( "cap2266.u50", 0x0000, 0x0100, CRC(5aaff103) SHA1(9cfda9c095cb77a8bb761c131a0f358e79b97abc) )
12371307ROM_END
12381308
12391309ROM_START( pexp0019 ) /* Superboard : Deuces Wild Poker (XP000019) */
r2844r2845
13281398GAMEL(1994, peke1012, 0,      peplus,  peplus_keno,  peplus,   ROT0,  "IGT - International Gaming Technology", "Player's Edge Plus (KE1012) Keno",                          0,   layout_pe_keno )
13291399
13301400/* Normal board : slots machine */
1401GAMEL(1996, peps0014, 0,      peplus,  peplus_slots, peplus,   ROT0,  "IGT - International Gaming Technology", "Player's Edge Plus (PS0014) Super Joker Slots",             0,   layout_pe_slots )
1402GAMEL(1996, peps0022, 0,      peplus,  peplus_slots, peplus,   ROT0,  "IGT - International Gaming Technology", "Player's Edge Plus (PS0022) Red White & Blue Slots",        0,   layout_pe_slots )
1403GAMEL(1996, peps0043, 0,      peplus,  peplus_slots, peplus,   ROT0,  "IGT - International Gaming Technology", "Player's Edge Plus (PS0043) Double Diamond Slots",          0,   layout_pe_slots )
1404GAMEL(1996, peps0045, 0,      peplus,  peplus_slots, peplus,   ROT0,  "IGT - International Gaming Technology", "Player's Edge Plus (PS0045) Red White & Blue Slots",        0,   layout_pe_slots )
1405GAMEL(1996, peps0308, 0,      peplus,  peplus_slots, peplus,   ROT0,  "IGT - International Gaming Technology", "Player's Edge Plus (PS0308) Double Jackpot Slots",          0,   layout_pe_slots )
13311406GAMEL(1996, peps0615, 0,      peplus,  peplus_slots, peplus,   ROT0,  "IGT - International Gaming Technology", "Player's Edge Plus (PS0615) Chaos Slots",                   0,   layout_pe_slots )
1332GAMEL(1996, peps0716, 0,      peplus,  peplus_slots, peplus,   ROT0,  "IGT - International Gaming Technology", "Player's Edge Plus (PS0716) Quarter Mania Slots",           0,   layout_pe_slots )
1407GAMEL(1996, peps0716, 0,      peplus,  peplus_slots, peplus,   ROT0,  "IGT - International Gaming Technology", "Player's Edge Plus (PS0716) River Gambler Slots",           0,   layout_pe_slots )
13331408
13341409/* Superboard : poker */
13351410GAMEL(1995, pexp0019, 0,      peplus,  peplus_poker, peplussb, ROT0,  "IGT - International Gaming Technology", "Player's Edge Plus (XP000019) Deuces Wild Poker",           0,   layout_pe_poker )
src/mame/drivers/ddayjlc.c
r2844r2845
113113
114114static READ8_HANDLER(prot_r)
115115{
116   return (input_port_read_indexed(machine, 1)&0x1f)|protData[protAdr];
116   return (input_port_read(machine, "IN1") & 0x1f)|protData[protAdr];
117117}
118118
119119static WRITE8_HANDLER(prot_w)
r2844r2845
222222   AM_RANGE(0xf086, 0xf086) AM_WRITE(bg2_w)
223223   AM_RANGE(0xf101, 0xf101) AM_WRITE(main_nmi_w)
224224   AM_RANGE(0xf102, 0xf105) AM_WRITE(prot_w)
225   AM_RANGE(0xf000, 0xf000) AM_READ(input_port_0_r)
225   AM_RANGE(0xf000, 0xf000) AM_READ_PORT("IN0")
226226   AM_RANGE(0xf100, 0xf100) AM_READ(prot_r)
227   AM_RANGE(0xf180, 0xf180) AM_READ(input_port_2_r)
228   AM_RANGE(0xf200, 0xf200) AM_READ(input_port_3_r)
227   AM_RANGE(0xf180, 0xf180) AM_READ_PORT("DSW1")
228   AM_RANGE(0xf200, 0xf200) AM_READ_PORT("DSW2")
229229ADDRESS_MAP_END
230230
231231
r2844r2845
242242ADDRESS_MAP_END
243243
244244static INPUT_PORTS_START( ddayjlc )
245   PORT_START
245   PORT_START_TAG("IN0")
246246   PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_JOYSTICK_UP ) PORT_8WAY PORT_PLAYER(1)
247247   PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_JOYSTICK_DOWN ) PORT_8WAY PORT_PLAYER(1)
248248   PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_JOYSTICK_RIGHT ) PORT_8WAY PORT_PLAYER(1)
r2844r2845
252252   PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_BUTTON3 ) PORT_PLAYER(1)
253253   PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_BUTTON4 ) PORT_PLAYER(1)
254254
255   PORT_START
255   PORT_START_TAG("IN1")
256256   PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_START1 )
257257   PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_START2 )
258258   PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_COIN1 )
r2844r2845
262262   PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_UNKNOWN )
263263   PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_UNKNOWN )
264264
265   PORT_START   /* DIPSW-1 */
265   PORT_START_TAG("DSW1")   /* DIPSW-1 */
266266   PORT_DIPNAME( 0x03, 0x00, DEF_STR( Lives ) )
267267   PORT_DIPSETTING(    0x00, "3" )
268268   PORT_DIPSETTING(    0x01, "4" )
r2844r2845
287287   PORT_DIPSETTING(    0x00, DEF_STR( Upright ) )
288288   PORT_DIPSETTING(    0x80, DEF_STR( Cocktail ) )
289289
290   PORT_START   /* DIPSW-2 */
290   PORT_START_TAG("DSW2")   /* DIPSW-2 */
291291   PORT_DIPNAME( 0x07, 0x00, DEF_STR( Coin_B ) )
292292   PORT_DIPSETTING(    0x03, DEF_STR( 4C_1C ) )
293293   PORT_DIPSETTING(    0x02, DEF_STR( 3C_1C ) )
src/mame/drivers/segas16a.c
r2844r2845
345345   video_control = data;
346346   segaic16_tilemap_set_flip(0, data & 0x80);
347347   segaic16_sprites_set_flip(0, data & 0x80);
348   segaic16_set_display_enable(data & 0x10);
348   segaic16_set_display_enable(machine, data & 0x10);
349349   set_led_status(1, data & 0x08);
350350   set_led_status(0, data & 0x04);
351351   coin_counter_w(1, data & 0x02);
src/mame/drivers/snookr10.c
r2844r2845
296296    *** Driver Updates ***
297297
298298
299    [2008/06/01]
299    [2008/06/09]
300    - Fixed the tilemap size.
301    - Fixed the screen size.
302    - Updated technical notes.
303
304    [2008/05/29]
300305    - Switched the color system to RESNET calculations.
301306    - Hooked the infamous bit7 of Input Port 0x3004 in parallel to DIP switch 1.
302307      This allow to use the PAYOUT button to trigger the Super Game instead of STOP 5.
r2844r2845
728733   MDRV_SCREEN_REFRESH_RATE(60)
729734   MDRV_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(0))
730735   MDRV_SCREEN_FORMAT(BITMAP_FORMAT_INDEXED16)
731   MDRV_SCREEN_SIZE((128+1)*4, (30+1)*8)
736   MDRV_SCREEN_SIZE(96*4, 30*8)
732737   MDRV_SCREEN_VISIBLE_AREA(0*4, 96*4-1, 0*8, 30*8-1)
733738
734739   MDRV_GFXDECODE(snookr10)
src/mame/drivers/segahang.c
r2844r2845
260260   segaic16_tilemap_set_flip(0, data & 0x80);
261261   segaic16_sprites_set_flip(0, data & 0x80);
262262   segaic16_sprites_set_shadow(0, ~data & 0x40);
263   segaic16_set_display_enable(data & 0x10);
263   segaic16_set_display_enable(machine, data & 0x10);
264264   set_led_status(1, data & 0x08);
265265   set_led_status(0, data & 0x04);
266266   coin_counter_w(1, data & 0x02);
src/mame/drivers/combatsc.c
r2844r2845
163163   if (offset == 0)
164164   {
165165      int i,dir[4];
166      static const char *tracknames[] = { "TRACK0_Y", "TRACK0_X", "TRACK1_Y", "TRACK1_X" };
166167
167      for (i = 0;i < 4;i++)
168      for (i = 0; i < 4; i++)
168169      {
169170         UINT8 curr;
170171
171         curr = input_port_read_indexed(machine, 4 + i);
172         curr = input_port_read(machine, tracknames[i]);
172173
173174         dir[i] = curr - pos[i];
174175         sign[i] = dir[i] & 0x80;
r2844r2845
260261static ADDRESS_MAP_START( combasc_readmem, ADDRESS_SPACE_PROGRAM, 8 )
261262   AM_RANGE(0x0020, 0x005f) AM_READ(combasc_scrollram_r)
262263   AM_RANGE(0x0200, 0x0201) AM_READ(protection_r)
263   AM_RANGE(0x0400, 0x0400) AM_READ(input_port_0_r)
264   AM_RANGE(0x0401, 0x0401) AM_READ(input_port_1_r)         /* DSW #3 */
265   AM_RANGE(0x0402, 0x0402) AM_READ(input_port_2_r)         /* DSW #1 */
266   AM_RANGE(0x0403, 0x0403) AM_READ(input_port_3_r)         /* DSW #2 */
264   AM_RANGE(0x0400, 0x0400) AM_READ_PORT("IN0")
265   AM_RANGE(0x0401, 0x0401) AM_READ_PORT("DSW3")         /* DSW #3 */
266   AM_RANGE(0x0402, 0x0402) AM_READ_PORT("DSW1")         /* DSW #1 */
267   AM_RANGE(0x0403, 0x0403) AM_READ_PORT("DSW2")         /* DSW #2 */
267268   AM_RANGE(0x0404, 0x0407) AM_READ(trackball_r)         /* 1P & 2P controls / trackball */
268269   AM_RANGE(0x0600, 0x06ff) AM_READ(SMH_RAM)            /* palette */
269270   AM_RANGE(0x0800, 0x1fff) AM_READ(SMH_RAM)
r2844r2845
391392   PORT_DIPSETTING(    0x00, "coin 2 invalidity" )
392393
393394static INPUT_PORTS_START( combasc )
394   PORT_START
395   PORT_START_TAG("IN0")
395396   PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(1)
396397   PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(1)
397398   PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_START1 )
r2844r2845
401402   PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
402403   PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
403404
404   PORT_START   /* DSW #3 */
405   PORT_START_TAG("DSW3")   /* DSW #3 */
405406   PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(2)
406407   PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(2)
407408   PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_START2 )
r2844r2845
417418   PORT_DIPSETTING(   0x80, DEF_STR( Off ) )
418419   PORT_DIPSETTING(   0x00, DEF_STR( On ) )
419420
420   PORT_START   /* DSW # 1 */
421   PORT_START_TAG("DSW1")   /* DSW # 1 */
421422   COINAGE
422423
423   PORT_START   /* DSW #2 */
424   PORT_START_TAG("DSW2")   /* DSW #2 */
424425   PORT_DIPNAME( 0x01, 0x01, DEF_STR( Unknown ) )
425426   PORT_DIPSETTING(   0x01, DEF_STR( Off ) )
426427   PORT_DIPSETTING(   0x00, DEF_STR( On ) )
r2844r2845
445446   PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
446447   PORT_DIPSETTING( 0x00, DEF_STR( On ) )
447448
448   PORT_START
449   PORT_START_TAG("IN2")
449450   PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_8WAY PORT_PLAYER(2)
450451   PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_8WAY PORT_PLAYER(2)
451452   PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_8WAY PORT_PLAYER(2)
r2844r2845
455456   PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_8WAY PORT_PLAYER(1)
456457   PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_8WAY PORT_PLAYER(1)
457458
458   PORT_START   /* only used in trackball version */
459   PORT_START_TAG("TRACK0_Y")   /* only used in trackball version */
459460   PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED )
460461
461   PORT_START   /* only used in trackball version */
462   PORT_START_TAG("TRACK0_X")   /* only used in trackball version */
462463   PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED )
463464
464   PORT_START   /* only used in trackball version */
465   PORT_START_TAG("TRACK1_Y")   /* only used in trackball version */
465466   PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED )
467
468   PORT_START_TAG("TRACK1_X")   /* only used in trackball version */
469   PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED )
466470INPUT_PORTS_END
467471
468472static INPUT_PORTS_START( combasct )
469   PORT_START
473   PORT_START_TAG("IN0")
470474   PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(1)
471475   PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(1)
472476   PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_START1 )
r2844r2845
476480   PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
477481   PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
478482
479   PORT_START   /* DSW #3 */
483   PORT_START_TAG("DSW3")   /* DSW #3 */
480484   PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(2)
481485   PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(2)
482486   PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_START2 )
r2844r2845
492496   PORT_DIPSETTING(   0x80, DEF_STR( Off ) )
493497   PORT_DIPSETTING(   0x00, DEF_STR( On ) )
494498
495   PORT_START   /* DSW # 1 */
499   PORT_START_TAG("DSW1")   /* DSW # 1 */
496500   COINAGE
497501
498   PORT_START   /* DSW #2 */
502   PORT_START_TAG("DSW2")   /* DSW #2 */
499503   PORT_DIPNAME( 0x01, 0x01, DEF_STR( Unknown ) )
500504   PORT_DIPSETTING(   0x01, DEF_STR( Off ) )
501505   PORT_DIPSETTING(   0x00, DEF_STR( On ) )
r2844r2845
521525   PORT_DIPSETTING( 0x00, DEF_STR( On ) )
522526
523527   /* trackball 1P */
524   PORT_START
528   PORT_START_TAG("TRACK0_Y")
525529   PORT_BIT( 0xff, 0x00, IPT_TRACKBALL_Y ) PORT_SENSITIVITY(10) PORT_KEYDELTA(10) PORT_REVERSE PORT_PLAYER(1)
526530
527   PORT_START
531   PORT_START_TAG("TRACK0_X")
528532   PORT_BIT( 0xff, 0x00, IPT_TRACKBALL_X ) PORT_SENSITIVITY(10) PORT_KEYDELTA(10) PORT_PLAYER(1)
529533
530534   /* trackball 2P (not implemented yet) */
531   PORT_START
535   PORT_START_TAG("TRACK1_Y")
532536   PORT_BIT( 0xff, 0x00, IPT_TRACKBALL_Y ) PORT_SENSITIVITY(10) PORT_KEYDELTA(10) PORT_REVERSE PORT_PLAYER(2)
533537
534   PORT_START
538   PORT_START_TAG("TRACK1_X")
535539   PORT_BIT( 0xff, 0x00, IPT_TRACKBALL_X ) PORT_SENSITIVITY(10) PORT_KEYDELTA(10) PORT_PLAYER(2)
536540INPUT_PORTS_END
537541
538542static INPUT_PORTS_START( combascb )
539   PORT_START
543   PORT_START_TAG("IN0")
540544   PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(1)
541545   PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(1)
542546   PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_START1 )
r2844r2845
546550   PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(2)
547551   PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_START2 )
548552
549   PORT_START
553   PORT_START_TAG("IN1")
550554   PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_8WAY PORT_PLAYER(2)
551555   PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_8WAY PORT_PLAYER(2)
552556   PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_8WAY PORT_PLAYER(2)
r2844r2845
556560   PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_8WAY PORT_PLAYER(1)
557561   PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_8WAY PORT_PLAYER(1)
558562
559   PORT_START
563   PORT_START_TAG("DSW1")
560564   COINAGE
561565
562   PORT_START
566   PORT_START_TAG("DSW2")
563567   PORT_DIPNAME( 0x01, 0x00, DEF_STR( Unknown ) )
564568   PORT_DIPSETTING(   0x01, DEF_STR( Off ) )
565569   PORT_DIPSETTING(   0x00, DEF_STR( On ) )
src/mame/drivers/stvinit.c
r2844r2845
99#include "machine/eeprom.h"
1010#include "cpu/sh2/sh2.h"
1111#include "machine/stvprot.h"
12#include "includes/stv.h"
1213
13extern UINT32 *stv_workram_h;
14extern UINT32 *stv_workram_l;
15extern UINT32 *stv_backupram;
16extern int stv_enable_slave_sh2;
17
18extern int minit_boost,sinit_boost;
19extern attotime minit_boost_timeslice, sinit_boost_timeslice;
20
21DRIVER_INIT ( stv );
22
2314/*
2415IC-13 rom shifter routine,on 2000000-21fffff the game maps the rom bytes on the
2516ODD (in every sense) bytes.This gets the IC-13 rom status to good and ends a emulation
src/mame/drivers/buggychl.c
r2844r2845
8383#include "cpu/m6805/m6805.h"
8484#include "sound/ay8910.h"
8585#include "sound/msm5232.h"
86#include "includes/buggychl.h"
8687
8788
88/* in machine */
89MACHINE_RESET( buggychl );
90READ8_HANDLER( buggychl_68705_portA_r );
91WRITE8_HANDLER( buggychl_68705_portA_w );
92WRITE8_HANDLER( buggychl_68705_ddrA_w );
93READ8_HANDLER( buggychl_68705_portB_r );
94WRITE8_HANDLER( buggychl_68705_portB_w );
95WRITE8_HANDLER( buggychl_68705_ddrB_w );
96READ8_HANDLER( buggychl_68705_portC_r );
97WRITE8_HANDLER( buggychl_68705_portC_w );
98WRITE8_HANDLER( buggychl_68705_ddrC_w );
99WRITE8_HANDLER( buggychl_mcu_w );
100READ8_HANDLER( buggychl_mcu_r );
101READ8_HANDLER( buggychl_mcu_status_r );
102
103/* in video */
104extern UINT8 *buggychl_scrollv,*buggychl_scrollh;
105extern UINT8 buggychl_sprite_lookup[0x2000];
106extern UINT8 *buggychl_character_ram;
107
108PALETTE_INIT( buggychl );
109VIDEO_START( buggychl );
110WRITE8_HANDLER( buggychl_chargen_w );
111WRITE8_HANDLER( buggychl_sprite_lookup_bank_w );
112WRITE8_HANDLER( buggychl_sprite_lookup_w );
113WRITE8_HANDLER( buggychl_ctrl_w );
114WRITE8_HANDLER( buggychl_bg_scrollx_w );
115VIDEO_UPDATE( buggychl );
116
117
118
119
12089static WRITE8_HANDLER( bankswitch_w )
12190{
12291   memory_set_bankptr(1,&memory_region(REGION_CPU1)[0x10000 + (data & 7) * 0x2000]);
src/mame/drivers/segac2.c
r2844r2845
491491   data &= 0x0f;
492492
493493   /* bit 0 controls display enable */
494   segac2_enable_display(~data & 1);
494   segac2_enable_display(machine, ~data & 1);
495495
496496   /* bit 1 resets the protection */
497497   if (!(data & 2))
src/mame/drivers/taito_f2.c
r2844r2845
296296#include "sound/2203intf.h"
297297#include "sound/2610intf.h"
298298#include "sound/okim6295.h"
299#include "includes/cchip.h"
299300
300301
301302static INT32 banknum = 0;
src/mame/drivers/stfight.c
r2844r2845
231231#include "driver.h"
232232#include "sound/2203intf.h"
233233#include "sound/msm5205.h"
234#include "includes/stfight.h"
234235
235// machine
236DRIVER_INIT( empcity );
237DRIVER_INIT( stfight );
238MACHINE_RESET( stfight );
239INTERRUPT_GEN( stfight_vb_interrupt );
240INTERRUPT_GEN( stfight_interrupt_1 );
241READ8_HANDLER( stfight_dsw_r );
242WRITE8_HANDLER( stfight_fm_w );
243WRITE8_HANDLER( stfight_voice_w );
244READ8_HANDLER( stfight_coin_r );
245WRITE8_HANDLER( stfight_coin_w );
246WRITE8_HANDLER( stfight_e800_w );
247READ8_HANDLER( stfight_fm_r );
248void stfight_adpcm_int( running_machine *machine, int data );
249WRITE8_HANDLER( stfight_adpcm_control_w );
250
251// video
252PALETTE_INIT( stfight );
253WRITE8_HANDLER( stfight_text_char_w );
254WRITE8_HANDLER( stfight_text_attr_w );
255WRITE8_HANDLER( stfight_vh_latch_w );
256WRITE8_HANDLER( stfight_sprite_bank_w );
257VIDEO_START( stfight );
258VIDEO_UPDATE( stfight );
259
260// video
261extern UINT8 *stfight_text_char_ram;
262extern UINT8 *stfight_text_attr_ram;
263extern UINT8 *stfight_vh_latch_ram;
264extern UINT8 *stfight_sprite_ram;
265
266236static ADDRESS_MAP_START( readmem_cpu1, ADDRESS_SPACE_PROGRAM, 8 )
267237   AM_RANGE(0x0000, 0x7fff) AM_READ(SMH_ROM)
268238   AM_RANGE(0x8000, 0xbfff) AM_READ(SMH_BANK1)          /* sf02.bin */
src/mame/drivers/ddragon.c
r2844r2845
19321932   /* should the sound rom be bitswapped too? */
19331933}
19341934
1935DRIVER_INIT( ddgn6809 )
1935static DRIVER_INIT( ddgn6809 )
19361936{
19371937   /* Descramble GFX here */
19381938
src/mame/drivers/kinstb.c
r2844r2845
3636#include "driver.h"
3737#include "includes/snes.h"
3838
39extern DRIVER_INIT( snes_hirom );
40
4139static INT8 shared_ram[0x100];
4240
4341static READ8_HANDLER(sharedram_r)
src/mame/drivers/cabal.c
r2844r2845
8484static WRITE16_HANDLER( track_reset_w )
8585{
8686   int i;
87   static const char *track_names[] = { "IN2", "IN3", "IN4", "IN5" };
8788
88   for (i = 0;i < 4;i++)
89      last[i] = input_port_read_indexed(machine, 3+i);
89   for (i = 0; i < 4; i++)
90      last[i] = input_port_read(machine, track_names[i]);
9091}
9192
9293static READ16_HANDLER( track_r )
r2844r2845
9495   switch (offset)
9596   {
9697      default:
97      case 0:   return (( input_port_read_indexed(machine, 3) - last[0]) & 0x00ff)        | (((input_port_read_indexed(machine, 5) - last[2]) & 0x00ff) << 8);   /* X lo */
98      case 1:   return (((input_port_read_indexed(machine, 3) - last[0]) & 0xff00) >> 8) | (( input_port_read_indexed(machine, 5) - last[2]) & 0xff00);      /* X hi */
99      case 2:   return (( input_port_read_indexed(machine, 4) - last[1]) & 0x00ff)        | (((input_port_read_indexed(machine, 6) - last[3]) & 0x00ff) << 8);   /* Y lo */
100      case 3:   return (((input_port_read_indexed(machine, 4) - last[1]) & 0xff00) >> 8) | (( input_port_read_indexed(machine, 6) - last[3]) & 0xff00);      /* Y hi */
98      case 0:   return (( input_port_read(machine, "IN2") - last[0]) & 0x00ff)       | (((input_port_read(machine, "IN4") - last[2]) & 0x00ff) << 8);   /* X lo */
99      case 1:   return (((input_port_read(machine, "IN2") - last[0]) & 0xff00) >> 8) | (( input_port_read(machine, "IN4") - last[2]) & 0xff00);         /* X hi */
100      case 2:   return (( input_port_read(machine, "IN3") - last[1]) & 0x00ff)       | (((input_port_read(machine, "IN5") - last[3]) & 0x00ff) << 8);   /* Y lo */
101      case 3:   return (((input_port_read(machine, "IN3") - last[1]) & 0xff00) >> 8) | (( input_port_read(machine, "IN5") - last[3]) & 0xff00);         /* Y hi */
101102   }
102103}
103104
src/mame/drivers/cidelsa.c
r2844r2845
161161
162162static const struct AY8910interface ay8910_interface =
163163{
164   AY8910_LEGACY_OUTPUT,
164   AY8910_SINGLE_OUTPUT,
165165   AY8910_DEFAULT_LOADS,
166166   NULL,
167167   NULL,
src/mame/drivers/destroyr.c
r2844r2845
5050
5151   /* PCB supports two dials, but cab has only got one */
5252
53   timer_set(video_screen_get_time_until_pos(machine->primary_screen, input_port_read_indexed(machine, 3), 0), NULL, 0, destroyr_dial_callback);
53   timer_set(video_screen_get_time_until_pos(machine->primary_screen, input_port_read(machine, "PADDLE"), 0), NULL, 0, destroyr_dial_callback);
5454   timer_set(video_screen_get_time_until_pos(machine->primary_screen, 0, 0), NULL, 0, destroyr_frame_callback);
5555}
5656
r2844r2845
137137
138138   if (offset == 0)
139139   {
140      UINT8 ret = input_port_read_indexed(machine, 0);
140      UINT8 ret = input_port_read(machine, "IN0");
141141
142142      if (destroyr_potsense[0] && destroyr_potmask[0])
143143         ret |= 4;
r2844r2845
149149
150150   if (offset == 1)
151151   {
152      return input_port_read_indexed(machine, 1);
152      return input_port_read(machine, "IN1");
153153   }
154154
155155   logerror("unmapped input port %d\n", offset);
r2844r2845
168168   ADDRESS_MAP_GLOBAL_MASK(0x7fff)
169169   AM_RANGE(0x0000, 0x00ff) AM_MIRROR(0xf00) AM_RAM
170170   AM_RANGE(0x1000, 0x1fff) AM_READWRITE(destroyr_input_r, destroyr_output_w)
171   AM_RANGE(0x2000, 0x2fff) AM_READ(input_port_2_r)
171   AM_RANGE(0x2000, 0x2fff) AM_READ_PORT("IN2")
172172   AM_RANGE(0x3000, 0x30ff) AM_WRITE(SMH_RAM) AM_BASE(&destroyr_alpha_num_ram)
173173   AM_RANGE(0x4000, 0x401f) AM_WRITE(SMH_RAM) AM_BASE(&destroyr_major_obj_ram)
174174   AM_RANGE(0x5000, 0x5000) AM_WRITE(destroyr_cursor_load_w)
r2844r2845
181181
182182
183183static INPUT_PORTS_START( destroyr )
184   PORT_START /* IN0 */
184   PORT_START_TAG("IN0")   /* IN0 */
185185   PORT_BIT( 0x01, IP_ACTIVE_LOW,  IPT_UNUSED ) /* call 7400 */
186186   PORT_BIT( 0x02, IP_ACTIVE_LOW,  IPT_UNUSED )
187187   PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_UNUSED ) /* potsense1 */
r2844r2845
194194   PORT_DIPSETTING( 0xc0, "3500 points" )
195195   PORT_DIPSETTING( 0x00, "never" )
196196
197   PORT_START /* IN1 */
197   PORT_START_TAG("IN1")   /* IN1 */
198198   PORT_BIT( 0x01, IP_ACTIVE_LOW,  IPT_TILT )
199199   PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_BUTTON2 ) /* actually a lever */
200200   PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_BUTTON1 )
r2844r2845
204204   PORT_BIT( 0x40, IP_ACTIVE_LOW,  IPT_UNUSED )
205205   PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_VBLANK )
206206
207   PORT_START /* IN2 */
207   PORT_START_TAG("IN2")   /* IN2 */
208208   PORT_DIPNAME( 0x03, 0x02, DEF_STR( Coinage ) )
209209   PORT_DIPSETTING( 0x03, DEF_STR( 2C_1C ) )
210210   PORT_DIPSETTING( 0x02, DEF_STR( 1C_1C ) )
r2844r2845
223223   PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNUSED )
224224   PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNUSED )
225225
226   PORT_START /* IN3 */
226   PORT_START_TAG("PADDLE")   /* IN3 */
227227   PORT_BIT( 0xff, 0x00, IPT_PADDLE_V ) PORT_MINMAX(0,160) PORT_SENSITIVITY(30) PORT_KEYDELTA(10) PORT_CENTERDELTA(0) PORT_REVERSE
228228INPUT_PORTS_END
229229
src/mame/drivers/segas16b.c
r2844r2845
11671167         segaic16_tilemap_set_flip(0, data & 0x40);
11681168         segaic16_sprites_set_flip(0, data & 0x40);
11691169         if (!disable_screen_blanking)
1170            segaic16_set_display_enable(data & 0x20);
1170            segaic16_set_display_enable(machine, data & 0x20);
11711171         set_led_status(1, data & 0x08);
11721172         set_led_status(0, data & 0x04);
11731173         coin_counter_w(1, data & 0x02);
src/mame/drivers/multigam.c
r2844r2845
555555static MACHINE_RESET( multigam )
556556{
557557   /* reset the ppu */
558   ppu2c0x_reset( 0, 1 );
558   ppu2c0x_reset( machine, 0, 1 );
559559}
560560
561561static MACHINE_RESET( multigm3 )
562562{
563563   /* reset the ppu */
564   ppu2c0x_reset( 0, 1 );
564   ppu2c0x_reset( machine, 0, 1 );
565565   multigm3_switch_prg_rom(machine, 0, 0x01 );
566566};
567567
src/mame/drivers/atarigx2.c
r2844r2845
139139   if (ACCESSING_BITS_24_31)
140140   {
141141      /* bits 13-11 are the MO control bits */
142      atarirle_control_w(0, (data >> 27) & 7);
142      atarirle_control_w(machine,0, (data >> 27) & 7);
143143   }
144144
145145   /* lower byte */
src/mame/drivers/nwk-tr.c
r2844r2845
755755
756756/*****************************************************************************/
757757
758static MACHINE_START( nwktr )
759{
760   /* set conservative DRC options */
761   cpunum_set_info_int(0, CPUINFO_INT_PPC_DRC_OPTIONS, PPCDRC_COMPATIBLE_OPTIONS);
762
763   /* configure fast RAM regions for DRC */
764   cpunum_set_info_int(0, CPUINFO_INT_PPC_FASTRAM_SELECT, 0);
765   cpunum_set_info_int(0, CPUINFO_INT_PPC_FASTRAM_START, 0x00000000);
766   cpunum_set_info_int(0, CPUINFO_INT_PPC_FASTRAM_END, 0x003fffff);
767   cpunum_set_info_ptr(0, CPUINFO_PTR_PPC_FASTRAM_BASE, work_ram);
768   cpunum_set_info_int(0, CPUINFO_INT_PPC_FASTRAM_READONLY, 0);
769}
770
758771static ADDRESS_MAP_START( nwktr_map, ADDRESS_SPACE_PROGRAM, 32 )
759   AM_RANGE(0x00000000, 0x003fffff) AM_MIRROR(0x80000000) AM_RAM AM_BASE(&work_ram)      /* Work RAM */
760   AM_RANGE(0x74000000, 0x740000ff) AM_MIRROR(0x80000000) AM_READWRITE(K001604_reg_r, K001604_reg_w)
761   AM_RANGE(0x74010000, 0x74017fff) AM_MIRROR(0x80000000) AM_RAM_WRITE(paletteram32_w) AM_BASE(&paletteram32)
762   AM_RANGE(0x74020000, 0x7403ffff) AM_MIRROR(0x80000000) AM_READWRITE(K001604_tile_r, K001604_tile_w)
763   AM_RANGE(0x74040000, 0x7407ffff) AM_MIRROR(0x80000000) AM_READWRITE(K001604_char_r, K001604_char_w)
764   AM_RANGE(0x78000000, 0x7800ffff) AM_MIRROR(0x80000000) AM_READWRITE(cgboard_dsp_shared_r_ppc, cgboard_dsp_shared_w_ppc)
765   AM_RANGE(0x780c0000, 0x780c0003) AM_MIRROR(0x80000000) AM_READWRITE(cgboard_dsp_comm_r_ppc, cgboard_dsp_comm_w_ppc)
766   AM_RANGE(0x7d000000, 0x7d00ffff) AM_MIRROR(0x80000000) AM_READ(sysreg_r)
767   AM_RANGE(0x7d010000, 0x7d01ffff) AM_MIRROR(0x80000000) AM_WRITE(sysreg_w)
768   AM_RANGE(0x7d020000, 0x7d021fff) AM_MIRROR(0x80000000) AM_READWRITE(timekeeper_0_32be_r, timekeeper_0_32be_w)   /* M48T58Y RTC/NVRAM */
769   AM_RANGE(0x7d030000, 0x7d030007) AM_MIRROR(0x80000000) AM_READ(K056800_host_r)
770   AM_RANGE(0x7d030000, 0x7d030007) AM_MIRROR(0x80000000) AM_WRITE(K056800_host_w)
771   AM_RANGE(0x7d030008, 0x7d03000f) AM_MIRROR(0x80000000) AM_WRITE(K056800_host_w)
772   AM_RANGE(0x7d040000, 0x7d04ffff) AM_MIRROR(0x80000000) AM_READWRITE(lanc1_r, lanc1_w)
773   AM_RANGE(0x7d050000, 0x7d05ffff) AM_MIRROR(0x80000000) AM_READWRITE(lanc2_r, lanc2_w)
774   AM_RANGE(0x7e000000, 0x7e7fffff) AM_MIRROR(0x80000000) AM_ROM AM_REGION(REGION_USER2, 0)   /* Data ROM */
775   AM_RANGE(0x7f000000, 0x7f1fffff) AM_MIRROR(0x80000000) AM_ROM AM_SHARE(2)
776   AM_RANGE(0x7fe00000, 0x7fffffff) AM_MIRROR(0x80000000) AM_ROM AM_REGION(REGION_USER1, 0) AM_SHARE(2)   /* Program ROM */
772   AM_RANGE(0x00000000, 0x003fffff) AM_RAM AM_BASE(&work_ram)      /* Work RAM */
773   AM_RANGE(0x74000000, 0x740000ff) AM_READWRITE(K001604_reg_r, K001604_reg_w)
774   AM_RANGE(0x74010000, 0x74017fff) AM_RAM_WRITE(paletteram32_w) AM_BASE(&paletteram32)
775   AM_RANGE(0x74020000, 0x7403ffff) AM_READWRITE(K001604_tile_r, K001604_tile_w)
776   AM_RANGE(0x74040000, 0x7407ffff) AM_READWRITE(K001604_char_r, K001604_char_w)
777   AM_RANGE(0x78000000, 0x7800ffff) AM_READWRITE(cgboard_dsp_shared_r_ppc, cgboard_dsp_shared_w_ppc)
778   AM_RANGE(0x780c0000, 0x780c0003) AM_READWRITE(cgboard_dsp_comm_r_ppc, cgboard_dsp_comm_w_ppc)
779   AM_RANGE(0x7d000000, 0x7d00ffff) AM_READ(sysreg_r)
780   AM_RANGE(0x7d010000, 0x7d01ffff) AM_WRITE(sysreg_w)
781   AM_RANGE(0x7d020000, 0x7d021fff) AM_READWRITE(timekeeper_0_32be_r, timekeeper_0_32be_w)   /* M48T58Y RTC/NVRAM */
782   AM_RANGE(0x7d030000, 0x7d030007) AM_READ(K056800_host_r)
783   AM_RANGE(0x7d030000, 0x7d030007) AM_WRITE(K056800_host_w)
784   AM_RANGE(0x7d030008, 0x7d03000f) AM_WRITE(K056800_host_w)
785   AM_RANGE(0x7d040000, 0x7d04ffff) AM_READWRITE(lanc1_r, lanc1_w)
786   AM_RANGE(0x7d050000, 0x7d05ffff) AM_READWRITE(lanc2_r, lanc2_w)
787   AM_RANGE(0x7e000000, 0x7e7fffff) AM_ROM AM_REGION(REGION_USER2, 0)   /* Data ROM */
788   AM_RANGE(0x7f000000, 0x7f1fffff) AM_ROM AM_SHARE(2)
789   AM_RANGE(0x7fe00000, 0x7fffffff) AM_ROM AM_REGION(REGION_USER1, 0) AM_SHARE(2)   /* Program ROM */
777790ADDRESS_MAP_END
778791
779792/*****************************************************************************/
r2844r2845
906919
907920   MDRV_INTERLEAVE(100)
908921
922   MDRV_MACHINE_START(nwktr)
909923   MDRV_MACHINE_RESET(nwktr)
910924   MDRV_NVRAM_HANDLER( timekeeper_0 )
911925
src/mame/drivers/gaelco2.c
r2844r2845
1010    ---------------+------+-----------+----------+--------------------
1111    Alligator Hunt | 1994 | GAE1 449  | 940411   | DS5002FP, but unprotected version available
1212    World Rally 2  | 1995 | GAE1 449  | 950510   | DS5002FP
13    World Rally 2  | 1995 | GAE1 506  | 950510-1 | DS5002FP
1314    Touch & Go     | 1995 | GAE1 501  | 950906   | DS5002FP
1415    Touch & Go     | 1995 | GAE1 501  | 950510-1 | DS5002FP
1516    Maniac Square  | 1996 | Unknown   | ???      | DS5002FP, but unprotected version available
r2844r2845
2324#include "cpu/m68000/m68000.h"
2425#include "sound/gaelco.h"
2526#include "rendlay.h"
27#include "includes/gaelco2.h"
2628
27extern UINT16 *gaelco_sndregs;
28extern UINT16 *gaelco2_vregs;
29extern UINT16 *snowboar_protection;
30
31/* from machine/gaelco2.c */
32DRIVER_INIT( alighunt );
33DRIVER_INIT( touchgo );
34DRIVER_INIT( snowboar );
35WRITE16_HANDLER( gaelco2_coin_w );
36WRITE16_HANDLER( gaelco2_coin2_w );
37WRITE16_HANDLER( wrally2_coin_w );
38NVRAM_HANDLER( gaelco2 );
39READ16_HANDLER( gaelco2_eeprom_r );
40WRITE16_HANDLER( gaelco2_eeprom_cs_w );
41WRITE16_HANDLER( gaelco2_eeprom_sk_w );
42WRITE16_HANDLER( gaelco2_eeprom_data_w );
43READ16_HANDLER( snowboar_protection_r );
44WRITE16_HANDLER( snowboar_protection_w );
45
46/* from video/gaelco2.c */
47WRITE16_HANDLER( gaelco2_vram_w );
48WRITE16_HANDLER( gaelco2_palette_w );
49VIDEO_UPDATE( gaelco2 );
50VIDEO_EOF( gaelco2 );
51VIDEO_START( gaelco2 );
52VIDEO_UPDATE( gaelco2_dual );
53VIDEO_START( gaelco2_dual );
54
55
5629#define TILELAYOUT16(NUM) static const gfx_layout tilelayout16_##NUM =            \
5730{                                                               \
5831   16,16,                                 /* 16x16 tiles */            \
r2844r2845
13511324CONN2: Right speaker sound OUT (for second cabinat)
13521325CONN3: For connection of wheel etc
13531326POT1/2: Volume adjust of left/right channel
1327
1328PCB Layout:
1329
1330REF: 950510-1
1331
1332------------------------------------------------------------------------------
1333 |         POT1              TI F20LB         KM428C256J-6 (x4)               |
1334 |         POT2                                                               |
1335 |                                                                            |
1336 |                                                                            |
1337 |                                              PROM IC68                     |
1338 |---                                           PROM IC69                     |
1339    |                                           PROM IC70                     |
1340    |                                                                         |
1341 |---                                                                         |
1342 |                                                                            |
1343 |                                                                            |
1344 |                                                                            |
1345 |                                            |----------|                    |
1346 | J                                          |          |                    |
1347 |                                            | GAE1 506 |                    |
1348 | A                              65764       | (QFP160) |                    |
1349 |                                65764       |          |                    |
1350 | M                                          |----------|                    |
1351 |                                                                            |
1352 | M                       |-------------------------|                        |
1353 |                         |                         |  34.000MHz     62256   |
1354 | A                       |  62256  DS5002  BATT_3V |                62256   |
1355 |                         |                         |                        |
1356 |                         |-------------------------|                        |
1357 |    TLC569   TLC569                                                         |
1358 |---                                    62256                                |
1359    |                                    62256                                |
1360    |  DSW1                                                                   |
1361 |---  DSW2                                                                   |
1362 |                                                                            |
1363 |                                26.000MHz      MC68000P12      WR2.63       |
1364 | CONN1                                                         WR2.64       |
1365 |                                                                            |
1366 | CONN2    CONN3                                                             |
1367 -----------------------------------------------------------------------------|
1368
1369
1370Notes
1371-----
1372Gaelco's PROMs IC70 and IC69 has DIP42 package (many wires are routed to GAE1 506, so I guess that they are a gfx rom)
1373Gaelco's PROM IC68 has DIP32 package (may be a sound rom)
1374TI F20L8 is a Texas Ins. DIP24 (may be a PAL). Is marked as F 406 XF 21869 F20L8-25CNT
1375TLC569 (IC2 and IC7) is a 8-bit serial ADC
1376
13541377*/
13551378
13561379ROM_START( wrally2 )
src/mame/drivers/guab.c
r2844r2845
255255 *
256256 *************************************/
257257
258struct wd1770
258static struct wd1770
259259{
260260   UINT32   status;
261261   UINT8   cmd;
src/mame/drivers/baraduke.c
r2844r2845
143143   switch (inputport_selected)
144144   {
145145      case 0x00:   /* DSW A (bits 0-4) */
146         return (input_port_read_indexed(machine, 0) & 0xf8) >> 3; break;
146         return (input_port_read(machine, "DSWA") & 0xf8) >> 3; break;
147147      case 0x01:   /* DSW A (bits 5-7), DSW B (bits 0-1) */
148         return ((input_port_read_indexed(machine, 0) & 0x07) << 2) | ((input_port_read_indexed(machine, 1) & 0xc0) >> 6); break;
148         return ((input_port_read(machine, "DSWA") & 0x07) << 2) | ((input_port_read(machine, "DSWB") & 0xc0) >> 6); break;
149149      case 0x02:   /* DSW B (bits 2-6) */
150         return (input_port_read_indexed(machine, 1) & 0x3e) >> 1; break;
150         return (input_port_read(machine, "DSWB") & 0x3e) >> 1; break;
151151      case 0x03:   /* DSW B (bit 7), DSW C (bits 0-3) */
152         return ((input_port_read_indexed(machine, 1) & 0x01) << 4) | (input_port_read_indexed(machine, 2) & 0x0f); break;
152         return ((input_port_read(machine, "DSWB") & 0x01) << 4) | (input_port_read(machine, "EDGE") & 0x0f); break;
153153      case 0x04:   /* coins, start */
154         return input_port_read_indexed(machine, 3); break;
154         return input_port_read(machine, "IN0"); break;
155155      case 0x05:   /* 2P controls */
156         return input_port_read_indexed(machine, 5); break;
156         return input_port_read(machine, "IN2"); break;
157157      case 0x06:   /* 1P controls */
158         return input_port_read_indexed(machine, 4); break;
158         return input_port_read(machine, "IN1"); break;
159159      default:
160160         return 0xff;
161161   }
src/mame/drivers/matmania.c
r2844r2845
3737#include "sound/ay8910.h"
3838#include "sound/dac.h"
3939#include "sound/3812intf.h"
40#include "includes/matmania.h"
4041
41extern UINT8 *matmania_videoram2,*matmania_colorram2;
42extern size_t matmania_videoram2_size;
43extern UINT8 *matmania_videoram3,*matmania_colorram3;
44extern size_t matmania_videoram3_size;
45extern UINT8 *matmania_scroll;
46extern UINT8 *matmania_pageselect;
47
48WRITE8_HANDLER( matmania_paletteram_w );
49PALETTE_INIT( matmania );
50VIDEO_UPDATE( matmania );
51VIDEO_UPDATE( maniach );
52VIDEO_START( matmania );
53VIDEO_UPDATE( matmania );
54
55READ8_HANDLER( maniach_68705_portA_r );
56WRITE8_HANDLER( maniach_68705_portA_w );
57READ8_HANDLER( maniach_68705_portB_r );
58WRITE8_HANDLER( maniach_68705_portB_w );
59READ8_HANDLER( maniach_68705_portC_r );
60WRITE8_HANDLER( maniach_68705_portC_w );
61WRITE8_HANDLER( maniach_68705_ddrA_w );
62WRITE8_HANDLER( maniach_68705_ddrB_w );
63WRITE8_HANDLER( maniach_68705_ddrC_w );
64WRITE8_HANDLER( maniach_mcu_w );
65READ8_HANDLER( maniach_mcu_r );
66READ8_HANDLER( maniach_mcu_status_r );
67
68
69
7042static WRITE8_HANDLER( matmania_sh_command_w )
7143{
7244   soundlatch_w(machine,offset,data);
src/mame/drivers/megasys1.c
r2844r2845
130130static UINT16 ip_select, ip_select_values[5];
131131static UINT8 megasys1_ignore_oki_status = 0;   /* used in MACHINE_RESET */
132132
133/* Variables defined in video: */
134133
135
136
137/* Functions defined in video: */
138
139PALETTE_INIT( megasys1 );
140VIDEO_START( megasys1 );
141VIDEO_UPDATE( megasys1 );
142
143READ16_HANDLER( megasys1_vregs_C_r );
144
145WRITE16_HANDLER( megasys1_vregs_A_w );
146WRITE16_HANDLER( megasys1_vregs_C_w );
147WRITE16_HANDLER( megasys1_vregs_D_w );
148
149
150
151
152134static MACHINE_RESET( megasys1 )
153135{
154136   megasys1_ignore_oki_status = 1;   /* ignore oki status due 'protection' */
src/mame/drivers/crshrace.c
r2844r2845
172172
173173static READ16_HANDLER( country_sndpending_r )
174174{
175   return input_port_read_indexed(machine, 5) | (pending_command ? 0x8000 : 0);
175   return input_port_read(machine, "DSW2") | (pending_command ? 0x8000 : 0);
176176}
177177
178178static WRITE8_HANDLER( pending_command_clear_w )
r2844r2845
248248
249249
250250static INPUT_PORTS_START( crshrace )
251   PORT_START
251   PORT_START_TAG("IN0")
252252   PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_8WAY PORT_PLAYER(1)
253253   PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_8WAY PORT_PLAYER(1)
254254   PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_8WAY PORT_PLAYER(1)
r2844r2845
266266   PORT_BIT( 0x4000, IP_ACTIVE_LOW, IPT_TILT )
267267   PORT_BIT( 0x8000, IP_ACTIVE_LOW, IPT_SERVICE1 )
268268
269   PORT_START
269   PORT_START_TAG("IN1")
270270   PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_8WAY PORT_PLAYER(2)
271271   PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_8WAY PORT_PLAYER(2)
272272   PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_8WAY PORT_PLAYER(2)
r2844r2845
276276   PORT_BIT( 0x0040, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_PLAYER(2)
277277   PORT_BIT( 0x0080, IP_ACTIVE_LOW, IPT_UNKNOWN )
278278
279   PORT_START
279   PORT_START_TAG("DSW0")
280280   /* DSW1 : 0xfe1c83 = !(0xfff004) */
281281   PORT_DIPNAME( 0x0100, 0x0100, "Coin Slot" )
282282   PORT_DIPSETTING(      0x0100, "Same" )
r2844r2845
325325   PORT_DIPSETTING(      0x0040, DEF_STR( Hard ) )
326326   PORT_DIPSETTING(      0x0000, DEF_STR( Hardest ) )
327327
328   PORT_START
328   PORT_START_TAG("DSW1")
329329   /* DSW3 : 0xfe1c85 = !(0xfff00b) */
330330#if CRSHRACE_3P_HACK
331331   PORT_DIPNAME( 0x0001, 0x0001, "Maximum Players" )
r2844r2845
367367   PORT_DIPSETTING(      0x0000, DEF_STR( No ) )
368368   PORT_DIPSETTING(      0x0080, DEF_STR( Yes ) )
369369
370   PORT_START
370   PORT_START_TAG("IN2")
371371   PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_8WAY PORT_PLAYER(3)
372372   PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_8WAY PORT_PLAYER(3)
373373   PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_8WAY PORT_PLAYER(3)
r2844r2845
377377   PORT_BIT( 0x0040, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_PLAYER(3)
378378   PORT_BIT( 0x0080, IP_ACTIVE_LOW, IPT_START3 )
379379
380   PORT_START
380   PORT_START_TAG("DSW2")
381381   PORT_DIPNAME( 0x0f00, 0x0100, "Country" )
382382   PORT_DIPSETTING(      0x0100, DEF_STR( World ) )
383383   PORT_DIPSETTING(      0x0800, "USA & Canada" )
r2844r2845
404404
405405/* Same as 'crshrace', but additional "unknown" Dip Switch (see notes) */
406406static INPUT_PORTS_START( crshrac2 )
407   PORT_START
407   PORT_START_TAG("IN0")
408408   PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_8WAY PORT_PLAYER(1)
409409   PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_8WAY PORT_PLAYER(1)
410410   PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_8WAY PORT_PLAYER(1)
r2844r2845
422422   PORT_BIT( 0x4000, IP_ACTIVE_LOW, IPT_TILT )
423423   PORT_BIT( 0x8000, IP_ACTIVE_LOW, IPT_SERVICE1 )
424424
425   PORT_START
425   PORT_START_TAG("IN1")
426426   PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_8WAY PORT_PLAYER(2)
427427   PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_8WAY PORT_PLAYER(2)
428428   PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_8WAY PORT_PLAYER(2)
r2844r2845
432432   PORT_BIT( 0x0040, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_PLAYER(2)
433433   PORT_BIT( 0x0080, IP_ACTIVE_LOW, IPT_UNKNOWN )
434434
435   PORT_START
435   PORT_START_TAG("DSW0")
436436   /* DSW2 : 0xfe1c84 = !(0xfff005) */
437437   PORT_DIPNAME( 0x0001, 0x0001, DEF_STR( Flip_Screen ) )
438438   PORT_DIPSETTING(      0x0001, DEF_STR( Off ) )
r2844r2845
481481   PORT_DIPSETTING(      0x8000, DEF_STR( Off ) )
482482   PORT_DIPSETTING(      0x0000, DEF_STR( On ) )
483483
484   PORT_START
484   PORT_START_TAG("DSW1")
485485   /* DSW3 : 0xfe1c85 = !(0xfff00b) */
486486#if CRSHRACE_3P_HACK
487487   PORT_DIPNAME( 0x0001, 0x0001, "Maximum Players" )
r2844r2845
523523   PORT_DIPSETTING(      0x0000, DEF_STR( No ) )
524524   PORT_DIPSETTING(      0x0080, DEF_STR( Yes ) )
525525
526   PORT_START
526   PORT_START_TAG("IN2")
527527   PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_8WAY PORT_PLAYER(3)
528528   PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_8WAY PORT_PLAYER(3)
529529   PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_8WAY PORT_PLAYER(3)
r2844r2845
533533   PORT_BIT( 0x0040, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_PLAYER(3)
534534   PORT_BIT( 0x0080, IP_ACTIVE_LOW, IPT_START3 )
535535
536   PORT_START
536   PORT_START_TAG("DSW2")
537537   PORT_DIPNAME( 0x0f00, 0x0100, "Country" )
538538   PORT_DIPSETTING(      0x0100, DEF_STR( World ) )
539539   PORT_DIPSETTING(      0x0800, "USA & Canada" )
src/mame/drivers/dcheese.c
r2844r2845
253253 *************************************/
254254
255255static INPUT_PORTS_START( dcheese )
256   PORT_START   /* 200000 */
256   PORT_START_TAG("200000")   /* 200000 */
257257   PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_COIN2 )
258258   PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_COIN1 )
259259   PORT_BIT( 0x000c, IP_ACTIVE_LOW, IPT_UNUSED )
r2844r2845
269269   PORT_BIT( 0x4000, IP_ACTIVE_LOW, IPT_BUTTON1 )      /* brake left */
270270   PORT_BIT( 0x8000, IP_ACTIVE_LOW, IPT_UNUSED )
271271
272   PORT_START   /* 220000 */
272   PORT_START_TAG("220000")   /* 220000 */
273273   PORT_BIT( 0xffff, IP_ACTIVE_LOW, IPT_UNKNOWN )
274274
275   PORT_START   /* 240000 */
275   PORT_START_TAG("240000")   /* 240000 */
276276   PORT_BIT( 0x001f, IP_ACTIVE_LOW, IPT_UNKNOWN )      /* low 5 bits read as a unit */
277277   PORT_BIT( 0x0020, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_CUSTOM(ticket_dispenser_0_port_r, NULL)
278278   PORT_BIT( 0x0040, IP_ACTIVE_HIGH, IPT_SPECIAL )      /* sound->main buffer status (0=empty) */
r2844r2845
283283   PORT_BIT( 0x0800, IP_ACTIVE_LOW, IPT_VOLUME_UP )
284284   PORT_BIT( 0xf000, IP_ACTIVE_LOW, IPT_UNUSED )
285285
286   PORT_START   /* 2a0002 */
286   PORT_START_TAG("2a0002")   /* 2a0002 */
287287   PORT_BIT( 0x000f, IP_ACTIVE_LOW, IPT_UNKNOWN )   // read as a unit
288288   PORT_BIT( 0x0010, IP_ACTIVE_LOW, IPT_BUTTON7 )
289289   PORT_BIT( 0x0020, IP_ACTIVE_LOW, IPT_BUTTON8 )
r2844r2845
293293   PORT_BIT( 0x0200, IP_ACTIVE_LOW, IPT_SPECIAL )
294294   PORT_BIT( 0xfc00, IP_ACTIVE_LOW, IPT_UNKNOWN )
295295
296   PORT_START   /* 2a000e */
296   PORT_START_TAG("2a000e")   /* 2a000e */
297297   PORT_BIT( 0x00ff, 0x0000, IPT_DIAL ) PORT_SENSITIVITY(100) PORT_KEYDELTA(30) PORT_REVERSE
298298   PORT_BIT( 0xff00, IP_ACTIVE_LOW, IPT_UNKNOWN )
299299INPUT_PORTS_END
300300
301301
302302static INPUT_PORTS_START( lottof2 )
303   PORT_START   /* 200000 */
303   PORT_START_TAG("200000")   /* 200000 */
304304   PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_COIN2 )
305305   PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_COIN1 )
306306   PORT_BIT( 0x000c, IP_ACTIVE_LOW, IPT_UNUSED )
r2844r2845
313313   PORT_BIT( 0x4000, IP_ACTIVE_LOW, IPT_BUTTON2 )      /* ticket */
314314   PORT_BIT( 0x8000, IP_ACTIVE_LOW, IPT_UNUSED )
315315
316   PORT_START   /* 220000 */
316   PORT_START_TAG("220000")   /* 220000 */
317317   PORT_BIT( 0xffff, IP_ACTIVE_LOW, IPT_UNKNOWN )
318318
319   PORT_START   /* 240000 */
319   PORT_START_TAG("240000")   /* 240000 */
320320   PORT_BIT( 0x001f, IP_ACTIVE_LOW, IPT_UNKNOWN )      /* low 5 bits read as a unit */
321321   PORT_BIT( 0x0020, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_CUSTOM(ticket_dispenser_0_port_r, NULL)
322322   PORT_BIT( 0x0040, IP_ACTIVE_HIGH, IPT_SPECIAL )      /* sound->main buffer status (0=empty) */
r2844r2845
327327   PORT_BIT( 0x0800, IP_ACTIVE_LOW, IPT_VOLUME_UP )
328328   PORT_BIT( 0xf000, IP_ACTIVE_LOW, IPT_UNUSED )
329329
330   PORT_START   /* 2a0002 */
330   PORT_START_TAG("2a0002")   /* 2a0002 */
331331   PORT_BIT( 0x000f, IP_ACTIVE_LOW, IPT_UNKNOWN )
332332   PORT_BIT( 0x0010, IP_ACTIVE_LOW, IPT_JOYSTICK_UP )
333333   PORT_BIT( 0x0020, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN )
r2844r2845
337337   PORT_BIT( 0x0200, IP_ACTIVE_LOW, IPT_SPECIAL )
338338   PORT_BIT( 0xfc00, IP_ACTIVE_LOW, IPT_UNKNOWN )
339339
340   PORT_START   /* 2a000e */
340   PORT_START_TAG("2a000e")   /* 2a000e */
341341   PORT_BIT( 0xffff, IP_ACTIVE_LOW, IPT_UNKNOWN )
342342INPUT_PORTS_END
343343
344344
345345static INPUT_PORTS_START( fredmem )
346   PORT_START   /* 200000 */
346   PORT_START_TAG("200000")   /* 200000 */
347347   PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_COIN2 )
348348   PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_COIN1 )
349349   PORT_BIT( 0x000c, IP_ACTIVE_LOW, IPT_UNUSED )
r2844r2845
355355   PORT_BIT( 0x2000, IP_ACTIVE_LOW, IPT_BUTTON5 ) PORT_CODE(KEYCODE_5_PAD)
356356   PORT_BIT( 0xc000, IP_ACTIVE_LOW, IPT_UNUSED )
357357
358   PORT_START   /* 220000 */
358   PORT_START_TAG("220000")   /* 220000 */
359359   PORT_BIT( 0xffff, IP_ACTIVE_LOW, IPT_UNKNOWN )
360360
361   PORT_START   /* 240000 */
361   PORT_START_TAG("240000")   /* 240000 */
362362   PORT_BIT( 0x001f, IP_ACTIVE_LOW, IPT_UNKNOWN )      /* low 5 bits read as a unit */
363363   PORT_BIT( 0x0020, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_CUSTOM(ticket_dispenser_0_port_r, NULL)
364364   PORT_BIT( 0x0040, IP_ACTIVE_HIGH, IPT_SPECIAL )      /* sound->main buffer status (0=empty) */
r2844r2845
369369   PORT_BIT( 0x0800, IP_ACTIVE_LOW, IPT_VOLUME_UP )
370370   PORT_BIT( 0xf000, IP_ACTIVE_LOW, IPT_UNUSED )
371371
372   PORT_START   /* 2a0002 */
372   PORT_START_TAG("2a0002")   /* 2a0002 */
373373   PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_BUTTON6 ) PORT_CODE(KEYCODE_6_PAD)
374374   PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_BUTTON7 ) PORT_CODE(KEYCODE_1_PAD)
375375   PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_BUTTON8 ) PORT_CODE(KEYCODE_2_PAD)
r2844r2845
382382   PORT_BIT( 0x0200, IP_ACTIVE_LOW, IPT_SPECIAL )
383383   PORT_BIT( 0xfc00, IP_ACTIVE_LOW, IPT_UNKNOWN )
384384
385   PORT_START   /* 2a000e */
385   PORT_START_TAG("2a000e")   /* 2a000e */
386386   PORT_BIT( 0xffff, IP_ACTIVE_LOW, IPT_UNKNOWN )
387387INPUT_PORTS_END
388388
src/mame/drivers/chqflag.c
r2844r2845
124124   static int accel, wheel;
125125
126126   switch (analog_ctrl & 0x03){
127      case 0x00: return (accel = input_port_read_indexed(machine, 5));   /* accelerator */
128      case 0x01: return (wheel = input_port_read_indexed(machine, 6));   /* steering */
127      case 0x00: return (accel = input_port_read(machine, "IN3"));   /* accelerator */
128      case 0x01: return (wheel = input_port_read(machine, "IN4"));   /* steering */
129129      case 0x02: return accel;                  /* accelerator (previous?) */
130130      case 0x03: return wheel;                  /* steering (previous?) */
131131   }
r2844r2845
148148   AM_RANGE(0x2000, 0x2007) AM_READ(K051937_r)               /* Sprite control registers */
149149   AM_RANGE(0x2400, 0x27ff) AM_READ(K051960_r)               /* Sprite RAM */
150150   AM_RANGE(0x2800, 0x2fff) AM_READ(SMH_BANK3)               /* 051316 zoom/rotation (chip 2) */
151   AM_RANGE(0x3100, 0x3100) AM_READ(input_port_0_r)            /* DIPSW #1  */
152   AM_RANGE(0x3200, 0x3200) AM_READ(input_port_3_r)            /* COINSW, STARTSW, test mode */
153   AM_RANGE(0x3201, 0x3201) AM_READ(input_port_2_r)            /* DIPSW #3, SW 4 */
154   AM_RANGE(0x3203, 0x3203) AM_READ(input_port_1_r)            /* DIPSW #2 */
151   AM_RANGE(0x3100, 0x3100) AM_READ_PORT("DSW1")            /* DIPSW #1  */
152   AM_RANGE(0x3200, 0x3200) AM_READ_PORT("IN1")            /* COINSW, STARTSW, test mode */
153   AM_RANGE(0x3201, 0x3201) AM_READ_PORT("IN0")            /* DIPSW #3, SW 4 */
154   AM_RANGE(0x3203, 0x3203) AM_READ_PORT("DSW2")            /* DIPSW #2 */
155155   AM_RANGE(0x3400, 0x341f) AM_READ(K051733_r)               /* 051733 (protection) */
156   AM_RANGE(0x3701, 0x3701) AM_READ(input_port_4_r)            /* Brake + Shift + ? */
156   AM_RANGE(0x3701, 0x3701) AM_READ_PORT("IN2")            /* Brake + Shift + ? */
157157   AM_RANGE(0x3702, 0x3702) AM_READ(analog_read_r)            /* accelerator/wheel */
158158   AM_RANGE(0x4000, 0x7fff) AM_READ(SMH_BANK4)               /* banked ROM */
159159   AM_RANGE(0x8000, 0xffff) AM_READ(SMH_ROM)               /* ROM */
r2844r2845
220220
221221
222222static INPUT_PORTS_START( chqflag )
223   PORT_START   /* DSW #1 */
223   PORT_START_TAG("DSW1")   /* DSW #1 */
224224   PORT_DIPNAME( 0x0f, 0x0f, DEF_STR( Coin_A ) )
225225   PORT_DIPSETTING(    0x02, DEF_STR( 4C_1C ) )
226226   PORT_DIPSETTING(    0x05, DEF_STR( 3C_1C ) )
r2844r2845
256256   PORT_DIPSETTING(    0x90, DEF_STR( 1C_7C ) )
257257//  PORT_DIPSETTING(    0x00, "Coin Slot 2 Invalidity" )
258258
259   PORT_START   /* DSW #2 (according to the manual SW1 thru SW5 are not used) */
259   PORT_START_TAG("DSW2")   /* DSW #2 (according to the manual SW1 thru SW5 are not used) */
260260   PORT_DIPNAME( 0x01, 0x01, DEF_STR( Unused ) )
261261   PORT_DIPSETTING(   0x01, DEF_STR( Off ) )
262262   PORT_DIPSETTING(   0x00, DEF_STR( On ) )
r2844r2845
281281   PORT_DIPSETTING(   0x80, DEF_STR( Off ) )
282282   PORT_DIPSETTING(   0x00, DEF_STR( On ) )
283283
284   PORT_START
284   PORT_START_TAG("IN0")
285285   PORT_BIT( 0x7f, IP_ACTIVE_LOW, IPT_UNKNOWN )
286286   PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unused ) )   /* DIPSW #3 - SW4 */
287287   PORT_DIPSETTING(   0x80, DEF_STR( Off ) )
288288   PORT_DIPSETTING(   0x00, DEF_STR( On ) )
289289
290   PORT_START
290   PORT_START_TAG("IN1")
291291   /* COINSW + STARTSW */
292292   PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 )
293293   PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_COIN2 )
r2844r2845
303303   PORT_DIPSETTING(   0x00, "Checkered Flag" )
304304   PORT_SERVICE( 0x80, IP_ACTIVE_LOW )
305305
306   PORT_START   /* Brake, Shift + ??? */
306   PORT_START_TAG("IN2")   /* Brake, Shift + ??? */
307307   PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_TOGGLE
308308   PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON2 )
309309   PORT_BIT( 0x0c, IP_ACTIVE_LOW, IPT_UNKNOWN )   /* if this is set, it goes directly to test mode */
310310   PORT_BIT( 0xf0, IP_ACTIVE_HIGH, IPT_UNKNOWN )   /* if bit 7 == 0, the game resets */
311311
312   PORT_START   /* Accelerator */
312   PORT_START_TAG("IN3")   /* Accelerator */
313313   PORT_BIT( 0xff, 0x00, IPT_PEDAL ) PORT_SENSITIVITY(50) PORT_KEYDELTA(5)
314314
315   PORT_START   /* Driving wheel */
315   PORT_START_TAG("IN4")   /* Driving wheel */
316316   PORT_BIT( 0xff, 0x80, IPT_PADDLE ) PORT_MINMAX(0x10,0xef) PORT_SENSITIVITY(80) PORT_KEYDELTA(8)
317317INPUT_PORTS_END
318318
src/mame/drivers/bwing.c
r2844r2845
7878      break;
7979
8080      case 1:
81         if (~input_port_read_indexed(machine, 4) & 0x03)
81         if (~input_port_read(machine, "IN2") & 0x03)
8282            { if (!coin) { coin = 1; cpunum_set_input_line(machine, 0, INPUT_LINE_NMI, ASSERT_LINE); } }
8383         else
8484            coin = 0;
8585      break;
8686
8787      case 2:
88         if (input_port_read_indexed(machine, 5)) cpunum_set_input_line(machine, 0, M6809_FIRQ_LINE, ASSERT_LINE);
88         if (input_port_read(machine, "IN3")) cpunum_set_input_line(machine, 0, M6809_FIRQ_LINE, ASSERT_LINE);
8989      break;
9090   }
9191}
r2844r2845
104104
105105static READ8_HANDLER( bwp1_io_r )
106106{
107   if (offset == 0) return(input_port_read_indexed(machine, 0));
108   if (offset == 1) return(input_port_read_indexed(machine, 1));
109   if (offset == 2) return(input_port_read_indexed(machine, 2));
110   if (offset == 3) return(input_port_read_indexed(machine, 3));
111   if (offset == 4) return(input_port_read_indexed(machine, 4));
107   if (offset == 0) return(input_port_read(machine, "DSW0"));
108   if (offset == 1) return(input_port_read(machine, "DSW1"));
109   if (offset == 2) return(input_port_read(machine, "IN0"));
110   if (offset == 3) return(input_port_read(machine, "IN1"));
111   if (offset == 4) return(input_port_read(machine, "IN2"));
112112
113113   return((bwp123_membase[0])[0x1b00 + offset]);
114114}
r2844r2845
236236ADDRESS_MAP_END
237237
238238static ADDRESS_MAP_START( bwp3_readport, ADDRESS_SPACE_IO, 8 )
239   AM_RANGE(0x00, 0x00) AM_READ(input_port_6_r)
239   AM_RANGE(0x00, 0x00) AM_READ_PORT("VBLANK")
240240ADDRESS_MAP_END
241241
242242static ADDRESS_MAP_START( bwp3_writeport, ADDRESS_SPACE_IO, 8 )
r2844r2845
247247// I/O Port Maps
248248
249249static INPUT_PORTS_START( bwing )
250   PORT_START
250   PORT_START_TAG("DSW0")
251251   PORT_DIPNAME( 0x03, 0x03, DEF_STR( Coin_A ) )
252252   PORT_DIPSETTING(    0x00, DEF_STR( 2C_1C ) )
253253   PORT_DIPSETTING(    0x03, DEF_STR( 1C_1C ) )
r2844r2845
271271   PORT_DIPSETTING(    0x80, DEF_STR( Off ) )
272272   PORT_DIPSETTING(    0x00, DEF_STR( On ) )
273273
274
275   PORT_START
274   PORT_START_TAG("DSW1")
276275   PORT_DIPNAME( 0x01, 0x01, DEF_STR( Lives ) )
277276   PORT_DIPSETTING(    0x00, "5" )
278277   PORT_DIPSETTING(    0x01, "3" )
r2844r2845
297296   PORT_DIPSETTING(    0x80, DEF_STR( Off ) )
298297   PORT_DIPSETTING(    0x00, DEF_STR( On ) )
299298
300   PORT_START
299   PORT_START_TAG("IN0")
301300   PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_8WAY
302301   PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_8WAY
303302   PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_8WAY
r2844r2845
307306   PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
308307   PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
309308
310   PORT_START
309   PORT_START_TAG("IN1")
311310   PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_8WAY PORT_COCKTAIL
312311   PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_8WAY PORT_COCKTAIL
313312   PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_8WAY PORT_COCKTAIL
r2844r2845
317316   PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN )
318317   PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN )
319318
320   PORT_START
319   PORT_START_TAG("IN2")
321320   PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_COIN1 )
322321   PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_COIN2 )
323322   PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_START1 )
r2844r2845
327326   PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_SERVICE1 )
328327   PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_VBLANK )
329328
330   PORT_START
329   PORT_START_TAG("IN3")
331330   PORT_BIT( 0xff, IP_ACTIVE_HIGH, IPT_TILT )
332331
333   PORT_START
332   PORT_START_TAG("VBLANK")
334333   PORT_BIT( 0xff, IP_ACTIVE_HIGH, IPT_VBLANK )
335334
336   PORT_START // a matter of taste
335   PORT_START_TAG("EXTRA") // a matter of taste
337336   PORT_DIPNAME( 0x07, 0x00, "RGB" )
338337   PORT_DIPSETTING(    0x00, "Default" )
339338   PORT_DIPSETTING(    0x01, "More Red" )
src/mame/drivers/lsasquad.c
r2844r2845
150150#include "cpu/m6805/m6805.h"
151151#include "sound/ay8910.h"
152152#include "sound/2203intf.h"
153#include "includes/lsasquad.h"
153154
154/* in video/lsasquad.c */
155extern UINT8 *lsasquad_scrollram;
156VIDEO_UPDATE( lsasquad );
157VIDEO_UPDATE( daikaiju );
158
159/* in machine/lsasquad.c */
160extern int lsasquad_invertcoin;
161WRITE8_HANDLER( lsasquad_sh_nmi_disable_w );
162WRITE8_HANDLER( lsasquad_sh_nmi_enable_w );
163WRITE8_HANDLER( lsasquad_sound_command_w );
164READ8_HANDLER( lsasquad_sh_sound_command_r );
165WRITE8_HANDLER( lsasquad_sh_result_w );
166READ8_HANDLER( lsasquad_sound_result_r );
167READ8_HANDLER( lsasquad_sound_status_r );
168
169READ8_HANDLER( lsasquad_68705_portA_r );
170WRITE8_HANDLER( lsasquad_68705_portA_w );
171WRITE8_HANDLER( lsasquad_68705_ddrA_w );
172READ8_HANDLER( lsasquad_68705_portB_r );
173WRITE8_HANDLER( lsasquad_68705_portB_w );
174WRITE8_HANDLER( lsasquad_68705_ddrB_w );
175WRITE8_HANDLER( lsasquad_mcu_w );
176READ8_HANDLER( lsasquad_mcu_r );
177READ8_HANDLER( lsasquad_mcu_status_r );
178
179READ8_HANDLER( daikaiju_mcu_r);
180WRITE8_HANDLER( daikaiju_mcu_w);
181READ8_HANDLER( daikaiju_mcu_status_r);
182
183READ8_HANDLER( daikaiju_sound_status_r );
184READ8_HANDLER( daikaiju_sh_sound_command_r );
185
186MACHINE_RESET(daikaiju);
187
188155static WRITE8_HANDLER( lsasquad_bankswitch_w )
189156{
190157   UINT8 *ROM = memory_region(REGION_CPU1);
src/mame/drivers/cham24.c
r2844r2845
106106   in_0_shift = 0;
107107   in_1_shift = 0;
108108
109   in_0 = input_port_read_indexed(machine, 0);
110   in_1 = input_port_read_indexed(machine, 1);
109   in_0 = input_port_read(machine, "P1");
110   in_1 = input_port_read(machine, "P2");
111111
112112}
113113
r2844r2845
168168ADDRESS_MAP_END
169169
170170static INPUT_PORTS_START( cham24 )
171   PORT_START /* IN0 */
171   PORT_START_TAG("P1") /* IN0 */
172172   PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_BUTTON2 ) PORT_PLAYER(1)
173173   PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_BUTTON1 ) PORT_PLAYER(1)
174174   PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_BUTTON3 ) PORT_PLAYER(1)   /* Select */
r2844r2845
178178   PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_JOYSTICK_LEFT ) PORT_PLAYER(1)
179179   PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_JOYSTICK_RIGHT ) PORT_PLAYER(1)
180180
181   PORT_START /* IN1 */
181   PORT_START_TAG("P2") /* IN1 */
182182   PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_BUTTON2 ) PORT_PLAYER(2)
183183   PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_BUTTON1 ) PORT_PLAYER(2)
184184   PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_BUTTON3 ) PORT_PLAYER(2)   /* Select */
r2844r2845
205205   memcpy( &dst[0xc000], &src[0x0f8000], 0x4000 );
206206
207207   /* reset the ppu */
208   ppu2c0x_reset( 0, 1 );
208   ppu2c0x_reset( machine, 0, 1 );
209209}
210210
211211static PALETTE_INIT( cham24 )
src/mame/drivers/cave.c
r2844r2845
310310
311311static READ16_HANDLER( gaia_dsw_r )
312312{
313   return input_port_read_indexed(machine, 2) | (input_port_read_indexed(machine, 3) << 8);
313   return input_port_read(machine, "DSW1") | (input_port_read(machine, "DSW2") << 8);
314314}
315315
316316static WRITE16_HANDLER( cave_eeprom_msb_w )
r2844r2845
10611061static READ16_HANDLER( sailormn_input0_r )
10621062{
10631063//  watchdog_reset16_r(0,0);    // written too rarely for mame.
1064   return input_port_read_indexed(machine, 0);
1064   return input_port_read(machine, "IN0");
10651065}
10661066
10671067static READ16_HANDLER( agallet_irq_cause_r )
r2844r2845
19601960   /* modify the eeprom on a reset with the desired region for the games that have the
19611961       region factory set in eeprom */
19621962   if (cave_region_byte >= 0)
1963      eeprom_get_data_pointer(0)[cave_region_byte] =  input_port_read_indexed(machine, 2);
1963      eeprom_get_data_pointer(0)[cave_region_byte] =  input_port_read(machine, "EEPROM");
19641964}
19651965
19661966static const struct YMZ280Binterface ymz280b_intf =
src/mame/drivers/atarigt.c
r2844r2845
208208   if (ACCESSING_BITS_24_31)
209209   {
210210      /* bits 13-11 are the MO control bits */
211      atarirle_control_w(0, (data >> 27) & 7);
211      atarirle_control_w(machine, 0, (data >> 27) & 7);
212212   }
213213
214214   if (ACCESSING_BITS_16_23)
src/mame/drivers/bigfghtr.c
r2844r2845
317317         break;
318318
319319         case 0x46/2:
320            return (input_port_read_indexed(machine,0)&0xffff)^0xffff;
320            return (input_port_read(machine, "IN0") & 0xffff)^0xffff;
321321
322322
323323      }
r2844r2845
494494   PORT_DIPSETTING(    0x02, "4" )
495495   PORT_DIPSETTING(    0x01, "5" )
496496   PORT_DIPSETTING(    0x00, "6" )
497
498
499497   PORT_DIPNAME( 0x0c, 0x0c, DEF_STR( Bonus_Life ) )
500498   PORT_DIPSETTING(    0x0c, "20k then every 60k" )
501499   PORT_DIPSETTING(    0x04, "20k then every 80k" )
src/mame/drivers/tourtabl.c
r2844r2845
124124   r6532_reset(0);
125125   r6532_reset(1);
126126
127   tia_init( &tourtabl_tia_interface );
127   tia_init( machine, &tourtabl_tia_interface );
128128}
129129
130130
src/mame/drivers/cloud9.c
r2844r2845
247247
248248static READ8_HANDLER( leta_r )
249249{
250   return input_port_read_indexed(machine, 3 + offset);
250   return input_port_read(machine, offset ? "TRACKX" : "TRACKY");
251251}
252252
253253
r2844r2845
312312   AM_RANGE(0x5602, 0x5603) AM_MIRROR(0x0078) AM_WRITE(cloud9_led_w)
313313   AM_RANGE(0x5680, 0x56ff) AM_WRITE(nvram_store_w)
314314   AM_RANGE(0x5700, 0x577f) AM_WRITE(nvram_recall_w)
315   AM_RANGE(0x5800, 0x5800) AM_MIRROR(0x007e) AM_READ(input_port_0_r)
316   AM_RANGE(0x5801, 0x5801) AM_MIRROR(0x007e) AM_READ(input_port_1_r)
315   AM_RANGE(0x5800, 0x5800) AM_MIRROR(0x007e) AM_READ_PORT("IN0")
316   AM_RANGE(0x5801, 0x5801) AM_MIRROR(0x007e) AM_READ_PORT("IN1")
317317   AM_RANGE(0x5900, 0x5903) AM_MIRROR(0x007c) AM_READ(leta_r)
318318   AM_RANGE(0x5a00, 0x5a0f) AM_MIRROR(0x00f0) AM_READWRITE(pokey1_r, pokey1_w)
319319   AM_RANGE(0x5b00, 0x5b0f) AM_MIRROR(0x00f0) AM_READWRITE(pokey2_r, pokey2_w)
r2844r2845
330330 *************************************/
331331
332332static INPUT_PORTS_START( cloud9 )
333   PORT_START
333   PORT_START_TAG("IN0")
334334   PORT_BIT( 0x07, IP_ACTIVE_LOW, IPT_UNKNOWN )
335335   PORT_SERVICE( 0x08, IP_ACTIVE_LOW )
336336   PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_SERVICE1 )
r2844r2845
338338   PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_COIN2 )
339339   PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_SPECIAL ) PORT_CUSTOM(get_vblank, 0)
340340
341   PORT_START
341   PORT_START_TAG("IN1")
342342   PORT_BIT( 0x0f, IP_ACTIVE_LOW, IPT_UNKNOWN )
343343   PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON2 )
344344   PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON1 )
345345   PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_START2 )
346346   PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_START1 )
347347
348   PORT_START
348   PORT_START_TAG("DSW")
349349   PORT_DIPNAME( 0x01, 0x01, DEF_STR( Unknown ) )
350350   PORT_DIPSETTING(   0x01, DEF_STR( Off ) )
351351   PORT_DIPSETTING(   0x00, DEF_STR( On ) )
r2844r2845
362362   PORT_DIPSETTING(   0x02, DEF_STR( 1C_2C ) )
363363   PORT_DIPSETTING(   0x00, DEF_STR( Free_Play ) )
364364
365   PORT_START
365   PORT_START_TAG("TRACKY")
366366   PORT_BIT( 0xff, 0x00, IPT_TRACKBALL_Y ) PORT_SENSITIVITY(30) PORT_KEYDELTA(30) PORT_REVERSE
367367
368   PORT_START
368   PORT_START_TAG("TRACKX")
369369   PORT_BIT( 0xff, 0x00, IPT_TRACKBALL_X ) PORT_SENSITIVITY(30) PORT_KEYDELTA(30)
370370INPUT_PORTS_END
371371
372372
373373static INPUT_PORTS_START( firebeas )
374   PORT_START
374   PORT_START_TAG("IN0")
375375   PORT_BIT( 0x07, IP_ACTIVE_LOW, IPT_UNKNOWN )
376376   PORT_SERVICE( 0x08, IP_ACTIVE_LOW )
377377   PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_SERVICE1 )
r2844r2845
379379   PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_COIN2 )
380380   PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_SPECIAL ) PORT_CUSTOM(get_vblank, 0)
381381
382   PORT_START
382   PORT_START_TAG("IN1")
383383   PORT_BIT( 0x07, IP_ACTIVE_LOW, IPT_UNKNOWN )
384384   PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_BUTTON2 )
385385   PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN )
r2844r2845
387387   PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_START2 )
388388   PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_START1 )
389389
390   PORT_START
390   PORT_START_TAG("DSW")
391391   PORT_DIPNAME( 0x01, 0x01, DEF_STR( Unknown ) )
392392   PORT_DIPSETTING(   0x01, DEF_STR( Off ) )
393393   PORT_DIPSETTING(   0x00, DEF_STR( On ) )
r2844r2845
413413   PORT_DIPSETTING(   0x80, DEF_STR( Off ) )
414414   PORT_DIPSETTING(   0x00, DEF_STR( On ) )
415415
416   PORT_START
416   PORT_START_TAG("TRACKY")
417417   PORT_BIT( 0xff, 0x00, IPT_TRACKBALL_Y ) PORT_SENSITIVITY(30) PORT_KEYDELTA(30) PORT_REVERSE
418418
419   PORT_START
419   PORT_START_TAG("TRACKX")
420420   PORT_BIT( 0xff, 0x00, IPT_TRACKBALL_X ) PORT_SENSITIVITY(30) PORT_KEYDELTA(30) PORT_REVERSE
421421INPUT_PORTS_END
422422
src/mame/drivers/changela.c
r2844r2845
9595
9696static READ8_HANDLER( changela_68705_portB_r )
9797{
98   return (portB_out & ddrB) | (input_port_read_indexed(machine, 4) & ~ddrB);
98   return (portB_out & ddrB) | (input_port_read(machine, "MCU") & ~ddrB);
9999}
100100
101101static WRITE8_HANDLER( changela_68705_portB_w )
r2844r2845
177177
178178static READ8_HANDLER( changela_30_r )
179179{
180   return input_port_read_indexed(machine, 7) & 0x0f;   //wheel control (clocked input) signal on bits 3,2,1,0
180   return input_port_read(machine, "WHEEL") & 0x0f;   //wheel control (clocked input) signal on bits 3,2,1,0
181181}
182182
183183static READ8_HANDLER( changela_31_r )
r2844r2845
186186       or if the new value is greater than the old value, and it did wrap around,
187187       then we are moving LEFT. */
188188   static UINT8 prev_value = 0;
189   UINT8 curr_value = input_port_read_indexed(machine, 7);
189   UINT8 curr_value = input_port_read(machine, "WHEEL");
190190   static int dir = 0;
191191
192192   if( (curr_value < prev_value && (prev_value - curr_value) < 0x80)
r2844r2845
204204
205205static READ8_HANDLER( changela_2c_r )
206206{
207   int val = input_port_read_indexed(machine, 5);
207   int val = input_port_read(machine, "IN0");
208208
209209    val = (val&0x30) | ((val&1)<<7) | (((val&1)^1)<<6);
210210
r2844r2845
221221      v8 = 1;
222222
223223   /* Gas pedal is made up of 2 switches, 1 active low, 1 active high */
224   switch(input_port_read_indexed(machine, 6) & 0x03)
224   switch(input_port_read(machine, "IN1") & 0x03)
225225   {
226226      case 0x02:
227227         gas = 0x80;
r2844r2845
234234         break;
235235   }
236236
237   return (input_port_read_indexed(machine, 6) & 0x20) | gas | (v8<<4);
237   return (input_port_read(machine, "IN1") & 0x20) | gas | (v8<<4);
238238}
239239
240240static WRITE8_HANDLER( mcu_PC0_w )
r2844r2845
318318
319319
320320static INPUT_PORTS_START( changela )
321   PORT_START /* 0 */ /* DSWA */
321   PORT_START_TAG("DSWA")   /* DSWA */
322322   PORT_DIPNAME( 0x07, 0x01, "Steering Wheel Ratio" )
323323   PORT_DIPSETTING(    0x01, "Recommended" )
324324   PORT_DIPNAME( 0x08, 0x00, DEF_STR( Demo_Sounds ) )
r2844r2845
337337   PORT_DIPSETTING(    0x80, "1" )
338338   PORT_DIPSETTING(    0x00, "2" )
339339
340   PORT_START /* 1 */ /* DSWB */
340   PORT_START_TAG("DSWB")   /* DSWB */
341341   PORT_DIPNAME( 0x03, 0x00, "Max Bonus Fuels" )
342342   PORT_DIPSETTING(    0x01, "1" )
343343   PORT_DIPSETTING(    0x02, "2" )
r2844r2845
360360   PORT_DIPSETTING(    0x80, DEF_STR( Off ) )
361361   PORT_DIPSETTING(    0x00, DEF_STR( On ) )
362362
363   PORT_START /* 2 */ /* DSWC - coinage */
363   PORT_START_TAG("DSWC")   /* DSWC - coinage */
364364   PORT_DIPNAME( 0xf0, 0x10, DEF_STR( Coin_A ) )
365365   PORT_DIPSETTING(    0x00, DEF_STR( Free_Play ) )
366366   PORT_DIPSETTING(   0x90, DEF_STR( 2C_1C ) )
r2844r2845
394394   PORT_DIPSETTING(   0x06, DEF_STR( 1C_6C ) )
395395   PORT_DIPSETTING(   0x07, DEF_STR( 1C_7C ) )
396396
397   PORT_START /* 3 */ /* DSWD - bonus */
397   PORT_START_TAG("DSWD")   /* DSWD - bonus */
398398   PORT_DIPNAME( 0x01, 0x01, "Right Coin Counter" )
399399   PORT_DIPSETTING(    0x01, DEF_STR( Off ) )
400400   PORT_DIPSETTING(    0x00, DEF_STR( On ) )
r2844r2845
416416   PORT_DIPSETTING(    0x40, "Short Name" )
417417   PORT_DIPSETTING(    0x00, "Long Name" )
418418
419   PORT_START /* port 4 */ /* MCU */
419   PORT_START_TAG("MCU") /* MCU */
420420   PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN )
421421   PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_START2 )
422422   PORT_SERVICE( 0x04, IP_ACTIVE_LOW )
r2844r2845
428428   PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_COIN2 )
429429   PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_COIN1 )
430430
431   PORT_START /* 5 */ /* 0xDx2C */
431   PORT_START_TAG("IN0") /* 0xDx2C */
432432   PORT_BIT(0x01, IP_ACTIVE_HIGH, IPT_BUTTON1 ) PORT_NAME("Gear Shift") PORT_CODE(KEYCODE_SPACE) PORT_TOGGLE /* Gear shift */
433433   PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNUSED )
434434   PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNUSED )
435435   PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_UNKNOWN ) /* FWD - negated bit 7 */
436436   PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_UNKNOWN ) /* REV - gear position */
437437
438   PORT_START /* 6 */ /* 0xDx2D */
438   PORT_START_TAG("IN1") /* 0xDx2D */
439439   PORT_BIT( 0x03, 0x00, IPT_PEDAL ) PORT_MINMAX(0x00, 0x02) PORT_SENSITIVITY(10) PORT_KEYDELTA(1) //gas pedal
440440   PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNUSED )
441441   PORT_BIT( 0x20, IP_ACTIVE_LOW,  IPT_TILT )
442442   //PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_BUTTON1 ) //gas1
443443   //PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_BUTTON2 ) //gas2
444444
445   PORT_START /* 7 */ /* 0xDx30 DRIVING_WHEEL */
445   PORT_START_TAG("WHEEL") /* 0xDx30 DRIVING_WHEEL */
446446   PORT_BIT( 0xff, 0x00, IPT_DIAL ) PORT_MINMAX(0x00, 0xff) PORT_SENSITIVITY(50) PORT_KEYDELTA(8)
447447
448448
src/mame/drivers/asuka.c
r2844r2845
219219#include "sound/2610intf.h"
220220#include "sound/2151intf.h"
221221#include "sound/msm5205.h"
222#include "includes/cchip.h"
222223
223224WRITE16_HANDLER( asuka_spritectrl_w );
224225
r2844r2845
230231VIDEO_UPDATE( asuka );
231232VIDEO_UPDATE( bonzeadv );
232233
233READ16_HANDLER( bonzeadv_cchip_r );
234READ16_HANDLER( bonzeadv_cchip_ctrl_r );
235READ16_HANDLER( bonzeadv_cchip_ram_r );
236WRITE16_HANDLER( bonzeadv_cchip_ctrl_w );
237WRITE16_HANDLER( bonzeadv_cchip_bank_w );
238WRITE16_HANDLER( bonzeadv_cchip_ram_w );
239
240
241234/***********************************************************
242235                INTERRUPTS
243236***********************************************************/
src/mame/drivers/backfire.c
r2844r2845
7171   state_save_register_global_pointer(deco16_pf12_control, 0x10/2);
7272   state_save_register_global_pointer(deco16_pf34_control, 0x10/2);
7373
74   deco16_2_video_init(0);
74   deco16_2_video_init(machine, 0);
7575
7676   deco16_pf1_colour_bank = 0x00;
7777   deco16_pf2_colour_bank = 0x40;
r2844r2845
228228{
229229   /* some kind of screen indicator?  checked by backfira set before it will boot */
230230   int backfire_screen = mame_rand(machine)&1;
231   return ((eeprom_read_bit()<<24) | input_port_read_indexed(machine, 0) | (input_port_read_indexed(machine, 3)<<16)) ^  (backfire_screen << 26) ;
231   return ((eeprom_read_bit()<<24) | input_port_read(machine, "IN0") | (input_port_read(machine, "IN3")<<16)) ^  (backfire_screen << 26) ;
232232}
233233
234234static READ32_HANDLER(backfire_control2_r)
235235{
236236//  logerror("%08x:Read eprom %08x (%08x)\n",activecpu_get_pc(),offset<<1,mem_mask);
237   return (eeprom_read_bit()<<24) | input_port_read_indexed(machine, 1) | (input_port_read_indexed(machine, 1)<<16);
237   return (eeprom_read_bit()<<24) | input_port_read(machine, "IN1") | (input_port_read(machine, "IN1")<<16);
238238}
239239
240240#ifdef UNUSED_FUNCTION
241241static READ32_HANDLER(backfire_control3_r)
242242{
243243//  logerror("%08x:Read eprom %08x (%08x)\n",activecpu_get_pc(),offset<<1,mem_mask);
244   return (eeprom_read_bit()<<24) | input_port_read_indexed(machine, 2) | (input_port_read_indexed(machine, 2)<<16);
244   return (eeprom_read_bit()<<24) | input_port_read(machine, "IN2") | (input_port_read(machine, "IN2")<<16);
245245}
246246#endif
247247
r2844r2845
303303#ifdef UNUSED_FUNCTION
304304READ32_HANDLER( backfire_unknown_wheel_r )
305305{
306   return input_port_read_indexed(machine, 4);
306   return input_port_read(machine, "PADDLE0");
307307}
308308
309309READ32_HANDLER( backfire_wheel1_r )
r2844r2845
356356
357357
358358static INPUT_PORTS_START( backfire )
359   PORT_START
359   PORT_START_TAG("IN0")
360360   PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_8WAY PORT_PLAYER(1)
361361   PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_8WAY PORT_PLAYER(1)
362362   PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_8WAY PORT_PLAYER(1)
r2844r2845
366366   PORT_BIT( 0x0040, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_PLAYER(1)
367367   PORT_BIT( 0x0080, IP_ACTIVE_LOW, IPT_START1 )
368368
369   PORT_START
369   PORT_START_TAG("IN1")
370370   PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_8WAY PORT_PLAYER(2)
371371   PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_8WAY PORT_PLAYER(2)
372372   PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_8WAY PORT_PLAYER(2)
r2844r2845
376376   PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_PLAYER(2)
377377   PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_START2 )
378378
379   PORT_START
379   PORT_START_TAG("IN2")
380380   PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_COIN1 )
381381   PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_COIN2 )
382382   PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_SERVICE1 )
r2844r2845
394394   PORT_BIT( 0x4000, IP_ACTIVE_LOW, IPT_BUTTON6 ) PORT_PLAYER(2)
395395   PORT_BIT( 0x8000, IP_ACTIVE_LOW, IPT_UNUSED )
396396
397   PORT_START
397   PORT_START_TAG("IN3")
398398   PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_COIN1 )
399399   PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_COIN2 )
400400   PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_SERVICE1 )
r2844r2845
404404   PORT_BIT( 0x0040, IP_ACTIVE_HIGH, IPT_VBLANK )
405405   PORT_BIT( 0x0080, IP_ACTIVE_LOW, IPT_UNUSED )
406406
407   PORT_START
407   PORT_START_TAG("PADDLE0")
408408   PORT_BIT ( 0x00ff, 0x0080, IPT_PADDLE ) PORT_SENSITIVITY(30) PORT_KEYDELTA(1)
409409
410   PORT_START
410   PORT_START_TAG("PADDLE1")
411411   PORT_BIT ( 0x00ff, 0x0080, IPT_PADDLE ) PORT_SENSITIVITY(30) PORT_KEYDELTA(1)
412412
413   PORT_START
413   PORT_START_TAG("UNK")
414414   /* ?? */
415415INPUT_PORTS_END
416416
src/mame/drivers/wrally.c
r2844r2845
9898#include "cpu/m68000/m68000.h"
9999#include "cpu/ds5002fp/ds5002fp.h"
100100#include "sound/okim6295.h"
101#include "includes/wrally.h"
101102
102/* from video/wrally.c */
103extern UINT16 *wrally_vregs;
104extern UINT16 *wrally_videoram;
105extern UINT16 *wrally_spriteram;
106103static UINT16 *wrally_shareram;
107104
108VIDEO_START( wrally );
109VIDEO_UPDATE( wrally );
110
111/* from machine/wrally.c */
112DRIVER_INIT( wrally );
113MACHINE_RESET( wrally );
114READ32_HANDLER( wrally_external_ram_iaddr );
115WRITE16_HANDLER( wrally_vram_w );
116WRITE16_HANDLER( wrally_flipscreen_w );
117WRITE16_HANDLER( OKIM6295_bankswitch_w );
118WRITE16_HANDLER( wrally_coin_counter_w );
119WRITE16_HANDLER( wrally_coin_lockout_w );
120
121105static ADDRESS_MAP_START( wrally_readmem, ADDRESS_SPACE_PROGRAM, 16 )
122106   AM_RANGE(0x000000, 0x0fffff) AM_ROM                                             /* ROM */
123107   AM_RANGE(0x100000, 0x103fff) AM_READWRITE(SMH_RAM, wrally_vram_w) AM_BASE(&wrally_videoram)   /* encrypted Video RAM */
src/mame/drivers/segas18.c
r2844r2845
284284
285285      /* miscellaneous output */
286286      case 0x06/2:
287         system18_set_grayscale(~data & 0x40);
287         system18_set_grayscale(machine, ~data & 0x40);
288288         segaic16_tilemap_set_flip(0, data & 0x20);
289289         segaic16_sprites_set_flip(0, data & 0x20);
290290/* These are correct according to cgfm's docs, but mwalker and ddcrew both
r2844r2845
310310
311311      /* CNT register */
312312      case 0x1c/2:
313         segaic16_set_display_enable(data & 2);
313         segaic16_set_display_enable(machine, data & 2);
314314         if ((old ^ data) & 4)
315            system18_set_vdp_enable(data & 4);
315            system18_set_vdp_enable(machine, data & 4);
316316         break;
317317   }
318318}
r2844r2845
358358      case 0x2000/2:
359359         if (ACCESSING_BITS_0_7)
360360         {
361            system18_set_vdp_mixing(data & 0xff);
361            system18_set_vdp_mixing(machine, data & 0xff);
362362            return;
363363         }
364364         break;
src/mame/drivers/astrocorp.c
r2844r2845
186186                                Input Ports
187187***************************************************************************/
188188
189INPUT_PORTS_START( showhand )
189static INPUT_PORTS_START( showhand )
190190   PORT_START_TAG("INPUTS")   // 54000
191191   PORT_BIT( 0x0001, IP_ACTIVE_LOW,  IPT_COIN1     )   PORT_IMPULSE(1)   // coin
192192   PORT_BIT( 0x0002, IP_ACTIVE_HIGH, IPT_BUTTON3   )   PORT_NAME("Payout")   PORT_CODE(KEYCODE_F1) // payout (must be 0 on startup)
src/mame/drivers/ajax.c
r2844r2845
1414#include "video/konamiic.h"
1515#include "sound/2151intf.h"
1616#include "sound/k007232.h"
17#include "includes/ajax.h"
1718
1819static WRITE8_HANDLER( k007232_extvol_w );
1920static WRITE8_HANDLER( sound_bank_w );
2021
21/* from machine/ajax.c */
22WRITE8_HANDLER( ajax_bankswitch_2_w );
23READ8_HANDLER( ajax_ls138_f10_r );
24WRITE8_HANDLER( ajax_ls138_f10_w );
25MACHINE_RESET( ajax );
26INTERRUPT_GEN( ajax_interrupt );
27
28/* from video/ajax.c */
29VIDEO_START( ajax );
30VIDEO_UPDATE( ajax );
31
3222/****************************************************************************/
3323
3424static ADDRESS_MAP_START( ajax_main_map, ADDRESS_SPACE_PROGRAM, 8 )
src/mame/drivers/nitedrvr.c
r2844r2845
3939#include "sound/discrete.h"
4040#include "nitedrvr.h"
4141
42READ8_HANDLER( nitedrvr_in0_r );
43READ8_HANDLER( nitedrvr_in1_r );
44READ8_HANDLER( nitedrvr_steering_reset_r );
45WRITE8_HANDLER( nitedrvr_steering_reset_w );
46WRITE8_HANDLER( nitedrvr_out0_w );
47WRITE8_HANDLER( nitedrvr_out1_w );
48void nitedrvr_register_machine_vars(void);
49
50extern UINT8 *nitedrvr_hvc;
51
52WRITE8_HANDLER( nitedrvr_videoram_w );
53WRITE8_HANDLER( nitedrvr_hvc_w );
54
55VIDEO_START( nitedrvr );
56VIDEO_UPDATE( nitedrvr );
57
5842/* Memory Map */
5943
6044static ADDRESS_MAP_START( nitedrvr_map, ADDRESS_SPACE_PROGRAM, 8 )
src/emu/debug/debugcmd.c
r2844r2845
20552055   const debug_cpu_info *info;
20562056   int spacenum = ref;
20572057   offs_t taddress;
2058   int intention;
20582059
20592060   /* validate parameters */
20602061   if (!debug_command_parameter_number(param[0], &address))
r2844r2845
20622063   info = debug_get_cpu_info(cpunum);
20632064
20642065   /* do the translation first */
2065   taddress = ADDR2BYTE_MASKED(address, info, spacenum);
2066   if (info->translate != NULL)
2066   for (intention = TRANSLATE_READ_DEBUG; intention <= TRANSLATE_FETCH_DEBUG; intention++)
20672067   {
2068      if ((*info->translate)(spacenum, TRANSLATE_READ_DEBUG, &taddress))
2069         debug_console_printf("%08X logical -> %08X physical\n", (UINT32)address, BYTE2ADDR(taddress, info, spacenum));
2068      static const char *intnames[] = { "Read", "Write", "Fetch" };
2069      taddress = ADDR2BYTE_MASKED(address, info, spacenum);
2070      if (info->translate != NULL)
2071      {
2072         if ((*info->translate)(spacenum, intention, &taddress))
2073         {
2074            const char *mapname = memory_get_handler_string(intention == TRANSLATE_WRITE_DEBUG, cpunum, spacenum, taddress);
2075            debug_console_printf("%7s: %08X logical == %08X physical -> %s\n", intnames[intention & 3], (UINT32)address, BYTE2ADDR(taddress, info, spacenum), mapname);
2076         }
2077         else
2078            debug_console_printf("%7s: %08X logical is unmapped\n", intnames[intention & 3], (UINT32)address);
2079      }
20702080      else
20712081      {
2072         debug_console_printf("%08X logical -> unmapped\n", (UINT32)address);
2073         return;
2082         const char *mapname = memory_get_handler_string(intention == TRANSLATE_WRITE_DEBUG, cpunum, spacenum, taddress);
2083         debug_console_printf("%7s: %08X -> %s\n", intnames[intention & 3], BYTE2ADDR(taddress, info, spacenum), mapname);
20742084      }
20752085   }
2076   else
2077      debug_console_printf("%08X physical\n", BYTE2ADDR(taddress, info, spacenum));
2078
2079   /* now do the mapping */
2080   debug_console_printf("  -> read: %s\n", memory_get_handler_string(0, cpunum, spacenum, taddress));
2081   debug_console_printf("  -> write: %s\n", memory_get_handler_string(1, cpunum, spacenum, taddress));
20822086}
20832087
20842088
src/emu/cpu/cpu.mak
r2844r2845
2424   $(CPUOBJ)/drccache.o \
2525   $(CPUOBJ)/drcfe.o \
2626   $(CPUOBJ)/drcuml.o \
27   $(CPUOBJ)/drcumld.o \
2827
2928DRCDEPS = \
3029   $(CPUSRC)/drcbeut.h \
3130   $(CPUSRC)/drccache.h \
3231   $(CPUSRC)/drcfe.h \
3332   $(CPUSRC)/drcuml.h \
34   $(CPUSRC)/drcumld.h \
3533   $(CPUSRC)/drcumlsh.h \
3634
3735# fixme - need to make this work for other target architectures (PPC)
r2844r2845
270268CPUDEFS += -DHAS_COP410=$(if $(filter COP410,$(CPUS)),1,0)
271269CPUDEFS += -DHAS_COP411=$(if $(filter COP411,$(CPUS)),1,0)
272270CPUDEFS += -DHAS_COP420=$(if $(filter COP420,$(CPUS)),1,0)
271CPUDEFS += -DHAS_COP421=$(if $(filter COP421,$(CPUS)),1,0)
273272
274273ifneq ($(filter COP410 COP411,$(CPUS)),)
275274OBJDIRS += $(CPUOBJ)/cop400
r2844r2845
277276DBGOBJS += $(CPUOBJ)/cop400/cop410ds.o
278277endif
279278
280ifneq ($(filter COP420,$(CPUS)),)
279ifneq ($(filter COP420 COP421,$(CPUS)),)
281280OBJDIRS += $(CPUOBJ)/cop400
282281CPUOBJS += $(CPUOBJ)/cop400/cop420.o
283282DBGOBJS += $(CPUOBJ)/cop400/cop420ds.o
r2844r2845
837836DBGOBJS += $(CPUOBJ)/mips/mips3dsm.o
838837endif
839838
840$(CPUOBJ)/mips/mips3drc.o:   $(CPUSRC)/mips/mips3drc.c \
841                     $(CPUSRC)/mips/mips3.h \
842                     $(CPUSRC)/mips/mips3com.h \
843                     $(CPUSRC)/mips/mips3fe.h \
844                     $(DRCDEPS)
839$(CPUOBJ)/powerpc/mips3com.o:   $(CPUSRC)/powerpc/mips3.h \
840                        $(CPUSRC)/powerpc/mips3com.h
845841
842$(CPUOBJ)/powerpc/mips3fe.o:   $(CPUSRC)/powerpc/mips3.h \
843                        $(CPUSRC)/powerpc/mips3com.h \
844                        $(CPUSRC)/powerpc/mips3fe.h
846845
846$(CPUOBJ)/mips/mips3drc.o:      $(CPUSRC)/mips/mips3drc.c \
847                        $(CPUSRC)/mips/mips3.h \
848                        $(CPUSRC)/mips/mips3com.h \
849                        $(CPUSRC)/mips/mips3fe.h \
850                        $(DRCDEPS)
847851
852
853
848854#-------------------------------------------------
849855# Mitsubishi M37702 and M37710 (based on 65C816)
850856#-------------------------------------------------
r2844r2845
11351141DBGOBJS += $(CPUOBJ)/powerpc/ppc_dasm.o
11361142endif
11371143
1144$(CPUOBJ)/powerpc/ppccom.o:   $(CPUSRC)/powerpc/ppc.h \
1145                     $(CPUSRC)/powerpc/ppccom.h
1146
1147$(CPUOBJ)/powerpc/ppcfe.o:   $(CPUSRC)/powerpc/ppc.h \
1148                     $(CPUSRC)/powerpc/ppccom.h \
1149                     $(CPUSRC)/powerpc/ppcfe.h
1150
11381151$(CPUOBJ)/powerpc/ppcdrc.o:   $(CPUSRC)/powerpc/ppcdrc.c \
11391152                     $(CPUSRC)/powerpc/ppc.h \
11401153                     $(CPUSRC)/powerpc/ppccom.h \
src/emu/cpu/drcfe.c
r2844r2845
1212
1313    Future improvements/changes:
1414
15    * change from detecting live to detecting unnecessary
16        - at the end of sequence: mustupdate.all = TRUE;
17        - scan backwards:
18            inst.mustupdate = inst.update & mustupdate;
19            if (inst.modified.reg) mustupdate.reg = FALSE;
20            if (inst.used.reg) mustupdate.reg = TRUE;
15    * more aggressive handling of needed registers for conditional
16        intrablock branches
2117
22     * rename UINT64 gpr, fpr to UINT32 reg[4]
23
2418***************************************************************************/
2519
2620#include <stddef.h>
r2844r2845
8074
8175static opcode_desc *describe_one(drcfe_state *drcfe, offs_t curpc);
8276static opcode_desc **build_sequence(drcfe_state *drcfe, opcode_desc **tailptr, int start, int end, UINT32 endflag);
83static void accumulate_live_info_forwards(opcode_desc *desc, UINT64 *gprread, UINT64 *gprwrite, UINT64 *fprread, UINT64 *fprwrite);
84static void accumulate_live_info_backwards(opcode_desc *desc, UINT64 *gprread, UINT64 *gprwrite, UINT64 *fprread, UINT64 *fprwrite);
77static void accumulate_required_backwards(opcode_desc *desc, UINT32 *reqmask);
8578static void release_descriptions(drcfe_state *drcfe, opcode_desc *desc);
8679
8780
r2844r2845
332325   {
333326      opcode_desc **tailptr = &desc->delay;
334327      offs_t delaypc = curpc + desc->length;
328      opcode_desc *prev = desc;
335329      UINT8 slotnum;
336330
337331      /* iterate over slots and describe them */
r2844r2845
345339         /* set the delay slot flag and a pointer back to the original branch */
346340         (*tailptr)->flags |= OPFLAG_IN_DELAY_SLOT;
347341         (*tailptr)->branch = desc;
342         (*tailptr)->prev = prev;
343         prev = *tailptr;
348344
349345         /* stop if we hit a page fault */
350346         if ((*tailptr)->flags & OPFLAG_COMPILER_PAGE_FAULT)
r2844r2845
367363
368364static opcode_desc **build_sequence(drcfe_state *drcfe, opcode_desc **tailptr, int start, int end, UINT32 endflag)
369365{
370   UINT64 gprread = 0, gprwrite = 0;
371   UINT64 fprread = 0, fprwrite = 0;
366   opcode_desc *prev = NULL;
372367   int consecutive = 0;
373368   int seqstart = -1;
374369   int skipsleft = 0;
r2844r2845
431426         if (curdesc->flags & OPFLAG_END_SEQUENCE)
432427            consecutive = 0;
433428
434         /* update register accumulators */
435         accumulate_live_info_forwards(curdesc, &gprread, &gprwrite, &fprread, &fprwrite);
436
437429         /* if this is the end of a sequence, work backwards */
438430         if (curdesc->flags & OPFLAG_END_SEQUENCE)
439431         {
432            UINT32 reqmask[4] = { 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff };
440433            int backdesc;
441434
442            /* loop until all the registers have been accounted for */
443            gprread = gprwrite = 0;
444            fprread = fprwrite = 0;
435            /* figure out which registers we *must* generate, assuming at the end all must be */
445436            if (seqstart != -1)
446437               for (backdesc = descnum; backdesc != seqstart - 1; backdesc--)
447438                  if (drcfe->desc_array[backdesc] != NULL)
448                     accumulate_live_info_backwards(drcfe->desc_array[backdesc], &gprread, &gprwrite, &fprread, &fprwrite);
439                     accumulate_required_backwards(drcfe->desc_array[backdesc], reqmask);
449440
450441            /* reset the register states */
451442            seqstart = -1;
452            gprread = gprwrite = 0;
453            fprread = fprwrite = 0;
454443         }
455444
456445         /* if we have instructions remaining to be skipped, and this instruction is a branch target */
r2844r2845
463452         {
464453            *tailptr = curdesc;
465454            tailptr = &curdesc->next;
455            curdesc->prev = prev;
456            prev = curdesc;
466457         }
467458         else
468459            desc_free(drcfe, curdesc);
r2844r2845
484475
485476
486477/*-------------------------------------------------
487    accumulate_live_info_forwards - recursively
478    accumulate_required_backwards - recursively
488479    accumulate live register liveness information
489    walking in a forward direction
480    walking in a backwards direction
490481-------------------------------------------------*/
491482
492static void accumulate_live_info_forwards(opcode_desc *desc, UINT64 *gprread, UINT64 *gprwrite, UINT64 *fprread, UINT64 *fprwrite)
483static void accumulate_required_backwards(opcode_desc *desc, UINT32 *reqmask)
493484{
494   /* set the initial information */
495   desc->gpr.liveread = (*gprread |= desc->gpr.used);
496   desc->gpr.livewrite = (*gprwrite |= desc->gpr.modified);
497   desc->fpr.liveread = (*fprread |= desc->fpr.used);
498   desc->fpr.livewrite = (*fprwrite |= desc->fpr.modified);
499
500485   /* recursively handle delay slots */
501486   if (desc->delay != NULL)
502      accumulate_live_info_forwards(desc->delay, gprread, gprwrite, fprread, fprwrite);
503}
487      accumulate_required_backwards(desc->delay, reqmask);
504488
489   /* if this is a branch, we have to reset our requests */
490   if (desc->flags & OPFLAG_IS_BRANCH)
491      reqmask[0] = reqmask[1] = reqmask[2] = reqmask[3] = 0xffffffff;
505492
506/*-------------------------------------------------
507    accumulate_live_info_backwards - recursively
508    accumulate live register liveness information
509    walking in a backwards direction
510-------------------------------------------------*/
493   /* determine the required registers */
494   desc->regreq[0] = desc->regout[0] & reqmask[0];
495   desc->regreq[1] = desc->regout[1] & reqmask[1];
496   desc->regreq[2] = desc->regout[2] & reqmask[2];
497   desc->regreq[3] = desc->regout[3] & reqmask[3];
511498
512static void accumulate_live_info_backwards(opcode_desc *desc, UINT64 *gprread, UINT64 *gprwrite, UINT64 *fprread, UINT64 *fprwrite)
513{
514   /* recursively handle delay slots */
515   if (desc->delay != NULL)
516      accumulate_live_info_backwards(desc->delay, gprread, gprwrite, fprread, fprwrite);
499   /* any registers modified by this instruction aren't required upstream until referenced */
500   reqmask[0] &= ~desc->regout[0];
501   reqmask[1] &= ~desc->regout[1];
502   reqmask[2] &= ~desc->regout[2];
503   reqmask[3] &= ~desc->regout[3];
517504
518   /* accumulate the info from this instruction */
519   desc->gpr.liveread &= (*gprread |= desc->gpr.used);
520   desc->gpr.livewrite &= (*gprwrite |= desc->gpr.modified);
521   desc->fpr.liveread &= (*fprread |= desc->fpr.used);
522   desc->fpr.livewrite &= (*fprwrite |= desc->fpr.modified);
505   /* any registers required by this instruction now get marked required */
506   reqmask[0] |= desc->regin[0];
507   reqmask[1] |= desc->regin[1];
508   reqmask[2] |= desc->regin[2];
509   reqmask[3] |= desc->regin[3];
523510}
524511
525512
src/emu/cpu/drcuml.c
r2844r2845
1313    Future improvements/changes:
1414
1515    * UML optimizer:
16        - detects constant operations, converts to MOV
17        - eliminates no-ops (add i0,i0,0)
18        - determines flags automatically
1916        - constant folding
2017
2118    * Write a back-end validator:
r2844r2845
4138
4239#include "drcuml.h"
4340#include "drcumlsh.h"
44#include "drcumld.h"
4541#include "deprecat.h"
42#include "eminline.h"
4643#include "mame.h"
4744#include <stdarg.h>
4845#include <setjmp.h>
r2844r2845
5350***************************************************************************/
5451
5552#define VALIDATE_BACKEND      (0)
53#define LOG_SIMPLIFICATIONS      (0)
5654
5755
5856
r2844r2845
6159***************************************************************************/
6260
6361/* opcode validation condition/flag valid bitmasks */
64#define OV_CONDFLAG_NONE      0x00
65#define OV_CONDFLAG_COND      0x80
66#define OV_CONDFLAG_SZ         (DRCUML_FLAG_S | DRCUML_FLAG_Z)
67#define OV_CONDFLAG_SZC         (DRCUML_FLAG_S | DRCUML_FLAG_Z | DRCUML_FLAG_C)
68#define OV_CONDFLAG_SZVC      (DRCUML_FLAG_S | DRCUML_FLAG_Z | DRCUML_FLAG_V | DRCUML_FLAG_C)
69#define OV_CONDFLAG_UZC         (DRCUML_FLAG_U | DRCUML_FLAG_Z | DRCUML_FLAG_C)
70#define OV_CONDFLAG_FLAGS      0x1f
62#define OPFLAGS_NONE   0x00
63#define OPFLAGS_C      DRCUML_FLAG_C
64#define OPFLAGS_SZ      (DRCUML_FLAG_S | DRCUML_FLAG_Z)
65#define OPFLAGS_SZC      (DRCUML_FLAG_S | DRCUML_FLAG_Z | DRCUML_FLAG_C)
66#define OPFLAGS_SZV      (DRCUML_FLAG_S | DRCUML_FLAG_Z | DRCUML_FLAG_V)
67#define OPFLAGS_SZVC   (DRCUML_FLAG_S | DRCUML_FLAG_Z | DRCUML_FLAG_V | DRCUML_FLAG_C)
68#define OPFLAGS_UZC      (DRCUML_FLAG_U | DRCUML_FLAG_Z | DRCUML_FLAG_C)
69#define OPFLAGS_ALL      0x1f
70#define OPFLAGS_P1      0x81
71#define OPFLAGS_P2      0x82
72#define OPFLAGS_P3      0x83
73#define OPFLAGS_P4      0x84
7174
72/* bitmasks of valid parameter types and flags */
73#define OV_PARAM_ALLOWED_NONE   (1 << DRCUML_PTYPE_NONE)
74#define OV_PARAM_ALLOWED_IMM   (1 << DRCUML_PTYPE_IMMEDIATE)
75#define OV_PARAM_ALLOWED_IREG   (1 << DRCUML_PTYPE_INT_REGISTER)
76#define OV_PARAM_ALLOWED_FREG   (1 << DRCUML_PTYPE_FLOAT_REGISTER)
77#define OV_PARAM_ALLOWED_MVAR   (1 << DRCUML_PTYPE_MAPVAR)
78#define OV_PARAM_ALLOWED_MEM   (1 << DRCUML_PTYPE_MEMORY)
79#define OV_PARAM_FLAG_ANYMEM   0x100
80#define OV_PARAM_FLAG_FIXED4   0x200
81#define OV_PARAM_FLAG_FIXED8   0x400
75/* parameter input/output states */
76#define PIO_IN         0x01
77#define PIO_OUT         0x02
78#define PIO_INOUT      (PIO_IN | PIO_OUT)
8279
83/* opcode validation parameter valid bitmasks */
84#define OV_PARAM_ALLOWED_ANYMEM   (OV_PARAM_ALLOWED_MEM | OV_PARAM_FLAG_ANYMEM)
85#define OV_PARAM_ALLOWED_IMV   (OV_PARAM_ALLOWED_IMM | OV_PARAM_ALLOWED_MVAR)
86#define OV_PARAM_ALLOWED_IMV4   (OV_PARAM_ALLOWED_IMM | OV_PARAM_ALLOWED_MVAR | OV_PARAM_FLAG_FIXED4)
87#define OV_PARAM_ALLOWED_IMV8   (OV_PARAM_ALLOWED_IMM | OV_PARAM_ALLOWED_MVAR | OV_PARAM_FLAG_FIXED8)
88#define OV_PARAM_ALLOWED_IRM   (OV_PARAM_ALLOWED_IREG | OV_PARAM_ALLOWED_MEM)
89#define OV_PARAM_ALLOWED_IRM4   (OV_PARAM_ALLOWED_IREG | OV_PARAM_ALLOWED_MEM | OV_PARAM_FLAG_FIXED4)
90#define OV_PARAM_ALLOWED_IRM8   (OV_PARAM_ALLOWED_IREG | OV_PARAM_ALLOWED_MEM | OV_PARAM_FLAG_FIXED8)
91#define OV_PARAM_ALLOWED_FRM   (OV_PARAM_ALLOWED_FREG | OV_PARAM_ALLOWED_MEM)
92#define OV_PARAM_ALLOWED_FRM4   (OV_PARAM_ALLOWED_FREG | OV_PARAM_ALLOWED_MEM | OV_PARAM_FLAG_FIXED4)
93#define OV_PARAM_ALLOWED_FRM8   (OV_PARAM_ALLOWED_FREG | OV_PARAM_ALLOWED_MEM | OV_PARAM_FLAG_FIXED8)
94#define OV_PARAM_ALLOWED_IANY   (OV_PARAM_ALLOWED_IRM | OV_PARAM_ALLOWED_IMV)
95#define OV_PARAM_ALLOWED_IANY4   (OV_PARAM_ALLOWED_IRM | OV_PARAM_ALLOWED_IMV | OV_PARAM_FLAG_FIXED4)
96#define OV_PARAM_ALLOWED_IANY8   (OV_PARAM_ALLOWED_IRM | OV_PARAM_ALLOWED_IMV | OV_PARAM_FLAG_FIXED8)
97#define OV_PARAM_ALLOWED_FANY   (OV_PARAM_ALLOWED_FRM)
98#define OV_PARAM_ALLOWED_FANY4   (OV_PARAM_ALLOWED_FRM | OV_PARAM_FLAG_FIXED4)
99#define OV_PARAM_ALLOWED_FANY8   (OV_PARAM_ALLOWED_FRM | OV_PARAM_FLAG_FIXED8)
80/* parameter sizes */
81#define PSIZE_4         DRCUML_SIZE_DWORD
82#define PSIZE_8         DRCUML_SIZE_QWORD
83#define PSIZE_OP      0x80
84#define PSIZE_P1      0x81
85#define PSIZE_P2      0x82
86#define PSIZE_P3      0x83
87#define PSIZE_P4      0x84
10088
89/* basic parameter types */
90#define PTYPES_NONE      0
91#define PTYPES_IMM      (1 << DRCUML_PTYPE_IMMEDIATE)
92#define PTYPES_IREG      (1 << DRCUML_PTYPE_INT_REGISTER)
93#define PTYPES_FREG      (1 << DRCUML_PTYPE_FLOAT_REGISTER)
94#define PTYPES_MVAR      (1 << DRCUML_PTYPE_MAPVAR)
95#define PTYPES_MEM      (1 << DRCUML_PTYPE_MEMORY)
10196
97/* special parameter types */
98#define PTYPES_PTR      (PTYPES_MEM | 0x1000)
99#define PTYPES_STATE   (PTYPES_MEM | 0x2000)
100#define PTYPES_STR      (PTYPES_MEM | 0x3000)
101#define PTYPES_CFUNC   (PTYPES_MEM | 0x4000)
102#define PTYPES_HAND      (PTYPES_MEM | 0x5000)
103#define PTYPES_SIZE      (PTYPES_IMM | 0x8000)
104#define PTYPES_SPACE   (PTYPES_IMM | 0x9000)
105#define PTYPES_SPSZ      (PTYPES_IMM | 0xa000)
106#define PTYPES_FMOD      (PTYPES_IMM | 0xb000)
107#define PTYPES_LAB      (PTYPES_IMM | 0xc000)
102108
109/* combinations of types */
110#define PTYPES_IRM      (PTYPES_IREG | PTYPES_MEM)
111#define PTYPES_FRM      (PTYPES_FREG | PTYPES_MEM)
112#define PTYPES_IMV      (PTYPES_IMM | PTYPES_MVAR)
113#define PTYPES_IANY      (PTYPES_IRM | PTYPES_IMV)
114#define PTYPES_FANY      (PTYPES_FRM)
115
116
117
103118/***************************************************************************
104119    TYPE DEFINITIONS
105120***************************************************************************/
106121
122/* structure describing a UML symbol */
123typedef struct _drcuml_symbol drcuml_symbol;
124struct _drcuml_symbol
125{
126   drcuml_symbol *         next;            /* link to the next symbol */
127   drccodeptr            base;            /* base of the symbol */
128   UINT32               length;            /* length of the symbol */
129   char               symname[1];         /* name of the symbol */
130};
131
132
107133/* structure describing UML generation state */
108134struct _drcuml_state
109135{
110136   drccache *            cache;            /* pointer to the codegen cache */
111137   drcuml_block *         blocklist;         /* list of active blocks */
112
113138   const drcbe_interface *   beintf;            /* backend interface pointer */
114139   drcbe_state *         bestate;         /* pointer to the back-end state */
115
116140   drcuml_codehandle *      handlelist;         /* head of linked list of handles */
117
118141   FILE *               umllog;            /* handle to the UML logfile */
142   drcuml_symbol *         symlist;         /* head of linked list of symbols */
143   drcuml_symbol **      symtailptr;         /* pointer to tail of linked list of symbols */
119144};
120145
121146
r2844r2845
142167};
143168
144169
145/* structure describing an opcode for validation */
146typedef struct _drcuml_opcode_valid drcuml_opcode_valid;
147struct _drcuml_opcode_valid
148{
149   drcuml_opcode         opcode;            /* the opcode itself */
150   UINT8               sizes;            /* allowed sizes */
151   UINT8               condflags;         /* allowed conditions/flags */
152   UINT16               ptypes[4];         /* allowed types for parameters */
153};
154
155
156170/* structure describing back-end validation test */
157171typedef struct _bevalidate_test bevalidate_test;
158172struct _bevalidate_test
159173{
160   drcuml_opcode      opcode;
161   UINT8            size;
162   UINT8            destmask;
163   UINT8            iflags;
164   UINT8            flags;
165   UINT64            param[4];
174   drcuml_opcode         opcode;
175   UINT8               size;
176   UINT8               destmask;
177   UINT8               iflags;
178   UINT8               flags;
179   UINT64               param[4];
166180};
167181
168182
r2844r2845
172186***************************************************************************/
173187
174188/* macro to simplify the table */
175#define OPVALID_ENTRY_0(op,sizes,condflag)            { DRCUML_OP_##op, sizes, OV_CONDFLAG_##condflag, { OV_PARAM_ALLOWED_NONE, OV_PARAM_ALLOWED_NONE, OV_PARAM_ALLOWED_NONE, OV_PARAM_ALLOWED_NONE } },
176#define OPVALID_ENTRY_1(op,sizes,condflag,p0)         { DRCUML_OP_##op, sizes, OV_CONDFLAG_##condflag, { OV_PARAM_ALLOWED_##p0, OV_PARAM_ALLOWED_NONE, OV_PARAM_ALLOWED_NONE, OV_PARAM_ALLOWED_NONE } },
177#define OPVALID_ENTRY_2(op,sizes,condflag,p0,p1)      { DRCUML_OP_##op, sizes, OV_CONDFLAG_##condflag, { OV_PARAM_ALLOWED_##p0, OV_PARAM_ALLOWED_##p1, OV_PARAM_ALLOWED_NONE, OV_PARAM_ALLOWED_NONE } },
178#define OPVALID_ENTRY_3(op,sizes,condflag,p0,p1,p2)      { DRCUML_OP_##op, sizes, OV_CONDFLAG_##condflag, { OV_PARAM_ALLOWED_##p0, OV_PARAM_ALLOWED_##p1, OV_PARAM_ALLOWED_##p2, OV_PARAM_ALLOWED_NONE } },
179#define OPVALID_ENTRY_4(op,sizes,condflag,p0,p1,p2,p3)   { DRCUML_OP_##op, sizes, OV_CONDFLAG_##condflag, { OV_PARAM_ALLOWED_##p0, OV_PARAM_ALLOWED_##p1, OV_PARAM_ALLOWED_##p2, OV_PARAM_ALLOWED_##p3 } },
189#define PINFO(inout, size, types)                           { PIO_##inout, PSIZE_##size, PTYPES_##types }
190#define OPINFO0(op,str,sizes,cond,iflag,oflag,mflag)            { DRCUML_OP_##op, str, sizes, cond, OPFLAGS_##iflag, OPFLAGS_##oflag, OPFLAGS_##mflag, { { 0 } } },
191#define OPINFO1(op,str,sizes,cond,iflag,oflag,mflag,p0)            { DRCUML_OP_##op, str, sizes, cond, OPFLAGS_##iflag, OPFLAGS_##oflag, OPFLAGS_##mflag, { p0 } },
192#define OPINFO2(op,str,sizes,cond,iflag,oflag,mflag,p0,p1)         { DRCUML_OP_##op, str, sizes, cond, OPFLAGS_##iflag, OPFLAGS_##oflag, OPFLAGS_##mflag, { p0, p1 } },
193#define OPINFO3(op,str,sizes,cond,iflag,oflag,mflag,p0,p1,p2)      { DRCUML_OP_##op, str, sizes, cond, OPFLAGS_##iflag, OPFLAGS_##oflag, OPFLAGS_##mflag, { p0, p1, p2 } },
194#define OPINFO4(op,str,sizes,cond,iflag,oflag,mflag,p0,p1,p2,p3)   { DRCUML_OP_##op, str, sizes, cond, OPFLAGS_##iflag, OPFLAGS_##oflag, OPFLAGS_##mflag, { p0, p1, p2, p3 } },
180195
181196/* opcode validation table */
182static const drcuml_opcode_valid opcode_valid_list[] =
197static const drcuml_opcode_info opcode_info_source[] =
183198{
184199   /* Compile-time opcodes */
185   OPVALID_ENTRY_1(HANDLE,  4,   NONE,  MEM)
186   OPVALID_ENTRY_2(HASH,    4,   NONE,  IMV,  IMV)
187   OPVALID_ENTRY_1(LABEL,   4,   NONE,  IMV)
188   OPVALID_ENTRY_1(COMMENT, 4,   NONE,  ANYMEM)
189   OPVALID_ENTRY_2(MAPVAR,  4,   NONE,  MVAR, IMV)
200   OPINFO1(HANDLE,  "handle",   4,   FALSE, NONE, NONE, NONE, PINFO(IN, OP, HAND))
201   OPINFO2(HASH,    "hash",     4,   FALSE, NONE, NONE, NONE, PINFO(IN, OP, IMV), PINFO(IN, OP, IMV))
202   OPINFO1(LABEL,   "label",    4,   FALSE, NONE, NONE, NONE, PINFO(IN, OP, LAB))
203   OPINFO1(COMMENT, "comment",  4,   FALSE, NONE, NONE, NONE, PINFO(IN, OP, STR))
204   OPINFO2(MAPVAR,  "mapvar",   4,   FALSE, NONE, NONE, NONE, PINFO(OUT, OP, MVAR), PINFO(IN, OP, IMV))
190205
191206   /* Control Flow Operations */
192   OPVALID_ENTRY_1(DEBUG,   4,   NONE,  IANY)
193   OPVALID_ENTRY_1(EXIT,    4,   COND,  IANY)
194   OPVALID_ENTRY_3(HASHJMP, 4,   NONE,  IANY, IANY, MEM)
195   OPVALID_ENTRY_1(LABEL,   4,   NONE,  IMV)
196   OPVALID_ENTRY_1(JMP,     4,   COND,  IMV)
197   OPVALID_ENTRY_2(EXH,     4,   COND,  MEM,  IANY)
198   OPVALID_ENTRY_1(CALLH,   4,   COND,  MEM)
199   OPVALID_ENTRY_0(RET,     4,   COND)
200   OPVALID_ENTRY_2(CALLC,   4,   COND,  ANYMEM,ANYMEM)
201   OPVALID_ENTRY_2(RECOVER, 4,   NONE,  IRM,  MVAR)
207   OPINFO0(NOP,     "nop",      4,   FALSE, NONE, NONE, NONE)
208   OPINFO1(DEBUG,   "debug",    4,   FALSE, NONE, NONE, ALL,  PINFO(IN, OP, IANY))
209   OPINFO1(EXIT,    "exit",     4,   TRUE,  NONE, NONE, ALL,  PINFO(IN, OP, IANY))
210   OPINFO3(HASHJMP, "hashjmp",  4,   FALSE, NONE, NONE, ALL,  PINFO(IN, OP, IANY), PINFO(IN, OP, IANY), PINFO(IN, OP, HAND))
211   OPINFO1(JMP,     "jmp",      4,   TRUE,  NONE, NONE, NONE, PINFO(IN, OP, LAB))
212   OPINFO2(EXH,     "exh",      4,   TRUE,  NONE, NONE, ALL,  PINFO(IN, OP, HAND), PINFO(IN, OP, IANY))
213   OPINFO1(CALLH,   "callh",    4,   TRUE,  NONE, NONE, ALL,  PINFO(IN, OP, HAND))
214   OPINFO0(RET,     "ret",      4,   TRUE,  NONE, NONE, ALL)
215   OPINFO2(CALLC,   "callc",    4,   TRUE,  NONE, NONE, ALL,  PINFO(IN, OP, CFUNC), PINFO(IN, OP, PTR))
216   OPINFO2(RECOVER, "recover",  4,   FALSE, NONE, NONE, ALL,  PINFO(OUT, OP, IRM), PINFO(IN, OP, MVAR))
202217
203218   /* Internal Register Operations */
204   OPVALID_ENTRY_1(SETFMOD, 4,   NONE,  IANY)
205   OPVALID_ENTRY_1(GETFMOD, 4,   NONE,  IRM)
206   OPVALID_ENTRY_1(GETEXP,  4,   NONE,  IRM)
207   OPVALID_ENTRY_1(GETFLGS, 4,   NONE,  IRM)
208   OPVALID_ENTRY_1(SAVE,    4,   NONE,  ANYMEM)
209   OPVALID_ENTRY_1(RESTORE, 4,   NONE,  ANYMEM)
219   OPINFO1(SETFMOD, "setfmod",  4,   FALSE, NONE, NONE, ALL,  PINFO(IN, OP, IANY))
220   OPINFO1(GETFMOD, "getfmod",  4,   FALSE, NONE, NONE, ALL,  PINFO(OUT, OP, IRM))
221   OPINFO1(GETEXP,  "getexp",   4,   FALSE, NONE, NONE, ALL,  PINFO(OUT, OP, IRM))
222   OPINFO2(GETFLGS, "getflgs",  4,   FALSE, P2,   NONE, ALL,  PINFO(OUT, OP, IRM), PINFO(IN, OP, IMV))
223   OPINFO1(SAVE,    "save",     4,   FALSE, ALL,  NONE, ALL,  PINFO(OUT, OP, STATE))
224   OPINFO1(RESTORE, "restore",  4,   FALSE, NONE, ALL,  ALL,  PINFO(IN, OP, STATE))
210225
211226   /* Integer Operations */
212   OPVALID_ENTRY_4(LOAD,    4|8, NONE,  IRM,   ANYMEM,IANY4, IMV)
213   OPVALID_ENTRY_4(LOADS,   4|8, NONE,  IRM,   ANYMEM,IANY4, IMV)
214   OPVALID_ENTRY_4(STORE,   4|8, NONE,  ANYMEM,IANY4, IANY,  IMV)
215   OPVALID_ENTRY_3(READ,    4|8, NONE,  IRM,   IANY4, IMV)
216   OPVALID_ENTRY_4(READM,   4|8, NONE,  IRM,   IANY4, IANY,  IMV)
217   OPVALID_ENTRY_3(WRITE,   4|8, NONE,  IANY4, IANY,  IMV)
218   OPVALID_ENTRY_4(WRITEM,  4|8, NONE,  IANY4, IANY,  IANY,  IMV)
219   OPVALID_ENTRY_2(CARRY,   4|8, NONE,  IANY,  IANY)
220   OPVALID_ENTRY_2(MOV,     4|8, COND,  IRM,   IANY)
221   OPVALID_ENTRY_1(SET,     4|8, COND,  IRM)
222   OPVALID_ENTRY_3(SEXT,    4|8, NONE,  IRM,   IANY4, IMV)
223   OPVALID_ENTRY_4(ROLAND,  4|8, NONE,  IRM,   IANY,  IANY,  IANY)
224   OPVALID_ENTRY_4(ROLINS,  4|8, NONE,  IRM,   IANY,  IANY,  IANY)
225   OPVALID_ENTRY_3(ADD,     4|8, SZVC,  IRM,   IANY,  IANY)
226   OPVALID_ENTRY_3(ADDC,    4|8, SZVC,  IRM,   IANY,  IANY)
227   OPVALID_ENTRY_3(SUB,     4|8, SZVC,  IRM,   IANY,  IANY)
228   OPVALID_ENTRY_3(SUBB,    4|8, SZVC,  IRM,   IANY,  IANY)
229   OPVALID_ENTRY_2(CMP,     4|8, SZVC,  IANY,  IANY)
230   OPVALID_ENTRY_4(MULU,    4|8, SZ,    IRM,   IRM,   IANY,  IANY)
231   OPVALID_ENTRY_4(MULS,    4|8, SZ,    IRM,   IRM,   IANY,  IANY)
232   OPVALID_ENTRY_4(DIVU,    4|8, SZ,    IRM,   IRM,   IANY,  IANY)
233   OPVALID_ENTRY_4(DIVS,    4|8, SZ,    IRM,   IRM,   IANY,  IANY)
234   OPVALID_ENTRY_3(AND,     4|8, SZ,    IRM,   IANY,  IANY)
235   OPVALID_ENTRY_2(TEST,    4|8, SZ,    IANY,  IANY)
236   OPVALID_ENTRY_3(OR,      4|8, SZ,    IRM,   IANY,  IANY)
237   OPVALID_ENTRY_3(XOR,     4|8, SZ,    IRM,   IANY,  IANY)
238   OPVALID_ENTRY_2(LZCNT,   4|8, NONE,  IRM,   IANY)
239   OPVALID_ENTRY_2(BSWAP,   4|8, NONE,  IRM,   IANY)
240   OPVALID_ENTRY_3(SHL,     4|8, SZC,   IRM,   IANY,  IANY)
241   OPVALID_ENTRY_3(SHR,     4|8, SZC,   IRM,   IANY,  IANY)
242   OPVALID_ENTRY_3(SAR,     4|8, SZC,   IRM,   IANY,  IANY)
243   OPVALID_ENTRY_3(ROL,     4|8, SZC,   IRM,   IANY,  IANY)
244   OPVALID_ENTRY_3(ROLC,    4|8, SZC,   IRM,   IANY,  IANY)
245   OPVALID_ENTRY_3(ROR,     4|8, SZC,   IRM,   IANY,  IANY)
246   OPVALID_ENTRY_3(RORC,    4|8, SZC,   IRM,   IANY,  IANY)
227   OPINFO4(LOAD,    "!load",    4|8, FALSE, NONE, NONE, ALL,  PINFO(OUT, OP, IRM), PINFO(IN, OP, PTR), PINFO(IN, 4, IANY), PINFO(IN, OP, SIZE))
228   OPINFO4(LOADS,   "!loads",   4|8, FALSE, NONE, NONE, ALL,  PINFO(OUT, OP, IRM), PINFO(IN, OP, PTR), PINFO(IN, 4, IANY), PINFO(IN, OP, SIZE))
229   OPINFO4(STORE,   "!store",   4|8, FALSE, NONE, NONE, ALL,  PINFO(IN, OP, PTR), PINFO(IN, 4, IANY), PINFO(IN, OP, IANY), PINFO(IN, OP, SIZE))
230   OPINFO3(READ,    "!read",    4|8, FALSE, NONE, NONE, ALL,  PINFO(OUT, OP, IRM), PINFO(IN, 4, IANY), PINFO(IN, OP, SPSZ))
231   OPINFO4(READM,   "!readm",   4|8, FALSE, NONE, NONE, ALL,  PINFO(OUT, OP, IRM), PINFO(IN, 4, IANY), PINFO(IN, OP, IANY), PINFO(IN, OP, SPSZ))
232   OPINFO3(WRITE,   "!write",   4|8, FALSE, NONE, NONE, ALL,  PINFO(IN, 4, IANY), PINFO(IN, OP, IANY), PINFO(IN, OP, SPSZ))
233   OPINFO4(WRITEM,  "!writem",  4|8, FALSE, NONE, NONE, ALL,  PINFO(IN, 4, IANY), PINFO(IN, OP, IANY), PINFO(IN, OP, IANY), PINFO(IN, OP, SPSZ))
234   OPINFO2(CARRY,   "!carry",   4|8, FALSE, NONE, C,    ALL,  PINFO(IN, OP, IANY), PINFO(IN, OP, IANY))
235   OPINFO2(MOV,     "!mov",     4|8, TRUE,  NONE, NONE, NONE, PINFO(OUT, OP, IRM), PINFO(IN, OP, IANY))
236   OPINFO1(SET,     "!set",     4|8, TRUE,  NONE, NONE, ALL,  PINFO(OUT, OP, IRM))
237   OPINFO3(SEXT,    "!sext",    4|8, FALSE, NONE, SZ,   ALL,  PINFO(OUT, OP, IRM), PINFO(IN, P3, IANY), PINFO(IN, OP, SIZE))
238   OPINFO4(ROLAND,  "!roland",  4|8, FALSE, NONE, SZ,   ALL,  PINFO(OUT, OP, IRM), PINFO(IN, OP, IANY), PINFO(IN, OP, IANY), PINFO(IN, OP, IANY))
239   OPINFO4(ROLINS,  "!rolins",  4|8, FALSE, NONE, SZ,   ALL,  PINFO(INOUT, OP, IRM), PINFO(IN, OP, IANY), PINFO(IN, OP, IANY), PINFO(IN, OP, IANY))
240   OPINFO3(ADD,     "!add",     4|8, FALSE, NONE, SZVC, ALL,  PINFO(OUT, OP, IRM), PINFO(IN, OP, IANY), PINFO(IN, OP, IANY))
241   OPINFO3(ADDC,    "!addc",    4|8, FALSE, C,    SZVC, ALL,  PINFO(OUT, OP, IRM), PINFO(IN, OP, IANY), PINFO(IN, OP, IANY))
242   OPINFO3(SUB,     "!sub",     4|8, FALSE, NONE, SZVC, ALL,  PINFO(OUT, OP, IRM), PINFO(IN, OP, IANY), PINFO(IN, OP, IANY))
243   OPINFO3(SUBB,    "!subb",    4|8, FALSE, C,    SZVC, ALL,  PINFO(OUT, OP, IRM), PINFO(IN, OP, IANY), PINFO(IN, OP, IANY))
244   OPINFO2(CMP,     "!cmp",     4|8, FALSE, NONE, SZVC, ALL,  PINFO(IN, OP, IANY), PINFO(IN, OP, IANY))
245   OPINFO4(MULU,    "!mulu",    4|8, FALSE, NONE, SZV,  ALL,  PINFO(OUT, OP, IRM), PINFO(OUT, OP, IRM), PINFO(IN, OP, IANY), PINFO(IN, OP, IANY))
246   OPINFO4(MULS,    "!muls",    4|8, FALSE, NONE, SZV,  ALL,  PINFO(OUT, OP, IRM), PINFO(OUT, OP, IRM), PINFO(IN, OP, IANY), PINFO(IN, OP, IANY))
247   OPINFO4(DIVU,    "!divu",    4|8, FALSE, NONE, SZV,  ALL,  PINFO(OUT, OP, IRM), PINFO(OUT, OP, IRM), PINFO(IN, OP, IANY), PINFO(IN, OP, IANY))
248   OPINFO4(DIVS,    "!divs",    4|8, FALSE, NONE, SZV,  ALL,  PINFO(OUT, OP, IRM), PINFO(OUT, OP, IRM), PINFO(IN, OP, IANY), PINFO(IN, OP, IANY))
249   OPINFO3(AND,     "!and",     4|8, FALSE, NONE, SZ,   ALL,  PINFO(OUT, OP, IRM), PINFO(IN, OP, IANY), PINFO(IN, OP, IANY))
250   OPINFO2(TEST,    "!test",    4|8, FALSE, NONE, SZ,   ALL,  PINFO(IN, OP, IANY), PINFO(IN, OP, IANY))
251   OPINFO3(OR,      "!or",      4|8, FALSE, NONE, SZ,   ALL,  PINFO(OUT, OP, IRM), PINFO(IN, OP, IANY), PINFO(IN, OP, IANY))
252   OPINFO3(XOR,     "!xor",     4|8, FALSE, NONE, SZ,   ALL,  PINFO(OUT, OP, IRM), PINFO(IN, OP, IANY), PINFO(IN, OP, IANY))
253   OPINFO2(LZCNT,   "!lzcnt",   4|8, FALSE, NONE, SZ,   ALL,  PINFO(OUT, OP, IRM), PINFO(IN, OP, IANY))
254   OPINFO2(BSWAP,   "!bswap",   4|8, FALSE, NONE, SZ,   ALL,  PINFO(OUT, OP, IRM), PINFO(IN, OP, IANY))
255   OPINFO3(SHL,     "!shl",     4|8, FALSE, NONE, SZC,  ALL,  PINFO(OUT, OP, IRM), PINFO(IN, OP, IANY), PINFO(IN, OP, IANY))
256   OPINFO3(SHR,     "!shr",     4|8, FALSE, NONE, SZC,  ALL,  PINFO(OUT, OP, IRM), PINFO(IN, OP, IANY), PINFO(IN, OP, IANY))
257   OPINFO3(SAR,     "!sar",     4|8, FALSE, NONE, SZC,  ALL,  PINFO(OUT, OP, IRM), PINFO(IN, OP, IANY), PINFO(IN, OP, IANY))
258   OPINFO3(ROL,     "!rol",     4|8, FALSE, NONE, SZC,  ALL,  PINFO(OUT, OP, IRM), PINFO(IN, OP, IANY), PINFO(IN, OP, IANY))
259   OPINFO3(ROLC,    "!rolc",    4|8, FALSE, C,    SZC,  ALL,  PINFO(OUT, OP, IRM), PINFO(IN, OP, IANY), PINFO(IN, OP, IANY))
260   OPINFO3(ROR,     "!ror",     4|8, FALSE, NONE, SZC,  ALL,  PINFO(OUT, OP, IRM), PINFO(IN, OP, IANY), PINFO(IN, OP, IANY))
261   OPINFO3(RORC,    "!rorc",    4|8, FALSE, C,    SZC,  ALL,  PINFO(OUT, OP, IRM), PINFO(IN, OP, IANY), PINFO(IN, OP, IANY))
247262
248263   /* Floating Point Operations */
249   OPVALID_ENTRY_3(FLOAD,   4|8, NONE,  FRM,   ANYMEM,IANY4)
250   OPVALID_ENTRY_3(FSTORE,  4|8, NONE,  ANYMEM,IANY4, FANY)
251   OPVALID_ENTRY_3(FREAD,   4|8, NONE,  FRM,   IANY4, IMV4)
252   OPVALID_ENTRY_3(FWRITE,  4|8, NONE,  IANY4, FANY,  IMV4)
253   OPVALID_ENTRY_2(FMOV,    4|8, COND,  FRM,   FANY)
254   OPVALID_ENTRY_4(FTOINT,  4|8, NONE,  IRM,   FANY,  IMM,  IMM)
255   OPVALID_ENTRY_3(FFRINT,  4|8, NONE,  FRM,   IANY,  IMM)
256   OPVALID_ENTRY_3(FFRFLT,  4|8, NONE,  FRM,   FANY,  IMM)
257   OPVALID_ENTRY_2(FRNDS,     8, NONE,  FRM,   FANY)
258   OPVALID_ENTRY_3(FADD,    4|8, NONE,  FRM,   FANY,  FANY)
259   OPVALID_ENTRY_3(FSUB,    4|8, NONE,  FRM,   FANY,  FANY)
260   OPVALID_ENTRY_2(FCMP,    4|8, UZC,   FANY,  FANY)
261   OPVALID_ENTRY_3(FMUL,    4|8, NONE,  FRM,   FANY,  FANY)
262   OPVALID_ENTRY_3(FDIV,    4|8, NONE,  FRM,   FANY,  FANY)
263   OPVALID_ENTRY_2(FNEG,    4|8, NONE,  FRM,   FANY)
264   OPVALID_ENTRY_2(FABS,    4|8, NONE,  FRM,   FANY)
265   OPVALID_ENTRY_2(FSQRT,   4|8, NONE,  FRM,   FANY)
266   OPVALID_ENTRY_2(FRECIP,  4|8, NONE,  FRM,   FANY)
267   OPVALID_ENTRY_2(FRSQRT,  4|8, NONE,  FRM,   FANY)
264   OPINFO3(FLOAD,   "f#load",   4|8, FALSE, NONE, NONE, ALL,  PINFO(OUT, OP, FRM), PINFO(IN, OP, PTR), PINFO(IN, 4, IANY))
265   OPINFO3(FSTORE,  "f#store",  4|8, FALSE, NONE, NONE, ALL,  PINFO(IN, OP, PTR), PINFO(IN, 4, IANY), PINFO(IN, OP, FRM))
266   OPINFO3(FREAD,   "f#read",   4|8, FALSE, NONE, NONE, ALL,  PINFO(OUT, OP, FRM), PINFO(IN, 4, IANY), PINFO(IN, OP, SPACE))
267   OPINFO3(FWRITE,  "f#write",  4|8, FALSE, NONE, NONE, ALL,  PINFO(IN, 4, IANY), PINFO(IN, OP, FANY), PINFO(IN, OP, SPACE))
268   OPINFO2(FMOV,    "f#mov",    4|8, TRUE,  NONE, NONE, NONE, PINFO(OUT, OP, FRM), PINFO(IN, OP, FANY))
269   OPINFO4(FTOINT,  "f#toint",  4|8, FALSE, NONE, NONE, ALL,  PINFO(OUT, P3, IRM), PINFO(IN, OP, FANY), PINFO(IN, OP, SIZE), PINFO(IN, OP, FMOD))
270   OPINFO3(FFRINT,  "f#frint",  4|8, FALSE, NONE, NONE, ALL,  PINFO(OUT, OP, FRM), PINFO(IN, P3, IANY), PINFO(IN, OP, SIZE))
271   OPINFO3(FFRFLT,  "f#frflt",  4|8, FALSE, NONE, NONE, ALL,  PINFO(OUT, OP, FRM), PINFO(IN, P3, FANY), PINFO(IN, OP, SIZE))
272   OPINFO2(FRNDS,   "f#rnds",     8, FALSE, NONE, NONE, ALL,  PINFO(OUT, OP, FRM), PINFO(IN, P3, FANY))
273   OPINFO3(FADD,    "f#add",    4|8, FALSE, NONE, NONE, ALL,  PINFO(OUT, OP, FRM), PINFO(IN, OP, FANY), PINFO(IN, OP, FANY))
274   OPINFO3(FSUB,    "f#sub",    4|8, FALSE, NONE, NONE, ALL,  PINFO(OUT, OP, FRM), PINFO(IN, OP, FANY), PINFO(IN, OP, FANY))
275   OPINFO2(FCMP,    "f#cmp",    4|8, FALSE, NONE, UZC,  ALL,  PINFO(IN, OP, FANY), PINFO(IN, OP, FANY))
276   OPINFO3(FMUL,    "f#mul",    4|8, FALSE, NONE, NONE, ALL,  PINFO(OUT, OP, FRM), PINFO(IN, OP, FANY), PINFO(IN, OP, FANY))
277   OPINFO3(FDIV,    "f#div",    4|8, FALSE, NONE, NONE, ALL,  PINFO(OUT, OP, FRM), PINFO(IN, OP, FANY), PINFO(IN, OP, FANY))
278   OPINFO2(FNEG,    "f#neg",    4|8, FALSE, NONE, NONE, ALL,  PINFO(OUT, OP, FRM), PINFO(IN, OP, FANY))
279   OPINFO2(FABS,    "f#abs",    4|8, FALSE, NONE, NONE, ALL,  PINFO(OUT, OP, FRM), PINFO(IN, OP, FANY))
280   OPINFO2(FSQRT,   "f#sqrt",   4|8, FALSE, NONE, NONE, ALL,  PINFO(OUT, OP, FRM), PINFO(IN, OP, FANY))
281   OPINFO2(FRECIP,  "f#recip",  4|8, FALSE, NONE, NONE, ALL,  PINFO(OUT, OP, FRM), PINFO(IN, OP, FANY))
282   OPINFO2(FRSQRT,  "f#rsqrt",  4|8, FALSE, NONE, NONE, ALL,  PINFO(OUT, OP, FRM), PINFO(IN, OP, FANY))
268283};
269284
270285
r2844r2845
284299#endif
285300
286301/* table that is built up on first alloc which looks up via opcode */
287static drcuml_opcode_valid opcode_valid_table[DRCUML_OP_MAX];
302static const drcuml_opcode_info *opcode_info_table[DRCUML_OP_MAX];
288303
289304
290305
r2844r2845
292307    FUNCTION PROTOTYPES
293308***************************************************************************/
294309
310static void optimize_block(drcuml_block *block);
311static void simplify_instruction_with_no_flags(drcuml_block *block, drcuml_instruction *inst);
312
313static void disassemble_block(drcuml_block *block);
314static const char *get_comment_text(const drcuml_instruction *inst);
315
295316static void validate_instruction(drcuml_block *block, const drcuml_instruction *inst);
317
318#if 0
296319static void validate_backend(drcuml_state *drcuml);
297320static void bevalidate_iterate_over_params(drcuml_state *drcuml, drcuml_codehandle **handles, const bevalidate_test *test, drcuml_parameter *paramlist, int pnum);
298321static void bevalidate_iterate_over_flags(drcuml_state *drcuml, drcuml_codehandle **handles, const bevalidate_test *test, drcuml_parameter *paramlist);
r2844r2845
300323static void bevalidate_initialize_random_state(drcuml_block *block, drcuml_machine_state *state);
301324static int bevalidate_populate_state(drcuml_block *block, drcuml_machine_state *state, const bevalidate_test *test, const drcuml_parameter *paramlist, drcuml_parameter *params, UINT64 *parammem);
302325static int bevalidate_verify_state(drcuml_state *drcuml, const drcuml_machine_state *istate, drcuml_machine_state *state, const bevalidate_test *test, const drcuml_parameter *params, const drcuml_instruction *testinst, drccodeptr codestart, drccodeptr codeend, UINT8 flagmask);
326#endif
303327
304328
305329
r2844r2845
308332***************************************************************************/
309333
310334/*-------------------------------------------------
311    size_for_param - given a set of parameter
312    flags and the instruction size, return the
313    size of the parameter
335    rol32 - perform a 32-bit left rotate
314336-------------------------------------------------*/
315337
316INLINE int size_for_param(int instsize, UINT16 flags)
338INLINE UINT32 rol32(UINT32 source, UINT8 count)
317339{
318   if (flags & OV_PARAM_FLAG_FIXED4)
319      return 4;
320   else if (flags & OV_PARAM_FLAG_FIXED8)
321      return 8;
322   else
323      return instsize;
340   count &= 31;
341   return (source << count) | (source >> (32 - count));
324342}
325343
326344
327345/*-------------------------------------------------
328    mask_for_param - given a set of parameter
329    flags and the instruction size, return a
330    mask of valid bits for that parameter
346    rol64 - perform a 64-bit left rotate
331347-------------------------------------------------*/
332348
333INLINE UINT64 mask_for_param(int instsize, UINT16 flags)
349INLINE UINT64 rol64(UINT64 source, UINT8 count)
334350{
335   switch (size_for_param(instsize, flags))
351   count &= 63;
352   return (source << count) | (source >> (64 - count));
353}
354
355
356/*-------------------------------------------------
357    effective_inflags - return the effective
358    input flags based on any conditions encoded
359    in an instruction
360-------------------------------------------------*/
361
362INLINE UINT8 effective_inflags(const drcuml_instruction *inst, const drcuml_opcode_info *opinfo)
363{
364   static const UINT8 flags_for_condition[] =
336365   {
337      case 4:      return U64(0x00000000ffffffff);
338      case 8:      return U64(0xffffffffffffffff);
366      /* DRCUML_COND_Z */      DRCUML_FLAG_Z,
367      /* DRCUML_COND_NZ */   DRCUML_FLAG_Z,
368      /* DRCUML_COND_S */      DRCUML_FLAG_S,
369      /* DRCUML_COND_NS */   DRCUML_FLAG_S,
370      /* DRCUML_COND_C */      DRCUML_FLAG_C,
371      /* DRCUML_COND_NC */   DRCUML_FLAG_C,
372      /* DRCUML_COND_V */      DRCUML_FLAG_V,
373      /* DRCUML_COND_NV */   DRCUML_FLAG_V,
374      /* DRCUML_COND_U */      DRCUML_FLAG_U,
375      /* DRCUML_COND_NU */   DRCUML_FLAG_U,
376      /* DRCUML_COND_A */      DRCUML_FLAG_C | DRCUML_FLAG_Z,
377      /* DRCUML_COND_BE */   DRCUML_FLAG_C | DRCUML_FLAG_Z,
378      /* DRCUML_COND_G */      DRCUML_FLAG_S | DRCUML_FLAG_V | DRCUML_FLAG_Z,
379      /* DRCUML_COND_LE */   DRCUML_FLAG_S | DRCUML_FLAG_V | DRCUML_FLAG_Z,
380      /* DRCUML_COND_L */      DRCUML_FLAG_S | DRCUML_FLAG_V,
381      /* DRCUML_COND_GE */   DRCUML_FLAG_S | DRCUML_FLAG_V
382   };
383   UINT8 flags = opinfo->inflags;
384   if (flags & 0x80)
385      flags = inst->param[flags - OPFLAGS_P1].value & OPFLAGS_ALL;
386   if (inst->condition != DRCUML_COND_ALWAYS)
387      flags |= flags_for_condition[inst->condition & 0x0f];
388   return flags;
389}
390
391
392/*-------------------------------------------------
393    effective_outflags - return the effective
394    output flags based on any conditions encoded
395    in an instruction
396-------------------------------------------------*/
397
398INLINE UINT8 effective_outflags(const drcuml_instruction *inst, const drcuml_opcode_info *opinfo)
399{
400   UINT8 flags = opinfo->outflags;
401   if (flags & 0x80)
402      flags = inst->param[flags - OPFLAGS_P1].value & OPFLAGS_ALL;
403   return flags;
404}
405
406
407/*-------------------------------------------------
408    effective_psize - return the effective
409    parameter size based on the instruction and
410    parameters passed
411-------------------------------------------------*/
412
413INLINE UINT8 effective_psize(const drcuml_instruction *inst, const drcuml_opcode_info *opinfo, int pnum)
414{
415   switch (opinfo->param[pnum].size)
416   {
417      case PSIZE_4:   return 4;
418      case PSIZE_8:   return 8;
419      case PSIZE_OP:   return inst->size;
420      case PSIZE_P1:   assert(inst->param[0].type == DRCUML_PTYPE_IMMEDIATE); return 1 << (inst->param[0].value & 3);
421      case PSIZE_P2:   assert(inst->param[1].type == DRCUML_PTYPE_IMMEDIATE); return 1 << (inst->param[1].value & 3);
422      case PSIZE_P3:   assert(inst->param[2].type == DRCUML_PTYPE_IMMEDIATE); return 1 << (inst->param[2].value & 3);
423      case PSIZE_P4:   assert(inst->param[3].type == DRCUML_PTYPE_IMMEDIATE); return 1 << (inst->param[3].value & 3);
339424   }
340   return 0;
425   return inst->size;
341426}
342427
343428
429/*-------------------------------------------------
430    param_is_immediate - return TRUE if the
431    given instruction parameter is an immediate
432-------------------------------------------------*/
344433
434INLINE int param_is_immediate(const drcuml_instruction *inst, int pnum)
435{
436   return (inst->param[pnum].type == DRCUML_PTYPE_IMMEDIATE);
437}
438
439
440/*-------------------------------------------------
441    param_is_immediate_value - return TRUE if the
442    given instruction parameter is an immediate
443    with the provided value
444-------------------------------------------------*/
445
446INLINE int param_is_immediate_value(const drcuml_instruction *inst, int pnum, UINT64 value)
447{
448   return (inst->param[pnum].type == DRCUML_PTYPE_IMMEDIATE && inst->param[pnum].value == value);
449}
450
451
452/*-------------------------------------------------
453    param_equal - return TRUE if the two provided
454    parameters are equal
455-------------------------------------------------*/
456
457INLINE int param_equal(const drcuml_instruction *inst, int pnum1, int pnum2)
458{
459   return (inst->param[pnum1].type == inst->param[pnum2].type && inst->param[pnum1].value == inst->param[pnum2].value);
460}
461
462
463/*-------------------------------------------------
464    convert_to_nop - convert an instruction
465    inline to a NOP
466-------------------------------------------------*/
467
468INLINE void convert_to_nop(drcuml_instruction *inst)
469{
470   inst->opcode = DRCUML_OP_NOP;
471   inst->size = 4;
472   inst->condition = DRCUML_COND_ALWAYS;
473   inst->numparams = 0;
474}
475
476
477/*-------------------------------------------------
478    convert_to_mov_immediate - convert an
479    instruction inline to a MOV immediate
480-------------------------------------------------*/
481
482INLINE void convert_to_mov_immediate(drcuml_instruction *inst, UINT64 immediate)
483{
484   inst->opcode = DRCUML_OP_MOV;
485   inst->condition = DRCUML_COND_ALWAYS;
486   inst->numparams = 2;
487   inst->param[1].type = DRCUML_PTYPE_IMMEDIATE;
488   inst->param[1].value = immediate;
489}
490
491
492/*-------------------------------------------------
493    convert_to_mov_param - convert an
494    instruction inline to a MOV with a source
495    parameter given by the existing parameter
496    index pnum
497-------------------------------------------------*/
498
499INLINE void convert_to_mov_param(drcuml_instruction *inst, int pnum)
500{
501   inst->opcode = DRCUML_OP_MOV;
502   inst->condition = DRCUML_COND_ALWAYS;
503   inst->numparams = 2;
504   if (pnum != 1)
505      inst->param[1] = inst->param[pnum];
506}
507
508
509
345510/***************************************************************************
346511    INITIALIZATION/TEARDOWN
347512***************************************************************************/
r2844r2845
365530   /* initialize the state */
366531   drcuml->cache = cache;
367532   drcuml->beintf = (flags & DRCUML_OPTION_USE_C) ? &drcbe_c_be_interface : &NATIVE_DRC;
533   drcuml->symtailptr = &drcuml->symlist;
368534
369535   /* if we're to log, create the logfile */
370536   if (flags & DRCUML_OPTION_LOG_UML)
r2844r2845
379545   }
380546
381547   /* update the valid opcode table */
382   for (opnum = 0; opnum < ARRAY_LENGTH(opcode_valid_list); opnum++)
383      opcode_valid_table[opcode_valid_list[opnum].opcode] = opcode_valid_list[opnum];
548   for (opnum = 0; opnum < ARRAY_LENGTH(opcode_info_source); opnum++)
549      opcode_info_table[opcode_info_source[opnum].opcode] = &opcode_info_source[opnum];
384550
385551   return drcuml;
386552}
r2844r2845
422588   (*drcuml->beintf->be_reset)(drcuml->bestate);
423589
424590   /* do a one-time validation if requested */
425   if (VALIDATE_BACKEND)
426   {
427      static int validated = FALSE;
428      if (!validated)
429      {
430         validated = TRUE;
431         validate_backend(drcuml);
432      }
433   }
591/*  if (VALIDATE_BACKEND)
592    {
593        static int validated = FALSE;
594        if (!validated)
595        {
596            validated = TRUE;
597            validate_backend(drcuml);
598        }
599    }*/
434600}
435601
436602
r2844r2845
459625      free(block);
460626   }
461627
628   /* free all the symbols */
629   while (drcuml->symlist != NULL)
630   {
631      drcuml_symbol *sym = drcuml->symlist;
632      drcuml->symlist = sym->next;
633      free(sym);
634   }
635
462636   /* close any files */
463637   if (drcuml->umllog != NULL)
464638      fclose(drcuml->umllog);
r2844r2845
519693    0 parameters to the block
520694-------------------------------------------------*/
521695
522void drcuml_block_append_0(drcuml_block *block, drcuml_opcode op, UINT8 size, UINT8 condflags)
696void drcuml_block_append_0(drcuml_block *block, drcuml_opcode op, UINT8 size, UINT8 condition)
523697{
524698   drcuml_instruction *inst = &block->inst[block->nextinst++];
525699
r2844r2845
532706   /* fill in the instruction */
533707   inst->opcode = (UINT8)op;
534708   inst->size = size;
535   inst->condflags = condflags;
709   inst->condition = condition;
710   inst->flags = 0;
536711   inst->numparams = 0;
537712
538713   /* validation */
r2844r2845
545720    1 parameter to the block
546721-------------------------------------------------*/
547722
548void drcuml_block_append_1(drcuml_block *block, drcuml_opcode op, UINT8 size, UINT8 condflags, drcuml_ptype p0type, drcuml_pvalue p0value)
723void drcuml_block_append_1(drcuml_block *block, drcuml_opcode op, UINT8 size, UINT8 condition, drcuml_ptype p0type, drcuml_pvalue p0value)
549724{
550725   drcuml_instruction *inst = &block->inst[block->nextinst++];
551726
r2844r2845
558733   /* fill in the instruction */
559734   inst->opcode = (UINT8)op;
560735   inst->size = size;
561   inst->condflags = condflags;
736   inst->condition = condition;
737   inst->flags = 0;
562738   inst->numparams = 1;
563739   inst->param[0].type = p0type;
564740   inst->param[0].value = p0value;
r2844r2845
573749    2 parameters to the block
574750-------------------------------------------------*/
575751
576void drcuml_block_append_2(drcuml_block *block, drcuml_opcode op, UINT8 size, UINT8 condflags, drcuml_ptype p0type, drcuml_pvalue p0value, drcuml_ptype p1type, drcuml_pvalue p1value)
752void drcuml_block_append_2(drcuml_block *block, drcuml_opcode op, UINT8 size, UINT8 condition, drcuml_ptype p0type, drcuml_pvalue p0value, drcuml_ptype p1type, drcuml_pvalue p1value)
577753{
578754   drcuml_instruction *inst = &block->inst[block->nextinst++];
579755
r2844r2845
586762   /* fill in the instruction */
587763   inst->opcode = (UINT8)op;
588764   inst->size = size;
589   inst->condflags = condflags;
765   inst->condition = condition;
766   inst->flags = 0;
590767   inst->numparams = 2;
591768   inst->param[0].type = p0type;
592769   inst->param[0].value = p0value;
r2844r2845
603780    3 parameters to the block
604781-------------------------------------------------*/
605782
606void drcuml_block_append_3(drcuml_block *block, drcuml_opcode op, UINT8 size, UINT8 condflags, drcuml_ptype p0type, drcuml_pvalue p0value, drcuml_ptype p1type, drcuml_pvalue p1value, drcuml_ptype p2type, drcuml_pvalue p2value)
783void drcuml_block_append_3(drcuml_block *block, drcuml_opcode op, UINT8 size, UINT8 condition, drcuml_ptype p0type, drcuml_pvalue p0value, drcuml_ptype p1type, drcuml_pvalue p1value, drcuml_ptype p2type, drcuml_pvalue p2value)
607784{
608785   drcuml_instruction *inst = &block->inst[block->nextinst++];
609786
r2844r2845
616793   /* fill in the instruction */
617794   inst->opcode = (UINT8)op;
618795   inst->size = size;
619   inst->condflags = condflags;
796   inst->condition = condition;
797   inst->flags = 0;
620798   inst->numparams = 3;
621799   inst->param[0].type = p0type;
622800   inst->param[0].value = p0value;
r2844r2845
635813    4 parameters to the block
636814-------------------------------------------------*/
637815
638void drcuml_block_append_4(drcuml_block *block, drcuml_opcode op, UINT8 size, UINT8 condflags, drcuml_ptype p0type, drcuml_pvalue p0value, drcuml_ptype p1type, drcuml_pvalue p1value, drcuml_ptype p2type, drcuml_pvalue p2value, drcuml_ptype p3type, drcuml_pvalue p3value)
816void drcuml_block_append_4(drcuml_block *block, drcuml_opcode op, UINT8 size, UINT8 condition, drcuml_ptype p0type, drcuml_pvalue p0value, drcuml_ptype p1type, drcuml_pvalue p1value, drcuml_ptype p2type, drcuml_pvalue p2value, drcuml_ptype p3type, drcuml_pvalue p3value)
639817{
640818   drcuml_instruction *inst = &block->inst[block->nextinst++];
641819
r2844r2845
648826   /* fill in the instruction */
649827   inst->opcode = (UINT8)op;
650828   inst->size = size;
651   inst->condflags = condflags;
829   inst->condition = condition;
830   inst->flags = 0;
652831   inst->numparams = 4;
653832   inst->param[0].type = p0type;
654833   inst->param[0].value = p0value;
r2844r2845
675854
676855   assert(block->inuse);
677856
857   /* optimize the resulting code first */
858   optimize_block(block);
859
678860   /* if we have a logfile, generate a disassembly of the block */
679861   if (drcuml->umllog != NULL)
680   {
681      int instnum;
862      disassemble_block(block);
682863
683      /* iterate over instructions and output */
684      for (instnum = 0; instnum < block->nextinst; instnum++)
685      {
686         char dasm[512];
687         drcuml_disasm(&block->inst[instnum], dasm);
688         drcuml_log_printf(drcuml, "%4d: %s\n", instnum, dasm);
689      }
690      drcuml_log_printf(drcuml, "\n\n");
691      fflush(drcuml->umllog);
692   }
693
694864   /* generate the code via the back-end */
695865   (*drcuml->beintf->be_generate)(drcuml->bestate, block, block->inst, block->nextinst);
696866
r2844r2845
8331003***************************************************************************/
8341004
8351005/*-------------------------------------------------
1006    drcuml_symbol_add - add a symbol to the
1007    internal symbol table
1008-------------------------------------------------*/
1009
1010void drcuml_symbol_add(drcuml_state *drcuml, void *base, UINT32 length, const char *name)
1011{
1012   drcuml_symbol *symbol;
1013
1014   /* allocate memory to hold the symbol */
1015   symbol = malloc(sizeof(*symbol) + strlen(name));
1016   if (symbol == NULL)
1017      fatalerror("Out of memory allocating symbol in drcuml_symbol_add");
1018
1019   /* fill in the structure */
1020   symbol->next = NULL;
1021   symbol->base = (drccodeptr)base;
1022   symbol->length = length;
1023   strcpy(symbol->symname, name);
1024
1025   /* add to the tail of the list */
1026   *drcuml->symtailptr = symbol;
1027   drcuml->symtailptr = &symbol->next;
1028}
1029
1030
1031/*-------------------------------------------------
1032    drcuml_symbol_find - look up a symbol from the
1033    internal symbol table or return NULL if not
1034    found
1035-------------------------------------------------*/
1036
1037const char *drcuml_symbol_find(drcuml_state *drcuml, void *base, UINT32 *offset)
1038{
1039   drccodeptr search = base;
1040   drcuml_symbol *symbol;
1041
1042   /* simple linear search */
1043   for (symbol = drcuml->symlist; symbol != NULL; symbol = symbol->next)
1044      if (search >= symbol->base && search < symbol->base + symbol->length)
1045      {
1046         /* if no offset pointer, only match perfectly */
1047         if (offset == NULL && search != symbol->base)
1048            continue;
1049
1050         /* return the offset and name */
1051         if (offset != NULL)
1052            *offset = search - symbol->base;
1053         return symbol->symname;
1054      }
1055
1056   /* not found; return NULL */
1057   return NULL;
1058}
1059
1060
1061/*-------------------------------------------------
8361062    drcuml_log_printf - directly printf to the UML
8371063    log if generated
8381064-------------------------------------------------*/
r2844r2845
8811107}
8821108
8831109
1110/*-------------------------------------------------
1111    drcuml_disasm - disassemble an
1112    instruction to the given buffer
1113-------------------------------------------------*/
8841114
1115void drcuml_disasm(const drcuml_instruction *inst, char *buffer, drcuml_state *drcuml)
1116{
1117   static const char *conditions[] = { "z", "nz", "s", "ns", "c", "nc", "v", "nv", "u", "nu", "a", "be", "g", "le", "l", "ge" };
1118   static const char *pound_size[] = { "?", "?", "?", "?", "s", "?", "?", "?", "d" };
1119   static const char *bang_size[] = { "?", "b", "h", "?", "", "?", "?", "?", "d" };
1120   static const char *fmods[] = { "trunc", "round", "ceil", "floor", "default" };
1121   static const char *sizes[] = { "byte", "word", "dword", "qword" };
1122   const drcuml_opcode_info *opinfo = opcode_info_table[inst->opcode];
1123   char *dest = buffer;
1124   const char *opsrc;
1125   int pnum;
1126
1127   assert(inst->opcode != DRCUML_OP_INVALID && inst->opcode < DRCUML_OP_MAX);
1128
1129   /* start with the raw mnemonic and substitute sizes */
1130   for (opsrc = opinfo->mnemonic; *opsrc != 0; opsrc++)
1131      if (*opsrc == '!')
1132         dest += sprintf(dest, "%s", bang_size[inst->size]);
1133      else if (*opsrc == '#')
1134         dest += sprintf(dest, "%s", pound_size[inst->size]);
1135      else
1136         *dest++ = *opsrc;
1137
1138   /* pad to 8 spaces */
1139   while (dest < &buffer[8])
1140      *dest++ = ' ';
1141
1142   /* iterate through parameters */
1143   for (pnum = 0; pnum < inst->numparams; pnum++)
1144   {
1145      const drcuml_parameter *param = &inst->param[pnum];
1146      UINT16 typemask = opinfo->param[pnum].typemask;
1147      const char *symbol;
1148      UINT32 symoffset;
1149
1150      /* start with a comma for all except the first parameter */
1151      if (pnum != 0)
1152         *dest++ = ',';
1153
1154      /* ouput based on type */
1155      switch (param->type)
1156      {
1157         /* immediates have several special cases */
1158         case DRCUML_PTYPE_IMMEDIATE:
1159
1160            /* size immediate */
1161            if (typemask == PTYPES_SIZE)
1162               dest += sprintf(dest, "%s", sizes[param->value]);
1163
1164            /* address space immediate */
1165            else if (typemask == PTYPES_SPACE)
1166               dest += sprintf(dest, "%s", address_space_names[param->value]);
1167
1168            /* size + address space immediate */
1169            else if (typemask == PTYPES_SPSZ)
1170               dest += sprintf(dest, "%s_%s", address_space_names[param->value / 16], sizes[param->value % 16]);
1171
1172            /* fmod immediate */
1173            else if (typemask == PTYPES_FMOD)
1174               dest += sprintf(dest, "%s", fmods[param->value]);
1175
1176            /* general immediate */
1177            else
1178            {
1179               int size = effective_psize(inst, opinfo, pnum);
1180               UINT64 value = param->value;
1181
1182               /* truncate to size */
1183               if (size == 1) value = (UINT8)value;
1184               if (size == 2) value = (UINT16)value;
1185               if (size == 4) value = (UINT32)value;
1186               if ((UINT32)value == value)
1187                  dest += sprintf(dest, "$%X", (UINT32)value);
1188               else
1189                  dest += sprintf(dest, "$%X%08X", (UINT32)(value >> 32), (UINT32)value);
1190            }
1191            break;
1192
1193         /* integer registers */
1194         case DRCUML_PTYPE_INT_REGISTER:
1195            if (param->value >= DRCUML_REG_I0 && param->value < DRCUML_REG_I_END)
1196               dest += sprintf(dest, "i%d", (UINT32)(param->value - DRCUML_REG_I0));
1197            else
1198               dest += sprintf(dest, "i(%X?)", (UINT32)param->value);
1199            break;
1200
1201         /* floating point registers */
1202         case DRCUML_PTYPE_FLOAT_REGISTER:
1203            if (param->value >= DRCUML_REG_F0 && param->value < DRCUML_REG_F_END)
1204               dest += sprintf(dest, "f%d", (UINT32)(param->value - DRCUML_REG_F0));
1205            else
1206               dest += sprintf(dest, "f(%X?)", (UINT32)param->value);
1207            break;
1208
1209         /* map variables */
1210         case DRCUML_PTYPE_MAPVAR:
1211            if (param->value >= DRCUML_MAPVAR_M0 && param->value < DRCUML_MAPVAR_END)
1212               dest += sprintf(dest, "m%d", (UINT32)(param->value - DRCUML_MAPVAR_M0));
1213            else
1214               dest += sprintf(dest, "m(%X?)", (UINT32)param->value);
1215            break;
1216
1217         /* memory */
1218         case DRCUML_PTYPE_MEMORY:
1219
1220            /* handle pointer */
1221            if (typemask == PTYPES_HAND)
1222               dest += sprintf(dest, "%s", drcuml_handle_name((const drcuml_codehandle *)(FPTR)param->value));
1223
1224            /* string pointer */
1225            else if (typemask == PTYPES_STR)
1226               dest += sprintf(dest, "%s", (const char *)(FPTR)param->value);
1227
1228            /* symbol */
1229            else if (drcuml != NULL && (symbol = drcuml_symbol_find(drcuml, (drccodeptr)(FPTR)param->value, &symoffset)) != NULL)
1230            {
1231               if (symoffset == 0)
1232                  dest += sprintf(dest, "[%s]", symbol);
1233               else
1234                  dest += sprintf(dest, "[%s+$%X]", symbol, symoffset);
1235            }
1236
1237            /* cache memory */
1238            else if (drcuml != NULL && drccache_contains_pointer(drcuml->cache, (void *)(FPTR)param->value))
1239               dest += sprintf(dest, "[+$%X]", (UINT32)(FPTR)((drccodeptr)(FPTR)param->value - drccache_near(drcuml->cache)));
1240
1241            /* general memory */
1242            else
1243               dest += sprintf(dest, "[[$%p]]", (void *)(FPTR)param->value);
1244            break;
1245
1246         default:
1247            dest += sprintf(dest, "???");
1248            break;
1249      }
1250   }
1251
1252   /* if there's a condition, append it */
1253   if (inst->condition != DRCUML_COND_ALWAYS)
1254      dest += sprintf(dest, ",%s", conditions[inst->condition & 0x0f]);
1255
1256   /* if there are flags, append them */
1257   if (inst->flags != 0)
1258   {
1259      *dest++ = ',';
1260      if (inst->flags & DRCUML_FLAG_U)
1261         *dest++ = 'U';
1262      if (inst->flags & DRCUML_FLAG_S)
1263         *dest++ = 'S';
1264      if (inst->flags & DRCUML_FLAG_Z)
1265         *dest++ = 'Z';
1266      if (inst->flags & DRCUML_FLAG_V)
1267         *dest++ = 'V';
1268      if (inst->flags & DRCUML_FLAG_C)
1269         *dest++ = 'C';
1270   }
1271
1272   /* ensure we are NULL-terminated */
1273   *dest = 0;
1274}
1275
1276
1277
8851278/***************************************************************************
886    OPCODE VALIDATION
1279    CODE BLOCK OPTIMIZATION
8871280***************************************************************************/
8881281
8891282/*-------------------------------------------------
890    validate_instruction - verify that the
891    instruction created meets all requirements
1283    optimize_block - apply various optimizations
1284    to a block of code
8921285-------------------------------------------------*/
8931286
894static void validate_instruction(drcuml_block *block, const drcuml_instruction *inst)
1287static void optimize_block(drcuml_block *block)
8951288{
896   const drcuml_opcode_valid *opvalid = &opcode_valid_table[inst->opcode];
1289   UINT32 mapvar[DRCUML_MAPVAR_END - DRCUML_MAPVAR_M0] = { 0 };
1290   int instnum;
8971291
898   /* validate information */
899   assert(inst->opcode != DRCUML_OP_INVALID && inst->opcode < DRCUML_OP_MAX);
900   assert(inst->size == 1 || inst->size == 2 || inst->size == 4 || inst->size == 8);
901   assert((opvalid->sizes & inst->size) != 0);
902   if (inst->numparams > 0)
1292   /* iterate over instructions */
1293   for (instnum = 0; instnum < block->nextinst; instnum++)
9031294   {
904      assert(inst->param[0].type > DRCUML_PTYPE_NONE && inst->param[0].type < DRCUML_PTYPE_MAX);
905      assert(((opvalid->ptypes[0] >> inst->param[0].type) & 1) != 0);
906      if (inst->param[0].type == DRCUML_PTYPE_MEMORY && !(opvalid->ptypes[0] & OV_PARAM_FLAG_ANYMEM))
907         assert_in_near_cache(block->drcuml->cache, (void *)(FPTR)inst->param[0].value);
1295      drcuml_instruction *inst = &block->inst[instnum];
1296      const drcuml_opcode_info *opinfo = opcode_info_table[inst->opcode];
1297      UINT8 remainingflags;
1298      int scannum, pnum;
1299
1300      /* first compute what flags we need */
1301      inst->flags = 0;
1302      remainingflags = effective_outflags(inst, opinfo);
1303
1304      /* scan ahead until we run out of possible remaining flags */
1305      for (scannum = instnum + 1; remainingflags != 0 && scannum < block->nextinst; scannum++)
1306      {
1307         const drcuml_instruction *scan = &block->inst[scannum];
1308         const drcuml_opcode_info *scaninfo = opcode_info_table[scan->opcode];
1309
1310         /* any input flags are required */
1311         inst->flags |= effective_inflags(scan, scaninfo);
1312
1313         /* if the scanahead instruction is unconditional, assume his flags are modified */
1314         if (scan->condition == DRCUML_COND_ALWAYS)
1315            remainingflags &= ~scaninfo->modflags;
1316      }
1317
1318      /* track mapvars */
1319      if (inst->opcode == DRCUML_OP_MAPVAR)
1320         mapvar[inst->param[0].value - DRCUML_MAPVAR_M0] = inst->param[1].value;
1321
1322      /* convert all mapvar parameters to immediates */
1323      else if (inst->opcode != DRCUML_OP_RECOVER)
1324         for (pnum = 0; pnum < inst->numparams; pnum++)
1325            if (inst->param[pnum].type == DRCUML_PTYPE_MAPVAR)
1326            {
1327               inst->param[pnum].type = DRCUML_PTYPE_IMMEDIATE;
1328               inst->param[pnum].value = mapvar[inst->param[pnum].value - DRCUML_MAPVAR_M0];
1329            }
1330
1331      /* if we don't need any flags, then we can eliminate a lot of dumb operations */
1332      if (inst->flags == 0)
1333         simplify_instruction_with_no_flags(block, inst);
9081334   }
909   if (inst->numparams > 1)
1335}
1336
1337
1338/*-------------------------------------------------
1339    simplify_instruction_with_no_flags - simplify
1340    instructions that have immediate values we
1341    can evaluate at compile time
1342-------------------------------------------------*/
1343
1344static void simplify_instruction_with_no_flags(drcuml_block *block, drcuml_instruction *inst)
1345{
1346   static const UINT64 instsizemask[] = { 0, 0, 0, 0, 0xffffffff, 0, 0, 0, U64(0xffffffffffffffff) };
1347   static const UINT64 paramsizemask[] = { 0xff, 0xffff, 0xffffffff, U64(0xffffffffffffffff) };
1348   drcuml_opcode origop = inst->opcode;
1349#if LOG_SIMPLIFICATIONS
1350   drcuml_instruction orig = *inst;
1351#endif
1352
1353   switch (inst->opcode)
9101354   {
911      assert(inst->param[1].type > DRCUML_PTYPE_NONE && inst->param[1].type < DRCUML_PTYPE_MAX);
912      assert(((opvalid->ptypes[1] >> inst->param[1].type) & 1) != 0);
913      if (inst->param[1].type == DRCUML_PTYPE_MEMORY && !(opvalid->ptypes[1] & OV_PARAM_FLAG_ANYMEM))
914         assert_in_near_cache(block->drcuml->cache, (void *)(FPTR)inst->param[1].value);
1355      /* READM: convert to READ if the mask is wide open */
1356      case DRCUML_OP_READM:
1357         if (param_is_immediate_value(inst, 2, paramsizemask[inst->param[3].value] & 3))
1358         {
1359            inst->opcode = DRCUML_OP_READ;
1360            inst->numparams = 3;
1361            inst->param[2] = inst->param[3];
1362         }
1363         break;
1364
1365      /* WRITEM: convert to WRITE if the mask is wide open */
1366      case DRCUML_OP_WRITEM:
1367         if (param_is_immediate_value(inst, 2, paramsizemask[inst->param[3].value] & 3))
1368         {
1369            inst->opcode = DRCUML_OP_WRITE;
1370            inst->numparams = 3;
1371            inst->param[2] = inst->param[3];
1372         }
1373         break;
1374
1375      /* SET: convert to MOV if constant condition */
1376      case DRCUML_OP_SET:
1377         if (inst->condition == DRCUML_COND_ALWAYS)
1378            convert_to_mov_immediate(inst, 1);
1379         break;
1380
1381      /* MOV: convert to NOP if move-to-self */
1382      case DRCUML_OP_MOV:
1383         if (param_equal(inst, 0, 1))
1384            convert_to_nop(inst);
1385         break;
1386
1387      /* SEXT: convert immediates to MOV */
1388      case DRCUML_OP_SEXT:
1389         if (param_is_immediate(inst, 1))
1390            switch (inst->param[2].value)
1391            {
1392               case DRCUML_SIZE_BYTE:   convert_to_mov_immediate(inst, (INT8)inst->param[1].value);      break;
1393               case DRCUML_SIZE_WORD:   convert_to_mov_immediate(inst, (INT16)inst->param[1].value);   break;
1394               case DRCUML_SIZE_DWORD:   convert_to_mov_immediate(inst, (INT32)inst->param[1].value);   break;
1395               case DRCUML_SIZE_QWORD:   convert_to_mov_immediate(inst, (INT64)inst->param[1].value);   break;
1396            }
1397         break;
1398
1399      /* ROLAND: convert to MOV if all immediate, or to ROL or AND if one is not needed, or to SHL/SHR if the mask is right */
1400      case DRCUML_OP_ROLAND:
1401         if (param_is_immediate(inst, 1) && param_is_immediate(inst, 2) && param_is_immediate(inst, 3))
1402         {
1403            if (inst->size == 4)
1404               convert_to_mov_immediate(inst, rol32(inst->param[1].value, inst->param[2].value) & inst->param[3].value);
1405            else
1406               convert_to_mov_immediate(inst, rol64(inst->param[1].value, inst->param[2].value) & inst->param[3].value);
1407         }
1408         else if (param_is_immediate_value(inst, 2, 0))
1409         {
1410            inst->opcode = DRCUML_OP_AND;
1411            inst->numparams = 3;
1412            inst->param[2] = inst->param[3];
1413         }
1414         else if (param_is_immediate_value(inst, 3, instsizemask[inst->size]))
1415         {
1416            inst->opcode = DRCUML_OP_ROL;
1417            inst->numparams = 3;
1418         }
1419         else if (param_is_immediate(inst, 2) && param_is_immediate_value(inst, 3, ((U64(0xffffffffffffffff) << inst->param[2].value) & instsizemask[inst->size])))
1420         {
1421            inst->opcode = DRCUML_OP_SHL;
1422            inst->numparams = 3;
1423         }
1424         else if (param_is_immediate(inst, 2) && param_is_immediate_value(inst, 3, instsizemask[inst->size] >> (8 * inst->size - inst->param[2].value)))
1425         {
1426            inst->opcode = DRCUML_OP_SHR;
1427            inst->numparams = 3;
1428            inst->param[2].value = 8 * inst->size - inst->param[2].value;
1429         }
1430         break;
1431
1432      /* ROLINS: convert to ROLAND if the mask is full */
1433      case DRCUML_OP_ROLINS:
1434         if (param_is_immediate_value(inst, 3, instsizemask[inst->size]))
1435            inst->opcode = DRCUML_OP_ROLAND;
1436         break;
1437
1438      /* ADD: convert to MOV if immediate, or if adding 0 */
1439      case DRCUML_OP_ADD:
1440         if (param_is_immediate(inst, 1) && param_is_immediate(inst, 2))
1441            convert_to_mov_immediate(inst, inst->param[1].value + inst->param[2].value);
1442         else if (param_is_immediate_value(inst, 1, 0))
1443            convert_to_mov_param(inst, 2);
1444         else if (param_is_immediate_value(inst, 2, 0))
1445            convert_to_mov_param(inst, 1);
1446         break;
1447
1448      /* SUB: convert to MOV if immediate, or if subtracting 0 */
1449      case DRCUML_OP_SUB:
1450         if (param_is_immediate(inst, 1) && param_is_immediate(inst, 2))
1451            convert_to_mov_immediate(inst, inst->param[1].value - inst->param[2].value);
1452         else if (param_is_immediate_value(inst, 2, 0))
1453            convert_to_mov_param(inst, 1);
1454         break;
1455
1456      /* CMP: no-op if no flags needed, compare i0 to i0 if the parameters are equal */
1457      case DRCUML_OP_CMP:
1458         if (inst->flags == 0)
1459            convert_to_nop(inst);
1460         else if (param_equal(inst, 1, 2))
1461         {
1462            inst->param[1].type = inst->param[2].type = DRCUML_PTYPE_INT_REGISTER;
1463            inst->param[1].value = inst->param[2].value = DRCUML_REG_I0;
1464         }
1465         break;
1466
1467      /* MULU: convert simple form to MOV if immediate, or if multiplying by 0 */
1468      case DRCUML_OP_MULU:
1469         if (param_equal(inst, 0, 1))
1470         {
1471            if (param_is_immediate_value(inst, 2, 0) || param_is_immediate_value(inst, 3, 0))
1472               convert_to_mov_immediate(inst, 0);
1473            else if (param_is_immediate(inst, 2) && param_is_immediate(inst, 3))
1474            {
1475               if (inst->size == 4)
1476                  convert_to_mov_immediate(inst, (UINT32)((UINT32)inst->param[1].value * (UINT32)inst->param[2].value));
1477               else if (inst->size == 8)
1478                  convert_to_mov_immediate(inst, (UINT64)((UINT64)inst->param[1].value * (UINT64)inst->param[2].value));
1479            }
1480         }
1481         break;
1482
1483      /* MULS: convert simple form to MOV if immediate, or if multiplying by 0 */
1484      case DRCUML_OP_MULS:
1485         if (param_equal(inst, 0, 1))
1486         {
1487            if (param_is_immediate_value(inst, 2, 0) || param_is_immediate_value(inst, 3, 0))
1488               convert_to_mov_immediate(inst, 0);
1489            else if (param_is_immediate(inst, 2) && param_is_immediate(inst, 3))
1490            {
1491               if (inst->size == 4)
1492                  convert_to_mov_immediate(inst, (INT32)((INT32)inst->param[1].value * (INT32)inst->param[2].value));
1493               else if (inst->size == 8)
1494                  convert_to_mov_immediate(inst, (INT64)((INT64)inst->param[1].value * (INT64)inst->param[2].value));
1495            }
1496         }
1497         break;
1498
1499      /* DIVU: convert simple form to MOV if immediate, or if dividing with 0 */
1500      case DRCUML_OP_DIVU:
1501         if (param_equal(inst, 0, 1) && !param_is_immediate_value(inst, 3, 0))
1502         {
1503            if (param_is_immediate_value(inst, 2, 0))
1504               convert_to_mov_immediate(inst, 0);
1505            else if (param_is_immediate(inst, 2) && param_is_immediate(inst, 3))
1506            {
1507               if (inst->size == 4)
1508                  convert_to_mov_immediate(inst, (UINT32)((UINT32)inst->param[1].value / (UINT32)inst->param[2].value));
1509               else if (inst->size == 8)
1510                  convert_to_mov_immediate(inst, (UINT64)((UINT64)inst->param[1].value / (UINT64)inst->param[2].value));
1511            }
1512         }
1513         break;
1514
1515      /* DIVS: convert simple form to MOV if immediate, or if dividing with 0 */
1516      case DRCUML_OP_DIVS:
1517         if (param_equal(inst, 0, 1) && !param_is_immediate_value(inst, 3, 0))
1518         {
1519            if (param_is_immediate_value(inst, 2, 0))
1520               convert_to_mov_immediate(inst, 0);
1521            else if (param_is_immediate(inst, 2) && param_is_immediate(inst, 3))
1522            {
1523               if (inst->size == 4)
1524                  convert_to_mov_immediate(inst, (INT32)((INT32)inst->param[1].value / (INT32)inst->param[2].value));
1525               else if (inst->size == 8)
1526                  convert_to_mov_immediate(inst, (INT64)((INT64)inst->param[1].value / (INT64)inst->param[2].value));
1527            }
1528         }
1529         break;
1530
1531      /* AND: convert to MOV if immediate, or if anding against 0 or 0xffffffff */
1532      case DRCUML_OP_AND:
1533         if (param_is_immediate_value(inst, 1, 0) || param_is_immediate_value(inst, 2, 0))
1534            convert_to_mov_immediate(inst, 0);
1535         else if (param_is_immediate(inst, 1) && param_is_immediate(inst, 2))
1536            convert_to_mov_immediate(inst, inst->param[1].value & inst->param[2].value);
1537         else if (param_is_immediate_value(inst, 1, instsizemask[inst->size]))
1538            convert_to_mov_param(inst, 2);
1539         else if (param_is_immediate_value(inst, 2, instsizemask[inst->size]))
1540            convert_to_mov_param(inst, 1);
1541         break;
1542
1543      /* TEST: no-op if no flags needed */
1544      case DRCUML_OP_TEST:
1545         if (inst->flags == 0)
1546            convert_to_nop(inst);
1547         break;
1548
1549      /* OR: convert to MOV if immediate, or if oring against 0 or 0xffffffff */
1550      case DRCUML_OP_OR:
1551         if (param_is_immediate_value(inst, 1, instsizemask[inst->size]) || param_is_immediate_value(inst, 2, instsizemask[inst->size]))
1552            convert_to_mov_immediate(inst, instsizemask[inst->size]);
1553         else if (param_is_immediate(inst, 1) && param_is_immediate(inst, 2))
1554            convert_to_mov_immediate(inst, inst->param[1].value | inst->param[2].value);
1555         else if (param_is_immediate_value(inst, 1, 0))
1556            convert_to_mov_param(inst, 2);
1557         else if (param_is_immediate_value(inst, 2, 0))
1558            convert_to_mov_param(inst, 1);
1559         break;
1560
1561      /* XOR: convert to MOV if immediate, or if xoring against 0 */
1562      case DRCUML_OP_XOR:
1563         if (param_is_immediate(inst, 1) && param_is_immediate(inst, 2))
1564            convert_to_mov_immediate(inst, inst->param[1].value ^ inst->param[2].value);
1565         else if (param_is_immediate_value(inst, 1, 0))
1566            convert_to_mov_param(inst, 2);
1567         else if (param_is_immediate_value(inst, 2, 0))
1568            convert_to_mov_param(inst, 1);
1569         break;
1570
1571      /* LZCNT: convert to MOV if immediate */
1572      case DRCUML_OP_LZCNT:
1573         if (param_is_immediate(inst, 1))
1574         {
1575            if (inst->size == 4)
1576               convert_to_mov_immediate(inst, count_leading_zeros(inst->param[1].value));
1577            else if (inst->size == 8)
1578            {
1579               if ((inst->param[1].value >> 32) == 0)
1580                  convert_to_mov_immediate(inst, 32 + count_leading_zeros(inst->param[1].value));
1581               else
1582                  convert_to_mov_immediate(inst, count_leading_zeros(inst->param[1].value >> 32));
1583            }
1584         }
1585         break;
1586
1587      /* BSWAP: convert to MOV if immediate */
1588      case DRCUML_OP_BSWAP:
1589         if (param_is_immediate(inst, 1))
1590         {
1591            if (inst->size == 4)
1592               convert_to_mov_immediate(inst, FLIPENDIAN_INT32(inst->param[1].value));
1593            else if (inst->size == 8)
1594               convert_to_mov_immediate(inst, FLIPENDIAN_INT64(inst->param[1].value));
1595         }
1596         break;
1597
1598      /* SHL: convert to MOV if immediate or shifting by 0 */
1599      case DRCUML_OP_SHL:
1600         if (param_is_immediate(inst, 1) && param_is_immediate(inst, 2))
1601            convert_to_mov_immediate(inst, inst->param[1].value << inst->param[2].value);
1602         else if (param_is_immediate_value(inst, 2, 0))
1603            convert_to_mov_param(inst, 1);
1604         break;
1605
1606      /* SHR: convert to MOV if immediate or shifting by 0 */
1607      case DRCUML_OP_SHR:
1608         if (param_is_immediate(inst, 1) && param_is_immediate(inst, 2))
1609         {
1610            if (inst->size == 4)
1611               convert_to_mov_immediate(inst, (UINT32)inst->param[1].value >> inst->param[2].value);
1612            else if (inst->size == 8)
1613               convert_to_mov_immediate(inst, (UINT64)inst->param[1].value >> inst->param[2].value);
1614         }
1615         else if (param_is_immediate_value(inst, 2, 0))
1616            convert_to_mov_param(inst, 1);
1617         break;
1618
1619      /* SAR: convert to MOV if immediate or shifting by 0 */
1620      case DRCUML_OP_SAR:
1621         if (param_is_immediate(inst, 1) && param_is_immediate(inst, 2))
1622         {
1623            if (inst->size == 4)
1624               convert_to_mov_immediate(inst, (INT32)inst->param[1].value >> inst->param[2].value);
1625            else if (inst->size == 8)
1626               convert_to_mov_immediate(inst, (INT64)inst->param[1].value >> inst->param[2].value);
1627         }
1628         else if (param_is_immediate_value(inst, 2, 0))
1629            convert_to_mov_param(inst, 1);
1630         break;
1631
1632      /* ROL: convert to NOP if immediate or rotating by 0 */
1633      case DRCUML_OP_ROL:
1634         if (param_is_immediate(inst, 1) && param_is_immediate(inst, 2))
1635         {
1636            if (inst->size == 4)
1637               convert_to_mov_immediate(inst, rol32(inst->param[1].value, inst->param[2].value));
1638            else if (inst->size == 8)
1639               convert_to_mov_immediate(inst, rol64(inst->param[1].value, inst->param[2].value));
1640         }
1641         else if (param_is_immediate_value(inst, 2, 0))
1642            convert_to_mov_param(inst, 1);
1643         break;
1644
1645      /* ROR: convert to NOP if immediate or rotating by 0 */
1646      case DRCUML_OP_ROR:
1647         if (param_is_immediate(inst, 1) && param_is_immediate(inst, 2))
1648         {
1649            if (inst->size == 4)
1650               convert_to_mov_immediate(inst, rol32(inst->param[1].value, 32 - inst->param[2].value));
1651            else if (inst->size == 8)
1652               convert_to_mov_immediate(inst, rol64(inst->param[1].value, 64 - inst->param[2].value));
1653         }
1654         else if (param_is_immediate_value(inst, 2, 0))
1655            convert_to_mov_param(inst, 1);
1656         break;
1657
1658      /* FMOV: convert to NOP if move-to-self */
1659      case DRCUML_OP_FMOV:
1660         if (param_equal(inst, 0, 1))
1661            convert_to_nop(inst);
1662         break;
1663
1664      default:
1665         break;
9151666   }
916   if (inst->numparams > 2)
1667
1668#if LOG_SIMPLIFICATIONS
1669   if (memcmp(&orig, inst, sizeof(orig)) != 0)
9171670   {
918      assert(inst->param[2].type > DRCUML_PTYPE_NONE && inst->param[2].type < DRCUML_PTYPE_MAX);
919      assert(((opvalid->ptypes[2] >> inst->param[2].type) & 1) != 0);
920      if (inst->param[2].type == DRCUML_PTYPE_MEMORY && !(opvalid->ptypes[2] & OV_PARAM_FLAG_ANYMEM))
921         assert_in_near_cache(block->drcuml->cache, (void *)(FPTR)inst->param[2].value);
1671      char disasm1[256], disasm2[256];
1672      drcuml_disasm(&orig, disasm1, block->drcuml);
1673      drcuml_disasm(inst, disasm2, block->drcuml);
1674      mame_printf_debug("Simplified: %-50.50s -> %s\n", disasm1, disasm2);
9221675   }
923   if (inst->numparams > 3)
1676#endif
1677
1678   /* if the opcode changed, validate and reoptimize */
1679   if (inst->opcode != origop)
9241680   {
925      assert(inst->param[3].type > DRCUML_PTYPE_NONE && inst->param[3].type < DRCUML_PTYPE_MAX);
926      assert(((opvalid->ptypes[3] >> inst->param[3].type) & 1) != 0);
927      if (inst->param[3].type == DRCUML_PTYPE_MEMORY && !(opvalid->ptypes[3] & OV_PARAM_FLAG_ANYMEM))
928         assert_in_near_cache(block->drcuml->cache, (void *)(FPTR)inst->param[3].value);
1681      validate_instruction(block, inst);
1682      simplify_instruction_with_no_flags(block, inst);
9291683   }
9301684}
9311685
9321686
9331687
9341688/***************************************************************************
1689    LOGGING HELPERS
1690***************************************************************************/
1691
1692/*-------------------------------------------------
1693    disassemble_block - disassemble a block of
1694    instructions to the log
1695-------------------------------------------------*/
1696
1697static void disassemble_block(drcuml_block *block)
1698{
1699   int firstcomment = -1;
1700   int instnum;
1701
1702   /* iterate over instructions and output */
1703   for (instnum = 0; instnum < block->nextinst; instnum++)
1704   {
1705      const drcuml_instruction *inst = &block->inst[instnum];
1706      int flushcomments = FALSE;
1707
1708      /* remember comments and mapvars for later */
1709      if (inst->opcode == DRCUML_OP_COMMENT || inst->opcode == DRCUML_OP_MAPVAR)
1710      {
1711         if (firstcomment == -1)
1712            firstcomment = instnum;
1713      }
1714
1715      /* print labels, handles, and hashes left justified */
1716      else if (inst->opcode == DRCUML_OP_LABEL)
1717         drcuml_log_printf(block->drcuml, "$%X:\n", (UINT32)inst->param[0].value);
1718      else if (inst->opcode == DRCUML_OP_HANDLE)
1719         drcuml_log_printf(block->drcuml, "%s:\n", drcuml_handle_name((const drcuml_codehandle *)(FPTR)inst->param[0].value));
1720      else if (inst->opcode == DRCUML_OP_HASH)
1721         drcuml_log_printf(block->drcuml, "(%X,%X):\n", (UINT32)inst->param[0].value, (UINT32)inst->param[1].value);
1722
1723      /* indent everything else with a tab */
1724      else
1725      {
1726         char dasm[256];
1727         drcuml_disasm(&block->inst[instnum], dasm, block->drcuml);
1728
1729         /* include the first accumulated comment with this line */
1730         if (firstcomment != -1)
1731         {
1732            drcuml_log_printf(block->drcuml, "\t%-50.50s; %s\n", dasm, get_comment_text(&block->inst[firstcomment]));
1733            firstcomment++;
1734            flushcomments = TRUE;
1735         }
1736         else
1737            drcuml_log_printf(block->drcuml, "\t%s\n", dasm);
1738      }
1739
1740      /* flush any comments pending */
1741      if (firstcomment != -1 && (flushcomments || instnum == block->nextinst - 1))
1742      {
1743         while (firstcomment <= instnum)
1744         {
1745            const char *text = get_comment_text(&block->inst[firstcomment++]);
1746            if (text != NULL)
1747               drcuml_log_printf(block->drcuml, "\t%50s; %s\n", "", text);
1748         }
1749         firstcomment = -1;
1750      }
1751   }
1752   drcuml_log_printf(block->drcuml, "\n\n");
1753   fflush(block->drcuml->umllog);
1754}
1755
1756
1757/*-------------------------------------------------
1758    get_comment_text - determine the text
1759    associated with a comment or mapvar
1760-------------------------------------------------*/
1761
1762static const char *get_comment_text(const drcuml_instruction *inst)
1763{
1764   static char tempbuf[100];
1765
1766   /* comments return their strings */
1767   if (inst->opcode == DRCUML_OP_COMMENT)
1768      return (char *)(FPTR)inst->param[0].value;
1769
1770   /* mapvars comment about their values */
1771   else if (inst->opcode == DRCUML_OP_MAPVAR)
1772   {
1773      sprintf(tempbuf, "m%d = $%X", (int)inst->param[0].value - DRCUML_MAPVAR_M0, (UINT32)inst->param[1].value);
1774      return tempbuf;
1775   }
1776
1777   /* everything else is NULL */
1778   return NULL;
1779}
1780
1781
1782
1783/***************************************************************************
1784    OPCODE VALIDATION
1785***************************************************************************/
1786
1787/*-------------------------------------------------
1788    validate_instruction - verify that the
1789    instruction created meets all requirements
1790-------------------------------------------------*/
1791
1792static void validate_instruction(drcuml_block *block, const drcuml_instruction *inst)
1793{
1794   const drcuml_opcode_info *opinfo = opcode_info_table[inst->opcode];
1795   int pnum;
1796
1797   /* validate raw information */
1798   assert(inst->opcode != DRCUML_OP_INVALID && inst->opcode < DRCUML_OP_MAX);
1799   assert(inst->size == 1 || inst->size == 2 || inst->size == 4 || inst->size == 8);
1800
1801   /* validate against opcode limits */
1802   assert((opinfo->sizes & inst->size) != 0);
1803   assert(inst->condition == DRCUML_COND_ALWAYS || opinfo->condition);
1804
1805   /* validate each parameter */
1806   for (pnum = 0; pnum < inst->numparams; pnum++)
1807   {
1808      const drcuml_parameter *param = &inst->param[pnum];
1809      UINT16 typemask = opinfo->param[pnum].typemask;
1810
1811      /* ensure the type is correct */
1812      assert(param->type > DRCUML_PTYPE_NONE && param->type < DRCUML_PTYPE_MAX);
1813      assert((typemask >> param->type) & 1);
1814
1815      /* validate various parameter types */
1816      switch (param->type)
1817      {
1818         case DRCUML_PTYPE_MEMORY:
1819            /* most memory parameters must be in the near cache */
1820            if (typemask != PTYPES_PTR && typemask != PTYPES_STATE && typemask != PTYPES_STR && typemask != PTYPES_CFUNC)
1821               assert_in_near_cache(block->drcuml->cache, (void *)(FPTR)param->value);
1822            break;
1823
1824         case DRCUML_PTYPE_IMMEDIATE:
1825            /* many special parameter types are encoded as immediately; ensure they are in range */
1826            if (typemask == PTYPES_SIZE)
1827               assert(param->value >= DRCUML_SIZE_BYTE && param->value <= DRCUML_SIZE_QWORD);
1828            else if (typemask == PTYPES_SPACE)
1829               assert(param->value >= ADDRESS_SPACE_PROGRAM && param->value <= ADDRESS_SPACE_IO);
1830            else if (typemask == PTYPES_SPSZ)
1831            {
1832               assert(param->value % 16 >= DRCUML_SIZE_BYTE && param->value % 16 <= DRCUML_SIZE_QWORD);
1833               assert(param->value / 16 >= ADDRESS_SPACE_PROGRAM && param->value / 16 <= ADDRESS_SPACE_IO);
1834            }
1835            else if (typemask == PTYPES_FMOD)
1836               assert(param->value >= DRCUML_FMOD_TRUNC && param->value <= DRCUML_FMOD_DEFAULT);
1837            break;
1838
1839         case DRCUML_PTYPE_MAPVAR:
1840            assert(param->value >= DRCUML_MAPVAR_M0 && param->value < DRCUML_MAPVAR_END);
1841            break;
1842
1843         case DRCUML_PTYPE_INT_REGISTER:
1844            assert(param->value >= DRCUML_REG_I0 && param->value < DRCUML_REG_I_END);
1845            break;
1846
1847         case DRCUML_PTYPE_FLOAT_REGISTER:
1848            assert(param->value >= DRCUML_REG_F0 && param->value < DRCUML_REG_F_END);
1849            break;
1850
1851         default:
1852            assert(FALSE);
1853            break;
1854      }
1855   }
1856
1857   /* make sure we aren't missing any parameters */
1858   if (inst->numparams < ARRAY_LENGTH(opinfo->param))
1859      assert(opinfo->param[inst->numparams].typemask == 0);
1860}
1861
1862
1863
1864#if 0
1865
1866/***************************************************************************
9351867    BACK-END VALIDATION
9361868***************************************************************************/
9371869
r2844r2845
10131945
10141946static void bevalidate_iterate_over_params(drcuml_state *drcuml, drcuml_codehandle **handles, const bevalidate_test *test, drcuml_parameter *paramlist, int pnum)
10151947{
1016   const drcuml_opcode_valid *opvalid = &opcode_valid_table[test->opcode];
1948   const drcuml_opcode_info *opinfo = opcode_info_table[test->opcode];
10171949
10181950   /* if no parameters, execute now */
1019   if (pnum >= ARRAY_LENGTH(opvalid->ptypes) || opvalid->ptypes[pnum] == OV_PARAM_ALLOWED_NONE)
1951   if (pnum >= ARRAY_LENGTH(opinfo->ptypes) || opinfo->ptypes[pnum] == OV_PARAM_ALLOWED_NONE)
10201952   {
10211953      bevalidate_iterate_over_flags(drcuml, handles, test, paramlist);
10221954      return;
r2844r2845
10241956
10251957   /* iterate over valid parameter types */
10261958   for (paramlist[pnum].type = DRCUML_PTYPE_IMMEDIATE; paramlist[pnum].type < DRCUML_PTYPE_MAX; paramlist[pnum].type++)
1027      if (opvalid->ptypes[pnum] & (1 << paramlist[pnum].type))
1959      if (opinfo->ptypes[pnum] & (1 << paramlist[pnum].type))
10281960      {
10291961         int pindex, pcount;
10301962
10311963         /* mapvars can only do 32-bit tests */
1032         if (paramlist[pnum].type == DRCUML_PTYPE_MAPVAR && size_for_param(test->size, opvalid->ptypes[pnum]) == 8)
1964         if (paramlist[pnum].type == DRCUML_PTYPE_MAPVAR && size_for_param(test->size, opinfo->ptypes[pnum]) == 8)
10331965            continue;
10341966
10351967         /* for some parameter types, we wish to iterate over all possibilities */
r2844r2845
10772009
10782010static void bevalidate_iterate_over_flags(drcuml_state *drcuml, drcuml_codehandle **handles, const bevalidate_test *test, drcuml_parameter *paramlist)
10792011{
1080   const drcuml_opcode_valid *opvalid = &opcode_valid_table[test->opcode];
1081   UINT8 flagmask = opvalid->condflags & 0x1f;
2012   const drcuml_opcode_info *opinfo = opcode_info_table[test->opcode];
2013   UINT8 flagmask = opinfo->flags & 0x1f;
10822014   UINT8 curmask;
10832015
10842016   /* iterate over all possible flag combinations */
r2844r2845
11252057   switch (numparams)
11262058   {
11272059      case 0:
1128         drcuml_block_append_0(block, test->opcode, test->size, flagmask);
2060         drcuml_block_append_0(block, test->opcode, test->size, DRCUML_COND_ALWAYS, flagmask);
11292061         break;
11302062
11312063      case 1:
1132         drcuml_block_append_1(block, test->opcode, test->size, flagmask, params[0].type, params[0].value);
2064         drcuml_block_append_1(block, test->opcode, test->size, DRCUML_COND_ALWAYS, flagmask, params[0].type, params[0].value);
11332065         break;
11342066
11352067      case 2:
1136         drcuml_block_append_2(block, test->opcode, test->size, flagmask, params[0].type, params[0].value, params[1].type, params[1].value);
2068         drcuml_block_append_2(block, test->opcode, test->size, DRCUML_COND_ALWAYS, flagmask, params[0].type, params[0].value, params[1].type, params[1].value);
11372069         break;
11382070
11392071      case 3:
1140         drcuml_block_append_3(block, test->opcode, test->size, flagmask, params[0].type, params[0].value, params[1].type, params[1].value, params[2].type, params[2].value);
2072         drcuml_block_append_3(block, test->opcode, test->size, DRCUML_COND_ALWAYS, flagmask, params[0].type, params[0].value, params[1].type, params[1].value, params[2].type, params[2].value);
11412073         break;
11422074
11432075      case 4:
1144         drcuml_block_append_4(block, test->opcode, test->size, flagmask, params[0].type, params[0].value, params[1].type, params[1].value, params[2].type, params[2].value, params[3].type, params[3].value);
2076         drcuml_block_append_4(block, test->opcode, test->size, DRCUML_COND_ALWAYS, flagmask, params[0].type, params[0].value, params[1].type, params[1].value, params[2].type, params[2].value, params[3].type, params[3].value);
11452077         break;
11462078   }
11472079   testinst = block->inst[block->nextinst - 1];
r2844r2845
12052137
12062138static int bevalidate_populate_state(drcuml_block *block, drcuml_machine_state *state, const bevalidate_test *test, const drcuml_parameter *paramlist, drcuml_parameter *params, UINT64 *parammem)
12072139{
1208   const drcuml_opcode_valid *opvalid = &opcode_valid_table[test->opcode];
2140   const drcuml_opcode_info *opinfo = opcode_info_table[test->opcode];
12092141   int numparams = ARRAY_LENGTH(test->param);
12102142   int pnum;
12112143
r2844r2845
12152147   /* iterate over parameters */
12162148   for (pnum = 0; pnum < ARRAY_LENGTH(test->param); pnum++)
12172149   {
1218      int psize = size_for_param(test->size, opvalid->ptypes[pnum]);
2150      int psize = size_for_param(test->size, opinfo->ptypes[pnum]);
12192151      drcuml_parameter *curparam = &params[pnum];
12202152
12212153      /* start with a copy of the parameter from the list */
r2844r2845
12762208
12772209static int bevalidate_verify_state(drcuml_state *drcuml, const drcuml_machine_state *istate, drcuml_machine_state *state, const bevalidate_test *test, const drcuml_parameter *params, const drcuml_instruction *testinst, drccodeptr codestart, drccodeptr codeend, UINT8 flagmask)
12782210{
1279   const drcuml_opcode_valid *opvalid = &opcode_valid_table[test->opcode];
2211   const drcuml_opcode_info *opinfo = opcode_info_table[test->opcode];
12802212   UINT8 ireg[DRCUML_REG_I_END - DRCUML_REG_I0] = { 0 };
12812213   UINT8 freg[DRCUML_REG_F_END - DRCUML_REG_F0] = { 0 };
12822214   char errorbuf[1024];
r2844r2845
13052237   for (pnum = 0; pnum < ARRAY_LENGTH(test->param); pnum++)
13062238      if (test->destmask & (1 << pnum))
13072239      {
1308         UINT64 mask = mask_for_param(test->size, opvalid->ptypes[pnum]);
1309         int psize = size_for_param(test->size, opvalid->ptypes[pnum]);
2240         UINT64 mask = mask_for_param(test->size, opinfo->ptypes[pnum]);
2241         int psize = size_for_param(test->size, opinfo->ptypes[pnum]);
13102242         UINT64 result = 0;
13112243
13122244         /* fetch the result from the parameters */
r2844r2845
13662298   /* output the error if we have one */
13672299   if (errend != errorbuf)
13682300   {
1369      char disasm[100];
2301      char disasm[256];
13702302
13712303      /* disassemble the test instruction */
1372      drcuml_disasm(testinst, disasm);
2304      drcuml_disasm(testinst, disasm, drcuml);
13732305
13742306      /* output a description of what went wrong */
13752307      printf("\n");
r2844r2845
13832315   }
13842316   return errend != errorbuf;
13852317}
2318
2319#endif
src/emu/cpu/drcfe.h
r2844r2845
7575#define OPFLAG_CAN_CHANGE_MODES         0x00080000      /* instruction can change modes */
7676
7777/* execution semantics */
78#define OPFLAG_READS_MEMORY            0x00080000      /* instruction reads memory */
79#define OPFLAG_WRITES_MEMORY         0x00100000      /* instruction writes memory */
78#define OPFLAG_READS_MEMORY            0x00100000      /* instruction reads memory */
79#define OPFLAG_WRITES_MEMORY         0x00200000      /* instruction writes memory */
8080
8181
8282
r2844r2845
8888typedef struct _drcfe_state drcfe_state;
8989
9090
91/* register information as bitmasks */
92typedef struct _drc_reginfo drc_reginfo;
93struct _drc_reginfo
94{
95   UINT64         used;               /* bitmask of used registers */
96   UINT64         modified;            /* bitmask of modified registers */
97   UINT64         constant;            /* bitmask of constant registers */
98   UINT64         liveread;            /* bitmask of registers that are live for reading */
99   UINT64         livewrite;            /* bitmask of registers that are live for writing */
100};
101
102
10391/* description of a given opcode */
10492typedef struct _opcode_desc opcode_desc;
10593struct _opcode_desc
10694{
10795   /* links to other descriptions */
10896   opcode_desc *   next;               /* pointer to next description */
97   opcode_desc *   prev;               /* pointer to previous description */
10998   opcode_desc *   branch;               /* pointer back to branch description for delay slots */
11099   opcode_desc *   delay;               /* pointer to delay slot description */
111100
r2844r2845
132121   UINT32         cycles;               /* number of cycles needed to execute */
133122
134123   /* register usage information */
135   drc_reginfo      gpr;               /* register info for GPRs */
136   drc_reginfo      fpr;               /* register info for FPRs */
124   UINT32         regin[4];            /* input registers */
125   UINT32         regout[4];            /* output registers */
126   UINT32         regreq[4];            /* required output registers */
137127};
138128
139129
src/emu/cpu/minx/minxops.h
r2844r2845
314314    8,  8,  8,  8, 12, 16,  8,  8,  8,  8,  8,  8, 12, 16,  8,  8,
315315    8,  8,  8,  8, 12, 16,  8,  8,  8,  8,  8,  8, 12, 16,  8,  8,
316316    8,  8,  8,  8, 12, 16,  8,  8,  8,  8,  8,  8, 12, 16,  8,  8,
317
317
318318    4,  4,  4,  4, 12,  8,  8,  8,  4,  4,  4,  4, 12,  8,  8,  8,
319319    4,  4,  4,  4, 12,  8,  8,  8,  4,  4,  4,  4, 12,  8,  8,  8,
320320    8,  8,  8,  8, 16, 12, 12, 12,  8,  8,  8,  8, 16, 12, 12, 12,
src/emu/cpu/drcuml.h
r2844r2845
193193   DRCUML_OP_MAPVAR,      /* MAPVAR  mapvar,value           */
194194
195195   /* Control Flow Operations */
196   DRCUML_OP_NOP,         /* NOP                            */
196197   DRCUML_OP_DEBUG,      /* DEBUG   pc                     */
197198   DRCUML_OP_EXIT,         /* EXIT    src1[,c]               */
198199   DRCUML_OP_HASHJMP,      /* HASHJMP mode,pc,handle         */
r2844r2845
303304typedef struct _drcuml_parameter drcuml_parameter;
304305struct _drcuml_parameter
305306{
306   drcuml_ptype    type;            /* parameter type */
307   drcuml_pvalue   value;            /* parameter value */
307   drcuml_ptype       type;            /* parameter type */
308   drcuml_pvalue      value;            /* parameter value */
308309};
309310
310311
r2844r2845
312313typedef struct _drcuml_instruction drcuml_instruction;
313314struct _drcuml_instruction
314315{
315   drcuml_opcode   opcode;            /* opcode */
316   UINT8         condflags;         /* condition or flags */
317   UINT8         size;            /* operation size */
318   UINT8         numparams;         /* number of parameters */
319   drcuml_parameter param[4];         /* up to 4 parameters */
316   drcuml_opcode      opcode;            /* opcode */
317   UINT8            condition;         /* condition */
318   UINT8            flags;            /* flags */
319   UINT8            size;            /* operation size */
320   UINT8            numparams;         /* number of parameters */
321   drcuml_parameter    param[4];         /* up to 4 parameters */
320322};
321323
322324
325/* structure describing rules for parameter encoding */
326typedef struct _drcuml_parameter_info drcuml_parameter_info;
327struct _drcuml_parameter_info
328{
329   UINT8            output;            /* input or output? */
330   UINT8            size;            /* size of the parameter */
331   UINT16            typemask;         /* types allowed */
332};
333
334
335/* structure describing rules for opcode encoding */
336typedef struct _drcuml_opcode_info drcuml_opcode_info;
337struct _drcuml_opcode_info
338{
339   drcuml_opcode      opcode;            /* the opcode itself */
340   const char *      mnemonic;         /* mnemonic string */
341   UINT8            sizes;            /* allowed sizes */
342   UINT8            condition;         /* conditions allowed? */
343   UINT8            inflags;         /* input flags */
344   UINT8            outflags;         /* output flags */
345   UINT8            modflags;         /* modified flags */
346   drcuml_parameter_info param[4];         /* information about parameters */
347};
348
349
323350/* an integer register, with low/high parts */
324351typedef union _drcuml_ireg drcuml_ireg;
325352union _drcuml_ireg
326353{
327354#ifdef LSB_FIRST
328   struct { UINT32   l,h; } w;         /* 32-bit low, high parts of the register */
355   struct { UINT32   l,h; } w;            /* 32-bit low, high parts of the register */
329356#else
330   struct { UINT32 h,l; } w;         /* 32-bit low, high parts of the register */
357   struct { UINT32 h,l; } w;            /* 32-bit low, high parts of the register */
331358#endif
332   UINT64         d;               /* 64-bit full register */
359   UINT64            d;               /* 64-bit full register */
333360};
334361
335362
r2844r2845
338365union _drcuml_freg
339366{
340367#ifdef LSB_FIRST
341   struct { float l,h; } s;         /* 32-bit low, high parts of the register */
368   struct { float l,h; } s;            /* 32-bit low, high parts of the register */
342369#else
343   struct { float h,l;   } s;         /* 32-bit low, high parts of the register */
370   struct { float h,l;   } s;            /* 32-bit low, high parts of the register */
344371#endif
345   double         d;               /* 64-bit full register */
372   double            d;               /* 64-bit full register */
346373};
347374
348375
r2844r2845
350377typedef struct _drcuml_machine_state drcuml_machine_state;
351378struct _drcuml_machine_state
352379{
353   drcuml_ireg      r[DRCUML_REG_I_END - DRCUML_REG_I0];   /* integer registers */
354   drcuml_freg      f[DRCUML_REG_F_END - DRCUML_REG_F0];   /* floating-point registers */
355   UINT32         exp;                           /* exception parameter register */
356   UINT8         fmod;                           /* fmod (floating-point mode) register */
357   UINT8         flags;                           /* flags state */
380   drcuml_ireg         r[DRCUML_REG_I_END - DRCUML_REG_I0];   /* integer registers */
381   drcuml_freg         f[DRCUML_REG_F_END - DRCUML_REG_F0];   /* floating-point registers */
382   UINT32            exp;            /* exception parameter register */
383   UINT8            fmod;            /* fmod (floating-point mode) register */
384   UINT8            flags;            /* flags state */
358385};
359386
360387
r2844r2845
362389typedef struct _drcbe_info drcbe_info;
363390struct _drcbe_info
364391{
365   UINT8         direct_iregs;                     /* number of direct-mapped integer registers */
366   UINT8         direct_fregs;                     /* number of direct-mapped floating point registers */
392   UINT8            direct_iregs;      /* number of direct-mapped integer registers */
393   UINT8            direct_fregs;      /* number of direct-mapped floating point registers */
367394};
368395
369396
r2844r2845
418445drcuml_block *drcuml_block_begin(drcuml_state *drcuml, UINT32 maxinst, jmp_buf *errorbuf);
419446
420447/* append an opcode to the block, with 0-4 parameters */
421void drcuml_block_append_0(drcuml_block *block, drcuml_opcode op, UINT8 size, UINT8 condflags);
422void drcuml_block_append_1(drcuml_block *block, drcuml_opcode op, UINT8 size, UINT8 condflags, drcuml_ptype p0type, drcuml_pvalue p0value);
423void drcuml_block_append_2(drcuml_block *block, drcuml_opcode op, UINT8 size, UINT8 condflags, drcuml_ptype p0type, drcuml_pvalue p0value, drcuml_ptype p1type, drcuml_pvalue p1value);
424void drcuml_block_append_3(drcuml_block *block, drcuml_opcode op, UINT8 size, UINT8 condflags, drcuml_ptype p0type, drcuml_pvalue p0value, drcuml_ptype p1type, drcuml_pvalue p1value, drcuml_ptype p2type, drcuml_pvalue p2value);
425void drcuml_block_append_4(drcuml_block *block, drcuml_opcode op, UINT8 size, UINT8 condflags, drcuml_ptype p0type, drcuml_pvalue p0value, drcuml_ptype p1type, drcuml_pvalue p1value, drcuml_ptype p2type, drcuml_pvalue p2value, drcuml_ptype p3type, drcuml_pvalue p3value);
448void drcuml_block_append_0(drcuml_block *block, drcuml_opcode op, UINT8 size, UINT8 condition);
449void drcuml_block_append_1(drcuml_block *block, drcuml_opcode op, UINT8 size, UINT8 condition, drcuml_ptype p0type, drcuml_pvalue p0value);
450void drcuml_block_append_2(drcuml_block *block, drcuml_opcode op, UINT8 size, UINT8 condition, drcuml_ptype p0type, drcuml_pvalue p0value, drcuml_ptype p1type, drcuml_pvalue p1value);
451void drcuml_block_append_3(drcuml_block *block, drcuml_opcode op, UINT8 size, UINT8 condition, drcuml_ptype p0type, drcuml_pvalue p0value, drcuml_ptype p1type, drcuml_pvalue p1value, drcuml_ptype p2type, drcuml_pvalue p2value);
452void drcuml_block_append_4(drcuml_block *block, drcuml_opcode op, UINT8 size, UINT8 condition, drcuml_ptype p0type, drcuml_pvalue p0value, drcuml_ptype p1type, drcuml_pvalue p1value, drcuml_ptype p2type, drcuml_pvalue p2value, drcuml_ptype p3type, drcuml_pvalue p3value);
426453
427454/* complete a code block and commit it to the cache via the back-end */
428455void drcuml_block_end(drcuml_block *block);
r2844r2845
464491/* ----- code logging ----- */
465492
466493/* directly printf to the UML log if generated */
467void drcuml_log_printf(drcuml_state *state, const char *format, ...) ATTR_PRINTF(2,3);
494void drcuml_log_printf(drcuml_state *drcuml, const char *format, ...) ATTR_PRINTF(2,3);
468495
496/* add a symbol to the internal symbol table */
497void drcuml_symbol_add(drcuml_state *drcuml, void *base, UINT32 length, const char *name);
498
499/* look up a symbol from the internal symbol table or return NULL if not found */
500const char *drcuml_symbol_find(drcuml_state *drcuml, void *base, UINT32 *offset);
501
469502/* attach a comment to the current output location in the specified block */
470503void drcuml_add_comment(drcuml_block *block, const char *format, ...) ATTR_PRINTF(2,3);
471504
505/* disassemble a UML instruction to the given buffer */
506void drcuml_disasm(const drcuml_instruction *inst, char *buffer, drcuml_state *state);
472507
508
473509#endif
src/emu/cpu/drcbex64.c
r2844r2845
2020
2121    * Convert AND 0xff/0xffff to movzx
2222
23    * Convert SUB a,0,b to NEG
24
25    * Optimize, e.g., and [r5],i0,$FF to use rbx as temporary register
26        (avoid initial move) if i0 is not needed going forward
27
2328****************************************************************************
2429
2530    -------------------------
r2844r2845
166171***************************************************************************/
167172
168173#include "drcuml.h"
169#include "drcumld.h"
170174#include "drcbeut.h"
171175#include "debugger.h"
172176#include "x86emit.h"
r2844r2845
222226    MACROS
223227***************************************************************************/
224228
225#define X86_CONDITION(condflags)      (condition_map[condflags - DRCUML_COND_Z])
226#define X86_NOT_CONDITION(condflags)   (condition_map[condflags - DRCUML_COND_Z] ^ 1)
229#define X86_CONDITION(condition)      (condition_map[condition - DRCUML_COND_Z])
230#define X86_NOT_CONDITION(condition)   (condition_map[condition - DRCUML_COND_Z] ^ 1)
227231
228232#undef MABS
229233#define MABS(drcbe, ptr)   MBD(REG_RBP, offset_from_rbp(drcbe, (FPTR)(ptr)))
230234
235#define assert_no_condition(inst)      assert((inst)->condition == DRCUML_COND_ALWAYS)
236#define assert_any_condition(inst)      assert((inst)->condition == DRCUML_COND_ALWAYS || ((inst)->condition >= DRCUML_COND_Z && (inst)->condition < DRCUML_COND_MAX))
237#define assert_no_flags(inst)         assert((inst)->flags == 0)
238#define assert_flags(inst, valid)      assert(((inst)->flags & ~(valid)) == 0)
231239
232240
241
233242/***************************************************************************
234243    TYPE DEFINITIONS
235244***************************************************************************/
r2844r2845
385394static x86code *op_comment(drcbe_state *drcbe, x86code *dst, const drcuml_instruction *inst);
386395static x86code *op_mapvar(drcbe_state *drcbe, x86code *dst, const drcuml_instruction *inst);
387396
397static x86code *op_nop(drcbe_state *drcbe, x86code *dst, const drcuml_instruction *inst);
388398static x86code *op_debug(drcbe_state *drcbe, x86code *dst, const drcuml_instruction *inst);
389399static x86code *op_exit(drcbe_state *drcbe, x86code *dst, const drcuml_instruction *inst);
390400static x86code *op_hashjmp(drcbe_state *drcbe, x86code *dst, const drcuml_instruction *inst);
r2844r2845
468478   { DRCUML_OP_MAPVAR,  op_mapvar },   /* MAPVAR  mapvar,value           */
469479
470480   /* Control Flow Operations */
481   { DRCUML_OP_NOP,     op_nop },      /* NOP                            */
471482   { DRCUML_OP_DEBUG,   op_debug },   /* DEBUG   pc                     */
472483   { DRCUML_OP_EXIT,    op_exit },      /* EXIT    src1[,c]               */
473484   { DRCUML_OP_HASHJMP, op_hashjmp },   /* HASHJMP mode,pc,handle         */
r2844r2845
907918      /* add a comment */
908919      if (drcbe->log != NULL)
909920      {
910         char dasm[100];
911         drcuml_disasm(inst, dasm);
921         char dasm[256];
922         drcuml_disasm(inst, dasm, drcbe->drcuml);
912923         x86log_add_comment(drcbe->log, dst, "%s", dasm);
913924      }
914925
r2844r2845
9931004         dest->value = src->value;
9941005         break;
9951006
996      /* mapvars are converted to immediates with their current value */
997      case DRCUML_PTYPE_MAPVAR:
998         assert(allowed & PTYPE_I);
999         dest->type = DRCUML_PTYPE_IMMEDIATE;
1000         dest->value = drcmap_get_last_value(drcbe->map, src->value);
1001         break;
1002
10031007      /* memory passes through */
10041008      case DRCUML_PTYPE_MEMORY:
10051009         assert(allowed & PTYPE_M);
r2844r2845
12361240
12371241
12381242/*-------------------------------------------------
1243    emit_mov_r32_p32_keepflags - move a 32-bit
1244    parameter into a register without affecting
1245    any flags
1246-------------------------------------------------*/
1247
1248static void emit_mov_r32_p32_keepflags(drcbe_state *drcbe, x86code **dst, UINT8 reg, const drcuml_parameter *param)
1249{
1250   if (param->type == DRCUML_PTYPE_IMMEDIATE)
1251      emit_mov_r32_imm(dst, reg, param->value);                              // mov   reg,param
1252   else if (param->type == DRCUML_PTYPE_MEMORY)
1253      emit_mov_r32_m32(dst, reg, MABS(drcbe, param->value));                     // mov   reg,[param]
1254   else if (param->type == DRCUML_PTYPE_INT_REGISTER)
1255   {
1256      if (reg != param->value)
1257         emit_mov_r32_r32(dst, reg, param->value);                           // mov   reg,param
1258   }
1259}
1260
1261
1262/*-------------------------------------------------
12391263    emit_mov_m32_p32 - move a 32-bit parameter
12401264    into a memory location
12411265-------------------------------------------------*/
r2844r2845
12811305{
12821306   if (param->type == DRCUML_PTYPE_IMMEDIATE)
12831307   {
1284      if (inst->condflags != 0 || param->value != 0)
1308      if (inst->flags != 0 || param->value != 0)
12851309         emit_add_r32_imm(dst, reg, param->value);                           // add   reg,param
12861310   }
12871311   else if (param->type == DRCUML_PTYPE_MEMORY)
r2844r2845
13001324{
13011325   if (param->type == DRCUML_PTYPE_IMMEDIATE)
13021326   {
1303      if (inst->condflags != 0 || param->value != 0)
1327      if (inst->flags != 0 || param->value != 0)
13041328         emit_add_m32_imm(dst, MEMPARAMS, param->value);                        // add   [dest],param
13051329   }
13061330   else
r2844r2845
13201344static void emit_adc_r32_p32(drcbe_state *drcbe, x86code **dst, UINT8 reg, const drcuml_parameter *param, const drcuml_instruction *inst)
13211345{
13221346   if (param->type == DRCUML_PTYPE_IMMEDIATE)
1323   {
1324      if (inst->condflags != 0 || param->value != 0)
1325         emit_adc_r32_imm(dst, reg, param->value);                           // adc   reg,param
1326   }
1347      emit_adc_r32_imm(dst, reg, param->value);                              // adc   reg,param
13271348   else if (param->type == DRCUML_PTYPE_MEMORY)
13281349      emit_adc_r32_m32(dst, reg, MABS(drcbe, param->value));                     // adc   reg,[param]
13291350   else if (param->type == DRCUML_PTYPE_INT_REGISTER)
r2844r2845
13391360static void emit_adc_m32_p32(drcbe_state *drcbe, x86code **dst, DECLARE_MEMPARAMS, const drcuml_parameter *param, const drcuml_instruction *inst)
13401361{
13411362   if (param->type == DRCUML_PTYPE_IMMEDIATE)
1342   {
1343      if (inst->condflags != 0 || param->value != 0)
1344         emit_adc_m32_imm(dst, MEMPARAMS, param->value);                        // adc   [dest],param
1345   }
1363      emit_adc_m32_imm(dst, MEMPARAMS, param->value);                           // adc   [dest],param
13461364   else
13471365   {
13481366      int reg = param_select_register(REG_EAX, param, NULL);
1349      emit_mov_r32_p32(drcbe, dst, reg, param);                              // mov   reg,param
1367      emit_mov_r32_p32_keepflags(drcbe, dst, reg, param);                        // mov   reg,param
13501368      emit_adc_m32_r32(dst, MEMPARAMS, reg);                                 // adc   [dest],reg
13511369   }
13521370}
r2844r2845
13611379{
13621380   if (param->type == DRCUML_PTYPE_IMMEDIATE)
13631381   {
1364      if (inst->condflags != 0 || param->value != 0)
1382      if (inst->flags != 0 || param->value != 0)
13651383         emit_sub_r32_imm(dst, reg, param->value);                           // sub   reg,param
13661384   }
13671385   else if (param->type == DRCUML_PTYPE_MEMORY)
r2844r2845
13801398{
13811399   if (param->type == DRCUML_PTYPE_IMMEDIATE)
13821400   {
1383      if (inst->condflags != 0 || param->value != 0)
1401      if (inst->flags != 0 || param->value != 0)
13841402         emit_sub_m32_imm(dst, MEMPARAMS, param->value);                        // sub   [dest],param
13851403   }
13861404   else
r2844r2845
14001418static void emit_sbb_r32_p32(drcbe_state *drcbe, x86code **dst, UINT8 reg, const drcuml_parameter *param, const drcuml_instruction *inst)
14011419{
14021420   if (param->type == DRCUML_PTYPE_IMMEDIATE)
1403   {
1404      if (inst->condflags != 0 || param->value != 0)
1405         emit_sbb_r32_imm(dst, reg, param->value);                           // sbb   reg,param
1406   }
1421      emit_sbb_r32_imm(dst, reg, param->value);                              // sbb   reg,param
14071422   else if (param->type == DRCUML_PTYPE_MEMORY)
14081423      emit_sbb_r32_m32(dst, reg, MABS(drcbe, param->value));                     // sbb   reg,[param]
14091424   else if (param->type == DRCUML_PTYPE_INT_REGISTER)
r2844r2845
14191434static void emit_sbb_m32_p32(drcbe_state *drcbe, x86code **dst, DECLARE_MEMPARAMS, const drcuml_parameter *param, const drcuml_instruction *inst)
14201435{
14211436   if (param->type == DRCUML_PTYPE_IMMEDIATE)
1422   {
1423      if (inst->condflags != 0 || param->value != 0)
1424         emit_sbb_m32_imm(dst, MEMPARAMS, param->value);                        // sbb   [dest],param
1425   }
1437      emit_sbb_m32_imm(dst, MEMPARAMS, param->value);                           // sbb   [dest],param
14261438   else
14271439   {
14281440      int reg = param_select_register(REG_EAX, param, NULL);
1429      emit_mov_r32_p32(drcbe, dst, reg, param);                              // mov   reg,param
1441      emit_mov_r32_p32_keepflags(drcbe, dst, reg, param);                        // mov   reg,param
14301442      emit_sbb_m32_r32(dst, MEMPARAMS, reg);                                 // sbb   [dest],reg
14311443   }
14321444}
r2844r2845
14751487{
14761488   if (param->type == DRCUML_PTYPE_IMMEDIATE)
14771489   {
1478      if (inst->condflags == 0 && (UINT32)param->value == 0xffffffff)
1490      if (inst->flags == 0 && (UINT32)param->value == 0xffffffff)
14791491         /* skip */;
1480      else if (inst->condflags != 0 && (UINT32)param->value == 0)
1492      else if (inst->flags == 0 && (UINT32)param->value == 0)
14811493         emit_xor_r32_r32(dst, reg, reg);                                 // xor   reg,reg
14821494      else
14831495         emit_and_r32_imm(dst, reg, param->value);                           // and   reg,param
r2844r2845
14981510{
14991511   if (param->type == DRCUML_PTYPE_IMMEDIATE)
15001512   {
1501      if (inst->condflags == 0 && (UINT32)param->value == 0xffffffff)
1513      if (inst->flags == 0 && (UINT32)param->value == 0xffffffff)
15021514         /* skip */;
1503      else if (inst->condflags != 0 && (UINT32)param->value == 0)
1515      else if (inst->flags == 0 && (UINT32)param->value == 0)
15041516         emit_mov_m32_imm(dst, MEMPARAMS, 0);                              // mov   [dest],0
15051517      else
15061518         emit_and_m32_imm(dst, MEMPARAMS, param->value);                        // and   [dest],param
r2844r2845
15581570{
15591571   if (param->type == DRCUML_PTYPE_IMMEDIATE)
15601572   {
1561      if (inst->condflags == 0 && (UINT32)param->value == 0)
1573      if (inst->flags == 0 && (UINT32)param->value == 0)
15621574         /* skip */;
1563      else if (inst->condflags != 0 && (UINT32)param->value == 0xffffffff)
1575      else if (inst->flags == 0 && (UINT32)param->value == 0xffffffff)
15641576         emit_mov_r32_imm(dst, reg, -1);                                    // mov  reg,-1
15651577      else
15661578         emit_or_r32_imm(dst, reg, param->value);                           // or   reg,param
r2844r2845
15811593{
15821594   if (param->type == DRCUML_PTYPE_IMMEDIATE)
15831595   {
1584      if (inst->condflags == 0 && (UINT32)param->value == 0)
1596      if (inst->flags == 0 && (UINT32)param->value == 0)
15851597         /* skip */;
1586      else if (inst->condflags != 0 && (UINT32)param->value == 0xffffffff)
1598      else if (inst->flags == 0 && (UINT32)param->value == 0xffffffff)
15871599         emit_mov_m32_imm(dst, MEMPARAMS, -1);                              // mov   [dest],-1
15881600      else
15891601         emit_or_m32_imm(dst, MEMPARAMS, param->value);                        // or   [dest],param
r2844r2845
16061618{
16071619   if (param->type == DRCUML_PTYPE_IMMEDIATE)
16081620   {
1609      if (inst->condflags == 0 && (UINT32)param->value == 0)
1621      if (inst->flags == 0 && (UINT32)param->value == 0)
16101622         /* skip */;
1611      else if (inst->condflags != 0 && (UINT32)param->value == 0xffffffff)
1623      else if (inst->flags == 0 && (UINT32)param->value == 0xffffffff)
16121624         emit_not_r32(dst, reg);                                          // not   reg
16131625      else
16141626         emit_xor_r32_imm(dst, reg, param->value);                           // xor   reg,param
r2844r2845
16291641{
16301642   if (param->type == DRCUML_PTYPE_IMMEDIATE)
16311643   {
1632      if (inst->condflags == 0 && (UINT32)param->value == 0)
1644      if (inst->flags == 0 && (UINT32)param->value == 0)
16331645         /* skip */;
1634      else if (inst->condflags != 0 && (UINT32)param->value == 0xffffffff)
1646      else if (inst->flags == 0 && (UINT32)param->value == 0xffffffff)
16351647         emit_not_m32(dst, MEMPARAMS);                                    // not   [dest]
16361648      else
16371649         emit_xor_m32_imm(dst, MEMPARAMS, param->value);                        // xor   [dest],param
r2844r2845
16541666{
16551667   if (param->type == DRCUML_PTYPE_IMMEDIATE)
16561668   {
1657      if (inst->condflags == 0 && (UINT32)param->value == 0)
1669      if (inst->flags == 0 && (UINT32)param->value == 0)
16581670         /* skip */;
16591671      else
16601672         emit_shl_r32_imm(dst, reg, param->value);                           // shl   reg,param
r2844r2845
16761688{
16771689   if (param->type == DRCUML_PTYPE_IMMEDIATE)
16781690   {
1679      if (inst->condflags == 0 && (UINT32)param->value == 0)
1691      if (inst->flags == 0 && (UINT32)param->value == 0)
16801692         /* skip */;
16811693      else
16821694         emit_shl_m32_imm(dst, MEMPARAMS, param->value);                        // shl   [dest],param
r2844r2845
16981710{
16991711   if (param->type == DRCUML_PTYPE_IMMEDIATE)
17001712   {
1701      if (inst->condflags == 0 && (UINT32)param->value == 0)
1713      if (inst->flags == 0 && (UINT32)param->value == 0)
17021714         /* skip */;
17031715      else
17041716         emit_shr_r32_imm(dst, reg, param->value);                           // shr   reg,param
r2844r2845
17201732{
17211733   if (param->type == DRCUML_PTYPE_IMMEDIATE)
17221734   {
1723      if (inst->condflags == 0 && (UINT32)param->value == 0)
1735      if (inst->flags == 0 && (UINT32)param->value == 0)
17241736         /* skip */;
17251737      else
17261738         emit_shr_m32_imm(dst, MEMPARAMS, param->value);                        // shr   [dest],param
r2844r2845
17421754{
17431755   if (param->type == DRCUML_PTYPE_IMMEDIATE)
17441756   {
1745      if (inst->condflags == 0 && (UINT32)param->value == 0)
1757      if (inst->flags == 0 && (UINT32)param->value == 0)
17461758         /* skip */;
17471759      else
17481760         emit_sar_r32_imm(dst, reg, param->value);                           // sar   reg,param
r2844r2845
17641776{
17651777   if (param->type == DRCUML_PTYPE_IMMEDIATE)
17661778   {
1767      if (inst->condflags == 0 && (UINT32)param->value == 0)
1779      if (inst->flags == 0 && (UINT32)param->value == 0)
17681780         /* skip */;
17691781      else
17701782         emit_sar_m32_imm(dst, MEMPARAMS, param->value);                        // sar   [dest],param
r2844r2845
17861798{
17871799   if (param->type == DRCUML_PTYPE_IMMEDIATE)
17881800   {
1789      if (inst->condflags == 0 && (UINT32)param->value == 0)
1801      if (inst->flags == 0 && (UINT32)param->value == 0)
17901802         /* skip */;
17911803      else
17921804         emit_rol_r32_imm(dst, reg, param->value);                           // rol   reg,param
r2844r2845
18081820{
18091821   if (param->type == DRCUML_PTYPE_IMMEDIATE)
18101822   {
1811      if (inst->condflags == 0 && (UINT32)param->value == 0)
1823      if (inst->flags == 0 && (UINT32)param->value == 0)
18121824         /* skip */;
18131825      else
18141826         emit_rol_m32_imm(dst, MEMPARAMS, param->value);                        // rol   [dest],param
r2844r2845
18301842{
18311843   if (param->type == DRCUML_PTYPE_IMMEDIATE)
18321844   {
1833      if (inst->condflags == 0 && (UINT32)param->value == 0)
1845      if (inst->flags == 0 && (UINT32)param->value == 0)
18341846         /* skip */;
18351847      else
18361848         emit_ror_r32_imm(dst, reg, param->value);                           // ror   reg,param
r2844r2845
18521864{
18531865   if (param->type == DRCUML_PTYPE_IMMEDIATE)
18541866   {
1855      if (inst->condflags == 0 && (UINT32)param->value == 0)
1867      if (inst->flags == 0 && (UINT32)param->value == 0)
18561868         /* skip */;
18571869      else
18581870         emit_ror_m32_imm(dst, MEMPARAMS, param->value);                        // ror   [dest],param
r2844r2845
18741886{
18751887   if (param->type == DRCUML_PTYPE_IMMEDIATE)
18761888   {
1877      if (inst->condflags == 0 && (UINT32)param->value == 0)
1889      if (inst->flags == 0 && (UINT32)param->value == 0)
18781890         /* skip */;
18791891      else
18801892         emit_rcl_r32_imm(dst, reg, param->value);                           // rcl   reg,param
18811893   }
18821894   else
18831895   {
1884      emit_mov_r32_p32(drcbe, dst, REG_ECX, param);                           // mov   ecx,param
1896      emit_mov_r32_p32_keepflags(drcbe, dst, REG_ECX, param);                     // mov   ecx,param
18851897      emit_rcl_r32_cl(dst, reg);                                          // rcl   reg,cl
18861898   }
18871899}
r2844r2845
18961908{
18971909   if (param->type == DRCUML_PTYPE_IMMEDIATE)
18981910   {
1899      if (inst->condflags == 0 && (UINT32)param->value == 0)
1911      if (inst->flags == 0 && (UINT32)param->value == 0)
19001912         /* skip */;
19011913      else
19021914         emit_rcl_m32_imm(dst, MEMPARAMS, param->value);                        // rcl   [dest],param
19031915   }
19041916   else
19051917   {
1906      emit_mov_r32_p32(drcbe, dst, REG_ECX, param);                           // mov   ecx,param
1918      emit_mov_r32_p32_keepflags(drcbe, dst, REG_ECX, param);                     // mov   ecx,param
19071919      emit_rcl_m32_cl(dst, MEMPARAMS);                                    // rcl   [dest],cl
19081920   }
19091921}
r2844r2845
19181930{
19191931   if (param->type == DRCUML_PTYPE_IMMEDIATE)
19201932   {
1921      if (inst->condflags == 0 && (UINT32)param->value == 0)
1933      if (inst->flags == 0 && (UINT32)param->value == 0)
19221934         /* skip */;
19231935      else
19241936         emit_rcr_r32_imm(dst, reg, param->value);                           // rcr   reg,param
19251937   }
19261938   else
19271939   {
1928      emit_mov_r32_p32(drcbe, dst, REG_ECX, param);                           // mov   ecx,param
1940      emit_mov_r32_p32_keepflags(drcbe, dst, REG_ECX, param);                     // mov   ecx,param
19291941      emit_rcr_r32_cl(dst, reg);                                          // rcr   reg,cl
19301942   }
19311943}
r2844r2845
19401952{
19411953   if (param->type == DRCUML_PTYPE_IMMEDIATE)
19421954   {
1943      if (inst->condflags == 0 && (UINT32)param->value == 0)
1955      if (inst->flags == 0 && (UINT32)param->value == 0)
19441956         /* skip */;
19451957      else
19461958         emit_rcr_m32_imm(dst, MEMPARAMS, param->value);                        // rcr   [dest],param
19471959   }
19481960   else
19491961   {
1950      emit_mov_r32_p32(drcbe, dst, REG_ECX, param);                           // mov   ecx,param
1962      emit_mov_r32_p32_keepflags(drcbe, dst, REG_ECX, param);                     // mov   ecx,param
19511963      emit_rcr_m32_cl(dst, MEMPARAMS);                                    // rcr   [dest],cl
19521964   }
19531965}
r2844r2845
19831995
19841996
19851997/*-------------------------------------------------
1998    emit_mov_r64_p64_keepflags - move a 64-bit
1999    parameter into a register without affecting
2000    any flags
2001-------------------------------------------------*/
2002
2003static void emit_mov_r64_p64_keepflags(drcbe_state *drcbe, x86code **dst, UINT8 reg, const drcuml_parameter *param)
2004{
2005   if (param->type == DRCUML_PTYPE_IMMEDIATE)
2006      emit_mov_r64_imm(dst, reg, param->value);                              // mov   reg,param
2007   else if (param->type == DRCUML_PTYPE_MEMORY)
2008      emit_mov_r64_m64(dst, reg, MABS(drcbe, param->value));                     // mov   reg,[param]
2009   else if (param->type == DRCUML_PTYPE_INT_REGISTER)
2010   {
2011      if (reg != param->value)
2012         emit_mov_r64_r64(dst, reg, param->value);                           // mov   reg,param
2013   }
2014}
2015
2016
2017/*-------------------------------------------------
19862018    emit_mov_p64_r64 - move a registers into a
19872019    64-bit parameter
19882020-------------------------------------------------*/
r2844r2845
20092041{
20102042   if (param->type == DRCUML_PTYPE_IMMEDIATE)
20112043   {
2012      if (inst->condflags != 0 || param->value != 0)
2044      if (inst->flags != 0 || param->value != 0)
20132045      {
20142046         if (short_immediate(param->value))
20152047            emit_add_r64_imm(dst, reg, param->value);                        // add   reg,param
r2844r2845
20362068{
20372069   if (param->type == DRCUML_PTYPE_IMMEDIATE)
20382070   {
2039      if (inst->condflags != 0 || param->value != 0)
2071      if (inst->flags != 0 || param->value != 0)
20402072      {
20412073         if (short_immediate(param->value))
20422074            emit_add_m64_imm(dst, MEMPARAMS, param->value);                     // add   [mem],param
r2844r2845
20922124   else
20932125   {
20942126      int reg = param_select_register(REG_EAX, param, NULL);
2095      emit_mov_r64_p64(drcbe, dst, reg, param);                              // mov   reg,param
2127      emit_mov_r64_p64_keepflags(drcbe, dst, reg, param);                        // mov   reg,param
20962128      emit_adc_m64_r64(dst, MEMPARAMS, reg);                                 // adc   [dest],reg
20972129   }
20982130}
r2844r2845
21072139{
21082140   if (param->type == DRCUML_PTYPE_IMMEDIATE)
21092141   {
2110      if (inst->condflags != 0 || param->value != 0)
2142      if (inst->flags != 0 || param->value != 0)
21112143      {
21122144         if (short_immediate(param->value))
21132145            emit_sub_r64_imm(dst, reg, param->value);                        // sub   reg,param
r2844r2845
21342166{
21352167   if (param->type == DRCUML_PTYPE_IMMEDIATE)
21362168   {
2137      if (inst->condflags != 0 || param->value != 0)
2169      if (inst->flags != 0 || param->value != 0)
21382170      {
21392171         if (short_immediate(param->value))
21402172            emit_sub_m64_imm(dst, MEMPARAMS, param->value);                     // sub   [mem],param
r2844r2845
21902222   else
21912223   {
21922224      int reg = param_select_register(REG_EAX, param, NULL);
2193      emit_mov_r64_p64(drcbe, dst, reg, param);                              // mov   reg,param
2225      emit_mov_r64_p64_keepflags(drcbe, dst, reg, param);                        // mov   reg,param
21942226      emit_sbb_m64_r64(dst, MEMPARAMS, reg);                                 // sbb   [dest],reg
21952227   }
21962228}
r2844r2845
22472279{
22482280   if (param->type == DRCUML_PTYPE_IMMEDIATE)
22492281   {
2250      if (inst->condflags != 0 || param->value != U64(0xffffffffffffffff))
2282      if (inst->flags != 0 || param->value != U64(0xffffffffffffffff))
22512283      {
22522284         if (short_immediate(param->value))
22532285            emit_and_r64_imm(dst, reg, param->value);                        // and   reg,param
r2844r2845
22742306{
22752307   if (param->type == DRCUML_PTYPE_IMMEDIATE)
22762308   {
2277      if (inst->condflags != 0 || param->value != U64(0xffffffffffffffff))
2309      if (inst->flags != 0 || param->value != U64(0xffffffffffffffff))
22782310      {
22792311         if (short_immediate(param->value))
22802312            emit_and_m64_imm(dst, MEMPARAMS, param->value);                     // and   [mem],param
r2844r2845
23462378{
23472379   if (param->type == DRCUML_PTYPE_IMMEDIATE)
23482380   {
2349      if (inst->condflags != 0 || param->value != 0)
2381      if (inst->flags != 0 || param->value != 0)
23502382      {
23512383         if (short_immediate(param->value))
23522384            emit_or_r64_imm(dst, reg, param->value);                        // or    reg,param
r2844r2845
23732405{
23742406   if (param->type == DRCUML_PTYPE_IMMEDIATE)
23752407   {
2376      if (inst->condflags != 0 || param->value != 0)
2408      if (inst->flags != 0 || param->value != 0)
23772409      {
23782410         if (short_immediate(param->value))
23792411            emit_or_m64_imm(dst, MEMPARAMS, param->value);                     // or    [mem],param
r2844r2845
24022434{
24032435   if (param->type == DRCUML_PTYPE_IMMEDIATE)
24042436   {
2405      if (inst->condflags != 0 || param->value != 0)
2437      if (inst->flags != 0 || param->value != 0)
24062438      {
24072439         if (param->value == U64(0xffffffffffffffff))
24082440            emit_not_r64(dst, reg);                                       // not   reg
r2844r2845
24312463{
24322464   if (param->type == DRCUML_PTYPE_IMMEDIATE)
24332465   {
2434      if (inst->condflags != 0 || param->value != 0)
2466      if (inst->flags != 0 || param->value != 0)
24352467      {
24362468         if (param->value == U64(0xffffffffffffffff))
24372469            emit_not_m64(dst, MEMPARAMS);                                 // not   [mem]
r2844r2845
24622494{
24632495   if (param->type == DRCUML_PTYPE_IMMEDIATE)
24642496   {
2465      if (inst->condflags == 0 && (UINT32)param->value == 0)
2497      if (inst->flags == 0 && (UINT32)param->value == 0)
24662498         /* skip */;
24672499      else
24682500         emit_shl_r64_imm(dst, reg, param->value);                           // shl   reg,param
r2844r2845
24842516{
24852517   if (param->type == DRCUML_PTYPE_IMMEDIATE)
24862518   {
2487      if (inst->condflags == 0 && (UINT64)param->value == 0)
2519      if (inst->flags == 0 && (UINT64)param->value == 0)
24882520         /* skip */;
24892521      else
24902522         emit_shl_m64_imm(dst, MEMPARAMS, param->value);                        // shl   [dest],param
r2844r2845
25062538{
25072539   if (param->type == DRCUML_PTYPE_IMMEDIATE)
25082540   {
2509      if (inst->condflags == 0 && (UINT32)param->value == 0)
2541      if (inst->flags == 0 && (UINT32)param->value == 0)
25102542         /* skip */;
25112543      else
25122544         emit_shr_r64_imm(dst, reg, param->value);                           // shr   reg,param
r2844r2845
25282560{
25292561   if (param->type == DRCUML_PTYPE_IMMEDIATE)
25302562   {
2531      if (inst->condflags == 0 && (UINT64)param->value == 0)
2563      if (inst->flags == 0 && (UINT64)param->value == 0)
25322564         /* skip */;
25332565      else
25342566         emit_shr_m64_imm(dst, MEMPARAMS, param->value);                        // shr   [dest],param
r2844r2845
25502582{
25512583   if (param->type == DRCUML_PTYPE_IMMEDIATE)
25522584   {
2553      if (inst->condflags == 0 && (UINT32)param->value == 0)
2585      if (inst->flags == 0 && (UINT32)param->value == 0)
25542586         /* skip */;
25552587      else
25562588         emit_sar_r64_imm(dst, reg, param->value);                           // sar   reg,param
r2844r2845
25722604{
25732605   if (param->type == DRCUML_PTYPE_IMMEDIATE)
25742606   {
2575      if (inst->condflags == 0 && (UINT64)param->value == 0)
2607      if (inst->flags == 0 && (UINT64)param->value == 0)
25762608         /* skip */;
25772609      else
25782610         emit_sar_m64_imm(dst, MEMPARAMS, param->value);                        // sar   [dest],param
r2844r2845
25942626{
25952627   if (param->type == DRCUML_PTYPE_IMMEDIATE)
25962628   {
2597      if (inst->condflags == 0 && (UINT32)param->value == 0)
2629      if (inst->flags == 0 && (UINT32)param->value == 0)
25982630         /* skip */;
25992631      else
26002632         emit_rol_r64_imm(dst, reg, param->value);                           // rol   reg,param
r2844r2845
26162648{
26172649   if (param->type == DRCUML_PTYPE_IMMEDIATE)
26182650   {
2619      if (inst->condflags == 0 && (UINT64)param->value == 0)
2651      if (inst->flags == 0 && (UINT64)param->value == 0)
26202652         /* skip */;
26212653      else
26222654         emit_rol_m64_imm(dst, MEMPARAMS, param->value);                        // rol   [dest],param
r2844r2845
26382670{
26392671   if (param->type == DRCUML_PTYPE_IMMEDIATE)
26402672   {
2641      if (inst->condflags == 0 && (UINT32)param->value == 0)
2673      if (inst->flags == 0 && (UINT32)param->value == 0)
26422674         /* skip */;
26432675      else
26442676         emit_ror_r64_imm(dst, reg, param->value);                           // ror   reg,param
r2844r2845
26602692{
26612693   if (param->type == DRCUML_PTYPE_IMMEDIATE)
26622694   {
2663      if (inst->condflags == 0 && (UINT64)param->value == 0)
2695      if (inst->flags == 0 && (UINT64)param->value == 0)
26642696         /* skip */;
26652697      else
26662698         emit_ror_m64_imm(dst, MEMPARAMS, param->value);                        // ror   [dest],param
r2844r2845
26822714{
26832715   if (param->type == DRCUML_PTYPE_IMMEDIATE)
26842716   {
2685      if (inst->condflags == 0 && (UINT32)param->value == 0)
2717      if (inst->flags == 0 && (UINT32)param->value == 0)
26862718         /* skip */;
26872719      else
26882720         emit_rcl_r64_imm(dst, reg, param->value);                           // rcl   reg,param
26892721   }
26902722   else
26912723   {
2692      emit_mov_r64_p64(drcbe, dst, REG_RCX, param);                           // mov   rcx,param
2724      emit_mov_r64_p64_keepflags(drcbe, dst, REG_RCX, param);                     // mov   rcx,param
26932725      emit_rcl_r64_cl(dst, reg);                                          // rcl   reg,cl
26942726   }
26952727}
r2844r2845
27042736{
27052737   if (param->type == DRCUML_PTYPE_IMMEDIATE)
27062738   {
2707      if (inst->condflags == 0 && (UINT64)param->value == 0)
2739      if (inst->flags == 0 && (UINT64)param->value == 0)
27082740         /* skip */;
27092741      else
27102742         emit_rcl_m64_imm(dst, MEMPARAMS, param->value);                        // rcl   [dest],param
27112743   }
27122744   else
27132745   {
2714      emit_mov_r64_p64(drcbe, dst, REG_RCX, param);                           // mov   rcx,param
2746      emit_mov_r64_p64_keepflags(drcbe, dst, REG_RCX, param);                     // mov   rcx,param
27152747      emit_rcl_m64_cl(dst, MEMPARAMS);                                    // rcl   [dest],cl
27162748   }
27172749}
r2844r2845
27262758{
27272759   if (param->type == DRCUML_PTYPE_IMMEDIATE)
27282760   {
2729      if (inst->condflags == 0 && (UINT32)param->value == 0)
2761      if (inst->flags == 0 && (UINT32)param->value == 0)
27302762         /* skip */;
27312763      else
27322764         emit_rcr_r64_imm(dst, reg, param->value);                           // rcr   reg,param
27332765   }
27342766   else
27352767   {
2736      emit_mov_r64_p64(drcbe, dst, REG_RCX, param);                           // mov   rcx,param
2768      emit_mov_r64_p64_keepflags(drcbe, dst, REG_RCX, param);                     // mov   rcx,param
27372769      emit_rcr_r64_cl(dst, reg);                                          // rcr   reg,cl
27382770   }
27392771}
r2844r2845
27482780{
27492781   if (param->type == DRCUML_PTYPE_IMMEDIATE)
27502782   {
2751      if (inst->condflags == 0 && (UINT64)param->value == 0)
2783      if (inst->flags == 0 && (UINT64)param->value == 0)
27522784         /* skip */;
27532785      else
27542786         emit_rcr_m64_imm(dst, MEMPARAMS, param->value);                        // rcr   [dest],param
27552787   }
27562788   else
27572789   {
2758      emit_mov_r64_p64(drcbe, dst, REG_RCX, param);                           // mov   rcx,param
2790      emit_mov_r64_p64_keepflags(drcbe, dst, REG_RCX, param);                     // mov   rcx,param
27592791      emit_rcr_m64_cl(dst, MEMPARAMS);                                    // rcr   [dest],cl
27602792   }
27612793}
r2844r2845
28402872
28412873
28422874/***************************************************************************
2843    HELPERS TO CONVERT OTHER OPERATIONS TO MOVES
2844***************************************************************************/
2845
2846/*-------------------------------------------------
2847    convert_to_mov_imm - convert an instruction
2848    into a mov immediate
2849-------------------------------------------------*/
2850
2851static x86code *convert_to_mov_imm(drcbe_state *drcbe, x86code *dst, const drcuml_instruction *inst, const drcuml_parameter *dstp, UINT64 imm)
2852{
2853   drcuml_instruction temp = *inst;
2854   temp.numparams = 2;
2855   temp.param[0] = *dstp;
2856   temp.param[1].type = DRCUML_PTYPE_IMMEDIATE;
2857   temp.param[1].value = imm;
2858   return op_mov(drcbe, dst, &temp);
2859}
2860
2861
2862/*-------------------------------------------------
2863    convert_to_mov_src1 - convert an instruction
2864    into a mov src1
2865-------------------------------------------------*/
2866
2867static x86code *convert_to_mov_src1(drcbe_state *drcbe, x86code *dst, const drcuml_instruction *inst, const drcuml_parameter *dstp, const drcuml_parameter *srcp)
2868{
2869   drcuml_instruction temp = *inst;
2870   temp.numparams = 2;
2871   temp.param[0] = *dstp;
2872   temp.param[1] = *srcp;
2873   return op_mov(drcbe, dst, &temp);
2874}
2875
2876
2877
2878/***************************************************************************
28792875    OUT-OF-BAND CODE FIXUP CALLBACKS
28802876***************************************************************************/
28812877
r2844r2845
29762972
29772973static x86code *op_handle(drcbe_state *drcbe, x86code *dst, const drcuml_instruction *inst)
29782974{
2975   emit_link skip;
2976
2977   assert_no_condition(inst);
2978   assert_no_flags(inst);
29792979   assert(inst->numparams == 1);
29802980   assert(inst->param[0].type == DRCUML_PTYPE_MEMORY);
29812981
2982   /* emit a jump around the stack adjust in case code falls through here */
2983   emit_jmp_short_link(&dst, &skip);                                       // jmp   skip
2984
29822985   /* register the current pointer for the handle */
29832986   drcuml_handle_set_codeptr((drcuml_codehandle *)(FPTR)inst->param[0].value, dst);
29842987
29852988   /* by default, the handle points to prolog code that moves the stack pointer */
29862989   emit_lea_r64_m64(&dst, REG_RSP, MBD(REG_RSP, -40));                           // lea   rsp,[rsp-40]
2990   resolve_link(&dst, &skip);                                          // skip:
29872991   return dst;
29882992}
29892993
r2844r2845
29942998
29952999static x86code *op_hash(drcbe_state *drcbe, x86code *dst, const drcuml_instruction *inst)
29963000{
3001   assert_no_condition(inst);
3002   assert_no_flags(inst);
29973003   assert(inst->numparams == 2);
29983004   assert(inst->param[0].type == DRCUML_PTYPE_IMMEDIATE);
29993005   assert(inst->param[1].type == DRCUML_PTYPE_IMMEDIATE);
r2844r2845
30103016
30113017static x86code *op_label(drcbe_state *drcbe, x86code *dst, const drcuml_instruction *inst)
30123018{
3019   assert_no_condition(inst);
3020   assert_no_flags(inst);
30133021   assert(inst->numparams == 1);
30143022   assert(inst->param[0].type == DRCUML_PTYPE_IMMEDIATE);
30153023
r2844r2845
30253033
30263034static x86code *op_comment(drcbe_state *drcbe, x86code *dst, const drcuml_instruction *inst)
30273035{
3036   assert_no_condition(inst);
3037   assert_no_flags(inst);
30283038   assert(inst->numparams == 1);
30293039   assert(inst->param[0].type == DRCUML_PTYPE_MEMORY);
30303040
r2844r2845
30393049
30403050static x86code *op_mapvar(drcbe_state *drcbe, x86code *dst, const drcuml_instruction *inst)
30413051{
3052   assert_no_condition(inst);
3053   assert_no_flags(inst);
30423054   assert(inst->numparams == 2);
30433055   assert(inst->param[0].type == DRCUML_PTYPE_MAPVAR);
30443056   assert(inst->param[1].type == DRCUML_PTYPE_IMMEDIATE);
r2844r2845
30553067***************************************************************************/
30563068
30573069/*-------------------------------------------------
3070    op_nop - process a NOP opcode
3071-------------------------------------------------*/
3072
3073static x86code *op_nop(drcbe_state *drcbe, x86code *dst, const drcuml_instruction *inst)
3074{
3075   /* nothing */
3076   return dst;
3077}
3078
3079
3080/*-------------------------------------------------
30583081    op_debug - process a DEBUG opcode
30593082-------------------------------------------------*/
30603083
30613084static x86code *op_debug(drcbe_state *drcbe, x86code *dst, const drcuml_instruction *inst)
30623085{
3086   /* validate instruction */
3087   assert(inst->size == 4);
3088   assert_no_condition(inst);
3089   assert_no_flags(inst);
3090
30633091#ifdef ENABLE_DEBUGGER
30643092   if (Machine->debug_mode)
30653093   {
30663094      drcuml_parameter pcp;
30673095
3068      /* validate instruction */
3069      assert(inst->size == 4);
3070      assert(inst->condflags == DRCUML_COND_ALWAYS);
3071
30723096      /* normalize parameters */
30733097      param_normalize_1(drcbe, inst, &pcp, PTYPE_MRI);
30743098
r2844r2845
30923116
30933117   /* validate instruction */
30943118   assert(inst->size == 4);
3095   assert(inst->condflags == DRCUML_COND_ALWAYS || (inst->condflags >= COND_Z && inst->condflags < DRCUML_COND_MAX));
3119   assert_any_condition(inst);
3120   assert_no_flags(inst);
30963121
30973122   /* normalize parameters */
30983123   param_normalize_1(drcbe, inst, &retp, PTYPE_MRI);
30993124
31003125   /* load the parameter into EAX */
31013126   emit_mov_r32_p32(drcbe, &dst, REG_EAX, &retp);                              // mov   eax,retp
3102   if (inst->condflags == DRCUML_COND_ALWAYS)
3127   if (inst->condition == DRCUML_COND_ALWAYS)
31033128      emit_jmp(&dst, drcbe->exit);                                       // jmp   exit
31043129   else
3105      emit_jcc(&dst, X86_CONDITION(inst->condflags), drcbe->exit);               // jcc   exit
3130      emit_jcc(&dst, X86_CONDITION(inst->condition), drcbe->exit);               // jcc   exit
31063131
31073132   return dst;
31083133}
r2844r2845
31183143
31193144   /* validate instruction */
31203145   assert(inst->size == 4);
3121   assert(inst->condflags == DRCUML_COND_ALWAYS);
3146   assert_no_condition(inst);
3147   assert_no_flags(inst);
31223148
31233149   /* normalize parameters */
31243150   param_normalize_3(drcbe, inst, &modep, PTYPE_MRI, &pcp, PTYPE_MRI, &exp, PTYPE_M);
r2844r2845
32053231
32063232   /* validate instruction */
32073233   assert(inst->size == 4);
3208   assert(inst->condflags == DRCUML_COND_ALWAYS || (inst->condflags >= COND_Z && inst->condflags < DRCUML_COND_MAX));
3234   assert_any_condition(inst);
3235   assert_no_flags(inst);
32093236
32103237   /* normalize parameters */
32113238   param_normalize_1(drcbe, inst, &labelp, PTYPE_I);
r2844r2845
32143241   jmptarget = (x86code *)drclabel_get_codeptr(drcbe->labels, labelp.value, fixup_label, dst);
32153242   if (jmptarget == NULL)
32163243      jmptarget = dst + 0x7ffffff0;
3217   if (inst->condflags == DRCUML_COND_ALWAYS)
3244   if (inst->condition == DRCUML_COND_ALWAYS)
32183245      emit_jmp(&dst, jmptarget);                                          // jmp   target
32193246   else
3220      emit_jcc(&dst, X86_CONDITION(inst->condflags), jmptarget);                  // jcc   target
3247      emit_jcc(&dst, X86_CONDITION(inst->condition), jmptarget);                  // jcc   target
32213248
32223249   return dst;
32233250}
r2844r2845
32343261
32353262   /* validate instruction */
32363263   assert(inst->size == 4);
3237   assert(inst->condflags == DRCUML_COND_ALWAYS || (inst->condflags >= COND_Z && inst->condflags < DRCUML_COND_MAX));
3264   assert_any_condition(inst);
3265   assert_no_flags(inst);
32383266
32393267   /* normalize parameters */
32403268   param_normalize_2(drcbe, inst, &handp, PTYPE_M, &exp, PTYPE_MRI);
r2844r2845
32433271   targetptr = drcuml_handle_codeptr_addr((drcuml_codehandle *)handp.value);
32443272
32453273   /* perform the exception processing inline if unconditional */
3246   if (inst->condflags == DRCUML_COND_ALWAYS)
3274   if (inst->condition == DRCUML_COND_ALWAYS)
32473275   {
32483276      emit_mov_m32_p32(drcbe, &dst, MABS(drcbe, &drcbe->state.exp), &exp);         // mov   [exp],exp
32493277      if (*targetptr != NULL)
r2844r2845
32553283   /* otherwise, jump to an out-of-band handler */
32563284   else
32573285   {
3258      emit_jcc(&dst, X86_CONDITION(inst->condflags), dst + 0x7ffffff0);            // jcc   exception
3286      emit_jcc(&dst, X86_CONDITION(inst->condition), dst + 0x7ffffff0);            // jcc   exception
32593287      drccache_request_oob_codegen(drcbe->cache, fixup_exception, drcbe, dst, (void *)inst);
32603288   }
32613289   return dst;
r2844r2845
32743302
32753303   /* validate instruction */
32763304   assert(inst->size == 4);
3277   assert(inst->condflags == DRCUML_COND_ALWAYS || (inst->condflags >= COND_Z && inst->condflags < DRCUML_COND_MAX));
3305   assert_any_condition(inst);
3306   assert_no_flags(inst);
32783307
32793308   /* normalize parameters */
32803309   param_normalize_1(drcbe, inst, &handp, PTYPE_M);
r2844r2845
32833312   targetptr = drcuml_handle_codeptr_addr((drcuml_codehandle *)handp.value);
32843313
32853314   /* skip if conditional */
3286   if (inst->condflags != DRCUML_COND_ALWAYS)
3287      emit_jcc_short_link(&dst, X86_NOT_CONDITION(inst->condflags), &skip);         // jcc   skip
3315   if (inst->condition != DRCUML_COND_ALWAYS)
3316      emit_jcc_short_link(&dst, X86_NOT_CONDITION(inst->condition), &skip);         // jcc   skip
32883317
32893318   /* jump through the handle; directly if a normal jump */
32903319   if (*targetptr != NULL)
r2844r2845
32933322      emit_call_m64(&dst, MABS(drcbe, targetptr));                           // call  [targetptr]
32943323
32953324   /* resolve the conditional link */
3296   if (inst->condflags != DRCUML_COND_ALWAYS)
3325   if (inst->condition != DRCUML_COND_ALWAYS)
32973326      resolve_link(&dst, &skip);                                       // skip:
32983327   return dst;
32993328}
r2844r2845
33093338
33103339   /* validate instruction */
33113340   assert(inst->size == 4);
3312   assert(inst->condflags == DRCUML_COND_ALWAYS || (inst->condflags >= COND_Z && inst->condflags < DRCUML_COND_MAX));
3341   assert_any_condition(inst);
3342   assert_no_flags(inst);
33133343   assert(inst->numparams == 0);
33143344
33153345   /* skip if conditional */
3316   if (inst->condflags != DRCUML_COND_ALWAYS)
3317      emit_jcc_short_link(&dst, X86_NOT_CONDITION(inst->condflags), &skip);         // jcc   skip
3346   if (inst->condition != DRCUML_COND_ALWAYS)
3347      emit_jcc_short_link(&dst, X86_NOT_CONDITION(inst->condition), &skip);         // jcc   skip
33183348
33193349   /* return */
33203350   emit_lea_r64_m64(&dst, REG_RSP, MBD(REG_RSP, 40));                           // lea   rsp,[rsp+40]
33213351   emit_ret(&dst);                                                      // ret
33223352
33233353   /* resolve the conditional link */
3324   if (inst->condflags != DRCUML_COND_ALWAYS)
3354   if (inst->condition != DRCUML_COND_ALWAYS)
33253355      resolve_link(&dst, &skip);                                       // skip:
33263356   return dst;
33273357}
r2844r2845
33383368
33393369   /* validate instruction */
33403370   assert(inst->size == 4);
3341   assert(inst->condflags == DRCUML_COND_ALWAYS || (inst->condflags >= COND_Z && inst->condflags < DRCUML_COND_MAX));
3371   assert_any_condition(inst);
3372   assert_no_flags(inst);
33423373
33433374   /* normalize parameters */
33443375   param_normalize_2(drcbe, inst, &funcp, PTYPE_M, &paramp, PTYPE_M);
33453376
33463377   /* skip if conditional */
3347   if (inst->condflags != DRCUML_COND_ALWAYS)
3348      emit_jcc_short_link(&dst, X86_NOT_CONDITION(inst->condflags), &skip);         // jcc   skip
3378   if (inst->condition != DRCUML_COND_ALWAYS)
3379      emit_jcc_short_link(&dst, X86_NOT_CONDITION(inst->condition), &skip);         // jcc   skip
33493380
33503381   /* perform the call */
33513382   emit_mov_r64_imm(&dst, REG_PARAM1, paramp.value);                           // mov   param1,paramp
33523383   emit_smart_call_r64(drcbe, &dst, (x86code *)(FPTR)funcp.value, REG_RAX);         // call  funcp
33533384
33543385   /* resolve the conditional link */
3355   if (inst->condflags != DRCUML_COND_ALWAYS)
3386   if (inst->condition != DRCUML_COND_ALWAYS)
33563387      resolve_link(&dst, &skip);                                       // skip:
33573388   return dst;
33583389}
r2844r2845
33643395
33653396static x86code *op_recover(drcbe_state *drcbe, x86code *dst, const drcuml_instruction *inst)
33663397{
3367   drcuml_parameter dstp, mvparam;
3398   drcuml_parameter dstp;
33683399
33693400   /* validate instruction */
33703401   assert(inst->size == 4);
3371   assert(inst->condflags == DRCUML_COND_ALWAYS);
3402   assert_no_condition(inst);
3403   assert_no_flags(inst);
33723404
33733405   /* normalize parameters */
3374   param_normalize_2(drcbe, inst, &dstp, PTYPE_MR, &mvparam, PTYPE_I);
3406   param_normalize(drcbe, &inst->param[0], &dstp, PTYPE_MR);
33753407
33763408   /* call the recovery code */
33773409   emit_mov_r64_m64(&dst, REG_RAX, MABS(drcbe, &drcbe->stacksave));               // mov   rax,stacksave
r2844r2845
34013433
34023434   /* validate instruction */
34033435   assert(inst->size == 4);
3404   assert(inst->condflags == DRCUML_COND_ALWAYS);
3436   assert_no_condition(inst);
3437   assert_no_flags(inst);
34053438
34063439   /* normalize parameters */
34073440   param_normalize_1(drcbe, inst, &srcp, PTYPE_MRI);
r2844r2845
34383471
34393472   /* validate instruction */
34403473   assert(inst->size == 4);
3441   assert(inst->condflags == DRCUML_COND_ALWAYS);
3474   assert_no_condition(inst);
3475   assert_no_flags(inst);
34423476
34433477   /* normalize parameters */
34443478   param_normalize_1(drcbe, inst, &dstp, PTYPE_MR);
r2844r2845
34663500
34673501   /* validate instruction */
34683502   assert(inst->size == 4);
3469   assert(inst->condflags == DRCUML_COND_ALWAYS);
3503   assert_no_condition(inst);
3504   assert_no_flags(inst);
34703505
34713506   /* normalize parameters */
34723507   param_normalize_1(drcbe, inst, &dstp, PTYPE_MR);
r2844r2845
34903525
34913526static x86code *op_getflgs(drcbe_state *drcbe, x86code *dst, const drcuml_instruction *inst)
34923527{
3493   drcuml_parameter dstp;
3528   drcuml_parameter dstp, maskp;
3529   UINT32 flagmask = 0;
34943530   int dstreg;
34953531
34963532   /* validate instruction */
34973533   assert(inst->size == 4);
3498   assert(inst->condflags != DRCUML_COND_ALWAYS);
3534   assert_no_condition(inst);
3535   assert_no_flags(inst);
34993536
35003537   /* normalize parameters */
3501   param_normalize_1(drcbe, inst, &dstp, PTYPE_MR);
3538   param_normalize_2(drcbe, inst, &dstp, PTYPE_MR, &maskp, PTYPE_I);
35023539
35033540   /* pick a target register for the general case */
35043541   dstreg = param_select_register(REG_EAX, &dstp, NULL);
35053542
3506   switch (inst->condflags)
3543   /* compute mask for flags */
3544   if (maskp.value & DRCUML_FLAG_C) flagmask |= 0x001;
3545   if (maskp.value & DRCUML_FLAG_V) flagmask |= 0x800;
3546   if (maskp.value & DRCUML_FLAG_Z) flagmask |= 0x040;
3547   if (maskp.value & DRCUML_FLAG_S) flagmask |= 0x080;
3548   if (maskp.value & DRCUML_FLAG_U) flagmask |= 0x004;
3549
3550   switch (maskp.value)
35073551   {
35083552      /* single flags only */
35093553      case DRCUML_FLAG_C:
r2844r2845
35933637      default:
35943638         emit_pushf(&dst);                                             // pushf
35953639         emit_pop_r64(&dst, REG_EAX);                                    // pop    eax
3596         emit_and_r32_imm(&dst, REG_EAX, 0x8c5);                              // and    eax,0x8c5
3640         emit_and_r32_imm(&dst, REG_EAX, flagmask);                           // and    eax,flagmask
35973641         emit_movzx_r32_m8(&dst, dstreg, MBISD(REG_RBP, REG_RAX, 1, offset_from_rbp(drcbe, (FPTR)&drcbe->flagsmap[0])));
35983642                                                                  // movzx  dstreg,[flags_map]
35993643         break;
r2844r2845
36223666
36233667   /* validate instruction */
36243668   assert(inst->size == 4);
3625   assert(inst->condflags == DRCUML_COND_ALWAYS);
3669   assert_no_condition(inst);
3670   assert_no_flags(inst);
36263671
36273672   /* normalize parameters */
36283673   param_normalize_1(drcbe, inst, &dstp, PTYPE_M);
r2844r2845
36833728
36843729   /* validate instruction */
36853730   assert(inst->size == 4);
3686   assert(inst->condflags == DRCUML_COND_ALWAYS);
3731   assert_no_condition(inst);
3732   assert_no_flags(inst);
36873733
36883734   /* normalize parameters */
36893735   param_normalize_1(drcbe, inst, &dstp, PTYPE_M);
r2844r2845
37503796
37513797   /* validate instruction */
37523798   assert(inst->size == 4 || inst->size == 8);
3753   assert(inst->condflags == DRCUML_COND_ALWAYS);
3799   assert_no_condition(inst);
3800   assert_no_flags(inst);
37543801
37553802   /* normalize parameters */
37563803   param_normalize_4(drcbe, inst, &dstp, PTYPE_MR, &basep, PTYPE_M, &indp, PTYPE_MRI, &sizep, PTYPE_I);
r2844r2845
38113858
38123859   /* validate instruction */
38133860   assert(inst->size == 4 || inst->size == 8);
3814   assert(inst->condflags == DRCUML_COND_ALWAYS);
3861   assert_no_condition(inst);
3862   assert_no_flags(inst);
38153863
38163864   /* normalize parameters */
38173865   param_normalize_4(drcbe, inst, &dstp, PTYPE_MR, &basep, PTYPE_M, &indp, PTYPE_MRI, &sizep, PTYPE_I);
r2844r2845
38963944
38973945   /* validate instruction */
38983946   assert(inst->size == 4 || inst->size == 8);
3899   assert(inst->condflags == DRCUML_COND_ALWAYS);
3947   assert_no_condition(inst);
3948   assert_no_flags(inst);
39003949
39013950   /* normalize parameters */
39023951   param_normalize_4(drcbe, inst, &basep, PTYPE_M, &indp, PTYPE_MRI, &srcp, PTYPE_MRI, &sizep, PTYPE_I);
r2844r2845
40104059
40114060   /* validate instruction */
40124061   assert(inst->size == 4 || inst->size == 8);
4013   assert(inst->condflags == DRCUML_COND_ALWAYS);
4062   assert_no_condition(inst);
4063   assert_no_flags(inst);
40144064
40154065   /* normalize parameters */
40164066   param_normalize_3(drcbe, inst, &dstp, PTYPE_MR, &addrp, PTYPE_MRI, &spacesizep, PTYPE_I);
r2844r2845
40684118
40694119   /* validate instruction */
40704120   assert(inst->size == 4 || inst->size == 8);
4071   assert(inst->condflags == DRCUML_COND_ALWAYS);
4121   assert_no_condition(inst);
4122   assert_no_flags(inst);
40724123
40734124   /* normalize parameters */
40744125   param_normalize_4(drcbe, inst, &dstp, PTYPE_MR, &addrp, PTYPE_MRI, &maskp, PTYPE_MRI, &spacesizep, PTYPE_I);
r2844r2845
41234174
41244175   /* validate instruction */
41254176   assert(inst->size == 4 || inst->size == 8);
4126   assert(inst->condflags == DRCUML_COND_ALWAYS);
4177   assert_no_condition(inst);
4178   assert_no_flags(inst);
41274179
41284180   /* normalize parameters */
41294181   param_normalize_3(drcbe, inst, &addrp, PTYPE_MRI, &srcp, PTYPE_MRI, &spacesizep, PTYPE_I);
r2844r2845
41604212
41614213   /* validate instruction */
41624214   assert(inst->size == 4 || inst->size == 8);
4163   assert(inst->condflags == DRCUML_COND_ALWAYS);
4215   assert_no_condition(inst);
4216   assert_no_flags(inst);
41644217
41654218   /* normalize parameters */
41664219   param_normalize_4(drcbe, inst, &addrp, PTYPE_MRI, &srcp, PTYPE_MRI, &maskp, PTYPE_MRI, &spacesizep, PTYPE_I);
r2844r2845
42004253
42014254   /* validate instruction */
42024255   assert(inst->size == 4 || inst->size == 8);
4203   assert(inst->condflags == DRCUML_COND_ALWAYS);
4256   assert_no_condition(inst);
4257   assert_flags(inst, DRCUML_FLAG_C);
42044258
42054259   /* normalize parameters */
42064260   param_normalize_2(drcbe, inst, &srcp, PTYPE_MRI, &bitp, PTYPE_MRI);
r2844r2845
42744328
42754329   /* validate instruction */
42764330   assert(inst->size == 4 || inst->size == 8);
4277   assert(inst->condflags >= DRCUML_COND_Z && inst->condflags < DRCUML_COND_MAX);
4331   assert_any_condition(inst);
4332   assert_no_flags(inst);
42784333
42794334   /* normalize parameters */
42804335   param_normalize_1(drcbe, inst, &dstp, PTYPE_MR);
r2844r2845
42834338   dstreg = param_select_register(REG_EAX, &dstp, NULL);
42844339
42854340   /* set to AL */
4286   emit_setcc_r8(&dst, X86_CONDITION(inst->condflags), REG_AL);                  // setcc  al
4341   emit_setcc_r8(&dst, X86_CONDITION(inst->condition), REG_AL);                  // setcc  al
42874342   emit_movzx_r32_r8(&dst, dstreg, REG_AL);                                 // movzx  dstreg,al
42884343
42894344   /* 32-bit form */
r2844r2845
43114366
43124367   /* validate instruction */
43134368   assert(inst->size == 4 || inst->size == 8);
4314   assert(inst->condflags == DRCUML_COND_ALWAYS || (inst->condflags >= COND_Z && inst->condflags < DRCUML_COND_MAX));
4369   assert_any_condition(inst);
4370   assert_no_flags(inst);
43154371
43164372   /* normalize parameters, but only if we got here directly */
43174373   /* other opcodes call through here with pre-normalized parameters */
r2844r2845
43234379      srcp = inst->param[1];
43244380   }
43254381
4326   /* degenerate case: dest and source are equal */
4327   if (dstp.type == srcp.type && dstp.value == srcp.value)
4328      return dst;
4329
43304382   /* pick a target register for the general case */
43314383   dstreg = param_select_register(REG_EAX, &dstp, NULL);
43324384
43334385   /* always start with a jmp */
4334   if (inst->condflags != DRCUML_COND_ALWAYS)
4335      emit_jcc_short_link(&dst, X86_NOT_CONDITION(inst->condflags), &skip);         // jcc   skip
4386   if (inst->condition != DRCUML_COND_ALWAYS)
4387      emit_jcc_short_link(&dst, X86_NOT_CONDITION(inst->condition), &skip);         // jcc   skip
43364388
43374389   /* 32-bit form */
43384390   if (inst->size == 4)
r2844r2845
43464398         emit_mov_m32_imm(&dst, MABS(drcbe, dstp.value), srcp.value);            // mov   [dstp],srcp
43474399
43484400      /* conditional memory to register */
4349      else if (inst->condflags != 0 && dstp.type == DRCUML_PTYPE_INT_REGISTER && srcp.type == DRCUML_PTYPE_MEMORY)
4401      else if (inst->condition != 0 && dstp.type == DRCUML_PTYPE_INT_REGISTER && srcp.type == DRCUML_PTYPE_MEMORY)
43504402      {
43514403         dst = savedst;
43524404         skip.target = NULL;
4353         emit_cmovcc_r32_m32(&dst, X86_CONDITION(inst->condflags), dstp.value, MABS(drcbe, srcp.value));
4405         emit_cmovcc_r32_m32(&dst, X86_CONDITION(inst->condition), dstp.value, MABS(drcbe, srcp.value));
43544406                                                                  // cmovcc dstp,[srcp]
43554407      }
43564408
43574409      /* conditional register to register */
4358      else if (inst->condflags != 0 && dstp.type == DRCUML_PTYPE_INT_REGISTER && srcp.type == DRCUML_PTYPE_INT_REGISTER)
4410      else if (inst->condition != 0 && dstp.type == DRCUML_PTYPE_INT_REGISTER && srcp.type == DRCUML_PTYPE_INT_REGISTER)
43594411      {
43604412         dst = savedst;
43614413         skip.target = NULL;
4362         emit_cmovcc_r32_r32(&dst, X86_CONDITION(inst->condflags), dstp.value, srcp.value);
4414         emit_cmovcc_r32_r32(&dst, X86_CONDITION(inst->condition), dstp.value, srcp.value);
43634415                                                                  // cmovcc dstp,srcp
43644416      }
43654417
43664418      /* general case */
43674419      else
43684420      {
4369         emit_mov_r32_p32(drcbe, &dst, dstreg, &srcp);                        // mov   dstreg,srcp
4421         emit_mov_r32_p32_keepflags(drcbe, &dst, dstreg, &srcp);                  // mov   dstreg,srcp
43704422         emit_mov_p32_r32(drcbe, &dst, &dstp, dstreg);                        // mov   dstp,dstreg
43714423      }
43724424   }
r2844r2845
43834435         emit_mov_m64_imm(&dst, MABS(drcbe, dstp.value), srcp.value);            // mov   [dstp],srcp
43844436
43854437      /* conditional memory to register */
4386      else if (inst->condflags != 0 && dstp.type == DRCUML_PTYPE_INT_REGISTER && srcp.type == DRCUML_PTYPE_MEMORY)
4438      else if (inst->condition != 0 && dstp.type == DRCUML_PTYPE_INT_REGISTER && srcp.type == DRCUML_PTYPE_MEMORY)
43874439      {
43884440         dst = savedst;
43894441         skip.target = NULL;
4390         emit_cmovcc_r64_m64(&dst, X86_CONDITION(inst->condflags), dstp.value, MABS(drcbe, srcp.value));
4442         emit_cmovcc_r64_m64(&dst, X86_CONDITION(inst->condition), dstp.value, MABS(drcbe, srcp.value));
43914443                                                                  // cmovcc dstp,[srcp]
43924444      }
43934445
43944446      /* conditional register to register */
4395      else if (inst->condflags != 0 && dstp.type == DRCUML_PTYPE_INT_REGISTER && srcp.type == DRCUML_PTYPE_INT_REGISTER)
4447      else if (inst->condition != 0 && dstp.type == DRCUML_PTYPE_INT_REGISTER && srcp.type == DRCUML_PTYPE_INT_REGISTER)
43964448      {
43974449         dst = savedst;
43984450         skip.target = NULL;
4399         emit_cmovcc_r64_r64(&dst, X86_CONDITION(inst->condflags), dstp.value, srcp.value);
4451         emit_cmovcc_r64_r64(&dst, X86_CONDITION(inst->condition), dstp.value, srcp.value);
44004452                                                                  // cmovcc dstp,srcp
44014453      }
44024454
44034455      /* general case */
44044456      else
44054457      {
4406         emit_mov_r64_p64(drcbe, &dst, dstreg, &srcp);                        // mov   dstreg,srcp
4458         emit_mov_r64_p64_keepflags(drcbe, &dst, dstreg, &srcp);                  // mov   dstreg,srcp
44074459         emit_mov_p64_r64(drcbe, &dst, &dstp, dstreg);                        // mov   dstp,dstreg
44084460      }
44094461   }
r2844r2845
44264478
44274479   /* validate instruction */
44284480   assert(inst->size == 4 || inst->size == 8);
4429   assert(inst->condflags == DRCUML_COND_ALWAYS);
4481   assert_no_condition(inst);
4482   assert_flags(inst, DRCUML_FLAG_S | DRCUML_FLAG_Z);
44304483
44314484   /* normalize parameters */
44324485   param_normalize_3(drcbe, inst, &dstp, PTYPE_MR, &srcp, PTYPE_MRI, &sizep, PTYPE_I);
4486   assert(srcp.type != DRCUML_PTYPE_IMMEDIATE);
44334487
4434   /* degenerate cases -- convert to a move */
4435   if (srcp.type == DRCUML_PTYPE_IMMEDIATE)
4436   {
4437      if (sizep.value == DRCUML_SIZE_BYTE)
4438         return convert_to_mov_imm(drcbe, dst, inst, &dstp, (INT8)srcp.value);
4439      else if (sizep.value == DRCUML_SIZE_WORD)
4440         return convert_to_mov_imm(drcbe, dst, inst, &dstp, (INT16)srcp.value);
4441      else if (sizep.value == DRCUML_SIZE_DWORD)
4442         return convert_to_mov_imm(drcbe, dst, inst, &dstp, (INT32)srcp.value);
4443   }
4444
44454488   /* pick a target register for the general case */
44464489   dstreg = param_select_register(REG_EAX, &dstp, NULL);
44474490
r2844r2845
44684511            emit_mov_r32_r32(&dst, dstreg, srcp.value);                        // mov   dstreg,srcp
44694512      }
44704513      emit_mov_p32_r32(drcbe, &dst, &dstp, dstreg);                           // mov   dstp,dstreg
4514      if (inst->flags != 0)
4515         emit_test_r32_r32(&dst, dstreg, dstreg);                           // test  dstreg,dstreg
44714516   }
44724517
44734518   /* 64-bit form */
r2844r2845
44974542            emit_mov_r64_r64(&dst, dstreg, srcp.value);                        // mov   dstreg,srcp
44984543      }
44994544      emit_mov_p64_r64(drcbe, &dst, &dstp, dstreg);                           // mov   dstp,dstreg
4545      if (inst->flags != 0)
4546         emit_test_r64_r64(&dst, dstreg, dstreg);                           // test  dstreg,dstreg
45004547   }
45014548   return dst;
45024549}
r2844r2845
45134560
45144561   /* validate instruction */
45154562   assert(inst->size == 4 || inst->size == 8);
4516   assert(inst->condflags == DRCUML_COND_ALWAYS);
4563   assert_no_condition(inst);
4564   assert_flags(inst, DRCUML_FLAG_S | DRCUML_FLAG_Z);
45174565
45184566   /* normalize parameters */
45194567   param_normalize_4(drcbe, inst, &dstp, PTYPE_MR, &srcp, PTYPE_MRI, &shiftp, PTYPE_MRI, &maskp, PTYPE_MRI);
45204568
4521   /* degenerate cases -- convert to a move or simple shift */
4522   if (srcp.type == DRCUML_PTYPE_IMMEDIATE && shiftp.type == DRCUML_PTYPE_IMMEDIATE && maskp.type == DRCUML_PTYPE_IMMEDIATE)
4523   {
4524      if (inst->size == 4)
4525         return convert_to_mov_imm(drcbe, dst, inst, &dstp, ((srcp.value << shiftp.value) | (srcp.value >> (32 - shiftp.value))) & maskp.value);
4526      else if (inst->size == 8)
4527         return convert_to_mov_imm(drcbe, dst, inst, &dstp, ((srcp.value << shiftp.value) | (srcp.value >> (64 - shiftp.value))) & maskp.value);
4528   }
4529   if (shiftp.type == DRCUML_PTYPE_IMMEDIATE && maskp.type == DRCUML_PTYPE_IMMEDIATE)
4530   {
4531      if ((inst->size == 4 && maskp.value == (UINT32)(0xffffffffUL << shiftp.value)) || (inst->size == 8 && maskp.value == U64(0xffffffffffffffff) << shiftp.value))
4532      {
4533         drcuml_instruction temp = *inst;
4534         temp.numparams = 3;
4535         return op_shl(drcbe, dst, &temp);
4536      }
4537      if ((inst->size == 4 && maskp.value == (UINT32)(0xffffffffUL >> (32 - shiftp.value))) || (inst->size == 8 && maskp.value == U64(0xffffffffffffffff) >> (64 - shiftp.value)))
4538      {
4539         drcuml_instruction temp = *inst;
4540         temp.numparams = 3;
4541         temp.param[2].value = inst->size * 8 - temp.param[2].value;
4542         return op_shr(drcbe, dst, &temp);
4543      }
4544   }
4545
45464569   /* pick a target register for the general case */
45474570   dstreg = param_select_register2(REG_EAX, &dstp, &shiftp, &maskp);
45484571
r2844r2845
45784601
45794602   /* validate instruction */
45804603   assert(inst->size == 4 || inst->size == 8);
4581   assert(inst->condflags == DRCUML_COND_ALWAYS);
4604   assert_no_condition(inst);
4605   assert_flags(inst, DRCUML_FLAG_S | DRCUML_FLAG_Z);
45824606
45834607   /* normalize parameters */
45844608   param_normalize_4(drcbe, inst, &dstp, PTYPE_MR, &srcp, PTYPE_MRI, &shiftp, PTYPE_MRI, &maskp, PTYPE_MRI);
r2844r2845
46364660
46374661   /* validate instruction */
46384662   assert(inst->size == 4 || inst->size == 8);
4639   assert((inst->condflags & ~(DRCUML_FLAG_C | DRCUML_FLAG_V | DRCUML_FLAG_Z | DRCUML_FLAG_S)) == 0);
4663   assert_no_condition(inst);
4664   assert_flags(inst, DRCUML_FLAG_C | DRCUML_FLAG_V | DRCUML_FLAG_Z | DRCUML_FLAG_S);
46404665
46414666   /* normalize parameters */
46424667   param_normalize_3_commutative(drcbe, inst, &dstp, PTYPE_MR, &src1p, PTYPE_MRI, &src2p, PTYPE_MRI);
4668   assert(src1p.type != DRCUML_PTYPE_IMMEDIATE || src2p.type != DRCUML_PTYPE_IMMEDIATE);
46434669
4644   /* degenerate cases -- convert to a move */
4645   if (src1p.type == DRCUML_PTYPE_IMMEDIATE && src2p.type == DRCUML_PTYPE_IMMEDIATE && inst->condflags == 0)
4646      return convert_to_mov_imm(drcbe, dst, inst, &dstp, src1p.value + src2p.value);
4647   if (src2p.type == DRCUML_PTYPE_IMMEDIATE && src2p.value == 0 && inst->condflags == 0)
4648      return convert_to_mov_src1(drcbe, dst, inst, &dstp, &src1p);
4649
46504670   /* pick a target register for the general case */
46514671   dstreg = param_select_register(REG_EAX, &dstp, &src2p);
46524672
r2844r2845
46584678         emit_add_m32_p32(drcbe, &dst, MABS(drcbe, dstp.value), &src2p, inst);      // add   [dstp],src2p
46594679
46604680      /* reg = reg + imm */
4661      else if (dstp.type == DRCUML_PTYPE_INT_REGISTER && src1p.type == DRCUML_PTYPE_INT_REGISTER && src2p.type == DRCUML_PTYPE_IMMEDIATE && inst->condflags == 0)
4681      else if (dstp.type == DRCUML_PTYPE_INT_REGISTER && src1p.type == DRCUML_PTYPE_INT_REGISTER && src2p.type == DRCUML_PTYPE_IMMEDIATE && inst->flags == 0)
46624682         emit_lea_r32_m32(&dst, dstp.value, MBD(src1p.value, src2p.value));         // lea   dstp,[src1p+src2p]
46634683
46644684      /* reg = reg + reg */
4665      else if (dstp.type == DRCUML_PTYPE_INT_REGISTER && src1p.type == DRCUML_PTYPE_INT_REGISTER && src2p.type == DRCUML_PTYPE_INT_REGISTER && inst->condflags == 0)
4685      else if (dstp.type == DRCUML_PTYPE_INT_REGISTER && src1p.type == DRCUML_PTYPE_INT_REGISTER && src2p.type == DRCUML_PTYPE_INT_REGISTER && inst->flags == 0)
46664686         emit_lea_r32_m32(&dst, dstp.value, MBISD(src1p.value, src2p.value, 1, 0));   // lea   dstp,[src1p+src2p]
46674687
46684688      /* general case */
r2844r2845
46824702         emit_add_m64_p64(drcbe, &dst, MABS(drcbe, dstp.value), &src2p, inst);      // add   [dstp],src2p
46834703
46844704      /* reg = reg + imm */
4685      else if (dstp.type == DRCUML_PTYPE_INT_REGISTER && src1p.type == DRCUML_PTYPE_INT_REGISTER && src2p.type == DRCUML_PTYPE_IMMEDIATE && short_immediate(src2p.value) && inst->condflags == 0)
4705      else if (dstp.type == DRCUML_PTYPE_INT_REGISTER && src1p.type == DRCUML_PTYPE_INT_REGISTER && src2p.type == DRCUML_PTYPE_IMMEDIATE && short_immediate(src2p.value) && inst->flags == 0)
46864706         emit_lea_r64_m64(&dst, dstp.value, MBD(src1p.value, src2p.value));         // lea   dstp,[src1p+src2p]
46874707
46884708      /* reg = reg + reg */
4689      else if (dstp.type == DRCUML_PTYPE_INT_REGISTER && src1p.type == DRCUML_PTYPE_INT_REGISTER && src2p.type == DRCUML_PTYPE_INT_REGISTER && inst->condflags == 0)
4709      else if (dstp.type == DRCUML_PTYPE_INT_REGISTER && src1p.type == DRCUML_PTYPE_INT_REGISTER && src2p.type == DRCUML_PTYPE_INT_REGISTER && inst->flags == 0)
46904710         emit_lea_r64_m64(&dst, dstp.value, MBISD(src1p.value, src2p.value, 1, 0));   // lea   dstp,[src1p+src2p]
46914711
46924712      /* general case */
r2844r2845
47124732
47134733   /* validate instruction */
47144734   assert(inst->size == 4 || inst->size == 8);
4715   assert((inst->condflags & ~(DRCUML_FLAG_C | DRCUML_FLAG_V | DRCUML_FLAG_Z | DRCUML_FLAG_S)) == 0);
4735   assert_no_condition(inst);
4736   assert_flags(inst, DRCUML_FLAG_C | DRCUML_FLAG_V | DRCUML_FLAG_Z | DRCUML_FLAG_S);
47164737
47174738   /* normalize parameters */
47184739   param_normalize_3_commutative(drcbe, inst, &dstp, PTYPE_MR, &src1p, PTYPE_MRI, &src2p, PTYPE_MRI);
r2844r2845
47304751      /* general case */
47314752      else
47324753      {
4733         emit_mov_r32_p32(drcbe, &dst, dstreg, &src1p);                        // mov   dstreg,src1p
4754         emit_mov_r32_p32_keepflags(drcbe, &dst, dstreg, &src1p);               // mov   dstreg,src1p
47344755         emit_adc_r32_p32(drcbe, &dst, dstreg, &src2p, inst);                  // adc   dstreg,src2p
47354756         emit_mov_p32_r32(drcbe, &dst, &dstp, dstreg);                        // mov   dstp,dstreg
47364757      }
r2844r2845
47464767      /* general case */
47474768      else
47484769      {
4749         emit_mov_r64_p64(drcbe, &dst, dstreg, &src1p);                        // mov   dstreg,src1p
4770         emit_mov_r64_p64_keepflags(drcbe, &dst, dstreg, &src1p);               // mov   dstreg,src1p
47504771         emit_adc_r64_p64(drcbe, &dst, dstreg, &src2p, inst);                  // adc   dstreg,src2p
47514772         emit_mov_p64_r64(drcbe, &dst, &dstp, dstreg);                        // mov   dstp,dstreg
47524773      }
r2844r2845
47664787
47674788   /* validate instruction */
47684789   assert(inst->size == 4 || inst->size == 8);
4769   assert((inst->condflags & ~(DRCUML_FLAG_C | DRCUML_FLAG_V | DRCUML_FLAG_Z | DRCUML_FLAG_S)) == 0);
4790   assert_no_condition(inst);
4791   assert_flags(inst, DRCUML_FLAG_C | DRCUML_FLAG_V | DRCUML_FLAG_Z | DRCUML_FLAG_S);
47704792
47714793   /* normalize parameters */
47724794   param_normalize_3(drcbe, inst, &dstp, PTYPE_MR, &src1p, PTYPE_MRI, &src2p, PTYPE_MRI);
4795   assert(src1p.type != DRCUML_PTYPE_IMMEDIATE || src2p.type != DRCUML_PTYPE_IMMEDIATE);
47734796
4774   /* degenerate cases -- convert to a move */
4775   if (src1p.type == DRCUML_PTYPE_IMMEDIATE && src2p.type == DRCUML_PTYPE_IMMEDIATE && inst->condflags == 0)
4776      return convert_to_mov_imm(drcbe, dst, inst, &dstp, src1p.value - src2p.value);
4777   if (src2p.type == DRCUML_PTYPE_IMMEDIATE && src2p.value == 0 && inst->condflags == 0)
4778      return convert_to_mov_src1(drcbe, dst, inst, &dstp, &src1p);
4779
47804797   /* pick a target register for the general case */
47814798   dstreg = param_select_register(REG_EAX, &dstp, &src2p);
47824799
r2844r2845
47884805         emit_sub_m32_p32(drcbe, &dst, MABS(drcbe, dstp.value), &src2p, inst);      // sub   [dstp],src2p
47894806
47904807      /* reg = reg - imm */
4791      else if (dstp.type == DRCUML_PTYPE_INT_REGISTER && src1p.type == DRCUML_PTYPE_INT_REGISTER && src2p.type == DRCUML_PTYPE_IMMEDIATE && inst->condflags == 0)
4808      else if (dstp.type == DRCUML_PTYPE_INT_REGISTER && src1p.type == DRCUML_PTYPE_INT_REGISTER && src2p.type == DRCUML_PTYPE_IMMEDIATE && inst->flags == 0)
47924809         emit_lea_r32_m32(&dst, dstp.value, MBD(src1p.value, -src2p.value));         // lea   dstp,[src1p-src2p]
47934810
47944811      /* general case */
r2844r2845
48084825         emit_sub_m64_p64(drcbe, &dst, MABS(drcbe, dstp.value), &src2p, inst);      // sub   [dstp],src2p
48094826
48104827      /* reg = reg - imm */
4811      else if (dstp.type == DRCUML_PTYPE_INT_REGISTER && src1p.type == DRCUML_PTYPE_INT_REGISTER && src2p.type == DRCUML_PTYPE_IMMEDIATE && short_immediate(src2p.type) && inst->condflags == 0)
4828      else if (dstp.type == DRCUML_PTYPE_INT_REGISTER && src1p.type == DRCUML_PTYPE_INT_REGISTER && src2p.type == DRCUML_PTYPE_IMMEDIATE && short_immediate(src2p.type) && inst->flags == 0)
48124829         emit_lea_r64_m64(&dst, dstp.value, MBD(src1p.value, -src2p.value));         // lea   dstp,[src1p-src2p]
48134830
48144831      /* general case */
r2844r2845
48344851
48354852   /* validate instruction */
48364853   assert(inst->size == 4 || inst->size == 8);
4837   assert((inst->condflags & ~(DRCUML_FLAG_C | DRCUML_FLAG_V | DRCUML_FLAG_Z | DRCUML_FLAG_S)) == 0);
4854   assert_no_condition(inst);
4855   assert_flags(inst, DRCUML_FLAG_C | DRCUML_FLAG_V | DRCUML_FLAG_Z | DRCUML_FLAG_S);
48384856
48394857   /* normalize parameters */
48404858   param_normalize_3(drcbe, inst, &dstp, PTYPE_MR, &src1p, PTYPE_MRI, &src2p, PTYPE_MRI);
r2844r2845
48524870      /* general case */
48534871      else
48544872      {
4855         emit_mov_r32_p32(drcbe, &dst, dstreg, &src1p);                        // mov   dstreg,src1p
4873         emit_mov_r32_p32_keepflags(drcbe, &dst, dstreg, &src1p);               // mov   dstreg,src1p
48564874         emit_sbb_r32_p32(drcbe, &dst, dstreg, &src2p, inst);                  // sbb   dstreg,src2p
48574875         emit_mov_p32_r32(drcbe, &dst, &dstp, dstreg);                        // mov   dstp,dstreg
48584876      }
r2844r2845
48684886      /* general case */
48694887      else
48704888      {
4871         emit_mov_r64_p64(drcbe, &dst, dstreg, &src1p);                        // mov   dstreg,src1p
4889         emit_mov_r64_p64_keepflags(drcbe, &dst, dstreg, &src1p);               // mov   dstreg,src1p
48724890         emit_sbb_r64_p64(drcbe, &dst, dstreg, &src2p, inst);                  // sbb   dstreg,src2p
48734891         emit_mov_p64_r64(drcbe, &dst, &dstp, dstreg);                        // mov   dstp,dstreg
48744892      }
r2844r2845
48884906
48894907   /* validate instruction */
48904908   assert(inst->size == 4 || inst->size == 8);
4891   assert((inst->condflags & ~(DRCUML_FLAG_C | DRCUML_FLAG_V | DRCUML_FLAG_Z | DRCUML_FLAG_S)) == 0);
4909   assert_no_condition(inst);
4910   assert_flags(inst, DRCUML_FLAG_C | DRCUML_FLAG_V | DRCUML_FLAG_Z | DRCUML_FLAG_S);
48924911
48934912   /* normalize parameters */
48944913   param_normalize_2(drcbe, inst, &src1p, PTYPE_MRI, &src2p, PTYPE_MRI);
48954914
4896   /* degenerate cases */
4897   if (src1p.type == DRCUML_PTYPE_IMMEDIATE && src2p.type == DRCUML_PTYPE_IMMEDIATE && src1p.value == src2p.value)
4898   {
4899      emit_cmp_r32_r32(&dst, REG_EAX, REG_EAX);                              // cmp   eax,eax
4900      return dst;
4901   }
4902
49034915   /* pick a target register for the general case */
49044916   src1reg = param_select_register(REG_EAX, &src1p, NULL);
49054917
r2844r2845
49494961
49504962   /* validate instruction */
49514963   assert(inst->size == 4 || inst->size == 8);
4952   assert((inst->condflags & ~(DRCUML_FLAG_Z | DRCUML_FLAG_S)) == 0);
4964   assert_no_condition(inst);
4965   assert_flags(inst, /*DRCUML_FLAG_V |*/ DRCUML_FLAG_Z | DRCUML_FLAG_S);
49534966
49544967   /* normalize parameters */
49554968   param_normalize_4_commutative(drcbe, inst, &dstp, PTYPE_MR, &edstp, PTYPE_MR, &src1p, PTYPE_MRI, &src2p, PTYPE_MRI);
49564969   compute_hi = (dstp.type != edstp.type || dstp.value != edstp.value);
49574970
4958   /* degenerate cases -- convert to a move */
4959   if (src1p.type == DRCUML_PTYPE_IMMEDIATE && src2p.type == DRCUML_PTYPE_IMMEDIATE && inst->condflags == 0)
4960   {
4961      if (inst->size == 4)
4962      {
4963         if (!compute_hi)
4964            return convert_to_mov_imm(drcbe, dst, inst, &dstp, (UINT32)src1p.value * (UINT32)src2p.value);
4965         else
4966         {
4967            UINT64 result = (UINT64)(UINT32)src1p.value * (UINT64)(UINT32)src2p.value;
4968            dst = convert_to_mov_imm(drcbe, dst, inst, &dstp, result & 0xffffffff);
4969            return convert_to_mov_imm(drcbe, dst, inst, &dstp, result >> 32);
4970         }
4971      }
4972   }
4973
49744971   /* 32-bit form */
49754972   if (inst->size == 4)
49764973   {
r2844r2845
49904987         emit_mov_p32_r32(drcbe, &dst, &edstp, REG_EDX);                        // mov   edstp,edx
49914988
49924989      /* compute flags */
4993      if (inst->condflags != 0)
4990      if (inst->flags != 0)
49944991      {
49954992         if (compute_hi)
49964993         {
4997            if (inst->condflags == DRCUML_FLAG_Z)
4994            if (inst->flags == DRCUML_FLAG_Z)
49984995               emit_or_r32_r32(&dst, REG_EDX, REG_EAX);                     // or    edx,eax
4999            else if (inst->condflags == DRCUML_FLAG_S)
4996            else if (inst->flags == DRCUML_FLAG_S)
50004997               emit_test_r32_r32(&dst, REG_EDX, REG_EDX);                     // test  edx,edx
50014998            else
50024999            {
r2844r2845
50305027         emit_mov_p64_r64(drcbe, &dst, &edstp, REG_RDX);                        // mov   edstp,rdx
50315028
50325029      /* compute flags */
5033      if (inst->condflags != 0)
5030      if (inst->flags != 0)
50345031      {
50355032         if (compute_hi)
50365033         {
5037            if (inst->condflags == DRCUML_FLAG_Z)
5034            if (inst->flags == DRCUML_FLAG_Z)
50385035               emit_or_r64_r64(&dst, REG_RDX, REG_RAX);                     // or    rdx,rax
5039            else if (inst->condflags == DRCUML_FLAG_S)
5036            else if (inst->flags == DRCUML_FLAG_S)
50405037               emit_test_r64_r64(&dst, REG_RDX, REG_RDX);                     // test  rdx,rdx
50415038            else
50425039            {
r2844r2845
50655062
50665063   /* validate instruction */
50675064   assert(inst->size == 4 || inst->size == 8);
5068   assert((inst->condflags & ~(DRCUML_FLAG_Z | DRCUML_FLAG_S)) == 0);
5065   assert_no_condition(inst);
5066   assert_flags(inst, /*DRCUML_FLAG_V |*/ DRCUML_FLAG_Z | DRCUML_FLAG_S);
50695067
50705068   /* normalize parameters */
50715069   param_normalize_4_commutative(drcbe, inst, &dstp, PTYPE_MR, &edstp, PTYPE_MR, &src1p, PTYPE_MRI, &src2p, PTYPE_MRI);
50725070   compute_hi = (dstp.type != edstp.type || dstp.value != edstp.value);
50735071
5074   /* degenerate cases -- convert to a move */
5075   if (src1p.type == DRCUML_PTYPE_IMMEDIATE && src2p.type == DRCUML_PTYPE_IMMEDIATE && inst->condflags == 0)
5076   {
5077      if (inst->size == 4)
5078      {
5079         if (!compute_hi)
5080            return convert_to_mov_imm(drcbe, dst, inst, &dstp, (INT32)src1p.value * (INT32)src2p.value);
5081         else
5082         {
5083            UINT64 result = (INT64)(INT32)src1p.value * (INT64)(INT32)src2p.value;
5084            dst = convert_to_mov_imm(drcbe, dst, inst, &dstp, result & 0xffffffff);
5085            return convert_to_mov_imm(drcbe, dst, inst, &dstp, result >> 32);
5086         }
5087      }
5088   }
5089
50905072   /* 32-bit form */
50915073   if (inst->size == 4)
50925074   {
r2844r2845
51295111      }
51305112
51315113      /* compute flags */
5132      if (inst->condflags != 0)
5114      if (inst->flags != 0)
51335115      {
51345116         if (compute_hi)
51355117         {
5136            if (inst->condflags == DRCUML_FLAG_Z)
5118            if (inst->flags == DRCUML_FLAG_Z)
51375119               emit_or_r32_r32(&dst, REG_EDX, REG_EAX);                     // or    edx,eax
5138            else if (inst->condflags == DRCUML_FLAG_S)
5120            else if (inst->flags == DRCUML_FLAG_S)
51395121               emit_test_r32_r32(&dst, REG_EDX, REG_EDX);                     // test  edx,edx
51405122            else
51415123            {
r2844r2845
51925174      }
51935175
51945176      /* compute flags */
5195      if (inst->condflags != 0)
5177      if (inst->flags != 0)
51965178      {
51975179         if (compute_hi)
51985180         {
5199            if (inst->condflags == DRCUML_FLAG_Z)
5181            if (inst->flags == DRCUML_FLAG_Z)
52005182               emit_or_r64_r64(&dst, REG_RDX, REG_RAX);                     // or    rdx,rax
5201            else if (inst->condflags == DRCUML_FLAG_S)
5183            else if (inst->flags == DRCUML_FLAG_S)
52025184               emit_test_r64_r64(&dst, REG_RDX, REG_RDX);                     // test  rdx,rdx
52035185            else
52045186            {
r2844r2845
52285210
52295211   /* validate instruction */
52305212   assert(inst->size == 4 || inst->size == 8);
5231   assert((inst->condflags & ~(DRCUML_FLAG_Z | DRCUML_FLAG_S)) == 0);
5213   assert_no_condition(inst);
5214   assert_flags(inst, /*DRCUML_FLAG_V |*/ DRCUML_FLAG_Z | DRCUML_FLAG_S);
52325215
52335216   /* normalize parameters */
52345217   param_normalize_4(drcbe, inst, &dstp, PTYPE_MR, &edstp, PTYPE_MR, &src1p, PTYPE_MRI, &src2p, PTYPE_MRI);
52355218   compute_rem = (dstp.type != edstp.type || dstp.value != edstp.value);
52365219
5237   /* degenerate cases -- convert to a move */
5238   if (src1p.type == DRCUML_PTYPE_IMMEDIATE && src2p.type == DRCUML_PTYPE_IMMEDIATE && inst->condflags == 0)
5239   {
5240      if (inst->size == 4)
5241      {
5242         if ((UINT32)src2p.value == 0)
5243            return dst;
5244         if (!compute_rem)
5245            return convert_to_mov_imm(drcbe, dst, inst, &dstp, (UINT32)src1p.value / (UINT32)src2p.value);
5246         else
5247         {
5248            dst = convert_to_mov_imm(drcbe, dst, inst, &dstp, (UINT32)src1p.value / (UINT32)src2p.value);
5249            return convert_to_mov_imm(drcbe, dst, inst, &dstp, (UINT32)src1p.value % (UINT32)src2p.value);
5250         }
5251      }
5252      else if (inst->size == 8)
5253      {
5254         UINT64 reslo, reshi;
5255         if (src2p.value == 0)
5256            return dst;
5257         if (!compute_rem)
5258         {
5259            reslo = (UINT64)src1p.value / (UINT64)src2p.value;
5260            return convert_to_mov_imm(drcbe, dst, inst, &dstp, reslo);
5261         }
5262         else
5263         {
5264            reslo = (UINT64)src1p.value / (UINT64)src2p.value;
5265            reshi = (UINT64)src1p.value % (UINT64)src2p.value;
5266            dst = convert_to_mov_imm(drcbe, dst, inst, &dstp, reslo);
5267            return convert_to_mov_imm(drcbe, dst, inst, &dstp, reshi);
5268         }
5269      }
5270   }
5271
52725220   /* 32-bit form */
52735221   if (inst->size == 4)
52745222   {
r2844r2845
52815229      emit_mov_p32_r32(drcbe, &dst, &dstp, REG_EAX);                           // mov   dstp,eax
52825230      if (compute_rem)
52835231         emit_mov_p32_r32(drcbe, &dst, &edstp, REG_EDX);                        // mov   edstp,edx
5232      if (inst->flags != 0)
5233         emit_test_r32_r32(&dst, REG_EAX, REG_EAX);                           // test  eax,eax
52845234      resolve_link(&dst, &skip);                                       // skip:
52855235   }
52865236
r2844r2845
52965246      emit_mov_p64_r64(drcbe, &dst, &dstp, REG_RAX);                           // mov   dstp,rax
52975247      if (compute_rem)
52985248         emit_mov_p64_r64(drcbe, &dst, &edstp, REG_RDX);                        // mov   edstp,rdx
5249      if (inst->flags != 0)
5250         emit_test_r64_r64(&dst, REG_RAX, REG_RAX);                           // test  eax,eax
52995251      resolve_link(&dst, &skip);                                       // skip:
53005252   }
53015253   return dst;
r2844r2845
53145266
53155267   /* validate instruction */
53165268   assert(inst->size == 4 || inst->size == 8);
5317   assert((inst->condflags & ~(DRCUML_FLAG_Z | DRCUML_FLAG_S)) == 0);
5269   assert_no_condition(inst);
5270   assert_flags(inst, /*DRCUML_FLAG_V |*/ DRCUML_FLAG_Z | DRCUML_FLAG_S);
53185271
53195272   /* normalize parameters */
53205273   param_normalize_4(drcbe, inst, &dstp, PTYPE_MR, &edstp, PTYPE_MR, &src1p, PTYPE_MRI, &src2p, PTYPE_MRI);
53215274   compute_rem = (dstp.type != edstp.type || dstp.value != edstp.value);
53225275
5323   /* degenerate cases -- convert to a move */
5324   if (src1p.type == DRCUML_PTYPE_IMMEDIATE && src2p.type == DRCUML_PTYPE_IMMEDIATE && inst->condflags == 0)
5325   {
5326      if (inst->size == 4)
5327      {
5328         if ((INT32)src2p.value == 0)
5329            return dst;
5330         if (!compute_rem)
5331            return convert_to_mov_imm(drcbe, dst, inst, &dstp, (INT32)src1p.value / (INT32)src2p.value);
5332         else
5333         {
5334            dst = convert_to_mov_imm(drcbe, dst, inst, &dstp, (INT32)src1p.value / (INT32)src2p.value);
5335            return convert_to_mov_imm(drcbe, dst, inst, &dstp, (INT32)src1p.value % (INT32)src2p.value);
5336         }
5337      }
5338      else if (inst->size == 8)
5339      {
5340         UINT64 reslo, reshi;
5341         if (src2p.value == 0)
5342            return dst;
5343         if (!compute_rem)
5344         {
5345            reslo = (INT64)src1p.value / (INT64)src2p.value;
5346            return convert_to_mov_imm(drcbe, dst, inst, &dstp, reslo);
5347         }
5348         else
5349         {
5350            reslo = (INT64)src1p.value / (INT64)src2p.value;
5351            reshi = (INT64)src1p.value % (INT64)src2p.value;
5352            dst = convert_to_mov_imm(drcbe, dst, inst, &dstp, reslo);
5353            return convert_to_mov_imm(drcbe, dst, inst, &dstp, reshi);
5354         }
5355      }
5356   }
5357
53585276   /* 32-bit form */
53595277   if (inst->size == 4)
53605278   {
r2844r2845
53675285      emit_mov_p32_r32(drcbe, &dst, &dstp, REG_EAX);                           // mov   dstp,eax
53685286      if (compute_rem)
53695287         emit_mov_p32_r32(drcbe, &dst, &edstp, REG_EDX);                        // mov   edstp,edx
5288      if (inst->flags != 0)
5289         emit_test_r32_r32(&dst, REG_EAX, REG_EAX);                           // test  eax,eax
53705290      resolve_link(&dst, &skip);                                       // skip:
53715291   }
53725292
r2844r2845
53825302      emit_mov_p64_r64(drcbe, &dst, &dstp, REG_RAX);                           // mov   dstp,rax
53835303      if (compute_rem)
53845304         emit_mov_p64_r64(drcbe, &dst, &edstp, REG_RDX);                        // mov   edstp,rdx
5305      if (inst->flags != 0)
5306         emit_test_r64_r64(&dst, REG_RAX, REG_RAX);                           // test  eax,eax
53855307      resolve_link(&dst, &skip);                                       // skip:
53865308   }
53875309   return dst;
r2844r2845
53995321
54005322   /* validate instruction */
54015323   assert(inst->size == 4 || inst->size == 8);
5402   assert((inst->condflags & ~(DRCUML_FLAG_Z | DRCUML_FLAG_S)) == 0);
5324   assert_no_condition(inst);
5325   assert_flags(inst, DRCUML_FLAG_Z | DRCUML_FLAG_S);
54035326
54045327   /* normalize parameters */
54055328   param_normalize_3_commutative(drcbe, inst, &dstp, PTYPE_MR, &src1p, PTYPE_MRI, &src2p, PTYPE_MRI);
5329   assert(src1p.type != DRCUML_PTYPE_IMMEDIATE || src2p.type != DRCUML_PTYPE_IMMEDIATE);
54065330
5407   /* degenerate cases -- convert to a move */
5408   if (src1p.type == DRCUML_PTYPE_IMMEDIATE && src2p.type == DRCUML_PTYPE_IMMEDIATE && inst->condflags == 0)
5409      return convert_to_mov_imm(drcbe, dst, inst, &dstp, src1p.value & src2p.value);
5410   if (src2p.type == DRCUML_PTYPE_IMMEDIATE && (src2p.value & size_to_mask[inst->size]) == size_to_mask[inst->size] && inst->condflags == 0)
5411      return convert_to_mov_src1(drcbe, dst, inst, &dstp, &src1p);
5412
54135331   /* pick a target register for the general case */
54145332   dstreg = param_select_register(REG_EAX, &dstp, &src2p);
54155333
r2844r2845
54595377
54605378   /* validate instruction */
54615379   assert(inst->size == 4 || inst->size == 8);
5462   assert((inst->condflags & ~(DRCUML_FLAG_Z | DRCUML_FLAG_S)) == 0);
5380   assert_no_condition(inst);
5381   assert_flags(inst, DRCUML_FLAG_Z | DRCUML_FLAG_S);
54635382
54645383   /* normalize parameters */
54655384   param_normalize_2_commutative(drcbe, inst, &src1p, PTYPE_MRI, &src2p, PTYPE_MRI);
r2844r2845
55115430
55125431   /* validate instruction */
55135432   assert(inst->size == 4 || inst->size == 8);
5514   assert((inst->condflags & ~(DRCUML_FLAG_Z | DRCUML_FLAG_S)) == 0);
5433   assert_no_condition(inst);
5434   assert_flags(inst, DRCUML_FLAG_Z | DRCUML_FLAG_S);
55155435
55165436   /* normalize parameters */
55175437   param_normalize_3_commutative(drcbe, inst, &dstp, PTYPE_MR, &src1p, PTYPE_MRI, &src2p, PTYPE_MRI);
5438   assert(src1p.type != DRCUML_PTYPE_IMMEDIATE || src2p.type != DRCUML_PTYPE_IMMEDIATE);
55185439
5519   /* degenerate cases -- convert to a move */
5520   if (src1p.type == DRCUML_PTYPE_IMMEDIATE && src2p.type == DRCUML_PTYPE_IMMEDIATE && inst->condflags == 0)
5521      return convert_to_mov_imm(drcbe, dst, inst, &dstp, src1p.value | src2p.value);
5522   if (src2p.type == DRCUML_PTYPE_IMMEDIATE && src2p.value == 0 && inst->condflags == 0)
5523      return convert_to_mov_src1(drcbe, dst, inst, &dstp, &src1p);
5524
55255440   /* pick a target register for the general case */
55265441   dstreg = param_select_register(REG_EAX, &dstp, &src2p);
55275442
r2844r2845
55715486
55725487   /* validate instruction */
55735488   assert(inst->size == 4 || inst->size == 8);
5574   assert((inst->condflags & ~(DRCUML_FLAG_Z | DRCUML_FLAG_S)) == 0);
5489   assert_no_condition(inst);
5490   assert_flags(inst, DRCUML_FLAG_Z | DRCUML_FLAG_S);
55755491
55765492   /* normalize parameters */
55775493   param_normalize_3_commutative(drcbe, inst, &dstp, PTYPE_MR, &src1p, PTYPE_MRI, &src2p, PTYPE_MRI);
5494   assert(src1p.type != DRCUML_PTYPE_IMMEDIATE || src2p.type != DRCUML_PTYPE_IMMEDIATE);
55785495
5579   /* degenerate cases -- convert to a move */
5580   if (src1p.type == DRCUML_PTYPE_IMMEDIATE && src2p.type == DRCUML_PTYPE_IMMEDIATE && inst->condflags == 0)
5581      return convert_to_mov_imm(drcbe, dst, inst, &dstp, src1p.value & src2p.value);
5582   if (src2p.type == DRCUML_PTYPE_IMMEDIATE && src2p.value == 0 && inst->condflags == 0)
5583      return convert_to_mov_src1(drcbe, dst, inst, &dstp, &src1p);
5584
55855496   /* pick a target register for the general case */
55865497   dstreg = param_select_register(REG_EAX, &dstp, &src2p);
55875498
r2844r2845
56315542
56325543   /* validate instruction */
56335544   assert(inst->size == 4 || inst->size == 8);
5634   assert(inst->condflags == 0);
5545   assert_no_condition(inst);
5546   assert_flags(inst, /*DRCUML_FLAG_Z | DRCUML_FLAG_S*/0);
56355547
56365548   /* normalize parameters */
56375549   param_normalize_2(drcbe, inst, &dstp, PTYPE_MR, &srcp, PTYPE_MRI);
5550   assert(srcp.type != DRCUML_PTYPE_IMMEDIATE);
56385551
5639   /* degenerate cases -- convert to a move */
5640   if (srcp.type == DRCUML_PTYPE_IMMEDIATE && inst->condflags == 0)
5641      return convert_to_mov_imm(drcbe, dst, inst, &dstp, count_leading_zeros(srcp.value));
5642
56435552   /* pick a target register for the general case */
5644   dstreg = param_select_register(REG_EAX, &dstp, &srcp);
5553   dstreg = param_select_register(REG_EAX, &dstp, NULL);
56455554
56465555   /* 32-bit form */
56475556   if (inst->size == 4)
r2844r2845
56775586
56785587   /* validate instruction */
56795588   assert(inst->size == 4 || inst->size == 8);
5680   assert(inst->condflags == 0);
5589   assert_no_condition(inst);
5590   assert_flags(inst, /*DRCUML_FLAG_Z | DRCUML_FLAG_S*/0);
56815591
56825592   /* normalize parameters */
56835593   param_normalize_2(drcbe, inst, &dstp, PTYPE_MR, &srcp, PTYPE_MRI);
5594   assert(srcp.type != DRCUML_PTYPE_IMMEDIATE);
56845595
5685   /* degenerate cases -- convert to a move */
5686   if (srcp.type == DRCUML_PTYPE_IMMEDIATE && inst->condflags == 0)
5687   {
5688      if (inst->size == 4)
5689         return convert_to_mov_imm(drcbe, dst, inst, &dstp, FLIPENDIAN_INT32(srcp.value));
5690      else if (inst->size == 8)
5691         return convert_to_mov_imm(drcbe, dst, inst, &dstp, FLIPENDIAN_INT64(srcp.value));
5692   }
5693
56945596   /* pick a target register for the general case */
5695   dstreg = param_select_register(REG_RAX, &dstp, &srcp);
5597   dstreg = param_select_register(REG_RAX, &dstp, NULL);
56965598
56975599   /* 32-bit form */
56985600   if (inst->size == 4)
r2844r2845
57245626
57255627   /* validate instruction */
57265628   assert(inst->size == 4 || inst->size == 8);
5727   assert((inst->condflags & ~(DRCUML_FLAG_Z | DRCUML_FLAG_S)) == 0);
5629   assert_no_condition(inst);
5630   assert_flags(inst, DRCUML_FLAG_C | DRCUML_FLAG_Z | DRCUML_FLAG_S);
57285631
57295632   /* normalize parameters */
57305633   param_normalize_3(drcbe, inst, &dstp, PTYPE_MR, &src1p, PTYPE_MRI, &src2p, PTYPE_MRI);
5634   assert(src1p.type != DRCUML_PTYPE_IMMEDIATE || src2p.type != DRCUML_PTYPE_IMMEDIATE);
57315635
5732   /* degenerate cases -- convert to a move */
5733   if (src1p.type == DRCUML_PTYPE_IMMEDIATE && src2p.type == DRCUML_PTYPE_IMMEDIATE && inst->condflags == 0)
5734      return convert_to_mov_imm(drcbe, dst, inst, &dstp, src1p.value << src2p.value);
5735   if (src2p.type == DRCUML_PTYPE_IMMEDIATE && src2p.value == 0 && inst->condflags == 0)
5736      return convert_to_mov_src1(drcbe, dst, inst, &dstp, &src1p);
5737
57385636   /* pick a target register for the general case */
57395637   dstreg = param_select_register(REG_EAX, &dstp, &src2p);
57405638
r2844r2845
57845682
57855683   /* validate instruction */
57865684   assert(inst->size == 4 || inst->size == 8);
5787   assert((inst->condflags & ~(DRCUML_FLAG_Z | DRCUML_FLAG_S)) == 0);
5685   assert_no_condition(inst);
5686   assert_flags(inst, DRCUML_FLAG_C | DRCUML_FLAG_Z | DRCUML_FLAG_S);
57885687
57895688   /* normalize parameters */
57905689   param_normalize_3(drcbe, inst, &dstp, PTYPE_MR, &src1p, PTYPE_MRI, &src2p, PTYPE_MRI);
5690   assert(src1p.type != DRCUML_PTYPE_IMMEDIATE || src2p.type != DRCUML_PTYPE_IMMEDIATE);
57915691
5792   /* degenerate cases -- convert to a move */
5793   if (src1p.type == DRCUML_PTYPE_IMMEDIATE && src2p.type == DRCUML_PTYPE_IMMEDIATE && inst->condflags == 0)
5794      return convert_to_mov_imm(drcbe, dst, inst, &dstp, (UINT64)src1p.value >> src2p.value);
5795   if (src2p.type == DRCUML_PTYPE_IMMEDIATE && src2p.value == 0 && inst->condflags == 0)
5796      return convert_to_mov_src1(drcbe, dst, inst, &dstp, &src1p);
5797
57985692   /* pick a target register for the general case */
57995693   dstreg = param_select_register(REG_EAX, &dstp, &src2p);
58005694
r2844r2845
58445738
58455739   /* validate instruction */
58465740   assert(inst->size == 4 || inst->size == 8);
5847   assert((inst->condflags & ~(DRCUML_FLAG_Z | DRCUML_FLAG_S)) == 0);
5741   assert_no_condition(inst);
5742   assert_flags(inst, DRCUML_FLAG_C | DRCUML_FLAG_Z | DRCUML_FLAG_S);
58485743
58495744   /* normalize parameters */
58505745   param_normalize_3(drcbe, inst, &dstp, PTYPE_MR, &src1p, PTYPE_MRI, &src2p, PTYPE_MRI);
5746   assert(src1p.type != DRCUML_PTYPE_IMMEDIATE || src2p.type != DRCUML_PTYPE_IMMEDIATE);
58515747
5852   /* degenerate cases -- convert to a move */
5853   if (src1p.type == DRCUML_PTYPE_IMMEDIATE && src2p.type == DRCUML_PTYPE_IMMEDIATE && inst->condflags == 0)
5854   {
5855      if (inst->size == 4)
5856         return convert_to_mov_imm(drcbe, dst, inst, &dstp, (INT32)src1p.value >> src2p.value);
5857      else if (inst->size == 8)
5858         return convert_to_mov_imm(drcbe, dst, inst, &dstp, (INT64)src1p.value >> src2p.value);
5859   }
5860   if (src2p.type == DRCUML_PTYPE_IMMEDIATE && src2p.value == 0 && inst->condflags == 0)
5861      return convert_to_mov_src1(drcbe, dst, inst, &dstp, &src1p);
5862
58635748   /* pick a target register for the general case */
58645749   dstreg = param_select_register(REG_EAX, &dstp, &src2p);
58655750
r2844r2845
59095794
59105795   /* validate instruction */
59115796   assert(inst->size == 4 || inst->size == 8);
5912   assert((inst->condflags & ~(DRCUML_FLAG_Z | DRCUML_FLAG_S)) == 0);
5797   assert_no_condition(inst);
5798   assert_flags(inst, DRCUML_FLAG_C | DRCUML_FLAG_Z | DRCUML_FLAG_S);
59135799
59145800   /* normalize parameters */
59155801   param_normalize_3(drcbe, inst, &dstp, PTYPE_MR, &src1p, PTYPE_MRI, &src2p, PTYPE_MRI);
5802   assert(src1p.type != DRCUML_PTYPE_IMMEDIATE || src2p.type != DRCUML_PTYPE_IMMEDIATE);
59165803
5917   /* degenerate cases -- convert to a move */
5918   if (src1p.type == DRCUML_PTYPE_IMMEDIATE && src2p.type == DRCUML_PTYPE_IMMEDIATE && inst->condflags == 0)
5919      return convert_to_mov_imm(drcbe, dst, inst, &dstp, (UINT64)src1p.value >> src2p.value);
5920   if (src2p.type == DRCUML_PTYPE_IMMEDIATE && src2p.value == 0 && inst->condflags == 0)
5921      return convert_to_mov_src1(drcbe, dst, inst, &dstp, &src1p);
5922
59235804   /* pick a target register for the general case */
59245805   dstreg = param_select_register(REG_EAX, &dstp, &src2p);
59255806
r2844r2845
59695850
59705851   /* validate instruction */
59715852   assert(inst->size == 4 || inst->size == 8);
5972   assert((inst->condflags & ~(DRCUML_FLAG_Z | DRCUML_FLAG_S)) == 0);
5853   assert_no_condition(inst);
5854   assert_flags(inst, DRCUML_FLAG_C | DRCUML_FLAG_Z | DRCUML_FLAG_S);
59735855
59745856   /* normalize parameters */
59755857   param_normalize_3(drcbe, inst, &dstp, PTYPE_MR, &src1p, PTYPE_MRI, &src2p, PTYPE_MRI);
5858   assert(src1p.type != DRCUML_PTYPE_IMMEDIATE || src2p.type != DRCUML_PTYPE_IMMEDIATE);
59765859
5977   /* degenerate cases -- convert to a move */
5978   if (src1p.type == DRCUML_PTYPE_IMMEDIATE && src2p.type == DRCUML_PTYPE_IMMEDIATE && inst->condflags == 0)
5979      return convert_to_mov_imm(drcbe, dst, inst, &dstp, (UINT64)src1p.value >> src2p.value);
5980   if (src2p.type == DRCUML_PTYPE_IMMEDIATE && src2p.value == 0 && inst->condflags == 0)
5981      return convert_to_mov_src1(drcbe, dst, inst, &dstp, &src1p);
5982
59835860   /* pick a target register for the general case */
59845861   dstreg = param_select_register(REG_EAX, &dstp, &src2p);
59855862
r2844r2845
60295906
60305907   /* validate instruction */
60315908   assert(inst->size == 4 || inst->size == 8);
6032   assert((inst->condflags & ~(DRCUML_FLAG_Z | DRCUML_FLAG_S)) == 0);
5909   assert_no_condition(inst);
5910   assert_flags(inst, DRCUML_FLAG_C | DRCUML_FLAG_Z | DRCUML_FLAG_S);
60335911
60345912   /* normalize parameters */
60355913   param_normalize_3(drcbe, inst, &dstp, PTYPE_MR, &src1p, PTYPE_MRI, &src2p, PTYPE_MRI);
60365914
6037   /* degenerate cases -- convert to a move */
6038   if (src1p.type == DRCUML_PTYPE_IMMEDIATE && src2p.type == DRCUML_PTYPE_IMMEDIATE && inst->condflags == 0)
6039      return convert_to_mov_imm(drcbe, dst, inst, &dstp, (UINT64)src1p.value >> src2p.value);
6040   if (src2p.type == DRCUML_PTYPE_IMMEDIATE && src2p.value == 0 && inst->condflags == 0)
6041      return convert_to_mov_src1(drcbe, dst, inst, &dstp, &src1p);
6042
60435915   /* pick a target register for the general case */
60445916   dstreg = param_select_register(REG_EAX, &dstp, &src2p);
60455917
r2844r2845
60535925      /* general case */
60545926      else
60555927      {
6056         emit_mov_r32_p32(drcbe, &dst, dstreg, &src1p);                        // mov   dstreg,src1p
5928         emit_mov_r32_p32_keepflags(drcbe, &dst, dstreg, &src1p);               // mov   dstreg,src1p
60575929         emit_rcl_r32_p32(drcbe, &dst, dstreg, &src2p, inst);                  // rcl   dstreg,src2p
60585930         emit_mov_p32_r32(drcbe, &dst, &dstp, dstreg);                        // mov   dstp,dstreg
60595931      }
r2844r2845
60695941      /* general case */
60705942      else
60715943      {
6072         emit_mov_r64_p64(drcbe, &dst, dstreg, &src1p);                        // mov   dstreg,src1p
5944         emit_mov_r64_p64_keepflags(drcbe, &dst, dstreg, &src1p);               // mov   dstreg,src1p
60735945         emit_rcl_r64_p64(drcbe, &dst, dstreg, &src2p, inst);                  // rcl   dstreg,src2p
60745946         emit_mov_p64_r64(drcbe, &dst, &dstp, dstreg);                        // mov   dstp,dstreg
60755947      }
r2844r2845
60895961
60905962   /* validate instruction */
60915963   assert(inst->size == 4 || inst->size == 8);
6092   assert((inst->condflags & ~(DRCUML_FLAG_Z | DRCUML_FLAG_S)) == 0);
5964   assert_no_condition(inst);
5965   assert_flags(inst, DRCUML_FLAG_C | DRCUML_FLAG_Z | DRCUML_FLAG_S);
60935966
60945967   /* normalize parameters */
60955968   param_normalize_3(drcbe, inst, &dstp, PTYPE_MR, &src1p, PTYPE_MRI, &src2p, PTYPE_MRI);
60965969
6097   /* degenerate cases -- convert to a move */
6098   if (src1p.type == DRCUML_PTYPE_IMMEDIATE && src2p.type == DRCUML_PTYPE_IMMEDIATE && inst->condflags == 0)
6099      return convert_to_mov_imm(drcbe, dst, inst, &dstp, (UINT64)src1p.value >> src2p.value);
6100   if (src2p.type == DRCUML_PTYPE_IMMEDIATE && src2p.value == 0 && inst->condflags == 0)
6101      return convert_to_mov_src1(drcbe, dst, inst, &dstp, &src1p);
6102
61035970   /* pick a target register for the general case */
61045971   dstreg = param_select_register(REG_EAX, &dstp, &src2p);
61055972
r2844r2845
61135980      /* general case */
61145981      else
61155982      {
6116         emit_mov_r32_p32(drcbe, &dst, dstreg, &src1p);                        // mov   dstreg,src1p
5983         emit_mov_r32_p32_keepflags(drcbe, &dst, dstreg, &src1p);               // mov   dstreg,src1p
61175984         emit_rcr_r32_p32(drcbe, &dst, dstreg, &src2p, inst);                  // rcr   dstreg,src2p
61185985         emit_mov_p32_r32(drcbe, &dst, &dstp, dstreg);                        // mov   dstp,dstreg
61195986      }
r2844r2845
61295996      /* general case */
61305997      else
61315998      {
6132         emit_mov_r64_p64(drcbe, &dst, dstreg, &src1p);                        // mov   dstreg,src1p
5999         emit_mov_r64_p64_keepflags(drcbe, &dst, dstreg, &src1p);               // mov   dstreg,src1p
61336000         emit_rcr_r64_p64(drcbe, &dst, dstreg, &src2p, inst);                  // rcr   dstreg,src2p
61346001         emit_mov_p64_r64(drcbe, &dst, &dstp, dstreg);                        // mov   dstp,dstreg
61356002      }
r2844r2845
61556022
61566023   /* validate instruction */
61576024   assert(inst->size == 4 || inst->size == 8);
6158   assert(inst->condflags == DRCUML_COND_ALWAYS);
6025   assert_no_condition(inst);
6026   assert_no_flags(inst);
61596027
61606028   /* normalize parameters */
61616029   param_normalize_3(drcbe, inst, &dstp, PTYPE_MF, &basep, PTYPE_M, &indp, PTYPE_MRI);
r2844r2845
62096077
62106078   /* validate instruction */
62116079   assert(inst->size == 4 || inst->size == 8);
6212   assert(inst->condflags == DRCUML_COND_ALWAYS);
6080   assert_no_condition(inst);
6081   assert_no_flags(inst);
62136082
62146083   /* normalize parameters */
62156084   param_normalize_3(drcbe, inst, &basep, PTYPE_M, &indp, PTYPE_MRI, &srcp, PTYPE_MF);
r2844r2845
62616130
62626131   /* validate instruction */
62636132   assert(inst->size == 4 || inst->size == 8);
6264   assert(inst->condflags == DRCUML_COND_ALWAYS);
6133   assert_no_condition(inst);
6134   assert_no_flags(inst);
62656135
62666136   /* normalize parameters */
62676137   param_normalize_3(drcbe, inst, &dstp, PTYPE_MF, &addrp, PTYPE_MRI, &spacep, PTYPE_I);
r2844r2845
63026172
63036173   /* validate instruction */
63046174   assert(inst->size == 4 || inst->size == 8);
6305   assert(inst->condflags == DRCUML_COND_ALWAYS);
6175   assert_no_condition(inst);
6176   assert_no_flags(inst);
63066177
63076178   /* normalize parameters */
63086179   param_normalize_3(drcbe, inst, &addrp, PTYPE_MRI, &srcp, PTYPE_MF, &spacep, PTYPE_I);
r2844r2845
63466217
63476218   /* validate instruction */
63486219   assert(inst->size == 4 || inst->size == 8);
6349   assert(inst->condflags == DRCUML_COND_ALWAYS || (inst->condflags >= COND_Z && inst->condflags < DRCUML_COND_MAX));
6220   assert_any_condition(inst);
6221   assert_no_flags(inst);
63506222
63516223   /* normalize parameters */
63526224   param_normalize_2(drcbe, inst, &dstp, PTYPE_MF, &srcp, PTYPE_MF);
r2844r2845
63556227   dstreg = param_select_register(REG_XMM0, &dstp, NULL);
63566228
63576229   /* always start with a jmp */
6358   if (inst->condflags != DRCUML_COND_ALWAYS)
6359      emit_jcc_short_link(&dst, X86_NOT_CONDITION(inst->condflags), &skip);         // jcc   skip
6230   if (inst->condition != DRCUML_COND_ALWAYS)
6231      emit_jcc_short_link(&dst, X86_NOT_CONDITION(inst->condition), &skip);         // jcc   skip
63606232
63616233   /* 32-bit form */
63626234   if (inst->size == 4)
r2844r2845
63736245   }
63746246
63756247   /* resolve the jump */
6376   if (inst->condflags != DRCUML_COND_ALWAYS)
6248   if (inst->condition != DRCUML_COND_ALWAYS)
63776249      resolve_link(&dst, &skip);                                       // skip:
63786250   return dst;
63796251}
r2844r2845
63906262
63916263   /* validate instruction */
63926264   assert(inst->size == 4 || inst->size == 8);
6393   assert(inst->condflags == DRCUML_COND_ALWAYS);
6265   assert_no_condition(inst);
6266   assert_no_flags(inst);
63946267
63956268   /* normalize parameters */
63966269   param_normalize_4(drcbe, inst, &dstp, PTYPE_MR, &srcp, PTYPE_MF, &sizep, PTYPE_I, &roundp, PTYPE_I);
r2844r2845
65146387
65156388   /* validate instruction */
65166389   assert(inst->size == 4 || inst->size == 8);
6517   assert(inst->condflags == DRCUML_COND_ALWAYS);
6390   assert_no_condition(inst);
6391   assert_no_flags(inst);
65186392
65196393   /* normalize parameters */
65206394   param_normalize_3(drcbe, inst, &dstp, PTYPE_MF, &srcp, PTYPE_MRI, &sizep, PTYPE_I);
r2844r2845
65986472
65996473   /* validate instruction */
66006474   assert(inst->size == 4 || inst->size == 8);
6601   assert(inst->condflags == DRCUML_COND_ALWAYS);
6475   assert_no_condition(inst);
6476   assert_no_flags(inst);
66026477
66036478   /* normalize parameters */
66046479   param_normalize_3(drcbe, inst, &dstp, PTYPE_MF, &srcp, PTYPE_MF, &sizep, PTYPE_I);
r2844r2845
66406515
66416516   /* validate instruction */
66426517   assert(inst->size == 8);
6643   assert(inst->condflags == DRCUML_COND_ALWAYS);
6518   assert_no_condition(inst);
6519   assert_no_flags(inst);
66446520
66456521   /* normalize parameters */
66466522   param_normalize_2(drcbe, inst, &dstp, PTYPE_MF, &srcp, PTYPE_MF);
r2844r2845
66706546
66716547   /* validate instruction */
66726548   assert(inst->size == 4 || inst->size == 8);
6673   assert(inst->condflags == DRCUML_COND_ALWAYS);
6549   assert_no_condition(inst);
6550   assert_no_flags(inst);
66746551
66756552   /* normalize parameters */
66766553   param_normalize_3_commutative(drcbe, inst, &dstp, PTYPE_MF, &src1p, PTYPE_MF, &src2p, PTYPE_MF);
r2844r2845
67146591
67156592   /* validate instruction */
67166593   assert(inst->size == 4 || inst->size == 8);
6717   assert(inst->condflags == DRCUML_COND_ALWAYS);
6594   assert_no_condition(inst);
6595   assert_no_flags(inst);
67186596
67196597   /* normalize parameters */
67206598   param_normalize_3(drcbe, inst, &dstp, PTYPE_MF, &src1p, PTYPE_MF, &src2p, PTYPE_MF);
r2844r2845
67586636
67596637   /* validate instruction */
67606638   assert(inst->size == 4 || inst->size == 8);
6761   assert((inst->condflags & ~(DRCUML_FLAG_C | DRCUML_FLAG_Z | DRCUML_FLAG_U)) == 0);
6639   assert_no_condition(inst);
6640   assert_flags(inst, DRCUML_FLAG_C | DRCUML_FLAG_Z | DRCUML_FLAG_U);
67626641
67636642   /* normalize parameters */
67646643   param_normalize_2(drcbe, inst, &src1p, PTYPE_MF, &src2p, PTYPE_MF);
r2844r2845
68006679
68016680   /* validate instruction */
68026681   assert(inst->size == 4 || inst->size == 8);
6803   assert(inst->condflags == DRCUML_COND_ALWAYS);
6682   assert_no_condition(inst);
6683   assert_no_flags(inst);
68046684
68056685   /* normalize parameters */
68066686   param_normalize_3_commutative(drcbe, inst, &dstp, PTYPE_MF, &src1p, PTYPE_MF, &src2p, PTYPE_MF);
r2844r2845
68446724
68456725   /* validate instruction */
68466726   assert(inst->size == 4 || inst->size == 8);
6847   assert(inst->condflags == DRCUML_COND_ALWAYS);
6727   assert_no_condition(inst);
6728   assert_no_flags(inst);
68486729
68496730   /* normalize parameters */
68506731   param_normalize_3(drcbe, inst, &dstp, PTYPE_MF, &src1p, PTYPE_MF, &src2p, PTYPE_MF);
r2844r2845
68886769
68896770   /* validate instruction */
68906771   assert(inst->size == 4 || inst->size == 8);
6891   assert(inst->condflags == DRCUML_COND_ALWAYS);
6772   assert_no_condition(inst);
6773   assert_no_flags(inst);
68926774
68936775   /* normalize parameters */
68946776   param_normalize_2(drcbe, inst, &dstp, PTYPE_MF, &srcp, PTYPE_MF);
r2844r2845
69326814
69336815   /* validate instruction */
69346816   assert(inst->size == 4 || inst->size == 8);
6935   assert(inst->condflags == DRCUML_COND_ALWAYS);
6817   assert_no_condition(inst);
6818   assert_no_flags(inst);
69366819
69376820   /* normalize parameters */
69386821   param_normalize_2(drcbe, inst, &dstp, PTYPE_MF, &srcp, PTYPE_MF);
r2844r2845
69706853
69716854   /* validate instruction */
69726855   assert(inst->size == 4 || inst->size == 8);
6973   assert(inst->condflags == DRCUML_COND_ALWAYS);
6856   assert_no_condition(inst);
6857   assert_no_flags(inst);
69746858
69756859   /* normalize parameters */
69766860   param_normalize_2(drcbe, inst, &dstp, PTYPE_MF, &srcp, PTYPE_MF);
r2844r2845
70126896
70136897   /* validate instruction */
70146898   assert(inst->size == 4 || inst->size == 8);
7015   assert(inst->condflags == DRCUML_COND_ALWAYS);
6899   assert_no_condition(inst);
6900   assert_no_flags(inst);
70166901
70176902   /* normalize parameters */
70186903   param_normalize_2(drcbe, inst, &dstp, PTYPE_MF, &srcp, PTYPE_MF);
r2844r2845
70566941
70576942   /* validate instruction */
70586943   assert(inst->size == 4 || inst->size == 8);
7059   assert(inst->condflags == DRCUML_COND_ALWAYS);
6944   assert_no_condition(inst);
6945   assert_no_flags(inst);
70606946
70616947   /* normalize parameters */
70626948   param_normalize_2(drcbe, inst, &dstp, PTYPE_MF, &srcp, PTYPE_MF);
src/emu/cpu/drcbec.c
r2844r2845
114114*/
115115
116116/* build a short opcode from the raw opcode and size */
117#define MAKE_OPCODE_SHORT(op, size, condflags) \
118   ((((size) == 8) << 0) | (((condflags) != 0) << 1) | ((op) << 2))
117#define MAKE_OPCODE_SHORT(op, size, conditionorflags) \
118   ((((size) == 8) << 0) | (((conditionorflags) != 0) << 1) | ((op) << 2))
119119
120120/* build a full opcode from the raw opcode, size, condition/flags, and immediate count */
121#define MAKE_OPCODE_FULL(op, size, condflags, pwords) \
122   (MAKE_OPCODE_SHORT(op, size, condflags) | ((condflags & 0x80) ? (0x1000 << ((condflags) & 15)) : 0) | ((pwords) << 28))
121#define MAKE_OPCODE_FULL(op, size, condition, flags, pwords) \
122   (MAKE_OPCODE_SHORT(op, size, (condition | flags)) | ((condition != DRCUML_COND_ALWAYS) ? (0x1000 << ((condition) & 15)) : 0) | ((pwords) << 28))
123123
124124/* extract various parts of the opcode */
125125#define OPCODE_GET_SHORT(op)      ((op) & 0xfff)
r2844r2845
415415            drclabel_set_codeptr(drcbe->labels, inst->param[0].value, (drccodeptr)dst);
416416            break;
417417
418         /* ignore COMMENT opcodes */
418         /* ignore COMMENT and NOP opcodes */
419419         case DRCUML_OP_COMMENT:
420         case DRCUML_OP_NOP:
420421            break;
421422
422423         /* when we hit a MAPVAR opcode, log the change for the current PC */
r2844r2845
431432         case DRCUML_OP_JMP:
432433            assert(inst->numparams == 1);
433434            assert(inst->param[0].type == DRCUML_PTYPE_IMMEDIATE);
434            (dst++)->i = MAKE_OPCODE_FULL(opcode, inst->size, inst->condflags, 1);
435            (dst++)->i = MAKE_OPCODE_FULL(opcode, inst->size, inst->condition, inst->flags, 1);
435436            dst->inst = (drcbec_instruction *)drclabel_get_codeptr(drcbe->labels, inst->param[0].value, fixup_label, dst);
436437            dst++;
437438            break;
r2844r2845
501502            immedwords = (immedbytes + sizeof(drcbec_instruction) - 1) / sizeof(drcbec_instruction);
502503
503504            /* first item is the opcode, size, condition flags and length */
504            (dst++)->i = MAKE_OPCODE_FULL(opcode, inst->size, inst->condflags, inst->numparams + immedwords);
505            (dst++)->i = MAKE_OPCODE_FULL(opcode, inst->size, inst->condition, inst->flags, inst->numparams + immedwords);
505506
506507            /* immediates start after parameters */
507508            immed = dst + inst->numparams;
r2844r2845
700701            break;
701702
702703         case MAKE_OPCODE_SHORT(DRCUML_OP_GETFLGS, 4, 0):   /* GETFLGS dst[,f]                */
703         case MAKE_OPCODE_SHORT(DRCUML_OP_GETFLGS, 4, 1):   /* GETFLGS dst[,f]                */
704            PARAM0 = flags;
704            PARAM0 = flags & PARAM1;
705705            break;
706706
707707         case MAKE_OPCODE_SHORT(DRCUML_OP_SAVE, 4, 0):      /* SAVE    dst                    */
r2844r2845
793793            (*active_address_space[PARAM3 / 16].accessors->write_dword_masked)(PARAM0, PARAM1, PARAM2);
794794            break;
795795
796         case MAKE_OPCODE_SHORT(DRCUML_OP_CARRY, 4, 0):      /* CARRY   src,bitnum             */
796         case MAKE_OPCODE_SHORT(DRCUML_OP_CARRY, 4, 1):      /* CARRY   src,bitnum             */
797797            flags = (flags & ~DRCUML_FLAG_C) | ((PARAM0 >> (PARAM1 & 31)) & DRCUML_FLAG_C);
798798            break;
799799
r2844r2845
814814            PARAM0 = (INT8)PARAM1;
815815            break;
816816
817         case MAKE_OPCODE_SHORT(DRCUML_OP_SEXT1, 4, 1):
818            temp32 = (INT8)PARAM1;
819            flags = FLAGS32_NZ(temp32);
820            PARAM0 = temp32;
821            break;
822
817823         case MAKE_OPCODE_SHORT(DRCUML_OP_SEXT2, 4, 0):      /* SEXT2   dst,src                */
818824            PARAM0 = (INT16)PARAM1;
819825            break;
820826
827         case MAKE_OPCODE_SHORT(DRCUML_OP_SEXT2, 4, 1):
828            temp32 = (INT16)PARAM1;
829            flags = FLAGS32_NZ(temp32);
830            PARAM0 = temp32;
831            break;
832
821833         case MAKE_OPCODE_SHORT(DRCUML_OP_ROLAND, 4, 0):      /* ROLAND  dst,src,count,mask[,f] */
822834            shift = PARAM2 & 31;
823835            PARAM0 = ((PARAM1 << shift) | (PARAM1 >> (32 - shift))) & PARAM3;
824836            break;
825837
838         case MAKE_OPCODE_SHORT(DRCUML_OP_ROLAND, 4, 1):
839            shift = PARAM2 & 31;
840            temp32 = ((PARAM1 << shift) | (PARAM1 >> (32 - shift))) & PARAM3;
841            flags = FLAGS32_NZ(temp32);
842            PARAM0 = temp32;
843            break;
844
826845         case MAKE_OPCODE_SHORT(DRCUML_OP_ROLINS, 4, 0):      /* ROLINS  dst,src,count,mask[,f] */
827846            shift = PARAM2 & 31;
828847            PARAM0 = (PARAM0 & ~PARAM3) | (((PARAM1 << shift) | (PARAM1 >> (32 - shift))) & PARAM3);
829848            break;
830849
850         case MAKE_OPCODE_SHORT(DRCUML_OP_ROLINS, 4, 1):
851            shift = PARAM2 & 31;
852            temp32 = (PARAM0 & ~PARAM3) | (((PARAM1 << shift) | (PARAM1 >> (32 - shift))) & PARAM3);
853            flags = FLAGS32_NZ(temp32);
854            PARAM0 = temp32;
855            break;
856
831857         case MAKE_OPCODE_SHORT(DRCUML_OP_ADD, 4, 0):      /* ADD     dst,src1,src2[,f]      */
832858            PARAM0 = PARAM1 + PARAM2;
833859            break;
r2844r2845
9821008            PARAM0 = count_leading_zeros(PARAM1);
9831009            break;
9841010
1011         case MAKE_OPCODE_SHORT(DRCUML_OP_LZCNT, 4, 1):
1012            temp32 = count_leading_zeros(PARAM1);
1013            flags = FLAGS32_NZ(temp32);
1014            PARAM0 = temp32;
1015            break;
1016
9851017         case MAKE_OPCODE_SHORT(DRCUML_OP_BSWAP, 4, 0):      /* BSWAP   dst,src                */
9861018            temp32 = PARAM1;
9871019            PARAM0 = FLIPENDIAN_INT32(temp32);
9881020            break;
9891021
1022         case MAKE_OPCODE_SHORT(DRCUML_OP_BSWAP, 4, 1):
1023            temp32 = PARAM1;
1024            flags = FLAGS32_NZ(temp32);
1025            PARAM0 = FLIPENDIAN_INT32(temp32);
1026            break;
1027
9901028         case MAKE_OPCODE_SHORT(DRCUML_OP_SHL, 4, 0):      /* SHL     dst,src,count[,f]      */
9911029            PARAM0 = PARAM1 << (PARAM2 & 31);
9921030            break;
r2844r2845
12151253            DPARAM0 = (INT8)PARAM1;
12161254            break;
12171255
1256         case MAKE_OPCODE_SHORT(DRCUML_OP_SEXT1, 8, 1):
1257            temp64 = (INT8)PARAM1;
1258            flags = FLAGS64_NZ(temp64);
1259            DPARAM0 = temp64;
1260            break;
1261
12181262         case MAKE_OPCODE_SHORT(DRCUML_OP_SEXT2, 8, 0):      /* DSEXT   dst,src,WORD           */
12191263            DPARAM0 = (INT16)PARAM1;
12201264            break;
12211265
1266         case MAKE_OPCODE_SHORT(DRCUML_OP_SEXT2, 8, 1):
1267            temp64 = (INT16)PARAM1;
1268            flags = FLAGS64_NZ(temp64);
1269            DPARAM0 = temp64;
1270            break;
1271
12221272         case MAKE_OPCODE_SHORT(DRCUML_OP_SEXT4, 8, 0):      /* DSEXT   dst,src,DWORD          */
12231273            DPARAM0 = (INT32)PARAM1;
12241274            break;
12251275
1276         case MAKE_OPCODE_SHORT(DRCUML_OP_SEXT4, 8, 1):
1277            temp64 = (INT32)PARAM1;
1278            flags = FLAGS64_NZ(temp64);
1279            DPARAM0 = temp64;
1280            break;
1281
12261282         case MAKE_OPCODE_SHORT(DRCUML_OP_ROLAND, 8, 0):      /* DROLAND dst,src,count,mask[,f] */
12271283            shift = DPARAM2 & 63;
12281284            DPARAM0 = ((DPARAM1 << shift) | (DPARAM1 >> (64 - shift))) & DPARAM3;
12291285            break;
12301286
1287         case MAKE_OPCODE_SHORT(DRCUML_OP_ROLAND, 8, 1):
1288            shift = DPARAM2 & 63;
1289            temp64 = ((DPARAM1 << shift) | (DPARAM1 >> (64 - shift))) & DPARAM3;
1290            flags = FLAGS64_NZ(temp64);
1291            DPARAM0 = temp64;
1292            break;
1293
12311294         case MAKE_OPCODE_SHORT(DRCUML_OP_ROLINS, 8, 0):      /* DROLINS dst,src,count,mask[,f] */
12321295            shift = DPARAM2 & 63;
12331296            DPARAM0 = (DPARAM0 & ~DPARAM3) | (((DPARAM1 << shift) | (DPARAM1 >> (64 - shift))) & DPARAM3);
12341297            break;
12351298
1299         case MAKE_OPCODE_SHORT(DRCUML_OP_ROLINS, 8, 1):
1300            shift = DPARAM2 & 63;
1301            temp64 = (DPARAM0 & ~DPARAM3) | (((DPARAM1 << shift) | (DPARAM1 >> (64 - shift))) & DPARAM3);
1302            flags = FLAGS64_NZ(temp64);
1303            DPARAM0 = temp64;
1304            break;
1305
12361306         case MAKE_OPCODE_SHORT(DRCUML_OP_ADD, 8, 0):      /* DADD    dst,src1,src2[,f]      */
12371307            DPARAM0 = DPARAM1 + DPARAM2;
12381308            break;
r2844r2845
13801450               DPARAM0 = 32 + count_leading_zeros(DPARAM1);
13811451            break;
13821452
1453         case MAKE_OPCODE_SHORT(DRCUML_OP_LZCNT, 8, 1):
1454            if ((UINT32)(DPARAM1 >> 32) != 0)
1455               temp64 = count_leading_zeros(DPARAM1 >> 32);
1456            else
1457               temp64 = 32 + count_leading_zeros(DPARAM1);
1458            flags = FLAGS64_NZ(temp64);
1459            DPARAM0 = temp64;
1460            break;
1461
13831462         case MAKE_OPCODE_SHORT(DRCUML_OP_BSWAP, 8, 0):      /* DBSWAP  dst,src                */
13841463            temp64 = DPARAM1;
13851464            DPARAM0 = FLIPENDIAN_INT64(temp64);
13861465            break;
13871466
1467         case MAKE_OPCODE_SHORT(DRCUML_OP_BSWAP, 8, 1):
1468            temp64 = DPARAM1;
1469            flags = FLAGS64_NZ(temp64);
1470            DPARAM0 = FLIPENDIAN_INT64(temp64);
1471            break;
1472
13881473         case MAKE_OPCODE_SHORT(DRCUML_OP_SHL, 8, 0):      /* DSHL    dst,src,count[,f]      */
13891474            DPARAM0 = DPARAM1 << (DPARAM2 & 63);
13901475            break;
src/emu/cpu/cop400/410ops.c
r2844r2845
915915
916916   EN = y;
917917
918   if (!BIT(EN, 2))
918   if (BIT(EN, 2))
919919   {
920      OUT_L(0);
920      OUT_L(Q);
921921   }
922922}
923923
src/emu/cpu/cop400/420ops.c
r2844r2845
1717
1818#include "410ops.c"
1919
20#define IN_IN()         IN(COP400_PORT_IN)
20#define IN_IN()         (R.IN_mask ? IN(COP400_PORT_IN) : 0)
2121
2222/* Arithmetic Instructions */
2323
r2844r2845
245245
246246/*
247247
248    Processor:          COP421
249
250    Mnemonic:           INIL
251
252    Hex Code:           33 29
253    Binary:
254
255    Data Flow:          "0",CKO,"0","0" -> A
256
257    Description:        Input CKO to A
258
259*/
260
261INSTRUCTION(cop421_inil)
262{
263   A = IN_CKO() << 2;
264}
265
266/*
267
268248    Mnemonic:           OGI
269249
270250    Operand:            y
src/emu/cpu/cop400/cop420.c
r2844r2845
1414    TODO:
1515
1616    - when is the microbus int cleared?
17    - CKO sync input
18    - save internal RAM when CKO is RAM power supply pin
1719    - run interrupt test suite
1820    - run production test suite
1921    - run microbus test suite
r2844r2845
5759   UINT16   counter;
5860   UINT8   G_mask;
5961   UINT8   D_mask;
62   UINT8   IN_mask;
6063   UINT4   IL;
6164   UINT4   in[4];
6265   UINT8   si;
r2844r2845
227230static TIMER_CALLBACK(cop420_counter_tick)
228231{
229232   cpuintrf_push_context(param);
233
230234   R.counter++;
231235
232236   if (R.counter == 1024)
r2844r2845
234238      R.counter = 0;
235239      R.timerlatch = 1;
236240   }
241
237242   cpuintrf_pop_context();
238243}
239244
r2844r2845
245250   int i;
246251
247252   cpuintrf_push_context(param);
253
248254   in = IN_IN();
249255   for (i = 0; i < 4; i++)
250256   {
r2844r2845
255261         IL |= (1 << i);
256262      }
257263   }
264
258265   cpuintrf_pop_context();
259266}
260267
r2844r2845
265272   UINT8 in;
266273
267274   cpuintrf_push_context(param);
275
268276   in = IN_IN();
277
269278   if (!BIT(in, 2))
270279   {
271280      // chip select
r2844r2845
287296         R.microbus_int = 0;
288297      }
289298   }
299
290300   cpuintrf_pop_context();
291301}
292302
r2844r2845
305315
306316   /* set output pin masks */
307317
308   R.G_mask = 0x0f;
309   R.D_mask = 0x0f;
318   R.G_mask = 0x0f;   // G0-G3 available
319   R.D_mask = 0x0f;   // D0-D3 available
320   R.IN_mask = 0x0f;   // IN0-IN3 available
310321
311322   /* set clock divider */
312323
r2844r2845
375386   state_save_register_item("cop420", index, R.counter);
376387   state_save_register_item("cop420", index, R.G_mask);
377388   state_save_register_item("cop420", index, R.D_mask);
389   state_save_register_item("cop420", index, R.IN_mask);
378390   state_save_register_item("cop420", index, R.si);
379391   state_save_register_item("cop420", index, R.last_skip);
380392   state_save_register_item_array("cop420", index, R.in);
r2844r2845
382394   state_save_register_item("cop420", index, R.halt);
383395}
384396
397static void cop421_init(int index, int clock, const void *config, int (*irqcallback)(int))
398{
399   cop420_init(index, clock, config, irqcallback);
400
401   /* microbus option is not available */
402
403   assert(R.intf->microbus != COP400_MICROBUS_ENABLED);
404
405   /* set output pin masks */
406
407   R.IN_mask = 0; // IN lines not available
408}
409
385410static void cop422_init(int index, int clock, const void *config, int (*irqcallback)(int))
386411{
387412   cop420_init(index, clock, config, irqcallback);
388413
414   /* microbus option is not available */
415
416   assert(R.intf->microbus != COP400_MICROBUS_ENABLED);
417
418   /* set output pin masks */
419
389420   R.G_mask = 0x0e; // only G2, G3 available
390421   R.D_mask = 0x0e; // only D2, D3 available
422   R.IN_mask = 0; // IN lines not available
391423}
392424
393425/****************************************************************************
r2844r2845
652684
653685   switch (state)
654686   {
687      /* --- the following bits of info are returned as pointers to data or functions --- */
688      case CPUINFO_PTR_INIT:                     info->init = cop421_init;            break;
689
655690      /* --- the following bits of info are returned as NULL-terminated strings --- */
656691      case CPUINFO_STR_NAME:                     strcpy(info->s, "COP421");            break;
657692      case CPUINFO_STR_CORE_FAMILY:               strcpy(info->s, "National Semiconductor COPS"); break;
658693
659      default: cop410_get_info(state, info); break;
694      default: cop420_get_info(state, info); break;
660695   }
661696}
662697
663698void cop422_get_info(UINT32 state, cpuinfo *info)
664699{
665   // COP422 is a 20-pin package version of the COP420, lacking the IN ports
700   // COP422 is a 20-pin package version of the COP420, lacking G0/G1, D0/D1, and the IN ports
666701
667702   switch (state)
668703   {
r2844r2845
673708      case CPUINFO_STR_NAME:                     strcpy(info->s, "COP422");            break;
674709      case CPUINFO_STR_CORE_FAMILY:               strcpy(info->s, "National Semiconductor COPS"); break;
675710
676      default: cop410_get_info(state, info); break;
711      default: cop420_get_info(state, info); break;
677712   }
678713}
679714
src/emu/cpu/cop400/cop400.h
r2844r2845
3939enum _cop400_cki_bond {
4040   COP400_CKI_DIVISOR_4 = 4,
4141   COP400_CKI_DIVISOR_8 = 8,
42   COP400_CKI_DIVISOR_16 = 16
42   COP400_CKI_DIVISOR_16 = 16,
43   COP400_CKI_DIVISOR_32 = 32
4344};
4445
4546typedef enum _cop400_cko_bond cop400_cko_bond;
4647enum _cop400_cko_bond {
4748   COP400_CKO_OSCILLATOR_OUTPUT = 0,
49   COP400_CKO_RAM_POWER_SUPPLY,
4850   COP400_CKO_HALT_IO_PORT,
51   COP400_CKO_SYNC_INPUT,
4952   COP400_CKO_GENERAL_PURPOSE_INPUT
5053};
5154
src/emu/cpu/i8085/i8085cpu.h
r2844r2845
3636#define ADDR_RST75      0x003c
3737#define ADDR_INTR       0x0038
3838
39#define M_INR(R) ++R; I.AF.b.l=(I.AF.b.l&CF)|ZS[R]|((R==0x80)?VF:0)|((R&0x0F)?0:HF)
40#define M_DCR(R) I.AF.b.l=(I.AF.b.l&CF)|NF|((R==0x80)?VF:0)|((R&0x0F)?0:HF); I.AF.b.l|=ZS[--R]
39#define M_INR(R) {UINT8 hc = ((R & 0x0f) == 0x0f) ? HF : 0; ++R; I.AF.b.l= (I.AF.b.l & CF ) | ZSP[R] | hc; }
40#define M_DCR(R) {UINT8 hc = ((R & 0x0f) == 0x00) ? HF : 0; --R; I.AF.b.l= (I.AF.b.l & CF ) | ZSP[R] | hc | NF; }
4141#define M_MVI(R) R=ARG()
4242
43#define M_ANA(R) I.AF.b.h&=R; I.AF.b.l=ZSP[I.AF.b.h]|HF
43#define M_ANA(R) { int i = ((I.AF.b.h | R)>>3)&1 * HF; I.AF.b.h&=R; I.AF.b.l=ZSP[I.AF.b.h]; if( I.cputype ) { I.AF.b.l |= HF; } else {I.AF.b.l |= i; } }
4444#define M_ORA(R) I.AF.b.h|=R; I.AF.b.l=ZSP[I.AF.b.h]
4545#define M_XRA(R) I.AF.b.h^=R; I.AF.b.l=ZSP[I.AF.b.h]
4646
4747#define M_RLC {                                     \
4848   I.AF.b.h = (I.AF.b.h << 1) | (I.AF.b.h >> 7);            \
49   I.AF.b.l = (I.AF.b.l & ~(HF+NF+CF)) | (I.AF.b.h & CF);      \
49   I.AF.b.l = (I.AF.b.l & 0xfe) | (I.AF.b.h & CF);            \
5050}
5151
5252#define M_RRC {                                     \
53   I.AF.b.l = (I.AF.b.l & ~(HF+NF+CF)) | (I.AF.b.h & CF);      \
53   I.AF.b.l = (I.AF.b.l & 0xfe) | (I.AF.b.h & CF);            \
5454   I.AF.b.h = (I.AF.b.h >> 1) | (I.AF.b.h << 7);            \
5555}
5656
5757#define M_RAL {                                     \
5858   int c = I.AF.b.l&CF;                              \
59   I.AF.b.l = (I.AF.b.l & ~(HF+NF+CF)) | (I.AF.b.h >> 7);      \
59   I.AF.b.l = (I.AF.b.l & 0xfe) | (I.AF.b.h >> 7);            \
6060   I.AF.b.h = (I.AF.b.h << 1) | c;                      \
6161}
6262
6363#define M_RAR {                                     \
6464   int c = (I.AF.b.l&CF) << 7;                         \
65   I.AF.b.l = (I.AF.b.l & ~(HF+NF+CF)) | (I.AF.b.h & CF);      \
65   I.AF.b.l = (I.AF.b.l & 0xfe) | (I.AF.b.h & CF);            \
6666   I.AF.b.h = (I.AF.b.h >> 1) | c;                      \
6767}
6868
r2844r2845
141141   }                                             \
142142}
143143
144// On 8085 jump if condition is not satisfied is shorter
144145#define M_JMP(cc) {                                  \
145146   if (cc) {                                       \
146      i8085_ICount -= 3;                              \
147147      I.PC.w.l = ARG16();                            \
148      change_pc(I.PC.d);                           \
149   } else I.PC.w.l += 2;                              \
148      change_pc(I.PC.d);                              \
149   } else {                                       \
150      I.PC.w.l += 2;                                 \
151      i8085_ICount += (I.cputype) ? 3 : 0;               \
152   }                                             \
150153}
151154
155// On 8085 call if condition is not satisfied is 9 ticks
152156#define M_CALL(cc)                                    \
153157{                                                \
154158   if (cc)                                        \
155159   {                                             \
156160      UINT16 a = ARG16();                            \
157      i8085_ICount -= 6;                              \
161      i8085_ICount -= (I.cputype) ? 7 : 6 ;               \
158162      M_PUSH(PC);                                  \
159163      I.PC.d = a;                                  \
160      change_pc(I.PC.d);                           \
161   } else I.PC.w.l += 2;                              \
164      change_pc(I.PC.d);                              \
165   } else {                                       \
166      I.PC.w.l += 2;                                 \
167      i8085_ICount += (I.cputype) ? 2 : 0;               \
168   }                                             \
162169}
163170
164171#define M_RST(nn) {                                  \
src/emu/cpu/i8085/i8085.c
r2844r2845
116116 *
117117 * - Removed archaic i8080_EXACT flag.
118118 *
119 * 08-June-2008 Miodrag Milanovic
120 *
121 * - Flag setting fix for some instructions and cycle count update
122 *
119123 *****************************************************************************/
120124
121125/*int survival_prot = 0; */
r2844r2845
196200      case 0x02: i8085_ICount -= 7;   /* STAX B */
197201         WM(I.BC.d, I.AF.b.h);
198202         break;
199      case 0x03: i8085_ICount -= 5;   /* INX  B */
203      case 0x03: i8085_ICount -= (I.cputype) ? 6 : 5;   /* INX  B */
200204         I.BC.w.l++;
201         if (I.BC.b.l == 0x00) I.AF.b.l |= XF; else I.AF.b.l &= ~XF;
205         if( I.cputype )
206         {
207            if (I.BC.b.l == 0x00) I.AF.b.l |= XF; else I.AF.b.l &= ~XF;
208         }
202209         break;
203      case 0x04: i8085_ICount -= 5;   /* INR  B */
210      case 0x04: i8085_ICount -= (I.cputype) ? 4 : 5;   /* INR  B */
204211         M_INR(I.BC.b.h);
205212         break;
206      case 0x05: i8085_ICount -= 5;   /* DCR  B */
213      case 0x05: i8085_ICount -= (I.cputype) ? 4 : 5;   /* DCR  B */
207214         M_DCR(I.BC.b.h);
208215         break;
209216      case 0x06: i8085_ICount -= 7;   /* MVI  B,nn */
r2844r2845
227234      case 0x0a: i8085_ICount -= 7;   /* LDAX B */
228235         I.AF.b.h = RM(I.BC.d);
229236         break;
230      case 0x0b: i8085_ICount -= 5;   /* DCX  B */
237      case 0x0b: i8085_ICount -= (I.cputype) ? 6 : 5;   /* DCX  B */
231238         I.BC.w.l--;
232         if (I.BC.b.l == 0xff) I.AF.b.l |= XF; else I.AF.b.l &= ~XF;
239         if( I.cputype )
240         {
241            if (I.BC.b.l == 0xff) I.AF.b.l |= XF; else I.AF.b.l &= ~XF;
242         }
233243         break;
234      case 0x0c: i8085_ICount -= 5;   /* INR  C */
244      case 0x0c: i8085_ICount -= (I.cputype) ? 4 : 5;   /* INR  C */
235245         M_INR(I.BC.b.l);
236246         break;
237      case 0x0d: i8085_ICount -= 5;   /* DCR  C */
247      case 0x0d: i8085_ICount -= (I.cputype) ? 4 : 5;   /* DCR  C */
238248         M_DCR(I.BC.b.l);
239249         break;
240250      case 0x0e: i8085_ICount -= 7;   /* MVI  C,nn */
r2844r2845
259269      case 0x12: i8085_ICount -= 7;   /* STAX D */
260270         WM(I.DE.d, I.AF.b.h);
261271         break;
262      case 0x13: i8085_ICount -= 5;   /* INX  D */
272      case 0x13: i8085_ICount -= (I.cputype) ? 6 : 5;   /* INX  D */
263273         I.DE.w.l++;
264         if (I.DE.b.l == 0x00) I.AF.b.l |= XF; else I.AF.b.l &= ~XF;
274         if( I.cputype )
275         {
276            if (I.DE.b.l == 0x00) I.AF.b.l |= XF; else I.AF.b.l &= ~XF;
277         }
265278         break;
266      case 0x14: i8085_ICount -= 5;   /* INR  D */
279      case 0x14: i8085_ICount -= (I.cputype) ? 4 : 5;   /* INR  D */
267280         M_INR(I.DE.b.h);
268281         break;
269      case 0x15: i8085_ICount -= 5;   /* DCR  D */
282      case 0x15: i8085_ICount -= (I.cputype) ? 4 : 5;   /* DCR  D */
270283         M_DCR(I.DE.b.h);
271284         break;
272285      case 0x16: i8085_ICount -= 7;   /* MVI  D,nn */
r2844r2845
293306      case 0x1a: i8085_ICount -= 7;   /* LDAX D */
294307         I.AF.b.h = RM(I.DE.d);
295308         break;
296      case 0x1b: i8085_ICount -= 5;   /* DCX  D */
309      case 0x1b: i8085_ICount -= (I.cputype) ? 6 : 5;   /* DCX  D */
297310         I.DE.w.l--;
298         if (I.DE.b.l == 0xff) I.AF.b.l |= XF; else I.AF.b.l &= ~XF;
311         if( I.cputype )
312         {
313            if (I.DE.b.l == 0xff) I.AF.b.l |= XF; else I.AF.b.l &= ~XF;
314         }
299315         break;
300      case 0x1c: i8085_ICount -= 5;   /* INR  E */
316      case 0x1c: i8085_ICount -= (I.cputype) ? 4 : 5;   /* INR  E */
301317         M_INR(I.DE.b.l);
302318         break;
303      case 0x1d: i8085_ICount -= 5;   /* DCR  E */
319      case 0x1d: i8085_ICount -= (I.cputype) ? 4 : 5;   /* DCR  E */
304320         M_DCR(I.DE.b.l);
305321         break;
306322      case 0x1e: i8085_ICount -= 7;   /* MVI  E,nn */
r2844r2845
330346         I.XX.w.l++;
331347         WM(I.XX.d, I.HL.b.h);
332348         break;
333      case 0x23: i8085_ICount -= 5;   /* INX  H */
349      case 0x23: i8085_ICount -= (I.cputype) ? 6 : 5;   /* INX  H */
334350         I.HL.w.l++;
335         if (I.HL.b.l == 0x00) I.AF.b.l |= XF; else I.AF.b.l &= ~XF;
351         if( I.cputype )
352         {
353            if (I.HL.b.l == 0x00) I.AF.b.l |= XF; else I.AF.b.l &= ~XF;
354         }
336355         break;
337      case 0x24: i8085_ICount -= 5;   /* INR  H */
356      case 0x24: i8085_ICount -= (I.cputype) ? 4 : 5;   /* INR  H */
338357         M_INR(I.HL.b.h);
339358         break;
340      case 0x25: i8085_ICount -= 5;   /* DCR  H */
359      case 0x25: i8085_ICount -= (I.cputype) ? 4 : 5;   /* DCR  H */
341360         M_DCR(I.HL.b.h);
342361         break;
343362      case 0x26: i8085_ICount -= 7;   /* MVI  H,nn */
r2844r2845
349368         if (I.AF.b.l & HF) I.XX.d |= 0x200;
350369         if (I.AF.b.l & NF) I.XX.d |= 0x400;
351370         I.AF.w.l = DAA[I.XX.d];
371         if( I.cputype==0 )
372         {
373            I.AF.b.l &= 0xd5; // Ignore not used flags
374         }
352375         break;
353376
354377      case 0x28:
r2844r2845
369392         I.XX.w.l++;
370393         I.HL.b.h = RM(I.XX.d);
371394         break;
372      case 0x2b: i8085_ICount -= 5;   /* DCX  H */
395      case 0x2b: i8085_ICount -= (I.cputype) ? 6 : 5;   /* DCX  H */
373396         I.HL.w.l--;
374         if (I.HL.b.l == 0xff) I.AF.b.l |= XF; else I.AF.b.l &= ~XF;
397         if( I.cputype )
398         {
399            if (I.HL.b.l == 0xff) I.AF.b.l |= XF; else I.AF.b.l &= ~XF;
400         }
375401         break;
376      case 0x2c: i8085_ICount -= 5;   /* INR  L */
402      case 0x2c: i8085_ICount -= (I.cputype) ? 4 : 5;   /* INR  L */
377403         M_INR(I.HL.b.l);
378404         break;
379      case 0x2d: i8085_ICount -= 5;   /* DCR  L */
405      case 0x2d: i8085_ICount -= (I.cputype) ? 4 : 5;   /* DCR  L */
380406         M_DCR(I.HL.b.l);
381407         break;
382408      case 0x2e: i8085_ICount -= 7;   /* MVI  L,nn */
r2844r2845
425451         I.XX.d = ARG16();
426452         WM(I.XX.d, I.AF.b.h);
427453         break;
428      case 0x33: i8085_ICount -= 5;   /* INX  SP */
454      case 0x33: i8085_ICount -= (I.cputype) ? 6 : 5;   /* INX  SP */
429455         I.SP.w.l++;
430         if (I.SP.b.l == 0x00) I.AF.b.l |= XF; else I.AF.b.l &= ~XF;
456         if( I.cputype )
457         {
458            if (I.SP.b.l == 0x00) I.AF.b.l |= XF; else I.AF.b.l &= ~XF;
459         }
431460         break;
432461      case 0x34: i8085_ICount -= 10;   /* INR  M */
433462         I.XX.b.l = RM(I.HL.d);
r2844r2845
444473         WM(I.HL.d, I.XX.b.l);
445474         break;
446475      case 0x37: i8085_ICount -= 4;   /* STC  */
447         I.AF.b.l = (I.AF.b.l & ~(HF + NF)) | CF;
476         I.AF.b.l = (I.AF.b.l & 0xfe) | CF;
448477         break;
449478
450479      case 0x38:
r2844r2845
463492         I.XX.d = ARG16();
464493         I.AF.b.h = RM(I.XX.d);
465494         break;
466      case 0x3b: i8085_ICount -= 5;   /* DCX  SP */
495      case 0x3b: i8085_ICount -= (I.cputype) ? 6 : 5;   /* DCX  SP */
467496         I.SP.w.l--;
468         if (I.SP.b.l == 0xff) I.AF.b.l |= XF; else I.AF.b.l &= ~XF;
497         if( I.cputype )
498         {
499            if (I.SP.b.l == 0xff) I.AF.b.l |= XF; else I.AF.b.l &= ~XF;
500         }
469501         break;
470      case 0x3c: i8085_ICount -= 5;   /* INR  A */
502      case 0x3c: i8085_ICount -= (I.cputype) ? 4 : 5;   /* INR  A */
471503         M_INR(I.AF.b.h);
472504         break;
473      case 0x3d: i8085_ICount -= 5;   /* DCR  A */
505      case 0x3d: i8085_ICount -= (I.cputype) ? 4 : 5;   /* DCR  A */
474506         M_DCR(I.AF.b.h);
475507         break;
476508      case 0x3e: i8085_ICount -= 7;   /* MVI  A,nn */
477509         M_MVI(I.AF.b.h);
478510         break;
479      case 0x3f: i8085_ICount -= 4;   /* CMF  */
480         I.AF.b.l = ((I.AF.b.l & ~(HF + NF)) |
481                  ((I.AF.b.l & CF) << 4)) ^ CF;
511      case 0x3f: i8085_ICount -= 4;   /* CMC  */
512         I.AF.b.l = (I.AF.b.l & 0xfe) | ((I.AF.b.l & CF)==1 ? 0 : 1);
482513         break;
483514
484      case 0x40: i8085_ICount -= 5;   /* MOV  B,B */
515      case 0x40: i8085_ICount -= (I.cputype) ? 4 : 5;   /* MOV  B,B */
485516         /* no op */
486517         break;
487      case 0x41: i8085_ICount -= 5;   /* MOV  B,C */
518      case 0x41: i8085_ICount -= (I.cputype) ? 4 : 5;   /* MOV  B,C */
488519         I.BC.b.h = I.BC.b.l;
489520         break;
490      case 0x42: i8085_ICount -= 5;   /* MOV  B,D */
521      case 0x42: i8085_ICount -= (I.cputype) ? 4 : 5;   /* MOV  B,D */
491522         I.BC.b.h = I.DE.b.h;
492523         break;
493      case 0x43: i8085_ICount -= 5;   /* MOV  B,E */
524      case 0x43: i8085_ICount -= (I.cputype) ? 4 : 5;   /* MOV  B,E */
494525         I.BC.b.h = I.DE.b.l;
495526         break;
496      case 0x44: i8085_ICount -= 5;   /* MOV  B,H */
527      case 0x44: i8085_ICount -= (I.cputype) ? 4 : 5;   /* MOV  B,H */
497528         I.BC.b.h = I.HL.b.h;
498529         break;
499      case 0x45: i8085_ICount -= 5;   /* MOV  B,L */
530      case 0x45: i8085_ICount -= (I.cputype) ? 4 : 5;   /* MOV  B,L */
500531         I.BC.b.h = I.HL.b.l;
501532         break;
502533      case 0x46: i8085_ICount -= 7;   /* MOV  B,M */
503534         I.BC.b.h = RM(I.HL.d);
504535         break;
505      case 0x47: i8085_ICount -= 5;   /* MOV  B,A */
536      case 0x47: i8085_ICount -= (I.cputype) ? 4 : 5;   /* MOV  B,A */
506537         I.BC.b.h = I.AF.b.h;
507538         break;
508539
509      case 0x48: i8085_ICount -= 5;   /* MOV  C,B */
540      case 0x48: i8085_ICount -= (I.cputype) ? 4 : 5;   /* MOV  C,B */
510541         I.BC.b.l = I.BC.b.h;
511542         break;
512      case 0x49: i8085_ICount -= 5;   /* MOV  C,C */
543      case 0x49: i8085_ICount -= (I.cputype) ? 4 : 5;   /* MOV  C,C */
513544         /* no op */
514545         break;
515      case 0x4a: i8085_ICount -= 5;   /* MOV  C,D */
546      case 0x4a: i8085_ICount -= (I.cputype) ? 4 : 5;   /* MOV  C,D */
516547         I.BC.b.l = I.DE.b.h;
517548         break;
518      case 0x4b: i8085_ICount -= 5;   /* MOV  C,E */
549      case 0x4b: i8085_ICount -= (I.cputype) ? 4 : 5;   /* MOV  C,E */
519550         I.BC.b.l = I.DE.b.l;
520551         break;
521      case 0x4c: i8085_ICount -= 5;   /* MOV  C,H */
552      case 0x4c: i8085_ICount -= (I.cputype) ? 4 : 5;   /* MOV  C,H */
522553         I.BC.b.l = I.HL.b.h;
523554         break;
524      case 0x4d: i8085_ICount -= 5;   /* MOV  C,L */
555      case 0x4d: i8085_ICount -= (I.cputype) ? 4 : 5;   /* MOV  C,L */
525556         I.BC.b.l = I.HL.b.l;
526557         break;
527558      case 0x4e: i8085_ICount -= 7;   /* MOV  C,M */
528559         I.BC.b.l = RM(I.HL.d);
529560         break;
530      case 0x4f: i8085_ICount -= 5;   /* MOV  C,A */
561      case 0x4f: i8085_ICount -= (I.cputype) ? 4 : 5;   /* MOV  C,A */
531562         I.BC.b.l = I.AF.b.h;
532563         break;
533564
534      case 0x50: i8085_ICount -= 5;   /* MOV  D,B */
565      case 0x50: i8085_ICount -= (I.cputype) ? 4 : 5;   /* MOV  D,B */
535566         I.DE.b.h = I.BC.b.h;
536567         break;
537      case 0x51: i8085_ICount -= 5;   /* MOV  D,C */
568      case 0x51: i8085_ICount -= (I.cputype) ? 4 : 5;   /* MOV  D,C */
538569         I.DE.b.h = I.BC.b.l;
539570         break;
540      case 0x52: i8085_ICount -= 5;   /* MOV  D,D */
571      case 0x52: i8085_ICount -= (I.cputype) ? 4 : 5;   /* MOV  D,D */
541572         /* no op */
542573         break;
543      case 0x53: i8085_ICount -= 5;   /* MOV  D,E */
574      case 0x53: i8085_ICount -= (I.cputype) ? 4 : 5;   /* MOV  D,E */
544575         I.DE.b.h = I.DE.b.l;
545576         break;
546      case 0x54: i8085_ICount -= 5;   /* MOV  D,H */
577      case 0x54: i8085_ICount -= (I.cputype) ? 4 : 5;   /* MOV  D,H */
547578         I.DE.b.h = I.HL.b.h;
548579         break;
549      case 0x55: i8085_ICount -= 5;   /* MOV  D,L */
580      case 0x55: i8085_ICount -= (I.cputype) ? 4 : 5;   /* MOV  D,L */
550581         I.DE.b.h = I.HL.b.l;
551582         break;
552583      case 0x56: i8085_ICount -= 7;   /* MOV  D,M */
553584         I.DE.b.h = RM(I.HL.d);
554585         break;
555      case 0x57: i8085_ICount -= 5;   /* MOV  D,A */
586      case 0x57: i8085_ICount -= (I.cputype) ? 4 : 5;   /* MOV  D,A */
556587         I.DE.b.h = I.AF.b.h;
557588         break;
558589
559      case 0x58: i8085_ICount -= 5;   /* MOV  E,B */
590      case 0x58: i8085_ICount -= (I.cputype) ? 4 : 5;   /* MOV  E,B */
560591         I.DE.b.l = I.BC.b.h;
561592         break;
562      case 0x59: i8085_ICount -= 5;   /* MOV  E,C */
593      case 0x59: i8085_ICount -= (I.cputype) ? 4 : 5;   /* MOV  E,C */
563594         I.DE.b.l = I.BC.b.l;
564595         break;
565      case 0x5a: i8085_ICount -= 5;   /* MOV  E,D */
596      case 0x5a: i8085_ICount -= (I.cputype) ? 4 : 5;   /* MOV  E,D */
566597         I.DE.b.l = I.DE.b.h;
567598         break;
568      case 0x5b: i8085_ICount -= 5;   /* MOV  E,E */
599      case 0x5b: i8085_ICount -= (I.cputype) ? 4 : 5;   /* MOV  E,E */
569600         /* no op */
570601         break;
571      case 0x5c: i8085_ICount -= 5;   /* MOV  E,H */
602      case 0x5c: i8085_ICount -= (I.cputype) ? 4 : 5;   /* MOV  E,H */
572603         I.DE.b.l = I.HL.b.h;
573604         break;
574      case 0x5d: i8085_ICount -= 5;   /* MOV  E,L */
605      case 0x5d: i8085_ICount -= (I.cputype) ? 4 : 5;   /* MOV  E,L */
575606         I.DE.b.l = I.HL.b.l;
576607         break;
577608      case 0x5e: i8085_ICount -= 7;   /* MOV  E,M */
578609         I.DE.b.l = RM(I.HL.d);
579610         break;
580      case 0x5f: i8085_ICount -= 5;   /* MOV  E,A */
611      case 0x5f: i8085_ICount -= (I.cputype) ? 4 : 5;   /* MOV  E,A */
581612         I.DE.b.l = I.AF.b.h;
582613         break;
583614
584      case 0x60: i8085_ICount -= 5;   /* MOV  H,B */
615      case 0x60: i8085_ICount -= (I.cputype) ? 4 : 5;   /* MOV  H,B */
585616         I.HL.b.h = I.BC.b.h;
586617         break;
587      case 0x61: i8085_ICount -= 5;   /* MOV  H,C */
618      case 0x61: i8085_ICount -= (I.cputype) ? 4 : 5;   /* MOV  H,C */
588619         I.HL.b.h = I.BC.b.l;
589620         break;
590      case 0x62: i8085_ICount -= 5;   /* MOV  H,D */
621      case 0x62: i8085_ICount -= (I.cputype) ? 4 : 5;   /* MOV  H,D */
591622         I.HL.b.h = I.DE.b.h;
592623         break;
593      case 0x63: i8085_ICount -= 5;   /* MOV  H,E */
624      case 0x63: i8085_ICount -= (I.cputype) ? 4 : 5;   /* MOV  H,E */
594625         I.HL.b.h = I.DE.b.l;
595626         break;
596      case 0x64: i8085_ICount -= 5;   /* MOV  H,H */
627      case 0x64: i8085_ICount -= (I.cputype) ? 4 : 5;   /* MOV  H,H */
597628         /* no op */
598629         break;
599      case 0x65: i8085_ICount -= 5;   /* MOV  H,L */
630      case 0x65: i8085_ICount -= (I.cputype) ? 4 : 5;   /* MOV  H,L */
600631         I.HL.b.h = I.HL.b.l;
601632         break;
602633      case 0x66: i8085_ICount -= 7;   /* MOV  H,M */
603634         I.HL.b.h = RM(I.HL.d);
604635         break;
605      case 0x67: i8085_ICount -= 5;   /* MOV  H,A */
636      case 0x67: i8085_ICount -= (I.cputype) ? 4 : 5;   /* MOV  H,A */
606637         I.HL.b.h = I.AF.b.h;
607638         break;
608639
609      case 0x68: i8085_ICount -= 5;   /* MOV  L,B */
640      case 0x68: i8085_ICount -= (I.cputype) ? 4 : 5;   /* MOV  L,B */
610641         I.HL.b.l = I.BC.b.h;
611642         break;
612      case 0x69: i8085_ICount -= 5;   /* MOV  L,C */
643      case 0x69: i8085_ICount -= (I.cputype) ? 4 : 5;   /* MOV  L,C */
613644         I.HL.b.l = I.BC.b.l;
614645         break;
615      case 0x6a: i8085_ICount -= 5;   /* MOV  L,D */
646      case 0x6a: i8085_ICount -= (I.cputype) ? 4 : 5;   /* MOV  L,D */
616647         I.HL.b.l = I.DE.b.h;
617648         break;
618      case 0x6b: i8085_ICount -= 5;   /* MOV  L,E */
649      case 0x6b: i8085_ICount -= (I.cputype) ? 4 : 5;   /* MOV  L,E */
619650         I.HL.b.l = I.DE.b.l;
620651         break;
621      case 0x6c: i8085_ICount -= 5;   /* MOV  L,H */
652      case 0x6c: i8085_ICount -= (I.cputype) ? 4 : 5;   /* MOV  L,H */
622653         I.HL.b.l = I.HL.b.h;
623654         break;
624      case 0x6d: i8085_ICount -= 5;   /* MOV  L,L */
655      case 0x6d: i8085_ICount -= (I.cputype) ? 4 : 5;   /* MOV  L,L */
625656         /* no op */
626657         break;
627658      case 0x6e: i8085_ICount -= 7;   /* MOV  L,M */
628659         I.HL.b.l = RM(I.HL.d);
629660         break;
630      case 0x6f: i8085_ICount -= 5;   /* MOV  L,A */
661      case 0x6f: i8085_ICount -= (I.cputype) ? 4 : 5;   /* MOV  L,A */
631662         I.HL.b.l = I.AF.b.h;
632663         break;
633664
r2844r2845
649680      case 0x75: i8085_ICount -= 7;   /* MOV  M,L */
650681         WM(I.HL.d, I.HL.b.l);
651682         break;
652      case 0x76: i8085_ICount -= 4;   /* HALT */
683      case 0x76: i8085_ICount -= (I.cputype) ? 5 : 7;   /* HLT */
653684         I.PC.w.l--;
654685         I.HALT = 1;
655686         if (i8085_ICount > 0) i8085_ICount = 0;
r2844r2845
658689         WM(I.HL.d, I.AF.b.h);
659690         break;
660691
661      case 0x78: i8085_ICount -= 5;   /* MOV  A,B */
692      case 0x78: i8085_ICount -= (I.cputype) ? 4 : 5;   /* MOV  A,B */
662693         I.AF.b.h = I.BC.b.h;
663694         break;
664      case 0x79: i8085_ICount -= 5;   /* MOV  A,C */
695      case 0x79: i8085_ICount -= (I.cputype) ? 4 : 5;   /* MOV  A,C */
665696         I.AF.b.h = I.BC.b.l;
666697         break;
667      case 0x7a: i8085_ICount -= 5;   /* MOV  A,D */
698      case 0x7a: i8085_ICount -= (I.cputype) ? 4 : 5;   /* MOV  A,D */
668699         I.AF.b.h = I.DE.b.h;
669700         break;
670      case 0x7b: i8085_ICount -= 5;   /* MOV  A,E */
701      case 0x7b: i8085_ICount -= (I.cputype) ? 4 : 5;   /* MOV  A,E */
671702         I.AF.b.h = I.DE.b.l;
672703         break;
673      case 0x7c: i8085_ICount -= 5;   /* MOV  A,H */
704      case 0x7c: i8085_ICount -= (I.cputype) ? 4 : 5;   /* MOV  A,H */
674705         I.AF.b.h = I.HL.b.h;
675706         break;
676      case 0x7d: i8085_ICount -= 5;   /* MOV  A,L */
707      case 0x7d: i8085_ICount -= (I.cputype) ? 4 : 5;   /* MOV  A,L */
677708         I.AF.b.h = I.HL.b.l;
678709         break;
679710      case 0x7e: i8085_ICount -= 7;   /* MOV  A,M */
680711         I.AF.b.h = RM(I.HL.d);
681712         break;
682      case 0x7f: i8085_ICount -= 5;   /* MOV  A,A */
713      case 0x7f: i8085_ICount -= (I.cputype) ? 4 : 5;   /* MOV  A,A */
683714         /* no op */
684715         break;
685716
r2844r2845
883914         M_CMP(I.AF.b.h);
884915         break;
885916
886      case 0xc0: i8085_ICount -= 5;   /* RNZ  */
917      case 0xc0: i8085_ICount -= (I.cputype) ? 6 : 5;   /* RNZ  */
887918         M_RET( !(I.AF.b.l & ZF) );
888919         break;
889920      case 0xc1: i8085_ICount -= 10;   /* POP  B */
890921         M_POP(BC);
891922         break;
892      case 0xc2: i8085_ICount -= 7;   /* JNZ  nnnn */
923      case 0xc2: i8085_ICount -= 10;   /* JNZ  nnnn */
893924         M_JMP( !(I.AF.b.l & ZF) );
894925         break;
895      case 0xc3: i8085_ICount -= 7;   /* JMP  nnnn */
926      case 0xc3: i8085_ICount -= 10;   /* JMP  nnnn */
896927         M_JMP(1);
897928         break;
898929      case 0xc4: i8085_ICount -= 11;   /* CNZ  nnnn */
899930         M_CALL( !(I.AF.b.l & ZF) );
900931         break;
901      case 0xc5: i8085_ICount -= 11;   /* PUSH B */
932      case 0xc5: i8085_ICount -= (I.cputype) ? 12 : 11;   /* PUSH B */
902933         M_PUSH(BC);
903934         break;
904935      case 0xc6: i8085_ICount -= 7;   /* ADI  nn */
905936         I.XX.b.l = ARG();
906937         M_ADD(I.XX.b.l);
907938            break;
908      case 0xc7: i8085_ICount -= 11;   /* RST  0 */
939      case 0xc7: i8085_ICount -= (I.cputype) ? 12 : 11;   /* RST  0 */
909940         M_RST(0);
910941         break;
911942
912      case 0xc8: i8085_ICount -= 5;   /* RZ   */
943      case 0xc8: i8085_ICount -= (I.cputype) ? 6 : 5;   /* RZ   */
913944         M_RET( I.AF.b.l & ZF );
914945         break;
915      case 0xc9: i8085_ICount -= 4;   /* RET  */
946      case 0xc9: i8085_ICount -= 10;   /* RET  */
916947         M_RET(1);
917948         break;
918      case 0xca: i8085_ICount -= 7;   /* JZ   nnnn */
949      case 0xca: i8085_ICount -= 10;   /* JZ   nnnn */
919950         M_JMP( I.AF.b.l & ZF );
920951         break;
921952      case 0xcb:
r2844r2845
927958               i8085_ICount -= 6;   /* RST  V */
928959            }
929960         } else {
930            i8085_ICount -= 7;   /* JMP  nnnn undocumented*/
961            i8085_ICount -= 10;   /* JMP  nnnn undocumented*/
931962            M_JMP(1);
932963         }
933964         break;
934965      case 0xcc: i8085_ICount -= 11;   /* CZ   nnnn */
935966         M_CALL( I.AF.b.l & ZF );
936967         break;
937      case 0xcd: i8085_ICount -= 11;   /* CALL nnnn */
968      case 0xcd: i8085_ICount -= 17;   /* CALL nnnn */
938969         M_CALL(1);
939970         break;
940971      case 0xce: i8085_ICount -= 7;   /* ACI  nn */
941972         I.XX.b.l = ARG();
942973         M_ADC(I.XX.b.l);
943974         break;
944      case 0xcf: i8085_ICount -= 11;   /* RST  1 */
975      case 0xcf: i8085_ICount -= (I.cputype) ? 12 : 11;   /* RST  1 */
945976         M_RST(1);
946977         break;
947978
948      case 0xd0: i8085_ICount -= 5;   /* RNC  */
979      case 0xd0: i8085_ICount -= (I.cputype) ? 6 : 5;   /* RNC  */
949980         M_RET( !(I.AF.b.l & CF) );
950981         break;
951982      case 0xd1: i8085_ICount -= 10;   /* POP  D */
952983         M_POP(DE);
953984         break;
954      case 0xd2: i8085_ICount -= 7;   /* JNC  nnnn */
985      case 0xd2: i8085_ICount -= 10;   /* JNC  nnnn */
955986         M_JMP( !(I.AF.b.l & CF) );
956987         break;
957988      case 0xd3: i8085_ICount -= 10;   /* OUT  nn */
r2844r2845
960991      case 0xd4: i8085_ICount -= 11;   /* CNC  nnnn */
961992         M_CALL( !(I.AF.b.l & CF) );
962993         break;
963      case 0xd5: i8085_ICount -= 11;   /* PUSH D */
994      case 0xd5: i8085_ICount -= (I.cputype) ? 12 : 11;   /* PUSH D */
964995         M_PUSH(DE);
965996         break;
966997      case 0xd6: i8085_ICount -= 7;   /* SUI  nn */
967998         I.XX.b.l = ARG();
968999         M_SUB(I.XX.b.l);
9691000         break;
970      case 0xd7: i8085_ICount -= 11;   /* RST  2 */
1001      case 0xd7: i8085_ICount -= (I.cputype) ? 12 : 11;   /* RST  2 */
9711002         M_RST(2);
9721003         break;
9731004
974      case 0xd8: i8085_ICount -= 5;   /* RC   */
1005      case 0xd8: i8085_ICount -= (I.cputype) ? 6 : 5;   /* RC   */
9751006         M_RET( I.AF.b.l & CF );
9761007         break;
9771008      case 0xd9:
r2844r2845
9821013            I.XX.w.l++;
9831014            WM(I.XX.d, I.HL.b.h);
9841015         } else {
985            i8085_ICount -= 4;   /* RET undocumented */
1016            i8085_ICount -= 10;   /* RET undocumented */
9861017            M_RET(1);
9871018         }
9881019         break;
989      case 0xda: i8085_ICount -= 7;   /* JC   nnnn */
1020      case 0xda: i8085_ICount -= 10;   /* JC   nnnn */
9901021         M_JMP( I.AF.b.l & CF );
9911022         break;
9921023      case 0xdb: i8085_ICount -= 10;   /* IN   nn */
r2844r2845
10001031            i8085_ICount -= 7;      /* JNX  nnnn */
10011032            M_JMP( !(I.AF.b.l & XF) );
10021033         } else {
1003            i8085_ICount -= 11;   /* CALL nnnn undocumented */
1034            i8085_ICount -= 17;   /* CALL nnnn undocumented */
10041035            M_CALL(1);
10051036         }
10061037         break;
r2844r2845
10081039         I.XX.b.l = ARG();
10091040         M_SBB(I.XX.b.l);
10101041         break;
1011      case 0xdf: i8085_ICount -= 11;   /* RST  3 */
1042      case 0xdf: i8085_ICount -= (I.cputype) ? 12 : 11;   /* RST  3 */
10121043         M_RST(3);
10131044         break;
10141045
1015      case 0xe0: i8085_ICount -= 5;   /* RPO    */
1046      case 0xe0: i8085_ICount -= (I.cputype) ? 6 : 5;   /* RPO    */
10161047         M_RET( !(I.AF.b.l & VF) );
10171048         break;
10181049      case 0xe1: i8085_ICount -= 10;   /* POP  H */
10191050         M_POP(HL);
10201051         break;
1021      case 0xe2: i8085_ICount -= 7;   /* JPO  nnnn */
1052      case 0xe2: i8085_ICount -= 10;   /* JPO  nnnn */
10221053         M_JMP( !(I.AF.b.l & VF) );
10231054         break;
1024      case 0xe3: i8085_ICount -= 18;   /* XTHL */
1055      case 0xe3: i8085_ICount -= (I.cputype) ? 16 : 18;   /* XTHL */
10251056         M_POP(XX);
10261057         M_PUSH(HL);
10271058         I.HL.d = I.XX.d;
r2844r2845
10291060      case 0xe4: i8085_ICount -= 11;   /* CPO  nnnn */
10301061         M_CALL( !(I.AF.b.l & VF) );
10311062         break;
1032      case 0xe5: i8085_ICount -= 11;   /* PUSH H */
1063      case 0xe5: i8085_ICount -= (I.cputype) ? 12 : 11;   /* PUSH H */
10331064         M_PUSH(HL);
10341065         break;
10351066      case 0xe6: i8085_ICount -= 7;   /* ANI  nn */
10361067         I.XX.b.l = ARG();
10371068         M_ANA(I.XX.b.l);
10381069         break;
1039      case 0xe7: i8085_ICount -= 11;   /* RST  4 */
1070      case 0xe7: i8085_ICount -= (I.cputype) ? 12 : 11;   /* RST  4 */
10401071         M_RST(4);
10411072         break;
10421073
1043      case 0xe8: i8085_ICount -= 5;   /* RPE  */
1074      case 0xe8: i8085_ICount -= (I.cputype) ? 6 : 5;   /* RPE  */
10441075         M_RET( I.AF.b.l & VF );
10451076         break;
1046      case 0xe9: i8085_ICount -= 5;   /* PCHL */
1077      case 0xe9: i8085_ICount -= (I.cputype) ? 6 : 5;   /* PCHL */
10471078         I.PC.d = I.HL.w.l;
10481079         change_pc(I.PC.d);
10491080         break;
1050      case 0xea: i8085_ICount -= 7;   /* JPE  nnnn */
1081      case 0xea: i8085_ICount -= 10;   /* JPE  nnnn */
10511082         M_JMP( I.AF.b.l & VF );
10521083         break;
1053      case 0xeb: i8085_ICount -= 4;   /* XCHG */
1084      case 0xeb: i8085_ICount -= 5;   /* XCHG */
10541085         I.XX.d = I.DE.d;
10551086         I.DE.d = I.HL.d;
10561087         I.HL.d = I.XX.d;
r2844r2845
10661097            I.XX.w.l++;
10671098            I.HL.b.h = RM(I.XX.d);
10681099         } else {
1069            i8085_ICount -= 11;   /* CALL nnnn undocumented */
1100            i8085_ICount -= 17;   /* CALL nnnn undocumented */
10701101            M_CALL(1);
10711102         }
10721103         break;
r2844r2845
10741105         I.XX.b.l = ARG();
10751106         M_XRA(I.XX.b.l);
10761107         break;
1077      case 0xef: i8085_ICount -= 11;   /* RST  5 */
1108      case 0xef: i8085_ICount -= (I.cputype) ? 12 : 11;   /* RST  5 */
10781109         M_RST(5);
10791110         break;
10801111
1081      case 0xf0: i8085_ICount -= 5;   /* RP   */
1112      case 0xf0: i8085_ICount -= (I.cputype) ? 6 : 5;   /* RP   */
10821113         M_RET( !(I.AF.b.l&SF) );
10831114         break;
10841115      case 0xf1: i8085_ICount -= 10;   /* POP  A */
10851116         M_POP(AF);
10861117         break;
1087      case 0xf2: i8085_ICount -= 7;   /* JP   nnnn */
1118      case 0xf2: i8085_ICount -= 10;   /* JP   nnnn */
10881119         M_JMP( !(I.AF.b.l & SF) );
10891120         break;
10901121      case 0xf3: i8085_ICount -= 4;   /* DI   */
r2844r2845
10941125      case 0xf4: i8085_ICount -= 11;   /* CP   nnnn */
10951126         M_CALL( !(I.AF.b.l & SF) );
10961127         break;
1097      case 0xf5: i8085_ICount -= 11;   /* PUSH A */
1128      case 0xf5: i8085_ICount -= (I.cputype) ? 12 : 11;   /* PUSH A */
10981129         M_PUSH(AF);
10991130         break;
11001131      case 0xf6: i8085_ICount -= 7;   /* ORI  nn */
11011132         I.XX.b.l = ARG();
11021133         M_ORA(I.XX.b.l);
11031134         break;
1104      case 0xf7: i8085_ICount -= 11;   /* RST  6 */
1135      case 0xf7: i8085_ICount -= (I.cputype) ? 12 : 11;   /* RST  6 */
11051136         M_RST(6);
11061137         break;
11071138
1108      case 0xf8: i8085_ICount -= 5;   /* RM   */
1139      case 0xf8: i8085_ICount -= (I.cputype) ? 6 : 5;   /* RM   */
11091140         M_RET( I.AF.b.l & SF );
11101141         break;
1111      case 0xf9: i8085_ICount -= 5;   /* SPHL */
1142      case 0xf9: i8085_ICount -= (I.cputype) ? 6 : 5;   /* SPHL */
11121143         I.SP.d = I.HL.d;
11131144         break;
1114      case 0xfa: i8085_ICount -= 7;   /* JM   nnnn */
1145      case 0xfa: i8085_ICount -= 10;   /* JM   nnnn */
11151146         M_JMP( I.AF.b.l & SF );
11161147         break;
11171148      case 0xfb: i8085_ICount -= 4;   /* EI */
r2844r2845
11721203            i8085_ICount -= 7;      /* JX   nnnn */
11731204            M_JMP( I.AF.b.l & XF );
11741205         } else {
1175            i8085_ICount -= 11;   /* CALL nnnn undocumented */
1206            i8085_ICount -= 17;   /* CALL nnnn undocumented */
11761207            M_CALL(1);
11771208         }
11781209         break;
r2844r2845
11801211         I.XX.b.l = ARG();
11811212         M_CMP(I.XX.b.l);
11821213         break;
1183      case 0xff: i8085_ICount -= 11;   /* RST  7 */
1214      case 0xff: i8085_ICount -= (I.cputype) ? 12 : 11;   /* RST  7 */
11841215         M_RST(7);
11851216         break;
11861217   }
src/emu/cpu/powerpc/ppcfe.h
r2844r2845
1/***************************************************************************
2
3    ppcfe.h
4
5    Front-end for PowerPC recompiler
6
7    Copyright Aaron Giles
8    Released for general non-commercial use under the MAME license
9    Visit http://mamedev.org for licensing and usage restrictions.
10
11***************************************************************************/
12
13#ifndef __PPCFE_H__
14#define __PPCFE_H__
15
16#include "cpu/drcfe.h"
17
18
19/***************************************************************************
20    CONSTANTS
21***************************************************************************/
22
23/* register flags */
24#define REGFLAG_R(n)               ((UINT64)1 << (n))
25#define REGFLAG_RZ(n)               (((n) == 0) ? 0 : REGFLAG_R(n))
26#define REGFLAG_CR(n)               REGFLAG_R(32 + (n))
27#define REGFLAG_XER                  REGFLAG_R(40)
28#define REGFLAG_CTR                  REGFLAG_R(41)
29#define REGFLAG_LR                  REGFLAG_R(42)
30#define REGFLAG_FPSCR               REGFLAG_R(32)
31
32
33
34/***************************************************************************
35    FUNCTION PROTOTYPES
36***************************************************************************/
37
38int ppcfe_describe(void *param, opcode_desc *desc);
39
40#endif
1/***************************************************************************
2 
3    ppcfe.h
4 
5    Front-end for PowerPC recompiler
6 
7    Copyright Aaron Giles
8    Released for general non-commercial use under the MAME license
9    Visit http://mamedev.org for licensing and usage restrictions.
10 
11***************************************************************************/
12 
13#ifndef __PPCFE_H__
14#define __PPCFE_H__
15 
16#include "cpu/drcfe.h"
17 
18 
19/***************************************************************************
20    CONSTANTS
21***************************************************************************/
22 
23/* register flags 0 */
24#define REGFLAG_R(n)               (1 << (n))
25#define REGFLAG_RZ(n)               (((n) == 0) ? 0 : REGFLAG_R(n))
26 
27/* register flags 1 */
28#define REGFLAG_FR(n)               (1 << (n))
29 
30/* register flags 2 */
31#define REGFLAG_CR(n)               (0xf0000000 >> (4 * (n)))
32#define REGFLAG_CR_BIT(n)            (0x80000000 >> (n))
33 
34/* register flags 3 */
35#define REGFLAG_XER_CA               (1 << 0)
36#define REGFLAG_XER_OV               (1 << 1)
37#define REGFLAG_XER_SO               (1 << 2)
38#define REGFLAG_XER_COUNT            (1 << 3)
39#define REGFLAG_CTR                  (1 << 4)
40#define REGFLAG_LR                  (1 << 5)
41#define REGFLAG_FPSCR(n)            (1 << (6 + (n)))
42 
43 
44 
45/***************************************************************************
46    FUNCTION PROTOTYPES
47***************************************************************************/
48 
49int ppcfe_describe(void *param, opcode_desc *desc);
50 
51#endif
src/emu/cpu/powerpc/ppcdrc.c
r2844r2845
1212
1313    Future improvements/changes:
1414
15    * Timing for long instructions (stmw/lmw/mul/div/stswi)
15    * crxor a,a,a / creqv a,a,a / cror a,a,a
1616
17    * Eliminate unnecessary flag calculations using information from the
18        frontend
19
2017***************************************************************************/
2118
2219#include <stddef.h>
r2844r2845
4138#define LOG_UML                     (0)
4239#define LOG_NATIVE                  (0)
4340
41#define DISABLE_FLAG_OPTIMIZATIONS      (0)
4442#define DISABLE_FAST_REGISTERS         (0)
4543#define SINGLE_INSTRUCTION_MODE         (0)
4644
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6260
6361/* mode bits */
6462#define MODE_LITTLE_ENDIAN            0x01
65#define MODE_DATA_TRANSLATION         0x02
63#define MODE_DATA_TRANSLATION         0x02      /* OEA */
64#define MODE_PROTECTION               0x02      /* 4XX */
6665#define MODE_USER                  0x04
6766
6867/* size of the execution code cache */
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8988#define R32(reg)            ppc->impstate->regmap[reg].type, ppc->impstate->regmap[reg].value
9089#define R32Z(reg)            (((reg) == 0) ? DRCUML_PTYPE_IMMEDIATE : ppc->impstate->regmap[reg].type), (((reg) == 0) ? 0 : ppc->impstate->regmap[reg].value)
9190#define F64(reg)            ppc->impstate->fdregmap[reg].type, ppc->impstate->fdregmap[reg].value
92#define CR32               MEM(&ppc->cr)
91#define CR32(reg)            MEM(&ppc->cr[reg])
9392#define FPSCR32               MEM(&ppc->fpscr)
9493#define MSR32               MEM(&ppc->msr)
94#define XERSO32               MEM(&ppc->xerso)
9595#define SR32(reg)            MEM(&ppc->sr[reg])
9696#define SPR32(reg)            MEM(&ppc->spr[reg])
9797
9898#define CRMASK(reg)            (0xf0000000 >> ((reg) * 4))
9999
100#define FLAGS_RC(op)         ((op & M_RC) ? (DRCUML_FLAG_S | DRCUML_FLAG_Z) : 0)
101#define FLAGS_OE(op)         ((op & M_OE) ? DRCUML_FLAG_V : 0)
102#define FLAGS_RCOE(op)         (FLAGS_RC(op) | FLAGS_OE(op))
103#define FLAGS_RCOECA(op)      (FLAGS_RCOE(op) | DRCUML_FLAG_C)
104
105100/* DSISR values for various addressing types */
106101#define DSISR_IMM(op)   ((0) |                              /* bits 15-16: cleared */         \
107102                   ((((op) >> (31- 5)) & 0x01) << (31-17)) |   /* bit  17:    opcode bit 5 */      \
r2844r2845
175170   UINT32            drcoptions;               /* configurable DRC options */
176171
177172   /* parameters for subroutines */
178   UINT64            numcycles;               /* return value from gettotalcycles */
179173   UINT32            mode;                  /* current global mode */
180174   UINT32            arg0;                  /* print_debug argument 1 */
181175   UINT32            arg1;                  /* print_debug argument 2 */
182176   UINT32            updateaddr;               /* update address storage */
183177   UINT32            swcount;               /* counter for sw instructions */
184   UINT32            swreg;                  /* reg index for sw instructions */
185178   UINT32            tempaddr;               /* temporary address storage */
186   UINT64            tempdata;               /* temporary data storage */
179   drcuml_ireg         tempdata;               /* temporary data storage */
187180   double            fp0;                  /* floating point 0 */
188181
189182   /* tables */
190183   UINT8            fpmode[4];               /* FPU mode table */
191   UINT32            sz_cr_table[32];         /* SZ CR table */
192   UINT32            cmp_cr_table[32];         /* CMP CR table */
193   UINT32            cmpl_cr_table[32];         /* CMPL CR table */
194   UINT32            fcmp_cr_table[32];         /* FCMP CR table */
184   UINT8            sz_cr_table[32];         /* SZ CR table */
185   UINT8            cmp_cr_table[32];         /* CMP CR table */
186   UINT8            cmpl_cr_table[32];         /* CMPL CR table */
187   UINT8            fcmp_cr_table[32];         /* FCMP CR table */
195188
196189   /* internal stuff */
197190   UINT8            cache_dirty;            /* true if we need to flush the cache */
198191
199192   /* register mappings */
200193   drcuml_parameter   regmap[32];               /* parameter to register mappings for all 32 integer registers */
201   drcuml_parameter   fsregmap[32];            /* parameter to register mappings for all 32 floating point registers */
202194   drcuml_parameter   fdregmap[32];            /* parameter to register mappings for all 32 floating point registers */
203195
204196   /* subroutines */
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207199   drcuml_codehandle *   out_of_cycles;            /* out of cycles exception handler */
208200   drcuml_codehandle *   tlb_mismatch;            /* tlb mismatch handler */
209201   drcuml_codehandle *   swap_tgpr;               /* swap TGPR handler */
202   drcuml_codehandle *   lsw[4][32];               /* lsw entries */
203   drcuml_codehandle *   stsw[4][32];            /* stsw entries */
210204   drcuml_codehandle *   read8[4];               /* read byte */
211205   drcuml_codehandle *   write8[4];               /* write byte */
212206   drcuml_codehandle *   read16[4];               /* read half */
r2844r2845
254248static void static_generate_exception(drcuml_state *drcuml, UINT8 exception, int recover, const char *name);
255249static void static_generate_memory_accessor(drcuml_state *drcuml, int mode, int size, int iswrite, int ismasked, const char *name, drcuml_codehandle **handleptr, drcuml_codehandle *masked);
256250static void static_generate_swap_tgpr(drcuml_state *drcuml);
251static void static_generate_lsw_entries(drcuml_state *drcuml, int mode);
252static void static_generate_stsw_entries(drcuml_state *drcuml, int mode);
257253
258254static void generate_update_mode(drcuml_block *block);
259255static void generate_update_cycles(drcuml_block *block, compiler_state *compiler, drcuml_ptype ptype, UINT64 pvalue, int allow_exception);
r2844r2845
267263
268264static void log_add_disasm_comment(drcuml_block *block, UINT32 pc, UINT32 op);
269265static const char *log_desc_flags_to_string(UINT32 flags);
270static void log_register_list(drcuml_state *drcuml, const char *string, UINT64 gprmask, UINT64 fprmask);
266static void log_register_list(drcuml_state *drcuml, const char *string, const UINT32 *reglist, const UINT32 *regnostarlist);
271267static void log_opcode_desc(drcuml_state *drcuml, const opcode_desc *desclist, int indent);
272268
273269
r2844r2845
289285};
290286
291287/* flag lookup table for SZ */
292static const UINT32 sz_cr_table_source[32] =
288static const UINT8 sz_cr_table_source[32] =
293289{
294   /* ..... */   0x40000000,
295   /* ....C */   0x42000000,
296   /* ...V. */   0x4c000000,
297   /* ...VC */   0x4e000000,
298   /* ..Z.. */   0x20000000,
299   /* ..Z.C */   0x22000000,
300   /* ..ZV. */   0x2c000000,
301   /* ..ZVC */   0x2e000000,
302   /* .S... */   0x80000000,
303   /* .S..C */   0x82000000,
304   /* .S.V. */   0x8c000000,
305   /* .S.VC */   0x8e000000,
306   /* .SZ.. */   0x20000000,
307   /* .SZ.C */   0x22000000,
308   /* .SZV. */   0x2c000000,
309   /* .SZVC */   0x2e000000,
310   /* U.... */   0x40000000,
311   /* U...C */   0x42000000,
312   /* U..V. */   0x4c000000,
313   /* U..VC */   0x4e000000,
314   /* U.Z.. */   0x20000000,
315   /* U.Z.C */   0x22000000,
316   /* U.ZV. */   0x2c000000,
317   /* U.ZVC */   0x2e000000,
318   /* US... */   0x80000000,
319   /* US..C */   0x82000000,
320   /* US.V. */   0x8c000000,
321   /* US.VC */   0x8e000000,
322   /* USZ.. */   0x20000000,
323   /* USZ.C */   0x22000000,
324   /* USZV. */   0x2c000000,
325   /* USZVC */   0x2e000000
290   /* ..... */   0x4,
291   /* ....C */   0x4,
292   /* ...V. */   0x4,
293   /* ...VC */   0x4,
294   /* ..Z.. */   0x2,
295   /* ..Z.C */   0x2,
296   /* ..ZV. */   0x2,
297   /* ..ZVC */   0x2,
298   /* .S... */   0x8,
299   /* .S..C */   0x8,
300   /* .S.V. */   0x8,
301   /* .S.VC */   0x8,
302   /* .SZ.. */   0x2,
303   /* .SZ.C */   0x2,
304   /* .SZV. */   0x2,
305   /* .SZVC */   0x2,
306   /* U.... */   0x4,
307   /* U...C */   0x4,
308   /* U..V. */   0x4,
309   /* U..VC */   0x4,
310   /* U.Z.. */   0x2,
311   /* U.Z.C */   0x2,
312   /* U.ZV. */   0x2,
313   /* U.ZVC */   0x2,
314   /* US... */   0x8,
315   /* US..C */   0x8,
316   /* US.V. */   0x8,
317   /* US.VC */   0x8,
318   /* USZ.. */   0x2,
319   /* USZ.C */   0x2,
320   /* USZV. */   0x2,
321   /* USZVC */   0x2
326322};
327323
328324/* flag lookup table for CMP */
329static const UINT32 cmp_cr_table_source[32] =
325static const UINT8 cmp_cr_table_source[32] =
330326{
331   /* ..... */   0x44444444,
332   /* ....C */   0x44444444,
333   /* ...V. */   0x88888888,
334   /* ...VC */   0x88888888,
335   /* ..Z.. */   0x22222222,
336   /* ..Z.C */   0x22222222,
337   /* ..ZV. */   0x22222222,
338   /* ..ZVC */   0x22222222,
339   /* .S... */   0x88888888,
340   /* .S..C */   0x88888888,
341   /* .S.V. */   0x44444444,
342   /* .S.VC */   0x44444444,
343   /* .SZ.. */   0x22222222,
344   /* .SZ.C */   0x22222222,
345   /* .SZV. */   0x22222222,
346   /* .SZVC */   0x22222222,
347   /* U.... */   0x44444444,
348   /* U...C */   0x44444444,
349   /* U..V. */   0x88888888,
350   /* U..VC */   0x88888888,
351   /* U.Z.. */   0x22222222,
352   /* U.Z.C */   0x22222222,
353   /* U.ZV. */   0x22222222,
354   /* U.ZVC */   0x22222222,
355   /* US... */   0x88888888,
356   /* US..C */   0x88888888,
357   /* US.V. */   0x44444444,
358   /* US.VC */   0x44444444,
359   /* USZ.. */   0x22222222,
360   /* USZ.C */   0x22222222,
361   /* USZV. */   0x22222222,
362   /* USZVC */   0x22222222
327   /* ..... */   0x4,
328   /* ....C */   0x4,
329   /* ...V. */   0x8,
330   /* ...VC */   0x8,
331   /* ..Z.. */   0x2,
332   /* ..Z.C */   0x2,
333   /* ..ZV. */   0x2,
334   /* ..ZVC */   0x2,
335   /* .S... */   0x8,
336   /* .S..C */   0x8,
337   /* .S.V. */   0x4,
338   /* .S.VC */   0x4,
339   /* .SZ.. */   0x2,
340   /* .SZ.C */   0x2,
341   /* .SZV. */   0x2,
342   /* .SZVC */   0x2,
343   /* U.... */   0x4,
344   /* U...C */   0x4,
345   /* U..V. */   0x8,
346   /* U..VC */   0x8,
347   /* U.Z.. */   0x2,
348   /* U.Z.C */   0x2,
349   /* U.ZV. */   0x2,
350   /* U.ZVC */   0x2,
351   /* US... */   0x8,
352   /* US..C */   0x8,
353   /* US.V. */   0x4,
354   /* US.VC */   0x4,
355   /* USZ.. */   0x2,
356   /* USZ.C */   0x2,
357   /* USZV. */   0x2,
358   /* USZVC */   0x2
363359};
364360
365361/* flag lookup table for CMPL */
366static const UINT32 cmpl_cr_table_source[32] =
362static const UINT8 cmpl_cr_table_source[32] =
367363{
368   /* ..... */   0x44444444,
369   /* ....C */   0x88888888,
370   /* ...V. */   0x44444444,
371   /* ...VC */   0x88888888,
372   /* ..Z.. */   0x22222222,
373   /* ..Z.C */   0x22222222,
374   /* ..ZV. */   0x22222222,
375   /* ..ZVC */   0x22222222,
376   /* .S... */   0x44444444,
377   /* .S..C */   0x88888888,
378   /* .S.V. */   0x44444444,
379   /* .S.VC */   0x88888888,
380   /* .SZ.. */   0x22222222,
381   /* .SZ.C */   0x22222222,
382   /* .SZV. */   0x22222222,
383   /* .SZVC */   0x22222222,
384   /* U.... */   0x44444444,
385   /* U...C */   0x88888888,
386   /* U..V. */   0x44444444,
387   /* U..VC */   0x88888888,
388   /* U.Z.. */   0x22222222,
389   /* U.Z.C */   0x22222222,
390   /* U.ZV. */   0x22222222,
391   /* U.ZVC */   0x22222222,
392   /* US... */   0x44444444,
393   /* US..C */   0x88888888,
394   /* US.V. */   0x44444444,
395   /* US.VC */   0x88888888,
396   /* USZ.. */   0x22222222,
397   /* USZ.C */   0x22222222,
398   /* USZV. */   0x22222222,
399   /* USZVC */   0x22222222
364   /* ..... */   0x4,
365   /* ....C */   0x8,
366   /* ...V. */   0x4,
367   /* ...VC */   0x8,
368   /* ..Z.. */   0x2,
369   /* ..Z.C */   0x2,
370   /* ..ZV. */   0x2,
371   /* ..ZVC */   0x2,
372   /* .S... */   0x4,
373   /* .S..C */   0x8,
374   /* .S.V. */   0x4,
375   /* .S.VC */   0x8,
376   /* .SZ.. */   0x2,
377   /* .SZ.C */   0x2,
378   /* .SZV. */   0x2,
379   /* .SZVC */   0x2,
380   /* U.... */   0x4,
381   /* U...C */   0x8,
382   /* U..V. */   0x4,
383   /* U..VC */   0x8,
384   /* U.Z.. */   0x2,
385   /* U.Z.C */   0x2,
386   /* U.ZV. */   0x2,
387   /* U.ZVC */   0x2,
388   /* US... */   0x4,
389   /* US..C */   0x8,
390   /* US.V. */   0x4,
391   /* US.VC */   0x8,
392   /* USZ.. */   0x2,
393   /* USZ.C */   0x2,
394   /* USZV. */   0x2,
395   /* USZVC */   0x2
400396};
401397
402398/* flag lookup table for FCMP */
403static const UINT32 fcmp_cr_table_source[32] =
399static const UINT8 fcmp_cr_table_source[32] =
404400{
405   /* ..... */   0x44444444,
406   /* ....C */   0x88888888,
407   /* ...V. */   0x44444444,
408   /* ...VC */   0x88888888,
409   /* ..Z.. */   0x22222222,
410   /* ..Z.C */   0xaaaaaaaa,
411   /* ..ZV. */   0x22222222,
412   /* ..ZVC */   0xaaaaaaaa,
413   /* .S... */   0x44444444,
414   /* .S..C */   0x88888888,
415   /* .S.V. */   0x44444444,
416   /* .S.VC */   0x88888888,
417   /* .SZ.. */   0x22222222,
418   /* .SZ.C */   0xaaaaaaaa,
419   /* .SZV. */   0x22222222,
420   /* .SZVC */   0xaaaaaaaa,
421   /* U.... */   0x55555555,
422   /* U...C */   0x99999999,
423   /* U..V. */   0x55555555,
424   /* U..VC */   0x99999999,
425   /* U.Z.. */   0x33333333,
426   /* U.Z.C */   0xbbbbbbbb,
427   /* U.ZV. */   0x33333333,
428   /* U.ZVC */   0xbbbbbbbb,
429   /* US... */   0x55555555,
430   /* US..C */   0x99999999,
431   /* US.V. */   0x55555555,
432   /* US.VC */   0x99999999,
433   /* USZ.. */   0x33333333,
434   /* USZ.C */   0xbbbbbbbb,
435   /* USZV. */   0x33333333,
436   /* USZVC */   0xbbbbbbbb
401   /* ..... */   0x4,
402   /* ....C */   0x8,
403   /* ...V. */   0x4,
404   /* ...VC */   0x8,
405   /* ..Z.. */   0x2,
406   /* ..Z.C */   0xa,
407   /* ..ZV. */   0x2,
408   /* ..ZVC */   0xa,
409   /* .S... */   0x4,
410   /* .S..C */   0x8,
411   /* .S.V. */   0x4,
412   /* .S.VC */   0x8,
413   /* .SZ.. */   0x2,
414   /* .SZ.C */   0xa,
415   /* .SZV. */   0x2,
416   /* .SZVC */   0xa,
417   /* U.... */   0x5,
418   /* U...C */   0x9,
419   /* U..V. */   0x5,
420   /* U..VC */   0x9,
421   /* U.Z.. */   0x3,
422   /* U.Z.C */   0xb,
423   /* U.ZV. */   0x3,
424   /* U.ZVC */   0xb,
425   /* US... */   0x5,
426   /* US..C */   0x9,
427   /* US.V. */   0x5,
428   /* US.VC */   0x9,
429   /* USZ.. */   0x3,
430   /* USZ.C */   0xb,
431   /* USZV. */   0x3,
432   /* USZVC */   0xb
437433};
438434
439435
r2844r2845
587583   if (ppc->impstate->drcuml == NULL)
588584      fatalerror("Error initializing the UML");
589585
586   /* add symbols for our stuff */
587   drcuml_symbol_add(ppc->impstate->drcuml, &ppc->pc, sizeof(ppc->pc), "pc");
588   drcuml_symbol_add(ppc->impstate->drcuml, &ppc->icount, sizeof(ppc->icount), "icount");
589   for (regnum = 0; regnum < 32; regnum++)
590   {
591      char buf[10];
592      sprintf(buf, "r%d", regnum);
593      drcuml_symbol_add(ppc->impstate->drcuml, &ppc->r[regnum], sizeof(ppc->r[regnum]), buf);
594      sprintf(buf, "fpr%d", regnum);
595      drcuml_symbol_add(ppc->impstate->drcuml, &ppc->f[regnum], sizeof(ppc->r[regnum]), buf);
596   }
597   for (regnum = 0; regnum < 8; regnum++)
598   {
599      char buf[10];
600      sprintf(buf, "cr%d", regnum);
601      drcuml_symbol_add(ppc->impstate->drcuml, &ppc->cr[regnum], sizeof(ppc->cr[regnum]), buf);
602   }
603   drcuml_symbol_add(ppc->impstate->drcuml, &ppc->xerso, sizeof(ppc->xerso), "xerso");
604   drcuml_symbol_add(ppc->impstate->drcuml, &ppc->fpscr, sizeof(ppc->fpscr), "fpscr");
605   drcuml_symbol_add(ppc->impstate->drcuml, &ppc->msr, sizeof(ppc->msr), "msr");
606   drcuml_symbol_add(ppc->impstate->drcuml, &ppc->sr, sizeof(ppc->sr), "sr");
607   drcuml_symbol_add(ppc->impstate->drcuml, &ppc->spr[SPR_XER], sizeof(ppc->spr[SPR_XER]), "xer");
608   drcuml_symbol_add(ppc->impstate->drcuml, &ppc->spr[SPR_LR], sizeof(ppc->spr[SPR_LR]), "lr");
609   drcuml_symbol_add(ppc->impstate->drcuml, &ppc->spr[SPR_CTR], sizeof(ppc->spr[SPR_CTR]), "ctr");
610   drcuml_symbol_add(ppc->impstate->drcuml, &ppc->spr, sizeof(ppc->spr), "spr");
611   drcuml_symbol_add(ppc->impstate->drcuml, &ppc->dcr, sizeof(ppc->dcr), "dcr");
612   drcuml_symbol_add(ppc->impstate->drcuml, &ppc->param0, sizeof(ppc->param0), "param0");
613   drcuml_symbol_add(ppc->impstate->drcuml, &ppc->param1, sizeof(ppc->param1), "param1");
614   drcuml_symbol_add(ppc->impstate->drcuml, &ppc->irq_pending, sizeof(ppc->irq_pending), "irq_pending");
615   drcuml_symbol_add(ppc->impstate->drcuml, &ppc->impstate->mode, sizeof(ppc->impstate->mode), "mode");
616   drcuml_symbol_add(ppc->impstate->drcuml, &ppc->impstate->arg0, sizeof(ppc->impstate->arg0), "arg0");
617   drcuml_symbol_add(ppc->impstate->drcuml, &ppc->impstate->arg1, sizeof(ppc->impstate->arg1), "arg1");
618   drcuml_symbol_add(ppc->impstate->drcuml, &ppc->impstate->updateaddr, sizeof(ppc->impstate->updateaddr), "updateaddr");
619   drcuml_symbol_add(ppc->impstate->drcuml, &ppc->impstate->swcount, sizeof(ppc->impstate->swcount), "swcount");
620   drcuml_symbol_add(ppc->impstate->drcuml, &ppc->impstate->tempaddr, sizeof(ppc->impstate->tempaddr), "tempaddr");
621   drcuml_symbol_add(ppc->impstate->drcuml, &ppc->impstate->tempdata, sizeof(ppc->impstate->tempdata), "tempdata");
622   drcuml_symbol_add(ppc->impstate->drcuml, &ppc->impstate->fp0, sizeof(ppc->impstate->fp0), "fp0");
623   drcuml_symbol_add(ppc->impstate->drcuml, &ppc->impstate->fpmode, sizeof(ppc->impstate->fpmode), "fpmode");
624   drcuml_symbol_add(ppc->impstate->drcuml, &ppc->impstate->sz_cr_table, sizeof(ppc->impstate->sz_cr_table), "sz_cr_table");
625   drcuml_symbol_add(ppc->impstate->drcuml, &ppc->impstate->cmp_cr_table, sizeof(ppc->impstate->cmp_cr_table), "cmp_cr_table");
626   drcuml_symbol_add(ppc->impstate->drcuml, &ppc->impstate->cmpl_cr_table, sizeof(ppc->impstate->cmpl_cr_table), "cmpl_cr_table");
627   drcuml_symbol_add(ppc->impstate->drcuml, &ppc->impstate->fcmp_cr_table, sizeof(ppc->impstate->fcmp_cr_table), "fcmp_cr_table");
628
590629   /* initialize the front-end helper */
591630   if (SINGLE_INSTRUCTION_MODE)
592631      feconfig.max_sequence = 1;
r2844r2845
604643   {
605644      ppc->impstate->regmap[regnum].type = DRCUML_PTYPE_MEMORY;
606645      ppc->impstate->regmap[regnum].value = (FPTR)&ppc->r[regnum];
607      ppc->impstate->fsregmap[regnum].type = DRCUML_PTYPE_MEMORY;
608      ppc->impstate->fsregmap[regnum].value = (FPTR)((UINT32 *)&ppc->f[regnum] + BYTE_XOR_LE(0));
609646      ppc->impstate->fdregmap[regnum].type = DRCUML_PTYPE_MEMORY;
610647      ppc->impstate->fdregmap[regnum].value = (FPTR)&ppc->f[regnum];
611648   }
r2844r2845
878915      static_generate_memory_accessor(drcuml, mode, 8, FALSE, FALSE, "read64",      &ppc->impstate->read64[mode],      ppc->impstate->read64mask[mode]);
879916      static_generate_memory_accessor(drcuml, mode, 8, TRUE,  TRUE,  "write64mask", &ppc->impstate->write64mask[mode], NULL);
880917      static_generate_memory_accessor(drcuml, mode, 8, TRUE,  FALSE, "write64",     &ppc->impstate->write64[mode],     ppc->impstate->write64mask[mode]);
918      static_generate_lsw_entries(drcuml, mode);
919      static_generate_stsw_entries(drcuml, mode);
881920   }
882921}
883922
r2844r2845
11951234   UML_CALLC(block, ppccom_tlb_fill, ppc);                                       // callc   tlbfill,ppc
11961235   UML_CMP(block, MEM(&ppc->param0), IMM(1));                                    // cmp     [param0],1
11971236   UML_JMPc(block, IF_A, isi = label++);                                       // jmp     isi,A
1237   UML_MOV(block, MEM(&ppc->pc), IREG(0));                                       // mov     <pc>,i0
11981238   save_fast_iregs(block);                                                   // <save fastregs>
11991239   UML_EXIT(block, IMM(EXECUTE_MISSING_CODE));                                    // exit    EXECUTE_MISSING_CODE
12001240   UML_LABEL(block, isi);                                                // isi:
r2844r2845
12901330         else if (exception == EXCEPTION_DTLBMISSL)
12911331            UML_OR(block, SPR32(SPROEA_SRR1), SPR32(SPROEA_SRR1), IMM(0x00010000));      // or      [srr1],0x00010000
12921332         if (exception == EXCEPTION_ITLBMISS || exception == EXCEPTION_DTLBMISSL || exception == EXCEPTION_DTLBMISSS)
1293            UML_ROLINS(block, SPR32(SPROEA_SRR1), CR32, IMM(0), IMM(CRMASK(0)));      // rolins  [srr1],[cr],0,crmask(0)
1333            UML_ROLINS(block, SPR32(SPROEA_SRR1), CR32(0), IMM(28), IMM(CRMASK(0)));   // rolins  [srr1],[cr0],28,crmask(0)
12941334      }
12951335
12961336      /* update MSR */
r2844r2845
14551495   }
14561496
14571497   /* general case: assume paging and perform a translation */
1458   if ((ppc->cap & PPCCAP_OEA) && (mode & MODE_DATA_TRANSLATION))
1498   if (((ppc->cap & PPCCAP_OEA) && (mode & MODE_DATA_TRANSLATION)) || (iswrite && (ppc->cap & PPCCAP_4XX) && (mode & MODE_PROTECTION)))
14591499   {
14601500      UML_SHR(block, IREG(3), IREG(0), IMM(12));                                 // shr     i3,i0,12
14611501      UML_LOAD(block, IREG(3), ppc->tlb_table, IREG(3), DWORD);                     // load    i3,[tlb_table],i3,dword
r2844r2845
14641504      UML_LABEL(block, tlbreturn = label++);                                 // tlbreturn:
14651505      UML_ROLINS(block, IREG(0), IREG(3), IMM(0), IMM(0xfffff000));                  // rolins  i0,i3,0,0xfffff000
14661506   }
1507   else if (ppc->cap & PPCCAP_4XX)
1508      UML_AND(block, IREG(0), IREG(0), IMM(0x7fffffff));                           // and     i0,i0,0x7fffffff
14671509   UML_XOR(block, IREG(0), IREG(0), IMM((mode & MODE_LITTLE_ENDIAN) ? (8 - size) : 0));   // xor     i0,i0,8-size
14681510
14691511   for (ramnum = 0; ramnum < PPC_MAX_FASTRAM; ramnum++)
r2844r2845
15701612            if (!ismasked)
15711613               UML_WRITE(block, IREG(0), IREG(1), PROGRAM_WORD);                  // write   i0,i1,program_word
15721614            else
1573               UML_WRITEM(block, IREG(0), IREG(2), IREG(1), PROGRAM_WORD);            // writem  i0,i2,i1,program_word
1615               UML_WRITEM(block, IREG(0), IREG(1), IREG(2), PROGRAM_WORD);            // writem  i0,i2,i1,program_word
15741616         }
15751617         else
15761618         {
r2844r2845
15871629            if (!ismasked)
15881630               UML_WRITE(block, IREG(0), IREG(1), PROGRAM_DWORD);                  // write   i0,i1,program_dword
15891631            else
1590               UML_WRITEM(block, IREG(0), IREG(2), IREG(1), PROGRAM_DWORD);         // writem  i0,i2,i1,program_dword
1632               UML_WRITEM(block, IREG(0), IREG(1), IREG(2), PROGRAM_DWORD);         // writem  i0,i2,i1,program_dword
15911633         }
15921634         else
15931635         {
r2844r2845
16041646            if (!ismasked)
16051647               UML_DWRITE(block, IREG(0), IREG(1), PROGRAM_QWORD);                  // dwrite  i0,i1,program_qword
16061648            else
1607               UML_DWRITEM(block, IREG(0), IREG(2), IREG(1), PROGRAM_QWORD);         // dwritem i0,i2,i1,program_qword
1649               UML_DWRITEM(block, IREG(0), IREG(1), IREG(2), PROGRAM_QWORD);         // dwritem i0,i2,i1,program_qword
16081650         }
16091651         else
16101652         {
r2844r2845
16261668         if (iswrite)
16271669         {
16281670            UML_MOV(block, MEM(&ppc->impstate->tempaddr), IREG(0));                  // mov     [tempaddr],i0
1629            UML_MOV(block, MEM(&ppc->impstate->tempdata), IREG(1));                  // mov     [tempdata],i1
1671            UML_MOV(block, MEM(&ppc->impstate->tempdata.w.l), IREG(1));               // mov     [tempdata],i1
16301672            UML_SUB(block, IREG(0), IREG(0), IMM(1));                           // sub     i0,i0,1
16311673            UML_SHR(block, IREG(1), IREG(1), IMM(8));                           // shr     i1,i1,8
16321674            UML_MOV(block, IREG(2), IMM(0x00ff));                              // mov     i2,0x00ff
16331675            UML_CALLH(block, masked);                                       // callh   masked
16341676            UML_ADD(block, IREG(0), MEM(&ppc->impstate->tempaddr), IMM(1));            // add     i0,[tempaddr],1
1635            UML_SHL(block, IREG(1), MEM(&ppc->impstate->tempdata), IMM(8));            // shl     i1,[tempdata],8
1677            UML_SHL(block, IREG(1), MEM(&ppc->impstate->tempdata.w.l), IMM(8));         // shl     i1,[tempdata],8
16361678            UML_MOV(block, IREG(2), IMM(0xff00));                              // mov     i2,0xff00
16371679            UML_CALLH(block, masked);                                       // callh   masked
16381680         }
r2844r2845
16421684            UML_SUB(block, IREG(0), IREG(0), IMM(1));                           // sub     i0,i0,1
16431685            UML_MOV(block, IREG(2), IMM(0x00ff));                              // mov     i2,0x00ff
16441686            UML_CALLH(block, masked);                                       // callh   masked
1645            UML_SHL(block, MEM(&ppc->impstate->tempdata), IREG(0), IMM(8));            // shl     [tempdata],i0,8
1687            UML_SHL(block, MEM(&ppc->impstate->tempdata.w.l), IREG(0), IMM(8));         // shl     [tempdata],i0,8
16461688            UML_ADD(block, IREG(0), MEM(&ppc->impstate->tempaddr), IMM(1));            // add     i0,[tempaddr],1
16471689            UML_MOV(block, IREG(2), IMM(0xff00));                              // mov     i2,0xff00
16481690            UML_CALLH(block, masked);                                       // callh   masked
16491691            UML_SHR(block, IREG(0), IREG(0), IMM(8));                           // shr     i0,i0,8
1650            UML_OR(block, IREG(0), IREG(0), MEM(&ppc->impstate->tempdata));            // or      i0,i0,[tempdata]
1692            UML_OR(block, IREG(0), IREG(0), MEM(&ppc->impstate->tempdata.w.l));         // or      i0,i0,[tempdata]
16511693         }
16521694      }
16531695      else if (size == 4)
r2844r2845
16561698         if (iswrite)
16571699         {
16581700            UML_MOV(block, MEM(&ppc->impstate->tempaddr), IREG(0));                  // mov     [tempaddr],i0
1659            UML_MOV(block, MEM(&ppc->impstate->tempdata), IREG(1));                  // mov     [tempdata],i1
1701            UML_MOV(block, MEM(&ppc->impstate->tempdata.w.l), IREG(1));               // mov     [tempdata],i1
16601702            UML_TEST(block, IREG(0), IMM(2));                                 // test    i0,i0,2
16611703            UML_JMPc(block, IF_NZ, offs2 = label++);                           // jnz     offs2
16621704            UML_SUB(block, IREG(0), IREG(0), IMM(1));                           // sub     i0,i0,1
r2844r2845
16641706            UML_MOV(block, IREG(2), IMM(0x00ffffff));                           // mov     i2,0x00ffffff
16651707            UML_CALLH(block, masked);                                       // callh   masked
16661708            UML_ADD(block, IREG(0), MEM(&ppc->impstate->tempaddr), IMM(3));            // add     i0,[tempaddr],3
1667            UML_SHL(block, IREG(1), MEM(&ppc->impstate->tempdata), IMM(24));         // shl     i1,[tempdata],24
1709            UML_SHL(block, IREG(1), MEM(&ppc->impstate->tempdata.w.l), IMM(24));      // shl     i1,[tempdata],24
16681710            UML_MOV(block, IREG(2), IMM(0xff000000));                           // mov     i2,0xff000000
16691711            UML_CALLH(block, masked);                                       // callh   masked
16701712            UML_RET(block);                                                // ret
r2844r2845
16761718            UML_MOV(block, IREG(2), IMM(0x0000ffff));                           // mov     i2,0x0000ffff
16771719            UML_CALLH(block, masked);                                       // callh   masked
16781720            UML_ADD(block, IREG(0), MEM(&ppc->impstate->tempaddr), IMM(2));            // add     i0,[tempaddr],2
1679            UML_SHL(block, IREG(1), MEM(&ppc->impstate->tempdata), IMM(16));         // shl     i1,[tempdata],16
1721            UML_SHL(block, IREG(1), MEM(&ppc->impstate->tempdata.w.l), IMM(16));      // shl     i1,[tempdata],16
16801722            UML_MOV(block, IREG(2), IMM(0xffff0000));                           // mov     i2,0xffff0000
16811723            UML_CALLH(block, masked);                                       // callh   masked
16821724            UML_RET(block);                                                // ret
r2844r2845
16861728            UML_MOV(block, IREG(2), IMM(0x000000ff));                           // mov     i2,0x000000ff
16871729            UML_CALLH(block, masked);                                       // callh   masked
16881730            UML_ADD(block, IREG(0), MEM(&ppc->impstate->tempaddr), IMM(1));            // add     i0,[tempaddr],1
1689            UML_SHL(block, IREG(1), MEM(&ppc->impstate->tempdata), IMM(8));            // shl     i1,[tempdata],8
1731            UML_SHL(block, IREG(1), MEM(&ppc->impstate->tempdata.w.l), IMM(8));         // shl     i1,[tempdata],8
16901732            UML_MOV(block, IREG(2), IMM(0xffffff00));                           // mov     i2,0xffffff00
16911733            UML_CALLH(block, masked);                                       // callh   masked
16921734         }
r2844r2845
16981740            UML_SUB(block, IREG(0), IREG(0), IMM(1));                           // sub     i0,i0,1
16991741            UML_MOV(block, IREG(2), IMM(0x00ffffff));                           // mov     i2,0x00ffffff
17001742            UML_CALLH(block, masked);                                       // callh   masked
1701            UML_SHL(block, MEM(&ppc->impstate->tempdata), IREG(0), IMM(8));            // shl     [tempdata],i0,8
1743            UML_SHL(block, MEM(&ppc->impstate->tempdata.w.l), IREG(0), IMM(8));         // shl     [tempdata],i0,8
17021744            UML_ADD(block, IREG(0), MEM(&ppc->impstate->tempaddr), IMM(3));            // add     i0,[tempaddr],3
17031745            UML_MOV(block, IREG(2), IMM(0xff000000));                           // mov     i2,0xff000000
17041746            UML_CALLH(block, masked);                                       // callh   masked
17051747            UML_SHR(block, IREG(0), IREG(0), IMM(24));                           // shr     i0,i0,24
1706            UML_OR(block, IREG(0), IREG(0), MEM(&ppc->impstate->tempdata));            // or      i0,i0,[tempdata]
1748            UML_OR(block, IREG(0), IREG(0), MEM(&ppc->impstate->tempdata.w.l));         // or      i0,i0,[tempdata]
17071749            UML_RET(block);                                                // ret
17081750            UML_LABEL(block, offs2);                                    // offs2:
17091751            UML_TEST(block, IREG(0), IMM(1));                                 // test    i0,i0,1
r2844r2845
17111753            UML_SUB(block, IREG(0), IREG(0), IMM(2));                           // sub     i0,i0,2
17121754            UML_MOV(block, IREG(2), IMM(0x0000ffff));                           // mov     i2,0x0000ffff
17131755            UML_CALLH(block, masked);                                       // callh   masked
1714            UML_SHL(block, MEM(&ppc->impstate->tempdata), IREG(0), IMM(16));         // shl     [tempdata],i0,16
1756            UML_SHL(block, MEM(&ppc->impstate->tempdata.w.l), IREG(0), IMM(16));      // shl     [tempdata],i0,16
17151757            UML_ADD(block, IREG(0), MEM(&ppc->impstate->tempaddr), IMM(2));            // add     i0,[tempaddr],2
17161758            UML_MOV(block, IREG(2), IMM(0xffff0000));                           // mov     i2,0xffff0000
17171759            UML_CALLH(block, masked);                                       // callh   masked
17181760            UML_SHR(block, IREG(0), IREG(0), IMM(16));                           // shr     i0,i0,16
1719            UML_OR(block, IREG(0), IREG(0), MEM(&ppc->impstate->tempdata));            // or      i0,i0,[tempdata]
1761            UML_OR(block, IREG(0), IREG(0), MEM(&ppc->impstate->tempdata.w.l));         // or      i0,i0,[tempdata]
17201762            UML_RET(block);                                                // ret
17211763            UML_LABEL(block, offs3);                                    // offs3:
17221764            UML_SUB(block, IREG(0), IREG(0), IMM(3));                           // sub     i0,i0,3
17231765            UML_MOV(block, IREG(2), IMM(0x000000ff));                           // mov     i2,0x000000ff
17241766            UML_CALLH(block, masked);                                       // callh   masked
1725            UML_SHL(block, MEM(&ppc->impstate->tempdata), IREG(0), IMM(24));         // shl     [tempdata],i0,24
1767            UML_SHL(block, MEM(&ppc->impstate->tempdata.w.l), IREG(0), IMM(24));      // shl     [tempdata],i0,24
17261768            UML_ADD(block, IREG(0), MEM(&ppc->impstate->tempaddr), IMM(1));            // add     i0,[tempaddr],1
17271769            UML_MOV(block, IREG(2), IMM(0xffffff00));                           // mov     i2,0xffffff00
17281770            UML_CALLH(block, masked);                                       // callh   masked
17291771            UML_SHR(block, IREG(0), IREG(0), IMM(8));                           // shr     i0,i0,8
1730            UML_OR(block, IREG(0), IREG(0), MEM(&ppc->impstate->tempdata));            // or      i0,i0,[tempdata]
1772            UML_OR(block, IREG(0), IREG(0), MEM(&ppc->impstate->tempdata.w.l));         // or      i0,i0,[tempdata]
17311773         }
17321774      }
17331775      UML_RET(block);                                                      // ret
r2844r2845
17561798      UML_LOAD(block, IREG(3), ppc->tlb_table, IREG(3), DWORD);                     // load    i3,[tlb_table],i3,dword
17571799      UML_JMP(block, tlbreturn);                                             // jmp     tlbreturn
17581800      UML_LABEL(block, dsi);                                             // dsi:
1759      if (!(ppc->cap & PPCCAP_603_MMU))
1801
1802      /* 4XX case: protection exception */
1803      if (ppc->cap & PPCCAP_4XX)
17601804      {
1761         UML_MOV(block, SPR32(SPROEA_DSISR), MEM(&ppc->param0));                     // mov     [dsisr],[param0]
1805         UML_MOV(block, SPR32(SPR4XX_DEAR), IREG(0));                           // mov     [dear],i0
17621806         UML_EXH(block, ppc->impstate->exception[EXCEPTION_DSI], IREG(0));            // exh     dsi,i0
17631807      }
1764      else
1808
1809      /* 603 case: TLBMISS exception */
1810      else if (ppc->cap & PPCCAP_603_MMU)
17651811      {
17661812         UML_MOV(block, SPR32(SPR603_DMISS), IREG(0));                           // mov     [dmiss],i0
17671813         UML_MOV(block, SPR32(SPR603_DCMP), MEM(&ppc->mmu603_cmp));                  // mov     [dcmp],[mmu603_cmp]
r2844r2845
17721818         else
17731819            UML_EXH(block, ppc->impstate->exception[EXCEPTION_DTLBMISSL], IREG(0));      // exh     dtlbmissl,i0
17741820      }
1821
1822      /* general case: DSI exception */
1823      else
1824      {
1825         UML_MOV(block, SPR32(SPROEA_DSISR), MEM(&ppc->param0));                     // mov     [dsisr],[param0]
1826         UML_EXH(block, ppc->impstate->exception[EXCEPTION_DSI], IREG(0));            // exh     dsi,i0
1827      }
17751828   }
17761829
17771830   drcuml_block_end(block);
r2844r2845
18111864}
18121865
18131866
1867/*-------------------------------------------------
1868    static_generate_lsw_entries - generate a
1869    subroutine to perform LSWI/LSWX; one handle
1870    for each possible register
1871-------------------------------------------------*/
18141872
1873static void static_generate_lsw_entries(drcuml_state *drcuml, int mode)
1874{
1875   drcuml_block *block;
1876   jmp_buf errorbuf;
1877   int regnum;
1878
1879   /* if we get an error back, we're screwed */
1880   if (setjmp(errorbuf) != 0)
1881      fatalerror("Unrecoverable error in static_generate_lsw_entries");
1882
1883   /* begin generating */
1884   block = drcuml_block_begin(drcuml, 32 * 30, &errorbuf);
1885
1886   /* iterate over all possible registers */
1887   for (regnum = 0; regnum < 32; regnum++)
1888   {
1889      char temp[20];
1890
1891      /* allocate a handle */
1892      sprintf(temp, "lsw%d", regnum);
1893      alloc_handle(drcuml, &ppc->impstate->lsw[mode][regnum], temp);
1894      UML_HANDLE(block, ppc->impstate->lsw[mode][regnum]);                        // handle  lsw<regnum>
1895      UML_LABEL(block, regnum);                                          // regnum:
1896      UML_ADD(block, IREG(0), MEM(&ppc->impstate->updateaddr), IMM(0));               // add     i0,[updateaddr],0
1897      UML_CALLH(block, ppc->impstate->read8[mode]);                              // callh   read8
1898      UML_ROLAND(block, R32(regnum), IREG(0), IMM(24), IMM(0xff000000));               // roland  reg,i0,24,0xff000000
1899      UML_SUB(block, MEM(&ppc->impstate->swcount), MEM(&ppc->impstate->swcount), IMM(1));   // sub     [swcount],[swcount],1
1900      UML_RETc(block, IF_Z);                                                // ret     z
1901      UML_ADD(block, IREG(0), MEM(&ppc->impstate->updateaddr), IMM(1));               // add     i0,[updateaddr],1
1902      UML_CALLH(block, ppc->impstate->read8[mode]);                              // callh   read8
1903      UML_ROLAND(block, IREG(0), IREG(0), IMM(16), IMM(0x00ff0000));                  // roland  i0,i0,16,0x00ff0000
1904      UML_OR(block, R32(regnum), R32(regnum), IREG(0));                           // or      reg,i0
1905      UML_SUB(block, MEM(&ppc->impstate->swcount), MEM(&ppc->impstate->swcount), IMM(1));   // sub     [swcount],[swcount],1
1906      UML_RETc(block, IF_Z);                                                // ret     z
1907      UML_ADD(block, IREG(0), MEM(&ppc->impstate->updateaddr), IMM(2));               // add     i0,[updateaddr],2
1908      UML_CALLH(block, ppc->impstate->read8[mode]);                              // callh   read8
1909      UML_ROLAND(block, IREG(0), IREG(0), IMM(8), IMM(0x0000ff00));                  // roland  i0,i0,8,0x0000ff00
1910      UML_OR(block, R32(regnum), R32(regnum), IREG(0));                           // or      reg,i0
1911      UML_SUB(block, MEM(&ppc->impstate->swcount), MEM(&ppc->impstate->swcount), IMM(1));   // sub     [swcount],[swcount],1
1912      UML_RETc(block, IF_Z);                                                // ret     z
1913      UML_ADD(block, IREG(0), MEM(&ppc->impstate->updateaddr), IMM(3));               // add     i0,[updateaddr],3
1914      UML_ADD(block, MEM(&ppc->impstate->updateaddr), IREG(0), IMM(1));               // add     [updateaddr],i0,1
1915      UML_CALLH(block, ppc->impstate->read8[mode]);                              // callh   read8
1916      UML_ROLAND(block, IREG(0), IREG(0), IMM(0), IMM(0x000000ff));                  // roland  i0,i0,0,0x000000ff
1917      UML_OR(block, R32(regnum), R32(regnum), IREG(0));                           // or      reg,i0
1918      UML_SUB(block, MEM(&ppc->impstate->swcount), MEM(&ppc->impstate->swcount), IMM(1));   // sub     [swcount],[swcount],1
1919      UML_RETc(block, IF_Z);                                                // ret     z
1920      UML_JMP(block, (regnum + 1) % 32);                                       // jmp     nextreg
1921   }
1922
1923   drcuml_block_end(block);
1924}
1925
1926
1927/*-------------------------------------------------
1928    static_generate_stsw_entries - generate a
1929    subroutine to perform LSWI/LSWX; one handle
1930    for each possible register
1931-------------------------------------------------*/
1932
1933static void static_generate_stsw_entries(drcuml_state *drcuml, int mode)
1934{
1935   drcuml_block *block;
1936   jmp_buf errorbuf;
1937   int regnum;
1938
1939   /* if we get an error back, we're screwed */
1940   if (setjmp(errorbuf) != 0)
1941      fatalerror("Unrecoverable error in static_generate_stsw_entries");
1942
1943   /* begin generating */
1944   block = drcuml_block_begin(drcuml, 32 * 30, &errorbuf);
1945
1946   /* iterate over all possible registers */
1947   for (regnum = 0; regnum < 32; regnum++)
1948   {
1949      char temp[20];
1950
1951      /* allocate a handle */
1952      sprintf(temp, "stsw%d", regnum);
1953      alloc_handle(drcuml, &ppc->impstate->stsw[mode][regnum], temp);
1954      UML_HANDLE(block, ppc->impstate->stsw[mode][regnum]);                        // handle  stsw<regnum>
1955      UML_LABEL(block, regnum);                                          // regnum:
1956      UML_ADD(block, IREG(0), MEM(&ppc->impstate->updateaddr), IMM(0));               // add     i0,[updateaddr],0
1957      UML_ROLAND(block, IREG(1), R32(regnum), IMM(8), IMM(0xff));                     // roland  i1,regnum,8,0xff
1958      UML_CALLH(block, ppc->impstate->write8[mode]);                              // callh   write8
1959      UML_SUB(block, MEM(&ppc->impstate->swcount), MEM(&ppc->impstate->swcount), IMM(1));   // sub     [swcount],[swcount],1
1960      UML_RETc(block, IF_Z);                                                // ret     z
1961      UML_ADD(block, IREG(0), MEM(&ppc->impstate->updateaddr), IMM(1));               // add     i0,[updateaddr],1
1962      UML_ROLAND(block, IREG(1), R32(regnum), IMM(16), IMM(0xff));                  // roland  i1,regnum,16,0xff
1963      UML_CALLH(block, ppc->impstate->write8[mode]);                              // callh   write8
1964      UML_SUB(block, MEM(&ppc->impstate->swcount), MEM(&ppc->impstate->swcount), IMM(1));   // sub     [swcount],[swcount],1
1965      UML_RETc(block, IF_Z);                                                // ret     z
1966      UML_ADD(block, IREG(0), MEM(&ppc->impstate->updateaddr), IMM(2));               // add     i0,[updateaddr],2
1967      UML_ROLAND(block, IREG(1), R32(regnum), IMM(24), IMM(0xff));                  // roland  i1,regnum,24,0xff
1968      UML_CALLH(block, ppc->impstate->write8[mode]);                              // callh   write8
1969      UML_SUB(block, MEM(&ppc->impstate->swcount), MEM(&ppc->impstate->swcount), IMM(1));   // sub     [swcount],[swcount],1
1970      UML_RETc(block, IF_Z);                                                // ret     z
1971      UML_ADD(block, IREG(0), MEM(&ppc->impstate->updateaddr), IMM(3));               // add     i0,[updateaddr],3
1972      UML_ADD(block, MEM(&ppc->impstate->updateaddr), IREG(0), IMM(1));               // add     [updateaddr],i0,1
1973      UML_ROLAND(block, IREG(1), R32(regnum), IMM(0), IMM(0xff));                     // roland  i1,regnum,0,0xff
1974      UML_CALLH(block, ppc->impstate->write8[mode]);                              // callh   write8
1975      UML_SUB(block, MEM(&ppc->impstate->swcount), MEM(&ppc->impstate->swcount), IMM(1));   // sub     [swcount],[swcount],1
1976      UML_RETc(block, IF_Z);                                                // ret     z
1977      UML_JMP(block, (regnum + 1) % 32);                                       // jmp     nextreg
1978   }
1979
1980   drcuml_block_end(block);
1981}
1982
1983
18151984/***************************************************************************
18161985    CODE GENERATION
18171986***************************************************************************/
r2844r2845
18231992
18241993static void generate_update_mode(drcuml_block *block)
18251994{
1995   /* LE in bit 0 of mode */
18261996   UML_AND(block, IREG(0), MSR32, IMM(MSR_LE));                                 // and     i0,msr,MSR_LE
1827   UML_AND(block, IREG(1), MSR32, IMM(MSROEA_DR));                                 // and     i1,msr,MSR_DR
1828   UML_SHR(block, IREG(1), IREG(1), IMM(3));                                    // shr     i1,i1,3
1829   UML_OR(block, IREG(0), IREG(0), IREG(1));                                    // or      i0,i0,i1
1830   UML_AND(block, IREG(1), MSR32, IMM(MSR_PR));                                 // and     i1,msr,MSR_PR
1831   UML_SHR(block, IREG(1), IREG(1), IMM(12));                                    // shr     i1,i1,12
1997
1998   /* DR (OEA and 403GCX) in bit 1 of mode */
1999   if ((ppc->cap & PPCCAP_OEA) || ppc->flavor == PPC_MODEL_403GCX)
2000   {
2001      UML_ROLAND(block, IREG(1), MSR32, IMM(29), IMM(0x02));                        // roland  i1,[msr],29,0x02
2002      UML_OR(block, IREG(0), IREG(0), IREG(1));                                 // or      i0,i0,i1
2003   }
2004
2005   /* (4XX) in bit 1 of mode */
2006   if (ppc->cap & PPCCAP_4XX)
2007   {
2008      UML_ROLAND(block, IREG(1), MSR32, IMM(30), IMM(0x02));                        // roland  i1,[msr],30,0x02
2009      UML_OR(block, IREG(0), IREG(0), IREG(1));                                 // or      i0,i0,i1
2010   }
2011
2012   /* PR in bit 2 of mode */
2013   UML_ROLAND(block, IREG(1), MSR32, IMM(20), IMM(0x04));                           // roland  i1,[msr],20,0x04
18322014   UML_OR(block, MEM(&ppc->impstate->mode), IREG(0), IREG(1));                        // or      [mode],i0,i1
18332015}
18342016
r2844r2845
20342216    generate_compute_flags - compute CR0 and/or XER flags
20352217------------------------------------------------------------------*/
20362218
2037static void generate_compute_flags(drcuml_block *block, int updatecr, UINT32 xermask, int invertcarry)
2219static void generate_compute_flags(drcuml_block *block, const opcode_desc *desc, int updatecr, UINT32 xermask, int invertcarry)
20382220{
2039   int xerflags = ((xermask & XER_OV) ? DRCUML_FLAG_V : 0) | ((xermask & XER_CA) ? DRCUML_FLAG_C : 0);
2040   UINT32 xermask_so = xermask | ((xermask & XER_OV) ? XER_SO : 0);
2221   UINT32 xerflags;
20412222
2223   /* modify inputs based on required flags */
2224   if (!DISABLE_FLAG_OPTIMIZATIONS)
2225   {
2226      if (!(desc->regreq[3] & REGFLAG_XER_CA))
2227         xermask &= ~XER_CA;
2228      if (!(desc->regreq[2] & REGFLAG_CR(0)))
2229         updatecr = 0;
2230   }
2231   xerflags = ((xermask & XER_OV) ? DRCUML_FLAG_V : 0) | ((xermask & XER_CA) ? DRCUML_FLAG_C : 0);
2232
20422233   /* easy case: nothing to do */
20432234   if (!updatecr && xermask == 0)
20442235      return;
r2844r2845
20462237   /* semi-easy case: crfield only */
20472238   if (xermask == 0)
20482239   {
2049      UML_MOV(block, IREG(0), CR32);                                          // mov     i0,cr32
2050      UML_GETFLGS(block, IREG(1), DRCUML_FLAG_S | DRCUML_FLAG_Z);                     // getflgs i1,sz
2051      UML_LOAD(block, IREG(1), ppc->impstate->sz_cr_table, IREG(1), DWORD);            // load    i1,sz_cr_table,i1,dword
2052      UML_ROLINS(block, IREG(0), IREG(1), IMM(0), IMM(CRMASK(0)));                  // rolins  i0,i1,0,crmask(field)
2053      UML_AND(block, IREG(1), SPR32(SPR_XER), IMM(XER_SO));                        // and     i1,[xer],XER_SO
2054      UML_SHR(block, IREG(1), IREG(1), IMM(3));                                 // shr     i1,i1,3
2055      UML_OR(block, CR32, IREG(0), IREG(1));                                    // or      [cr],i0,i1
2240      UML_GETFLGS(block, IREG(0), DRCUML_FLAG_S | DRCUML_FLAG_Z);                     // getflgs i0,sz
2241      UML_LOAD(block, IREG(0), ppc->impstate->sz_cr_table, IREG(0), BYTE);            // load    i0,sz_cr_table,i0,byte
2242      UML_OR(block, CR32(0), IREG(0), XERSO32);                                 // or      [cr0],i0,[xerso]
20562243      return;
20572244   }
20582245
r2844r2845
20612248   {
20622249      if (xermask & XER_OV)
20632250      {
2064         UML_MOV(block, IREG(0), SPR32(SPR_XER));                              // mov     i0,[xer]
2065         UML_GETFLGS(block, IREG(1), xerflags);                                 // getflgs i1,xerflags
2251         UML_GETFLGS(block, IREG(0), xerflags);                                 // getflgs i0,xerflags
20662252         if (invertcarry && (xermask & XER_CA))
2067            UML_XOR(block, IREG(1), IREG(1), IMM(DRCUML_FLAG_C));                  // xor     i1,i1,FLAG_C
2068         UML_ROLINS(block, IREG(0), IREG(1), IMM(29), IMM(xermask));                  // rolins  i0,i1,29,crmask(xermask)
2069         UML_AND(block, IREG(1), SPR32(SPR_XER), IMM(XER_OV));                     // and     i1,[xer],XER_OV
2070         UML_SHL(block, IREG(1), IREG(1), IMM(1));                              // shl     i1,i1,1
2071         UML_OR(block, SPR32(SPR_XER), IREG(0), IREG(1));                        // or      [xer],i0,i1
2253            UML_XOR(block, IREG(0), IREG(0), IMM(DRCUML_FLAG_C));                  // xor     i0,i0,FLAG_C
2254         UML_ROLINS(block, SPR32(SPR_XER), IREG(0), IMM(29), IMM(xermask));            // rolins  [xer],i0,29,xermask
2255         UML_SHR(block, IREG(0), IREG(0), IMM(1));                              // shr     i0,i0,1
2256         UML_OR(block, XERSO32, XERSO32, IREG(0));                              // or      [xerso],i0
20722257      }
20732258      else
20742259      {
r2844r2845
20792264   }
20802265
20812266   /* tricky case: both */
2082   UML_GETFLGS(block, IREG(0), DRCUML_FLAG_S | DRCUML_FLAG_Z | xerflags);               // getflgs i0,sz|xerflags
2083   if (invertcarry)
2084      UML_XOR(block, IREG(2), IREG(2), IMM(DRCUML_FLAG_C));                        // xor     i2,i2,FLAG_C
2085   UML_LOAD(block, IREG(0), ppc->impstate->sz_cr_table, IREG(0), DWORD);               // load    i0,sz_cr_table,i0,dword
2086   UML_AND(block, IREG(1), SPR32(SPR_XER), IMM(~xermask));                           // and     i1,[xer],~xermask
2087   UML_SHL(block, IREG(2), IREG(0), IMM(4));                                    // shl     i2,i0,4
2088   if (xermask_so != (XER_CA | XER_OV | XER_SO))
2089      UML_AND(block, IREG(2), IREG(2), IMM(xermask_so));                           // and     i2,i2,xermask
2090   UML_OR(block, IREG(1), IREG(1), IREG(2));                                    // or      i1,i1,i2
2091   UML_MOV(block, SPR32(SPR_XER), IREG(1));                                    // mov     [xer],i1
2092   UML_SHR(block, IREG(1), IREG(1), IMM(3));                                    // shr     i1,i1,3
2093   UML_OR(block, IREG(0), IREG(0), IREG(1));                                    // or      i0,i0,i1
2094   UML_AND(block, IREG(1), CR32, IMM(~CRMASK(0)));                                 // and     i1,[cr],~crmask(0)
2095   UML_AND(block, IREG(0), IREG(0), IMM(CRMASK(0)));                              // and     i0,i0,crmask(0)
2096   UML_OR(block, CR32, IREG(0), IREG(1));                                       // or      cr32,i0,i1
2267   UML_GETFLGS(block, IREG(0), DRCUML_FLAG_S | DRCUML_FLAG_Z | xerflags);               // getflgs i0,SZ | xerflags
2268   UML_LOAD(block, IREG(1), ppc->impstate->sz_cr_table, IREG(0), BYTE);               // load    i1,sz_cr_table,i0,byte
2269   if (invertcarry && (xermask & XER_CA))
2270      UML_XOR(block, IREG(0), IREG(0), IMM(DRCUML_FLAG_C));                        // xor     i0,i0,FLAG_C
2271   UML_ROLINS(block, SPR32(SPR_XER), IREG(0), IMM(29), IMM(xermask));                  // rolins  [xer],i0,29,xermask
2272   if (xermask & XER_OV)
2273   {
2274      UML_ROLAND(block, IREG(0), IREG(0), IMM(31), IMM(1));                        // roland  i0,i0,31,0x0001
2275      UML_OR(block, XERSO32, XERSO32, IREG(0));                                 // or      [xerso],i0
2276      UML_OR(block, CR32(0), IREG(1), IREG(0));                                 // or      [cr0],i1,i0
2277   }
2278   else
2279      UML_OR(block, CR32(0), IREG(1), XERSO32);                                 // or      [cr0],i1,[xerso]
20972280}
20982281
20992282
r2844r2845
21582341   }
21592342   if (!(bo & 0x10))
21602343   {
2161      UML_TEST(block, CR32, IMM(0x80000000 >> bi));                              // test  cr32,0x80000000 >> bi
2344      UML_TEST(block, CR32(bi / 4), IMM(8 >> (bi % 4)));                           // test  cr32(bi/4),8 >> (bi % 4)
21622345      UML_JMPc(block, (bo & 0x08) ? IF_Z : IF_NZ, skip);                           // jmp   skip,z/nz
21632346   }
21642347   generate_branch(block, compiler, desc, source, link);                           // <branch>
r2844r2845
22152398      case 0x0a:   /* CMPLI */
22162399         UML_CMP(block, R32(G_RA(op)), IMM(G_UIMM(op)));                           // cmp     ra,uimm
22172400         UML_GETFLGS(block, IREG(0), DRCUML_FLAG_Z | DRCUML_FLAG_C);                  // getflgs i0,zc
2218         UML_LOAD(block, IREG(0), ppc->impstate->cmpl_cr_table, IREG(0), DWORD);         // load    i0,cmpl_cr_table,i0,dword
2219         UML_ROLINS(block, CR32, IREG(0), IMM(0), IMM(CRMASK(G_CRFD(op))));            // rolins  cr,i0,0,crmask[cr]
2401         UML_LOAD(block, IREG(0), ppc->impstate->cmpl_cr_table, IREG(0), BYTE);         // load    i0,cmpl_cr_table,i0,byte
2402         UML_OR(block, CR32(G_CRFD(op)), IREG(0), XERSO32);                        // or      [crn],i0,[xerso]
22202403         return TRUE;
22212404
22222405      case 0x0b:   /* CMPI */
22232406         UML_CMP(block, R32(G_RA(op)), IMM((INT16)G_SIMM(op)));                     // cmp     ra,uimm
22242407         UML_GETFLGS(block, IREG(0), DRCUML_FLAG_Z | DRCUML_FLAG_C | DRCUML_FLAG_S);      // getflgs i0,zcs
2225         UML_LOAD(block, IREG(0), ppc->impstate->cmp_cr_table, IREG(0), DWORD);         // load    i0,cmp_cr_table,i0,dword
2226         UML_ROLINS(block, CR32, IREG(0), IMM(0), IMM(CRMASK(G_CRFD(op))));            // rolins  cr,i0,0,crmask[cr]
2408         UML_LOAD(block, IREG(0), ppc->impstate->cmp_cr_table, IREG(0), BYTE);         // load    i0,cmp_cr_table,i0,byte
2409         UML_OR(block, CR32(G_CRFD(op)), IREG(0), XERSO32);                        // or      [crn],i0,[xerso]
22272410         return TRUE;
22282411
22292412      case 0x08:   /* SUBFIC */
22302413         UML_SUB(block, R32(G_RD(op)), IMM((INT16)G_SIMM(op)), R32(G_RA(op)));         // sub     rd,simm,ra
2231         generate_compute_flags(block, FALSE, XER_CA, TRUE);                        // <update flags>
2414         generate_compute_flags(block, desc, FALSE, XER_CA, TRUE);                  // <update flags>
22322415         return TRUE;
22332416
22342417      case 0x0c:   /* ADDIC */
22352418         UML_ADD(block, R32(G_RD(op)), R32(G_RA(op)), IMM((INT16)G_SIMM(op)));         // add     rd,ra,simm
2236         generate_compute_flags(block, FALSE, XER_CA, FALSE);                     // <update flags>
2419         generate_compute_flags(block, desc, FALSE, XER_CA, FALSE);                  // <update flags>
22372420         return TRUE;
22382421
22392422      case 0x0d:   /* ADDIC. */
22402423         UML_ADD(block, R32(G_RD(op)), R32(G_RA(op)), IMM((INT16)G_SIMM(op)));         // add     rd,ra,simm
2241         generate_compute_flags(block, TRUE, XER_CA, FALSE);                        // <update flags>
2424         generate_compute_flags(block, desc, TRUE, XER_CA, FALSE);                  // <update flags>
22422425         return TRUE;
22432426
22442427      case 0x10:   /* BCx */
r2844r2845
22462429         return TRUE;
22472430
22482431      case 0x11:   /* SC */
2432         UML_MAPVAR(block, MAPVAR_PC, desc->pc + 4);                              // mapvar  PC,desc->pc+4
22492433         UML_EXH(block, ppc->impstate->exception[EXCEPTION_SYSCALL], IMM(0));         // exh     syscall,0
22502434         return TRUE;
22512435
r2844r2845
22602444         UML_ROLINS(block, R32(G_RA(op)), R32(G_RS(op)), IMM(G_SH(op)), IMM(compute_rlw_mask(G_MB(op), G_ME(op))));
22612445                                                                     // rolins ra,rs,sh,mask
22622446         if (op & M_RC)
2263         {
2264            UML_TEST(block, R32(G_RA(op)), IMM(~0));                           // test    ra,~0
2265            generate_compute_flags(block, TRUE, 0, FALSE);                        // <update flags>
2266         }
2447            generate_compute_flags(block, desc, TRUE, 0, FALSE);                  // <update flags>
22672448         return TRUE;
22682449
22692450      case 0x15:   /* RLWINMx */
22702451         UML_ROLAND(block, R32(G_RA(op)), R32(G_RS(op)), IMM(G_SH(op)), IMM(compute_rlw_mask(G_MB(op), G_ME(op))));
22712452                                                                     // roland ra,rs,sh,mask
22722453         if (op & M_RC)
2273         {
2274            UML_TEST(block, R32(G_RA(op)), IMM(~0));                           // test    ra,~0
2275            generate_compute_flags(block, TRUE, 0, FALSE);                        // <update flags>
2276         }
2454            generate_compute_flags(block, desc, TRUE, 0, FALSE);                  // <update flags>
22772455         return TRUE;
22782456
22792457      case 0x17:   /* RLWNMx */
22802458         UML_ROLAND(block, R32(G_RA(op)), R32(G_RS(op)), R32(G_RB(op)), IMM(compute_rlw_mask(G_MB(op), G_ME(op))));
22812459                                                                     // roland ra,rs,rb,mask
22822460         if (op & M_RC)
2283         {
2284            UML_TEST(block, R32(G_RA(op)), IMM(~0));                           // test    ra,~0
2285            generate_compute_flags(block, TRUE, 0, FALSE);                        // <update flags>
2286         }
2461            generate_compute_flags(block, desc, TRUE, 0, FALSE);                  // <update flags>
22872462         return TRUE;
22882463
22892464      case 0x18:   /* ORI */
r2844r2845
23042479
23052480      case 0x1c:   /* ANDI. */
23062481         UML_AND(block, R32(G_RA(op)), R32(G_RS(op)), IMM(G_UIMM(op)));               // and     ra,rs,uimm
2307         generate_compute_flags(block, TRUE, 0, FALSE);                           // <update flags>
2482         generate_compute_flags(block, desc, TRUE, 0, FALSE);                     // <update flags>
23082483         return TRUE;
23092484
23102485      case 0x1d:   /* ANDIS. */
23112486         UML_AND(block, R32(G_RA(op)), R32(G_RS(op)), IMM(G_UIMM(op) << 16));         // and  ra,rs,uimm << 16
2312         generate_compute_flags(block, TRUE, 0, FALSE);                           // <update flags>
2487         generate_compute_flags(block, desc, TRUE, 0, FALSE);                     // <update flags>
23132488         return TRUE;
23142489
23152490      case 0x1f:   /* 0x1f group */
r2844r2845
24432618
24442619      case 0x2e:   /* LMW */
24452620         UML_MAPVAR(block, MAPVAR_DSISR, DSISR_IMMU(op));                        // mapvar  dsisr,DSISR_IMMU(op)
2621         UML_MOV(block, MEM(&ppc->impstate->tempaddr), R32Z(G_RA(op)));               // mov     [tempaddr],ra
24462622         for (regnum = G_RD(op); regnum < 32; regnum++)
24472623         {
2448            UML_ADD(block, IREG(0), R32Z(G_RA(op)), IMM((INT16)G_SIMM(op) + 4 * (regnum - G_RD(op))));
2449                                                                     // add     i0,ra,simm + 4*(regnum-rd)
2624            UML_ADD(block, IREG(0), MEM(&ppc->impstate->tempaddr), IMM((INT16)G_SIMM(op) + 4 * (regnum - G_RD(op))));
2625                                                                     // add     i0,[tempaddr],simm + 4*(regnum-rd)
24502626            UML_CALLH(block, ppc->impstate->read32align[ppc->impstate->mode & 3]);      // callh   read32align
24512627            UML_MOV(block, R32(regnum), IREG(0));                              // mov     regnum,i0
24522628         }
r2844r2845
24552631
24562632      case 0x2f:   /* STMW */
24572633         UML_MAPVAR(block, MAPVAR_DSISR, DSISR_IMMU(op));                        // mapvar  dsisr,DSISR_IMMU(op)
2634         UML_MOV(block, MEM(&ppc->impstate->tempaddr), R32Z(G_RA(op)));               // mov     [tempaddr],ra
24582635         for (regnum = G_RS(op); regnum < 32; regnum++)
24592636         {
2460            UML_ADD(block, IREG(0), R32Z(G_RA(op)), IMM((INT16)G_SIMM(op) + 4 * (regnum - G_RS(op))));
2461                                                                     // add     i0,ra,simm + 4*(regnum-rs)
2637            UML_ADD(block, IREG(0), MEM(&ppc->impstate->tempaddr), IMM((INT16)G_SIMM(op) + 4 * (regnum - G_RS(op))));
2638                                                                     // add     i0,[tempaddr],simm + 4*(regnum-rs)
24622639            UML_MOV(block, IREG(1), R32(regnum));                              // mov     i1,regnum
24632640            UML_CALLH(block, ppc->impstate->write32align[ppc->impstate->mode & 3]);      // callh   write32align
24642641         }
r2844r2845
24692646         UML_ADD(block, IREG(0), R32Z(G_RA(op)), IMM((INT16)G_SIMM(op)));            // add     i0,ra,simm
24702647         UML_MAPVAR(block, MAPVAR_DSISR, DSISR_IMM(op));                           // mapvar  dsisr,DSISR_IMM(op)
24712648         UML_CALLH(block, ppc->impstate->read32[ppc->impstate->mode & 3]);            // callh   read32
2472         UML_MOV(block, MEM(&ppc->impstate->tempdata), IREG(0));                     // mov     [tempdata],i0
2473         UML_FDFRFLT(block, F64(G_RD(op)), MEM(&ppc->impstate->tempdata), DWORD);      // fdfrflt fd,[tempdata],dword
2649         UML_MOV(block, MEM(&ppc->impstate->tempdata.w.l), IREG(0));                  // mov     [tempdata],i0
2650         UML_FDFRFLT(block, F64(G_RD(op)), MEM(&ppc->impstate->tempdata.w.l), DWORD);   // fdfrflt fd,[tempdata],dword
24742651         generate_update_cycles(block, compiler, IMM(desc->pc + 4), TRUE);            // <update cycles>
24752652         return TRUE;
24762653
r2844r2845
24782655         UML_ADD(block, IREG(0), R32Z(G_RA(op)), IMM((INT16)G_SIMM(op)));            // add     i0,ra,simm
24792656         UML_MAPVAR(block, MAPVAR_DSISR, DSISR_IMM(op));                           // mapvar  dsisr,DSISR_IMM(op)
24802657         UML_CALLH(block, ppc->impstate->read64[ppc->impstate->mode & 3]);            // callh   read64
2481         UML_DMOV(block, MEM(&ppc->impstate->tempdata), IREG(0));                  // dmov    [tempdata],i0
2482         UML_FDMOV(block, F64(G_RD(op)), MEM(&ppc->impstate->tempdata));               // fdmov   fd,[tempdata]
2658         UML_DMOV(block, MEM(&ppc->impstate->tempdata.d), IREG(0));                  // dmov    [tempdata],i0
2659         UML_FDMOV(block, F64(G_RD(op)), MEM(&ppc->impstate->tempdata.d));            // fdmov   fd,[tempdata]
24832660         generate_update_cycles(block, compiler, IMM(desc->pc + 4), TRUE);            // <update cycles>
24842661         return TRUE;
24852662
r2844r2845
24882665         UML_MOV(block, MEM(&ppc->impstate->updateaddr), IREG(0));                  // mov     [updateaddr],i0
24892666         UML_MAPVAR(block, MAPVAR_DSISR, DSISR_IMMU(op));                        // mapvar  dsisr,DSISR_IMMU(op)
24902667         UML_CALLH(block, ppc->impstate->read32[ppc->impstate->mode & 3]);            // callh   read32
2491         UML_MOV(block, MEM(&ppc->impstate->tempdata), IREG(0));                     // mov     [tempdata],i0
2492         UML_FDFRFLT(block, F64(G_RD(op)), MEM(&ppc->impstate->tempdata), DWORD);      // fdfrflt fd,[tempdata],dword
2668         UML_MOV(block, MEM(&ppc->impstate->tempdata.w.l), IREG(0));                  // mov     [tempdata],i0
2669         UML_FDFRFLT(block, F64(G_RD(op)), MEM(&ppc->impstate->tempdata.w.l), DWORD);   // fdfrflt fd,[tempdata],dword
24932670         UML_MOV(block, R32(G_RA(op)), MEM(&ppc->impstate->updateaddr));               // mov     ra,[updateaddr]
24942671         generate_update_cycles(block, compiler, IMM(desc->pc + 4), TRUE);            // <update cycles>
24952672         return TRUE;
r2844r2845
24992676         UML_MOV(block, MEM(&ppc->impstate->updateaddr), IREG(0));                  // mov     [updateaddr],i0
25002677         UML_MAPVAR(block, MAPVAR_DSISR, DSISR_IMMU(op));                        // mapvar  dsisr,DSISR_IMMU(op)
25012678         UML_CALLH(block, ppc->impstate->read64[ppc->impstate->mode & 3]);            // callh   read64
2502         UML_DMOV(block, MEM(&ppc->impstate->tempdata), IREG(0));                  // dmov    [tempdata],i0
2503         UML_FDMOV(block, F64(G_RD(op)), MEM(&ppc->impstate->tempdata));               // fdmov   fd,[tempdata]
2679         UML_DMOV(block, MEM(&ppc->impstate->tempdata.d), IREG(0));                  // dmov    [tempdata],i0
2680         UML_FDMOV(block, F64(G_RD(op)), MEM(&ppc->impstate->tempdata.d));            // fdmov   fd,[tempdata]
25042681         UML_MOV(block, R32(G_RA(op)), MEM(&ppc->impstate->updateaddr));               // mov     ra,[updateaddr]
25052682         generate_update_cycles(block, compiler, IMM(desc->pc + 4), TRUE);            // <update cycles>
25062683         return TRUE;
25072684
25082685      case 0x34:   /* STFS */
25092686         UML_ADD(block, IREG(0), R32Z(G_RA(op)), IMM((INT16)G_SIMM(op)));            // add     i0,ra,simm
2510         UML_FSFRFLT(block, MEM(&ppc->impstate->tempdata), F64(G_RS(op)), QWORD);      // fsfrflt [tempdata],rs,qword
2511         UML_MOV(block, IREG(1), MEM(&ppc->impstate->tempdata));                     // mov     i1,[tempdata]
2687         UML_FSFRFLT(block, MEM(&ppc->impstate->tempdata.w.l), F64(G_RS(op)), QWORD);   // fsfrflt [tempdata],rs,qword
2688         UML_MOV(block, IREG(1), MEM(&ppc->impstate->tempdata.w.l));                  // mov     i1,[tempdata]
25122689         UML_MAPVAR(block, MAPVAR_DSISR, DSISR_IMM(op));                           // mapvar  dsisr,DSISR_IMM(op)
25132690         UML_CALLH(block, ppc->impstate->write32[ppc->impstate->mode & 3]);            // callh   write32
25142691         generate_update_cycles(block, compiler, IMM(desc->pc + 4), TRUE);            // <update cycles>
r2844r2845
25162693
25172694      case 0x36:   /* STFD */
25182695         UML_ADD(block, IREG(0), R32Z(G_RA(op)), IMM((INT16)G_SIMM(op)));            // add     i0,ra,simm
2519         UML_FDMOV(block, MEM(&ppc->impstate->tempdata), F64(G_RS(op)));               // fdmov   [tempdata],rs
2520         UML_DMOV(block, IREG(1), MEM(&ppc->impstate->tempdata));                  // dmov    i1,[tempdata]
2696         UML_FDMOV(block, MEM(&ppc->impstate->tempdata.d), F64(G_RS(op)));            // fdmov   [tempdata],rs
2697         UML_DMOV(block, IREG(1), MEM(&ppc->impstate->tempdata.d));                  // dmov    i1,[tempdata]
25212698         UML_MAPVAR(block, MAPVAR_DSISR, DSISR_IMM(op));                           // mapvar  dsisr,DSISR_IMM(op)
25222699         UML_CALLH(block, ppc->impstate->write64[ppc->impstate->mode & 3]);            // callh   write64
25232700         generate_update_cycles(block, compiler, IMM(desc->pc + 4), TRUE);            // <update cycles>
r2844r2845
25252702
25262703      case 0x35:   /* STFSU */
25272704         UML_ADD(block, IREG(0), R32(G_RA(op)), IMM((INT16)G_SIMM(op)));               // add     i0,ra,simm
2528         UML_FSFRFLT(block, MEM(&ppc->impstate->tempdata), F64(G_RS(op)), QWORD);      // fsfrflt [tempdata],rs,qword
2529         UML_MOV(block, IREG(1), MEM(&ppc->impstate->tempdata));                     // mov     i1,[tempdata]
2705         UML_FSFRFLT(block, MEM(&ppc->impstate->tempdata.w.l), F64(G_RS(op)), QWORD);   // fsfrflt [tempdata],rs,qword
2706         UML_MOV(block, IREG(1), MEM(&ppc->impstate->tempdata.w.l));                  // mov     i1,[tempdata]
25302707         UML_MOV(block, MEM(&ppc->impstate->updateaddr), IREG(0));                  // mov     [updateaddr],i0
25312708         UML_MAPVAR(block, MAPVAR_DSISR, DSISR_IMMU(op));                        // mapvar  dsisr,DSISR_IMMU(op)
25322709         UML_CALLH(block, ppc->impstate->write32[ppc->impstate->mode & 3]);            // callh   write32
r2844r2845
25362713
25372714      case 0x37:   /* STFDU */
25382715         UML_ADD(block, IREG(0), R32(G_RA(op)), IMM((INT16)G_SIMM(op)));               // add     i0,ra,simm
2539         UML_FDMOV(block, MEM(&ppc->impstate->tempdata), F64(G_RS(op)));               // fdmov   [tempdata],rs
2540         UML_DMOV(block, IREG(1), MEM(&ppc->impstate->tempdata));                  // dmov    i1,[tempdata]
2716         UML_FDMOV(block, MEM(&ppc->impstate->tempdata.d), F64(G_RS(op)));            // fdmov   [tempdata],rs
2717         UML_DMOV(block, IREG(1), MEM(&ppc->impstate->tempdata.d));                  // dmov    i1,[tempdata]
25412718         UML_MOV(block, MEM(&ppc->impstate->updateaddr), IREG(0));                  // mov     [updateaddr],i0
25422719         UML_MAPVAR(block, MAPVAR_DSISR, DSISR_IMMU(op));                        // mapvar  dsisr,DSISR_IMMU(op)
25432720         UML_CALLH(block, ppc->impstate->write64[ppc->impstate->mode & 3]);            // callh   write64
r2844r2845
25782755         return TRUE;
25792756
25802757      case 0x000:   /* MCRF */
2581         UML_ROLINS(block, CR32, CR32, IMM(((G_CRFS(op) - G_CRFD(op)) & 7) * 4), IMM(CRMASK(G_CRFD(op))));
2582                                                                     // rolins  cr,cr,4*(crfs-crfd),crmask[crfd]
2758         UML_MOV(block, CR32(G_CRFD(op)), CR32(G_CRFS(op)));                        // mov     [crd],[crs]
25832759         return TRUE;
25842760
25852761      case 0x101:   /* CRAND */
2586         UML_SHL(block, IREG(0), CR32, IMM(G_CRBA(op)));                           // shl     i0,cr,crba(op)
2587         UML_SHL(block, IREG(1), CR32, IMM(G_CRBB(op)));                           // shl     i1,cr,crbb(op)
2762         UML_SHL(block, IREG(0), CR32(G_CRBA(op) / 4), IMM(G_CRBA(op) % 4));            // shl     i0,cr(a / 4),a % 4
2763         UML_SHL(block, IREG(1), CR32(G_CRBB(op) / 4), IMM(G_CRBB(op) % 4));            // shl     i1,cr(b / 4),b % 4
25882764         UML_AND(block, IREG(0), IREG(0), IREG(1));                              // and     i0,i1
2589         UML_ROLINS(block, CR32, IREG(0), IMM(32 - G_CRBD(op)), IMM(0x80000000 >> G_CRBD(op)));
2590                                                                     // rolins  cr,i0,32-crbd,1<<crbd
2765         UML_ROLINS(block, CR32(G_CRBD(op) / 4), IREG(0), IMM(32 - G_CRBD(op) % 4), IMM(8 >> (G_CRBD(op) % 4)));
2766                                                                     // rolins  cr(d / 4),i0,32-(d % 4),8 >> (d % 4)
25912767         return TRUE;
25922768
25932769      case 0x081:   /* CRANDC */
2594         UML_SHL(block, IREG(0), CR32, IMM(G_CRBA(op)));                           // shl     i0,cr,crba(op)
2595         UML_SHL(block, IREG(1), CR32, IMM(G_CRBB(op)));                           // shl     i1,cr,crbb(op)
2770         UML_SHL(block, IREG(0), CR32(G_CRBA(op) / 4), IMM(G_CRBA(op) % 4));            // shl     i0,cr(a / 4),a % 4
2771         UML_SHL(block, IREG(1), CR32(G_CRBB(op) / 4), IMM(G_CRBB(op) % 4));            // shl     i1,cr(b / 4),b % 4
25962772         UML_XOR(block, IREG(1), IREG(1), IMM(~0));                              // xor     i1,~0
25972773         UML_AND(block, IREG(0), IREG(0), IREG(1));                              // and     i0,i1
2598         UML_ROLINS(block, CR32, IREG(0), IMM(32 - G_CRBD(op)), IMM(0x80000000 >> G_CRBD(op)));
2599                                                                     // rolins  cr,i0,32-crbd,1<<crbd
2774         UML_ROLINS(block, CR32(G_CRBD(op) / 4), IREG(0), IMM(32 - G_CRBD(op) % 4), IMM(8 >> (G_CRBD(op) % 4)));
2775                                                                     // rolins  cr(d / 4),i0,32-(d % 4),8 >> (d % 4)
26002776         return TRUE;
26012777
26022778      case 0x0e1:   /* CRNAND */
2603         UML_SHL(block, IREG(0), CR32, IMM(G_CRBA(op)));                           // shl     i0,cr,crba(op)
2604         UML_SHL(block, IREG(1), CR32, IMM(G_CRBB(op)));                           // shl     i1,cr,crbb(op)
2779         UML_SHL(block, IREG(0), CR32(G_CRBA(op) / 4), IMM(G_CRBA(op) % 4));            // shl     i0,cr(a / 4),a % 4
2780         UML_SHL(block, IREG(1), CR32(G_CRBB(op) / 4), IMM(G_CRBB(op) % 4));            // shl     i1,cr(b / 4),b % 4
26052781         UML_AND(block, IREG(0), IREG(0), IREG(1));                              // and     i0,i1
26062782         UML_XOR(block, IREG(0), IREG(0), IMM(~0));                              // xor     i0,~0
2607         UML_ROLINS(block, CR32, IREG(0), IMM(32 - G_CRBD(op)), IMM(0x80000000 >> G_CRBD(op)));
2608                                                                     // rolins  cr,i0,32-crbd,1<<crbd
2783         UML_ROLINS(block, CR32(G_CRBD(op) / 4), IREG(0), IMM(32 - G_CRBD(op) % 4), IMM(8 >> (G_CRBD(op) % 4)));
2784                                                                     // rolins  cr(d / 4),i0,32-(d % 4),8 >> (d % 4)
26092785         return TRUE;
26102786
26112787      case 0x1c1:   /* CROR */
2612         UML_SHL(block, IREG(0), CR32, IMM(G_CRBA(op)));                           // shl     i0,cr,crba(op)
2613         UML_SHL(block, IREG(1), CR32, IMM(G_CRBB(op)));                           // shl     i1,cr,crbb(op)
2788         UML_SHL(block, IREG(0), CR32(G_CRBA(op) / 4), IMM(G_CRBA(op) % 4));            // shl     i0,cr(a / 4),a % 4
2789         UML_SHL(block, IREG(1), CR32(G_CRBB(op) / 4), IMM(G_CRBB(op) % 4));            // shl     i1,cr(b / 4),b % 4
26142790         UML_OR(block, IREG(0), IREG(0), IREG(1));                              // or      i0,i1
2615         UML_ROLINS(block, CR32, IREG(0), IMM(32 - G_CRBD(op)), IMM(0x80000000 >> G_CRBD(op)));
2616                                                                     // rolins  cr,i0,32-crbd,1<<crbd
2791         UML_ROLINS(block, CR32(G_CRBD(op) / 4), IREG(0), IMM(32 - G_CRBD(op) % 4), IMM(8 >> (G_CRBD(op) % 4)));
2792                                                                     // rolins  cr(d / 4),i0,32-(d % 4),8 >> (d % 4)
26172793         return TRUE;
26182794
26192795      case 0x1a1:   /* CRORC */
2620         UML_SHL(block, IREG(0), CR32, IMM(G_CRBA(op)));                           // shl     i0,cr,crba(op)
2621         UML_SHL(block, IREG(1), CR32, IMM(G_CRBB(op)));                           // shl     i1,cr,crbb(op)
2796         UML_SHL(block, IREG(0), CR32(G_CRBA(op) / 4), IMM(G_CRBA(op) % 4));            // shl     i0,cr(a / 4),a % 4
2797         UML_SHL(block, IREG(1), CR32(G_CRBB(op) / 4), IMM(G_CRBB(op) % 4));            // shl     i1,cr(b / 4),b % 4
26222798         UML_XOR(block, IREG(1), IREG(1), IMM(~0));                              // xor     i1,~0
26232799         UML_OR(block, IREG(0), IREG(0), IREG(1));                              // or      i0,i1
2624         UML_ROLINS(block, CR32, IREG(0), IMM(32 - G_CRBD(op)), IMM(0x80000000 >> G_CRBD(op)));
2625                                                                     // rolins  cr,i0,32-crbd,1<<crbd
2800         UML_ROLINS(block, CR32(G_CRBD(op) / 4), IREG(0), IMM(32 - G_CRBD(op) % 4), IMM(8 >> (G_CRBD(op) % 4)));
2801                                                                     // rolins  cr(d / 4),i0,32-(d % 4),8 >> (d % 4)
26262802         return TRUE;
26272803
26282804      case 0x021:   /* CRNOR */
2629         UML_SHL(block, IREG(0), CR32, IMM(G_CRBA(op)));                           // shl     i0,cr,crba(op)
2630         UML_SHL(block, IREG(1), CR32, IMM(G_CRBB(op)));                           // shl     i1,cr,crbb(op)
2805         UML_SHL(block, IREG(0), CR32(G_CRBA(op) / 4), IMM(G_CRBA(op) % 4));            // shl     i0,cr(a / 4),a % 4
2806         UML_SHL(block, IREG(1), CR32(G_CRBB(op) / 4), IMM(G_CRBB(op) % 4));            // shl     i1,cr(b / 4),b % 4
26312807         UML_OR(block, IREG(0), IREG(0), IREG(1));                              // or      i0,i1
26322808         UML_XOR(block, IREG(0), IREG(0), IMM(~0));                              // xor     i0,~0
2633         UML_ROLINS(block, CR32, IREG(0), IMM(32 - G_CRBD(op)), IMM(0x80000000 >> G_CRBD(op)));
2634                                                                     // rolins  cr,i0,32-crbd,1<<crbd
2809         UML_ROLINS(block, CR32(G_CRBD(op) / 4), IREG(0), IMM(32 - G_CRBD(op) % 4), IMM(8 >> (G_CRBD(op) % 4)));
2810                                                                     // rolins  cr(d / 4),i0,32-(d % 4),8 >> (d % 4)
26352811         return TRUE;
26362812
26372813      case 0x0c1:   /* CRXOR */
2638         UML_SHL(block, IREG(0), CR32, IMM(G_CRBA(op)));                           // shl     i0,cr,crba(op)
2639         UML_SHL(block, IREG(1), CR32, IMM(G_CRBB(op)));                           // shl     i1,cr,crbb(op)
2814         UML_SHL(block, IREG(0), CR32(G_CRBA(op) / 4), IMM(G_CRBA(op) % 4));            // shl     i0,cr(a / 4),a % 4
2815         UML_SHL(block, IREG(1), CR32(G_CRBB(op) / 4), IMM(G_CRBB(op) % 4));            // shl     i1,cr(b / 4),b % 4
26402816         UML_XOR(block, IREG(0), IREG(0), IREG(1));                              // xor     i0,i1
2641         UML_ROLINS(block, CR32, IREG(0), IMM(32 - G_CRBD(op)), IMM(0x80000000 >> G_CRBD(op)));
2642                                                                     // rolins  cr,i0,32-crbd,1<<crbd
2817         UML_ROLINS(block, CR32(G_CRBD(op) / 4), IREG(0), IMM(32 - G_CRBD(op) % 4), IMM(8 >> (G_CRBD(op) % 4)));
2818                                                                     // rolins  cr(d / 4),i0,32-(d % 4),8 >> (d % 4)
26432819         return TRUE;
26442820
26452821      case 0x121:   /* CREQV */
2646         UML_SHL(block, IREG(0), CR32, IMM(G_CRBA(op)));                           // shl     i0,cr,crba(op)
2647         UML_SHL(block, IREG(1), CR32, IMM(G_CRBB(op)));                           // shl     i1,cr,crbb(op)
2822         UML_SHL(block, IREG(0), CR32(G_CRBA(op) / 4), IMM(G_CRBA(op) % 4));            // shl     i0,cr(a / 4),a % 4
2823         UML_SHL(block, IREG(1), CR32(G_CRBB(op) / 4), IMM(G_CRBB(op) % 4));            // shl     i1,cr(b / 4),b % 4
26482824         UML_XOR(block, IREG(0), IREG(0), IREG(1));                              // xor     i0,i1
26492825         UML_XOR(block, IREG(0), IREG(0), IMM(~0));                              // xor     i0,~0
2650         UML_ROLINS(block, CR32, IREG(0), IMM(32 - G_CRBD(op)), IMM(0x80000000 >> G_CRBD(op)));
2651                                                                     // rolins  cr,i0,32-crbd,1<<crbd
2826         UML_ROLINS(block, CR32(G_CRBD(op) / 4), IREG(0), IMM(32 - G_CRBD(op) % 4), IMM(8 >> (G_CRBD(op) % 4)));
2827                                                                     // rolins  cr(d / 4),i0,32-(d % 4),8 >> (d % 4)
26522828         return TRUE;
26532829
26542830      case 0x032:   /* RFI */
r2844r2845
27032879{
27042880   UINT32 op = *desc->opptr.l;
27052881   UINT32 opswitch = (op >> 1) & 0x3ff;
2706   drcuml_codelabel swloop, swloopend;
27072882   int item;
27082883
27092884   switch (opswitch)
r2844r2845
27532928      case 0x10a:   /* ADDx */
27542929      case 0x30a:   /* ADDOx */
27552930         UML_ADD(block, R32(G_RD(op)), R32(G_RA(op)), R32(G_RB(op)));               // add     rd,ra,rb
2756         generate_compute_flags(block, op & M_RC, ((op & M_OE) ? XER_OV : 0), FALSE);   // <update flags>
2931         generate_compute_flags(block, desc, op & M_RC, ((op & M_OE) ? XER_OV : 0), FALSE);
2932                                                                     // <update flags>
27572933         return TRUE;
27582934
27592935      case 0x00a:   /* ADDCx */
27602936      case 0x20a:   /* ADDCOx */
27612937         UML_ADD(block, R32(G_RD(op)), R32(G_RA(op)), R32(G_RB(op)));               // add     rd,ra,rb
2762         generate_compute_flags(block, op & M_RC, XER_CA | ((op & M_OE) ? XER_OV : 0), FALSE);// <update flags>
2938         generate_compute_flags(block, desc, op & M_RC, XER_CA | ((op & M_OE) ? XER_OV : 0), FALSE);
2939                                                                     // <update flags>
27632940         return TRUE;
27642941
27652942      case 0x08a:   /* ADDEx */
27662943      case 0x28a:   /* ADDEOx */
27672944         UML_CARRY(block, SPR32(SPR_XER), IMM(29));                              // carry   [xer],XER_CA
27682945         UML_ADDC(block, R32(G_RD(op)), R32(G_RA(op)), R32(G_RB(op)));               // addc    rd,ra,rb
2769         generate_compute_flags(block, op & M_RC, XER_CA | ((op & M_OE) ? XER_OV : 0), FALSE);// <update flags>
2946         generate_compute_flags(block, desc, op & M_RC, XER_CA | ((op & M_OE) ? XER_OV : 0), FALSE);
2947                                                                     // <update flags>
27702948         return TRUE;
27712949
27722950      case 0x0ca:   /* ADDZEx */
27732951      case 0x2ca:   /* ADDZEOx */
27742952         UML_CARRY(block, SPR32(SPR_XER), IMM(29));                              // carry   [xer],XER_CA
27752953         UML_ADDC(block, R32(G_RD(op)), R32(G_RA(op)), IMM(0));                     // addc    rd,ra,0
2776         generate_compute_flags(block, op & M_RC, XER_CA | ((op & M_OE) ? XER_OV : 0), FALSE);// <update flags>
2954         generate_compute_flags(block, desc, op & M_RC, XER_CA | ((op & M_OE) ? XER_OV : 0), FALSE);
2955                                                                     // <update flags>
27772956         return TRUE;
27782957
27792958      case 0x0ea:   /* ADDMEx */
27802959      case 0x2ea:   /* ADDMEOx */
27812960         UML_CARRY(block, SPR32(SPR_XER), IMM(29));                              // carry   [xer],XER_CA
27822961         UML_ADDC(block, R32(G_RD(op)), R32(G_RA(op)), IMM(-1));                     // addc    rd,ra,-1
2783         generate_compute_flags(block, op & M_RC, XER_CA | ((op & M_OE) ? XER_OV : 0), FALSE);// <update flags>
2962         generate_compute_flags(block, desc, op & M_RC, XER_CA | ((op & M_OE) ? XER_OV : 0), FALSE);
2963                                                                     // <update flags>
27842964         return TRUE;
27852965
27862966      case 0x028:   /* SUBFx */
27872967      case 0x228:   /* SUBFOx */
27882968         UML_SUB(block, R32(G_RD(op)), R32(G_RB(op)), R32(G_RA(op)));               // sub     rd,rb,ra
2789         generate_compute_flags(block, op & M_RC, (op & M_OE) ? XER_OV : 0, TRUE);      // <update flags>
2969         generate_compute_flags(block, desc, op & M_RC, (op & M_OE) ? XER_OV : 0, TRUE);   // <update flags>
27902970         return TRUE;
27912971
27922972      case 0x008:   /* SUBFCx */
27932973      case 0x208:   /* SUBFCOx */
27942974         UML_SUB(block, R32(G_RD(op)), R32(G_RB(op)), R32(G_RA(op)));               // sub     rd,rb,ra
2795         generate_compute_flags(block, op & M_RC, XER_CA | ((op & M_OE) ? XER_OV : 0), TRUE);// <update flags>
2975         generate_compute_flags(block, desc, op & M_RC, XER_CA | ((op & M_OE) ? XER_OV : 0), TRUE);
2976                                                                     // <update flags>
27962977         return TRUE;
27972978
27982979      case 0x088:   /* SUBFEx */
r2844r2845
28002981         UML_XOR(block, IREG(0), SPR32(SPR_XER), IMM(XER_CA));                     // xor     i0,[xer],XER_CA
28012982         UML_CARRY(block, IREG(0), IMM(29));                                    // carry   i0,XER_CA
28022983         UML_SUBB(block, R32(G_RD(op)), R32(G_RB(op)), R32(G_RA(op)));               // subc    rd,rb,ra
2803         generate_compute_flags(block, op & M_RC, XER_CA | ((op & M_OE) ? XER_OV : 0), TRUE);// <update flags>
2984         generate_compute_flags(block, desc, op & M_RC, XER_CA | ((op & M_OE) ? XER_OV : 0), TRUE);
2985                                                                     // <update flags>
28042986         return TRUE;
28052987
28062988      case 0x0c8:   /* SUBFZEx */
r2844r2845
28082990         UML_XOR(block, IREG(0), SPR32(SPR_XER), IMM(XER_CA));                     // xor     i0,[xer],XER_CA
28092991         UML_CARRY(block, IREG(0), IMM(29));                                    // carry   i0,XER_CA
28102992         UML_SUBB(block, R32(G_RD(op)), IMM(0), R32(G_RA(op)));                     // subc    rd,0,ra
2811         generate_compute_flags(block, op & M_RC, XER_CA | ((op & M_OE) ? XER_OV : 0), TRUE);// <update flags>
2993         generate_compute_flags(block, desc, op & M_RC, XER_CA | ((op & M_OE) ? XER_OV : 0), TRUE);
2994                                                                     // <update flags>
28122995         return TRUE;
28132996
28142997      case 0x0e8:   /* SUBFMEx */
r2844r2845
28162999         UML_XOR(block, IREG(0), SPR32(SPR_XER), IMM(XER_CA));                     // xor     i0,[xer],XER_CA
28173000         UML_CARRY(block, IREG(0), IMM(29));                                    // carry   i0,XER_CA
28183001         UML_SUBB(block, R32(G_RD(op)), IMM(-1), R32(G_RA(op)));                     // subc    rd,-1,ra
2819         generate_compute_flags(block, op & M_RC, XER_CA | ((op & M_OE) ? XER_OV : 0), TRUE);// <update flags>
3002         generate_compute_flags(block, desc, op & M_RC, XER_CA | ((op & M_OE) ? XER_OV : 0), TRUE);
3003                                                                     // <update flags>
28203004         return TRUE;
28213005
28223006      case 0x068:   /* NEGx */
28233007      case 0x268:   /* NEGOx */
28243008         UML_SUB(block, R32(G_RD(op)), IMM(0), R32(G_RA(op)));                     // sub     rd,0,ra
2825         generate_compute_flags(block, op & M_RC, (op & M_OE) ? XER_OV : 0, TRUE);      // <update flags>
3009         generate_compute_flags(block, desc, op & M_RC, (op & M_OE) ? XER_OV : 0, TRUE);   // <update flags>
28263010         return TRUE;
28273011
28283012      case 0x000:   /* CMP */
28293013         UML_CMP(block, R32(G_RA(op)), R32(G_RB(op)));                           // cmp     ra,rb
28303014         UML_GETFLGS(block, IREG(0), DRCUML_FLAG_Z | DRCUML_FLAG_C | DRCUML_FLAG_S);      // getflgs i0,zcs
2831         UML_LOAD(block, IREG(0), ppc->impstate->cmp_cr_table, IREG(0), DWORD);         // load    i0,cmp_cr_table,i0,dword
2832         UML_ROLINS(block, CR32, IREG(0), IMM(0), IMM(CRMASK(G_CRFD(op))));            // rolins  cr,i0,0,crmask[cr]
3015         UML_LOAD(block, IREG(0), ppc->impstate->cmp_cr_table, IREG(0), BYTE);         // load    i0,cmp_cr_table,i0,byte
3016         UML_OR(block, CR32(G_CRFD(op)), IREG(0), XERSO32);                        // or      [crn],i0,[xerso]
28333017         return TRUE;
28343018
28353019      case 0x020:   /* CMPL */
28363020         UML_CMP(block, R32(G_RA(op)), R32(G_RB(op)));                           // cmp     ra,rb
28373021         UML_GETFLGS(block, IREG(0), DRCUML_FLAG_Z | DRCUML_FLAG_C);                  // getflgs i0,zc
2838         UML_LOAD(block, IREG(0), ppc->impstate->cmpl_cr_table, IREG(0), DWORD);         // load    i0,cmpl_cr_table,i0,dword
2839         UML_ROLINS(block, CR32, IREG(0), IMM(0), IMM(CRMASK(G_CRFD(op))));            // rolins  cr,i0,0,crmask[cr]
3022         UML_LOAD(block, IREG(0), ppc->impstate->cmpl_cr_table, IREG(0), BYTE);         // load    i0,cmpl_cr_table,i0,byte
3023         UML_OR(block, CR32(G_CRFD(op)), IREG(0), XERSO32);                        // or      [crn],i0,[xerso]
28403024         return TRUE;
28413025
28423026      case 0x00b:   /* MULHWUx */
2843         UML_MULU(block, IREG(0), R32(G_RD(op)), R32(G_RA(op)), R32(G_RB(op)));         // mulu    i0,rd,ra,rb,FLAGS_RC(op)
2844         generate_compute_flags(block, op & M_RC, 0, FALSE);                        // <update flags>
3027         UML_MULU(block, IREG(0), R32(G_RD(op)), R32(G_RA(op)), R32(G_RB(op)));         // mulu    i0,rd,ra,rb
3028         if (op & M_RC)
3029         {
3030            UML_TEST(block, R32(G_RD(op)), IMM(~0));                           // test    rd,~0
3031            generate_compute_flags(block, desc, op & M_RC, 0, FALSE);               // <update flags>
3032         }
28453033         return TRUE;
28463034
28473035      case 0x04b:   /* MULHWx */
2848         UML_MULS(block, IREG(0), R32(G_RD(op)), R32(G_RA(op)), R32(G_RB(op)));         // muls    i0,rd,ra,rb,,FLAGS_RC(op)
2849         generate_compute_flags(block, op & M_RC, 0, FALSE);                        // <update flags>
3036         UML_MULS(block, IREG(0), R32(G_RD(op)), R32(G_RA(op)), R32(G_RB(op)));         // muls    i0,rd,ra,rb
3037         if (op & M_RC)
3038         {
3039            UML_TEST(block, R32(G_RD(op)), IMM(~0));                           // test    rd,~0
3040            generate_compute_flags(block, desc, op & M_RC, 0, FALSE);               // <update flags>
3041         }
28503042         return TRUE;
28513043
28523044      case 0x0eb:   /* MULLWx */
28533045      case 0x2eb:   /* MULLWOx */
2854         if (!(op & M_OE))
2855         {
2856            UML_MULS(block, R32(G_RD(op)), R32(G_RD(op)), R32(G_RA(op)), R32(G_RB(op)));// muls    rd,rd,ra,rb,FLAGS_RC(op)
2857            generate_compute_flags(block, op & M_RC, 0, FALSE);                     // <update flags>
2858         }
2859         else
2860         {
2861            UML_MULS(block, IREG(0), IREG(1), R32(G_RA(op)), R32(G_RB(op)));         // muls    i0,i1,ra,rb
2862            generate_compute_flags(block, op & M_RC, 0, FALSE);                     // <update flags>
2863            UML_MOV(block, R32(G_RD(op)), IREG(0));                              // mov     rd,i0
2864            UML_SAR(block, IREG(0), IREG(0), IMM(31));                           // sar     i0,i0,31
2865            UML_AND(block, SPR32(SPR_XER), SPR32(SPR_XER), IMM(XER_OV));            // and     [xer],[xer],XER_OV
2866            UML_XOR(block, IREG(0), IREG(0), IREG(1));                           // xor     i0,i0,i1
2867            UML_MOVc(block, IF_NZ, IREG(0), IMM(XER_OV | XER_SO));                  // mov     i0,XER_OV | XER_SO,NZ
2868            UML_OR(block, SPR32(SPR_XER), SPR32(SPR_XER), IREG(0));                  // or      [xer],[xer],i0
2869         }
3046         UML_MULS(block, R32(G_RD(op)), R32(G_RD(op)), R32(G_RA(op)), R32(G_RB(op)));   // muls    rd,rd,ra,rb
3047         generate_compute_flags(block, desc, op & M_RC, ((op & M_OE) ? XER_OV : 0), FALSE);// <update flags>
28703048         return TRUE;
28713049
28723050      case 0x1cb:   /* DIVWUx */
28733051      case 0x3cb:   /* DIVWUOx */
28743052         UML_DIVU(block, R32(G_RD(op)), R32(G_RD(op)), R32(G_RA(op)), R32(G_RB(op)));   // divu    rd,rd,ra,rb
2875         generate_compute_flags(block, op & M_RC, ((op & M_OE) ? XER_OV : 0), FALSE);   // <update flags>
3053         generate_compute_flags(block, desc, op & M_RC, ((op & M_OE) ? XER_OV : 0), FALSE);// <update flags>
28763054         return TRUE;
28773055
28783056      case 0x1eb:   /* DIVWx */
28793057      case 0x3eb:   /* DIVWOx */
28803058         UML_DIVS(block, R32(G_RD(op)), R32(G_RD(op)), R32(G_RA(op)), R32(G_RB(op)));   // divs    rd,rd,ra,rb
2881         generate_compute_flags(block, op & M_RC, ((op & M_OE) ? XER_OV : 0), FALSE);   // <update flags>
3059         generate_compute_flags(block, desc, op & M_RC, ((op & M_OE) ? XER_OV : 0), FALSE);// <update flags>
28823060         return TRUE;
28833061
28843062      case 0x01c:   /* ANDx */
28853063         UML_AND(block, R32(G_RA(op)), R32(G_RS(op)), R32(G_RB(op)));               // and     ra,rs,rb
2886         generate_compute_flags(block, op & M_RC, 0, FALSE);                        // <update flags>
3064         generate_compute_flags(block, desc, op & M_RC, 0, FALSE);                  // <update flags>
28873065         return TRUE;
28883066
28893067      case 0x03c:   /* ANDCx */
28903068         UML_XOR(block, IREG(0), R32(G_RB(op)), IMM(~0));                        // xor     i0,rb,~0
28913069         UML_AND(block, R32(G_RA(op)), R32(G_RS(op)), IREG(0));                     // and     ra,rs,i0
2892         generate_compute_flags(block, op & M_RC, 0, FALSE);                        // <update flags>
3070         generate_compute_flags(block, desc, op & M_RC, 0, FALSE);                  // <update flags>
28933071         return TRUE;
28943072
28953073      case 0x1dc:   /* NANDx */
28963074         UML_AND(block, IREG(0), R32(G_RS(op)), R32(G_RB(op)));                     // and     i0,rs,rb
28973075         UML_XOR(block, R32(G_RA(op)), IREG(0), IMM(~0));                        // xor     ra,i0,~0
2898         generate_compute_flags(block, op & M_RC, 0, FALSE);                        // <update flags>
3076         generate_compute_flags(block, desc, op & M_RC, 0, FALSE);                  // <update flags>
28993077         return TRUE;
29003078
29013079      case 0x1bc:   /* ORx */
29023080         UML_OR(block, R32(G_RA(op)), R32(G_RS(op)), R32(G_RB(op)));                  // or      ra,rs,rb
2903         generate_compute_flags(block, op & M_RC, 0, FALSE);                        // <update flags>
3081         generate_compute_flags(block, desc, op & M_RC, 0, FALSE);                  // <update flags>
29043082         return TRUE;
29053083
29063084      case 0x19c:   /* ORCx */
29073085         UML_XOR(block, IREG(0), R32(G_RB(op)), IMM(~0));                        // xor     i0,rb,~0
29083086         UML_OR(block, R32(G_RA(op)), R32(G_RS(op)), IREG(0));                     // or      ra,rs,i0
2909         generate_compute_flags(block, op & M_RC, 0, FALSE);                        // <update flags>
3087         generate_compute_flags(block, desc, op & M_RC, 0, FALSE);                  // <update flags>
29103088         return TRUE;
29113089
29123090      case 0x07c:   /* NORx */
29133091         UML_OR(block, IREG(0), R32(G_RS(op)), R32(G_RB(op)));                     // or      i0,rs,rb
29143092         UML_XOR(block, R32(G_RA(op)), IREG(0), IMM(~0));                        // xor     ra,i0,~0
2915         generate_compute_flags(block, op & M_RC, 0, FALSE);                        // <update flags>
3093         generate_compute_flags(block, desc, op & M_RC, 0, FALSE);                  // <update flags>
29163094         return TRUE;
29173095
29183096      case 0x13c:   /* XORx */
29193097         UML_XOR(block, R32(G_RA(op)), R32(G_RS(op)), R32(G_RB(op)));               // xor     ra,rs,rb
2920         generate_compute_flags(block, op & M_RC, 0, FALSE);                        // <update flags>
3098         generate_compute_flags(block, desc, op & M_RC, 0, FALSE);                  // <update flags>
29213099         return TRUE;
29223100
29233101      case 0x11c:   /* EQVx */
29243102         UML_XOR(block, IREG(0), R32(G_RS(op)), R32(G_RB(op)));                     // xor     i0,rs,rb
29253103         UML_XOR(block, R32(G_RA(op)), IREG(0), IMM(~0));                        // xor     ra,i0,~0
2926         generate_compute_flags(block, op & M_RC, 0, FALSE);                        // <update flags>
3104         generate_compute_flags(block, desc, op & M_RC, 0, FALSE);                  // <update flags>
29273105         return TRUE;
29283106
29293107      case 0x018:   /* SLWx */
29303108         UML_SHL(block, R32(G_RA(op)), R32(G_RS(op)), R32(G_RB(op)));               // shl     ra,rs,rb
2931         generate_compute_flags(block, op & M_RC, 0, FALSE);                        // <update flags>
3109         generate_compute_flags(block, desc, op & M_RC, 0, FALSE);                  // <update flags>
29323110         return TRUE;
29333111
29343112      case 0x218:   /* SRWx */
2935         UML_SHR(block, R32(G_RA(op)), R32(G_RS(op)), R32(G_RB(op)));               // shr     ra,rs,rb
2936         generate_compute_flags(block, op & M_RC, 0, FALSE);                        // <update flags>
3113         UML_MOV(block, IREG(0), R32(G_RS(op)));                                 // mov     i0,rs
3114         UML_TEST(block, R32(G_RB(op)), IMM(0x20));                              // test    rb,0x20
3115         UML_MOVc(block, IF_NZ, IREG(0), IMM(0));                              // mov     i0,0,nz
3116         UML_SHR(block, R32(G_RA(op)), IREG(0), R32(G_RB(op)));                     // shr     ra,i0,rb
3117         generate_compute_flags(block, desc, op & M_RC, 0, FALSE);                  // <update flags>
29373118         return TRUE;
29383119
29393120      case 0x318:   /* SRAWx */
2940         UML_SHL(block, IREG(1), IMM(0xffffffff), R32(G_RB(op)));                  // shl     i1,0xffffffff,rb
2941         UML_XOR(block, IREG(1), IREG(1), IMM(~0));                              // xor     i1,i1,~0
2942         UML_AND(block, IREG(0), R32(G_RS(op)), IREG(1));                        // and     i0,rs,i1
2943         UML_SAR(block, IREG(1), R32(G_RS(op)), IMM(31));                        // sar     i1,rs,31
2944         UML_AND(block, IREG(0), IREG(0), IREG(1));                              // and     i0,i0,i1
2945         UML_SETc(block, IF_NZ, IREG(0));                                    // set     i0,nz
2946         UML_ROLINS(block, SPR32(SPR_XER), IREG(0), IMM(29), IMM(XER_CA));            // rolins  [xer],i0,29,XER_CA
2947         UML_SAR(block, R32(G_RA(op)), R32(G_RS(op)), R32(G_RB(op)));               // sar     ra,rs,rb
2948         generate_compute_flags(block, op & M_RC, 0, FALSE);                        // <update flags>
3121         UML_MOV(block, IREG(2), R32(G_RB(op)));                                 // mov     i2,rb
3122         UML_TEST(block, IREG(2), IMM(0x20));                                 // test    i2,0x20
3123         UML_MOVc(block, IF_NZ, IREG(2), IMM(31));                              // mov     i2,31,nz
3124         if (DISABLE_FLAG_OPTIMIZATIONS || (desc->regreq[3] & REGFLAG_XER_CA))
3125         {
3126            UML_SHL(block, IREG(1), IMM(0xffffffff), IREG(2));                     // shl     i1,0xffffffff,i2
3127            UML_XOR(block, IREG(1), IREG(1), IMM(~0));                           // xor     i1,i1,~0
3128            UML_AND(block, IREG(0), R32(G_RS(op)), IREG(1));                     // and     i0,rs,i1
3129            UML_SAR(block, IREG(1), R32(G_RS(op)), IMM(31));                     // sar     i1,rs,31
3130            UML_TEST(block, IREG(0), IREG(1));                                 // test    i0,i1
3131            UML_SETc(block, IF_NZ, IREG(0));                                 // set     i0,nz
3132            UML_ROLINS(block, SPR32(SPR_XER), IREG(0), IMM(29), IMM(XER_CA));         // rolins  [xer],i0,29,XER_CA
3133         }
3134         UML_SAR(block, R32(G_RA(op)), R32(G_RS(op)), IREG(2));                     // sar     ra,rs,i2
3135         generate_compute_flags(block, desc, op & M_RC, 0, FALSE);                  // <update flags>
29493136         return TRUE;
29503137
29513138      case 0x338:   /* SRAWIx */
2952         UML_AND(block, IREG(0), R32(G_RS(op)), IMM(~(0xffffffff << (G_SH(op) & 31))));   // and     i0,rs,~(0xffffffff << (sh & 31))
2953         UML_SAR(block, IREG(1), R32(G_RS(op)), IMM(31));                        // sar     i1,rs,31
2954         UML_AND(block, IREG(0), IREG(0), IREG(1));                              // and     i0,i0,i1
2955         UML_SETc(block, IF_NZ, IREG(0));                                    // set     i0,nz
2956         UML_ROLINS(block, SPR32(SPR_XER), IREG(0), IMM(29), IMM(XER_CA));            // rolins  [xer],i0,29,XER_CA
3139         if (DISABLE_FLAG_OPTIMIZATIONS || (desc->regreq[3] & REGFLAG_XER_CA))
3140         {
3141            UML_AND(block, IREG(0), R32(G_RS(op)), IMM(~(0xffffffff << (G_SH(op) & 31))));// and   i0,rs,~(0xffffffff << (sh & 31))
3142            UML_SAR(block, IREG(1), R32(G_RS(op)), IMM(31));                     // sar     i1,rs,31
3143            UML_TEST(block, IREG(0), IREG(1));                                 // test    i0,i1
3144            UML_SETc(block, IF_NZ, IREG(0));                                 // set     i0,nz
3145            UML_ROLINS(block, SPR32(SPR_XER), IREG(0), IMM(29), IMM(XER_CA));         // rolins  [xer],i0,29,XER_CA
3146         }
29573147         UML_SAR(block, R32(G_RA(op)), R32(G_RS(op)), IMM(G_SH(op)));               // sar     ra,rs,sh
2958         generate_compute_flags(block, op & M_RC, 0, FALSE);                        // <update flags>
3148         generate_compute_flags(block, desc, op & M_RC, 0, FALSE);                  // <update flags>
29593149         return TRUE;
29603150
29613151      case 0x01a:   /* CNTLZWx */
2962         UML_LZCNT(block, R32(G_RA(op)), R32(G_RS(op)));                           // lzcnt   ra,rs,rb
3152         UML_LZCNT(block, R32(G_RA(op)), R32(G_RS(op)));                           // lzcnt   ra,rs
29633153         if (op & M_RC)
2964         {
2965            UML_TEST(block, R32(G_RA(op)), IMM(~0));                           // test    ra,~0
2966            generate_compute_flags(block, op & M_RC, 0, FALSE);                     // <update flags>
2967         }
3154            generate_compute_flags(block, desc, op & M_RC, 0, FALSE);               // <update flags>
29683155         return TRUE;
29693156
29703157      case 0x3ba:   /* EXTSBx */
29713158         UML_SEXT(block, R32(G_RA(op)), R32(G_RS(op)), BYTE);                     // sext    ra,rs,byte
29723159         if (op & M_RC)
2973         {
2974            UML_TEST(block, R32(G_RA(op)), IMM(~0));                           // test    ra,~0
2975            generate_compute_flags(block, op & M_RC, 0, FALSE);                     // <update flags>
2976         }
3160            generate_compute_flags(block, desc, op & M_RC, 0, FALSE);               // <update flags>
29773161         return TRUE;
29783162
29793163      case 0x39a:   /* EXTSHx */
29803164         UML_SEXT(block, R32(G_RA(op)), R32(G_RS(op)), WORD);                     // sext    ra,rs,word
29813165         if (op & M_RC)
2982         {
2983            UML_TEST(block, R32(G_RA(op)), IMM(~0));                           // test    ra,~0
2984            generate_compute_flags(block, op & M_RC, 0, FALSE);                     // <update flags>
2985         }
3166            generate_compute_flags(block, desc, op & M_RC, 0, FALSE);               // <update flags>
29863167         return TRUE;
29873168
29883169      case 0x057:   /* LBZX */
r2844r2845
30213202         UML_ADD(block, IREG(0), R32Z(G_RA(op)), R32(G_RB(op)));                     // add     i0,ra,rb
30223203         UML_MAPVAR(block, MAPVAR_DSISR, DSISR_IDX(op));                           // mapvar  dsisr,DSISR_IDX(op)
30233204         UML_CALLH(block, ppc->impstate->read32[ppc->impstate->mode & 3]);            // callh   read32
3024         UML_MOV(block, MEM(&ppc->impstate->tempdata), IREG(0));                     // mov     [tempdata],i0
3025         UML_FDFRFLT(block, F64(G_RD(op)), MEM(&ppc->impstate->tempdata), DWORD);      // fdfrflt fd,[tempdata],dword
3205         UML_MOV(block, MEM(&ppc->impstate->tempdata.w.l), IREG(0));                  // mov     [tempdata],i0
3206         UML_FDFRFLT(block, F64(G_RD(op)), MEM(&ppc->impstate->tempdata.w.l), DWORD);   // fdfrflt fd,[tempdata],dword
30263207         generate_update_cycles(block, compiler, IMM(desc->pc + 4), TRUE);            // <update cycles>
30273208         return TRUE;
30283209
r2844r2845
30303211         UML_ADD(block, IREG(0), R32Z(G_RA(op)), R32(G_RB(op)));                     // add     i0,ra,rb
30313212         UML_MAPVAR(block, MAPVAR_DSISR, DSISR_IDX(op));                           // mapvar  dsisr,DSISR_IDX(op)
30323213         UML_CALLH(block, ppc->impstate->read64[ppc->impstate->mode & 3]);            // callh   read64
3033         UML_DMOV(block, MEM(&ppc->impstate->tempdata), IREG(0));                  // dmov    [tempdata],i0
3034         UML_FDMOV(block, F64(G_RD(op)), MEM(&ppc->impstate->tempdata));               // fdmov   fd,[tempdata]
3214         UML_DMOV(block, MEM(&ppc->impstate->tempdata.d), IREG(0));                  // dmov    [tempdata],i0
3215         UML_FDMOV(block, F64(G_RD(op)), MEM(&ppc->impstate->tempdata.d));            // fdmov   fd,[tempdata]
30353216         generate_update_cycles(block, compiler, IMM(desc->pc + 4), TRUE);            // <update cycles>
30363217         return TRUE;
30373218
r2844r2845
30973278         UML_MOV(block, MEM(&ppc->impstate->updateaddr), IREG(0));                  // mov     [updateaddr],i0
30983279         UML_MAPVAR(block, MAPVAR_DSISR, DSISR_IDX(op));                           // mapvar  dsisr,DSISR_IDX(op)
30993280         UML_CALLH(block, ppc->impstate->read32[ppc->impstate->mode & 3]);            // callh   read32
3100         UML_MOV(block, MEM(&ppc->impstate->tempdata), IREG(0));                     // mov     [tempdata],i0
3101         UML_FDFRFLT(block, F64(G_RD(op)), MEM(&ppc->impstate->tempdata), DWORD);      // fdfrflt fd,[tempdata],dword
3281         UML_MOV(block, MEM(&ppc->impstate->tempdata.w.l), IREG(0));                  // mov     [tempdata],i0
3282         UML_FDFRFLT(block, F64(G_RD(op)), MEM(&ppc->impstate->tempdata.w.l), DWORD);   // fdfrflt fd,[tempdata],dword
31023283         UML_MOV(block, R32(G_RA(op)), MEM(&ppc->impstate->updateaddr));               // mov     ra,[updateaddr]
31033284         generate_update_cycles(block, compiler, IMM(desc->pc + 4), TRUE);            // <update cycles>
31043285         return TRUE;
r2844r2845
31083289         UML_MOV(block, MEM(&ppc->impstate->updateaddr), IREG(0));                  // mov     [updateaddr],i0
31093290         UML_MAPVAR(block, MAPVAR_DSISR, DSISR_IDX(op));                           // mapvar  dsisr,DSISR_IDX(op)
31103291         UML_CALLH(block, ppc->impstate->read64[ppc->impstate->mode & 3]);            // callh   read64
3111         UML_DMOV(block, MEM(&ppc->impstate->tempdata), IREG(0));                  // dmov    [tempdata],i0
3112         UML_FDMOV(block, F64(G_RD(op)), MEM(&ppc->impstate->tempdata));               // fdmov   fd,[tempdata]
3292         UML_DMOV(block, MEM(&ppc->impstate->tempdata.d), IREG(0));                  // dmov    [tempdata],i0
3293         UML_FDMOV(block, F64(G_RD(op)), MEM(&ppc->impstate->tempdata.d));            // fdmov   fd,[tempdata]
31133294         UML_MOV(block, R32(G_RA(op)), MEM(&ppc->impstate->updateaddr));               // mov     ra,[updateaddr]
31143295         generate_update_cycles(block, compiler, IMM(desc->pc + 4), TRUE);            // <update cycles>
31153296         return TRUE;
r2844r2845
31233304         return TRUE;
31243305
31253306      case 0x255:   /* LSWI */
3126         UML_MOV(block, MEM(&ppc->impstate->swcount), IMM(((G_NB(op) - 1) & 0x1f) + 1));   // mov     [swcount],[xer],G_NB
31273307         UML_MOV(block, MEM(&ppc->impstate->updateaddr), R32Z(G_RA(op)));            // mov     [updateaddr],ra
3128         UML_MOV(block, MEM(&ppc->impstate->swreg), IMM(4 * G_RD(op)));               // mov     [swreg],4*G_RD(op)
3129         UML_MAPVAR(block, MAPVAR_DSISR, DSISR_IDX(op));                           // mapvar  dsisr,DSISR_IDX(op)
3130         save_fast_iregs(block);                                             // <save fastregs>
3131         UML_LABEL(block, swloop = compiler->labelnum++);                     // swloop:
3132         UML_MOV(block, IREG(0), MEM(&ppc->impstate->updateaddr));                  // mov     i0,[updateaddr]
3133         UML_ADD(block, MEM(&ppc->impstate->updateaddr), IREG(0), IMM(1));            // add     [updateaddr],i0,1
3134         UML_CALLH(block, ppc->impstate->read8[ppc->impstate->mode & 3]);            // callh   read8
3135         UML_MOV(block, IREG(1), MEM(&ppc->impstate->swreg));                     // mov     i1,[swreg]
3136         UML_ADD(block, IREG(2), IREG(1), IMM(1));                              // add     i2,i1,1
3137         UML_AND(block, MEM(&ppc->impstate->swreg), IREG(2), IMM(0x7f));               // and     [swreg],i2,0x7f
3138         UML_XOR(block, IREG(1), IREG(1), IMM(BYTE4_XOR_BE(0)));                     // xor     i1,i1,be_xor(0)
3139         UML_STORE(block, &ppc->r[0], IREG(1), IREG(0), BYTE);                     // store   &r0,i1,i0,byte
3140         UML_SUB(block, MEM(&ppc->impstate->swcount), MEM(&ppc->impstate->swcount), IMM(1));
3141                                                                     // sub     [swcount],[swcount],1
3142         UML_JMPc(block, IF_NZ, swloop);                                       // jmp     swloop,NZ
3143         load_fast_iregs(block);                                             // <load fastregs>
3308         UML_MOV(block, MEM(&ppc->impstate->swcount), IMM(((G_NB(op) - 1) & 0x1f) + 1));   // mov     [swcount],G_NB
3309         UML_CALLH(block, ppc->impstate->lsw[ppc->impstate->mode & 3][G_RD(op)]);      // call    lsw[rd]
31443310         generate_update_cycles(block, compiler, IMM(desc->pc + 4), TRUE);            // <update cycles>
31453311         return TRUE;
31463312
31473313      case 0x215:   /* LSWX */
3314         UML_ADD(block, MEM(&ppc->impstate->updateaddr), R32Z(G_RA(op)), R32(G_RB(op)));   // add     [updateaddr],ra,rb
31483315         UML_AND(block, MEM(&ppc->impstate->swcount), SPR32(SPR_XER), IMM(0x7f));      // and     [swcount],[xer],0x7f
3149         UML_JMPc(block, IF_Z, swloopend = compiler->labelnum++);                  // jmp     swloopend,Z
3150         UML_ADD(block, MEM(&ppc->impstate->updateaddr), R32Z(G_RA(op)), R32(G_RB(op)));   // add     [updateaddr],ra,rb
3151         UML_MOV(block, MEM(&ppc->impstate->swreg), IMM(4 * G_RD(op)));               // mov     [swreg],4*G_RD(op)
3152         UML_MAPVAR(block, MAPVAR_DSISR, DSISR_IDX(op));                           // mapvar  dsisr,DSISR_IDX(op)
3153         save_fast_iregs(block);                                             // <save fastregs>
3154         UML_LABEL(block, swloop = compiler->labelnum++);                     // swloop:
3155         UML_MOV(block, IREG(0), MEM(&ppc->impstate->updateaddr));                  // mov     i0,[updateaddr]
3156         UML_ADD(block, MEM(&ppc->impstate->updateaddr), IREG(0), IMM(1));            // add     [updateaddr],i0,1
3157         UML_CALLH(block, ppc->impstate->read8[ppc->impstate->mode & 3]);            // callh   read8
3158         UML_MOV(block, IREG(1), MEM(&ppc->impstate->swreg));                     // mov     i1,[swreg]
3159         UML_ADD(block, IREG(2), IREG(1), IMM(1));                              // add     i2,i1,1
3160         UML_AND(block, MEM(&ppc->impstate->swreg), IREG(2), IMM(0x7f));               // and     [swreg],i2,0x7f
3161         UML_XOR(block, IREG(1), IREG(1), IMM(BYTE4_XOR_BE(0)));                     // xor     i1,i1,be_xor(0)
3162         UML_STORE(block, &ppc->r[0], IREG(1), IREG(0), BYTE);                     // store   &r0,i1,i0,byte
3163         UML_SUB(block, MEM(&ppc->impstate->swcount), MEM(&ppc->impstate->swcount), IMM(1));
3164                                                                     // sub     [swcount],[swcount],1
3165         UML_JMPc(block, IF_NZ, swloop);                                       // jmp     swloop,NZ
3166         UML_LABEL(block, swloopend);                                    // swloopend:
3167         load_fast_iregs(block);                                             // <load fastregs>
3316         UML_SUB(block, MEM(&ppc->icount), MEM(&ppc->icount), MEM(&ppc->impstate->swcount));// sub  icount,icount,[swcount]
3317         UML_CALLHc(block, IF_NZ, ppc->impstate->lsw[ppc->impstate->mode & 3][G_RD(op)]);// call    lsw[rd],nz
31683318         generate_update_cycles(block, compiler, IMM(desc->pc + 4), TRUE);            // <update cycles>
31693319         return TRUE;
31703320
r2844r2845
31983348
31993349      case 0x297:   /* STFSX */
32003350         UML_ADD(block, IREG(0), R32Z(G_RA(op)), R32(G_RB(op)));                     // add     i0,ra,rb
3201         UML_FSFRFLT(block, MEM(&ppc->impstate->tempdata), F64(G_RS(op)), QWORD);      // fsfrflt [tempdata],rs,qword
3202         UML_MOV(block, IREG(1), MEM(&ppc->impstate->tempdata));                     // mov     i1,[tempdata]
3351         UML_FSFRFLT(block, MEM(&ppc->impstate->tempdata.w.l), F64(G_RS(op)), QWORD);   // fsfrflt [tempdata],rs,qword
3352         UML_MOV(block, IREG(1), MEM(&ppc->impstate->tempdata.w.l));                  // mov     i1,[tempdata]
32033353         UML_MAPVAR(block, MAPVAR_DSISR, DSISR_IDX(op));                           // mapvar  dsisr,DSISR_IDX(op)
32043354         UML_CALLH(block, ppc->impstate->write32[ppc->impstate->mode & 3]);            // callh   write32
32053355         generate_update_cycles(block, compiler, IMM(desc->pc + 4), TRUE);            // <update cycles>
r2844r2845
32073357
32083358      case 0x3d7:   /* STFIWX */
32093359         UML_ADD(block, IREG(0), R32Z(G_RA(op)), R32(G_RB(op)));                     // add     i0,ra,rb
3210         UML_FDMOV(block, MEM(&ppc->impstate->tempdata), F64(G_RS(op)));               // fdmov   [tempdata],rs
3211         UML_MOV(block, IREG(1), MEM((UINT32 *)&ppc->impstate->tempdata + BYTE_XOR_LE(0)));// mov   i1,[tempdata.lo]
3360         UML_FDMOV(block, MEM(&ppc->impstate->tempdata.d), F64(G_RS(op)));            // fdmov   [tempdata],rs
3361         UML_MOV(block, IREG(1), MEM(&ppc->impstate->tempdata.w.l));                  // mov     i1,[tempdata.lo]
32123362         UML_MAPVAR(block, MAPVAR_DSISR, DSISR_IDX(op));                           // mapvar  dsisr,DSISR_IDX(op)
32133363         UML_CALLH(block, ppc->impstate->write32[ppc->impstate->mode & 3]);            // callh   write32
32143364         generate_update_cycles(block, compiler, IMM(desc->pc + 4), TRUE);            // <update cycles>
r2844r2845
32163366
32173367      case 0x2d7:   /* STFDX */
32183368         UML_ADD(block, IREG(0), R32Z(G_RA(op)), R32(G_RB(op)));                     // add     i0,ra,rb
3219         UML_FDMOV(block, MEM(&ppc->impstate->tempdata), F64(G_RS(op)));               // fdmov   [tempdata],rs
3220         UML_DMOV(block, IREG(1), MEM(&ppc->impstate->tempdata));                  // dmov    i1,[tempdata]
3369         UML_FDMOV(block, MEM(&ppc->impstate->tempdata.d), F64(G_RS(op)));            // fdmov   [tempdata],rs
3370         UML_DMOV(block, IREG(1), MEM(&ppc->impstate->tempdata.d));                  // dmov    i1,[tempdata]
32213371         UML_MAPVAR(block, MAPVAR_DSISR, DSISR_IDX(op));                           // mapvar  dsisr,DSISR_IDX(op)
32223372         UML_CALLH(block, ppc->impstate->write64[ppc->impstate->mode & 3]);            // callh   write64
32233373         generate_update_cycles(block, compiler, IMM(desc->pc + 4), TRUE);            // <update cycles>
r2844r2845
32723422
32733423      case 0x2b7:   /* STFSUX */
32743424         UML_ADD(block, IREG(0), R32(G_RA(op)), R32(G_RB(op)));                     // add     i0,ra,rb
3275         UML_FSFRFLT(block, MEM(&ppc->impstate->tempdata), F64(G_RS(op)), QWORD);      // fsfrflt [tempdata],rs,qword
3276         UML_MOV(block, IREG(1), MEM(&ppc->impstate->tempdata));                     // mov     i1,[tempdata]
3425         UML_FSFRFLT(block, MEM(&ppc->impstate->tempdata.w.l), F64(G_RS(op)), QWORD);   // fsfrflt [tempdata],rs,qword
3426         UML_MOV(block, IREG(1), MEM(&ppc->impstate->tempdata.w.l));                  // mov     i1,[tempdata]
32773427         UML_MOV(block, MEM(&ppc->impstate->updateaddr), IREG(0));                  // mov     [updateaddr],i0
32783428         UML_MAPVAR(block, MAPVAR_DSISR, DSISR_IDX(op));                           // mapvar  dsisr,DSISR_IDX(op)
32793429         UML_CALLH(block, ppc->impstate->write32[ppc->impstate->mode & 3]);            // callh   write32
r2844r2845
32833433
32843434      case 0x2f7:   /* STFDUX */
32853435         UML_ADD(block, IREG(0), R32(G_RA(op)), R32(G_RB(op)));                     // add     i0,ra,rb
3286         UML_FDMOV(block, MEM(&ppc->impstate->tempdata), F64(G_RS(op)));               // fdmov   [tempdata],rs
3287         UML_DMOV(block, IREG(1), MEM(&ppc->impstate->tempdata));                  // dmov    i1,[tempdata]
3436         UML_FDMOV(block, MEM(&ppc->impstate->tempdata.d), F64(G_RS(op)));            // fdmov   [tempdata],rs
3437         UML_DMOV(block, IREG(1), MEM(&ppc->impstate->tempdata.d));                  // dmov    i1,[tempdata]
32883438         UML_MOV(block, MEM(&ppc->impstate->updateaddr), IREG(0));                  // mov     [updateaddr],i0
32893439         UML_MAPVAR(block, MAPVAR_DSISR, DSISR_IDX(op));                           // mapvar  dsisr,DSISR_IDX(op)
32903440         UML_CALLH(block, ppc->impstate->write64[ppc->impstate->mode & 3]);            // callh   write64
r2844r2845
32973447         UML_MOV(block, IREG(1), R32(G_RS(op)));                                 // mov     i1,rs
32983448         UML_MAPVAR(block, MAPVAR_DSISR, DSISR_IDX(op));                           // mapvar  dsisr,DSISR_IDX(op)
32993449         UML_CALLH(block, ppc->impstate->write32align[ppc->impstate->mode & 3]);         // callh   write32align
3300         UML_AND(block, IREG(0), CR32, IMM(~CRMASK(0)));                           // and     i0,cr,~crmask(0)
3301         UML_ROLINS(block, IREG(0), SPR32(SPR_XER), IMM(29), IMM(0x10000000));         // rolins  i0,[xer],29,0x10000000
33023450         generate_update_cycles(block, compiler, IMM(desc->pc + 4), TRUE);            // <update cycles>
3451         UML_CMP(block, IREG(0), IREG(0));                                    // cmp     i0,i0
3452         generate_compute_flags(block, desc, TRUE, 0, FALSE);                     // <update flags>
33033453         return TRUE;
33043454
33053455      case 0x2d5:   /* STSWI */
3306         UML_MOV(block, MEM(&ppc->impstate->swcount), IMM(((G_NB(op) - 1) & 0x1f) + 1));   // mov     [swcount],[xer],G_NB
33073456         UML_MOV(block, MEM(&ppc->impstate->updateaddr), R32Z(G_RA(op)));            // mov     [updateaddr],ra
3308         UML_MOV(block, MEM(&ppc->impstate->swreg), IMM(4 * G_RS(op)));               // mov     [swreg],4*G_RS(op)
3309         UML_MAPVAR(block, MAPVAR_DSISR, DSISR_IDX(op));                           // mapvar  dsisr,DSISR_IDX(op)
3310         save_fast_iregs(block);                                             // <save fastregs>
3311         UML_LABEL(block, swloop = compiler->labelnum++);                     // swloop:
3312         UML_MOV(block, IREG(0), MEM(&ppc->impstate->updateaddr));                  // mov     i0,[updateaddr]
3313         UML_ADD(block, MEM(&ppc->impstate->updateaddr), IREG(0), IMM(1));            // add     [updateaddr],i0,1
3314         UML_MOV(block, IREG(1), MEM(&ppc->impstate->swreg));                     // mov     i1,[swreg]
3315         UML_ADD(block, IREG(2), IREG(1), IMM(1));                              // add     i2,i1,1
3316         UML_AND(block, MEM(&ppc->impstate->swreg), IREG(2), IMM(0x7f));               // and     [swreg],i2,0x7f
3317         UML_XOR(block, IREG(1), IREG(1), IMM(BYTE4_XOR_BE(0)));                     // xor     i1,i1,be_xor(0)
3318         UML_LOAD(block, IREG(1), &ppc->r[0], IREG(1), BYTE);                     // load    i1,&r0,i1,byte
3319         UML_CALLH(block, ppc->impstate->write8[ppc->impstate->mode & 3]);            // callh   write8
3320         UML_SUB(block, MEM(&ppc->impstate->swcount), MEM(&ppc->impstate->swcount), IMM(1));
3321                                                                     // sub     [swcount],[swcount],1
3322         UML_JMPc(block, IF_NZ, swloop);                                       // jmp     swloop,NZ
3457         UML_MOV(block, MEM(&ppc->impstate->swcount), IMM(((G_NB(op) - 1) & 0x1f) + 1));   // mov     [swcount],G_NB
3458         UML_CALLH(block, ppc->impstate->stsw[ppc->impstate->mode & 3][G_RD(op)]);      // call    stsw[rd]
33233459         generate_update_cycles(block, compiler, IMM(desc->pc + 4), TRUE);            // <update cycles>
33243460         return TRUE;
33253461
33263462      case 0x295:   /* STSWX */
3327         UML_AND(block, MEM(&ppc->impstate->swcount), SPR32(SPR_XER), IMM(0x7f));      // and   [swcount],[xer],0x7f
3328         UML_JMPc(block, IF_Z, swloopend = compiler->labelnum++);                  // jmp     swloopend,Z
33293463         UML_ADD(block, MEM(&ppc->impstate->updateaddr), R32Z(G_RA(op)), R32(G_RB(op)));   // add     [updateaddr],ra,rb
3330         UML_MOV(block, MEM(&ppc->impstate->swreg), IMM(4 * G_RS(op)));               // mov     [swreg],4*G_RS(op)
3331         UML_MAPVAR(block, MAPVAR_DSISR, DSISR_IDX(op));                           // mapvar  dsisr,DSISR_IDX(op)
3332         save_fast_iregs(block);                                             // <save fastregs>
3333         UML_LABEL(block, swloop = compiler->labelnum++);                     // swloop:
3334         UML_MOV(block, IREG(0), MEM(&ppc->impstate->updateaddr));                  // mov     i0,[updateaddr]
3335         UML_ADD(block, MEM(&ppc->impstate->updateaddr), IREG(0), IMM(1));            // add     [updateaddr],i0,1
3336         UML_MOV(block, IREG(1), MEM(&ppc->impstate->swreg));                     // mov     i1,[swreg]
3337         UML_ADD(block, IREG(2), IREG(1), IMM(1));                              // add     i2,i1,1
3338         UML_AND(block, MEM(&ppc->impstate->swreg), IREG(2), IMM(0x7f));               // and     [swreg],i2,0x7f
3339         UML_XOR(block, IREG(1), IREG(1), IMM(BYTE4_XOR_BE(0)));                     // xor     i1,i1,be_xor(0)
3340         UML_LOAD(block, IREG(1), &ppc->r[0], IREG(1), BYTE);                     // load    i1,&r0,i1,byte
3341         UML_CALLH(block, ppc->impstate->write8[ppc->impstate->mode & 3]);            // callh   write8
3342         UML_SUB(block, MEM(&ppc->impstate->swcount), MEM(&ppc->impstate->swcount), IMM(1));
3343                                                                     // sub     [swcount],[swcount],1
3344         UML_JMPc(block, IF_NZ, swloop);                                       // jmp     swloop,NZ
3345         UML_LABEL(block, swloopend);                                    // swloopend:
3464         UML_AND(block, MEM(&ppc->impstate->swcount), SPR32(SPR_XER), IMM(0x7f));      // and     [swcount],[xer],0x7f
3465         UML_SUB(block, MEM(&ppc->icount), MEM(&ppc->icount), MEM(&ppc->impstate->swcount));// sub  icount,icount,[swcount]
3466         UML_CALLHc(block, IF_NZ, ppc->impstate->stsw[ppc->impstate->mode & 3][G_RD(op)]);// call   stsw[rd]
33463467         generate_update_cycles(block, compiler, IMM(desc->pc + 4), TRUE);            // <update cycles>
33473468         return TRUE;
33483469
r2844r2845
33983519         return TRUE;
33993520
34003521      case 0x013:   /* MFCR */
3401         UML_MOV(block, R32(G_RD(op)), CR32);                                 // mov     rd,cr
3522         UML_SHL(block, IREG(0), CR32(0), IMM(28));                              // shl     i0,cr(0),28
3523         UML_ROLAND(block, IREG(1), CR32(1), IMM(24), IMM(0x0f000000));               // roland  i1,cr(1),24,0x0f000000
3524         UML_OR(block, IREG(0), IREG(0), IREG(1));                              // or      i0,i0,i1
3525         UML_ROLAND(block, IREG(1), CR32(2), IMM(20), IMM(0x00f00000));               // roland  i1,cr(2),20,0x00f00000
3526         UML_OR(block, IREG(0), IREG(0), IREG(1));                              // or      i0,i0,i1
3527         UML_ROLAND(block, IREG(1), CR32(3), IMM(16), IMM(0x000f0000));               // roland  i1,cr(3),16,0x000f0000
3528         UML_OR(block, IREG(0), IREG(0), IREG(1));                              // or      i0,i0,i1
3529         UML_ROLAND(block, IREG(1), CR32(4), IMM(12), IMM(0x0000f000));               // roland  i1,cr(4),12,0x0000f000
3530         UML_OR(block, IREG(0), IREG(0), IREG(1));                              // or      i0,i0,i1
3531         UML_ROLAND(block, IREG(1), CR32(5), IMM(8), IMM(0x00000f00));               // roland  i1,cr(5),8,0x00000f00
3532         UML_OR(block, IREG(0), IREG(0), IREG(1));                              // or      i0,i0,i1
3533         UML_ROLAND(block, IREG(1), CR32(6), IMM(4), IMM(0x000000f0));               // roland  i1,cr(6),4,0x000000f0
3534         UML_OR(block, IREG(0), IREG(0), IREG(1));                              // or      i0,i0,i1
3535         UML_ROLAND(block, IREG(1), CR32(7), IMM(0), IMM(0x0000000f));               // roland  i1,cr(7),0,0x0000000f
3536         UML_OR(block, R32(G_RD(op)), IREG(0), IREG(1));                           // or      rd,i0,i1
34023537         return TRUE;
34033538
34043539      case 0x053:   /* MFMSR */
r2844r2845
34083543      case 0x153:   /* MFSPR */
34093544      {
34103545         UINT32 spr = compute_spr(G_SPR(op));
3411         if (spr == SPR_LR || spr == SPR_CTR || spr == SPR_XER || (spr >= SPROEA_SPRG0 && spr <= SPROEA_SPRG3))
3546         if (spr == SPR_LR || spr == SPR_CTR || (spr >= SPROEA_SPRG0 && spr <= SPROEA_SPRG3))
34123547            UML_MOV(block, R32(G_RD(op)), SPR32(spr));                           // mov     rd,spr
3548         else if (spr == SPR_XER)
3549         {
3550            UML_SHL(block, IREG(0), XERSO32, IMM(31));                           // shl     i0,[xerso],31
3551            UML_OR(block, R32(G_RD(op)), SPR32(spr), IREG(0));                     // or      [rd],[xer],i0
3552         }
34133553         else if (spr == SPROEA_PVR)
34143554            UML_MOV(block, R32(G_RD(op)), IMM(ppc->flavor));                     // mov     rd,flavor
34153555         else
r2844r2845
34443584      }
34453585
34463586      case 0x090:   /* MTCRF */
3447         UML_ROLINS(block, CR32, R32(G_RS(op)), IMM(0), IMM(compute_crf_mask(G_CRM(op))));// rolins cr,rs,0,G_CRM
3587         UML_MOV(block, IREG(0), R32(G_RS(op)));                                 // mov     i0,rs
3588         if (G_CRM(op) & 0x80) UML_ROLAND(block, CR32(0), IREG(0), IMM(4), IMM(0xf));   // roland  cr(0),i0,4,0x0f
3589         if (G_CRM(op) & 0x40) UML_ROLAND(block, CR32(1), IREG(0), IMM(8), IMM(0xf));   // roland  cr(1),i0,8,0x0f
3590         if (G_CRM(op) & 0x20) UML_ROLAND(block, CR32(2), IREG(0), IMM(12), IMM(0xf));   // roland  cr(2),i0,12,0x0f
3591         if (G_CRM(op) & 0x10) UML_ROLAND(block, CR32(3), IREG(0), IMM(16), IMM(0xf));   // roland  cr(3),i0,16,0x0f
3592         if (G_CRM(op) & 0x08) UML_ROLAND(block, CR32(4), IREG(0), IMM(20), IMM(0xf));   // roland  cr(4),i0,20,0x0f
3593         if (G_CRM(op) & 0x04) UML_ROLAND(block, CR32(5), IREG(0), IMM(24), IMM(0xf));   // roland  cr(5),i0,24,0x0f
3594         if (G_CRM(op) & 0x02) UML_ROLAND(block, CR32(6), IREG(0), IMM(28), IMM(0xf));   // roland  cr(6),i0,28,0x0f
3595         if (G_CRM(op) & 0x01) UML_ROLAND(block, CR32(7), IREG(0), IMM(0), IMM(0xf));   // roland  cr(7),i0,0,0x0f
34483596         return TRUE;
34493597
34503598      case 0x092:   /* MTMSR */
r2844r2845
34623610      case 0x1d3:   /* MTSPR */
34633611      {
34643612         UINT32 spr = compute_spr(G_SPR(op));
3465         if (spr == SPR_LR || spr == SPR_CTR || spr == SPR_XER || (spr >= SPROEA_SPRG0 && spr <= SPROEA_SPRG3))
3613         if (spr == SPR_LR || spr == SPR_CTR || (spr >= SPROEA_SPRG0 && spr <= SPROEA_SPRG3))
34663614            UML_MOV(block, SPR32(spr), R32(G_RS(op)));                           // mov     spr,rs
3615         else if (spr == SPR_XER)
3616         {
3617            UML_AND(block, SPR32(spr), R32(G_RS(op)), IMM(~XER_SO));               // and     spr,rs,~XER_SO
3618            UML_SHR(block, XERSO32, R32(G_RS(op)), IMM(31));                     // shr     [xerso],rs,31
3619         }
34673620         else if (spr == SPROEA_PVR)
34683621            ;                                                         // read only
34693622         else
r2844r2845
34903643         return TRUE;
34913644
34923645      case 0x200:   /* MCRXR */
3493         UML_ROLINS(block, CR32, SPR32(SPR_XER), IMM(32 - 4 * G_CRFD(op)), IMM(CRMASK(G_CRFD(op))));
3494                                                                     // rolins  cr,[xer],32-4*crfd,crmask(crfd)
3646         UML_ROLAND(block, IREG(0), SPR32(SPR_XER), IMM(28), IMM(0x0f));               // roland  i0,[xer],28,0x0f
3647         UML_SHL(block, IREG(1), XERSO32, IMM(3));                              // shl     i1,[xerso],3
3648         UML_OR(block, CR32(G_CRFD(op)), IREG(0), IREG(1));                        // or      [crd],i0,i1
34953649         UML_AND(block, SPR32(SPR_XER), SPR32(SPR_XER), IMM(~0xf0000000));            // and     [xer],[xer],~0xf0000000
3650         UML_MOV(block, XERSO32, IMM(0));                                    // mov     [xerso],0
34963651         return TRUE;
34973652
34983653      case 0x106:   /* ICBT */
r2844r2845
35693724   switch (opswitch)
35703725   {
35713726      case 0x15:   /* FADDSx */
3727         if (!(ppc->impstate->drcoptions & PPCDRC_ACCURATE_SINGLES))
3728            return generate_instruction_3f(block, compiler, desc);
35723729         UML_FDADD(block, FREG(0), F64(G_RA(op)), F64(G_RB(op)));                  // fdadd   f0,ra,rb
35733730         UML_FDRNDS(block, F64(G_RD(op)), FREG(0));                              // fdrnds  rd,f0
35743731         return TRUE;
35753732
35763733      case 0x14:   /* FSUBSx */
3734         if (!(ppc->impstate->drcoptions & PPCDRC_ACCURATE_SINGLES))
3735            return generate_instruction_3f(block, compiler, desc);
35773736         UML_FDSUB(block, FREG(0), F64(G_RA(op)), F64(G_RB(op)));                  // fdsub   f0,ra,rb
35783737         UML_FDRNDS(block, F64(G_RD(op)), FREG(0));                              // fdrnds  rd,f0
35793738         return TRUE;
35803739
35813740      case 0x19:   /* FMULSx */
3741         if (!(ppc->impstate->drcoptions & PPCDRC_ACCURATE_SINGLES))
3742            return generate_instruction_3f(block, compiler, desc);
35823743         UML_FDMUL(block, FREG(0), F64(G_RA(op)), F64(G_RB(op)));                  // fdmul   f0,ra,rb
35833744         UML_FDRNDS(block, F64(G_RD(op)), FREG(0));                              // fdrnds  rd,f0
35843745         return TRUE;
35853746
35863747      case 0x12:   /* FDIVSx */
3748         if (!(ppc->impstate->drcoptions & PPCDRC_ACCURATE_SINGLES))
3749            return generate_instruction_3f(block, compiler, desc);
35873750         UML_FDDIV(block, FREG(0), F64(G_RA(op)), F64(G_RB(op)));                  // fddiv   f0,ra,rb
35883751         UML_FDRNDS(block, F64(G_RD(op)), FREG(0));                              // fdrnds  rd,f0
35893752         return TRUE;
35903753
35913754      case 0x16:   /* FSQRTSx */
3755         if (!(ppc->impstate->drcoptions & PPCDRC_ACCURATE_SINGLES))
3756            return generate_instruction_3f(block, compiler, desc);
35923757         UML_FDSQRT(block, FREG(0), F64(G_RB(op)));                              // fdsqrt  f0,rb
35933758         UML_FDRNDS(block, F64(G_RD(op)), FREG(0));                              // fdrnds  rd,f0
35943759         return TRUE;
r2844r2845
36003765         return TRUE;
36013766
36023767      case 0x1d:   /* FMADDSx */
3768         if (!(ppc->impstate->drcoptions & PPCDRC_ACCURATE_SINGLES))
3769            return generate_instruction_3f(block, compiler, desc);
36033770         UML_FDMUL(block, FREG(0), F64(G_RA(op)), F64(G_REGC(op)));                  // fdmul   f0,ra,rc
36043771         UML_FDADD(block, FREG(0), FREG(0), F64(G_RB(op)));                        // fdadd   f0,f0,rb
36053772         UML_FDRNDS(block, F64(G_RD(op)), FREG(0));                              // fdrnds  rd,f0
36063773         return TRUE;
36073774
36083775      case 0x1c:   /* FMSUBSx */
3776         if (!(ppc->impstate->drcoptions & PPCDRC_ACCURATE_SINGLES))
3777            return generate_instruction_3f(block, compiler, desc);
36093778         UML_FDMUL(block, FREG(0), F64(G_RA(op)), F64(G_REGC(op)));                  // fdmul   f0,ra,rc
36103779         UML_FDSUB(block, FREG(0), FREG(0), F64(G_RB(op)));                        // fdsub   f0,f0,rb
36113780         UML_FDRNDS(block, F64(G_RD(op)), FREG(0));                              // fdrnds  rd,f0
36123781         return TRUE;
36133782
36143783      case 0x1f:   /* FNMADDSx */
3784         if (!(ppc->impstate->drcoptions & PPCDRC_ACCURATE_SINGLES))
3785            return generate_instruction_3f(block, compiler, desc);
36153786         UML_FDMUL(block, FREG(0), F64(G_RA(op)), F64(G_REGC(op)));                  // fdmul   f0,ra,rc
36163787         UML_FDADD(block, FREG(0), FREG(0), F64(G_RB(op)));                        // fdadd   f0,f0,rb
36173788         UML_FDNEG(block, FREG(0), FREG(0));                                    // fdneg   f0,f0
r2844r2845
36193790         return TRUE;
36203791
36213792      case 0x1e:   /* FNMSUBSx */
3793         if (!(ppc->impstate->drcoptions & PPCDRC_ACCURATE_SINGLES))
3794            return generate_instruction_3f(block, compiler, desc);
36223795         UML_FDMUL(block, FREG(0), F64(G_RA(op)), F64(G_REGC(op)));                  // fdmul   f0,ra,rc
36233796         UML_FDSUB(block, FREG(0), F64(G_RB(op)), FREG(0));                        // fdsub   f0,rb,f0
36243797         UML_FDRNDS(block, F64(G_RD(op)), FREG(0));                              // fdrnds  rd,f0
r2844r2845
37103883         case 0x020:   /* FCMPO */
37113884            UML_FDCMP(block, F64(G_RA(op)), F64(G_RB(op)));                        // fdcmp   ra,rb
37123885            UML_GETFLGS(block, IREG(0), DRCUML_FLAG_C | DRCUML_FLAG_Z | DRCUML_FLAG_U);   // getflgs i0,czu
3713            UML_LOAD(block, IREG(0), ppc->impstate->fcmp_cr_table, IREG(0), DWORD);      // load    i0,fcmp_cr_table,i0,dword
3714            UML_ROLINS(block, CR32, IREG(0), IMM(0), IMM(CRMASK(G_CRFD(op))));         // rolins  cr,i0,0,crmask[cr]
3886            UML_LOAD(block, IREG(0), ppc->impstate->fcmp_cr_table, IREG(0), BYTE);      // load    i0,fcmp_cr_table,i0,byte
3887            UML_OR(block, CR32(G_CRFD(op)), IREG(0), XERSO32);                     // or      [crn],i0,[xerso]
37153888            return TRUE;
37163889
37173890         case 0x00c:   /* FRSPx */
r2844r2845
37203893
37213894         case 0x00e:   /* FCTIWx */
37223895            UML_FDTOINT(block, IREG(0), F64(G_RB(op)), DWORD, DEFAULT);               // fdtoint i0,rb,dword,default
3723            UML_DAND(block, MEM(&ppc->impstate->tempdata), IREG(0), IMM(0xffffffff));   // dand    i0,i0,0xffffffff
3724            UML_FDMOV(block, F64(G_RD(op)), MEM(&ppc->impstate->tempdata));            // fdmovr  rd,i0
3896            UML_DAND(block, MEM(&ppc->impstate->tempdata.w.l), IREG(0), IMM(0xffffffff));// dand    i0,i0,0xffffffff
3897            UML_FDMOV(block, F64(G_RD(op)), MEM(&ppc->impstate->tempdata.w.l));         // fdmovr  rd,i0
37253898            return TRUE;
37263899
37273900         case 0x00f:   /* FCTIWZx */
37283901            UML_FDTOINT(block, IREG(0), F64(G_RB(op)), DWORD, TRUNC);               // fdtoint i0,rb,dword,default
3729            UML_DAND(block, MEM(&ppc->impstate->tempdata), IREG(0), IMM(0xffffffff));   // dand    i0,i0,0xffffffff
3730            UML_FDMOV(block, F64(G_RD(op)), MEM(&ppc->impstate->tempdata));            // fdmovr  rd,i0
3902            UML_DAND(block, MEM(&ppc->impstate->tempdata.w.l), IREG(0), IMM(0xffffffff));// dand    i0,i0,0xffffffff
3903            UML_FDMOV(block, F64(G_RD(op)), MEM(&ppc->impstate->tempdata.w.l));         // fdmovr  rd,i0
37313904            return TRUE;
37323905
37333906         case 0x028:   /* FNEGx */
r2844r2845
37563929            return TRUE;
37573930
37583931         case 0x040:   /* MCRFS */
3759            UML_ROLINS(block, CR32, FPSCR32, IMM(((G_CRFS(op) - G_CRFD(op)) & 7) * 4), IMM(CRMASK(G_CRFD(op))));
3760                                                                     // rolins  cr,fpscr,shift,crmask[crfd]
3932            UML_ROLAND(block, CR32(G_CRFD(op)), FPSCR32, IMM(((G_CRFS(op) - 7) & 7) * 4), IMM(0x0f));
3933                                                                     // roland  [crd],[fpscr],shift,0x0f
37613934            UML_AND(block, FPSCR32, FPSCR32, IMM(~CRMASK(G_CRFS(op))));               // and     fpscr,fpscr,~crmask[crfs]
37623935            return TRUE;
37633936
37643937         case 0x247:   /* MFFSx */
3765            UML_MOV(block, R32(G_RD(op)), FPSCR32);                              // mov     rd,fpscr
3938            UML_MOV(block, MEM(&ppc->impstate->tempdata.w.l), FPSCR32);               // mov     [tempdata],fpscr
3939            UML_FSMOV(block, F64(G_RD(op)), MEM(&ppc->impstate->tempdata.d));         // fsmov   rd,fpscr
37663940            return TRUE;
37673941
37683942         case 0x2c7:   /* MTFSFx */
3769            UML_ROLINS(block, FPSCR32, R32(G_RB(op)), IMM(0), IMM(compute_crf_mask(G_FM(op))));
3943            UML_FDMOV(block, MEM(&ppc->impstate->tempdata.d), F64(G_RB(op)));         // fdmov   [tempdata],fb
3944            UML_ROLINS(block, FPSCR32, MEM(&ppc->impstate->tempdata.w.l), IMM(0), IMM(compute_crf_mask(G_FM(op))));
37703945                                                                     // rolins  fpscr,rb,0,crf_mask
37713946            return TRUE;
37723947
37733948         case 0x086:   /* MTFSFIx */
3774            UML_ROLINS(block, FPSCR32, R32(G_IMM(op)), IMM(28 - 4 * G_CRFD(op)), IMM(CRMASK(G_CRFD(op))));
3949            UML_ROLINS(block, FPSCR32, IMM(G_IMM(op)), IMM(28 - 4 * G_CRFD(op)), IMM(CRMASK(G_CRFD(op))));
37753950                                                                     // rolins  fpscr,rb,0,crf_mask
37763951            return TRUE;
37773952      }
r2844r2845
38614036    log_register_list - log a list of GPR registers
38624037-------------------------------------------------*/
38634038
3864static void log_register_list(drcuml_state *drcuml, const char *string, UINT64 gprmask, UINT64 fprmask)
4039static void log_register_list(drcuml_state *drcuml, const char *string, const UINT32 *reglist, const UINT32 *regnostarlist)
38654040{
4041   static const char *crtext[4] = { "lt", "gt", "eq", "so" };
38664042   int count = 0;
38674043   int regnum;
4044   int crnum;
38684045
38694046   /* skip if nothing */
3870   if ((gprmask & ~1) == 0 && fprmask == 0)
4047   if (reglist[0] == 0 && reglist[1] == 0 && reglist[2] == 0 && reglist[3] == 0)
38714048      return;
38724049
38734050   drcuml_log_printf(drcuml, "[%s:", string);
38744051
38754052   for (regnum = 0; regnum < 32; regnum++)
3876      if (gprmask & ((UINT64)1 << regnum))
4053      if (reglist[0] & REGFLAG_R(regnum))
4054      {
38774055         drcuml_log_printf(drcuml, "%sr%d", (count++ == 0) ? "" : ",", regnum);
4056         if (regnostarlist != NULL && !(regnostarlist[0] & REGFLAG_R(regnum)))
4057            drcuml_log_printf(drcuml, "*");
4058      }
4059
4060   for (regnum = 0; regnum < 32; regnum++)
4061      if (reglist[1] & REGFLAG_FR(regnum))
4062      {
4063         drcuml_log_printf(drcuml, "%sfr%d", (count++ == 0) ? "" : ",", regnum);
4064         if (regnostarlist != NULL && !(regnostarlist[1] & REGFLAG_FR(regnum)))
4065            drcuml_log_printf(drcuml, "*");
4066      }
4067
38784068   for (regnum = 0; regnum < 8; regnum++)
3879      if (gprmask & ((UINT64)1 << (32 + regnum)))
3880         drcuml_log_printf(drcuml, "%scr%d", (count++ == 0) ? "" : ",", regnum);
3881   if (gprmask & ((UINT64)1 << 40))
3882      drcuml_log_printf(drcuml, "%sxer", (count++ == 0) ? "" : ",");
3883   if (gprmask & ((UINT64)1 << 41))
4069      if (reglist[2] & REGFLAG_CR(regnum))
4070      {
4071         if ((reglist[2] & REGFLAG_CR(regnum)) == REGFLAG_CR(regnum) && (regnostarlist == NULL || (regnostarlist[2] & REGFLAG_CR(regnum)) == REGFLAG_CR(regnum)))
4072         {
4073            drcuml_log_printf(drcuml, "%scr%d", (count++ == 0) ? "" : ",", regnum);
4074            if (regnostarlist != NULL && !(regnostarlist[2] & REGFLAG_CR(regnum)))
4075               drcuml_log_printf(drcuml, "*");
4076         }
4077         else
4078         {
4079            for (crnum = 0; crnum < 4; crnum++)
4080               if (reglist[2] & REGFLAG_CR_BIT(regnum * 4 + crnum))
4081               {
4082                  drcuml_log_printf(drcuml, "%scr%d[%s]", (count++ == 0) ? "" : ",", regnum, crtext[crnum]);
4083                  if (regnostarlist != NULL && !(regnostarlist[2] & REGFLAG_CR_BIT(regnum * 4 + crnum)))
4084                     drcuml_log_printf(drcuml, "*");
4085               }
4086         }
4087      }
4088
4089   if (reglist[3] & REGFLAG_XER_CA)
4090   {
4091      drcuml_log_printf(drcuml, "%sxer_ca", (count++ == 0) ? "" : ",");
4092      if (regnostarlist != NULL && !(regnostarlist[3] & REGFLAG_XER_CA))
4093         drcuml_log_printf(drcuml, "*");
4094   }
4095   if (reglist[3] & REGFLAG_XER_OV)
4096   {
4097      drcuml_log_printf(drcuml, "%sxer_ov", (count++ == 0) ? "" : ",");
4098      if (regnostarlist != NULL && !(regnostarlist[3] & REGFLAG_XER_OV))
4099         drcuml_log_printf(drcuml, "*");
4100   }
4101   if (reglist[3] & REGFLAG_XER_SO)
4102   {
4103      drcuml_log_printf(drcuml, "%sxer_so", (count++ == 0) ? "" : ",");
4104      if (regnostarlist != NULL && !(regnostarlist[3] & REGFLAG_XER_SO))
4105         drcuml_log_printf(drcuml, "*");
4106   }
4107   if (reglist[3] & REGFLAG_XER_COUNT)
4108   {
4109      drcuml_log_printf(drcuml, "%sxer_count", (count++ == 0) ? "" : ",");
4110      if (regnostarlist != NULL && !(regnostarlist[3] & REGFLAG_XER_COUNT))
4111         drcuml_log_printf(drcuml, "*");
4112   }
4113   if (reglist[3] & REGFLAG_CTR)
4114   {
38844115      drcuml_log_printf(drcuml, "%sctr", (count++ == 0) ? "" : ",");
3885   if (gprmask & ((UINT64)1 << 42))
4116      if (regnostarlist != NULL && !(regnostarlist[3] & REGFLAG_CTR))
4117         drcuml_log_printf(drcuml, "*");
4118   }
4119   if (reglist[3] & REGFLAG_LR)
4120   {
38864121      drcuml_log_printf(drcuml, "%slr", (count++ == 0) ? "" : ",");
4122      if (regnostarlist != NULL && !(regnostarlist[3] & REGFLAG_LR))
4123         drcuml_log_printf(drcuml, "*");
4124   }
38874125
3888   for (regnum = 0; regnum < 32; regnum++)
3889      if (fprmask & ((UINT64)1 << regnum))
3890         drcuml_log_printf(drcuml, "%sfpr%d", (count++ == 0) ? "" : ",", regnum);
3891   if (fprmask & ((UINT64)1 << 32))
3892      drcuml_log_printf(drcuml, "%sfpscr", (count++ == 0) ? "" : ",");
4126   for (regnum = 0; regnum < 8; regnum++)
4127      if (reglist[3] & REGFLAG_FPSCR(regnum))
4128      {
4129         drcuml_log_printf(drcuml, "%sfpscr%d", (count++ == 0) ? "" : ",", regnum);
4130         if (regnostarlist != NULL && !(regnostarlist[3] & REGFLAG_FPSCR(regnum)))
4131            drcuml_log_printf(drcuml, "*");
4132      }
4133
38934134   drcuml_log_printf(drcuml, "] ");
38944135}
38954136
r2844r2845
39214162      drcuml_log_printf(drcuml, "%08X [%08X] t:%08X f:%s: %-30s", desclist->pc, desclist->physpc, desclist->targetpc, log_desc_flags_to_string(desclist->flags), buffer);
39224163
39234164      /* output register states */
3924      log_register_list(drcuml, "use", desclist->gpr.used, desclist->fpr.used);
3925      log_register_list(drcuml, "mod", desclist->gpr.modified, desclist->fpr.modified);
3926      log_register_list(drcuml, "lrd", desclist->gpr.liveread, desclist->fpr.liveread);
3927      log_register_list(drcuml, "lwr", desclist->gpr.livewrite, desclist->fpr.livewrite);
4165      log_register_list(drcuml, "use", desclist->regin, NULL);
4166      log_register_list(drcuml, "mod", desclist->regout, desclist->regreq);
39284167      drcuml_log_printf(drcuml, "\n");
39294168
39304169      /* if we have a delay slot, output it recursively */
src/emu/cpu/powerpc/ppccom.c
r2844r2845
1414    DEBUGGING
1515***************************************************************************/
1616 
17#define PRINTF_TLB_FILL         (0)
17#define PRINTF_TLB_FILL         (1)
1818#define PRINTF_SPU            (0)
1919#define PRINTF_DECREMENTER      (0)
2020 
r2844r2845
106106 
107107 
108108/*-------------------------------------------------
109    get_cr - return the current CR value
110-------------------------------------------------*/
111 
112INLINE UINT32 get_cr(powerpc_state *ppc)
113{
114   return    ((ppc->cr[0] & 0x0f) << 28) |
115         ((ppc->cr[1] & 0x0f) << 24) |
116         ((ppc->cr[2] & 0x0f) << 20) |
117         ((ppc->cr[3] & 0x0f) << 16) |
118         ((ppc->cr[4] & 0x0f) << 12) |
119         ((ppc->cr[5] & 0x0f) << 8) |
120         ((ppc->cr[6] & 0x0f) << 4) |
121         ((ppc->cr[7] & 0x0f) << 0);
122}
123 
124 
125/*-------------------------------------------------
126    set_cr - set the current CR value
127-------------------------------------------------*/
128 
129INLINE void set_cr(powerpc_state *ppc, UINT32 value)
130{
131   ppc->cr[0] = value >> 28;
132   ppc->cr[1] = value >> 24;
133   ppc->cr[2] = value >> 20;
134   ppc->cr[3] = value >> 16;
135   ppc->cr[4] = value >> 12;
136   ppc->cr[5] = value >> 8;
137   ppc->cr[6] = value >> 4;
138   ppc->cr[7] = value >> 0;
139}
140 
141 
142/*-------------------------------------------------
143    get_xer - return the current XER value
144-------------------------------------------------*/
145 
146INLINE UINT32 get_xer(powerpc_state *ppc)
147{
148   return ppc->spr[SPR_XER] | (ppc->xerso << 31);
149}
150 
151 
152/*-------------------------------------------------
153    set_xer - set the current XER value
154-------------------------------------------------*/
155 
156INLINE void set_xer(powerpc_state *ppc, UINT32 value)
157{
158   ppc->spr[SPR_XER] = value & ~XER_SO;
159   ppc->xerso = value >> 31;
160}
161 
162 
163/*-------------------------------------------------
109164    get_timebase - return the current timebase
110165    value
111166-------------------------------------------------*/
r2844r2845
422477   offs_t transaddr = address;
423478   UINT32 entryval;
424479 
425   /* allow for an implementation-specific override */
426   if (ppc->tlb_fill != NULL && (*ppc->tlb_fill)(ppc))
427      return;
480   /* 4xx case: "TLB" really just caches writes and checks compare registers */
481   if (ppc->cap & PPCCAP_4XX)
482   {
483      /* assume success and direct translation */
484      ppc->param0 = 1;
485      transaddr = address & 0x7fffffff;
428486 
429   /* if we can't translate the address, just return (and fail) */
430   ppc->param0 = ppccom_translate_address_internal(ppc, transtype | transuser, &transaddr);
487      /* we don't support the MMU of the 403GCX */
488      if (ppc->flavor == PPC_MODEL_403GCX && (ppc->msr & MSROEA_DR))
489         fatalerror("MMU enabled but not supported!");
490 
491      /* only check if PE is enabled */
492      if (transtype == TRANSLATE_WRITE && (ppc->msr & MSR4XX_PE))
493      {
494         /* are we within one of the protection ranges? */
495         int inrange1 = ((address >> 12) >= (ppc->spr[SPR4XX_PBL1] >> 12) && (address >> 12) < (ppc->spr[SPR4XX_PBU1] >> 12));
496         int inrange2 = ((address >> 12) >= (ppc->spr[SPR4XX_PBL2] >> 12) && (address >> 12) < (ppc->spr[SPR4XX_PBU2] >> 12));
497 
498         /* if PX == 1, writes are only allowed OUTSIDE of the bounds */
499         if (((ppc->msr & MSR4XX_PX) && (inrange1 || inrange2)) || (!(ppc->msr & MSR4XX_PX) && (!inrange1 && !inrange2)))
500            ppc->param0 = 2;
501      }
502   }
503 
504   /* OEA case: perform an address translation */
505   else
506      ppc->param0 = ppccom_translate_address_internal(ppc, transtype | transuser, &transaddr);
507 
508   /* log information and return upon failure */
431509   if (PRINTF_TLB_FILL)
432      printf("tlb_fill: %08X (%s%s) -> ", address, (transtype == TRANSLATE_READ) ? "R" : (transtype == TRANSLATE_WRITE) ? "W" : "F", transuser ? " U" : "S");
510      printf("tlb_fill: %08X (%s%s) -> ", address, (transtype == TRANSLATE_READ) ? "R" : (transtype == TRANSLATE_WRITE) ? "W" : "F", transuser ? "U" : "S");
433511   if (ppc->param0 > 1)
434512   {
435513      if (PRINTF_TLB_FILL)
r2844r2845
620698         /* read-through no-ops */
621699         case SPR4XX_EVPR:
622700         case SPR4XX_ESR:
623         case SPR4XX_DCCR:
624         case SPR4XX_ICCR:
625701         case SPR4XX_SRR0:
626702         case SPR4XX_SRR1:
627703         case SPR4XX_SRR2:
628704         case SPR4XX_SRR3:
629705         case SPR4XX_TCR:
630706         case SPR4XX_TSR:
707         case SPR4XX_IAC1:
708         case SPR4XX_IAC2:
709         case SPR4XX_DAC1:
710         case SPR4XX_DAC2:
711         case SPR4XX_DCCR:
712         case SPR4XX_ICCR:
713         case SPR4XX_PBL1:
714         case SPR4XX_PBU1:
715         case SPR4XX_PBL2:
716         case SPR4XX_PBU2:
631717            ppc->param1 = ppc->spr[ppc->param0];
632718            return;
633719 
r2844r2845
751837            ppc->spr[ppc->param0] = ppc->param1;
752838            return;
753839 
840         /* registers that affect the memory map */
841         case SPR4XX_PBL1:
842         case SPR4XX_PBU1:
843         case SPR4XX_PBL2:
844         case SPR4XX_PBU2:
845            ppc->spr[ppc->param0] = ppc->param1;
846            ppccom_tlb_flush(ppc);
847            return;
848 
754849         /* timer control register */
755850         case SPR4XX_TCR:
756851            ppc->spr[SPR4XX_TCR] = ppc->param1 | (oldval & PPC4XX_TCR_WRC_MASK);
r2844r2845
814909      case DCR4XX_DMADA0:
815910      case DCR4XX_DMASA0:
816911      case DCR4XX_DMACC0:
912      case DCR4XX_DMACR0:
817913      case DCR4XX_DMACT1:
818914      case DCR4XX_DMADA1:
819915      case DCR4XX_DMASA1:
820916      case DCR4XX_DMACC1:
917      case DCR4XX_DMACR1:
821918      case DCR4XX_DMACT2:
822919      case DCR4XX_DMADA2:
823920      case DCR4XX_DMASA2:
824921      case DCR4XX_DMACC2:
922      case DCR4XX_DMACR2:
825923      case DCR4XX_DMACT3:
826924      case DCR4XX_DMADA3:
827925      case DCR4XX_DMASA3:
828926      case DCR4XX_DMACC3:
927      case DCR4XX_DMACR3:
829928      case DCR4XX_EXIER:
830929      case DCR4XX_EXISR:
831930      case DCR4XX_IOCR:
r2844r2845
9481047      case CPUINFO_INT_PC:
9491048      case CPUINFO_INT_REGISTER + PPC_PC:            ppc->pc = info->i;                  break;
9501049      case CPUINFO_INT_REGISTER + PPC_MSR:         ppc->msr = info->i;                  break;
951      case CPUINFO_INT_REGISTER + PPC_CR:            ppc->cr = info->i;                  break;
1050      case CPUINFO_INT_REGISTER + PPC_CR:            set_cr(ppc, info->i);               break;
9521051      case CPUINFO_INT_REGISTER + PPC_LR:            ppc->spr[SPR_LR] = info->i;            break;
9531052      case CPUINFO_INT_REGISTER + PPC_CTR:         ppc->spr[SPR_CTR] = info->i;         break;
954      case CPUINFO_INT_REGISTER + PPC_XER:         ppc->spr[SPR_XER] = info->i;          break;
1053      case CPUINFO_INT_REGISTER + PPC_XER:         set_xer(ppc, info->i);                break;
9551054      case CPUINFO_INT_REGISTER + PPC_SRR0:         ppc->spr[SPROEA_SRR0] = info->i;      break;
9561055      case CPUINFO_INT_REGISTER + PPC_SRR1:         ppc->spr[SPROEA_SRR1] = info->i;      break;
9571056      case CPUINFO_INT_REGISTER + PPC_SPRG0:         ppc->spr[SPROEA_SPRG0] = info->i;      break;
r2844r2845
9631062      case CPUINFO_INT_REGISTER + PPC_EXISR:         ppc->dcr[DCR4XX_EXISR] = info->i;      break;
9641063      case CPUINFO_INT_REGISTER + PPC_EVPR:         ppc->spr[SPR4XX_EVPR] = info->i;      break;
9651064      case CPUINFO_INT_REGISTER + PPC_IOCR:         ppc->dcr[DCR4XX_IOCR] = info->i;      break;
1065      case CPUINFO_INT_REGISTER + PPC_TBL:         set_timebase(ppc, (get_timebase(ppc) & ~U64(0x00ffffff00000000)) | info->i); break;
1066      case CPUINFO_INT_REGISTER + PPC_TBH:         set_timebase(ppc, (get_timebase(ppc) & ~U64(0x00000000ffffffff)) | ((UINT64)(ppc->param1 & 0x00ffffff) << 32)); break;
1067      case CPUINFO_INT_REGISTER + PPC_DEC:         set_decrementer(ppc, info->i);         break;
9661068 
9671069      case CPUINFO_INT_REGISTER + PPC_R0:            ppc->r[0] = info->i;               break;
9681070      case CPUINFO_INT_REGISTER + PPC_R1:            ppc->r[1] = info->i;               break;
r2844r2845
10351137      case CPUINFO_INT_PC:
10361138      case CPUINFO_INT_REGISTER + PPC_PC:            info->i = ppc->pc;                  break;
10371139      case CPUINFO_INT_REGISTER + PPC_MSR:         info->i = ppc->msr;                  break;
1038      case CPUINFO_INT_REGISTER + PPC_CR:            info->i = ppc->cr;                  break;
1140      case CPUINFO_INT_REGISTER + PPC_CR:            info->i = get_cr(ppc);               break;
10391141      case CPUINFO_INT_REGISTER + PPC_LR:            info->i = ppc->spr[SPR_LR];            break;
10401142      case CPUINFO_INT_REGISTER + PPC_CTR:         info->i = ppc->spr[SPR_CTR];         break;
1041      case CPUINFO_INT_REGISTER + PPC_XER:         info->i = ppc->spr[SPR_XER];          break;
1143      case CPUINFO_INT_REGISTER + PPC_XER:         info->i = get_xer(ppc);               break;
10421144      case CPUINFO_INT_REGISTER + PPC_SRR0:         info->i = ppc->spr[SPROEA_SRR0];      break;
10431145      case CPUINFO_INT_REGISTER + PPC_SRR1:         info->i = ppc->spr[SPROEA_SRR1];      break;
10441146      case CPUINFO_INT_REGISTER + PPC_SPRG0:         info->i = ppc->spr[SPROEA_SPRG0];      break;
r2844r2845
10501152      case CPUINFO_INT_REGISTER + PPC_EXISR:         info->i = ppc->dcr[DCR4XX_EXISR];      break;
10511153      case CPUINFO_INT_REGISTER + PPC_EVPR:         info->i = ppc->spr[SPR4XX_EVPR];      break;
10521154      case CPUINFO_INT_REGISTER + PPC_IOCR:         info->i = ppc->dcr[DCR4XX_IOCR];      break;
1155      case CPUINFO_INT_REGISTER + PPC_TBH:         info->i = get_timebase(ppc) >> 32;      break;
1156      case CPUINFO_INT_REGISTER + PPC_TBL:         info->i = (UINT32)get_timebase(ppc);   break;
1157      case CPUINFO_INT_REGISTER + PPC_DEC:         info->i = get_decrementer(ppc);         break;
10531158 
10541159      case CPUINFO_INT_REGISTER + PPC_R0:            info->i = ppc->r[0];               break;
10551160      case CPUINFO_INT_REGISTER + PPC_R1:            info->i = ppc->r[1];               break;
r2844r2845
11081213 
11091214      case CPUINFO_STR_REGISTER + PPC_PC:            sprintf(info->s, "PC: %08X", ppc->pc);            break;
11101215      case CPUINFO_STR_REGISTER + PPC_MSR:         sprintf(info->s, "MSR:%08X", ppc->msr);            break;
1111      case CPUINFO_STR_REGISTER + PPC_CR:            sprintf(info->s, "CR: %08X", ppc->cr);            break;
1216      case CPUINFO_STR_REGISTER + PPC_CR:            sprintf(info->s, "CR: %08X", get_cr(ppc));         break;
11121217      case CPUINFO_STR_REGISTER + PPC_LR:            sprintf(info->s, "LR: %08X", ppc->spr[SPR_LR]);      break;
11131218      case CPUINFO_STR_REGISTER + PPC_CTR:         sprintf(info->s, "CTR:%08X", ppc->spr[SPR_CTR]);   break;
1114      case CPUINFO_STR_REGISTER + PPC_XER:         sprintf(info->s, "XER:%08X", ppc->spr[SPR_XER]);    break;
1219      case CPUINFO_STR_REGISTER + PPC_XER:         sprintf(info->s, "XER:%08X", get_xer(ppc));          break;
11151220      case CPUINFO_STR_REGISTER + PPC_SRR0:         sprintf(info->s, "SRR0: %08X", ppc->spr[SPROEA_SRR0]);   break;
11161221      case CPUINFO_STR_REGISTER + PPC_SRR1:         sprintf(info->s, "SRR1: %08X", ppc->spr[SPROEA_SRR1]);   break;
11171222      case CPUINFO_STR_REGISTER + PPC_SPRG0:         sprintf(info->s, "SPRG0: %08X", ppc->spr[SPROEA_SPRG0]); break;
r2844r2845
11231228      case CPUINFO_STR_REGISTER + PPC_EXISR:         sprintf(info->s, "EXISR: %08X", ppc->dcr[DCR4XX_EXISR]); break;
11241229      case CPUINFO_STR_REGISTER + PPC_EVPR:         sprintf(info->s, "EVPR: %08X", ppc->spr[SPR4XX_EVPR]); break;
11251230      case CPUINFO_STR_REGISTER + PPC_IOCR:         sprintf(info->s, "IOCR: %08X", ppc->dcr[DCR4XX_EXISR]); break;
1231      case CPUINFO_STR_REGISTER + PPC_TBH:         sprintf(info->s, "TBH: %08X", (UINT32)(get_timebase(ppc) >> 32)); break;
1232      case CPUINFO_STR_REGISTER + PPC_TBL:         sprintf(info->s, "TBL: %08X", (UINT32)get_timebase(ppc)); break;
1233      case CPUINFO_STR_REGISTER + PPC_DEC:         sprintf(info->s, "DEC: %08X", get_decrementer(ppc)); break;
11261234 
11271235      case CPUINFO_STR_REGISTER + PPC_R0:            sprintf(info->s, "R0: %08X", ppc->r[0]); break;
11281236      case CPUINFO_STR_REGISTER + PPC_R1:            sprintf(info->s, "R1: %08X", ppc->r[1]); break;
r2844r2845
12521360 
12531361   /* update the IRQ state for each DMA channel */
12541362   for (dmachan = 0; dmachan < 4; dmachan++)
1255      if ((ppc->dcr[DCR4XX_DMACR0 + 8 * dmachan] & PPC4XX_DMACR_CIE) && (ppc->dcr[DCR4XX_DMASR] & (1 << (27 - dmachan))))
1363      if ((ppc->dcr[DCR4XX_DMACR0 + 8 * dmachan] & PPC4XX_DMACR_CIE) && (ppc->dcr[DCR4XX_DMASR] & (0x11 << (27 - dmachan))))
12561364         ppc4xx_set_irq_line(ppc, PPC4XX_IRQ_BIT_DMA(dmachan), ASSERT_LINE);
12571365      else
12581366         ppc4xx_set_irq_line(ppc, PPC4XX_IRQ_BIT_DMA(dmachan), CLEAR_LINE);
r2844r2845
12771385      return FALSE;
12781386 
12791387   /* set the complete bit and handle interrupts */
1280   ppc->dcr[DCR4XX_DMASR] |= 1 << (27 - dmachan);
1388   ppc->dcr[DCR4XX_DMASR] |= 1 << (31 - dmachan);
1389//  ppc->dcr[DCR4XX_DMASR] |= 1 << (27 - dmachan);
12811390   ppc4xx_dma_update_irq_states(ppc);
12821391   return TRUE;
12831392}
r2844r2845
13721481 
13731482      /* software initiated memory-to-memory mode DMA */
13741483      case 2:
1375         width = dma_transfer_width[(dmaregs[DCR4XX_DMACR0] >> 26) & 0x3];
1484         width = dma_transfer_width[(dmaregs[DCR4XX_DMACR0] & PPC4XX_DMACR_PW_MASK) >> 26];
13761485         srcinc = (dmaregs[DCR4XX_DMACR0] & PPC4XX_DMACR_SAI) ? width : 0;
13771486         destinc = (dmaregs[DCR4XX_DMACR0] & PPC4XX_DMACR_DAI) ? width : 0;
13781487 
r2844r2845
15291638 
15301639static void ppc4xx_spu_rx_data(powerpc_state *ppc, UINT8 data)
15311640{
1532   fatalerror("ppc4xx_spu_rx_data unimplemented\n");
1641   UINT32 new_rxin;
1642 
1643   /* fail if we are going to overflow */
1644   new_rxin = (ppc->spu.rxin + 1) % ARRAY_LENGTH(ppc->spu.rxbuffer);
1645   if (new_rxin == ppc->spu.rxout)
1646      fatalerror("ppc4xx_spu_rx_data: buffer overrun!");
1647 
1648   /* store the data and accept the new in index */
1649   ppc->spu.rxbuffer[ppc->spu.rxin] = data;
1650   ppc->spu.rxin = new_rxin;
15331651}
15341652 
15351653 
r2844r2845
15511669      attotime charperiod = attotime_mul(clockperiod, divisor * 16 * bpc);
15521670      timer_adjust_periodic(ppc->spu.timer, charperiod, 0, charperiod);
15531671      if (PRINTF_SPU)
1554         mame_printf_debug("ppc4xx_spu_timer_reset: baud rate = %.0f\n", ATTOSECONDS_TO_HZ(charperiod.attoseconds) * bpc);
1672         printf("ppc4xx_spu_timer_reset: baud rate = %.0f\n", ATTOSECONDS_TO_HZ(charperiod.attoseconds) * bpc);
15551673   }
15561674 
15571675   /* otherwise, disable the timer */
r2844r2845
15681686static TIMER_CALLBACK( ppc4xx_spu_callback )
15691687{
15701688   powerpc_state *ppc = ptr;
1571   UINT8 rxbyte;
15721689 
15731690   /* transmit enabled? */
15741691   if (ppc->spu.regs[SPU4XX_TX_COMMAND] & 0x80)
r2844r2845
15981715 
15991716   /* receive enabled? */
16001717   if (ppc->spu.regs[SPU4XX_RX_COMMAND] & 0x80)
1601      if (ppc->spu.rx_handler != NULL && (*ppc->spu.rx_handler)(&rxbyte))
1718      if (ppc->spu.rxout != ppc->spu.rxin)
16021719      {
16031720         int operation = (ppc->spu.regs[SPU4XX_RX_COMMAND] >> 5) & 3;
1721         UINT8 rxbyte;
16041722 
1723         /* consume the byte and advance the out pointer */
1724         rxbyte = ppc->spu.rxbuffer[ppc->spu.rxout];
1725         ppc->spu.rxout = (ppc->spu.rxout + 1) % ARRAY_LENGTH(ppc->spu.rxbuffer);
1726 
16051727         /* if we're not full, copy data to the buffer and update the line status */
16061728         if (!(ppc->spu.regs[SPU4XX_LINE_STATUS] & 0x80))
16071729         {
r2844r2845
16491771         break;
16501772   }
16511773   if (PRINTF_SPU)
1652      mame_printf_debug("spu_r(%d) = %02X\n", offset, result);
1774      printf("spu_r(%d) = %02X\n", offset, result);
16531775   return result;
16541776}
16551777 
r2844r2845
16641786   UINT8 oldstate, newstate;
16651787 
16661788   if (PRINTF_SPU)
1667      mame_printf_debug("spu_w(%d) = %02X\n", offset, data);
1789      printf("spu_w(%d) = %02X\n", offset, data);
16681790   switch (offset)
16691791   {
16701792      /* clear error bits */
r2844r2845
17481870      case CPUINFO_INT_PPC_RX_DATA:               ppc4xx_spu_rx_data(ppc, info->i);               break;
17491871 
17501872      /* --- the following bits of info are returned as pointers to data or functions --- */
1751      case CPUINFO_PTR_SPU_RX_HANDLER:            ppc->spu.rx_handler = (ppc4xx_spu_rx_handler)info->f; break;
17521873      case CPUINFO_PTR_SPU_TX_HANDLER:            ppc->spu.tx_handler = (ppc4xx_spu_tx_handler)info->f; break;
17531874 
17541875      /* --- everything else is handled generically --- */
r2844r2845
17751896      case CPUINFO_INT_INPUT_STATE + PPC_IRQ_LINE_4:   info->i = ppc4xx_get_irq_line(ppc, PPC4XX_IRQ_BIT_EXT4);      break;
17761897 
17771898      case CPUINFO_INT_DATABUS_WIDTH + ADDRESS_SPACE_PROGRAM:   info->i = 32;               break;
1899      case CPUINFO_INT_ADDRBUS_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 31;               break;
17781900      case CPUINFO_INT_LOGADDR_WIDTH + ADDRESS_SPACE_PROGRAM: info->i = 0;               break;
17791901      case CPUINFO_INT_PAGE_SHIFT + ADDRESS_SPACE_PROGRAM:    info->i = 0;               break;
17801902 
src/emu/cpu/powerpc/ppccom.h
r2844r2845
1414 
1515 
1616/***************************************************************************
17    WIDE-SCALE CONTROLS
18***************************************************************************/
19 
20#define SIMULATE_603_TLB            (0)
21 
22 
23 
24/***************************************************************************
2517    CONSTANTS
2618***************************************************************************/
2719 
r2844r2845
3325#define PPC603_FIXED_TLB_ENTRIES   128
3426 
3527 
28/* cycle parameters */
29#define POWERPC_COUNT_READ_TBL      100
30#define POWERPC_COUNT_READ_DEC      100
31 
32 
3633/* internal capabilities flags */
3734#define PPCCAP_OEA               0x01      /* TRUE if we conform to the OEA */
3835#define PPCCAP_VEA               0x02      /* TRUE if we conform to the VEA */
r2844r2845
8784{
8885   EXCEPTION_RESET      = 1,
8986   EXCEPTION_MACHCHECK   = 2,
90   EXCEPTION_DSI      = 3,
87   EXCEPTION_DSI      = 3,      /* PPCCAP_OEA */
88   EXCEPTION_PROTECTION= 3,      /* PPCCAP_4XX */
9189   EXCEPTION_ISI      = 4,
9290   EXCEPTION_EI      = 5,
9391   EXCEPTION_ALIGN      = 6,
r2844r2845
156154   SPR4XX_SPRG2      = 0x112,   /* R/W  403GA SPR General 2 */
157155   SPR4XX_SPRG3      = 0x113,   /* R/W  403GA SPR General 3 */
158156   SPR4XX_PVR         = 0x11f,   /* R    403GA Processor Version Number */
157   SPR4XX_PID         = 0x3b1,   /* R/W  403GCX Process ID */
159158   SPR4XX_SGR         = 0x3b9,   /* R/W  403GCX Storage Guarded Register */
160159   SPR4XX_DCWR         = 0x3ba,   /* R/W  403GCX Data Cache Write Through */
161   SPR4XX_PID         = 0x3b1,   /* R/W  403GCX Process ID */
162160   SPR4XX_TBHU         = 0x3cc,   /* R/W  403GCX Time Base High User-mode */
163161   SPR4XX_TBLU         = 0x3cd,   /* R/W  403GCX Time Base Low User-mode */
164162   SPR4XX_ICDBDR      = 0x3d3,   /* R    403GA 406GA Instruction Cache Debug Data Register */
r2844r2845
493491    STRUCTURES & TYPEDEFS
494492***************************************************************************/
495493 
496typedef int (*ppc4xx_spu_rx_handler)(UINT8 *data);
497typedef void (*ppc4xx_spu_tx_handler)(UINT8 data);
498 
499 
500494/* PowerPC 4XX-specific serial port state */
501495typedef struct _ppc4xx_spu_state ppc4xx_spu_state;
502496struct _ppc4xx_spu_state
r2844r2845
505499   UINT8         txbuf;
506500   UINT8         rxbuf;
507501   emu_timer *      timer;
508   ppc4xx_spu_rx_handler rx_handler;
502   UINT8         rxbuffer[256];
503   UINT32         rxin, rxout;
509504   ppc4xx_spu_tx_handler tx_handler;
510505};
511506 
r2844r2845
523518   int            icount;
524519   UINT32         r[32];
525520   double         f[32];
526   UINT32         cr;
521   UINT32         cr[8];
522   UINT32         xerso;
527523   UINT32         fpscr;
528524   UINT32         msr;
529525   UINT32         sr[16];
r2844r2845
544540   UINT8         cap;
545541   UINT8         cache_line_size;
546542   UINT32         tb_divisor;
547   int            (*spr_read)(powerpc_state *ppc);
548   int            (*spr_write)(powerpc_state *ppc);
549   int            (*tlb_fill)(powerpc_state *ppc);
550543 
551544   /* PowerPC 4xx-specific state */
552545   ppc4xx_spu_state spu;
src/emu/cpu/powerpc/ppc.h
r2844r2845
11/***************************************************************************
22
33    ppc.h
4    Interface file for the portable MIPS III/IV emulator.
5    Written by Aaron Giles
64
5    Interface file for the universal machine language-based
6    PowerPC emulator.
7
8    Copyright Aaron Giles
9    Released for general non-commercial use under the MAME license
10    Visit http://mamedev.org for licensing and usage restrictions.
11
712***************************************************************************/
813
914#ifndef __PPC_H__
r2844r2845
1318
1419
1520/***************************************************************************
16    REGISTER ENUMERATION
21    CONSTANTS
1722***************************************************************************/
1823
24/* general constants */
25#define PPC_MAX_FASTRAM         4
26#define PPC_MAX_HOTSPOTS      16
27
28
29/* interrupt types */
30#define PPC_IRQ               0      /* external IRQ */
31#define PPC_IRQ_LINE_0         0      /* (4XX) external IRQ0 */
32#define PPC_IRQ_LINE_1         1      /* (4XX) external IRQ1 */
33#define PPC_IRQ_LINE_2         2      /* (4XX) external IRQ2 */
34#define PPC_IRQ_LINE_3         3      /* (4XX) external IRQ3 */
35#define PPC_IRQ_LINE_4         4      /* (4XX) external IRQ4 */
36
37
38/* register enumeration */
1939enum
2040{
2141   PPC_PC = 1,
r2844r2845
6686   PPC_EXIER,
6787   PPC_EXISR,
6888   PPC_EVPR,
69   PPC_IOCR
89   PPC_IOCR,
90   PPC_TBL,
91   PPC_TBH,
92   PPC_DEC
7093};
7194
7295
73#define PPC_MAX_FASTRAM         4
74#define PPC_MAX_HOTSPOTS      16
75
76
96/* interface extensions */
7797enum
7898{
7999   CPUINFO_INT_PPC_DRC_OPTIONS = CPUINFO_INT_CPU_SPECIFIC,
r2844r2845
92112
93113   CPUINFO_PTR_PPC_FASTRAM_BASE = CPUINFO_PTR_CPU_SPECIFIC,
94114
95   CPUINFO_PTR_SPU_RX_HANDLER,
96115   CPUINFO_PTR_SPU_TX_HANDLER,
97116
98117   CPUINFO_PTR_CONTEXT         /* temporary */
99118};
100119
101120
121/* compiler-specific options */
122#define PPCDRC_STRICT_VERIFY      0x0001         /* verify all instructions */
123#define PPCDRC_FLUSH_PC            0x0002         /* flush the PC value before each memory access */
124#define PPCDRC_ACCURATE_SINGLES      0x0004         /* do excessive rounding to make single-precision results "accurate" */
102125
103/***************************************************************************
104    INTERRUPT CONSTANTS
105***************************************************************************/
106126
107#define PPC_IRQ            0      /* external IRQ */
108#define PPC_IRQ_LINE_0      0      /* (4XX) external IRQ0 */
109#define PPC_IRQ_LINE_1      1      /* (4XX) external IRQ1 */
110#define PPC_IRQ_LINE_2      2      /* (4XX) external IRQ2 */
111#define PPC_IRQ_LINE_3      3      /* (4XX) external IRQ3 */
112#define PPC_IRQ_LINE_4      4      /* (4XX) external IRQ4 */
127/* common sets of options */
128#define PPCDRC_COMPATIBLE_OPTIONS   (PPCDRC_STRICT_VERIFY | PPCDRC_FLUSH_PC | PPCDRC_ACCURATE_SINGLES)
129#define PPCDRC_FASTEST_OPTIONS      (0)
113130
114131
115132
116133/***************************************************************************
117    STRUCTURES
134    STRUCTURES AND TYPEDEFS
118135***************************************************************************/
119136
137typedef void (*ppc4xx_spu_tx_handler)(UINT8 data);
138
120139typedef struct _powerpc_config powerpc_config;
121140struct _powerpc_config
122141{
r2844r2845
168187
169188
170189/***************************************************************************
171    COMPILER-SPECIFIC OPTIONS
190    INLINE FUNCTIONS
172191***************************************************************************/
173192
174#define PPCDRC_STRICT_VERIFY      0x0001         /* verify all instructions */
175#define PPCDRC_FLUSH_PC            0x0002         /* flush the PC value before each memory access */
193INLINE void ppc4xx_spu_set_tx_handler(int cpunum, ppc4xx_spu_tx_handler handler)
194{
195   cpunum_set_info_fct(cpunum, CPUINFO_PTR_SPU_TX_HANDLER, (genf *)handler);
196}
176197
177#define PPCDRC_COMPATIBLE_OPTIONS   (PPCDRC_STRICT_VERIFY | PPCDRC_FLUSH_PC)
178#define PPCDRC_FASTEST_OPTIONS      (0)
179198
199INLINE void ppc4xx_spu_receive_byte(int cpunum, UINT8 byteval)
200{
201   cpunum_set_info_int(cpunum, CPUINFO_INT_PPC_RX_DATA, byteval);
202}
203
204
205
180206#endif   /* __PPC_H__ */
src/emu/cpu/powerpc/ppcfe.c
r2844r2845
1717 
1818 
1919/***************************************************************************
20    MACROS
21***************************************************************************/
22 
23#define GPR_USED(desc, x)         do { (desc)->regin[0] |= REGFLAG_R(x); } while (0)
24#define GPR_USED_OR_ZERO(desc, x)   do { (desc)->regin[0] |= ((x) == 0 ? 0 : REGFLAG_R(x)); } while (0)
25#define GPR_MODIFIED(desc, x)      do { (desc)->regout[0] |= REGFLAG_R(x); } while (0)
26 
27#define FPR_USED(desc, x)         do { (desc)->regin[1] |= REGFLAG_FR(x); } while (0)
28#define FPR_MODIFIED(desc, x)      do { (desc)->regout[1] |= REGFLAG_FR(x); } while (0)
29 
30#define CR_USED(desc, x)         do { (desc)->regin[2] |= REGFLAG_CR(x); } while (0)
31#define CR_BIT_USED(desc, x)      do { (desc)->regin[2] |= REGFLAG_CR_BIT(x); } while (0)
32#define CR_MODIFIED(desc, x)      do { (desc)->regout[2] |= REGFLAG_CR(x); } while (0)
33#define CR_BIT_MODIFIED(desc, x)   do { (desc)->regout[2] |= REGFLAG_CR_BIT(x); } while (0)
34 
35#define XER_CA_USED(desc)         do { (desc)->regin[3] |= REGFLAG_XER_CA; } while (0)
36#define XER_OV_USED(desc)         do { (desc)->regin[3] |= REGFLAG_XER_OV; } while (0)
37#define XER_SO_USED(desc)         do { (desc)->regin[3] |= REGFLAG_XER_SO; } while (0)
38#define XER_COUNT_USED(desc)      do { (desc)->regin[3] |= REGFLAG_XER_COUNT; } while (0)
39#define XER_CA_MODIFIED(desc)      do { (desc)->regout[3] |= REGFLAG_XER_CA; } while (0)
40#define XER_OV_MODIFIED(desc)      do { (desc)->regout[3] |= REGFLAG_XER_OV; } while (0)
41#define XER_SO_MODIFIED(desc)      do { (desc)->regout[3] |= REGFLAG_XER_SO; } while (0)
42#define XER_COUNT_MODIFIED(desc)   do { (desc)->regout[3] |= REGFLAG_XER_COUNT; } while (0)
43 
44#define CTR_USED(desc)            do { (desc)->regin[3] |= REGFLAG_CTR; } while (0)
45#define CTR_MODIFIED(desc)         do { (desc)->regout[3] |= REGFLAG_CTR; } while (0)
46#define LR_USED(desc)            do { (desc)->regin[3] |= REGFLAG_LR; } while (0)
47#define LR_MODIFIED(desc)         do { (desc)->regout[3] |= REGFLAG_LR; } while (0)
48 
49#define FPSCR_USED(desc, x)         do { (desc)->regin[3] |= REGFLAG_FPSCR(x); } while (0)
50#define FPSCR_MODIFIED(desc, x)      do { (desc)->regout[3] |= REGFLAG_FPSCR(x); } while (0)
51 
52 
53 
54/***************************************************************************
2055    FUNCTION PROTOTYPES
2156***************************************************************************/
2257 
r2844r2845
2863 
2964 
3065/***************************************************************************
66    INLINE FUNCTIONS
67***************************************************************************/
68 
69/*-------------------------------------------------
70    compute_spr - compute the SPR index from the
71    SPR field of an opcode
72-------------------------------------------------*/
73 
74INLINE UINT32 compute_spr(UINT32 spr)
75{
76   return ((spr >> 5) | (spr << 5)) & 0x3ff;
77}
78 
79 
80/*-------------------------------------------------
81    is_403_class - are we one of the 403 variants?
82-------------------------------------------------*/
83 
84INLINE int is_403_class(const powerpc_state *ppc)
85{
86   return (ppc->flavor == PPC_MODEL_403GA || ppc->flavor == PPC_MODEL_403GB || ppc->flavor == PPC_MODEL_403GC || ppc->flavor == PPC_MODEL_403GCX || ppc->flavor == PPC_MODEL_405GP);
87}
88 
89 
90/*-------------------------------------------------
91    is_601_class - are we one of the 601 variants?
92-------------------------------------------------*/
93 
94INLINE int is_601_class(const powerpc_state *ppc)
95{
96   return (ppc->flavor == PPC_MODEL_601);
97}
98 
99 
100/*-------------------------------------------------
101    is_603_class - are we one of the 603 variants?
102-------------------------------------------------*/
103 
104INLINE int is_603_class(const powerpc_state *ppc)
105{
106   return (ppc->flavor == PPC_MODEL_603 || ppc->flavor == PPC_MODEL_603E || ppc->flavor == PPC_MODEL_603EV || ppc->flavor == PPC_MODEL_603R);
107}
108 
109 
110 
111/***************************************************************************
31112    INSTRUCTION PARSERS
32113***************************************************************************/
33114 
r2844r2845
41122   powerpc_state *ppc = param;
42123   UINT32 op = *desc->opptr.l;
43124   UINT32 opswitch = op >> 26;
125   int regnum;
44126 
45127   /* all instructions are 4 bytes and default to a single cycle each */
46128   desc->length = 4;
r2844r2845
56138         return FALSE;
57139 
58140      case 0x03:   /* TWI */
59         desc->gpr.used |= REGFLAG_R(G_RA(op));
141         GPR_USED(desc, G_RA(op));
60142         desc->flags |= OPFLAG_CAN_CAUSE_EXCEPTION;
143         if (is_603_class(ppc))
144            desc->cycles = 2;   /* 603 */
61145         return TRUE;
62146 
63147      case 0x07:   /* MULLI */
64         desc->gpr.used |= REGFLAG_R(G_RA(op));
65         desc->gpr.modified |= REGFLAG_R(G_RD(op));
148         GPR_USED(desc, G_RA(op));
149         GPR_MODIFIED(desc, G_RD(op));
150         if (is_403_class(ppc))
151            desc->cycles = 4;   /* 4XX */
152         else if (is_601_class(ppc))
153            desc->cycles = 5;   /* 601 */
154         else if (is_603_class(ppc))
155            desc->cycles = 2;   /* 603: 2-3 */
156         else
157            desc->cycles = 2;   /* ??? */
66158         return TRUE;
67159 
68160      case 0x0e:   /* ADDI */
69161      case 0x0f:   /* ADDIS */
70         desc->gpr.used |= REGFLAG_RZ(G_RA(op));
71         desc->gpr.modified |= REGFLAG_R(G_RD(op));
162         GPR_USED_OR_ZERO(desc, G_RA(op));
163         GPR_MODIFIED(desc, G_RD(op));
72164         return TRUE;
73165 
74166      case 0x0a:   /* CMPLI */
75167      case 0x0b:   /* CMPI */
76         desc->gpr.used |= REGFLAG_R(G_RA(op)) | REGFLAG_XER;
77         desc->gpr.modified |= REGFLAG_CR(G_CRFD(op));
168         GPR_USED(desc, G_RA(op));
169         XER_SO_USED(desc);
170         CR_MODIFIED(desc, G_CRFD(op));
78171         return TRUE;
79172 
80173      case 0x08:   /* SUBFIC */
81174      case 0x0c:   /* ADDIC */
82         desc->gpr.used |= REGFLAG_R(G_RA(op));
83         desc->gpr.modified |= REGFLAG_R(G_RD(op)) | REGFLAG_XER;
175         GPR_USED(desc, G_RA(op));
176         GPR_MODIFIED(desc, G_RD(op));
177         XER_CA_MODIFIED(desc);
84178         return TRUE;
85179 
86180      case 0x0d:   /* ADDIC. */
87         desc->gpr.used |= REGFLAG_R(G_RA(op)) | REGFLAG_XER;
88         desc->gpr.modified |= REGFLAG_R(G_RT(op)) | REGFLAG_CR(0) | REGFLAG_XER;
181         GPR_USED(desc, G_RA(op));
182         XER_SO_USED(desc);
183         GPR_MODIFIED(desc, G_RT(op));
184         XER_CA_MODIFIED(desc);
185         CR_MODIFIED(desc, 0);
89186         return TRUE;
90187 
91188      case 0x10:   /* BCx */
92         desc->gpr.used |= REGFLAG_CR(G_BI(op) / 4);
93         if (op & M_LK) desc->gpr.modified |= REGFLAG_LR;
94         if (!(G_BO(op) & 4))
189         if (!(G_BO(op) & 0x10))
190            CR_BIT_USED(desc, G_BI(op));
191         if (!(G_BO(op) & 0x04))
95192         {
96            desc->gpr.used |= REGFLAG_CTR;
97            desc->gpr.modified |= REGFLAG_CTR;
193            CTR_USED(desc);
194            CTR_MODIFIED(desc);
98195         }
196         if (op & M_LK)
197            LR_MODIFIED(desc);
99198         if ((G_BO(op) & 0x14) == 0x14)
100199            desc->flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE;
101200         else
r2844r2845
107206         if (!(ppc->cap & (PPCCAP_OEA | PPCCAP_4XX)))
108207            return FALSE;
109208         desc->flags |= OPFLAG_WILL_CAUSE_EXCEPTION;
209         if (is_601_class(ppc))
210            desc->cycles = 16;   /* 601 */
211         else if (is_603_class(ppc))
212            desc->cycles = 3;   /* 603 */
213         else
214            desc->cycles = 3;   /* ??? */
110215         return TRUE;
111216 
112217      case 0x12:   /* Bx */
113         if (op & M_LK) desc->gpr.modified |= REGFLAG_LR;
218         if (op & M_LK)
219            LR_MODIFIED(desc);
114220         desc->flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE;
115221         desc->targetpc = ((INT32)(G_LI(op) << 8) >> 6) + ((op & M_AA) ? 0 : desc->pc);
116222         return TRUE;
r2844r2845
119225         return describe_instruction_13(ppc, op, desc);
120226 
121227      case 0x14:   /* RLWIMIx */
122         desc->gpr.used |= REGFLAG_R(G_RS(op)) | REGFLAG_R(G_RA(op));
123         desc->gpr.modified |= REGFLAG_R(G_RA(op));
228         GPR_USED(desc, G_RS(op));
229         GPR_USED(desc, G_RA(op));
230         GPR_MODIFIED(desc, G_RA(op));
124231         if (op & M_RC)
125232         {
126            desc->gpr.used |= REGFLAG_XER;
127            desc->gpr.modified |= REGFLAG_CR(0);
233            XER_SO_USED(desc);
234            CR_MODIFIED(desc, 0);
128235         }
129236         return TRUE;
130237 
131238      case 0x15:   /* RLWINMx */
132         desc->gpr.used |= REGFLAG_R(G_RS(op));
133         desc->gpr.modified |= REGFLAG_R(G_RA(op));
239         GPR_USED(desc, G_RS(op));
240         GPR_MODIFIED(desc, G_RA(op));
134241         if (op & M_RC)
135242         {
136            desc->gpr.used |= REGFLAG_XER;
137            desc->gpr.modified |= REGFLAG_CR(0);
243            XER_SO_USED(desc);
244            CR_MODIFIED(desc, 0);
138245         }
139246         return TRUE;
140247 
141248      case 0x17:   /* RLWNMx */
142         desc->gpr.used |= REGFLAG_R(G_RS(op)) | REGFLAG_R(G_RB(op));
143         desc->gpr.modified |= REGFLAG_R(G_RA(op));
249         GPR_USED(desc, G_RS(op));
250         GPR_USED(desc, G_RB(op));
251         GPR_MODIFIED(desc, G_RA(op));
144252         if (op & M_RC)
145253         {
146            desc->gpr.used |= REGFLAG_XER;
147            desc->gpr.modified |= REGFLAG_CR(0);
254            XER_SO_USED(desc);
255            CR_MODIFIED(desc, 0);
148256         }
149257         return TRUE;
150258 
r2844r2845
152260      case 0x19:   /* ORIS */
153261      case 0x1a:   /* XORI */
154262      case 0x1b:   /* XORIS */
155         desc->gpr.used |= REGFLAG_R(G_RS(op));
156         desc->gpr.modified |= REGFLAG_R(G_RA(op));
263         GPR_USED(desc, G_RS(op));
264         GPR_MODIFIED(desc, G_RA(op));
157265         return TRUE;
158266 
159267      case 0x1c:   /* ANDI. */
160268      case 0x1d:   /* ANDIS. */
161         desc->gpr.used |= REGFLAG_R(G_RS(op)) | REGFLAG_XER;
162         desc->gpr.modified |= REGFLAG_R(G_RA(op)) | REGFLAG_CR(0);
269         GPR_USED(desc, G_RS(op));
270         XER_SO_USED(desc);
271         GPR_MODIFIED(desc, G_RA(op));
272         CR_MODIFIED(desc, 0);
163273         return TRUE;
164274 
165275      case 0x1f:   /* 0x1f group */
r2844r2845
169279      case 0x22:   /* LBZ */
170280      case 0x28:   /* LHZ */
171281      case 0x2a:   /* LHA */
172         desc->gpr.used |= REGFLAG_RZ(G_RA(op));
173         desc->gpr.modified |= REGFLAG_R(G_RD(op));
282         GPR_USED_OR_ZERO(desc, G_RA(op));
283         GPR_MODIFIED(desc, G_RD(op));
174284         desc->flags |= OPFLAG_READS_MEMORY;
175285         return TRUE;
176286 
r2844r2845
178288      case 0x23:   /* LBZU */
179289      case 0x29:   /* LHZU */
180290      case 0x2b:   /* LHAU */
181         if (G_RA(op) == 0)
291         if (G_RA(op) == 0 || G_RA(op) == G_RD(op))
182292            return FALSE;
183         desc->gpr.used |= REGFLAG_R(G_RA(op));
184         desc->gpr.modified |= REGFLAG_R(G_RD(op)) | REGFLAG_R(G_RA(op));
293         GPR_USED(desc, G_RA(op));
294         GPR_MODIFIED(desc, G_RD(op));
295         GPR_MODIFIED(desc, G_RA(op));
185296         desc->flags |= OPFLAG_READS_MEMORY;
186297         return TRUE;
187298 
188299      case 0x24:   /* STW */
189300      case 0x26:   /* STB */
190301      case 0x2c:   /* STH */
191         desc->gpr.used |= REGFLAG_RZ(G_RA(op)) | REGFLAG_R(G_RS(op));
302         GPR_USED_OR_ZERO(desc, G_RA(op));
303         GPR_USED(desc, G_RS(op));
192304         desc->flags |= OPFLAG_WRITES_MEMORY;
193305         return TRUE;
194306 
r2844r2845
197309      case 0x2d:   /* STHU */
198310         if (G_RA(op) == 0)
199311            return FALSE;
200         desc->gpr.used |= REGFLAG_R(G_RA(op)) | REGFLAG_R(G_RS(op));
201         desc->gpr.modified |= REGFLAG_R(G_RA(op));
312         GPR_USED(desc, G_RA(op));
313         GPR_USED(desc, G_RS(op));
314         GPR_MODIFIED(desc, G_RA(op));
202315         desc->flags |= OPFLAG_WRITES_MEMORY;
203316         return TRUE;
204317 
205318      case 0x2e:   /* LMW */
206         desc->gpr.used |= REGFLAG_RZ(G_RA(op));
207         desc->gpr.modified |= ((REGFLAG_R(31) << 1) - 1) & ~(REGFLAG_R(G_RD(op)) - 1);
319         GPR_USED_OR_ZERO(desc, G_RA(op));
320         for (regnum = G_RD(op); regnum < 32; regnum++)
321            GPR_MODIFIED(desc, regnum);
208322         desc->flags |= OPFLAG_READS_MEMORY;
323         desc->cycles = 32 - G_RD(op);
209324         return TRUE;
210325 
211326      case 0x2f:   /* STMW */
212         desc->gpr.used |= REGFLAG_RZ(G_RA(op)) | (((REGFLAG_R(31) << 1) - 1) & ~(REGFLAG_R(G_RS(op)) - 1));
327         GPR_USED_OR_ZERO(desc, G_RA(op));
328         for (regnum = G_RS(op); regnum < 32; regnum++)
329            GPR_USED(desc, regnum);
213330         desc->flags |= OPFLAG_WRITES_MEMORY;
331         desc->cycles = 32 - G_RS(op);
214332         return TRUE;
215333 
216334      case 0x30:   /* LFS */
217335      case 0x32:   /* LFD */
218336         if (!(ppc->cap & PPCCAP_FPU))
219337            return FALSE;
220         desc->gpr.used |= REGFLAG_RZ(G_RA(op));
221         desc->fpr.modified |= REGFLAG_R(G_RD(op));
338         GPR_USED_OR_ZERO(desc, G_RA(op));
339         FPR_MODIFIED(desc, G_RD(op));
222340         desc->flags |= OPFLAG_READS_MEMORY;
223341         return TRUE;
224342 
r2844r2845
226344      case 0x33:   /* LFDU */
227345         if (!(ppc->cap & PPCCAP_FPU))
228346            return FALSE;
229         desc->gpr.used |= REGFLAG_RZ(G_RA(op));
230         desc->gpr.modified |= REGFLAG_R(G_RA(op));
231         desc->fpr.modified |= REGFLAG_R(G_RD(op));
347         if (G_RA(op) == 0)
348            return FALSE;
349         GPR_USED(desc, G_RA(op));
350         GPR_MODIFIED(desc, G_RA(op));
351         FPR_MODIFIED(desc, G_RD(op));
232352         desc->flags |= OPFLAG_READS_MEMORY;
233353         return TRUE;
234354 
r2844r2845
236356      case 0x36:   /* STFD */
237357         if (!(ppc->cap & PPCCAP_FPU))
238358            return FALSE;
239         desc->gpr.used |= REGFLAG_RZ(G_RA(op));
240         desc->fpr.used |= REGFLAG_R(G_RS(op));
359         GPR_USED_OR_ZERO(desc, G_RA(op));
360         FPR_USED(desc, G_RS(op));
241361         desc->flags |= OPFLAG_WRITES_MEMORY;
242362         return TRUE;
243363 
r2844r2845
245365      case 0x37:   /* STFDU */
246366         if (!(ppc->cap & PPCCAP_FPU))
247367            return FALSE;
248         desc->gpr.used |= REGFLAG_RZ(G_RA(op));
249         desc->gpr.modified |= REGFLAG_R(G_RA(op));
250         desc->fpr.used |= REGFLAG_R(G_RS(op));
368         if (G_RA(op) == 0)
369            return FALSE;
370         GPR_USED(desc, G_RA(op));
371         GPR_MODIFIED(desc, G_RA(op));
372         FPR_USED(desc, G_RS(op));
251373         desc->flags |= OPFLAG_WRITES_MEMORY;
252374         return TRUE;
253375 
r2844r2845
275397   switch (opswitch)
276398   {
277399      case 0x000:   /* MTCRF */
278         desc->gpr.used |= REGFLAG_CR(G_CRFS(op));
279         desc->gpr.modified |= REGFLAG_CR(G_CRFD(op));
400         CR_USED(desc, G_CRFS(op));
401         CR_MODIFIED(desc, G_CRFD(op));
280402         return TRUE;
281403 
282404      case 0x010:   /* BCLRx */
283         desc->gpr.used |= REGFLAG_CR(G_BI(op) / 4) | REGFLAG_LR;
284         if (op & M_LK) desc->gpr.modified |= REGFLAG_LR;
285         if (!(G_BO(op) & 4))
405         LR_USED(desc);
406         if (!(G_BO(op) & 0x10))
407            CR_BIT_USED(desc, G_BI(op));
408         if (!(G_BO(op) & 0x04))
286409         {
287            desc->gpr.used |= REGFLAG_CTR;
288            desc->gpr.modified |= REGFLAG_CTR;
410            CTR_USED(desc);
411            CTR_MODIFIED(desc);
289412         }
413         if (op & M_LK)
414            LR_MODIFIED(desc);
290415         if ((G_BO(op) & 0x14) == 0x14)
291416            desc->flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE;
292417         else
r2844r2845
302427      case 0x121:   /* CREQV */
303428      case 0x1a1:   /* CRORC */
304429      case 0x1c1:   /* CROR */
305         desc->gpr.used |= REGFLAG_CR(G_CRBA(op) / 4) | REGFLAG_CR(G_CRBB(op) / 4);
306         desc->gpr.modified |= REGFLAG_CR(G_CRBD(op) / 4);
430         CR_BIT_USED(desc, G_CRBA(op));
431         CR_BIT_USED(desc, G_CRBB(op));
432         CR_BIT_MODIFIED(desc, G_CRBD(op));
307433         return TRUE;
308434 
309435      case 0x032:   /* RFI */
r2844r2845
311437            return FALSE;
312438         desc->flags |= OPFLAG_PRIVILEGED | OPFLAG_CAN_CHANGE_MODES | OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE | OPFLAG_CAN_CAUSE_EXCEPTION;
313439         desc->targetpc = BRANCH_TARGET_DYNAMIC;
440         if (is_601_class(ppc))
441            desc->cycles = 13;   /* 601 */
442         else if (is_603_class(ppc))
443            desc->cycles = 3;   /* 603 */
444         else
445            desc->cycles = 3;   /* ??? */
314446         return TRUE;
315447 
316448      case 0x033:   /* RFCI */
r2844r2845
323455      case 0x096:   /* ISYNC */
324456         if (!(ppc->cap & (PPCCAP_VEA | PPCCAP_4XX)))
325457            return FALSE;
458         if (is_601_class(ppc))
459            desc->cycles = 6;   /* 601 */
326460         return TRUE;
327461 
328462      case 0x210:   /* BCCTRx */
329         desc->gpr.used |= REGFLAG_CR(G_BI(op) / 4) | REGFLAG_CTR;
330         if (op & M_LK) desc->gpr.modified |= REGFLAG_LR;
463         CTR_USED(desc);
464         if (!(G_BO(op) & 0x10))
465            CR_BIT_USED(desc, G_BI(op));
466         if (!(G_BO(op) & 0x04))
467            return FALSE;
468         if (op & M_LK)
469            LR_MODIFIED(desc);
331470         if ((G_BO(op) & 0x14) == 0x14)
332471            desc->flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE;
333472         else
r2844r2845
349488static int describe_instruction_1f(powerpc_state *ppc, UINT32 op, opcode_desc *desc)
350489{
351490   UINT32 opswitch = (op >> 1) & 0x3ff;
491   int spr, regnum;
352492 
353493   switch (opswitch)
354494   {
r2844r2845
382522 
383523      case 0x000:   /* CMP */
384524      case 0x020:   /* CMPL */
385         desc->gpr.used |= REGFLAG_R(G_RA(op)) | REGFLAG_R(G_RB(op)) | REGFLAG_XER;
386         desc->gpr.modified |= REGFLAG_CR(G_CRFD(op));
525         GPR_USED(desc, G_RA(op));
526         GPR_USED(desc, G_RB(op));
527         XER_SO_USED(desc);
528         CR_MODIFIED(desc, G_CRFD(op));
387529         return TRUE;
388530 
389531      case 0x004:   /* TW */
390         desc->gpr.used |= REGFLAG_R(G_RA(op)) | REGFLAG_R(G_RB(op));
532         GPR_USED(desc, G_RA(op));
533         GPR_USED(desc, G_RB(op));
391534         desc->flags |= OPFLAG_CAN_CAUSE_EXCEPTION;
535         if (is_603_class(ppc))
536            desc->cycles = 2;   /* 603 */
392537         return TRUE;
393538 
394539      case 0x008:   /* SUBFCx */
395540      case 0x00a:   /* ADDCx */
396      case 0x00b:   /* MULHWUx */
397      case 0x028:   /* SUBFx */
398      case 0x04b:   /* MULHWx */
541         GPR_USED(desc, G_RA(op));
542         GPR_USED(desc, G_RB(op));
543         GPR_MODIFIED(desc, G_RD(op));
544         XER_CA_MODIFIED(desc);
545         if (op & M_RC)
546         {
547            XER_SO_USED(desc);
548            CR_MODIFIED(desc, 0);
549         }
550         return TRUE;
551 
399552      case 0x088:   /* SUBFEx */
400553      case 0x08a:   /* ADDEx */
554         GPR_USED(desc, G_RA(op));
555         GPR_USED(desc, G_RB(op));
556         XER_CA_USED(desc);
557         GPR_MODIFIED(desc, G_RD(op));
558         XER_CA_MODIFIED(desc);
559         if (op & M_RC)
560         {
561            XER_SO_USED(desc);
562            CR_MODIFIED(desc, 0);
563         }
564         return TRUE;
565 
401566      case 0x0c8:   /* SUBFZEx */
402567      case 0x0ca:   /* ADDZEx */
403568      case 0x0e8:   /* SUBFMEx */
404569      case 0x0ea:   /* ADDMEx */
570         GPR_USED(desc, G_RA(op));
571         XER_CA_USED(desc);
572         GPR_MODIFIED(desc, G_RD(op));
573         XER_CA_MODIFIED(desc);
574         if (op & M_RC)
575         {
576            XER_SO_USED(desc);
577            CR_MODIFIED(desc, 0);
578         }
579         return TRUE;
580 
581      case 0x00b:   /* MULHWUx */
582      case 0x04b:   /* MULHWx */
405583      case 0x0eb:   /* MULLWx */
406      case 0x10a:   /* ADDx */
584         GPR_USED(desc, G_RA(op));
585         GPR_USED(desc, G_RB(op));
586         GPR_MODIFIED(desc, G_RD(op));
587         if (op & M_RC)
588         {
589            XER_SO_USED(desc);
590            CR_MODIFIED(desc, 0);
591         }
592         if (is_403_class(ppc))
593            desc->cycles = 4;   /* 4XX */
594         else if (is_601_class(ppc))
595            desc->cycles = 5;   /* 601: 5/9/10 */
596         else if (is_603_class(ppc))
597            desc->cycles = 2;   /* 603: 2,3,4,5,6 */
598         else
599            desc->cycles = 2;   /* ??? */
600         return TRUE;
601 
407602      case 0x1cb:   /* DIVWUx */
408603      case 0x1eb:   /* DIVWx */
409         desc->gpr.used |= REGFLAG_R(G_RA(op)) | REGFLAG_R(G_RB(op));
410         desc->gpr.modified |= REGFLAG_R(G_RD(op));
604         GPR_USED(desc, G_RA(op));
605         GPR_USED(desc, G_RB(op));
606         GPR_MODIFIED(desc, G_RD(op));
411607         if (op & M_RC)
412608         {
413            desc->gpr.used |= REGFLAG_XER;
414            desc->gpr.modified |= REGFLAG_CR(0);
609            XER_SO_USED(desc);
610            CR_MODIFIED(desc, 0);
415611         }
612         if (is_403_class(ppc))
613            desc->cycles = 33;   /* 4XX */
614         else if (is_601_class(ppc))
615            desc->cycles = 36;   /* 601 */
616         else if (is_603_class(ppc))
617            desc->cycles = 37;   /* 603 */
618         else
619            desc->cycles = 33;   /* ??? */
416620         return TRUE;
417621 
622      case 0x028:   /* SUBFx */
623      case 0x10a:   /* ADDx */
624         GPR_USED(desc, G_RA(op));
625         GPR_USED(desc, G_RB(op));
626         GPR_MODIFIED(desc, G_RD(op));
627         if (op & M_RC)
628         {
629            XER_SO_USED(desc);
630            CR_MODIFIED(desc, 0);
631         }
632         return TRUE;
633 
418634      case 0x208:   /* SUBFCOx */
419635      case 0x20a:   /* ADDCOx */
420      case 0x228:   /* SUBFOx */
636         GPR_USED(desc, G_RA(op));
637         GPR_USED(desc, G_RB(op));
638         GPR_MODIFIED(desc, G_RD(op));
639         XER_OV_MODIFIED(desc);
640         XER_SO_MODIFIED(desc);
641         XER_CA_MODIFIED(desc);
642         if (op & M_RC)
643            CR_MODIFIED(desc, 0);
644         return TRUE;
645 
421646      case 0x288:   /* SUBFEOx */
422647      case 0x28a:   /* ADDEOx */
648         GPR_USED(desc, G_RA(op));
649         GPR_USED(desc, G_RB(op));
650         XER_CA_USED(desc);
651         GPR_MODIFIED(desc, G_RD(op));
652         XER_OV_MODIFIED(desc);
653         XER_SO_MODIFIED(desc);
654         XER_CA_MODIFIED(desc);
655         if (op & M_RC)
656            CR_MODIFIED(desc, 0);
657         return TRUE;
658 
423659      case 0x2c8:   /* SUBFZEOx */
424660      case 0x2ca:   /* ADDZEOx */
425661      case 0x2e8:   /* SUBFMEOx */
426662      case 0x2ea:   /* ADDMEOx */
663         GPR_USED(desc, G_RA(op));
664         XER_CA_USED(desc);
665         GPR_MODIFIED(desc, G_RD(op));
666         XER_OV_MODIFIED(desc);
667         XER_SO_MODIFIED(desc);
668         XER_CA_MODIFIED(desc);
669         if (op & M_RC)
670            CR_MODIFIED(desc, 0);
671         return TRUE;
672 
427673      case 0x2eb:   /* MULLWOx */
428      case 0x30a:   /* ADDOx */
674         GPR_USED(desc, G_RA(op));
675         GPR_USED(desc, G_RB(op));
676         GPR_MODIFIED(desc, G_RD(op));
677         XER_OV_MODIFIED(desc);
678         XER_SO_MODIFIED(desc);
679         if (op & M_RC)
680            CR_MODIFIED(desc, 0);
681         if (is_403_class(ppc))
682            desc->cycles = 4;   /* 4XX */
683         else if (is_601_class(ppc))
684            desc->cycles = 5;   /* 601: 5/9/10 */
685         else if (is_603_class(ppc))
686            desc->cycles = 2;   /* 603: 2,3,4,5,6 */
687         else
688            desc->cycles = 2;   /* ??? */
689         return TRUE;
690 
429691      case 0x3cb:   /* DIVWUOx */
430692      case 0x3eb:   /* DIVWOx */
431         desc->gpr.used |= REGFLAG_R(G_RA(op)) | REGFLAG_R(G_RB(op));
432         desc->gpr.modified |= REGFLAG_R(G_RD(op)) | REGFLAG_XER;
693         GPR_USED(desc, G_RA(op));
694         GPR_USED(desc, G_RB(op));
695         GPR_MODIFIED(desc, G_RD(op));
696         XER_OV_MODIFIED(desc);
697         XER_SO_MODIFIED(desc);
433698         if (op & M_RC)
434         {
435            desc->gpr.used |= REGFLAG_XER;
436            desc->gpr.modified |= REGFLAG_CR(0);
437         }
699            CR_MODIFIED(desc, 0);
700         if (is_403_class(ppc))
701            desc->cycles = 33;   /* 4XX */
702         else if (is_601_class(ppc))
703            desc->cycles = 36;   /* 601 */
704         else if (is_603_class(ppc))
705            desc->cycles = 37;   /* 603 */
706         else
707            desc->cycles = 33;   /* ??? */
438708         return TRUE;
439709 
710      case 0x228:   /* SUBFOx */
711      case 0x30a:   /* ADDOx */
712         GPR_USED(desc, G_RA(op));
713         GPR_USED(desc, G_RB(op));
714         GPR_MODIFIED(desc, G_RD(op));
715         XER_OV_MODIFIED(desc);
716         XER_SO_MODIFIED(desc);
717         if (op & M_RC)
718            CR_MODIFIED(desc, 0);
719         return TRUE;
720 
440721      case 0x013:   /* MFCR */
441         desc->gpr.used |= ((REGFLAG_CR(7) << 1) - 1) & ~(REGFLAG_CR(0) - 1);
442         desc->gpr.modified |= REGFLAG_R(G_RD(op));
722         CR_USED(desc, 0);
723         CR_USED(desc, 1);
724         CR_USED(desc, 2);
725         CR_USED(desc, 3);
726         CR_USED(desc, 4);
727         CR_USED(desc, 5);
728         CR_USED(desc, 6);
729         CR_USED(desc, 7);
730         GPR_MODIFIED(desc, G_RD(op));
443731         return TRUE;
444732 
445733      case 0x136:   /* ECIWX */
r2844r2845
452740      case 0x157:   /* LHAX */
453741      case 0x216:   /* LWBRX */
454742      case 0x316:   /* LHBRX */
455         desc->gpr.used |= REGFLAG_RZ(G_RA(op)) | REGFLAG_R(G_RB(op));
456         desc->gpr.modified |= REGFLAG_R(G_RD(op));
743         GPR_USED_OR_ZERO(desc, G_RA(op));
744         GPR_USED(desc, G_RB(op));
745         GPR_MODIFIED(desc, G_RD(op));
457746         desc->flags |= OPFLAG_READS_MEMORY;
458747         return TRUE;
459748 
r2844r2845
466755      case 0x19c:   /* ORCx */
467756      case 0x1bc:   /* ORx */
468757      case 0x1dc:   /* NANDx */
758         GPR_USED(desc, G_RS(op));
759         GPR_USED(desc, G_RB(op));
760         GPR_MODIFIED(desc, G_RA(op));
761         if (op & M_RC)
762         {
763            XER_SO_USED(desc);
764            CR_MODIFIED(desc, 0);
765         }
766         return TRUE;
767 
469768      case 0x218:   /* SRWx */
470769      case 0x318:   /* SRAWx */
471         desc->gpr.used |= REGFLAG_RZ(G_RS(op)) | REGFLAG_R(G_RB(op));
472         desc->gpr.modified |= REGFLAG_R(G_RA(op));
770         GPR_USED(desc, G_RS(op));
771         GPR_USED(desc, G_RB(op));
772         GPR_MODIFIED(desc, G_RA(op));
773         XER_CA_MODIFIED(desc);
774         if (op & M_RC)
775         {
776            XER_SO_USED(desc);
777            CR_MODIFIED(desc, 0);
778         }
473779         return TRUE;
474780 
475781      case 0x01a:   /* CNTLZWx */
476782      case 0x39a:   /* EXTSHx */
477783      case 0x3ba:   /* EXTSBx */
478         desc->gpr.used |= REGFLAG_RZ(G_RS(op));
479         desc->gpr.modified |= REGFLAG_R(G_RA(op));
784         GPR_USED(desc, G_RS(op));
785         GPR_MODIFIED(desc, G_RA(op));
786         if (op & M_RC)
787         {
788            XER_SO_USED(desc);
789            CR_MODIFIED(desc, 0);
790         }
480791         return TRUE;
481792 
482793      case 0x036:   /* DCBST */
r2844r2845
487798      case 0x3d6:   /* ICBI */
488799         if (!(ppc->cap & (PPCCAP_VEA | PPCCAP_4XX)))
489800            return FALSE;
490         desc->gpr.used |= REGFLAG_RZ(G_RA(op)) | REGFLAG_R(G_RB(op));
801         GPR_USED_OR_ZERO(desc, G_RA(op));
802         GPR_USED(desc, G_RB(op));
491803         return TRUE;
492804 
493805      case 0x1d6:   /* DCBI */
494806         if (!(ppc->cap & (PPCCAP_OEA | PPCCAP_4XX)))
495807            return FALSE;
496         desc->gpr.used |= REGFLAG_RZ(G_RA(op)) | REGFLAG_R(G_RB(op));
808         GPR_USED_OR_ZERO(desc, G_RA(op));
809         GPR_USED(desc, G_RB(op));
497810         desc->flags |= OPFLAG_PRIVILEGED | OPFLAG_CAN_CAUSE_EXCEPTION;
498811         return TRUE;
499812 
r2844r2845
501814      case 0x077:   /* LBZUX */
502815      case 0x137:   /* LHZUX */
503816      case 0x177:   /* LHAUX */
504         desc->gpr.used |= REGFLAG_R(G_RA(op)) | REGFLAG_R(G_RB(op));
505         desc->gpr.modified |= REGFLAG_R(G_RD(op)) | REGFLAG_R(G_RA(op));
817         if (G_RA(op) == 0 || G_RA(op) == G_RD(op))
818            return FALSE;
819         GPR_USED(desc, G_RA(op));
820         GPR_USED(desc, G_RB(op));
821         GPR_MODIFIED(desc, G_RD(op));
822         GPR_MODIFIED(desc, G_RA(op));
506823         desc->flags |= OPFLAG_READS_MEMORY;
507824         return TRUE;
508825 
509826      case 0x153:   /* MFSPR */
510         desc->gpr.modified |= REGFLAG_R(G_RD(op));
511         if (G_SPR(op) & 0x200)
827         GPR_MODIFIED(desc, G_RD(op));
828         spr = compute_spr(G_SPR(op));
829         if (spr == SPR_LR)
830            LR_USED(desc);
831         if (spr == SPR_CTR)
832            CTR_USED(desc);
833         if (spr == SPR_XER)
834         {
835            XER_COUNT_USED(desc);
836            XER_CA_USED(desc);
837            XER_OV_USED(desc);
838            XER_SO_USED(desc);
839         }
840         if (spr & 0x010)
512841            desc->flags |= OPFLAG_PRIVILEGED | OPFLAG_CAN_CAUSE_EXCEPTION;
842         if ((ppc->cap & PPCCAP_4XX) && spr == SPR4XX_TBLU)
843            desc->cycles = POWERPC_COUNT_READ_TBL;
844         else if ((ppc->cap & PPCCAP_VEA) && spr == SPRVEA_TBL_R)
845            desc->cycles = POWERPC_COUNT_READ_TBL;
846         else if ((ppc->cap & PPCCAP_OEA) && spr == SPROEA_DEC)
847            desc->cycles = POWERPC_COUNT_READ_DEC;
513848         return TRUE;
514849 
515850      case 0x053:   /* MFMSR */
516         desc->gpr.modified |= REGFLAG_R(G_RD(op));
851         GPR_MODIFIED(desc, G_RD(op));
517852         desc->flags |= OPFLAG_PRIVILEGED | OPFLAG_CAN_CAUSE_EXCEPTION | OPFLAG_CAN_EXPOSE_EXTERNAL_INT;
853         if (is_601_class(ppc))
854            desc->cycles = 2;   /* 601 */
518855         return TRUE;
519856 
520857      case 0x253:   /* MFSR */
858         GPR_MODIFIED(desc, G_RD(op));
859         desc->flags |= OPFLAG_PRIVILEGED | OPFLAG_CAN_CAUSE_EXCEPTION;
860         return TRUE;
861 
521862      case 0x293:   /* MFSRIN */
522         desc->gpr.modified |= REGFLAG_R(G_RD(op));
863         GPR_USED(desc, G_RB(op));
864         GPR_MODIFIED(desc, G_RD(op));
523865         desc->flags |= OPFLAG_PRIVILEGED | OPFLAG_CAN_CAUSE_EXCEPTION;
524866         return TRUE;
525867 
526868      case 0x173:   /* MFTB */
527869         if (!(ppc->cap & PPCCAP_VEA))
528870            return FALSE;
529         desc->gpr.modified |= REGFLAG_R(G_RD(op));
871         GPR_MODIFIED(desc, G_RD(op));
872         spr = compute_spr(G_SPR(op));
873         if (spr == SPRVEA_TBL_R)
874            desc->cycles = POWERPC_COUNT_READ_TBL;
530875         return TRUE;
531876 
532877      case 0x068:   /* NEGx */
533         desc->gpr.used |= REGFLAG_R(G_RA(op));
534         desc->gpr.modified |= REGFLAG_R(G_RD(op));
878         GPR_USED(desc, G_RA(op));
879         GPR_MODIFIED(desc, G_RD(op));
535880         if (op & M_RC)
536881         {
537            desc->gpr.used |= REGFLAG_XER;
538            desc->gpr.modified |= REGFLAG_CR(0);
882            XER_SO_USED(desc);
883            CR_MODIFIED(desc, 0);
539884         }
540885         return TRUE;
541886 
542887      case 0x268:   /* NEGOx */
543         desc->gpr.used |= REGFLAG_R(G_RA(op));
544         desc->gpr.modified |= REGFLAG_R(G_RD(op)) | REGFLAG_XER;
888         GPR_USED(desc, G_RA(op));
889         GPR_MODIFIED(desc, G_RD(op));
890         XER_OV_MODIFIED(desc);
891         XER_SO_MODIFIED(desc);
545892         if (op & M_RC)
546         {
547            desc->gpr.used |= REGFLAG_XER;
548            desc->gpr.modified |= REGFLAG_CR(0);
549         }
893            CR_MODIFIED(desc, 0);
550894         return TRUE;
551895 
552896      case 0x090:   /* MTCRF */
553         desc->gpr.used |= REGFLAG_R(G_RS(op));
554         if (G_CRM(op) & 0x01) desc->gpr.modified |= REGFLAG_CR(0);
555         if (G_CRM(op) & 0x02) desc->gpr.modified |= REGFLAG_CR(1);
556         if (G_CRM(op) & 0x04) desc->gpr.modified |= REGFLAG_CR(2);
557         if (G_CRM(op) & 0x08) desc->gpr.modified |= REGFLAG_CR(3);
558         if (G_CRM(op) & 0x10) desc->gpr.modified |= REGFLAG_CR(4);
559         if (G_CRM(op) & 0x20) desc->gpr.modified |= REGFLAG_CR(5);
560         if (G_CRM(op) & 0x40) desc->gpr.modified |= REGFLAG_CR(6);
561         if (G_CRM(op) & 0x80) desc->gpr.modified |= REGFLAG_CR(7);
897         GPR_USED(desc, G_RS(op));
898         if (G_CRM(op) & 0x80) CR_MODIFIED(desc, 0);
899         if (G_CRM(op) & 0x40) CR_MODIFIED(desc, 1);
900         if (G_CRM(op) & 0x20) CR_MODIFIED(desc, 2);
901         if (G_CRM(op) & 0x10) CR_MODIFIED(desc, 3);
902         if (G_CRM(op) & 0x08) CR_MODIFIED(desc, 4);
903         if (G_CRM(op) & 0x04) CR_MODIFIED(desc, 5);
904         if (G_CRM(op) & 0x02) CR_MODIFIED(desc, 6);
905         if (G_CRM(op) & 0x01) CR_MODIFIED(desc, 7);
562906         return TRUE;
563907 
564908      case 0x092:   /* MTMSR */
565         desc->gpr.used |= REGFLAG_R(G_RS(op));
909         GPR_USED(desc, G_RS(op));
566910         desc->flags |= OPFLAG_PRIVILEGED | OPFLAG_CAN_CAUSE_EXCEPTION | OPFLAG_CAN_CHANGE_MODES | OPFLAG_END_SEQUENCE;
911         if (is_601_class(ppc))
912            desc->cycles = 17;   /* 601 */
913         else if (is_603_class(ppc))
914            desc->cycles = 2;   /* 603 */
567915         return TRUE;
568916 
569917      case 0x0d2:   /* MTSR */
570918         if (!(ppc->cap & PPCCAP_OEA))
571919            return FALSE;
572         desc->gpr.used |= REGFLAG_R(G_RS(op));
920         GPR_USED(desc, G_RS(op));
573921         desc->flags |= OPFLAG_PRIVILEGED | OPFLAG_CAN_CAUSE_EXCEPTION;
574922         return TRUE;
575923 
576924      case 0x1d3:   /* MTSPR */
577         desc->gpr.used |= REGFLAG_R(G_RS(op));
578         if (G_SPR(op) & 0x200)
925         GPR_USED(desc, G_RS(op));
926         spr = compute_spr(G_SPR(op));
927         if (spr == SPR_LR)
928            LR_MODIFIED(desc);
929         if (spr == SPR_CTR)
930            CTR_MODIFIED(desc);
931         if (spr == SPR_XER)
932         {
933            XER_COUNT_MODIFIED(desc);
934            XER_CA_MODIFIED(desc);
935            XER_OV_MODIFIED(desc);
936            XER_SO_MODIFIED(desc);
937         }
938         if (spr & 0x010)
579939            desc->flags |= OPFLAG_PRIVILEGED | OPFLAG_CAN_CAUSE_EXCEPTION;
580940         return TRUE;
581941 
r2844r2845
588948      case 0x197:   /* STHX */
589949      case 0x296:   /* STWBRX */
590950      case 0x396:   /* STHBRX */
591         desc->gpr.used |= REGFLAG_RZ(G_RA(op)) | REGFLAG_R(G_RB(op)) | REGFLAG_R(G_RS(op));
951         GPR_USED_OR_ZERO(desc, G_RA(op));
952         GPR_USED(desc, G_RB(op));
953         GPR_USED(desc, G_RS(op));
592954         desc->flags |= OPFLAG_WRITES_MEMORY;
593955         return TRUE;
594956 
595957      case 0x0b7:   /* STWUX */
596958      case 0x0f7:   /* STBUX */
597959      case 0x1b7:   /* STHUX */
598         desc->gpr.used |= REGFLAG_R(G_RA(op)) | REGFLAG_R(G_RB(op)) | REGFLAG_R(G_RS(op));
599         desc->gpr.modified |= REGFLAG_R(G_RA(op));
960         if (G_RA(op) == 0)
961            return FALSE;
962         GPR_USED(desc, G_RA(op));
963         GPR_USED(desc, G_RB(op));
964         GPR_USED(desc, G_RS(op));
965         GPR_MODIFIED(desc, G_RA(op));
600966         desc->flags |= OPFLAG_WRITES_MEMORY;
601967         return TRUE;
602968 
603969      case 0x0f2:   /* MTSRIN */
604970         if (!(ppc->cap & PPCCAP_OEA))
605971            return FALSE;
606         desc->gpr.used |= REGFLAG_R(G_RS(op)) | REGFLAG_R(G_RB(op));
972         GPR_USED(desc, G_RS(op));
973         GPR_USED(desc, G_RB(op));
607974         desc->flags |= OPFLAG_PRIVILEGED | OPFLAG_CAN_CAUSE_EXCEPTION;
608975         return TRUE;
609976 
610977      case 0x132:   /* TLBIE */
611978         if (!(ppc->cap & PPCCAP_OEA))
612979            return FALSE;
613         desc->gpr.used |= REGFLAG_R(G_RB(op));
980         GPR_USED(desc, G_RB(op));
614981         desc->flags |= OPFLAG_PRIVILEGED | OPFLAG_CAN_CAUSE_EXCEPTION;
615982         return TRUE;
616983 
r2844r2845
628995         return TRUE;
629996 
630997      case 0x200:   /* MCRXR */
631         desc->gpr.used |= REGFLAG_XER;
632         desc->gpr.modified |= REGFLAG_CR(G_CRFD(op));
998         XER_CA_USED(desc);
999         XER_OV_USED(desc);
1000         XER_SO_USED(desc);
1001         CR_MODIFIED(desc, G_CRFD(op));
1002         XER_CA_MODIFIED(desc);
1003         XER_OV_MODIFIED(desc);
1004         XER_SO_MODIFIED(desc);
6331005         return TRUE;
6341006 
6351007      case 0x215:   /* LSWX */
636         desc->gpr.used |= REGFLAG_RZ(G_RA(op)) | REGFLAG_R(G_RB(op)) | REGFLAG_XER;
637         desc->gpr.modified |= ((REGFLAG_R(31) << 1) - 1) & ~(REGFLAG_R(0) - 1);
1008         GPR_USED_OR_ZERO(desc, G_RA(op));
1009         GPR_USED(desc, G_RB(op));
1010         XER_COUNT_USED(desc);
1011         for (regnum = 0; regnum < 32; regnum++)
1012            GPR_MODIFIED(desc, regnum);
6381013         desc->flags |= OPFLAG_READS_MEMORY;
6391014         return TRUE;
6401015 
r2844r2845
6421017      case 0x257:   /* LFDX */
6431018         if (!(ppc->cap & PPCCAP_FPU))
6441019            return FALSE;
645         desc->gpr.used |= REGFLAG_RZ(G_RA(op)) | REGFLAG_R(G_RB(op));
646         desc->fpr.modified |= REGFLAG_R(G_RD(op));
1020         GPR_USED_OR_ZERO(desc, G_RA(op));
1021         GPR_USED(desc, G_RB(op));
1022         FPR_MODIFIED(desc, G_RD(op));
6471023         desc->flags |= OPFLAG_READS_MEMORY;
6481024         return TRUE;
6491025 
r2844r2845
6651041      case 0x277:   /* LFDUX */
6661042         if (!(ppc->cap & PPCCAP_FPU))
6671043            return FALSE;
668         desc->gpr.used |= REGFLAG_R(G_RA(op)) | REGFLAG_R(G_RB(op));
669         desc->gpr.modified |= REGFLAG_R(G_RA(op));
670         desc->fpr.modified |= REGFLAG_R(G_RD(op));
1044         if (G_RA(op) == 0)
1045            return FALSE;
1046         GPR_USED(desc, G_RA(op));
1047         GPR_USED(desc, G_RB(op));
1048         GPR_MODIFIED(desc, G_RA(op));
1049         FPR_MODIFIED(desc, G_RD(op));
6711050         desc->flags |= OPFLAG_READS_MEMORY;
6721051         return TRUE;
6731052 
6741053      case 0x255:   /* LSWI */
675         desc->gpr.used |= REGFLAG_RZ(G_RA(op)) | REGFLAG_R(G_RB(op));
676         desc->gpr.modified |= ((REGFLAG_R(31) << 1) - 1) & ~(REGFLAG_R(0) - 1);
1054         GPR_USED_OR_ZERO(desc, G_RA(op));
1055         for (regnum = 0; regnum < ((G_NB(op) - 1) & 0x1f) + 1; regnum += 4)
1056            GPR_MODIFIED(desc, (G_RD(op) + regnum / 4) % 32);
6771057         desc->flags |= OPFLAG_READS_MEMORY;
1058         desc->cycles = (((G_NB(op) - 1) & 0x1f) + 1 + 3) / 4;
6781059         return TRUE;
6791060 
6801061      case 0x295:   /* STSWX */
1062         GPR_USED_OR_ZERO(desc, G_RA(op));
1063         GPR_USED(desc, G_RB(op));
1064         XER_COUNT_USED(desc);
1065         for (regnum = 0; regnum < 32; regnum++)
1066            GPR_USED(desc, regnum);
1067         desc->flags |= OPFLAG_WRITES_MEMORY;
1068         return TRUE;
1069 
6811070      case 0x2d5:   /* STSWI */
682         desc->gpr.used |= (((REGFLAG_R(31) << 1) - 1) & ~(REGFLAG_R(0) - 1)) | REGFLAG_XER;
1071         GPR_USED_OR_ZERO(desc, G_RA(op));
1072         for (regnum = 0; regnum < ((G_NB(op) - 1) & 0x1f) + 1; regnum += 4)
1073            GPR_USED(desc, (G_RD(op) + regnum / 4) % 32);
6831074         desc->flags |= OPFLAG_WRITES_MEMORY;
1075         desc->cycles = (((G_NB(op) - 1) & 0x1f) + 1 + 3) / 4;
6841076         return TRUE;
6851077 
6861078      case 0x297:   /* STFSX */
r2844r2845
6881080      case 0x3d7:   /* STFIWX */
6891081         if (!(ppc->cap & PPCCAP_FPU))
6901082            return FALSE;
691         desc->gpr.used |= REGFLAG_RZ(G_RA(op)) | REGFLAG_R(G_RB(op));
692         desc->fpr.used |= REGFLAG_R(G_RS(op));
1083         GPR_USED_OR_ZERO(desc, G_RA(op));
1084         GPR_USED(desc, G_RB(op));
1085         FPR_USED(desc, G_RS(op));
6931086         desc->flags |= OPFLAG_WRITES_MEMORY;
6941087         return TRUE;
6951088 
r2844r2845
6971090      case 0x2f7:   /* STFDUX */
6981091         if (!(ppc->cap & PPCCAP_FPU))
6991092            return FALSE;
700         desc->gpr.used |= REGFLAG_RZ(G_RA(op)) | REGFLAG_R(G_RB(op));
701         desc->gpr.modified |= REGFLAG_RZ(G_RA(op));
702         desc->fpr.used |= REGFLAG_R(G_RS(op));
1093         if (G_RA(op) == 0)
1094            return FALSE;
1095         GPR_USED_OR_ZERO(desc, G_RA(op));
1096         GPR_USED(desc, G_RB(op));
1097         GPR_MODIFIED(desc, G_RA(op));
1098         FPR_USED(desc, G_RS(op));
7031099         desc->flags |= OPFLAG_WRITES_MEMORY;
7041100         return TRUE;
7051101 
7061102      case 0x338:   /* SRAWIx */
707         desc->gpr.used |= REGFLAG_RZ(G_RS(op));
708         desc->gpr.modified |= REGFLAG_R(G_RA(op));
1103         GPR_USED(desc, G_RS(op));
1104         GPR_MODIFIED(desc, G_RA(op));
1105         XER_CA_MODIFIED(desc);
1106         if (op & M_RC)
1107         {
1108            XER_SO_USED(desc);
1109            CR_MODIFIED(desc, 0);
1110         }
7091111         return TRUE;
7101112 
7111113      case 0x3f6:   /* DCBZ */
7121114         if (!(ppc->cap & (PPCCAP_VEA | PPCCAP_4XX)))
7131115            return FALSE;
714         desc->gpr.used |= REGFLAG_RZ(G_RA(op)) | REGFLAG_R(G_RB(op));
1116         GPR_USED_OR_ZERO(desc, G_RA(op));
1117         GPR_USED(desc, G_RB(op));
7151118         desc->flags |= OPFLAG_WRITES_MEMORY;
7161119         return TRUE;
7171120 
r2844r2845
7201123      case 0x3c6:   /* ICCCI */
7211124         if (!(ppc->cap & PPCCAP_4XX))
7221125            return FALSE;
723         desc->gpr.used |= REGFLAG_RZ(G_RA(op)) | REGFLAG_R(G_RB(op));
1126         GPR_USED_OR_ZERO(desc, G_RA(op));
1127         GPR_USED(desc, G_RB(op));
7241128         desc->flags |= OPFLAG_PRIVILEGED | OPFLAG_CAN_CAUSE_EXCEPTION;
7251129         return TRUE;
7261130 
r2844r2845
7281132      case 0x3e6:   /* ICREAD */
7291133         if (!(ppc->cap & PPCCAP_4XX))
7301134            return FALSE;
731         desc->gpr.used |= REGFLAG_RZ(G_RA(op)) | REGFLAG_R(G_RB(op));
732         desc->gpr.modified |= REGFLAG_R(G_RT(op));
1135         GPR_USED_OR_ZERO(desc, G_RA(op));
1136         GPR_USED(desc, G_RB(op));
1137         GPR_MODIFIED(desc, G_RT(op));
7331138         desc->flags |= OPFLAG_PRIVILEGED | OPFLAG_CAN_CAUSE_EXCEPTION;
7341139         return TRUE;
7351140 
7361141      case 0x143:   /* MFDCR */
7371142         if (!(ppc->cap & PPCCAP_4XX))
7381143            return FALSE;
739         desc->gpr.modified |= REGFLAG_R(G_RD(op));
1144         GPR_MODIFIED(desc, G_RD(op));
7401145         desc->flags |= OPFLAG_PRIVILEGED | OPFLAG_CAN_CAUSE_EXCEPTION;
7411146         return TRUE;
7421147 
7431148      case 0x1c3:   /* MTDCR */
7441149         if (!(ppc->cap & PPCCAP_4XX))
7451150            return FALSE;
746         desc->gpr.used |= REGFLAG_R(G_RS(op));
1151         GPR_USED(desc, G_RS(op));
7471152         desc->flags |= OPFLAG_PRIVILEGED | OPFLAG_CAN_CAUSE_EXCEPTION | OPFLAG_CAN_EXPOSE_EXTERNAL_INT;
7481153         return TRUE;
7491154 
7501155      case 0x083:   /* WRTEE */
7511156         if (!(ppc->cap & PPCCAP_4XX))
7521157            return FALSE;
753         desc->gpr.used |= REGFLAG_R(G_RS(op));
1158         GPR_USED(desc, G_RS(op));
7541159         desc->flags |= OPFLAG_CAN_EXPOSE_EXTERNAL_INT;
7551160         return TRUE;
7561161 
r2844r2845
7821187   switch (opswitch)
7831188   {
7841189      case 0x12:   /* FDIVSx */
1190         FPR_USED(desc, G_RA(op));
1191         FPR_USED(desc, G_RB(op));
1192         FPR_MODIFIED(desc, G_RD(op));
1193         if (op & M_RC)
1194            CR_MODIFIED(desc, 1);
1195         if (is_601_class(ppc))
1196            desc->cycles = 17;   /* 601 */
1197         else if (is_603_class(ppc))
1198            desc->cycles = 18;   /* 603 */
1199         else
1200            desc->cycles = 17;   /* ??? */
1201         return TRUE;
1202 
7851203      case 0x14:   /* FSUBSx */
7861204      case 0x15:   /* FADDSx */
7871205      case 0x19:   /* FMULSx */
788         desc->fpr.used |= REGFLAG_R(G_RA(op)) | REGFLAG_R(G_RB(op));
789         desc->fpr.modified |= REGFLAG_R(G_RD(op));
1206         FPR_USED(desc, G_RA(op));
1207         FPR_USED(desc, G_RB(op));
1208         FPR_MODIFIED(desc, G_RD(op));
7901209         if (op & M_RC)
791         {
792            desc->gpr.used |= REGFLAG_XER;
793            desc->gpr.modified |= REGFLAG_CR(1);
794         }
1210            CR_MODIFIED(desc, 1);
7951211         return TRUE;
7961212 
7971213      case 0x16:   /* FSQRTSx */
7981214      case 0x18:   /* FRESx */
799         desc->fpr.used |= REGFLAG_R(G_RB(op));
800         desc->fpr.modified |= REGFLAG_R(G_RD(op));
1215         FPR_USED(desc, G_RB(op));
1216         FPR_MODIFIED(desc, G_RD(op));
8011217         if (op & M_RC)
802         {
803            desc->gpr.used |= REGFLAG_XER;
804            desc->gpr.modified |= REGFLAG_CR(1);
805         }
1218            CR_MODIFIED(desc, 1);
8061219         return TRUE;
8071220 
8081221      case 0x1c:   /* FMSUBSx */
8091222      case 0x1d:   /* FMADDSx */
8101223      case 0x1e:   /* FNMSUBSx */
8111224      case 0x1f:   /* FNMADDSx */
812         desc->fpr.used |= REGFLAG_R(G_RA(op)) | REGFLAG_R(G_RB(op)) | REGFLAG_R(G_REGC(op));
813         desc->fpr.modified |= REGFLAG_R(G_RD(op));
1225         FPR_USED(desc, G_RA(op));
1226         FPR_USED(desc, G_RB(op));
1227         FPR_USED(desc, G_REGC(op));
1228         FPR_MODIFIED(desc, G_RD(op));
8141229         if (op & M_RC)
815         {
816            desc->gpr.used |= REGFLAG_XER;
817            desc->gpr.modified |= REGFLAG_CR(1);
818         }
1230            CR_MODIFIED(desc, 1);
8191231         return TRUE;
8201232   }
8211233 
r2844r2845
8421254      switch (opswitch)
8431255      {
8441256         case 0x12:   /* FDIVx */
1257            FPR_USED(desc, G_RA(op));
1258            FPR_USED(desc, G_RB(op));
1259            FPR_MODIFIED(desc, G_RD(op));
1260            if (op & M_RC)
1261               CR_MODIFIED(desc, 1);
1262            if (is_601_class(ppc))
1263               desc->cycles = 31;   /* 601 */
1264            else if (is_603_class(ppc))
1265               desc->cycles = 33;   /* 603 */
1266            else
1267               desc->cycles = 31;   /* ??? */
1268            return TRUE;
1269 
1270         case 0x19:   /* FMULx */
1271            FPR_USED(desc, G_RA(op));
1272            FPR_USED(desc, G_RB(op));
1273            FPR_MODIFIED(desc, G_RD(op));
1274            if (op & M_RC)
1275               CR_MODIFIED(desc, 1);
1276            desc->cycles = 2;   /* 601/603 */
1277            return TRUE;
1278 
8451279         case 0x14:   /* FSUBx */
8461280         case 0x15:   /* FADDx */
847         case 0x19:   /* FMULx */
848            desc->fpr.used |= REGFLAG_R(G_RA(op)) | REGFLAG_R(G_RB(op));
849            desc->fpr.modified |= REGFLAG_R(G_RD(op));
1281            FPR_USED(desc, G_RA(op));
1282            FPR_USED(desc, G_RB(op));
1283            FPR_MODIFIED(desc, G_RD(op));
8501284            if (op & M_RC)
851            {
852               desc->gpr.used |= REGFLAG_XER;
853               desc->gpr.modified |= REGFLAG_CR(1);
854            }
1285               CR_MODIFIED(desc, 1);
8551286            return TRUE;
8561287 
8571288         case 0x16:   /* FSQRTx */
8581289         case 0x1a:   /* FSQRTEx */
859            desc->fpr.used |= REGFLAG_R(G_RB(op));
860            desc->fpr.modified |= REGFLAG_R(G_RD(op));
1290            FPR_USED(desc, G_RB(op));
1291            FPR_MODIFIED(desc, G_RD(op));
8611292            if (op & M_RC)
862            {
863               desc->gpr.used |= REGFLAG_XER;
864               desc->gpr.modified |= REGFLAG_CR(1);
865            }
1293               CR_MODIFIED(desc, 1);
8661294            return TRUE;
8671295 
8681296         case 0x17:   /* FSELx */
r2844r2845
8701298         case 0x1d:   /* FMADDx */
8711299         case 0x1e:   /* FNMSUBx */
8721300         case 0x1f:   /* FNMADDx */
873            desc->fpr.used |= REGFLAG_R(G_RA(op)) | REGFLAG_R(G_RB(op)) | REGFLAG_R(G_REGC(op));
874            desc->fpr.modified |= REGFLAG_R(G_RD(op));
1301            FPR_USED(desc, G_RA(op));
1302            FPR_USED(desc, G_RB(op));
1303            FPR_USED(desc, G_REGC(op));
1304            FPR_MODIFIED(desc, G_RD(op));
8751305            if (op & M_RC)
876            {
877               desc->gpr.used |= REGFLAG_XER;
878               desc->gpr.modified |= REGFLAG_CR(1);
879            }
1306               CR_MODIFIED(desc, 1);
1307            desc->cycles = 2;   /* 601/603 */
8801308            return TRUE;
8811309      }
8821310   }
r2844r2845
8911319 
8921320         case 0x000:   /* FCMPU */
8931321         case 0x020:   /* FCMPO */
894            desc->gpr.used |= REGFLAG_XER;
895            desc->fpr.used |= REGFLAG_R(G_RA(op)) | REGFLAG_R(G_RB(op));
896            desc->gpr.modified |= REGFLAG_CR(G_CRFD(op));
1322            FPR_USED(desc, G_RA(op));
1323            FPR_USED(desc, G_RB(op));
1324            CR_MODIFIED(desc, G_CRFD(op));
8971325            return TRUE;
8981326 
8991327         case 0x00c:   /* FRSPx */
r2844r2845
9031331         case 0x048:   /* FMRx */
9041332         case 0x088:   /* FNABSx */
9051333         case 0x108:   /* FABSx */
906            desc->fpr.used |= REGFLAG_R(G_RB(op));
907            desc->fpr.modified |= REGFLAG_R(G_RD(op));
1334            FPR_USED(desc, G_RB(op));
1335            FPR_MODIFIED(desc, G_RD(op));
9081336            if (op & M_RC)
909            {
910               desc->gpr.used |= REGFLAG_XER;
911               desc->gpr.modified |= REGFLAG_CR(1);
912            }
1337               CR_MODIFIED(desc, 1);
9131338            return TRUE;
9141339 
9151340         case 0x026:   /* MTFSB1x */
9161341         case 0x046:   /* MTFSB0x */
917            desc->fpr.modified |= REGFLAG_FPSCR;
1342            FPSCR_MODIFIED(desc, G_CRBD(op) / 4);
9181343            return TRUE;
9191344 
9201345         case 0x040:   /* MCRFS */
921            desc->fpr.used |= REGFLAG_FPSCR;
922            desc->gpr.modified |= REGFLAG_CR(G_CRFD(op));
1346            FPSCR_USED(desc, G_CRFS(op));
1347            CR_MODIFIED(desc, G_CRFD(op));
9231348            return TRUE;
9241349 
9251350         case 0x086:   /* MTFSFIx */
926            desc->fpr.modified |= REGFLAG_FPSCR;
1351            FPSCR_MODIFIED(desc, G_CRFD(op));
9271352            return TRUE;
9281353 
9291354         case 0x247:   /* MFFSx */
930            desc->fpr.used |= REGFLAG_FPSCR;
931            desc->fpr.modified |= REGFLAG_R(G_RD(op));
1355            FPSCR_USED(desc, 0);
1356            FPSCR_USED(desc, 1);
1357            FPSCR_USED(desc, 2);
1358            FPSCR_USED(desc, 3);
1359            FPSCR_USED(desc, 4);
1360            FPSCR_USED(desc, 5);
1361            FPSCR_USED(desc, 6);
1362            FPSCR_USED(desc, 7);
1363            FPR_MODIFIED(desc, G_RD(op));
9321364            return TRUE;
9331365 
9341366         case 0x2c7:   /* MTFSFx */
935            desc->fpr.used |= REGFLAG_R(G_RB(op));
936            desc->fpr.modified |= REGFLAG_FPSCR;
1367            FPR_USED(desc, G_RB(op));
1368            if (G_CRM(op) & 0x80) FPSCR_MODIFIED(desc, 0);
1369            if (G_CRM(op) & 0x40) FPSCR_MODIFIED(desc, 1);
1370            if (G_CRM(op) & 0x20) FPSCR_MODIFIED(desc, 2);
1371            if (G_CRM(op) & 0x10) FPSCR_MODIFIED(desc, 3);
1372            if (G_CRM(op) & 0x08) FPSCR_MODIFIED(desc, 4);
1373            if (G_CRM(op) & 0x04) FPSCR_MODIFIED(desc, 5);
1374            if (G_CRM(op) & 0x02) FPSCR_MODIFIED(desc, 6);
1375            if (G_CRM(op) & 0x01) FPSCR_MODIFIED(desc, 7);
9371376            return TRUE;
9381377      }
9391378   }
src/emu/cpu/i8051/i8051.c
r2844r2845
20492049            R_TL0 = count & 0xff;
20502050
20512051                //Split Timer 2
2052                if(GET_TR1) {
2053                overflow = 0xff;
2054                count = R_TH0;
2055                //Check for overflow
2056                    if(count+(cyc/12)>overflow) {
2057                   count = overflow-count;
2058                        SET_TF1(1);
2059                    }
2060                else
2061                        count+=(cyc/12);
2062                //Update new values of the counter
2063                R_TH0 = count & 0xff;
2052             overflow = 0xff;
2053             count = R_TH0;
2054             //Check for overflow
2055                if(count+(cyc/12)>overflow) {
2056                count = overflow-count;
2057                    SET_TF1(1);
20642058                }
2059             else
2060                    count+=(cyc/12);
2061             //Update new values of the counter
2062             R_TH0 = count & 0xff;
20652063            break;
20662064      }
20672065   }
src/emu/cpu/drcumlsh.h
r2844r2845
4646#define IF_LE      DRCUML_COND_LE
4747#define IF_ALWAYS   DRCUML_COND_ALWAYS
4848
49/* shorthand for flags */
50#define FLAGS_ALLI   (DRCUML_FLAG_C | DRCUML_FLAG_V | DRCUML_FLAG_Z | DRCUML_FLAG_S)
51#define FLAGS_ALLF   (DRCUML_FLAG_C | DRCUML_FLAG_Z | DRCUML_FLAG_U)
52#define FLAGS_NONE   (0)
5349
54/* flags needed for condition codes */
55#define FLAGS_Z      (DRCUML_FLAG_Z)
56#define FLAGS_NZ   (DRCUML_FLAG_Z)
57#define FLAGS_E      (DRCUML_FLAG_Z)
58#define FLAGS_NE   (DRCUML_FLAG_Z)
59#define FLAGS_S      (DRCUML_FLAG_S)
60#define FLAGS_NS   (DRCUML_FLAG_S)
61#define FLAGS_C      (DRCUML_FLAG_C)
62#define FLAGS_NC   (DRCUML_FLAG_C)
63#define FLAGS_V      (DRCUML_FLAG_V)
64#define FLAGS_NV   (DRCUML_FLAG_V)
65#define FLAGS_U      (DRCUML_FLAG_U)
66#define FLAGS_NU   (DRCUML_FLAG_U)
67#define FLAGS_A      (DRCUML_FLAG_C | DRCUML_FLAG_Z)
68#define FLAGS_BE   (DRCUML_FLAG_C | DRCUML_FLAG_Z)
69#define FLAGS_B      (DRCUML_FLAG_C)
70#define FLAGS_AE   (DRCUML_FLAG_C)
71#define FLAGS_G      (DRCUML_FLAG_S | DRCUML_FLAG_V | DRCUML_FLAG_Z)
72#define FLAGS_LE   (DRCUML_FLAG_S | DRCUML_FLAG_V | DRCUML_FLAG_Z)
73#define FLAGS_L      (DRCUML_FLAG_S | DRCUML_FLAG_V)
74#define FLAGS_GE   (DRCUML_FLAG_S | DRCUML_FLAG_V)
7550
76
77
7851/***************************************************************************
7952    MACROS
8053***************************************************************************/
r2844r2845
10376
10477
10578/* ----- Control Flow Operations ----- */
79#define UML_NOP(block)                              do { drcuml_block_append_0(block, DRCUML_OP_NOP,     4, IF_ALWAYS); } while (0)
10680#define UML_DEBUG(block, pc)                        do { drcuml_block_append_1(block, DRCUML_OP_DEBUG,   4, IF_ALWAYS,  pc); } while (0)
107
10881#define UML_EXIT(block, param)                        do { drcuml_block_append_1(block, DRCUML_OP_EXIT,    4, IF_ALWAYS,  param); } while (0)
10982#define UML_EXITc(block, cond, param)                  do { drcuml_block_append_1(block, DRCUML_OP_EXIT,    4, cond,       param); } while (0)
110
11183#define UML_HASHJMP(block, mode, pc, handle)            do { drcuml_block_append_3(block, DRCUML_OP_HASHJMP, 4, IF_ALWAYS,  mode, pc, MEM(handle)); } while (0)
112
11384#define UML_JMP(block, label)                        do { drcuml_block_append_1(block, DRCUML_OP_JMP,     4, IF_ALWAYS,  IMM(label)); } while (0)
11485#define UML_JMPc(block, cond, label)                  do { drcuml_block_append_1(block, DRCUML_OP_JMP,     4, cond,       IMM(label)); } while (0)
115
11686#define UML_JMPH(block, handle)                        do { drcuml_block_append_1(block, DRCUML_OP_JMPH,    4, IF_ALWAYS,  MEM(handle)); } while (0)
11787#define UML_JMPHc(block, cond, handle)                  do { drcuml_block_append_1(block, DRCUML_OP_JMPH,    4, cond,       MEM(handle)); } while (0)
11888#define UML_EXH(block, handle, param)                  do { drcuml_block_append_2(block, DRCUML_OP_EXH,     4, IF_ALWAYS,  MEM(handle), param); } while (0)
r2844r2845
12191#define UML_CALLHc(block, cond, handle)                  do { drcuml_block_append_1(block, DRCUML_OP_CALLH,   4, cond,       MEM(handle)); } while (0)
12292#define UML_RET(block)                              do { drcuml_block_append_0(block, DRCUML_OP_RET,     4, IF_ALWAYS); } while (0)
12393#define UML_RETc(block, cond)                        do { drcuml_block_append_0(block, DRCUML_OP_RET,     4, cond); } while (0)
124
12594#define UML_CALLC(block, func, ptr)                     do { drcuml_block_append_2(block, DRCUML_OP_CALLC,   4, IF_ALWAYS,  MEM(func), MEM(ptr)); } while (0)
12695#define UML_CALLCc(block, cond, func, ptr)               do { drcuml_block_append_2(block, DRCUML_OP_CALLC,   4, cond,       MEM(func), MEM(ptr)); } while (0)
127
12896#define UML_RECOVER(block, dst, mapvar)                  do { drcuml_block_append_2(block, DRCUML_OP_RECOVER, 4, IF_ALWAYS,  dst, mapvar); } while (0)
12997
13098
r2844r2845
132100#define UML_SETFMOD(block, mode)                     do { drcuml_block_append_1(block, DRCUML_OP_SETFMOD, 4, IF_ALWAYS,  mode); } while (0)
133101#define UML_GETFMOD(block, dst)                        do { drcuml_block_append_1(block, DRCUML_OP_GETFMOD, 4, IF_ALWAYS,  dst); } while (0)
134102#define UML_GETEXP(block, dst)                        do { drcuml_block_append_1(block, DRCUML_OP_GETEXP,  4, IF_ALWAYS,  dst); } while (0)
135#define UML_GETFLGS(block, dst, flags)                  do { drcuml_block_append_1(block, DRCUML_OP_GETFLGS, 4, flags,      dst); } while (0)
103#define UML_GETFLGS(block, dst, flags)                  do { drcuml_block_append_2(block, DRCUML_OP_GETFLGS, 4, IF_ALWAYS,  dst, IMM(flags)); } while (0)
136104#define UML_SAVE(block, dst)                        do { drcuml_block_append_1(block, DRCUML_OP_SAVE,    4, IF_ALWAYS,  MEM(dst)); } while (0)
137105#define UML_RESTORE(block, src)                        do { drcuml_block_append_1(block, DRCUML_OP_RESTORE, 4, IF_ALWAYS,  MEM(src)); } while (0)
138106
r2844r2845
145113#define UML_READM(block, dst, src1, mask, spsize)         do { drcuml_block_append_4(block, DRCUML_OP_READM,   4, IF_ALWAYS,  dst, src1, mask, IMM(DRCUML_SPSIZE_##spsize)); } while (0)
146114#define UML_WRITE(block, dst, src1, spsize)               do { drcuml_block_append_3(block, DRCUML_OP_WRITE,   4, IF_ALWAYS,  dst, src1, IMM(DRCUML_SPSIZE_##spsize)); } while (0)
147115#define UML_WRITEM(block, dst, src1, mask, spsize)         do { drcuml_block_append_4(block, DRCUML_OP_WRITEM,  4, IF_ALWAYS,  dst, src1, mask, IMM(DRCUML_SPSIZE_##spsize)); } while (0)
148
149116#define UML_CARRY(block, src, bitnum)                  do { drcuml_block_append_2(block, DRCUML_OP_CARRY,   4, IF_ALWAYS,  src, bitnum); } while (0)
150117#define UML_SETc(block, cond, dst)                     do { drcuml_block_append_1(block, DRCUML_OP_SET,     4, cond,       dst); } while (0)
151
152118#define UML_MOV(block, dst, src1)                     do { drcuml_block_append_2(block, DRCUML_OP_MOV,     4, IF_ALWAYS,  dst, src1); } while (0)
153119#define UML_MOVc(block, cond, dst, src1)               do { drcuml_block_append_2(block, DRCUML_OP_MOV,     4, cond,       dst, src1); } while (0)
154120#define UML_SEXT(block, dst, src1, size)               do { drcuml_block_append_3(block, DRCUML_OP_SEXT,    4, IF_ALWAYS,  dst, src1, IMM(DRCUML_SIZE_##size)); } while (0)
155
156121#define UML_ROLAND(block, dst, src, shift, mask)         do { drcuml_block_append_4(block, DRCUML_OP_ROLAND,  4, IF_ALWAYS,  dst, src, shift, mask); } while (0)
157122#define UML_ROLINS(block, dst, src, shift, mask)         do { drcuml_block_append_4(block, DRCUML_OP_ROLINS,  4, IF_ALWAYS,  dst, src, shift, mask); } while (0)
123#define UML_ADD(block, dst, src1, src2)                  do { drcuml_block_append_3(block, DRCUML_OP_ADD,     4, IF_ALWAYS,  dst, src1, src2); } while (0)
124#define UML_ADDC(block, dst, src1, src2)               do { drcuml_block_append_3(block, DRCUML_OP_ADDC,    4, IF_ALWAYS,  dst, src1, src2); } while (0)
125#define UML_SUB(block, dst, src1, src2)                  do { drcuml_block_append_3(block, DRCUML_OP_SUB,     4, IF_ALWAYS,  dst, src1, src2); } while (0)
126#define UML_SUBB(block, dst, src1, src2)               do { drcuml_block_append_3(block, DRCUML_OP_SUBB,    4, IF_ALWAYS,  dst, src1, src2); } while (0)
127#define UML_CMP(block, src1, src2)                     do { drcuml_block_append_2(block, DRCUML_OP_CMP,     4, IF_ALWAYS,  src1, src2); } while (0)
128#define UML_MULU(block, dst, edst, src1, src2)            do { drcuml_block_append_4(block, DRCUML_OP_MULU,    4, IF_ALWAYS,  dst, edst, src1, src2); } while (0)
129#define UML_MULS(block, dst, edst, src1, src2)            do { drcuml_block_append_4(block, DRCUML_OP_MULS,    4, IF_ALWAYS,  dst, edst, src1, src2); } while (0)
130#define UML_DIVU(block, dst, edst, src1, src2)            do { drcuml_block_append_4(block, DRCUML_OP_DIVU,    4, IF_ALWAYS,  dst, edst, src1, src2); } while (0)
131#define UML_DIVS(block, dst, edst, src1, src2)            do { drcuml_block_append_4(block, DRCUML_OP_DIVS,    4, IF_ALWAYS,  dst, edst, src1, src2); } while (0)
132#define UML_AND(block, dst, src1, src2)                  do { drcuml_block_append_3(block, DRCUML_OP_AND,     4, IF_ALWAYS,  dst, src1, src2); } while (0)
133#define UML_TEST(block, src1, src2)                     do { drcuml_block_append_2(block, DRCUML_OP_TEST,    4, IF_ALWAYS,  src1, src2); } while (0)
134#define UML_OR(block, dst, src1, src2)                  do { drcuml_block_append_3(block, DRCUML_OP_OR,      4, IF_ALWAYS,  dst, src1, src2); } while (0)
135#define UML_XOR(block, dst, src1, src2)                  do { drcuml_block_append_3(block, DRCUML_OP_XOR,     4, IF_ALWAYS,  dst, src1, src2); } while (0)
136#define UML_LZCNT(block, dst, src)                     do { drcuml_block_append_2(block, DRCUML_OP_LZCNT,   4, IF_ALWAYS,  dst, src); } while (0)
137#define UML_BSWAP(block, dst, src)                     do { drcuml_block_append_2(block, DRCUML_OP_BSWAP,   4, IF_ALWAYS,  dst, src); } while (0)
138#define UML_SHL(block, dst, src, count)                  do { drcuml_block_append_3(block, DRCUML_OP_SHL,     4, IF_ALWAYS,  dst, src, count); } while (0)
139#define UML_SHR(block, dst, src, count)                  do { drcuml_block_append_3(block, DRCUML_OP_SHR,     4, IF_ALWAYS,  dst, src, count); } while (0)
140#define UML_SAR(block, dst, src, count)                  do { drcuml_block_append_3(block, DRCUML_OP_SAR,     4, IF_ALWAYS,  dst, src, count); } while (0)
141#define UML_ROL(block, dst, src, count)                  do { drcuml_block_append_3(block, DRCUML_OP_ROL,     4, IF_ALWAYS,  dst, src, count); } while (0)
142#define UML_ROLC(block, dst, src, count)               do { drcuml_block_append_3(block, DRCUML_OP_ROLC,    4, IF_ALWAYS,  dst, src, count); } while (0)
143#define UML_ROR(block, dst, src, count)                  do { drcuml_block_append_3(block, DRCUML_OP_ROR,     4, IF_ALWAYS,  dst, src, count); } while (0)
144#define UML_RORC(block, dst, src, count)               do { drcuml_block_append_3(block, DRCUML_OP_RORC,    4, IF_ALWAYS,  dst, src, count); } while (0)
158145
159#define UML_NEG(block, dst, src1)                     do { drcuml_block_append_2(block, DRCUML_OP_NEG,     4, FLAGS_NONE, dst, src1); } while (0)
160#define UML_NEGf(block, dst, src1, flags)               do { drcuml_block_append_2(block, DRCUML_OP_NEG,     4, flags,      dst, src1); } while (0)
161146
162#define UML_ADD(block, dst, src1, src2)                  do { drcuml_block_append_3(block, DRCUML_OP_ADD,     4, FLAGS_NONE, dst, src1, src2); } while (0)
163#define UML_ADDf(block, dst, src1, src2, flags)            do { drcuml_block_append_3(block, DRCUML_OP_ADD,     4, flags,      dst, src1, src2); } while (0)
164#define UML_ADDC(block, dst, src1, src2)               do { drcuml_block_append_3(block, DRCUML_OP_ADDC,    4, FLAGS_NONE, dst, src1, src2); } while (0)
165#define UML_ADDCf(block, dst, src1, src2, flags)         do { drcuml_block_append_3(block, DRCUML_OP_ADDC,    4, flags,      dst, src1, src2); } while (0)
166
167#define UML_SUB(block, dst, src1, src2)                  do { drcuml_block_append_3(block, DRCUML_OP_SUB,     4, FLAGS_NONE, dst, src1, src2); } while (0)
168#define UML_SUBf(block, dst, src1, src2, flags)            do { drcuml_block_append_3(block, DRCUML_OP_SUB,     4, flags,      dst, src1, src2); } while (0)
169#define UML_SUBB(block, dst, src1, src2)               do { drcuml_block_append_3(block, DRCUML_OP_SUBB,    4, FLAGS_NONE, dst, src1, src2); } while (0)
170#define UML_SUBBf(block, dst, src1, src2, flags)         do { drcuml_block_append_3(block, DRCUML_OP_SUBB,    4, flags,      dst, src1, src2); } while (0)
171
172#define UML_CMP(block, src1, src2)                     do { drcuml_block_append_2(block, DRCUML_OP_CMP,     4, FLAGS_ALLI, src1, src2); } while (0)
173#define UML_CMPf(block, src1, src2, flags)               do { drcuml_block_append_2(block, DRCUML_OP_CMP,     4, flags,      src1, src2); } while (0)
174
175#define UML_MULU(block, dst, edst, src1, src2)            do { drcuml_block_append_4(block, DRCUML_OP_MULU,    4, FLAGS_NONE, dst, edst, src1, src2); } while (0)
176#define UML_MULUf(block, dst, edst, src1, src2, flags)      do { drcuml_block_append_4(block, DRCUML_OP_MULU,    4, flags,      dst, edst, src1, src2); } while (0)
177#define UML_MULS(block, dst, edst, src1, src2)            do { drcuml_block_append_4(block, DRCUML_OP_MULS,    4, FLAGS_NONE, dst, edst, src1, src2); } while (0)
178#define UML_MULSf(block, dst, edst, src1, src2, flags)      do { drcuml_block_append_4(block, DRCUML_OP_MULS,    4, flags,      dst, edst, src1, src2); } while (0)
179
180#define UML_DIVU(block, dst, edst, src1, src2)            do { drcuml_block_append_4(block, DRCUML_OP_DIVU,    4, FLAGS_NONE, dst, edst, src1, src2); } while (0)
181#define UML_DIVUf(block, dst, edst, src1, src2, flags)      do { drcuml_block_append_4(block, DRCUML_OP_DIVU,    4, flags,      dst, edst, src1, src2); } while (0)
182#define UML_DIVS(block, dst, edst, src1, src2)            do { drcuml_block_append_4(block, DRCUML_OP_DIVS,    4, FLAGS_NONE, dst, edst, src1, src2); } while (0)
183#define UML_DIVSf(block, dst, edst, src1, src2, flags)      do { drcuml_block_append_4(block, DRCUML_OP_DIVS,    4, flags,      dst, edst, src1, src2); } while (0)
184
185#define UML_AND(block, dst, src1, src2)                  do { drcuml_block_append_3(block, DRCUML_OP_AND,     4, FLAGS_NONE, dst, src1, src2); } while (0)
186#define UML_ANDf(block, dst, src1, src2, flags)            do { drcuml_block_append_3(block, DRCUML_OP_AND,     4, flags,      dst, src1, src2); } while (0)
187
188#define UML_TEST(block, src1, src2)                     do { drcuml_block_append_2(block, DRCUML_OP_TEST,    4, FLAGS_S|FLAGS_Z,src1, src2); } while (0)
189#define UML_TESTf(block, src1, src2, flags)               do { drcuml_block_append_2(block, DRCUML_OP_TEST,    4, flags,      src1, src2); } while (0)
190
191#define UML_OR(block, dst, src1, src2)                  do { drcuml_block_append_3(block, DRCUML_OP_OR,      4, FLAGS_NONE, dst, src1, src2); } while (0)
192#define UML_ORf(block, dst, src1, src2, flags)            do { drcuml_block_append_3(block, DRCUML_OP_OR,      4, flags,      dst, src1, src2); } while (0)
193
194#define UML_XOR(block, dst, src1, src2)                  do { drcuml_block_append_3(block, DRCUML_OP_XOR,     4, FLAGS_NONE, dst, src1, src2); } while (0)
195#define UML_XORf(block, dst, src1, src2, flags)            do { drcuml_block_append_3(block, DRCUML_OP_XOR,     4, flags,      dst, src1, src2); } while (0)
196
197#define UML_LZCNT(block, dst, src)                     do { drcuml_block_append_2(block, DRCUML_OP_LZCNT,   4, FLAGS_NONE, dst, src); } while (0)
198#define UML_BSWAP(block, dst, src)                     do { drcuml_block_append_2(block, DRCUML_OP_BSWAP,   4, FLAGS_NONE, dst, src); } while (0)
199
200#define UML_SHL(block, dst, src, count)                  do { drcuml_block_append_3(block, DRCUML_OP_SHL,     4, FLAGS_NONE, dst, src, count); } while (0)
201#define UML_SHLf(block, dst, src, count, flags)            do { drcuml_block_append_3(block, DRCUML_OP_SHL,     4, flags,      dst, src, count); } while (0)
202
203#define UML_SHR(block, dst, src, count)                  do { drcuml_block_append_3(block, DRCUML_OP_SHR,     4, FLAGS_NONE, dst, src, count); } while (0)
204#define UML_SHRf(block, dst, src, count, flags)            do { drcuml_block_append_3(block, DRCUML_OP_SHR,     4, flags,      dst, src, count); } while (0)
205
206#define UML_SAR(block, dst, src, count)                  do { drcuml_block_append_3(block, DRCUML_OP_SAR,     4, FLAGS_NONE, dst, src, count); } while (0)
207#define UML_SARf(block, dst, src, count, flags)            do { drcuml_block_append_3(block, DRCUML_OP_SAR,     4, flags,      dst, src, count); } while (0)
208
209#define UML_ROL(block, dst, src, count)                  do { drcuml_block_append_3(block, DRCUML_OP_ROL,     4, FLAGS_NONE, dst, src, count); } while (0)
210#define UML_ROLf(block, dst, src, count, flags)            do { drcuml_block_append_3(block, DRCUML_OP_ROL,     4, flags,      dst, src, count); } while (0)
211#define UML_ROLC(block, dst, src, count)               do { drcuml_block_append_3(block, DRCUML_OP_ROLC,    4, FLAGS_NONE, dst, src, count); } while (0)
212#define UML_ROLCf(block, dst, src, count, flags)         do { drcuml_block_append_3(block, DRCUML_OP_ROLC,    4, flags,      dst, src, count); } while (0)
213
214#define UML_ROR(block, dst, src, count)                  do { drcuml_block_append_3(block, DRCUML_OP_ROR,     4, FLAGS_NONE, dst, src, count); } while (0)
215#define UML_RORf(block, dst, src, count, flags)            do { drcuml_block_append_3(block, DRCUML_OP_ROR,     4, flags,      dst, src, count); } while (0)
216#define UML_RORC(block, dst, src, count)               do { drcuml_block_append_3(block, DRCUML_OP_RORC,    4, FLAGS_NONE, dst, src, count); } while (0)
217#define UML_RORCf(block, dst, src, count, flags)         do { drcuml_block_append_3(block, DRCUML_OP_RORC,    4, flags,      dst, src, count); } while (0)
218
219
220147/* ----- 64-Bit Integer Operations ----- */
221148#define UML_DLOAD(block, dst, base, index, size)         do { drcuml_block_append_4(block, DRCUML_OP_LOAD,    8, IF_ALWAYS,  dst, MEM(base), index, IMM(DRCUML_SIZE_##size)); } while (0)
222149#define UML_DLOADS(block, dst, base, index, size)         do { drcuml_block_append_4(block, DRCUML_OP_LOADS,   8, IF_ALWAYS,  dst, MEM(base), index, IMM(DRCUML_SIZE_##size)); } while (0)
r2844r2845
225152#define UML_DREADM(block, dst, src1, mask, spsize)         do { drcuml_block_append_4(block, DRCUML_OP_READM,   8, IF_ALWAYS,  dst, src1, mask, IMM(DRCUML_SPSIZE_##spsize)); } while (0)
226153#define UML_DWRITE(block, dst, src1, spsize)            do { drcuml_block_append_3(block, DRCUML_OP_WRITE,   8, IF_ALWAYS,  dst, src1, IMM(DRCUML_SPSIZE_##spsize)); } while (0)
227154#define UML_DWRITEM(block, dst, src1, mask, spsize)         do { drcuml_block_append_4(block, DRCUML_OP_WRITEM,  8, IF_ALWAYS,  dst, src1, mask, IMM(DRCUML_SPSIZE_##spsize)); } while (0)
228
229155#define UML_DCARRY(block, src, bitnum)                  do { drcuml_block_append_2(block, DRCUML_OP_CARRY,   8, IF_ALWAYS,  src, bitnum); } while (0)
230156#define UML_DSETc(block, cond, dst)                     do { drcuml_block_append_1(block, DRCUML_OP_SET,     8, cond,       dst); } while (0)
231
232157#define UML_DMOV(block, dst, src1)                     do { drcuml_block_append_2(block, DRCUML_OP_MOV,     8, IF_ALWAYS,  dst, src1); } while (0)
233158#define UML_DMOVc(block, cond, dst, src1)               do { drcuml_block_append_2(block, DRCUML_OP_MOV,     8, cond,       dst, src1); } while (0)
234159#define UML_DSEXT(block, dst, src1, size)               do { drcuml_block_append_3(block, DRCUML_OP_SEXT,    8, IF_ALWAYS,  dst, src1, IMM(DRCUML_SIZE_##size)); } while (0)
235
236160#define UML_DROLAND(block, dst, src, shift, mask)         do { drcuml_block_append_4(block, DRCUML_OP_ROLAND,  8, IF_ALWAYS,  dst, src, shift, mask); } while (0)
237161#define UML_DROLINS(block, dst, src, shift, mask)         do { drcuml_block_append_4(block, DRCUML_OP_ROLINS,  8, IF_ALWAYS,  dst, src, shift, mask); } while (0)
162#define UML_DADD(block, dst, src1, src2)               do { drcuml_block_append_3(block, DRCUML_OP_ADD,     8, IF_ALWAYS,  dst, src1, src2); } while (0)
163#define UML_DADDC(block, dst, src1, src2)               do { drcuml_block_append_3(block, DRCUML_OP_ADDC,    8, IF_ALWAYS,  dst, src1, src2); } while (0)
164#define UML_DSUB(block, dst, src1, src2)               do { drcuml_block_append_3(block, DRCUML_OP_SUB,     8, IF_ALWAYS,  dst, src1, src2); } while (0)
165#define UML_DSUBB(block, dst, src1, src2)               do { drcuml_block_append_3(block, DRCUML_OP_SUBB,    8, IF_ALWAYS,  dst, src1, src2); } while (0)
166#define UML_DCMP(block, src1, src2)                     do { drcuml_block_append_2(block, DRCUML_OP_CMP,     8, IF_ALWAYS,  src1, src2); } while (0)
167#define UML_DMULU(block, dst, edst, src1, src2)            do { drcuml_block_append_4(block, DRCUML_OP_MULU,    8, IF_ALWAYS,  dst, edst, src1, src2); } while (0)
168#define UML_DMULS(block, dst, edst, src1, src2)            do { drcuml_block_append_4(block, DRCUML_OP_MULS,    8, IF_ALWAYS,  dst, edst, src1, src2); } while (0)
169#define UML_DDIVU(block, dst, edst, src1, src2)            do { drcuml_block_append_4(block, DRCUML_OP_DIVU,    8, IF_ALWAYS,  dst, edst, src1, src2); } while (0)
170#define UML_DDIVS(block, dst, edst, src1, src2)            do { drcuml_block_append_4(block, DRCUML_OP_DIVS,    8, IF_ALWAYS,  dst, edst, src1, src2); } while (0)
171#define UML_DAND(block, dst, src1, src2)               do { drcuml_block_append_3(block, DRCUML_OP_AND,     8, IF_ALWAYS,  dst, src1, src2); } while (0)
172#define UML_DTEST(block, src1, src2)                  do { drcuml_block_append_2(block, DRCUML_OP_TEST,    8, IF_ALWAYS,  src1, src2); } while (0)
173#define UML_DOR(block, dst, src1, src2)                  do { drcuml_block_append_3(block, DRCUML_OP_OR,      8, IF_ALWAYS,  dst, src1, src2); } while (0)
174#define UML_DXOR(block, dst, src1, src2)               do { drcuml_block_append_3(block, DRCUML_OP_XOR,     8, IF_ALWAYS,  dst, src1, src2); } while (0)
175#define UML_DSHL(block, dst, src, count)               do { drcuml_block_append_3(block, DRCUML_OP_SHL,     8, IF_ALWAYS,  dst, src, count); } while (0)
176#define UML_DSHR(block, dst, src, count)               do { drcuml_block_append_3(block, DRCUML_OP_SHR,     8, IF_ALWAYS,  dst, src, count); } while (0)
177#define UML_DSAR(block, dst, src, count)               do { drcuml_block_append_3(block, DRCUML_OP_SAR,     8, IF_ALWAYS,  dst, src, count); } while (0)
178#define UML_DROL(block, dst, src, count)               do { drcuml_block_append_3(block, DRCUML_OP_ROL,     8, IF_ALWAYS,  dst, src, count); } while (0)
179#define UML_DROLC(block, dst, src, count)               do { drcuml_block_append_3(block, DRCUML_OP_ROLC,    8, IF_ALWAYS,  dst, src, count); } while (0)
180#define UML_DROR(block, dst, src, count)               do { drcuml_block_append_3(block, DRCUML_OP_ROR,     8, IF_ALWAYS,  dst, src, count); } while (0)
181#define UML_DRORC(block, dst, src, count)               do { drcuml_block_append_3(block, DRCUML_OP_RORC,    8, IF_ALWAYS,  dst, src, count); } while (0)
238182
239#define UML_DNEG(block, dst, src1)                     do { drcuml_block_append_2(block, DRCUML_OP_NEG,     8, FLAGS_NONE, dst, src1); } while (0)
240#define UML_DNEGf(block, dst, src1, flags)               do { drcuml_block_append_2(block, DRCUML_OP_NEG,     8, flags,      dst, src1); } while (0)
241183
242#define UML_DADD(block, dst, src1, src2)               do { drcuml_block_append_3(block, DRCUML_OP_ADD,     8, FLAGS_NONE, dst, src1, src2); } while (0)
243#define UML_DADDf(block, dst, src1, src2, flags)         do { drcuml_block_append_3(block, DRCUML_OP_ADD,     8, flags,      dst, src1, src2); } while (0)
244#define UML_DADDC(block, dst, src1, src2)               do { drcuml_block_append_3(block, DRCUML_OP_ADDC,    8, FLAGS_NONE, dst, src1, src2); } while (0)
245#define UML_DADDCf(block, dst, src1, src2, flags)         do { drcuml_block_append_3(block, DRCUML_OP_ADDC,    8, flags,      dst, src1, src2); } while (0)
246
247#define UML_DSUB(block, dst, src1, src2)               do { drcuml_block_append_3(block, DRCUML_OP_SUB,     8, FLAGS_NONE, dst, src1, src2); } while (0)
248#define UML_DSUBf(block, dst, src1, src2, flags)         do { drcuml_block_append_3(block, DRCUML_OP_SUB,     8, flags,      dst, src1, src2); } while (0)
249#define UML_DSUBB(block, dst, src1, src2)               do { drcuml_block_append_3(block, DRCUML_OP_SUBB,    8, FLAGS_NONE, dst, src1, src2); } while (0)
250#define UML_DSUBBf(block, dst, src1, src2, flags)         do { drcuml_block_append_3(block, DRCUML_OP_SUBB,    8, flags,      dst, src1, src2); } while (0)
251
252#define UML_DCMP(block, src1, src2)                     do { drcuml_block_append_2(block, DRCUML_OP_CMP,     8, FLAGS_ALLI, src1, src2); } while (0)
253#define UML_DCMPf(block, src1, src2, flags)               do { drcuml_block_append_2(block, DRCUML_OP_CMP,     8, flags,      src1, src2); } while (0)
254
255#define UML_DMULU(block, dst, edst, src1, src2)            do { drcuml_block_append_4(block, DRCUML_OP_MULU,    8, FLAGS_NONE, dst, edst, src1, src2); } while (0)
256#define UML_DMULUf(block, dst, edst, src1, src2, flags)      do { drcuml_block_append_4(block, DRCUML_OP_MULU,    8, flags,      dst, edst, src1, src2); } while (0)
257#define UML_DMULS(block, dst, edst, src1, src2)            do { drcuml_block_append_4(block, DRCUML_OP_MULS,    8, FLAGS_NONE, dst, edst, src1, src2); } while (0)
258#define UML_DMULSf(block, dst, edst, src1, src2, flags)      do { drcuml_block_append_4(block, DRCUML_OP_MULS,    8, flags,      dst, edst, src1, src2); } while (0)
259
260#define UML_DDIVU(block, dst, edst, src1, src2)            do { drcuml_block_append_4(block, DRCUML_OP_DIVU,    8, FLAGS_NONE, dst, edst, src1, src2); } while (0)
261#define UML_DDIVUf(block, dst, edst, src1, src2, flags)      do { drcuml_block_append_4(block, DRCUML_OP_DIVU,    8, flags,      dst, edst, src1, src2); } while (0)
262#define UML_DDIVS(block, dst, edst, src1, src2)            do { drcuml_block_append_4(block, DRCUML_OP_DIVS,    8, FLAGS_NONE, dst, edst, src1, src2); } while (0)
263#define UML_DDIVSf(block, dst, edst, src1, src2, flags)      do { drcuml_block_append_4(block, DRCUML_OP_DIVS,    8, flags,      dst, edst, src1, src2); } while (0)
264
265#define UML_DAND(block, dst, src1, src2)               do { drcuml_block_append_3(block, DRCUML_OP_AND,     8, FLAGS_NONE, dst, src1, src2); } while (0)
266#define UML_DANDf(block, dst, src1, src2, flags)         do { drcuml_block_append_3(block, DRCUML_OP_AND,     8, flags,      dst, src1, src2); } while (0)
267
268#define UML_DTEST(block, src1, src2)                  do { drcuml_block_append_2(block, DRCUML_OP_TEST,    8, FLAGS_S|FLAGS_Z,src1, src2); } while (0)
269#define UML_DTESTf(block, src1, src2, flags)            do { drcuml_block_append_2(block, DRCUML_OP_TEST,    8, flags,      src1, src2); } while (0)
270
271#define UML_DOR(block, dst, src1, src2)                  do { drcuml_block_append_3(block, DRCUML_OP_OR,      8, FLAGS_NONE, dst, src1, src2); } while (0)
272#define UML_DORf(block, dst, src1, src2, flags)            do { drcuml_block_append_3(block, DRCUML_OP_OR,      8, flags,      dst, src1, src2); } while (0)
273
274#define UML_DXOR(block, dst, src1, src2)               do { drcuml_block_append_3(block, DRCUML_OP_XOR,     8, FLAGS_NONE, dst, src1, src2); } while (0)
275#define UML_DXORf(block, dst, src1, src2, flags)         do { drcuml_block_append_3(block, DRCUML_OP_XOR,     8, flags,      dst, src1, src2); } while (0)
276
277#define UML_DSHL(block, dst, src, count)               do { drcuml_block_append_3(block, DRCUML_OP_SHL,     8, FLAGS_NONE, dst, src, count); } while (0)
278#define UML_DSHLf(block, dst, src, count, flags)         do { drcuml_block_append_3(block, DRCUML_OP_SHL,     8, flags,      dst, src, count); } while (0)
279
280#define UML_DSHR(block, dst, src, count)               do { drcuml_block_append_3(block, DRCUML_OP_SHR,     8, FLAGS_NONE, dst, src, count); } while (0)
281#define UML_DSHRf(block, dst, src, count, flags)         do { drcuml_block_append_3(block, DRCUML_OP_SHR,     8, flags,      dst, src, count); } while (0)
282
283#define UML_DSAR(block, dst, src, count)               do { drcuml_block_append_3(block, DRCUML_OP_SAR,     8, FLAGS_NONE, dst, src, count); } while (0)
284#define UML_DSARf(block, dst, src, count, flags)         do { drcuml_block_append_3(block, DRCUML_OP_SAR,     8, flags,      dst, src, count); } while (0)
285
286#define UML_DROL(block, dst, src, count)               do { drcuml_block_append_3(block, DRCUML_OP_ROL,     8, FLAGS_NONE, dst, src, count); } while (0)
287#define UML_DROLf(block, dst, src, count, flags)         do { drcuml_block_append_3(block, DRCUML_OP_ROL,     8, flags,      dst, src, count); } while (0)
288#define UML_DROLC(block, dst, src, count)               do { drcuml_block_append_3(block, DRCUML_OP_ROLC,    8, FLAGS_NONE, dst, src, count); } while (0)
289#define UML_DROLCf(block, dst, src, count, flags)         do { drcuml_block_append_3(block, DRCUML_OP_ROLC,    8, flags,      dst, src, count); } while (0)
290
291#define UML_DROR(block, dst, src, count)               do { drcuml_block_append_3(block, DRCUML_OP_ROR,     8, FLAGS_NONE, dst, src, count); } while (0)
292#define UML_DRORf(block, dst, src, count, flags)         do { drcuml_block_append_3(block, DRCUML_OP_ROR,     8, flags,      dst, src, count); } while (0)
293#define UML_DRORC(block, dst, src, count)               do { drcuml_block_append_3(block, DRCUML_OP_RORC,    8, FLAGS_NONE, dst, src, count); } while (0)
294#define UML_DRORCf(block, dst, src, count, flags)         do { drcuml_block_append_3(block, DRCUML_OP_RORC,    8, flags,      dst, src, count); } while (0)
295
296
297184/* ----- 32-bit Floating Point Arithmetic Operations ----- */
298185#define UML_FSLOAD(block, dst, base, index)               do { drcuml_block_append_3(block, DRCUML_OP_FLOAD,   4, IF_ALWAYS,  dst, MEM(base), index); } while (0)
299186#define UML_FSSTORE(block, base, index, src1)            do { drcuml_block_append_3(block, DRCUML_OP_FSTORE,  4, IF_ALWAYS,  MEM(base), index, src1); } while (0)
300
301187#define UML_FSREAD(block, dst, src1, space)               do { drcuml_block_append_3(block, DRCUML_OP_FREAD,   4, IF_ALWAYS,  dst, src1, IMM(ADDRESS_SPACE_##space)); } while (0)
302188#define UML_FSWRITE(block, dst, src1, space)            do { drcuml_block_append_3(block, DRCUML_OP_FWRITE,  4, IF_ALWAYS,  dst, src1, IMM(ADDRESS_SPACE_##space)); } while (0)
303
304189#define UML_FSMOV(block, dst, src1)                     do { drcuml_block_append_2(block, DRCUML_OP_FMOV,    4, IF_ALWAYS,  dst, src1); } while (0)
305190#define UML_FSMOVc(block, cond, dst, src1)               do { drcuml_block_append_2(block, DRCUML_OP_FMOV,    4, cond,       dst, src1); } while (0)
306
307191#define UML_FSTOINT(block, dst, src1, size, round)         do { drcuml_block_append_4(block, DRCUML_OP_FTOINT,  4, IF_ALWAYS,  dst, src1, IMM(DRCUML_SIZE_##size), IMM(DRCUML_FMOD_##round)); } while (0)
308192#define UML_FSFRINT(block, dst, src1, size)               do { drcuml_block_append_3(block, DRCUML_OP_FFRINT,  4, IF_ALWAYS,  dst, src1, IMM(DRCUML_SIZE_##size)); } while (0)
309193#define UML_FSFRFLT(block, dst, src1, size)               do { drcuml_block_append_3(block, DRCUML_OP_FFRFLT,  4, IF_ALWAYS,  dst, src1, IMM(DRCUML_SIZE_##size)); } while (0)
194#define UML_FSADD(block, dst, src1, src2)               do { drcuml_block_append_3(block, DRCUML_OP_FADD,    4, IF_ALWAYS,  dst, src1, src2); } while (0)
195#define UML_FSSUB(block, dst, src1, src2)               do { drcuml_block_append_3(block, DRCUML_OP_FSUB,    4, IF_ALWAYS,  dst, src1, src2); } while (0)
196#define UML_FSCMP(block, src1, src2)                  do { drcuml_block_append_2(block, DRCUML_OP_FCMP,    4, IF_ALWAYS,  src1, src2); } while (0)
197#define UML_FSMUL(block, dst, src1, src2)               do { drcuml_block_append_3(block, DRCUML_OP_FMUL,    4, IF_ALWAYS,  dst, src1, src2); } while (0)
198#define UML_FSDIV(block, dst, src1, src2)               do { drcuml_block_append_3(block, DRCUML_OP_FDIV,    4, IF_ALWAYS,  dst, src1, src2); } while (0)
199#define UML_FSNEG(block, dst, src1)                     do { drcuml_block_append_2(block, DRCUML_OP_FNEG,    4, IF_ALWAYS,  dst, src1); } while (0)
200#define UML_FSABS(block, dst, src1)                     do { drcuml_block_append_2(block, DRCUML_OP_FABS,    4, IF_ALWAYS,  dst, src1); } while (0)
201#define UML_FSSQRT(block, dst, src1)                  do { drcuml_block_append_2(block, DRCUML_OP_FSQRT,   4, IF_ALWAYS,  dst, src1); } while (0)
202#define UML_FSRECIP(block, dst, src1)                  do { drcuml_block_append_2(block, DRCUML_OP_FRECIP,  4, IF_ALWAYS,  dst, src1); } while (0)
203#define UML_FSRSQRT(block, dst, src1)                  do { drcuml_block_append_2(block, DRCUML_OP_FRSQRT,  4, IF_ALWAYS,  dst, src1); } while (0)
310204
311#define UML_FSADD(block, dst, src1, src2)               do { drcuml_block_append_3(block, DRCUML_OP_FADD,    4, FLAGS_NONE, dst, src1, src2); } while (0)
312#define UML_FSSUB(block, dst, src1, src2)               do { drcuml_block_append_3(block, DRCUML_OP_FSUB,    4, FLAGS_NONE, dst, src1, src2); } while (0)
313#define UML_FSCMP(block, src1, src2)                  do { drcuml_block_append_2(block, DRCUML_OP_FCMP,    4, FLAGS_ALLF, src1, src2); } while (0)
314#define UML_FSMUL(block, dst, src1, src2)               do { drcuml_block_append_3(block, DRCUML_OP_FMUL,    4, FLAGS_NONE, dst, src1, src2); } while (0)
315#define UML_FSDIV(block, dst, src1, src2)               do { drcuml_block_append_3(block, DRCUML_OP_FDIV,    4, FLAGS_NONE, dst, src1, src2); } while (0)
316#define UML_FSNEG(block, dst, src1)                     do { drcuml_block_append_2(block, DRCUML_OP_FNEG,    4, FLAGS_NONE, dst, src1); } while (0)
317#define UML_FSABS(block, dst, src1)                     do { drcuml_block_append_2(block, DRCUML_OP_FABS,    4, FLAGS_NONE, dst, src1); } while (0)
318#define UML_FSSQRT(block, dst, src1)                  do { drcuml_block_append_2(block, DRCUML_OP_FSQRT,   4, FLAGS_NONE, dst, src1); } while (0)
319#define UML_FSRECIP(block, dst, src1)                  do { drcuml_block_append_2(block, DRCUML_OP_FRECIP,  4, FLAGS_NONE, dst, src1); } while (0)
320#define UML_FSRSQRT(block, dst, src1)                  do { drcuml_block_append_2(block, DRCUML_OP_FRSQRT,  4, FLAGS_NONE, dst, src1); } while (0)
321205
322
323206/* ----- 64-bit Floating Point Arithmetic Operations ----- */
324207#define UML_FDLOAD(block, dst, base, index)               do { drcuml_block_append_3(block, DRCUML_OP_FLOAD,   8, IF_ALWAYS,  dst, MEM(base), index); } while (0)
325208#define UML_FDSTORE(block, base, index, src1)            do { drcuml_block_append_3(block, DRCUML_OP_FSTORE,  8, IF_ALWAYS,  MEM(base), index, src1); } while (0)
326
327209#define UML_FDREAD(block, dst, src1, space)               do { drcuml_block_append_3(block, DRCUML_OP_FREAD,   8, IF_ALWAYS,  dst, src1, IMM(ADDRESS_SPACE_##space)); } while (0)
328210#define UML_FDWRITE(block, dst, src1, space)            do { drcuml_block_append_3(block, DRCUML_OP_FWRITE,  8, IF_ALWAYS,  dst, src1, IMM(ADDRESS_SPACE_##space)); } while (0)
329
330211#define UML_FDMOV(block, dst, src1)                     do { drcuml_block_append_2(block, DRCUML_OP_FMOV,    8, IF_ALWAYS,  dst, src1); } while (0)
331212#define UML_FDMOVc(block, cond, dst, src1)               do { drcuml_block_append_2(block, DRCUML_OP_FMOV,    8, cond,       dst, src1); } while (0)
332
333213#define UML_FDTOINT(block, dst, src1, size, round)         do { drcuml_block_append_4(block, DRCUML_OP_FTOINT,  8, IF_ALWAYS,  dst, src1, IMM(DRCUML_SIZE_##size), IMM(DRCUML_FMOD_##round)); } while (0)
334214#define UML_FDFRINT(block, dst, src1, size)               do { drcuml_block_append_3(block, DRCUML_OP_FFRINT,  8, IF_ALWAYS,  dst, src1, IMM(DRCUML_SIZE_##size)); } while (0)
335215#define UML_FDFRFLT(block, dst, src1, size)               do { drcuml_block_append_3(block, DRCUML_OP_FFRFLT,  8, IF_ALWAYS,  dst, src1, IMM(DRCUML_SIZE_##size)); } while (0)
216#define UML_FDRNDS(block, dst, src1)                  do { drcuml_block_append_2(block, DRCUML_OP_FRNDS,   8, IF_ALWAYS,  dst, src1); } while (0)
217#define UML_FDADD(block, dst, src1, src2)               do { drcuml_block_append_3(block, DRCUML_OP_FADD,    8, IF_ALWAYS,  dst, src1, src2); } while (0)
218#define UML_FDSUB(block, dst, src1, src2)               do { drcuml_block_append_3(block, DRCUML_OP_FSUB,    8, IF_ALWAYS,  dst, src1, src2); } while (0)
219#define UML_FDCMP(block, src1, src2)                  do { drcuml_block_append_2(block, DRCUML_OP_FCMP,    8, IF_ALWAYS,  src1, src2); } while (0)
220#define UML_FDMUL(block, dst, src1, src2)               do { drcuml_block_append_3(block, DRCUML_OP_FMUL,    8, IF_ALWAYS,  dst, src1, src2); } while (0)
221#define UML_FDDIV(block, dst, src1, src2)               do { drcuml_block_append_3(block, DRCUML_OP_FDIV,    8, IF_ALWAYS,  dst, src1, src2); } while (0)
222#define UML_FDNEG(block, dst, src1)                     do { drcuml_block_append_2(block, DRCUML_OP_FNEG,    8, IF_ALWAYS,  dst, src1); } while (0)
223#define UML_FDABS(block, dst, src1)                     do { drcuml_block_append_2(block, DRCUML_OP_FABS,    8, IF_ALWAYS,  dst, src1); } while (0)
224#define UML_FDSQRT(block, dst, src1)                  do { drcuml_block_append_2(block, DRCUML_OP_FSQRT,   8, IF_ALWAYS,  dst, src1); } while (0)
225#define UML_FDRECIP(block, dst, src1)                  do { drcuml_block_append_2(block, DRCUML_OP_FRECIP,  8, IF_ALWAYS,  dst, src1); } while (0)
226#define UML_FDRSQRT(block, dst, src1)                  do { drcuml_block_append_2(block, DRCUML_OP_FRSQRT,  8, IF_ALWAYS,  dst, src1); } while (0)
336227
337#define UML_FDRNDS(block, dst, src1)                  do { drcuml_block_append_2(block, DRCUML_OP_FRNDS,   8, FLAGS_NONE, dst, src1); } while (0)
338228
339#define UML_FDADD(block, dst, src1, src2)               do { drcuml_block_append_3(block, DRCUML_OP_FADD,    8, FLAGS_NONE, dst, src1, src2); } while (0)
340#define UML_FDSUB(block, dst, src1, src2)               do { drcuml_block_append_3(block, DRCUML_OP_FSUB,    8, FLAGS_NONE, dst, src1, src2); } while (0)
341#define UML_FDCMP(block, src1, src2)                  do { drcuml_block_append_2(block, DRCUML_OP_FCMP,    8, FLAGS_ALLF, src1, src2); } while (0)
342#define UML_FDMUL(block, dst, src1, src2)               do { drcuml_block_append_3(block, DRCUML_OP_FMUL,    8, FLAGS_NONE, dst, src1, src2); } while (0)
343#define UML_FDDIV(block, dst, src1, src2)               do { drcuml_block_append_3(block, DRCUML_OP_FDIV,    8, FLAGS_NONE, dst, src1, src2); } while (0)
344#define UML_FDNEG(block, dst, src1)                     do { drcuml_block_append_2(block, DRCUML_OP_FNEG,    8, FLAGS_NONE, dst, src1); } while (0)
345#define UML_FDABS(block, dst, src1)                     do { drcuml_block_append_2(block, DRCUML_OP_FABS,    8, FLAGS_NONE, dst, src1); } while (0)
346#define UML_FDSQRT(block, dst, src1)                  do { drcuml_block_append_2(block, DRCUML_OP_FSQRT,   8, FLAGS_NONE, dst, src1); } while (0)
347#define UML_FDRECIP(block, dst, src1)                  do { drcuml_block_append_2(block, DRCUML_OP_FRECIP,  8, FLAGS_NONE, dst, src1); } while (0)
348#define UML_FDRSQRT(block, dst, src1)                  do { drcuml_block_append_2(block, DRCUML_OP_FRSQRT,  8, FLAGS_NONE, dst, src1); } while (0)
349
350
351229#endif
src/emu/cpu/mips/mips3.h
r2844r2845
11/***************************************************************************
22
33    mips3.h
4    Interface file for the portable MIPS III/IV emulator.
5    Written by Aaron Giles
64
5    Interface file for the universal machine language-based
6    MIPS III/IV emulator.
7
8    Copyright Aaron Giles
9    Released for general non-commercial use under the MAME license
10    Visit http://mamedev.org for licensing and usage restrictions.
11
712***************************************************************************/
813
914#ifndef __MIPS3_H__
src/emu/cpu/mips/mips3fe.c
r2844r2845
8282         return TRUE;
8383
8484      case 0x03:   /* JAL */
85         desc->gpr.modified |= REGFLAG_R(31);
85         desc->regout[0] |= REGFLAG_R(31);
8686         desc->flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE;
8787         desc->targetpc = (desc->pc & 0xf0000000) | (LIMMVAL << 2);
8888         desc->delayslots = 1;
r2844r2845
9696            desc->flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE;
9797         else
9898         {
99            desc->gpr.used |= REGFLAG_R(RSREG) | REGFLAG_R(RTREG);
99            desc->regin[0] |= REGFLAG_R(RSREG) | REGFLAG_R(RTREG);
100100            desc->flags |= OPFLAG_IS_CONDITIONAL_BRANCH;
101101         }
102102         desc->targetpc = desc->pc + 4 + (SIMMVAL << 2);
r2844r2845
112112            desc->flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE;
113113         else
114114         {
115            desc->gpr.used |= REGFLAG_R(RSREG);
115            desc->regin[0] |= REGFLAG_R(RSREG);
116116            desc->flags |= OPFLAG_IS_CONDITIONAL_BRANCH;
117117         }
118118         desc->targetpc = desc->pc + 4 + (SIMMVAL << 2);
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122122
123123      case 0x08:   /* ADDI */
124124      case 0x18:   /* DADDI */
125         desc->gpr.used |= REGFLAG_R(RSREG);
126         desc->gpr.modified |= REGFLAG_R(RTREG);
125         desc->regin[0] |= REGFLAG_R(RSREG);
126         desc->regout[0] |= REGFLAG_R(RTREG);
127127         desc->flags |= OPFLAG_CAN_CAUSE_EXCEPTION;
128128         return TRUE;
129129
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134134      case 0x0d:   /* ORI */
135135      case 0x0e:   /* XORI */
136136      case 0x19:   /* DADDIU */
137         desc->gpr.used |= REGFLAG_R(RSREG);
138         desc->gpr.modified |= REGFLAG_R(RTREG);
137         desc->regin[0] |= REGFLAG_R(RSREG);
138         desc->regout[0] |= REGFLAG_R(RTREG);
139139         return TRUE;
140140
141141      case 0x0f:   /* LUI */
142         desc->gpr.modified |= REGFLAG_R(RTREG);
142         desc->regout[0] |= REGFLAG_R(RTREG);
143143         return TRUE;
144144
145145      case 0x1a:   /* LDL */
146146      case 0x1b:   /* LDR */
147147      case 0x22:   /* LWL */
148148      case 0x26:   /* LWR */
149         desc->gpr.used |= REGFLAG_R(RTREG);
149         desc->regin[0] |= REGFLAG_R(RTREG);
150150      case 0x20:   /* LB */
151151      case 0x21:   /* LH */
152152      case 0x23:   /* LW */
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156156      case 0x30:   /* LL */
157157      case 0x34:   /* LLD */
158158      case 0x37:   /* LD */
159         desc->gpr.used |= REGFLAG_R(RSREG);
160         desc->gpr.modified |= REGFLAG_R(RTREG);
159         desc->regin[0] |= REGFLAG_R(RSREG);
160         desc->regout[0] |= REGFLAG_R(RTREG);
161161         desc->flags |= OPFLAG_READS_MEMORY | OPFLAG_CAN_CAUSE_EXCEPTION;
162162         return TRUE;
163163
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171171      case 0x38:   /* SC */
172172      case 0x3c:   /* SCD */
173173      case 0x3f:   /* SD */
174         desc->gpr.used |= REGFLAG_R(RSREG) | REGFLAG_R(RTREG);
174         desc->regin[0] |= REGFLAG_R(RSREG) | REGFLAG_R(RTREG);
175175         desc->flags |= OPFLAG_WRITES_MEMORY | OPFLAG_CAN_CAUSE_EXCEPTION;
176176         return TRUE;
177177
178178      case 0x31:   /* LWC1 */
179179      case 0x35:   /* LDC1 */
180         desc->gpr.used |= REGFLAG_R(RSREG);
181         desc->fpr.modified |= REGFLAG_CPR1(RTREG);
180         desc->regin[0] |= REGFLAG_R(RSREG);
181         desc->regout[1] |= REGFLAG_CPR1(RTREG);
182182         desc->flags |= OPFLAG_READS_MEMORY | OPFLAG_CAN_CAUSE_EXCEPTION;
183183         return TRUE;
184184
185185      case 0x39:   /* SWC1 */
186186      case 0x3d:   /* SDC1 */
187         desc->gpr.used |= REGFLAG_R(RSREG);
188         desc->fpr.used |= REGFLAG_CPR1(RTREG);
187         desc->regin[0] |= REGFLAG_R(RSREG);
188         desc->regin[1] |= REGFLAG_CPR1(RTREG);
189189         desc->flags |= OPFLAG_WRITES_MEMORY | OPFLAG_CAN_CAUSE_EXCEPTION;
190190         return TRUE;
191191
192192      case 0x32:   /* LWC2 */
193193      case 0x36:   /* LDC2 */
194         desc->gpr.used |= REGFLAG_R(RSREG);
194         desc->regin[0] |= REGFLAG_R(RSREG);
195195         desc->flags |= OPFLAG_READS_MEMORY | OPFLAG_CAN_CAUSE_EXCEPTION;
196196         return TRUE;
197197
198198      case 0x3a:   /* SWC2 */
199199      case 0x3e:   /* SDC2 */
200         desc->gpr.used |= REGFLAG_R(RSREG);
200         desc->regin[0] |= REGFLAG_R(RSREG);
201201         desc->flags |= OPFLAG_WRITES_MEMORY | OPFLAG_CAN_CAUSE_EXCEPTION;
202202         return TRUE;
203203
r2844r2845
232232      case 0x3c:   /* DSLL32 */
233233      case 0x3e:   /* DSRL32 */
234234      case 0x3f:   /* DSRA32 */
235         desc->gpr.used |= REGFLAG_R(RTREG);
236         desc->gpr.modified |= REGFLAG_R(RDREG);
235         desc->regin[0] |= REGFLAG_R(RTREG);
236         desc->regout[0] |= REGFLAG_R(RDREG);
237237         return TRUE;
238238
239239      case 0x0a:   /* MOVZ - MIPS IV */
240240      case 0x0b:   /* MOVN - MIPS IV */
241241         if (mips->flavor < MIPS3_TYPE_MIPS_IV)
242242            return FALSE;
243         desc->gpr.used |= REGFLAG_R(RDREG);
243         desc->regin[0] |= REGFLAG_R(RDREG);
244244      case 0x04:   /* SLLV */
245245      case 0x06:   /* SRLV */
246246      case 0x07:   /* SRAV */
r2844r2845
257257      case 0x2b:   /* SLTU */
258258      case 0x2d:   /* DADDU */
259259      case 0x2f:   /* DSUBU */
260         desc->gpr.used |= REGFLAG_R(RSREG) | REGFLAG_R(RTREG);
261         desc->gpr.modified |= REGFLAG_R(RDREG);
260         desc->regin[0] |= REGFLAG_R(RSREG) | REGFLAG_R(RTREG);
261         desc->regout[0] |= REGFLAG_R(RDREG);
262262         return TRUE;
263263
264264      case 0x20:   /* ADD */
265265      case 0x22:   /* SUB */
266266      case 0x2c:   /* DADD */
267267      case 0x2e:   /* DSUB */
268         desc->gpr.used |= REGFLAG_R(RSREG) | REGFLAG_R(RTREG);
269         desc->gpr.modified |= REGFLAG_R(RDREG);
268         desc->regin[0] |= REGFLAG_R(RSREG) | REGFLAG_R(RTREG);
269         desc->regout[0] |= REGFLAG_R(RDREG);
270270         desc->flags |= OPFLAG_CAN_CAUSE_EXCEPTION;
271271         return TRUE;
272272
r2844r2845
276276      case 0x33:   /* TLTU */
277277      case 0x34:   /* TEQ */
278278      case 0x36:   /* TNE */
279         desc->gpr.used |= REGFLAG_R(RSREG) | REGFLAG_R(RTREG);
279         desc->regin[0] |= REGFLAG_R(RSREG) | REGFLAG_R(RTREG);
280280         desc->flags |= OPFLAG_CAN_CAUSE_EXCEPTION;
281281         return TRUE;
282282
283283      case 0x01:   /* MOVF - MIPS IV */
284284         if (mips->flavor < MIPS3_TYPE_MIPS_IV)
285285            return FALSE;
286         desc->gpr.used |= REGFLAG_R(RSREG);
287         desc->fpr.used |= REGFLAG_FCC;
288         desc->gpr.modified |= REGFLAG_R(RDREG);
286         desc->regin[0] |= REGFLAG_R(RSREG);
287         desc->regin[2] |= REGFLAG_FCC;
288         desc->regout[0] |= REGFLAG_R(RDREG);
289289         return TRUE;
290290
291291      case 0x08:   /* JR */
292         desc->gpr.used |= REGFLAG_R(RSREG);
292         desc->regin[0] |= REGFLAG_R(RSREG);
293293         desc->flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE;
294294         desc->targetpc = BRANCH_TARGET_DYNAMIC;
295295         desc->delayslots = 1;
296296         return TRUE;
297297
298298      case 0x09:   /* JALR */
299         desc->gpr.used |= REGFLAG_R(RSREG);
300         desc->gpr.modified |= REGFLAG_R(RDREG);
299         desc->regin[0] |= REGFLAG_R(RSREG);
300         desc->regout[0] |= REGFLAG_R(RDREG);
301301         desc->flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE;
302302         desc->targetpc = BRANCH_TARGET_DYNAMIC;
303303         desc->delayslots = 1;
304304         return TRUE;
305305
306306      case 0x10:   /* MFHI */
307         desc->gpr.used |= REGFLAG_HI;
308         desc->gpr.modified |= REGFLAG_R(RDREG);
307         desc->regin[0] |= REGFLAG_HI;
308         desc->regout[0] |= REGFLAG_R(RDREG);
309309         return TRUE;
310310
311311      case 0x11:   /* MTHI */
312         desc->gpr.used |= REGFLAG_R(RSREG);
313         desc->gpr.modified |= REGFLAG_HI;
312         desc->regin[0] |= REGFLAG_R(RSREG);
313         desc->regout[0] |= REGFLAG_HI;
314314         return TRUE;
315315
316316      case 0x12:   /* MFLO */
317         desc->gpr.used |= REGFLAG_LO;
318         desc->gpr.modified |= REGFLAG_R(RDREG);
317         desc->regin[2] |= REGFLAG_LO;
318         desc->regout[0] |= REGFLAG_R(RDREG);
319319         return TRUE;
320320
321321      case 0x13:   /* MTLO */
322         desc->gpr.used |= REGFLAG_R(RSREG);
323         desc->gpr.modified |= REGFLAG_LO;
322         desc->regin[0] |= REGFLAG_R(RSREG);
323         desc->regout[2] |= REGFLAG_LO;
324324         return TRUE;
325325
326326      case 0x18:   /* MULT */
327327      case 0x19:   /* MULTU */
328         desc->gpr.used |= REGFLAG_R(RSREG) | REGFLAG_R(RTREG);
329         desc->gpr.modified |= REGFLAG_LO | REGFLAG_HI;
328         desc->regin[0] |= REGFLAG_R(RSREG) | REGFLAG_R(RTREG);
329         desc->regout[2] |= REGFLAG_LO | REGFLAG_HI;
330330         desc->cycles = 3;
331331         return TRUE;
332332
333333      case 0x1a:   /* DIV */
334334      case 0x1b:   /* DIVU */
335         desc->gpr.used |= REGFLAG_R(RSREG) | REGFLAG_R(RTREG);
336         desc->gpr.modified |= REGFLAG_LO | REGFLAG_HI;
335         desc->regin[0] |= REGFLAG_R(RSREG) | REGFLAG_R(RTREG);
336         desc->regout[2] |= REGFLAG_LO | REGFLAG_HI;
337337         desc->cycles = 35;
338338         return TRUE;
339339
340340      case 0x1c:   /* DMULT */
341341      case 0x1d:   /* DMULTU */
342         desc->gpr.used |= REGFLAG_R(RSREG) | REGFLAG_R(RTREG);
343         desc->gpr.modified |= REGFLAG_LO | REGFLAG_HI;
342         desc->regin[0] |= REGFLAG_R(RSREG) | REGFLAG_R(RTREG);
343         desc->regout[2] |= REGFLAG_LO | REGFLAG_HI;
344344         desc->cycles = 7;
345345         return TRUE;
346346
347347      case 0x1e:   /* DDIV */
348348      case 0x1f:   /* DDIVU */
349         desc->gpr.used |= REGFLAG_R(RSREG) | REGFLAG_R(RTREG);
350         desc->gpr.modified |= REGFLAG_LO | REGFLAG_HI;
349         desc->regin[0] |= REGFLAG_R(RSREG) | REGFLAG_R(RTREG);
350         desc->regout[2] |= REGFLAG_LO | REGFLAG_HI;
351351         desc->cycles = 67;
352352         return TRUE;
353353
r2844r2845
383383            desc->flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE;
384384         else
385385         {
386            desc->gpr.used |= REGFLAG_R(RSREG);
386            desc->regin[0] |= REGFLAG_R(RSREG);
387387            desc->flags |= OPFLAG_IS_CONDITIONAL_BRANCH;
388388         }
389389         desc->targetpc = desc->pc + 4 + (SIMMVAL << 2);
r2844r2845
397397      case 0x0b:   /* TLTIU */
398398      case 0x0c:   /* TEQI */
399399      case 0x0e:   /* TNEI */
400         desc->gpr.used |= REGFLAG_R(RSREG);
400         desc->regin[0] |= REGFLAG_R(RSREG);
401401         desc->flags |= OPFLAG_CAN_CAUSE_EXCEPTION;
402402         return TRUE;
403403
r2844r2845
409409            desc->flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE;
410410         else
411411         {
412            desc->gpr.used |= REGFLAG_R(RSREG);
412            desc->regin[0] |= REGFLAG_R(RSREG);
413413            desc->flags |= OPFLAG_IS_CONDITIONAL_BRANCH;
414414         }
415         desc->gpr.modified |= REGFLAG_R(31);
415         desc->regout[0] |= REGFLAG_R(31);
416416         desc->targetpc = desc->pc + 4 + (SIMMVAL << 2);
417417         desc->delayslots = 1;
418418         desc->skipslots = (RTREG & 0x02) ? 1 : 0;
r2844r2845
435435   {
436436      case 0: /* MAD */
437437      case 1: /* MADU */
438         desc->gpr.used |= REGFLAG_R(RSREG) | REGFLAG_R(RTREG) | REGFLAG_LO | REGFLAG_HI;
439         desc->gpr.modified |= REGFLAG_LO | REGFLAG_HI;
438         desc->regin[0] |= REGFLAG_R(RSREG) | REGFLAG_R(RTREG);
439         desc->regin[2] |= REGFLAG_LO | REGFLAG_HI;
440         desc->regout[2] |= REGFLAG_LO | REGFLAG_HI;
440441         return TRUE;
441442
442443      case 2: /* MUL */
443         desc->gpr.used |= REGFLAG_R(RSREG) | REGFLAG_R(RTREG);
444         desc->gpr.modified |= REGFLAG_R(RDREG);
444         desc->regin[0] |= REGFLAG_R(RSREG) | REGFLAG_R(RTREG);
445         desc->regout[0] |= REGFLAG_R(RDREG);
445446         desc->cycles = 3;
446447         return TRUE;
447448   }
r2844r2845
469470            desc->cycles += MIPS3_COUNT_READ_CYCLES;
470471         if (RDREG == COP0_Cause)
471472            desc->cycles += MIPS3_CAUSE_READ_CYCLES;
472         desc->gpr.modified |= REGFLAG_R(RTREG);
473         desc->regout[0] |= REGFLAG_R(RTREG);
473474         return TRUE;
474475
475476      case 0x02:   /* CFCz */
476         desc->gpr.modified |= REGFLAG_R(RTREG);
477         desc->regout[0] |= REGFLAG_R(RTREG);
477478         return TRUE;
478479
479480      case 0x04:   /* MTCz */
480481      case 0x05:   /* DMTCz */
481482      case 0x06:   /* CTCz */
482         desc->gpr.used |= REGFLAG_R(RTREG);
483         desc->regin[0] |= REGFLAG_R(RTREG);
483484         if (RSREG == 0x04 || RSREG == 0x05)
484485         {
485486            if (RDREG == COP0_Cause)
r2844r2845
541542   {
542543      case 0x00:   /* MFCz */
543544      case 0x01:   /* DMFCz */
544         desc->fpr.used |= REGFLAG_CPR1(RDREG);
545         desc->gpr.modified |= REGFLAG_R(RTREG);
545         desc->regin[1] |= REGFLAG_CPR1(RDREG);
546         desc->regout[0] |= REGFLAG_R(RTREG);
546547         return TRUE;
547548
548549      case 0x02:   /* CFCz */
549         desc->gpr.modified |= REGFLAG_R(RTREG);
550         desc->regout[0] |= REGFLAG_R(RTREG);
550551         return TRUE;
551552
552553      case 0x04:   /* MTCz */
553554      case 0x05:   /* DMTCz */
554         desc->gpr.used |= REGFLAG_R(RTREG);
555         desc->fpr.modified |= REGFLAG_CPR1(RDREG);
555         desc->regin[0] |= REGFLAG_R(RTREG);
556         desc->regout[1] |= REGFLAG_CPR1(RDREG);
556557         return TRUE;
557558
558559      case 0x06:   /* CTCz */
559         desc->gpr.used |= REGFLAG_R(RTREG);
560         desc->regin[0] |= REGFLAG_R(RTREG);
560561         return TRUE;
561562
562563      case 0x08:   /* BC */
r2844r2845
566567            case 0x01:   /* BCzT */
567568            case 0x02:   /* BCzFL */
568569            case 0x03:   /* BCzTL */
569               desc->fpr.used |= REGFLAG_FCC;
570               desc->regin[2] |= REGFLAG_FCC;
570571               desc->flags |= OPFLAG_IS_CONDITIONAL_BRANCH;
571572               desc->targetpc = desc->pc + 4 + (SIMMVAL << 2);
572573               desc->delayslots = 1;
r2844r2845
587588            case 0x01:   /* SUB */
588589            case 0x02:   /* MUL */
589590            case 0x03:   /* DIV */
590               desc->fpr.used |= REGFLAG_CPR1(FSREG) | REGFLAG_CPR1(FTREG);
591               desc->fpr.modified |= REGFLAG_CPR1(FDREG);
591               desc->regin[1] |= REGFLAG_CPR1(FSREG) | REGFLAG_CPR1(FTREG);
592               desc->regout[1] |= REGFLAG_CPR1(FDREG);
592593               return TRUE;
593594
594595            case 0x15:   /* RECIP - MIPS IV */
r2844r2845
611612            case 0x21:   /* CVT.D */
612613            case 0x24:   /* CVT.W */
613614            case 0x25:   /* CVT.L */
614               desc->fpr.used |= REGFLAG_CPR1(FSREG);
615               desc->fpr.modified |= REGFLAG_CPR1(FDREG);
615               desc->regin[1] |= REGFLAG_CPR1(FSREG);
616               desc->regout[1] |= REGFLAG_CPR1(FDREG);
616617               return TRUE;
617618
618619            case 0x11:   /* MOVT/F - MIPS IV */
619620               if (mips->flavor < MIPS3_TYPE_MIPS_IV)
620621                  return FALSE;
621               desc->fpr.used |= REGFLAG_CPR1(FSREG) | REGFLAG_FCC;
622               desc->fpr.modified |= REGFLAG_CPR1(FDREG);
622               desc->regin[1] |= REGFLAG_CPR1(FSREG);
623               desc->regin[2] |= REGFLAG_FCC;
624               desc->regout[1] |= REGFLAG_CPR1(FDREG);
623625               return TRUE;
624626
625627            case 0x30:   case 0x38:   /* C.F */
626628            case 0x31:   case 0x39:   /* C.UN */
627               desc->fpr.modified |= REGFLAG_FCC;
629               desc->regout[2] |= REGFLAG_FCC;
628630               return TRUE;
629631
630632            case 0x32:   case 0x3a:   /* C.EQ */
r2844r2845
633635            case 0x35:   case 0x3d:   /* C.ULT */
634636            case 0x36:   case 0x3e:   /* C.OLE */
635637            case 0x37:   case 0x3f:   /* C.ULE */
636               desc->fpr.used |= REGFLAG_CPR1(FSREG) | REGFLAG_CPR1(FTREG);
637               desc->fpr.modified |= REGFLAG_FCC;
638               desc->regin[1] |= REGFLAG_CPR1(FSREG) | REGFLAG_CPR1(FTREG);
639               desc->regout[2] |= REGFLAG_FCC;
638640               return TRUE;
639641         }
640642         return FALSE;
r2844r2845
659661   {
660662      case 0x00:   /* LWXC1 */
661663      case 0x01:   /* LDXC1 */
662         desc->gpr.used |= REGFLAG_R(RSREG) | REGFLAG_R(RTREG);
663         desc->fpr.modified |= REGFLAG_CPR1(FDREG);
664         desc->regin[0] |= REGFLAG_R(RSREG) | REGFLAG_R(RTREG);
665         desc->regout[1] |= REGFLAG_CPR1(FDREG);
664666         desc->flags |= OPFLAG_READS_MEMORY;
665667         return TRUE;
666668
667669      case 0x08:   /* SWXC1 */
668670      case 0x09:   /* SDXC1 */
669         desc->gpr.used |= REGFLAG_R(RSREG) | REGFLAG_R(RTREG);
670         desc->fpr.used |= REGFLAG_CPR1(FDREG);
671         desc->regin[0] |= REGFLAG_R(RSREG) | REGFLAG_R(RTREG);
672         desc->regin[1] |= REGFLAG_CPR1(FDREG);
671673         desc->flags |= OPFLAG_WRITES_MEMORY;
672674         return TRUE;
673675
r2844r2845
679681      case 0x28:   case 0x29:   /* MSUB */
680682      case 0x30:   case 0x31:   /* NMADD */
681683      case 0x38:   case 0x39:   /* NMSUB */
682         desc->fpr.used |= REGFLAG_CPR1(FSREG) | REGFLAG_CPR1(FTREG) | REGFLAG_CPR1(FRREG);
683         desc->fpr.modified |= REGFLAG_CPR1(FDREG);
684         desc->regin[1] |= REGFLAG_CPR1(FSREG) | REGFLAG_CPR1(FTREG) | REGFLAG_CPR1(FRREG);
685         desc->regout[1] |= REGFLAG_CPR1(FDREG);
684686         return TRUE;
685687   }
686688
r2844r2845
704706      case 0x00:   /* MFCz */
705707      case 0x01:   /* DMFCz */
706708      case 0x02:   /* CFCz */
707         desc->gpr.modified |= REGFLAG_R(RTREG);
709         desc->regout[0] |= REGFLAG_R(RTREG);
708710         return TRUE;
709711
710712      case 0x04:   /* MTCz */
711713      case 0x05:   /* DMTCz */
712714      case 0x06:   /* CTCz */
713         desc->gpr.used |= REGFLAG_R(RTREG);
715         desc->regin[0] |= REGFLAG_R(RTREG);
714716         return TRUE;
715717
716718      case 0x08:   /* BC */
src/emu/cpu/mips/mips3fe.h
r2844r2845
2020    CONSTANTS
2121***************************************************************************/
2222
23/* register flags */
24#define REGFLAG_R(n)               (((n) == 0) ? 0 : ((UINT64)1 << (n)))
25#define REGFLAG_LO                  (REGFLAG_R(REG_LO))
26#define REGFLAG_HI                  (REGFLAG_R(REG_HI))
27#define REGFLAG_CPR1(n)               ((UINT64)1 << (n))
28#define REGFLAG_FCC                  (REGFLAG_CPR1(32))
23/* register flags 0 */
24#define REGFLAG_R(n)               (((n) == 0) ? 0 : (1 << (n)))
2925
26/* register flags 1 */
27#define REGFLAG_CPR1(n)               (1 << (n))
3028
29/* register flags 2 */
30#define REGFLAG_LO                  (1 << 0)
31#define REGFLAG_HI                  (1 << 1)
32#define REGFLAG_FCC                  (1 << 2)
3133
34
35
3236/***************************************************************************
3337    FUNCTION PROTOTYPES
3438***************************************************************************/
src/emu/cpu/mips/mips3drc.c
r2844r2845
4444***************************************************************************/
4545
4646#define FORCE_C_BACKEND               (0)
47#define LOG_UML                     (0)
48#define LOG_NATIVE                  (0)
47#define LOG_UML                     (1)
48#define LOG_NATIVE                  (1)
4949
5050#define DISABLE_FAST_REGISTERS         (0)
5151#define SINGLE_INSTRUCTION_MODE         (0)
r2844r2845
249249
250250static void log_add_disasm_comment(drcuml_block *block, UINT32 pc, UINT32 op);
251251static const char *log_desc_flags_to_string(UINT32 flags);
252static void log_register_list(drcuml_state *drcuml, const char *string, UINT64 gprmask, UINT64 fprmask);
252static void log_register_list(drcuml_state *drcuml, const char *string, const UINT32 *reglist, const UINT32 *regnostarlist);
253253static void log_opcode_desc(drcuml_state *drcuml, const opcode_desc *desclist, int indent);
254254
255255
r2844r2845
917917
918918   /* check for interrupts */
919919   UML_AND(block, IREG(0), CPR032(COP0_Cause), CPR032(COP0_Status));            // and     i0,[Cause],[Status]
920   UML_ANDf(block, IREG(0), IREG(0), IMM(0xfc00), FLAGS_Z);                  // and     i0,i0,0xfc00,Z
920   UML_AND(block, IREG(0), IREG(0), IMM(0xfc00));                           // and     i0,i0,0xfc00,Z
921921   UML_JMPc(block, IF_Z, skip);                                       // jmp     skip,Z
922922   UML_TEST(block, CPR032(COP0_Status), IMM(SR_IE));                        // test    [Status],SR_IE
923923   UML_JMPc(block, IF_Z, skip);                                       // jmp     skip,Z
r2844r2845
11271127   UML_MOVc(block, IF_Z, IREG(0), IMM(0x80000000 + offset));                  // mov     i0,0x80000000 + offset,z
11281128
11291129   /* adjust cycles */
1130   UML_SUBf(block, MEM(&mips3->icount), MEM(&mips3->icount), IREG(1), FLAGS_S);    // sub icount,icount,cycles,S
1130   UML_SUB(block, MEM(&mips3->icount), MEM(&mips3->icount), IREG(1));             // sub icount,icount,cycles,S
11311131   UML_EXHc(block, IF_S, mips3->impstate->out_of_cycles, IREG(0));               // exh     out_of_cycles,i0
11321132
11331133   UML_HASHJMP(block, MEM(&mips3->impstate->mode), IREG(0), mips3->impstate->nocode);// hashjmp <mode>,i0,nocode
r2844r2845
13071307            if (!ismasked)
13081308               UML_WRITE(block, IREG(0), IREG(1), PROGRAM_DWORD);            // write   i0,i1,program_dword
13091309            else
1310               UML_WRITEM(block, IREG(0), IREG(2), IREG(1), PROGRAM_DWORD);   // writem  i0,i2,i1,program_dword
1310               UML_WRITEM(block, IREG(0), IREG(1), IREG(2), PROGRAM_DWORD);   // writem  i0,i1,i2,program_dword
13111311         }
13121312         else
13131313         {
r2844r2845
13241324            if (!ismasked)
13251325               UML_DWRITE(block, IREG(0), IREG(1), PROGRAM_QWORD);            // dwrite  i0,i1,program_qword
13261326            else
1327               UML_DWRITEM(block, IREG(0), IREG(2), IREG(1), PROGRAM_QWORD);   // dwritem i0,i2,i1,program_qword
1327               UML_DWRITEM(block, IREG(0), IREG(1), IREG(2), PROGRAM_QWORD);   // dwritem i0,i1,i2,program_qword
13281328         }
13291329         else
13301330         {
r2844r2845
13901390
13911391      compiler->checksoftints = FALSE;
13921392      UML_AND(block, IREG(0), CPR032(COP0_Cause), CPR032(COP0_Status));         // and     i0,[Cause],[Status]
1393      UML_ANDf(block, IREG(0), IREG(0), IMM(0x0300), FLAGS_Z);               // and     i0,i0,0x0300,Z
1393      UML_AND(block, IREG(0), IREG(0), IMM(0x0300));                        // and     i0,i0,0x0300
13941394      UML_JMPc(block, IF_Z, skip = compiler->labelnum++);                     // jmp     skip,Z
13951395      UML_MOV(block, IREG(0), PARAM(ptype, pvalue));                        // mov     i0,nextpc
13961396      UML_MOV(block, IREG(1), IMM(compiler->cycles));                        // mov     i1,cycles
r2844r2845
14051405
14061406      compiler->checkints = FALSE;
14071407      UML_AND(block, IREG(0), CPR032(COP0_Cause), CPR032(COP0_Status));         // and     i0,[Cause],[Status]
1408      UML_ANDf(block, IREG(0), IREG(0), IMM(0xfc00), FLAGS_Z);               // and     i0,i0,0xfc00,Z
1408      UML_AND(block, IREG(0), IREG(0), IMM(0xfc00));                        // and     i0,i0,0xfc00
14091409      UML_JMPc(block, IF_Z, skip = compiler->labelnum++);                     // jmp     skip,Z
14101410      UML_TEST(block, CPR032(COP0_Status), IMM(SR_IE));                     // test    [Status],SR_IE
14111411      UML_JMPc(block, IF_Z, skip);                                    // jmp     skip,Z
r2844r2845
14201420   /* account for cycles */
14211421   if (compiler->cycles > 0)
14221422   {
1423      UML_SUBf(block, MEM(&mips3->icount), MEM(&mips3->icount), MAPVAR_CYCLES, allow_exception ? FLAGS_S : 0);
1424                                                               // sub     icount,icount,cycles,S
1423      UML_SUB(block, MEM(&mips3->icount), MEM(&mips3->icount), MAPVAR_CYCLES);   // sub     icount,icount,cycles
14251424      UML_MAPVAR(block, MAPVAR_CYCLES, 0);                              // mapvar  cycles,0
14261425      if (allow_exception)
14271426         UML_EXHc(block, IF_S, mips3->impstate->out_of_cycles, PARAM(ptype, pvalue));
r2844r2845
17151714         return TRUE;
17161715
17171716      case 0x08:   /* ADDI - MIPS I */
1717         UML_ADD(block, IREG(0), R32(RSREG), IMM(SIMMVAL));                  // add     i0,<rsreg>,SIMMVAL
17181718         if (mips3->impstate->drcoptions & MIPS3DRC_CHECK_OVERFLOWS)
1719         {
1720            UML_ADDf(block, IREG(0), R32(RSREG), IMM(SIMMVAL), FLAGS_V);      // add     i0,<rsreg>,SIMMVAL,V
17211719            UML_EXHc(block, IF_V, mips3->impstate->exception[EXCEPTION_OVERFLOW], IMM(0));
17221720                                                               // exh    overflow,0
1723         }
1724         else
1725            UML_ADD(block, IREG(0), R32(RSREG), IMM(SIMMVAL));               // add     i0,<rsreg>,SIMMVAL
17261721         if (RTREG != 0)
17271722            UML_DSEXT(block, R64(RTREG), IREG(0), DWORD);                  // dsext   <rtreg>,i0,dword
17281723         return TRUE;
r2844r2845
17361731         return TRUE;
17371732
17381733      case 0x18:   /* DADDI - MIPS III */
1734         UML_DADD(block, IREG(0), R64(RSREG), IMM(SIMMVAL));                  // dadd    i0,<rsreg>,SIMMVAL
17391735         if (mips3->impstate->drcoptions & MIPS3DRC_CHECK_OVERFLOWS)
1740         {
1741            UML_DADDf(block, IREG(0), R64(RSREG), IMM(SIMMVAL), FLAGS_V);      // dadd    i0,<rsreg>,SIMMVAL,V
17421736            UML_EXHc(block, IF_V, mips3->impstate->exception[EXCEPTION_OVERFLOW], IMM(0));
17431737                                                               // exh    overflow,0
1744         }
1745         else
1746            UML_DADD(block, IREG(0), R64(RSREG), IMM(SIMMVAL));               // dadd    i0,<rsreg>,SIMMVAL
17471738         if (RTREG != 0)
17481739            UML_DMOV(block, R64(RTREG), IREG(0));                        // dmov    <rtreg>,i0
17491740         return TRUE;
r2844r2845
18531844      case 0x22:   /* LWL - MIPS I */
18541845         UML_ADD(block, IREG(0), R32(RSREG), IMM(SIMMVAL));                  // add     i0,<rsreg>,SIMMVAL
18551846         UML_SHL(block, IREG(1), IREG(0), IMM(3));                        // shl     i1,i0,3
1847         UML_AND(block, IREG(0), IREG(0), IMM(~3));                        // and     i0,i0,~3
18561848         if (!mips3->bigendian)
18571849            UML_XOR(block, IREG(1), IREG(1), IMM(0x18));                  // xor     i1,i1,0x18
18581850         UML_SHR(block, IREG(2), IMM(~0), IREG(1));                        // shr     i2,~0,i1
r2844r2845
18721864      case 0x26:   /* LWR - MIPS I */
18731865         UML_ADD(block, IREG(0), R32(RSREG), IMM(SIMMVAL));                  // add     i0,<rsreg>,SIMMVAL
18741866         UML_SHL(block, IREG(1), IREG(0), IMM(3));                        // shl     i1,i0,3
1867         UML_AND(block, IREG(0), IREG(0), IMM(~3));                        // and     i0,i0,~3
18751868         if (mips3->bigendian)
18761869            UML_XOR(block, IREG(1), IREG(1), IMM(0x18));                  // xor     i1,i1,0x18
18771870         UML_SHL(block, IREG(2), IMM(~0), IREG(1));                        // shl     i2,~0,i1
r2844r2845
18921885      case 0x1a:   /* LDL - MIPS III */
18931886         UML_ADD(block, IREG(0), R32(RSREG), IMM(SIMMVAL));                  // add     i0,<rsreg>,SIMMVAL
18941887         UML_SHL(block, IREG(1), IREG(0), IMM(3));                        // shl     i1,i0,3
1888         UML_AND(block, IREG(0), IREG(0), IMM(~7));                        // and     i0,i0,~7
18951889         if (!mips3->bigendian)
18961890            UML_XOR(block, IREG(1), IREG(1), IMM(0x38));                  // xor     i1,i1,0x38
18971891         UML_DSHR(block, IREG(2), IMM((UINT64)~0), IREG(1));                  // dshr    i2,~0,i1
r2844r2845
19091903      case 0x1b:   /* LDR - MIPS III */
19101904         UML_ADD(block, IREG(0), R32(RSREG), IMM(SIMMVAL));                  // add     i0,<rsreg>,SIMMVAL
19111905         UML_SHL(block, IREG(1), IREG(0), IMM(3));                        // shl     i1,i0,3
1906         UML_AND(block, IREG(0), IREG(0), IMM(~7));                        // and     i0,i0,~7
19121907         if (mips3->bigendian)
19131908            UML_XOR(block, IREG(1), IREG(1), IMM(0x38));                  // xor     i1,i1,0x38
19141909         UML_DSHL(block, IREG(2), IMM((UINT64)~0), IREG(1));                  // dshl    i2,~0,i1
r2844r2845
19941989      case 0x2a:   /* SWL - MIPS I */
19951990         UML_ADD(block, IREG(0), R32(RSREG), IMM(SIMMVAL));                  // add     i0,<rsreg>,SIMMVAL
19961991         UML_SHL(block, IREG(3), IREG(0), IMM(3));                        // shl     i3,i0,3
1992         UML_AND(block, IREG(0), IREG(0), IMM(~3));                        // and     i0,i0,~3
19971993         UML_MOV(block, IREG(1), R32(RTREG));                           // mov     i1,<rtreg>
19981994         if (!mips3->bigendian)
19991995            UML_XOR(block, IREG(3), IREG(3), IMM(0x18));                  // xor     i3,i3,0x18
r2844r2845
20082004      case 0x2e:   /* SWR - MIPS I */
20092005         UML_ADD(block, IREG(0), R32(RSREG), IMM(SIMMVAL));                  // add     i0,<rsreg>,SIMMVAL
20102006         UML_SHL(block, IREG(3), IREG(0), IMM(3));                        // shl     i3,i0,3
2007         UML_AND(block, IREG(0), IREG(0), IMM(~3));                        // and     i0,i0,~3
20112008         UML_MOV(block, IREG(1), R32(RTREG));                           // mov     i1,<rtreg>
20122009         if (mips3->bigendian)
20132010            UML_XOR(block, IREG(3), IREG(3), IMM(0x18));                  // xor     i3,i3,0x18
r2844r2845
20222019      case 0x2c:   /* SDL - MIPS III */
20232020         UML_ADD(block, IREG(0), R32(RSREG), IMM(SIMMVAL));                  // add     i0,<rsreg>,SIMMVAL
20242021         UML_SHL(block, IREG(3), IREG(0), IMM(3));                        // shl     i3,i0,3
2022         UML_AND(block, IREG(0), IREG(0), IMM(~7));                        // and     i0,i0,~7
20252023         UML_DMOV(block, IREG(1), R64(RTREG));                           // dmov    i1,<rtreg>
20262024         if (!mips3->bigendian)
20272025            UML_XOR(block, IREG(3), IREG(3), IMM(0x38));                  // xor     i3,i3,0x38
r2844r2845
20362034      case 0x2d:   /* SDR - MIPS III */
20372035         UML_ADD(block, IREG(0), R32(RSREG), IMM(SIMMVAL));                  // add     i0,<rsreg>,SIMMVAL
20382036         UML_SHL(block, IREG(3), IREG(0), IMM(3));                        // shl     i3,i0,3
2037         UML_AND(block, IREG(0), IREG(0), IMM(~7));                        // and     i0,i0,~7
20392038         UML_DMOV(block, IREG(1), R64(RTREG));                           // dmov    i1,<rtreg>
20402039         if (mips3->bigendian)
20412040            UML_XOR(block, IREG(3), IREG(3), IMM(0x38));                  // xor     i3,i3,0x38
r2844r2845
22292228      case 0x20:   /* ADD - MIPS I */
22302229         if (mips3->impstate->drcoptions & MIPS3DRC_CHECK_OVERFLOWS)
22312230         {
2232            UML_ADDf(block, IREG(0), R32(RSREG), R32(RTREG), FLAGS_V);         // add     i0,<rsreg>,<rtreg>,V
2231            UML_ADD(block, IREG(0), R32(RSREG), R32(RTREG));               // add     i0,<rsreg>,<rtreg>
22332232            UML_EXHc(block, IF_V, mips3->impstate->exception[EXCEPTION_OVERFLOW], IMM(0));
22342233                                                               // exh     overflow,0,V
22352234            if (RDREG != 0)
r2844r2845
22532252      case 0x2c:   /* DADD - MIPS III */
22542253         if (mips3->impstate->drcoptions & MIPS3DRC_CHECK_OVERFLOWS)
22552254         {
2256            UML_DADDf(block, IREG(0), R64(RSREG), R64(RTREG), FLAGS_V);         // dadd    i0,<rsreg>,<rtreg>,V
2255            UML_DADD(block, IREG(0), R64(RSREG), R64(RTREG));               // dadd    i0,<rsreg>,<rtreg>
22572256            UML_EXHc(block, IF_V, mips3->impstate->exception[EXCEPTION_OVERFLOW], IMM(0));
22582257                                                               // exh     overflow,0,V
22592258            if (RDREG != 0)
r2844r2845
22712270      case 0x22:   /* SUB - MIPS I */
22722271         if (mips3->impstate->drcoptions & MIPS3DRC_CHECK_OVERFLOWS)
22732272         {
2274            UML_SUBf(block, IREG(0), R32(RSREG), R32(RTREG), FLAGS_V);         // sub     i0,<rsreg>,<rtreg>,V
2273            UML_SUB(block, IREG(0), R32(RSREG), R32(RTREG));               // sub     i0,<rsreg>,<rtreg>
22752274            UML_EXHc(block, IF_V, mips3->impstate->exception[EXCEPTION_OVERFLOW], IMM(0));
22762275                                                               // exh     overflow,0,V
22772276            if (RDREG != 0)
r2844r2845
22952294      case 0x2e:   /* DSUB - MIPS III */
22962295         if (mips3->impstate->drcoptions & MIPS3DRC_CHECK_OVERFLOWS)
22972296         {
2298            UML_DSUBf(block, IREG(0), R64(RSREG), R64(RTREG), FLAGS_V);         // dsub    i0,<rsreg>,<rtreg>,V
2297            UML_DSUB(block, IREG(0), R64(RSREG), R64(RTREG));               // dsub    i0,<rsreg>,<rtreg>
22992298            UML_EXHc(block, IF_V, mips3->impstate->exception[EXCEPTION_OVERFLOW], IMM(0));
23002299                                                               // exh     overflow,0,V
23012300            if (RDREG != 0)
r2844r2845
26072606         if (RSREG != 0 && RTREG != 0)
26082607         {
26092608            UML_MULS(block, IREG(0), IREG(1), R32(RSREG), R32(RTREG));         // muls   i0,i1,rsreg,rtreg
2610            UML_ADDf(block, FLAGS_C, IREG(0), IREG(0), LO32);               // add    i0,i0,lo
2609            UML_ADD(block, IREG(0), IREG(0), LO32);                        // add    i0,i0,lo
26112610            UML_ADDC(block, IREG(1), IREG(1), HI32);                     // addc   i1,i1,hi
26122611            UML_DSEXT(block, LO64, IREG(0), DWORD);                        // dsext   lo,i0,dword
26132612            UML_DSEXT(block, HI64, IREG(1), DWORD);                        // dsext   hi,i1,dword
r2844r2845
26182617         if (RSREG != 0 && RTREG != 0)
26192618         {
26202619            UML_MULU(block, IREG(0), IREG(1), R32(RSREG), R32(RTREG));         // mulu   i0,i1,rsreg,rtreg
2621            UML_ADDf(block, FLAGS_C, IREG(0), IREG(0), LO32);               // add    i0,i0,lo
2620            UML_ADD(block, IREG(0), IREG(0), LO32);                        // add    i0,i0,lo
26222621            UML_ADDC(block, IREG(1), IREG(1), HI32);                     // addc   i1,i1,hi
26232622            UML_DSEXT(block, LO64, IREG(0), DWORD);                        // dsext   lo,i0,dword
26242623            UML_DSEXT(block, HI64, IREG(1), DWORD);                        // dsext   hi,i1,dword
r2844r2845
27372736         UML_DSUB(block, IREG(0), MEM(&mips3->impstate->numcycles), MEM(&mips3->count_zero_time));
27382737                                                               // dsub    i0,[numcycles],[count_zero_time]
27392738         UML_AND(block, IREG(1), CPR032(COP0_Wired), IMM(0x3f));               // and     i1,[Wired],0x3f
2740         UML_SUBf(block, IREG(2), IMM(48), IREG(1), FLAGS_BE);               // sub     i2,48,i1,ALL
2739         UML_SUB(block, IREG(2), IMM(48), IREG(1));                        // sub     i2,48,i1
27412740         UML_JMPc(block, IF_BE, link1 = compiler->labelnum++);               // jmp     link1,BE
27422741         UML_DAND(block, IREG(2), IREG(2), IMM(0xffffffff));                  // dand    i2,i2,0xffffffff
27432742         UML_DDIVU(block, IREG(0), IREG(2), IREG(0), IREG(2));               // ddivu   i0,i2,i0,i2
r2844r2845
34333432    log_register_list - log a list of GPR registers
34343433-------------------------------------------------*/
34353434
3436static void log_register_list(drcuml_state *drcuml, const char *string, UINT64 gprmask, UINT64 fprmask)
3435static void log_register_list(drcuml_state *drcuml, const char *string, const UINT32 *reglist, const UINT32 *regnostarlist)
34373436{
34383437   int count = 0;
34393438   int regnum;
34403439
34413440   /* skip if nothing */
3442   if ((gprmask & ~1) == 0 && fprmask == 0)
3441   if (reglist[0] == 0 && reglist[1] == 0 && reglist[2] == 0)
34433442      return;
34443443
34453444   drcuml_log_printf(drcuml, "[%s:", string);
34463445
34473446   for (regnum = 1; regnum < 32; regnum++)
3448      if (gprmask & ((UINT64)1 << regnum))
3447      if (reglist[0] & REGFLAG_R(regnum))
3448      {
34493449         drcuml_log_printf(drcuml, "%sr%d", (count++ == 0) ? "" : ",", regnum);
3450   if (gprmask & ((UINT64)1 << REG_LO))
3450         if (regnostarlist != NULL && !(regnostarlist[0] & REGFLAG_R(regnum)))
3451            drcuml_log_printf(drcuml, "*");
3452      }
3453
3454   for (regnum = 0; regnum < 32; regnum++)
3455      if (reglist[1] & REGFLAG_CPR1(regnum))
3456      {
3457         drcuml_log_printf(drcuml, "%sfr%d", (count++ == 0) ? "" : ",", regnum);
3458         if (regnostarlist != NULL && !(regnostarlist[1] & REGFLAG_CPR1(regnum)))
3459            drcuml_log_printf(drcuml, "*");
3460      }
3461
3462   if (reglist[2] & REGFLAG_LO)
3463   {
34513464      drcuml_log_printf(drcuml, "%slo", (count++ == 0) ? "" : ",");
3452   if (gprmask & ((UINT64)1 << REG_HI))
3465      if (regnostarlist != NULL && !(regnostarlist[2] & REGFLAG_LO))
3466         drcuml_log_printf(drcuml, "*");
3467   }
3468   if (reglist[2] & REGFLAG_HI)
3469   {
34533470      drcuml_log_printf(drcuml, "%shi", (count++ == 0) ? "" : ",");
3471      if (regnostarlist != NULL && !(regnostarlist[2] & REGFLAG_HI))
3472         drcuml_log_printf(drcuml, "*");
3473   }
3474   if (reglist[2] & REGFLAG_FCC)
3475   {
3476      drcuml_log_printf(drcuml, "%sfcc", (count++ == 0) ? "" : ",");
3477      if (regnostarlist != NULL && !(regnostarlist[2] & REGFLAG_FCC))
3478         drcuml_log_printf(drcuml, "*");
3479   }
34543480
3455   for (regnum = 0; regnum < 32; regnum++)
3456      if (fprmask & ((UINT64)1 << regnum))
3457         drcuml_log_printf(drcuml, "%sfpr%d", (count++ == 0) ? "" : ",", regnum);
3458   if (fprmask & REGFLAG_FCC)
3459      drcuml_log_printf(drcuml, "%sfcc", (count++ == 0) ? "" : ",");
34603481   drcuml_log_printf(drcuml, "] ");
34613482}
34623483
r2844r2845
34883509      drcuml_log_printf(drcuml, "%08X [%08X] t:%08X f:%s: %-30s", desclist->pc, desclist->physpc, desclist->targetpc, log_desc_flags_to_string(desclist->flags), buffer);
34893510
34903511      /* output register states */
3491      log_register_list(drcuml, "use", desclist->gpr.used, desclist->fpr.used);
3492      log_register_list(drcuml, "mod", desclist->gpr.modified, desclist->fpr.modified);
3493      log_register_list(drcuml, "lrd", desclist->gpr.liveread, desclist->fpr.liveread);
3494      log_register_list(drcuml, "lwr", desclist->gpr.livewrite, desclist->fpr.livewrite);
3512      log_register_list(drcuml, "use", desclist->regin, NULL);
3513      log_register_list(drcuml, "mod", desclist->regout, desclist->regreq);
34953514      drcuml_log_printf(drcuml, "\n");
34963515
34973516      /* if we have a delay slot, output it recursively */
src/emu/cpu/drcbex86.c
r2844r2845
2020
2121    * Convert AND 0xff/0xffff to movzx
2222
23    * Convert SUB a,0,b to NEG
24
25    * Optimize, e.g., and [r5],i0,$FF to use ebx as temporary register
26        (avoid initial move) if i0 is not needed going forward
27
2328****************************************************************************
2429
2530    ---------------
r2844r2845
6570        [esp+4]    - input parameter (entry handle)
6671
6772    Runtime stack:
68        [esp]      - temporary space for hash jump
69        [esp+4]    - saved ebp
70        [esp+8]    - saved edi
71        [esp+12]   - saved esi
72        [esp+16]   - saved ebx
73        [esp+20]   - ret
74        [esp+24]   - input parameter (entry handle)
73        [esp]      - param 0
74        [esp+4]    - param 1
75        [esp+8]    - param 2
76        [esp+12]   - param 3
77        [esp+16]   - param 4
78        [esp+20]   - alignment
79        [esp+24]   - alignment
80        [esp+28]   - saved ebp
81        [esp+32]   - saved edi
82        [esp+36]   - saved esi
83        [esp+40]   - saved ebx
84        [esp+44]   - ret
85        [esp+48]   - input parameter (entry handle)
7586
7687***************************************************************************/
7788
7889#include "drcuml.h"
79#include "drcumld.h"
8090#include "drcbeut.h"
8191#include "debugger.h"
8292#include "x86emit.h"
r2844r2845
116126    MACROS
117127***************************************************************************/
118128
119#define X86_CONDITION(condflags)      (condition_map[condflags - DRCUML_COND_Z])
120#define X86_NOT_CONDITION(condflags)   (condition_map[condflags - DRCUML_COND_Z] ^ 1)
129#define X86_CONDITION(condition)      (condition_map[condition - DRCUML_COND_Z])
130#define X86_NOT_CONDITION(condition)   (condition_map[condition - DRCUML_COND_Z] ^ 1)
121131
132#define assert_no_condition(inst)      assert((inst)->condition == DRCUML_COND_ALWAYS)
133#define assert_any_condition(inst)      assert((inst)->condition == DRCUML_COND_ALWAYS || ((inst)->condition >= DRCUML_COND_Z && (inst)->condition < DRCUML_COND_MAX))
134#define assert_no_flags(inst)         assert((inst)->flags == 0)
135#define assert_flags(inst, valid)      assert(((inst)->flags & ~(valid)) == 0)
122136
123137
138
124139/***************************************************************************
125140    TYPE DEFINITIONS
126141***************************************************************************/
r2844r2845
271286static x86code *op_comment(drcbe_state *drcbe, x86code *dst, const drcuml_instruction *inst);
272287static x86code *op_mapvar(drcbe_state *drcbe, x86code *dst, const drcuml_instruction *inst);
273288
289static x86code *op_nop(drcbe_state *drcbe, x86code *dst, const drcuml_instruction *inst);
274290static x86code *op_debug(drcbe_state *drcbe, x86code *dst, const drcuml_instruction *inst);
275291static x86code *op_exit(drcbe_state *drcbe, x86code *dst, const drcuml_instruction *inst);
276292static x86code *op_hashjmp(drcbe_state *drcbe, x86code *dst, const drcuml_instruction *inst);
r2844r2845
354370   { DRCUML_OP_MAPVAR,  op_mapvar },   /* MAPVAR  mapvar,value           */
355371
356372   /* Control Flow Operations */
373   { DRCUML_OP_NOP,     op_nop },      /* NOP                            */
357374   { DRCUML_OP_DEBUG,   op_debug },   /* DEBUG   pc                     */
358375   { DRCUML_OP_EXIT,    op_exit },      /* EXIT    src1[,c]               */
359376   { DRCUML_OP_HASHJMP, op_hashjmp },   /* HASHJMP mode,pc,handle         */
r2844r2845
368385   { DRCUML_OP_SETFMOD, op_setfmod },   /* SETFMOD src                    */
369386   { DRCUML_OP_GETFMOD, op_getfmod },   /* GETFMOD dst                    */
370387   { DRCUML_OP_GETEXP,  op_getexp },   /* GETEXP  dst                    */
371   { DRCUML_OP_GETFLGS, op_getflgs },   /* GETFLGS dst[,f]                */
388   { DRCUML_OP_GETFLGS, op_getflgs },   /* GETFLGS dst,mask               */
372389   { DRCUML_OP_SAVE,    op_save },      /* SAVE    dst                    */
373390   { DRCUML_OP_RESTORE, op_restore },   /* RESTORE dst                    */
374391
r2844r2845
631648   emit_push_r32(dst, REG_ESI);                                          // push  esi
632649   emit_push_r32(dst, REG_EDI);                                          // push  edi
633650   emit_push_r32(dst, REG_EBP);                                          // push  ebp
651   emit_sub_r32_imm(dst, REG_ESP, 24);                                       // sub   esp,24
634652   emit_mov_m32_r32(dst, MABS(&drcbe->hashstacksave), REG_ESP);                  // mov   [hashstacksave],esp
635653   emit_sub_r32_imm(dst, REG_ESP, 4);                                       // sub   esp,4
636654   emit_mov_m32_r32(dst, MABS(&drcbe->stacksave), REG_ESP);                     // mov   [stacksave],esp
r2844r2845
643661   drcbe->exit = *dst;
644662   emit_fldcw_m16(dst, MABS(&drcbe->fpumode));                                 // fldcw [fpumode]
645663   emit_mov_r32_m32(dst, REG_ESP, MABS(&drcbe->hashstacksave));                  // mov   esp,[hashstacksave]
664   emit_add_r32_imm(dst, REG_ESP, 24);                                       // add   esp,24
646665   emit_pop_r32(dst, REG_EBP);                                             // pop   ebp
647666   emit_pop_r32(dst, REG_EDI);                                             // pop   edi
648667   emit_pop_r32(dst, REG_ESI);                                             // pop   esi
r2844r2845
714733      /* add a comment */
715734      if (drcbe->log != NULL)
716735      {
717         char dasm[100];
718         drcuml_disasm(inst, dasm);
736         char dasm[256];
737         drcuml_disasm(inst, dasm, drcbe->drcuml);
719738         x86log_add_comment(drcbe->log, dst, "%s", dasm);
720739      }
721740
r2844r2845
798817         dest->value = src->value;
799818         break;
800819
801      /* mapvars are converted to immediates with their current value */
802      case DRCUML_PTYPE_MAPVAR:
803         assert(allowed & PTYPE_I);
804         dest->type = DRCUML_PTYPE_IMMEDIATE;
805         dest->value = drcmap_get_last_value(drcbe->map, src->value);
806         break;
807
808820      /* memory passes through */
809821      case DRCUML_PTYPE_MEMORY:
810822         assert(allowed & PTYPE_M);
r2844r2845
10321044
10331045
10341046/*-------------------------------------------------
1047    emit_mov_r32_p32_keepflags - move a 32-bit
1048    parameter into a register without affecting
1049    any flags
1050-------------------------------------------------*/
1051
1052static void emit_mov_r32_p32_keepflags(drcbe_state *drcbe, x86code **dst, UINT8 reg, const drcuml_parameter *param)
1053{
1054   if (param->type == DRCUML_PTYPE_IMMEDIATE)
1055      emit_mov_r32_imm(dst, reg, param->value);                              // mov   reg,param
1056   else if (param->type == DRCUML_PTYPE_MEMORY)
1057      emit_mov_r32_m32(dst, reg, MABS(param->value));                           // mov   reg,[param]
1058   else if (param->type == DRCUML_PTYPE_INT_REGISTER)
1059   {
1060      if (reg != param->value)
1061         emit_mov_r32_r32(dst, reg, param->value);                           // mov   reg,param
1062   }
1063}
1064
1065
1066/*-------------------------------------------------
10351067    emit_mov_m32_p32 - move a 32-bit parameter
10361068    into a memory location
10371069-------------------------------------------------*/
r2844r2845
10691101
10701102
10711103/*-------------------------------------------------
1072    emit_push_p32 - push a 32-bit parameter onto
1073    the stack
1074-------------------------------------------------*/
1075
1076static void emit_push_p32(drcbe_state *drcbe, x86code **dst, const drcuml_parameter *src)
1077{
1078   if (src->type == DRCUML_PTYPE_IMMEDIATE)
1079      emit_push_imm(dst, src->value);                                       // push  src
1080   else if (src->type == DRCUML_PTYPE_MEMORY)
1081      emit_push_m32(dst, MABS(src->value));                                 // push  [src]
1082   else if (src->type == DRCUML_PTYPE_INT_REGISTER)
1083      emit_push_r32(dst, src->value);                                       // push  src
1084}
1085
1086
1087/*-------------------------------------------------
10881104    emit_add_r32_p32 - add operation to a 32-bit
10891105    register from a 32-bit parameter
10901106-------------------------------------------------*/
r2844r2845
10931109{
10941110   if (param->type == DRCUML_PTYPE_IMMEDIATE)
10951111   {
1096      if (inst->condflags != 0 || param->value != 0)
1112      if (inst->flags != 0 || param->value != 0)
10971113         emit_add_r32_imm(dst, reg, param->value);                           // add   reg,param
10981114   }
10991115   else if (param->type == DRCUML_PTYPE_MEMORY)
r2844r2845
11121128{
11131129   if (param->type == DRCUML_PTYPE_IMMEDIATE)
11141130   {
1115      if (inst->condflags != 0 || param->value != 0)
1131      if (inst->flags != 0 || param->value != 0)
11161132         emit_add_m32_imm(dst, MEMPARAMS, param->value);                        // add   [dest],param
11171133   }
11181134   else
r2844r2845
11321148static void emit_adc_r32_p32(drcbe_state *drcbe, x86code **dst, UINT8 reg, const drcuml_parameter *param, const drcuml_instruction *inst)
11331149{
11341150   if (param->type == DRCUML_PTYPE_IMMEDIATE)
1135   {
1136      if (inst->condflags != 0 || param->value != 0)
1137         emit_adc_r32_imm(dst, reg, param->value);                           // adc   reg,param
1138   }
1151      emit_adc_r32_imm(dst, reg, param->value);                              // adc   reg,param
11391152   else if (param->type == DRCUML_PTYPE_MEMORY)
11401153      emit_adc_r32_m32(dst, reg, MABS(param->value));                           // adc   reg,[param]
11411154   else if (param->type == DRCUML_PTYPE_INT_REGISTER)
r2844r2845
11511164static void emit_adc_m32_p32(drcbe_state *drcbe, x86code **dst, DECLARE_MEMPARAMS, const drcuml_parameter *param, const drcuml_instruction *inst)
11521165{
11531166   if (param->type == DRCUML_PTYPE_IMMEDIATE)
1154   {
1155      if (inst->condflags != 0 || param->value != 0)
1156         emit_adc_m32_imm(dst, MEMPARAMS, param->value);                        // adc   [dest],param
1157   }
1167      emit_adc_m32_imm(dst, MEMPARAMS, param->value);                           // adc   [dest],param
11581168   else
11591169   {
11601170      int reg = param_select_register(REG_EAX, param, NULL);
1161      emit_mov_r32_p32(drcbe, dst, reg, param);                              // mov   reg,param
1171      emit_mov_r32_p32_keepflags(drcbe, dst, reg, param);                        // mov   reg,param
11621172      emit_adc_m32_r32(dst, MEMPARAMS, reg);                                 // adc   [dest],reg
11631173   }
11641174}
r2844r2845
11731183{
11741184   if (param->type == DRCUML_PTYPE_IMMEDIATE)
11751185   {
1176      if (inst->condflags != 0 || param->value != 0)
1186      if (inst->flags != 0 || param->value != 0)
11771187         emit_sub_r32_imm(dst, reg, param->value);                           // sub   reg,param
11781188   }
11791189   else if (param->type == DRCUML_PTYPE_MEMORY)
r2844r2845
11921202{
11931203   if (param->type == DRCUML_PTYPE_IMMEDIATE)
11941204   {
1195      if (inst->condflags != 0 || param->value != 0)
1205      if (inst->flags != 0 || param->value != 0)
11961206         emit_sub_m32_imm(dst, MEMPARAMS, param->value);                        // sub   [dest],param
11971207   }
11981208   else
r2844r2845
12121222static void emit_sbb_r32_p32(drcbe_state *drcbe, x86code **dst, UINT8 reg, const drcuml_parameter *param, const drcuml_instruction *inst)
12131223{
12141224   if (param->type == DRCUML_PTYPE_IMMEDIATE)
1215   {
1216      if (inst->condflags != 0 || param->value != 0)
1217         emit_sbb_r32_imm(dst, reg, param->value);                           // sbb   reg,param
1218   }
1225      emit_sbb_r32_imm(dst, reg, param->value);                              // sbb   reg,param
12191226   else if (param->type == DRCUML_PTYPE_MEMORY)
12201227      emit_sbb_r32_m32(dst, reg, MABS(param->value));                           // sbb   reg,[param]
12211228   else if (param->type == DRCUML_PTYPE_INT_REGISTER)
r2844r2845
12311238static void emit_sbb_m32_p32(drcbe_state *drcbe, x86code **dst, DECLARE_MEMPARAMS, const drcuml_parameter *param, const drcuml_instruction *inst)
12321239{
12331240   if (param->type == DRCUML_PTYPE_IMMEDIATE)
1234   {
1235      if (inst->condflags != 0 || param->value != 0)
1236         emit_sbb_m32_imm(dst, MEMPARAMS, param->value);                        // sbb   [dest],param
1237   }
1241      emit_sbb_m32_imm(dst, MEMPARAMS, param->value);                           // sbb   [dest],param
12381242   else
12391243   {
12401244      int reg = param_select_register(REG_EAX, param, NULL);
1241      emit_mov_r32_p32(drcbe, dst, reg, param);                              // mov   reg,param
1245      emit_mov_r32_p32_keepflags(drcbe, dst, reg, param);                        // mov   reg,param
12421246      emit_sbb_m32_r32(dst, MEMPARAMS, reg);                                 // sbb   [dest],reg
12431247   }
12441248}
r2844r2845
13251329{
13261330   if (param->type == DRCUML_PTYPE_IMMEDIATE)
13271331   {
1328      if (inst->condflags == 0 && (UINT32)param->value == 0xffffffff)
1332      if (inst->flags == 0 && (UINT32)param->value == 0xffffffff)
13291333         /* skip */;
1330      else if (inst->condflags != 0 && (UINT32)param->value == 0)
1334      else if (inst->flags == 0 && (UINT32)param->value == 0)
13311335         emit_xor_r32_r32(dst, reg, reg);                                 // xor   reg,reg
13321336      else
13331337         emit_and_r32_imm(dst, reg, param->value);                           // and   reg,param
r2844r2845
13481352{
13491353   if (param->type == DRCUML_PTYPE_IMMEDIATE)
13501354   {
1351      if (inst->condflags == 0 && (UINT32)param->value == 0xffffffff)
1355      if (inst->flags == 0 && (UINT32)param->value == 0xffffffff)
13521356         /* skip */;
1353      else if (inst->condflags != 0 && (UINT32)param->value == 0)
1357      else if (inst->flags == 0 && (UINT32)param->value == 0)
13541358         emit_mov_m32_imm(dst, MEMPARAMS, 0);                              // mov   [dest],0
13551359      else
13561360         emit_and_m32_imm(dst, MEMPARAMS, param->value);                        // and   [dest],param
r2844r2845
14081412{
14091413   if (param->type == DRCUML_PTYPE_IMMEDIATE)
14101414   {
1411      if (inst->condflags == 0 && (UINT32)param->value == 0)
1415      if (inst->flags == 0 && (UINT32)param->value == 0)
14121416         /* skip */;
1413      else if (inst->condflags != 0 && (UINT32)param->value == 0xffffffff)
1417      else if (inst->flags == 0 && (UINT32)param->value == 0xffffffff)
14141418         emit_mov_r32_imm(dst, reg, -1);                                    // mov  reg,-1
14151419      else
14161420         emit_or_r32_imm(dst, reg, param->value);                           // or   reg,param
r2844r2845
14311435{
14321436   if (param->type == DRCUML_PTYPE_IMMEDIATE)
14331437   {
1434      if (inst->condflags == 0 && (UINT32)param->value == 0)
1438      if (inst->flags == 0 && (UINT32)param->value == 0)
14351439         /* skip */;
1436      else if (inst->condflags != 0 && (UINT32)param->value == 0xffffffff)
1440      else if (inst->flags == 0 && (UINT32)param->value == 0xffffffff)
14371441         emit_mov_m32_imm(dst, MEMPARAMS, -1);                              // mov   [dest],-1
14381442      else
14391443         emit_or_m32_imm(dst, MEMPARAMS, param->value);                        // or   [dest],param
r2844r2845
14561460{
14571461   if (param->type == DRCUML_PTYPE_IMMEDIATE)
14581462   {
1459      if (inst->condflags == 0 && (UINT32)param->value == 0)
1463      if (inst->flags == 0 && (UINT32)param->value == 0)
14601464         /* skip */;
1461      else if (inst->condflags != 0 && (UINT32)param->value == 0xffffffff)
1465      else if (inst->flags == 0 && (UINT32)param->value == 0xffffffff)
14621466         emit_not_r32(dst, reg);                                          // not   reg
14631467      else
14641468         emit_xor_r32_imm(dst, reg, param->value);                           // xor   reg,param
r2844r2845
14791483{
14801484   if (param->type == DRCUML_PTYPE_IMMEDIATE)
14811485   {
1482      if (inst->condflags == 0 && (UINT32)param->value == 0)
1486      if (inst->flags == 0 && (UINT32)param->value == 0)
14831487         /* skip */;
1484      else if (inst->condflags != 0 && (UINT32)param->value == 0xffffffff)
1488      else if (inst->flags == 0 && (UINT32)param->value == 0xffffffff)
14851489         emit_not_m32(dst, MEMPARAMS);                                    // not   [dest]
14861490      else
14871491         emit_xor_m32_imm(dst, MEMPARAMS, param->value);                        // xor   [dest],param
r2844r2845
15041508{
15051509   if (param->type == DRCUML_PTYPE_IMMEDIATE)
15061510   {
1507      if (inst->condflags == 0 && (UINT32)param->value == 0)
1511      if (inst->flags == 0 && (UINT32)param->value == 0)
15081512         /* skip */;
15091513      else
15101514         emit_shl_r32_imm(dst, reg, param->value);                           // shl   reg,param
r2844r2845
15261530{
15271531   if (param->type == DRCUML_PTYPE_IMMEDIATE)
15281532   {
1529      if (inst->condflags == 0 && (UINT32)param->value == 0)
1533      if (inst->flags == 0 && (UINT32)param->value == 0)
15301534         /* skip */;
15311535      else
15321536         emit_shl_m32_imm(dst, MEMPARAMS, param->value);                        // shl   [dest],param
r2844r2845
15481552{
15491553   if (param->type == DRCUML_PTYPE_IMMEDIATE)
15501554   {
1551      if (inst->condflags == 0 && (UINT32)param->value == 0)
1555      if (inst->flags == 0 && (UINT32)param->value == 0)
15521556         /* skip */;
15531557      else
15541558         emit_shr_r32_imm(dst, reg, param->value);                           // shr   reg,param
r2844r2845
15701574{
15711575   if (param->type == DRCUML_PTYPE_IMMEDIATE)
15721576   {
1573      if (inst->condflags == 0 && (UINT32)param->value == 0)
1577      if (inst->flags == 0 && (UINT32)param->value == 0)
15741578         /* skip */;
15751579      else
15761580         emit_shr_m32_imm(dst, MEMPARAMS, param->value);                        // shr   [dest],param
r2844r2845
15921596{
15931597   if (param->type == DRCUML_PTYPE_IMMEDIATE)
15941598   {
1595      if (inst->condflags == 0 && (UINT32)param->value == 0)
1599      if (inst->flags == 0 && (UINT32)param->value == 0)
15961600         /* skip */;
15971601      else
15981602         emit_sar_r32_imm(dst, reg, param->value);                           // sar   reg,param
r2844r2845
16141618{
16151619   if (param->type == DRCUML_PTYPE_IMMEDIATE)
16161620   {
1617      if (inst->condflags == 0 && (UINT32)param->value == 0)
1621      if (inst->flags == 0 && (UINT32)param->value == 0)
16181622         /* skip */;
16191623      else
16201624         emit_sar_m32_imm(dst, MEMPARAMS, param->value);                        // sar   [dest],param
r2844r2845
16361640{
16371641   if (param->type == DRCUML_PTYPE_IMMEDIATE)
16381642   {
1639      if (inst->condflags == 0 && (UINT32)param->value == 0)
1643      if (inst->flags == 0 && (UINT32)param->value == 0)
16401644         /* skip */;
16411645      else
16421646         emit_rol_r32_imm(dst, reg, param->value);                           // rol   reg,param
r2844r2845
16581662{
16591663   if (param->type == DRCUML_PTYPE_IMMEDIATE)
16601664   {
1661      if (inst->condflags == 0 && (UINT32)param->value == 0)
1665      if (inst->flags == 0 && (UINT32)param->value == 0)
16621666         /* skip */;
16631667      else
16641668         emit_rol_m32_imm(dst, MEMPARAMS, param->value);                        // rol   [dest],param
r2844r2845
16801684{
16811685   if (param->type == DRCUML_PTYPE_IMMEDIATE)
16821686   {
1683      if (inst->condflags == 0 && (UINT32)param->value == 0)
1687      if (inst->flags == 0 && (UINT32)param->value == 0)
16841688         /* skip */;
16851689      else
16861690         emit_ror_r32_imm(dst, reg, param->value);                           // ror   reg,param
r2844r2845
17021706{
17031707   if (param->type == DRCUML_PTYPE_IMMEDIATE)
17041708   {
1705      if (inst->condflags == 0 && (UINT32)param->value == 0)
1709      if (inst->flags == 0 && (UINT32)param->value == 0)
17061710         /* skip */;
17071711      else
17081712         emit_ror_m32_imm(dst, MEMPARAMS, param->value);                        // ror   [dest],param
r2844r2845
17241728{
17251729   if (param->type == DRCUML_PTYPE_IMMEDIATE)
17261730   {
1727      if (inst->condflags == 0 && (UINT32)param->value == 0)
1731      if (inst->flags == 0 && (UINT32)param->value == 0)
17281732         /* skip */;
17291733      else
17301734         emit_rcl_r32_imm(dst, reg, param->value);                           // rcl   reg,param
17311735   }
17321736   else
17331737   {
1734      emit_mov_r32_p32(drcbe, dst, REG_ECX, param);                           // mov   ecx,param
1738      emit_mov_r32_p32_keepflags(drcbe, dst, REG_ECX, param);                     // mov   ecx,param
17351739      emit_rcl_r32_cl(dst, reg);                                          // rcl   reg,cl
17361740   }
17371741}
r2844r2845
17461750{
17471751   if (param->type == DRCUML_PTYPE_IMMEDIATE)
17481752   {
1749      if (inst->condflags == 0 && (UINT32)param->value == 0)
1753      if (inst->flags == 0 && (UINT32)param->value == 0)
17501754         /* skip */;
17511755      else
17521756         emit_rcl_m32_imm(dst, MEMPARAMS, param->value);                        // rcl   [dest],param
17531757   }
17541758   else
17551759   {
1756      emit_mov_r32_p32(drcbe, dst, REG_ECX, param);                           // mov   ecx,param
1760      emit_mov_r32_p32_keepflags(drcbe, dst, REG_ECX, param);                     // mov   ecx,param
17571761      emit_rcl_m32_cl(dst, MEMPARAMS);                                    // rcl   [dest],cl
17581762   }
17591763}
r2844r2845
17681772{
17691773   if (param->type == DRCUML_PTYPE_IMMEDIATE)
17701774   {
1771      if (inst->condflags == 0 && (UINT32)param->value == 0)
1775      if (inst->flags == 0 && (UINT32)param->value == 0)
17721776         /* skip */;
17731777      else
17741778         emit_rcr_r32_imm(dst, reg, param->value);                           // rcr   reg,param
17751779   }
17761780   else
17771781   {
1778      emit_mov_r32_p32(drcbe, dst, REG_ECX, param);                           // mov   ecx,param
1782      emit_mov_r32_p32_keepflags(drcbe, dst, REG_ECX, param);                     // mov   ecx,param
17791783      emit_rcr_r32_cl(dst, reg);                                          // rcr   reg,cl
17801784   }
17811785}
r2844r2845
17901794{
17911795   if (param->type == DRCUML_PTYPE_IMMEDIATE)
17921796   {
1793      if (inst->condflags == 0 && (UINT32)param->value == 0)
1797      if (inst->flags == 0 && (UINT32)param->value == 0)
17941798         /* skip */;
17951799      else
17961800         emit_rcr_m32_imm(dst, MEMPARAMS, param->value);                        // rcr   [dest],param
17971801   }
17981802   else
17991803   {
1800      emit_mov_r32_p32(drcbe, dst, REG_ECX, param);                           // mov   ecx,param
1804      emit_mov_r32_p32_keepflags(drcbe, dst, REG_ECX, param);                     // mov   ecx,param
18011805      emit_rcr_m32_cl(dst, MEMPARAMS);                                    // rcr   [dest],cl
18021806   }
18031807}
r2844r2845
18411845
18421846
18431847/*-------------------------------------------------
1844    emit_mov_p64_r64 - move a pair of registers
1845    into a 64-bit parameter
1848    emit_mov_r64_p64_keepflags - move a 64-bit
1849    parameter into a pair of registers without
1850    affecting any flags
18461851-------------------------------------------------*/
18471852
1848static void emit_mov_p64_r64(drcbe_state *drcbe, x86code **dst, const drcuml_parameter *param, UINT8 reglo, UINT8 reghi)
1853static void emit_mov_r64_p64_keepflags(drcbe_state *drcbe, x86code **dst, UINT8 reglo, UINT8 reghi, const drcuml_parameter *param)
18491854{
1850   assert(param->type != DRCUML_PTYPE_IMMEDIATE);
1851   if (param->type == DRCUML_PTYPE_MEMORY)
1855   if (param->type == DRCUML_PTYPE_IMMEDIATE)
18521856   {
1853      emit_mov_m32_r32(dst, MABS(param->value), reglo);                        // mov   [param],reglo
1854      emit_mov_m32_r32(dst, MABS(param->value + 4), reghi);                     // mov   [param+4],reghi
1857      emit_mov_r32_imm(dst, reglo, param->value);                              // mov   reglo,param
1858      emit_mov_r32_imm(dst, reghi, param->value >> 32);                        // mov   reghi,param >> 32
18551859   }
1860   else if (param->type == DRCUML_PTYPE_MEMORY)
1861   {
1862      emit_mov_r32_m32(dst, reglo, MABS(param->value));                        // mov   reglo,[param]
1863      emit_mov_r32_m32(dst, reghi, MABS(param->value + 4));                     // mov   reghi,[param+4]
1864   }
18561865   else if (param->type == DRCUML_PTYPE_INT_REGISTER)
18571866   {
18581867      if (reglo != param->value)
1859         emit_mov_r32_r32(dst, param->value, reglo);                           // mov   param,reglo
1860      emit_mov_m32_r32(dst, MABS(drcbe->reghi[param->value]), reghi);               // mov   reghi[param],reghi
1868         emit_mov_r32_r32(dst, reglo, param->value);                           // mov   reglo,param
1869      emit_mov_r32_m32(dst, reghi, MABS(drcbe->reghi[param->value]));               // mov   reghi,reghi[param]
18611870   }
18621871}
18631872
18641873
18651874/*-------------------------------------------------
1866    emit_push_p64 - push a 64-bit parameter onto
1867    the stack
1875    emit_mov_m64_p64 - move a 64-bit parameter
1876    into a memory location
18681877-------------------------------------------------*/
18691878
1870static void emit_push_p64(drcbe_state *drcbe, x86code **dst, const drcuml_parameter *src)
1879static void emit_mov_m64_p64(drcbe_state *drcbe, x86code **dst, DECLARE_MEMPARAMS, const drcuml_parameter *param)
18711880{
1872   if (src->type == DRCUML_PTYPE_IMMEDIATE)
1881   if (param->type == DRCUML_PTYPE_IMMEDIATE)
18731882   {
1874      emit_push_imm(dst, src->value >> 32);                                 // push  src >> 32
1875      emit_push_imm(dst, src->value);                                       // push  src
1883      emit_mov_m32_imm(dst, MEMPARAMS + 0, param->value);                        // mov   [mem],param
1884      emit_mov_m32_imm(dst, MEMPARAMS + 4, param->value >> 32);                  // mov   [mem],param >> 32
18761885   }
1877   else if (src->type == DRCUML_PTYPE_MEMORY)
1886   else if (param->type == DRCUML_PTYPE_MEMORY)
18781887   {
1879      emit_push_m32(dst, MABS(src->value + 4));                              // push  [src+4]
1880      emit_push_m32(dst, MABS(src->value));                                 // push  [src]
1888      emit_mov_r32_m32(dst, REG_EAX, MABS(param->value));                        // mov   eax,[param]
1889      emit_mov_m32_r32(dst, MEMPARAMS + 0, REG_EAX);                           // mov   [mem],eax
1890      emit_mov_r32_m32(dst, REG_EAX, MABS(param->value + 4));                     // mov   eax,[param+4]
1891      emit_mov_m32_r32(dst, MEMPARAMS + 4, REG_EAX);                           // mov   [mem+4],eax
18811892   }
1882   else if (src->type == DRCUML_PTYPE_INT_REGISTER)
1893   else if (param->type == DRCUML_PTYPE_INT_REGISTER)
18831894   {
1884      emit_push_m32(dst, MABS(drcbe->reghi[src->value]));                        // push  reghi[src]
1885      emit_push_r32(dst, src->value);                                       // push  src
1895      emit_mov_m32_r32(dst, MEMPARAMS + 0, param->value);                        // mov   [mem],param
1896      emit_mov_r32_m32(dst, REG_EAX, MABS(drcbe->reghi[param->value]));            // mov   eax,[param.hi]
1897      emit_mov_m32_r32(dst, MEMPARAMS + 4, REG_EAX);                           // mov   [mem+4],eax
18861898   }
18871899}
18881900
18891901
18901902/*-------------------------------------------------
1903    emit_mov_p64_r64 - move a pair of registers
1904    into a 64-bit parameter
1905-------------------------------------------------*/
1906
1907static void emit_mov_p64_r64(drcbe_state *drcbe, x86code **dst, const drcuml_parameter *param, UINT8 reglo, UINT8 reghi)
1908{
1909   assert(param->type != DRCUML_PTYPE_IMMEDIATE);
1910   if (param->type == DRCUML_PTYPE_MEMORY)
1911   {
1912      emit_mov_m32_r32(dst, MABS(param->value), reglo);                        // mov   [param],reglo
1913      emit_mov_m32_r32(dst, MABS(param->value + 4), reghi);                     // mov   [param+4],reghi
1914   }
1915   else if (param->type == DRCUML_PTYPE_INT_REGISTER)
1916   {
1917      if (reglo != param->value)
1918         emit_mov_r32_r32(dst, param->value, reglo);                           // mov   param,reglo
1919      emit_mov_m32_r32(dst, MABS(drcbe->reghi[param->value]), reghi);               // mov   reghi[param],reghi
1920   }
1921}
1922
1923
1924/*-------------------------------------------------
18911925    emit_add_r64_p64 - add operation to a 64-bit
18921926    pair of registers from a 64-bit parameter
18931927-------------------------------------------------*/
18941928
18951929static void emit_add_r64_p64(drcbe_state *drcbe, x86code **dst, UINT8 reglo, UINT8 reghi, const drcuml_parameter *param, const drcuml_instruction *inst)
18961930{
1897   int saveflags = ((inst->condflags & DRCUML_FLAG_Z) != 0);
1931   int saveflags = ((inst->flags & DRCUML_FLAG_Z) != 0);
18981932   if (param->type == DRCUML_PTYPE_MEMORY)
18991933   {
19001934      emit_add_r32_m32(dst, reglo, MABS(param->value));                        // add   reglo,[param]
r2844r2845
19251959
19261960static void emit_add_m64_p64(drcbe_state *drcbe, x86code **dst, DECLARE_MEMPARAMS, const drcuml_parameter *param, const drcuml_instruction *inst)
19271961{
1928   int saveflags = ((inst->condflags & DRCUML_FLAG_Z) != 0);
1962   int saveflags = ((inst->flags & DRCUML_FLAG_Z) != 0);
19291963   if (param->type == DRCUML_PTYPE_IMMEDIATE)
19301964   {
19311965      emit_add_m32_imm(dst, MEMPARAMS, param->value);                           // add   [dest],param
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19521986
19531987static void emit_adc_r64_p64(drcbe_state *drcbe, x86code **dst, UINT8 reglo, UINT8 reghi, const drcuml_parameter *param, const drcuml_instruction *inst)
19541988{
1955   int saveflags = ((inst->condflags & DRCUML_FLAG_Z) != 0);
1989   int saveflags = ((inst->flags & DRCUML_FLAG_Z) != 0);
19561990   if (param->type == DRCUML_PTYPE_MEMORY)
19571991   {
19581992      emit_adc_r32_m32(dst, reglo, MABS(param->value));                        // adc   reglo,[param]
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19832017
19842018static void emit_adc_m64_p64(drcbe_state *drcbe, x86code **dst, DECLARE_MEMPARAMS, const drcuml_parameter *param, const drcuml_instruction *inst)
19852019{
1986   int saveflags = ((inst->condflags & DRCUML_FLAG_Z) != 0);
2020   int saveflags = ((inst->flags & DRCUML_FLAG_Z) != 0);
19872021   if (param->type == DRCUML_PTYPE_IMMEDIATE)
19882022   {
19892023      emit_adc_m32_imm(dst, MEMPARAMS, param->value);                           // adc   [dest],param
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19932027   else
19942028   {
19952029      int reglo = (param->type == DRCUML_PTYPE_INT_REGISTER) ? param->value : REG_EAX;
1996      emit_mov_r64_p64(drcbe, dst, reglo, REG_EDX, param);                     // mov   edx:reglo,param
2030      emit_mov_r64_p64_keepflags(drcbe, dst, reglo, REG_EDX, param);               // mov   edx:reglo,param
19972031      emit_adc_m32_r32(dst, MEMPARAMS, reglo);                              // adc   [dest],reglo
19982032      if (saveflags) emit_pushf(dst);                                       // pushf
19992033      emit_adc_m32_r32(dst, MEMPARAMS + 4, REG_EDX);                           // adc   [dest+4],edx
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20102044
20112045static void emit_sub_r64_p64(drcbe_state *drcbe, x86code **dst, UINT8 reglo, UINT8 reghi, const drcuml_parameter *param, const drcuml_instruction *inst)
20122046{
2013   int saveflags = ((inst->condflags & DRCUML_FLAG_Z) != 0);
2047   int saveflags = ((inst->flags & DRCUML_FLAG_Z) != 0);
20142048   if (param->type == DRCUML_PTYPE_MEMORY)
20152049   {
20162050      emit_sub_r32_m32(dst, reglo, MABS(param->value));                        // sub   reglo,[param]
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20412075
20422076static void emit_sub_m64_p64(drcbe_state *drcbe, x86code **dst, DECLARE_MEMPARAMS, const drcuml_parameter *param, const drcuml_instruction *inst)
20432077{
2044   int saveflags = ((inst->condflags & DRCUML_FLAG_Z) != 0);
2078   int saveflags = ((inst->flags & DRCUML_FLAG_Z) != 0);
20452079   if (param->type == DRCUML_PTYPE_IMMEDIATE)
20462080   {
20472081      emit_sub_m32_imm(dst, MEMPARAMS, param->value);                           // sub   [dest],param
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20682102
20692103static void emit_sbb_r64_p64(drcbe_state *drcbe, x86code **dst, UINT8 reglo, UINT8 reghi, const drcuml_parameter *param, const drcuml_instruction *inst)
20702104{
2071   int saveflags = ((inst->condflags & DRCUML_FLAG_Z) != 0);
2105   int saveflags = ((inst->flags & DRCUML_FLAG_Z) != 0);
20722106   if (param->type == DRCUML_PTYPE_MEMORY)
20732107   {
20742108      emit_sbb_r32_m32(dst, reglo, MABS(param->value));                        // sbb   reglo,[param]
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20992133
21002134static void emit_sbb_m64_p64(drcbe_state *drcbe, x86code **dst, DECLARE_MEMPARAMS, const drcuml_parameter *param, const drcuml_instruction *inst)
21012135{
2102   int saveflags = ((inst->condflags & DRCUML_FLAG_Z) != 0);
2136   int saveflags = ((inst->flags & DRCUML_FLAG_Z) != 0);
21032137   if (param->type == DRCUML_PTYPE_IMMEDIATE)
21042138   {
21052139      emit_sbb_m32_imm(dst, MEMPARAMS, param->value);                           // sbb   [dest],param
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21092143   else
21102144   {
21112145      int reglo = (param->type == DRCUML_PTYPE_INT_REGISTER) ? param->value : REG_EAX;
2112      emit_mov_r64_p64(drcbe, dst, reglo, REG_EDX, param);                     // mov   edx:reglo,param
2146      emit_mov_r64_p64_keepflags(drcbe, dst, reglo, REG_EDX, param);               // mov   edx:reglo,param
21132147      emit_sbb_m32_r32(dst, MEMPARAMS, reglo);                              // sbb   [dest],reglo
21142148      if (saveflags) emit_pushf(dst);                                       // pushf
21152149      emit_sbb_m32_r32(dst, MEMPARAMS + 4, REG_EDX);                           // sbb   [dest+4],edx
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21262160
21272161static void emit_and_r64_p64(drcbe_state *drcbe, x86code **dst, UINT8 reglo, UINT8 reghi, const drcuml_parameter *param, const drcuml_instruction *inst)
21282162{
2129   int saveflags = ((inst->condflags & DRCUML_FLAG_Z) != 0);
2163   int saveflags = ((inst->flags & DRCUML_FLAG_Z) != 0);
21302164   if (param->type == DRCUML_PTYPE_MEMORY)
21312165   {
21322166      emit_and_r32_m32(dst, reglo, MABS(param->value));                        // and   reglo,[param]
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21352169   }
21362170   else if (param->type == DRCUML_PTYPE_IMMEDIATE)
21372171   {
2138      if (inst->condflags == 0 && (UINT32)param->value == 0xffffffff)
2172      if (inst->flags == 0 && (UINT32)param->value == 0xffffffff)
21392173         /* skip */;
2140      else if (inst->condflags == 0 && (UINT32)param->value == 0)
2174      else if (inst->flags == 0 && (UINT32)param->value == 0)
21412175         emit_xor_r32_r32(dst, reglo, reglo);                              // xor   reglo,reglo
21422176      else
21432177         emit_and_r32_imm(dst, reglo, param->value);                           // and   reglo,param
21442178      if (saveflags) emit_pushf(dst);                                       // pushf
2145      if (inst->condflags == 0 && (UINT32)(param->value >> 32) == 0xffffffff)
2179      if (inst->flags == 0 && (UINT32)(param->value >> 32) == 0xffffffff)
21462180         /* skip */;
2147      else if (inst->condflags == 0 && (UINT32)(param->value >> 32) == 0)
2181      else if (inst->flags == 0 && (UINT32)(param->value >> 32) == 0)
21482182         emit_xor_r32_r32(dst, reghi, reghi);                              // xor   reghi,reghi
21492183      else
21502184         emit_and_r32_imm(dst, reghi, param->value >> 32);                     // and   reghi,param >> 32
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21672201
21682202static void emit_and_m64_p64(drcbe_state *drcbe, x86code **dst, DECLARE_MEMPARAMS, const drcuml_parameter *param, const drcuml_instruction *inst)
21692203{
2170   int saveflags = ((inst->condflags & DRCUML_FLAG_Z) != 0);
2204   int saveflags = ((inst->flags & DRCUML_FLAG_Z) != 0);
21712205   if (param->type == DRCUML_PTYPE_IMMEDIATE)
21722206   {
2173      if (inst->condflags == 0 && (UINT32)param->value == 0xffffffff)
2207      if (inst->flags == 0 && (UINT32)param->value == 0xffffffff)
21742208         /* skip */;
2175      else if (inst->condflags == 0 && (UINT32)param->value == 0)
2209      else if (inst->flags == 0 && (UINT32)param->value == 0)
21762210         emit_mov_m32_imm(dst, MEMPARAMS, 0);                              // mov   [dest],0
21772211      else
21782212         emit_and_m32_imm(dst, MEMPARAMS, param->value);                        // and   [dest],param
21792213      if (saveflags) emit_pushf(dst);                                       // pushf
2180      if (inst->condflags == 0 && (UINT32)(param->value >> 32) == 0xffffffff)
2214      if (inst->flags == 0 && (UINT32)(param->value >> 32) == 0xffffffff)
21812215         /* skip */;
2182      else if (inst->condflags == 0 && (UINT32)(param->value >> 32) == 0)
2216      else if (inst->flags == 0 && (UINT32)(param->value >> 32) == 0)
21832217         emit_mov_m32_imm(dst, MEMPARAMS + 4, 0);                           // mov   [dest+4],0
21842218      else
21852219         emit_and_m32_imm(dst, MEMPARAMS + 4, param->value >> 32);               // and   [dest+4],param >> 32
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22042238
22052239static void emit_test_r64_p64(drcbe_state *drcbe, x86code **dst, UINT8 reglo, UINT8 reghi, const drcuml_parameter *param, const drcuml_instruction *inst)
22062240{
2207   int saveflags = ((inst->condflags & DRCUML_FLAG_Z) != 0);
2241   int saveflags = ((inst->flags & DRCUML_FLAG_Z) != 0);
22082242   if (param->type == DRCUML_PTYPE_MEMORY)
22092243   {
22102244      emit_test_m32_r32(dst, MABS(param->value), reglo);                        // test  [param],reglo
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22352269
22362270static void emit_test_m64_p64(drcbe_state *drcbe, x86code **dst, DECLARE_MEMPARAMS, const drcuml_parameter *param, const drcuml_instruction *inst)
22372271{
2238   int saveflags = ((inst->condflags & DRCUML_FLAG_Z) != 0);
2272   int saveflags = ((inst->flags & DRCUML_FLAG_Z) != 0);
22392273   if (param->type == DRCUML_PTYPE_IMMEDIATE)
22402274   {
22412275      emit_test_m32_imm(dst, MEMPARAMS, param->value);                        // test   [dest],param
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22622296
22632297static void emit_or_r64_p64(drcbe_state *drcbe, x86code **dst, UINT8 reglo, UINT8 reghi, const drcuml_parameter *param, const drcuml_instruction *inst)
22642298{
2265   int saveflags = ((inst->condflags & DRCUML_FLAG_Z) != 0);
2299   int saveflags = ((inst->flags & DRCUML_FLAG_Z) != 0);
22662300   if (param->type == DRCUML_PTYPE_MEMORY)
22672301   {
22682302      emit_or_r32_m32(dst, reglo, MABS(param->value));                        // or    reglo,[param]
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22712305   }
22722306   else if (param->type == DRCUML_PTYPE_IMMEDIATE)
22732307   {
2274      if (inst->condflags == 0 && (UINT32)param->value == 0)
2308      if (inst->flags == 0 && (UINT32)param->value == 0)
22752309         /* skip */;
2276      else if (inst->condflags == 0 && (UINT32)param->value == 0xffffffff)
2310      else if (inst->flags == 0 && (UINT32)param->value == 0xffffffff)
22772311         emit_mov_r32_imm(dst, reglo, -1);                                 // mov   reglo,-1
22782312      else
22792313         emit_or_r32_imm(dst, reglo, param->value);                           // or    reglo,param
22802314      if (saveflags) emit_pushf(dst);                                       // pushf
2281      if (inst->condflags == 0 && (UINT32)(param->value >> 32) == 0)
2315      if (inst->flags == 0 && (UINT32)(param->value >> 32) == 0)
22822316         /* skip */;
2283      else if (inst->condflags == 0 && (UINT32)(param->value >> 32) == 0xffffffff)
2317      else if (inst->flags == 0 && (UINT32)(param->value >> 32) == 0xffffffff)
22842318         emit_mov_r32_imm(dst, reghi, -1);                                 // mov   reghi,-1
22852319      else
22862320         emit_or_r32_imm(dst, reghi, param->value >> 32);                     // or    reghi,param >> 32
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23032337
23042338static void emit_or_m64_p64(drcbe_state *drcbe, x86code **dst, DECLARE_MEMPARAMS, const drcuml_parameter *param, const drcuml_instruction *inst)
23052339{
2306   int saveflags = ((inst->condflags & DRCUML_FLAG_Z) != 0);
2340   int saveflags = ((inst->flags & DRCUML_FLAG_Z) != 0);
23072341   if (param->type == DRCUML_PTYPE_IMMEDIATE)
23082342   {
2309      if (inst->condflags == 0 && (UINT32)param->value == 0)
2343      if (inst->flags == 0 && (UINT32)param->value == 0)
23102344         /* skip */;
2311      else if (inst->condflags == 0 && (UINT32)param->value == 0xffffffff)
2345      else if (inst->flags == 0 && (UINT32)param->value == 0xffffffff)
23122346         emit_mov_m32_imm(dst, MEMPARAMS, -1);                              // mov   [dest],-1
23132347      else
23142348         emit_or_m32_imm(dst, MEMPARAMS, param->value);                        // or    [dest],param
23152349      if (saveflags) emit_pushf(dst);                                       // pushf
2316      if (inst->condflags == 0 && (UINT32)(param->value >> 32) == 0)
2350      if (inst->flags == 0 && (UINT32)(param->value >> 32) == 0)
23172351         /* skip */;
2318      else if (inst->condflags == 0 && (UINT32)(param->value >> 32) == 0xffffffff)
2352      else if (inst->flags == 0 && (UINT32)(param->value >> 32) == 0xffffffff)
23192353         emit_mov_m32_imm(dst, MEMPARAMS + 4, -1);                           // mov   [dest+4],-1
23202354      else
23212355         emit_or_m32_imm(dst, MEMPARAMS + 4, param->value >> 32);               // or    [dest+4],param >> 32
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23402374
23412375static void emit_xor_r64_p64(drcbe_state *drcbe, x86code **dst, UINT8 reglo, UINT8 reghi, const drcuml_parameter *param, const drcuml_instruction *inst)
23422376{
2343   int saveflags = ((inst->condflags & DRCUML_FLAG_Z) != 0);
2377   int saveflags = ((inst->flags & DRCUML_FLAG_Z) != 0);
23442378   if (param->type == DRCUML_PTYPE_MEMORY)
23452379   {
23462380      emit_xor_r32_m32(dst, reglo, MABS(param->value));                        // xor   reglo,[param]
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23492383   }
23502384   else if (param->type == DRCUML_PTYPE_IMMEDIATE)
23512385   {
2352      if (inst->condflags == 0 && (UINT32)param->value == 0)
2386      if (inst->flags == 0 && (UINT32)param->value == 0)
23532387         /* skip */;
2354      else if (inst->condflags == 0 && (UINT32)param->value == 0xffffffff)
2388      else if (inst->flags == 0 && (UINT32)param->value == 0xffffffff)
23552389         emit_not_r32(dst, reglo);                                       // not   reglo
23562390      else
23572391         emit_xor_r32_imm(dst, reglo, param->value);                           // xor   reglo,param
23582392      if (saveflags) emit_pushf(dst);                                       // pushf
2359      if (inst->condflags == 0 && (UINT32)(param->value >> 32) == 0)
2393      if (inst->flags == 0 && (UINT32)(param->value >> 32) == 0)
23602394         /* skip */;
2361      else if (inst->condflags == 0 && (UINT32)(param->value >> 32) == 0xffffffff)
2395      else if (inst->flags == 0 && (UINT32)(param->value >> 32) == 0xffffffff)
23622396         emit_not_r32(dst, reghi);                                       // not   reghi
23632397      else
23642398         emit_xor_r32_imm(dst, reghi, param->value >> 32);                     // xor   reghi,param >> 32
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23812415
23822416static void emit_xor_m64_p64(drcbe_state *drcbe, x86code **dst, DECLARE_MEMPARAMS, const drcuml_parameter *param, const drcuml_instruction *inst)
23832417{
2384   int saveflags = ((inst->condflags & DRCUML_FLAG_Z) != 0);
2418   int saveflags = ((inst->flags & DRCUML_FLAG_Z) != 0);
23852419   if (param->type == DRCUML_PTYPE_IMMEDIATE)
23862420   {
2387      if (inst->condflags == 0 && (UINT32)param->value == 0)
2421      if (inst->flags == 0 && (UINT32)param->value == 0)
23882422         /* skip */;
2389      else if (inst->condflags == 0 && (UINT32)param->value == 0xffffffff)
2423      else if (inst->flags == 0 && (UINT32)param->value == 0xffffffff)
23902424         emit_not_m32(dst, MEMPARAMS);                                    // not   [dest]
23912425      else
23922426         emit_xor_m32_imm(dst, MEMPARAMS, param->value);                        // xor   [dest],param
23932427      if (saveflags) emit_pushf(dst);                                       // pushf
2394      if (inst->condflags == 0 && (UINT32)(param->value >> 32) == 0)
2428      if (inst->flags == 0 && (UINT32)(param->value >> 32) == 0)
23952429         /* skip */;
2396      else if (inst->condflags == 0 && (UINT32)(param->value >> 32) == 0xffffffff)
2430      else if (inst->flags == 0 && (UINT32)(param->value >> 32) == 0xffffffff)
23972431         emit_not_m32(dst, MEMPARAMS + 4);                                 // not   [dest+4]
23982432      else
23992433         emit_xor_m32_imm(dst, MEMPARAMS + 4, param->value >> 32);               // xor   [dest+4],param >> 32
r2844r2845
24182452
24192453static void emit_shl_r64_p64(drcbe_state *drcbe, x86code **dst, UINT8 reglo, UINT8 reghi, const drcuml_parameter *param, const drcuml_instruction *inst)
24202454{
2421   int saveflags = (inst->condflags != 0);
2455   int saveflags = (inst->flags != 0);
24222456   if (param->type == DRCUML_PTYPE_IMMEDIATE)
24232457   {
24242458      int count = param->value & 63;
2425      if (inst->condflags == 0 && count == 0)
2459      if (inst->flags == 0 && count == 0)
24262460         /* skip */;
24272461      else
24282462      {
24292463         while (count >= 32)
24302464         {
2431            if (inst->condflags != 0)
2465            if (inst->flags != 0)
24322466            {
24332467               emit_shld_r32_r32_imm(dst, reghi, reglo, 31);                  // shld  reghi,reglo,31
24342468               emit_shl_r32_imm(dst, reglo, 31);                           // shl   reglo,31
r2844r2845
24412475               count -= 32;
24422476            }
24432477         }
2444         if (inst->condflags != 0 || count > 0)
2478         if (inst->flags != 0 || count > 0)
24452479         {
24462480            emit_shld_r32_r32_imm(dst, reghi, reglo, count);                  // shld  reghi,reglo,count
24472481            if (saveflags) emit_pushf(dst);                                 // pushf
r2844r2845
24552489      emit_mov_r32_p32(drcbe, dst, REG_ECX, param);                           // mov   ecx,param
24562490      emit_test_r32_imm(dst, REG_ECX, 0x20);                                 // test  ecx,0x20
24572491      emit_jcc_short_link(dst, COND_Z, &skip1);                              // jz    skip1
2458      if (inst->condflags != 0)
2492      if (inst->flags != 0)
24592493      {
24602494         emit_sub_r32_imm(dst, REG_ECX, 31);                                 // sub   ecx,31
24612495         emit_shld_r32_r32_imm(dst, reghi, reglo, 31);                        // shld  reghi,reglo,31
r2844r2845
24892523
24902524static void emit_shr_r64_p64(drcbe_state *drcbe, x86code **dst, UINT8 reglo, UINT8 reghi, const drcuml_parameter *param, const drcuml_instruction *inst)
24912525{
2492   int saveflags = ((inst->condflags & DRCUML_FLAG_Z) != 0);
2526   int saveflags = ((inst->flags & DRCUML_FLAG_Z) != 0);
24932527   if (param->type == DRCUML_PTYPE_IMMEDIATE)
24942528   {
24952529      int count = param->value & 63;
2496      if (inst->condflags == 0 && count == 0)
2530      if (inst->flags == 0 && count == 0)
24972531         /* skip */;
24982532      else
24992533      {
25002534         while (count >= 32)
25012535         {
2502            if (inst->condflags != 0)
2536            if (inst->flags != 0)
25032537            {
25042538               emit_shrd_r32_r32_imm(dst, reglo, reghi, 31);                  // shrd  reglo,reghi,31
25052539               emit_shr_r32_imm(dst, reghi, 31);                           // shr   reghi,31
r2844r2845
25122546               count -= 32;
25132547            }
25142548         }
2515         if (inst->condflags != 0 || count > 0)
2549         if (inst->flags != 0 || count > 0)
25162550         {
25172551            emit_shrd_r32_r32_imm(dst, reglo, reghi, count);                  // shrd  reglo,reghi,count
25182552            if (saveflags) emit_pushf(dst);                                 // pushf
r2844r2845
25262560      emit_mov_r32_p32(drcbe, dst, REG_ECX, param);                           // mov   ecx,param
25272561      emit_test_r32_imm(dst, REG_ECX, 0x20);                                 // test  ecx,0x20
25282562      emit_jcc_short_link(dst, COND_Z, &skip1);                              // jz    skip1
2529      if (inst->condflags != 0)
2563      if (inst->flags != 0)
25302564      {
25312565         emit_sub_r32_imm(dst, REG_ECX, 31);                                 // sub   ecx,31
25322566         emit_shrd_r32_r32_imm(dst, reglo, reghi, 31);                        // shrd  reglo,reghi,31
r2844r2845
25602594
25612595static void emit_sar_r64_p64(drcbe_state *drcbe, x86code **dst, UINT8 reglo, UINT8 reghi, const drcuml_parameter *param, const drcuml_instruction *inst)
25622596{
2563   int saveflags = ((inst->condflags & DRCUML_FLAG_Z) != 0);
2597   int saveflags = ((inst->flags & DRCUML_FLAG_Z) != 0);
25642598   if (param->type == DRCUML_PTYPE_IMMEDIATE)
25652599   {
25662600      int count = param->value & 63;
2567      if (inst->condflags == 0 && count == 0)
2601      if (inst->flags == 0 && count == 0)
25682602         /* skip */;
25692603      else
25702604      {
25712605         while (count >= 32)
25722606         {
2573            if (inst->condflags != 0)
2607            if (inst->flags != 0)
25742608            {
25752609               emit_shrd_r32_r32_imm(dst, reglo, reghi, 31);                  // shrd  reglo,reghi,31
25762610               emit_sar_r32_imm(dst, reghi, 31);                           // sar   reghi,31
r2844r2845
25832617               count -= 32;
25842618            }
25852619         }
2586         if (inst->condflags != 0 || count > 0)
2620         if (inst->flags != 0 || count > 0)
25872621         {
25882622            emit_shrd_r32_r32_imm(dst, reglo, reghi, count);                  // shrd  reglo,reghi,count
25892623            if (saveflags) emit_pushf(dst);                                 // pushf
r2844r2845
25972631      emit_mov_r32_p32(drcbe, dst, REG_ECX, param);                           // mov   ecx,param
25982632      emit_test_r32_imm(dst, REG_ECX, 0x20);                                 // test  ecx,0x20
25992633      emit_jcc_short_link(dst, COND_Z, &skip1);                              // jz    skip1
2600      if (inst->condflags != 0)
2634      if (inst->flags != 0)
26012635      {
26022636         emit_sub_r32_imm(dst, REG_ECX, 31);                                 // sub   ecx,31
26032637         emit_shrd_r32_r32_imm(dst, reglo, reghi, 31);                        // shrd  reglo,reghi,31
r2844r2845
26312665
26322666static void emit_rol_r64_p64(drcbe_state *drcbe, x86code **dst, UINT8 reglo, UINT8 reghi, const drcuml_parameter *param, const drcuml_instruction *inst)
26332667{
2634   int saveflags = ((inst->condflags & DRCUML_FLAG_Z) != 0);
2668   int saveflags = ((inst->flags & DRCUML_FLAG_Z) != 0);
26352669   if (param->type == DRCUML_PTYPE_IMMEDIATE)
26362670   {
26372671      int count = param->value & 63;
2638      if (inst->condflags == 0 && count == 0)
2672      if (inst->flags == 0 && count == 0)
26392673         /* skip */;
26402674      else
26412675      {
26422676         while (count >= 32)
26432677         {
2644            if (inst->condflags != 0)
2678            if (inst->flags != 0)
26452679            {
26462680               emit_mov_r32_r32(dst, REG_ECX, reglo);                        // mov   ecx,reglo
26472681               emit_shld_r32_r32_imm(dst, reglo, reghi, 31);                  // shld  reglo,reghi,31
r2844r2845
26542688               count -= 32;
26552689            }
26562690         }
2657         if (inst->condflags != 0 || count > 0)
2691         if (inst->flags != 0 || count > 0)
26582692         {
26592693            emit_mov_r32_r32(dst, REG_ECX, reglo);                           // mov   ecx,reglo
26602694            emit_shld_r32_r32_imm(dst, reglo, reghi, count);                  // shld  reglo,reghi,count
r2844r2845
26702704      emit_mov_r32_p32(drcbe, dst, REG_ECX, param);                           // mov   ecx,param
26712705      emit_test_r32_imm(dst, REG_ECX, 0x20);                                 // test  ecx,0x20
26722706      emit_jcc_short_link(dst, COND_Z, &skip1);                              // jz    skip1
2673      if (inst->condflags != 0)
2707      if (inst->flags != 0)
26742708      {
26752709         emit_sub_r32_imm(dst, REG_ECX, 31);                                 // sub   ecx,31
26762710         emit_mov_r32_r32(dst, REG_EBX, reglo);                              // mov   ebx,reglo
r2844r2845
27052739
27062740static void emit_ror_r64_p64(drcbe_state *drcbe, x86code **dst, UINT8 reglo, UINT8 reghi, const drcuml_parameter *param, const drcuml_instruction *inst)
27072741{
2708   int saveflags = ((inst->condflags & DRCUML_FLAG_Z) != 0);
2742   int saveflags = ((inst->flags & DRCUML_FLAG_Z) != 0);
27092743   if (param->type == DRCUML_PTYPE_IMMEDIATE)
27102744   {
27112745      int count = param->value & 63;
2712      if (inst->condflags == 0 && count == 0)
2746      if (inst->flags == 0 && count == 0)
27132747         /* skip */;
27142748      else
27152749      {
27162750         while (count >= 32)
27172751         {
2718            if (inst->condflags != 0)
2752            if (inst->flags != 0)
27192753            {
27202754               emit_mov_r32_r32(dst, REG_ECX, reglo);                        // mov   ecx,reglo
27212755               emit_shrd_r32_r32_imm(dst, reglo, reghi, 31);                  // shrd  reglo,reghi,31
r2844r2845
27282762               count -= 32;
27292763            }
27302764         }
2731         if (inst->condflags != 0 || count > 0)
2765         if (inst->flags != 0 || count > 0)
27322766         {
27332767            emit_mov_r32_r32(dst, REG_ECX, reglo);                           // mov   ecx,reglo
27342768            emit_shrd_r32_r32_imm(dst, reglo, reghi, count);                  // shrd  reglo,reghi,count
r2844r2845
27442778      emit_mov_r32_p32(drcbe, dst, REG_ECX, param);                           // mov   ecx,param
27452779      emit_test_r32_imm(dst, REG_ECX, 0x20);                                 // test  ecx,0x20
27462780      emit_jcc_short_link(dst, COND_Z, &skip1);                              // jz    skip1
2747      if (inst->condflags != 0)
2781      if (inst->flags != 0)
27482782      {
27492783         emit_sub_r32_imm(dst, REG_ECX, 31);                                 // sub   ecx,31
27502784         emit_mov_r32_r32(dst, REG_EBX, reglo);                              // mov   ebx,reglo
r2844r2845
27792813
27802814static void emit_rcl_r64_p64(drcbe_state *drcbe, x86code **dst, UINT8 reglo, UINT8 reghi, const drcuml_parameter *param, const drcuml_instruction *inst)
27812815{
2782   int saveflags = ((inst->condflags & DRCUML_FLAG_Z) != 0);
2816   int saveflags = ((inst->flags & DRCUML_FLAG_Z) != 0);
27832817   emit_link skipall, skiploop;
27842818   x86code *loop;
27852819
2786   emit_mov_r32_p32(drcbe, dst, REG_ECX, param);                              // mov   ecx,param
2820   emit_mov_r32_p32_keepflags(drcbe, dst, REG_ECX, param);                        // mov   ecx,param
27872821   if (!saveflags)
27882822   {
27892823      loop = *dst;                                                // loop:
r2844r2845
28212855
28222856static void emit_rcr_r64_p64(drcbe_state *drcbe, x86code **dst, UINT8 reglo, UINT8 reghi, const drcuml_parameter *param, const drcuml_instruction *inst)
28232857{
2824   int saveflags = (inst->condflags != 0);
2858   int saveflags = (inst->flags != 0);
28252859   emit_link skipall, skiploop;
28262860   x86code *loop;
28272861
2828   emit_mov_r32_p32(drcbe, dst, REG_ECX, param);                              // mov   ecx,param
2862   emit_mov_r32_p32_keepflags(drcbe, dst, REG_ECX, param);                        // mov   ecx,param
28292863   if (!saveflags)
28302864   {
28312865      loop = *dst;                                                // loop:
r2844r2845
28952929
28962930
28972931/***************************************************************************
2898    HELPERS TO CONVERT OTHER OPERATIONS TO MOVES
2899***************************************************************************/
2900
2901/*-------------------------------------------------
2902    convert_to_mov_imm - convert an instruction
2903    into a mov immediate
2904-------------------------------------------------*/
2905
2906static x86code *convert_to_mov_imm(drcbe_state *drcbe, x86code *dst, const drcuml_instruction *inst, const drcuml_parameter *dstp, UINT64 imm)
2907{
2908   drcuml_instruction temp = *inst;
2909   temp.numparams = 2;
2910   temp.param[0] = *dstp;
2911   temp.param[1].type = DRCUML_PTYPE_IMMEDIATE;
2912   temp.param[1].value = imm;
2913   return op_mov(drcbe, dst, &temp);
2914}
2915
2916
2917/*-------------------------------------------------
2918    convert_to_mov_src1 - convert an instruction
2919    into a mov src1
2920-------------------------------------------------*/
2921
2922static x86code *convert_to_mov_src1(drcbe_state *drcbe, x86code *dst, const drcuml_instruction *inst, const drcuml_parameter *dstp, const drcuml_parameter *srcp)
2923{
2924   drcuml_instruction temp = *inst;
2925   temp.numparams = 2;
2926   temp.param[0] = *dstp;
2927   temp.param[1] = *srcp;
2928   return op_mov(drcbe, dst, &temp);
2929}
2930
2931
2932
2933/***************************************************************************
29342932    OUT-OF-BAND CODE FIXUP CALLBACKS
29352933***************************************************************************/
29362934
r2844r2845
30303028
30313029static x86code *op_handle(drcbe_state *drcbe, x86code *dst, const drcuml_instruction *inst)
30323030{
3031   emit_link skip;
3032
3033   assert_no_condition(inst);
3034   assert_no_flags(inst);
30333035   assert(inst->numparams == 1);
30343036   assert(inst->param[0].type == DRCUML_PTYPE_MEMORY);
30353037
3038   /* emit a jump around the stack adjust in case code falls through here */
3039   emit_jmp_short_link(&dst, &skip);                                       // jmp   skip
3040
30363041   /* register the current pointer for the handle */
30373042   drcuml_handle_set_codeptr((drcuml_codehandle *)(FPTR)inst->param[0].value, dst);
3043
3044   /* by default, the handle points to prolog code that moves the stack pointer */
3045   emit_lea_r32_m32(&dst, REG_ESP, MBD(REG_ESP, -28));                           // lea   rsp,[rsp-28]
3046   resolve_link(&dst, &skip);                                          // skip:
30383047   return dst;
30393048}
30403049
r2844r2845
30453054
30463055static x86code *op_hash(drcbe_state *drcbe, x86code *dst, const drcuml_instruction *inst)
30473056{
3057   assert_no_condition(inst);
3058   assert_no_flags(inst);
30483059   assert(inst->numparams == 2);
30493060   assert(inst->param[0].type == DRCUML_PTYPE_IMMEDIATE);
30503061   assert(inst->param[1].type == DRCUML_PTYPE_IMMEDIATE);
r2844r2845
30613072
30623073static x86code *op_label(drcbe_state *drcbe, x86code *dst, const drcuml_instruction *inst)
30633074{
3075   assert_no_condition(inst);
3076   assert_no_flags(inst);
30643077   assert(inst->numparams == 1);
30653078   assert(inst->param[0].type == DRCUML_PTYPE_IMMEDIATE);
30663079
r2844r2845
30763089
30773090static x86code *op_comment(drcbe_state *drcbe, x86code *dst, const drcuml_instruction *inst)
30783091{
3092   assert_no_condition(inst);
3093   assert_no_flags(inst);
30793094   assert(inst->numparams == 1);
30803095   assert(inst->param[0].type == DRCUML_PTYPE_MEMORY);
30813096
r2844r2845
30903105
30913106static x86code *op_mapvar(drcbe_state *drcbe, x86code *dst, const drcuml_instruction *inst)
30923107{
3108   assert_no_condition(inst);
3109   assert_no_flags(inst);
30933110   assert(inst->numparams == 2);
30943111   assert(inst->param[0].type == DRCUML_PTYPE_MAPVAR);
30953112   assert(inst->param[1].type == DRCUML_PTYPE_IMMEDIATE);
r2844r2845
31063123***************************************************************************/
31073124
31083125/*-------------------------------------------------
3126    op_nop - process a NOP opcode
3127-------------------------------------------------*/
3128
3129static x86code *op_nop(drcbe_state *drcbe, x86code *dst, const drcuml_instruction *inst)
3130{
3131   /* nothing */
3132   return dst;
3133}
3134
3135
3136/*-------------------------------------------------
31093137    op_debug - process a DEBUG opcode
31103138-------------------------------------------------*/
31113139
31123140static x86code *op_debug(drcbe_state *drcbe, x86code *dst, const drcuml_instruction *inst)
31133141{
3142   /* validate instruction */
3143   assert(inst->size == 4);
3144   assert_no_condition(inst);
3145   assert_no_flags(inst);
3146
31143147#ifdef ENABLE_DEBUGGER
31153148   if (Machine->debug_mode)
31163149   {
31173150      drcuml_parameter pcp;
31183151
3119      /* validate instruction */
3120      assert(inst->size == 4);
3121      assert(inst->condflags == DRCUML_COND_ALWAYS);
3122
31233152      /* normalize parameters */
31243153      param_normalize_1(drcbe, inst, &pcp, PTYPE_MRI);
31253154
31263155      /* push the parameter */
3127      emit_push_p32(drcbe, &dst, &pcp);                                    // push  pcp
3156      emit_mov_m32_p32(drcbe, &dst, MBD(REG_ESP, 0), &pcp);                     // mov  [esp],pcp
31283157      emit_call(&dst, (x86code *)mame_debug_hook);                           // call  mame_debug_hook
3129      emit_add_r32_imm(&dst, REG_ESP, 4);                                    // add   esp,4
31303158   }
31313159#endif
31323160
r2844r2845
31443172
31453173   /* validate instruction */
31463174   assert(inst->size == 4);
3147   assert(inst->condflags == DRCUML_COND_ALWAYS || (inst->condflags >= DRCUML_COND_Z && inst->condflags < DRCUML_COND_MAX));
3175   assert_any_condition(inst);
3176   assert_no_flags(inst);
31483177
31493178   /* normalize parameters */
31503179   param_normalize_1(drcbe, inst, &retp, PTYPE_MRI);
31513180
31523181   /* load the parameter into EAX */
31533182   emit_mov_r32_p32(drcbe, &dst, REG_EAX, &retp);                              // mov   eax,retp
3154   if (inst->condflags == DRCUML_COND_ALWAYS)
3183   if (inst->condition == DRCUML_COND_ALWAYS)
31553184      emit_jmp(&dst, drcbe->exit);                                       // jmp   exit
31563185   else
3157      emit_jcc(&dst, X86_CONDITION(inst->condflags), drcbe->exit);               // jcc   exit
3186      emit_jcc(&dst, X86_CONDITION(inst->condition), drcbe->exit);               // jcc   exit
31583187
31593188   return dst;
31603189}
r2844r2845
31703199
31713200   /* validate instruction */
31723201   assert(inst->size == 4);
3173   assert(inst->condflags == DRCUML_COND_ALWAYS);
3202   assert_no_condition(inst);
3203   assert_no_flags(inst);
31743204
31753205   /* normalize parameters */
31763206   param_normalize_3(drcbe, inst, &modep, PTYPE_MRI, &pcp, PTYPE_MRI, &exp, PTYPE_M);
31773207
31783208#if LOG_HASHJMPS
3179   emit_push_p32(drcbe, &dst, &pcp);
3180   emit_push_p32(drcbe, &dst, &modep);
3209   emit_mov_m32_p32(drcbe, &dst, MBD(REG_ESP, 4), &pcp);
3210   emit_mov_m32_p32(drcbe, &dst, MBD(REG_ESP, 0), &modep);
31813211   emit_call(&dst, (x86code *)debug_log_hashjmp);
3182   emit_add_r32_imm(&dst, REG_ESP, 8);
31833212#endif
31843213
31853214   /* load the stack base one word early so we end up at the right spot after our call below */
r2844r2845
32563285
32573286   /* validate instruction */
32583287   assert(inst->size == 4);
3259   assert(inst->condflags == DRCUML_COND_ALWAYS || (inst->condflags >= DRCUML_COND_Z && inst->condflags < DRCUML_COND_MAX));
3288   assert_any_condition(inst);
3289   assert_no_flags(inst);
32603290
32613291   /* normalize parameters */
32623292   param_normalize_1(drcbe, inst, &labelp, PTYPE_I);
32633293
32643294   /* look up the jump target and jump there */
32653295   jmptarget = (x86code *)drclabel_get_codeptr(drcbe->labels, labelp.value, fixup_label, dst);
3266   if (inst->condflags == DRCUML_COND_ALWAYS)
3296   if (inst->condition == DRCUML_COND_ALWAYS)
32673297      emit_jmp(&dst, jmptarget);                                          // jmp   target
32683298   else
3269      emit_jcc(&dst, X86_CONDITION(inst->condflags), jmptarget);                  // jcc   target
3299      emit_jcc(&dst, X86_CONDITION(inst->condition), jmptarget);                  // jcc   target
32703300
32713301   return dst;
32723302}
r2844r2845
32833313
32843314   /* validate instruction */
32853315   assert(inst->size == 4);
3286   assert(inst->condflags == DRCUML_COND_ALWAYS || (inst->condflags >= DRCUML_COND_Z && inst->condflags < DRCUML_COND_MAX));
3316   assert_any_condition(inst);
3317   assert_no_flags(inst);
32873318
32883319   /* normalize parameters */
32893320   param_normalize_2(drcbe, inst, &handp, PTYPE_M, &exp, PTYPE_MRI);
r2844r2845
32923323   targetptr = drcuml_handle_codeptr_addr((drcuml_codehandle *)(FPTR)handp.value);
32933324
32943325   /* perform the exception processing inline if unconditional */
3295   if (inst->condflags == DRCUML_COND_ALWAYS)
3326   if (inst->condition == DRCUML_COND_ALWAYS)
32963327   {
32973328      emit_mov_m32_p32(drcbe, &dst, MABS(&drcbe->state.exp), &exp);               // mov   [exp],exp
32983329      if (*targetptr != NULL)
r2844r2845
33043335   /* otherwise, jump to an out-of-band handler */
33053336   else
33063337   {
3307      emit_jcc(&dst, X86_CONDITION(inst->condflags), 0);                        // jcc   exception
3338      emit_jcc(&dst, X86_CONDITION(inst->condition), 0);                        // jcc   exception
33083339      drccache_request_oob_codegen(drcbe->cache, fixup_exception, drcbe, dst, (void *)inst);
33093340   }
33103341   return dst;
r2844r2845
33233354
33243355   /* validate instruction */
33253356   assert(inst->size == 4);
3326   assert(inst->condflags == DRCUML_COND_ALWAYS || (inst->condflags >= DRCUML_COND_Z && inst->condflags < DRCUML_COND_MAX));
3357   assert_any_condition(inst);
3358   assert_no_flags(inst);
33273359
33283360   /* normalize parameters */
33293361   param_normalize_1(drcbe, inst, &handp, PTYPE_M);
r2844r2845
33323364   targetptr = drcuml_handle_codeptr_addr((drcuml_codehandle *)(FPTR)handp.value);
33333365
33343366   /* skip if conditional */
3335   if (inst->condflags != DRCUML_COND_ALWAYS)
3336      emit_jcc_short_link(&dst, X86_NOT_CONDITION(inst->condflags), &skip);         // jcc   skip
3367   if (inst->condition != DRCUML_COND_ALWAYS)
3368      emit_jcc_short_link(&dst, X86_NOT_CONDITION(inst->condition), &skip);         // jcc   skip
33373369
33383370   /* jump through the handle; directly if a normal jump */
33393371   if (*targetptr != NULL)
r2844r2845
33423374      emit_call_m32(&dst, MABS(targetptr));                                 // call  [targetptr]
33433375
33443376   /* resolve the conditional link */
3345   if (inst->condflags != DRCUML_COND_ALWAYS)
3377   if (inst->condition != DRCUML_COND_ALWAYS)
33463378      resolve_link(&dst, &skip);                                       // skip:
33473379   return dst;
33483380}
r2844r2845
33583390
33593391   /* validate instruction */
33603392   assert(inst->size == 4);
3361   assert(inst->condflags == DRCUML_COND_ALWAYS || (inst->condflags >= DRCUML_COND_Z && inst->condflags < DRCUML_COND_MAX));
3393   assert_any_condition(inst);
3394   assert_no_flags(inst);
33623395   assert(inst->numparams == 0);
33633396
33643397   /* skip if conditional */
3365   if (inst->condflags != DRCUML_COND_ALWAYS)
3366      emit_jcc_short_link(&dst, X86_NOT_CONDITION(inst->condflags), &skip);         // jcc   skip
3398   if (inst->condition != DRCUML_COND_ALWAYS)
3399      emit_jcc_short_link(&dst, X86_NOT_CONDITION(inst->condition), &skip);         // jcc   skip
33673400
33683401   /* return */
3402   emit_lea_r32_m32(&dst, REG_ESP, MBD(REG_ESP, 28));                           // lea   rsp,[rsp+28]
33693403   emit_ret(&dst);                                                      // ret
33703404
33713405   /* resolve the conditional link */
3372   if (inst->condflags != DRCUML_COND_ALWAYS)
3406   if (inst->condition != DRCUML_COND_ALWAYS)
33733407      resolve_link(&dst, &skip);                                       // skip:
33743408   return dst;
33753409}
r2844r2845
33863420
33873421   /* validate instruction */
33883422   assert(inst->size == 4);
3389   assert(inst->condflags == DRCUML_COND_ALWAYS || (inst->condflags >= DRCUML_COND_Z && inst->condflags < DRCUML_COND_MAX));
3423   assert_any_condition(inst);
3424   assert_no_flags(inst);
33903425
33913426   /* normalize parameters */
33923427   param_normalize_2(drcbe, inst, &funcp, PTYPE_M, &paramp, PTYPE_M);
33933428
33943429   /* skip if conditional */
3395   if (inst->condflags != DRCUML_COND_ALWAYS)
3396      emit_jcc_short_link(&dst, X86_NOT_CONDITION(inst->condflags), &skip);         // jcc   skip
3430   if (inst->condition != DRCUML_COND_ALWAYS)
3431      emit_jcc_short_link(&dst, X86_NOT_CONDITION(inst->condition), &skip);         // jcc   skip
33973432
33983433   /* perform the call */
3399   emit_push_imm(&dst, paramp.value);                                       // push  paramp
3434   emit_mov_m32_imm(&dst, MBD(REG_ESP, 0), paramp.value);                        // mov  [esp],paramp
34003435   emit_call(&dst, (x86code *)(FPTR)funcp.value);                              // call  funcp
3401   emit_add_r32_imm(&dst, REG_ESP, 4);                                       // add   esp,4
34023436
34033437   /* resolve the conditional link */
3404   if (inst->condflags != DRCUML_COND_ALWAYS)
3438   if (inst->condition != DRCUML_COND_ALWAYS)
34053439      resolve_link(&dst, &skip);                                       // skip:
34063440   return dst;
34073441}
r2844r2845
34133447
34143448static x86code *op_recover(drcbe_state *drcbe, x86code *dst, const drcuml_instruction *inst)
34153449{
3416   drcuml_parameter dstp, mvparam;
3450   drcuml_parameter dstp;
34173451
34183452   /* validate instruction */
34193453   assert(inst->size == 4);
3420   assert(inst->condflags == DRCUML_COND_ALWAYS);
3454   assert_no_condition(inst);
3455   assert_no_flags(inst);
34213456
34223457   /* normalize parameters */
3423   param_normalize_2(drcbe, inst, &dstp, PTYPE_MR, &mvparam, PTYPE_I);
3458   param_normalize(drcbe, &inst->param[0], &dstp, PTYPE_MR);
34243459
34253460   /* call the recovery code */
34263461   emit_mov_r32_m32(&dst, REG_EAX, MABS(&drcbe->stacksave));                     // mov   eax,stacksave
34273462   emit_mov_r32_m32(&dst, REG_EAX, MBD(REG_EAX, -4));                           // mov   eax,[eax-4]
34283463   emit_sub_r32_imm(&dst, REG_EAX, 1);                                       // sub   eax,1
3429   emit_push_imm(&dst, inst->param[1].value);                                 // push  param1
3430   emit_push_r32(&dst, REG_EAX);                                          // push  eax
3431   emit_push_imm(&dst, (FPTR)drcbe->map);                                    // push  drcbe->map
3464   emit_mov_m32_imm(&dst, MBD(REG_ESP, 8), inst->param[1].value);                  // mov   [esp+8],param1
3465   emit_mov_m32_r32(&dst, MBD(REG_ESP, 4), REG_EAX);                           // mov   [esp+4],eax
3466   emit_mov_m32_imm(&dst, MBD(REG_ESP, 0), (FPTR)drcbe->map);                     // mov   [esp],drcbe->map
34323467   emit_call(&dst, (x86code *)drcmap_get_value);                              // call  drcmap_get_value
3433   emit_add_r32_imm(&dst, REG_ESP, 12);                                    // add   esp,12
34343468   emit_mov_p32_r32(drcbe, &dst, &dstp, REG_EAX);                              // mov   dstp,eax
34353469
34363470   return dst;
r2844r2845
34523486
34533487   /* validate instruction */
34543488   assert(inst->size == 4);
3455   assert(inst->condflags == DRCUML_COND_ALWAYS);
3489   assert_no_condition(inst);
3490   assert_no_flags(inst);
34563491
34573492   /* normalize parameters */
34583493   param_normalize_1(drcbe, inst, &srcp, PTYPE_MRI);
r2844r2845
34883523
34893524   /* validate instruction */
34903525   assert(inst->size == 4);
3491   assert(inst->condflags == DRCUML_COND_ALWAYS);
3526   assert_no_condition(inst);
3527   assert_no_flags(inst);
34923528
34933529   /* normalize parameters */
34943530   param_normalize_1(drcbe, inst, &dstp, PTYPE_MR);
r2844r2845
35163552
35173553   /* validate instruction */
35183554   assert(inst->size == 4);
3519   assert(inst->condflags == DRCUML_COND_ALWAYS);
3555   assert_no_condition(inst);
3556   assert_no_flags(inst);
35203557
35213558   /* normalize parameters */
35223559   param_normalize_1(drcbe, inst, &dstp, PTYPE_MR);
r2844r2845
35403577
35413578static x86code *op_getflgs(drcbe_state *drcbe, x86code *dst, const drcuml_instruction *inst)
35423579{
3543   drcuml_parameter dstp;
3580   drcuml_parameter dstp, maskp;
3581   UINT32 flagmask = 0;
35443582   int dstreg;
35453583
35463584   /* validate instruction */
35473585   assert(inst->size == 4);
3548   assert(inst->condflags != DRCUML_COND_ALWAYS);
3586   assert_no_condition(inst);
3587   assert_no_flags(inst);
35493588
35503589   /* normalize parameters */
3551   param_normalize_1(drcbe, inst, &dstp, PTYPE_MR);
3590   param_normalize_2(drcbe, inst, &dstp, PTYPE_MR, &maskp, PTYPE_I);
35523591
35533592   /* pick a target register for the general case */
35543593   dstreg = param_select_register(REG_EAX, &dstp, NULL);
35553594
3556   switch (inst->condflags)
3595   /* compute mask for flags */
3596   if (maskp.value & DRCUML_FLAG_C) flagmask |= 0x001;
3597   if (maskp.value & DRCUML_FLAG_V) flagmask |= 0x800;
3598   if (maskp.value & DRCUML_FLAG_Z) flagmask |= 0x040;
3599   if (maskp.value & DRCUML_FLAG_S) flagmask |= 0x080;
3600   if (maskp.value & DRCUML_FLAG_U) flagmask |= 0x004;
3601
3602   switch (maskp.value)
35573603   {
35583604      /* single flags only */
35593605      case DRCUML_FLAG_C:
r2844r2845
36433689      default:
36443690         emit_pushf(&dst);                                             // pushf
36453691         emit_pop_r32(&dst, REG_EAX);                                    // pop    eax
3646         emit_and_r32_imm(&dst, REG_EAX, 0x8c5);                              // and    eax,0x8c5
3692         emit_and_r32_imm(&dst, REG_EAX, flagmask);                           // and    eax,flagmask
36473693         emit_movzx_r32_m8(&dst, dstreg, MBD(REG_EAX, flags_map));               // movzx  dstreg,[flags_map]
36483694         break;
36493695   }
r2844r2845
36753721
36763722   /* validate instruction */
36773723   assert(inst->size == 4);
3678   assert(inst->condflags == DRCUML_COND_ALWAYS);
3724   assert_no_condition(inst);
3725   assert_no_flags(inst);
36793726
36803727   /* normalize parameters */
36813728   param_normalize_1(drcbe, inst, &dstp, PTYPE_M);
r2844r2845
37343781
37353782   /* validate instruction */
37363783   assert(inst->size == 4);
3737   assert(inst->condflags == DRCUML_COND_ALWAYS);
3784   assert_no_condition(inst);
3785   assert_no_flags(inst);
37383786
37393787   /* normalize parameters */
37403788   param_normalize_1(drcbe, inst, &dstp, PTYPE_M);
r2844r2845
37983846
37993847   /* validate instruction */
38003848   assert(inst->size == 4 || inst->size == 8);
3801   assert(inst->condflags == DRCUML_COND_ALWAYS);
3849   assert_no_condition(inst);
3850   assert_no_flags(inst);
38023851
38033852   /* normalize parameters */
38043853   param_normalize_4(drcbe, inst, &dstp, PTYPE_MR, &basep, PTYPE_M, &indp, PTYPE_MRI, &sizep, PTYPE_I);
r2844r2845
38793928
38803929   /* validate instruction */
38813930   assert(inst->size == 4 || inst->size == 8);
3882   assert(inst->condflags == DRCUML_COND_ALWAYS);
3931   assert_no_condition(inst);
3932   assert_no_flags(inst);
38833933
38843934   /* normalize parameters */
38853935   param_normalize_4(drcbe, inst, &dstp, PTYPE_MR, &basep, PTYPE_M, &indp, PTYPE_MRI, &sizep, PTYPE_I);
r2844r2845
39483998
39493999   /* validate instruction */
39504000   assert(inst->size == 4 || inst->size == 8);
3951   assert(inst->condflags == DRCUML_COND_ALWAYS);
4001   assert_no_condition(inst);
4002   assert_no_flags(inst);
39524003
39534004   /* normalize parameters */
39544005   param_normalize_4(drcbe, inst, &basep, PTYPE_M, &indp, PTYPE_MRI, &srcp, PTYPE_MRI, &sizep, PTYPE_I);
r2844r2845
40574108
40584109   /* validate instruction */
40594110   assert(inst->size == 4 || inst->size == 8);
4060   assert(inst->condflags == DRCUML_COND_ALWAYS);
4111   assert_no_condition(inst);
4112   assert_no_flags(inst);
40614113
40624114   /* normalize parameters */
40634115   param_normalize_3(drcbe, inst, &dstp, PTYPE_MR, &addrp, PTYPE_MRI, &spacesizep, PTYPE_I);
r2844r2845
40664118   dstreg = param_select_register(REG_EAX, &dstp, NULL);
40674119
40684120   /* set up a call to the read byte handler */
4069   emit_push_p32(drcbe, &dst, &addrp);                                       // push   addrp
4121   emit_mov_m32_p32(drcbe, &dst, MBD(REG_ESP, 0), &addrp);                        // mov    [esp],addrp
40704122   if ((spacesizep.value & 3) == DRCUML_SIZE_BYTE)
40714123   {
40724124      emit_call(&dst, (x86code *)active_address_space[spacesizep.value / 16].accessors->read_byte);
r2844r2845
40914143                                                                  // call   read_qword
40924144      emit_mov_r32_r32(&dst, dstreg, REG_EAX);                              // mov    dstreg,eax
40934145   }
4094   emit_add_r32_imm(&dst, REG_ESP, 4);                                       // add    esp,4
40954146
40964147   /* store low 32 bits */
40974148   emit_mov_p32_r32(drcbe, &dst, &dstp, dstreg);                              // mov    dstp,dstreg
r2844r2845
41324183
41334184   /* validate instruction */
41344185   assert(inst->size == 4 || inst->size == 8);
4135   assert(inst->condflags == DRCUML_COND_ALWAYS);
4186   assert_no_condition(inst);
4187   assert_no_flags(inst);
41364188
41374189   /* normalize parameters */
41384190   param_normalize_4(drcbe, inst, &dstp, PTYPE_MR, &addrp, PTYPE_MRI, &maskp, PTYPE_MRI, &spacesizep, PTYPE_I);
r2844r2845
41424194
41434195   /* set up a call to the read byte handler */
41444196   if ((spacesizep.value & 3) != DRCUML_SIZE_QWORD)
4145      emit_push_p32(drcbe, &dst, &maskp);                                    // push   maskp
4197      emit_mov_m32_p32(drcbe, &dst, MBD(REG_ESP, 4), &maskp);                     // mov    [esp+4],maskp
41464198   else
4147      emit_push_p64(drcbe, &dst, &maskp);                                    // push   maskp
4148   emit_push_p32(drcbe, &dst, &addrp);                                       // push   addrp
4199      emit_mov_m64_p64(drcbe, &dst, MBD(REG_ESP, 4), &maskp);                     // mov    [esp+4],maskp
4200   emit_mov_m32_p32(drcbe, &dst, MBD(REG_ESP, 0), &addrp);                        // mov    [esp],addrp
41494201   if ((spacesizep.value & 3) == DRCUML_SIZE_WORD)
41504202   {
41514203      emit_call(&dst, (x86code *)active_address_space[spacesizep.value / 16].accessors->read_word_masked);
r2844r2845
41644216                                                                  // call   read_qword_masked
41654217      emit_mov_r32_r32(&dst, dstreg, REG_EAX);                              // mov    dstreg,eax
41664218   }
4167   emit_add_r32_imm(&dst, REG_ESP, ((spacesizep.value & 3) != DRCUML_SIZE_QWORD) ? 8 : 12);
4168                                                                  // add    esp,8/12
4219
41694220   /* store low 32 bits */
41704221   emit_mov_p32_r32(drcbe, &dst, &dstp, dstreg);                              // mov    dstp,dstreg
41714222
r2844r2845
42044255
42054256   /* validate instruction */
42064257   assert(inst->size == 4 || inst->size == 8);
4207   assert(inst->condflags == DRCUML_COND_ALWAYS);
4258   assert_no_condition(inst);
4259   assert_no_flags(inst);
42084260
42094261   /* normalize parameters */
42104262   param_normalize_3(drcbe, inst, &addrp, PTYPE_MRI, &srcp, PTYPE_MRI, &spacesizep, PTYPE_I);
42114263
42124264   /* set up a call to the write byte handler */
42134265   if ((spacesizep.value & 3) != DRCUML_SIZE_QWORD)
4214      emit_push_p32(drcbe, &dst, &srcp);                                    // push   srcp
4266      emit_mov_m32_p32(drcbe, &dst, MBD(REG_ESP, 4), &srcp);                     // mov    [esp+4],srcp
42154267   else
4216      emit_push_p64(drcbe, &dst, &srcp);                                    // push   srcp
4217   emit_push_p32(drcbe, &dst, &addrp);                                       // push   addrp
4268      emit_mov_m64_p64(drcbe, &dst, MBD(REG_ESP, 4), &srcp);                     // mov    [esp+4],srcp
4269   emit_mov_m32_p32(drcbe, &dst, MBD(REG_ESP, 0), &addrp);                        // mov    [esp],addrp
42184270   if ((spacesizep.value & 3) == DRCUML_SIZE_BYTE)
42194271      emit_call(&dst, (x86code *)active_address_space[spacesizep.value / 16].accessors->write_byte);
42204272                                                                  // call   write_byte
r2844r2845
42274279   else if ((spacesizep.value & 3) == DRCUML_SIZE_QWORD)
42284280      emit_call(&dst, (x86code *)active_address_space[spacesizep.value / 16].accessors->write_qword);
42294281                                                                  // call   write_qword
4230   emit_add_r32_imm(&dst, REG_ESP, ((spacesizep.value & 3) != DRCUML_SIZE_QWORD) ? 8 : 12);
4231                                                                  // add    esp,8/12
42324282   return dst;
42334283}
42344284
r2844r2845
42434293
42444294   /* validate instruction */
42454295   assert(inst->size == 4 || inst->size == 8);
4246   assert(inst->condflags == DRCUML_COND_ALWAYS);
4296   assert_no_condition(inst);
4297   assert_no_flags(inst);
42474298
42484299   /* normalize parameters */
42494300   param_normalize_4(drcbe, inst, &addrp, PTYPE_MRI, &srcp, PTYPE_MRI, &maskp, PTYPE_MRI, &spacesizep, PTYPE_I);
r2844r2845
42514302   /* set up a call to the write byte handler */
42524303   if ((spacesizep.value & 3) != DRCUML_SIZE_QWORD)
42534304   {
4254      emit_push_p32(drcbe, &dst, &maskp);                                    // push   maskp
4255      emit_push_p32(drcbe, &dst, &srcp);                                    // push   srcp
4305      emit_mov_m32_p32(drcbe, &dst, MBD(REG_ESP, 8), &maskp);                     // mov    [esp+8],maskp
4306      emit_mov_m32_p32(drcbe, &dst, MBD(REG_ESP, 4), &srcp);                     // mov    [esp+4],srcp
42564307   }
42574308   else
42584309   {
4259      emit_push_p64(drcbe, &dst, &maskp);                                    // push   maskp
4260      emit_push_p64(drcbe, &dst, &srcp);                                    // push   srcp
4310      emit_mov_m64_p64(drcbe, &dst, MBD(REG_ESP, 12), &maskp);                  // mov    [esp+12],maskp
4311      emit_mov_m64_p64(drcbe, &dst, MBD(REG_ESP, 4), &srcp);                     // mov    [esp+4],srcp
42614312   }
4262   emit_push_p32(drcbe, &dst, &addrp);                                       // push   addrp
4313   emit_mov_m32_p32(drcbe, &dst, MBD(REG_ESP, 0), &addrp);                        // mov    [esp],addrp
42634314   if ((spacesizep.value & 3) == DRCUML_SIZE_WORD)
42644315      emit_call(&dst, (x86code *)active_address_space[spacesizep.value / 16].accessors->write_word_masked);
42654316                                                                  // call   write_word_masked
r2844r2845
42694320   else if ((spacesizep.value & 3) == DRCUML_SIZE_QWORD)
42704321      emit_call(&dst, (x86code *)active_address_space[spacesizep.value / 16].accessors->write_qword_masked);
42714322                                                                  // call   write_qword_masked
4272   emit_add_r32_imm(&dst, REG_ESP, ((spacesizep.value & 3) != DRCUML_SIZE_QWORD) ? 12 : 20);
4273                                                                  // add    esp,12/20
42744323   return dst;
42754324}
42764325
r2844r2845
42854334
42864335   /* validate instruction */
42874336   assert(inst->size == 4 || inst->size == 8);
4288   assert(inst->condflags == DRCUML_COND_ALWAYS);
4337   assert_no_condition(inst);
4338   assert_flags(inst, DRCUML_FLAG_C);
42894339
42904340   /* normalize parameters */
42914341   param_normalize_2(drcbe, inst, &srcp, PTYPE_MRI, &bitp, PTYPE_MRI);
r2844r2845
43644414
43654415   /* validate instruction */
43664416   assert(inst->size == 4 || inst->size == 8);
4367   assert(inst->condflags >= DRCUML_COND_Z && inst->condflags < DRCUML_COND_MAX);
4417   assert_any_condition(inst);
4418   assert_no_flags(inst);
43684419
43694420   /* normalize parameters */
43704421   param_normalize_1(drcbe, inst, &dstp, PTYPE_MR);
r2844r2845
43734424   dstreg = param_select_register(REG_EAX, &dstp, NULL);
43744425
43754426   /* set to AL */
4376   emit_setcc_r8(&dst, X86_CONDITION(inst->condflags), REG_AL);                  // setcc  al
4427   emit_setcc_r8(&dst, X86_CONDITION(inst->condition), REG_AL);                  // setcc  al
43774428   emit_movzx_r32_r8(&dst, dstreg, REG_AL);                                 // movzx  dstreg,al
43784429
43794430   /* store low 32 bits */
r2844r2845
44054456
44064457   /* validate instruction */
44074458   assert(inst->size == 4 || inst->size == 8);
4408   assert(inst->condflags == DRCUML_COND_ALWAYS || (inst->condflags >= DRCUML_COND_Z && inst->condflags < DRCUML_COND_MAX));
4459   assert_any_condition(inst);
4460   assert_no_flags(inst);
44094461
44104462   /* normalize parameters, but only if we got here directly */
44114463   /* other opcodes call through here with pre-normalized parameters */
r2844r2845
44174469      srcp = inst->param[1];
44184470   }
44194471
4420   /* degenerate case: dest and source are equal */
4421   if (dstp.type == srcp.type && dstp.value == srcp.value)
4422      return dst;
4423
44244472   /* pick a target register for the general case */
44254473   dstreg = param_select_register(REG_EAX, &dstp, NULL);
44264474
44274475   /* always start with a jmp */
4428   if (inst->condflags != DRCUML_COND_ALWAYS)
4429      emit_jcc_short_link(&dst, X86_NOT_CONDITION(inst->condflags), &skip);         // jcc   skip
4476   if (inst->condition != DRCUML_COND_ALWAYS)
4477      emit_jcc_short_link(&dst, X86_NOT_CONDITION(inst->condition), &skip);         // jcc   skip
44304478
44314479   /* 32-bit form */
44324480   if (inst->size == 4)
r2844r2845
44404488         emit_mov_m32_imm(&dst, MABS(dstp.value), srcp.value);                  // mov   [dstp],srcp
44414489
44424490      /* conditional memory to register */
4443      else if (inst->condflags != 0 && dstp.type == DRCUML_PTYPE_INT_REGISTER && srcp.type == DRCUML_PTYPE_MEMORY)
4491      else if (inst->condition != DRCUML_COND_ALWAYS && dstp.type == DRCUML_PTYPE_INT_REGISTER && srcp.type == DRCUML_PTYPE_MEMORY)
44444492      {
44454493         dst = savedst;
44464494         skip.target = NULL;
4447         emit_cmovcc_r32_m32(&dst, X86_CONDITION(inst->condflags), dstp.value, MABS(srcp.value));
4495         emit_cmovcc_r32_m32(&dst, X86_CONDITION(inst->condition), dstp.value, MABS(srcp.value));
44484496                                                                  // cmovcc dstp,[srcp]
44494497      }
44504498
44514499      /* conditional register to register */
4452      else if (inst->condflags != 0 && dstp.type == DRCUML_PTYPE_INT_REGISTER && srcp.type == DRCUML_PTYPE_INT_REGISTER)
4500      else if (inst->condition != DRCUML_COND_ALWAYS && dstp.type == DRCUML_PTYPE_INT_REGISTER && srcp.type == DRCUML_PTYPE_INT_REGISTER)
44534501      {
44544502         dst = savedst;
44554503         skip.target = NULL;
4456         emit_cmovcc_r32_r32(&dst, X86_CONDITION(inst->condflags), dstp.value, srcp.value);
4504         emit_cmovcc_r32_r32(&dst, X86_CONDITION(inst->condition), dstp.value, srcp.value);
44574505                                                                  // cmovcc dstp,srcp
44584506      }
44594507
44604508      /* general case */
44614509      else
44624510      {
4463         emit_mov_r32_p32(drcbe, &dst, dstreg, &srcp);                        // mov   dstreg,srcp
4511         emit_mov_r32_p32_keepflags(drcbe, &dst, dstreg, &srcp);                  // mov   dstreg,srcp
44644512         emit_mov_p32_r32(drcbe, &dst, &dstp, dstreg);                        // mov   dstp,dstreg
44654513      }
44664514   }
r2844r2845
45094557
45104558   /* validate instruction */
45114559   assert(inst->size == 4 || inst->size == 8);
4512   assert(inst->condflags == DRCUML_COND_ALWAYS);
4560   assert_no_condition(inst);
4561   assert_flags(inst, DRCUML_FLAG_S | DRCUML_FLAG_Z);
45134562
45144563   /* normalize parameters */
45154564   param_normalize_3(drcbe, inst, &dstp, PTYPE_MR, &srcp, PTYPE_MRI, &sizep, PTYPE_I);
4565   assert(srcp.type != DRCUML_PTYPE_IMMEDIATE);
45164566
4517   /* degenerate cases -- convert to a move */
4518   if (srcp.type == DRCUML_PTYPE_IMMEDIATE)
4519   {
4520      if (sizep.value == DRCUML_SIZE_BYTE)
4521         return convert_to_mov_imm(drcbe, dst, inst, &dstp, (INT8)srcp.value);
4522      else if (sizep.value == DRCUML_SIZE_WORD)
4523         return convert_to_mov_imm(drcbe, dst, inst, &dstp, (INT16)srcp.value);
4524      else if (sizep.value == DRCUML_SIZE_DWORD)
4525         return convert_to_mov_imm(drcbe, dst, inst, &dstp, (INT32)srcp.value);
4526   }
4527
45284567   /* pick a target register for the general case */
45294568   dstreg = (inst->size == 8) ? REG_EAX : param_select_register(REG_EAX, &dstp, NULL);
45304569
r2844r2845
45544593      else if (sizep.value == DRCUML_SIZE_DWORD && dstreg != srcp.value)
45554594         emit_mov_r32_r32(&dst, dstreg, srcp.value);                           // mov   dstreg,srcp
45564595   }
4596   if (inst->flags != 0)
4597      emit_test_r32_r32(&dst, dstreg, dstreg);                              // test  dstreg,dstreg
45574598
45584599   /* 32-bit form: store the low 32 bits */
45594600   if (inst->size == 4)
r2844r2845
45804621
45814622   /* validate instruction */
45824623   assert(inst->size == 4 || inst->size == 8);
4583   assert(inst->condflags == DRCUML_COND_ALWAYS);
4624   assert_no_condition(inst);
4625   assert_flags(inst, DRCUML_FLAG_S | DRCUML_FLAG_Z);
45844626
45854627   /* normalize parameters */
45864628   param_normalize_4(drcbe, inst, &dstp, PTYPE_MR, &srcp, PTYPE_MRI, &shiftp, PTYPE_MRI, &maskp, PTYPE_MRI);
45874629
4588   /* degenerate cases -- convert to a move or simple shift */
4589   if (srcp.type == DRCUML_PTYPE_IMMEDIATE && shiftp.type == DRCUML_PTYPE_IMMEDIATE && maskp.type == DRCUML_PTYPE_IMMEDIATE)
4590   {
4591      if (inst->size == 4)
4592         return convert_to_mov_imm(drcbe, dst, inst, &dstp, ((srcp.value << shiftp.value) | (srcp.value >> (32 - shiftp.value))) & maskp.value);
4593      else if (inst->size == 8)
4594         return convert_to_mov_imm(drcbe, dst, inst, &dstp, ((srcp.value << shiftp.value) | (srcp.value >> (64 - shiftp.value))) & maskp.value);
4595   }
4596   if (shiftp.type == DRCUML_PTYPE_IMMEDIATE && maskp.type == DRCUML_PTYPE_IMMEDIATE)
4597   {
4598      if ((inst->size == 4 && maskp.value == (UINT32)(0xffffffffUL << shiftp.value)) || (inst->size == 8 && maskp.value == U64(0xffffffffffffffff) << shiftp.value))
4599      {
4600         drcuml_instruction temp = *inst;
4601         temp.numparams = 3;
4602         return op_shl(drcbe, dst, &temp);
4603      }
4604      if ((inst->size == 4 && maskp.value == (UINT32)(0xffffffffUL >> (32 - shiftp.value))) || (inst->size == 8 && maskp.value == U64(0xffffffffffffffff) >> (64 - shiftp.value)))
4605      {
4606         drcuml_instruction temp = *inst;
4607         temp.numparams = 3;
4608         temp.param[2].value = inst->size * 8 - temp.param[2].value;
4609         return op_shr(drcbe, dst, &temp);
4610      }
4611   }
4612
46134630   /* pick a target register for the general case */
46144631   dstreg = param_select_register2(REG_EAX, &dstp, &shiftp, &maskp);
46154632
r2844r2845
46454662
46464663   /* validate instruction */
46474664   assert(inst->size == 4 || inst->size == 8);
4648   assert(inst->condflags == DRCUML_COND_ALWAYS);
4665   assert_no_condition(inst);
4666   assert_flags(inst, DRCUML_FLAG_S | DRCUML_FLAG_Z);
46494667
46504668   /* normalize parameters */
46514669   param_normalize_4(drcbe, inst, &dstp, PTYPE_MR, &srcp, PTYPE_MRI, &shiftp, PTYPE_MRI, &maskp, PTYPE_MRI);
r2844r2845
47234741         }
47244742         emit_mov_r32_m32(&dst, REG_EBX, MBD(REG_ESP, -8));                     // mov   ebx,[esp-8]
47254743      }
4744      if (inst->flags == DRCUML_FLAG_Z)
4745         emit_or_r32_r32(&dst, REG_EAX, REG_EDX);                           // or    eax,edx
4746      else if (inst->flags == DRCUML_FLAG_S)
4747         ;// do nothing -- final OR will have the right result
4748      else if (inst->flags == (DRCUML_FLAG_Z | DRCUML_FLAG_S))
4749      {
4750         emit_movzx_r32_r16(&dst, REG_ECX, REG_AX);                           // movzx ecx,ax
4751         emit_shr_r32_imm(&dst, REG_EAX, 16);                              // shr   eax,16
4752         emit_or_r32_r32(&dst, REG_EDX, REG_ECX);                           // or    edx,ecx
4753         emit_or_r32_r32(&dst, REG_EDX, REG_EAX);                           // or    edx,eax
4754      }
47264755   }
47274756   return dst;
47284757}
r2844r2845
47394768
47404769   /* validate instruction */
47414770   assert(inst->size == 4 || inst->size == 8);
4742   assert((inst->condflags & ~(DRCUML_FLAG_C | DRCUML_FLAG_V | DRCUML_FLAG_Z | DRCUML_FLAG_S)) == 0);
4771   assert_no_condition(inst);
4772   assert_flags(inst, DRCUML_FLAG_C | DRCUML_FLAG_V | DRCUML_FLAG_Z | DRCUML_FLAG_S);
47434773
47444774   /* normalize parameters */
47454775   param_normalize_3_commutative(drcbe, inst, &dstp, PTYPE_MR, &src1p, PTYPE_MRI, &src2p, PTYPE_MRI);
4776   assert(src1p.type != DRCUML_PTYPE_IMMEDIATE || src2p.type != DRCUML_PTYPE_IMMEDIATE);
47464777
4747   /* degenerate cases -- convert to a move */
4748   if (src1p.type == DRCUML_PTYPE_IMMEDIATE && src2p.type == DRCUML_PTYPE_IMMEDIATE && inst->condflags == 0)
4749      return convert_to_mov_imm(drcbe, dst, inst, &dstp, src1p.value + src2p.value);
4750   if (src2p.type == DRCUML_PTYPE_IMMEDIATE && src2p.value == 0 && inst->condflags == 0)
4751      return convert_to_mov_src1(drcbe, dst, inst, &dstp, &src1p);
4752
47534778   /* pick a target register for the general case */
47544779   dstreg = param_select_register(REG_EAX, &dstp, &src2p);
47554780
r2844r2845
47614786         emit_add_m32_p32(drcbe, &dst, MABS(dstp.value), &src2p, inst);            // add   [dstp],src2p
47624787
47634788      /* reg = reg + imm */
4764      else if (dstp.type == DRCUML_PTYPE_INT_REGISTER && src1p.type == DRCUML_PTYPE_INT_REGISTER && src2p.type == DRCUML_PTYPE_IMMEDIATE && inst->condflags == 0)
4789      else if (dstp.type == DRCUML_PTYPE_INT_REGISTER && src1p.type == DRCUML_PTYPE_INT_REGISTER && src2p.type == DRCUML_PTYPE_IMMEDIATE && inst->flags == 0)
47654790         emit_lea_r32_m32(&dst, dstp.value, MBD(src1p.value, src2p.value));         // lea   dstp,[src1p+src2p]
47664791
47674792      /* reg = reg + reg */
4768      else if (dstp.type == DRCUML_PTYPE_INT_REGISTER && src1p.type == DRCUML_PTYPE_INT_REGISTER && src2p.type == DRCUML_PTYPE_INT_REGISTER && inst->condflags == 0)
4793      else if (dstp.type == DRCUML_PTYPE_INT_REGISTER && src1p.type == DRCUML_PTYPE_INT_REGISTER && src2p.type == DRCUML_PTYPE_INT_REGISTER && inst->flags == 0)
47694794         emit_lea_r32_m32(&dst, dstp.value, MBISD(src1p.value, src2p.value, 1, 0));   // lea   dstp,[src1p+src2p]
47704795
47714796      /* general case */
r2844r2845
48074832
48084833   /* validate instruction */
48094834   assert(inst->size == 4 || inst->size == 8);
4810   assert((inst->condflags & ~(DRCUML_FLAG_C | DRCUML_FLAG_V | DRCUML_FLAG_Z | DRCUML_FLAG_S)) == 0);
4835   assert_no_condition(inst);
4836   assert_flags(inst, DRCUML_FLAG_C | DRCUML_FLAG_V | DRCUML_FLAG_Z | DRCUML_FLAG_S);
48114837
48124838   /* normalize parameters */
48134839   param_normalize_3_commutative(drcbe, inst, &dstp, PTYPE_MR, &src1p, PTYPE_MRI, &src2p, PTYPE_MRI);
r2844r2845
48254851      /* general case */
48264852      else
48274853      {
4828         emit_mov_r32_p32(drcbe, &dst, dstreg, &src1p);                        // mov   dstreg,src1p
4854         emit_mov_r32_p32_keepflags(drcbe, &dst, dstreg, &src1p);               // mov   dstreg,src1p
48294855         emit_adc_r32_p32(drcbe, &dst, dstreg, &src2p, inst);                  // adc   dstreg,src2p
48304856         emit_mov_p32_r32(drcbe, &dst, &dstp, dstreg);                        // mov   dstp,dstreg
48314857      }
r2844r2845
48414867      /* general case */
48424868      else
48434869      {
4844         emit_mov_r64_p64(drcbe, &dst, dstreg, REG_EDX, &src1p);                  // mov   dstreg:dstp,[src1p]
4870         emit_mov_r64_p64_keepflags(drcbe, &dst, dstreg, REG_EDX, &src1p);         // mov   dstreg:dstp,[src1p]
48454871         emit_adc_r64_p64(drcbe, &dst, dstreg, REG_EDX, &src2p, inst);            // adc   dstreg:dstp,src2p
48464872         emit_mov_p64_r64(drcbe, &dst, &dstp, dstreg, REG_EDX);                  // mov   dstp,dstreg:eax
48474873      }
r2844r2845
48614887
48624888   /* validate instruction */
48634889   assert(inst->size == 4 || inst->size == 8);
4864   assert((inst->condflags & ~(DRCUML_FLAG_C | DRCUML_FLAG_V | DRCUML_FLAG_Z | DRCUML_FLAG_S)) == 0);
4890   assert_no_condition(inst);
4891   assert_flags(inst, DRCUML_FLAG_C | DRCUML_FLAG_V | DRCUML_FLAG_Z | DRCUML_FLAG_S);
48654892
48664893   /* normalize parameters */
48674894   param_normalize_3(drcbe, inst, &dstp, PTYPE_MR, &src1p, PTYPE_MRI, &src2p, PTYPE_MRI);
4895   assert(src1p.type != DRCUML_PTYPE_IMMEDIATE || src2p.type != DRCUML_PTYPE_IMMEDIATE);
48684896
4869   /* degenerate cases -- convert to a move */
4870   if (src1p.type == DRCUML_PTYPE_IMMEDIATE && src2p.type == DRCUML_PTYPE_IMMEDIATE && inst->condflags == 0)
4871      return convert_to_mov_imm(drcbe, dst, inst, &dstp, src1p.value - src2p.value);
4872   if (src2p.type == DRCUML_PTYPE_IMMEDIATE && src2p.value == 0 && inst->condflags == 0)
4873      return convert_to_mov_src1(drcbe, dst, inst, &dstp, &src1p);
4874
48754897   /* pick a target register for the general case */
48764898   dstreg = param_select_register(REG_EAX, &dstp, &src2p);
48774899
r2844r2845
48834905         emit_sub_m32_p32(drcbe, &dst, MABS(dstp.value), &src2p, inst);            // sub   [dstp],src2p
48844906
48854907      /* reg = reg - imm */
4886      else if (dstp.type == DRCUML_PTYPE_INT_REGISTER && src1p.type == DRCUML_PTYPE_INT_REGISTER && src2p.type == DRCUML_PTYPE_IMMEDIATE && inst->condflags == 0)
4908      else if (dstp.type == DRCUML_PTYPE_INT_REGISTER && src1p.type == DRCUML_PTYPE_INT_REGISTER && src2p.type == DRCUML_PTYPE_IMMEDIATE && inst->flags == 0)
48874909         emit_lea_r32_m32(&dst, dstp.value, MBD(src1p.value, -src2p.value));         // lea   dstp,[src1p-src2p]
48884910
48894911      /* general case */
r2844r2845
49254947
49264948   /* validate instruction */
49274949   assert(inst->size == 4 || inst->size == 8);
4928   assert((inst->condflags & ~(DRCUML_FLAG_C | DRCUML_FLAG_V | DRCUML_FLAG_Z | DRCUML_FLAG_S)) == 0);
4950   assert_no_condition(inst);
4951   assert_flags(inst, DRCUML_FLAG_C | DRCUML_FLAG_V | DRCUML_FLAG_Z | DRCUML_FLAG_S);
49294952
49304953   /* normalize parameters */
49314954   param_normalize_3(drcbe, inst, &dstp, PTYPE_MR, &src1p, PTYPE_MRI, &src2p, PTYPE_MRI);
r2844r2845
49434966      /* general case */
49444967      else
49454968      {
4946         emit_mov_r32_p32(drcbe, &dst, dstreg, &src1p);                        // mov   dstreg,src1p
4969         emit_mov_r32_p32_keepflags(drcbe, &dst, dstreg, &src1p);               // mov   dstreg,src1p
49474970         emit_sbb_r32_p32(drcbe, &dst, dstreg, &src2p, inst);                  // sbb   dstreg,src2p
49484971         emit_mov_p32_r32(drcbe, &dst, &dstp, dstreg);                        // mov   dstp,dstreg
49494972      }
r2844r2845
49594982      /* general case */
49604983      else
49614984      {
4962         emit_mov_r64_p64(drcbe, &dst, dstreg, REG_EDX, &src1p);                  // mov   dstreg:dstp,[src1p]
4985         emit_mov_r64_p64_keepflags(drcbe, &dst, dstreg, REG_EDX, &src1p);         // mov   dstreg:dstp,[src1p]
49634986         emit_sbb_r64_p64(drcbe, &dst, dstreg, REG_EDX, &src2p, inst);            // sbb   dstreg:dstp,src2p
49644987         emit_mov_p64_r64(drcbe, &dst, &dstp, dstreg, REG_EDX);                  // mov   dstp,dstreg:eax
49654988      }
r2844r2845
49805003
49815004   /* validate instruction */
49825005   assert(inst->size == 4 || inst->size == 8);
4983   assert((inst->condflags & ~(DRCUML_FLAG_C | DRCUML_FLAG_V | DRCUML_FLAG_Z | DRCUML_FLAG_S)) == 0);
5006   assert_no_condition(inst);
5007   assert_flags(inst, DRCUML_FLAG_C | DRCUML_FLAG_V | DRCUML_FLAG_Z | DRCUML_FLAG_S);
49845008
49855009   /* normalize parameters */
49865010   param_normalize_2(drcbe, inst, &src1p, PTYPE_MRI, &src2p, PTYPE_MRI);
49875011
4988   /* degenerate cases */
4989   if (src1p.type == DRCUML_PTYPE_IMMEDIATE && src2p.type == DRCUML_PTYPE_IMMEDIATE && src1p.value == src2p.value)
4990   {
4991      emit_cmp_r32_r32(&dst, REG_EAX, REG_EAX);                              // cmp   eax,eax
4992      return dst;
4993   }
4994
49955012   /* pick a target register for the general case */
49965013   src1reg = param_select_register(REG_EAX, &src1p, NULL);
49975014
r2844r2845
50535070
50545071   /* validate instruction */
50555072   assert(inst->size == 4 || inst->size == 8);
5056   assert((inst->condflags & ~(DRCUML_FLAG_Z | DRCUML_FLAG_S)) == 0);
5073   assert_no_condition(inst);
5074   assert_flags(inst, /*DRCUML_FLAG_V |*/ DRCUML_FLAG_Z | DRCUML_FLAG_S);
50575075
50585076   /* normalize parameters */
50595077   param_normalize_4_commutative(drcbe, inst, &dstp, PTYPE_MR, &edstp, PTYPE_MR, &src1p, PTYPE_MRI, &src2p, PTYPE_MRI);
50605078   compute_hi = (dstp.type != edstp.type || dstp.value != edstp.value);
50615079
5062   /* degenerate cases -- convert to a move */
5063   if (src1p.type == DRCUML_PTYPE_IMMEDIATE && src2p.type == DRCUML_PTYPE_IMMEDIATE && inst->condflags == 0)
5064   {
5065      if (inst->size == 4)
5066      {
5067         if (!compute_hi)
5068            return convert_to_mov_imm(drcbe, dst, inst, &dstp, (UINT32)src1p.value * (UINT32)src2p.value);
5069         else
5070         {
5071            UINT64 result = (UINT64)(UINT32)src1p.value * (UINT64)(UINT32)src2p.value;
5072            dst = convert_to_mov_imm(drcbe, dst, inst, &dstp, result & 0xffffffff);
5073            return convert_to_mov_imm(drcbe, dst, inst, &dstp, result >> 32);
5074         }
5075      }
5076      else if (inst->size == 8)
5077      {
5078         UINT64 reslo, reshi;
5079         if (!compute_hi)
5080         {
5081            dmulu(&reslo, &reslo, src1p.value, src2p.value);
5082            return convert_to_mov_imm(drcbe, dst, inst, &dstp, reslo);
5083         }
5084         else
5085         {
5086            dmulu(&reslo, &reshi, src1p.value, src2p.value);
5087            dst = convert_to_mov_imm(drcbe, dst, inst, &dstp, reslo);
5088            return convert_to_mov_imm(drcbe, dst, inst, &dstp, reshi);
5089         }
5090      }
5091   }
5092
50935080   /* 32-bit form */
50945081   if (inst->size == 4)
50955082   {
r2844r2845
51095096         emit_mov_p32_r32(drcbe, &dst, &edstp, REG_EDX);                        // mov   edstp,edx
51105097
51115098      /* compute flags */
5112      if (inst->condflags != 0)
5099      if (inst->flags != 0)
51135100      {
51145101         if (compute_hi)
51155102         {
5116            if (inst->condflags == DRCUML_FLAG_Z)
5103            if (inst->flags == DRCUML_FLAG_Z)
51175104               emit_or_r32_r32(&dst, REG_EDX, REG_EAX);                     // or    edx,eax
5118            else if (inst->condflags == DRCUML_FLAG_S)
5105            else if (inst->flags == DRCUML_FLAG_S)
51195106               emit_test_r32_r32(&dst, REG_EDX, REG_EDX);                     // test  edx,edx
51205107            else
51215108            {
r2844r2845
51345121   else if (inst->size == 8)
51355122   {
51365123      /* general case */
5137      emit_push_p64(drcbe, &dst, &src2p);                                    // push  src2p
5138      emit_push_p64(drcbe, &dst, &src1p);                                    // push  src1p
5124      emit_mov_m64_p64(drcbe, &dst, MBD(REG_ESP, 16), &src2p);                  // mov   [esp+16],src2p
5125      emit_mov_m64_p64(drcbe, &dst, MBD(REG_ESP, 8), &src1p);                     // mov   [esp+8],src1p
51395126      if (!compute_hi)
5140         emit_push_imm(&dst, (FPTR)&drcbe->reslo);                           // push  &reslo
5127         emit_mov_m32_imm(&dst, MBD(REG_ESP, 4), (FPTR)&drcbe->reslo);            // mov  [esp+4],&reslo
51415128      else
5142         emit_push_imm(&dst, (FPTR)&drcbe->reshi);                           // push  &reshi
5143      emit_push_imm(&dst, (FPTR)&drcbe->reslo);                              // push  &reslo
5129         emit_mov_m32_imm(&dst, MBD(REG_ESP, 4), (FPTR)&drcbe->reshi);            // push  [esp+4],&reshi
5130      emit_mov_m32_imm(&dst, MBD(REG_ESP, 0), (FPTR)&drcbe->reslo);               // mov   [esp],&reslo
51445131      emit_call(&dst, (x86code *)dmulu);                                    // call  dmulu
5145      emit_add_r32_imm(&dst, REG_ESP, 24);                                 // add   esp,24
51465132      emit_mov_r32_m32(&dst, REG_EAX, MABS((UINT32 *)&drcbe->reslo + 0));            // mov   eax,reslo.lo
51475133      emit_mov_r32_m32(&dst, REG_EDX, MABS((UINT32 *)&drcbe->reslo + 1));            // mov   edx,reslo.hi
51485134      emit_mov_p64_r64(drcbe, &dst, &dstp, REG_EAX, REG_EDX);                     // mov   dstp,edx:eax
5149      if (inst->condflags != 0 && !compute_hi)
5135      if (inst->flags != 0 && !compute_hi)
51505136      {
5151         if (inst->condflags == DRCUML_FLAG_Z)
5137         if (inst->flags == DRCUML_FLAG_Z)
51525138            emit_or_r32_r32(&dst, REG_EDX, REG_EAX);                        // or    edx,eax
5153         else if (inst->condflags == DRCUML_FLAG_S)
5139         else if (inst->flags == DRCUML_FLAG_S)
51545140            emit_test_r32_r32(&dst, REG_EDX, REG_EDX);                        // test  edx,edx
51555141         else
51565142         {
r2844r2845
51625148      }
51635149      if (compute_hi)
51645150      {
5165         if (inst->condflags & DRCUML_FLAG_Z)
5151         if (inst->flags & DRCUML_FLAG_Z)
51665152            emit_or_r32_r32(&dst, REG_EDX, REG_EAX);                        // or    edx,eax
51675153         emit_mov_r32_m32(&dst, REG_EAX, MABS((UINT32 *)&drcbe->reshi + 0));         // mov   eax,reshi.lo
51685154         emit_mov_r32_m32(&dst, REG_ECX, MABS((UINT32 *)&drcbe->reshi + 1));         // mov   ecx,reshi.hi
51695155         emit_mov_p64_r64(drcbe, &dst, &edstp, REG_EAX, REG_ECX);               // mov   edstp,ecx:eax
5170         if (inst->condflags != 0)
5156         if (inst->flags != 0)
51715157         {
5172            if (inst->condflags == DRCUML_FLAG_Z)
5158            if (inst->flags == DRCUML_FLAG_Z)
51735159            {
51745160               emit_or_r32_r32(&dst, REG_EDX, REG_EAX);                     // or    edx,eax
51755161               emit_or_r32_r32(&dst, REG_EDX, REG_ECX);                     // or    edx,ecx
51765162            }
5177            else if (inst->condflags == DRCUML_FLAG_S)
5163            else if (inst->flags == DRCUML_FLAG_S)
51785164               emit_test_r32_r32(&dst, REG_ECX, REG_ECX);                     // test  ecx,ecx
51795165            else
51805166            {
r2844r2845
52025188
52035189   /* validate instruction */
52045190   assert(inst->size == 4 || inst->size == 8);
5205   assert((inst->condflags & ~(DRCUML_FLAG_Z | DRCUML_FLAG_S)) == 0);
5191   assert_no_condition(inst);
5192   assert_flags(inst, /*DRCUML_FLAG_V |*/ DRCUML_FLAG_Z | DRCUML_FLAG_S);
52065193
52075194   /* normalize parameters */
52085195   param_normalize_4_commutative(drcbe, inst, &dstp, PTYPE_MR, &edstp, PTYPE_MR, &src1p, PTYPE_MRI, &src2p, PTYPE_MRI);
52095196   compute_hi = (dstp.type != edstp.type || dstp.value != edstp.value);
52105197
5211   /* degenerate cases -- convert to a move */
5212   if (src1p.type == DRCUML_PTYPE_IMMEDIATE && src2p.type == DRCUML_PTYPE_IMMEDIATE && inst->condflags == 0)
5213   {
5214      if (inst->size == 4)
5215      {
5216         if (!compute_hi)
5217            return convert_to_mov_imm(drcbe, dst, inst, &dstp, (INT32)src1p.value * (INT32)src2p.value);
5218         else
5219         {
5220            UINT64 result = (INT64)(INT32)src1p.value * (INT64)(INT32)src2p.value;
5221            dst = convert_to_mov_imm(drcbe, dst, inst, &dstp, result & 0xffffffff);
5222            return convert_to_mov_imm(drcbe, dst, inst, &dstp, result >> 32);
5223         }
5224      }
5225      else if (inst->size == 8)
5226      {
5227         UINT64 reslo, reshi;
5228         if (!compute_hi)
5229         {
5230            dmuls(&reslo, &reslo, src1p.value, src2p.value);
5231            return convert_to_mov_imm(drcbe, dst, inst, &dstp, reslo);
5232         }
5233         else
5234         {
5235            dmuls(&reslo, &reshi, src1p.value, src2p.value);
5236            dst = convert_to_mov_imm(drcbe, dst, inst, &dstp, reslo);
5237            return convert_to_mov_imm(drcbe, dst, inst, &dstp, reshi);
5238         }
5239      }
5240   }
5241
52425198   /* 32-bit form */
52435199   if (inst->size == 4)
52445200   {
r2844r2845
52815237      }
52825238
52835239      /* compute flags */
5284      if (inst->condflags != 0)
5240      if (inst->flags != 0)
52855241      {
52865242         if (compute_hi)
52875243         {
5288            if (inst->condflags == DRCUML_FLAG_Z)
5244            if (inst->flags == DRCUML_FLAG_Z)
52895245               emit_or_r32_r32(&dst, REG_EDX, REG_EAX);                     // or    edx,eax
5290            else if (inst->condflags == DRCUML_FLAG_S)
5246            else if (inst->flags == DRCUML_FLAG_S)
52915247               emit_test_r32_r32(&dst, REG_EDX, REG_EDX);                     // test  edx,edx
52925248            else
52935249            {
r2844r2845
53065262   else if (inst->size == 8)
53075263   {
53085264      /* general case */
5309      emit_push_p64(drcbe, &dst, &src2p);                                    // push  src2p
5310      emit_push_p64(drcbe, &dst, &src1p);                                    // push  src1p
5265      emit_mov_m64_p64(drcbe, &dst, MBD(REG_ESP, 16), &src2p);                  // mov   [esp+16],src2p
5266      emit_mov_m64_p64(drcbe, &dst, MBD(REG_ESP, 8), &src1p);                     // mov   [esp+8],src1p
53115267      if (!compute_hi)
5312         emit_push_imm(&dst, (FPTR)&drcbe->reslo);                           // push  &reslo
5268         emit_mov_m32_imm(&dst, MBD(REG_ESP, 4), (FPTR)&drcbe->reslo);            // mov  [esp+4],&reslo
53135269      else
5314         emit_push_imm(&dst, (FPTR)&drcbe->reshi);                           // push  &reshi
5315      emit_push_imm(&dst, (FPTR)&drcbe->reslo);                              // push  &reslo
5270         emit_mov_m32_imm(&dst, MBD(REG_ESP, 4), (FPTR)&drcbe->reshi);            // push  [esp+4],&reshi
5271      emit_mov_m32_imm(&dst, MBD(REG_ESP, 0), (FPTR)&drcbe->reslo);               // mov   [esp],&reslo
53165272      emit_call(&dst, (x86code *)dmuls);                                    // call  dmuls
5317      emit_add_r32_imm(&dst, REG_ESP, 24);                                 // add   esp,24
53185273      emit_mov_r32_m32(&dst, REG_EAX, MABS((UINT32 *)&drcbe->reslo + 0));            // mov   eax,reslo.lo
53195274      emit_mov_r32_m32(&dst, REG_EDX, MABS((UINT32 *)&drcbe->reslo + 1));            // mov   edx,reslo.hi
53205275      emit_mov_p64_r64(drcbe, &dst, &dstp, REG_EAX, REG_EDX);                     // mov   dstp,edx:eax
5321      if (inst->condflags != 0 && !compute_hi)
5276      if (inst->flags != 0 && !compute_hi)
53225277      {
5323         if (inst->condflags == DRCUML_FLAG_Z)
5278         if (inst->flags == DRCUML_FLAG_Z)
53245279            emit_or_r32_r32(&dst, REG_EDX, REG_EAX);                        // or    edx,eax
5325         else if (inst->condflags == DRCUML_FLAG_S)
5280         else if (inst->flags == DRCUML_FLAG_S)
53265281            emit_test_r32_r32(&dst, REG_EDX, REG_EDX);                        // test  edx,edx
53275282         else
53285283         {
r2844r2845
53375292         emit_mov_r32_m32(&dst, REG_EAX, MABS((UINT32 *)&drcbe->reshi + 0));         // mov   eax,reshi.lo
53385293         emit_mov_r32_m32(&dst, REG_EDX, MABS((UINT32 *)&drcbe->reshi + 1));         // mov   edx,reshi.hi
53395294         emit_mov_p64_r64(drcbe, &dst, &edstp, REG_EAX, REG_EDX);               // mov   edstp,edx:eax
5340         if (inst->condflags != 0)
5295         if (inst->flags != 0)
53415296         {
5342            if (inst->condflags == DRCUML_FLAG_Z)
5297            if (inst->flags == DRCUML_FLAG_Z)
53435298            {
53445299               emit_or_r32_r32(&dst, REG_EDX, REG_EAX);                     // or    edx,eax
53455300               emit_or_r32_r32(&dst, REG_EDX, REG_ECX);                     // or    edx,ecx
53465301            }
5347            else if (inst->condflags == DRCUML_FLAG_S)
5302            else if (inst->flags == DRCUML_FLAG_S)
53485303               emit_test_r32_r32(&dst, REG_ECX, REG_ECX);                     // test  ecx,ecx
53495304            else
53505305            {
r2844r2845
53735328
53745329   /* validate instruction */
53755330   assert(inst->size == 4 || inst->size == 8);
5376   assert((inst->condflags & ~(DRCUML_FLAG_Z | DRCUML_FLAG_S)) == 0);
5331   assert_no_condition(inst);
5332   assert_flags(inst, /*DRCUML_FLAG_V |*/ DRCUML_FLAG_Z | DRCUML_FLAG_S);
53775333
53785334   /* normalize parameters */
53795335   param_normalize_4(drcbe, inst, &dstp, PTYPE_MR, &edstp, PTYPE_MR, &src1p, PTYPE_MRI, &src2p, PTYPE_MRI);
53805336   compute_rem = (dstp.type != edstp.type || dstp.value != edstp.value);
53815337
5382   /* degenerate cases -- convert to a move */
5383   if (src1p.type == DRCUML_PTYPE_IMMEDIATE && src2p.type == DRCUML_PTYPE_IMMEDIATE && inst->condflags == 0)
5384   {
5385      if (inst->size == 4)
5386      {
5387         if ((UINT32)src2p.value == 0)
5388            return dst;
5389         if (!compute_rem)
5390            return convert_to_mov_imm(drcbe, dst, inst, &dstp, (UINT32)src1p.value / (UINT32)src2p.value);
5391         else
5392         {
5393            dst = convert_to_mov_imm(drcbe, dst, inst, &dstp, (UINT32)src1p.value / (UINT32)src2p.value);
5394            return convert_to_mov_imm(drcbe, dst, inst, &dstp, (UINT32)src1p.value % (UINT32)src2p.value);
5395         }
5396      }
5397      else if (inst->size == 8)
5398      {
5399         UINT64 reslo, reshi;
5400         if (src2p.value == 0)
5401            return dst;
5402         if (!compute_rem)
5403         {
5404            ddivu(&reslo, &reslo, src1p.value, src2p.value);
5405            return convert_to_mov_imm(drcbe, dst, inst, &dstp, reslo);
5406         }
5407         else
5408         {
5409            ddivu(&reslo, &reshi, src1p.value, src2p.value);
5410            dst = convert_to_mov_imm(drcbe, dst, inst, &dstp, reslo);
5411            return convert_to_mov_imm(drcbe, dst, inst, &dstp, reshi);
5412         }
5413      }
5414   }
5415
54165338   /* 32-bit form */
54175339   if (inst->size == 4)
54185340   {
r2844r2845
54255347      emit_mov_p32_r32(drcbe, &dst, &dstp, REG_EAX);                           // mov   dstp,eax
54265348      if (compute_rem)
54275349         emit_mov_p32_r32(drcbe, &dst, &edstp, REG_EDX);                        // mov   edstp,edx
5350      if (inst->flags != 0)
5351         emit_test_r32_r32(&dst, REG_EAX, REG_EAX);                           // test  eax,eax
54285352      resolve_link(&dst, &skip);                                       // skip:
54295353   }
54305354
r2844r2845
54325356   else if (inst->size == 8)
54335357   {
54345358      /* general case */
5435      emit_push_p64(drcbe, &dst, &src2p);                                    // push  src2p
5436      emit_push_p64(drcbe, &dst, &src1p);                                    // push  src1p
5359      emit_mov_m64_p64(drcbe, &dst, MBD(REG_ESP, 16), &src2p);                  // mov   [esp+16],src2p
5360      emit_mov_m64_p64(drcbe, &dst, MBD(REG_ESP, 8), &src1p);                     // mov   [esp+8],src1p
54375361      if (!compute_rem)
5438         emit_push_imm(&dst, (FPTR)&drcbe->reslo);                           // push  &reslo
5362         emit_mov_m32_imm(&dst, MBD(REG_ESP, 4), (FPTR)&drcbe->reslo);            // mov  [esp+4],&reslo
54395363      else
5440         emit_push_imm(&dst, (FPTR)&drcbe->reshi);                           // push  &reshi
5441      emit_push_imm(&dst, (FPTR)&drcbe->reslo);                              // push  &reslo
5364         emit_mov_m32_imm(&dst, MBD(REG_ESP, 4), (FPTR)&drcbe->reshi);            // push  [esp+4],&reshi
5365      emit_mov_m32_imm(&dst, MBD(REG_ESP, 0), (FPTR)&drcbe->reslo);               // mov   [esp],&reslo
54425366      emit_call(&dst, (x86code *)ddivu);                                    // call  ddivu
5443      emit_add_r32_imm(&dst, REG_ESP, 24);                                 // add   esp,24
54445367      emit_mov_r32_m32(&dst, REG_EAX, MABS((UINT32 *)&drcbe->reslo + 0));            // mov   eax,reslo.lo
54455368      emit_mov_r32_m32(&dst, REG_EDX, MABS((UINT32 *)&drcbe->reslo + 1));            // mov   edx,reslo.hi
54465369      emit_mov_p64_r64(drcbe, &dst, &dstp, REG_EAX, REG_EDX);                     // mov   dstp,edx:eax
5447      if (inst->condflags != 0)
5370      if (inst->flags != 0)
54485371         emit_or_r32_r32(&dst, REG_EAX, REG_EDX);                           // or    eax,edx
54495372      if (compute_rem)
54505373      {
r2844r2845
54695392
54705393   /* validate instruction */
54715394   assert(inst->size == 4 || inst->size == 8);
5472   assert((inst->condflags & ~(DRCUML_FLAG_Z | DRCUML_FLAG_S)) == 0);
5395   assert_no_condition(inst);
5396   assert_flags(inst, /*DRCUML_FLAG_V |*/ DRCUML_FLAG_Z | DRCUML_FLAG_S);
54735397
54745398   /* normalize parameters */
54755399   param_normalize_4(drcbe, inst, &dstp, PTYPE_MR, &edstp, PTYPE_MR, &src1p, PTYPE_MRI, &src2p, PTYPE_MRI);
54765400   compute_rem = (dstp.type != edstp.type || dstp.value != edstp.value);
54775401
5478   /* degenerate cases -- convert to a move */
5479   if (src1p.type == DRCUML_PTYPE_IMMEDIATE && src2p.type == DRCUML_PTYPE_IMMEDIATE && inst->condflags == 0)
5480   {
5481      if (inst->size == 4)
5482      {
5483         if ((INT32)src2p.value == 0)
5484            return dst;
5485         if (!compute_rem)
5486            return convert_to_mov_imm(drcbe, dst, inst, &dstp, (INT32)src1p.value / (INT32)src2p.value);
5487         else
5488         {
5489            dst = convert_to_mov_imm(drcbe, dst, inst, &dstp, (INT32)src1p.value / (INT32)src2p.value);
5490            return convert_to_mov_imm(drcbe, dst, inst, &dstp, (INT32)src1p.value % (INT32)src2p.value);
5491         }
5492      }
5493      else if (inst->size == 8)
5494      {
5495         UINT64 reslo, reshi;
5496         if (src2p.value == 0)
5497            return dst;
5498         if (!compute_rem)
5499         {
5500            ddivs(&reslo, &reslo, src1p.value, src2p.value);
5501            return convert_to_mov_imm(drcbe, dst, inst, &dstp, reslo);
5502         }
5503         else
5504         {
5505            ddivs(&reslo, &reshi, src1p.value, src2p.value);
5506            dst = convert_to_mov_imm(drcbe, dst, inst, &dstp, reslo);
5507            return convert_to_mov_imm(drcbe, dst, inst, &dstp, reshi);
5508         }
5509      }
5510   }
5511
55125402   /* 32-bit form */
55135403   if (inst->size == 4)
55145404   {
r2844r2845
55215411      emit_mov_p32_r32(drcbe, &dst, &dstp, REG_EAX);                           // mov   dstp,eax
55225412      if (compute_rem)
55235413         emit_mov_p32_r32(drcbe, &dst, &edstp, REG_EDX);                        // mov   edstp,edx
5414      if (inst->flags != 0)
5415         emit_test_r32_r32(&dst, REG_EAX, REG_EAX);                           // test  eax,eax
55245416      resolve_link(&dst, &skip);                                       // skip:
55255417   }
55265418
r2844r2845
55285420   else if (inst->size == 8)
55295421   {
55305422      /* general case */
5531      emit_push_p64(drcbe, &dst, &src2p);                                    // push  src2p
5532      emit_push_p64(drcbe, &dst, &src1p);                                    // push  src1p
5423      emit_mov_m64_p64(drcbe, &dst, MBD(REG_ESP, 16), &src2p);                  // mov   [esp+16],src2p
5424      emit_mov_m64_p64(drcbe, &dst, MBD(REG_ESP, 8), &src1p);                     // mov   [esp+8],src1p
55335425      if (!compute_rem)
5534         emit_push_imm(&dst, (FPTR)&drcbe->reslo);                           // push  &reslo
5426         emit_mov_m32_imm(&dst, MBD(REG_ESP, 4), (FPTR)&drcbe->reslo);            // mov  [esp+4],&reslo
55355427      else
5536         emit_push_imm(&dst, (FPTR)&drcbe->reshi);                           // push  &reshi
5537      emit_push_imm(&dst, (FPTR)&drcbe->reslo);                              // push  &reslo
5428         emit_mov_m32_imm(&dst, MBD(REG_ESP, 4), (FPTR)&drcbe->reshi);            // push  [esp+4],&reshi
5429      emit_mov_m32_imm(&dst, MBD(REG_ESP, 0), (FPTR)&drcbe->reslo);               // mov   [esp],&reslo
55385430      emit_call(&dst, (x86code *)ddivs);                                    // call  ddivs
5539      emit_add_r32_imm(&dst, REG_ESP, 24);                                 // add   esp,24
55405431      emit_mov_r32_m32(&dst, REG_EAX, MABS((UINT32 *)&drcbe->reslo + 0));            // mov   eax,reslo.lo
55415432      emit_mov_r32_m32(&dst, REG_EDX, MABS((UINT32 *)&drcbe->reslo + 1));            // mov   edx,reslo.hi
55425433      emit_mov_p64_r64(drcbe, &dst, &dstp, REG_EAX, REG_EDX);                     // mov   dstp,edx:eax
5543      if (inst->condflags != 0)
5434      if (inst->flags != 0)
55445435         emit_or_r32_r32(&dst, REG_EAX, REG_EDX);                           // or    eax,edx
55455436      if (compute_rem)
55465437      {
r2844r2845
55645455
55655456   /* validate instruction */
55665457   assert(inst->size == 4 || inst->size == 8);
5567   assert((inst->condflags & ~(DRCUML_FLAG_Z | DRCUML_FLAG_S)) == 0);
5458   assert_no_condition(inst);
5459   assert_flags(inst, DRCUML_FLAG_Z | DRCUML_FLAG_S);
55685460
55695461   /* normalize parameters */
55705462   param_normalize_3_commutative(drcbe, inst, &dstp, PTYPE_MR, &src1p, PTYPE_MRI, &src2p, PTYPE_MRI);
5463   assert(src1p.type != DRCUML_PTYPE_IMMEDIATE || src2p.type != DRCUML_PTYPE_IMMEDIATE);
55715464
5572   /* degenerate cases -- convert to a move */
5573   if (src1p.type == DRCUML_PTYPE_IMMEDIATE && src2p.type == DRCUML_PTYPE_IMMEDIATE && inst->condflags == 0)
5574      return convert_to_mov_imm(drcbe, dst, inst, &dstp, src1p.value & src2p.value);
5575   if (src2p.type == DRCUML_PTYPE_IMMEDIATE && (src2p.value & size_to_mask[inst->size]) == size_to_mask[inst->size] && inst->condflags == 0)
5576      return convert_to_mov_src1(drcbe, dst, inst, &dstp, &src1p);
5577
55785465   /* pick a target register for the general case */
55795466   dstreg = param_select_register(REG_EAX, &dstp, &src2p);
55805467
r2844r2845
56245511
56255512   /* validate instruction */
56265513   assert(inst->size == 4 || inst->size == 8);
5627   assert((inst->condflags & ~(DRCUML_FLAG_Z | DRCUML_FLAG_S)) == 0);
5514   assert_no_condition(inst);
5515   assert_flags(inst, DRCUML_FLAG_Z | DRCUML_FLAG_S);
56285516
56295517   /* normalize parameters */
56305518   param_normalize_2_commutative(drcbe, inst, &src1p, PTYPE_MRI, &src2p, PTYPE_MRI);
r2844r2845
56765564
56775565   /* validate instruction */
56785566   assert(inst->size == 4 || inst->size == 8);
5679   assert((inst->condflags & ~(DRCUML_FLAG_Z | DRCUML_FLAG_S)) == 0);
5567   assert_no_condition(inst);
5568   assert_flags(inst, DRCUML_FLAG_Z | DRCUML_FLAG_S);
56805569
56815570   /* normalize parameters */
56825571   param_normalize_3_commutative(drcbe, inst, &dstp, PTYPE_MR, &src1p, PTYPE_MRI, &src2p, PTYPE_MRI);
5572   assert(src1p.type != DRCUML_PTYPE_IMMEDIATE || src2p.type != DRCUML_PTYPE_IMMEDIATE);
56835573
5684   /* degenerate cases -- convert to a move */
5685   if (src1p.type == DRCUML_PTYPE_IMMEDIATE && src2p.type == DRCUML_PTYPE_IMMEDIATE && inst->condflags == 0)
5686      return convert_to_mov_imm(drcbe, dst, inst, &dstp, src1p.value | src2p.value);
5687   if (src2p.type == DRCUML_PTYPE_IMMEDIATE && src2p.value == 0 && inst->condflags == 0)
5688      return convert_to_mov_src1(drcbe, dst, inst, &dstp, &src1p);
5689
56905574   /* pick a target register for the general case */
56915575   dstreg = param_select_register(REG_EAX, &dstp, &src2p);
56925576
r2844r2845
57365620
57375621   /* validate instruction */
57385622   assert(inst->size == 4 || inst->size == 8);
5739   assert((inst->condflags & ~(DRCUML_FLAG_Z | DRCUML_FLAG_S)) == 0);
5623   assert_no_condition(inst);
5624   assert_flags(inst, DRCUML_FLAG_Z | DRCUML_FLAG_S);
57405625
57415626   /* normalize parameters */
57425627   param_normalize_3_commutative(drcbe, inst, &dstp, PTYPE_MR, &src1p, PTYPE_MRI, &src2p, PTYPE_MRI);
5628   assert(src1p.type != DRCUML_PTYPE_IMMEDIATE || src2p.type != DRCUML_PTYPE_IMMEDIATE);
57435629
5744   /* degenerate cases -- convert to a move */
5745   if (src1p.type == DRCUML_PTYPE_IMMEDIATE && src2p.type == DRCUML_PTYPE_IMMEDIATE && inst->condflags == 0)
5746      return convert_to_mov_imm(drcbe, dst, inst, &dstp, src1p.value & src2p.value);
5747   if (src2p.type == DRCUML_PTYPE_IMMEDIATE && src2p.value == 0 && inst->condflags == 0)
5748      return convert_to_mov_src1(drcbe, dst, inst, &dstp, &src1p);
5749
57505630   /* pick a target register for the general case */
57515631   dstreg = param_select_register(REG_EAX, &dstp, &src2p);
57525632
r2844r2845
57965676
57975677   /* validate instruction */
57985678   assert(inst->size == 4 || inst->size == 8);
5799   assert(inst->condflags == 0);
5679   assert_no_condition(inst);
5680   assert_flags(inst, /*DRCUML_FLAG_Z | DRCUML_FLAG_S*/0);
58005681
58015682   /* normalize parameters */
58025683   param_normalize_2(drcbe, inst, &dstp, PTYPE_MR, &srcp, PTYPE_MRI);
5684   assert(srcp.type != DRCUML_PTYPE_IMMEDIATE);
58035685
5804   /* degenerate cases -- convert to a move */
5805   if (srcp.type == DRCUML_PTYPE_IMMEDIATE && inst->condflags == 0 && inst->size == 4)
5806      return convert_to_mov_imm(drcbe, dst, inst, &dstp, count_leading_zeros(srcp.value));
5807
58085686   /* pick a target register for the general case */
5809   dstreg = param_select_register(REG_EAX, &dstp, &srcp);
5687   dstreg = param_select_register(REG_EAX, &dstp, NULL);
58105688
58115689   /* 32-bit form */
58125690   if (inst->size == 4)
r2844r2845
58495727
58505728   /* validate instruction */
58515729   assert(inst->size == 4 || inst->size == 8);
5852   assert(inst->condflags == 0);
5730   assert_no_condition(inst);
5731   assert_flags(inst, /*DRCUML_FLAG_Z | DRCUML_FLAG_S*/0);
58535732
58545733   /* normalize parameters */
58555734   param_normalize_2(drcbe, inst, &dstp, PTYPE_MR, &srcp, PTYPE_MRI);
5735   assert(srcp.type != DRCUML_PTYPE_IMMEDIATE);
58565736
5857   /* degenerate cases -- convert to a move */
5858   if (srcp.type == DRCUML_PTYPE_IMMEDIATE && inst->condflags == 0)
5859   {
5860      if (inst->size == 4)
5861         return convert_to_mov_imm(drcbe, dst, inst, &dstp, FLIPENDIAN_INT32(srcp.value));
5862      else if (inst->size == 8)
5863         return convert_to_mov_imm(drcbe, dst, inst, &dstp, FLIPENDIAN_INT64(srcp.value));
5864   }
5865
58665737   /* pick a target register for the general case */
5867   dstreg = param_select_register(REG_EAX, &dstp, &srcp);
5738   dstreg = param_select_register(REG_EAX, &dstp, NULL);
58685739
58695740   /* 32-bit form */
58705741   if (inst->size == 4)
r2844r2845
58975768
58985769   /* validate instruction */
58995770   assert(inst->size == 4 || inst->size == 8);
5900   assert((inst->condflags & ~(DRCUML_FLAG_Z | DRCUML_FLAG_S)) == 0);
5771   assert_no_condition(inst);
5772   assert_flags(inst, DRCUML_FLAG_C | DRCUML_FLAG_Z | DRCUML_FLAG_S);
59015773
59025774   /* normalize parameters */
59035775   param_normalize_3(drcbe, inst, &dstp, PTYPE_MR, &src1p, PTYPE_MRI, &src2p, PTYPE_MRI);
5776   assert(src1p.type != DRCUML_PTYPE_IMMEDIATE || src2p.type != DRCUML_PTYPE_IMMEDIATE);
59045777
5905   /* degenerate cases -- convert to a move */
5906   if (src1p.type == DRCUML_PTYPE_IMMEDIATE && src2p.type == DRCUML_PTYPE_IMMEDIATE && inst->condflags == 0)
5907      return convert_to_mov_imm(drcbe, dst, inst, &dstp, src1p.value << src2p.value);
5908   if (src2p.type == DRCUML_PTYPE_IMMEDIATE && src2p.value == 0 && inst->condflags == 0)
5909      return convert_to_mov_src1(drcbe, dst, inst, &dstp, &src1p);
5910
59115778   /* pick a target register for the general case */
59125779   dstreg = param_select_register(REG_EAX, &dstp, &src2p);
59135780
r2844r2845
59505817
59515818   /* validate instruction */
59525819   assert(inst->size == 4 || inst->size == 8);
5953   assert((inst->condflags & ~(DRCUML_FLAG_Z | DRCUML_FLAG_S)) == 0);
5820   assert_no_condition(inst);
5821   assert_flags(inst, DRCUML_FLAG_C | DRCUML_FLAG_Z | DRCUML_FLAG_S);
59545822
59555823   /* normalize parameters */
59565824   param_normalize_3(drcbe, inst, &dstp, PTYPE_MR, &src1p, PTYPE_MRI, &src2p, PTYPE_MRI);
5825   assert(src1p.type != DRCUML_PTYPE_IMMEDIATE || src2p.type != DRCUML_PTYPE_IMMEDIATE);
59575826
5958   /* degenerate cases -- convert to a move */
5959   if (src1p.type == DRCUML_PTYPE_IMMEDIATE && src2p.type == DRCUML_PTYPE_IMMEDIATE && inst->condflags == 0)
5960      return convert_to_mov_imm(drcbe, dst, inst, &dstp, (UINT64)src1p.value >> src2p.value);
5961   if (src2p.type == DRCUML_PTYPE_IMMEDIATE && src2p.value == 0 && inst->condflags == 0)
5962      return convert_to_mov_src1(drcbe, dst, inst, &dstp, &src1p);
5963
59645827   /* pick a target register for the general case */
59655828   dstreg = param_select_register(REG_EAX, &dstp, &src2p);
59665829
r2844r2845
60035866
60045867   /* validate instruction */
60055868   assert(inst->size == 4 || inst->size == 8);
6006   assert((inst->condflags & ~(DRCUML_FLAG_Z | DRCUML_FLAG_S)) == 0);
5869   assert_no_condition(inst);
5870   assert_flags(inst, DRCUML_FLAG_C | DRCUML_FLAG_Z | DRCUML_FLAG_S);
60075871
60085872   /* normalize parameters */
60095873   param_normalize_3(drcbe, inst, &dstp, PTYPE_MR, &src1p, PTYPE_MRI, &src2p, PTYPE_MRI);
5874   assert(src1p.type != DRCUML_PTYPE_IMMEDIATE || src2p.type != DRCUML_PTYPE_IMMEDIATE);
60105875
6011   /* degenerate cases -- convert to a move */
6012   if (src1p.type == DRCUML_PTYPE_IMMEDIATE && src2p.type == DRCUML_PTYPE_IMMEDIATE && inst->condflags == 0)
6013   {
6014      if (inst->size == 4)
6015         return convert_to_mov_imm(drcbe, dst, inst, &dstp, (INT32)src1p.value >> src2p.value);
6016      else if (inst->size == 8)
6017         return convert_to_mov_imm(drcbe, dst, inst, &dstp, (INT64)src1p.value >> src2p.value);
6018   }
6019   if (src2p.type == DRCUML_PTYPE_IMMEDIATE && src2p.value == 0 && inst->condflags == 0)
6020      return convert_to_mov_src1(drcbe, dst, inst, &dstp, &src1p);
6021
60225876   /* pick a target register for the general case */
60235877   dstreg = param_select_register(REG_EAX, &dstp, &src2p);
60245878
r2844r2845
60615915
60625916   /* validate instruction */
60635917   assert(inst->size == 4 || inst->size == 8);
6064   assert((inst->condflags & ~(DRCUML_FLAG_Z | DRCUML_FLAG_S)) == 0);
5918   assert_no_condition(inst);
5919   assert_flags(inst, DRCUML_FLAG_C | DRCUML_FLAG_Z | DRCUML_FLAG_S);
60655920
60665921   /* normalize parameters */
60675922   param_normalize_3(drcbe, inst, &dstp, PTYPE_MR, &src1p, PTYPE_MRI, &src2p, PTYPE_MRI);
5923   assert(src1p.type != DRCUML_PTYPE_IMMEDIATE || src2p.type != DRCUML_PTYPE_IMMEDIATE);
60685924
6069   /* degenerate cases -- convert to a move */
6070   if (src1p.type == DRCUML_PTYPE_IMMEDIATE && src2p.type == DRCUML_PTYPE_IMMEDIATE && inst->condflags == 0)
6071      return convert_to_mov_imm(drcbe, dst, inst, &dstp, (UINT64)src1p.value >> src2p.value);
6072   if (src2p.type == DRCUML_PTYPE_IMMEDIATE && src2p.value == 0 && inst->condflags == 0)
6073      return convert_to_mov_src1(drcbe, dst, inst, &dstp, &src1p);
6074
60755925   /* pick a target register for the general case */
60765926   dstreg = param_select_register(REG_EAX, &dstp, &src2p);
60775927
r2844r2845
61145964
61155965   /* validate instruction */
61165966   assert(inst->size == 4 || inst->size == 8);
6117   assert((inst->condflags & ~(DRCUML_FLAG_Z | DRCUML_FLAG_S)) == 0);
5967   assert_no_condition(inst);
5968   assert_flags(inst, DRCUML_FLAG_C | DRCUML_FLAG_Z | DRCUML_FLAG_S);
61185969
61195970   /* normalize parameters */
61205971   param_normalize_3(drcbe, inst, &dstp, PTYPE_MR, &src1p, PTYPE_MRI, &src2p, PTYPE_MRI);
5972   assert(src1p.type != DRCUML_PTYPE_IMMEDIATE || src2p.type != DRCUML_PTYPE_IMMEDIATE);
61215973
6122   /* degenerate cases -- convert to a move */
6123   if (src1p.type == DRCUML_PTYPE_IMMEDIATE && src2p.type == DRCUML_PTYPE_IMMEDIATE && inst->condflags == 0)
6124      return convert_to_mov_imm(drcbe, dst, inst, &dstp, (UINT64)src1p.value >> src2p.value);
6125   if (src2p.type == DRCUML_PTYPE_IMMEDIATE && src2p.value == 0 && inst->condflags == 0)
6126      return convert_to_mov_src1(drcbe, dst, inst, &dstp, &src1p);
6127
61285974   /* pick a target register for the general case */
61295975   dstreg = param_select_register(REG_EAX, &dstp, &src2p);
61305976
r2844r2845
61676013
61686014   /* validate instruction */
61696015   assert(inst->size == 4 || inst->size == 8);
6170   assert((inst->condflags & ~(DRCUML_FLAG_Z | DRCUML_FLAG_S)) == 0);
6016   assert_no_condition(inst);
6017   assert_flags(inst, DRCUML_FLAG_C | DRCUML_FLAG_Z | DRCUML_FLAG_S);
61716018
61726019   /* normalize parameters */
61736020   param_normalize_3(drcbe, inst, &dstp, PTYPE_MR, &src1p, PTYPE_MRI, &src2p, PTYPE_MRI);
61746021
6175   /* degenerate cases -- convert to a move */
6176   if (src1p.type == DRCUML_PTYPE_IMMEDIATE && src2p.type == DRCUML_PTYPE_IMMEDIATE && inst->condflags == 0)
6177      return convert_to_mov_imm(drcbe, dst, inst, &dstp, (UINT64)src1p.value >> src2p.value);
6178   if (src2p.type == DRCUML_PTYPE_IMMEDIATE && src2p.value == 0 && inst->condflags == 0)
6179      return convert_to_mov_src1(drcbe, dst, inst, &dstp, &src1p);
6180
61816022   /* pick a target register for the general case */
61826023   dstreg = param_select_register(REG_EAX, &dstp, &src2p);
61836024
r2844r2845
61916032      /* general case */
61926033      else
61936034      {
6194         emit_mov_r32_p32(drcbe, &dst, dstreg, &src1p);                        // mov   dstreg,src1p
6035         emit_mov_r32_p32_keepflags(drcbe, &dst, dstreg, &src1p);               // mov   dstreg,src1p
61956036         emit_rcl_r32_p32(drcbe, &dst, dstreg, &src2p, inst);                  // rcl   dstreg,src2p
61966037         emit_mov_p32_r32(drcbe, &dst, &dstp, dstreg);                        // mov   dstp,dstreg
61976038      }
r2844r2845
62016042   else if (inst->size == 8)
62026043   {
62036044      /* general case */
6204      emit_mov_r64_p64(drcbe, &dst, dstreg, REG_EDX, &src1p);                     // mov   dstreg:dstp,[src1p]
6045      emit_mov_r64_p64_keepflags(drcbe, &dst, dstreg, REG_EDX, &src1p);            // mov   dstreg:dstp,[src1p]
62056046      emit_rcl_r64_p64(drcbe, &dst, dstreg, REG_EDX, &src2p, inst);               // rcl   dstreg:dstp,src2p
62066047      emit_mov_p64_r64(drcbe, &dst, &dstp, dstreg, REG_EDX);                     // mov   dstp,dstreg:eax
62076048   }
r2844r2845
62206061
62216062   /* validate instruction */
62226063   assert(inst->size == 4 || inst->size == 8);
6223   assert((inst->condflags & ~(DRCUML_FLAG_Z | DRCUML_FLAG_S)) == 0);
6064   assert_no_condition(inst);
6065   assert_flags(inst, DRCUML_FLAG_C | DRCUML_FLAG_Z | DRCUML_FLAG_S);
62246066
62256067   /* normalize parameters */
62266068   param_normalize_3(drcbe, inst, &dstp, PTYPE_MR, &src1p, PTYPE_MRI, &src2p, PTYPE_MRI);
62276069
6228   /* degenerate cases -- convert to a move */
6229   if (src1p.type == DRCUML_PTYPE_IMMEDIATE && src2p.type == DRCUML_PTYPE_IMMEDIATE && inst->condflags == 0)
6230      return convert_to_mov_imm(drcbe, dst, inst, &dstp, (UINT64)src1p.value >> src2p.value);
6231   if (src2p.type == DRCUML_PTYPE_IMMEDIATE && src2p.value == 0 && inst->condflags == 0)
6232      return convert_to_mov_src1(drcbe, dst, inst, &dstp, &src1p);
6233
62346070   /* pick a target register for the general case */
62356071   dstreg = param_select_register(REG_EAX, &dstp, &src2p);
62366072
r2844r2845
62446080      /* general case */
62456081      else
62466082      {
6247         emit_mov_r32_p32(drcbe, &dst, dstreg, &src1p);                        // mov   dstreg,src1p
6083         emit_mov_r32_p32_keepflags(drcbe, &dst, dstreg, &src1p);               // mov   dstreg,src1p
62486084         emit_rcr_r32_p32(drcbe, &dst, dstreg, &src2p, inst);                  // rcr   dstreg,src2p
62496085         emit_mov_p32_r32(drcbe, &dst, &dstp, dstreg);                        // mov   dstp,dstreg
62506086      }
r2844r2845
62546090   else if (inst->size == 8)
62556091   {
62566092      /* general case */
6257      emit_mov_r64_p64(drcbe, &dst, dstreg, REG_EDX, &src1p);                     // mov   dstreg:dstp,[src1p]
6093      emit_mov_r64_p64_keepflags(drcbe, &dst, dstreg, REG_EDX, &src1p);            // mov   dstreg:dstp,[src1p]
62586094      emit_rcr_r64_p64(drcbe, &dst, dstreg, REG_EDX, &src2p, inst);               // rcr   dstreg:dstp,src2p
62596095      emit_mov_p64_r64(drcbe, &dst, &dstp, dstreg, REG_EDX);                     // mov   dstp,dstreg:eax
62606096   }
r2844r2845
62776113
62786114   /* validate instruction */
62796115   assert(inst->size == 4 || inst->size == 8);
6280   assert(inst->condflags == DRCUML_COND_ALWAYS);
6116   assert_no_condition(inst);
6117   assert_no_flags(inst);
62816118
62826119   /* normalize parameters */
62836120   param_normalize_3(drcbe, inst, &dstp, PTYPE_MF, &basep, PTYPE_M, &indp, PTYPE_MRI);
r2844r2845
63186155
63196156   /* validate instruction */
63206157   assert(inst->size == 4 || inst->size == 8);
6321   assert(inst->condflags == DRCUML_COND_ALWAYS);
6158   assert_no_condition(inst);
6159   assert_no_flags(inst);
63226160
63236161   /* normalize parameters */
63246162   param_normalize_3(drcbe, inst, &basep, PTYPE_M, &indp, PTYPE_MRI, &srcp, PTYPE_MF);
r2844r2845
63596197
63606198   /* validate instruction */
63616199   assert(inst->size == 4 || inst->size == 8);
6362   assert(inst->condflags == DRCUML_COND_ALWAYS);
6200   assert_no_condition(inst);
6201   assert_no_flags(inst);
63636202
63646203   /* normalize parameters */
63656204   param_normalize_3(drcbe, inst, &dstp, PTYPE_MF, &addrp, PTYPE_MRI, &spacep, PTYPE_I);
63666205
63676206   /* set up a call to the read dword/qword handler */
6368   emit_push_p32(drcbe, &dst, &addrp);                                       // push   addrp
6207   emit_mov_m32_p32(drcbe, &dst, MBD(REG_ESP, 0), &addrp);                        // mov    [esp],addrp
63696208   if (inst->size == 4)
63706209      emit_call(&dst, (x86code *)active_address_space[spacep.value].accessors->read_dword);// call   read_dword
63716210   else if (inst->size == 8)
63726211      emit_call(&dst, (x86code *)active_address_space[spacep.value].accessors->read_qword);// call   read_qword
6373   emit_add_r32_imm(&dst, REG_ESP, 4);                                       // add    esp,4
63746212
63756213   /* store result */
63766214   if (inst->size == 4)
r2844r2845
63926230
63936231   /* validate instruction */
63946232   assert(inst->size == 4 || inst->size == 8);
6395   assert(inst->condflags == DRCUML_COND_ALWAYS);
6233   assert_no_condition(inst);
6234   assert_no_flags(inst);
63966235
63976236   /* normalize parameters */
63986237   param_normalize_3(drcbe, inst, &addrp, PTYPE_MRI, &srcp, PTYPE_MF, &spacep, PTYPE_I);
63996238
64006239   /* set up a call to the write dword/qword handler */
64016240   if (inst->size == 4)
6402      emit_push_p32(drcbe, &dst, &srcp);                                    // push   srcp
6241      emit_mov_m32_p32(drcbe, &dst, MBD(REG_ESP, 4), &srcp);                     // mov    [esp+4],srcp
64036242   else if (inst->size == 8)
6404      emit_push_p64(drcbe, &dst, &srcp);                                    // push   srcp
6405   emit_push_p32(drcbe, &dst, &addrp);                                       // push   addrp
6243      emit_mov_m64_p64(drcbe, &dst, MBD(REG_ESP, 4), &srcp);                     // mov    [esp+4],srcp
6244   emit_mov_m32_p32(drcbe, &dst, MBD(REG_ESP, 0), &addrp);                        // mov    [esp],addrp
64066245   if (inst->size == 4)
64076246      emit_call(&dst, (x86code *)active_address_space[spacep.value].accessors->write_dword);// call   write_dword
64086247   else if (inst->size == 8)
64096248      emit_call(&dst, (x86code *)active_address_space[spacep.value].accessors->write_qword);// call   write_qword
6410   emit_add_r32_imm(&dst, REG_ESP, 4 + inst->size);                           // add    esp,8
64116249
64126250   return dst;
64136251}
r2844r2845
64246262
64256263   /* validate instruction */
64266264   assert(inst->size == 4 || inst->size == 8);
6427   assert(inst->condflags == DRCUML_COND_ALWAYS || (inst->condflags >= DRCUML_COND_Z && inst->condflags < DRCUML_COND_MAX));
6265   assert_any_condition(inst);
6266   assert_no_flags(inst);
64286267
64296268   /* normalize parameters */
64306269   param_normalize_2(drcbe, inst, &dstp, PTYPE_MF, &srcp, PTYPE_MF);
64316270
64326271   /* always start with a jmp */
6433   if (inst->condflags != DRCUML_COND_ALWAYS)
6434      emit_jcc_short_link(&dst, X86_NOT_CONDITION(inst->condflags), &skip);         // jcc   skip
6272   if (inst->condition != DRCUML_COND_ALWAYS)
6273      emit_jcc_short_link(&dst, X86_NOT_CONDITION(inst->condition), &skip);         // jcc   skip
64356274
64366275   /* general case */
64376276   emit_mov_r32_m32(&dst, REG_EAX, MABS(srcp.value));                           // mov   eax,[srcp]
r2844r2845
64586297
64596298   /* validate instruction */
64606299   assert(inst->size == 4 || inst->size == 8);
6461   assert(inst->condflags == DRCUML_COND_ALWAYS);
6300   assert_no_condition(inst);
6301   assert_no_flags(inst);
64626302
64636303   /* normalize parameters */
64646304   param_normalize_4(drcbe, inst, &dstp, PTYPE_MR, &srcp, PTYPE_MF, &sizep, PTYPE_I, &roundp, PTYPE_I);
r2844r2845
65316371
65326372   /* validate instruction */
65336373   assert(inst->size == 4 || inst->size == 8);
6534   assert(inst->condflags == DRCUML_COND_ALWAYS);
6374   assert_no_condition(inst);
6375   assert_no_flags(inst);
65356376
65366377   /* normalize parameters */
65376378   param_normalize_3(drcbe, inst, &dstp, PTYPE_MF, &srcp, PTYPE_MRI, &sizep, PTYPE_I);
r2844r2845
65876428
65886429   /* validate instruction */
65896430   assert(inst->size == 4 || inst->size == 8);
6590   assert(inst->condflags == DRCUML_COND_ALWAYS);
6431   assert_no_condition(inst);
6432   assert_no_flags(inst);
65916433
65926434   /* normalize parameters */
65936435   param_normalize_3(drcbe, inst, &dstp, PTYPE_MF, &srcp, PTYPE_MF, &sizep, PTYPE_I);
r2844r2845
66136455
66146456   /* validate instruction */
66156457   assert(inst->size == 8);
6616   assert(inst->condflags == DRCUML_COND_ALWAYS);
6458   assert_no_condition(inst);
6459   assert_no_flags(inst);
66176460
66186461   /* normalize parameters */
66196462   param_normalize_2(drcbe, inst, &dstp, PTYPE_MF, &srcp, PTYPE_MF);
r2844r2845
66376480
66386481   /* validate instruction */
66396482   assert(inst->size == 4 || inst->size == 8);
6640   assert(inst->condflags == DRCUML_COND_ALWAYS);
6483   assert_no_condition(inst);
6484   assert_no_flags(inst);
66416485
66426486   /* normalize parameters */
66436487   param_normalize_3(drcbe, inst, &dstp, PTYPE_MF, &src1p, PTYPE_MF, &src2p, PTYPE_MF);
r2844r2845
66626506
66636507   /* validate instruction */
66646508   assert(inst->size == 4 || inst->size == 8);
6665   assert(inst->condflags == DRCUML_COND_ALWAYS);
6509   assert_no_condition(inst);
6510   assert_no_flags(inst);
66666511
66676512   /* normalize parameters */
66686513   param_normalize_3(drcbe, inst, &dstp, PTYPE_MF, &src1p, PTYPE_MF, &src2p, PTYPE_MF);
r2844r2845
66876532
66886533   /* validate instruction */
66896534   assert(inst->size == 4 || inst->size == 8);
6690   assert((inst->condflags & ~(DRCUML_FLAG_C | DRCUML_FLAG_Z | DRCUML_FLAG_U)) == 0);
6535   assert_no_condition(inst);
6536   assert_flags(inst, DRCUML_FLAG_C | DRCUML_FLAG_Z | DRCUML_FLAG_U);
66916537
66926538   /* normalize parameters */
66936539   param_normalize_2(drcbe, inst, &src1p, PTYPE_MF, &src2p, PTYPE_MF);
r2844r2845
67136559
67146560   /* validate instruction */
67156561   assert(inst->size == 4 || inst->size == 8);
6716   assert(inst->condflags == DRCUML_COND_ALWAYS);
6562   assert_no_condition(inst);
6563   assert_no_flags(inst);
67176564
67186565   /* normalize parameters */
67196566   param_normalize_3(drcbe, inst, &dstp, PTYPE_MF, &src1p, PTYPE_MF, &src2p, PTYPE_MF);
r2844r2845
67386585
67396586   /* validate instruction */
67406587   assert(inst->size == 4 || inst->size == 8);
6741   assert(inst->condflags == DRCUML_COND_ALWAYS);
6588   assert_no_condition(inst);
6589   assert_no_flags(inst);
67426590
67436591   /* normalize parameters */
67446592   param_normalize_3(drcbe, inst, &dstp, PTYPE_MF, &src1p, PTYPE_MF, &src2p, PTYPE_MF);
r2844r2845
67636611
67646612   /* validate instruction */
67656613   assert(inst->size == 4 || inst->size == 8);
6766   assert(inst->condflags == DRCUML_COND_ALWAYS);
6614   assert_no_condition(inst);
6615   assert_no_flags(inst);
67676616
67686617   /* normalize parameters */
67696618   param_normalize_2(drcbe, inst, &dstp, PTYPE_MF, &srcp, PTYPE_MF);
r2844r2845
67876636
67886637   /* validate instruction */
67896638   assert(inst->size == 4 || inst->size == 8);
6790   assert(inst->condflags == DRCUML_COND_ALWAYS);
6639   assert_no_condition(inst);
6640   assert_no_flags(inst);
67916641
67926642   /* normalize parameters */
67936643   param_normalize_2(drcbe, inst, &dstp, PTYPE_MF, &srcp, PTYPE_MF);
r2844r2845
68116661
68126662   /* validate instruction */
68136663   assert(inst->size == 4 || inst->size == 8);
6814   assert(inst->condflags == DRCUML_COND_ALWAYS);
6664   assert_no_condition(inst);
6665   assert_no_flags(inst);
68156666
68166667   /* normalize parameters */
68176668   param_normalize_2(drcbe, inst, &dstp, PTYPE_MF, &srcp, PTYPE_MF);
r2844r2845
68356686
68366687   /* validate instruction */
68376688   assert(inst->size == 4 || inst->size == 8);
6838   assert(inst->condflags == DRCUML_COND_ALWAYS);
6689   assert_no_condition(inst);
6690   assert_no_flags(inst);
68396691
68406692   /* normalize parameters */
68416693   param_normalize_2(drcbe, inst, &dstp, PTYPE_MF, &srcp, PTYPE_MF);
r2844r2845
68606712
68616713   /* validate instruction */
68626714   assert(inst->size == 4 || inst->size == 8);
6863   assert(inst->condflags == DRCUML_COND_ALWAYS);
6715   assert_no_condition(inst);
6716   assert_no_flags(inst);
68646717
68656718   /* normalize parameters */
68666719   param_normalize_2(drcbe, inst, &dstp, PTYPE_MF, &srcp, PTYPE_MF);
src/emu/cpu/saturn/sattable.c
r2844r2845
3535static const int sub_left[] ={A,B,C,D, I,I,I,I, B,C,A,C, A,B,C,D};
3636static const int sub_right[]={B,C,A,C, I,I,I,I, A,B,C,D, B,C,A,C};
3737
38void saturn_invalid3( int op1, int op2, int op3 )
38static void saturn_invalid3( int op1, int op2, int op3 )
3939{
4040   logerror( "SATURN#%d invalid opcode %x%x%x at %05x\n",
4141        cpu_getactivecpu(), op1, op2, op3, saturn.pc-3 );
4242}
4343
44void saturn_invalid4( int op1, int op2, int op3, int op4 )
44static void saturn_invalid4( int op1, int op2, int op3, int op4 )
4545{
4646   logerror( "SATURN#%d invalid opcode %x%x%x%x at %05x\n",
4747        cpu_getactivecpu(), op1, op2, op3, op4, saturn.pc-4 );
4848}
4949
50void saturn_invalid5( int op1, int op2, int op3, int op4, int op5 )
50static void saturn_invalid5( int op1, int op2, int op3, int op4, int op5 )
5151{
5252   logerror( "SATURN#%d invalid opcode %x%x%x%x%x at %05x\n",
5353        cpu_getactivecpu(), op1, op2, op3, op4, op5, saturn.pc-5 );
5454}
5555
56void saturn_invalid6( int op1, int op2, int op3, int op4, int op5, int op6 )
56static void saturn_invalid6( int op1, int op2, int op3, int op4, int op5, int op6 )
5757{
5858   logerror( "SATURN#%d invalid opcode %x%x%x%x%x%x at %05x\n",
5959        cpu_getactivecpu(), op1, op2, op3, op4, op5, op6, saturn.pc-6 );
src/emu/cpu/saturn/satops.c
r2844r2845
222222   if (saturn.config&&saturn.config->unconfig) saturn.config->unconfig(Machine, S64_READ_A(C));
223223}
224224
225int monitor_id;
225static int monitor_id;
226226
227227INLINE void saturn_mem_id(void)
228228{
r2844r2845
271271   if (saturn.config&&saturn.config->out) saturn.config->out(Machine, saturn.out);
272272}
273273
274int monitor_in;
274static int monitor_in;
275275
276276INLINE void saturn_in(int reg)
277277{
src/emu/video/v9938.c
r2844r2845
751751   vdp->contReg[reg] = data;
752752}
753753
754 static UINT8 v9938_status_r(void)
754 static UINT8 v9938_status_r(running_machine *machine)
755755   {
756756   int reg;
757757   UINT8 ret;
r2844r2845
785785            if ( (n < 28) || (n > 199) ) vdp.statReg[2] |= 0x20;
786786            else vdp.statReg[2] &= ~0x20;
787787*/
788         if (mame_rand(Machine) & 1) vdp->statReg[2] |= 0x20;
788         if (mame_rand(machine) & 1) vdp->statReg[2] |= 0x20;
789789         else vdp->statReg[2] &= ~0x20;
790790         ret = vdp->statReg[2];
791791         break;
r2844r2845
825825READ8_HANDLER( v9938_0_status_r )
826826{
827827   vdp = &vdps[0];
828   return v9938_status_r();
828   return v9938_status_r(machine);
829829}
830830
831831READ8_HANDLER( v9938_1_status_r )
832832{
833833   vdp = &vdps[1];
834   return v9938_status_r();
834   return v9938_status_r(machine);
835835}
836836
837837/***************************************************************************
src/emu/video/generic.c
r2844r2845
205205    shift values
206206-------------------------------------------------*/
207207
208INLINE void set_color_444(pen_t color, int rshift, int gshift, int bshift, UINT16 data)
208INLINE void set_color_444(running_machine *machine, pen_t color, int rshift, int gshift, int bshift, UINT16 data)
209209{
210   palette_set_color_rgb(Machine, color, pal4bit(data >> rshift), pal4bit(data >> gshift), pal4bit(data >> bshift));
210   palette_set_color_rgb(machine, color, pal4bit(data >> rshift), pal4bit(data >> gshift), pal4bit(data >> bshift));
211211}
212212
213213
r2844r2845
217217    shift values
218218-------------------------------------------------*/
219219
220INLINE void set_color_4444(pen_t color, int ishift, int rshift, int gshift, int bshift, UINT16 data)
220INLINE void set_color_4444(running_machine *machine, pen_t color, int ishift, int rshift, int gshift, int bshift, UINT16 data)
221221{
222222   static const UINT8 ztable[16] =
223223      { 0x0, 0x3, 0x4, 0x5, 0x6, 0x7, 0x8, 0x9, 0xa, 0xb, 0xc, 0xd, 0xe, 0xf, 0x10, 0x11 };
r2844r2845
228228   g = ((data >> gshift) & 15) * i;
229229   b = ((data >> bshift) & 15) * i;
230230
231   palette_set_color_rgb(Machine, color, r, g, b);
231   palette_set_color_rgb(machine, color, r, g, b);
232232}
233233
234234
r2844r2845
238238    shift values
239239-------------------------------------------------*/
240240
241INLINE void set_color_555(pen_t color, int rshift, int gshift, int bshift, UINT16 data)
241INLINE void set_color_555(running_machine *machine, pen_t color, int rshift, int gshift, int bshift, UINT16 data)
242242{
243   palette_set_color_rgb(Machine, color, pal5bit(data >> rshift), pal5bit(data >> gshift), pal5bit(data >> bshift));
243   palette_set_color_rgb(machine, color, pal5bit(data >> rshift), pal5bit(data >> gshift), pal5bit(data >> bshift));
244244}
245245
246246
r2844r2845
250250    shift values
251251-------------------------------------------------*/
252252
253INLINE void set_color_888(pen_t color, int rshift, int gshift, int bshift, UINT32 data)
253INLINE void set_color_888(running_machine *machine, pen_t color, int rshift, int gshift, int bshift, UINT32 data)
254254{
255   palette_set_color_rgb(Machine, color, (data >> rshift) & 0xff, (data >> gshift) & 0xff, (data >> bshift) & 0xff);
255   palette_set_color_rgb(machine, color, (data >> rshift) & 0xff, (data >> gshift) & 0xff, (data >> bshift) & 0xff);
256256}
257257
258258
r2844r2845
448448    updateflip - handle global flipping
449449-------------------------------------------------*/
450450
451static void updateflip(void)
451static void updateflip(running_machine *machine)
452452{
453   int width = video_screen_get_width(Machine->primary_screen);
454   int height = video_screen_get_height(Machine->primary_screen);
455   attoseconds_t period = video_screen_get_frame_period(Machine->primary_screen).attoseconds;
456   rectangle visarea = *video_screen_get_visible_area(Machine->primary_screen);
453   int width = video_screen_get_width(machine->primary_screen);
454   int height = video_screen_get_height(machine->primary_screen);
455   attoseconds_t period = video_screen_get_frame_period(machine->primary_screen).attoseconds;
456   rectangle visarea = *video_screen_get_visible_area(machine->primary_screen);
457457
458458   tilemap_set_flip(ALL_TILEMAPS,(TILEMAP_FLIPX & flip_screen_x) | (TILEMAP_FLIPY & flip_screen_y));
459459
r2844r2845
474474      visarea.max_y = temp;
475475   }
476476
477   video_screen_configure(Machine->primary_screen, width, height, &visarea, period);
477   video_screen_configure(machine->primary_screen, width, height, &visarea, period);
478478}
479479
480480
r2844r2845
515515   if (flip_screen_x != on)
516516   {
517517      flip_screen_x = on;
518      updateflip();
518      updateflip(Machine);
519519   }
520520}
521521
r2844r2845
530530   if (flip_screen_y != on)
531531   {
532532      flip_screen_y = on;
533      updateflip();
533      updateflip(Machine);
534534   }
535535}
536536
r2844r2845
719719WRITE8_HANDLER( paletteram_xxxxBBBBGGGGRRRR_le_w )
720720{
721721   paletteram[offset] = data;
722   set_color_444(offset / 2, 0, 4, 8, paletteram16_le(offset));
722   set_color_444(machine, offset / 2, 0, 4, 8, paletteram16_le(offset));
723723}
724724
725725WRITE8_HANDLER( paletteram_xxxxBBBBGGGGRRRR_be_w )
726726{
727727   paletteram[offset] = data;
728   set_color_444(offset / 2, 0, 4, 8, paletteram16_be(offset));
728   set_color_444(machine, offset / 2, 0, 4, 8, paletteram16_be(offset));
729729}
730730
731731WRITE8_HANDLER( paletteram_xxxxBBBBGGGGRRRR_split1_w )
732732{
733733   paletteram[offset] = data;
734   set_color_444(offset, 0, 4, 8, paletteram16_split(offset));
734   set_color_444(machine, offset, 0, 4, 8, paletteram16_split(offset));
735735}
736736
737737WRITE8_HANDLER( paletteram_xxxxBBBBGGGGRRRR_split2_w )
738738{
739739   paletteram_2[offset] = data;
740   set_color_444(offset, 0, 4, 8, paletteram16_split(offset));
740   set_color_444(machine, offset, 0, 4, 8, paletteram16_split(offset));
741741}
742742
743743WRITE16_HANDLER( paletteram16_xxxxBBBBGGGGRRRR_word_w )
744744{
745745   COMBINE_DATA(&paletteram16[offset]);
746   set_color_444(offset, 0, 4, 8, paletteram16[offset]);
746   set_color_444(machine, offset, 0, 4, 8, paletteram16[offset]);
747747}
748748
749749
r2844r2845
754754WRITE8_HANDLER( paletteram_xxxxBBBBRRRRGGGG_le_w )
755755{
756756   paletteram[offset] = data;
757   set_color_444(offset / 2, 4, 0, 8, paletteram16_le(offset));
757   set_color_444(machine, offset / 2, 4, 0, 8, paletteram16_le(offset));
758758}
759759
760760WRITE8_HANDLER( paletteram_xxxxBBBBRRRRGGGG_be_w )
761761{
762762   paletteram[offset] = data;
763   set_color_444(offset / 2, 4, 0, 8, paletteram16_be(offset));
763   set_color_444(machine, offset / 2, 4, 0, 8, paletteram16_be(offset));
764764}
765765
766766WRITE8_HANDLER( paletteram_xxxxBBBBRRRRGGGG_split1_w )
767767{
768768   paletteram[offset] = data;
769   set_color_444(offset, 4, 0, 8, paletteram16_split(offset));
769   set_color_444(machine, offset, 4, 0, 8, paletteram16_split(offset));
770770}
771771
772772WRITE8_HANDLER( paletteram_xxxxBBBBRRRRGGGG_split2_w )
773773{
774774   paletteram_2[offset] = data;
775   set_color_444(offset, 4, 0, 8, paletteram16_split(offset));
775   set_color_444(machine, offset, 4, 0, 8, paletteram16_split(offset));
776776}
777777
778778WRITE16_HANDLER( paletteram16_xxxxBBBBRRRRGGGG_word_w )
779779{
780780   COMBINE_DATA(&paletteram16[offset]);
781   set_color_444(offset, 4, 0, 8, paletteram16[offset]);
781   set_color_444(machine, offset, 4, 0, 8, paletteram16[offset]);
782782}
783783
784784
r2844r2845
789789WRITE8_HANDLER( paletteram_xxxxRRRRBBBBGGGG_split1_w )
790790{
791791   paletteram[offset] = data;
792   set_color_444(offset, 8, 0, 4, paletteram16_split(offset));
792   set_color_444(machine, offset, 8, 0, 4, paletteram16_split(offset));
793793}
794794
795795WRITE8_HANDLER( paletteram_xxxxRRRRBBBBGGGG_split2_w )
796796{
797797   paletteram_2[offset] = data;
798   set_color_444(offset, 8, 0, 4, paletteram16_split(offset));
798   set_color_444(machine, offset, 8, 0, 4, paletteram16_split(offset));
799799}
800800
801801
r2844r2845
806806WRITE8_HANDLER( paletteram_xxxxRRRRGGGGBBBB_le_w )
807807{
808808   paletteram[offset] = data;
809   set_color_444(offset / 2, 8, 4, 0, paletteram16_le(offset));
809   set_color_444(machine, offset / 2, 8, 4, 0, paletteram16_le(offset));
810810}
811811
812812WRITE8_HANDLER( paletteram_xxxxRRRRGGGGBBBB_be_w )
813813{
814814   paletteram[offset] = data;
815   set_color_444(offset / 2, 8, 4, 0, paletteram16_be(offset));
815   set_color_444(machine, offset / 2, 8, 4, 0, paletteram16_be(offset));
816816}
817817
818818WRITE16_HANDLER( paletteram16_xxxxRRRRGGGGBBBB_word_w )
819819{
820820   COMBINE_DATA(&paletteram16[offset]);
821   set_color_444(offset, 8, 4, 0, paletteram16[offset]);
821   set_color_444(machine, offset, 8, 4, 0, paletteram16[offset]);
822822}
823823
824824
r2844r2845
829829WRITE8_HANDLER( paletteram_RRRRGGGGBBBBxxxx_be_w )
830830{
831831   paletteram[offset] = data;
832   set_color_444(offset / 2, 12, 8, 4, paletteram16_be(offset));
832   set_color_444(machine, offset / 2, 12, 8, 4, paletteram16_be(offset));
833833}
834834
835835WRITE8_HANDLER( paletteram_RRRRGGGGBBBBxxxx_split1_w )
836836{
837837   paletteram[offset] = data;
838   set_color_444(offset, 12, 8, 4, paletteram16_split(offset));
838   set_color_444(machine, offset, 12, 8, 4, paletteram16_split(offset));
839839}
840840
841841WRITE8_HANDLER( paletteram_RRRRGGGGBBBBxxxx_split2_w )
842842{
843843   paletteram_2[offset] = data;
844   set_color_444(offset, 12, 8, 4, paletteram16_split(offset));
844   set_color_444(machine, offset, 12, 8, 4, paletteram16_split(offset));
845845}
846846
847847WRITE16_HANDLER( paletteram16_RRRRGGGGBBBBxxxx_word_w )
848848{
849849   COMBINE_DATA(&paletteram16[offset]);
850   set_color_444(offset, 12, 8, 4, paletteram16[offset]);
850   set_color_444(machine, offset, 12, 8, 4, paletteram16[offset]);
851851}
852852
853853
r2844r2845
863863WRITE8_HANDLER( paletteram_xBBBBBGGGGGRRRRR_le_w )
864864{
865865   paletteram[offset] = data;
866   set_color_555(offset / 2, 0, 5, 10, paletteram16_le(offset));
866   set_color_555(machine, offset / 2, 0, 5, 10, paletteram16_le(offset));
867867}
868868
869869WRITE8_HANDLER( paletteram_xBBBBBGGGGGRRRRR_be_w )
870870{
871871   paletteram[offset] = data;
872   set_color_555(offset / 2, 0, 5, 10, paletteram16_be(offset));
872   set_color_555(machine, offset / 2, 0, 5, 10, paletteram16_be(offset));
873873}
874874
875875WRITE8_HANDLER( paletteram_xBBBBBGGGGGRRRRR_split1_w )
876876{
877877   paletteram[offset] = data;
878   set_color_555(offset, 0, 5, 10, paletteram16_split(offset));
878   set_color_555(machine, offset, 0, 5, 10, paletteram16_split(offset));
879879}
880880
881881WRITE8_HANDLER( paletteram_xBBBBBGGGGGRRRRR_split2_w )
882882{
883883   paletteram_2[offset] = data;
884   set_color_555(offset, 0, 5, 10, paletteram16_split(offset));
884   set_color_555(machine, offset, 0, 5, 10, paletteram16_split(offset));
885885}
886886
887887WRITE16_HANDLER( paletteram16_xBBBBBGGGGGRRRRR_word_w )
888888{
889889   COMBINE_DATA(&paletteram16[offset]);
890   set_color_555(offset, 0, 5, 10, paletteram16[offset]);
890   set_color_555(machine, offset, 0, 5, 10, paletteram16[offset]);
891891}
892892
893893
r2844r2845
898898WRITE8_HANDLER( paletteram_xBBBBBRRRRRGGGGG_split1_w )
899899{
900900   paletteram[offset] = data;
901   set_color_555(offset, 5, 0, 10, paletteram16_split(offset));
901   set_color_555(machine, offset, 5, 0, 10, paletteram16_split(offset));
902902}
903903
904904WRITE8_HANDLER( paletteram_xBBBBBRRRRRGGGGG_split2_w )
905905{
906906   paletteram_2[offset] = data;
907   set_color_555(offset, 5, 0, 10, paletteram16_split(offset));
907   set_color_555(machine, offset, 5, 0, 10, paletteram16_split(offset));
908908}
909909
910910
r2844r2845
915915WRITE8_HANDLER( paletteram_xRRRRRGGGGGBBBBB_le_w )
916916{
917917   paletteram[offset] = data;
918   set_color_555(offset / 2, 10, 5, 0, paletteram16_le(offset));
918   set_color_555(machine, offset / 2, 10, 5, 0, paletteram16_le(offset));
919919}
920920
921921WRITE16_HANDLER( paletteram16_xRRRRRGGGGGBBBBB_word_w )
922922{
923923   COMBINE_DATA(&paletteram16[offset]);
924   set_color_555(offset, 10, 5, 0, paletteram16[offset]);
924   set_color_555(machine, offset, 10, 5, 0, paletteram16[offset]);
925925}
926926
927927
r2844r2845
932932WRITE16_HANDLER( paletteram16_xGGGGGRRRRRBBBBB_word_w )
933933{
934934   COMBINE_DATA(&paletteram16[offset]);
935   set_color_555(offset, 5, 10, 0, paletteram16[offset]);
935   set_color_555(machine, offset, 5, 10, 0, paletteram16[offset]);
936936}
937937
938938
r2844r2845
943943WRITE16_HANDLER( paletteram16_xGGGGGBBBBBRRRRR_word_w )
944944{
945945   COMBINE_DATA(&paletteram16[offset]);
946   set_color_555(offset, 0, 10, 5, paletteram16[offset]);
946   set_color_555(machine, offset, 0, 10, 5, paletteram16[offset]);
947947}
948948
949949
r2844r2845
954954WRITE16_HANDLER( paletteram16_GGGGGRRRRRBBBBBx_word_w )
955955{
956956   COMBINE_DATA(&paletteram16[offset]);
957   set_color_555(offset, 6, 11, 1, paletteram16[offset]);
957   set_color_555(machine, offset, 6, 11, 1, paletteram16[offset]);
958958}
959959
960960/*-------------------------------------------------
r2844r2845
964964WRITE16_HANDLER( paletteram16_RRRRRGGGGGBBBBBx_word_w )
965965{
966966   COMBINE_DATA(&paletteram16[offset]);
967   set_color_555(offset, 11, 6, 1, paletteram16[offset]);
967   set_color_555(machine, offset, 11, 6, 1, paletteram16[offset]);
968968}
969969
970970
r2844r2845
994994WRITE16_HANDLER( paletteram16_IIIIRRRRGGGGBBBB_word_w )
995995{
996996   COMBINE_DATA(&paletteram16[offset]);
997   set_color_4444(offset, 12, 8, 4, 0, paletteram16[offset]);
997   set_color_4444(machine, offset, 12, 8, 4, 0, paletteram16[offset]);
998998}
999999
10001000
r2844r2845
10051005WRITE16_HANDLER( paletteram16_RRRRGGGGBBBBIIII_word_w )
10061006{
10071007   COMBINE_DATA(&paletteram16[offset]);
1008   set_color_4444(offset, 0, 12, 8, 4, paletteram16[offset]);
1008   set_color_4444(machine, offset, 0, 12, 8, 4, paletteram16[offset]);
10091009}
10101010
10111011
r2844r2845
10211021WRITE16_HANDLER( paletteram16_xrgb_word_be_w )
10221022{
10231023   COMBINE_DATA(&paletteram16[offset]);
1024   set_color_888(offset / 2, 16, 8, 0, paletteram32_be(offset));
1024   set_color_888(machine, offset / 2, 16, 8, 0, paletteram32_be(offset));
10251025}
10261026
10271027
r2844r2845
10321032WRITE16_HANDLER( paletteram16_xbgr_word_be_w )
10331033{
10341034   COMBINE_DATA(&paletteram16[offset]);
1035   set_color_888(offset / 2, 0, 8, 16, paletteram32_be(offset));
1035   set_color_888(machine, offset / 2, 0, 8, 16, paletteram32_be(offset));
10361036}
src/emu/emuopts.c
r2844r2845
118118
119119   /* input options */
120120   { NULL,                          NULL,        OPTION_HEADER,     "CORE INPUT OPTIONS" },
121   { "coin_lockout;coinlock",       "1",         OPTION_BOOLEAN,    "enable coin lockouts to actually lock out coins" },
121122   { "ctrlr",                       NULL,        0,                 "preconfigure for specified controller" },
122123   { "mouse",                       "0",         OPTION_BOOLEAN,    "enable mouse input" },
123124   { "joystick;joy",                "1",         OPTION_BOOLEAN,    "enable joystick input" },
src/emu/emuopts.h
r2844r2845
110110#define OPTION_VOLUME            "volume"
111111
112112/* core input options */
113#define OPTION_COIN_LOCKOUT         "coin_lockout"
113114#define OPTION_CTRLR            "ctrlr"
114115#define OPTION_MOUSE            "mouse"
115116#define OPTION_JOYSTICK            "joystick"
src/emu/video.h
r2844r2845
267267void video_mng_begin_recording(const device_config *screen, const char *name);
268268void video_mng_end_recording(const device_config *screen);
269269
270int video_avi_is_movie_active(const device_config *screen);
271270void video_avi_begin_recording(const device_config *screen, const char *name);
272271void video_avi_end_recording(const device_config *screen);
273272void video_avi_add_sound(running_machine *machine, const INT16 *sound, int numsamples);
src/emu/inptport.c
r2844r2845
23482348   }
23492349
23502350   /* skip locked-out coin inputs */
2351   if (curstate && field->type >= IPT_COIN1 && field->type <= IPT_COIN8 && coinlockedout[field->type - IPT_COIN1])
2351   if (curstate && field->type >= IPT_COIN1 && field->type <= IPT_COIN8 && coinlockedout[field->type - IPT_COIN1] && options_get_bool(mame_options(), OPTION_COIN_LOCKOUT))
23522352   {
23532353      ui_popup_time(3, "Coinlock disabled %s.", input_field_name(field));
23542354      return FALSE;
r2844r2845
35433543   const char *tag;
35443544
35453545   /* read the mask, index, and defvalue attributes */
3546   tag = xml_get_attribute_string(portnode, "port", NULL);
3546   tag = xml_get_attribute_string(portnode, "tag", NULL);
35473547   mask = xml_get_attribute_int(portnode, "mask", 0);
35483548   defvalue = xml_get_attribute_int(portnode, "defvalue", 0);
35493549
src/emu/machine/53c810.c
r2844r2845
444444   }
445445}
446446
447UINT8 lsi53c810_reg_r(int reg)
447READ8_HANDLER( lsi53c810_reg_r )
448448{
449   logerror("53c810: read reg %d:0x%x (PC=%x)\n", reg, reg, activecpu_get_pc());
450   switch(reg)
449   logerror("53c810: read reg %d:0x%x (PC=%x)\n", offset, offset, activecpu_get_pc());
450   switch(offset)
451451   {
452452      case 0x00:      /* SCNTL0 */
453453         return lsi810.scntl0;
r2844r2845
497497      case 0x35:
498498      case 0x36:
499499      case 0x37:
500         return lsi810.scratch_a[reg % 4];
500         return lsi810.scratch_a[offset % 4];
501501      case 0x39:      /* DIEN */
502502         return lsi810.dien;
503503      case 0x3b:      /* DCNTL */
r2844r2845
516516      case 0x5d:
517517      case 0x5e:
518518      case 0x5f:
519         return lsi810.scratch_b[reg % 4];
519         return lsi810.scratch_b[offset % 4];
520520
521521      default:
522         fatalerror("LSI53C810: reg_r: Unknown reg %02X", reg);
522         fatalerror("LSI53C810: reg_r: Unknown reg %02X", offset);
523523   }
524524
525525   return 0;
526526}
527527
528void lsi53c810_reg_w(running_machine *machine, int reg, UINT8 value)
528WRITE8_HANDLER( lsi53c810_reg_w )
529529{
530   logerror("53c810: %02x to reg %d:0x%x (PC=%x)\n", value, reg, reg, activecpu_get_pc());
531   switch(reg)
530   logerror("53c810: %02x to reg %d:0x%x (PC=%x)\n", data, offset, offset, activecpu_get_pc());
531   switch(offset)
532532   {
533533      case 0x00:      /* SCNTL0 */
534         lsi810.scntl0 = value;
534         lsi810.scntl0 = data;
535535         break;
536536      case 0x01:      /* SCNTL1 */
537         lsi810.scntl1 = value;
537         lsi810.scntl1 = data;
538538         break;
539539      case 0x02:      /* SCNTL2 */
540         lsi810.scntl2 = value;
540         lsi810.scntl2 = data;
541541         break;
542542      case 0x03:      /* SCNTL3 */
543         lsi810.scntl3 = value;
543         lsi810.scntl3 = data;
544544         break;
545545      case 0x04:      /* SCID */
546         lsi810.scid = value;
546         lsi810.scid = data;
547547         break;
548548      case 0x09:      /* SOCL */
549         lsi810.socl = value;
549         lsi810.socl = data;
550550         break;
551551      case 0x0d:      /* SSTAT0 */
552         lsi810.sstat0 = value;
552         lsi810.sstat0 = data;
553553         break;
554554      case 0x0e:      /* SSTAT1 */
555         lsi810.sstat1 = value;
555         lsi810.sstat1 = data;
556556         break;
557557      case 0x0f:      /* SSTAT2 */
558         lsi810.sstat2 = value;
558         lsi810.sstat2 = data;
559559         break;
560560      case 0x10:      /* DSA [7-0] */
561561         lsi810.dsa &= 0xffffff00;
562         lsi810.dsa |= value;
562         lsi810.dsa |= data;
563563         break;
564564      case 0x11:      /* DSA [15-8] */
565565         lsi810.dsa &= 0xffff00ff;
566         lsi810.dsa |= value << 8;
566         lsi810.dsa |= data << 8;
567567         break;
568568      case 0x12:      /* DSA [23-16] */
569569         lsi810.dsa &= 0xff00ffff;
570         lsi810.dsa |= value << 16;
570         lsi810.dsa |= data << 16;
571571         break;
572572      case 0x13:      /* DSA [31-24] */
573573         lsi810.dsa &= 0x00ffffff;
574         lsi810.dsa |= value << 24;
574         lsi810.dsa |= data << 24;
575575         break;
576576      case 0x14:      /* ISTAT */
577         lsi810.istat = value;
577         lsi810.istat = data;
578578         break;
579579      case 0x2c:      /* DSP [7-0] */
580580         lsi810.dsp &= 0xffffff00;
581         lsi810.dsp |= value;
581         lsi810.dsp |= data;
582582         break;
583583      case 0x2d:      /* DSP [15-8] */
584584         lsi810.dsp &= 0xffff00ff;
585         lsi810.dsp |= value << 8;
585         lsi810.dsp |= data << 8;
586586         break;
587587      case 0x2e:      /* DSP [23-16] */
588588         lsi810.dsp &= 0xff00ffff;
589         lsi810.dsp |= value << 16;
589         lsi810.dsp |= data << 16;
590590         break;
591591      case 0x2f:      /* DSP [31-24] */
592592         lsi810.dsp &= 0x00ffffff;
593         lsi810.dsp |= value << 24;
593         lsi810.dsp |= data << 24;
594594         lsi810.halted = 0;
595595         if((lsi810.dmode & 0x1) == 0 && !lsi810.halted) {
596596            dma_exec();
r2844r2845
600600      case 0x35:
601601      case 0x36:
602602      case 0x37:
603         lsi810.scratch_a[reg % 4] = value;
603         lsi810.scratch_a[offset % 4] = data;
604604         break;
605605      case 0x38:      /* DMODE */
606         lsi810.dmode = value;
606         lsi810.dmode = data;
607607         break;
608608      case 0x39:      /* DIEN */
609         lsi810.dien = value;
609         lsi810.dien = data;
610610         break;
611611      case 0x3b:      /* DCNTL */
612         lsi810.dcntl = value;
612         lsi810.dcntl = data;
613613
614614         if(lsi810.dcntl & 0x14 && !lsi810.halted)      /* single-step & start DMA */
615615         {
r2844r2845
630630         }
631631         break;
632632      case 0x40:      /* SIEN0 */
633         lsi810.sien0 = value;
633         lsi810.sien0 = data;
634634         break;
635635      case 0x41:      /* SIEN1 */
636         lsi810.sien1 = value;
636         lsi810.sien1 = data;
637637         break;
638638      case 0x48:      /* STIME0 */
639         lsi810.stime0 = value;
639         lsi810.stime0 = data;
640640         break;
641641      case 0x4a:      /* RESPID */
642         lsi810.respid = value;
642         lsi810.respid = data;
643643         break;
644644      case 0x4d:      /* STEST1 */
645         lsi810.stest1 = value;
645         lsi810.stest1 = data;
646646         break;
647647      case 0x5c:      /* SCRATCH B */
648648      case 0x5d:
649649      case 0x5e:
650650      case 0x5f:
651         lsi810.scratch_b[reg % 4] = value;
651         lsi810.scratch_b[offset % 4] = data;
652652         break;
653653
654654      default:
655         fatalerror("LSI53C810: reg_w: Unknown reg %02X, %02X", reg, value);
655         fatalerror("LSI53C810: reg_w: Unknown reg %02X, %02X", offset, data);
656656   }
657657}
658658
src/emu/machine/53c810.h
r2844r2845
1919
2020extern void *lsi53c810_get_device(int id);
2121
22UINT8 lsi53c810_reg_r(int reg);
23void lsi53c810_reg_w(running_machine *machine, int reg, UINT8 value);
22READ8_HANDLER( lsi53c810_reg_r );
23WRITE8_HANDLER( lsi53c810_reg_w );
2424
2525unsigned lsi53c810_dasm(char *buf, UINT32 pc);
2626
src/emu/machine/68681.c
r2844r2845
22    68681 DUART
33
44    Written by Mariusz Wojcieszek
5
6    Emulation is preliminary, only features required by Touch Master games are implemented
7
8    ToDo:
9    - interrupts other than RXRDY
10    - timer/counter
11    - input port
12    - input port change
13    - output port
14    - output port when used as control signals
15    - MAME device interface
16    - multiple instances
175*/
186
197#include "driver.h"
8#include "68681.h"
209
10#define VERBOSE 0
11#define LOG(x)   do { if (VERBOSE) logerror x; } while (0)
12
13const char* duart68681_reg_read_names[0x10] =
14{
15   "MRA", "SRA", "BRG Test", "RHRA", "IPCR", "ISR", "CTU", "CTL", "MRB", "SRB", "1X/16X Test", "RHRB", "IVR", "Input Ports", "Start Counter", "Stop Counter"
16};
17
18const char* duart68681_reg_write_names[0x10] =
19{
20   "MRA", "CSRA", "CRA", "THRA", "ACR", "IMR", "CRUR", "CTLR", "MRB", "CSRB", "CRB", "THRB", "IVR", "OPCR", "Set OP Bits", "Reset OP Bits"
21};
22
2123#define INT_INPUT_PORT_CHANGE      0x80
2224#define INT_DELTA_BREAK_B         0x40
2325#define INT_RXRDY_FFULLB         0x20
r2844r2845
6668   UINT8 tx_ready;
6769   emu_timer *tx_timer;
6870
69} DUART_68681_CHANNEL;
71} DUART68681_CHANNEL;
7072
7173typedef struct
7274{
73   int   frequency;
75   /* device */
76   const device_config *device;
7477
75   // registers
78   /* config */
79   const duart68681_config *duart_config;
80
81   /* registers */
7682   UINT8 ACR;  /* Auxiliary Control Register */
7783   UINT8 IMR;  /* Interrupt Mask Register */
7884   UINT8 ISR;  /* Interrupt Status Register */
7985   UINT8 IVR;  /* Interrupt Vector Register */
8086   UINT8 OPCR; /* Output Port Conf. Register */
87   UINT8 OPR;  /* Output Port Register */
88   PAIR  CTR;  /* Counter/Timer Preset Value */
8189
82   // state
90   /* state */
8391   UINT8 IP_last_state; /* last state of IP bits */
8492
85   // callbacks
86   UINT8 (*input_port_read)(void);
87   void  (*tx_callback)(int channel, UINT8 data);
88   void  (*irq_handler)(running_machine *machine, int vector);
93   /* timer */
94   emu_timer *duart_timer;
8995
90   DUART_68681_CHANNEL channel[2];
91} DUART_68681;
96   /* UART channels */
97   DUART68681_CHANNEL channel[2];
9298
93static DUART_68681 duart_68681;
99} duart68681_state;
94100
95static void duart_68681_update_interrupts( running_machine *machine )
101INLINE duart68681_state *get_safe_token(const device_config *device)
96102{
97   if ( (duart_68681.ISR & duart_68681.IMR) != 0 )
103   assert(device != NULL);
104   assert(device->token != NULL);
105   assert(device->type == DUART68681);
106
107   return (duart68681_state *)device->token;
108}
109
110static void duart68681_update_interrupts(duart68681_state *duart68681)
111{
112   if ( (duart68681->ISR & duart68681->IMR) != 0 )
98113   {
99      if ( duart_68681.irq_handler )
114      if ( duart68681->duart_config->irq_handler )
100115      {
101         duart_68681.irq_handler( machine, duart_68681.IVR );
116         duart68681->duart_config->irq_handler( duart68681->device, duart68681->IVR );
102117      }
103118   }
104119};
105120
106static void duart_68681_write_MR( int ch, UINT8 data )
121static TIMER_CALLBACK( duart_timer_callback )
107122{
108   if ( duart_68681.channel[ch].MR_ptr == 0 )
123   const device_config *device = ptr;
124   duart68681_state   *duart68681 = get_safe_token(device);
125
126   duart68681->ISR |= INT_COUNTER_READY;
127   duart68681_update_interrupts(duart68681);
128};
129
130static void duart68681_write_MR(duart68681_state *duart68681, int ch, UINT8 data)
131{
132   if ( duart68681->channel[ch].MR_ptr == 0 )
109133   {
110      duart_68681.channel[ch].MR1 = data;
111      // TODO:
112      duart_68681.channel[ch].MR_ptr = 1;
134      duart68681->channel[ch].MR1 = data;
135      duart68681->channel[ch].MR_ptr = 1;
113136   }
114137   else
115138   {
116      duart_68681.channel[ch].MR2 = data;
117      // TODO:
139      duart68681->channel[ch].MR2 = data;
118140   }
119141};
120142
121static void duart_68681_write_CSR(int ch, UINT8 data, UINT8 ACR)
143static void duart68681_write_CSR(duart68681_state *duart68681, int ch, UINT8 data, UINT8 ACR)
122144{
123145   const int baud_rate_ACR_0[] = { 50, 110, 134, 200, 300, 600, 1200, 1050, 2400, 4800, 7200, 9600, 38400, 0, 0, 0 };
124146   const int baud_rate_ACR_1[] = { 75, 110, 134, 150, 300, 600, 1200, 2000, 2400, 4800, 1800, 9600, 19200, 0, 0, 0 };
125147
126   duart_68681.channel[ch].CSR = data;
148   duart68681->channel[ch].CSR = data;
127149
128150   if ( BIT(ACR,7) == 0 )
129151   {
130      duart_68681.channel[ch].baud_rate = baud_rate_ACR_0[data & 0x0f];
152      duart68681->channel[ch].baud_rate = baud_rate_ACR_0[data & 0x0f];
131153   }
132154   else
133155   {
134      duart_68681.channel[ch].baud_rate = baud_rate_ACR_1[data & 0x0f];
156      duart68681->channel[ch].baud_rate = baud_rate_ACR_1[data & 0x0f];
135157   }
136   if ( duart_68681.channel[ch].baud_rate == 0 )
158   if ( duart68681->channel[ch].baud_rate == 0 )
137159   {
138      logerror( "Unsupported transmitter clock: channel %d, clock select = %02x\n", ch, data );
160      LOG(( "Unsupported transmitter clock: channel %d, clock select = %02x\n", ch, data ));
139161   }
140162};
141163
142static void duart_68681_write_CR(int ch, UINT8 data)
164static void duart68681_write_CR(duart68681_state *duart68681, int ch, UINT8 data)
143165{
144   duart_68681.channel[ch].CR = data;
166   duart68681->channel[ch].CR = data;
145167   if ( BIT(data,0) )
146168   {
147      duart_68681.channel[ch].rx_enabled = 1;
169      duart68681->channel[ch].rx_enabled = 1;
148170   }
149171   if ( BIT(data,1) )
150172   {
151      duart_68681.channel[ch].rx_enabled = 0;
152      duart_68681.channel[ch].SR &= ~STATUS_RECEIVER_READY;
173      duart68681->channel[ch].rx_enabled = 0;
174      duart68681->channel[ch].SR &= ~STATUS_RECEIVER_READY;
153175   }
154176
155177   if ( BIT(data,2) )
156178   {
157      duart_68681.channel[ch].tx_enabled = 1;
158      duart_68681.channel[ch].tx_ready = 1;
159      duart_68681.channel[ch].SR |= STATUS_TRANSMITTER_READY;
179      duart68681->channel[ch].tx_enabled = 1;
180      duart68681->channel[ch].tx_ready = 1;
181      duart68681->channel[ch].SR |= STATUS_TRANSMITTER_READY;
160182   }
161183   if ( BIT(data,3) )
162184   {
163      duart_68681.channel[ch].tx_enabled = 0;
164      duart_68681.channel[ch].tx_ready = 0;
165      duart_68681.channel[ch].SR &= ~STATUS_TRANSMITTER_READY;
185      duart68681->channel[ch].tx_enabled = 0;
186      duart68681->channel[ch].tx_ready = 0;
187      duart68681->channel[ch].SR &= ~STATUS_TRANSMITTER_READY;
166188   }
167189
168190   switch( (data >> 4) & 0x07 )
r2844r2845
170192      case 0: /* No command */
171193         break;
172194      case 1: /* Reset MR pointer. Causes the Channel A MR pointer to point to MR1 */
173         duart_68681.channel[ch].MR_ptr = 0;
195         duart68681->channel[ch].MR_ptr = 0;
174196         break;
175197      case 2: /* Reset channel A receiver (disable receiver and flush fifo) */
176         duart_68681.channel[ch].rx_enabled = 0;
177         duart_68681.channel[ch].SR &= ~STATUS_RECEIVER_READY;
178         duart_68681.channel[ch].rx_fifo_read_ptr = 0;
179         duart_68681.channel[ch].rx_fifo_write_ptr = 0;
180         duart_68681.channel[ch].rx_fifo_num = 0;
198         duart68681->channel[ch].rx_enabled = 0;
199         duart68681->channel[ch].SR &= ~STATUS_RECEIVER_READY;
200         duart68681->channel[ch].rx_fifo_read_ptr = 0;
201         duart68681->channel[ch].rx_fifo_write_ptr = 0;
202         duart68681->channel[ch].rx_fifo_num = 0;
181203         break;
182204      case 3: /* Reset channel A transmitter */
183         //TODO:
205         duart68681->channel[ch].tx_enabled = 0;
206         duart68681->channel[ch].SR &= ~STATUS_TRANSMITTER_READY;
207         timer_adjust_oneshot(duart68681->channel[ch].tx_timer, attotime_never, ch);
184208         break;
185209      case 4: /* Reset Error Status */
186         // TODO:
187         duart_68681.channel[ch].SR &= ~(STATUS_RECEIVED_BREAK | STATUS_FRAMING_ERROR | STATUS_PARITY_ERROR | STATUS_OVERRUN_ERROR);
210         duart68681->channel[ch].SR &= ~(STATUS_RECEIVED_BREAK | STATUS_FRAMING_ERROR | STATUS_PARITY_ERROR | STATUS_OVERRUN_ERROR);
188211         break;
212      case 5: /* Reset Channel break change interrupt */
213         if ( ch == 0 )
214         {
215            duart68681->ISR &= ~INT_DELTA_BREAK_A;
216         }
217         else
218         {
219            duart68681->ISR &= ~INT_DELTA_BREAK_B;
220         }
221         duart68681_update_interrupts(duart68681);
222         break;
189223      default:
190         logerror( "68681: Unhandled command (%x) in CR%d\n", ch, (data >> 4) & 0x07 );
224         LOG(( "68681: Unhandled command (%x) in CR%d\n", (data >> 4) & 0x07, ch ));
191225         break;
192226   }
193227};
194228
195static UINT8 duart_68681_read_rx_fifo( running_machine *machine, int ch )
229static UINT8 duart68681_read_rx_fifo(duart68681_state *duart68681, int ch)
196230{
197231   UINT8 r;
198232
199   if ( duart_68681.channel[ch].rx_fifo_num == 0 )
233   if ( duart68681->channel[ch].rx_fifo_num == 0 )
200234   {
201      logerror( "68681: rx fifo underflow\n" );
202      return 0;
235      LOG(( "68681: rx fifo underflow\n" ));
236      return 0x0;
203237   }
204238
205   r = duart_68681.channel[ch].rx_fifo[duart_68681.channel[ch].rx_fifo_read_ptr++];
206   if ( duart_68681.channel[ch].rx_fifo_read_ptr == RX_FIFO_SIZE )
239   r = duart68681->channel[ch].rx_fifo[duart68681->channel[ch].rx_fifo_read_ptr++];
240   if ( duart68681->channel[ch].rx_fifo_read_ptr == RX_FIFO_SIZE )
207241   {
208      duart_68681.channel[ch].rx_fifo_read_ptr = 0;
242      duart68681->channel[ch].rx_fifo_read_ptr = 0;
209243   }
210244
211   duart_68681.channel[ch].rx_fifo_num--;
245   duart68681->channel[ch].rx_fifo_num--;
212246
213   if ( duart_68681.channel[ch].rx_fifo_num > 0 )
247   if ( duart68681->channel[ch].rx_fifo_num > 0 )
214248   {
215      duart_68681.channel[ch].SR |= STATUS_RECEIVER_READY;
249      duart68681->channel[ch].SR |= STATUS_RECEIVER_READY;
216250      if ( ch == 0 )
217251      {
218         duart_68681.ISR |= INT_RXRDY_FFULLA;
252         duart68681->ISR |= INT_RXRDY_FFULLA;
219253      }
220254      else
221255      {
222         duart_68681.ISR |= INT_RXRDY_FFULLB;
256         duart68681->ISR |= INT_RXRDY_FFULLB;
223257      }
224258   }
225259   else
226260   {
227      duart_68681.channel[ch].SR &= ~STATUS_RECEIVER_READY;
261      duart68681->channel[ch].SR &= ~STATUS_RECEIVER_READY;
228262      if ( ch == 0 )
229263      {
230         duart_68681.ISR &= ~INT_RXRDY_FFULLA;
264         duart68681->ISR &= ~INT_RXRDY_FFULLA;
231265      }
232266      else
233267      {
234         duart_68681.ISR &= ~INT_RXRDY_FFULLB;
268         duart68681->ISR &= ~INT_RXRDY_FFULLB;
235269      }
236270   }
237   duart_68681_update_interrupts(machine);
271   duart68681_update_interrupts(duart68681);
238272   return r;
239273};
240274
241275static TIMER_CALLBACK( tx_timer_callback )
242276{
277   const device_config *device = ptr;
278   duart68681_state   *duart68681 = get_safe_token(device);
243279   int ch = param & 1;
244280
245   if (duart_68681.tx_callback)
246      duart_68681.tx_callback(ch, duart_68681.channel[ch].tx_data);
281   if (duart68681->duart_config->tx_callback)
282      duart68681->duart_config->tx_callback(device, ch, duart68681->channel[ch].tx_data);
247283
248   duart_68681.channel[ch].tx_ready = 1;
249   duart_68681.channel[ch].SR |= STATUS_TRANSMITTER_READY;
284   duart68681->channel[ch].tx_ready = 1;
285   duart68681->channel[ch].SR |= STATUS_TRANSMITTER_READY;
250286
251287   if (ch == 0)
252      duart_68681.ISR |= INT_TXRDYA;
288      duart68681->ISR |= INT_TXRDYA;
253289   else
254      duart_68681.ISR |= INT_TXRDYB;
290      duart68681->ISR |= INT_TXRDYB;
255291
256   duart_68681_update_interrupts(machine);
257   timer_adjust_oneshot(duart_68681.channel[ch].tx_timer, attotime_never, ch);
292   duart68681_update_interrupts(duart68681);
293   timer_adjust_oneshot(duart68681->channel[ch].tx_timer, attotime_never, ch);
258294};
259295
260static void duart_68681_write_TX(running_machine *machine, int ch, UINT8 data)
296static void duart68681_write_TX(duart68681_state* duart68681, int ch, UINT8 data)
261297{
262298   attotime period;
263299
264   duart_68681.channel[ch].tx_data = data;
300   duart68681->channel[ch].tx_data = data;
265301
266   duart_68681.channel[ch].tx_ready = 0;
267   duart_68681.channel[ch].SR &= ~STATUS_TRANSMITTER_READY;
302   duart68681->channel[ch].tx_ready = 0;
303   duart68681->channel[ch].SR &= ~STATUS_TRANSMITTER_READY;
268304
269305   if (ch == 0)
270      duart_68681.ISR &= ~INT_TXRDYA;
306      duart68681->ISR &= ~INT_TXRDYA;
271307   else
272      duart_68681.ISR &= ~INT_TXRDYB;
308      duart68681->ISR &= ~INT_TXRDYB;
273309
274   duart_68681_update_interrupts(machine);
310   duart68681_update_interrupts(duart68681);
275311
276   period = ATTOTIME_IN_HZ(duart_68681.channel[ch].baud_rate / 10 );
277   timer_adjust_oneshot(duart_68681.channel[ch].tx_timer, period, ch);
312   period = ATTOTIME_IN_HZ(duart68681->channel[ch].baud_rate / 10 );
313   timer_adjust_oneshot(duart68681->channel[ch].tx_timer, period, ch);
278314};
279315
280READ16_HANDLER(duart_68681_r)
316READ8_DEVICE_HANDLER(duart68681_r)
281317{
282   UINT16 r = 0x0;
318   duart68681_state* duart68681 = get_safe_token(device);
319   UINT8 r = 0xff;
283320
284   //logerror( "Reading 68681 reg %x\n", offset );
321   offset &= 0xf;
322
323   LOG(( "Reading 68681 (%s) reg %x (%s) ", device->tag, offset, duart68681_reg_read_names[offset] ));
285324   switch (offset)
286325   {
287326      case 0x01: /* SRA */
288         r = duart_68681.channel[0].SR;
327         r = duart68681->channel[0].SR;
289328         break;
290329      case 0x03: /* Rx Holding Register A */
291         r = duart_68681_read_rx_fifo(machine, 0);
330         r = duart68681_read_rx_fifo(duart68681, 0);
292331         break;
293332      case 0x04: /* IPCR */
294333         {
295334            UINT8 IP;
296            if ( duart_68681.input_port_read != NULL )
297               IP = duart_68681.input_port_read();
335            if ( duart68681->duart_config->input_port_read != NULL )
336               IP = duart68681->duart_config->input_port_read(duart68681->device);
298337            else
299338               IP = 0x0;
300339
301            r = (((duart_68681.IP_last_state ^ IP) & 0x0f) << 4) | (IP & 0x0f);
302            duart_68681.IP_last_state = IP;
303            duart_68681.ISR &= ~INT_INPUT_PORT_CHANGE;
304            duart_68681_update_interrupts(machine);
340            r = (((duart68681->IP_last_state ^ IP) & 0x0f) << 4) | (IP & 0x0f);
341            duart68681->IP_last_state = IP;
342            duart68681->ISR &= ~INT_INPUT_PORT_CHANGE;
343            duart68681_update_interrupts(duart68681);
305344         }
306345         break;
346      case 0x05: /* ISR */
347         r = duart68681->ISR;
348         break;
307349      case 0x09: /* SRB */
308         r = duart_68681.channel[1].SR;
350         r = duart68681->channel[1].SR;
309351         break;
310352      case 0x0b: /* RHRB */
311         r = duart_68681_read_rx_fifo(machine, 1);
353         r = duart68681_read_rx_fifo(duart68681, 1);
312354         break;
355      case 0x0d: /* IP */
356         if ( duart68681->duart_config->input_port_read != NULL )
357            r = duart68681->duart_config->input_port_read(duart68681->device);
358         else
359            r = 0x0;
360         break;
361      case 0x0e: /* Start counter command */
362         switch( (duart68681->ACR >> 4) & 0x07 )
363         {
364            case 0x07: /* Timer, CLK/16 */
365               {
366                  double hz;
367                  //attotime rate = attotime_mul(ATTOTIME_IN_HZ(duart68681->duart_config->frequency), 16*duart68681->CTR.w.l);
368                  attotime rate = ATTOTIME_IN_HZ(2*duart68681->duart_config->frequency/(2*16*16*duart68681->CTR.w.l));
369                  hz = ATTOSECONDS_TO_HZ(rate.attoseconds);
370                  timer_adjust_periodic(duart68681->duart_timer, rate, 0, rate);
371               }
372               break;
373         }
374         break;
375      case 0x0f: /* Stop counter command */
376         duart68681->ISR &= ~INT_COUNTER_READY;
377         duart68681_update_interrupts(duart68681);
378         break;
313379      default:
314         logerror( "Reading unhandled 68681 reg %x\n", offset );
380         LOG(( "Reading unhandled 68681 reg %x\n", offset ));
315381         break;
316382   }
383   LOG(("returned %02x\n", r));
317384   return r;
318385}
319386
320WRITE16_HANDLER(duart_68681_w)
387WRITE8_DEVICE_HANDLER(duart68681_w)
321388{
322   //logerror( "Writing 68681 reg %x with %04x\n", offset, data );
389   duart68681_state* duart68681 = get_safe_token(device);
390
391   offset &= 0x0f;
392   LOG(( "Writing 68681 (%s) reg %x (%s) with %04x\n", device->tag, offset, duart68681_reg_write_names[offset], data ));
323393   switch(offset)
324394   {
325395      case 0x00: /* MRA */
326         duart_68681_write_MR(0, data);
396         duart68681_write_MR(duart68681, 0, data);
327397         break;
328398      case 0x01: /* CSRA */
329         duart_68681_write_CSR(0, data, duart_68681.ACR);
399         duart68681_write_CSR(duart68681, 0, data, duart68681->ACR);
330400         break;
331401      case 0x02: /* CRA */
332         duart_68681_write_CR(0, data);
402         duart68681_write_CR(duart68681, 0, data);
333403         break;
334404      case 0x03: /* THRA */
335         duart_68681_write_TX(machine, 0, data);
405         duart68681_write_TX(duart68681, 0, data);
336406         break;
337407      case 0x04: /* ACR */
338         duart_68681.ACR = data;
339         // TODO:
408         duart68681->ACR = data;
340409         //       bits 6-4: Counter/Timer Mode And Clock Source Select
341410         //       bits 3-0: IP3-0 Change-Of-State Interrupt Enable
342         duart_68681_write_CSR(0, duart_68681.channel[0].CSR, data);
343         duart_68681_write_CSR(1, duart_68681.channel[1].CSR, data);
411         if (((data >> 4) & 0x07) != 0x07)
412            logerror( "68681 (%s): Unhandled timer/counter mode %d\n", device->tag, (data >> 4) & 0x07);
413
414         duart68681_write_CSR(duart68681, 0, duart68681->channel[0].CSR, data);
415         duart68681_write_CSR(duart68681, 1, duart68681->channel[1].CSR, data);
344416         break;
345417      case 0x05: /* IMR */
346         duart_68681.IMR = data;
347         // TODO: handle update interrupts?
418         duart68681->IMR = data;
419         duart68681_update_interrupts(duart68681);
348420         break;
421      case 0x06: /* CTUR */
422         duart68681->CTR.b.h = data;
423         break;
424      case 0x07: /* CTLR */
425         duart68681->CTR.b.l = data;
426         break;
349427      case 0x08: /* MRB */
350         duart_68681_write_MR(1, data);
428         duart68681_write_MR(duart68681, 1, data);
351429         break;
352430      case 0x09: /* CSRB */
353         duart_68681_write_CSR(1, data, duart_68681.ACR);
431         duart68681_write_CSR(duart68681, 1, data, duart68681->ACR);
354432         break;
355433      case 0x0a: /* CRB */
356         duart_68681_write_CR(1, data);
434         duart68681_write_CR(duart68681, 1, data);
357435         break;
358436      case 0x0b: /* THRB */
359         duart_68681_write_TX(machine, 1, data);
437         duart68681_write_TX(duart68681, 1, data);
360438         break;
361439      case 0x0c: /* IVR */
362         duart_68681.IVR = data;
440         duart68681->IVR = data;
363441         break;
364442      case 0x0d: /* OPCR */
365         duart_68681.OPCR = data;
443         if (data != 0x00)
444            logerror( "68681 (%s): Unhandled OPCR value: %02x\n", device->tag, data);
445         duart68681->OPCR = data;
366446         break;
367447      case 0x0e: /* Set Output Port Bits */
368         // TODO: bits set to 1 causes corresponding output port bit to be set to 0
448         duart68681->OPR |= data;
449         if (duart68681->duart_config->output_port_write)
450            duart68681->duart_config->output_port_write(duart68681->device, duart68681->OPR ^ 0xff);
369451         break;
370452      case 0x0f: /* Reset Output Port Bits */
371         // TODO: bits set to 1 causes corresponding output port bit to be set to 1
453         duart68681->OPR &= ~data;
454         if (duart68681->duart_config->output_port_write)
455            duart68681->duart_config->output_port_write(duart68681->device, duart68681->OPR ^ 0xff);
372456         break;
373      default:
374         logerror( "Writing 68681 reg %x with %04x\n", offset, data );
375         break;
376457   }
377458}
378459
379void duart_68681_rx_data( running_machine *machine, int ch, UINT8 data )
460void duart68681_rx_data( const device_config* device, int ch, UINT8 data )
380461{
381   if ( duart_68681.channel[ch].rx_enabled )
462   duart68681_state *duart68681 = get_safe_token(device);
463
464   if ( duart68681->channel[ch].rx_enabled )
382465   {
383      if ( duart_68681.channel[ch].rx_fifo_num >= RX_FIFO_SIZE )
466      if ( duart68681->channel[ch].rx_fifo_num >= RX_FIFO_SIZE )
384467      {
385         logerror( "68681: FIFO overflow\n" );
468         LOG(( "68681: FIFO overflow\n" ));
386469         return;
387470      }
388      duart_68681.channel[ch].rx_fifo[duart_68681.channel[ch].rx_fifo_write_ptr++] = data;
389      if ( duart_68681.channel[ch].rx_fifo_write_ptr == RX_FIFO_SIZE )
471      duart68681->channel[ch].rx_fifo[duart68681->channel[ch].rx_fifo_write_ptr++] = data;
472      if ( duart68681->channel[ch].rx_fifo_write_ptr == RX_FIFO_SIZE )
390473      {
391         duart_68681.channel[ch].rx_fifo_write_ptr = 0;
474         duart68681->channel[ch].rx_fifo_write_ptr = 0;
392475      }
393      duart_68681.channel[ch].rx_fifo_num++;
476      duart68681->channel[ch].rx_fifo_num++;
394477
395      duart_68681.channel[ch].SR |= STATUS_RECEIVER_READY;
396      if ( BIT(duart_68681.channel[ch].MR1,MODE_RX_INT_SELECT_BIT) == 0 )
478      duart68681->channel[ch].SR |= STATUS_RECEIVER_READY;
479      if ( BIT(duart68681->channel[ch].MR1,MODE_RX_INT_SELECT_BIT) == 0 )
397480      {
398         duart_68681.ISR |= (ch == 0) ? INT_RXRDY_FFULLA : INT_RXRDY_FFULLB;
481         duart68681->ISR |= (ch == 0) ? INT_RXRDY_FFULLA : INT_RXRDY_FFULLB;
399482      }
400      if ( duart_68681.channel[ch].rx_fifo_num == RX_FIFO_SIZE )
483      if ( duart68681->channel[ch].rx_fifo_num == RX_FIFO_SIZE )
401484      {
402         duart_68681.channel[ch].SR |= STATUS_FIFO_FULL;
403         if ( BIT(duart_68681.channel[ch].MR1,MODE_RX_INT_SELECT_BIT) == 1 )
485         duart68681->channel[ch].SR |= STATUS_FIFO_FULL;
486         if ( BIT(duart68681->channel[ch].MR1,MODE_RX_INT_SELECT_BIT) == 1 )
404487         {
405            duart_68681.ISR |= (ch == 0) ? INT_RXRDY_FFULLA : INT_RXRDY_FFULLB;
488            duart68681->ISR |= (ch == 0) ? INT_RXRDY_FFULLA : INT_RXRDY_FFULLB;
406489         }
407490      }
408      duart_68681_update_interrupts(machine);
491      duart68681_update_interrupts(duart68681);
409492   }
410493};
411494
412void duart_68681_init(int frequency, void (*irq_handler)(running_machine *machine, int vector), void (*tx_callback)(int channel, UINT8 data))
495/*-------------------------------------------------
496    device start callback
497-------------------------------------------------*/
498
499static DEVICE_START(duart68681)
413500{
414   memset(&duart_68681, 0, sizeof(duart_68681));
501   duart68681_state *duart68681 = get_safe_token(device);
502   char unique_tag[30];
415503
416   duart_68681.frequency = frequency;
417   duart_68681.tx_callback = tx_callback;
418   duart_68681.irq_handler = irq_handler;
504   /* validate arguments */
505   assert(device != NULL);
506   assert(device->tag != NULL);
507   assert(strlen(device->tag) < 20);
419508
509   state_save_combine_module_and_tag(unique_tag, "DUART 68681", device->tag);
510
511   state_save_register_item(unique_tag, 0, duart68681->ACR);
512   state_save_register_item(unique_tag, 0, duart68681->IMR);
513   state_save_register_item(unique_tag, 0, duart68681->ISR);
514   state_save_register_item(unique_tag, 0, duart68681->IVR);
515   state_save_register_item(unique_tag, 0, duart68681->OPCR);
516   state_save_register_item(unique_tag, 0, duart68681->CTR);
517   state_save_register_item(unique_tag, 0, duart68681->IP_last_state);
518
519   state_save_register_item(unique_tag, 0, duart68681->channel[0].CR);
520   state_save_register_item(unique_tag, 0, duart68681->channel[0].CSR);
521   state_save_register_item(unique_tag, 0, duart68681->channel[0].MR1);
522   state_save_register_item(unique_tag, 0, duart68681->channel[0].MR2);
523   state_save_register_item(unique_tag, 0, duart68681->channel[0].MR_ptr);
524   state_save_register_item(unique_tag, 0, duart68681->channel[0].SR);
525   state_save_register_item(unique_tag, 0, duart68681->channel[0].baud_rate);
526   state_save_register_item(unique_tag, 0, duart68681->channel[0].rx_enabled);
527   state_save_register_item_array(unique_tag, 0, duart68681->channel[0].rx_fifo);
528   state_save_register_item(unique_tag, 0, duart68681->channel[0].rx_fifo_read_ptr);
529   state_save_register_item(unique_tag, 0, duart68681->channel[0].rx_fifo_write_ptr);
530   state_save_register_item(unique_tag, 0, duart68681->channel[0].rx_fifo_num);
531   state_save_register_item(unique_tag, 0, duart68681->channel[0].tx_enabled);
532   state_save_register_item(unique_tag, 0, duart68681->channel[0].tx_data);
533   state_save_register_item(unique_tag, 0, duart68681->channel[0].tx_ready);
534
535   state_save_register_item(unique_tag, 0, duart68681->channel[1].CR);
536   state_save_register_item(unique_tag, 0, duart68681->channel[1].CSR);
537   state_save_register_item(unique_tag, 0, duart68681->channel[1].MR1);
538   state_save_register_item(unique_tag, 0, duart68681->channel[1].MR2);
539   state_save_register_item(unique_tag, 0, duart68681->channel[1].MR_ptr);
540   state_save_register_item(unique_tag, 0, duart68681->channel[1].SR);
541   state_save_register_item(unique_tag, 0, duart68681->channel[1].baud_rate);
542   state_save_register_item(unique_tag, 0, duart68681->channel[1].rx_enabled);
543   state_save_register_item_array(unique_tag, 0, duart68681->channel[1].rx_fifo);
544   state_save_register_item(unique_tag, 0, duart68681->channel[1].rx_fifo_read_ptr);
545   state_save_register_item(unique_tag, 0, duart68681->channel[1].rx_fifo_write_ptr);
546   state_save_register_item(unique_tag, 0, duart68681->channel[1].rx_fifo_num);
547   state_save_register_item(unique_tag, 0, duart68681->channel[1].tx_enabled);
548   state_save_register_item(unique_tag, 0, duart68681->channel[1].tx_data);
549   state_save_register_item(unique_tag, 0, duart68681->channel[1].tx_ready);
550
551}
552
553/*-------------------------------------------------
554    device reset callback
555-------------------------------------------------*/
556
557static DEVICE_RESET(duart68681)
558{
559   duart68681_state *duart68681 = get_safe_token(device);
560
561   memset(duart68681, 0, sizeof(duart68681_state));
562   duart68681->duart_config = device->static_config;
563   duart68681->device = device;
564   duart68681->IVR = 0x0f;
565
420566   // allocate timers
421   duart_68681.channel[0].tx_timer = timer_alloc(tx_timer_callback, NULL);
422   timer_adjust_oneshot(duart_68681.channel[0].tx_timer, attotime_never, 0);
567   duart68681->channel[0].tx_timer = timer_alloc(tx_timer_callback, (void*)device);
568   timer_adjust_oneshot(duart68681->channel[0].tx_timer, attotime_never, 0);
423569
424   duart_68681.channel[1].tx_timer = timer_alloc(tx_timer_callback, NULL);
425   timer_adjust_oneshot(duart_68681.channel[1].tx_timer, attotime_never, 1);
426};
570   duart68681->channel[1].tx_timer = timer_alloc(tx_timer_callback, (void*)device);
571   timer_adjust_oneshot(duart68681->channel[1].tx_timer, attotime_never, 1);
572
573   duart68681->duart_timer = timer_alloc(duart_timer_callback, (void*)device);
574}
575
576/*-------------------------------------------------
577    device set info callback
578-------------------------------------------------*/
579
580static DEVICE_SET_INFO(duart68681)
581{
582   switch (state)
583   {
584      /* no parameters to set */
585   }
586}
587
588/*-------------------------------------------------
589    device get info callback
590-------------------------------------------------*/
591
592DEVICE_GET_INFO(duart68681)
593{
594   switch (state)
595   {
596      /* --- the following bits of info are returned as 64-bit signed integers --- */
597      case DEVINFO_INT_TOKEN_BYTES:         info->i = sizeof(duart68681_state);   break;
598      case DEVINFO_INT_INLINE_CONFIG_BYTES:   info->i = sizeof(duart68681_config);   break;
599      case DEVINFO_INT_CLASS:               info->i = DEVICE_CLASS_PERIPHERAL;      break;
600
601      /* --- the following bits of info are returned as pointers to data or functions --- */
602      case DEVINFO_FCT_SET_INFO:            info->set_info = DEVICE_SET_INFO_NAME(duart68681); break;
603      case DEVINFO_FCT_START:               info->start = DEVICE_START_NAME(duart68681); break;
604      case DEVINFO_FCT_STOP:               /* nothing */ break;
605      case DEVINFO_FCT_RESET:               info->reset = DEVICE_RESET_NAME(duart68681);break;
606
607      /* --- the following bits of info are returned as NULL-terminated strings --- */
608      case DEVINFO_STR_NAME:               info->s = "DUART 68681";            break;
609      case DEVINFO_STR_FAMILY:            info->s = "DUART";                  break;
610      case DEVINFO_STR_VERSION:            info->s = "1.0";                  break;
611      case DEVINFO_STR_SOURCE_FILE:         info->s = __FILE__;                  break;
612      case DEVINFO_STR_CREDITS:            info->s = "Copyright Nicola Salmoria and the MAME Team"; break;
613   }
614}
src/emu/machine/68681.h
r2844r2845
11#ifndef _68681_H
22#define _68681_H
33
4void duart_68681_init(int frequency, void (*irq_handler)(running_machine *machine, int vector), void (*tx_callback)(int channel, UINT8 data));
5void duart_68681_rx_data( running_machine *machine, int ch, UINT8 data );
4typedef struct _duart68681_config duart68681_config;
5struct _duart68681_config
6{
7   int frequency;
8   void (*irq_handler)(const device_config *device, UINT8 vector);
9   void (*tx_callback)(const device_config *device, int channel, UINT8 data);
10   UINT8 (*input_port_read)(const device_config *device);
11   void (*output_port_write)(const device_config *device, UINT8 data);
12};
613
7READ16_HANDLER(duart_68681_r);
8WRITE16_HANDLER(duart_68681_w);
14#define DUART68681 DEVICE_GET_INFO_NAME(duart68681)
15DEVICE_GET_INFO(duart68681);
916
17READ8_DEVICE_HANDLER(duart68681_r);
18WRITE8_DEVICE_HANDLER(duart68681_w);
19
20void duart68681_rx_data( const device_config* device, int ch, UINT8 data );
21
1022#endif //_68681_H
src/emu/machine/pc16552d.c
r2844r2845
7070static void check_interrupts(running_machine *machine, int chip, int channel)
7171{
7272   PC16552D_CHANNEL *ch = &duart[chip].ch[channel];
73   int signal = 0;
7374
7475   if (ch->pending_interrupt != 0)
7576   {
r2844r2845
7879         ((ch->reg[REG_INT_ENABLE] & INT_ENABLE_RX_LINE_STATUS) && (ch->pending_interrupt & IRQ_RX_LINE_STATUS)) ||
7980         ((ch->reg[REG_INT_ENABLE] & INT_ENABLE_MODEM_STATUS) && (ch->pending_interrupt & IRQ_MODEM_STATUS)))
8081      {
81         if (duart[chip].irq_handler != NULL)
82         {
83            duart[chip].irq_handler(machine, channel, 0);
84         }
82         signal = 1;
8583      }
8684   }
85
86   if (duart[chip].irq_handler != NULL)
87   {
88      duart[chip].irq_handler(machine, channel, signal ? ASSERT_LINE : CLEAR_LINE);
89   }
8790}
8891
8992static void duart_push_rx_fifo(running_machine *machine, int chip, int channel, UINT8 data)
src/emu/rendersw.c
r2844r2845
4242#define NO_DEST_READ 0
4343#endif
4444
45#if !defined(BILINEAR_FILTER)
46#define BILINEAR_FILTER 0
47#endif
4548
4649
50
4751/***************************************************************************
4852    ONE-TIME-ONLY DEFINITIONS
4953***************************************************************************/
r2844r2845
5357
5458#include "mamecore.h"
5559#include "eminline.h"
60#include "video/rgbutil.h"
5661#include "render.h"
5762#include <math.h>
5863
r2844r2845
99104    INLINE FUNCTIONS
100105***************************************************************************/
101106
107/*-------------------------------------------------
108    round_nearest - round to nearest in a
109    predictable way
110-------------------------------------------------*/
111
102112INLINE float round_nearest(float f)
103113{
104114   return floor(f + 0.5f);
105115}
106116
107117
108INLINE UINT32 ycc_to_rgb(UINT8 y, UINT8 cb, UINT8 cr)
118/*-------------------------------------------------
119    ycc_to_rgb - convert YCC to RGB; the YCC pixel
120    contains Y in the LSB, Cb << 8, and Cr << 16
121-------------------------------------------------*/
122
123INLINE UINT32 ycc_to_rgb(UINT32 ycc)
109124{
110125   /* original equations:
111126
r2844r2845
129144        G = clip(( 298 * Y - 298 * 16 - 100 * Cb + 100 * 128 - 208 * Cr + 208 * 128 + 128) >> 8)
130145        B = clip(( 298 * Y - 298 * 16 + 516 * Cb - 516 * 128                        + 128) >> 8)
131146    */
147    UINT8 y = ycc;
148    UINT8 cb = ycc >> 8;
149    UINT8 cr = ycc >> 16;
132150   int r, g, b, common;
133151
134152   common = 298 * y - 298 * 16;
r2844r2845
146164   return MAKE_RGB(r, g, b);
147165}
148166
167
168/*-------------------------------------------------
169    get_texel_palette16_nearest - return the
170    nearest neighbor texel from a palettized
171    16bpp source
172-------------------------------------------------*/
173
174INLINE UINT32 get_texel_palette16_nearest(const UINT16 *texbase, INT32 texrp, INT32 curu, INT32 curv, const rgb_t *palbase)
175{
176   return palbase[texbase[(curv >> 16) * texrp + (curu >> 16)]];
177}
178
179
180/*-------------------------------------------------
181    get_texel_palette16_bilinear - return a
182    bilinear filtered texel from a palettized
183    16bpp source
184-------------------------------------------------*/
185
186INLINE UINT32 get_texel_palette16_bilinear(const UINT16 *texbase, INT32 texrp, INT32 curu, INT32 curv, const rgb_t *palbase)
187{
188   rgb_t pix00, pix01, pix10, pix11;
189   texbase += (curv >> 16) * texrp + (curu >> 16);
190   pix00 = palbase[texbase[0]];
191   pix01 = palbase[texbase[1]];
192   pix10 = palbase[texbase[texrp + 0]];
193   pix11 = palbase[texbase[texrp + 1]];
194   return rgb_bilinear_filter(pix00, pix01, pix10, pix11, curu >> 8, curv >> 8);
195}
196
197
198/*-------------------------------------------------
199    get_texel_rgb15_nearest - return the
200    nearest neighbor texel from a 15bpp RGB source
201-------------------------------------------------*/
202
203INLINE UINT32 get_texel_rgb15_nearest(const UINT16 *texbase, INT32 texrp, INT32 curu, INT32 curv)
204{
205   return texbase[(curv >> 16) * texrp + (curu >> 16)];
206}
207
208
209/*-------------------------------------------------
210    get_texel_rgb15_bilinear - return the
211    bilinear filtered texel from a 15bpp RGB
212    source
213-------------------------------------------------*/
214
215INLINE UINT32 get_texel_rgb15_bilinear(const UINT16 *texbase, INT32 texrp, INT32 curu, INT32 curv)
216{
217   rgb_t pix00, pix01, pix10, pix11, filtered;
218   texbase += (curv >> 16) * texrp + (curu >> 16);
219   pix00 = texbase[0];
220   pix01 = texbase[1];
221   pix10 = texbase[texrp + 0];
222   pix11 = texbase[texrp + 1];
223   pix00 = ((pix00 & 0x7fe0) << 6) | (pix00 & 0x1f);
224   pix01 = ((pix01 & 0x7fe0) << 6) | (pix01 & 0x1f);
225   pix10 = ((pix10 & 0x7fe0) << 6) | (pix10 & 0x1f);
226   pix11 = ((pix11 & 0x7fe0) << 6) | (pix11 & 0x1f);
227   filtered = rgb_bilinear_filter(pix00, pix01, pix10, pix11, curu >> 8, curv >> 8);
228   return (filtered & 0x1f) | ((filtered & 0x1ff800) >> 6);
229}
230
231
232/*-------------------------------------------------
233    get_texel_yuy16_nearest - return the
234    nearest neighbor texel from a 16bpp YCbCr
235    source (pixel is returned as Cr-Cb-Y
236-------------------------------------------------*/
237
238INLINE UINT32 get_texel_yuy16_nearest(const UINT16 *texbase, INT32 texrp, INT32 curu, INT32 curv)
239{
240   const UINT16 *spix = &texbase[(curv >> 16) * texrp + (curu >> 17) * 2];
241   return (spix[(curu >> 16) & 1] >> 8) | ((spix[0] & 0xff) << 8) | ((spix[1] & 0xff) << 16);
242}
243
244
245/*-------------------------------------------------
246    get_texel_yuy16_bilinear - return the
247    nearest neighbor texel from a 16bpp YCbCr
248    source (pixel is returned as Cr-Cb-Y
249-------------------------------------------------*/
250
251INLINE UINT32 get_texel_yuy16_bilinear(const UINT16 *texbase, INT32 texrp, INT32 curu, INT32 curv)
252{
253   rgb_t pix00, pix01, pix10, pix11;
254   texbase += (curv >> 16) * texrp + (curu >> 17) * 2;
255   if ((curu & 0x10000) == 0)
256   {
257      rgb_t cbcr = ((texbase[0] & 0xff) << 8) | ((texbase[1] & 0xff) << 16);
258      pix00 = (texbase[0] >> 8) | cbcr;
259      pix01 = (texbase[1] >> 8) | cbcr;
260      cbcr = ((texbase[texrp + 0] & 0xff) << 8) | ((texbase[texrp + 1] & 0xff) << 16);
261      pix10 = (texbase[texrp + 0] >> 8) | cbcr;
262      pix11 = (texbase[texrp + 1] >> 8) | cbcr;
263   }
264   else
265   {
266      rgb_t cbcr = ((texbase[0] & 0xff) << 8) | ((texbase[1] & 0xff) << 16);
267      pix00 = (texbase[1] >> 8) | cbcr;
268      cbcr = ((texbase[2] & 0xff) << 8) | ((texbase[3] & 0xff) << 16);
269      pix01 = (texbase[2] >> 8) | cbcr;
270      cbcr = ((texbase[texrp + 0] & 0xff) << 8) | ((texbase[texrp + 1] & 0xff) << 16);
271      pix10 = (texbase[texrp + 1] >> 8) | cbcr;
272      cbcr = ((texbase[texrp + 2] & 0xff) << 8) | ((texbase[texrp + 3] & 0xff) << 16);
273      pix11 = (texbase[texrp + 2] >> 8) | cbcr;
274   }
275   return rgb_bilinear_filter(pix00, pix01, pix10, pix11, curu >> 8, curv >> 8);
276}
277
278
279/*-------------------------------------------------
280    get_texel_rgb32_nearest - return the
281    nearest neighbor texel from a 32bpp RGB source
282-------------------------------------------------*/
283
284INLINE UINT32 get_texel_rgb32_nearest(const UINT32 *texbase, INT32 texrp, INT32 curu, INT32 curv)
285{
286   return texbase[(curv >> 16) * texrp + (curu >> 16)];
287}
288
289
290/*-------------------------------------------------
291    get_texel_rgb32_bilinear - return the
292    bilinear filtered texel from a 32bpp RGB
293    source
294-------------------------------------------------*/
295
296INLINE UINT32 get_texel_rgb32_bilinear(const UINT32 *texbase, INT32 texrp, INT32 curu, INT32 curv)
297{
298   rgb_t pix00, pix01, pix10, pix11;
299   texbase += (curv >> 16) * texrp + (curu >> 16);
300   pix00 = texbase[0];
301   pix01 = texbase[1];
302   pix10 = texbase[texrp + 0];
303   pix11 = texbase[texrp + 1];
304   return rgb_bilinear_filter(pix00, pix01, pix10, pix11, curu >> 8, curv >> 8);
305}
306
307
308/*-------------------------------------------------
309    get_texel_argb32_nearest - return the
310    nearest neighbor texel from a 32bpp ARGB
311    source
312-------------------------------------------------*/
313
314INLINE UINT32 get_texel_argb32_nearest(const UINT32 *texbase, INT32 texrp, INT32 curu, INT32 curv)
315{
316   return texbase[(curv >> 16) * texrp + (curu >> 16)];
317}
318
319
320/*-------------------------------------------------
321    get_texel_argb32_bilinear - return the
322    bilinear filtered texel from a 32bpp ARGB
323    source
324-------------------------------------------------*/
325
326INLINE UINT32 get_texel_argb32_bilinear(const UINT32 *texbase, INT32 texrp, INT32 curu, INT32 curv)
327{
328   rgb_t pix00, pix01, pix10, pix11;
329   texbase += (curv >> 16) * texrp + (curu >> 16);
330   pix00 = texbase[0];
331   pix01 = texbase[1];
332   pix10 = texbase[texrp + 0];
333   pix11 = texbase[texrp + 1];
334   return rgba_bilinear_filter(pix00, pix01, pix10, pix11, curu >> 8, curv >> 8);
335}
336
337
149338#endif
150339
151340
r2844r2845
194383#endif
195384#endif
196385
386/* texel functions */
387#undef GET_TEXEL
388#if BILINEAR_FILTER
389#define GET_TEXEL(type)            get_texel_##type##_##bilinear
390#else
391#define GET_TEXEL(type)            get_texel_##type##_##nearest
392#endif
197393
198394
395
199396/***************************************************************************
200397    LINE RASTERIZERS
201398***************************************************************************/
r2844r2845
528725         /* loop over cols */
529726         for (x = setup->startx; x < endx; x++)
530727         {
531            UINT32 pix = palbase[texbase[(curv >> 16) * texrp + (curu >> 16)]];
728            UINT32 pix = GET_TEXEL(palette16)(texbase, texrp, curu, curv, palbase);
532729            *dest++ = SOURCE32_TO_DEST(pix);
533730            curu += dudx;
534731            curv += dvdx;
r2844r2845
558755         /* loop over cols */
559756         for (x = setup->startx; x < endx; x++)
560757         {
561            UINT32 pix = palbase[texbase[(curv >> 16) * texrp + (curu >> 16)]];
758            UINT32 pix = GET_TEXEL(palette16)(texbase, texrp, curu, curv, palbase);
562759            UINT32 r = (SOURCE32_R(pix) * sr) >> 8;
563760            UINT32 g = (SOURCE32_G(pix) * sg) >> 8;
564761            UINT32 b = (SOURCE32_B(pix) * sb) >> 8;
r2844r2845
594791         /* loop over cols */
595792         for (x = setup->startx; x < endx; x++)
596793         {
597            UINT32 pix = palbase[texbase[(curv >> 16) * texrp + (curu >> 16)]];
794            UINT32 pix = GET_TEXEL(palette16)(texbase, texrp, curu, curv, palbase);
598795            UINT32 dpix = NO_DEST_READ ? 0 : *dest;
599796            UINT32 r = (SOURCE32_R(pix) * sr + DEST_R(dpix) * invsa) >> 8;
600797            UINT32 g = (SOURCE32_G(pix) * sg + DEST_G(dpix) * invsa) >> 8;
r2844r2845
640837         /* loop over cols */
641838         for (x = setup->startx; x < endx; x++)
642839         {
643            UINT32 pix = palbase[texbase[(curv >> 16) * texrp + (curu >> 16)]];
840            UINT32 pix = GET_TEXEL(palette16)(texbase, texrp, curu, curv, palbase);
644841            if ((pix & 0xffffff) != 0)
645842            {
646843               UINT32 dpix = NO_DEST_READ ? 0 : *dest;
r2844r2845
681878         /* loop over cols */
682879         for (x = setup->startx; x < endx; x++)
683880         {
684            UINT32 pix = palbase[texbase[(curv >> 16) * texrp + (curu >> 16)]];
881            UINT32 pix = GET_TEXEL(palette16)(texbase, texrp, curu, curv, palbase);
685882            if ((pix & 0xffffff) != 0)
686883            {
687884               UINT32 dpix = NO_DEST_READ ? 0 : *dest;
r2844r2845
737934         /* loop over cols */
738935         for (x = setup->startx; x < endx; x++)
739936         {
740            UINT32 pix = palbase[texbase[(curv >> 16) * texrp + (curu >> 16)]];
937            UINT32 pix = GET_TEXEL(palette16)(texbase, texrp, curu, curv, palbase);
741938            UINT32 ta = pix >> 24;
742939            if (ta != 0)
743940            {
r2844r2845
780977         /* loop over cols */
781978         for (x = setup->startx; x < endx; x++)
782979         {
783            UINT32 pix = palbase[texbase[(curv >> 16) * texrp + (curu >> 16)]];
980            UINT32 pix = GET_TEXEL(palette16)(texbase, texrp, curu, curv, palbase);
784981            UINT32 ta = (pix >> 24) * sa;
785982            if (ta != 0)
786983            {
r2844r2845
8371034            /* loop over cols */
8381035            for (x = setup->startx; x < endx; x++)
8391036            {
840               const UINT16 *spix = &texbase[(curv >> 16) * texrp + (curu >> 17) * 2];
841               UINT32 pix = ycc_to_rgb(spix[(curu >> 16) & 1] >> 8, spix[0], spix[1]);
1037               UINT32 pix = ycc_to_rgb(GET_TEXEL(yuy16)(texbase, texrp, curu, curv));
8421038               *dest++ = SOURCE32_TO_DEST(pix);
8431039               curu += dudx;
8441040               curv += dvdx;
r2844r2845
8511047            /* loop over cols */
8521048            for (x = setup->startx; x < endx; x++)
8531049            {
854               const UINT16 *spix = &texbase[(curv >> 16) * texrp + (curu >> 17) * 2];
855               UINT32 pix = ycc_to_rgb(palbase[spix[(curu >> 16) & 1] >> 8], spix[0], spix[1]);
1050               UINT32 pix = ycc_to_rgb(GET_TEXEL(yuy16)(texbase, texrp, curu, curv));
8561051               *dest++ = SOURCE32_TO_DEST(pix);
8571052               curu += dudx;
8581053               curv += dvdx;
r2844r2845
8861081            /* loop over cols */
8871082            for (x = setup->startx; x < endx; x++)
8881083            {
889               const UINT16 *spix = &texbase[(curv >> 16) * texrp + (curu >> 17) * 2];
890               UINT32 pix = ycc_to_rgb(spix[(curu >> 16) & 1] >> 8, spix[0], spix[1]);
1084               UINT32 pix = ycc_to_rgb(GET_TEXEL(yuy16)(texbase, texrp, curu, curv));
8911085               UINT32 r = (SOURCE32_R(pix) * sr) >> 8;
8921086               UINT32 g = (SOURCE32_G(pix) * sg) >> 8;
8931087               UINT32 b = (SOURCE32_B(pix) * sb) >> 8;
r2844r2845
9041098            /* loop over cols */
9051099            for (x = setup->startx; x < endx; x++)
9061100            {
907               const UINT16 *spix = &texbase[(curv >> 16) * texrp + (curu >> 17) * 2];
908               UINT32 pix = ycc_to_rgb(palbase[spix[(curu >> 16) & 1] >> 8], spix[0], spix[1]);
1101               UINT32 pix = ycc_to_rgb(GET_TEXEL(yuy16)(texbase, texrp, curu, curv));
9091102               UINT32 r = (SOURCE32_R(pix) * sr) >> 8;
9101103               UINT32 g = (SOURCE32_G(pix) * sg) >> 8;
9111104               UINT32 b = (SOURCE32_B(pix) * sb) >> 8;
r2844r2845
9451138            /* loop over cols */
9461139            for (x = setup->startx; x < endx; x++)
9471140            {
948               const UINT16 *spix = &texbase[(curv >> 16) * texrp + (curu >> 17) * 2];
949               UINT32 pix = ycc_to_rgb(spix[(curu >> 16) & 1] >> 8, spix[0], spix[1]);
1141               UINT32 pix = ycc_to_rgb(GET_TEXEL(yuy16)(texbase, texrp, curu, curv));
9501142               UINT32 dpix = NO_DEST_READ ? 0 : *dest;
9511143               UINT32 r = (SOURCE32_R(pix) * sr + DEST_R(dpix) * invsa) >> 8;
9521144               UINT32 g = (SOURCE32_G(pix) * sg + DEST_G(dpix) * invsa) >> 8;
r2844r2845
9641156            /* loop over cols */
9651157            for (x = setup->startx; x < endx; x++)
9661158            {
967               const UINT16 *spix = &texbase[(curv >> 16) * texrp + (curu >> 17) * 2];
968               UINT32 pix = ycc_to_rgb(palbase[spix[(curu >> 16) & 1] >> 8], spix[0], spix[1]);
1159               UINT32 pix = ycc_to_rgb(GET_TEXEL(yuy16)(texbase, texrp, curu, curv));
9691160               UINT32 dpix = NO_DEST_READ ? 0 : *dest;
9701161               UINT32 r = (SOURCE32_R(pix) * sr + DEST_R(dpix) * invsa) >> 8;
9711162               UINT32 g = (SOURCE32_G(pix) * sg + DEST_G(dpix) * invsa) >> 8;
r2844r2845
10161207            /* loop over cols */
10171208            for (x = setup->startx; x < endx; x++)
10181209            {
1019               UINT32 pix = texbase[(curv >> 16) * texrp + (curu >> 16)];
1210               UINT32 pix = GET_TEXEL(rgb15)(texbase, texrp, curu, curv);
10201211               *dest++ = SOURCE15_TO_DEST(pix);
10211212               curu += dudx;
10221213               curv += dvdx;
r2844r2845
10291220            /* loop over cols */
10301221            for (x = setup->startx; x < endx; x++)
10311222            {
1032               UINT32 pix = texbase[(curv >> 16) * texrp + (curu >> 16)];
1223               UINT32 pix = GET_TEXEL(rgb15)(texbase, texrp, curu, curv);
10331224               UINT32 r = palbase[(pix >> 10) & 0x1f] >> SRCSHIFT_R;
10341225               UINT32 g = palbase[(pix >> 5) & 0x1f] >> SRCSHIFT_G;
10351226               UINT32 b = palbase[(pix >> 0) & 0x1f] >> SRCSHIFT_B;
r2844r2845
10671258            /* loop over cols */
10681259            for (x = setup->startx; x < endx; x++)
10691260            {
1070               UINT32 pix = texbase[(curv >> 16) * texrp + (curu >> 16)];
1261               UINT32 pix = GET_TEXEL(rgb15)(texbase, texrp, curu, curv);
10711262               UINT32 r = (SOURCE15_R(pix) * sr) >> 8;
10721263               UINT32 g = (SOURCE15_G(pix) * sg) >> 8;
10731264               UINT32 b = (SOURCE15_B(pix) * sb) >> 8;
r2844r2845
10841275            /* loop over cols */
10851276            for (x = setup->startx; x < endx; x++)
10861277            {
1087               UINT32 pix = texbase[(curv >> 16) * texrp + (curu >> 16)];
1278               UINT32 pix = GET_TEXEL(rgb15)(texbase, texrp, curu, curv);
10881279               UINT32 r = (palbase[(pix >> 10) & 0x1f] * sr) >> (8 + SRCSHIFT_R);
10891280               UINT32 g = (palbase[(pix >> 5) & 0x1f] * sg) >> (8 + SRCSHIFT_G);
10901281               UINT32 b = (palbase[(pix >> 0) & 0x1f] * sb) >> (8 + SRCSHIFT_B);
r2844r2845
11241315            /* loop over cols */
11251316            for (x = setup->startx; x < endx; x++)
11261317            {
1127               UINT32 pix = texbase[(curv >> 16) * texrp + (curu >> 16)];
1318               UINT32 pix = GET_TEXEL(rgb15)(texbase, texrp, curu, curv);
11281319               UINT32 dpix = NO_DEST_READ ? 0 : *dest;
11291320               UINT32 r = (SOURCE15_R(pix) * sr + DEST_R(dpix) * invsa) >> 8;
11301321               UINT32 g = (SOURCE15_G(pix) * sg + DEST_G(dpix) * invsa) >> 8;
r2844r2845
11421333            /* loop over cols */
11431334            for (x = setup->startx; x < endx; x++)
11441335            {
1145               UINT32 pix = texbase[(curv >> 16) * texrp + (curu >> 16)];
1336               UINT32 pix = GET_TEXEL(rgb15)(texbase, texrp, curu, curv);
11461337               UINT32 dpix = NO_DEST_READ ? 0 : *dest;
11471338               UINT32 r = ((palbase[(pix >> 10) & 0x1f] >> SRCSHIFT_R) * sr + DEST_R(dpix) * invsa) >> 8;
11481339               UINT32 g = ((palbase[(pix >> 5) & 0x1f] >> SRCSHIFT_G) * sg + DEST_G(dpix) * invsa) >> 8;
r2844r2845
11941385            /* loop over cols */
11951386            for (x = setup->startx; x < endx; x++)
11961387            {
1197               UINT32 pix = texbase[(curv >> 16) * texrp + (curu >> 16)];
1388               UINT32 pix = GET_TEXEL(rgb32)(texbase, texrp, curu, curv);
11981389               *dest++ = SOURCE32_TO_DEST(pix);
11991390               curu += dudx;
12001391               curv += dvdx;
r2844r2845
12071398            /* loop over cols */
12081399            for (x = setup->startx; x < endx; x++)
12091400            {
1210               UINT32 pix = texbase[(curv >> 16) * texrp + (curu >> 16)];
1401               UINT32 pix = GET_TEXEL(rgb32)(texbase, texrp, curu, curv);
12111402               UINT32 r = palbase[(pix >> 16) & 0xff] >> SRCSHIFT_R;
12121403               UINT32 g = palbase[(pix >> 8) & 0xff] >> SRCSHIFT_G;
12131404               UINT32 b = palbase[(pix >> 0) & 0xff] >> SRCSHIFT_B;
r2844r2845
12451436            /* loop over cols */
12461437            for (x = setup->startx; x < endx; x++)
12471438            {
1248               UINT32 pix = texbase[(curv >> 16) * texrp + (curu >> 16)];
1439               UINT32 pix = GET_TEXEL(rgb32)(texbase, texrp, curu, curv);
12491440               UINT32 r = (SOURCE32_R(pix) * sr) >> 8;
12501441               UINT32 g = (SOURCE32_G(pix) * sg) >> 8;
12511442               UINT32 b = (SOURCE32_B(pix) * sb) >> 8;
r2844r2845
12621453            /* loop over cols */
12631454            for (x = setup->startx; x < endx; x++)
12641455            {
1265               UINT32 pix = texbase[(curv >> 16) * texrp + (curu >> 16)];
1456               UINT32 pix = GET_TEXEL(rgb32)(texbase, texrp, curu, curv);
12661457               UINT32 r = (palbase[(pix >> 16) & 0xff] * sr) >> (8 + SRCSHIFT_R);
12671458               UINT32 g = (palbase[(pix >> 8) & 0xff] * sg) >> (8 + SRCSHIFT_G);
12681459               UINT32 b = (palbase[(pix >> 0) & 0xff] * sb) >> (8 + SRCSHIFT_B);
r2844r2845
13021493            /* loop over cols */
13031494            for (x = setup->startx; x < endx; x++)
13041495            {
1305               UINT32 pix = texbase[(curv >> 16) * texrp + (curu >> 16)];
1496               UINT32 pix = GET_TEXEL(rgb32)(texbase, texrp, curu, curv);
13061497               UINT32 dpix = NO_DEST_READ ? 0 : *dest;
13071498               UINT32 r = (SOURCE32_R(pix) * sr + DEST_R(dpix) * invsa) >> 8;
13081499               UINT32 g = (SOURCE32_G(pix) * sg + DEST_G(dpix) * invsa) >> 8;
r2844r2845
13201511            /* loop over cols */
13211512            for (x = setup->startx; x < endx; x++)
13221513            {
1323               UINT32 pix = texbase[(curv >> 16) * texrp + (curu >> 16)];
1514               UINT32 pix = GET_TEXEL(rgb32)(texbase, texrp, curu, curv);
13241515               UINT32 dpix = NO_DEST_READ ? 0 : *dest;
13251516               UINT32 r = ((palbase[(pix >> 16) & 0xff] >> SRCSHIFT_R) * sr + DEST_R(dpix) * invsa) >> 8;
13261517               UINT32 g = ((palbase[(pix >> 8) & 0xff] >> SRCSHIFT_G) * sg + DEST_G(dpix) * invsa) >> 8;
r2844r2845
13721563            /* loop over cols */
13731564            for (x = setup->startx; x < endx; x++)
13741565            {
1375               UINT32 pix = texbase[(curv >> 16) * texrp + (curu >> 16)];
1566               UINT32 pix = GET_TEXEL(argb32)(texbase, texrp, curu, curv);
13761567               UINT32 ta = pix >> 24;
13771568               if (ta != 0)
13781569               {
r2844r2845
13961587            /* loop over cols */
13971588            for (x = setup->startx; x < endx; x++)
13981589            {
1399               UINT32 pix = texbase[(curv >> 16) * texrp + (curu >> 16)];
1590               UINT32 pix = GET_TEXEL(argb32)(texbase, texrp, curu, curv);
14001591               UINT32 ta = pix >> 24;
14011592               if (ta != 0)
14021593               {
r2844r2845
14431634            /* loop over cols */
14441635            for (x = setup->startx; x < endx; x++)
14451636            {
1446               UINT32 pix = texbase[(curv >> 16) * texrp + (curu >> 16)];
1637               UINT32 pix = GET_TEXEL(argb32)(texbase, texrp, curu, curv);
14471638               UINT32 ta = (pix >> 24) * sa;
14481639               if (ta != 0)
14491640               {
r2844r2845
14681659            /* loop over cols */
14691660            for (x = setup->startx; x < endx; x++)
14701661            {
1471               UINT32 pix = texbase[(curv >> 16) * texrp + (curu >> 16)];
1662               UINT32 pix = GET_TEXEL(argb32)(texbase, texrp, curu, curv);
14721663               UINT32 ta = (pix >> 24) * sa;
14731664               if (ta != 0)
14741665               {
r2844r2845
15251716            /* loop over cols */
15261717            for (x = setup->startx; x < endx; x++)
15271718            {
1528               UINT32 pix = texbase[(curv >> 16) * texrp + (curu >> 16)];
1719               UINT32 pix = GET_TEXEL(argb32)(texbase, texrp, curu, curv);
15291720               UINT32 dpix = NO_DEST_READ ? 0 : *dest;
15301721               UINT32 r = (SOURCE32_R(pix) * DEST_R(dpix)) >> (8 - SRCSHIFT_R);
15311722               UINT32 g = (SOURCE32_G(pix) * DEST_G(dpix)) >> (8 - SRCSHIFT_G);
r2844r2845
15411732            /* loop over cols */
15421733            for (x = setup->startx; x < endx; x++)
15431734            {
1544               UINT32 pix = texbase[(curv >> 16) * texrp + (curu >> 16)];
1735               UINT32 pix = GET_TEXEL(argb32)(texbase, texrp, curu, curv);
15451736               UINT32 dpix = NO_DEST_READ ? 0 : *dest;
15461737               UINT32 r = (palbase[(pix >> 16) & 0xff] * DEST_R(dpix)) >> 8;
15471738               UINT32 g = (palbase[(pix >> 8) & 0xff] * DEST_G(dpix)) >> 8;
r2844r2845
15801771            /* loop over cols */
15811772            for (x = setup->startx; x < endx; x++)
15821773            {
1583               UINT32 pix = texbase[(curv >> 16) * texrp + (curu >> 16)];
1774               UINT32 pix = GET_TEXEL(argb32)(texbase, texrp, curu, curv);
15841775               UINT32 dpix = NO_DEST_READ ? 0 : *dest;
15851776               UINT32 r = (SOURCE32_R(pix) * sr * DEST_R(dpix)) >> (16 - SRCSHIFT_R);
15861777               UINT32 g = (SOURCE32_G(pix) * sg * DEST_G(dpix)) >> (16 - SRCSHIFT_G);
r2844r2845
15961787            /* loop over cols */
15971788            for (x = setup->startx; x < endx; x++)
15981789            {
1599               UINT32 pix = texbase[(curv >> 16) * texrp + (curu >> 16)];
1790               UINT32 pix = GET_TEXEL(argb32)(texbase, texrp, curu, curv);
16001791               UINT32 dpix = NO_DEST_READ ? 0 : *dest;
16011792               UINT32 r = (palbase[(pix >> 16) & 0xff] * sr * DEST_R(dpix)) >> 16;
16021793               UINT32 g = (palbase[(pix >> 8) & 0xff] * sg * DEST_G(dpix)) >> 16;
r2844r2845
16471838            /* loop over cols */
16481839            for (x = setup->startx; x < endx; x++)
16491840            {
1650               UINT32 pix = texbase[(curv >> 16) * texrp + (curu >> 16)];
1841               UINT32 pix = GET_TEXEL(argb32)(texbase, texrp, curu, curv);
16511842               UINT32 ta = pix >> 24;
16521843               if (ta != 0)
16531844               {
r2844r2845
16721863            /* loop over cols */
16731864            for (x = setup->startx; x < endx; x++)
16741865            {
1675               UINT32 pix = texbase[(curv >> 16) * texrp + (curu >> 16)];
1866               UINT32 pix = GET_TEXEL(argb32)(texbase, texrp, curu, curv);
16761867               UINT32 ta = pix >> 24;
16771868               if (ta != 0)
16781869               {
r2844r2845
17201911            /* loop over cols */
17211912            for (x = setup->startx; x < endx; x++)
17221913            {
1723               UINT32 pix = texbase[(curv >> 16) * texrp + (curu >> 16)];
1914               UINT32 pix = GET_TEXEL(argb32)(texbase, texrp, curu, curv);
17241915               UINT32 ta = (pix >> 24) * sa;
17251916               if (ta != 0)
17261917               {
r2844r2845
17451936            /* loop over cols */
17461937            for (x = setup->startx; x < endx; x++)
17471938            {
1748               UINT32 pix = texbase[(curv >> 16) * texrp + (curu >> 16)];
1939               UINT32 pix = GET_TEXEL(argb32)(texbase, texrp, curu, curv);
17491940               UINT32 ta = (pix >> 24) * sa;
17501941               if (ta != 0)
17511942               {
r2844r2845
18172008   setup.startu = round_nearest(65536.0f * (float)prim->texture.width * prim->texcoords.tl.u);
18182009   setup.startv = round_nearest(65536.0f * (float)prim->texture.height * prim->texcoords.tl.v);
18192010
1820   /* advance U/V to the middle of the first pixel */
1821   setup.startu += (setup.dudx + setup.dudy) / 2;
1822   setup.startv += (setup.dvdx + setup.dvdy) / 2;
2011   /* advance U/V to the middle of the first texel */
2012   if (!BILINEAR_FILTER)
2013   {
2014      setup.startu += (setup.dudx + setup.dudy) / 2;
2015      setup.startv += (setup.dvdx + setup.dvdy) / 2;
2016   }
18232017
18242018   /* render based on the texture coordinates */
18252019   switch (prim->flags & (PRIMFLAG_TEXFORMAT_MASK | PRIMFLAG_BLENDMODE_MASK))
src/emu/cpuintrf.c
r2844r2845
190190void alpha8301_get_info(UINT32 state, cpuinfo *info);
191191void cdp1802_get_info(UINT32 state, cpuinfo *info);
192192void cop420_get_info(UINT32 state, cpuinfo *info);
193void cop421_get_info(UINT32 state, cpuinfo *info);
193194void cop410_get_info(UINT32 state, cpuinfo *info);
194195void cop411_get_info(UINT32 state, cpuinfo *info);
195196void tmp90840_get_info(UINT32 state, cpuinfo *info);
r2844r2845
766767#if (HAS_COP420)
767768   { CPU_COP420, cop420_get_info },
768769#endif
770#if (HAS_COP421)
771   { CPU_COP421, cop421_get_info },
772#endif
769773#if (HAS_COP410)
770774   { CPU_COP410, cop410_get_info },
771775#endif
src/emu/cpuexec.h
r2844r2845
218218   CPU_ALPHA8301,
219219   CPU_CDP1802,
220220   CPU_COP420,
221   CPU_COP421,
221222   CPU_COP410,
222223   CPU_COP411,
223224   CPU_TMP90840,
src/emu/sound/sn76496.c
r2844r2845
3030   the function is similar than update with 0x80 set to 1
3131
3232  23/04/2007 : Lord Nightmare
33  Major update, implement all three different noise generation algorithms plus
34  the game gear stereo output, and a set_variant call to discern among them.
33  Major update, implement all three different noise generation algorithms and a
34  set_variant call to discern among them.
35
36  TODO: Implement a function for setting stereo regs for the game gear.
37        Requires either making the entire core stereo and forcing mono out for all
38        chips except gamegear, or somehow making the core support both output typesf.
3539***************************************************************************/
3640
3741#include "sndintrf.h"
src/emu/sound/scsp.h
r2844r2845
2525WRITE16_HANDLER( SCSP_MidiIn );
2626READ16_HANDLER( SCSP_MidiOutR );
2727
28extern UINT32* stv_scu;
29
2830#endif
src/emu/sound/gaelco.h
r2844r2845
77   int banks[4];         /* start of each ROM bank */
88};
99
10extern UINT16 *gaelco_sndregs;
11
1012WRITE16_HANDLER( gaelcosnd_w );
1113READ16_HANDLER( gaelcosnd_r );
1214
src/emu/sound/namco.h
r2844r2845
88   int stereo;      /* set to 1 to indicate stereo (e.g., System 1) */
99};
1010
11WRITE8_HANDLER( snkwave_w );
12
1113WRITE8_HANDLER( pacman_sound_enable_w );
1214WRITE8_HANDLER( pacman_sound_w );
1315
src/emu/sound/tms5220.c
r2844r2845
1717     US patent 4,335,277 describes the complete 52xx chip
1818     Special Thanks to Larry Brantingham for answering questions regarding the chip details
1919
20   TMS5200/TMS5220/TMS5220C:
21
22                 +-----------------+
23        D7(d0)   |  1           28 |  /RS
24        ADD1     |  2           27 |  /WS
25        ROMCLK   |  3           26 |  D6(d1)
26        VDD(-5)  |  4           25 |  ADD2
27        VSS(+5)  |  5           24 |  D5(d2)
28        OSC      |  6           23 |  ADD4
29        T11      |  7           22 |  D4(d3)
30        SPKR     |  8           21 |  ADD8/DATA
31        I/O      |  9           20 |  TEST
32        PROMOUT  | 10           19 |  D3(d4)
33        VREF(GND)| 11           18 |  /READY
34        D2(d5)   | 12           17 |  /INT
35        D1(d6)   | 13           16 |  M1
36        D0(d7)   | 14           15 |  M0
37                 +-----------------+
38Note the standard naming for d* data bits with 7 as MSB and 0 as LSB is in lowercase.
39TI's naming has D7 as LSB and D0 as MSB and is in uppercase
40
2041***********************************************************************************************/
2142
2243#include "sndintrf.h"
src/emu/cheat.c
r2844r2845
6868#define DEFAULT_MESSAGE_TIME               (50)
6969#define VARIABLE_MAX_ARRAY                  (0x0F)      /* NOTE : Destination in Move code can only accept variable[0]-[3] only */
7070#define CHEAT_RETURN_VALUE                  (0xFF)
71#define DEFAULT_ADDRESS_LENGTH               (8)
7271#define SAFE_SEARCH_REGION_RANGE            (0xFFFF)
7372
7473/********** BIT FIELD **********/
r2844r2845
228227   CUSTOM_CODE_UNUSED_1,
229228   CUSTOM_CODE_UNUSED_2,
230229   CUSTOM_CODE_UNUSED_3,
231   CUSTOM_CODE_ACTIVATION_KEY_1,
232   CUSTOM_CODE_ACTIVATION_KEY_2,
230   CUSTOM_CODE_ACTIVATION_KEY,
233231   CUSTOM_CODE_PRE_ENABLE,
234232   CUSTOM_CODE_OVER_CLOCK,
235233   CUSTOM_CODE_REFRESH_RATE };
r2844r2845
317315   /* set for one shot cheats after the operation is performed */
318316   kActionFlag_OperationDone =      1 << 3,
319317
318   /* set if the code is memory writing type (Write, IWrite, RWrite, CWrite, CBit, PDWWrite) */
319   kActionFlag_MemoryWrite =      1 << 4,
320
320321   /* set if the extend data field is being used by index adress reading (IWrite, Move) */
321   kActionFlag_IndexAddress =      1 << 4,
322   kActionFlag_IndexAddress =      1 << 5,
322323
323324   /* set if the code uses limited mask which divids data field to 16-bit data and 16-bit mask (IWrite, CBit) */
324   kActionFlag_LimitedMask =      1 << 5,
325   kActionFlag_LimitedMask =      1 << 6,
325326
326327   /* set if the code needs to check the condition (CWrite, CBit, Branch, Popup) */
327   kActionFlag_CheckCondition =   1 << 6,
328   kActionFlag_CheckCondition =   1 << 7,
328329
329330   /* set if the code needs to repeat writing (RWrite) */
330   kActionFlag_Repeat =         1 << 7,
331   kActionFlag_Repeat =         1 << 8,
331332
332333   /* set if the extendData field is being used by 2nd data (PDWWrite) */
333   kActionFlag_PDWWrite =         1 << 8,
334   kActionFlag_PDWWrite =         1 << 9,
334335
335336   /* set if the lastValue field contains valid data and can be restored if needed */
336   kActionFlag_LastValueGood =      1 << 9,
337   kActionFlag_LastValueGood =      1 << 10,
337338
338339   /* set after value changes from prefill value */
339   kActionFlag_PrefillDone =      1 << 10,
340   kActionFlag_PrefillDone =      1 << 11,
340341
341342   /* set after prefill value written */
342   kActionFlag_PrefillWritten =   1 << 11,
343   kActionFlag_PrefillWritten =   1 << 12,
343344
344345   /* set if the code is a label for label-selection code */
345   kActionFlag_IsLabel =         1 << 12,
346   kActionFlag_IsLabel =         1 << 13,
346347
347348   /* set when read/write a data after 1st read/write and clear after 2nd read/write (PDWWrite) */
348   kActionFlag_IsFirst =         1 << 13,
349   kActionFlag_IsFirst =         1 << 14,
349350
350351   /* masks */
351   kActionFlag_StateMask =         kActionFlag_OperationDone |      /* used in ResetAction() to clear specified flags */
352   kActionFlag_StateMask =         kActionFlag_OperationDone |      /* used in reset_action() to clear specified flags */
352353                           kActionFlag_LastValueGood |
353354                           kActionFlag_PrefillDone |
354355                           kActionFlag_PrefillWritten,
r2844r2845
403404
404405   /* true if the cheat has been edited or is a new cheat
405406       checked at auto-save then save the code if true */
407
406408   kCheatFlag_Dirty =               1 << 14,
407409
408410   /* masks */
409   kCheatFlag_StateMask =         kCheatFlag_Active,               // used in ResetAction() and DeactivateCheat() to clear specified flag
411   kCheatFlag_StateMask =         kCheatFlag_Active,               // used in reset_action() and deactivate_cheat() to clear specified flag
410412   kCheatFlag_InfoMask =         kCheatFlag_OneShot |            // used in update_cheat_info() to detect specified flags
411413                           kCheatFlag_Null |
412414                           kCheatFlag_ExtendComment |
r2844r2845
537539enum      /* disposition for resizing a list */
538540{
539541   REQUEST_DISPOSE = 0,
540   NO_DISPOSE,
542   NO_DISPOSE
541543};
542544
543enum      // load flags
545enum      /* database open flags */
544546{
545   kLoadFlag_CheatOption   = 1,
546   kLoadFlag_CheatCode      = 1 << 1,
547   kLoadFlag_UserRegion   = 1 << 2
547   DATABASE_LOAD = 0,
548   DATABASE_SAVE
548549};
549550
550enum      // message types
551enum      /* database load flags */
551552{
552   kCheatMessage_None = 0,
553   kCheatMessage_ReloadCheatOption,
554   kCheatMessage_ReloadCheatCode,
555   kCheatMessage_ReloadUserRegion,
556   kCheatMessage_FailedToLoadDatabase,
557   kCheatMessage_CheatFound,
558   kCheatMessage_1CheatFound,
559   kCheatMessage_SucceededToSave,
560   kCheatMessage_FailedToSave,
561   kCheatMessage_AllCheatSaved,
562   kCheatMessage_ActivationKeySaved,
563   kCheatMessage_NoActivationKey,
564   kCheatMessage_PreEnableSaved,
565   kCheatMessage_SucceededToAdd,
566   kCheatMessage_FailedToAdd,
567   kCheatMessage_SucceededToDelete,
568   kCheatMessage_FailedToDelete,
569   kCheatMessage_NoSearchRegion,
570   kCheatMessage_RestoreValue,
571   kCheatMessage_NoOldValue,
572   kCheatMessage_InitializeMemory,
573   kCheatMessage_InvalidatedRegion,
574   kCheatMessage_FailedToAllocate,
575   kCheatMessage_WrongCode,
553   LOAD_CHEAT_OPTION   = 1,
554   LOAD_CHEAT_CODE      = 1 << 1,
555   LOAD_USER_REGION   = 1 << 2
556};
576557
577   kCheatMessage_Max
558enum      /* message type */
559{
560   CHEAT_MESSAGE_NONE = 0,            /* this message should be unused */
561   CHEAT_MESSAGE_RELOAD_CHEAT_OPTION,
562   CHEAT_MESSAGE_RELOAD_CHEAT_CODE,
563   CHEAT_MESSAGE_RELOAD_USER_REGION,
564   CHEAT_MESSAGE_FAILED_TO_LOAD_DATABASE,
565   CHEAT_MESSAGE_CHEAT_FOUND,
566   CHEAT_MESSAGE_ONE_CHEAT_FOUND,
567   CHEAT_MESSAGE_SUCCEEDED_TO_SAVE,
568   CHEAT_MESSAGE_FAILED_TO_SAVE,
569   CHEAT_MESSAGE_NO_SUPPORTED_OLD_FORMAT,
570   CHEAT_MESSAGE_ALL_CHEATS_SAVED,
571   CHEAT_MESSAGE_ACTIVATION_KEY_SAVED,
572   CHEAT_MESSAGE_NO_ACTIVATION_KEY,
573   CHEAT_MESSAGE_PRE_ENABLE_SAVED,
574   CHEAT_MESSAGE_SUCCEEDED_TO_ADD,
575   CHEAT_MESSAGE_FAILED_TO_ADD,
576   CHEAT_MESSAGE_SUCCEEDED_TO_DELETE,
577   CHEAT_MESSAGE_FAILED_TO_DELETE,
578   CHEAT_MESSAGE_NO_SEARCH_REGION,
579   CHEAT_MESSAGE_RESTORE_VALUE,
580   CHEAT_MESSAGE_NO_OLD_VALUE,
581   CHEAT_MESSAGE_INITIALIZE_MEMORY,
582   CHEAT_MESSAGE_INVALIDATE_REGION,
583   CHEAT_MESSAGE_FAILED_TO_ALLOCATE,
584   CHEAT_MESSAGE_WRONG_CODE,
585
586   CHEAT_MESSAGE_MAX
578587};
579588
580589enum{      // error flags
r2844r2845
644653   INT32         action_list_length;      /* total codes of cheat action. NOTE : minimum length is 1 and 0 is ERROR */
645654   cheat_action   *action_list;         /* pointer to cheat action */
646655
647   int            activation_key1;      /* activation key index for 1st key */
648   int            activation_key2;      /* activation key index for 2nd key */
656   int            activation_key_1;      /* activation key index for 1st key */
657   int            activation_key_2;      /* activation key index for 2nd key */
649658
650659   int            selection;            /* for label-select to set selected label number */
651660   int            label_index_length;      /* total tables of index table. NOTE : minimum length is 1 and 0 is ERROR */
r2844r2845
693702
694703   UINT8   flags;            /* internal flags */
695704
696   UINT8   **cached_pointer;   /* pointer to except standard cpu region */
705   UINT8   **cached_pointer;   /* pointer to read from memory */
697706   const address_map_entry
698         *write_handler;      /* pointer to write handler from address map */
707         *write_handler;      /* pointer of write handler in address map */
699708
700709   UINT8   *first;            /* first value in searching */
701710   UINT8   *last;            /* current value in searching */
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705714   UINT8   *backup_last;      /* previous value in searching */
706715   UINT8   *backup_status;      /* flag of backup */
707716
708   char   name[64];         /* name of this region. NOTE : used in advanced search only */
717   char   name[64];         /* name of this region */
709718
710719   UINT32   num_results;      /* total results */
711720   UINT32   old_num_results;   /* previous total results */
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874883static cpu_region_info      cpu_info_list[MAX_CPU];
875884static cpu_region_info      region_info_list[REGION_LIST_LENGTH];
876885
877static int               found_database = 0;
878static int               cheatsDisabled = 0;
879static int               watchesDisabled = 0;
886static int               found_database;
887static int               cheats_disabled;
888static int               watches_disabled;
880889
881890static int               fullMenuPageHeight;
882891static int               visible_items;
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894903static INT8               stack_index;
895904static cheat_menu_stack      menu_stack[CHEAT_MENU_DEPTH];
896905
897static int               cheatVariable[VARIABLE_MAX_ARRAY] = { 0 };
906static int               cheat_variable[VARIABLE_MAX_ARRAY] = { 0 };
898907
899908static UINT32            cheat_options;
900909static UINT32            driverSpecifiedFlag;
r2844r2845
10621071
10631072static const char *const kRegionNames[] = {
10641073   "INVALID",
1065   "CPU1",      "CPU2",      "CPU3",      "CPU4",      "CPU5",      "CPU6",      "CPU7",      "CPU8",      // 01-08    [01-08] : CPU
1066   "GFX1",      "GFX2",      "GFX3",      "GFX4",      "GFX5",      "GFX6",      "GFX7",      "GFX8",      // 09-16    [08-10] : GFX
1067   "PROMS",                                                                  // 17       [11]    : PROMS
1068   "SOUND1",   "SOUND2",   "SOUND3",   "SOUND4",   "SOUND5",   "SOUND6",   "SOUND7",   "SOUND8",   // 18-25    [12-19] : SOUND
1069   "USER1",   "USER2",   "USER3",   "USER4",   "USER5",   "USER6",   "USER7",   "USER8",   // 26-45    [1A-2D] : USER
1074   "CPU1",      "CPU2",      "CPU3",      "CPU4",      "CPU5",      "CPU6",      "CPU7",      "CPU8",      /* 01-08    [01-08] : CPU */
1075   "GFX1",      "GFX2",      "GFX3",      "GFX4",      "GFX5",      "GFX6",      "GFX7",      "GFX8",      /* 09-16    [08-10] : GFX */
1076   "PROMS",                                                                  /* 17       [11]    : PROMS */
1077   "SOUND1",   "SOUND2",   "SOUND3",   "SOUND4",   "SOUND5",   "SOUND6",   "SOUND7",   "SOUND8",   /* 18-25    [12-19] : SOUND */
1078   "USER1",   "USER2",   "USER3",   "USER4",   "USER5",   "USER6",   "USER7",   "USER8",   /* 26-45    [1A-2D] : USER */
10701079   /* USER9 - PLDS are undefined in old format */
10711080   "USER9",   "USER10",   "USER11",   "USER12",   "USER13",   "USER14",   "USER15",   "USER16",
10721081   "USER17",   "USER18",   "USER19",   "USER20",
1073   "DISKS",                                                                  // 46       [2E]    : DISKS
1074   "PLDS" };                                                                  // 47       [2F]    : PLDS
1082   "DISKS",                                                                  /* 46       [2E]    : DISKS */
1083   "PLDS" };                                                                  /* 47       [2F]    : PLDS */
10751084
10761085static const char *const kNumbersTable[] = {
10771086   "0",   "1",   "2",   "3",   "4",   "5",   "6",   "7",
r2844r2845
11021111   "ASCII"
11031112};
11041113
1114static const char *const CHEAT_MESSAGE_TABLE[] =
1115{
1116   "INVALID MESSAGE!",                     /* this message should be unused */
1117   "cheat option reloaded",               /* RELOAD_CHEAT_OPTION */
1118   "cheat code reloaded",                  /* RELOAD_CHEAT_CODE */
1119   "user defined search region reloaded",      /* RELOAD_USER_REGION */
1120   "failed to load database!",               /* FAILED_TO_LOAD_DATABASE */
1121   "cheats found",                        /* CHEAT_FOUND */
1122   "1 result found, added to list",         /* ONE_CHEAT_FOUND */
1123   "succeeded to save",                  /* SUCCEEDED_TO_SAVE */
1124   "failed to save!",                     /* FAILED_TO_SAVE */
1125   "unsupported old/older format!",         /* NO_SUPPORTED_OLD_FORMAT */
1126   "cheats saved",                        /* ALL_CHEATS_SAVED */
1127   "activation key saved",                  /* ACTIVATION_KEY_SAVED */
1128   "no activation key!",                  /* NO_ACTIVATION_KEY */
1129   "pre-enable saved",                     /* PRE_ENABLE_SAVED */
1130   "succeeded to add",                     /* SUCCEEDED_TO_ADD */
1131   "failed to add!",                     /* FAILED_TO_ADD */
1132   "succeeded to delete",                  /* SUCCEEDED_TO_DELETE */
1133   "failed to delete!",                  /* FAILED_TO_DELETE */
1134   "no search region!",                  /* NO_SEARCH_REGION */
1135   "values restored",                     /* RESTORE_VALUE */
1136   "there are no old values!",               /* NO_OLD_VALUE */
1137   "saved all memory regions",               /* INITIALIZE_MEMOY */
1138   "region invalidated remains results are",   /* INVALIDATE_REGION */
1139   "failed to allocate memory!",            /* FAILED_TO_ALLOCATE */
1140   "found wrong code!"                     /* WRONG_CODE */
1141};
1142
11051143/***************************************************************************
11061144    FUNCTION PROTOTYPES
11071145***************************************************************************/
r2844r2845
11811219static int      select_option_menu(running_machine *machine, cheat_menu_stack *menu);
11821220static int      select_search_menu(running_machine *machine, cheat_menu_stack *menu);
11831221
1222static int      command_cheat_menu(running_machine *machine, cheat_menu_stack *menu);
1223
11841224#ifdef MAME_DEBUG
11851225static int      check_activation_key_code_menu(running_machine *machine, cheat_menu_stack *menu);
11861226static int      view_cpu_region_info_list_menu(running_machine *machine, cheat_menu_stack *menu);
r2844r2845
12491289static void      build_search_regions(running_machine *machine, search_info *info);
12501290
12511291/********** LOADER **********/
1252static int      ConvertOldCode(int code, int cpu, int * data, int * extendData);
1292static int      convert_older_code(int code, int cpu, int *data, int *extend_data);
12531293static int      convert_to_new_code(cheat_action *action);
1254static void      handle_local_command_cheat(running_machine *machine, int cpu, int type, int address, int data, UINT8 format);
1294static void      handle_local_command_cheat(running_machine *machine, int cpu, int type, int address, int data, int extend_data, UINT8 format);
12551295
1296static UINT8   open_cheat_database(mame_file **the_file, char *file_name, UINT8 flag);
1297
12561298static void      load_cheat_option(char *file_name);
12571299static void      load_cheat_code(running_machine *machine, char *file_name);
12581300static void      load_user_defined_search_region(running_machine *machine, char *file_name);
r2844r2845
12621304static void      dispose_cheat_database(void);
12631305
12641306/********** SAVER **********/
1265static void      SaveCheatCode(running_machine *machine, cheat_entry *entry);
1266static void      SaveActivationKey(running_machine *machine, cheat_entry *entry, int entryIndex);
1267static void      SavePreEnable(running_machine *machine, cheat_entry *entry, int entryIndex);
1268static void      Savecheat_options(void);
1269static void      SaveDescription(running_machine *machine);
1270static void      DoAutoSaveCheats(running_machine *machine);
1307static void      save_cheat_code(running_machine *machine, cheat_entry *entry);
1308static void      save_activation_key(running_machine *machine, cheat_entry *entry, int entryIndex);
1309static void      save_pre_enable(running_machine *machine, cheat_entry *entry, int entry_index);
1310static void      save_cheat_options(void);
1311static void      save_description(running_machine *machine);
1312static void      save_raw_code(running_machine *machine);
1313static void      do_auto_save_cheats(running_machine *machine);
12711314
12721315/********** CODE ADDITION **********/
1273static void      AddCheatFromResult(search_info *search, search_region *region, UINT32 address);
1274static void      AddCheatFromFirstResult(search_info *search);
1275static void      AddWatchFromResult(search_info *search, search_region *region, UINT32 address);
1316static void      add_cheat_from_result(search_info *search, search_region *region, UINT32 address);
1317static void      add_cheat_from_first_result(search_info *search);
1318static void      add_watch_from_result(search_info *search, search_region *region, UINT32 address);
12761319
12771320/********** SEARCH **********/
12781321static UINT32   search_sign_extend(search_info *search, UINT32 value);
r2844r2845
12961339static void      do_search(search_info *search);
12971340
12981341/********** MEMORY ACCESSOR **********/
1299static UINT8 **   LookupHandlerMemory(UINT8 cpu, UINT32 address, UINT32 * outRelativeAddress);
1300static UINT8 **   GetMemoryRegionBasePointer(UINT8 cpu, UINT8 space, UINT32 address);
1342static UINT8   **look_up_handler_memory(UINT8 cpu, UINT32 address, UINT32 *out_relative_address);
1343static UINT8   **get_memory_region_base_pointer(UINT8 cpu, UINT8 space, UINT32 address);
13011344
1302static UINT32   DoCPURead(UINT8 cpu, UINT32 address, UINT8 bytes, UINT8 swap);
1303static UINT32   DoMemoryRead(UINT8 * buf, UINT32 address, UINT8 bytes, UINT8 swap, cpu_region_info *info);
1304static void      DoCPUWrite(UINT32 data, UINT8 cpu, UINT32 address, UINT8 bytes, UINT8 swap);
1305static void      DoMemoryWrite(UINT32 data, UINT8 * buf, UINT32 address, UINT8 bytes, UINT8 swap, cpu_region_info *info);
1345static UINT32   do_cpu_read(UINT8 cpu, UINT32 address, UINT8 bytes, UINT8 swap);
1346static UINT32   do_memory_read(UINT8 *buf, UINT32 address, UINT8 bytes, UINT8 swap, cpu_region_info *info);
1347static void      do_cpu_write(UINT32 data, UINT8 cpu, UINT32 address, UINT8 bytes, UINT8 swap);
1348static void      do_memory_write(UINT32 data, UINT8 *buf, UINT32 address, UINT8 bytes, UINT8 swap, cpu_region_info *info);
13061349
1307static UINT32   ReadData(cheat_action *action);
1308static void      WriteData(cheat_action *action, UINT32 data);
1350static UINT32   read_data(cheat_action *action);
1351static void      write_data(cheat_action *action, UINT32 data);
13091352
13101353/********** WATCH **********/
1311static void      WatchCheatEntry(cheat_entry *entry, UINT8 associate);
1312static void      AddActionWatch(cheat_action *action, cheat_entry *entry);
1313static void      RemoveAssociatedWatches(cheat_entry *entry);
1354static void      watch_cheat_entry(cheat_entry *entry, UINT8 associate);
1355static void      add_action_watch(cheat_action *action, cheat_entry *entry);
1356static void      remove_associated_watches(cheat_entry *entry);
13141357
13151358/********** ACTIVE/DEACTIVE ENTRY **********/
1316static void      ResetAction(cheat_action *action);
1317static void      ActivateCheat(cheat_entry *entry);
1318static void      DeactivateCheat(cheat_entry *entry);
1319static void      TempDeactivateCheat(cheat_entry *entry);
1359static void      reset_action(cheat_action *action);
1360static void      activate_cheat(cheat_entry *entry);
1361static void      restore_last_value(cheat_action *action);
1362static void      deactivate_cheat(cheat_entry *entry);
1363static void      temp_deactivate_cheat(cheat_entry *entry);
13201364
13211365/********** OPERATION CORE **********/
13221366static void      cheat_periodicOperation(cheat_action *action);
r2844r2845
13271371/********** CONFIGURE ENTRY **********/
13281372static void      update_all_cheat_info(void);
13291373static void      update_cheat_info(cheat_entry *entry, UINT8 is_load_time);
1330static UINT32   AnalyseCodeFormat(cheat_entry *entry, cheat_action *action);
1374static UINT32   analyse_code_format(cheat_entry *entry, cheat_action *action);
13311375static void      check_code_format(cheat_entry *entry);
1332static void      BuildLabelIndexTable(cheat_entry *entry);
1333static void      SetLayerIndex(void);
1376static void      build_label_index_table(cheat_entry *entry);
1377static void      set_layer_index(void);
13341378
13351379/********** OTHER STUFF **********/
1336static void      DisplayCheatMessage(void);
1380static void      display_cheat_message(void);
13371381static UINT8   get_address_length(UINT8 region);
13381382static char      *get_region_name(UINT8 region);
13391383static void      build_cpu_region_info_list(running_machine *machine);
r2844r2845
13421386    INLINE FUNCTIONS
13431387***************************************************************************/
13441388
1345/*-------------
1346  GetCPUInfo
1347-------------*/
1389/*---------------
1390  get_cpu_info
1391---------------*/
13481392
13491393INLINE cpu_region_info *get_cpu_info(UINT8 cpu)
13501394{
r2844r2845
13541398   return NULL;
13551399}
13561400
1357/*-------------------
1358  GetRegionCPUInfo
1359-------------------*/
1401/*------------------
1402  get_region_info
1403------------------*/
13601404
13611405INLINE cpu_region_info *get_region_info(UINT8 region)
13621406{
r2844r2845
20052049   InitMessCheats(machine);
20062050#endif
20072051
2008   /* initialize flags */
2052   /* initialize flags/parameters */
20092053   current_search_idx   = 0;
2010   found_database   = 0;
2011   cheatsDisabled      = 0;
2012   watchesDisabled      = 0;
2054   found_database      = 0;
2055   cheats_disabled      = 0;
2056   watches_disabled   = 0;
20132057   editActive         = 0;
20142058   editCursor         = 0;
20152059   cheat_options      = DEFAULT_CHEAT_OPTIONS;
r2844r2845
20212065   build_cpu_region_info_list(machine);
20222066
20232067   /* set cheat list from database */
2024   load_cheat_database(machine, kLoadFlag_CheatOption | kLoadFlag_CheatCode);
2068   load_cheat_database(machine, LOAD_CHEAT_OPTION | LOAD_CHEAT_CODE);
20252069
20262070   /* set default search and watch lists */
20272071   resize_search_list(1);
r2844r2845
20322076      search_info *info = get_current_search();
20332077
20342078      /* attemp to load user region */
2035      load_cheat_database(machine, kLoadFlag_UserRegion);
2079      load_cheat_database(machine, LOAD_USER_REGION);
20362080
20372081      /* if no user region or fail to load the database, attempt to build default region */
20382082      if(info->region_list_length)
r2844r2845
20872131
20882132   /* save all cheats automatically if needed */
20892133   if(TEST_FIELD(cheat_options, AutoSaveEnabled))
2090      DoAutoSaveCheats(machine);
2134      do_auto_save_cheats(machine);
20912135
20922136   /* free cheat list */
20932137   dispose_cheat_database();
r2844r2845
21332177   search_list_length      = 0;
21342178   current_search_idx      = 0;
21352179   found_database         = 0;
2136   cheatsDisabled         = 0;
2137   watchesDisabled         = 0;
2180   cheats_disabled         = 0;
2181   watches_disabled      = 0;
21382182   main_database_name[0]   = 0;
21392183   menuItemInfoLength      = 0;
2140   cheatVariable[0]      = 0;
2184   cheat_variable[0]      = 0;
21412185   cheat_options         = 0;
21422186   driverSpecifiedFlag      = 0;
21432187   SET_MESSAGE(0);
r2844r2845
21522196   cheat_menu_stack *menu = &menu_stack[stack_index];
21532197
21542198   /* handle cheat message */
2155   DisplayCheatMessage();
2199   if(message_type)
2200      display_cheat_message();
21562201
21572202   /* handle cheat menu */
21582203   selection = (*menu->handler)(machine, menu);
r2844r2845
25132558   /* first setting 2 : save the value */
25142559   if(menu->first_time)
25152560   {
2516      display_value = is_bcd ? DecimalToBCD(BCDToDecimal(ReadData(action))) : ReadData(action);
2561      display_value = is_bcd ? DecimalToBCD(BCDToDecimal(read_data(action))) : read_data(action);
25172562
25182563      if(display_value < min)
25192564         display_value = min;
r2844r2845
26702715         }
26712716      }
26722717
2673      ActivateCheat(entry);
2718      activate_cheat(entry);
26742719
26752720      menu->sel = -1;
26762721   }
r2844r2845
27952840
27962841         /* set new label index */
27972842         if(entry->selection)
2798            ActivateCheat(entry);
2843            activate_cheat(entry);
27992844         else
2800            DeactivateCheat(entry);
2845            deactivate_cheat(entry);
28012846
28022847         /* NOTE : the index number of master code should be stored into 1st table */
28032848         if(TEST_FIELD(entry->action_list[entry->label_index[0]].type, LabelSelectQuickClose))
r2844r2845
29182963{
29192964   enum
29202965   {
2921      kMenu_EnableDisable = 0,
2922      kMenu_AddEdit,
2923      kMenu_Search,
2924      kMenu_ViewResult,
2925      kMenu_ChooseWatch,
2926      kMenu_Options,
2966      MENU_ENABLE_DISABLE = 0,
2967      MENU_ADD_EDIT,
2968      MENU_SEARCH,
2969      MENU_VIEW_RESULT,
2970      MENU_CHOOSE_WATCH,
2971      MENU_OPTIONS,
2972      MENU_COMMANDS,
29272973#ifdef MAME_DEBUG
2928      kMenu_Debug,
2974      MENU_DEBUG,
29292975#endif
2930      kMenu_Return,
2931      kMenu_Max
2976      MENU_RETURN,
2977      MENU_MAX
29322978   };
29332979
2934   UINT8         total      = 0;
2935   ui_menu_item   menu_item[kMenu_Max + 1];
2980   int            total = 0;
2981   ui_menu_item   menu_item[MENU_MAX + 1];
29362982
2937   /* allocate memory for item list */
29382983   memset(menu_item, 0, sizeof(menu_item));
29392984
29402985   /* first setting : NONE */
r2844r2845
29422987      menu->first_time = 0;
29432988
29442989   /********** MENU CONSTRUCION **********/
2945   /* ##### Enable/Disable a Cheat ##### */
29462990   menu_item[total++].text = "Enable/Disable a Cheat";
2947
2948   /* ##### Add/Edit a Cheat ##### */
29492991   menu_item[total++].text = "Add/Edit a Cheat";
2950
2951   /* ##### Search a Cheat ##### */
29522992   switch(EXTRACT_FIELD(cheat_options, SearchBox))
29532993   {
29542994      case kSearchBox_Minimum:
r2844r2845
29673007         menu_item[total++].text = "Unknown Search Menu";
29683008   }
29693009
2970   /* ##### View Last Result ##### */
29713010   menu_item[total++].text = "View Last Results";
2972
2973   /* ##### Configure Watchpoints ##### */
29743011   menu_item[total++].text = "Configure Watchpoints";
2975
2976   /* ##### Options ##### */
2977   menu_item[total++].text = "Options";
2978
3012   menu_item[total++].text = "Cheat Options";
3013   menu_item[total++].text = "Cheat Commands";
29793014#ifdef MAME_DEBUG
2980   /* ##### Debug  ##### */
29813015   menu_item[total++].text = "Debug Viewer";
29823016#endif
2983
2984   /* ##### Return to the MAME general menu ##### */
29853017   menu_item[total++].text = "Return to Main Menu";
2986
2987   /* ##### Terminate Array ##### */
29883018   menu_item[total].text = NULL;
29893019
3020   /* adjust current cursor position */
29903021   ADJUST_CURSOR(menu->sel, total);
29913022
29923023   /* print it */
r2844r2845
30133044   {
30143045      switch(menu->sel)
30153046      {
3016         case kMenu_EnableDisable:
3047         case MENU_ENABLE_DISABLE:
30173048            cheat_menu_stack_push(enable_disable_cheat_menu, cheat_main_menu, menu->sel);
30183049            break;
30193050
3020         case kMenu_AddEdit:
3051         case MENU_ADD_EDIT:
30213052            cheat_menu_stack_push(add_edit_cheat_menu, cheat_main_menu, 0);
30223053            break;
30233054
3024         case kMenu_Search:
3055         case MENU_SEARCH:
30253056            switch(EXTRACT_FIELD(cheat_options, SearchBox))
30263057            {
30273058               case kSearchBox_Minimum:
r2844r2845
30373068            }
30383069            break;
30393070
3040         case kMenu_ViewResult:
3071         case MENU_VIEW_RESULT:
30413072            cheat_menu_stack_push(view_search_result_menu, menu->handler, menu->sel);
30423073            break;
30433074
3044         case kMenu_ChooseWatch:
3075         case MENU_CHOOSE_WATCH:
30453076            cheat_menu_stack_push(choose_watch_menu, menu->handler, menu->sel);
30463077            break;
30473078
3048         case kMenu_Options:
3079         case MENU_OPTIONS:
30493080            cheat_menu_stack_push(select_option_menu, menu->handler, menu->sel);
30503081            break;
30513082
3083         case MENU_COMMANDS:
3084            cheat_menu_stack_push(command_cheat_menu, menu->handler, menu->sel);
3085            break;
3086
30523087#ifdef MAME_DEBUG
3053         case kMenu_Debug:
3088         case MENU_DEBUG:
30543089            cheat_menu_stack_push(debug_cheat_menu, menu->handler, menu->sel);
30553090            break;
30563091#endif
3057         case kMenu_Return:
3092         case MENU_RETURN:
30583093            menu->sel = -1;
30593094      }
30603095   }
r2844r2845
31863221               }
31873222            }
31883223
3224            if(traverse->flags & kCheatFlag_OldFormat)
3225               traverse->flags &= ~kCheatFlag_RequestArrow;
3226
31893227            /* set highlight flag if comment is set */
31903228            if(traverse->comment && traverse->comment[0])
31913229               flag_buf[total] = 1;
31923230            else
31933231               flag_buf[total] = 0;
3232
31943233            menu_index[total++] = i;
31953234         }
31963235      }
r2844r2845
33873426
33883427               /* NOTE : one shot cheat should not be activated by changing label */
33893428               if(entry->label_index[entry->selection] == 0)
3390                  DeactivateCheat(entry);
3429                  deactivate_cheat(entry);
33913430               else if((entry->flags & kCheatFlag_OneShot) == 0 && (entry->flags & kCheatFlag_Active) == 0)
3392                  ActivateCheat(entry);
3431                  activate_cheat(entry);
33933432            }
33943433         }
33953434         else if(entry->flags & kCheatFlag_LayerIndex)
r2844r2845
34213460
34223461               /* NOTE : one shot cheat should not be activated by changing label */
34233462               if(entry->label_index[entry->selection] == 0)
3424                  DeactivateCheat(entry);
3463                  deactivate_cheat(entry);
34253464               else if((entry->flags & kCheatFlag_OneShot) == 0 && (entry->flags & kCheatFlag_Active) == 0)
3426                  ActivateCheat(entry);
3465                  activate_cheat(entry);
34273466            }
34283467         }
34293468         else if(entry->flags & kCheatFlag_LayerIndex)
r2844r2845
34523491               else
34533492               {
34543493                  if(active)
3455                     ActivateCheat(entry);
3494                     activate_cheat(entry);
34563495                  else
3457                     DeactivateCheat(entry);
3496                     deactivate_cheat(entry);
34583497               }
34593498            }
34603499            break;
r2844r2845
35253564         else
35263565         {
35273566            /* activate selected code */
3528            ActivateCheat(entry);
3567            activate_cheat(entry);
35293568         }
35303569      }
35313570   }
r2844r2845
35353574      {
35363575         /* shift + save : save all codes */
35373576         for(i = 0; i < cheat_list_length; i++)
3538            SaveCheatCode(machine, &cheat_list[i]);
3577            save_cheat_code(machine, &cheat_list[i]);
35393578
3540         SET_MESSAGE(kCheatMessage_AllCheatSaved);
3579         SET_MESSAGE(CHEAT_MESSAGE_ALL_CHEATS_SAVED);
35413580      }
35423581      else if(ControlKeyPressed())
35433582      {
35443583         /* ctrl + save : save activation key */
3545         SaveActivationKey(machine, entry, menu_index[menu->sel]);
3584         save_activation_key(machine, entry, menu_index[menu->sel]);
35463585      }
35473586      else if(AltKeyPressed())
35483587      {
35493588         /* alt + save : save pre-enable */
3550         SavePreEnable(machine, entry, menu_index[menu->sel]);
3589         save_pre_enable(machine, entry, menu_index[menu->sel]);
35513590      }
35523591   }
35533592   else if(input_ui_pressed(machine, IPT_UI_ADD_CHEAT))
r2844r2845
35593598      if(entry)
35603599         delete_cheat_at(menu_index[menu->sel]);
35613600      else
3562         SET_MESSAGE(kCheatMessage_FailedToDelete);
3601         SET_MESSAGE(CHEAT_MESSAGE_FAILED_TO_DELETE);
35633602   }
35643603   else if(input_ui_pressed(machine, IPT_UI_EDIT_CHEAT))
35653604   {
r2844r2845
35703609   }
35713610   else if(input_ui_pressed(machine, IPT_UI_WATCH_VALUE))
35723611   {
3573      WatchCheatEntry(entry, 0);
3612      watch_cheat_entry(entry, 0);
35743613   }
35753614   else if(input_ui_pressed(machine, IPT_UI_RELOAD_CHEAT))
35763615   {
r2844r2845
36973736      {
36983737         /* shift + save = save all codes */
36993738         for(i = 0; i < cheat_list_length; i++)
3700            SaveCheatCode(machine, &cheat_list[i]);
3739            save_cheat_code(machine, &cheat_list[i]);
37013740
3702         SET_MESSAGE(kCheatMessage_AllCheatSaved);
3741         SET_MESSAGE(CHEAT_MESSAGE_ALL_CHEATS_SAVED);
37033742      }
37043743      else if(ControlKeyPressed())
37053744      {
37063745         if((entry->flags & kCheatFlag_HasActivationKey1) || (entry->flags & kCheatFlag_HasActivationKey2))
37073746            /* ctrl + save = save activation key */
3708            SaveActivationKey(machine, entry, menu->sel);
3747            save_activation_key(machine, entry, menu->sel);
37093748      }
37103749      else if(AltKeyPressed())
37113750      {
37123751         /* alt + save = save pre-enable code */
3713         SavePreEnable(machine, entry, menu->sel);
3752         save_pre_enable(machine, entry, menu->sel);
37143753      }
37153754      else
37163755      {
3717         SaveCheatCode(machine, entry);
3756         save_cheat_code(machine, entry);
37183757      }
37193758   }
37203759   else if(input_ui_pressed(machine, IPT_UI_WATCH_VALUE))
37213760   {
3722      WatchCheatEntry(entry, 0);
3761      watch_cheat_entry(entry, 0);
37233762   }
37243763   else if(input_ui_pressed(machine, IPT_UI_CANCEL))
37253764   {
r2844r2845
37403779      kMenu_ReloadDatabase,
37413780      kMenu_WatchCheat,
37423781      kMenu_SaveCheat,
3743      kMenu_SaveActivationKey,
3744      kMenu_SavePreEnable,
3782      kMenu_save_activation_key,
3783      kMenu_save_pre_enable,
37453784      kMenu_SaveAllCodes,
37463785      kMenu_AddCode,
37473786      kMenu_DeleteCode,
r2844r2845
38263865            break;
38273866
38283867         case kMenu_WatchCheat:
3829            WatchCheatEntry(entry, 0);
3868            watch_cheat_entry(entry, 0);
38303869            break;
38313870
38323871         case kMenu_SaveCheat:
3833            SaveCheatCode(machine, entry);
3872            save_cheat_code(machine, entry);
38343873            break;
38353874
3836         case kMenu_SaveActivationKey:
3837            SaveActivationKey(machine, entry, menu->pre_sel);
3875         case kMenu_save_activation_key:
3876            save_activation_key(machine, entry, menu->pre_sel);
38383877            break;
38393878
3840         case kMenu_SavePreEnable:
3841            SavePreEnable(machine, entry, menu->pre_sel);
3879         case kMenu_save_pre_enable:
3880            save_pre_enable(machine, entry, menu->pre_sel);
38423881            break;
38433882
38443883         case kMenu_SaveAllCodes:
38453884            {
38463885               for(i = 0; i < cheat_list_length; i++)
3847                  SaveCheatCode(machine, &cheat_list[i]);
3886                  save_cheat_code(machine, &cheat_list[i]);
38483887
3849               SET_MESSAGE(kCheatMessage_AllCheatSaved);
3888               SET_MESSAGE(CHEAT_MESSAGE_ALL_CHEATS_SAVED);
38503889            }
38513890            break;
38523891
r2844r2845
55625601   {
55635602      if(input_ui_pressed(machine, IPT_UI_SAVE_CHEAT))
55645603      {
5565         SaveCheatCode(machine, entry);
5604         save_cheat_code(machine, entry);
55665605      }
55675606      else if(input_ui_pressed(machine, IPT_UI_WATCH_VALUE))
55685607      {
5569         WatchCheatEntry(entry, 0);
5608         watch_cheat_entry(entry, 0);
55705609      }
55715610      else if(input_ui_pressed(machine, IPT_UI_ADD_CHEAT))
55725611      {
r2844r2845
55895628         if(!info->sub_cheat)
55905629         {
55915630            /* don't delete MASTER Action due to crash */
5592            SET_MESSAGE(kCheatMessage_FailedToDelete);
5631            SET_MESSAGE(CHEAT_MESSAGE_FAILED_TO_DELETE);
55935632         }
55945633         else
55955634            DeleteActionAt(entry, info->sub_cheat);
r2844r2845
56075646   {
56085647      /* NOTE : building label index table should be done when exit the edit menu */
56095648      if(entry->flags & kCheatFlag_Select)
5610         BuildLabelIndexTable(entry);
5649         build_label_index_table(entry);
56115650
56125651      check_code_format(entry);
56135652
r2844r2845
57945833      if(entry->flags & kCheatFlag_HasActivationKey1)
57955834      {
57965835         activation_key_string1 = astring_alloc();
5797         ADD_MENU_3_ITEMS("Activation Key - Prev", astring_c(input_code_name(activation_key_string1, entry->activation_key1)), kViewMenu_ActivationKey1);
5836         ADD_MENU_3_ITEMS("Activation Key - Prev", astring_c(input_code_name(activation_key_string1, entry->activation_key_1)), kViewMenu_ActivationKey1);
57985837      }
57995838
58005839      if(entry->flags & kCheatFlag_HasActivationKey2)
58015840      {
58025841         activation_key_string2 = astring_alloc();
5803         ADD_MENU_3_ITEMS("Activation Key - Next", astring_c(input_code_name(activation_key_string2, entry->activation_key2)), kViewMenu_ActivationKey2);
5842         ADD_MENU_3_ITEMS("Activation Key - Next", astring_c(input_code_name(activation_key_string2, entry->activation_key_2)), kViewMenu_ActivationKey2);
58045843      }
58055844   }
58065845   else
r2844r2845
58085847      if(entry->flags & kCheatFlag_HasActivationKey1)
58095848      {
58105849         activation_key_string1 = astring_alloc();
5811         ADD_MENU_3_ITEMS("Activation Key", astring_c(input_code_name(activation_key_string1, entry->activation_key1)), kViewMenu_ActivationKey1);
5850         ADD_MENU_3_ITEMS("Activation Key", astring_c(input_code_name(activation_key_string1, entry->activation_key_1)), kViewMenu_ActivationKey1);
58125851      }
58135852   }
58145853
r2844r2845
58295868   /* ##### CODE TYPE ##### */
58305869   if(action->flags & kActionFlag_Custom)
58315870   {
5832      ADD_MENU_3_ITEMS("Custom Type", kCustomCodeTypeNames[EXTRACT_FIELD(action->type, CodeType)], kViewMenu_CodeType);
5871      ADD_MENU_3_ITEMS("Custom Type", kCustomCodeTypeNames[action->region - CUSTOM_CODE], kViewMenu_CodeType);
58335872   }
58345873   else
58355874   {
r2844r2845
58715910            ADD_MENU_3_ITEMS("Condition", kConditionNames[EXTRACT_FIELD(action->type, CodeParameter)], kViewMenu_Condition);
58725911         }
58735912
5874         sprintf(buf_extend, "%*.*X", kCheatSizeDigitsTable[address_size], kCheatSizeDigitsTable[address_size], action->extend_data);
5875
5876         ADD_MENU_3_ITEMS("Comparison", buf_extend, kViewMenu_Extend);
5913         if(EXTRACT_FIELD(action->type, CodeParameter) != kCondition_PreviousValue)
5914         {
5915            sprintf(buf_extend, "%*.*X", kCheatSizeDigitsTable[address_size], kCheatSizeDigitsTable[address_size], action->extend_data);
5916            ADD_MENU_3_ITEMS("Comparison", buf_extend, kViewMenu_Extend);
5917         }
58775918      }
58785919
58795920      if(code_type == kCodeType_Popup)
r2844r2845
59235964      }
59245965
59255966      /* ##### DATA ##### */
5926      if(code_type != kCodeType_Watch)
5967      if(action->flags & kActionFlag_MemoryWrite)
59275968      {
59285969         if(action->flags & kActionFlag_LimitedMask)
59295970         {
5930            /* NOTE : data is upper 2 bytes from data field in case of limite mask */
5971            /* NOTE : data is upper 2 bytes from data field in case of limited mask */
59315972            if(TEST_FIELD(action->type, DataRead))
59325973               sprintf(buf_data, "V%s", kNumbersTable[EXTRACT_FIELD(action->original_data, MSB16)]);
59335974            else
r2844r2845
59766017      if(code_type == kCodeType_Branch)
59776018      {
59786019         /* jump index for branch */
5979         sprintf(buf_extend, "%2.2d", action->extend_data + 1);
6020         sprintf(buf_extend, "%2.2d", action->original_data + 1);
59806021         ADD_MENU_3_ITEMS("Jump Index", buf_extend, kViewMenu_Extend);
59816022      }
59826023
r2844r2845
60036044   else
60046045   {
60056046      /* ##### CUSTOM CODE PARAMETER ##### */
6006      if(EXTRACT_FIELD(action->type, CodeType) == CUSTOM_CODE_LAYER_TAG)
6047      if(action->region == CUSTOM_CODE_LAYER_TAG)
60076048      {
60086049         /* ##### LAYER TAG ##### */
60096050         sprintf(buf_address, "%2.2X", action->original_address);
r2844r2845
60686109   }
60696110   else if(input_ui_pressed(machine, IPT_UI_SAVE_CHEAT))
60706111   {
6071      SaveCheatCode(machine, entry);
6112      save_cheat_code(machine, entry);
60726113   }
60736114
60746115   if(activation_key_string1)
r2844r2845
60856126
60866127static int analyse_cheat_menu(running_machine *machine, cheat_menu_stack *menu)
60876128{
6088   static const char *const kAnalyseItemName[] = {
6129   static const char *const FORMAT_ERROR_MESSAGE_TABLE[] = {
60896130      "Invalid Location Type",
60906131      "Invalid Operation",
60916132      "Invalid Code Type",
r2844r2845
61306171   {
61316172      cheat_action *action = &entry->action_list[i];
61326173
6133      UINT32 flags = AnalyseCodeFormat(entry, action);
6174      UINT32 flags = analyse_code_format(entry, action);
61346175
61356176      menu_item[total++] = action->optional_name ? action->optional_name : "(Null)";
61366177      menu_item[total++] = MENU_SEPARATOR_ITEM;
r2844r2845
61406181         for(j = 0; j < kErrorFlag_Max; j++)
61416182         {
61426183            if((flags >> j) & 1)
6143               menu_item[total++] = kAnalyseItemName[j];
6184               menu_item[total++] = FORMAT_ERROR_MESSAGE_TABLE[j];
61446185         }
61456186      }
61466187      else
r2844r2845
62326273   const char      * menuSubItem[kMenu_Max + 1]   = { 0 };
62336274   char         flagBuf[kMenu_Max + 1]         = { 0 };
62346275   char         cpuBuf[4];
6235   char         valueBuf[32];      // "FFFFFFF[F] (4294967295)"    23 chars
6236   char         timerBuf[32];      // "-FFFFFFF[F] (4294967295)"   24 chars
6276   char         valueBuf[32];      /* "FFFFFFF[F] (4294967295)"   23 chars */
6277   char         timerBuf[32];      /* "-FFFFFFF[F] (4294967295)"  24 chars */
62376278   char         numResultsBuf[16];
62386279   char         * stringsBuf;
62396280   search_info      *search = get_current_search();
r2844r2845
66936734               else
66946735               {
66956736                  /* if no search region (eg, sms.c in HazeMD), don't open result viewer to avoid the crash */
6696                  SET_MESSAGE(kCheatMessage_NoSearchRegion);
6737                  SET_MESSAGE(CHEAT_MESSAGE_NO_SEARCH_REGION);
66976738               }
66986739               break;
66996740
r2844r2845
67476788      update_search(search);
67486789
67496790      if(doneSaveMemory || menu->sel == kMenu_Value)
6750         SET_MESSAGE(kCheatMessage_CheatFound);
6791         SET_MESSAGE(CHEAT_MESSAGE_CHEAT_FOUND);
67516792      else
6752         SET_MESSAGE(kCheatMessage_InitializeMemory);
6793         SET_MESSAGE(CHEAT_MESSAGE_INITIALIZE_MEMORY);
67536794
67546795      doneSaveMemory = 1;
67556796
67566797      if(search->num_results == 1)
67576798      {
6758         AddCheatFromFirstResult(search);
6799         add_cheat_from_first_result(search);
67596800
6760         SET_MESSAGE(kCheatMessage_1CheatFound);
6801         SET_MESSAGE(CHEAT_MESSAGE_ONE_CHEAT_FOUND);
67616802      }
67626803   }
67636804
r2844r2845
72667307      doneSaveMemory = 1;
72677308
72687309      if(search->num_results == 1)
7269         AddCheatFromFirstResult(search);
7310         add_cheat_from_first_result(search);
72707311   }
72717312
72727313   /********** EDIT **********/
r2844r2845
77067747
77077748               if(search->num_results == 1)
77087749               {
7709                  AddCheatFromFirstResult(search);
7750                  add_cheat_from_first_result(search);
77107751
77117752                  popmessage("1 result found, added to list");
77127753               }
r2844r2845
79608001         build_search_regions(machine, search);
79618002      else
79628003         /* rebuild search region from user-defined map */
7963         load_cheat_database(machine, kLoadFlag_UserRegion);
8004         load_cheat_database(machine, LOAD_USER_REGION);
79648005   }
79658006
79668007   if(do_reallocate)
r2844r2845
82468287   else if(input_ui_pressed(machine, IPT_UI_ADD_CHEAT))
82478288   {
82488289      if(selectedAddressGood)
8249         AddCheatFromResult(search, region, selectedAddress);
8290         add_cheat_from_result(search, region, selectedAddress);
82508291   }
82518292   else if(input_ui_pressed(machine, IPT_UI_DELETE_CHEAT))
82528293   {
r2844r2845
82638304         search->num_results--;
82648305         region->num_results--;
82658306
8266         SET_MESSAGE(kCheatMessage_SucceededToDelete);
8307         SET_MESSAGE(CHEAT_MESSAGE_SUCCEEDED_TO_DELETE);
82678308      }
82688309   }
82698310   else if(input_ui_pressed(machine, IPT_UI_WATCH_VALUE))
82708311   {
82718312      if(selectedAddressGood)
8272         AddWatchFromResult(search, region, selectedAddress);
8313         add_watch_from_result(search, region, selectedAddress);
82738314   }
82748315   else if(input_ui_pressed(machine, IPT_UI_SELECT) || input_ui_pressed(machine, IPT_UI_CANCEL))
82758316      menu->sel = -1;
r2844r2845
83568397   UINT8         total         = 0;
83578398   const char      ** menuItem;
83588399   char         ** buf;
8359   char         * stringsBuf;   // "USER20 FFFFFFFF (99:32 Bit)"    27 chars
8400   char         *stringsBuf;   /* "USER20 FFFFFFFF (99:32 Bit)" 27 chars */
83608401   watch_info      *watch;
83618402
83628403   /* first setting : NONE */
r2844r2845
85588599            add_cheat_from_watch_as_watch(entry, watch);
85598600
85608601            /* when fails to add, delete this entry because it causes the crash */
8561            if(message_type == kCheatMessage_FailedToAdd)
8602            if(message_type == CHEAT_MESSAGE_FAILED_TO_ADD)
85628603            {
85638604               delete_cheat_at(cheat_list_length - 1);
8564               SET_MESSAGE(kCheatMessage_FailedToAdd);
8605               SET_MESSAGE(CHEAT_MESSAGE_FAILED_TO_ADD);
85658606            }
85668607         }
85678608         else
r2844r2845
86138654         memset(&entry, 0, sizeof(cheat_entry));
86148655
86158656         add_cheat_from_watch_as_watch(&entry, watch);
8616         SaveCheatCode(machine, &entry);
8657         save_cheat_code(machine, &entry);
86178658         dispose_cheat(&entry);
86188659      }
86198660   }
r2844r2845
87648805            add_cheat_from_watch_as_watch(new_entry, entry);
87658806
87668807            /* when fails to add, delete this entry because it causes the crash */
8767            if(message_type == kCheatMessage_FailedToAdd)
8808            if(message_type == CHEAT_MESSAGE_FAILED_TO_ADD)
87688809            {
87698810               delete_cheat_at(cheat_list_length - 1);
8770               SET_MESSAGE(kCheatMessage_FailedToAdd);
8811               SET_MESSAGE(CHEAT_MESSAGE_FAILED_TO_ADD);
87718812            }
87728813         }
87738814         break;
r2844r2845
87838824            memset(&temp_entry, 0, sizeof(cheat_entry));
87848825
87858826            add_cheat_from_watch_as_watch(&temp_entry, entry);
8786            SaveCheatCode(machine, &temp_entry);
8827            save_cheat_code(machine, &temp_entry);
87878828            dispose_cheat(&temp_entry);
87888829         }
87898830         break;
r2844r2845
92809321         memset(&temp_entry, 0, sizeof(cheat_entry));
92819322
92829323         add_cheat_from_watch_as_watch(&temp_entry, entry);
9283         SaveCheatCode(machine, &temp_entry);
9324         save_cheat_code(machine, &temp_entry);
92849325         dispose_cheat(&temp_entry);
92859326      }
92869327   }
r2844r2845
92979338   enum{
92989339      kMenu_SelectSearch = 0,
92999340      kMenu_Loadcheat_options,
9300      kMenu_Savecheat_options,
9341      kMenu_save_cheat_options,
93019342      kMenu_Resetcheat_options,
93029343      kMenu_Separator,
93039344      kMenu_SearchDialogStyle,
r2844r2845
94879528            break;
94889529
94899530         case kMenu_Loadcheat_options:
9490            load_cheat_database(machine, kLoadFlag_CheatOption);
9531            load_cheat_database(machine, LOAD_CHEAT_OPTION);
94919532            break;
94929533
9493         case kMenu_Savecheat_options:
9494            Savecheat_options();
9534         case kMenu_save_cheat_options:
9535            save_cheat_options();
94959536            break;
94969537
94979538         case kMenu_Resetcheat_options:
r2844r2845
95049545   }
95059546   else if(input_ui_pressed(machine, IPT_UI_SAVE_CHEAT))
95069547   {
9507      Savecheat_options();
9548      save_cheat_options();
95089549   }
95099550   else if(input_ui_pressed(machine, IPT_UI_RELOAD_CHEAT))
95109551   {
9511      load_cheat_database(machine, kLoadFlag_CheatOption);
9552      load_cheat_database(machine, LOAD_CHEAT_OPTION);
95129553   }
95139554   else if(input_ui_pressed(machine, IPT_UI_CANCEL))
95149555   {
r2844r2845
96429683   return menu->sel;
96439684}
96449685
9686/*-----------------------------------------------------------------
9687  command_cheat_menu - management for cheat general command menu
9688-----------------------------------------------------------------*/
9689
9690static int command_cheat_menu(running_machine *machine, cheat_menu_stack *menu)
9691{
9692   enum{
9693      MENU_RELOAD_CHEAT_CODE = 0,
9694      MENU_SEPARATOR_1,
9695      MENU_TOGGLE_CHEAT,
9696      MENU_TOGGLE_WATCHPOINT,
9697      MENU_SEPARATOR_2,
9698      MENU_SAVE_DESCRIPTION,
9699      MENU_SAVE_RAW_CODE,
9700      MENU_SEPARATOR_3,
9701      MENU_RETURN,
9702      MENU_MAX };
9703
9704   int            total   = 0;
9705   int            toggle   = 0;
9706   ui_menu_item   menu_item[MENU_MAX + 1];
9707
9708   memset(menu_item, 0 , sizeof(menu_item));
9709
9710   /* first setting : NONE */
9711   if(menu->first_time)
9712      menu->first_time = 0;
9713
9714   /********** MENU CONSTRUCION **********/
9715   menu_item[total++].text = "Reload Cheat Codes";
9716   menu_item[total++].text = MENU_SEPARATOR_ITEM;
9717   if(cheats_disabled)   menu_item[total++].text = "Cheat OFF";
9718   else            menu_item[total++].text = "Cheat ON";
9719   if(watches_disabled)   menu_item[total++].text = "Watchpoints OFF";
9720   else               menu_item[total++].text = "Watchpoints ON";
9721   menu_item[total++].text = MENU_SEPARATOR_ITEM;
9722   menu_item[total++].text = "Save Description";
9723   menu_item[total++].text = "Save Raw Code";
9724   menu_item[total++].text = MENU_SEPARATOR_ITEM;
9725   menu_item[total++].text = "Return to Prior Menu";
9726   menu_item[total].text = NULL;
9727
9728   /* adjust current cursor position */
9729   ADJUST_CURSOR(menu->sel, total);
9730
9731   /* print it */
9732   ui_menu_draw(menu_item, total, menu->sel, NULL);
9733
9734   /********** KEY HANDLING **********/
9735   if(ui_pressed_repeat_throttle(machine, IPT_UI_UP, kVerticalKeyRepeatRate))
9736   {
9737      CURSOR_TO_PREVIOUS(menu->sel, total);
9738
9739      if(menu->sel == MENU_SEPARATOR_1 || menu->sel == MENU_SEPARATOR_2 || menu->sel == MENU_SEPARATOR_3)
9740         menu->sel--;
9741   }
9742   else if(ui_pressed_repeat_throttle(machine, IPT_UI_DOWN, kVerticalKeyRepeatRate))
9743   {
9744      CURSOR_TO_NEXT(menu->sel, total);
9745
9746      if(menu->sel == MENU_SEPARATOR_1 || menu->sel == MENU_SEPARATOR_2 || menu->sel == MENU_SEPARATOR_3)
9747         menu->sel++;
9748   }
9749   else if(ui_pressed_repeat_throttle(machine, IPT_UI_PAGE_UP, kVerticalKeyRepeatRate))
9750   {
9751      CURSOR_PAGE_UP(menu->sel);
9752   }
9753   else if(ui_pressed_repeat_throttle(machine, IPT_UI_PAGE_DOWN, kVerticalKeyRepeatRate))
9754   {
9755      CURSOR_PAGE_DOWN(menu->sel, total);
9756   }
9757   else if(ui_pressed_repeat_throttle(machine, IPT_UI_LEFT, kHorizontalSlowKeyRepeatRate))
9758   {
9759      toggle = 1;
9760   }
9761   else if(ui_pressed_repeat_throttle(machine, IPT_UI_RIGHT, kHorizontalSlowKeyRepeatRate))
9762   {
9763      toggle = 1;
9764   }
9765   else if(input_ui_pressed(machine, IPT_UI_SELECT))
9766   {
9767      switch(menu->sel)
9768      {
9769         case MENU_RELOAD_CHEAT_CODE:
9770            reload_cheat_database(machine);
9771            break;
9772
9773         case MENU_TOGGLE_CHEAT:
9774         case MENU_TOGGLE_WATCHPOINT:
9775            toggle = 1;
9776            break;
9777
9778         case MENU_SAVE_DESCRIPTION:
9779            save_description(machine);
9780            break;
9781
9782         case MENU_SAVE_RAW_CODE:
9783            save_raw_code(machine);
9784            break;
9785
9786         case MENU_RETURN:
9787            menu->sel = -1;
9788            break;
9789      }
9790   }
9791   else if(input_ui_pressed(machine, IPT_UI_CANCEL))
9792   {
9793      menu->sel = -1;
9794   }
9795
9796   if(toggle)
9797   {
9798      if(menu->sel == MENU_TOGGLE_CHEAT)            cheats_disabled ^= 1;
9799      else if(menu->sel == MENU_TOGGLE_WATCHPOINT)   watches_disabled ^= 1;
9800   }
9801
9802   return menu->sel + 1;
9803}
9804
96459805#ifdef MAME_DEBUG
96469806/*-----------------------------------------------------------------------
96479807  check_activation_key_code_menu - key code checker for activation key
r2844r2845
1003410194      if(ShiftKeyPressed())
1003510195      {
1003610196         /* ##### WATCHPOINT ##### */
10037         watchesDisabled ^= 1;
10197         watches_disabled ^= 1;
1003810198
10039         ui_popup_time(1, "Watchpoints %s", watchesDisabled ? "Off" : "On");
10199         ui_popup_time(1, "Watchpoints %s", watches_disabled ? "Off" : "On");
1004010200      }
1004110201      else
1004210202      {
1004310203         /* ##### CHEAT ##### */
10044         cheatsDisabled ^= 1;
10204         cheats_disabled ^= 1;
1004510205
10046         ui_popup_time(1, "Cheats %s", cheatsDisabled ? "Off" : "On");
10206         ui_popup_time(1, "Cheats %s", cheats_disabled ? "Off" : "On");
1004710207
10048         if(cheatsDisabled)
10208         if(cheats_disabled)
1004910209         {
1005010210            for(i = 0; i < cheat_list_length; i++)
10051               TempDeactivateCheat(&cheat_list[i]);
10211               temp_deactivate_cheat(&cheat_list[i]);
1005210212         }
1005310213      }
1005410214   }
1005510215
10056   if(cheatsDisabled)
10216   if(cheats_disabled)
1005710217      return;
1005810218
1005910219   for(i = 0; i < cheat_list_length; i++)
r2844r2845
1013810298{
1013910299   int i;
1014010300
10141   if(watchesDisabled)
10301   if(watches_disabled)
1014210302      return;
1014310303
1014410304   for(i = 0; i < watch_list_length; i++)
r2844r2845
1018610346               switch(EXTRACT_FIELD(info->cpu, AddressSpace))
1018710347               {
1018810348                  case kAddressSpace_Program:
10189                     data = (DoCPURead(cpu, address, kSearchByteIncrementTable[info->element_bytes], cpu_needs_swap(cpu)) + info->add_value) & kSearchByteMaskTable[info->element_bytes];
10349                     data = (do_cpu_read(cpu, address, kSearchByteIncrementTable[info->element_bytes], cpu_needs_swap(cpu)) + info->add_value) & kSearchByteMaskTable[info->element_bytes];
1019010350                     break;
1019110351
1019210352                  case kAddressSpace_DataSpace:
1019310353                  case kAddressSpace_IOSpace:
1019410354                  case kAddressSpace_OpcodeRAM:
1019510355                  {
10196                     UINT8 * buf = (UINT8 *) GetMemoryRegionBasePointer(cpu, EXTRACT_FIELD(info->cpu, AddressSpace), address);
10356                     UINT8 *buf = (UINT8 *)get_memory_region_base_pointer(cpu, EXTRACT_FIELD(info->cpu, AddressSpace), address);
1019710357
1019810358                     if(buf)
10199                        data =   DoMemoryRead(buf, address, kSearchByteIncrementTable[info->element_bytes], cpu_needs_swap(cpu) + info->add_value, get_cpu_info(cpu)) &
10359                        data =   do_memory_read(buf, address, kSearchByteIncrementTable[info->element_bytes], cpu_needs_swap(cpu) + info->add_value, get_cpu_info(cpu)) &
1020010360                              kSearchByteMaskTable[info->element_bytes];
1020110361                  }
1020210362                  break;
r2844r2845
1021010370               UINT8 * buf = memory_region(info->cpu);
1021110371
1021210372               if(buf)
10213                  data =   DoMemoryRead(buf, address, kSearchByteIncrementTable[info->element_bytes],
10373                  data =   do_memory_read(buf, address, kSearchByteIncrementTable[info->element_bytes],
1021410374                        region_needs_swap(info->cpu) + info->add_value,
1021510375                        get_region_info(info->cpu)) & kSearchByteMaskTable[info->element_bytes];
1021610376            }
r2844r2845
1034310503   cheat_list[idx].action_list[0].extend_data = ~0;
1034410504   cheat_list[idx].action_list[0].last_value = NULL;
1034510505
10346   SET_MESSAGE(kCheatMessage_SucceededToAdd);
10506   SET_MESSAGE(CHEAT_MESSAGE_SUCCEEDED_TO_ADD);
1034710507}
1034810508
1034910509/*------------------------------------------------
r2844r2845
1035510515   /* if selected point is not cheat entry, no action */
1035610516   if(idx >= cheat_list_length)
1035710517   {
10358      SET_MESSAGE(kCheatMessage_FailedToDelete);
10518      SET_MESSAGE(CHEAT_MESSAGE_FAILED_TO_DELETE);
1035910519      return;
1036010520   }
1036110521
r2844r2845
1037110531   /* realloc cheat entry */
1037210532   resize_cheat_list(cheat_list_length - 1, NO_DISPOSE);
1037310533
10374   SET_MESSAGE(kCheatMessage_SucceededToDelete);
10534   SET_MESSAGE(CHEAT_MESSAGE_SUCCEEDED_TO_DELETE);
1037510535}
1037610536
1037710537/*--------------------------------------------------------------------------------
r2844r2845
1048210642{
1048310643   if(idx >= entry->actionListLength)
1048410644   {
10485      SET_MESSAGE(kCheatMessage_FailedToDelete);
10645      SET_MESSAGE(CHEAT_MESSAGE_FAILED_TO_DELETE);
1048610646      return;
1048710647   }
1048810648
r2844r2845
1049310653
1049410654   ResizeCheatActionListNoDispose(entry, entry->actionListLength - 1);
1049510655
10496   SET_MESSAGE(kCheatMessage_SucceededToDelete);
10656   SET_MESSAGE(CHEAT_MESSAGE_SUCCEEDED_TO_DELETE);
1049710657}
1049810658#endif
1049910659/*----------------------------------------------
r2844r2845
1060510765   /* if selected item is not watchpoint, no delete */
1060610766   if(idx >= watch_list_length)
1060710767   {
10608      SET_MESSAGE(kCheatMessage_FailedToDelete);
10768      SET_MESSAGE(CHEAT_MESSAGE_FAILED_TO_DELETE);
1060910769      return;
1061010770   }
1061110771
r2844r2845
1068110841      action->original_address   = watch->address;
1068210842      action->extend_data         = ~0;
1068310843      action->last_value         = NULL;
10684      action->data             = ReadData(action);
10844      action->data             = read_data(action);
1068510845      SET_FIELD(action->type, AddressSize, watch->element_bytes);
1068610846
1068710847      /* set name */
r2844r2845
1069010850
1069110851      update_cheat_info(entry, 0);
1069210852
10693      SET_MESSAGE(kCheatMessage_SucceededToAdd);
10853      SET_MESSAGE(CHEAT_MESSAGE_SUCCEEDED_TO_ADD);
1069410854   }
1069510855   else
10696      SET_MESSAGE(kCheatMessage_FailedToAdd);
10856      SET_MESSAGE(CHEAT_MESSAGE_FAILED_TO_ADD);
1069710857}
1069810858
1069910859/*---------------------------------------------------------------------------
r2844r2845
1073510895
1073610896      update_cheat_info(entry, 0);
1073710897
10738      SET_MESSAGE(kCheatMessage_SucceededToAdd);
10898      SET_MESSAGE(CHEAT_MESSAGE_SUCCEEDED_TO_ADD);
1073910899   }
1074010900   else
10741      SET_MESSAGE(kCheatMessage_FailedToAdd);
10901      SET_MESSAGE(CHEAT_MESSAGE_FAILED_TO_ADD);
1074210902}
1074310903
1074410904/*----------------------------------------------------------------------
r2844r2845
1076510925      watch->label[0]            = 0;
1076610926   }
1076710927   else
10768      SET_MESSAGE(kCheatMessage_FailedToDelete);
10928      SET_MESSAGE(CHEAT_MESSAGE_FAILED_TO_DELETE);
1076910929}
1077010930
1077110931/*------------------------------------------------------------------
r2844r2845
1096311123{
1096411124   UINT32 address = region->address + offset;
1096511125
10966   switch(region->target_type)
11126   if(region->cached_pointer != NULL)
1096711127   {
10968      case kRegionType_CPU:
10969         return DoCPURead(region->target_idx, address, size, cpu_needs_swap(region->target_idx) ^ swap);
11128      UINT8 *buf = (UINT8 *)region->cached_pointer;
1097011129
10971      case kRegionType_Memory:
10972         {
10973            UINT8 * buf = (UINT8 *)region->cached_pointer;
11130      if(buf)
11131//          return do_memory_read(region->cached_pointer, address, size, swap, &raw_cpu_info);
11132         return do_memory_read(buf, address, size, cpu_needs_swap(region->target_idx) ^ swap, get_cpu_info(region->target_idx));
11133      else
11134         return 0;
11135   }
1097411136
10975            if(buf)
10976/*                  return DoMemoryRead(region->cached_pointer, address, size, swap, &raw_cpu_info); */
10977               return DoMemoryRead(buf, address, size, cpu_needs_swap(region->target_idx) ^ swap, get_cpu_info(region->target_idx));
10978            else
10979               return 0;
10980         }
11137   if(region->target_type == kRegionType_CPU)
11138   {
11139      /* NOTE : it conflicts cpu_spinutil() and causes the crash... */
11140      return do_cpu_read(region->target_idx, address, size, cpu_needs_swap(region->target_idx) ^ swap);
1098111141   }
1098211142
1098311143   return 0;
r2844r2845
1101411174      info->backup_valid   = 0;
1101511175
1101611176#if 1
11017      SET_MESSAGE(kCheatMessage_RestoreValue);
11177      SET_MESSAGE(CHEAT_MESSAGE_RESTORE_VALUE);
1101811178#else
1101911179      ui_popup_time(1, "values restored");   /* not displayed when ui is opend */
1102011180#endif
r2844r2845
1102211182   else
1102311183   {
1102411184#if 1
11025      SET_MESSAGE(kCheatMessage_NoOldValue);
11185      SET_MESSAGE(CHEAT_MESSAGE_NO_OLD_VALUE);
1102611186#else
1102711187      ui_popup_time(1, "there are no old values");   /* not displayed when ui is opend */
1102811188#endif
r2844r2845
1122011380            region->flags &=       ~kRegionFlag_Enabled;
1122111381            region->flags |=      kRegionFlag_HasError;
1122211382
11223            SET_MESSAGE(kCheatMessage_FailedToAllocate);
11383            SET_MESSAGE(CHEAT_MESSAGE_FAILED_TO_ALLOCATE);
1122411384         }
1122511385      }
1122611386      else
r2844r2845
1125211412      {
1125311413         if(info->search_speed == SEARCH_SPEED_ALL_MEMORY)
1125411414         {
11415            /* All Memory = 1 search region */
1125511416            UINT32         length = cpu_info_list[info->target_idx].address_mask + 1;
1125611417            search_region   *region;
1125711418
r2844r2845
1129111452
1129211453               map = memory_get_address_map(info->target_idx, ADDRESS_SPACE_PROGRAM);
1129311454
11455               /* calculate total search entries */
1129411456               for(entry = map->entrylist; entry != NULL; entry = entry->next)
1129511457                  if(entry->write.generic)
1129611458                     count++;
r2844r2845
1130111463
1130211464               for(entry = map->entrylist; entry != NULL; entry = entry->next)
1130311465               {
11304                  if (entry->write.generic)
11466                  if(entry->write.generic)
1130511467                  {
1130611468                     UINT32 length = (entry->addrend - entry->addrstart) + 1;
1130711469
11308                     traverse->address      = entry->addrstart;
11309                     traverse->length      = length;
11310                     traverse->target_idx   = info->target_idx;
11311                     traverse->target_type   = info->target_type;
11312                     traverse->write_handler   = entry;
11313                     traverse->first         = NULL;
11314                     traverse->last         = NULL;
11315                     traverse->status      = NULL;
11316                     traverse->backup_last   = NULL;
11317                     traverse->backup_status   = NULL;
11470                     traverse->address         = entry->addrstart;
11471                     traverse->length         = length;
11472                     traverse->target_idx      = info->target_idx;
11473                     traverse->target_type      = info->target_type;
11474                     traverse->cached_pointer   = get_memory_region_base_pointer(info->target_idx, kAddressSpace_DirectMemory, entry->addrstart);
11475                     traverse->write_handler      = entry;
11476                     traverse->first            = NULL;
11477                     traverse->last            = NULL;
11478                     traverse->status         = NULL;
11479                     traverse->backup_last      = NULL;
11480                     traverse->backup_status      = NULL;
1131811481
1131911482                     if(is_search_region_in_range(info->target_idx, length) == 0)
1132011483                     {
r2844r2845
1133911502   }
1134011503}
1134111504
11342/*---------------------------------------------------------------------
11343  ConvertOldCode - convert old format code to new when load database
11344---------------------------------------------------------------------*/
11505/*-------------------------------------------------------------------------
11506  convert_older_code - convert old format code to new when load database
11507-------------------------------------------------------------------------*/
1134511508
11346static int ConvertOldCode(int code, int cpu, int * data, int * extendData)
11509static int convert_older_code(int code, int cpu, int *data, int *extend_data)
1134711510{
1134811511   enum
1134911512   {
11350      kCustomField_None =               0,
11351      kCustomField_DontApplyCPUField =   1 << 0,
11352      kCustomField_SetBit =            1 << 1,
11353      kCustomField_ClearBit =            1 << 2,
11354      kCustomField_SubtractOne =         1 << 3,
11513      CUSTOM_FIELD_NONE =               0,
11514      CUSTOM_FIELD_DONT_APPLY_CPU_FIELD =   1 << 0,
11515      CUSTOM_FIELD_SET_BIT =            1 << 1,
11516      CUSTOM_FIELD_CLEAR_BIT =         1 << 2,
11517      CUSTOM_FIELD_SUBTRACT_ONE =         1 << 3,
11518      CUSTOM_FIELD_BIT_MASK =            CUSTOM_FIELD_SET_BIT | CUSTOM_FIELD_CLEAR_BIT,
1135511519
11356      kCustomField_BitMask =            kCustomField_SetBit |
11357                                 kCustomField_ClearBit,
11358      kCustomField_End =               0xFF
11520      CUSTOM_FIELD_END =               0xFF
1135911521   };
1136011522
11361   struct ConversionTable
11523   struct _conversion_table
1136211524   {
11363      int      oldCode;
11364      UINT32   newCode;
11365      UINT8   customField;
11525      int      old_code;
11526      UINT32   new_code;
11527      UINT8   custom_field;
1136611528   };
1136711529
11368   static const struct ConversionTable kConversionTable[] =
11530   static const struct _conversion_table conversion_table[] =
1136911531   {
11370      {   0,      0x00000000,   kCustomField_None },
11371      {   1,      0x00000001,   kCustomField_None },
11372      {   2,      0x00000020,   kCustomField_None },
11373      {   3,      0x00000040,   kCustomField_None },
11374      {   4,      0x000000A0,   kCustomField_None },
11375      {   5,      0x00000022,   kCustomField_None },
11376      {   6,      0x00000042,   kCustomField_None },
11377      {   7,      0x000000A2,   kCustomField_None },
11378      {   8,      0x00000024,   kCustomField_None },
11379      {   9,      0x00000044,   kCustomField_None },
11380      {   10,      0x00000064,   kCustomField_None },
11381      {   11,      0x00000084,   kCustomField_None },
11382      {   15,      0x00000023,   kCustomField_None },
11383      {   16,      0x00000043,   kCustomField_None },
11384      {   17,      0x000000A3,   kCustomField_None },
11385      {   20,      0x00000000,   kCustomField_SetBit },
11386      {   21,      0x00000001,   kCustomField_SetBit },
11387      {   22,      0x00000020,   kCustomField_SetBit },
11388      {   23,      0x00000040,   kCustomField_SetBit },
11389      {   24,      0x000000A0,   kCustomField_SetBit },
11390      {   40,      0x00000000,   kCustomField_ClearBit },
11391      {   41,      0x00000001,   kCustomField_ClearBit },
11392      {   42,      0x00000020,   kCustomField_ClearBit },
11393      {   43,      0x00000040,   kCustomField_ClearBit },
11394      {   44,      0x000000A0,   kCustomField_ClearBit },
11395      {   60,      0x00000103,   kCustomField_None },
11396      {   61,      0x00000303,   kCustomField_None },
11397      {   62,      0x00000503,   kCustomField_SubtractOne },
11398      {   63,      0x00000903,   kCustomField_None },
11399      {   64,      0x00000B03,   kCustomField_None },
11400      {   65,      0x00000D03,   kCustomField_SubtractOne },
11401      {   70,      0x00000101,   kCustomField_None },
11402      {   71,      0x00000301,   kCustomField_None },
11403      {   72,      0x00000501,   kCustomField_SubtractOne },
11404      {   73,      0x00000901,   kCustomField_None },
11405      {   74,      0x00000B01,   kCustomField_None },
11406      {   75,      0x00000D01,   kCustomField_SubtractOne },
11407      {   80,      0x00000102,   kCustomField_None },
11408      {   81,      0x00000302,   kCustomField_None },
11409      {   82,      0x00000502,   kCustomField_SubtractOne },
11410      {   83,      0x00000902,   kCustomField_None },
11411      {   84,      0x00000B02,   kCustomField_None },
11412      {   85,      0x00000D02,   kCustomField_SubtractOne },
11413      {   90,      0x00000100,   kCustomField_None },
11414      {   91,      0x00000300,   kCustomField_None },
11415      {   92,      0x00000500,   kCustomField_SubtractOne },
11416      {   93,      0x00000900,   kCustomField_None },
11417      {   94,      0x00000B00,   kCustomField_None },
11418      {   95,      0x00000D00,   kCustomField_SubtractOne },
11419      {   100,   0x20800000,   kCustomField_None },
11420      {   101,   0x20800001,   kCustomField_None },
11421      {   102,   0x20800000,   kCustomField_None },
11422      {   103,   0x20800001,   kCustomField_None },
11423      {   110,   0x40800000,   kCustomField_None },
11424      {   111,   0x40800001,   kCustomField_None },
11425      {   112,   0x40800000,   kCustomField_None },
11426      {   113,   0x40800001,   kCustomField_None },
11427      {   120,   0x63000001,   kCustomField_None },
11428      {   121,   0x63000001,   kCustomField_DontApplyCPUField | kCustomField_SetBit },
11429      {   122,   0x63000001,   kCustomField_DontApplyCPUField | kCustomField_ClearBit },
11430      {   998,   0x00000006,   kCustomField_None },
11431      {   999,   0x60000000,   kCustomField_DontApplyCPUField },
11432      {   -1,      0x00000000,   kCustomField_End }
11532      {   0,      0x00000000,   CUSTOM_FIELD_NONE },
11533      {   1,      0x00000001,   CUSTOM_FIELD_NONE },
11534      {   2,      0x00000020,   CUSTOM_FIELD_NONE },
11535      {   3,      0x00000040,   CUSTOM_FIELD_NONE },
11536      {   4,      0x000000A0,   CUSTOM_FIELD_NONE },
11537      {   5,      0x00000022,   CUSTOM_FIELD_NONE },
11538      {   6,      0x00000042,   CUSTOM_FIELD_NONE },
11539      {   7,      0x000000A2,   CUSTOM_FIELD_NONE },
11540      {   8,      0x00000024,   CUSTOM_FIELD_NONE },
11541      {   9,      0x00000044,   CUSTOM_FIELD_NONE },
11542      {   10,      0x00000064,   CUSTOM_FIELD_NONE },
11543      {   11,      0x00000084,   CUSTOM_FIELD_NONE },
11544      {   15,      0x00000023,   CUSTOM_FIELD_NONE },
11545      {   16,      0x00000043,   CUSTOM_FIELD_NONE },
11546      {   17,      0x000000A3,   CUSTOM_FIELD_NONE },
11547      {   20,      0x00000000,   CUSTOM_FIELD_SET_BIT },
11548      {   21,      0x00000001,   CUSTOM_FIELD_SET_BIT },
11549      {   22,      0x00000020,   CUSTOM_FIELD_SET_BIT },
11550      {   23,      0x00000040,   CUSTOM_FIELD_SET_BIT },
11551      {   24,      0x000000A0,   CUSTOM_FIELD_SET_BIT },
11552      {   40,      0x00000000,   CUSTOM_FIELD_CLEAR_BIT },
11553      {   41,      0x00000001,   CUSTOM_FIELD_CLEAR_BIT },
11554      {   42,      0x00000020,   CUSTOM_FIELD_CLEAR_BIT },
11555      {   43,      0x00000040,   CUSTOM_FIELD_CLEAR_BIT },
11556      {   44,      0x000000A0,   CUSTOM_FIELD_CLEAR_BIT },
11557      {   60,      0x00000103,   CUSTOM_FIELD_NONE },
11558      {   61,      0x00000303,   CUSTOM_FIELD_NONE },
11559      {   62,      0x00000503,   CUSTOM_FIELD_SUBTRACT_ONE },
11560      {   63,      0x00000903,   CUSTOM_FIELD_NONE },
11561      {   64,      0x00000B03,   CUSTOM_FIELD_NONE },
11562      {   65,      0x00000D03,   CUSTOM_FIELD_SUBTRACT_ONE },
11563      {   70,      0x00000101,   CUSTOM_FIELD_NONE },
11564      {   71,      0x00000301,   CUSTOM_FIELD_NONE },
11565      {   72,      0x00000501,   CUSTOM_FIELD_SUBTRACT_ONE },
11566      {   73,      0x00000901,   CUSTOM_FIELD_NONE },
11567      {   74,      0x00000B01,   CUSTOM_FIELD_NONE },
11568      {   75,      0x00000D01,   CUSTOM_FIELD_SUBTRACT_ONE },
11569      {   80,      0x00000102,   CUSTOM_FIELD_NONE },
11570      {   81,      0x00000302,   CUSTOM_FIELD_NONE },
11571      {   82,      0x00000502,   CUSTOM_FIELD_SUBTRACT_ONE },
11572      {   83,      0x00000902,   CUSTOM_FIELD_NONE },
11573      {   84,      0x00000B02,   CUSTOM_FIELD_NONE },
11574      {   85,      0x00000D02,   CUSTOM_FIELD_SUBTRACT_ONE },
11575      {   90,      0x00000100,   CUSTOM_FIELD_NONE },
11576      {   91,      0x00000300,   CUSTOM_FIELD_NONE },
11577      {   92,      0x00000500,   CUSTOM_FIELD_SUBTRACT_ONE },
11578      {   93,      0x00000900,   CUSTOM_FIELD_NONE },
11579      {   94,      0x00000B00,   CUSTOM_FIELD_NONE },
11580      {   95,      0x00000D00,   CUSTOM_FIELD_SUBTRACT_ONE },
11581      {   100,   0x20800000,   CUSTOM_FIELD_NONE },
11582      {   101,   0x20800001,   CUSTOM_FIELD_NONE },
11583      {   102,   0x20800000,   CUSTOM_FIELD_NONE },
11584      {   103,   0x20800001,   CUSTOM_FIELD_NONE },
11585      {   110,   0x40800000,   CUSTOM_FIELD_NONE },
11586      {   111,   0x40800001,   CUSTOM_FIELD_NONE },
11587      {   112,   0x40800000,   CUSTOM_FIELD_NONE },
11588      {   113,   0x40800001,   CUSTOM_FIELD_NONE },
11589      {   120,   0x63000001,   CUSTOM_FIELD_NONE },
11590      {   121,   0x63000001,   CUSTOM_FIELD_DONT_APPLY_CPU_FIELD | CUSTOM_FIELD_SET_BIT },
11591      {   122,   0x63000001,   CUSTOM_FIELD_DONT_APPLY_CPU_FIELD | CUSTOM_FIELD_CLEAR_BIT },
11592      {   998,   0x00000006,   CUSTOM_FIELD_NONE },
11593      {   999,   0x60000000,   CUSTOM_FIELD_DONT_APPLY_CPU_FIELD },
11594      {   -1,      0x00000000,   CUSTOM_FIELD_END }
1143311595   };
1143411596
11435   const struct ConversionTable * traverse = kConversionTable;
11597   const struct _conversion_table *traverse = conversion_table;
1143611598
11437   UINT8   linkCheat = 0;
11438   UINT32   newCode;
11599   UINT8   link_cheat = 0;
11600   UINT32   new_code;
1143911601
1144011602   /* convert link cheats */
1144111603   if((code >= 500) && (code <= 699))
1144211604   {
11443      linkCheat = 1;
11605      link_cheat = 1;
1144411606      code -= 500;
1144511607   }
1144611608
1144711609   /* look up code */
11448   while(traverse->oldCode >= 0)
11610   while(traverse->old_code >= 0)
1144911611   {
11450      if(code == traverse->oldCode)
11451         goto foundCode;
11612      if(code == traverse->old_code)
11613         goto found_code;
1145211614      traverse++;
1145311615   }
1145411616
11455   logerror("ConvertOldCode: %d not found\n", code);
11617   logerror("cheat: [older code conversion] %d not found\n", code);
1145611618
1145711619   /* not found */
11458   *extendData = 0;
11620   *extend_data = 0;
1145911621   return 0;
1146011622
1146111623   /* found */
11462   foundCode:
11624   found_code:
1146311625
11464   newCode = traverse->newCode;
11626   new_code = traverse->new_code;
1146511627
1146611628   /* add in the CPU field */
11467   if(!(traverse->customField & kCustomField_DontApplyCPUField))
11468      newCode = (newCode & ~0x1F000000) | ((cpu << 24) & 0x1F000000);
11629   if((traverse->custom_field & CUSTOM_FIELD_DONT_APPLY_CPU_FIELD) == 0)
11630      new_code = (new_code & ~0x1F000000) | ((cpu << 24) & 0x1F000000);
1146911631
1147011632   /* hack-ish, subtract one from data field for x5 user select */
11471   if(traverse->customField & kCustomField_SubtractOne)
11472      (*data)--;   // yaay for C operator precedence
11633   if(traverse->custom_field & CUSTOM_FIELD_SUBTRACT_ONE)
11634      /* yaay for C operator precedence */
11635      (*data)--;
1147311636
1147411637   /* set up the extend data */
11475   if(traverse->customField & kCustomField_BitMask)
11476      *extendData = *data;
11638   if(traverse->custom_field & CUSTOM_FIELD_BIT_MASK)
11639      *extend_data = *data;
1147711640   else
11478      *extendData = 0xFFFFFFFF;
11641      *extend_data = 0xFFFFFFFF;
1147911642
11480   if(traverse->customField & kCustomField_ClearBit)
11643   if(traverse->custom_field & CUSTOM_FIELD_CLEAR_BIT)
1148111644      *data = 0;
1148211645
11483   if(linkCheat)
11484      SET_MASK_FIELD(newCode, LinkEnable);
11646   if(link_cheat)
11647      SET_MASK_FIELD(new_code, LinkEnable);
1148511648
11486   return newCode;
11649   return new_code;
1148711650}
1148811651
1148911652/*----------------------
r2844r2845
1149711660   if(EXTRACT_FIELD(action->type, LocationType) == kLocation_IndirectIndexed) {
1149811661      SET_FIELD(new_type, CodeType, kCodeType_IWrite);
1149911662      SET_FIELD(new_type, CodeParameter, EXTRACT_FIELD(action->type, LocationParameterOption)); }
11500   SET_FIELD(new_type, AddressSize, kSearchSize_32Bit);
11663   SET_FIELD(new_type, AddressSize, EXTRACT_FIELD(action->type, BytesUsed));
1150111664   SET_MASK_FIELD(new_type, Endianness);
1150211665   if(TEST_FIELD(action->type, RestorePreviousValue))
1150311666      SET_MASK_FIELD(new_type, RestoreValue);
r2844r2845
1151311676  handle_local_command_cheat - handle specified cheat command code
1151411677-------------------------------------------------------------------*/
1151511678
11516static void handle_local_command_cheat(running_machine *machine, int cpu, int type, int address, int data, UINT8 format)
11679static void handle_local_command_cheat(running_machine *machine, int cpu, int type, int address, int data, int extend_data, UINT8 format)
1151711680{
1151811681   int command = 0;
1151911682
r2844r2845
1152211685      switch(EXTRACT_FIELD(type, LocationParameter))
1152311686      {
1152411687         case kCustomLocation_AssignActivationKey:
11525            command = CUSTOM_CODE_ACTIVATION_KEY_1;
11526
11527            if(TEST_FIELD(type, OneShot))
11528               command = CUSTOM_CODE_ACTIVATION_KEY_2;
11688            command = CUSTOM_CODE_ACTIVATION_KEY;
1152911689            break;
1153011690
1153111691         case kCustomLocation_Enable:
r2844r2845
1154911709
1155011710   switch(command)
1155111711   {
11552      case CUSTOM_CODE_ACTIVATION_KEY_1:
11553      case CUSTOM_CODE_ACTIVATION_KEY_2:
11712      case CUSTOM_CODE_ACTIVATION_KEY:
1155411713         if(address < cheat_list_length)
1155511714         {
1155611715            cheat_entry *entry = &cheat_list[address];
1155711716
11558            if(command == CUSTOM_CODE_ACTIVATION_KEY_1)
11717            if(entry->flags & kCheatFlag_Select)
1155911718            {
11560               entry->activation_key2 = data;
11561               entry->flags |= kCheatFlag_HasActivationKey2;
11719               if(data)
11720               {
11721                  entry->activation_key_1 = data;
11722                  entry->flags |= kCheatFlag_HasActivationKey1;
11723               }
11724               else if(extend_data)
11725               {
11726                  entry->activation_key_2 = extend_data;
11727                  entry->flags |= kCheatFlag_HasActivationKey2;
11728               }
1156211729            }
1156311730            else
1156411731            {
11565               entry->activation_key1 = data;
11732               entry->activation_key_1 = data;
1156611733               entry->flags |= kCheatFlag_HasActivationKey1;
1156711734            }
1156811735         }
r2844r2845
1157311740         {
1157411741            cheat_entry *entry = &cheat_list[address];
1157511742
11576            ActivateCheat(entry);
11743            activate_cheat(entry);
1157711744
1157811745            if(data && data < entry->action_list_length)
1157911746               entry->selection = data;
r2844r2845
1160311770   }
1160411771}
1160511772
11773/*-------------------------------------------------------------------
11774  open_cheat_database - open the cheat database in loading/saveing
11775-------------------------------------------------------------------*/
11776
11777static UINT8 open_cheat_database(mame_file **the_file, char *file_name, UINT8 flag)
11778{
11779   file_error filerr;
11780
11781   if(flag == DATABASE_LOAD)
11782   {
11783      /* load */
11784      filerr = mame_fopen(SEARCHPATH_CHEAT, file_name, OPEN_FLAG_READ, the_file);
11785
11786      if(filerr != FILERR_NONE)
11787         return 0;
11788   }
11789   else
11790   {
11791      /* save */
11792      filerr = mame_fopen(SEARCHPATH_CHEAT, file_name, OPEN_FLAG_WRITE, the_file);
11793
11794      if(the_file == NULL)
11795      {
11796         return 0;
11797      }
11798      else if(filerr != FILERR_NONE)
11799      {
11800         /* if the database is not found, create new database */
11801         filerr = mame_fopen(SEARCHPATH_CHEAT, file_name, OPEN_FLAG_WRITE | OPEN_FLAG_CREATE | OPEN_FLAG_CREATE_PATHS, the_file);
11802
11803         if(filerr != FILERR_NONE)
11804            return 0;
11805      }
11806   }
11807
11808   return 1;
11809}
11810
1160611811/*------------------------------------------------------
1160711812  load_cheat_option - load cheat option from database
1160811813------------------------------------------------------*/
r2844r2845
1161111816{
1161211817   static char      buf[2048];
1161311818   mame_file      *the_file;
11614   file_error      filerr;
1161511819   cheat_format   *format = &cheat_format_table[0];
1161611820
1161711821   /* open the database */
11618   filerr = mame_fopen(SEARCHPATH_CHEAT, file_name, OPEN_FLAG_READ, &the_file);
11619
11620   if(filerr != FILERR_NONE)
11822   if(open_cheat_database(&the_file, file_name, DATABASE_LOAD) == 0)
1162111823   {
11622      SET_MESSAGE(kCheatMessage_FailedToLoadDatabase);
11824      SET_MESSAGE(CHEAT_MESSAGE_FAILED_TO_LOAD_DATABASE);
1162311825      return;
1162411826   }
1162511827
r2844r2845
1163211834         if(strlen(pre_command) == format->type_matched)
1163311835         {
1163411836            sscanf(pre_command, "%X", &cheat_options);
11635            SET_MESSAGE(kCheatMessage_ReloadCheatOption);
11837            SET_MESSAGE(CHEAT_MESSAGE_RELOAD_CHEAT_OPTION);
1163611838         }
1163711839      }
1163811840   }
r2844r2845
1164811850{
1164911851   char      buf[2048];
1165011852   mame_file   *the_file;
11651   file_error   filerr;
1165211853
1165311854   /* open the database */
11654   filerr = mame_fopen(SEARCHPATH_CHEAT, file_name, OPEN_FLAG_READ, &the_file);
11655
11656   if(filerr != FILERR_NONE)
11855   if(open_cheat_database(&the_file, file_name, DATABASE_LOAD) == 0)
1165711856      return;
1165811857
1165911858   found_database = 1;
r2844r2845
1166311862   {
1166411863      int      i;
1166511864#ifdef MESS
11666      int      crc;
11865      int      crc =               0;
1166711866#endif
11668      int      type = 0;
11669      int      address = 0;
11670      int      data = 0;
11671      int      extend_data = 0;
11672      int      arguments_matched = 0;
11673      int      format_level = 0;
11674      int      cpu = 0;
11675      int      code = 0;
11676      char   name[16] = { 0 };
11677      char   pre_type[16] = { 0 };
11678      char   pre_data[16] = { 0 };
11679      char   pre_extend_data[16] = { 0 };
11680      char   description[256] = { 0 };
11681      char   comment[256] = { 0 };
11682
11867      int      type =               0;
11868      int      address =            0;
11869      int      data =               0;
11870      int      extend_data =         0;
11871      int      arguments_matched =      0;
11872      int      format_level =         0;
11873      int      cpu =               0;
11874      int      code =               0;
11875      char   name[16] =            { 0 };
11876      char   pre_type[16] =         { 0 };
11877      char   pre_data[16] =         { 0 };
11878      char   pre_extend_data[16] =   { 0 };
11879      char   description[256] =      { 0 };
11880      char   comment[256] =         { 0 };
1168311881      cheat_entry      *entry;
1168411882      cheat_action   *action;
1168511883
r2844r2845
1175911957
1176011958            if(is_error)
1176111959            {
11762               SET_MESSAGE(kCheatMessage_WrongCode);
11960               SET_MESSAGE(CHEAT_MESSAGE_WRONG_CODE);
1176311961               continue;
1176411962            }
1176511963            else
r2844r2845
1177711975            }
1177811976         }
1177911977         else
11780            type = ConvertOldCode(code, cpu, &data, &extend_data);
11978            type = convert_older_code(code, cpu, &data, &extend_data);
1178111979
1178211980         /* matched! */
1178311981         format_level = i;
r2844r2845
1179111989      /* logerror("cheat: processing %s\n", buf); */
1179211990
1179311991      /* handle command code */
11794      if(cpu >= CUSTOM_CODE_ACTIVATION_KEY_1)
11992      if(cpu >= CUSTOM_CODE_ACTIVATION_KEY)
1179511993      {
1179611994         /* logerror("cheat: cheat line removed\n", buf); */
11797         handle_local_command_cheat(machine, cpu, type, address, data, format_level);
11995         handle_local_command_cheat(machine, cpu, type, address, data, extend_data, format_level);
1179811996         continue;
1179911997      }
1180011998
r2844r2845
1187012068
1187112069   search_info    *info   = get_current_search();
1187212070   mame_file       *the_file;
11873   file_error      filerr;
1187412071   cheat_format    *format   = &cheat_format_table[4];
1187512072
1187612073   /* 1st, free all search regions in current search_info */
1187712074   dispose_search_reigons(info);
1187812075
1187912076   /* 2nd, attempt to open the memorymap file */
11880   filerr = mame_fopen(SEARCHPATH_CHEAT, file_name, OPEN_FLAG_READ, &the_file);
11881
11882   if(filerr != FILERR_NONE)
12077   if(open_cheat_database(&the_file, file_name, DATABASE_LOAD) == 0)
1188312078   {
1188412079      info->region_list_length = 0;
11885      SET_MESSAGE(kCheatMessage_FailedToLoadDatabase);
12080      SET_MESSAGE(CHEAT_MESSAGE_FAILED_TO_LOAD_DATABASE);
1188612081      return;
1188712082   }
1188812083
r2844r2845
1189012085   while(mame_fgets(buf, 2048, the_file))
1189112086   {
1189212087#ifdef MESS
11893      int      crc;
12088      int            crc;
1189412089#endif
11895      int      cpu;
11896      int      space;
11897      int      start;
11898      int      end;
11899      int      status;
11900      char   name[16] = { 0 };
11901      char   description[64] = { 0 };
11902
11903      cpu_region_info *cpu_info;
12090      int            cpu;
12091      int            space;
12092      int            start;
12093      int            end;
12094      int            status;
12095      char         name[16]      = { 0 };
12096      char         description[64]   = { 0 };
12097      cpu_region_info   *cpu_info;
1190412098      search_region   *region;
1190512099
1190612100#ifdef MESS
r2844r2845
1197712171      region->length      = end - start + 1;
1197812172      region->target_idx   = cpu;
1197912173
11980      if(!space)
12174      if(space == 0)
1198112175      {
1198212176         region->target_type      = kRegionType_CPU;
1198312177         region->cached_pointer   = NULL;
r2844r2845
1198512179      else
1198612180      {
1198712181         region->target_type      = kRegionType_Memory;
11988         region->cached_pointer = GetMemoryRegionBasePointer(cpu, kAddressSpace_DirectMemory, start);
12182         region->cached_pointer   = get_memory_region_base_pointer(cpu, space, start);
1198912183
1199012184         //logerror("pointer for %s : %p\n", description, region->cachedPointer);
1199112185      }
r2844r2845
1201712211   info->region_list_length = count;
1201812212
1201912213   if(info->region_list_length)
12020      SET_MESSAGE(kCheatMessage_ReloadUserRegion);
12214      SET_MESSAGE(CHEAT_MESSAGE_RELOAD_USER_REGION);
1202112215
1202212216   mame_fclose(the_file);
1202312217}
r2844r2845
1205912253         if(buf[0])
1206012254         {
1206112255            /* load database based on the name we gotten */
12062            if(flags & kLoadFlag_CheatOption)
12256            if(flags & LOAD_CHEAT_OPTION)
1206312257               load_cheat_option(buf);
12064            if(flags & kLoadFlag_CheatCode)
12258            if(flags & LOAD_CHEAT_CODE)
1206512259               load_cheat_code(machine, buf);
12066            if(flags & kLoadFlag_UserRegion)
12260            if(flags & LOAD_USER_REGION)
1206712261               load_user_defined_search_region(machine, buf);
1206812262
1206912263            out_traverse   = buf;
r2844r2845
1208412278   }
1208512279   while(data);
1208612280
12087   update_all_cheat_info();
12281   if(flags & LOAD_CHEAT_CODE)
12282      update_all_cheat_info();
1208812283}
1208912284
1209012285/*---------------------------------------------------------------------------
r2844r2845
1209412289static void reload_cheat_database(running_machine *machine)
1209512290{
1209612291   dispose_cheat_database();
12097   load_cheat_database(machine, kLoadFlag_CheatCode);
12292   load_cheat_database(machine, LOAD_CHEAT_CODE);
1209812293
12099   SET_MESSAGE(found_database ? kCheatMessage_ReloadCheatCode : kCheatMessage_FailedToLoadDatabase);
12294   SET_MESSAGE(found_database ? CHEAT_MESSAGE_RELOAD_CHEAT_CODE : CHEAT_MESSAGE_FAILED_TO_LOAD_DATABASE);
1210012295}
1210112296
12102/*-------------------------------------------------
12297/*--------------------------------------------------
1210312298  dispose_cheat_database - free all cheat entries
12104-------------------------------------------------*/
12299--------------------------------------------------*/
1210512300
1210612301static void dispose_cheat_database(void)
1210712302{
r2844r2845
1210912304
1211012305   /* first, turn all cheats "OFF" */
1211112306   for(i = 0; i < cheat_list_length; i++)
12112      TempDeactivateCheat(&cheat_list[i]);
12307      temp_deactivate_cheat(&cheat_list[i]);
1211312308
1211412309   /* next, free memory for all cheat entries */
1211512310   if(cheat_list)
r2844r2845
1212412319   }
1212512320}
1212612321
12127/*------------------------------------------------------
12128  SaveCheatCode - save a cheat code into the database
12129------------------------------------------------------*/
12322/*--------------------------------------------------------
12323  save_cheat_code - save a cheat code into the database
12324--------------------------------------------------------*/
1213012325
12131static void SaveCheatCode(running_machine *machine, cheat_entry *entry)
12326static void save_cheat_code(running_machine *machine, cheat_entry *entry)
1213212327{
12133#if 0
12134   INT8   i;
12135   INT8   error = 0;
12136   char   buf[4096];
12328   int         i;
12329   char      buf[4096];
12330   mame_file   *the_file;
1213712331
12138   mame_file *   theFile;
12139   file_error   filerr;
12332   /* check entry */
12333   if(entry == NULL || entry->action_list == NULL)
12334   {
12335      SET_MESSAGE(CHEAT_MESSAGE_FAILED_TO_SAVE);
12336      return;
12337   }
1214012338
12141   if(entry == NULL || entry->action_list == NULL || ((entry->flags & kCheatFlag_Select) && entry->action_list_length == 1))
12142      error = 1;
12143
12144   /* open the database */
12145   if(!error)
12339   /* ##### fix me... ##### */
12340   if(entry->flags & kCheatFlag_OldFormat)
1214612341   {
12147      filerr = mame_fopen(SEARCHPATH_CHEAT, main_database_name, OPEN_FLAG_WRITE, &theFile);
12148
12149      if(!theFile)
12150         error = 1;
12151      else if(filerr != FILERR_NONE)
12152      {
12153         filerr = mame_fopen(SEARCHPATH_CHEAT, main_database_name, OPEN_FLAG_WRITE | OPEN_FLAG_CREATE | OPEN_FLAG_CREATE_PATHS, &theFile);
12154
12155         if(filerr != FILERR_NONE)
12156            error = 1;
12157      }
12342      SET_MESSAGE(CHEAT_MESSAGE_NO_SUPPORTED_OLD_FORMAT);
12343      return;
1215812344   }
1215912345
12160   if(error)
12346   /* open the database */
12347   if(open_cheat_database(&the_file, main_database_name, DATABASE_SAVE) == 0)
1216112348   {
12162      SET_MESSAGE(kCheatMessage_FailedToSave);
12349      SET_MESSAGE(CHEAT_MESSAGE_FAILED_TO_SAVE);
1216312350      return;
1216412351   }
1216512352
12166   mame_fseek(theFile, 0, SEEK_END);
12353   mame_fseek(the_file, 0, SEEK_END);
1216712354
12168   /* write the code to the database */
12355   /* write the cheat code */
1216912356   for(i = 0; i < entry->action_list_length; i++)
1217012357   {
12171      UINT8      addressLength   = 8;
12172      char      * name;
12173      char      * bufTraverse   = buf;
12358      UINT8         address_length   = 8;
12359      char         *name;
12360      char         *buf_strings   = buf;
12361      cheat_action   *action         = &entry->action_list[i];
1217412362
12175      cheat_action *action = &entry->action_list[i];
12176
1217712363      /* get name */
12178      if(!i)
12179         name = entry->name;
12180      else
12181         name = action->optional_name;
12364      name = action->optional_name;
1218212365
1218312366      /* get address length of CPU/Region */
12184      addressLength = get_address_length(EXTRACT_FIELD(action->type, CPURegion));
12367      address_length = get_address_length(action->region);
1218512368
1218612369      /* print format */
1218712370#ifdef MESS
12188      bufTraverse +=   sprintf(bufTraverse, ">%s:%.8X:%.8X:%.*X:%.8X:%.8X",
12189                  machine->gamedrv->name,
12190                  thisGameCRC,
12191                  action->type,
12192                  addressLength,
12193                  action->original_address,
12194                  action->original_data,
12195                  action->extend_data);
12196#else
12197      bufTraverse +=   sprintf(bufTraverse, ">%s:%.8X:%.*X:%.8X:%.8X",
12198                  machine->gamedrv->name,
12199                  action->type,
12200                  addressLength,
12201                  action->original_address,
12202                  action->original_data,
12203                  action->extend_data);
12371      buf_strings +=   sprintf(buf_strings,":%s::%.8X::%.2X%.8X::%.*X::%.8X::%.8X",
12372                        machine->gamedrv->name,                     /* name */
12373                        thisGameCRC,                           /* CRC */
12374                        action->region, action->type,               /* type */
12375                        address_length, action->original_address,      /* address */
12376                        action->original_data,                     /* data */
12377                        action->extend_data);                     /* extend data */
12378#else /* MAME */
12379      buf_strings +=   sprintf(buf_strings, ":%s::%.2X%.8X::%.*X::%.8X::%.8X",
12380                        machine->gamedrv->name,                     /* name */
12381                        action->region, action->type,               /* type */
12382                        address_length, action->original_address,      /* address */
12383                        action->original_data,                     /* data */
12384                        action->extend_data);                     /* extend data */
1220412385#endif
12205      /* set name */
12386
12387      /* set description */
1220612388      if(name)
12207      {
12208         bufTraverse += sprintf(bufTraverse, ":%s", name);
12209
12210         if(!i && entry->comment)
12211            bufTraverse += sprintf(bufTraverse, ":%s", entry->comment);
12212      }
12389         buf_strings += sprintf(buf_strings, ":%s", name);
1221312390      else
12214      {
12215         bufTraverse += sprintf(bufTraverse, ":(none)");
12391         buf_strings += sprintf(buf_strings, ":(none)");
1221612392
12217         if(!i && entry->comment)
12218            bufTraverse += sprintf(bufTraverse, ":%s", entry->comment);
12219      }
12220
1222112393      /* set comment */
12222      if(!i && entry->comment)
12223         bufTraverse += sprintf(bufTraverse, ":%s", entry->comment);
12394      if(i == 0 && entry->comment)
12395         buf_strings += sprintf(buf_strings, ":%s", entry->comment);
1222412396
12225      bufTraverse += sprintf(bufTraverse, "\n");
12397      buf_strings += sprintf(buf_strings, "\n");
1222612398
12227      mame_fwrite(theFile, buf, (UINT32)strlen(buf));
12399      /* write the cheat code */
12400      mame_fwrite(the_file, buf, (UINT32)strlen(buf));
1222812401   }
1222912402
1223012403   /* close the database */
12231   mame_fclose(theFile);
12404   mame_fclose(the_file);
1223212405
12233   /* clear dirty flag as "this entry is already saved" */
12406   /* clear dirty flag as "this entry has been saved" */
1223412407   entry->flags &= ~kCheatFlag_Dirty;
1223512408
12236   SET_MESSAGE(kCheatMessage_SucceededToSave);
12237#else
12238   SaveDescription(machine);
12239#endif
12409   SET_MESSAGE(CHEAT_MESSAGE_SUCCEEDED_TO_SAVE);
1224012410}
1224112411
1224212412/*-----------------------------------------------------------------
12243  SaveActivationKey - save activation key code into the database
12413  save_activation_key - save activation key code into the database
1224412414-----------------------------------------------------------------*/
1224512415
12246static void SaveActivationKey(running_machine *machine, cheat_entry *entry, int entryIndex)
12416static void save_activation_key(running_machine *machine, cheat_entry *entry, int entry_index)
1224712417{
12248#if 0
12249   INT8   i;
12250   INT8   error = 0;
12251   char   buf[4096];
12418   int         type         = 0;
12419   int         key_1         = 0;
12420   int         key_2         = 0;
12421   UINT8      region         = CUSTOM_CODE_ACTIVATION_KEY;
12422   INT8      address_length   = 8;
12423   char      buf[256];
12424   char      *buf_strings   = buf;
12425   mame_file   *the_file;
12426   astring      *name_1         = NULL;
12427   astring      *name_2         = NULL;
1225212428
12253   mame_file *   theFile;
12254   file_error   filerr;
12429   /* check activation keys */
12430   if((entry->flags & kCheatFlag_HasActivationKey1) == 0 && (entry->flags & kCheatFlag_HasActivationKey2) == 0)
12431   {
12432      SET_MESSAGE(CHEAT_MESSAGE_NO_ACTIVATION_KEY);
12433      return;
12434   }
1225512435
12256   if(!(entry->flags & kCheatFlag_HasActivationKey1) && !(entry->flags & kCheatFlag_HasActivationKey2))
12257      error = 1;
12436   /* check entry */
12437   if(entry == NULL || entry->action_list == NULL)
12438   {
12439      SET_MESSAGE(CHEAT_MESSAGE_FAILED_TO_SAVE);
12440      return;
12441   }
1225812442
12259   if(error == 0 && (entry == NULL || entry->action_list == NULL || ((entry->flags & kCheatFlag_Select) && entry->action_list_length == 1)))
12260      error = 2;
12261
1226212443   /* open the database */
12263   if(!error)
12444   if(open_cheat_database(&the_file, main_database_name, DATABASE_SAVE) == 0)
1226412445   {
12265      filerr = mame_fopen(SEARCHPATH_CHEAT, main_database_name, OPEN_FLAG_WRITE, &theFile);
12446      SET_MESSAGE(CHEAT_MESSAGE_FAILED_TO_SAVE);
12447      return;
12448   }
1226612449
12267      if(!theFile)
12268         error = 2;
12269      else if(filerr != FILERR_NONE)
12270      {
12271         filerr = mame_fopen(SEARCHPATH_CHEAT, main_database_name, OPEN_FLAG_WRITE | OPEN_FLAG_CREATE | OPEN_FLAG_CREATE_PATHS, &theFile);
12450   mame_fseek(the_file, 0, SEEK_END);
1227212451
12273         if(filerr != FILERR_NONE)
12274            error = 2;
12275      }
12276   }
12452   /* get address length of CPU/Region */
12453   address_length = get_address_length(entry->action_list[0].region);
1227712454
12278   switch(error)
12279   {
12280      case 1:
12281         SET_MESSAGE(kCheatMessage_NoActivationKey);
12282         return;
12455   /* detect activation key */
12456   key_1 = entry->activation_key_1;
12457   key_2 = entry->activation_key_2;
1228312458
12284      case 2:
12285         SET_MESSAGE(kCheatMessage_FailedToSave);
12286         return;
12287   }
12459   /* set code */
12460#ifdef MESS
12461   buf_strings += sprintf(   buf_strings, ":%s::%.8X::%.2X%.8X::%.*X::%.8X::%.8X::Activation Key",
12462                     machine->gamedrv->name,         /* name */
12463                     thisGameCRC,               /* CRC */
12464                     region, type,               /* type */
12465                     address_length, entry_index,   /* address */
12466                     key_1,                     /* data */
12467                     key_2);                     /* extend data */
12468#else /* MAME */
12469   buf_strings += sprintf(   buf_strings, ":%s::%.2X%.8X::%.*X::%.8X::%.8X:Activation Key",
12470                     machine->gamedrv->name,         /* name */
12471                     region, type,               /* type */
12472                     address_length, entry_index,   /* address */
12473                     key_1,                     /* data */
12474                     key_2);                     /* extend data */
12475#endif
1228812476
12289   mame_fseek(theFile, 0, SEEK_END);
12477   /* set description */
12478   if(entry->name && entry->name[0] != 0)
12479      buf_strings += sprintf(buf_strings, " for %s", entry->name);
1229012480
12291   /* write the code to the database */
12292   for(i = 0; i < 2; i++)
12481   /* set label of key */
12482   if(entry->flags & kCheatFlag_Select)
1229312483   {
12294      int      addressLength   = 8;
12295      int      activationKey   = !i ? entry->activation_key1 : entry->activation_key2;
12296      int      type         = 0;
12297      char   * bufTraverse   = buf;
12484      if(entry->flags & kCheatFlag_HasActivationKey1)
12485         name_1 = input_code_name(astring_alloc(), entry->activation_key_1);
1229812486
12299      cheat_action   *action = &entry->action_list[0];
12300      astring         *name = input_code_name(astring_alloc(), activationKey);
12487      if(entry->flags & kCheatFlag_HasActivationKey2)
12488         name_2 = input_code_name(astring_alloc(), entry->activation_key_2);
1230112489
12302      if(activationKey)
12303         SET_FIELD(type, CodeType, CUSTOM_CODE_ACTIVATION_KEY_1);
12304      else
12305         SET_FIELD(type, CodeType, CUSTOM_CODE_ACTIVATION_KEY_2);
12490      buf_strings += sprintf(buf_strings, " (prev = %s / next = %s)\n", astring_c(name_1), astring_c(name_2));
12491   }
12492   else
12493   {
12494      name_1 = input_code_name(astring_alloc(), entry->activation_key_1);
1230612495
12307      /* get address length of CPU/Region */
12308      addressLength = get_address_length(action->region);
12496      buf_strings += sprintf(buf_strings, " (%s)\n", astring_c(name_1));
12497   }
1230912498
12310      /* if not find 1st activation key at saving 1st key, try to save 2nd key */
12311      if(!i && !(entry->flags & kCheatFlag_HasActivationKey1))
12312      {
12313         astring_free(name);
12314         continue;
12315      }
1231612499
12317      /* if not find 2nd key after 1st key saved, finish */
12318      if(i && !(entry->flags & kCheatFlag_HasActivationKey2))
12319      {
12320         astring_free(name);
12321         break;
12322      }
12500   /* write the activation key code */
12501   mame_fwrite(the_file, buf, (UINT32)strlen(buf));
1232312502
12324#ifdef MESS
12325      bufTraverse +=   sprintf(bufTraverse,
12326                  ">%s:%.8X:%.8X:%.*X:%.8X:00000000",
12327                  machine->gamedrv->name,
12328                  thisGameCRC,
12329                  type,
12330                  addressLength,
12331                  entryIndex,
12332                  activationKey);
12333#else
12334      bufTraverse +=   sprintf(bufTraverse, ">%s:%.8X:%.*X:%.8X:00000000",
12335                  machine->gamedrv->name,
12336                  type,
12337                  addressLength,
12338                  entryIndex,
12339                  activationKey);
12340#endif
12341      /* set description */
12342      if(!i)
12343      {
12344         if(!(entry->flags & kCheatFlag_Select))
12345            bufTraverse += sprintf(bufTraverse, ":Pre-selection Key ");
12346         else
12347            bufTraverse += sprintf(bufTraverse, ":1st Activation Key ");
12348      }
12349      else
12350      {
12351         if(!(entry->flags & kCheatFlag_Select))
12352            bufTraverse += sprintf(bufTraverse, ":Next-selection Key ");
12353         else
12354            bufTraverse += sprintf(bufTraverse, ":2nd Activation Key ");
12355      }
12503   if(name_1)   astring_free(name_1);
12504   if(name_2)   astring_free(name_2);
1235612505
12357      /* set code name and button index */
12358      if(entry->name)
12359         bufTraverse += sprintf(bufTraverse, "for %s (%s)\n", entry->name, astring_c(name));
12360      else
12361         bufTraverse += sprintf(bufTraverse, "(%s)\n", astring_c(name));
12362
12363      /* write the activation key code */
12364      mame_fwrite(theFile, buf, (UINT32)strlen(buf));
12365
12366      astring_free(name);
12367   }
12368
1236912506   /* close the database */
12370   mame_fclose(theFile);
12507   mame_fclose(the_file);
1237112508
12372   SET_MESSAGE(kCheatMessage_ActivationKeySaved);
12373#endif
12509   SET_MESSAGE(CHEAT_MESSAGE_ACTIVATION_KEY_SAVED);
1237412510}
1237512511
1237612512/*-----------------------------------------------------------
12377  SavePreEnable - save a pre-enable code into the database
12513  save_pre_enable - save a pre-enable code into the database
1237812514-----------------------------------------------------------*/
1237912515
12380static void SavePreEnable(running_machine *machine, cheat_entry *entry, int entryIndex)
12516static void save_pre_enable(running_machine *machine, cheat_entry *entry, int entry_index)
1238112517{
12382#if 0
12383   int      type         = 0;
12384   INT8   error         = 0;
12385   INT8   addressLength   = 8;
12386   char   buf[4096];
12387   char   * bufTraverse   = buf;
12518   int            type         = 0;
12519   UINT8         region         = CUSTOM_CODE_PRE_ENABLE;
12520   INT8         address_length   = 8;
12521   char         buf[256];
12522   char         *buf_strings   = buf;
12523   mame_file      *the_file;
1238812524
12389   cheat_action   *action = &entry->action_list[0];
12390   mame_file      *theFile;
12391   file_error      filerr;
12392
12393   if(entry == NULL || entry->action_list == NULL || ((entry->flags & kCheatFlag_Select) && entry->action_list_length == 1))
12394      error = 1;
12395
12396   /* open the database */
12397   if(!error)
12525   /* if invalid cheat code, no action */
12526   if(entry == NULL || entry->action_list == NULL)
1239812527   {
12399      filerr = mame_fopen(SEARCHPATH_CHEAT, main_database_name, OPEN_FLAG_WRITE, &theFile);
12400
12401      if(!theFile)
12402         error = 1;
12403      else if(filerr != FILERR_NONE)
12404      {
12405         filerr = mame_fopen(SEARCHPATH_CHEAT, main_database_name, OPEN_FLAG_WRITE | OPEN_FLAG_CREATE | OPEN_FLAG_CREATE_PATHS, &theFile);
12406
12407         if(filerr != FILERR_NONE)
12408            error = 1;
12409      }
12528      SET_MESSAGE(CHEAT_MESSAGE_FAILED_TO_SAVE);
12529      return;
1241012530   }
1241112531
12412   if(error)
12532   /* open the database */
12533   if(open_cheat_database(&the_file, main_database_name, DATABASE_SAVE) == 0)
1241312534   {
12414      SET_MESSAGE(kCheatMessage_FailedToSave);
12535      SET_MESSAGE(CHEAT_MESSAGE_FAILED_TO_SAVE);
1241512536      return;
1241612537   }
12417   else
12418   {
12419      SET_FIELD(type, CodeType, CUSTOM_CODE_PRE_ENABLE);
12420   }
1242112538
12422   mame_fseek(theFile, 0, SEEK_END);
12539   mame_fseek(the_file, 0, SEEK_END);
1242312540
1242412541   /* get address length of CPU/Region */
12425   addressLength = get_address_length(EXTRACT_FIELD(action->type, CPURegion));
12542   address_length = get_address_length(entry->action_list[0].region);
1242612543
1242712544#ifdef MESS
12428   bufTraverse +=   sprintf(bufTraverse, ">%s:%.8X:%8.8X:%.*X:%.8X:00000000",
12429               machine->gamedrv->name,
12430               thisGameCRC,
12431               type,
12432               addressLength,
12433               entryIndex,
12434               entry->selection);
12435#else
12436   bufTraverse +=   sprintf(bufTraverse, ">%s:%8.8X:%.*X:%.8X:00000000",
12437               machine->gamedrv->name,
12438               type,
12439               addressLength,
12440               entryIndex,
12441               entry->selection);
12545   buf_strings += sprintf(   buf_strings, ":%s::%.8X::%.2X%.8X::%.*X::%.8X:00000000",
12546                     machine->gamedrv->name,         /* name */
12547                     thisGameCRC,               /* CRC */
12548                     region, type,               /* type */
12549                     address_length, entry_index,   /* address */
12550                     entry->selection);            /* data */
12551#else /* MAME */
12552   buf_strings += sprintf(   buf_strings, ":%s::%.2X%.8X::%.*X::%.8X::00000000",
12553                     machine->gamedrv->name,         /* name */
12554                     region ,type,               /* type */
12555                     address_length, entry_index,   /* address */
12556                     entry->selection);            /* data */
1244212557#endif
1244312558
12444   /* set name */
12445   bufTraverse += sprintf(bufTraverse, ":Pre-enable");
12559   /* set description */
12560   buf_strings += sprintf(buf_strings, ":Pre-enable");
1244612561
1244712562   if(entry->name)
12448      bufTraverse += sprintf(bufTraverse, " for %s", entry->name);
12563      buf_strings += sprintf(buf_strings, " for %s", entry->name);
1244912564
1245012565   /* set label name */
1245112566   if(entry->selection)
12452      bufTraverse += sprintf(bufTraverse, " Label - %s", entry->action_list[entry->label_index[entry->selection]].optional_name);
12567      buf_strings += sprintf(buf_strings, " Label - %s", entry->action_list[entry->label_index[entry->selection]].optional_name);
1245312568
12454   bufTraverse += sprintf(bufTraverse, "\n");
12569   buf_strings += sprintf(buf_strings, "\n");
1245512570
1245612571   /* write the pre-enable code */
12457   mame_fwrite(theFile, buf, (UINT32)strlen(buf));
12572   mame_fwrite(the_file, buf, (UINT32)strlen(buf));
1245812573
1245912574   /* close the database */
12460   mame_fclose(theFile);
12575   mame_fclose(the_file);
1246112576
12462   SET_MESSAGE(kCheatMessage_PreEnableSaved);
12463#endif
12577   SET_MESSAGE(CHEAT_MESSAGE_PRE_ENABLE_SAVED);
1246412578}
1246512579
1246612580/*--------------------------------------------------------------
12467  Savecheat_options - save cheat option code into the database
12581  save_cheat_options - save cheat option code into the database
1246812582--------------------------------------------------------------*/
1246912583
12470static void Savecheat_options(void)
12584static void save_cheat_options(void)
1247112585{
12472   UINT8      error = 0;
1247312586   char      buf[32];
12587   mame_file   *the_file;
1247412588
12475   mame_file *      theFile;
12476   file_error      filerr;
12477
1247812589   /* open the database */
12479   filerr = mame_fopen(SEARCHPATH_CHEAT, main_database_name, OPEN_FLAG_WRITE, &theFile);
12480
12481   if(!theFile)
12482      error = 1;
12483   else if(filerr != FILERR_NONE)
12590   if(open_cheat_database(&the_file, main_database_name, DATABASE_SAVE) == 0)
1248412591   {
12485      filerr = mame_fopen(SEARCHPATH_CHEAT, main_database_name, OPEN_FLAG_WRITE | OPEN_FLAG_CREATE | OPEN_FLAG_CREATE_PATHS, &theFile);
12486
12487      if(filerr != FILERR_NONE)
12488         error = 1;
12489   }
12490
12491   if(error)
12492   {
12493      SET_MESSAGE(kCheatMessage_FailedToSave);
12592      SET_MESSAGE(CHEAT_MESSAGE_FAILED_TO_SAVE);
1249412593      return;
1249512594   }
1249612595
12497   mame_fseek(theFile, 0, SEEK_END);
12596   mame_fseek(the_file, 0, SEEK_END);
1249812597
1249912598   sprintf(buf, ":_command:%.8X\n", cheat_options);
1250012599
12501   /* write the command code */
12502   mame_fwrite(theFile, buf, (UINT32)strlen(buf));
12600   /* write the cheat option */
12601   mame_fwrite(the_file, buf, (UINT32)strlen(buf));
1250312602
1250412603   /* close the database */
12505   mame_fclose(theFile);
12604   mame_fclose(the_file);
1250612605
12507   SET_MESSAGE(kCheatMessage_SucceededToSave);
12606   SET_MESSAGE(CHEAT_MESSAGE_SUCCEEDED_TO_SAVE);
1250812607}
1250912608
1251012609/*------------------
12511  SaveDescription
12610  save_description
1251212611------------------*/
1251312612
12514static void SaveDescription(running_machine *machine)
12613static void save_description(running_machine *machine)
1251512614{
12516   UINT8   error = 0;
12517   char   buf[256];
12615   char      buf[256];
12616   mame_file   *the_file;
1251812617
12519   mame_file *      theFile;
12520   file_error      filerr;
12618   /* open the database */
12619   if(open_cheat_database(&the_file, main_database_name, DATABASE_SAVE) == 0)
12620   {
12621      SET_MESSAGE(CHEAT_MESSAGE_FAILED_TO_SAVE);
12622      return;
12623   }
1252112624
12522   filerr = mame_fopen(SEARCHPATH_CHEAT, main_database_name, OPEN_FLAG_WRITE, &theFile);
12625   mame_fseek(the_file, 0, SEEK_END);
1252312626
12524   if(!theFile)
12525      error = 1;
12526   else if(filerr != FILERR_NONE)
12527   {
12528      filerr = mame_fopen(SEARCHPATH_CHEAT, main_database_name, OPEN_FLAG_WRITE | OPEN_FLAG_CREATE | OPEN_FLAG_CREATE_PATHS, &theFile);
12627   sprintf(buf, "; [ %s ]\n", machine->gamedrv->description);
1252912628
12530      if(filerr != FILERR_NONE)
12531         error = 1;
12532   }
12629   /* write the description of game/machine */
12630   mame_fwrite(the_file, buf, (UINT32)strlen(buf));
1253312631
12534   if(error)
12632   /* close the database */
12633   mame_fclose(the_file);
12634
12635   SET_MESSAGE(CHEAT_MESSAGE_SUCCEEDED_TO_SAVE);
12636}
12637
12638/*----------------
12639  save_raw_code
12640----------------*/
12641
12642static void save_raw_code(running_machine *machine)
12643{
12644   int         address_length = 8;
12645   int         address = 0;
12646   char      buf[256];
12647   mame_file   *the_file;
12648
12649   /* open the database */
12650   if(open_cheat_database(&the_file, main_database_name, DATABASE_SAVE) == 0)
1253512651   {
12536      SET_MESSAGE(kCheatMessage_FailedToSave);
12652      SET_MESSAGE(CHEAT_MESSAGE_FAILED_TO_SAVE);
1253712653      return;
1253812654   }
1253912655
12540   mame_fseek(theFile, 0, SEEK_END);
12541   sprintf(buf, "; [ %s ]\n", machine->gamedrv->description);
12656   mame_fseek(the_file, 0, SEEK_END);
1254212657
12543   /* write the command code */
12544   mame_fwrite(theFile, buf, (UINT32)strlen(buf));
12658   address_length = get_address_length(0);
1254512659
12660#ifdef MESS
12661   sprintf(buf, ":%s::%.8X::0000000000::%.*X::00000000::FFFFFFFF:Raw Code\n", machine->gamedrv->name, thisGameCRC, address_length, address);
12662#else /* MAME */
12663   sprintf(buf, ":%s::0000000000::%.*X::00000000::FFFFFFFF:Raw Code\n", machine->gamedrv->name, address_length, address);
12664#endif
12665
12666   /* write the raw code */
12667   mame_fwrite(the_file, buf, (UINT32)strlen(buf));
12668
1254612669   /* close the database */
12547   mame_fclose(theFile);
12670   mame_fclose(the_file);
1254812671
12549   SET_MESSAGE(kCheatMessage_SucceededToSave);
12672   SET_MESSAGE(CHEAT_MESSAGE_SUCCEEDED_TO_SAVE);
1255012673}
1255112674
12552/*--------------------------------------------------------------------------
12553  DoAutoSaveCheat - save normal code automatically when exit cheat system
12554--------------------------------------------------------------------------*/
12675/*------------------------------------------------------------------------------
12676  do_auto_save_cheats - save normal code automatically when exit cheat system
12677------------------------------------------------------------------------------*/
1255512678
12556static void DoAutoSaveCheats(running_machine *machine)
12679static void do_auto_save_cheats(running_machine *machine)
1255712680{
1255812681   int i;
1255912682
12683   save_description(machine);
12684
1256012685   for(i = 0; i < cheat_list_length; i++)
1256112686   {
1256212687      cheat_entry *entry = &cheat_list[i];
1256312688
1256412689      /* if the entry is not edited/added newly or has not been already saved, save it */
1256512690      if(entry->flags & kCheatFlag_Dirty)
12566         SaveCheatCode(machine, entry);
12691         save_cheat_code(machine, entry);
1256712692   }
1256812693}
1256912694
12570/*-------------------------------------------------------------------
12571  AddCheatFromResult - add a code from result viewer to cheat list
12572-------------------------------------------------------------------*/
12695/*----------------------------------------------------------------------
12696  add_cheat_from_result - add a code from result viewer to cheat list
12697----------------------------------------------------------------------*/
1257312698
12574static void AddCheatFromResult(search_info *search, search_region *region, UINT32 address)
12699static void add_cheat_from_result(search_info *search, search_region *region, UINT32 address)
1257512700{
12576   if((region->target_type == kRegionType_CPU) || (region->target_type == kRegionType_Memory))
12701   if(region->target_type == kRegionType_CPU || region->target_type == kRegionType_Memory)
1257712702   {
12703      int            temp_string_length;
12704      UINT32         data      = read_search_operand(kSearchOperand_First, search, region, address);
12705      char         temp_string[1024];
1257812706      cheat_entry      *entry      = get_new_cheat();
1257912707      cheat_action   *action      = &entry->action_list[0];
12580      char         tempString[1024];
12581      int            tempStringLength;
12582      UINT32         data = read_search_operand(kSearchOperand_First, search, region, address);
1258312708
12584      tempStringLength = sprintf(tempString, "%.8X (%d) = %.*X", address, region->target_idx, kSearchByteDigitsTable[search->bytes], data);
12709      temp_string_length = sprintf(temp_string, "%.8X (%d) = %.*X", address, region->target_idx, kSearchByteDigitsTable[search->bytes], data);
1258512710
12586      entry->name = realloc(entry->name, tempStringLength + 1);
12587      memcpy(entry->name, tempString, tempStringLength + 1);
12711      entry->name = realloc(entry->name, temp_string_length + 1);
12712      if(entry->name == NULL)
12713         fatalerror(   "cheat: [cheat entry] memory allocation error"
12714                  "   temp_length   =      %.8X"
12715                  "   entry->name =      %p",
12716                  temp_string_length, entry->name);
1258812717
12718      memcpy(entry->name, temp_string, temp_string_length + 1);
1258912719      action->region         = region->target_idx;
1259012720      action->address         = address;
1259112721      action->data         = data;
1259212722      action->original_data   = data;
12593      action->extend_data      = 0xFFFFFFFF;
12723      action->extend_data      = ~0;
1259412724      action->last_value      = NULL;
12595
1259612725      SET_FIELD(action->type, AddressSize, kSearchByteIncrementTable[search->bytes] - 1);
1259712726
1259812727      update_cheat_info(entry, 0);
1259912728   }
1260012729}
1260112730
12602/*--------------------------------------------------------------------------------------------
12603  AddCheatFromFirstResult - add a code from search box to cheat list if found result is one
12604--------------------------------------------------------------------------------------------*/
12731/*------------------------------------------------------------------------------------------------
12732  add_cheat_from_first_result - add a code from search box to cheat list if found result is one
12733------------------------------------------------------------------------------------------------*/
1260512734
12606static void AddCheatFromFirstResult(search_info *search)
12735static void add_cheat_from_first_result(search_info *search)
1260712736{
12608   int   i;
12737   int i;
1260912738
1261012739   for(i = 0; i < search->region_list_length; i++)
1261112740   {
r2844r2845
1261312742
1261412743      if(region->num_results)
1261512744      {
12616         UINT32   traverse;
12745         UINT32 traverse;
1261712746
1261812747         for(traverse = 0; traverse < region->length; traverse++)
1261912748         {
12620            UINT32   address = region->address + traverse;
12749            UINT32 address = region->address + traverse;
1262112750
1262212751            if(is_region_offset_valid(search, region, traverse))
1262312752            {
12624               AddCheatFromResult(search, region, address);
12753               add_cheat_from_result(search, region, address);
1262512754               return;
1262612755            }
1262712756         }
r2844r2845
1262912758   }
1263012759}
1263112760
12632/*-------------------------------------------------------------------------
12633  AddWatchFromResult - add a watch code from result viewer to cheat list
12634-------------------------------------------------------------------------*/
12761/*----------------------------------------------------------------------------
12762  add_watch_from_result - add a watchpoint from result viewer to cheat list
12763----------------------------------------------------------------------------*/
1263512764
12636static void AddWatchFromResult(search_info *search, search_region *region, UINT32 address)
12765static void add_watch_from_result(search_info *search, search_region *region, UINT32 address)
1263712766{
1263812767   if(region->target_type == kRegionType_CPU || region->target_type == kRegionType_Memory)
1263912768   {
r2844r2845
1265112780      info->linked_cheat      = NULL;
1265212781      info->label[0]         = 0;
1265312782
12654      SET_MESSAGE(kCheatMessage_SucceededToAdd);
12783      SET_MESSAGE(CHEAT_MESSAGE_SUCCEEDED_TO_ADD);
1265512784   }
1265612785   else
12657      SET_MESSAGE(kCheatMessage_FailedToAdd);
12786      SET_MESSAGE(CHEAT_MESSAGE_FAILED_TO_ADD);
1265812787}
1265912788
1266012789/*---------------------
r2844r2845
1268512814         break;
1268612815
1268712816      case kSearchOperand_Previous:
12688         value = DoMemoryRead(region->last, address - region->address, kSearchByteIncrementTable[search->bytes], search->swap, NULL);
12817         value = do_memory_read(region->last, address - region->address, kSearchByteIncrementTable[search->bytes], search->swap, NULL);
1268912818         break;
1269012819
1269112820      case kSearchOperand_First:
12692         value = DoMemoryRead(region->first, address - region->address, kSearchByteIncrementTable[search->bytes], search->swap, NULL);
12821         value = do_memory_read(region->first, address - region->address, kSearchByteIncrementTable[search->bytes], search->swap, NULL);
1269312822         break;
1269412823
1269512824      case kSearchOperand_Value:
r2844r2845
1271612845         break;
1271712846
1271812847      case kSearchOperand_Previous:
12719         value = DoMemoryRead(region->last, address - region->address, kSearchByteIncrementTable[search->bytes], search->swap, NULL);
12848         value = do_memory_read(region->last, address - region->address, kSearchByteIncrementTable[search->bytes], search->swap, NULL);
1272012849         break;
1272112850
1272212851      case kSearchOperand_First:
12723         value = DoMemoryRead(region->first, address - region->address, kSearchByteIncrementTable[search->bytes], search->swap, NULL);
12852         value = do_memory_read(region->first, address - region->address, kSearchByteIncrementTable[search->bytes], search->swap, NULL);
1272412853         break;
1272512854
1272612855      case kSearchOperand_Value:
r2844r2845
1310413233   }
1310513234}
1310613235
13107/*-----------------------------------------------------------
13108  LookupHandlerMemory - search specified write handler
13109-----------------------------------------------------------*/
13236/*----------------------------------------------------------
13237  look_up_handler_memory - search specified write handler
13238----------------------------------------------------------*/
1311013239
13111static UINT8 ** LookupHandlerMemory(UINT8 cpu, UINT32 address, UINT32 * outRelativeAddress)
13240static UINT8 **look_up_handler_memory(UINT8 cpu, UINT32 address, UINT32 *out_relative_address)
1311213241{
13113   const address_map         * map = memory_get_address_map(cpu, ADDRESS_SPACE_PROGRAM);
13242   const address_map         *map = memory_get_address_map(cpu, ADDRESS_SPACE_PROGRAM);
1311413243   const address_map_entry      *entry;
1311513244
1311613245   for(entry = map->entrylist; entry != NULL; entry = entry->next)
1311713246   {
1311813247      if(entry->write.generic != NULL && address >= entry->addrstart && address <= entry->addrend)
1311913248      {
13120         if(outRelativeAddress)
13249         if(out_relative_address)
1312113250         {
13122            *outRelativeAddress = address - entry->addrstart;
13251            *out_relative_address = address - entry->addrstart;
1312313252            return (UINT8 **)entry->baseptr;
1312413253         }
1312513254      }
r2844r2845
1312813257   return NULL;
1312913258}
1313013259
13131/*-------------------------------------------------------------------------------------------------------------
13132  GetMemoryRegionBasePointer - return base pointer to the base of RAM associated with given CPU and address
13133-------------------------------------------------------------------------------------------------------------*/
13260/*----------------------------------------------------------------------------------------------------------------
13261  get_memory_region_base_pointer - return base pointer to the base of RAM associated with given CPU and address
13262----------------------------------------------------------------------------------------------------------------*/
1313413263
13135static UINT8 ** GetMemoryRegionBasePointer(UINT8 cpu, UINT8 space, UINT32 address)
13264static UINT8 **get_memory_region_base_pointer(UINT8 cpu, UINT8 space, UINT32 address)
1313613265{
13137   UINT8   * buf = NULL;
13266   UINT8 *buf = NULL;
1313813267
1313913268   switch(space)
1314013269   {
r2844r2845
1315813287         logerror("invalid address space (%x)\n", space);
1315913288   }
1316013289
13161   if(buf)      buf -= address;
13290   if(buf)
13291      buf -= address;
1316213292
1316313293   //logerror("pointer (return) : %p\n", buf);
1316413294
1316513295   return (UINT8 **)buf;
1316613296}
1316713297
13168/*--------------------------------------------------------------------------------------------------------------
13169  DoCPURead - read a data from standard CPU region
13170              NOTE : if a driver has cpu_spinutil(), reading a data via cpunum_read_byte may conflict with it
13171--------------------------------------------------------------------------------------------------------------*/
13298/*----------------------------------------------------------------------------------------------------------------
13299  do_cpu_read - read a data from standard CPU region
13300                NOTE : if a driver has cpu_spinutil(), reading a data via cpunum_read_byte may conflict with it
13301----------------------------------------------------------------------------------------------------------------*/
1317213302
13173static UINT32 DoCPURead(UINT8 cpu, UINT32 address, UINT8 bytes, UINT8 swap)
13303static UINT32 do_cpu_read(UINT8 cpu, UINT32 address, UINT8 bytes, UINT8 swap)
1317413304{
1317513305   cpu_region_info *info = get_cpu_info(cpu);
1317613306
r2844r2845
1321013340   return 0;
1321113341}
1321213342
13213/*--------------------------------------------------
13214  DoMemoryRead - read a data from memory directly
13215--------------------------------------------------*/
13343/*----------------------------------------------------
13344  do_memory_read - read a data from memory directly
13345----------------------------------------------------*/
1321613346
13217static UINT32 DoMemoryRead(UINT8 * buf, UINT32 address, UINT8 bytes, UINT8 swap, cpu_region_info *info)
13347static UINT32 do_memory_read(UINT8 *buf, UINT32 address, UINT8 bytes, UINT8 swap, cpu_region_info *info)
1321813348{
1321913349   int i;
1322013350   int data = 0;
r2844r2845
1322213352   if(info)
1322313353      address = DoShift(address, info->address_shift);
1322413354
13225   if(!info)
13355   if(info == NULL)
1322613356   {
1322713357      switch(bytes)
1322813358      {
r2844r2845
1325313383      return data;
1325413384   }
1325513385
13256generic:
13386   generic:
13387
1325713388   for(i = 0; i < bytes; i++)
1325813389      data |= swap ?   buf[SwapAddress(address + i, bytes, info)] << (i * 8) :
1325913390                  buf[SwapAddress(address + i, bytes, info)] << ((bytes - i - 1) * 8);
r2844r2845
1326113392   return data;
1326213393}
1326313394
13264/*-----------------------------------------------------
13265  DoCPUWrite - write a data into standard CPU region
13266-----------------------------------------------------*/
13395/*-------------------------------------------------------
13396  do_cpu_write - write a data into standard CPU region
13397-------------------------------------------------------*/
1326713398
13268static void DoCPUWrite(UINT32 data, UINT8 cpu, UINT32 address, UINT8 bytes, UINT8 swap)
13399static void do_cpu_write(UINT32 data, UINT8 cpu, UINT32 address, UINT8 bytes, UINT8 swap)
1326913400{
1327013401   cpu_region_info *info = get_cpu_info(cpu);
1327113402
r2844r2845
1332313454         break;
1332413455
1332513456      default:
13326         logerror("DoCPUWrite: bad size (%d)\n", bytes);
13457         logerror("do_cpu_write: bad size (%d)\n", bytes);
1332713458         break;
1332813459   }
1332913460}
1333013461
13331/*----------------------------------------------------
13332  DoMemoryWrite - write a data into memory directly
13333----------------------------------------------------*/
13462/*------------------------------------------------------
13463  do_memory_write - write a data into memory directly
13464------------------------------------------------------*/
1333413465
13335static void DoMemoryWrite(UINT32 data, UINT8 * buf, UINT32 address, UINT8 bytes, UINT8 swap, cpu_region_info *info)
13466static void do_memory_write(UINT32 data, UINT8 *buf, UINT32 address, UINT8 bytes, UINT8 swap, cpu_region_info *info)
1333613467{
1333713468   UINT32 i;
1333813469
1333913470   if(info)
1334013471      address = DoShift(address, info->address_shift);
1334113472
13342   if(!info)
13473   if(info == NULL)
1334313474   {
1334413475      switch(bytes)
1334513476      {
r2844r2845
1337013501      return;
1337113502   }
1337213503
13373generic:
13504   generic:
13505
1337413506   for(i = 0; i < bytes; i++)
1337513507   {
1337613508      if(swap)   buf[SwapAddress(address + i, bytes, info)] = data >> (i * 8);
r2844r2845
1337813510   }
1337913511}
1338013512
13381/*-----------
13382  ReadData
13383-----------*/
13513/*------------
13514  read_data
13515------------*/
1338413516
13385static UINT32 ReadData(cheat_action *action)
13517static UINT32 read_data(cheat_action *action)
1338613518{
13387   UINT8   addressRead      = EXTRACT_FIELD(action->type, AddressRead);
13388   UINT8   bytes         = EXTRACT_FIELD(action->type, AddressSize) + 1;
13519   UINT8   read_from   = EXTRACT_FIELD(action->type, AddressRead);
13520   UINT8   bytes      = EXTRACT_FIELD(action->type, AddressSize);
1338913521
13390   if(addressRead != kReadFrom_Variable)
13522   if(read_from != kReadFrom_Variable)
1339113523   {
1339213524      /* read a data from memory */
13393      int address = ~0;
13525      int      address         = ~0;
13526      UINT8   region         = action->region < REGION_INVALID ? EXTRACT_FIELD(action->region, CPUIndex) : action->region;
1339413527
13395      if(addressRead == kReadFrom_Address)      address = action->address;
13396      else if(addressRead == kReadFrom_Index)      address = cheatVariable[action->address];
13528      /* set address */
13529      if(read_from == kReadFrom_Address)      address = action->address;
13530      else if(read_from == kReadFrom_Index)   address = cheat_variable[action->address];
1339713531
13532      /* NOTE : data size "+1" */
13533      bytes++;
13534
13535      /* 1st, adjust address */
13536      if(action->flags & kActionFlag_IndexAddress)
13537      {
13538         int               index_address   = 0;
13539         cpu_region_info      *info         = get_cpu_info(region);
13540
13541         index_address = do_cpu_read(region, address, EXTRACT_FIELD(action->type, CodeParameterLower) + 1,
13542                              cpu_needs_swap(region) ^ EXTRACT_FIELD(action->type, Endianness));
13543
13544         if(info)
13545            index_address = DoShift(index_address, info->address_shift);
13546
13547         if(index_address)
13548            address = index_address + action->extend_data;
13549      }
13550      else if(action->flags & kActionFlag_PDWWrite)
13551      {
13552         if(action->flags & kActionFlag_IsFirst)
13553         {
13554            address += bytes;
13555            bytes = EXTRACT_FIELD(action->type, CodeParameterLower) + 1;
13556            action->flags &= ~kActionFlag_IsFirst;
13557         }
13558         else
13559            action->flags |= kActionFlag_IsFirst;
13560      }
13561
13562      /* 2nd, read a data from specified region */
1339813563      if(action->region < REGION_INVALID)
1339913564      {
13400         /* read a data from CPU */
13401         UINT8 cpu = EXTRACT_FIELD(action->region, CPUIndex);
13402
13565         /* CPU region */
1340313566         switch(EXTRACT_FIELD(action->region, AddressSpace))
1340413567         {
1340513568            case kAddressSpace_Program:
13406               if(action->flags & kActionFlag_IndexAddress)
13407               {
13408                  int indexAddress;
13569               return do_cpu_read(region, address, bytes, cpu_needs_swap(region) ^ EXTRACT_FIELD(action->type, Endianness));
1340913570
13410                  cpu_region_info *info = get_cpu_info(cpu);
13411
13412                  indexAddress = DoCPURead(cpu, address, EXTRACT_FIELD(action->type, CodeParameterLower) + 1, cpu_needs_swap(cpu) ^ EXTRACT_FIELD(action->type, Endianness));
13413
13414                  if(info && info->address_shift)
13415                     indexAddress = DoShift(indexAddress, info->address_shift);
13416
13417                  if(indexAddress)
13418                  {
13419                     indexAddress += action->extend_data;
13420                     return DoCPURead(cpu, indexAddress, bytes, cpu_needs_swap(cpu) ^ EXTRACT_FIELD(action->type, Endianness));
13421                  }
13422               }
13423               else if(action->flags & kActionFlag_PDWWrite)
13424               {
13425                  if(action->flags & kActionFlag_IsFirst)
13426                  {
13427                     address += bytes;
13428                     bytes = EXTRACT_FIELD(action->type, CodeParameterLower) + 1;
13429                     action->flags &= ~kActionFlag_IsFirst;
13430                  }
13431                  else
13432                     action->flags |= kActionFlag_IsFirst;
13433
13434                  return DoCPURead(cpu, address, bytes, cpu_needs_swap(cpu) ^ EXTRACT_FIELD(action->type, Endianness));
13435               }
13436               else
13437               {
13438                  return DoCPURead(cpu, address, bytes, cpu_needs_swap(cpu) ^ EXTRACT_FIELD(action->type, Endianness));
13439               }
13440               break;
13441
1344213571            case kAddressSpace_DataSpace:
1344313572            case kAddressSpace_IOSpace:
1344413573            case kAddressSpace_OpcodeRAM:
1344513574            case kAddressSpace_DirectMemory:
1344613575               {
13447                  UINT8 * buf;
13576                  UINT8 *buf;
1344813577
13449                  action->cached_pointer = GetMemoryRegionBasePointer(cpu, EXTRACT_FIELD(action->type, AddressSpace), address);
13450                  buf = (UINT8 *) action->cached_pointer;
13578                  action->cached_pointer = get_memory_region_base_pointer(region, EXTRACT_FIELD(action->type, AddressSpace), address);
13579                  buf = (UINT8 *)action->cached_pointer;
1345113580
1345213581                  if(buf)
13453                  {
13454                     if(action->flags && kActionFlag_PDWWrite)
13455                     {
13456                        if(action->flags & kActionFlag_IsFirst)
13457                        {
13458                           address += bytes;
13459                           bytes = EXTRACT_FIELD(action->type, CodeParameterLower) + 1;
13460                           action->flags &= ~kActionFlag_IsFirst;
13461                        }
13462                        else
13463                           action->flags |= kActionFlag_IsFirst;
13464                     }
13465
13466                     return DoMemoryRead(buf, address, bytes, cpu_needs_swap(cpu) ^ EXTRACT_FIELD(action->type, Endianness), get_cpu_info(cpu));
13467                  }
13582                     return do_memory_read(   buf, address, bytes,
13583                                       cpu_needs_swap(region) ^ EXTRACT_FIELD(action->type, Endianness),
13584                                       get_cpu_info(region));
1346813585               }
1346913586               break;
1347013587
1347113588            case kAddressSpace_MappedMemory:
1347213589               {
13473                  int      relativeAddress;
13590                  int      relative_address;
1347413591                  UINT8   **buf;
1347513592
13476                  action->cached_pointer = LookupHandlerMemory(cpu, address, &action->cached_offset);
13593                  action->cached_pointer = look_up_handler_memory(region, address, &action->cached_offset);
1347713594                  buf = action->cached_pointer;
13478                  relativeAddress = action->cached_offset;
13595                  relative_address = action->cached_offset;
1347913596
1348013597                  if(buf && *buf)
13481                  {
13482                     if(action->flags & kActionFlag_PDWWrite)
13483                     {
13484                        if(action->flags & kActionFlag_IsFirst)
13485                        {
13486                           relativeAddress += bytes;
13487                           bytes = EXTRACT_FIELD(action->type, CodeParameterLower) + 1;
13488                           action->flags &= ~kActionFlag_IsFirst;
13489                        }
13490                        else
13491                           action->flags |= kActionFlag_IsFirst;
13492                     }
13493
13494                     return DoMemoryRead(*buf, relativeAddress, bytes, cpu_needs_swap(cpu) ^ EXTRACT_FIELD(action->type, Endianness), get_cpu_info(cpu));
13495                  }
13598                     return do_memory_read(   *buf, relative_address, bytes,
13599                                       cpu_needs_swap(region) ^ EXTRACT_FIELD(action->type, Endianness),
13600                                       get_cpu_info(region));
1349613601               }
1349713602               break;
1349813603
r2844r2845
1350413609                  buf = eeprom_get_data_pointer(&length);
1350513610
1350613611                  if(is_address_in_range(action, length))
13507                  {
13508                     if(action->flags & kActionFlag_PDWWrite)
13509                     {
13510                        if(action->flags & kActionFlag_IsFirst)
13511                        {
13512                           address += bytes;
13513                           bytes = EXTRACT_FIELD(action->type, CodeParameterLower) + 1;
13514                           action->flags &= ~kActionFlag_IsFirst;
13515                        }
13516                        else
13517                           action->flags |= kActionFlag_IsFirst;
13518                     }
13519
13520                     return DoMemoryRead(buf, address, bytes, 0, &raw_cpu_info);
13521                  }
13612                     return do_memory_read(buf, address, bytes, 0, &raw_cpu_info);
1352213613               }
1352313614               break;
1352413615         }
1352513616      }
1352613617      else
1352713618      {
13528         /* read a data from region */
13529         UINT8 * buf = memory_region(action->region);
13619         /* non-CPU region */
13620         UINT8 * buf = memory_region(region);
1353013621
13531         if(buf && is_address_in_range(action, memory_region_length(action->region)))
13622         if(buf)
1353213623         {
13533            if(action->flags & kActionFlag_PDWWrite)
13534            {
13535               if(action->flags & kActionFlag_IsFirst)
13536               {
13537                  address += bytes;
13538                  bytes = EXTRACT_FIELD(action->type, CodeParameterLower) + 1;
13539                  action->flags &= ~kActionFlag_IsFirst;
13540               }
13541               else
13542                  action->flags |= kActionFlag_IsFirst;
13543
13544               return DoMemoryRead(buf, address, bytes, region_needs_swap(action->region) ^ EXTRACT_FIELD(action->type, Endianness), get_region_info(action->region));
13545            }
13546            else
13547               return DoMemoryRead(buf, address, bytes, region_needs_swap(action->region) ^ EXTRACT_FIELD(action->type, Endianness), get_region_info(action->region));
13624            if(is_address_in_range(action, memory_region_length(region)))
13625               return   do_memory_read(   buf, address, bytes,
13626                                 region_needs_swap(region) ^ EXTRACT_FIELD(action->type, Endianness),
13627                                 get_region_info(region));
1354813628         }
1354913629      }
1355013630   }
1355113631   else
13632   {
1355213633      /* read a data from variable */
13553      return (cheatVariable[action->address] & kCheatSizeMaskTable[EXTRACT_FIELD(action->type, AddressSize)]);
13634      return (cheat_variable[action->address] & kCheatSizeMaskTable[bytes]);
13635   }
1355413636
1355513637   return 0;
1355613638}
1355713639
13558/*-------------------------------------
13559  WriteData - write a data to memory
13560-------------------------------------*/
13640/*--------------------------------------
13641  write_data - write a data to memory
13642--------------------------------------*/
1356113643
13562static void WriteData(cheat_action *action, UINT32 data)
13644static void write_data(cheat_action *action, UINT32 data)
1356313645{
13564   UINT8   addressRead =   EXTRACT_FIELD(action->type, AddressRead);
13565   UINT8   bytes =         EXTRACT_FIELD(action->type, AddressSize) + 1;
13646   UINT8   read_from   = EXTRACT_FIELD(action->type, AddressRead);
13647   UINT8   bytes      = EXTRACT_FIELD(action->type, AddressSize);
1356613648
13567   if(EXTRACT_FIELD(action->type, AddressRead) != kReadFrom_Variable)
13649   if(read_from != kReadFrom_Variable)
1356813650   {
1356913651      /* write a data to memory */
13570      int address = ~0;
13652      int      address         = ~0;
13653      UINT8   region         = action->region < REGION_INVALID ? EXTRACT_FIELD(action->region, CPUIndex) : action->region;
1357113654
13572      if(addressRead == kReadFrom_Address)      address = action->address;
13573      else if(addressRead == kReadFrom_Index)      address = cheatVariable[action->address];
13655      /* set address */
13656      if(read_from == kReadFrom_Address)      address = action->address;
13657      else if(read_from == kReadFrom_Index)   address = cheat_variable[action->address];
1357413658
13659      /* NOTE : data size "+1" */
13660      bytes++;
13661
13662      /* 1st, adjust address */
13663      if(action->flags & kActionFlag_IndexAddress)
13664      {
13665         int               index_address   = 0;
13666         cpu_region_info      *info         = get_cpu_info(region);
13667
13668         index_address = do_cpu_read(region, address, EXTRACT_FIELD(action->type, CodeParameterLower) + 1,
13669                              cpu_needs_swap(region) ^ EXTRACT_FIELD(action->type, Endianness));
13670
13671         if(info)
13672            index_address = DoShift(index_address, info->address_shift);
13673
13674         if(index_address)
13675            address = index_address + action->extend_data;
13676      }
13677      else if(action->flags & kActionFlag_PDWWrite)
13678      {
13679         if(action->flags & kActionFlag_IsFirst)
13680         {
13681            address += bytes;
13682            bytes = EXTRACT_FIELD(action->type, CodeParameterLower) + 1;
13683            action->flags &= ~kActionFlag_IsFirst;
13684         }
13685         else
13686            action->flags |= kActionFlag_IsFirst;
13687      }
13688
13689      /* 2nd, write a data to specified region */
1357513690      if(action->region < REGION_INVALID)
1357613691      {
13577         UINT8 cpu = EXTRACT_FIELD(action->region, CPUIndex);
13578
13692         /* CPU region */
1357913693         switch(EXTRACT_FIELD(action->region, AddressSpace))
1358013694         {
1358113695            case kAddressSpace_Program:
13582               if(action->flags & kActionFlag_IndexAddress)
13583               {
13584                  int indexAddress;
13585
13586                  cpu_region_info *info = get_cpu_info(cpu);
13587
13588                  indexAddress = DoCPURead(cpu, address, EXTRACT_FIELD(action->type, CodeParameterLower) + 1, cpu_needs_swap(cpu) ^ EXTRACT_FIELD(action->type, Endianness));
13589
13590                  if(info && info->address_shift)
13591                     indexAddress = DoShift(indexAddress, info->address_shift);
13592
13593                  if(indexAddress)
13594                  {
13595                     indexAddress += action->extend_data;
13596                     DoCPUWrite(data, cpu, indexAddress, bytes, cpu_needs_swap(cpu) ^ EXTRACT_FIELD(action->type, Endianness));
13597                  }
13598               }
13599               else if(action->flags & kActionFlag_PDWWrite)
13600               {
13601                  if(action->flags & kActionFlag_IsFirst)
13602                  {
13603                     address += bytes;
13604                     bytes = EXTRACT_FIELD(action->type, CodeParameterLower) + 1;
13605                     action->flags &= ~kActionFlag_IsFirst;
13606                  }
13607                  else
13608                     action->flags |= kActionFlag_IsFirst;
13609
13610                  DoCPUWrite(data, cpu, address, bytes, cpu_needs_swap(cpu) ^ EXTRACT_FIELD(action->type, Endianness));
13611               }
13612               else
13613               {
13614                  DoCPUWrite(data, cpu, address, bytes, cpu_needs_swap(cpu) ^ EXTRACT_FIELD(action->type, Endianness));
13615               }
13696               do_cpu_write(data, region, address, bytes, cpu_needs_swap(region) ^ EXTRACT_FIELD(action->type, Endianness));
1361613697               break;
1361713698
1361813699            case kAddressSpace_DataSpace:
r2844r2845
1362013701            case kAddressSpace_OpcodeRAM:
1362113702            case kAddressSpace_DirectMemory:
1362213703               {
13623                  UINT8 * buf;
13704                  UINT8 *buf;
1362413705
13625                  action->cached_pointer = GetMemoryRegionBasePointer(cpu, EXTRACT_FIELD(action->type, AddressSpace), address);
13626                  buf = (UINT8 *) action->cached_pointer;
13706                  action->cached_pointer = get_memory_region_base_pointer(region, EXTRACT_FIELD(action->type, AddressSpace), address);
13707                  buf = (UINT8 *)action->cached_pointer;
1362713708
1362813709                  if(buf)
13629                  {
13630                     if(action->flags & kActionFlag_PDWWrite)
13631                     {
13632                        if(action->flags & kActionFlag_IsFirst)
13633                        {
13634                           address += bytes;
13635                           bytes = EXTRACT_FIELD(action->type, CodeParameterLower) + 1;
13636                           action->flags &= ~kActionFlag_IsFirst;
13637                        }
13638                        else
13639                           action->flags |= kActionFlag_IsFirst;
13640                     }
13641
13642                     DoMemoryWrite(data, buf, address, bytes, cpu_needs_swap(cpu) ^ EXTRACT_FIELD(action->type, Endianness), get_cpu_info(cpu));
13643                  }
13710                     do_memory_write(data, buf, address, bytes,
13711                                 cpu_needs_swap(region) ^ EXTRACT_FIELD(action->type, Endianness),
13712                                 get_cpu_info(region));
1364413713               }
1364513714               break;
1364613715
1364713716            case kAddressSpace_MappedMemory:
1364813717               {
13649                  int         relativeAddress;
13650                  UINT8 **   buf;
13718                  int      relative_address;
13719                  UINT8   **buf;
1365113720
13652                  action->cached_pointer = LookupHandlerMemory(cpu, address, &action->cached_offset);
13721                  action->cached_pointer = look_up_handler_memory(region, address, &action->cached_offset);
1365313722                  buf = action->cached_pointer;
13654                  relativeAddress = action->cached_offset;
13723                  relative_address = action->cached_offset;
1365513724
1365613725                  if(buf && *buf)
13657                  {
13658                     if(action->flags & kActionFlag_PDWWrite)
13659                     {
13660                        if(action->flags & kActionFlag_IsFirst)
13661                        {
13662                           relativeAddress += bytes;
13663                           bytes = EXTRACT_FIELD(action->type, CodeParameterLower) + 1;
13664                           action->flags &= ~kActionFlag_IsFirst;
13665                        }
13666                        else
13667                           action->flags |= kActionFlag_IsFirst;
13668                     }
13669
13670                     DoMemoryWrite(data, *buf, relativeAddress, bytes, cpu_needs_swap(cpu) ^ EXTRACT_FIELD(action->type, Endianness), get_cpu_info(cpu));
13671                  }
13726                     do_memory_write(data, *buf, relative_address, bytes,
13727                                 cpu_needs_swap(region) ^ EXTRACT_FIELD(action->type, Endianness),
13728                                 get_cpu_info(region));
1367213729               }
1367313730               break;
1367413731
1367513732            case kAddressSpace_EEPROM:
1367613733               {
1367713734                  int      length;
13678                  UINT8 *   buf;
13735                  UINT8   *buf;
1367913736
1368013737                  buf = eeprom_get_data_pointer(&length);
1368113738
1368213739                  if(is_address_in_range(action, length))
13683                  {
13684                     if(action->flags & kActionFlag_PDWWrite)
13685                     {
13686                        if(action->flags & kActionFlag_IsFirst)
13687                        {
13688                           address += bytes;
13689                           bytes = EXTRACT_FIELD(action->type, CodeParameterLower) + 1;
13690                           action->flags &= ~kActionFlag_IsFirst;
13691                        }
13692                        else
13693                           action->flags |= kActionFlag_IsFirst;
13694                     }
13695
13696                     DoMemoryWrite(data, buf, address, bytes, 0, &raw_cpu_info);
13697                  }
13740                     do_memory_write(data, buf, address, bytes, 0, &raw_cpu_info);
1369813741               }
1369913742               break;
1370013743         }
1370113744      }
1370213745      else
1370313746      {
13704         /* write a data into region */
13705         UINT8 * buf = memory_region(action->region);
13747         /* non-CPU region */
13748         UINT8 * buf = memory_region(region);
1370613749
13707         if(buf && is_address_in_range(action, memory_region_length(action->region)))
13750         if(buf)
1370813751         {
13709            if(action->flags & kActionFlag_PDWWrite)
13710            {
13711               if(action->flags & kActionFlag_IsFirst)
13712               {
13713                  address += bytes;
13714                  bytes = EXTRACT_FIELD(action->type, CodeParameterLower) + 1;
13715                  action->flags &= ~kActionFlag_IsFirst;
13716               }
13717               else
13718                  action->flags |= kActionFlag_IsFirst;
13719            }
13720
13721            DoMemoryWrite(data, buf, address, bytes, region_needs_swap(action->region) ^ EXTRACT_FIELD(action->type, Endianness), get_region_info(action->region));
13752            if(is_address_in_range(action, memory_region_length(region)))
13753               do_memory_write(data, buf, address, bytes,
13754                           region_needs_swap(region) ^ EXTRACT_FIELD(action->type, Endianness),
13755                           get_region_info(action->region));
1372213756         }
1372313757      }
1372413758   }
1372513759   else
13726      cheatVariable[action->address] = data & kCheatSizeMaskTable[EXTRACT_FIELD(action->type, AddressSize)];
13760   {
13761      /* write a data to variable */
13762      cheat_variable[action->address] = data & kCheatSizeMaskTable[bytes];
13763   }
1372713764}
1372813765
13729/*------------------------------------------------------------------------------------
13730  WatchCheatEntry - set watchpoint when watch value key is pressed in several menus
13731------------------------------------------------------------------------------------*/
13766/*--------------------------------------------------------------------------------------
13767  watch_cheat_entry - set watchpoint when watch value key is pressed in several menus
13768--------------------------------------------------------------------------------------*/
1373213769
13733static void WatchCheatEntry(cheat_entry *entry, UINT8 associate)
13770static void watch_cheat_entry(cheat_entry *entry, UINT8 associate)
1373413771{
1373513772   int         i, j;
13736   cheat_entry   *associateEntry = NULL;
13773   cheat_entry   *associate_entry = NULL;
1373713774
1373813775   /* NOTE : calling with associate = 1 doesn't exist right now */
1373913776   if(associate)
13740      associateEntry = entry;
13777      associate_entry = entry;
1374113778
13742   if(!entry)
13779   if(entry == NULL)
1374313780   {
13744      SET_MESSAGE(kCheatMessage_FailedToAdd);
13781      SET_MESSAGE(CHEAT_MESSAGE_FAILED_TO_ADD);
1374513782      return;
1374613783   }
1374713784
r2844r2845
1374913786   {
1375013787      cheat_action *action = &entry->action_list[i];
1375113788
13752      if(!(action->flags & kActionFlag_NoAction) && !EXTRACT_FIELD(action->type, AddressRead))
13789      if((action->flags & kActionFlag_NoAction) == 0 && EXTRACT_FIELD(action->type, AddressRead) == kReadFrom_Address)
1375313790      {
1375413791         /* NOTE : unsupported the watchpoint for indirect index right now */
13755         if((action->flags & kActionFlag_IndexAddress) && action->extend_data != ~0)
13792         if(action->flags & kActionFlag_IndexAddress)
1375613793            continue;
1375713794
13758         if(!i)
13795         if(i == 0)
1375913796         {
1376013797            /* first cheat action */
13761            AddActionWatch(&entry->action_list[i], associateEntry);
13798            add_action_watch(&entry->action_list[i], associate_entry);
1376213799         }
1376313800         else
1376413801         {
1376513802            /* 2nd or later cheat action */
13766            UINT8 differentAddress = 1;
13803            UINT8 different_address = 1;
1376713804
1376813805            for(j = 0; j < i; j++)
1376913806            {
1377013807               /* if we find the same address cheat action, skip it */
1377113808               if(entry->action_list[j].address == entry->action_list[i].address)
13772                  differentAddress = 0;
13809                  different_address = 0;
1377313810            }
1377413811
13775            if(differentAddress)
13776               AddActionWatch(&entry->action_list[i], associateEntry);
13812            if(different_address)
13813               add_action_watch(&entry->action_list[i], associate_entry);
1377713814         }
1377813815      }
1377913816   }
1378013817
13781   SET_MESSAGE(kCheatMessage_SucceededToAdd);
13818   SET_MESSAGE(CHEAT_MESSAGE_SUCCEEDED_TO_ADD);
1378213819}
1378313820
13784/*-----------------------------------------------------------------------
13785  AddActionWatch - set watchpoint parameters into WatchInfo.
13786                   called from WatchCheatEntry() when watch value key
13787                   or ActivateCheat() via watchpoint code.
13788-----------------------------------------------------------------------*/
13821/*--------------------------------------------------------------------------
13822  add_action_watch - set watchpoint parameters into watch info
13823                     called from watch_cheat_entry() when watch value key
13824                     or activate_cheat() via watchpoint code
13825--------------------------------------------------------------------------*/
1378913826
13790static void AddActionWatch(cheat_action *action, cheat_entry *entry)
13827static void add_action_watch(cheat_action *action, cheat_entry *entry)
1379113828{
1379213829   switch(EXTRACT_FIELD(action->type, CodeType))
1379313830   {
r2844r2845
1386313900   }
1386413901}
1386513902
13866/*------------------------------------------------------------------------------
13867  RemoveAssociatedWatches - delete watchpoints when watchpoint code is "OFF".
13868                            called from DeactivateCheat().
13869------------------------------------------------------------------------------*/
13903/*-------------------------------------------------------------------------------
13904  remove_associated_watches - delete watchpoints when watchpoint CODE is "OFF"
13905                              called from deactivate_cheat().
13906-------------------------------------------------------------------------------*/
1387013907
13871static void RemoveAssociatedWatches(cheat_entry *entry)
13908static void remove_associated_watches(cheat_entry *entry)
1387213909{
1387313910   int i;
1387413911
r2844r2845
1388113918   }
1388213919}
1388313920
13884/*--------------------------------------------------
13885  ResetAction - back up data and set action flags
13886--------------------------------------------------*/
13921/*---------------------------------------------------
13922  reset_action - back up data and set action flags
13923---------------------------------------------------*/
1388713924
13888static void ResetAction(cheat_action *action)
13925static void reset_action(cheat_action *action)
1388913926{
13890   if(action->flags & kActionFlag_NoAction)
13891      return;
13892
1389313927   /* back up a value */
1389413928   if(action->flags & kActionFlag_OldFormat)
1389513929   {
1389613930      UINT32 type = action->type;
1389713931
13898      action->last_value = malloc_or_die(sizeof(action->last_value));
13932      action->last_value = malloc(sizeof(action->last_value));
13933      if(action->last_value == NULL) goto reset_action_error;
1389913934      action->type = convert_to_new_code(action);
13900      action->last_value[0] = ReadData(action);
13935      action->last_value[0] = read_data(action);
1390113936      action->type = type;
1390213937   }
1390313938   else
1390413939   {
13905      if(!(action->flags & kActionFlag_LastValueGood))
13940      if(action->flags & kActionFlag_MemoryWrite)
1390613941      {
13907         switch(EXTRACT_FIELD(action->type, CodeType))
13942         if((action->flags & kActionFlag_LastValueGood) == 0)
1390813943         {
13909            default:
13910               action->last_value = malloc_or_die(sizeof(action->last_value));
13911               action->last_value[0] = ReadData(action);
13912               break;
13944            switch(EXTRACT_FIELD(action->type, CodeType))
13945            {
13946               default:
13947                  /* Write, IWrite, CWrite, CBit */
13948                  action->last_value = malloc(sizeof(action->last_value));
13949                  if(action->last_value == NULL) goto reset_action_error;
13950                  action->last_value[0] = read_data(action);
13951                  break;
1391313952
13914            case kCodeType_PDWWrite:
13915               action->last_value = malloc_or_die(sizeof(action->last_value) * 2);
13916               action->last_value[0] = ReadData(action);
13917               action->last_value[1] = ReadData(action);
13918               break;
13953               case kCodeType_PDWWrite:
13954                  action->last_value = malloc(sizeof(action->last_value) * 2);
13955                  if(action->last_value == NULL) goto reset_action_error;
13956                  action->flags &= ~kActionFlag_IsFirst;
13957                  action->last_value[0] = read_data(action);
13958                  action->last_value[1] = read_data(action);
13959                  break;
1391913960
13920            case kCodeType_RWrite:
13921               {
13922                  int i;
13961               case kCodeType_RWrite:
13962                  {
13963                     int i;
1392313964
13924                  for(i = 0; i < EXTRACT_FIELD(action->extend_data, LSB16); i++)
13925                  {
13926                     action->last_value = realloc(action->last_value, sizeof(action->last_value) * EXTRACT_FIELD(action->extend_data, LSB16));
13927                     action->last_value[i] = ReadData(action);
13928                     action->address +=   EXTRACT_FIELD(action->extend_data, MSB16) ?
13929                                    EXTRACT_FIELD(action->extend_data, MSB16) :
13930                                    kSearchByteIncrementTable[EXTRACT_FIELD(action->type, AddressSize)];
13965                     for(i = 0; i < EXTRACT_FIELD(action->extend_data, LSB16); i++)
13966                     {
13967                        action->last_value = realloc(action->last_value, sizeof(action->last_value) * EXTRACT_FIELD(action->extend_data, LSB16));
13968                        if(action->last_value == NULL) goto reset_action_error;
13969                        action->last_value[i] = read_data(action);
13970                        action->address +=   EXTRACT_FIELD(action->extend_data, MSB16) ?
13971                                       EXTRACT_FIELD(action->extend_data, MSB16) :
13972                                       kSearchByteIncrementTable[EXTRACT_FIELD(action->type, AddressSize)];
13973                     }
13974
13975                     action->address = action->original_address;
1393113976                  }
13932                  action->address = action->original_address;
13933               }
13934               break;
13977                  break;
13978            }
1393513979         }
1393613980      }
13981      else
13982         action->last_value = NULL;
1393713983   }
1393813984
1393913985   action->frame_timer = 0;
r2844r2845
1394313989   if(action->flags & kActionFlag_CheckCondition)
1394413990   {
1394513991      if(EXTRACT_FIELD(action->type, CodeParameter) == kCondition_PreviousValue)
13946      {
13947         if(EXTRACT_FIELD(action->type, CodeType) == kCodeType_CWrite)
13948            action->extend_data = ReadData(action);
13949         else
13950            action->data = ReadData(action);
13951      }
13992         action->extend_data = read_data(action);
1395213993   }
13994
13995   return;
13996
13997   reset_action_error:
13998
13999   fatalerror("cheat:[last value] memory allocation error\n"
14000            "   ----- %s -----\n"
14001            "   type =         %.8X\n"
14002            "   last_value =   %p\n",
14003            action->optional_name, action->type, action->last_value);
1395314004}
1395414005
13955/*-------------------------------------------------------------------------------------
13956  ActivateCheat - reset action entry and set activate entry flag when turn CODE "ON"
13957-------------------------------------------------------------------------------------*/
14006/*--------------------------------------------------------------------------------------
14007  activate_cheat - reset action entry and set activate entry flag when turn CODE "ON"
14008--------------------------------------------------------------------------------------*/
1395814009
13959static void ActivateCheat(cheat_entry *entry)
14010static void activate_cheat(cheat_entry *entry)
1396014011{
13961   int   i;
14012   int i;
1396214013
1396314014   for(i = 0; i < entry->action_list_length; i++)
1396414015   {
1396514016      cheat_action *action = &entry->action_list[i];
1396614017
13967      ResetAction(action);
14018      reset_action(action);
1396814019
1396914020      /* if watchpoint code, add watchpoint */
1397014021      if(EXTRACT_FIELD(action->type, CodeType) == kCodeType_Watch)
13971         AddActionWatch(action, entry);
14022         add_action_watch(action, entry);
1397214023   }
1397314024
1397414025   /* set activate flag */
1397514026   entry->flags |= kCheatFlag_Active;
1397614027}
1397714028
13978/*--------------------------------------------------------------------------------------
13979  DeactivateCheat - restore previous value and remove watchpoint when turn CODE "OFF"
13980--------------------------------------------------------------------------------------*/
14029/*--------------------------------------------------------
14030  restore_last_value - restore previous value if needed
14031--------------------------------------------------------*/
1398114032
13982static void DeactivateCheat(cheat_entry *entry)
14033static void restore_last_value(cheat_action *action)
1398314034{
13984   int i;
13985
13986   for(i = 0; i < entry->action_list_length; i++)
14035   if(action->flags & kActionFlag_MemoryWrite)
1398714036   {
13988      cheat_action *action = &entry->action_list[i];
13989
13990      /* restore previous value and clear backup flag if needed */
13991      if(TEST_FIELD(action->type, RestoreValue) && (action->flags & kActionFlag_LastValueGood))
14037      if(TEST_FIELD(action->type, RestoreValue))
1399214038      {
1399314039         switch(EXTRACT_FIELD(action->type, CodeType))
1399414040         {
1399514041            default:
13996               WriteData(action, (UINT32)action->last_value[0]);
14042               /* Write, IWrite, CWrite, CBit */
14043               write_data(action, (UINT32)action->last_value[0]);
1399714044               break;
1399814045
1399914046            case kCodeType_PDWWrite:
14000               WriteData(action, (UINT32)action->last_value[0]);
14001               WriteData(action, (UINT32)action->last_value[1]);
14047               action->flags &= ~kActionFlag_IsFirst;
14048               write_data(action, (UINT32)action->last_value[0]);
14049               write_data(action, (UINT32)action->last_value[1]);
1400214050               break;
1400314051
1400414052            case kCodeType_RWrite:
r2844r2845
1400714055
1400814056                  for(j = 0; j < EXTRACT_FIELD(action->extend_data, LSB16); j++)
1400914057                  {
14010                     WriteData(action, (UINT32)action->last_value[j]);
14058                     write_data(action, (UINT32)action->last_value[j]);
1401114059                     action->address +=   EXTRACT_FIELD(action->extend_data, MSB16) ?
1401214060                                    EXTRACT_FIELD(action->extend_data, MSB16) :
1401314061                                    kSearchByteIncrementTable[EXTRACT_FIELD(action->type, AddressSize)];
r2844r2845
1401614064               }
1401714065               break;
1401814066         }
14067      }
14068   }
14069}
14070
14071/*-------------------------------------------------------------------------
14072  deactivate_cheat - deactivate selecte cheat entry when turn CODE "OFF"
14073-------------------------------------------------------------------------*/
14074
14075static void deactivate_cheat(cheat_entry *entry)
14076{
14077   int i;
14078
14079   for(i = 0; i < entry->action_list_length; i++)
14080   {
14081      cheat_action *action = &entry->action_list[i];
14082
14083      action->frame_timer = 0;
14084      action->flags &= ~kActionFlag_OperationDone;
14085
14086      /* restore previous value if needed */
14087      if(action->last_value)
14088      {
14089         restore_last_value(action);
1401914090         action->flags &= ~kActionFlag_LastValueGood;
14091         free(action->last_value);
1402014092      }
14021      free(action->last_value);
14093
1402214094      action->last_value = NULL;
1402314095   }
1402414096
1402514097   /* remove watchpoint */
14026   RemoveAssociatedWatches(entry);
14098   remove_associated_watches(entry);
1402714099
1402814100   /* clear active flag */
1402914101   entry->flags &= ~kCheatFlag_StateMask;
1403014102}
1403114103
14032/*--------------------------------------------------------------------
14033  TempDeactivateCheat - restore previous value when turn CHEAT "OFF"
14034--------------------------------------------------------------------*/
14104/*-----------------------------------------------------------------
14105  temp_deactivate_cheat - deactivate cheat when turn CHEAT "OFF"
14106-----------------------------------------------------------------*/
1403514107
14036static void TempDeactivateCheat(cheat_entry *entry)
14108static void temp_deactivate_cheat(cheat_entry *entry)
1403714109{
1403814110   if(entry->flags & kCheatFlag_Active)
1403914111   {
r2844r2845
1404714119         action->flags &= ~kActionFlag_OperationDone;
1404814120
1404914121         /* restore previous value if needed */
14050         switch(EXTRACT_FIELD(action->type, CodeType))
14051         {
14052            default:
14053               WriteData(action, (UINT32)action->last_value[0]);
14054               break;
14055
14056            case kCodeType_PDWWrite:
14057               WriteData(action, (UINT32)action->last_value[0]);
14058               WriteData(action, (UINT32)action->last_value[1]);
14059               break;
14060
14061            case kCodeType_RWrite:
14062               {
14063                  int j;
14064
14065                  for(j = 0; j < EXTRACT_FIELD(action->extend_data, LSB16); j++)
14066                  {
14067                     WriteData(action, (UINT32)action->last_value[j]);
14068                     action->address +=   EXTRACT_FIELD(action->extend_data, MSB16) ?
14069                                    EXTRACT_FIELD(action->extend_data, MSB16) :
14070                                    kSearchByteIncrementTable[EXTRACT_FIELD(action->type, AddressSize)];
14071                  }
14072                  action->address = action->original_address;
14073               }
14074               break;
14075         }
14122         if(action->last_value)
14123            restore_last_value(action);
1407614124      }
1407714125   }
1407814126}
1407914127
14080
1408114128/*------------------------------------------------------------
1408214129  cheat_periodicOperation - management for cheat operations
1408314130------------------------------------------------------------*/
1408414131
1408514132static void cheat_periodicOperation(cheat_action *action)
1408614133{
14087   int data = TEST_FIELD(action->type, DataRead) ? cheatVariable[action->data] : action->data;
14134   int data = TEST_FIELD(action->type, DataRead) ? cheat_variable[action->data] : action->data;
1408814135
1408914136   if(action->flags & kActionFlag_PDWWrite)
1409014137   {
1409114138      action->flags &= ~kActionFlag_IsFirst;
14092      WriteData(action, data);
14093      WriteData(action, action->extend_data);
14139      write_data(action, data);
14140      write_data(action, action->extend_data);
1409414141   }
1409514142   else if(action->flags & kActionFlag_Repeat)
1409614143   {
r2844r2845
1409814145
1409914146      for(i = 0; i < EXTRACT_FIELD(action->extend_data, LSB16); i++)
1410014147      {
14101         WriteData(action, data);
14148         write_data(action, data);
1410214149         action->address +=   EXTRACT_FIELD(action->extend_data, MSB16) ?
1410314150                        EXTRACT_FIELD(action->extend_data, MSB16) :
1410414151                        kSearchByteIncrementTable[EXTRACT_FIELD(action->type, AddressSize)];
r2844r2845
1411014157      switch(EXTRACT_FIELD(action->type, CodeType))
1411114158      {
1411214159         case kCodeType_Write:
14113            WriteData(action, (data & action->extend_data) | (ReadData(action) & ~action->extend_data));
14160            write_data(action, (data & action->extend_data) | (read_data(action) & ~action->extend_data));
1411414161            break;
1411514162
1411614163         case kCodeType_IWrite:
1411714164            switch(EXTRACT_FIELD(action->type, CodeParameter))
1411814165            {
1411914166               case IWRITE_WRITE:
14120                  WriteData(action, data);
14167                  write_data(action, data);
1412114168                  break;
1412214169
1412314170               case IWRITE_BIT_SET:
14124                  WriteData(action, ReadData(action) | data);
14171                  write_data(action, read_data(action) | data);
1412514172                  break;
1412614173
1412714174               case IWRITE_BIT_CLEAR:
14128                  WriteData(action, ReadData(action) & ~data);
14175                  write_data(action, read_data(action) & ~data);
1412914176                  break;
1413014177
1413114178               case IWRITE_LIMITED_MASK:
14132                  WriteData(action, (EXTRACT_FIELD(data, MSB16) & EXTRACT_FIELD(data, LSB16)) | (ReadData(action) & ~EXTRACT_FIELD(data, LSB16)));
14179                  write_data(action, (EXTRACT_FIELD(data, MSB16) & EXTRACT_FIELD(data, LSB16)) | (read_data(action) & ~EXTRACT_FIELD(data, LSB16)));
1413314180                  break;
1413414181            }
1413514182            break;
1413614183
1413714184         case kCodeType_CWrite:
14138            WriteData(action, data);
14185            write_data(action, data);
1413914186            break;
1414014187
1414114188         case kCodeType_CBit:
1414214189            switch(EXTRACT_FIELD(action->type, CodeParameterUpper))
1414314190            {
1414414191               case CBIT_BIT_SET:
14145                  WriteData(action, ReadData(action) | data);
14192                  write_data(action, read_data(action) | data);
1414614193                  break;
1414714194
1414814195               case CBIT_BIT_CLEAR:
14149                  WriteData(action, ReadData(action) & ~data);
14196                  write_data(action, read_data(action) & ~data);
1415014197                  break;
1415114198
1415214199               case CBIT_LIMITED_MASK:
14153                  WriteData(action, (EXTRACT_FIELD(data, MSB16) & EXTRACT_FIELD(data, LSB16)) | (ReadData(action) & ~EXTRACT_FIELD(data, LSB16)));
14200                  write_data(action, (EXTRACT_FIELD(data, MSB16) & EXTRACT_FIELD(data, LSB16)) | (read_data(action) & ~EXTRACT_FIELD(data, LSB16)));
1415414201                  break;
1415514202            }
1415614203            break;
1415714204
1415814205         case kCodeType_Move:
14159            cheatVariable[EXTRACT_FIELD(action->type, CodeParameter)] = ReadData(action) + data;
14206            cheat_variable[EXTRACT_FIELD(action->type, CodeParameter)] = read_data(action) + data;
1416014207            break;
1416114208
1416214209         case kCodeType_Popup:
r2844r2845
1417014217                  ui_popup_time(1, "%*.*X",
1417114218                              kCheatSizeDigitsTable[EXTRACT_FIELD(action->type, AddressSize)],
1417214219                              kCheatSizeDigitsTable[EXTRACT_FIELD(action->type, AddressSize)],
14173                              ReadData(action));
14220                              read_data(action));
1417414221                  break;
1417514222
1417614223               case kPopup_LabelValue:
r2844r2845
1417814225                              action->optional_name,
1417914226                              kCheatSizeDigitsTable[EXTRACT_FIELD(action->type, AddressSize)],
1418014227                              kCheatSizeDigitsTable[EXTRACT_FIELD(action->type, AddressSize)],
14181                              ReadData(action));
14228                              read_data(action));
1418214229                  break;
1418314230
1418414231               case kPopup_ValueLabel:
1418514232                  ui_popup_time(1, "%*.*X %s",
1418614233                              kCheatSizeDigitsTable[EXTRACT_FIELD(action->type, AddressSize)],
1418714234                              kCheatSizeDigitsTable[EXTRACT_FIELD(action->type, AddressSize)],
14188                              ReadData(action),
14235                              read_data(action),
1418914236                              action->optional_name);
1419014237                  break;
1419114238            }
r2844r2845
1420414251
1420514252static UINT8 cheat_periodicCondition(cheat_action *action)
1420614253{
14207   int   data   = ReadData(action);
14254   int   data   = read_data(action);
1420814255   int   value   = action->extend_data;
1420914256
1421014257   if(EXTRACT_FIELD(action->type, CodeType) != kCodeType_CBit)
r2844r2845
1423914286         case kCondition_PreviousValue:
1424014287            if(data != value)
1424114288            {
14242               if(EXTRACT_FIELD(action->type, CodeType) == kCodeType_CWrite)
14243                  action->extend_data = data;
14244               else
14245                  action->data = data;
14246
14289               action->extend_data = data;
1424714290               return 1;
1424814291            }
1424914292            break;
r2844r2845
1428014323
1428114324static int cheat_periodicAction(running_machine *machine, cheat_action *action, int selection)
1428214325{
14283   UINT8 executeOperation = 0;
14326   UINT8 execute_operation = 0;
1428414327
1428514328   if(TEST_FIELD(action->type, PrefillEnable))
1428614329   {
r2844r2845
1429114334         if((action->flags & kActionFlag_PrefillWritten) == 0)
1429214335         {
1429314336            /* set prefill */
14294            WriteData(action, prefillValue);
14337            write_data(action, prefillValue);
1429514338            action->flags |= kActionFlag_PrefillWritten;
1429614339            return (TEST_FIELD(action->type, Return) ? CHEAT_RETURN_VALUE : selection + 1);
1429714340         }
1429814341         else
1429914342         {
1430014343            /* do re-write */
14301            if(ReadData(action) == prefillValue)
14344            if(read_data(action) == prefillValue)
1430214345               return (TEST_FIELD(action->type, Return) ? CHEAT_RETURN_VALUE : selection + 1);
1430314346
1430414347            action->flags |= kActionFlag_PrefillDone;
r2844r2845
1431114354      if(TEST_FIELD(action->type, OneShot) && TEST_FIELD(action->type, RestoreValue))
1431214355      {
1431314356         /* Keep */
14314         executeOperation = 1;
14357         execute_operation = 1;
1431514358
1431614359         if(action->frame_timer++ >= EXTRACT_FIELD(action->type, DelayEnable) * ATTOSECONDS_TO_HZ(video_screen_get_frame_period(machine->primary_screen).attoseconds))
1431714360            action->flags |= kActionFlag_OperationDone;
r2844r2845
1432114364         if(action->frame_timer++ >= EXTRACT_FIELD(action->type, DelayEnable) * ATTOSECONDS_TO_HZ(video_screen_get_frame_period(machine->primary_screen).attoseconds))
1432214365         {
1432314366            /* Delay */
14324            executeOperation = 1;
14367            execute_operation = 1;
1432514368            action->frame_timer = 0;
1432614369
1432714370            if(TEST_FIELD(action->type, OneShot))
r2844r2845
1433314376   {
1433414377      if(action->frame_timer++)
1433514378      {
14336         if(action->frame_timer >= EXTRACT_FIELD(action->type, DelayEnable) * ATTOSECONDS_TO_HZ(video_screen_get_frame_period(machine->primary_screen).attoseconds))
14379         if(action->frame_timer >= EXTRACT_FIELD(action->type, DelayEnable) + ATTOSECONDS_TO_HZ(video_screen_get_frame_period(machine->primary_screen).attoseconds))
1433714380            action->frame_timer = 0;
1433814381
1433914382         return (TEST_FIELD(action->type, Return) ? CHEAT_RETURN_VALUE : selection + 1);
1434014383      }
1434114384      else
14342      {
14343            executeOperation = 1;
14344
14345            action->flags |= kActionFlag_OperationDone;
14346      }
14385         execute_operation = 1;
1434714386   }
1434814387
1434914388   if(action->flags & kActionFlag_CheckCondition)
1435014389   {
1435114390      if(cheat_periodicCondition(action))
14352         executeOperation = 1;
14391         execute_operation = 1;
1435314392      else
14354         executeOperation = 0;
14393         execute_operation = 0;
1435514394   }
1435614395
14357   if(executeOperation)
14396   if(execute_operation)
1435814397   {
1435914398      /* do cheat operation */
1436014399      switch(EXTRACT_FIELD(action->type, CodeType))
r2844r2845
1437514414
1437614415         case kCodeType_Loop:
1437714416            {
14378               int counter = ReadData(action);
14417               int counter = read_data(action);
1437914418
1438014419               if(counter != 0)
1438114420               {
14382                  WriteData(action, counter - 1);
14421                  write_data(action, counter - 1);
1438314422
14384                  return (TEST_FIELD(action->type, DataRead) ? cheatVariable[action->data] : action->data);
14423                  return (TEST_FIELD(action->type, DataRead) ? cheat_variable[action->data] : action->data);
1438514424               }
1438614425            }
1438714426      }
r2844r2845
1440514444   if(!ui_is_menu_active())
1440614445   {
1440714446      /* NOTE : activation key should be not checked in activating UI menu because it conflicts activation key checker */
14408      if((entry->flags & kCheatFlag_HasActivationKey1) && input_code_pressed_once(entry->activation_key1))
14447      if((entry->flags & kCheatFlag_HasActivationKey1) && input_code_pressed_once(entry->activation_key_1))
1440914448         pressedKey = 1;
14410      else if((entry->flags & kCheatFlag_HasActivationKey2) && input_code_pressed_once(entry->activation_key2))
14449      else if((entry->flags & kCheatFlag_HasActivationKey2) && input_code_pressed_once(entry->activation_key_2))
1441114450         pressedKey = 2;
1441214451   }
1441314452
r2844r2845
1442814467
1442914468         /* NOTE : in handling activatio key, forced to activate a cheat even if one shot */
1443014469         if(!(entry->flags & kCheatFlag_OneShot) && !(entry->label_index[entry->selection]))
14431            DeactivateCheat(entry);
14470            deactivate_cheat(entry);
1443214471         else
14433            ActivateCheat(entry);
14472            activate_cheat(entry);
1443414473
1443514474         if(TEST_FIELD(cheat_options, ActivationKeyMessage))
1443614475         {
r2844r2845
1444814487      {
1444914488         if(entry->flags & kCheatFlag_OneShot)
1445014489         {
14451            ActivateCheat(entry);
14490            activate_cheat(entry);
1445214491
1445314492            if(TEST_FIELD(cheat_options, ActivationKeyMessage))
1445414493               ui_popup_time(1,"set %s", entry->name);
1445514494         }
1445614495         else if(entry->flags & kCheatFlag_Active)
1445714496         {
14458            DeactivateCheat(entry);
14497            deactivate_cheat(entry);
1445914498
1446014499            if(TEST_FIELD(cheat_options, ActivationKeyMessage))
1446114500               ui_popup_time(1,"%s disabled", entry->name);
1446214501         }
1446314502         else
1446414503         {
14465            ActivateCheat(entry);
14504            activate_cheat(entry);
1446614505
1446714506            if(TEST_FIELD(cheat_options, ActivationKeyMessage))
1446814507               ui_popup_time(1,"%s enabled", entry->name);
r2844r2845
1448014519   {
1448114520      if(entry->action_list[i].flags & kActionFlag_Custom)
1448214521      {
14483         if(EXTRACT_FIELD(entry->action_list[i].type, CodeType) == CUSTOM_CODE_LABEL_SELECT)
14522         if(entry->action_list[i].region == CUSTOM_CODE_LABEL_SELECT)
1448414523         {
1448514524            i = entry->label_index[entry->selection];
1448614525            isSelect = 1;
r2844r2845
1452514564      {
1452614565         if(entry->action_list[i].flags & kActionFlag_Custom)
1452714566         {
14528            if(EXTRACT_FIELD(entry->action_list[i].type, CodeType) == CUSTOM_CODE_LABEL_SELECT)
14567            if(entry->action_list[i].region == CUSTOM_CODE_LABEL_SELECT)
1452914568            {
1453014569               i = entry->label_index[entry->selection];
1453114570               isSelect = 1;
1453214571               continue;
1453314572            }
1453414573         }
14535         else if(entry->action_list[i].flags & kActionFlag_NoAction)
14574         else if((entry->action_list[i].flags & kActionFlag_OperationDone) == 0)
1453614575         {
14537            i++;
14538         }
14539         else if(!(entry->action_list[i].flags & kActionFlag_OperationDone))
14540         {
1454114576            done = 0;
1454214577            i++;
1454314578         }
r2844r2845
1455214587      }
1455314588
1455414589      if(done)
14555         DeactivateCheat(entry);
14590         deactivate_cheat(entry);
1455614591   }
1455714592}
1455814593
r2844r2845
1457014605      update_cheat_info(&cheat_list[i], 1);
1457114606
1457214607      if(cheat_list[i].flags & kCheatFlag_Select)
14573         BuildLabelIndexTable(&cheat_list[i]);
14608         build_label_index_table(&cheat_list[i]);
1457414609   }
1457514610
14576   SetLayerIndex();
14611   set_layer_index();
1457714612}
1457814613
14579/*--------------------------------------------------------------------------------------------------
14614/*----------------------------------------------------------------------------------------------------
1458014615  update_cheat_info - check several fields on cheat entry and cheat action then set flags
14581                      "isLoadTime" parameter is set when called update_all_cheat_info() right now
14582--------------------------------------------------------------------------------------------------*/
14616                      "is_load_time" parameter is set when called update_all_cheat_info() right now
14617----------------------------------------------------------------------------------------------------*/
1458314618
1458414619static void update_cheat_info(cheat_entry *entry, UINT8 is_load_time)
1458514620{
r2844r2845
1460714642            (EXTRACT_FIELD(action->type, LocationParameter) == kCustomLocation_Select))
1460814643               flags |= kCheatFlag_Select;
1460914644
14610         if(EXTRACT_FIELD(action->type, LocationType) != kLocation_Custom)
14645         if(is_null && EXTRACT_FIELD(action->type, LocationType) != kLocation_Custom)
1461114646            is_null = 0;
1461214647
1461314648         if(TEST_FIELD(action->type, UserSelectEnable))
r2844r2845
1463014665         }
1463114666
1463214667         is_new_format = 0;
14633         is_one_shot = 0;
1463414668      }
1463514669      else
1463614670      {
r2844r2845
1463814672         {
1463914673            switch(EXTRACT_FIELD(action->type, CodeType))
1464014674            {
14641               case kCodeType_PDWWrite:
14642                  action_flags |= kActionFlag_PDWWrite;
14675               case kCodeType_Write:
14676                  action_flags |= kActionFlag_MemoryWrite;
1464314677                  break;
1464414678
1464514679               case kCodeType_IWrite:
14680                  action_flags |= kActionFlag_MemoryWrite;
1464614681                  if(action->extend_data != ~0)
14682                  {
1464714683                     action_flags |= kActionFlag_IndexAddress;
14648                  if(EXTRACT_FIELD(action->type, CodeParameterUpper) == IWRITE_LIMITED_MASK)
14649                     action_flags |= kActionFlag_LimitedMask;
14684                     if(EXTRACT_FIELD(action->type, CodeParameterUpper) == IWRITE_LIMITED_MASK)
14685                        action_flags |= kActionFlag_LimitedMask;
14686                  }
1465014687                  break;
1465114688
14689               case kCodeType_RWrite:
14690                  action_flags |= kActionFlag_MemoryWrite;
14691                  action_flags |= kActionFlag_Repeat;
14692                  break;
14693
14694               case kCodeType_CWrite:
14695                  action_flags |= kActionFlag_MemoryWrite;
14696                  action_flags |= kActionFlag_CheckCondition;
14697                  break;
14698
1465214699               case kCodeType_CBit:
14653                  action->flags |= kActionFlag_CheckCondition;
14700                  action_flags |= kActionFlag_MemoryWrite;
14701                  action_flags |= kActionFlag_CheckCondition;
1465414702                  if(EXTRACT_FIELD(action->type, CodeParameterUpper) == CBIT_LIMITED_MASK)
1465514703                     action_flags |= kActionFlag_LimitedMask;
1465614704                  break;
1465714705
14658               case kCodeType_RWrite:
14659                  action_flags |= kActionFlag_Repeat;
14706               case kCodeType_PDWWrite:
14707                  action_flags |= kActionFlag_MemoryWrite;
14708                  action_flags |= kActionFlag_PDWWrite;
1466014709                  break;
1466114710
1466214711               case kCodeType_Move:
r2844r2845
1466414713                     action_flags |= kActionFlag_IndexAddress;
1466514714                  break;
1466614715
14667               case kCodeType_CWrite:
1466814716               case kCodeType_Branch:
1466914717                  action_flags |= kActionFlag_CheckCondition;
1467014718                  break;
r2844r2845
1467314721                  action_flags |= kActionFlag_CheckCondition;
1467414722                  break;
1467514723
14676                  if(action->extend_data != ~0)
14677                     action_flags |= kActionFlag_IndexAddress;
14678                  break;
14679
1468014724               case kCodeType_Watch:
1468114725                  action_flags |= kActionFlag_NoAction;
1468214726                  break;
r2844r2845
1469514739               flags |= kCheatFlag_Select;
1469614740
1469714741            /* is comment? */
14698            if(action->region != CUSTOM_CODE_COMMENT)
14742            if(is_null && action->region != CUSTOM_CODE_COMMENT)
1469914743               is_null = 0;
1470014744
1470114745            /* is separator? */
14702            if(action->region != CUSTOM_CODE_SEPARATOR)
14746            if(is_separator && action->region != CUSTOM_CODE_SEPARATOR)
1470314747               is_separator = 0;
1470414748
1470514749            /* is layer index? */
r2844r2845
1471414758      action->flags = action_flags;
1471514759   }
1471614760
14717   if(is_new_format == 0)
14718      flags |= kCheatFlag_OldFormat;
14719
1472014761   if(is_one_shot)
1472114762      flags |= kCheatFlag_OneShot;
1472214763
14723   if(is_null)
14764   if(is_new_format == 0)
1472414765   {
14725      if(entry->action_list_length > 1)
14726         flags |= kCheatFlag_ExtendComment;
14727      else
14766      flags |= kCheatFlag_OldFormat;
14767
14768      if(is_null)
1472814769         flags |= kCheatFlag_Null;
1472914770   }
14771   else
14772   {
14773      if(is_null)
14774      {
14775         /* NOTE : auto detection if multi-comment code */
14776         if(entry->action_list_length > 1)
14777            flags |= kCheatFlag_ExtendComment;
14778         else
14779            flags |= kCheatFlag_Null;
14780      }
1473014781
14731   if(is_new_format)
14732   {
1473314782      if(is_separator)
1473414783      {
1473514784         flags |= kCheatFlag_Null;
r2844r2845
1474614795   check_code_format(entry);
1474714796}
1474814797
14749/*--------------------
14750  AnalyseCodeFormat
14751--------------------*/
14798/*----------------------
14799  analyse_code_format
14800----------------------*/
1475214801
14753static UINT32 AnalyseCodeFormat(cheat_entry *entry, cheat_action *action)
14802static UINT32 analyse_code_format(cheat_entry *entry, cheat_action *action)
1475414803{
1475514804   UINT32 errorFlag = 0;
1475614805
r2844r2845
1490814957      }
1490914958      else
1491014959      {
14911         if(EXTRACT_FIELD(action->type, CodeParameter) >= CUSTOM_CODE_UNUSED_1)
14960         if(action->region >= CUSTOM_CODE_UNUSED_1)
1491214961            errorFlag |= kErrorFlag_InvalidCustomCode;
1491314962      }
1491414963   }
r2844r2845
1492914978   {
1493014979      cheat_action *action = &entry->action_list[i];
1493114980
14932      if(AnalyseCodeFormat(entry, action))
14981      if(analyse_code_format(entry, action))
1493314982         is_error = 1;
1493414983   }
1493514984
1493614985   if(is_error)
1493714986   {
1493814987      entry->flags |= kCheatFlag_HasWrongCode;
14939      SET_MESSAGE(kCheatMessage_WrongCode);
14988      SET_MESSAGE(CHEAT_MESSAGE_WRONG_CODE);
1494014989   }
1494114990}
1494214991
14943/*-------------------------------------------------------------------------------------------------
14944  BuildLabelIndexTable - create index table for label-selection and calculate index table length
14945-------------------------------------------------------------------------------------------------*/
14992/*----------------------------------------------------------------------------------------------------
14993  build_label_index_table - create index table for label-selection and calculate index table length
14994----------------------------------------------------------------------------------------------------*/
1494614995
14947static void BuildLabelIndexTable(cheat_entry *entry)
14996static void build_label_index_table(cheat_entry *entry)
1494814997{
1494914998   int i, j, length = 0;
1495014999
r2844r2845
1495415003   {
1495515004      cheat_action *action = &entry->action_list[i];
1495615005
14957      if((action->flags && kActionFlag_Custom) && EXTRACT_FIELD(action->type, CodeType) == CUSTOM_CODE_LABEL_SELECT)
15006      if((action->flags & kActionFlag_Custom) && action->region == CUSTOM_CODE_LABEL_SELECT)
1495815007      {
14959         entry->label_index = malloc_or_die(sizeof(entry->label_index) * (++entry->label_index_length + 1));
15008         /* label selection master code */
15009         entry->label_index = malloc(sizeof(entry->label_index) * (++entry->label_index_length + 1));
15010
15011         if(entry->label_index == NULL)
15012            goto label_index_error;
15013
1496015014         entry->label_index[j++] = i;
14961
1496215015         length = action->data ? action->data + i : entry->action_list_length;
1496315016      }
1496415017      else if(EXTRACT_FIELD(action->type, Link) == kLink_Link)
1496515018      {
15019         /* link or sub-link code */
1496615020         if(length)
1496715021         {
1496815022            entry->label_index = realloc(entry->label_index, sizeof(entry->label_index) * (++entry->label_index_length + 1));
15023
15024            if(entry->label_index == NULL)
15025               goto label_index_error;
15026
1496915027            entry->label_index[j++] = i;
1497015028         }
1497115029      }
r2844r2845
1497315031
1497415032   if(entry->label_index_length <= 1)
1497515033   {
14976      logerror("cheat - BuildLabelIndexTable : %s fails to build due to invalid or no link\n", entry->name);
15034      logerror("cheat: [label index table] %s fails to build due to invalid or no link\n", entry->name);
1497715035      return;
1497815036   }
15037   else
15038      /* set terminator */
15039      entry->label_index[entry->label_index_length] = ~0;
1497915040
1498015041   if(entry->flags & kCheatFlag_OneShot)
1498115042      entry->selection = 1;
1498215043
14983   //logerror("Cheat - Finish building index table for %s (length = %x)\n", entry->name, entry->label_index_length);
14984   //for(i = 0; i < entry->label_index_length; i++)
14985   //  logerror("IndexTable[%x] = %x\n",i,entry->label_index[i]);
15044   /* logerror("Cheat - Finish building index table for %s (length = %x)\n", entry->name, entry->label_index_length); */
15045   /* for(i = 0; i < entry->label_index_length; i++) */
15046   /*  logerror("IndexTable[%x] = %x\n",i,entry->label_index[i]); */
1498615047
15048   return;
15049
15050   label_index_error:
15051
15052   fatalerror("cheat:[label index table] memory allocation error\n"
15053            "   name =               %s\n"
15054            "   label_index_length =   %.8X\n"
15055            "   label_index_length =   %p\n",
15056            entry->name, entry->label_index_length, entry->label_index);
1498715057}
1498815058
14989/*----------------
14990  SetLayerIndex
14991----------------*/
15059/*------------------
15060  set_layer_index
15061------------------*/
1499215062
14993static void SetLayerIndex(void)
15063static void set_layer_index(void)
1499415064{
1499515065   int i, j;
1499615066
r2844r2845
1501015080            {
1501115081               cheat_entry *traverse = &cheat_list[j];
1501215082
15013               if(!(traverse->flags & kCheatFlag_LayerIndex))
15083               if((traverse->flags & kCheatFlag_LayerIndex) == 0)
1501415084                  traverse->layer_index = entry->action_list[0].data;
1501515085            }
1501615086         }
r2844r2845
1501815088   }
1501915089}
1502015090
15021/*-----------------------------------------------------------------------------------------
15022  DisplayCheatMessage - display cheat message via ui_draw_text_box instead of popup menu
15023                        warning message is displayed with red back color
15024-----------------------------------------------------------------------------------------*/
15091/*-------------------------------------------------------------------------------------------
15092  display_cheat_message - display cheat message via ui_draw_text_box instead of popup menu
15093-------------------------------------------------------------------------------------------*/
1502515094
15026static void DisplayCheatMessage(void)
15095static void display_cheat_message(void)
1502715096{
15028   static const char *const kCheatMessageTable[] = {
15029      "INVALID MESSAGE!",            // this message is unused
15030      "cheat option reloaded",
15031      "cheat code reloaded",
15032      "user defined search region reloaded",
15033      "failed to load database!",
15034      "cheats found",
15035      "1 result found, added to list",
15036      "succeeded to save",
15037      "failed to save!",
15038      "cheats saved",
15039      "activation key saved",
15040      "no activation key!",
15041      "pre-enable saved",
15042      "succeeded to add",
15043      "failed to add!",
15044      "succeeded to delete",
15045      "failed to delete!",
15046      "no search region!",
15047      "values restored",
15048      "there are no old values!",
15049      "saved all memory regions",
15050      "region invalidated remains results are",
15051      "failed to allocate memory!",
15052      "found wrong code!" };
15053
1505415097   char buf[64];
1505515098
15056   if(message_type == 0)
15057      return;
15058
1505915099   switch(message_type)
1506015100   {
1506115101      /* simple message */
1506215102      default:
15063         sprintf(buf, "%s", kCheatMessageTable[message_type]);
15103         sprintf(buf, "%s", CHEAT_MESSAGE_TABLE[message_type]);
1506415104         break;
1506515105
1506615106      /* message with data */
15067      case kCheatMessage_CheatFound:
15068      case kCheatMessage_InvalidatedRegion:
15069      {
15070         search_info *search = get_current_search();
15107      case CHEAT_MESSAGE_CHEAT_FOUND:
15108      case CHEAT_MESSAGE_INVALIDATE_REGION:
15109         {
15110            search_info *search = get_current_search();
1507115111
15072         sprintf(buf, "%d %s", search->num_results, kCheatMessageTable[message_type]);
15073      }
15074      break;
15112            sprintf(buf, "%d %s", search->num_results, CHEAT_MESSAGE_TABLE[message_type]);
15113         }
15114         break;
1507515115
15076      case kCheatMessage_AllCheatSaved:
15077         sprintf(buf, "%d %s", cheat_list_length, kCheatMessageTable[message_type]);
15116      case CHEAT_MESSAGE_ALL_CHEATS_SAVED:
15117         sprintf(buf, "%d %s", cheat_list_length, CHEAT_MESSAGE_TABLE[message_type]);
1507815118         break;
1507915119   }
1508015120
r2844r2845
1508515125         ui_draw_text_box(buf, JUSTIFY_CENTER, 0.5f, 0.9f, UI_FILLCOLOR);
1508615126         break;
1508715127
15088      case kCheatMessage_None:
15089      case kCheatMessage_FailedToLoadDatabase:
15090      case kCheatMessage_FailedToSave:
15091      case kCheatMessage_NoActivationKey:
15092      case kCheatMessage_FailedToAdd:
15093      case kCheatMessage_FailedToDelete:
15094      case kCheatMessage_NoSearchRegion:
15095      case kCheatMessage_NoOldValue:
15096      case kCheatMessage_Max:
15097      case kCheatMessage_FailedToAllocate:
15098      case kCheatMessage_WrongCode:
15128      case CHEAT_MESSAGE_NONE:
15129      case CHEAT_MESSAGE_FAILED_TO_LOAD_DATABASE:
15130      case CHEAT_MESSAGE_FAILED_TO_SAVE:
15131      case CHEAT_MESSAGE_NO_SUPPORTED_OLD_FORMAT:
15132      case CHEAT_MESSAGE_NO_ACTIVATION_KEY:
15133      case CHEAT_MESSAGE_FAILED_TO_ADD:
15134      case CHEAT_MESSAGE_FAILED_TO_DELETE:
15135      case CHEAT_MESSAGE_NO_SEARCH_REGION:
15136      case CHEAT_MESSAGE_NO_OLD_VALUE:
15137      case CHEAT_MESSAGE_FAILED_TO_ALLOCATE:
15138      case CHEAT_MESSAGE_WRONG_CODE:
15139      case CHEAT_MESSAGE_MAX:
1509915140         /* warning message has red background color */
1510015141         ui_draw_text_box(buf, JUSTIFY_CENTER, 0.5f, 0.9f, UI_REDCOLOR);
1510115142         break;
r2844r2845
1511215153
1511315154static UINT8 get_address_length(UINT8 region)
1511415155{
15115   if(region != CUSTOM_CODE)
15156   if(region < CUSTOM_CODE)
1511615157   {
1511715158      cpu_region_info *info = get_cpu_or_region_info(region);
1511815159
r2844r2845
1512015161         return info->address_chars_needed;
1512115162   }
1512215163
15123   return DEFAULT_ADDRESS_LENGTH;
15164   return cpu_info_list[0].address_chars_needed;
1512415165}
1512515166
1512615167/*------------------
src/emu/drivers/xtal.h
r2844r2845
6464   XTAL_7_15909MHz      = 7159090,      /* Blood Bros */
6565   XTAL_7_3728MHz      = 7372800,
6666   XTAL_8MHz          = 8000000,      /* Extremely common, used on 100's of PCBs */
67   XTAL_8_664MHz      = 8664000,      /* Touchmaster */
6768   XTAL_9_987MHz      = 9987000,      /* Crazy Balloon */
6869   XTAL_10MHz         = 10000000,
6970   XTAL_10_595MHz     = 10595000,      /* Mad Alien */
src/mess/video/nes.c
r2844r2845
2525
2626static void nes_vh_reset(running_machine *machine)
2727{
28   ppu2c0x_reset( 0, 1 );
28   ppu2c0x_reset( machine, 0, 1 );
2929}
3030
3131
src/mess/machine/bebox.c
r2844r2845
878878   int reg = offset*8;
879879   UINT64 r = 0;
880880   if (!(mem_mask & U64(0xff00000000000000))) {
881      r |= (UINT64)lsi53c810_reg_r(reg+0) << 56;
881      r |= (UINT64)lsi53c810_reg_r(machine, reg+0) << 56;
882882   }
883883   if (!(mem_mask & U64(0x00ff000000000000))) {
884      r |= (UINT64)lsi53c810_reg_r(reg+1) << 48;
884      r |= (UINT64)lsi53c810_reg_r(machine, reg+1) << 48;
885885   }
886886   if (!(mem_mask & U64(0x0000ff0000000000))) {
887      r |= (UINT64)lsi53c810_reg_r(reg+2) << 40;
887      r |= (UINT64)lsi53c810_reg_r(machine, reg+2) << 40;
888888   }
889889   if (!(mem_mask & U64(0x000000ff00000000))) {
890      r |= (UINT64)lsi53c810_reg_r(reg+3) << 32;
890      r |= (UINT64)lsi53c810_reg_r(machine, reg+3) << 32;
891891   }
892892   if (!(mem_mask & U64(0x00000000ff000000))) {
893      r |= (UINT64)lsi53c810_reg_r(reg+4) << 24;
893      r |= (UINT64)lsi53c810_reg_r(machine, reg+4) << 24;
894894   }
895895   if (!(mem_mask & U64(0x0000000000ff0000))) {
896      r |= (UINT64)lsi53c810_reg_r(reg+5) << 16;
896      r |= (UINT64)lsi53c810_reg_r(machine, reg+5) << 16;
897897   }
898898   if (!(mem_mask & U64(0x000000000000ff00))) {
899      r |= (UINT64)lsi53c810_reg_r(reg+6) << 8;
899      r |= (UINT64)lsi53c810_reg_r(machine, reg+6) << 8;
900900   }
901901   if (!(mem_mask & U64(0x00000000000000ff))) {
902      r |= (UINT64)lsi53c810_reg_r(reg+7) << 0;
902      r |= (UINT64)lsi53c810_reg_r(machine, reg+7) << 0;
903903   }
904904
905905   return r;
src/mess/mess.mak
r2844r2845
192192#CPUS += ALPHA8301
193193CPUS += CDP1802
194194CPUS += COP420
195#CPUS += COP421
195196#CPUS += COP410
196197#CPUS += TLCS90
197198#CPUS += MB8841
src/mess/drivers/cpschngr.c
r2844r2845
3838   memory_install_write16_handler(machine, 0, ADDRESS_SPACE_PROGRAM, 0x800048, 0x800049, 0, 0, forgottn_dial_1_reset_w);
3939   memory_install_read16_handler (machine, 0, ADDRESS_SPACE_PROGRAM, 0x800052, 0x800055, 0, 0, forgottn_dial_0_r);
4040   memory_install_read16_handler (machine, 0, ADDRESS_SPACE_PROGRAM, 0x80005a, 0x80005d, 0, 0, forgottn_dial_1_r);
41   cps1_hack_dsw_r(machine, 0, 0);
4142}
4243
4344/***************************************************************************
src/mess/drivers/dc.c
r2844r2845
131131
132132static INTERRUPT_GEN( dc_dispatch_vblank )
133133{
134   dc_vblank();
134   dc_vblank(machine);
135135}
136136
137137static const struct sh4_config sh4cpu_config = {  1,  0,  1,  0,  0,  0,  1,  1,  0, CPU_CLOCK };
src/mess/drivers/a2600.c
r2844r2845
14091409   const device_config *screen = video_screen_first(machine->config);
14101410   current_screen_height = video_screen_get_height(screen);
14111411   extra_RAM = new_memory_region( machine, REGION_USER2, 0x8600, ROM_REQUIRED );
1412   tia_init( &tia_interface );
1412   tia_init( machine, &tia_interface );
14131413   r6532_config( 0, &r6532_interface );
14141414   r6532_set_clock( 0, MASTER_CLOCK_NTSC / 3 );
14151415   r6532_reset(0);
r2844r2845
14221422   const device_config *screen = video_screen_first(machine->config);
14231423   current_screen_height = video_screen_get_height(screen);
14241424   extra_RAM = new_memory_region( machine, REGION_USER2, 0x8600, ROM_REQUIRED );
1425   tia_init( &tia_interface_pal );
1425   tia_init( machine, &tia_interface_pal );
14261426   r6532_config( 0, &r6532_interface );
14271427   r6532_set_clock( 0, MASTER_CLOCK_PAL / 3 );
14281428   r6532_reset(0);
src/mess/drivers/psx.c
r2844r2845
715715
716716static MACHINE_RESET( psx )
717717{
718   psx_machine_init();
718   psx_machine_init(machine);
719719   psx_sio_install_handler( 0, psx_sio0 );
720720}
721721
docs/messnew.txt
r2844r2845
128128
129129Source Changes:
130130----------------
131- The core is based on MAME 0.125u4.  This incorporates all features of the
131- The core is based on MAME 0.125u5.  This incorporates all features of the
132132  update to this core.  [MAME team]
133133
134134- Fixed performance problems with -triplebuffer.  (bug #1539) [Justin Kerk]

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