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15994 Revisions

r2828 Friday 6th June, 2008 at 16:28:38 UTC by Wilbert Pol
Minx cpu core: Fixed handling of the U register in the RET instructions and when taking an interrupt.

[src/emu/cpu/minx]

minx.c minxops.h

src/emu/cpu/minx/minxops.h
r2827	r2828
265	265	OP(F5) { INT8 d8 = rdop(); regs.BA = regs.BA - 0x0100; if ( regs.BA & 0xFF00 ) { JMP( regs.PC + d8 - 1 ); } }
266	266	OP(F6) { regs.BA = ( regs.BA & 0xFF00 ) \| ( ( regs.BA & 0x00F0 ) >> 4 ) \| ( ( regs.BA & 0x000F ) << 4 ); }
267	267	OP(F7) { UINT8 d; AD1_IHL; d = RD( addr1 ); WR( addr1, ( ( d & 0xF0 ) >> 4 ) \| ( ( d & 0x0F ) << 4 ) ); }
268		OP(F8) { regs.PC = POP16(); regs.V = POP8(); }
269		OP(F9) { regs.F = POP8(); regs.PC = POP16(); regs.V = POP8(); }
270		OP(FA) { regs.PC = POP16() + 2; regs.V = POP8(); }
	268	OP(F8) { regs.PC = POP16(); regs.V = POP8(); regs.U = regs.V; }
	269	OP(F9) { regs.F = POP8(); regs.PC = POP16(); regs.V = POP8(); regs.U = regs.V; }
	270	OP(FA) { regs.PC = POP16() + 2; regs.V = POP8(); regs.U = regs.V; }
271	271	OP(FB) { AD1_I16; CALL( rd16( addr1 ) ); }
272	272	OP(FC) { UINT8 i = rdop() & 0xFE; CALL( rd16(i) ); PUSH8( regs.F ); }
273	273	OP(FD) { UINT8 i = rdop() & 0xFE; JMP( rd16(i) ); /* PUSH8( regs.F );?? */ }
r2827	r2828
314	314	8, 8, 8, 8, 12, 16, 8, 8, 8, 8, 8, 8, 12, 16, 8, 8,
315	315	8, 8, 8, 8, 12, 16, 8, 8, 8, 8, 8, 8, 12, 16, 8, 8,
316	316	8, 8, 8, 8, 12, 16, 8, 8, 8, 8, 8, 8, 12, 16, 8, 8,
317
	317
318	318	4, 4, 4, 4, 12, 8, 8, 8, 4, 4, 4, 4, 12, 8, 8, 8,
319	319	4, 4, 4, 4, 12, 8, 8, 8, 4, 4, 4, 4, 12, 8, 8, 8,
320	320	8, 8, 8, 8, 16, 12, 12, 12, 8, 8, 8, 8, 16, 12, 12, 12,

src/emu/cpu/minx/minx.c
r2827	r2828
171	171	if ( regs.interrupt_pending )
172	172	{
173	173	regs.halted = 0;
174		if ( ! ( regs.F & 0xc0 ) )
	174	if ( ! ( regs.F & 0xc0 ) && regs.U == regs.V )
175	175	{
176	176	//logerror("minx_execute(): taking IRQ\n");
177	177	PUSH8( regs.V );

15994 Revisions