Previous

15994 Revisions

Next

r2302 Sunday 6th April, 2008 at 14:13:33 UTC by Wilbert Pol
[BEBOX/AT/PC] Updated to use the dma 8237 device implementation.

[src/mess/drivers]	at.c bebox.c pc.c
[src/mess/includes]	at.h bebox.h pc.h
[src/mess/machine]	at.c bebox.c pc.c

src/mess/includes/at.h

r2301	r2302
12	12
13	13	/*----------- defined in machine/at.c -----------*/
14	14
	15	extern const struct dma8237_interface at_dma8237_1_config;
	16	extern const struct dma8237_interface at_dma8237_2_config;
	17
	18
	19	READ8_HANDLER( at_page8_r );
	20	WRITE8_HANDLER( at_page8_w );
	21
15	22	DRIVER_INIT( atcga );
16	23	DRIVER_INIT( at386 );
17	24	DRIVER_INIT( at586 );

src/mess/includes/bebox.h

r2301	r2302
13	13	/*----------- defined in machine/bebox.c -----------*/
14	14
15	15	extern const struct pit8253_config bebox_pit8254_config;
	16	extern const struct dma8237_interface bebox_dma8237_1_config;
	17	extern const struct dma8237_interface bebox_dma8237_2_config;
16	18
17	19	MACHINE_RESET( bebox );
18	20	DRIVER_INIT( bebox );

src/mess/includes/pc.h

r2301	r2302
9	9
10	10	/*----------- defined in machine/pc.c -----------*/
11	11
	12	extern const struct dma8237_interface pc_dma8237_config;
	13
12	14	void mess_init_pc_common(UINT32 flags);
13	15
	16	READ8_HANDLER( pc_page_r );
	17	WRITE8_HANDLER( pc_page_w );
	18
14	19	DRIVER_INIT( pccga );
15	20	DRIVER_INIT( pcmda );
16	21	DRIVER_INIT( europc );
r2301	r2302
21	26	DRIVER_INIT( pc_vga );
22	27	DRIVER_INIT( t1000hx );
23	28
24		MACHINE_RESET( pc_mda );
25		MACHINE_RESET( pc_cga );
26		MACHINE_RESET( pc_t1t );
27		MACHINE_RESET( pc_aga );
28		MACHINE_RESET( pc_pc1512 );
29		MACHINE_RESET( pc_vga );
	29	MACHINE_START( pc );
	30	MACHINE_RESET( pc );
30	31
31	32	INTERRUPT_GEN( pc_cga_frame_interrupt );
32	33	INTERRUPT_GEN( pc_pc1512_frame_interrupt );

src/mess/machine/at.c

r2301	r2302
26	26	#include "audio/sblaster.h"
27	27	#include "machine/i82439tx.h"
28	28
	29	#include "machine/pc_fdc.h"
	30	#include "machine/pc_hdc.h"
	31
	32	#define LOG_PORT80 0
	33
29	34	static const SOUNDBLASTER_CONFIG soundblaster = { 1,5, {1,0} };
30	35
31	36
r2301	r2302
40	45
41	46	static void init_at_common(const struct kbdc8042_interface *at8042)
42	47	{
43		mess_init_pc_common(PCCOMMON_KEYBOARD_AT | PCCOMMON_DMA8237_AT);
	48	mess_init_pc_common(PCCOMMON_KEYBOARD_AT);
44	49	mc146818_init(MC146818_STANDARD);
45	50	soundblaster_config(&soundblaster);
46	51	kbdc8042_init(at8042);
r2301	r2302
63	68
64	69
65	70
	71	/*************************************************************************
	72	*
	73	*      PC DMA stuff
	74	*
	75	*************************************************************************/
	76
	77	static UINT8 dma_offset[2][4];
	78	static UINT8 at_pages[0x10];
	79
	80
	81	READ8_HANDLER(at_page8_r)
	82	{
	83	UINT8 data = at_pages[offset % 0x10];
	84
	85	switch(offset % 8) {
	86	case 1:
	87	data = dma_offset[(offset / 8) & 1][2];
	88	break;
	89	case 2:
	90	data = dma_offset[(offset / 8) & 1][3];
	91	break;
	92	case 3:
	93	data = dma_offset[(offset / 8) & 1][1];
	94	break;
	95	case 7:
	96	data = dma_offset[(offset / 8) & 1][0];
	97	break;
	98	}
	99	return data;
	100	}
	101
	102
	103	WRITE8_HANDLER(at_page8_w)
	104	{
	105	at_pages[offset % 0x10] = data;
	106
	107	if (LOG_PORT80 && (offset == 0))
	108	logerror(" at_page8_w(): Port 80h <== 0x%02x (PC=0x%08x)\n", data, (unsigned) activecpu_get_reg(REG_PC));
	109
	110	switch(offset % 8) {
	111	case 1:
	112	dma_offset[(offset / 8) & 1][2] = data;
	113	break;
	114	case 2:
	115	dma_offset[(offset / 8) & 1][3] = data;
	116	break;
	117	case 3:
	118	dma_offset[(offset / 8) & 1][1] = data;
	119	break;
	120	case 7:
	121	dma_offset[(offset / 8) & 1][0] = data;
	122	break;
	123	}
	124	}
	125
	126
	127	static DMA8237_MEM_READ( pc_dma_read_byte )
	128	{
	129	UINT8 result;
	130	offs_t page_offset = (((offs_t) dma_offset[0][channel]) << 16)
	131	& 0xFF0000;
	132
	133	cpuintrf_push_context(0);
	134	result = program_read_byte(page_offset + offset);
	135	cpuintrf_pop_context();
	136
	137	return result;
	138	}
	139
	140
	141	static DMA8237_MEM_WRITE( pc_dma_write_byte )
	142	{
	143	offs_t page_offset = (((offs_t) dma_offset[0][channel]) << 16)
	144	& 0xFF0000;
	145
	146	cpuintrf_push_context(0);
	147	program_write_byte(page_offset + offset, data);
	148	cpuintrf_pop_context();
	149	}
	150
	151
	152	static DMA8237_CHANNEL_READ( at_dma8237_fdc_dack_r ) {
	153	return pc_fdc_dack_r();
	154	}
	155
	156
	157	static DMA8237_CHANNEL_READ( at_dma8237_hdc_dack_r ) {
	158	return pc_hdc_dack_r();
	159	}
	160
	161
	162	static DMA8237_CHANNEL_WRITE( at_dma8237_fdc_dack_w ) {
	163	pc_fdc_dack_w( data );
	164	}
	165
	166
	167	static DMA8237_CHANNEL_WRITE( at_dma8237_hdc_dack_w ) {
	168	pc_hdc_dack_w( data );
	169	}
	170
	171
	172	static DMA8237_OUT_EOP( at_dma8237_out_eop ) {
	173	pc_fdc_set_tc_state( state );
	174	}
	175
	176
	177	const struct dma8237_interface at_dma8237_1_config =
	178	{
	179	0,
	180	1.0e-6, // 1us
	181
	182	pc_dma_read_byte,
	183	pc_dma_write_byte,
	184
	185	{ 0, 0, at_dma8237_fdc_dack_r, at_dma8237_hdc_dack_r },
	186	{ 0, 0, at_dma8237_fdc_dack_w, at_dma8237_hdc_dack_w },
	187	at_dma8237_out_eop
	188	};
	189
	190
	191	/* TODO: How is still hooked up in the actual machine? */
	192	const struct dma8237_interface at_dma8237_2_config =
	193	{
	194	0,
	195	1.0e-6, // 1us
	196
	197	NULL,
	198	NULL,
	199
	200	{ NULL, NULL, NULL, NULL },
	201	{ NULL, NULL, NULL, NULL },
	202	NULL
	203	};
	204
	205
	206	/**********************************************************
	207	*
	208	* NEC uPD765 floppy interface
	209	*
	210	**********************************************************/
	211
	212	#define FDC_DMA 2
	213
	214	static void at_fdc_interrupt(int state)
	215	{
	216	pic8259_set_irq_line(0, 6, state);
	217	}
	218
	219
	220	static void at_fdc_dma_drq(int state, int read_)
	221	{
	222	dma8237_drq_write((device_config*)device_list_find_by_tag( Machine->config->devicelist, DMA8237, "dma8237_1" ), FDC_DMA, state);
	223	}
	224
	225	static const struct pc_fdc_interface fdc_interface =
	226	{
	227	NEC765A,
	228	NEC765_RDY_PIN_CONNECTED,
	229	at_fdc_interrupt,
	230	at_fdc_dma_drq,
	231	};
	232
	233
66	234	DRIVER_INIT( atcga )
67	235	{
68	236	static const struct kbdc8042_interface at8042 =
r2301	r2302
161	329	MACHINE_START( at )
162	330	{
163	331	cpunum_set_irq_callback(0, at_irq_callback);
	332	pc_fdc_init( &fdc_interface );
164	333	}
165	334
166	335
167	336
168	337	MACHINE_RESET( at )
169	338	{
170		dma8237_reset();
171	339	}
	340

src/mess/machine/bebox.c

r2301	r2302
662	662	}
663	663
664	664
665		static UINT8 bebox_dma_read_byte(int channel, offs_t offset)
	665	static DMA8237_MEM_READ( bebox_dma_read_byte )
666	666	{
667	667	offs_t page_offset = (((offs_t) dma_offset[0][channel]) << 16)
668	668	& 0x7FFF0000;
r2301	r2302
670	670	}
671	671
672	672
673		static void bebox_dma_write_byte(int channel, offs_t offset, UINT8 data)
	673	static DMA8237_MEM_WRITE( bebox_dma_write_byte )
674	674	{
675	675	offs_t page_offset = (((offs_t) dma_offset[0][channel]) << 16)
676	676	& 0x7FFF0000;
r2301	r2302
678	678	}
679	679
680	680
681		static const struct dma8237_interface bebox_dma =
	681	static DMA8237_CHANNEL_READ( bebox_dma8237_fdc_dack_r ) {
	682	return pc_fdc_dack_r();
	683	}
	684
	685
	686	static DMA8237_CHANNEL_WRITE( bebox_dma8237_fdc_dack_w ) {
	687	pc_fdc_dack_w( data );
	688	}
	689
	690
	691	static DMA8237_OUT_EOP( bebox_dma8237_out_eop ) {
	692	pc_fdc_set_tc_state( state );
	693	}
	694
	695
	696	const struct dma8237_interface bebox_dma8237_1_config =
682	697	{
683	698	0,
684	699	1.0e-6, /* 1us */
r2301	r2302
686	701	bebox_dma_read_byte,
687	702	bebox_dma_write_byte,
688	703
689		{ 0, 0, pc_fdc_dack_r, 0 },
690		{ 0, 0, pc_fdc_dack_w, 0 },
691		pc_fdc_set_tc_state
	704	{ 0, 0, bebox_dma8237_fdc_dack_r, 0 },
	705	{ 0, 0, bebox_dma8237_fdc_dack_w, 0 },
	706	bebox_dma8237_out_eop
692	707	};
693	708
694	709
	710	const struct dma8237_interface bebox_dma8237_2_config =
	711	{
	712	0,
	713	1.0e-6, /* 1us */
	714
	715	NULL,
	716	NULL,
	717
	718	{ NULL, NULL, NULL, NULL },
	719	{ NULL, NULL, NULL, NULL },
	720	NULL
	721	};
	722
	723
695	724	/*************************************
696	725	*
697	726	*   8254 PIT
r2301	r2302
1019	1048	pc_vga_init(machine, &bebox_vga_interface, &cirrus_svga_interface);
1020	1049	kbdc8042_init(&bebox_8042_interface);
1021	1050
1022		dma8237_init(2);
1023		dma8237_config(0, &bebox_dma);
1024
1025	1051	/* install VGA memory */
1026	1052	vram_begin = 0xC1000000;
1027	1053	vram_end = vram_begin + pc_vga_memory_size() - 1;

src/mess/machine/pc.c

r2301	r2302
48	48	#include "machine/8237dma.h"
49	49
50	50
	51	/*************************************************************************
	52	*
	53	*      PC DMA stuff
	54	*
	55	*************************************************************************/
	56
	57	static UINT8 dma_offset[2][4];
	58
	59
	60	READ8_HANDLER(pc_page_r)
	61	{
	62	return 0xFF;
	63	}
	64
	65
	66	WRITE8_HANDLER(pc_page_w)
	67	{
	68	switch(offset % 4) {
	69	case 1:
	70	dma_offset[0][2] = data;
	71	break;
	72	case 2:
	73	dma_offset[0][3] = data;
	74	break;
	75	case 3:
	76	dma_offset[0][0] = dma_offset[0][1] = data;
	77	break;
	78	}
	79	}
	80
	81
	82	static DMA8237_MEM_READ( pc_dma_read_byte )
	83	{
	84	UINT8 result;
	85	offs_t page_offset = (((offs_t) dma_offset[0][channel]) << 16)
	86	& 0x0F0000;
	87
	88	cpuintrf_push_context(0);
	89	result = program_read_byte(page_offset + offset);
	90	cpuintrf_pop_context();
	91
	92	return result;
	93	}
	94
	95
	96	static DMA8237_MEM_WRITE( pc_dma_write_byte )
	97	{
	98	offs_t page_offset = (((offs_t) dma_offset[0][channel]) << 16)
	99	& 0x0F0000;
	100
	101	cpuintrf_push_context(0);
	102	program_write_byte(page_offset + offset, data);
	103	cpuintrf_pop_context();
	104	}
	105
	106
	107	static DMA8237_CHANNEL_READ( pc_dma8237_fdc_dack_r ) {
	108	return pc_fdc_dack_r();
	109	}
	110
	111
	112	static DMA8237_CHANNEL_READ( pc_dma8237_hdc_dack_r ) {
	113	return pc_hdc_dack_r();
	114	}
	115
	116
	117	static DMA8237_CHANNEL_WRITE( pc_dma8237_fdc_dack_w ) {
	118	pc_fdc_dack_w( data );
	119	}
	120
	121
	122	static DMA8237_CHANNEL_WRITE( pc_dma8237_hdc_dack_w ) {
	123	pc_hdc_dack_w( data );
	124	}
	125
	126
	127	static DMA8237_OUT_EOP( pc_dma8237_out_eop ) {
	128	pc_fdc_set_tc_state( state );
	129	}
	130
	131
	132	const struct dma8237_interface pc_dma8237_config =
	133	{
	134	0,
	135	1.0e-6, // 1us
	136
	137	pc_dma_read_byte,
	138	pc_dma_write_byte,
	139
	140	{ 0, 0, pc_dma8237_fdc_dack_r, pc_dma8237_hdc_dack_r },
	141	{ 0, 0, pc_dma8237_fdc_dack_w, pc_dma8237_hdc_dack_w },
	142	pc_dma8237_out_eop
	143	};
	144
	145
51	146	/**********************************************************
52	147	*
53	148	* COM hardware
r2301	r2302
163	258
164	259	static void pc_fdc_dma_drq(int state, int read_)
165	260	{
166		dma8237_drq_write(0, FDC_DMA, state);
	261	dma8237_drq_write( (device_config*)device_list_find_by_tag( Machine->config->devicelist, DMA8237, "dma8237" ), FDC_DMA, state);
167	262	}
168	263
169		static const struct pc_fdc_interface fdc_interface =
170		{
171		NEC765A,
172		NEC765_RDY_PIN_CONNECTED,
173		pc_fdc_interrupt,
174		pc_fdc_dma_drq,
175		};
176	264
177	265	static const struct pc_fdc_interface fdc_interface_nc =
178	266	{
r2301	r2302
191	279	memory_set_bankptr( 10, mess_ram );
192	280
193	281	/* FDC/HDC hardware */
194		pc_fdc_init( ( flags & PCCOMMON_NEC765_RDY_NC ) ? &fdc_interface_nc : &fdc_interface);
195	282	pc_hdc_setup();
196	283
197	284	/* com hardware */
r2301	r2302
221	308
222	309	DRIVER_INIT( pccga )
223	310	{
224		mess_init_pc_common(PCCOMMON_KEYBOARD_PC | PCCOMMON_DMA8237_PC | PCCOMMON_NEC765_RDY_NC);
	311	mess_init_pc_common(PCCOMMON_KEYBOARD_PC);
225	312	ppi8255_init(&pc_ppi8255_interface);
226	313	pc_rtc_init();
227	314	pc_turbo_setup(0, 3, 0x02, 4.77/12, 1);
r2301	r2302
229	316
230	317	DRIVER_INIT( bondwell )
231	318	{
232		mess_init_pc_common(PCCOMMON_KEYBOARD_PC | PCCOMMON_DMA8237_PC | PCCOMMON_NEC765_RDY_NC);
	319	mess_init_pc_common(PCCOMMON_KEYBOARD_PC);
233	320	ppi8255_init(&pc_ppi8255_interface);
234	321	pc_turbo_setup(0, 3, 0x02, 4.77/12, 1);
235	322	}
236	323
237	324	DRIVER_INIT( pcmda )
238	325	{
239		mess_init_pc_common(PCCOMMON_KEYBOARD_PC | PCCOMMON_DMA8237_PC | PCCOMMON_NEC765_RDY_NC);
	326	mess_init_pc_common(PCCOMMON_KEYBOARD_PC);
240	327	ppi8255_init(&pc_ppi8255_interface);
241	328	pc_turbo_setup(0, 3, 0x02, 4.77/12, 1);
242	329	}
r2301	r2302
262	349	rom[0xfffff]=256-a;
263	350	}
264	351
265		mess_init_pc_common(PCCOMMON_KEYBOARD_PC | PCCOMMON_DMA8237_PC | PCCOMMON_NEC765_RDY_NC);
	352	mess_init_pc_common(PCCOMMON_KEYBOARD_PC);
266	353
267	354	europc_rtc_init();
268	355	//   europc_rtc_set_time(machine);
r2301	r2302
275	362	/* just a plain bit pattern for graphics data generation */
276	363	for (i = 0; i < 256; i++)
277	364	gfx[i] = i;
278		mess_init_pc_common(PCCOMMON_KEYBOARD_PC | PCCOMMON_DMA8237_PC | PCCOMMON_NEC765_RDY_NC);
	365	mess_init_pc_common(PCCOMMON_KEYBOARD_PC);
279	366	pc_turbo_setup(0, 3, 0x02, 4.77/12, 1);
280	367	}
281	368
r2301	r2302
294	381	videoram=memory_region(REGION_CPU1)+0xb0000;
295	382	memory_install_read16_handler(0, ADDRESS_SPACE_IO, 0x278, 0x27b, 0, 0, pc200_16le_port378_r );
296	383
297		mess_init_pc_common(PCCOMMON_KEYBOARD_PC | PCCOMMON_DMA8237_PC | PCCOMMON_NEC765_RDY_NC);
	384	mess_init_pc_common(PCCOMMON_KEYBOARD_PC);
298	385	}
299	386
300	387	DRIVER_INIT( pc1512 )
r2301	r2302
315	402	memory_install_read16_handler(0, ADDRESS_SPACE_IO, 0x278, 0x27b, 0, 0, pc16le_parallelport2_r );
316	403
317	404
318		mess_init_pc_common(PCCOMMON_KEYBOARD_PC | PCCOMMON_DMA8237_PC | PCCOMMON_NEC765_RDY_NC);
	405	mess_init_pc_common(PCCOMMON_KEYBOARD_PC);
319	406	mc146818_init(MC146818_IGNORE_CENTURY);
320	407	}
321	408
r2301	r2302
378	465	memory_install_read16_handler(0, ADDRESS_SPACE_IO, 0x278, 0x27b, 0, 0, pc1640_16le_port278_r );
379	466	memory_install_read16_handler(0, ADDRESS_SPACE_IO, 0x4278, 0x427b, 0, 0, pc1640_16le_port4278_r );
380	467
381		mess_init_pc_common(PCCOMMON_KEYBOARD_PC | PCCOMMON_DMA8237_PC | PCCOMMON_NEC765_RDY_NC);
	468	mess_init_pc_common(PCCOMMON_KEYBOARD_PC);
382	469
383	470	mc146818_init(MC146818_IGNORE_CENTURY);
384	471	}
385	472
386	473	DRIVER_INIT( pc_vga )
387	474	{
388		mess_init_pc_common(PCCOMMON_KEYBOARD_PC | PCCOMMON_DMA8237_PC | PCCOMMON_NEC765_RDY_NC);
	475	mess_init_pc_common(PCCOMMON_KEYBOARD_PC);
389	476	ppi8255_init(&pc_ppi8255_interface);
390	477
391	478	pc_vga_init(machine, &vga_interface, NULL);
r2301	r2302
397	484	}
398	485
399	486
400		MACHINE_RESET( pc_mda )
401		{
402		dma8237_reset();
403		cpunum_set_irq_callback(0, pc_irq_callback);
	487	MACHINE_START( pc ) {
	488	pc_fdc_init( &fdc_interface_nc );
404	489	}
405	490
406		MACHINE_RESET( pc_cga )
407		{
408		dma8237_reset();
409		cpunum_set_irq_callback(0, pc_irq_callback);
410		}
411	491
412		MACHINE_RESET( pc_t1t )
	492	MACHINE_RESET( pc )
413	493	{
414		dma8237_reset();
415	494	cpunum_set_irq_callback(0, pc_irq_callback);
416	495	}
417	496
418		MACHINE_RESET( pc_pc1512 ) {
419		dma8237_reset();
420		cpunum_set_irq_callback(0, pc_irq_callback);
421		}
422	497
423		MACHINE_RESET( pc_aga )
424		{
425		dma8237_reset();
426		cpunum_set_irq_callback(0, pc_irq_callback);
427		}
428
429		MACHINE_RESET( pc_vga )
430		{
431		dma8237_reset();
432		cpunum_set_irq_callback(0, pc_irq_callback);
433		}
434
435	498	/**************************************************************************
436	499	*
437	500	*      Interrupt handlers.

src/mess/drivers/at.c

r2301	r2302
106	106
107	107	static READ8_HANDLER(at_dma8237_1_r)
108	108	{
109		return dma8237_1_r(machine, offset / 2);
	109	return dma8237_r( (device_config*)device_list_find_by_tag( machine->config->devicelist, DMA8237, "dma8237_2" ), offset / 2);
110	110	}
111	111
112	112	static WRITE8_HANDLER(at_dma8237_1_w)
113	113	{
114		dma8237_1_w(machine, offset / 2, data);
	114	dma8237_w( (device_config*)device_list_find_by_tag( machine->config->devicelist, DMA8237, "dma8237_2" ), offset / 2, data);
115	115	}
116	116
117	117	static READ32_HANDLER(at32_dma8237_1_r)
r2301	r2302
125	125	}
126	126
127	127	DEV_READWRITE8TO32LE_LSB( at_pit8254_32le, pit8253_r, pit8253_w )
	128	DEV_READWRITE8TO32LE_LSB( at_dma8237_32le, dma8237_r, dma8237_w )
128	129
129	130
130	131	static ADDRESS_MAP_START(at_io, ADDRESS_SPACE_IO, 8)
131		AM_RANGE(0x0000, 0x001f) AM_READWRITE(dma8237_0_r,            dma8237_0_w)
	132	AM_RANGE(0x0000, 0x001f) AM_DEVREADWRITE(DMA8237, "dma8237_1", dma8237_r, dma8237_w)
132	133	AM_RANGE(0x0020, 0x003f) AM_READWRITE(pic8259_0_r,            pic8259_0_w)
133	134	AM_RANGE(0x0040, 0x005f) AM_DEVREADWRITE(PIT8254, AT_PIT8254, pit8253_r, pit8253_w)
134	135	AM_RANGE(0x0060, 0x006f) AM_READWRITE(kbdc8042_8_r,            kbdc8042_8_w)
r2301	r2302
156	157	ADDRESS_MAP_END
157	158
158	159
	160	static READ32_HANDLER(at_page32_r)
	161	{
	162	return read32le_with_read8_handler(at_page8_r, machine, offset, mem_mask);
	163	}
159	164
	165
	166	static WRITE32_HANDLER(at_page32_w)
	167	{
	168	write32le_with_write8_handler(at_page8_w, machine, offset, data, mem_mask);
	169	}
	170
	171
160	172	static ADDRESS_MAP_START(at386_io, ADDRESS_SPACE_IO, 32)
161		AM_RANGE(0x0000, 0x001f) AM_READWRITE(dma8237_32le_0_r,         dma8237_32le_0_w)
	173	AM_RANGE(0x0000, 0x001f) AM_DEVREADWRITE(DMA8237, "dma8237_1", at_dma8237_32le_r, at_dma8237_32le_w)
162	174	AM_RANGE(0x0020, 0x003f) AM_READWRITE(pic8259_32le_0_r,         pic8259_32le_0_w)
163	175	AM_RANGE(0x0040, 0x005f) AM_DEVREADWRITE(PIT8254, AT_PIT8254, at_pit8254_32le_r, at_pit8254_32le_w)
164	176	AM_RANGE(0x0060, 0x006f) AM_READWRITE(kbdc8042_32le_r,         kbdc8042_32le_w)
r2301	r2302
180	192
181	193
182	194	static ADDRESS_MAP_START(at586_io, ADDRESS_SPACE_IO, 32)
183		AM_RANGE(0x0000, 0x001f) AM_READWRITE(dma8237_32le_0_r,         dma8237_32le_0_w)
	195	AM_RANGE(0x0000, 0x001f) AM_DEVREADWRITE(DMA8237, "dma8237_1", at_dma8237_32le_r, at_dma8237_32le_w)
184	196	AM_RANGE(0x0020, 0x003f) AM_READWRITE(pic8259_32le_0_r,         pic8259_32le_0_w)
185	197	AM_RANGE(0x0040, 0x005f) AM_DEVREADWRITE(PIT8254, AT_PIT8254, at_pit8254_32le_r, at_pit8254_32le_w)
186	198	AM_RANGE(0x0060, 0x006f) AM_READWRITE(kbdc8042_32le_r,         kbdc8042_32le_w)
r2301	r2302
448	460	MDRV_DEVICE_ADD( AT_PIT8254, PIT8254 )
449	461	MDRV_DEVICE_CONFIG( at_pit8254_config )
450	462
	463	MDRV_DEVICE_ADD( "dma8237_1", DMA8237 )
	464	MDRV_DEVICE_CONFIG( at_dma8237_1_config )
	465
	466	MDRV_DEVICE_ADD( "dma8237_2", DMA8237 )
	467	MDRV_DEVICE_CONFIG( at_dma8237_2_config )
	468
451	469	MDRV_MACHINE_START( at )
452	470	MDRV_MACHINE_RESET( at )
453	471

src/mess/drivers/bebox.c

r2301	r2302
33	33	#include "formats/pc_dsk.h"
34	34
35	35
36		static READ8_HANDLER(at_dma8237_1_r)  { return dma8237_1_r(machine, offset / 2); }
37		static WRITE8_HANDLER(at_dma8237_1_w) { dma8237_1_w(machine, offset / 2, data); }
	36	static READ8_HANDLER(at_dma8237_1_r)  { return dma8237_r((device_config*)device_list_find_by_tag( machine->config->devicelist, DMA8237, "dma8237_2" ), offset / 2); }
	37	static WRITE8_HANDLER(at_dma8237_1_w) { dma8237_w((device_config*)device_list_find_by_tag( machine->config->devicelist, DMA8237, "dma8237_2" ), offset / 2, data); }
38	38
39	39	static READ64_HANDLER( bebox_dma8237_1_r )
40	40	{
r2301	r2302
46	46	write64be_with_write8_handler(at_dma8237_1_w, machine, offset, data, mem_mask);
47	47	}
48	48
	49
49	50	DEV_READWRITE8TO64BE( bebox_pit8254_64be, pit8253_r, pit8253_w )
	51	DEV_READWRITE8TO64BE( bebox_dma8237_64be, dma8237_r, dma8237_w )
50	52
	53
51	54	static ADDRESS_MAP_START( bebox_mem, ADDRESS_SPACE_PROGRAM, 64 )
52	55	AM_RANGE(0x7FFFF0F0, 0x7FFFF0F7) AM_READWRITE( bebox_cpu0_imask_r, bebox_cpu0_imask_w )
53	56	AM_RANGE(0x7FFFF1F0, 0x7FFFF1F7) AM_READWRITE( bebox_cpu1_imask_r, bebox_cpu1_imask_w )
r2301	r2302
55	58	AM_RANGE(0x7FFFF3F0, 0x7FFFF3F7) AM_READWRITE( bebox_crossproc_interrupts_r, bebox_crossproc_interrupts_w )
56	59	AM_RANGE(0x7FFFF4F0, 0x7FFFF4F7) AM_WRITE( bebox_processor_resets_w )
57	60
58		AM_RANGE(0x80000000, 0x8000001F) AM_READWRITE( dma8237_64be_0_r, dma8237_64be_0_w )
	61	AM_RANGE(0x80000000, 0x8000001F) AM_DEVREADWRITE( DMA8237, "dma8237_1", bebox_dma8237_64be_r, bebox_dma8237_64be_w )
59	62	AM_RANGE(0x80000020, 0x8000003F) AM_READWRITE( pic8259_64be_0_r, pic8259_64be_0_w )
60	63	AM_RANGE(0x80000040, 0x8000005f) AM_DEVREADWRITE(PIT8254, "pit8254", bebox_pit8254_64be_r, bebox_pit8254_64be_w)
61	64	AM_RANGE(0x80000060, 0x8000006F) AM_READWRITE( kbdc8042_64be_r, kbdc8042_64be_w )
r2301	r2302
110	113	MDRV_DEVICE_ADD( "pit8254", PIT8254 )
111	114	MDRV_DEVICE_CONFIG( bebox_pit8254_config )
112	115
	116	MDRV_DEVICE_ADD( "dma8237_1", DMA8237 )
	117	MDRV_DEVICE_CONFIG( bebox_dma8237_1_config )
	118
	119	MDRV_DEVICE_ADD( "dma8237_2", DMA8237 )
	120	MDRV_DEVICE_CONFIG( bebox_dma8237_2_config )
	121
113	122	/* video hardware */
114	123	MDRV_IMPORT_FROM( pcvideo_vga )
115	124	MDRV_SCREEN_MODIFY("main")

src/mess/drivers/pc.c

r2301	r2302
160	160
161	161
162	162	static ADDRESS_MAP_START(pc8_io, ADDRESS_SPACE_IO, 8)
163		AM_RANGE(0x0000, 0x000f) AM_READWRITE(dma8237_0_r,         dma8237_0_w)
	163	AM_RANGE(0x0000, 0x000f) AM_DEVREADWRITE(DMA8237, "dma8237", dma8237_r, dma8237_w)
164	164	AM_RANGE(0x0020, 0x0021) AM_READWRITE(pic8259_0_r,         pic8259_0_w)
165	165	AM_RANGE(0x0040, 0x0043) AM_DEVREADWRITE(PIT8253, "pit8253", pit8253_r, pit8253_w)
166	166	AM_RANGE(0x0060, 0x0063) AM_READWRITE(ppi8255_0_r,         ppi8255_0_w)
r2301	r2302
188	188
189	189
190	190	DEV_READWRITE8TO16LE_LSB( pc_pit8253_16le, pit8253_r, pit8253_w )
	191	DEV_READWRITE8TO16LE( pc_dma8237_16le, dma8237_r, dma8237_w )
	192	READ16_HANDLER(pc_page16le_r) { return read16le_with_read8_handler(pc_page_r, machine, offset, mem_mask); }
	193	WRITE16_HANDLER(pc_page16le_w) { write16le_with_write8_handler(pc_page_w, machine, offset, data, mem_mask); }
191	194
	195
192	196	static ADDRESS_MAP_START(pc16_io, ADDRESS_SPACE_IO, 16)
193		AM_RANGE(0x0000, 0x000f) AM_READWRITE(dma8237_16le_0_r,         dma8237_16le_0_w)
	197	AM_RANGE(0x0000, 0x000f) AM_DEVREADWRITE(DMA8237, "dma8237", pc_dma8237_16le_r, pc_dma8237_16le_w)
194	198	AM_RANGE(0x0020, 0x0021) AM_READWRITE(pic8259_16le_0_r,         pic8259_16le_0_w)
195	199	AM_RANGE(0x0040, 0x0043) AM_DEVREADWRITE(PIT8253, "pit8253", pc_pit8253_16le_r, pc_pit8253_16le_w)
196	200	AM_RANGE(0x0060, 0x0063) AM_READWRITE(ppi8255_16le_0_r,         ppi8255_16le_0_w)
r2301	r2302
231	235
232	236
233	237	static ADDRESS_MAP_START(europc_io, ADDRESS_SPACE_IO, 8)
234		AM_RANGE(0x0000, 0x000f) AM_READWRITE(dma8237_0_r,         dma8237_0_w)
	238	AM_RANGE(0x0000, 0x000f) AM_DEVREADWRITE(DMA8237, "dma8237", dma8237_r, dma8237_w)
235	239	AM_RANGE(0x0020, 0x0021) AM_READWRITE(pic8259_0_r,         pic8259_0_w)
236	240	AM_RANGE(0x0040, 0x0043) AM_DEVREADWRITE(PIT8253, "pit8253", pit8253_r, pit8253_w)
237	241	AM_RANGE(0x0060, 0x0063) AM_READWRITE(europc_pio_r,         europc_pio_w)
r2301	r2302
271	275
272	276
273	277	static ADDRESS_MAP_START(tandy1000_io, ADDRESS_SPACE_IO, 8)
274		AM_RANGE(0x0000, 0x000f) AM_READWRITE(dma8237_0_r,            dma8237_0_w)
	278	AM_RANGE(0x0000, 0x000f) AM_DEVREADWRITE(DMA8237, "dma8237", dma8237_r, dma8237_w)
275	279	AM_RANGE(0x0020, 0x0021) AM_READWRITE(pic8259_0_r,            pic8259_0_w)
276	280	AM_RANGE(0x0040, 0x0043) AM_DEVREADWRITE(PIT8253, "pit8253", pit8253_r, pit8253_w)
277	281	AM_RANGE(0x0060, 0x0063) AM_READWRITE(tandy1000_pio_r,         tandy1000_pio_w)
r2301	r2302
291	295
292	296
293	297	static ADDRESS_MAP_START(pc200_io, ADDRESS_SPACE_IO, 16)
294		AM_RANGE(0x0000, 0x000f) AM_READWRITE(dma8237_16le_0_r,            dma8237_16le_0_w)
	298	AM_RANGE(0x0000, 0x000f) AM_DEVREADWRITE(DMA8237, "dma8237", pc_dma8237_16le_r, pc_dma8237_16le_w)
295	299	AM_RANGE(0x0020, 0x0021) AM_READWRITE(pic8259_16le_0_r,            pic8259_16le_0_w)
296	300	AM_RANGE(0x0040, 0x0043) AM_DEVREADWRITE(PIT8253, "pit8253", pc_pit8253_16le_r, pc_pit8253_16le_w)
297	301	AM_RANGE(0x0060, 0x0065) AM_READWRITE(pc1640_16le_port60_r,         pc1640_16le_port60_w)
r2301	r2302
324	328
325	329
326	330	static ADDRESS_MAP_START(pc1640_io, ADDRESS_SPACE_IO, 16)
327		AM_RANGE(0x0000, 0x000f) AM_READWRITE(dma8237_16le_0_r,         dma8237_16le_0_w)
	331	AM_RANGE(0x0000, 0x000f) AM_DEVREADWRITE(DMA8237, "dma8237", pc_dma8237_16le_r, pc_dma8237_16le_w)
328	332	AM_RANGE(0x0020, 0x0021) AM_READWRITE(pic8259_16le_0_r,         pic8259_16le_0_w)
329	333	AM_RANGE(0x0040, 0x0043) AM_DEVREADWRITE(PIT8253, "pit8253", pc_pit8253_16le_r, pc_pit8253_16le_w)
330	334	AM_RANGE(0x0060, 0x0065) AM_READWRITE(pc1640_16le_port60_r,         pc1640_16le_port60_w)
r2301	r2302
1169	1173	MDRV_CPU_IO_MAP(pc8_io, 0)
1170	1174	MDRV_CPU_VBLANK_INT_HACK(pc_mda_frame_interrupt, 4)
1171	1175
1172		MDRV_MACHINE_RESET(pc_mda)
	1176	MDRV_MACHINE_START(pc)
	1177	MDRV_MACHINE_RESET(pc)
1173	1178
1174	1179	MDRV_DEVICE_ADD( "pit8253", PIT8253 )
1175	1180	MDRV_DEVICE_CONFIG( pc_pit8253_config )
1176	1181
	1182	MDRV_DEVICE_ADD( "dma8237", DMA8237 )
	1183	MDRV_DEVICE_CONFIG( pc_dma8237_config )
	1184
1177	1185	/* video hardware */
1178	1186	MDRV_IMPORT_FROM( pcvideo_mda )
1179	1187
r2301	r2302
1203	1211	MDRV_CPU_IO_MAP(pc8_io, 0)
1204	1212	MDRV_CPU_VBLANK_INT_HACK(pc_mda_frame_interrupt, 4)
1205	1213
1206		MDRV_MACHINE_RESET(pc_mda)
	1214	MDRV_MACHINE_START(pc)
	1215	MDRV_MACHINE_RESET(pc)
1207	1216
1208	1217	MDRV_DEVICE_ADD( "pit8253", PIT8253 )
1209	1218	MDRV_DEVICE_CONFIG( pc_pit8253_config )
1210	1219
	1220	MDRV_DEVICE_ADD( "dma8237", DMA8237 )
	1221	MDRV_DEVICE_CONFIG( pc_dma8237_config )
	1222
1211	1223	/* video hardware */
1212	1224	MDRV_IMPORT_FROM( pcvideo_hercules )
1213	1225
r2301	r2302
1233	1245	/* basic machine hardware */
1234	1246	MDRV_CPU_PC(pc8, pc8, I8088, 4772720, pc_cga_frame_interrupt)   /* 4,77 Mhz */
1235	1247
1236		MDRV_MACHINE_RESET(pc_cga)
	1248	MDRV_MACHINE_START(pc)
	1249	MDRV_MACHINE_RESET(pc)
1237	1250
1238	1251	MDRV_DEVICE_ADD( "pit8253", PIT8253 )
1239	1252	MDRV_DEVICE_CONFIG( pc_pit8253_config )
1240	1253
	1254	MDRV_DEVICE_ADD( "dma8237", DMA8237 )
	1255	MDRV_DEVICE_CONFIG( pc_dma8237_config )
	1256
1241	1257	/* video hardware */
1242	1258	MDRV_IMPORT_FROM( pcvideo_cga )
1243	1259
r2301	r2302
1264	1280	/* basic machine hardware */
1265	1281	MDRV_CPU_PC(europc, europc, I8088, 4772720*2, pc_aga_frame_interrupt)
1266	1282
1267		MDRV_MACHINE_RESET(pc_aga)
	1283	MDRV_MACHINE_START(pc)
	1284	MDRV_MACHINE_RESET(pc)
1268	1285
1269	1286	MDRV_DEVICE_ADD( "pit8253", PIT8253 )
1270	1287	MDRV_DEVICE_CONFIG( pc_pit8253_config )
1271	1288
	1289	MDRV_DEVICE_ADD( "dma8237", DMA8237 )
	1290	MDRV_DEVICE_CONFIG( pc_dma8237_config )
	1291
1272	1292	/* video hardware */
1273	1293	MDRV_IMPORT_FROM( pcvideo_aga )
1274	1294
r2301	r2302
1291	1311	/* basic machine hardware */
1292	1312	MDRV_CPU_PC(pc16, pc16, I8086, 12000000, pc_cga_frame_interrupt)
1293	1313
1294		MDRV_MACHINE_RESET(pc_cga)
	1314	MDRV_MACHINE_START(pc)
	1315	MDRV_MACHINE_RESET(pc)
1295	1316
1296	1317	MDRV_DEVICE_ADD( "pit8253", PIT8253 )
1297	1318	MDRV_DEVICE_CONFIG( pc_pit8253_config )
1298	1319
	1320	MDRV_DEVICE_ADD( "dma8237", DMA8237 )
	1321	MDRV_DEVICE_CONFIG( pc_dma8237_config )
	1322
1299	1323	/* video hardware */
1300	1324	MDRV_IMPORT_FROM( pcvideo_cga )
1301	1325
r2301	r2302
1322	1346	/* basic machine hardware */
1323	1347	MDRV_CPU_PC(pc1640, pc200, I8086, 8000000, pc_aga_frame_interrupt)
1324	1348
1325		MDRV_MACHINE_RESET(pc_aga)
	1349	MDRV_MACHINE_START(pc)
	1350	MDRV_MACHINE_RESET(pc)
1326	1351
1327	1352	MDRV_DEVICE_ADD( "pit8253", PIT8253 )
1328	1353	MDRV_DEVICE_CONFIG( pc_pit8253_config )
1329	1354
	1355	MDRV_DEVICE_ADD( "dma8237", DMA8237 )
	1356	MDRV_DEVICE_CONFIG( pc_dma8237_config )
	1357
1330	1358	/* video hardware */
1331	1359	MDRV_IMPORT_FROM( pcvideo_pc200 )
1332	1360
r2301	r2302
1342	1370	/* basic machine hardware */
1343	1371	MDRV_CPU_PC(pc1640, pc1640, I8086, 8000000, pc_pc1512_frame_interrupt)
1344	1372
1345		MDRV_MACHINE_RESET(pc_pc1512)
	1373	MDRV_MACHINE_START(pc)
	1374	MDRV_MACHINE_RESET(pc)
1346	1375
1347	1376	MDRV_DEVICE_ADD( "pit8253", PIT8253 )
1348	1377	MDRV_DEVICE_CONFIG( pc_pit8253_config )
1349	1378
	1379	MDRV_DEVICE_ADD( "dma8237", DMA8237 )
	1380	MDRV_DEVICE_CONFIG( pc_dma8237_config )
	1381
1350	1382	/* video hardware */
1351	1383	MDRV_IMPORT_FROM( pcvideo_pc1512 )
1352	1384
r2301	r2302
1364	1396	/* basic machine hardware */
1365	1397	MDRV_CPU_PC(pc1640, pc1640, I8086, 8000000, pc_vga_frame_interrupt)
1366	1398
1367		MDRV_MACHINE_RESET(pc_vga)
	1399	MDRV_MACHINE_START(pc)
	1400	MDRV_MACHINE_RESET(pc)
1368	1401
1369	1402	MDRV_DEVICE_ADD( "pit8253", PIT8253 )
1370	1403	MDRV_DEVICE_CONFIG( pc_pit8253_config )
1371	1404
	1405	MDRV_DEVICE_ADD( "dma8237", DMA8237 )
	1406	MDRV_DEVICE_CONFIG( pc_dma8237_config )
	1407
1372	1408	/* video hardware */
1373	1409	MDRV_IMPORT_FROM(pcvideo_pc1640)
1374	1410	MDRV_SCREEN_MODIFY("main")
r2301	r2302
1389	1425	/* basic machine hardware */
1390	1426	MDRV_CPU_PC(pc16, pc16, I8086, 12000000, pc_vga_frame_interrupt)
1391	1427
1392		MDRV_MACHINE_RESET(pc_vga)
	1428	MDRV_MACHINE_START(pc)
	1429	MDRV_MACHINE_RESET(pc)
1393	1430
1394	1431	MDRV_DEVICE_ADD( "pit8253", PIT8253 )
1395	1432	MDRV_DEVICE_CONFIG( pc_pit8253_config )
1396	1433
	1434	MDRV_DEVICE_ADD( "dma8237", DMA8237 )
	1435	MDRV_DEVICE_CONFIG( pc_dma8237_config )
	1436
1397	1437	/* video hardware */
1398	1438	MDRV_IMPORT_FROM( pcvideo_vga )
1399	1439	MDRV_SCREEN_MODIFY("main")
r2301	r2302
1423	1463	/* basic machine hardware */
1424	1464	MDRV_CPU_PC(tandy1000, tandy1000, I8088, 8000000, tandy1000_frame_interrupt)
1425	1465
1426		MDRV_MACHINE_RESET(pc_t1t)
	1466	MDRV_MACHINE_START(pc)
	1467	MDRV_MACHINE_RESET(pc)
1427	1468
1428	1469	MDRV_DEVICE_ADD( "pit8253", PIT8253 )
1429	1470	MDRV_DEVICE_CONFIG( pc_pit8253_config )
1430	1471
	1472	MDRV_DEVICE_ADD( "dma8237", DMA8237 )
	1473	MDRV_DEVICE_CONFIG( pc_dma8237_config )
	1474
1431	1475	/* video hardware */
1432	1476	MDRV_IMPORT_FROM( pcvideo_t1000 )
1433	1477

Previous

15994 Revisions

Next

---

© 1998-2018 The MESS Team