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r2015 Tuesday 18th March, 2008 at 10:59:06 UTC by Nathan Woods
[SVI318] Cleaned up driver. [Tomas Karlsson]

[docs]	messnew.txt
[src/mess/drivers]	svi318.c
[src/mess/includes]	svi318.h
[src/mess/machine]	svi318.c

src/mess/includes/svi318.h

r2014	r2015
1	1	/*****************************************************************************
2	2	*
3		* includes/svi328.h
	3	* includes/svi318.h
4	4	*
5	5	* Spectravideo SVI-318 and SVI-328
6	6	*
7	7	****************************************************************************/
8	8
9		#ifndef SVI328_H_
10		#define SVI328_H_
	9	#ifndef SVI318_H_
	10	#define SVI318_H_
11	11
12
13	12	/*----------- defined in machine/svi318.c -----------*/
14	13
15	14	DRIVER_INIT( svi318 );
r2014	r2015
29	28	WRITE8_HANDLER( svi318_writemem3 );
30	29	WRITE8_HANDLER( svi318_writemem4 );
31	30
32		READ8_HANDLER( svi318_printer_r );
33		WRITE8_HANDLER( svi318_printer_w );
	31	READ8_HANDLER( svi318_io_ext_r );
	32	WRITE8_HANDLER( svi318_io_ext_w );
34	33
35	34	READ8_HANDLER( svi318_ppi_r );
36	35	WRITE8_HANDLER( svi318_ppi_w );
r2014	r2015
40	39
41	40	int svi318_cassette_present(int id);
42	41
43		READ8_HANDLER( svi318_fdc_irqdrq_r );
44		WRITE8_HANDLER( svi318_fdc_drive_motor_w );
45		WRITE8_HANDLER( svi318_fdc_density_side_w );
46	42	DEVICE_LOAD( svi318_floppy );
47	43
48	44	MC6845_UPDATE_ROW( svi806_crtc6845_update_row );
49		WRITE8_HANDLER( svi806_ram_enable_w );
50	45	VIDEO_START( svi328_806 );
51	46	VIDEO_UPDATE( svi328_806 );
52	47	MACHINE_RESET( svi328_806 );
53	48
54
55		#endif /* SVI328_H_ */
	49	#endif /* SVI318_H_ */

src/mess/machine/svi318.c

r2014	r2015
24	24	#include "sound/dac.h"
25	25	#include "sound/ay8910.h"
26	26
27
28	27	enum {
29	28	SVI_INTERNAL   = 0,
30	29	SVI_CART      = 1,
r2014	r2015
34	33
35	34	typedef struct {
36	35	/* general */
37		UINT8   svi318;               /* Are we dealing with an SVI-318 or a SVI-328 model. 0 = 328, 1 = 318 */
	36	UINT8   svi318;      /* Are we dealing with an SVI-318 or a SVI-328 model. 0 = 328, 1 = 318 */
38	37	/* memory */
39	38	UINT8   *empty_bank;
40	39	UINT8   bank_switch;
41		UINT8   bank1;
42		UINT8   bank2;
43		UINT8   *bank1_ptr;
44		UINT8   bank1_read_only;
45		UINT8   *bank2_ptr;
46		UINT8   bank2_read_only;
47		UINT8   *bank3_ptr;
48		UINT8   bank3_read_only;
	40	UINT8   bankLow;
	41	UINT8   bankHigh1;
	42	UINT8   *bankLow_ptr;
	43	UINT8   bankLow_read_only;
	44	UINT8   *bankHigh1_ptr;
	45	UINT8   bankHigh1_read_only;
	46	UINT8   *bankHigh2_ptr;
	47	UINT8   bankHigh2_read_only;
49	48	/* printer */
50	49	UINT8   prn_data;
51	50	UINT8   prn_strobe;
r2014	r2015
66	65
67	66	static void svi318_uart8250_interrupt(int nr, int state)
68	67	{
69		cpunum_set_input_line(Machine, 0, 0, (state ? HOLD_LINE : CLEAR_LINE));
	68	if (svi.bankLow != SVI_CART) {
	69	cpunum_set_input_line(Machine, 0, 0, (state ? HOLD_LINE : CLEAR_LINE));
	70	}
70	71	}
71	72
72		static const uart8250_interface svi318_uart8250_interface[1] =
	73	static void svi318_com_refresh_connected(int serial_port_id)
73	74	{
	75	switch (serial_port_id)
74	76	{
	77	case 0:   /* Motorola MC14412 modem */
	78	uart8250_handshake_in(0, UART8250_HANDSHAKE_IN_CTS|UART8250_HANDSHAKE_IN_DSR|UART8250_INPUTS_RING_INDICATOR|UART8250_INPUTS_DATA_CARRIER_DETECT);
	79	break;
	80	}
	81	}
	82
	83	static const uart8250_interface svi318_uart8250_interface[2]=
	84	{
	85	{
75	86	TYPE8250,
	87	1000000,
	88	svi318_uart8250_interrupt,
	89	NULL,
	90	NULL,
	91	svi318_com_refresh_connected
	92	},
	93	{
	94	TYPE8250,
76	95	3072000,
77	96	svi318_uart8250_interrupt,
78	97	NULL,
79	98	NULL,
80	99	NULL
81		},
	100	}
82	101	};
83	102
84	103	/* Cartridge */
r2014	r2015
92	111	return IMAGE_VERIFY_FAIL;
93	112	}
94	113
95		DEVICE_INIT( svi318_cart ) {
	114	DEVICE_INIT( svi318_cart )
	115	{
96	116	pcart = NULL;
97	117	pcart_rom_size = 0;
98	118
r2014	r2015
247	267
248	268	/* Printer port */
249	269
250		WRITE8_HANDLER( svi318_printer_w )
	270	static WRITE8_HANDLER( svi318_printer_w )
251	271	{
252	272	if (!offset)
253	273	svi.prn_data = data;
r2014	r2015
260	280	}
261	281	}
262	282
263		READ8_HANDLER( svi318_printer_r )
	283	static READ8_HANDLER( svi318_printer_r )
264	284	{
265	285	if (printer_status(image_from_devtype_and_index(IO_PRINTER, 0), 0) )
266	286	return 0xfe;
r2014	r2015
343	363	}
344	364	}
345	365
346		WRITE8_HANDLER( svi318_fdc_drive_motor_w )
	366	static WRITE8_HANDLER( svi318_fdc_drive_motor_w )
347	367	{
348	368	switch (data & 3)
349	369	{
r2014	r2015
358	378	}
359	379	}
360	380
361		WRITE8_HANDLER( svi318_fdc_density_side_w )
	381	static WRITE8_HANDLER( svi318_fdc_density_side_w )
362	382	{
363	383	mess_image *image;
364	384
r2014	r2015
377	397	}
378	398	}
379	399
380		READ8_HANDLER( svi318_fdc_irqdrq_r )
	400	static READ8_HANDLER( svi318_fdc_irqdrq_r )
381	401	{
382	402	return svi318_fdc.irq_drq;
383	403	}
r2014	r2015
398	418	DEVICE_LOAD( svi318_floppy )
399	419	{
400	420	int size;
	421	int dsktype;
401	422	int id = image_index_in_device(image);
402	423
403	424	if (!image_has_been_created(image))
r2014	r2015
406	427
407	428	switch (size)
408	429	{
409		case 172032: /* Single sided */
	430	case 172032:   /* SVI-328 SSDD */
410	431	svi318_fdc.heads[id] = 1;
	432	dsktype = 0;
411	433	break;
412		case 346112: /* Double sided */
	434	case 346112:   /* SVI-328 DSDD */
413	435	svi318_fdc.heads[id] = 2;
	436	dsktype = 0;
414	437	break;
	438	case 348160:   /* SVI-728 DSDD CP/M */
	439	svi318_fdc.heads[id] = 2;
	440	dsktype = 1;
	441	break;
415	442	default:
416	443	return INIT_FAIL;
417	444	}
r2014	r2015
423	450	return INIT_FAIL;
424	451
425	452	basicdsk_set_geometry(image, 40, svi318_fdc.heads[id], 17, 256, 1, 0, FALSE);
426		basicdsk_set_calcoffset(image, svi318_calcoffset);
	453	if (dsktype == 0) {
	454	basicdsk_set_calcoffset(image, svi318_calcoffset);
	455	}
427	456
428	457	return INIT_PASS;
429	458	}
r2014	r2015
493	522	timer_set( attotime_zero, NULL, 0, svi318_80col_init_registers );
494	523	}
495	524
496		WRITE8_HANDLER( svi806_ram_enable_w )
	525	static WRITE8_HANDLER( svi806_ram_enable_w )
497	526	{
498	527	svi.svi806_ram_enabled = ( data & 0x01 );
499	528	svi318_set_banks();
r2014	r2015
601	630
602	631	/* serial */
603	632	uart8250_init(0, svi318_uart8250_interface);
	633	uart8250_init(1, svi318_uart8250_interface+1);
604	634	}
605	635
606	636	static const TMS9928a_interface svi318_tms9928a_interface =
r2014	r2015
645	675	wd17xx_reset();
646	676
647	677	uart8250_reset(0);
	678	uart8250_reset(1);
648	679	}
649	680
650	681	INTERRUPT_GEN( svi318_interrupt )
r2014	r2015
660	691
661	692	WRITE8_HANDLER( svi318_writemem1 )
662	693	{
663		if ( svi.bank1_read_only )
	694	if ( svi.bankLow_read_only )
664	695	return;
665	696
666		svi.bank1_ptr[offset] = data;
	697	svi.bankLow_ptr[offset] = data;
667	698	}
668	699
669	700	WRITE8_HANDLER( svi318_writemem2 )
670	701	{
671		if ( svi.bank2_read_only)
	702	if ( svi.bankHigh1_read_only)
672	703	return;
673	704
674		svi.bank2_ptr[offset] = data;
	705	svi.bankHigh1_ptr[offset] = data;
675	706	}
676	707
677	708	WRITE8_HANDLER( svi318_writemem3 )
678	709	{
679		if ( svi.bank3_read_only)
	710	if ( svi.bankHigh2_read_only)
680	711	return;
681	712
682		svi.bank3_ptr[offset] = data;
	713	svi.bankHigh2_ptr[offset] = data;
683	714	}
684	715
685	716	WRITE8_HANDLER( svi318_writemem4 )
r2014	r2015
689	720	svi.svi806_ram[ offset ] = data;
690	721	}
691	722	} else {
692		if ( svi.bank3_read_only )
	723	if ( svi.bankHigh2_read_only )
693	724	return;
694	725
695		svi.bank3_ptr[ 0x3000 + offset] = data;
	726	svi.bankHigh2_ptr[ 0x3000 + offset] = data;
696	727	}
697	728	}
698	729
r2014	r2015
700	731	{
701	732	const UINT8 v = svi.bank_switch;
702	733
703		svi.bank1 = ( v & 1 ) ? ( ( v & 2 ) ? ( ( v & 8 ) ? SVI_INTERNAL : SVI_EXPRAM3 ) : SVI_EXPRAM2 ) : SVI_CART;
704		svi.bank2 = ( v & 4 ) ? ( ( v & 16 ) ? SVI_INTERNAL : SVI_EXPRAM3 ) : SVI_EXPRAM2;
	734	svi.bankLow = ( v & 1 ) ? ( ( v & 2 ) ? ( ( v & 8 ) ? SVI_INTERNAL : SVI_EXPRAM3 ) : SVI_EXPRAM2 ) : SVI_CART;
	735	svi.bankHigh1 = ( v & 4 ) ? ( ( v & 16 ) ? SVI_INTERNAL : SVI_EXPRAM3 ) : SVI_EXPRAM2;
705	736
706		svi.bank1_ptr = svi.empty_bank;
707		svi.bank1_read_only = 1;
	737	svi.bankLow_ptr = svi.empty_bank;
	738	svi.bankLow_read_only = 1;
708	739
709		switch( svi.bank1 ) {
	740	switch( svi.bankLow ) {
710	741	case SVI_INTERNAL:
711		svi.bank1_ptr = memory_region(REGION_CPU1);
	742	svi.bankLow_ptr = memory_region(REGION_CPU1);
712	743	break;
713	744	case SVI_CART:
714	745	if ( pcart ) {
715		svi.bank1_ptr = pcart;
	746	svi.bankLow_ptr = pcart;
716	747	}
717	748	break;
718	749	case SVI_EXPRAM2:
719	750	if ( mess_ram_size >= 64 * 1024 ) {
720		svi.bank1_ptr = mess_ram + mess_ram_size - 64 * 1024;
721		svi.bank1_read_only = 0;
	751	svi.bankLow_ptr = mess_ram + mess_ram_size - 64 * 1024;
	752	svi.bankLow_read_only = 0;
722	753	}
723	754	break;
724	755	case SVI_EXPRAM3:
725	756	if ( mess_ram_size > 128 * 1024 ) {
726		svi.bank1_ptr = mess_ram + mess_ram_size - 128 * 1024;
727		svi.bank1_read_only = 0;
	757	svi.bankLow_ptr = mess_ram + mess_ram_size - 128 * 1024;
	758	svi.bankLow_read_only = 0;
728	759	}
729	760	break;
730	761	}
731	762
732		svi.bank2_ptr = svi.bank3_ptr = svi.empty_bank;
733		svi.bank2_read_only = svi.bank3_read_only = 1;
	763	svi.bankHigh1_ptr = svi.bankHigh2_ptr = svi.empty_bank;
	764	svi.bankHigh1_read_only = svi.bankHigh2_read_only = 1;
734	765
735		switch( svi.bank2 ) {
	766	switch( svi.bankHigh1 ) {
736	767	case SVI_INTERNAL:
737	768	if ( mess_ram_size == 16 * 1024 ) {
738		svi.bank3_ptr = mess_ram;
739		svi.bank3_read_only = 0;
	769	svi.bankHigh2_ptr = mess_ram;
	770	svi.bankHigh2_read_only = 0;
740	771	} else {
741		svi.bank2_ptr = mess_ram;
742		svi.bank2_read_only = 0;
743		svi.bank3_ptr = mess_ram + 0x4000;
744		svi.bank3_read_only = 0;
	772	svi.bankHigh1_ptr = mess_ram;
	773	svi.bankHigh1_read_only = 0;
	774	svi.bankHigh2_ptr = mess_ram + 0x4000;
	775	svi.bankHigh2_read_only = 0;
745	776	}
746	777	break;
747	778	case SVI_EXPRAM2:
748	779	if ( mess_ram_size > 64 * 1024 ) {
749		svi.bank2_ptr = mess_ram + mess_ram_size - 64 * 1024 + 32 * 1024;
750		svi.bank2_read_only = 0;
751		svi.bank3_ptr = mess_ram + mess_ram_size - 64 * 1024 + 48 * 1024;
752		svi.bank3_read_only = 0;
	780	svi.bankHigh1_ptr = mess_ram + mess_ram_size - 64 * 1024 + 32 * 1024;
	781	svi.bankHigh1_read_only = 0;
	782	svi.bankHigh2_ptr = mess_ram + mess_ram_size - 64 * 1024 + 48 * 1024;
	783	svi.bankHigh2_read_only = 0;
753	784	}
754	785	break;
755	786	case SVI_EXPRAM3:
756	787	if ( mess_ram_size > 128 * 1024 ) {
757		svi.bank2_ptr = mess_ram + mess_ram_size - 128 * 1024 + 32 * 1024;
758		svi.bank2_read_only = 0;
759		svi.bank3_ptr = mess_ram + mess_ram_size - 128 * 1024 + 48 * 1024;
760		svi.bank3_read_only = 0;
	788	svi.bankHigh1_ptr = mess_ram + mess_ram_size - 128 * 1024 + 32 * 1024;
	789	svi.bankHigh1_read_only = 0;
	790	svi.bankHigh2_ptr = mess_ram + mess_ram_size - 128 * 1024 + 48 * 1024;
	791	svi.bankHigh2_read_only = 0;
761	792	}
762	793	break;
763	794	}
764	795
765	796	/* Check for special CART based banking */
766		if ( svi.bank1 == SVI_CART && ( v & 0xc0 ) != 0xc0 ) {
767		svi.bank2_ptr = svi.empty_bank;
768		svi.bank2_read_only = 1;
769		svi.bank3_ptr = svi.empty_bank;
770		svi.bank3_read_only = 1;
	797	if ( svi.bankLow == SVI_CART && ( v & 0xc0 ) != 0xc0 ) {
	798	svi.bankHigh1_ptr = svi.empty_bank;
	799	svi.bankHigh1_read_only = 1;
	800	svi.bankHigh2_ptr = svi.empty_bank;
	801	svi.bankHigh2_read_only = 1;
771	802	if ( pcart && ! ( v & 0x80 ) ) {
772		svi.bank3_ptr = pcart + 0x4000;
	803	svi.bankHigh2_ptr = pcart + 0x4000;
773	804	}
774	805	if ( pcart && ! ( v & 0x40 ) ) {
775		svi.bank2_ptr = pcart;
	806	svi.bankHigh1_ptr = pcart;
776	807	}
777	808	}
778	809
779		memory_set_bankptr( 1, svi.bank1_ptr );
780		memory_set_bankptr( 2, svi.bank2_ptr );
781		memory_set_bankptr( 3, svi.bank3_ptr );
	810	memory_set_bankptr( 1, svi.bankLow_ptr );
	811	memory_set_bankptr( 2, svi.bankHigh1_ptr );
	812	memory_set_bankptr( 3, svi.bankHigh2_ptr );
782	813
783	814	/* SVI-806 80 column card specific banking */
784	815	if ( svi.svi806_present ) {
785	816	if ( svi.svi806_ram_enabled ) {
786	817	memory_set_bankptr( 4, svi.svi806_ram );
787	818	} else {
788		memory_set_bankptr( 4, svi.bank3_ptr + 0x3000 );
	819	memory_set_bankptr( 4, svi.bankHigh2_ptr + 0x3000 );
789	820	}
790	821	}
791	822	}
r2014	r2015
796	827	{
797	828	return image_exists(image_from_devtype_and_index(IO_CASSETTE, id));
798	829	}
	830
	831	/* External I/O */
	832
	833	READ8_HANDLER( svi318_io_ext_r )
	834	{
	835	UINT8 data = 0xff;
	836
	837	if (svi.bankLow == SVI_CART) {
	838	return 0xff;
	839	}
	840
	841	switch( offset ) {
	842	case 0x12:
	843	data = svi318_printer_r(machine, 0);
	844	break;
	845	/* some UART status is not working
	846	case 0x20:
	847	case 0x21:
	848	case 0x22:
	849	case 0x23:
	850	case 0x24:
	851	case 0x25:
	852	case 0x26:
	853	case 0x27:
	854	data = uart8250_0_r(machine, offset & 7);
	855	break;
	856	*/
	857	case 0x28:
	858	case 0x29:
	859	case 0x2A:
	860	case 0x2B:
	861	case 0x2C:
	862	case 0x2D:
	863	case 0x2E:
	864	case 0x2F:
	865	data = uart8250_1_r(machine, offset & 7);
	866	break;
	867	case 0x30:
	868	data = wd17xx_status_r(machine, 0);
	869	break;
	870	case 0x31:
	871	data = wd17xx_track_r(machine, 0);
	872	break;
	873	case 0x32:
	874	data = wd17xx_sector_r(machine, 0);
	875	break;
	876	case 0x33:
	877	data = wd17xx_data_r(machine, 0);
	878	break;
	879	case 0x34:
	880	data = svi318_fdc_irqdrq_r(machine, 0);
	881	break;
	882	case 0x51: {
	883	device_config *devconf = (device_config *) device_list_find_by_tag(machine->config->devicelist, MC6845, "crtc");
	884	data = mc6845_register_r(devconf, 0);
	885	}
	886	break;
	887	}
	888
	889	return data;
	890	}
	891
	892	WRITE8_HANDLER( svi318_io_ext_w )
	893	{
	894	if (svi.bankLow == SVI_CART) {
	895	return;
	896	}
	897
	898	switch( offset ) {
	899	case 0x10:
	900	case 0x11:
	901	svi318_printer_w(machine, offset & 1, data);
	902	break;
	903	case 0x20:
	904	case 0x21:
	905	case 0x22:
	906	case 0x23:
	907	case 0x24:
	908	case 0x25:
	909	case 0x26:
	910	case 0x27:
	911	uart8250_0_w(machine, offset & 7, data);
	912	break;
	913	case 0x28:
	914	case 0x29:
	915	case 0x2A:
	916	case 0x2B:
	917	case 0x2C:
	918	case 0x2D:
	919	case 0x2E:
	920	case 0x2F:
	921	uart8250_1_w(machine, offset & 7, data);
	922	break;
	923	case 0x30:
	924	wd17xx_command_w(machine, 0, data);
	925	break;
	926	case 0x31:
	927	wd17xx_track_w(machine, 0, data);
	928	break;
	929	case 0x32:
	930	wd17xx_sector_w(machine, 0, data);
	931	break;
	932	case 0x33:
	933	wd17xx_data_w(machine, 0, data);
	934	break;
	935	case 0x34:
	936	svi318_fdc_drive_motor_w(machine, 0, data);
	937	break;
	938	case 0x38:
	939	svi318_fdc_density_side_w(machine, 0, data);
	940	break;
	941	case 0x50: {
	942	device_config *devconf = (device_config *) device_list_find_by_tag(machine->config->devicelist, MC6845, "crtc");
	943	mc6845_address_w(devconf, 0, data);
	944	}
	945	break;
	946	case 0x51: {
	947	device_config *devconf = (device_config *) device_list_find_by_tag(machine->config->devicelist, MC6845, "crtc");
	948	mc6845_register_w(devconf, 0, data);
	949	}
	950	break;
	951	case 0x58:
	952	svi806_ram_enable_w(machine, 0, data);
	953	break;
	954	}
	955	}

src/mess/drivers/svi318.c

r2014	r2015
14	14	#include "includes/svi318.h"
15	15	#include "video/tms9928a.h"
16	16	#include "machine/8255ppi.h"
17		#include "machine/uart8250.h"
18		#include "machine/wd17xx.h"
19	17	#include "devices/basicdsk.h"
20	18	#include "devices/printer.h"
21	19	#include "devices/cartslot.h"
r2014	r2015
41	39	static ADDRESS_MAP_START( svi318_io, ADDRESS_SPACE_IO, 8 )
42	40	ADDRESS_MAP_UNMAP_HIGH
43	41	ADDRESS_MAP_GLOBAL_MASK(0xff)
44		AM_RANGE( 0x10, 0x11) AM_WRITE( svi318_printer_w )
45		AM_RANGE( 0x12, 0x12) AM_READ( svi318_printer_r )
46		AM_RANGE( 0x28, 0x2f) AM_READWRITE( uart8250_0_r, uart8250_0_w )
47		AM_RANGE( 0x30, 0x30) AM_READWRITE( wd17xx_status_r, wd17xx_command_w )
48		AM_RANGE( 0x31, 0x31) AM_READWRITE( wd17xx_track_r, wd17xx_track_w )
49		AM_RANGE( 0x32, 0x32) AM_READWRITE( wd17xx_sector_r, wd17xx_sector_w )
50		AM_RANGE( 0x33, 0x33) AM_READWRITE( wd17xx_data_r, wd17xx_data_w )
51		AM_RANGE( 0x34, 0x34) AM_READWRITE( svi318_fdc_irqdrq_r, svi318_fdc_drive_motor_w )
52		AM_RANGE( 0x38, 0x38) AM_WRITE( svi318_fdc_density_side_w )
	42	AM_RANGE( 0x00, 0x38) AM_READWRITE( svi318_io_ext_r, svi318_io_ext_w )
53	43	AM_RANGE( 0x80, 0x80) AM_WRITE( TMS9928A_vram_w )
54	44	AM_RANGE( 0x81, 0x81) AM_WRITE( TMS9928A_register_w )
55	45	AM_RANGE( 0x84, 0x84) AM_READ( TMS9928A_vram_r )
r2014	r2015
61	51	AM_RANGE( 0x98, 0x9a) AM_READ( svi318_ppi_r )
62	52	ADDRESS_MAP_END
63	53
64		static ADDRESS_MAP_START( svi318_io2, ADDRESS_SPACE_IO, 8 )
	54	static ADDRESS_MAP_START( svi328_806_io, ADDRESS_SPACE_IO, 8 )
65	55	ADDRESS_MAP_UNMAP_HIGH
66	56	ADDRESS_MAP_GLOBAL_MASK(0xff)
67		AM_RANGE( 0x10, 0x11) AM_WRITE( svi318_printer_w )
68		AM_RANGE( 0x12, 0x12) AM_READ( svi318_printer_r )
69		AM_RANGE( 0x30, 0x30) AM_READWRITE( wd17xx_status_r, wd17xx_command_w )
70		AM_RANGE( 0x31, 0x31) AM_READWRITE( wd17xx_track_r, wd17xx_track_w )
71		AM_RANGE( 0x32, 0x32) AM_READWRITE( wd17xx_sector_r, wd17xx_sector_w )
72		AM_RANGE( 0x33, 0x33) AM_READWRITE( wd17xx_data_r, wd17xx_data_w )
73		AM_RANGE( 0x34, 0x34) AM_READWRITE( svi318_fdc_irqdrq_r, svi318_fdc_drive_motor_w )
74		AM_RANGE( 0x38, 0x38) AM_WRITE( svi318_fdc_density_side_w )
75		AM_RANGE( 0x50, 0x50) AM_DEVREADWRITE( MC6845, "crtc", mc6845_register_r, mc6845_address_w )
76		AM_RANGE( 0x51, 0x51) AM_DEVREADWRITE( MC6845, "crtc", mc6845_register_r, mc6845_register_w )
77		AM_RANGE( 0x58, 0x58) AM_WRITE( svi806_ram_enable_w )
	57	AM_RANGE( 0x00, 0x58) AM_READWRITE( svi318_io_ext_r, svi318_io_ext_w )
78	58	AM_RANGE( 0x80, 0x80) AM_WRITE( TMS9928A_vram_w )
79	59	AM_RANGE( 0x81, 0x81) AM_WRITE( TMS9928A_register_w )
80	60	AM_RANGE( 0x84, 0x84) AM_READ( TMS9928A_vram_r )
r2014	r2015
88	68
89	69	/*
90	70	Keyboard status table
91
92	71	Bit#:|  7  |  6  |  5  |  4  |  3  |  2  |  1  |  0  |
93	72	|     |     |     |     |     |     |     |     |
94	73	Line:     |     |     |     |     |     |     |     |     |
r2014	r2015
357	336	static const mc6845_interface svi806_crtc6845_interface =
358	337	{
359	338	"svi806",
360		XTAL_12MHz / 4,
	339	XTAL_12MHz / 8,
361	340	8 /*?*/,
362	341	NULL,
363	342	svi806_crtc6845_update_row,
r2014	r2015
371	350	/* Basic machine hardware */
372	351	MDRV_CPU_ADD_TAG( "main", Z80, 3579545 )   /* 3.579545 Mhz */
373	352	MDRV_CPU_PROGRAM_MAP( svi328_806_mem, 0 )
374		MDRV_CPU_IO_MAP( svi318_io2, 0 )
	353	MDRV_CPU_IO_MAP( svi328_806_io, 0 )
375	354	MDRV_CPU_VBLANK_INT("main", svi318_interrupt)
376	355	MDRV_INTERLEAVE(1)
377	356
r2014	r2015
389	368
390	369	MDRV_SCREEN_ADD("svi806", RASTER)
391	370	MDRV_SCREEN_FORMAT(BITMAP_FORMAT_INDEXED16)
392		MDRV_SCREEN_REFRESH_RATE(60)
	371	MDRV_SCREEN_REFRESH_RATE(50)
393	372	MDRV_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(2500))
394	373	MDRV_SCREEN_SIZE(640, 400)
395		MDRV_SCREEN_VISIBLE_AREA(0,640-1, 0, 400-1)
	374	MDRV_SCREEN_VISIBLE_AREA(0, 640-1, 0, 400-1)
396	375
397	376	MDRV_DEVICE_ADD("crtc", MC6845)
398	377	MDRV_DEVICE_CONFIG( svi806_crtc6845_interface )
r2014	r2015
470	449	ROM_REGION (0x10000, REGION_CPU1,0)
471	450	ROM_LOAD ("svi111.rom", 0x0000, 0x8000, CRC(bc433df6) SHA1(10349ce675f6d6d47f0976e39cb7188eba858d89))
472	451	ROM_REGION( 0x1000, REGION_GFX1, 0)
473		ROM_SYSTEM_BIOS(0, "english", "English Character Cartridge")
	452	ROM_SYSTEM_BIOS(0, "english", "English Character Set")
474	453	ROMX_LOAD ("svi806.rom",   0x0000, 0x1000, CRC(850bc232) SHA1(ed45cb0e9bd18a9d7bd74f87e620f016a7ae840f), ROM_BIOS(1))
475		ROM_SYSTEM_BIOS(1, "swedish", "Swedish Character Cartridge")
	454	ROM_SYSTEM_BIOS(1, "swedish", "Swedish Character Set")
476	455	ROMX_LOAD ("svi806se.rom", 0x0000, 0x1000, CRC(daea8956) SHA1(3f16d5513ad35692488ae7d864f660e76c6e8ed3), ROM_BIOS(2))
477	456	ROM_END
478	457
r2014	r2015
480	459	ROM_REGION (0x10000, REGION_CPU1,0)
481	460	ROM_LOAD ("svi111.rom", 0x0000, 0x8000, CRC(bc433df6) SHA1(10349ce675f6d6d47f0976e39cb7188eba858d89))
482	461	ROM_REGION( 0x1000, REGION_GFX1, 0)
483		ROM_SYSTEM_BIOS(0, "english", "English Character Cartridge")
	462	ROM_SYSTEM_BIOS(0, "english", "English Character Set")
484	463	ROMX_LOAD ("svi806.rom",   0x0000, 0x1000, CRC(850bc232) SHA1(ed45cb0e9bd18a9d7bd74f87e620f016a7ae840f), ROM_BIOS(1))
485		ROM_SYSTEM_BIOS(1, "swedish", "Swedish Character Cartridge")
	464	ROM_SYSTEM_BIOS(1, "swedish", "Swedish Character Set")
486	465	ROMX_LOAD ("svi806se.rom", 0x0000, 0x1000, CRC(daea8956) SHA1(3f16d5513ad35692488ae7d864f660e76c6e8ed3), ROM_BIOS(2))
487	466	ROM_END
488	467
r2014	r2015
591	570	SYSTEM_CONFIG_START( svi318 )
592	571	CONFIG_IMPORT_FROM(svi318_common)
593	572	CONFIG_RAM_DEFAULT(16 * 1024)
594		CONFIG_RAM( 80 * 1024 )
595		CONFIG_RAM( 144 * 1024 )
	573	CONFIG_RAM( 32 * 1024 )
	574	CONFIG_RAM( 96 * 1024 )
	575	CONFIG_RAM( 160 * 1024 )
596	576	SYSTEM_CONFIG_END
597	577
598	578	SYSTEM_CONFIG_START( svi328 )
599	579	CONFIG_IMPORT_FROM(svi318_common)
600	580	CONFIG_RAM_DEFAULT(64 * 1024)
601		CONFIG_RAM( 128 * 1024 )
602		CONFIG_RAM( 192 * 1024 )
	581	CONFIG_RAM( 96 * 1024 )
	582	CONFIG_RAM( 160 * 1024 )
603	583	SYSTEM_CONFIG_END
604	584
605	585	/*    YEAR  NAME        PARENT  COMPAT  MACHINE     INPUT   INIT    CONFIG  COMPANY         FULLNAME                    FLAGS */
r2014	r2015
608	588	COMP( 1983, svi328,     svi318, 0,      svi318,     svi328, svi318, svi328, "Spectravideo", "SVI-328 (PAL)",            0 )
609	589	COMP( 1983, svi328n,    svi318, 0,      svi318n,    svi328, svi318, svi328, "Spectravideo", "SVI-328 (NTSC)",           0 )
610	590	COMP( 1983, sv328p80,   svi318, 0,      svi328_806,    svi328, svi318, svi328, "Spectravideo", "SVI-328 (PAL) + SVI-806 80 column card", 0 )
611		COMP( 1983, sv328n80,   svi318, 0,      svi328n_806,    svi328, svi318, svi328, "Spectravideo", "SVI-328 (NTSC) + SVI-806 80 column card", 0 )
612
	591	COMP( 1983, sv328n80,   svi318, 0,      svi328n_806,   svi328, svi318, svi328, "Spectravideo", "SVI-328 (NTSC) + SVI-806 80 column card", 0 )

docs/messnew.txt

r2014	r2015
35	35
36	36	- [QL] System boots up again. (bug #1495) [Curt Coder]
37	37
	38	- [SVI318] Cleaned up driver.  [Tomas Karlsson]
	39
38	40	- [TRS80] Fixed an issue with I/O ports. Fixed 32 character display. Decoded
39	41	LNW-80 characters. [Robbbert]
40	42

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