src/mame/drivers/cobra.c
| r15764 | r15765 | |
| 154 | 154 | |
| 155 | 155 | Gfx: |
| 156 | 156 | - |
| 157 | | Fails on memcheck_teximage(), memcheck_framebuf(), drawcheck() |
| 157 | Fails on drawcheck() |
| 158 | 158 | 0x3806dc(): Waits for [0x7f7ffc] to change (in main) |
| 159 | 159 | |
| 160 | 160 | |
| r15764 | r15765 | |
| 170 | 170 | 0xa0 0xa4 0xa8 0xac |
| 171 | 171 | 0xb0 0xb4 0xb8 0xbc |
| 172 | 172 | |
| 173 | 0x00114: High word: framebuffer pitch? Low word: framebuffer pixel size? |
| 174 | 0x00118: High word: FB pixel read X pos, Low word: FB pixel read Y pos |
| 175 | 0x0011c: Same as above? |
| 176 | |
| 177 | 0x40018: Set to 0x0001040a by mode_stipple() |
| 178 | 0x400d0: Set to 0x80000000 by mode_stipple() |
| 179 | 0x40114: Set to 0x00080000 by mode_scissor() |
| 180 | 0x40138: Set to 0x88800000 by mode_viewclip() |
| 173 | 181 | 0x40160: Some viewport register? (high word: 192, low word: 150) |
| 174 | 182 | 0x40164: Some viewport register? (high word: 352, low word: 275) |
| 175 | 183 | 0x40170: Some viewport register? (high word: 160, low word: 125) |
| 176 | 184 | 0x40174: Some viewport register? (high word: 320, low word: 250) |
| 185 | 0x40198: Set to 0x80800000 by mode_alphatest() |
| 186 | 0x4019c: Set to 0x88000000 by mode_fog() |
| 187 | 0x80020: Set to 0x00020000 by mode_depthtest() |
| 177 | 188 | 0xc0c00..fff: Texture RAM readback |
| 178 | 189 | 0xc3020: Start address for texram writes? |
| 179 | 190 | 0xc3028: Reads address from texram? |
| r15764 | r15765 | |
| 203 | 214 | class cobra_renderer : public poly_manager<float, cobra_polydata, 6, 10000> |
| 204 | 215 | { |
| 205 | 216 | public: |
| 206 | | cobra_renderer(running_machine &machine, bitmap_rgb32 *fb) |
| 217 | cobra_renderer(running_machine &machine) |
| 207 | 218 | : poly_manager<float, cobra_polydata, 6, 10000>(machine) |
| 208 | 219 | { |
| 209 | | m_fb = fb; |
| 220 | m_texture_ram = auto_alloc_array(machine, UINT32, 0x100000); |
| 210 | 221 | |
| 211 | | m_texture_ram = auto_alloc_array(machine, UINT32, 0x1000000); |
| 222 | m_framebuffer = auto_bitmap_rgb32_alloc(machine, 1024, 1024); |
| 223 | m_backbuffer = auto_bitmap_rgb32_alloc(machine, 1024, 1024); |
| 224 | m_overlay = auto_bitmap_rgb32_alloc(machine, 1024, 1024); |
| 225 | m_zbuffer = auto_bitmap_ind32_alloc(machine, 1024, 1024); |
| 226 | m_stencil = auto_bitmap_ind32_alloc(machine, 1024, 1024); |
| 212 | 227 | |
| 213 | 228 | // TODO: these are probably set by some 3D registers |
| 214 | 229 | m_texture_width = 128; |
| 215 | 230 | m_texture_height = 8; |
| 231 | |
| 232 | m_gfx_regmask = auto_alloc_array(machine, UINT32, 0x100); |
| 233 | for (int i=0; i < 0x100; i++) |
| 234 | { |
| 235 | UINT32 mask = 0; |
| 236 | if (i & 0x01) mask |= 0x0000000f; |
| 237 | if (i & 0x02) mask |= 0x000000f0; |
| 238 | if (i & 0x04) mask |= 0x00000f00; |
| 239 | if (i & 0x08) mask |= 0x0000f000; |
| 240 | if (i & 0x10) mask |= 0x000f0000; |
| 241 | if (i & 0x20) mask |= 0x00f00000; |
| 242 | if (i & 0x40) mask |= 0x0f000000; |
| 243 | if (i & 0x80) mask |= 0xf0000000; |
| 244 | |
| 245 | m_gfx_regmask[i] = mask; |
| 246 | } |
| 216 | 247 | } |
| 217 | 248 | |
| 218 | 249 | void render_texture_scan(INT32 scanline, const extent_t &extent, const cobra_polydata &extradata, int threadid); |
| r15764 | r15765 | |
| 224 | 255 | void gfx_reset(running_machine &machine); |
| 225 | 256 | void gfx_fifo_exec(running_machine &machine); |
| 226 | 257 | UINT32 gfx_read_gram(UINT32 address); |
| 227 | | void gfx_write_gram(UINT32 address, UINT32 data); |
| 258 | void gfx_write_gram(UINT32 address, UINT32 mask, UINT32 data); |
| 228 | 259 | |
| 260 | void display(bitmap_rgb32 *bitmap, const rectangle &cliprect); |
| 261 | |
| 229 | 262 | private: |
| 230 | | bitmap_rgb32 *m_fb; |
| 263 | bitmap_rgb32 *m_framebuffer; |
| 264 | bitmap_rgb32 *m_backbuffer; |
| 265 | bitmap_rgb32 *m_overlay; |
| 266 | bitmap_ind32 *m_zbuffer; |
| 267 | bitmap_ind32 *m_stencil; |
| 231 | 268 | |
| 232 | 269 | UINT32 *m_texture_ram; |
| 233 | 270 | int m_texture_width; |
| 234 | 271 | int m_texture_height; |
| 235 | 272 | |
| 236 | 273 | UINT32 *m_gfx_gram; |
| 274 | UINT32 *m_gfx_regmask; |
| 237 | 275 | }; |
| 238 | 276 | |
| 239 | 277 | class cobra_fifo |
| r15764 | r15765 | |
| 340 | 378 | UINT32 *m_comram[2]; |
| 341 | 379 | int m_comram_page; |
| 342 | 380 | |
| 343 | | bitmap_rgb32 *m_framebuffer; |
| 344 | | |
| 345 | 381 | int m_main_debug_state; |
| 346 | 382 | int m_main_debug_state_wc; |
| 347 | 383 | int m_sub_debug_state; |
| r15764 | r15765 | |
| 372 | 408 | void cobra_renderer::render_color_scan(INT32 scanline, const extent_t &extent, const cobra_polydata &extradata, int threadid) |
| 373 | 409 | { |
| 374 | 410 | /* |
| 375 | | UINT32 *fb = &m_fb->pix32(scanline); |
| 411 | UINT32 *fb = &m_framebuffer->pix32(scanline); |
| 376 | 412 | |
| 377 | 413 | UINT32 color = 0xffff0000; // TODO |
| 378 | 414 | |
| r15764 | r15765 | |
| 389 | 425 | float v = extent.param[1].start; |
| 390 | 426 | float du = extent.param[0].dpdx; |
| 391 | 427 | float dv = extent.param[1].dpdx; |
| 392 | | UINT32 *fb = &m_fb->pix32(scanline); |
| 428 | UINT32 *fb = &m_framebuffer->pix32(scanline); |
| 393 | 429 | |
| 394 | 430 | for (int x = extent.startx; x < extent.stopx; x++) |
| 395 | 431 | { |
| r15764 | r15765 | |
| 429 | 465 | if (x >= visarea.min_x && x <= visarea.max_x && |
| 430 | 466 | y >= visarea.min_y && y <= visarea.max_y) |
| 431 | 467 | { |
| 432 | | UINT32 *fb = &m_fb->pix32(y); |
| 468 | UINT32 *fb = &m_framebuffer->pix32(y); |
| 433 | 469 | fb[x] = color; |
| 434 | 470 | } |
| 435 | 471 | } |
| r15764 | r15765 | |
| 457 | 493 | { |
| 458 | 494 | int y = y1 + (dy * (float)(x - x1) / (float)(dx)); |
| 459 | 495 | |
| 460 | | UINT32 *fb = &m_fb->pix32(y); |
| 496 | UINT32 *fb = &m_framebuffer->pix32(y); |
| 461 | 497 | fb[x] = color; |
| 462 | 498 | |
| 463 | 499 | x++; |
| r15764 | r15765 | |
| 470 | 506 | { |
| 471 | 507 | int x = x1 + (dx * (float)(y - y1) / (float)(dy)); |
| 472 | 508 | |
| 473 | | UINT32 *fb = &m_fb->pix32(y); |
| 509 | UINT32 *fb = &m_framebuffer->pix32(y); |
| 474 | 510 | fb[x] = color; |
| 475 | 511 | |
| 476 | 512 | y++; |
| r15764 | r15765 | |
| 488 | 524 | |
| 489 | 525 | machine.add_notifier(MACHINE_NOTIFY_EXIT, machine_notify_delegate(FUNC(cobra_video_exit), &machine)); |
| 490 | 526 | |
| 491 | | cobra->m_framebuffer = auto_bitmap_rgb32_alloc(machine, 512, 384); |
| 492 | | |
| 493 | | cobra->m_renderer = auto_alloc(machine, cobra_renderer(machine, cobra->m_framebuffer)); |
| 527 | cobra->m_renderer = auto_alloc(machine, cobra_renderer(machine)); |
| 494 | 528 | cobra->m_renderer->gfx_init(machine); |
| 495 | 529 | } |
| 496 | 530 | |
| r15764 | r15765 | |
| 498 | 532 | { |
| 499 | 533 | cobra_state *cobra = screen.machine().driver_data<cobra_state>(); |
| 500 | 534 | |
| 501 | | copybitmap_trans(bitmap, *cobra->m_framebuffer, 0, 0, 0, 0, cliprect, 0); |
| 535 | cobra->m_renderer->display(&bitmap, cliprect); |
| 502 | 536 | return 0; |
| 503 | 537 | } |
| 504 | 538 | |
| r15764 | r15765 | |
| 1386 | 1420 | #define RE_STATUS_IDLE 0 |
| 1387 | 1421 | #define RE_STATUS_COMMAND 1 |
| 1388 | 1422 | |
| 1423 | void cobra_renderer::display(bitmap_rgb32 *bitmap, const rectangle &cliprect) |
| 1424 | { |
| 1425 | copybitmap_trans(*bitmap, *m_framebuffer, 0, 0, 0, 0, cliprect, 0); |
| 1426 | } |
| 1427 | |
| 1389 | 1428 | void cobra_renderer::gfx_init(running_machine &machine) |
| 1390 | 1429 | { |
| 1391 | 1430 | cobra_state *cobra = machine.driver_data<cobra_state>(); |
| r15764 | r15765 | |
| 1433 | 1472 | return m_gfx_gram[address/4]; |
| 1434 | 1473 | } |
| 1435 | 1474 | |
| 1436 | | void cobra_renderer::gfx_write_gram(UINT32 address, UINT32 data) |
| 1475 | void cobra_renderer::gfx_write_gram(UINT32 address, UINT32 mask, UINT32 data) |
| 1437 | 1476 | { |
| 1438 | 1477 | if (address & 3) |
| 1439 | 1478 | { |
| r15764 | r15765 | |
| 1445 | 1484 | { |
| 1446 | 1485 | } |
| 1447 | 1486 | |
| 1448 | | m_gfx_gram[address/4] = data; |
| 1487 | m_gfx_gram[address/4] &= ~mask; |
| 1488 | m_gfx_gram[address/4] |= data & mask; |
| 1449 | 1489 | } |
| 1450 | 1490 | |
| 1451 | 1491 | void cobra_renderer::gfx_fifo_exec(running_machine &machine) |
| r15764 | r15765 | |
| 1876 | 1916 | |
| 1877 | 1917 | case 0xe8: |
| 1878 | 1918 | { |
| 1879 | | // Write into a pixelbuffer? |
| 1919 | // Write into a pixelbuffer |
| 1880 | 1920 | |
| 1881 | 1921 | int num = w2; |
| 1882 | 1922 | int i; |
| 1883 | | //int c=0; |
| 1884 | 1923 | |
| 1885 | 1924 | if (fifo_in->current_num() < num) |
| 1886 | 1925 | { |
| r15764 | r15765 | |
| 1888 | 1927 | return; |
| 1889 | 1928 | } |
| 1890 | 1929 | |
| 1891 | | if (num > 0) |
| 1892 | | { |
| 1893 | | printf("gfxfifo_exec: unhandled %08X %08X\n", w1, w2); |
| 1894 | | } |
| 1930 | if (num & 3) |
| 1931 | fatalerror("gfxfifo_exec: e8 with num %d\n", num); |
| 1895 | 1932 | |
| 1896 | | for (i=0; i < num; i++) |
| 1933 | int x = (m_gfx_gram[0x118/4] >> 16) & 0xffff; |
| 1934 | int y = m_gfx_gram[0x118/4] & 0xffff; |
| 1935 | |
| 1936 | for (i=0; i < num; i+=4) |
| 1897 | 1937 | { |
| 1898 | | UINT64 param; |
| 1899 | | fifo_in->pop(NULL, ¶m); |
| 1938 | UINT32 *buffer; |
| 1939 | switch (m_gfx_gram[0x80104/4]) |
| 1940 | { |
| 1941 | case 0x800000: buffer = &m_framebuffer->pix32(y); break; |
| 1942 | case 0x200000: buffer = &m_backbuffer->pix32(y); break; |
| 1943 | case 0x0e0000: buffer = &m_overlay->pix32(y); break; |
| 1944 | case 0x000800: buffer = &m_zbuffer->pix32(y); break; |
| 1945 | case 0x000200: buffer = &m_stencil->pix32(y); break; |
| 1946 | |
| 1947 | default: |
| 1948 | { |
| 1949 | fatalerror("gfxfifo_exec: fb write to buffer %08X!\n", m_gfx_gram[0x80100/4]); |
| 1950 | } |
| 1951 | } |
| 1900 | 1952 | |
| 1901 | | /* |
| 1902 | | if (c == 0) |
| 1903 | | printf(" "); |
| 1904 | | printf("%08X ", (UINT32)(param)); |
| 1953 | UINT64 param[4]; |
| 1954 | param[0] = param[1] = param[2] = param[3] = 0; |
| 1955 | fifo_in->pop(NULL, ¶m[0]); |
| 1956 | fifo_in->pop(NULL, ¶m[1]); |
| 1957 | fifo_in->pop(NULL, ¶m[2]); |
| 1958 | fifo_in->pop(NULL, ¶m[3]); |
| 1905 | 1959 | |
| 1906 | | c++; |
| 1960 | buffer[x+0] = (UINT32)(param[0]); |
| 1961 | buffer[x+1] = (UINT32)(param[1]); |
| 1962 | buffer[x+2] = (UINT32)(param[2]); |
| 1963 | buffer[x+3] = (UINT32)(param[3]); |
| 1907 | 1964 | |
| 1908 | | if (c == 8) |
| 1909 | | { |
| 1910 | | printf("\n"); |
| 1911 | | c = 0; |
| 1912 | | }*/ |
| 1965 | //printf("gfx: fb write %d, %d: %08X %08X %08X %08X\n", x, y, (UINT32)(param[0]), (UINT32)(param[1]), (UINT32)(param[2]), (UINT32)(param[3])); |
| 1966 | |
| 1967 | y++; |
| 1913 | 1968 | } |
| 1914 | | //printf("\n"); |
| 1915 | 1969 | |
| 1916 | 1970 | cobra->m_gfx_re_status = RE_STATUS_IDLE; |
| 1917 | 1971 | break; |
| r15764 | r15765 | |
| 1919 | 1973 | |
| 1920 | 1974 | case 0xe9: |
| 1921 | 1975 | { |
| 1922 | | // Read a specified pixel position from a pixelbuffer? |
| 1976 | // Read a specified pixel position from a pixelbuffer |
| 1923 | 1977 | |
| 1924 | | // printf("gfxfifo_exec: unhandled %08X %08X\n", w1, w2); |
| 1978 | // printf("GFX: FB read X: %d, Y: %d\n", (UINT16)(m_gfx_gram[0x118/4] >> 16), (UINT16)(m_gfx_gram[0x118/4])); |
| 1925 | 1979 | |
| 1926 | | /*{ |
| 1927 | | int y = (gfx_gram[0x11c] << 8) | (gfx_gram[0x11d]); |
| 1928 | | int x = (gfx_gram[0x11e] << 8) | (gfx_gram[0x11f]); |
| 1929 | | printf("GFX: E9 on X: %d, Y: %d\n", x, y); |
| 1930 | | }*/ |
| 1980 | int x = (m_gfx_gram[0x118/4] >> 16) & 0xffff; |
| 1981 | int y = m_gfx_gram[0x118/4] & 0xffff; |
| 1931 | 1982 | |
| 1932 | | fifo_out->push(NULL, 0); |
| 1933 | | fifo_out->push(NULL, 0); |
| 1934 | | fifo_out->push(NULL, 0); |
| 1935 | | fifo_out->push(NULL, 0); |
| 1983 | UINT32 *buffer; |
| 1984 | switch (m_gfx_gram[0x80104/4]) |
| 1985 | { |
| 1986 | case 0x800000: buffer = &m_framebuffer->pix32(y); break; |
| 1987 | case 0x200000: buffer = &m_backbuffer->pix32(y); break; |
| 1988 | case 0x0e0000: buffer = &m_overlay->pix32(y); break; |
| 1989 | case 0x000800: buffer = &m_zbuffer->pix32(y); break; |
| 1990 | case 0x000200: buffer = &m_stencil->pix32(y); break; |
| 1991 | |
| 1992 | default: |
| 1993 | { |
| 1994 | fatalerror("gfxfifo_exec: fb read from buffer %08X!\n", m_gfx_gram[0x80100/4]); |
| 1995 | } |
| 1996 | } |
| 1936 | 1997 | |
| 1998 | fifo_out->push(NULL, buffer[x+0]); |
| 1999 | fifo_out->push(NULL, buffer[x+1]); |
| 2000 | fifo_out->push(NULL, buffer[x+2]); |
| 2001 | fifo_out->push(NULL, buffer[x+3]); |
| 2002 | |
| 1937 | 2003 | cobra->m_gfx_re_status = RE_STATUS_IDLE; |
| 1938 | 2004 | break; |
| 1939 | 2005 | } |
| r15764 | r15765 | |
| 1996 | 2062 | // 0xa40000FF 0x00000001 |
| 1997 | 2063 | |
| 1998 | 2064 | int reg = (w1 >> 8) & 0xfffff; |
| 2065 | UINT32 mask = m_gfx_regmask[w1 & 0xff]; |
| 1999 | 2066 | |
| 2000 | | gfx_write_gram(reg, w2); |
| 2067 | gfx_write_gram(reg, mask, w2); |
| 2001 | 2068 | |
| 2002 | 2069 | if (reg != 0x118 && reg != 0x114 && reg != 0x11c) |
| 2003 | 2070 | { |
| 2004 | | printf("gfxfifo_exec: ram write %05X: %08X (%f)\n", reg, w2, u2f(w2)); |
| 2071 | printf("gfxfifo_exec: ram write %05X (mask %08X): %08X (%f)\n", reg, mask, w2, u2f(w2)); |
| 2005 | 2072 | } |
| 2006 | 2073 | |
| 2007 | 2074 | cobra->m_gfx_re_status = RE_STATUS_IDLE; |
| r15764 | r15765 | |
| 2031 | 2098 | UINT64 value = 0; |
| 2032 | 2099 | fifo_in->pop(NULL, &value); |
| 2033 | 2100 | |
| 2034 | | gfx_write_gram(reg + (i*4), value); |
| 2101 | gfx_write_gram(reg + (i*4), 0xffffffff, value); |
| 2035 | 2102 | } |
| 2036 | 2103 | |
| 2037 | 2104 | cobra->m_gfx_re_status = RE_STATUS_IDLE; |
| r15764 | r15765 | |
| 2099 | 2166 | |
| 2100 | 2167 | cobra->m_gfx_unk_status |= 0x400; |
| 2101 | 2168 | |
| 2102 | | printf("gfxfifo_exec: tex_ints %d words left\n", num-cobra->m_gfx_re_word_count); |
| 2169 | if (cobra->m_gfx_re_word_count == 0) |
| 2170 | printf("gfxfifo_exec: tex_ints %d words left\n", num - cobra->m_gfx_re_word_count); |
| 2103 | 2171 | |
| 2104 | 2172 | for (int i=0; i < num_left; i++) |
| 2105 | 2173 | { |
src/mame/drivers/deco_ld.c
| r15764 | r15765 | |
| 5 | 5 | preliminary driver by Angelo Salese |
| 6 | 6 | |
| 7 | 7 | TODO: |
| 8 | | - laserdisc hook-ups; |
| 9 | | - video emulation is bare bones; |
| 10 | | - i/os |
| 8 | - laserdisc hook-up and 6850 comms; |
| 9 | - "RAM TEST ERROR 5J" in Bega's Battle and Cobra Command |
| 10 | - "SOUND TEST READ ERROR" |
| 11 | - color offset number origin is unknown; |
| 12 | - Bega's Battle VBLANK hack (ld/framework fault most likely) |
| 13 | - CPU clocks |
| 14 | - dip-switches |
| 15 | - clean-ups |
| 11 | 16 | |
| 12 | 17 | *************************************************************************** |
| 13 | 18 | |
| r15764 | r15765 | |
| 112 | 117 | public: |
| 113 | 118 | deco_ld_state(const machine_config &mconfig, device_type type, const char *tag) |
| 114 | 119 | : driver_device(mconfig, type, tag), |
| 115 | | m_laserdisc(*this, "laserdisc") , |
| 116 | | m_videoram(*this, "videoram"){ } |
| 120 | m_maincpu(*this, "maincpu"), |
| 121 | m_audiocpu(*this, "audiocpu"), |
| 122 | m_laserdisc(*this, "laserdisc"), |
| 123 | m_vram0(*this, "vram0"), |
| 124 | m_attr0(*this, "attr0"), |
| 125 | m_vram1(*this, "vram1"), |
| 126 | m_attr1(*this, "attr1") |
| 127 | { } |
| 117 | 128 | |
| 129 | required_device<cpu_device> m_maincpu; |
| 130 | optional_device<cpu_device> m_audiocpu; |
| 118 | 131 | required_device<pioneer_ldv1000_device> m_laserdisc; |
| 119 | | required_shared_ptr<UINT8> m_videoram; |
| 120 | | UINT8 m_vram_bank; |
| 132 | required_shared_ptr<UINT8> m_vram0; |
| 133 | required_shared_ptr<UINT8> m_attr0; |
| 134 | required_shared_ptr<UINT8> m_vram1; |
| 135 | required_shared_ptr<UINT8> m_attr1; |
| 136 | |
| 121 | 137 | UINT8 m_laserdisc_data; |
| 122 | 138 | int m_nmimask; |
| 123 | 139 | DECLARE_WRITE8_MEMBER(rblaster_sound_w); |
| 124 | | DECLARE_WRITE8_MEMBER(rblaster_vram_bank_w); |
| 125 | 140 | DECLARE_READ8_MEMBER(laserdisc_r); |
| 126 | 141 | DECLARE_WRITE8_MEMBER(laserdisc_w); |
| 127 | | DECLARE_READ8_MEMBER(test_r); |
| 142 | DECLARE_READ8_MEMBER(sound_status_r); |
| 128 | 143 | DECLARE_WRITE8_MEMBER(nmimask_w); |
| 144 | DECLARE_WRITE8_MEMBER(decold_sound_cmd_w); |
| 145 | DECLARE_WRITE8_MEMBER(decold_palette_w); |
| 146 | DECLARE_CUSTOM_INPUT_MEMBER(begas_vblank_r); |
| 147 | DECLARE_INPUT_CHANGED_MEMBER(coin_inserted); |
| 129 | 148 | }; |
| 130 | 149 | |
| 150 | static void draw_sprites(running_machine &machine, bitmap_rgb32 &bitmap, const rectangle &cliprect, UINT8 *spriteram, UINT16 tile_bank ) |
| 151 | { |
| 152 | const gfx_element *gfx = machine.gfx[1]; |
| 153 | int i,spr_offs,x,y,col,fx,fy; |
| 131 | 154 | |
| 155 | /* |
| 156 | [+0] ---- -x-- flip X |
| 157 | [+0] ---- --x- flip Y |
| 158 | [+0] ---- ---x enable this sprite |
| 159 | [+1] tile number |
| 160 | [+2] y coord |
| 161 | [+3] x coord |
| 162 | */ |
| 132 | 163 | |
| 133 | | static SCREEN_UPDATE_IND16( rblaster ) |
| 164 | for(i=0;i<0x20;i+=4) |
| 165 | { |
| 166 | if(!spriteram[i+0] & 1) |
| 167 | continue; |
| 168 | |
| 169 | spr_offs = spriteram[i+1]|tile_bank; |
| 170 | x = spriteram[i+3]; |
| 171 | y = spriteram[i+2]; |
| 172 | col = 6; /* TODO */ |
| 173 | fx = (spriteram[i+0] & 0x04) ? 1 : 0; |
| 174 | fy = (spriteram[i+0] & 0x02) ? 1 : 0; |
| 175 | |
| 176 | drawgfx_transpen(bitmap,cliprect,gfx,spr_offs,col,fx,fy,x,y,0); |
| 177 | } |
| 178 | |
| 179 | for(i=0x3e0;i<0x400;i+=4) |
| 180 | { |
| 181 | if(!spriteram[i+0] & 1) |
| 182 | continue; |
| 183 | |
| 184 | spr_offs = spriteram[i+1]|tile_bank; |
| 185 | x = spriteram[i+3]; |
| 186 | y = spriteram[i+2]; |
| 187 | col = 6; /* TODO */ |
| 188 | fx = (spriteram[i+0] & 0x04) ? 1 : 0; |
| 189 | fy = (spriteram[i+0] & 0x02) ? 1 : 0; |
| 190 | |
| 191 | drawgfx_transpen(bitmap,cliprect,gfx,spr_offs,col,fx,fy,x,y,0); |
| 192 | } |
| 193 | } |
| 194 | |
| 195 | static SCREEN_UPDATE_RGB32( rblaster ) |
| 134 | 196 | { |
| 135 | 197 | deco_ld_state *state = screen.machine().driver_data<deco_ld_state>(); |
| 136 | | UINT8 *videoram = state->m_videoram; |
| 137 | 198 | const gfx_element *gfx = screen.machine().gfx[0]; |
| 138 | | int count = 0x0000; |
| 139 | | |
| 140 | 199 | int y,x; |
| 141 | 200 | |
| 201 | bitmap.fill(0, cliprect); |
| 202 | |
| 203 | draw_sprites(screen.machine(), bitmap,cliprect,state->m_vram1,0x000); |
| 204 | draw_sprites(screen.machine(), bitmap,cliprect,state->m_vram0,0x100); |
| 205 | |
| 142 | 206 | for (y=0;y<32;y++) |
| 143 | 207 | { |
| 144 | 208 | for (x=0;x<32;x++) |
| 145 | 209 | { |
| 146 | | int tile = videoram[count]; |
| 147 | | int colour = (state->m_vram_bank & 0x7); |
| 148 | | drawgfx_opaque(bitmap,cliprect,gfx,tile,colour,0,0,x*8,y*8); |
| 210 | int attr = state->m_attr0[x+y*32]; |
| 211 | int tile = state->m_vram0[x+y*32] | ((attr & 3) << 8); |
| 212 | int colour = (6 & 0x7); /* TODO */ |
| 149 | 213 | |
| 150 | | count++; |
| 214 | drawgfx_transpen(bitmap,cliprect,gfx,tile|0x400,colour,0,0,x*8,y*8,0); |
| 151 | 215 | } |
| 152 | 216 | } |
| 153 | 217 | |
| 218 | for (y=0;y<32;y++) |
| 219 | { |
| 220 | for (x=0;x<32;x++) |
| 221 | { |
| 222 | int attr = state->m_attr1[x+y*32]; |
| 223 | int tile = state->m_vram1[x+y*32] | ((attr & 3) << 8); |
| 224 | int colour = (6 & 0x7); /* TODO */ |
| 225 | |
| 226 | drawgfx_transpen(bitmap,cliprect,gfx,tile,colour,0,0,x*8,y*8,0); |
| 227 | } |
| 228 | } |
| 229 | |
| 154 | 230 | return 0; |
| 155 | 231 | } |
| 156 | 232 | |
| 157 | | #if 0 |
| 158 | | WRITE8_MEMBER(deco_ld_state::rblaster_sound_w) |
| 159 | | { |
| 160 | | soundlatch_byte_w(space,0,data); |
| 161 | | device_set_input_line(machine().cpu[1], 0, HOLD_LINE); |
| 162 | | } |
| 163 | | #endif |
| 164 | 233 | |
| 165 | | WRITE8_MEMBER(deco_ld_state::rblaster_vram_bank_w) |
| 166 | | { |
| 167 | | m_vram_bank = data; |
| 168 | | } |
| 169 | 234 | |
| 170 | 235 | READ8_MEMBER(deco_ld_state::laserdisc_r) |
| 171 | 236 | { |
| r15764 | r15765 | |
| 180 | 245 | m_laserdisc_data = data; |
| 181 | 246 | } |
| 182 | 247 | |
| 183 | | READ8_MEMBER(deco_ld_state::test_r) |
| 248 | |
| 249 | WRITE8_MEMBER(deco_ld_state::decold_sound_cmd_w) |
| 184 | 250 | { |
| 185 | | return machine().rand(); |
| 251 | soundlatch_byte_w(space, 0, data); |
| 252 | device_set_input_line(m_audiocpu, 0, HOLD_LINE); |
| 186 | 253 | } |
| 187 | 254 | |
| 188 | | static ADDRESS_MAP_START( begas_map, AS_PROGRAM, 8, deco_ld_state ) |
| 189 | | AM_RANGE(0x0000, 0x0fff) AM_RAM |
| 190 | | // AM_RANGE(0x1000, 0x1007) AM_NOP |
| 191 | | AM_RANGE(0x1000, 0x1000) AM_READ(test_r) |
| 192 | | AM_RANGE(0x1001, 0x1001) AM_READ(test_r) |
| 193 | | AM_RANGE(0x1002, 0x1002) AM_READ(test_r) |
| 194 | | AM_RANGE(0x1003, 0x1003) AM_READ(test_r) |
| 195 | | AM_RANGE(0x1001, 0x1001) AM_WRITENOP //??? |
| 196 | | // AM_RANGE(0x1003, 0x1003) AM_READ_PORT("IN0") |
| 197 | | AM_RANGE(0x1003, 0x1003) AM_WRITE(rblaster_vram_bank_w) //might be 1001 |
| 198 | | AM_RANGE(0x1006, 0x1006) AM_NOP //ld status / command |
| 199 | | AM_RANGE(0x1007, 0x1007) AM_READWRITE(laserdisc_r,laserdisc_w) // ld data |
| 200 | | AM_RANGE(0x1800, 0x1fff) AM_RAM_WRITE(paletteram_RRRGGGBB_byte_w) AM_SHARE("paletteram") |
| 201 | | AM_RANGE(0x2000, 0x27ff) AM_RAM |
| 202 | | AM_RANGE(0x2800, 0x2fff) AM_RAM AM_SHARE("videoram") |
| 203 | | AM_RANGE(0x3000, 0x3fff) AM_RAM |
| 204 | | AM_RANGE(0x4000, 0xffff) AM_ROM |
| 205 | | ADDRESS_MAP_END |
| 255 | /* same as Burger Time HW */ |
| 256 | WRITE8_MEMBER(deco_ld_state::decold_palette_w) |
| 257 | { |
| 258 | paletteram_BBGGGRRR_byte_w(space, offset, ~data); |
| 259 | } |
| 206 | 260 | |
| 207 | | static ADDRESS_MAP_START( cobra_map, AS_PROGRAM, 8, deco_ld_state ) |
| 208 | | AM_RANGE(0x0000, 0x0fff) AM_RAM |
| 209 | | AM_RANGE(0x1000, 0x1000) AM_READ_PORT("IN1") |
| 210 | | AM_RANGE(0x1001, 0x1001) AM_READ(test_r)//_PORT("IN2") |
| 211 | | AM_RANGE(0x1002, 0x1002) AM_READ(test_r)//_PORT("IN3") |
| 212 | | AM_RANGE(0x1003, 0x1003) AM_READ(test_r)//AM_READ_PORT("IN0") |
| 213 | | // AM_RANGE(0x1004, 0x1004) AM_READ(test_r)//_PORT("IN4") |
| 214 | | // AM_RANGE(0x1005, 0x1005) AM_READ(test_r)//_PORT("IN5") |
| 215 | | AM_RANGE(0x1004, 0x1004) AM_WRITE(rblaster_vram_bank_w) //might be 1001 |
| 216 | | AM_RANGE(0x1006, 0x1006) AM_NOP //ld status / command |
| 217 | | AM_RANGE(0x1007, 0x1007) AM_READWRITE(laserdisc_r,laserdisc_w) // ld data |
| 218 | | AM_RANGE(0x1800, 0x1fff) AM_RAM_WRITE(paletteram_RRRGGGBB_byte_w) AM_SHARE("paletteram") |
| 219 | | AM_RANGE(0x2000, 0x2fff) AM_RAM |
| 220 | | AM_RANGE(0x3000, 0x37ff) AM_RAM //vram attr? |
| 221 | | AM_RANGE(0x3800, 0x3fff) AM_RAM AM_SHARE("videoram") |
| 222 | | AM_RANGE(0x4000, 0xffff) AM_ROM |
| 223 | | ADDRESS_MAP_END |
| 261 | /* unknown, but certainly related to audiocpu somehow */ |
| 262 | READ8_MEMBER(deco_ld_state::sound_status_r) |
| 263 | { |
| 264 | return 0xff ^ 0x40; |
| 265 | } |
| 224 | 266 | |
| 225 | | |
| 226 | 267 | static ADDRESS_MAP_START( rblaster_map, AS_PROGRAM, 8, deco_ld_state ) |
| 227 | 268 | AM_RANGE(0x0000, 0x0fff) AM_RAM |
| 228 | | // AM_RANGE(0x1000, 0x1007) AM_NOP |
| 229 | | AM_RANGE(0x1001, 0x1001) AM_WRITENOP //??? |
| 230 | | AM_RANGE(0x1003, 0x1003) AM_READ_PORT("IN0") |
| 231 | | AM_RANGE(0x1003, 0x1003) AM_WRITE(rblaster_vram_bank_w) //might be 1001 |
| 232 | | AM_RANGE(0x1006, 0x1006) AM_NOP //ld status / command |
| 233 | | AM_RANGE(0x1007, 0x1007) AM_READWRITE(laserdisc_r,laserdisc_w) // ld data |
| 234 | | AM_RANGE(0x1800, 0x1fff) AM_RAM_WRITE(paletteram_RRRGGGBB_byte_w) AM_SHARE("paletteram") |
| 235 | | AM_RANGE(0x2800, 0x2fff) AM_RAM AM_SHARE("videoram") |
| 236 | | AM_RANGE(0x3000, 0x3fff) AM_RAM |
| 237 | | AM_RANGE(0xc000, 0xffff) AM_ROM |
| 269 | AM_RANGE(0x1000, 0x1000) AM_READ_PORT("IN0") AM_WRITENOP // (w) coin lockout |
| 270 | AM_RANGE(0x1001, 0x1001) AM_READ_PORT("DSW1") |
| 271 | AM_RANGE(0x1002, 0x1002) AM_READ_PORT("DSW2") |
| 272 | AM_RANGE(0x1003, 0x1003) AM_READ_PORT("IN1") |
| 273 | AM_RANGE(0x1004, 0x1004) AM_READ(soundlatch2_byte_r) AM_WRITE(decold_sound_cmd_w) |
| 274 | AM_RANGE(0x1005, 0x1005) AM_READ(sound_status_r) |
| 275 | AM_RANGE(0x1006, 0x1006) AM_NOP // 6850 status |
| 276 | AM_RANGE(0x1007, 0x1007) AM_READWRITE(laserdisc_r,laserdisc_w) // 6850 data |
| 277 | AM_RANGE(0x1800, 0x1fff) AM_RAM_WRITE(decold_palette_w) AM_SHARE("paletteram") |
| 278 | AM_RANGE(0x2000, 0x27ff) AM_RAM |
| 279 | AM_RANGE(0x2800, 0x2bff) AM_RAM AM_SHARE("vram0") |
| 280 | AM_RANGE(0x2c00, 0x2fff) AM_RAM AM_SHARE("attr0") |
| 281 | AM_RANGE(0x3000, 0x37ff) AM_RAM |
| 282 | AM_RANGE(0x3800, 0x3bff) AM_RAM AM_SHARE("vram1") |
| 283 | AM_RANGE(0x3c00, 0x3fff) AM_RAM AM_SHARE("attr1") |
| 284 | AM_RANGE(0x4000, 0xffff) AM_ROM |
| 238 | 285 | ADDRESS_MAP_END |
| 239 | 286 | |
| 287 | |
| 240 | 288 | /* sound arrangement is pratically identical to Zero Target. */ |
| 241 | 289 | |
| 242 | 290 | #ifdef UNUSED_FUNCTION |
| r15764 | r15765 | |
| 259 | 307 | AM_RANGE(0x4000, 0x4000) AM_DEVWRITE_LEGACY("ay1", ay8910_address_w) |
| 260 | 308 | AM_RANGE(0x6000, 0x6000) AM_DEVWRITE_LEGACY("ay2", ay8910_data_w) |
| 261 | 309 | AM_RANGE(0x8000, 0x8000) AM_DEVWRITE_LEGACY("ay2", ay8910_address_w) |
| 262 | | AM_RANGE(0xa000, 0xa000) AM_READ(soundlatch_byte_r) |
| 310 | AM_RANGE(0xa000, 0xa000) AM_READWRITE(soundlatch_byte_r,soundlatch2_byte_w) |
| 263 | 311 | AM_RANGE(0xe000, 0xffff) AM_ROM |
| 264 | 312 | ADDRESS_MAP_END |
| 265 | 313 | |
| 266 | | static INPUT_PORTS_START( cobra ) |
| 314 | CUSTOM_INPUT_MEMBER( deco_ld_state::begas_vblank_r ) |
| 315 | { |
| 316 | return machine().primary_screen->vpos() >= 240*2; |
| 317 | } |
| 318 | |
| 319 | INPUT_CHANGED_MEMBER(deco_ld_state::coin_inserted) |
| 320 | { |
| 321 | device_set_input_line(m_maincpu, INPUT_LINE_NMI, newval ? CLEAR_LINE : ASSERT_LINE); |
| 322 | } |
| 323 | |
| 324 | static INPUT_PORTS_START( begas ) |
| 267 | 325 | PORT_START("IN0") |
| 268 | | PORT_DIPNAME( 0x01, 0x00, "SYS0" ) |
| 269 | | PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) |
| 270 | | PORT_DIPSETTING( 0x01, DEF_STR( On ) ) |
| 271 | | PORT_DIPNAME( 0x02, 0x00, DEF_STR( Unknown ) ) |
| 272 | | PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) |
| 273 | | PORT_DIPSETTING( 0x02, DEF_STR( On ) ) |
| 274 | | PORT_DIPNAME( 0x04, 0x00, DEF_STR( Unknown ) ) |
| 275 | | PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) |
| 276 | | PORT_DIPSETTING( 0x04, DEF_STR( On ) ) |
| 277 | | PORT_DIPNAME( 0x08, 0x00, DEF_STR( Unknown ) ) |
| 278 | | PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) |
| 279 | | PORT_DIPSETTING( 0x08, DEF_STR( On ) ) |
| 280 | | PORT_DIPNAME( 0x10, 0x00, DEF_STR( Unknown ) ) |
| 281 | | PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) |
| 282 | | PORT_DIPSETTING( 0x10, DEF_STR( On ) ) |
| 283 | | PORT_DIPNAME( 0x20, 0x00, DEF_STR( Unknown ) ) |
| 284 | | PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) |
| 285 | | PORT_DIPSETTING( 0x20, DEF_STR( On ) ) |
| 286 | | PORT_DIPNAME( 0x40, 0x00, DEF_STR( Unknown ) ) |
| 287 | | PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) |
| 288 | | PORT_DIPSETTING( 0x40, DEF_STR( On ) ) |
| 289 | | PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_CUSTOM ) PORT_VBLANK("screen") |
| 326 | PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) |
| 327 | PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) |
| 328 | PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) |
| 329 | PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) |
| 330 | PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON1 ) |
| 331 | PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON2 ) |
| 332 | PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_BUTTON3 ) |
| 333 | PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_TILT ) |
| 290 | 334 | |
| 291 | 335 | PORT_START("IN1") |
| 292 | | PORT_DIPNAME( 0x01, 0x00, "SYS1" ) |
| 293 | | PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) |
| 294 | | PORT_DIPSETTING( 0x01, DEF_STR( On ) ) |
| 295 | | PORT_DIPNAME( 0x02, 0x00, DEF_STR( Unknown ) ) |
| 296 | | PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) |
| 297 | | PORT_DIPSETTING( 0x02, DEF_STR( On ) ) |
| 298 | | PORT_DIPNAME( 0x04, 0x00, DEF_STR( Unknown ) ) |
| 299 | | PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) |
| 300 | | PORT_DIPSETTING( 0x04, DEF_STR( On ) ) |
| 301 | | PORT_DIPNAME( 0x08, 0x00, DEF_STR( Unknown ) ) |
| 302 | | PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) |
| 303 | | PORT_DIPSETTING( 0x08, DEF_STR( On ) ) |
| 304 | | PORT_DIPNAME( 0x10, 0x00, DEF_STR( Unknown ) ) |
| 305 | | PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) |
| 306 | | PORT_DIPSETTING( 0x10, DEF_STR( On ) ) |
| 307 | | PORT_DIPNAME( 0x20, 0x00, DEF_STR( Unknown ) ) |
| 308 | | PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) |
| 309 | | PORT_DIPSETTING( 0x20, DEF_STR( On ) ) |
| 310 | | PORT_DIPNAME( 0x40, 0x00, DEF_STR( Unknown ) ) |
| 311 | | PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) |
| 312 | | PORT_DIPSETTING( 0x40, DEF_STR( On ) ) |
| 313 | | PORT_DIPNAME( 0x80, 0x00, DEF_STR( Unknown ) ) |
| 314 | | PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) |
| 315 | | PORT_DIPSETTING( 0x80, DEF_STR( On ) ) |
| 336 | PORT_DIPNAME( 0x01, 0x01, "DSWA" ) |
| 337 | PORT_DIPSETTING( 0x01, DEF_STR( Off ) ) |
| 338 | PORT_DIPSETTING( 0x00, DEF_STR( On ) ) |
| 339 | PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) ) |
| 340 | PORT_DIPSETTING( 0x02, DEF_STR( Off ) ) |
| 341 | PORT_DIPSETTING( 0x00, DEF_STR( On ) ) |
| 342 | PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) ) |
| 343 | PORT_DIPSETTING( 0x04, DEF_STR( Off ) ) |
| 344 | PORT_DIPSETTING( 0x00, DEF_STR( On ) ) |
| 345 | PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) ) |
| 346 | PORT_DIPSETTING( 0x08, DEF_STR( Off ) ) |
| 347 | PORT_DIPSETTING( 0x00, DEF_STR( On ) ) |
| 348 | PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) ) |
| 349 | PORT_DIPSETTING( 0x10, DEF_STR( Off ) ) |
| 350 | PORT_DIPSETTING( 0x00, DEF_STR( On ) ) |
| 351 | PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) ) |
| 352 | PORT_DIPSETTING( 0x20, DEF_STR( Off ) ) |
| 353 | PORT_DIPSETTING( 0x00, DEF_STR( On ) ) |
| 354 | PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) ) |
| 355 | PORT_DIPSETTING( 0x40, DEF_STR( Off ) ) |
| 356 | PORT_DIPSETTING( 0x00, DEF_STR( On ) ) |
| 357 | PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_CUSTOM_MEMBER(DEVICE_SELF,deco_ld_state,begas_vblank_r, NULL) // TODO: IPT_VBLANK doesn't seem to work fine? |
| 316 | 358 | |
| 317 | | PORT_START("IN2") |
| 318 | | PORT_DIPNAME( 0x01, 0x00, "SYS2" ) |
| 319 | | PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) |
| 320 | | PORT_DIPSETTING( 0x01, DEF_STR( On ) ) |
| 321 | | PORT_DIPNAME( 0x02, 0x00, DEF_STR( Unknown ) ) |
| 322 | | PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) |
| 323 | | PORT_DIPSETTING( 0x02, DEF_STR( On ) ) |
| 324 | | PORT_DIPNAME( 0x04, 0x00, DEF_STR( Unknown ) ) |
| 325 | | PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) |
| 326 | | PORT_DIPSETTING( 0x04, DEF_STR( On ) ) |
| 327 | | PORT_DIPNAME( 0x08, 0x00, DEF_STR( Unknown ) ) |
| 328 | | PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) |
| 329 | | PORT_DIPSETTING( 0x08, DEF_STR( On ) ) |
| 330 | | PORT_DIPNAME( 0x10, 0x00, DEF_STR( Unknown ) ) |
| 331 | | PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) |
| 332 | | PORT_DIPSETTING( 0x10, DEF_STR( On ) ) |
| 333 | | PORT_DIPNAME( 0x20, 0x00, DEF_STR( Unknown ) ) |
| 334 | | PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) |
| 335 | | PORT_DIPSETTING( 0x20, DEF_STR( On ) ) |
| 336 | | PORT_DIPNAME( 0x40, 0x00, DEF_STR( Unknown ) ) |
| 337 | | PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) |
| 338 | | PORT_DIPSETTING( 0x40, DEF_STR( On ) ) |
| 339 | | PORT_DIPNAME( 0x80, 0x00, DEF_STR( Unknown ) ) |
| 340 | | PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) |
| 341 | | PORT_DIPSETTING( 0x80, DEF_STR( On ) ) |
| 359 | PORT_START("DSW1") |
| 360 | PORT_DIPNAME( 0x01, 0x01, "DSWA" ) |
| 361 | PORT_DIPSETTING( 0x01, DEF_STR( Off ) ) |
| 362 | PORT_DIPSETTING( 0x00, DEF_STR( On ) ) |
| 363 | PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) ) |
| 364 | PORT_DIPSETTING( 0x02, DEF_STR( Off ) ) |
| 365 | PORT_DIPSETTING( 0x00, DEF_STR( On ) ) |
| 366 | PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) ) |
| 367 | PORT_DIPSETTING( 0x04, DEF_STR( Off ) ) |
| 368 | PORT_DIPSETTING( 0x00, DEF_STR( On ) ) |
| 369 | PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) ) |
| 370 | PORT_DIPSETTING( 0x08, DEF_STR( Off ) ) |
| 371 | PORT_DIPSETTING( 0x00, DEF_STR( On ) ) |
| 372 | PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_START2 ) |
| 373 | PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_START1 ) |
| 374 | PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_IMPULSE(1) PORT_CHANGED_MEMBER(DEVICE_SELF, deco_ld_state,coin_inserted, 0) |
| 375 | PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_COIN2 ) PORT_IMPULSE(1) PORT_CHANGED_MEMBER(DEVICE_SELF, deco_ld_state,coin_inserted, 0) |
| 342 | 376 | |
| 343 | | PORT_START("IN3") |
| 344 | | PORT_DIPNAME( 0x01, 0x00, "SYS3" ) |
| 345 | | PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) |
| 346 | | PORT_DIPSETTING( 0x01, DEF_STR( On ) ) |
| 347 | | PORT_DIPNAME( 0x02, 0x00, DEF_STR( Unknown ) ) |
| 348 | | PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) |
| 349 | | PORT_DIPSETTING( 0x02, DEF_STR( On ) ) |
| 350 | | PORT_DIPNAME( 0x04, 0x00, DEF_STR( Unknown ) ) |
| 351 | | PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) |
| 352 | | PORT_DIPSETTING( 0x04, DEF_STR( On ) ) |
| 353 | | PORT_DIPNAME( 0x08, 0x00, DEF_STR( Unknown ) ) |
| 354 | | PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) |
| 355 | | PORT_DIPSETTING( 0x08, DEF_STR( On ) ) |
| 356 | | PORT_DIPNAME( 0x10, 0x00, DEF_STR( Unknown ) ) |
| 357 | | PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) |
| 358 | | PORT_DIPSETTING( 0x10, DEF_STR( On ) ) |
| 359 | | PORT_DIPNAME( 0x20, 0x00, DEF_STR( Unknown ) ) |
| 360 | | PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) |
| 361 | | PORT_DIPSETTING( 0x20, DEF_STR( On ) ) |
| 362 | | PORT_DIPNAME( 0x40, 0x00, DEF_STR( Unknown ) ) |
| 363 | | PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) |
| 364 | | PORT_DIPSETTING( 0x40, DEF_STR( On ) ) |
| 365 | | PORT_DIPNAME( 0x80, 0x00, DEF_STR( Unknown ) ) |
| 366 | | PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) |
| 367 | | PORT_DIPSETTING( 0x80, DEF_STR( On ) ) |
| 377 | PORT_START("DSW2") |
| 378 | PORT_DIPNAME( 0x01, 0x01, "DSWA" ) |
| 379 | PORT_DIPSETTING( 0x01, DEF_STR( Off ) ) |
| 380 | PORT_DIPSETTING( 0x00, DEF_STR( On ) ) |
| 381 | PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) ) |
| 382 | PORT_DIPSETTING( 0x02, DEF_STR( Off ) ) |
| 383 | PORT_DIPSETTING( 0x00, DEF_STR( On ) ) |
| 384 | PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) ) |
| 385 | PORT_DIPSETTING( 0x04, DEF_STR( Off ) ) |
| 386 | PORT_DIPSETTING( 0x00, DEF_STR( On ) ) |
| 387 | PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) ) |
| 388 | PORT_DIPSETTING( 0x08, DEF_STR( Off ) ) |
| 389 | PORT_DIPSETTING( 0x00, DEF_STR( On ) ) |
| 390 | PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) ) |
| 391 | PORT_DIPSETTING( 0x10, DEF_STR( Off ) ) |
| 392 | PORT_DIPSETTING( 0x00, DEF_STR( On ) ) |
| 393 | PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) ) |
| 394 | PORT_DIPSETTING( 0x20, DEF_STR( Off ) ) |
| 395 | PORT_DIPSETTING( 0x00, DEF_STR( On ) ) |
| 396 | PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) ) |
| 397 | PORT_DIPSETTING( 0x40, DEF_STR( Off ) ) |
| 398 | PORT_DIPSETTING( 0x00, DEF_STR( On ) ) |
| 399 | PORT_DIPNAME( 0x80, 0x80, DEF_STR( Service_Mode ) ) |
| 400 | PORT_DIPSETTING( 0x80, DEF_STR( Off ) ) |
| 401 | PORT_DIPSETTING( 0x00, DEF_STR( On ) ) |
| 402 | INPUT_PORTS_END |
| 368 | 403 | |
| 369 | | PORT_START("IN4") |
| 370 | | PORT_DIPNAME( 0x01, 0x00, "SYS4" ) |
| 371 | | PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) |
| 372 | | PORT_DIPSETTING( 0x01, DEF_STR( On ) ) |
| 373 | | PORT_DIPNAME( 0x02, 0x00, DEF_STR( Unknown ) ) |
| 374 | | PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) |
| 375 | | PORT_DIPSETTING( 0x02, DEF_STR( On ) ) |
| 376 | | PORT_DIPNAME( 0x04, 0x00, DEF_STR( Unknown ) ) |
| 377 | | PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) |
| 378 | | PORT_DIPSETTING( 0x04, DEF_STR( On ) ) |
| 379 | | PORT_DIPNAME( 0x08, 0x00, DEF_STR( Unknown ) ) |
| 380 | | PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) |
| 381 | | PORT_DIPSETTING( 0x08, DEF_STR( On ) ) |
| 382 | | PORT_DIPNAME( 0x10, 0x00, DEF_STR( Unknown ) ) |
| 383 | | PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) |
| 384 | | PORT_DIPSETTING( 0x10, DEF_STR( On ) ) |
| 385 | | PORT_DIPNAME( 0x20, 0x00, DEF_STR( Unknown ) ) |
| 386 | | PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) |
| 387 | | PORT_DIPSETTING( 0x20, DEF_STR( On ) ) |
| 388 | | PORT_DIPNAME( 0x40, 0x00, DEF_STR( Unknown ) ) |
| 389 | | PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) |
| 390 | | PORT_DIPSETTING( 0x40, DEF_STR( On ) ) |
| 391 | | PORT_DIPNAME( 0x80, 0x00, DEF_STR( Unknown ) ) |
| 392 | | PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) |
| 393 | | PORT_DIPSETTING( 0x80, DEF_STR( On ) ) |
| 394 | 404 | |
| 395 | | PORT_START("IN5") |
| 396 | | PORT_DIPNAME( 0x01, 0x00, "SYS5" ) |
| 397 | | PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) |
| 398 | | PORT_DIPSETTING( 0x01, DEF_STR( On ) ) |
| 399 | | PORT_DIPNAME( 0x02, 0x00, DEF_STR( Unknown ) ) |
| 400 | | PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) |
| 401 | | PORT_DIPSETTING( 0x02, DEF_STR( On ) ) |
| 402 | | PORT_DIPNAME( 0x04, 0x00, DEF_STR( Unknown ) ) |
| 403 | | PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) |
| 404 | | PORT_DIPSETTING( 0x04, DEF_STR( On ) ) |
| 405 | | PORT_DIPNAME( 0x08, 0x00, DEF_STR( Unknown ) ) |
| 406 | | PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) |
| 407 | | PORT_DIPSETTING( 0x08, DEF_STR( On ) ) |
| 408 | | PORT_DIPNAME( 0x10, 0x00, DEF_STR( Unknown ) ) |
| 409 | | PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) |
| 410 | | PORT_DIPSETTING( 0x10, DEF_STR( On ) ) |
| 411 | | PORT_DIPNAME( 0x20, 0x00, DEF_STR( Unknown ) ) |
| 412 | | PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) |
| 413 | | PORT_DIPSETTING( 0x20, DEF_STR( On ) ) |
| 414 | | PORT_DIPNAME( 0x40, 0x00, DEF_STR( Unknown ) ) |
| 415 | | PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) |
| 416 | | PORT_DIPSETTING( 0x40, DEF_STR( On ) ) |
| 417 | | PORT_DIPNAME( 0x80, 0x00, DEF_STR( Unknown ) ) |
| 418 | | PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) |
| 419 | | PORT_DIPSETTING( 0x80, DEF_STR( On ) ) |
| 405 | static INPUT_PORTS_START( cobra ) |
| 406 | PORT_INCLUDE( begas ) |
| 407 | |
| 408 | PORT_MODIFY("IN1") |
| 409 | PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_CUSTOM ) PORT_VBLANK("screen") |
| 410 | |
| 411 | /* TODO: dips */ |
| 420 | 412 | INPUT_PORTS_END |
| 421 | 413 | |
| 422 | 414 | static INPUT_PORTS_START( rblaster ) |
| 423 | | PORT_START("IN0") |
| 424 | | PORT_DIPNAME( 0x01, 0x00, "SYS0" ) |
| 425 | | PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) |
| 426 | | PORT_DIPSETTING( 0x01, DEF_STR( On ) ) |
| 427 | | PORT_DIPNAME( 0x02, 0x00, DEF_STR( Unknown ) ) |
| 428 | | PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) |
| 429 | | PORT_DIPSETTING( 0x02, DEF_STR( On ) ) |
| 430 | | PORT_DIPNAME( 0x04, 0x00, DEF_STR( Unknown ) ) |
| 431 | | PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) |
| 432 | | PORT_DIPSETTING( 0x04, DEF_STR( On ) ) |
| 433 | | PORT_DIPNAME( 0x08, 0x00, DEF_STR( Unknown ) ) |
| 434 | | PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) |
| 435 | | PORT_DIPSETTING( 0x08, DEF_STR( On ) ) |
| 436 | | PORT_DIPNAME( 0x10, 0x00, DEF_STR( Unknown ) ) |
| 437 | | PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) |
| 438 | | PORT_DIPSETTING( 0x10, DEF_STR( On ) ) |
| 439 | | PORT_DIPNAME( 0x20, 0x00, DEF_STR( Unknown ) ) |
| 440 | | PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) |
| 441 | | PORT_DIPSETTING( 0x20, DEF_STR( On ) ) |
| 442 | | PORT_DIPNAME( 0x40, 0x00, DEF_STR( Unknown ) ) |
| 443 | | PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) |
| 444 | | PORT_DIPSETTING( 0x40, DEF_STR( On ) ) |
| 415 | PORT_INCLUDE( begas ) |
| 416 | |
| 417 | PORT_MODIFY("IN1") |
| 445 | 418 | PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_CUSTOM ) PORT_VBLANK("screen") |
| 446 | 419 | |
| 447 | | PORT_START("IN1") |
| 448 | | PORT_DIPNAME( 0x01, 0x00, "SYS1" ) |
| 449 | | PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) |
| 450 | | PORT_DIPSETTING( 0x01, DEF_STR( On ) ) |
| 451 | | PORT_DIPNAME( 0x02, 0x00, DEF_STR( Unknown ) ) |
| 452 | | PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) |
| 453 | | PORT_DIPSETTING( 0x02, DEF_STR( On ) ) |
| 454 | | PORT_DIPNAME( 0x04, 0x00, DEF_STR( Unknown ) ) |
| 455 | | PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) |
| 456 | | PORT_DIPSETTING( 0x04, DEF_STR( On ) ) |
| 457 | | PORT_DIPNAME( 0x08, 0x00, DEF_STR( Unknown ) ) |
| 458 | | PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) |
| 459 | | PORT_DIPSETTING( 0x08, DEF_STR( On ) ) |
| 460 | | PORT_DIPNAME( 0x10, 0x00, DEF_STR( Unknown ) ) |
| 461 | | PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) |
| 462 | | PORT_DIPSETTING( 0x10, DEF_STR( On ) ) |
| 463 | | PORT_DIPNAME( 0x20, 0x00, DEF_STR( Unknown ) ) |
| 464 | | PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) |
| 465 | | PORT_DIPSETTING( 0x20, DEF_STR( On ) ) |
| 466 | | PORT_DIPNAME( 0x40, 0x00, DEF_STR( Unknown ) ) |
| 467 | | PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) |
| 468 | | PORT_DIPSETTING( 0x40, DEF_STR( On ) ) |
| 469 | | PORT_DIPNAME( 0x80, 0x00, DEF_STR( Unknown ) ) |
| 470 | | PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) |
| 471 | | PORT_DIPSETTING( 0x80, DEF_STR( On ) ) |
| 472 | | |
| 473 | | PORT_START("IN2") |
| 474 | | PORT_DIPNAME( 0x01, 0x00, "SYS2" ) |
| 475 | | PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) |
| 476 | | PORT_DIPSETTING( 0x01, DEF_STR( On ) ) |
| 477 | | PORT_DIPNAME( 0x02, 0x00, DEF_STR( Unknown ) ) |
| 478 | | PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) |
| 479 | | PORT_DIPSETTING( 0x02, DEF_STR( On ) ) |
| 480 | | PORT_DIPNAME( 0x04, 0x00, DEF_STR( Unknown ) ) |
| 481 | | PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) |
| 482 | | PORT_DIPSETTING( 0x04, DEF_STR( On ) ) |
| 483 | | PORT_DIPNAME( 0x08, 0x00, DEF_STR( Unknown ) ) |
| 484 | | PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) |
| 485 | | PORT_DIPSETTING( 0x08, DEF_STR( On ) ) |
| 486 | | PORT_DIPNAME( 0x10, 0x00, DEF_STR( Unknown ) ) |
| 487 | | PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) |
| 488 | | PORT_DIPSETTING( 0x10, DEF_STR( On ) ) |
| 489 | | PORT_DIPNAME( 0x20, 0x00, DEF_STR( Unknown ) ) |
| 490 | | PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) |
| 491 | | PORT_DIPSETTING( 0x20, DEF_STR( On ) ) |
| 492 | | PORT_DIPNAME( 0x40, 0x00, DEF_STR( Unknown ) ) |
| 493 | | PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) |
| 494 | | PORT_DIPSETTING( 0x40, DEF_STR( On ) ) |
| 495 | | PORT_DIPNAME( 0x80, 0x00, DEF_STR( Unknown ) ) |
| 496 | | PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) |
| 497 | | PORT_DIPSETTING( 0x80, DEF_STR( On ) ) |
| 420 | /* TODO: dips */ |
| 498 | 421 | INPUT_PORTS_END |
| 499 | 422 | |
| 500 | 423 | static const gfx_layout charlayout = |
| r15764 | r15765 | |
| 502 | 425 | 8,8, |
| 503 | 426 | RGN_FRAC(1,3), |
| 504 | 427 | 3, |
| 505 | | { RGN_FRAC(0,3),RGN_FRAC(1,3),RGN_FRAC(2,3) }, |
| 428 | { RGN_FRAC(2,3),RGN_FRAC(1,3),RGN_FRAC(0,3) }, |
| 506 | 429 | { 7, 6, 5, 4, 3, 2, 1, 0 }, |
| 507 | 430 | { 7*8, 6*8, 5*8, 4*8, 3*8, 2*8, 1*8, 0*8 }, |
| 508 | 431 | 8*8 |
| 509 | 432 | }; |
| 510 | 433 | |
| 434 | |
| 435 | static const gfx_layout spritelayout = |
| 436 | { |
| 437 | 16,16, |
| 438 | RGN_FRAC(1,3), |
| 439 | 3, |
| 440 | { RGN_FRAC(2,3),RGN_FRAC(1,3),RGN_FRAC(0,3) }, |
| 441 | { 7, 6, 5, 4, 3, 2, 1, 0, 16*8+7, 16*8+6, 16*8+5, 16*8+4, 16*8+3, 16*8+2, 16*8+1, 16*8+0 }, |
| 442 | { 15*8, 14*8, 13*8, 12*8, 11*8, 10*8, 9*8, 8*8, |
| 443 | 7*8, 6*8, 5*8, 4*8, 3*8, 2*8, 1*8, 0*8 }, |
| 444 | 16*16 |
| 445 | }; |
| 446 | |
| 511 | 447 | static GFXDECODE_START( rblaster ) |
| 512 | 448 | GFXDECODE_ENTRY( "gfx1", 0, charlayout, 0, 8 ) |
| 449 | GFXDECODE_ENTRY( "gfx1", 0, spritelayout, 0, 8 ) |
| 513 | 450 | GFXDECODE_END |
| 514 | 451 | |
| 515 | 452 | static MACHINE_START( rblaster ) |
| r15764 | r15765 | |
| 521 | 458 | /* basic machine hardware */ |
| 522 | 459 | MCFG_CPU_ADD("maincpu",M6502,8000000/2) |
| 523 | 460 | MCFG_CPU_PROGRAM_MAP(rblaster_map) |
| 524 | | // MCFG_CPU_VBLANK_INT("screen",irq0_line_hold) |
| 525 | | MCFG_CPU_VBLANK_INT("screen",nmi_line_pulse) |
| 461 | MCFG_CPU_VBLANK_INT("screen",irq0_line_hold) |
| 526 | 462 | |
| 527 | 463 | MCFG_CPU_ADD("audiocpu",M6502,8000000/2) |
| 528 | 464 | MCFG_CPU_PROGRAM_MAP(rblaster_sound_map) |
| 529 | | // MCFG_CPU_VBLANK_INT("screen",irq0_line_hold) //test |
| 530 | 465 | MCFG_CPU_PERIODIC_INT(sound_interrupt, 640) |
| 531 | 466 | |
| 467 | // MCFG_QUANTUM_TIME(attotime::from_hz(6000)) |
| 468 | |
| 532 | 469 | MCFG_LASERDISC_LDV1000_ADD("laserdisc") //Sony LDP-1000A, is it truly compatible with the Pioneer? |
| 533 | 470 | MCFG_LASERDISC_OVERLAY_STATIC(256, 256, rblaster) |
| 471 | MCFG_LASERDISC_OVERLAY_CLIP(0, 256-1, 8, 240-1) |
| 534 | 472 | |
| 535 | 473 | /* video hardware */ |
| 536 | 474 | MCFG_LASERDISC_SCREEN_ADD_NTSC("screen", "laserdisc") |
| r15764 | r15765 | |
| 539 | 477 | MCFG_MACHINE_START(rblaster) |
| 540 | 478 | |
| 541 | 479 | /* sound hardware */ |
| 480 | /* TODO: mixing */ |
| 542 | 481 | MCFG_SPEAKER_STANDARD_STEREO("lspeaker", "rspeaker") |
| 543 | 482 | MCFG_SOUND_ADD("ay1", AY8910, 1500000) |
| 544 | | MCFG_SOUND_ROUTE(ALL_OUTPUTS, "lspeaker", 0.50) |
| 483 | MCFG_SOUND_ROUTE(ALL_OUTPUTS, "lspeaker", 0.25) |
| 484 | MCFG_SOUND_ROUTE(ALL_OUTPUTS, "rspeaker", 0.25) |
| 545 | 485 | |
| 546 | 486 | MCFG_SOUND_ADD("ay2", AY8910, 1500000) |
| 547 | | MCFG_SOUND_ROUTE(ALL_OUTPUTS, "rspeaker", 0.50) |
| 487 | MCFG_SOUND_ROUTE(ALL_OUTPUTS, "lspeaker", 0.25) |
| 488 | MCFG_SOUND_ROUTE(ALL_OUTPUTS, "rspeaker", 0.25) |
| 548 | 489 | |
| 549 | 490 | MCFG_SOUND_MODIFY("laserdisc") |
| 550 | 491 | MCFG_SOUND_ROUTE(0, "lspeaker", 1.0) |
| 551 | 492 | MCFG_SOUND_ROUTE(1, "rspeaker", 1.0) |
| 552 | 493 | MACHINE_CONFIG_END |
| 553 | 494 | |
| 554 | | static MACHINE_CONFIG_DERIVED( begas, rblaster ) |
| 555 | | MCFG_CPU_MODIFY("maincpu") |
| 556 | | MCFG_CPU_PROGRAM_MAP(begas_map) |
| 557 | | MACHINE_CONFIG_END |
| 558 | | |
| 559 | | static MACHINE_CONFIG_DERIVED( cobra, rblaster ) |
| 560 | | MCFG_CPU_MODIFY("maincpu") |
| 561 | | MCFG_CPU_PROGRAM_MAP(cobra_map) |
| 562 | | |
| 563 | | MCFG_DEVICE_REMOVE("audiocpu") |
| 564 | | MACHINE_CONFIG_END |
| 565 | | |
| 566 | 495 | /*************************************************************************** |
| 567 | 496 | |
| 568 | 497 | Game driver(s) |
| r15764 | r15765 | |
| 575 | 504 | ROM_LOAD( "an04-3", 0x6000, 0x2000, CRC(935b2b0a) SHA1(e7c09960607569bd88e9af396aa70661f4352efb) ) |
| 576 | 505 | ROM_LOAD( "an03-3", 0x8000, 0x2000, CRC(79438d80) SHA1(e641336f23c6b84d84313ef3e94871ac9aa8b612) ) |
| 577 | 506 | ROM_LOAD( "an02-3", 0xa000, 0x2000, CRC(98ce4ca0) SHA1(e7db66b1f0f06b0a21e7450962ba70f460a24847) ) |
| 578 | | ROM_LOAD( "an01", 0xc000, 0x2000, CRC(15f8921d) SHA1(32f945bee8f30e5896da38ac6184a11c0a8194bb) ) //ok? |
| 507 | ROM_LOAD( "an01", 0xc000, 0x2000, CRC(15f8921d) SHA1(32f945bee8f30e5896da38ac6184a11c0a8194bb) ) |
| 579 | 508 | ROM_LOAD( "an00-3", 0xe000, 0x2000, CRC(124a3a36) SHA1(e2f7110196cb46fcda429c613388285b46ec1a9e) ) |
| 580 | 509 | |
| 581 | 510 | ROM_REGION( 0x10000, "audiocpu", 0 ) |
| 582 | 511 | ROM_LOAD( "an06", 0xe000, 0x2000, CRC(cbbcd730) SHA1(2f2e78fcf2eba71044bec60d27d8756d9b5af551) ) |
| 583 | 512 | |
| 584 | | ROM_REGION( 0xc000, "gfx1", ROMREGION_INVERT ) |
| 513 | ROM_REGION( 0xc000, "gfx1", 0 ) |
| 585 | 514 | ROM_LOAD( "an0a", 0x0000, 0x2000, CRC(e429305d) SHA1(9a05ab7916235d028b6b05270703516581825660) ) |
| 586 | 515 | ROM_LOAD( "an0b", 0x4000, 0x2000, CRC(09e4b780) SHA1(0735420b8529017e507feecf8f74fecd80fbf7d5) ) |
| 587 | 516 | ROM_LOAD( "an0c", 0x8000, 0x2000, CRC(0c127207) SHA1(b8372b2fa20ffe5ac278f558c07fd761c86e514b) ) |
| r15764 | r15765 | |
| 618 | 547 | ROM_REGION( 0x10000, "audiocpu", 0 ) |
| 619 | 548 | ROM_LOAD( "an06", 0xe000, 0x2000, CRC(cbbcd730) SHA1(2f2e78fcf2eba71044bec60d27d8756d9b5af551) ) |
| 620 | 549 | |
| 621 | | ROM_REGION( 0xc000, "gfx1", ROMREGION_INVERT ) |
| 550 | ROM_REGION( 0xc000, "gfx1", 0 ) |
| 622 | 551 | ROM_LOAD( "an0a", 0x0000, 0x2000, CRC(e429305d) SHA1(9a05ab7916235d028b6b05270703516581825660) ) |
| 623 | 552 | ROM_LOAD( "an0b", 0x4000, 0x2000, CRC(09e4b780) SHA1(0735420b8529017e507feecf8f74fecd80fbf7d5) ) |
| 624 | 553 | ROM_LOAD( "an0c", 0x8000, 0x2000, CRC(0c127207) SHA1(b8372b2fa20ffe5ac278f558c07fd761c86e514b) ) |
| r15764 | r15765 | |
| 651 | 580 | ROM_REGION( 0x10000, "audiocpu", 0 ) |
| 652 | 581 | ROM_LOAD( "02.bin", 0xe000, 0x2000, CRC(6c20335d) SHA1(b28e80f112553af8e3fba9ebbfc10d1f56396ac1) ) |
| 653 | 582 | |
| 654 | | ROM_REGION( 0xc000, "gfx1", ROMREGION_INVERT ) |
| 583 | ROM_REGION( 0xc000, "gfx1", 0 ) |
| 655 | 584 | ROM_LOAD( "03.bin", 0x0000, 0x2000, CRC(d1ff5ffb) SHA1(29df207e225e3b0477d5566d256198310d6ae526) ) |
| 656 | 585 | ROM_LOAD( "06.bin", 0x2000, 0x2000, CRC(d1ff5ffb) SHA1(29df207e225e3b0477d5566d256198310d6ae526) ) |
| 657 | 586 | ROM_LOAD( "04.bin", 0x4000, 0x2000, CRC(da2c84d9) SHA1(3452b0e2a45fa771e226c3a3668afbf3ceb0ec11) ) |
| r15764 | r15765 | |
| 671 | 600 | ROM_LOAD( "au00-2", 0xe000, 0x2000, CRC(6c0f1f16) SHA1(ed05d3eaa24e84b1dfb4e1eb5f69b23e4a1494ba) ) |
| 672 | 601 | ROM_COPY( "maincpu", 0x8000, 0x4000, 0x4000 ) |
| 673 | 602 | |
| 674 | | ROM_REGION( 0xc000, "gfx1", ROMREGION_INVERT ) |
| 603 | ROM_REGION( 0x10000, "audiocpu", 0 ) |
| 604 | ROM_LOAD( "au06", 0xe000, 0x2000, CRC(ccc94eb0) SHA1(354a933ddc6a1e1118c2bf176faaab5d01fc92d3) ) |
| 605 | |
| 606 | ROM_REGION( 0xc000, "gfx1", 0 ) |
| 675 | 607 | ROM_LOAD( "au0a", 0x0000, 0x2000, CRC(6aaedcf3) SHA1(52dc913eecf8a159784d500217cffd7a6d8eb45c) ) |
| 676 | 608 | ROM_LOAD( "au0b", 0x4000, 0x2000, CRC(92247877) SHA1(f9bb0c20212ab13caabfb5beb9b6afc807bc9555) ) |
| 677 | 609 | ROM_LOAD( "au0c", 0x8000, 0x2000, CRC(d00a2762) SHA1(84d4329b39b9fd30682b7efa5cb2744934c5ee5c) ) |
| r15764 | r15765 | |
| 684 | 616 | DISK_IMAGE_READONLY( "cobra", 0, SHA1(8390498294aca97a5d1769032e7b115d1a42f5d3) ) |
| 685 | 617 | ROM_END |
| 686 | 618 | |
| 687 | | GAME( 1983, begas, 0, begas, cobra, deco_ld_state, 0, ROT0, "Data East", "Bega's Battle (Revision 3)", GAME_NOT_WORKING ) |
| 688 | | GAME( 1983, begas1, begas, rblaster, cobra, deco_ld_state, 0, ROT0, "Data East", "Bega's Battle (Revision 1)", GAME_NOT_WORKING ) |
| 689 | | GAME( 1984, cobra, 0, cobra, cobra, deco_ld_state, 0, ROT0, "Data East", "Cobra Command (Data East LD)", GAME_NOT_WORKING ) |
| 619 | GAME( 1983, begas, 0, rblaster, begas, deco_ld_state, 0, ROT0, "Data East", "Bega's Battle (Revision 3)", GAME_NOT_WORKING ) |
| 620 | GAME( 1983, begas1, begas, rblaster, begas, deco_ld_state, 0, ROT0, "Data East", "Bega's Battle (Revision 1)", GAME_NOT_WORKING ) |
| 621 | GAME( 1984, cobra, 0, rblaster, cobra, deco_ld_state, 0, ROT0, "Data East", "Cobra Command (Data East LD)", GAME_NOT_WORKING ) |
| 690 | 622 | // Thunder Storm (Cobra Command Japanese version) |
| 691 | 623 | GAME( 1985, rblaster, 0, rblaster, rblaster, deco_ld_state, 0, ROT0, "Data East", "Road Blaster (Data East LD)", GAME_NOT_WORKING ) |
src/mame/drivers/invqix.c
| r15764 | r15765 | |
| 62 | 62 | The other has the secondary label 351100210 with a serial number labeled: |
| 63 | 63 | S/N: SIURxxxx (xxxx=number of PCB) |
| 64 | 64 | SPACE INVADERS U/R |
| 65 | | |
| 65 | |
| 66 | 66 | Memory map: |
| 67 | 67 | 000000-1fffff: program ROM |
| 68 | | 200000-20ffff: VRAM? |
| 69 | | 400000-400001: ??? (M5296 Watchdog??) |
| 70 | | 600000-61ffff: work RAM? |
| 68 | 200000-20ffff: Work RAM |
| 69 | 400000-400003: OKIM9810 |
| 70 | 600000-61ffff: VRAM |
| 71 | 620000-620005: video registers |
| 71 | 72 | |
| 72 | 73 | I/O map: |
| 73 | | port 2 bit 6: FPGA chip select |
| 74 | port 1: player 2 inputs |
| 75 | |
| 76 | port 2 bit 3: must be "1" to avoid SERVICE ERROR |
| 77 | port 2 bit 6: FPGA chip select |
| 74 | 78 | port 2 bit 7: FPGA clock in |
| 75 | | |
| 79 | |
| 76 | 80 | port 3 bit 0: FPGA status (1 for ready) |
| 77 | 81 | port 3 bit 1: FPGA download successful (1 if OK, 0 if failed) |
| 78 | 82 | port 3 bit 2: EEPROM chip select |
| r15764 | r15765 | |
| 80 | 84 | port 3 bit 4: EEPROM data to EEPROM |
| 81 | 85 | port 3 bit 5: EEPROM data from EEPROM |
| 82 | 86 | |
| 87 | port 4: player 1 inputs |
| 88 | |
| 83 | 89 | port 6 bit 3: FPGA data bit in |
| 84 | | |
| 85 | | port G bit 0: framebuffer bank select? toggled each frame |
| 86 | | |
| 90 | |
| 91 | port G bit 0: watchdog (toggled each frame) |
| 92 | |
| 87 | 93 | IRQ0 and IRQ1 are valid. Mainline explicitly waits on IRQ1, but IRQ0 does a ton of processing. |
| 88 | 94 | No other IRQ vectors are valid. |
| 89 | | |
| 95 | |
| 90 | 96 | main loop at 117ea: |
| 91 | 97 | 117ea: jsr WaitForIRQ1 |
| 92 | 98 | 117ee: jsr ToggleBit0OfPortG |
| 93 | 99 | 117f2: jsr 11306 |
| 94 | 100 | 117f6: jsr 1918 |
| 95 | 101 | 117fa: bra 117ea |
| 96 | | |
| 102 | |
| 97 | 103 | ***************************************************************************/ |
| 98 | 104 | |
| 99 | 105 | #include "emu.h" |
| r15764 | r15765 | |
| 107 | 113 | invqix_state(const machine_config &mconfig, device_type type, const char *tag) |
| 108 | 114 | : driver_device(mconfig, type, tag), |
| 109 | 115 | m_maincpu(*this, "maincpu"), |
| 110 | | m_eeprom(*this, "eeprom") |
| 116 | m_eeprom(*this, "eeprom"), |
| 117 | m_vram(*this, "vram") |
| 111 | 118 | { } |
| 112 | 119 | |
| 113 | 120 | UINT32 screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect); |
| 114 | 121 | |
| 115 | | DECLARE_READ8_MEMBER(port1_r); |
| 116 | | DECLARE_READ8_MEMBER(port2_r); |
| 117 | | DECLARE_WRITE8_MEMBER(port2_w); |
| 118 | 122 | DECLARE_READ8_MEMBER(port3_r); |
| 119 | 123 | DECLARE_WRITE8_MEMBER(port3_w); |
| 124 | DECLARE_READ8_MEMBER(port5_r); |
| 125 | DECLARE_WRITE8_MEMBER(port5_w); |
| 120 | 126 | DECLARE_READ8_MEMBER(port6_r); |
| 121 | 127 | DECLARE_WRITE8_MEMBER(port6_w); |
| 122 | 128 | DECLARE_READ8_MEMBER(porta_r); |
| 129 | DECLARE_READ8_MEMBER(portg_r); |
| 123 | 130 | |
| 131 | DECLARE_WRITE16_MEMBER(vctl_w); |
| 132 | |
| 124 | 133 | protected: |
| 125 | | |
| 126 | 134 | // devices |
| 127 | 135 | required_device<cpu_device> m_maincpu; |
| 128 | 136 | required_device<eeprom_device> m_eeprom; |
| 137 | required_shared_ptr<UINT16> m_vram; |
| 129 | 138 | |
| 130 | 139 | // driver_device overrides |
| 131 | 140 | virtual void video_start(); |
| 141 | |
| 142 | private: |
| 143 | UINT16 m_vctl; // 0000 for normal, 0001 for flip, 0100 when going to change (blank?) |
| 132 | 144 | }; |
| 133 | 145 | |
| 134 | 146 | |
| r15764 | r15765 | |
| 138 | 150 | |
| 139 | 151 | UINT32 invqix_state::screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect) |
| 140 | 152 | { |
| 141 | | return 0; |
| 142 | | } |
| 153 | int x,y; |
| 143 | 154 | |
| 144 | | READ8_MEMBER(invqix_state::port1_r) |
| 145 | | { |
| 146 | | return 0xff; |
| 147 | | } |
| 155 | // this means freeze or blank or something |
| 156 | if (m_vctl == 0x100) |
| 157 | { |
| 158 | return 0; |
| 159 | } |
| 148 | 160 | |
| 149 | | READ8_MEMBER(invqix_state::port2_r) |
| 150 | | { |
| 151 | | return 1; |
| 152 | | } |
| 161 | if (m_vctl == 0x0000) |
| 162 | { |
| 163 | for(y=0;y<256;y++) |
| 164 | { |
| 165 | for(x=0;x<256;x++) |
| 166 | { |
| 167 | UINT8 r,g,b; |
| 168 | int pen_data; |
| 153 | 169 | |
| 154 | | WRITE8_MEMBER(invqix_state::port2_w) |
| 155 | | { |
| 170 | pen_data = (m_vram[(x+y*256)]); |
| 171 | b = (pen_data & 0x001f); |
| 172 | g = (pen_data & 0x03e0) >> 5; |
| 173 | r = (pen_data & 0x7c00) >> 10; |
| 174 | r = (r << 3) | (r & 0x7); |
| 175 | g = (g << 3) | (g & 0x7); |
| 176 | b = (b << 3) | (b & 0x7); |
| 156 | 177 | |
| 178 | if(cliprect.contains(x, y)) |
| 179 | bitmap.pix32(y, x) = r << 16 | g << 8 | b; |
| 180 | } |
| 181 | } |
| 182 | } |
| 183 | else if (m_vctl == 0x0001) // flip |
| 184 | { |
| 185 | for(y=0;y<256;y++) |
| 186 | { |
| 187 | for(x=0;x<256;x++) |
| 188 | { |
| 189 | UINT8 r,g,b; |
| 190 | int pen_data; |
| 191 | |
| 192 | pen_data = (m_vram[(256-x)+((256-y)*256)]); |
| 193 | b = (pen_data & 0x001f); |
| 194 | g = (pen_data & 0x03e0) >> 5; |
| 195 | r = (pen_data & 0x7c00) >> 10; |
| 196 | r = (r << 3) | (r & 0x7); |
| 197 | g = (g << 3) | (g & 0x7); |
| 198 | b = (b << 3) | (b & 0x7); |
| 199 | |
| 200 | if(cliprect.contains(x, y)) |
| 201 | bitmap.pix32(y, x) = r << 16 | g << 8 | b; |
| 202 | } |
| 203 | } |
| 204 | } |
| 205 | else |
| 206 | { |
| 207 | logerror("invqix: Unhandled vctl %04x\n", m_vctl); |
| 208 | } |
| 209 | |
| 210 | return 0; |
| 157 | 211 | } |
| 158 | 212 | |
| 159 | 213 | READ8_MEMBER(invqix_state::port3_r) |
| r15764 | r15765 | |
| 168 | 222 | m_eeprom->set_clock_line((data >> 3) & 1); |
| 169 | 223 | } |
| 170 | 224 | |
| 225 | READ8_MEMBER(invqix_state::port5_r) |
| 226 | { |
| 227 | return 0; |
| 228 | } |
| 229 | |
| 230 | WRITE8_MEMBER(invqix_state::port5_w) |
| 231 | { |
| 232 | } |
| 233 | |
| 171 | 234 | READ8_MEMBER(invqix_state::port6_r) |
| 172 | 235 | { |
| 173 | 236 | return 0; |
| r15764 | r15765 | |
| 175 | 238 | |
| 176 | 239 | WRITE8_MEMBER(invqix_state::port6_w) |
| 177 | 240 | { |
| 178 | | |
| 179 | 241 | } |
| 180 | 242 | |
| 181 | 243 | READ8_MEMBER(invqix_state::porta_r) |
| 182 | 244 | { |
| 183 | | return 0xff; |
| 245 | return 0xf0; |
| 184 | 246 | } |
| 185 | 247 | |
| 186 | | static ADDRESS_MAP_START(invqix_prg_map, AS_PROGRAM, 32, invqix_state) |
| 248 | READ8_MEMBER(invqix_state::portg_r) |
| 249 | { |
| 250 | return 0; |
| 251 | } |
| 252 | |
| 253 | WRITE16_MEMBER(invqix_state::vctl_w) |
| 254 | { |
| 255 | m_vctl = data; |
| 256 | } |
| 257 | |
| 258 | static ADDRESS_MAP_START(invqix_prg_map, AS_PROGRAM, 16, invqix_state) |
| 187 | 259 | AM_RANGE(0x000000, 0x1fffff) AM_ROM AM_REGION("program", 0) |
| 188 | | AM_RANGE(0x200000, 0x20ffff) AM_RAM |
| 189 | | AM_RANGE(0x600000, 0x61ffff) AM_RAM |
| 260 | AM_RANGE(0x200000, 0x21ffff) AM_RAM |
| 261 | AM_RANGE(0x400000, 0x400001) AM_DEVWRITE8("oki", okim9810_device, write_TMP_register, 0x00ff) |
| 262 | AM_RANGE(0x400000, 0x400001) AM_DEVWRITE8("oki", okim9810_device, write, 0xff00) |
| 263 | AM_RANGE(0x400002, 0x400003) AM_DEVREAD8("oki", okim9810_device, read, 0xff00) |
| 264 | AM_RANGE(0x600000, 0x61ffff) AM_RAM AM_SHARE("vram") |
| 265 | AM_RANGE(0x620004, 0x620005) AM_WRITE(vctl_w) |
| 190 | 266 | ADDRESS_MAP_END |
| 191 | 267 | |
| 192 | 268 | static ADDRESS_MAP_START(invqix_io_map, AS_IO, 8, invqix_state) |
| 193 | | AM_RANGE(H8_PORT_1, H8_PORT_1) AM_READ(port1_r) |
| 194 | | AM_RANGE(H8_PORT_2, H8_PORT_2) AM_READWRITE(port2_r, port2_w) |
| 269 | AM_RANGE(H8_PORT_1, H8_PORT_1) AM_READ_PORT("P1") |
| 270 | AM_RANGE(H8_PORT_2, H8_PORT_2) AM_READ_PORT("SYSTEM") AM_WRITENOP |
| 195 | 271 | AM_RANGE(H8_PORT_3, H8_PORT_3) AM_READWRITE(port3_r, port3_w) |
| 196 | | AM_RANGE(H8_PORT_6, H8_PORT_6) AM_READWRITE(port6_r, port6_w) |
| 272 | AM_RANGE(H8_PORT_4, H8_PORT_4) AM_READ_PORT("P4") |
| 273 | AM_RANGE(H8_PORT_5, H8_PORT_5) AM_READWRITE(port5_r, port5_w) |
| 274 | AM_RANGE(H8_PORT_6, H8_PORT_6) AM_READWRITE(port6_r, port6_w) |
| 197 | 275 | AM_RANGE(H8_PORT_A, H8_PORT_A) AM_READ(porta_r) |
| 198 | | AM_RANGE(H8_PORT_G, H8_PORT_G) AM_NOP |
| 276 | AM_RANGE(H8_PORT_G, H8_PORT_G) AM_READ(portg_r) AM_WRITENOP |
| 199 | 277 | ADDRESS_MAP_END |
| 200 | 278 | |
| 201 | 279 | static INPUT_PORTS_START( invqix ) |
| 280 | PORT_START("SYSTEM") |
| 281 | PORT_SERVICE_NO_TOGGLE( 0x01, IP_ACTIVE_LOW ) |
| 282 | PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_COIN1 ) // coin 1 |
| 283 | PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_START1 ) PORT_NAME("Left 1 player start") // start A-1 ("left start" - picks Space Invaders) |
| 284 | PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_SERVICE1 ) // service |
| 285 | PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_COIN2 ) // coin 2 |
| 286 | PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_START3 ) PORT_NAME("Left 2 players start") // start A-2 |
| 287 | PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNUSED ) |
| 288 | PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNUSED ) |
| 289 | |
| 290 | PORT_START("P1") |
| 291 | PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_8WAY PORT_PLAYER(2) |
| 292 | PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_8WAY PORT_PLAYER(2) |
| 293 | PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_8WAY PORT_PLAYER(2) |
| 294 | PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_8WAY PORT_PLAYER(2) |
| 295 | PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(2) |
| 296 | PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(2) |
| 297 | PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_START4 ) PORT_NAME("Right 2 players start") // start B-2 |
| 298 | PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNUSED ) |
| 299 | |
| 300 | PORT_START("P4") |
| 301 | PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_8WAY PORT_PLAYER(1) |
| 302 | PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_8WAY PORT_PLAYER(1) |
| 303 | PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_8WAY PORT_PLAYER(1) |
| 304 | PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_8WAY PORT_PLAYER(1) |
| 305 | PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(1) |
| 306 | PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(1) |
| 307 | PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_START2 ) PORT_NAME("Right 1 player start") // start B-1 |
| 308 | PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNUSED ) |
| 202 | 309 | INPUT_PORTS_END |
| 203 | 310 | |
| 204 | 311 | static MACHINE_CONFIG_START( invqix, invqix_state ) |
| r15764 | r15765 | |
| 206 | 313 | MCFG_CPU_PROGRAM_MAP(invqix_prg_map) |
| 207 | 314 | MCFG_CPU_IO_MAP(invqix_io_map) |
| 208 | 315 | MCFG_CPU_VBLANK_INT("screen", irq1_line_hold) |
| 209 | | MCFG_CPU_PERIODIC_INT(irq0_line_hold, 60) |
| 316 | MCFG_CPU_PERIODIC_INT(irq0_line_hold, 60) |
| 210 | 317 | |
| 211 | 318 | /* video hardware */ |
| 212 | 319 | MCFG_SCREEN_ADD("screen", RASTER) |
| 213 | 320 | MCFG_SCREEN_REFRESH_RATE(60) |
| 214 | 321 | MCFG_SCREEN_UPDATE_DRIVER(invqix_state, screen_update) |
| 215 | 322 | MCFG_SCREEN_SIZE(640, 480) |
| 216 | | MCFG_SCREEN_VISIBLE_AREA(0, 639, 0, 479) |
| 323 | MCFG_SCREEN_VISIBLE_AREA(0, 256, 0, 240) |
| 217 | 324 | |
| 218 | 325 | MCFG_PALETTE_LENGTH(65536) |
| 219 | 326 | |
| r15764 | r15765 | |
| 229 | 336 | |
| 230 | 337 | ROM_START( invqix ) |
| 231 | 338 | ROM_REGION(0x200000, "program", 0) |
| 232 | | ROM_LOAD( "f34-02.ic2", 0x000000, 0x200000, CRC(035ace40) SHA1(e61f180024102c7a136b1c7f974c71e5dc698a1e) ) |
| 339 | ROM_LOAD( "f34-02.ic2", 0x000000, 0x200000, CRC(035ace40) SHA1(e61f180024102c7a136b1c7f974c71e5dc698a1e) ) |
| 233 | 340 | |
| 234 | 341 | ROM_REGION(0x1000000, "oki", 0) |
| 235 | | ROM_LOAD( "f34-01.ic13", 0x000000, 0x200000, CRC(7b055722) SHA1(8152bf04a58de15aefc4244e40733275e21818e1) ) |
| 342 | ROM_LOAD( "f34-01.ic13", 0x000000, 0x200000, CRC(7b055722) SHA1(8152bf04a58de15aefc4244e40733275e21818e1) ) |
| 236 | 343 | |
| 237 | 344 | ROM_REGION(0x80, "eeprom", 0) |
| 238 | | ROM_LOAD16_WORD_SWAP( "93c46.ic6", 0x000000, 0x000080, CRC(564b744e) SHA1(4d9ea7dc253797c513258d07a936dfb63d8ed18c) ) |
| 345 | ROM_LOAD16_WORD_SWAP( "93c46.ic6", 0x000000, 0x000080, CRC(564b744e) SHA1(4d9ea7dc253797c513258d07a936dfb63d8ed18c) ) |
| 239 | 346 | ROM_END |
| 240 | 347 | |
| 241 | | GAME(2003, invqix, 0, invqix, invqix, invqix_state, 0, ROT0, "Namco/Taito", "Space Invaders / Qix Silver Anniversary Edition (Ver. 2.03)", GAME_NOT_WORKING ) |
| 348 | GAME(2003, invqix, 0, invqix, invqix, invqix_state, 0, ROT270, "Namco/Taito", "Space Invaders / Qix Silver Anniversary Edition (Ver. 2.03)", GAME_IMPERFECT_GRAPHICS) |