src/emu/cpu/v30mz/v30mz.c
| r15700 | r15701 | |
| 45 | 45 | |
| 46 | 46 | #define PC(n) (((n)->sregs[CS]<<4)+(n)->ip) |
| 47 | 47 | |
| 48 | | typedef UINT8 BOOLEAN; |
| 49 | | typedef UINT8 BYTE; |
| 50 | | typedef UINT16 WORD; |
| 51 | | typedef UINT32 DWORD; |
| 52 | 48 | |
| 53 | 49 | #include "v30mz.h" |
| 54 | 50 | #include "nec.h" |
| r15700 | r15701 | |
| 60 | 56 | UINT8 b[16]; /* or as 8 bit registers */ |
| 61 | 57 | } necbasicregs; |
| 62 | 58 | |
| 63 | | /* default configuration */ |
| 64 | | static const nec_config default_config = |
| 65 | | { |
| 66 | | NULL // no internal decryption table |
| 67 | | }; |
| 68 | | |
| 69 | 59 | typedef struct _v30mz_state v30mz_state; |
| 70 | 60 | struct _v30mz_state |
| 71 | 61 | { |
| r15700 | r15701 | |
| 96 | 86 | UINT32 ea; |
| 97 | 87 | UINT16 eo; |
| 98 | 88 | UINT16 e16; |
| 99 | | |
| 100 | | const nec_config *config; |
| 101 | 89 | }; |
| 102 | 90 | |
| 103 | 91 | extern int necv_dasm_one(char *buffer, UINT32 eip, const UINT8 *oprom, const nec_config *config); |
| r15700 | r15701 | |
| 173 | 161 | |
| 174 | 162 | } |
| 175 | 163 | |
| 176 | | static void nec_interrupt(v30mz_state *cpustate,unsigned int_num,BOOLEAN md_flag) |
| 164 | static void nec_interrupt(v30mz_state *cpustate,unsigned int_num) |
| 177 | 165 | { |
| 178 | 166 | UINT32 dest_seg, dest_off; |
| 179 | 167 | |
| 180 | 168 | i_pushf(cpustate); |
| 181 | 169 | cpustate->TF = cpustate->IF = 0; |
| 182 | | if (md_flag) SetMD(0); /* clear Mode-flag = start 8080 emulation mode */ |
| 183 | 170 | |
| 184 | 171 | if (int_num == -1) |
| 185 | 172 | { |
| r15700 | r15701 | |
| 194 | 181 | |
| 195 | 182 | PUSH(cpustate->sregs[CS]); |
| 196 | 183 | PUSH(cpustate->ip); |
| 197 | | cpustate->ip = (WORD)dest_off; |
| 198 | | cpustate->sregs[CS] = (WORD)dest_seg; |
| 184 | cpustate->ip = (UINT16)dest_off; |
| 185 | cpustate->sregs[CS] = (UINT16)dest_seg; |
| 199 | 186 | } |
| 200 | 187 | |
| 201 | 188 | static void nec_trap(v30mz_state *cpustate) |
| 202 | 189 | { |
| 203 | 190 | nec_instruction[FETCHOP](cpustate); |
| 204 | | nec_interrupt(cpustate,1,0); |
| 191 | nec_interrupt(cpustate,1); |
| 205 | 192 | } |
| 206 | 193 | |
| 207 | 194 | static void external_int(v30mz_state *cpustate) |
| 208 | 195 | { |
| 209 | 196 | if( cpustate->pending_irq & NMI_IRQ ) |
| 210 | 197 | { |
| 211 | | nec_interrupt(cpustate,NEC_NMI_INT_VECTOR,0); |
| 198 | nec_interrupt(cpustate,NEC_NMI_INT_VECTOR); |
| 212 | 199 | cpustate->pending_irq &= ~NMI_IRQ; |
| 213 | 200 | } |
| 214 | 201 | else if( cpustate->pending_irq ) |
| 215 | 202 | { |
| 216 | 203 | /* the actual vector is retrieved after pushing flags */ |
| 217 | 204 | /* and clearing the IF */ |
| 218 | | nec_interrupt(cpustate,(UINT32)-1,0); |
| 205 | nec_interrupt(cpustate,(UINT32)-1); |
| 219 | 206 | } |
| 220 | 207 | } |
| 221 | 208 | |
| r15700 | r15701 | |
| 397 | 384 | high= GetnextRMWord; |
| 398 | 385 | tmp= RegWord(ModRM); |
| 399 | 386 | if (tmp<low || tmp>high) { |
| 400 | | nec_interrupt(cpustate,5,0); |
| 387 | nec_interrupt(cpustate,5); |
| 401 | 388 | CLK(20); |
| 402 | 389 | } else { |
| 403 | 390 | CLK(13); |
| r15700 | r15701 | |
| 461 | 448 | } |
| 462 | 449 | |
| 463 | 450 | OP( 0x68, i_push_d16 ) { UINT32 tmp; FETCHWORD(tmp); PUSH(tmp); CLK(1); } |
| 464 | | OP( 0x69, i_imul_d16 ) { UINT32 tmp; DEF_r16w; FETCHWORD(tmp); dst = (INT32)((INT16)src)*(INT32)((INT16)tmp); cpustate->CarryVal = cpustate->OverVal = (((INT32)dst) >> 15 != 0) && (((INT32)dst) >> 15 != -1); RegWord(ModRM)=(WORD)dst; if (ModRM >= 0xc0) CLK(3) else CLK(4) } |
| 465 | | OP( 0x6a, i_push_d8 ) { UINT32 tmp = (WORD)((INT16)((INT8)FETCH)); PUSH(tmp); CLK(1); } |
| 466 | | OP( 0x6b, i_imul_d8 ) { UINT32 src2; DEF_r16w; src2= (WORD)((INT16)((INT8)FETCH)); dst = (INT32)((INT16)src)*(INT32)((INT16)src2); cpustate->CarryVal = cpustate->OverVal = (((INT32)dst) >> 15 != 0) && (((INT32)dst) >> 15 != -1); RegWord(ModRM)=(WORD)dst; if (ModRM >= 0xc0) CLK(3) else CLK(4) } |
| 451 | OP( 0x69, i_imul_d16 ) { UINT32 tmp; DEF_r16w; FETCHWORD(tmp); dst = (INT32)((INT16)src)*(INT32)((INT16)tmp); cpustate->CarryVal = cpustate->OverVal = (((INT32)dst) >> 15 != 0) && (((INT32)dst) >> 15 != -1); RegWord(ModRM)=(UINT16)dst; if (ModRM >= 0xc0) CLK(3) else CLK(4) } |
| 452 | OP( 0x6a, i_push_d8 ) { UINT32 tmp = (UINT16)((INT16)((INT8)FETCH)); PUSH(tmp); CLK(1); } |
| 453 | OP( 0x6b, i_imul_d8 ) { UINT32 src2; DEF_r16w; src2= (UINT16)((INT16)((INT8)FETCH)); dst = (INT32)((INT16)src)*(INT32)((INT16)src2); cpustate->CarryVal = cpustate->OverVal = (((INT32)dst) >> 15 != 0) && (((INT32)dst) >> 15 != -1); RegWord(ModRM)=(UINT16)dst; if (ModRM >= 0xc0) CLK(3) else CLK(4) } |
| 467 | 454 | OP( 0x6c, i_insb ) { PutMemB(ES,cpustate->regs.w[IY],read_port(cpustate->regs.w[DW])); cpustate->regs.w[IY]+= -2 * cpustate->DF + 1; CLK(6); } |
| 468 | 455 | OP( 0x6d, i_insw ) { PutMemB(ES,cpustate->regs.w[IY],read_port(cpustate->regs.w[DW])); PutMemB(ES,(cpustate->regs.w[IY]+1)&0xffff,read_port((cpustate->regs.w[DW]+1)&0xffff)); cpustate->regs.w[IY]+= -4 * cpustate->DF + 2; CLK(6); } |
| 469 | 456 | OP( 0x6e, i_outsb ) { write_port(cpustate->regs.w[DW],GetMemB(DS,cpustate->regs.w[IX])); cpustate->regs.w[IX]+= -2 * cpustate->DF + 1; CLK(7); } |
| r15700 | r15701 | |
| 514 | 501 | } |
| 515 | 502 | } |
| 516 | 503 | |
| 517 | | OP( 0x82, i_82pre ) { UINT32 dst, src; GetModRM; dst = GetRMByte(ModRM); src = (BYTE)((INT8)FETCH); |
| 504 | OP( 0x82, i_82pre ) { UINT32 dst, src; GetModRM; dst = GetRMByte(ModRM); src = (UINT8)((INT8)FETCH); |
| 518 | 505 | if (ModRM >=0xc0 ) CLK(1) else if ((ModRM & 0x38)==0x38) CLK(2) else CLK(3) |
| 519 | 506 | switch (ModRM & 0x38) { |
| 520 | 507 | case 0x00: ADDB; PutbackRMByte(ModRM,dst); break; |
| r15700 | r15701 | |
| 528 | 515 | } |
| 529 | 516 | } |
| 530 | 517 | |
| 531 | | OP( 0x83, i_83pre ) { UINT32 dst, src; GetModRM; dst = GetRMWord(ModRM); src = (WORD)((INT16)((INT8)FETCH)); |
| 518 | OP( 0x83, i_83pre ) { UINT32 dst, src; GetModRM; dst = GetRMWord(ModRM); src = (UINT16)((INT16)((INT8)FETCH)); |
| 532 | 519 | if (ModRM >=0xc0 ) CLK(1) else if ((ModRM & 0x38)==0x38) CLK(2) else CLK(3) |
| 533 | 520 | switch (ModRM & 0x38) { |
| 534 | 521 | case 0x00: ADDW; PutbackRMWord(ModRM,dst); break; |
| r15700 | r15701 | |
| 579 | 566 | |
| 580 | 567 | OP( 0x98, i_cbw ) { cpustate->regs.b[AH] = (cpustate->regs.b[AL] & 0x80) ? 0xff : 0; CLK(1); } |
| 581 | 568 | OP( 0x99, i_cwd ) { cpustate->regs.w[DW] = (cpustate->regs.b[AH] & 0x80) ? 0xffff : 0; CLK(1); } |
| 582 | | OP( 0x9a, i_call_far ) { UINT32 tmp, tmp2; FETCHWORD(tmp); FETCHWORD(tmp2); PUSH(cpustate->sregs[CS]); PUSH(cpustate->ip); cpustate->ip = (WORD)tmp; cpustate->sregs[CS] = (WORD)tmp2; CLK(10); } |
| 569 | OP( 0x9a, i_call_far ) { UINT32 tmp, tmp2; FETCHWORD(tmp); FETCHWORD(tmp2); PUSH(cpustate->sregs[CS]); PUSH(cpustate->ip); cpustate->ip = (UINT16)tmp; cpustate->sregs[CS] = (UINT16)tmp2; CLK(10); } |
| 583 | 570 | OP( 0x9b, i_wait ) { logerror("%06x: Hardware POLL\n",PC(cpustate)); } |
| 584 | 571 | OP( 0x9c, i_pushf ) { PUSH( CompressFlags() ); CLK(2); } |
| 585 | 572 | OP( 0x9d, i_popf ) { UINT32 tmp; POP(tmp); ExpandFlags(tmp); CLK(3); if (cpustate->TF) nec_trap(cpustate); } |
| r15700 | r15701 | |
| 628 | 615 | c=FETCH; |
| 629 | 616 | CLKM(3,5); |
| 630 | 617 | if (c) switch (ModRM & 0x38) { |
| 631 | | case 0x00: do { ROL_BYTE; c--; } while (c>0); PutbackRMByte(ModRM,(BYTE)dst); break; |
| 632 | | case 0x08: do { ROR_BYTE; c--; } while (c>0); PutbackRMByte(ModRM,(BYTE)dst); break; |
| 633 | | case 0x10: do { ROLC_BYTE; c--; } while (c>0); PutbackRMByte(ModRM,(BYTE)dst); break; |
| 634 | | case 0x18: do { RORC_BYTE; c--; } while (c>0); PutbackRMByte(ModRM,(BYTE)dst); break; |
| 618 | case 0x00: do { ROL_BYTE; c--; } while (c>0); PutbackRMByte(ModRM,(UINT8)dst); break; |
| 619 | case 0x08: do { ROR_BYTE; c--; } while (c>0); PutbackRMByte(ModRM,(UINT8)dst); break; |
| 620 | case 0x10: do { ROLC_BYTE; c--; } while (c>0); PutbackRMByte(ModRM,(UINT8)dst); break; |
| 621 | case 0x18: do { RORC_BYTE; c--; } while (c>0); PutbackRMByte(ModRM,(UINT8)dst); break; |
| 635 | 622 | case 0x20: SHL_BYTE(c); break; |
| 636 | 623 | case 0x28: SHR_BYTE(c); break; |
| 637 | 624 | case 0x30: logerror("%06x: Undefined opcode 0xc0 0x30 (SHLA)\n",PC(cpustate)); break; |
| r15700 | r15701 | |
| 645 | 632 | c=FETCH; |
| 646 | 633 | CLKM(3,5); |
| 647 | 634 | if (c) switch (ModRM & 0x38) { |
| 648 | | case 0x00: do { ROL_WORD; c--; } while (c>0); PutbackRMWord(ModRM,(WORD)dst); break; |
| 649 | | case 0x08: do { ROR_WORD; c--; } while (c>0); PutbackRMWord(ModRM,(WORD)dst); break; |
| 650 | | case 0x10: do { ROLC_WORD; c--; } while (c>0); PutbackRMWord(ModRM,(WORD)dst); break; |
| 651 | | case 0x18: do { RORC_WORD; c--; } while (c>0); PutbackRMWord(ModRM,(WORD)dst); break; |
| 635 | case 0x00: do { ROL_WORD; c--; } while (c>0); PutbackRMWord(ModRM,(UINT16)dst); break; |
| 636 | case 0x08: do { ROR_WORD; c--; } while (c>0); PutbackRMWord(ModRM,(UINT16)dst); break; |
| 637 | case 0x10: do { ROLC_WORD; c--; } while (c>0); PutbackRMWord(ModRM,(UINT16)dst); break; |
| 638 | case 0x18: do { RORC_WORD; c--; } while (c>0); PutbackRMWord(ModRM,(UINT16)dst); break; |
| 652 | 639 | case 0x20: SHL_WORD(c); break; |
| 653 | 640 | case 0x28: SHR_WORD(c); break; |
| 654 | 641 | case 0x30: logerror("%06x: Undefined opcode 0xc1 0x30 (SHLA)\n",PC(cpustate)); break; |
| r15700 | r15701 | |
| 658 | 645 | |
| 659 | 646 | OP( 0xc2, i_ret_d16 ) { UINT32 count = FETCH; count += FETCH << 8; POP(cpustate->ip); cpustate->regs.w[SP]+=count; CLK(6); } |
| 660 | 647 | OP( 0xc3, i_ret ) { POP(cpustate->ip); CLK(6); } |
| 661 | | OP( 0xc4, i_les_dw ) { GetModRM; WORD tmp = GetRMWord(ModRM); RegWord(ModRM)=tmp; cpustate->sregs[ES] = GetnextRMWord; CLK(6); } |
| 662 | | OP( 0xc5, i_lds_dw ) { GetModRM; WORD tmp = GetRMWord(ModRM); RegWord(ModRM)=tmp; cpustate->sregs[DS] = GetnextRMWord; CLK(6); } |
| 648 | OP( 0xc4, i_les_dw ) { GetModRM; UINT16 tmp = GetRMWord(ModRM); RegWord(ModRM)=tmp; cpustate->sregs[ES] = GetnextRMWord; CLK(6); } |
| 649 | OP( 0xc5, i_lds_dw ) { GetModRM; UINT16 tmp = GetRMWord(ModRM); RegWord(ModRM)=tmp; cpustate->sregs[DS] = GetnextRMWord; CLK(6); } |
| 663 | 650 | OP( 0xc6, i_mov_bd8 ) { GetModRM; PutImmRMByte(ModRM); CLK(1); } |
| 664 | 651 | OP( 0xc7, i_mov_wd16 ) { GetModRM; PutImmRMWord(ModRM); CLK(1); } |
| 665 | 652 | |
| r15700 | r15701 | |
| 686 | 673 | } |
| 687 | 674 | OP( 0xca, i_retf_d16 ) { UINT32 count = FETCH; count += FETCH << 8; POP(cpustate->ip); POP(cpustate->sregs[CS]); cpustate->regs.w[SP]+=count; CLK(9); } |
| 688 | 675 | OP( 0xcb, i_retf ) { POP(cpustate->ip); POP(cpustate->sregs[CS]); CLK(8); } |
| 689 | | OP( 0xcc, i_int3 ) { nec_interrupt(cpustate,3,0); CLK(9); } |
| 690 | | OP( 0xcd, i_int ) { nec_interrupt(cpustate,FETCH,0); CLK(10); } |
| 691 | | OP( 0xce, i_into ) { if (OF) { nec_interrupt(cpustate,4,0); CLK(13); } else CLK(6); } |
| 676 | OP( 0xcc, i_int3 ) { nec_interrupt(cpustate,3); CLK(9); } |
| 677 | OP( 0xcd, i_int ) { nec_interrupt(cpustate,FETCH); CLK(10); } |
| 678 | OP( 0xce, i_into ) { if (OF) { nec_interrupt(cpustate,4); CLK(13); } else CLK(6); } |
| 692 | 679 | OP( 0xcf, i_iret ) { POP(cpustate->ip); POP(cpustate->sregs[CS]); i_popf(cpustate); CLK(10); } |
| 693 | 680 | |
| 694 | 681 | OP( 0xd0, i_rotshft_b ) { |
| 695 | 682 | UINT32 src, dst; GetModRM; src = (UINT32)GetRMByte(ModRM); dst=src; |
| 696 | 683 | CLKM(1,3); |
| 697 | 684 | switch (ModRM & 0x38) { |
| 698 | | case 0x00: ROL_BYTE; PutbackRMByte(ModRM,(BYTE)dst); cpustate->OverVal = (src^dst)&0x80; break; |
| 699 | | case 0x08: ROR_BYTE; PutbackRMByte(ModRM,(BYTE)dst); cpustate->OverVal = (src^dst)&0x80; break; |
| 700 | | case 0x10: ROLC_BYTE; PutbackRMByte(ModRM,(BYTE)dst); cpustate->OverVal = (src^dst)&0x80; break; |
| 701 | | case 0x18: RORC_BYTE; PutbackRMByte(ModRM,(BYTE)dst); cpustate->OverVal = (src^dst)&0x80; break; |
| 685 | case 0x00: ROL_BYTE; PutbackRMByte(ModRM,(UINT8)dst); cpustate->OverVal = (src^dst)&0x80; break; |
| 686 | case 0x08: ROR_BYTE; PutbackRMByte(ModRM,(UINT8)dst); cpustate->OverVal = (src^dst)&0x80; break; |
| 687 | case 0x10: ROLC_BYTE; PutbackRMByte(ModRM,(UINT8)dst); cpustate->OverVal = (src^dst)&0x80; break; |
| 688 | case 0x18: RORC_BYTE; PutbackRMByte(ModRM,(UINT8)dst); cpustate->OverVal = (src^dst)&0x80; break; |
| 702 | 689 | case 0x20: SHL_BYTE(1); cpustate->OverVal = (src^dst)&0x80; break; |
| 703 | 690 | case 0x28: SHR_BYTE(1); cpustate->OverVal = (src^dst)&0x80; break; |
| 704 | 691 | case 0x30: logerror("%06x: Undefined opcode 0xd0 0x30 (SHLA)\n",PC(cpustate)); break; |
| r15700 | r15701 | |
| 710 | 697 | UINT32 src, dst; GetModRM; src = (UINT32)GetRMWord(ModRM); dst=src; |
| 711 | 698 | CLKM(1,3); |
| 712 | 699 | switch (ModRM & 0x38) { |
| 713 | | case 0x00: ROL_WORD; PutbackRMWord(ModRM,(WORD)dst); cpustate->OverVal = (src^dst)&0x8000; break; |
| 714 | | case 0x08: ROR_WORD; PutbackRMWord(ModRM,(WORD)dst); cpustate->OverVal = (src^dst)&0x8000; break; |
| 715 | | case 0x10: ROLC_WORD; PutbackRMWord(ModRM,(WORD)dst); cpustate->OverVal = (src^dst)&0x8000; break; |
| 716 | | case 0x18: RORC_WORD; PutbackRMWord(ModRM,(WORD)dst); cpustate->OverVal = (src^dst)&0x8000; break; |
| 700 | case 0x00: ROL_WORD; PutbackRMWord(ModRM,(UINT16)dst); cpustate->OverVal = (src^dst)&0x8000; break; |
| 701 | case 0x08: ROR_WORD; PutbackRMWord(ModRM,(UINT16)dst); cpustate->OverVal = (src^dst)&0x8000; break; |
| 702 | case 0x10: ROLC_WORD; PutbackRMWord(ModRM,(UINT16)dst); cpustate->OverVal = (src^dst)&0x8000; break; |
| 703 | case 0x18: RORC_WORD; PutbackRMWord(ModRM,(UINT16)dst); cpustate->OverVal = (src^dst)&0x8000; break; |
| 717 | 704 | case 0x20: SHL_WORD(1); cpustate->OverVal = (src^dst)&0x8000; break; |
| 718 | 705 | case 0x28: SHR_WORD(1); cpustate->OverVal = (src^dst)&0x8000; break; |
| 719 | 706 | case 0x30: logerror("%06x: Undefined opcode 0xd1 0x30 (SHLA)\n",PC(cpustate)); break; |
| r15700 | r15701 | |
| 726 | 713 | c=cpustate->regs.b[CL]; |
| 727 | 714 | CLKM(3,5); |
| 728 | 715 | if (c) switch (ModRM & 0x38) { |
| 729 | | case 0x00: do { ROL_BYTE; c--; } while (c>0); PutbackRMByte(ModRM,(BYTE)dst); break; |
| 730 | | case 0x08: do { ROR_BYTE; c--; } while (c>0); PutbackRMByte(ModRM,(BYTE)dst); break; |
| 731 | | case 0x10: do { ROLC_BYTE; c--; } while (c>0); PutbackRMByte(ModRM,(BYTE)dst); break; |
| 732 | | case 0x18: do { RORC_BYTE; c--; } while (c>0); PutbackRMByte(ModRM,(BYTE)dst); break; |
| 716 | case 0x00: do { ROL_BYTE; c--; } while (c>0); PutbackRMByte(ModRM,(UINT8)dst); break; |
| 717 | case 0x08: do { ROR_BYTE; c--; } while (c>0); PutbackRMByte(ModRM,(UINT8)dst); break; |
| 718 | case 0x10: do { ROLC_BYTE; c--; } while (c>0); PutbackRMByte(ModRM,(UINT8)dst); break; |
| 719 | case 0x18: do { RORC_BYTE; c--; } while (c>0); PutbackRMByte(ModRM,(UINT8)dst); break; |
| 733 | 720 | case 0x20: SHL_BYTE(c); break; |
| 734 | 721 | case 0x28: SHR_BYTE(c); break; |
| 735 | 722 | case 0x30: logerror("%06x: Undefined opcode 0xd2 0x30 (SHLA)\n",PC(cpustate)); break; |
| r15700 | r15701 | |
| 742 | 729 | c=cpustate->regs.b[CL]; |
| 743 | 730 | CLKM(3,5); |
| 744 | 731 | if (c) switch (ModRM & 0x38) { |
| 745 | | case 0x00: do { ROL_WORD; c--; } while (c>0); PutbackRMWord(ModRM,(WORD)dst); break; |
| 746 | | case 0x08: do { ROR_WORD; c--; } while (c>0); PutbackRMWord(ModRM,(WORD)dst); break; |
| 747 | | case 0x10: do { ROLC_WORD; c--; } while (c>0); PutbackRMWord(ModRM,(WORD)dst); break; |
| 748 | | case 0x18: do { RORC_WORD; c--; } while (c>0); PutbackRMWord(ModRM,(WORD)dst); break; |
| 732 | case 0x00: do { ROL_WORD; c--; } while (c>0); PutbackRMWord(ModRM,(UINT16)dst); break; |
| 733 | case 0x08: do { ROR_WORD; c--; } while (c>0); PutbackRMWord(ModRM,(UINT16)dst); break; |
| 734 | case 0x10: do { ROLC_WORD; c--; } while (c>0); PutbackRMWord(ModRM,(UINT16)dst); break; |
| 735 | case 0x18: do { RORC_WORD; c--; } while (c>0); PutbackRMWord(ModRM,(UINT16)dst); break; |
| 749 | 736 | case 0x20: SHL_WORD(c); break; |
| 750 | 737 | case 0x28: SHR_WORD(c); break; |
| 751 | 738 | case 0x30: logerror("%06x: Undefined opcode 0xd3 0x30 (SHLA)\n",PC(cpustate)); break; |
| r15700 | r15701 | |
| 759 | 746 | OP( 0xd7, i_trans ) { UINT32 dest = (cpustate->regs.w[BW]+cpustate->regs.b[AL])&0xffff; cpustate->regs.b[AL] = GetMemB(DS, dest); CLK(5); } |
| 760 | 747 | OP( 0xd8, i_fpo ) { GetModRM; CLK(1); logerror("%06x: Unimplemented floating point control %04x\n",PC(cpustate),ModRM); } |
| 761 | 748 | |
| 762 | | OP( 0xe0, i_loopne ) { INT8 disp = (INT8)FETCH; cpustate->regs.w[CW]--; if (!ZF && cpustate->regs.w[CW]) { cpustate->ip = (WORD)(cpustate->ip+disp); CLK(6); } else CLK(3); } |
| 763 | | OP( 0xe1, i_loope ) { INT8 disp = (INT8)FETCH; cpustate->regs.w[CW]--; if ( ZF && cpustate->regs.w[CW]) { cpustate->ip = (WORD)(cpustate->ip+disp); CLK(6); } else CLK(3); } |
| 764 | | OP( 0xe2, i_loop ) { INT8 disp = (INT8)FETCH; cpustate->regs.w[CW]--; if (cpustate->regs.w[CW]) { cpustate->ip = (WORD)(cpustate->ip+disp); CLK(5); } else CLK(2); } |
| 765 | | OP( 0xe3, i_jcxz ) { INT8 disp = (INT8)FETCH; if (cpustate->regs.w[CW] == 0) { cpustate->ip = (WORD)(cpustate->ip+disp); CLK(4); } else CLK(1); } |
| 749 | OP( 0xe0, i_loopne ) { INT8 disp = (INT8)FETCH; cpustate->regs.w[CW]--; if (!ZF && cpustate->regs.w[CW]) { cpustate->ip = (UINT16)(cpustate->ip+disp); CLK(6); } else CLK(3); } |
| 750 | OP( 0xe1, i_loope ) { INT8 disp = (INT8)FETCH; cpustate->regs.w[CW]--; if ( ZF && cpustate->regs.w[CW]) { cpustate->ip = (UINT16)(cpustate->ip+disp); CLK(6); } else CLK(3); } |
| 751 | OP( 0xe2, i_loop ) { INT8 disp = (INT8)FETCH; cpustate->regs.w[CW]--; if (cpustate->regs.w[CW]) { cpustate->ip = (UINT16)(cpustate->ip+disp); CLK(5); } else CLK(2); } |
| 752 | OP( 0xe3, i_jcxz ) { INT8 disp = (INT8)FETCH; if (cpustate->regs.w[CW] == 0) { cpustate->ip = (UINT16)(cpustate->ip+disp); CLK(4); } else CLK(1); } |
| 766 | 753 | OP( 0xe4, i_inal ) { UINT8 port = FETCH; cpustate->regs.b[AL] = read_port(port); CLK(6); } |
| 767 | 754 | OP( 0xe5, i_inax ) { UINT8 port = FETCH; cpustate->regs.b[AL] = read_port(port); cpustate->regs.b[AH] = read_port(port+1); CLK(6); } |
| 768 | 755 | OP( 0xe6, i_outal ) { UINT8 port = FETCH; write_port(port, cpustate->regs.b[AL]); CLK(6); } |
| 769 | 756 | OP( 0xe7, i_outax ) { UINT8 port = FETCH; write_port(port, cpustate->regs.b[AL]); write_port(port+1, cpustate->regs.b[AH]); CLK(6); } |
| 770 | 757 | |
| 771 | | OP( 0xe8, i_call_d16 ) { UINT32 tmp; FETCHWORD(tmp); PUSH(cpustate->ip); cpustate->ip = (WORD)(cpustate->ip+(INT16)tmp); CLK(5); } |
| 772 | | OP( 0xe9, i_jmp_d16 ) { UINT32 tmp; FETCHWORD(tmp); cpustate->ip = (WORD)(cpustate->ip+(INT16)tmp); CLK(4); } |
| 773 | | OP( 0xea, i_jmp_far ) { UINT32 tmp,tmp1; FETCHWORD(tmp); FETCHWORD(tmp1); cpustate->sregs[CS] = (WORD)tmp1; cpustate->ip = (WORD)tmp; CLK(7); } |
| 758 | OP( 0xe8, i_call_d16 ) { UINT32 tmp; FETCHWORD(tmp); PUSH(cpustate->ip); cpustate->ip = (UINT16)(cpustate->ip+(INT16)tmp); CLK(5); } |
| 759 | OP( 0xe9, i_jmp_d16 ) { UINT32 tmp; FETCHWORD(tmp); cpustate->ip = (UINT16)(cpustate->ip+(INT16)tmp); CLK(4); } |
| 760 | OP( 0xea, i_jmp_far ) { UINT32 tmp,tmp1; FETCHWORD(tmp); FETCHWORD(tmp1); cpustate->sregs[CS] = (UINT16)tmp1; cpustate->ip = (UINT16)tmp; CLK(7); } |
| 774 | 761 | OP( 0xeb, i_jmp_d8 ) { int tmp = (int)((INT8)FETCH); CLK(4); |
| 775 | 762 | if (tmp==-2 && cpustate->no_interrupt==0 && (cpustate->pending_irq==0) && cpustate->icount>0) cpustate->icount%=12; /* cycle skip */ |
| 776 | | cpustate->ip = (WORD)(cpustate->ip+tmp); |
| 763 | cpustate->ip = (UINT16)(cpustate->ip+tmp); |
| 777 | 764 | } |
| 778 | 765 | OP( 0xec, i_inaldx ) { cpustate->regs.b[AL] = read_port(cpustate->regs.w[DW]); CLK(6);} |
| 779 | 766 | OP( 0xed, i_inaxdx ) { UINT32 port = cpustate->regs.w[DW]; cpustate->regs.b[AL] = read_port(port); cpustate->regs.b[AH] = read_port(port+1); CLK(6); } |
| r15700 | r15701 | |
| 844 | 831 | case 0x08: logerror("%06x: Undefined opcode 0xf6 0x08\n",PC(cpustate)); break; |
| 845 | 832 | case 0x10: PutbackRMByte(ModRM,~tmp); CLKM(1,3); break; /* NOT */ |
| 846 | 833 | case 0x18: cpustate->CarryVal=(tmp!=0); tmp=(~tmp)+1; SetSZPF_Byte(tmp); PutbackRMByte(ModRM,tmp&0xff); CLKM(1,3); break; /* NEG */ |
| 847 | | case 0x20: uresult = cpustate->regs.b[AL]*tmp; cpustate->regs.w[AW]=(WORD)uresult; cpustate->CarryVal=cpustate->OverVal=(cpustate->regs.b[AH]!=0); CLKM(3,4); break; /* MULU */ |
| 848 | | case 0x28: result = (INT16)((INT8)cpustate->regs.b[AL])*(INT16)((INT8)tmp); cpustate->regs.w[AW]=(WORD)result; cpustate->CarryVal=cpustate->OverVal=(cpustate->regs.b[AH]!=0); CLKM(3,4); break; /* MUL */ |
| 849 | | case 0x30: if (tmp) { DIVUB; } else nec_interrupt(cpustate,0,0); CLKM(15,16); break; |
| 850 | | case 0x38: if (tmp) { DIVB; } else nec_interrupt(cpustate,0,0); CLKM(17,18); break; |
| 834 | case 0x20: uresult = cpustate->regs.b[AL]*tmp; cpustate->regs.w[AW]=(UINT16)uresult; cpustate->CarryVal=cpustate->OverVal=(cpustate->regs.b[AH]!=0); CLKM(3,4); break; /* MULU */ |
| 835 | case 0x28: result = (INT16)((INT8)cpustate->regs.b[AL])*(INT16)((INT8)tmp); cpustate->regs.w[AW]=(UINT16)result; cpustate->CarryVal=cpustate->OverVal=(cpustate->regs.b[AH]!=0); CLKM(3,4); break; /* MUL */ |
| 836 | case 0x30: if (tmp) { DIVUB; } else nec_interrupt(cpustate,0); CLKM(15,16); break; |
| 837 | case 0x38: if (tmp) { DIVB; } else nec_interrupt(cpustate,0); CLKM(17,18); break; |
| 851 | 838 | } |
| 852 | 839 | } |
| 853 | 840 | |
| r15700 | r15701 | |
| 860 | 847 | case 0x18: cpustate->CarryVal=(tmp!=0); tmp=(~tmp)+1; SetSZPF_Word(tmp); PutbackRMWord(ModRM,tmp&0xffff); CLKM(1,3); break; /* NEG */ |
| 861 | 848 | case 0x20: uresult = cpustate->regs.w[AW]*tmp; cpustate->regs.w[AW]=uresult&0xffff; cpustate->regs.w[DW]=((UINT32)uresult)>>16; cpustate->CarryVal=cpustate->OverVal=(cpustate->regs.w[DW]!=0); CLKM(3,4); break; /* MULU */ |
| 862 | 849 | case 0x28: result = (INT32)((INT16)cpustate->regs.w[AW])*(INT32)((INT16)tmp); cpustate->regs.w[AW]=result&0xffff; cpustate->regs.w[DW]=result>>16; cpustate->CarryVal=cpustate->OverVal=(cpustate->regs.w[DW]!=0); CLKM(3,4); break; /* MUL */ |
| 863 | | case 0x30: if (tmp) { DIVUW; } else nec_interrupt(cpustate,0,0); CLKM(23,24); break; |
| 864 | | case 0x38: if (tmp) { DIVW; } else nec_interrupt(cpustate,0,0); CLKM(24,25); break; |
| 850 | case 0x30: if (tmp) { DIVUW; } else nec_interrupt(cpustate,0); CLKM(23,24); break; |
| 851 | case 0x38: if (tmp) { DIVW; } else nec_interrupt(cpustate,0); CLKM(24,25); break; |
| 865 | 852 | } |
| 866 | 853 | } |
| 867 | 854 | |
| r15700 | r15701 | |
| 873 | 860 | OP( 0xfd, i_std ) { SetDF(1); CLK(4); } |
| 874 | 861 | OP( 0xfe, i_fepre ) { UINT32 tmp, tmp1; GetModRM; tmp=GetRMByte(ModRM); |
| 875 | 862 | switch(ModRM & 0x38) { |
| 876 | | case 0x00: tmp1 = tmp+1; cpustate->OverVal = (tmp==0x7f); SetAF(tmp1,tmp,1); SetSZPF_Byte(tmp1); PutbackRMByte(ModRM,(BYTE)tmp1); CLKM(1,3); break; /* INC */ |
| 877 | | case 0x08: tmp1 = tmp-1; cpustate->OverVal = (tmp==0x80); SetAF(tmp1,tmp,1); SetSZPF_Byte(tmp1); PutbackRMByte(ModRM,(BYTE)tmp1); CLKM(1,3); break; /* DEC */ |
| 863 | case 0x00: tmp1 = tmp+1; cpustate->OverVal = (tmp==0x7f); SetAF(tmp1,tmp,1); SetSZPF_Byte(tmp1); PutbackRMByte(ModRM,(UINT8)tmp1); CLKM(1,3); break; /* INC */ |
| 864 | case 0x08: tmp1 = tmp-1; cpustate->OverVal = (tmp==0x80); SetAF(tmp1,tmp,1); SetSZPF_Byte(tmp1); PutbackRMByte(ModRM,(UINT8)tmp1); CLKM(1,3); break; /* DEC */ |
| 878 | 865 | default: logerror("%06x: FE Pre with unimplemented mod\n",PC(cpustate)); |
| 879 | 866 | } |
| 880 | 867 | } |
| 881 | 868 | OP( 0xff, i_ffpre ) { UINT32 tmp, tmp1; GetModRM; tmp=GetRMWord(ModRM); |
| 882 | 869 | switch(ModRM & 0x38) { |
| 883 | | case 0x00: tmp1 = tmp+1; cpustate->OverVal = (tmp==0x7fff); SetAF(tmp1,tmp,1); SetSZPF_Word(tmp1); PutbackRMWord(ModRM,(WORD)tmp1); CLKM(1,3); break; /* INC */ |
| 884 | | case 0x08: tmp1 = tmp-1; cpustate->OverVal = (tmp==0x8000); SetAF(tmp1,tmp,1); SetSZPF_Word(tmp1); PutbackRMWord(ModRM,(WORD)tmp1); CLKM(1,3); break; /* DEC */ |
| 885 | | case 0x10: PUSH(cpustate->ip); cpustate->ip = (WORD)tmp; CLKM(5,6); break; /* CALL */ |
| 870 | case 0x00: tmp1 = tmp+1; cpustate->OverVal = (tmp==0x7fff); SetAF(tmp1,tmp,1); SetSZPF_Word(tmp1); PutbackRMWord(ModRM,(UINT16)tmp1); CLKM(1,3); break; /* INC */ |
| 871 | case 0x08: tmp1 = tmp-1; cpustate->OverVal = (tmp==0x8000); SetAF(tmp1,tmp,1); SetSZPF_Word(tmp1); PutbackRMWord(ModRM,(UINT16)tmp1); CLKM(1,3); break; /* DEC */ |
| 872 | case 0x10: PUSH(cpustate->ip); cpustate->ip = (UINT16)tmp; CLKM(5,6); break; /* CALL */ |
| 886 | 873 | case 0x18: tmp1 = cpustate->sregs[CS]; cpustate->sregs[CS] = GetnextRMWord; PUSH(tmp1); PUSH(cpustate->ip); cpustate->ip = tmp; CLKM(5,12); break; /* CALL FAR */ |
| 887 | 874 | case 0x20: cpustate->ip = tmp; CLKM(4,5); break; /* JMP */ |
| 888 | 875 | case 0x28: cpustate->ip = tmp; cpustate->sregs[CS] = GetnextRMWord; CLK(10); break; /* JMP FAR */ |
| r15700 | r15701 | |
| 928 | 915 | |
| 929 | 916 | static CPU_DISASSEMBLE( nec ) |
| 930 | 917 | { |
| 931 | | v30mz_state *cpustate = get_safe_token(device); |
| 932 | | |
| 933 | | return necv_dasm_one(buffer, pc, oprom, cpustate->config); |
| 918 | return necv_dasm_one(buffer, pc, oprom, NULL); |
| 934 | 919 | } |
| 935 | 920 | |
| 936 | 921 | static void nec_init(legacy_cpu_device *device, device_irq_acknowledge_callback irqcallback, int type) |
| 937 | 922 | { |
| 938 | 923 | v30mz_state *cpustate = get_safe_token(device); |
| 939 | 924 | |
| 940 | | const nec_config *config = &default_config; |
| 941 | | |
| 942 | 925 | device->save_item(NAME(cpustate->regs.w)); |
| 943 | 926 | device->save_item(NAME(cpustate->sregs)); |
| 944 | 927 | |
| r15700 | r15701 | |
| 958 | 941 | device->save_item(NAME(cpustate->CarryVal)); |
| 959 | 942 | device->save_item(NAME(cpustate->ParityVal)); |
| 960 | 943 | |
| 961 | | cpustate->config = config; |
| 962 | 944 | cpustate->irq_callback = irqcallback; |
| 963 | 945 | cpustate->device = device; |
| 964 | 946 | cpustate->program = device->space(AS_PROGRAM); |
src/emu/cpu/v30mz/v30mz.h
| r15700 | r15701 | |
| 45 | 45 | #define SetOFW_Sub(x,y,z) (cpustate->OverVal = ((z) ^ (y)) & ((z) ^ (x)) & 0x8000) |
| 46 | 46 | #define SetOFB_Sub(x,y,z) (cpustate->OverVal = ((z) ^ (y)) & ((z) ^ (x)) & 0x80) |
| 47 | 47 | |
| 48 | | #define ADDB { UINT32 res=dst+src; SetCFB(res); SetOFB_Add(res,src,dst); SetAF(res,src,dst); SetSZPF_Byte(res); dst=(BYTE)res; } |
| 49 | | #define ADDW { UINT32 res=dst+src; SetCFW(res); SetOFW_Add(res,src,dst); SetAF(res,src,dst); SetSZPF_Word(res); dst=(WORD)res; } |
| 48 | #define ADDB { UINT32 res=dst+src; SetCFB(res); SetOFB_Add(res,src,dst); SetAF(res,src,dst); SetSZPF_Byte(res); dst=(UINT8)res; } |
| 49 | #define ADDW { UINT32 res=dst+src; SetCFW(res); SetOFW_Add(res,src,dst); SetAF(res,src,dst); SetSZPF_Word(res); dst=(UINT16)res; } |
| 50 | 50 | |
| 51 | | #define SUBB { UINT32 res=dst-src; SetCFB(res); SetOFB_Sub(res,src,dst); SetAF(res,src,dst); SetSZPF_Byte(res); dst=(BYTE)res; } |
| 52 | | #define SUBW { UINT32 res=dst-src; SetCFW(res); SetOFW_Sub(res,src,dst); SetAF(res,src,dst); SetSZPF_Word(res); dst=(WORD)res; } |
| 51 | #define SUBB { UINT32 res=dst-src; SetCFB(res); SetOFB_Sub(res,src,dst); SetAF(res,src,dst); SetSZPF_Byte(res); dst=(UINT8)res; } |
| 52 | #define SUBW { UINT32 res=dst-src; SetCFW(res); SetOFW_Sub(res,src,dst); SetAF(res,src,dst); SetSZPF_Word(res); dst=(UINT16)res; } |
| 53 | 53 | |
| 54 | 54 | #define ORB dst|=src; cpustate->CarryVal=cpustate->OverVal=cpustate->AuxVal=0; SetSZPF_Byte(dst) |
| 55 | 55 | #define ORW dst|=src; cpustate->CarryVal=cpustate->OverVal=cpustate->AuxVal=0; SetSZPF_Word(dst) |
| r15700 | r15701 | |
| 63 | 63 | #define CF (cpustate->CarryVal!=0) |
| 64 | 64 | #define SF (cpustate->SignVal<0) |
| 65 | 65 | #define ZF (cpustate->ZeroVal==0) |
| 66 | | #define PF parity_table[(BYTE)cpustate->ParityVal] |
| 66 | #define PF parity_table[(UINT8)cpustate->ParityVal] |
| 67 | 67 | #define AF (cpustate->AuxVal!=0) |
| 68 | 68 | #define OF (cpustate->OverVal!=0) |
| 69 | 69 | #define MD (cpustate->MF!=0) |
| r15700 | r15701 | |
| 78 | 78 | #define GetMemW(Seg,Off) ((UINT16) cpustate->program->read_byte((DefaultBase(Seg)+(Off))) + (cpustate->program->read_byte((DefaultBase(Seg)+((Off)+1)))<<8) ) |
| 79 | 79 | |
| 80 | 80 | #define PutMemB(Seg,Off,x) { cpustate->program->write_byte((DefaultBase(Seg)+(Off)),(x)); } |
| 81 | | #define PutMemW(Seg,Off,x) { PutMemB(Seg,Off,(x)&0xff); PutMemB(Seg,(Off)+1,(BYTE)((x)>>8)); } |
| 81 | #define PutMemW(Seg,Off,x) { PutMemB(Seg,Off,(x)&0xff); PutMemB(Seg,(Off)+1,(UINT8)((x)>>8)); } |
| 82 | 82 | |
| 83 | 83 | /* Todo: Remove these later - plus readword could overflow */ |
| 84 | | #define ReadByte(ea) ((BYTE)cpustate->program->read_byte((ea))) |
| 84 | #define ReadByte(ea) ((UINT8)cpustate->program->read_byte((ea))) |
| 85 | 85 | #define ReadWord(ea) (cpustate->program->read_byte((ea))+(cpustate->program->read_byte(((ea)+1))<<8)) |
| 86 | 86 | #define WriteByte(ea,val) { cpustate->program->write_byte((ea),val); } |
| 87 | | #define WriteWord(ea,val) { cpustate->program->write_byte((ea),(BYTE)(val)); cpustate->program->write_byte(((ea)+1),(val)>>8); } |
| 87 | #define WriteWord(ea,val) { cpustate->program->write_byte((ea),(UINT8)(val)); cpustate->program->write_byte(((ea)+1),(val)>>8); } |
| 88 | 88 | |
| 89 | 89 | #define read_port(port) cpustate->io->read_byte(port) |
| 90 | 90 | #define write_port(port,val) cpustate->io->write_byte(port,val) |
| r15700 | r15701 | |
| 94 | 94 | #define FETCHWORD(var) { var=cpustate->direct->read_raw_byte((((cpustate->sregs[CS]<<4)+cpustate->ip)))+(cpustate->direct->read_raw_byte((((cpustate->sregs[CS]<<4)+cpustate->ip+1)))<<8); cpustate->ip+=2; } |
| 95 | 95 | #define PUSH(val) { cpustate->regs.w[SP]-=2; WriteWord((((cpustate->sregs[SS]<<4)+cpustate->regs.w[SP])),val); } |
| 96 | 96 | #define POP(var) { var = ReadWord((((cpustate->sregs[SS]<<4)+cpustate->regs.w[SP]))); cpustate->regs.w[SP]+=2; } |
| 97 | | #define PEEK(addr) ((BYTE)cpustate->direct->read_raw_byte(addr)) |
| 98 | | #define PEEKOP(addr) ((BYTE)cpustate->direct->read_decrypted_byte(addr)) |
| 97 | #define PEEK(addr) ((UINT8)cpustate->direct->read_raw_byte(addr)) |
| 98 | #define PEEKOP(addr) ((UINT8)cpustate->direct->read_decrypted_byte(addr)) |
| 99 | 99 | |
| 100 | 100 | #define GetModRM UINT32 ModRM=cpustate->direct->read_raw_byte((cpustate->sregs[CS]<<4)+cpustate->ip++) |
| 101 | 101 | |
| r15700 | r15701 | |
| 115 | 115 | #define CLKM(v30mz,v30mzm) { cpustate->icount-=( ModRM >=0xc0 )?v30mz:v30mzm; } |
| 116 | 116 | |
| 117 | 117 | /************************************************************************/ |
| 118 | | #define CompressFlags() (WORD)(CF | (PF << 2) | (AF << 4) | (ZF << 6) \ |
| 118 | #define CompressFlags() (UINT16)(CF | (PF << 2) | (AF << 4) | (ZF << 6) \ |
| 119 | 119 | | (SF << 7) | (cpustate->TF << 8) | (cpustate->IF << 9) \ |
| 120 | 120 | | (cpustate->DF << 10) | (OF << 11)| (MD << 15)) |
| 121 | 121 | |
| r15700 | r15701 | |
| 153 | 153 | int tmp = (int)((INT8)FETCH); \ |
| 154 | 154 | if (flag) \ |
| 155 | 155 | { \ |
| 156 | | cpustate->ip = (WORD)(cpustate->ip+tmp); \ |
| 156 | cpustate->ip = (UINT16)(cpustate->ip+tmp); \ |
| 157 | 157 | cpustate->icount-=10; \ |
| 158 | 158 | return; \ |
| 159 | 159 | } |
| r15700 | r15701 | |
| 216 | 216 | tmp |= (1<<tmp2) |
| 217 | 217 | |
| 218 | 218 | #define XchgAWReg(Reg) \ |
| 219 | | WORD tmp; \ |
| 219 | UINT16 tmp; \ |
| 220 | 220 | tmp = cpustate->regs.w[Reg]; \ |
| 221 | 221 | cpustate->regs.w[Reg] = cpustate->regs.w[AW]; \ |
| 222 | 222 | cpustate->regs.w[AW] = tmp |
| r15700 | r15701 | |
| 229 | 229 | #define ROLC_WORD dst = (dst << 1) + CF; SetCFW(dst) |
| 230 | 230 | #define RORC_BYTE dst = (CF<<8)+dst; cpustate->CarryVal = dst & 0x01; dst >>= 1 |
| 231 | 231 | #define RORC_WORD dst = (CF<<16)+dst; cpustate->CarryVal = dst & 0x01; dst >>= 1 |
| 232 | | #define SHL_BYTE(c) cpustate->icount-=c; dst <<= c; SetCFB(dst); SetSZPF_Byte(dst); PutbackRMByte(ModRM,(BYTE)dst) |
| 233 | | #define SHL_WORD(c) cpustate->icount-=c; dst <<= c; SetCFW(dst); SetSZPF_Word(dst); PutbackRMWord(ModRM,(WORD)dst) |
| 234 | | #define SHR_BYTE(c) cpustate->icount-=c; dst >>= c-1; cpustate->CarryVal = dst & 0x1; dst >>= 1; SetSZPF_Byte(dst); PutbackRMByte(ModRM,(BYTE)dst) |
| 235 | | #define SHR_WORD(c) cpustate->icount-=c; dst >>= c-1; cpustate->CarryVal = dst & 0x1; dst >>= 1; SetSZPF_Word(dst); PutbackRMWord(ModRM,(WORD)dst) |
| 236 | | #define SHRA_BYTE(c) cpustate->icount-=c; dst = ((INT8)dst) >> (c-1); cpustate->CarryVal = dst & 0x1; dst = ((INT8)((BYTE)dst)) >> 1; SetSZPF_Byte(dst); PutbackRMByte(ModRM,(BYTE)dst) |
| 237 | | #define SHRA_WORD(c) cpustate->icount-=c; dst = ((INT16)dst) >> (c-1); cpustate->CarryVal = dst & 0x1; dst = ((INT16)((WORD)dst)) >> 1; SetSZPF_Word(dst); PutbackRMWord(ModRM,(WORD)dst) |
| 232 | #define SHL_BYTE(c) cpustate->icount-=c; dst <<= c; SetCFB(dst); SetSZPF_Byte(dst); PutbackRMByte(ModRM,(UINT8)dst) |
| 233 | #define SHL_WORD(c) cpustate->icount-=c; dst <<= c; SetCFW(dst); SetSZPF_Word(dst); PutbackRMWord(ModRM,(UINT16)dst) |
| 234 | #define SHR_BYTE(c) cpustate->icount-=c; dst >>= c-1; cpustate->CarryVal = dst & 0x1; dst >>= 1; SetSZPF_Byte(dst); PutbackRMByte(ModRM,(UINT8)dst) |
| 235 | #define SHR_WORD(c) cpustate->icount-=c; dst >>= c-1; cpustate->CarryVal = dst & 0x1; dst >>= 1; SetSZPF_Word(dst); PutbackRMWord(ModRM,(UINT16)dst) |
| 236 | #define SHRA_BYTE(c) cpustate->icount-=c; dst = ((INT8)dst) >> (c-1); cpustate->CarryVal = dst & 0x1; dst = ((INT8)((UINT8)dst)) >> 1; SetSZPF_Byte(dst); PutbackRMByte(ModRM,(UINT8)dst) |
| 237 | #define SHRA_WORD(c) cpustate->icount-=c; dst = ((INT16)dst) >> (c-1); cpustate->CarryVal = dst & 0x1; dst = ((INT16)((UINT16)dst)) >> 1; SetSZPF_Word(dst); PutbackRMWord(ModRM,(UINT16)dst) |
| 238 | 238 | |
| 239 | 239 | #define DIVUB \ |
| 240 | 240 | uresult = cpustate->regs.w[AW]; \ |
| 241 | 241 | uresult2 = uresult % tmp; \ |
| 242 | 242 | if ((uresult /= tmp) > 0xff) { \ |
| 243 | | nec_interrupt(cpustate,0,0); break; \ |
| 243 | nec_interrupt(cpustate,0); break; \ |
| 244 | 244 | } else { \ |
| 245 | 245 | cpustate->regs.b[AL] = uresult; \ |
| 246 | 246 | cpustate->regs.b[AH] = uresult2; \ |
| r15700 | r15701 | |
| 250 | 250 | result = (INT16)cpustate->regs.w[AW]; \ |
| 251 | 251 | result2 = result % (INT16)((INT8)tmp); \ |
| 252 | 252 | if ((result /= (INT16)((INT8)tmp)) > 0xff) { \ |
| 253 | | nec_interrupt(cpustate,0,0); break; \ |
| 253 | nec_interrupt(cpustate,0); break; \ |
| 254 | 254 | } else { \ |
| 255 | 255 | cpustate->regs.b[AL] = result; \ |
| 256 | 256 | cpustate->regs.b[AH] = result2; \ |
| r15700 | r15701 | |
| 260 | 260 | uresult = (((UINT32)cpustate->regs.w[DW]) << 16) | cpustate->regs.w[AW];\ |
| 261 | 261 | uresult2 = uresult % tmp; \ |
| 262 | 262 | if ((uresult /= tmp) > 0xffff) { \ |
| 263 | | nec_interrupt(cpustate,0,0); break; \ |
| 263 | nec_interrupt(cpustate,0); break; \ |
| 264 | 264 | } else { \ |
| 265 | 265 | cpustate->regs.w[AW]=uresult; \ |
| 266 | 266 | cpustate->regs.w[DW]=uresult2; \ |
| r15700 | r15701 | |
| 270 | 270 | result = ((UINT32)cpustate->regs.w[DW] << 16) + cpustate->regs.w[AW]; \ |
| 271 | 271 | result2 = result % (INT32)((INT16)tmp); \ |
| 272 | 272 | if ((result /= (INT32)((INT16)tmp)) > 0xffff) { \ |
| 273 | | nec_interrupt(cpustate,0,0); break; \ |
| 273 | nec_interrupt(cpustate,0); break; \ |
| 274 | 274 | } else { \ |
| 275 | 275 | cpustate->regs.w[AW]=result; \ |
| 276 | 276 | cpustate->regs.w[DW]=result2; \ |