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r15313 Friday 25th May, 2012 at 06:36:20 UTC by Miodrag Milanović
-dm7000: connected terminal keyboard [Lukasz Markowski] out of log: press Enter on boot to get menu also it's made 10x slower to get proper response for testing

[src/mess/drivers]	dm7000.c
[src/mess/includes]	dm7000.h

src/mess/includes/dm7000.h

r15312	r15313
23	23
24	24	DECLARE_WRITE8_MEMBER ( dm7000_scc0_w );
25	25	DECLARE_READ8_MEMBER ( dm7000_scc0_r );
	26	DECLARE_WRITE8_MEMBER(kbd_put);
26	27	UINT8 m_scc0_lcr;
27	28	UINT8 m_scc0_lsr;
	29	UINT8 m_term_data;
	30
28	31
29	32	DECLARE_WRITE8_MEMBER ( dm7000_gpio0_w );
30	33	DECLARE_READ8_MEMBER ( dm7000_gpio0_r );
r15312	r15313
32	35	DECLARE_WRITE8_MEMBER ( dm7000_scp0_w );
33	36	DECLARE_READ8_MEMBER ( dm7000_scp0_r );
34	37
	38	DECLARE_WRITE16_MEMBER ( dm7000_enet_w );
	39	DECLARE_READ16_MEMBER ( dm7000_enet_r );
	40	UINT16         m_enet_regs[32];
	41
35	42	UINT32         dcr[1024];
36	43	};
37	44

src/mess/drivers/dm7000.c

r15312	r15313
39	39	#include "emu.h"
40	40	#include "includes/dm7000.h"
41	41
42		#define VERBOSE_LEVEL ( 0 )
	42	#define VERBOSE_LEVEL ( 9 )
43	43
44	44	INLINE void ATTR_PRINTF(3,4) verboselog( running_machine &machine, int n_level, const char *s_fmt, ...)
45	45	{
r15312	r15313
56	56
57	57	READ8_MEMBER( dm7000_state::dm7000_iic0_r )
58	58	{
59		UINT32 data = 0; // dummy
60		verboselog( machine(), 9, "(IIC0) %08X -> %08X (PC %08X)\n", 0x40030000 + offset, data, cpu_get_pc(m_maincpu));
	59	UINT8 data = 0; // dummy
	60	verboselog( machine(), 9, "(IIC0) %08X -> %08X\n", 0x40030000 + offset, data);
61	61	return data;
62	62	}
63	63
64	64	WRITE8_MEMBER( dm7000_state::dm7000_iic0_w )
65	65	{
66		verboselog( machine(), 9, "(IIC0) %08X <- %08X (PC %08X)\n", 0x40030000 + offset, data, cpu_get_pc(m_maincpu));
	66	verboselog( machine(), 9, "(IIC0) %08X <- %08X\n", 0x40030000 + offset, data);
67	67	}
68	68
69	69	READ8_MEMBER( dm7000_state::dm7000_iic1_r )
70	70	{
71		UINT32 data = 0; // dummy
72		verboselog( machine(), 9, "(IIC1) %08X -> %08X (PC %08X)\n", 0x400b0000 + offset, data, cpu_get_pc(m_maincpu));
	71	UINT8 data = 0; // dummy
	72	verboselog( machine(), 9, "(IIC1) %08X -> %08X\n", 0x400b0000 + offset, data);
73	73	return data;
74	74	}
75	75
76	76	WRITE8_MEMBER( dm7000_state::dm7000_iic1_w )
77	77	{
78		verboselog( machine(), 9, "(IIC1) %08X <- %08X (PC %08X)\n", 0x400b0000 + offset, data, cpu_get_pc(m_maincpu));
	78	verboselog( machine(), 9, "(IIC1) %08X <- %08X\n", 0x400b0000 + offset, data);
79	79	}
80	80
81	81	READ8_MEMBER( dm7000_state::dm7000_scc0_r )
82	82	{
83		UINT32 data = 0; // dummy
	83	UINT8 data = 0;
84	84	switch(offset) {
	85	case UART_THR:
	86	data = m_term_data;
	87	if(m_term_data == 0xd) {
	88	m_term_data = 0xa;
	89	} else {
	90	m_term_data = 0;
	91	m_scc0_lsr = 0;
	92	}
	93	break;
85	94	case UART_LSR:
86		data = UART_LSR_THRE | UART_LSR_TEMT;
	95	data = UART_LSR_THRE | UART_LSR_TEMT | m_scc0_lsr;
87	96	break;
88	97	}
89		verboselog( machine(), 9, "(SCC0) %08X -> %08X (PC %08X)\n", 0x40040000 + offset, data, cpu_get_pc(m_maincpu));
	98	verboselog( machine(), 9, "(SCC0) %08X -> %08X\n", 0x40040000 + offset, data);
90	99	return data;
91	100	}
92	101
r15312	r15313
96	105	case UART_THR:
97	106	if(!(m_scc0_lcr & UART_LCR_DLAB)) {
98	107	m_terminal->write(space, 0, data);
	108	m_scc0_lsr = 1;
99	109	}
100	110	break;
101	111	case UART_LCR:
102	112	m_scc0_lcr = data;
103	113	break;
104	114	}
105		verboselog( machine(), 9, "(SCC0) %08X <- %08X (PC %08X)\n", 0x40040000 + offset, data, cpu_get_pc(m_maincpu));
	115	verboselog( machine(), 9, "(SCC0) %08X <- %08X\n", 0x40040000 + offset, data);
106	116	}
107	117
108	118	READ8_MEMBER( dm7000_state::dm7000_gpio0_r )
109	119	{
110		UINT32 data = 0; // dummy
111		verboselog( machine(), 9, "(GPIO0) %08X -> %08X (PC %08X)\n", 0x40060000 + offset, data, cpu_get_pc(m_maincpu));
	120	UINT8 data = 0; // dummy
	121	verboselog( machine(), 9, "(GPIO0) %08X -> %08X\n", 0x40060000 + offset, data);
112	122	return data;
113	123	}
114	124
115	125	WRITE8_MEMBER( dm7000_state::dm7000_gpio0_w )
116	126	{
117		verboselog( machine(), 9, "(GPIO0) %08X <- %08X (PC %08X)\n", 0x40060000 + offset, data, cpu_get_pc(m_maincpu));
	127	verboselog( machine(), 9, "(GPIO0) %08X <- %08X\n", 0x40060000 + offset, data);
118	128	}
119	129
120	130	READ8_MEMBER( dm7000_state::dm7000_scp0_r )
121	131	{
122		UINT32 data = 0; // dummy
	132	UINT8 data = 0; // dummy
123	133	switch(offset) {
124	134	case SCP_STATUS:
125	135	data = SCP_STATUS_RXRDY;
126	136	break;
127	137	}
128		verboselog( machine(), 9, "(SCP0) %08X -> %08X (PC %08X)\n", 0x400c0000 + offset, data, cpu_get_pc(m_maincpu));
	138	verboselog( machine(), 9, "(SCP0) %08X -> %08X\n", 0x400c0000 + offset, data);
129	139	return data;
130	140	}
131	141
132	142	WRITE8_MEMBER( dm7000_state::dm7000_scp0_w )
133	143	{
134		verboselog( machine(), 9, "(SCP0) %08X <- %08X (PC %08X)\n", 0x400c0000 + offset, data, cpu_get_pc(m_maincpu));
	144	verboselog( machine(), 9, "(SCP0) %08X <- %08X\n", 0x400c0000 + offset, data);
135	145	switch(offset) {
136	146	case SCP_TXDATA:
137	147	//printf("%02X ", data);
r15312	r15313
139	149	}
140	150	}
141	151
	152	READ16_MEMBER( dm7000_state::dm7000_enet_r )
	153	{
	154	UINT16 data;
	155	switch (offset) {
	156	case 0x01:
	157	data = 0x1801;
	158	break;
	159	case 0x05:
	160	data = 0x3330;
	161	break;
	162	case 0x07:
	163	data = 0x3300;
	164	break;
	165	default:
	166	data = m_enet_regs[offset];
	167	break;
	168	}
	169	verboselog( machine(), 9, "(ENET) %08X -> %08X\n", 0x72000600 + (offset), data);
	170	return data;
	171	}
	172
	173	WRITE16_MEMBER( dm7000_state::dm7000_enet_w )
	174	{
	175	verboselog( machine(), 9, "(ENET) %08X <- %08X\n", 0x72000600 + (offset), data);
	176	COMBINE_DATA(&m_enet_regs[offset]);
	177	}
	178
142	179	/*
143	180	Memory map for the IBM "Redwood-4" STB03xxx evaluation board.
144	181
r15312	r15313
198	235	AM_RANGE(0x400b0000, 0x400b000f) AM_READWRITE8(dm7000_iic1_r, dm7000_iic1_w, 0xffffffff)
199	236	AM_RANGE(0x400c0000, 0x400c0007) AM_READWRITE8(dm7000_scp0_r, dm7000_scp0_w, 0xffffffff)
200	237
	238	/* ENET - ASIX AX88796 */
	239	AM_RANGE(0x72000300, 0x720003ff) AM_READWRITE16(dm7000_enet_r, dm7000_enet_w, 0xffffffff)
	240
201	241	AM_RANGE(0x7f800000, 0x7ffdffff) AM_ROM AM_REGION("user2",0)
202	242	AM_RANGE(0x7ffe0000, 0x7fffffff) AM_ROM AM_REGION("user1",0)
203	243	//AM_RANGE(0xfffe0000, 0xffffffff) AM_ROM AM_REGION("user1",0)
r15312	r15313
232	272	static READ32_DEVICE_HANDLER( dcr_r )
233	273	{
234	274	dm7000_state *state = device->machine().driver_data<dm7000_state>();
	275	mame_printf_debug("DCR %03X read\n", offset);
235	276	if(offset>=1024) {printf("get %04X\n", offset); return 0;} else
236	277	switch(offset) {
237	278	case DCRSTB045_CMD_STAT:
r15312	r15313
244	285
245	286	static WRITE32_DEVICE_HANDLER( dcr_w )
246	287	{
	288	mame_printf_debug("DCR %03X write = %08X\n", offset, data);
247	289	dm7000_state *state = device->machine().driver_data<dm7000_state>();
248	290	if(offset>=1024) {printf("get %04X\n", offset); } else
249	291	state->dcr[offset] = data;
250	292	}
251	293
	294	WRITE8_MEMBER( dm7000_state::kbd_put )
	295	{
	296	//printf("%02X\n", data);
	297	m_term_data = data;
	298	m_scc0_lsr = 1;
	299	}
	300
252	301	static GENERIC_TERMINAL_INTERFACE( terminal_intf )
253	302	{
254		DEVCB_NULL
	303	DEVCB_DRIVER_MEMBER(dm7000_state, kbd_put)
255	304	};
256	305
257	306	static const powerpc_config ppc405_config =
r15312	r15313
263	312
264	313	static MACHINE_CONFIG_START( dm7000, dm7000_state )
265	314	/* basic machine hardware */
266		MCFG_CPU_ADD("maincpu",PPC405GP, 252000000) // Should be PPC405D4?
	315	MCFG_CPU_ADD("maincpu",PPC405GP, 252000000 / 10) // Should be PPC405D4?
	316	// Slowed down 10 times in order to get normal response for now
267	317	MCFG_CPU_CONFIG(ppc405_config)
268	318	MCFG_CPU_PROGRAM_MAP(dm7000_mem)
269	319

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